From d9d6e1f3d5bbca799910072b2110963250e0b9c6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:00:38 +0100 Subject: [PATCH 001/503] media: dvb-usb: auto-select CYPRESS_FIRMWARE At least some of the supported boards by dvb-usb driver need to load the cypress firmware, so select it, as otherwise missing dependencies may popup. Also, as the cypress firmware load routines are needed only by the dvb-usb, dvb-usb-v2 and go7007 drivers, and those all (now) select it, there's no need to ask the user for manually select it. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/common/Kconfig | 2 +- drivers/media/usb/dvb-usb/Kconfig | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/common/Kconfig b/drivers/media/common/Kconfig index 1990b7f09454e..4ea03b7899a8f 100644 --- a/drivers/media/common/Kconfig +++ b/drivers/media/common/Kconfig @@ -14,7 +14,7 @@ config VIDEO_TVEEPROM depends on I2C config CYPRESS_FIRMWARE - tristate "Cypress firmware helper routines" + tristate depends on USB source "drivers/media/common/videobuf2/Kconfig" diff --git a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig index 1a3e5f965ae40..42334a02cdced 100644 --- a/drivers/media/usb/dvb-usb/Kconfig +++ b/drivers/media/usb/dvb-usb/Kconfig @@ -2,6 +2,7 @@ config DVB_USB tristate "Support for various USB DVB devices" depends on DVB_CORE && USB && I2C && RC_CORE + select CYPRESS_FIRMWARE help By enabling this you will be able to choose the various supported USB1.1 and USB2.0 DVB devices. -- GitLab From 06b93644f4d102bdfc297159121acc1de794d68d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:27:15 +0100 Subject: [PATCH 002/503] media: Kconfig: add an option to filter in/out platform drivers Most systems don't need support for those, while others only need those, instead of the others. So, add an option to filter in/out platform drivers. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 9dfea5c4b6ab7..2b6ea8beb9199 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -87,6 +87,18 @@ config MEDIA_CEC_SUPPORT Say Y when you have an HDMI receiver, transmitter or a USB CEC adapter that supports HDMI CEC. +config MEDIA_PLATFORM_SUPPORT + bool "Platform-specific devices support" + help + Enable support for complex cameras, codecs, and other hardware + that are integrated at the CPU, GPU or on Image Signalling Processor + and don't use PCI, USB or Firewire buses. + + This is found on Embedded hardware (SoC), on V4L2 codecs and + on some GPU and newer CPU chipsets. + + Say Y when you want to be able so see such devices. + source "drivers/media/cec/Kconfig" source "drivers/media/mc/Kconfig" @@ -161,15 +173,14 @@ source "drivers/media/dvb-core/Kconfig" comment "Media drivers" -# -# V4L platform/mem2mem drivers -# - source "drivers/media/usb/Kconfig" source "drivers/media/pci/Kconfig" +source "drivers/media/radio/Kconfig" + +if MEDIA_PLATFORM_SUPPORT source "drivers/media/platform/Kconfig" source "drivers/media/mmc/Kconfig" -source "drivers/media/radio/Kconfig" +endif comment "Supported FireWire (IEEE 1394) Adapters" depends on DVB_CORE && FIREWIRE -- GitLab From a19f228b8dd9a67e8de4ebd4eac8a4c94ec39d1a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:03:16 +0100 Subject: [PATCH 003/503] media: Kconfig: not all V4L2 platform drivers are for camera When the platform drivers got added, they were all part of complex camera support. This is not the case anymore, as we now have codecs and other stuff there too. So, fix the dependencies, in order to not require users to manually select something that it doesn't make sense. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 3 +-- drivers/media/platform/Kconfig | 3 --- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 2b6ea8beb9199..31fbdb2a8d41d 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -111,8 +111,7 @@ source "drivers/media/mc/Kconfig" config VIDEO_DEV tristate depends on MEDIA_SUPPORT - depends on MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT - default y + default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT config VIDEO_V4L2_SUBDEV_API bool "V4L2 sub-device userspace API" diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index e01bbb9dd1c15..c4178420d2c5a 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -5,7 +5,6 @@ menuconfig V4L_PLATFORM_DRIVERS bool "V4L platform devices" - depends on MEDIA_CAMERA_SUPPORT help Say Y here to enable support for platform-specific V4L drivers. @@ -43,7 +42,6 @@ config VIDEO_ASPEED config VIDEO_SH_VOU tristate "SuperH VOU video output driver" - depends on MEDIA_CAMERA_SUPPORT depends on VIDEO_DEV && I2C depends on ARCH_SHMOBILE || COMPILE_TEST select VIDEOBUF2_DMA_CONTIG @@ -165,7 +163,6 @@ endif # V4L_PLATFORM_DRIVERS menuconfig V4L_MEM2MEM_DRIVERS bool "Memory-to-memory multimedia devices" depends on VIDEO_V4L2 - depends on MEDIA_CAMERA_SUPPORT help Say Y here to enable selecting drivers for V4L devices that use system memory for both source and destination buffers, as opposed -- GitLab From f11175daffad2c53e6e3ea020d0a6c3839a2fba7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:05:18 +0100 Subject: [PATCH 004/503] media: pci: move VIDEO_PCI_SKELETON to a different Kconfig The V4L2 PCI skeleton is not part of the V4L2 core. Move it to appear together with the other PCI drivers, at the end, as this is something that normal users don't even need to bother. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/Kconfig | 10 ++++++++++ drivers/media/v4l2-core/Kconfig | 10 ---------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig index dcb3719f440ea..9336f8446cf04 100644 --- a/drivers/media/pci/Kconfig +++ b/drivers/media/pci/Kconfig @@ -56,5 +56,15 @@ endif source "drivers/media/pci/intel/ipu3/Kconfig" +config VIDEO_PCI_SKELETON + tristate "Skeleton PCI V4L2 driver" + depends on PCI + depends on SAMPLES + depends on VIDEO_V4L2 && VIDEOBUF2_CORE + depends on VIDEOBUF2_MEMOPS && VIDEOBUF2_DMA_CONTIG + help + Enable build of the skeleton PCI driver, used as a reference + when developing new drivers. + endif #MEDIA_PCI_SUPPORT endif #PCI diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig index 39e3fb30ba0be..26276b257eaee 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig @@ -31,16 +31,6 @@ config VIDEO_FIXED_MINOR_RANGES When in doubt, say N. -config VIDEO_PCI_SKELETON - tristate "Skeleton PCI V4L2 driver" - depends on PCI - depends on SAMPLES - depends on VIDEO_V4L2 && VIDEOBUF2_CORE - depends on VIDEOBUF2_MEMOPS && VIDEOBUF2_DMA_CONTIG - help - Enable build of the skeleton PCI driver, used as a reference - when developing new drivers. - # Used by drivers that need tuner.ko config VIDEO_TUNER tristate -- GitLab From dee1877d9168f3e4b5e3c384d6d217dd1bbd4b49 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:15:43 +0100 Subject: [PATCH 005/503] media: Kconfig: update the MEDIA_SUPPORT help message There are more things than just cameras and TV devices on media. Update the help message accordingly. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 31fbdb2a8d41d..72d4f3e0b0813 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -18,8 +18,10 @@ menuconfig MEDIA_SUPPORT tristate "Multimedia support" depends on HAS_IOMEM help - If you want to use Webcams, Video grabber devices and/or TV devices - enable this option and other options below. + If you want to use media devices, including Webcams, Video grabber + devices and/or TV devices, V4L2 codecs, etc, enable this option + and other options below. + Additional info and docs are available on the web at -- GitLab From 4b32216adb010a364f23a055c45e06e839b089f9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:39:43 +0100 Subject: [PATCH 006/503] media: split test drivers from platform directory When the first test device was added (vivi.c), there were just one file. I was too lazy on that time to create a separate directory just for it, so I kept it together with platform. Now, we have vivid, vicodec, vim2m and vimc. Also, a new virtual driver has been prepared to support DVB API. So, it is time to solve this mess, by placing test stuff on a separate directory. It should be noticed that we also have some skeleton drivers (for V4L and for DVB). For now, we'll keep them separate, as they're not really test drivers, but instead, just examples. The DVB frontend ones will likely be part of a new DVB test driver. By that time, it should make sense to move them here as well. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 14 ++++++++++ drivers/media/platform/Kconfig | 23 --------------- drivers/media/platform/Makefile | 5 ---- drivers/media/test_drivers/Kconfig | 28 +++++++++++++++++++ drivers/media/test_drivers/Makefile | 9 ++++++ .../vicodec/Kconfig | 0 .../vicodec/Makefile | 0 .../vicodec/codec-fwht.c | 0 .../vicodec/codec-fwht.h | 0 .../vicodec/codec-v4l2-fwht.c | 0 .../vicodec/codec-v4l2-fwht.h | 0 .../vicodec/vicodec-core.c | 0 .../media/{platform => test_drivers}/vim2m.c | 0 .../{platform => test_drivers}/vimc/Kconfig | 0 .../{platform => test_drivers}/vimc/Makefile | 0 .../vimc/vimc-capture.c | 0 .../vimc/vimc-common.c | 0 .../vimc/vimc-common.h | 0 .../vimc/vimc-core.c | 0 .../vimc/vimc-debayer.c | 0 .../vimc/vimc-scaler.c | 0 .../vimc/vimc-sensor.c | 0 .../vimc/vimc-streamer.c | 0 .../vimc/vimc-streamer.h | 0 .../{platform => test_drivers}/vivid/Kconfig | 0 .../{platform => test_drivers}/vivid/Makefile | 0 .../vivid/vivid-cec.c | 0 .../vivid/vivid-cec.h | 0 .../vivid/vivid-core.c | 0 .../vivid/vivid-core.h | 0 .../vivid/vivid-ctrls.c | 0 .../vivid/vivid-ctrls.h | 0 .../vivid/vivid-kthread-cap.c | 0 .../vivid/vivid-kthread-cap.h | 0 .../vivid/vivid-kthread-out.c | 0 .../vivid/vivid-kthread-out.h | 0 .../vivid/vivid-kthread-touch.c | 0 .../vivid/vivid-kthread-touch.h | 0 .../vivid/vivid-meta-cap.c | 0 .../vivid/vivid-meta-cap.h | 0 .../vivid/vivid-meta-out.c | 0 .../vivid/vivid-meta-out.h | 0 .../vivid/vivid-osd.c | 0 .../vivid/vivid-osd.h | 0 .../vivid/vivid-radio-common.c | 0 .../vivid/vivid-radio-common.h | 0 .../vivid/vivid-radio-rx.c | 0 .../vivid/vivid-radio-rx.h | 0 .../vivid/vivid-radio-tx.c | 0 .../vivid/vivid-radio-tx.h | 0 .../vivid/vivid-rds-gen.c | 0 .../vivid/vivid-rds-gen.h | 0 .../vivid/vivid-sdr-cap.c | 0 .../vivid/vivid-sdr-cap.h | 0 .../vivid/vivid-touch-cap.c | 0 .../vivid/vivid-touch-cap.h | 0 .../vivid/vivid-vbi-cap.c | 0 .../vivid/vivid-vbi-cap.h | 0 .../vivid/vivid-vbi-gen.c | 0 .../vivid/vivid-vbi-gen.h | 0 .../vivid/vivid-vbi-out.c | 0 .../vivid/vivid-vbi-out.h | 0 .../vivid/vivid-vid-cap.c | 0 .../vivid/vivid-vid-cap.h | 0 .../vivid/vivid-vid-common.c | 0 .../vivid/vivid-vid-common.h | 0 .../vivid/vivid-vid-out.c | 0 .../vivid/vivid-vid-out.h | 0 68 files changed, 51 insertions(+), 28 deletions(-) create mode 100644 drivers/media/test_drivers/Kconfig create mode 100644 drivers/media/test_drivers/Makefile rename drivers/media/{platform => test_drivers}/vicodec/Kconfig (100%) rename drivers/media/{platform => test_drivers}/vicodec/Makefile (100%) rename drivers/media/{platform => test_drivers}/vicodec/codec-fwht.c (100%) rename drivers/media/{platform => test_drivers}/vicodec/codec-fwht.h (100%) rename drivers/media/{platform => test_drivers}/vicodec/codec-v4l2-fwht.c (100%) rename drivers/media/{platform => test_drivers}/vicodec/codec-v4l2-fwht.h (100%) rename drivers/media/{platform => test_drivers}/vicodec/vicodec-core.c (100%) rename drivers/media/{platform => test_drivers}/vim2m.c (100%) rename drivers/media/{platform => test_drivers}/vimc/Kconfig (100%) rename drivers/media/{platform => test_drivers}/vimc/Makefile (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-capture.c (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-common.c (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-common.h (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-core.c (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-debayer.c (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-scaler.c (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-sensor.c (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-streamer.c (100%) rename drivers/media/{platform => test_drivers}/vimc/vimc-streamer.h (100%) rename drivers/media/{platform => test_drivers}/vivid/Kconfig (100%) rename drivers/media/{platform => test_drivers}/vivid/Makefile (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-cec.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-cec.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-core.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-core.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-ctrls.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-ctrls.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-kthread-cap.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-kthread-cap.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-kthread-out.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-kthread-out.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-kthread-touch.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-kthread-touch.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-meta-cap.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-meta-cap.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-meta-out.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-meta-out.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-osd.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-osd.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-radio-common.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-radio-common.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-radio-rx.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-radio-rx.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-radio-tx.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-radio-tx.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-rds-gen.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-rds-gen.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-sdr-cap.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-sdr-cap.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-touch-cap.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-touch-cap.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vbi-cap.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vbi-cap.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vbi-gen.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vbi-gen.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vbi-out.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vbi-out.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vid-cap.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vid-cap.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vid-common.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vid-common.h (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vid-out.c (100%) rename drivers/media/{platform => test_drivers}/vivid/vivid-vid-out.h (100%) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 72d4f3e0b0813..b35c980dcf56f 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -101,6 +101,19 @@ config MEDIA_PLATFORM_SUPPORT Say Y when you want to be able so see such devices. +config MEDIA_TEST_SUPPORT + bool "Test drivers support" + help + Those drivers should not be used on production Kernels, but + can be useful on debug ones. It enables several dummy drivers + that simulate a real hardware. Very useful to test userspace + applications and to validate if the subsystem core is doesn't + have regressions. + + Say Y if you want to use some virtual test driver. + + In case of doubts, say N. + source "drivers/media/cec/Kconfig" source "drivers/media/mc/Kconfig" @@ -180,6 +193,7 @@ source "drivers/media/radio/Kconfig" if MEDIA_PLATFORM_SUPPORT source "drivers/media/platform/Kconfig" +source "drivers/media/test_drivers/Kconfig" source "drivers/media/mmc/Kconfig" endif diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index c4178420d2c5a..80028337bf00c 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -529,29 +529,6 @@ config VIDEO_TI_SC config VIDEO_TI_CSC tristate -menuconfig V4L_TEST_DRIVERS - bool "Media test drivers" - depends on MEDIA_CAMERA_SUPPORT - -if V4L_TEST_DRIVERS - -source "drivers/media/platform/vimc/Kconfig" - -source "drivers/media/platform/vivid/Kconfig" - -config VIDEO_VIM2M - tristate "Virtual Memory-to-Memory Driver" - depends on VIDEO_DEV && VIDEO_V4L2 - select VIDEOBUF2_VMALLOC - select V4L2_MEM2MEM_DEV - help - This is a virtual test device for the memory-to-memory driver - framework. - -source "drivers/media/platform/vicodec/Kconfig" - -endif #V4L_TEST_DRIVERS - menuconfig DVB_PLATFORM_DRIVERS bool "DVB platform devices" depends on MEDIA_DIGITAL_TV_SUPPORT diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index d13db96e30153..a0194ef1211fe 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -14,11 +14,6 @@ obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o obj-$(CONFIG_VIDEO_VIU) += fsl-viu.o -obj-$(CONFIG_VIDEO_VIMC) += vimc/ -obj-$(CONFIG_VIDEO_VIVID) += vivid/ -obj-$(CONFIG_VIDEO_VIM2M) += vim2m.o -obj-$(CONFIG_VIDEO_VICODEC) += vicodec/ - obj-y += ti-vpe/ obj-$(CONFIG_VIDEO_MX2_EMMAPRP) += mx2_emmaprp.o diff --git a/drivers/media/test_drivers/Kconfig b/drivers/media/test_drivers/Kconfig new file mode 100644 index 0000000000000..258a4d36c0d37 --- /dev/null +++ b/drivers/media/test_drivers/Kconfig @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0-only + +if MEDIA_TEST_SUPPORT + +menuconfig V4L_TEST_DRIVERS + bool "V4L test drivers" + depends on MEDIA_CAMERA_SUPPORT + +if V4L_TEST_DRIVERS + +source "drivers/media/test_drivers/vimc/Kconfig" + +source "drivers/media/test_drivers/vivid/Kconfig" + +config VIDEO_VIM2M + tristate "Virtual Memory-to-Memory Driver" + depends on VIDEO_DEV && VIDEO_V4L2 + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + help + This is a virtual test device for the memory-to-memory driver + framework. + +source "drivers/media/test_drivers/vicodec/Kconfig" + +endif #V4L_TEST_DRIVERS + +endif #MEDIA_TEST_SUPPORT diff --git a/drivers/media/test_drivers/Makefile b/drivers/media/test_drivers/Makefile new file mode 100644 index 0000000000000..74410d3a9f2d2 --- /dev/null +++ b/drivers/media/test_drivers/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the test drivers. +# + +obj-$(CONFIG_VIDEO_VIMC) += vimc/ +obj-$(CONFIG_VIDEO_VIVID) += vivid/ +obj-$(CONFIG_VIDEO_VIM2M) += vim2m.o +obj-$(CONFIG_VIDEO_VICODEC) += vicodec/ diff --git a/drivers/media/platform/vicodec/Kconfig b/drivers/media/test_drivers/vicodec/Kconfig similarity index 100% rename from drivers/media/platform/vicodec/Kconfig rename to drivers/media/test_drivers/vicodec/Kconfig diff --git a/drivers/media/platform/vicodec/Makefile b/drivers/media/test_drivers/vicodec/Makefile similarity index 100% rename from drivers/media/platform/vicodec/Makefile rename to drivers/media/test_drivers/vicodec/Makefile diff --git a/drivers/media/platform/vicodec/codec-fwht.c b/drivers/media/test_drivers/vicodec/codec-fwht.c similarity index 100% rename from drivers/media/platform/vicodec/codec-fwht.c rename to drivers/media/test_drivers/vicodec/codec-fwht.c diff --git a/drivers/media/platform/vicodec/codec-fwht.h b/drivers/media/test_drivers/vicodec/codec-fwht.h similarity index 100% rename from drivers/media/platform/vicodec/codec-fwht.h rename to drivers/media/test_drivers/vicodec/codec-fwht.h diff --git a/drivers/media/platform/vicodec/codec-v4l2-fwht.c b/drivers/media/test_drivers/vicodec/codec-v4l2-fwht.c similarity index 100% rename from drivers/media/platform/vicodec/codec-v4l2-fwht.c rename to drivers/media/test_drivers/vicodec/codec-v4l2-fwht.c diff --git a/drivers/media/platform/vicodec/codec-v4l2-fwht.h b/drivers/media/test_drivers/vicodec/codec-v4l2-fwht.h similarity index 100% rename from drivers/media/platform/vicodec/codec-v4l2-fwht.h rename to drivers/media/test_drivers/vicodec/codec-v4l2-fwht.h diff --git a/drivers/media/platform/vicodec/vicodec-core.c b/drivers/media/test_drivers/vicodec/vicodec-core.c similarity index 100% rename from drivers/media/platform/vicodec/vicodec-core.c rename to drivers/media/test_drivers/vicodec/vicodec-core.c diff --git a/drivers/media/platform/vim2m.c b/drivers/media/test_drivers/vim2m.c similarity index 100% rename from drivers/media/platform/vim2m.c rename to drivers/media/test_drivers/vim2m.c diff --git a/drivers/media/platform/vimc/Kconfig b/drivers/media/test_drivers/vimc/Kconfig similarity index 100% rename from drivers/media/platform/vimc/Kconfig rename to drivers/media/test_drivers/vimc/Kconfig diff --git a/drivers/media/platform/vimc/Makefile b/drivers/media/test_drivers/vimc/Makefile similarity index 100% rename from drivers/media/platform/vimc/Makefile rename to drivers/media/test_drivers/vimc/Makefile diff --git a/drivers/media/platform/vimc/vimc-capture.c b/drivers/media/test_drivers/vimc/vimc-capture.c similarity index 100% rename from drivers/media/platform/vimc/vimc-capture.c rename to drivers/media/test_drivers/vimc/vimc-capture.c diff --git a/drivers/media/platform/vimc/vimc-common.c b/drivers/media/test_drivers/vimc/vimc-common.c similarity index 100% rename from drivers/media/platform/vimc/vimc-common.c rename to drivers/media/test_drivers/vimc/vimc-common.c diff --git a/drivers/media/platform/vimc/vimc-common.h b/drivers/media/test_drivers/vimc/vimc-common.h similarity index 100% rename from drivers/media/platform/vimc/vimc-common.h rename to drivers/media/test_drivers/vimc/vimc-common.h diff --git a/drivers/media/platform/vimc/vimc-core.c b/drivers/media/test_drivers/vimc/vimc-core.c similarity index 100% rename from drivers/media/platform/vimc/vimc-core.c rename to drivers/media/test_drivers/vimc/vimc-core.c diff --git a/drivers/media/platform/vimc/vimc-debayer.c b/drivers/media/test_drivers/vimc/vimc-debayer.c similarity index 100% rename from drivers/media/platform/vimc/vimc-debayer.c rename to drivers/media/test_drivers/vimc/vimc-debayer.c diff --git a/drivers/media/platform/vimc/vimc-scaler.c b/drivers/media/test_drivers/vimc/vimc-scaler.c similarity index 100% rename from drivers/media/platform/vimc/vimc-scaler.c rename to drivers/media/test_drivers/vimc/vimc-scaler.c diff --git a/drivers/media/platform/vimc/vimc-sensor.c b/drivers/media/test_drivers/vimc/vimc-sensor.c similarity index 100% rename from drivers/media/platform/vimc/vimc-sensor.c rename to drivers/media/test_drivers/vimc/vimc-sensor.c diff --git a/drivers/media/platform/vimc/vimc-streamer.c b/drivers/media/test_drivers/vimc/vimc-streamer.c similarity index 100% rename from drivers/media/platform/vimc/vimc-streamer.c rename to drivers/media/test_drivers/vimc/vimc-streamer.c diff --git a/drivers/media/platform/vimc/vimc-streamer.h b/drivers/media/test_drivers/vimc/vimc-streamer.h similarity index 100% rename from drivers/media/platform/vimc/vimc-streamer.h rename to drivers/media/test_drivers/vimc/vimc-streamer.h diff --git a/drivers/media/platform/vivid/Kconfig b/drivers/media/test_drivers/vivid/Kconfig similarity index 100% rename from drivers/media/platform/vivid/Kconfig rename to drivers/media/test_drivers/vivid/Kconfig diff --git a/drivers/media/platform/vivid/Makefile b/drivers/media/test_drivers/vivid/Makefile similarity index 100% rename from drivers/media/platform/vivid/Makefile rename to drivers/media/test_drivers/vivid/Makefile diff --git a/drivers/media/platform/vivid/vivid-cec.c b/drivers/media/test_drivers/vivid/vivid-cec.c similarity index 100% rename from drivers/media/platform/vivid/vivid-cec.c rename to drivers/media/test_drivers/vivid/vivid-cec.c diff --git a/drivers/media/platform/vivid/vivid-cec.h b/drivers/media/test_drivers/vivid/vivid-cec.h similarity index 100% rename from drivers/media/platform/vivid/vivid-cec.h rename to drivers/media/test_drivers/vivid/vivid-cec.h diff --git a/drivers/media/platform/vivid/vivid-core.c b/drivers/media/test_drivers/vivid/vivid-core.c similarity index 100% rename from drivers/media/platform/vivid/vivid-core.c rename to drivers/media/test_drivers/vivid/vivid-core.c diff --git a/drivers/media/platform/vivid/vivid-core.h b/drivers/media/test_drivers/vivid/vivid-core.h similarity index 100% rename from drivers/media/platform/vivid/vivid-core.h rename to drivers/media/test_drivers/vivid/vivid-core.h diff --git a/drivers/media/platform/vivid/vivid-ctrls.c b/drivers/media/test_drivers/vivid/vivid-ctrls.c similarity index 100% rename from drivers/media/platform/vivid/vivid-ctrls.c rename to drivers/media/test_drivers/vivid/vivid-ctrls.c diff --git a/drivers/media/platform/vivid/vivid-ctrls.h b/drivers/media/test_drivers/vivid/vivid-ctrls.h similarity index 100% rename from drivers/media/platform/vivid/vivid-ctrls.h rename to drivers/media/test_drivers/vivid/vivid-ctrls.h diff --git a/drivers/media/platform/vivid/vivid-kthread-cap.c b/drivers/media/test_drivers/vivid/vivid-kthread-cap.c similarity index 100% rename from drivers/media/platform/vivid/vivid-kthread-cap.c rename to drivers/media/test_drivers/vivid/vivid-kthread-cap.c diff --git a/drivers/media/platform/vivid/vivid-kthread-cap.h b/drivers/media/test_drivers/vivid/vivid-kthread-cap.h similarity index 100% rename from drivers/media/platform/vivid/vivid-kthread-cap.h rename to drivers/media/test_drivers/vivid/vivid-kthread-cap.h diff --git a/drivers/media/platform/vivid/vivid-kthread-out.c b/drivers/media/test_drivers/vivid/vivid-kthread-out.c similarity index 100% rename from drivers/media/platform/vivid/vivid-kthread-out.c rename to drivers/media/test_drivers/vivid/vivid-kthread-out.c diff --git a/drivers/media/platform/vivid/vivid-kthread-out.h b/drivers/media/test_drivers/vivid/vivid-kthread-out.h similarity index 100% rename from drivers/media/platform/vivid/vivid-kthread-out.h rename to drivers/media/test_drivers/vivid/vivid-kthread-out.h diff --git a/drivers/media/platform/vivid/vivid-kthread-touch.c b/drivers/media/test_drivers/vivid/vivid-kthread-touch.c similarity index 100% rename from drivers/media/platform/vivid/vivid-kthread-touch.c rename to drivers/media/test_drivers/vivid/vivid-kthread-touch.c diff --git a/drivers/media/platform/vivid/vivid-kthread-touch.h b/drivers/media/test_drivers/vivid/vivid-kthread-touch.h similarity index 100% rename from drivers/media/platform/vivid/vivid-kthread-touch.h rename to drivers/media/test_drivers/vivid/vivid-kthread-touch.h diff --git a/drivers/media/platform/vivid/vivid-meta-cap.c b/drivers/media/test_drivers/vivid/vivid-meta-cap.c similarity index 100% rename from drivers/media/platform/vivid/vivid-meta-cap.c rename to drivers/media/test_drivers/vivid/vivid-meta-cap.c diff --git a/drivers/media/platform/vivid/vivid-meta-cap.h b/drivers/media/test_drivers/vivid/vivid-meta-cap.h similarity index 100% rename from drivers/media/platform/vivid/vivid-meta-cap.h rename to drivers/media/test_drivers/vivid/vivid-meta-cap.h diff --git a/drivers/media/platform/vivid/vivid-meta-out.c b/drivers/media/test_drivers/vivid/vivid-meta-out.c similarity index 100% rename from drivers/media/platform/vivid/vivid-meta-out.c rename to drivers/media/test_drivers/vivid/vivid-meta-out.c diff --git a/drivers/media/platform/vivid/vivid-meta-out.h b/drivers/media/test_drivers/vivid/vivid-meta-out.h similarity index 100% rename from drivers/media/platform/vivid/vivid-meta-out.h rename to drivers/media/test_drivers/vivid/vivid-meta-out.h diff --git a/drivers/media/platform/vivid/vivid-osd.c b/drivers/media/test_drivers/vivid/vivid-osd.c similarity index 100% rename from drivers/media/platform/vivid/vivid-osd.c rename to drivers/media/test_drivers/vivid/vivid-osd.c diff --git a/drivers/media/platform/vivid/vivid-osd.h b/drivers/media/test_drivers/vivid/vivid-osd.h similarity index 100% rename from drivers/media/platform/vivid/vivid-osd.h rename to drivers/media/test_drivers/vivid/vivid-osd.h diff --git a/drivers/media/platform/vivid/vivid-radio-common.c b/drivers/media/test_drivers/vivid/vivid-radio-common.c similarity index 100% rename from drivers/media/platform/vivid/vivid-radio-common.c rename to drivers/media/test_drivers/vivid/vivid-radio-common.c diff --git a/drivers/media/platform/vivid/vivid-radio-common.h b/drivers/media/test_drivers/vivid/vivid-radio-common.h similarity index 100% rename from drivers/media/platform/vivid/vivid-radio-common.h rename to drivers/media/test_drivers/vivid/vivid-radio-common.h diff --git a/drivers/media/platform/vivid/vivid-radio-rx.c b/drivers/media/test_drivers/vivid/vivid-radio-rx.c similarity index 100% rename from drivers/media/platform/vivid/vivid-radio-rx.c rename to drivers/media/test_drivers/vivid/vivid-radio-rx.c diff --git a/drivers/media/platform/vivid/vivid-radio-rx.h b/drivers/media/test_drivers/vivid/vivid-radio-rx.h similarity index 100% rename from drivers/media/platform/vivid/vivid-radio-rx.h rename to drivers/media/test_drivers/vivid/vivid-radio-rx.h diff --git a/drivers/media/platform/vivid/vivid-radio-tx.c b/drivers/media/test_drivers/vivid/vivid-radio-tx.c similarity index 100% rename from drivers/media/platform/vivid/vivid-radio-tx.c rename to drivers/media/test_drivers/vivid/vivid-radio-tx.c diff --git a/drivers/media/platform/vivid/vivid-radio-tx.h b/drivers/media/test_drivers/vivid/vivid-radio-tx.h similarity index 100% rename from drivers/media/platform/vivid/vivid-radio-tx.h rename to drivers/media/test_drivers/vivid/vivid-radio-tx.h diff --git a/drivers/media/platform/vivid/vivid-rds-gen.c b/drivers/media/test_drivers/vivid/vivid-rds-gen.c similarity index 100% rename from drivers/media/platform/vivid/vivid-rds-gen.c rename to drivers/media/test_drivers/vivid/vivid-rds-gen.c diff --git a/drivers/media/platform/vivid/vivid-rds-gen.h b/drivers/media/test_drivers/vivid/vivid-rds-gen.h similarity index 100% rename from drivers/media/platform/vivid/vivid-rds-gen.h rename to drivers/media/test_drivers/vivid/vivid-rds-gen.h diff --git a/drivers/media/platform/vivid/vivid-sdr-cap.c b/drivers/media/test_drivers/vivid/vivid-sdr-cap.c similarity index 100% rename from drivers/media/platform/vivid/vivid-sdr-cap.c rename to drivers/media/test_drivers/vivid/vivid-sdr-cap.c diff --git a/drivers/media/platform/vivid/vivid-sdr-cap.h b/drivers/media/test_drivers/vivid/vivid-sdr-cap.h similarity index 100% rename from drivers/media/platform/vivid/vivid-sdr-cap.h rename to drivers/media/test_drivers/vivid/vivid-sdr-cap.h diff --git a/drivers/media/platform/vivid/vivid-touch-cap.c b/drivers/media/test_drivers/vivid/vivid-touch-cap.c similarity index 100% rename from drivers/media/platform/vivid/vivid-touch-cap.c rename to drivers/media/test_drivers/vivid/vivid-touch-cap.c diff --git a/drivers/media/platform/vivid/vivid-touch-cap.h b/drivers/media/test_drivers/vivid/vivid-touch-cap.h similarity index 100% rename from drivers/media/platform/vivid/vivid-touch-cap.h rename to drivers/media/test_drivers/vivid/vivid-touch-cap.h diff --git a/drivers/media/platform/vivid/vivid-vbi-cap.c b/drivers/media/test_drivers/vivid/vivid-vbi-cap.c similarity index 100% rename from drivers/media/platform/vivid/vivid-vbi-cap.c rename to drivers/media/test_drivers/vivid/vivid-vbi-cap.c diff --git a/drivers/media/platform/vivid/vivid-vbi-cap.h b/drivers/media/test_drivers/vivid/vivid-vbi-cap.h similarity index 100% rename from drivers/media/platform/vivid/vivid-vbi-cap.h rename to drivers/media/test_drivers/vivid/vivid-vbi-cap.h diff --git a/drivers/media/platform/vivid/vivid-vbi-gen.c b/drivers/media/test_drivers/vivid/vivid-vbi-gen.c similarity index 100% rename from drivers/media/platform/vivid/vivid-vbi-gen.c rename to drivers/media/test_drivers/vivid/vivid-vbi-gen.c diff --git a/drivers/media/platform/vivid/vivid-vbi-gen.h b/drivers/media/test_drivers/vivid/vivid-vbi-gen.h similarity index 100% rename from drivers/media/platform/vivid/vivid-vbi-gen.h rename to drivers/media/test_drivers/vivid/vivid-vbi-gen.h diff --git a/drivers/media/platform/vivid/vivid-vbi-out.c b/drivers/media/test_drivers/vivid/vivid-vbi-out.c similarity index 100% rename from drivers/media/platform/vivid/vivid-vbi-out.c rename to drivers/media/test_drivers/vivid/vivid-vbi-out.c diff --git a/drivers/media/platform/vivid/vivid-vbi-out.h b/drivers/media/test_drivers/vivid/vivid-vbi-out.h similarity index 100% rename from drivers/media/platform/vivid/vivid-vbi-out.h rename to drivers/media/test_drivers/vivid/vivid-vbi-out.h diff --git a/drivers/media/platform/vivid/vivid-vid-cap.c b/drivers/media/test_drivers/vivid/vivid-vid-cap.c similarity index 100% rename from drivers/media/platform/vivid/vivid-vid-cap.c rename to drivers/media/test_drivers/vivid/vivid-vid-cap.c diff --git a/drivers/media/platform/vivid/vivid-vid-cap.h b/drivers/media/test_drivers/vivid/vivid-vid-cap.h similarity index 100% rename from drivers/media/platform/vivid/vivid-vid-cap.h rename to drivers/media/test_drivers/vivid/vivid-vid-cap.h diff --git a/drivers/media/platform/vivid/vivid-vid-common.c b/drivers/media/test_drivers/vivid/vivid-vid-common.c similarity index 100% rename from drivers/media/platform/vivid/vivid-vid-common.c rename to drivers/media/test_drivers/vivid/vivid-vid-common.c diff --git a/drivers/media/platform/vivid/vivid-vid-common.h b/drivers/media/test_drivers/vivid/vivid-vid-common.h similarity index 100% rename from drivers/media/platform/vivid/vivid-vid-common.h rename to drivers/media/test_drivers/vivid/vivid-vid-common.h diff --git a/drivers/media/platform/vivid/vivid-vid-out.c b/drivers/media/test_drivers/vivid/vivid-vid-out.c similarity index 100% rename from drivers/media/platform/vivid/vivid-vid-out.c rename to drivers/media/test_drivers/vivid/vivid-vid-out.c diff --git a/drivers/media/platform/vivid/vivid-vid-out.h b/drivers/media/test_drivers/vivid/vivid-vid-out.h similarity index 100% rename from drivers/media/platform/vivid/vivid-vid-out.h rename to drivers/media/test_drivers/vivid/vivid-vid-out.h -- GitLab From a41034df538968e726c6aad3e5d8b99799d2d0cd Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 13:43:23 +0100 Subject: [PATCH 007/503] media: Kconfig: move comment to siano include Showing this comment without showing the Siano mmc option is very weird! Place the option together, and make it visible only when showing Siano configuration. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/mmc/Kconfig | 1 - drivers/media/mmc/siano/Kconfig | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/mmc/Kconfig b/drivers/media/mmc/Kconfig index de0528c6994a4..75aa6de08d539 100644 --- a/drivers/media/mmc/Kconfig +++ b/drivers/media/mmc/Kconfig @@ -1,3 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -comment "Supported MMC/SDIO adapters" source "drivers/media/mmc/siano/Kconfig" diff --git a/drivers/media/mmc/siano/Kconfig b/drivers/media/mmc/siano/Kconfig index 1919f6fea8b13..570696019a9ee 100644 --- a/drivers/media/mmc/siano/Kconfig +++ b/drivers/media/mmc/siano/Kconfig @@ -2,6 +2,8 @@ # # Siano Mobile Silicon Digital TV device configuration # +comment "MMC/SDIO DVB adapters" + depends on DVB_CORE && HAS_DMA && MMC config SMS_SDIO_DRV tristate "Siano SMS1xxx based MDTV via SDIO interface" -- GitLab From 3bb112016616ca01f6ee06ee2bf77d8eec4afeb1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 13:53:23 +0100 Subject: [PATCH 008/503] media: Kconfig: move drivers-specific TTPCI_EEPROM Kconfig var This option is used only by av7110 and by an USB driver. As the av7110 is the first DVB hardware, hardly found those days, let's opt to place it at usb/Kconfig, as the driver with needs it might have a longer lifetime. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 5 ----- drivers/media/usb/Kconfig | 6 ++++++ 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index b35c980dcf56f..f37c0c26fa655 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -178,11 +178,6 @@ config DVB_NET You may want to disable the network support on embedded devices. If unsure say Y. -# This Kconfig option is used by both PCI and USB drivers -config TTPCI_EEPROM - tristate - depends on I2C - source "drivers/media/dvb-core/Kconfig" comment "Media drivers" diff --git a/drivers/media/usb/Kconfig b/drivers/media/usb/Kconfig index e678d3d114679..bf08393e38d16 100644 --- a/drivers/media/usb/Kconfig +++ b/drivers/media/usb/Kconfig @@ -1,4 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only + +# This Kconfig option is also used by the legacy av7110 driver +config TTPCI_EEPROM + tristate + depends on I2C + if USB && MEDIA_SUPPORT menuconfig MEDIA_USB_SUPPORT -- GitLab From 6a79117187b384e837310d85a824fe0b6381e057 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 14:06:08 +0100 Subject: [PATCH 009/503] media: Kconfig: mode firewire comment to firewire/Kconfig This comment should only be visible if the DVB_FIREDTV config will show. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 2 -- drivers/media/firewire/Kconfig | 5 ++++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index f37c0c26fa655..dc0cc42d48add 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -192,8 +192,6 @@ source "drivers/media/test_drivers/Kconfig" source "drivers/media/mmc/Kconfig" endif -comment "Supported FireWire (IEEE 1394) Adapters" - depends on DVB_CORE && FIREWIRE source "drivers/media/firewire/Kconfig" # Common driver options diff --git a/drivers/media/firewire/Kconfig b/drivers/media/firewire/Kconfig index e7837da5905ba..0c1f326f581fe 100644 --- a/drivers/media/firewire/Kconfig +++ b/drivers/media/firewire/Kconfig @@ -1,7 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only +if DVB_CORE && FIREWIRE +comment "FireWire (IEEE 1394) Adapters" + config DVB_FIREDTV tristate "FireDTV and FloppyDTV" - depends on DVB_CORE && FIREWIRE help Support for DVB receivers from Digital Everywhere which are connected via IEEE 1394 (FireWire). @@ -18,3 +20,4 @@ config DVB_FIREDTV_INPUT def_bool INPUT = y || (INPUT = m && DVB_FIREDTV = m) endif # DVB_FIREDTV +endif # DVB_CORE && FIREWIRE -- GitLab From 3a137f81f76850b3cc024360147b1c3fb4b12c03 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Mar 2020 15:06:02 +0100 Subject: [PATCH 010/503] media: ddbridge: copy the dvb_dummy_fe driver to ddbridge As we'll be transforming the dvb-dummy-fe driver soon into a virtual driver, let's first copy the existing one to ddbridge as-is, as it is needed there. Signed-off-by: Mauro Carvalho Chehab --- .../media/pci/ddbridge/ddbridge-dummy-fe.c | 286 ++++++++++++++++++ .../media/pci/ddbridge/ddbridge-dummy-fe.h | 36 +++ 2 files changed, 322 insertions(+) create mode 100644 drivers/media/pci/ddbridge/ddbridge-dummy-fe.c create mode 100644 drivers/media/pci/ddbridge/ddbridge-dummy-fe.h diff --git a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c new file mode 100644 index 0000000000000..9ff1ebaa5e044 --- /dev/null +++ b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c @@ -0,0 +1,286 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Dummy Frontend + * + * Written by Emard + */ + +#include +#include +#include +#include + +#include +#include "dvb_dummy_fe.h" + + +struct dvb_dummy_fe_state { + struct dvb_frontend frontend; +}; + + +static int dvb_dummy_fe_read_status(struct dvb_frontend *fe, + enum fe_status *status) +{ + *status = FE_HAS_SIGNAL + | FE_HAS_CARRIER + | FE_HAS_VITERBI + | FE_HAS_SYNC + | FE_HAS_LOCK; + + return 0; +} + +static int dvb_dummy_fe_read_ber(struct dvb_frontend *fe, u32 *ber) +{ + *ber = 0; + return 0; +} + +static int dvb_dummy_fe_read_signal_strength(struct dvb_frontend *fe, + u16 *strength) +{ + *strength = 0; + return 0; +} + +static int dvb_dummy_fe_read_snr(struct dvb_frontend *fe, u16 *snr) +{ + *snr = 0; + return 0; +} + +static int dvb_dummy_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) +{ + *ucblocks = 0; + return 0; +} + +/* + * Should only be implemented if it actually reads something from the hardware. + * Also, it should check for the locks, in order to avoid report wrong data + * to userspace. + */ +static int dvb_dummy_fe_get_frontend(struct dvb_frontend *fe, + struct dtv_frontend_properties *p) +{ + return 0; +} + +static int dvb_dummy_fe_set_frontend(struct dvb_frontend *fe) +{ + if (fe->ops.tuner_ops.set_params) { + fe->ops.tuner_ops.set_params(fe); + if (fe->ops.i2c_gate_ctrl) + fe->ops.i2c_gate_ctrl(fe, 0); + } + + return 0; +} + +static int dvb_dummy_fe_sleep(struct dvb_frontend *fe) +{ + return 0; +} + +static int dvb_dummy_fe_init(struct dvb_frontend *fe) +{ + return 0; +} + +static int dvb_dummy_fe_set_tone(struct dvb_frontend *fe, + enum fe_sec_tone_mode tone) +{ + return 0; +} + +static int dvb_dummy_fe_set_voltage(struct dvb_frontend *fe, + enum fe_sec_voltage voltage) +{ + return 0; +} + +static void dvb_dummy_fe_release(struct dvb_frontend *fe) +{ + struct dvb_dummy_fe_state *state = fe->demodulator_priv; + + kfree(state); +} + +static const struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops; + +struct dvb_frontend *dvb_dummy_fe_ofdm_attach(void) +{ + struct dvb_dummy_fe_state *state = NULL; + + /* allocate memory for the internal state */ + state = kzalloc(sizeof(struct dvb_dummy_fe_state), GFP_KERNEL); + if (!state) + return NULL; + + /* create dvb_frontend */ + memcpy(&state->frontend.ops, + &dvb_dummy_fe_ofdm_ops, + sizeof(struct dvb_frontend_ops)); + + state->frontend.demodulator_priv = state; + return &state->frontend; +} +EXPORT_SYMBOL(dvb_dummy_fe_ofdm_attach); + +static const struct dvb_frontend_ops dvb_dummy_fe_qpsk_ops; + +struct dvb_frontend *dvb_dummy_fe_qpsk_attach(void) +{ + struct dvb_dummy_fe_state *state = NULL; + + /* allocate memory for the internal state */ + state = kzalloc(sizeof(struct dvb_dummy_fe_state), GFP_KERNEL); + if (!state) + return NULL; + + /* create dvb_frontend */ + memcpy(&state->frontend.ops, + &dvb_dummy_fe_qpsk_ops, + sizeof(struct dvb_frontend_ops)); + + state->frontend.demodulator_priv = state; + return &state->frontend; +} +EXPORT_SYMBOL(dvb_dummy_fe_qpsk_attach); + +static const struct dvb_frontend_ops dvb_dummy_fe_qam_ops; + +struct dvb_frontend *dvb_dummy_fe_qam_attach(void) +{ + struct dvb_dummy_fe_state *state = NULL; + + /* allocate memory for the internal state */ + state = kzalloc(sizeof(struct dvb_dummy_fe_state), GFP_KERNEL); + if (!state) + return NULL; + + /* create dvb_frontend */ + memcpy(&state->frontend.ops, + &dvb_dummy_fe_qam_ops, + sizeof(struct dvb_frontend_ops)); + + state->frontend.demodulator_priv = state; + return &state->frontend; +} +EXPORT_SYMBOL(dvb_dummy_fe_qam_attach); + +static const struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops = { + .delsys = { SYS_DVBT }, + .info = { + .name = "Dummy DVB-T", + .frequency_min_hz = 0, + .frequency_max_hz = 863250 * kHz, + .frequency_stepsize_hz = 62500, + .caps = FE_CAN_FEC_1_2 | + FE_CAN_FEC_2_3 | + FE_CAN_FEC_3_4 | + FE_CAN_FEC_4_5 | + FE_CAN_FEC_5_6 | + FE_CAN_FEC_6_7 | + FE_CAN_FEC_7_8 | + FE_CAN_FEC_8_9 | + FE_CAN_FEC_AUTO | + FE_CAN_QAM_16 | + FE_CAN_QAM_64 | + FE_CAN_QAM_AUTO | + FE_CAN_TRANSMISSION_MODE_AUTO | + FE_CAN_GUARD_INTERVAL_AUTO | + FE_CAN_HIERARCHY_AUTO, + }, + + .release = dvb_dummy_fe_release, + + .init = dvb_dummy_fe_init, + .sleep = dvb_dummy_fe_sleep, + + .set_frontend = dvb_dummy_fe_set_frontend, + .get_frontend = dvb_dummy_fe_get_frontend, + + .read_status = dvb_dummy_fe_read_status, + .read_ber = dvb_dummy_fe_read_ber, + .read_signal_strength = dvb_dummy_fe_read_signal_strength, + .read_snr = dvb_dummy_fe_read_snr, + .read_ucblocks = dvb_dummy_fe_read_ucblocks, +}; + +static const struct dvb_frontend_ops dvb_dummy_fe_qam_ops = { + .delsys = { SYS_DVBC_ANNEX_A }, + .info = { + .name = "Dummy DVB-C", + .frequency_min_hz = 51 * MHz, + .frequency_max_hz = 858 * MHz, + .frequency_stepsize_hz = 62500, + /* symbol_rate_min: SACLK/64 == (XIN/2)/64 */ + .symbol_rate_min = (57840000 / 2) / 64, + .symbol_rate_max = (57840000 / 2) / 4, /* SACLK/4 */ + .caps = FE_CAN_QAM_16 | + FE_CAN_QAM_32 | + FE_CAN_QAM_64 | + FE_CAN_QAM_128 | + FE_CAN_QAM_256 | + FE_CAN_FEC_AUTO | + FE_CAN_INVERSION_AUTO + }, + + .release = dvb_dummy_fe_release, + + .init = dvb_dummy_fe_init, + .sleep = dvb_dummy_fe_sleep, + + .set_frontend = dvb_dummy_fe_set_frontend, + .get_frontend = dvb_dummy_fe_get_frontend, + + .read_status = dvb_dummy_fe_read_status, + .read_ber = dvb_dummy_fe_read_ber, + .read_signal_strength = dvb_dummy_fe_read_signal_strength, + .read_snr = dvb_dummy_fe_read_snr, + .read_ucblocks = dvb_dummy_fe_read_ucblocks, +}; + +static const struct dvb_frontend_ops dvb_dummy_fe_qpsk_ops = { + .delsys = { SYS_DVBS }, + .info = { + .name = "Dummy DVB-S", + .frequency_min_hz = 950 * MHz, + .frequency_max_hz = 2150 * MHz, + .frequency_stepsize_hz = 250 * kHz, + .frequency_tolerance_hz = 29500 * kHz, + .symbol_rate_min = 1000000, + .symbol_rate_max = 45000000, + .caps = FE_CAN_INVERSION_AUTO | + FE_CAN_FEC_1_2 | + FE_CAN_FEC_2_3 | + FE_CAN_FEC_3_4 | + FE_CAN_FEC_5_6 | + FE_CAN_FEC_7_8 | + FE_CAN_FEC_AUTO | + FE_CAN_QPSK + }, + + .release = dvb_dummy_fe_release, + + .init = dvb_dummy_fe_init, + .sleep = dvb_dummy_fe_sleep, + + .set_frontend = dvb_dummy_fe_set_frontend, + .get_frontend = dvb_dummy_fe_get_frontend, + + .read_status = dvb_dummy_fe_read_status, + .read_ber = dvb_dummy_fe_read_ber, + .read_signal_strength = dvb_dummy_fe_read_signal_strength, + .read_snr = dvb_dummy_fe_read_snr, + .read_ucblocks = dvb_dummy_fe_read_ucblocks, + + .set_voltage = dvb_dummy_fe_set_voltage, + .set_tone = dvb_dummy_fe_set_tone, +}; + +MODULE_DESCRIPTION("DVB DUMMY Frontend"); +MODULE_AUTHOR("Emard"); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h new file mode 100644 index 0000000000000..463abf5ebd56f --- /dev/null +++ b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Driver for Dummy Frontend + * + * Written by Emard + */ + +#ifndef DVB_DUMMY_FE_H +#define DVB_DUMMY_FE_H + +#include +#include + +#if IS_REACHABLE(CONFIG_DVB_DUMMY_FE) +struct dvb_frontend *dvb_dummy_fe_ofdm_attach(void); +struct dvb_frontend *dvb_dummy_fe_qpsk_attach(void); +struct dvb_frontend *dvb_dummy_fe_qam_attach(void); +#else +static inline struct dvb_frontend *dvb_dummy_fe_ofdm_attach(void) +{ + pr_warn("%s: driver disabled by Kconfig\n", __func__); + return NULL; +} +static inline struct dvb_frontend *dvb_dummy_fe_qpsk_attach(void) +{ + pr_warn("%s: driver disabled by Kconfig\n", __func__); + return NULL; +} +static inline struct dvb_frontend *dvb_dummy_fe_qam_attach(void) +{ + pr_warn("%s: driver disabled by Kconfig\n", __func__); + return NULL; +} +#endif /* CONFIG_DVB_DUMMY_FE */ + +#endif // DVB_DUMMY_FE_H -- GitLab From 94ab24a2c886620fd3d0c0241d98b6c448cc8b38 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Mar 2020 15:08:59 +0100 Subject: [PATCH 011/503] media: ddbridge-dummy_fe: do some vars and function renames As the name of this driver is now ddbridge-dummy, do some renames internally. No functional changes. Signed-off-by: Mauro Carvalho Chehab --- .../media/pci/ddbridge/ddbridge-dummy-fe.c | 144 +++++++++--------- .../media/pci/ddbridge/ddbridge-dummy-fe.h | 22 +-- 2 files changed, 83 insertions(+), 83 deletions(-) diff --git a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c index 9ff1ebaa5e044..ebf4d9c30a552 100644 --- a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c +++ b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c @@ -11,15 +11,15 @@ #include #include -#include "dvb_dummy_fe.h" +#include "ddbridge-dummy-fe.h" -struct dvb_dummy_fe_state { +struct ddbridge_dummy_fe_state { struct dvb_frontend frontend; }; -static int dvb_dummy_fe_read_status(struct dvb_frontend *fe, +static int ddbridge_dummy_fe_read_status(struct dvb_frontend *fe, enum fe_status *status) { *status = FE_HAS_SIGNAL @@ -31,26 +31,26 @@ static int dvb_dummy_fe_read_status(struct dvb_frontend *fe, return 0; } -static int dvb_dummy_fe_read_ber(struct dvb_frontend *fe, u32 *ber) +static int ddbridge_dummy_fe_read_ber(struct dvb_frontend *fe, u32 *ber) { *ber = 0; return 0; } -static int dvb_dummy_fe_read_signal_strength(struct dvb_frontend *fe, +static int ddbridge_dummy_fe_read_signal_strength(struct dvb_frontend *fe, u16 *strength) { *strength = 0; return 0; } -static int dvb_dummy_fe_read_snr(struct dvb_frontend *fe, u16 *snr) +static int ddbridge_dummy_fe_read_snr(struct dvb_frontend *fe, u16 *snr) { *snr = 0; return 0; } -static int dvb_dummy_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) +static int ddbridge_dummy_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) { *ucblocks = 0; return 0; @@ -61,13 +61,13 @@ static int dvb_dummy_fe_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) * Also, it should check for the locks, in order to avoid report wrong data * to userspace. */ -static int dvb_dummy_fe_get_frontend(struct dvb_frontend *fe, +static int ddbridge_dummy_fe_get_frontend(struct dvb_frontend *fe, struct dtv_frontend_properties *p) { return 0; } -static int dvb_dummy_fe_set_frontend(struct dvb_frontend *fe) +static int ddbridge_dummy_fe_set_frontend(struct dvb_frontend *fe) { if (fe->ops.tuner_ops.set_params) { fe->ops.tuner_ops.set_params(fe); @@ -78,102 +78,102 @@ static int dvb_dummy_fe_set_frontend(struct dvb_frontend *fe) return 0; } -static int dvb_dummy_fe_sleep(struct dvb_frontend *fe) +static int ddbridge_dummy_fe_sleep(struct dvb_frontend *fe) { return 0; } -static int dvb_dummy_fe_init(struct dvb_frontend *fe) +static int ddbridge_dummy_fe_init(struct dvb_frontend *fe) { return 0; } -static int dvb_dummy_fe_set_tone(struct dvb_frontend *fe, +static int ddbridge_dummy_fe_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone) { return 0; } -static int dvb_dummy_fe_set_voltage(struct dvb_frontend *fe, +static int ddbridge_dummy_fe_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage) { return 0; } -static void dvb_dummy_fe_release(struct dvb_frontend *fe) +static void ddbridge_dummy_fe_release(struct dvb_frontend *fe) { - struct dvb_dummy_fe_state *state = fe->demodulator_priv; + struct ddbridge_dummy_fe_state *state = fe->demodulator_priv; kfree(state); } -static const struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops; +static const struct dvb_frontend_ops ddbridge_dummy_fe_ofdm_ops; -struct dvb_frontend *dvb_dummy_fe_ofdm_attach(void) +struct dvb_frontend *ddbridge_dummy_fe_ofdm_attach(void) { - struct dvb_dummy_fe_state *state = NULL; + struct ddbridge_dummy_fe_state *state = NULL; /* allocate memory for the internal state */ - state = kzalloc(sizeof(struct dvb_dummy_fe_state), GFP_KERNEL); + state = kzalloc(sizeof(struct ddbridge_dummy_fe_state), GFP_KERNEL); if (!state) return NULL; /* create dvb_frontend */ memcpy(&state->frontend.ops, - &dvb_dummy_fe_ofdm_ops, + &ddbridge_dummy_fe_ofdm_ops, sizeof(struct dvb_frontend_ops)); state->frontend.demodulator_priv = state; return &state->frontend; } -EXPORT_SYMBOL(dvb_dummy_fe_ofdm_attach); +EXPORT_SYMBOL(ddbridge_dummy_fe_ofdm_attach); -static const struct dvb_frontend_ops dvb_dummy_fe_qpsk_ops; +static const struct dvb_frontend_ops ddbridge_dummy_fe_qpsk_ops; -struct dvb_frontend *dvb_dummy_fe_qpsk_attach(void) +struct dvb_frontend *ddbridge_dummy_fe_qpsk_attach(void) { - struct dvb_dummy_fe_state *state = NULL; + struct ddbridge_dummy_fe_state *state = NULL; /* allocate memory for the internal state */ - state = kzalloc(sizeof(struct dvb_dummy_fe_state), GFP_KERNEL); + state = kzalloc(sizeof(struct ddbridge_dummy_fe_state), GFP_KERNEL); if (!state) return NULL; /* create dvb_frontend */ memcpy(&state->frontend.ops, - &dvb_dummy_fe_qpsk_ops, + &ddbridge_dummy_fe_qpsk_ops, sizeof(struct dvb_frontend_ops)); state->frontend.demodulator_priv = state; return &state->frontend; } -EXPORT_SYMBOL(dvb_dummy_fe_qpsk_attach); +EXPORT_SYMBOL(ddbridge_dummy_fe_qpsk_attach); -static const struct dvb_frontend_ops dvb_dummy_fe_qam_ops; +static const struct dvb_frontend_ops ddbridge_dummy_fe_qam_ops; -struct dvb_frontend *dvb_dummy_fe_qam_attach(void) +struct dvb_frontend *ddbridge_dummy_fe_qam_attach(void) { - struct dvb_dummy_fe_state *state = NULL; + struct ddbridge_dummy_fe_state *state = NULL; /* allocate memory for the internal state */ - state = kzalloc(sizeof(struct dvb_dummy_fe_state), GFP_KERNEL); + state = kzalloc(sizeof(struct ddbridge_dummy_fe_state), GFP_KERNEL); if (!state) return NULL; /* create dvb_frontend */ memcpy(&state->frontend.ops, - &dvb_dummy_fe_qam_ops, + &ddbridge_dummy_fe_qam_ops, sizeof(struct dvb_frontend_ops)); state->frontend.demodulator_priv = state; return &state->frontend; } -EXPORT_SYMBOL(dvb_dummy_fe_qam_attach); +EXPORT_SYMBOL(ddbridge_dummy_fe_qam_attach); -static const struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops = { +static const struct dvb_frontend_ops ddbridge_dummy_fe_ofdm_ops = { .delsys = { SYS_DVBT }, .info = { - .name = "Dummy DVB-T", + .name = "ddbridge dummy DVB-T", .frequency_min_hz = 0, .frequency_max_hz = 863250 * kHz, .frequency_stepsize_hz = 62500, @@ -194,25 +194,25 @@ static const struct dvb_frontend_ops dvb_dummy_fe_ofdm_ops = { FE_CAN_HIERARCHY_AUTO, }, - .release = dvb_dummy_fe_release, + .release = ddbridge_dummy_fe_release, - .init = dvb_dummy_fe_init, - .sleep = dvb_dummy_fe_sleep, + .init = ddbridge_dummy_fe_init, + .sleep = ddbridge_dummy_fe_sleep, - .set_frontend = dvb_dummy_fe_set_frontend, - .get_frontend = dvb_dummy_fe_get_frontend, + .set_frontend = ddbridge_dummy_fe_set_frontend, + .get_frontend = ddbridge_dummy_fe_get_frontend, - .read_status = dvb_dummy_fe_read_status, - .read_ber = dvb_dummy_fe_read_ber, - .read_signal_strength = dvb_dummy_fe_read_signal_strength, - .read_snr = dvb_dummy_fe_read_snr, - .read_ucblocks = dvb_dummy_fe_read_ucblocks, + .read_status = ddbridge_dummy_fe_read_status, + .read_ber = ddbridge_dummy_fe_read_ber, + .read_signal_strength = ddbridge_dummy_fe_read_signal_strength, + .read_snr = ddbridge_dummy_fe_read_snr, + .read_ucblocks = ddbridge_dummy_fe_read_ucblocks, }; -static const struct dvb_frontend_ops dvb_dummy_fe_qam_ops = { +static const struct dvb_frontend_ops ddbridge_dummy_fe_qam_ops = { .delsys = { SYS_DVBC_ANNEX_A }, .info = { - .name = "Dummy DVB-C", + .name = "ddbridge dummy DVB-C", .frequency_min_hz = 51 * MHz, .frequency_max_hz = 858 * MHz, .frequency_stepsize_hz = 62500, @@ -228,25 +228,25 @@ static const struct dvb_frontend_ops dvb_dummy_fe_qam_ops = { FE_CAN_INVERSION_AUTO }, - .release = dvb_dummy_fe_release, + .release = ddbridge_dummy_fe_release, - .init = dvb_dummy_fe_init, - .sleep = dvb_dummy_fe_sleep, + .init = ddbridge_dummy_fe_init, + .sleep = ddbridge_dummy_fe_sleep, - .set_frontend = dvb_dummy_fe_set_frontend, - .get_frontend = dvb_dummy_fe_get_frontend, + .set_frontend = ddbridge_dummy_fe_set_frontend, + .get_frontend = ddbridge_dummy_fe_get_frontend, - .read_status = dvb_dummy_fe_read_status, - .read_ber = dvb_dummy_fe_read_ber, - .read_signal_strength = dvb_dummy_fe_read_signal_strength, - .read_snr = dvb_dummy_fe_read_snr, - .read_ucblocks = dvb_dummy_fe_read_ucblocks, + .read_status = ddbridge_dummy_fe_read_status, + .read_ber = ddbridge_dummy_fe_read_ber, + .read_signal_strength = ddbridge_dummy_fe_read_signal_strength, + .read_snr = ddbridge_dummy_fe_read_snr, + .read_ucblocks = ddbridge_dummy_fe_read_ucblocks, }; -static const struct dvb_frontend_ops dvb_dummy_fe_qpsk_ops = { +static const struct dvb_frontend_ops ddbridge_dummy_fe_qpsk_ops = { .delsys = { SYS_DVBS }, .info = { - .name = "Dummy DVB-S", + .name = "ddbridge dummy DVB-S", .frequency_min_hz = 950 * MHz, .frequency_max_hz = 2150 * MHz, .frequency_stepsize_hz = 250 * kHz, @@ -263,24 +263,24 @@ static const struct dvb_frontend_ops dvb_dummy_fe_qpsk_ops = { FE_CAN_QPSK }, - .release = dvb_dummy_fe_release, + .release = ddbridge_dummy_fe_release, - .init = dvb_dummy_fe_init, - .sleep = dvb_dummy_fe_sleep, + .init = ddbridge_dummy_fe_init, + .sleep = ddbridge_dummy_fe_sleep, - .set_frontend = dvb_dummy_fe_set_frontend, - .get_frontend = dvb_dummy_fe_get_frontend, + .set_frontend = ddbridge_dummy_fe_set_frontend, + .get_frontend = ddbridge_dummy_fe_get_frontend, - .read_status = dvb_dummy_fe_read_status, - .read_ber = dvb_dummy_fe_read_ber, - .read_signal_strength = dvb_dummy_fe_read_signal_strength, - .read_snr = dvb_dummy_fe_read_snr, - .read_ucblocks = dvb_dummy_fe_read_ucblocks, + .read_status = ddbridge_dummy_fe_read_status, + .read_ber = ddbridge_dummy_fe_read_ber, + .read_signal_strength = ddbridge_dummy_fe_read_signal_strength, + .read_snr = ddbridge_dummy_fe_read_snr, + .read_ucblocks = ddbridge_dummy_fe_read_ucblocks, - .set_voltage = dvb_dummy_fe_set_voltage, - .set_tone = dvb_dummy_fe_set_tone, + .set_voltage = ddbridge_dummy_fe_set_voltage, + .set_tone = ddbridge_dummy_fe_set_tone, }; -MODULE_DESCRIPTION("DVB DUMMY Frontend"); +MODULE_DESCRIPTION("ddbridge dummy Frontend"); MODULE_AUTHOR("Emard"); MODULE_LICENSE("GPL"); diff --git a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h index 463abf5ebd56f..811c203539e28 100644 --- a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h +++ b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h @@ -5,32 +5,32 @@ * Written by Emard */ -#ifndef DVB_DUMMY_FE_H -#define DVB_DUMMY_FE_H +#ifndef DDBRIDGE_DUMMY_FE_H +#define DDBRIDGE_DUMMY_FE_H #include #include -#if IS_REACHABLE(CONFIG_DVB_DUMMY_FE) -struct dvb_frontend *dvb_dummy_fe_ofdm_attach(void); -struct dvb_frontend *dvb_dummy_fe_qpsk_attach(void); -struct dvb_frontend *dvb_dummy_fe_qam_attach(void); +#if IS_REACHABLE(CONFIG_DDBRIDGE_DUMMY_FE) +struct dvb_frontend *ddbridge_dummy_fe_ofdm_attach(void); +struct dvb_frontend *ddbridge_dummy_fe_qpsk_attach(void); +struct dvb_frontend *ddbridge_dummy_fe_qam_attach(void); #else -static inline struct dvb_frontend *dvb_dummy_fe_ofdm_attach(void) +static inline struct dvb_frontend *ddbridge_dummy_fe_ofdm_attach(void) { pr_warn("%s: driver disabled by Kconfig\n", __func__); return NULL; } -static inline struct dvb_frontend *dvb_dummy_fe_qpsk_attach(void) +static inline struct dvb_frontend *ddbridge_dummy_fe_qpsk_attach(void) { pr_warn("%s: driver disabled by Kconfig\n", __func__); return NULL; } -static inline struct dvb_frontend *dvb_dummy_fe_qam_attach(void) +static inline struct dvb_frontend *ddbridge_dummy_fe_qam_attach(void) { pr_warn("%s: driver disabled by Kconfig\n", __func__); return NULL; } -#endif /* CONFIG_DVB_DUMMY_FE */ +#endif /* CONFIG_DDBRIDGE_DUMMY_FE */ -#endif // DVB_DUMMY_FE_H +#endif // DDBRIDGE_DUMMY_FE_H -- GitLab From 9a33a27e7fe5b1aebf045829f92fd11562ad0ac7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Mar 2020 15:23:34 +0100 Subject: [PATCH 012/503] media: ddbridge: use the ddbridge's own dummy fe driver Cleanup the ddbridge's dummy driver by removing the parts that aren't needed by ddbridge, adding it to the building system and changing the binding at the driver to use the newer function name. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/ddbridge/Kconfig | 1 - drivers/media/pci/ddbridge/Makefile | 2 +- drivers/media/pci/ddbridge/ddbridge-core.c | 4 +- .../media/pci/ddbridge/ddbridge-dummy-fe.c | 133 ------------------ .../media/pci/ddbridge/ddbridge-dummy-fe.h | 20 --- 5 files changed, 3 insertions(+), 157 deletions(-) diff --git a/drivers/media/pci/ddbridge/Kconfig b/drivers/media/pci/ddbridge/Kconfig index dab34fb85c09c..169efd558e45b 100644 --- a/drivers/media/pci/ddbridge/Kconfig +++ b/drivers/media/pci/ddbridge/Kconfig @@ -15,7 +15,6 @@ config DVB_DDBRIDGE select MEDIA_TUNER_TDA18212 if MEDIA_SUBDRV_AUTOSELECT select DVB_MXL5XX if MEDIA_SUBDRV_AUTOSELECT select DVB_CXD2099 if MEDIA_SUBDRV_AUTOSELECT - select DVB_DUMMY_FE if MEDIA_SUBDRV_AUTOSELECT help Support for cards with the Digital Devices PCI express bridge: - Octopus PCIe Bridge diff --git a/drivers/media/pci/ddbridge/Makefile b/drivers/media/pci/ddbridge/Makefile index 2b77c8d0eb2ec..5e7eab81173b2 100644 --- a/drivers/media/pci/ddbridge/Makefile +++ b/drivers/media/pci/ddbridge/Makefile @@ -7,7 +7,7 @@ ddbridge-objs := ddbridge-main.o ddbridge-core.o ddbridge-ci.o \ ddbridge-hw.o ddbridge-i2c.o ddbridge-max.o ddbridge-mci.o \ ddbridge-sx8.o -obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o +obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o ddbridge-dummy-fe.o ccflags-y += -I $(srctree)/drivers/media/dvb-frontends/ ccflags-y += -I $(srctree)/drivers/media/tuners/ diff --git a/drivers/media/pci/ddbridge/ddbridge-core.c b/drivers/media/pci/ddbridge/ddbridge-core.c index 7a2d19682fe37..7cabb9e9ffe21 100644 --- a/drivers/media/pci/ddbridge/ddbridge-core.c +++ b/drivers/media/pci/ddbridge/ddbridge-core.c @@ -50,7 +50,7 @@ #include "stv6111.h" #include "lnbh25.h" #include "cxd2099.h" -#include "dvb_dummy_fe.h" +#include "ddbridge-dummy-fe.h" /****************************************************************************/ @@ -1265,7 +1265,7 @@ static int demod_attach_dummy(struct ddb_input *input) struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; struct device *dev = input->port->dev->dev; - dvb->fe = dvb_attach(dvb_dummy_fe_qam_attach); + dvb->fe = dvb_attach(ddbridge_dummy_fe_qam_attach); if (!dvb->fe) { dev_err(dev, "QAM dummy attach failed!\n"); return -ENODEV; diff --git a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c index ebf4d9c30a552..6868a0c4fc82a 100644 --- a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c +++ b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.c @@ -13,12 +13,10 @@ #include #include "ddbridge-dummy-fe.h" - struct ddbridge_dummy_fe_state { struct dvb_frontend frontend; }; - static int ddbridge_dummy_fe_read_status(struct dvb_frontend *fe, enum fe_status *status) { @@ -88,18 +86,6 @@ static int ddbridge_dummy_fe_init(struct dvb_frontend *fe) return 0; } -static int ddbridge_dummy_fe_set_tone(struct dvb_frontend *fe, - enum fe_sec_tone_mode tone) -{ - return 0; -} - -static int ddbridge_dummy_fe_set_voltage(struct dvb_frontend *fe, - enum fe_sec_voltage voltage) -{ - return 0; -} - static void ddbridge_dummy_fe_release(struct dvb_frontend *fe) { struct ddbridge_dummy_fe_state *state = fe->demodulator_priv; @@ -107,48 +93,6 @@ static void ddbridge_dummy_fe_release(struct dvb_frontend *fe) kfree(state); } -static const struct dvb_frontend_ops ddbridge_dummy_fe_ofdm_ops; - -struct dvb_frontend *ddbridge_dummy_fe_ofdm_attach(void) -{ - struct ddbridge_dummy_fe_state *state = NULL; - - /* allocate memory for the internal state */ - state = kzalloc(sizeof(struct ddbridge_dummy_fe_state), GFP_KERNEL); - if (!state) - return NULL; - - /* create dvb_frontend */ - memcpy(&state->frontend.ops, - &ddbridge_dummy_fe_ofdm_ops, - sizeof(struct dvb_frontend_ops)); - - state->frontend.demodulator_priv = state; - return &state->frontend; -} -EXPORT_SYMBOL(ddbridge_dummy_fe_ofdm_attach); - -static const struct dvb_frontend_ops ddbridge_dummy_fe_qpsk_ops; - -struct dvb_frontend *ddbridge_dummy_fe_qpsk_attach(void) -{ - struct ddbridge_dummy_fe_state *state = NULL; - - /* allocate memory for the internal state */ - state = kzalloc(sizeof(struct ddbridge_dummy_fe_state), GFP_KERNEL); - if (!state) - return NULL; - - /* create dvb_frontend */ - memcpy(&state->frontend.ops, - &ddbridge_dummy_fe_qpsk_ops, - sizeof(struct dvb_frontend_ops)); - - state->frontend.demodulator_priv = state; - return &state->frontend; -} -EXPORT_SYMBOL(ddbridge_dummy_fe_qpsk_attach); - static const struct dvb_frontend_ops ddbridge_dummy_fe_qam_ops; struct dvb_frontend *ddbridge_dummy_fe_qam_attach(void) @@ -170,45 +114,6 @@ struct dvb_frontend *ddbridge_dummy_fe_qam_attach(void) } EXPORT_SYMBOL(ddbridge_dummy_fe_qam_attach); -static const struct dvb_frontend_ops ddbridge_dummy_fe_ofdm_ops = { - .delsys = { SYS_DVBT }, - .info = { - .name = "ddbridge dummy DVB-T", - .frequency_min_hz = 0, - .frequency_max_hz = 863250 * kHz, - .frequency_stepsize_hz = 62500, - .caps = FE_CAN_FEC_1_2 | - FE_CAN_FEC_2_3 | - FE_CAN_FEC_3_4 | - FE_CAN_FEC_4_5 | - FE_CAN_FEC_5_6 | - FE_CAN_FEC_6_7 | - FE_CAN_FEC_7_8 | - FE_CAN_FEC_8_9 | - FE_CAN_FEC_AUTO | - FE_CAN_QAM_16 | - FE_CAN_QAM_64 | - FE_CAN_QAM_AUTO | - FE_CAN_TRANSMISSION_MODE_AUTO | - FE_CAN_GUARD_INTERVAL_AUTO | - FE_CAN_HIERARCHY_AUTO, - }, - - .release = ddbridge_dummy_fe_release, - - .init = ddbridge_dummy_fe_init, - .sleep = ddbridge_dummy_fe_sleep, - - .set_frontend = ddbridge_dummy_fe_set_frontend, - .get_frontend = ddbridge_dummy_fe_get_frontend, - - .read_status = ddbridge_dummy_fe_read_status, - .read_ber = ddbridge_dummy_fe_read_ber, - .read_signal_strength = ddbridge_dummy_fe_read_signal_strength, - .read_snr = ddbridge_dummy_fe_read_snr, - .read_ucblocks = ddbridge_dummy_fe_read_ucblocks, -}; - static const struct dvb_frontend_ops ddbridge_dummy_fe_qam_ops = { .delsys = { SYS_DVBC_ANNEX_A }, .info = { @@ -243,44 +148,6 @@ static const struct dvb_frontend_ops ddbridge_dummy_fe_qam_ops = { .read_ucblocks = ddbridge_dummy_fe_read_ucblocks, }; -static const struct dvb_frontend_ops ddbridge_dummy_fe_qpsk_ops = { - .delsys = { SYS_DVBS }, - .info = { - .name = "ddbridge dummy DVB-S", - .frequency_min_hz = 950 * MHz, - .frequency_max_hz = 2150 * MHz, - .frequency_stepsize_hz = 250 * kHz, - .frequency_tolerance_hz = 29500 * kHz, - .symbol_rate_min = 1000000, - .symbol_rate_max = 45000000, - .caps = FE_CAN_INVERSION_AUTO | - FE_CAN_FEC_1_2 | - FE_CAN_FEC_2_3 | - FE_CAN_FEC_3_4 | - FE_CAN_FEC_5_6 | - FE_CAN_FEC_7_8 | - FE_CAN_FEC_AUTO | - FE_CAN_QPSK - }, - - .release = ddbridge_dummy_fe_release, - - .init = ddbridge_dummy_fe_init, - .sleep = ddbridge_dummy_fe_sleep, - - .set_frontend = ddbridge_dummy_fe_set_frontend, - .get_frontend = ddbridge_dummy_fe_get_frontend, - - .read_status = ddbridge_dummy_fe_read_status, - .read_ber = ddbridge_dummy_fe_read_ber, - .read_signal_strength = ddbridge_dummy_fe_read_signal_strength, - .read_snr = ddbridge_dummy_fe_read_snr, - .read_ucblocks = ddbridge_dummy_fe_read_ucblocks, - - .set_voltage = ddbridge_dummy_fe_set_voltage, - .set_tone = ddbridge_dummy_fe_set_tone, -}; - MODULE_DESCRIPTION("ddbridge dummy Frontend"); MODULE_AUTHOR("Emard"); MODULE_LICENSE("GPL"); diff --git a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h index 811c203539e28..ddf189c095249 100644 --- a/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h +++ b/drivers/media/pci/ddbridge/ddbridge-dummy-fe.h @@ -11,26 +11,6 @@ #include #include -#if IS_REACHABLE(CONFIG_DDBRIDGE_DUMMY_FE) -struct dvb_frontend *ddbridge_dummy_fe_ofdm_attach(void); -struct dvb_frontend *ddbridge_dummy_fe_qpsk_attach(void); struct dvb_frontend *ddbridge_dummy_fe_qam_attach(void); -#else -static inline struct dvb_frontend *ddbridge_dummy_fe_ofdm_attach(void) -{ - pr_warn("%s: driver disabled by Kconfig\n", __func__); - return NULL; -} -static inline struct dvb_frontend *ddbridge_dummy_fe_qpsk_attach(void) -{ - pr_warn("%s: driver disabled by Kconfig\n", __func__); - return NULL; -} -static inline struct dvb_frontend *ddbridge_dummy_fe_qam_attach(void) -{ - pr_warn("%s: driver disabled by Kconfig\n", __func__); - return NULL; -} -#endif /* CONFIG_DDBRIDGE_DUMMY_FE */ #endif // DDBRIDGE_DUMMY_FE_H -- GitLab From 97b19498dc0250826f6c9f4921b1e4c553cb086c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Mar 2020 09:45:31 +0100 Subject: [PATCH 013/503] media: Kconfig: mark other drivers as test drivers Neither the PCI skeleton nor the DVB dummy driver are real drivers. They're there just as an example for a driver writter. Distros should not enable those drivers. So, hide them if MEDIA_TEST_SUPPORT is not selected. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/Kconfig | 4 ++++ drivers/media/pci/Kconfig | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig index a29e9ddf9c821..932fd88fdc127 100644 --- a/drivers/media/dvb-frontends/Kconfig +++ b/drivers/media/dvb-frontends/Kconfig @@ -944,8 +944,12 @@ config DVB_SP2 CIMaX SP2/SP2HF Common Interface module. comment "Tools to develop new frontends" + depends on MEDIA_TEST_SUPPORT config DVB_DUMMY_FE tristate "Dummy frontend driver" depends on DVB_CORE + depends on MEDIA_TEST_SUPPORT + help + Dummy skeleton frontend driver. endmenu diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig index 9336f8446cf04..e576283ebbf5e 100644 --- a/drivers/media/pci/Kconfig +++ b/drivers/media/pci/Kconfig @@ -58,6 +58,7 @@ source "drivers/media/pci/intel/ipu3/Kconfig" config VIDEO_PCI_SKELETON tristate "Skeleton PCI V4L2 driver" + depends on MEDIA_TEST_SUPPORT depends on PCI depends on SAMPLES depends on VIDEO_V4L2 && VIDEOBUF2_CORE -- GitLab From a832862295e0e604949e49f286ed368d5dfc2e3b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Mar 2020 09:59:18 +0100 Subject: [PATCH 014/503] media: Kconfig: simplify some dependencies both DVB_CORE and VIDEO_DEV already depends on MEDIA_SUPPORT, as they're below an if block. So, remove this double dependency. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index dc0cc42d48add..f6763d02f1bef 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -125,7 +125,6 @@ source "drivers/media/mc/Kconfig" config VIDEO_DEV tristate - depends on MEDIA_SUPPORT default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT config VIDEO_V4L2_SUBDEV_API @@ -146,7 +145,6 @@ source "drivers/media/v4l2-core/Kconfig" config DVB_CORE tristate - depends on MEDIA_SUPPORT depends on MEDIA_DIGITAL_TV_SUPPORT depends on (I2C || I2C=n) default y -- GitLab From a3b91d8bd1e034c8ed89d3f55243478af97a0a52 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Mar 2020 08:36:36 +0100 Subject: [PATCH 015/503] media: Kconfig: better support hybrid TV devices Right now, if one has an hybrid TV card, it has to select both analog and digital TV support, as otherwise the needed core support won't be selected. Change the logic to auto-select the core support for those drivers, as this is a way more intuitive. It should be noticed that, as now both DVB_CORE and VIDEO_DEV defaults depends on selecting a hybrid cards, we had to remove the explicit dependencies there, in order to avoid circular dependencies. That requires some tricks: 1) the prompt should not be not visible when an hybrid card is selected, as the user shold not change it. 2) When a media hybrid device is selected, the modular option for DVB_CORE and VIDEO_DEV will follow the MEDIA_SUPPORT dependency, as we can't have a core built with "y" with a driver built as module. Note: while here, moved two pure V4L2 PCI drivers out of the "hybrid" part of config and consider pvrusb2 as an hybrid device. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 24 +++++++++++------------- drivers/media/pci/Kconfig | 11 +++++++++-- drivers/media/pci/bt8xx/Kconfig | 5 ++--- drivers/media/pci/cx18/Kconfig | 2 +- drivers/media/pci/cx23885/Kconfig | 4 ++-- drivers/media/pci/cx88/Kconfig | 4 ++-- drivers/media/pci/saa7134/Kconfig | 4 ++-- drivers/media/pci/saa7164/Kconfig | 2 +- drivers/media/platform/Kconfig | 2 +- drivers/media/usb/Kconfig | 8 +++++++- drivers/media/usb/au0828/Kconfig | 6 ++---- drivers/media/usb/cx231xx/Kconfig | 4 ++-- drivers/media/usb/pvrusb2/Kconfig | 4 ++-- drivers/media/usb/tm6000/Kconfig | 4 ++-- 14 files changed, 46 insertions(+), 38 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index f6763d02f1bef..f400370b29282 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -44,20 +44,14 @@ config MEDIA_ANALOG_TV_SUPPORT help Enable analog TV support. - Say Y when you have a TV board with analog support or with a - hybrid analog/digital TV chipset. - - Note: There are several DVB cards that are based on chips that - support both analog and digital TV. Disabling this option - will disable support for them. + Say Y when you have a board with analog TV support. config MEDIA_DIGITAL_TV_SUPPORT bool "Digital TV support" help Enable digital TV support. - Say Y when you have a board with digital support or a board with - hybrid digital TV and analog TV. + Say Y when you have a board with digital TV support. config MEDIA_RADIO_SUPPORT bool "AM/FM radio receivers/transmitters support" @@ -69,10 +63,6 @@ config MEDIA_RADIO_SUPPORT Say Y when you have a board with radio support. - Note: There are several TV cards that are based on chips that - support radio reception. Disabling this option will - disable support for them. - config MEDIA_SDR_SUPPORT bool "Software defined radio support" help @@ -123,9 +113,13 @@ source "drivers/media/mc/Kconfig" # Only enables if one of the V4L2 types (ATV, webcam, radio) is selected # +comment "Video4Linux core enabled to support hybrid TV devices" + depends on MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI + config VIDEO_DEV tristate - default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT + prompt "Video4Linux core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) + default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI config VIDEO_V4L2_SUBDEV_API bool "V4L2 sub-device userspace API" @@ -143,8 +137,12 @@ source "drivers/media/v4l2-core/Kconfig" # Only enables if one of DTV is selected # +comment "Digital TV core enabled to support hybrid TV devices" + depends on MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI + config DVB_CORE tristate + prompt "Digital TV core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) depends on MEDIA_DIGITAL_TV_SUPPORT depends on (I2C || I2C=n) default y diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig index e576283ebbf5e..348da044ec780 100644 --- a/drivers/media/pci/Kconfig +++ b/drivers/media/pci/Kconfig @@ -1,4 +1,11 @@ # SPDX-License-Identifier: GPL-2.0-only + +# Should match the hybrid card list below +config MEDIA_HYBRID_PCI + bool + depends on VIDEO_CX18 || VIDEO_CX23885 || VIDEO_CX88 || VIDEO_BT848 || VIDEO_SAA7134 || VIDEO_SAA7164 + default y + if PCI && MEDIA_SUPPORT menuconfig MEDIA_PCI_SUPPORT @@ -24,18 +31,18 @@ if MEDIA_ANALOG_TV_SUPPORT source "drivers/media/pci/ivtv/Kconfig" source "drivers/media/pci/saa7146/Kconfig" source "drivers/media/pci/dt3155/Kconfig" +source "drivers/media/pci/cx25821/Kconfig" +source "drivers/media/pci/cobalt/Kconfig" endif if MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT comment "Media capture/analog/hybrid TV support" source "drivers/media/pci/cx18/Kconfig" source "drivers/media/pci/cx23885/Kconfig" -source "drivers/media/pci/cx25821/Kconfig" source "drivers/media/pci/cx88/Kconfig" source "drivers/media/pci/bt8xx/Kconfig" source "drivers/media/pci/saa7134/Kconfig" source "drivers/media/pci/saa7164/Kconfig" -source "drivers/media/pci/cobalt/Kconfig" endif diff --git a/drivers/media/pci/bt8xx/Kconfig b/drivers/media/pci/bt8xx/Kconfig index 75d172a6f54c0..c79c6175c2627 100644 --- a/drivers/media/pci/bt8xx/Kconfig +++ b/drivers/media/pci/bt8xx/Kconfig @@ -1,11 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_BT848 tristate "BT848 Video For Linux" - depends on VIDEO_DEV && PCI && I2C && VIDEO_V4L2 + depends on PCI && I2C select I2C_ALGOBIT select VIDEOBUF_DMA_SG depends on RC_CORE - depends on MEDIA_RADIO_SUPPORT select VIDEO_TUNER select VIDEO_TVEEPROM select VIDEO_MSP3400 if MEDIA_SUBDRV_AUTOSELECT @@ -24,7 +23,7 @@ config VIDEO_BT848 config DVB_BT8XX tristate "DVB/ATSC Support for bt878 based TV cards" - depends on DVB_CORE && PCI && I2C && VIDEO_BT848 + depends on PCI && I2C && VIDEO_BT848 select DVB_MT352 if MEDIA_SUBDRV_AUTOSELECT select DVB_SP887X if MEDIA_SUBDRV_AUTOSELECT select DVB_NXT6000 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/pci/cx18/Kconfig b/drivers/media/pci/cx18/Kconfig index 7074a1071302f..110e072bd8baa 100644 --- a/drivers/media/pci/cx18/Kconfig +++ b/drivers/media/pci/cx18/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX18 tristate "Conexant cx23418 MPEG encoder support" - depends on VIDEO_V4L2 && DVB_CORE && PCI && I2C + depends on PCI && I2C select I2C_ALGOBIT select VIDEOBUF_VMALLOC depends on RC_CORE diff --git a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig index 926da881929d5..e8f4edf270c83 100644 --- a/drivers/media/pci/cx23885/Kconfig +++ b/drivers/media/pci/cx23885/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX23885 tristate "Conexant cx23885 (2388x successor) support" - depends on DVB_CORE && VIDEO_DEV && PCI && I2C && INPUT && SND + depends on PCI && I2C && INPUT && SND select SND_PCM select I2C_ALGOBIT select VIDEO_TUNER @@ -53,7 +53,7 @@ config VIDEO_CX23885 config MEDIA_ALTERA_CI tristate "Altera FPGA based CI module" - depends on VIDEO_CX23885 && DVB_CORE + depends on VIDEO_CX23885 select ALTERA_STAPL help An Altera FPGA CI module for NetUP Dual DVB-T/C RF CI card. diff --git a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig index 24e1e7c41744a..ab994b3049f40 100644 --- a/drivers/media/pci/cx88/Kconfig +++ b/drivers/media/pci/cx88/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX88 tristate "Conexant 2388x (bt878 successor) support" - depends on VIDEO_DEV && PCI && I2C && RC_CORE + depends on PCI && I2C && RC_CORE select I2C_ALGOBIT select VIDEOBUF2_DMA_SG select VIDEO_TUNER @@ -44,7 +44,7 @@ config VIDEO_CX88_BLACKBIRD config VIDEO_CX88_DVB tristate "DVB/ATSC Support for cx2388x based TV cards" - depends on VIDEO_CX88 && DVB_CORE + depends on VIDEO_CX88 select VIDEOBUF2_DVB select DVB_PLL if MEDIA_SUBDRV_AUTOSELECT select DVB_MT352 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/pci/saa7134/Kconfig b/drivers/media/pci/saa7134/Kconfig index 30c1759682a9f..a2af02f6d5938 100644 --- a/drivers/media/pci/saa7134/Kconfig +++ b/drivers/media/pci/saa7134/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_SAA7134 tristate "Philips SAA7134 support" - depends on VIDEO_DEV && PCI && I2C + depends on PCI && I2C select VIDEOBUF2_DMA_SG select VIDEO_TUNER select VIDEO_TVEEPROM @@ -37,7 +37,7 @@ config VIDEO_SAA7134_RC config VIDEO_SAA7134_DVB tristate "DVB/ATSC Support for saa7134 based TV cards" - depends on VIDEO_SAA7134 && DVB_CORE + depends on VIDEO_SAA7134 select VIDEOBUF2_DVB select DVB_PLL if MEDIA_SUBDRV_AUTOSELECT select DVB_MT352 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/pci/saa7164/Kconfig b/drivers/media/pci/saa7164/Kconfig index 6655c3e504cdf..8df933a722a7e 100644 --- a/drivers/media/pci/saa7164/Kconfig +++ b/drivers/media/pci/saa7164/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_SAA7164 tristate "NXP SAA7164 support" - depends on DVB_CORE && VIDEO_DEV && PCI && I2C + depends on PCI && I2C select I2C_ALGOBIT select FW_LOADER select VIDEO_TUNER diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 80028337bf00c..6b693cd0576ee 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -531,7 +531,7 @@ config VIDEO_TI_CSC menuconfig DVB_PLATFORM_DRIVERS bool "DVB platform devices" - depends on MEDIA_DIGITAL_TV_SUPPORT + select DVB_CORE help Say Y here to enable support for platform-specific Digital TV drivers. diff --git a/drivers/media/usb/Kconfig b/drivers/media/usb/Kconfig index bf08393e38d16..036aa4385fdcc 100644 --- a/drivers/media/usb/Kconfig +++ b/drivers/media/usb/Kconfig @@ -5,6 +5,12 @@ config TTPCI_EEPROM tristate depends on I2C +# Should match the hybrid card list below +config MEDIA_HYBRID_USB + bool + depends on VIDEO_AU0828 || VIDEO_CX231XX || VIDEO_TM6000 || VIDEO_PVRUSB2 + default y + if USB && MEDIA_SUPPORT menuconfig MEDIA_USB_SUPPORT @@ -29,7 +35,6 @@ endif if MEDIA_ANALOG_TV_SUPPORT comment "Analog TV USB devices" -source "drivers/media/usb/pvrusb2/Kconfig" source "drivers/media/usb/hdpvr/Kconfig" source "drivers/media/usb/stk1160/Kconfig" source "drivers/media/usb/go7007/Kconfig" @@ -39,6 +44,7 @@ if (MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT) comment "Analog/digital TV USB devices" source "drivers/media/usb/au0828/Kconfig" source "drivers/media/usb/cx231xx/Kconfig" +source "drivers/media/usb/pvrusb2/Kconfig" source "drivers/media/usb/tm6000/Kconfig" endif diff --git a/drivers/media/usb/au0828/Kconfig b/drivers/media/usb/au0828/Kconfig index 05cc6c48c26fb..2f5ee684a2789 100644 --- a/drivers/media/usb/au0828/Kconfig +++ b/drivers/media/usb/au0828/Kconfig @@ -2,12 +2,12 @@ config VIDEO_AU0828 tristate "Auvitek AU0828 support" - depends on I2C && INPUT && DVB_CORE && USB && VIDEO_V4L2 + depends on I2C && INPUT && USB select MEDIA_CONTROLLER select MEDIA_CONTROLLER_DVB select I2C_ALGOBIT select VIDEO_TVEEPROM - select VIDEOBUF2_VMALLOC if VIDEO_V4L2 + select VIDEOBUF2_VMALLOC select DVB_AU8522_DTV if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_XC5000 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_MXL5007T if MEDIA_SUBDRV_AUTOSELECT @@ -22,8 +22,6 @@ config VIDEO_AU0828 config VIDEO_AU0828_V4L2 bool "Auvitek AU0828 v4l2 analog video support" depends on VIDEO_AU0828 - depends on VIDEO_V4L2=y || VIDEO_V4L2=VIDEO_AU0828 - select DVB_AU8522_V4L if MEDIA_SUBDRV_AUTOSELECT select VIDEO_TUNER default y help diff --git a/drivers/media/usb/cx231xx/Kconfig b/drivers/media/usb/cx231xx/Kconfig index 2fe2b2d335ba1..7e3b189f9dca4 100644 --- a/drivers/media/usb/cx231xx/Kconfig +++ b/drivers/media/usb/cx231xx/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX231XX tristate "Conexant cx231xx USB video capture support" - depends on VIDEO_DEV && I2C && I2C_MUX + depends on I2C && I2C_MUX select VIDEO_TUNER select VIDEO_TVEEPROM select VIDEOBUF2_VMALLOC @@ -40,7 +40,7 @@ config VIDEO_CX231XX_ALSA config VIDEO_CX231XX_DVB tristate "DVB/ATSC Support for Cx231xx based TV cards" - depends on VIDEO_CX231XX && DVB_CORE + depends on VIDEO_CX231XX select MEDIA_TUNER_XC5000 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_TDA18271 if MEDIA_SUBDRV_AUTOSELECT select DVB_MB86A20S if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/usb/pvrusb2/Kconfig b/drivers/media/usb/pvrusb2/Kconfig index e6a4f730591b8..5bf45f2b2517a 100644 --- a/drivers/media/usb/pvrusb2/Kconfig +++ b/drivers/media/usb/pvrusb2/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_PVRUSB2 tristate "Hauppauge WinTV-PVR USB2 support" - depends on VIDEO_V4L2 && I2C + depends on I2C select VIDEO_TUNER select VIDEO_TVEEPROM select VIDEO_CX2341X @@ -36,7 +36,7 @@ config VIDEO_PVRUSB2_SYSFS config VIDEO_PVRUSB2_DVB bool "pvrusb2 ATSC/DVB support" default y - depends on VIDEO_PVRUSB2 && DVB_CORE + depends on VIDEO_PVRUSB2 select DVB_LGDT330X if MEDIA_SUBDRV_AUTOSELECT select DVB_S5H1409 if MEDIA_SUBDRV_AUTOSELECT select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/usb/tm6000/Kconfig b/drivers/media/usb/tm6000/Kconfig index 56e977deba815..ad9cfa855eac0 100644 --- a/drivers/media/usb/tm6000/Kconfig +++ b/drivers/media/usb/tm6000/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_TM6000 tristate "TV Master TM5600/6000/6010 driver" - depends on VIDEO_DEV && I2C && INPUT && RC_CORE && USB + depends on I2C && INPUT && RC_CORE && USB select VIDEO_TUNER select MEDIA_TUNER_XC2028 select MEDIA_TUNER_XC5000 @@ -28,7 +28,7 @@ config VIDEO_TM6000_ALSA config VIDEO_TM6000_DVB tristate "DVB Support for tm6000 based TV cards" - depends on VIDEO_TM6000 && DVB_CORE && USB + depends on VIDEO_TM6000 && USB select DVB_ZL10353 help This adds support for DVB cards based on the tm5600/tm6000 chip. -- GitLab From 6268b351394450e9168a9281a9279f7cb420669f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Mar 2020 15:47:25 +0100 Subject: [PATCH 016/503] media: Kconfig: fix selection for test drivers There are some long-time mistakes related to build test drivers, with regards to depends on/select. Also, as we now want to build any test driver without needing to enable anything else, change the logic in order to properly filter them. Please notice that the PCI skeleton is somewhat an exception, as it requires to select *both* SAMPLES and MEDIA_TEST_SUPPORT. I almost changed it to be either one, but decided to keep it as-is, as this is something that we don't really need to be included on any distribution. The only reason for someone to build it is for COMPILE_TEST purposes. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 2 +- drivers/media/dvb-frontends/Kconfig | 9 +++++++-- drivers/media/pci/Kconfig | 10 +++++----- drivers/media/test_drivers/Kconfig | 2 +- 4 files changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index f400370b29282..9c32616f863af 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -119,7 +119,7 @@ comment "Video4Linux core enabled to support hybrid TV devices" config VIDEO_DEV tristate prompt "Video4Linux core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) - default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI + default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_TEST_SUPPORT || MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI config VIDEO_V4L2_SUBDEV_API bool "V4L2 sub-device userspace API" diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig index 932fd88fdc127..1f45808d94da4 100644 --- a/drivers/media/dvb-frontends/Kconfig +++ b/drivers/media/dvb-frontends/Kconfig @@ -1,3 +1,5 @@ +if MEDIA_DIGITAL_TV_SUPPORT + comment "DVB Frontend drivers hidden by 'Autoselect ancillary drivers'" depends on MEDIA_HIDE_ANCILLARY_SUBDRV @@ -943,13 +945,16 @@ config DVB_SP2 help CIMaX SP2/SP2HF Common Interface module. +endmenu # Customise DVB Frontends + +endif # MEDIA_DIGITAL_TV_SUPPORT + comment "Tools to develop new frontends" depends on MEDIA_TEST_SUPPORT config DVB_DUMMY_FE tristate "Dummy frontend driver" - depends on DVB_CORE depends on MEDIA_TEST_SUPPORT + select DVB_CORE help Dummy skeleton frontend driver. -endmenu diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig index 348da044ec780..44f1efd21272e 100644 --- a/drivers/media/pci/Kconfig +++ b/drivers/media/pci/Kconfig @@ -6,7 +6,7 @@ config MEDIA_HYBRID_PCI depends on VIDEO_CX18 || VIDEO_CX23885 || VIDEO_CX88 || VIDEO_BT848 || VIDEO_SAA7134 || VIDEO_SAA7164 default y -if PCI && MEDIA_SUPPORT +if PCI menuconfig MEDIA_PCI_SUPPORT bool "Media PCI Adapters" @@ -65,11 +65,11 @@ source "drivers/media/pci/intel/ipu3/Kconfig" config VIDEO_PCI_SKELETON tristate "Skeleton PCI V4L2 driver" - depends on MEDIA_TEST_SUPPORT - depends on PCI depends on SAMPLES - depends on VIDEO_V4L2 && VIDEOBUF2_CORE - depends on VIDEOBUF2_MEMOPS && VIDEOBUF2_DMA_CONTIG + depends on MEDIA_TEST_SUPPORT + depends on PCI && VIDEO_V4L2 + select VIDEOBUF2_MEMOPS + select VIDEOBUF2_DMA_CONTIG help Enable build of the skeleton PCI driver, used as a reference when developing new drivers. diff --git a/drivers/media/test_drivers/Kconfig b/drivers/media/test_drivers/Kconfig index 258a4d36c0d37..9f4a9cfbacc9c 100644 --- a/drivers/media/test_drivers/Kconfig +++ b/drivers/media/test_drivers/Kconfig @@ -4,7 +4,7 @@ if MEDIA_TEST_SUPPORT menuconfig V4L_TEST_DRIVERS bool "V4L test drivers" - depends on MEDIA_CAMERA_SUPPORT + depends on VIDEO_DEV if V4L_TEST_DRIVERS -- GitLab From 76c34a8d0e53f98975a2da5f753a99b4abc05c44 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Mar 2020 16:13:16 +0100 Subject: [PATCH 017/503] media: add SPDX headers on Kconfig and Makefile files Most of media Kconfig/Makefile files already has SPDX, but there are a few ones still missing. Add it to them. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/Kconfig | 2 ++ drivers/media/mc/Kconfig | 2 ++ drivers/media/platform/sunxi/Kconfig | 2 ++ drivers/media/platform/sunxi/Makefile | 2 ++ drivers/media/platform/sunxi/sun4i-csi/Kconfig | 2 ++ drivers/media/platform/sunxi/sun4i-csi/Makefile | 2 ++ drivers/staging/media/hantro/Makefile | 2 ++ drivers/staging/media/rkisp1/Makefile | 2 ++ 8 files changed, 16 insertions(+) diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig index 1f45808d94da4..aa24506257b3a 100644 --- a/drivers/media/dvb-frontends/Kconfig +++ b/drivers/media/dvb-frontends/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + if MEDIA_DIGITAL_TV_SUPPORT comment "DVB Frontend drivers hidden by 'Autoselect ancillary drivers'" diff --git a/drivers/media/mc/Kconfig b/drivers/media/mc/Kconfig index 3b9795cfcb36b..0c5c52f14c645 100644 --- a/drivers/media/mc/Kconfig +++ b/drivers/media/mc/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + # # Media controller # Selectable only for webcam/grabbers, as other drivers don't use it diff --git a/drivers/media/platform/sunxi/Kconfig b/drivers/media/platform/sunxi/Kconfig index 71808e93ac2e1..7151cc249afaf 100644 --- a/drivers/media/platform/sunxi/Kconfig +++ b/drivers/media/platform/sunxi/Kconfig @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 + source "drivers/media/platform/sunxi/sun4i-csi/Kconfig" source "drivers/media/platform/sunxi/sun6i-csi/Kconfig" diff --git a/drivers/media/platform/sunxi/Makefile b/drivers/media/platform/sunxi/Makefile index ff0993f70dc3a..fc537c9f5ca9d 100644 --- a/drivers/media/platform/sunxi/Makefile +++ b/drivers/media/platform/sunxi/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + obj-y += sun4i-csi/ obj-y += sun6i-csi/ obj-y += sun8i-di/ diff --git a/drivers/media/platform/sunxi/sun4i-csi/Kconfig b/drivers/media/platform/sunxi/sun4i-csi/Kconfig index e86e29b6a6033..93b4e82a26555 100644 --- a/drivers/media/platform/sunxi/sun4i-csi/Kconfig +++ b/drivers/media/platform/sunxi/sun4i-csi/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + config VIDEO_SUN4I_CSI tristate "Allwinner A10 CMOS Sensor Interface Support" depends on VIDEO_V4L2 && COMMON_CLK && VIDEO_V4L2_SUBDEV_API && HAS_DMA diff --git a/drivers/media/platform/sunxi/sun4i-csi/Makefile b/drivers/media/platform/sunxi/sun4i-csi/Makefile index 7c790a57f5ee5..5062b006d63ee 100644 --- a/drivers/media/platform/sunxi/sun4i-csi/Makefile +++ b/drivers/media/platform/sunxi/sun4i-csi/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + sun4i-csi-y += sun4i_csi.o sun4i-csi-y += sun4i_dma.o sun4i-csi-y += sun4i_v4l2.o diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile index 68c29a9c4946c..743ce08eb1846 100644 --- a/drivers/staging/media/hantro/Makefile +++ b/drivers/staging/media/hantro/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + obj-$(CONFIG_VIDEO_HANTRO) += hantro-vpu.o hantro-vpu-y += \ diff --git a/drivers/staging/media/rkisp1/Makefile b/drivers/staging/media/rkisp1/Makefile index 69ca59c7ef346..ab32a77db8f7d 100644 --- a/drivers/staging/media/rkisp1/Makefile +++ b/drivers/staging/media/rkisp1/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip-isp1.o rockchip-isp1-objs += rkisp1-capture.o \ rkisp1-common.o \ -- GitLab From e58be01614ca8640d727ea7cd37f5984e0b57a7a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Mar 2020 15:01:25 +0100 Subject: [PATCH 018/503] media: dvb-core: Kconfig: default to use dynamic minors All modern Linux distributions nowadays use udev or some alternative (like systemd). So, it makes sense to change the default to use dynamic minors. Please notice that this default doesn't enable any code. It just changes the dvb-core behavior. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-core/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/dvb-core/Kconfig b/drivers/media/dvb-core/Kconfig index 90e038d5ffd90..61f9e1ce99cb6 100644 --- a/drivers/media/dvb-core/Kconfig +++ b/drivers/media/dvb-core/Kconfig @@ -19,6 +19,7 @@ config DVB_MAX_ADAPTERS config DVB_DYNAMIC_MINORS bool "Dynamic DVB minor allocation" depends on DVB_CORE + default y help If you say Y here, the DVB subsystem will use dynamic minor allocation for any device that uses the DVB major number. -- GitLab From 32a363d0b0b142f35512848dc646ee53e0926723 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Mar 2020 15:36:56 +0100 Subject: [PATCH 019/503] media: Kconfig files: use select for V4L2 subdevs and MC There are lots of drivers that only work when the media controller and/or the V4L2 subdev APIs are present. Right now, someone need to first enable those APIs before using those drivers. Well, ideally, drivers, should, instead *optionally* depend on it, in order for PC camera drivers to be able to use them, but nowadays most drivers are UVC cameras, with don't require a sensor driver. So, be it. Let's instead make them select the MEDIA_CONTROLLER and the SUBDEV API, in order to make easier for people to be able of enabling them. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/Kconfig | 210 ++++++++++++------ drivers/media/i2c/et8ek8/Kconfig | 4 +- drivers/media/i2c/m5mols/Kconfig | 5 +- drivers/media/i2c/smiapp/Kconfig | 5 +- drivers/media/mc/Kconfig | 2 +- drivers/media/pci/cobalt/Kconfig | 4 +- drivers/media/pci/intel/ipu3/Kconfig | 4 +- drivers/media/pci/sta2x11/Kconfig | 6 +- drivers/media/platform/Kconfig | 28 ++- drivers/media/platform/am437x/Kconfig | 4 +- drivers/media/platform/atmel/Kconfig | 4 +- drivers/media/platform/cadence/Kconfig | 8 +- drivers/media/platform/exynos4-is/Kconfig | 5 +- drivers/media/platform/rcar-vin/Kconfig | 8 +- .../media/platform/sunxi/sun4i-csi/Kconfig | 4 +- .../media/platform/sunxi/sun6i-csi/Kconfig | 4 +- drivers/media/platform/xilinx/Kconfig | 4 +- drivers/media/spi/Kconfig | 4 +- drivers/media/test_drivers/vimc/Kconfig | 4 +- drivers/staging/media/hantro/Kconfig | 5 +- drivers/staging/media/imx/Kconfig | 5 +- drivers/staging/media/ipu3/Kconfig | 3 +- drivers/staging/media/omap4iss/Kconfig | 4 +- drivers/staging/media/rkisp1/Kconfig | 4 +- drivers/staging/media/sunxi/cedrus/Kconfig | 5 +- 25 files changed, 237 insertions(+), 106 deletions(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 125d596c13dd0..4bc4cfea2f201 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -19,7 +19,7 @@ config VIDEO_IR_I2C In doubt, say Y. # -# Encoder / Decoder module configuration +# V4L2 I2C drivers that aren't related with Camera support # comment "I2C drivers hidden by 'Autoselect ancillary drivers'" @@ -28,6 +28,10 @@ comment "I2C drivers hidden by 'Autoselect ancillary drivers'" menu "I2C Encoders, decoders, sensors and other helper chips" visible if !MEDIA_HIDE_ANCILLARY_SUBDRV +# +# Encoder / Decoder module configuration +# + comment "Audio decoders, processors and mixers" config VIDEO_TVAUDIO @@ -62,11 +66,13 @@ config VIDEO_TDA9840 config VIDEO_TDA1997X tristate "NXP TDA1997x HDMI receiver" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C depends on SND_SOC select HDMI select SND_PCM select V4L2_FWNODE + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help V4L2 subdevice driver for the NXP TDA1997x HDMI receivers. @@ -204,7 +210,9 @@ comment "Video decoders" config VIDEO_ADV7180 tristate "Analog Devices ADV7180 decoder" - depends on GPIOLIB && VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on GPIOLIB && VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help Support for the Analog Devices ADV7180 video decoder. @@ -223,8 +231,10 @@ config VIDEO_ADV7183 config VIDEO_ADV748X tristate "Analog Devices ADV748x decoder" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C depends on OF + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP_I2C select V4L2_FWNODE help @@ -236,8 +246,10 @@ config VIDEO_ADV748X config VIDEO_ADV7604 tristate "Analog Devices ADV7604 decoder" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C depends on GPIOLIB || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP_I2C select HDMI select V4L2_FWNODE @@ -260,7 +272,9 @@ config VIDEO_ADV7604_CEC config VIDEO_ADV7842 tristate "Analog Devices ADV7842 decoder" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select HDMI help Support for the Analog Devices ADV7842 video decoder. @@ -347,7 +361,9 @@ config VIDEO_SAA711X config VIDEO_TC358743 tristate "Toshiba TC358743 decoder" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select HDMI select V4L2_FWNODE help @@ -515,8 +531,10 @@ config VIDEO_ADV7393 config VIDEO_ADV7511 tristate "Analog Devices ADV7511 encoder" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C depends on DRM_I2C_ADV7511=n || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select HDMI help Support for the Analog Devices ADV7511 video encoder. @@ -536,7 +554,10 @@ config VIDEO_ADV7511_CEC config VIDEO_AD9389B tristate "Analog Devices AD9389B encoder" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API + help Support for the Analog Devices AD9389B video encoder. @@ -568,12 +589,17 @@ config VIDEO_APTINA_PLL config VIDEO_SMIAPP_PLL tristate +# +# All drivers that are related to Media Camera Support should be here +# + if MEDIA_CAMERA_SUPPORT config VIDEO_HI556 tristate "Hynix Hi-556 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API - depends on MEDIA_CONTROLLER + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the Hynix @@ -584,8 +610,10 @@ config VIDEO_HI556 config VIDEO_IMX214 tristate "Sony IMX214 sensor support" - depends on GPIOLIB && I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on GPIOLIB && I2C && VIDEO_V4L2 depends on V4L2_FWNODE + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP_I2C help This is a Video4Linux2 sensor driver for the Sony @@ -596,7 +624,9 @@ config VIDEO_IMX214 config VIDEO_IMX219 tristate "Sony IMX219 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the Sony @@ -607,7 +637,9 @@ config VIDEO_IMX219 config VIDEO_IMX258 tristate "Sony IMX258 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a Video4Linux2 sensor driver for the Sony IMX258 camera. @@ -617,7 +649,9 @@ config VIDEO_IMX258 config VIDEO_IMX274 tristate "Sony IMX274 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP_I2C help This is a V4L2 sensor driver for the Sony IMX274 @@ -625,7 +659,9 @@ config VIDEO_IMX274 config VIDEO_IMX290 tristate "Sony IMX290 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP_I2C select V4L2_FWNODE help @@ -637,7 +673,9 @@ config VIDEO_IMX290 config VIDEO_IMX319 tristate "Sony IMX319 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a Video4Linux2 sensor driver for the Sony IMX319 camera. @@ -647,7 +685,9 @@ config VIDEO_IMX319 config VIDEO_IMX355 tristate "Sony IMX355 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a Video4Linux2 sensor driver for the Sony IMX355 camera. @@ -678,7 +718,8 @@ config VIDEO_OV2659 config VIDEO_OV2680 tristate "OmniVision OV2680 sensor support" - depends on VIDEO_V4L2 && I2C && MEDIA_CONTROLLER + depends on VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -689,7 +730,8 @@ config VIDEO_OV2680 config VIDEO_OV2685 tristate "OmniVision OV2685 sensor support" - depends on VIDEO_V4L2 && I2C && MEDIA_CONTROLLER + depends on VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -701,7 +743,9 @@ config VIDEO_OV2685 config VIDEO_OV5640 tristate "OmniVision OV5640 sensor support" depends on OF - depends on GPIOLIB && VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on GPIOLIB && VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the Omnivision @@ -710,7 +754,9 @@ config VIDEO_OV5640 config VIDEO_OV5645 tristate "OmniVision OV5645 sensor support" depends on OF - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -721,7 +767,9 @@ config VIDEO_OV5645 config VIDEO_OV5647 tristate "OmniVision OV5647 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -742,8 +790,9 @@ config VIDEO_OV6650 config VIDEO_OV5670 tristate "OmniVision OV5670 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API - depends on MEDIA_CONTROLLER + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -754,8 +803,9 @@ config VIDEO_OV5670 config VIDEO_OV5675 tristate "OmniVision OV5675 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API - depends on MEDIA_CONTROLLER + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -777,7 +827,9 @@ config VIDEO_OV5695 config VIDEO_OV7251 tristate "OmniVision OV7251 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -826,7 +878,9 @@ config VIDEO_OV7740 config VIDEO_OV8856 tristate "OmniVision OV8856 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -844,7 +898,9 @@ config VIDEO_OV9640 config VIDEO_OV9650 tristate "OmniVision OV9650/OV9652 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP_SCCB help This is a V4L2 sensor driver for the Omnivision @@ -852,7 +908,9 @@ config VIDEO_OV9650 config VIDEO_OV13858 tristate "OmniVision OV13858 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a Video4Linux2 sensor driver for the OmniVision @@ -870,14 +928,18 @@ config VIDEO_VS6624 config VIDEO_MT9M001 tristate "mt9m001 support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This driver supports MT9M001 cameras from Micron, monochrome and colour models. config VIDEO_MT9M032 tristate "MT9M032 camera sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEO_APTINA_PLL help This driver supports MT9M032 camera sensors from Aptina, monochrome @@ -893,7 +955,9 @@ config VIDEO_MT9M111 config VIDEO_MT9P031 tristate "Aptina MT9P031 support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEO_APTINA_PLL help This is a Video4Linux2 sensor driver for the Aptina @@ -901,7 +965,9 @@ config VIDEO_MT9P031 config VIDEO_MT9T001 tristate "Aptina MT9T001 support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a Video4Linux2 sensor driver for the Aptina (Micron) mt0t001 3 Mpixel camera. @@ -926,7 +992,9 @@ config VIDEO_MT9V011 config VIDEO_MT9V032 tristate "Micron MT9V032 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP_I2C select V4L2_FWNODE help @@ -951,7 +1019,9 @@ config VIDEO_SR030PC30 config VIDEO_NOON010PC30 tristate "Siliconfile NOON010PC30 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This driver supports NOON010PC30 CIF camera from Siliconfile @@ -969,21 +1039,27 @@ config VIDEO_RJ54N1 config VIDEO_S5K6AA tristate "Samsung S5K6AAFX sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a V4L2 sensor driver for Samsung S5K6AA(FX) 1.3M camera sensor with an embedded SoC image signal processor. config VIDEO_S5K6A3 tristate "Samsung S5K6A3 sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a V4L2 sensor driver for Samsung S5K6A3 raw camera sensor. config VIDEO_S5K4ECGX tristate "Samsung S5K4ECGX sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select CRC32 help This is a V4L2 sensor driver for Samsung S5K4ECGX 5M @@ -991,7 +1067,9 @@ config VIDEO_S5K4ECGX config VIDEO_S5K5BAF tristate "Samsung S5K5BAF sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a V4L2 sensor driver for Samsung S5K5BAF 2M @@ -1002,28 +1080,29 @@ source "drivers/media/i2c/et8ek8/Kconfig" config VIDEO_S5C73M3 tristate "Samsung S5C73M3 sensor support" - depends on I2C && SPI && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && SPI && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a V4L2 sensor driver for Samsung S5C73M3 8 Mpixel camera. -endif comment "Lens drivers" -if MEDIA_CAMERA_SUPPORT - config VIDEO_AD5820 tristate "AD5820 lens voice coil support" - depends on GPIOLIB && I2C && VIDEO_V4L2 && MEDIA_CONTROLLER + depends on GPIOLIB && I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER help This is a driver for the AD5820 camera lens voice coil. It is used for example in Nokia N900 (RX-51). config VIDEO_AK7375 tristate "AK7375 lens voice coil support" - depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER - depends on VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a driver for the AK7375 camera lens voice coil. AK7375 is a 12 bit DAC with 120mA output current sink @@ -1032,8 +1111,9 @@ config VIDEO_AK7375 config VIDEO_DW9714 tristate "DW9714 lens voice coil support" - depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER - depends on VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a driver for the DW9714 camera lens voice coil. DW9714 is a 10 bit DAC with 120mA output current sink @@ -1042,30 +1122,30 @@ config VIDEO_DW9714 config VIDEO_DW9807_VCM tristate "DW9807 lens voice coil support" - depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER - depends on VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This is a driver for the DW9807 camera lens voice coil. DW9807 is a 10 bit DAC with 100mA output current sink capability. This is designed for linear control of voice coil motors, controlled via I2C serial interface. -endif comment "Flash devices" -if MEDIA_CAMERA_SUPPORT - config VIDEO_ADP1653 tristate "ADP1653 flash support" - depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER help This is a driver for the ADP1653 flash controller. It is used for example in Nokia N900. config VIDEO_LM3560 tristate "LM3560 dual flash driver support" - depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER select REGMAP_I2C help This is a driver for the lm3560 dual flash controllers. It controls @@ -1073,13 +1153,18 @@ config VIDEO_LM3560 config VIDEO_LM3646 tristate "LM3646 dual flash driver support" - depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER select REGMAP_I2C help This is a driver for the lm3646 dual flash controllers. It controls flash, torch LEDs. -endif +endif # MEDIA_CAMERA_SUPPORT + +# +# Other V4L2 drivers that aren't related with Camera support +# comment "Video improvement chips" @@ -1168,8 +1253,9 @@ config VIDEO_I2C config VIDEO_ST_MIPID02 tristate "STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API - depends on MEDIA_CAMERA_SUPPORT + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help Support for STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge. @@ -1181,4 +1267,4 @@ config VIDEO_ST_MIPID02 endmenu -endif +endif # VIDEO_V4L2 diff --git a/drivers/media/i2c/et8ek8/Kconfig b/drivers/media/i2c/et8ek8/Kconfig index 1c6909874d568..afcc4ea764f6b 100644 --- a/drivers/media/i2c/et8ek8/Kconfig +++ b/drivers/media/i2c/et8ek8/Kconfig @@ -1,7 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_ET8EK8 tristate "ET8EK8 camera sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help This is a driver for the Toshiba ET8EK8 5 MP camera sensor. diff --git a/drivers/media/i2c/m5mols/Kconfig b/drivers/media/i2c/m5mols/Kconfig index e573482f269f8..6f0ef33b7ee1b 100644 --- a/drivers/media/i2c/m5mols/Kconfig +++ b/drivers/media/i2c/m5mols/Kconfig @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_M5MOLS tristate "Fujitsu M-5MOLS 8MP sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API - depends on MEDIA_CAMERA_SUPPORT + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help This driver supports Fujitsu M-5MOLS camera sensor with ISP diff --git a/drivers/media/i2c/smiapp/Kconfig b/drivers/media/i2c/smiapp/Kconfig index fcaa7f9494a80..6893b532824fc 100644 --- a/drivers/media/i2c/smiapp/Kconfig +++ b/drivers/media/i2c/smiapp/Kconfig @@ -1,8 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_SMIAPP tristate "SMIA++/SMIA sensor support" - depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && HAVE_CLK - depends on MEDIA_CAMERA_SUPPORT + depends on I2C && VIDEO_V4L2 && HAVE_CLK + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEO_SMIAPP_PLL select V4L2_FWNODE help diff --git a/drivers/media/mc/Kconfig b/drivers/media/mc/Kconfig index 0c5c52f14c645..e740ace54d7f3 100644 --- a/drivers/media/mc/Kconfig +++ b/drivers/media/mc/Kconfig @@ -7,7 +7,7 @@ config MEDIA_CONTROLLER bool "Media Controller API" - depends on MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT + default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT || MEDIA_PLATFORM_SUPPORT help Enable the media controller API used to query media devices internal topology and configure it dynamically. diff --git a/drivers/media/pci/cobalt/Kconfig b/drivers/media/pci/cobalt/Kconfig index e0e7df460a92b..d8d9ea6b09bcb 100644 --- a/drivers/media/pci/cobalt/Kconfig +++ b/drivers/media/pci/cobalt/Kconfig @@ -1,11 +1,13 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_COBALT tristate "Cisco Cobalt support" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C depends on PCI_MSI && MTD_COMPLEX_MAPPINGS depends on (GPIOLIB && DRM_I2C_ADV7511=n) || COMPILE_TEST depends on SND depends on MTD + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select I2C_ALGOBIT select SND_PCM select VIDEO_ADV7604 diff --git a/drivers/media/pci/intel/ipu3/Kconfig b/drivers/media/pci/intel/ipu3/Kconfig index f35bba16b60eb..82d7f17e6a024 100644 --- a/drivers/media/pci/intel/ipu3/Kconfig +++ b/drivers/media/pci/intel/ipu3/Kconfig @@ -2,9 +2,9 @@ config VIDEO_IPU3_CIO2 tristate "Intel ipu3-cio2 driver" depends on VIDEO_V4L2 && PCI - depends on VIDEO_V4L2_SUBDEV_API depends on (X86 && ACPI) || COMPILE_TEST - depends on MEDIA_CONTROLLER + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE select VIDEOBUF2_DMA_SG diff --git a/drivers/media/pci/sta2x11/Kconfig b/drivers/media/pci/sta2x11/Kconfig index 011b766f0bffd..4dd98f94a91ed 100644 --- a/drivers/media/pci/sta2x11/Kconfig +++ b/drivers/media/pci/sta2x11/Kconfig @@ -1,12 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-only config STA2X11_VIP tristate "STA2X11 VIP Video For Linux" + depends on PCI && VIDEO_V4L2 && VIRT_TO_BUS && I2C depends on STA2X11 || COMPILE_TEST select VIDEO_ADV7180 if MEDIA_SUBDRV_AUTOSELECT select VIDEOBUF2_DMA_CONTIG - depends on PCI && VIDEO_V4L2 && VIRT_TO_BUS - depends on VIDEO_V4L2_SUBDEV_API - depends on I2C + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help Say Y for support for STA2X11 VIP (Video Input Port) capture device. diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 6b693cd0576ee..b8b2de5f1541c 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -63,7 +63,9 @@ config VIDEO_VIU config VIDEO_MUX tristate "Video Multiplexer" select MULTIPLEXER - depends on VIDEO_V4L2 && OF && VIDEO_V4L2_SUBDEV_API && MEDIA_CONTROLLER + depends on VIDEO_V4L2 && OF + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select REGMAP select V4L2_FWNODE help @@ -71,10 +73,12 @@ config VIDEO_MUX config VIDEO_OMAP3 tristate "OMAP 3 Camera support" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && I2C depends on (ARCH_OMAP3 && OMAP_IOMMU) || COMPILE_TEST depends on COMMON_CLK && OF select ARM_DMA_USE_IOMMU if OMAP_IOMMU + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select MFD_SYSCON select V4L2_FWNODE @@ -99,16 +103,19 @@ config VIDEO_PXA27x config VIDEO_QCOM_CAMSS tristate "Qualcomm V4L2 Camera Subsystem driver" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 depends on (ARCH_QCOM && IOMMU_DMA) || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_SG select V4L2_FWNODE config VIDEO_S3C_CAMIF tristate "Samsung S3C24XX/S3C64XX SoC Camera Interface driver" - depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API - depends on PM + depends on VIDEO_V4L2 && I2C && PM depends on ARCH_S3C64XX || PLAT_S3C24XX || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG help This is a v4l2 driver for s3c24xx and s3c64xx SoC series camera @@ -119,9 +126,10 @@ config VIDEO_S3C_CAMIF config VIDEO_STM32_DCMI tristate "STM32 Digital Camera Memory Interface (DCMI) support" - depends on VIDEO_V4L2 && OF && MEDIA_CONTROLLER + depends on VIDEO_V4L2 && OF depends on ARCH_STM32 || COMPILE_TEST select VIDEOBUF2_DMA_CONTIG + select MEDIA_CONTROLLER select V4L2_FWNODE help This module makes the STM32 Digital Camera Memory Interface (DCMI) @@ -148,7 +156,9 @@ source "drivers/media/platform/sunxi/Kconfig" config VIDEO_TI_CAL tristate "TI CAL (Camera Adaptation Layer) driver" - depends on VIDEO_DEV && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_DEV && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API depends on SOC_DRA7XX || ARCH_K3 || COMPILE_TEST select VIDEOBUF2_DMA_CONTIG select V4L2_FWNODE @@ -432,9 +442,11 @@ config VIDEO_RENESAS_FCP config VIDEO_RENESAS_VSP1 tristate "Renesas VSP1 Video Processing Engine" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 depends on ARCH_RENESAS || COMPILE_TEST depends on (!ARM64 && !VIDEO_RENESAS_FCP) || VIDEO_RENESAS_FCP + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC help diff --git a/drivers/media/platform/am437x/Kconfig b/drivers/media/platform/am437x/Kconfig index d6f2e3d0cbefb..9ef898f512de7 100644 --- a/drivers/media/platform/am437x/Kconfig +++ b/drivers/media/platform/am437x/Kconfig @@ -1,8 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_AM437X_VPFE tristate "TI AM437x VPFE video capture driver" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 depends on SOC_AM43XX || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select V4L2_FWNODE help diff --git a/drivers/media/platform/atmel/Kconfig b/drivers/media/platform/atmel/Kconfig index 5ae3f60b81b11..1850fe7f9360b 100644 --- a/drivers/media/platform/atmel/Kconfig +++ b/drivers/media/platform/atmel/Kconfig @@ -1,8 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_ATMEL_ISC tristate "ATMEL Image Sensor Controller (ISC) support" - depends on VIDEO_V4L2 && COMMON_CLK && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && COMMON_CLK depends on ARCH_AT91 || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select REGMAP_MMIO select V4L2_FWNODE diff --git a/drivers/media/platform/cadence/Kconfig b/drivers/media/platform/cadence/Kconfig index c154e368d7011..80cf601323cee 100644 --- a/drivers/media/platform/cadence/Kconfig +++ b/drivers/media/platform/cadence/Kconfig @@ -13,8 +13,8 @@ if VIDEO_CADENCE config VIDEO_CADENCE_CSI2RX tristate "Cadence MIPI-CSI2 RX Controller" depends on VIDEO_V4L2 - depends on MEDIA_CONTROLLER - depends on VIDEO_V4L2_SUBDEV_API + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help Support for the Cadence MIPI CSI2 Receiver controller. @@ -25,8 +25,8 @@ config VIDEO_CADENCE_CSI2RX config VIDEO_CADENCE_CSI2TX tristate "Cadence MIPI-CSI2 TX Controller" depends on VIDEO_V4L2 - depends on MEDIA_CONTROLLER - depends on VIDEO_V4L2_SUBDEV_API + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help Support for the Cadence MIPI CSI2 Transceiver controller. diff --git a/drivers/media/platform/exynos4-is/Kconfig b/drivers/media/platform/exynos4-is/Kconfig index be4effcbfe7b2..136d3b2a0fbb3 100644 --- a/drivers/media/platform/exynos4-is/Kconfig +++ b/drivers/media/platform/exynos4-is/Kconfig @@ -2,9 +2,10 @@ config VIDEO_SAMSUNG_EXYNOS4_IS tristate "Samsung S5P/EXYNOS4 SoC series Camera Subsystem driver" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && OF && COMMON_CLK depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST - depends on OF && COMMON_CLK + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select V4L2_FWNODE help Say Y here to enable camera host interface devices for diff --git a/drivers/media/platform/rcar-vin/Kconfig b/drivers/media/platform/rcar-vin/Kconfig index 240ac3f3c9416..ca0d906dce2f6 100644 --- a/drivers/media/platform/rcar-vin/Kconfig +++ b/drivers/media/platform/rcar-vin/Kconfig @@ -1,8 +1,10 @@ # SPDX-License-Identifier: GPL-2.0 config VIDEO_RCAR_CSI2 tristate "R-Car MIPI CSI-2 Receiver" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF + depends on VIDEO_V4L2 && OF depends on ARCH_RENESAS || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select RESET_CONTROLLER select V4L2_FWNODE help @@ -14,8 +16,10 @@ config VIDEO_RCAR_CSI2 config VIDEO_RCAR_VIN tristate "R-Car Video Input (VIN) Driver" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF && MEDIA_CONTROLLER + depends on VIDEO_V4L2 && OF depends on ARCH_RENESAS || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select V4L2_FWNODE help diff --git a/drivers/media/platform/sunxi/sun4i-csi/Kconfig b/drivers/media/platform/sunxi/sun4i-csi/Kconfig index 93b4e82a26555..903c6152f6e88 100644 --- a/drivers/media/platform/sunxi/sun4i-csi/Kconfig +++ b/drivers/media/platform/sunxi/sun4i-csi/Kconfig @@ -2,8 +2,10 @@ config VIDEO_SUN4I_CSI tristate "Allwinner A10 CMOS Sensor Interface Support" - depends on VIDEO_V4L2 && COMMON_CLK && VIDEO_V4L2_SUBDEV_API && HAS_DMA + depends on VIDEO_V4L2 && COMMON_CLK && HAS_DMA depends on ARCH_SUNXI || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select V4L2_FWNODE help diff --git a/drivers/media/platform/sunxi/sun6i-csi/Kconfig b/drivers/media/platform/sunxi/sun6i-csi/Kconfig index 269b3ebf4f525..586e3fb3a80d6 100644 --- a/drivers/media/platform/sunxi/sun6i-csi/Kconfig +++ b/drivers/media/platform/sunxi/sun6i-csi/Kconfig @@ -1,8 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_SUN6I_CSI tristate "Allwinner V3s Camera Sensor Interface driver" - depends on VIDEO_V4L2 && COMMON_CLK && VIDEO_V4L2_SUBDEV_API && HAS_DMA + depends on VIDEO_V4L2 && COMMON_CLK && HAS_DMA depends on ARCH_SUNXI || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select REGMAP_MMIO select V4L2_FWNODE diff --git a/drivers/media/platform/xilinx/Kconfig b/drivers/media/platform/xilinx/Kconfig index a2773ad7c1859..01c96fb664148 100644 --- a/drivers/media/platform/xilinx/Kconfig +++ b/drivers/media/platform/xilinx/Kconfig @@ -2,7 +2,9 @@ config VIDEO_XILINX tristate "Xilinx Video IP (EXPERIMENTAL)" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF && HAS_DMA + depends on VIDEO_V4L2 && OF && HAS_DMA + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select V4L2_FWNODE help diff --git a/drivers/media/spi/Kconfig b/drivers/media/spi/Kconfig index bcc49cb47de63..bf385d503cab6 100644 --- a/drivers/media/spi/Kconfig +++ b/drivers/media/spi/Kconfig @@ -9,7 +9,9 @@ menu "SPI helper chips" config VIDEO_GS1662 tristate "Gennum Serializers video" - depends on SPI && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on SPI && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API help Enable the GS1662 driver which serializes video streams. diff --git a/drivers/media/test_drivers/vimc/Kconfig b/drivers/media/test_drivers/vimc/Kconfig index bd221d3e1a4af..4068a67585f93 100644 --- a/drivers/media/test_drivers/vimc/Kconfig +++ b/drivers/media/test_drivers/vimc/Kconfig @@ -1,7 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_VIMC tristate "Virtual Media Controller Driver (VIMC)" - depends on VIDEO_DEV && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_DEV && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_VMALLOC select VIDEO_V4L2_TPG help diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig index 99aed9a5b0b97..68e5b06cdab7c 100644 --- a/drivers/staging/media/hantro/Kconfig +++ b/drivers/staging/media/hantro/Kconfig @@ -2,8 +2,9 @@ config VIDEO_HANTRO tristate "Hantro VPU driver" depends on ARCH_MXC || ARCH_ROCKCHIP || COMPILE_TEST - depends on VIDEO_DEV && VIDEO_V4L2 && MEDIA_CONTROLLER - depends on MEDIA_CONTROLLER_REQUEST_API + depends on VIDEO_DEV && VIDEO_V4L2 + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV diff --git a/drivers/staging/media/imx/Kconfig b/drivers/staging/media/imx/Kconfig index 8f1ae50a4abd2..f555aac8a9d52 100644 --- a/drivers/staging/media/imx/Kconfig +++ b/drivers/staging/media/imx/Kconfig @@ -2,8 +2,9 @@ config VIDEO_IMX_MEDIA tristate "i.MX5/6 V4L2 media core driver" depends on ARCH_MXC || COMPILE_TEST - depends on MEDIA_CONTROLLER && VIDEO_V4L2 && IMX_IPUV3_CORE - depends on VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 && IMX_IPUV3_CORE + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API depends on HAS_DMA select VIDEOBUF2_DMA_CONTIG select V4L2_FWNODE diff --git a/drivers/staging/media/ipu3/Kconfig b/drivers/staging/media/ipu3/Kconfig index 4b51c67eac882..3e9640523e50a 100644 --- a/drivers/staging/media/ipu3/Kconfig +++ b/drivers/staging/media/ipu3/Kconfig @@ -2,8 +2,9 @@ config VIDEO_IPU3_IMGU tristate "Intel ipu3-imgu driver" depends on PCI && VIDEO_V4L2 - depends on MEDIA_CONTROLLER && VIDEO_V4L2_SUBDEV_API depends on X86 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select IOMMU_IOVA select VIDEOBUF2_DMA_SG help diff --git a/drivers/staging/media/omap4iss/Kconfig b/drivers/staging/media/omap4iss/Kconfig index 4dcbc5065821f..6c254907a27b4 100644 --- a/drivers/staging/media/omap4iss/Kconfig +++ b/drivers/staging/media/omap4iss/Kconfig @@ -2,8 +2,10 @@ config VIDEO_OMAP4 tristate "OMAP 4 Camera support" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && I2C + depends on VIDEO_V4L2 && I2C depends on ARCH_OMAP4 || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select MFD_SYSCON select VIDEOBUF2_DMA_CONTIG help diff --git a/drivers/staging/media/rkisp1/Kconfig b/drivers/staging/media/rkisp1/Kconfig index b859a493cabac..5ecbefa0f5ecd 100644 --- a/drivers/staging/media/rkisp1/Kconfig +++ b/drivers/staging/media/rkisp1/Kconfig @@ -2,8 +2,10 @@ config VIDEO_ROCKCHIP_ISP1 tristate "Rockchip Image Signal Processing v1 Unit driver" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + depends on VIDEO_V4L2 depends on ARCH_ROCKCHIP || COMPILE_TEST + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC select V4L2_FWNODE diff --git a/drivers/staging/media/sunxi/cedrus/Kconfig b/drivers/staging/media/sunxi/cedrus/Kconfig index 17733e9a088f7..da369950bbf2c 100644 --- a/drivers/staging/media/sunxi/cedrus/Kconfig +++ b/drivers/staging/media/sunxi/cedrus/Kconfig @@ -1,10 +1,11 @@ # SPDX-License-Identifier: GPL-2.0 config VIDEO_SUNXI_CEDRUS tristate "Allwinner Cedrus VPU driver" - depends on VIDEO_DEV && VIDEO_V4L2 && MEDIA_CONTROLLER + depends on VIDEO_DEV && VIDEO_V4L2 depends on HAS_DMA depends on OF - depends on MEDIA_CONTROLLER_REQUEST_API + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API select SUNXI_SRAM select VIDEOBUF2_DMA_CONTIG select V4L2_MEM2MEM_DEV -- GitLab From 7d5bc6930db43b737ef29e67b11b32624727802c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:14:15 +0100 Subject: [PATCH 020/503] media: Kconfig: reorganize the drivers menu options The comments before some of the drivers support look weird, because their Kconfig have their own "comment" directive inside it. So, rearrange them to make it look a little nicer for the ones with are not too familiar with the media system. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 9c32616f863af..b1a6874acbcc8 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -104,9 +104,7 @@ config MEDIA_TEST_SUPPORT In case of doubts, say N. -source "drivers/media/cec/Kconfig" - -source "drivers/media/mc/Kconfig" +comment "Multimedia core features" # # Video4Linux support @@ -130,8 +128,6 @@ config VIDEO_V4L2_SUBDEV_API This API is mostly used by camera interfaces in embedded platforms. -source "drivers/media/v4l2-core/Kconfig" - # # DVB Core # Only enables if one of DTV is selected @@ -174,7 +170,10 @@ config DVB_NET You may want to disable the network support on embedded devices. If unsure say Y. +source "drivers/media/v4l2-core/Kconfig" +source "drivers/media/mc/Kconfig" source "drivers/media/dvb-core/Kconfig" +source "drivers/media/cec/Kconfig" comment "Media drivers" @@ -182,6 +181,9 @@ source "drivers/media/usb/Kconfig" source "drivers/media/pci/Kconfig" source "drivers/media/radio/Kconfig" +# Common driver options +source "drivers/media/common/Kconfig" + if MEDIA_PLATFORM_SUPPORT source "drivers/media/platform/Kconfig" source "drivers/media/test_drivers/Kconfig" @@ -190,9 +192,6 @@ endif source "drivers/media/firewire/Kconfig" -# Common driver options -source "drivers/media/common/Kconfig" - comment "Media ancillary drivers (tuners, sensors, i2c, spi, frontends)" # -- GitLab From c39d57044a253a22b5cfc129d1f1f04be6199341 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 10:25:09 +0100 Subject: [PATCH 021/503] media: Kconfig: use a sub-menu to select supported devices The media subsystem has hundreds of driver-specific options. The *_SUPPORT config options work as a sort of filter, allowing to reduce its complexity for users that won't want to dig into thousands of options they don't need. Yet, it the filtering options are becoming large. So, let's place it on a sub-menu. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index b1a6874acbcc8..a57f898fa35e4 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -25,36 +25,35 @@ menuconfig MEDIA_SUPPORT Additional info and docs are available on the web at -if MEDIA_SUPPORT - -comment "Multimedia core support" +menu "Types of devices to be supported" + depends on MEDIA_SUPPORT # # Multimedia support - automatically enable V4L2 and DVB core # config MEDIA_CAMERA_SUPPORT - bool "Cameras/video grabbers support" + bool "Cameras and video grabbers" help Enable support for webcams and video grabbers. Say Y when you have a webcam or a video capture grabber board. config MEDIA_ANALOG_TV_SUPPORT - bool "Analog TV support" + bool "Analog TV" help Enable analog TV support. Say Y when you have a board with analog TV support. config MEDIA_DIGITAL_TV_SUPPORT - bool "Digital TV support" + bool "Digital TV" help Enable digital TV support. Say Y when you have a board with digital TV support. config MEDIA_RADIO_SUPPORT - bool "AM/FM radio receivers/transmitters support" + bool "AM/FM radio receivers/transmitters" help Enable AM/FM radio support. @@ -64,14 +63,14 @@ config MEDIA_RADIO_SUPPORT Say Y when you have a board with radio support. config MEDIA_SDR_SUPPORT - bool "Software defined radio support" + bool "Software defined radio" help Enable software defined radio support. Say Y when you have a software defined radio device. config MEDIA_CEC_SUPPORT - bool "HDMI CEC support" + bool "HDMI CEC" help Enable support for HDMI CEC (Consumer Electronics Control), which is an optional HDMI feature. @@ -80,7 +79,7 @@ config MEDIA_CEC_SUPPORT adapter that supports HDMI CEC. config MEDIA_PLATFORM_SUPPORT - bool "Platform-specific devices support" + bool "Platform-specific devices" help Enable support for complex cameras, codecs, and other hardware that are integrated at the CPU, GPU or on Image Signalling Processor @@ -92,7 +91,7 @@ config MEDIA_PLATFORM_SUPPORT Say Y when you want to be able so see such devices. config MEDIA_TEST_SUPPORT - bool "Test drivers support" + bool "Test drivers" help Those drivers should not be used on production Kernels, but can be useful on debug ones. It enables several dummy drivers @@ -103,6 +102,10 @@ config MEDIA_TEST_SUPPORT Say Y if you want to use some virtual test driver. In case of doubts, say N. + Say Y when you have a software defined radio device. +endmenu # Types of devices to be supported + +if MEDIA_SUPPORT comment "Multimedia core features" -- GitLab From c6774ee035dcb8782c59a3f7f958f36ad439793b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 11:36:10 +0100 Subject: [PATCH 022/503] media: Kconfig: make filtering devices optional The per-device option selection is a feature that some developers love, while others hate... So, let's make both happy by making it optional. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index a57f898fa35e4..8b070fb703f99 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -25,14 +25,32 @@ menuconfig MEDIA_SUPPORT Additional info and docs are available on the web at -menu "Types of devices to be supported" +if MEDIA_SUPPORT + +config MEDIA_SUPPORT_FILTER + bool "Filter devices by their types" depends on MEDIA_SUPPORT + help + Configuring the media subsystem can be complex, as there are + hundreds of drivers and other config options. + + This menu offers option that will help the Kernel's config + system to hide drivers that are out of the scope of the + user needs, and disabling core support for unused APIs. + + If not selected, all non-optional media core functionality + needed to support media drivers will be enabled. Also, all + media device drivers should be shown. + +menu "Media device types" + visible if MEDIA_SUPPORT_FILTER # # Multimedia support - automatically enable V4L2 and DVB core # config MEDIA_CAMERA_SUPPORT bool "Cameras and video grabbers" + default y if !MEDIA_SUPPORT_FILTER help Enable support for webcams and video grabbers. @@ -40,6 +58,7 @@ config MEDIA_CAMERA_SUPPORT config MEDIA_ANALOG_TV_SUPPORT bool "Analog TV" + default y if !MEDIA_SUPPORT_FILTER help Enable analog TV support. @@ -47,6 +66,7 @@ config MEDIA_ANALOG_TV_SUPPORT config MEDIA_DIGITAL_TV_SUPPORT bool "Digital TV" + default y if !MEDIA_SUPPORT_FILTER help Enable digital TV support. @@ -54,6 +74,7 @@ config MEDIA_DIGITAL_TV_SUPPORT config MEDIA_RADIO_SUPPORT bool "AM/FM radio receivers/transmitters" + default y if !MEDIA_SUPPORT_FILTER help Enable AM/FM radio support. @@ -64,6 +85,7 @@ config MEDIA_RADIO_SUPPORT config MEDIA_SDR_SUPPORT bool "Software defined radio" + default y if !MEDIA_SUPPORT_FILTER help Enable software defined radio support. @@ -71,6 +93,7 @@ config MEDIA_SDR_SUPPORT config MEDIA_CEC_SUPPORT bool "HDMI CEC" + default y if !MEDIA_SUPPORT_FILTER help Enable support for HDMI CEC (Consumer Electronics Control), which is an optional HDMI feature. @@ -80,6 +103,7 @@ config MEDIA_CEC_SUPPORT config MEDIA_PLATFORM_SUPPORT bool "Platform-specific devices" + default y if !MEDIA_SUPPORT_FILTER help Enable support for complex cameras, codecs, and other hardware that are integrated at the CPU, GPU or on Image Signalling Processor @@ -92,6 +116,7 @@ config MEDIA_PLATFORM_SUPPORT config MEDIA_TEST_SUPPORT bool "Test drivers" + default y if !MEDIA_SUPPORT_FILTER help Those drivers should not be used on production Kernels, but can be useful on debug ones. It enables several dummy drivers @@ -103,9 +128,7 @@ config MEDIA_TEST_SUPPORT In case of doubts, say N. Say Y when you have a software defined radio device. -endmenu # Types of devices to be supported - -if MEDIA_SUPPORT +endmenu # media device types comment "Multimedia core features" -- GitLab From ce971d957015d5ea8c7369114e701bc66d866c25 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 26 Mar 2020 09:44:13 +0100 Subject: [PATCH 023/503] media: Kconfig: warn if drivers are filtered As per a tester feedback, add an option to report when the drivers are filtered at the Kconfig menu. Cc: Helen Koike Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 8b070fb703f99..79aa83a966db0 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -28,7 +28,7 @@ menuconfig MEDIA_SUPPORT if MEDIA_SUPPORT config MEDIA_SUPPORT_FILTER - bool "Filter devices by their types" + bool "Filter media drivers" depends on MEDIA_SUPPORT help Configuring the media subsystem can be complex, as there are @@ -203,6 +203,9 @@ source "drivers/media/cec/Kconfig" comment "Media drivers" +comment "Drivers filtered as selected at 'Filter media drivers'" + depends on MEDIA_SUPPORT_FILTER + source "drivers/media/usb/Kconfig" source "drivers/media/pci/Kconfig" source "drivers/media/radio/Kconfig" -- GitLab From f1991411257bdb68d96ef8c8c5b35f412b480375 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 13:41:57 +0100 Subject: [PATCH 024/503] media: Kconfig: move CEC-specific options to cec/Kconfig There's no need to have the CEC definitions inside the media Kconfig, as the Kconfig parser doesn't require symbols to be declared before their usages. With that, the main Kconfig menu becomes cleaner. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 9 --------- drivers/media/cec/Kconfig | 10 ++++++++++ 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 79aa83a966db0..9cc528e0b1207 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -3,15 +3,6 @@ # Multimedia device configuration # -config CEC_CORE - tristate - -config CEC_NOTIFIER - bool - -config CEC_PIN - bool - source "drivers/media/rc/Kconfig" menuconfig MEDIA_SUPPORT diff --git a/drivers/media/cec/Kconfig b/drivers/media/cec/Kconfig index c01919713ab95..31417feaa213d 100644 --- a/drivers/media/cec/Kconfig +++ b/drivers/media/cec/Kconfig @@ -1,4 +1,14 @@ # SPDX-License-Identifier: GPL-2.0-only + +config CEC_CORE + tristate + +config CEC_NOTIFIER + bool + +config CEC_PIN + bool + config MEDIA_CEC_RC bool "HDMI CEC RC integration" depends on CEC_CORE && RC_CORE -- GitLab From 10713a9420403837ea55d5bbf8650dab36841ae6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 13:47:11 +0100 Subject: [PATCH 025/503] media: Kconfig: move DVB-specific options to dvb-core/Kconfig In order to cleanup the main media Kconfig, move the DVB-core specific options to dvb-core/Kconfig. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 21 --------------------- drivers/media/dvb-core/Kconfig | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 21 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 9cc528e0b1207..dda449556f224 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -161,31 +161,10 @@ config DVB_CORE default y select CRC32 -config DVB_MMAP - bool "Enable DVB memory-mapped API (EXPERIMENTAL)" - depends on DVB_CORE - depends on VIDEO_V4L2=y || VIDEO_V4L2=DVB_CORE - select VIDEOBUF2_VMALLOC help - This option enables DVB experimental memory-mapped API, which - reduces the number of context switches to read DVB buffers, as - the buffers can use mmap() syscalls. - Support for it is experimental. Use with care. If unsure, - say N. -config DVB_NET - bool "DVB Network Support" - default (NET && INET) - depends on NET && INET && DVB_CORE - help - This option enables DVB Network Support which is a part of the DVB - standard. It is used, for example, by automatic firmware updates used - on Set-Top-Boxes. It can also be used to access the Internet via the - DVB card, if the network provider supports it. - You may want to disable the network support on embedded devices. If - unsure say Y. source "drivers/media/v4l2-core/Kconfig" source "drivers/media/mc/Kconfig" diff --git a/drivers/media/dvb-core/Kconfig b/drivers/media/dvb-core/Kconfig index 61f9e1ce99cb6..6ffac618417b7 100644 --- a/drivers/media/dvb-core/Kconfig +++ b/drivers/media/dvb-core/Kconfig @@ -3,6 +3,32 @@ # DVB device configuration # +config DVB_MMAP + bool "Enable DVB memory-mapped API (EXPERIMENTAL)" + depends on DVB_CORE + depends on VIDEO_V4L2=y || VIDEO_V4L2=DVB_CORE + select VIDEOBUF2_VMALLOC + help + This option enables DVB experimental memory-mapped API, which + reduces the number of context switches to read DVB buffers, as + the buffers can use mmap() syscalls. + + Support for it is experimental. Use with care. If unsure, + say N. + +config DVB_NET + bool "DVB Network Support" + default (NET && INET) + depends on NET && INET && DVB_CORE + help + This option enables DVB Network Support which is a part of the DVB + standard. It is used, for example, by automatic firmware updates used + on Set-Top-Boxes. It can also be used to access the Internet via the + DVB card, if the network provider supports it. + + You may want to disable the network support on embedded devices. If + unsure say Y. + config DVB_MAX_ADAPTERS int "maximum number of DVB/ATSC adapters" depends on DVB_CORE -- GitLab From 8164ab872115396ed8329f25a643bcc87500867d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 13:50:33 +0100 Subject: [PATCH 026/503] media: Kconfig: move V4L2 subdev API to v4l2-core/Kconfig This option is part of V4L2 API extra functionality set. Move it to be at the v4l2-core/Kconfig, where it belongs, cleaning the main Kconfig file. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 9 --------- drivers/media/v4l2-core/Kconfig | 9 +++++++++ 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index dda449556f224..f14b583c9ee11 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -136,15 +136,6 @@ config VIDEO_DEV prompt "Video4Linux core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_TEST_SUPPORT || MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI -config VIDEO_V4L2_SUBDEV_API - bool "V4L2 sub-device userspace API" - depends on VIDEO_DEV && MEDIA_CONTROLLER - help - Enables the V4L2 sub-device pad-level userspace API used to configure - video format, size and frame rate between hardware blocks. - - This API is mostly used by camera interfaces in embedded platforms. - # # DVB Core # Only enables if one of DTV is selected diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig index 26276b257eaee..33aa7fe571f8d 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig @@ -16,6 +16,15 @@ config VIDEO_V4L2_I2C depends on I2C && VIDEO_V4L2 default y +config VIDEO_V4L2_SUBDEV_API + bool "V4L2 sub-device userspace API" + depends on VIDEO_DEV && MEDIA_CONTROLLER + help + Enables the V4L2 sub-device pad-level userspace API used to configure + video format, size and frame rate between hardware blocks. + + This API is mostly used by camera interfaces in embedded platforms. + config VIDEO_ADV_DEBUG bool "Enable advanced debug functionality on V4L2 drivers" help -- GitLab From 8fc42fff164b92dbea1961533875730314e8fe34 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 13:59:23 +0100 Subject: [PATCH 027/503] media: Kconfig: move media controller core select to main Kconfig Let's place the main API selections at the media/Kconfig file, as this way we can better organize things. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 9 +++++++++ drivers/media/mc/Kconfig | 9 --------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index f14b583c9ee11..9c1de28ef070b 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -136,6 +136,15 @@ config VIDEO_DEV prompt "Video4Linux core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_TEST_SUPPORT || MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI +config MEDIA_CONTROLLER + bool "Media Controller API" + default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT || MEDIA_PLATFORM_SUPPORT + help + Enable the media controller API used to query media devices internal + topology and configure it dynamically. + + This API is mostly used by camera interfaces in embedded platforms. + # # DVB Core # Only enables if one of DTV is selected diff --git a/drivers/media/mc/Kconfig b/drivers/media/mc/Kconfig index e740ace54d7f3..002a918c4c75b 100644 --- a/drivers/media/mc/Kconfig +++ b/drivers/media/mc/Kconfig @@ -5,15 +5,6 @@ # Selectable only for webcam/grabbers, as other drivers don't use it # -config MEDIA_CONTROLLER - bool "Media Controller API" - default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT || MEDIA_PLATFORM_SUPPORT - help - Enable the media controller API used to query media devices internal - topology and configure it dynamically. - - This API is mostly used by camera interfaces in embedded platforms. - config MEDIA_CONTROLLER_DVB bool "Enable Media controller for DVB (EXPERIMENTAL)" depends on MEDIA_CONTROLLER && DVB_CORE -- GitLab From 5e9e60f4214153e66217310b55ca52946181c933 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 14:09:23 +0100 Subject: [PATCH 028/503] media: Kconfig: place all options under a sub-menu That should make easier for people setting the media subsystem config options, as they'll be split by the type of functionality that will be enabled. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 9c1de28ef070b..c95b534c5d40d 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -121,12 +121,9 @@ config MEDIA_TEST_SUPPORT Say Y when you have a software defined radio device. endmenu # media device types -comment "Multimedia core features" -# -# Video4Linux support -# Only enables if one of the V4L2 types (ATV, webcam, radio) is selected -# +menu "Media core support" + visible if !MEDIA_SUPPORT_FILTER comment "Video4Linux core enabled to support hybrid TV devices" depends on MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI @@ -135,6 +132,9 @@ config VIDEO_DEV tristate prompt "Video4Linux core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_TEST_SUPPORT || MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI + help + Enables the V4L2 API, used by cameras, analog TV, video grabbers, + radio devices and by some input devices. config MEDIA_CONTROLLER bool "Media Controller API" @@ -158,20 +158,24 @@ config DVB_CORE prompt "Digital TV core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) depends on MEDIA_DIGITAL_TV_SUPPORT depends on (I2C || I2C=n) - default y select CRC32 - help + Enables the DVB API, used by Digital TV devices. Supports several + standards, including DVB, ATSC, ISDB and CMDB. +endmenu # Media core support +# +# Extra per-media API core functionality - +menu "Media core additional options" source "drivers/media/v4l2-core/Kconfig" source "drivers/media/mc/Kconfig" source "drivers/media/dvb-core/Kconfig" source "drivers/media/cec/Kconfig" +endmenu -comment "Media drivers" +menu "Media drivers" comment "Drivers filtered as selected at 'Filter media drivers'" depends on MEDIA_SUPPORT_FILTER @@ -191,7 +195,9 @@ endif source "drivers/media/firewire/Kconfig" -comment "Media ancillary drivers (tuners, sensors, i2c, spi, frontends)" +endmenu + +menu "Media ancillary drivers (tuners, sensors, i2c, spi, frontends)" # # Ancillary drivers (tuners, i2c, spi, frontends) @@ -236,4 +242,6 @@ source "drivers/media/spi/Kconfig" source "drivers/media/tuners/Kconfig" source "drivers/media/dvb-frontends/Kconfig" +endmenu + endif # MEDIA_SUPPORT -- GitLab From 1b80d36aeb92a767da8c75eb0118cfe4b34b840c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 14:24:41 +0100 Subject: [PATCH 029/503] media: Kconfig: move the position of sub-driver autoselection Let's place the sub-driver-autoselection option just below the device filtering one, as it also controls a filter menu, with is not even visible if !EXPERT && !EMBEDDED. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 50 +++++++++++++++++++++---------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index c95b534c5d40d..db918a89e40ef 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -33,6 +33,28 @@ config MEDIA_SUPPORT_FILTER needed to support media drivers will be enabled. Also, all media device drivers should be shown. +config MEDIA_SUBDRV_AUTOSELECT + bool "Autoselect ancillary drivers (tuners, sensors, i2c, spi, frontends)" + depends on HAS_IOMEM + select I2C + select I2C_MUX + default y if MEDIA_SUPPORT_FILTER + help + By default, a media driver auto-selects all possible ancillary + devices such as tuners, sensors, video encoders/decoders and + frontends, that are used by any of the supported devices. + + This is generally the right thing to do, except when there + are strict constraints with regards to the kernel size, + like on embedded systems. + + Use this option with care, as deselecting ancillary drivers which + are, in fact, necessary will result in the lack of the needed + functionality for your device (it may not tune or may not have + the needed demodulators). + + If unsure say Y. + menu "Media device types" visible if MEDIA_SUPPORT_FILTER @@ -197,40 +219,18 @@ source "drivers/media/firewire/Kconfig" endmenu -menu "Media ancillary drivers (tuners, sensors, i2c, spi, frontends)" - # # Ancillary drivers (tuners, i2c, spi, frontends) # -config MEDIA_SUBDRV_AUTOSELECT - bool "Autoselect ancillary drivers (tuners, sensors, i2c, spi, frontends)" - depends on MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT || MEDIA_CAMERA_SUPPORT || MEDIA_SDR_SUPPORT - depends on HAS_IOMEM - select I2C - select I2C_MUX - default y if !EMBEDDED - help - By default, a media driver auto-selects all possible ancillary - devices such as tuners, sensors, video encoders/decoders and - frontends, that are used by any of the supported devices. - - This is generally the right thing to do, except when there - are strict constraints with regards to the kernel size, - like on embedded systems. - - Use this option with care, as deselecting ancillary drivers which - are, in fact, necessary will result in the lack of the needed - functionality for your device (it may not tune or may not have - the needed demodulators). - - If unsure say Y. - config MEDIA_HIDE_ANCILLARY_SUBDRV bool depends on MEDIA_SUBDRV_AUTOSELECT && !COMPILE_TEST && !EXPERT default y +menu "Media ancillary drivers" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV + config MEDIA_ATTACH bool depends on MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT || MEDIA_RADIO_SUPPORT -- GitLab From b0cd4fb276653f8f18cdbc1bcc041a4227bdb9da Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 24 Mar 2020 14:29:57 +0100 Subject: [PATCH 030/503] media: Kconfig: on !EMBEDDED && !EXPERT, enable driver filtering Advanced and embedded users know what to do, so, by default, they will likely want to be able to open the entire set of Kconfig media options. Normal "poor" users usually needs more help when setting stuff, so let's open an more simplified version to them by default. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index db918a89e40ef..913903c8e9422 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -21,6 +21,7 @@ if MEDIA_SUPPORT config MEDIA_SUPPORT_FILTER bool "Filter media drivers" depends on MEDIA_SUPPORT + default y if !EMBEDDED && !EXPERT help Configuring the media subsystem can be complex, as there are hundreds of drivers and other config options. -- GitLab From 0c822d97bd1450034576a8331b92d7e912326551 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Mar 2020 11:15:15 +0100 Subject: [PATCH 031/503] media: Kconfig: Better organize the per-API options After this change, the menu is displayed like above. 1) When filtering is not active: --- Multimedia support [ ] Filter devices by their types [*] Autoselect ancillary drivers (tuners, sensors, i2c, spi, frontends) Media core support ---> Video4Linux options ---> Media controller options ---> Digital TV options ---> HDMI CEC options ---> Media drivers ---> 2) When filtering is active: --- Multimedia support [*] Filter devices by their types [*] Autoselect ancillary drivers (tuners, sensors, i2c, spi, frontends) Media device types ---> Video4Linux options ---> Media controller options ---> Digital TV options ---> HDMI CEC options ---> Media drivers ---> The per-API menu will only be displayed if the corresponding core support is enabled. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 913903c8e9422..382366b8ab46d 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -191,10 +191,27 @@ endmenu # Media core support # # Extra per-media API core functionality -menu "Media core additional options" +menu "Video4Linux options" + visible if VIDEO_DEV + source "drivers/media/v4l2-core/Kconfig" +endmenu + +menu "Media controller options" + visible if MEDIA_CONTROLLER + source "drivers/media/mc/Kconfig" +endmenu + +menu "Digital TV options" + visible if DVB_CORE + source "drivers/media/dvb-core/Kconfig" +endmenu + +menu "HDMI CEC options" + visible if CEC_CORE + source "drivers/media/cec/Kconfig" endmenu -- GitLab From f48fd1514212b5c72b98db79efee4ed914acf662 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Mar 2020 15:56:15 +0100 Subject: [PATCH 032/503] media: i2c/Kconfig: reorganize items there Right now, there are I2C drivers that don't depend on camera support before and after those. Move the camera support drivers to the end, and add a notice at the "endif", in order to make easier to maintain and to avoid adding extra dependencies at the other i2c/*/Kconfig files. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/Kconfig | 216 +++++++++++++++++++------------------- 1 file changed, 106 insertions(+), 110 deletions(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 4bc4cfea2f201..efd12bf4f8eb3 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -581,13 +581,106 @@ config VIDEO_THS8200 To compile this driver as a module, choose M here: the module will be called ths8200. -comment "Camera sensor devices" +comment "Video improvement chips" -config VIDEO_APTINA_PLL - tristate +config VIDEO_UPD64031A + tristate "NEC Electronics uPD64031A Ghost Reduction" + depends on VIDEO_V4L2 && I2C + help + Support for the NEC Electronics uPD64031A Ghost Reduction + video chip. It is most often found in NTSC TV cards made for + Japan and is used to reduce the 'ghosting' effect that can + be present in analog TV broadcasts. -config VIDEO_SMIAPP_PLL - tristate + To compile this driver as a module, choose M here: the + module will be called upd64031a. + +config VIDEO_UPD64083 + tristate "NEC Electronics uPD64083 3-Dimensional Y/C separation" + depends on VIDEO_V4L2 && I2C + help + Support for the NEC Electronics uPD64083 3-Dimensional Y/C + separation video chip. It is used to improve the quality of + the colors of a composite signal. + + To compile this driver as a module, choose M here: the + module will be called upd64083. + +comment "Audio/Video compression chips" + +config VIDEO_SAA6752HS + tristate "Philips SAA6752HS MPEG-2 Audio/Video Encoder" + depends on VIDEO_V4L2 && I2C + select CRC32 + help + Support for the Philips SAA6752HS MPEG-2 video and MPEG-audio/AC-3 + audio encoder with multiplexer. + + To compile this driver as a module, choose M here: the + module will be called saa6752hs. + +comment "SDR tuner chips" + +config SDR_MAX2175 + tristate "Maxim 2175 RF to Bits tuner" + depends on VIDEO_V4L2 && MEDIA_SDR_SUPPORT && I2C + select REGMAP_I2C + help + Support for Maxim 2175 tuner. It is an advanced analog/digital + radio receiver with RF-to-Bits front-end designed for SDR solutions. + + To compile this driver as a module, choose M here; the + module will be called max2175. + +comment "Miscellaneous helper chips" + +config VIDEO_THS7303 + tristate "THS7303/53 Video Amplifier" + depends on VIDEO_V4L2 && I2C + help + Support for TI THS7303/53 video amplifier + + To compile this driver as a module, choose M here: the + module will be called ths7303. + +config VIDEO_M52790 + tristate "Mitsubishi M52790 A/V switch" + depends on VIDEO_V4L2 && I2C + help + Support for the Mitsubishi M52790 A/V switch. + + To compile this driver as a module, choose M here: the + module will be called m52790. + +config VIDEO_I2C + tristate "I2C transport video support" + depends on VIDEO_V4L2 && I2C + select VIDEOBUF2_VMALLOC + imply HWMON + help + Enable the I2C transport video support which supports the + following: + * Panasonic AMG88xx Grid-Eye Sensors + * Melexis MLX90640 Thermal Cameras + + To compile this driver as a module, choose M here: the + module will be called video-i2c + +config VIDEO_ST_MIPID02 + tristate "STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge" + depends on I2C && VIDEO_V4L2 + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API + select V4L2_FWNODE + help + Support for STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge. + It is used to allow usage of CSI-2 sensor with PARALLEL port + controller. + + To compile this driver as a module, choose M here: the + module will be called st-mipid02. + +endmenu # # All drivers that are related to Media Camera Support should be here @@ -595,6 +688,14 @@ config VIDEO_SMIAPP_PLL if MEDIA_CAMERA_SUPPORT +comment "Camera sensor devices" + +config VIDEO_APTINA_PLL + tristate + +config VIDEO_SMIAPP_PLL + tristate + config VIDEO_HI556 tristate "Hynix Hi-556 sensor support" depends on I2C && VIDEO_V4L2 @@ -1162,109 +1263,4 @@ config VIDEO_LM3646 endif # MEDIA_CAMERA_SUPPORT -# -# Other V4L2 drivers that aren't related with Camera support -# - -comment "Video improvement chips" - -config VIDEO_UPD64031A - tristate "NEC Electronics uPD64031A Ghost Reduction" - depends on VIDEO_V4L2 && I2C - help - Support for the NEC Electronics uPD64031A Ghost Reduction - video chip. It is most often found in NTSC TV cards made for - Japan and is used to reduce the 'ghosting' effect that can - be present in analog TV broadcasts. - - To compile this driver as a module, choose M here: the - module will be called upd64031a. - -config VIDEO_UPD64083 - tristate "NEC Electronics uPD64083 3-Dimensional Y/C separation" - depends on VIDEO_V4L2 && I2C - help - Support for the NEC Electronics uPD64083 3-Dimensional Y/C - separation video chip. It is used to improve the quality of - the colors of a composite signal. - - To compile this driver as a module, choose M here: the - module will be called upd64083. - -comment "Audio/Video compression chips" - -config VIDEO_SAA6752HS - tristate "Philips SAA6752HS MPEG-2 Audio/Video Encoder" - depends on VIDEO_V4L2 && I2C - select CRC32 - help - Support for the Philips SAA6752HS MPEG-2 video and MPEG-audio/AC-3 - audio encoder with multiplexer. - - To compile this driver as a module, choose M here: the - module will be called saa6752hs. - -comment "SDR tuner chips" - -config SDR_MAX2175 - tristate "Maxim 2175 RF to Bits tuner" - depends on VIDEO_V4L2 && MEDIA_SDR_SUPPORT && I2C - select REGMAP_I2C - help - Support for Maxim 2175 tuner. It is an advanced analog/digital - radio receiver with RF-to-Bits front-end designed for SDR solutions. - - To compile this driver as a module, choose M here; the - module will be called max2175. - -comment "Miscellaneous helper chips" - -config VIDEO_THS7303 - tristate "THS7303/53 Video Amplifier" - depends on VIDEO_V4L2 && I2C - help - Support for TI THS7303/53 video amplifier - - To compile this driver as a module, choose M here: the - module will be called ths7303. - -config VIDEO_M52790 - tristate "Mitsubishi M52790 A/V switch" - depends on VIDEO_V4L2 && I2C - help - Support for the Mitsubishi M52790 A/V switch. - - To compile this driver as a module, choose M here: the - module will be called m52790. - -config VIDEO_I2C - tristate "I2C transport video support" - depends on VIDEO_V4L2 && I2C - select VIDEOBUF2_VMALLOC - imply HWMON - help - Enable the I2C transport video support which supports the - following: - * Panasonic AMG88xx Grid-Eye Sensors - * Melexis MLX90640 Thermal Cameras - - To compile this driver as a module, choose M here: the - module will be called video-i2c - -config VIDEO_ST_MIPID02 - tristate "STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge" - depends on I2C && VIDEO_V4L2 - select MEDIA_CONTROLLER - select VIDEO_V4L2_SUBDEV_API - select V4L2_FWNODE - help - Support for STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge. - It is used to allow usage of CSI-2 sensor with PARALLEL port - controller. - - To compile this driver as a module, choose M here: the - module will be called st-mipid02. - -endmenu - endif # VIDEO_V4L2 -- GitLab From b6a7d1bcc55fd297ad4bf341237f08ca989adf93 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 25 Mar 2020 16:33:35 +0100 Subject: [PATCH 033/503] media: Kconfig: don't use visible for device type select While making the menu invisible seemed a good idea, there's a drawback: when the menu is not visible, it is not parsing the "default" dependency. So, instead, let's just avoid the items at the menu to be prompted, by using the "prompt ... if" construction. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 382366b8ab46d..0972a42e7e0c7 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -57,13 +57,13 @@ config MEDIA_SUBDRV_AUTOSELECT If unsure say Y. menu "Media device types" - visible if MEDIA_SUPPORT_FILTER # # Multimedia support - automatically enable V4L2 and DVB core # config MEDIA_CAMERA_SUPPORT - bool "Cameras and video grabbers" + bool + prompt "Cameras and video grabbers" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Enable support for webcams and video grabbers. @@ -71,7 +71,8 @@ config MEDIA_CAMERA_SUPPORT Say Y when you have a webcam or a video capture grabber board. config MEDIA_ANALOG_TV_SUPPORT - bool "Analog TV" + bool + prompt "Analog TV" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Enable analog TV support. @@ -79,7 +80,8 @@ config MEDIA_ANALOG_TV_SUPPORT Say Y when you have a board with analog TV support. config MEDIA_DIGITAL_TV_SUPPORT - bool "Digital TV" + bool + prompt "Digital TV" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Enable digital TV support. @@ -87,7 +89,8 @@ config MEDIA_DIGITAL_TV_SUPPORT Say Y when you have a board with digital TV support. config MEDIA_RADIO_SUPPORT - bool "AM/FM radio receivers/transmitters" + bool + prompt "AM/FM radio receivers/transmitters" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Enable AM/FM radio support. @@ -98,7 +101,8 @@ config MEDIA_RADIO_SUPPORT Say Y when you have a board with radio support. config MEDIA_SDR_SUPPORT - bool "Software defined radio" + bool + prompt "Software defined radio" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Enable software defined radio support. @@ -106,7 +110,8 @@ config MEDIA_SDR_SUPPORT Say Y when you have a software defined radio device. config MEDIA_CEC_SUPPORT - bool "HDMI CEC" + bool + prompt "HDMI CEC support" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Enable support for HDMI CEC (Consumer Electronics Control), @@ -116,7 +121,8 @@ config MEDIA_CEC_SUPPORT adapter that supports HDMI CEC. config MEDIA_PLATFORM_SUPPORT - bool "Platform-specific devices" + bool + prompt "Platform-specific devices" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Enable support for complex cameras, codecs, and other hardware @@ -129,7 +135,8 @@ config MEDIA_PLATFORM_SUPPORT Say Y when you want to be able so see such devices. config MEDIA_TEST_SUPPORT - bool "Test drivers" + bool + prompt "Test drivers" if MEDIA_SUPPORT_FILTER default y if !MEDIA_SUPPORT_FILTER help Those drivers should not be used on production Kernels, but -- GitLab From 485f9a434c165441fafec9259fa1057c399af903 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 12:53:28 +0100 Subject: [PATCH 034/503] media: docs: avermedia.rst: mark a table as such There's a table on this file, with aren't using the ReST markups. Fix that. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/dvb-drivers/avermedia.rst | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/media/dvb-drivers/avermedia.rst b/Documentation/media/dvb-drivers/avermedia.rst index 14f437ca38d38..bf35fd88e1640 100644 --- a/Documentation/media/dvb-drivers/avermedia.rst +++ b/Documentation/media/dvb-drivers/avermedia.rst @@ -172,12 +172,16 @@ Dandenong. The frequencies broadcast by Mount Dandenong are: Table 1. Transponder Frequencies Mount Dandenong, Vic, Aus. + +=========== ======= =========== Broadcaster Channel Frequency +=========== ======= =========== ABC VHF 12 226.5 MHz TEN VHF 11 219.5 MHz NINE VHF 8 191.625 MHz SEVEN VHF 6 177.5 MHz SBS UHF 29 536.5 MHz +=========== ======= =========== The Scan utility has a set of compiled-in defaults for various countries and regions, but if they do not suit, or if you have -- GitLab From c8b667ac517ecb5fada1c085236a9c05d0e303ca Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:49:04 +0100 Subject: [PATCH 035/503] media: docs: move soc-camera.rst to staging As the entire soc_camera driver is on staging to be removed soon, let's place there its documentation too. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/index.rst | 1 - .../staging/media/soc_camera}/soc-camera.rst | 0 2 files changed, 1 deletion(-) rename {Documentation/media/v4l-drivers => drivers/staging/media/soc_camera}/soc-camera.rst (100%) diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index b41fea23fe5d5..eca22b82de94a 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -61,7 +61,6 @@ For more details see the file COPYING in the source distribution of Linux. si470x si4713 si476x - soc-camera uvcvideo vimc vivid diff --git a/Documentation/media/v4l-drivers/soc-camera.rst b/drivers/staging/media/soc_camera/soc-camera.rst similarity index 100% rename from Documentation/media/v4l-drivers/soc-camera.rst rename to drivers/staging/media/soc_camera/soc-camera.rst -- GitLab From 64a881836a91304cc1ff8d108b12366609a27510 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 16:15:25 +0100 Subject: [PATCH 036/503] media: docs: split cpia2.rst on two files In order to be able to better organize the subsystem, split the cpia2 information on two files: one user-facing and another one from Kernel development PoV. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/cpia2.rst | 46 --------------- .../media/v4l-drivers/cpia2_devel.rst | 56 +++++++++++++++++++ Documentation/media/v4l-drivers/index.rst | 2 + 3 files changed, 58 insertions(+), 46 deletions(-) create mode 100644 Documentation/media/v4l-drivers/cpia2_devel.rst diff --git a/Documentation/media/v4l-drivers/cpia2.rst b/Documentation/media/v4l-drivers/cpia2.rst index a86baa1c83f1b..6f4258aebbfe2 100644 --- a/Documentation/media/v4l-drivers/cpia2.rst +++ b/Documentation/media/v4l-drivers/cpia2.rst @@ -147,49 +147,3 @@ We are providing a modified gqcam application to view the output. In order to avoid confusion, here it is called mview. There is also the qx5view program which can also control the lights on the qx5 microscope. MJPEG Tools (http://mjpeg.sourceforge.net) can also be used to record from the camera. - -Notes to developers -~~~~~~~~~~~~~~~~~~~ - - - This is a driver version stripped of the 2.4 back compatibility - and old MJPEG ioctl API. See cpia2.sf.net for 2.4 support. - -Programmer's overview of cpia2 driver -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -Cpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a -division of ST Microelectronics). There are two versions. The first is the -STV0672, which is capable of up to 30 frames per second (fps) in frame sizes -up to CIF, and 15 fps for VGA frames. The STV0676 is an improved version, -which can handle up to 30 fps VGA. Both coprocessors can be attached to two -CMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor. These will -be referred to as the 410 and the 500 sensors, or the CIF and VGA sensors. - -The two chipsets operate almost identically. The core is an 8051 processor, -running two different versions of firmware. The 672 runs the VP4 video -processor code, the 676 runs VP5. There are a few differences in register -mappings for the two chips. In these cases, the symbols defined in the -header files are marked with VP4 or VP5 as part of the symbol name. - -The cameras appear externally as three sets of registers. Setting register -values is the only way to control the camera. Some settings are -interdependant, such as the sequence required to power up the camera. I will -try to make note of all of these cases. - -The register sets are called blocks. Block 0 is the system block. This -section is always powered on when the camera is plugged in. It contains -registers that control housekeeping functions such as powering up the video -processor. The video processor is the VP block. These registers control -how the video from the sensor is processed. Examples are timing registers, -user mode (vga, qvga), scaling, cropping, framerates, and so on. The last -block is the video compressor (VC). The video stream sent from the camera is -compressed as Motion JPEG (JPEGA). The VC controls all of the compression -parameters. Looking at the file cpia2_registers.h, you can get a full view -of these registers and the possible values for most of them. - -One or more registers can be set or read by sending a usb control message to -the camera. There are three modes for this. Block mode requests a number -of contiguous registers. Random mode reads or writes random registers with -a tuple structure containing address/value pairs. The repeat mode is only -used by VP4 to load a firmware patch. It contains a starting address and -a sequence of bytes to be written into a gpio port. diff --git a/Documentation/media/v4l-drivers/cpia2_devel.rst b/Documentation/media/v4l-drivers/cpia2_devel.rst new file mode 100644 index 0000000000000..decaa4768c786 --- /dev/null +++ b/Documentation/media/v4l-drivers/cpia2_devel.rst @@ -0,0 +1,56 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The cpia2 driver +================ + +Authors: Peter Pregler , +Scott J. Bertin , and +Jarl Totland for the original cpia driver, which +this one was modelled from. + + +Notes to developers +~~~~~~~~~~~~~~~~~~~ + + - This is a driver version stripped of the 2.4 back compatibility + and old MJPEG ioctl API. See cpia2.sf.net for 2.4 support. + +Programmer's overview of cpia2 driver +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Cpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a +division of ST Microelectronics). There are two versions. The first is the +STV0672, which is capable of up to 30 frames per second (fps) in frame sizes +up to CIF, and 15 fps for VGA frames. The STV0676 is an improved version, +which can handle up to 30 fps VGA. Both coprocessors can be attached to two +CMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor. These will +be referred to as the 410 and the 500 sensors, or the CIF and VGA sensors. + +The two chipsets operate almost identically. The core is an 8051 processor, +running two different versions of firmware. The 672 runs the VP4 video +processor code, the 676 runs VP5. There are a few differences in register +mappings for the two chips. In these cases, the symbols defined in the +header files are marked with VP4 or VP5 as part of the symbol name. + +The cameras appear externally as three sets of registers. Setting register +values is the only way to control the camera. Some settings are +interdependant, such as the sequence required to power up the camera. I will +try to make note of all of these cases. + +The register sets are called blocks. Block 0 is the system block. This +section is always powered on when the camera is plugged in. It contains +registers that control housekeeping functions such as powering up the video +processor. The video processor is the VP block. These registers control +how the video from the sensor is processed. Examples are timing registers, +user mode (vga, qvga), scaling, cropping, framerates, and so on. The last +block is the video compressor (VC). The video stream sent from the camera is +compressed as Motion JPEG (JPEGA). The VC controls all of the compression +parameters. Looking at the file cpia2_registers.h, you can get a full view +of these registers and the possible values for most of them. + +One or more registers can be set or read by sending a usb control message to +the camera. There are three modes for this. Block mode requests a number +of contiguous registers. Random mode reads or writes random registers with +a tuple structure containing address/value pairs. The repeat mode is only +used by VP4 to load a firmware patch. It contains a starting address and +a sequence of bytes to be written into a gpio port. diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index eca22b82de94a..72fbb394f6a20 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -65,3 +65,5 @@ For more details see the file COPYING in the source distribution of Linux. vimc vivid zr364xx + + cpia2_devel -- GitLab From f40b814a3d5ad5275580bba3d005e442d7e3f361 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 14:31:12 +0100 Subject: [PATCH 037/503] media: docs: split ci.rst into uAPI and user guide docs The ci.rst file contains two parts: the first one describing how to use the CA high level interface; the second one with uAPI internals. Split this on two separate files, adding the uAPI bits to the DVB ca.rst configuration. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/dvb-drivers/ci.rst | 160 +----------------- Documentation/media/uapi/dvb/ca.rst | 1 + .../media/uapi/dvb/ca_high_level.rst | 157 +++++++++++++++++ 3 files changed, 161 insertions(+), 157 deletions(-) create mode 100644 Documentation/media/uapi/dvb/ca_high_level.rst diff --git a/Documentation/media/dvb-drivers/ci.rst b/Documentation/media/dvb-drivers/ci.rst index 35f33f1f9e2af..ded4d8fbbf92d 100644 --- a/Documentation/media/dvb-drivers/ci.rst +++ b/Documentation/media/dvb-drivers/ci.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0 -Digital TV Conditional Access Interface (CI API) -================================================ +Digital TV Conditional Access Interface +======================================= .. note:: @@ -15,7 +15,7 @@ existing low level CI API. .. note:: For the Twinhan/Twinhan clones, the dst_ca module handles the CI - hardware handling.This module is loaded automatically if a CI + hardware handling. This module is loaded automatically if a CI (Common Interface, that holds the CAM (Conditional Access Module) is detected. @@ -75,157 +75,3 @@ Modules that have been tested by this driver at present are (1) Irdeto 1 and 2 from SCM (2) Viaccess from SCM (3) Dragoncam - -The High level CI API -~~~~~~~~~~~~~~~~~~~~~ - -For the programmer -^^^^^^^^^^^^^^^^^^ - -With the High Level CI approach any new card with almost any random -architecture can be implemented with this style, the definitions -inside the switch statement can be easily adapted for any card, thereby -eliminating the need for any additional ioctls. - -The disadvantage is that the driver/hardware has to manage the rest. For -the application programmer it would be as simple as sending/receiving an -array to/from the CI ioctls as defined in the Linux DVB API. No changes -have been made in the API to accommodate this feature. - - -Why the need for another CI interface? -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -This is one of the most commonly asked question. Well a nice question. -Strictly speaking this is not a new interface. - -The CI interface is defined in the DVB API in ca.h as: - -.. code-block:: c - - typedef struct ca_slot_info { - int num; /* slot number */ - - int type; /* CA interface this slot supports */ - #define CA_CI 1 /* CI high level interface */ - #define CA_CI_LINK 2 /* CI link layer level interface */ - #define CA_CI_PHYS 4 /* CI physical layer level interface */ - #define CA_DESCR 8 /* built-in descrambler */ - #define CA_SC 128 /* simple smart card interface */ - - unsigned int flags; - #define CA_CI_MODULE_PRESENT 1 /* module (or card) inserted */ - #define CA_CI_MODULE_READY 2 - } ca_slot_info_t; - -This CI interface follows the CI high level interface, which is not -implemented by most applications. Hence this area is revisited. - -This CI interface is quite different in the case that it tries to -accommodate all other CI based devices, that fall into the other categories. - -This means that this CI interface handles the EN50221 style tags in the -Application layer only and no session management is taken care of by the -application. The driver/hardware will take care of all that. - -This interface is purely an EN50221 interface exchanging APDU's. This -means that no session management, link layer or a transport layer do -exist in this case in the application to driver communication. It is -as simple as that. The driver/hardware has to take care of that. - -With this High Level CI interface, the interface can be defined with the -regular ioctls. - -All these ioctls are also valid for the High level CI interface - -#define CA_RESET _IO('o', 128) -#define CA_GET_CAP _IOR('o', 129, ca_caps_t) -#define CA_GET_SLOT_INFO _IOR('o', 130, ca_slot_info_t) -#define CA_GET_DESCR_INFO _IOR('o', 131, ca_descr_info_t) -#define CA_GET_MSG _IOR('o', 132, ca_msg_t) -#define CA_SEND_MSG _IOW('o', 133, ca_msg_t) -#define CA_SET_DESCR _IOW('o', 134, ca_descr_t) - - -On querying the device, the device yields information thus: - -.. code-block:: none - - CA_GET_SLOT_INFO - ---------------------------- - Command = [info] - APP: Number=[1] - APP: Type=[1] - APP: flags=[1] - APP: CI High level interface - APP: CA/CI Module Present - - CA_GET_CAP - ---------------------------- - Command = [caps] - APP: Slots=[1] - APP: Type=[1] - APP: Descrambler keys=[16] - APP: Type=[1] - - CA_SEND_MSG - ---------------------------- - Descriptors(Program Level)=[ 09 06 06 04 05 50 ff f1] - Found CA descriptor @ program level - - (20) ES type=[2] ES pid=[201] ES length =[0 (0x0)] - (25) ES type=[4] ES pid=[301] ES length =[0 (0x0)] - ca_message length is 25 (0x19) bytes - EN50221 CA MSG=[ 9f 80 32 19 03 01 2d d1 f0 08 01 09 06 06 04 05 50 ff f1 02 e0 c9 00 00 04 e1 2d 00 00] - - -Not all ioctl's are implemented in the driver from the API, the other -features of the hardware that cannot be implemented by the API are achieved -using the CA_GET_MSG and CA_SEND_MSG ioctls. An EN50221 style wrapper is -used to exchange the data to maintain compatibility with other hardware. - -.. code-block:: c - - /* a message to/from a CI-CAM */ - typedef struct ca_msg { - unsigned int index; - unsigned int type; - unsigned int length; - unsigned char msg[256]; - } ca_msg_t; - - -The flow of data can be described thus, - -.. code-block:: none - - App (User) - ----- - parse - | - | - v - en50221 APDU (package) - -------------------------------------- - | | | High Level CI driver - | | | - | v | - | en50221 APDU (unpackage) | - | | | - | | | - | v | - | sanity checks | - | | | - | | | - | v | - | do (H/W dep) | - -------------------------------------- - | Hardware - | - v - - - - -The High Level CI interface uses the EN50221 DVB standard, following a -standard ensures futureproofness. diff --git a/Documentation/media/uapi/dvb/ca.rst b/Documentation/media/uapi/dvb/ca.rst index 8796512c1378b..c6ee624b1234f 100644 --- a/Documentation/media/uapi/dvb/ca.rst +++ b/Documentation/media/uapi/dvb/ca.rst @@ -29,3 +29,4 @@ application. ca_data_types ca_function_calls + ca_high_level diff --git a/Documentation/media/uapi/dvb/ca_high_level.rst b/Documentation/media/uapi/dvb/ca_high_level.rst new file mode 100644 index 0000000000000..a73f3691c31f6 --- /dev/null +++ b/Documentation/media/uapi/dvb/ca_high_level.rst @@ -0,0 +1,157 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The High level CI API +===================== + +.. note:: + + This documentation is outdated. + +This document describes the high level CI API as in accordance to the +Linux DVB API. + + +With the High Level CI approach any new card with almost any random +architecture can be implemented with this style, the definitions +inside the switch statement can be easily adapted for any card, thereby +eliminating the need for any additional ioctls. + +The disadvantage is that the driver/hardware has to manage the rest. For +the application programmer it would be as simple as sending/receiving an +array to/from the CI ioctls as defined in the Linux DVB API. No changes +have been made in the API to accommodate this feature. + + +Why the need for another CI interface? +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +This is one of the most commonly asked question. Well a nice question. +Strictly speaking this is not a new interface. + +The CI interface is defined in the DVB API in ca.h as: + +.. code-block:: c + + typedef struct ca_slot_info { + int num; /* slot number */ + + int type; /* CA interface this slot supports */ + #define CA_CI 1 /* CI high level interface */ + #define CA_CI_LINK 2 /* CI link layer level interface */ + #define CA_CI_PHYS 4 /* CI physical layer level interface */ + #define CA_DESCR 8 /* built-in descrambler */ + #define CA_SC 128 /* simple smart card interface */ + + unsigned int flags; + #define CA_CI_MODULE_PRESENT 1 /* module (or card) inserted */ + #define CA_CI_MODULE_READY 2 + } ca_slot_info_t; + +This CI interface follows the CI high level interface, which is not +implemented by most applications. Hence this area is revisited. + +This CI interface is quite different in the case that it tries to +accommodate all other CI based devices, that fall into the other categories. + +This means that this CI interface handles the EN50221 style tags in the +Application layer only and no session management is taken care of by the +application. The driver/hardware will take care of all that. + +This interface is purely an EN50221 interface exchanging APDU's. This +means that no session management, link layer or a transport layer do +exist in this case in the application to driver communication. It is +as simple as that. The driver/hardware has to take care of that. + +With this High Level CI interface, the interface can be defined with the +regular ioctls. + +All these ioctls are also valid for the High level CI interface + +#define CA_RESET _IO('o', 128) +#define CA_GET_CAP _IOR('o', 129, ca_caps_t) +#define CA_GET_SLOT_INFO _IOR('o', 130, ca_slot_info_t) +#define CA_GET_DESCR_INFO _IOR('o', 131, ca_descr_info_t) +#define CA_GET_MSG _IOR('o', 132, ca_msg_t) +#define CA_SEND_MSG _IOW('o', 133, ca_msg_t) +#define CA_SET_DESCR _IOW('o', 134, ca_descr_t) + + +On querying the device, the device yields information thus: + +.. code-block:: none + + CA_GET_SLOT_INFO + ---------------------------- + Command = [info] + APP: Number=[1] + APP: Type=[1] + APP: flags=[1] + APP: CI High level interface + APP: CA/CI Module Present + + CA_GET_CAP + ---------------------------- + Command = [caps] + APP: Slots=[1] + APP: Type=[1] + APP: Descrambler keys=[16] + APP: Type=[1] + + CA_SEND_MSG + ---------------------------- + Descriptors(Program Level)=[ 09 06 06 04 05 50 ff f1] + Found CA descriptor @ program level + + (20) ES type=[2] ES pid=[201] ES length =[0 (0x0)] + (25) ES type=[4] ES pid=[301] ES length =[0 (0x0)] + ca_message length is 25 (0x19) bytes + EN50221 CA MSG=[ 9f 80 32 19 03 01 2d d1 f0 08 01 09 06 06 04 05 50 ff f1 02 e0 c9 00 00 04 e1 2d 00 00] + + +Not all ioctl's are implemented in the driver from the API, the other +features of the hardware that cannot be implemented by the API are achieved +using the CA_GET_MSG and CA_SEND_MSG ioctls. An EN50221 style wrapper is +used to exchange the data to maintain compatibility with other hardware. + +.. code-block:: c + + /* a message to/from a CI-CAM */ + typedef struct ca_msg { + unsigned int index; + unsigned int type; + unsigned int length; + unsigned char msg[256]; + } ca_msg_t; + + +The flow of data can be described thus, + +.. code-block:: none + + App (User) + ----- + parse + | + | + v + en50221 APDU (package) + -------------------------------------- + | | | High Level CI driver + | | | + | v | + | en50221 APDU (unpackage) | + | | | + | | | + | v | + | sanity checks | + | | | + | | | + | v | + | do (H/W dep) | + -------------------------------------- + | Hardware + | + v + +The High Level CI interface uses the EN50221 DVB standard, following a +standard ensures futureproofness. -- GitLab From a6c5ac5ca76041b1f86e24a799fd0505aa0dd9b1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 16:24:52 +0100 Subject: [PATCH 038/503] media: docs: split meye.rst into admin and uAPI docs Instead of placing both info from admin PoV and uAPI at the same place, split into two separate documents. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/index.rst | 1 + Documentation/media/v4l-drivers/meye-uapi.rst | 53 +++++++++++++++++++ Documentation/media/v4l-drivers/meye.rst | 41 -------------- 3 files changed, 54 insertions(+), 41 deletions(-) create mode 100644 Documentation/media/v4l-drivers/meye-uapi.rst diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 72fbb394f6a20..5a87bd1da9bd1 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -67,3 +67,4 @@ For more details see the file COPYING in the source distribution of Linux. zr364xx cpia2_devel + meye-uapi diff --git a/Documentation/media/v4l-drivers/meye-uapi.rst b/Documentation/media/v4l-drivers/meye-uapi.rst new file mode 100644 index 0000000000000..66b1c142f920d --- /dev/null +++ b/Documentation/media/v4l-drivers/meye-uapi.rst @@ -0,0 +1,53 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: + +Vaio Picturebook Motion Eye Camera Driver +========================================= + +Copyright |copy| 2001-2004 Stelian Pop + +Copyright |copy| 2001-2002 Alcôve + +Copyright |copy| 2000 Andrew Tridgell + +Private API +----------- + +The driver supports frame grabbing with the video4linux API, +so all video4linux tools (like xawtv) should work with this driver. + +Besides the video4linux interface, the driver has a private interface +for accessing the Motion Eye extended parameters (camera sharpness, +agc, video framerate), the snapshot and the MJPEG capture facilities. + +This interface consists of several ioctls (prototypes and structures +can be found in include/linux/meye.h): + +MEYEIOC_G_PARAMS and MEYEIOC_S_PARAMS + Get and set the extended parameters of the motion eye camera. + The user should always query the current parameters with + MEYEIOC_G_PARAMS, change what he likes and then issue the + MEYEIOC_S_PARAMS call (checking for -EINVAL). The extended + parameters are described by the meye_params structure. + + +MEYEIOC_QBUF_CAPT + Queue a buffer for capture (the buffers must have been + obtained with a VIDIOCGMBUF call and mmap'ed by the + application). The argument to MEYEIOC_QBUF_CAPT is the + buffer number to queue (or -1 to end capture). The first + call to MEYEIOC_QBUF_CAPT starts the streaming capture. + +MEYEIOC_SYNC + Takes as an argument the buffer number you want to sync. + This ioctl blocks until the buffer is filled and ready + for the application to use. It returns the buffer size. + +MEYEIOC_STILLCAPT and MEYEIOC_STILLJCAPT + Takes a snapshot in an uncompressed or compressed jpeg format. + This ioctl blocks until the snapshot is done and returns (for + jpeg snapshot) the size of the image. The image data is + available from the first mmap'ed buffer. + +Look at the 'motioneye' application code for an actual example. diff --git a/Documentation/media/v4l-drivers/meye.rst b/Documentation/media/v4l-drivers/meye.rst index dc57a6a91b43f..9098a1e65f8bf 100644 --- a/Documentation/media/v4l-drivers/meye.rst +++ b/Documentation/media/v4l-drivers/meye.rst @@ -87,47 +87,6 @@ Usage: motioneye () for getting ppm or jpg snapshots, mjpeg video -Private API ------------ - -The driver supports frame grabbing with the video4linux API, -so all video4linux tools (like xawtv) should work with this driver. - -Besides the video4linux interface, the driver has a private interface -for accessing the Motion Eye extended parameters (camera sharpness, -agc, video framerate), the snapshot and the MJPEG capture facilities. - -This interface consists of several ioctls (prototypes and structures -can be found in include/linux/meye.h): - -MEYEIOC_G_PARAMS and MEYEIOC_S_PARAMS - Get and set the extended parameters of the motion eye camera. - The user should always query the current parameters with - MEYEIOC_G_PARAMS, change what he likes and then issue the - MEYEIOC_S_PARAMS call (checking for -EINVAL). The extended - parameters are described by the meye_params structure. - - -MEYEIOC_QBUF_CAPT - Queue a buffer for capture (the buffers must have been - obtained with a VIDIOCGMBUF call and mmap'ed by the - application). The argument to MEYEIOC_QBUF_CAPT is the - buffer number to queue (or -1 to end capture). The first - call to MEYEIOC_QBUF_CAPT starts the streaming capture. - -MEYEIOC_SYNC - Takes as an argument the buffer number you want to sync. - This ioctl blocks until the buffer is filled and ready - for the application to use. It returns the buffer size. - -MEYEIOC_STILLCAPT and MEYEIOC_STILLJCAPT - Takes a snapshot in an uncompressed or compressed jpeg format. - This ioctl blocks until the snapshot is done and returns (for - jpeg snapshot) the size of the image. The image data is - available from the first mmap'ed buffer. - -Look at the 'motioneye' application code for an actual example. - Bugs / Todo ----------- -- GitLab From 8d562a0038da9977b6c2b83c2f1be499734f1253 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 17:10:12 +0100 Subject: [PATCH 039/503] media: docs: split vimc.rst into devel and admin parts The vimc driver has some kerneldoc markups, plus admin info. Split it into two files. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/index.rst | 2 ++ Documentation/media/v4l-drivers/vimc-devel.rst | 15 +++++++++++++++ Documentation/media/v4l-drivers/vimc.rst | 11 ----------- 3 files changed, 17 insertions(+), 11 deletions(-) create mode 100644 Documentation/media/v4l-drivers/vimc-devel.rst diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 5a87bd1da9bd1..2b8e2cbfff23d 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -67,4 +67,6 @@ For more details see the file COPYING in the source distribution of Linux. zr364xx cpia2_devel + vimc-devel + meye-uapi diff --git a/Documentation/media/v4l-drivers/vimc-devel.rst b/Documentation/media/v4l-drivers/vimc-devel.rst new file mode 100644 index 0000000000000..b2aa2ee79205f --- /dev/null +++ b/Documentation/media/v4l-drivers/vimc-devel.rst @@ -0,0 +1,15 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The Virtual Media Controller Driver (vimc) +========================================== + +Source code documentation +------------------------- + +vimc-streamer +~~~~~~~~~~~~~ + +.. kernel-doc:: drivers/media/platform/vimc/vimc-streamer.h + :internal: + +.. kernel-doc:: drivers/media/platform/vimc/vimc-streamer.c diff --git a/Documentation/media/v4l-drivers/vimc.rst b/Documentation/media/v4l-drivers/vimc.rst index 8f5d7f8d83bb8..211cc89724107 100644 --- a/Documentation/media/v4l-drivers/vimc.rst +++ b/Documentation/media/v4l-drivers/vimc.rst @@ -88,14 +88,3 @@ Vimc has a module parameter to configure the driver. height, so the image size will be ``sca_mult^2`` bigger than the original one. Currently, only supports scaling up (the default value is 3). - -Source code documentation -------------------------- - -vimc-streamer -~~~~~~~~~~~~~ - -.. kernel-doc:: drivers/media/platform/vimc/vimc-streamer.h - :internal: - -.. kernel-doc:: drivers/media/platform/vimc/vimc-streamer.c -- GitLab From 481025598f214eea371a2aa9cf2464ed786b7555 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:24:17 +0100 Subject: [PATCH 040/503] media: docs: split development info from bttv.rst This file contains both admin and development stuff. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l-drivers/bttv-devel.rst | 123 ++++++++++++++++++ Documentation/media/v4l-drivers/bttv.rst | 120 ----------------- Documentation/media/v4l-drivers/index.rst | 1 + 3 files changed, 124 insertions(+), 120 deletions(-) create mode 100644 Documentation/media/v4l-drivers/bttv-devel.rst diff --git a/Documentation/media/v4l-drivers/bttv-devel.rst b/Documentation/media/v4l-drivers/bttv-devel.rst new file mode 100644 index 0000000000000..396fad572c939 --- /dev/null +++ b/Documentation/media/v4l-drivers/bttv-devel.rst @@ -0,0 +1,123 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The bttv driver +=============== + +bttv and sound mini howto +------------------------- + +There are a lot of different bt848/849/878/879 based boards available. +Making video work often is not a big deal, because this is handled +completely by the bt8xx chip, which is common on all boards. But +sound is handled in slightly different ways on each board. + +To handle the grabber boards correctly, there is a array tvcards[] in +bttv-cards.c, which holds the information required for each board. +Sound will work only, if the correct entry is used (for video it often +makes no difference). The bttv driver prints a line to the kernel +log, telling which card type is used. Like this one: + +.. code-block:: none + + bttv0: model: BT848(Hauppauge old) [autodetected] + +You should verify this is correct. If it isn't, you have to pass the +correct board type as insmod argument, "insmod bttv card=2" for +example. The file CARDLIST has a list of valid arguments for card. +If your card isn't listed there, you might check the source code for +new entries which are not listed yet. If there isn't one for your +card, you can check if one of the existing entries does work for you +(just trial and error...). + +Some boards have an extra processor for sound to do stereo decoding +and other nice features. The msp34xx chips are used by Hauppauge for +example. If your board has one, you might have to load a helper +module like msp3400.o to make sound work. If there isn't one for the +chip used on your board: Bad luck. Start writing a new one. Well, +you might want to check the video4linux mailing list archive first... + +Of course you need a correctly installed soundcard unless you have the +speakers connected directly to the grabber board. Hint: check the +mixer settings too. ALSA for example has everything muted by default. + + +How sound works in detail +~~~~~~~~~~~~~~~~~~~~~~~~~ + +Still doesn't work? Looks like some driver hacking is required. +Below is a do-it-yourself description for you. + +The bt8xx chips have 32 general purpose pins, and registers to control +these pins. One register is the output enable register +(BT848_GPIO_OUT_EN), it says which pins are actively driven by the +bt848 chip. Another one is the data register (BT848_GPIO_DATA), where +you can get/set the status if these pins. They can be used for input +and output. + +Most grabber board vendors use these pins to control an external chip +which does the sound routing. But every board is a little different. +These pins are also used by some companies to drive remote control +receiver chips. Some boards use the i2c bus instead of the gpio pins +to connect the mux chip. + +As mentioned above, there is a array which holds the required +information for each known board. You basically have to create a new +line for your board. The important fields are these two: + +.. code-block:: c + + struct tvcard + { + [ ... ] + u32 gpiomask; + u32 audiomux[6]; /* Tuner, Radio, external, internal, mute, stereo */ + }; + +gpiomask specifies which pins are used to control the audio mux chip. +The corresponding bits in the output enable register +(BT848_GPIO_OUT_EN) will be set as these pins must be driven by the +bt848 chip. + +The audiomux\[\] array holds the data values for the different inputs +(i.e. which pins must be high/low for tuner/mute/...). This will be +written to the data register (BT848_GPIO_DATA) to switch the audio +mux. + + +What you have to do is figure out the correct values for gpiomask and +the audiomux array. If you have Windows and the drivers four your +card installed, you might to check out if you can read these registers +values used by the windows driver. A tool to do this is available +from ftp://telepresence.dmem.strath.ac.uk/pub/bt848/winutil, but it +doesn't work with bt878 boards according to some reports I received. +Another one with bt878 support is available from +http://btwincap.sourceforge.net/Files/btspy2.00.zip + +You might also dig around in the \*.ini files of the Windows applications. +You can have a look at the board to see which of the gpio pins are +connected at all and then start trial-and-error ... + + +Starting with release 0.7.41 bttv has a number of insmod options to +make the gpio debugging easier: + +.. code-block:: none + + bttv_gpio=0/1 enable/disable gpio debug messages + gpiomask=n set the gpiomask value + audiomux=i,j,... set the values of the audiomux array + audioall=a set the values of the audiomux array (one + value for all array elements, useful to check + out which effect the particular value has). + +The messages printed with bttv_gpio=1 look like this: + +.. code-block:: none + + bttv0: gpio: en=00000027, out=00000024 in=00ffffd8 [audio: off] + + en = output _en_able register (BT848_GPIO_OUT_EN) + out = _out_put bits of the data register (BT848_GPIO_DATA), + i.e. BT848_GPIO_DATA & BT848_GPIO_OUT_EN + in = _in_put bits of the data register, + i.e. BT848_GPIO_DATA & ~BT848_GPIO_OUT_EN diff --git a/Documentation/media/v4l-drivers/bttv.rst b/Documentation/media/v4l-drivers/bttv.rst index f956ee2640992..9b15a0cba283b 100644 --- a/Documentation/media/v4l-drivers/bttv.rst +++ b/Documentation/media/v4l-drivers/bttv.rst @@ -438,126 +438,6 @@ parking, thus lowering arbitration performance. The Bt879 drivers must query for these non-compliant devices, and set the EN_VSFX bit only if required. -bttv and sound mini howto -------------------------- - -There are a lot of different bt848/849/878/879 based boards available. -Making video work often is not a big deal, because this is handled -completely by the bt8xx chip, which is common on all boards. But -sound is handled in slightly different ways on each board. - -To handle the grabber boards correctly, there is a array tvcards[] in -bttv-cards.c, which holds the information required for each board. -Sound will work only, if the correct entry is used (for video it often -makes no difference). The bttv driver prints a line to the kernel -log, telling which card type is used. Like this one: - -.. code-block:: none - - bttv0: model: BT848(Hauppauge old) [autodetected] - -You should verify this is correct. If it isn't, you have to pass the -correct board type as insmod argument, "insmod bttv card=2" for -example. The file CARDLIST has a list of valid arguments for card. -If your card isn't listed there, you might check the source code for -new entries which are not listed yet. If there isn't one for your -card, you can check if one of the existing entries does work for you -(just trial and error...). - -Some boards have an extra processor for sound to do stereo decoding -and other nice features. The msp34xx chips are used by Hauppauge for -example. If your board has one, you might have to load a helper -module like msp3400.o to make sound work. If there isn't one for the -chip used on your board: Bad luck. Start writing a new one. Well, -you might want to check the video4linux mailing list archive first... - -Of course you need a correctly installed soundcard unless you have the -speakers connected directly to the grabber board. Hint: check the -mixer settings too. ALSA for example has everything muted by default. - - -How sound works in detail -~~~~~~~~~~~~~~~~~~~~~~~~~ - -Still doesn't work? Looks like some driver hacking is required. -Below is a do-it-yourself description for you. - -The bt8xx chips have 32 general purpose pins, and registers to control -these pins. One register is the output enable register -(BT848_GPIO_OUT_EN), it says which pins are actively driven by the -bt848 chip. Another one is the data register (BT848_GPIO_DATA), where -you can get/set the status if these pins. They can be used for input -and output. - -Most grabber board vendors use these pins to control an external chip -which does the sound routing. But every board is a little different. -These pins are also used by some companies to drive remote control -receiver chips. Some boards use the i2c bus instead of the gpio pins -to connect the mux chip. - -As mentioned above, there is a array which holds the required -information for each known board. You basically have to create a new -line for your board. The important fields are these two: - -.. code-block:: c - - struct tvcard - { - [ ... ] - u32 gpiomask; - u32 audiomux[6]; /* Tuner, Radio, external, internal, mute, stereo */ - }; - -gpiomask specifies which pins are used to control the audio mux chip. -The corresponding bits in the output enable register -(BT848_GPIO_OUT_EN) will be set as these pins must be driven by the -bt848 chip. - -The audiomux\[\] array holds the data values for the different inputs -(i.e. which pins must be high/low for tuner/mute/...). This will be -written to the data register (BT848_GPIO_DATA) to switch the audio -mux. - - -What you have to do is figure out the correct values for gpiomask and -the audiomux array. If you have Windows and the drivers four your -card installed, you might to check out if you can read these registers -values used by the windows driver. A tool to do this is available -from ftp://telepresence.dmem.strath.ac.uk/pub/bt848/winutil, but it -doesn't work with bt878 boards according to some reports I received. -Another one with bt878 support is available from -http://btwincap.sourceforge.net/Files/btspy2.00.zip - -You might also dig around in the \*.ini files of the Windows applications. -You can have a look at the board to see which of the gpio pins are -connected at all and then start trial-and-error ... - - -Starting with release 0.7.41 bttv has a number of insmod options to -make the gpio debugging easier: - -.. code-block:: none - - bttv_gpio=0/1 enable/disable gpio debug messages - gpiomask=n set the gpiomask value - audiomux=i,j,... set the values of the audiomux array - audioall=a set the values of the audiomux array (one - value for all array elements, useful to check - out which effect the particular value has). - -The messages printed with bttv_gpio=1 look like this: - -.. code-block:: none - - bttv0: gpio: en=00000027, out=00000024 in=00ffffd8 [audio: off] - - en = output _en_able register (BT848_GPIO_OUT_EN) - out = _out_put bits of the data register (BT848_GPIO_DATA), - i.e. BT848_GPIO_DATA & BT848_GPIO_OUT_EN - in = _in_put bits of the data register, - i.e. BT848_GPIO_DATA & ~BT848_GPIO_OUT_EN - - Other elements of the tvcards array ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 2b8e2cbfff23d..52d7c8d14ee70 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -66,6 +66,7 @@ For more details see the file COPYING in the source distribution of Linux. vivid zr364xx + bttv-devel cpia2_devel vimc-devel -- GitLab From 51df01acc193084430543db71c69f19827191752 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:25:55 +0100 Subject: [PATCH 041/503] media: docs: split development info from cx88.rst This file contains both admin and development stuff. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l-drivers/cx88-devel.rst | 113 ++++++++++++++++++ Documentation/media/v4l-drivers/cx88.rst | 107 ----------------- Documentation/media/v4l-drivers/index.rst | 1 + 3 files changed, 114 insertions(+), 107 deletions(-) create mode 100644 Documentation/media/v4l-drivers/cx88-devel.rst diff --git a/Documentation/media/v4l-drivers/cx88-devel.rst b/Documentation/media/v4l-drivers/cx88-devel.rst new file mode 100644 index 0000000000000..cfe7c03f49305 --- /dev/null +++ b/Documentation/media/v4l-drivers/cx88-devel.rst @@ -0,0 +1,113 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The cx88 driver +=============== + +Author: Gerd Hoffmann + +Documentation missing at the cx88 datasheet +------------------------------------------- + +MO_OUTPUT_FORMAT (0x310164) + +.. code-block:: none + + Previous default from DScaler: 0x1c1f0008 + Digit 8: 31-28 + 28: PREVREMOD = 1 + + Digit 7: 27-24 (0xc = 12 = b1100 ) + 27: COMBALT = 1 + 26: PAL_INV_PHASE + (DScaler apparently set this to 1, resulted in sucky picture) + + Digits 6,5: 23-16 + 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512) + + Digit 4: 15-12 + 15: DISIFX = 0 + 14: INVCBF = 0 + 13: DISADAPT = 0 + 12: NARROWADAPT = 0 + + Digit 3: 11-8 + 11: FORCE2H + 10: FORCEREMD + 9: NCHROMAEN + 8: NREMODEN + + Digit 2: 7-4 + 7-6: YCORE + 5-4: CCORE + + Digit 1: 3-0 + 3: RANGE = 1 + 2: HACTEXT + 1: HSFMT + +0x47 is the sync byte for MPEG-2 transport stream packets. +Datasheet incorrectly states to use 47 decimal. 188 is the length. +All DVB compliant frontends output packets with this start code. + +Hauppauge WinTV cx88 IR information +----------------------------------- + +The controls for the mux are GPIO [0,1] for source, and GPIO 2 for muting. + +====== ======== ================================================= +GPIO0 GPIO1 +====== ======== ================================================= + 0 0 TV Audio + 1 0 FM radio + 0 1 Line-In + 1 1 Mono tuner bypass or CD passthru (tuner specific) +====== ======== ================================================= + +GPIO 16(I believe) is tied to the IR port (if present). + + +From the data sheet: + +- Register 24'h20004 PCI Interrupt Status + + - bit [18] IR_SMP_INT Set when 32 input samples have been collected over + - gpio[16] pin into GP_SAMPLE register. + +What's missing from the data sheet: + +- Setup 4KHz sampling rate (roughly 2x oversampled; good enough for our RC5 + compat remote) +- set register 0x35C050 to 0xa80a80 +- enable sampling +- set register 0x35C054 to 0x5 +- enable the IRQ bit 18 in the interrupt mask register (and + provide for a handler) + +GP_SAMPLE register is at 0x35C058 + +Bits are then right shifted into the GP_SAMPLE register at the specified +rate; you get an interrupt when a full DWORD is received. +You need to recover the actual RC5 bits out of the (oversampled) IR sensor +bits. (Hint: look for the 0/1and 1/0 crossings of the RC5 bi-phase data) An +actual raw RC5 code will span 2-3 DWORDS, depending on the actual alignment. + +I'm pretty sure when no IR signal is present the receiver is always in a +marking state(1); but stray light, etc can cause intermittent noise values +as well. Remember, this is a free running sample of the IR receiver state +over time, so don't assume any sample starts at any particular place. + +Additional info +~~~~~~~~~~~~~~~ + +This data sheet (google search) seems to have a lovely description of the +RC5 basics: +http://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf + +This document has more data: +http://www.nenya.be/beor/electronics/rc5.htm + +This document has a how to decode a bi-phase data stream: +http://www.ee.washington.edu/circuit_archive/text/ir_decode.txt + +This document has still more info: +http://www.xs4all.nl/~sbp/knowledge/ir/rc5.htm diff --git a/Documentation/media/v4l-drivers/cx88.rst b/Documentation/media/v4l-drivers/cx88.rst index 698c73ea2e36b..e4badb18199d3 100644 --- a/Documentation/media/v4l-drivers/cx88.rst +++ b/Documentation/media/v4l-drivers/cx88.rst @@ -56,110 +56,3 @@ the driver. What to do then? trial-and-error using the tuner= insmod option. If you know which one the card has you can also have a look at the list in CARDLIST.tuner - -Documentation missing at the cx88 datasheet -------------------------------------------- - -MO_OUTPUT_FORMAT (0x310164) - -.. code-block:: none - - Previous default from DScaler: 0x1c1f0008 - Digit 8: 31-28 - 28: PREVREMOD = 1 - - Digit 7: 27-24 (0xc = 12 = b1100 ) - 27: COMBALT = 1 - 26: PAL_INV_PHASE - (DScaler apparently set this to 1, resulted in sucky picture) - - Digits 6,5: 23-16 - 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512) - - Digit 4: 15-12 - 15: DISIFX = 0 - 14: INVCBF = 0 - 13: DISADAPT = 0 - 12: NARROWADAPT = 0 - - Digit 3: 11-8 - 11: FORCE2H - 10: FORCEREMD - 9: NCHROMAEN - 8: NREMODEN - - Digit 2: 7-4 - 7-6: YCORE - 5-4: CCORE - - Digit 1: 3-0 - 3: RANGE = 1 - 2: HACTEXT - 1: HSFMT - -0x47 is the sync byte for MPEG-2 transport stream packets. -Datasheet incorrectly states to use 47 decimal. 188 is the length. -All DVB compliant frontends output packets with this start code. - -Hauppauge WinTV cx88 IR information ------------------------------------ - -The controls for the mux are GPIO [0,1] for source, and GPIO 2 for muting. - -====== ======== ================================================= -GPIO0 GPIO1 -====== ======== ================================================= - 0 0 TV Audio - 1 0 FM radio - 0 1 Line-In - 1 1 Mono tuner bypass or CD passthru (tuner specific) -====== ======== ================================================= - -GPIO 16(I believe) is tied to the IR port (if present). - - -From the data sheet: - -- Register 24'h20004 PCI Interrupt Status - - - bit [18] IR_SMP_INT Set when 32 input samples have been collected over - - gpio[16] pin into GP_SAMPLE register. - -What's missing from the data sheet: - -- Setup 4KHz sampling rate (roughly 2x oversampled; good enough for our RC5 - compat remote) -- set register 0x35C050 to 0xa80a80 -- enable sampling -- set register 0x35C054 to 0x5 -- enable the IRQ bit 18 in the interrupt mask register (and - provide for a handler) - -GP_SAMPLE register is at 0x35C058 - -Bits are then right shifted into the GP_SAMPLE register at the specified -rate; you get an interrupt when a full DWORD is received. -You need to recover the actual RC5 bits out of the (oversampled) IR sensor -bits. (Hint: look for the 0/1and 1/0 crossings of the RC5 bi-phase data) An -actual raw RC5 code will span 2-3 DWORDS, depending on the actual alignment. - -I'm pretty sure when no IR signal is present the receiver is always in a -marking state(1); but stray light, etc can cause intermittent noise values -as well. Remember, this is a free running sample of the IR receiver state -over time, so don't assume any sample starts at any particular place. - -Additional info -~~~~~~~~~~~~~~~ - -This data sheet (google search) seems to have a lovely description of the -RC5 basics: -http://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf - -This document has more data: -http://www.nenya.be/beor/electronics/rc5.htm - -This document has a how to decode a bi-phase data stream: -http://www.ee.washington.edu/circuit_archive/text/ir_decode.txt - -This document has still more info: -http://www.xs4all.nl/~sbp/knowledge/ir/rc5.htm diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 52d7c8d14ee70..dfc878c050da0 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -68,6 +68,7 @@ For more details see the file COPYING in the source distribution of Linux. bttv-devel cpia2_devel + cx88-devel vimc-devel meye-uapi -- GitLab From aeb9b21ab44953ae183c685ae46f84ff44a96bd4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:30:50 +0100 Subject: [PATCH 042/503] media: docs: split cx2341x.rst into different audiences This file contains both driver develompent documentation (basically, firmware documentation) and IVTV-specific documentation about VBI and raw formats, focused on uAPI development. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- .../{cx2341x.rst => cx2341x-devel.rst} | 175 ----------------- .../media/v4l-drivers/cx2341x-uapi.rst | 179 ++++++++++++++++++ Documentation/media/v4l-drivers/index.rst | 3 +- 3 files changed, 181 insertions(+), 176 deletions(-) rename Documentation/media/v4l-drivers/{cx2341x.rst => cx2341x-devel.rst} (91%) create mode 100644 Documentation/media/v4l-drivers/cx2341x-uapi.rst diff --git a/Documentation/media/v4l-drivers/cx2341x.rst b/Documentation/media/v4l-drivers/cx2341x-devel.rst similarity index 91% rename from Documentation/media/v4l-drivers/cx2341x.rst rename to Documentation/media/v4l-drivers/cx2341x-devel.rst index 8ca37deb56b68..97699df6ea2e8 100644 --- a/Documentation/media/v4l-drivers/cx2341x.rst +++ b/Documentation/media/v4l-drivers/cx2341x-devel.rst @@ -3683,178 +3683,3 @@ Register 0x0004 holds the DMA Transfer Status: - bit 2: DMA read error - bit 3: DMA write error - bit 4: Scatter-Gather array error - -Non-compressed file format --------------------------- - -The cx23416 can produce (and the cx23415 can also read) raw YUV output. The -format of a YUV frame is specific to this chip and is called HM12. 'HM' stands -for 'Hauppauge Macroblock', which is a misnomer as 'Conexant Macroblock' would -be more accurate. - -The format is YUV 4:2:0 which uses 1 Y byte per pixel and 1 U and V byte per -four pixels. - -The data is encoded as two macroblock planes, the first containing the Y -values, the second containing UV macroblocks. - -The Y plane is divided into blocks of 16x16 pixels from left to right -and from top to bottom. Each block is transmitted in turn, line-by-line. - -So the first 16 bytes are the first line of the top-left block, the -second 16 bytes are the second line of the top-left block, etc. After -transmitting this block the first line of the block on the right to the -first block is transmitted, etc. - -The UV plane is divided into blocks of 16x8 UV values going from left -to right, top to bottom. Each block is transmitted in turn, line-by-line. - -So the first 16 bytes are the first line of the top-left block and -contain 8 UV value pairs (16 bytes in total). The second 16 bytes are the -second line of 8 UV pairs of the top-left block, etc. After transmitting -this block the first line of the block on the right to the first block is -transmitted, etc. - -The code below is given as an example on how to convert HM12 to separate -Y, U and V planes. This code assumes frames of 720x576 (PAL) pixels. - -The width of a frame is always 720 pixels, regardless of the actual specified -width. - -If the height is not a multiple of 32 lines, then the captured video is -missing macroblocks at the end and is unusable. So the height must be a -multiple of 32. - -Raw format c example -~~~~~~~~~~~~~~~~~~~~ - -.. code-block:: c - - #include - #include - #include - - static unsigned char frame[576*720*3/2]; - static unsigned char framey[576*720]; - static unsigned char frameu[576*720 / 4]; - static unsigned char framev[576*720 / 4]; - - static void de_macro_y(unsigned char* dst, unsigned char *src, int dstride, int w, int h) - { - unsigned int y, x, i; - - // descramble Y plane - // dstride = 720 = w - // The Y plane is divided into blocks of 16x16 pixels - // Each block in transmitted in turn, line-by-line. - for (y = 0; y < h; y += 16) { - for (x = 0; x < w; x += 16) { - for (i = 0; i < 16; i++) { - memcpy(dst + x + (y + i) * dstride, src, 16); - src += 16; - } - } - } - } - - static void de_macro_uv(unsigned char *dstu, unsigned char *dstv, unsigned char *src, int dstride, int w, int h) - { - unsigned int y, x, i; - - // descramble U/V plane - // dstride = 720 / 2 = w - // The U/V values are interlaced (UVUV...). - // Again, the UV plane is divided into blocks of 16x16 UV values. - // Each block in transmitted in turn, line-by-line. - for (y = 0; y < h; y += 16) { - for (x = 0; x < w; x += 8) { - for (i = 0; i < 16; i++) { - int idx = x + (y + i) * dstride; - - dstu[idx+0] = src[0]; dstv[idx+0] = src[1]; - dstu[idx+1] = src[2]; dstv[idx+1] = src[3]; - dstu[idx+2] = src[4]; dstv[idx+2] = src[5]; - dstu[idx+3] = src[6]; dstv[idx+3] = src[7]; - dstu[idx+4] = src[8]; dstv[idx+4] = src[9]; - dstu[idx+5] = src[10]; dstv[idx+5] = src[11]; - dstu[idx+6] = src[12]; dstv[idx+6] = src[13]; - dstu[idx+7] = src[14]; dstv[idx+7] = src[15]; - src += 16; - } - } - } - } - - /*************************************************************************/ - int main(int argc, char **argv) - { - FILE *fin; - int i; - - if (argc == 1) fin = stdin; - else fin = fopen(argv[1], "r"); - - if (fin == NULL) { - fprintf(stderr, "cannot open input\n"); - exit(-1); - } - while (fread(frame, sizeof(frame), 1, fin) == 1) { - de_macro_y(framey, frame, 720, 720, 576); - de_macro_uv(frameu, framev, frame + 720 * 576, 720 / 2, 720 / 2, 576 / 2); - fwrite(framey, sizeof(framey), 1, stdout); - fwrite(framev, sizeof(framev), 1, stdout); - fwrite(frameu, sizeof(frameu), 1, stdout); - } - fclose(fin); - return 0; - } - - -Format of embedded V4L2_MPEG_STREAM_VBI_FMT_IVTV VBI data ---------------------------------------------------------- - -Author: Hans Verkuil - - -This section describes the V4L2_MPEG_STREAM_VBI_FMT_IVTV format of the VBI data -embedded in an MPEG-2 program stream. This format is in part dictated by some -hardware limitations of the ivtv driver (the driver for the Conexant cx23415/6 -chips), in particular a maximum size for the VBI data. Anything longer is cut -off when the MPEG stream is played back through the cx23415. - -The advantage of this format is it is very compact and that all VBI data for -all lines can be stored while still fitting within the maximum allowed size. - -The stream ID of the VBI data is 0xBD. The maximum size of the embedded data is -4 + 43 * 36, which is 4 bytes for a header and 2 * 18 VBI lines with a 1 byte -header and a 42 bytes payload each. Anything beyond this limit is cut off by -the cx23415/6 firmware. Besides the data for the VBI lines we also need 36 bits -for a bitmask determining which lines are captured and 4 bytes for a magic cookie, -signifying that this data package contains V4L2_MPEG_STREAM_VBI_FMT_IVTV VBI data. -If all lines are used, then there is no longer room for the bitmask. To solve this -two different magic numbers were introduced: - -'itv0': After this magic number two unsigned longs follow. Bits 0-17 of the first -unsigned long denote which lines of the first field are captured. Bits 18-31 of -the first unsigned long and bits 0-3 of the second unsigned long are used for the -second field. - -'ITV0': This magic number assumes all VBI lines are captured, i.e. it implicitly -implies that the bitmasks are 0xffffffff and 0xf. - -After these magic cookies (and the 8 byte bitmask in case of cookie 'itv0') the -captured VBI lines start: - -For each line the least significant 4 bits of the first byte contain the data type. -Possible values are shown in the table below. The payload is in the following 42 -bytes. - -Here is the list of possible data types: - -.. code-block:: c - - #define IVTV_SLICED_TYPE_TELETEXT 0x1 // Teletext (uses lines 6-22 for PAL) - #define IVTV_SLICED_TYPE_CC 0x4 // Closed Captions (line 21 NTSC) - #define IVTV_SLICED_TYPE_WSS 0x5 // Wide Screen Signal (line 23 PAL) - #define IVTV_SLICED_TYPE_VPS 0x7 // Video Programming System (PAL) (line 16) - diff --git a/Documentation/media/v4l-drivers/cx2341x-uapi.rst b/Documentation/media/v4l-drivers/cx2341x-uapi.rst new file mode 100644 index 0000000000000..8a7977af79d54 --- /dev/null +++ b/Documentation/media/v4l-drivers/cx2341x-uapi.rst @@ -0,0 +1,179 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The cx2341x driver +================== + +Non-compressed file format +-------------------------- + +The cx23416 can produce (and the cx23415 can also read) raw YUV output. The +format of a YUV frame is specific to this chip and is called HM12. 'HM' stands +for 'Hauppauge Macroblock', which is a misnomer as 'Conexant Macroblock' would +be more accurate. + +The format is YUV 4:2:0 which uses 1 Y byte per pixel and 1 U and V byte per +four pixels. + +The data is encoded as two macroblock planes, the first containing the Y +values, the second containing UV macroblocks. + +The Y plane is divided into blocks of 16x16 pixels from left to right +and from top to bottom. Each block is transmitted in turn, line-by-line. + +So the first 16 bytes are the first line of the top-left block, the +second 16 bytes are the second line of the top-left block, etc. After +transmitting this block the first line of the block on the right to the +first block is transmitted, etc. + +The UV plane is divided into blocks of 16x8 UV values going from left +to right, top to bottom. Each block is transmitted in turn, line-by-line. + +So the first 16 bytes are the first line of the top-left block and +contain 8 UV value pairs (16 bytes in total). The second 16 bytes are the +second line of 8 UV pairs of the top-left block, etc. After transmitting +this block the first line of the block on the right to the first block is +transmitted, etc. + +The code below is given as an example on how to convert HM12 to separate +Y, U and V planes. This code assumes frames of 720x576 (PAL) pixels. + +The width of a frame is always 720 pixels, regardless of the actual specified +width. + +If the height is not a multiple of 32 lines, then the captured video is +missing macroblocks at the end and is unusable. So the height must be a +multiple of 32. + +Raw format c example +~~~~~~~~~~~~~~~~~~~~ + +.. code-block:: c + + #include + #include + #include + + static unsigned char frame[576*720*3/2]; + static unsigned char framey[576*720]; + static unsigned char frameu[576*720 / 4]; + static unsigned char framev[576*720 / 4]; + + static void de_macro_y(unsigned char* dst, unsigned char *src, int dstride, int w, int h) + { + unsigned int y, x, i; + + // descramble Y plane + // dstride = 720 = w + // The Y plane is divided into blocks of 16x16 pixels + // Each block in transmitted in turn, line-by-line. + for (y = 0; y < h; y += 16) { + for (x = 0; x < w; x += 16) { + for (i = 0; i < 16; i++) { + memcpy(dst + x + (y + i) * dstride, src, 16); + src += 16; + } + } + } + } + + static void de_macro_uv(unsigned char *dstu, unsigned char *dstv, unsigned char *src, int dstride, int w, int h) + { + unsigned int y, x, i; + + // descramble U/V plane + // dstride = 720 / 2 = w + // The U/V values are interlaced (UVUV...). + // Again, the UV plane is divided into blocks of 16x16 UV values. + // Each block in transmitted in turn, line-by-line. + for (y = 0; y < h; y += 16) { + for (x = 0; x < w; x += 8) { + for (i = 0; i < 16; i++) { + int idx = x + (y + i) * dstride; + + dstu[idx+0] = src[0]; dstv[idx+0] = src[1]; + dstu[idx+1] = src[2]; dstv[idx+1] = src[3]; + dstu[idx+2] = src[4]; dstv[idx+2] = src[5]; + dstu[idx+3] = src[6]; dstv[idx+3] = src[7]; + dstu[idx+4] = src[8]; dstv[idx+4] = src[9]; + dstu[idx+5] = src[10]; dstv[idx+5] = src[11]; + dstu[idx+6] = src[12]; dstv[idx+6] = src[13]; + dstu[idx+7] = src[14]; dstv[idx+7] = src[15]; + src += 16; + } + } + } + } + + /*************************************************************************/ + int main(int argc, char **argv) + { + FILE *fin; + int i; + + if (argc == 1) fin = stdin; + else fin = fopen(argv[1], "r"); + + if (fin == NULL) { + fprintf(stderr, "cannot open input\n"); + exit(-1); + } + while (fread(frame, sizeof(frame), 1, fin) == 1) { + de_macro_y(framey, frame, 720, 720, 576); + de_macro_uv(frameu, framev, frame + 720 * 576, 720 / 2, 720 / 2, 576 / 2); + fwrite(framey, sizeof(framey), 1, stdout); + fwrite(framev, sizeof(framev), 1, stdout); + fwrite(frameu, sizeof(frameu), 1, stdout); + } + fclose(fin); + return 0; + } + + +Format of embedded V4L2_MPEG_STREAM_VBI_FMT_IVTV VBI data +--------------------------------------------------------- + +Author: Hans Verkuil + + +This section describes the V4L2_MPEG_STREAM_VBI_FMT_IVTV format of the VBI data +embedded in an MPEG-2 program stream. This format is in part dictated by some +hardware limitations of the ivtv driver (the driver for the Conexant cx23415/6 +chips), in particular a maximum size for the VBI data. Anything longer is cut +off when the MPEG stream is played back through the cx23415. + +The advantage of this format is it is very compact and that all VBI data for +all lines can be stored while still fitting within the maximum allowed size. + +The stream ID of the VBI data is 0xBD. The maximum size of the embedded data is +4 + 43 * 36, which is 4 bytes for a header and 2 * 18 VBI lines with a 1 byte +header and a 42 bytes payload each. Anything beyond this limit is cut off by +the cx23415/6 firmware. Besides the data for the VBI lines we also need 36 bits +for a bitmask determining which lines are captured and 4 bytes for a magic cookie, +signifying that this data package contains V4L2_MPEG_STREAM_VBI_FMT_IVTV VBI data. +If all lines are used, then there is no longer room for the bitmask. To solve this +two different magic numbers were introduced: + +'itv0': After this magic number two unsigned longs follow. Bits 0-17 of the first +unsigned long denote which lines of the first field are captured. Bits 18-31 of +the first unsigned long and bits 0-3 of the second unsigned long are used for the +second field. + +'ITV0': This magic number assumes all VBI lines are captured, i.e. it implicitly +implies that the bitmasks are 0xffffffff and 0xf. + +After these magic cookies (and the 8 byte bitmask in case of cookie 'itv0') the +captured VBI lines start: + +For each line the least significant 4 bits of the first byte contain the data type. +Possible values are shown in the table below. The payload is in the following 42 +bytes. + +Here is the list of possible data types: + +.. code-block:: c + + #define IVTV_SLICED_TYPE_TELETEXT 0x1 // Teletext (uses lines 6-22 for PAL) + #define IVTV_SLICED_TYPE_CC 0x4 // Closed Captions (line 21 NTSC) + #define IVTV_SLICED_TYPE_WSS 0x5 // Wide Screen Signal (line 23 PAL) + #define IVTV_SLICED_TYPE_VPS 0x7 // Video Programming System (PAL) (line 16) + diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index dfc878c050da0..f3e34ccaf365c 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -38,7 +38,6 @@ For more details see the file COPYING in the source distribution of Linux. bttv cafe_ccic cpia2 - cx2341x cx88 davinci-vpbe fimc @@ -68,7 +67,9 @@ For more details see the file COPYING in the source distribution of Linux. bttv-devel cpia2_devel + cx2341x-devel cx88-devel vimc-devel + cx2341x-uapi meye-uapi -- GitLab From 087362d96356c213b1b1cfc835951c91a04ed433 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 6 Mar 2020 06:26:59 +0100 Subject: [PATCH 043/503] media: docs: cx18-streams.c: fix broken references to docs There are two places inside this file that points to the cx2341x documentation, with was split into two. Looking at changeset dcc0ef88209a ("V4L/DVB (10442): cx18: Fixes for enforcing when Encoder Raw VBI params can be set") with added those comments, it was originally pointing to: Documentation/video4linux/cx2341x/fw-encoder-api.txt Well, the firmware details went to Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/cx18/cx18-streams.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/pci/cx18/cx18-streams.c b/drivers/media/pci/cx18/cx18-streams.c index 3178df3c49224..0e2365c9f4ad9 100644 --- a/drivers/media/pci/cx18/cx18-streams.c +++ b/drivers/media/pci/cx18/cx18-streams.c @@ -845,7 +845,7 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s) /* * Audio related reset according to - * Documentation/media/v4l-drivers/cx2341x.rst + * Documentation/media/v4l-drivers/cx2341x-devel.rst */ if (atomic_read(&cx->ana_capturing) == 0) cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, @@ -853,7 +853,7 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s) /* * Number of lines for Field 1 & Field 2 according to - * Documentation/media/v4l-drivers/cx2341x.rst + * Documentation/media/v4l-drivers/cx2341x-devel.rst * Field 1 is 312 for 625 line systems in BT.656 * Field 2 is 313 for 625 line systems in BT.656 */ -- GitLab From d81c969b95d4096344714c9131a0843b4193750c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:36:13 +0100 Subject: [PATCH 044/503] media: docs: split uAPI info from davinci-vpbe.rst This file contains both driver develompent documentation and userspace API. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l-drivers/davinci-vpbe-devel.rst | 39 +++++++++++++++++ .../media/v4l-drivers/davinci-vpbe.rst | 42 +++---------------- Documentation/media/v4l-drivers/index.rst | 1 + 3 files changed, 45 insertions(+), 37 deletions(-) create mode 100644 Documentation/media/v4l-drivers/davinci-vpbe-devel.rst diff --git a/Documentation/media/v4l-drivers/davinci-vpbe-devel.rst b/Documentation/media/v4l-drivers/davinci-vpbe-devel.rst new file mode 100644 index 0000000000000..f0961672e6a35 --- /dev/null +++ b/Documentation/media/v4l-drivers/davinci-vpbe-devel.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The VPBE V4L2 driver design +=========================== + +File partitioning +----------------- + + V4L2 display device driver + drivers/media/platform/davinci/vpbe_display.c + drivers/media/platform/davinci/vpbe_display.h + + VPBE display controller + drivers/media/platform/davinci/vpbe.c + drivers/media/platform/davinci/vpbe.h + + VPBE venc sub device driver + drivers/media/platform/davinci/vpbe_venc.c + drivers/media/platform/davinci/vpbe_venc.h + drivers/media/platform/davinci/vpbe_venc_regs.h + + VPBE osd driver + drivers/media/platform/davinci/vpbe_osd.c + drivers/media/platform/davinci/vpbe_osd.h + drivers/media/platform/davinci/vpbe_osd_regs.h + +To be done +---------- + +vpbe display controller + - Add support for external encoders. + - add support for selecting external encoder as default at probe time. + +vpbe venc sub device + - add timings for supporting ths8200 + - add support for LogicPD LCD. + +FB drivers + - Add support for fbdev drivers.- Ready and part of subsequent patches. diff --git a/Documentation/media/v4l-drivers/davinci-vpbe.rst b/Documentation/media/v4l-drivers/davinci-vpbe.rst index 0fde433e5c71f..9e6360fd02db3 100644 --- a/Documentation/media/v4l-drivers/davinci-vpbe.rst +++ b/Documentation/media/v4l-drivers/davinci-vpbe.rst @@ -3,38 +3,18 @@ The VPBE V4L2 driver design =========================== -File partitioning ------------------ - - V4L2 display device driver - drivers/media/platform/davinci/vpbe_display.c - drivers/media/platform/davinci/vpbe_display.h - - VPBE display controller - drivers/media/platform/davinci/vpbe.c - drivers/media/platform/davinci/vpbe.h - - VPBE venc sub device driver - drivers/media/platform/davinci/vpbe_venc.c - drivers/media/platform/davinci/vpbe_venc.h - drivers/media/platform/davinci/vpbe_venc_regs.h - - VPBE osd driver - drivers/media/platform/davinci/vpbe_osd.c - drivers/media/platform/davinci/vpbe_osd.h - drivers/media/platform/davinci/vpbe_osd_regs.h - Functional partitioning ----------------------- -Consists of the following (in the same order as the list under file -partitioning): +Consists of the following: 1. V4L2 display driver + Implements creation of video2 and video3 device nodes and provides v4l2 device interface to manage VID0 and VID1 layers. 2. Display controller + Loads up VENC, OSD and external encoders such as ths8200. It provides a set of API calls to V4L2 drivers to set the output/standards in the VENC or external sub devices. It also provides @@ -54,6 +34,7 @@ partitioning): encoders is not present, and would be a part of the next patch series. 3. VENC subdevice module + Responsible for setting outputs provided through internal DACs and also setting timings at LCD controller port when external encoders are connected at the port or LCD panel timings required. When external encoder/LCD panel @@ -72,6 +53,7 @@ partitioning): patch series. 4. OSD module + OSD module implements all OSD layer management and hardware specific features. The VPBE module interacts with the OSD for enabling and disabling appropriate features of the OSD. @@ -81,17 +63,3 @@ Current status A fully functional working version of the V4L2 driver is available. This driver has been tested with NTSC and PAL standards and buffer streaming. - -To be done ----------- - -vpbe display controller - - Add support for external encoders. - - add support for selecting external encoder as default at probe time. - -vpbe venc sub device - - add timings for supporting ths8200 - - add support for LogicPD LCD. - -FB drivers - - Add support for fbdev drivers.- Ready and part of subsequent patches. diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index f3e34ccaf365c..2d782a40a7b62 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -69,6 +69,7 @@ For more details see the file COPYING in the source distribution of Linux. cpia2_devel cx2341x-devel cx88-devel + davinci-vpbe-devel vimc-devel cx2341x-uapi -- GitLab From b4a5f46cdee4beda24ce22cb55d116120271af3e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:38:55 +0100 Subject: [PATCH 045/503] media: docs: split uAPI info from fimc.rst This file contains both driver develompent documentation and userspace API. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l-drivers/fimc-devel.rst | 33 +++++++++++++++++++ Documentation/media/v4l-drivers/fimc.rst | 22 ++----------- Documentation/media/v4l-drivers/index.rst | 1 + 3 files changed, 36 insertions(+), 20 deletions(-) create mode 100644 Documentation/media/v4l-drivers/fimc-devel.rst diff --git a/Documentation/media/v4l-drivers/fimc-devel.rst b/Documentation/media/v4l-drivers/fimc-devel.rst new file mode 100644 index 0000000000000..956e3a9901f82 --- /dev/null +++ b/Documentation/media/v4l-drivers/fimc-devel.rst @@ -0,0 +1,33 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: + +The Samsung S5P/EXYNOS4 FIMC driver +=================================== + +Copyright |copy| 2012 - 2013 Samsung Electronics Co., Ltd. + +Files partitioning +------------------ + +- media device driver + + drivers/media/platform/exynos4-is/media-dev.[ch] + +- camera capture video device driver + + drivers/media/platform/exynos4-is/fimc-capture.c + +- MIPI-CSI2 receiver subdev + + drivers/media/platform/exynos4-is/mipi-csis.[ch] + +- video post-processor (mem-to-mem) + + drivers/media/platform/exynos4-is/fimc-core.c + +- common files + + drivers/media/platform/exynos4-is/fimc-core.h + drivers/media/platform/exynos4-is/fimc-reg.h + drivers/media/platform/exynos4-is/regs-fimc.h diff --git a/Documentation/media/v4l-drivers/fimc.rst b/Documentation/media/v4l-drivers/fimc.rst index 74585ba48b7f4..0b8ddc4a3008d 100644 --- a/Documentation/media/v4l-drivers/fimc.rst +++ b/Documentation/media/v4l-drivers/fimc.rst @@ -38,26 +38,6 @@ Not currently supported - LCD writeback input - per frame clock gating (mem-to-mem) -Files partitioning ------------------- - -- media device driver - drivers/media/platform/exynos4-is/media-dev.[ch] - -- camera capture video device driver - drivers/media/platform/exynos4-is/fimc-capture.c - -- MIPI-CSI2 receiver subdev - drivers/media/platform/exynos4-is/mipi-csis.[ch] - -- video post-processor (mem-to-mem) - drivers/media/platform/exynos4-is/fimc-core.c - -- common files - drivers/media/platform/exynos4-is/fimc-core.h - drivers/media/platform/exynos4-is/fimc-reg.h - drivers/media/platform/exynos4-is/regs-fimc.h - User space interfaces --------------------- @@ -74,6 +54,7 @@ connections of the MIPI-CSIS device(s) to the FIMC entities. The media device interface allows to configure the SoC for capturing image data from the sensor through more than one FIMC instance (e.g. for simultaneous viewfinder and still capture setup). + Reconfiguration is done by enabling/disabling media links created by the driver during initialization. The internal device topology can be easily discovered through media entity and links enumeration. @@ -116,6 +97,7 @@ sensor subdev -> mipi-csi subdev -> fimc subdev -> video node When we configure these devices through sub-device API at user space, the configuration flow must be from left to right, and the video node is configured as last one. + When we don't use sub-device user space API the whole configuration of all devices belonging to the pipeline is done at the video node driver. The sysfs entry allows to instruct the capture node driver not to configure diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 2d782a40a7b62..adf72937b1199 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -70,6 +70,7 @@ For more details see the file COPYING in the source distribution of Linux. cx2341x-devel cx88-devel davinci-vpbe-devel + fimc-devel vimc-devel cx2341x-uapi -- GitLab From f8dd7a257dcef6c4c208b7d8b0e2a7229131cf8d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:48:35 +0100 Subject: [PATCH 046/503] media: docs: split uAPI info from saa7134-devel.rst This file contains both driver develompent documentation and userspace API. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/index.rst | 1 + .../media/v4l-drivers/saa7134-devel.rst | 67 +++++++++++++++++++ Documentation/media/v4l-drivers/saa7134.rst | 54 --------------- 3 files changed, 68 insertions(+), 54 deletions(-) create mode 100644 Documentation/media/v4l-drivers/saa7134-devel.rst diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index adf72937b1199..6fdfd9a41913a 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -71,6 +71,7 @@ For more details see the file COPYING in the source distribution of Linux. cx88-devel davinci-vpbe-devel fimc-devel + saa7134-devel vimc-devel cx2341x-uapi diff --git a/Documentation/media/v4l-drivers/saa7134-devel.rst b/Documentation/media/v4l-drivers/saa7134-devel.rst new file mode 100644 index 0000000000000..167fd729bc8c5 --- /dev/null +++ b/Documentation/media/v4l-drivers/saa7134-devel.rst @@ -0,0 +1,67 @@ +.. SPDX-License-Identifier: GPL-2.0 + +The saa7134 driver +================== + +Author Gerd Hoffmann + + +Card Variations: +---------------- + +Cards can use either of these two crystals (xtal): + +- 32.11 MHz -> .audio_clock=0x187de7 +- 24.576MHz -> .audio_clock=0x200000 (xtal * .audio_clock = 51539600) + +Some details about 30/34/35: + +- saa7130 - low-price chip, doesn't have mute, that is why all those + cards should have .mute field defined in their tuner structure. + +- saa7134 - usual chip + +- saa7133/35 - saa7135 is probably a marketing decision, since all those + chips identifies itself as 33 on pci. + +LifeView GPIOs +-------------- + +This section was authored by: Peter Missel + +- LifeView FlyTV Platinum FM (LR214WF) + + - GP27 MDT2005 PB4 pin 10 + - GP26 MDT2005 PB3 pin 9 + - GP25 MDT2005 PB2 pin 8 + - GP23 MDT2005 PB1 pin 7 + - GP22 MDT2005 PB0 pin 6 + - GP21 MDT2005 PB5 pin 11 + - GP20 MDT2005 PB6 pin 12 + - GP19 MDT2005 PB7 pin 13 + - nc MDT2005 PA3 pin 2 + - Remote MDT2005 PA2 pin 1 + - GP18 MDT2005 PA1 pin 18 + - nc MDT2005 PA0 pin 17 strap low + - GP17 Strap "GP7"=High + - GP16 Strap "GP6"=High + + - 0=Radio 1=TV + - Drives SA630D ENCH1 and HEF4052 A1 pinsto do FM radio through + SIF input + + - GP15 nc + - GP14 nc + - GP13 nc + - GP12 Strap "GP5" = High + - GP11 Strap "GP4" = High + - GP10 Strap "GP3" = High + - GP09 Strap "GP2" = Low + - GP08 Strap "GP1" = Low + - GP07.00 nc + +Credits +------- + +andrew.stevens@philips.com + werner.leeb@philips.com for providing +saa7134 hardware specs and sample board. diff --git a/Documentation/media/v4l-drivers/saa7134.rst b/Documentation/media/v4l-drivers/saa7134.rst index 15d06facdbc19..c84246dd81c0f 100644 --- a/Documentation/media/v4l-drivers/saa7134.rst +++ b/Documentation/media/v4l-drivers/saa7134.rst @@ -54,60 +54,6 @@ Known Problems default might not work for you depending on which version you have. There is a tuner= insmod option to override the driver's default. -Card Variations: ----------------- - -Cards can use either of these two crystals (xtal): - -- 32.11 MHz -> .audio_clock=0x187de7 -- 24.576MHz -> .audio_clock=0x200000 (xtal * .audio_clock = 51539600) - -Some details about 30/34/35: - -- saa7130 - low-price chip, doesn't have mute, that is why all those - cards should have .mute field defined in their tuner structure. - -- saa7134 - usual chip - -- saa7133/35 - saa7135 is probably a marketing decision, since all those - chips identifies itself as 33 on pci. - -LifeView GPIOs --------------- - -This section was authored by: Peter Missel - -- LifeView FlyTV Platinum FM (LR214WF) - - - GP27 MDT2005 PB4 pin 10 - - GP26 MDT2005 PB3 pin 9 - - GP25 MDT2005 PB2 pin 8 - - GP23 MDT2005 PB1 pin 7 - - GP22 MDT2005 PB0 pin 6 - - GP21 MDT2005 PB5 pin 11 - - GP20 MDT2005 PB6 pin 12 - - GP19 MDT2005 PB7 pin 13 - - nc MDT2005 PA3 pin 2 - - Remote MDT2005 PA2 pin 1 - - GP18 MDT2005 PA1 pin 18 - - nc MDT2005 PA0 pin 17 strap low - - GP17 Strap "GP7"=High - - GP16 Strap "GP6"=High - - - 0=Radio 1=TV - - Drives SA630D ENCH1 and HEF4052 A1 pinsto do FM radio through - SIF input - - - GP15 nc - - GP14 nc - - GP13 nc - - GP12 Strap "GP5" = High - - GP11 Strap "GP4" = High - - GP10 Strap "GP3" = High - - GP09 Strap "GP2" = Low - - GP08 Strap "GP1" = Low - - GP07.00 nc - Credits ------- -- GitLab From 889a500ed5fef83ffd8ffc962b73df02750caaed Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 07:59:19 +0100 Subject: [PATCH 047/503] media: docs: split uAPI info from omap3isp.rst This file contains both driver develompent documentation and userspace API. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/index.rst | 1 + .../media/v4l-drivers/omap3isp-uapi.rst | 208 ++++++++++++++++++ Documentation/media/v4l-drivers/omap3isp.rst | 196 +---------------- 3 files changed, 211 insertions(+), 194 deletions(-) create mode 100644 Documentation/media/v4l-drivers/omap3isp-uapi.rst diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 6fdfd9a41913a..364c65ea86fb3 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -76,3 +76,4 @@ For more details see the file COPYING in the source distribution of Linux. cx2341x-uapi meye-uapi + omap3isp-uapi diff --git a/Documentation/media/v4l-drivers/omap3isp-uapi.rst b/Documentation/media/v4l-drivers/omap3isp-uapi.rst new file mode 100644 index 0000000000000..5f966a874a3c0 --- /dev/null +++ b/Documentation/media/v4l-drivers/omap3isp-uapi.rst @@ -0,0 +1,208 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: + +OMAP 3 Image Signal Processor (ISP) driver +========================================== + +Copyright |copy| 2010 Nokia Corporation + +Copyright |copy| 2009 Texas Instruments, Inc. + +Contacts: Laurent Pinchart , +Sakari Ailus , David Cohen + + +Events +------ + +The OMAP 3 ISP driver does support the V4L2 event interface on CCDC and +statistics (AEWB, AF and histogram) subdevs. + +The CCDC subdev produces V4L2_EVENT_FRAME_SYNC type event on HS_VS +interrupt which is used to signal frame start. Earlier version of this +driver used V4L2_EVENT_OMAP3ISP_HS_VS for this purpose. The event is +triggered exactly when the reception of the first line of the frame starts +in the CCDC module. The event can be subscribed on the CCDC subdev. + +(When using parallel interface one must pay account to correct configuration +of the VS signal polarity. This is automatically correct when using the serial +receivers.) + +Each of the statistics subdevs is able to produce events. An event is +generated whenever a statistics buffer can be dequeued by a user space +application using the VIDIOC_OMAP3ISP_STAT_REQ IOCTL. The events available +are: + +- V4L2_EVENT_OMAP3ISP_AEWB +- V4L2_EVENT_OMAP3ISP_AF +- V4L2_EVENT_OMAP3ISP_HIST + +The type of the event data is struct omap3isp_stat_event_status for these +ioctls. If there is an error calculating the statistics, there will be an +event as usual, but no related statistics buffer. In this case +omap3isp_stat_event_status.buf_err is set to non-zero. + + +Private IOCTLs +-------------- + +The OMAP 3 ISP driver supports standard V4L2 IOCTLs and controls where +possible and practical. Much of the functions provided by the ISP, however, +does not fall under the standard IOCTLs --- gamma tables and configuration of +statistics collection are examples of such. + +In general, there is a private ioctl for configuring each of the blocks +containing hardware-dependent functions. + +The following private IOCTLs are supported: + +- VIDIOC_OMAP3ISP_CCDC_CFG +- VIDIOC_OMAP3ISP_PRV_CFG +- VIDIOC_OMAP3ISP_AEWB_CFG +- VIDIOC_OMAP3ISP_HIST_CFG +- VIDIOC_OMAP3ISP_AF_CFG +- VIDIOC_OMAP3ISP_STAT_REQ +- VIDIOC_OMAP3ISP_STAT_EN + +The parameter structures used by these ioctls are described in +include/linux/omap3isp.h. The detailed functions of the ISP itself related to +a given ISP block is described in the Technical Reference Manuals (TRMs) --- +see the end of the document for those. + +While it is possible to use the ISP driver without any use of these private +IOCTLs it is not possible to obtain optimal image quality this way. The AEWB, +AF and histogram modules cannot be used without configuring them using the +appropriate private IOCTLs. + + +CCDC and preview block IOCTLs +----------------------------- + +The VIDIOC_OMAP3ISP_CCDC_CFG and VIDIOC_OMAP3ISP_PRV_CFG IOCTLs are used to +configure, enable and disable functions in the CCDC and preview blocks, +respectively. Both IOCTLs control several functions in the blocks they +control. VIDIOC_OMAP3ISP_CCDC_CFG IOCTL accepts a pointer to struct +omap3isp_ccdc_update_config as its argument. Similarly VIDIOC_OMAP3ISP_PRV_CFG +accepts a pointer to struct omap3isp_prev_update_config. The definition of +both structures is available in [#]_. + +The update field in the structures tells whether to update the configuration +for the specific function and the flag tells whether to enable or disable the +function. + +The update and flag bit masks accept the following values. Each separate +functions in the CCDC and preview blocks is associated with a flag (either +disable or enable; part of the flag field in the structure) and a pointer to +configuration data for the function. + +Valid values for the update and flag fields are listed here for +VIDIOC_OMAP3ISP_CCDC_CFG. Values may be or'ed to configure more than one +function in the same IOCTL call. + +- OMAP3ISP_CCDC_ALAW +- OMAP3ISP_CCDC_LPF +- OMAP3ISP_CCDC_BLCLAMP +- OMAP3ISP_CCDC_BCOMP +- OMAP3ISP_CCDC_FPC +- OMAP3ISP_CCDC_CULL +- OMAP3ISP_CCDC_CONFIG_LSC +- OMAP3ISP_CCDC_TBL_LSC + +The corresponding values for the VIDIOC_OMAP3ISP_PRV_CFG are here: + +- OMAP3ISP_PREV_LUMAENH +- OMAP3ISP_PREV_INVALAW +- OMAP3ISP_PREV_HRZ_MED +- OMAP3ISP_PREV_CFA +- OMAP3ISP_PREV_CHROMA_SUPP +- OMAP3ISP_PREV_WB +- OMAP3ISP_PREV_BLKADJ +- OMAP3ISP_PREV_RGB2RGB +- OMAP3ISP_PREV_COLOR_CONV +- OMAP3ISP_PREV_YC_LIMIT +- OMAP3ISP_PREV_DEFECT_COR +- OMAP3ISP_PREV_GAMMABYPASS +- OMAP3ISP_PREV_DRK_FRM_CAPTURE +- OMAP3ISP_PREV_DRK_FRM_SUBTRACT +- OMAP3ISP_PREV_LENS_SHADING +- OMAP3ISP_PREV_NF +- OMAP3ISP_PREV_GAMMA + +The associated configuration pointer for the function may not be NULL when +enabling the function. When disabling a function the configuration pointer is +ignored. + + +Statistic blocks IOCTLs +----------------------- + +The statistics subdevs do offer more dynamic configuration options than the +other subdevs. They can be enabled, disable and reconfigured when the pipeline +is in streaming state. + +The statistics blocks always get the input image data from the CCDC (as the +histogram memory read isn't implemented). The statistics are dequeueable by +the user from the statistics subdev nodes using private IOCTLs. + +The private IOCTLs offered by the AEWB, AF and histogram subdevs are heavily +reflected by the register level interface offered by the ISP hardware. There +are aspects that are purely related to the driver implementation and these are +discussed next. + +VIDIOC_OMAP3ISP_STAT_EN +----------------------- + +This private IOCTL enables/disables a statistic module. If this request is +done before streaming, it will take effect as soon as the pipeline starts to +stream. If the pipeline is already streaming, it will take effect as soon as +the CCDC becomes idle. + +VIDIOC_OMAP3ISP_AEWB_CFG, VIDIOC_OMAP3ISP_HIST_CFG and VIDIOC_OMAP3ISP_AF_CFG +----------------------------------------------------------------------------- + +Those IOCTLs are used to configure the modules. They require user applications +to have an in-depth knowledge of the hardware. Most of the fields explanation +can be found on OMAP's TRMs. The two following fields common to all the above +configure private IOCTLs require explanation for better understanding as they +are not part of the TRM. + +omap3isp_[h3a_af/h3a_aewb/hist]\_config.buf_size: + +The modules handle their buffers internally. The necessary buffer size for the +module's data output depends on the requested configuration. Although the +driver supports reconfiguration while streaming, it does not support a +reconfiguration which requires bigger buffer size than what is already +internally allocated if the module is enabled. It will return -EBUSY on this +case. In order to avoid such condition, either disable/reconfigure/enable the +module or request the necessary buffer size during the first configuration +while the module is disabled. + +The internal buffer size allocation considers the requested configuration's +minimum buffer size and the value set on buf_size field. If buf_size field is +out of [minimum, maximum] buffer size range, it's clamped to fit in there. +The driver then selects the biggest value. The corrected buf_size value is +written back to user application. + +omap3isp_[h3a_af/h3a_aewb/hist]\_config.config_counter: + +As the configuration doesn't take effect synchronously to the request, the +driver must provide a way to track this information to provide more accurate +data. After a configuration is requested, the config_counter returned to user +space application will be an unique value associated to that request. When +user application receives an event for buffer availability or when a new +buffer is requested, this config_counter is used to match a buffer data and a +configuration. + +VIDIOC_OMAP3ISP_STAT_REQ +------------------------ + +Send to user space the oldest data available in the internal buffer queue and +discards such buffer afterwards. The field omap3isp_stat_data.frame_number +matches with the video buffer's field_count. + + +References +---------- + +.. [#] include/linux/omap3isp.h diff --git a/Documentation/media/v4l-drivers/omap3isp.rst b/Documentation/media/v4l-drivers/omap3isp.rst index 8974c444e3a17..bc447bbec7ce6 100644 --- a/Documentation/media/v4l-drivers/omap3isp.rst +++ b/Documentation/media/v4l-drivers/omap3isp.rst @@ -49,7 +49,7 @@ interface to userspace. - OMAP3 ISP histogram Each possible link in the ISP is modelled by a link in the Media controller -interface. For an example program see [#f2]_. +interface. For an example program see [#]_. Controlling the OMAP 3 ISP @@ -68,196 +68,6 @@ Autoidle does have issues with some ISP blocks on the 3430, at least. Autoidle is only enabled on 3630 when the omap3isp module parameter autoidle is non-zero. - -Events ------- - -The OMAP 3 ISP driver does support the V4L2 event interface on CCDC and -statistics (AEWB, AF and histogram) subdevs. - -The CCDC subdev produces V4L2_EVENT_FRAME_SYNC type event on HS_VS -interrupt which is used to signal frame start. Earlier version of this -driver used V4L2_EVENT_OMAP3ISP_HS_VS for this purpose. The event is -triggered exactly when the reception of the first line of the frame starts -in the CCDC module. The event can be subscribed on the CCDC subdev. - -(When using parallel interface one must pay account to correct configuration -of the VS signal polarity. This is automatically correct when using the serial -receivers.) - -Each of the statistics subdevs is able to produce events. An event is -generated whenever a statistics buffer can be dequeued by a user space -application using the VIDIOC_OMAP3ISP_STAT_REQ IOCTL. The events available -are: - -- V4L2_EVENT_OMAP3ISP_AEWB -- V4L2_EVENT_OMAP3ISP_AF -- V4L2_EVENT_OMAP3ISP_HIST - -The type of the event data is struct omap3isp_stat_event_status for these -ioctls. If there is an error calculating the statistics, there will be an -event as usual, but no related statistics buffer. In this case -omap3isp_stat_event_status.buf_err is set to non-zero. - - -Private IOCTLs --------------- - -The OMAP 3 ISP driver supports standard V4L2 IOCTLs and controls where -possible and practical. Much of the functions provided by the ISP, however, -does not fall under the standard IOCTLs --- gamma tables and configuration of -statistics collection are examples of such. - -In general, there is a private ioctl for configuring each of the blocks -containing hardware-dependent functions. - -The following private IOCTLs are supported: - -- VIDIOC_OMAP3ISP_CCDC_CFG -- VIDIOC_OMAP3ISP_PRV_CFG -- VIDIOC_OMAP3ISP_AEWB_CFG -- VIDIOC_OMAP3ISP_HIST_CFG -- VIDIOC_OMAP3ISP_AF_CFG -- VIDIOC_OMAP3ISP_STAT_REQ -- VIDIOC_OMAP3ISP_STAT_EN - -The parameter structures used by these ioctls are described in -include/linux/omap3isp.h. The detailed functions of the ISP itself related to -a given ISP block is described in the Technical Reference Manuals (TRMs) --- -see the end of the document for those. - -While it is possible to use the ISP driver without any use of these private -IOCTLs it is not possible to obtain optimal image quality this way. The AEWB, -AF and histogram modules cannot be used without configuring them using the -appropriate private IOCTLs. - - -CCDC and preview block IOCTLs ------------------------------ - -The VIDIOC_OMAP3ISP_CCDC_CFG and VIDIOC_OMAP3ISP_PRV_CFG IOCTLs are used to -configure, enable and disable functions in the CCDC and preview blocks, -respectively. Both IOCTLs control several functions in the blocks they -control. VIDIOC_OMAP3ISP_CCDC_CFG IOCTL accepts a pointer to struct -omap3isp_ccdc_update_config as its argument. Similarly VIDIOC_OMAP3ISP_PRV_CFG -accepts a pointer to struct omap3isp_prev_update_config. The definition of -both structures is available in [#f1]_. - -The update field in the structures tells whether to update the configuration -for the specific function and the flag tells whether to enable or disable the -function. - -The update and flag bit masks accept the following values. Each separate -functions in the CCDC and preview blocks is associated with a flag (either -disable or enable; part of the flag field in the structure) and a pointer to -configuration data for the function. - -Valid values for the update and flag fields are listed here for -VIDIOC_OMAP3ISP_CCDC_CFG. Values may be or'ed to configure more than one -function in the same IOCTL call. - -- OMAP3ISP_CCDC_ALAW -- OMAP3ISP_CCDC_LPF -- OMAP3ISP_CCDC_BLCLAMP -- OMAP3ISP_CCDC_BCOMP -- OMAP3ISP_CCDC_FPC -- OMAP3ISP_CCDC_CULL -- OMAP3ISP_CCDC_CONFIG_LSC -- OMAP3ISP_CCDC_TBL_LSC - -The corresponding values for the VIDIOC_OMAP3ISP_PRV_CFG are here: - -- OMAP3ISP_PREV_LUMAENH -- OMAP3ISP_PREV_INVALAW -- OMAP3ISP_PREV_HRZ_MED -- OMAP3ISP_PREV_CFA -- OMAP3ISP_PREV_CHROMA_SUPP -- OMAP3ISP_PREV_WB -- OMAP3ISP_PREV_BLKADJ -- OMAP3ISP_PREV_RGB2RGB -- OMAP3ISP_PREV_COLOR_CONV -- OMAP3ISP_PREV_YC_LIMIT -- OMAP3ISP_PREV_DEFECT_COR -- OMAP3ISP_PREV_GAMMABYPASS -- OMAP3ISP_PREV_DRK_FRM_CAPTURE -- OMAP3ISP_PREV_DRK_FRM_SUBTRACT -- OMAP3ISP_PREV_LENS_SHADING -- OMAP3ISP_PREV_NF -- OMAP3ISP_PREV_GAMMA - -The associated configuration pointer for the function may not be NULL when -enabling the function. When disabling a function the configuration pointer is -ignored. - - -Statistic blocks IOCTLs ------------------------ - -The statistics subdevs do offer more dynamic configuration options than the -other subdevs. They can be enabled, disable and reconfigured when the pipeline -is in streaming state. - -The statistics blocks always get the input image data from the CCDC (as the -histogram memory read isn't implemented). The statistics are dequeueable by -the user from the statistics subdev nodes using private IOCTLs. - -The private IOCTLs offered by the AEWB, AF and histogram subdevs are heavily -reflected by the register level interface offered by the ISP hardware. There -are aspects that are purely related to the driver implementation and these are -discussed next. - -VIDIOC_OMAP3ISP_STAT_EN ------------------------ - -This private IOCTL enables/disables a statistic module. If this request is -done before streaming, it will take effect as soon as the pipeline starts to -stream. If the pipeline is already streaming, it will take effect as soon as -the CCDC becomes idle. - -VIDIOC_OMAP3ISP_AEWB_CFG, VIDIOC_OMAP3ISP_HIST_CFG and VIDIOC_OMAP3ISP_AF_CFG ------------------------------------------------------------------------------ - -Those IOCTLs are used to configure the modules. They require user applications -to have an in-depth knowledge of the hardware. Most of the fields explanation -can be found on OMAP's TRMs. The two following fields common to all the above -configure private IOCTLs require explanation for better understanding as they -are not part of the TRM. - -omap3isp_[h3a_af/h3a_aewb/hist]\_config.buf_size: - -The modules handle their buffers internally. The necessary buffer size for the -module's data output depends on the requested configuration. Although the -driver supports reconfiguration while streaming, it does not support a -reconfiguration which requires bigger buffer size than what is already -internally allocated if the module is enabled. It will return -EBUSY on this -case. In order to avoid such condition, either disable/reconfigure/enable the -module or request the necessary buffer size during the first configuration -while the module is disabled. - -The internal buffer size allocation considers the requested configuration's -minimum buffer size and the value set on buf_size field. If buf_size field is -out of [minimum, maximum] buffer size range, it's clamped to fit in there. -The driver then selects the biggest value. The corrected buf_size value is -written back to user application. - -omap3isp_[h3a_af/h3a_aewb/hist]\_config.config_counter: - -As the configuration doesn't take effect synchronously to the request, the -driver must provide a way to track this information to provide more accurate -data. After a configuration is requested, the config_counter returned to user -space application will be an unique value associated to that request. When -user application receives an event for buffer availability or when a new -buffer is requested, this config_counter is used to match a buffer data and a -configuration. - -VIDIOC_OMAP3ISP_STAT_REQ ------------------------- - -Send to user space the oldest data available in the internal buffer queue and -discards such buffer afterwards. The field omap3isp_stat_data.frame_number -matches with the video buffer's field_count. - - Technical reference manuals (TRMs) and other documentation ---------------------------------------------------------- @@ -279,6 +89,4 @@ DM 3730 TRM: References ---------- -.. [#f1] include/linux/omap3isp.h - -.. [#f2] http://git.ideasonboard.org/?p=media-ctl.git;a=summary +.. [#] http://git.ideasonboard.org/?p=media-ctl.git;a=summary -- GitLab From 5dfb8db56b273740a76e8687ee7efb4b2c0ec83b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 5 Mar 2020 08:33:37 +0100 Subject: [PATCH 048/503] media: docs: split uAPI info from imx.rst This file contains both driver develompent documentation and userspace API. Split on two, as they're usually read by different audiences. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/imx-uapi.rst | 125 +++++++++++++++++++ Documentation/media/v4l-drivers/imx.rst | 88 +------------ Documentation/media/v4l-drivers/index.rst | 1 + 3 files changed, 128 insertions(+), 86 deletions(-) create mode 100644 Documentation/media/v4l-drivers/imx-uapi.rst diff --git a/Documentation/media/v4l-drivers/imx-uapi.rst b/Documentation/media/v4l-drivers/imx-uapi.rst new file mode 100644 index 0000000000000..8d47712dea9f7 --- /dev/null +++ b/Documentation/media/v4l-drivers/imx-uapi.rst @@ -0,0 +1,125 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================= +i.MX Video Capture Driver +========================= + +Events +====== + +.. _imx_api_ipuX_csiY: + +ipuX_csiY +--------- + +This subdev can generate the following event when enabling the second +IDMAC source pad: + +- V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR + +The user application can subscribe to this event from the ipuX_csiY +subdev node. This event is generated by the Frame Interval Monitor +(see below for more on the FIM). + +Controls +======== + +.. _imx_api_FIM: + +Frame Interval Monitor in ipuX_csiY +----------------------------------- + +The adv718x decoders can occasionally send corrupt fields during +NTSC/PAL signal re-sync (too little or too many video lines). When +this happens, the IPU triggers a mechanism to re-establish vertical +sync by adding 1 dummy line every frame, which causes a rolling effect +from image to image, and can last a long time before a stable image is +recovered. Or sometimes the mechanism doesn't work at all, causing a +permanent split image (one frame contains lines from two consecutive +captured images). + +From experiment it was found that during image rolling, the frame +intervals (elapsed time between two EOF's) drop below the nominal +value for the current standard, by about one frame time (60 usec), +and remain at that value until rolling stops. + +While the reason for this observation isn't known (the IPU dummy +line mechanism should show an increase in the intervals by 1 line +time every frame, not a fixed value), we can use it to detect the +corrupt fields using a frame interval monitor. If the FIM detects a +bad frame interval, the ipuX_csiY subdev will send the event +V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR. Userland can register with +the FIM event notification on the ipuX_csiY subdev device node. +Userland can issue a streaming restart when this event is received +to correct the rolling/split image. + +The ipuX_csiY subdev includes custom controls to tweak some dials for +FIM. If one of these controls is changed during streaming, the FIM will +be reset and will continue at the new settings. + +- V4L2_CID_IMX_FIM_ENABLE + +Enable/disable the FIM. + +- V4L2_CID_IMX_FIM_NUM + +How many frame interval measurements to average before comparing against +the nominal frame interval reported by the sensor. This can reduce noise +caused by interrupt latency. + +- V4L2_CID_IMX_FIM_TOLERANCE_MIN + +If the averaged intervals fall outside nominal by this amount, in +microseconds, the V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR event is sent. + +- V4L2_CID_IMX_FIM_TOLERANCE_MAX + +If any intervals are higher than this value, those samples are +discarded and do not enter into the average. This can be used to +discard really high interval errors that might be due to interrupt +latency from high system load. + +- V4L2_CID_IMX_FIM_NUM_SKIP + +How many frames to skip after a FIM reset or stream restart before +FIM begins to average intervals. + +- V4L2_CID_IMX_FIM_ICAP_CHANNEL / V4L2_CID_IMX_FIM_ICAP_EDGE + +These controls will configure an input capture channel as the method +for measuring frame intervals. This is superior to the default method +of measuring frame intervals via EOF interrupt, since it is not subject +to uncertainty errors introduced by interrupt latency. + +Input capture requires hardware support. A VSYNC signal must be routed +to one of the i.MX6 input capture channel pads. + +V4L2_CID_IMX_FIM_ICAP_CHANNEL configures which i.MX6 input capture +channel to use. This must be 0 or 1. + +V4L2_CID_IMX_FIM_ICAP_EDGE configures which signal edge will trigger +input capture events. By default the input capture method is disabled +with a value of IRQ_TYPE_NONE. Set this control to IRQ_TYPE_EDGE_RISING, +IRQ_TYPE_EDGE_FALLING, or IRQ_TYPE_EDGE_BOTH to enable input capture, +triggered on the given signal edge(s). + +When input capture is disabled, frame intervals will be measured via +EOF interrupt. + + +File list +--------- + +drivers/staging/media/imx/ +include/media/imx.h +include/linux/imx-media.h + + +Authors +------- + +- Steve Longerbeam +- Philipp Zabel +- Russell King + +Copyright (C) 2012-2017 Mentor Graphics Inc. diff --git a/Documentation/media/v4l-drivers/imx.rst b/Documentation/media/v4l-drivers/imx.rst index 1246573c10199..3182951c76513 100644 --- a/Documentation/media/v4l-drivers/imx.rst +++ b/Documentation/media/v4l-drivers/imx.rst @@ -191,14 +191,7 @@ or unqualified interlaced). The capture interface will enforce the same field order as the source pad field order (interlaced-bt if source pad is seq-bt, interlaced-tb if source pad is seq-tb). -This subdev can generate the following event when enabling the second -IDMAC source pad: - -- V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR - -The user application can subscribe to this event from the ipuX_csiY -subdev node. This event is generated by the Frame Interval Monitor -(see below for more on the FIM). +For events produced by ipuX_csiY, see ref:`imx_api_ipuX_csiY`. Cropping in ipuX_csiY --------------------- @@ -247,84 +240,7 @@ rate by half at the IDMAC output source pad: Frame Interval Monitor in ipuX_csiY ----------------------------------- -The adv718x decoders can occasionally send corrupt fields during -NTSC/PAL signal re-sync (too little or too many video lines). When -this happens, the IPU triggers a mechanism to re-establish vertical -sync by adding 1 dummy line every frame, which causes a rolling effect -from image to image, and can last a long time before a stable image is -recovered. Or sometimes the mechanism doesn't work at all, causing a -permanent split image (one frame contains lines from two consecutive -captured images). - -From experiment it was found that during image rolling, the frame -intervals (elapsed time between two EOF's) drop below the nominal -value for the current standard, by about one frame time (60 usec), -and remain at that value until rolling stops. - -While the reason for this observation isn't known (the IPU dummy -line mechanism should show an increase in the intervals by 1 line -time every frame, not a fixed value), we can use it to detect the -corrupt fields using a frame interval monitor. If the FIM detects a -bad frame interval, the ipuX_csiY subdev will send the event -V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR. Userland can register with -the FIM event notification on the ipuX_csiY subdev device node. -Userland can issue a streaming restart when this event is received -to correct the rolling/split image. - -The ipuX_csiY subdev includes custom controls to tweak some dials for -FIM. If one of these controls is changed during streaming, the FIM will -be reset and will continue at the new settings. - -- V4L2_CID_IMX_FIM_ENABLE - -Enable/disable the FIM. - -- V4L2_CID_IMX_FIM_NUM - -How many frame interval measurements to average before comparing against -the nominal frame interval reported by the sensor. This can reduce noise -caused by interrupt latency. - -- V4L2_CID_IMX_FIM_TOLERANCE_MIN - -If the averaged intervals fall outside nominal by this amount, in -microseconds, the V4L2_EVENT_IMX_FRAME_INTERVAL_ERROR event is sent. - -- V4L2_CID_IMX_FIM_TOLERANCE_MAX - -If any intervals are higher than this value, those samples are -discarded and do not enter into the average. This can be used to -discard really high interval errors that might be due to interrupt -latency from high system load. - -- V4L2_CID_IMX_FIM_NUM_SKIP - -How many frames to skip after a FIM reset or stream restart before -FIM begins to average intervals. - -- V4L2_CID_IMX_FIM_ICAP_CHANNEL -- V4L2_CID_IMX_FIM_ICAP_EDGE - -These controls will configure an input capture channel as the method -for measuring frame intervals. This is superior to the default method -of measuring frame intervals via EOF interrupt, since it is not subject -to uncertainty errors introduced by interrupt latency. - -Input capture requires hardware support. A VSYNC signal must be routed -to one of the i.MX6 input capture channel pads. - -V4L2_CID_IMX_FIM_ICAP_CHANNEL configures which i.MX6 input capture -channel to use. This must be 0 or 1. - -V4L2_CID_IMX_FIM_ICAP_EDGE configures which signal edge will trigger -input capture events. By default the input capture method is disabled -with a value of IRQ_TYPE_NONE. Set this control to IRQ_TYPE_EDGE_RISING, -IRQ_TYPE_EDGE_FALLING, or IRQ_TYPE_EDGE_BOTH to enable input capture, -triggered on the given signal edge(s). - -When input capture is disabled, frame intervals will be measured via -EOF interrupt. - +See ref:`imx_api_FIM`. ipuX_vdic --------- diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 364c65ea86fb3..67665a8abe02b 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -75,5 +75,6 @@ For more details see the file COPYING in the source distribution of Linux. vimc-devel cx2341x-uapi + imx-uapi meye-uapi omap3isp-uapi -- GitLab From 54f38fcae536ea202ce7d6a359521492fba30c1f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 10:21:39 +0100 Subject: [PATCH 049/503] media: docs: move uAPI book to userspace-api/media Since 2017, there is an space reserved for userspace API, created by changeset 1d596dee3862 ("docs: Create a user-space API guide"). As the media subsystem was one of the first subsystems to use Sphinx, until this patch, we were keeping things on a separate place. Let's just use the new location, as having all uAPI altogether will likely make things easier for developers. Signed-off-by: Mauro Carvalho Chehab --- Documentation/ABI/testing/debugfs-cec-error-inj | 2 +- Documentation/Makefile | 10 +++++----- Documentation/doc-guide/parse-headers.rst | 2 +- Documentation/fb/api.rst | 4 ++-- Documentation/media/index.rst | 2 +- .../translations/it_IT/doc-guide/parse-headers.rst | 2 +- Documentation/{ => userspace-api}/media/Makefile | 2 +- .../media/audio.h.rst.exceptions | 0 .../{ => userspace-api}/media/ca.h.rst.exceptions | 0 .../{ => userspace-api}/media/cec.h.rst.exceptions | 0 .../uapi => userspace-api/media}/cec/cec-api.rst | 2 +- .../media}/cec/cec-func-close.rst | 2 +- .../media}/cec/cec-func-ioctl.rst | 2 +- .../media}/cec/cec-func-open.rst | 2 +- .../media}/cec/cec-func-poll.rst | 2 +- .../uapi => userspace-api/media}/cec/cec-funcs.rst | 2 +- .../media}/cec/cec-header.rst | 2 +- .../uapi => userspace-api/media}/cec/cec-intro.rst | 2 +- .../media}/cec/cec-ioc-adap-g-caps.rst | 2 +- .../media}/cec/cec-ioc-adap-g-conn-info.rst | 0 .../media}/cec/cec-ioc-adap-g-log-addrs.rst | 2 +- .../media}/cec/cec-ioc-adap-g-phys-addr.rst | 2 +- .../media}/cec/cec-ioc-dqevent.rst | 2 +- .../media}/cec/cec-ioc-g-mode.rst | 2 +- .../media}/cec/cec-ioc-receive.rst | 2 +- .../media}/cec/cec-pin-error-inj.rst | 2 +- .../{ => userspace-api}/media/conf_nitpick.py | 0 .../{ => userspace-api}/media/dmx.h.rst.exceptions | 0 .../media}/dvb/audio-bilingual-channel-select.rst | 2 +- .../media}/dvb/audio-channel-select.rst | 2 +- .../media}/dvb/audio-clear-buffer.rst | 2 +- .../media}/dvb/audio-continue.rst | 2 +- .../media}/dvb/audio-fclose.rst | 2 +- .../media}/dvb/audio-fopen.rst | 2 +- .../media}/dvb/audio-fwrite.rst | 2 +- .../media}/dvb/audio-get-capabilities.rst | 2 +- .../media}/dvb/audio-get-status.rst | 2 +- .../media}/dvb/audio-pause.rst | 2 +- .../media}/dvb/audio-play.rst | 2 +- .../media}/dvb/audio-select-source.rst | 2 +- .../media}/dvb/audio-set-av-sync.rst | 2 +- .../media}/dvb/audio-set-bypass-mode.rst | 2 +- .../media}/dvb/audio-set-id.rst | 2 +- .../media}/dvb/audio-set-mixer.rst | 2 +- .../media}/dvb/audio-set-mute.rst | 2 +- .../media}/dvb/audio-set-streamtype.rst | 2 +- .../media}/dvb/audio-stop.rst | 2 +- .../uapi => userspace-api/media}/dvb/audio.rst | 2 +- .../media}/dvb/audio_data_types.rst | 2 +- .../media}/dvb/audio_function_calls.rst | 2 +- .../uapi => userspace-api/media}/dvb/ca-fclose.rst | 2 +- .../uapi => userspace-api/media}/dvb/ca-fopen.rst | 2 +- .../media}/dvb/ca-get-cap.rst | 2 +- .../media}/dvb/ca-get-descr-info.rst | 2 +- .../media}/dvb/ca-get-msg.rst | 2 +- .../media}/dvb/ca-get-slot-info.rst | 2 +- .../uapi => userspace-api/media}/dvb/ca-reset.rst | 2 +- .../media}/dvb/ca-send-msg.rst | 2 +- .../media}/dvb/ca-set-descr.rst | 2 +- .../{media/uapi => userspace-api/media}/dvb/ca.rst | 2 +- .../media}/dvb/ca_data_types.rst | 2 +- .../media}/dvb/ca_function_calls.rst | 2 +- .../media}/dvb/ca_high_level.rst | 0 .../uapi => userspace-api/media}/dvb/demux.rst | 2 +- .../media}/dvb/dmx-add-pid.rst | 2 +- .../media}/dvb/dmx-expbuf.rst | 2 +- .../media}/dvb/dmx-fclose.rst | 2 +- .../uapi => userspace-api/media}/dvb/dmx-fopen.rst | 2 +- .../uapi => userspace-api/media}/dvb/dmx-fread.rst | 2 +- .../media}/dvb/dmx-fwrite.rst | 2 +- .../media}/dvb/dmx-get-pes-pids.rst | 2 +- .../media}/dvb/dmx-get-stc.rst | 2 +- .../uapi => userspace-api/media}/dvb/dmx-mmap.rst | 2 +- .../media}/dvb/dmx-munmap.rst | 2 +- .../uapi => userspace-api/media}/dvb/dmx-qbuf.rst | 2 +- .../media}/dvb/dmx-querybuf.rst | 2 +- .../media}/dvb/dmx-remove-pid.rst | 2 +- .../media}/dvb/dmx-reqbufs.rst | 2 +- .../media}/dvb/dmx-set-buffer-size.rst | 2 +- .../media}/dvb/dmx-set-filter.rst | 2 +- .../media}/dvb/dmx-set-pes-filter.rst | 2 +- .../uapi => userspace-api/media}/dvb/dmx-start.rst | 2 +- .../uapi => userspace-api/media}/dvb/dmx-stop.rst | 2 +- .../media}/dvb/dmx_fcalls.rst | 2 +- .../uapi => userspace-api/media}/dvb/dmx_types.rst | 2 +- .../media}/dvb/dvb-fe-read-status.rst | 2 +- .../media}/dvb/dvb-frontend-event.rst | 2 +- .../media}/dvb/dvb-frontend-parameters.rst | 2 +- .../uapi => userspace-api/media}/dvb/dvbapi.rst | 2 +- .../media}/dvb/dvbproperty.rst | 2 +- .../uapi => userspace-api/media}/dvb/dvbstb.svg | 2 +- .../uapi => userspace-api/media}/dvb/examples.rst | 2 +- .../media}/dvb/fe-bandwidth-t.rst | 2 +- .../media}/dvb/fe-diseqc-recv-slave-reply.rst | 2 +- .../media}/dvb/fe-diseqc-reset-overload.rst | 2 +- .../media}/dvb/fe-diseqc-send-burst.rst | 2 +- .../media}/dvb/fe-diseqc-send-master-cmd.rst | 2 +- .../media}/dvb/fe-dishnetwork-send-legacy-cmd.rst | 2 +- .../media}/dvb/fe-enable-high-lnb-voltage.rst | 2 +- .../media}/dvb/fe-get-event.rst | 2 +- .../media}/dvb/fe-get-frontend.rst | 2 +- .../media}/dvb/fe-get-info.rst | 2 +- .../media}/dvb/fe-get-property.rst | 2 +- .../media}/dvb/fe-read-ber.rst | 2 +- .../media}/dvb/fe-read-signal-strength.rst | 2 +- .../media}/dvb/fe-read-snr.rst | 2 +- .../media}/dvb/fe-read-status.rst | 2 +- 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userspace-api/media}/v4l/vidioc-querybuf.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-querycap.rst (99%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-queryctrl.rst (99%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-querystd.rst (97%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-reqbufs.rst (99%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-s-hw-freq-seek.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-streamon.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subdev-enum-frame-interval.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subdev-enum-frame-size.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subdev-enum-mbus-code.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subdev-g-crop.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subdev-g-fmt.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subdev-g-frame-interval.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subdev-g-selection.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/vidioc-subscribe-event.rst (98%) rename Documentation/{media/uapi => userspace-api/media}/v4l/yuv-formats.rst (97%) rename Documentation/{ => userspace-api}/media/video.h.rst.exceptions (100%) rename Documentation/{ => userspace-api}/media/videodev2.h.rst.exceptions (100%) diff --git a/Documentation/ABI/testing/debugfs-cec-error-inj b/Documentation/ABI/testing/debugfs-cec-error-inj index 4c3596c6d25be..5afcd78fbdb7e 100644 --- a/Documentation/ABI/testing/debugfs-cec-error-inj +++ b/Documentation/ABI/testing/debugfs-cec-error-inj @@ -37,4 +37,4 @@ when changes are made. The following CEC error injection implementations exist: -- Documentation/media/uapi/cec/cec-pin-error-inj.rst +- Documentation/userspace-api/media/cec/cec-pin-error-inj.rst diff --git a/Documentation/Makefile b/Documentation/Makefile index cc786d11a0282..7e12d10ca8e09 100644 --- a/Documentation/Makefile +++ b/Documentation/Makefile @@ -55,15 +55,15 @@ I18NSPHINXOPTS = $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) . loop_cmd = $(echo-cmd) $(cmd_$(1)) || exit; # $2 sphinx builder e.g. "html" -# $3 name of the build subfolder / e.g. "media", used as: +# $3 name of the build subfolder / e.g. "userspace-api/media", used as: # * dest folder relative to $(BUILDDIR) and # * cache folder relative to $(BUILDDIR)/.doctrees -# $4 dest subfolder e.g. "man" for man pages at media/man +# $4 dest subfolder e.g. "man" for man pages at userspace-api/media/man # $5 reST source folder relative to $(srctree)/$(src), -# e.g. "media" for the linux-tv book-set at ./Documentation/media +# e.g. "userspace-api/media" for the linux-tv book-set at ./Documentation/userspace-api/media quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) - cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/media $2 && \ + cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media $2 && \ PYTHONDONTWRITEBYTECODE=1 \ BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(srctree)/$(src)/$5/$(SPHINX_CONF)) \ $(PYTHON) $(srctree)/scripts/jobserver-exec \ @@ -120,7 +120,7 @@ refcheckdocs: cleandocs: $(Q)rm -rf $(BUILDDIR) - $(Q)$(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/media clean + $(Q)$(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media clean dochelp: @echo ' Linux kernel internal documentation in different formats from ReST:' diff --git a/Documentation/doc-guide/parse-headers.rst b/Documentation/doc-guide/parse-headers.rst index 24cfaa15dd81e..f7135b058246c 100644 --- a/Documentation/doc-guide/parse-headers.rst +++ b/Documentation/doc-guide/parse-headers.rst @@ -10,7 +10,7 @@ if a symbol is not found at the documentation. That helps to keep the uAPI documentation in sync with the Kernel changes. The :ref:`parse_headers.pl ` provide a way to generate such cross-references. It has to be called via Makefile, while building the -documentation. Please see ``Documentation/media/Makefile`` for an example +documentation. Please see ``Documentation/userspace-api/media/Makefile`` for an example about how to use it inside the Kernel tree. .. _parse_headers: diff --git a/Documentation/fb/api.rst b/Documentation/fb/api.rst index 79ec33dded74c..4f00e7196fefb 100644 --- a/Documentation/fb/api.rst +++ b/Documentation/fb/api.rst @@ -290,12 +290,12 @@ the FB_CAP_FOURCC bit in the fb_fix_screeninfo capabilities field. FOURCC definitions are located in the linux/videodev2.h header. However, and despite starting with the V4L2_PIX_FMT_prefix, they are not restricted to V4L2 and don't require usage of the V4L2 subsystem. FOURCC documentation is -available in Documentation/media/uapi/v4l/pixfmt.rst. +available in Documentation/userspace-api/media/v4l/pixfmt.rst. To select a format, applications set the grayscale field to the desired FOURCC. For YUV formats, they should also select the appropriate colorspace by setting the colorspace field to one of the colorspaces listed in linux/videodev2.h and -documented in Documentation/media/uapi/v4l/colorspaces.rst. +documented in Documentation/userspace-api/media/v4l/colorspaces.rst. The red, green, blue and transp fields are not used with the FOURCC-based API. For forward compatibility reasons applications must zero those fields, and diff --git a/Documentation/media/index.rst b/Documentation/media/index.rst index 0301c25ff887e..8118c2d001ff4 100644 --- a/Documentation/media/index.rst +++ b/Documentation/media/index.rst @@ -12,7 +12,7 @@ Linux Media Subsystem Documentation .. toctree:: :maxdepth: 2 - media_uapi + ../userspace-api/media/index media_kapi dvb-drivers/index v4l-drivers/index diff --git a/Documentation/translations/it_IT/doc-guide/parse-headers.rst b/Documentation/translations/it_IT/doc-guide/parse-headers.rst index b38918ca637e6..993d549ee2b80 100644 --- a/Documentation/translations/it_IT/doc-guide/parse-headers.rst +++ b/Documentation/translations/it_IT/doc-guide/parse-headers.rst @@ -17,7 +17,7 @@ con le modifiche del kernel. Il programma :ref:`parse_headers.pl ` genera questi riferimenti. Esso dev'essere invocato attraverso un Makefile, mentre si genera la documentazione. Per avere un esempio su come utilizzarlo all'interno del kernel -consultate ``Documentation/media/Makefile``. +consultate ``Documentation/userspace-api/media/Makefile``. .. _it_parse_headers: diff --git a/Documentation/media/Makefile b/Documentation/userspace-api/media/Makefile similarity index 97% rename from Documentation/media/Makefile rename to Documentation/userspace-api/media/Makefile index d75d70f191bc3..81a4a1a53bceb 100644 --- a/Documentation/media/Makefile +++ b/Documentation/userspace-api/media/Makefile @@ -2,7 +2,7 @@ # Rules to convert a .h file to inline RST documentation -SRC_DIR=$(srctree)/Documentation/media +SRC_DIR=$(srctree)/Documentation/userspace-api/media PARSER = $(srctree)/Documentation/sphinx/parse-headers.pl UAPI = $(srctree)/include/uapi/linux KAPI = $(srctree)/include/linux diff --git a/Documentation/media/audio.h.rst.exceptions b/Documentation/userspace-api/media/audio.h.rst.exceptions similarity index 100% rename from Documentation/media/audio.h.rst.exceptions rename to Documentation/userspace-api/media/audio.h.rst.exceptions diff --git a/Documentation/media/ca.h.rst.exceptions b/Documentation/userspace-api/media/ca.h.rst.exceptions similarity index 100% rename from Documentation/media/ca.h.rst.exceptions rename to Documentation/userspace-api/media/ca.h.rst.exceptions diff --git a/Documentation/media/cec.h.rst.exceptions b/Documentation/userspace-api/media/cec.h.rst.exceptions similarity index 100% rename from Documentation/media/cec.h.rst.exceptions rename to Documentation/userspace-api/media/cec.h.rst.exceptions diff --git a/Documentation/media/uapi/cec/cec-api.rst b/Documentation/userspace-api/media/cec/cec-api.rst similarity index 95% rename from Documentation/media/uapi/cec/cec-api.rst rename to Documentation/userspace-api/media/cec/cec-api.rst index 0780ba07995af..871db54dfd243 100644 --- a/Documentation/media/uapi/cec/cec-api.rst +++ b/Documentation/userspace-api/media/cec/cec-api.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-func-close.rst b/Documentation/userspace-api/media/cec/cec-func-close.rst similarity index 95% rename from Documentation/media/uapi/cec/cec-func-close.rst rename to Documentation/userspace-api/media/cec/cec-func-close.rst index e10d675546f85..b89e06a43dade 100644 --- a/Documentation/media/uapi/cec/cec-func-close.rst +++ b/Documentation/userspace-api/media/cec/cec-func-close.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-func-ioctl.rst b/Documentation/userspace-api/media/cec/cec-func-ioctl.rst similarity index 97% rename from Documentation/media/uapi/cec/cec-func-ioctl.rst rename to Documentation/userspace-api/media/cec/cec-func-ioctl.rst index c18d4ba5eb373..d16a479aacb1f 100644 --- a/Documentation/media/uapi/cec/cec-func-ioctl.rst +++ b/Documentation/userspace-api/media/cec/cec-func-ioctl.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-func-open.rst b/Documentation/userspace-api/media/cec/cec-func-open.rst similarity index 97% rename from Documentation/media/uapi/cec/cec-func-open.rst rename to Documentation/userspace-api/media/cec/cec-func-open.rst index f235aa80155cb..67fd021556b2d 100644 --- a/Documentation/media/uapi/cec/cec-func-open.rst +++ b/Documentation/userspace-api/media/cec/cec-func-open.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-func-poll.rst b/Documentation/userspace-api/media/cec/cec-func-poll.rst similarity index 97% rename from Documentation/media/uapi/cec/cec-func-poll.rst rename to Documentation/userspace-api/media/cec/cec-func-poll.rst index 3f6c5b0effa3e..ed3652d9bf177 100644 --- a/Documentation/media/uapi/cec/cec-func-poll.rst +++ b/Documentation/userspace-api/media/cec/cec-func-poll.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-funcs.rst b/Documentation/userspace-api/media/cec/cec-funcs.rst similarity index 93% rename from Documentation/media/uapi/cec/cec-funcs.rst rename to Documentation/userspace-api/media/cec/cec-funcs.rst index dc6da9c639a85..88966b5175d24 100644 --- a/Documentation/media/uapi/cec/cec-funcs.rst +++ b/Documentation/userspace-api/media/cec/cec-funcs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-header.rst b/Documentation/userspace-api/media/cec/cec-header.rst similarity index 90% rename from Documentation/media/uapi/cec/cec-header.rst rename to Documentation/userspace-api/media/cec/cec-header.rst index 726f9766a1304..24a83b0c35afd 100644 --- a/Documentation/media/uapi/cec/cec-header.rst +++ b/Documentation/userspace-api/media/cec/cec-header.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-intro.rst b/Documentation/userspace-api/media/cec/cec-intro.rst similarity index 97% rename from Documentation/media/uapi/cec/cec-intro.rst rename to Documentation/userspace-api/media/cec/cec-intro.rst index 05088fcefe810..a4db823882026 100644 --- a/Documentation/media/uapi/cec/cec-intro.rst +++ b/Documentation/userspace-api/media/cec/cec-intro.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst b/Documentation/userspace-api/media/cec/cec-ioc-adap-g-caps.rst similarity index 98% rename from Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst rename to Documentation/userspace-api/media/cec/cec-ioc-adap-g-caps.rst index 76761a98c3127..94e46a11d68d9 100644 --- a/Documentation/media/uapi/cec/cec-ioc-adap-g-caps.rst +++ b/Documentation/userspace-api/media/cec/cec-ioc-adap-g-caps.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-conn-info.rst b/Documentation/userspace-api/media/cec/cec-ioc-adap-g-conn-info.rst similarity index 100% rename from Documentation/media/uapi/cec/cec-ioc-adap-g-conn-info.rst rename to Documentation/userspace-api/media/cec/cec-ioc-adap-g-conn-info.rst diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst b/Documentation/userspace-api/media/cec/cec-ioc-adap-g-log-addrs.rst similarity index 99% rename from Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst rename to Documentation/userspace-api/media/cec/cec-ioc-adap-g-log-addrs.rst index 26465094e3f17..8ba3511c88b87 100644 --- a/Documentation/media/uapi/cec/cec-ioc-adap-g-log-addrs.rst +++ b/Documentation/userspace-api/media/cec/cec-ioc-adap-g-log-addrs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-ioc-adap-g-phys-addr.rst b/Documentation/userspace-api/media/cec/cec-ioc-adap-g-phys-addr.rst similarity index 98% rename from Documentation/media/uapi/cec/cec-ioc-adap-g-phys-addr.rst rename to Documentation/userspace-api/media/cec/cec-ioc-adap-g-phys-addr.rst index 693be2f9bf2ef..ce8f64c3e0600 100644 --- a/Documentation/media/uapi/cec/cec-ioc-adap-g-phys-addr.rst +++ b/Documentation/userspace-api/media/cec/cec-ioc-adap-g-phys-addr.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-ioc-dqevent.rst b/Documentation/userspace-api/media/cec/cec-ioc-dqevent.rst similarity index 99% rename from Documentation/media/uapi/cec/cec-ioc-dqevent.rst rename to Documentation/userspace-api/media/cec/cec-ioc-dqevent.rst index d16b226b1bef6..4a535fb64b4bc 100644 --- a/Documentation/media/uapi/cec/cec-ioc-dqevent.rst +++ b/Documentation/userspace-api/media/cec/cec-ioc-dqevent.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-ioc-g-mode.rst b/Documentation/userspace-api/media/cec/cec-ioc-g-mode.rst similarity index 99% rename from Documentation/media/uapi/cec/cec-ioc-g-mode.rst rename to Documentation/userspace-api/media/cec/cec-ioc-g-mode.rst index 2535b77e34596..2d3227e80b4f9 100644 --- a/Documentation/media/uapi/cec/cec-ioc-g-mode.rst +++ b/Documentation/userspace-api/media/cec/cec-ioc-g-mode.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-ioc-receive.rst b/Documentation/userspace-api/media/cec/cec-ioc-receive.rst similarity index 99% rename from Documentation/media/uapi/cec/cec-ioc-receive.rst rename to Documentation/userspace-api/media/cec/cec-ioc-receive.rst index 4137903d672e1..e456b2bc92a17 100644 --- a/Documentation/media/uapi/cec/cec-ioc-receive.rst +++ b/Documentation/userspace-api/media/cec/cec-ioc-receive.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/cec/cec-pin-error-inj.rst b/Documentation/userspace-api/media/cec/cec-pin-error-inj.rst similarity index 99% rename from Documentation/media/uapi/cec/cec-pin-error-inj.rst rename to Documentation/userspace-api/media/cec/cec-pin-error-inj.rst index 725f8b1c99659..78632199324d8 100644 --- a/Documentation/media/uapi/cec/cec-pin-error-inj.rst +++ b/Documentation/userspace-api/media/cec/cec-pin-error-inj.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/conf_nitpick.py b/Documentation/userspace-api/media/conf_nitpick.py similarity index 100% rename from Documentation/media/conf_nitpick.py rename to Documentation/userspace-api/media/conf_nitpick.py diff --git a/Documentation/media/dmx.h.rst.exceptions b/Documentation/userspace-api/media/dmx.h.rst.exceptions similarity index 100% rename from Documentation/media/dmx.h.rst.exceptions rename to Documentation/userspace-api/media/dmx.h.rst.exceptions diff --git a/Documentation/media/uapi/dvb/audio-bilingual-channel-select.rst b/Documentation/userspace-api/media/dvb/audio-bilingual-channel-select.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-bilingual-channel-select.rst rename to Documentation/userspace-api/media/dvb/audio-bilingual-channel-select.rst index ee2ee74dafa34..6841233f3fee7 100644 --- a/Documentation/media/uapi/dvb/audio-bilingual-channel-select.rst +++ b/Documentation/userspace-api/media/dvb/audio-bilingual-channel-select.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-channel-select.rst b/Documentation/userspace-api/media/dvb/audio-channel-select.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-channel-select.rst rename to Documentation/userspace-api/media/dvb/audio-channel-select.rst index ebb2f121c4c89..18e880e7eab4b 100644 --- a/Documentation/media/uapi/dvb/audio-channel-select.rst +++ b/Documentation/userspace-api/media/dvb/audio-channel-select.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-clear-buffer.rst b/Documentation/userspace-api/media/dvb/audio-clear-buffer.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-clear-buffer.rst rename to Documentation/userspace-api/media/dvb/audio-clear-buffer.rst index c5b62cde18c8e..19f2ed752ce27 100644 --- a/Documentation/media/uapi/dvb/audio-clear-buffer.rst +++ b/Documentation/userspace-api/media/dvb/audio-clear-buffer.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-continue.rst b/Documentation/userspace-api/media/dvb/audio-continue.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-continue.rst rename to Documentation/userspace-api/media/dvb/audio-continue.rst index 6bdc99e39e20d..b9a2b1e608b62 100644 --- a/Documentation/media/uapi/dvb/audio-continue.rst +++ b/Documentation/userspace-api/media/dvb/audio-continue.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-fclose.rst b/Documentation/userspace-api/media/dvb/audio-fclose.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-fclose.rst rename to Documentation/userspace-api/media/dvb/audio-fclose.rst index 1e4ad7a0325da..448471d2f5705 100644 --- a/Documentation/media/uapi/dvb/audio-fclose.rst +++ b/Documentation/userspace-api/media/dvb/audio-fclose.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-fopen.rst b/Documentation/userspace-api/media/dvb/audio-fopen.rst similarity index 97% rename from Documentation/media/uapi/dvb/audio-fopen.rst rename to Documentation/userspace-api/media/dvb/audio-fopen.rst index 2cf4d83661f44..f7ae94378f92c 100644 --- a/Documentation/media/uapi/dvb/audio-fopen.rst +++ b/Documentation/userspace-api/media/dvb/audio-fopen.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-fwrite.rst b/Documentation/userspace-api/media/dvb/audio-fwrite.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-fwrite.rst rename to Documentation/userspace-api/media/dvb/audio-fwrite.rst index 6dc6bf6cbbc7d..1482636f9b1af 100644 --- a/Documentation/media/uapi/dvb/audio-fwrite.rst +++ b/Documentation/userspace-api/media/dvb/audio-fwrite.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-get-capabilities.rst b/Documentation/userspace-api/media/dvb/audio-get-capabilities.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-get-capabilities.rst rename to Documentation/userspace-api/media/dvb/audio-get-capabilities.rst index 4f1ec47e8ac20..4e70d82969ad7 100644 --- a/Documentation/media/uapi/dvb/audio-get-capabilities.rst +++ b/Documentation/userspace-api/media/dvb/audio-get-capabilities.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-get-status.rst b/Documentation/userspace-api/media/dvb/audio-get-status.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-get-status.rst rename to Documentation/userspace-api/media/dvb/audio-get-status.rst index 30e4dd7fce6dd..5a5180d642d44 100644 --- a/Documentation/media/uapi/dvb/audio-get-status.rst +++ b/Documentation/userspace-api/media/dvb/audio-get-status.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-pause.rst b/Documentation/userspace-api/media/dvb/audio-pause.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-pause.rst rename to Documentation/userspace-api/media/dvb/audio-pause.rst index 4567ecd9e0a32..3e9fe06d3a0f5 100644 --- a/Documentation/media/uapi/dvb/audio-pause.rst +++ b/Documentation/userspace-api/media/dvb/audio-pause.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-play.rst b/Documentation/userspace-api/media/dvb/audio-play.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-play.rst rename to Documentation/userspace-api/media/dvb/audio-play.rst index 17acd4c411b88..388a581a19f22 100644 --- a/Documentation/media/uapi/dvb/audio-play.rst +++ b/Documentation/userspace-api/media/dvb/audio-play.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-select-source.rst b/Documentation/userspace-api/media/dvb/audio-select-source.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-select-source.rst rename to Documentation/userspace-api/media/dvb/audio-select-source.rst index c5ed6243b11c7..1ce64507de930 100644 --- a/Documentation/media/uapi/dvb/audio-select-source.rst +++ b/Documentation/userspace-api/media/dvb/audio-select-source.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-set-av-sync.rst b/Documentation/userspace-api/media/dvb/audio-set-av-sync.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-set-av-sync.rst rename to Documentation/userspace-api/media/dvb/audio-set-av-sync.rst index c116d105fdead..3a0400dcfae49 100644 --- a/Documentation/media/uapi/dvb/audio-set-av-sync.rst +++ b/Documentation/userspace-api/media/dvb/audio-set-av-sync.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-set-bypass-mode.rst b/Documentation/userspace-api/media/dvb/audio-set-bypass-mode.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-set-bypass-mode.rst rename to Documentation/userspace-api/media/dvb/audio-set-bypass-mode.rst index d68f05d48d12f..0d2f23cc2f16d 100644 --- a/Documentation/media/uapi/dvb/audio-set-bypass-mode.rst +++ b/Documentation/userspace-api/media/dvb/audio-set-bypass-mode.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-set-id.rst b/Documentation/userspace-api/media/dvb/audio-set-id.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-set-id.rst rename to Documentation/userspace-api/media/dvb/audio-set-id.rst index aeb6ace6cd1ed..83fc1217fda05 100644 --- a/Documentation/media/uapi/dvb/audio-set-id.rst +++ b/Documentation/userspace-api/media/dvb/audio-set-id.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-set-mixer.rst b/Documentation/userspace-api/media/dvb/audio-set-mixer.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-set-mixer.rst rename to Documentation/userspace-api/media/dvb/audio-set-mixer.rst index 60781aa882022..52bfc3af79dc1 100644 --- a/Documentation/media/uapi/dvb/audio-set-mixer.rst +++ b/Documentation/userspace-api/media/dvb/audio-set-mixer.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-set-mute.rst b/Documentation/userspace-api/media/dvb/audio-set-mute.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-set-mute.rst rename to Documentation/userspace-api/media/dvb/audio-set-mute.rst index 4449f225e48c2..8f3a8332cebc1 100644 --- a/Documentation/media/uapi/dvb/audio-set-mute.rst +++ b/Documentation/userspace-api/media/dvb/audio-set-mute.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-set-streamtype.rst b/Documentation/userspace-api/media/dvb/audio-set-streamtype.rst similarity index 96% rename from Documentation/media/uapi/dvb/audio-set-streamtype.rst rename to Documentation/userspace-api/media/dvb/audio-set-streamtype.rst index d20c34fc71288..c22bd247f03df 100644 --- a/Documentation/media/uapi/dvb/audio-set-streamtype.rst +++ b/Documentation/userspace-api/media/dvb/audio-set-streamtype.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio-stop.rst b/Documentation/userspace-api/media/dvb/audio-stop.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio-stop.rst rename to Documentation/userspace-api/media/dvb/audio-stop.rst index 1bba2e50c3648..291b6a42efac5 100644 --- a/Documentation/media/uapi/dvb/audio-stop.rst +++ b/Documentation/userspace-api/media/dvb/audio-stop.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio.rst b/Documentation/userspace-api/media/dvb/audio.rst similarity index 95% rename from Documentation/media/uapi/dvb/audio.rst rename to Documentation/userspace-api/media/dvb/audio.rst index ebc18fca76a41..e137c151335d7 100644 --- a/Documentation/media/uapi/dvb/audio.rst +++ b/Documentation/userspace-api/media/dvb/audio.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio_data_types.rst b/Documentation/userspace-api/media/dvb/audio_data_types.rst similarity index 98% rename from Documentation/media/uapi/dvb/audio_data_types.rst rename to Documentation/userspace-api/media/dvb/audio_data_types.rst index 5b032fe13b9d8..effe265b12d57 100644 --- a/Documentation/media/uapi/dvb/audio_data_types.rst +++ b/Documentation/userspace-api/media/dvb/audio_data_types.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/audio_function_calls.rst b/Documentation/userspace-api/media/dvb/audio_function_calls.rst similarity index 94% rename from Documentation/media/uapi/dvb/audio_function_calls.rst rename to Documentation/userspace-api/media/dvb/audio_function_calls.rst index 5478e78b085ea..be90a828fe298 100644 --- a/Documentation/media/uapi/dvb/audio_function_calls.rst +++ b/Documentation/userspace-api/media/dvb/audio_function_calls.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-fclose.rst b/Documentation/userspace-api/media/dvb/ca-fclose.rst similarity index 94% rename from Documentation/media/uapi/dvb/ca-fclose.rst rename to Documentation/userspace-api/media/dvb/ca-fclose.rst index e273444ccc677..cedfb7ee6a017 100644 --- a/Documentation/media/uapi/dvb/ca-fclose.rst +++ b/Documentation/userspace-api/media/dvb/ca-fclose.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-fopen.rst b/Documentation/userspace-api/media/dvb/ca-fopen.rst similarity index 97% rename from Documentation/media/uapi/dvb/ca-fopen.rst rename to Documentation/userspace-api/media/dvb/ca-fopen.rst index e11ebeae56931..aa0fde1739a85 100644 --- a/Documentation/media/uapi/dvb/ca-fopen.rst +++ b/Documentation/userspace-api/media/dvb/ca-fopen.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-get-cap.rst b/Documentation/userspace-api/media/dvb/ca-get-cap.rst similarity index 95% rename from Documentation/media/uapi/dvb/ca-get-cap.rst rename to Documentation/userspace-api/media/dvb/ca-get-cap.rst index 9e4fb51863732..b808d05923711 100644 --- a/Documentation/media/uapi/dvb/ca-get-cap.rst +++ b/Documentation/userspace-api/media/dvb/ca-get-cap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-get-descr-info.rst b/Documentation/userspace-api/media/dvb/ca-get-descr-info.rst similarity index 95% rename from Documentation/media/uapi/dvb/ca-get-descr-info.rst rename to Documentation/userspace-api/media/dvb/ca-get-descr-info.rst index 80ef43a339df6..396cc66a82437 100644 --- a/Documentation/media/uapi/dvb/ca-get-descr-info.rst +++ b/Documentation/userspace-api/media/dvb/ca-get-descr-info.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-get-msg.rst b/Documentation/userspace-api/media/dvb/ca-get-msg.rst similarity index 95% rename from Documentation/media/uapi/dvb/ca-get-msg.rst rename to Documentation/userspace-api/media/dvb/ca-get-msg.rst index bcb7955a0ddc4..995f461d68792 100644 --- a/Documentation/media/uapi/dvb/ca-get-msg.rst +++ b/Documentation/userspace-api/media/dvb/ca-get-msg.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-get-slot-info.rst b/Documentation/userspace-api/media/dvb/ca-get-slot-info.rst similarity index 96% rename from Documentation/media/uapi/dvb/ca-get-slot-info.rst rename to Documentation/userspace-api/media/dvb/ca-get-slot-info.rst index 1ea5c497f2ea0..c65987ff9cb38 100644 --- a/Documentation/media/uapi/dvb/ca-get-slot-info.rst +++ b/Documentation/userspace-api/media/dvb/ca-get-slot-info.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-reset.rst b/Documentation/userspace-api/media/dvb/ca-reset.rst similarity index 94% rename from Documentation/media/uapi/dvb/ca-reset.rst rename to Documentation/userspace-api/media/dvb/ca-reset.rst index 29fda19984bed..116a5a8eeb5da 100644 --- a/Documentation/media/uapi/dvb/ca-reset.rst +++ b/Documentation/userspace-api/media/dvb/ca-reset.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-send-msg.rst b/Documentation/userspace-api/media/dvb/ca-send-msg.rst similarity index 95% rename from Documentation/media/uapi/dvb/ca-send-msg.rst rename to Documentation/userspace-api/media/dvb/ca-send-msg.rst index 5a3c4e8120c41..716d88e0fdc50 100644 --- a/Documentation/media/uapi/dvb/ca-send-msg.rst +++ b/Documentation/userspace-api/media/dvb/ca-send-msg.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca-set-descr.rst b/Documentation/userspace-api/media/dvb/ca-set-descr.rst similarity index 95% rename from Documentation/media/uapi/dvb/ca-set-descr.rst rename to Documentation/userspace-api/media/dvb/ca-set-descr.rst index d36464ba2317d..2c57371675e2f 100644 --- a/Documentation/media/uapi/dvb/ca-set-descr.rst +++ b/Documentation/userspace-api/media/dvb/ca-set-descr.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca.rst b/Documentation/userspace-api/media/dvb/ca.rst similarity index 94% rename from Documentation/media/uapi/dvb/ca.rst rename to Documentation/userspace-api/media/dvb/ca.rst index c6ee624b1234f..643b7c4149433 100644 --- a/Documentation/media/uapi/dvb/ca.rst +++ b/Documentation/userspace-api/media/dvb/ca.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca_data_types.rst b/Documentation/userspace-api/media/dvb/ca_data_types.rst similarity index 90% rename from Documentation/media/uapi/dvb/ca_data_types.rst rename to Documentation/userspace-api/media/dvb/ca_data_types.rst index 834c8ab4c300c..20e2b552144fc 100644 --- a/Documentation/media/uapi/dvb/ca_data_types.rst +++ b/Documentation/userspace-api/media/dvb/ca_data_types.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca_function_calls.rst b/Documentation/userspace-api/media/dvb/ca_function_calls.rst similarity index 92% rename from Documentation/media/uapi/dvb/ca_function_calls.rst rename to Documentation/userspace-api/media/dvb/ca_function_calls.rst index 6985bebd0661a..b8aceb1895b64 100644 --- a/Documentation/media/uapi/dvb/ca_function_calls.rst +++ b/Documentation/userspace-api/media/dvb/ca_function_calls.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/ca_high_level.rst b/Documentation/userspace-api/media/dvb/ca_high_level.rst similarity index 100% rename from Documentation/media/uapi/dvb/ca_high_level.rst rename to Documentation/userspace-api/media/dvb/ca_high_level.rst diff --git a/Documentation/media/uapi/dvb/demux.rst b/Documentation/userspace-api/media/dvb/demux.rst similarity index 94% rename from Documentation/media/uapi/dvb/demux.rst rename to Documentation/userspace-api/media/dvb/demux.rst index d8c0ff4015fe5..00397b075e0f1 100644 --- a/Documentation/media/uapi/dvb/demux.rst +++ b/Documentation/userspace-api/media/dvb/demux.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-add-pid.rst b/Documentation/userspace-api/media/dvb/dmx-add-pid.rst similarity index 95% rename from Documentation/media/uapi/dvb/dmx-add-pid.rst rename to Documentation/userspace-api/media/dvb/dmx-add-pid.rst index f483268e4ede6..e309cd56fdf06 100644 --- a/Documentation/media/uapi/dvb/dmx-add-pid.rst +++ b/Documentation/userspace-api/media/dvb/dmx-add-pid.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-expbuf.rst b/Documentation/userspace-api/media/dvb/dmx-expbuf.rst similarity index 97% rename from Documentation/media/uapi/dvb/dmx-expbuf.rst rename to Documentation/userspace-api/media/dvb/dmx-expbuf.rst index d7f0658f3db34..f76db8ce3cfa5 100644 --- a/Documentation/media/uapi/dvb/dmx-expbuf.rst +++ b/Documentation/userspace-api/media/dvb/dmx-expbuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-fclose.rst b/Documentation/userspace-api/media/dvb/dmx-fclose.rst similarity index 95% rename from Documentation/media/uapi/dvb/dmx-fclose.rst rename to Documentation/userspace-api/media/dvb/dmx-fclose.rst index 05ff322702745..e93bc60da508e 100644 --- a/Documentation/media/uapi/dvb/dmx-fclose.rst +++ b/Documentation/userspace-api/media/dvb/dmx-fclose.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-fopen.rst b/Documentation/userspace-api/media/dvb/dmx-fopen.rst similarity index 97% rename from Documentation/media/uapi/dvb/dmx-fopen.rst rename to Documentation/userspace-api/media/dvb/dmx-fopen.rst index 2700a2fad68b9..ea988714558e2 100644 --- a/Documentation/media/uapi/dvb/dmx-fopen.rst +++ b/Documentation/userspace-api/media/dvb/dmx-fopen.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-fread.rst b/Documentation/userspace-api/media/dvb/dmx-fread.rst similarity index 97% rename from Documentation/media/uapi/dvb/dmx-fread.rst rename to Documentation/userspace-api/media/dvb/dmx-fread.rst index 292fa98f39ffe..25501be818f81 100644 --- a/Documentation/media/uapi/dvb/dmx-fread.rst +++ b/Documentation/userspace-api/media/dvb/dmx-fread.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-fwrite.rst b/Documentation/userspace-api/media/dvb/dmx-fwrite.rst similarity index 97% rename from Documentation/media/uapi/dvb/dmx-fwrite.rst rename to Documentation/userspace-api/media/dvb/dmx-fwrite.rst index bdd4d4743bd5e..4400f4ef8c65d 100644 --- a/Documentation/media/uapi/dvb/dmx-fwrite.rst +++ b/Documentation/userspace-api/media/dvb/dmx-fwrite.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-get-pes-pids.rst b/Documentation/userspace-api/media/dvb/dmx-get-pes-pids.rst similarity index 96% rename from Documentation/media/uapi/dvb/dmx-get-pes-pids.rst rename to Documentation/userspace-api/media/dvb/dmx-get-pes-pids.rst index fcd3dc06c0954..e1873e3fdc015 100644 --- a/Documentation/media/uapi/dvb/dmx-get-pes-pids.rst +++ b/Documentation/userspace-api/media/dvb/dmx-get-pes-pids.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-get-stc.rst b/Documentation/userspace-api/media/dvb/dmx-get-stc.rst similarity index 96% rename from Documentation/media/uapi/dvb/dmx-get-stc.rst rename to Documentation/userspace-api/media/dvb/dmx-get-stc.rst index 2c81595f470a2..026a884edb0a4 100644 --- a/Documentation/media/uapi/dvb/dmx-get-stc.rst +++ b/Documentation/userspace-api/media/dvb/dmx-get-stc.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-mmap.rst b/Documentation/userspace-api/media/dvb/dmx-mmap.rst similarity index 98% rename from Documentation/media/uapi/dvb/dmx-mmap.rst rename to Documentation/userspace-api/media/dvb/dmx-mmap.rst index 34bb7766718fe..828ba9df73e21 100644 --- a/Documentation/media/uapi/dvb/dmx-mmap.rst +++ b/Documentation/userspace-api/media/dvb/dmx-mmap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-munmap.rst b/Documentation/userspace-api/media/dvb/dmx-munmap.rst similarity index 96% rename from Documentation/media/uapi/dvb/dmx-munmap.rst rename to Documentation/userspace-api/media/dvb/dmx-munmap.rst index ef26b6f2b12bb..905fdd585a860 100644 --- a/Documentation/media/uapi/dvb/dmx-munmap.rst +++ b/Documentation/userspace-api/media/dvb/dmx-munmap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-qbuf.rst b/Documentation/userspace-api/media/dvb/dmx-qbuf.rst similarity index 98% rename from Documentation/media/uapi/dvb/dmx-qbuf.rst rename to Documentation/userspace-api/media/dvb/dmx-qbuf.rst index 9dc845daa59de..2c4657c2c86d4 100644 --- a/Documentation/media/uapi/dvb/dmx-qbuf.rst +++ b/Documentation/userspace-api/media/dvb/dmx-qbuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-querybuf.rst b/Documentation/userspace-api/media/dvb/dmx-querybuf.rst similarity index 97% rename from Documentation/media/uapi/dvb/dmx-querybuf.rst rename to Documentation/userspace-api/media/dvb/dmx-querybuf.rst index 4cf36e8216960..6e234daf1c449 100644 --- a/Documentation/media/uapi/dvb/dmx-querybuf.rst +++ b/Documentation/userspace-api/media/dvb/dmx-querybuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-remove-pid.rst b/Documentation/userspace-api/media/dvb/dmx-remove-pid.rst similarity index 95% rename from Documentation/media/uapi/dvb/dmx-remove-pid.rst rename to Documentation/userspace-api/media/dvb/dmx-remove-pid.rst index be992f44f306c..dee553a48b633 100644 --- a/Documentation/media/uapi/dvb/dmx-remove-pid.rst +++ b/Documentation/userspace-api/media/dvb/dmx-remove-pid.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-reqbufs.rst b/Documentation/userspace-api/media/dvb/dmx-reqbufs.rst similarity index 98% rename from Documentation/media/uapi/dvb/dmx-reqbufs.rst rename to Documentation/userspace-api/media/dvb/dmx-reqbufs.rst index b302785bf678d..9b9be45d2b0b7 100644 --- a/Documentation/media/uapi/dvb/dmx-reqbufs.rst +++ b/Documentation/userspace-api/media/dvb/dmx-reqbufs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-set-buffer-size.rst b/Documentation/userspace-api/media/dvb/dmx-set-buffer-size.rst similarity index 95% rename from Documentation/media/uapi/dvb/dmx-set-buffer-size.rst rename to Documentation/userspace-api/media/dvb/dmx-set-buffer-size.rst index 2dee0fb11f625..7c91da1da4bec 100644 --- a/Documentation/media/uapi/dvb/dmx-set-buffer-size.rst +++ b/Documentation/userspace-api/media/dvb/dmx-set-buffer-size.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-set-filter.rst b/Documentation/userspace-api/media/dvb/dmx-set-filter.rst similarity index 96% rename from Documentation/media/uapi/dvb/dmx-set-filter.rst rename to Documentation/userspace-api/media/dvb/dmx-set-filter.rst index 66afbb9f2fe47..cb3333349bd03 100644 --- a/Documentation/media/uapi/dvb/dmx-set-filter.rst +++ b/Documentation/userspace-api/media/dvb/dmx-set-filter.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-set-pes-filter.rst b/Documentation/userspace-api/media/dvb/dmx-set-pes-filter.rst similarity index 96% rename from Documentation/media/uapi/dvb/dmx-set-pes-filter.rst rename to Documentation/userspace-api/media/dvb/dmx-set-pes-filter.rst index dae5ab7878e5b..26da569476520 100644 --- a/Documentation/media/uapi/dvb/dmx-set-pes-filter.rst +++ b/Documentation/userspace-api/media/dvb/dmx-set-pes-filter.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-start.rst b/Documentation/userspace-api/media/dvb/dmx-start.rst similarity index 96% rename from Documentation/media/uapi/dvb/dmx-start.rst rename to Documentation/userspace-api/media/dvb/dmx-start.rst index 488289d025040..a1d35f01fc952 100644 --- a/Documentation/media/uapi/dvb/dmx-start.rst +++ b/Documentation/userspace-api/media/dvb/dmx-start.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx-stop.rst b/Documentation/userspace-api/media/dvb/dmx-stop.rst similarity index 95% rename from Documentation/media/uapi/dvb/dmx-stop.rst rename to Documentation/userspace-api/media/dvb/dmx-stop.rst index 982384d129233..5e6e805010d0b 100644 --- a/Documentation/media/uapi/dvb/dmx-stop.rst +++ b/Documentation/userspace-api/media/dvb/dmx-stop.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx_fcalls.rst b/Documentation/userspace-api/media/dvb/dmx_fcalls.rst similarity index 93% rename from Documentation/media/uapi/dvb/dmx_fcalls.rst rename to Documentation/userspace-api/media/dvb/dmx_fcalls.rst index 67312ab65f943..04e150f00f845 100644 --- a/Documentation/media/uapi/dvb/dmx_fcalls.rst +++ b/Documentation/userspace-api/media/dvb/dmx_fcalls.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dmx_types.rst b/Documentation/userspace-api/media/dvb/dmx_types.rst similarity index 90% rename from Documentation/media/uapi/dvb/dmx_types.rst rename to Documentation/userspace-api/media/dvb/dmx_types.rst index b5cf704199e5d..635b8fd363be9 100644 --- a/Documentation/media/uapi/dvb/dmx_types.rst +++ b/Documentation/userspace-api/media/dvb/dmx_types.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dvb-fe-read-status.rst b/Documentation/userspace-api/media/dvb/dvb-fe-read-status.rst similarity index 95% rename from Documentation/media/uapi/dvb/dvb-fe-read-status.rst rename to Documentation/userspace-api/media/dvb/dvb-fe-read-status.rst index 172783b75fb73..5d6a7735a9d1a 100644 --- a/Documentation/media/uapi/dvb/dvb-fe-read-status.rst +++ b/Documentation/userspace-api/media/dvb/dvb-fe-read-status.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dvb-frontend-event.rst b/Documentation/userspace-api/media/dvb/dvb-frontend-event.rst similarity index 91% rename from Documentation/media/uapi/dvb/dvb-frontend-event.rst rename to Documentation/userspace-api/media/dvb/dvb-frontend-event.rst index ad4af66040c75..7f5e56cf75cb3 100644 --- a/Documentation/media/uapi/dvb/dvb-frontend-event.rst +++ b/Documentation/userspace-api/media/dvb/dvb-frontend-event.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dvb-frontend-parameters.rst b/Documentation/userspace-api/media/dvb/dvb-frontend-parameters.rst similarity index 98% rename from Documentation/media/uapi/dvb/dvb-frontend-parameters.rst rename to Documentation/userspace-api/media/dvb/dvb-frontend-parameters.rst index 67c2a316019f3..83b1bcc6ef54e 100644 --- a/Documentation/media/uapi/dvb/dvb-frontend-parameters.rst +++ b/Documentation/userspace-api/media/dvb/dvb-frontend-parameters.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dvbapi.rst b/Documentation/userspace-api/media/dvb/dvbapi.rst similarity index 98% rename from Documentation/media/uapi/dvb/dvbapi.rst rename to Documentation/userspace-api/media/dvb/dvbapi.rst index 0fcc01f182f9f..74b16ab3fd946 100644 --- a/Documentation/media/uapi/dvb/dvbapi.rst +++ b/Documentation/userspace-api/media/dvb/dvbapi.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dvbproperty.rst b/Documentation/userspace-api/media/dvb/dvbproperty.rst similarity index 98% rename from Documentation/media/uapi/dvb/dvbproperty.rst rename to Documentation/userspace-api/media/dvb/dvbproperty.rst index 0c4f5598f2be7..1716733d24baf 100644 --- a/Documentation/media/uapi/dvb/dvbproperty.rst +++ b/Documentation/userspace-api/media/dvb/dvbproperty.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/dvbstb.svg b/Documentation/userspace-api/media/dvb/dvbstb.svg similarity index 99% rename from Documentation/media/uapi/dvb/dvbstb.svg rename to Documentation/userspace-api/media/dvb/dvbstb.svg index c7672148d6ffa..b333d0ff944f6 100644 --- a/Documentation/media/uapi/dvb/dvbstb.svg +++ b/Documentation/userspace-api/media/dvb/dvbstb.svg @@ -22,7 +22,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/dvb/examples.rst b/Documentation/userspace-api/media/dvb/examples.rst similarity index 93% rename from Documentation/media/uapi/dvb/examples.rst rename to Documentation/userspace-api/media/dvb/examples.rst index eaa41bc8d1731..bd0adde86b96c 100644 --- a/Documentation/media/uapi/dvb/examples.rst +++ b/Documentation/userspace-api/media/dvb/examples.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-bandwidth-t.rst b/Documentation/userspace-api/media/dvb/fe-bandwidth-t.rst similarity index 95% rename from Documentation/media/uapi/dvb/fe-bandwidth-t.rst rename to Documentation/userspace-api/media/dvb/fe-bandwidth-t.rst index c3d7837b5f87d..6293287af67c3 100644 --- a/Documentation/media/uapi/dvb/fe-bandwidth-t.rst +++ b/Documentation/userspace-api/media/dvb/fe-bandwidth-t.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-diseqc-recv-slave-reply.rst b/Documentation/userspace-api/media/dvb/fe-diseqc-recv-slave-reply.rst similarity index 95% rename from Documentation/media/uapi/dvb/fe-diseqc-recv-slave-reply.rst rename to Documentation/userspace-api/media/dvb/fe-diseqc-recv-slave-reply.rst index 88fd2186ca4da..b520974e8c46d 100644 --- a/Documentation/media/uapi/dvb/fe-diseqc-recv-slave-reply.rst +++ b/Documentation/userspace-api/media/dvb/fe-diseqc-recv-slave-reply.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-diseqc-reset-overload.rst b/Documentation/userspace-api/media/dvb/fe-diseqc-reset-overload.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-diseqc-reset-overload.rst rename to Documentation/userspace-api/media/dvb/fe-diseqc-reset-overload.rst index 92929c2e75dbf..c59af46b8e872 100644 --- a/Documentation/media/uapi/dvb/fe-diseqc-reset-overload.rst +++ b/Documentation/userspace-api/media/dvb/fe-diseqc-reset-overload.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-diseqc-send-burst.rst b/Documentation/userspace-api/media/dvb/fe-diseqc-send-burst.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-diseqc-send-burst.rst rename to Documentation/userspace-api/media/dvb/fe-diseqc-send-burst.rst index 8af872d306aaf..19b51d0550f7f 100644 --- a/Documentation/media/uapi/dvb/fe-diseqc-send-burst.rst +++ b/Documentation/userspace-api/media/dvb/fe-diseqc-send-burst.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-diseqc-send-master-cmd.rst b/Documentation/userspace-api/media/dvb/fe-diseqc-send-master-cmd.rst similarity index 95% rename from Documentation/media/uapi/dvb/fe-diseqc-send-master-cmd.rst rename to Documentation/userspace-api/media/dvb/fe-diseqc-send-master-cmd.rst index 30a48114153c0..f75513d018c8b 100644 --- a/Documentation/media/uapi/dvb/fe-diseqc-send-master-cmd.rst +++ b/Documentation/userspace-api/media/dvb/fe-diseqc-send-master-cmd.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-dishnetwork-send-legacy-cmd.rst b/Documentation/userspace-api/media/dvb/fe-dishnetwork-send-legacy-cmd.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-dishnetwork-send-legacy-cmd.rst rename to Documentation/userspace-api/media/dvb/fe-dishnetwork-send-legacy-cmd.rst index 13811289971b0..ea66f72fe5f89 100644 --- a/Documentation/media/uapi/dvb/fe-dishnetwork-send-legacy-cmd.rst +++ b/Documentation/userspace-api/media/dvb/fe-dishnetwork-send-legacy-cmd.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-enable-high-lnb-voltage.rst b/Documentation/userspace-api/media/dvb/fe-enable-high-lnb-voltage.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-enable-high-lnb-voltage.rst rename to Documentation/userspace-api/media/dvb/fe-enable-high-lnb-voltage.rst index 32b7d140d80b5..9bdf1e898ddce 100644 --- a/Documentation/media/uapi/dvb/fe-enable-high-lnb-voltage.rst +++ b/Documentation/userspace-api/media/dvb/fe-enable-high-lnb-voltage.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-get-event.rst b/Documentation/userspace-api/media/dvb/fe-get-event.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-get-event.rst rename to Documentation/userspace-api/media/dvb/fe-get-event.rst index 2573d5b9b6365..19df41dca2389 100644 --- a/Documentation/media/uapi/dvb/fe-get-event.rst +++ b/Documentation/userspace-api/media/dvb/fe-get-event.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-get-frontend.rst b/Documentation/userspace-api/media/dvb/fe-get-frontend.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-get-frontend.rst rename to Documentation/userspace-api/media/dvb/fe-get-frontend.rst index 6cd5250d1832a..7968adc8e9823 100644 --- a/Documentation/media/uapi/dvb/fe-get-frontend.rst +++ b/Documentation/userspace-api/media/dvb/fe-get-frontend.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-get-info.rst b/Documentation/userspace-api/media/dvb/fe-get-info.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-get-info.rst rename to Documentation/userspace-api/media/dvb/fe-get-info.rst index 551e68b115283..80d9f8195ac45 100644 --- a/Documentation/media/uapi/dvb/fe-get-info.rst +++ b/Documentation/userspace-api/media/dvb/fe-get-info.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-get-property.rst b/Documentation/userspace-api/media/dvb/fe-get-property.rst similarity index 97% rename from Documentation/media/uapi/dvb/fe-get-property.rst rename to Documentation/userspace-api/media/dvb/fe-get-property.rst index 99386c7461b32..088d4e319405f 100644 --- a/Documentation/media/uapi/dvb/fe-get-property.rst +++ b/Documentation/userspace-api/media/dvb/fe-get-property.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-read-ber.rst b/Documentation/userspace-api/media/dvb/fe-read-ber.rst similarity index 95% rename from Documentation/media/uapi/dvb/fe-read-ber.rst rename to Documentation/userspace-api/media/dvb/fe-read-ber.rst index e579d648687ef..d0a706ac90112 100644 --- a/Documentation/media/uapi/dvb/fe-read-ber.rst +++ b/Documentation/userspace-api/media/dvb/fe-read-ber.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-read-signal-strength.rst b/Documentation/userspace-api/media/dvb/fe-read-signal-strength.rst similarity index 95% rename from Documentation/media/uapi/dvb/fe-read-signal-strength.rst rename to Documentation/userspace-api/media/dvb/fe-read-signal-strength.rst index 0a0c0c2ff207a..df79837de47db 100644 --- a/Documentation/media/uapi/dvb/fe-read-signal-strength.rst +++ b/Documentation/userspace-api/media/dvb/fe-read-signal-strength.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-read-snr.rst b/Documentation/userspace-api/media/dvb/fe-read-snr.rst similarity index 95% rename from Documentation/media/uapi/dvb/fe-read-snr.rst rename to Documentation/userspace-api/media/dvb/fe-read-snr.rst index 2a7a0d8f1fd55..e56147a40e23c 100644 --- a/Documentation/media/uapi/dvb/fe-read-snr.rst +++ b/Documentation/userspace-api/media/dvb/fe-read-snr.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-read-status.rst b/Documentation/userspace-api/media/dvb/fe-read-status.rst similarity index 97% rename from Documentation/media/uapi/dvb/fe-read-status.rst rename to Documentation/userspace-api/media/dvb/fe-read-status.rst index 0dfc9fdf568f4..cf781d463a206 100644 --- a/Documentation/media/uapi/dvb/fe-read-status.rst +++ b/Documentation/userspace-api/media/dvb/fe-read-status.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-read-uncorrected-blocks.rst b/Documentation/userspace-api/media/dvb/fe-read-uncorrected-blocks.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-read-uncorrected-blocks.rst rename to Documentation/userspace-api/media/dvb/fe-read-uncorrected-blocks.rst index 19c532f750aa3..d042e8c86930c 100644 --- a/Documentation/media/uapi/dvb/fe-read-uncorrected-blocks.rst +++ b/Documentation/userspace-api/media/dvb/fe-read-uncorrected-blocks.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-set-frontend-tune-mode.rst b/Documentation/userspace-api/media/dvb/fe-set-frontend-tune-mode.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-set-frontend-tune-mode.rst rename to Documentation/userspace-api/media/dvb/fe-set-frontend-tune-mode.rst index 36e8913170e1c..8e059967f49ce 100644 --- a/Documentation/media/uapi/dvb/fe-set-frontend-tune-mode.rst +++ b/Documentation/userspace-api/media/dvb/fe-set-frontend-tune-mode.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-set-frontend.rst b/Documentation/userspace-api/media/dvb/fe-set-frontend.rst similarity index 97% rename from Documentation/media/uapi/dvb/fe-set-frontend.rst rename to Documentation/userspace-api/media/dvb/fe-set-frontend.rst index 23caae2588d27..960c95cb18a00 100644 --- a/Documentation/media/uapi/dvb/fe-set-frontend.rst +++ b/Documentation/userspace-api/media/dvb/fe-set-frontend.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-set-tone.rst b/Documentation/userspace-api/media/dvb/fe-set-tone.rst similarity index 96% rename from Documentation/media/uapi/dvb/fe-set-tone.rst rename to Documentation/userspace-api/media/dvb/fe-set-tone.rst index fb605e8c9fc43..5726a20c79910 100644 --- a/Documentation/media/uapi/dvb/fe-set-tone.rst +++ b/Documentation/userspace-api/media/dvb/fe-set-tone.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-set-voltage.rst b/Documentation/userspace-api/media/dvb/fe-set-voltage.rst similarity index 97% rename from Documentation/media/uapi/dvb/fe-set-voltage.rst rename to Documentation/userspace-api/media/dvb/fe-set-voltage.rst index c81a8e6a59aa4..f3191808f4fd6 100644 --- a/Documentation/media/uapi/dvb/fe-set-voltage.rst +++ b/Documentation/userspace-api/media/dvb/fe-set-voltage.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe-type-t.rst b/Documentation/userspace-api/media/dvb/fe-type-t.rst similarity index 97% rename from Documentation/media/uapi/dvb/fe-type-t.rst rename to Documentation/userspace-api/media/dvb/fe-type-t.rst index 9720d2f7ba353..1617a8cc9045b 100644 --- a/Documentation/media/uapi/dvb/fe-type-t.rst +++ b/Documentation/userspace-api/media/dvb/fe-type-t.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/fe_property_parameters.rst b/Documentation/userspace-api/media/dvb/fe_property_parameters.rst similarity index 99% rename from Documentation/media/uapi/dvb/fe_property_parameters.rst rename to Documentation/userspace-api/media/dvb/fe_property_parameters.rst index 2fd2954d8dae0..3f4ced2800e36 100644 --- a/Documentation/media/uapi/dvb/fe_property_parameters.rst +++ b/Documentation/userspace-api/media/dvb/fe_property_parameters.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend-header.rst b/Documentation/userspace-api/media/dvb/frontend-header.rst similarity index 90% rename from Documentation/media/uapi/dvb/frontend-header.rst rename to Documentation/userspace-api/media/dvb/frontend-header.rst index 635fb42512144..cf8e515e5e1fc 100644 --- a/Documentation/media/uapi/dvb/frontend-header.rst +++ b/Documentation/userspace-api/media/dvb/frontend-header.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend-property-cable-systems.rst b/Documentation/userspace-api/media/dvb/frontend-property-cable-systems.rst similarity index 97% rename from Documentation/media/uapi/dvb/frontend-property-cable-systems.rst rename to Documentation/userspace-api/media/dvb/frontend-property-cable-systems.rst index 97fbfc228c109..56657a6ec6ff6 100644 --- a/Documentation/media/uapi/dvb/frontend-property-cable-systems.rst +++ b/Documentation/userspace-api/media/dvb/frontend-property-cable-systems.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend-property-satellite-systems.rst b/Documentation/userspace-api/media/dvb/frontend-property-satellite-systems.rst similarity index 97% rename from Documentation/media/uapi/dvb/frontend-property-satellite-systems.rst rename to Documentation/userspace-api/media/dvb/frontend-property-satellite-systems.rst index 2bc880a3c8261..e64fd625c476f 100644 --- a/Documentation/media/uapi/dvb/frontend-property-satellite-systems.rst +++ b/Documentation/userspace-api/media/dvb/frontend-property-satellite-systems.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend-property-terrestrial-systems.rst b/Documentation/userspace-api/media/dvb/frontend-property-terrestrial-systems.rst similarity index 99% rename from Documentation/media/uapi/dvb/frontend-property-terrestrial-systems.rst rename to Documentation/userspace-api/media/dvb/frontend-property-terrestrial-systems.rst index c20af13297e59..1079522b24250 100644 --- a/Documentation/media/uapi/dvb/frontend-property-terrestrial-systems.rst +++ b/Documentation/userspace-api/media/dvb/frontend-property-terrestrial-systems.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend-stat-properties.rst b/Documentation/userspace-api/media/dvb/frontend-stat-properties.rst similarity index 99% rename from Documentation/media/uapi/dvb/frontend-stat-properties.rst rename to Documentation/userspace-api/media/dvb/frontend-stat-properties.rst index 546464db04b58..ae6ed5128deb3 100644 --- a/Documentation/media/uapi/dvb/frontend-stat-properties.rst +++ b/Documentation/userspace-api/media/dvb/frontend-stat-properties.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend.rst b/Documentation/userspace-api/media/dvb/frontend.rst similarity index 97% rename from Documentation/media/uapi/dvb/frontend.rst rename to Documentation/userspace-api/media/dvb/frontend.rst index 7ff225dfe11ca..41ad519ca502c 100644 --- a/Documentation/media/uapi/dvb/frontend.rst +++ b/Documentation/userspace-api/media/dvb/frontend.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend_f_close.rst b/Documentation/userspace-api/media/dvb/frontend_f_close.rst similarity index 95% rename from Documentation/media/uapi/dvb/frontend_f_close.rst rename to Documentation/userspace-api/media/dvb/frontend_f_close.rst index af87c2a837195..582e19a83c1ac 100644 --- a/Documentation/media/uapi/dvb/frontend_f_close.rst +++ b/Documentation/userspace-api/media/dvb/frontend_f_close.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend_f_open.rst b/Documentation/userspace-api/media/dvb/frontend_f_open.rst similarity index 98% rename from Documentation/media/uapi/dvb/frontend_f_open.rst rename to Documentation/userspace-api/media/dvb/frontend_f_open.rst index 6a46ec5acf7bd..0be3b249d33be 100644 --- a/Documentation/media/uapi/dvb/frontend_f_open.rst +++ b/Documentation/userspace-api/media/dvb/frontend_f_open.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend_fcalls.rst b/Documentation/userspace-api/media/dvb/frontend_fcalls.rst similarity index 93% rename from Documentation/media/uapi/dvb/frontend_fcalls.rst rename to Documentation/userspace-api/media/dvb/frontend_fcalls.rst index 9b3586f538ea2..2b5e7a4dba9e7 100644 --- a/Documentation/media/uapi/dvb/frontend_fcalls.rst +++ b/Documentation/userspace-api/media/dvb/frontend_fcalls.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend_legacy_api.rst b/Documentation/userspace-api/media/dvb/frontend_legacy_api.rst similarity index 95% rename from Documentation/media/uapi/dvb/frontend_legacy_api.rst rename to Documentation/userspace-api/media/dvb/frontend_legacy_api.rst index 1ea749d09ca22..1bd804f9b364b 100644 --- a/Documentation/media/uapi/dvb/frontend_legacy_api.rst +++ b/Documentation/userspace-api/media/dvb/frontend_legacy_api.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/frontend_legacy_dvbv3_api.rst b/Documentation/userspace-api/media/dvb/frontend_legacy_dvbv3_api.rst similarity index 93% rename from Documentation/media/uapi/dvb/frontend_legacy_dvbv3_api.rst rename to Documentation/userspace-api/media/dvb/frontend_legacy_dvbv3_api.rst index 1567bc73855ae..29ad0f9b90a4d 100644 --- a/Documentation/media/uapi/dvb/frontend_legacy_dvbv3_api.rst +++ b/Documentation/userspace-api/media/dvb/frontend_legacy_dvbv3_api.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/headers.rst b/Documentation/userspace-api/media/dvb/headers.rst similarity index 93% rename from Documentation/media/uapi/dvb/headers.rst rename to Documentation/userspace-api/media/dvb/headers.rst index edeabd9e8e90f..ffd8f432484a8 100644 --- a/Documentation/media/uapi/dvb/headers.rst +++ b/Documentation/userspace-api/media/dvb/headers.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/intro.rst b/Documentation/userspace-api/media/dvb/intro.rst similarity index 99% rename from Documentation/media/uapi/dvb/intro.rst rename to Documentation/userspace-api/media/dvb/intro.rst index f1384616ac4ec..f1235ef4599eb 100644 --- a/Documentation/media/uapi/dvb/intro.rst +++ b/Documentation/userspace-api/media/dvb/intro.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/legacy_dvb_apis.rst b/Documentation/userspace-api/media/dvb/legacy_dvb_apis.rst similarity index 95% rename from Documentation/media/uapi/dvb/legacy_dvb_apis.rst rename to Documentation/userspace-api/media/dvb/legacy_dvb_apis.rst index a43b4c36d9358..17c3b062afb33 100644 --- a/Documentation/media/uapi/dvb/legacy_dvb_apis.rst +++ b/Documentation/userspace-api/media/dvb/legacy_dvb_apis.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/net-add-if.rst b/Documentation/userspace-api/media/dvb/net-add-if.rst similarity index 96% rename from Documentation/media/uapi/dvb/net-add-if.rst rename to Documentation/userspace-api/media/dvb/net-add-if.rst index 1188641b453e5..e75ec4d80a08a 100644 --- a/Documentation/media/uapi/dvb/net-add-if.rst +++ b/Documentation/userspace-api/media/dvb/net-add-if.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/net-get-if.rst b/Documentation/userspace-api/media/dvb/net-get-if.rst similarity index 96% rename from Documentation/media/uapi/dvb/net-get-if.rst rename to Documentation/userspace-api/media/dvb/net-get-if.rst index 7c4ef4b9d6cc8..c5421d9a8c0b0 100644 --- a/Documentation/media/uapi/dvb/net-get-if.rst +++ b/Documentation/userspace-api/media/dvb/net-get-if.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/net-remove-if.rst b/Documentation/userspace-api/media/dvb/net-remove-if.rst similarity index 95% rename from Documentation/media/uapi/dvb/net-remove-if.rst rename to Documentation/userspace-api/media/dvb/net-remove-if.rst index bf9a1602eeec1..d530559f66f1d 100644 --- a/Documentation/media/uapi/dvb/net-remove-if.rst +++ b/Documentation/userspace-api/media/dvb/net-remove-if.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/net-types.rst b/Documentation/userspace-api/media/dvb/net-types.rst similarity index 90% rename from Documentation/media/uapi/dvb/net-types.rst rename to Documentation/userspace-api/media/dvb/net-types.rst index 9e16462a1ef42..94323cffe8afc 100644 --- a/Documentation/media/uapi/dvb/net-types.rst +++ b/Documentation/userspace-api/media/dvb/net-types.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/net.rst b/Documentation/userspace-api/media/dvb/net.rst similarity index 96% rename from Documentation/media/uapi/dvb/net.rst rename to Documentation/userspace-api/media/dvb/net.rst index 833daa381968b..084f33d1ba289 100644 --- a/Documentation/media/uapi/dvb/net.rst +++ b/Documentation/userspace-api/media/dvb/net.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/query-dvb-frontend-info.rst b/Documentation/userspace-api/media/dvb/query-dvb-frontend-info.rst similarity index 93% rename from Documentation/media/uapi/dvb/query-dvb-frontend-info.rst rename to Documentation/userspace-api/media/dvb/query-dvb-frontend-info.rst index 9a6badc1d2955..d854ccf42ccf4 100644 --- a/Documentation/media/uapi/dvb/query-dvb-frontend-info.rst +++ b/Documentation/userspace-api/media/dvb/query-dvb-frontend-info.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-clear-buffer.rst b/Documentation/userspace-api/media/dvb/video-clear-buffer.rst similarity index 95% rename from Documentation/media/uapi/dvb/video-clear-buffer.rst rename to Documentation/userspace-api/media/dvb/video-clear-buffer.rst index 5eb5546e8ce48..ba7a133028622 100644 --- a/Documentation/media/uapi/dvb/video-clear-buffer.rst +++ b/Documentation/userspace-api/media/dvb/video-clear-buffer.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-command.rst b/Documentation/userspace-api/media/dvb/video-command.rst similarity index 97% rename from Documentation/media/uapi/dvb/video-command.rst rename to Documentation/userspace-api/media/dvb/video-command.rst index 020b49645c6b8..d96d764d0eef0 100644 --- a/Documentation/media/uapi/dvb/video-command.rst +++ b/Documentation/userspace-api/media/dvb/video-command.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-continue.rst b/Documentation/userspace-api/media/dvb/video-continue.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-continue.rst rename to Documentation/userspace-api/media/dvb/video-continue.rst index 2ae2067dfba89..bb18514ac5e91 100644 --- a/Documentation/media/uapi/dvb/video-continue.rst +++ b/Documentation/userspace-api/media/dvb/video-continue.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-fast-forward.rst b/Documentation/userspace-api/media/dvb/video-fast-forward.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-fast-forward.rst rename to Documentation/userspace-api/media/dvb/video-fast-forward.rst index 3f805f334ae1a..1f6ec89574d13 100644 --- a/Documentation/media/uapi/dvb/video-fast-forward.rst +++ b/Documentation/userspace-api/media/dvb/video-fast-forward.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-fclose.rst b/Documentation/userspace-api/media/dvb/video-fclose.rst similarity index 94% rename from Documentation/media/uapi/dvb/video-fclose.rst rename to Documentation/userspace-api/media/dvb/video-fclose.rst index 3b0285b96a3c5..f9d2a8ebe4a4b 100644 --- a/Documentation/media/uapi/dvb/video-fclose.rst +++ b/Documentation/userspace-api/media/dvb/video-fclose.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-fopen.rst b/Documentation/userspace-api/media/dvb/video-fopen.rst similarity index 97% rename from Documentation/media/uapi/dvb/video-fopen.rst rename to Documentation/userspace-api/media/dvb/video-fopen.rst index 7b2a8c750e6a5..a418cf6d772eb 100644 --- a/Documentation/media/uapi/dvb/video-fopen.rst +++ b/Documentation/userspace-api/media/dvb/video-fopen.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-freeze.rst b/Documentation/userspace-api/media/dvb/video-freeze.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-freeze.rst rename to Documentation/userspace-api/media/dvb/video-freeze.rst index 6b31a4755d2c5..46f287faa7fe6 100644 --- a/Documentation/media/uapi/dvb/video-freeze.rst +++ b/Documentation/userspace-api/media/dvb/video-freeze.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-fwrite.rst b/Documentation/userspace-api/media/dvb/video-fwrite.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-fwrite.rst rename to Documentation/userspace-api/media/dvb/video-fwrite.rst index eb35b79eb85c2..08dfafa9c6a11 100644 --- a/Documentation/media/uapi/dvb/video-fwrite.rst +++ b/Documentation/userspace-api/media/dvb/video-fwrite.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-get-capabilities.rst b/Documentation/userspace-api/media/dvb/video-get-capabilities.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-get-capabilities.rst rename to Documentation/userspace-api/media/dvb/video-get-capabilities.rst index 971fdab70e15c..f6f19df5a3b41 100644 --- a/Documentation/media/uapi/dvb/video-get-capabilities.rst +++ b/Documentation/userspace-api/media/dvb/video-get-capabilities.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-get-event.rst b/Documentation/userspace-api/media/dvb/video-get-event.rst similarity index 98% rename from Documentation/media/uapi/dvb/video-get-event.rst rename to Documentation/userspace-api/media/dvb/video-get-event.rst index 7f03fbe3d3b0f..6db8e6337c4f2 100644 --- a/Documentation/media/uapi/dvb/video-get-event.rst +++ b/Documentation/userspace-api/media/dvb/video-get-event.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-get-frame-count.rst b/Documentation/userspace-api/media/dvb/video-get-frame-count.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-get-frame-count.rst rename to Documentation/userspace-api/media/dvb/video-get-frame-count.rst index ef35da7d48610..4152a42daeb3d 100644 --- a/Documentation/media/uapi/dvb/video-get-frame-count.rst +++ b/Documentation/userspace-api/media/dvb/video-get-frame-count.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-get-pts.rst b/Documentation/userspace-api/media/dvb/video-get-pts.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-get-pts.rst rename to Documentation/userspace-api/media/dvb/video-get-pts.rst index 86ceefff78342..f957df792ae18 100644 --- a/Documentation/media/uapi/dvb/video-get-pts.rst +++ b/Documentation/userspace-api/media/dvb/video-get-pts.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-get-size.rst b/Documentation/userspace-api/media/dvb/video-get-size.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-get-size.rst rename to Documentation/userspace-api/media/dvb/video-get-size.rst index cc92189d31fd5..376745550eb56 100644 --- a/Documentation/media/uapi/dvb/video-get-size.rst +++ b/Documentation/userspace-api/media/dvb/video-get-size.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-get-status.rst b/Documentation/userspace-api/media/dvb/video-get-status.rst similarity index 97% rename from Documentation/media/uapi/dvb/video-get-status.rst rename to Documentation/userspace-api/media/dvb/video-get-status.rst index 8bfcf8fc3e195..d0172593e557f 100644 --- a/Documentation/media/uapi/dvb/video-get-status.rst +++ b/Documentation/userspace-api/media/dvb/video-get-status.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-play.rst b/Documentation/userspace-api/media/dvb/video-play.rst similarity index 95% rename from Documentation/media/uapi/dvb/video-play.rst rename to Documentation/userspace-api/media/dvb/video-play.rst index fb3f4f168814e..2b6b4e93bd93c 100644 --- a/Documentation/media/uapi/dvb/video-play.rst +++ b/Documentation/userspace-api/media/dvb/video-play.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-select-source.rst b/Documentation/userspace-api/media/dvb/video-select-source.rst similarity index 97% rename from Documentation/media/uapi/dvb/video-select-source.rst rename to Documentation/userspace-api/media/dvb/video-select-source.rst index 32cf025356dc8..504f768da00c2 100644 --- a/Documentation/media/uapi/dvb/video-select-source.rst +++ b/Documentation/userspace-api/media/dvb/video-select-source.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-set-blank.rst b/Documentation/userspace-api/media/dvb/video-set-blank.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-set-blank.rst rename to Documentation/userspace-api/media/dvb/video-set-blank.rst index 901c3c80f167a..a2608df94d3ea 100644 --- a/Documentation/media/uapi/dvb/video-set-blank.rst +++ b/Documentation/userspace-api/media/dvb/video-set-blank.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-set-display-format.rst b/Documentation/userspace-api/media/dvb/video-set-display-format.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-set-display-format.rst rename to Documentation/userspace-api/media/dvb/video-set-display-format.rst index ffdefa3412078..c587b3d15e307 100644 --- a/Documentation/media/uapi/dvb/video-set-display-format.rst +++ b/Documentation/userspace-api/media/dvb/video-set-display-format.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-set-format.rst b/Documentation/userspace-api/media/dvb/video-set-format.rst similarity index 97% rename from Documentation/media/uapi/dvb/video-set-format.rst rename to Documentation/userspace-api/media/dvb/video-set-format.rst index 63e60214ab37d..ced74edb74eba 100644 --- a/Documentation/media/uapi/dvb/video-set-format.rst +++ b/Documentation/userspace-api/media/dvb/video-set-format.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-set-streamtype.rst b/Documentation/userspace-api/media/dvb/video-set-streamtype.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-set-streamtype.rst rename to Documentation/userspace-api/media/dvb/video-set-streamtype.rst index 845486a6e049a..1729bc04e4f75 100644 --- a/Documentation/media/uapi/dvb/video-set-streamtype.rst +++ b/Documentation/userspace-api/media/dvb/video-set-streamtype.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-slowmotion.rst b/Documentation/userspace-api/media/dvb/video-slowmotion.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-slowmotion.rst rename to Documentation/userspace-api/media/dvb/video-slowmotion.rst index 32c934aaf2bac..b8cfba7bbfb32 100644 --- a/Documentation/media/uapi/dvb/video-slowmotion.rst +++ b/Documentation/userspace-api/media/dvb/video-slowmotion.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-stillpicture.rst b/Documentation/userspace-api/media/dvb/video-stillpicture.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-stillpicture.rst rename to Documentation/userspace-api/media/dvb/video-stillpicture.rst index 58035a7630e67..5432619a63a1b 100644 --- a/Documentation/media/uapi/dvb/video-stillpicture.rst +++ b/Documentation/userspace-api/media/dvb/video-stillpicture.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-stop.rst b/Documentation/userspace-api/media/dvb/video-stop.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-stop.rst rename to Documentation/userspace-api/media/dvb/video-stop.rst index 732ace05e34b1..9a53fe7f2fd05 100644 --- a/Documentation/media/uapi/dvb/video-stop.rst +++ b/Documentation/userspace-api/media/dvb/video-stop.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video-try-command.rst b/Documentation/userspace-api/media/dvb/video-try-command.rst similarity index 96% rename from Documentation/media/uapi/dvb/video-try-command.rst rename to Documentation/userspace-api/media/dvb/video-try-command.rst index 37ecf8e91eb82..61667952030ff 100644 --- a/Documentation/media/uapi/dvb/video-try-command.rst +++ b/Documentation/userspace-api/media/dvb/video-try-command.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video.rst b/Documentation/userspace-api/media/dvb/video.rst similarity index 96% rename from Documentation/media/uapi/dvb/video.rst rename to Documentation/userspace-api/media/dvb/video.rst index 6d72ed0e2b2db..537eae1b0723f 100644 --- a/Documentation/media/uapi/dvb/video.rst +++ b/Documentation/userspace-api/media/dvb/video.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video_function_calls.rst b/Documentation/userspace-api/media/dvb/video_function_calls.rst similarity index 94% rename from Documentation/media/uapi/dvb/video_function_calls.rst rename to Documentation/userspace-api/media/dvb/video_function_calls.rst index 9e8e49e52b191..4902a40d65bad 100644 --- a/Documentation/media/uapi/dvb/video_function_calls.rst +++ b/Documentation/userspace-api/media/dvb/video_function_calls.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/dvb/video_types.rst b/Documentation/userspace-api/media/dvb/video_types.rst similarity index 99% rename from Documentation/media/uapi/dvb/video_types.rst rename to Documentation/userspace-api/media/dvb/video_types.rst index 2697400ccf62c..bdba1d48f647c 100644 --- a/Documentation/media/uapi/dvb/video_types.rst +++ b/Documentation/userspace-api/media/dvb/video_types.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/fdl-appendix.rst b/Documentation/userspace-api/media/fdl-appendix.rst similarity index 99% rename from Documentation/media/uapi/fdl-appendix.rst rename to Documentation/userspace-api/media/fdl-appendix.rst index 9316b8617502b..70c8cda108147 100644 --- a/Documentation/media/uapi/fdl-appendix.rst +++ b/Documentation/userspace-api/media/fdl-appendix.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/frontend.h.rst.exceptions b/Documentation/userspace-api/media/frontend.h.rst.exceptions similarity index 100% rename from Documentation/media/frontend.h.rst.exceptions rename to Documentation/userspace-api/media/frontend.h.rst.exceptions diff --git a/Documentation/media/uapi/gen-errors.rst b/Documentation/userspace-api/media/gen-errors.rst similarity index 98% rename from Documentation/media/uapi/gen-errors.rst rename to Documentation/userspace-api/media/gen-errors.rst index 043c312dc06d1..abae4dbed5497 100644 --- a/Documentation/media/uapi/gen-errors.rst +++ b/Documentation/userspace-api/media/gen-errors.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/media_uapi.rst b/Documentation/userspace-api/media/index.rst similarity index 80% rename from Documentation/media/media_uapi.rst rename to Documentation/userspace-api/media/index.rst index 0753005c7bb44..614310f823955 100644 --- a/Documentation/media/media_uapi.rst +++ b/Documentation/userspace-api/media/index.rst @@ -24,10 +24,10 @@ entitled "GNU Free Documentation License". :maxdepth: 1 intro - uapi/v4l/v4l2 - uapi/dvb/dvbapi - uapi/rc/remote_controllers - uapi/mediactl/media-controller - uapi/cec/cec-api - uapi/gen-errors - uapi/fdl-appendix + v4l/v4l2 + dvb/dvbapi + rc/remote_controllers + mediactl/media-controller + cec/cec-api + gen-errors + fdl-appendix diff --git a/Documentation/media/intro.rst b/Documentation/userspace-api/media/intro.rst similarity index 100% rename from Documentation/media/intro.rst rename to Documentation/userspace-api/media/intro.rst diff --git a/Documentation/media/lirc.h.rst.exceptions b/Documentation/userspace-api/media/lirc.h.rst.exceptions similarity index 100% rename from Documentation/media/lirc.h.rst.exceptions rename to Documentation/userspace-api/media/lirc.h.rst.exceptions diff --git a/Documentation/media/media.h.rst.exceptions b/Documentation/userspace-api/media/media.h.rst.exceptions similarity index 100% rename from Documentation/media/media.h.rst.exceptions rename to Documentation/userspace-api/media/media.h.rst.exceptions diff --git a/Documentation/media/uapi/mediactl/media-controller-intro.rst b/Documentation/userspace-api/media/mediactl/media-controller-intro.rst similarity index 97% rename from Documentation/media/uapi/mediactl/media-controller-intro.rst rename to Documentation/userspace-api/media/mediactl/media-controller-intro.rst index 281c559c2f3c0..1d06ea4c4d099 100644 --- a/Documentation/media/uapi/mediactl/media-controller-intro.rst +++ b/Documentation/userspace-api/media/mediactl/media-controller-intro.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-controller-model.rst b/Documentation/userspace-api/media/mediactl/media-controller-model.rst similarity index 97% rename from Documentation/media/uapi/mediactl/media-controller-model.rst rename to Documentation/userspace-api/media/mediactl/media-controller-model.rst index b6d5902b556df..865e73d934d6f 100644 --- a/Documentation/media/uapi/mediactl/media-controller-model.rst +++ b/Documentation/userspace-api/media/mediactl/media-controller-model.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-controller.rst b/Documentation/userspace-api/media/mediactl/media-controller.rst similarity index 95% rename from Documentation/media/uapi/mediactl/media-controller.rst rename to Documentation/userspace-api/media/mediactl/media-controller.rst index 6e624f6903316..16bc3ab180d38 100644 --- a/Documentation/media/uapi/mediactl/media-controller.rst +++ b/Documentation/userspace-api/media/mediactl/media-controller.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-func-close.rst b/Documentation/userspace-api/media/mediactl/media-func-close.rst similarity index 95% rename from Documentation/media/uapi/mediactl/media-func-close.rst rename to Documentation/userspace-api/media/mediactl/media-func-close.rst index 369ccd4dee564..ceec61c9e7c57 100644 --- a/Documentation/media/uapi/mediactl/media-func-close.rst +++ b/Documentation/userspace-api/media/mediactl/media-func-close.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-func-ioctl.rst b/Documentation/userspace-api/media/mediactl/media-func-ioctl.rst similarity index 97% rename from Documentation/media/uapi/mediactl/media-func-ioctl.rst rename to Documentation/userspace-api/media/mediactl/media-func-ioctl.rst index 9a990d6480f5a..629e7be7c5be3 100644 --- a/Documentation/media/uapi/mediactl/media-func-ioctl.rst +++ b/Documentation/userspace-api/media/mediactl/media-func-ioctl.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-func-open.rst b/Documentation/userspace-api/media/mediactl/media-func-open.rst similarity index 96% rename from Documentation/media/uapi/mediactl/media-func-open.rst rename to Documentation/userspace-api/media/mediactl/media-func-open.rst index cd2f840ddf73f..4ade1cc5048f0 100644 --- a/Documentation/media/uapi/mediactl/media-func-open.rst +++ b/Documentation/userspace-api/media/mediactl/media-func-open.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-funcs.rst b/Documentation/userspace-api/media/mediactl/media-funcs.rst similarity index 93% rename from Documentation/media/uapi/mediactl/media-funcs.rst rename to Documentation/userspace-api/media/mediactl/media-funcs.rst index 87b65df8252a5..085e80e7fbd5b 100644 --- a/Documentation/media/uapi/mediactl/media-funcs.rst +++ b/Documentation/userspace-api/media/mediactl/media-funcs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-header.rst b/Documentation/userspace-api/media/mediactl/media-header.rst similarity index 90% rename from Documentation/media/uapi/mediactl/media-header.rst rename to Documentation/userspace-api/media/mediactl/media-header.rst index 1cb7c88aeff0b..7ff9d24ce65fe 100644 --- a/Documentation/media/uapi/mediactl/media-header.rst +++ b/Documentation/userspace-api/media/mediactl/media-header.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-ioc-device-info.rst b/Documentation/userspace-api/media/mediactl/media-ioc-device-info.rst similarity index 98% rename from Documentation/media/uapi/mediactl/media-ioc-device-info.rst rename to Documentation/userspace-api/media/mediactl/media-ioc-device-info.rst index f8038cfb708c8..9c729bdc8e851 100644 --- a/Documentation/media/uapi/mediactl/media-ioc-device-info.rst +++ b/Documentation/userspace-api/media/mediactl/media-ioc-device-info.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst b/Documentation/userspace-api/media/mediactl/media-ioc-enum-entities.rst similarity index 98% rename from Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst rename to Documentation/userspace-api/media/mediactl/media-ioc-enum-entities.rst index 33e2b110145cc..1d01de8e0f973 100644 --- a/Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst +++ b/Documentation/userspace-api/media/mediactl/media-ioc-enum-entities.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-ioc-enum-links.rst b/Documentation/userspace-api/media/mediactl/media-ioc-enum-links.rst similarity index 98% rename from Documentation/media/uapi/mediactl/media-ioc-enum-links.rst rename to Documentation/userspace-api/media/mediactl/media-ioc-enum-links.rst index b827ebc398f8f..9929b639db972 100644 --- a/Documentation/media/uapi/mediactl/media-ioc-enum-links.rst +++ b/Documentation/userspace-api/media/mediactl/media-ioc-enum-links.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst b/Documentation/userspace-api/media/mediactl/media-ioc-g-topology.rst similarity index 99% rename from Documentation/media/uapi/mediactl/media-ioc-g-topology.rst rename to Documentation/userspace-api/media/mediactl/media-ioc-g-topology.rst index 0a7d76ac8dede..54e3112a3b5ab 100644 --- a/Documentation/media/uapi/mediactl/media-ioc-g-topology.rst +++ b/Documentation/userspace-api/media/mediactl/media-ioc-g-topology.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-ioc-request-alloc.rst b/Documentation/userspace-api/media/mediactl/media-ioc-request-alloc.rst similarity index 98% rename from Documentation/media/uapi/mediactl/media-ioc-request-alloc.rst rename to Documentation/userspace-api/media/mediactl/media-ioc-request-alloc.rst index 6d4ca4ada2e0c..82f86466c7f2d 100644 --- a/Documentation/media/uapi/mediactl/media-ioc-request-alloc.rst +++ b/Documentation/userspace-api/media/mediactl/media-ioc-request-alloc.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-ioc-setup-link.rst b/Documentation/userspace-api/media/mediactl/media-ioc-setup-link.rst similarity index 97% rename from Documentation/media/uapi/mediactl/media-ioc-setup-link.rst rename to Documentation/userspace-api/media/mediactl/media-ioc-setup-link.rst index ae39dbbe48a0e..7da3d0028285f 100644 --- a/Documentation/media/uapi/mediactl/media-ioc-setup-link.rst +++ b/Documentation/userspace-api/media/mediactl/media-ioc-setup-link.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-request-ioc-queue.rst b/Documentation/userspace-api/media/mediactl/media-request-ioc-queue.rst similarity index 98% rename from Documentation/media/uapi/mediactl/media-request-ioc-queue.rst rename to Documentation/userspace-api/media/mediactl/media-request-ioc-queue.rst index fc8458746d51b..ad55b6b326162 100644 --- a/Documentation/media/uapi/mediactl/media-request-ioc-queue.rst +++ b/Documentation/userspace-api/media/mediactl/media-request-ioc-queue.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-request-ioc-reinit.rst b/Documentation/userspace-api/media/mediactl/media-request-ioc-reinit.rst similarity index 97% rename from Documentation/media/uapi/mediactl/media-request-ioc-reinit.rst rename to Documentation/userspace-api/media/mediactl/media-request-ioc-reinit.rst index 61381e87665aa..4c43fa05c8f68 100644 --- a/Documentation/media/uapi/mediactl/media-request-ioc-reinit.rst +++ b/Documentation/userspace-api/media/mediactl/media-request-ioc-reinit.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/media-types.rst b/Documentation/userspace-api/media/mediactl/media-types.rst similarity index 99% rename from Documentation/media/uapi/mediactl/media-types.rst rename to Documentation/userspace-api/media/mediactl/media-types.rst index 3af6a414b5014..77fd4c0c9ebc7 100644 --- a/Documentation/media/uapi/mediactl/media-types.rst +++ b/Documentation/userspace-api/media/mediactl/media-types.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/request-api.rst b/Documentation/userspace-api/media/mediactl/request-api.rst similarity index 99% rename from Documentation/media/uapi/mediactl/request-api.rst rename to Documentation/userspace-api/media/mediactl/request-api.rst index 01abe8103bdde..37d9442a541ea 100644 --- a/Documentation/media/uapi/mediactl/request-api.rst +++ b/Documentation/userspace-api/media/mediactl/request-api.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/request-func-close.rst b/Documentation/userspace-api/media/mediactl/request-func-close.rst similarity index 97% rename from Documentation/media/uapi/mediactl/request-func-close.rst rename to Documentation/userspace-api/media/mediactl/request-func-close.rst index 2cff7770558e1..9618b51397646 100644 --- a/Documentation/media/uapi/mediactl/request-func-close.rst +++ b/Documentation/userspace-api/media/mediactl/request-func-close.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/request-func-ioctl.rst b/Documentation/userspace-api/media/mediactl/request-func-ioctl.rst similarity index 97% rename from Documentation/media/uapi/mediactl/request-func-ioctl.rst rename to Documentation/userspace-api/media/mediactl/request-func-ioctl.rst index de0781c618730..4bf985205bcc8 100644 --- a/Documentation/media/uapi/mediactl/request-func-ioctl.rst +++ b/Documentation/userspace-api/media/mediactl/request-func-ioctl.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/mediactl/request-func-poll.rst b/Documentation/userspace-api/media/mediactl/request-func-poll.rst similarity index 98% rename from Documentation/media/uapi/mediactl/request-func-poll.rst rename to Documentation/userspace-api/media/mediactl/request-func-poll.rst index ebaf33e218738..85a3427e59135 100644 --- a/Documentation/media/uapi/mediactl/request-func-poll.rst +++ b/Documentation/userspace-api/media/mediactl/request-func-poll.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/net.h.rst.exceptions b/Documentation/userspace-api/media/net.h.rst.exceptions similarity index 100% rename from Documentation/media/net.h.rst.exceptions rename to Documentation/userspace-api/media/net.h.rst.exceptions diff --git a/Documentation/media/uapi/rc/keytable.c.rst b/Documentation/userspace-api/media/rc/keytable.c.rst similarity index 98% rename from Documentation/media/uapi/rc/keytable.c.rst rename to Documentation/userspace-api/media/rc/keytable.c.rst index 46f98569e999d..901d33d378436 100644 --- a/Documentation/media/uapi/rc/keytable.c.rst +++ b/Documentation/userspace-api/media/rc/keytable.c.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-dev-intro.rst b/Documentation/userspace-api/media/rc/lirc-dev-intro.rst similarity index 99% rename from Documentation/media/uapi/rc/lirc-dev-intro.rst rename to Documentation/userspace-api/media/rc/lirc-dev-intro.rst index b68c01693939a..0c3d70ded55d0 100644 --- a/Documentation/media/uapi/rc/lirc-dev-intro.rst +++ b/Documentation/userspace-api/media/rc/lirc-dev-intro.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-dev.rst b/Documentation/userspace-api/media/rc/lirc-dev.rst similarity index 90% rename from Documentation/media/uapi/rc/lirc-dev.rst rename to Documentation/userspace-api/media/rc/lirc-dev.rst index 7058e0b2296a0..7a395fa52934b 100644 --- a/Documentation/media/uapi/rc/lirc-dev.rst +++ b/Documentation/userspace-api/media/rc/lirc-dev.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-func.rst b/Documentation/userspace-api/media/rc/lirc-func.rst similarity index 94% rename from Documentation/media/uapi/rc/lirc-func.rst rename to Documentation/userspace-api/media/rc/lirc-func.rst index 25058369f724f..e37c995832126 100644 --- a/Documentation/media/uapi/rc/lirc-func.rst +++ b/Documentation/userspace-api/media/rc/lirc-func.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-get-features.rst b/Documentation/userspace-api/media/rc/lirc-get-features.rst similarity index 98% rename from Documentation/media/uapi/rc/lirc-get-features.rst rename to Documentation/userspace-api/media/rc/lirc-get-features.rst index 1d590df8164a9..f4b9ca09f8281 100644 --- a/Documentation/media/uapi/rc/lirc-get-features.rst +++ b/Documentation/userspace-api/media/rc/lirc-get-features.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-get-rec-mode.rst b/Documentation/userspace-api/media/rc/lirc-get-rec-mode.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-get-rec-mode.rst rename to Documentation/userspace-api/media/rc/lirc-get-rec-mode.rst index 0a3e02aca80e7..674ce16d5d33f 100644 --- a/Documentation/media/uapi/rc/lirc-get-rec-mode.rst +++ b/Documentation/userspace-api/media/rc/lirc-get-rec-mode.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-get-rec-resolution.rst b/Documentation/userspace-api/media/rc/lirc-get-rec-resolution.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-get-rec-resolution.rst rename to Documentation/userspace-api/media/rc/lirc-get-rec-resolution.rst index f560b694ccf27..f20b5bf41232e 100644 --- a/Documentation/media/uapi/rc/lirc-get-rec-resolution.rst +++ b/Documentation/userspace-api/media/rc/lirc-get-rec-resolution.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-get-send-mode.rst b/Documentation/userspace-api/media/rc/lirc-get-send-mode.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-get-send-mode.rst rename to Documentation/userspace-api/media/rc/lirc-get-send-mode.rst index 4f440c6970529..973a47bf6068e 100644 --- a/Documentation/media/uapi/rc/lirc-get-send-mode.rst +++ b/Documentation/userspace-api/media/rc/lirc-get-send-mode.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-get-timeout.rst b/Documentation/userspace-api/media/rc/lirc-get-timeout.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-get-timeout.rst rename to Documentation/userspace-api/media/rc/lirc-get-timeout.rst index 1de214529f272..5db84096d7f8b 100644 --- a/Documentation/media/uapi/rc/lirc-get-timeout.rst +++ b/Documentation/userspace-api/media/rc/lirc-get-timeout.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-header.rst b/Documentation/userspace-api/media/rc/lirc-header.rst similarity index 90% rename from Documentation/media/uapi/rc/lirc-header.rst rename to Documentation/userspace-api/media/rc/lirc-header.rst index c9b4f33e10314..c7e0716da1591 100644 --- a/Documentation/media/uapi/rc/lirc-header.rst +++ b/Documentation/userspace-api/media/rc/lirc-header.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-read.rst b/Documentation/userspace-api/media/rc/lirc-read.rst similarity index 97% rename from Documentation/media/uapi/rc/lirc-read.rst rename to Documentation/userspace-api/media/rc/lirc-read.rst index 256e520bc27ee..13f7f5353851c 100644 --- a/Documentation/media/uapi/rc/lirc-read.rst +++ b/Documentation/userspace-api/media/rc/lirc-read.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-measure-carrier-mode.rst b/Documentation/userspace-api/media/rc/lirc-set-measure-carrier-mode.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-set-measure-carrier-mode.rst rename to Documentation/userspace-api/media/rc/lirc-set-measure-carrier-mode.rst index c80acd85e3690..4cf9472eb9041 100644 --- a/Documentation/media/uapi/rc/lirc-set-measure-carrier-mode.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-measure-carrier-mode.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-rec-carrier-range.rst b/Documentation/userspace-api/media/rc/lirc-set-rec-carrier-range.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-set-rec-carrier-range.rst rename to Documentation/userspace-api/media/rc/lirc-set-rec-carrier-range.rst index 443681d5cc101..0439e93aa2671 100644 --- a/Documentation/media/uapi/rc/lirc-set-rec-carrier-range.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-rec-carrier-range.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-rec-carrier.rst b/Documentation/userspace-api/media/rc/lirc-set-rec-carrier.rst similarity index 95% rename from Documentation/media/uapi/rc/lirc-set-rec-carrier.rst rename to Documentation/userspace-api/media/rc/lirc-set-rec-carrier.rst index cbe1e48b2a4a8..f4d18897cb9ff 100644 --- a/Documentation/media/uapi/rc/lirc-set-rec-carrier.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-rec-carrier.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-rec-timeout-reports.rst b/Documentation/userspace-api/media/rc/lirc-set-rec-timeout-reports.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-set-rec-timeout-reports.rst rename to Documentation/userspace-api/media/rc/lirc-set-rec-timeout-reports.rst index d06d69414c1ed..ab97f87fa7579 100644 --- a/Documentation/media/uapi/rc/lirc-set-rec-timeout-reports.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-rec-timeout-reports.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-rec-timeout.rst b/Documentation/userspace-api/media/rc/lirc-set-rec-timeout.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-set-rec-timeout.rst rename to Documentation/userspace-api/media/rc/lirc-set-rec-timeout.rst index 163ac60657370..227776cf7c62e 100644 --- a/Documentation/media/uapi/rc/lirc-set-rec-timeout.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-rec-timeout.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-send-carrier.rst b/Documentation/userspace-api/media/rc/lirc-set-send-carrier.rst similarity index 95% rename from Documentation/media/uapi/rc/lirc-set-send-carrier.rst rename to Documentation/userspace-api/media/rc/lirc-set-send-carrier.rst index cffc6c1e15ccf..7eaf2b9932078 100644 --- a/Documentation/media/uapi/rc/lirc-set-send-carrier.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-send-carrier.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-send-duty-cycle.rst b/Documentation/userspace-api/media/rc/lirc-set-send-duty-cycle.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-set-send-duty-cycle.rst rename to Documentation/userspace-api/media/rc/lirc-set-send-duty-cycle.rst index 08ab3d1a96cdb..0dee89364cde4 100644 --- a/Documentation/media/uapi/rc/lirc-set-send-duty-cycle.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-send-duty-cycle.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-transmitter-mask.rst b/Documentation/userspace-api/media/rc/lirc-set-transmitter-mask.rst similarity index 96% rename from Documentation/media/uapi/rc/lirc-set-transmitter-mask.rst rename to Documentation/userspace-api/media/rc/lirc-set-transmitter-mask.rst index 889a739eaf0d8..dcee4b71dcf6e 100644 --- a/Documentation/media/uapi/rc/lirc-set-transmitter-mask.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-transmitter-mask.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-set-wideband-receiver.rst b/Documentation/userspace-api/media/rc/lirc-set-wideband-receiver.rst similarity index 97% rename from Documentation/media/uapi/rc/lirc-set-wideband-receiver.rst rename to Documentation/userspace-api/media/rc/lirc-set-wideband-receiver.rst index 592715452fce6..22f6fe43b7e79 100644 --- a/Documentation/media/uapi/rc/lirc-set-wideband-receiver.rst +++ b/Documentation/userspace-api/media/rc/lirc-set-wideband-receiver.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/lirc-write.rst b/Documentation/userspace-api/media/rc/lirc-write.rst similarity index 97% rename from Documentation/media/uapi/rc/lirc-write.rst rename to Documentation/userspace-api/media/rc/lirc-write.rst index eafe13203ea35..96ca4a22062e1 100644 --- a/Documentation/media/uapi/rc/lirc-write.rst +++ b/Documentation/userspace-api/media/rc/lirc-write.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/rc-intro.rst b/Documentation/userspace-api/media/rc/rc-intro.rst similarity index 95% rename from Documentation/media/uapi/rc/rc-intro.rst rename to Documentation/userspace-api/media/rc/rc-intro.rst index 37c5f90c76e7c..14e85157bf23b 100644 --- a/Documentation/media/uapi/rc/rc-intro.rst +++ b/Documentation/userspace-api/media/rc/rc-intro.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/rc-protos.rst b/Documentation/userspace-api/media/rc/rc-protos.rst similarity index 100% rename from Documentation/media/uapi/rc/rc-protos.rst rename to Documentation/userspace-api/media/rc/rc-protos.rst diff --git a/Documentation/media/uapi/rc/rc-sysfs-nodes.rst b/Documentation/userspace-api/media/rc/rc-sysfs-nodes.rst similarity index 98% rename from Documentation/media/uapi/rc/rc-sysfs-nodes.rst rename to Documentation/userspace-api/media/rc/rc-sysfs-nodes.rst index b8e8319e33171..73dd75f77d65f 100644 --- a/Documentation/media/uapi/rc/rc-sysfs-nodes.rst +++ b/Documentation/userspace-api/media/rc/rc-sysfs-nodes.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/rc-table-change.rst b/Documentation/userspace-api/media/rc/rc-table-change.rst similarity index 93% rename from Documentation/media/uapi/rc/rc-table-change.rst rename to Documentation/userspace-api/media/rc/rc-table-change.rst index 4a2e601b89fbc..f5d00a20b9399 100644 --- a/Documentation/media/uapi/rc/rc-table-change.rst +++ b/Documentation/userspace-api/media/rc/rc-table-change.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/rc-tables.rst b/Documentation/userspace-api/media/rc/rc-tables.rst similarity index 99% rename from Documentation/media/uapi/rc/rc-tables.rst rename to Documentation/userspace-api/media/rc/rc-tables.rst index 20d7c686922b2..33b724b17ff3c 100644 --- a/Documentation/media/uapi/rc/rc-tables.rst +++ b/Documentation/userspace-api/media/rc/rc-tables.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/rc/remote_controllers.rst b/Documentation/userspace-api/media/rc/remote_controllers.rst similarity index 95% rename from Documentation/media/uapi/rc/remote_controllers.rst rename to Documentation/userspace-api/media/rc/remote_controllers.rst index 20e0f986df49c..3ab2d6db1564f 100644 --- a/Documentation/media/uapi/rc/remote_controllers.rst +++ b/Documentation/userspace-api/media/rc/remote_controllers.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/typical_media_device.svg b/Documentation/userspace-api/media/typical_media_device.svg similarity index 99% rename from Documentation/media/typical_media_device.svg rename to Documentation/userspace-api/media/typical_media_device.svg index bfd5c7db3b001..3420341ff7b6d 100644 --- a/Documentation/media/typical_media_device.svg +++ b/Documentation/userspace-api/media/typical_media_device.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/app-pri.rst b/Documentation/userspace-api/media/v4l/app-pri.rst similarity index 96% rename from Documentation/media/uapi/v4l/app-pri.rst rename to Documentation/userspace-api/media/v4l/app-pri.rst index c25c1271b4f68..5018ede2706f9 100644 --- a/Documentation/media/uapi/v4l/app-pri.rst +++ b/Documentation/userspace-api/media/v4l/app-pri.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/async.rst b/Documentation/userspace-api/media/v4l/async.rst similarity index 90% rename from Documentation/media/uapi/v4l/async.rst rename to Documentation/userspace-api/media/v4l/async.rst index be9539313f607..8bc4a726c95ee 100644 --- a/Documentation/media/uapi/v4l/async.rst +++ b/Documentation/userspace-api/media/v4l/async.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/audio.rst b/Documentation/userspace-api/media/v4l/audio.rst similarity index 98% rename from Documentation/media/uapi/v4l/audio.rst rename to Documentation/userspace-api/media/v4l/audio.rst index 4c7fdbc8a8605..d6bb85092e02b 100644 --- a/Documentation/media/uapi/v4l/audio.rst +++ b/Documentation/userspace-api/media/v4l/audio.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/bayer.svg b/Documentation/userspace-api/media/v4l/bayer.svg similarity index 99% rename from Documentation/media/uapi/v4l/bayer.svg rename to Documentation/userspace-api/media/v4l/bayer.svg index c5bf85103901f..82e805c68c1f6 100644 --- a/Documentation/media/uapi/v4l/bayer.svg +++ b/Documentation/userspace-api/media/v4l/bayer.svg @@ -22,7 +22,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/biblio.rst b/Documentation/userspace-api/media/v4l/biblio.rst similarity index 99% rename from Documentation/media/uapi/v4l/biblio.rst rename to Documentation/userspace-api/media/v4l/biblio.rst index 8095f57d3d752..3c9634173e827 100644 --- a/Documentation/media/uapi/v4l/biblio.rst +++ b/Documentation/userspace-api/media/v4l/biblio.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/buffer.rst b/Documentation/userspace-api/media/v4l/buffer.rst similarity index 99% rename from Documentation/media/uapi/v4l/buffer.rst rename to Documentation/userspace-api/media/v4l/buffer.rst index 3112300c2fa0b..951ae1ed485fe 100644 --- a/Documentation/media/uapi/v4l/buffer.rst +++ b/Documentation/userspace-api/media/v4l/buffer.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/capture-example.rst b/Documentation/userspace-api/media/v4l/capture-example.rst similarity index 90% rename from Documentation/media/uapi/v4l/capture-example.rst rename to Documentation/userspace-api/media/v4l/capture-example.rst index 130ca47ef796d..6aa67c5aff8f7 100644 --- a/Documentation/media/uapi/v4l/capture-example.rst +++ b/Documentation/userspace-api/media/v4l/capture-example.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/capture.c.rst b/Documentation/userspace-api/media/v4l/capture.c.rst similarity index 99% rename from Documentation/media/uapi/v4l/capture.c.rst rename to Documentation/userspace-api/media/v4l/capture.c.rst index b4652c2351f2c..30f7c816e8587 100644 --- a/Documentation/media/uapi/v4l/capture.c.rst +++ b/Documentation/userspace-api/media/v4l/capture.c.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/colorspaces-defs.rst b/Documentation/userspace-api/media/v4l/colorspaces-defs.rst similarity index 99% rename from Documentation/media/uapi/v4l/colorspaces-defs.rst rename to Documentation/userspace-api/media/v4l/colorspaces-defs.rst index e122bbe3d799d..01404e1f609a7 100644 --- a/Documentation/media/uapi/v4l/colorspaces-defs.rst +++ b/Documentation/userspace-api/media/v4l/colorspaces-defs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/colorspaces-details.rst b/Documentation/userspace-api/media/v4l/colorspaces-details.rst similarity index 99% rename from Documentation/media/uapi/v4l/colorspaces-details.rst rename to Documentation/userspace-api/media/v4l/colorspaces-details.rst index 8b0ba3668101d..79ed6f4f76eb3 100644 --- a/Documentation/media/uapi/v4l/colorspaces-details.rst +++ b/Documentation/userspace-api/media/v4l/colorspaces-details.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/colorspaces.rst b/Documentation/userspace-api/media/v4l/colorspaces.rst similarity index 99% rename from Documentation/media/uapi/v4l/colorspaces.rst rename to Documentation/userspace-api/media/v4l/colorspaces.rst index 4f6c82fa057f3..0846df9066c54 100644 --- a/Documentation/media/uapi/v4l/colorspaces.rst +++ b/Documentation/userspace-api/media/v4l/colorspaces.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/common-defs.rst b/Documentation/userspace-api/media/v4l/common-defs.rst similarity index 92% rename from Documentation/media/uapi/v4l/common-defs.rst rename to Documentation/userspace-api/media/v4l/common-defs.rst index 504c6c93c9b0f..370a1e364a512 100644 --- a/Documentation/media/uapi/v4l/common-defs.rst +++ b/Documentation/userspace-api/media/v4l/common-defs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/common.rst b/Documentation/userspace-api/media/v4l/common.rst similarity index 96% rename from Documentation/media/uapi/v4l/common.rst rename to Documentation/userspace-api/media/v4l/common.rst index 5e87ae24e4b4d..af28ac1bcf882 100644 --- a/Documentation/media/uapi/v4l/common.rst +++ b/Documentation/userspace-api/media/v4l/common.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/compat.rst b/Documentation/userspace-api/media/v4l/compat.rst similarity index 92% rename from Documentation/media/uapi/v4l/compat.rst rename to Documentation/userspace-api/media/v4l/compat.rst index f35575a300b4e..055286b86e9b3 100644 --- a/Documentation/media/uapi/v4l/compat.rst +++ b/Documentation/userspace-api/media/v4l/compat.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/constraints.svg b/Documentation/userspace-api/media/v4l/constraints.svg similarity index 99% rename from Documentation/media/uapi/v4l/constraints.svg rename to Documentation/userspace-api/media/v4l/constraints.svg index 08f9f8b0985eb..1dfe51a9839d0 100644 --- a/Documentation/media/uapi/v4l/constraints.svg +++ b/Documentation/userspace-api/media/v4l/constraints.svg @@ -22,7 +22,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/control.rst b/Documentation/userspace-api/media/v4l/control.rst similarity index 99% rename from Documentation/media/uapi/v4l/control.rst rename to Documentation/userspace-api/media/v4l/control.rst index ef62e088ff7ae..3e991c1f7a128 100644 --- a/Documentation/media/uapi/v4l/control.rst +++ b/Documentation/userspace-api/media/v4l/control.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/crop.rst b/Documentation/userspace-api/media/v4l/crop.rst similarity index 99% rename from Documentation/media/uapi/v4l/crop.rst rename to Documentation/userspace-api/media/v4l/crop.rst index ada7c22e6291b..cb7e2341aedf4 100644 --- a/Documentation/media/uapi/v4l/crop.rst +++ b/Documentation/userspace-api/media/v4l/crop.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/crop.svg b/Documentation/userspace-api/media/v4l/crop.svg similarity index 99% rename from Documentation/media/uapi/v4l/crop.svg rename to Documentation/userspace-api/media/v4l/crop.svg index 32d72598d1359..4cd47f98e7c80 100644 --- a/Documentation/media/uapi/v4l/crop.svg +++ b/Documentation/userspace-api/media/v4l/crop.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/depth-formats.rst b/Documentation/userspace-api/media/v4l/depth-formats.rst similarity index 91% rename from Documentation/media/uapi/v4l/depth-formats.rst rename to Documentation/userspace-api/media/v4l/depth-formats.rst index 1bfd0b82cb859..6742486a83b51 100644 --- a/Documentation/media/uapi/v4l/depth-formats.rst +++ b/Documentation/userspace-api/media/v4l/depth-formats.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-capture.rst b/Documentation/userspace-api/media/v4l/dev-capture.rst similarity index 98% rename from Documentation/media/uapi/v4l/dev-capture.rst rename to Documentation/userspace-api/media/v4l/dev-capture.rst index 134e22b32338e..44d3094093ab6 100644 --- a/Documentation/media/uapi/v4l/dev-capture.rst +++ b/Documentation/userspace-api/media/v4l/dev-capture.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-decoder.rst b/Documentation/userspace-api/media/v4l/dev-decoder.rst similarity index 100% rename from Documentation/media/uapi/v4l/dev-decoder.rst rename to Documentation/userspace-api/media/v4l/dev-decoder.rst diff --git a/Documentation/media/uapi/v4l/dev-event.rst b/Documentation/userspace-api/media/v4l/dev-event.rst similarity index 97% rename from Documentation/media/uapi/v4l/dev-event.rst rename to Documentation/userspace-api/media/v4l/dev-event.rst index 6029101fe1d7d..d09034fd680a5 100644 --- a/Documentation/media/uapi/v4l/dev-event.rst +++ b/Documentation/userspace-api/media/v4l/dev-event.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-mem2mem.rst b/Documentation/userspace-api/media/v4l/dev-mem2mem.rst similarity index 97% rename from Documentation/media/uapi/v4l/dev-mem2mem.rst rename to Documentation/userspace-api/media/v4l/dev-mem2mem.rst index 70953958cee62..9279d87c08a1a 100644 --- a/Documentation/media/uapi/v4l/dev-mem2mem.rst +++ b/Documentation/userspace-api/media/v4l/dev-mem2mem.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-meta.rst b/Documentation/userspace-api/media/v4l/dev-meta.rst similarity index 98% rename from Documentation/media/uapi/v4l/dev-meta.rst rename to Documentation/userspace-api/media/v4l/dev-meta.rst index c5dbe882be654..6d2c5a79b370d 100644 --- a/Documentation/media/uapi/v4l/dev-meta.rst +++ b/Documentation/userspace-api/media/v4l/dev-meta.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-osd.rst b/Documentation/userspace-api/media/v4l/dev-osd.rst similarity index 99% rename from Documentation/media/uapi/v4l/dev-osd.rst rename to Documentation/userspace-api/media/v4l/dev-osd.rst index d3ad67da6386d..67dc46373a91e 100644 --- a/Documentation/media/uapi/v4l/dev-osd.rst +++ b/Documentation/userspace-api/media/v4l/dev-osd.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-output.rst b/Documentation/userspace-api/media/v4l/dev-output.rst similarity index 98% rename from Documentation/media/uapi/v4l/dev-output.rst rename to Documentation/userspace-api/media/v4l/dev-output.rst index 3fe1b39696ed5..e4f2a1d8b0fc7 100644 --- a/Documentation/media/uapi/v4l/dev-output.rst +++ b/Documentation/userspace-api/media/v4l/dev-output.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-overlay.rst b/Documentation/userspace-api/media/v4l/dev-overlay.rst similarity index 99% rename from Documentation/media/uapi/v4l/dev-overlay.rst rename to Documentation/userspace-api/media/v4l/dev-overlay.rst index b91b3837d4e70..7246d560173d8 100644 --- a/Documentation/media/uapi/v4l/dev-overlay.rst +++ b/Documentation/userspace-api/media/v4l/dev-overlay.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-radio.rst b/Documentation/userspace-api/media/v4l/dev-radio.rst similarity index 97% rename from Documentation/media/uapi/v4l/dev-radio.rst rename to Documentation/userspace-api/media/v4l/dev-radio.rst index 133eb0e788c2f..c0edd7b7d2013 100644 --- a/Documentation/media/uapi/v4l/dev-radio.rst +++ b/Documentation/userspace-api/media/v4l/dev-radio.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-raw-vbi.rst b/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst similarity index 99% rename from Documentation/media/uapi/v4l/dev-raw-vbi.rst rename to Documentation/userspace-api/media/v4l/dev-raw-vbi.rst index e06b03ca2ab23..0307d44e17cb0 100644 --- a/Documentation/media/uapi/v4l/dev-raw-vbi.rst +++ b/Documentation/userspace-api/media/v4l/dev-raw-vbi.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-rds.rst b/Documentation/userspace-api/media/v4l/dev-rds.rst similarity index 99% rename from Documentation/media/uapi/v4l/dev-rds.rst rename to Documentation/userspace-api/media/v4l/dev-rds.rst index 64a724ef58f54..13dba4a4180cf 100644 --- a/Documentation/media/uapi/v4l/dev-rds.rst +++ b/Documentation/userspace-api/media/v4l/dev-rds.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-sdr.rst b/Documentation/userspace-api/media/v4l/dev-sdr.rst similarity index 98% rename from Documentation/media/uapi/v4l/dev-sdr.rst rename to Documentation/userspace-api/media/v4l/dev-sdr.rst index 75595c58cb5b7..c9563bca444e0 100644 --- a/Documentation/media/uapi/v4l/dev-sdr.rst +++ b/Documentation/userspace-api/media/v4l/dev-sdr.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-sliced-vbi.rst b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst similarity index 99% rename from Documentation/media/uapi/v4l/dev-sliced-vbi.rst rename to Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst index 7b2d38dd402a7..0767299e91052 100644 --- a/Documentation/media/uapi/v4l/dev-sliced-vbi.rst +++ b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-stateless-decoder.rst b/Documentation/userspace-api/media/v4l/dev-stateless-decoder.rst similarity index 100% rename from Documentation/media/uapi/v4l/dev-stateless-decoder.rst rename to Documentation/userspace-api/media/v4l/dev-stateless-decoder.rst diff --git a/Documentation/media/uapi/v4l/dev-subdev.rst b/Documentation/userspace-api/media/v4l/dev-subdev.rst similarity index 99% rename from Documentation/media/uapi/v4l/dev-subdev.rst rename to Documentation/userspace-api/media/v4l/dev-subdev.rst index 029bb2d9928aa..0c1a5f50ee218 100644 --- a/Documentation/media/uapi/v4l/dev-subdev.rst +++ b/Documentation/userspace-api/media/v4l/dev-subdev.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dev-touch.rst b/Documentation/userspace-api/media/v4l/dev-touch.rst similarity index 97% rename from Documentation/media/uapi/v4l/dev-touch.rst rename to Documentation/userspace-api/media/v4l/dev-touch.rst index 356f013852215..c1ce446274f22 100644 --- a/Documentation/media/uapi/v4l/dev-touch.rst +++ b/Documentation/userspace-api/media/v4l/dev-touch.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/devices.rst b/Documentation/userspace-api/media/v4l/devices.rst similarity index 92% rename from Documentation/media/uapi/v4l/devices.rst rename to Documentation/userspace-api/media/v4l/devices.rst index 07f8d047662ba..47ffe90753dd4 100644 --- a/Documentation/media/uapi/v4l/devices.rst +++ b/Documentation/userspace-api/media/v4l/devices.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/diff-v4l.rst b/Documentation/userspace-api/media/v4l/diff-v4l.rst similarity index 99% rename from Documentation/media/uapi/v4l/diff-v4l.rst rename to Documentation/userspace-api/media/v4l/diff-v4l.rst index dd6739e8a5b20..37644d26c4ae2 100644 --- a/Documentation/media/uapi/v4l/diff-v4l.rst +++ b/Documentation/userspace-api/media/v4l/diff-v4l.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dmabuf.rst b/Documentation/userspace-api/media/v4l/dmabuf.rst similarity index 99% rename from Documentation/media/uapi/v4l/dmabuf.rst rename to Documentation/userspace-api/media/v4l/dmabuf.rst index bb8fd943b14e2..342421ff9497e 100644 --- a/Documentation/media/uapi/v4l/dmabuf.rst +++ b/Documentation/userspace-api/media/v4l/dmabuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/dv-timings.rst b/Documentation/userspace-api/media/v4l/dv-timings.rst similarity index 97% rename from Documentation/media/uapi/v4l/dv-timings.rst rename to Documentation/userspace-api/media/v4l/dv-timings.rst index b3c69ca559e2c..e216aa9edef07 100644 --- a/Documentation/media/uapi/v4l/dv-timings.rst +++ b/Documentation/userspace-api/media/v4l/dv-timings.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-camera.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst similarity index 99% rename from Documentation/media/uapi/v4l/ext-ctrls-camera.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst index 51c1d5c9eb002..e39f84d2447f8 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-camera.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst similarity index 99% rename from Documentation/media/uapi/v4l/ext-ctrls-codec.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index d4fc5f25aa14a..f64f6fc4fd75a 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-detect.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-detect.rst similarity index 97% rename from Documentation/media/uapi/v4l/ext-ctrls-detect.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-detect.rst index 80981d0cff425..77a4992f26bdb 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-detect.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-detect.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-dv.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-dv.rst similarity index 99% rename from Documentation/media/uapi/v4l/ext-ctrls-dv.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-dv.rst index 5c70ac98f710e..c572b65dc7729 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-dv.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-dv.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-flash.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst similarity index 99% rename from Documentation/media/uapi/v4l/ext-ctrls-flash.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst index b9a6b08fbf32d..5053a380f7de3 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-flash.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-fm-rx.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-fm-rx.rst similarity index 98% rename from Documentation/media/uapi/v4l/ext-ctrls-fm-rx.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-fm-rx.rst index 3ed6dd7f586d6..69197bbe23dd1 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-fm-rx.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-fm-rx.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-fm-tx.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-fm-tx.rst similarity index 99% rename from Documentation/media/uapi/v4l/ext-ctrls-fm-tx.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-fm-tx.rst index db88346d99fd6..c13ec0a6af3a9 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-fm-tx.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-fm-tx.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-image-process.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst similarity index 98% rename from Documentation/media/uapi/v4l/ext-ctrls-image-process.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst index 22fc2d3e433d6..e47103aa32ed3 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-image-process.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-image-source.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-image-source.rst similarity index 97% rename from Documentation/media/uapi/v4l/ext-ctrls-image-source.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-image-source.rst index 2d3e2b83d6dd5..7b75158aca4da 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-image-source.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-image-source.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-jpeg.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-jpeg.rst similarity index 98% rename from Documentation/media/uapi/v4l/ext-ctrls-jpeg.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-jpeg.rst index 60ce3f9493193..5ea69978f3ea9 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-jpeg.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-jpeg.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/ext-ctrls-rf-tuner.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-rf-tuner.rst similarity index 98% rename from Documentation/media/uapi/v4l/ext-ctrls-rf-tuner.rst rename to Documentation/userspace-api/media/v4l/ext-ctrls-rf-tuner.rst index 0fb85ba878dd5..5277138fce679 100644 --- a/Documentation/media/uapi/v4l/ext-ctrls-rf-tuner.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-rf-tuner.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/userspace-api/media/v4l/extended-controls.rst similarity index 99% rename from Documentation/media/uapi/v4l/extended-controls.rst rename to Documentation/userspace-api/media/v4l/extended-controls.rst index 6553624837308..9aa352ac5ea4a 100644 --- a/Documentation/media/uapi/v4l/extended-controls.rst +++ b/Documentation/userspace-api/media/v4l/extended-controls.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/field-order.rst b/Documentation/userspace-api/media/v4l/field-order.rst similarity index 99% rename from Documentation/media/uapi/v4l/field-order.rst rename to Documentation/userspace-api/media/v4l/field-order.rst index c422bebe43147..04e9a6932dc54 100644 --- a/Documentation/media/uapi/v4l/field-order.rst +++ b/Documentation/userspace-api/media/v4l/field-order.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/fieldseq_bt.svg b/Documentation/userspace-api/media/v4l/fieldseq_bt.svg similarity index 99% rename from Documentation/media/uapi/v4l/fieldseq_bt.svg rename to Documentation/userspace-api/media/v4l/fieldseq_bt.svg index 1dab1cd1b6de9..b663f6fcb70be 100644 --- a/Documentation/media/uapi/v4l/fieldseq_bt.svg +++ b/Documentation/userspace-api/media/v4l/fieldseq_bt.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/fieldseq_tb.svg b/Documentation/userspace-api/media/v4l/fieldseq_tb.svg similarity index 99% rename from Documentation/media/uapi/v4l/fieldseq_tb.svg rename to Documentation/userspace-api/media/v4l/fieldseq_tb.svg index 041071e43f9bb..f8b440a1cb60d 100644 --- a/Documentation/media/uapi/v4l/fieldseq_tb.svg +++ b/Documentation/userspace-api/media/v4l/fieldseq_tb.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/format.rst b/Documentation/userspace-api/media/v4l/format.rst similarity index 98% rename from Documentation/media/uapi/v4l/format.rst rename to Documentation/userspace-api/media/v4l/format.rst index 9cdb296333b8d..e47fc0505727c 100644 --- a/Documentation/media/uapi/v4l/format.rst +++ b/Documentation/userspace-api/media/v4l/format.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-close.rst b/Documentation/userspace-api/media/v4l/func-close.rst similarity index 95% rename from Documentation/media/uapi/v4l/func-close.rst rename to Documentation/userspace-api/media/v4l/func-close.rst index 1a56811b827e8..37a64dae56b0f 100644 --- a/Documentation/media/uapi/v4l/func-close.rst +++ b/Documentation/userspace-api/media/v4l/func-close.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-ioctl.rst b/Documentation/userspace-api/media/v4l/func-ioctl.rst similarity index 97% rename from Documentation/media/uapi/v4l/func-ioctl.rst rename to Documentation/userspace-api/media/v4l/func-ioctl.rst index e7a8cf62752e9..4e69f303636bb 100644 --- a/Documentation/media/uapi/v4l/func-ioctl.rst +++ b/Documentation/userspace-api/media/v4l/func-ioctl.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-mmap.rst b/Documentation/userspace-api/media/v4l/func-mmap.rst similarity index 98% rename from Documentation/media/uapi/v4l/func-mmap.rst rename to Documentation/userspace-api/media/v4l/func-mmap.rst index 75985d80788a6..f9c77bdce4349 100644 --- a/Documentation/media/uapi/v4l/func-mmap.rst +++ b/Documentation/userspace-api/media/v4l/func-mmap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-munmap.rst b/Documentation/userspace-api/media/v4l/func-munmap.rst similarity index 96% rename from Documentation/media/uapi/v4l/func-munmap.rst rename to Documentation/userspace-api/media/v4l/func-munmap.rst index 0d472d86a0361..18a9941b47ab6 100644 --- a/Documentation/media/uapi/v4l/func-munmap.rst +++ b/Documentation/userspace-api/media/v4l/func-munmap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-open.rst b/Documentation/userspace-api/media/v4l/func-open.rst similarity index 97% rename from Documentation/media/uapi/v4l/func-open.rst rename to Documentation/userspace-api/media/v4l/func-open.rst index a3d149ce6635c..8bcdec8ab3870 100644 --- a/Documentation/media/uapi/v4l/func-open.rst +++ b/Documentation/userspace-api/media/v4l/func-open.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-poll.rst b/Documentation/userspace-api/media/v4l/func-poll.rst similarity index 98% rename from Documentation/media/uapi/v4l/func-poll.rst rename to Documentation/userspace-api/media/v4l/func-poll.rst index 4c579ed31358d..2c6704c1fab7b 100644 --- a/Documentation/media/uapi/v4l/func-poll.rst +++ b/Documentation/userspace-api/media/v4l/func-poll.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-read.rst b/Documentation/userspace-api/media/v4l/func-read.rst similarity index 98% rename from Documentation/media/uapi/v4l/func-read.rst rename to Documentation/userspace-api/media/v4l/func-read.rst index 14aca4d5e8fdb..1728aa5d83133 100644 --- a/Documentation/media/uapi/v4l/func-read.rst +++ b/Documentation/userspace-api/media/v4l/func-read.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-select.rst b/Documentation/userspace-api/media/v4l/func-select.rst similarity index 98% rename from Documentation/media/uapi/v4l/func-select.rst rename to Documentation/userspace-api/media/v4l/func-select.rst index af5f1e31c0fbf..6aca8a290c1f7 100644 --- a/Documentation/media/uapi/v4l/func-select.rst +++ b/Documentation/userspace-api/media/v4l/func-select.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/func-write.rst b/Documentation/userspace-api/media/v4l/func-write.rst similarity index 97% rename from Documentation/media/uapi/v4l/func-write.rst rename to Documentation/userspace-api/media/v4l/func-write.rst index 865129c726ad5..fb1955f70f0fb 100644 --- a/Documentation/media/uapi/v4l/func-write.rst +++ b/Documentation/userspace-api/media/v4l/func-write.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/hist-v4l2.rst b/Documentation/userspace-api/media/v4l/hist-v4l2.rst similarity index 99% rename from Documentation/media/uapi/v4l/hist-v4l2.rst rename to Documentation/userspace-api/media/v4l/hist-v4l2.rst index 9e097f34cb743..7913d017cd337 100644 --- a/Documentation/media/uapi/v4l/hist-v4l2.rst +++ b/Documentation/userspace-api/media/v4l/hist-v4l2.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/hsv-formats.rst b/Documentation/userspace-api/media/v4l/hsv-formats.rst similarity index 93% rename from Documentation/media/uapi/v4l/hsv-formats.rst rename to Documentation/userspace-api/media/v4l/hsv-formats.rst index f52f8ba131f00..4906f7e0d80d0 100644 --- a/Documentation/media/uapi/v4l/hsv-formats.rst +++ b/Documentation/userspace-api/media/v4l/hsv-formats.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/io.rst b/Documentation/userspace-api/media/v4l/io.rst similarity index 97% rename from Documentation/media/uapi/v4l/io.rst rename to Documentation/userspace-api/media/v4l/io.rst index 049a2530d3a25..de0e2f529268d 100644 --- a/Documentation/media/uapi/v4l/io.rst +++ b/Documentation/userspace-api/media/v4l/io.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/libv4l-introduction.rst b/Documentation/userspace-api/media/v4l/libv4l-introduction.rst similarity index 99% rename from Documentation/media/uapi/v4l/libv4l-introduction.rst rename to Documentation/userspace-api/media/v4l/libv4l-introduction.rst index 1b206d380d4bb..95f3127b47492 100644 --- a/Documentation/media/uapi/v4l/libv4l-introduction.rst +++ b/Documentation/userspace-api/media/v4l/libv4l-introduction.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/libv4l.rst b/Documentation/userspace-api/media/v4l/libv4l.rst similarity index 90% rename from Documentation/media/uapi/v4l/libv4l.rst rename to Documentation/userspace-api/media/v4l/libv4l.rst index d114fbf1ffa65..5ea2016cac651 100644 --- a/Documentation/media/uapi/v4l/libv4l.rst +++ b/Documentation/userspace-api/media/v4l/libv4l.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst similarity index 92% rename from Documentation/media/uapi/v4l/meta-formats.rst rename to Documentation/userspace-api/media/v4l/meta-formats.rst index 74c8659ee9d6c..7dcc4bacbb0ce 100644 --- a/Documentation/media/uapi/v4l/meta-formats.rst +++ b/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/mmap.rst b/Documentation/userspace-api/media/v4l/mmap.rst similarity index 99% rename from Documentation/media/uapi/v4l/mmap.rst rename to Documentation/userspace-api/media/v4l/mmap.rst index c47708bf2c871..9c44d05ebc3f8 100644 --- a/Documentation/media/uapi/v4l/mmap.rst +++ b/Documentation/userspace-api/media/v4l/mmap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/nv12mt.svg b/Documentation/userspace-api/media/v4l/nv12mt.svg similarity index 99% rename from Documentation/media/uapi/v4l/nv12mt.svg rename to Documentation/userspace-api/media/v4l/nv12mt.svg index 067d8fb34ba27..d4bb4eb83f6a0 100644 --- a/Documentation/media/uapi/v4l/nv12mt.svg +++ b/Documentation/userspace-api/media/v4l/nv12mt.svg @@ -22,7 +22,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/nv12mt_example.svg b/Documentation/userspace-api/media/v4l/nv12mt_example.svg similarity index 99% rename from Documentation/media/uapi/v4l/nv12mt_example.svg rename to Documentation/userspace-api/media/v4l/nv12mt_example.svg index 70c3200fdb328..e5075af9f45ac 100644 --- a/Documentation/media/uapi/v4l/nv12mt_example.svg +++ b/Documentation/userspace-api/media/v4l/nv12mt_example.svg @@ -22,7 +22,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/open.rst b/Documentation/userspace-api/media/v4l/open.rst similarity index 99% rename from Documentation/media/uapi/v4l/open.rst rename to Documentation/userspace-api/media/v4l/open.rst index 42fad5001c5c0..38046ef201418 100644 --- a/Documentation/media/uapi/v4l/open.rst +++ b/Documentation/userspace-api/media/v4l/open.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pipeline.dot b/Documentation/userspace-api/media/v4l/pipeline.dot similarity index 100% rename from Documentation/media/uapi/v4l/pipeline.dot rename to Documentation/userspace-api/media/v4l/pipeline.dot diff --git a/Documentation/media/uapi/v4l/pixfmt-bayer.rst b/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-bayer.rst rename to Documentation/userspace-api/media/v4l/pixfmt-bayer.rst index 807ab34ba93bb..be9a8385ebc13 100644 --- a/Documentation/media/uapi/v4l/pixfmt-bayer.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-bayer.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-cnf4.rst b/Documentation/userspace-api/media/v4l/pixfmt-cnf4.rst similarity index 100% rename from Documentation/media/uapi/v4l/pixfmt-cnf4.rst rename to Documentation/userspace-api/media/v4l/pixfmt-cnf4.rst diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst similarity index 99% rename from Documentation/media/uapi/v4l/pixfmt-compressed.rst rename to Documentation/userspace-api/media/v4l/pixfmt-compressed.rst index 561bda112809a..3828bb79225da 100644 --- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-compressed.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-grey.rst b/Documentation/userspace-api/media/v4l/pixfmt-grey.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-grey.rst rename to Documentation/userspace-api/media/v4l/pixfmt-grey.rst index 3a8156164d396..7b03db3393bed 100644 --- a/Documentation/media/uapi/v4l/pixfmt-grey.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-grey.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-indexed.rst b/Documentation/userspace-api/media/v4l/pixfmt-indexed.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-indexed.rst rename to Documentation/userspace-api/media/v4l/pixfmt-indexed.rst index 4538b425a046e..d0d46ed27260e 100644 --- a/Documentation/media/uapi/v4l/pixfmt-indexed.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-indexed.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-intro.rst b/Documentation/userspace-api/media/v4l/pixfmt-intro.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-intro.rst rename to Documentation/userspace-api/media/v4l/pixfmt-intro.rst index ca0a6e0d89595..af870895f6539 100644 --- a/Documentation/media/uapi/v4l/pixfmt-intro.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-intro.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-inzi.rst b/Documentation/userspace-api/media/v4l/pixfmt-inzi.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-inzi.rst rename to Documentation/userspace-api/media/v4l/pixfmt-inzi.rst index af2940d844ff6..f85cccb717416 100644 --- a/Documentation/media/uapi/v4l/pixfmt-inzi.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-inzi.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-m420.rst b/Documentation/userspace-api/media/v4l/pixfmt-m420.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-m420.rst rename to Documentation/userspace-api/media/v4l/pixfmt-m420.rst index c2bae959bf513..5180bbe16c6e6 100644 --- a/Documentation/media/uapi/v4l/pixfmt-m420.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-m420.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-d4xx.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-d4xx.rst similarity index 99% rename from Documentation/media/uapi/v4l/pixfmt-meta-d4xx.rst rename to Documentation/userspace-api/media/v4l/pixfmt-meta-d4xx.rst index 87e8fd7d5d029..4eaf2f9086a9b 100644 --- a/Documentation/media/uapi/v4l/pixfmt-meta-d4xx.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-d4xx.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst rename to Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst index 7fb54339f4a75..97a9a2925671d 100644 --- a/Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst @@ -19,7 +19,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-uvc.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-uvc.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-meta-uvc.rst rename to Documentation/userspace-api/media/v4l/pixfmt-meta-uvc.rst index 481e4e0e6e1d2..debc50285a254 100644 --- a/Documentation/media/uapi/v4l/pixfmt-meta-uvc.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-uvc.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-vivid.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-vivid.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-meta-vivid.rst rename to Documentation/userspace-api/media/v4l/pixfmt-meta-vivid.rst index eed20eaefe24d..34a2382ef91c6 100644 --- a/Documentation/media/uapi/v4l/pixfmt-meta-vivid.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-vivid.rst @@ -20,7 +20,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-vsp1-hgo.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst rename to Documentation/userspace-api/media/v4l/pixfmt-meta-vsp1-hgo.rst index f7a8616962818..b780e447dd4b9 100644 --- a/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgo.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-vsp1-hgo.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst b/Documentation/userspace-api/media/v4l/pixfmt-meta-vsp1-hgt.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst rename to Documentation/userspace-api/media/v4l/pixfmt-meta-vsp1-hgt.rst index d1a341af9c482..e165320cc1ffe 100644 --- a/Documentation/media/uapi/v4l/pixfmt-meta-vsp1-hgt.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-meta-vsp1-hgt.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-nv12.rst b/Documentation/userspace-api/media/v4l/pixfmt-nv12.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-nv12.rst rename to Documentation/userspace-api/media/v4l/pixfmt-nv12.rst index b8c021b07fd2b..19d47b38e02a5 100644 --- a/Documentation/media/uapi/v4l/pixfmt-nv12.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-nv12.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-nv12m.rst b/Documentation/userspace-api/media/v4l/pixfmt-nv12m.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-nv12m.rst rename to Documentation/userspace-api/media/v4l/pixfmt-nv12m.rst index 9b2c5c21280a7..115ea603c13f3 100644 --- a/Documentation/media/uapi/v4l/pixfmt-nv12m.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-nv12m.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst b/Documentation/userspace-api/media/v4l/pixfmt-nv12mt.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-nv12mt.rst rename to Documentation/userspace-api/media/v4l/pixfmt-nv12mt.rst index 2092725de33cb..daac1c16d4f26 100644 --- a/Documentation/media/uapi/v4l/pixfmt-nv12mt.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-nv12mt.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-nv16.rst b/Documentation/userspace-api/media/v4l/pixfmt-nv16.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-nv16.rst rename to Documentation/userspace-api/media/v4l/pixfmt-nv16.rst index 5ec4b7fa8f04e..977636fc98d64 100644 --- a/Documentation/media/uapi/v4l/pixfmt-nv16.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-nv16.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-nv16m.rst b/Documentation/userspace-api/media/v4l/pixfmt-nv16m.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-nv16m.rst rename to Documentation/userspace-api/media/v4l/pixfmt-nv16m.rst index 4a63bcf18b70c..cf33942d942d4 100644 --- a/Documentation/media/uapi/v4l/pixfmt-nv16m.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-nv16m.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-nv24.rst b/Documentation/userspace-api/media/v4l/pixfmt-nv24.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-nv24.rst rename to Documentation/userspace-api/media/v4l/pixfmt-nv24.rst index 13fc6fe1a3d6b..c6fb97bd04726 100644 --- a/Documentation/media/uapi/v4l/pixfmt-nv24.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-nv24.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-packed-hsv.rst b/Documentation/userspace-api/media/v4l/pixfmt-packed-hsv.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-packed-hsv.rst rename to Documentation/userspace-api/media/v4l/pixfmt-packed-hsv.rst index dfc4a8367b3d4..b8c9b0225eea1 100644 --- a/Documentation/media/uapi/v4l/pixfmt-packed-hsv.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-packed-hsv.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-packed-yuv.rst b/Documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst similarity index 99% rename from Documentation/media/uapi/v4l/pixfmt-packed-yuv.rst rename to Documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst index 41b60fae703a7..bbd4bd094debf 100644 --- a/Documentation/media/uapi/v4l/pixfmt-packed-yuv.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-packed-yuv.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-reserved.rst b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst similarity index 99% rename from Documentation/media/uapi/v4l/pixfmt-reserved.rst rename to Documentation/userspace-api/media/v4l/pixfmt-reserved.rst index 7d98a7bf9f1f1..8ef90b0df864d 100644 --- a/Documentation/media/uapi/v4l/pixfmt-reserved.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-rgb.rst b/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst similarity index 99% rename from Documentation/media/uapi/v4l/pixfmt-rgb.rst rename to Documentation/userspace-api/media/v4l/pixfmt-rgb.rst index 4ce305cc45da2..b6c0c942d9d15 100644 --- a/Documentation/media/uapi/v4l/pixfmt-rgb.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-cs08.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cs08.rst similarity index 94% rename from Documentation/media/uapi/v4l/pixfmt-sdr-cs08.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-cs08.rst index e7a89fe7e117d..13f3908d162a7 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-cs08.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cs08.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-cs14le.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cs14le.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-sdr-cs14le.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-cs14le.rst index d10d56f0e63ad..41e5b990d499c 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-cs14le.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cs14le.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-cu08.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cu08.rst similarity index 94% rename from Documentation/media/uapi/v4l/pixfmt-sdr-cu08.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-cu08.rst index f37df90f5a21f..1085b5ad8eb7b 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-cu08.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cu08.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-cu16le.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cu16le.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-sdr-cu16le.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-cu16le.rst index 237998fb5f9f5..9772b30bda95c 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-cu16le.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-cu16le.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-pcu16be.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu16be.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-sdr-pcu16be.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu16be.rst index df078dcfd18dd..53a0a862f33a4 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-pcu16be.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu16be.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-pcu18be.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu18be.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-sdr-pcu18be.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu18be.rst index a1ea63db92303..7f2d2545fb040 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-pcu18be.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu18be.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-pcu20be.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu20be.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-sdr-pcu20be.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu20be.rst index 11a05ea60e26f..9f3d67b4e94cb 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-pcu20be.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-pcu20be.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-sdr-ru12le.rst b/Documentation/userspace-api/media/v4l/pixfmt-sdr-ru12le.rst similarity index 94% rename from Documentation/media/uapi/v4l/pixfmt-sdr-ru12le.rst rename to Documentation/userspace-api/media/v4l/pixfmt-sdr-ru12le.rst index 3c2c9f75fc5e6..c9cde8d425f76 100644 --- a/Documentation/media/uapi/v4l/pixfmt-sdr-ru12le.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-sdr-ru12le.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb10-ipu3.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb10-ipu3.rst similarity index 99% rename from Documentation/media/uapi/v4l/pixfmt-srggb10-ipu3.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb10-ipu3.rst index 75279f0fdad86..5afa02a666980 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb10-ipu3.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb10-ipu3.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb10.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb10.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-srggb10.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb10.rst index cab7fbb1f2fef..37cc1bb8241fd 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb10.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb10.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb10alaw8.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb10alaw8.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-srggb10alaw8.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb10alaw8.rst index 5bb58764b5326..f1b8627f01419 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb10alaw8.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb10alaw8.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb10dpcm8.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb10dpcm8.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-srggb10dpcm8.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb10dpcm8.rst index cbc9c0a52ab41..9814c4ffac68a 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb10dpcm8.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb10dpcm8.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb10p.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb10p.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-srggb10p.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb10p.rst index fd32660a37664..76a4d278e6401 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb10p.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb10p.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb12.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb12.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-srggb12.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb12.rst index 6fb6a937e6adb..98ae80b968ae1 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb12.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb12.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb12p.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb12p.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-srggb12p.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb12p.rst index 045540bc0d86d..7309dd7fa60f6 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb12p.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb12p.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb14.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb14.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-srggb14.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb14.rst index 3420d4d1825e4..a4c7a392fe7f7 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb14.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb14.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb14p.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb14p.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-srggb14p.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb14p.rst index 051ae3d05bc3a..ec1239ada316f 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb14p.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb14p.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb16.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb16.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-srggb16.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb16.rst index 36527c49eaf70..885f0d1f331db 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb16.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb16.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-srggb8.rst b/Documentation/userspace-api/media/v4l/pixfmt-srggb8.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-srggb8.rst rename to Documentation/userspace-api/media/v4l/pixfmt-srggb8.rst index f5233c1e2314d..c275e6ef09f90 100644 --- a/Documentation/media/uapi/v4l/pixfmt-srggb8.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-srggb8.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-tch-td08.rst b/Documentation/userspace-api/media/v4l/pixfmt-tch-td08.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-tch-td08.rst rename to Documentation/userspace-api/media/v4l/pixfmt-tch-td08.rst index b7d3d6ccebc51..165c9be2bfc52 100644 --- a/Documentation/media/uapi/v4l/pixfmt-tch-td08.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-tch-td08.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-tch-td16.rst b/Documentation/userspace-api/media/v4l/pixfmt-tch-td16.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-tch-td16.rst rename to Documentation/userspace-api/media/v4l/pixfmt-tch-td16.rst index 6f1be873bec11..6dca011821752 100644 --- a/Documentation/media/uapi/v4l/pixfmt-tch-td16.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-tch-td16.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-tch-tu08.rst b/Documentation/userspace-api/media/v4l/pixfmt-tch-tu08.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-tch-tu08.rst rename to Documentation/userspace-api/media/v4l/pixfmt-tch-tu08.rst index 2d447475aaa73..f1380b72977f8 100644 --- a/Documentation/media/uapi/v4l/pixfmt-tch-tu08.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-tch-tu08.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-tch-tu16.rst b/Documentation/userspace-api/media/v4l/pixfmt-tch-tu16.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-tch-tu16.rst rename to Documentation/userspace-api/media/v4l/pixfmt-tch-tu16.rst index cb3da6687a586..2b9e1b15abcf3 100644 --- a/Documentation/media/uapi/v4l/pixfmt-tch-tu16.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-tch-tu16.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-uv8.rst b/Documentation/userspace-api/media/v4l/pixfmt-uv8.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-uv8.rst rename to Documentation/userspace-api/media/v4l/pixfmt-uv8.rst index 6008c898305da..a36c1a4d64a4e 100644 --- a/Documentation/media/uapi/v4l/pixfmt-uv8.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-uv8.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-uyvy.rst b/Documentation/userspace-api/media/v4l/pixfmt-uyvy.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-uyvy.rst rename to Documentation/userspace-api/media/v4l/pixfmt-uyvy.rst index 72da2639d37e2..776cb37f76f12 100644 --- a/Documentation/media/uapi/v4l/pixfmt-uyvy.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-uyvy.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-v4l2-mplane.rst b/Documentation/userspace-api/media/v4l/pixfmt-v4l2-mplane.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-v4l2-mplane.rst rename to Documentation/userspace-api/media/v4l/pixfmt-v4l2-mplane.rst index 054275c0dfc16..444b4082684c7 100644 --- a/Documentation/media/uapi/v4l/pixfmt-v4l2-mplane.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-v4l2-mplane.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-v4l2.rst b/Documentation/userspace-api/media/v4l/pixfmt-v4l2.rst similarity index 99% rename from Documentation/media/uapi/v4l/pixfmt-v4l2.rst rename to Documentation/userspace-api/media/v4l/pixfmt-v4l2.rst index a993b861bf751..759420a872d60 100644 --- a/Documentation/media/uapi/v4l/pixfmt-v4l2.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-v4l2.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-vyuy.rst b/Documentation/userspace-api/media/v4l/pixfmt-vyuy.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-vyuy.rst rename to Documentation/userspace-api/media/v4l/pixfmt-vyuy.rst index 39b99707cd996..6cd574e78e4c4 100644 --- a/Documentation/media/uapi/v4l/pixfmt-vyuy.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-vyuy.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y10.rst b/Documentation/userspace-api/media/v4l/pixfmt-y10.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-y10.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y10.rst index 63277686764a1..dfb352ae6784e 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y10.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y10.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y10b.rst b/Documentation/userspace-api/media/v4l/pixfmt-y10b.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-y10b.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y10b.rst index 49c4dd4324130..b5d89d6d5c52b 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y10b.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y10b.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y10p.rst b/Documentation/userspace-api/media/v4l/pixfmt-y10p.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-y10p.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y10p.rst index 39cd789dcb590..ffb6e1631b781 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y10p.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y10p.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y12.rst b/Documentation/userspace-api/media/v4l/pixfmt-y12.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-y12.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y12.rst index 33a943b4996a9..4226c49232de6 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y12.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y12.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y12i.rst b/Documentation/userspace-api/media/v4l/pixfmt-y12i.rst similarity index 95% rename from Documentation/media/uapi/v4l/pixfmt-y12i.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y12i.rst index 1d4a14e1ec6e0..b4752754337ba 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y12i.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y12i.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y14.rst b/Documentation/userspace-api/media/v4l/pixfmt-y14.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt-y14.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y14.rst index 5c260f8da0882..d702b65491609 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y14.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y14.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y16-be.rst b/Documentation/userspace-api/media/v4l/pixfmt-y16-be.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-y16-be.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y16-be.rst index 1e72bfe2d557d..f4eda7b95b519 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y16-be.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y16-be.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y16.rst b/Documentation/userspace-api/media/v4l/pixfmt-y16.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-y16.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y16.rst index f77d900db1312..a092b0a5ff127 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y16.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y16.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y41p.rst b/Documentation/userspace-api/media/v4l/pixfmt-y41p.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-y41p.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y41p.rst index 829c68afd8d7a..211afd7593cce 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y41p.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y41p.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-y8i.rst b/Documentation/userspace-api/media/v4l/pixfmt-y8i.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-y8i.rst rename to Documentation/userspace-api/media/v4l/pixfmt-y8i.rst index 2c88ed90522dd..4248c6f735b7b 100644 --- a/Documentation/media/uapi/v4l/pixfmt-y8i.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-y8i.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuv410.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv410.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-yuv410.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuv410.rst index ebb72a5c7ceb8..1d20115f2b1da 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuv410.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv410.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuv411p.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv411p.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-yuv411p.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuv411p.rst index 83ddaa3f8dfbd..967ba7ce41a24 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuv411p.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv411p.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuv420.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv420.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-yuv420.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuv420.rst index f4f6f792a23ed..7cb685cc82893 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuv420.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv420.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuv420m.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv420m.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-yuv420m.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuv420m.rst index c29b30c6445a9..80c14d4f5acbd 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuv420m.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv420m.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuv422m.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv422m.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-yuv422m.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuv422m.rst index 737fd94a9ae9d..29b78480ccad9 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuv422m.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv422m.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuv422p.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv422p.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-yuv422p.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuv422p.rst index 7cebb6ebb621a..73fde222d8209 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuv422p.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv422p.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuv444m.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv444m.rst similarity index 98% rename from Documentation/media/uapi/v4l/pixfmt-yuv444m.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuv444m.rst index 8f14ca3788163..7073ac7f842d3 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuv444m.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv444m.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yuyv.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuyv.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-yuyv.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yuyv.rst index d86d7f086c418..fe70e007787d1 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yuyv.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuyv.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-yvyu.rst b/Documentation/userspace-api/media/v4l/pixfmt-yvyu.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-yvyu.rst rename to Documentation/userspace-api/media/v4l/pixfmt-yvyu.rst index 656a830fed02b..96c1b537d5a03 100644 --- a/Documentation/media/uapi/v4l/pixfmt-yvyu.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yvyu.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt-z16.rst b/Documentation/userspace-api/media/v4l/pixfmt-z16.rst similarity index 97% rename from Documentation/media/uapi/v4l/pixfmt-z16.rst rename to Documentation/userspace-api/media/v4l/pixfmt-z16.rst index eccf235bf02d1..fe2fb21edeea6 100644 --- a/Documentation/media/uapi/v4l/pixfmt-z16.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-z16.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/pixfmt.rst b/Documentation/userspace-api/media/v4l/pixfmt.rst similarity index 96% rename from Documentation/media/uapi/v4l/pixfmt.rst rename to Documentation/userspace-api/media/v4l/pixfmt.rst index a7d4cd43a298f..70ca3a5c2cf16 100644 --- a/Documentation/media/uapi/v4l/pixfmt.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/planar-apis.rst b/Documentation/userspace-api/media/v4l/planar-apis.rst similarity index 98% rename from Documentation/media/uapi/v4l/planar-apis.rst rename to Documentation/userspace-api/media/v4l/planar-apis.rst index a422dc9d592c9..6247b0c4ab4d2 100644 --- a/Documentation/media/uapi/v4l/planar-apis.rst +++ b/Documentation/userspace-api/media/v4l/planar-apis.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/querycap.rst b/Documentation/userspace-api/media/v4l/querycap.rst similarity index 96% rename from Documentation/media/uapi/v4l/querycap.rst rename to Documentation/userspace-api/media/v4l/querycap.rst index 8d01ef52f7803..35fba2a9e09b8 100644 --- a/Documentation/media/uapi/v4l/querycap.rst +++ b/Documentation/userspace-api/media/v4l/querycap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/rw.rst b/Documentation/userspace-api/media/v4l/rw.rst similarity index 97% rename from Documentation/media/uapi/v4l/rw.rst rename to Documentation/userspace-api/media/v4l/rw.rst index 6e498fcf32c46..ce2768c994d04 100644 --- a/Documentation/media/uapi/v4l/rw.rst +++ b/Documentation/userspace-api/media/v4l/rw.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/sdr-formats.rst b/Documentation/userspace-api/media/v4l/sdr-formats.rst similarity index 92% rename from Documentation/media/uapi/v4l/sdr-formats.rst rename to Documentation/userspace-api/media/v4l/sdr-formats.rst index f452f5574ebb3..b7a1be75251f1 100644 --- a/Documentation/media/uapi/v4l/sdr-formats.rst +++ b/Documentation/userspace-api/media/v4l/sdr-formats.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/selection-api-configuration.rst b/Documentation/userspace-api/media/v4l/selection-api-configuration.rst similarity index 99% rename from Documentation/media/uapi/v4l/selection-api-configuration.rst rename to Documentation/userspace-api/media/v4l/selection-api-configuration.rst index 6e0c98c37067c..67ff67fd734e4 100644 --- a/Documentation/media/uapi/v4l/selection-api-configuration.rst +++ b/Documentation/userspace-api/media/v4l/selection-api-configuration.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/selection-api-examples.rst b/Documentation/userspace-api/media/v4l/selection-api-examples.rst similarity index 97% rename from Documentation/media/uapi/v4l/selection-api-examples.rst rename to Documentation/userspace-api/media/v4l/selection-api-examples.rst index bb288b06cc175..2f4027211129a 100644 --- a/Documentation/media/uapi/v4l/selection-api-examples.rst +++ b/Documentation/userspace-api/media/v4l/selection-api-examples.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/selection-api-intro.rst b/Documentation/userspace-api/media/v4l/selection-api-intro.rst similarity index 96% rename from Documentation/media/uapi/v4l/selection-api-intro.rst rename to Documentation/userspace-api/media/v4l/selection-api-intro.rst index 0faed02d0226a..0994ca25be5ee 100644 --- a/Documentation/media/uapi/v4l/selection-api-intro.rst +++ b/Documentation/userspace-api/media/v4l/selection-api-intro.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/selection-api-targets.rst b/Documentation/userspace-api/media/v4l/selection-api-targets.rst similarity index 92% rename from Documentation/media/uapi/v4l/selection-api-targets.rst rename to Documentation/userspace-api/media/v4l/selection-api-targets.rst index 83d633bcbd6f3..56eab969c9d82 100644 --- a/Documentation/media/uapi/v4l/selection-api-targets.rst +++ b/Documentation/userspace-api/media/v4l/selection-api-targets.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/selection-api-vs-crop-api.rst b/Documentation/userspace-api/media/v4l/selection-api-vs-crop-api.rst similarity index 97% rename from Documentation/media/uapi/v4l/selection-api-vs-crop-api.rst rename to Documentation/userspace-api/media/v4l/selection-api-vs-crop-api.rst index 79b3abca341ad..a9360a0000221 100644 --- a/Documentation/media/uapi/v4l/selection-api-vs-crop-api.rst +++ b/Documentation/userspace-api/media/v4l/selection-api-vs-crop-api.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/selection-api.rst b/Documentation/userspace-api/media/v4l/selection-api.rst similarity index 92% rename from Documentation/media/uapi/v4l/selection-api.rst rename to Documentation/userspace-api/media/v4l/selection-api.rst index 5386004e87cf4..b86e387721dfb 100644 --- a/Documentation/media/uapi/v4l/selection-api.rst +++ b/Documentation/userspace-api/media/v4l/selection-api.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/selection.svg b/Documentation/userspace-api/media/v4l/selection.svg similarity index 99% rename from Documentation/media/uapi/v4l/selection.svg rename to Documentation/userspace-api/media/v4l/selection.svg index 59d2bec9b2780..c0e00ab2ae6b0 100644 --- a/Documentation/media/uapi/v4l/selection.svg +++ b/Documentation/userspace-api/media/v4l/selection.svg @@ -22,7 +22,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/selections-common.rst b/Documentation/userspace-api/media/v4l/selections-common.rst similarity index 94% rename from Documentation/media/uapi/v4l/selections-common.rst rename to Documentation/userspace-api/media/v4l/selections-common.rst index 28b32db280f22..d5ea05869a612 100644 --- a/Documentation/media/uapi/v4l/selections-common.rst +++ b/Documentation/userspace-api/media/v4l/selections-common.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/standard.rst b/Documentation/userspace-api/media/v4l/standard.rst similarity index 99% rename from Documentation/media/uapi/v4l/standard.rst rename to Documentation/userspace-api/media/v4l/standard.rst index bf8959b729882..61c341508eb31 100644 --- a/Documentation/media/uapi/v4l/standard.rst +++ b/Documentation/userspace-api/media/v4l/standard.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/streaming-par.rst b/Documentation/userspace-api/media/v4l/streaming-par.rst similarity index 96% rename from Documentation/media/uapi/v4l/streaming-par.rst rename to Documentation/userspace-api/media/v4l/streaming-par.rst index 425bd0ff14777..6d1a1b93ac8ba 100644 --- a/Documentation/media/uapi/v4l/streaming-par.rst +++ b/Documentation/userspace-api/media/v4l/streaming-par.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/subdev-formats.rst b/Documentation/userspace-api/media/v4l/subdev-formats.rst similarity index 99% rename from Documentation/media/uapi/v4l/subdev-formats.rst rename to Documentation/userspace-api/media/v4l/subdev-formats.rst index 17bfb2beaa6a4..9a4d61b0d76f2 100644 --- a/Documentation/media/uapi/v4l/subdev-formats.rst +++ b/Documentation/userspace-api/media/v4l/subdev-formats.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/subdev-image-processing-crop.svg b/Documentation/userspace-api/media/v4l/subdev-image-processing-crop.svg similarity index 99% rename from Documentation/media/uapi/v4l/subdev-image-processing-crop.svg rename to Documentation/userspace-api/media/v4l/subdev-image-processing-crop.svg index 59321e09929d7..109bbcebd3b43 100644 --- a/Documentation/media/uapi/v4l/subdev-image-processing-crop.svg +++ b/Documentation/userspace-api/media/v4l/subdev-image-processing-crop.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/subdev-image-processing-full.svg b/Documentation/userspace-api/media/v4l/subdev-image-processing-full.svg similarity index 99% rename from Documentation/media/uapi/v4l/subdev-image-processing-full.svg rename to Documentation/userspace-api/media/v4l/subdev-image-processing-full.svg index e739c54fbbfb2..cfdb7532d5b69 100644 --- a/Documentation/media/uapi/v4l/subdev-image-processing-full.svg +++ b/Documentation/userspace-api/media/v4l/subdev-image-processing-full.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/subdev-image-processing-scaling-multi-source.svg b/Documentation/userspace-api/media/v4l/subdev-image-processing-scaling-multi-source.svg similarity index 99% rename from Documentation/media/uapi/v4l/subdev-image-processing-scaling-multi-source.svg rename to Documentation/userspace-api/media/v4l/subdev-image-processing-scaling-multi-source.svg index 401d1456958c5..f7f1379d30a61 100644 --- a/Documentation/media/uapi/v4l/subdev-image-processing-scaling-multi-source.svg +++ b/Documentation/userspace-api/media/v4l/subdev-image-processing-scaling-multi-source.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/tch-formats.rst b/Documentation/userspace-api/media/v4l/tch-formats.rst similarity index 91% rename from Documentation/media/uapi/v4l/tch-formats.rst rename to Documentation/userspace-api/media/v4l/tch-formats.rst index 429c1010149d7..f83aec85fd76b 100644 --- a/Documentation/media/uapi/v4l/tch-formats.rst +++ b/Documentation/userspace-api/media/v4l/tch-formats.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/tuner.rst b/Documentation/userspace-api/media/v4l/tuner.rst similarity index 98% rename from Documentation/media/uapi/v4l/tuner.rst rename to Documentation/userspace-api/media/v4l/tuner.rst index 601dc535199c7..02a396eb6613d 100644 --- a/Documentation/media/uapi/v4l/tuner.rst +++ b/Documentation/userspace-api/media/v4l/tuner.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/user-func.rst b/Documentation/userspace-api/media/v4l/user-func.rst similarity index 97% rename from Documentation/media/uapi/v4l/user-func.rst rename to Documentation/userspace-api/media/v4l/user-func.rst index ca0ef21d77fee..f235f88efe891 100644 --- a/Documentation/media/uapi/v4l/user-func.rst +++ b/Documentation/userspace-api/media/v4l/user-func.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/userp.rst b/Documentation/userspace-api/media/v4l/userp.rst similarity index 99% rename from Documentation/media/uapi/v4l/userp.rst rename to Documentation/userspace-api/media/v4l/userp.rst index b19da8655452b..2d0fa73530668 100644 --- a/Documentation/media/uapi/v4l/userp.rst +++ b/Documentation/userspace-api/media/v4l/userp.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/v4l2-selection-flags.rst b/Documentation/userspace-api/media/v4l/v4l2-selection-flags.rst similarity index 96% rename from Documentation/media/uapi/v4l/v4l2-selection-flags.rst rename to Documentation/userspace-api/media/v4l/v4l2-selection-flags.rst index cc8f2a2b7cbaa..5c6f351b24431 100644 --- a/Documentation/media/uapi/v4l/v4l2-selection-flags.rst +++ b/Documentation/userspace-api/media/v4l/v4l2-selection-flags.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/v4l2-selection-targets.rst b/Documentation/userspace-api/media/v4l/v4l2-selection-targets.rst similarity index 97% rename from Documentation/media/uapi/v4l/v4l2-selection-targets.rst rename to Documentation/userspace-api/media/v4l/v4l2-selection-targets.rst index aae0c0013eb1d..69f500093aa2a 100644 --- a/Documentation/media/uapi/v4l/v4l2-selection-targets.rst +++ b/Documentation/userspace-api/media/v4l/v4l2-selection-targets.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/v4l2.rst b/Documentation/userspace-api/media/v4l/v4l2.rst similarity index 99% rename from Documentation/media/uapi/v4l/v4l2.rst rename to Documentation/userspace-api/media/v4l/v4l2.rst index 97015b9b40b8a..ab7c97c39b970 100644 --- a/Documentation/media/uapi/v4l/v4l2.rst +++ b/Documentation/userspace-api/media/v4l/v4l2.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/v4l2grab-example.rst b/Documentation/userspace-api/media/v4l/v4l2grab-example.rst similarity index 93% rename from Documentation/media/uapi/v4l/v4l2grab-example.rst rename to Documentation/userspace-api/media/v4l/v4l2grab-example.rst index 2a0cfd4429c18..270738876f72e 100644 --- a/Documentation/media/uapi/v4l/v4l2grab-example.rst +++ b/Documentation/userspace-api/media/v4l/v4l2grab-example.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/v4l2grab.c.rst b/Documentation/userspace-api/media/v4l/v4l2grab.c.rst similarity index 98% rename from Documentation/media/uapi/v4l/v4l2grab.c.rst rename to Documentation/userspace-api/media/v4l/v4l2grab.c.rst index e76c5fb7bd19a..a21ff357a830d 100644 --- a/Documentation/media/uapi/v4l/v4l2grab.c.rst +++ b/Documentation/userspace-api/media/v4l/v4l2grab.c.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vbi_525.svg b/Documentation/userspace-api/media/v4l/vbi_525.svg similarity index 99% rename from Documentation/media/uapi/v4l/vbi_525.svg rename to Documentation/userspace-api/media/v4l/vbi_525.svg index 6cd5def22b1fb..b7d09057617e7 100644 --- a/Documentation/media/uapi/v4l/vbi_525.svg +++ b/Documentation/userspace-api/media/v4l/vbi_525.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/vbi_625.svg b/Documentation/userspace-api/media/v4l/vbi_625.svg similarity index 99% rename from Documentation/media/uapi/v4l/vbi_625.svg rename to Documentation/userspace-api/media/v4l/vbi_625.svg index 7aaae5ec48782..e1f5e8552c373 100644 --- a/Documentation/media/uapi/v4l/vbi_625.svg +++ b/Documentation/userspace-api/media/v4l/vbi_625.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/vbi_hsync.svg b/Documentation/userspace-api/media/v4l/vbi_hsync.svg similarity index 99% rename from Documentation/media/uapi/v4l/vbi_hsync.svg rename to Documentation/userspace-api/media/v4l/vbi_hsync.svg index f8e979ada7e33..77606a7b00a41 100644 --- a/Documentation/media/uapi/v4l/vbi_hsync.svg +++ b/Documentation/userspace-api/media/v4l/vbi_hsync.svg @@ -5,7 +5,7 @@ Version 1.1 or any later version published by the Free Software Foundation, with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included at - Documentation/media/uapi/fdl-appendix.rst. + Documentation/userspace-api/media/fdl-appendix.rst. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections --> diff --git a/Documentation/media/uapi/v4l/video.rst b/Documentation/userspace-api/media/v4l/video.rst similarity index 97% rename from Documentation/media/uapi/v4l/video.rst rename to Documentation/userspace-api/media/v4l/video.rst index 69603b5efbb5f..9b73dba0eb8db 100644 --- a/Documentation/media/uapi/v4l/video.rst +++ b/Documentation/userspace-api/media/v4l/video.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/videodev.rst b/Documentation/userspace-api/media/v4l/videodev.rst similarity index 91% rename from Documentation/media/uapi/v4l/videodev.rst rename to Documentation/userspace-api/media/v4l/videodev.rst index fa3d3398930a1..c8244b895802b 100644 --- a/Documentation/media/uapi/v4l/videodev.rst +++ b/Documentation/userspace-api/media/v4l/videodev.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-create-bufs.rst b/Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-create-bufs.rst rename to Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst index bd08e4f77ae42..bd580232be101 100644 --- a/Documentation/media/uapi/v4l/vidioc-create-bufs.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-cropcap.rst b/Documentation/userspace-api/media/v4l/vidioc-cropcap.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-cropcap.rst rename to Documentation/userspace-api/media/v4l/vidioc-cropcap.rst index 019d3d3a0e0d5..035ed9d577ae2 100644 --- a/Documentation/media/uapi/v4l/vidioc-cropcap.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-cropcap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-dbg-g-chip-info.rst b/Documentation/userspace-api/media/v4l/vidioc-dbg-g-chip-info.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-dbg-g-chip-info.rst rename to Documentation/userspace-api/media/v4l/vidioc-dbg-g-chip-info.rst index d38031dbe4e4b..16078a2d3e3d9 100644 --- a/Documentation/media/uapi/v4l/vidioc-dbg-g-chip-info.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-dbg-g-chip-info.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-dbg-g-register.rst b/Documentation/userspace-api/media/v4l/vidioc-dbg-g-register.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-dbg-g-register.rst rename to Documentation/userspace-api/media/v4l/vidioc-dbg-g-register.rst index 112597c6cad25..6311a63278a52 100644 --- a/Documentation/media/uapi/v4l/vidioc-dbg-g-register.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-dbg-g-register.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-decoder-cmd.rst b/Documentation/userspace-api/media/v4l/vidioc-decoder-cmd.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-decoder-cmd.rst rename to Documentation/userspace-api/media/v4l/vidioc-decoder-cmd.rst index 784c5980da8d1..7986a248bff99 100644 --- a/Documentation/media/uapi/v4l/vidioc-decoder-cmd.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-decoder-cmd.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-dqevent.rst b/Documentation/userspace-api/media/v4l/vidioc-dqevent.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-dqevent.rst rename to Documentation/userspace-api/media/v4l/vidioc-dqevent.rst index 2f37d255352af..a9a176d5256db 100644 --- a/Documentation/media/uapi/v4l/vidioc-dqevent.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-dqevent.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-dv-timings-cap.rst b/Documentation/userspace-api/media/v4l/vidioc-dv-timings-cap.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-dv-timings-cap.rst rename to Documentation/userspace-api/media/v4l/vidioc-dv-timings-cap.rst index 1d0acbf14c4f8..60730c32bfe46 100644 --- a/Documentation/media/uapi/v4l/vidioc-dv-timings-cap.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-dv-timings-cap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-encoder-cmd.rst b/Documentation/userspace-api/media/v4l/vidioc-encoder-cmd.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-encoder-cmd.rst rename to Documentation/userspace-api/media/v4l/vidioc-encoder-cmd.rst index c313ca8b8cb55..16269b3b1715f 100644 --- a/Documentation/media/uapi/v4l/vidioc-encoder-cmd.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-encoder-cmd.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enum-dv-timings.rst b/Documentation/userspace-api/media/v4l/vidioc-enum-dv-timings.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-enum-dv-timings.rst rename to Documentation/userspace-api/media/v4l/vidioc-enum-dv-timings.rst index 0b286e19b46bc..89d6b860193ac 100644 --- a/Documentation/media/uapi/v4l/vidioc-enum-dv-timings.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enum-dv-timings.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst b/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-enum-fmt.rst rename to Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst index 8ca6ab701e4ab..7e3142e11d77d 100644 --- a/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enum-frameintervals.rst b/Documentation/userspace-api/media/v4l/vidioc-enum-frameintervals.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-enum-frameintervals.rst rename to Documentation/userspace-api/media/v4l/vidioc-enum-frameintervals.rst index 563a67cddecaa..0e3db737371f4 100644 --- a/Documentation/media/uapi/v4l/vidioc-enum-frameintervals.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enum-frameintervals.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enum-framesizes.rst b/Documentation/userspace-api/media/v4l/vidioc-enum-framesizes.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-enum-framesizes.rst rename to Documentation/userspace-api/media/v4l/vidioc-enum-framesizes.rst index cd97546a7122d..1934d7da97433 100644 --- a/Documentation/media/uapi/v4l/vidioc-enum-framesizes.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enum-framesizes.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enum-freq-bands.rst b/Documentation/userspace-api/media/v4l/vidioc-enum-freq-bands.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-enum-freq-bands.rst rename to Documentation/userspace-api/media/v4l/vidioc-enum-freq-bands.rst index 0e97c09afe0e8..ee3ba67601fa2 100644 --- a/Documentation/media/uapi/v4l/vidioc-enum-freq-bands.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enum-freq-bands.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enumaudio.rst b/Documentation/userspace-api/media/v4l/vidioc-enumaudio.rst similarity index 96% rename from Documentation/media/uapi/v4l/vidioc-enumaudio.rst rename to Documentation/userspace-api/media/v4l/vidioc-enumaudio.rst index ee0c336c8721c..afe4821e58632 100644 --- a/Documentation/media/uapi/v4l/vidioc-enumaudio.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enumaudio.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enumaudioout.rst b/Documentation/userspace-api/media/v4l/vidioc-enumaudioout.rst similarity index 97% rename from Documentation/media/uapi/v4l/vidioc-enumaudioout.rst rename to Documentation/userspace-api/media/v4l/vidioc-enumaudioout.rst index 3a8882214d62d..31c2ae460e2dc 100644 --- a/Documentation/media/uapi/v4l/vidioc-enumaudioout.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enumaudioout.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enuminput.rst b/Documentation/userspace-api/media/v4l/vidioc-enuminput.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-enuminput.rst rename to Documentation/userspace-api/media/v4l/vidioc-enuminput.rst index a0e4c4413121d..510670bff3de3 100644 --- a/Documentation/media/uapi/v4l/vidioc-enuminput.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enuminput.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enumoutput.rst b/Documentation/userspace-api/media/v4l/vidioc-enumoutput.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-enumoutput.rst rename to Documentation/userspace-api/media/v4l/vidioc-enumoutput.rst index 0fea81f60541a..591a99cf80000 100644 --- a/Documentation/media/uapi/v4l/vidioc-enumoutput.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enumoutput.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-enumstd.rst b/Documentation/userspace-api/media/v4l/vidioc-enumstd.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-enumstd.rst rename to Documentation/userspace-api/media/v4l/vidioc-enumstd.rst index 1603b1b3b6e83..8a0508536c139 100644 --- a/Documentation/media/uapi/v4l/vidioc-enumstd.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enumstd.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-expbuf.rst b/Documentation/userspace-api/media/v4l/vidioc-expbuf.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-expbuf.rst rename to Documentation/userspace-api/media/v4l/vidioc-expbuf.rst index 4bd8cd79754c3..384a9be9eba06 100644 --- a/Documentation/media/uapi/v4l/vidioc-expbuf.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-expbuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-audio.rst b/Documentation/userspace-api/media/v4l/vidioc-g-audio.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-audio.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-audio.rst index 7af4fe478ba42..68531bcb62ab1 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-audio.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-audio.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-audioout.rst b/Documentation/userspace-api/media/v4l/vidioc-g-audioout.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-audioout.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-audioout.rst index c6ea0396a96a6..e13b74bf5ce38 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-audioout.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-audioout.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-crop.rst b/Documentation/userspace-api/media/v4l/vidioc-g-crop.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-crop.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-crop.rst index 1eff59dc5f358..10e086be55d55 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-crop.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-crop.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-ctrl.rst b/Documentation/userspace-api/media/v4l/vidioc-g-ctrl.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-ctrl.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-ctrl.rst index 8493b52adbb2d..9831b7514028a 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-ctrl.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-ctrl.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst b/Documentation/userspace-api/media/v4l/vidioc-g-dv-timings.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-dv-timings.rst index e36dd2622857a..84806a893cb7b 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-dv-timings.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-edid.rst b/Documentation/userspace-api/media/v4l/vidioc-g-edid.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-edid.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-edid.rst index e55b349a0c7ee..0620f4cbbcbdd 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-edid.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-edid.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-enc-index.rst b/Documentation/userspace-api/media/v4l/vidioc-g-enc-index.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-enc-index.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-enc-index.rst index e285a1f14cdf1..8aad30a7c6c37 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-enc-index.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-enc-index.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst b/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst index cdb2a2a512d67..add17c9204cb5 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-fbuf.rst b/Documentation/userspace-api/media/v4l/vidioc-g-fbuf.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-fbuf.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-fbuf.rst index 2d197e6bba8fd..0124444419aed 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-fbuf.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-fbuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-fmt.rst b/Documentation/userspace-api/media/v4l/vidioc-g-fmt.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-fmt.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-fmt.rst index 1e69bfc46e8d2..88bb69ec07e22 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-fmt.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-fmt.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-frequency.rst b/Documentation/userspace-api/media/v4l/vidioc-g-frequency.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-frequency.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-frequency.rst index cc30bae3dd6e2..26300e0258a38 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-frequency.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-frequency.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-input.rst b/Documentation/userspace-api/media/v4l/vidioc-g-input.rst similarity index 97% rename from Documentation/media/uapi/v4l/vidioc-g-input.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-input.rst index 76b7d487466e2..294e346678c17 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-input.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-input.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-jpegcomp.rst b/Documentation/userspace-api/media/v4l/vidioc-g-jpegcomp.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-jpegcomp.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-jpegcomp.rst index 5480277ab3273..3b9981dcb8e01 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-jpegcomp.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-jpegcomp.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-modulator.rst b/Documentation/userspace-api/media/v4l/vidioc-g-modulator.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-modulator.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-modulator.rst index 2c33a8bdcc471..c2072f6e87568 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-modulator.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-modulator.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-output.rst b/Documentation/userspace-api/media/v4l/vidioc-g-output.rst similarity index 97% rename from Documentation/media/uapi/v4l/vidioc-g-output.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-output.rst index 69542d78977bb..cad477420fd77 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-output.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-output.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-parm.rst b/Documentation/userspace-api/media/v4l/vidioc-g-parm.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-parm.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-parm.rst index 044a459e073fc..42e9f6ee7a59e 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-parm.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-parm.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-priority.rst b/Documentation/userspace-api/media/v4l/vidioc-g-priority.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-priority.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-priority.rst index 244b4dbe9df32..c8add130c7a41 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-priority.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-priority.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-selection.rst b/Documentation/userspace-api/media/v4l/vidioc-g-selection.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-selection.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-selection.rst index 7d8ef7ac8e274..faab0454b1e43 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-selection.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-selection.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-sliced-vbi-cap.rst b/Documentation/userspace-api/media/v4l/vidioc-g-sliced-vbi-cap.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-sliced-vbi-cap.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-sliced-vbi-cap.rst index 388b826d44b32..7a62c4f4e37f5 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-sliced-vbi-cap.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-sliced-vbi-cap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-std.rst b/Documentation/userspace-api/media/v4l/vidioc-g-std.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-g-std.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-std.rst index e633e42e39104..b0bdb719d4050 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-std.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-std.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-g-tuner.rst b/Documentation/userspace-api/media/v4l/vidioc-g-tuner.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-g-tuner.rst rename to Documentation/userspace-api/media/v4l/vidioc-g-tuner.rst index 82d23b8bd1957..40bff6f0a88dd 100644 --- a/Documentation/media/uapi/v4l/vidioc-g-tuner.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-tuner.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-log-status.rst b/Documentation/userspace-api/media/v4l/vidioc-log-status.rst similarity index 96% rename from Documentation/media/uapi/v4l/vidioc-log-status.rst rename to Documentation/userspace-api/media/v4l/vidioc-log-status.rst index 16bb5509ad667..64c06fa72b9cf 100644 --- a/Documentation/media/uapi/v4l/vidioc-log-status.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-log-status.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-overlay.rst b/Documentation/userspace-api/media/v4l/vidioc-overlay.rst similarity index 96% rename from Documentation/media/uapi/v4l/vidioc-overlay.rst rename to Documentation/userspace-api/media/v4l/vidioc-overlay.rst index fc5a86e8c1f21..74310ff486bab 100644 --- a/Documentation/media/uapi/v4l/vidioc-overlay.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-overlay.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-prepare-buf.rst b/Documentation/userspace-api/media/v4l/vidioc-prepare-buf.rst similarity index 96% rename from Documentation/media/uapi/v4l/vidioc-prepare-buf.rst rename to Documentation/userspace-api/media/v4l/vidioc-prepare-buf.rst index 7c6b5f4e10114..b6c09d5b128fe 100644 --- a/Documentation/media/uapi/v4l/vidioc-prepare-buf.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-prepare-buf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-qbuf.rst b/Documentation/userspace-api/media/v4l/vidioc-qbuf.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-qbuf.rst rename to Documentation/userspace-api/media/v4l/vidioc-qbuf.rst index 407302d80684f..ec0a54fbeb43c 100644 --- a/Documentation/media/uapi/v4l/vidioc-qbuf.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-qbuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-query-dv-timings.rst b/Documentation/userspace-api/media/v4l/vidioc-query-dv-timings.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-query-dv-timings.rst rename to Documentation/userspace-api/media/v4l/vidioc-query-dv-timings.rst index e9b0553953821..ab86408446f37 100644 --- a/Documentation/media/uapi/v4l/vidioc-query-dv-timings.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-query-dv-timings.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-querybuf.rst b/Documentation/userspace-api/media/v4l/vidioc-querybuf.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-querybuf.rst rename to Documentation/userspace-api/media/v4l/vidioc-querybuf.rst index 7da60b24e8b67..646f91140ccf1 100644 --- a/Documentation/media/uapi/v4l/vidioc-querybuf.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-querybuf.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-querycap.rst b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-querycap.rst rename to Documentation/userspace-api/media/v4l/vidioc-querycap.rst index 5f9930195d624..4ce8f87bd54a4 100644 --- a/Documentation/media/uapi/v4l/vidioc-querycap.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-queryctrl.rst b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-queryctrl.rst rename to Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst index 8971f4cfb16ea..fbb0038d86bf9 100644 --- a/Documentation/media/uapi/v4l/vidioc-queryctrl.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-querystd.rst b/Documentation/userspace-api/media/v4l/vidioc-querystd.rst similarity index 97% rename from Documentation/media/uapi/v4l/vidioc-querystd.rst rename to Documentation/userspace-api/media/v4l/vidioc-querystd.rst index d8cf28274cfc8..899f0ef6eefed 100644 --- a/Documentation/media/uapi/v4l/vidioc-querystd.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-querystd.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-reqbufs.rst b/Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst similarity index 99% rename from Documentation/media/uapi/v4l/vidioc-reqbufs.rst rename to Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst index d0c643db477aa..79884bb4893b6 100644 --- a/Documentation/media/uapi/v4l/vidioc-reqbufs.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-s-hw-freq-seek.rst b/Documentation/userspace-api/media/v4l/vidioc-s-hw-freq-seek.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-s-hw-freq-seek.rst rename to Documentation/userspace-api/media/v4l/vidioc-s-hw-freq-seek.rst index 4daec97651f25..4c16e7e89cfae 100644 --- a/Documentation/media/uapi/v4l/vidioc-s-hw-freq-seek.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-s-hw-freq-seek.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-streamon.rst b/Documentation/userspace-api/media/v4l/vidioc-streamon.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-streamon.rst rename to Documentation/userspace-api/media/v4l/vidioc-streamon.rst index 2b5528ec9f890..13e0136d5c25e 100644 --- a/Documentation/media/uapi/v4l/vidioc-streamon.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-streamon.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subdev-enum-frame-interval.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-enum-frame-interval.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subdev-enum-frame-interval.rst rename to Documentation/userspace-api/media/v4l/vidioc-subdev-enum-frame-interval.rst index 6b4bf9ef56065..3527745935c72 100644 --- a/Documentation/media/uapi/v4l/vidioc-subdev-enum-frame-interval.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-enum-frame-interval.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subdev-enum-frame-size.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-enum-frame-size.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subdev-enum-frame-size.rst rename to Documentation/userspace-api/media/v4l/vidioc-subdev-enum-frame-size.rst index 253b128b194e0..eb7401991d024 100644 --- a/Documentation/media/uapi/v4l/vidioc-subdev-enum-frame-size.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-enum-frame-size.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subdev-enum-mbus-code.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-enum-mbus-code.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subdev-enum-mbus-code.rst rename to Documentation/userspace-api/media/v4l/vidioc-subdev-enum-mbus-code.rst index fefe4d7349ee2..35b8607203a47 100644 --- a/Documentation/media/uapi/v4l/vidioc-subdev-enum-mbus-code.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-enum-mbus-code.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subdev-g-crop.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-crop.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subdev-g-crop.rst rename to Documentation/userspace-api/media/v4l/vidioc-subdev-g-crop.rst index 632ee053accc4..8d9fc13015a61 100644 --- a/Documentation/media/uapi/v4l/vidioc-subdev-g-crop.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-crop.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subdev-g-fmt.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-fmt.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subdev-g-fmt.rst rename to Documentation/userspace-api/media/v4l/vidioc-subdev-g-fmt.rst index 472577bd17454..69d60e18664ba 100644 --- a/Documentation/media/uapi/v4l/vidioc-subdev-g-fmt.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-fmt.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subdev-g-frame-interval.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subdev-g-frame-interval.rst rename to Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst index 4b1b4bc78bfea..b61baaf116240 100644 --- a/Documentation/media/uapi/v4l/vidioc-subdev-g-frame-interval.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subdev-g-selection.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subdev-g-selection.rst rename to Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst index fc73d27e6d747..981c95df2dec0 100644 --- a/Documentation/media/uapi/v4l/vidioc-subdev-g-selection.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/vidioc-subscribe-event.rst b/Documentation/userspace-api/media/v4l/vidioc-subscribe-event.rst similarity index 98% rename from Documentation/media/uapi/v4l/vidioc-subscribe-event.rst rename to Documentation/userspace-api/media/v4l/vidioc-subscribe-event.rst index a2d3454555ba3..ae3ed73c0a9e4 100644 --- a/Documentation/media/uapi/v4l/vidioc-subscribe-event.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subscribe-event.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/uapi/v4l/yuv-formats.rst b/Documentation/userspace-api/media/v4l/yuv-formats.rst similarity index 97% rename from Documentation/media/uapi/v4l/yuv-formats.rst rename to Documentation/userspace-api/media/v4l/yuv-formats.rst index 3b259e31b7a1c..8ee92d0cd7695 100644 --- a/Documentation/media/uapi/v4l/yuv-formats.rst +++ b/Documentation/userspace-api/media/v4l/yuv-formats.rst @@ -3,7 +3,7 @@ .. Version 1.1 or any later version published by the Free Software .. Foundation, with no Invariant Sections, no Front-Cover Texts .. and no Back-Cover Texts. A copy of the license is included at -.. Documentation/media/uapi/fdl-appendix.rst. +.. Documentation/userspace-api/media/fdl-appendix.rst. .. .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections diff --git a/Documentation/media/video.h.rst.exceptions b/Documentation/userspace-api/media/video.h.rst.exceptions similarity index 100% rename from Documentation/media/video.h.rst.exceptions rename to Documentation/userspace-api/media/video.h.rst.exceptions diff --git a/Documentation/media/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/videodev2.h.rst.exceptions similarity index 100% rename from Documentation/media/videodev2.h.rst.exceptions rename to Documentation/userspace-api/media/videodev2.h.rst.exceptions diff --git a/MAINTAINERS b/MAINTAINERS index e64e5db314976..0779d9a4eccbf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3903,7 +3903,7 @@ T: git git://linuxtv.org/media_tree.git F: Documentation/ABI/testing/debugfs-cec-error-inj F: Documentation/devicetree/bindings/media/cec.txt F: Documentation/media/kapi/cec-core.rst -F: Documentation/media/uapi/cec +F: Documentation/userspace-api/media/cec F: drivers/media/cec/ F: drivers/media/rc/keymaps/rc-cec.c F: include/media/cec-notifier.h @@ -5126,6 +5126,7 @@ X: Documentation/devicetree/ X: Documentation/firmware-guide/acpi/ X: Documentation/i2c/ X: Documentation/media/ +X: Documentation/userspace-api/media/ X: Documentation/power/ X: Documentation/spi/ @@ -8641,14 +8642,14 @@ M: Bingbu Cao R: Tian Shu Qiu L: linux-media@vger.kernel.org S: Maintained -F: Documentation/media/uapi/v4l/pixfmt-srggb10-ipu3.rst +F: Documentation/userspace-api/media/v4l/pixfmt-srggb10-ipu3.rst F: drivers/media/pci/intel/ipu3/ INTEL IPU3 CSI-2 IMGU DRIVER M: Sakari Ailus L: linux-media@vger.kernel.org S: Maintained -F: Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst +F: Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst F: Documentation/media/v4l-drivers/ipu3.rst F: Documentation/media/v4l-drivers/ipu3_rcb.svg F: drivers/staging/media/ipu3/ @@ -10608,6 +10609,7 @@ Q: http://patchwork.kernel.org/project/linux-media/list/ T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/ F: Documentation/media/ +F: Documentation/userspace-api/media/ F: drivers/media/ F: drivers/staging/media/ F: include/linux/platform_data/media/ diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig index eb79d99787bd9..f4df16df19d9f 100644 --- a/drivers/media/radio/Kconfig +++ b/drivers/media/radio/Kconfig @@ -36,7 +36,7 @@ config RADIO_SI476X In order to control your radio card, you will need to use programs that are compatible with the Video For Linux 2 API. Information on this API and pointers to "v4l2" programs may be found at - . + . To compile this driver as a module, choose M here: the module will be called radio-si476x. @@ -76,7 +76,7 @@ config RADIO_MAXIRADIO In order to control your radio card, you will need to use programs that are compatible with the Video For Linux API. Information on this API and pointers to "v4l" programs may be found at - . + . To compile this driver as a module, choose M here: the module will be called radio-maxiradio. @@ -94,7 +94,7 @@ config RADIO_SHARK In order to control your radio card, you will need to use programs that are compatible with the Video For Linux API. Information on this API and pointers to "v4l" programs may be found at - . + . To compile this driver as a module, choose M here: the module will be called radio-shark. @@ -111,7 +111,7 @@ config RADIO_SHARK2 In order to control your radio card, you will need to use programs that are compatible with the Video For Linux API. Information on this API and pointers to "v4l" programs may be found at - . + . To compile this driver as a module, choose M here: the module will be called radio-shark2. @@ -218,7 +218,7 @@ config RADIO_WL1273 In order to control your radio card, you will need to use programs that are compatible with the Video For Linux 2 API. Information on this API and pointers to "v4l2" programs may be found at - . + . To compile this driver as a module, choose M here: the module will be called radio-wl1273. diff --git a/drivers/media/radio/wl128x/Kconfig b/drivers/media/radio/wl128x/Kconfig index 1dee7277004b6..7b45222730aa7 100644 --- a/drivers/media/radio/wl128x/Kconfig +++ b/drivers/media/radio/wl128x/Kconfig @@ -13,6 +13,6 @@ config RADIO_WL128X In order to control your radio card, you will need to use programs that are compatible with the Video For Linux 2 API. Information on this API and pointers to "v4l2" programs may be found at - . + . endmenu -- GitLab From ff768f596fa19e719c88fbc9bd65e13145d944e7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 10:50:14 +0100 Subject: [PATCH 050/503] media: docs: kAPI docs: move them to driver-api All those documents describe the media driver API. So, move them to the right place within the Kernel documentation. Signed-off-by: Mauro Carvalho Chehab --- .../{media/kapi => driver-api/media}/cec-core.rst | 0 .../{media/kapi => driver-api/media}/csi2.rst | 0 .../{media/kapi => driver-api/media}/dtv-ca.rst | 0 .../{media/kapi => driver-api/media}/dtv-common.rst | 0 .../{media/kapi => driver-api/media}/dtv-core.rst | 0 .../{media/kapi => driver-api/media}/dtv-demux.rst | 0 .../kapi => driver-api/media}/dtv-frontend.rst | 0 .../{media/kapi => driver-api/media}/dtv-net.rst | 0 .../media_kapi.rst => driver-api/media/index.rst} | 12 ++++++------ .../{media/kapi => driver-api/media}/mc-core.rst | 0 .../{media/kapi => driver-api/media}/rc-core.rst | 0 .../{media/kapi => driver-api/media}/v4l2-async.rst | 0 .../{media/kapi => driver-api/media}/v4l2-clocks.rst | 0 .../{media/kapi => driver-api/media}/v4l2-common.rst | 0 .../kapi => driver-api/media}/v4l2-controls.rst | 0 .../{media/kapi => driver-api/media}/v4l2-core.rst | 0 .../{media/kapi => driver-api/media}/v4l2-dev.rst | 0 .../{media/kapi => driver-api/media}/v4l2-device.rst | 0 .../kapi => driver-api/media}/v4l2-dv-timings.rst | 0 .../{media/kapi => driver-api/media}/v4l2-event.rst | 0 .../{media/kapi => driver-api/media}/v4l2-fh.rst | 0 .../media}/v4l2-flash-led-class.rst | 0 .../{media/kapi => driver-api/media}/v4l2-fwnode.rst | 0 .../{media/kapi => driver-api/media}/v4l2-intro.rst | 0 .../{media/kapi => driver-api/media}/v4l2-mc.rst | 0 .../kapi => driver-api/media}/v4l2-mediabus.rst | 0 .../kapi => driver-api/media}/v4l2-mem2mem.rst | 0 .../{media/kapi => driver-api/media}/v4l2-rect.rst | 0 .../{media/kapi => driver-api/media}/v4l2-subdev.rst | 0 .../{media/kapi => driver-api/media}/v4l2-tuner.rst | 0 .../kapi => driver-api/media}/v4l2-tveeprom.rst | 0 .../kapi => driver-api/media}/v4l2-videobuf.rst | 0 .../kapi => driver-api/media}/v4l2-videobuf2.rst | 0 Documentation/media/index.rst | 2 +- Documentation/media/v4l-drivers/max2175.rst | 2 +- .../zh_CN/video4linux/v4l2-framework.txt | 6 +++--- MAINTAINERS | 4 +++- 37 files changed, 14 insertions(+), 12 deletions(-) rename Documentation/{media/kapi => driver-api/media}/cec-core.rst (100%) rename Documentation/{media/kapi => driver-api/media}/csi2.rst (100%) rename Documentation/{media/kapi => driver-api/media}/dtv-ca.rst (100%) rename Documentation/{media/kapi => driver-api/media}/dtv-common.rst (100%) rename Documentation/{media/kapi => driver-api/media}/dtv-core.rst (100%) rename Documentation/{media/kapi => driver-api/media}/dtv-demux.rst (100%) rename Documentation/{media/kapi => driver-api/media}/dtv-frontend.rst (100%) rename Documentation/{media/kapi => driver-api/media}/dtv-net.rst (100%) rename Documentation/{media/media_kapi.rst => driver-api/media/index.rst} (89%) rename Documentation/{media/kapi => driver-api/media}/mc-core.rst (100%) rename Documentation/{media/kapi => driver-api/media}/rc-core.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-async.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-clocks.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-common.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-controls.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-core.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-dev.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-device.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-dv-timings.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-event.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-fh.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-flash-led-class.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-fwnode.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-intro.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-mc.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-mediabus.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-mem2mem.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-rect.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-subdev.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-tuner.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-tveeprom.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-videobuf.rst (100%) rename Documentation/{media/kapi => driver-api/media}/v4l2-videobuf2.rst (100%) diff --git a/Documentation/media/kapi/cec-core.rst b/Documentation/driver-api/media/cec-core.rst similarity index 100% rename from Documentation/media/kapi/cec-core.rst rename to Documentation/driver-api/media/cec-core.rst diff --git a/Documentation/media/kapi/csi2.rst b/Documentation/driver-api/media/csi2.rst similarity index 100% rename from Documentation/media/kapi/csi2.rst rename to Documentation/driver-api/media/csi2.rst diff --git a/Documentation/media/kapi/dtv-ca.rst b/Documentation/driver-api/media/dtv-ca.rst similarity index 100% rename from Documentation/media/kapi/dtv-ca.rst rename to Documentation/driver-api/media/dtv-ca.rst diff --git a/Documentation/media/kapi/dtv-common.rst b/Documentation/driver-api/media/dtv-common.rst similarity index 100% rename from Documentation/media/kapi/dtv-common.rst rename to Documentation/driver-api/media/dtv-common.rst diff --git a/Documentation/media/kapi/dtv-core.rst b/Documentation/driver-api/media/dtv-core.rst similarity index 100% rename from Documentation/media/kapi/dtv-core.rst rename to Documentation/driver-api/media/dtv-core.rst diff --git a/Documentation/media/kapi/dtv-demux.rst b/Documentation/driver-api/media/dtv-demux.rst similarity index 100% rename from Documentation/media/kapi/dtv-demux.rst rename to Documentation/driver-api/media/dtv-demux.rst diff --git a/Documentation/media/kapi/dtv-frontend.rst b/Documentation/driver-api/media/dtv-frontend.rst similarity index 100% rename from Documentation/media/kapi/dtv-frontend.rst rename to Documentation/driver-api/media/dtv-frontend.rst diff --git a/Documentation/media/kapi/dtv-net.rst b/Documentation/driver-api/media/dtv-net.rst similarity index 100% rename from Documentation/media/kapi/dtv-net.rst rename to Documentation/driver-api/media/dtv-net.rst diff --git a/Documentation/media/media_kapi.rst b/Documentation/driver-api/media/index.rst similarity index 89% rename from Documentation/media/media_kapi.rst rename to Documentation/driver-api/media/index.rst index 1389998c90f77..d2842f300bbd2 100644 --- a/Documentation/media/media_kapi.rst +++ b/Documentation/driver-api/media/index.rst @@ -30,9 +30,9 @@ For more details see the file COPYING in the source distribution of Linux. :maxdepth: 5 :numbered: - kapi/v4l2-core - kapi/dtv-core - kapi/rc-core - kapi/mc-core - kapi/cec-core - kapi/csi2 + v4l2-core + dtv-core + rc-core + mc-core + cec-core + csi2 diff --git a/Documentation/media/kapi/mc-core.rst b/Documentation/driver-api/media/mc-core.rst similarity index 100% rename from Documentation/media/kapi/mc-core.rst rename to Documentation/driver-api/media/mc-core.rst diff --git a/Documentation/media/kapi/rc-core.rst b/Documentation/driver-api/media/rc-core.rst similarity index 100% rename from Documentation/media/kapi/rc-core.rst rename to Documentation/driver-api/media/rc-core.rst diff --git a/Documentation/media/kapi/v4l2-async.rst b/Documentation/driver-api/media/v4l2-async.rst similarity index 100% rename from Documentation/media/kapi/v4l2-async.rst rename to Documentation/driver-api/media/v4l2-async.rst diff --git a/Documentation/media/kapi/v4l2-clocks.rst b/Documentation/driver-api/media/v4l2-clocks.rst similarity index 100% rename from Documentation/media/kapi/v4l2-clocks.rst rename to Documentation/driver-api/media/v4l2-clocks.rst diff --git a/Documentation/media/kapi/v4l2-common.rst b/Documentation/driver-api/media/v4l2-common.rst similarity index 100% rename from Documentation/media/kapi/v4l2-common.rst rename to Documentation/driver-api/media/v4l2-common.rst diff --git a/Documentation/media/kapi/v4l2-controls.rst b/Documentation/driver-api/media/v4l2-controls.rst similarity index 100% rename from Documentation/media/kapi/v4l2-controls.rst rename to Documentation/driver-api/media/v4l2-controls.rst diff --git a/Documentation/media/kapi/v4l2-core.rst b/Documentation/driver-api/media/v4l2-core.rst similarity index 100% rename from Documentation/media/kapi/v4l2-core.rst rename to Documentation/driver-api/media/v4l2-core.rst diff --git a/Documentation/media/kapi/v4l2-dev.rst b/Documentation/driver-api/media/v4l2-dev.rst similarity index 100% rename from Documentation/media/kapi/v4l2-dev.rst rename to Documentation/driver-api/media/v4l2-dev.rst diff --git a/Documentation/media/kapi/v4l2-device.rst b/Documentation/driver-api/media/v4l2-device.rst similarity index 100% rename from Documentation/media/kapi/v4l2-device.rst rename to Documentation/driver-api/media/v4l2-device.rst diff --git a/Documentation/media/kapi/v4l2-dv-timings.rst b/Documentation/driver-api/media/v4l2-dv-timings.rst similarity index 100% rename from Documentation/media/kapi/v4l2-dv-timings.rst rename to Documentation/driver-api/media/v4l2-dv-timings.rst diff --git a/Documentation/media/kapi/v4l2-event.rst b/Documentation/driver-api/media/v4l2-event.rst similarity index 100% rename from Documentation/media/kapi/v4l2-event.rst rename to Documentation/driver-api/media/v4l2-event.rst diff --git a/Documentation/media/kapi/v4l2-fh.rst b/Documentation/driver-api/media/v4l2-fh.rst similarity index 100% rename from Documentation/media/kapi/v4l2-fh.rst rename to Documentation/driver-api/media/v4l2-fh.rst diff --git a/Documentation/media/kapi/v4l2-flash-led-class.rst b/Documentation/driver-api/media/v4l2-flash-led-class.rst similarity index 100% rename from Documentation/media/kapi/v4l2-flash-led-class.rst rename to Documentation/driver-api/media/v4l2-flash-led-class.rst diff --git a/Documentation/media/kapi/v4l2-fwnode.rst b/Documentation/driver-api/media/v4l2-fwnode.rst similarity index 100% rename from Documentation/media/kapi/v4l2-fwnode.rst rename to Documentation/driver-api/media/v4l2-fwnode.rst diff --git a/Documentation/media/kapi/v4l2-intro.rst b/Documentation/driver-api/media/v4l2-intro.rst similarity index 100% rename from Documentation/media/kapi/v4l2-intro.rst rename to Documentation/driver-api/media/v4l2-intro.rst diff --git a/Documentation/media/kapi/v4l2-mc.rst b/Documentation/driver-api/media/v4l2-mc.rst similarity index 100% rename from Documentation/media/kapi/v4l2-mc.rst rename to Documentation/driver-api/media/v4l2-mc.rst diff --git a/Documentation/media/kapi/v4l2-mediabus.rst b/Documentation/driver-api/media/v4l2-mediabus.rst similarity index 100% rename from Documentation/media/kapi/v4l2-mediabus.rst rename to Documentation/driver-api/media/v4l2-mediabus.rst diff --git a/Documentation/media/kapi/v4l2-mem2mem.rst b/Documentation/driver-api/media/v4l2-mem2mem.rst similarity index 100% rename from Documentation/media/kapi/v4l2-mem2mem.rst rename to Documentation/driver-api/media/v4l2-mem2mem.rst diff --git a/Documentation/media/kapi/v4l2-rect.rst b/Documentation/driver-api/media/v4l2-rect.rst similarity index 100% rename from Documentation/media/kapi/v4l2-rect.rst rename to Documentation/driver-api/media/v4l2-rect.rst diff --git a/Documentation/media/kapi/v4l2-subdev.rst b/Documentation/driver-api/media/v4l2-subdev.rst similarity index 100% rename from Documentation/media/kapi/v4l2-subdev.rst rename to Documentation/driver-api/media/v4l2-subdev.rst diff --git a/Documentation/media/kapi/v4l2-tuner.rst b/Documentation/driver-api/media/v4l2-tuner.rst similarity index 100% rename from Documentation/media/kapi/v4l2-tuner.rst rename to Documentation/driver-api/media/v4l2-tuner.rst diff --git a/Documentation/media/kapi/v4l2-tveeprom.rst b/Documentation/driver-api/media/v4l2-tveeprom.rst similarity index 100% rename from Documentation/media/kapi/v4l2-tveeprom.rst rename to Documentation/driver-api/media/v4l2-tveeprom.rst diff --git a/Documentation/media/kapi/v4l2-videobuf.rst b/Documentation/driver-api/media/v4l2-videobuf.rst similarity index 100% rename from Documentation/media/kapi/v4l2-videobuf.rst rename to Documentation/driver-api/media/v4l2-videobuf.rst diff --git a/Documentation/media/kapi/v4l2-videobuf2.rst b/Documentation/driver-api/media/v4l2-videobuf2.rst similarity index 100% rename from Documentation/media/kapi/v4l2-videobuf2.rst rename to Documentation/driver-api/media/v4l2-videobuf2.rst diff --git a/Documentation/media/index.rst b/Documentation/media/index.rst index 8118c2d001ff4..308f6a396d1cf 100644 --- a/Documentation/media/index.rst +++ b/Documentation/media/index.rst @@ -13,7 +13,7 @@ Linux Media Subsystem Documentation :maxdepth: 2 ../userspace-api/media/index - media_kapi + ../driver-api/media/index dvb-drivers/index v4l-drivers/index cec-drivers/index diff --git a/Documentation/media/v4l-drivers/max2175.rst b/Documentation/media/v4l-drivers/max2175.rst index a5e35059d98d9..35d3c4b41fc7c 100644 --- a/Documentation/media/v4l-drivers/max2175.rst +++ b/Documentation/media/v4l-drivers/max2175.rst @@ -9,7 +9,7 @@ The MAX2175 driver implements the following driver-specific controls: ------------------------------- Enable/Disable I2S output of the tuner. This is a private control that can be accessed only using the subdev interface. - Refer to Documentation/media/kapi/v4l2-controls.rst for more details. + Refer to Documentation/driver-api/media/v4l2-controls.rst for more details. .. flat-table:: :header-rows: 0 diff --git a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt index 9c39ee58ea507..4d2af480a112b 100644 --- a/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt +++ b/Documentation/translations/zh_CN/video4linux/v4l2-framework.txt @@ -1,4 +1,4 @@ -Chinese translated version of Documentation/media/media_kapi.rst +Chinese translated version of Documentation/driver-api/media/index.rst If you have any comment or update to the content, please contact the original document maintainer directly. However, if you have a problem @@ -9,7 +9,7 @@ or if there is a problem with the translation. Maintainer: Mauro Carvalho Chehab Chinese maintainer: Fu Wei --------------------------------------------------------------------- -Documentation/media/media_kapi.rst 的中文翻译 +Documentation/driver-api/media/index.rst 的中文翻译 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻 @@ -777,7 +777,7 @@ v4l2 核心 API 提供了一个处理视频缓冲的标准方法(称为“videob 线性 DMA(videobuf-dma-contig)以及大多用于 USB 设备的用 vmalloc 分配的缓冲(videobuf-vmalloc)。 -请参阅 Documentation/media/kapi/v4l2-videobuf.rst，以获得更多关于 videobuf +请参阅 Documentation/driver-api/media/v4l2-videobuf.rst，以获得更多关于 videobuf 层的使用信息。 v4l2_fh 结构体 diff --git a/MAINTAINERS b/MAINTAINERS index 0779d9a4eccbf..5262a05ff0d1b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3902,7 +3902,7 @@ W: http://linuxtv.org T: git git://linuxtv.org/media_tree.git F: Documentation/ABI/testing/debugfs-cec-error-inj F: Documentation/devicetree/bindings/media/cec.txt -F: Documentation/media/kapi/cec-core.rst +F: Documentation/driver-api/media/cec-core.rst F: Documentation/userspace-api/media/cec F: drivers/media/cec/ F: drivers/media/rc/keymaps/rc-cec.c @@ -5127,6 +5127,7 @@ X: Documentation/firmware-guide/acpi/ X: Documentation/i2c/ X: Documentation/media/ X: Documentation/userspace-api/media/ +X: Documentation/driver-api/media/ X: Documentation/power/ X: Documentation/spi/ @@ -10610,6 +10611,7 @@ T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/ F: Documentation/media/ F: Documentation/userspace-api/media/ +F: Documentation/driver-api/media/ F: drivers/media/ F: drivers/staging/media/ F: include/linux/platform_data/media/ -- GitLab From 2e9a7e0bc191c6dc97a0b3cb994b83834179a42b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 6 Mar 2020 08:34:41 +0100 Subject: [PATCH 051/503] media: docs: move fourcc file to the uAPI document This file gives a hint about how fourcc should be named. It is on a very weird place, as such kind of thing belongs to the uAPI guide. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/v4l-drivers/index.rst | 1 - Documentation/userspace-api/media/v4l/common.rst | 1 + .../{media/v4l-drivers => userspace-api/media/v4l}/fourcc.rst | 0 3 files changed, 1 insertion(+), 1 deletion(-) rename Documentation/{media/v4l-drivers => userspace-api/media/v4l}/fourcc.rst (100%) diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 67665a8abe02b..8962a86dad70e 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -31,7 +31,6 @@ For more details see the file COPYING in the source distribution of Linux. :maxdepth: 5 :numbered: - fourcc v4l-with-ir tuners cardlist diff --git a/Documentation/userspace-api/media/v4l/common.rst b/Documentation/userspace-api/media/v4l/common.rst index af28ac1bcf882..7d81c58a13cd7 100644 --- a/Documentation/userspace-api/media/v4l/common.rst +++ b/Documentation/userspace-api/media/v4l/common.rst @@ -57,6 +57,7 @@ applicable to all devices. ext-ctrls-fm-tx ext-ctrls-fm-rx ext-ctrls-detect + fourcc format planar-apis selection-api diff --git a/Documentation/media/v4l-drivers/fourcc.rst b/Documentation/userspace-api/media/v4l/fourcc.rst similarity index 100% rename from Documentation/media/v4l-drivers/fourcc.rst rename to Documentation/userspace-api/media/v4l/fourcc.rst -- GitLab From 32e2eae23f8fd1b90d86f4d04ca9790952d9d928 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 13:08:03 +0100 Subject: [PATCH 052/503] media: docs: move user-facing docs to the admin guide Most of the driver-specific documentation is meant to help users of the media subsystem. Move them to the admin-guide. It should be noticed, however, that several of those files are outdated and will require further work in order to make them useful again. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/index.rst | 1 + .../admin-guide/kernel-parameters.txt | 4 +- .../media}/au0828-cardlist.rst | 0 .../media}/avermedia.rst | 0 .../media}/bt8xx.rst | 8 +- .../media}/bttv-cardlist.rst | 0 .../media}/bttv.rst | 0 .../media}/cafe_ccic.rst | 0 .../media}/cardlist.rst | 0 .../media}/cards.rst | 0 .../dvb-drivers => admin-guide/media}/ci.rst | 0 .../media}/cpia2.rst | 0 .../media}/cx23885-cardlist.rst | 0 .../media}/cx88-cardlist.rst | 0 .../media}/cx88.rst | 0 .../media}/davinci-vpbe.rst | 0 .../media}/em28xx-cardlist.rst | 0 .../dvb-drivers => admin-guide/media}/faq.rst | 0 .../media}/fimc.rst | 0 .../media}/gspca-cardlist.rst | 0 .../v4l-drivers => admin-guide/media}/imx.rst | 0 .../media}/imx7.rst | 0 Documentation/admin-guide/media/index.rst | 104 ++++++++++++++++++ .../media}/intro.rst | 0 .../media}/ipu3.rst | 0 .../media}/ipu3_rcb.svg | 0 .../media}/ivtv-cardlist.rst | 0 .../media}/ivtv.rst | 0 .../media}/lmedm04.rst | 0 .../media}/meye.rst | 0 .../media}/omap3isp.rst | 0 .../media}/omap4_camera.rst | 0 .../media}/opera-firmware.rst | 0 .../media}/philips.rst | 0 .../media}/pulse8-cec.rst | 0 .../media}/qcom_camss.rst | 0 .../media}/qcom_camss_8x96_graph.dot | 0 .../media}/qcom_camss_graph.dot | 0 .../media}/rcar-fdp1.rst | 0 .../media}/saa7134-cardlist.rst | 0 .../media}/saa7134.rst | 0 .../media}/saa7164-cardlist.rst | 0 .../media}/si470x.rst | 0 .../media}/si4713.rst | 0 .../media}/si476x.rst | 0 .../media}/technisat.rst | 0 .../media}/tm6000-cardlist.rst | 0 .../media}/ttusb-dec.rst | 0 .../media}/tuner-cardlist.rst | 0 .../media}/udev.rst | 0 .../media}/usbvision-cardlist.rst | 0 .../media}/v4l-with-ir.rst | 0 .../media}/vimc.dot | 0 .../media}/vimc.rst | 0 .../media}/vivid.rst | 0 .../media}/zr364xx.rst | 0 Documentation/media/cec-drivers/index.rst | 34 ------ Documentation/media/dvb-drivers/index.rst | 11 -- Documentation/media/index.rst | 4 +- Documentation/media/v4l-drivers/index.rst | 25 ----- .../zh_CN/video4linux/omap3isp.txt | 4 +- .../media/v4l/dev-sliced-vbi.rst | 2 +- .../media/v4l/ext-ctrls-codec.rst | 2 +- .../media/v4l/ext-ctrls-image-process.rst | 2 +- .../media/v4l/pixfmt-reserved.rst | 2 +- MAINTAINERS | 22 ++-- drivers/media/pci/bt8xx/Kconfig | 2 +- drivers/media/pci/meye/Kconfig | 2 +- drivers/media/radio/si470x/Kconfig | 2 +- drivers/media/usb/dvb-usb-v2/lmedm04.c | 2 +- drivers/media/usb/gspca/Kconfig | 2 +- drivers/media/usb/zr364xx/Kconfig | 2 +- 72 files changed, 136 insertions(+), 101 deletions(-) rename Documentation/{media/v4l-drivers => admin-guide/media}/au0828-cardlist.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/avermedia.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/bt8xx.rst (93%) rename Documentation/{media/v4l-drivers => admin-guide/media}/bttv-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/bttv.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/cafe_ccic.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/cardlist.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/cards.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/ci.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/cpia2.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/cx23885-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/cx88-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/cx88.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/davinci-vpbe.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/em28xx-cardlist.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/faq.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/fimc.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/gspca-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/imx.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/imx7.rst (100%) create mode 100644 Documentation/admin-guide/media/index.rst rename Documentation/{media/dvb-drivers => admin-guide/media}/intro.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/ipu3.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/ipu3_rcb.svg (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/ivtv-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/ivtv.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/lmedm04.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/meye.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/omap3isp.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/omap4_camera.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/opera-firmware.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/philips.rst (100%) rename Documentation/{media/cec-drivers => admin-guide/media}/pulse8-cec.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/qcom_camss.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/qcom_camss_8x96_graph.dot (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/qcom_camss_graph.dot (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/rcar-fdp1.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/saa7134-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/saa7134.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/saa7164-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/si470x.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/si4713.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/si476x.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/technisat.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/tm6000-cardlist.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/ttusb-dec.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/tuner-cardlist.rst (100%) rename Documentation/{media/dvb-drivers => admin-guide/media}/udev.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/usbvision-cardlist.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/v4l-with-ir.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/vimc.dot (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/vimc.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/vivid.rst (100%) rename Documentation/{media/v4l-drivers => admin-guide/media}/zr364xx.rst (100%) delete mode 100644 Documentation/media/cec-drivers/index.rst diff --git a/Documentation/admin-guide/index.rst b/Documentation/admin-guide/index.rst index 5a6269fb85938..58c7f9fc2396c 100644 --- a/Documentation/admin-guide/index.rst +++ b/Documentation/admin-guide/index.rst @@ -93,6 +93,7 @@ configure specific aspects of kernel behavior to your liking. lockup-watchdogs LSM/index md + media/index mm/index module-signing mono diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index f2a93c8679e88..3ed0b42ca6f05 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -458,7 +458,7 @@ bttv.card= [HW,V4L] bttv (bt848 + bt878 based grabber cards) bttv.radio= Most important insmod options are available as kernel args too. - bttv.pll= See Documentation/media/v4l-drivers/bttv.rst + bttv.pll= See Documentation/admin-guide/media/bttv.rst bttv.tuner= bulk_remove=off [PPC] This parameter disables the use of the pSeries @@ -2705,7 +2705,7 @@ See Documentation/admin-guide/pm/sleep-states.rst. meye.*= [HW] Set MotionEye Camera parameters - See Documentation/media/v4l-drivers/meye.rst. + See Documentation/admin-guide/media/meye.rst. mfgpt_irq= [IA-32] Specify the IRQ to use for the Multi-Function General Purpose Timers on AMD Geode diff --git a/Documentation/media/v4l-drivers/au0828-cardlist.rst b/Documentation/admin-guide/media/au0828-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/au0828-cardlist.rst rename to Documentation/admin-guide/media/au0828-cardlist.rst diff --git a/Documentation/media/dvb-drivers/avermedia.rst b/Documentation/admin-guide/media/avermedia.rst similarity index 100% rename from Documentation/media/dvb-drivers/avermedia.rst rename to Documentation/admin-guide/media/avermedia.rst diff --git a/Documentation/media/dvb-drivers/bt8xx.rst b/Documentation/admin-guide/media/bt8xx.rst similarity index 93% rename from Documentation/media/dvb-drivers/bt8xx.rst rename to Documentation/admin-guide/media/bt8xx.rst index 7936cd96fc8f9..d800f7791adad 100644 --- a/Documentation/media/dvb-drivers/bt8xx.rst +++ b/Documentation/admin-guide/media/bt8xx.rst @@ -20,7 +20,7 @@ General information This class of cards has a bt878a as the PCI interface, and require the bttv driver for accessing the i2c bus and the gpio pins of the bt8xx chipset. -Please see Documentation/media/dvb-drivers/cards.rst => o Cards based on the Conexant Bt8xx PCI bridge: +Please see Documentation/admin-guide/media/cards.rst => o Cards based on the Conexant Bt8xx PCI bridge: Compiling kernel please enable: @@ -47,7 +47,7 @@ Loading Modules Regular case: If the bttv driver detects a bt8xx-based DVB card, all frontend and backend modules will be loaded automatically. Exceptions are: - Old TwinHan DST cards or clones with or without CA slot and not containing an Eeprom. -People running udev please see Documentation/media/dvb-drivers/udev.rst. +People running udev please see Documentation/admin-guide/media/udev.rst. In the following cases overriding the PCI type detection for dvb-bt8xx might be necessary: @@ -74,7 +74,7 @@ Useful parameters for verbosity level and debugging the dst module: The autodetected values are determined by the cards' "response string". In your logs see f. ex.: dst_get_device_id: Recognize [DSTMCI]. For bug reports please send in a complete log with verbose=4 activated. -Please also see Documentation/media/dvb-drivers/ci.rst. +Please also see Documentation/admin-guide/media/ci.rst. Running multiple cards ~~~~~~~~~~~~~~~~~~~~~~ @@ -102,7 +102,7 @@ Examples of card ID's: $ modprobe bttv card=113 card=135 -For a full list of card ID's please see Documentation/media/v4l-drivers/bttv-cardlist.rst. +For a full list of card ID's please see Documentation/admin-guide/media/bttv-cardlist.rst. In case of further problems please subscribe and send questions to the mailing list: linux-dvb@linuxtv.org. Probing the cards with broken PCI subsystem ID diff --git a/Documentation/media/v4l-drivers/bttv-cardlist.rst b/Documentation/admin-guide/media/bttv-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/bttv-cardlist.rst rename to Documentation/admin-guide/media/bttv-cardlist.rst diff --git a/Documentation/media/v4l-drivers/bttv.rst b/Documentation/admin-guide/media/bttv.rst similarity index 100% rename from Documentation/media/v4l-drivers/bttv.rst rename to Documentation/admin-guide/media/bttv.rst diff --git a/Documentation/media/v4l-drivers/cafe_ccic.rst b/Documentation/admin-guide/media/cafe_ccic.rst similarity index 100% rename from Documentation/media/v4l-drivers/cafe_ccic.rst rename to Documentation/admin-guide/media/cafe_ccic.rst diff --git a/Documentation/media/v4l-drivers/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/cardlist.rst rename to Documentation/admin-guide/media/cardlist.rst diff --git a/Documentation/media/dvb-drivers/cards.rst b/Documentation/admin-guide/media/cards.rst similarity index 100% rename from Documentation/media/dvb-drivers/cards.rst rename to Documentation/admin-guide/media/cards.rst diff --git a/Documentation/media/dvb-drivers/ci.rst b/Documentation/admin-guide/media/ci.rst similarity index 100% rename from Documentation/media/dvb-drivers/ci.rst rename to Documentation/admin-guide/media/ci.rst diff --git a/Documentation/media/v4l-drivers/cpia2.rst b/Documentation/admin-guide/media/cpia2.rst similarity index 100% rename from Documentation/media/v4l-drivers/cpia2.rst rename to Documentation/admin-guide/media/cpia2.rst diff --git a/Documentation/media/v4l-drivers/cx23885-cardlist.rst b/Documentation/admin-guide/media/cx23885-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/cx23885-cardlist.rst rename to Documentation/admin-guide/media/cx23885-cardlist.rst diff --git a/Documentation/media/v4l-drivers/cx88-cardlist.rst b/Documentation/admin-guide/media/cx88-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/cx88-cardlist.rst rename to Documentation/admin-guide/media/cx88-cardlist.rst diff --git a/Documentation/media/v4l-drivers/cx88.rst b/Documentation/admin-guide/media/cx88.rst similarity index 100% rename from Documentation/media/v4l-drivers/cx88.rst rename to Documentation/admin-guide/media/cx88.rst diff --git a/Documentation/media/v4l-drivers/davinci-vpbe.rst b/Documentation/admin-guide/media/davinci-vpbe.rst similarity index 100% rename from Documentation/media/v4l-drivers/davinci-vpbe.rst rename to Documentation/admin-guide/media/davinci-vpbe.rst diff --git a/Documentation/media/v4l-drivers/em28xx-cardlist.rst b/Documentation/admin-guide/media/em28xx-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/em28xx-cardlist.rst rename to Documentation/admin-guide/media/em28xx-cardlist.rst diff --git a/Documentation/media/dvb-drivers/faq.rst b/Documentation/admin-guide/media/faq.rst similarity index 100% rename from Documentation/media/dvb-drivers/faq.rst rename to Documentation/admin-guide/media/faq.rst diff --git a/Documentation/media/v4l-drivers/fimc.rst b/Documentation/admin-guide/media/fimc.rst similarity index 100% rename from Documentation/media/v4l-drivers/fimc.rst rename to Documentation/admin-guide/media/fimc.rst diff --git a/Documentation/media/v4l-drivers/gspca-cardlist.rst b/Documentation/admin-guide/media/gspca-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/gspca-cardlist.rst rename to Documentation/admin-guide/media/gspca-cardlist.rst diff --git a/Documentation/media/v4l-drivers/imx.rst b/Documentation/admin-guide/media/imx.rst similarity index 100% rename from Documentation/media/v4l-drivers/imx.rst rename to Documentation/admin-guide/media/imx.rst diff --git a/Documentation/media/v4l-drivers/imx7.rst b/Documentation/admin-guide/media/imx7.rst similarity index 100% rename from Documentation/media/v4l-drivers/imx7.rst rename to Documentation/admin-guide/media/imx7.rst diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst new file mode 100644 index 0000000000000..5b355c327be1f --- /dev/null +++ b/Documentation/admin-guide/media/index.rst @@ -0,0 +1,104 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: + +**Copyright** |copy| 1999-2020 : LinuxTV Developers + +This documentation is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the Free +Software Foundation version 2 of the License. + +This program is distributed in the hope that it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. + +For more details see the file COPYING in the source distribution of Linux. + +.. _uapi-v4l-drivers: + +################################################ +Video4Linux (V4L) driver-specific documentation +################################################ + +.. only:: html + + .. class:: toc-title + + Table of Contents + +.. toctree:: + :maxdepth: 5 + :numbered: + + cardlist + + v4l-with-ir + + bttv + cafe_ccic + cpia2 + cx88 + davinci-vpbe + fimc + imx + imx7 + ipu3 + ivtv + meye + omap3isp + omap4_camera + philips + qcom_camss + rcar-fdp1 + saa7134 + si470x + si4713 + si476x + vimc + vivid + +############################################## +Linux Digital TV driver-specific documentation +############################################## + +.. only:: html + + .. class:: toc-title + + Table of Contents + +.. toctree:: + :maxdepth: 5 + :numbered: + + intro + + cards + ci + faq + + avermedia + bt8xx + lmedm04 + opera-firmware + technisat + ttusb-dec + udev + zr364xx + +################################# +CEC driver-specific documentation +################################# + +.. only:: html + + .. class:: toc-title + + Table of Contents + +.. toctree:: + :maxdepth: 5 + :numbered: + + pulse8-cec diff --git a/Documentation/media/dvb-drivers/intro.rst b/Documentation/admin-guide/media/intro.rst similarity index 100% rename from Documentation/media/dvb-drivers/intro.rst rename to Documentation/admin-guide/media/intro.rst diff --git a/Documentation/media/v4l-drivers/ipu3.rst b/Documentation/admin-guide/media/ipu3.rst similarity index 100% rename from Documentation/media/v4l-drivers/ipu3.rst rename to Documentation/admin-guide/media/ipu3.rst diff --git a/Documentation/media/v4l-drivers/ipu3_rcb.svg b/Documentation/admin-guide/media/ipu3_rcb.svg similarity index 100% rename from Documentation/media/v4l-drivers/ipu3_rcb.svg rename to Documentation/admin-guide/media/ipu3_rcb.svg diff --git a/Documentation/media/v4l-drivers/ivtv-cardlist.rst b/Documentation/admin-guide/media/ivtv-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/ivtv-cardlist.rst rename to Documentation/admin-guide/media/ivtv-cardlist.rst diff --git a/Documentation/media/v4l-drivers/ivtv.rst b/Documentation/admin-guide/media/ivtv.rst similarity index 100% rename from Documentation/media/v4l-drivers/ivtv.rst rename to Documentation/admin-guide/media/ivtv.rst diff --git a/Documentation/media/dvb-drivers/lmedm04.rst b/Documentation/admin-guide/media/lmedm04.rst similarity index 100% rename from Documentation/media/dvb-drivers/lmedm04.rst rename to Documentation/admin-guide/media/lmedm04.rst diff --git a/Documentation/media/v4l-drivers/meye.rst b/Documentation/admin-guide/media/meye.rst similarity index 100% rename from Documentation/media/v4l-drivers/meye.rst rename to Documentation/admin-guide/media/meye.rst diff --git a/Documentation/media/v4l-drivers/omap3isp.rst b/Documentation/admin-guide/media/omap3isp.rst similarity index 100% rename from Documentation/media/v4l-drivers/omap3isp.rst rename to Documentation/admin-guide/media/omap3isp.rst diff --git a/Documentation/media/v4l-drivers/omap4_camera.rst b/Documentation/admin-guide/media/omap4_camera.rst similarity index 100% rename from Documentation/media/v4l-drivers/omap4_camera.rst rename to Documentation/admin-guide/media/omap4_camera.rst diff --git a/Documentation/media/dvb-drivers/opera-firmware.rst b/Documentation/admin-guide/media/opera-firmware.rst similarity index 100% rename from Documentation/media/dvb-drivers/opera-firmware.rst rename to Documentation/admin-guide/media/opera-firmware.rst diff --git a/Documentation/media/v4l-drivers/philips.rst b/Documentation/admin-guide/media/philips.rst similarity index 100% rename from Documentation/media/v4l-drivers/philips.rst rename to Documentation/admin-guide/media/philips.rst diff --git a/Documentation/media/cec-drivers/pulse8-cec.rst b/Documentation/admin-guide/media/pulse8-cec.rst similarity index 100% rename from Documentation/media/cec-drivers/pulse8-cec.rst rename to Documentation/admin-guide/media/pulse8-cec.rst diff --git a/Documentation/media/v4l-drivers/qcom_camss.rst b/Documentation/admin-guide/media/qcom_camss.rst similarity index 100% rename from Documentation/media/v4l-drivers/qcom_camss.rst rename to Documentation/admin-guide/media/qcom_camss.rst diff --git a/Documentation/media/v4l-drivers/qcom_camss_8x96_graph.dot b/Documentation/admin-guide/media/qcom_camss_8x96_graph.dot similarity index 100% rename from Documentation/media/v4l-drivers/qcom_camss_8x96_graph.dot rename to Documentation/admin-guide/media/qcom_camss_8x96_graph.dot diff --git a/Documentation/media/v4l-drivers/qcom_camss_graph.dot b/Documentation/admin-guide/media/qcom_camss_graph.dot similarity index 100% rename from Documentation/media/v4l-drivers/qcom_camss_graph.dot rename to Documentation/admin-guide/media/qcom_camss_graph.dot diff --git a/Documentation/media/v4l-drivers/rcar-fdp1.rst b/Documentation/admin-guide/media/rcar-fdp1.rst similarity index 100% rename from Documentation/media/v4l-drivers/rcar-fdp1.rst rename to Documentation/admin-guide/media/rcar-fdp1.rst diff --git a/Documentation/media/v4l-drivers/saa7134-cardlist.rst b/Documentation/admin-guide/media/saa7134-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/saa7134-cardlist.rst rename to Documentation/admin-guide/media/saa7134-cardlist.rst diff --git a/Documentation/media/v4l-drivers/saa7134.rst b/Documentation/admin-guide/media/saa7134.rst similarity index 100% rename from Documentation/media/v4l-drivers/saa7134.rst rename to Documentation/admin-guide/media/saa7134.rst diff --git a/Documentation/media/v4l-drivers/saa7164-cardlist.rst b/Documentation/admin-guide/media/saa7164-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/saa7164-cardlist.rst rename to Documentation/admin-guide/media/saa7164-cardlist.rst diff --git a/Documentation/media/v4l-drivers/si470x.rst b/Documentation/admin-guide/media/si470x.rst similarity index 100% rename from Documentation/media/v4l-drivers/si470x.rst rename to Documentation/admin-guide/media/si470x.rst diff --git a/Documentation/media/v4l-drivers/si4713.rst b/Documentation/admin-guide/media/si4713.rst similarity index 100% rename from Documentation/media/v4l-drivers/si4713.rst rename to Documentation/admin-guide/media/si4713.rst diff --git a/Documentation/media/v4l-drivers/si476x.rst b/Documentation/admin-guide/media/si476x.rst similarity index 100% rename from Documentation/media/v4l-drivers/si476x.rst rename to Documentation/admin-guide/media/si476x.rst diff --git a/Documentation/media/dvb-drivers/technisat.rst b/Documentation/admin-guide/media/technisat.rst similarity index 100% rename from Documentation/media/dvb-drivers/technisat.rst rename to Documentation/admin-guide/media/technisat.rst diff --git a/Documentation/media/v4l-drivers/tm6000-cardlist.rst b/Documentation/admin-guide/media/tm6000-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/tm6000-cardlist.rst rename to Documentation/admin-guide/media/tm6000-cardlist.rst diff --git a/Documentation/media/dvb-drivers/ttusb-dec.rst b/Documentation/admin-guide/media/ttusb-dec.rst similarity index 100% rename from Documentation/media/dvb-drivers/ttusb-dec.rst rename to Documentation/admin-guide/media/ttusb-dec.rst diff --git a/Documentation/media/v4l-drivers/tuner-cardlist.rst b/Documentation/admin-guide/media/tuner-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/tuner-cardlist.rst rename to Documentation/admin-guide/media/tuner-cardlist.rst diff --git a/Documentation/media/dvb-drivers/udev.rst b/Documentation/admin-guide/media/udev.rst similarity index 100% rename from Documentation/media/dvb-drivers/udev.rst rename to Documentation/admin-guide/media/udev.rst diff --git a/Documentation/media/v4l-drivers/usbvision-cardlist.rst b/Documentation/admin-guide/media/usbvision-cardlist.rst similarity index 100% rename from Documentation/media/v4l-drivers/usbvision-cardlist.rst rename to Documentation/admin-guide/media/usbvision-cardlist.rst diff --git a/Documentation/media/v4l-drivers/v4l-with-ir.rst b/Documentation/admin-guide/media/v4l-with-ir.rst similarity index 100% rename from Documentation/media/v4l-drivers/v4l-with-ir.rst rename to Documentation/admin-guide/media/v4l-with-ir.rst diff --git a/Documentation/media/v4l-drivers/vimc.dot b/Documentation/admin-guide/media/vimc.dot similarity index 100% rename from Documentation/media/v4l-drivers/vimc.dot rename to Documentation/admin-guide/media/vimc.dot diff --git a/Documentation/media/v4l-drivers/vimc.rst b/Documentation/admin-guide/media/vimc.rst similarity index 100% rename from Documentation/media/v4l-drivers/vimc.rst rename to Documentation/admin-guide/media/vimc.rst diff --git a/Documentation/media/v4l-drivers/vivid.rst b/Documentation/admin-guide/media/vivid.rst similarity index 100% rename from Documentation/media/v4l-drivers/vivid.rst rename to Documentation/admin-guide/media/vivid.rst diff --git a/Documentation/media/v4l-drivers/zr364xx.rst b/Documentation/admin-guide/media/zr364xx.rst similarity index 100% rename from Documentation/media/v4l-drivers/zr364xx.rst rename to Documentation/admin-guide/media/zr364xx.rst diff --git a/Documentation/media/cec-drivers/index.rst b/Documentation/media/cec-drivers/index.rst deleted file mode 100644 index 2b7fcaa4311b0..0000000000000 --- a/Documentation/media/cec-drivers/index.rst +++ /dev/null @@ -1,34 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -.. include:: - -.. _cec-drivers: - -################################# -CEC driver-specific documentation -################################# - -**Copyright** |copy| 2017 : LinuxTV Developers - -This documentation is free software; you can redistribute it and/or modify it -under the terms of the GNU General Public License as published by the Free -Software Foundation version 2 of the License. - -This program is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. - -For more details see the file COPYING in the source distribution of Linux. - -.. only:: html - - .. class:: toc-title - - Table of Contents - -.. toctree:: - :maxdepth: 5 - :numbered: - - pulse8-cec diff --git a/Documentation/media/dvb-drivers/index.rst b/Documentation/media/dvb-drivers/index.rst index 9d3fce544f852..7a870ee7ac7df 100644 --- a/Documentation/media/dvb-drivers/index.rst +++ b/Documentation/media/dvb-drivers/index.rst @@ -29,17 +29,6 @@ For more details see the file COPYING in the source distribution of Linux. :maxdepth: 5 :numbered: - intro - avermedia - bt8xx - cards - ci dvb-usb - faq - lmedm04 - opera-firmware - technisat - ttusb-dec - udev frontends contributors diff --git a/Documentation/media/index.rst b/Documentation/media/index.rst index 308f6a396d1cf..0f75280b8c43c 100644 --- a/Documentation/media/index.rst +++ b/Documentation/media/index.rst @@ -14,9 +14,9 @@ Linux Media Subsystem Documentation ../userspace-api/media/index ../driver-api/media/index - dvb-drivers/index + v4l-drivers/index - cec-drivers/index + dvb-drivers/index .. only:: html and subproject diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index 8962a86dad70e..aef375cfb05a8 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -31,38 +31,13 @@ For more details see the file COPYING in the source distribution of Linux. :maxdepth: 5 :numbered: - v4l-with-ir tuners - cardlist - bttv - cafe_ccic - cpia2 - cx88 - davinci-vpbe - fimc - imx - imx7 - ipu3 - ivtv max2175 - meye - omap3isp - omap4_camera - philips pvrusb2 pxa_camera - qcom_camss radiotrack - rcar-fdp1 - saa7134 sh_mobile_ceu_camera - si470x - si4713 - si476x uvcvideo - vimc - vivid - zr364xx bttv-devel cpia2_devel diff --git a/Documentation/translations/zh_CN/video4linux/omap3isp.txt b/Documentation/translations/zh_CN/video4linux/omap3isp.txt index e9f29375aa952..75e481985630a 100644 --- a/Documentation/translations/zh_CN/video4linux/omap3isp.txt +++ b/Documentation/translations/zh_CN/video4linux/omap3isp.txt @@ -1,4 +1,4 @@ -Chinese translated version of Documentation/media/v4l-drivers/omap3isp.rst +Chinese translated version of Documentation/admin-guide/media/omap3isp.rst If you have any comment or update to the content, please contact the original document maintainer directly. However, if you have a problem @@ -11,7 +11,7 @@ Maintainer: Laurent Pinchart David Cohen Chinese maintainer: Fu Wei --------------------------------------------------------------------- -Documentation/media/v4l-drivers/omap3isp.rst 的中文翻译 +Documentation/admin-guide/media/omap3isp.rst 的中文翻译 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻 diff --git a/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst index 0767299e91052..751c6590e7746 100644 --- a/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst +++ b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst @@ -438,7 +438,7 @@ MPEG stream. *Historical context*: This format specification originates from a custom, embedded, sliced VBI data format used by the ``ivtv`` driver. This format has already been informally specified in the kernel sources -in the file ``Documentation/media/v4l-drivers/cx2341x.rst`` . The +in the file ``Documentation/media/v4l-drivers/cx2341x-uapi.rst`` . The maximum size of the payload and other aspects of this format are driven by the CX23415 MPEG decoder's capabilities and limitations with respect to extracting, decoding, and displaying sliced VBI data embedded within diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index f64f6fc4fd75a..f81016c97a0d3 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -116,7 +116,7 @@ enum v4l2_mpeg_stream_vbi_fmt - * - ``V4L2_MPEG_STREAM_VBI_FMT_IVTV`` - VBI in private packets, IVTV format (documented in the kernel sources in the file - ``Documentation/media/v4l-drivers/cx2341x.rst``) + ``Documentation/media/v4l-drivers/cx2341x-uapi.rst``) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst index e47103aa32ed3..bb9d484c25e48 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-image-process.rst @@ -53,7 +53,7 @@ Image Process Control IDs ``V4L2_CID_DEINTERLACING_MODE (menu)`` The video deinterlacing mode (such as Bob, Weave, ...). The menu items are - driver specific and are documented in :ref:`v4l-drivers`. + driver specific and are documented in :ref:`uapi-v4l-drivers`. ``V4L2_CID_DIGITAL_GAIN (integer)`` Digital gain is the value by which all colour components diff --git a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst index 8ef90b0df864d..dbdcf6c9f0729 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst @@ -58,7 +58,7 @@ please make a proposal on the linux-media mailing list. - YUV 4:2:0 format used by the IVTV driver. The format is documented in the kernel sources in the file - ``Documentation/media/v4l-drivers/cx2341x.rst`` + ``Documentation/media/v4l-drivers/cx2341x-uapi.rst`` * .. _V4L2-PIX-FMT-CPIA1: - ``V4L2_PIX_FMT_CPIA1`` diff --git a/MAINTAINERS b/MAINTAINERS index 5262a05ff0d1b..abe6a64183fa1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3758,7 +3758,7 @@ M: Jonathan Corbet L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/cafe_ccic* +F: Documentation/admin-guide/media/cafe_ccic* F: drivers/media/platform/marvell-ccic/ CAIF NETWORK LAYER @@ -6234,7 +6234,7 @@ L: linux-media@vger.kernel.org S: Maintained W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/em28xx* +F: Documentation/admin-guide/media/em28xx* F: drivers/media/usb/em28xx/ EMBEDDED LINUX @@ -8651,8 +8651,8 @@ M: Sakari Ailus L: linux-media@vger.kernel.org S: Maintained F: Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst -F: Documentation/media/v4l-drivers/ipu3.rst -F: Documentation/media/v4l-drivers/ipu3_rcb.svg +F: Documentation/admin-guide/media/ipu3.rst +F: Documentation/admin-guide/media/ipu3_rcb.svg F: drivers/staging/media/ipu3/ INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT @@ -9076,7 +9076,7 @@ L: linux-media@vger.kernel.org S: Maintained W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/ivtv* +F: Documentation/admin-guide/media/ivtv* F: drivers/media/pci/ivtv/ F: include/uapi/linux/ivtv* @@ -10450,7 +10450,7 @@ L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/imx.txt -F: Documentation/media/v4l-drivers/imx.rst +F: Documentation/admin-guide/media/imx.rst F: drivers/staging/media/imx/ F: include/linux/imx-media.h F: include/media/imx.h @@ -10462,7 +10462,7 @@ S: Maintained T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/imx7-csi.txt F: Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt -F: Documentation/media/v4l-drivers/imx7.rst +F: Documentation/admin-guide/media/imx7.rst F: drivers/staging/media/imx/imx7-media-csi.c F: drivers/staging/media/imx/imx7-mipi-csis.c @@ -13701,7 +13701,7 @@ M: Hans Verkuil L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git -F: Documentation/media/cec-drivers/pulse8-cec.rst +F: Documentation/admin-guide/media/pulse8-cec.rst F: drivers/media/usb/pulse8-cec/* PVRUSB2 VIDEO4LINUX DRIVER @@ -13958,7 +13958,7 @@ M: Todor Tomov L: linux-media@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/media/qcom,camss.txt -F: Documentation/media/v4l-drivers/qcom_camss.rst +F: Documentation/admin-guide/media/qcom_camss.rst F: drivers/media/platform/qcom/camss/ QUALCOMM CORE POWER REDUCTION (CPR) AVS DRIVER @@ -16972,7 +16972,7 @@ L: linux-media@vger.kernel.org S: Odd fixes W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/tm6000* +F: Documentation/admin-guide/media/tm6000* F: drivers/media/usb/tm6000/ TMIO/SDHI MMC DRIVER @@ -17653,7 +17653,7 @@ L: linux-media@vger.kernel.org S: Maintained W: http://royale.zerezo.com/zr364xx/ T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/zr364xx* +F: Documentation/admin-guide/media/zr364xx* F: drivers/media/usb/zr364xx/ USER-MODE LINUX (UML) diff --git a/drivers/media/pci/bt8xx/Kconfig b/drivers/media/pci/bt8xx/Kconfig index c79c6175c2627..30714c7319aca 100644 --- a/drivers/media/pci/bt8xx/Kconfig +++ b/drivers/media/pci/bt8xx/Kconfig @@ -16,7 +16,7 @@ config VIDEO_BT848 help Support for BT848 based frame grabber/overlay boards. This includes the Miro, Hauppauge and STB boards. Please read the material in - for more information. + for more information. To compile this driver as a module, choose M here: the module will be called bttv. diff --git a/drivers/media/pci/meye/Kconfig b/drivers/media/pci/meye/Kconfig index b37da612dd0c2..fed1f4a018177 100644 --- a/drivers/media/pci/meye/Kconfig +++ b/drivers/media/pci/meye/Kconfig @@ -7,7 +7,7 @@ config VIDEO_MEYE help This is the video4linux driver for the Motion Eye camera found in the Vaio Picturebook laptops. Please read the material in - for more information. + for more information. If you say Y or M here, you need to say Y or M to "Sony Laptop Extras" in the misc device section. diff --git a/drivers/media/radio/si470x/Kconfig b/drivers/media/radio/si470x/Kconfig index a1ba8bc54b62f..7161bd6cd13c6 100644 --- a/drivers/media/radio/si470x/Kconfig +++ b/drivers/media/radio/si470x/Kconfig @@ -30,7 +30,7 @@ config USB_SI470X Please have a look at the documentation, especially on how to redirect the audio stream from the radio to your sound device: - Documentation/media/v4l-drivers/si470x.rst + Documentation/admin-guide/media/si470x.rst Say Y here if you want to connect this type of radio to your computer's USB port. diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.c b/drivers/media/usb/dvb-usb-v2/lmedm04.c index fd8b42bb9a84b..fb8280620c58f 100644 --- a/drivers/media/usb/dvb-usb-v2/lmedm04.c +++ b/drivers/media/usb/dvb-usb-v2/lmedm04.c @@ -22,7 +22,7 @@ * * LME2510C + M88RS2000 * - * For firmware see Documentation/media/dvb-drivers/lmedm04.rst + * For firmware see Documentation/admin-guide/media/lmedm04.rst * * I2C addresses: * 0xd0 - STV0288 - Demodulator diff --git a/drivers/media/usb/gspca/Kconfig b/drivers/media/usb/gspca/Kconfig index 77a3609582397..0283e3b908e43 100644 --- a/drivers/media/usb/gspca/Kconfig +++ b/drivers/media/usb/gspca/Kconfig @@ -9,7 +9,7 @@ menuconfig USB_GSPCA Say Y here if you want to enable selecting webcams based on the GSPCA framework. - See for more info. + See for more info. This driver uses the Video For Linux API. You must say Y or M to "Video For Linux" to use this driver. diff --git a/drivers/media/usb/zr364xx/Kconfig b/drivers/media/usb/zr364xx/Kconfig index 55b06c8336679..49b4257487bb3 100644 --- a/drivers/media/usb/zr364xx/Kconfig +++ b/drivers/media/usb/zr364xx/Kconfig @@ -7,7 +7,7 @@ config USB_ZR364XX help Say Y here if you want to connect this type of camera to your computer's USB port. - See for more info + See for more info and list of supported cameras. To compile this driver as a module, choose M here: the -- GitLab From 577a7ad33aeff86f6c97277b12b122a0a2ad97d7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Mar 2020 15:54:10 +0100 Subject: [PATCH 053/503] media: docs: move driver-specific info to driver-api Those documents don't really describe the driver API. Instead, they contain development-specific information. Yet, as the main index file describes the content of it as: "how specific kernel subsystems work from the point of view of a kernel developer" It seems to be the better fit. Signed-off-by: Mauro Carvalho Chehab --- .../media/drivers}/bttv-devel.rst | 0 .../media/drivers}/contributors.rst | 0 .../media/drivers}/cpia2_devel.rst | 0 .../media/drivers}/cx2341x-devel.rst | 0 .../media/drivers}/cx88-devel.rst | 0 .../media/drivers}/davinci-vpbe-devel.rst | 0 .../media/drivers}/dvb-usb.rst | 0 .../media/drivers}/fimc-devel.rst | 0 .../media/drivers}/frontends.rst | 0 .../media/drivers}/index.rst | 29 ++++++++++++++++++- .../media/drivers}/pvrusb2.rst | 0 .../media/drivers}/pxa_camera.rst | 0 .../media/drivers}/radiotrack.rst | 0 .../media/drivers}/saa7134-devel.rst | 0 .../media/drivers}/sh_mobile_ceu_camera.rst | 0 .../media/drivers}/tuners.rst | 0 .../media/drivers}/vimc-devel.rst | 0 Documentation/driver-api/media/index.rst | 2 ++ Documentation/media/index.rst | 1 - Documentation/media/v4l-drivers/index.rst | 14 --------- MAINTAINERS | 8 ++--- drivers/media/dvb-frontends/dib3000.h | 2 +- drivers/media/dvb-frontends/dib3000mb.c | 2 +- drivers/media/dvb-frontends/eds1547.h | 2 +- drivers/media/dvb-frontends/z0194a.h | 2 +- drivers/media/pci/cx18/cx18-streams.c | 4 +-- drivers/media/platform/pxa_camera.c | 4 +-- drivers/media/radio/Kconfig | 2 +- drivers/media/usb/dvb-usb-v2/Kconfig | 2 +- drivers/media/usb/dvb-usb-v2/gl861.c | 2 +- drivers/media/usb/dvb-usb-v2/lmedm04.c | 2 +- drivers/media/usb/dvb-usb-v2/lmedm04.h | 2 +- drivers/media/usb/dvb-usb-v2/mxl111sf.c | 2 +- drivers/media/usb/dvb-usb-v2/mxl111sf.h | 2 +- drivers/media/usb/dvb-usb/Kconfig | 2 +- drivers/media/usb/dvb-usb/a800.c | 2 +- drivers/media/usb/dvb-usb/af9005-fe.c | 2 +- drivers/media/usb/dvb-usb/af9005-remote.c | 2 +- drivers/media/usb/dvb-usb/af9005.c | 2 +- drivers/media/usb/dvb-usb/af9005.h | 2 +- drivers/media/usb/dvb-usb/az6027.c | 2 +- drivers/media/usb/dvb-usb/cxusb.c | 2 +- drivers/media/usb/dvb-usb/dibusb-common.c | 2 +- drivers/media/usb/dvb-usb/dibusb-mb.c | 2 +- drivers/media/usb/dvb-usb/dibusb-mc-common.c | 2 +- drivers/media/usb/dvb-usb/dibusb-mc.c | 2 +- drivers/media/usb/dvb-usb/dibusb.h | 2 +- drivers/media/usb/dvb-usb/digitv.c | 2 +- drivers/media/usb/dvb-usb/dtt200u-fe.c | 2 +- drivers/media/usb/dvb-usb/dtt200u.c | 2 +- drivers/media/usb/dvb-usb/dtt200u.h | 2 +- drivers/media/usb/dvb-usb/dvb-usb-init.c | 2 +- drivers/media/usb/dvb-usb/dw2102.c | 2 +- drivers/media/usb/dvb-usb/gp8psk.c | 2 +- drivers/media/usb/dvb-usb/gp8psk.h | 2 +- drivers/media/usb/dvb-usb/m920x.c | 2 +- drivers/media/usb/dvb-usb/nova-t-usb2.c | 2 +- drivers/media/usb/dvb-usb/opera1.c | 2 +- drivers/media/usb/dvb-usb/ttusb2.c | 2 +- drivers/media/usb/dvb-usb/ttusb2.h | 2 +- drivers/media/usb/dvb-usb/umt-010.c | 2 +- drivers/media/usb/dvb-usb/vp702x-fe.c | 2 +- drivers/media/usb/dvb-usb/vp702x.c | 2 +- drivers/media/usb/dvb-usb/vp7045-fe.c | 2 +- drivers/media/usb/dvb-usb/vp7045.c | 2 +- drivers/media/usb/dvb-usb/vp7045.h | 2 +- 66 files changed, 81 insertions(+), 67 deletions(-) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/bttv-devel.rst (100%) rename Documentation/{media/dvb-drivers => driver-api/media/drivers}/contributors.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/cpia2_devel.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/cx2341x-devel.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/cx88-devel.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/davinci-vpbe-devel.rst (100%) rename Documentation/{media/dvb-drivers => driver-api/media/drivers}/dvb-usb.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/fimc-devel.rst (100%) rename Documentation/{media/dvb-drivers => driver-api/media/drivers}/frontends.rst (100%) rename Documentation/{media/dvb-drivers => driver-api/media/drivers}/index.rst (67%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/pvrusb2.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/pxa_camera.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/radiotrack.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/saa7134-devel.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/sh_mobile_ceu_camera.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/tuners.rst (100%) rename Documentation/{media/v4l-drivers => driver-api/media/drivers}/vimc-devel.rst (100%) diff --git a/Documentation/media/v4l-drivers/bttv-devel.rst b/Documentation/driver-api/media/drivers/bttv-devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/bttv-devel.rst rename to Documentation/driver-api/media/drivers/bttv-devel.rst diff --git a/Documentation/media/dvb-drivers/contributors.rst b/Documentation/driver-api/media/drivers/contributors.rst similarity index 100% rename from Documentation/media/dvb-drivers/contributors.rst rename to Documentation/driver-api/media/drivers/contributors.rst diff --git a/Documentation/media/v4l-drivers/cpia2_devel.rst b/Documentation/driver-api/media/drivers/cpia2_devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/cpia2_devel.rst rename to Documentation/driver-api/media/drivers/cpia2_devel.rst diff --git a/Documentation/media/v4l-drivers/cx2341x-devel.rst b/Documentation/driver-api/media/drivers/cx2341x-devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/cx2341x-devel.rst rename to Documentation/driver-api/media/drivers/cx2341x-devel.rst diff --git a/Documentation/media/v4l-drivers/cx88-devel.rst b/Documentation/driver-api/media/drivers/cx88-devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/cx88-devel.rst rename to Documentation/driver-api/media/drivers/cx88-devel.rst diff --git a/Documentation/media/v4l-drivers/davinci-vpbe-devel.rst b/Documentation/driver-api/media/drivers/davinci-vpbe-devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/davinci-vpbe-devel.rst rename to Documentation/driver-api/media/drivers/davinci-vpbe-devel.rst diff --git a/Documentation/media/dvb-drivers/dvb-usb.rst b/Documentation/driver-api/media/drivers/dvb-usb.rst similarity index 100% rename from Documentation/media/dvb-drivers/dvb-usb.rst rename to Documentation/driver-api/media/drivers/dvb-usb.rst diff --git a/Documentation/media/v4l-drivers/fimc-devel.rst b/Documentation/driver-api/media/drivers/fimc-devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/fimc-devel.rst rename to Documentation/driver-api/media/drivers/fimc-devel.rst diff --git a/Documentation/media/dvb-drivers/frontends.rst b/Documentation/driver-api/media/drivers/frontends.rst similarity index 100% rename from Documentation/media/dvb-drivers/frontends.rst rename to Documentation/driver-api/media/drivers/frontends.rst diff --git a/Documentation/media/dvb-drivers/index.rst b/Documentation/driver-api/media/drivers/index.rst similarity index 67% rename from Documentation/media/dvb-drivers/index.rst rename to Documentation/driver-api/media/drivers/index.rst index 7a870ee7ac7df..aafff51f7e0eb 100644 --- a/Documentation/media/dvb-drivers/index.rst +++ b/Documentation/driver-api/media/drivers/index.rst @@ -2,6 +2,34 @@ .. include:: +################################################ +Video4Linux (V4L) driver-specific documentation +################################################ + +.. only:: html + + .. class:: toc-title + + Table of Contents + +.. toctree:: + :maxdepth: 5 + + bttv-devel + cpia2_devel + cx2341x-devel + cx88-devel + davinci-vpbe-devel + fimc-devel + pvrusb2 + pxa_camera + radiotrack + saa7134-devel + sh_mobile_ceu_camera + tuners + vimc-devel + + ############################################## Linux Digital TV driver-specific documentation ############################################## @@ -27,7 +55,6 @@ For more details see the file COPYING in the source distribution of Linux. .. toctree:: :maxdepth: 5 - :numbered: dvb-usb frontends diff --git a/Documentation/media/v4l-drivers/pvrusb2.rst b/Documentation/driver-api/media/drivers/pvrusb2.rst similarity index 100% rename from Documentation/media/v4l-drivers/pvrusb2.rst rename to Documentation/driver-api/media/drivers/pvrusb2.rst diff --git a/Documentation/media/v4l-drivers/pxa_camera.rst b/Documentation/driver-api/media/drivers/pxa_camera.rst similarity index 100% rename from Documentation/media/v4l-drivers/pxa_camera.rst rename to Documentation/driver-api/media/drivers/pxa_camera.rst diff --git a/Documentation/media/v4l-drivers/radiotrack.rst b/Documentation/driver-api/media/drivers/radiotrack.rst similarity index 100% rename from Documentation/media/v4l-drivers/radiotrack.rst rename to Documentation/driver-api/media/drivers/radiotrack.rst diff --git a/Documentation/media/v4l-drivers/saa7134-devel.rst b/Documentation/driver-api/media/drivers/saa7134-devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/saa7134-devel.rst rename to Documentation/driver-api/media/drivers/saa7134-devel.rst diff --git a/Documentation/media/v4l-drivers/sh_mobile_ceu_camera.rst b/Documentation/driver-api/media/drivers/sh_mobile_ceu_camera.rst similarity index 100% rename from Documentation/media/v4l-drivers/sh_mobile_ceu_camera.rst rename to Documentation/driver-api/media/drivers/sh_mobile_ceu_camera.rst diff --git a/Documentation/media/v4l-drivers/tuners.rst b/Documentation/driver-api/media/drivers/tuners.rst similarity index 100% rename from Documentation/media/v4l-drivers/tuners.rst rename to Documentation/driver-api/media/drivers/tuners.rst diff --git a/Documentation/media/v4l-drivers/vimc-devel.rst b/Documentation/driver-api/media/drivers/vimc-devel.rst similarity index 100% rename from Documentation/media/v4l-drivers/vimc-devel.rst rename to Documentation/driver-api/media/drivers/vimc-devel.rst diff --git a/Documentation/driver-api/media/index.rst b/Documentation/driver-api/media/index.rst index d2842f300bbd2..57383df79bd36 100644 --- a/Documentation/driver-api/media/index.rst +++ b/Documentation/driver-api/media/index.rst @@ -36,3 +36,5 @@ For more details see the file COPYING in the source distribution of Linux. mc-core cec-core csi2 + + drivers/index diff --git a/Documentation/media/index.rst b/Documentation/media/index.rst index 0f75280b8c43c..a5cd600e0b049 100644 --- a/Documentation/media/index.rst +++ b/Documentation/media/index.rst @@ -16,7 +16,6 @@ Linux Media Subsystem Documentation ../driver-api/media/index v4l-drivers/index - dvb-drivers/index .. only:: html and subproject diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/media/v4l-drivers/index.rst index aef375cfb05a8..ee7faff88a33c 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/media/v4l-drivers/index.rst @@ -31,23 +31,9 @@ For more details see the file COPYING in the source distribution of Linux. :maxdepth: 5 :numbered: - tuners max2175 - pvrusb2 - pxa_camera - radiotrack - sh_mobile_ceu_camera uvcvideo - bttv-devel - cpia2_devel - cx2341x-devel - cx88-devel - davinci-vpbe-devel - fimc-devel - saa7134-devel - vimc-devel - cx2341x-uapi imx-uapi meye-uapi diff --git a/MAINTAINERS b/MAINTAINERS index abe6a64183fa1..e0a0a3fbfe212 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3667,7 +3667,7 @@ L: linux-media@vger.kernel.org S: Odd fixes W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/bttv* +F: Documentation/driver-api/media/drivers/bttv* F: drivers/media/pci/bt8xx/bttv* BUS FREQUENCY DRIVER FOR SAMSUNG EXYNOS @@ -4539,7 +4539,7 @@ L: linux-media@vger.kernel.org S: Odd fixes W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/cx88* +F: Documentation/driver-api/media/drivers/cx88* F: drivers/media/pci/cx88/ CXD2820R MEDIA DRIVER @@ -13711,7 +13711,7 @@ L: linux-media@vger.kernel.org S: Maintained W: http://www.isely.net/pvrusb2/ T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/pvrusb2* +F: Documentation/driver-api/media/drivers/pvrusb2* F: drivers/media/usb/pvrusb2/ PWC WEBCAM DRIVER @@ -14720,7 +14720,7 @@ L: linux-media@vger.kernel.org S: Odd fixes W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: Documentation/media/v4l-drivers/saa7134* +F: Documentation/driver-api/media/drivers/saa7134* F: drivers/media/pci/saa7134/ SAA7146 VIDEO4LINUX-2 DRIVER diff --git a/drivers/media/dvb-frontends/dib3000.h b/drivers/media/dvb-frontends/dib3000.h index 9118a7a48ef2b..3f129efa21de6 100644 --- a/drivers/media/dvb-frontends/dib3000.h +++ b/drivers/media/dvb-frontends/dib3000.h @@ -14,7 +14,7 @@ * Amaury Demol from DiBcom for providing specs and driver * sources, on which this driver (and the dvb-dibusb) are based. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef DIB3000_H diff --git a/drivers/media/dvb-frontends/dib3000mb.c b/drivers/media/dvb-frontends/dib3000mb.c index 46ed0e20c8fa7..0f0480d8576d7 100644 --- a/drivers/media/dvb-frontends/dib3000mb.c +++ b/drivers/media/dvb-frontends/dib3000mb.c @@ -14,7 +14,7 @@ * Amaury Demol from DiBcom for providing specs and driver * sources, on which this driver (and the dvb-dibusb) are based. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt diff --git a/drivers/media/dvb-frontends/eds1547.h b/drivers/media/dvb-frontends/eds1547.h index 907254b857083..bb85a6e27076a 100644 --- a/drivers/media/dvb-frontends/eds1547.h +++ b/drivers/media/dvb-frontends/eds1547.h @@ -3,7 +3,7 @@ * * Copyright (C) 2008 Igor M. Liplianin (liplianin@me.by) * -* see Documentation/media/dvb-drivers/dvb-usb.rst for more information +* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef EDS1547 diff --git a/drivers/media/dvb-frontends/z0194a.h b/drivers/media/dvb-frontends/z0194a.h index 21442905d1161..3446ccbf3c1cc 100644 --- a/drivers/media/dvb-frontends/z0194a.h +++ b/drivers/media/dvb-frontends/z0194a.h @@ -3,7 +3,7 @@ * * Copyright (C) 2008 Igor M. Liplianin (liplianin@me.by) * -* see Documentation/media/dvb-drivers/dvb-usb.rst for more information +* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef Z0194A diff --git a/drivers/media/pci/cx18/cx18-streams.c b/drivers/media/pci/cx18/cx18-streams.c index 0e2365c9f4ad9..c41bae118415d 100644 --- a/drivers/media/pci/cx18/cx18-streams.c +++ b/drivers/media/pci/cx18/cx18-streams.c @@ -845,7 +845,7 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s) /* * Audio related reset according to - * Documentation/media/v4l-drivers/cx2341x-devel.rst + * Documentation/driver-api/media/drivers/cx2341x-devel.rst */ if (atomic_read(&cx->ana_capturing) == 0) cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, @@ -853,7 +853,7 @@ int cx18_start_v4l2_encode_stream(struct cx18_stream *s) /* * Number of lines for Field 1 & Field 2 according to - * Documentation/media/v4l-drivers/cx2341x-devel.rst + * Documentation/driver-api/media/drivers/cx2341x-devel.rst * Field 1 is 312 for 625 line systems in BT.656 * Field 2 is 313 for 625 line systems in BT.656 */ diff --git a/drivers/media/platform/pxa_camera.c b/drivers/media/platform/pxa_camera.c index 70c85a2a10f51..3c5fe737d36f7 100644 --- a/drivers/media/platform/pxa_camera.c +++ b/drivers/media/platform/pxa_camera.c @@ -1016,7 +1016,7 @@ static void pxa_camera_wakeup(struct pxa_camera_dev *pcdev, * - a videobuffer is queued on the pcdev->capture list * * Please check the "DMA hot chaining timeslice issue" in - * Documentation/media/v4l-drivers/pxa_camera.rst + * Documentation/driver-api/media/drivers/pxa_camera.rst * * Context: should only be called within the dma irq handler */ @@ -1438,7 +1438,7 @@ static void pxac_vb2_queue(struct vb2_buffer *vb) /* * Please check the DMA prepared buffer structure in : - * Documentation/media/v4l-drivers/pxa_camera.rst + * Documentation/driver-api/media/drivers/pxa_camera.rst * Please check also in pxa_camera_check_link_miss() to understand why DMA chain * modification while DMA chain is running will work anyway. */ diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig index f4df16df19d9f..d29e29645e04a 100644 --- a/drivers/media/radio/Kconfig +++ b/drivers/media/radio/Kconfig @@ -272,7 +272,7 @@ config RADIO_RTRACK been reported to be used by these cards. More information is contained in the file - . + . To compile this driver as a module, choose M here: the module will be called radio-aimslab. diff --git a/drivers/media/usb/dvb-usb-v2/Kconfig b/drivers/media/usb/dvb-usb-v2/Kconfig index b21a4d4138720..ff0ae64424c43 100644 --- a/drivers/media/usb/dvb-usb-v2/Kconfig +++ b/drivers/media/usb/dvb-usb-v2/Kconfig @@ -7,7 +7,7 @@ config DVB_USB_V2 USB1.1 and USB2.0 DVB devices. Almost every USB device needs a firmware, please look into - . + . For a complete list of supported USB devices see the LinuxTV DVB Wiki: diff --git a/drivers/media/usb/dvb-usb-v2/gl861.c b/drivers/media/usb/dvb-usb-v2/gl861.c index 19217dcf20f10..42c3b8af0774a 100644 --- a/drivers/media/usb/dvb-usb-v2/gl861.c +++ b/drivers/media/usb/dvb-usb-v2/gl861.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* DVB USB compliant linux driver for GL861 USB2.0 devices. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.c b/drivers/media/usb/dvb-usb-v2/lmedm04.c index fb8280620c58f..8a3c0eeed9596 100644 --- a/drivers/media/usb/dvb-usb-v2/lmedm04.c +++ b/drivers/media/usb/dvb-usb-v2/lmedm04.c @@ -39,7 +39,7 @@ * Copyright (C) 2010 Malcolm Priestley (tvboxspy@gmail.com) * LME2510(C)(C) Leaguerme (Shenzhen) MicroElectronics Co., Ltd. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information * * Known Issues : * LME2510: Non Intel USB chipsets fail to maintain High Speed on diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.h b/drivers/media/usb/dvb-usb-v2/lmedm04.h index 766a8348624da..4335b6ebcc1c0 100644 --- a/drivers/media/usb/dvb-usb-v2/lmedm04.h +++ b/drivers/media/usb/dvb-usb-v2/lmedm04.h @@ -14,7 +14,7 @@ * MVB0001F (LME2510C+LGTDQT-P001F) * * * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_LME2510_H_ #define _DVB_USB_LME2510_H_ diff --git a/drivers/media/usb/dvb-usb-v2/mxl111sf.c b/drivers/media/usb/dvb-usb-v2/mxl111sf.c index 55b4ae7037a4e..7865fa0a82957 100644 --- a/drivers/media/usb/dvb-usb-v2/mxl111sf.c +++ b/drivers/media/usb/dvb-usb-v2/mxl111sf.c @@ -2,7 +2,7 @@ /* * Copyright (C) 2010-2014 Michael Krufky (mkrufky@linuxtv.org) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include diff --git a/drivers/media/usb/dvb-usb-v2/mxl111sf.h b/drivers/media/usb/dvb-usb-v2/mxl111sf.h index 70bd2a2a8ec10..e57e5d2353b40 100644 --- a/drivers/media/usb/dvb-usb-v2/mxl111sf.h +++ b/drivers/media/usb/dvb-usb-v2/mxl111sf.h @@ -2,7 +2,7 @@ /* * Copyright (C) 2010-2014 Michael Krufky (mkrufky@linuxtv.org) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_MXL111SF_H_ diff --git a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig index 42334a02cdced..15d29c91662f3 100644 --- a/drivers/media/usb/dvb-usb/Kconfig +++ b/drivers/media/usb/dvb-usb/Kconfig @@ -8,7 +8,7 @@ config DVB_USB USB1.1 and USB2.0 DVB devices. Almost every USB device needs a firmware, please look into - . + . For a complete list of supported USB devices see the LinuxTV DVB Wiki: diff --git a/drivers/media/usb/dvb-usb/a800.c b/drivers/media/usb/dvb-usb/a800.c index 666213f5d5d80..15bbefe3bc005 100644 --- a/drivers/media/usb/dvb-usb/a800.c +++ b/drivers/media/usb/dvb-usb/a800.c @@ -8,7 +8,7 @@ * - AVerMedia who kindly provided information and * - Glen Harris who suffered from my mistakes during development. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dibusb.h" diff --git a/drivers/media/usb/dvb-usb/af9005-fe.c b/drivers/media/usb/dvb-usb/af9005-fe.c index 6c960f723457e..9d6fa0556d7b5 100644 --- a/drivers/media/usb/dvb-usb/af9005-fe.c +++ b/drivers/media/usb/dvb-usb/af9005-fe.c @@ -6,7 +6,7 @@ * * Thanks to Afatech who kindly provided information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "af9005.h" #include "af9005-script.h" diff --git a/drivers/media/usb/dvb-usb/af9005-remote.c b/drivers/media/usb/dvb-usb/af9005-remote.c index c664353f39112..41d48b3c8d057 100644 --- a/drivers/media/usb/dvb-usb/af9005-remote.c +++ b/drivers/media/usb/dvb-usb/af9005-remote.c @@ -8,7 +8,7 @@ * * Thanks to Afatech who kindly provided information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "af9005.h" /* debug */ diff --git a/drivers/media/usb/dvb-usb/af9005.c b/drivers/media/usb/dvb-usb/af9005.c index 89b4b5d84cdff..3446bcac8ed13 100644 --- a/drivers/media/usb/dvb-usb/af9005.c +++ b/drivers/media/usb/dvb-usb/af9005.c @@ -6,7 +6,7 @@ * * Thanks to Afatech who kindly provided information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "af9005.h" diff --git a/drivers/media/usb/dvb-usb/af9005.h b/drivers/media/usb/dvb-usb/af9005.h index 3179a7c71e8f3..11d74dc26d83c 100644 --- a/drivers/media/usb/dvb-usb/af9005.h +++ b/drivers/media/usb/dvb-usb/af9005.h @@ -6,7 +6,7 @@ * * Thanks to Afatech who kindly provided information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_AF9005_H_ #define _DVB_USB_AF9005_H_ diff --git a/drivers/media/usb/dvb-usb/az6027.c b/drivers/media/usb/dvb-usb/az6027.c index 8de18da0c4bd1..d5be540e31a7d 100644 --- a/drivers/media/usb/dvb-usb/az6027.c +++ b/drivers/media/usb/dvb-usb/az6027.c @@ -4,7 +4,7 @@ * * Copyright (C) 2009 Adams.Xu * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "az6027.h" diff --git a/drivers/media/usb/dvb-usb/cxusb.c b/drivers/media/usb/dvb-usb/cxusb.c index c421b603be446..fd058f71ce492 100644 --- a/drivers/media/usb/dvb-usb/cxusb.c +++ b/drivers/media/usb/dvb-usb/cxusb.c @@ -18,7 +18,7 @@ * Copyright (C) 2006, 2007 Chris Pascoe (c.pascoe@itee.uq.edu.au) * Copyright (C) 2011, 2017 Maciej S. Szmigiero (mail@maciej.szmigiero.name) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include #include diff --git a/drivers/media/usb/dvb-usb/dibusb-common.c b/drivers/media/usb/dvb-usb/dibusb-common.c index 59ce2dec11e98..02b51d1a1b67c 100644 --- a/drivers/media/usb/dvb-usb/dibusb-common.c +++ b/drivers/media/usb/dvb-usb/dibusb-common.c @@ -3,7 +3,7 @@ * * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dibusb.h" diff --git a/drivers/media/usb/dvb-usb/dibusb-mb.c b/drivers/media/usb/dvb-usb/dibusb-mb.c index d4ea72bf09c58..f462c918d5a44 100644 --- a/drivers/media/usb/dvb-usb/dibusb-mb.c +++ b/drivers/media/usb/dvb-usb/dibusb-mb.c @@ -7,7 +7,7 @@ * based on GPL code from DiBcom, which has * Copyright (C) 2004 Amaury Demol for DiBcom * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dibusb.h" diff --git a/drivers/media/usb/dvb-usb/dibusb-mc-common.c b/drivers/media/usb/dvb-usb/dibusb-mc-common.c index 967027e29c178..b8cde4cded33f 100644 --- a/drivers/media/usb/dvb-usb/dibusb-mc-common.c +++ b/drivers/media/usb/dvb-usb/dibusb-mc-common.c @@ -3,7 +3,7 @@ * * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dibusb.h" diff --git a/drivers/media/usb/dvb-usb/dibusb-mc.c b/drivers/media/usb/dvb-usb/dibusb-mc.c index ada3bee296c23..e2689977c8c8a 100644 --- a/drivers/media/usb/dvb-usb/dibusb-mc.c +++ b/drivers/media/usb/dvb-usb/dibusb-mc.c @@ -7,7 +7,7 @@ * based on GPL code from DiBcom, which has * Copyright (C) 2004 Amaury Demol for DiBcom * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dibusb.h" diff --git a/drivers/media/usb/dvb-usb/dibusb.h b/drivers/media/usb/dvb-usb/dibusb.h index a83326c36ca7d..f61de07448211 100644 --- a/drivers/media/usb/dvb-usb/dibusb.h +++ b/drivers/media/usb/dvb-usb/dibusb.h @@ -3,7 +3,7 @@ * * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_DIBUSB_H_ #define _DVB_USB_DIBUSB_H_ diff --git a/drivers/media/usb/dvb-usb/digitv.c b/drivers/media/usb/dvb-usb/digitv.c index 99a39339d45d5..906438c5a40f6 100644 --- a/drivers/media/usb/dvb-usb/digitv.c +++ b/drivers/media/usb/dvb-usb/digitv.c @@ -6,7 +6,7 @@ * * partly based on the SDK published by Nebula Electronics * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "digitv.h" diff --git a/drivers/media/usb/dvb-usb/dtt200u-fe.c b/drivers/media/usb/dvb-usb/dtt200u-fe.c index 00ce723c7bf01..9f83560ba63d3 100644 --- a/drivers/media/usb/dvb-usb/dtt200u-fe.c +++ b/drivers/media/usb/dvb-usb/dtt200u-fe.c @@ -4,7 +4,7 @@ * * Copyright (C) 2005 Patrick Boettcher * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dtt200u.h" diff --git a/drivers/media/usb/dvb-usb/dtt200u.c b/drivers/media/usb/dvb-usb/dtt200u.c index 1e7296b2e5b22..24efa023d8273 100644 --- a/drivers/media/usb/dvb-usb/dtt200u.c +++ b/drivers/media/usb/dvb-usb/dtt200u.c @@ -6,7 +6,7 @@ * * Thanks to Steve Chang from WideView for providing support for the WT-220U. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dtt200u.h" diff --git a/drivers/media/usb/dvb-usb/dtt200u.h b/drivers/media/usb/dvb-usb/dtt200u.h index 832f355114e4c..696c2c1f3af3b 100644 --- a/drivers/media/usb/dvb-usb/dtt200u.h +++ b/drivers/media/usb/dvb-usb/dtt200u.h @@ -4,7 +4,7 @@ * * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_DTT200U_H_ #define _DVB_USB_DTT200U_H_ diff --git a/drivers/media/usb/dvb-usb/dvb-usb-init.c b/drivers/media/usb/dvb-usb/dvb-usb-init.c index 16a0b4a359eac..46ada09ce38a9 100644 --- a/drivers/media/usb/dvb-usb/dvb-usb-init.c +++ b/drivers/media/usb/dvb-usb/dvb-usb-init.c @@ -6,7 +6,7 @@ * * Copyright (C) 2004-6 Patrick Boettcher (patrick.boettcher@posteo.de) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dvb-usb-common.h" diff --git a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c index 1007366a295b2..594a763b46cf8 100644 --- a/drivers/media/usb/dvb-usb/dw2102.c +++ b/drivers/media/usb/dvb-usb/dw2102.c @@ -8,7 +8,7 @@ * Terratec Cinergy S2 cards * Copyright (C) 2008-2012 Igor M. Liplianin (liplianin@me.by) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include #include "dw2102.h" diff --git a/drivers/media/usb/dvb-usb/gp8psk.c b/drivers/media/usb/dvb-usb/gp8psk.c index 1282f701f1857..c07f46f5176ea 100644 --- a/drivers/media/usb/dvb-usb/gp8psk.c +++ b/drivers/media/usb/dvb-usb/gp8psk.c @@ -9,7 +9,7 @@ * * This module is based off the vp7045 and vp702x modules * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "gp8psk.h" #include "gp8psk-fe.h" diff --git a/drivers/media/usb/dvb-usb/gp8psk.h b/drivers/media/usb/dvb-usb/gp8psk.h index 2f4c1368eabe5..5293dfdd2609c 100644 --- a/drivers/media/usb/dvb-usb/gp8psk.h +++ b/drivers/media/usb/dvb-usb/gp8psk.h @@ -9,7 +9,7 @@ * * This module is based off the vp7045 and vp702x modules * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_GP8PSK_H_ #define _DVB_USB_GP8PSK_H_ diff --git a/drivers/media/usb/dvb-usb/m920x.c b/drivers/media/usb/dvb-usb/m920x.c index d866a1990a7d2..b8b99be5564b8 100644 --- a/drivers/media/usb/dvb-usb/m920x.c +++ b/drivers/media/usb/dvb-usb/m920x.c @@ -3,7 +3,7 @@ * * Copyright (C) 2006 Aapo Tahkola (aet@rasterburn.org) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "m920x.h" diff --git a/drivers/media/usb/dvb-usb/nova-t-usb2.c b/drivers/media/usb/dvb-usb/nova-t-usb2.c index e368935a50894..e7b290552b663 100644 --- a/drivers/media/usb/dvb-usb/nova-t-usb2.c +++ b/drivers/media/usb/dvb-usb/nova-t-usb2.c @@ -4,7 +4,7 @@ * * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dibusb.h" diff --git a/drivers/media/usb/dvb-usb/opera1.c b/drivers/media/usb/dvb-usb/opera1.c index 823b33ae828d9..e8d784b9d1194 100644 --- a/drivers/media/usb/dvb-usb/opera1.c +++ b/drivers/media/usb/dvb-usb/opera1.c @@ -4,7 +4,7 @@ * Copyright (C) 2006 Mario Hlawitschka (dh1pa@amsat.org) * Copyright (C) 2006 Marco Gittler (g.marco@freenet.de) * -* see Documentation/media/dvb-drivers/dvb-usb.rst for more information +* see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #define DVB_USB_LOG_PREFIX "opera" diff --git a/drivers/media/usb/dvb-usb/ttusb2.c b/drivers/media/usb/dvb-usb/ttusb2.c index e12a5466b6770..fd3e7312daef2 100644 --- a/drivers/media/usb/dvb-usb/ttusb2.c +++ b/drivers/media/usb/dvb-usb/ttusb2.c @@ -17,7 +17,7 @@ * Copyright (c) 2003 Felix Domke * Copyright (C) 2005-6 Patrick Boettcher * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #define DVB_USB_LOG_PREFIX "ttusb2" #include "dvb-usb.h" diff --git a/drivers/media/usb/dvb-usb/ttusb2.h b/drivers/media/usb/dvb-usb/ttusb2.h index 8a3853cd6a266..b34c469d83f9a 100644 --- a/drivers/media/usb/dvb-usb/ttusb2.h +++ b/drivers/media/usb/dvb-usb/ttusb2.h @@ -6,7 +6,7 @@ * Copyright (c) 2003 Felix Domke * Copyright (C) 2005-6 Patrick Boettcher * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_TTUSB2_H_ #define _DVB_USB_TTUSB2_H_ diff --git a/drivers/media/usb/dvb-usb/umt-010.c b/drivers/media/usb/dvb-usb/umt-010.c index a2101bd43349b..2181993771ae9 100644 --- a/drivers/media/usb/dvb-usb/umt-010.c +++ b/drivers/media/usb/dvb-usb/umt-010.c @@ -4,7 +4,7 @@ * * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de) * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "dibusb.h" diff --git a/drivers/media/usb/dvb-usb/vp702x-fe.c b/drivers/media/usb/dvb-usb/vp702x-fe.c index 1c75a9c9dfcae..c1e7931900eec 100644 --- a/drivers/media/usb/dvb-usb/vp702x-fe.c +++ b/drivers/media/usb/dvb-usb/vp702x-fe.c @@ -12,7 +12,7 @@ * This file can be removed soon, after the DST-driver is rewritten to provice * the frontend-controlling separately. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "vp702x.h" diff --git a/drivers/media/usb/dvb-usb/vp702x.c b/drivers/media/usb/dvb-usb/vp702x.c index 381b5c898a076..bf54747e2e01a 100644 --- a/drivers/media/usb/dvb-usb/vp702x.c +++ b/drivers/media/usb/dvb-usb/vp702x.c @@ -9,7 +9,7 @@ * * Thanks to Twinhan who kindly provided hardware and information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "vp702x.h" #include diff --git a/drivers/media/usb/dvb-usb/vp7045-fe.c b/drivers/media/usb/dvb-usb/vp7045-fe.c index d253307a35f8a..e99740ec2650a 100644 --- a/drivers/media/usb/dvb-usb/vp7045-fe.c +++ b/drivers/media/usb/dvb-usb/vp7045-fe.c @@ -6,7 +6,7 @@ * * Thanks to Twinhan who kindly provided hardware and information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "vp7045.h" diff --git a/drivers/media/usb/dvb-usb/vp7045.c b/drivers/media/usb/dvb-usb/vp7045.c index 2baf57216d19a..23e3a90af1f44 100644 --- a/drivers/media/usb/dvb-usb/vp7045.c +++ b/drivers/media/usb/dvb-usb/vp7045.c @@ -7,7 +7,7 @@ * * Thanks to Twinhan who kindly provided hardware and information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #include "vp7045.h" diff --git a/drivers/media/usb/dvb-usb/vp7045.h b/drivers/media/usb/dvb-usb/vp7045.h index 818366746c411..1c8438f22b979 100644 --- a/drivers/media/usb/dvb-usb/vp7045.h +++ b/drivers/media/usb/dvb-usb/vp7045.h @@ -6,7 +6,7 @@ * * Thanks to Twinhan who kindly provided hardware and information. * - * see Documentation/media/dvb-drivers/dvb-usb.rst for more information + * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information */ #ifndef _DVB_USB_VP7045_H_ #define _DVB_USB_VP7045_H_ -- GitLab From b36343861b218d24d4e568c4de8921b15c2cc8a8 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 6 Mar 2020 08:50:46 +0100 Subject: [PATCH 054/503] media: docs: add an uAPI chapter for driver-specific stuff There are some uAPI stuff that are driver-specific. Add them to the main media uAPI body. Signed-off-by: Mauro Carvalho Chehab --- Documentation/media/index.rst | 2 -- .../media/drivers}/cx2341x-uapi.rst | 0 .../media/drivers}/imx-uapi.rst | 0 .../v4l-drivers => userspace-api/media/drivers}/index.rst | 7 +++---- .../media/drivers}/max2175.rst | 0 .../media/drivers}/meye-uapi.rst | 0 .../media/drivers}/omap3isp-uapi.rst | 0 .../media/drivers}/uvcvideo.rst | 0 Documentation/userspace-api/media/index.rst | 2 ++ Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst | 2 +- Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 2 +- Documentation/userspace-api/media/v4l/pixfmt-reserved.rst | 2 +- MAINTAINERS | 4 ++-- drivers/media/i2c/max2175.c | 6 +++--- 14 files changed, 13 insertions(+), 14 deletions(-) rename Documentation/{media/v4l-drivers => userspace-api/media/drivers}/cx2341x-uapi.rst (100%) rename Documentation/{media/v4l-drivers => userspace-api/media/drivers}/imx-uapi.rst (100%) rename Documentation/{media/v4l-drivers => userspace-api/media/drivers}/index.rst (97%) rename Documentation/{media/v4l-drivers => userspace-api/media/drivers}/max2175.rst (100%) rename Documentation/{media/v4l-drivers => userspace-api/media/drivers}/meye-uapi.rst (100%) rename Documentation/{media/v4l-drivers => userspace-api/media/drivers}/omap3isp-uapi.rst (100%) rename Documentation/{media/v4l-drivers => userspace-api/media/drivers}/uvcvideo.rst (100%) diff --git a/Documentation/media/index.rst b/Documentation/media/index.rst index a5cd600e0b049..e93fd88881af3 100644 --- a/Documentation/media/index.rst +++ b/Documentation/media/index.rst @@ -15,8 +15,6 @@ Linux Media Subsystem Documentation ../userspace-api/media/index ../driver-api/media/index - v4l-drivers/index - .. only:: html and subproject Indices diff --git a/Documentation/media/v4l-drivers/cx2341x-uapi.rst b/Documentation/userspace-api/media/drivers/cx2341x-uapi.rst similarity index 100% rename from Documentation/media/v4l-drivers/cx2341x-uapi.rst rename to Documentation/userspace-api/media/drivers/cx2341x-uapi.rst diff --git a/Documentation/media/v4l-drivers/imx-uapi.rst b/Documentation/userspace-api/media/drivers/imx-uapi.rst similarity index 100% rename from Documentation/media/v4l-drivers/imx-uapi.rst rename to Documentation/userspace-api/media/drivers/imx-uapi.rst diff --git a/Documentation/media/v4l-drivers/index.rst b/Documentation/userspace-api/media/drivers/index.rst similarity index 97% rename from Documentation/media/v4l-drivers/index.rst rename to Documentation/userspace-api/media/drivers/index.rst index ee7faff88a33c..05a82f8c0c993 100644 --- a/Documentation/media/v4l-drivers/index.rst +++ b/Documentation/userspace-api/media/drivers/index.rst @@ -2,7 +2,7 @@ .. include:: -.. _v4l-drivers: +.. _v4l-drivers_uapi: ################################################ Video4Linux (V4L) driver-specific documentation @@ -31,10 +31,9 @@ For more details see the file COPYING in the source distribution of Linux. :maxdepth: 5 :numbered: - max2175 - uvcvideo - cx2341x-uapi imx-uapi + max2175 meye-uapi omap3isp-uapi + uvcvideo diff --git a/Documentation/media/v4l-drivers/max2175.rst b/Documentation/userspace-api/media/drivers/max2175.rst similarity index 100% rename from Documentation/media/v4l-drivers/max2175.rst rename to Documentation/userspace-api/media/drivers/max2175.rst diff --git a/Documentation/media/v4l-drivers/meye-uapi.rst b/Documentation/userspace-api/media/drivers/meye-uapi.rst similarity index 100% rename from Documentation/media/v4l-drivers/meye-uapi.rst rename to Documentation/userspace-api/media/drivers/meye-uapi.rst diff --git a/Documentation/media/v4l-drivers/omap3isp-uapi.rst b/Documentation/userspace-api/media/drivers/omap3isp-uapi.rst similarity index 100% rename from Documentation/media/v4l-drivers/omap3isp-uapi.rst rename to Documentation/userspace-api/media/drivers/omap3isp-uapi.rst diff --git a/Documentation/media/v4l-drivers/uvcvideo.rst b/Documentation/userspace-api/media/drivers/uvcvideo.rst similarity index 100% rename from Documentation/media/v4l-drivers/uvcvideo.rst rename to Documentation/userspace-api/media/drivers/uvcvideo.rst diff --git a/Documentation/userspace-api/media/index.rst b/Documentation/userspace-api/media/index.rst index 614310f823955..bcfdd1a5caa02 100644 --- a/Documentation/userspace-api/media/index.rst +++ b/Documentation/userspace-api/media/index.rst @@ -31,3 +31,5 @@ entitled "GNU Free Documentation License". cec/cec-api gen-errors fdl-appendix + + drivers/index diff --git a/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst index 751c6590e7746..dd0b6646beb53 100644 --- a/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst +++ b/Documentation/userspace-api/media/v4l/dev-sliced-vbi.rst @@ -438,7 +438,7 @@ MPEG stream. *Historical context*: This format specification originates from a custom, embedded, sliced VBI data format used by the ``ivtv`` driver. This format has already been informally specified in the kernel sources -in the file ``Documentation/media/v4l-drivers/cx2341x-uapi.rst`` . The +in the file ``Documentation/userspace-api/media/drivers/cx2341x-uapi.rst`` . The maximum size of the payload and other aspects of this format are driven by the CX23415 MPEG decoder's capabilities and limitations with respect to extracting, decoding, and displaying sliced VBI data embedded within diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index f81016c97a0d3..9b48338fb7838 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -116,7 +116,7 @@ enum v4l2_mpeg_stream_vbi_fmt - * - ``V4L2_MPEG_STREAM_VBI_FMT_IVTV`` - VBI in private packets, IVTV format (documented in the kernel sources in the file - ``Documentation/media/v4l-drivers/cx2341x-uapi.rst``) + ``Documentation/userspace-api/media/drivers/cx2341x-uapi.rst``) diff --git a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst index dbdcf6c9f0729..59b9e7238f90f 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-reserved.rst @@ -58,7 +58,7 @@ please make a proposal on the linux-media mailing list. - YUV 4:2:0 format used by the IVTV driver. The format is documented in the kernel sources in the file - ``Documentation/media/v4l-drivers/cx2341x-uapi.rst`` + ``Documentation/userspace-api/media/drivers/cx2341x-uapi.rst`` * .. _V4L2-PIX-FMT-CPIA1: - ``V4L2_PIX_FMT_CPIA1`` diff --git a/MAINTAINERS b/MAINTAINERS index e0a0a3fbfe212..f0e7b4d17fcc5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10249,7 +10249,7 @@ L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/i2c/max2175.txt -F: Documentation/media/v4l-drivers/max2175.rst +F: Documentation/userspace-api/media/drivers/max2175.rst F: drivers/media/i2c/max2175* F: include/uapi/linux/max2175.h @@ -11389,7 +11389,7 @@ F: drivers/regulator/mpq7920.h MOTION EYE VAIO PICTUREBOOK CAMERA DRIVER S: Orphan W: http://popies.net/meye/ -F: Documentation/media/v4l-drivers/meye* +F: Documentation/userspace-api/media/drivers/meye* F: drivers/media/pci/meye/ F: include/uapi/linux/meye.h diff --git a/drivers/media/i2c/max2175.c b/drivers/media/i2c/max2175.c index 506a30e69ced4..03b4ed3a61b83 100644 --- a/drivers/media/i2c/max2175.c +++ b/drivers/media/i2c/max2175.c @@ -1194,7 +1194,7 @@ static const struct v4l2_ctrl_ops max2175_ctrl_ops = { /* * I2S output enable/disable configuration. This is a private control. - * Refer to Documentation/media/v4l-drivers/max2175.rst for more details. + * Refer to Documentation/userspace-api/media/drivers/max2175.rst for more details. */ static const struct v4l2_ctrl_config max2175_i2s_en = { .ops = &max2175_ctrl_ops, @@ -1210,7 +1210,7 @@ static const struct v4l2_ctrl_config max2175_i2s_en = { /* * HSLS value control LO freq adjacent location configuration. - * Refer to Documentation/media/v4l-drivers/max2175.rst for more details. + * Refer to Documentation/userspace-api/media/drivers/max2175.rst for more details. */ static const struct v4l2_ctrl_config max2175_hsls = { .ops = &max2175_ctrl_ops, @@ -1226,7 +1226,7 @@ static const struct v4l2_ctrl_config max2175_hsls = { /* * Rx modes below are a set of preset configurations that decides the tuner's * sck and sample rate of transmission. They are separate for EU & NA regions. - * Refer to Documentation/media/v4l-drivers/max2175.rst for more details. + * Refer to Documentation/userspace-api/media/drivers/max2175.rst for more details. */ static const char * const max2175_ctrl_eu_rx_modes[] = { [MAX2175_EU_FM_1_2] = "EU FM 1.2", -- GitLab From d29e1ef4d638a6be59a8859b4994b457bb7348c5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Mar 2020 13:57:48 +0100 Subject: [PATCH 055/503] media: docs: get rid of Documentation/media/ Now that everything got moved, we can get rid of the old media directory. Signed-off-by: Mauro Carvalho Chehab --- Documentation/driver-api/index.rst | 1 + Documentation/index.rst | 1 - Documentation/media/.gitignore | 5 ----- Documentation/media/index.rst | 23 ----------------------- Documentation/userspace-api/index.rst | 1 + 5 files changed, 2 insertions(+), 29 deletions(-) delete mode 100644 Documentation/media/.gitignore delete mode 100644 Documentation/media/index.rst diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst index d4e78cb3ef4d5..dcc47c029f8e3 100644 --- a/Documentation/driver-api/index.rst +++ b/Documentation/driver-api/index.rst @@ -63,6 +63,7 @@ available subsections can be seen below. pinctl gpio/index md/index + media/index misc_devices nfc/index dmaengine/index diff --git a/Documentation/index.rst b/Documentation/index.rst index 9599c0f3eea8c..af2b87afebc84 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -109,7 +109,6 @@ needed). isdn/index infiniband/index leds/index - media/index netlabel/index networking/index pcmcia/index diff --git a/Documentation/media/.gitignore b/Documentation/media/.gitignore deleted file mode 100644 index 53adc029061fb..0000000000000 --- a/Documentation/media/.gitignore +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 - -*.pdf -# Files generated from *.dot -uapi/v4l/pipeline.svg diff --git a/Documentation/media/index.rst b/Documentation/media/index.rst deleted file mode 100644 index e93fd88881af3..0000000000000 --- a/Documentation/media/index.rst +++ /dev/null @@ -1,23 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -Linux Media Subsystem Documentation -=================================== - -.. only:: html - - .. class:: toc-title - - Table of Contents - -.. toctree:: - :maxdepth: 2 - - ../userspace-api/media/index - ../driver-api/media/index - -.. only:: html and subproject - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/userspace-api/index.rst b/Documentation/userspace-api/index.rst index e983488b48b12..69fc5167e6486 100644 --- a/Documentation/userspace-api/index.rst +++ b/Documentation/userspace-api/index.rst @@ -22,6 +22,7 @@ place where this information is gathered. spec_ctrl accelerators/ocxl ioctl/index + media/index .. only:: subproject and html -- GitLab From 85f7cd3a2aadd3be9652ce105370f561ff755a26 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 14 Apr 2020 11:00:30 +0200 Subject: [PATCH 056/503] Revert "media: Kconfig: better support hybrid TV devices" Changing from "depends on" to "select" may cause some side-effects. This patch is not ready to be merged yet, as it requires some adjustments. So, let's revert it. This reverts commit a3b91d8bd1e034c8ed89d3f55243478af97a0a52. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 26 ++++++++++++++------------ drivers/media/pci/Kconfig | 10 ++-------- drivers/media/pci/bt8xx/Kconfig | 5 +++-- drivers/media/pci/cx18/Kconfig | 2 +- drivers/media/pci/cx23885/Kconfig | 4 ++-- drivers/media/pci/cx88/Kconfig | 4 ++-- drivers/media/pci/saa7134/Kconfig | 4 ++-- drivers/media/pci/saa7164/Kconfig | 2 +- drivers/media/platform/Kconfig | 2 +- drivers/media/usb/Kconfig | 8 +------- drivers/media/usb/au0828/Kconfig | 6 ++++-- drivers/media/usb/cx231xx/Kconfig | 4 ++-- drivers/media/usb/pvrusb2/Kconfig | 4 ++-- drivers/media/usb/tm6000/Kconfig | 4 ++-- 14 files changed, 39 insertions(+), 46 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 0972a42e7e0c7..a8def1591352d 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -77,7 +77,12 @@ config MEDIA_ANALOG_TV_SUPPORT help Enable analog TV support. - Say Y when you have a board with analog TV support. + Say Y when you have a TV board with analog support or with a + hybrid analog/digital TV chipset. + + Note: There are several DVB cards that are based on chips that + support both analog and digital TV. Disabling this option + will disable support for them. config MEDIA_DIGITAL_TV_SUPPORT bool @@ -86,7 +91,8 @@ config MEDIA_DIGITAL_TV_SUPPORT help Enable digital TV support. - Say Y when you have a board with digital TV support. + Say Y when you have a board with digital support or a board with + hybrid digital TV and analog TV. config MEDIA_RADIO_SUPPORT bool @@ -100,6 +106,10 @@ config MEDIA_RADIO_SUPPORT Say Y when you have a board with radio support. + Note: There are several TV cards that are based on chips that + support radio reception. Disabling this option will + disable support for them. + config MEDIA_SDR_SUPPORT bool prompt "Software defined radio" if MEDIA_SUPPORT_FILTER @@ -155,13 +165,9 @@ endmenu # media device types menu "Media core support" visible if !MEDIA_SUPPORT_FILTER -comment "Video4Linux core enabled to support hybrid TV devices" - depends on MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI - config VIDEO_DEV - tristate - prompt "Video4Linux core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) - default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_TEST_SUPPORT || MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI + tristate "Video4Linux core" + default MEDIA_CAMERA_SUPPORT || MEDIA_ANALOG_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT || MEDIA_PLATFORM_SUPPORT || MEDIA_TEST_SUPPORT help Enables the V4L2 API, used by cameras, analog TV, video grabbers, radio devices and by some input devices. @@ -180,12 +186,8 @@ config MEDIA_CONTROLLER # Only enables if one of DTV is selected # -comment "Digital TV core enabled to support hybrid TV devices" - depends on MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI - config DVB_CORE tristate - prompt "Digital TV core" if !(MEDIA_HYBRID_USB || MEDIA_HYBRID_PCI) depends on MEDIA_DIGITAL_TV_SUPPORT depends on (I2C || I2C=n) select CRC32 diff --git a/drivers/media/pci/Kconfig b/drivers/media/pci/Kconfig index 44f1efd21272e..2cd8e328dda92 100644 --- a/drivers/media/pci/Kconfig +++ b/drivers/media/pci/Kconfig @@ -1,11 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -# Should match the hybrid card list below -config MEDIA_HYBRID_PCI - bool - depends on VIDEO_CX18 || VIDEO_CX23885 || VIDEO_CX88 || VIDEO_BT848 || VIDEO_SAA7134 || VIDEO_SAA7164 - default y - if PCI menuconfig MEDIA_PCI_SUPPORT @@ -31,18 +25,18 @@ if MEDIA_ANALOG_TV_SUPPORT source "drivers/media/pci/ivtv/Kconfig" source "drivers/media/pci/saa7146/Kconfig" source "drivers/media/pci/dt3155/Kconfig" -source "drivers/media/pci/cx25821/Kconfig" -source "drivers/media/pci/cobalt/Kconfig" endif if MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT comment "Media capture/analog/hybrid TV support" source "drivers/media/pci/cx18/Kconfig" source "drivers/media/pci/cx23885/Kconfig" +source "drivers/media/pci/cx25821/Kconfig" source "drivers/media/pci/cx88/Kconfig" source "drivers/media/pci/bt8xx/Kconfig" source "drivers/media/pci/saa7134/Kconfig" source "drivers/media/pci/saa7164/Kconfig" +source "drivers/media/pci/cobalt/Kconfig" endif diff --git a/drivers/media/pci/bt8xx/Kconfig b/drivers/media/pci/bt8xx/Kconfig index 30714c7319aca..3f56decbb6814 100644 --- a/drivers/media/pci/bt8xx/Kconfig +++ b/drivers/media/pci/bt8xx/Kconfig @@ -1,10 +1,11 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_BT848 tristate "BT848 Video For Linux" - depends on PCI && I2C + depends on VIDEO_DEV && PCI && I2C && VIDEO_V4L2 select I2C_ALGOBIT select VIDEOBUF_DMA_SG depends on RC_CORE + depends on MEDIA_RADIO_SUPPORT select VIDEO_TUNER select VIDEO_TVEEPROM select VIDEO_MSP3400 if MEDIA_SUBDRV_AUTOSELECT @@ -23,7 +24,7 @@ config VIDEO_BT848 config DVB_BT8XX tristate "DVB/ATSC Support for bt878 based TV cards" - depends on PCI && I2C && VIDEO_BT848 + depends on DVB_CORE && PCI && I2C && VIDEO_BT848 select DVB_MT352 if MEDIA_SUBDRV_AUTOSELECT select DVB_SP887X if MEDIA_SUBDRV_AUTOSELECT select DVB_NXT6000 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/pci/cx18/Kconfig b/drivers/media/pci/cx18/Kconfig index 110e072bd8baa..7074a1071302f 100644 --- a/drivers/media/pci/cx18/Kconfig +++ b/drivers/media/pci/cx18/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX18 tristate "Conexant cx23418 MPEG encoder support" - depends on PCI && I2C + depends on VIDEO_V4L2 && DVB_CORE && PCI && I2C select I2C_ALGOBIT select VIDEOBUF_VMALLOC depends on RC_CORE diff --git a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig index e8f4edf270c83..926da881929d5 100644 --- a/drivers/media/pci/cx23885/Kconfig +++ b/drivers/media/pci/cx23885/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX23885 tristate "Conexant cx23885 (2388x successor) support" - depends on PCI && I2C && INPUT && SND + depends on DVB_CORE && VIDEO_DEV && PCI && I2C && INPUT && SND select SND_PCM select I2C_ALGOBIT select VIDEO_TUNER @@ -53,7 +53,7 @@ config VIDEO_CX23885 config MEDIA_ALTERA_CI tristate "Altera FPGA based CI module" - depends on VIDEO_CX23885 + depends on VIDEO_CX23885 && DVB_CORE select ALTERA_STAPL help An Altera FPGA CI module for NetUP Dual DVB-T/C RF CI card. diff --git a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig index ab994b3049f40..24e1e7c41744a 100644 --- a/drivers/media/pci/cx88/Kconfig +++ b/drivers/media/pci/cx88/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX88 tristate "Conexant 2388x (bt878 successor) support" - depends on PCI && I2C && RC_CORE + depends on VIDEO_DEV && PCI && I2C && RC_CORE select I2C_ALGOBIT select VIDEOBUF2_DMA_SG select VIDEO_TUNER @@ -44,7 +44,7 @@ config VIDEO_CX88_BLACKBIRD config VIDEO_CX88_DVB tristate "DVB/ATSC Support for cx2388x based TV cards" - depends on VIDEO_CX88 + depends on VIDEO_CX88 && DVB_CORE select VIDEOBUF2_DVB select DVB_PLL if MEDIA_SUBDRV_AUTOSELECT select DVB_MT352 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/pci/saa7134/Kconfig b/drivers/media/pci/saa7134/Kconfig index a2af02f6d5938..30c1759682a9f 100644 --- a/drivers/media/pci/saa7134/Kconfig +++ b/drivers/media/pci/saa7134/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_SAA7134 tristate "Philips SAA7134 support" - depends on PCI && I2C + depends on VIDEO_DEV && PCI && I2C select VIDEOBUF2_DMA_SG select VIDEO_TUNER select VIDEO_TVEEPROM @@ -37,7 +37,7 @@ config VIDEO_SAA7134_RC config VIDEO_SAA7134_DVB tristate "DVB/ATSC Support for saa7134 based TV cards" - depends on VIDEO_SAA7134 + depends on VIDEO_SAA7134 && DVB_CORE select VIDEOBUF2_DVB select DVB_PLL if MEDIA_SUBDRV_AUTOSELECT select DVB_MT352 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/pci/saa7164/Kconfig b/drivers/media/pci/saa7164/Kconfig index 8df933a722a7e..6655c3e504cdf 100644 --- a/drivers/media/pci/saa7164/Kconfig +++ b/drivers/media/pci/saa7164/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_SAA7164 tristate "NXP SAA7164 support" - depends on PCI && I2C + depends on DVB_CORE && VIDEO_DEV && PCI && I2C select I2C_ALGOBIT select FW_LOADER select VIDEO_TUNER diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index b8b2de5f1541c..c11386bfc24b7 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -543,7 +543,7 @@ config VIDEO_TI_CSC menuconfig DVB_PLATFORM_DRIVERS bool "DVB platform devices" - select DVB_CORE + depends on MEDIA_DIGITAL_TV_SUPPORT help Say Y here to enable support for platform-specific Digital TV drivers. diff --git a/drivers/media/usb/Kconfig b/drivers/media/usb/Kconfig index 036aa4385fdcc..bf08393e38d16 100644 --- a/drivers/media/usb/Kconfig +++ b/drivers/media/usb/Kconfig @@ -5,12 +5,6 @@ config TTPCI_EEPROM tristate depends on I2C -# Should match the hybrid card list below -config MEDIA_HYBRID_USB - bool - depends on VIDEO_AU0828 || VIDEO_CX231XX || VIDEO_TM6000 || VIDEO_PVRUSB2 - default y - if USB && MEDIA_SUPPORT menuconfig MEDIA_USB_SUPPORT @@ -35,6 +29,7 @@ endif if MEDIA_ANALOG_TV_SUPPORT comment "Analog TV USB devices" +source "drivers/media/usb/pvrusb2/Kconfig" source "drivers/media/usb/hdpvr/Kconfig" source "drivers/media/usb/stk1160/Kconfig" source "drivers/media/usb/go7007/Kconfig" @@ -44,7 +39,6 @@ if (MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT) comment "Analog/digital TV USB devices" source "drivers/media/usb/au0828/Kconfig" source "drivers/media/usb/cx231xx/Kconfig" -source "drivers/media/usb/pvrusb2/Kconfig" source "drivers/media/usb/tm6000/Kconfig" endif diff --git a/drivers/media/usb/au0828/Kconfig b/drivers/media/usb/au0828/Kconfig index 2f5ee684a2789..05cc6c48c26fb 100644 --- a/drivers/media/usb/au0828/Kconfig +++ b/drivers/media/usb/au0828/Kconfig @@ -2,12 +2,12 @@ config VIDEO_AU0828 tristate "Auvitek AU0828 support" - depends on I2C && INPUT && USB + depends on I2C && INPUT && DVB_CORE && USB && VIDEO_V4L2 select MEDIA_CONTROLLER select MEDIA_CONTROLLER_DVB select I2C_ALGOBIT select VIDEO_TVEEPROM - select VIDEOBUF2_VMALLOC + select VIDEOBUF2_VMALLOC if VIDEO_V4L2 select DVB_AU8522_DTV if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_XC5000 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_MXL5007T if MEDIA_SUBDRV_AUTOSELECT @@ -22,6 +22,8 @@ config VIDEO_AU0828 config VIDEO_AU0828_V4L2 bool "Auvitek AU0828 v4l2 analog video support" depends on VIDEO_AU0828 + depends on VIDEO_V4L2=y || VIDEO_V4L2=VIDEO_AU0828 + select DVB_AU8522_V4L if MEDIA_SUBDRV_AUTOSELECT select VIDEO_TUNER default y help diff --git a/drivers/media/usb/cx231xx/Kconfig b/drivers/media/usb/cx231xx/Kconfig index 7e3b189f9dca4..2fe2b2d335ba1 100644 --- a/drivers/media/usb/cx231xx/Kconfig +++ b/drivers/media/usb/cx231xx/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_CX231XX tristate "Conexant cx231xx USB video capture support" - depends on I2C && I2C_MUX + depends on VIDEO_DEV && I2C && I2C_MUX select VIDEO_TUNER select VIDEO_TVEEPROM select VIDEOBUF2_VMALLOC @@ -40,7 +40,7 @@ config VIDEO_CX231XX_ALSA config VIDEO_CX231XX_DVB tristate "DVB/ATSC Support for Cx231xx based TV cards" - depends on VIDEO_CX231XX + depends on VIDEO_CX231XX && DVB_CORE select MEDIA_TUNER_XC5000 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_TDA18271 if MEDIA_SUBDRV_AUTOSELECT select DVB_MB86A20S if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/usb/pvrusb2/Kconfig b/drivers/media/usb/pvrusb2/Kconfig index 5bf45f2b2517a..e6a4f730591b8 100644 --- a/drivers/media/usb/pvrusb2/Kconfig +++ b/drivers/media/usb/pvrusb2/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_PVRUSB2 tristate "Hauppauge WinTV-PVR USB2 support" - depends on I2C + depends on VIDEO_V4L2 && I2C select VIDEO_TUNER select VIDEO_TVEEPROM select VIDEO_CX2341X @@ -36,7 +36,7 @@ config VIDEO_PVRUSB2_SYSFS config VIDEO_PVRUSB2_DVB bool "pvrusb2 ATSC/DVB support" default y - depends on VIDEO_PVRUSB2 + depends on VIDEO_PVRUSB2 && DVB_CORE select DVB_LGDT330X if MEDIA_SUBDRV_AUTOSELECT select DVB_S5H1409 if MEDIA_SUBDRV_AUTOSELECT select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT diff --git a/drivers/media/usb/tm6000/Kconfig b/drivers/media/usb/tm6000/Kconfig index ad9cfa855eac0..56e977deba815 100644 --- a/drivers/media/usb/tm6000/Kconfig +++ b/drivers/media/usb/tm6000/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_TM6000 tristate "TV Master TM5600/6000/6010 driver" - depends on I2C && INPUT && RC_CORE && USB + depends on VIDEO_DEV && I2C && INPUT && RC_CORE && USB select VIDEO_TUNER select MEDIA_TUNER_XC2028 select MEDIA_TUNER_XC5000 @@ -28,7 +28,7 @@ config VIDEO_TM6000_ALSA config VIDEO_TM6000_DVB tristate "DVB Support for tm6000 based TV cards" - depends on VIDEO_TM6000 && USB + depends on VIDEO_TM6000 && DVB_CORE && USB select DVB_ZL10353 help This adds support for DVB cards based on the tm5600/tm6000 chip. -- GitLab From e1e213b1b0e4c785bac8bfa52130996105bffb62 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:32 +0100 Subject: [PATCH 057/503] media: v4l2-mem2mem: return CAPTURE buffer first When the request API is used, typically an OUTPUT (src) buffer will be part of a request. A userspace process will be typically blocked, waiting on the request file descriptor. Returning the OUTPUT (src) buffer will wake-up such processes, who will immediately attempt to dequeue the CAPTURE buffer, only to find it's still unavailable. Therefore, change v4l2_m2m_buf_done_and_job_finish returning the CAPTURE (dst) buffer first, to avoid signalling the request file descriptor prematurely, i.e. before the CAPTURE buffer is done. When the request API is not used, this change should have no impact. Tested-by: Nicolas Dufresne Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-mem2mem.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c index 8986c31176e94..62ac9424c92a7 100644 --- a/drivers/media/v4l2-core/v4l2-mem2mem.c +++ b/drivers/media/v4l2-core/v4l2-mem2mem.c @@ -504,12 +504,21 @@ void v4l2_m2m_buf_done_and_job_finish(struct v4l2_m2m_dev *m2m_dev, if (WARN_ON(!src_buf || !dst_buf)) goto unlock; - v4l2_m2m_buf_done(src_buf, state); dst_buf->is_held = src_buf->flags & V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF; if (!dst_buf->is_held) { v4l2_m2m_dst_buf_remove(m2m_ctx); v4l2_m2m_buf_done(dst_buf, state); } + /* + * If the request API is being used, returning the OUTPUT + * (src) buffer will wake-up any process waiting on the + * request file descriptor. + * + * Therefore, return the CAPTURE (dst) buffer first, + * to avoid signalling the request file descriptor + * before the CAPTURE buffer is done. + */ + v4l2_m2m_buf_done(src_buf, state); schedule_next = _v4l2_m2m_job_finish(m2m_dev, m2m_ctx); unlock: spin_unlock_irqrestore(&m2m_dev->job_spinlock, flags); -- GitLab From 6837e43e9ca11c49eac175326a736ee1bd2de516 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:33 +0100 Subject: [PATCH 058/503] media: hantro: Set buffers' zeroth plane payload in .buf_prepare Buffers' zeroth plane payload size is calculated at format negotiation time, and so it can be set in .buf_prepare. Keep in mind that, to make this change easier, hantro_buf_prepare is refactored, using the cedrus driver as reference. This results in cleaner code as byproduct. Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/hantro/hantro_v4l2.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index f4ae2cee0f189..3142ab6697d5f 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -608,7 +608,7 @@ hantro_queue_setup(struct vb2_queue *vq, unsigned int *num_buffers, } static int -hantro_buf_plane_check(struct vb2_buffer *vb, const struct hantro_fmt *vpu_fmt, +hantro_buf_plane_check(struct vb2_buffer *vb, struct v4l2_pix_format_mplane *pixfmt) { unsigned int sz; @@ -630,12 +630,18 @@ static int hantro_buf_prepare(struct vb2_buffer *vb) { struct vb2_queue *vq = vb->vb2_queue; struct hantro_ctx *ctx = vb2_get_drv_priv(vq); + struct v4l2_pix_format_mplane *pix_fmt; + int ret; if (V4L2_TYPE_IS_OUTPUT(vq->type)) - return hantro_buf_plane_check(vb, ctx->vpu_src_fmt, - &ctx->src_fmt); - - return hantro_buf_plane_check(vb, ctx->vpu_dst_fmt, &ctx->dst_fmt); + pix_fmt = &ctx->src_fmt; + else + pix_fmt = &ctx->dst_fmt; + ret = hantro_buf_plane_check(vb, pix_fmt); + if (ret) + return ret; + vb2_set_plane_payload(vb, 0, pix_fmt->plane_fmt[0].sizeimage); + return 0; } static void hantro_buf_queue(struct vb2_buffer *vb) -- GitLab From 28a202c55963386b8bc45bcc52029362e9aa0d33 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:34 +0100 Subject: [PATCH 059/503] media: hantro: Use v4l2_m2m_buf_done_and_job_finish Let the core sort out the nuances of returning buffers to userspace, by using the v4l2_m2m_buf_done_and_job_finish helper. Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/hantro/hantro_drv.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index ace13973e2d0a..d0097c5fe7d93 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -101,8 +101,8 @@ static void hantro_job_finish(struct hantro_dev *vpu, pm_runtime_put_autosuspend(vpu->dev); clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks); - src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); - dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); if (WARN_ON(!src)) return; @@ -112,14 +112,14 @@ static void hantro_job_finish(struct hantro_dev *vpu, src->sequence = ctx->sequence_out++; dst->sequence = ctx->sequence_cap++; - ret = ctx->buf_finish(ctx, &dst->vb2_buf, bytesused); - if (ret) - result = VB2_BUF_STATE_ERROR; - - v4l2_m2m_buf_done(src, result); - v4l2_m2m_buf_done(dst, result); + if (ctx->buf_finish) { + ret = ctx->buf_finish(ctx, &dst->vb2_buf, bytesused); + if (ret) + result = VB2_BUF_STATE_ERROR; + } - v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx); + v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, + result); } void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, -- GitLab From c9f98d9aeb0914c05d18d97a7aa89feb5fedb10f Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:35 +0100 Subject: [PATCH 060/503] media: hantro: Remove unneeded hantro_dec_buf_finish Since now .buf_prepare takes care of setting the buffer payload size, we can get rid of this, at least for decoders. Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/hantro/hantro_drv.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index d0097c5fe7d93..0db8ad4551601 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -80,15 +80,6 @@ hantro_enc_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf, return 0; } -static int -hantro_dec_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf, - unsigned int bytesused) -{ - /* For decoders set bytesused as per the output picture. */ - buf->planes[0].bytesused = ctx->dst_fmt.plane_fmt[0].sizeimage; - return 0; -} - static void hantro_job_finish(struct hantro_dev *vpu, struct hantro_ctx *ctx, unsigned int bytesused, @@ -431,7 +422,6 @@ static int hantro_open(struct file *filp) ctx->buf_finish = hantro_enc_buf_finish; } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) { allowed_codecs = vpu->variant->codec & HANTRO_DECODERS; - ctx->buf_finish = hantro_dec_buf_finish; } else { ret = -ENODEV; goto err_ctx_free; -- GitLab From 774ffd751a94eb6a5c7c6f809ea1ea7203591920 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:36 +0100 Subject: [PATCH 061/503] media: hantro: Move H264 motion vector calculation to a helper Move the extra bytes calculation that are needed for H264 motion vector to a helper. This is just a cosmetic cleanup. Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/hantro/hantro.h | 4 --- drivers/staging/media/hantro/hantro_hw.h | 31 ++++++++++++++++++++++ drivers/staging/media/hantro/hantro_v4l2.c | 25 ++--------------- 3 files changed, 33 insertions(+), 27 deletions(-) diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h index 327ddef45345e..2089f88a44a23 100644 --- a/drivers/staging/media/hantro/hantro.h +++ b/drivers/staging/media/hantro/hantro.h @@ -26,10 +26,6 @@ #include "hantro_hw.h" -#define MB_DIM 16 -#define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM) -#define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM) - struct hantro_ctx; struct hantro_codec_ops; diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index 7dfc9bad7297e..4053d8710e045 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -18,6 +18,10 @@ #define DEC_8190_ALIGN_MASK 0x07U +#define MB_DIM 16 +#define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM) +#define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM) + struct hantro_dev; struct hantro_ctx; struct hantro_buf; @@ -176,6 +180,33 @@ void hantro_g1_h264_dec_run(struct hantro_ctx *ctx); int hantro_h264_dec_init(struct hantro_ctx *ctx); void hantro_h264_dec_exit(struct hantro_ctx *ctx); +static inline size_t +hantro_h264_mv_size(unsigned int width, unsigned int height) +{ + /* + * A decoded 8-bit 4:2:0 NV12 frame may need memory for up to + * 448 bytes per macroblock with additional 32 bytes on + * multi-core variants. + * + * The H264 decoder needs extra space on the output buffers + * to store motion vectors. This is needed for reference + * frames and only if the format is non-post-processed NV12. + * + * Memory layout is as follow: + * + * +---------------------------+ + * | Y-plane 256 bytes x MBs | + * +---------------------------+ + * | UV-plane 128 bytes x MBs | + * +---------------------------+ + * | MV buffer 64 bytes x MBs | + * +---------------------------+ + * | MC sync 32 bytes | + * +---------------------------+ + */ + return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32; +} + void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx); void rk3399_vpu_mpeg2_dec_run(struct hantro_ctx *ctx); void hantro_mpeg2_dec_copy_qtable(u8 *qtable, diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index 3142ab6697d5f..458b502ff01b0 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -273,32 +273,11 @@ static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, /* Fill remaining fields */ v4l2_fill_pixfmt_mp(pix_mp, fmt->fourcc, pix_mp->width, pix_mp->height); - /* - * A decoded 8-bit 4:2:0 NV12 frame may need memory for up to - * 448 bytes per macroblock with additional 32 bytes on - * multi-core variants. - * - * The H264 decoder needs extra space on the output buffers - * to store motion vectors. This is needed for reference - * frames and only if the format is non-post-processed NV12. - * - * Memory layout is as follow: - * - * +---------------------------+ - * | Y-plane 256 bytes x MBs | - * +---------------------------+ - * | UV-plane 128 bytes x MBs | - * +---------------------------+ - * | MV buffer 64 bytes x MBs | - * +---------------------------+ - * | MC sync 32 bytes | - * +---------------------------+ - */ if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE && !hantro_needs_postproc(ctx, fmt)) pix_mp->plane_fmt[0].sizeimage += - 64 * MB_WIDTH(pix_mp->width) * - MB_WIDTH(pix_mp->height) + 32; + hantro_h264_mv_size(pix_mp->width, + pix_mp->height); } else if (!pix_mp->plane_fmt[0].sizeimage) { /* * For coded formats the application can specify -- GitLab From 88d06362d1d052e4c844ac95a2ca308ed4d90452 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 25 Mar 2020 22:34:37 +0100 Subject: [PATCH 062/503] media: hantro: Refactor for V4L2 API spec compliancy Refactor how S_FMT and TRY_FMT are handled, and also make sure internal initial format and format reset are done properly. The latter is achieved by making sure the same hantro_{set,try}_fmt helpers are called on all paths that set the format (which is part of the driver state). This commit removes the following v4l2-compliance warnings: test VIDIOC_G_FMT: OK fail: v4l2-test-formats.cpp(711): Video Capture Multiplanar: TRY_FMT(G_FMT) != G_FMT test VIDIOC_TRY_FMT: FAIL fail: v4l2-test-formats.cpp(1116): Video Capture Multiplanar: S_FMT(G_FMT) != G_FMT test VIDIOC_S_FMT: FAIL Reported-by: Nicolas Dufresne Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/hantro/hantro.h | 3 +- drivers/staging/media/hantro/hantro_v4l2.c | 70 ++++++++++++++-------- 2 files changed, 47 insertions(+), 26 deletions(-) diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h index 2089f88a44a23..3005207fc6fb8 100644 --- a/drivers/staging/media/hantro/hantro.h +++ b/drivers/staging/media/hantro/hantro.h @@ -417,7 +417,8 @@ hantro_get_dst_buf(struct hantro_ctx *ctx) } static inline bool -hantro_needs_postproc(struct hantro_ctx *ctx, const struct hantro_fmt *fmt) +hantro_needs_postproc(const struct hantro_ctx *ctx, + const struct hantro_fmt *fmt) { return !hantro_is_encoder_ctx(ctx) && fmt->fourcc != V4L2_PIX_FMT_NV12; } diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index 458b502ff01b0..f28a94e2fa934 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -30,6 +30,11 @@ #include "hantro_hw.h" #include "hantro_v4l2.h" +static int hantro_set_fmt_out(struct hantro_ctx *ctx, + struct v4l2_pix_format_mplane *pix_mp); +static int hantro_set_fmt_cap(struct hantro_ctx *ctx, + struct v4l2_pix_format_mplane *pix_mp); + static const struct hantro_fmt * hantro_get_formats(const struct hantro_ctx *ctx, unsigned int *num_fmts) { @@ -227,12 +232,12 @@ static int vidioc_g_fmt_cap_mplane(struct file *file, void *priv, return 0; } -static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, - bool capture) +static int hantro_try_fmt(const struct hantro_ctx *ctx, + struct v4l2_pix_format_mplane *pix_mp, + enum v4l2_buf_type type) { - struct hantro_ctx *ctx = fh_to_ctx(priv); - struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; const struct hantro_fmt *fmt, *vpu_fmt; + bool capture = !V4L2_TYPE_IS_OUTPUT(type); bool coded; coded = capture == hantro_is_encoder_ctx(ctx); @@ -246,7 +251,7 @@ static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, fmt = hantro_find_format(ctx, pix_mp->pixelformat); if (!fmt) { fmt = hantro_get_default_fmt(ctx, coded); - f->fmt.pix_mp.pixelformat = fmt->fourcc; + pix_mp->pixelformat = fmt->fourcc; } if (coded) { @@ -294,13 +299,13 @@ static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f, static int vidioc_try_fmt_cap_mplane(struct file *file, void *priv, struct v4l2_format *f) { - return vidioc_try_fmt(file, priv, f, true); + return hantro_try_fmt(fh_to_ctx(priv), &f->fmt.pix_mp, f->type); } static int vidioc_try_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) { - return vidioc_try_fmt(file, priv, f, false); + return hantro_try_fmt(fh_to_ctx(priv), &f->fmt.pix_mp, f->type); } static void @@ -334,11 +339,12 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) } hantro_reset_fmt(fmt, vpu_fmt); - fmt->num_planes = 1; fmt->width = vpu_fmt->frmsize.min_width; fmt->height = vpu_fmt->frmsize.min_height; - fmt->plane_fmt[0].sizeimage = vpu_fmt->header_size + - fmt->width * fmt->height * vpu_fmt->max_depth; + if (hantro_is_encoder_ctx(ctx)) + hantro_set_fmt_cap(ctx, fmt); + else + hantro_set_fmt_out(ctx, fmt); } static void @@ -360,9 +366,12 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) } hantro_reset_fmt(raw_fmt, raw_vpu_fmt); - v4l2_fill_pixfmt_mp(raw_fmt, raw_vpu_fmt->fourcc, - encoded_fmt->width, - encoded_fmt->height); + raw_fmt->width = encoded_fmt->width; + raw_fmt->width = encoded_fmt->width; + if (hantro_is_encoder_ctx(ctx)) + hantro_set_fmt_out(ctx, raw_fmt); + else + hantro_set_fmt_cap(ctx, raw_fmt); } void hantro_reset_fmts(struct hantro_ctx *ctx) @@ -388,15 +397,15 @@ hantro_update_requires_request(struct hantro_ctx *ctx, u32 fourcc) } } -static int -vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) +static int hantro_set_fmt_out(struct hantro_ctx *ctx, + struct v4l2_pix_format_mplane *pix_mp) { - struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; - struct hantro_ctx *ctx = fh_to_ctx(priv); - struct vb2_queue *vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + struct vb2_queue *vq; int ret; - ret = vidioc_try_fmt_out_mplane(file, priv, f); + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, + V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); + ret = hantro_try_fmt(ctx, pix_mp, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); if (ret) return ret; @@ -458,16 +467,15 @@ vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) return 0; } -static int vidioc_s_fmt_cap_mplane(struct file *file, void *priv, - struct v4l2_format *f) +static int hantro_set_fmt_cap(struct hantro_ctx *ctx, + struct v4l2_pix_format_mplane *pix_mp) { - struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; - struct hantro_ctx *ctx = fh_to_ctx(priv); struct vb2_queue *vq; int ret; /* Change not allowed if queue is busy. */ - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, + V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); if (vb2_is_busy(vq)) return -EBUSY; @@ -488,7 +496,7 @@ static int vidioc_s_fmt_cap_mplane(struct file *file, void *priv, return -EBUSY; } - ret = vidioc_try_fmt_cap_mplane(file, priv, f); + ret = hantro_try_fmt(ctx, pix_mp, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); if (ret) return ret; @@ -522,6 +530,18 @@ static int vidioc_s_fmt_cap_mplane(struct file *file, void *priv, return 0; } +static int +vidioc_s_fmt_out_mplane(struct file *file, void *priv, struct v4l2_format *f) +{ + return hantro_set_fmt_out(fh_to_ctx(priv), &f->fmt.pix_mp); +} + +static int +vidioc_s_fmt_cap_mplane(struct file *file, void *priv, struct v4l2_format *f) +{ + return hantro_set_fmt_cap(fh_to_ctx(priv), &f->fmt.pix_mp); +} + const struct v4l2_ioctl_ops hantro_ioctl_ops = { .vidioc_querycap = vidioc_querycap, .vidioc_enum_framesizes = vidioc_enum_framesizes, -- GitLab From ba445b7ff43b3e45836a9a290efdc3a36ea63941 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 26 Mar 2020 20:13:43 +0100 Subject: [PATCH 063/503] media: dt-bindings: rockchip-vpu: Convert bindings to json-schema Convert Rockchip VPU (Hantro IP block) codec driver documentation to json-schema. Signed-off-by: Ezequiel Garcia Reviewed-by: Rob Herring Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../bindings/media/rockchip-vpu.txt | 43 ----------- .../bindings/media/rockchip-vpu.yaml | 74 +++++++++++++++++++ MAINTAINERS | 3 +- 3 files changed, 76 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/rockchip-vpu.txt create mode 100644 Documentation/devicetree/bindings/media/rockchip-vpu.yaml diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.txt b/Documentation/devicetree/bindings/media/rockchip-vpu.txt deleted file mode 100644 index 339252d9c5157..0000000000000 --- a/Documentation/devicetree/bindings/media/rockchip-vpu.txt +++ /dev/null @@ -1,43 +0,0 @@ -device-tree bindings for rockchip VPU codec - -Rockchip (Video Processing Unit) present in various Rockchip platforms, -such as RK3288, RK3328 and RK3399. - -Required properties: -- compatible: value should be one of the following - "rockchip,rk3288-vpu"; - "rockchip,rk3328-vpu"; - "rockchip,rk3399-vpu"; -- interrupts: encoding and decoding interrupt specifiers -- interrupt-names: should be - "vepu", "vdpu" on RK3288 and RK3399, - "vdpu" on RK3328. -- clocks: phandle to VPU aclk, hclk clocks -- clock-names: should be "aclk" and "hclk" -- power-domains: phandle to power domain node -- iommus: phandle to a iommu node - -Example: -SoC-specific DT entry: - vpu: video-codec@ff9a0000 { - compatible = "rockchip,rk3288-vpu"; - reg = <0x0 0xff9a0000 0x0 0x800>; - interrupts = , - ; - interrupt-names = "vepu", "vdpu"; - clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; - clock-names = "aclk", "hclk"; - power-domains = <&power RK3288_PD_VIDEO>; - iommus = <&vpu_mmu>; - }; - - vpu: video-codec@ff350000 { - compatible = "rockchip,rk3328-vpu"; - reg = <0x0 0xff350000 0x0 0x800>; - interrupts = ; - interrupt-names = "vdpu"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "hclk"; - power-domains = <&power RK3328_PD_VPU>; - iommus = <&vpu_mmu>; - }; diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml new file mode 100644 index 0000000000000..d7a42e6f9bcfd --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/media/rockchip-vpu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Hantro G1 VPU codecs implemented on Rockchip SoCs + +maintainers: + - Ezequiel Garcia + +description: + Hantro G1 video encode and decode accelerators present on Rockchip SoCs. + +properties: + compatible: + enum: + - rockchip,rk3288-vpu + - rockchip,rk3328-vpu + - rockchip,rk3399-vpu + + reg: + maxItems: 1 + + interrupts: + maxItems: 2 + + interrupt-names: + items: + - const: vepu + - const: vdpu + + clocks: + maxItems: 2 + + clock-names: + items: + - const: aclk + - const: hclk + + power-domains: + maxItems: 1 + + iommus: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + + vpu: video-codec@ff9a0000 { + compatible = "rockchip,rk3288-vpu"; + reg = <0x0 0xff9a0000 0x0 0x800>; + interrupts = , + ; + interrupt-names = "vepu", "vdpu"; + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; + clock-names = "aclk", "hclk"; + power-domains = <&power RK3288_PD_VIDEO>; + iommus = <&vpu_mmu>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index f0e7b4d17fcc5..0cfd86594b0b1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14471,7 +14471,8 @@ M: Jacob Chen M: Ezequiel Garcia L: linux-media@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/media/rockchip-rga.txt +F: Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +F: Documentation/devicetree/bindings/media/rockchip-vpu.yaml F: drivers/media/platform/rockchip/rga/ ROCKER DRIVER -- GitLab From 286e78a9b508728604b40f39e0051d00f894a807 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 26 Mar 2020 22:09:41 +0100 Subject: [PATCH 064/503] media: pci: cx88: convert to use i2c_new_client_device() Move away from the deprecated API and make use of the fact that unregistering devices is NULL- and ERR_PTR-safe. Signed-off-by: Wolfram Sang Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/cx88/cx88-core.c | 3 +-- drivers/media/pci/cx88/cx88-input.c | 2 +- drivers/media/pci/cx88/cx88-video.c | 2 +- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/media/pci/cx88/cx88-core.c b/drivers/media/pci/cx88/cx88-core.c index dcadf78657d64..48c8a34295424 100644 --- a/drivers/media/pci/cx88/cx88-core.c +++ b/drivers/media/pci/cx88/cx88-core.c @@ -1070,8 +1070,7 @@ void cx88_core_put(struct cx88_core *core, struct pci_dev *pci) mutex_lock(&devlist); cx88_ir_fini(core); if (core->i2c_rc == 0) { - if (core->i2c_rtc) - i2c_unregister_device(core->i2c_rtc); + i2c_unregister_device(core->i2c_rtc); i2c_del_adapter(&core->i2c_adap); } list_del(&core->devlist); diff --git a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c index c7c2acd552663..7e0fed9cd200b 100644 --- a/drivers/media/pci/cx88/cx88-input.c +++ b/drivers/media/pci/cx88/cx88-input.c @@ -638,7 +638,7 @@ void cx88_i2c_init_ir(struct cx88_core *core) I2C_SMBUS_READ, 0, I2C_SMBUS_QUICK, NULL) >= 0) { info.addr = *addrp; - i2c_new_device(&core->i2c_adap, &info); + i2c_new_client_device(&core->i2c_adap, &info); break; } } diff --git a/drivers/media/pci/cx88/cx88-video.c b/drivers/media/pci/cx88/cx88-video.c index 6aabc45aa93cb..ba0e9660a047c 100644 --- a/drivers/media/pci/cx88/cx88-video.c +++ b/drivers/media/pci/cx88/cx88-video.c @@ -1385,7 +1385,7 @@ static int cx8800_initdev(struct pci_dev *pci_dev, }; request_module("rtc-isl1208"); - core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info); + core->i2c_rtc = i2c_new_client_device(&core->i2c_adap, &rtc_info); } /* fall-through */ case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO: -- GitLab From b041cb6362db77bb60e9dda0b89ec653ed2cc4f0 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 26 Mar 2020 22:09:42 +0100 Subject: [PATCH 065/503] media: pci: saa7134: convert to use i2c_new_client_device() Move away from the deprecated API. Signed-off-by: Wolfram Sang Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/saa7134/saa7134-input.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/pci/saa7134/saa7134-input.c b/drivers/media/pci/saa7134/saa7134-input.c index 9aea7c30380bb..8610eb473b39e 100644 --- a/drivers/media/pci/saa7134/saa7134-input.c +++ b/drivers/media/pci/saa7134/saa7134-input.c @@ -982,7 +982,7 @@ void saa7134_probe_i2c_ir(struct saa7134_dev *dev) if (dev->init_data.name) info.platform_data = &dev->init_data; - i2c_new_device(&dev->i2c_adap, &info); + i2c_new_client_device(&dev->i2c_adap, &info); } static int saa7134_raw_decode_irq(struct saa7134_dev *dev) -- GitLab From 03c87596b71a63cd62afe738666017857ead5fdb Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 26 Mar 2020 22:09:43 +0100 Subject: [PATCH 066/503] media: marvell-ccic: convert to use i2c_new_client_device() Move away from the deprecated API and return the shiny new ERRPTR where useful. Signed-off-by: Wolfram Sang Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/marvell-ccic/cafe-driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/marvell-ccic/cafe-driver.c b/drivers/media/platform/marvell-ccic/cafe-driver.c index 37fdcc53a1c46..9a09a10a3631d 100644 --- a/drivers/media/platform/marvell-ccic/cafe-driver.c +++ b/drivers/media/platform/marvell-ccic/cafe-driver.c @@ -556,7 +556,7 @@ static int cafe_pci_probe(struct pci_dev *pdev, clkdev_create(mcam->mclk, "xclk", "%d-%04x", i2c_adapter_id(cam->i2c_adapter), ov7670_info.addr); - if (i2c_new_device(cam->i2c_adapter, &ov7670_info)) { + if (!IS_ERR(i2c_new_client_device(cam->i2c_adapter, &ov7670_info))) { cam->registered = 1; return 0; } -- GitLab From cb3c38c93ac35aedacef6ddde72b975fe3bc9490 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 26 Mar 2020 22:09:44 +0100 Subject: [PATCH 067/503] media: usb: cx231xx: convert to use i2c_new_client_device() Move away from the deprecated API and make use of the fact that unregistering devices is NULL- and ERR_PTR-safe. Signed-off-by: Wolfram Sang Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/cx231xx/cx231xx-input.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/media/usb/cx231xx/cx231xx-input.c b/drivers/media/usb/cx231xx/cx231xx-input.c index 9f88c640ec2b3..8149702bcf899 100644 --- a/drivers/media/usb/cx231xx/cx231xx-input.c +++ b/drivers/media/usb/cx231xx/cx231xx-input.c @@ -88,7 +88,7 @@ int cx231xx_ir_init(struct cx231xx *dev) ir_i2c_bus = cx231xx_boards[dev->model].ir_i2c_master; dev_dbg(dev->dev, "Trying to bind ir at bus %d, addr 0x%02x\n", ir_i2c_bus, info.addr); - dev->ir_i2c_client = i2c_new_device( + dev->ir_i2c_client = i2c_new_client_device( cx231xx_get_i2c_adap(dev, ir_i2c_bus), &info); return 0; @@ -96,7 +96,6 @@ int cx231xx_ir_init(struct cx231xx *dev) void cx231xx_ir_exit(struct cx231xx *dev) { - if (dev->ir_i2c_client) - i2c_unregister_device(dev->ir_i2c_client); + i2c_unregister_device(dev->ir_i2c_client); dev->ir_i2c_client = NULL; } -- GitLab From f263c8514a38619b17ece1ed37537bff8e25f2af Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 26 Mar 2020 22:09:45 +0100 Subject: [PATCH 068/503] media: usb: hdpvr: convert to use i2c_new_client_device() Move away from the deprecated API and return the shiny new ERRPTR where useful. Signed-off-by: Wolfram Sang Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/hdpvr/hdpvr-core.c | 4 ++-- drivers/media/usb/hdpvr/hdpvr-i2c.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/media/usb/hdpvr/hdpvr-core.c b/drivers/media/usb/hdpvr/hdpvr-core.c index b75c18a012a73..52e05a69c46ee 100644 --- a/drivers/media/usb/hdpvr/hdpvr-core.c +++ b/drivers/media/usb/hdpvr/hdpvr-core.c @@ -363,9 +363,9 @@ static int hdpvr_probe(struct usb_interface *interface, } client = hdpvr_register_ir_i2c(dev); - if (!client) { + if (IS_ERR(client)) { v4l2_err(&dev->v4l2_dev, "i2c IR device register failed\n"); - retval = -ENODEV; + retval = PTR_ERR(client); goto reg_fail; } #endif diff --git a/drivers/media/usb/hdpvr/hdpvr-i2c.c b/drivers/media/usb/hdpvr/hdpvr-i2c.c index 785c8508a46e5..070559b01b01b 100644 --- a/drivers/media/usb/hdpvr/hdpvr-i2c.c +++ b/drivers/media/usb/hdpvr/hdpvr-i2c.c @@ -44,7 +44,7 @@ struct i2c_client *hdpvr_register_ir_i2c(struct hdpvr_device *dev) init_data->polling_interval = 405; /* ms, duplicated from Windows */ info.platform_data = init_data; - return i2c_new_device(&dev->i2c_adapter, &info); + return i2c_new_client_device(&dev->i2c_adapter, &info); } static int hdpvr_i2c_read(struct hdpvr_device *dev, int bus, -- GitLab From 479ce8f5b1fb56fffa29ba737fd70ce5f574a365 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 26 Mar 2020 22:09:46 +0100 Subject: [PATCH 069/503] media: usb: pvrusb2: convert to use i2c_new_client_device() Move away from the deprecated API. Signed-off-by: Wolfram Sang Acked-by: Mike Isely Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/pvrusb2/pvrusb2-i2c-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/usb/pvrusb2/pvrusb2-i2c-core.c b/drivers/media/usb/pvrusb2/pvrusb2-i2c-core.c index 275394bafe7dd..63db04fe12d39 100644 --- a/drivers/media/usb/pvrusb2/pvrusb2-i2c-core.c +++ b/drivers/media/usb/pvrusb2/pvrusb2-i2c-core.c @@ -564,7 +564,7 @@ static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw) strscpy(info.type, "ir_video", I2C_NAME_SIZE); pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.", info.type, info.addr); - i2c_new_device(&hdw->i2c_adap, &info); + i2c_new_client_device(&hdw->i2c_adap, &info); break; case PVR2_IR_SCHEME_ZILOG: /* HVR-1950 style */ case PVR2_IR_SCHEME_24XXX_MCE: /* 24xxx MCE device */ @@ -579,7 +579,7 @@ static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw) strscpy(info.type, "ir_z8f0811_haup", I2C_NAME_SIZE); pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.", info.type, info.addr); - i2c_new_device(&hdw->i2c_adap, &info); + i2c_new_client_device(&hdw->i2c_adap, &info); break; default: /* The device either doesn't support I2C-based IR or we -- GitLab From 7ca02435ff25fd384dc7e02da7ea01fe2799ffce Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Mon, 23 Mar 2020 18:36:18 +0100 Subject: [PATCH 070/503] media: v4l2-common: change the pixel_enc of V4L2_PIX_FMT_GREY to YUV V4L2_PIX_FMT_GREY format is Ycbcr format without the color data, therefore its pixel_enc should set to V4L2_PIXEL_ENC_YUV. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index d0e5ebc736f9f..054f2e607dffc 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -250,7 +250,6 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) { .format = V4L2_PIX_FMT_RGBA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_ABGR32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_BGRA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, - { .format = V4L2_PIX_FMT_GREY, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_RGB565, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_RGB555, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, @@ -274,6 +273,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) { .format = V4L2_PIX_FMT_YUV420, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, { .format = V4L2_PIX_FMT_YVU420, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, { .format = V4L2_PIX_FMT_YUV422P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_GREY, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 1, .bpp = { 1, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, /* YUV planar formats, non contiguous variant */ { .format = V4L2_PIX_FMT_YUV420M, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 3, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, -- GitLab From cdb82f826eca487cda530909e543b6cfee61d89b Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Thu, 19 Mar 2020 23:59:36 +0100 Subject: [PATCH 071/503] media: imx.rst: Add example media graphs Add the media graph topologies for the i.MX6Q SabreSD and SabreAuto. This makes it easier to understand the topology and follow the entity descriptions in the following sections. Also clarify that the SabreSD and SabreLite media pipeline config examples are for the i.MX6Q boards. Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/imx.rst | 43 +++++++++++--- .../admin-guide/media/imx6q-sabreauto.dot | 51 +++++++++++++++++ .../admin-guide/media/imx6q-sabresd.dot | 56 +++++++++++++++++++ 3 files changed, 143 insertions(+), 7 deletions(-) create mode 100644 Documentation/admin-guide/media/imx6q-sabreauto.dot create mode 100644 Documentation/admin-guide/media/imx6q-sabresd.dot diff --git a/Documentation/admin-guide/media/imx.rst b/Documentation/admin-guide/media/imx.rst index 3182951c76513..5bb464754379d 100644 --- a/Documentation/admin-guide/media/imx.rst +++ b/Documentation/admin-guide/media/imx.rst @@ -102,6 +102,35 @@ Some of the features of this driver include: problems with the ADV718x video decoders. +Topology +-------- + +The following shows the media topologies for the i.MX6Q SabreSD and +i.MX6Q SabreAuto. Refer to these diagrams in the entity descriptions +in the next section. + +The i.MX5/6 topologies can differ upstream from the IPUv3 CSI video +multiplexers, but the internal IPUv3 topology downstream from there +is common to all i.MX5/6 platforms. For example, the SabreSD, with the +MIPI CSI-2 OV5640 sensor, requires the i.MX6 MIPI CSI-2 receiver. But +the SabreAuto has only the ADV7180 decoder on a parallel bt.656 bus, and +therefore does not require the MIPI CSI-2 receiver, so it is missing in +its graph. + +.. _imx6q_topology_graph: + +.. kernel-figure:: imx6q-sabresd.dot + :alt: Diagram of the i.MX6Q SabreSD media pipeline topology + :align: center + + Media pipeline graph on i.MX6Q SabreSD + +.. kernel-figure:: imx6q-sabreauto.dot + :alt: Diagram of the i.MX6Q SabreAuto media pipeline topology + :align: center + + Media pipeline graph on i.MX6Q SabreAuto + Entities -------- @@ -377,8 +406,8 @@ The following are specific usage notes for the Sabre* reference boards: -SabreLite with OV5642 and OV5640 --------------------------------- +i.MX6Q SabreLite with OV5642 and OV5640 +--------------------------------------- This platform requires the OmniVision OV5642 module with a parallel camera interface, and the OV5640 module with a MIPI CSI-2 @@ -547,12 +576,12 @@ used to select any supported YUV pixelformat on /dev/video2. This platform accepts Composite Video analog inputs to the ADV7180 on Ain1 (connector J42). -SabreSD with MIPI CSI-2 OV5640 ------------------------------- +i.MX6Q SabreSD with MIPI CSI-2 OV5640 +------------------------------------- -Similarly to SabreLite, the SabreSD supports a parallel interface -OV5642 module on IPU1 CSI0, and a MIPI CSI-2 OV5640 module. The OV5642 -connects to i2c bus 1 and the OV5640 to i2c bus 2. +Similarly to i.MX6Q SabreLite, the i.MX6Q SabreSD supports a parallel +interface OV5642 module on IPU1 CSI0, and a MIPI CSI-2 OV5640 +module. The OV5642 connects to i2c bus 1 and the OV5640 to i2c bus 2. The device tree for SabreSD includes OF graphs for both the parallel OV5642 and the MIPI CSI-2 OV5640, but as of this writing only the MIPI diff --git a/Documentation/admin-guide/media/imx6q-sabreauto.dot b/Documentation/admin-guide/media/imx6q-sabreauto.dot new file mode 100644 index 0000000000000..bd6cf0b358c0e --- /dev/null +++ b/Documentation/admin-guide/media/imx6q-sabreauto.dot @@ -0,0 +1,51 @@ +digraph board { + rankdir=TB + n00000001 [label="{{ 0} | ipu1_csi0\n/dev/v4l-subdev0 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n00000001:port2 -> n00000005 [style=dashed] + n00000001:port1 -> n0000000f:port0 [style=dashed] + n00000001:port1 -> n0000000b:port0 [style=dashed] + n00000005 [label="ipu1_csi0 capture\n/dev/video0", shape=box, style=filled, fillcolor=yellow] + n0000000b [label="{{ 0 | 1} | ipu1_vdic\n/dev/v4l-subdev1 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000b:port2 -> n0000000f:port0 [style=dashed] + n0000000f [label="{{ 0} | ipu1_ic_prp\n/dev/v4l-subdev2 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000f:port1 -> n00000013:port0 [style=dashed] + n0000000f:port2 -> n0000001c:port0 [style=dashed] + n00000013 [label="{{ 0} | ipu1_ic_prpenc\n/dev/v4l-subdev3 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000013:port1 -> n00000016 [style=dashed] + n00000016 [label="ipu1_ic_prpenc capture\n/dev/video1", shape=box, style=filled, fillcolor=yellow] + n0000001c [label="{{ 0} | ipu1_ic_prpvf\n/dev/v4l-subdev4 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000001c:port1 -> n0000001f [style=dashed] + n0000001f [label="ipu1_ic_prpvf capture\n/dev/video2", shape=box, style=filled, fillcolor=yellow] + n0000002f [label="{{ 0} | ipu1_csi1\n/dev/v4l-subdev5 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000002f:port2 -> n00000033 [style=dashed] + n0000002f:port1 -> n0000000f:port0 [style=dashed] + n0000002f:port1 -> n0000000b:port0 [style=dashed] + n00000033 [label="ipu1_csi1 capture\n/dev/video3", shape=box, style=filled, fillcolor=yellow] + n0000003d [label="{{ 0} | ipu2_csi0\n/dev/v4l-subdev6 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000003d:port2 -> n00000041 [style=dashed] + n0000003d:port1 -> n0000004b:port0 [style=dashed] + n0000003d:port1 -> n00000047:port0 [style=dashed] + n00000041 [label="ipu2_csi0 capture\n/dev/video4", shape=box, style=filled, fillcolor=yellow] + n00000047 [label="{{ 0 | 1} | ipu2_vdic\n/dev/v4l-subdev7 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n00000047:port2 -> n0000004b:port0 [style=dashed] + n0000004b [label="{{ 0} | ipu2_ic_prp\n/dev/v4l-subdev8 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000004b:port1 -> n0000004f:port0 [style=dashed] + n0000004b:port2 -> n00000058:port0 [style=dashed] + n0000004f [label="{{ 0} | ipu2_ic_prpenc\n/dev/v4l-subdev9 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000004f:port1 -> n00000052 [style=dashed] + n00000052 [label="ipu2_ic_prpenc capture\n/dev/video5", shape=box, style=filled, fillcolor=yellow] + n00000058 [label="{{ 0} | ipu2_ic_prpvf\n/dev/v4l-subdev10 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000058:port1 -> n0000005b [style=dashed] + n0000005b [label="ipu2_ic_prpvf capture\n/dev/video6", shape=box, style=filled, fillcolor=yellow] + n0000006b [label="{{ 0} | ipu2_csi1\n/dev/v4l-subdev11 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000006b:port2 -> n0000006f [style=dashed] + n0000006b:port1 -> n0000004b:port0 [style=dashed] + n0000006b:port1 -> n00000047:port0 [style=dashed] + n0000006f [label="ipu2_csi1 capture\n/dev/video7", shape=box, style=filled, fillcolor=yellow] + n00000079 [label="{{ 0 | 1} | ipu1_csi0_mux\n/dev/v4l-subdev12 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n00000079:port2 -> n00000001:port0 [style=dashed] + n0000007d [label="{{ 0 | 1} | ipu2_csi1_mux\n/dev/v4l-subdev13 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000007d:port2 -> n0000006b:port0 [style=dashed] + n00000081 [label="{{} | adv7180 3-0021\n/dev/v4l-subdev14 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n00000081:port0 -> n00000079:port1 [style=dashed] +} diff --git a/Documentation/admin-guide/media/imx6q-sabresd.dot b/Documentation/admin-guide/media/imx6q-sabresd.dot new file mode 100644 index 0000000000000..7d56cafa19446 --- /dev/null +++ b/Documentation/admin-guide/media/imx6q-sabresd.dot @@ -0,0 +1,56 @@ +digraph board { + rankdir=TB + n00000001 [label="{{ 0} | ipu1_csi0\n/dev/v4l-subdev0 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n00000001:port2 -> n00000005 [style=dashed] + n00000001:port1 -> n0000000f:port0 [style=dashed] + n00000001:port1 -> n0000000b:port0 [style=dashed] + n00000005 [label="ipu1_csi0 capture\n/dev/video0", shape=box, style=filled, fillcolor=yellow] + n0000000b [label="{{ 0 | 1} | ipu1_vdic\n/dev/v4l-subdev1 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000b:port2 -> n0000000f:port0 [style=dashed] + n0000000f [label="{{ 0} | ipu1_ic_prp\n/dev/v4l-subdev2 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000f:port1 -> n00000013:port0 [style=dashed] + n0000000f:port2 -> n0000001c:port0 [style=dashed] + n00000013 [label="{{ 0} | ipu1_ic_prpenc\n/dev/v4l-subdev3 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000013:port1 -> n00000016 [style=dashed] + n00000016 [label="ipu1_ic_prpenc capture\n/dev/video1", shape=box, style=filled, fillcolor=yellow] + n0000001c [label="{{ 0} | ipu1_ic_prpvf\n/dev/v4l-subdev4 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000001c:port1 -> n0000001f [style=dashed] + n0000001f [label="ipu1_ic_prpvf capture\n/dev/video2", shape=box, style=filled, fillcolor=yellow] + n0000002f [label="{{ 0} | ipu1_csi1\n/dev/v4l-subdev5 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000002f:port2 -> n00000033 [style=dashed] + n0000002f:port1 -> n0000000f:port0 [style=dashed] + n0000002f:port1 -> n0000000b:port0 [style=dashed] + n00000033 [label="ipu1_csi1 capture\n/dev/video3", shape=box, style=filled, fillcolor=yellow] + n0000003d [label="{{ 0} | ipu2_csi0\n/dev/v4l-subdev6 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000003d:port2 -> n00000041 [style=dashed] + n0000003d:port1 -> n0000004b:port0 [style=dashed] + n0000003d:port1 -> n00000047:port0 [style=dashed] + n00000041 [label="ipu2_csi0 capture\n/dev/video4", shape=box, style=filled, fillcolor=yellow] + n00000047 [label="{{ 0 | 1} | ipu2_vdic\n/dev/v4l-subdev7 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n00000047:port2 -> n0000004b:port0 [style=dashed] + n0000004b [label="{{ 0} | ipu2_ic_prp\n/dev/v4l-subdev8 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000004b:port1 -> n0000004f:port0 [style=dashed] + n0000004b:port2 -> n00000058:port0 [style=dashed] + n0000004f [label="{{ 0} | ipu2_ic_prpenc\n/dev/v4l-subdev9 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000004f:port1 -> n00000052 [style=dashed] + n00000052 [label="ipu2_ic_prpenc capture\n/dev/video5", shape=box, style=filled, fillcolor=yellow] + n00000058 [label="{{ 0} | ipu2_ic_prpvf\n/dev/v4l-subdev10 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000058:port1 -> n0000005b [style=dashed] + n0000005b [label="ipu2_ic_prpvf capture\n/dev/video6", shape=box, style=filled, fillcolor=yellow] + n0000006b [label="{{ 0} | ipu2_csi1\n/dev/v4l-subdev11 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000006b:port2 -> n0000006f [style=dashed] + n0000006b:port1 -> n0000004b:port0 [style=dashed] + n0000006b:port1 -> n00000047:port0 [style=dashed] + n0000006f [label="ipu2_csi1 capture\n/dev/video7", shape=box, style=filled, fillcolor=yellow] + n00000079 [label="{{ 0} | imx6-mipi-csi2\n/dev/v4l-subdev12 | { 1 | 2 | 3 | 4}}", shape=Mrecord, style=filled, fillcolor=green] + n00000079:port2 -> n0000002f:port0 [style=dashed] + n00000079:port3 -> n0000003d:port0 [style=dashed] + n00000079:port1 -> n0000007f:port0 [style=dashed] + n00000079:port4 -> n00000083:port0 [style=dashed] + n0000007f [label="{{ 0 | 1} | ipu1_csi0_mux\n/dev/v4l-subdev13 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n0000007f:port2 -> n00000001:port0 [style=dashed] + n00000083 [label="{{ 0 | 1} | ipu2_csi1_mux\n/dev/v4l-subdev14 | { 2}}", shape=Mrecord, style=filled, fillcolor=green] + n00000083:port2 -> n0000006b:port0 [style=dashed] + n00000087 [label="{{} | ov5640 1-003c\n/dev/v4l-subdev15 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n00000087:port0 -> n00000079:port0 [style=dashed] +} -- GitLab From 4eaaf0861fa601fdbceacae6248ffb1d28e1259c Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Mon, 16 Mar 2020 16:56:26 +0100 Subject: [PATCH 072/503] media: doc-rst: in the RGB formats table add '-' in undefined bits In the table of the RGB formats, add an explicit '-' signs to cells that contain undefined bits. This makes it more clear how many bits and bytes are used for each format. Signed-off-by: Dafna Hirschfeld Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../userspace-api/media/v4l/pixfmt-rgb.rst | 136 +++++++++--------- 1 file changed, 68 insertions(+), 68 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst b/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst index b6c0c942d9d15..89cc2a37b2855 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-rgb.rst @@ -128,10 +128,10 @@ next to each other in memory. - b\ :sub:`1` - b\ :sub:`0` - - - - - - - - + - `-` + - `-` + - `-` + - `-` - r\ :sub:`3` - r\ :sub:`2` - r\ :sub:`1` @@ -169,10 +169,10 @@ next to each other in memory. - b\ :sub:`2` - b\ :sub:`1` - b\ :sub:`0` - - - - - - - - + - `-` + - `-` + - `-` + - `-` - r\ :sub:`3` - r\ :sub:`2` @@ -220,10 +220,10 @@ next to each other in memory. - r\ :sub:`1` - r\ :sub:`0` - - - - - - - - + - `-` + - `-` + - `-` + - `-` - b\ :sub:`3` - b\ :sub:`2` - b\ :sub:`1` @@ -261,10 +261,10 @@ next to each other in memory. - r\ :sub:`2` - r\ :sub:`1` - r\ :sub:`0` - - - - - - - - + - `-` + - `-` + - `-` + - `-` - b\ :sub:`3` - b\ :sub:`2` @@ -312,7 +312,7 @@ next to each other in memory. - b\ :sub:`1` - b\ :sub:`0` - - + - `-` - r\ :sub:`4` - r\ :sub:`3` - r\ :sub:`2` @@ -356,7 +356,7 @@ next to each other in memory. - b\ :sub:`2` - b\ :sub:`1` - b\ :sub:`0` - - + - `-` - r\ :sub:`4` - r\ :sub:`3` @@ -404,7 +404,7 @@ next to each other in memory. - r\ :sub:`1` - r\ :sub:`0` - - + - `-` - b\ :sub:`4` - b\ :sub:`3` - b\ :sub:`2` @@ -448,7 +448,7 @@ next to each other in memory. - r\ :sub:`2` - r\ :sub:`1` - r\ :sub:`0` - - + - `-` - b\ :sub:`4` - b\ :sub:`3` @@ -510,7 +510,7 @@ next to each other in memory. - ``V4L2_PIX_FMT_XRGB555X`` - 'XR15' | (1 << 31) - - + - `-` - r\ :sub:`4` - r\ :sub:`3` - r\ :sub:`2` @@ -640,21 +640,21 @@ next to each other in memory. - r\ :sub:`1` - r\ :sub:`0` - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` * .. _V4L2-PIX-FMT-ABGR32: - ``V4L2_PIX_FMT_ABGR32`` @@ -727,14 +727,14 @@ next to each other in memory. - r\ :sub:`1` - r\ :sub:`0` - - - - - - - - - - - - - - - - + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` * .. _V4L2-PIX-FMT-BGRA32: - ``V4L2_PIX_FMT_BGRA32`` @@ -780,14 +780,14 @@ next to each other in memory. - ``V4L2_PIX_FMT_BGRX32`` - 'RX24' - - - - - - - - - - - - - - - - + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` - b\ :sub:`7` - b\ :sub:`6` @@ -887,14 +887,14 @@ next to each other in memory. - b\ :sub:`1` - b\ :sub:`0` - - - - - - - - - - - - - - - - + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` * .. _V4L2-PIX-FMT-ARGB32: - ``V4L2_PIX_FMT_ARGB32`` @@ -940,14 +940,14 @@ next to each other in memory. - ``V4L2_PIX_FMT_XRGB32`` - 'BX24' - - - - - - - - - - - - - - - - + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` + - `-` - r\ :sub:`7` - r\ :sub:`6` -- GitLab From 58d4c14ed89ca51c782cab7ae6bf2c5215109204 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Mon, 16 Mar 2020 08:01:23 +0100 Subject: [PATCH 073/503] media: v4l2-common: Add BGR666 to v4l2_format_info Add V4L2_PIX_FMT_BGR666 to the format table. Signed-off-by: Dafna Hirschfeld Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 054f2e607dffc..9e8eb45a5b03c 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -252,6 +252,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) { .format = V4L2_PIX_FMT_BGRA32, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_RGB565, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, { .format = V4L2_PIX_FMT_RGB555, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, + { .format = V4L2_PIX_FMT_BGR666, .pixel_enc = V4L2_PIXEL_ENC_RGB, .mem_planes = 1, .comp_planes = 1, .bpp = { 4, 0, 0, 0 }, .hdiv = 1, .vdiv = 1 }, /* YUV packed formats */ { .format = V4L2_PIX_FMT_YUYV, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 1, .bpp = { 2, 0, 0, 0 }, .hdiv = 2, .vdiv = 1 }, -- GitLab From dbe939814cfa0154421ab1643f48b7cdd379d522 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:35:31 +0100 Subject: [PATCH 074/503] media: coda: round up decoded buffer size for all codecs The BIT decoders always write 16x16 macroblocks. Align stride and height to avoid spilling luma data into the top of the chroma planes. Signed-off-by: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/coda/coda-common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c index d0d093dd8f7cf..46163e524c1ed 100644 --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c @@ -637,8 +637,8 @@ static int coda_try_fmt_vid_cap(struct file *file, void *priv, if (ret < 0) return ret; - /* The h.264 decoder only returns complete 16x16 macroblocks */ - if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) { + /* The decoders always write complete macroblocks */ + if (ctx->inst_type == CODA_INST_DECODER) { f->fmt.pix.height = round_up(f->fmt.pix.height, 16); f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16); f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * -- GitLab From 50733b5b9102da5b2415e3497aa89588396e4f20 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:35:32 +0100 Subject: [PATCH 075/503] media: add v4l2 JPEG helpers Add helpers for JPEG header parsing. They allow both scanning for marker segment positions and later parsing the segments individually, as required by s5p-jpeg, as well as parsing all headers in one go, as required by coda-vpu. The frame header is always parsed, as basically all decoders are interested in width, height, and number of components. For convenience, the JPEG chroma subsampling factors are decoded into a v4l2_jpeg_chroma_subsampling enum. Only baseline and extended sequential DCT encoded JPEGs with 8-bit or 12-bit precision with up to four components are supported. Signed-off-by: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/Kconfig | 4 + drivers/media/v4l2-core/Makefile | 2 + drivers/media/v4l2-core/v4l2-jpeg.c | 632 ++++++++++++++++++++++++++++ include/media/v4l2-jpeg.h | 135 ++++++ 4 files changed, 773 insertions(+) create mode 100644 drivers/media/v4l2-core/v4l2-jpeg.c create mode 100644 include/media/v4l2-jpeg.h diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig index 33aa7fe571f8d..3fa75352d04cb 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig @@ -44,6 +44,10 @@ config VIDEO_FIXED_MINOR_RANGES config VIDEO_TUNER tristate +# Used by drivers that need v4l2-jpeg.ko +config V4L2_JPEG_HELPER + tristate + # Used by drivers that need v4l2-mem2mem.ko config V4L2_MEM2MEM_DEV tristate diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile index 786bd1ec4d1b4..144564656d22b 100644 --- a/drivers/media/v4l2-core/Makefile +++ b/drivers/media/v4l2-core/Makefile @@ -24,6 +24,8 @@ obj-$(CONFIG_V4L2_MEM2MEM_DEV) += v4l2-mem2mem.o obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o +obj-$(CONFIG_V4L2_JPEG_HELPER) += v4l2-jpeg.o + obj-$(CONFIG_VIDEOBUF_GEN) += videobuf-core.o obj-$(CONFIG_VIDEOBUF_DMA_SG) += videobuf-dma-sg.o obj-$(CONFIG_VIDEOBUF_DMA_CONTIG) += videobuf-dma-contig.o diff --git a/drivers/media/v4l2-core/v4l2-jpeg.c b/drivers/media/v4l2-core/v4l2-jpeg.c new file mode 100644 index 0000000000000..8947fd95c6f12 --- /dev/null +++ b/drivers/media/v4l2-core/v4l2-jpeg.c @@ -0,0 +1,632 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * V4L2 JPEG header parser helpers. + * + * Copyright (C) 2019 Pengutronix, Philipp Zabel + * + * For reference, see JPEG ITU-T.81 (ISO/IEC 10918-1) [1] + * + * [1] https://www.w3.org/Graphics/JPEG/itu-t81.pdf + */ + +#include +#include +#include +#include +#include +#include + +MODULE_DESCRIPTION("V4L2 JPEG header parser helpers"); +MODULE_AUTHOR("Philipp Zabel "); +MODULE_LICENSE("GPL"); + +/* Table B.1 - Marker code assignments */ +#define SOF0 0xffc0 /* start of frame */ +#define SOF1 0xffc1 +#define SOF2 0xffc2 +#define SOF3 0xffc3 +#define SOF5 0xffc5 +#define SOF7 0xffc7 +#define JPG 0xffc8 /* extensions */ +#define SOF9 0xffc9 +#define SOF11 0xffcb +#define SOF13 0xffcd +#define SOF15 0xffcf +#define DHT 0xffc4 /* huffman table */ +#define DAC 0xffcc /* arithmetic coding conditioning */ +#define RST0 0xffd0 /* restart */ +#define RST7 0xffd7 +#define SOI 0xffd8 /* start of image */ +#define EOI 0xffd9 /* end of image */ +#define SOS 0xffda /* start of stream */ +#define DQT 0xffdb /* quantization table */ +#define DNL 0xffdc /* number of lines */ +#define DRI 0xffdd /* restart interval */ +#define DHP 0xffde /* hierarchical progression */ +#define EXP 0xffdf /* expand reference */ +#define APP0 0xffe0 /* application data */ +#define APP15 0xffef +#define JPG0 0xfff0 /* extensions */ +#define JPG13 0xfffd +#define COM 0xfffe /* comment */ +#define TEM 0xff01 /* temporary */ + +/** + * struct jpeg_stream - JPEG byte stream + * @curr: current position in stream + * @end: end position, after last byte + */ +struct jpeg_stream { + u8 *curr; + u8 *end; +}; + +/* returns a value that fits into u8, or negative error */ +static int jpeg_get_byte(struct jpeg_stream *stream) +{ + if (stream->curr >= stream->end) + return -EINVAL; + + return *stream->curr++; +} + +/* returns a value that fits into u16, or negative error */ +static int jpeg_get_word_be(struct jpeg_stream *stream) +{ + u16 word; + + if (stream->curr + sizeof(__be16) > stream->end) + return -EINVAL; + + word = get_unaligned_be16(stream->curr); + stream->curr += sizeof(__be16); + + return word; +} + +static int jpeg_skip(struct jpeg_stream *stream, size_t len) +{ + if (stream->curr + len > stream->end) + return -EINVAL; + + stream->curr += len; + + return 0; +} + +static int jpeg_next_marker(struct jpeg_stream *stream) +{ + int byte; + u16 marker = 0; + + while ((byte = jpeg_get_byte(stream)) >= 0) { + marker = (marker << 8) | byte; + /* skip stuffing bytes and REServed markers */ + if (marker == TEM || (marker > 0xffbf && marker < 0xffff)) + return marker; + } + + return byte; +} + +/* this does not advance the current position in the stream */ +static int jpeg_reference_segment(struct jpeg_stream *stream, + struct v4l2_jpeg_reference *segment) +{ + u16 len; + + if (stream->curr + sizeof(__be16) > stream->end) + return -EINVAL; + + len = get_unaligned_be16(stream->curr); + if (stream->curr + len > stream->end) + return -EINVAL; + + segment->start = stream->curr; + segment->length = len; + + return 0; +} + +static int v4l2_jpeg_decode_subsampling(u8 nf, u8 h_v) +{ + if (nf == 1) + return V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY; + + /* no chroma subsampling for 4-component images */ + if (nf == 4 && h_v != 0x11) + return -EINVAL; + + switch (h_v) { + case 0x11: + return V4L2_JPEG_CHROMA_SUBSAMPLING_444; + case 0x21: + return V4L2_JPEG_CHROMA_SUBSAMPLING_422; + case 0x22: + return V4L2_JPEG_CHROMA_SUBSAMPLING_420; + case 0x41: + return V4L2_JPEG_CHROMA_SUBSAMPLING_411; + default: + return -EINVAL; + } +} + +static int jpeg_parse_frame_header(struct jpeg_stream *stream, u16 sof_marker, + struct v4l2_jpeg_frame_header *frame_header) +{ + int len = jpeg_get_word_be(stream); + + if (len < 0) + return len; + /* Lf = 8 + 3 * Nf, Nf >= 1 */ + if (len < 8 + 3) + return -EINVAL; + + if (frame_header) { + /* Table B.2 - Frame header parameter sizes and values */ + int p, y, x, nf; + int i; + + p = jpeg_get_byte(stream); + if (p < 0) + return p; + /* + * Baseline DCT only supports 8-bit precision. + * Extended sequential DCT also supports 12-bit precision. + */ + if (p != 8 && (p != 12 || sof_marker != SOF1)) + return -EINVAL; + + y = jpeg_get_word_be(stream); + if (y < 0) + return y; + if (y == 0) + return -EINVAL; + + x = jpeg_get_word_be(stream); + if (x < 0) + return x; + if (x == 0) + return -EINVAL; + + nf = jpeg_get_byte(stream); + if (nf < 0) + return nf; + /* + * The spec allows 1 <= Nf <= 255, but we only support up to 4 + * components. + */ + if (nf < 1 || nf > V4L2_JPEG_MAX_COMPONENTS) + return -EINVAL; + if (len != 8 + 3 * nf) + return -EINVAL; + + frame_header->precision = p; + frame_header->height = y; + frame_header->width = x; + frame_header->num_components = nf; + + for (i = 0; i < nf; i++) { + struct v4l2_jpeg_frame_component_spec *component; + int c, h_v, tq; + + c = jpeg_get_byte(stream); + if (c < 0) + return c; + + h_v = jpeg_get_byte(stream); + if (h_v < 0) + return h_v; + if (i == 0) { + int subs; + + subs = v4l2_jpeg_decode_subsampling(nf, h_v); + if (subs < 0) + return subs; + frame_header->subsampling = subs; + } else if (h_v != 0x11) { + /* all chroma sampling factors must be 1 */ + return -EINVAL; + } + + tq = jpeg_get_byte(stream); + if (tq < 0) + return tq; + + component = &frame_header->component[i]; + component->component_identifier = c; + component->horizontal_sampling_factor = + (h_v >> 4) & 0xf; + component->vertical_sampling_factor = h_v & 0xf; + component->quantization_table_selector = tq; + } + } else { + return jpeg_skip(stream, len - 2); + } + + return 0; +} + +static int jpeg_parse_scan_header(struct jpeg_stream *stream, + struct v4l2_jpeg_scan_header *scan_header) +{ + size_t skip; + int len = jpeg_get_word_be(stream); + + if (len < 0) + return len; + /* Ls = 8 + 3 * Ns, Ns >= 1 */ + if (len < 6 + 2) + return -EINVAL; + + if (scan_header) { + int ns; + int i; + + ns = jpeg_get_byte(stream); + if (ns < 0) + return ns; + if (ns < 1 || ns > 4 || len != 6 + 2 * ns) + return -EINVAL; + + scan_header->num_components = ns; + + for (i = 0; i < ns; i++) { + struct v4l2_jpeg_scan_component_spec *component; + int cs, td_ta; + + cs = jpeg_get_byte(stream); + if (cs < 0) + return cs; + + td_ta = jpeg_get_byte(stream); + if (td_ta < 0) + return td_ta; + + component = &scan_header->component[i]; + component->component_selector = cs; + component->dc_entropy_coding_table_selector = + (td_ta >> 4) & 0xf; + component->ac_entropy_coding_table_selector = + td_ta & 0xf; + } + + skip = 3; /* skip Ss, Se, Ah, and Al */ + } else { + skip = len - 2; + } + + return jpeg_skip(stream, skip); +} + +/* B.2.4.1 Quantization table-specification syntax */ +static int jpeg_parse_quantization_tables(struct jpeg_stream *stream, + u8 precision, + struct v4l2_jpeg_reference *tables) +{ + int len = jpeg_get_word_be(stream); + + if (len < 0) + return len; + /* Lq = 2 + n * 65 (for baseline DCT), n >= 1 */ + if (len < 2 + 65) + return -EINVAL; + + len -= 2; + while (len >= 65) { + u8 pq, tq, *qk; + int ret; + int pq_tq = jpeg_get_byte(stream); + + if (pq_tq < 0) + return pq_tq; + + /* quantization table element precision */ + pq = (pq_tq >> 4) & 0xf; + /* + * Only 8-bit Qk values for 8-bit sample precision. Extended + * sequential DCT with 12-bit sample precision also supports + * 16-bit Qk values. + */ + if (pq != 0 && (pq != 1 || precision != 12)) + return -EINVAL; + + /* quantization table destination identifier */ + tq = pq_tq & 0xf; + if (tq > 3) + return -EINVAL; + + /* quantization table element */ + qk = stream->curr; + ret = jpeg_skip(stream, pq ? 128 : 64); + if (ret < 0) + return -EINVAL; + + if (tables) { + tables[tq].start = qk; + tables[tq].length = pq ? 128 : 64; + } + + len -= pq ? 129 : 65; + } + + return 0; +} + +/* B.2.4.2 Huffman table-specification syntax */ +static int jpeg_parse_huffman_tables(struct jpeg_stream *stream, + struct v4l2_jpeg_reference *tables) +{ + int mt; + int len = jpeg_get_word_be(stream); + + if (len < 0) + return len; + /* Table B.5 - Huffman table specification parameter sizes and values */ + if (len < 2 + 17) + return -EINVAL; + + for (len -= 2; len >= 17; len -= 17 + mt) { + u8 tc, th, *table; + int tc_th = jpeg_get_byte(stream); + int i, ret; + + if (tc_th < 0) + return tc_th; + + /* table class - 0 = DC, 1 = AC */ + tc = (tc_th >> 4) & 0xf; + if (tc > 1) + return -EINVAL; + + /* huffman table destination identifier */ + th = tc_th & 0xf; + /* only two Huffman tables for baseline DCT */ + if (th > 1) + return -EINVAL; + + /* BITS - number of Huffman codes with length i */ + table = stream->curr; + mt = 0; + for (i = 0; i < 16; i++) { + int li; + + li = jpeg_get_byte(stream); + if (li < 0) + return li; + + mt += li; + } + /* HUFFVAL - values associated with each Huffman code */ + ret = jpeg_skip(stream, mt); + if (ret < 0) + return ret; + + if (tables) { + tables[(tc << 1) | th].start = table; + tables[(tc << 1) | th].length = stream->curr - table; + } + } + + return jpeg_skip(stream, len - 2); +} + +/* B.2.4.4 Restart interval definition syntax */ +static int jpeg_parse_restart_interval(struct jpeg_stream *stream, + u16 *restart_interval) +{ + int len = jpeg_get_word_be(stream); + int ri; + + if (len < 0) + return len; + if (len != 4) + return -EINVAL; + + ri = jpeg_get_word_be(stream); + if (ri < 0) + return ri; + + *restart_interval = ri; + + return 0; +} + +static int jpeg_skip_segment(struct jpeg_stream *stream) +{ + int len = jpeg_get_word_be(stream); + + if (len < 0) + return len; + if (len < 2) + return -EINVAL; + + return jpeg_skip(stream, len - 2); +} + +/** + * jpeg_parse_header - locate marker segments and optionally parse headers + * @buf: address of the JPEG buffer, should start with a SOI marker + * @len: length of the JPEG buffer + * @out: returns marker segment positions and optionally parsed headers + * + * The out->scan_header pointer must be initialized to NULL or point to a valid + * v4l2_jpeg_scan_header structure. The out->huffman_tables and + * out->quantization_tables pointers must be initialized to NULL or point to a + * valid array of 4 v4l2_jpeg_reference structures each. + * + * Returns 0 or negative error if parsing failed. + */ +int v4l2_jpeg_parse_header(void *buf, size_t len, struct v4l2_jpeg_header *out) +{ + struct jpeg_stream stream; + int marker; + int ret = 0; + + stream.curr = buf; + stream.end = stream.curr + len; + + out->num_dht = 0; + out->num_dqt = 0; + + /* the first marker must be SOI */ + marker = jpeg_next_marker(&stream); + if (marker < 0) + return marker; + if (marker != SOI) + return -EINVAL; + + /* loop through marker segments */ + while ((marker = jpeg_next_marker(&stream)) >= 0) { + switch (marker) { + /* baseline DCT, extended sequential DCT */ + case SOF0 ... SOF1: + ret = jpeg_reference_segment(&stream, &out->sof); + if (ret < 0) + return ret; + ret = jpeg_parse_frame_header(&stream, marker, + &out->frame); + break; + /* progressive, lossless */ + case SOF2 ... SOF3: + /* differential coding */ + case SOF5 ... SOF7: + /* arithmetic coding */ + case SOF9 ... SOF11: + case SOF13 ... SOF15: + case DAC: + case TEM: + return -EINVAL; + + case DHT: + ret = jpeg_reference_segment(&stream, + &out->dht[out->num_dht++ % 4]); + if (ret < 0) + return ret; + ret = jpeg_parse_huffman_tables(&stream, + out->huffman_tables); + break; + case DQT: + ret = jpeg_reference_segment(&stream, + &out->dqt[out->num_dqt++ % 4]); + if (ret < 0) + return ret; + ret = jpeg_parse_quantization_tables(&stream, + out->frame.precision, + out->quantization_tables); + break; + case DRI: + ret = jpeg_parse_restart_interval(&stream, + &out->restart_interval); + break; + + case SOS: + ret = jpeg_reference_segment(&stream, &out->sos); + if (ret < 0) + return ret; + ret = jpeg_parse_scan_header(&stream, out->scan); + /* + * stop parsing, the scan header marks the beginning of + * the entropy coded segment + */ + out->ecs_offset = stream.curr - (u8 *)buf; + return ret; + + /* markers without parameters */ + case RST0 ... RST7: /* restart */ + case SOI: /* start of image */ + case EOI: /* end of image */ + break; + + /* skip unknown or unsupported marker segments */ + default: + ret = jpeg_skip_segment(&stream); + break; + } + if (ret < 0) + return ret; + } + + return marker; +} +EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_header); + +/** + * v4l2_jpeg_parse_frame_header - parse frame header + * @buf: address of the frame header, after the SOF0 marker + * @len: length of the frame header + * @frame_header: returns the parsed frame header + * + * Returns 0 or negative error if parsing failed. + */ +int v4l2_jpeg_parse_frame_header(void *buf, size_t len, + struct v4l2_jpeg_frame_header *frame_header) +{ + struct jpeg_stream stream; + + stream.curr = buf; + stream.end = stream.curr + len; + return jpeg_parse_frame_header(&stream, SOF0, frame_header); +} +EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_frame_header); + +/** + * v4l2_jpeg_parse_scan_header - parse scan header + * @buf: address of the scan header, after the SOS marker + * @len: length of the scan header + * @scan_header: returns the parsed scan header + * + * Returns 0 or negative error if parsing failed. + */ +int v4l2_jpeg_parse_scan_header(void *buf, size_t len, + struct v4l2_jpeg_scan_header *scan_header) +{ + struct jpeg_stream stream; + + stream.curr = buf; + stream.end = stream.curr + len; + return jpeg_parse_scan_header(&stream, scan_header); +} +EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_scan_header); + +/** + * v4l2_jpeg_parse_quantization_tables - parse quantization tables segment + * @buf: address of the quantization table segment, after the DQT marker + * @len: length of the quantization table segment + * @precision: sample precision (P) in bits per component + * @q_tables: returns four references into the buffer for the + * four possible quantization table destinations + * + * Returns 0 or negative error if parsing failed. + */ +int v4l2_jpeg_parse_quantization_tables(void *buf, size_t len, u8 precision, + struct v4l2_jpeg_reference *q_tables) +{ + struct jpeg_stream stream; + + stream.curr = buf; + stream.end = stream.curr + len; + return jpeg_parse_quantization_tables(&stream, precision, q_tables); +} +EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_quantization_tables); + +/** + * v4l2_jpeg_parse_huffman_tables - parse huffman tables segment + * @buf: address of the Huffman table segment, after the DHT marker + * @len: length of the Huffman table segment + * @huffman_tables: returns four references into the buffer for the + * four possible Huffman table destinations, in + * the order DC0, DC1, AC0, AC1 + * + * Returns 0 or negative error if parsing failed. + */ +int v4l2_jpeg_parse_huffman_tables(void *buf, size_t len, + struct v4l2_jpeg_reference *huffman_tables) +{ + struct jpeg_stream stream; + + stream.curr = buf; + stream.end = stream.curr + len; + return jpeg_parse_huffman_tables(&stream, huffman_tables); +} +EXPORT_SYMBOL_GPL(v4l2_jpeg_parse_huffman_tables); diff --git a/include/media/v4l2-jpeg.h b/include/media/v4l2-jpeg.h new file mode 100644 index 0000000000000..ddba2a56c3214 --- /dev/null +++ b/include/media/v4l2-jpeg.h @@ -0,0 +1,135 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * V4L2 JPEG helpers header + * + * Copyright (C) 2019 Pengutronix, Philipp Zabel + * + * For reference, see JPEG ITU-T.81 (ISO/IEC 10918-1) + */ + +#ifndef _V4L2_JPEG_H +#define _V4L2_JPEG_H + +#include + +#define V4L2_JPEG_MAX_COMPONENTS 4 +#define V4L2_JPEG_MAX_TABLES 4 + +/** + * struct v4l2_jpeg_reference - reference into the JPEG buffer + * @start: pointer to the start of the referenced segment or table + * @length: size of the referenced segment or table + * + * Wnen referencing marker segments, start points right after the marker code, + * and length is the size of the segment parameters, excluding the marker code. + */ +struct v4l2_jpeg_reference { + u8 *start; + size_t length; +}; + +/* B.2.2 Frame header syntax */ + +/** + * struct v4l2_jpeg_frame_component_spec - frame component-specification + * @component_identifier: C[i] + * @horizontal_sampling_factor: H[i] + * @vertical_sampling_factor: V[i] + * @quantization_table_selector: quantization table destination selector Tq[i] + */ +struct v4l2_jpeg_frame_component_spec { + u8 component_identifier; + u8 horizontal_sampling_factor; + u8 vertical_sampling_factor; + u8 quantization_table_selector; +}; + +/** + * struct v4l2_jpeg_frame_header - JPEG frame header + * @height: Y + * @width: X + * @precision: P + * @num_components: Nf + * @component: component-specification, see v4l2_jpeg_frame_component_spec + * @subsampling: decoded subsampling from component-specification + */ +struct v4l2_jpeg_frame_header { + u16 height; + u16 width; + u8 precision; + u8 num_components; + struct v4l2_jpeg_frame_component_spec component[V4L2_JPEG_MAX_COMPONENTS]; + enum v4l2_jpeg_chroma_subsampling subsampling; +}; + +/* B.2.3 Scan header syntax */ + +/** + * struct v4l2_jpeg_scan_component_spec - scan component-specification + * @component_selector: Cs[j] + * @dc_entropy_coding_table_selector: Td[j] + * @ac_entropy_coding_table_selector: Ta[j] + */ +struct v4l2_jpeg_scan_component_spec { + u8 component_selector; + u8 dc_entropy_coding_table_selector; + u8 ac_entropy_coding_table_selector; +}; + +/** + * struct v4l2_jpeg_scan_header - JPEG scan header + * @num_components: Ns + * @component: component-specification, see v4l2_jpeg_scan_component_spec + */ +struct v4l2_jpeg_scan_header { + u8 num_components; /* Ns */ + struct v4l2_jpeg_scan_component_spec component[V4L2_JPEG_MAX_COMPONENTS]; + /* Ss, Se, Ah, and Al are not used by any driver */ +}; + +/** + * struct v4l2_jpeg_header - parsed JPEG header + * @sof: pointer to frame header and size + * @sos: pointer to scan header and size + * @dht: pointers to huffman tables and sizes + * @dqt: pointers to quantization tables and sizes + * @frame: parsed frame header + * @scan: pointer to parsed scan header, optional + * @quantization_tables: references to four quantization tables, optional + * @huffman_tables: references to four Huffman tables in DC0, DC1, AC0, AC1 + * order, optional + * @restart_interval: number of MCU per restart interval, Ri + * @ecs_offset: buffer offset in bytes to the entropy coded segment + * + * When this structure is passed to v4l2_jpeg_parse_header, the optional scan, + * quantization_tables, and huffman_tables pointers must be initialized to NULL + * or point at valid memory. + */ +struct v4l2_jpeg_header { + struct v4l2_jpeg_reference sof; + struct v4l2_jpeg_reference sos; + unsigned int num_dht; + struct v4l2_jpeg_reference dht[V4L2_JPEG_MAX_TABLES]; + unsigned int num_dqt; + struct v4l2_jpeg_reference dqt[V4L2_JPEG_MAX_TABLES]; + + struct v4l2_jpeg_frame_header frame; + struct v4l2_jpeg_scan_header *scan; + struct v4l2_jpeg_reference *quantization_tables; + struct v4l2_jpeg_reference *huffman_tables; + u16 restart_interval; + size_t ecs_offset; +}; + +int v4l2_jpeg_parse_header(void *buf, size_t len, struct v4l2_jpeg_header *out); + +int v4l2_jpeg_parse_frame_header(void *buf, size_t len, + struct v4l2_jpeg_frame_header *frame_header); +int v4l2_jpeg_parse_scan_header(void *buf, size_t len, + struct v4l2_jpeg_scan_header *scan_header); +int v4l2_jpeg_parse_quantization_tables(void *buf, size_t len, u8 precision, + struct v4l2_jpeg_reference *q_tables); +int v4l2_jpeg_parse_huffman_tables(void *buf, size_t len, + struct v4l2_jpeg_reference *huffman_tables); + +#endif -- GitLab From 12310819a26aa567a9b80b675c2d4970ca797c0d Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:35:33 +0100 Subject: [PATCH 076/503] media: coda: jpeg: add CODA960 JPEG decoder support This patch adds JPEG decoding support for CODA960, handling the JPEG hardware directly. A separate JPEG decoder video device is created due to the separate hardware unit and different supported pixel formats. While the hardware can not change subsampling on the fly, it can decode 4:2:2 subsampled JPEG images into YUV422P. [m.felsch@pengutronix.de: fix qsequence counting by explicitly checking for the !use_bit case] [hverkuil-cisco@xs4all.nl: fix 'warning: missing braces around initializer'] [mchehab+huawei@kernel.org: fix 'BRACES: Unbalanced braces around else statement'] Signed-off-by: Philipp Zabel Signed-off-by: Marco Felsch Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/Kconfig | 1 + drivers/media/platform/coda/coda-common.c | 115 ++++- drivers/media/platform/coda/coda-jpeg.c | 564 ++++++++++++++++++++++ drivers/media/platform/coda/coda.h | 10 +- 4 files changed, 682 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index c11386bfc24b7..3df0d789d452b 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -187,6 +187,7 @@ config VIDEO_CODA select SRAM select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC + select V4L2_JPEG_HELPER select V4L2_MEM2MEM_DEV select GENERIC_ALLOCATOR help diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c index 46163e524c1ed..096e8e11f8369 100644 --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c @@ -159,6 +159,7 @@ static const struct coda_codec coda9_codecs[] = { CODA_CODEC(CODA9_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1088), CODA_CODEC(CODA9_MODE_DECODE_MP2, V4L2_PIX_FMT_MPEG2, V4L2_PIX_FMT_YUV420, 1920, 1088), CODA_CODEC(CODA9_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1088), + CODA_CODEC(CODA9_MODE_DECODE_MJPG, V4L2_PIX_FMT_JPEG, V4L2_PIX_FMT_YUV420, 8192, 8192), }; struct coda_video_device { @@ -252,6 +253,22 @@ static const struct coda_video_device coda9_jpeg_encoder = { }, }; +static const struct coda_video_device coda9_jpeg_decoder = { + .name = "coda-jpeg-decoder", + .type = CODA_INST_DECODER, + .ops = &coda9_jpeg_decode_ops, + .direct = true, + .src_formats = { + V4L2_PIX_FMT_JPEG, + }, + .dst_formats = { + V4L2_PIX_FMT_NV12, + V4L2_PIX_FMT_YUV420, + V4L2_PIX_FMT_YVU420, + V4L2_PIX_FMT_YUV422P, + }, +}; + static const struct coda_video_device *codadx6_video_devices[] = { &coda_bit_encoder, }; @@ -270,6 +287,7 @@ static const struct coda_video_device *coda7_video_devices[] = { static const struct coda_video_device *coda9_video_devices[] = { &coda9_jpeg_encoder, + &coda9_jpeg_decoder, &coda_bit_encoder, &coda_bit_decoder, }; @@ -411,6 +429,12 @@ static int coda_querycap(struct file *file, void *priv, return 0; } +static const u32 coda_formats_420[CODA_MAX_FORMATS] = { + V4L2_PIX_FMT_NV12, + V4L2_PIX_FMT_YUV420, + V4L2_PIX_FMT_YVU420, +}; + static int coda_enum_fmt(struct file *file, void *priv, struct v4l2_fmtdesc *f) { @@ -421,10 +445,33 @@ static int coda_enum_fmt(struct file *file, void *priv, if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) formats = cvd->src_formats; - else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) + else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { + struct coda_q_data *q_data_src; + struct vb2_queue *src_vq; + formats = cvd->dst_formats; - else + + /* + * If the source format is already fixed, only allow the same + * chroma subsampling. + */ + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); + src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, + V4L2_BUF_TYPE_VIDEO_OUTPUT); + if (q_data_src->fourcc == V4L2_PIX_FMT_JPEG && + vb2_is_streaming(src_vq)) { + if (ctx->params.jpeg_chroma_subsampling == + V4L2_JPEG_CHROMA_SUBSAMPLING_420) { + formats = coda_formats_420; + } else if (ctx->params.jpeg_chroma_subsampling == + V4L2_JPEG_CHROMA_SUBSAMPLING_422) { + f->pixelformat = V4L2_PIX_FMT_YUV422P; + return f->index ? -EINVAL : 0; + } + } + } else { return -EINVAL; + } if (f->index >= CODA_MAX_FORMATS || formats[f->index] == 0) return -EINVAL; @@ -614,12 +661,23 @@ static int coda_try_fmt_vid_cap(struct file *file, void *priv, /* * If the source format is already fixed, only allow the same output - * resolution + * resolution. When decoding JPEG images, we also have to make sure to + * use the same chroma subsampling. */ src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); if (vb2_is_streaming(src_vq)) { f->fmt.pix.width = q_data_src->width; f->fmt.pix.height = q_data_src->height; + + if (q_data_src->fourcc == V4L2_PIX_FMT_JPEG) { + if (ctx->params.jpeg_chroma_subsampling == + V4L2_JPEG_CHROMA_SUBSAMPLING_420 && + f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV422P) + f->fmt.pix.pixelformat = V4L2_PIX_FMT_NV12; + else if (ctx->params.jpeg_chroma_subsampling == + V4L2_JPEG_CHROMA_SUBSAMPLING_422) + f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV422P; + } } f->fmt.pix.colorspace = ctx->colorspace; @@ -637,12 +695,18 @@ static int coda_try_fmt_vid_cap(struct file *file, void *priv, if (ret < 0) return ret; - /* The decoders always write complete macroblocks */ + /* The decoders always write complete macroblocks or MCUs */ if (ctx->inst_type == CODA_INST_DECODER) { - f->fmt.pix.height = round_up(f->fmt.pix.height, 16); f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16); - f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * - f->fmt.pix.height * 3 / 2; + f->fmt.pix.height = round_up(f->fmt.pix.height, 16); + if (codec->src_fourcc == V4L2_PIX_FMT_JPEG && + f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV422P) { + f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * + f->fmt.pix.height * 2; + } else { + f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * + f->fmt.pix.height * 3 / 2; + } ret = coda_try_fmt_vdoa(ctx, f, &use_vdoa); if (ret < 0) @@ -747,6 +811,7 @@ static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f, /* else fall through */ case V4L2_PIX_FMT_YUV420: case V4L2_PIX_FMT_YVU420: + case V4L2_PIX_FMT_YUV422P: ctx->tiled_map_type = GDI_LINEAR_FRAME_MAP; break; default: @@ -1894,6 +1959,42 @@ static int coda_start_streaming(struct vb2_queue *q, unsigned int count) } } + /* + * Check the first input JPEG buffer to determine chroma + * subsampling. + */ + if (q_data_src->fourcc == V4L2_PIX_FMT_JPEG) { + buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + ret = coda_jpeg_decode_header(ctx, &buf->vb2_buf); + if (ret < 0) { + v4l2_err(v4l2_dev, + "failed to decode JPEG header: %d\n", + ret); + goto err; + } + + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); + q_data_dst->width = round_up(q_data_src->width, 16); + q_data_dst->height = round_up(q_data_src->height, 16); + q_data_dst->bytesperline = q_data_dst->width; + if (ctx->params.jpeg_chroma_subsampling == + V4L2_JPEG_CHROMA_SUBSAMPLING_420) { + q_data_dst->sizeimage = + q_data_dst->bytesperline * + q_data_dst->height * 3 / 2; + if (q_data_dst->fourcc != V4L2_PIX_FMT_YUV420) + q_data_dst->fourcc = V4L2_PIX_FMT_NV12; + } else { + q_data_dst->sizeimage = + q_data_dst->bytesperline * + q_data_dst->height * 2; + q_data_dst->fourcc = V4L2_PIX_FMT_YUV422P; + } + q_data_dst->rect.left = 0; + q_data_dst->rect.top = 0; + q_data_dst->rect.width = q_data_src->width; + q_data_dst->rect.height = q_data_src->height; + } ctx->streamon_out = 1; } else { ctx->streamon_cap = 1; diff --git a/drivers/media/platform/coda/coda-jpeg.c b/drivers/media/platform/coda/coda-jpeg.c index 92234fd1f4fdd..c1407a6776677 100644 --- a/drivers/media/platform/coda/coda-jpeg.c +++ b/drivers/media/platform/coda/coda-jpeg.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include @@ -23,10 +24,12 @@ #include "trace.h" #define SOI_MARKER 0xffd8 +#define APP9_MARKER 0xffe9 #define DRI_MARKER 0xffdd #define DQT_MARKER 0xffdb #define DHT_MARKER 0xffc4 #define SOF_MARKER 0xffc0 +#define SOS_MARKER 0xffda #define EOI_MARKER 0xffd9 enum { @@ -37,6 +40,18 @@ enum { CODA9_JPEG_FORMAT_400, }; +struct coda_huff_tab { + u8 luma_dc[16 + 12]; + u8 chroma_dc[16 + 12]; + u8 luma_ac[16 + 162]; + u8 chroma_ac[16 + 162]; + + /* DC Luma, DC Chroma, AC Luma, AC Chroma */ + s16 min[4 * 16]; + s16 max[4 * 16]; + s8 ptr[4 * 16]; +}; + #define CODA9_JPEG_ENC_HUFF_DATA_SIZE (256 + 256 + 16 + 16) /* @@ -247,6 +262,286 @@ bool coda_jpeg_check_buffer(struct coda_ctx *ctx, struct vb2_buffer *vb) return false; } +static int coda9_jpeg_gen_dec_huff_tab(struct coda_ctx *ctx, int tab_num); + +int coda_jpeg_decode_header(struct coda_ctx *ctx, struct vb2_buffer *vb) +{ + struct coda_dev *dev = ctx->dev; + u8 *buf = vb2_plane_vaddr(vb, 0); + size_t len = vb2_get_plane_payload(vb, 0); + struct v4l2_jpeg_scan_header scan_header; + struct v4l2_jpeg_reference quantization_tables[4] = { }; + struct v4l2_jpeg_reference huffman_tables[4] = { }; + struct v4l2_jpeg_header header = { + .scan = &scan_header, + .quantization_tables = quantization_tables, + .huffman_tables = huffman_tables, + }; + struct coda_q_data *q_data_src; + struct coda_huff_tab *huff_tab; + int i, j, ret; + + ret = v4l2_jpeg_parse_header(buf, len, &header); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "failed to parse header\n"); + return ret; + } + + ctx->params.jpeg_restart_interval = header.restart_interval; + + /* check frame header */ + if (header.frame.height > ctx->codec->max_h || + header.frame.width > ctx->codec->max_w) { + v4l2_err(&dev->v4l2_dev, "invalid dimensions: %dx%d\n", + header.frame.width, header.frame.height); + return -EINVAL; + } + + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); + if (header.frame.height != q_data_src->height || + header.frame.width != q_data_src->width) { + v4l2_err(&dev->v4l2_dev, + "dimensions don't match format: %dx%d\n", + header.frame.width, header.frame.height); + return -EINVAL; + } + + if (header.frame.num_components != 3) { + v4l2_err(&dev->v4l2_dev, + "unsupported number of components: %d\n", + header.frame.num_components); + return -EINVAL; + } + + /* install quantization tables */ + if (quantization_tables[3].start) { + v4l2_err(&dev->v4l2_dev, + "only 3 quantization tables supported\n"); + return -EINVAL; + } + for (i = 0; i < 3; i++) { + if (!quantization_tables[i].start) + continue; + if (quantization_tables[i].length != 64) { + v4l2_err(&dev->v4l2_dev, + "only 8-bit quantization tables supported\n"); + continue; + } + if (!ctx->params.jpeg_qmat_tab[i]) + ctx->params.jpeg_qmat_tab[i] = kmalloc(64, GFP_KERNEL); + memcpy(ctx->params.jpeg_qmat_tab[i], + quantization_tables[i].start, 64); + } + + /* install Huffman tables */ + for (i = 0; i < 4; i++) { + if (!huffman_tables[i].start) { + v4l2_err(&dev->v4l2_dev, "missing Huffman table\n"); + return -EINVAL; + } + if (huffman_tables[i].length != ((i & 2) ? 178 : 28)) { + v4l2_err(&dev->v4l2_dev, + "invalid Huffman table %d length: %zu\n", + i, huffman_tables[i].length); + return -EINVAL; + } + } + huff_tab = ctx->params.jpeg_huff_tab; + if (!huff_tab) { + huff_tab = kzalloc(sizeof(struct coda_huff_tab), GFP_KERNEL); + if (!huff_tab) + return -ENOMEM; + ctx->params.jpeg_huff_tab = huff_tab; + } + memcpy(huff_tab->luma_dc, huffman_tables[0].start, 16 + 12); + memcpy(huff_tab->chroma_dc, huffman_tables[1].start, 16 + 12); + memcpy(huff_tab->luma_ac, huffman_tables[2].start, 16 + 162); + memcpy(huff_tab->chroma_ac, huffman_tables[3].start, 16 + 162); + + /* check scan header */ + for (i = 0; i < scan_header.num_components; i++) { + struct v4l2_jpeg_scan_component_spec *scan_component; + + scan_component = &scan_header.component[i]; + for (j = 0; j < header.frame.num_components; j++) { + if (header.frame.component[j].component_identifier == + scan_component->component_selector) + break; + } + if (j == header.frame.num_components) + continue; + + ctx->params.jpeg_huff_dc_index[j] = + scan_component->dc_entropy_coding_table_selector; + ctx->params.jpeg_huff_ac_index[j] = + scan_component->ac_entropy_coding_table_selector; + } + + /* Generate Huffman table information */ + for (i = 0; i < 4; i++) + coda9_jpeg_gen_dec_huff_tab(ctx, i); + + /* start of entropy coded segment */ + ctx->jpeg_ecs_offset = header.ecs_offset; + + switch (header.frame.subsampling) { + case V4L2_JPEG_CHROMA_SUBSAMPLING_420: + case V4L2_JPEG_CHROMA_SUBSAMPLING_422: + ctx->params.jpeg_chroma_subsampling = header.frame.subsampling; + break; + default: + v4l2_err(&dev->v4l2_dev, "chroma subsampling not supported: %d", + header.frame.subsampling); + return -EINVAL; + } + + return 0; +} + +static inline void coda9_jpeg_write_huff_values(struct coda_dev *dev, u8 *bits, + int num_values) +{ + s8 *values = (s8 *)(bits + 16); + int huff_length, i; + + for (huff_length = 0, i = 0; i < 16; i++) + huff_length += bits[i]; + for (i = huff_length; i < num_values; i++) + values[i] = -1; + for (i = 0; i < num_values; i++) + coda_write(dev, (s32)values[i], CODA9_REG_JPEG_HUFF_DATA); +} + +static int coda9_jpeg_dec_huff_setup(struct coda_ctx *ctx) +{ + struct coda_huff_tab *huff_tab = ctx->params.jpeg_huff_tab; + struct coda_dev *dev = ctx->dev; + s16 *huff_min = huff_tab->min; + s16 *huff_max = huff_tab->max; + s8 *huff_ptr = huff_tab->ptr; + int i; + + /* MIN Tables */ + coda_write(dev, 0x003, CODA9_REG_JPEG_HUFF_CTRL); + coda_write(dev, 0x000, CODA9_REG_JPEG_HUFF_ADDR); + for (i = 0; i < 4 * 16; i++) + coda_write(dev, (s32)huff_min[i], CODA9_REG_JPEG_HUFF_DATA); + + /* MAX Tables */ + coda_write(dev, 0x403, CODA9_REG_JPEG_HUFF_CTRL); + coda_write(dev, 0x440, CODA9_REG_JPEG_HUFF_ADDR); + for (i = 0; i < 4 * 16; i++) + coda_write(dev, (s32)huff_max[i], CODA9_REG_JPEG_HUFF_DATA); + + /* PTR Tables */ + coda_write(dev, 0x803, CODA9_REG_JPEG_HUFF_CTRL); + coda_write(dev, 0x880, CODA9_REG_JPEG_HUFF_ADDR); + for (i = 0; i < 4 * 16; i++) + coda_write(dev, (s32)huff_ptr[i], CODA9_REG_JPEG_HUFF_DATA); + + /* VAL Tables: DC Luma, DC Chroma, AC Luma, AC Chroma */ + coda_write(dev, 0xc03, CODA9_REG_JPEG_HUFF_CTRL); + coda9_jpeg_write_huff_values(dev, huff_tab->luma_dc, 12); + coda9_jpeg_write_huff_values(dev, huff_tab->chroma_dc, 12); + coda9_jpeg_write_huff_values(dev, huff_tab->luma_ac, 162); + coda9_jpeg_write_huff_values(dev, huff_tab->chroma_ac, 162); + coda_write(dev, 0x000, CODA9_REG_JPEG_HUFF_CTRL); + return 0; +} + +static inline void coda9_jpeg_write_qmat_tab(struct coda_dev *dev, + u8 *qmat, int index) +{ + int i; + + coda_write(dev, index | 0x3, CODA9_REG_JPEG_QMAT_CTRL); + for (i = 0; i < 64; i++) + coda_write(dev, qmat[i], CODA9_REG_JPEG_QMAT_DATA); + coda_write(dev, 0, CODA9_REG_JPEG_QMAT_CTRL); +} + +static void coda9_jpeg_qmat_setup(struct coda_ctx *ctx) +{ + struct coda_dev *dev = ctx->dev; + int *qmat_index = ctx->params.jpeg_qmat_index; + u8 **qmat_tab = ctx->params.jpeg_qmat_tab; + + coda9_jpeg_write_qmat_tab(dev, qmat_tab[qmat_index[0]], 0x00); + coda9_jpeg_write_qmat_tab(dev, qmat_tab[qmat_index[1]], 0x40); + coda9_jpeg_write_qmat_tab(dev, qmat_tab[qmat_index[2]], 0x80); +} + +static void coda9_jpeg_dec_bbc_gbu_setup(struct coda_ctx *ctx, + struct vb2_buffer *buf, u32 ecs_offset) +{ + struct coda_dev *dev = ctx->dev; + int page_ptr, word_ptr, bit_ptr; + u32 bbc_base_addr, end_addr; + int bbc_cur_pos; + int ret, val; + + bbc_base_addr = vb2_dma_contig_plane_dma_addr(buf, 0); + end_addr = bbc_base_addr + vb2_get_plane_payload(buf, 0); + + page_ptr = ecs_offset / 256; + word_ptr = (ecs_offset % 256) / 4; + if (page_ptr & 1) + word_ptr += 64; + bit_ptr = (ecs_offset % 4) * 8; + if (word_ptr & 1) + bit_ptr += 32; + word_ptr &= ~0x1; + + coda_write(dev, end_addr, CODA9_REG_JPEG_BBC_WR_PTR); + coda_write(dev, bbc_base_addr, CODA9_REG_JPEG_BBC_BAS_ADDR); + + /* Leave 3 256-byte page margin to avoid a BBC interrupt */ + coda_write(dev, end_addr + 256 * 3 + 256, CODA9_REG_JPEG_BBC_END_ADDR); + val = DIV_ROUND_UP(vb2_plane_size(buf, 0), 256) + 3; + coda_write(dev, BIT(31) | val, CODA9_REG_JPEG_BBC_STRM_CTRL); + + bbc_cur_pos = page_ptr; + coda_write(dev, bbc_cur_pos, CODA9_REG_JPEG_BBC_CUR_POS); + coda_write(dev, bbc_base_addr + (bbc_cur_pos << 8), + CODA9_REG_JPEG_BBC_EXT_ADDR); + coda_write(dev, (bbc_cur_pos & 1) << 6, CODA9_REG_JPEG_BBC_INT_ADDR); + coda_write(dev, 64, CODA9_REG_JPEG_BBC_DATA_CNT); + coda_write(dev, 0, CODA9_REG_JPEG_BBC_COMMAND); + do { + ret = coda_read(dev, CODA9_REG_JPEG_BBC_BUSY); + } while (ret == 1); + + bbc_cur_pos++; + coda_write(dev, bbc_cur_pos, CODA9_REG_JPEG_BBC_CUR_POS); + coda_write(dev, bbc_base_addr + (bbc_cur_pos << 8), + CODA9_REG_JPEG_BBC_EXT_ADDR); + coda_write(dev, (bbc_cur_pos & 1) << 6, CODA9_REG_JPEG_BBC_INT_ADDR); + coda_write(dev, 64, CODA9_REG_JPEG_BBC_DATA_CNT); + coda_write(dev, 0, CODA9_REG_JPEG_BBC_COMMAND); + do { + ret = coda_read(dev, CODA9_REG_JPEG_BBC_BUSY); + } while (ret == 1); + + bbc_cur_pos++; + coda_write(dev, bbc_cur_pos, CODA9_REG_JPEG_BBC_CUR_POS); + coda_write(dev, 1, CODA9_REG_JPEG_BBC_CTRL); + + coda_write(dev, 0, CODA9_REG_JPEG_GBU_TT_CNT); + coda_write(dev, word_ptr, CODA9_REG_JPEG_GBU_WD_PTR); + coda_write(dev, 0, CODA9_REG_JPEG_GBU_BBSR); + coda_write(dev, 127, CODA9_REG_JPEG_GBU_BBER); + if (page_ptr & 1) { + coda_write(dev, 0, CODA9_REG_JPEG_GBU_BBIR); + coda_write(dev, 0, CODA9_REG_JPEG_GBU_BBHR); + } else { + coda_write(dev, 64, CODA9_REG_JPEG_GBU_BBIR); + coda_write(dev, 64, CODA9_REG_JPEG_GBU_BBHR); + } + coda_write(dev, 4, CODA9_REG_JPEG_GBU_CTRL); + coda_write(dev, bit_ptr, CODA9_REG_JPEG_GBU_FF_RPTR); + coda_write(dev, 3, CODA9_REG_JPEG_GBU_CTRL); +} + static const int bus_req_num[] = { [CODA9_JPEG_FORMAT_420] = 2, [CODA9_JPEG_FORMAT_422] = 3, @@ -345,6 +640,71 @@ static int coda9_jpeg_gen_enc_huff_tab(struct coda_ctx *ctx, int tab_num, #define DC_TABLE_INDEX1 2 #define AC_TABLE_INDEX1 3 +static u8 *coda9_jpeg_get_huff_bits(struct coda_ctx *ctx, int tab_num) +{ + struct coda_huff_tab *huff_tab = ctx->params.jpeg_huff_tab; + + if (!huff_tab) + return NULL; + + switch (tab_num) { + case DC_TABLE_INDEX0: return huff_tab->luma_dc; + case AC_TABLE_INDEX0: return huff_tab->luma_ac; + case DC_TABLE_INDEX1: return huff_tab->chroma_dc; + case AC_TABLE_INDEX1: return huff_tab->chroma_ac; + } + + return NULL; +} + +static int coda9_jpeg_gen_dec_huff_tab(struct coda_ctx *ctx, int tab_num) +{ + int ptr_cnt = 0, huff_code = 0, zero_flag = 0, data_flag = 0; + u8 *huff_bits; + s16 *huff_max; + s16 *huff_min; + s8 *huff_ptr; + int ofs; + int i; + + huff_bits = coda9_jpeg_get_huff_bits(ctx, tab_num); + if (!huff_bits) + return -EINVAL; + + /* DC/AC Luma, DC/AC Chroma -> DC Luma/Chroma, AC Luma/Chroma */ + ofs = ((tab_num & 1) << 1) | ((tab_num >> 1) & 1); + ofs *= 16; + + huff_ptr = ctx->params.jpeg_huff_tab->ptr + ofs; + huff_max = ctx->params.jpeg_huff_tab->max + ofs; + huff_min = ctx->params.jpeg_huff_tab->min + ofs; + + for (i = 0; i < 16; i++) { + if (huff_bits[i]) { + huff_ptr[i] = ptr_cnt; + ptr_cnt += huff_bits[i]; + huff_min[i] = huff_code; + huff_max[i] = huff_code + (huff_bits[i] - 1); + data_flag = 1; + zero_flag = 0; + } else { + huff_ptr[i] = -1; + huff_min[i] = -1; + huff_max[i] = -1; + zero_flag = 1; + } + + if (data_flag == 1) { + if (zero_flag == 1) + huff_code <<= 1; + else + huff_code = (huff_max[i] + 1) << 1; + } + } + + return 0; +} + static int coda9_jpeg_load_huff_tab(struct coda_ctx *ctx) { struct { @@ -880,6 +1240,13 @@ static void coda9_jpeg_finish_encode(struct coda_ctx *ctx) coda_dbg(1, ctx, "job finished: encoded frame (%u)%s\n", dst_buf->sequence, (dst_buf->flags & V4L2_BUF_FLAG_LAST) ? " (last)" : ""); + + /* + * Reset JPEG processing unit after each encode run to work + * around hangups when switching context between encoder and + * decoder. + */ + coda_hw_reset(ctx); } static void coda9_jpeg_release(struct coda_ctx *ctx) @@ -893,6 +1260,7 @@ static void coda9_jpeg_release(struct coda_ctx *ctx) for (i = 0; i < 3; i++) kfree(ctx->params.jpeg_qmat_tab[i]); kfree(ctx->params.jpeg_huff_data); + kfree(ctx->params.jpeg_huff_tab); } const struct coda_context_ops coda9_jpeg_encode_ops = { @@ -903,6 +1271,202 @@ const struct coda_context_ops coda9_jpeg_encode_ops = { .release = coda9_jpeg_release, }; +/* + * Decoder context operations + */ + +static int coda9_jpeg_start_decoding(struct coda_ctx *ctx) +{ + ctx->params.jpeg_qmat_index[0] = 0; + ctx->params.jpeg_qmat_index[1] = 1; + ctx->params.jpeg_qmat_index[2] = 1; + ctx->params.jpeg_qmat_tab[0] = luma_q; + ctx->params.jpeg_qmat_tab[1] = chroma_q; + /* nothing more to do here */ + + /* TODO: we could already scan the first header to get the chroma + * format. + */ + + return 0; +} + +static int coda9_jpeg_prepare_decode(struct coda_ctx *ctx) +{ + struct coda_dev *dev = ctx->dev; + int aligned_width, aligned_height; + int chroma_format; + int ret; + u32 val, dst_fourcc; + struct coda_q_data *q_data_src, *q_data_dst; + struct vb2_v4l2_buffer *src_buf, *dst_buf; + int chroma_interleave; + + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT); + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); + dst_fourcc = q_data_dst->fourcc; + + if (vb2_get_plane_payload(&src_buf->vb2_buf, 0) == 0) + vb2_set_plane_payload(&src_buf->vb2_buf, 0, + vb2_plane_size(&src_buf->vb2_buf, 0)); + + chroma_format = coda9_jpeg_chroma_format(q_data_dst->fourcc); + if (chroma_format < 0) { + v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); + return chroma_format; + } + + ret = coda_jpeg_decode_header(ctx, &src_buf->vb2_buf); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "failed to decode JPEG header: %d\n", + ret); + + src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); + v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); + + v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); + return ret; + } + + /* Round image dimensions to multiple of MCU size */ + aligned_width = round_up(q_data_src->width, width_align[chroma_format]); + aligned_height = round_up(q_data_src->height, height_align[chroma_format]); + if (aligned_width != q_data_dst->bytesperline) { + v4l2_err(&dev->v4l2_dev, "stride mismatch: %d != %d\n", + aligned_width, q_data_dst->bytesperline); + } + + coda_set_gdi_regs(ctx); + + val = ctx->params.jpeg_huff_ac_index[0] << 12 | + ctx->params.jpeg_huff_ac_index[1] << 11 | + ctx->params.jpeg_huff_ac_index[2] << 10 | + ctx->params.jpeg_huff_dc_index[0] << 9 | + ctx->params.jpeg_huff_dc_index[1] << 8 | + ctx->params.jpeg_huff_dc_index[2] << 7; + if (ctx->params.jpeg_huff_tab) + val |= CODA9_JPEG_PIC_CTRL_USER_HUFFMAN_EN; + coda_write(dev, val, CODA9_REG_JPEG_PIC_CTRL); + + coda_write(dev, aligned_width << 16 | aligned_height, + CODA9_REG_JPEG_PIC_SIZE); + + chroma_interleave = (dst_fourcc == V4L2_PIX_FMT_NV12); + coda_write(dev, 0, CODA9_REG_JPEG_ROT_INFO); + coda_write(dev, bus_req_num[chroma_format], CODA9_REG_JPEG_OP_INFO); + coda_write(dev, mcu_info[chroma_format], CODA9_REG_JPEG_MCU_INFO); + coda_write(dev, 0, CODA9_REG_JPEG_SCL_INFO); + coda_write(dev, chroma_interleave, CODA9_REG_JPEG_DPB_CONFIG); + coda_write(dev, ctx->params.jpeg_restart_interval, + CODA9_REG_JPEG_RST_INTVAL); + + if (ctx->params.jpeg_huff_tab) { + ret = coda9_jpeg_dec_huff_setup(ctx); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, + "failed to set up Huffman tables: %d\n", ret); + v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); + return ret; + } + } + + coda9_jpeg_qmat_setup(ctx); + + coda9_jpeg_dec_bbc_gbu_setup(ctx, &src_buf->vb2_buf, + ctx->jpeg_ecs_offset); + + coda_write(dev, 0, CODA9_REG_JPEG_RST_INDEX); + coda_write(dev, 0, CODA9_REG_JPEG_RST_COUNT); + + coda_write(dev, 0, CODA9_REG_JPEG_DPCM_DIFF_Y); + coda_write(dev, 0, CODA9_REG_JPEG_DPCM_DIFF_CB); + coda_write(dev, 0, CODA9_REG_JPEG_DPCM_DIFF_CR); + + coda_write(dev, 0, CODA9_REG_JPEG_ROT_INFO); + + coda_write(dev, 1, CODA9_GDI_CONTROL); + do { + ret = coda_read(dev, CODA9_GDI_STATUS); + } while (!ret); + + val = (chroma_format << 17) | (chroma_interleave << 16) | + q_data_dst->bytesperline; + if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP) + val |= 3 << 20; + coda_write(dev, val, CODA9_GDI_INFO_CONTROL); + + coda_write(dev, aligned_width << 16 | aligned_height, + CODA9_GDI_INFO_PIC_SIZE); + + coda_write_base(ctx, q_data_dst, dst_buf, CODA9_GDI_INFO_BASE_Y); + + coda_write(dev, 0, CODA9_REG_JPEG_DPB_BASE00); + coda_write(dev, 0, CODA9_GDI_CONTROL); + coda_write(dev, 1, CODA9_GDI_PIC_INIT_HOST); + + trace_coda_jpeg_run(ctx, src_buf); + + coda_write(dev, 1, CODA9_REG_JPEG_PIC_START); + + return 0; +} + +static void coda9_jpeg_finish_decode(struct coda_ctx *ctx) +{ + struct coda_dev *dev = ctx->dev; + struct vb2_v4l2_buffer *dst_buf, *src_buf; + struct coda_q_data *q_data_dst; + u32 err_mb; + + err_mb = coda_read(dev, CODA9_REG_JPEG_PIC_ERRMB); + if (err_mb) + v4l2_err(&dev->v4l2_dev, "ERRMB: 0x%x\n", err_mb); + + coda_write(dev, 0, CODA9_REG_JPEG_BBC_FLUSH_CMD); + + src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + dst_buf->sequence = ctx->osequence++; + + trace_coda_jpeg_done(ctx, dst_buf); + + dst_buf->flags &= ~(V4L2_BUF_FLAG_PFRAME | V4L2_BUF_FLAG_LAST); + dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME; + dst_buf->flags |= src_buf->flags & V4L2_BUF_FLAG_LAST; + + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false); + + q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); + vb2_set_plane_payload(&dst_buf->vb2_buf, 0, q_data_dst->sizeimage); + + v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); + coda_m2m_buf_done(ctx, dst_buf, err_mb ? VB2_BUF_STATE_ERROR : + VB2_BUF_STATE_DONE); + + coda_dbg(1, ctx, "job finished: decoded frame (%u)%s\n", + dst_buf->sequence, + (dst_buf->flags & V4L2_BUF_FLAG_LAST) ? " (last)" : ""); + + /* + * Reset JPEG processing unit after each decode run to work + * around hangups when switching context between encoder and + * decoder. + */ + coda_hw_reset(ctx); +} + +const struct coda_context_ops coda9_jpeg_decode_ops = { + .queue_init = coda_encoder_queue_init, /* non-bitstream operation */ + .start_streaming = coda9_jpeg_start_decoding, + .prepare_run = coda9_jpeg_prepare_decode, + .finish_run = coda9_jpeg_finish_decode, + .release = coda9_jpeg_release, +}; + irqreturn_t coda9_jpeg_irq_handler(int irq, void *data) { struct coda_dev *dev = data; diff --git a/drivers/media/platform/coda/coda.h b/drivers/media/platform/coda/coda.h index 43bda175f517d..af0f8252b0c69 100644 --- a/drivers/media/platform/coda/coda.h +++ b/drivers/media/platform/coda/coda.h @@ -69,7 +69,7 @@ struct coda_aux_buf { struct coda_dev { struct v4l2_device v4l2_dev; - struct video_device vfd[5]; + struct video_device vfd[6]; struct device *dev; const struct coda_devtype *devtype; int firmware; @@ -123,10 +123,15 @@ struct coda_params { u8 mpeg4_inter_qp; u8 gop_size; int intra_refresh; + enum v4l2_jpeg_chroma_subsampling jpeg_chroma_subsampling; u8 jpeg_quality; u8 jpeg_restart_interval; u8 *jpeg_qmat_tab[3]; + int jpeg_qmat_index[3]; + int jpeg_huff_dc_index[3]; + int jpeg_huff_ac_index[3]; u32 *jpeg_huff_data; + struct coda_huff_tab *jpeg_huff_tab; int codec_mode; int codec_mode_aux; enum v4l2_mpeg_video_multi_slice_mode slice_mode; @@ -238,6 +243,7 @@ struct coda_ctx { struct v4l2_fh fh; int gopcounter; int runcounter; + int jpeg_ecs_offset; char vpu_header[3][64]; int vpu_header_size[3]; struct kfifo bitstream_fifo; @@ -362,12 +368,14 @@ void coda_update_profile_level_ctrls(struct coda_ctx *ctx, u8 profile_idc, u8 level_idc); bool coda_jpeg_check_buffer(struct coda_ctx *ctx, struct vb2_buffer *vb); +int coda_jpeg_decode_header(struct coda_ctx *ctx, struct vb2_buffer *vb); int coda_jpeg_write_tables(struct coda_ctx *ctx); void coda_set_jpeg_compression_quality(struct coda_ctx *ctx, int quality); extern const struct coda_context_ops coda_bit_encode_ops; extern const struct coda_context_ops coda_bit_decode_ops; extern const struct coda_context_ops coda9_jpeg_encode_ops; +extern const struct coda_context_ops coda9_jpeg_decode_ops; irqreturn_t coda_irq_handler(int irq, void *data); irqreturn_t coda9_jpeg_irq_handler(int irq, void *data); -- GitLab From d2f1db8608527bed9478d87e710aa1a8bac8f40a Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:35:34 +0100 Subject: [PATCH 077/503] media: coda: split marking last meta into helper function Split marking the last metadata entry into a helper function to simplify coda_decoder_cmd. Signed-off-by: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/coda/coda-common.c | 36 ++++++++++++++--------- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c index 096e8e11f8369..ee25435929a96 100644 --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c @@ -1153,6 +1153,26 @@ static int coda_try_decoder_cmd(struct file *file, void *fh, return v4l2_m2m_ioctl_try_decoder_cmd(file, fh, dc); } +static bool coda_mark_last_meta(struct coda_ctx *ctx) +{ + struct coda_buffer_meta *meta; + + coda_dbg(1, ctx, "marking last meta\n"); + + spin_lock(&ctx->buffer_meta_lock); + if (list_empty(&ctx->buffer_meta_list)) { + spin_unlock(&ctx->buffer_meta_lock); + return false; + } + + meta = list_last_entry(&ctx->buffer_meta_list, struct coda_buffer_meta, + list); + meta->last = true; + + spin_unlock(&ctx->buffer_meta_lock); + return true; +} + static int coda_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *dc) { @@ -1197,22 +1217,10 @@ static int coda_decoder_cmd(struct file *file, void *fh, stream_end = true; } } else { - coda_dbg(1, ctx, "marking last meta\n"); - - /* Mark last meta */ - spin_lock(&ctx->buffer_meta_lock); - if (!list_empty(&ctx->buffer_meta_list)) { - struct coda_buffer_meta *meta; - - meta = list_last_entry(&ctx->buffer_meta_list, - struct coda_buffer_meta, - list); - meta->last = true; + if (coda_mark_last_meta(ctx)) stream_end = true; - } else { + else wakeup = true; - } - spin_unlock(&ctx->buffer_meta_lock); } if (stream_end) { -- GitLab From 1e34e446d79cbc85b14e881a7198ee6617909f13 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:35:35 +0100 Subject: [PATCH 078/503] media: coda: mark last capture buffer If a JPEG decoding application queues the last capture and output buffers, issues a decoder stop command after the decoding is already done, and then dequeues the last capture buffer, it is not marked as last. Detect this condition in the decoder stop command and mark the last buffer on the capture done list. Signed-off-by: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/coda/coda-common.c | 35 +++++++++++++++++++++-- 1 file changed, 32 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c index ee25435929a96..55bbd2a4c77f2 100644 --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c @@ -1173,6 +1173,31 @@ static bool coda_mark_last_meta(struct coda_ctx *ctx) return true; } +static bool coda_mark_last_dst_buf(struct coda_ctx *ctx) +{ + struct vb2_v4l2_buffer *buf; + struct vb2_buffer *dst_vb; + struct vb2_queue *dst_vq; + unsigned long flags; + + coda_dbg(1, ctx, "marking last capture buffer\n"); + + dst_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); + spin_lock_irqsave(&dst_vq->done_lock, flags); + if (list_empty(&dst_vq->done_list)) { + spin_unlock_irqrestore(&dst_vq->done_lock, flags); + return false; + } + + dst_vb = list_last_entry(&dst_vq->done_list, struct vb2_buffer, + done_entry); + buf = to_vb2_v4l2_buffer(dst_vb); + buf->flags |= V4L2_BUF_FLAG_LAST; + + spin_unlock_irqrestore(&dst_vq->done_lock, flags); + return true; +} + static int coda_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *dc) { @@ -1217,10 +1242,14 @@ static int coda_decoder_cmd(struct file *file, void *fh, stream_end = true; } } else { - if (coda_mark_last_meta(ctx)) - stream_end = true; + if (ctx->use_bit) + if (coda_mark_last_meta(ctx)) + stream_end = true; + else + wakeup = true; else - wakeup = true; + if (!coda_mark_last_dst_buf(ctx)) + wakeup = true; } if (stream_end) { -- GitLab From 15c3d5aae73ecfe8cad916000cf42b85197e7308 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:35:36 +0100 Subject: [PATCH 079/503] media: coda: lock capture queue wakeup against decoder stop command Similar to commit 9ee50a9489f1 ("media: coda: lock capture queue wakeup against encoder stop command"), make sure that a JPEG decoder stop command running concurrently with a decoder finish_run always either flags the last returned buffer or wakes up the capture queue to signal the end of stream condition afterwards. This was not necessary for BIT processor contexts because of the need to release the bitstream buffer with the stream end condition. In contrast, the JPEG decoder can be finished with decoding the image between the time the application queues the last output buffer and the time it issues the decoder stop command. Signed-off-by: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/coda/coda-common.c | 3 +++ drivers/media/platform/coda/coda-jpeg.c | 8 ++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c index 55bbd2a4c77f2..80ad2db3e9c9d 100644 --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c @@ -1230,6 +1230,8 @@ static int coda_decoder_cmd(struct file *file, void *fh, stream_end = false; wakeup = false; + mutex_lock(&ctx->wakeup_mutex); + buf = v4l2_m2m_last_src_buf(ctx->fh.m2m_ctx); if (buf) { coda_dbg(1, ctx, "marking last pending buffer\n"); @@ -1266,6 +1268,7 @@ static int coda_decoder_cmd(struct file *file, void *fh, coda_wake_up_capture_queue(ctx); } + mutex_unlock(&ctx->wakeup_mutex); break; default: return -EINVAL; diff --git a/drivers/media/platform/coda/coda-jpeg.c b/drivers/media/platform/coda/coda-jpeg.c index c1407a6776677..4512b2569b6be 100644 --- a/drivers/media/platform/coda/coda-jpeg.c +++ b/drivers/media/platform/coda/coda-jpeg.c @@ -1428,6 +1428,12 @@ static void coda9_jpeg_finish_decode(struct coda_ctx *ctx) coda_write(dev, 0, CODA9_REG_JPEG_BBC_FLUSH_CMD); + /* + * Lock to make sure that a decoder stop command running in parallel + * will either already have marked src_buf as last, or it will wake up + * the capture queue after the buffers are returned. + */ + mutex_lock(&ctx->wakeup_mutex); src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); dst_buf->sequence = ctx->osequence++; @@ -1447,6 +1453,8 @@ static void coda9_jpeg_finish_decode(struct coda_ctx *ctx) coda_m2m_buf_done(ctx, dst_buf, err_mb ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE); + mutex_unlock(&ctx->wakeup_mutex); + coda_dbg(1, ctx, "job finished: decoded frame (%u)%s\n", dst_buf->sequence, (dst_buf->flags & V4L2_BUF_FLAG_LAST) ? " (last)" : ""); -- GitLab From 5c990fa01fb2803150c5ebd031753a884976c6d3 Mon Sep 17 00:00:00 2001 From: Adrian Ratiu Date: Tue, 24 Mar 2020 17:04:29 +0100 Subject: [PATCH 080/503] media: coda: jpeg: support optimized huffman tables Each jpeg can have the huffman tables optimized for its specific content meaning that the table lenghts and values don't match the standard table of substitutions so there's no reason to hardcode and expect the standard lengths, otherwise we just end up rejecting optimized jpegs altogether. Tested on CODA960. Signed-off-by: Adrian Ratiu Reviewed-by: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/coda/coda-jpeg.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/coda/coda-jpeg.c b/drivers/media/platform/coda/coda-jpeg.c index 4512b2569b6be..00d19859db500 100644 --- a/drivers/media/platform/coda/coda-jpeg.c +++ b/drivers/media/platform/coda/coda-jpeg.c @@ -339,7 +339,10 @@ int coda_jpeg_decode_header(struct coda_ctx *ctx, struct vb2_buffer *vb) v4l2_err(&dev->v4l2_dev, "missing Huffman table\n"); return -EINVAL; } - if (huffman_tables[i].length != ((i & 2) ? 178 : 28)) { + /* AC tables should be between 17 -> 178, DC between 17 -> 28 */ + if (huffman_tables[i].length < 17 || + huffman_tables[i].length > 178 || + ((i & 2) == 0 && huffman_tables[i].length > 28)) { v4l2_err(&dev->v4l2_dev, "invalid Huffman table %d length: %zu\n", i, huffman_tables[i].length); @@ -353,10 +356,12 @@ int coda_jpeg_decode_header(struct coda_ctx *ctx, struct vb2_buffer *vb) return -ENOMEM; ctx->params.jpeg_huff_tab = huff_tab; } - memcpy(huff_tab->luma_dc, huffman_tables[0].start, 16 + 12); - memcpy(huff_tab->chroma_dc, huffman_tables[1].start, 16 + 12); - memcpy(huff_tab->luma_ac, huffman_tables[2].start, 16 + 162); - memcpy(huff_tab->chroma_ac, huffman_tables[3].start, 16 + 162); + + memset(huff_tab, 0, sizeof(*huff_tab)); + memcpy(huff_tab->luma_dc, huffman_tables[0].start, huffman_tables[0].length); + memcpy(huff_tab->chroma_dc, huffman_tables[1].start, huffman_tables[1].length); + memcpy(huff_tab->luma_ac, huffman_tables[2].start, huffman_tables[2].length); + memcpy(huff_tab->chroma_ac, huffman_tables[3].start, huffman_tables[3].length); /* check scan header */ for (i = 0; i < scan_header.num_components; i++) { -- GitLab From 4ce4646c23373b20a156b73b398dc04aea14fce8 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 28 Mar 2020 08:52:50 +0100 Subject: [PATCH 081/503] media: vimc: remove the function vimc_unregister The function vimc_unregister is called only from one place in the code and has only 3 lines so it has no justification. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test_drivers/vimc/vimc-core.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/media/test_drivers/vimc/vimc-core.c b/drivers/media/test_drivers/vimc/vimc-core.c index 339126e565dc6..1f84988376462 100644 --- a/drivers/media/test_drivers/vimc/vimc-core.c +++ b/drivers/media/test_drivers/vimc/vimc-core.c @@ -268,13 +268,6 @@ static int vimc_register_devices(struct vimc_device *vimc) return ret; } -static void vimc_unregister(struct vimc_device *vimc) -{ - vimc_unregister_subdevs(vimc); - media_device_unregister(&vimc->mdev); - v4l2_device_unregister(&vimc->v4l2_dev); -} - static int vimc_probe(struct platform_device *pdev) { struct vimc_device *vimc; @@ -321,7 +314,9 @@ static int vimc_remove(struct platform_device *pdev) dev_dbg(&pdev->dev, "remove"); - vimc_unregister(vimc); + vimc_unregister_subdevs(vimc); + media_device_unregister(&vimc->mdev); + v4l2_device_unregister(&vimc->v4l2_dev); v4l2_device_put(&vimc->v4l2_dev); return 0; -- GitLab From 7a040cf303438c567fceb987f10cfd058619f2c9 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 28 Mar 2020 08:52:51 +0100 Subject: [PATCH 082/503] media: vimc: handle error in vimc_add_subdevs In case the 'add' callback of an entity fails, then all other entities should unregister and released. This should be done inside vimc_add_subdevs so that the function handles its own failure. In order to call vimc_unregister_subdevs and vimc_release_subdevs from vimc_add_subdevs, the order of the function should change. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test_drivers/vimc/vimc-core.c | 42 +++++++++++---------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/media/test_drivers/vimc/vimc-core.c b/drivers/media/test_drivers/vimc/vimc-core.c index 1f84988376462..dab01cbc31d25 100644 --- a/drivers/media/test_drivers/vimc/vimc-core.c +++ b/drivers/media/test_drivers/vimc/vimc-core.c @@ -160,24 +160,6 @@ static int vimc_create_links(struct vimc_device *vimc) return ret; } -static int vimc_add_subdevs(struct vimc_device *vimc) -{ - unsigned int i; - - for (i = 0; i < vimc->pipe_cfg->num_ents; i++) { - dev_dbg(vimc->mdev.dev, "new entity for %s\n", - vimc->pipe_cfg->ents[i].name); - vimc->ent_devs[i] = vimc->pipe_cfg->ents[i].add(vimc, - vimc->pipe_cfg->ents[i].name); - if (!vimc->ent_devs[i]) { - dev_err(vimc->mdev.dev, "add new entity for %s\n", - vimc->pipe_cfg->ents[i].name); - return -EINVAL; - } - } - return 0; -} - static void vimc_release_subdevs(struct vimc_device *vimc) { unsigned int i; @@ -196,6 +178,26 @@ static void vimc_unregister_subdevs(struct vimc_device *vimc) vimc->pipe_cfg->ents[i].unregister(vimc->ent_devs[i]); } +static int vimc_add_subdevs(struct vimc_device *vimc) +{ + unsigned int i; + + for (i = 0; i < vimc->pipe_cfg->num_ents; i++) { + dev_dbg(vimc->mdev.dev, "new entity for %s\n", + vimc->pipe_cfg->ents[i].name); + vimc->ent_devs[i] = vimc->pipe_cfg->ents[i].add(vimc, + vimc->pipe_cfg->ents[i].name); + if (!vimc->ent_devs[i]) { + dev_err(vimc->mdev.dev, "add new entity for %s\n", + vimc->pipe_cfg->ents[i].name); + vimc_unregister_subdevs(vimc); + vimc_release_subdevs(vimc); + return -EINVAL; + } + } + return 0; +} + static void vimc_v4l2_dev_release(struct v4l2_device *v4l2_dev) { struct vimc_device *vimc = @@ -229,8 +231,7 @@ static int vimc_register_devices(struct vimc_device *vimc) /* Invoke entity config hooks to initialize and register subdevs */ ret = vimc_add_subdevs(vimc); if (ret) - /* remove sundevs that got added */ - goto err_rm_subdevs; + goto err_free_ent_devs; /* Initialize links */ ret = vimc_create_links(vimc); @@ -261,6 +262,7 @@ static int vimc_register_devices(struct vimc_device *vimc) err_rm_subdevs: vimc_unregister_subdevs(vimc); vimc_release_subdevs(vimc); +err_free_ent_devs: kfree(vimc->ent_devs); err_v4l2_unregister: v4l2_device_unregister(&vimc->v4l2_dev); -- GitLab From 967534cb49cd389b101848fa0c99dd8a1e961fbb Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 28 Mar 2020 08:52:52 +0100 Subject: [PATCH 083/503] media: vimc: keep the error value when adding an entity fails Currently when the 'add' callback of an entity fails, a NULL is returned. This hides the error code of the failure and always returns -EINVAL. Replace return NULL with return ERR_PTR(ret) to improve debugging. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test_drivers/vimc/vimc-capture.c | 4 ++-- drivers/media/test_drivers/vimc/vimc-core.c | 11 +++++++---- drivers/media/test_drivers/vimc/vimc-debayer.c | 4 ++-- drivers/media/test_drivers/vimc/vimc-scaler.c | 4 ++-- drivers/media/test_drivers/vimc/vimc-sensor.c | 4 ++-- 5 files changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/media/test_drivers/vimc/vimc-capture.c b/drivers/media/test_drivers/vimc/vimc-capture.c index 23e740c1c5c00..8bafbf90cbf5a 100644 --- a/drivers/media/test_drivers/vimc/vimc-capture.c +++ b/drivers/media/test_drivers/vimc/vimc-capture.c @@ -395,7 +395,7 @@ struct vimc_ent_device *vimc_cap_add(struct vimc_device *vimc, /* Allocate the vimc_cap_device struct */ vcap = kzalloc(sizeof(*vcap), GFP_KERNEL); if (!vcap) - return NULL; + return ERR_PTR(-ENOMEM); /* Initialize the media entity */ vcap->vdev.entity.name = vcfg_name; @@ -476,5 +476,5 @@ struct vimc_ent_device *vimc_cap_add(struct vimc_device *vimc, err_free_vcap: kfree(vcap); - return NULL; + return ERR_PTR(ret); } diff --git a/drivers/media/test_drivers/vimc/vimc-core.c b/drivers/media/test_drivers/vimc/vimc-core.c index dab01cbc31d25..edac998f58d55 100644 --- a/drivers/media/test_drivers/vimc/vimc-core.c +++ b/drivers/media/test_drivers/vimc/vimc-core.c @@ -187,12 +187,15 @@ static int vimc_add_subdevs(struct vimc_device *vimc) vimc->pipe_cfg->ents[i].name); vimc->ent_devs[i] = vimc->pipe_cfg->ents[i].add(vimc, vimc->pipe_cfg->ents[i].name); - if (!vimc->ent_devs[i]) { - dev_err(vimc->mdev.dev, "add new entity for %s\n", - vimc->pipe_cfg->ents[i].name); + if (IS_ERR(vimc->ent_devs[i])) { + int err = PTR_ERR(vimc->ent_devs[i]); + + dev_err(vimc->mdev.dev, "adding entity %s failed (%d)\n", + vimc->pipe_cfg->ents[i].name, err); + vimc->ent_devs[i] = NULL; vimc_unregister_subdevs(vimc); vimc_release_subdevs(vimc); - return -EINVAL; + return err; } } return 0; diff --git a/drivers/media/test_drivers/vimc/vimc-debayer.c b/drivers/media/test_drivers/vimc/vimc-debayer.c index baf6bf9f65b50..d591b6a6bcf0c 100644 --- a/drivers/media/test_drivers/vimc/vimc-debayer.c +++ b/drivers/media/test_drivers/vimc/vimc-debayer.c @@ -532,7 +532,7 @@ struct vimc_ent_device *vimc_deb_add(struct vimc_device *vimc, /* Allocate the vdeb struct */ vdeb = kzalloc(sizeof(*vdeb), GFP_KERNEL); if (!vdeb) - return NULL; + return ERR_PTR(-ENOMEM); /* Create controls: */ v4l2_ctrl_handler_init(&vdeb->hdl, 2); @@ -577,5 +577,5 @@ struct vimc_ent_device *vimc_deb_add(struct vimc_device *vimc, err_free_vdeb: kfree(vdeb); - return NULL; + return ERR_PTR(ret); } diff --git a/drivers/media/test_drivers/vimc/vimc-scaler.c b/drivers/media/test_drivers/vimc/vimc-scaler.c index 7521439747c57..6ea05dcebc315 100644 --- a/drivers/media/test_drivers/vimc/vimc-scaler.c +++ b/drivers/media/test_drivers/vimc/vimc-scaler.c @@ -483,7 +483,7 @@ struct vimc_ent_device *vimc_sca_add(struct vimc_device *vimc, /* Allocate the vsca struct */ vsca = kzalloc(sizeof(*vsca), GFP_KERNEL); if (!vsca) - return NULL; + return ERR_PTR(-ENOMEM); /* Initialize ved and sd */ vsca->pads[0].flags = MEDIA_PAD_FL_SINK; @@ -495,7 +495,7 @@ struct vimc_ent_device *vimc_sca_add(struct vimc_device *vimc, vsca->pads, &vimc_sca_ops); if (ret) { kfree(vsca); - return NULL; + return ERR_PTR(ret); } vsca->ved.process_frame = vimc_sca_process_frame; diff --git a/drivers/media/test_drivers/vimc/vimc-sensor.c b/drivers/media/test_drivers/vimc/vimc-sensor.c index 92daee58209e9..24ce5b70b97ea 100644 --- a/drivers/media/test_drivers/vimc/vimc-sensor.c +++ b/drivers/media/test_drivers/vimc/vimc-sensor.c @@ -317,7 +317,7 @@ struct vimc_ent_device *vimc_sen_add(struct vimc_device *vimc, /* Allocate the vsen struct */ vsen = kzalloc(sizeof(*vsen), GFP_KERNEL); if (!vsen) - return NULL; + return ERR_PTR(-ENOMEM); v4l2_ctrl_handler_init(&vsen->hdl, 4); @@ -372,5 +372,5 @@ struct vimc_ent_device *vimc_sen_add(struct vimc_device *vimc, err_free_vsen: kfree(vsen); - return NULL; + return ERR_PTR(ret); } -- GitLab From 5aa0d0964b98100595dcdbf3af12f45c579a8198 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 28 Mar 2020 08:52:53 +0100 Subject: [PATCH 084/503] media: vimc: fix issues in documentation in vimc-common.h There are some missing and extra fields and typos in structs documentations in vimc-common.h. Fix it. [mchehab+huawei@kernel.org: add a missing ':' after @bayer field] Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test_drivers/vimc/vimc-common.h | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/media/test_drivers/vimc/vimc-common.h b/drivers/media/test_drivers/vimc/vimc-common.h index 616d5a6b07546..db3062fdc63d8 100644 --- a/drivers/media/test_drivers/vimc/vimc-common.h +++ b/drivers/media/test_drivers/vimc/vimc-common.h @@ -63,7 +63,8 @@ do { \ * * @code: media bus format code defined by MEDIA_BUS_FMT_* macros * @bbp: number of bytes each pixel occupies - * @pixelformat: pixel format devined by V4L2_PIX_FMT_* macros + * @pixelformat: pixel format defined by V4L2_PIX_FMT_* macros + * @bayer: true if this is a bayer format * * Struct which matches the MEDIA_BUS_FMT_* codes with the corresponding * V4L2_PIX_FMT_* fourcc pixelformat and its bytes per pixel (bpp) @@ -90,7 +91,7 @@ struct vimc_pix_map { * the node it will be of an instance of v4l2_subdev or video_device struct * where both contains a struct media_entity. * Those structures should embedded the vimc_ent_device struct through - * v4l2_set_subdevdata() and video_set_drvdata() respectivaly, allowing the + * v4l2_set_subdevdata() and video_set_drvdata() respectively, allowing the * vimc_ent_device struct to be retrieved from the corresponding struct * media_entity */ @@ -123,10 +124,8 @@ struct vimc_device { * configuration for each entity * * @name entity name - * @ved pointer to vimc_ent_device (a node in the - * topology) * @add initializes and registers - * vim entity - called from vimc-core + * vimc entity - called from vimc-core * @unregister unregisters vimc entity - called from vimc-core * @release releases vimc entity - called from the v4l2_dev * release callback @@ -182,7 +181,7 @@ const struct vimc_pix_map *vimc_pix_map_by_code(u32 code); /** * vimc_pix_map_by_pixelformat - get vimc_pix_map struct by v4l2 pixel format * - * @pixelformat: pixel format devined by V4L2_PIX_FMT_* macros + * @pixelformat: pixel format defined by V4L2_PIX_FMT_* macros */ const struct vimc_pix_map *vimc_pix_map_by_pixelformat(u32 pixelformat); -- GitLab From e472d6a2594bb78277c5c7272f8867652aee9591 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Tue, 31 Mar 2020 20:45:15 +0200 Subject: [PATCH 085/503] media: vimc: add vimc_ent_type struct for the callbacks of entities Since each vimc entity type is defined by the callbacks implementation, it is a good idea to add a struct to hold these callbacks. Each vimc entity then declare its type in the file for the entity. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../media/test_drivers/vimc/vimc-capture.c | 14 +++++-- drivers/media/test_drivers/vimc/vimc-common.h | 42 +++++++++---------- drivers/media/test_drivers/vimc/vimc-core.c | 38 ++++++----------- .../media/test_drivers/vimc/vimc-debayer.c | 11 +++-- drivers/media/test_drivers/vimc/vimc-scaler.c | 11 +++-- drivers/media/test_drivers/vimc/vimc-sensor.c | 11 +++-- 6 files changed, 67 insertions(+), 60 deletions(-) diff --git a/drivers/media/test_drivers/vimc/vimc-capture.c b/drivers/media/test_drivers/vimc/vimc-capture.c index 8bafbf90cbf5a..5315c201314c9 100644 --- a/drivers/media/test_drivers/vimc/vimc-capture.c +++ b/drivers/media/test_drivers/vimc/vimc-capture.c @@ -325,7 +325,7 @@ static const struct media_entity_operations vimc_cap_mops = { .link_validate = vimc_vdev_link_validate, }; -void vimc_cap_release(struct vimc_ent_device *ved) +static void vimc_cap_release(struct vimc_ent_device *ved) { struct vimc_cap_device *vcap = container_of(ved, struct vimc_cap_device, ved); @@ -334,7 +334,7 @@ void vimc_cap_release(struct vimc_ent_device *ved) kfree(vcap); } -void vimc_cap_unregister(struct vimc_ent_device *ved) +static void vimc_cap_unregister(struct vimc_ent_device *ved) { struct vimc_cap_device *vcap = container_of(ved, struct vimc_cap_device, ved); @@ -382,8 +382,8 @@ static void *vimc_cap_process_frame(struct vimc_ent_device *ved, return NULL; } -struct vimc_ent_device *vimc_cap_add(struct vimc_device *vimc, - const char *vcfg_name) +static struct vimc_ent_device *vimc_cap_add(struct vimc_device *vimc, + const char *vcfg_name) { struct v4l2_device *v4l2_dev = &vimc->v4l2_dev; const struct vimc_pix_map *vpix; @@ -478,3 +478,9 @@ struct vimc_ent_device *vimc_cap_add(struct vimc_device *vimc, return ERR_PTR(ret); } + +struct vimc_ent_type vimc_cap_type = { + .add = vimc_cap_add, + .unregister = vimc_cap_unregister, + .release = vimc_cap_release +}; diff --git a/drivers/media/test_drivers/vimc/vimc-common.h b/drivers/media/test_drivers/vimc/vimc-common.h index db3062fdc63d8..1155eba36b6a8 100644 --- a/drivers/media/test_drivers/vimc/vimc-common.h +++ b/drivers/media/test_drivers/vimc/vimc-common.h @@ -120,24 +120,35 @@ struct vimc_device { }; /** - * struct vimc_ent_config Structure which describes individual - * configuration for each entity + * struct vimc_ent_type Structure for the callbacks of the entity types + * * - * @name entity name * @add initializes and registers * vimc entity - called from vimc-core * @unregister unregisters vimc entity - called from vimc-core * @release releases vimc entity - called from the v4l2_dev * release callback */ -struct vimc_ent_config { - const char *name; +struct vimc_ent_type { struct vimc_ent_device *(*add)(struct vimc_device *vimc, const char *vcfg_name); void (*unregister)(struct vimc_ent_device *ved); void (*release)(struct vimc_ent_device *ved); }; +/** + * struct vimc_ent_config Structure which describes individual + * configuration for each entity + * + * @name entity name + * @type contain the callbacks of this entity type + * + */ +struct vimc_ent_config { + const char *name; + struct vimc_ent_type *type; +}; + /** * vimc_is_source - returns true if the entity has only source pads * @@ -146,23 +157,10 @@ struct vimc_ent_config { */ bool vimc_is_source(struct media_entity *ent); -/* prototypes for vimc_ent_config hooks */ -struct vimc_ent_device *vimc_cap_add(struct vimc_device *vimc, - const char *vcfg_name); -void vimc_cap_unregister(struct vimc_ent_device *ved); -void vimc_cap_release(struct vimc_ent_device *ved); - -struct vimc_ent_device *vimc_deb_add(struct vimc_device *vimc, - const char *vcfg_name); -void vimc_deb_release(struct vimc_ent_device *ved); - -struct vimc_ent_device *vimc_sca_add(struct vimc_device *vimc, - const char *vcfg_name); -void vimc_sca_release(struct vimc_ent_device *ved); - -struct vimc_ent_device *vimc_sen_add(struct vimc_device *vimc, - const char *vcfg_name); -void vimc_sen_release(struct vimc_ent_device *ved); +extern struct vimc_ent_type vimc_sen_type; +extern struct vimc_ent_type vimc_deb_type; +extern struct vimc_ent_type vimc_sca_type; +extern struct vimc_ent_type vimc_cap_type; /** * vimc_pix_map_by_index - get vimc_pix_map struct by its index diff --git a/drivers/media/test_drivers/vimc/vimc-core.c b/drivers/media/test_drivers/vimc/vimc-core.c index edac998f58d55..11210aaa2551d 100644 --- a/drivers/media/test_drivers/vimc/vimc-core.c +++ b/drivers/media/test_drivers/vimc/vimc-core.c @@ -47,52 +47,40 @@ struct vimc_pipeline_config { static struct vimc_ent_config ent_config[] = { { .name = "Sensor A", - .add = vimc_sen_add, - .release = vimc_sen_release, + .type = &vimc_sen_type }, { .name = "Sensor B", - .add = vimc_sen_add, - .release = vimc_sen_release, + .type = &vimc_sen_type }, { .name = "Debayer A", - .add = vimc_deb_add, - .release = vimc_deb_release, + .type = &vimc_deb_type }, { .name = "Debayer B", - .add = vimc_deb_add, - .release = vimc_deb_release, + .type = &vimc_deb_type }, { .name = "Raw Capture 0", - .add = vimc_cap_add, - .unregister = vimc_cap_unregister, - .release = vimc_cap_release, + .type = &vimc_cap_type }, { .name = "Raw Capture 1", - .add = vimc_cap_add, - .unregister = vimc_cap_unregister, - .release = vimc_cap_release, + .type = &vimc_cap_type }, { /* TODO: change this to vimc-input when it is implemented */ .name = "RGB/YUV Input", - .add = vimc_sen_add, - .release = vimc_sen_release, + .type = &vimc_sen_type }, { .name = "Scaler", - .add = vimc_sca_add, - .release = vimc_sca_release, + .type = &vimc_sca_type }, { .name = "RGB/YUV Capture", - .add = vimc_cap_add, - .unregister = vimc_cap_unregister, - .release = vimc_cap_release, + .type = &vimc_cap_type }, }; @@ -166,7 +154,7 @@ static void vimc_release_subdevs(struct vimc_device *vimc) for (i = 0; i < vimc->pipe_cfg->num_ents; i++) if (vimc->ent_devs[i]) - vimc->pipe_cfg->ents[i].release(vimc->ent_devs[i]); + vimc->pipe_cfg->ents[i].type->release(vimc->ent_devs[i]); } static void vimc_unregister_subdevs(struct vimc_device *vimc) @@ -174,8 +162,8 @@ static void vimc_unregister_subdevs(struct vimc_device *vimc) unsigned int i; for (i = 0; i < vimc->pipe_cfg->num_ents; i++) - if (vimc->ent_devs[i] && vimc->pipe_cfg->ents[i].unregister) - vimc->pipe_cfg->ents[i].unregister(vimc->ent_devs[i]); + if (vimc->ent_devs[i] && vimc->pipe_cfg->ents[i].type->unregister) + vimc->pipe_cfg->ents[i].type->unregister(vimc->ent_devs[i]); } static int vimc_add_subdevs(struct vimc_device *vimc) @@ -185,7 +173,7 @@ static int vimc_add_subdevs(struct vimc_device *vimc) for (i = 0; i < vimc->pipe_cfg->num_ents; i++) { dev_dbg(vimc->mdev.dev, "new entity for %s\n", vimc->pipe_cfg->ents[i].name); - vimc->ent_devs[i] = vimc->pipe_cfg->ents[i].add(vimc, + vimc->ent_devs[i] = vimc->pipe_cfg->ents[i].type->add(vimc, vimc->pipe_cfg->ents[i].name); if (IS_ERR(vimc->ent_devs[i])) { int err = PTR_ERR(vimc->ent_devs[i]); diff --git a/drivers/media/test_drivers/vimc/vimc-debayer.c b/drivers/media/test_drivers/vimc/vimc-debayer.c index d591b6a6bcf0c..d10aee9f84c44 100644 --- a/drivers/media/test_drivers/vimc/vimc-debayer.c +++ b/drivers/media/test_drivers/vimc/vimc-debayer.c @@ -494,7 +494,7 @@ static const struct v4l2_ctrl_ops vimc_deb_ctrl_ops = { .s_ctrl = vimc_deb_s_ctrl, }; -void vimc_deb_release(struct vimc_ent_device *ved) +static void vimc_deb_release(struct vimc_ent_device *ved) { struct vimc_deb_device *vdeb = container_of(ved, struct vimc_deb_device, ved); @@ -522,8 +522,8 @@ static const struct v4l2_ctrl_config vimc_deb_ctrl_mean_win_size = { .def = 3, }; -struct vimc_ent_device *vimc_deb_add(struct vimc_device *vimc, - const char *vcfg_name) +static struct vimc_ent_device *vimc_deb_add(struct vimc_device *vimc, + const char *vcfg_name) { struct v4l2_device *v4l2_dev = &vimc->v4l2_dev; struct vimc_deb_device *vdeb; @@ -579,3 +579,8 @@ struct vimc_ent_device *vimc_deb_add(struct vimc_device *vimc, return ERR_PTR(ret); } + +struct vimc_ent_type vimc_deb_type = { + .add = vimc_deb_add, + .release = vimc_deb_release +}; diff --git a/drivers/media/test_drivers/vimc/vimc-scaler.c b/drivers/media/test_drivers/vimc/vimc-scaler.c index 6ea05dcebc315..465b906b74977 100644 --- a/drivers/media/test_drivers/vimc/vimc-scaler.c +++ b/drivers/media/test_drivers/vimc/vimc-scaler.c @@ -464,7 +464,7 @@ static void *vimc_sca_process_frame(struct vimc_ent_device *ved, return vsca->src_frame; }; -void vimc_sca_release(struct vimc_ent_device *ved) +static void vimc_sca_release(struct vimc_ent_device *ved) { struct vimc_sca_device *vsca = container_of(ved, struct vimc_sca_device, ved); @@ -473,8 +473,8 @@ void vimc_sca_release(struct vimc_ent_device *ved) kfree(vsca); } -struct vimc_ent_device *vimc_sca_add(struct vimc_device *vimc, - const char *vcfg_name) +static struct vimc_ent_device *vimc_sca_add(struct vimc_device *vimc, + const char *vcfg_name) { struct v4l2_device *v4l2_dev = &vimc->v4l2_dev; struct vimc_sca_device *vsca; @@ -509,3 +509,8 @@ struct vimc_ent_device *vimc_sca_add(struct vimc_device *vimc, return &vsca->ved; } + +struct vimc_ent_type vimc_sca_type = { + .add = vimc_sca_add, + .release = vimc_sca_release +}; diff --git a/drivers/media/test_drivers/vimc/vimc-sensor.c b/drivers/media/test_drivers/vimc/vimc-sensor.c index 24ce5b70b97ea..228120b3a6ddc 100644 --- a/drivers/media/test_drivers/vimc/vimc-sensor.c +++ b/drivers/media/test_drivers/vimc/vimc-sensor.c @@ -279,7 +279,7 @@ static const struct v4l2_ctrl_ops vimc_sen_ctrl_ops = { .s_ctrl = vimc_sen_s_ctrl, }; -void vimc_sen_release(struct vimc_ent_device *ved) +static void vimc_sen_release(struct vimc_ent_device *ved) { struct vimc_sen_device *vsen = container_of(ved, struct vimc_sen_device, ved); @@ -307,8 +307,8 @@ static const struct v4l2_ctrl_config vimc_sen_ctrl_test_pattern = { .qmenu = tpg_pattern_strings, }; -struct vimc_ent_device *vimc_sen_add(struct vimc_device *vimc, - const char *vcfg_name) +static struct vimc_ent_device *vimc_sen_add(struct vimc_device *vimc, + const char *vcfg_name) { struct v4l2_device *v4l2_dev = &vimc->v4l2_dev; struct vimc_sen_device *vsen; @@ -374,3 +374,8 @@ struct vimc_ent_device *vimc_sen_add(struct vimc_device *vimc, return ERR_PTR(ret); } + +struct vimc_ent_type vimc_sen_type = { + .add = vimc_sen_add, + .release = vimc_sen_release +}; -- GitLab From 9d3bf4cd9f1e04012679aca71db4ff540b8bf30d Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Sat, 28 Mar 2020 15:44:16 +0100 Subject: [PATCH 086/503] media: vim2m: Remove unneeded buffer lock This spinlock is used solely to call v4l2_m2m_buf_done(). Since buffers are obtained only after being removed from the ready queue, there's no concurrent access, and so no need for synchronization. Remove the spinlock to make sure no one copies this pattern. Some archaeology shows this is a small leftover from ancient code. This driver (then called m2m_testdev) used the videobuf1 framework; commit d80ee38cd845 ("[media] v4l: mem2mem: port m2m_testdev to vb2") converted it to videobuf2. The spinlock was then no longer needed, and this simply went unnoticed. Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test_drivers/vim2m.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/media/test_drivers/vim2m.c b/drivers/media/test_drivers/vim2m.c index ac6717fbb7649..a776bb8e0e093 100644 --- a/drivers/media/test_drivers/vim2m.c +++ b/drivers/media/test_drivers/vim2m.c @@ -216,7 +216,6 @@ struct vim2m_ctx { struct mutex vb_mutex; struct delayed_work work_run; - spinlock_t irqlock; /* Abort requested by m2m */ int aborting; @@ -622,7 +621,6 @@ static void device_work(struct work_struct *w) struct vim2m_ctx *curr_ctx; struct vim2m_dev *vim2m_dev; struct vb2_v4l2_buffer *src_vb, *dst_vb; - unsigned long flags; curr_ctx = container_of(w, struct vim2m_ctx, work_run.work); @@ -638,10 +636,8 @@ static void device_work(struct work_struct *w) curr_ctx->num_processed++; - spin_lock_irqsave(&curr_ctx->irqlock, flags); v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE); v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE); - spin_unlock_irqrestore(&curr_ctx->irqlock, flags); if (curr_ctx->num_processed == curr_ctx->translen || curr_ctx->aborting) { @@ -1084,7 +1080,6 @@ static void vim2m_stop_streaming(struct vb2_queue *q) { struct vim2m_ctx *ctx = vb2_get_drv_priv(q); struct vb2_v4l2_buffer *vbuf; - unsigned long flags; cancel_delayed_work_sync(&ctx->work_run); @@ -1097,9 +1092,7 @@ static void vim2m_stop_streaming(struct vb2_queue *q) return; v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, &ctx->hdl); - spin_lock_irqsave(&ctx->irqlock, flags); v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); - spin_unlock_irqrestore(&ctx->irqlock, flags); } } @@ -1226,7 +1219,6 @@ static int vim2m_open(struct file *file) ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init); mutex_init(&ctx->vb_mutex); - spin_lock_init(&ctx->irqlock); INIT_DELAYED_WORK(&ctx->work_run, device_work); if (IS_ERR(ctx->fh.m2m_ctx)) { -- GitLab From e671ed99f843e0c783c63d731a03c52f7073ae51 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 14 Apr 2020 12:09:12 +0200 Subject: [PATCH 087/503] media: vimc: fix kernel-doc markups There are several markups there that doesn't follow the specs. Fields should be like: @foo: with a collon at the end. Also, continuation lines should be aligned. Failing to do that would cause kernel-doc to parse it wrong. Some of the troubles will even cause warnings: $ ./scripts/kernel-doc -none drivers/media/test_drivers/vimc/vimc-common.h drivers/media/test_drivers/vimc/vimc-common.h:59: error: Cannot parse struct or union! drivers/media/test_drivers/vimc/vimc-common.h:77: warning: Function parameter or member 'bpp' not described in 'vimc_pix_map' drivers/media/test_drivers/vimc/vimc-common.h:120: warning: Function parameter or member 'pipe_cfg' not described in 'vimc_device' drivers/media/test_drivers/vimc/vimc-common.h:120: warning: Function parameter or member 'ent_devs' not described in 'vimc_device' drivers/media/test_drivers/vimc/vimc-common.h:120: warning: Function parameter or member 'mdev' not described in 'vimc_device' drivers/media/test_drivers/vimc/vimc-common.h:120: warning: Function parameter or member 'v4l2_dev' not described in 'vimc_device' drivers/media/test_drivers/vimc/vimc-common.h:137: warning: Function parameter or member 'add' not described in 'vimc_ent_type' drivers/media/test_drivers/vimc/vimc-common.h:137: warning: Function parameter or member 'unregister' not described in 'vimc_ent_type' drivers/media/test_drivers/vimc/vimc-common.h:137: warning: Function parameter or member 'release' not described in 'vimc_ent_type' drivers/media/test_drivers/vimc/vimc-common.h:150: warning: Function parameter or member 'name' not described in 'vimc_ent_config' drivers/media/test_drivers/vimc/vimc-common.h:150: warning: Function parameter or member 'type' not described in 'vimc_ent_config' drivers/media/test_drivers/vimc/vimc-common.h:197: warning: bad line: flags of the pads Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test_drivers/vimc/vimc-common.h | 28 +++++++++---------- .../media/test_drivers/vimc/vimc-streamer.h | 7 +++-- 2 files changed, 18 insertions(+), 17 deletions(-) diff --git a/drivers/media/test_drivers/vimc/vimc-common.h b/drivers/media/test_drivers/vimc/vimc-common.h index 1155eba36b6a8..487bd020f85c8 100644 --- a/drivers/media/test_drivers/vimc/vimc-common.h +++ b/drivers/media/test_drivers/vimc/vimc-common.h @@ -33,7 +33,7 @@ #define VIMC_IS_SINK(pad) (!(pad)) /** - * struct vimc_colorimetry_clamp - Adjust colorimetry parameters + * vimc_colorimetry_clamp - Adjust colorimetry parameters * * @fmt: the pointer to struct v4l2_pix_format or * struct v4l2_mbus_framefmt @@ -62,7 +62,7 @@ do { \ * struct vimc_pix_map - maps media bus code with v4l2 pixel format * * @code: media bus format code defined by MEDIA_BUS_FMT_* macros - * @bbp: number of bytes each pixel occupies + * @bpp: number of bytes each pixel occupies * @pixelformat: pixel format defined by V4L2_PIX_FMT_* macros * @bayer: true if this is a bayer format * @@ -107,10 +107,10 @@ struct vimc_ent_device { /** * struct vimc_device - main device for vimc driver * - * @pipe_cfg pointer to the vimc pipeline configuration structure - * @ent_devs array of vimc_ent_device pointers - * @mdev the associated media_device parent - * @v4l2_dev Internal v4l2 parent device + * @pipe_cfg: pointer to the vimc pipeline configuration structure + * @ent_devs: array of vimc_ent_device pointers + * @mdev: the associated media_device parent + * @v4l2_dev: Internal v4l2 parent device */ struct vimc_device { const struct vimc_pipeline_config *pipe_cfg; @@ -123,11 +123,11 @@ struct vimc_device { * struct vimc_ent_type Structure for the callbacks of the entity types * * - * @add initializes and registers - * vimc entity - called from vimc-core - * @unregister unregisters vimc entity - called from vimc-core - * @release releases vimc entity - called from the v4l2_dev - * release callback + * @add: initializes and registers + * vimc entity - called from vimc-core + * @unregister: unregisters vimc entity - called from vimc-core + * @release: releases vimc entity - called from the v4l2_dev + * release callback */ struct vimc_ent_type { struct vimc_ent_device *(*add)(struct vimc_device *vimc, @@ -140,8 +140,8 @@ struct vimc_ent_type { * struct vimc_ent_config Structure which describes individual * configuration for each entity * - * @name entity name - * @type contain the callbacks of this entity type + * @name: entity name + * @type: contain the callbacks of this entity type * */ struct vimc_ent_config { @@ -194,7 +194,7 @@ const struct vimc_pix_map *vimc_pix_map_by_pixelformat(u32 pixelformat); * @function: media entity function defined by MEDIA_ENT_F_* macros * @num_pads: number of pads to initialize * @pads: the array of pads of the entity, the caller should set the - flags of the pads + * flags of the pads * @sd_ops: pointer to &struct v4l2_subdev_ops. * * Helper function initialize and register the struct vimc_ent_device and struct diff --git a/drivers/media/test_drivers/vimc/vimc-streamer.h b/drivers/media/test_drivers/vimc/vimc-streamer.h index fe3c51f15fad6..3bb6731b8d4da 100644 --- a/drivers/media/test_drivers/vimc/vimc-streamer.h +++ b/drivers/media/test_drivers/vimc/vimc-streamer.h @@ -20,9 +20,10 @@ * * @pipe: the media pipeline object associated with this stream * @ved_pipeline: array containing all the entities participating in the - * stream. The order is from a video device (usually a capture device) where - * stream_on was called, to the entity generating the first base image to be - * processed in the pipeline. + * stream. The order is from a video device (usually a + * capture device) where stream_on was called, to the + * entity generating the first base image to be + * processed in the pipeline. * @pipe_size: size of @ved_pipeline * @kthread: thread that generates the frames of the stream. * -- GitLab From 33e3c349b2bf1235be458df09fb8d237141486c4 Mon Sep 17 00:00:00 2001 From: Bingbu Cao Date: Thu, 26 Mar 2020 15:54:37 +0100 Subject: [PATCH 088/503] media: staging/intel-ipu3: Implement lock for stream on/off operations Currently concurrent stream off operations on ImgU nodes are not synchronized, leading to use-after-free bugs (as reported by KASAN). [ 250.090724] BUG: KASAN: use-after-free in ipu3_dmamap_free+0xc5/0x116 [ipu3_imgu] [ 250.090726] Read of size 8 at addr ffff888127b29bc0 by task yavta/18836 [ 250.090731] Hardware name: HP Soraka/Soraka, BIOS Google_Soraka.10431.17.0 03/22/2018 [ 250.090732] Call Trace: [ 250.090735] dump_stack+0x6a/0xb1 [ 250.090739] print_address_description+0x8e/0x279 [ 250.090743] ? ipu3_dmamap_free+0xc5/0x116 [ipu3_imgu] [ 250.090746] kasan_report+0x260/0x28a [ 250.090750] ipu3_dmamap_free+0xc5/0x116 [ipu3_imgu] [ 250.090754] ipu3_css_pool_cleanup+0x24/0x37 [ipu3_imgu] [ 250.090759] ipu3_css_pipeline_cleanup+0x61/0xb9 [ipu3_imgu] [ 250.090763] ipu3_css_stop_streaming+0x1f2/0x321 [ipu3_imgu] [ 250.090768] imgu_s_stream+0x94/0x443 [ipu3_imgu] [ 250.090772] ? ipu3_vb2_buf_queue+0x280/0x280 [ipu3_imgu] [ 250.090775] ? vb2_dma_sg_unmap_dmabuf+0x16/0x6f [videobuf2_dma_sg] [ 250.090778] ? vb2_buffer_in_use+0x36/0x58 [videobuf2_common] [ 250.090782] ipu3_vb2_stop_streaming+0xf9/0x135 [ipu3_imgu] Implemented a lock to synchronize imgu stream on / off operations and the modification of streaming flag (in struct imgu_device), to prevent these issues. Reported-by: Laurent Pinchart Suggested-by: Laurent Pinchart Signed-off-by: Rajmohan Mani Signed-off-by: Bingbu Cao Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3-v4l2.c | 10 ++++++++++ drivers/staging/media/ipu3/ipu3.c | 3 +++ drivers/staging/media/ipu3/ipu3.h | 4 ++++ 3 files changed, 17 insertions(+) diff --git a/drivers/staging/media/ipu3/ipu3-v4l2.c b/drivers/staging/media/ipu3/ipu3-v4l2.c index 09c8ede1457ca..db8b5d13631a9 100644 --- a/drivers/staging/media/ipu3/ipu3-v4l2.c +++ b/drivers/staging/media/ipu3/ipu3-v4l2.c @@ -367,8 +367,10 @@ static void imgu_vb2_buf_queue(struct vb2_buffer *vb) vb2_set_plane_payload(vb, 0, need_bytes); + mutex_lock(&imgu->streaming_lock); if (imgu->streaming) imgu_queue_buffers(imgu, false, node->pipe); + mutex_unlock(&imgu->streaming_lock); dev_dbg(&imgu->pci_dev->dev, "%s for pipe %u node %u", __func__, node->pipe, node->id); @@ -468,10 +470,13 @@ static int imgu_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) dev_dbg(dev, "%s node name %s pipe %u id %u", __func__, node->name, node->pipe, node->id); + mutex_lock(&imgu->streaming_lock); if (imgu->streaming) { r = -EBUSY; + mutex_unlock(&imgu->streaming_lock); goto fail_return_bufs; } + mutex_unlock(&imgu->streaming_lock); if (!node->enabled) { dev_err(dev, "IMGU node is not enabled"); @@ -498,9 +503,11 @@ static int imgu_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) /* Start streaming of the whole pipeline now */ dev_dbg(dev, "IMGU streaming is ready to start"); + mutex_lock(&imgu->streaming_lock); r = imgu_s_stream(imgu, true); if (!r) imgu->streaming = true; + mutex_unlock(&imgu->streaming_lock); return 0; @@ -532,6 +539,7 @@ static void imgu_vb2_stop_streaming(struct vb2_queue *vq) dev_err(&imgu->pci_dev->dev, "failed to stop subdev streaming\n"); + mutex_lock(&imgu->streaming_lock); /* Was this the first node with streaming disabled? */ if (imgu->streaming && imgu_all_nodes_streaming(imgu, node)) { /* Yes, really stop streaming now */ @@ -542,6 +550,8 @@ static void imgu_vb2_stop_streaming(struct vb2_queue *vq) } imgu_return_all_buffers(imgu, node, VB2_BUF_STATE_ERROR); + mutex_unlock(&imgu->streaming_lock); + media_pipeline_stop(&node->vdev.entity); } diff --git a/drivers/staging/media/ipu3/ipu3.c b/drivers/staging/media/ipu3/ipu3.c index 4d53aad314832..a25a997cfd7ef 100644 --- a/drivers/staging/media/ipu3/ipu3.c +++ b/drivers/staging/media/ipu3/ipu3.c @@ -675,6 +675,7 @@ static int imgu_pci_probe(struct pci_dev *pci_dev, return r; mutex_init(&imgu->lock); + mutex_init(&imgu->streaming_lock); atomic_set(&imgu->qbuf_barrier, 0); init_waitqueue_head(&imgu->buf_drain_wq); @@ -738,6 +739,7 @@ static int imgu_pci_probe(struct pci_dev *pci_dev, out_css_powerdown: imgu_css_set_powerdown(&pci_dev->dev, imgu->base); out_mutex_destroy: + mutex_destroy(&imgu->streaming_lock); mutex_destroy(&imgu->lock); return r; @@ -755,6 +757,7 @@ static void imgu_pci_remove(struct pci_dev *pci_dev) imgu_css_set_powerdown(&pci_dev->dev, imgu->base); imgu_dmamap_exit(imgu); imgu_mmu_exit(imgu->mmu); + mutex_destroy(&imgu->streaming_lock); mutex_destroy(&imgu->lock); } diff --git a/drivers/staging/media/ipu3/ipu3.h b/drivers/staging/media/ipu3/ipu3.h index 73b123b2b8a2d..8cd6a0077d991 100644 --- a/drivers/staging/media/ipu3/ipu3.h +++ b/drivers/staging/media/ipu3/ipu3.h @@ -146,6 +146,10 @@ struct imgu_device { * vid_buf.list and css->queue */ struct mutex lock; + + /* Lock to protect writes to streaming flag in this struct */ + struct mutex streaming_lock; + /* Forbid streaming and buffer queuing during system suspend. */ atomic_t qbuf_barrier; /* Indicate if system suspend take place while imgu is streaming. */ -- GitLab From 9581ba4596e073659280f9fd95a73fbaadb973eb Mon Sep 17 00:00:00 2001 From: Deepak R Varma Date: Wed, 25 Mar 2020 21:38:24 +0100 Subject: [PATCH 089/503] media: staging/intel-ipu3: css: simplify expression An array index computed inside square brackets complicates the code and also extends the line beyond 80 character. Add new variable to compute array index separately and use it as an index during assignment. Signed-off-by: Deepak R Varma Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3-css-params.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-css-params.c b/drivers/staging/media/ipu3/ipu3-css-params.c index 4533dacad4beb..fbd53d7c097cd 100644 --- a/drivers/staging/media/ipu3/ipu3-css-params.c +++ b/drivers/staging/media/ipu3/ipu3-css-params.c @@ -49,14 +49,13 @@ imgu_css_scaler_setup_lut(unsigned int taps, unsigned int input_width, int tap, phase, phase_sum_left, phase_sum_right; int exponent = imgu_css_scaler_get_exp(output_width, input_width); int mantissa = (1 << exponent) * output_width; - unsigned int phase_step; + unsigned int phase_step, phase_taps; if (input_width == output_width) { for (phase = 0; phase < IMGU_SCALER_PHASES; phase++) { - for (tap = 0; tap < taps; tap++) { - coeff_lut[phase * IMGU_SCALER_FILTER_TAPS + tap] - = 0; - } + phase_taps = phase * IMGU_SCALER_FILTER_TAPS; + for (tap = 0; tap < taps; tap++) + coeff_lut[phase_taps + tap] = 0; } info->phase_step = IMGU_SCALER_PHASES * @@ -71,6 +70,7 @@ imgu_css_scaler_setup_lut(unsigned int taps, unsigned int input_width, } for (phase = 0; phase < IMGU_SCALER_PHASES; phase++) { + phase_taps = phase * IMGU_SCALER_FILTER_TAPS; for (tap = 0; tap < taps; tap++) { /* flip table to for convolution reverse indexing */ s64 coeff = coeffs[coeffs_size - @@ -81,9 +81,7 @@ imgu_css_scaler_setup_lut(unsigned int taps, unsigned int input_width, /* Add +"0.5" */ coeff += 1 << (IMGU_SCALER_COEFF_BITS - 1); coeff >>= IMGU_SCALER_COEFF_BITS; - - coeff_lut[phase * IMGU_SCALER_FILTER_TAPS + tap] = - coeff; + coeff_lut[phase_taps + tap] = coeff; } } -- GitLab From 34b7db6fff8d977398234cd6393c620787989e68 Mon Sep 17 00:00:00 2001 From: Deepak R Varma Date: Wed, 25 Mar 2020 21:56:44 +0100 Subject: [PATCH 090/503] media: staging/intel-ipu3: Remove extra blank lines Remove extra blank lines from the code blocks. Signed-off-by: Deepak R Varma Reviewed-by: Stefano Brivio Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3-v4l2.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-v4l2.c b/drivers/staging/media/ipu3/ipu3-v4l2.c index db8b5d13631a9..9c121ab461aba 100644 --- a/drivers/staging/media/ipu3/ipu3-v4l2.c +++ b/drivers/staging/media/ipu3/ipu3-v4l2.c @@ -152,7 +152,6 @@ static int imgu_subdev_set_fmt(struct v4l2_subdev *sd, struct imgu_v4l2_subdev *imgu_sd = container_of(sd, struct imgu_v4l2_subdev, subdev); - struct v4l2_mbus_framefmt *mf; u32 pad = fmt->pad; unsigned int pipe = imgu_sd->pipe; @@ -490,7 +489,6 @@ static int imgu_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) if (r < 0) goto fail_return_bufs; - if (!imgu_all_nodes_streaming(imgu, node)) return 0; -- GitLab From bfcba38d95a0aed146a958a84a2177af1459eddc Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:20:00 +0100 Subject: [PATCH 091/503] media: ov5640: fix use of destroyed mutex v4l2_ctrl_handler_free() uses hdl->lock, which in ov5640 driver is set to sensor's own sensor->lock. In ov5640_remove(), the driver destroys the sensor->lock first, and then calls v4l2_ctrl_handler_free(), resulting in the use of the destroyed mutex. Fix this by calling moving the mutex_destroy() to the end of the cleanup sequence, as there's no need to destroy the mutex as early as possible. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Cc: stable@vger.kernel.org # v4.14+ Reviewed-by: Benoit Parrot Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/ov5640.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c index 854031f0b64a7..2fe4a7ac05929 100644 --- a/drivers/media/i2c/ov5640.c +++ b/drivers/media/i2c/ov5640.c @@ -3093,8 +3093,8 @@ static int ov5640_probe(struct i2c_client *client) free_ctrls: v4l2_ctrl_handler_free(&sensor->ctrls.handler); entity_cleanup: - mutex_destroy(&sensor->lock); media_entity_cleanup(&sensor->sd.entity); + mutex_destroy(&sensor->lock); return ret; } @@ -3104,9 +3104,9 @@ static int ov5640_remove(struct i2c_client *client) struct ov5640_dev *sensor = to_ov5640_dev(sd); v4l2_async_unregister_subdev(&sensor->sd); - mutex_destroy(&sensor->lock); media_entity_cleanup(&sensor->sd.entity); v4l2_ctrl_handler_free(&sensor->ctrls.handler); + mutex_destroy(&sensor->lock); return 0; } -- GitLab From ce7d96a4a77d3db1ae86415c0a74bf812dc81103 Mon Sep 17 00:00:00 2001 From: Bingbu Cao Date: Mon, 30 Mar 2020 11:05:14 +0200 Subject: [PATCH 092/503] media: doc-rst: add yavta test example in ipu3 docs This patch add yavta test command in ipu3.rst as an example on how to run simple ImgU test using yavta. Signed-off-by: Bingbu Cao Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/ipu3.rst | 13 +++++++++++++ drivers/staging/media/ipu3/TODO | 2 -- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/media/ipu3.rst b/Documentation/admin-guide/media/ipu3.rst index a694f49491f9a..35417567417e8 100644 --- a/Documentation/admin-guide/media/ipu3.rst +++ b/Documentation/admin-guide/media/ipu3.rst @@ -363,6 +363,19 @@ v4l2n --pipe=4 --load=/tmp/frame-#.bin --open=/dev/video4 --output=/tmp/frames.3A --fmt=type:META_CAPTURE,? --reqbufs=count:1,type:META_CAPTURE --pipe=1,2,3,4 --stream=5 +You can also use yavta [#f2]_ command to do same thing as above: + +.. code-block:: none + + yavta --data-prefix -Bcapture-mplane -c10 -n5 -I -s2592x1944 \ + --file=frame-#.out-f NV12 /dev/video5 & \ + yavta --data-prefix -Bcapture-mplane -c10 -n5 -I -s2592x1944 \ + --file=frame-#.vf -f NV12 /dev/video6 & \ + yavta --data-prefix -Bmeta-capture -c10 -n5 -I \ + --file=frame-#.3a /dev/video7 & \ + yavta --data-prefix -Boutput-mplane -c10 -n5 -I -s2592x1944 \ + --file=/tmp/frame-in.cio2 -f IPU3_SGRBG10 /dev/video4 + where /dev/video4, /dev/video5, /dev/video6 and /dev/video7 devices point to input, output, viewfinder and 3A statistics video nodes respectively. diff --git a/drivers/staging/media/ipu3/TODO b/drivers/staging/media/ipu3/TODO index 52063b6518104..4bcb665cb5f79 100644 --- a/drivers/staging/media/ipu3/TODO +++ b/drivers/staging/media/ipu3/TODO @@ -8,8 +8,6 @@ staging directory. - IPU3 driver documentation (Laurent) Comments on configuring v4l2 subdevs for CIO2 and ImgU. -- Switch to yavta from v4l2n in driver docs. - - Elaborate the functionality of different selection rectangles in driver documentation. This may require driver changes as well. -- GitLab From f744d9a4fee3a80f341eb04dad92256b513790ab Mon Sep 17 00:00:00 2001 From: Deepak R Varma Date: Tue, 31 Mar 2020 01:20:57 +0200 Subject: [PATCH 093/503] media: staging/intel-ipu3: Simplify single goto jump On successful node setup, the code jumps to a cleanup label to perform nodes cleanup. This only call to cleanup using goto label can be included in the for / if blocks to make it look more associated. Signed-off-by: Deepak R Varma Reviewed-by: Stefano Brivio Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3-v4l2.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-v4l2.c b/drivers/staging/media/ipu3/ipu3-v4l2.c index 9c121ab461aba..afbb4636e714d 100644 --- a/drivers/staging/media/ipu3/ipu3-v4l2.c +++ b/drivers/staging/media/ipu3/ipu3-v4l2.c @@ -1300,19 +1300,17 @@ static void imgu_v4l2_nodes_cleanup_pipe(struct imgu_device *imgu, static int imgu_v4l2_nodes_setup_pipe(struct imgu_device *imgu, int pipe) { - int i, r; + int i; for (i = 0; i < IMGU_NODE_NUM; i++) { - r = imgu_v4l2_node_setup(imgu, pipe, i); - if (r) - goto cleanup; - } + int r = imgu_v4l2_node_setup(imgu, pipe, i); + if (r) { + imgu_v4l2_nodes_cleanup_pipe(imgu, pipe, i); + return r; + } + } return 0; - -cleanup: - imgu_v4l2_nodes_cleanup_pipe(imgu, pipe, i); - return r; } static void imgu_v4l2_subdev_cleanup(struct imgu_device *imgu, unsigned int i) -- GitLab From 9611ba28d8508dcb92837a47a639b79598cbcc53 Mon Sep 17 00:00:00 2001 From: Bingbu Cao Date: Tue, 31 Mar 2020 15:00:40 +0200 Subject: [PATCH 094/503] media: ipu3.rst: add yuv-downscaling into pipeline diagram For ipu3 ImgU image processing, the frame data from TNR can feed into DDR by Output Formatting System or feed into YUV downscaler to do YUV downscaling for secondary output, which is usually used for display. current ImgU image pipeline diagram misses the YUV downscaling, this patch add it to aligh with actual hardware blocks. Signed-off-by: Bingbu Cao Suggested-by: Sakari Ailus Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/ipu3.rst | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Documentation/admin-guide/media/ipu3.rst b/Documentation/admin-guide/media/ipu3.rst index 35417567417e8..11e2ac4888f5d 100644 --- a/Documentation/admin-guide/media/ipu3.rst +++ b/Documentation/admin-guide/media/ipu3.rst @@ -442,16 +442,16 @@ set of parameters as input. The major stages of pipelines are shown here: o [label="Total Color Correction"] p [label="XNR3"] q [label="TNR"] - r [label="DDR"] + r [label="DDR", style=filled, fillcolor=yellow, shape=cylinder] + s [label="YUV Downscaling"] + t [label="DDR", style=filled, fillcolor=yellow, shape=cylinder] - { rank=same; a -> b -> c -> d -> e -> f } - { rank=same; g -> h -> i -> j -> k -> l } - { rank=same; m -> n -> o -> p -> q -> r } + { rank=same; a -> b -> c -> d -> e -> f -> g -> h -> i } + { rank=same; j -> k -> l -> m -> n -> o -> p -> q -> s -> t} - a -> g -> m [style=invis, weight=10] - - f -> g - l -> m + a -> j [style=invis, weight=10] + i -> j + q -> r } The table below presents a description of the above algorithms. -- GitLab From e1ebe9f9c88e5a78fcc4670a9063c9b3cd87dda4 Mon Sep 17 00:00:00 2001 From: Bingbu Cao Date: Tue, 24 Mar 2020 05:16:48 +0100 Subject: [PATCH 095/503] media: staging: imgu: do not hold spinlock during freeing mmu page table ImgU need set the mmu page table in memory as uncached, and set back to write-back when free the page table by set_memory_wb(), set_memory_wb() can not do flushing without interrupt, so the spinlock should not be hold during ImgU page alloc and free, the interrupt should be enabled during memory cache flush. This patch release spinlock before freeing pages table. Signed-off-by: Bingbu Cao Reviewed-by: Tomasz Figa Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3-mmu.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-mmu.c b/drivers/staging/media/ipu3/ipu3-mmu.c index 5f3ff964f3e76..cb9bf5fb29a58 100644 --- a/drivers/staging/media/ipu3/ipu3-mmu.c +++ b/drivers/staging/media/ipu3/ipu3-mmu.c @@ -174,8 +174,10 @@ static u32 *imgu_mmu_get_l2pt(struct imgu_mmu *mmu, u32 l1pt_idx) spin_lock_irqsave(&mmu->lock, flags); l2pt = mmu->l2pts[l1pt_idx]; - if (l2pt) - goto done; + if (l2pt) { + spin_unlock_irqrestore(&mmu->lock, flags); + return l2pt; + } spin_unlock_irqrestore(&mmu->lock, flags); @@ -190,8 +192,9 @@ static u32 *imgu_mmu_get_l2pt(struct imgu_mmu *mmu, u32 l1pt_idx) l2pt = mmu->l2pts[l1pt_idx]; if (l2pt) { + spin_unlock_irqrestore(&mmu->lock, flags); imgu_mmu_free_page_table(new_l2pt); - goto done; + return l2pt; } l2pt = new_l2pt; @@ -200,7 +203,6 @@ static u32 *imgu_mmu_get_l2pt(struct imgu_mmu *mmu, u32 l1pt_idx) pteval = IPU3_ADDR2PTE(virt_to_phys(new_l2pt)); mmu->l1pt[l1pt_idx] = pteval; -done: spin_unlock_irqrestore(&mmu->lock, flags); return l2pt; } -- GitLab From 63342afea65e9efa06889775c27001745e157770 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Thu, 30 Jan 2020 16:44:24 +0100 Subject: [PATCH 096/503] media: venus: vdec: Use pmruntime autosuspend Implement pmruntime autosuspend in video decoder. This will allow to save power while the userspace is inactive for some reasonable period of time. Here we power-off venus core clocks and power domain and don't touch vcodec because it is under hardware control. The later decision is made to simplify the code and avoid a mess in the power management code. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/core.c | 3 + drivers/media/platform/qcom/venus/core.h | 2 + drivers/media/platform/qcom/venus/vdec.c | 134 +++++++++++++++++++---- 3 files changed, 119 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 194b10b987672..12688f04d32c3 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -210,6 +210,8 @@ static int venus_probe(struct platform_device *pdev) if (!core->res) return -ENODEV; + mutex_init(&core->pm_lock); + core->pm_ops = venus_pm_get(core->res->hfi_version); if (!core->pm_ops) return -ENODEV; @@ -336,6 +338,7 @@ static int venus_remove(struct platform_device *pdev) icc_put(core->cpucfg_path); v4l2_device_unregister(&core->v4l2_dev); + mutex_destroy(&core->pm_lock); return ret; } diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index bd3ac6a4501fc..3ab644a397863 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -128,6 +128,7 @@ struct venus_caps { * @error: an error returned during last HFI sync operations * @sys_error: an error flag that signal system error event * @core_ops: the core operations + * @pm_lock: a lock for PM operations * @enc_codecs: encoders supported by this core * @dec_codecs: decoders supported by this core * @max_sessions_supported: holds the maximum number of sessions @@ -168,6 +169,7 @@ struct venus_core { bool sys_error; const struct hfi_core_ops *core_ops; const struct venus_pm_ops *pm_ops; + struct mutex pm_lock; unsigned long enc_codecs; unsigned long dec_codecs; unsigned int max_sessions_supported; diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 4ed2628585a11..e8e1ecf7cf4a4 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -545,6 +545,64 @@ static const struct v4l2_ioctl_ops vdec_ioctl_ops = { .vidioc_decoder_cmd = vdec_decoder_cmd, }; +static int vdec_pm_get(struct venus_inst *inst) +{ + struct venus_core *core = inst->core; + struct device *dev = core->dev_dec; + int ret; + + mutex_lock(&core->pm_lock); + ret = pm_runtime_get_sync(dev); + mutex_unlock(&core->pm_lock); + + return ret < 0 ? ret : 0; +} + +static int vdec_pm_put(struct venus_inst *inst, bool autosuspend) +{ + struct venus_core *core = inst->core; + struct device *dev = core->dev_dec; + int ret; + + mutex_lock(&core->pm_lock); + + if (autosuspend) + ret = pm_runtime_put_autosuspend(dev); + else + ret = pm_runtime_put_sync(dev); + + mutex_unlock(&core->pm_lock); + + return ret < 0 ? ret : 0; +} + +static int vdec_pm_get_put(struct venus_inst *inst) +{ + struct venus_core *core = inst->core; + struct device *dev = core->dev_dec; + int ret = 0; + + mutex_lock(&core->pm_lock); + + if (pm_runtime_suspended(dev)) { + ret = pm_runtime_get_sync(dev); + if (ret < 0) + goto error; + + ret = pm_runtime_put_autosuspend(dev); + } + +error: + mutex_unlock(&core->pm_lock); + + return ret < 0 ? ret : 0; +} + +static void vdec_pm_touch(struct venus_inst *inst) +{ + pm_runtime_mark_last_busy(inst->core->dev_dec); +} + static int vdec_set_properties(struct venus_inst *inst) { struct vdec_controls *ctr = &inst->controls.dec; @@ -746,11 +804,19 @@ static int vdec_queue_setup(struct vb2_queue *q, return 0; } - ret = vdec_session_init(inst); + ret = vdec_pm_get(inst); if (ret) return ret; + ret = vdec_session_init(inst); + if (ret) + goto put_power; + ret = vdec_num_buffers(inst, &in_num, &out_num); + if (ret) + goto put_power; + + ret = vdec_pm_put(inst, false); if (ret) return ret; @@ -786,6 +852,10 @@ static int vdec_queue_setup(struct vb2_queue *q, } return ret; + +put_power: + vdec_pm_put(inst, false); + return ret; } static int vdec_verify_conf(struct venus_inst *inst) @@ -947,14 +1017,23 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) mutex_lock(&inst->lock); - ret = venus_pm_acquire_core(inst); - if (ret) - goto error; - - if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) + if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { ret = vdec_start_capture(inst); - else + } else { + ret = vdec_pm_get(inst); + if (ret) + goto error; + + ret = venus_pm_acquire_core(inst); + if (ret) + goto put_power; + + ret = vdec_pm_put(inst, true); + if (ret) + goto error; + ret = vdec_start_output(inst); + } if (ret) goto error; @@ -962,6 +1041,8 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) mutex_unlock(&inst->lock); return 0; +put_power: + vdec_pm_put(inst, false); error: venus_helper_buffers_done(inst, VB2_BUF_STATE_QUEUED); mutex_unlock(&inst->lock); @@ -1055,8 +1136,9 @@ static void vdec_session_release(struct venus_inst *inst) struct venus_core *core = inst->core; int ret, abort = 0; - mutex_lock(&inst->lock); + vdec_pm_get(inst); + mutex_lock(&inst->lock); inst->codec_state = VENUS_DEC_STATE_DEINIT; ret = hfi_session_stop(inst); @@ -1078,10 +1160,11 @@ static void vdec_session_release(struct venus_inst *inst) venus_helper_free_dpb_bufs(inst); venus_pm_load_scale(inst); - venus_pm_release_core(inst); INIT_LIST_HEAD(&inst->registeredbufs); - mutex_unlock(&inst->lock); + + venus_pm_release_core(inst); + vdec_pm_put(inst, false); } static int vdec_buf_init(struct vb2_buffer *vb) @@ -1102,6 +1185,15 @@ static void vdec_buf_cleanup(struct vb2_buffer *vb) vdec_session_release(inst); } +static void vdec_vb2_buf_queue(struct vb2_buffer *vb) +{ + struct venus_inst *inst = vb2_get_drv_priv(vb->vb2_queue); + + vdec_pm_get_put(inst); + + venus_helper_vb2_buf_queue(vb); +} + static const struct vb2_ops vdec_vb2_ops = { .queue_setup = vdec_queue_setup, .buf_init = vdec_buf_init, @@ -1109,7 +1201,7 @@ static const struct vb2_ops vdec_vb2_ops = { .buf_prepare = venus_helper_vb2_buf_prepare, .start_streaming = vdec_start_streaming, .stop_streaming = vdec_stop_streaming, - .buf_queue = venus_helper_vb2_buf_queue, + .buf_queue = vdec_vb2_buf_queue, }; static void vdec_buf_done(struct venus_inst *inst, unsigned int buf_type, @@ -1121,6 +1213,8 @@ static void vdec_buf_done(struct venus_inst *inst, unsigned int buf_type, struct vb2_buffer *vb; unsigned int type; + vdec_pm_touch(inst); + if (buf_type == HFI_BUFFER_INPUT) type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; else @@ -1227,6 +1321,8 @@ static void vdec_event_notify(struct venus_inst *inst, u32 event, struct venus_core *core = inst->core; struct device *dev = core->dev_dec; + vdec_pm_touch(inst); + switch (event) { case EVT_SESSION_ERROR: inst->session_error = true; @@ -1347,13 +1443,9 @@ static int vdec_open(struct file *file) init_waitqueue_head(&inst->reconf_wait); venus_helper_init_instance(inst); - ret = pm_runtime_get_sync(core->dev_dec); - if (ret < 0) - goto err_free_inst; - ret = vdec_ctrl_init(inst); if (ret) - goto err_put_sync; + goto err_free; ret = hfi_session_create(inst, &vdec_hfi_ops); if (ret) @@ -1392,9 +1484,7 @@ static int vdec_open(struct file *file) hfi_session_destroy(inst); err_ctrl_deinit: vdec_ctrl_deinit(inst); -err_put_sync: - pm_runtime_put_sync(core->dev_dec); -err_free_inst: +err_free: kfree(inst); return ret; } @@ -1403,6 +1493,8 @@ static int vdec_close(struct file *file) { struct venus_inst *inst = to_inst(file); + vdec_pm_get(inst); + v4l2_m2m_ctx_release(inst->m2m_ctx); v4l2_m2m_release(inst->m2m_dev); vdec_ctrl_deinit(inst); @@ -1411,7 +1503,7 @@ static int vdec_close(struct file *file) v4l2_fh_del(&inst->fh); v4l2_fh_exit(&inst->fh); - pm_runtime_put_sync(inst->core->dev_dec); + vdec_pm_put(inst, false); kfree(inst); return 0; @@ -1468,6 +1560,8 @@ static int vdec_probe(struct platform_device *pdev) core->dev_dec = dev; video_set_drvdata(vdev, core); + pm_runtime_set_autosuspend_delay(dev, 2000); + pm_runtime_use_autosuspend(dev); pm_runtime_enable(dev); return 0; -- GitLab From 380f3bbd9562dc93be2e3cadc329b15284fbedae Mon Sep 17 00:00:00 2001 From: "Gustavo A. R. Silva" Date: Thu, 19 Mar 2020 23:21:05 +0100 Subject: [PATCH 097/503] media: venus: hfi_cmds.h: Replace zero-length array with flexible-array member The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/hfi_cmds.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/venus/hfi_cmds.h b/drivers/media/platform/qcom/venus/hfi_cmds.h index cae9d5d61c0c5..83705e237f1cf 100644 --- a/drivers/media/platform/qcom/venus/hfi_cmds.h +++ b/drivers/media/platform/qcom/venus/hfi_cmds.h @@ -107,7 +107,7 @@ struct hfi_session_abort_pkt { struct hfi_session_set_property_pkt { struct hfi_session_hdr_pkt shdr; u32 num_properties; - u32 data[0]; + u32 data[]; }; struct hfi_session_set_buffers_pkt { -- GitLab From 0f61e171e4bbac4595175070c75707f1b12f4e37 Mon Sep 17 00:00:00 2001 From: "Gustavo A. R. Silva" Date: Thu, 19 Mar 2020 23:22:29 +0100 Subject: [PATCH 098/503] media: venus: hfi_msgs.h: Replace zero-length array with flexible-array member The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/hfi_msgs.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/qcom/venus/hfi_msgs.h b/drivers/media/platform/qcom/venus/hfi_msgs.h index 7694b1d25d9d6..526d9f5b487bb 100644 --- a/drivers/media/platform/qcom/venus/hfi_msgs.h +++ b/drivers/media/platform/qcom/venus/hfi_msgs.h @@ -155,7 +155,7 @@ struct hfi_msg_session_empty_buffer_done_pkt { u32 input_tag; u32 packet_buffer; u32 extradata_buffer; - u32 data[0]; + u32 data[]; }; struct hfi_msg_session_fbd_compressed_pkt { @@ -175,7 +175,7 @@ struct hfi_msg_session_fbd_compressed_pkt { u32 picture_type; u32 packet_buffer; u32 extradata_buffer; - u32 data[0]; + u32 data[]; }; struct hfi_msg_session_fbd_uncompressed_plane0_pkt { @@ -202,7 +202,7 @@ struct hfi_msg_session_fbd_uncompressed_plane0_pkt { u32 picture_type; u32 packet_buffer; u32 extradata_buffer; - u32 data[0]; + u32 data[]; }; struct hfi_msg_session_fbd_uncompressed_plane1_pkt { @@ -211,7 +211,7 @@ struct hfi_msg_session_fbd_uncompressed_plane1_pkt { u32 filled_len; u32 offset; u32 packet_buffer2; - u32 data[0]; + u32 data[]; }; struct hfi_msg_session_fbd_uncompressed_plane2_pkt { @@ -220,7 +220,7 @@ struct hfi_msg_session_fbd_uncompressed_plane2_pkt { u32 filled_len; u32 offset; u32 packet_buffer3; - u32 data[0]; + u32 data[]; }; struct hfi_msg_session_parse_sequence_header_done_pkt { -- GitLab From 07f8f22a33a9e3e9955e24a84e2f856dcc8c31c4 Mon Sep 17 00:00:00 2001 From: Mansur Alisha Shaik Date: Fri, 10 Apr 2020 09:17:25 +0200 Subject: [PATCH 099/503] media: venus: core: remove CNOC voting while device suspend The Venus driver is voting Configuration NoC during .probe but not clear voting in .suspend. Because of this NoC is up during shutdown also. As a consequence the whole device could leak energy while in .suspend. So correct this by moving voting in .resume and unvoting in .suspend Signed-off-by: Mansur Alisha Shaik Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/core.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 12688f04d32c3..4395cb96fb043 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -244,10 +244,6 @@ static int venus_probe(struct platform_device *pdev) if (ret) return ret; - ret = icc_set_bw(core->cpucfg_path, 0, kbps_to_icc(1000)); - if (ret) - return ret; - ret = hfi_create(core, &venus_core_ops); if (ret) return ret; @@ -353,6 +349,10 @@ static __maybe_unused int venus_runtime_suspend(struct device *dev) if (ret) return ret; + ret = icc_set_bw(core->cpucfg_path, 0, 0); + if (ret) + return ret; + if (pm_ops->core_power) ret = pm_ops->core_power(dev, POWER_OFF); @@ -371,6 +371,10 @@ static __maybe_unused int venus_runtime_resume(struct device *dev) return ret; } + ret = icc_set_bw(core->cpucfg_path, 0, kbps_to_icc(1000)); + if (ret) + return ret; + return hfi_core_resume(core, false); } -- GitLab From d321dd233b9f2bb407b8e6b4759408f09ec207c3 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:09 +0100 Subject: [PATCH 100/503] media: imx: imx7-mipi-csis: Cleanup and fix subdev pad format handling The subdev set pad format operation currently misbehaves in multiple ways: - mipi_csis_try_format() unconditionally stores the format in the device state, even for V4L2_SUBDEV_FORMAT_TRY. - The format is never stored in the pad cfg, but the pad cfg format always overwrites the format requested by the user. - The sink format is not propagated to the source. Fix all this by reworking the set format operation as follows: 1. For the source pad, turn set() into get() as the source format is not modifiable. 2. Validate the requested format and updated the stored format accordingly. 3. Return the format actually set. 4. Propagate the format from sink to source. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 82 ++++++++++------------ 1 file changed, 37 insertions(+), 45 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index fbc1a924652aa..6318f0aebb4b8 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -669,28 +669,6 @@ static int mipi_csis_init_cfg(struct v4l2_subdev *mipi_sd, return 0; } -static struct csis_pix_format const * -mipi_csis_try_format(struct v4l2_subdev *mipi_sd, struct v4l2_mbus_framefmt *mf) -{ - struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); - struct csis_pix_format const *csis_fmt; - - csis_fmt = find_csis_format(mf->code); - if (!csis_fmt) - csis_fmt = &mipi_csis_formats[0]; - - v4l_bound_align_image(&mf->width, 1, CSIS_MAX_PIX_WIDTH, - csis_fmt->pix_width_alignment, - &mf->height, 1, CSIS_MAX_PIX_HEIGHT, 1, - 0); - - state->format_mbus.code = csis_fmt->code; - state->format_mbus.width = mf->width; - state->format_mbus.height = mf->height; - - return csis_fmt; -} - static struct v4l2_mbus_framefmt * mipi_csis_get_format(struct csi_state *state, struct v4l2_subdev_pad_config *cfg, @@ -703,53 +681,67 @@ mipi_csis_get_format(struct csi_state *state, return &state->format_mbus; } -static int mipi_csis_set_fmt(struct v4l2_subdev *mipi_sd, +static int mipi_csis_get_fmt(struct v4l2_subdev *mipi_sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *sdformat) { struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); - struct csis_pix_format const *csis_fmt; struct v4l2_mbus_framefmt *fmt; - if (sdformat->pad >= CSIS_PADS_NUM) - return -EINVAL; - - fmt = mipi_csis_get_format(state, cfg, sdformat->which, sdformat->pad); - mutex_lock(&state->lock); - if (sdformat->pad == CSIS_PAD_SOURCE) { - sdformat->format = *fmt; - goto unlock; - } - - csis_fmt = mipi_csis_try_format(mipi_sd, &sdformat->format); - + fmt = mipi_csis_get_format(state, cfg, sdformat->which, sdformat->pad); sdformat->format = *fmt; - - if (csis_fmt && sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE) - state->csis_fmt = csis_fmt; - else - cfg->try_fmt = sdformat->format; - -unlock: mutex_unlock(&state->lock); return 0; } -static int mipi_csis_get_fmt(struct v4l2_subdev *mipi_sd, +static int mipi_csis_set_fmt(struct v4l2_subdev *mipi_sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *sdformat) { struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + struct csis_pix_format const *csis_fmt; struct v4l2_mbus_framefmt *fmt; - mutex_lock(&state->lock); + /* + * The CSIS can't transcode in any way, the source format can't be + * modified. + */ + if (sdformat->pad == CSIS_PAD_SOURCE) + return mipi_csis_get_fmt(mipi_sd, cfg, sdformat); + + if (sdformat->pad != CSIS_PAD_SINK) + return -EINVAL; fmt = mipi_csis_get_format(state, cfg, sdformat->which, sdformat->pad); + mutex_lock(&state->lock); + + /* Validate the media bus code and clamp the size. */ + csis_fmt = find_csis_format(sdformat->format.code); + if (!csis_fmt) + csis_fmt = &mipi_csis_formats[0]; + + fmt->code = csis_fmt->code; + fmt->width = sdformat->format.width; + fmt->height = sdformat->format.height; + + v4l_bound_align_image(&fmt->width, 1, CSIS_MAX_PIX_WIDTH, + csis_fmt->pix_width_alignment, + &fmt->height, 1, CSIS_MAX_PIX_HEIGHT, 1, 0); + sdformat->format = *fmt; + /* Propagate the format from sink to source. */ + fmt = mipi_csis_get_format(state, cfg, sdformat->which, + CSIS_PAD_SOURCE); + *fmt = sdformat->format; + + /* Store the CSIS format descriptor for active formats. */ + if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE) + state->csis_fmt = csis_fmt; + mutex_unlock(&state->lock); return 0; -- GitLab From 45cde0aab78096d17e3ea2040854b3e95e3e197e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:10 +0100 Subject: [PATCH 101/503] media: imx: imx7-mipi-csis: Centralize initialization of pad formats Pad formats for the active configuration are manually initialized in mipi_csis_subdev_init(), while pad formats for the TRY configurations are initialized by the subdev .init_cfg() operation. This creates a risk of the two configurations not being synchronized. Fix it by initializing formats in the .init_cfg() operation only, and calling it from mipi_csis_subdev_init(). Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 56 ++++++++++++---------- 1 file changed, 32 insertions(+), 24 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 6318f0aebb4b8..ff2e00723152f 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -649,26 +649,6 @@ static int mipi_csis_link_setup(struct media_entity *entity, return ret; } -static int mipi_csis_init_cfg(struct v4l2_subdev *mipi_sd, - struct v4l2_subdev_pad_config *cfg) -{ - struct v4l2_mbus_framefmt *mf; - unsigned int i; - int ret; - - for (i = 0; i < CSIS_PADS_NUM; i++) { - mf = v4l2_subdev_get_try_format(mipi_sd, cfg, i); - - ret = imx_media_init_mbus_fmt(mf, MIPI_CSIS_DEF_PIX_HEIGHT, - MIPI_CSIS_DEF_PIX_WIDTH, 0, - V4L2_FIELD_NONE, NULL); - if (ret < 0) - return ret; - } - - return 0; -} - static struct v4l2_mbus_framefmt * mipi_csis_get_format(struct csi_state *state, struct v4l2_subdev_pad_config *cfg, @@ -681,6 +661,37 @@ mipi_csis_get_format(struct csi_state *state, return &state->format_mbus; } +static int mipi_csis_init_cfg(struct v4l2_subdev *mipi_sd, + struct v4l2_subdev_pad_config *cfg) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + struct v4l2_mbus_framefmt *fmt_sink; + struct v4l2_mbus_framefmt *fmt_source; + enum v4l2_subdev_format_whence which; + int ret; + + which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; + fmt_sink = mipi_csis_get_format(state, cfg, which, CSIS_PAD_SINK); + ret = imx_media_init_mbus_fmt(fmt_sink, MIPI_CSIS_DEF_PIX_WIDTH, + MIPI_CSIS_DEF_PIX_HEIGHT, 0, + V4L2_FIELD_NONE, NULL); + if (ret < 0) + return ret; + + /* + * When called from mipi_csis_subdev_init() to initialize the active + * configuration, cfg is NULL, which indicates there's no source pad + * configuration to set. + */ + if (!cfg) + return 0; + + fmt_source = mipi_csis_get_format(state, cfg, which, CSIS_PAD_SOURCE); + *fmt_source = *fmt_sink; + + return 0; +} + static int mipi_csis_get_fmt(struct v4l2_subdev *mipi_sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *sdformat) @@ -875,10 +886,7 @@ static int mipi_csis_subdev_init(struct v4l2_subdev *mipi_sd, mipi_sd->dev = &pdev->dev; state->csis_fmt = &mipi_csis_formats[0]; - state->format_mbus.code = mipi_csis_formats[0].code; - state->format_mbus.width = MIPI_CSIS_DEF_PIX_WIDTH; - state->format_mbus.height = MIPI_CSIS_DEF_PIX_HEIGHT; - state->format_mbus.field = V4L2_FIELD_NONE; + mipi_csis_init_cfg(mipi_sd, NULL); v4l2_set_subdevdata(mipi_sd, &pdev->dev); -- GitLab From d9a7dd2f684c7f4c1a4940d42e25568bc9af32fa Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:11 +0100 Subject: [PATCH 102/503] media: imx: imx7-mipi-csis: Add missing RAW formats Add support for all the missing 8-, 10-, 12- and 14-bit RAW formats. This include all Bayer combinations, as well as greyscale. No media bus code exist for Y14 so this is currently left out. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 78 +++++++++++++++++++--- 1 file changed, 69 insertions(+), 9 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index ff2e00723152f..d1a67aff10f0b 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -143,6 +143,7 @@ #define MIPI_CSIS_ISPCFG_FMT_RAW8 (0x2a << 2) #define MIPI_CSIS_ISPCFG_FMT_RAW10 (0x2b << 2) #define MIPI_CSIS_ISPCFG_FMT_RAW12 (0x2c << 2) +#define MIPI_CSIS_ISPCFG_FMT_RAW14 (0x2d << 2) /* User defined formats, x = 1...4 */ #define MIPI_CSIS_ISPCFG_FMT_USER(x) ((0x30 + (x) - 1) << 2) @@ -264,34 +265,93 @@ struct csis_pix_format { }; static const struct csis_pix_format mipi_csis_formats[] = { + /* YUV formats. */ { - .code = MEDIA_BUS_FMT_SBGGR10_1X10, - .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, - .data_alignment = 16, - }, { .code = MEDIA_BUS_FMT_VYUY8_2X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, .data_alignment = 16, }, { + .code = MEDIA_BUS_FMT_YUYV8_2X8, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, + .data_alignment = 16, + }, + /* RAW (Bayer and greyscale) formats. */ + { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, .data_alignment = 8, }, { - .code = MEDIA_BUS_FMT_YUYV8_2X8, - .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, - .data_alignment = 16, + .code = MEDIA_BUS_FMT_SGBRG8_1X8, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, + .data_alignment = 8, + }, { + .code = MEDIA_BUS_FMT_SGRBG8_1X8, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, + .data_alignment = 8, + }, { + .code = MEDIA_BUS_FMT_SRGGB8_1X8, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, + .data_alignment = 8, }, { .code = MEDIA_BUS_FMT_Y8_1X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, .data_alignment = 8, + }, { + .code = MEDIA_BUS_FMT_SBGGR10_1X10, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, + .data_alignment = 10, + }, { + .code = MEDIA_BUS_FMT_SGBRG10_1X10, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, + .data_alignment = 10, + }, { + .code = MEDIA_BUS_FMT_SGRBG10_1X10, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, + .data_alignment = 10, + }, { + .code = MEDIA_BUS_FMT_SRGGB10_1X10, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, + .data_alignment = 10, }, { .code = MEDIA_BUS_FMT_Y10_1X10, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, - .data_alignment = 16, + .data_alignment = 10, + }, { + .code = MEDIA_BUS_FMT_SBGGR12_1X12, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, + .data_alignment = 12, + }, { + .code = MEDIA_BUS_FMT_SGBRG12_1X12, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, + .data_alignment = 12, + }, { + .code = MEDIA_BUS_FMT_SGRBG12_1X12, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, + .data_alignment = 12, + }, { + .code = MEDIA_BUS_FMT_SRGGB12_1X12, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, + .data_alignment = 12, }, { .code = MEDIA_BUS_FMT_Y12_1X12, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, - .data_alignment = 16, + .data_alignment = 12, + }, { + .code = MEDIA_BUS_FMT_SBGGR14_1X14, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, + .data_alignment = 14, + }, { + .code = MEDIA_BUS_FMT_SGBRG14_1X14, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, + .data_alignment = 14, + }, { + .code = MEDIA_BUS_FMT_SGRBG14_1X14, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, + .data_alignment = 14, + }, { + .code = MEDIA_BUS_FMT_SRGGB14_1X14, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, + .data_alignment = 14, } }; -- GitLab From 0aa09e57b0f6bd46a7e8e4d88ba0045e317d43f9 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:12 +0100 Subject: [PATCH 103/503] media: imx: imx7-mipi-csis: Expose correct YUV formats The imx7-mipi-csis driver claims to support MEDIA_BUS_FMT_VYUY8_2X8 and MEDIA_BUS_FMT_YUYV8_2X8, but this is not correct. When receiving YUV 4:2:2 data on the CSI-2 bus, the output format is MEDIA_BUS_FMT_UYVY8_2X8. Fix this. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index d1a67aff10f0b..2afa046505036 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -267,11 +267,7 @@ struct csis_pix_format { static const struct csis_pix_format mipi_csis_formats[] = { /* YUV formats. */ { - .code = MEDIA_BUS_FMT_VYUY8_2X8, - .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, - .data_alignment = 16, - }, { - .code = MEDIA_BUS_FMT_YUYV8_2X8, + .code = MEDIA_BUS_FMT_UYVY8_2X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, .data_alignment = 16, }, -- GitLab From cb373070bf7575e4cb0a15976702bcb415b2b6d4 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:13 +0100 Subject: [PATCH 104/503] media: imx: imx7-mipi-csis: Fix MEDIA_BUS_FMT_UYVY8_2X8 data alignment The MEDIA_BUS_FMT_UYVY8_2X8 format reports a data alignment of 16 bits, which isn't correct as it is output on an 8-bit bus. Fix it. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 2afa046505036..de3e4d02e0944 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -269,7 +269,7 @@ static const struct csis_pix_format mipi_csis_formats[] = { { .code = MEDIA_BUS_FMT_UYVY8_2X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, - .data_alignment = 16, + .data_alignment = 8, }, /* RAW (Bayer and greyscale) formats. */ { -- GitLab From 083285ac9df3375608b1aae4685d0339a88c48c5 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:14 +0100 Subject: [PATCH 105/503] media: imx: imx7-mipi-csis: Add MEDIA_BUS_FMT_UYVY10_2X10 support Add support for 10-bit YUV 4:2:2. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index de3e4d02e0944..ebadb2043a777 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -270,6 +270,10 @@ static const struct csis_pix_format mipi_csis_formats[] = { .code = MEDIA_BUS_FMT_UYVY8_2X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, .data_alignment = 8, + }, { + .code = MEDIA_BUS_FMT_UYVY10_2X10, + .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, + .data_alignment = 10, }, /* RAW (Bayer and greyscale) formats. */ { -- GitLab From a0ec36a364a73d3af1c7387250a5135d54600d5c Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:15 +0100 Subject: [PATCH 106/503] media: imx: imx7-mipi-csis: Rename data_alignment field to width The csis_pix_format data_alignment field stores the bus width. Rename it accordingly. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 46 +++++++++++----------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index ebadb2043a777..84d2eddcf952e 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -261,7 +261,7 @@ struct csis_pix_format { unsigned int pix_width_alignment; u32 code; u32 fmt_reg; - u8 data_alignment; + u8 width; }; static const struct csis_pix_format mipi_csis_formats[] = { @@ -269,89 +269,89 @@ static const struct csis_pix_format mipi_csis_formats[] = { { .code = MEDIA_BUS_FMT_UYVY8_2X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, - .data_alignment = 8, + .width = 8, }, { .code = MEDIA_BUS_FMT_UYVY10_2X10, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_YCBCR422_8BIT, - .data_alignment = 10, + .width = 10, }, /* RAW (Bayer and greyscale) formats. */ { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, - .data_alignment = 8, + .width = 8, }, { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, - .data_alignment = 8, + .width = 8, }, { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, - .data_alignment = 8, + .width = 8, }, { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, - .data_alignment = 8, + .width = 8, }, { .code = MEDIA_BUS_FMT_Y8_1X8, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW8, - .data_alignment = 8, + .width = 8, }, { .code = MEDIA_BUS_FMT_SBGGR10_1X10, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, - .data_alignment = 10, + .width = 10, }, { .code = MEDIA_BUS_FMT_SGBRG10_1X10, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, - .data_alignment = 10, + .width = 10, }, { .code = MEDIA_BUS_FMT_SGRBG10_1X10, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, - .data_alignment = 10, + .width = 10, }, { .code = MEDIA_BUS_FMT_SRGGB10_1X10, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, - .data_alignment = 10, + .width = 10, }, { .code = MEDIA_BUS_FMT_Y10_1X10, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW10, - .data_alignment = 10, + .width = 10, }, { .code = MEDIA_BUS_FMT_SBGGR12_1X12, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, - .data_alignment = 12, + .width = 12, }, { .code = MEDIA_BUS_FMT_SGBRG12_1X12, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, - .data_alignment = 12, + .width = 12, }, { .code = MEDIA_BUS_FMT_SGRBG12_1X12, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, - .data_alignment = 12, + .width = 12, }, { .code = MEDIA_BUS_FMT_SRGGB12_1X12, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, - .data_alignment = 12, + .width = 12, }, { .code = MEDIA_BUS_FMT_Y12_1X12, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW12, - .data_alignment = 12, + .width = 12, }, { .code = MEDIA_BUS_FMT_SBGGR14_1X14, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, - .data_alignment = 14, + .width = 14, }, { .code = MEDIA_BUS_FMT_SGBRG14_1X14, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, - .data_alignment = 14, + .width = 14, }, { .code = MEDIA_BUS_FMT_SGRBG14_1X14, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, - .data_alignment = 14, + .width = 14, }, { .code = MEDIA_BUS_FMT_SRGGB14_1X14, .fmt_reg = MIPI_CSIS_ISPCFG_FMT_RAW14, - .data_alignment = 14, + .width = 14, } }; @@ -498,7 +498,7 @@ static void mipi_csis_set_params(struct csi_state *state) mipi_csis_set_hsync_settle(state, state->hs_settle); val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH0); - if (state->csis_fmt->data_alignment == 32) + if (state->csis_fmt->width == 32) val |= MIPI_CSIS_ISPCFG_ALIGN_32BIT; else val &= ~MIPI_CSIS_ISPCFG_ALIGN_32BIT; -- GitLab From b06bde9ac6836902f1fb50f69493d02d4191d5aa Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:16 +0100 Subject: [PATCH 107/503] media: imx: imx7-mipi-csis: Align image width based on format The total number of bits per line needs to be a multiple of 8, which requires aligning the image width based on the format width. The csis_pix_format structure contains a pix_width_alignment field that serves this purpose, but the field is never set. Instead of fixing that, calculate the alignment constraints based on the bus width for the format, and drop the unneeded pix_width_alignment field. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 29 +++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 84d2eddcf952e..44873a0ceb788 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -258,7 +258,6 @@ struct csi_state { }; struct csis_pix_format { - unsigned int pix_width_alignment; u32 code; u32 fmt_reg; u8 width; @@ -774,6 +773,7 @@ static int mipi_csis_set_fmt(struct v4l2_subdev *mipi_sd, struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); struct csis_pix_format const *csis_fmt; struct v4l2_mbus_framefmt *fmt; + unsigned int align; /* * The CSIS can't transcode in any way, the source format can't be @@ -798,8 +798,31 @@ static int mipi_csis_set_fmt(struct v4l2_subdev *mipi_sd, fmt->width = sdformat->format.width; fmt->height = sdformat->format.height; - v4l_bound_align_image(&fmt->width, 1, CSIS_MAX_PIX_WIDTH, - csis_fmt->pix_width_alignment, + /* + * The total number of bits per line must be a multiple of 8. We thus + * need to align the width for formats that are not multiples of 8 + * bits. + */ + switch (csis_fmt->width % 8) { + case 0: + align = 1; + break; + case 4: + align = 2; + break; + case 2: + case 6: + align = 4; + break; + case 1: + case 3: + case 5: + case 7: + align = 8; + break; + } + + v4l_bound_align_image(&fmt->width, 1, CSIS_MAX_PIX_WIDTH, align, &fmt->height, 1, CSIS_MAX_PIX_HEIGHT, 1, 0); sdformat->format = *fmt; -- GitLab From eeea9ac2d2a966655868d04ae95c72a353cddc0b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:17 +0100 Subject: [PATCH 108/503] media: imx: imx7-mipi-csis: Never set MIPI_CSIS_ISPCFG_ALIGN_32BIT The MIPI_CSIS_ISPCFG_ALIGN_32BIT bit enables output of 32-bit data. The driver sets it based on the select format, but no format uses a 32-bit bus width, so the bit is never set in practice. This isn't likely to change any time soon, as the CSI IP core connected at the output of the CSIS doesn't support 32-bit data width. Hardcode the bit to 0. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 44873a0ceb788..6d0662c042c08 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -464,7 +464,8 @@ static void __mipi_csis_set_format(struct csi_state *state) /* Color format */ val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH0); - val = (val & ~MIPI_CSIS_ISPCFG_FMT_MASK) | state->csis_fmt->fmt_reg; + val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK); + val |= state->csis_fmt->fmt_reg; mipi_csis_write(state, MIPI_CSIS_ISPCONFIG_CH0, val); /* Pixel resolution */ @@ -496,13 +497,6 @@ static void mipi_csis_set_params(struct csi_state *state) mipi_csis_set_hsync_settle(state, state->hs_settle); - val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH0); - if (state->csis_fmt->width == 32) - val |= MIPI_CSIS_ISPCFG_ALIGN_32BIT; - else - val &= ~MIPI_CSIS_ISPCFG_ALIGN_32BIT; - mipi_csis_write(state, MIPI_CSIS_ISPCONFIG_CH0, val); - val = (0 << MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET) | (0 << MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET) | (0 << MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET); -- GitLab From 2c2ae48d3b83ff7a78eb33eb6ee158371e003a85 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:18 +0100 Subject: [PATCH 109/503] media: imx: imx7-mipi-csis: Align macro definitions The register macros at the top of the file have their value not aligned on the same column, hindering readability. Fix it. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 130 ++++++++++----------- 1 file changed, 65 insertions(+), 65 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 6d0662c042c08..32fd8465837f6 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -31,15 +31,15 @@ #include "imx-media.h" -#define CSIS_DRIVER_NAME "imx7-mipi-csis" -#define CSIS_SUBDEV_NAME CSIS_DRIVER_NAME +#define CSIS_DRIVER_NAME "imx7-mipi-csis" +#define CSIS_SUBDEV_NAME CSIS_DRIVER_NAME -#define CSIS_PAD_SINK 0 -#define CSIS_PAD_SOURCE 1 -#define CSIS_PADS_NUM 2 +#define CSIS_PAD_SINK 0 +#define CSIS_PAD_SOURCE 1 +#define CSIS_PADS_NUM 2 -#define MIPI_CSIS_DEF_PIX_WIDTH 640 -#define MIPI_CSIS_DEF_PIX_HEIGHT 480 +#define MIPI_CSIS_DEF_PIX_WIDTH 640 +#define MIPI_CSIS_DEF_PIX_HEIGHT 480 /* Register map definition */ @@ -64,42 +64,42 @@ #define MIPI_CSIS_CLK_CTRL_WCLK_SRC BIT(0) /* CSIS Interrupt mask */ -#define MIPI_CSIS_INTMSK 0x10 -#define MIPI_CSIS_INTMSK_EVEN_BEFORE BIT(31) -#define MIPI_CSIS_INTMSK_EVEN_AFTER BIT(30) -#define MIPI_CSIS_INTMSK_ODD_BEFORE BIT(29) -#define MIPI_CSIS_INTMSK_ODD_AFTER BIT(28) -#define MIPI_CSIS_INTMSK_FRAME_START BIT(24) -#define MIPI_CSIS_INTMSK_FRAME_END BIT(20) -#define MIPI_CSIS_INTMSK_ERR_SOT_HS BIT(16) -#define MIPI_CSIS_INTMSK_ERR_LOST_FS BIT(12) -#define MIPI_CSIS_INTMSK_ERR_LOST_FE BIT(8) -#define MIPI_CSIS_INTMSK_ERR_OVER BIT(4) -#define MIPI_CSIS_INTMSK_ERR_WRONG_CFG BIT(3) -#define MIPI_CSIS_INTMSK_ERR_ECC BIT(2) -#define MIPI_CSIS_INTMSK_ERR_CRC BIT(1) -#define MIPI_CSIS_INTMSK_ERR_UNKNOWN BIT(0) +#define MIPI_CSIS_INTMSK 0x10 +#define MIPI_CSIS_INTMSK_EVEN_BEFORE BIT(31) +#define MIPI_CSIS_INTMSK_EVEN_AFTER BIT(30) +#define MIPI_CSIS_INTMSK_ODD_BEFORE BIT(29) +#define MIPI_CSIS_INTMSK_ODD_AFTER BIT(28) +#define MIPI_CSIS_INTMSK_FRAME_START BIT(24) +#define MIPI_CSIS_INTMSK_FRAME_END BIT(20) +#define MIPI_CSIS_INTMSK_ERR_SOT_HS BIT(16) +#define MIPI_CSIS_INTMSK_ERR_LOST_FS BIT(12) +#define MIPI_CSIS_INTMSK_ERR_LOST_FE BIT(8) +#define MIPI_CSIS_INTMSK_ERR_OVER BIT(4) +#define MIPI_CSIS_INTMSK_ERR_WRONG_CFG BIT(3) +#define MIPI_CSIS_INTMSK_ERR_ECC BIT(2) +#define MIPI_CSIS_INTMSK_ERR_CRC BIT(1) +#define MIPI_CSIS_INTMSK_ERR_UNKNOWN BIT(0) /* CSIS Interrupt source */ -#define MIPI_CSIS_INTSRC 0x14 -#define MIPI_CSIS_INTSRC_EVEN_BEFORE BIT(31) -#define MIPI_CSIS_INTSRC_EVEN_AFTER BIT(30) -#define MIPI_CSIS_INTSRC_EVEN BIT(30) -#define MIPI_CSIS_INTSRC_ODD_BEFORE BIT(29) -#define MIPI_CSIS_INTSRC_ODD_AFTER BIT(28) -#define MIPI_CSIS_INTSRC_ODD (0x3 << 28) -#define MIPI_CSIS_INTSRC_NON_IMAGE_DATA (0xf << 28) -#define MIPI_CSIS_INTSRC_FRAME_START BIT(24) -#define MIPI_CSIS_INTSRC_FRAME_END BIT(20) -#define MIPI_CSIS_INTSRC_ERR_SOT_HS BIT(16) -#define MIPI_CSIS_INTSRC_ERR_LOST_FS BIT(12) -#define MIPI_CSIS_INTSRC_ERR_LOST_FE BIT(8) -#define MIPI_CSIS_INTSRC_ERR_OVER BIT(4) -#define MIPI_CSIS_INTSRC_ERR_WRONG_CFG BIT(3) -#define MIPI_CSIS_INTSRC_ERR_ECC BIT(2) -#define MIPI_CSIS_INTSRC_ERR_CRC BIT(1) -#define MIPI_CSIS_INTSRC_ERR_UNKNOWN BIT(0) -#define MIPI_CSIS_INTSRC_ERRORS 0xfffff +#define MIPI_CSIS_INTSRC 0x14 +#define MIPI_CSIS_INTSRC_EVEN_BEFORE BIT(31) +#define MIPI_CSIS_INTSRC_EVEN_AFTER BIT(30) +#define MIPI_CSIS_INTSRC_EVEN BIT(30) +#define MIPI_CSIS_INTSRC_ODD_BEFORE BIT(29) +#define MIPI_CSIS_INTSRC_ODD_AFTER BIT(28) +#define MIPI_CSIS_INTSRC_ODD (0x3 << 28) +#define MIPI_CSIS_INTSRC_NON_IMAGE_DATA (0xf << 28) +#define MIPI_CSIS_INTSRC_FRAME_START BIT(24) +#define MIPI_CSIS_INTSRC_FRAME_END BIT(20) +#define MIPI_CSIS_INTSRC_ERR_SOT_HS BIT(16) +#define MIPI_CSIS_INTSRC_ERR_LOST_FS BIT(12) +#define MIPI_CSIS_INTSRC_ERR_LOST_FE BIT(8) +#define MIPI_CSIS_INTSRC_ERR_OVER BIT(4) +#define MIPI_CSIS_INTSRC_ERR_WRONG_CFG BIT(3) +#define MIPI_CSIS_INTSRC_ERR_ECC BIT(2) +#define MIPI_CSIS_INTSRC_ERR_CRC BIT(1) +#define MIPI_CSIS_INTSRC_ERR_UNKNOWN BIT(0) +#define MIPI_CSIS_INTSRC_ERRORS 0xfffff /* D-PHY status control */ #define MIPI_CSIS_DPHYSTATUS 0x20 @@ -121,19 +121,19 @@ #define MIPI_CSIS_DPHYCTRL_ENABLE (0x1f << 0) /* D-PHY Master and Slave Control register Low */ -#define MIPI_CSIS_DPHYBCTRL_L 0x30 +#define MIPI_CSIS_DPHYBCTRL_L 0x30 /* D-PHY Master and Slave Control register High */ -#define MIPI_CSIS_DPHYBCTRL_H 0x34 +#define MIPI_CSIS_DPHYBCTRL_H 0x34 /* D-PHY Slave Control register Low */ -#define MIPI_CSIS_DPHYSCTRL_L 0x38 +#define MIPI_CSIS_DPHYSCTRL_L 0x38 /* D-PHY Slave Control register High */ -#define MIPI_CSIS_DPHYSCTRL_H 0x3c +#define MIPI_CSIS_DPHYSCTRL_H 0x3c /* ISP Configuration register */ -#define MIPI_CSIS_ISPCONFIG_CH0 0x40 -#define MIPI_CSIS_ISPCONFIG_CH1 0x50 -#define MIPI_CSIS_ISPCONFIG_CH2 0x60 -#define MIPI_CSIS_ISPCONFIG_CH3 0x70 +#define MIPI_CSIS_ISPCONFIG_CH0 0x40 +#define MIPI_CSIS_ISPCONFIG_CH1 0x50 +#define MIPI_CSIS_ISPCONFIG_CH2 0x60 +#define MIPI_CSIS_ISPCONFIG_CH3 0x70 #define MIPI_CSIS_ISPCFG_MEM_FULL_GAP_MSK (0xff << 24) #define MIPI_CSIS_ISPCFG_MEM_FULL_GAP(x) ((x) << 24) @@ -146,33 +146,33 @@ #define MIPI_CSIS_ISPCFG_FMT_RAW14 (0x2d << 2) /* User defined formats, x = 1...4 */ -#define MIPI_CSIS_ISPCFG_FMT_USER(x) ((0x30 + (x) - 1) << 2) -#define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2) +#define MIPI_CSIS_ISPCFG_FMT_USER(x) ((0x30 + (x) - 1) << 2) +#define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2) /* ISP Image Resolution register */ -#define MIPI_CSIS_ISPRESOL_CH0 0x44 -#define MIPI_CSIS_ISPRESOL_CH1 0x54 -#define MIPI_CSIS_ISPRESOL_CH2 0x64 -#define MIPI_CSIS_ISPRESOL_CH3 0x74 -#define CSIS_MAX_PIX_WIDTH 0xffff -#define CSIS_MAX_PIX_HEIGHT 0xffff +#define MIPI_CSIS_ISPRESOL_CH0 0x44 +#define MIPI_CSIS_ISPRESOL_CH1 0x54 +#define MIPI_CSIS_ISPRESOL_CH2 0x64 +#define MIPI_CSIS_ISPRESOL_CH3 0x74 +#define CSIS_MAX_PIX_WIDTH 0xffff +#define CSIS_MAX_PIX_HEIGHT 0xffff /* ISP SYNC register */ -#define MIPI_CSIS_ISPSYNC_CH0 0x48 -#define MIPI_CSIS_ISPSYNC_CH1 0x58 -#define MIPI_CSIS_ISPSYNC_CH2 0x68 -#define MIPI_CSIS_ISPSYNC_CH3 0x78 +#define MIPI_CSIS_ISPSYNC_CH0 0x48 +#define MIPI_CSIS_ISPSYNC_CH1 0x58 +#define MIPI_CSIS_ISPSYNC_CH2 0x68 +#define MIPI_CSIS_ISPSYNC_CH3 0x78 #define MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET 18 #define MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET 12 #define MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET 0 /* Non-image packet data buffers */ -#define MIPI_CSIS_PKTDATA_ODD 0x2000 -#define MIPI_CSIS_PKTDATA_EVEN 0x3000 -#define MIPI_CSIS_PKTDATA_SIZE SZ_4K +#define MIPI_CSIS_PKTDATA_ODD 0x2000 +#define MIPI_CSIS_PKTDATA_EVEN 0x3000 +#define MIPI_CSIS_PKTDATA_SIZE SZ_4K -#define DEFAULT_SCLK_CSIS_FREQ 166000000UL +#define DEFAULT_SCLK_CSIS_FREQ 166000000UL enum { ST_POWERED = 1, -- GitLab From 1d812ad253d4667ee09b902950578184b797879b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:19 +0100 Subject: [PATCH 110/503] media: imx: imx7-mipi-csis: Remove link setup on source pad The driver rejects enablement of multiple links on its source pad. This isn't needed, as the CSIS doesn't care. Drop it. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 32fd8465837f6..377a3f0186160 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -254,7 +254,6 @@ struct csi_state { struct csis_hw_reset hw_reset; struct regulator *mipi_phy_regulator; - bool sink_linked; }; struct csis_pix_format { @@ -675,17 +674,7 @@ static int mipi_csis_link_setup(struct media_entity *entity, mutex_lock(&state->lock); - if (local_pad->flags & MEDIA_PAD_FL_SOURCE) { - if (flags & MEDIA_LNK_FL_ENABLED) { - if (state->sink_linked) { - ret = -EBUSY; - goto out; - } - state->sink_linked = true; - } else { - state->sink_linked = false; - } - } else { + if (local_pad->flags & MEDIA_PAD_FL_SINK) { if (flags & MEDIA_LNK_FL_ENABLED) { if (state->src_sd) { ret = -EBUSY; -- GitLab From 9994e00d4131986624b24f9aac881c3392cc2714 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:20 +0100 Subject: [PATCH 111/503] media: imx: imx7-mipi-csis: Cleanup includes Remove unneeded includes, add needed ones, and sort them alphabetically. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 377a3f0186160..6929c3f1952d6 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -14,15 +14,14 @@ #include #include #include -#include #include -#include #include -#include +#include +#include #include #include -#include #include +#include #include #include -- GitLab From f89ab84a949f9b7072c4f9d86231d0161fc8fe24 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:21 +0100 Subject: [PATCH 112/503] media: imx: imx7-mipi-csis: Don't use imx-media-utils helpers The imx7-mipi-csis only uses the imx_media_init_mbus_fmt() function from the imx-media-utils helpers. The helpers don't support all the media bus formats used by this driver, and are thus a bad fit. As the MIPI CSIS is a standalone IP core that could be integrated in other SoCs, let's not use the helper. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 6929c3f1952d6..1ccbea2567ee8 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -28,8 +28,6 @@ #include #include -#include "imx-media.h" - #define CSIS_DRIVER_NAME "imx7-mipi-csis" #define CSIS_SUBDEV_NAME CSIS_DRIVER_NAME @@ -709,15 +707,21 @@ static int mipi_csis_init_cfg(struct v4l2_subdev *mipi_sd, struct v4l2_mbus_framefmt *fmt_sink; struct v4l2_mbus_framefmt *fmt_source; enum v4l2_subdev_format_whence which; - int ret; which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; fmt_sink = mipi_csis_get_format(state, cfg, which, CSIS_PAD_SINK); - ret = imx_media_init_mbus_fmt(fmt_sink, MIPI_CSIS_DEF_PIX_WIDTH, - MIPI_CSIS_DEF_PIX_HEIGHT, 0, - V4L2_FIELD_NONE, NULL); - if (ret < 0) - return ret; + + fmt_sink->code = MEDIA_BUS_FMT_UYVY8_2X8; + fmt_sink->width = MIPI_CSIS_DEF_PIX_WIDTH; + fmt_sink->height = MIPI_CSIS_DEF_PIX_HEIGHT; + fmt_sink->field = V4L2_FIELD_NONE; + + fmt_sink->colorspace = V4L2_COLORSPACE_SMPTE170M; + fmt_sink->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt_sink->colorspace); + fmt_sink->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt_sink->colorspace); + fmt_sink->quantization = + V4L2_MAP_QUANTIZATION_DEFAULT(false, fmt_sink->colorspace, + fmt_sink->ycbcr_enc); /* * When called from mipi_csis_subdev_init() to initialize the active -- GitLab From 4b7126a7894849aaf239dad71b9286534d8c1719 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 13 Mar 2020 00:47:22 +0100 Subject: [PATCH 113/503] media: imx: imx7-mipi-csis: Implement the .enum_mbus_code() operation Implement the subdev pad .enum_mbus_code() operation to enumerate media bus codes on the sink and source pads. Signed-off-by: Laurent Pinchart Acked-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 1ccbea2567ee8..e2403b448b6d3 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -752,6 +752,38 @@ static int mipi_csis_get_fmt(struct v4l2_subdev *mipi_sd, return 0; } +static int mipi_csis_enum_mbus_code(struct v4l2_subdev *mipi_sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); + + /* + * The CSIS can't transcode in any way, the source format is identical + * to the sink format. + */ + if (code->pad == CSIS_PAD_SOURCE) { + struct v4l2_mbus_framefmt *fmt; + + if (code->index > 0) + return -EINVAL; + + fmt = mipi_csis_get_format(state, cfg, code->which, code->pad); + code->code = fmt->code; + return 0; + } + + if (code->pad != CSIS_PAD_SINK) + return -EINVAL; + + if (code->index >= ARRAY_SIZE(mipi_csis_formats)) + return -EINVAL; + + code->code = mipi_csis_formats[code->index].code; + + return 0; +} + static int mipi_csis_set_fmt(struct v4l2_subdev *mipi_sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *sdformat) @@ -881,6 +913,7 @@ static const struct v4l2_subdev_video_ops mipi_csis_video_ops = { static const struct v4l2_subdev_pad_ops mipi_csis_pad_ops = { .init_cfg = mipi_csis_init_cfg, + .enum_mbus_code = mipi_csis_enum_mbus_code, .get_fmt = mipi_csis_get_fmt, .set_fmt = mipi_csis_set_fmt, }; -- GitLab From 3dc4365ba87342b46ffb4140ae1ff9be3599aa7c Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:52 +0100 Subject: [PATCH 114/503] media: ti-vpe: cal: fix DMA memory corruption When the CAL driver stops streaming, it will shut everything down without waiting for the current frame to finish. This leaves the CAL DMA in a slightly undefined state, and when CAL DMA is enabled when the stream is started the next time, the old DMA transfer will continue. It is not clear if the old DMA transfer continues with the exact settings of the original transfer, or is it a mix of old and new settings, but in any case the end result is memory corruption as the destination memory address is no longer valid. I could not find any way to ensure that any old DMA transfer would be discarded, except perhaps full CAL reset. But we cannot do a full reset when one port is getting enabled, as that would reset both ports. This patch tries to make sure that the DMA transfer is finished properly when the stream is being stopped. I say "tries", as, as mentioned above, I don't see a way to force the DMA transfer to finish. I believe this fixes the corruptions for normal cases, but if for some reason the DMA of the final frame would stall a lot, resulting in timeout in the code waiting for the DMA to finish, we'll again end up with unfinished DMA transfer. However, I don't know what could cause such a timeout. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 32 +++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 6c8f3702eac0b..9dd6de14189b8 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -412,6 +412,8 @@ struct cal_ctx { struct cal_buffer *cur_frm; /* Pointer pointing to next v4l2_buffer */ struct cal_buffer *next_frm; + + bool dma_act; }; static const struct cal_fmt *find_format_by_pix(struct cal_ctx *ctx, @@ -942,6 +944,7 @@ static void csi2_lane_config(struct cal_ctx *ctx) static void csi2_ppi_enable(struct cal_ctx *ctx) { + reg_write(ctx->dev, CAL_CSI2_PPI_CTRL(ctx->csi2_port), BIT(3)); reg_write_field(ctx->dev, CAL_CSI2_PPI_CTRL(ctx->csi2_port), CAL_GEN_ENABLE, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } @@ -1204,15 +1207,25 @@ static irqreturn_t cal_irq(int irq_cal, void *data) if (isportirqset(irqst2, 1)) { ctx = dev->ctx[0]; + spin_lock(&ctx->slock); + ctx->dma_act = false; + if (ctx->cur_frm != ctx->next_frm) cal_process_buffer_complete(ctx); + + spin_unlock(&ctx->slock); } if (isportirqset(irqst2, 2)) { ctx = dev->ctx[1]; + spin_lock(&ctx->slock); + ctx->dma_act = false; + if (ctx->cur_frm != ctx->next_frm) cal_process_buffer_complete(ctx); + + spin_unlock(&ctx->slock); } } @@ -1228,6 +1241,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data) dma_q = &ctx->vidq; spin_lock(&ctx->slock); + ctx->dma_act = true; if (!list_empty(&dma_q->active) && ctx->cur_frm == ctx->next_frm) cal_schedule_next_buffer(ctx); @@ -1239,6 +1253,7 @@ static irqreturn_t cal_irq(int irq_cal, void *data) dma_q = &ctx->vidq; spin_lock(&ctx->slock); + ctx->dma_act = true; if (!list_empty(&dma_q->active) && ctx->cur_frm == ctx->next_frm) cal_schedule_next_buffer(ctx); @@ -1711,10 +1726,27 @@ static void cal_stop_streaming(struct vb2_queue *vq) struct cal_ctx *ctx = vb2_get_drv_priv(vq); struct cal_dmaqueue *dma_q = &ctx->vidq; struct cal_buffer *buf, *tmp; + unsigned long timeout; unsigned long flags; int ret; + bool dma_act; csi2_ppi_disable(ctx); + + /* wait for stream and dma to finish */ + dma_act = true; + timeout = jiffies + msecs_to_jiffies(500); + while (dma_act && time_before(jiffies, timeout)) { + msleep(50); + + spin_lock_irqsave(&ctx->slock, flags); + dma_act = ctx->dma_act; + spin_unlock_irqrestore(&ctx->slock, flags); + } + + if (dma_act) + ctx_err(ctx, "failed to disable dma cleanly\n"); + disable_irqs(ctx); csi2_phy_deinit(ctx); -- GitLab From 528649578a87afbf05ab884200e261e7eeaa8a98 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:53 +0100 Subject: [PATCH 115/503] media: ti-vpe: cal: improve enable_irqs IRQENABLE_SET registers are (usually) not meant to be read, only written to. The current driver needlessly uses read-modify-write cycle to enable IRQ bits. The read-modify-write has no bad side effects here, but it's still better to clean this up by only using write. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 9dd6de14189b8..76d55c76d938b 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -706,16 +706,16 @@ static void cal_quickdump_regs(struct cal_dev *dev) */ static void enable_irqs(struct cal_ctx *ctx) { + u32 val; + /* Enable IRQ_WDMA_END 0/1 */ - reg_write_field(ctx->dev, - CAL_HL_IRQENABLE_SET(2), - CAL_HL_IRQ_ENABLE, - CAL_HL_IRQ_MASK(ctx->csi2_port)); + val = 0; + set_field(&val, CAL_HL_IRQ_ENABLE, CAL_HL_IRQ_MASK(ctx->csi2_port)); + reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(2), val); /* Enable IRQ_WDMA_START 0/1 */ - reg_write_field(ctx->dev, - CAL_HL_IRQENABLE_SET(3), - CAL_HL_IRQ_ENABLE, - CAL_HL_IRQ_MASK(ctx->csi2_port)); + val = 0; + set_field(&val, CAL_HL_IRQ_ENABLE, CAL_HL_IRQ_MASK(ctx->csi2_port)); + reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(3), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0xFF000000); } -- GitLab From 29decd21bb16c4b482ec5b211a50ae545700f823 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:54 +0100 Subject: [PATCH 116/503] media: ti-vpe: cal: fix use of wrong macro i913_errata() sets a bit to 1 in PHY_REG10, but for some reason uses CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE for the bit value. The value of that macro is 1, so it works, but is still wrong. Fix this to 1. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 76d55c76d938b..c418296df0f86 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -645,8 +645,7 @@ static void i913_errata(struct cal_dev *dev, unsigned int port) { u32 reg10 = reg_read(dev->cc[port], CAL_CSI2_PHY_REG10); - set_field(®10, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE, - CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); + set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK); cal_dbg(1, dev, "CSI2_%d_REG10 = 0x%08x\n", port, reg10); reg_write(dev->cc[port], CAL_CSI2_PHY_REG10, reg10); -- GitLab From b6959ca031ab6a86a86947f4ce495b07b03ea22e Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:55 +0100 Subject: [PATCH 117/503] media: ti-vpe: cal: use runtime_resume for errata handling We need to do errata handling every time CAL is being enabled. The code is currently in cal_runtime_get(), which is not the correct place for it. Move the code to cal_runtime_resume, which is called every time CAL is enabled. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 36 ++++++++++++++++++----------- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index c418296df0f86..4fe37f284b54f 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -653,20 +653,7 @@ static void i913_errata(struct cal_dev *dev, unsigned int port) static int cal_runtime_get(struct cal_dev *dev) { - int r; - - r = pm_runtime_get_sync(&dev->pdev->dev); - - if (dev->flags & DRA72_CAL_PRE_ES2_LDO_DISABLE) { - /* - * Apply errata on both port eveytime we (re-)enable - * the clock - */ - i913_errata(dev, 0); - i913_errata(dev, 1); - } - - return r; + return pm_runtime_get_sync(&dev->pdev->dev); } static inline void cal_runtime_put(struct cal_dev *dev) @@ -2409,11 +2396,32 @@ static const struct of_device_id cal_of_match[] = { MODULE_DEVICE_TABLE(of, cal_of_match); #endif +static int cal_runtime_resume(struct device *dev) +{ + struct cal_dev *caldev = dev_get_drvdata(dev); + + if (caldev->flags & DRA72_CAL_PRE_ES2_LDO_DISABLE) { + /* + * Apply errata on both port everytime we (re-)enable + * the clock + */ + i913_errata(caldev, 0); + i913_errata(caldev, 1); + } + + return 0; +} + +static const struct dev_pm_ops cal_pm_ops = { + .runtime_resume = cal_runtime_resume, +}; + static struct platform_driver cal_pdrv = { .probe = cal_probe, .remove = cal_remove, .driver = { .name = CAL_MODULE_NAME, + .pm = &cal_pm_ops, .of_match_table = of_match_ptr(cal_of_match), }, }; -- GitLab From f7271bfb1801f11df6c82c14986d6b2203786f59 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:56 +0100 Subject: [PATCH 118/503] media: ti-vpe: cal: drop cal_runtime_get/put Now that cal_runtime_get and cal_runtime_put are only direct wrappers to pm_runtime_get/put, we can drop cal_runtime_get and cal_runtime_put. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 24 +++++++----------------- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 4fe37f284b54f..4f9dee3474ba6 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -651,16 +651,6 @@ static void i913_errata(struct cal_dev *dev, unsigned int port) reg_write(dev->cc[port], CAL_CSI2_PHY_REG10, reg10); } -static int cal_runtime_get(struct cal_dev *dev) -{ - return pm_runtime_get_sync(&dev->pdev->dev); -} - -static inline void cal_runtime_put(struct cal_dev *dev) -{ - pm_runtime_put_sync(&dev->pdev->dev); -} - static void cal_quickdump_regs(struct cal_dev *dev) { cal_info(dev, "CAL Registers @ 0x%pa:\n", &dev->res->start); @@ -1666,7 +1656,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) goto err; } - cal_runtime_get(ctx->dev); + pm_runtime_get_sync(&ctx->dev->pdev->dev); csi2_ctx_config(ctx); pix_proc_config(ctx); @@ -1681,7 +1671,7 @@ static int cal_start_streaming(struct vb2_queue *vq, unsigned int count) if (ret) { v4l2_subdev_call(ctx->sensor, core, s_power, 0); ctx_err(ctx, "stream on failed in subdev\n"); - cal_runtime_put(ctx->dev); + pm_runtime_put_sync(&ctx->dev->pdev->dev); goto err; } @@ -1761,7 +1751,7 @@ static void cal_stop_streaming(struct vb2_queue *vq) ctx->next_frm = NULL; spin_unlock_irqrestore(&ctx->slock, flags); - cal_runtime_put(ctx->dev); + pm_runtime_put_sync(&ctx->dev->pdev->dev); } static const struct vb2_ops cal_video_qops = { @@ -2316,14 +2306,14 @@ static int cal_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); - ret = cal_runtime_get(dev); + ret = pm_runtime_get_sync(&pdev->dev); if (ret) goto runtime_disable; /* Just check we can actually access the module */ cal_get_hwinfo(dev); - cal_runtime_put(dev); + pm_runtime_put_sync(&pdev->dev); return 0; @@ -2351,7 +2341,7 @@ static int cal_remove(struct platform_device *pdev) cal_dbg(1, dev, "Removing %s\n", CAL_MODULE_NAME); - cal_runtime_get(dev); + pm_runtime_get_sync(&pdev->dev); for (i = 0; i < CAL_NUM_CONTEXT; i++) { ctx = dev->ctx[i]; @@ -2367,7 +2357,7 @@ static int cal_remove(struct platform_device *pdev) } } - cal_runtime_put(dev); + pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); return 0; -- GitLab From ffd41d4f1593b2f8f74d1fcc81ea2d38892ada52 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:57 +0100 Subject: [PATCH 119/503] media: ti-vpe: cal: catch error irqs and print errors CAL reports various errors via IRQs, which are not handled at all by the current driver. Add code to enable and catch those IRQs and print errors. This will make it much easier to notice and debug issues with sensors. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil [hverkuil-cisco@xs4all.nl: fix: spaces preferred around that '-'] Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 46 +++++++++++++++++++++++- drivers/media/platform/ti-vpe/cal_regs.h | 6 ++++ 2 files changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 4f9dee3474ba6..838215a3f230f 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -684,6 +684,21 @@ static void enable_irqs(struct cal_ctx *ctx) { u32 val; + const u32 cio_err_mask = + CAL_CSI2_COMPLEXIO_IRQ_LANE_ERRORS_MASK | + CAL_CSI2_COMPLEXIO_IRQ_FIFO_OVR_MASK | + CAL_CSI2_COMPLEXIO_IRQ_SHORT_PACKET_MASK | + CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK; + + /* Enable CIO error irqs */ + reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(1), + CAL_HL_IRQ_CIO_MASK(ctx->csi2_port)); + reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_IRQENABLE(ctx->csi2_port), + cio_err_mask); + + /* Always enable OCPO error */ + reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(1), CAL_HL_IRQ_OCPO_ERR_MASK); + /* Enable IRQ_WDMA_END 0/1 */ val = 0; set_field(&val, CAL_HL_IRQ_ENABLE, CAL_HL_IRQ_MASK(ctx->csi2_port)); @@ -700,6 +715,12 @@ static void disable_irqs(struct cal_ctx *ctx) { u32 val; + /* Disable CIO error irqs */ + reg_write(ctx->dev, CAL_HL_IRQENABLE_CLR(1), + CAL_HL_IRQ_CIO_MASK(ctx->csi2_port)); + reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_IRQENABLE(ctx->csi2_port), + 0); + /* Disable IRQ_WDMA_END 0/1 */ val = 0; set_field(&val, CAL_HL_IRQ_CLEAR, CAL_HL_IRQ_MASK(ctx->csi2_port)); @@ -1171,7 +1192,30 @@ static irqreturn_t cal_irq(int irq_cal, void *data) struct cal_dev *dev = (struct cal_dev *)data; struct cal_ctx *ctx; struct cal_dmaqueue *dma_q; - u32 irqst2, irqst3; + u32 irqst1, irqst2, irqst3; + + irqst1 = reg_read(dev, CAL_HL_IRQSTATUS(1)); + if (irqst1) { + int i; + + reg_write(dev, CAL_HL_IRQSTATUS(1), irqst1); + + if (irqst1 & CAL_HL_IRQ_OCPO_ERR_MASK) + dev_err_ratelimited(&dev->pdev->dev, "OCPO ERROR\n"); + + for (i = 1; i <= 2; ++i) { + if (irqst1 & CAL_HL_IRQ_CIO_MASK(i)) { + u32 cio_stat = reg_read(dev, + CAL_CSI2_COMPLEXIO_IRQSTATUS(i)); + + dev_err_ratelimited(&dev->pdev->dev, + "CIO%d error: %#08x\n", i, cio_stat); + + reg_write(dev, CAL_CSI2_COMPLEXIO_IRQSTATUS(i), + cio_stat); + } + } + } /* Check which DMA just finished */ irqst2 = reg_read(dev, CAL_HL_IRQSTATUS(2)); diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h index 0b76d11860740..d9199141801be 100644 --- a/drivers/media/platform/ti-vpe/cal_regs.h +++ b/drivers/media/platform/ti-vpe/cal_regs.h @@ -158,6 +158,11 @@ #define CAL_HL_IRQ_ENABLED 0x1 #define CAL_HL_IRQ_PENDING 0x1 +#define CAL_HL_IRQ_OCPO_ERR_MASK BIT(6) + +#define CAL_HL_IRQ_CIO_MASK(i) BIT(16 + ((i) - 1) * 8) +#define CAL_HL_IRQ_VC_MASK(i) BIT(17 + ((i) - 1) * 8) + #define CAL_PIX_PROC_EN_MASK BIT(0) #define CAL_PIX_PROC_EXTRACT_MASK GENMASK(4, 1) #define CAL_PIX_PROC_EXTRACT_B6 0x0 @@ -414,6 +419,7 @@ #define CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL3_MASK BIT(17) #define CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL4_MASK BIT(18) #define CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL5_MASK BIT(19) +#define CAL_CSI2_COMPLEXIO_IRQ_LANE_ERRORS_MASK GENMASK(19, 0) #define CAL_CSI2_COMPLEXIO_IRQ_STATEULPM1_MASK BIT(20) #define CAL_CSI2_COMPLEXIO_IRQ_STATEULPM2_MASK BIT(21) #define CAL_CSI2_COMPLEXIO_IRQ_STATEULPM3_MASK BIT(22) -- GitLab From 8425328585154abf3763b7a701aefa9512fce161 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:58 +0100 Subject: [PATCH 120/503] media: ti-vpe: cal: print errors on timeouts The driver does not print any errors on ComplexIO reset timeout or when waiting for stop-state, making it difficult to debug and notice problems. Add error prints for these cases. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 838215a3f230f..9bfe83fdd76e2 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -839,10 +839,11 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) break; usleep_range(1000, 1100); } - ctx_dbg(3, ctx, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Complex IO Reset Done (%d) %s\n", - ctx->csi2_port, - reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)), i, - (i >= 250) ? "(timeout)" : ""); + + if (reg_read_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) != + CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) + ctx_err(ctx, "Timeout waiting for Complex IO reset done\n"); /* 4. G. Wait for all enabled lane to reach stop state */ for (i = 0; i < 10; i++) { @@ -853,10 +854,10 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) break; usleep_range(1000, 1100); } - ctx_dbg(3, ctx, "CAL_CSI2_TIMING(%d) = 0x%08x Stop State Reached %s\n", - ctx->csi2_port, - reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port)), - (i >= 10) ? "(timeout)" : ""); + + if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), + CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) != 0) + ctx_err(ctx, "Timeout waiting for stop state\n"); ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x (Bit(31,28) should be set!)\n", (ctx->csi2_port - 1), reg_read(ctx->cc, CAL_CSI2_PHY_REG1)); -- GitLab From 09ea44ca0743ad0b0b29935916f4fbf296a3cc1a Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:14:59 +0100 Subject: [PATCH 121/503] media: ti-vpe: cal: simplify irq handling Instead of having identical code block to handle irqs for the two CAL ports, we can have a for loop and a single code block. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 68 +++++++++++------------------ 1 file changed, 25 insertions(+), 43 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 9bfe83fdd76e2..df06ecfdfc6ae 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -1221,64 +1221,46 @@ static irqreturn_t cal_irq(int irq_cal, void *data) /* Check which DMA just finished */ irqst2 = reg_read(dev, CAL_HL_IRQSTATUS(2)); if (irqst2) { + int i; + /* Clear Interrupt status */ reg_write(dev, CAL_HL_IRQSTATUS(2), irqst2); - /* Need to check both port */ - if (isportirqset(irqst2, 1)) { - ctx = dev->ctx[0]; - - spin_lock(&ctx->slock); - ctx->dma_act = false; - - if (ctx->cur_frm != ctx->next_frm) - cal_process_buffer_complete(ctx); - - spin_unlock(&ctx->slock); - } - - if (isportirqset(irqst2, 2)) { - ctx = dev->ctx[1]; + for (i = 1; i <= 2; ++i) { + if (isportirqset(irqst2, i)) { + ctx = dev->ctx[i - 1]; - spin_lock(&ctx->slock); - ctx->dma_act = false; + spin_lock(&ctx->slock); + ctx->dma_act = false; - if (ctx->cur_frm != ctx->next_frm) - cal_process_buffer_complete(ctx); + if (ctx->cur_frm != ctx->next_frm) + cal_process_buffer_complete(ctx); - spin_unlock(&ctx->slock); + spin_unlock(&ctx->slock); + } } } /* Check which DMA just started */ irqst3 = reg_read(dev, CAL_HL_IRQSTATUS(3)); if (irqst3) { + int i; + /* Clear Interrupt status */ reg_write(dev, CAL_HL_IRQSTATUS(3), irqst3); - /* Need to check both port */ - if (isportirqset(irqst3, 1)) { - ctx = dev->ctx[0]; - dma_q = &ctx->vidq; - - spin_lock(&ctx->slock); - ctx->dma_act = true; - if (!list_empty(&dma_q->active) && - ctx->cur_frm == ctx->next_frm) - cal_schedule_next_buffer(ctx); - spin_unlock(&ctx->slock); - } - - if (isportirqset(irqst3, 2)) { - ctx = dev->ctx[1]; - dma_q = &ctx->vidq; - - spin_lock(&ctx->slock); - ctx->dma_act = true; - if (!list_empty(&dma_q->active) && - ctx->cur_frm == ctx->next_frm) - cal_schedule_next_buffer(ctx); - spin_unlock(&ctx->slock); + for (i = 1; i <= 2; ++i) { + if (isportirqset(irqst3, i)) { + ctx = dev->ctx[i - 1]; + dma_q = &ctx->vidq; + + spin_lock(&ctx->slock); + ctx->dma_act = true; + if (!list_empty(&dma_q->active) && + ctx->cur_frm == ctx->next_frm) + cal_schedule_next_buffer(ctx); + spin_unlock(&ctx->slock); + } } } -- GitLab From ad03da58ea57304ca7c78105cb9906336c3d03e6 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:00 +0100 Subject: [PATCH 122/503] media: ti-vpe: cal: remove useless CAL_GEN_* macros These macros only obfuscate the code, so drop them. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 20 ++++++++------------ drivers/media/platform/ti-vpe/cal_regs.h | 9 --------- 2 files changed, 8 insertions(+), 21 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index df06ecfdfc6ae..101efe3a1045d 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -777,10 +777,8 @@ static void csi2_phy_init(struct cal_ctx *ctx) /* 3.B. Program Stop States */ val = reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port)); - set_field(&val, CAL_GEN_ENABLE, - CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); - set_field(&val, CAL_GEN_DISABLE, - CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); + set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); + set_field(&val, 0, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); set_field(&val, 407, CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); reg_write(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), val); ctx_dbg(3, ctx, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", @@ -789,8 +787,7 @@ static void csi2_phy_init(struct cal_ctx *ctx) /* 4. Force FORCERXMODE */ val = reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port)); - set_field(&val, CAL_GEN_ENABLE, - CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); + set_field(&val, 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); reg_write(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), val); ctx_dbg(3, ctx, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", ctx->csi2_port, @@ -849,8 +846,7 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) for (i = 0; i < 10; i++) { if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), - CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) == - CAL_GEN_DISABLE) + CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) == 0) break; usleep_range(1000, 1100); } @@ -944,13 +940,13 @@ static void csi2_ppi_enable(struct cal_ctx *ctx) { reg_write(ctx->dev, CAL_CSI2_PPI_CTRL(ctx->csi2_port), BIT(3)); reg_write_field(ctx->dev, CAL_CSI2_PPI_CTRL(ctx->csi2_port), - CAL_GEN_ENABLE, CAL_CSI2_PPI_CTRL_IF_EN_MASK); + 1, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } static void csi2_ppi_disable(struct cal_ctx *ctx) { reg_write_field(ctx->dev, CAL_CSI2_PPI_CTRL(ctx->csi2_port), - CAL_GEN_DISABLE, CAL_CSI2_PPI_CTRL_IF_EN_MASK); + 0, CAL_CSI2_PPI_CTRL_IF_EN_MASK); } static void csi2_ctx_config(struct cal_ctx *ctx) @@ -1025,7 +1021,7 @@ static void pix_proc_config(struct cal_ctx *ctx) set_field(&val, CAL_PIX_PROC_DPCME_BYPASS, CAL_PIX_PROC_DPCME_MASK); set_field(&val, pack, CAL_PIX_PROC_PACK_MASK); set_field(&val, ctx->csi2_port, CAL_PIX_PROC_CPORT_MASK); - set_field(&val, CAL_GEN_ENABLE, CAL_PIX_PROC_EN_MASK); + set_field(&val, 1, CAL_PIX_PROC_EN_MASK); reg_write(ctx->dev, CAL_PIX_PROC(ctx->csi2_port), val); ctx_dbg(3, ctx, "CAL_PIX_PROC(%d) = 0x%08x\n", ctx->csi2_port, reg_read(ctx->dev, CAL_PIX_PROC(ctx->csi2_port))); @@ -1045,7 +1041,7 @@ static void cal_wr_dma_config(struct cal_ctx *ctx, CAL_WR_DMA_CTRL_MODE_MASK); set_field(&val, CAL_WR_DMA_CTRL_PATTERN_LINEAR, CAL_WR_DMA_CTRL_PATTERN_MASK); - set_field(&val, CAL_GEN_ENABLE, CAL_WR_DMA_CTRL_STALL_RD_MASK); + set_field(&val, 1, CAL_WR_DMA_CTRL_STALL_RD_MASK); reg_write(ctx->dev, CAL_WR_DMA_CTRL(ctx->csi2_port), val); ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->csi2_port, reg_read(ctx->dev, CAL_WR_DMA_CTRL(ctx->csi2_port))); diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h index d9199141801be..c558455839e9f 100644 --- a/drivers/media/platform/ti-vpe/cal_regs.h +++ b/drivers/media/platform/ti-vpe/cal_regs.h @@ -100,15 +100,6 @@ /* CAL Control Module Core Camerrx Control register offsets */ #define CM_CTRL_CORE_CAMERRX_CONTROL 0x000 -/********************************************************************* -* Generic value used in various field below -*********************************************************************/ - -#define CAL_GEN_DISABLE 0 -#define CAL_GEN_ENABLE 1 -#define CAL_GEN_FALSE 0 -#define CAL_GEN_TRUE 1 - /********************************************************************* * Field Definition Macros *********************************************************************/ -- GitLab From 05254a2b12ec922602b673780152a40d7517505a Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:01 +0100 Subject: [PATCH 123/503] media: ti-vpe: cal: remove useless IRQ defines Remove a bunch of IRQ defines, of which only CAL_HL_IRQ_ENABLE and CAL_HL_IRQ_CLEAR are used, and these defines only end up obfuscating code. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 8 ++++---- drivers/media/platform/ti-vpe/cal_regs.h | 6 ------ 2 files changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 101efe3a1045d..e35565fc4bede 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -701,11 +701,11 @@ static void enable_irqs(struct cal_ctx *ctx) /* Enable IRQ_WDMA_END 0/1 */ val = 0; - set_field(&val, CAL_HL_IRQ_ENABLE, CAL_HL_IRQ_MASK(ctx->csi2_port)); + set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(2), val); /* Enable IRQ_WDMA_START 0/1 */ val = 0; - set_field(&val, CAL_HL_IRQ_ENABLE, CAL_HL_IRQ_MASK(ctx->csi2_port)); + set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(3), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0xFF000000); @@ -723,11 +723,11 @@ static void disable_irqs(struct cal_ctx *ctx) /* Disable IRQ_WDMA_END 0/1 */ val = 0; - set_field(&val, CAL_HL_IRQ_CLEAR, CAL_HL_IRQ_MASK(ctx->csi2_port)); + set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); reg_write(ctx->dev, CAL_HL_IRQENABLE_CLR(2), val); /* Disable IRQ_WDMA_START 0/1 */ val = 0; - set_field(&val, CAL_HL_IRQ_CLEAR, CAL_HL_IRQ_MASK(ctx->csi2_port)); + set_field(&val, 1, CAL_HL_IRQ_MASK(ctx->csi2_port)); reg_write(ctx->dev, CAL_HL_IRQENABLE_CLR(3), val); /* Todo: Add VC_IRQ and CSI2_COMPLEXIO_IRQ handling */ reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0); diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h index c558455839e9f..ac54a2fe7bb62 100644 --- a/drivers/media/platform/ti-vpe/cal_regs.h +++ b/drivers/media/platform/ti-vpe/cal_regs.h @@ -142,12 +142,6 @@ #define CAL_HL_IRQ_EOI_LINE_NUMBER_EOI0 0 #define CAL_HL_IRQ_MASK(m) BIT((m) - 1) -#define CAL_HL_IRQ_NOACTION 0x0 -#define CAL_HL_IRQ_ENABLE 0x1 -#define CAL_HL_IRQ_CLEAR 0x1 -#define CAL_HL_IRQ_DISABLED 0x0 -#define CAL_HL_IRQ_ENABLED 0x1 -#define CAL_HL_IRQ_PENDING 0x1 #define CAL_HL_IRQ_OCPO_ERR_MASK BIT(6) -- GitLab From fa72ef7abc90575e0fba8c8ecffa532ec6859cd9 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:02 +0100 Subject: [PATCH 124/503] media: ti-vpe: cal: use reg_write_field Simplify the code by using reg_write_field() where trivially possible. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 34 ++++++++++++----------------- 1 file changed, 14 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index e35565fc4bede..aacca33813e72 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -761,10 +761,9 @@ static void csi2_phy_init(struct cal_ctx *ctx) camerarx_phy_enable(ctx); /* 2. Reset complex IO - Do not wait for reset completion */ - val = reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)); - set_field(&val, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL, - CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); - reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), val); + reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_OPERATIONAL, + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); ctx_dbg(3, ctx, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x De-assert Complex IO Reset\n", ctx->csi2_port, reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port))); @@ -786,18 +785,16 @@ static void csi2_phy_init(struct cal_ctx *ctx) reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port))); /* 4. Force FORCERXMODE */ - val = reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port)); - set_field(&val, 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); - reg_write(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), val); + reg_write_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), + 1, CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK); ctx_dbg(3, ctx, "CAL_CSI2_TIMING(%d) = 0x%08x Force RXMODE\n", ctx->csi2_port, reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port))); /* E. Power up the PHY using the complex IO */ - val = reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)); - set_field(&val, CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON, - CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); - reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), val); + reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON, + CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); /* F. Wait for power up completion */ for (i = 0; i < 10; i++) { @@ -862,13 +859,11 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) static void csi2_phy_deinit(struct cal_ctx *ctx) { int i; - u32 val; /* Power down the PHY using the complex IO */ - val = reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)); - set_field(&val, CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF, - CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); - reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), val); + reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF, + CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); /* Wait for power down completion */ for (i = 0; i < 10; i++) { @@ -885,10 +880,9 @@ static void csi2_phy_deinit(struct cal_ctx *ctx) (i >= 10) ? "(timeout)" : ""); /* Assert Comple IO Reset */ - val = reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)); - set_field(&val, CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL, - CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); - reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), val); + reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL, + CAL_CSI2_COMPLEXIO_CFG_RESET_CTRL_MASK); /* Wait for power down completion */ for (i = 0; i < 10; i++) { -- GitLab From f77f2e1f29469394d9113669a88079863f37fc29 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:03 +0100 Subject: [PATCH 125/503] media: ti-vpe: cal: cleanup CIO power enable/disable Move the code to enable and disable ComplexIO power to its own function. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 67 +++++++++++++---------------- 1 file changed, 31 insertions(+), 36 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index aacca33813e72..d8d4555760626 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -733,11 +733,39 @@ static void disable_irqs(struct cal_ctx *ctx) reg_write(ctx->dev, CAL_CSI2_VC_IRQENABLE(1), 0); } +static void csi2_cio_power(struct cal_ctx *ctx, bool enable) +{ + u32 target_state; + unsigned int i; + + target_state = enable ? CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON : + CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF; + + reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + target_state, CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); + + for (i = 0; i < 10; i++) { + u32 current_state; + + current_state = reg_read_field(ctx->dev, + CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), + CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK); + + if (current_state == target_state) + break; + + usleep_range(1000, 1100); + } + + if (i == 10) + ctx_err(ctx, "Failed to power %s complexio\n", + enable ? "up" : "down"); +} + static void csi2_phy_config(struct cal_ctx *ctx); static void csi2_phy_init(struct cal_ctx *ctx) { - int i; u32 val; /* Steps @@ -792,23 +820,7 @@ static void csi2_phy_init(struct cal_ctx *ctx) reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port))); /* E. Power up the PHY using the complex IO */ - reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), - CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_ON, - CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); - - /* F. Wait for power up completion */ - for (i = 0; i < 10; i++) { - if (reg_read_field(ctx->dev, - CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), - CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK) == - CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_STATE_ON) - break; - usleep_range(1000, 1100); - } - ctx_dbg(3, ctx, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Powered UP %s\n", - ctx->csi2_port, - reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)), - (i >= 10) ? "(timeout)" : ""); + csi2_cio_power(ctx, true); } static void csi2_wait_for_phy(struct cal_ctx *ctx) @@ -860,24 +872,7 @@ static void csi2_phy_deinit(struct cal_ctx *ctx) { int i; - /* Power down the PHY using the complex IO */ - reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), - CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_STATE_OFF, - CAL_CSI2_COMPLEXIO_CFG_PWR_CMD_MASK); - - /* Wait for power down completion */ - for (i = 0; i < 10; i++) { - if (reg_read_field(ctx->dev, - CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), - CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_MASK) == - CAL_CSI2_COMPLEXIO_CFG_PWR_STATUS_STATE_OFF) - break; - usleep_range(1000, 1100); - } - ctx_dbg(3, ctx, "CAL_CSI2_COMPLEXIO_CFG(%d) = 0x%08x Powered Down %s\n", - ctx->csi2_port, - reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)), - (i >= 10) ? "(timeout)" : ""); + csi2_cio_power(ctx, false); /* Assert Comple IO Reset */ reg_write_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), -- GitLab From c1075243e56caf084da9056fb85a98bc9cf22554 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:04 +0100 Subject: [PATCH 126/503] media: ti-vpe: cal: fix dummy read to phy After ComplexIO reset, a dummy read to PHY is needed as per CAL spec to finish the reset. Currently the driver reads a ComplexIO register, not PHY register. Fix this. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index d8d4555760626..c7cbb50eb5f94 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -796,8 +796,8 @@ static void csi2_phy_init(struct cal_ctx *ctx) ctx->csi2_port, reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port))); - /* Dummy read to allow SCP to complete */ - val = reg_read(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port)); + /* Dummy read to allow SCP reset to complete */ + reg_read(ctx->cc, CAL_CSI2_PHY_REG0); /* 3.A. Program Phy Timing Parameters */ csi2_phy_config(ctx); -- GitLab From aaf97874882ffefb5cf2a135085fc88169794e2d Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:05 +0100 Subject: [PATCH 127/503] media: ti-vpe: cal: program number of lines properly CAL_CSI2_CTX register has LINES field, which, according to the documentation, should be programmed to the number of lines transmitted by the camera. If the number of lines is unknown, it can be set to 0. The driver sets the field to 0 for some reason, even if we know the number of lines. This patch sets the number of lines properly, which will allow the HW to discard extra lines (if the sensor would send such for some reason), and, according to documentation: "This leads to regular video timings and avoids potential artifacts". Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index c7cbb50eb5f94..c124f28435d15 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -955,8 +955,7 @@ static void csi2_ctx_config(struct cal_ctx *ctx) set_field(&val, 0x1, CAL_CSI2_CTX_DT_MASK); /* Virtual Channel from the CSI2 sensor usually 0! */ set_field(&val, ctx->virtual_channel, CAL_CSI2_CTX_VC_MASK); - /* NUM_LINES_PER_FRAME => 0 means auto detect */ - set_field(&val, 0, CAL_CSI2_CTX_LINES_MASK); + set_field(&val, ctx->v_fmt.fmt.pix.height, CAL_CSI2_CTX_LINES_MASK); set_field(&val, CAL_CSI2_CTX_ATT_PIX, CAL_CSI2_CTX_ATT_MASK); set_field(&val, CAL_CSI2_CTX_PACK_MODE_LINE, CAL_CSI2_CTX_PACK_MODE_MASK); -- GitLab From cd1a746b9b244e39570eb67f9de52c5ae06a136f Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:06 +0100 Subject: [PATCH 128/503] media: ti-vpe: cal: set DMA max seg size Set DMA max seg size correctly to get rid of warnings on 64 bit platforms: DMA-API: cal 6f03000.cal: mapping sg segment longer than device claims to support [len=720896] [max=65536] Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index c124f28435d15..67954754ffff9 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2315,6 +2315,8 @@ static int cal_probe(struct platform_device *pdev) return -ENODEV; } + vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); + pm_runtime_enable(&pdev->dev); ret = pm_runtime_get_sync(&pdev->dev); @@ -2329,6 +2331,8 @@ static int cal_probe(struct platform_device *pdev) return 0; runtime_disable: + vb2_dma_contig_clear_max_seg_size(&pdev->dev); + pm_runtime_disable(&pdev->dev); for (i = 0; i < CAL_NUM_CONTEXT; i++) { ctx = dev->ctx[i]; @@ -2371,6 +2375,8 @@ static int cal_remove(struct platform_device *pdev) pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); + vb2_dma_contig_clear_max_seg_size(&pdev->dev); + return 0; } -- GitLab From cbdda28ab9302db941d0303d39aa775896e617e4 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:07 +0100 Subject: [PATCH 129/503] media: ti-vpe: cal: move code to separate functions To make csi2_wait_for_phy() more readable, move code to separate functions. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil [hverkuil-cisco@xs4all.nl: delete empty line before } ] Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 36 +++++++++++++++++++---------- 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 67954754ffff9..318b70ec452e4 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -823,20 +823,10 @@ static void csi2_phy_init(struct cal_ctx *ctx) csi2_cio_power(ctx, true); } -static void csi2_wait_for_phy(struct cal_ctx *ctx) +static void csi2_wait_complexio_reset(struct cal_ctx *ctx) { int i; - /* Steps - * 2. Wait for completion of reset - * Note if the external sensor is not sending byte clock, - * the reset will timeout - * 4.Force FORCERXMODE - * G. Wait for all enabled lane to reach stop state - * H. Disable pull down using pad control - */ - - /* 2. Wait for reset completion */ for (i = 0; i < 250; i++) { if (reg_read_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), @@ -850,8 +840,12 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) != CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) ctx_err(ctx, "Timeout waiting for Complex IO reset done\n"); +} + +static void csi2_wait_stop_state(struct cal_ctx *ctx) +{ + int i; - /* 4. G. Wait for all enabled lane to reach stop state */ for (i = 0; i < 10; i++) { if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), @@ -863,6 +857,24 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) != 0) ctx_err(ctx, "Timeout waiting for stop state\n"); +} + +static void csi2_wait_for_phy(struct cal_ctx *ctx) +{ + /* Steps + * 2. Wait for completion of reset + * Note if the external sensor is not sending byte clock, + * the reset will timeout + * 4.Force FORCERXMODE + * G. Wait for all enabled lane to reach stop state + * H. Disable pull down using pad control + */ + + /* 2. Wait for reset completion */ + csi2_wait_complexio_reset(ctx); + + /* 4. G. Wait for all enabled lane to reach stop state */ + csi2_wait_stop_state(ctx); ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x (Bit(31,28) should be set!)\n", (ctx->csi2_port - 1), reg_read(ctx->cc, CAL_CSI2_PHY_REG1)); -- GitLab From c17013918a217cea51ecc4925953d640b0dc8858 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:08 +0100 Subject: [PATCH 130/503] media: ti-vpe: cal: improve wait for CIO resetdone Sometimes there is a timeout when waiting for the 'ComplexIO Reset Done'. Testing shows that sometimes we need to wait more than what the current code does. It is not clear how long this wait can be, but it is based on how quickly the sensor provides a valid clock, and how quickly CAL syncs to it. Change the code to make it more obvious how long we'll wait, and set a wider range for usleep_range. Increase the timeout to 750ms. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 318b70ec452e4..38f1ae63f26a7 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -825,15 +825,16 @@ static void csi2_phy_init(struct cal_ctx *ctx) static void csi2_wait_complexio_reset(struct cal_ctx *ctx) { - int i; + unsigned long timeout; - for (i = 0; i < 250; i++) { + timeout = jiffies + msecs_to_jiffies(750); + while (time_before(jiffies, timeout)) { if (reg_read_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) == CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) break; - usleep_range(1000, 1100); + usleep_range(500, 5000); } if (reg_read_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), -- GitLab From 355357457a5880ddeb776e0f61bbb74f49dc5f4c Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:09 +0100 Subject: [PATCH 131/503] media: ti-vpe: cal: improve wait for stop-state Sometimes there is a timeout when waiting for the Stop-State. Testing shows that sometimes we need to wait more than what the current code does. It is not clear how long this wait can be, but it is based on how quickly the sensor provides a valid clock, and how quickly CAL syncs to it. Change the code to make it more obvious how long we'll wait, and set a wider range for usleep_range. Increase the timeout to 750ms. Signed-off-by: Tomi Valkeinen Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 38f1ae63f26a7..3ee1053cb2def 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -845,14 +845,15 @@ static void csi2_wait_complexio_reset(struct cal_ctx *ctx) static void csi2_wait_stop_state(struct cal_ctx *ctx) { - int i; + unsigned long timeout; - for (i = 0; i < 10; i++) { + timeout = jiffies + msecs_to_jiffies(750); + while (time_before(jiffies, timeout)) { if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) == 0) break; - usleep_range(1000, 1100); + usleep_range(500, 5000); } if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), -- GitLab From 6dfcbde592e0fc4d5ab9618764d9849f66e3090c Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 25 Mar 2020 13:15:10 +0100 Subject: [PATCH 132/503] media: ti-vpe: cal: fix stop state timeout The stop-state timeout needs to be over 100us as per CSI spec. With the CAL fclk of 266 MHZ on DRA76, with the current value the driver uses, the timeout is 24us. Too small timeout will cause failure to enable the streaming. Also, the fclk can be different on other SoCs, as is the case with AM65x where the fclk is 250 MHz. This patch fixes the timeout by calculating it correctly based on the fclk rate. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 3ee1053cb2def..49204872e711d 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -6,6 +6,7 @@ * Benoit Parrot, */ +#include #include #include #include @@ -340,6 +341,7 @@ static const struct cal_data am654_cal_data = { * all instances. */ struct cal_dev { + struct clk *fclk; int irq; void __iomem *base; struct resource *res; @@ -767,6 +769,7 @@ static void csi2_phy_config(struct cal_ctx *ctx); static void csi2_phy_init(struct cal_ctx *ctx) { u32 val; + u32 sscounter; /* Steps * 1. Configure D-PHY mode and enable required lanes @@ -803,10 +806,20 @@ static void csi2_phy_init(struct cal_ctx *ctx) csi2_phy_config(ctx); /* 3.B. Program Stop States */ + /* + * The stop-state-counter is based on fclk cycles, and we always use + * the x16 and x4 settings, so stop-state-timeout = + * fclk-cycle * 16 * 4 * counter. + * + * Stop-state-timeout must be more than 100us as per CSI2 spec, so we + * calculate a timeout that's 100us (rounding up). + */ + sscounter = DIV_ROUND_UP(clk_get_rate(ctx->dev->fclk), 10000 * 16 * 4); + val = reg_read(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port)); set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK); - set_field(&val, 0, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); - set_field(&val, 407, CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); + set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK); + set_field(&val, sscounter, CAL_CSI2_TIMING_STOP_STATE_COUNTER_IO1_MASK); reg_write(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), val); ctx_dbg(3, ctx, "CAL_CSI2_TIMING(%d) = 0x%08x Stop States\n", ctx->csi2_port, @@ -2256,6 +2269,12 @@ static int cal_probe(struct platform_device *pdev) /* save pdev pointer */ dev->pdev = pdev; + dev->fclk = devm_clk_get(&pdev->dev, "fck"); + if (IS_ERR(dev->fclk)) { + dev_err(&pdev->dev, "cannot get CAL fclk\n"); + return PTR_ERR(dev->fclk); + } + syscon_camerrx = syscon_regmap_lookup_by_phandle(parent, "ti,camerrx-control"); ret = of_property_read_u32_index(parent, "ti,camerrx-control", 1, -- GitLab From ec16d2ab4d0bb0344ae6aab74d642f813984b737 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 14 Apr 2020 12:58:59 +0200 Subject: [PATCH 133/503] media: docs: fix some broken references Some media files got moved. Update the corresponding references to the referenced files. Signed-off-by: Mauro Carvalho Chehab --- Documentation/driver-api/media/drivers/vimc-devel.rst | 4 ++-- MAINTAINERS | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/driver-api/media/drivers/vimc-devel.rst b/Documentation/driver-api/media/drivers/vimc-devel.rst index b2aa2ee79205f..1584abba6ee01 100644 --- a/Documentation/driver-api/media/drivers/vimc-devel.rst +++ b/Documentation/driver-api/media/drivers/vimc-devel.rst @@ -9,7 +9,7 @@ Source code documentation vimc-streamer ~~~~~~~~~~~~~ -.. kernel-doc:: drivers/media/platform/vimc/vimc-streamer.h +.. kernel-doc:: drivers/media/test_drivers/vimc/vimc-streamer.h :internal: -.. kernel-doc:: drivers/media/platform/vimc/vimc-streamer.c +.. kernel-doc:: drivers/media/test_drivers/vimc/vimc-streamer.c diff --git a/MAINTAINERS b/MAINTAINERS index 0cfd86594b0b1..db9937643a6cc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5125,7 +5125,7 @@ X: Documentation/ABI/ X: Documentation/devicetree/ X: Documentation/firmware-guide/acpi/ X: Documentation/i2c/ -X: Documentation/media/ +X: Documentation/admin-guide/media/ X: Documentation/userspace-api/media/ X: Documentation/driver-api/media/ X: Documentation/power/ @@ -10609,7 +10609,7 @@ W: https://linuxtv.org Q: http://patchwork.kernel.org/project/linux-media/list/ T: git git://linuxtv.org/media_tree.git F: Documentation/devicetree/bindings/media/ -F: Documentation/media/ +X: Documentation/admin-guide/media/ F: Documentation/userspace-api/media/ F: Documentation/driver-api/media/ F: drivers/media/ -- GitLab From 860b511766a3d95308a942ac09a34e4d1839e706 Mon Sep 17 00:00:00 2001 From: Helen Koike Date: Tue, 14 Apr 2020 16:02:38 -0300 Subject: [PATCH 134/503] media: Makefile: fix test drivers compilation test_drivers/ folder is not being added by media Makefile, so it is not being compiled. Add test_drivers/ folder in Makefile folder's list. Fixes: 4b32216adb010 ("media: split test drivers from platform directory") Signed-off-by: Helen Koike Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/Makefile b/drivers/media/Makefile index f215f0a89f9e6..693b3f0bf03ee 100644 --- a/drivers/media/Makefile +++ b/drivers/media/Makefile @@ -29,6 +29,6 @@ obj-$(CONFIG_CEC_CORE) += cec/ # Finally, merge the drivers that require the core # -obj-y += common/ platform/ pci/ usb/ mmc/ firewire/ spi/ +obj-y += common/ platform/ pci/ usb/ mmc/ firewire/ spi/ test_drivers/ obj-$(CONFIG_VIDEO_DEV) += radio/ -- GitLab From 9393d050c860a8f03f1e04d380653d23c7911c90 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 09:46:06 +0200 Subject: [PATCH 135/503] Revert "media: Kconfig: move CEC-specific options to cec/Kconfig" The CEC_CORE symbols are selected by DRM, and should be independent of MEDIA_SUPPORT. Fixes this warning when doing "make multi_v7_defconfig": WARNING: unmet direct dependencies detected for CEC_CORE Depends on [m]: MEDIA_SUPPORT [=m] Selected by [y]: - DRM_TEGRA [=y] && HAS_IOMEM [=y] && (ARCH_TEGRA [=y] || ARM [=y] && COMPILE_TEST [=n]) && COMMON_CLK [=y] && DRM [=y] && OF [=y] && CEC_NOTIFIER [=y] Selected by [m]: - VIDEO_SAMSUNG_S5P_CEC [=m] && MEDIA_SUPPORT [=m] && MEDIA_PLATFORM_SUPPORT [=y] && CEC_PLATFORM_DRIVERS [=y] && (ARCH_EXYNOS [=y] || COMPILE_TEST [=n]) - DRM_EXYNOS_HDMI [=y] && HAS_IOMEM [=y] && DRM_EXYNOS [=m] && (DRM_EXYNOS_MIXER [=y] || DRM_EXYNOS5433_DECON [=n]) && CEC_NOTIFIER [=y] - DRM_I2C_ADV7511_CEC [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_BRIDGE [=y] && DRM_I2C_ADV7511 [=m] - DRM_DW_HDMI [=m] && HAS_IOMEM [=y] && DRM [=y] && DRM_BRIDGE [=y] && CEC_NOTIFIER [=y] This reverts commit f1991411257bdb68d96ef8c8c5b35f412b480375. Reported-by: Stephen Rothwell Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 13 +++++++++++++ drivers/media/cec/Kconfig | 10 ---------- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index a8def1591352d..836c2be6c522f 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -3,6 +3,19 @@ # Multimedia device configuration # +# +# NOTE: Those symbols can't depend on MEDIA_SUPPORT, as it would cause +# unmatched dependencies +# +config CEC_CORE + tristate + +config CEC_NOTIFIER + bool + +config CEC_PIN + bool + source "drivers/media/rc/Kconfig" menuconfig MEDIA_SUPPORT diff --git a/drivers/media/cec/Kconfig b/drivers/media/cec/Kconfig index 31417feaa213d..c01919713ab95 100644 --- a/drivers/media/cec/Kconfig +++ b/drivers/media/cec/Kconfig @@ -1,14 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only - -config CEC_CORE - tristate - -config CEC_NOTIFIER - bool - -config CEC_PIN - bool - config MEDIA_CEC_RC bool "HDMI CEC RC integration" depends on CEC_CORE && RC_CORE -- GitLab From 8e5b5d75e9d0a6d75e554047ad5c8d2c935447d4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 10:06:59 +0200 Subject: [PATCH 136/503] media: Kconfig: DVB support should be enabled for Digital TV As we reverted changeset 85f7cd3a2aad ("Revert "media: Kconfig: better support hybrid TV devices""), we should add a default to DVB_CORE, as otherwise DVB support won't work. Fixes: 85f7cd3a2aad ("Revert "media: Kconfig: better support hybrid TV devices"") Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 836c2be6c522f..e8bd354a0f754 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -203,6 +203,7 @@ config DVB_CORE tristate depends on MEDIA_DIGITAL_TV_SUPPORT depends on (I2C || I2C=n) + default MEDIA_DIGITAL_TV_SUPPORT select CRC32 help Enables the DVB API, used by Digital TV devices. Supports several -- GitLab From de73b88c7ca1f3b214ba135d100afad42ddf7a2a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 10:43:44 +0200 Subject: [PATCH 137/503] media: cec: move the core to a separate directory In preparation for moving CEC drivers to the CEC directory, move the core to a separate place. Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/cec/Makefile | 16 +--------------- drivers/media/cec/core/Makefile | 16 ++++++++++++++++ drivers/media/cec/{ => core}/cec-adap.c | 0 drivers/media/cec/{ => core}/cec-api.c | 0 drivers/media/cec/{ => core}/cec-core.c | 0 drivers/media/cec/{ => core}/cec-notifier.c | 0 drivers/media/cec/{ => core}/cec-pin-error-inj.c | 0 drivers/media/cec/{ => core}/cec-pin-priv.h | 0 drivers/media/cec/{ => core}/cec-pin.c | 0 drivers/media/cec/{ => core}/cec-priv.h | 0 10 files changed, 17 insertions(+), 15 deletions(-) create mode 100644 drivers/media/cec/core/Makefile rename drivers/media/cec/{ => core}/cec-adap.c (100%) rename drivers/media/cec/{ => core}/cec-api.c (100%) rename drivers/media/cec/{ => core}/cec-core.c (100%) rename drivers/media/cec/{ => core}/cec-notifier.c (100%) rename drivers/media/cec/{ => core}/cec-pin-error-inj.c (100%) rename drivers/media/cec/{ => core}/cec-pin-priv.h (100%) rename drivers/media/cec/{ => core}/cec-pin.c (100%) rename drivers/media/cec/{ => core}/cec-priv.h (100%) diff --git a/drivers/media/cec/Makefile b/drivers/media/cec/Makefile index ad8677d8c8967..3fdbc22b15304 100644 --- a/drivers/media/cec/Makefile +++ b/drivers/media/cec/Makefile @@ -1,16 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -cec-objs := cec-core.o cec-adap.o cec-api.o - -ifeq ($(CONFIG_CEC_NOTIFIER),y) - cec-objs += cec-notifier.o -endif - -ifeq ($(CONFIG_CEC_PIN),y) - cec-objs += cec-pin.o -endif - -ifeq ($(CONFIG_CEC_PIN_ERROR_INJ),y) - cec-objs += cec-pin-error-inj.o -endif - -obj-$(CONFIG_CEC_CORE) += cec.o +obj-y += core/ diff --git a/drivers/media/cec/core/Makefile b/drivers/media/cec/core/Makefile new file mode 100644 index 0000000000000..ad8677d8c8967 --- /dev/null +++ b/drivers/media/cec/core/Makefile @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0 +cec-objs := cec-core.o cec-adap.o cec-api.o + +ifeq ($(CONFIG_CEC_NOTIFIER),y) + cec-objs += cec-notifier.o +endif + +ifeq ($(CONFIG_CEC_PIN),y) + cec-objs += cec-pin.o +endif + +ifeq ($(CONFIG_CEC_PIN_ERROR_INJ),y) + cec-objs += cec-pin-error-inj.o +endif + +obj-$(CONFIG_CEC_CORE) += cec.o diff --git a/drivers/media/cec/cec-adap.c b/drivers/media/cec/core/cec-adap.c similarity index 100% rename from drivers/media/cec/cec-adap.c rename to drivers/media/cec/core/cec-adap.c diff --git a/drivers/media/cec/cec-api.c b/drivers/media/cec/core/cec-api.c similarity index 100% rename from drivers/media/cec/cec-api.c rename to drivers/media/cec/core/cec-api.c diff --git a/drivers/media/cec/cec-core.c b/drivers/media/cec/core/cec-core.c similarity index 100% rename from drivers/media/cec/cec-core.c rename to drivers/media/cec/core/cec-core.c diff --git a/drivers/media/cec/cec-notifier.c b/drivers/media/cec/core/cec-notifier.c similarity index 100% rename from drivers/media/cec/cec-notifier.c rename to drivers/media/cec/core/cec-notifier.c diff --git a/drivers/media/cec/cec-pin-error-inj.c b/drivers/media/cec/core/cec-pin-error-inj.c similarity index 100% rename from drivers/media/cec/cec-pin-error-inj.c rename to drivers/media/cec/core/cec-pin-error-inj.c diff --git a/drivers/media/cec/cec-pin-priv.h b/drivers/media/cec/core/cec-pin-priv.h similarity index 100% rename from drivers/media/cec/cec-pin-priv.h rename to drivers/media/cec/core/cec-pin-priv.h diff --git a/drivers/media/cec/cec-pin.c b/drivers/media/cec/core/cec-pin.c similarity index 100% rename from drivers/media/cec/cec-pin.c rename to drivers/media/cec/core/cec-pin.c diff --git a/drivers/media/cec/cec-priv.h b/drivers/media/cec/core/cec-priv.h similarity index 100% rename from drivers/media/cec/cec-priv.h rename to drivers/media/cec/core/cec-priv.h -- GitLab From 46d2a3b964ddbe63605dab502c847180b1efbfb2 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 09:55:10 +0200 Subject: [PATCH 138/503] media: place CEC menu before MEDIA_SUPPORT The only item that opens at the CEC Kconfig menu is related to Remote Controller. Also, its support should not depend on media support, so it makes sense to keep both RC and CEC together. After this change, the main media menus that are visible under "Device Drivers" menu are: <*> Remote Controller support ---> [ ] HDMI CEC RC integration (NEW) < > HDMI CEC drivers Multimedia support ---> Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 30 ++---------------------------- drivers/media/cec/Kconfig | 20 ++++++++++++++++++++ 2 files changed, 22 insertions(+), 28 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index e8bd354a0f754..8694e3c6d1833 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -4,19 +4,10 @@ # # -# NOTE: Those symbols can't depend on MEDIA_SUPPORT, as it would cause -# unmatched dependencies +# NOTE: CEC and Remote Controller support should not depend on MEDIA_SUPPORT # -config CEC_CORE - tristate - -config CEC_NOTIFIER - bool - -config CEC_PIN - bool - source "drivers/media/rc/Kconfig" +source "drivers/media/cec/Kconfig" menuconfig MEDIA_SUPPORT tristate "Multimedia support" @@ -132,17 +123,6 @@ config MEDIA_SDR_SUPPORT Say Y when you have a software defined radio device. -config MEDIA_CEC_SUPPORT - bool - prompt "HDMI CEC support" if MEDIA_SUPPORT_FILTER - default y if !MEDIA_SUPPORT_FILTER - help - Enable support for HDMI CEC (Consumer Electronics Control), - which is an optional HDMI feature. - - Say Y when you have an HDMI receiver, transmitter or a USB CEC - adapter that supports HDMI CEC. - config MEDIA_PLATFORM_SUPPORT bool prompt "Platform-specific devices" if MEDIA_SUPPORT_FILTER @@ -232,12 +212,6 @@ menu "Digital TV options" source "drivers/media/dvb-core/Kconfig" endmenu -menu "HDMI CEC options" - visible if CEC_CORE - -source "drivers/media/cec/Kconfig" -endmenu - menu "Media drivers" comment "Drivers filtered as selected at 'Filter media drivers'" diff --git a/drivers/media/cec/Kconfig b/drivers/media/cec/Kconfig index c01919713ab95..1586dd899302f 100644 --- a/drivers/media/cec/Kconfig +++ b/drivers/media/cec/Kconfig @@ -1,4 +1,13 @@ # SPDX-License-Identifier: GPL-2.0-only +config CEC_CORE + tristate + +config CEC_NOTIFIER + bool + +config CEC_PIN + bool + config MEDIA_CEC_RC bool "HDMI CEC RC integration" depends on CEC_CORE && RC_CORE @@ -11,3 +20,14 @@ config CEC_PIN_ERROR_INJ depends on CEC_PIN && DEBUG_FS help This option enables CEC error injection using debugfs. + +config MEDIA_CEC_SUPPORT + bool + prompt "HDMI CEC drivers" + default y if !MEDIA_SUPPORT_FILTER + help + Enable support for HDMI CEC (Consumer Electronics Control), + which is an optional HDMI feature. + + Say Y when you have an HDMI receiver, transmitter or a USB CEC + adapter that supports HDMI CEC. -- GitLab From 4be5e8648b0c287aefc6ac3f3a0b12c696054f43 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 11:03:40 +0200 Subject: [PATCH 139/503] media: move CEC platform drivers to a separate directory As CEC support doesn't depend on MEDIA_SUPPORT, let's place the platform drivers outside the media menu. As a side effect, instead of depends on PCI, seco driver can select it (and DMI). Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/cec/Kconfig | 6 +- drivers/media/cec/Makefile | 2 +- drivers/media/cec/platform/Kconfig | 121 +++++++++++++++++ drivers/media/cec/platform/Makefile | 14 ++ .../{ => cec}/platform/cec-gpio/Makefile | 0 .../{ => cec}/platform/cec-gpio/cec-gpio.c | 0 .../platform/cros-ec}/Makefile | 0 .../platform/cros-ec}/cros-ec-cec.c | 0 .../media/{ => cec}/platform/meson/Makefile | 0 .../{ => cec}/platform/meson/ao-cec-g12a.c | 0 .../media/{ => cec}/platform/meson/ao-cec.c | 0 .../s5p-cec => cec/platform/s5p}/Makefile | 0 .../platform/s5p}/exynos_hdmi_cec.h | 0 .../platform/s5p}/exynos_hdmi_cecctrl.c | 0 .../s5p-cec => cec/platform/s5p}/regs-cec.h | 0 .../s5p-cec => cec/platform/s5p}/s5p_cec.c | 0 .../s5p-cec => cec/platform/s5p}/s5p_cec.h | 0 .../seco-cec => cec/platform/seco}/Makefile | 0 .../seco-cec => cec/platform/seco}/seco-cec.c | 0 .../seco-cec => cec/platform/seco}/seco-cec.h | 0 .../sti/cec => cec/platform/sti}/Makefile | 0 .../sti/cec => cec/platform/sti}/stih-cec.c | 0 drivers/media/cec/platform/stm32/Makefile | 2 + .../{ => cec}/platform/stm32/stm32-cec.c | 0 .../tegra-cec => cec/platform/tegra}/Makefile | 0 .../platform/tegra}/tegra_cec.c | 0 .../platform/tegra}/tegra_cec.h | 0 drivers/media/platform/Kconfig | 125 ------------------ drivers/media/platform/Makefile | 12 -- drivers/media/platform/stm32/Makefile | 1 - 30 files changed, 143 insertions(+), 140 deletions(-) create mode 100644 drivers/media/cec/platform/Kconfig create mode 100644 drivers/media/cec/platform/Makefile rename drivers/media/{ => cec}/platform/cec-gpio/Makefile (100%) rename drivers/media/{ => cec}/platform/cec-gpio/cec-gpio.c (100%) rename drivers/media/{platform/cros-ec-cec => cec/platform/cros-ec}/Makefile (100%) rename drivers/media/{platform/cros-ec-cec => cec/platform/cros-ec}/cros-ec-cec.c (100%) rename drivers/media/{ => cec}/platform/meson/Makefile (100%) rename drivers/media/{ => cec}/platform/meson/ao-cec-g12a.c (100%) rename drivers/media/{ => cec}/platform/meson/ao-cec.c (100%) rename drivers/media/{platform/s5p-cec => cec/platform/s5p}/Makefile (100%) rename drivers/media/{platform/s5p-cec => cec/platform/s5p}/exynos_hdmi_cec.h (100%) rename drivers/media/{platform/s5p-cec => cec/platform/s5p}/exynos_hdmi_cecctrl.c (100%) rename drivers/media/{platform/s5p-cec => cec/platform/s5p}/regs-cec.h (100%) rename drivers/media/{platform/s5p-cec => cec/platform/s5p}/s5p_cec.c (100%) rename drivers/media/{platform/s5p-cec => cec/platform/s5p}/s5p_cec.h (100%) rename drivers/media/{platform/seco-cec => cec/platform/seco}/Makefile (100%) rename drivers/media/{platform/seco-cec => cec/platform/seco}/seco-cec.c (100%) rename drivers/media/{platform/seco-cec => cec/platform/seco}/seco-cec.h (100%) rename drivers/media/{platform/sti/cec => cec/platform/sti}/Makefile (100%) rename drivers/media/{platform/sti/cec => cec/platform/sti}/stih-cec.c (100%) create mode 100644 drivers/media/cec/platform/stm32/Makefile rename drivers/media/{ => cec}/platform/stm32/stm32-cec.c (100%) rename drivers/media/{platform/tegra-cec => cec/platform/tegra}/Makefile (100%) rename drivers/media/{platform/tegra-cec => cec/platform/tegra}/tegra_cec.c (100%) rename drivers/media/{platform/tegra-cec => cec/platform/tegra}/tegra_cec.h (100%) diff --git a/drivers/media/cec/Kconfig b/drivers/media/cec/Kconfig index 1586dd899302f..7b1fb70066bdd 100644 --- a/drivers/media/cec/Kconfig +++ b/drivers/media/cec/Kconfig @@ -21,7 +21,7 @@ config CEC_PIN_ERROR_INJ help This option enables CEC error injection using debugfs. -config MEDIA_CEC_SUPPORT +menuconfig MEDIA_CEC_SUPPORT bool prompt "HDMI CEC drivers" default y if !MEDIA_SUPPORT_FILTER @@ -31,3 +31,7 @@ config MEDIA_CEC_SUPPORT Say Y when you have an HDMI receiver, transmitter or a USB CEC adapter that supports HDMI CEC. + +if MEDIA_CEC_SUPPORT +source "drivers/media/cec/platform/Kconfig" +endif diff --git a/drivers/media/cec/Makefile b/drivers/media/cec/Makefile index 3fdbc22b15304..8c6448bee386b 100644 --- a/drivers/media/cec/Makefile +++ b/drivers/media/cec/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += core/ +obj-y += core/ platform/ diff --git a/drivers/media/cec/platform/Kconfig b/drivers/media/cec/platform/Kconfig new file mode 100644 index 0000000000000..6a8bb8b68344a --- /dev/null +++ b/drivers/media/cec/platform/Kconfig @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Platform drivers + +config VIDEO_CROS_EC_CEC + tristate "ChromeOS EC CEC driver" + depends on CROS_EC + select CEC_CORE + select CEC_NOTIFIER + select CROS_EC_PROTO + help + If you say yes here you will get support for the + ChromeOS Embedded Controller's CEC. + The CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config VIDEO_MESON_AO_CEC + tristate "Amlogic Meson AO CEC driver" + depends on ARCH_MESON || COMPILE_TEST + select CEC_CORE + select CEC_NOTIFIER + help + This is a driver for Amlogic Meson SoCs AO CEC interface. It uses the + generic CEC framework interface. + CEC bus is present in the HDMI connector and enables communication + +config VIDEO_MESON_G12A_AO_CEC + tristate "Amlogic Meson G12A AO CEC driver" + depends on ARCH_MESON || COMPILE_TEST + depends on COMMON_CLK && OF + select REGMAP + select REGMAP_MMIO + select CEC_CORE + select CEC_NOTIFIER + ---help--- + This is a driver for Amlogic Meson G12A SoCs AO CEC interface. + This driver if for the new AO-CEC module found in G12A SoCs, + usually named AO_CEC_B in documentation. + It uses the generic CEC framework interface. + CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config CEC_GPIO + tristate "Generic GPIO-based CEC driver" + depends on PREEMPTION || COMPILE_TEST + select CEC_CORE + select CEC_PIN + select CEC_NOTIFIER + select GPIOLIB + help + This is a generic GPIO-based CEC driver. + The CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config VIDEO_SAMSUNG_S5P_CEC + tristate "Samsung S5P CEC driver" + depends on ARCH_EXYNOS || COMPILE_TEST + select CEC_CORE + select CEC_NOTIFIER + help + This is a driver for Samsung S5P HDMI CEC interface. It uses the + generic CEC framework interface. + CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config VIDEO_STI_HDMI_CEC + tristate "STMicroelectronics STiH4xx HDMI CEC driver" + depends on ARCH_STI || COMPILE_TEST + select CEC_CORE + select CEC_NOTIFIER + help + This is a driver for STIH4xx HDMI CEC interface. It uses the + generic CEC framework interface. + CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config VIDEO_STM32_HDMI_CEC + tristate "STMicroelectronics STM32 HDMI CEC driver" + depends on ARCH_STM32 || COMPILE_TEST + select REGMAP + select REGMAP_MMIO + select CEC_CORE + help + This is a driver for STM32 interface. It uses the + generic CEC framework interface. + CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config VIDEO_TEGRA_HDMI_CEC + tristate "Tegra HDMI CEC driver" + depends on ARCH_TEGRA || COMPILE_TEST + select CEC_CORE + select CEC_NOTIFIER + help + This is a driver for the Tegra HDMI CEC interface. It uses the + generic CEC framework interface. + The CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config VIDEO_SECO_CEC + tristate "SECO Boards HDMI CEC driver" + depends on (X86 || IA64) || COMPILE_TEST + select PCI + select DMI + select CEC_CORE + select CEC_NOTIFIER + help + This is a driver for SECO Boards integrated CEC interface. + Selecting it will enable support for this device. + CEC bus is present in the HDMI connector and enables communication + between compatible devices. + +config VIDEO_SECO_RC + bool "SECO Boards IR RC5 support" + depends on VIDEO_SECO_CEC + depends on RC_CORE=y || RC_CORE = VIDEO_SECO_CEC + help + If you say yes here you will get support for the + SECO Boards Consumer-IR in seco-cec driver. + The embedded controller supports RC5 protocol only, default mapping + is set to rc-hauppauge. diff --git a/drivers/media/cec/platform/Makefile b/drivers/media/cec/platform/Makefile new file mode 100644 index 0000000000000..e5fb5d383e5c5 --- /dev/null +++ b/drivers/media/cec/platform/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the CEC platform device drivers. +# + +obj-$(CONFIG_CEC_GPIO) += cec-gpio/ + +obj-$(CONFIG_VIDEO_CROS_EC_CEC) += cros-ec/ +obj-$(CONFIG_VIDEO_MESON_AO_CEC) += meson/ +obj-$(CONFIG_VIDEO_SAMSUNG_S5P_CEC) += s5p/ +obj-$(CONFIG_VIDEO_SECO_CEC) += seco/ +obj-$(CONFIG_VIDEO_STI_HDMI_CEC) += sti/ +obj-$(CONFIG_VIDEO_TEGRA_HDMI_CEC) += tegra/ + diff --git a/drivers/media/platform/cec-gpio/Makefile b/drivers/media/cec/platform/cec-gpio/Makefile similarity index 100% rename from drivers/media/platform/cec-gpio/Makefile rename to drivers/media/cec/platform/cec-gpio/Makefile diff --git a/drivers/media/platform/cec-gpio/cec-gpio.c b/drivers/media/cec/platform/cec-gpio/cec-gpio.c similarity index 100% rename from drivers/media/platform/cec-gpio/cec-gpio.c rename to drivers/media/cec/platform/cec-gpio/cec-gpio.c diff --git a/drivers/media/platform/cros-ec-cec/Makefile b/drivers/media/cec/platform/cros-ec/Makefile similarity index 100% rename from drivers/media/platform/cros-ec-cec/Makefile rename to drivers/media/cec/platform/cros-ec/Makefile diff --git a/drivers/media/platform/cros-ec-cec/cros-ec-cec.c b/drivers/media/cec/platform/cros-ec/cros-ec-cec.c similarity index 100% rename from drivers/media/platform/cros-ec-cec/cros-ec-cec.c rename to drivers/media/cec/platform/cros-ec/cros-ec-cec.c diff --git a/drivers/media/platform/meson/Makefile b/drivers/media/cec/platform/meson/Makefile similarity index 100% rename from drivers/media/platform/meson/Makefile rename to drivers/media/cec/platform/meson/Makefile diff --git a/drivers/media/platform/meson/ao-cec-g12a.c b/drivers/media/cec/platform/meson/ao-cec-g12a.c similarity index 100% rename from drivers/media/platform/meson/ao-cec-g12a.c rename to drivers/media/cec/platform/meson/ao-cec-g12a.c diff --git a/drivers/media/platform/meson/ao-cec.c b/drivers/media/cec/platform/meson/ao-cec.c similarity index 100% rename from drivers/media/platform/meson/ao-cec.c rename to drivers/media/cec/platform/meson/ao-cec.c diff --git a/drivers/media/platform/s5p-cec/Makefile b/drivers/media/cec/platform/s5p/Makefile similarity index 100% rename from drivers/media/platform/s5p-cec/Makefile rename to drivers/media/cec/platform/s5p/Makefile diff --git a/drivers/media/platform/s5p-cec/exynos_hdmi_cec.h b/drivers/media/cec/platform/s5p/exynos_hdmi_cec.h similarity index 100% rename from drivers/media/platform/s5p-cec/exynos_hdmi_cec.h rename to drivers/media/cec/platform/s5p/exynos_hdmi_cec.h diff --git a/drivers/media/platform/s5p-cec/exynos_hdmi_cecctrl.c b/drivers/media/cec/platform/s5p/exynos_hdmi_cecctrl.c similarity index 100% rename from drivers/media/platform/s5p-cec/exynos_hdmi_cecctrl.c rename to drivers/media/cec/platform/s5p/exynos_hdmi_cecctrl.c diff --git a/drivers/media/platform/s5p-cec/regs-cec.h b/drivers/media/cec/platform/s5p/regs-cec.h similarity index 100% rename from drivers/media/platform/s5p-cec/regs-cec.h rename to drivers/media/cec/platform/s5p/regs-cec.h diff --git a/drivers/media/platform/s5p-cec/s5p_cec.c b/drivers/media/cec/platform/s5p/s5p_cec.c similarity index 100% rename from drivers/media/platform/s5p-cec/s5p_cec.c rename to drivers/media/cec/platform/s5p/s5p_cec.c diff --git a/drivers/media/platform/s5p-cec/s5p_cec.h b/drivers/media/cec/platform/s5p/s5p_cec.h similarity index 100% rename from drivers/media/platform/s5p-cec/s5p_cec.h rename to drivers/media/cec/platform/s5p/s5p_cec.h diff --git a/drivers/media/platform/seco-cec/Makefile b/drivers/media/cec/platform/seco/Makefile similarity index 100% rename from drivers/media/platform/seco-cec/Makefile rename to drivers/media/cec/platform/seco/Makefile diff --git a/drivers/media/platform/seco-cec/seco-cec.c b/drivers/media/cec/platform/seco/seco-cec.c similarity index 100% rename from drivers/media/platform/seco-cec/seco-cec.c rename to drivers/media/cec/platform/seco/seco-cec.c diff --git a/drivers/media/platform/seco-cec/seco-cec.h b/drivers/media/cec/platform/seco/seco-cec.h similarity index 100% rename from drivers/media/platform/seco-cec/seco-cec.h rename to drivers/media/cec/platform/seco/seco-cec.h diff --git a/drivers/media/platform/sti/cec/Makefile b/drivers/media/cec/platform/sti/Makefile similarity index 100% rename from drivers/media/platform/sti/cec/Makefile rename to drivers/media/cec/platform/sti/Makefile diff --git a/drivers/media/platform/sti/cec/stih-cec.c b/drivers/media/cec/platform/sti/stih-cec.c similarity index 100% rename from drivers/media/platform/sti/cec/stih-cec.c rename to drivers/media/cec/platform/sti/stih-cec.c diff --git a/drivers/media/cec/platform/stm32/Makefile b/drivers/media/cec/platform/stm32/Makefile new file mode 100644 index 0000000000000..5c89dbce0f678 --- /dev/null +++ b/drivers/media/cec/platform/stm32/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_VIDEO_STM32_HDMI_CEC) += stm32-cec.o diff --git a/drivers/media/platform/stm32/stm32-cec.c b/drivers/media/cec/platform/stm32/stm32-cec.c similarity index 100% rename from drivers/media/platform/stm32/stm32-cec.c rename to drivers/media/cec/platform/stm32/stm32-cec.c diff --git a/drivers/media/platform/tegra-cec/Makefile b/drivers/media/cec/platform/tegra/Makefile similarity index 100% rename from drivers/media/platform/tegra-cec/Makefile rename to drivers/media/cec/platform/tegra/Makefile diff --git a/drivers/media/platform/tegra-cec/tegra_cec.c b/drivers/media/cec/platform/tegra/tegra_cec.c similarity index 100% rename from drivers/media/platform/tegra-cec/tegra_cec.c rename to drivers/media/cec/platform/tegra/tegra_cec.c diff --git a/drivers/media/platform/tegra-cec/tegra_cec.h b/drivers/media/cec/platform/tegra/tegra_cec.h similarity index 100% rename from drivers/media/platform/tegra-cec/tegra_cec.h rename to drivers/media/cec/platform/tegra/tegra_cec.h diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 3df0d789d452b..b1ac9c6c9cdbc 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -552,131 +552,6 @@ if DVB_PLATFORM_DRIVERS source "drivers/media/platform/sti/c8sectpfe/Kconfig" endif #DVB_PLATFORM_DRIVERS -menuconfig CEC_PLATFORM_DRIVERS - bool "CEC platform devices" - depends on MEDIA_CEC_SUPPORT - -if CEC_PLATFORM_DRIVERS - -config VIDEO_CROS_EC_CEC - tristate "ChromeOS EC CEC driver" - depends on CROS_EC - select CEC_CORE - select CEC_NOTIFIER - select CROS_EC_PROTO - help - If you say yes here you will get support for the - ChromeOS Embedded Controller's CEC. - The CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config VIDEO_MESON_AO_CEC - tristate "Amlogic Meson AO CEC driver" - depends on ARCH_MESON || COMPILE_TEST - select CEC_CORE - select CEC_NOTIFIER - help - This is a driver for Amlogic Meson SoCs AO CEC interface. It uses the - generic CEC framework interface. - CEC bus is present in the HDMI connector and enables communication - -config VIDEO_MESON_G12A_AO_CEC - tristate "Amlogic Meson G12A AO CEC driver" - depends on ARCH_MESON || COMPILE_TEST - depends on COMMON_CLK && OF - select REGMAP - select REGMAP_MMIO - select CEC_CORE - select CEC_NOTIFIER - ---help--- - This is a driver for Amlogic Meson G12A SoCs AO CEC interface. - This driver if for the new AO-CEC module found in G12A SoCs, - usually named AO_CEC_B in documentation. - It uses the generic CEC framework interface. - CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config CEC_GPIO - tristate "Generic GPIO-based CEC driver" - depends on PREEMPTION || COMPILE_TEST - select CEC_CORE - select CEC_PIN - select CEC_NOTIFIER - select GPIOLIB - help - This is a generic GPIO-based CEC driver. - The CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config VIDEO_SAMSUNG_S5P_CEC - tristate "Samsung S5P CEC driver" - depends on ARCH_EXYNOS || COMPILE_TEST - select CEC_CORE - select CEC_NOTIFIER - help - This is a driver for Samsung S5P HDMI CEC interface. It uses the - generic CEC framework interface. - CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config VIDEO_STI_HDMI_CEC - tristate "STMicroelectronics STiH4xx HDMI CEC driver" - depends on ARCH_STI || COMPILE_TEST - select CEC_CORE - select CEC_NOTIFIER - help - This is a driver for STIH4xx HDMI CEC interface. It uses the - generic CEC framework interface. - CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config VIDEO_STM32_HDMI_CEC - tristate "STMicroelectronics STM32 HDMI CEC driver" - depends on ARCH_STM32 || COMPILE_TEST - select REGMAP - select REGMAP_MMIO - select CEC_CORE - help - This is a driver for STM32 interface. It uses the - generic CEC framework interface. - CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config VIDEO_TEGRA_HDMI_CEC - tristate "Tegra HDMI CEC driver" - depends on ARCH_TEGRA || COMPILE_TEST - select CEC_CORE - select CEC_NOTIFIER - help - This is a driver for the Tegra HDMI CEC interface. It uses the - generic CEC framework interface. - The CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config VIDEO_SECO_CEC - tristate "SECO Boards HDMI CEC driver" - depends on (X86 || IA64) || COMPILE_TEST - depends on PCI && DMI - select CEC_CORE - select CEC_NOTIFIER - help - This is a driver for SECO Boards integrated CEC interface. - Selecting it will enable support for this device. - CEC bus is present in the HDMI connector and enables communication - between compatible devices. - -config VIDEO_SECO_RC - bool "SECO Boards IR RC5 support" - depends on VIDEO_SECO_CEC - depends on RC_CORE=y || RC_CORE = VIDEO_SECO_CEC - help - If you say yes here you will get support for the - SECO Boards Consumer-IR in seco-cec driver. - The embedded controller supports RC5 protocol only, default mapping - is set to rc-hauppauge. - -endif #CEC_PLATFORM_DRIVERS - menuconfig SDR_PLATFORM_DRIVERS bool "SDR platform devices" depends on MEDIA_SDR_SUPPORT diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index a0194ef1211fe..ac31d47488699 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -23,8 +23,6 @@ obj-$(CONFIG_VIDEO_IMX_PXP) += imx-pxp.o obj-$(CONFIG_VIDEO_SH_VEU) += sh_veu.o -obj-$(CONFIG_CEC_GPIO) += cec-gpio/ - obj-$(CONFIG_VIDEO_MEM2MEM_DEINTERLACE) += m2m-deinterlace.o obj-$(CONFIG_VIDEO_MUX) += video-mux.o @@ -35,22 +33,16 @@ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_JPEG) += s5p-jpeg/ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_MFC) += s5p-mfc/ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_G2D) += s5p-g2d/ -obj-$(CONFIG_VIDEO_SAMSUNG_S5P_CEC) += s5p-cec/ obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC) += exynos-gsc/ obj-$(CONFIG_VIDEO_STI_BDISP) += sti/bdisp/ obj-$(CONFIG_VIDEO_STI_HVA) += sti/hva/ obj-$(CONFIG_DVB_C8SECTPFE) += sti/c8sectpfe/ -obj-$(CONFIG_VIDEO_STI_HDMI_CEC) += sti/cec/ obj-$(CONFIG_VIDEO_STI_DELTA) += sti/delta/ -obj-$(CONFIG_VIDEO_TEGRA_HDMI_CEC) += tegra-cec/ - obj-y += stm32/ -obj-$(CONFIG_VIDEO_SECO_CEC) += seco-cec/ - obj-y += davinci/ obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o @@ -89,8 +81,4 @@ obj-$(CONFIG_VIDEO_QCOM_CAMSS) += qcom/camss/ obj-$(CONFIG_VIDEO_QCOM_VENUS) += qcom/venus/ -obj-y += meson/ - -obj-y += cros-ec-cec/ - obj-y += sunxi/ diff --git a/drivers/media/platform/stm32/Makefile b/drivers/media/platform/stm32/Makefile index 5ed73599ca44c..48b36db2c2e21 100644 --- a/drivers/media/platform/stm32/Makefile +++ b/drivers/media/platform/stm32/Makefile @@ -1,3 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_VIDEO_STM32_DCMI) += stm32-dcmi.o -obj-$(CONFIG_VIDEO_STM32_HDMI_CEC) += stm32-cec.o -- GitLab From a81068181aad78a5f6980408a4b6115d22bb8aed Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 11:14:25 +0200 Subject: [PATCH 140/503] media: move CEC USB drivers to a separate directory As CEC support doesn't depend on MEDIA_SUPPORT, let's place the platform drivers outside the media menu. As a side effect, instead of depends on USB, drivers just select it. Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/cec/Kconfig | 1 + drivers/media/cec/Makefile | 2 +- drivers/media/cec/usb/Kconfig | 6 ++++++ drivers/media/cec/usb/Makefile | 6 ++++++ drivers/media/{usb/pulse8-cec => cec/usb/pulse8}/Kconfig | 3 ++- drivers/media/{usb/pulse8-cec => cec/usb/pulse8}/Makefile | 0 .../media/{usb/pulse8-cec => cec/usb/pulse8}/pulse8-cec.c | 0 .../{usb/rainshadow-cec => cec/usb/rainshadow}/Kconfig | 3 ++- .../{usb/rainshadow-cec => cec/usb/rainshadow}/Makefile | 0 .../rainshadow-cec => cec/usb/rainshadow}/rainshadow-cec.c | 0 drivers/media/usb/Kconfig | 6 ------ drivers/media/usb/Makefile | 2 -- 12 files changed, 18 insertions(+), 11 deletions(-) create mode 100644 drivers/media/cec/usb/Kconfig create mode 100644 drivers/media/cec/usb/Makefile rename drivers/media/{usb/pulse8-cec => cec/usb/pulse8}/Kconfig (91%) rename drivers/media/{usb/pulse8-cec => cec/usb/pulse8}/Makefile (100%) rename drivers/media/{usb/pulse8-cec => cec/usb/pulse8}/pulse8-cec.c (100%) rename drivers/media/{usb/rainshadow-cec => cec/usb/rainshadow}/Kconfig (92%) rename drivers/media/{usb/rainshadow-cec => cec/usb/rainshadow}/Makefile (100%) rename drivers/media/{usb/rainshadow-cec => cec/usb/rainshadow}/rainshadow-cec.c (100%) diff --git a/drivers/media/cec/Kconfig b/drivers/media/cec/Kconfig index 7b1fb70066bdd..eea74b7cfa8c5 100644 --- a/drivers/media/cec/Kconfig +++ b/drivers/media/cec/Kconfig @@ -34,4 +34,5 @@ menuconfig MEDIA_CEC_SUPPORT if MEDIA_CEC_SUPPORT source "drivers/media/cec/platform/Kconfig" +source "drivers/media/cec/usb/Kconfig" endif diff --git a/drivers/media/cec/Makefile b/drivers/media/cec/Makefile index 8c6448bee386b..74e80e1b3571e 100644 --- a/drivers/media/cec/Makefile +++ b/drivers/media/cec/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += core/ platform/ +obj-y += core/ platform/ usb/ diff --git a/drivers/media/cec/usb/Kconfig b/drivers/media/cec/usb/Kconfig new file mode 100644 index 0000000000000..d3bbef464bdb5 --- /dev/null +++ b/drivers/media/cec/usb/Kconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# USB drivers + +source "drivers/media/cec/usb/pulse8/Kconfig" +source "drivers/media/cec/usb/rainshadow/Kconfig" diff --git a/drivers/media/cec/usb/Makefile b/drivers/media/cec/usb/Makefile new file mode 100644 index 0000000000000..e4183d1bfa9ac --- /dev/null +++ b/drivers/media/cec/usb/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the CEC USB device drivers. +# +obj-$(CONFIG_USB_PULSE8_CEC) += pulse8/ +obj-$(CONFIG_USB_RAINSHADOW_CEC) += rainshadow/ diff --git a/drivers/media/usb/pulse8-cec/Kconfig b/drivers/media/cec/usb/pulse8/Kconfig similarity index 91% rename from drivers/media/usb/pulse8-cec/Kconfig rename to drivers/media/cec/usb/pulse8/Kconfig index e802d30dbbeec..a0224ef80e6cb 100644 --- a/drivers/media/usb/pulse8-cec/Kconfig +++ b/drivers/media/cec/usb/pulse8/Kconfig @@ -1,8 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config USB_PULSE8_CEC tristate "Pulse Eight HDMI CEC" - depends on USB_ACM select CEC_CORE + select USB + select USB_ACM select SERIO select SERIO_SERPORT help diff --git a/drivers/media/usb/pulse8-cec/Makefile b/drivers/media/cec/usb/pulse8/Makefile similarity index 100% rename from drivers/media/usb/pulse8-cec/Makefile rename to drivers/media/cec/usb/pulse8/Makefile diff --git a/drivers/media/usb/pulse8-cec/pulse8-cec.c b/drivers/media/cec/usb/pulse8/pulse8-cec.c similarity index 100% rename from drivers/media/usb/pulse8-cec/pulse8-cec.c rename to drivers/media/cec/usb/pulse8/pulse8-cec.c diff --git a/drivers/media/usb/rainshadow-cec/Kconfig b/drivers/media/cec/usb/rainshadow/Kconfig similarity index 92% rename from drivers/media/usb/rainshadow-cec/Kconfig rename to drivers/media/cec/usb/rainshadow/Kconfig index b481c5157d7ec..c9ef2c192b179 100644 --- a/drivers/media/usb/rainshadow-cec/Kconfig +++ b/drivers/media/cec/usb/rainshadow/Kconfig @@ -1,8 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config USB_RAINSHADOW_CEC tristate "RainShadow Tech HDMI CEC" - depends on USB_ACM select CEC_CORE + select USB + select USB_ACM select SERIO select SERIO_SERPORT help diff --git a/drivers/media/usb/rainshadow-cec/Makefile b/drivers/media/cec/usb/rainshadow/Makefile similarity index 100% rename from drivers/media/usb/rainshadow-cec/Makefile rename to drivers/media/cec/usb/rainshadow/Makefile diff --git a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c b/drivers/media/cec/usb/rainshadow/rainshadow-cec.c similarity index 100% rename from drivers/media/usb/rainshadow-cec/rainshadow-cec.c rename to drivers/media/cec/usb/rainshadow/rainshadow-cec.c diff --git a/drivers/media/usb/Kconfig b/drivers/media/usb/Kconfig index bf08393e38d16..00feadb217d8c 100644 --- a/drivers/media/usb/Kconfig +++ b/drivers/media/usb/Kconfig @@ -66,11 +66,5 @@ source "drivers/media/usb/hackrf/Kconfig" source "drivers/media/usb/msi2500/Kconfig" endif -if MEDIA_CEC_SUPPORT - comment "USB HDMI CEC adapters" -source "drivers/media/usb/pulse8-cec/Kconfig" -source "drivers/media/usb/rainshadow-cec/Kconfig" -endif - endif #MEDIA_USB_SUPPORT endif #USB diff --git a/drivers/media/usb/Makefile b/drivers/media/usb/Makefile index 169aa07c97bde..3eaff3149ef41 100644 --- a/drivers/media/usb/Makefile +++ b/drivers/media/usb/Makefile @@ -24,5 +24,3 @@ obj-$(CONFIG_VIDEO_EM28XX) += em28xx/ obj-$(CONFIG_VIDEO_USBTV) += usbtv/ obj-$(CONFIG_VIDEO_GO7007) += go7007/ obj-$(CONFIG_DVB_AS102) += as102/ -obj-$(CONFIG_USB_PULSE8_CEC) += pulse8-cec/ -obj-$(CONFIG_USB_RAINSHADOW_CEC) += rainshadow-cec/ -- GitLab From df823a8208c434eee6e4e9aa016c956d0968e2e2 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 12:12:29 +0200 Subject: [PATCH 141/503] media: cec: rename CEC platform drivers config options Most CEC platform drivers are using VIDEO_*_CEC pattern, some with an _HDMI extension too. Well, they're not related to V4L2 support, and we don't really need those big config names. So drop VIDEO_* from them, remove _HDMI (if present) and move CEC to the start. This way, all platform driver options are now CEC_. Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- arch/arm/configs/exynos_defconfig | 2 +- arch/arm/configs/multi_v7_defconfig | 2 +- drivers/media/cec/platform/Kconfig | 22 ++++++++++----------- drivers/media/cec/platform/Makefile | 16 +++++++-------- drivers/media/cec/platform/cros-ec/Makefile | 2 +- drivers/media/cec/platform/meson/Makefile | 4 ++-- drivers/media/cec/platform/s5p/Makefile | 2 +- drivers/media/cec/platform/seco/Makefile | 2 +- drivers/media/cec/platform/seco/seco-cec.c | 2 +- drivers/media/cec/platform/sti/Makefile | 2 +- drivers/media/cec/platform/stm32/Makefile | 2 +- drivers/media/cec/platform/tegra/Makefile | 2 +- 12 files changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 3c3a00fc71f60..2c779ac13270a 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -207,7 +207,7 @@ CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m CONFIG_V4L_TEST_DRIVERS=y CONFIG_VIDEO_VIVID=m CONFIG_CEC_PLATFORM_DRIVERS=y -CONFIG_VIDEO_SAMSUNG_S5P_CEC=m +CONFIG_CEC_SAMSUNG_S5P=m # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set CONFIG_VIDEO_S5K6A3=m CONFIG_VIDEO_S5C73M3=m diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index f8e45351c3f9f..9c86b1ab2f1d1 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -638,7 +638,7 @@ CONFIG_VIDEO_RENESAS_VSP1=m CONFIG_V4L_TEST_DRIVERS=y CONFIG_VIDEO_VIVID=m CONFIG_CEC_PLATFORM_DRIVERS=y -CONFIG_VIDEO_SAMSUNG_S5P_CEC=m +CONFIG_CEC_SAMSUNG_S5P=m CONFIG_VIDEO_ADV7180=m CONFIG_VIDEO_ML86V7667=m CONFIG_IMX_IPUV3_CORE=m diff --git a/drivers/media/cec/platform/Kconfig b/drivers/media/cec/platform/Kconfig index 6a8bb8b68344a..2c4dd7401dd8b 100644 --- a/drivers/media/cec/platform/Kconfig +++ b/drivers/media/cec/platform/Kconfig @@ -2,7 +2,7 @@ # # Platform drivers -config VIDEO_CROS_EC_CEC +config CEC_CROS_EC tristate "ChromeOS EC CEC driver" depends on CROS_EC select CEC_CORE @@ -14,7 +14,7 @@ config VIDEO_CROS_EC_CEC The CEC bus is present in the HDMI connector and enables communication between compatible devices. -config VIDEO_MESON_AO_CEC +config CEC_MESON_AO tristate "Amlogic Meson AO CEC driver" depends on ARCH_MESON || COMPILE_TEST select CEC_CORE @@ -24,7 +24,7 @@ config VIDEO_MESON_AO_CEC generic CEC framework interface. CEC bus is present in the HDMI connector and enables communication -config VIDEO_MESON_G12A_AO_CEC +config CEC_MESON_G12A_AO tristate "Amlogic Meson G12A AO CEC driver" depends on ARCH_MESON || COMPILE_TEST depends on COMMON_CLK && OF @@ -52,7 +52,7 @@ config CEC_GPIO The CEC bus is present in the HDMI connector and enables communication between compatible devices. -config VIDEO_SAMSUNG_S5P_CEC +config CEC_SAMSUNG_S5P tristate "Samsung S5P CEC driver" depends on ARCH_EXYNOS || COMPILE_TEST select CEC_CORE @@ -63,7 +63,7 @@ config VIDEO_SAMSUNG_S5P_CEC CEC bus is present in the HDMI connector and enables communication between compatible devices. -config VIDEO_STI_HDMI_CEC +config CEC_STI tristate "STMicroelectronics STiH4xx HDMI CEC driver" depends on ARCH_STI || COMPILE_TEST select CEC_CORE @@ -74,7 +74,7 @@ config VIDEO_STI_HDMI_CEC CEC bus is present in the HDMI connector and enables communication between compatible devices. -config VIDEO_STM32_HDMI_CEC +config CEC_STM32 tristate "STMicroelectronics STM32 HDMI CEC driver" depends on ARCH_STM32 || COMPILE_TEST select REGMAP @@ -86,7 +86,7 @@ config VIDEO_STM32_HDMI_CEC CEC bus is present in the HDMI connector and enables communication between compatible devices. -config VIDEO_TEGRA_HDMI_CEC +config CEC_TEGRA tristate "Tegra HDMI CEC driver" depends on ARCH_TEGRA || COMPILE_TEST select CEC_CORE @@ -97,7 +97,7 @@ config VIDEO_TEGRA_HDMI_CEC The CEC bus is present in the HDMI connector and enables communication between compatible devices. -config VIDEO_SECO_CEC +config CEC_SECO tristate "SECO Boards HDMI CEC driver" depends on (X86 || IA64) || COMPILE_TEST select PCI @@ -110,10 +110,10 @@ config VIDEO_SECO_CEC CEC bus is present in the HDMI connector and enables communication between compatible devices. -config VIDEO_SECO_RC +config CEC_SECO_RC bool "SECO Boards IR RC5 support" - depends on VIDEO_SECO_CEC - depends on RC_CORE=y || RC_CORE = VIDEO_SECO_CEC + depends on CEC_SECO + depends on RC_CORE=y || RC_CORE = CEC_SECO help If you say yes here you will get support for the SECO Boards Consumer-IR in seco-cec driver. diff --git a/drivers/media/cec/platform/Makefile b/drivers/media/cec/platform/Makefile index e5fb5d383e5c5..3a947159b25ac 100644 --- a/drivers/media/cec/platform/Makefile +++ b/drivers/media/cec/platform/Makefile @@ -3,12 +3,12 @@ # Makefile for the CEC platform device drivers. # -obj-$(CONFIG_CEC_GPIO) += cec-gpio/ - -obj-$(CONFIG_VIDEO_CROS_EC_CEC) += cros-ec/ -obj-$(CONFIG_VIDEO_MESON_AO_CEC) += meson/ -obj-$(CONFIG_VIDEO_SAMSUNG_S5P_CEC) += s5p/ -obj-$(CONFIG_VIDEO_SECO_CEC) += seco/ -obj-$(CONFIG_VIDEO_STI_HDMI_CEC) += sti/ -obj-$(CONFIG_VIDEO_TEGRA_HDMI_CEC) += tegra/ +# Please keep it in alphabetic order +obj-$(CONFIG_CEC_CROS_EC) += cros-ec/ +obj-$(CONFIG_CEC_GPIO) += cec-gpio/ +obj-$(CONFIG_CEC_MESON_AO) += meson/ +obj-$(CONFIG_CEC_SAMSUNG_S5P) += s5p/ +obj-$(CONFIG_CEC_SECO) += seco/ +obj-$(CONFIG_CEC_STI) += sti/ +obj-$(CONFIG_CEC_TEGRA) += tegra/ diff --git a/drivers/media/cec/platform/cros-ec/Makefile b/drivers/media/cec/platform/cros-ec/Makefile index 2615cdc6e2273..d7e3511078ef3 100644 --- a/drivers/media/cec/platform/cros-ec/Makefile +++ b/drivers/media/cec/platform/cros-ec/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_VIDEO_CROS_EC_CEC) += cros-ec-cec.o +obj-$(CONFIG_CEC_CROS_EC) += cros-ec-cec.o diff --git a/drivers/media/cec/platform/meson/Makefile b/drivers/media/cec/platform/meson/Makefile index 6bf728addbf8a..34fc5d444d0e0 100644 --- a/drivers/media/cec/platform/meson/Makefile +++ b/drivers/media/cec/platform/meson/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_VIDEO_MESON_AO_CEC) += ao-cec.o -obj-$(CONFIG_VIDEO_MESON_G12A_AO_CEC) += ao-cec-g12a.o +obj-$(CONFIG_CEC_MESON_AO) += ao-cec.o +obj-$(CONFIG_CEC_MESON_G12A_AO) += ao-cec-g12a.o diff --git a/drivers/media/cec/platform/s5p/Makefile b/drivers/media/cec/platform/s5p/Makefile index bd0103b91bee0..92bf7b8557c5a 100644 --- a/drivers/media/cec/platform/s5p/Makefile +++ b/drivers/media/cec/platform/s5p/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_VIDEO_SAMSUNG_S5P_CEC) += s5p-cec.o +obj-$(CONFIG_CEC_SAMSUNG_S5P) += s5p-cec.o s5p-cec-y += s5p_cec.o exynos_hdmi_cecctrl.o diff --git a/drivers/media/cec/platform/seco/Makefile b/drivers/media/cec/platform/seco/Makefile index 79fde6947ff2f..aa1ca8ccdb8ba 100644 --- a/drivers/media/cec/platform/seco/Makefile +++ b/drivers/media/cec/platform/seco/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_VIDEO_SECO_CEC) += seco-cec.o +obj-$(CONFIG_CEC_SECO) += seco-cec.o diff --git a/drivers/media/cec/platform/seco/seco-cec.c b/drivers/media/cec/platform/seco/seco-cec.c index 2ff62a488b277..075dd79beb6f2 100644 --- a/drivers/media/cec/platform/seco/seco-cec.c +++ b/drivers/media/cec/platform/seco/seco-cec.c @@ -343,7 +343,7 @@ static const struct cec_adap_ops secocec_cec_adap_ops = { .adap_transmit = secocec_adap_transmit, }; -#ifdef CONFIG_VIDEO_SECO_RC +#ifdef CONFIG_CEC_SECO_RC static int secocec_ir_probe(void *priv) { struct secocec_data *cec = priv; diff --git a/drivers/media/cec/platform/sti/Makefile b/drivers/media/cec/platform/sti/Makefile index d0c6b4ae94d63..26ec5ba1c6331 100644 --- a/drivers/media/cec/platform/sti/Makefile +++ b/drivers/media/cec/platform/sti/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_VIDEO_STI_HDMI_CEC) += stih-cec.o +obj-$(CONFIG_CEC_STI) += stih-cec.o diff --git a/drivers/media/cec/platform/stm32/Makefile b/drivers/media/cec/platform/stm32/Makefile index 5c89dbce0f678..b7597a00befa3 100644 --- a/drivers/media/cec/platform/stm32/Makefile +++ b/drivers/media/cec/platform/stm32/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_VIDEO_STM32_HDMI_CEC) += stm32-cec.o +obj-$(CONFIG_CEC_STM32) += stm32-cec.o diff --git a/drivers/media/cec/platform/tegra/Makefile b/drivers/media/cec/platform/tegra/Makefile index 97e57c7493c0f..275d1c019d493 100644 --- a/drivers/media/cec/platform/tegra/Makefile +++ b/drivers/media/cec/platform/tegra/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_VIDEO_TEGRA_HDMI_CEC) += tegra_cec.o +obj-$(CONFIG_CEC_TEGRA) += tegra_cec.o -- GitLab From ffb2e0082cfc77d01e44a9de965ae1adcbc48546 Mon Sep 17 00:00:00 2001 From: Guillaume Tucker Date: Wed, 15 Apr 2020 14:35:52 +0100 Subject: [PATCH 142/503] media: Kconfig: include test_drivers with MEDIA_TEST_SUPPORT Include test_drivers/Kconfig when MEDIA_TEST_SUPPORT is enabled rather than MEDIA_PLATFORM_SUPPORT. Test drivers should not depend on platform drivers to be enabled. Reported-by: "kernelci.org bot" Fixes: 4b32216adb010 ("media: split test drivers from platform directory") Signed-off-by: Guillaume Tucker Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 5 ++++- drivers/media/test_drivers/Kconfig | 4 ---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 8694e3c6d1833..ba24db7eb4d6d 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -226,10 +226,13 @@ source "drivers/media/common/Kconfig" if MEDIA_PLATFORM_SUPPORT source "drivers/media/platform/Kconfig" -source "drivers/media/test_drivers/Kconfig" source "drivers/media/mmc/Kconfig" endif +if MEDIA_TEST_SUPPORT +source "drivers/media/test_drivers/Kconfig" +endif + source "drivers/media/firewire/Kconfig" endmenu diff --git a/drivers/media/test_drivers/Kconfig b/drivers/media/test_drivers/Kconfig index 9f4a9cfbacc9c..e62abec030c30 100644 --- a/drivers/media/test_drivers/Kconfig +++ b/drivers/media/test_drivers/Kconfig @@ -1,7 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -if MEDIA_TEST_SUPPORT - menuconfig V4L_TEST_DRIVERS bool "V4L test drivers" depends on VIDEO_DEV @@ -24,5 +22,3 @@ config VIDEO_VIM2M source "drivers/media/test_drivers/vicodec/Kconfig" endif #V4L_TEST_DRIVERS - -endif #MEDIA_TEST_SUPPORT -- GitLab From b533cad6fd59c0fb083c1e0066ee7713366bff7e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 07:23:59 +0100 Subject: [PATCH 143/503] media: docs: update cardlists There were some changes at the drivers adding support for more cards. Update cardlists accordingly. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cx23885-cardlist.rst | 4 ++++ Documentation/admin-guide/media/cx88-cardlist.rst | 4 ++++ Documentation/admin-guide/media/em28xx-cardlist.rst | 6 +++++- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/media/cx23885-cardlist.rst b/Documentation/admin-guide/media/cx23885-cardlist.rst index ddff8da98eebc..0415b8e0be6fa 100644 --- a/Documentation/admin-guide/media/cx23885-cardlist.rst +++ b/Documentation/admin-guide/media/cx23885-cardlist.rst @@ -261,3 +261,7 @@ cx23885 cards list * - 61 - Hauppauge WinTV-QuadHD-ATSC(885) - + + * - 62 + - AVerMedia CE310B + - 1461:3100 diff --git a/Documentation/admin-guide/media/cx88-cardlist.rst b/Documentation/admin-guide/media/cx88-cardlist.rst index 56ee080281067..4524dfb13d18f 100644 --- a/Documentation/admin-guide/media/cx88-cardlist.rst +++ b/Documentation/admin-guide/media/cx88-cardlist.rst @@ -377,3 +377,7 @@ CX88 cards list * - 90 - Leadtek TV2000 XP Global (XC4100) - 107d:6f43 + + * - 91 + - NotOnlyTV LV3H + - diff --git a/Documentation/admin-guide/media/em28xx-cardlist.rst b/Documentation/admin-guide/media/em28xx-cardlist.rst index 2956cbdc28e06..cb2e693a56a2b 100644 --- a/Documentation/admin-guide/media/em28xx-cardlist.rst +++ b/Documentation/admin-guide/media/em28xx-cardlist.rst @@ -393,7 +393,7 @@ EM28xx cards list * - 94 - PCTV tripleStick (292e) - em28178 - - 2013:025f, 2013:0264, 2040:0264, 2040:8264, 2040:8268, 2040:8268 + - 2013:025f, 2013:0264, 2040:0264, 2040:8264, 2040:8268 * - 95 - Leadtek VC100 - em2861 @@ -426,3 +426,7 @@ EM28xx cards list - :ZOLID HYBRID TV STICK - em2882 - + * - 103 + - Magix USB Videowandler-2 + - em2861 + - 1b80:e349 -- GitLab From c4b89166d291959cf9a2e8da48f7bfa65b7d56d4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 13:20:32 +0100 Subject: [PATCH 144/503] media: docs: split avermedia.rst contents on two files Part of this document has nothing to do with the Avermedia driver. It is generic to the entire subsystem. So, split it on a separate file. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/avermedia.rst | 179 ---------------- Documentation/admin-guide/media/dvb_intro.rst | 202 ++++++++++++++++++ Documentation/admin-guide/media/index.rst | 2 + 3 files changed, 204 insertions(+), 179 deletions(-) create mode 100644 Documentation/admin-guide/media/dvb_intro.rst diff --git a/Documentation/admin-guide/media/avermedia.rst b/Documentation/admin-guide/media/avermedia.rst index bf35fd88e1640..349f696f7f01c 100644 --- a/Documentation/admin-guide/media/avermedia.rst +++ b/Documentation/admin-guide/media/avermedia.rst @@ -13,69 +13,6 @@ February 14th 2006 There's a section there specific for Avermedia boards at: https://linuxtv.org/wiki/index.php/AVerMedia - -Assumptions and Introduction -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -It is assumed that the reader understands the basic structure -of the Linux Kernel DVB drivers and the general principles of -Digital TV. - -One significant difference between Digital TV and Analogue TV -that the unwary (like myself) should consider is that, -although the component structure of budget DVB-T cards are -substantially similar to Analogue TV cards, they function in -substantially different ways. - -The purpose of an Analogue TV is to receive and display an -Analogue Television signal. An Analogue TV signal (otherwise -known as composite video) is an analogue encoding of a -sequence of image frames (25 per second) rasterised using an -interlacing technique. Interlacing takes two fields to -represent one frame. Computers today are at their best when -dealing with digital signals, not analogue signals and a -composite video signal is about as far removed from a digital -data stream as you can get. Therefore, an Analogue TV card for -a PC has the following purpose: - -* Tune the receiver to receive a broadcast signal -* demodulate the broadcast signal -* demultiplex the analogue video signal and analogue audio - signal. **NOTE:** some countries employ a digital audio signal - embedded within the modulated composite analogue signal - - NICAM.) -* digitize the analogue video signal and make the resulting - datastream available to the data bus. - -The digital datastream from an Analogue TV card is generated -by circuitry on the card and is often presented uncompressed. -For a PAL TV signal encoded at a resolution of 768x576 24-bit -color pixels over 25 frames per second - a fair amount of data -is generated and must be processed by the PC before it can be -displayed on the video monitor screen. Some Analogue TV cards -for PCs have onboard MPEG2 encoders which permit the raw -digital data stream to be presented to the PC in an encoded -and compressed form - similar to the form that is used in -Digital TV. - -The purpose of a simple budget digital TV card (DVB-T,C or S) -is to simply: - -* Tune the received to receive a broadcast signal. -* Extract the encoded digital datastream from the broadcast - signal. -* Make the encoded digital datastream (MPEG2) available to - the data bus. - -The significant difference between the two is that the tuner -on the analogue TV card spits out an Analogue signal, whereas -the tuner on the digital TV card spits out a compressed -encoded digital datastream. As the signal is already -digitised, it is trivial to pass this datastream to the PC -databus with minimal additional processing and then extract -the digital video and audio datastreams passing them to the -appropriate software or hardware for decoding and viewing. - The Avermedia DVB-T ~~~~~~~~~~~~~~~~~~~ @@ -102,33 +39,6 @@ MPEG2 hardware decoding card or chipset. Getting the card going ~~~~~~~~~~~~~~~~~~~~~~ -In order to fire up the card, it is necessary to load a number -of modules from the DVB driver set. Prior to this it will have -been necessary to download these drivers from the linuxtv CVS -server and compile them successfully. - -Depending on the card's feature set, the Device Driver API for -DVB under Linux will expose some of the following device files -in the /dev tree: - -* /dev/dvb/adapter0/audio0 -* /dev/dvb/adapter0/ca0 -* /dev/dvb/adapter0/demux0 -* /dev/dvb/adapter0/dvr0 -* /dev/dvb/adapter0/frontend0 -* /dev/dvb/adapter0/net0 -* /dev/dvb/adapter0/osd0 -* /dev/dvb/adapter0/video0 - -The primary device nodes that we are interested in (at this -stage) for the Avermedia DVB-T are: - -* /dev/dvb/adapter0/dvr0 -* /dev/dvb/adapter0/frontend0 - -The dvr0 device node is used to read the MPEG2 Data Stream and -the frontend0 node is used to tune the frontend tuner module. - At this stage, it has not been able to ascertain the functionality of the remaining device nodes in respect of the Avermedia DVBT. However, full functionality in respect of @@ -156,95 +66,6 @@ Please use the command "get_dvb_firmware sp887x" to download it. Then copy it to /usr/lib/hotplug/firmware or /lib/firmware/ (depending on configuration of firmware hotplug). -Receiving DVB-T in Australia -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -I have no experience of DVB-T in other countries other than -Australia, so I will attempt to explain how it works here in -Melbourne and how this affects the configuration of the DVB-T -card. - -The Digital Broadcasting Australia website has a Reception -locatortool which provides information on transponder channels -and frequencies. My local transmitter happens to be Mount -Dandenong. - -The frequencies broadcast by Mount Dandenong are: - -Table 1. Transponder Frequencies Mount Dandenong, Vic, Aus. - -=========== ======= =========== -Broadcaster Channel Frequency -=========== ======= =========== -ABC VHF 12 226.5 MHz -TEN VHF 11 219.5 MHz -NINE VHF 8 191.625 MHz -SEVEN VHF 6 177.5 MHz -SBS UHF 29 536.5 MHz -=========== ======= =========== - -The Scan utility has a set of compiled-in defaults for various -countries and regions, but if they do not suit, or if you have -a pre-compiled scan binary, you can specify a data file on the -command line which contains the transponder frequencies. Here -is a sample file for the above channel transponders: - -:: - - # Data file for DVB scan program - # - # C Frequency SymbolRate FEC QAM - # S Frequency Polarisation SymbolRate FEC - # T Frequency Bandwidth FEC FEC2 QAM Mode Guard Hier - T 226500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 191625000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 219500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 177500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 536500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - -The defaults for the transponder frequency and other -modulation parameters were obtained from www.dba.org.au. - -When Scan runs, it will output channels.conf information for -any channel's transponders which the card's frontend can lock -onto. (i.e. any whose signal is strong enough at your -antenna). - -Here's my channels.conf file for anyone who's interested: - -:: - - ABC HDTV:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:2307:0:560 - ABC TV Melbourne:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:561 - ABC TV 2:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:562 - ABC TV 3:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:563 - ABC TV 4:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:564 - ABC DiG Radio:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:0:2311:566 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1585 - TEN Digital 1:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1586 - TEN Digital 2:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1587 - TEN Digital 3:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1588 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1589 - TEN Digital 4:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1590 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1591 - TEN HD:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:514:0:1592 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1593 - Nine Digital:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:513:660:1072 - Nine Digital HD:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:0:1073 - Nine Guide:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:514:670:1074 - 7 Digital:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1328 - 7 Digital 1:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1329 - 7 Digital 2:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1330 - 7 Digital 3:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1331 - 7 HD Digital:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:833:834:1332 - 7 Program Guide:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:865:866:1334 - SBS HD:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:102:103:784 - SBS DIGITAL 1:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:161:81:785 - SBS DIGITAL 2:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:162:83:786 - SBS EPG:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:163:85:787 - SBS RADIO 1:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:0:201:798 - SBS RADIO 2:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:0:202:799 - Known Limitations ~~~~~~~~~~~~~~~~~ diff --git a/Documentation/admin-guide/media/dvb_intro.rst b/Documentation/admin-guide/media/dvb_intro.rst new file mode 100644 index 0000000000000..af9516f2cb607 --- /dev/null +++ b/Documentation/admin-guide/media/dvb_intro.rst @@ -0,0 +1,202 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================== +Using the Digital TV Framework +============================== + +February 14th 2006 + +Introduction +~~~~~~~~~~~~ + +.. note:: + + This documentation is outdated. Please check at the DVB wiki + at https://linuxtv.org/wiki for more updated info. + + There's a section there specific for Avermedia boards at: + https://linuxtv.org/wiki/index.php/AVerMedia + + +Assumptions and Introduction +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +It is assumed that the reader understands the basic structure +of the Linux Kernel DVB drivers and the general principles of +Digital TV. + +One significant difference between Digital TV and Analogue TV +that the unwary (like myself) should consider is that, +although the component structure of budget DVB-T cards are +substantially similar to Analogue TV cards, they function in +substantially different ways. + +The purpose of an Analogue TV is to receive and display an +Analogue Television signal. An Analogue TV signal (otherwise +known as composite video) is an analogue encoding of a +sequence of image frames (25 per second) rasterised using an +interlacing technique. Interlacing takes two fields to +represent one frame. Computers today are at their best when +dealing with digital signals, not analogue signals and a +composite video signal is about as far removed from a digital +data stream as you can get. Therefore, an Analogue TV card for +a PC has the following purpose: + +* Tune the receiver to receive a broadcast signal +* demodulate the broadcast signal +* demultiplex the analogue video signal and analogue audio + signal. **NOTE:** some countries employ a digital audio signal + embedded within the modulated composite analogue signal - + NICAM.) +* digitize the analogue video signal and make the resulting + datastream available to the data bus. + +The digital datastream from an Analogue TV card is generated +by circuitry on the card and is often presented uncompressed. +For a PAL TV signal encoded at a resolution of 768x576 24-bit +color pixels over 25 frames per second - a fair amount of data +is generated and must be processed by the PC before it can be +displayed on the video monitor screen. Some Analogue TV cards +for PCs have onboard MPEG2 encoders which permit the raw +digital data stream to be presented to the PC in an encoded +and compressed form - similar to the form that is used in +Digital TV. + +The purpose of a simple budget digital TV card (DVB-T,C or S) +is to simply: + +* Tune the received to receive a broadcast signal. +* Extract the encoded digital datastream from the broadcast + signal. +* Make the encoded digital datastream (MPEG2) available to + the data bus. + +The significant difference between the two is that the tuner +on the analogue TV card spits out an Analogue signal, whereas +the tuner on the digital TV card spits out a compressed +encoded digital datastream. As the signal is already +digitised, it is trivial to pass this datastream to the PC +databus with minimal additional processing and then extract +the digital video and audio datastreams passing them to the +appropriate software or hardware for decoding and viewing. + + +Getting the card going +~~~~~~~~~~~~~~~~~~~~~~ + +In order to fire up the card, it is necessary to load a number +of modules from the DVB driver set. Prior to this it will have +been necessary to download these drivers from the linuxtv CVS +server and compile them successfully. + +Depending on the card's feature set, the Device Driver API for +DVB under Linux will expose some of the following device files +in the /dev tree: + +* /dev/dvb/adapter0/audio0 +* /dev/dvb/adapter0/ca0 +* /dev/dvb/adapter0/demux0 +* /dev/dvb/adapter0/dvr0 +* /dev/dvb/adapter0/frontend0 +* /dev/dvb/adapter0/net0 +* /dev/dvb/adapter0/osd0 +* /dev/dvb/adapter0/video0 + +The primary device nodes that we are interested in (at this +stage) for the Avermedia DVB-T are: + +* /dev/dvb/adapter0/dvr0 +* /dev/dvb/adapter0/frontend0 + +The dvr0 device node is used to read the MPEG2 Data Stream and +the frontend0 node is used to tune the frontend tuner module. + + +Receiving DVB-T in Australia +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +I have no experience of DVB-T in other countries other than +Australia, so I will attempt to explain how it works here in +Melbourne and how this affects the configuration of the DVB-T +card. + +The Digital Broadcasting Australia website has a Reception +locatortool which provides information on transponder channels +and frequencies. My local transmitter happens to be Mount +Dandenong. + +The frequencies broadcast by Mount Dandenong are: + +Table 1. Transponder Frequencies Mount Dandenong, Vic, Aus. + +=========== ======= =========== +Broadcaster Channel Frequency +=========== ======= =========== +ABC VHF 12 226.5 MHz +TEN VHF 11 219.5 MHz +NINE VHF 8 191.625 MHz +SEVEN VHF 6 177.5 MHz +SBS UHF 29 536.5 MHz +=========== ======= =========== + +The Scan utility has a set of compiled-in defaults for various +countries and regions, but if they do not suit, or if you have +a pre-compiled scan binary, you can specify a data file on the +command line which contains the transponder frequencies. Here +is a sample file for the above channel transponders: + +:: + + # Data file for DVB scan program + # + # C Frequency SymbolRate FEC QAM + # S Frequency Polarisation SymbolRate FEC + # T Frequency Bandwidth FEC FEC2 QAM Mode Guard Hier + T 226500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE + T 191625000 7MHz 2/3 NONE QAM64 8k 1/8 NONE + T 219500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE + T 177500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE + T 536500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE + +The defaults for the transponder frequency and other +modulation parameters were obtained from www.dba.org.au. + +When Scan runs, it will output channels.conf information for +any channel's transponders which the card's frontend can lock +onto. (i.e. any whose signal is strong enough at your +antenna). + +Here's my channels.conf file for anyone who's interested: + +:: + + ABC HDTV:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:2307:0:560 + ABC TV Melbourne:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:561 + ABC TV 2:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:562 + ABC TV 3:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:563 + ABC TV 4:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:564 + ABC DiG Radio:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:0:2311:566 + TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1585 + TEN Digital 1:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1586 + TEN Digital 2:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1587 + TEN Digital 3:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1588 + TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1589 + TEN Digital 4:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1590 + TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1591 + TEN HD:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:514:0:1592 + TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1593 + Nine Digital:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:513:660:1072 + Nine Digital HD:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:0:1073 + Nine Guide:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:514:670:1074 + 7 Digital:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1328 + 7 Digital 1:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1329 + 7 Digital 2:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1330 + 7 Digital 3:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1331 + 7 HD Digital:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:833:834:1332 + 7 Program Guide:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:865:866:1334 + SBS HD:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:102:103:784 + SBS DIGITAL 1:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:161:81:785 + SBS DIGITAL 2:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:162:83:786 + SBS EPG:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:163:85:787 + SBS RADIO 1:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:0:201:798 + SBS RADIO 2:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:0:202:799 diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index 5b355c327be1f..7e8d43502167a 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -78,6 +78,8 @@ Linux Digital TV driver-specific documentation ci faq + dvb_intro + avermedia bt8xx lmedm04 -- GitLab From 109895a1525fb717850186c59ea21e5a9bd6b5d4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 14:37:07 +0100 Subject: [PATCH 145/503] media: docs: dvb_intro.rst: update its contents The content there is somewhat outdated. Update to reflect the current status. While here, remove extra spaces, as we won't be preserving left margin alinment on this document. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/dvb_intro.rst | 730 ++++++++++++++---- 1 file changed, 572 insertions(+), 158 deletions(-) diff --git a/Documentation/admin-guide/media/dvb_intro.rst b/Documentation/admin-guide/media/dvb_intro.rst index af9516f2cb607..44eac9b3be6c7 100644 --- a/Documentation/admin-guide/media/dvb_intro.rst +++ b/Documentation/admin-guide/media/dvb_intro.rst @@ -4,199 +4,613 @@ Using the Digital TV Framework ============================== -February 14th 2006 - Introduction ~~~~~~~~~~~~ -.. note:: - - This documentation is outdated. Please check at the DVB wiki - at https://linuxtv.org/wiki for more updated info. +One significant difference between Digital TV and Analogue TV that the +unwary (like myself) should consider is that, although the component +structure of DVB-T cards are substantially similar to Analogue TV cards, +they function in substantially different ways. - There's a section there specific for Avermedia boards at: - https://linuxtv.org/wiki/index.php/AVerMedia +The purpose of an Analogue TV is to receive and display an Analogue +Television signal. An Analogue TV signal (otherwise known as composite +video) is an analogue encoding of a sequence of image frames (25 frames +per second in Europe) rasterised using an interlacing technique. +Interlacing takes two fields to represent one frame. Therefore, an +Analogue TV card for a PC has the following purpose: +* Tune the receiver to receive a broadcast signal +* demodulate the broadcast signal +* demultiplex the analogue video signal and analogue audio + signal. -Assumptions and Introduction -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + .. note:: -It is assumed that the reader understands the basic structure -of the Linux Kernel DVB drivers and the general principles of -Digital TV. + some countries employ a digital audio signal + embedded within the modulated composite analogue signal - + using NICAM signaling.) -One significant difference between Digital TV and Analogue TV -that the unwary (like myself) should consider is that, -although the component structure of budget DVB-T cards are -substantially similar to Analogue TV cards, they function in -substantially different ways. - -The purpose of an Analogue TV is to receive and display an -Analogue Television signal. An Analogue TV signal (otherwise -known as composite video) is an analogue encoding of a -sequence of image frames (25 per second) rasterised using an -interlacing technique. Interlacing takes two fields to -represent one frame. Computers today are at their best when -dealing with digital signals, not analogue signals and a -composite video signal is about as far removed from a digital -data stream as you can get. Therefore, an Analogue TV card for -a PC has the following purpose: +* digitize the analogue video signal and make the resulting datastream + available to the data bus. -* Tune the receiver to receive a broadcast signal -* demodulate the broadcast signal -* demultiplex the analogue video signal and analogue audio - signal. **NOTE:** some countries employ a digital audio signal - embedded within the modulated composite analogue signal - - NICAM.) -* digitize the analogue video signal and make the resulting - datastream available to the data bus. - -The digital datastream from an Analogue TV card is generated -by circuitry on the card and is often presented uncompressed. -For a PAL TV signal encoded at a resolution of 768x576 24-bit -color pixels over 25 frames per second - a fair amount of data -is generated and must be processed by the PC before it can be -displayed on the video monitor screen. Some Analogue TV cards -for PCs have onboard MPEG2 encoders which permit the raw -digital data stream to be presented to the PC in an encoded -and compressed form - similar to the form that is used in +The digital datastream from an Analogue TV card is generated by +circuitry on the card and is often presented uncompressed. For a PAL TV +signal encoded at a resolution of 768x576 24-bit color pixels over 25 +frames per second - a fair amount of data is generated and must be +processed by the PC before it can be displayed on the video monitor +screen. Some Analogue TV cards for PCs have onboard MPEG2 encoders which +permit the raw digital data stream to be presented to the PC in an +encoded and compressed form - similar to the form that is used in Digital TV. -The purpose of a simple budget digital TV card (DVB-T,C or S) -is to simply: - -* Tune the received to receive a broadcast signal. -* Extract the encoded digital datastream from the broadcast - signal. -* Make the encoded digital datastream (MPEG2) available to - the data bus. +The purpose of a simple budget digital TV card (DVB-T,C or S) is to +simply: -The significant difference between the two is that the tuner -on the analogue TV card spits out an Analogue signal, whereas -the tuner on the digital TV card spits out a compressed -encoded digital datastream. As the signal is already -digitised, it is trivial to pass this datastream to the PC -databus with minimal additional processing and then extract -the digital video and audio datastreams passing them to the -appropriate software or hardware for decoding and viewing. +* Tune the received to receive a broadcast signal. * Extract the encoded + digital datastream from the broadcast signal. +* Make the encoded digital datastream (MPEG2) available to the data bus. +The significant difference between the two is that the tuner on the +analogue TV card spits out an Analogue signal, whereas the tuner on the +digital TV card spits out a compressed encoded digital datastream. As +the signal is already digitised, it is trivial to pass this datastream +to the PC databus with minimal additional processing and then extract +the digital video and audio datastreams passing them to the appropriate +software or hardware for decoding and viewing. Getting the card going ~~~~~~~~~~~~~~~~~~~~~~ -In order to fire up the card, it is necessary to load a number -of modules from the DVB driver set. Prior to this it will have -been necessary to download these drivers from the linuxtv CVS -server and compile them successfully. +The Device Driver API for DVB under Linux will the following +device nodes via the devfs filesystem: -Depending on the card's feature set, the Device Driver API for -DVB under Linux will expose some of the following device files -in the /dev tree: - -* /dev/dvb/adapter0/audio0 -* /dev/dvb/adapter0/ca0 * /dev/dvb/adapter0/demux0 * /dev/dvb/adapter0/dvr0 * /dev/dvb/adapter0/frontend0 -* /dev/dvb/adapter0/net0 -* /dev/dvb/adapter0/osd0 -* /dev/dvb/adapter0/video0 -The primary device nodes that we are interested in (at this -stage) for the Avermedia DVB-T are: +The ``/dev/dvb/adapter0/dvr0`` device node is used to read the MPEG2 +Data Stream and the ``/dev/dvb/adapter0/frontend0`` device node is used +to tune the frontend tuner module. The ``/dev/dvb/adapter0/demux0`` is +used to control what programs will be received. -* /dev/dvb/adapter0/dvr0 -* /dev/dvb/adapter0/frontend0 +Depending on the card's feature set, the Device Driver API could also +expose other device nodes: -The dvr0 device node is used to read the MPEG2 Data Stream and -the frontend0 node is used to tune the frontend tuner module. +* /dev/dvb/adapter0/ca0 +* /dev/dvb/adapter0/audio0 +* /dev/dvb/adapter0/net0 +* /dev/dvb/adapter0/osd0 +* /dev/dvb/adapter0/video0 +The ``/dev/dvb/adapter0/ca0`` is used to decode encrypted channels. The +other device nodes are found only on devices that use the av7110 +driver, with is now obsoleted, together with the extra API whose such +devices use. -Receiving DVB-T in Australia -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Receiving a digital TV channel +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -I have no experience of DVB-T in other countries other than -Australia, so I will attempt to explain how it works here in -Melbourne and how this affects the configuration of the DVB-T -card. +This section attempts to explain how it works and how this affects the +configuration of a Digital TV card. -The Digital Broadcasting Australia website has a Reception -locatortool which provides information on transponder channels -and frequencies. My local transmitter happens to be Mount -Dandenong. +On this example, we're considering tuning into DVB-T channels in +Australia, at the Melbourne region. -The frequencies broadcast by Mount Dandenong are: +The frequencies broadcast by Mount Dandenong transmitters are, +currently: Table 1. Transponder Frequencies Mount Dandenong, Vic, Aus. -=========== ======= =========== -Broadcaster Channel Frequency -=========== ======= =========== -ABC VHF 12 226.5 MHz -TEN VHF 11 219.5 MHz -NINE VHF 8 191.625 MHz -SEVEN VHF 6 177.5 MHz -SBS UHF 29 536.5 MHz -=========== ======= =========== - -The Scan utility has a set of compiled-in defaults for various -countries and regions, but if they do not suit, or if you have -a pre-compiled scan binary, you can specify a data file on the -command line which contains the transponder frequencies. Here -is a sample file for the above channel transponders: - -:: +=========== =========== +Broadcaster Frequency +=========== =========== +Seven 177.500 Mhz +SBS 184.500 Mhz +Nine 191.625 Mhz +Ten 219.500 Mhz +ABC 226.500 Mhz +Channel 31 557.625 Mhz +=========== =========== + +The digital TV Scan utilities (like dvbv5-scan) have use a set of +compiled-in defaults for various countries and regions. Those are +currently provided as a separate package, called dtv-scan-tables. It's +git tree is located at LinuxTV.org: + + https://git.linuxtv.org/dtv-scan-tables.git/ + +If none of the tables there suit, you can specify a data file on the +command line which contains the transponder frequencies. Here is a +sample file for the above channel transponders, in the old "channel" +format:: # Data file for DVB scan program # # C Frequency SymbolRate FEC QAM # S Frequency Polarisation SymbolRate FEC # T Frequency Bandwidth FEC FEC2 QAM Mode Guard Hier - T 226500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 191625000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 219500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 177500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - T 536500000 7MHz 2/3 NONE QAM64 8k 1/8 NONE - -The defaults for the transponder frequency and other -modulation parameters were obtained from www.dba.org.au. - -When Scan runs, it will output channels.conf information for -any channel's transponders which the card's frontend can lock -onto. (i.e. any whose signal is strong enough at your -antenna). - -Here's my channels.conf file for anyone who's interested: - -:: - - ABC HDTV:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:2307:0:560 - ABC TV Melbourne:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:561 - ABC TV 2:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:562 - ABC TV 3:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:563 - ABC TV 4:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:564 - ABC DiG Radio:226500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_3_4:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:0:2311:566 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1585 - TEN Digital 1:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1586 - TEN Digital 2:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1587 - TEN Digital 3:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1588 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1589 - TEN Digital 4:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1590 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1591 - TEN HD:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:514:0:1592 - TEN Digital:219500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:650:1593 - Nine Digital:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:513:660:1072 - Nine Digital HD:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:512:0:1073 - Nine Guide:191625000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_3_4:FEC_1_2:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_16:HIERARCHY_NONE:514:670:1074 - 7 Digital:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1328 - 7 Digital 1:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1329 - 7 Digital 2:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1330 - 7 Digital 3:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:769:770:1331 - 7 HD Digital:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:833:834:1332 - 7 Program Guide:177500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:865:866:1334 - SBS HD:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:102:103:784 - SBS DIGITAL 1:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:161:81:785 - SBS DIGITAL 2:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:162:83:786 - SBS EPG:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:163:85:787 - SBS RADIO 1:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:0:201:798 - SBS RADIO 2:536500000:INVERSION_OFF:BANDWIDTH_7_MHZ:FEC_2_3:FEC_2_3:QAM_64:TRANSMISSION_MODE_8K:GUARD_INTERVAL_1_8:HIERARCHY_NONE:0:202:799 + + T 177500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE + T 184500000 7MHz AUTO AUTO QAM64 8k 1/8 NONE + T 191625000 7MHz AUTO AUTO QAM64 8k 1/16 NONE + T 219500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE + T 226500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE + T 557625000 7MHz AUTO AUTO QPSK 8k 1/16 NONE + +Nowadays, we prefer to use a newer format, with is more verbose and easier +to understand. With the new format, the "Seven" channel transponder's +data is represented by:: + + [Seven] + DELIVERY_SYSTEM = DVBT + FREQUENCY = 177500000 + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = AUTO + CODE_RATE_LP = AUTO + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + INVERSION = AUTO + +For an updated version of the complete table, please see: + + https://git.linuxtv.org/dtv-scan-tables.git/tree/dvb-t/au-Melbourne + +When the Digital TV scanning utility runs, it will output a file +containing the information for all the audio and video programs that +exists into each channel's transponders which the card's frontend can +lock onto. (i.e. any whose signal is strong enough at your antenna). + +Here's the output of the dvbv5 tools from a channel scan took from +Melburne:: + + [ABC HDTV] + SERVICE_ID = 560 + VIDEO_PID = 2307 + AUDIO_PID = 0 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 226500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 3/4 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [ABC TV Melbourne] + SERVICE_ID = 561 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 226500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 3/4 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [ABC TV 2] + SERVICE_ID = 562 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 226500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 3/4 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [ABC TV 3] + SERVICE_ID = 563 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 226500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 3/4 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [ABC TV 4] + SERVICE_ID = 564 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 226500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 3/4 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [ABC DiG Radio] + SERVICE_ID = 566 + VIDEO_PID = 0 + AUDIO_PID = 2311 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 226500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 3/4 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital] + SERVICE_ID = 1585 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital 1] + SERVICE_ID = 1586 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital 2] + SERVICE_ID = 1587 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital 3] + SERVICE_ID = 1588 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital] + SERVICE_ID = 1589 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital 4] + SERVICE_ID = 1590 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital] + SERVICE_ID = 1591 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN HD] + SERVICE_ID = 1592 + VIDEO_PID = 514 + AUDIO_PID = 0 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [TEN Digital] + SERVICE_ID = 1593 + VIDEO_PID = 512 + AUDIO_PID = 650 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 219500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [Nine Digital] + SERVICE_ID = 1072 + VIDEO_PID = 513 + AUDIO_PID = 660 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 191625000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [Nine Digital HD] + SERVICE_ID = 1073 + VIDEO_PID = 512 + AUDIO_PID = 0 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 191625000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [Nine Guide] + SERVICE_ID = 1074 + VIDEO_PID = 514 + AUDIO_PID = 670 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 191625000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 3/4 + CODE_RATE_LP = 1/2 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/16 + HIERARCHY = NONE + + [7 Digital] + SERVICE_ID = 1328 + VIDEO_PID = 769 + AUDIO_PID = 770 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 177500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [7 Digital 1] + SERVICE_ID = 1329 + VIDEO_PID = 769 + AUDIO_PID = 770 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 177500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [7 Digital 2] + SERVICE_ID = 1330 + VIDEO_PID = 769 + AUDIO_PID = 770 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 177500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [7 Digital 3] + SERVICE_ID = 1331 + VIDEO_PID = 769 + AUDIO_PID = 770 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 177500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [7 HD Digital] + SERVICE_ID = 1332 + VIDEO_PID = 833 + AUDIO_PID = 834 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 177500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [7 Program Guide] + SERVICE_ID = 1334 + VIDEO_PID = 865 + AUDIO_PID = 866 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 177500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [SBS HD] + SERVICE_ID = 784 + VIDEO_PID = 102 + AUDIO_PID = 103 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 536500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [SBS DIGITAL 1] + SERVICE_ID = 785 + VIDEO_PID = 161 + AUDIO_PID = 81 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 536500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [SBS DIGITAL 2] + SERVICE_ID = 786 + VIDEO_PID = 162 + AUDIO_PID = 83 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 536500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [SBS EPG] + SERVICE_ID = 787 + VIDEO_PID = 163 + AUDIO_PID = 85 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 536500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [SBS RADIO 1] + SERVICE_ID = 798 + VIDEO_PID = 0 + AUDIO_PID = 201 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 536500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE + + [SBS RADIO 2] + SERVICE_ID = 799 + VIDEO_PID = 0 + AUDIO_PID = 202 + DELIVERY_SYSTEM = DVBT + FREQUENCY = 536500000 + INVERSION = OFF + BANDWIDTH_HZ = 7000000 + CODE_RATE_HP = 2/3 + CODE_RATE_LP = 2/3 + MODULATION = QAM/64 + TRANSMISSION_MODE = 8K + GUARD_INTERVAL = 1/8 + HIERARCHY = NONE -- GitLab From 03693a5a23936263fe1e370218228e8d037295aa Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 14:56:54 +0100 Subject: [PATCH 146/503] media: docs: intro.rst actually contain DVB references This document doesn't describe the DVB subsystem. Instead, it just contain references to some places. Better name it and improve its contents. Signed-off-by: Mauro Carvalho Chehab --- .../admin-guide/media/dvb_references.rst | 29 +++++++++++++++++++ Documentation/admin-guide/media/index.rst | 8 ++--- Documentation/admin-guide/media/intro.rst | 23 --------------- 3 files changed, 32 insertions(+), 28 deletions(-) create mode 100644 Documentation/admin-guide/media/dvb_references.rst delete mode 100644 Documentation/admin-guide/media/intro.rst diff --git a/Documentation/admin-guide/media/dvb_references.rst b/Documentation/admin-guide/media/dvb_references.rst new file mode 100644 index 0000000000000..48445ac762756 --- /dev/null +++ b/Documentation/admin-guide/media/dvb_references.rst @@ -0,0 +1,29 @@ +.. SPDX-License-Identifier: GPL-2.0 + +References +========== + +The main development site and GIT repository for Digital TV +drivers is https://linuxtv.org. + +The DVB mailing list linux-dvb is hosted at vger. Please see +http://vger.kernel.org/vger-lists.html#linux-media for details. + +There are also some other old lists hosted at: +https://linuxtv.org/lists.php. If you're insterested on that for historic +reasons, please check the archive at https://linuxtv.org/pipermail/linux-dvb/. + +The media subsystem Wiki is hosted at https://linuxtv.org/wiki/. +There, you'll find lots of information, from both development and usage +of media boards. Please check it before asking newbie questions on the +mailing list or IRC channels. + +The API documentation is documented at the Kernel tree. You can find it +in both html and pdf formats, together with other useful documentation at: + + - https://linuxtv.org/docs.php. + +You may also find useful material at https://linuxtv.org/downloads/. + +In order to get the needed firmware for some drivers to work, there's +a script at the kernel tree, at scripts/get_dvb_firmware. diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index 7e8d43502167a..11d01d681b57f 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -72,14 +72,12 @@ Linux Digital TV driver-specific documentation :maxdepth: 5 :numbered: - intro - - cards + dvb_intro ci faq + dvb_references - dvb_intro - + cards avermedia bt8xx lmedm04 diff --git a/Documentation/admin-guide/media/intro.rst b/Documentation/admin-guide/media/intro.rst deleted file mode 100644 index 4e361bcc3ad4f..0000000000000 --- a/Documentation/admin-guide/media/intro.rst +++ /dev/null @@ -1,23 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -Introduction -============ - -The main development site and GIT repository for these -drivers is https://linuxtv.org. - -The DVB mailing list linux-dvb is hosted at vger. Please see -http://vger.kernel.org/vger-lists.html#linux-media for details. - -There are also some other old lists hosted at https://linuxtv.org/lists.php. Please check the archive https://linuxtv.org/pipermail/linux-dvb/. - -The media subsystem Wiki is hosted at https://linuxtv.org/wiki/. -Please check it before asking newbie questions on the list. - -API documentation is documented at the Kernel. You'll also find useful -documentation at: https://linuxtv.org/docs.php. - -You may also find useful material at https://linuxtv.org/downloads/. - -In order to get firmware from proprietary drivers, there's a script at -the kernel tree, at scripts/get_dvb_firmware. -- GitLab From c5b352431f6f50419790d70be89f2412018c423c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 15:00:34 +0100 Subject: [PATCH 147/503] media: docs: update avermedia.rst contents While this is old, now that we moved the intro part of it, its contents seem to be valid, if we mention that we're talking only about the BT878 support. Update the document title accordingly and remove the obsolete note from it. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/avermedia.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/admin-guide/media/avermedia.rst b/Documentation/admin-guide/media/avermedia.rst index 349f696f7f01c..93ff74002d202 100644 --- a/Documentation/admin-guide/media/avermedia.rst +++ b/Documentation/admin-guide/media/avermedia.rst @@ -1,16 +1,16 @@ .. SPDX-License-Identifier: GPL-2.0 -HOWTO: Get An Avermedia DVB-T working under Linux -------------------------------------------------- +====================================== +Avermedia DVB-T on BT878 Release Notes +====================================== February 14th 2006 .. note:: - This documentation is outdated. Please check at the DVB wiki - at https://linuxtv.org/wiki for more updated info. + Several other Avermedia devices are supported. For a more + broader and updated content about that, please check: - There's a section there specific for Avermedia boards at: https://linuxtv.org/wiki/index.php/AVerMedia The Avermedia DVB-T -- GitLab From f631516f6d7d87fc006a8f51348fa84022a58d12 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 15:44:06 +0100 Subject: [PATCH 148/503] media: docs: bt8xx.rst: update document info This document is very outdated, and doesn't match the upstream current way. Update it, making some parts a little bit more generic. While the main focus of this document is digital TV cards, its content also may also help someone with just analog TV support. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/bt8xx.rst | 138 ++++++++++++++-------- 1 file changed, 86 insertions(+), 52 deletions(-) diff --git a/Documentation/admin-guide/media/bt8xx.rst b/Documentation/admin-guide/media/bt8xx.rst index d800f7791adad..707919f29c86a 100644 --- a/Documentation/admin-guide/media/bt8xx.rst +++ b/Documentation/admin-guide/media/bt8xx.rst @@ -1,67 +1,95 @@ .. SPDX-License-Identifier: GPL-2.0 +================================== How to get the bt8xx cards working ================================== -Authors: Richard Walker, +Authors: + Richard Walker, Jamie Honan, Michael Hunold, Manu Abraham, Uwe Bugla, Michael Krufky -.. note:: - - This documentation is outdated. Please check at the DVB wiki - at https://linuxtv.org/wiki for more updated info. - General information ------------------- This class of cards has a bt878a as the PCI interface, and require the bttv driver for accessing the i2c bus and the gpio pins of the bt8xx chipset. -Please see Documentation/admin-guide/media/cards.rst => o Cards based on the Conexant Bt8xx PCI bridge: -Compiling kernel please enable: +Please see :doc:`cards` for a complete list of Cards based on the +Conexant Bt8xx PCI bridge supported by the Linux Kernel. + +In order to be able to compile the kernel, some config options should be +enabled:: -#) ``Device drivers`` => ``Multimedia devices`` => ``Video For Linux`` => ``Enable Video for Linux API 1 (DEPRECATED)`` -#) ``Device drivers`` => ``Multimedia devices`` => ``Video For Linux`` => ``Video Capture Adapters`` => ``BT848 Video For Linux`` -#) ``Device drivers`` => ``Multimedia devices`` => ``Digital Video Broadcasting Devices`` => ``DVB for Linux`` ``DVB Core Support`` ``Bt8xx based PCI Cards`` + ./scripts/config -e PCI + ./scripts/config -e INPUT + ./scripts/config -m I2C + ./scripts/config -m MEDIA_SUPPORT + ./scripts/config -e MEDIA_PCI_SUPPORT + ./scripts/config -e MEDIA_ANALOG_TV_SUPPORT + ./scripts/config -e MEDIA_DIGITAL_TV_SUPPORT + ./scripts/config -e MEDIA_RADIO_SUPPORT + ./scripts/config -e RC_CORE + ./scripts/config -m VIDEO_BT848 + ./scripts/config -m DVB_BT8XX - Please use the following options with care as deselection of drivers which are in fact necessary may result in DVB devices that cannot be tuned due to lack of driver support: - You can save RAM by deselecting every frontend module that your DVB card does not need. +If you want to automatically support all possible variants of the Bt8xx +cards, you should also do:: - First please remove the static dependency of DVB card drivers on all frontend modules for all possible card variants by enabling: + ./scripts/config -e MEDIA_SUBDRV_AUTOSELECT -#) ``Device drivers`` => ``Multimedia devices`` => ``Digital Video Broadcasting Devices`` => ``DVB for Linux`` ``DVB Core Support`` ``Load and attach frontend modules as needed`` +.. note:: - If you know the frontend driver that your card needs please enable: + Please use the following options with care as deselection of drivers which + are in fact necessary may result in DVB devices that cannot be tuned due + to lack of driver support. -#) ``Device drivers`` => ``Multimedia devices`` => ``Digital Video Broadcasting Devices`` => ``DVB for Linux`` ``DVB Core Support`` ``Customise DVB Frontends`` => ``Customise the frontend modules to build`` +If your goal is to just support an specific board, you may, instead, +disable MEDIA_SUBDRV_AUTOSELECT and manually select the frontend drivers +required by your board. With that, you can save some RAM. + +You can do that by calling make xconfig/qconfig/menuconfig and look at +the options on those menu options (only enabled if +``Autoselect ancillary drivers`` is disabled: + +#) ``Device drivers`` => ``Multimedia support`` => ``Customize TV tuners`` +#) ``Device drivers`` => ``Multimedia support`` => ``Customize DVB frontends`` + +Then, on each of the above menu, please select your card-specific +frontend and tuner modules. - Then please select your card-specific frontend module. Loading Modules --------------- -Regular case: If the bttv driver detects a bt8xx-based DVB card, all frontend and backend modules will be loaded automatically. +Regular case: If the bttv driver detects a bt8xx-based DVB card, all +frontend and backend modules will be loaded automatically. + Exceptions are: -- Old TwinHan DST cards or clones with or without CA slot and not containing an Eeprom. -People running udev please see Documentation/admin-guide/media/udev.rst. -In the following cases overriding the PCI type detection for dvb-bt8xx might be necessary: +- Old TV cards without EEPROMs, sharing a common PCI ID; +- Old TwinHan DST cards or clones with or without CA slot and not + containing an Eeprom. + +People running udev please see :doc:`udev`. + +In the following cases overriding the PCI type detection for bttv and +for dvb-bt8xx drivers by passing modprobe parameters may be necessary. Running TwinHan and Clones ~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. code-block:: none +As shown at :doc:`bttv-cardlist`, TwinHan and +clones use ``card=113`` modprobe parameter. So, in order to properly +detect it for devices without EEPROM, you should use:: $ modprobe bttv card=113 $ modprobe dst -Useful parameters for verbosity level and debugging the dst module: - -.. code-block:: none +Useful parameters for verbosity level and debugging the dst module:: verbose=0: messages are disabled 1: only error messages are displayed @@ -70,55 +98,61 @@ Useful parameters for verbosity level and debugging the dst module: 4: debug setting dst_addons=0: card is a free to air (FTA) card only 0x20: card has a conditional access slot for scrambled channels + dst_algo=0: (default) Software tuning algorithm + 1: Hardware tuning algorithm + The autodetected values are determined by the cards' "response string". + In your logs see f. ex.: dst_get_device_id: Recognize [DSTMCI]. + For bug reports please send in a complete log with verbose=4 activated. -Please also see Documentation/admin-guide/media/ci.rst. +Please also see :doc:`ci`. Running multiple cards ~~~~~~~~~~~~~~~~~~~~~~ -Examples of card ID's: - -.. code-block:: none - - Pinnacle PCTV Sat: 94 - Nebula Electronics Digi TV: 104 - pcHDTV HD-2000 TV: 112 - Twinhan DST and clones: 113 - Avermedia AverTV DVB-T 771: 123 - Avermedia AverTV DVB-T 761: 124 - DViCO FusionHDTV DVB-T Lite: 128 - DViCO FusionHDTV 5 Lite: 135 +See :doc:`bttv-cardlist` for a complete list of +Card ID. Some examples: + + =========================== === + Brand name ID + =========================== === + Pinnacle PCTV Sat 94 + Nebula Electronics Digi TV 104 + pcHDTV HD-2000 TV 112 + Twinhan DST and clones 113 + Avermedia AverTV DVB-T 77: 123 + Avermedia AverTV DVB-T 761 124 + DViCO FusionHDTV DVB-T Lite 128 + DViCO FusionHDTV 5 Lite 135 + =========================== === .. note:: - The order of the card ID should be uprising: - - Example: + When you have multiple cards, the order of the card ID should + match the order where they're detected by the system. Please notice + that removing/inserting other PCI cards may change the detection + order. - .. code-block:: none +Example:: $ modprobe bttv card=113 card=135 -For a full list of card ID's please see Documentation/admin-guide/media/bttv-cardlist.rst. -In case of further problems please subscribe and send questions to the mailing list: linux-dvb@linuxtv.org. +In case of further problems please subscribe and send questions to +the mailing list: linux-media@vger.kernel.org. Probing the cards with broken PCI subsystem ID ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -There are some TwinHan cards that the EEPROM has become corrupted for some -reason. The cards do not have correct PCI subsystem ID. But we can force -probing the cards with broken PCI subsystem ID - -.. code-block:: none +There are some TwinHan cards whose EEPROM has become corrupted for some +reason. The cards do not have a correct PCI subsystem ID. +Still, it is possible to force probing the cards with:: $ echo 109e 0878 $subvendor $subdevice > \ /sys/bus/pci/drivers/bt878/new_id -.. code-block:: none +The two numbers there are:: 109e: PCI_VENDOR_ID_BROOKTREE 0878: PCI_DEVICE_ID_BROOKTREE_878 - -- GitLab From 729126e4b4b3e1e7c774536fecd387271d87ef90 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 16:18:55 +0100 Subject: [PATCH 149/503] media: docs: update bttv.rst information This document is... old. The bttv driver was one of the first drivers at the Kernel. So, the document became a little obsoleted. Update it to reflect some changes that happened along the time affecting this driver and the subsystem. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/bttv.rst | 323 ++++++++++------------- 1 file changed, 139 insertions(+), 184 deletions(-) diff --git a/Documentation/admin-guide/media/bttv.rst b/Documentation/admin-guide/media/bttv.rst index 9b15a0cba283b..49382377b1dcb 100644 --- a/Documentation/admin-guide/media/bttv.rst +++ b/Documentation/admin-guide/media/bttv.rst @@ -1,48 +1,64 @@ .. SPDX-License-Identifier: GPL-2.0 +=============== The bttv driver =============== Release notes for bttv ---------------------- -You'll need at least these config options for bttv: +You'll need at least these config options for bttv:: -.. code-block:: none + ./scripts/config -e PCI + ./scripts/config -m I2C + ./scripts/config -m INPUT + ./scripts/config -m MEDIA_SUPPORT + ./scripts/config -e MEDIA_PCI_SUPPORT + ./scripts/config -e MEDIA_ANALOG_TV_SUPPORT + ./scripts/config -e MEDIA_DIGITAL_TV_SUPPORT + ./scripts/config -e MEDIA_RADIO_SUPPORT + ./scripts/config -e RC_CORE + ./scripts/config -m VIDEO_BT848 - CONFIG_I2C=m - CONFIG_I2C_ALGOBIT=m - CONFIG_VIDEO_DEV=m +If your board has digital TV, you'll also need:: -The latest bttv version is available from http://bytesex.org/bttv/ + ./scripts/config -m DVB_BT8XX +In this case, please see :doc:`bt8xx` for additional notes. Make bttv work with your card ----------------------------- -Just try "modprobe bttv" and see if that works. +If you have bttv compiled and installed, just booting the Kernel +should be enough for it to try probing it. However, depending +on the model, the Kernel may require additional information about +the hardware, as the device may not be able to provide such info +directly to the Kernel. If it doesn't bttv likely could not autodetect your card and needs some insmod options. The most important insmod option for bttv is "card=n" to select the correct card type. If you get video but no sound you've very likely specified the wrong (or no) card type. A list of supported -cards is in CARDLIST.bttv +cards is in :doc:`bttv-cardlist`. If bttv takes very long to load (happens sometimes with the cheap -cards which have no tuner), try adding this to your modules.conf: - -.. code-block:: none +cards which have no tuner), try adding this to your modules configuration +file (usually, it is either ``/etc/modules.conf`` or some file at +``/etc/modules-load.d/``, but the actual place depends on your +distribution):: options i2c-algo-bit bit_test=1 -For the WinTV/PVR you need one firmware file from the driver CD: -hcwamc.rbf. The file is in the pvr45xxx.exe archive (self-extracting -zip file, unzip can unpack it). Put it into the /etc/pvr directory or -use the firm_altera= insmod option to point the driver to the -location of the file. +Some cards may require an extra firmware file to work. For example, +for the WinTV/PVR you need one firmware file from its driver CD, +called: ``hcwamc.rbf``. It is inside a self-extracting zip file +called ``pvr45xxx.exe``. Just placing it at the ``/etc/firmware`` +directory should be enough for it to be autoload during the driver's +probing mode (e. g. when the Kernel boots or when the driver is +manually loaded via ``modprobe`` command). -If your card isn't listed in CARDLIST.bttv or if you have trouble making -audio work, you should read the Sound-FAQ. +If your card isn't listed in :doc:`bttv-cardlist` or if you have +trouble making audio work, please read :ref:`still_doesnt_work`. Autodetecting cards @@ -61,9 +77,11 @@ the Subsystem ID in the second line, looks like this: only bt878-based cards can have a subsystem ID (which does not mean that every card really has one). bt848 cards can't have a Subsystem ID and therefore can't be autodetected. There is a list with the ID's -in bttv-cards.c (in case you are intrested or want to mail patches -with updates). +at :doc:`bttv-cardlist` (in case you are intrested or want to mail +patches with updates). + +.. _still_doesnt_work: Still doesn't work? ------------------- @@ -71,6 +89,7 @@ Still doesn't work? I do NOT have a lab with 30+ different grabber boards and a PAL/NTSC/SECAM test signal generator at home, so I often can't reproduce your problems. This makes debugging very difficult for me. + If you have some knowledge and spare time, please try to fix this yourself (patches very welcome of course...) You know: The linux slogan is "Do it yourself". @@ -92,102 +111,103 @@ at least the country you are living in). Modprobe options ---------------- -Note: "modinfo " prints various information about a kernel -module, among them a complete and up-to-date list of insmod options. -This list tends to be outdated because it is updated manually ... - -========================================================================== +.. note:: -bttv.o -.. code-block:: none - - the bt848/878 (grabber chip) driver - - insmod args: - card=n card type, see CARDLIST for a list. - tuner=n tuner type, see CARDLIST for a list. - radio=0/1 card supports radio - pll=0/1/2 pll settings - 0: don't use PLL - 1: 28 MHz crystal installed - 2: 35 MHz crystal installed - - triton1=0/1 for Triton1 (+others) compatibility - vsfx=0/1 yet another chipset bug compatibility bit - see README.quirks for details on these two. - - bigendian=n Set the endianness of the gfx framebuffer. - Default is native endian. - fieldnr=0/1 Count fields. Some TV descrambling software - needs this, for others it only generates - 50 useless IRQs/sec. default is 0 (off). - autoload=0/1 autoload helper modules (tuner, audio). - default is 1 (on). - bttv_verbose=0/1/2 verbose level (at insmod time, while - looking at the hardware). default is 1. - bttv_debug=0/1 debug messages (for capture). - default is 0 (off). - irq_debug=0/1 irq handler debug messages. - default is 0 (off). - gbuffers=2-32 number of capture buffers for mmap'ed capture. - default is 4. - gbufsize= size of capture buffers. default and - maximum value is 0x208000 (~2MB) - no_overlay=0 Enable overlay on broken hardware. There - are some chipsets (SIS for example) which - are known to have problems with the PCI DMA - push used by bttv. bttv will disable overlay - by default on this hardware to avoid crashes. - With this insmod option you can override this. - no_overlay=1 Disable overlay. It should be used by broken - hardware that doesn't support PCI2PCI direct - transfers. - automute=0/1 Automatically mutes the sound if there is - no TV signal, on by default. You might try - to disable this if you have bad input signal - quality which leading to unwanted sound - dropouts. - chroma_agc=0/1 AGC of chroma signal, off by default. - adc_crush=0/1 Luminance ADC crush, on by default. - i2c_udelay= Allow reduce I2C speed. Default is 5 usecs - (meaning 66,67 Kbps). The default is the - maximum supported speed by kernel bitbang - algorithm. You may use lower numbers, if I2C - messages are lost (16 is known to work on - all supported cards). - - bttv_gpio=0/1 - gpiomask= - audioall= - audiomux= - See Sound-FAQ for a detailed description. + The following argument list can be outdated, as we might add more + options if ever needed. In case of doubt, please check with + ``modinfo ``. + + This command prints various information about a kernel + module, among them a complete and up-to-date list of insmod options. + + + +bttv + The bt848/878 (grabber chip) driver + + insmod args:: + + card=n card type, see CARDLIST for a list. + tuner=n tuner type, see CARDLIST for a list. + radio=0/1 card supports radio + pll=0/1/2 pll settings + + 0: don't use PLL + 1: 28 MHz crystal installed + 2: 35 MHz crystal installed + + triton1=0/1 for Triton1 (+others) compatibility + vsfx=0/1 yet another chipset bug compatibility bit + see README.quirks for details on these two. + + bigendian=n Set the endianness of the gfx framebuffer. + Default is native endian. + fieldnr=0/1 Count fields. Some TV descrambling software + needs this, for others it only generates + 50 useless IRQs/sec. default is 0 (off). + autoload=0/1 autoload helper modules (tuner, audio). + default is 1 (on). + bttv_verbose=0/1/2 verbose level (at insmod time, while + looking at the hardware). default is 1. + bttv_debug=0/1 debug messages (for capture). + default is 0 (off). + irq_debug=0/1 irq handler debug messages. + default is 0 (off). + gbuffers=2-32 number of capture buffers for mmap'ed capture. + default is 4. + gbufsize= size of capture buffers. default and + maximum value is 0x208000 (~2MB) + no_overlay=0 Enable overlay on broken hardware. There + are some chipsets (SIS for example) which + are known to have problems with the PCI DMA + push used by bttv. bttv will disable overlay + by default on this hardware to avoid crashes. + With this insmod option you can override this. + no_overlay=1 Disable overlay. It should be used by broken + hardware that doesn't support PCI2PCI direct + transfers. + automute=0/1 Automatically mutes the sound if there is + no TV signal, on by default. You might try + to disable this if you have bad input signal + quality which leading to unwanted sound + dropouts. + chroma_agc=0/1 AGC of chroma signal, off by default. + adc_crush=0/1 Luminance ADC crush, on by default. + i2c_udelay= Allow reduce I2C speed. Default is 5 usecs + (meaning 66,67 Kbps). The default is the + maximum supported speed by kernel bitbang + algorithm. You may use lower numbers, if I2C + messages are lost (16 is known to work on + all supported cards). + + bttv_gpio=0/1 + gpiomask= + audioall= + audiomux= + See Sound-FAQ for a detailed description. remap, card, radio and pll accept up to four comma-separated arguments (for multiple boards). -tuner.o - -.. code-block:: none - +tuner The tuner driver. You need this unless you want to use only - with a camera or external tuner ... + with a camera or the board doesn't provide analog TV tuning. + + insmod args:: - insmod args: debug=1 print some debug info to the syslog type=n type of the tuner chip. n as follows: see CARDLIST for a complete list. pal=[bdgil] select PAL variant (used for some tuners only, important for the audio carrier). -tvaudio.o - -.. code-block:: none +tvaudio + Provide a single driver for all simple i2c audio control + chips (tda/tea*). - new, experimental module which is supported to provide a single - driver for all simple i2c audio control chips (tda/tea*). + insmod args:: - insmod args: tda8425 = 1 enable/disable the support for the tda9840 = 1 various chips. tda9850 = 1 The tea6300 can't be autodetected and is @@ -200,45 +220,12 @@ tvaudio.o the wrong one. debug = 1 print debug messages - insmod args for tda9874a: - tda9874a_SIF=1/2 select sound IF input pin (1 or 2) - (default is pin 1) - tda9874a_AMSEL=0/1 auto-mute select for NICAM (default=0) - Please read note 3 below! - tda9874a_STD=n select TV sound standard (0..8): - 0 - A2, B/G - 1 - A2, M (Korea) - 2 - A2, D/K (1) - 3 - A2, D/K (2) - 4 - A2, D/K (3) - 5 - NICAM, I - 6 - NICAM, B/G - 7 - NICAM, D/K (default) - 8 - NICAM, L - - Note 1: tda9874a supports both tda9874h (old) and tda9874a (new) chips. - Note 2: tda9874h/a and tda9875 (which is supported separately by - tda9875.o) use the same i2c address so both modules should not be - used at the same time. - Note 3: Using tda9874a_AMSEL option depends on your TV card design! - AMSEL=0: auto-mute will switch between NICAM sound - and the sound on 1st carrier (i.e. FM mono or AM). - AMSEL=1: auto-mute will switch between NICAM sound - and the analog mono input (MONOIN pin). - If tda9874a decoder on your card has MONOIN pin not connected, then - use only tda9874_AMSEL=0 or don't specify this option at all. - For example: - card=65 (FlyVideo 2000S) - set AMSEL=1 or AMSEL=0 - card=72 (Prolink PV-BT878P rev.9B) - set AMSEL=0 only - -msp3400.o - -.. code-block:: none - +msp3400 The driver for the msp34xx sound processor chips. If you have a stereo card, you probably want to insmod this one. - insmod args: + insmod args:: + debug=1/2 print some debug info to the syslog, 2 is more verbose. simple=1 Use the "short programming" method. Newer @@ -252,40 +239,6 @@ msp3400.o should improve things for french people, the carrier autoscan seems to work with FM only... -tea6300.o - OBSOLETE (use tvaudio instead) - -.. code-block:: none - - The driver for the tea6300 fader chip. If you have a stereo - card and the msp3400.o doesn't work, you might want to try this - one. This chip is seen on most STB TV/FM cards (usually from - Gateway OEM sold surplus on auction sites). - - insmod args: - debug=1 print some debug info to the syslog. - -tda8425.o - OBSOLETE (use tvaudio instead) - -.. code-block:: none - - The driver for the tda8425 fader chip. This driver used to be - part of bttv.c, so if your sound used to work but does not - anymore, try loading this module. - - insmod args: - debug=1 print some debug info to the syslog. - -tda985x.o - OBSOLETE (use tvaudio instead) - -.. code-block:: none - - The driver for the tda9850/55 audio chips. - - insmod args: - debug=1 print some debug info to the syslog. - chip=9850/9855 set the chip type. - - If the box freezes hard with bttv --------------------------------- @@ -306,15 +259,15 @@ bug. It is very helpful if you can tell where exactly it broke With a hard freeze you probably doesn't find anything in the logfiles. The only way to capture any kernel messages is to hook up a serial console and let some terminal application log the messages. /me uses -screen. See Documentation/admin-guide/serial-console.rst for details on setting +screen. See :doc:`/admin-guide/serial-console` for details on setting up a serial console. -Read Documentation/admin-guide/bug-hunting.rst to learn how to get any useful +Read :doc:`/admin-guide/bug-hunting` to learn how to get any useful information out of a register+stack dump printed by the kernel on protection faults (so-called "kernel oops"). If you run into some kind of deadlock, you can try to dump a call trace -for each process using sysrq-t (see Documentation/admin-guide/sysrq.rst). +for each process using sysrq-t (see :doc:`/admin-guide/sysrq`). This way it is possible to figure where *exactly* some process in "D" state is stuck. @@ -443,9 +396,7 @@ Other elements of the tvcards array ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ If you are trying to make a new card work you might find it useful to -know what the other elements in the tvcards array are good for: - -.. code-block:: none +know what the other elements in the tvcards array are good for:: video_inputs - # of video inputs the card has audio_inputs - historical cruft, not used any more. @@ -678,7 +629,9 @@ Typhoon TV card series: ~~~~~~~~~~~~~~~~~~~~~~~ These can be CPH, Flyvideo, Pixelview or KNC1 series. + Typhoon is the brand of Anubis. + Model 50680 got re-used, some model no. had different contents over time. Models: @@ -830,12 +783,13 @@ is wrong. If it doesn't work, send me email. on their server are the full data-sheets, but don't ask how I found it. To use the driver I use the following options, the tuner and pll settings might -be different in your country +be different in your country. You can force it via modprobe parameters. +For example:: + + modprobe bttv tuner=1 pll=28 radio=1 card=17 -insmod videodev -insmod i2c scan=1 i2c_debug=0 verbose=0 -insmod tuner type=1 debug=0 -insmod bttv pll=1 radio=1 card=17 +Sets tuner type 1 (Philips PAL_I), PLL with a 28 MHz crystal, enables +FM radio and selects bttv card ID 17 (Leadtek WinView 601). KNC One @@ -854,15 +808,16 @@ KNC One Provideo ~~~~~~~~ -- PV951 or PV-951 (also are sold as: +- PV951 or PV-951, now named PV-951T + (also are sold as: Boeder TV-FM Video Capture Card, Titanmedia Supervision TV-2400, Provideo PV951 TF, 3DeMon PV951, MediaForte TV-Vision PV951, Yoko PV951, - Vivanco Tuner Card PCI Art.-Nr.: 68404, - ) now named PV-951T + Vivanco Tuner Card PCI Art.-Nr.: 68404 + ) - Surveillance Series: -- GitLab From 9fafef585718415bcacc8e3cae7d3cfbe43c4f70 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 16:35:26 +0100 Subject: [PATCH 150/503] media: docs: add a cardlist for cx18 boards There aren't many boards supported by this driver. So, add a list for it manually generated. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 1 + .../admin-guide/media/cx18-cardlist.rst | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 Documentation/admin-guide/media/cx18-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 14249f47fbc24..5c9c3c97bcb21 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -8,6 +8,7 @@ Cards List au0828-cardlist bttv-cardlist + cx18-cardlist cx23885-cardlist cx88-cardlist em28xx-cardlist diff --git a/Documentation/admin-guide/media/cx18-cardlist.rst b/Documentation/admin-guide/media/cx18-cardlist.rst new file mode 100644 index 0000000000000..26f2da9aa5427 --- /dev/null +++ b/Documentation/admin-guide/media/cx18-cardlist.rst @@ -0,0 +1,17 @@ +.. SPDX-License-Identifier: GPL-2.0 + +CX18 cards list +=============== + +Those cards are supported by cx18 driver: + +- Hauppauge HVR-1600 (ESMT memory) +- Hauppauge HVR-1600 (Samsung memory) +- Compro VideoMate H900 +- Yuan MPC718 MiniPCI DVB-T/Analog +- Conexant Raptor PAL/SECAM +- Toshiba Qosmio DVB-T/Analog +- Leadtek WinFast PVR2100 +- Leadtek WinFast DVR3100 +- GoTView PCI DVD3 Hybrid +- Hauppauge HVR-1600 (s5h1411/tda18271) -- GitLab From fe877259d8aa6af1161718f2aa8c6848efe3418b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 17:05:05 +0100 Subject: [PATCH 151/503] media: docs: cpia2.rst: do some cleanups Do some cleanups at the document in order to mark two literal blocks as such. While here, simplify two block markups, using the less verbose option (::). Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cpia2.rst | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/Documentation/admin-guide/media/cpia2.rst b/Documentation/admin-guide/media/cpia2.rst index 6f4258aebbfe2..f6ffef6864623 100644 --- a/Documentation/admin-guide/media/cpia2.rst +++ b/Documentation/admin-guide/media/cpia2.rst @@ -51,7 +51,7 @@ available at compile time. Setup ~~~~~ -Use 'modprobe cpia2' to load and 'modprobe -r cpia2' to unload. This +Use ``modprobe cpia2`` to load and ``modprobe -r cpia2`` to unload. This may be done automatically by your distribution. Driver options @@ -79,16 +79,12 @@ Setting the options ~~~~~~~~~~~~~~~~~~~ If you are using modules, edit /etc/modules.conf and add an options -line like this: - -.. code-block:: none +line like this:: options cpia2 num_buffers=3 buffer_size=65535 If the driver is compiled into the kernel, at boot time specify them -like this: - -.. code-block:: none +like this:: cpia2.num_buffers=3 cpia2.buffer_size=65535 -- GitLab From 8a1bfbc70d13e780e7bd11a9b42f9083910b4ed7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 9 Mar 2020 17:21:16 +0100 Subject: [PATCH 152/503] media: docs: update Digital TV faq.rst This file contains lots of obsoleted information. Update it to reflect the current status and tools used by Digital TV users and add pointers to the current locations and to LinuxTV wiki pages. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/faq.rst | 253 ++++++++++++++---------- 1 file changed, 150 insertions(+), 103 deletions(-) diff --git a/Documentation/admin-guide/media/faq.rst b/Documentation/admin-guide/media/faq.rst index 52f153d182782..b63548b6f3137 100644 --- a/Documentation/admin-guide/media/faq.rst +++ b/Documentation/admin-guide/media/faq.rst @@ -5,101 +5,143 @@ FAQ .. note:: - This documentation is outdated. Please check at the DVB wiki - at https://linuxtv.org/wiki for more updated info. + 1. With Digital TV, a single physical channel may have different + contents inside it. The specs call each one as a *service*. + This is what a TV user would call "channel". So, in order to + avoid confusion, we're calling *transponders* as the physical + channel on this FAQ, and *services* for the logical channel. + 2. The LinuxTV community maintains some Wiki pages with contain + a lot of information related to the media subsystem. If you + don't find an answer for your needs here, it is likely that + you'll be able to get something useful there. It is hosted + at: -Some very frequently asked questions about linuxtv-dvb + https://www.linuxtv.org/wiki/ + +Some very frequently asked questions about Linux Digital TV support 1. The signal seems to die a few seconds after tuning. It's not a bug, it's a feature. Because the frontends have significant power requirements (and hence get very hot), they are powered down if they are unused (i.e. if the frontend device - is closed). The dvb-core.o module parameter "dvb_shutdown_timeout" + is closed). The ``dvb-core`` module parameter ``dvb_shutdown_timeout`` allow you to change the timeout (default 5 seconds). Setting the timeout to 0 disables the timeout feature. 2. How can I watch TV? - The driver distribution includes some simple utilities which - are mainly intended for testing and to demonstrate how the - DVB API works. - - Depending on whether you have a DVB-S, DVB-C or DVB-T card, use - apps/szap/szap, czap or tzap. You must supply a channel list - in ~/.[sct]zap/channels.conf. If you are lucky you can just copy - one of the supplied channel lists, or you can create a new one - by running apps/scan/scan. If you run scan on an unknown network - you might have to supply some start data in apps/scan/initial.h. - - If you have a card with a built-in hardware MPEG-decoder the - drivers create a video4linux device (/dev/v4l/video0) which - you can use to watch TV with any v4l application. xawtv is known - to work. Note that you cannot change channels with xawtv, you - have to zap using [sct]zap. If you want a nice application for - TV watching and record/playback, have a look at VDR. - - If your card does not have a hardware MPEG decoder you need - a software MPEG decoder. Mplayer or xine are known to work. - Newsflash: MythTV also has DVB support now. - Note: Only very recent versions of Mplayer and xine can decode. - MPEG2 transport streams (TS) directly. Then, run - '[sct]zap channelname -r' in one xterm, and keep it running, - and start 'mplayer - < /dev/dvb/adapter0/dvr0' or - 'xine stdin://mpeg2 < /dev/dvb/adapter0/dvr0' in a second xterm. - That's all far from perfect, but it seems no one has written - a nice DVB application which includes a builtin software MPEG - decoder yet. - - Newsflash: Newest xine directly supports DVB. Just copy your - channels.conf to ~/.xine and start 'xine dvb://', or select - the DVB button in the xine GUI. Channel switching works using the - numpad pgup/pgdown (NP9 / NP3) keys to scroll through the channel osd - menu and pressing numpad-enter to switch to the selected channel. - - Note: Older versions of xine and mplayer understand MPEG program - streams (PS) only, and can be used in conjunction with the - ts2ps tool from the Metzler Brother's dvb-mpegtools package. - -3. Which other DVB applications exist? - - http://www.cadsoft.de/people/kls/vdr/ + Together with the Linux Kernel, the Digital TV developers support + some simple utilities which are mainly intended for testing + and to demonstrate how the DVB API works. This is called DVB v5 + tools and are grouped together with the ``v4l-utils`` git repository: + + https://git.linuxtv.org/v4l-utils.git/ + + You can find more information at the LinuxTV wiki: + + https://www.linuxtv.org/wiki/index.php/DVBv5_Tools + + The first step is to get a list of services that are transmitted. + + This is done by using several existing tools. You can use + for example the ``dvbv5-scan`` tool. You can find more information + about it at: + + https://www.linuxtv.org/wiki/index.php/Dvbv5-scan + + There are some other applications like ``w_scan`` [#]_ that do a + blind scan, trying hard to find all possible channels, but + those consumes a large amount of time to run. + + .. [#] https://www.linuxtv.org/wiki/index.php/W_scan + + Also, some applications like ``kaffeine`` have their own code + to scan for services. So, you don't need to use an external + application to obtain such list. + + Most of such tools need a file containing a list of channel + transponders available on your area. So, LinuxTV developers + maintain tables of Digital TV channel transponders, receiving + patches from the community to keep them updated. + + This list is hosted at: + + https://git.linuxtv.org/dtv-scan-tables.git + + And packaged on several distributions. + + Kaffeine has some blind scan support for some terrestrial standards. + It also relies on DTV scan tables, although it contains a copy + of it internally (and, if requested by the user, it will download + newer versions of it). + + If you are lucky you can just use one of the supplied channel + transponders. If not, you may need to seek for such info at + the Internet and create a new file. There are several sites with + contains physical channel lists. For cable and satellite, usually + knowing how to tune into a single channel is enough for the + scanning tool to identify the other channels. On some places, + this could also work for terrestrial transmissions. + + Once you have a transponders list, you need to generate a services + list with a tool like ``dvbv5-scan``. + + Almost all modern Digital TV cards don't have built-in hardware + MPEG-decoders. So, it is up to the application to get a MPEG-TS + stream provided by the board, split it into audio, video and other + data and decode. + +3. Which Digital TV applications exist? + + Several media player applications are capable of tuning into + digital TV channels, including Kaffeine, Vlc, mplayer and MythTV. + + Kaffeine aims to be very user-friendly, and it is maintained + by one of the Kernel driver developers. + + A comprehensive list of those and other apps can be found at: + + https://www.linuxtv.org/wiki/index.php/TV_Related_Software + + Some of the most popular ones are linked below: + + https://kde.org/applications/multimedia/org.kde.kaffeine + KDE media player, focused on Digital TV support + + https://www.linuxtv.org/vdrwiki/index.php/Main_Page Klaus Schmidinger's Video Disk Recorder - http://www.metzlerbros.org/dvb/ - Metzler Bros. DVB development; alternate drivers and - DVB utilities, include dvb-mpegtools and tuxzap. + https://linuxtv.org/downloads and https://git.linuxtv.org/ + Digital TV and other media-related applications and + Kernel drivers. The ``v4l-utils`` package there contains + several swiss knife tools for using with Digital TV. http://sourceforge.net/projects/dvbtools/ Dave Chapman's dvbtools package, including dvbstream and dvbtune - http://www.linuxdvb.tv/ - Henning Holtschneider's site with many interesting - links and docs - http://www.dbox2.info/ LinuxDVB on the dBox2 - http://www.tuxbox.org/ and http://cvs.tuxbox.org/ + http://www.tuxbox.org/ the TuxBox CVS many interesting DVB applications and the dBox2 DVB source - https://linuxtv.org/downloads - DVB Swiss Army Knife library and utilities - http://www.nenie.org/misc/mpsys/ MPSYS: a MPEG2 system library and tools + https://www.videolan.org/vlc/index.pt.html + Vlc + http://mplayerhq.hu/ - mplayer + MPlayer http://xine.sourceforge.net/ and http://xinehq.de/ - xine + Xine http://www.mythtv.org/ - MythTV - analog TV PVR, but now with DVB support, too - (with software MPEG decode) + MythTV - analog TV and digital TV PVR http://dvbsnoop.sourceforge.net/ DVB sniffer program to monitor, analyze, debug, dump @@ -108,62 +150,67 @@ Some very frequently asked questions about linuxtv-dvb 4. Can't get a signal tuned correctly - If you are using a Technotrend/Hauppauge DVB-C card *without* analog - module, you might have to use module parameter adac=-1 (dvb-ttpci.o). + That could be due to a lot of problems. On my personal experience, + usually TV cards need stronger signals than TV sets, and are more + sensitive to noise. So, perhaps you just need a better antenna or + cabling. Yet, it could also be some hardware or driver issue. + + For example, if you are using a Technotrend/Hauppauge DVB-C card + *without* analog module, you might have to use module parameter + adac=-1 (dvb-ttpci.o). + + Please see the FAQ page at linuxtv.org, as it could contain some + valuable information: + + https://www.linuxtv.org/wiki/index.php/FAQ_%26_Troubleshooting + + If that doesn't work, check at the linux-media ML archives, to + see if someone else had a similar problem with your hardware + and/or digital TV service provider: + + https://lore.kernel.org/linux-media/ + + If none of this works, you can try sending an e-mail to the + linux-media ML and see if someone else could shed some light. + The e-mail is linux-media AT vger.kernel.org. 5. The dvb_net device doesn't give me any packets at all - Run tcpdump on the dvb0_0 interface. This sets the interface + Run ``tcpdump`` on the ``dvb0_0`` interface. This sets the interface into promiscuous mode so it accepts any packets from the PID - you have configured with the dvbnet utility. Check if there + you have configured with the ``dvbnet`` utility. Check if there are any packets with the IP addr and MAC addr you have - configured with ifconfig. + configured with ``ifconfig`` or with ``ip addr``. - If tcpdump doesn't give you any output, check the statistics - which ifconfig outputs. (Note: If the MAC address is wrong, - dvb_net won't get any input; thus you have to run tcpdump - before checking the statistics.) If there are no packets at - all then maybe the PID is wrong. If there are error packets, + If ``tcpdump`` doesn't give you any output, check the statistics + which ``ifconfig`` or ``netstat -ni`` outputs. (Note: If the MAC + address is wrong, ``dvb_net`` won't get any input; thus you have to + run ``tcpdump`` before checking the statistics.) If there are no + packets at all then maybe the PID is wrong. If there are error packets, then either the PID is wrong or the stream does not conform to the MPE standard (EN 301 192, http://www.etsi.org/). You can - use e.g. dvbsnoop for debugging. + use e.g. ``dvbsnoop`` for debugging. -6. The dvb_net device doesn't give me any multicast packets +6. The ``dvb_net`` device doesn't give me any multicast packets Check your routes if they include the multicast address range. Additionally make sure that "source validation by reversed path - lookup" is disabled: - -.. code-block:: none + lookup" is disabled:: $ "echo 0 > /proc/sys/net/ipv4/conf/dvb0/rp_filter" -7. What the hell are all those modules that need to be loaded? - - For a dvb-ttpci av7110 based full-featured card the following - modules are loaded: - - - videodev: Video4Linux core module. This is the base module that - gives you access to the "analog" tv picture of the av7110 mpeg2 - decoder. - - - v4l2-common: common functions for Video4Linux-2 drivers - - - v4l1-compat: backward compatibility layer for Video4Linux-1 legacy - applications - - - dvb-core: DVB core module. This provides you with the - /dev/dvb/adapter entries - - - saa7146: SAA7146 core driver. This is need to access any SAA7146 - based card in your system. - - - saa7146_vv: SAA7146 video and vbi functions. These are only needed - for full-featured cards. +7. What are all those modules that need to be loaded? - - videobuf-dma-sg: capture helper module for the saa7146_vv driver. This - one is responsible to handle capture buffers. + In order to make it more flexible and support different hardware + combinations, the media subsystem is written on a modular way. - - dvb-ttpci: The main driver for AV7110 based, full-featured - DVB-S/C/T cards + So, besides the Digital TV hardware module for the main chipset, + it also needs to load a frontend driver, plus the Digital TV + core. If the board also has remote controller, it will also + need the remote controller core and the remote controller tables. + The same happens if the board has support for analog TV: the + core support for video4linux need to be loaded. + The actual module names are Linux-kernel version specific, as, + from time to time, things change, in order to make the media + support more flexible. -- GitLab From 12bcf90c693cc56dfde62690d4b38fd3332ed536 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Mar 2020 13:10:17 +0100 Subject: [PATCH 153/503] media: docs: saa7134.rst: update the documentation There are several things here that are outdated, because this document was written a long time ago. Update them to reflect the current status of the driver and the media subsystem. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/saa7134.rst | 57 +++++++++++++++------ 1 file changed, 42 insertions(+), 15 deletions(-) diff --git a/Documentation/admin-guide/media/saa7134.rst b/Documentation/admin-guide/media/saa7134.rst index c84246dd81c0f..7ab9c70b9abea 100644 --- a/Documentation/admin-guide/media/saa7134.rst +++ b/Documentation/admin-guide/media/saa7134.rst @@ -7,8 +7,7 @@ Author Gerd Hoffmann This is a v4l2/oss device driver for saa7130/33/34/35 based capture / TV -boards. See http://www.semiconductors.philips.com/pip/saa7134hl for a -description. +boards. Status @@ -24,26 +23,54 @@ configuration info. Build ----- -Pick up videodev + v4l2 patches from http://bytesex.org/patches/. -Configure, build, install + boot the new kernel. You'll need at least -these config options: +Once you pick up a Kernel source, you should configure, build, +install and boot the new kernel. You'll need at least +these config options:: -.. code-block:: none + ./scripts/config -e PCI + ./scripts/config -e INPUT + ./scripts/config -m I2C + ./scripts/config -m MEDIA_SUPPORT + ./scripts/config -e MEDIA_PCI_SUPPORT + ./scripts/config -e MEDIA_ANALOG_TV_SUPPORT + ./scripts/config -e MEDIA_DIGITAL_TV_SUPPORT + ./scripts/config -e MEDIA_RADIO_SUPPORT + ./scripts/config -e RC_CORE + ./scripts/config -e MEDIA_SUBDRV_AUTOSELECT + ./scripts/config -m VIDEO_SAA7134 + ./scripts/config -e SAA7134_ALSA + ./scripts/config -e VIDEO_SAA7134_RC + ./scripts/config -e VIDEO_SAA7134_DVB + ./scripts/config -e VIDEO_SAA7134_GO7007 - CONFIG_I2C=m - CONFIG_VIDEO_DEV=m +To build and install, you should run:: -Type "make" to build the driver now. "make install" installs the -driver. "modprobe saa7134" should load it. Depending on the card you -might have to pass card= as insmod option, check CARDLIST for -valid choices. + make && make modules_install && make install + +Once the new Kernel is booted, saa7134 driver should be loaded automatically. + +Depending on the card you might have to pass ``card=`` as insmod option. +If so, please check :doc:`saa7134-cardlist` for valid choices. + +Once you have your card type number, you can pass a modules configuration +via a file (usually, it is either ``/etc/modules.conf`` or some file at +``/etc/modules-load.d/``, but the actual place depends on your +distribution), with this content:: + + options saa7134 card=13 # Assuming that your card type is #13 Changes / Fixes --------------- -Please mail me unified diffs ("diff -u") with your changes, and don't -forget to tell me what it changes / which problem it fixes / whatever +Please mail to linux-media AT vger.kernel.org unified diffs against +the linux media git tree: + + https://git.linuxtv.org/media_tree.git/ + +This is done by committing a patch at a clone of the git tree and +submitting the patch using ``git send-email``. Don't forget to +describe at the lots what it changes / which problem it fixes / whatever it is good for ... @@ -52,7 +79,7 @@ Known Problems * The tuner for the flyvideos isn't detected automatically and the default might not work for you depending on which version you have. - There is a tuner= insmod option to override the driver's default. + There is a ``tuner=`` insmod option to override the driver's default. Credits ------- -- GitLab From 08256f12ac56dfae0ddadc057bb4066e380b7078 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Mar 2020 13:38:34 +0100 Subject: [PATCH 154/503] media: docs: zr364xx: update documentation There aren't much to be done here... almost everything is still valid. The supported boards even reflect the current driver's state. Yet, some things changed, so let's keep this document updated. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/zr364xx.rst | 28 ++++++++------------- 1 file changed, 10 insertions(+), 18 deletions(-) diff --git a/Documentation/admin-guide/media/zr364xx.rst b/Documentation/admin-guide/media/zr364xx.rst index ec8acb3e98fc7..7291e54b8be39 100644 --- a/Documentation/admin-guide/media/zr364xx.rst +++ b/Documentation/admin-guide/media/zr364xx.rst @@ -7,24 +7,18 @@ site: http://royale.zerezo.com/zr364xx/ mail: royale@zerezo.com -.. note:: - - This documentation is outdated Introduction ------------ -This brings support under Linux for the Aiptek PocketDV 3300 in webcam -mode. If you just want to get on your PC the pictures and movies on the -camera, you should use the usb-storage module instead. +This brings support under Linux for the Aiptek PocketDV 3300 and similar +devices in webcam mode. If you just want to get on your PC the pictures +and movies on the camera, you should use the usb-storage module instead. The driver works with several other cameras in webcam mode (see the list below). -Maybe this code can work for other JPEG/USB cams based on the Coach -chips from Zoran? - Possible chipsets are : ZR36430 (ZR36430BGC) and maybe ZR36431, ZR36440, ZR36442... @@ -34,20 +28,18 @@ at the source code). You can get these values by looking at /var/log/messages when you plug your camera, or by typing : cat /sys/kernel/debug/usb/devices. -If you manage to use your cam with this code, you can send me a mail -(royale@zerezo.com) with the name of your cam and a patch if needed. - -This is a beta release of the driver. Since version 0.70, this driver is -only compatible with V4L2 API and 2.6.x kernels. If you need V4L1 or -2.4x kernels support, please use an older version, but the code is not -maintained anymore. Good luck! Install ------- -In order to use this driver, you must compile it with your kernel. +In order to use this driver, you must compile it with your kernel, +with the following config options:: -Location: Device Drivers -> Multimedia devices -> Video For Linux -> Video Capture Adapters -> V4L USB devices + ./scripts/config -e USB + ./scripts/config -m MEDIA_SUPPORT + ./scripts/config -e MEDIA_USB_SUPPORT + ./scripts/config -e MEDIA_CAMERA_SUPPORT + ./scripts/config -m USB_ZR364XX Usage ----- -- GitLab From 1c9eeba23227df126e7e8e3597df2d0e7ff39881 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Mar 2020 13:42:41 +0100 Subject: [PATCH 155/503] media: docs: get rid of obsoleted udev documentation This file is very old, and doesn't match the current udev behavior. I wanted to preserve it, because we'll need some udev description some day about how to keep names unique, but there's nothing here to help with that... So, be it: let's just discard this document, as it doesn't provide anything useful anymore. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/bt8xx.rst | 2 - Documentation/admin-guide/media/index.rst | 1 - Documentation/admin-guide/media/udev.rst | 63 ----------------------- 3 files changed, 66 deletions(-) delete mode 100644 Documentation/admin-guide/media/udev.rst diff --git a/Documentation/admin-guide/media/bt8xx.rst b/Documentation/admin-guide/media/bt8xx.rst index 707919f29c86a..a55f4f5af042a 100644 --- a/Documentation/admin-guide/media/bt8xx.rst +++ b/Documentation/admin-guide/media/bt8xx.rst @@ -74,8 +74,6 @@ Exceptions are: - Old TwinHan DST cards or clones with or without CA slot and not containing an Eeprom. -People running udev please see :doc:`udev`. - In the following cases overriding the PCI type detection for bttv and for dvb-bt8xx drivers by passing modprobe parameters may be necessary. diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index 11d01d681b57f..04bc259f3325e 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -84,7 +84,6 @@ Linux Digital TV driver-specific documentation opera-firmware technisat ttusb-dec - udev zr364xx ################################# diff --git a/Documentation/admin-guide/media/udev.rst b/Documentation/admin-guide/media/udev.rst deleted file mode 100644 index ca6c9c2269027..0000000000000 --- a/Documentation/admin-guide/media/udev.rst +++ /dev/null @@ -1,63 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -UDEV rules for DVB -================== - -.. note:: - - #) This documentation is outdated. Udev on modern distributions auto-detect - the DVB devices. - - #) **TODO:** change this document to explain how to make DVB devices - persistent, as, when a machine has multiple devices, they may be detected - on different orders, which could cause apps that relies on the device - numbers to fail. - -The DVB subsystem currently registers to the sysfs subsystem using the -"class_simple" interface. - -This means that only the basic information like module loading parameters -are presented through sysfs. Other things that might be interesting are -currently **not** available. - -Nevertheless it's now possible to add proper udev rules so that the -DVB device nodes are created automatically. - -We assume that you have udev already up and running and that have been -creating the DVB device nodes manually up to now due to the missing sysfs -support. - -0. Don't forget to disable your current method of creating the -device nodes manually. - -1. Unfortunately, you'll need a helper script to transform the kernel -sysfs device name into the well known dvb adapter / device naming scheme. -The script should be called "dvb.sh" and should be placed into a script -dir where udev can execute it, most likely /etc/udev/scripts/ - -So, create a new file /etc/udev/scripts/dvb.sh and add the following: - -.. code-block:: none - - #!/bin/sh - /bin/echo $1 | /bin/sed -e 's,dvb\([0-9]\)\.\([^0-9]*\)\([0-9]\),dvb/adapter\1/\2\3,' - -Don't forget to make the script executable with "chmod". - -1. You need to create a proper udev rule that will create the device nodes -like you know them. All real distributions out there scan the /etc/udev/rules.d -directory for rule files. The main udev configuration file /etc/udev/udev.conf -will tell you the directory where the rules are, most likely it's /etc/udev/rules.d/ - -Create a new rule file in that directory called "dvb.rule" and add the following line: - -.. code-block:: none - - KERNEL="dvb*", PROGRAM="/etc/udev/scripts/dvb.sh %k", NAME="%c" - -If you want more control over the device nodes (for example a special group membership) -have a look at "man udev". - -For every device that registers to the sysfs subsystem with a "dvb" prefix, -the helper script /etc/udev/scripts/dvb.sh is invoked, which will then -create the proper device node in your /dev/ directory. -- GitLab From 371f6ff57f56fc1f5b561f668d9f10eb2103068f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Mar 2020 15:53:39 +0100 Subject: [PATCH 156/503] media: docs: Add a master topic for the index file Right now, both V4L and Digital TV are shown as main titles. Instead, add a main title, in order to better display its output. While here, simplify the file, as we don't need to add a title for the indexes, nor we need copyright info, as everything there is GPL, as stated by the SPDX tags. Signed-off-by: Mauro Carvalho Chehab --- .../driver-api/media/drivers/index.rst | 37 ++++--------------- 1 file changed, 7 insertions(+), 30 deletions(-) diff --git a/Documentation/driver-api/media/drivers/index.rst b/Documentation/driver-api/media/drivers/index.rst index aafff51f7e0eb..0df85fc966056 100644 --- a/Documentation/driver-api/media/drivers/index.rst +++ b/Documentation/driver-api/media/drivers/index.rst @@ -2,15 +2,12 @@ .. include:: -################################################ -Video4Linux (V4L) driver-specific documentation -################################################ +=================================== +Media driver-specific documentation +=================================== -.. only:: html - - .. class:: toc-title - - Table of Contents +Video4Linux (V4L) drivers +========================= .. toctree:: :maxdepth: 5 @@ -30,28 +27,8 @@ Video4Linux (V4L) driver-specific documentation vimc-devel -############################################## -Linux Digital TV driver-specific documentation -############################################## - -**Copyright** |copy| 2001-2016 : LinuxTV Developers - -This documentation is free software; you can redistribute it and/or modify it -under the terms of the GNU General Public License as published by the Free -Software Foundation version 2 of the License. - -This program is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. - -For more details see the file COPYING in the source distribution of Linux. - -.. only:: html - - .. class:: toc-title - - Table of Contents +Digital TV drivers +================== .. toctree:: :maxdepth: 5 -- GitLab From 4605a6102a7bebabf3123b29daa94bea88b6a087 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 10 Mar 2020 16:01:08 +0100 Subject: [PATCH 157/503] media: docs: cleanup bttv-devel.rst file This file was converted from text at the early ReST days. We learnt a lot about how to produce a nicer result while keeping the file better readable as plain text. Change some ReST markups to make it look better, both at the output formats and as plain text file. While here, remove references for the old bt848/winutil tool, as it seems that it doesn't exist anymore. Signed-off-by: Mauro Carvalho Chehab --- .../driver-api/media/drivers/bttv-devel.rst | 53 ++++++++----------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/Documentation/driver-api/media/drivers/bttv-devel.rst b/Documentation/driver-api/media/drivers/bttv-devel.rst index 396fad572c939..c9aa8b95a5e5f 100644 --- a/Documentation/driver-api/media/drivers/bttv-devel.rst +++ b/Documentation/driver-api/media/drivers/bttv-devel.rst @@ -15,15 +15,15 @@ To handle the grabber boards correctly, there is a array tvcards[] in bttv-cards.c, which holds the information required for each board. Sound will work only, if the correct entry is used (for video it often makes no difference). The bttv driver prints a line to the kernel -log, telling which card type is used. Like this one: - -.. code-block:: none +log, telling which card type is used. Like this one:: bttv0: model: BT848(Hauppauge old) [autodetected] You should verify this is correct. If it isn't, you have to pass the -correct board type as insmod argument, "insmod bttv card=2" for -example. The file CARDLIST has a list of valid arguments for card. +correct board type as insmod argument, ``insmod bttv card=2`` for +example. The file :doc:`/admin-guide/media/bttv-cardlist` has a list +of valid arguments for card. + If your card isn't listed there, you might check the source code for new entries which are not listed yet. If there isn't one for your card, you can check if one of the existing entries does work for you @@ -32,7 +32,7 @@ card, you can check if one of the existing entries does work for you Some boards have an extra processor for sound to do stereo decoding and other nice features. The msp34xx chips are used by Hauppauge for example. If your board has one, you might have to load a helper -module like msp3400.o to make sound work. If there isn't one for the +module like ``msp3400`` to make sound work. If there isn't one for the chip used on your board: Bad luck. Start writing a new one. Well, you might want to check the video4linux mailing list archive first... @@ -49,8 +49,8 @@ Below is a do-it-yourself description for you. The bt8xx chips have 32 general purpose pins, and registers to control these pins. One register is the output enable register -(BT848_GPIO_OUT_EN), it says which pins are actively driven by the -bt848 chip. Another one is the data register (BT848_GPIO_DATA), where +(``BT848_GPIO_OUT_EN``), it says which pins are actively driven by the +bt848 chip. Another one is the data register (``BT848_GPIO_DATA``), where you can get/set the status if these pins. They can be used for input and output. @@ -62,25 +62,23 @@ to connect the mux chip. As mentioned above, there is a array which holds the required information for each known board. You basically have to create a new -line for your board. The important fields are these two: - -.. code-block:: c +line for your board. The important fields are these two:: - struct tvcard - { - [ ... ] - u32 gpiomask; - u32 audiomux[6]; /* Tuner, Radio, external, internal, mute, stereo */ - }; + struct tvcard + { + [ ... ] + u32 gpiomask; + u32 audiomux[6]; /* Tuner, Radio, external, internal, mute, stereo */ + }; gpiomask specifies which pins are used to control the audio mux chip. The corresponding bits in the output enable register -(BT848_GPIO_OUT_EN) will be set as these pins must be driven by the +(``BT848_GPIO_OUT_EN``) will be set as these pins must be driven by the bt848 chip. -The audiomux\[\] array holds the data values for the different inputs +The ``audiomux[]`` array holds the data values for the different inputs (i.e. which pins must be high/low for tuner/mute/...). This will be -written to the data register (BT848_GPIO_DATA) to switch the audio +written to the data register (``BT848_GPIO_DATA``) to switch the audio mux. @@ -88,12 +86,9 @@ What you have to do is figure out the correct values for gpiomask and the audiomux array. If you have Windows and the drivers four your card installed, you might to check out if you can read these registers values used by the windows driver. A tool to do this is available -from ftp://telepresence.dmem.strath.ac.uk/pub/bt848/winutil, but it -doesn't work with bt878 boards according to some reports I received. -Another one with bt878 support is available from -http://btwincap.sourceforge.net/Files/btspy2.00.zip +from http://btwincap.sourceforge.net/download.html. -You might also dig around in the \*.ini files of the Windows applications. +You might also dig around in the ``*.ini`` files of the Windows applications. You can have a look at the board to see which of the gpio pins are connected at all and then start trial-and-error ... @@ -101,18 +96,16 @@ connected at all and then start trial-and-error ... Starting with release 0.7.41 bttv has a number of insmod options to make the gpio debugging easier: -.. code-block:: none - + ================= ============================================== bttv_gpio=0/1 enable/disable gpio debug messages gpiomask=n set the gpiomask value audiomux=i,j,... set the values of the audiomux array audioall=a set the values of the audiomux array (one value for all array elements, useful to check out which effect the particular value has). + ================= ============================================== -The messages printed with bttv_gpio=1 look like this: - -.. code-block:: none +The messages printed with ``bttv_gpio=1`` look like this:: bttv0: gpio: en=00000027, out=00000024 in=00ffffd8 [audio: off] -- GitLab From ef7f0c9539d8a1e7de8e3e62788774b0bdbf30e9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 31 Mar 2020 14:21:28 +0200 Subject: [PATCH 158/503] media: docs: fix references for vimc As the test drivers got moved, we need to update the cross-references accordingly. Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index db9937643a6cc..3cb1b45a56242 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17834,7 +17834,7 @@ L: linux-media@vger.kernel.org S: Maintained W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: drivers/media/platform/vimc/* +F: drivers/media/test_drivers/vimc/* VIRT LIB M: Alex Williamson -- GitLab From cc5d250e5a3b6b50b84b497a5c97ff0c2e59bd20 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 31 Mar 2020 14:34:29 +0200 Subject: [PATCH 159/503] media: docs: move copyrights to the end and update them The copyright info is not the most valuable information there. Move them to the end. While here, change the copyright to cover up to this year (2020). Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/index.rst | 25 +++++++++++++------- Documentation/driver-api/media/index.rst | 26 +++++++++++++-------- Documentation/userspace-api/media/index.rst | 16 ++++++++----- 3 files changed, 42 insertions(+), 25 deletions(-) diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index 04bc259f3325e..eb1d82dffcc97 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -2,18 +2,9 @@ .. include:: -**Copyright** |copy| 1999-2020 : LinuxTV Developers -This documentation is free software; you can redistribute it and/or modify it -under the terms of the GNU General Public License as published by the Free -Software Foundation version 2 of the License. -This program is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -For more details see the file COPYING in the source distribution of Linux. .. _uapi-v4l-drivers: @@ -101,3 +92,19 @@ CEC driver-specific documentation :numbered: pulse8-cec + +**Copyright** |copy| 1999-2020 : LinuxTV Developers + +:: + + This documentation is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + For more details see the file COPYING in the source distribution of Linux. diff --git a/Documentation/driver-api/media/index.rst b/Documentation/driver-api/media/index.rst index 57383df79bd36..5e9f67f34081b 100644 --- a/Documentation/driver-api/media/index.rst +++ b/Documentation/driver-api/media/index.rst @@ -6,19 +6,9 @@ Media subsystem kernel internal API =================================== -**Copyright** |copy| 2009-2016 : LinuxTV Developers -This documentation is free software; you can redistribute it and/or modify it -under the terms of the GNU General Public License as published by the Free -Software Foundation; either version 2 of the License, or (at your option) any -later version. -This program is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -For more details see the file COPYING in the source distribution of Linux. .. only:: html @@ -38,3 +28,19 @@ For more details see the file COPYING in the source distribution of Linux. csi2 drivers/index + +**Copyright** |copy| 2009-2020 : LinuxTV Developers + +:: + + This documentation is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + For more details see the file COPYING in the source distribution of Linux. diff --git a/Documentation/userspace-api/media/index.rst b/Documentation/userspace-api/media/index.rst index bcfdd1a5caa02..2c2c96a6f1463 100644 --- a/Documentation/userspace-api/media/index.rst +++ b/Documentation/userspace-api/media/index.rst @@ -6,13 +6,7 @@ Linux Media Infrastructure userspace API ######################################## -**Copyright** |copy| 2009-2016 : LinuxTV Developers -Permission is granted to copy, distribute and/or modify this document -under the terms of the GNU Free Documentation License, Version 1.1 or -any later version published by the Free Software Foundation, with no -Invariant Sections. A copy of the license is included in the chapter -entitled "GNU Free Documentation License". .. only:: html @@ -33,3 +27,13 @@ entitled "GNU Free Documentation License". fdl-appendix drivers/index + +**Copyright** |copy| 2009-2020 : LinuxTV Developers + +:: + + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.1 or + any later version published by the Free Software Foundation, with no + Invariant Sections. A copy of the license is included in the chapter + entitled "GNU Free Documentation License". -- GitLab From e4da97eb3a0969e240a276562b45fb1ba2a343a3 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 31 Mar 2020 14:44:49 +0200 Subject: [PATCH 160/503] media: docs: add GPLv2 for uAPI guide Newer uAPI docs should be dual-licensed with both GPL and GFDL. Add a text adding the GPLv2 license text there, in order to be coherent with the included docs. Signed-off-by: Mauro Carvalho Chehab --- Documentation/userspace-api/media/index.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/userspace-api/media/index.rst b/Documentation/userspace-api/media/index.rst index 2c2c96a6f1463..b20010f414b36 100644 --- a/Documentation/userspace-api/media/index.rst +++ b/Documentation/userspace-api/media/index.rst @@ -37,3 +37,20 @@ Linux Media Infrastructure userspace API any later version published by the Free Software Foundation, with no Invariant Sections. A copy of the license is included in the chapter entitled "GNU Free Documentation License". + +Please notice that some documents inside the media userspace API, +when explicitly mentioned on its source code, are dual-licensed +with GNU Free Documentation License Version 1.1 and with the +GNU General Public License:: + + This documentation is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + For more details see the file COPYING in the source distribution of Linux. -- GitLab From 63735af86d645a47903f912ae89957507edd917b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 31 Mar 2020 14:44:56 +0200 Subject: [PATCH 161/503] media: docs: add cros-references to the other media guides In order to make easier for people to navigate between the three media guides, add cross-references between them Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/index.rst | 12 ++++++++++++ Documentation/driver-api/media/index.rst | 8 ++++++++ Documentation/userspace-api/media/index.rst | 11 +++++++++++ 3 files changed, 31 insertions(+) diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index eb1d82dffcc97..6e5e6bdb6d4ba 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -2,9 +2,21 @@ .. include:: +============================ +Media subsystem usage guides +============================ +This section contains usage information about media subsystem and +its supported drivers. +Please see: +- :doc:`/userspace-api/media/index` + for the userspace APIs used on media devices. + +- :doc:`/driver-api/media/index` + for driver development information and Kernel APIs used by + media devices; .. _uapi-v4l-drivers: diff --git a/Documentation/driver-api/media/index.rst b/Documentation/driver-api/media/index.rst index 5e9f67f34081b..328350924853e 100644 --- a/Documentation/driver-api/media/index.rst +++ b/Documentation/driver-api/media/index.rst @@ -6,8 +6,16 @@ Media subsystem kernel internal API =================================== +This section contains usage information about media subsystem and +its supported drivers. +Please see: +- :doc:`/admin-guide/media/index` + for usage information about media subsystem and supported drivers; + +- :doc:`/userspace-api/media/index` + for the userspace APIs used on media devices. .. only:: html diff --git a/Documentation/userspace-api/media/index.rst b/Documentation/userspace-api/media/index.rst index b20010f414b36..70a3f3d73698a 100644 --- a/Documentation/userspace-api/media/index.rst +++ b/Documentation/userspace-api/media/index.rst @@ -6,6 +6,17 @@ Linux Media Infrastructure userspace API ######################################## +This section contains the driver development information and Kernel APIs +used by media devices. + +Please see: + +- :doc:`/admin-guide/media/index` + for usage information about media subsystem and supported drivers; + +- :doc:`/driver-api/media/index` + for driver development information and Kernel APIs used by + media devices; .. only:: html -- GitLab From 5c57ae64e8bccc693a96b4bbd9b20cc5890aeb69 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 15:39:38 +0200 Subject: [PATCH 162/503] media: i2c/Kconfig: use sub-menus for I2C support There are *lots* of I2C ancillary drivers. While we're using comments to group them, all options appear at the same menu. It should be a lot clearer to group them into sub-menus, with may help people to go directly to the driver(s) he's needing to enable. Suggested-by: Hans Verkuil Acked-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/Kconfig | 1 - drivers/media/dvb-frontends/Kconfig | 2 +- drivers/media/i2c/Kconfig | 64 +++++++++++++++++++---------- drivers/media/spi/Kconfig | 4 +- drivers/media/tuners/Kconfig | 2 +- 5 files changed, 46 insertions(+), 27 deletions(-) diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index ba24db7eb4d6d..1b7bcbfa7ff93 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -247,7 +247,6 @@ config MEDIA_HIDE_ANCILLARY_SUBDRV default y menu "Media ancillary drivers" - visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config MEDIA_ATTACH bool diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig index aa24506257b3a..fbadba9b328ea 100644 --- a/drivers/media/dvb-frontends/Kconfig +++ b/drivers/media/dvb-frontends/Kconfig @@ -2,7 +2,7 @@ if MEDIA_DIGITAL_TV_SUPPORT -comment "DVB Frontend drivers hidden by 'Autoselect ancillary drivers'" +comment "DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers'" depends on MEDIA_HIDE_ANCILLARY_SUBDRV menu "Customise DVB Frontends" diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index efd12bf4f8eb3..3abc80373ec05 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -5,6 +5,9 @@ if VIDEO_V4L2 +comment "IR I2C driver auto-selected by 'Autoselect ancillary drivers'" + depends on MEDIA_SUBDRV_AUTOSELECT && I2C && RC_CORE + config VIDEO_IR_I2C tristate "I2C module for IR" if !MEDIA_SUBDRV_AUTOSELECT || EXPERT depends on I2C && RC_CORE @@ -22,17 +25,14 @@ config VIDEO_IR_I2C # V4L2 I2C drivers that aren't related with Camera support # -comment "I2C drivers hidden by 'Autoselect ancillary drivers'" +comment "audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers'" depends on MEDIA_HIDE_ANCILLARY_SUBDRV - -menu "I2C Encoders, decoders, sensors and other helper chips" - visible if !MEDIA_HIDE_ANCILLARY_SUBDRV - # # Encoder / Decoder module configuration # -comment "Audio decoders, processors and mixers" +menu "Audio decoders, processors and mixers" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config VIDEO_TVAUDIO tristate "Simple audio decoder chips" @@ -191,8 +191,10 @@ config VIDEO_SONY_BTF_MPX To compile this driver as a module, choose M here: the module will be called sony-btf-mpx. +endmenu -comment "RDS decoders" +menu "RDS decoders" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config VIDEO_SAA6588 tristate "SAA6588 Radio Chip RDS decoder support" @@ -205,8 +207,10 @@ config VIDEO_SAA6588 To compile this driver as a module, choose M here: the module will be called saa6588. +endmenu -comment "Video decoders" +menu "Video decoders" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config VIDEO_ADV7180 tristate "Analog Devices ADV7180 decoder" @@ -473,7 +477,10 @@ config VIDEO_SAA717X source "drivers/media/i2c/cx25840/Kconfig" -comment "Video encoders" +endmenu + +menu "Video encoders" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config VIDEO_SAA7127 tristate "Philips SAA7127/9 digital video encoders" @@ -580,8 +587,10 @@ config VIDEO_THS8200 To compile this driver as a module, choose M here: the module will be called ths8200. +endmenu -comment "Video improvement chips" +menu "Video improvement chips" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config VIDEO_UPD64031A tristate "NEC Electronics uPD64031A Ghost Reduction" @@ -605,8 +614,10 @@ config VIDEO_UPD64083 To compile this driver as a module, choose M here: the module will be called upd64083. +endmenu -comment "Audio/Video compression chips" +menu "Audio/Video compression chips" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config VIDEO_SAA6752HS tristate "Philips SAA6752HS MPEG-2 Audio/Video Encoder" @@ -619,7 +630,10 @@ config VIDEO_SAA6752HS To compile this driver as a module, choose M here: the module will be called saa6752hs. -comment "SDR tuner chips" +endmenu + +menu "SDR tuner chips" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config SDR_MAX2175 tristate "Maxim 2175 RF to Bits tuner" @@ -632,7 +646,11 @@ config SDR_MAX2175 To compile this driver as a module, choose M here; the module will be called max2175. -comment "Miscellaneous helper chips" + +endmenu + +menu "Miscellaneous helper chips" + visible if !MEDIA_HIDE_ANCILLARY_SUBDRV config VIDEO_THS7303 tristate "THS7303/53 Video Amplifier" @@ -679,16 +697,14 @@ config VIDEO_ST_MIPID02 To compile this driver as a module, choose M here: the module will be called st-mipid02. - endmenu # -# All drivers that are related to Media Camera Support should be here +# V4L2 I2C drivers that are related with Camera support # -if MEDIA_CAMERA_SUPPORT - -comment "Camera sensor devices" +menu "Camera sensor devices" + visible if MEDIA_CAMERA_SUPPORT config VIDEO_APTINA_PLL tristate @@ -1189,7 +1205,10 @@ config VIDEO_S5C73M3 This is a V4L2 sensor driver for Samsung S5C73M3 8 Mpixel camera. -comment "Lens drivers" +endmenu + +menu "Lens drivers" + visible if MEDIA_CAMERA_SUPPORT config VIDEO_AD5820 tristate "AD5820 lens voice coil support" @@ -1232,8 +1251,10 @@ config VIDEO_DW9807_VCM capability. This is designed for linear control of voice coil motors, controlled via I2C serial interface. +endmenu -comment "Flash devices" +menu "Flash devices" + visible if MEDIA_CAMERA_SUPPORT config VIDEO_ADP1653 tristate "ADP1653 flash support" @@ -1260,7 +1281,6 @@ config VIDEO_LM3646 help This is a driver for the lm3646 dual flash controllers. It controls flash, torch LEDs. - -endif # MEDIA_CAMERA_SUPPORT +endmenu endif # VIDEO_V4L2 diff --git a/drivers/media/spi/Kconfig b/drivers/media/spi/Kconfig index bf385d503cab6..857ef4ace6e9b 100644 --- a/drivers/media/spi/Kconfig +++ b/drivers/media/spi/Kconfig @@ -1,8 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only if VIDEO_V4L2 -comment "SPI drivers hidden by 'Autoselect ancillary drivers'" - depends on MEDIA_HIDE_ANCILLARY_SUBDRV +comment "SPI I2C drivers auto-selected by 'Autoselect ancillary drivers'" + depends on MEDIA_HIDE_ANCILLARY_SUBDRV && SPI menu "SPI helper chips" visible if !MEDIA_HIDE_ANCILLARY_SUBDRV diff --git a/drivers/media/tuners/Kconfig b/drivers/media/tuners/Kconfig index e104bb7766e1d..2368b0e230e53 100644 --- a/drivers/media/tuners/Kconfig +++ b/drivers/media/tuners/Kconfig @@ -15,7 +15,7 @@ config MEDIA_TUNER select MEDIA_TUNER_TDA9887 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_MC44S803 if MEDIA_SUBDRV_AUTOSELECT -comment "Tuner drivers hidden by 'Autoselect ancillary drivers'" +comment "Tuner drivers auto-selected by 'Autoselect ancillary drivers'" depends on MEDIA_HIDE_ANCILLARY_SUBDRV depends on MEDIA_ANALOG_TV_SUPPORT || MEDIA_DIGITAL_TV_SUPPORT || MEDIA_RADIO_SUPPORT || MEDIA_SDR_SUPPORT -- GitLab From 9cbb04551a85b6b222b0cec9c3d9d1b2a69e55ed Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 15 Apr 2020 15:39:39 +0200 Subject: [PATCH 163/503] media: radio: don't use a menu just for wl128x driver It doesn't make any sense to have a submenu just for this driver. Drop it. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/radio/wl128x/Kconfig | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/media/radio/wl128x/Kconfig b/drivers/media/radio/wl128x/Kconfig index 7b45222730aa7..d5ae3388d3db3 100644 --- a/drivers/media/radio/wl128x/Kconfig +++ b/drivers/media/radio/wl128x/Kconfig @@ -2,7 +2,6 @@ # # TI's wl128x FM driver based on TI's ST driver. # -menu "Texas Instruments WL128x FM driver (ST based)" config RADIO_WL128X tristate "Texas Instruments WL128x FM Radio" depends on VIDEO_V4L2 && RFKILL && TTY && TI_ST @@ -14,5 +13,3 @@ config RADIO_WL128X that are compatible with the Video For Linux 2 API. Information on this API and pointers to "v4l2" programs may be found at . - -endmenu -- GitLab From 016baa59bf9f6c2550480b73f18100285e3a4fd2 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 15 Apr 2020 00:06:24 +0200 Subject: [PATCH 164/503] media: Kconfig: Don't expose the Request API option The Request API isn't meant to be chosen by users, but instead should be selected by drivers that want to support it. Hantro and Cedrus are already selecting the right options, so only the test drivers need to be fixed. Signed-off-by: Ezequiel Garcia Signed-off-by: Mauro Carvalho Chehab --- drivers/media/mc/Kconfig | 6 ++++-- drivers/media/test_drivers/Kconfig | 2 ++ drivers/media/test_drivers/vicodec/Kconfig | 2 ++ drivers/media/test_drivers/vivid/Kconfig | 2 ++ 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/media/mc/Kconfig b/drivers/media/mc/Kconfig index 002a918c4c75b..7c9628f371968 100644 --- a/drivers/media/mc/Kconfig +++ b/drivers/media/mc/Kconfig @@ -2,7 +2,6 @@ # # Media controller -# Selectable only for webcam/grabbers, as other drivers don't use it # config MEDIA_CONTROLLER_DVB @@ -14,7 +13,7 @@ config MEDIA_CONTROLLER_DVB This is currently experimental. config MEDIA_CONTROLLER_REQUEST_API - bool "Enable Media controller Request API (EXPERIMENTAL)" + bool depends on MEDIA_CONTROLLER && STAGING_MEDIA help DO NOT ENABLE THIS OPTION UNLESS YOU KNOW WHAT YOU'RE DOING. @@ -24,3 +23,6 @@ config MEDIA_CONTROLLER_REQUEST_API There is currently no intention to provide API or ABI stability for this new API as of yet. + +comment "Please notice that the enabled Media controller Request API is EXPERIMENTAL" + depends on MEDIA_CONTROLLER_REQUEST_API diff --git a/drivers/media/test_drivers/Kconfig b/drivers/media/test_drivers/Kconfig index e62abec030c30..bb009f5f42457 100644 --- a/drivers/media/test_drivers/Kconfig +++ b/drivers/media/test_drivers/Kconfig @@ -15,6 +15,8 @@ config VIDEO_VIM2M depends on VIDEO_DEV && VIDEO_V4L2 select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API help This is a virtual test device for the memory-to-memory driver framework. diff --git a/drivers/media/test_drivers/vicodec/Kconfig b/drivers/media/test_drivers/vicodec/Kconfig index 89456665cb16c..d77c67810c733 100644 --- a/drivers/media/test_drivers/vicodec/Kconfig +++ b/drivers/media/test_drivers/vicodec/Kconfig @@ -4,6 +4,8 @@ config VIDEO_VICODEC depends on VIDEO_DEV && VIDEO_V4L2 select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API help Driver for a Virtual Codec diff --git a/drivers/media/test_drivers/vivid/Kconfig b/drivers/media/test_drivers/vivid/Kconfig index e2ff06edfa93d..c3abde2986b2a 100644 --- a/drivers/media/test_drivers/vivid/Kconfig +++ b/drivers/media/test_drivers/vivid/Kconfig @@ -11,6 +11,8 @@ config VIDEO_VIVID select VIDEOBUF2_VMALLOC select VIDEOBUF2_DMA_CONTIG select VIDEO_V4L2_TPG + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API help Enables a virtual video driver. This driver emulates a webcam, TV, S-Video and HDMI capture hardware, including VBI support for -- GitLab From 143f8adfd534baf7db9ab662c50d41f74d1c7e21 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Thu, 16 Apr 2020 10:26:25 +0200 Subject: [PATCH 165/503] media: Documentation/media: drop/fix vivi references The vivi.c driver has long gone, but v4l2-videobuf.rst still refers to it. Just drop that reference since it is no longer valid or relevant (videobuf is deprecated). The QUERYCAP documentation also made a reference to is, but there vivi could just be replaced by vivid, the vivi successor. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/driver-api/media/v4l2-videobuf.rst | 5 +---- Documentation/userspace-api/media/v4l/vidioc-querycap.rst | 2 +- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/Documentation/driver-api/media/v4l2-videobuf.rst b/Documentation/driver-api/media/v4l2-videobuf.rst index 1a7756397b1ab..4b1d84eefeb8b 100644 --- a/Documentation/driver-api/media/v4l2-videobuf.rst +++ b/Documentation/driver-api/media/v4l2-videobuf.rst @@ -399,8 +399,5 @@ again. Developers who are interested in more information can go into the relevant header files; there are a few low-level functions declared there which have -not been talked about here. Also worthwhile is the vivi driver -(drivers/media/platform/vivi.c), which is maintained as an example of how V4L2 -drivers should be written. Vivi only uses the vmalloc() API, but it's good -enough to get started with. Note also that all of these calls are exported +not been talked about here. Note also that all of these calls are exported GPL-only, so they will not be available to non-GPL kernel modules. diff --git a/Documentation/userspace-api/media/v4l/vidioc-querycap.rst b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst index 4ce8f87bd54a4..28e1f766128c4 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-querycap.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst @@ -83,7 +83,7 @@ specification the ioctl returns an ``EINVAL`` error code. string. For example: "PCI:0000:05:06.0". This information is intended for users, to distinguish multiple identical devices. If no such information is available the field must simply count the - devices controlled by the driver ("platform:vivi-000"). The + devices controlled by the driver ("platform:vivid-000"). The bus_info must start with "PCI:" for PCI boards, "PCIe:" for PCI Express boards, "usb-" for USB devices, "I2C:" for i2c devices, "ISA:" for ISA devices, "parport" for parallel port devices and -- GitLab From dacca5f0fa69f04c2e70aad9847e8250b459971c Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Thu, 16 Apr 2020 10:25:59 +0200 Subject: [PATCH 166/503] media: media/test_drivers: rename to test-drivers We never use _ in directory names in the media subsystem, so rename to test-drivers instead for consistency. Also update MAINTAINERS with the new path. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/driver-api/media/drivers/vimc-devel.rst | 4 ++-- MAINTAINERS | 6 +++--- drivers/media/Kconfig | 2 +- drivers/media/Makefile | 2 +- drivers/media/{test_drivers => test-drivers}/Kconfig | 6 +++--- drivers/media/{test_drivers => test-drivers}/Makefile | 0 .../media/{test_drivers => test-drivers}/vicodec/Kconfig | 0 .../media/{test_drivers => test-drivers}/vicodec/Makefile | 0 .../{test_drivers => test-drivers}/vicodec/codec-fwht.c | 0 .../{test_drivers => test-drivers}/vicodec/codec-fwht.h | 0 .../vicodec/codec-v4l2-fwht.c | 0 .../vicodec/codec-v4l2-fwht.h | 0 .../{test_drivers => test-drivers}/vicodec/vicodec-core.c | 0 drivers/media/{test_drivers => test-drivers}/vim2m.c | 0 drivers/media/{test_drivers => test-drivers}/vimc/Kconfig | 0 drivers/media/{test_drivers => test-drivers}/vimc/Makefile | 0 .../{test_drivers => test-drivers}/vimc/vimc-capture.c | 0 .../media/{test_drivers => test-drivers}/vimc/vimc-common.c | 0 .../media/{test_drivers => test-drivers}/vimc/vimc-common.h | 0 .../media/{test_drivers => test-drivers}/vimc/vimc-core.c | 0 .../{test_drivers => test-drivers}/vimc/vimc-debayer.c | 0 .../media/{test_drivers => test-drivers}/vimc/vimc-scaler.c | 0 .../media/{test_drivers => test-drivers}/vimc/vimc-sensor.c | 0 .../{test_drivers => test-drivers}/vimc/vimc-streamer.c | 0 .../{test_drivers => test-drivers}/vimc/vimc-streamer.h | 0 drivers/media/{test_drivers => test-drivers}/vivid/Kconfig | 0 drivers/media/{test_drivers => test-drivers}/vivid/Makefile | 0 .../media/{test_drivers => test-drivers}/vivid/vivid-cec.c | 0 .../media/{test_drivers => test-drivers}/vivid/vivid-cec.h | 0 .../media/{test_drivers => test-drivers}/vivid/vivid-core.c | 0 .../media/{test_drivers => test-drivers}/vivid/vivid-core.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-ctrls.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-ctrls.h | 0 .../vivid/vivid-kthread-cap.c | 0 .../vivid/vivid-kthread-cap.h | 0 .../vivid/vivid-kthread-out.c | 0 .../vivid/vivid-kthread-out.h | 0 .../vivid/vivid-kthread-touch.c | 0 .../vivid/vivid-kthread-touch.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-meta-cap.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-meta-cap.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-meta-out.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-meta-out.h | 0 .../media/{test_drivers => test-drivers}/vivid/vivid-osd.c | 0 .../media/{test_drivers => test-drivers}/vivid/vivid-osd.h | 0 .../vivid/vivid-radio-common.c | 0 .../vivid/vivid-radio-common.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-radio-rx.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-radio-rx.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-radio-tx.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-radio-tx.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-rds-gen.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-rds-gen.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-sdr-cap.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-sdr-cap.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-touch-cap.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-touch-cap.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-vbi-cap.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-vbi-cap.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-vbi-gen.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-vbi-gen.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-vbi-out.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-vbi-out.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-vid-cap.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-vid-cap.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-vid-common.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-vid-common.h | 0 .../{test_drivers => test-drivers}/vivid/vivid-vid-out.c | 0 .../{test_drivers => test-drivers}/vivid/vivid-vid-out.h | 0 69 files changed, 10 insertions(+), 10 deletions(-) rename drivers/media/{test_drivers => test-drivers}/Kconfig (75%) rename drivers/media/{test_drivers => test-drivers}/Makefile (100%) rename drivers/media/{test_drivers => test-drivers}/vicodec/Kconfig (100%) rename drivers/media/{test_drivers => test-drivers}/vicodec/Makefile (100%) rename drivers/media/{test_drivers => test-drivers}/vicodec/codec-fwht.c (100%) rename drivers/media/{test_drivers => test-drivers}/vicodec/codec-fwht.h (100%) rename drivers/media/{test_drivers => test-drivers}/vicodec/codec-v4l2-fwht.c (100%) rename drivers/media/{test_drivers => test-drivers}/vicodec/codec-v4l2-fwht.h (100%) rename drivers/media/{test_drivers => test-drivers}/vicodec/vicodec-core.c (100%) rename drivers/media/{test_drivers => test-drivers}/vim2m.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/Kconfig (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/Makefile (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-capture.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-common.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-common.h (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-core.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-debayer.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-scaler.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-sensor.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-streamer.c (100%) rename drivers/media/{test_drivers => test-drivers}/vimc/vimc-streamer.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/Kconfig (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/Makefile (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-cec.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-cec.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-core.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-core.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-ctrls.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-ctrls.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-kthread-cap.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-kthread-cap.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-kthread-out.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-kthread-out.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-kthread-touch.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-kthread-touch.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-meta-cap.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-meta-cap.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-meta-out.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-meta-out.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-osd.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-osd.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-radio-common.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-radio-common.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-radio-rx.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-radio-rx.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-radio-tx.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-radio-tx.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-rds-gen.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-rds-gen.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-sdr-cap.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-sdr-cap.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-touch-cap.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-touch-cap.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vbi-cap.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vbi-cap.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vbi-gen.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vbi-gen.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vbi-out.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vbi-out.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vid-cap.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vid-cap.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vid-common.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vid-common.h (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vid-out.c (100%) rename drivers/media/{test_drivers => test-drivers}/vivid/vivid-vid-out.h (100%) diff --git a/Documentation/driver-api/media/drivers/vimc-devel.rst b/Documentation/driver-api/media/drivers/vimc-devel.rst index 1584abba6ee01..9e984f914b13b 100644 --- a/Documentation/driver-api/media/drivers/vimc-devel.rst +++ b/Documentation/driver-api/media/drivers/vimc-devel.rst @@ -9,7 +9,7 @@ Source code documentation vimc-streamer ~~~~~~~~~~~~~ -.. kernel-doc:: drivers/media/test_drivers/vimc/vimc-streamer.h +.. kernel-doc:: drivers/media/test-drivers/vimc/vimc-streamer.h :internal: -.. kernel-doc:: drivers/media/test_drivers/vimc/vimc-streamer.c +.. kernel-doc:: drivers/media/test-drivers/vimc/vimc-streamer.c diff --git a/MAINTAINERS b/MAINTAINERS index 3cb1b45a56242..297197b05562c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17803,7 +17803,7 @@ L: linux-media@vger.kernel.org S: Maintained W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: drivers/media/platform/vicodec/* +F: drivers/media/test-drivers/vicodec/* VIDEO I2C POLLING DRIVER M: Matt Ranostay @@ -17834,7 +17834,7 @@ L: linux-media@vger.kernel.org S: Maintained W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: drivers/media/test_drivers/vimc/* +F: drivers/media/test-drivers/vimc/* VIRT LIB M: Alex Williamson @@ -18001,7 +18001,7 @@ L: linux-media@vger.kernel.org S: Maintained W: https://linuxtv.org T: git git://linuxtv.org/media_tree.git -F: drivers/media/platform/vivid/* +F: drivers/media/test-drivers/vivid/* VLYNQ BUS M: Florian Fainelli diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 1b7bcbfa7ff93..a6d073f2e036a 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig @@ -230,7 +230,7 @@ source "drivers/media/mmc/Kconfig" endif if MEDIA_TEST_SUPPORT -source "drivers/media/test_drivers/Kconfig" +source "drivers/media/test-drivers/Kconfig" endif source "drivers/media/firewire/Kconfig" diff --git a/drivers/media/Makefile b/drivers/media/Makefile index 693b3f0bf03ee..d18357bf13464 100644 --- a/drivers/media/Makefile +++ b/drivers/media/Makefile @@ -29,6 +29,6 @@ obj-$(CONFIG_CEC_CORE) += cec/ # Finally, merge the drivers that require the core # -obj-y += common/ platform/ pci/ usb/ mmc/ firewire/ spi/ test_drivers/ +obj-y += common/ platform/ pci/ usb/ mmc/ firewire/ spi/ test-drivers/ obj-$(CONFIG_VIDEO_DEV) += radio/ diff --git a/drivers/media/test_drivers/Kconfig b/drivers/media/test-drivers/Kconfig similarity index 75% rename from drivers/media/test_drivers/Kconfig rename to drivers/media/test-drivers/Kconfig index bb009f5f42457..188381c855939 100644 --- a/drivers/media/test_drivers/Kconfig +++ b/drivers/media/test-drivers/Kconfig @@ -6,9 +6,9 @@ menuconfig V4L_TEST_DRIVERS if V4L_TEST_DRIVERS -source "drivers/media/test_drivers/vimc/Kconfig" +source "drivers/media/test-drivers/vimc/Kconfig" -source "drivers/media/test_drivers/vivid/Kconfig" +source "drivers/media/test-drivers/vivid/Kconfig" config VIDEO_VIM2M tristate "Virtual Memory-to-Memory Driver" @@ -21,6 +21,6 @@ config VIDEO_VIM2M This is a virtual test device for the memory-to-memory driver framework. -source "drivers/media/test_drivers/vicodec/Kconfig" +source "drivers/media/test-drivers/vicodec/Kconfig" endif #V4L_TEST_DRIVERS diff --git a/drivers/media/test_drivers/Makefile b/drivers/media/test-drivers/Makefile similarity index 100% rename from drivers/media/test_drivers/Makefile rename to drivers/media/test-drivers/Makefile diff --git a/drivers/media/test_drivers/vicodec/Kconfig b/drivers/media/test-drivers/vicodec/Kconfig similarity index 100% rename from drivers/media/test_drivers/vicodec/Kconfig rename to drivers/media/test-drivers/vicodec/Kconfig diff --git a/drivers/media/test_drivers/vicodec/Makefile b/drivers/media/test-drivers/vicodec/Makefile similarity index 100% rename from drivers/media/test_drivers/vicodec/Makefile rename to drivers/media/test-drivers/vicodec/Makefile diff --git a/drivers/media/test_drivers/vicodec/codec-fwht.c b/drivers/media/test-drivers/vicodec/codec-fwht.c similarity index 100% rename from drivers/media/test_drivers/vicodec/codec-fwht.c rename to drivers/media/test-drivers/vicodec/codec-fwht.c diff --git a/drivers/media/test_drivers/vicodec/codec-fwht.h b/drivers/media/test-drivers/vicodec/codec-fwht.h similarity index 100% rename from drivers/media/test_drivers/vicodec/codec-fwht.h rename to drivers/media/test-drivers/vicodec/codec-fwht.h diff --git a/drivers/media/test_drivers/vicodec/codec-v4l2-fwht.c b/drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c similarity index 100% rename from drivers/media/test_drivers/vicodec/codec-v4l2-fwht.c rename to drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c diff --git a/drivers/media/test_drivers/vicodec/codec-v4l2-fwht.h b/drivers/media/test-drivers/vicodec/codec-v4l2-fwht.h similarity index 100% rename from drivers/media/test_drivers/vicodec/codec-v4l2-fwht.h rename to drivers/media/test-drivers/vicodec/codec-v4l2-fwht.h diff --git a/drivers/media/test_drivers/vicodec/vicodec-core.c b/drivers/media/test-drivers/vicodec/vicodec-core.c similarity index 100% rename from drivers/media/test_drivers/vicodec/vicodec-core.c rename to drivers/media/test-drivers/vicodec/vicodec-core.c diff --git a/drivers/media/test_drivers/vim2m.c b/drivers/media/test-drivers/vim2m.c similarity index 100% rename from drivers/media/test_drivers/vim2m.c rename to drivers/media/test-drivers/vim2m.c diff --git a/drivers/media/test_drivers/vimc/Kconfig b/drivers/media/test-drivers/vimc/Kconfig similarity index 100% rename from drivers/media/test_drivers/vimc/Kconfig rename to drivers/media/test-drivers/vimc/Kconfig diff --git a/drivers/media/test_drivers/vimc/Makefile b/drivers/media/test-drivers/vimc/Makefile similarity index 100% rename from drivers/media/test_drivers/vimc/Makefile rename to drivers/media/test-drivers/vimc/Makefile diff --git a/drivers/media/test_drivers/vimc/vimc-capture.c b/drivers/media/test-drivers/vimc/vimc-capture.c similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-capture.c rename to drivers/media/test-drivers/vimc/vimc-capture.c diff --git a/drivers/media/test_drivers/vimc/vimc-common.c b/drivers/media/test-drivers/vimc/vimc-common.c similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-common.c rename to drivers/media/test-drivers/vimc/vimc-common.c diff --git a/drivers/media/test_drivers/vimc/vimc-common.h b/drivers/media/test-drivers/vimc/vimc-common.h similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-common.h rename to drivers/media/test-drivers/vimc/vimc-common.h diff --git a/drivers/media/test_drivers/vimc/vimc-core.c b/drivers/media/test-drivers/vimc/vimc-core.c similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-core.c rename to drivers/media/test-drivers/vimc/vimc-core.c diff --git a/drivers/media/test_drivers/vimc/vimc-debayer.c b/drivers/media/test-drivers/vimc/vimc-debayer.c similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-debayer.c rename to drivers/media/test-drivers/vimc/vimc-debayer.c diff --git a/drivers/media/test_drivers/vimc/vimc-scaler.c b/drivers/media/test-drivers/vimc/vimc-scaler.c similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-scaler.c rename to drivers/media/test-drivers/vimc/vimc-scaler.c diff --git a/drivers/media/test_drivers/vimc/vimc-sensor.c b/drivers/media/test-drivers/vimc/vimc-sensor.c similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-sensor.c rename to drivers/media/test-drivers/vimc/vimc-sensor.c diff --git a/drivers/media/test_drivers/vimc/vimc-streamer.c b/drivers/media/test-drivers/vimc/vimc-streamer.c similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-streamer.c rename to drivers/media/test-drivers/vimc/vimc-streamer.c diff --git a/drivers/media/test_drivers/vimc/vimc-streamer.h b/drivers/media/test-drivers/vimc/vimc-streamer.h similarity index 100% rename from drivers/media/test_drivers/vimc/vimc-streamer.h rename to drivers/media/test-drivers/vimc/vimc-streamer.h diff --git a/drivers/media/test_drivers/vivid/Kconfig b/drivers/media/test-drivers/vivid/Kconfig similarity index 100% rename from drivers/media/test_drivers/vivid/Kconfig rename to drivers/media/test-drivers/vivid/Kconfig diff --git a/drivers/media/test_drivers/vivid/Makefile b/drivers/media/test-drivers/vivid/Makefile similarity index 100% rename from drivers/media/test_drivers/vivid/Makefile rename to drivers/media/test-drivers/vivid/Makefile diff --git a/drivers/media/test_drivers/vivid/vivid-cec.c b/drivers/media/test-drivers/vivid/vivid-cec.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-cec.c rename to drivers/media/test-drivers/vivid/vivid-cec.c diff --git a/drivers/media/test_drivers/vivid/vivid-cec.h b/drivers/media/test-drivers/vivid/vivid-cec.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-cec.h rename to drivers/media/test-drivers/vivid/vivid-cec.h diff --git a/drivers/media/test_drivers/vivid/vivid-core.c b/drivers/media/test-drivers/vivid/vivid-core.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-core.c rename to drivers/media/test-drivers/vivid/vivid-core.c diff --git a/drivers/media/test_drivers/vivid/vivid-core.h b/drivers/media/test-drivers/vivid/vivid-core.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-core.h rename to drivers/media/test-drivers/vivid/vivid-core.h diff --git a/drivers/media/test_drivers/vivid/vivid-ctrls.c b/drivers/media/test-drivers/vivid/vivid-ctrls.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-ctrls.c rename to drivers/media/test-drivers/vivid/vivid-ctrls.c diff --git a/drivers/media/test_drivers/vivid/vivid-ctrls.h b/drivers/media/test-drivers/vivid/vivid-ctrls.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-ctrls.h rename to drivers/media/test-drivers/vivid/vivid-ctrls.h diff --git a/drivers/media/test_drivers/vivid/vivid-kthread-cap.c b/drivers/media/test-drivers/vivid/vivid-kthread-cap.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-kthread-cap.c rename to drivers/media/test-drivers/vivid/vivid-kthread-cap.c diff --git a/drivers/media/test_drivers/vivid/vivid-kthread-cap.h b/drivers/media/test-drivers/vivid/vivid-kthread-cap.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-kthread-cap.h rename to drivers/media/test-drivers/vivid/vivid-kthread-cap.h diff --git a/drivers/media/test_drivers/vivid/vivid-kthread-out.c b/drivers/media/test-drivers/vivid/vivid-kthread-out.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-kthread-out.c rename to drivers/media/test-drivers/vivid/vivid-kthread-out.c diff --git a/drivers/media/test_drivers/vivid/vivid-kthread-out.h b/drivers/media/test-drivers/vivid/vivid-kthread-out.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-kthread-out.h rename to drivers/media/test-drivers/vivid/vivid-kthread-out.h diff --git a/drivers/media/test_drivers/vivid/vivid-kthread-touch.c b/drivers/media/test-drivers/vivid/vivid-kthread-touch.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-kthread-touch.c rename to drivers/media/test-drivers/vivid/vivid-kthread-touch.c diff --git a/drivers/media/test_drivers/vivid/vivid-kthread-touch.h b/drivers/media/test-drivers/vivid/vivid-kthread-touch.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-kthread-touch.h rename to drivers/media/test-drivers/vivid/vivid-kthread-touch.h diff --git a/drivers/media/test_drivers/vivid/vivid-meta-cap.c b/drivers/media/test-drivers/vivid/vivid-meta-cap.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-meta-cap.c rename to drivers/media/test-drivers/vivid/vivid-meta-cap.c diff --git a/drivers/media/test_drivers/vivid/vivid-meta-cap.h b/drivers/media/test-drivers/vivid/vivid-meta-cap.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-meta-cap.h rename to drivers/media/test-drivers/vivid/vivid-meta-cap.h diff --git a/drivers/media/test_drivers/vivid/vivid-meta-out.c b/drivers/media/test-drivers/vivid/vivid-meta-out.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-meta-out.c rename to drivers/media/test-drivers/vivid/vivid-meta-out.c diff --git a/drivers/media/test_drivers/vivid/vivid-meta-out.h b/drivers/media/test-drivers/vivid/vivid-meta-out.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-meta-out.h rename to drivers/media/test-drivers/vivid/vivid-meta-out.h diff --git a/drivers/media/test_drivers/vivid/vivid-osd.c b/drivers/media/test-drivers/vivid/vivid-osd.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-osd.c rename to drivers/media/test-drivers/vivid/vivid-osd.c diff --git a/drivers/media/test_drivers/vivid/vivid-osd.h b/drivers/media/test-drivers/vivid/vivid-osd.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-osd.h rename to drivers/media/test-drivers/vivid/vivid-osd.h diff --git a/drivers/media/test_drivers/vivid/vivid-radio-common.c b/drivers/media/test-drivers/vivid/vivid-radio-common.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-radio-common.c rename to drivers/media/test-drivers/vivid/vivid-radio-common.c diff --git a/drivers/media/test_drivers/vivid/vivid-radio-common.h b/drivers/media/test-drivers/vivid/vivid-radio-common.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-radio-common.h rename to drivers/media/test-drivers/vivid/vivid-radio-common.h diff --git a/drivers/media/test_drivers/vivid/vivid-radio-rx.c b/drivers/media/test-drivers/vivid/vivid-radio-rx.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-radio-rx.c rename to drivers/media/test-drivers/vivid/vivid-radio-rx.c diff --git a/drivers/media/test_drivers/vivid/vivid-radio-rx.h b/drivers/media/test-drivers/vivid/vivid-radio-rx.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-radio-rx.h rename to drivers/media/test-drivers/vivid/vivid-radio-rx.h diff --git a/drivers/media/test_drivers/vivid/vivid-radio-tx.c b/drivers/media/test-drivers/vivid/vivid-radio-tx.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-radio-tx.c rename to drivers/media/test-drivers/vivid/vivid-radio-tx.c diff --git a/drivers/media/test_drivers/vivid/vivid-radio-tx.h b/drivers/media/test-drivers/vivid/vivid-radio-tx.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-radio-tx.h rename to drivers/media/test-drivers/vivid/vivid-radio-tx.h diff --git a/drivers/media/test_drivers/vivid/vivid-rds-gen.c b/drivers/media/test-drivers/vivid/vivid-rds-gen.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-rds-gen.c rename to drivers/media/test-drivers/vivid/vivid-rds-gen.c diff --git a/drivers/media/test_drivers/vivid/vivid-rds-gen.h b/drivers/media/test-drivers/vivid/vivid-rds-gen.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-rds-gen.h rename to drivers/media/test-drivers/vivid/vivid-rds-gen.h diff --git a/drivers/media/test_drivers/vivid/vivid-sdr-cap.c b/drivers/media/test-drivers/vivid/vivid-sdr-cap.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-sdr-cap.c rename to drivers/media/test-drivers/vivid/vivid-sdr-cap.c diff --git a/drivers/media/test_drivers/vivid/vivid-sdr-cap.h b/drivers/media/test-drivers/vivid/vivid-sdr-cap.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-sdr-cap.h rename to drivers/media/test-drivers/vivid/vivid-sdr-cap.h diff --git a/drivers/media/test_drivers/vivid/vivid-touch-cap.c b/drivers/media/test-drivers/vivid/vivid-touch-cap.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-touch-cap.c rename to drivers/media/test-drivers/vivid/vivid-touch-cap.c diff --git a/drivers/media/test_drivers/vivid/vivid-touch-cap.h b/drivers/media/test-drivers/vivid/vivid-touch-cap.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-touch-cap.h rename to drivers/media/test-drivers/vivid/vivid-touch-cap.h diff --git a/drivers/media/test_drivers/vivid/vivid-vbi-cap.c b/drivers/media/test-drivers/vivid/vivid-vbi-cap.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vbi-cap.c rename to drivers/media/test-drivers/vivid/vivid-vbi-cap.c diff --git a/drivers/media/test_drivers/vivid/vivid-vbi-cap.h b/drivers/media/test-drivers/vivid/vivid-vbi-cap.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vbi-cap.h rename to drivers/media/test-drivers/vivid/vivid-vbi-cap.h diff --git a/drivers/media/test_drivers/vivid/vivid-vbi-gen.c b/drivers/media/test-drivers/vivid/vivid-vbi-gen.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vbi-gen.c rename to drivers/media/test-drivers/vivid/vivid-vbi-gen.c diff --git a/drivers/media/test_drivers/vivid/vivid-vbi-gen.h b/drivers/media/test-drivers/vivid/vivid-vbi-gen.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vbi-gen.h rename to drivers/media/test-drivers/vivid/vivid-vbi-gen.h diff --git a/drivers/media/test_drivers/vivid/vivid-vbi-out.c b/drivers/media/test-drivers/vivid/vivid-vbi-out.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vbi-out.c rename to drivers/media/test-drivers/vivid/vivid-vbi-out.c diff --git a/drivers/media/test_drivers/vivid/vivid-vbi-out.h b/drivers/media/test-drivers/vivid/vivid-vbi-out.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vbi-out.h rename to drivers/media/test-drivers/vivid/vivid-vbi-out.h diff --git a/drivers/media/test_drivers/vivid/vivid-vid-cap.c b/drivers/media/test-drivers/vivid/vivid-vid-cap.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vid-cap.c rename to drivers/media/test-drivers/vivid/vivid-vid-cap.c diff --git a/drivers/media/test_drivers/vivid/vivid-vid-cap.h b/drivers/media/test-drivers/vivid/vivid-vid-cap.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vid-cap.h rename to drivers/media/test-drivers/vivid/vivid-vid-cap.h diff --git a/drivers/media/test_drivers/vivid/vivid-vid-common.c b/drivers/media/test-drivers/vivid/vivid-vid-common.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vid-common.c rename to drivers/media/test-drivers/vivid/vivid-vid-common.c diff --git a/drivers/media/test_drivers/vivid/vivid-vid-common.h b/drivers/media/test-drivers/vivid/vivid-vid-common.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vid-common.h rename to drivers/media/test-drivers/vivid/vivid-vid-common.h diff --git a/drivers/media/test_drivers/vivid/vivid-vid-out.c b/drivers/media/test-drivers/vivid/vivid-vid-out.c similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vid-out.c rename to drivers/media/test-drivers/vivid/vivid-vid-out.c diff --git a/drivers/media/test_drivers/vivid/vivid-vid-out.h b/drivers/media/test-drivers/vivid/vivid-vid-out.h similarity index 100% rename from drivers/media/test_drivers/vivid/vivid-vid-out.h rename to drivers/media/test-drivers/vivid/vivid-vid-out.h -- GitLab From 6af5797c76c11d8c08ae1f5a73c3711fcf89ab6f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 08:49:06 +0200 Subject: [PATCH 167/503] media: cec: don't select PCI & DMI While select would be a great idea for most archs, this causes a breakage with s390: "I don't think that's a good idea, as it suddenly enables selecting all PCI drivers on platforms that do not have PCI. WARNING: unmet direct dependencies detected for PCI Depends on [n]: HAVE_PCI [=n] Selected by [m]: - CEC_SECO [=m] && MEDIA_CEC_SUPPORT [=y] && (X86 || IA64 || COMPILE_TEST [=y]) Reported-by: Geert Uytterhoeven Signed-off-by: Mauro Carvalho Chehab --- drivers/media/cec/platform/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/cec/platform/Kconfig b/drivers/media/cec/platform/Kconfig index 2c4dd7401dd8b..350533cd82612 100644 --- a/drivers/media/cec/platform/Kconfig +++ b/drivers/media/cec/platform/Kconfig @@ -100,8 +100,7 @@ config CEC_TEGRA config CEC_SECO tristate "SECO Boards HDMI CEC driver" depends on (X86 || IA64) || COMPILE_TEST - select PCI - select DMI + depends on PCI && DMI select CEC_CORE select CEC_NOTIFIER help -- GitLab From e36b68ed273e12a4539b54d24bcdb929d94b68ba Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 08:55:01 +0200 Subject: [PATCH 168/503] media: mc/Kconfig: remove staging dependency for request API When the request API got merged, only drivers at staging were using it. As we wanted to be able to do future changes on it, we added an artificial depends on STAGING_MEDIA. Yet, request API is there for quite some time now, and didn't suffer any API breakages during this time. So, drop this. Reported-by: Stephen Rothwell Suggested-by: Ezequiel Garcia Signed-off-by: Mauro Carvalho Chehab --- drivers/media/mc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/mc/Kconfig b/drivers/media/mc/Kconfig index 7c9628f371968..4815b9dde9afc 100644 --- a/drivers/media/mc/Kconfig +++ b/drivers/media/mc/Kconfig @@ -14,7 +14,7 @@ config MEDIA_CONTROLLER_DVB config MEDIA_CONTROLLER_REQUEST_API bool - depends on MEDIA_CONTROLLER && STAGING_MEDIA + depends on MEDIA_CONTROLLER help DO NOT ENABLE THIS OPTION UNLESS YOU KNOW WHAT YOU'RE DOING. -- GitLab From a735e6b80d911fc1f452cea328c61779445e1054 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 09:04:55 +0200 Subject: [PATCH 169/503] media: cec/usb: depends on USB_SUPPORT and TTY As reported by Randy: WARNING: unmet direct dependencies detected for USB Depends on [n]: USB_SUPPORT [=n] && USB_ARCH_HAS_HCD [=n] Selected by [m]: - USB_RAINSHADOW_CEC [=m] && MEDIA_CEC_SUPPORT [=y] WARNING: unmet direct dependencies detected for USB_ACM Depends on [n]: USB_SUPPORT [=n] && USB [=m] && TTY [=n] Selected by [m]: - USB_RAINSHADOW_CEC [=m] && MEDIA_CEC_SUPPORT [=y] in order to be able to select USB_ACM, we need both USB_SUPPORT and TTY. So, depends on those two. Reported-by: Randy Dunlap Signed-off-by: Mauro Carvalho Chehab --- drivers/media/cec/usb/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/cec/usb/Kconfig b/drivers/media/cec/usb/Kconfig index d3bbef464bdb5..3f3a5c75287a7 100644 --- a/drivers/media/cec/usb/Kconfig +++ b/drivers/media/cec/usb/Kconfig @@ -2,5 +2,7 @@ # # USB drivers +if USB_SUPPORT && TTY source "drivers/media/cec/usb/pulse8/Kconfig" source "drivers/media/cec/usb/rainshadow/Kconfig" +endif -- GitLab From ceab3ac1e60d70afb4e25147d60817c513f235f7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 09:13:38 +0200 Subject: [PATCH 170/503] media: dvb-frontends: DUMMY_FE should depends on DVB_CORE Using select for DVB_CORE doesn't work, as reported by Randy: CONFIG_I2C=m CONFIG_DVB_CORE=y ld: drivers/media/dvb-core/dvbdev.o: in function `dvb_module_probe': dvbdev.c:(.text+0xf92): undefined reference to `i2c_new_client_device' ld: dvbdev.c:(.text+0xffb): undefined reference to `i2c_unregister_device' ld: drivers/media/dvb-core/dvbdev.o: in function `dvb_module_release': dvbdev.c:(.text+0x107d): undefined reference to `i2c_unregister_device' The problem is actually caused by the dummy frontend driver, which uses select, and it is missing an I2C dependency: WARNING: unmet direct dependencies detected for DVB_CORE Depends on [m]: MEDIA_SUPPORT [=y] && MEDIA_DIGITAL_TV_SUPPORT [=y] && (I2C [=m] || I2C [=m]=n) Selected by [y]: - DVB_DUMMY_FE [=y] && MEDIA_SUPPORT [=y] && MEDIA_TEST_SUPPORT [=y] As this is the only frontend driver using "select DVB_CORE", change it do depends on DVB_CORE. Reported-by: Randy Dunlap Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig index fbadba9b328ea..643b851a6b604 100644 --- a/drivers/media/dvb-frontends/Kconfig +++ b/drivers/media/dvb-frontends/Kconfig @@ -956,7 +956,6 @@ comment "Tools to develop new frontends" config DVB_DUMMY_FE tristate "Dummy frontend driver" - depends on MEDIA_TEST_SUPPORT - select DVB_CORE + depends on MEDIA_TEST_SUPPORT && DVB_CORE help Dummy skeleton frontend driver. -- GitLab From e10daad5bb6e51395c505feafd869037090f9ca8 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 20 Apr 2020 18:44:03 +0200 Subject: [PATCH 171/503] media: staging: rkisp1 Kconfig: depends on OF building it with a random config causes a warning: WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_DPHY_RX0 Depends on [n]: STAGING [=y] && STAGING_MEDIA [=y] && MEDIA_SUPPORT [=y] && (ARCH_ROCKCHIP || COMPILE_TEST [=y]) && OF [=n] Selected by [y]: - VIDEO_ROCKCHIP_ISP1 [=y] && STAGING [=y] && STAGING_MEDIA [=y] && MEDIA_SUPPORT [=y] && VIDEO_V4L2 [=y] && (ARCH_ROCKCHIP || COMPILE_TEST [=y]) Reported-by: Randy Dunlap Acked-by: Randy Dunlap # build-tested Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/rkisp1/Kconfig b/drivers/staging/media/rkisp1/Kconfig index 5ecbefa0f5ecd..07e4a6e4458e3 100644 --- a/drivers/staging/media/rkisp1/Kconfig +++ b/drivers/staging/media/rkisp1/Kconfig @@ -2,7 +2,7 @@ config VIDEO_ROCKCHIP_ISP1 tristate "Rockchip Image Signal Processing v1 Unit driver" - depends on VIDEO_V4L2 + depends on VIDEO_V4L2 && OF depends on ARCH_ROCKCHIP || COMPILE_TEST select MEDIA_CONTROLLER select VIDEO_V4L2_SUBDEV_API -- GitLab From e6940c03dd628a223f6cce6581686bdb2e09936b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 20 Apr 2020 18:48:44 +0200 Subject: [PATCH 172/503] media: usbvision: depends on USB When built with: CONFIG_USB=m CONFIG_VIDEO_USBVISION=y It causes ld errors: ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_write_reg_irq': usbvision-core.c:(.text+0x8a4): undefined reference to `usb_submit_urb' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_isoc_irq': usbvision-core.c:(.text+0x2ee8): undefined reference to `usb_submit_urb' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_read_reg': usbvision-core.c:(.text+0x30ad): undefined reference to `usb_control_msg' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_write_reg': usbvision-core.c:(.text+0x3178): undefined reference to `usb_control_msg' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_set_output': usbvision-core.c:(.text+0x344e): undefined reference to `usb_control_msg' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_set_input': usbvision-core.c:(.text+0x3b9b): undefined reference to `usb_control_msg' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_setup': usbvision-core.c:(.text+0x4009): undefined reference to `usb_control_msg' ld: drivers/staging/media/usbvision/usbvision-core.o:usbvision-core.c:(.text+0x417f): more undefined references to `usb_control_msg' follow ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_set_alternate': usbvision-core.c:(.text+0x4518): undefined reference to `usb_set_interface' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_init_isoc': usbvision-core.c:(.text+0x4673): undefined reference to `usb_alloc_urb' ld: usbvision-core.c:(.text+0x46a5): undefined reference to `usb_alloc_coherent' ld: usbvision-core.c:(.text+0x4765): undefined reference to `usb_submit_urb' ld: drivers/staging/media/usbvision/usbvision-core.o: in function `usbvision_stop_isoc': usbvision-core.c:(.text+0x4837): undefined reference to `usb_kill_urb' ld: usbvision-core.c:(.text+0x485f): undefined reference to `usb_free_coherent' ld: usbvision-core.c:(.text+0x4874): undefined reference to `usb_free_urb' ld: usbvision-core.c:(.text+0x48f1): undefined reference to `usb_set_interface' ld: drivers/staging/media/usbvision/usbvision-video.o: in function `usbvision_release': usbvision-video.c:(.text+0x1a8a): undefined reference to `usb_free_urb' ld: drivers/staging/media/usbvision/usbvision-video.o: in function `usbvision_disconnect': usbvision-video.c:(.text+0x1b74): undefined reference to `usb_put_dev' ld: drivers/staging/media/usbvision/usbvision-video.o: in function `usbvision_radio_close': usbvision-video.c:(.text+0x1c89): undefined reference to `usb_set_interface' ld: drivers/staging/media/usbvision/usbvision-video.o: in function `usbvision_probe': usbvision-video.c:(.text+0x1e4b): undefined reference to `usb_get_dev' ld: usbvision-video.c:(.text+0x20e1): undefined reference to `usb_alloc_urb' ld: usbvision-video.c:(.text+0x2797): undefined reference to `usb_put_dev' ld: drivers/staging/media/usbvision/usbvision-video.o: in function `usbvision_exit': usbvision-video.c:(.exit.text+0x37): undefined reference to `usb_deregister' ld: drivers/staging/media/usbvision/usbvision-video.o: in function `usbvision_init': usbvision-video.c:(.init.text+0xf9): undefined reference to `usb_register_driver' ld: drivers/staging/media/usbvision/usbvision-i2c.o: in function `usbvision_i2c_write': usbvision-i2c.c:(.text+0x2f4): undefined reference to `usb_control_msg' Reported-by: Randy Dunlap Acked-by: Randy Dunlap # build-tested Acked-by: Greg Kroah-Hartman Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/usbvision/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/usbvision/Kconfig b/drivers/staging/media/usbvision/Kconfig index c6e1afb5ac486..1c7da2a2caac9 100644 --- a/drivers/staging/media/usbvision/Kconfig +++ b/drivers/staging/media/usbvision/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config VIDEO_USBVISION tristate "USB video devices based on Nogatech NT1003/1004/1005 (Deprecated)" - depends on MEDIA_USB_SUPPORT && I2C && VIDEO_V4L2 + depends on MEDIA_USB_SUPPORT && I2C && VIDEO_V4L2 && USB select VIDEO_TUNER select VIDEO_SAA711X if MEDIA_SUBDRV_AUTOSELECT help -- GitLab From 953f10064140327868ac451eefb0db1becbef200 Mon Sep 17 00:00:00 2001 From: Sean Young Date: Thu, 12 Mar 2020 10:22:45 +0100 Subject: [PATCH 173/503] media: dvb: digitv: remove unused array element 0 The first element of the key array is not used. Remove it, and along with it a uninitialized memory read. This should fix the rc debug message. Link: https://www.spinics.net/lists/kernel/msg3374861.html Suggested-by: Phong Tran Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/dvb-usb/digitv.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/media/usb/dvb-usb/digitv.c b/drivers/media/usb/dvb-usb/digitv.c index 906438c5a40f6..2a4b7ccd54899 100644 --- a/drivers/media/usb/dvb-usb/digitv.c +++ b/drivers/media/usb/dvb-usb/digitv.c @@ -230,14 +230,15 @@ static struct rc_map_table rc_map_digitv_table[] = { static int digitv_rc_query(struct dvb_usb_device *d, u32 *event, int *state) { + struct rc_map_table *entry; int ret, i; - u8 key[5]; + u8 key[4]; u8 b[4] = { 0 }; *event = 0; *state = REMOTE_NO_KEY_PRESSED; - ret = digitv_ctrl_msg(d, USB_READ_REMOTE, 0, NULL, 0, &key[1], 4); + ret = digitv_ctrl_msg(d, USB_READ_REMOTE, 0, NULL, 0, key, 4); if (ret) return ret; @@ -248,20 +249,21 @@ static int digitv_rc_query(struct dvb_usb_device *d, u32 *event, int *state) return ret; /* if something is inside the buffer, simulate key press */ - if (key[1] != 0) - { - for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) { - if (rc5_custom(&d->props.rc.legacy.rc_map_table[i]) == key[1] && - rc5_data(&d->props.rc.legacy.rc_map_table[i]) == key[2]) { - *event = d->props.rc.legacy.rc_map_table[i].keycode; + if (key[0] != 0) { + for (i = 0; i < d->props.rc.legacy.rc_map_size; i++) { + entry = &d->props.rc.legacy.rc_map_table[i]; + + if (rc5_custom(entry) == key[0] && + rc5_data(entry) == key[1]) { + *event = entry->keycode; *state = REMOTE_KEY_PRESSED; return 0; } } + + deb_rc("key: %*ph\n", 4, key); } - if (key[0] != 0) - deb_rc("key: %*ph\n", 5, key); return 0; } -- GitLab From a8648098948d9b04627408b0c51877720412dc9f Mon Sep 17 00:00:00 2001 From: Sean Young Date: Tue, 31 Mar 2020 14:39:52 +0200 Subject: [PATCH 174/503] media: rc: if kernel is built without an IR codec, don't advertise it If the kernel is built without e.g. the imon IR decoder, the protocols sysfs file still show the protocol as available. If user-space tries to enable this decoder, the kernel will report an error: $ echo +imon > /sys/class/rc/rc0/protocols [ 57.693033] rc_core: Loaded IR protocol module ir-imon-decoder, but protocol imon still not available Ensuring that unavailable protocols are not advertised, ensures that users space knows it is not available, and a BPF based IR decoder can be loaded instead. This supports the case when no kernel-based codec needs to be compiled in, and every IR decoder can be BPF based. Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- include/media/rc-map.h | 103 ++++++++++++++++++++++++++++++----------- 1 file changed, 76 insertions(+), 27 deletions(-) diff --git a/include/media/rc-map.h b/include/media/rc-map.h index 0ce896f102025..7dbb91c601a77 100644 --- a/include/media/rc-map.h +++ b/include/media/rc-map.h @@ -41,36 +41,85 @@ #define RC_PROTO_BIT_RCMM32 BIT_ULL(RC_PROTO_RCMM32) #define RC_PROTO_BIT_XBOX_DVD BIT_ULL(RC_PROTO_XBOX_DVD) -/* All rc protocols for which we have decoders */ +#if IS_ENABLED(CONFIG_IR_RC5_DECODER) +#define __RC_PROTO_RC5_CODEC \ + (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | RC_PROTO_BIT_RC5_SZ) +#else +#define __RC_PROTO_RC5_CODEC 0 +#endif + +#if IS_ENABLED(CONFIG_IR_JVC_DECODER) +#define __RC_PROTO_JVC_CODEC RC_PROTO_BIT_JVC +#else +#define __RC_PROTO_JVC_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_SONY_DECODER) +#define __RC_PROTO_SONY_CODEC \ + (RC_PROTO_BIT_SONY12 | RC_PROTO_BIT_SONY15 | RC_PROTO_BIT_SONY20) +#else +#define __RC_PROTO_SONY_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_NEC_DECODER) +#define __RC_PROTO_NEC_CODEC \ + (RC_PROTO_BIT_NEC | RC_PROTO_BIT_NECX | RC_PROTO_BIT_NEC32) +#else +#define __RC_PROTO_NEC_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_SANYO_DECODER) +#define __RC_PROTO_SANYO_CODEC RC_PROTO_BIT_SANYO +#else +#define __RC_PROTO_SANYO_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_MCE_KBD_DECODER) +#define __RC_PROTO_MCE_KBD_CODEC \ + (RC_PROTO_BIT_MCIR2_KBD | RC_PROTO_BIT_MCIR2_MSE) +#else +#define __RC_PROTO_MCE_KBD_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_RC6_DECODER) +#define __RC_PROTO_RC6_CODEC \ + (RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \ + RC_PROTO_BIT_RC6_6A_24 | RC_PROTO_BIT_RC6_6A_32 | \ + RC_PROTO_BIT_RC6_MCE) +#else +#define __RC_PROTO_RC6_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_SHARP_DECODER) +#define __RC_PROTO_SHARP_CODEC RC_PROTO_BIT_SHARP +#else +#define __RC_PROTO_SHARP_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_XMP_DECODER) +#define __RC_PROTO_XMP_CODEC RC_PROTO_BIT_XMP +#else +#define __RC_PROTO_XMP_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_IMON_DECODER) +#define __RC_PROTO_IMON_CODEC RC_PROTO_BIT_IMON +#else +#define __RC_PROTO_IMON_CODEC 0 +#endif +#if IS_ENABLED(CONFIG_IR_RCMM_DECODER) +#define __RC_PROTO_RCMM_CODEC \ + (RC_PROTO_BIT_RCMM12 | RC_PROTO_BIT_RCMM24 | RC_PROTO_BIT_RCMM32) +#else +#define __RC_PROTO_RCMM_CODEC 0 +#endif + +/* All kernel-based codecs have encoders and decoders */ #define RC_PROTO_BIT_ALL_IR_DECODER \ - (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | \ - RC_PROTO_BIT_RC5_SZ | RC_PROTO_BIT_JVC | \ - RC_PROTO_BIT_SONY12 | RC_PROTO_BIT_SONY15 | \ - RC_PROTO_BIT_SONY20 | RC_PROTO_BIT_NEC | \ - RC_PROTO_BIT_NECX | RC_PROTO_BIT_NEC32 | \ - RC_PROTO_BIT_SANYO | RC_PROTO_BIT_MCIR2_KBD | \ - RC_PROTO_BIT_MCIR2_MSE | \ - RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \ - RC_PROTO_BIT_RC6_6A_24 | RC_PROTO_BIT_RC6_6A_32 | \ - RC_PROTO_BIT_RC6_MCE | RC_PROTO_BIT_SHARP | \ - RC_PROTO_BIT_XMP | RC_PROTO_BIT_IMON | \ - RC_PROTO_BIT_RCMM12 | RC_PROTO_BIT_RCMM24 | \ - RC_PROTO_BIT_RCMM32) + (__RC_PROTO_RC5_CODEC | __RC_PROTO_JVC_CODEC | __RC_PROTO_SONY_CODEC | \ + __RC_PROTO_NEC_CODEC | __RC_PROTO_SANYO_CODEC | \ + __RC_PROTO_MCE_KBD_CODEC | __RC_PROTO_RC6_CODEC | \ + __RC_PROTO_SHARP_CODEC | __RC_PROTO_XMP_CODEC | \ + __RC_PROTO_IMON_CODEC | __RC_PROTO_RCMM_CODEC) #define RC_PROTO_BIT_ALL_IR_ENCODER \ - (RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC5X_20 | \ - RC_PROTO_BIT_RC5_SZ | RC_PROTO_BIT_JVC | \ - RC_PROTO_BIT_SONY12 | RC_PROTO_BIT_SONY15 | \ - RC_PROTO_BIT_SONY20 | RC_PROTO_BIT_NEC | \ - RC_PROTO_BIT_NECX | RC_PROTO_BIT_NEC32 | \ - RC_PROTO_BIT_SANYO | RC_PROTO_BIT_MCIR2_KBD | \ - RC_PROTO_BIT_MCIR2_MSE | \ - RC_PROTO_BIT_RC6_0 | RC_PROTO_BIT_RC6_6A_20 | \ - RC_PROTO_BIT_RC6_6A_24 | \ - RC_PROTO_BIT_RC6_6A_32 | RC_PROTO_BIT_RC6_MCE | \ - RC_PROTO_BIT_SHARP | RC_PROTO_BIT_IMON | \ - RC_PROTO_BIT_RCMM12 | RC_PROTO_BIT_RCMM24 | \ - RC_PROTO_BIT_RCMM32) + (__RC_PROTO_RC5_CODEC | __RC_PROTO_JVC_CODEC | __RC_PROTO_SONY_CODEC | \ + __RC_PROTO_NEC_CODEC | __RC_PROTO_SANYO_CODEC | \ + __RC_PROTO_MCE_KBD_CODEC | __RC_PROTO_RC6_CODEC | \ + __RC_PROTO_SHARP_CODEC | __RC_PROTO_XMP_CODEC | \ + __RC_PROTO_IMON_CODEC | __RC_PROTO_RCMM_CODEC) #define RC_SCANCODE_UNKNOWN(x) (x) #define RC_SCANCODE_OTHER(x) (x) -- GitLab From 96f3a9392799dd0f6472648a7366622ffd0989f3 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Mon, 10 Feb 2020 18:51:33 +0100 Subject: [PATCH 175/503] media: dvb: return -EREMOTEIO on i2c transfer failure. Currently when i2c transfers fail the error return -EREMOTEIO is assigned to err but then later overwritten when the tuner attach call is made. Fix this by returning early with the error return code -EREMOTEIO on i2c transfer failure errors. If the transfer fails, an uninitialized value will be read from b2. Addresses-Coverity: ("Unused value") Fixes: fbfee8684ff2 ("V4L/DVB (5651): Dibusb-mb: convert pll handling to properly use dvb-pll") Signed-off-by: Colin Ian King Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/dvb-usb/dibusb-mb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/usb/dvb-usb/dibusb-mb.c b/drivers/media/usb/dvb-usb/dibusb-mb.c index f462c918d5a44..e9dc27f739703 100644 --- a/drivers/media/usb/dvb-usb/dibusb-mb.c +++ b/drivers/media/usb/dvb-usb/dibusb-mb.c @@ -81,7 +81,7 @@ static int dibusb_tuner_probe_and_attach(struct dvb_usb_adapter *adap) if (i2c_transfer(&adap->dev->i2c_adap, msg, 2) != 2) { err("tuner i2c write failed."); - ret = -EREMOTEIO; + return -EREMOTEIO; } if (adap->fe_adap[0].fe->ops.i2c_gate_ctrl) -- GitLab From d27958df93026a0768dd0394a200c09e78388f31 Mon Sep 17 00:00:00 2001 From: Sean Young Date: Tue, 14 Apr 2020 12:10:43 +0200 Subject: [PATCH 176/503] media: dvb-usb: make dvb_usb_device_properties const This makes it possible to declare dvb_usb_device_properties const. Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/dvb-usb/a800.c | 6 ++-- drivers/media/usb/dvb-usb/af9005.c | 4 +-- drivers/media/usb/dvb-usb/az6027.c | 4 +-- drivers/media/usb/dvb-usb/cxusb.c | 4 +-- drivers/media/usb/dvb-usb/dib0700.h | 31 ++++++++++++-------- drivers/media/usb/dvb-usb/dib0700_core.c | 6 ++-- drivers/media/usb/dvb-usb/digitv.c | 7 +++-- drivers/media/usb/dvb-usb/dvb-usb-common.h | 3 +- drivers/media/usb/dvb-usb/dvb-usb-firmware.c | 3 +- drivers/media/usb/dvb-usb/dvb-usb-init.c | 8 ++--- drivers/media/usb/dvb-usb/dvb-usb.h | 10 ++++--- drivers/media/usb/dvb-usb/dw2102.c | 4 +-- drivers/media/usb/dvb-usb/m920x.c | 4 +-- drivers/media/usb/dvb-usb/technisat-usb2.c | 4 +-- drivers/media/usb/dvb-usb/ttusb2.c | 7 +++-- 15 files changed, 60 insertions(+), 45 deletions(-) diff --git a/drivers/media/usb/dvb-usb/a800.c b/drivers/media/usb/dvb-usb/a800.c index 15bbefe3bc005..36b5b62274125 100644 --- a/drivers/media/usb/dvb-usb/a800.c +++ b/drivers/media/usb/dvb-usb/a800.c @@ -27,8 +27,10 @@ static int a800_power_ctrl(struct dvb_usb_device *d, int onoff) } /* assure to put cold to 0 for iManufacturer == 1 */ -static int a800_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, int *cold) +static int a800_identify_state(struct usb_device *udev, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, + int *cold) { *cold = udev->descriptor.iManufacturer != 1; return 0; diff --git a/drivers/media/usb/dvb-usb/af9005.c b/drivers/media/usb/dvb-usb/af9005.c index 3446bcac8ed13..b6a2436d16e97 100644 --- a/drivers/media/usb/dvb-usb/af9005.c +++ b/drivers/media/usb/dvb-usb/af9005.c @@ -955,8 +955,8 @@ static int af9005_pid_filter(struct dvb_usb_adapter *adap, int index, } static int af9005_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, int *cold) { int ret; diff --git a/drivers/media/usb/dvb-usb/az6027.c b/drivers/media/usb/dvb-usb/az6027.c index d5be540e31a7d..1c39b61cde29b 100644 --- a/drivers/media/usb/dvb-usb/az6027.c +++ b/drivers/media/usb/dvb-usb/az6027.c @@ -1051,8 +1051,8 @@ static struct i2c_algorithm az6027_i2c_algo = { }; static int az6027_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, int *cold) { u8 *b; diff --git a/drivers/media/usb/dvb-usb/cxusb.c b/drivers/media/usb/dvb-usb/cxusb.c index fd058f71ce492..761992ad05e2a 100644 --- a/drivers/media/usb/dvb-usb/cxusb.c +++ b/drivers/media/usb/dvb-usb/cxusb.c @@ -1358,8 +1358,8 @@ static int cxusb_mygica_d689_frontend_attach(struct dvb_usb_adapter *adap) * not, and forget a match if it turns out we selected the wrong device. */ static int bluebird_fx2_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, int *cold) { int wascold = *cold; diff --git a/drivers/media/usb/dvb-usb/dib0700.h b/drivers/media/usb/dvb-usb/dib0700.h index ca4d3d2da9695..2defbd8b6fc1d 100644 --- a/drivers/media/usb/dvb-usb/dib0700.h +++ b/drivers/media/usb/dvb-usb/dib0700.h @@ -52,20 +52,25 @@ struct dib0700_state { struct i2c_client *i2c_client_tuner; }; -extern int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion, - u32 *romversion, u32 *ramversion, u32 *fwtype); -extern int dib0700_set_gpio(struct dvb_usb_device *, enum dib07x0_gpios gpio, u8 gpio_dir, u8 gpio_val); -extern int dib0700_ctrl_clock(struct dvb_usb_device *d, u32 clk_MHz, u8 clock_out_gp3); -extern int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen); -extern int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw); -extern int dib0700_rc_setup(struct dvb_usb_device *d, struct usb_interface *intf); -extern int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff); -extern struct i2c_algorithm dib0700_i2c_algo; -extern int dib0700_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, int *cold); -extern int dib0700_change_protocol(struct rc_dev *dev, u64 *rc_proto); -extern int dib0700_set_i2c_speed(struct dvb_usb_device *d, u16 scl_kHz); +int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion, + u32 *romversion, u32 *ramversion, u32 *fwtype); +int dib0700_set_gpio(struct dvb_usb_device *d, enum dib07x0_gpios gpio, + u8 gpio_dir, u8 gpio_val); +int dib0700_ctrl_clock(struct dvb_usb_device *d, u32 clk_MHz, u8 clock_out_gp3); +int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, + u8 rxlen); +int dib0700_download_firmware(struct usb_device *d, + const struct firmware *fw); +int dib0700_rc_setup(struct dvb_usb_device *d, struct usb_interface *intf); +int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff); +int dib0700_identify_state(struct usb_device *d, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, + int *cold); +int dib0700_change_protocol(struct rc_dev *dev, u64 *rc_proto); +int dib0700_set_i2c_speed(struct dvb_usb_device *d, u16 scl_kHz); +extern struct i2c_algorithm dib0700_i2c_algo; extern int dib0700_device_count; extern int dvb_usb_dib0700_ir_proto; extern struct dvb_usb_device_properties dib0700_devices[]; diff --git a/drivers/media/usb/dvb-usb/dib0700_core.c b/drivers/media/usb/dvb-usb/dib0700_core.c index ef62dd6c5ae44..70219b3e85666 100644 --- a/drivers/media/usb/dvb-usb/dib0700_core.c +++ b/drivers/media/usb/dvb-usb/dib0700_core.c @@ -372,8 +372,10 @@ struct i2c_algorithm dib0700_i2c_algo = { .functionality = dib0700_i2c_func, }; -int dib0700_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, int *cold) +int dib0700_identify_state(struct usb_device *udev, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, + int *cold) { s16 ret; u8 *b; diff --git a/drivers/media/usb/dvb-usb/digitv.c b/drivers/media/usb/dvb-usb/digitv.c index 2a4b7ccd54899..4e3b3c064bcfb 100644 --- a/drivers/media/usb/dvb-usb/digitv.c +++ b/drivers/media/usb/dvb-usb/digitv.c @@ -90,9 +90,10 @@ static struct i2c_algorithm digitv_i2c_algo = { }; /* Callbacks for DVB USB */ -static int digitv_identify_state (struct usb_device *udev, struct - dvb_usb_device_properties *props, struct dvb_usb_device_description **desc, - int *cold) +static int digitv_identify_state(struct usb_device *udev, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, + int *cold) { *cold = udev->descriptor.iManufacturer == 0 && udev->descriptor.iProduct == 0; return 0; diff --git a/drivers/media/usb/dvb-usb/dvb-usb-common.h b/drivers/media/usb/dvb-usb/dvb-usb-common.h index 8c51ac4493dde..70f4eedd7c48a 100644 --- a/drivers/media/usb/dvb-usb/dvb-usb-common.h +++ b/drivers/media/usb/dvb-usb/dvb-usb-common.h @@ -26,7 +26,8 @@ extern int dvb_usb_disable_rc_polling; #define deb_uxfer(args...) dprintk(dvb_usb_debug,0x100,args) /* commonly used methods */ -extern int dvb_usb_download_firmware(struct usb_device *, struct dvb_usb_device_properties *); +int dvb_usb_download_firmware(struct usb_device *udev, + const struct dvb_usb_device_properties *props); extern int dvb_usb_device_power_ctrl(struct dvb_usb_device *d, int onoff); diff --git a/drivers/media/usb/dvb-usb/dvb-usb-firmware.c b/drivers/media/usb/dvb-usb/dvb-usb-firmware.c index 42c207aacbb12..0fb3fa6100e4a 100644 --- a/drivers/media/usb/dvb-usb/dvb-usb-firmware.c +++ b/drivers/media/usb/dvb-usb/dvb-usb-firmware.c @@ -84,7 +84,8 @@ int usb_cypress_load_firmware(struct usb_device *udev, const struct firmware *fw } EXPORT_SYMBOL(usb_cypress_load_firmware); -int dvb_usb_download_firmware(struct usb_device *udev, struct dvb_usb_device_properties *props) +int dvb_usb_download_firmware(struct usb_device *udev, + const struct dvb_usb_device_properties *props) { int ret; const struct firmware *fw = NULL; diff --git a/drivers/media/usb/dvb-usb/dvb-usb-init.c b/drivers/media/usb/dvb-usb/dvb-usb-init.c index 46ada09ce38a9..c1a7634e27b43 100644 --- a/drivers/media/usb/dvb-usb/dvb-usb-init.c +++ b/drivers/media/usb/dvb-usb/dvb-usb-init.c @@ -184,10 +184,10 @@ static int dvb_usb_init(struct dvb_usb_device *d, short *adapter_nums) } /* determine the name and the state of the just found USB device */ -static struct dvb_usb_device_description *dvb_usb_find_device(struct usb_device *udev, struct dvb_usb_device_properties *props, int *cold) +static const struct dvb_usb_device_description *dvb_usb_find_device(struct usb_device *udev, const struct dvb_usb_device_properties *props, int *cold) { int i, j; - struct dvb_usb_device_description *desc = NULL; + const struct dvb_usb_device_description *desc = NULL; *cold = -1; @@ -242,13 +242,13 @@ int dvb_usb_device_power_ctrl(struct dvb_usb_device *d, int onoff) * USB */ int dvb_usb_device_init(struct usb_interface *intf, - struct dvb_usb_device_properties *props, + const struct dvb_usb_device_properties *props, struct module *owner, struct dvb_usb_device **du, short *adapter_nums) { struct usb_device *udev = interface_to_usbdev(intf); struct dvb_usb_device *d = NULL; - struct dvb_usb_device_description *desc = NULL; + const struct dvb_usb_device_description *desc = NULL; int ret = -ENOMEM, cold = 0; diff --git a/drivers/media/usb/dvb-usb/dvb-usb.h b/drivers/media/usb/dvb-usb/dvb-usb.h index 2eb0e24e89434..741be0e694471 100644 --- a/drivers/media/usb/dvb-usb/dvb-usb.h +++ b/drivers/media/usb/dvb-usb/dvb-usb.h @@ -291,8 +291,10 @@ struct dvb_usb_device_properties { int (*power_ctrl) (struct dvb_usb_device *, int); int (*read_mac_address) (struct dvb_usb_device *, u8 []); - int (*identify_state) (struct usb_device *, struct dvb_usb_device_properties *, - struct dvb_usb_device_description **, int *); + int (*identify_state)(struct usb_device *udev, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, + int *cold); struct { enum dvb_usb_mode mode; /* Drivers shouldn't touch on it */ @@ -436,7 +438,7 @@ struct dvb_usb_adapter { */ struct dvb_usb_device { struct dvb_usb_device_properties props; - struct dvb_usb_device_description *desc; + const struct dvb_usb_device_description *desc; struct usb_device *udev; @@ -473,7 +475,7 @@ struct dvb_usb_device { }; extern int dvb_usb_device_init(struct usb_interface *, - struct dvb_usb_device_properties *, + const struct dvb_usb_device_properties *, struct module *, struct dvb_usb_device **, short *adapter_nums); extern void dvb_usb_device_exit(struct usb_interface *); diff --git a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c index 594a763b46cf8..f6d2d2398db6e 100644 --- a/drivers/media/usb/dvb-usb/dw2102.c +++ b/drivers/media/usb/dvb-usb/dw2102.c @@ -955,8 +955,8 @@ static int su3000_read_mac_address(struct dvb_usb_device *d, u8 mac[6]) } static int su3000_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, int *cold) { info("%s", __func__); diff --git a/drivers/media/usb/dvb-usb/m920x.c b/drivers/media/usb/dvb-usb/m920x.c index b8b99be5564b8..4bb5b82599a79 100644 --- a/drivers/media/usb/dvb-usb/m920x.c +++ b/drivers/media/usb/dvb-usb/m920x.c @@ -459,8 +459,8 @@ static int m920x_firmware_download(struct usb_device *udev, const struct firmwar /* Callbacks for DVB USB */ static int m920x_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, int *cold) { struct usb_host_interface *alt; diff --git a/drivers/media/usb/dvb-usb/technisat-usb2.c b/drivers/media/usb/dvb-usb/technisat-usb2.c index 676d233d46d53..f172120db2aa7 100644 --- a/drivers/media/usb/dvb-usb/technisat-usb2.c +++ b/drivers/media/usb/dvb-usb/technisat-usb2.c @@ -330,8 +330,8 @@ static void technisat_usb2_green_led_control(struct work_struct *work) /* method to find out whether the firmware has to be downloaded or not */ static int technisat_usb2_identify_state(struct usb_device *udev, - struct dvb_usb_device_properties *props, - struct dvb_usb_device_description **desc, int *cold) + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, int *cold) { int ret; u8 *version; diff --git a/drivers/media/usb/dvb-usb/ttusb2.c b/drivers/media/usb/dvb-usb/ttusb2.c index fd3e7312daef2..294274fd8f555 100644 --- a/drivers/media/usb/dvb-usb/ttusb2.c +++ b/drivers/media/usb/dvb-usb/ttusb2.c @@ -467,9 +467,10 @@ static int tt3650_rc_query(struct dvb_usb_device *d) /* Callbacks for DVB USB */ -static int ttusb2_identify_state (struct usb_device *udev, struct - dvb_usb_device_properties *props, struct dvb_usb_device_description **desc, - int *cold) +static int ttusb2_identify_state(struct usb_device *udev, + const struct dvb_usb_device_properties *props, + const struct dvb_usb_device_description **desc, + int *cold) { *cold = udev->descriptor.iManufacturer == 0 && udev->descriptor.iProduct == 0; return 0; -- GitLab From c77591a8ca5ad843238df67f89a1bdc0ee7dbb76 Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sat, 11 Apr 2020 16:27:29 +0200 Subject: [PATCH 177/503] media: m88ds3103: Add missing '\n' in log messages Message logged by 'dev_xxx()' or 'pr_xxx()' should end with a '\n'. While at it, change the log level from 'err' to 'debug'. Fixes: e6089feca460 ("media: m88ds3103: Add support for ds3103b demod") Signed-off-by: Christophe JAILLET Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/m88ds3103.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c index d2c28dcf6b429..bc356ac4fe5e7 100644 --- a/drivers/media/dvb-frontends/m88ds3103.c +++ b/drivers/media/dvb-frontends/m88ds3103.c @@ -1898,7 +1898,7 @@ static int m88ds3103_probe(struct i2c_client *client, if (ret) goto err_kfree; dev->dt_addr = ((utmp & 0x80) == 0) ? 0x42 >> 1 : 0x40 >> 1; - dev_err(&client->dev, "dt addr is 0x%02x", dev->dt_addr); + dev_dbg(&client->dev, "dt addr is 0x%02x\n", dev->dt_addr); dev->dt_client = i2c_new_dummy_device(client->adapter, dev->dt_addr); -- GitLab From 9448762fd1d1550c254be36c4a1a6273b98e323b Mon Sep 17 00:00:00 2001 From: Guru Das Srinagesh Date: Thu, 9 Apr 2020 08:52:32 +0200 Subject: [PATCH 178/503] media: ir-rx51: Use 64-bit division macro Since the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using DIV_ROUND_CLOSEST_ULL to handle a 64-bit dividend. Cc: Richard Fontana Cc: Thomas Gleixner Cc: Kate Stewart Cc: Allison Randal Signed-off-by: Guru Das Srinagesh Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/rc/ir-rx51.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/rc/ir-rx51.c b/drivers/media/rc/ir-rx51.c index 8574eda451028..a0d9c02a7588a 100644 --- a/drivers/media/rc/ir-rx51.c +++ b/drivers/media/rc/ir-rx51.c @@ -241,7 +241,7 @@ static int ir_rx51_probe(struct platform_device *dev) } /* Use default, in case userspace does not set the carrier */ - ir_rx51.freq = DIV_ROUND_CLOSEST(pwm_get_period(pwm), NSEC_PER_SEC); + ir_rx51.freq = DIV_ROUND_CLOSEST_ULL(pwm_get_period(pwm), NSEC_PER_SEC); pwm_put(pwm); hrtimer_init(&ir_rx51.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); -- GitLab From f2267d7ed803add8820c7a6537c12a6d8732f570 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 14 Apr 2020 23:20:29 +0200 Subject: [PATCH 179/503] media: imx: utils: fix and simplify pixel format enumeration Merge yuv_formats and rgb_formats into a single array. Always loop over all entries, skipping those that do not match the requested search criteria. This simplifies the code, lets us get rid of the manual counting of array entries, and stops accidentally ignoring some non-mbus RGB formats. Before: $ v4l2-ctl -d /dev/video14 --list-formats-out ioctl: VIDIOC_ENUM_FMT Type: Video Output [0]: 'UYVY' (UYVY 4:2:2) [1]: 'YUYV' (YUYV 4:2:2) [2]: 'YU12' (Planar YUV 4:2:0) [3]: 'YV12' (Planar YVU 4:2:0) [4]: '422P' (Planar YUV 4:2:2) [5]: 'NV12' (Y/CbCr 4:2:0) [6]: 'NV16' (Y/CbCr 4:2:2) [7]: 'RGBP' (16-bit RGB 5-6-5) [8]: 'RGB3' (24-bit RGB 8-8-8) [9]: 'BX24' (32-bit XRGB 8-8-8-8) After: $ v4l2-ctl -d /dev/video14 --list-formats-out ioctl: VIDIOC_ENUM_FMT Type: Video Output [0]: 'UYVY' (UYVY 4:2:2) [1]: 'YUYV' (YUYV 4:2:2) [2]: 'YU12' (Planar YUV 4:2:0) [3]: 'YV12' (Planar YVU 4:2:0) [4]: '422P' (Planar YUV 4:2:2) [5]: 'NV12' (Y/CbCr 4:2:0) [6]: 'NV16' (Y/CbCr 4:2:2) [7]: 'RGBP' (16-bit RGB 5-6-5) [8]: 'RGB3' (24-bit RGB 8-8-8) [9]: 'BGR3' (24-bit BGR 8-8-8) [10]: 'BX24' (32-bit XRGB 8-8-8-8) [11]: 'XR24' (32-bit BGRX 8-8-8-8) [12]: 'RX24' (32-bit XBGR 8-8-8-8) [13]: 'XB24' (32-bit RGBX 8-8-8-8) Tested on a imx6q-sabresd. [laurent.pinchart@ideasonboard.com: Make loop counters unsigned] [laurent.pinchart@ideasonboard.com: Decrement index instead of adding a counter] [laurent.pinchart@ideasonboard.com: Return directly from within loop instead of breaking] [slongerbeam@gmail.com: Fix colorspace comparison error] Fixes: e130291212df5 ("[media] media: Add i.MX media core driver") Signed-off-by: Philipp Zabel Tested-by: Fabio Estevam Signed-off-by: Laurent Pinchart Signed-off-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-utils.c | 193 ++++++-------------- 1 file changed, 59 insertions(+), 134 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index fae981698c493..39469031e510a 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -9,12 +9,9 @@ /* * List of supported pixel formats for the subdevs. - * - * In all of these tables, the non-mbus formats (with no - * mbus codes) must all fall at the end of the table. */ - -static const struct imx_media_pixfmt yuv_formats[] = { +static const struct imx_media_pixfmt pixel_formats[] = { + /*** YUV formats start here ***/ { .fourcc = V4L2_PIX_FMT_UYVY, .codes = { @@ -31,12 +28,7 @@ static const struct imx_media_pixfmt yuv_formats[] = { }, .cs = IPUV3_COLORSPACE_YUV, .bpp = 16, - }, - /*** - * non-mbus YUV formats start here. NOTE! when adding non-mbus - * formats, NUM_NON_MBUS_YUV_FORMATS must be updated below. - ***/ - { + }, { .fourcc = V4L2_PIX_FMT_YUV420, .cs = IPUV3_COLORSPACE_YUV, .bpp = 12, @@ -62,13 +54,7 @@ static const struct imx_media_pixfmt yuv_formats[] = { .bpp = 16, .planar = true, }, -}; - -#define NUM_NON_MBUS_YUV_FORMATS 5 -#define NUM_YUV_FORMATS ARRAY_SIZE(yuv_formats) -#define NUM_MBUS_YUV_FORMATS (NUM_YUV_FORMATS - NUM_NON_MBUS_YUV_FORMATS) - -static const struct imx_media_pixfmt rgb_formats[] = { + /*** RGB formats start here ***/ { .fourcc = V4L2_PIX_FMT_RGB565, .codes = {MEDIA_BUS_FMT_RGB565_2X8_LE}, @@ -83,12 +69,28 @@ static const struct imx_media_pixfmt rgb_formats[] = { }, .cs = IPUV3_COLORSPACE_RGB, .bpp = 24, + }, { + .fourcc = V4L2_PIX_FMT_BGR24, + .cs = IPUV3_COLORSPACE_RGB, + .bpp = 24, }, { .fourcc = V4L2_PIX_FMT_XRGB32, .codes = {MEDIA_BUS_FMT_ARGB8888_1X32}, .cs = IPUV3_COLORSPACE_RGB, .bpp = 32, .ipufmt = true, + }, { + .fourcc = V4L2_PIX_FMT_XBGR32, + .cs = IPUV3_COLORSPACE_RGB, + .bpp = 32, + }, { + .fourcc = V4L2_PIX_FMT_BGRX32, + .cs = IPUV3_COLORSPACE_RGB, + .bpp = 32, + }, { + .fourcc = V4L2_PIX_FMT_RGBX32, + .cs = IPUV3_COLORSPACE_RGB, + .bpp = 32, }, /*** raw bayer and grayscale formats start here ***/ { @@ -182,33 +184,8 @@ static const struct imx_media_pixfmt rgb_formats[] = { .bpp = 16, .bayer = true, }, - /*** - * non-mbus RGB formats start here. NOTE! when adding non-mbus - * formats, NUM_NON_MBUS_RGB_FORMATS must be updated below. - ***/ - { - .fourcc = V4L2_PIX_FMT_BGR24, - .cs = IPUV3_COLORSPACE_RGB, - .bpp = 24, - }, { - .fourcc = V4L2_PIX_FMT_XBGR32, - .cs = IPUV3_COLORSPACE_RGB, - .bpp = 32, - }, { - .fourcc = V4L2_PIX_FMT_BGRX32, - .cs = IPUV3_COLORSPACE_RGB, - .bpp = 32, - }, { - .fourcc = V4L2_PIX_FMT_RGBX32, - .cs = IPUV3_COLORSPACE_RGB, - .bpp = 32, - }, }; -#define NUM_NON_MBUS_RGB_FORMATS 2 -#define NUM_RGB_FORMATS ARRAY_SIZE(rgb_formats) -#define NUM_MBUS_RGB_FORMATS (NUM_RGB_FORMATS - NUM_NON_MBUS_RGB_FORMATS) - static const struct imx_media_pixfmt ipu_yuv_formats[] = { { .fourcc = V4L2_PIX_FMT_YUV32, @@ -246,21 +223,24 @@ static void init_mbus_colorimetry(struct v4l2_mbus_framefmt *mbus, mbus->ycbcr_enc); } -static const -struct imx_media_pixfmt *__find_format(u32 fourcc, - u32 code, - bool allow_non_mbus, - bool allow_bayer, - const struct imx_media_pixfmt *array, - u32 array_size) +static const struct imx_media_pixfmt *find_format(u32 fourcc, + u32 code, + enum codespace_sel cs_sel, + bool allow_non_mbus, + bool allow_bayer) { - const struct imx_media_pixfmt *fmt; - int i, j; + unsigned int i; - for (i = 0; i < array_size; i++) { - fmt = &array[i]; + for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { + const struct imx_media_pixfmt *fmt = &pixel_formats[i]; + enum codespace_sel fmt_cs_sel; + unsigned int j; - if ((!allow_non_mbus && !fmt->codes[0]) || + fmt_cs_sel = (fmt->cs == IPUV3_COLORSPACE_YUV) ? + CS_SEL_YUV : CS_SEL_RGB; + + if ((cs_sel != CS_SEL_ANY && fmt_cs_sel != cs_sel) || + (!allow_non_mbus && !fmt->codes[0]) || (!allow_bayer && fmt->bayer)) continue; @@ -270,39 +250,13 @@ struct imx_media_pixfmt *__find_format(u32 fourcc, if (!code) continue; - for (j = 0; fmt->codes[j]; j++) { + for (j = 0; j < ARRAY_SIZE(fmt->codes) && fmt->codes[j]; j++) { if (code == fmt->codes[j]) return fmt; } } - return NULL; -} -static const struct imx_media_pixfmt *find_format(u32 fourcc, - u32 code, - enum codespace_sel cs_sel, - bool allow_non_mbus, - bool allow_bayer) -{ - const struct imx_media_pixfmt *ret; - - switch (cs_sel) { - case CS_SEL_YUV: - return __find_format(fourcc, code, allow_non_mbus, allow_bayer, - yuv_formats, NUM_YUV_FORMATS); - case CS_SEL_RGB: - return __find_format(fourcc, code, allow_non_mbus, allow_bayer, - rgb_formats, NUM_RGB_FORMATS); - case CS_SEL_ANY: - ret = __find_format(fourcc, code, allow_non_mbus, allow_bayer, - yuv_formats, NUM_YUV_FORMATS); - if (ret) - return ret; - return __find_format(fourcc, code, allow_non_mbus, allow_bayer, - rgb_formats, NUM_RGB_FORMATS); - default: - return NULL; - } + return NULL; } static int enum_format(u32 *fourcc, u32 *code, u32 index, @@ -310,61 +264,32 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, bool allow_non_mbus, bool allow_bayer) { - const struct imx_media_pixfmt *fmt; - u32 mbus_yuv_sz = NUM_MBUS_YUV_FORMATS; - u32 mbus_rgb_sz = NUM_MBUS_RGB_FORMATS; - u32 yuv_sz = NUM_YUV_FORMATS; - u32 rgb_sz = NUM_RGB_FORMATS; + unsigned int i; - switch (cs_sel) { - case CS_SEL_YUV: - if (index >= yuv_sz || - (!allow_non_mbus && index >= mbus_yuv_sz)) - return -EINVAL; - fmt = &yuv_formats[index]; - break; - case CS_SEL_RGB: - if (index >= rgb_sz || - (!allow_non_mbus && index >= mbus_rgb_sz)) - return -EINVAL; - fmt = &rgb_formats[index]; - if (!allow_bayer && fmt->bayer) - return -EINVAL; - break; - case CS_SEL_ANY: - if (!allow_non_mbus) { - if (index >= mbus_yuv_sz) { - index -= mbus_yuv_sz; - if (index >= mbus_rgb_sz) - return -EINVAL; - fmt = &rgb_formats[index]; - if (!allow_bayer && fmt->bayer) - return -EINVAL; - } else { - fmt = &yuv_formats[index]; - } - } else { - if (index >= yuv_sz + rgb_sz) - return -EINVAL; - if (index >= yuv_sz) { - fmt = &rgb_formats[index - yuv_sz]; - if (!allow_bayer && fmt->bayer) - return -EINVAL; - } else { - fmt = &yuv_formats[index]; - } + for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { + const struct imx_media_pixfmt *fmt = &pixel_formats[i]; + enum codespace_sel fmt_cs_sel; + + fmt_cs_sel = (fmt->cs == IPUV3_COLORSPACE_YUV) ? + CS_SEL_YUV : CS_SEL_RGB; + + if ((cs_sel != CS_SEL_ANY && fmt_cs_sel != cs_sel) || + (!allow_non_mbus && !fmt->codes[0]) || + (!allow_bayer && fmt->bayer)) + continue; + + if (index == 0) { + if (fourcc) + *fourcc = fmt->fourcc; + if (code) + *code = fmt->codes[0]; + return 0; } - break; - default: - return -EINVAL; - } - if (fourcc) - *fourcc = fmt->fourcc; - if (code) - *code = fmt->codes[0]; + index--; + } - return 0; + return -EINVAL; } const struct imx_media_pixfmt * -- GitLab From 1df2148fdfc036c9350d41ae81b09b3f8897c9b6 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 14 Apr 2020 23:23:38 +0200 Subject: [PATCH 180/503] media: imx: utils: fix media bus format enumeration Iterate over all media bus formats, not just over the first format in each imx_media_pixfmt entry. Before: $ v4l2-ctl -d $(media-ctl -e ipu1_csi0) --list-subdev-mbus-codes 0 ioctl: VIDIOC_SUBDEV_ENUM_MBUS_CODE (pad=0) 0x2006: MEDIA_BUS_FMT_UYVY8_2X8 0x2008: MEDIA_BUS_FMT_YUYV8_2X8 0x1008: MEDIA_BUS_FMT_RGB565_2X8_LE 0x100a: MEDIA_BUS_FMT_RGB888_1X24 0x100d: MEDIA_BUS_FMT_ARGB8888_1X32 0x3001: MEDIA_BUS_FMT_SBGGR8_1X8 0x3013: MEDIA_BUS_FMT_SGBRG8_1X8 0x3002: MEDIA_BUS_FMT_SGRBG8_1X8 0x3014: MEDIA_BUS_FMT_SRGGB8_1X8 0x3007: MEDIA_BUS_FMT_SBGGR10_1X10 0x300e: MEDIA_BUS_FMT_SGBRG10_1X10 0x300a: MEDIA_BUS_FMT_SGRBG10_1X10 0x300f: MEDIA_BUS_FMT_SRGGB10_1X10 0x2001: MEDIA_BUS_FMT_Y8_1X8 0x200a: MEDIA_BUS_FMT_Y10_1X10 After: $ v4l2-ctl -d $(media-ctl -e ipu1_csi0) --list-subdev-mbus-codes 0 ioctl: VIDIOC_SUBDEV_ENUM_MBUS_CODE (pad=0) 0x2006: MEDIA_BUS_FMT_UYVY8_2X8 0x200f: MEDIA_BUS_FMT_UYVY8_1X16 0x2008: MEDIA_BUS_FMT_YUYV8_2X8 0x2011: MEDIA_BUS_FMT_YUYV8_1X16 0x1008: MEDIA_BUS_FMT_RGB565_2X8_LE 0x100a: MEDIA_BUS_FMT_RGB888_1X24 0x100c: MEDIA_BUS_FMT_RGB888_2X12_LE 0x100d: MEDIA_BUS_FMT_ARGB8888_1X32 0x3001: MEDIA_BUS_FMT_SBGGR8_1X8 0x3013: MEDIA_BUS_FMT_SGBRG8_1X8 0x3002: MEDIA_BUS_FMT_SGRBG8_1X8 0x3014: MEDIA_BUS_FMT_SRGGB8_1X8 0x3007: MEDIA_BUS_FMT_SBGGR10_1X10 0x3008: MEDIA_BUS_FMT_SBGGR12_1X12 0x3019: MEDIA_BUS_FMT_SBGGR14_1X14 0x301d: MEDIA_BUS_FMT_SBGGR16_1X16 0x300e: MEDIA_BUS_FMT_SGBRG10_1X10 0x3010: MEDIA_BUS_FMT_SGBRG12_1X12 0x301a: MEDIA_BUS_FMT_SGBRG14_1X14 0x301e: MEDIA_BUS_FMT_SGBRG16_1X16 0x300a: MEDIA_BUS_FMT_SGRBG10_1X10 0x3011: MEDIA_BUS_FMT_SGRBG12_1X12 0x301b: MEDIA_BUS_FMT_SGRBG14_1X14 0x301f: MEDIA_BUS_FMT_SGRBG16_1X16 0x300f: MEDIA_BUS_FMT_SRGGB10_1X10 0x3012: MEDIA_BUS_FMT_SRGGB12_1X12 0x301c: MEDIA_BUS_FMT_SRGGB14_1X14 0x3020: MEDIA_BUS_FMT_SRGGB16_1X16 0x2001: MEDIA_BUS_FMT_Y8_1X8 0x200a: MEDIA_BUS_FMT_Y10_1X10 0x2013: MEDIA_BUS_FMT_Y12_1X12 [laurent.pinchart@ideasonboard.com: Decrement index to replace loop counter k] [laurent.pinchart@ideasonboard.com: Return directly from within the loops] Fixes: e130291212df5 ("[media] media: Add i.MX media core driver") Signed-off-by: Philipp Zabel Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-utils.c | 22 +++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 39469031e510a..00a71f01786c9 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -269,6 +269,7 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { const struct imx_media_pixfmt *fmt = &pixel_formats[i]; enum codespace_sel fmt_cs_sel; + unsigned int j; fmt_cs_sel = (fmt->cs == IPUV3_COLORSPACE_YUV) ? CS_SEL_YUV : CS_SEL_RGB; @@ -278,15 +279,24 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, (!allow_bayer && fmt->bayer)) continue; - if (index == 0) { - if (fourcc) - *fourcc = fmt->fourcc; - if (code) - *code = fmt->codes[0]; + if (fourcc && index == 0) { + *fourcc = fmt->fourcc; return 0; } - index--; + if (!code) { + index--; + continue; + } + + for (j = 0; j < ARRAY_SIZE(fmt->codes) && fmt->codes[j]; j++) { + if (index == 0) { + *code = fmt->codes[j]; + return 0; + } + + index--; + } } return -EINVAL; -- GitLab From c25ab5caf516f9439a5607162852d398c635d948 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 6 Apr 2020 18:38:57 +0200 Subject: [PATCH 181/503] media: imx: utils: Inline init_mbus_colorimetry() in its caller The init_mbus_colorimetry() function is small and used in a single place. The code becomes easier to follow if it gets inline in its caller. Do so. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-utils.c | 24 +++++++++------------ 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 00a71f01786c9..cf0aba8d53bae 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -210,19 +210,6 @@ static const struct imx_media_pixfmt ipu_rgb_formats[] = { #define NUM_IPU_RGB_FORMATS ARRAY_SIZE(ipu_rgb_formats) -static void init_mbus_colorimetry(struct v4l2_mbus_framefmt *mbus, - const struct imx_media_pixfmt *fmt) -{ - mbus->colorspace = (fmt->cs == IPUV3_COLORSPACE_RGB) ? - V4L2_COLORSPACE_SRGB : V4L2_COLORSPACE_SMPTE170M; - mbus->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(mbus->colorspace); - mbus->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(mbus->colorspace); - mbus->quantization = - V4L2_MAP_QUANTIZATION_DEFAULT(fmt->cs == IPUV3_COLORSPACE_RGB, - mbus->colorspace, - mbus->ycbcr_enc); -} - static const struct imx_media_pixfmt *find_format(u32 fourcc, u32 code, enum codespace_sel cs_sel, @@ -423,7 +410,16 @@ int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, } mbus->code = code; - init_mbus_colorimetry(mbus, lcc); + + mbus->colorspace = (lcc->cs == IPUV3_COLORSPACE_RGB) ? + V4L2_COLORSPACE_SRGB : V4L2_COLORSPACE_SMPTE170M; + mbus->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(mbus->colorspace); + mbus->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(mbus->colorspace); + mbus->quantization = + V4L2_MAP_QUANTIZATION_DEFAULT(lcc->cs == IPUV3_COLORSPACE_RGB, + mbus->colorspace, + mbus->ycbcr_enc); + if (cc) *cc = lcc; -- GitLab From 0cd5d896a192887041f4030c1d388099a572322e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 6 Apr 2020 18:38:58 +0200 Subject: [PATCH 182/503] media: imx: utils: Handle Bayer format lookup through a selection flag The format lookup (and enumeration) functions take a boolean flag to tell if Bayer formats should be considered. This leads to hard to read lines such as return enum_format(fourcc, NULL, index, cs_sel, true, false); where the boolean parameters can easily be mixed. To make the code clearer, add a CS_SEL_BAYER flag that can be passed through the codespace_sel parameter of the lookup functions to replace the bool parameter. [slongerbeam@gmail.com: Instead of declaring CS_SEL_ANY as a bitfield containing only CS_SEL_YUV | CS_SEL_RGB, declare CS_SEL_ANY as all of the above (YUV, RGB, BAYER). A new enum is declared for the YUV | RGB selection as CS_SEL_YUV_RGB, and that is used by sub-devices that don't support BAYER and only allow selecting and enumerating YUV or RGB encodings. CS_SEL_ANY is now only used by the CSI sub-devices and the attached capture interfaces, since only those devices support BAYER formats.] Signed-off-by: Laurent Pinchart Signed-off-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-ic-prp.c | 8 +- drivers/staging/media/imx/imx-ic-prpencvf.c | 9 ++- drivers/staging/media/imx/imx-media-capture.c | 20 ++--- .../staging/media/imx/imx-media-csc-scaler.c | 2 +- drivers/staging/media/imx/imx-media-csi.c | 15 ++-- drivers/staging/media/imx/imx-media-utils.c | 74 +++++++++---------- drivers/staging/media/imx/imx-media.h | 16 ++-- drivers/staging/media/imx/imx7-media-csi.c | 12 ++- 8 files changed, 77 insertions(+), 79 deletions(-) diff --git a/drivers/staging/media/imx/imx-ic-prp.c b/drivers/staging/media/imx/imx-ic-prp.c index 2a4f77e83ed34..722a6e2c19235 100644 --- a/drivers/staging/media/imx/imx-ic-prp.c +++ b/drivers/staging/media/imx/imx-ic-prp.c @@ -107,7 +107,7 @@ static int prp_enum_mbus_code(struct v4l2_subdev *sd, switch (code->pad) { case PRP_SINK_PAD: ret = imx_media_enum_ipu_format(&code->code, code->index, - CS_SEL_ANY); + CS_SEL_YUV_RGB); break; case PRP_SRC_PAD_PRPENC: case PRP_SRC_PAD_PRPVF: @@ -180,10 +180,10 @@ static int prp_set_fmt(struct v4l2_subdev *sd, MIN_H, MAX_H, H_ALIGN, S_ALIGN); cc = imx_media_find_ipu_format(sdformat->format.code, - CS_SEL_ANY); + CS_SEL_YUV_RGB); if (!cc) { - imx_media_enum_ipu_format(&code, 0, CS_SEL_ANY); - cc = imx_media_find_ipu_format(code, CS_SEL_ANY); + imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV_RGB); + cc = imx_media_find_ipu_format(code, CS_SEL_YUV_RGB); sdformat->format.code = cc->codes[0]; } diff --git a/drivers/staging/media/imx/imx-ic-prpencvf.c b/drivers/staging/media/imx/imx-ic-prpencvf.c index 09c4e3f338075..8a91b2167837c 100644 --- a/drivers/staging/media/imx/imx-ic-prpencvf.c +++ b/drivers/staging/media/imx/imx-ic-prpencvf.c @@ -850,7 +850,8 @@ static int prp_enum_mbus_code(struct v4l2_subdev *sd, if (code->pad >= PRPENCVF_NUM_PADS) return -EINVAL; - return imx_media_enum_ipu_format(&code->code, code->index, CS_SEL_ANY); + return imx_media_enum_ipu_format(&code->code, code->index, + CS_SEL_YUV_RGB); } static int prp_get_fmt(struct v4l2_subdev *sd, @@ -885,12 +886,12 @@ static void prp_try_fmt(struct prp_priv *priv, { struct v4l2_mbus_framefmt *infmt; - *cc = imx_media_find_ipu_format(sdformat->format.code, CS_SEL_ANY); + *cc = imx_media_find_ipu_format(sdformat->format.code, CS_SEL_YUV_RGB); if (!*cc) { u32 code; - imx_media_enum_ipu_format(&code, 0, CS_SEL_ANY); - *cc = imx_media_find_ipu_format(code, CS_SEL_ANY); + imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV_RGB); + *cc = imx_media_find_ipu_format(code, CS_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; } diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index d37b776ff86de..fe1c49a33fd9a 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c @@ -91,7 +91,7 @@ static int capture_enum_framesizes(struct file *file, void *fh, }; int ret; - cc = imx_media_find_format(fsize->pixel_format, CS_SEL_ANY, true); + cc = imx_media_find_format(fsize->pixel_format, CS_SEL_ANY); if (!cc) return -EINVAL; @@ -133,7 +133,7 @@ static int capture_enum_frameintervals(struct file *file, void *fh, }; int ret; - cc = imx_media_find_format(fival->pixel_format, CS_SEL_ANY, true); + cc = imx_media_find_format(fival->pixel_format, CS_SEL_ANY); if (!cc) return -EINVAL; @@ -167,7 +167,8 @@ static int capture_enum_fmt_vid_cap(struct file *file, void *fh, return ret; } - cc_src = imx_media_find_ipu_format(fmt_src.format.code, CS_SEL_ANY); + cc_src = imx_media_find_ipu_format(fmt_src.format.code, + CS_SEL_YUV_RGB); if (cc_src) { u32 cs_sel = (cc_src->cs == IPUV3_COLORSPACE_YUV) ? CS_SEL_YUV : CS_SEL_RGB; @@ -177,7 +178,7 @@ static int capture_enum_fmt_vid_cap(struct file *file, void *fh, return ret; } else { cc_src = imx_media_find_mbus_format(fmt_src.format.code, - CS_SEL_ANY, true); + CS_SEL_ANY); if (WARN_ON(!cc_src)) return -EINVAL; @@ -209,7 +210,8 @@ static int __capture_try_fmt_vid_cap(struct capture_priv *priv, { const struct imx_media_pixfmt *cc, *cc_src; - cc_src = imx_media_find_ipu_format(fmt_src->format.code, CS_SEL_ANY); + cc_src = imx_media_find_ipu_format(fmt_src->format.code, + CS_SEL_YUV_RGB); if (cc_src) { u32 fourcc, cs_sel; @@ -217,14 +219,14 @@ static int __capture_try_fmt_vid_cap(struct capture_priv *priv, CS_SEL_YUV : CS_SEL_RGB; fourcc = f->fmt.pix.pixelformat; - cc = imx_media_find_format(fourcc, cs_sel, false); + cc = imx_media_find_format(fourcc, cs_sel); if (!cc) { imx_media_enum_format(&fourcc, 0, cs_sel); - cc = imx_media_find_format(fourcc, cs_sel, false); + cc = imx_media_find_format(fourcc, cs_sel); } } else { cc_src = imx_media_find_mbus_format(fmt_src->format.code, - CS_SEL_ANY, true); + CS_SEL_ANY); if (WARN_ON(!cc_src)) return -EINVAL; @@ -790,7 +792,7 @@ int imx_media_capture_device_register(struct imx_media_video_dev *vdev) vdev->compose.width = fmt_src.format.width; vdev->compose.height = fmt_src.format.height; vdev->cc = imx_media_find_format(vdev->fmt.fmt.pix.pixelformat, - CS_SEL_ANY, false); + CS_SEL_YUV_RGB); v4l2_info(sd, "Registered %s as /dev/%s\n", vfd->name, video_device_node_name(vfd)); diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c index 2cc77f6e84b65..3e1c88938e7d0 100644 --- a/drivers/staging/media/imx/imx-media-csc-scaler.c +++ b/drivers/staging/media/imx/imx-media-csc-scaler.c @@ -164,7 +164,7 @@ static int ipu_csc_scaler_enum_fmt(struct file *file, void *fh, u32 fourcc; int ret; - ret = imx_media_enum_format(&fourcc, f->index, CS_SEL_ANY); + ret = imx_media_enum_format(&fourcc, f->index, CS_SEL_YUV_RGB); if (ret) return ret; diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index e76a6a85baa3b..0877717db3f4d 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -1234,12 +1234,12 @@ static int csi_enum_mbus_code(struct v4l2_subdev *sd, mutex_lock(&priv->lock); infmt = __csi_get_fmt(priv, cfg, CSI_SINK_PAD, code->which); - incc = imx_media_find_mbus_format(infmt->code, CS_SEL_ANY, true); + incc = imx_media_find_mbus_format(infmt->code, CS_SEL_ANY); switch (code->pad) { case CSI_SINK_PAD: ret = imx_media_enum_mbus_format(&code->code, code->index, - CS_SEL_ANY, true); + CS_SEL_ANY); break; case CSI_SRC_PAD_DIRECT: case CSI_SRC_PAD_IDMAC: @@ -1433,8 +1433,7 @@ static void csi_try_fmt(struct csi_priv *priv, switch (sdformat->pad) { case CSI_SRC_PAD_DIRECT: case CSI_SRC_PAD_IDMAC: - incc = imx_media_find_mbus_format(infmt->code, - CS_SEL_ANY, true); + incc = imx_media_find_mbus_format(infmt->code, CS_SEL_ANY); sdformat->format.width = compose->width; sdformat->format.height = compose->height; @@ -1470,12 +1469,10 @@ static void csi_try_fmt(struct csi_priv *priv, MIN_H, MAX_H, H_ALIGN, S_ALIGN); *cc = imx_media_find_mbus_format(sdformat->format.code, - CS_SEL_ANY, true); + CS_SEL_ANY); if (!*cc) { - imx_media_enum_mbus_format(&code, 0, - CS_SEL_ANY, false); - *cc = imx_media_find_mbus_format(code, - CS_SEL_ANY, false); + imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV_RGB); + *cc = imx_media_find_mbus_format(code, CS_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; } diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index cf0aba8d53bae..5552039a9d7e8 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -213,8 +213,7 @@ static const struct imx_media_pixfmt ipu_rgb_formats[] = { static const struct imx_media_pixfmt *find_format(u32 fourcc, u32 code, enum codespace_sel cs_sel, - bool allow_non_mbus, - bool allow_bayer) + bool allow_non_mbus) { unsigned int i; @@ -223,12 +222,12 @@ static const struct imx_media_pixfmt *find_format(u32 fourcc, enum codespace_sel fmt_cs_sel; unsigned int j; - fmt_cs_sel = (fmt->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB; + fmt_cs_sel = fmt->bayer ? CS_SEL_BAYER : + ((fmt->cs == IPUV3_COLORSPACE_YUV) ? + CS_SEL_YUV : CS_SEL_RGB); - if ((cs_sel != CS_SEL_ANY && fmt_cs_sel != cs_sel) || - (!allow_non_mbus && !fmt->codes[0]) || - (!allow_bayer && fmt->bayer)) + if (!(fmt_cs_sel & cs_sel) || + (!allow_non_mbus && !fmt->codes[0])) continue; if (fourcc && fmt->fourcc == fourcc) @@ -248,8 +247,7 @@ static const struct imx_media_pixfmt *find_format(u32 fourcc, static int enum_format(u32 *fourcc, u32 *code, u32 index, enum codespace_sel cs_sel, - bool allow_non_mbus, - bool allow_bayer) + bool allow_non_mbus) { unsigned int i; @@ -258,12 +256,12 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, enum codespace_sel fmt_cs_sel; unsigned int j; - fmt_cs_sel = (fmt->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB; + fmt_cs_sel = fmt->bayer ? CS_SEL_BAYER : + ((fmt->cs == IPUV3_COLORSPACE_YUV) ? + CS_SEL_YUV : CS_SEL_RGB); - if ((cs_sel != CS_SEL_ANY && fmt_cs_sel != cs_sel) || - (!allow_non_mbus && !fmt->codes[0]) || - (!allow_bayer && fmt->bayer)) + if (!(fmt_cs_sel & cs_sel) || + (!allow_non_mbus && !fmt->codes[0])) continue; if (fourcc && index == 0) { @@ -290,30 +288,28 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, } const struct imx_media_pixfmt * -imx_media_find_format(u32 fourcc, enum codespace_sel cs_sel, bool allow_bayer) +imx_media_find_format(u32 fourcc, enum codespace_sel cs_sel) { - return find_format(fourcc, 0, cs_sel, true, allow_bayer); + return find_format(fourcc, 0, cs_sel, true); } EXPORT_SYMBOL_GPL(imx_media_find_format); int imx_media_enum_format(u32 *fourcc, u32 index, enum codespace_sel cs_sel) { - return enum_format(fourcc, NULL, index, cs_sel, true, false); + return enum_format(fourcc, NULL, index, cs_sel, true); } EXPORT_SYMBOL_GPL(imx_media_enum_format); const struct imx_media_pixfmt * -imx_media_find_mbus_format(u32 code, enum codespace_sel cs_sel, - bool allow_bayer) +imx_media_find_mbus_format(u32 code, enum codespace_sel cs_sel) { - return find_format(0, code, cs_sel, false, allow_bayer); + return find_format(0, code, cs_sel, false); } EXPORT_SYMBOL_GPL(imx_media_find_mbus_format); -int imx_media_enum_mbus_format(u32 *code, u32 index, enum codespace_sel cs_sel, - bool allow_bayer) +int imx_media_enum_mbus_format(u32 *code, u32 index, enum codespace_sel cs_sel) { - return enum_format(NULL, code, index, cs_sel, false, allow_bayer); + return enum_format(NULL, code, index, cs_sel, false); } EXPORT_SYMBOL_GPL(imx_media_enum_mbus_format); @@ -324,6 +320,8 @@ imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel) u32 array_size; int i, j; + cs_sel &= ~CS_SEL_BAYER; + switch (cs_sel) { case CS_SEL_YUV: array_size = NUM_IPU_YUV_FORMATS; @@ -333,7 +331,7 @@ imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel) array_size = NUM_IPU_RGB_FORMATS; array = ipu_rgb_formats; break; - case CS_SEL_ANY: + case CS_SEL_YUV_RGB: array_size = NUM_IPU_YUV_FORMATS + NUM_IPU_RGB_FORMATS; array = ipu_yuv_formats; break; @@ -342,7 +340,7 @@ imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel) } for (i = 0; i < array_size; i++) { - if (cs_sel == CS_SEL_ANY && i >= NUM_IPU_YUV_FORMATS) + if (cs_sel == CS_SEL_YUV_RGB && i >= NUM_IPU_YUV_FORMATS) fmt = &ipu_rgb_formats[i - NUM_IPU_YUV_FORMATS]; else fmt = &array[i]; @@ -362,6 +360,8 @@ EXPORT_SYMBOL_GPL(imx_media_find_ipu_format); int imx_media_enum_ipu_format(u32 *code, u32 index, enum codespace_sel cs_sel) { + cs_sel &= ~CS_SEL_BAYER; + switch (cs_sel) { case CS_SEL_YUV: if (index >= NUM_IPU_YUV_FORMATS) @@ -373,7 +373,7 @@ int imx_media_enum_ipu_format(u32 *code, u32 index, enum codespace_sel cs_sel) return -EINVAL; *code = ipu_rgb_formats[index].codes[0]; break; - case CS_SEL_ANY: + case CS_SEL_YUV_RGB: if (index >= NUM_IPU_YUV_FORMATS + NUM_IPU_RGB_FORMATS) return -EINVAL; if (index >= NUM_IPU_YUV_FORMATS) { @@ -401,10 +401,10 @@ int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, mbus->height = height; mbus->field = field; if (code == 0) - imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV, false); - lcc = imx_media_find_mbus_format(code, CS_SEL_ANY, false); + imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV); + lcc = imx_media_find_mbus_format(code, CS_SEL_YUV_RGB); if (!lcc) { - lcc = imx_media_find_ipu_format(code, CS_SEL_ANY); + lcc = imx_media_find_ipu_format(code, CS_SEL_YUV_RGB); if (!lcc) return -EINVAL; } @@ -473,9 +473,9 @@ void imx_media_try_colorimetry(struct v4l2_mbus_framefmt *tryfmt, const struct imx_media_pixfmt *cc; bool is_rgb = false; - cc = imx_media_find_mbus_format(tryfmt->code, CS_SEL_ANY, true); + cc = imx_media_find_mbus_format(tryfmt->code, CS_SEL_ANY); if (!cc) - cc = imx_media_find_ipu_format(tryfmt->code, CS_SEL_ANY); + cc = imx_media_find_ipu_format(tryfmt->code, CS_SEL_YUV_RGB); if (cc && cc->cs == IPUV3_COLORSPACE_RGB) is_rgb = true; @@ -525,10 +525,10 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, u32 stride; if (!cc) { - cc = imx_media_find_ipu_format(mbus->code, CS_SEL_ANY); + cc = imx_media_find_ipu_format(mbus->code, CS_SEL_YUV_RGB); if (!cc) - cc = imx_media_find_mbus_format(mbus->code, CS_SEL_ANY, - true); + cc = imx_media_find_mbus_format(mbus->code, + CS_SEL_ANY); if (!cc) return -EINVAL; } @@ -540,8 +540,8 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, if (cc->ipufmt && cc->cs == IPUV3_COLORSPACE_YUV) { u32 code; - imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV, false); - cc = imx_media_find_mbus_format(code, CS_SEL_YUV, false); + imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV); + cc = imx_media_find_mbus_format(code, CS_SEL_YUV); } /* Round up width for minimum burst size */ @@ -592,7 +592,7 @@ int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, { const struct imx_media_pixfmt *fmt; - fmt = imx_media_find_format(image->pix.pixelformat, CS_SEL_ANY, true); + fmt = imx_media_find_format(image->pix.pixelformat, CS_SEL_ANY); if (!fmt) return -EINVAL; diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index 11861191324ae..652673a703cd1 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -150,20 +150,20 @@ struct imx_media_dev { }; enum codespace_sel { - CS_SEL_YUV = 0, - CS_SEL_RGB, - CS_SEL_ANY, + CS_SEL_YUV = BIT(0), + CS_SEL_RGB = BIT(1), + CS_SEL_BAYER = BIT(2), + CS_SEL_YUV_RGB = CS_SEL_YUV | CS_SEL_RGB, + CS_SEL_ANY = CS_SEL_YUV | CS_SEL_RGB | CS_SEL_BAYER, }; /* imx-media-utils.c */ const struct imx_media_pixfmt * -imx_media_find_format(u32 fourcc, enum codespace_sel cs_sel, bool allow_bayer); +imx_media_find_format(u32 fourcc, enum codespace_sel cs_sel); int imx_media_enum_format(u32 *fourcc, u32 index, enum codespace_sel cs_sel); const struct imx_media_pixfmt * -imx_media_find_mbus_format(u32 code, enum codespace_sel cs_sel, - bool allow_bayer); -int imx_media_enum_mbus_format(u32 *code, u32 index, enum codespace_sel cs_sel, - bool allow_bayer); +imx_media_find_mbus_format(u32 code, enum codespace_sel cs_sel); +int imx_media_enum_mbus_format(u32 *code, u32 index, enum codespace_sel cs_sel); const struct imx_media_pixfmt * imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel); int imx_media_enum_ipu_format(u32 *code, u32 index, enum codespace_sel cs_sel); diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index acbdffb77668f..b8818ee99e24e 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -959,7 +959,7 @@ static int imx7_csi_enum_mbus_code(struct v4l2_subdev *sd, switch (code->pad) { case IMX7_CSI_PAD_SINK: ret = imx_media_enum_mbus_format(&code->code, code->index, - CS_SEL_ANY, true); + CS_SEL_ANY); break; case IMX7_CSI_PAD_SRC: if (code->index != 0) { @@ -1019,8 +1019,7 @@ static int imx7_csi_try_fmt(struct imx7_csi *csi, switch (sdformat->pad) { case IMX7_CSI_PAD_SRC: - in_cc = imx_media_find_mbus_format(in_fmt->code, CS_SEL_ANY, - true); + in_cc = imx_media_find_mbus_format(in_fmt->code, CS_SEL_ANY); sdformat->format.width = in_fmt->width; sdformat->format.height = in_fmt->height; @@ -1035,11 +1034,10 @@ static int imx7_csi_try_fmt(struct imx7_csi *csi, break; case IMX7_CSI_PAD_SINK: *cc = imx_media_find_mbus_format(sdformat->format.code, - CS_SEL_ANY, true); + CS_SEL_ANY); if (!*cc) { - imx_media_enum_mbus_format(&code, 0, CS_SEL_ANY, false); - *cc = imx_media_find_mbus_format(code, CS_SEL_ANY, - false); + imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV_RGB); + *cc = imx_media_find_mbus_format(code, CS_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; } -- GitLab From 3130c45c2ba357d0f495f178fc34b6b76c215596 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Mon, 6 Apr 2020 18:38:59 +0200 Subject: [PATCH 183/503] media: imx: Fix some pixel format selections - imx_media_capture_device_register() needs to use CS_SEL_ANY when finding the format from the attached source subdevice, because the source can be a CSI which supports bayer, and the CSI may have selected a bayer format when it registered. - Likewise, imx_media_init_mbus_fmt() is called from the CSI, so the function may be passed a bayer code. Use CS_SEL_ANY when locating the format. Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-capture.c | 2 +- drivers/staging/media/imx/imx-media-utils.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index fe1c49a33fd9a..970f54960cac3 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c @@ -792,7 +792,7 @@ int imx_media_capture_device_register(struct imx_media_video_dev *vdev) vdev->compose.width = fmt_src.format.width; vdev->compose.height = fmt_src.format.height; vdev->cc = imx_media_find_format(vdev->fmt.fmt.pix.pixelformat, - CS_SEL_YUV_RGB); + CS_SEL_ANY); v4l2_info(sd, "Registered %s as /dev/%s\n", vfd->name, video_device_node_name(vfd)); diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 5552039a9d7e8..852badd55bd13 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -402,7 +402,7 @@ int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, mbus->field = field; if (code == 0) imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV); - lcc = imx_media_find_mbus_format(code, CS_SEL_YUV_RGB); + lcc = imx_media_find_mbus_format(code, CS_SEL_ANY); if (!lcc) { lcc = imx_media_find_ipu_format(code, CS_SEL_YUV_RGB); if (!lcc) -- GitLab From a7d5003cab01458941907815d169999f885ecec3 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Mon, 6 Apr 2020 18:39:00 +0200 Subject: [PATCH 184/503] media: imx: utils: Rename pixel format selection enumeration After the introduction of the CS_SEL_BAYER flag, the "codespace" pixel format selection enumeration wording no longer makes sense (and even before, when selecting between YUV or RGB formats, "codespace" was a misuse of the term). Rename - 'enum codespace_sel' to 'enum imx_pixfmt_sel' - CS_SEL_* to PIXFMT_SEL_* - local vars named cs_sel to fmt_sel or just sel No functional changes. Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-ic-prp.c | 12 +-- drivers/staging/media/imx/imx-ic-prpencvf.c | 12 +-- drivers/staging/media/imx/imx-media-capture.c | 34 ++++---- .../staging/media/imx/imx-media-csc-scaler.c | 2 +- drivers/staging/media/imx/imx-media-csi.c | 35 ++++---- drivers/staging/media/imx/imx-media-utils.c | 87 ++++++++++--------- drivers/staging/media/imx/imx-media-vdic.c | 12 +-- drivers/staging/media/imx/imx-media.h | 28 +++--- drivers/staging/media/imx/imx7-media-csi.c | 13 +-- 9 files changed, 128 insertions(+), 107 deletions(-) diff --git a/drivers/staging/media/imx/imx-ic-prp.c b/drivers/staging/media/imx/imx-ic-prp.c index 722a6e2c19235..acad59b424235 100644 --- a/drivers/staging/media/imx/imx-ic-prp.c +++ b/drivers/staging/media/imx/imx-ic-prp.c @@ -107,7 +107,7 @@ static int prp_enum_mbus_code(struct v4l2_subdev *sd, switch (code->pad) { case PRP_SINK_PAD: ret = imx_media_enum_ipu_format(&code->code, code->index, - CS_SEL_YUV_RGB); + PIXFMT_SEL_YUV_RGB); break; case PRP_SRC_PAD_PRPENC: case PRP_SRC_PAD_PRPVF: @@ -180,10 +180,12 @@ static int prp_set_fmt(struct v4l2_subdev *sd, MIN_H, MAX_H, H_ALIGN, S_ALIGN); cc = imx_media_find_ipu_format(sdformat->format.code, - CS_SEL_YUV_RGB); + PIXFMT_SEL_YUV_RGB); if (!cc) { - imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV_RGB); - cc = imx_media_find_ipu_format(code, CS_SEL_YUV_RGB); + imx_media_enum_ipu_format(&code, 0, + PIXFMT_SEL_YUV_RGB); + cc = imx_media_find_ipu_format(code, + PIXFMT_SEL_YUV_RGB); sdformat->format.code = cc->codes[0]; } @@ -438,7 +440,7 @@ static int prp_registered(struct v4l2_subdev *sd) priv->frame_interval.denominator = 30; /* set a default mbus format */ - imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV); + imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); return imx_media_init_mbus_fmt(&priv->format_mbus, 640, 480, code, V4L2_FIELD_NONE, NULL); } diff --git a/drivers/staging/media/imx/imx-ic-prpencvf.c b/drivers/staging/media/imx/imx-ic-prpencvf.c index 8a91b2167837c..7035c15176fd2 100644 --- a/drivers/staging/media/imx/imx-ic-prpencvf.c +++ b/drivers/staging/media/imx/imx-ic-prpencvf.c @@ -851,7 +851,7 @@ static int prp_enum_mbus_code(struct v4l2_subdev *sd, return -EINVAL; return imx_media_enum_ipu_format(&code->code, code->index, - CS_SEL_YUV_RGB); + PIXFMT_SEL_YUV_RGB); } static int prp_get_fmt(struct v4l2_subdev *sd, @@ -886,12 +886,14 @@ static void prp_try_fmt(struct prp_priv *priv, { struct v4l2_mbus_framefmt *infmt; - *cc = imx_media_find_ipu_format(sdformat->format.code, CS_SEL_YUV_RGB); + *cc = imx_media_find_ipu_format(sdformat->format.code, + PIXFMT_SEL_YUV_RGB); if (!*cc) { u32 code; - imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV_RGB); - *cc = imx_media_find_ipu_format(code, CS_SEL_YUV_RGB); + imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV_RGB); + *cc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV_RGB); + sdformat->format.code = (*cc)->codes[0]; } @@ -1249,7 +1251,7 @@ static int prp_registered(struct v4l2_subdev *sd) u32 code; /* set a default mbus format */ - imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV); + imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); for (i = 0; i < PRPENCVF_NUM_PADS; i++) { ret = imx_media_init_mbus_fmt(&priv->format_mbus[i], 640, 480, code, V4L2_FIELD_NONE, diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index 970f54960cac3..a7211ccc21e13 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c @@ -91,7 +91,7 @@ static int capture_enum_framesizes(struct file *file, void *fh, }; int ret; - cc = imx_media_find_format(fsize->pixel_format, CS_SEL_ANY); + cc = imx_media_find_format(fsize->pixel_format, PIXFMT_SEL_ANY); if (!cc) return -EINVAL; @@ -133,7 +133,7 @@ static int capture_enum_frameintervals(struct file *file, void *fh, }; int ret; - cc = imx_media_find_format(fival->pixel_format, CS_SEL_ANY); + cc = imx_media_find_format(fival->pixel_format, PIXFMT_SEL_ANY); if (!cc) return -EINVAL; @@ -168,17 +168,18 @@ static int capture_enum_fmt_vid_cap(struct file *file, void *fh, } cc_src = imx_media_find_ipu_format(fmt_src.format.code, - CS_SEL_YUV_RGB); + PIXFMT_SEL_YUV_RGB); if (cc_src) { - u32 cs_sel = (cc_src->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB; + enum imx_pixfmt_sel fmt_sel = + (cc_src->cs == IPUV3_COLORSPACE_YUV) ? + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB; - ret = imx_media_enum_format(&fourcc, f->index, cs_sel); + ret = imx_media_enum_format(&fourcc, f->index, fmt_sel); if (ret) return ret; } else { cc_src = imx_media_find_mbus_format(fmt_src.format.code, - CS_SEL_ANY); + PIXFMT_SEL_ANY); if (WARN_ON(!cc_src)) return -EINVAL; @@ -211,22 +212,23 @@ static int __capture_try_fmt_vid_cap(struct capture_priv *priv, const struct imx_media_pixfmt *cc, *cc_src; cc_src = imx_media_find_ipu_format(fmt_src->format.code, - CS_SEL_YUV_RGB); + PIXFMT_SEL_YUV_RGB); if (cc_src) { - u32 fourcc, cs_sel; + enum imx_pixfmt_sel fmt_sel; + u32 fourcc; - cs_sel = (cc_src->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB; + fmt_sel = (cc_src->cs == IPUV3_COLORSPACE_YUV) ? + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB; fourcc = f->fmt.pix.pixelformat; - cc = imx_media_find_format(fourcc, cs_sel); + cc = imx_media_find_format(fourcc, fmt_sel); if (!cc) { - imx_media_enum_format(&fourcc, 0, cs_sel); - cc = imx_media_find_format(fourcc, cs_sel); + imx_media_enum_format(&fourcc, 0, fmt_sel); + cc = imx_media_find_format(fourcc, fmt_sel); } } else { cc_src = imx_media_find_mbus_format(fmt_src->format.code, - CS_SEL_ANY); + PIXFMT_SEL_ANY); if (WARN_ON(!cc_src)) return -EINVAL; @@ -792,7 +794,7 @@ int imx_media_capture_device_register(struct imx_media_video_dev *vdev) vdev->compose.width = fmt_src.format.width; vdev->compose.height = fmt_src.format.height; vdev->cc = imx_media_find_format(vdev->fmt.fmt.pix.pixelformat, - CS_SEL_ANY); + PIXFMT_SEL_ANY); v4l2_info(sd, "Registered %s as /dev/%s\n", vfd->name, video_device_node_name(vfd)); diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c index 3e1c88938e7d0..ddb70da56853e 100644 --- a/drivers/staging/media/imx/imx-media-csc-scaler.c +++ b/drivers/staging/media/imx/imx-media-csc-scaler.c @@ -164,7 +164,7 @@ static int ipu_csc_scaler_enum_fmt(struct file *file, void *fh, u32 fourcc; int ret; - ret = imx_media_enum_format(&fourcc, f->index, CS_SEL_YUV_RGB); + ret = imx_media_enum_format(&fourcc, f->index, PIXFMT_SEL_YUV_RGB); if (ret) return ret; diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 0877717db3f4d..df427fcfb0ece 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -1234,12 +1234,12 @@ static int csi_enum_mbus_code(struct v4l2_subdev *sd, mutex_lock(&priv->lock); infmt = __csi_get_fmt(priv, cfg, CSI_SINK_PAD, code->which); - incc = imx_media_find_mbus_format(infmt->code, CS_SEL_ANY); + incc = imx_media_find_mbus_format(infmt->code, PIXFMT_SEL_ANY); switch (code->pad) { case CSI_SINK_PAD: ret = imx_media_enum_mbus_format(&code->code, code->index, - CS_SEL_ANY); + PIXFMT_SEL_ANY); break; case CSI_SRC_PAD_DIRECT: case CSI_SRC_PAD_IDMAC: @@ -1256,11 +1256,13 @@ static int csi_enum_mbus_code(struct v4l2_subdev *sd, } code->code = infmt->code; } else { - u32 cs_sel = (incc->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB; + enum imx_pixfmt_sel fmt_sel = + (incc->cs == IPUV3_COLORSPACE_YUV) ? + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB; + ret = imx_media_enum_ipu_format(&code->code, code->index, - cs_sel); + fmt_sel); } break; default: @@ -1433,7 +1435,7 @@ static void csi_try_fmt(struct csi_priv *priv, switch (sdformat->pad) { case CSI_SRC_PAD_DIRECT: case CSI_SRC_PAD_IDMAC: - incc = imx_media_find_mbus_format(infmt->code, CS_SEL_ANY); + incc = imx_media_find_mbus_format(infmt->code, PIXFMT_SEL_ANY); sdformat->format.width = compose->width; sdformat->format.height = compose->height; @@ -1442,14 +1444,15 @@ static void csi_try_fmt(struct csi_priv *priv, sdformat->format.code = infmt->code; *cc = incc; } else { - u32 cs_sel = (incc->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB; + enum imx_pixfmt_sel fmt_sel = + (incc->cs == IPUV3_COLORSPACE_YUV) ? + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB; *cc = imx_media_find_ipu_format(sdformat->format.code, - cs_sel); + fmt_sel); if (!*cc) { - imx_media_enum_ipu_format(&code, 0, cs_sel); - *cc = imx_media_find_ipu_format(code, cs_sel); + imx_media_enum_ipu_format(&code, 0, fmt_sel); + *cc = imx_media_find_ipu_format(code, fmt_sel); sdformat->format.code = (*cc)->codes[0]; } } @@ -1469,10 +1472,12 @@ static void csi_try_fmt(struct csi_priv *priv, MIN_H, MAX_H, H_ALIGN, S_ALIGN); *cc = imx_media_find_mbus_format(sdformat->format.code, - CS_SEL_ANY); + PIXFMT_SEL_ANY); if (!*cc) { - imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV_RGB); - *cc = imx_media_find_mbus_format(code, CS_SEL_YUV_RGB); + imx_media_enum_mbus_format(&code, 0, + PIXFMT_SEL_YUV_RGB); + *cc = imx_media_find_mbus_format(code, + PIXFMT_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; } @@ -1758,7 +1763,7 @@ static int csi_registered(struct v4l2_subdev *sd) for (i = 0; i < CSI_NUM_PADS; i++) { code = 0; if (i != CSI_SINK_PAD) - imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV); + imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); /* set a default mbus format */ ret = imx_media_init_mbus_fmt(&priv->format_mbus[i], diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 852badd55bd13..32acece14a6f7 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -212,21 +212,21 @@ static const struct imx_media_pixfmt ipu_rgb_formats[] = { static const struct imx_media_pixfmt *find_format(u32 fourcc, u32 code, - enum codespace_sel cs_sel, + enum imx_pixfmt_sel fmt_sel, bool allow_non_mbus) { unsigned int i; for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { const struct imx_media_pixfmt *fmt = &pixel_formats[i]; - enum codespace_sel fmt_cs_sel; + enum imx_pixfmt_sel sel; unsigned int j; - fmt_cs_sel = fmt->bayer ? CS_SEL_BAYER : + sel = fmt->bayer ? PIXFMT_SEL_BAYER : ((fmt->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB); + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); - if (!(fmt_cs_sel & cs_sel) || + if (!(fmt_sel & sel) || (!allow_non_mbus && !fmt->codes[0])) continue; @@ -246,21 +246,21 @@ static const struct imx_media_pixfmt *find_format(u32 fourcc, } static int enum_format(u32 *fourcc, u32 *code, u32 index, - enum codespace_sel cs_sel, + enum imx_pixfmt_sel fmt_sel, bool allow_non_mbus) { unsigned int i; for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { const struct imx_media_pixfmt *fmt = &pixel_formats[i]; - enum codespace_sel fmt_cs_sel; + enum imx_pixfmt_sel sel; unsigned int j; - fmt_cs_sel = fmt->bayer ? CS_SEL_BAYER : + sel = fmt->bayer ? PIXFMT_SEL_BAYER : ((fmt->cs == IPUV3_COLORSPACE_YUV) ? - CS_SEL_YUV : CS_SEL_RGB); + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); - if (!(fmt_cs_sel & cs_sel) || + if (!(fmt_sel & sel) || (!allow_non_mbus && !fmt->codes[0])) continue; @@ -288,50 +288,51 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, } const struct imx_media_pixfmt * -imx_media_find_format(u32 fourcc, enum codespace_sel cs_sel) +imx_media_find_format(u32 fourcc, enum imx_pixfmt_sel fmt_sel) { - return find_format(fourcc, 0, cs_sel, true); + return find_format(fourcc, 0, fmt_sel, true); } EXPORT_SYMBOL_GPL(imx_media_find_format); -int imx_media_enum_format(u32 *fourcc, u32 index, enum codespace_sel cs_sel) +int imx_media_enum_format(u32 *fourcc, u32 index, enum imx_pixfmt_sel fmt_sel) { - return enum_format(fourcc, NULL, index, cs_sel, true); + return enum_format(fourcc, NULL, index, fmt_sel, true); } EXPORT_SYMBOL_GPL(imx_media_enum_format); const struct imx_media_pixfmt * -imx_media_find_mbus_format(u32 code, enum codespace_sel cs_sel) +imx_media_find_mbus_format(u32 code, enum imx_pixfmt_sel fmt_sel) { - return find_format(0, code, cs_sel, false); + return find_format(0, code, fmt_sel, false); } EXPORT_SYMBOL_GPL(imx_media_find_mbus_format); -int imx_media_enum_mbus_format(u32 *code, u32 index, enum codespace_sel cs_sel) +int imx_media_enum_mbus_format(u32 *code, u32 index, + enum imx_pixfmt_sel fmt_sel) { - return enum_format(NULL, code, index, cs_sel, false); + return enum_format(NULL, code, index, fmt_sel, false); } EXPORT_SYMBOL_GPL(imx_media_enum_mbus_format); const struct imx_media_pixfmt * -imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel) +imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel fmt_sel) { const struct imx_media_pixfmt *array, *fmt, *ret = NULL; u32 array_size; int i, j; - cs_sel &= ~CS_SEL_BAYER; + fmt_sel &= ~PIXFMT_SEL_BAYER; - switch (cs_sel) { - case CS_SEL_YUV: + switch (fmt_sel) { + case PIXFMT_SEL_YUV: array_size = NUM_IPU_YUV_FORMATS; array = ipu_yuv_formats; break; - case CS_SEL_RGB: + case PIXFMT_SEL_RGB: array_size = NUM_IPU_RGB_FORMATS; array = ipu_rgb_formats; break; - case CS_SEL_YUV_RGB: + case PIXFMT_SEL_YUV_RGB: array_size = NUM_IPU_YUV_FORMATS + NUM_IPU_RGB_FORMATS; array = ipu_yuv_formats; break; @@ -340,7 +341,7 @@ imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel) } for (i = 0; i < array_size; i++) { - if (cs_sel == CS_SEL_YUV_RGB && i >= NUM_IPU_YUV_FORMATS) + if (fmt_sel == PIXFMT_SEL_YUV_RGB && i >= NUM_IPU_YUV_FORMATS) fmt = &ipu_rgb_formats[i - NUM_IPU_YUV_FORMATS]; else fmt = &array[i]; @@ -358,22 +359,23 @@ imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel) } EXPORT_SYMBOL_GPL(imx_media_find_ipu_format); -int imx_media_enum_ipu_format(u32 *code, u32 index, enum codespace_sel cs_sel) +int imx_media_enum_ipu_format(u32 *code, u32 index, + enum imx_pixfmt_sel fmt_sel) { - cs_sel &= ~CS_SEL_BAYER; + fmt_sel &= ~PIXFMT_SEL_BAYER; - switch (cs_sel) { - case CS_SEL_YUV: + switch (fmt_sel) { + case PIXFMT_SEL_YUV: if (index >= NUM_IPU_YUV_FORMATS) return -EINVAL; *code = ipu_yuv_formats[index].codes[0]; break; - case CS_SEL_RGB: + case PIXFMT_SEL_RGB: if (index >= NUM_IPU_RGB_FORMATS) return -EINVAL; *code = ipu_rgb_formats[index].codes[0]; break; - case CS_SEL_YUV_RGB: + case PIXFMT_SEL_YUV_RGB: if (index >= NUM_IPU_YUV_FORMATS + NUM_IPU_RGB_FORMATS) return -EINVAL; if (index >= NUM_IPU_YUV_FORMATS) { @@ -401,10 +403,10 @@ int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, mbus->height = height; mbus->field = field; if (code == 0) - imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV); - lcc = imx_media_find_mbus_format(code, CS_SEL_ANY); + imx_media_enum_mbus_format(&code, 0, PIXFMT_SEL_YUV); + lcc = imx_media_find_mbus_format(code, PIXFMT_SEL_ANY); if (!lcc) { - lcc = imx_media_find_ipu_format(code, CS_SEL_YUV_RGB); + lcc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV_RGB); if (!lcc) return -EINVAL; } @@ -473,9 +475,11 @@ void imx_media_try_colorimetry(struct v4l2_mbus_framefmt *tryfmt, const struct imx_media_pixfmt *cc; bool is_rgb = false; - cc = imx_media_find_mbus_format(tryfmt->code, CS_SEL_ANY); + cc = imx_media_find_mbus_format(tryfmt->code, PIXFMT_SEL_ANY); if (!cc) - cc = imx_media_find_ipu_format(tryfmt->code, CS_SEL_YUV_RGB); + cc = imx_media_find_ipu_format(tryfmt->code, + PIXFMT_SEL_YUV_RGB); + if (cc && cc->cs == IPUV3_COLORSPACE_RGB) is_rgb = true; @@ -525,10 +529,11 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, u32 stride; if (!cc) { - cc = imx_media_find_ipu_format(mbus->code, CS_SEL_YUV_RGB); + cc = imx_media_find_ipu_format(mbus->code, + PIXFMT_SEL_YUV_RGB); if (!cc) cc = imx_media_find_mbus_format(mbus->code, - CS_SEL_ANY); + PIXFMT_SEL_ANY); if (!cc) return -EINVAL; } @@ -540,8 +545,8 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, if (cc->ipufmt && cc->cs == IPUV3_COLORSPACE_YUV) { u32 code; - imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV); - cc = imx_media_find_mbus_format(code, CS_SEL_YUV); + imx_media_enum_mbus_format(&code, 0, PIXFMT_SEL_YUV); + cc = imx_media_find_mbus_format(code, PIXFMT_SEL_YUV); } /* Round up width for minimum burst size */ @@ -592,7 +597,7 @@ int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, { const struct imx_media_pixfmt *fmt; - fmt = imx_media_find_format(image->pix.pixelformat, CS_SEL_ANY); + fmt = imx_media_find_format(image->pix.pixelformat, PIXFMT_SEL_ANY); if (!fmt) return -EINVAL; diff --git a/drivers/staging/media/imx/imx-media-vdic.c b/drivers/staging/media/imx/imx-media-vdic.c index 0d83c2c41606b..9807d578ce897 100644 --- a/drivers/staging/media/imx/imx-media-vdic.c +++ b/drivers/staging/media/imx/imx-media-vdic.c @@ -548,7 +548,8 @@ static int vdic_enum_mbus_code(struct v4l2_subdev *sd, if (code->pad >= VDIC_NUM_PADS) return -EINVAL; - return imx_media_enum_ipu_format(&code->code, code->index, CS_SEL_YUV); + return imx_media_enum_ipu_format(&code->code, code->index, + PIXFMT_SEL_YUV); } static int vdic_get_fmt(struct v4l2_subdev *sd, @@ -583,12 +584,13 @@ static void vdic_try_fmt(struct vdic_priv *priv, { struct v4l2_mbus_framefmt *infmt; - *cc = imx_media_find_ipu_format(sdformat->format.code, CS_SEL_YUV); + *cc = imx_media_find_ipu_format(sdformat->format.code, + PIXFMT_SEL_YUV); if (!*cc) { u32 code; - imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV); - *cc = imx_media_find_ipu_format(code, CS_SEL_YUV); + imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); + *cc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV); sdformat->format.code = (*cc)->codes[0]; } @@ -850,7 +852,7 @@ static int vdic_registered(struct v4l2_subdev *sd) for (i = 0; i < VDIC_NUM_PADS; i++) { code = 0; if (i != VDIC_SINK_PAD_IDMAC) - imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV); + imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); /* set a default mbus format */ ret = imx_media_init_mbus_fmt(&priv->format_mbus[i], diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index 652673a703cd1..ac7c521d8148d 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -79,6 +79,14 @@ struct imx_media_pixfmt { bool ipufmt; /* is one of the IPU internal formats */ }; +enum imx_pixfmt_sel { + PIXFMT_SEL_YUV = BIT(0), /* select YUV formats */ + PIXFMT_SEL_RGB = BIT(1), /* select RGB formats */ + PIXFMT_SEL_BAYER = BIT(2), /* select BAYER formats */ + PIXFMT_SEL_YUV_RGB = PIXFMT_SEL_YUV | PIXFMT_SEL_RGB, + PIXFMT_SEL_ANY = PIXFMT_SEL_YUV | PIXFMT_SEL_RGB | PIXFMT_SEL_BAYER, +}; + struct imx_media_buffer { struct vb2_v4l2_buffer vbuf; /* v4l buffer must be first */ struct list_head list; @@ -149,24 +157,16 @@ struct imx_media_dev { struct v4l2_subdev *sync_sd[2][NUM_IPU_SUBDEVS]; }; -enum codespace_sel { - CS_SEL_YUV = BIT(0), - CS_SEL_RGB = BIT(1), - CS_SEL_BAYER = BIT(2), - CS_SEL_YUV_RGB = CS_SEL_YUV | CS_SEL_RGB, - CS_SEL_ANY = CS_SEL_YUV | CS_SEL_RGB | CS_SEL_BAYER, -}; - /* imx-media-utils.c */ const struct imx_media_pixfmt * -imx_media_find_format(u32 fourcc, enum codespace_sel cs_sel); -int imx_media_enum_format(u32 *fourcc, u32 index, enum codespace_sel cs_sel); +imx_media_find_format(u32 fourcc, enum imx_pixfmt_sel sel); +int imx_media_enum_format(u32 *fourcc, u32 index, enum imx_pixfmt_sel sel); const struct imx_media_pixfmt * -imx_media_find_mbus_format(u32 code, enum codespace_sel cs_sel); -int imx_media_enum_mbus_format(u32 *code, u32 index, enum codespace_sel cs_sel); +imx_media_find_mbus_format(u32 code, enum imx_pixfmt_sel sel); +int imx_media_enum_mbus_format(u32 *code, u32 index, enum imx_pixfmt_sel sel); const struct imx_media_pixfmt * -imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel); -int imx_media_enum_ipu_format(u32 *code, u32 index, enum codespace_sel cs_sel); +imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel sel); +int imx_media_enum_ipu_format(u32 *code, u32 index, enum imx_pixfmt_sel sel); int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, u32 width, u32 height, u32 code, u32 field, const struct imx_media_pixfmt **cc); diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index b8818ee99e24e..73169605e5e02 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -959,7 +959,7 @@ static int imx7_csi_enum_mbus_code(struct v4l2_subdev *sd, switch (code->pad) { case IMX7_CSI_PAD_SINK: ret = imx_media_enum_mbus_format(&code->code, code->index, - CS_SEL_ANY); + PIXFMT_SEL_ANY); break; case IMX7_CSI_PAD_SRC: if (code->index != 0) { @@ -1019,7 +1019,8 @@ static int imx7_csi_try_fmt(struct imx7_csi *csi, switch (sdformat->pad) { case IMX7_CSI_PAD_SRC: - in_cc = imx_media_find_mbus_format(in_fmt->code, CS_SEL_ANY); + in_cc = imx_media_find_mbus_format(in_fmt->code, + PIXFMT_SEL_ANY); sdformat->format.width = in_fmt->width; sdformat->format.height = in_fmt->height; @@ -1034,10 +1035,12 @@ static int imx7_csi_try_fmt(struct imx7_csi *csi, break; case IMX7_CSI_PAD_SINK: *cc = imx_media_find_mbus_format(sdformat->format.code, - CS_SEL_ANY); + PIXFMT_SEL_ANY); if (!*cc) { - imx_media_enum_mbus_format(&code, 0, CS_SEL_YUV_RGB); - *cc = imx_media_find_mbus_format(code, CS_SEL_YUV_RGB); + imx_media_enum_mbus_format(&code, 0, + PIXFMT_SEL_YUV_RGB); + *cc = imx_media_find_mbus_format(code, + PIXFMT_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; } -- GitLab From f0f71ae440a956d51ed1f3e2ba17638c51b7dfa7 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Mon, 6 Apr 2020 18:39:01 +0200 Subject: [PATCH 185/503] media: imx: utils: Introduce PIXFMT_SEL_IPU Add a PIXFMT_SEL_IPU selection flag, to select only the IPU-internal pixel formats, and move the single-entry IPU-internal pixel format arrays into pixel_formats[]. imx_media_find_ipu_format() and imx_media_enum_ipu_format() can now simply call find_format() and enum_format(). The RGB32 format is both an IPU-internal format, and an in-memory format via idmac channels that is supported by the IPUv3 driver, so it appears twice in pixel_formats[], one with ipufmt=false for the in-memory format, and again with ipufmt=true for the IPU-internal format. Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-utils.c | 116 +++++--------------- drivers/staging/media/imx/imx-media.h | 1 + 2 files changed, 26 insertions(+), 91 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 32acece14a6f7..7566e0ae5e818 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -53,6 +53,12 @@ static const struct imx_media_pixfmt pixel_formats[] = { .cs = IPUV3_COLORSPACE_YUV, .bpp = 16, .planar = true, + }, { + .fourcc = V4L2_PIX_FMT_YUV32, + .codes = {MEDIA_BUS_FMT_AYUV8_1X32}, + .cs = IPUV3_COLORSPACE_YUV, + .bpp = 32, + .ipufmt = true, }, /*** RGB formats start here ***/ { @@ -73,6 +79,11 @@ static const struct imx_media_pixfmt pixel_formats[] = { .fourcc = V4L2_PIX_FMT_BGR24, .cs = IPUV3_COLORSPACE_RGB, .bpp = 24, + }, { + .fourcc = V4L2_PIX_FMT_XRGB32, + .codes = {MEDIA_BUS_FMT_ARGB8888_1X32}, + .cs = IPUV3_COLORSPACE_RGB, + .bpp = 32, }, { .fourcc = V4L2_PIX_FMT_XRGB32, .codes = {MEDIA_BUS_FMT_ARGB8888_1X32}, @@ -186,42 +197,24 @@ static const struct imx_media_pixfmt pixel_formats[] = { }, }; -static const struct imx_media_pixfmt ipu_yuv_formats[] = { - { - .fourcc = V4L2_PIX_FMT_YUV32, - .codes = {MEDIA_BUS_FMT_AYUV8_1X32}, - .cs = IPUV3_COLORSPACE_YUV, - .bpp = 32, - .ipufmt = true, - }, -}; - -#define NUM_IPU_YUV_FORMATS ARRAY_SIZE(ipu_yuv_formats) - -static const struct imx_media_pixfmt ipu_rgb_formats[] = { - { - .fourcc = V4L2_PIX_FMT_XRGB32, - .codes = {MEDIA_BUS_FMT_ARGB8888_1X32}, - .cs = IPUV3_COLORSPACE_RGB, - .bpp = 32, - .ipufmt = true, - }, -}; - -#define NUM_IPU_RGB_FORMATS ARRAY_SIZE(ipu_rgb_formats) - static const struct imx_media_pixfmt *find_format(u32 fourcc, u32 code, enum imx_pixfmt_sel fmt_sel, bool allow_non_mbus) { + bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; unsigned int i; + fmt_sel &= ~PIXFMT_SEL_IPU; + for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { const struct imx_media_pixfmt *fmt = &pixel_formats[i]; enum imx_pixfmt_sel sel; unsigned int j; + if (sel_ipu != fmt->ipufmt) + continue; + sel = fmt->bayer ? PIXFMT_SEL_BAYER : ((fmt->cs == IPUV3_COLORSPACE_YUV) ? PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); @@ -249,13 +242,19 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, enum imx_pixfmt_sel fmt_sel, bool allow_non_mbus) { + bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; unsigned int i; + fmt_sel &= ~PIXFMT_SEL_IPU; + for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { const struct imx_media_pixfmt *fmt = &pixel_formats[i]; enum imx_pixfmt_sel sel; unsigned int j; + if (sel_ipu != fmt->ipufmt) + continue; + sel = fmt->bayer ? PIXFMT_SEL_BAYER : ((fmt->cs == IPUV3_COLORSPACE_YUV) ? PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); @@ -317,79 +316,14 @@ EXPORT_SYMBOL_GPL(imx_media_enum_mbus_format); const struct imx_media_pixfmt * imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel fmt_sel) { - const struct imx_media_pixfmt *array, *fmt, *ret = NULL; - u32 array_size; - int i, j; - - fmt_sel &= ~PIXFMT_SEL_BAYER; - - switch (fmt_sel) { - case PIXFMT_SEL_YUV: - array_size = NUM_IPU_YUV_FORMATS; - array = ipu_yuv_formats; - break; - case PIXFMT_SEL_RGB: - array_size = NUM_IPU_RGB_FORMATS; - array = ipu_rgb_formats; - break; - case PIXFMT_SEL_YUV_RGB: - array_size = NUM_IPU_YUV_FORMATS + NUM_IPU_RGB_FORMATS; - array = ipu_yuv_formats; - break; - default: - return NULL; - } - - for (i = 0; i < array_size; i++) { - if (fmt_sel == PIXFMT_SEL_YUV_RGB && i >= NUM_IPU_YUV_FORMATS) - fmt = &ipu_rgb_formats[i - NUM_IPU_YUV_FORMATS]; - else - fmt = &array[i]; - - for (j = 0; code && fmt->codes[j]; j++) { - if (code == fmt->codes[j]) { - ret = fmt; - goto out; - } - } - } - -out: - return ret; + return find_format(0, code, fmt_sel | PIXFMT_SEL_IPU, false); } EXPORT_SYMBOL_GPL(imx_media_find_ipu_format); int imx_media_enum_ipu_format(u32 *code, u32 index, enum imx_pixfmt_sel fmt_sel) { - fmt_sel &= ~PIXFMT_SEL_BAYER; - - switch (fmt_sel) { - case PIXFMT_SEL_YUV: - if (index >= NUM_IPU_YUV_FORMATS) - return -EINVAL; - *code = ipu_yuv_formats[index].codes[0]; - break; - case PIXFMT_SEL_RGB: - if (index >= NUM_IPU_RGB_FORMATS) - return -EINVAL; - *code = ipu_rgb_formats[index].codes[0]; - break; - case PIXFMT_SEL_YUV_RGB: - if (index >= NUM_IPU_YUV_FORMATS + NUM_IPU_RGB_FORMATS) - return -EINVAL; - if (index >= NUM_IPU_YUV_FORMATS) { - index -= NUM_IPU_YUV_FORMATS; - *code = ipu_rgb_formats[index].codes[0]; - } else { - *code = ipu_yuv_formats[index].codes[0]; - } - break; - default: - return -EINVAL; - } - - return 0; + return enum_format(NULL, code, index, fmt_sel | PIXFMT_SEL_IPU, false); } EXPORT_SYMBOL_GPL(imx_media_enum_ipu_format); diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index ac7c521d8148d..c61592750729d 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -83,6 +83,7 @@ enum imx_pixfmt_sel { PIXFMT_SEL_YUV = BIT(0), /* select YUV formats */ PIXFMT_SEL_RGB = BIT(1), /* select RGB formats */ PIXFMT_SEL_BAYER = BIT(2), /* select BAYER formats */ + PIXFMT_SEL_IPU = BIT(3), /* select IPU-internal formats */ PIXFMT_SEL_YUV_RGB = PIXFMT_SEL_YUV | PIXFMT_SEL_RGB, PIXFMT_SEL_ANY = PIXFMT_SEL_YUV | PIXFMT_SEL_RGB | PIXFMT_SEL_BAYER, }; -- GitLab From c943b6947f459189419114682ac343fc1e22a954 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 6 Apr 2020 18:39:02 +0200 Subject: [PATCH 186/503] media: imx: utils: Make imx_media_pixfmt handle variable number of codes The imx_media_pixfmt structures include a codes member that stores media bus codes as a fixed array of 4 integers. The functions dealing with the imx_media_pixfmt structures assume that the array of codes is terminated by a 0 element. This mechanism is fragile, as demonstrated by several instances of the structure containing 4 non-zero codes. Fix this by turning the array into a pointer, and providing an IMX_BUS_FMTS macro to initialize the codes member with a guaranteed 0 element at the end. [Fixed a NULL deref of the codes pointer in a couple places] [Added more comments for the struct imx_media_pixfmt members, including a bold NOTE! for future developers that codes pointer is NULL for the in-memory-only formats] Signed-off-by: Laurent Pinchart Signed-off-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-capture.c | 4 +- drivers/staging/media/imx/imx-media-utils.c | 74 ++++++++++--------- drivers/staging/media/imx/imx-media.h | 7 +- 3 files changed, 46 insertions(+), 39 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index a7211ccc21e13..4b4ee81ad2e82 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c @@ -95,7 +95,7 @@ static int capture_enum_framesizes(struct file *file, void *fh, if (!cc) return -EINVAL; - fse.code = cc->codes[0]; + fse.code = cc->codes ? cc->codes[0] : 0; ret = v4l2_subdev_call(priv->src_sd, pad, enum_frame_size, NULL, &fse); if (ret) @@ -137,7 +137,7 @@ static int capture_enum_frameintervals(struct file *file, void *fh, if (!cc) return -EINVAL; - fie.code = cc->codes[0]; + fie.code = cc->codes ? cc->codes[0] : 0; ret = v4l2_subdev_call(priv->src_sd, pad, enum_frame_interval, NULL, &fie); diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 7566e0ae5e818..8d88c2a8df649 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -7,6 +7,8 @@ #include #include "imx-media.h" +#define IMX_BUS_FMTS(fmt...) (const u32[]) {fmt, 0} + /* * List of supported pixel formats for the subdevs. */ @@ -14,18 +16,18 @@ static const struct imx_media_pixfmt pixel_formats[] = { /*** YUV formats start here ***/ { .fourcc = V4L2_PIX_FMT_UYVY, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_UYVY8_2X8, MEDIA_BUS_FMT_UYVY8_1X16 - }, + ), .cs = IPUV3_COLORSPACE_YUV, .bpp = 16, }, { .fourcc = V4L2_PIX_FMT_YUYV, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_YUYV8_2X8, MEDIA_BUS_FMT_YUYV8_1X16 - }, + ), .cs = IPUV3_COLORSPACE_YUV, .bpp = 16, }, { @@ -55,7 +57,7 @@ static const struct imx_media_pixfmt pixel_formats[] = { .planar = true, }, { .fourcc = V4L2_PIX_FMT_YUV32, - .codes = {MEDIA_BUS_FMT_AYUV8_1X32}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_AYUV8_1X32), .cs = IPUV3_COLORSPACE_YUV, .bpp = 32, .ipufmt = true, @@ -63,16 +65,16 @@ static const struct imx_media_pixfmt pixel_formats[] = { /*** RGB formats start here ***/ { .fourcc = V4L2_PIX_FMT_RGB565, - .codes = {MEDIA_BUS_FMT_RGB565_2X8_LE}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_RGB565_2X8_LE), .cs = IPUV3_COLORSPACE_RGB, .bpp = 16, .cycles = 2, }, { .fourcc = V4L2_PIX_FMT_RGB24, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_RGB888_1X24, MEDIA_BUS_FMT_RGB888_2X12_LE - }, + ), .cs = IPUV3_COLORSPACE_RGB, .bpp = 24, }, { @@ -81,12 +83,12 @@ static const struct imx_media_pixfmt pixel_formats[] = { .bpp = 24, }, { .fourcc = V4L2_PIX_FMT_XRGB32, - .codes = {MEDIA_BUS_FMT_ARGB8888_1X32}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_ARGB8888_1X32), .cs = IPUV3_COLORSPACE_RGB, .bpp = 32, }, { .fourcc = V4L2_PIX_FMT_XRGB32, - .codes = {MEDIA_BUS_FMT_ARGB8888_1X32}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_ARGB8888_1X32), .cs = IPUV3_COLORSPACE_RGB, .bpp = 32, .ipufmt = true, @@ -106,91 +108,91 @@ static const struct imx_media_pixfmt pixel_formats[] = { /*** raw bayer and grayscale formats start here ***/ { .fourcc = V4L2_PIX_FMT_SBGGR8, - .codes = {MEDIA_BUS_FMT_SBGGR8_1X8}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_SBGGR8_1X8), .cs = IPUV3_COLORSPACE_RGB, .bpp = 8, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_SGBRG8, - .codes = {MEDIA_BUS_FMT_SGBRG8_1X8}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_SGBRG8_1X8), .cs = IPUV3_COLORSPACE_RGB, .bpp = 8, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_SGRBG8, - .codes = {MEDIA_BUS_FMT_SGRBG8_1X8}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_SGRBG8_1X8), .cs = IPUV3_COLORSPACE_RGB, .bpp = 8, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_SRGGB8, - .codes = {MEDIA_BUS_FMT_SRGGB8_1X8}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_SRGGB8_1X8), .cs = IPUV3_COLORSPACE_RGB, .bpp = 8, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_SBGGR16, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_SBGGR10_1X10, MEDIA_BUS_FMT_SBGGR12_1X12, MEDIA_BUS_FMT_SBGGR14_1X14, MEDIA_BUS_FMT_SBGGR16_1X16 - }, + ), .cs = IPUV3_COLORSPACE_RGB, .bpp = 16, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_SGBRG16, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_SGBRG10_1X10, MEDIA_BUS_FMT_SGBRG12_1X12, MEDIA_BUS_FMT_SGBRG14_1X14, - MEDIA_BUS_FMT_SGBRG16_1X16, - }, + MEDIA_BUS_FMT_SGBRG16_1X16 + ), .cs = IPUV3_COLORSPACE_RGB, .bpp = 16, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_SGRBG16, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_SGRBG10_1X10, MEDIA_BUS_FMT_SGRBG12_1X12, MEDIA_BUS_FMT_SGRBG14_1X14, - MEDIA_BUS_FMT_SGRBG16_1X16, - }, + MEDIA_BUS_FMT_SGRBG16_1X16 + ), .cs = IPUV3_COLORSPACE_RGB, .bpp = 16, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_SRGGB16, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_SRGGB10_1X10, MEDIA_BUS_FMT_SRGGB12_1X12, MEDIA_BUS_FMT_SRGGB14_1X14, - MEDIA_BUS_FMT_SRGGB16_1X16, - }, + MEDIA_BUS_FMT_SRGGB16_1X16 + ), .cs = IPUV3_COLORSPACE_RGB, .bpp = 16, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_GREY, - .codes = { + .codes = IMX_BUS_FMTS( MEDIA_BUS_FMT_Y8_1X8, MEDIA_BUS_FMT_Y10_1X10, - MEDIA_BUS_FMT_Y12_1X12, - }, + MEDIA_BUS_FMT_Y12_1X12 + ), .cs = IPUV3_COLORSPACE_RGB, .bpp = 8, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_Y10, - .codes = {MEDIA_BUS_FMT_Y10_1X10}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_Y10_1X10), .cs = IPUV3_COLORSPACE_RGB, .bpp = 16, .bayer = true, }, { .fourcc = V4L2_PIX_FMT_Y12, - .codes = {MEDIA_BUS_FMT_Y12_1X12}, + .codes = IMX_BUS_FMTS(MEDIA_BUS_FMT_Y12_1X12), .cs = IPUV3_COLORSPACE_RGB, .bpp = 16, .bayer = true, @@ -220,16 +222,16 @@ static const struct imx_media_pixfmt *find_format(u32 fourcc, PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); if (!(fmt_sel & sel) || - (!allow_non_mbus && !fmt->codes[0])) + (!allow_non_mbus && !fmt->codes)) continue; if (fourcc && fmt->fourcc == fourcc) return fmt; - if (!code) + if (!code || !fmt->codes) continue; - for (j = 0; j < ARRAY_SIZE(fmt->codes) && fmt->codes[j]; j++) { + for (j = 0; fmt->codes[j]; j++) { if (code == fmt->codes[j]) return fmt; } @@ -260,7 +262,7 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); if (!(fmt_sel & sel) || - (!allow_non_mbus && !fmt->codes[0])) + (!allow_non_mbus && !fmt->codes)) continue; if (fourcc && index == 0) { @@ -273,7 +275,7 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, continue; } - for (j = 0; j < ARRAY_SIZE(fmt->codes) && fmt->codes[j]; j++) { + for (j = 0; fmt->codes[j]; j++) { if (index == 0) { *code = fmt->codes[j]; return 0; @@ -532,7 +534,7 @@ int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, const struct imx_media_pixfmt *fmt; fmt = imx_media_find_format(image->pix.pixelformat, PIXFMT_SEL_ANY); - if (!fmt) + if (!fmt || !fmt->codes || !fmt->codes[0]) return -EINVAL; memset(mbus, 0, sizeof(*mbus)); diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index c61592750729d..459ec15bcdaf6 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -68,8 +68,13 @@ enum { #define IMX_MEDIA_EOF_TIMEOUT 1000 struct imx_media_pixfmt { + /* the in-memory FourCC pixel format */ u32 fourcc; - u32 codes[4]; + /* + * the set of equivalent media bus codes for the fourcc. + * NOTE! codes pointer is NULL for in-memory-only formats. + */ + const u32 *codes; int bpp; /* total bpp */ /* cycles per pixel for generic (bayer) formats for the parallel bus */ int cycles; -- GitLab From 74cd3984f13381049627cfa260fd87e6fcd31add Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Mon, 6 Apr 2020 18:39:03 +0200 Subject: [PATCH 187/503] media: imx: utils: Split find|enum_format into fourcc and mbus functions To make the code easier to follow, split up find_format() into separate search functions for pixel formats and media-bus codes, and inline find_format() into the exported functions imx_media_find_format() and imx_media_find_mbus_format(). Do the equivalent for enum_format(). Also add comment blocks for the exported find|enum functions. The convenience functions imx_media_find_ipu_format() and imx_media_enum_ipu_format() can now be made inline and moved to imx-media.h. Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-utils.c | 157 ++++++++++++-------- drivers/staging/media/imx/imx-media.h | 17 ++- 2 files changed, 111 insertions(+), 63 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 8d88c2a8df649..53e4dc1ad06ff 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -199,10 +199,15 @@ static const struct imx_media_pixfmt pixel_formats[] = { }, }; -static const struct imx_media_pixfmt *find_format(u32 fourcc, - u32 code, - enum imx_pixfmt_sel fmt_sel, - bool allow_non_mbus) +/* + * Search in the pixel_formats[] array for an entry with the given fourcc + * that matches the requested selection criteria and return it. + * + * @fourcc: Search for an entry with the given fourcc pixel format. + * @fmt_sel: Allow entries only with the given selection criteria. + */ +const struct imx_media_pixfmt * +imx_media_find_format(u32 fourcc, enum imx_pixfmt_sel fmt_sel) { bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; unsigned int i; @@ -212,7 +217,6 @@ static const struct imx_media_pixfmt *find_format(u32 fourcc, for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { const struct imx_media_pixfmt *fmt = &pixel_formats[i]; enum imx_pixfmt_sel sel; - unsigned int j; if (sel_ipu != fmt->ipufmt) continue; @@ -221,14 +225,42 @@ static const struct imx_media_pixfmt *find_format(u32 fourcc, ((fmt->cs == IPUV3_COLORSPACE_YUV) ? PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); - if (!(fmt_sel & sel) || - (!allow_non_mbus && !fmt->codes)) + if ((fmt_sel & sel) && fmt->fourcc == fourcc) + return fmt; + } + + return NULL; +} +EXPORT_SYMBOL_GPL(imx_media_find_format); + +/* + * Search in the pixel_formats[] array for an entry with the given media + * bus code that matches the requested selection criteria and return it. + * + * @code: Search for an entry with the given media-bus code. + * @fmt_sel: Allow entries only with the given selection criteria. + */ +const struct imx_media_pixfmt * +imx_media_find_mbus_format(u32 code, enum imx_pixfmt_sel fmt_sel) +{ + bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; + unsigned int i; + + fmt_sel &= ~PIXFMT_SEL_IPU; + + for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { + const struct imx_media_pixfmt *fmt = &pixel_formats[i]; + enum imx_pixfmt_sel sel; + unsigned int j; + + if (sel_ipu != fmt->ipufmt) continue; - if (fourcc && fmt->fourcc == fourcc) - return fmt; + sel = fmt->bayer ? PIXFMT_SEL_BAYER : + ((fmt->cs == IPUV3_COLORSPACE_YUV) ? + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); - if (!code || !fmt->codes) + if (!(fmt_sel & sel) || !fmt->codes) continue; for (j = 0; fmt->codes[j]; j++) { @@ -239,10 +271,21 @@ static const struct imx_media_pixfmt *find_format(u32 fourcc, return NULL; } +EXPORT_SYMBOL_GPL(imx_media_find_mbus_format); -static int enum_format(u32 *fourcc, u32 *code, u32 index, - enum imx_pixfmt_sel fmt_sel, - bool allow_non_mbus) +/* + * Enumerate entries in the pixel_formats[] array that match the + * requested selection criteria. Return the fourcc that matches the + * selection criteria at the requested match index. + * + * @fourcc: The returned fourcc that matches the search criteria at + * the requested match index. + * @index: The requested match index. + * @fmt_sel: Include in the enumeration entries with the given selection + * criteria. + */ +int imx_media_enum_format(u32 *fourcc, u32 index, + enum imx_pixfmt_sel fmt_sel) { bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; unsigned int i; @@ -252,7 +295,6 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { const struct imx_media_pixfmt *fmt = &pixel_formats[i]; enum imx_pixfmt_sel sel; - unsigned int j; if (sel_ipu != fmt->ipufmt) continue; @@ -261,19 +303,54 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, ((fmt->cs == IPUV3_COLORSPACE_YUV) ? PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); - if (!(fmt_sel & sel) || - (!allow_non_mbus && !fmt->codes)) + if (!(fmt_sel & sel)) continue; - if (fourcc && index == 0) { + if (index == 0) { *fourcc = fmt->fourcc; return 0; } - if (!code) { - index--; + index--; + } + + return -EINVAL; +} +EXPORT_SYMBOL_GPL(imx_media_enum_format); + +/* + * Enumerate entries in the pixel_formats[] array that match the + * requested search criteria. Return the media-bus code that matches + * the search criteria at the requested match index. + * + * @code: The returned media-bus code that matches the search criteria at + * the requested match index. + * @index: The requested match index. + * @fmt_sel: Include in the enumeration entries with the given selection + * criteria. + */ +int imx_media_enum_mbus_format(u32 *code, u32 index, + enum imx_pixfmt_sel fmt_sel) +{ + bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; + unsigned int i; + + fmt_sel &= ~PIXFMT_SEL_IPU; + + for (i = 0; i < ARRAY_SIZE(pixel_formats); i++) { + const struct imx_media_pixfmt *fmt = &pixel_formats[i]; + enum imx_pixfmt_sel sel; + unsigned int j; + + if (sel_ipu != fmt->ipufmt) + continue; + + sel = fmt->bayer ? PIXFMT_SEL_BAYER : + ((fmt->cs == IPUV3_COLORSPACE_YUV) ? + PIXFMT_SEL_YUV : PIXFMT_SEL_RGB); + + if (!(fmt_sel & sel) || !fmt->codes) continue; - } for (j = 0; fmt->codes[j]; j++) { if (index == 0) { @@ -287,48 +364,8 @@ static int enum_format(u32 *fourcc, u32 *code, u32 index, return -EINVAL; } - -const struct imx_media_pixfmt * -imx_media_find_format(u32 fourcc, enum imx_pixfmt_sel fmt_sel) -{ - return find_format(fourcc, 0, fmt_sel, true); -} -EXPORT_SYMBOL_GPL(imx_media_find_format); - -int imx_media_enum_format(u32 *fourcc, u32 index, enum imx_pixfmt_sel fmt_sel) -{ - return enum_format(fourcc, NULL, index, fmt_sel, true); -} -EXPORT_SYMBOL_GPL(imx_media_enum_format); - -const struct imx_media_pixfmt * -imx_media_find_mbus_format(u32 code, enum imx_pixfmt_sel fmt_sel) -{ - return find_format(0, code, fmt_sel, false); -} -EXPORT_SYMBOL_GPL(imx_media_find_mbus_format); - -int imx_media_enum_mbus_format(u32 *code, u32 index, - enum imx_pixfmt_sel fmt_sel) -{ - return enum_format(NULL, code, index, fmt_sel, false); -} EXPORT_SYMBOL_GPL(imx_media_enum_mbus_format); -const struct imx_media_pixfmt * -imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel fmt_sel) -{ - return find_format(0, code, fmt_sel | PIXFMT_SEL_IPU, false); -} -EXPORT_SYMBOL_GPL(imx_media_find_ipu_format); - -int imx_media_enum_ipu_format(u32 *code, u32 index, - enum imx_pixfmt_sel fmt_sel) -{ - return enum_format(NULL, code, index, fmt_sel | PIXFMT_SEL_IPU, false); -} -EXPORT_SYMBOL_GPL(imx_media_enum_ipu_format); - int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, u32 width, u32 height, u32 code, u32 field, const struct imx_media_pixfmt **cc) diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index 459ec15bcdaf6..c0813aeac3f57 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -170,9 +170,20 @@ int imx_media_enum_format(u32 *fourcc, u32 index, enum imx_pixfmt_sel sel); const struct imx_media_pixfmt * imx_media_find_mbus_format(u32 code, enum imx_pixfmt_sel sel); int imx_media_enum_mbus_format(u32 *code, u32 index, enum imx_pixfmt_sel sel); -const struct imx_media_pixfmt * -imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel sel); -int imx_media_enum_ipu_format(u32 *code, u32 index, enum imx_pixfmt_sel sel); + +static inline const struct imx_media_pixfmt * +imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel fmt_sel) +{ + return imx_media_find_mbus_format(code, fmt_sel | PIXFMT_SEL_IPU); +} + +static inline int imx_media_enum_ipu_format(u32 *code, u32 index, + enum imx_pixfmt_sel fmt_sel) +{ + return imx_media_enum_mbus_format(code, index, + fmt_sel | PIXFMT_SEL_IPU); +} + int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, u32 width, u32 height, u32 code, u32 field, const struct imx_media_pixfmt **cc); -- GitLab From eef988826fbdcf042a4188c0d1150b0128b6512c Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 6 Apr 2020 18:39:04 +0200 Subject: [PATCH 188/503] media: imx: utils: Rename format lookup and enumeration functions Rename the format lookup and enumeration functions according to their usage: - Rename imx_media_(find|enum)_format() to *_pixel_format() to explicitly state on what formats the functions operate. This aligns the naming scheme with the media bus and IPU format functions that already end with *_mbus_format() and *_ipu_formats(). - Rename all enumeration functions to pluralize 'formats' at the end, as they enumerate multiple formats. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-ic-prp.c | 11 ++++---- drivers/staging/media/imx/imx-ic-prpencvf.c | 9 ++++--- drivers/staging/media/imx/imx-media-capture.c | 16 ++++++------ .../staging/media/imx/imx-media-csc-scaler.c | 3 ++- drivers/staging/media/imx/imx-media-csi.c | 18 ++++++------- drivers/staging/media/imx/imx-media-utils.c | 25 +++++++++++-------- drivers/staging/media/imx/imx-media-vdic.c | 8 +++--- drivers/staging/media/imx/imx-media.h | 14 ++++++----- drivers/staging/media/imx/imx7-media-csi.c | 8 +++--- 9 files changed, 60 insertions(+), 52 deletions(-) diff --git a/drivers/staging/media/imx/imx-ic-prp.c b/drivers/staging/media/imx/imx-ic-prp.c index acad59b424235..7658b83466a78 100644 --- a/drivers/staging/media/imx/imx-ic-prp.c +++ b/drivers/staging/media/imx/imx-ic-prp.c @@ -106,8 +106,8 @@ static int prp_enum_mbus_code(struct v4l2_subdev *sd, switch (code->pad) { case PRP_SINK_PAD: - ret = imx_media_enum_ipu_format(&code->code, code->index, - PIXFMT_SEL_YUV_RGB); + ret = imx_media_enum_ipu_formats(&code->code, code->index, + PIXFMT_SEL_YUV_RGB); break; case PRP_SRC_PAD_PRPENC: case PRP_SRC_PAD_PRPVF: @@ -182,8 +182,8 @@ static int prp_set_fmt(struct v4l2_subdev *sd, cc = imx_media_find_ipu_format(sdformat->format.code, PIXFMT_SEL_YUV_RGB); if (!cc) { - imx_media_enum_ipu_format(&code, 0, - PIXFMT_SEL_YUV_RGB); + imx_media_enum_ipu_formats(&code, 0, + PIXFMT_SEL_YUV_RGB); cc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV_RGB); sdformat->format.code = cc->codes[0]; @@ -440,7 +440,8 @@ static int prp_registered(struct v4l2_subdev *sd) priv->frame_interval.denominator = 30; /* set a default mbus format */ - imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); + imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV); + return imx_media_init_mbus_fmt(&priv->format_mbus, 640, 480, code, V4L2_FIELD_NONE, NULL); } diff --git a/drivers/staging/media/imx/imx-ic-prpencvf.c b/drivers/staging/media/imx/imx-ic-prpencvf.c index 7035c15176fd2..b1f84e0ac4860 100644 --- a/drivers/staging/media/imx/imx-ic-prpencvf.c +++ b/drivers/staging/media/imx/imx-ic-prpencvf.c @@ -850,8 +850,8 @@ static int prp_enum_mbus_code(struct v4l2_subdev *sd, if (code->pad >= PRPENCVF_NUM_PADS) return -EINVAL; - return imx_media_enum_ipu_format(&code->code, code->index, - PIXFMT_SEL_YUV_RGB); + return imx_media_enum_ipu_formats(&code->code, code->index, + PIXFMT_SEL_YUV_RGB); } static int prp_get_fmt(struct v4l2_subdev *sd, @@ -891,7 +891,7 @@ static void prp_try_fmt(struct prp_priv *priv, if (!*cc) { u32 code; - imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV_RGB); + imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV_RGB); *cc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; @@ -1251,7 +1251,8 @@ static int prp_registered(struct v4l2_subdev *sd) u32 code; /* set a default mbus format */ - imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); + imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV); + for (i = 0; i < PRPENCVF_NUM_PADS; i++) { ret = imx_media_init_mbus_fmt(&priv->format_mbus[i], 640, 480, code, V4L2_FIELD_NONE, diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index 4b4ee81ad2e82..c1931eb2540e3 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c @@ -91,7 +91,7 @@ static int capture_enum_framesizes(struct file *file, void *fh, }; int ret; - cc = imx_media_find_format(fsize->pixel_format, PIXFMT_SEL_ANY); + cc = imx_media_find_pixel_format(fsize->pixel_format, PIXFMT_SEL_ANY); if (!cc) return -EINVAL; @@ -133,7 +133,7 @@ static int capture_enum_frameintervals(struct file *file, void *fh, }; int ret; - cc = imx_media_find_format(fival->pixel_format, PIXFMT_SEL_ANY); + cc = imx_media_find_pixel_format(fival->pixel_format, PIXFMT_SEL_ANY); if (!cc) return -EINVAL; @@ -174,7 +174,7 @@ static int capture_enum_fmt_vid_cap(struct file *file, void *fh, (cc_src->cs == IPUV3_COLORSPACE_YUV) ? PIXFMT_SEL_YUV : PIXFMT_SEL_RGB; - ret = imx_media_enum_format(&fourcc, f->index, fmt_sel); + ret = imx_media_enum_pixel_formats(&fourcc, f->index, fmt_sel); if (ret) return ret; } else { @@ -221,10 +221,10 @@ static int __capture_try_fmt_vid_cap(struct capture_priv *priv, PIXFMT_SEL_YUV : PIXFMT_SEL_RGB; fourcc = f->fmt.pix.pixelformat; - cc = imx_media_find_format(fourcc, fmt_sel); + cc = imx_media_find_pixel_format(fourcc, fmt_sel); if (!cc) { - imx_media_enum_format(&fourcc, 0, fmt_sel); - cc = imx_media_find_format(fourcc, fmt_sel); + imx_media_enum_pixel_formats(&fourcc, 0, fmt_sel); + cc = imx_media_find_pixel_format(fourcc, fmt_sel); } } else { cc_src = imx_media_find_mbus_format(fmt_src->format.code, @@ -793,8 +793,8 @@ int imx_media_capture_device_register(struct imx_media_video_dev *vdev) &fmt_src.format, NULL); vdev->compose.width = fmt_src.format.width; vdev->compose.height = fmt_src.format.height; - vdev->cc = imx_media_find_format(vdev->fmt.fmt.pix.pixelformat, - PIXFMT_SEL_ANY); + vdev->cc = imx_media_find_pixel_format(vdev->fmt.fmt.pix.pixelformat, + PIXFMT_SEL_ANY); v4l2_info(sd, "Registered %s as /dev/%s\n", vfd->name, video_device_node_name(vfd)); diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c index ddb70da56853e..489b6c1529f31 100644 --- a/drivers/staging/media/imx/imx-media-csc-scaler.c +++ b/drivers/staging/media/imx/imx-media-csc-scaler.c @@ -164,7 +164,8 @@ static int ipu_csc_scaler_enum_fmt(struct file *file, void *fh, u32 fourcc; int ret; - ret = imx_media_enum_format(&fourcc, f->index, PIXFMT_SEL_YUV_RGB); + ret = imx_media_enum_pixel_formats(&fourcc, f->index, + PIXFMT_SEL_YUV_RGB); if (ret) return ret; diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index df427fcfb0ece..66468326bcbc0 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -1238,8 +1238,8 @@ static int csi_enum_mbus_code(struct v4l2_subdev *sd, switch (code->pad) { case CSI_SINK_PAD: - ret = imx_media_enum_mbus_format(&code->code, code->index, - PIXFMT_SEL_ANY); + ret = imx_media_enum_mbus_formats(&code->code, code->index, + PIXFMT_SEL_ANY); break; case CSI_SRC_PAD_DIRECT: case CSI_SRC_PAD_IDMAC: @@ -1260,9 +1260,9 @@ static int csi_enum_mbus_code(struct v4l2_subdev *sd, (incc->cs == IPUV3_COLORSPACE_YUV) ? PIXFMT_SEL_YUV : PIXFMT_SEL_RGB; - ret = imx_media_enum_ipu_format(&code->code, - code->index, - fmt_sel); + ret = imx_media_enum_ipu_formats(&code->code, + code->index, + fmt_sel); } break; default: @@ -1451,7 +1451,7 @@ static void csi_try_fmt(struct csi_priv *priv, *cc = imx_media_find_ipu_format(sdformat->format.code, fmt_sel); if (!*cc) { - imx_media_enum_ipu_format(&code, 0, fmt_sel); + imx_media_enum_ipu_formats(&code, 0, fmt_sel); *cc = imx_media_find_ipu_format(code, fmt_sel); sdformat->format.code = (*cc)->codes[0]; } @@ -1474,8 +1474,8 @@ static void csi_try_fmt(struct csi_priv *priv, *cc = imx_media_find_mbus_format(sdformat->format.code, PIXFMT_SEL_ANY); if (!*cc) { - imx_media_enum_mbus_format(&code, 0, - PIXFMT_SEL_YUV_RGB); + imx_media_enum_mbus_formats(&code, 0, + PIXFMT_SEL_YUV_RGB); *cc = imx_media_find_mbus_format(code, PIXFMT_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; @@ -1763,7 +1763,7 @@ static int csi_registered(struct v4l2_subdev *sd) for (i = 0; i < CSI_NUM_PADS; i++) { code = 0; if (i != CSI_SINK_PAD) - imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); + imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV); /* set a default mbus format */ ret = imx_media_init_mbus_fmt(&priv->format_mbus[i], diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 53e4dc1ad06ff..85ddea05997ab 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -207,7 +207,7 @@ static const struct imx_media_pixfmt pixel_formats[] = { * @fmt_sel: Allow entries only with the given selection criteria. */ const struct imx_media_pixfmt * -imx_media_find_format(u32 fourcc, enum imx_pixfmt_sel fmt_sel) +imx_media_find_pixel_format(u32 fourcc, enum imx_pixfmt_sel fmt_sel) { bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; unsigned int i; @@ -231,7 +231,7 @@ imx_media_find_format(u32 fourcc, enum imx_pixfmt_sel fmt_sel) return NULL; } -EXPORT_SYMBOL_GPL(imx_media_find_format); +EXPORT_SYMBOL_GPL(imx_media_find_pixel_format); /* * Search in the pixel_formats[] array for an entry with the given media @@ -284,8 +284,8 @@ EXPORT_SYMBOL_GPL(imx_media_find_mbus_format); * @fmt_sel: Include in the enumeration entries with the given selection * criteria. */ -int imx_media_enum_format(u32 *fourcc, u32 index, - enum imx_pixfmt_sel fmt_sel) +int imx_media_enum_pixel_formats(u32 *fourcc, u32 index, + enum imx_pixfmt_sel fmt_sel) { bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; unsigned int i; @@ -316,7 +316,7 @@ int imx_media_enum_format(u32 *fourcc, u32 index, return -EINVAL; } -EXPORT_SYMBOL_GPL(imx_media_enum_format); +EXPORT_SYMBOL_GPL(imx_media_enum_pixel_formats); /* * Enumerate entries in the pixel_formats[] array that match the @@ -329,8 +329,8 @@ EXPORT_SYMBOL_GPL(imx_media_enum_format); * @fmt_sel: Include in the enumeration entries with the given selection * criteria. */ -int imx_media_enum_mbus_format(u32 *code, u32 index, - enum imx_pixfmt_sel fmt_sel) +int imx_media_enum_mbus_formats(u32 *code, u32 index, + enum imx_pixfmt_sel fmt_sel) { bool sel_ipu = fmt_sel & PIXFMT_SEL_IPU; unsigned int i; @@ -364,7 +364,7 @@ int imx_media_enum_mbus_format(u32 *code, u32 index, return -EINVAL; } -EXPORT_SYMBOL_GPL(imx_media_enum_mbus_format); +EXPORT_SYMBOL_GPL(imx_media_enum_mbus_formats); int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, u32 width, u32 height, u32 code, u32 field, @@ -375,8 +375,10 @@ int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, mbus->width = width; mbus->height = height; mbus->field = field; + if (code == 0) - imx_media_enum_mbus_format(&code, 0, PIXFMT_SEL_YUV); + imx_media_enum_mbus_formats(&code, 0, PIXFMT_SEL_YUV); + lcc = imx_media_find_mbus_format(code, PIXFMT_SEL_ANY); if (!lcc) { lcc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV_RGB); @@ -518,7 +520,7 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, if (cc->ipufmt && cc->cs == IPUV3_COLORSPACE_YUV) { u32 code; - imx_media_enum_mbus_format(&code, 0, PIXFMT_SEL_YUV); + imx_media_enum_mbus_formats(&code, 0, PIXFMT_SEL_YUV); cc = imx_media_find_mbus_format(code, PIXFMT_SEL_YUV); } @@ -570,7 +572,8 @@ int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, { const struct imx_media_pixfmt *fmt; - fmt = imx_media_find_format(image->pix.pixelformat, PIXFMT_SEL_ANY); + fmt = imx_media_find_pixel_format(image->pix.pixelformat, + PIXFMT_SEL_ANY); if (!fmt || !fmt->codes || !fmt->codes[0]) return -EINVAL; diff --git a/drivers/staging/media/imx/imx-media-vdic.c b/drivers/staging/media/imx/imx-media-vdic.c index 9807d578ce897..303b5407fb643 100644 --- a/drivers/staging/media/imx/imx-media-vdic.c +++ b/drivers/staging/media/imx/imx-media-vdic.c @@ -548,8 +548,8 @@ static int vdic_enum_mbus_code(struct v4l2_subdev *sd, if (code->pad >= VDIC_NUM_PADS) return -EINVAL; - return imx_media_enum_ipu_format(&code->code, code->index, - PIXFMT_SEL_YUV); + return imx_media_enum_ipu_formats(&code->code, code->index, + PIXFMT_SEL_YUV); } static int vdic_get_fmt(struct v4l2_subdev *sd, @@ -589,7 +589,7 @@ static void vdic_try_fmt(struct vdic_priv *priv, if (!*cc) { u32 code; - imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); + imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV); *cc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV); sdformat->format.code = (*cc)->codes[0]; } @@ -852,7 +852,7 @@ static int vdic_registered(struct v4l2_subdev *sd) for (i = 0; i < VDIC_NUM_PADS; i++) { code = 0; if (i != VDIC_SINK_PAD_IDMAC) - imx_media_enum_ipu_format(&code, 0, PIXFMT_SEL_YUV); + imx_media_enum_ipu_formats(&code, 0, PIXFMT_SEL_YUV); /* set a default mbus format */ ret = imx_media_init_mbus_fmt(&priv->format_mbus[i], diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index c0813aeac3f57..03467f6397c34 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -165,11 +165,13 @@ struct imx_media_dev { /* imx-media-utils.c */ const struct imx_media_pixfmt * -imx_media_find_format(u32 fourcc, enum imx_pixfmt_sel sel); -int imx_media_enum_format(u32 *fourcc, u32 index, enum imx_pixfmt_sel sel); +imx_media_find_pixel_format(u32 fourcc, enum imx_pixfmt_sel sel); +int imx_media_enum_pixel_formats(u32 *fourcc, u32 index, + enum imx_pixfmt_sel sel); const struct imx_media_pixfmt * imx_media_find_mbus_format(u32 code, enum imx_pixfmt_sel sel); -int imx_media_enum_mbus_format(u32 *code, u32 index, enum imx_pixfmt_sel sel); +int imx_media_enum_mbus_formats(u32 *code, u32 index, + enum imx_pixfmt_sel sel); static inline const struct imx_media_pixfmt * imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel fmt_sel) @@ -177,10 +179,10 @@ imx_media_find_ipu_format(u32 code, enum imx_pixfmt_sel fmt_sel) return imx_media_find_mbus_format(code, fmt_sel | PIXFMT_SEL_IPU); } -static inline int imx_media_enum_ipu_format(u32 *code, u32 index, - enum imx_pixfmt_sel fmt_sel) +static inline int imx_media_enum_ipu_formats(u32 *code, u32 index, + enum imx_pixfmt_sel fmt_sel) { - return imx_media_enum_mbus_format(code, index, + return imx_media_enum_mbus_formats(code, index, fmt_sel | PIXFMT_SEL_IPU); } diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index 73169605e5e02..1ac10f807ac07 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -958,8 +958,8 @@ static int imx7_csi_enum_mbus_code(struct v4l2_subdev *sd, switch (code->pad) { case IMX7_CSI_PAD_SINK: - ret = imx_media_enum_mbus_format(&code->code, code->index, - PIXFMT_SEL_ANY); + ret = imx_media_enum_mbus_formats(&code->code, code->index, + PIXFMT_SEL_ANY); break; case IMX7_CSI_PAD_SRC: if (code->index != 0) { @@ -1037,8 +1037,8 @@ static int imx7_csi_try_fmt(struct imx7_csi *csi, *cc = imx_media_find_mbus_format(sdformat->format.code, PIXFMT_SEL_ANY); if (!*cc) { - imx_media_enum_mbus_format(&code, 0, - PIXFMT_SEL_YUV_RGB); + imx_media_enum_mbus_formats(&code, 0, + PIXFMT_SEL_YUV_RGB); *cc = imx_media_find_mbus_format(code, PIXFMT_SEL_YUV_RGB); sdformat->format.code = (*cc)->codes[0]; -- GitLab From 4d7463cdf5dea933b6796681bdfac9015a845652 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 6 Apr 2020 18:39:05 +0200 Subject: [PATCH 189/503] media: imx: utils: Constify some mbus and ipu_image arguments The imx_media_mbus_fmt_to_pix_fmt() and imx_media_mbus_fmt_to_ipu_image() functions do not need to modify their mbus argument, and imx_media_ipu_image_to_mbus_fmt() does not need to modify its ipu_image argument. Make them const. [slongerbeam@gmail.com: Constified mbus arg to imx_media_mbus_fmt_to_ipu_image(), and ipu_image arg to imx_media_ipu_image_to_mbus_fmt(), as well] Signed-off-by: Laurent Pinchart Signed-off-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-utils.c | 6 +++--- drivers/staging/media/imx/imx-media.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 85ddea05997ab..42e64b618a61f 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -497,7 +497,7 @@ void imx_media_try_colorimetry(struct v4l2_mbus_framefmt *tryfmt, EXPORT_SYMBOL_GPL(imx_media_try_colorimetry); int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, - struct v4l2_mbus_framefmt *mbus, + const struct v4l2_mbus_framefmt *mbus, const struct imx_media_pixfmt *cc) { u32 width; @@ -550,7 +550,7 @@ int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_pix_fmt); int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, - struct v4l2_mbus_framefmt *mbus) + const struct v4l2_mbus_framefmt *mbus) { int ret; @@ -568,7 +568,7 @@ int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, EXPORT_SYMBOL_GPL(imx_media_mbus_fmt_to_ipu_image); int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, - struct ipu_image *image) + const struct ipu_image *image) { const struct imx_media_pixfmt *fmt; diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index 03467f6397c34..ca36beca16deb 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -194,12 +194,12 @@ int imx_media_init_cfg(struct v4l2_subdev *sd, void imx_media_try_colorimetry(struct v4l2_mbus_framefmt *tryfmt, bool ic_route); int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix, - struct v4l2_mbus_framefmt *mbus, + const struct v4l2_mbus_framefmt *mbus, const struct imx_media_pixfmt *cc); int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image, - struct v4l2_mbus_framefmt *mbus); + const struct v4l2_mbus_framefmt *mbus); int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus, - struct ipu_image *image); + const struct ipu_image *image); void imx_media_grp_id_to_sd_name(char *sd_name, int sz, u32 grp_id, int ipu_id); struct v4l2_subdev * -- GitLab From e13160116939c9825de5e78e697cb48b1a3f0258 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Thu, 16 Apr 2020 00:54:11 +0200 Subject: [PATCH 190/503] media: davinci: remove redundant assignment to pointer 'common' The pointer 'common' is being assigned with a value that is never read, the assignment is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/davinci/vpif_display.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/platform/davinci/vpif_display.c b/drivers/media/platform/davinci/vpif_display.c index ead14c49d4f5b..7d55fd45240e7 100644 --- a/drivers/media/platform/davinci/vpif_display.c +++ b/drivers/media/platform/davinci/vpif_display.c @@ -1225,7 +1225,6 @@ static int vpif_probe_complete(void) probe_out: for (k = 0; k < j; k++) { ch = vpif_obj.dev[k]; - common = &ch->common[k]; video_unregister_device(&ch->video_dev); } return err; -- GitLab From 757570f11fa4b0ce5472a6583de6f06e996a8527 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Tue, 14 Apr 2020 05:08:15 +0200 Subject: [PATCH 191/503] media: mtk-mdp: Use correct aliases name aliases property name must include only lowercase and '-'. Fix in dts and driver. Signed-off-by: Hsin-Yi Wang Reviewed-by: Matthias Brugger Reviewed-by: Chun-Kuang Hu Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/mtk-mdp/mtk_mdp_comp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c index 14991685adb78..58abfbdfb82d3 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c @@ -15,10 +15,10 @@ static const char * const mtk_mdp_comp_stem[MTK_MDP_COMP_TYPE_MAX] = { - "mdp_rdma", - "mdp_rsz", - "mdp_wdma", - "mdp_wrot", + "mdp-rdma", + "mdp-rsz", + "mdp-wdma", + "mdp-wrot", }; struct mtk_mdp_comp_match { -- GitLab From 03f56d9952b425df613bb28d52149a52f72e6368 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Fri, 10 Apr 2020 15:50:14 +0200 Subject: [PATCH 192/503] media: pwc-ctl: remove redundant assignment to variable ret The variable ret is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Reviewed-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/pwc/pwc-ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/usb/pwc/pwc-ctrl.c b/drivers/media/usb/pwc/pwc-ctrl.c index 315c55927f5c5..cff64d872058d 100644 --- a/drivers/media/usb/pwc/pwc-ctrl.c +++ b/drivers/media/usb/pwc/pwc-ctrl.c @@ -523,7 +523,7 @@ int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value) #ifdef CONFIG_USB_PWC_DEBUG int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor) { - int ret = -1, request; + int ret, request; if (pdev->type < 675) request = SENSOR_TYPE_FORMATTER1; -- GitLab From d45c9313782b3bde8da60e0f6c666a559da7243d Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Fri, 10 Apr 2020 16:18:13 +0200 Subject: [PATCH 193/503] media: gspca: remove redundant assignment to variable status The variable status is being assigned a value that is never read. The assignment is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Reviewed-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/gspca/mr97310a.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/usb/gspca/mr97310a.c b/drivers/media/usb/gspca/mr97310a.c index 502fc2eaffe04..464aa61cd9142 100644 --- a/drivers/media/usb/gspca/mr97310a.c +++ b/drivers/media/usb/gspca/mr97310a.c @@ -287,7 +287,6 @@ static int zero_the_pointer(struct gspca_dev *gspca_dev) return err_code; err_code = cam_get_response16(gspca_dev, 0x21, 0); - status = data[0]; tries++; if (err_code < 0) return err_code; -- GitLab From 33d236371f707582128ab05faf7b9f95f479aa63 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 8 Apr 2020 15:10:05 +0200 Subject: [PATCH 194/503] media: imx-media-csc-scaler: Use a shorter name for driver Currently v4l2-compliance tool returns the following output: Compliance test for imx-media-csc-s device /dev/video8: Driver Info: Driver name : imx-media-csc-s Card type : imx-media-csc-scaler Bus info : platform:imx-media-csc-scaler The driver name string is limited to 16 characters, so provide a shorter name in order to get a better output. While at it, use the same shorter name for driver, card and platform. Signed-off-by: Fabio Estevam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-csc-scaler.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c index 489b6c1529f31..fab1155a5958c 100644 --- a/drivers/staging/media/imx/imx-media-csc-scaler.c +++ b/drivers/staging/media/imx/imx-media-csc-scaler.c @@ -25,6 +25,8 @@ #define fh_to_ctx(__fh) container_of(__fh, struct ipu_csc_scaler_ctx, fh) +#define IMX_CSC_SCALER_NAME "imx-csc-scaler" + enum { V4L2_M2M_SRC = 0, V4L2_M2M_DST = 1, @@ -150,10 +152,10 @@ static void device_run(void *_ctx) static int ipu_csc_scaler_querycap(struct file *file, void *priv, struct v4l2_capability *cap) { - strscpy(cap->driver, "imx-media-csc-scaler", sizeof(cap->driver)); - strscpy(cap->card, "imx-media-csc-scaler", sizeof(cap->card)); - strscpy(cap->bus_info, "platform:imx-media-csc-scaler", - sizeof(cap->bus_info)); + strscpy(cap->driver, IMX_CSC_SCALER_NAME, sizeof(cap->driver)); + strscpy(cap->card, IMX_CSC_SCALER_NAME, sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), + "platform:%s", IMX_CSC_SCALER_NAME); return 0; } -- GitLab From 1ca3cb46a992d83ebd093acc64241007b20c5033 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 16 Mar 2020 23:42:30 +0100 Subject: [PATCH 195/503] media: v4l2-ctrl: Add H264 profile and levels Add H264 profile "Contrained High" and H264 levels "5.2", "6.0", "6.1" and "6.2". Signed-off-by: Maheshwar Ajja Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-ctrls.c | 5 +++++ include/uapi/linux/v4l2-controls.h | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 93d33d1db4e83..0186ba85aac7e 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -336,6 +336,10 @@ const char * const *v4l2_ctrl_get_menu(u32 id) "4.2", "5", "5.1", + "5.2", + "6.0", + "6.1", + "6.2", NULL, }; static const char * const h264_loop_filter[] = { @@ -362,6 +366,7 @@ const char * const *v4l2_ctrl_get_menu(u32 id) "Scalable High Intra", "Stereo High", "Multiview High", + "Constrained High", NULL, }; static const char * const vui_sar_idc[] = { diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 1a58d7cc4ccc9..0ba1005c96519 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -473,6 +473,10 @@ enum v4l2_mpeg_video_h264_level { V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13, V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14, V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15, + V4L2_MPEG_VIDEO_H264_LEVEL_5_2 = 16, + V4L2_MPEG_VIDEO_H264_LEVEL_6_0 = 17, + V4L2_MPEG_VIDEO_H264_LEVEL_6_1 = 18, + V4L2_MPEG_VIDEO_H264_LEVEL_6_2 = 19, }; #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_MPEG_BASE+360) #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_MPEG_BASE+361) @@ -501,6 +505,7 @@ enum v4l2_mpeg_video_h264_profile { V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14, V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15, V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16, + V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH = 17, }; #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_MPEG_BASE+364) #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_MPEG_BASE+365) -- GitLab From ff8c2784b057596ae1fe75693046e1ac3382d8bf Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Tue, 7 Apr 2020 23:55:26 +0200 Subject: [PATCH 196/503] media: uapi: h264: Add new profile and levels Add H264 profile "Contrained High" and H264 levels "5.2", "6.0", "6.1" and "6.2". Signed-off-by: Maheshwar Ajja Signed-off-by: Mauro Carvalho Chehab --- .../userspace-api/media/v4l/ext-ctrls-codec.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 9b48338fb7838..d0d506a444b16 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -756,6 +756,14 @@ enum v4l2_mpeg_video_h264_level - - Level 5.0 * - ``V4L2_MPEG_VIDEO_H264_LEVEL_5_1`` - Level 5.1 + * - ``V4L2_MPEG_VIDEO_H264_LEVEL_5_2`` + - Level 5.2 + * - ``V4L2_MPEG_VIDEO_H264_LEVEL_6_0`` + - Level 6.0 + * - ``V4L2_MPEG_VIDEO_H264_LEVEL_6_1`` + - Level 6.1 + * - ``V4L2_MPEG_VIDEO_H264_LEVEL_6_2`` + - Level 6.2 @@ -868,6 +876,8 @@ enum v4l2_mpeg_video_h264_profile - - Stereo High profile * - ``V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH`` - Multiview High profile + * - ``V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH`` + - Constrained High profile -- GitLab From 9429e7072f8ffc1aae4f2a2c4aeee9db847905f5 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 9 Apr 2020 18:29:42 +0200 Subject: [PATCH 197/503] media: imx.rst: Fix the MIPI CSI-2 virtual channel The current instructions for imx6q-sabresd do not lead to functional capture on OV5640 MIPI CSI-2. The reason for this, as explained by Steve Longerbeam, is that OV5640 by default transmits on virtual channel 0, not channel 1 as is given in the instructions. Adapt the instructions to use virtual channel 0 so that a working camera setup can be achieved on imx6q-sabresd. Also, since we are using an IC direct conversion pipeline, improve the example by demonstrating colorspace and scaling. Signed-off-by: Fabio Estevam Reviewed-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/imx.rst | 31 ++++++++++++------------- 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/Documentation/admin-guide/media/imx.rst b/Documentation/admin-guide/media/imx.rst index 5bb464754379d..60f04258902e9 100644 --- a/Documentation/admin-guide/media/imx.rst +++ b/Documentation/admin-guide/media/imx.rst @@ -590,30 +590,29 @@ The OV5640 module connects to MIPI connector J5 (sorry I don't have the compatible module part number or URL). The following example configures a direct conversion pipeline to capture -from the OV5640, transmitting on MIPI CSI-2 virtual channel 1. $sensorfmt -can be any format supported by the OV5640. $sensordim is the frame -dimension part of $sensorfmt (minus the mbus pixel code). $outputfmt can -be any format supported by the ipu1_ic_prpenc entity at its output pad: +from the OV5640, transmitting on MIPI CSI-2 virtual channel 0. It also +shows colorspace conversion and scaling at IC output. .. code-block:: none # Setup links media-ctl -l "'ov5640 1-003c':0 -> 'imx6-mipi-csi2':0[1]" - media-ctl -l "'imx6-mipi-csi2':2 -> 'ipu1_csi1':0[1]" - media-ctl -l "'ipu1_csi1':1 -> 'ipu1_ic_prp':0[1]" + media-ctl -l "'imx6-mipi-csi2':1 -> 'ipu1_csi0_mux':0[1]" + media-ctl -l "'ipu1_csi0_mux':2 -> 'ipu1_csi0':0[1]" + media-ctl -l "'ipu1_csi0':1 -> 'ipu1_ic_prp':0[1]" media-ctl -l "'ipu1_ic_prp':1 -> 'ipu1_ic_prpenc':0[1]" media-ctl -l "'ipu1_ic_prpenc':1 -> 'ipu1_ic_prpenc capture':0[1]" # Configure pads - media-ctl -V "'ov5640 1-003c':0 [fmt:$sensorfmt field:none]" - media-ctl -V "'imx6-mipi-csi2':2 [fmt:$sensorfmt field:none]" - media-ctl -V "'ipu1_csi1':1 [fmt:AYUV32/$sensordim field:none]" - media-ctl -V "'ipu1_ic_prp':1 [fmt:AYUV32/$sensordim field:none]" - media-ctl -V "'ipu1_ic_prpenc':1 [fmt:$outputfmt field:none]" - -Streaming can then begin on "ipu1_ic_prpenc capture" node. The v4l2-ctl -tool can be used to select any supported YUV or RGB pixelformat on the -capture device node. - + media-ctl -V "'ov5640 1-003c':0 [fmt:UYVY2X8/640x480]" + media-ctl -V "'imx6-mipi-csi2':1 [fmt:UYVY2X8/640x480]" + media-ctl -V "'ipu1_csi0_mux':2 [fmt:UYVY2X8/640x480]" + media-ctl -V "'ipu1_csi0':1 [fmt:AYUV32/640x480]" + media-ctl -V "'ipu1_ic_prp':1 [fmt:AYUV32/640x480]" + media-ctl -V "'ipu1_ic_prpenc':1 [fmt:ARGB8888_1X32/800x600]" + # Set a format at the capture interface + v4l2-ctl -d /dev/video1 --set-fmt-video=pixelformat=RGB3 + +Streaming can then begin on "ipu1_ic_prpenc capture" node. Known Issues ------------ -- GitLab From 62ce7201f442d667a31415c1b051ba385a994b63 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 9 Apr 2020 18:29:43 +0200 Subject: [PATCH 198/503] media: imx.rst: Provide an example for unprocessed video capture The current example for imx6q-sabresd is for a direct conversion pipeline. Provide an extra example using unprocessed video capture for completeness. Signed-off-by: Fabio Estevam Reviewed-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/imx.rst | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/admin-guide/media/imx.rst b/Documentation/admin-guide/media/imx.rst index 60f04258902e9..e309d1aa0a653 100644 --- a/Documentation/admin-guide/media/imx.rst +++ b/Documentation/admin-guide/media/imx.rst @@ -589,6 +589,26 @@ CSI-2 OV5640 has been tested, so the OV5642 node is currently disabled. The OV5640 module connects to MIPI connector J5 (sorry I don't have the compatible module part number or URL). +The following example configures unprocessed video capture pipeline to +capture from the OV5640, transmitting on MIPI CSI-2 virtual channel 0: + +.. code-block:: none + + # Setup links + media-ctl -l "'ov5640 1-003c':0 -> 'imx6-mipi-csi2':0[1]" + media-ctl -l "'imx6-mipi-csi2':1 -> 'ipu1_csi0_mux':0[1]" + media-ctl -l "'ipu1_csi0_mux':2 -> 'ipu1_csi0':0[1]" + media-ctl -l "'ipu1_csi0':2 -> 'ipu1_csi0 capture':0[1]" + # Configure pads + media-ctl -V "'ov5640 1-003c':0 [fmt:UYVY2X8/640x480]" + media-ctl -V "'imx6-mipi-csi2':1 [fmt:UYVY2X8/640x480]" + media-ctl -V "'ipu1_csi0_mux':0 [fmt:UYVY2X8/640x480]" + media-ctl -V "'ipu1_csi0':0 [fmt:AYUV32/640x480]" + +Streaming can then begin on "ipu1_csi0 capture" node. The v4l2-ctl +tool can be used to select any supported pixelformat on the capture +device node. + The following example configures a direct conversion pipeline to capture from the OV5640, transmitting on MIPI CSI-2 virtual channel 0. It also shows colorspace conversion and scaling at IC output. -- GitLab From 8a4676d6e627ed3c7a48c827e23f71e3e91dd3dd Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 9 Apr 2020 18:29:44 +0200 Subject: [PATCH 199/503] media: imx.rst: Provide the OV560 module part number In order to improve the documentation, provide the OV5640 MIPI module part number that is used on the imx6q-sabresd board. Signed-off-by: Fabio Estevam Reviewed-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/imx.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/media/imx.rst b/Documentation/admin-guide/media/imx.rst index e309d1aa0a653..64f5b550d0e19 100644 --- a/Documentation/admin-guide/media/imx.rst +++ b/Documentation/admin-guide/media/imx.rst @@ -586,8 +586,8 @@ module. The OV5642 connects to i2c bus 1 and the OV5640 to i2c bus 2. The device tree for SabreSD includes OF graphs for both the parallel OV5642 and the MIPI CSI-2 OV5640, but as of this writing only the MIPI CSI-2 OV5640 has been tested, so the OV5642 node is currently disabled. -The OV5640 module connects to MIPI connector J5 (sorry I don't have the -compatible module part number or URL). +The OV5640 module connects to MIPI connector J5. The NXP part number +for the OV5640 module that connects to the SabreSD board is H120729. The following example configures unprocessed video capture pipeline to capture from the OV5640, transmitting on MIPI CSI-2 virtual channel 0: -- GitLab From d00c9761afe7808ed742741c95bd536e0a648676 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 9 Apr 2020 18:29:45 +0200 Subject: [PATCH 200/503] media: imx.rst: Provide streaming examples for imx6q-sabresd Improve the documentation by providing examples on how to test camera capture on imx6q-sabresd via v4l2-ctl and Gstreamer. Signed-off-by: Fabio Estevam Reviewed-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/imx.rst | 45 +++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/Documentation/admin-guide/media/imx.rst b/Documentation/admin-guide/media/imx.rst index 64f5b550d0e19..b8fa70f854fdb 100644 --- a/Documentation/admin-guide/media/imx.rst +++ b/Documentation/admin-guide/media/imx.rst @@ -609,6 +609,28 @@ Streaming can then begin on "ipu1_csi0 capture" node. The v4l2-ctl tool can be used to select any supported pixelformat on the capture device node. +To determine what is the /dev/video node correspondent to +"ipu1_csi0 capture": + +.. code-block:: none + + media-ctl -e "ipu1_csi0 capture" + /dev/video0 + +/dev/video0 is the streaming element in this case. + +Starting the streaming via v4l2-ctl: + +.. code-block:: none + + v4l2-ctl --stream-mmap -d /dev/video0 + +Starting the streaming via Gstreamer and sending the content to the display: + +.. code-block:: none + + gst-launch-1.0 v4l2src device=/dev/video0 ! kmssink + The following example configures a direct conversion pipeline to capture from the OV5640, transmitting on MIPI CSI-2 virtual channel 0. It also shows colorspace conversion and scaling at IC output. @@ -634,6 +656,29 @@ shows colorspace conversion and scaling at IC output. Streaming can then begin on "ipu1_ic_prpenc capture" node. +To determine what is the /dev/video node correspondent to +"ipu1_ic_prpenc capture": + +.. code-block:: none + + media-ctl -e "ipu1_ic_prpenc capture" + /dev/video1 + + +/dev/video1 is the streaming element in this case. + +Starting the streaming via v4l2-ctl: + +.. code-block:: none + + v4l2-ctl --stream-mmap -d /dev/video1 + +Starting the streaming via Gstreamer and sending the content to the display: + +.. code-block:: none + + gst-launch-1.0 v4l2src device=/dev/video1 ! kmssink + Known Issues ------------ -- GitLab From f36592e7b343d853edf44d3545bb68961c0949a4 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Tue, 7 Apr 2020 11:32:37 +0200 Subject: [PATCH 201/503] media: vicodec: Fix error codes in probe function If these functions fail then we return success, but we should instead preserve negative error code and return that. Fixes: fde649b418d1 ("media: vicodec: Register another node for stateless decoder") Fixes: c022a4a95722 ("media: vicodec: add struct for encoder/decoder instance") Signed-off-by: Dan Carpenter Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test-drivers/vicodec/vicodec-core.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/media/test-drivers/vicodec/vicodec-core.c b/drivers/media/test-drivers/vicodec/vicodec-core.c index 30ced1c213875..e879290727ef4 100644 --- a/drivers/media/test-drivers/vicodec/vicodec-core.c +++ b/drivers/media/test-drivers/vicodec/vicodec-core.c @@ -2114,16 +2114,19 @@ static int vicodec_probe(struct platform_device *pdev) platform_set_drvdata(pdev, dev); - if (register_instance(dev, &dev->stateful_enc, - "stateful-encoder", true)) + ret = register_instance(dev, &dev->stateful_enc, "stateful-encoder", + true); + if (ret) goto unreg_dev; - if (register_instance(dev, &dev->stateful_dec, - "stateful-decoder", false)) + ret = register_instance(dev, &dev->stateful_dec, "stateful-decoder", + false); + if (ret) goto unreg_sf_enc; - if (register_instance(dev, &dev->stateless_dec, - "stateless-decoder", false)) + ret = register_instance(dev, &dev->stateless_dec, "stateless-decoder", + false); + if (ret) goto unreg_sf_dec; #ifdef CONFIG_MEDIA_CONTROLLER -- GitLab From dba3613457065a9578ba159738102dd6dbb5b8c7 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Tue, 7 Apr 2020 19:25:22 +0200 Subject: [PATCH 202/503] media: staging: rkisp1: remove TODO item - uapi structs compatibility remove the TODO item: * Make sure uapi structs have the same size and layout in 32 and 62 bits, and that there are no holes in the structures (pahole is a utility that can be used to test this). It was tested with pahole and found compatible. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/TODO | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/staging/media/rkisp1/TODO b/drivers/staging/media/rkisp1/TODO index 0aa9877dd64a1..f495b81777676 100644 --- a/drivers/staging/media/rkisp1/TODO +++ b/drivers/staging/media/rkisp1/TODO @@ -4,9 +4,6 @@ cio2_parse_firmware in drivers/media/pci/intel/ipu3/ipu3-cio2.c. * Fix pad format size for statistics and parameters entities. * Use threaded interrupt for rkisp1_stats_isr(), remove work queue. * Fix checkpatch errors. -* Make sure uapi structs have the same size and layout in 32 and 62 bits, -and that there are no holes in the structures (pahole is a utility that -can be used to test this). * Review and comment every lock * Handle quantization * Document rkisp1-common.h -- GitLab From dd844fb8e50b12e65bbdc5746c9876c6735500df Mon Sep 17 00:00:00 2001 From: Kieran Bingham Date: Tue, 7 Apr 2020 17:44:17 +0200 Subject: [PATCH 203/503] media: platform: fcp: Set appropriate DMA parameters Enabling CONFIG_DMA_API_DEBUG=y and CONFIG_DMA_API_DEBUG_SG=y will enable extra validation on DMA operations ensuring that the size restraints are met. When using the FCP in conjunction with the VSP1/DU, and display frames, the size of the DMA operations is larger than the default maximum segment size reported by the DMA core (64K). With the DMA debug enabled, this produces a warning such as the following: "DMA-API: rcar-fcp fea27000.fcp: mapping sg segment longer than device claims to support [len=3145728] [max=65536]" We have no specific limitation on the segment size which isn't already handled by the VSP1/DU which actually handles the DMA allcoations and buffer management, so define a maximum segment size of up to 4GB (a 32 bit mask). Reported-by: Geert Uytterhoeven Fixes: 7b49235e83b2 ("[media] v4l: Add Renesas R-Car FCP driver") Signed-off-by: Kieran Bingham Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/rcar-fcp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/media/platform/rcar-fcp.c b/drivers/media/platform/rcar-fcp.c index 43c78620c9d8a..5c6b00737fe75 100644 --- a/drivers/media/platform/rcar-fcp.c +++ b/drivers/media/platform/rcar-fcp.c @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -21,6 +22,7 @@ struct rcar_fcp_device { struct list_head list; struct device *dev; + struct device_dma_parameters dma_parms; }; static LIST_HEAD(fcp_devices); @@ -136,6 +138,9 @@ static int rcar_fcp_probe(struct platform_device *pdev) fcp->dev = &pdev->dev; + fcp->dev->dma_parms = &fcp->dma_parms; + dma_set_max_seg_size(fcp->dev, DMA_BIT_MASK(32)); + pm_runtime_enable(&pdev->dev); mutex_lock(&fcp_lock); -- GitLab From 2990e3dbf7ee3094a6f5138bd3d0fcaef080c056 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Mon, 6 Apr 2020 20:52:33 +0200 Subject: [PATCH 204/503] media: staging: rkisp1: replace rkisp1_fmt_pix_type with v4l2_pixel_encoding The enum rkisp1_fmt_pix_type that holds the pixel format which is one of RGB, YUV, BAYER, can be replace by the v4l2 enum v4l2_pixel_encoding. Signed-off-by: Dafna Hirschfeld Acked-by: Helen Koike Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 92 +++++++++---------- drivers/staging/media/rkisp1/rkisp1-common.h | 11 +-- drivers/staging/media/rkisp1/rkisp1-isp.c | 42 ++++----- drivers/staging/media/rkisp1/rkisp1-resizer.c | 8 +- 4 files changed, 73 insertions(+), 80 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 24fe6a7888aa4..9de98bc4230d5 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -87,133 +87,133 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = { /* yuv422 */ { .fourcc = V4L2_PIX_FMT_YUYV, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, { .fourcc = V4L2_PIX_FMT_YVYU, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, { .fourcc = V4L2_PIX_FMT_VYUY, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, { .fourcc = V4L2_PIX_FMT_YUV422P, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_NV16, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV61, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_YVU422M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, /* yuv420 */ { .fourcc = V4L2_PIX_FMT_NV21, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV12, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV21M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV12M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_YUV420, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_YVU420, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, /* yuv444 */ { .fourcc = V4L2_PIX_FMT_YUV444M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, /* yuv400 */ { .fourcc = V4L2_PIX_FMT_GREY, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, /* raw */ { .fourcc = V4L2_PIX_FMT_SRGGB8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SGRBG8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SGBRG8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SBGGR8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SRGGB10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGRBG10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGBRG10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SBGGR10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SRGGB12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGRBG12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGBRG12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SBGGR12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, }; @@ -222,43 +222,43 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv422 */ { .fourcc = V4L2_PIX_FMT_YUYV, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_YVYU, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_VYUY, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_YUV422P, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_NV16, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_NV61, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_YVU422M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, @@ -266,37 +266,37 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv420 */ { .fourcc = V4L2_PIX_FMT_NV21, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_NV12, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_NV21M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_NV12M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_YUV420, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_YVU420, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, @@ -304,7 +304,7 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv444 */ { .fourcc = V4L2_PIX_FMT_YUV444M, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV444, @@ -312,7 +312,7 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv400 */ { .fourcc = V4L2_PIX_FMT_GREY, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV400, @@ -320,17 +320,17 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* rgb */ { .fourcc = V4L2_PIX_FMT_RGB24, - .fmt_type = RKISP1_FMT_RGB, + .fmt_type = V4L2_PIXEL_ENC_RGB, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB888, }, { .fourcc = V4L2_PIX_FMT_RGB565, - .fmt_type = RKISP1_FMT_RGB, + .fmt_type = V4L2_PIXEL_ENC_RGB, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB565, }, { .fourcc = V4L2_PIX_FMT_BGR666, - .fmt_type = RKISP1_FMT_RGB, + .fmt_type = V4L2_PIXEL_ENC_RGB, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB666, }, @@ -510,7 +510,7 @@ static void rkisp1_mp_enable(struct rkisp1_capture *cap) rkisp1_mp_disable(cap); mi_ctrl = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL); - if (isp_fmt->fmt_type == RKISP1_FMT_BAYER) + if (isp_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) mi_ctrl |= RKISP1_CIF_MI_CTRL_RAW_ENABLE; /* YUV */ else diff --git a/drivers/staging/media/rkisp1/rkisp1-common.h b/drivers/staging/media/rkisp1/rkisp1-common.h index b291cc60de8e3..b9f276777a74d 100644 --- a/drivers/staging/media/rkisp1/rkisp1-common.h +++ b/drivers/staging/media/rkisp1/rkisp1-common.h @@ -52,13 +52,6 @@ enum rkisp1_stream_id { RKISP1_SELFPATH, }; -enum rkisp1_fmt_pix_type { - RKISP1_FMT_YUV, - RKISP1_FMT_RGB, - RKISP1_FMT_BAYER, - RKISP1_FMT_JPEG, -}; - enum rkisp1_fmt_raw_pat_type { RKISP1_RAW_RGGB = 0, RKISP1_RAW_GRBG, @@ -225,7 +218,7 @@ struct rkisp1_resizer { struct media_pad pads[RKISP1_ISP_PAD_MAX]; struct v4l2_subdev_pad_config pad_cfg[RKISP1_ISP_PAD_MAX]; const struct rkisp1_rsz_config *config; - enum rkisp1_fmt_pix_type fmt_type; + enum v4l2_pixel_encoding fmt_type; struct mutex ops_lock; }; @@ -278,7 +271,7 @@ struct rkisp1_device { */ struct rkisp1_isp_mbus_info { u32 mbus_code; - enum rkisp1_fmt_pix_type fmt_type; + enum v4l2_pixel_encoding fmt_type; u32 mipi_dt; u32 yuv_seq; u8 bus_width; diff --git a/drivers/staging/media/rkisp1/rkisp1-isp.c b/drivers/staging/media/rkisp1/rkisp1-isp.c index fa53f05e37d81..ac5df6983c3bb 100644 --- a/drivers/staging/media/rkisp1/rkisp1-isp.c +++ b/drivers/staging/media/rkisp1/rkisp1-isp.c @@ -61,116 +61,116 @@ static const struct rkisp1_isp_mbus_info rkisp1_isp_formats[] = { { .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .direction = RKISP1_DIR_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_RGGB, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_BGGR, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_GBRG, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_GRBG, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_RGGB, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_BGGR, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_GBRG, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_GRBG, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_RGGB, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_BGGR, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_GBRG, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, - .fmt_type = RKISP1_FMT_BAYER, + .fmt_type = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_GRBG, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_YCBYCR, .bus_width = 16, .direction = RKISP1_DIR_SINK, }, { .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_YCRYCB, .bus_width = 16, .direction = RKISP1_DIR_SINK, }, { .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_CBYCRY, .bus_width = 16, .direction = RKISP1_DIR_SINK, }, { .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, - .fmt_type = RKISP1_FMT_YUV, + .fmt_type = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_CRYCBY, .bus_width = 16, @@ -288,9 +288,9 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) RKISP1_ISP_PAD_SINK_VIDEO, V4L2_SUBDEV_FORMAT_ACTIVE); - if (sink_fmt->fmt_type == RKISP1_FMT_BAYER) { + if (sink_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) { acq_mult = 1; - if (src_fmt->fmt_type == RKISP1_FMT_BAYER) { + if (src_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) { if (sensor->mbus.type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT_ITU656; else @@ -304,7 +304,7 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601; } - } else if (sink_fmt->fmt_type == RKISP1_FMT_YUV) { + } else if (sink_fmt->fmt_type == V4L2_PIXEL_ENC_YUV) { acq_mult = 2; if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) { isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; @@ -357,7 +357,7 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) RKISP1_CIF_ISP_PIC_SIZE_ERROR | RKISP1_CIF_ISP_FRAME_IN; rkisp1_write(rkisp1, irq_mask, RKISP1_CIF_ISP_IMSC); - if (src_fmt->fmt_type == RKISP1_FMT_BAYER) { + if (src_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) { rkisp1_params_disable(&rkisp1->params); } else { struct v4l2_mbus_framefmt *src_frm; diff --git a/drivers/staging/media/rkisp1/rkisp1-resizer.c b/drivers/staging/media/rkisp1/rkisp1-resizer.c index 87799fbf0363e..eaf28d4216762 100644 --- a/drivers/staging/media/rkisp1/rkisp1-resizer.c +++ b/drivers/staging/media/rkisp1/rkisp1-resizer.c @@ -14,7 +14,7 @@ #define RKISP1_RSZ_MP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_mainpath" #define RKISP1_DEF_FMT MEDIA_BUS_FMT_YUYV8_2X8 -#define RKISP1_DEF_FMT_TYPE RKISP1_FMT_YUV +#define RKISP1_DEF_FMT_TYPE V4L2_PIXEL_ENC_YUV #define RKISP1_MBUS_FMT_HDIV 2 #define RKISP1_MBUS_FMT_VDIV 1 @@ -371,7 +371,7 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, src_fmt = rkisp1_rsz_get_pad_fmt(rsz, NULL, RKISP1_RSZ_PAD_SRC, V4L2_SUBDEV_FORMAT_ACTIVE); - if (rsz->fmt_type == RKISP1_FMT_BAYER) { + if (rsz->fmt_type == V4L2_PIXEL_ENC_BAYER) { rkisp1_rsz_disable(rsz, when); return; } @@ -384,7 +384,7 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, sink_c.width = sink_y.width / RKISP1_MBUS_FMT_HDIV; sink_c.height = sink_y.height / RKISP1_MBUS_FMT_VDIV; - if (rsz->fmt_type == RKISP1_FMT_YUV) { + if (rsz->fmt_type == V4L2_PIXEL_ENC_YUV) { struct rkisp1_capture *cap = &rsz->rkisp1->capture_devs[rsz->id]; const struct v4l2_format_info *pixfmt_info = @@ -498,7 +498,7 @@ static void rkisp1_rsz_set_sink_crop(struct rkisp1_resizer *rsz, mbus_info = rkisp1_isp_mbus_info_get(sink_fmt->code); if (rsz->id == RKISP1_MAINPATH && - mbus_info->fmt_type == RKISP1_FMT_BAYER) { + mbus_info->fmt_type == V4L2_PIXEL_ENC_BAYER) { sink_crop->left = 0; sink_crop->top = 0; sink_crop->width = sink_fmt->width; -- GitLab From b23096af0be45700c90f60f610c2d2ae66868f2d Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Mon, 6 Apr 2020 20:52:34 +0200 Subject: [PATCH 205/503] media: staging: rkisp1: cap: remove field fmt_type from struct rkisp1_capture_fmt_cfg The pixel encoding can be retrieved from the cap->pix.info. Therefore the field fmt_type can be removed from the struct rkisp1_capture_fmt_cfg. Signed-off-by: Dafna Hirschfeld Acked-by: Helen Koike Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 51 +------------------ 1 file changed, 2 insertions(+), 49 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 9de98bc4230d5..5bb91a3d5a3c0 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -52,7 +52,6 @@ enum rkisp1_plane { */ struct rkisp1_capture_fmt_cfg { u32 fourcc; - u8 fmt_type; u8 uv_swap; u32 write_format; u32 output_format; @@ -87,133 +86,106 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = { /* yuv422 */ { .fourcc = V4L2_PIX_FMT_YUYV, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, { .fourcc = V4L2_PIX_FMT_YVYU, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, { .fourcc = V4L2_PIX_FMT_VYUY, - .fmt_type = V4L2_PIXEL_ENC_YUV, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, { .fourcc = V4L2_PIX_FMT_YUV422P, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_NV16, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV61, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_YVU422M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, /* yuv420 */ { .fourcc = V4L2_PIX_FMT_NV21, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV12, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV21M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_NV12M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA, }, { .fourcc = V4L2_PIX_FMT_YUV420, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_YVU420, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, /* yuv444 */ { .fourcc = V4L2_PIX_FMT_YUV444M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, /* yuv400 */ { .fourcc = V4L2_PIX_FMT_GREY, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUVINT, }, /* raw */ { .fourcc = V4L2_PIX_FMT_SRGGB8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SGRBG8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SGBRG8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SBGGR8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8, }, { .fourcc = V4L2_PIX_FMT_SRGGB10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGRBG10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGBRG10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SBGGR10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SRGGB12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGRBG12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SGBRG12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, { .fourcc = V4L2_PIX_FMT_SBGGR12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, .write_format = RKISP1_MI_CTRL_MP_WRITE_RAW12, }, }; @@ -222,43 +194,36 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv422 */ { .fourcc = V4L2_PIX_FMT_YUYV, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_YVYU, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_VYUY, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_YUV422P, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_NV16, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_NV61, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, }, { .fourcc = V4L2_PIX_FMT_YVU422M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422, @@ -266,37 +231,31 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv420 */ { .fourcc = V4L2_PIX_FMT_NV21, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_NV12, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_NV21M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_NV12M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_YUV420, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, }, { .fourcc = V4L2_PIX_FMT_YVU420, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 1, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV420, @@ -304,7 +263,6 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv444 */ { .fourcc = V4L2_PIX_FMT_YUV444M, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV444, @@ -312,7 +270,6 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* yuv400 */ { .fourcc = V4L2_PIX_FMT_GREY, - .fmt_type = V4L2_PIXEL_ENC_YUV, .uv_swap = 0, .write_format = RKISP1_MI_CTRL_SP_WRITE_INT, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV400, @@ -320,17 +277,14 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = { /* rgb */ { .fourcc = V4L2_PIX_FMT_RGB24, - .fmt_type = V4L2_PIXEL_ENC_RGB, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB888, }, { .fourcc = V4L2_PIX_FMT_RGB565, - .fmt_type = V4L2_PIXEL_ENC_RGB, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB565, }, { .fourcc = V4L2_PIX_FMT_BGR666, - .fmt_type = V4L2_PIXEL_ENC_RGB, .write_format = RKISP1_MI_CTRL_SP_WRITE_PLA, .output_format = RKISP1_MI_CTRL_SP_OUTPUT_RGB666, }, @@ -504,13 +458,12 @@ static void rkisp1_sp_disable(struct rkisp1_capture *cap) static void rkisp1_mp_enable(struct rkisp1_capture *cap) { - const struct rkisp1_capture_fmt_cfg *isp_fmt = cap->pix.cfg; u32 mi_ctrl; rkisp1_mp_disable(cap); mi_ctrl = rkisp1_read(cap->rkisp1, RKISP1_CIF_MI_CTRL); - if (isp_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) + if (v4l2_is_format_bayer(cap->pix.info)) mi_ctrl |= RKISP1_CIF_MI_CTRL_RAW_ENABLE; /* YUV */ else @@ -1260,7 +1213,7 @@ static int rkisp1_capture_link_validate(struct media_link *link) return -EPIPE; } - if (cap->pix.cfg->fmt_type != isp->src_fmt->fmt_type) { + if (cap->pix.info->pixel_enc != isp->src_fmt->fmt_type) { dev_err(cap->rkisp1->dev, "format type mismatch in link '%s:%d->%s:%d'\n", link->source->entity->name, link->source->index, -- GitLab From 003492984ed7fc1f7cfc565b4a5c77cfd8ceea13 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Mon, 6 Apr 2020 20:52:35 +0200 Subject: [PATCH 206/503] media: staging: rkisp1: change fields names from fmt_type to pixel_enc The fields 'fmt_type' in the structs 'rkisp1_rsz_config', 'rkisp1_isp_mbus_info' are of type 'v4l2_pixel_encoding' so it is nicer to change their name to 'pixel_enc'. Also change the define 'RKISP1_DEF_FMT_TYPE' to 'RKISP1_DEF_PIXEL_ENC' Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 2 +- drivers/staging/media/rkisp1/rkisp1-common.h | 4 +- drivers/staging/media/rkisp1/rkisp1-isp.c | 42 +++++++++---------- drivers/staging/media/rkisp1/rkisp1-resizer.c | 12 +++--- 4 files changed, 30 insertions(+), 30 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 5bb91a3d5a3c0..7e3d498d0b4f8 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -1213,7 +1213,7 @@ static int rkisp1_capture_link_validate(struct media_link *link) return -EPIPE; } - if (cap->pix.info->pixel_enc != isp->src_fmt->fmt_type) { + if (cap->pix.info->pixel_enc != isp->src_fmt->pixel_enc) { dev_err(cap->rkisp1->dev, "format type mismatch in link '%s:%d->%s:%d'\n", link->source->entity->name, link->source->index, diff --git a/drivers/staging/media/rkisp1/rkisp1-common.h b/drivers/staging/media/rkisp1/rkisp1-common.h index b9f276777a74d..ccf4bb0deb02c 100644 --- a/drivers/staging/media/rkisp1/rkisp1-common.h +++ b/drivers/staging/media/rkisp1/rkisp1-common.h @@ -218,7 +218,7 @@ struct rkisp1_resizer { struct media_pad pads[RKISP1_ISP_PAD_MAX]; struct v4l2_subdev_pad_config pad_cfg[RKISP1_ISP_PAD_MAX]; const struct rkisp1_rsz_config *config; - enum v4l2_pixel_encoding fmt_type; + enum v4l2_pixel_encoding pixel_enc; struct mutex ops_lock; }; @@ -271,7 +271,7 @@ struct rkisp1_device { */ struct rkisp1_isp_mbus_info { u32 mbus_code; - enum v4l2_pixel_encoding fmt_type; + enum v4l2_pixel_encoding pixel_enc; u32 mipi_dt; u32 yuv_seq; u8 bus_width; diff --git a/drivers/staging/media/rkisp1/rkisp1-isp.c b/drivers/staging/media/rkisp1/rkisp1-isp.c index ac5df6983c3bb..60f6b8d9004ba 100644 --- a/drivers/staging/media/rkisp1/rkisp1-isp.c +++ b/drivers/staging/media/rkisp1/rkisp1-isp.c @@ -61,116 +61,116 @@ static const struct rkisp1_isp_mbus_info rkisp1_isp_formats[] = { { .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, - .fmt_type = V4L2_PIXEL_ENC_YUV, + .pixel_enc = V4L2_PIXEL_ENC_YUV, .direction = RKISP1_DIR_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_RGGB, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_BGGR, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_GBRG, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW10, .bayer_pat = RKISP1_RAW_GRBG, .bus_width = 10, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_RGGB, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_BGGR, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_GBRG, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW12, .bayer_pat = RKISP1_RAW_GRBG, .bus_width = 12, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_RGGB, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_BGGR, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_GBRG, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, - .fmt_type = V4L2_PIXEL_ENC_BAYER, + .pixel_enc = V4L2_PIXEL_ENC_BAYER, .mipi_dt = RKISP1_CIF_CSI2_DT_RAW8, .bayer_pat = RKISP1_RAW_GRBG, .bus_width = 8, .direction = RKISP1_DIR_SINK_SRC, }, { .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, - .fmt_type = V4L2_PIXEL_ENC_YUV, + .pixel_enc = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_YCBYCR, .bus_width = 16, .direction = RKISP1_DIR_SINK, }, { .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, - .fmt_type = V4L2_PIXEL_ENC_YUV, + .pixel_enc = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_YCRYCB, .bus_width = 16, .direction = RKISP1_DIR_SINK, }, { .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, - .fmt_type = V4L2_PIXEL_ENC_YUV, + .pixel_enc = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_CBYCRY, .bus_width = 16, .direction = RKISP1_DIR_SINK, }, { .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, - .fmt_type = V4L2_PIXEL_ENC_YUV, + .pixel_enc = V4L2_PIXEL_ENC_YUV, .mipi_dt = RKISP1_CIF_CSI2_DT_YUV422_8b, .yuv_seq = RKISP1_CIF_ISP_ACQ_PROP_CRYCBY, .bus_width = 16, @@ -288,9 +288,9 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) RKISP1_ISP_PAD_SINK_VIDEO, V4L2_SUBDEV_FORMAT_ACTIVE); - if (sink_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) { + if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { acq_mult = 1; - if (src_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) { + if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { if (sensor->mbus.type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT_ITU656; else @@ -304,7 +304,7 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601; } - } else if (sink_fmt->fmt_type == V4L2_PIXEL_ENC_YUV) { + } else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) { acq_mult = 2; if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) { isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; @@ -357,7 +357,7 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) RKISP1_CIF_ISP_PIC_SIZE_ERROR | RKISP1_CIF_ISP_FRAME_IN; rkisp1_write(rkisp1, irq_mask, RKISP1_CIF_ISP_IMSC); - if (src_fmt->fmt_type == V4L2_PIXEL_ENC_BAYER) { + if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { rkisp1_params_disable(&rkisp1->params); } else { struct v4l2_mbus_framefmt *src_frm; diff --git a/drivers/staging/media/rkisp1/rkisp1-resizer.c b/drivers/staging/media/rkisp1/rkisp1-resizer.c index eaf28d4216762..7b6b7ddd4169a 100644 --- a/drivers/staging/media/rkisp1/rkisp1-resizer.c +++ b/drivers/staging/media/rkisp1/rkisp1-resizer.c @@ -14,7 +14,7 @@ #define RKISP1_RSZ_MP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_mainpath" #define RKISP1_DEF_FMT MEDIA_BUS_FMT_YUYV8_2X8 -#define RKISP1_DEF_FMT_TYPE V4L2_PIXEL_ENC_YUV +#define RKISP1_DEF_PIXEL_ENC V4L2_PIXEL_ENC_YUV #define RKISP1_MBUS_FMT_HDIV 2 #define RKISP1_MBUS_FMT_VDIV 1 @@ -371,7 +371,7 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, src_fmt = rkisp1_rsz_get_pad_fmt(rsz, NULL, RKISP1_RSZ_PAD_SRC, V4L2_SUBDEV_FORMAT_ACTIVE); - if (rsz->fmt_type == V4L2_PIXEL_ENC_BAYER) { + if (rsz->pixel_enc == V4L2_PIXEL_ENC_BAYER) { rkisp1_rsz_disable(rsz, when); return; } @@ -384,7 +384,7 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, sink_c.width = sink_y.width / RKISP1_MBUS_FMT_HDIV; sink_c.height = sink_y.height / RKISP1_MBUS_FMT_VDIV; - if (rsz->fmt_type == V4L2_PIXEL_ENC_YUV) { + if (rsz->pixel_enc == V4L2_PIXEL_ENC_YUV) { struct rkisp1_capture *cap = &rsz->rkisp1->capture_devs[rsz->id]; const struct v4l2_format_info *pixfmt_info = @@ -498,7 +498,7 @@ static void rkisp1_rsz_set_sink_crop(struct rkisp1_resizer *rsz, mbus_info = rkisp1_isp_mbus_info_get(sink_fmt->code); if (rsz->id == RKISP1_MAINPATH && - mbus_info->fmt_type == V4L2_PIXEL_ENC_BAYER) { + mbus_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) { sink_crop->left = 0; sink_crop->top = 0; sink_crop->width = sink_fmt->width; @@ -537,7 +537,7 @@ static void rkisp1_rsz_set_sink_fmt(struct rkisp1_resizer *rsz, mbus_info = rkisp1_isp_mbus_info_get(sink_fmt->code); } if (which == V4L2_SUBDEV_FORMAT_ACTIVE) - rsz->fmt_type = mbus_info->fmt_type; + rsz->pixel_enc = mbus_info->pixel_enc; /* Propagete to source pad */ src_fmt->code = sink_fmt->code; @@ -722,7 +722,7 @@ static int rkisp1_rsz_register(struct rkisp1_resizer *rsz) pads[RKISP1_RSZ_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE | MEDIA_PAD_FL_MUST_CONNECT; - rsz->fmt_type = RKISP1_DEF_FMT_TYPE; + rsz->pixel_enc = RKISP1_DEF_PIXEL_ENC; mutex_init(&rsz->ops_lock); ret = media_entity_pads_init(&sd->entity, 2, pads); -- GitLab From d6ef0719fa90da52a555ff6de5f13e6bea601d33 Mon Sep 17 00:00:00 2001 From: Seungchul Kim Date: Thu, 26 Mar 2020 10:09:46 +0100 Subject: [PATCH 207/503] media: v4l2-fh: define v4l2_fh struct regardless of condition v4l2_fh struct define differently by CONFIG_V4L2_MEM2MEM_DEV. If some vendors use CONFIG_V4L2_MEM2MEM_DEV by module, it can make the mismatch of v4l2_fh sturct. By the mismatch, the following error occurs. =============================== [ 7.533506] v4l2_mem2mem: disagrees about version of symbol video_devdata [ 7.533594] v4l2_mem2mem: Unknown symbol video_devdata (err -22) [ 7.535319] v4l2_mem2mem: disagrees about version of symbol v4l2_event_pending [ 7.542532] v4l2_mem2mem: Unknown symbol v4l2_event_pending (err -22) =============================== So v4l2_fh struct is modified to does not have dependency for CONFIG_V4L2_MEM2MEM_DEV. Signed-off-by: Seungchul Kim Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-ioctl.c | 2 -- include/media/v4l2-fh.h | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index b2ef8e60ea7da..833e79a2cb98d 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -2805,13 +2805,11 @@ static struct mutex *v4l2_ioctl_get_lock(struct video_device *vdev, { if (_IOC_NR(cmd) >= V4L2_IOCTLS) return vdev->lock; -#if IS_ENABLED(CONFIG_V4L2_MEM2MEM_DEV) if (vfh && vfh->m2m_ctx && (v4l2_ioctls[_IOC_NR(cmd)].flags & INFO_FL_QUEUE)) { if (vfh->m2m_ctx->q_lock) return vfh->m2m_ctx->q_lock; } -#endif if (vdev->queue && vdev->queue->lock && (v4l2_ioctls[_IOC_NR(cmd)].flags & INFO_FL_QUEUE)) return vdev->queue->lock; diff --git a/include/media/v4l2-fh.h b/include/media/v4l2-fh.h index 53b4dbb4ae8e4..b5b3e00c8e6a0 100644 --- a/include/media/v4l2-fh.h +++ b/include/media/v4l2-fh.h @@ -53,9 +53,7 @@ struct v4l2_fh { unsigned int navailable; u32 sequence; -#if IS_ENABLED(CONFIG_V4L2_MEM2MEM_DEV) struct v4l2_m2m_ctx *m2m_ctx; -#endif }; /** -- GitLab From f661aaa007aa411ecd088e99864926adc968c510 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 2 Apr 2020 21:45:02 +0200 Subject: [PATCH 208/503] media: rkisp1: Get rid of unused variable warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If CONFIG_OF is not selected, the compiler will complain: drivers/staging/media/rkisp1/rkisp1-dev.c: In function ‘rkisp1_probe’: drivers/staging/media/rkisp1/rkisp1-dev.c:457:22: warning: unused variable ‘node’ [-Wunused-variable] 457 | struct device_node *node = pdev->dev.of_node; Rework the code slightly and make the compiler happy. Suggested-by: Robin Murphy Signed-off-by: Ezequiel Garcia Acked-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-dev.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-dev.c b/drivers/staging/media/rkisp1/rkisp1-dev.c index b1b3c058e957c..3f62857093525 100644 --- a/drivers/staging/media/rkisp1/rkisp1-dev.c +++ b/drivers/staging/media/rkisp1/rkisp1-dev.c @@ -454,16 +454,17 @@ static void rkisp1_debug_init(struct rkisp1_device *rkisp1) static int rkisp1_probe(struct platform_device *pdev) { - struct device_node *node = pdev->dev.of_node; const struct rkisp1_match_data *clk_data; - const struct of_device_id *match; struct device *dev = &pdev->dev; struct rkisp1_device *rkisp1; struct v4l2_device *v4l2_dev; unsigned int i; int ret, irq; - match = of_match_node(rkisp1_of_match, node); + clk_data = of_device_get_match_data(&pdev->dev); + if (!clk_data) + return -ENODEV; + rkisp1 = devm_kzalloc(dev, sizeof(*rkisp1), GFP_KERNEL); if (!rkisp1) return -ENOMEM; @@ -487,7 +488,6 @@ static int rkisp1_probe(struct platform_device *pdev) } rkisp1->irq = irq; - clk_data = match->data; for (i = 0; i < clk_data->size; i++) rkisp1->clks[i].id = clk_data->clks[i]; -- GitLab From 42cbdf2b5ecb2aafa24f94eaba505decd86300b3 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 2 Apr 2020 21:45:03 +0200 Subject: [PATCH 209/503] media: phy-rockchip-dphy-rx0: Drop unneeded CONFIG_OF dependency The driver is perfectly capable of being built without CONFIG_OF. Remove this dependency, which is useful for compile-only tests. Signed-off-by: Ezequiel Garcia Acked-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig b/drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig index bd0147624de1a..fb74df8293713 100644 --- a/drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig +++ b/drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig @@ -2,7 +2,7 @@ config PHY_ROCKCHIP_DPHY_RX0 tristate "Rockchip MIPI Synopsys DPHY RX0 driver" - depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF + depends on ARCH_ROCKCHIP || COMPILE_TEST select GENERIC_PHY_MIPI_DPHY select GENERIC_PHY help -- GitLab From 45776c540f7fee193ab5a419d5e188cd220ce226 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 2 Apr 2020 21:45:04 +0200 Subject: [PATCH 210/503] media: rkisp1: Fix wrong PHY config dependency Instead of depending on the Rockchip PHY driver the ISP driver should really depend on CONFIG_GENERIC_PHY_MIPI_DPHY, given all it needs is the phy_mipi_dphy_get_default_config() symbol. Fix it. Signed-off-by: Ezequiel Garcia Acked-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/rkisp1/Kconfig b/drivers/staging/media/rkisp1/Kconfig index 07e4a6e4458e3..41f5def9ea442 100644 --- a/drivers/staging/media/rkisp1/Kconfig +++ b/drivers/staging/media/rkisp1/Kconfig @@ -9,7 +9,7 @@ config VIDEO_ROCKCHIP_ISP1 select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC select V4L2_FWNODE - select PHY_ROCKCHIP_DPHY_RX0 + select GENERIC_PHY_MIPI_DPHY default n help Enable this to support the Image Signal Processing (ISP) module -- GitLab From 624922a2739b96b83aaf1655d0519b41d30140f7 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sat, 4 Apr 2020 00:13:41 +0200 Subject: [PATCH 211/503] media: v4l2-core: Add helpers to build the H264 P/B0/B1 reflists Building those list is a standard procedure described in section '8.2.4 Decoding process for reference picture lists construction' of the H264 specification. We already have 2 drivers needing the same logic (hantro and rkvdec) and I suspect we will soon have more. Let's provide generic helpers to create those lists. Signed-off-by: Boris Brezillon Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/Kconfig | 4 + drivers/media/v4l2-core/Makefile | 1 + drivers/media/v4l2-core/v4l2-h264.c | 270 ++++++++++++++++++++++++++++ include/media/h264-ctrls.h | 8 +- include/media/v4l2-h264.h | 85 +++++++++ 5 files changed, 367 insertions(+), 1 deletion(-) create mode 100644 drivers/media/v4l2-core/v4l2-h264.c create mode 100644 include/media/v4l2-h264.h diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig index 3fa75352d04cb..bf49f83cb86f8 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig @@ -48,6 +48,10 @@ config VIDEO_TUNER config V4L2_JPEG_HELPER tristate +# Used by drivers that need v4l2-h264.ko +config V4L2_H264 + tristate + # Used by drivers that need v4l2-mem2mem.ko config V4L2_MEM2MEM_DEV tristate diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile index 144564656d22b..2ef0c7c958a24 100644 --- a/drivers/media/v4l2-core/Makefile +++ b/drivers/media/v4l2-core/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_VIDEO_V4L2) += v4l2-dv-timings.o obj-$(CONFIG_VIDEO_TUNER) += tuner.o obj-$(CONFIG_V4L2_MEM2MEM_DEV) += v4l2-mem2mem.o +obj-$(CONFIG_V4L2_H264) += v4l2-h264.o obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o diff --git a/drivers/media/v4l2-core/v4l2-h264.c b/drivers/media/v4l2-core/v4l2-h264.c new file mode 100644 index 0000000000000..edf6225f0522b --- /dev/null +++ b/drivers/media/v4l2-core/v4l2-h264.c @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * V4L2 H264 helpers. + * + * Copyright (C) 2019 Collabora, Ltd. + * + * Author: Boris Brezillon + */ + +#include +#include + +#include + +/** + * v4l2_h264_init_reflist_builder() - Initialize a P/B0/B1 reference list + * builder + * + * @b: the builder context to initialize + * @dec_params: decode parameters control + * @slice_params: first slice parameters control + * @sps: SPS control + * @dpb: DPB to use when creating the reference list + */ +void +v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, + const struct v4l2_ctrl_h264_decode_params *dec_params, + const struct v4l2_ctrl_h264_slice_params *slice_params, + const struct v4l2_ctrl_h264_sps *sps, + const struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]) +{ + int cur_frame_num, max_frame_num; + unsigned int i; + + max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4); + cur_frame_num = slice_params->frame_num; + + memset(b, 0, sizeof(*b)); + if (!(slice_params->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC)) + b->cur_pic_order_count = min(dec_params->bottom_field_order_cnt, + dec_params->top_field_order_cnt); + else if (slice_params->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD) + b->cur_pic_order_count = dec_params->bottom_field_order_cnt; + else + b->cur_pic_order_count = dec_params->top_field_order_cnt; + + for (i = 0; i < V4L2_H264_NUM_DPB_ENTRIES; i++) { + u32 pic_order_count; + + if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) + continue; + + b->refs[i].pic_num = dpb[i].pic_num; + if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) + b->refs[i].longterm = true; + + /* + * Handle frame_num wraparound as described in section + * '8.2.4.1 Decoding process for picture numbers' of the spec. + * TODO: This logic will have to be adjusted when we start + * supporting interlaced content. + */ + if (dpb[i].frame_num > cur_frame_num) + b->refs[i].frame_num = (int)dpb[i].frame_num - + max_frame_num; + else + b->refs[i].frame_num = dpb[i].frame_num; + + if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) + pic_order_count = min(dpb[i].top_field_order_cnt, + dpb[i].bottom_field_order_cnt); + else if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD) + pic_order_count = dpb[i].bottom_field_order_cnt; + else + pic_order_count = dpb[i].top_field_order_cnt; + + b->refs[i].pic_order_count = pic_order_count; + b->unordered_reflist[b->num_valid] = i; + b->num_valid++; + } + + for (i = b->num_valid; i < ARRAY_SIZE(b->unordered_reflist); i++) + b->unordered_reflist[i] = i; +} +EXPORT_SYMBOL_GPL(v4l2_h264_init_reflist_builder); + +static int v4l2_h264_p_ref_list_cmp(const void *ptra, const void *ptrb, + const void *data) +{ + const struct v4l2_h264_reflist_builder *builder = data; + u8 idxa, idxb; + + idxa = *((u8 *)ptra); + idxb = *((u8 *)ptrb); + + if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES || + idxb >= V4L2_H264_NUM_DPB_ENTRIES)) + return 1; + + if (builder->refs[idxa].longterm != builder->refs[idxb].longterm) { + /* Short term pics first. */ + if (!builder->refs[idxa].longterm) + return -1; + else + return 1; + } + + /* + * Short term pics in descending pic num order, long term ones in + * ascending order. + */ + if (!builder->refs[idxa].longterm) + return builder->refs[idxb].frame_num < + builder->refs[idxa].frame_num ? + -1 : 1; + + return builder->refs[idxa].pic_num < builder->refs[idxb].pic_num ? + -1 : 1; +} + +static int v4l2_h264_b0_ref_list_cmp(const void *ptra, const void *ptrb, + const void *data) +{ + const struct v4l2_h264_reflist_builder *builder = data; + s32 poca, pocb; + u8 idxa, idxb; + + idxa = *((u8 *)ptra); + idxb = *((u8 *)ptrb); + + if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES || + idxb >= V4L2_H264_NUM_DPB_ENTRIES)) + return 1; + + if (builder->refs[idxa].longterm != builder->refs[idxb].longterm) { + /* Short term pics first. */ + if (!builder->refs[idxa].longterm) + return -1; + else + return 1; + } + + /* Long term pics in ascending pic num order. */ + if (builder->refs[idxa].longterm) + return builder->refs[idxa].pic_num < + builder->refs[idxb].pic_num ? + -1 : 1; + + poca = builder->refs[idxa].pic_order_count; + pocb = builder->refs[idxb].pic_order_count; + + /* + * Short term pics with POC < cur POC first in POC descending order + * followed by short term pics with POC > cur POC in POC ascending + * order. + */ + if ((poca < builder->cur_pic_order_count) != + (pocb < builder->cur_pic_order_count)) + return poca < pocb ? -1 : 1; + else if (poca < builder->cur_pic_order_count) + return pocb < poca ? -1 : 1; + + return poca < pocb ? -1 : 1; +} + +static int v4l2_h264_b1_ref_list_cmp(const void *ptra, const void *ptrb, + const void *data) +{ + const struct v4l2_h264_reflist_builder *builder = data; + s32 poca, pocb; + u8 idxa, idxb; + + idxa = *((u8 *)ptra); + idxb = *((u8 *)ptrb); + + if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES || + idxb >= V4L2_H264_NUM_DPB_ENTRIES)) + return 1; + + if (builder->refs[idxa].longterm != builder->refs[idxb].longterm) { + /* Short term pics first. */ + if (!builder->refs[idxa].longterm) + return -1; + else + return 1; + } + + /* Long term pics in ascending pic num order. */ + if (builder->refs[idxa].longterm) + return builder->refs[idxa].pic_num < + builder->refs[idxb].pic_num ? + -1 : 1; + + poca = builder->refs[idxa].pic_order_count; + pocb = builder->refs[idxb].pic_order_count; + + /* + * Short term pics with POC > cur POC first in POC ascending order + * followed by short term pics with POC < cur POC in POC descending + * order. + */ + if ((poca < builder->cur_pic_order_count) != + (pocb < builder->cur_pic_order_count)) + return pocb < poca ? -1 : 1; + else if (poca < builder->cur_pic_order_count) + return pocb < poca ? -1 : 1; + + return poca < pocb ? -1 : 1; +} + +/** + * v4l2_h264_build_p_ref_list() - Build the P reference list + * + * @builder: reference list builder context + * @reflist: 16-bytes array used to store the P reference list. Each entry + * is an index in the DPB + * + * This functions builds the P reference lists. This procedure is describe in + * section '8.2.4 Decoding process for reference picture lists construction' + * of the H264 spec. This function can be used by H264 decoder drivers that + * need to pass a P reference list to the hardware. + */ +void +v4l2_h264_build_p_ref_list(const struct v4l2_h264_reflist_builder *builder, + u8 *reflist) +{ + memcpy(reflist, builder->unordered_reflist, + sizeof(builder->unordered_reflist[0]) * builder->num_valid); + sort_r(reflist, builder->num_valid, sizeof(*reflist), + v4l2_h264_p_ref_list_cmp, NULL, builder); +} +EXPORT_SYMBOL_GPL(v4l2_h264_build_p_ref_list); + +/** + * v4l2_h264_build_b_ref_lists() - Build the B0/B1 reference lists + * + * @builder: reference list builder context + * @b0_reflist: 16-bytes array used to store the B0 reference list. Each entry + * is an index in the DPB + * @b1_reflist: 16-bytes array used to store the B1 reference list. Each entry + * is an index in the DPB + * + * This functions builds the B0/B1 reference lists. This procedure is described + * in section '8.2.4 Decoding process for reference picture lists construction' + * of the H264 spec. This function can be used by H264 decoder drivers that + * need to pass B0/B1 reference lists to the hardware. + */ +void +v4l2_h264_build_b_ref_lists(const struct v4l2_h264_reflist_builder *builder, + u8 *b0_reflist, u8 *b1_reflist) +{ + memcpy(b0_reflist, builder->unordered_reflist, + sizeof(builder->unordered_reflist[0]) * builder->num_valid); + sort_r(b0_reflist, builder->num_valid, sizeof(*b0_reflist), + v4l2_h264_b0_ref_list_cmp, NULL, builder); + + memcpy(b1_reflist, builder->unordered_reflist, + sizeof(builder->unordered_reflist[0]) * builder->num_valid); + sort_r(b1_reflist, builder->num_valid, sizeof(*b1_reflist), + v4l2_h264_b1_ref_list_cmp, NULL, builder); + + if (builder->num_valid > 1 && + !memcmp(b1_reflist, b0_reflist, builder->num_valid)) + swap(b1_reflist[0], b1_reflist[1]); +} +EXPORT_SYMBOL_GPL(v4l2_h264_build_b_ref_lists); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("V4L2 H264 Helpers"); +MODULE_AUTHOR("Boris Brezillon "); diff --git a/include/media/h264-ctrls.h b/include/media/h264-ctrls.h index 1c6ff7d63bca5..080fd1293c42c 100644 --- a/include/media/h264-ctrls.h +++ b/include/media/h264-ctrls.h @@ -13,6 +13,12 @@ #include +/* + * Maximum DPB size, as specified by section 'A.3.1 Level limits + * common to the Baseline, Main, and Extended profiles'. + */ +#define V4L2_H264_NUM_DPB_ENTRIES 16 + /* Our pixel format isn't stable at the moment */ #define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */ @@ -201,7 +207,7 @@ struct v4l2_h264_dpb_entry { #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 struct v4l2_ctrl_h264_decode_params { - struct v4l2_h264_dpb_entry dpb[16]; + struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]; __u16 num_slices; __u16 nal_ref_idc; __s32 top_field_order_cnt; diff --git a/include/media/v4l2-h264.h b/include/media/v4l2-h264.h new file mode 100644 index 0000000000000..bc9ebb560ccfd --- /dev/null +++ b/include/media/v4l2-h264.h @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Helper functions for H264 codecs. + * + * Copyright (c) 2019 Collabora, Ltd. + * + * Author: Boris Brezillon + */ + +#ifndef _MEDIA_V4L2_H264_H +#define _MEDIA_V4L2_H264_H + +#include + +/** + * struct v4l2_h264_reflist_builder - Reference list builder object + * + * @refs.pic_order_count: reference picture order count + * @refs.frame_num: reference frame number + * @refs.pic_num: reference picture number + * @refs.longterm: set to true for a long term reference + * @refs: array of references + * @cur_pic_order_count: picture order count of the frame being decoded + * @unordered_reflist: unordered list of references. Will be used to generate + * ordered P/B0/B1 lists + * @num_valid: number of valid references in the refs array + * + * This object stores the context of the P/B0/B1 reference list builder. + * This procedure is described in section '8.2.4 Decoding process for reference + * picture lists construction' of the H264 spec. + */ +struct v4l2_h264_reflist_builder { + struct { + s32 pic_order_count; + int frame_num; + u16 pic_num; + u16 longterm : 1; + } refs[V4L2_H264_NUM_DPB_ENTRIES]; + s32 cur_pic_order_count; + u8 unordered_reflist[V4L2_H264_NUM_DPB_ENTRIES]; + u8 num_valid; +}; + +void +v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, + const struct v4l2_ctrl_h264_decode_params *dec_params, + const struct v4l2_ctrl_h264_slice_params *slice_params, + const struct v4l2_ctrl_h264_sps *sps, + const struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]); + +/** + * v4l2_h264_build_b_ref_lists() - Build the B0/B1 reference lists + * + * @builder: reference list builder context + * @b0_reflist: 16-bytes array used to store the B0 reference list. Each entry + * is an index in the DPB + * @b1_reflist: 16-bytes array used to store the B1 reference list. Each entry + * is an index in the DPB + * + * This functions builds the B0/B1 reference lists. This procedure is described + * in section '8.2.4 Decoding process for reference picture lists construction' + * of the H264 spec. This function can be used by H264 decoder drivers that + * need to pass B0/B1 reference lists to the hardware. + */ +void +v4l2_h264_build_b_ref_lists(const struct v4l2_h264_reflist_builder *builder, + u8 *b0_reflist, u8 *b1_reflist); + +/** + * v4l2_h264_build_b_ref_lists() - Build the P reference list + * + * @builder: reference list builder context + * @p_reflist: 16-bytes array used to store the P reference list. Each entry + * is an index in the DPB + * + * This functions builds the P reference lists. This procedure is describe in + * section '8.2.4 Decoding process for reference picture lists construction' + * of the H264 spec. This function can be used by H264 decoder drivers that + * need to pass a P reference list to the hardware. + */ +void +v4l2_h264_build_p_ref_list(const struct v4l2_h264_reflist_builder *builder, + u8 *reflist); + +#endif /* _MEDIA_V4L2_H264_H */ -- GitLab From b5218cf40c1e030fa402594c845113a989d6e942 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sat, 4 Apr 2020 00:13:42 +0200 Subject: [PATCH 212/503] media: hantro: h264: Use the generic H264 reflist builder Now that the core provides generic reflist builders, we can use them instead of implementing our own. Signed-off-by: Boris Brezillon Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/hantro/Kconfig | 1 + drivers/staging/media/hantro/hantro_h264.c | 237 +-------------------- 2 files changed, 9 insertions(+), 229 deletions(-) diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig index 68e5b06cdab7c..5b6cf9f62b1ae 100644 --- a/drivers/staging/media/hantro/Kconfig +++ b/drivers/staging/media/hantro/Kconfig @@ -8,6 +8,7 @@ config VIDEO_HANTRO select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC select V4L2_MEM2MEM_DEV + select V4L2_H264 help Support for the Hantro IP based Video Processing Units present on Rockchip and NXP i.MX8M SoCs, which accelerate video and image diff --git a/drivers/staging/media/hantro/hantro_h264.c b/drivers/staging/media/hantro/hantro_h264.c index f2d3e81fb6ce8..d561f125085a7 100644 --- a/drivers/staging/media/hantro/hantro_h264.c +++ b/drivers/staging/media/hantro/hantro_h264.c @@ -11,7 +11,7 @@ */ #include -#include +#include #include #include "hantro.h" @@ -240,229 +240,6 @@ static void prepare_table(struct hantro_ctx *ctx) reorder_scaling_list(ctx); } -struct hantro_h264_reflist_builder { - const struct v4l2_h264_dpb_entry *dpb; - s32 pocs[HANTRO_H264_DPB_SIZE]; - u8 unordered_reflist[HANTRO_H264_DPB_SIZE]; - int frame_nums[HANTRO_H264_DPB_SIZE]; - s32 curpoc; - u8 num_valid; -}; - -static s32 get_poc(enum v4l2_field field, s32 top_field_order_cnt, - s32 bottom_field_order_cnt) -{ - switch (field) { - case V4L2_FIELD_TOP: - return top_field_order_cnt; - case V4L2_FIELD_BOTTOM: - return bottom_field_order_cnt; - default: - break; - } - - return min(top_field_order_cnt, bottom_field_order_cnt); -} - -static void -init_reflist_builder(struct hantro_ctx *ctx, - struct hantro_h264_reflist_builder *b) -{ - const struct v4l2_ctrl_h264_slice_params *slice_params; - const struct v4l2_ctrl_h264_decode_params *dec_param; - const struct v4l2_ctrl_h264_sps *sps; - struct vb2_v4l2_buffer *buf = hantro_get_dst_buf(ctx); - const struct v4l2_h264_dpb_entry *dpb = ctx->h264_dec.dpb; - struct vb2_queue *cap_q = &ctx->fh.m2m_ctx->cap_q_ctx.q; - int cur_frame_num, max_frame_num; - unsigned int i; - - dec_param = ctx->h264_dec.ctrls.decode; - slice_params = &ctx->h264_dec.ctrls.slices[0]; - sps = ctx->h264_dec.ctrls.sps; - max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4); - cur_frame_num = slice_params->frame_num; - - memset(b, 0, sizeof(*b)); - b->dpb = dpb; - b->curpoc = get_poc(buf->field, dec_param->top_field_order_cnt, - dec_param->bottom_field_order_cnt); - - for (i = 0; i < ARRAY_SIZE(ctx->h264_dec.dpb); i++) { - int buf_idx; - - if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) - continue; - - buf_idx = vb2_find_timestamp(cap_q, dpb[i].reference_ts, 0); - if (buf_idx < 0) - continue; - - buf = to_vb2_v4l2_buffer(vb2_get_buffer(cap_q, buf_idx)); - - /* - * Handle frame_num wraparound as described in section - * '8.2.4.1 Decoding process for picture numbers' of the spec. - * TODO: This logic will have to be adjusted when we start - * supporting interlaced content. - */ - if (dpb[i].frame_num > cur_frame_num) - b->frame_nums[i] = (int)dpb[i].frame_num - max_frame_num; - else - b->frame_nums[i] = dpb[i].frame_num; - - b->pocs[i] = get_poc(buf->field, dpb[i].top_field_order_cnt, - dpb[i].bottom_field_order_cnt); - b->unordered_reflist[b->num_valid] = i; - b->num_valid++; - } - - for (i = b->num_valid; i < ARRAY_SIZE(ctx->h264_dec.dpb); i++) - b->unordered_reflist[i] = i; -} - -static int p_ref_list_cmp(const void *ptra, const void *ptrb, const void *data) -{ - const struct hantro_h264_reflist_builder *builder = data; - const struct v4l2_h264_dpb_entry *a, *b; - u8 idxa, idxb; - - idxa = *((u8 *)ptra); - idxb = *((u8 *)ptrb); - a = &builder->dpb[idxa]; - b = &builder->dpb[idxb]; - - if ((a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) != - (b->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) { - /* Short term pics firt. */ - if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) - return -1; - else - return 1; - } - - /* - * Short term pics in descending pic num order, long term ones in - * ascending order. - */ - if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) - return HANTRO_CMP(builder->frame_nums[idxb], - builder->frame_nums[idxa]); - - return HANTRO_CMP(a->pic_num, b->pic_num); -} - -static int b0_ref_list_cmp(const void *ptra, const void *ptrb, const void *data) -{ - const struct hantro_h264_reflist_builder *builder = data; - const struct v4l2_h264_dpb_entry *a, *b; - s32 poca, pocb; - u8 idxa, idxb; - - idxa = *((u8 *)ptra); - idxb = *((u8 *)ptrb); - a = &builder->dpb[idxa]; - b = &builder->dpb[idxb]; - - if ((a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) != - (b->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) { - /* Short term pics firt. */ - if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) - return -1; - else - return 1; - } - - /* Long term pics in ascending pic num order. */ - if (a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) - return HANTRO_CMP(a->pic_num, b->pic_num); - - poca = builder->pocs[idxa]; - pocb = builder->pocs[idxb]; - - /* - * Short term pics with POC < cur POC first in POC descending order - * followed by short term pics with POC > cur POC in POC ascending - * order. - */ - if ((poca < builder->curpoc) != (pocb < builder->curpoc)) - return HANTRO_CMP(poca, pocb); - else if (poca < builder->curpoc) - return HANTRO_CMP(pocb, poca); - - return HANTRO_CMP(poca, pocb); -} - -static int b1_ref_list_cmp(const void *ptra, const void *ptrb, const void *data) -{ - const struct hantro_h264_reflist_builder *builder = data; - const struct v4l2_h264_dpb_entry *a, *b; - s32 poca, pocb; - u8 idxa, idxb; - - idxa = *((u8 *)ptra); - idxb = *((u8 *)ptrb); - a = &builder->dpb[idxa]; - b = &builder->dpb[idxb]; - - if ((a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) != - (b->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) { - /* Short term pics firt. */ - if (!(a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM)) - return -1; - else - return 1; - } - - /* Long term pics in ascending pic num order. */ - if (a->flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) - return HANTRO_CMP(a->pic_num, b->pic_num); - - poca = builder->pocs[idxa]; - pocb = builder->pocs[idxb]; - - /* - * Short term pics with POC > cur POC first in POC ascending order - * followed by short term pics with POC < cur POC in POC descending - * order. - */ - if ((poca < builder->curpoc) != (pocb < builder->curpoc)) - return HANTRO_CMP(pocb, poca); - else if (poca < builder->curpoc) - return HANTRO_CMP(pocb, poca); - - return HANTRO_CMP(poca, pocb); -} - -static void -build_p_ref_list(const struct hantro_h264_reflist_builder *builder, - u8 *reflist) -{ - memcpy(reflist, builder->unordered_reflist, - sizeof(builder->unordered_reflist)); - sort_r(reflist, builder->num_valid, sizeof(*reflist), - p_ref_list_cmp, NULL, builder); -} - -static void -build_b_ref_lists(const struct hantro_h264_reflist_builder *builder, - u8 *b0_reflist, u8 *b1_reflist) -{ - memcpy(b0_reflist, builder->unordered_reflist, - sizeof(builder->unordered_reflist)); - sort_r(b0_reflist, builder->num_valid, sizeof(*b0_reflist), - b0_ref_list_cmp, NULL, builder); - - memcpy(b1_reflist, builder->unordered_reflist, - sizeof(builder->unordered_reflist)); - sort_r(b1_reflist, builder->num_valid, sizeof(*b1_reflist), - b1_ref_list_cmp, NULL, builder); - - if (builder->num_valid > 1 && - !memcmp(b1_reflist, b0_reflist, builder->num_valid)) - swap(b1_reflist[0], b1_reflist[1]); -} - static bool dpb_entry_match(const struct v4l2_h264_dpb_entry *a, const struct v4l2_h264_dpb_entry *b) { @@ -560,7 +337,7 @@ int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx) { struct hantro_h264_dec_hw_ctx *h264_ctx = &ctx->h264_dec; struct hantro_h264_dec_ctrls *ctrls = &h264_ctx->ctrls; - struct hantro_h264_reflist_builder reflist_builder; + struct v4l2_h264_reflist_builder reflist_builder; hantro_start_prepare_run(ctx); @@ -596,10 +373,12 @@ int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx) prepare_table(ctx); /* Build the P/B{0,1} ref lists. */ - init_reflist_builder(ctx, &reflist_builder); - build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); - build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, - h264_ctx->reflists.b1); + v4l2_h264_init_reflist_builder(&reflist_builder, ctrls->decode, + &ctrls->slices[0], ctrls->sps, + ctx->h264_dec.dpb); + v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); + v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, + h264_ctx->reflists.b1); return 0; } -- GitLab From d6b50a96d3373d038c14eb7427acbeb5fa66ec33 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sat, 4 Apr 2020 00:13:43 +0200 Subject: [PATCH 213/503] media: dt-bindings: rockchip: Document RK3399 Video Decoder bindings Document the Rockchip RK3399 Video Decoder bindings. Signed-off-by: Boris Brezillon Reviewed-by: Rob Herring Signed-off-by: Ezequiel Garcia Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../bindings/media/rockchip,vdec.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip,vdec.yaml diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml new file mode 100644 index 0000000000000..0c68cdad9a31c --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,vdec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Video Decoder (VDec) Device Tree Bindings + +maintainers: + - Heiko Stuebner + +description: |- + The Rockchip rk3399 has a stateless Video Decoder that can decodes H.264, + HEVC an VP9 streams. + +properties: + compatible: + const: rockchip,rk3399-vdec + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: The Video Decoder AXI interface clock + - description: The Video Decoder AHB interface clock + - description: The Video Decoded CABAC clock + - description: The Video Decoder core clock + + clock-names: + items: + - const: axi + - const: ahb + - const: cabac + - const: core + + power-domains: + maxItems: 1 + + iommus: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + +additionalProperties: false + +examples: + - | + #include + #include + #include + + vdec: video-codec@ff660000 { + compatible = "rockchip,rk3399-vdec"; + reg = <0x0 0xff660000 0x0 0x400>; + interrupts = ; + clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, + <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; + clock-names = "axi", "ahb", "cabac", "core"; + power-domains = <&power RK3399_PD_VDU>; + iommus = <&vdec_mmu>; + }; + +... -- GitLab From cd33c830448baf7b1e94da72eca069e3e1d050c9 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sat, 4 Apr 2020 00:13:44 +0200 Subject: [PATCH 214/503] media: rkvdec: Add the rkvdec driver The rockchip vdec block is a stateless decoder that's able to decode H264, HEVC and VP9 content. This commit adds the core infrastructure and the H264 backend. Support for VP9 and HEVS will be added later on. [mchehab+huawei@kernel.org: select MEDIA_CONTROLLER and REQUEST_API] Signed-off-by: Boris Brezillon Signed-off-by: Ezequiel Garcia Tested-by: Nicolas Dufresne Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 7 + drivers/staging/media/Kconfig | 2 + drivers/staging/media/Makefile | 1 + drivers/staging/media/rkvdec/Kconfig | 16 + drivers/staging/media/rkvdec/Makefile | 3 + drivers/staging/media/rkvdec/TODO | 11 + drivers/staging/media/rkvdec/rkvdec-h264.c | 1156 ++++++++++++++++++++ drivers/staging/media/rkvdec/rkvdec-regs.h | 223 ++++ drivers/staging/media/rkvdec/rkvdec.c | 1103 +++++++++++++++++++ drivers/staging/media/rkvdec/rkvdec.h | 121 ++ 10 files changed, 2643 insertions(+) create mode 100644 drivers/staging/media/rkvdec/Kconfig create mode 100644 drivers/staging/media/rkvdec/Makefile create mode 100644 drivers/staging/media/rkvdec/TODO create mode 100644 drivers/staging/media/rkvdec/rkvdec-h264.c create mode 100644 drivers/staging/media/rkvdec/rkvdec-regs.h create mode 100644 drivers/staging/media/rkvdec/rkvdec.c create mode 100644 drivers/staging/media/rkvdec/rkvdec.h diff --git a/MAINTAINERS b/MAINTAINERS index 7ad334f8b2e60..a796ee586e2f0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14465,6 +14465,13 @@ F: Documentation/ABI/*/sysfs-driver-hid-roccat* F: drivers/hid/hid-roccat* F: include/linux/hid-roccat* +ROCKCHIP VIDEO DECODER DRIVER +M: Ezequiel Garcia +L: linux-media@vger.kernel.org +S: Maintained +F: drivers/staging/media/rkvdec/ +F: Documentation/devicetree/bindings/media/rockchip,vdec.yaml + ROCKCHIP ISP V1 DRIVER M: Helen Koike L: linux-media@vger.kernel.org diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index e59a846bc909c..c6b4fb5d48b44 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -30,6 +30,8 @@ source "drivers/staging/media/meson/vdec/Kconfig" source "drivers/staging/media/omap4iss/Kconfig" +source "drivers/staging/media/rkvdec/Kconfig" + source "drivers/staging/media/sunxi/Kconfig" source "drivers/staging/media/tegra-vde/Kconfig" diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index 23c682461b622..8b24be1a70765 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_VIDEO_ALLEGRO_DVT) += allegro-dvt/ obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ obj-$(CONFIG_VIDEO_MESON_VDEC) += meson/vdec/ obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ +obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rkvdec/ obj-$(CONFIG_VIDEO_SUNXI) += sunxi/ obj-$(CONFIG_TEGRA_VDE) += tegra-vde/ obj-$(CONFIG_VIDEO_HANTRO) += hantro/ diff --git a/drivers/staging/media/rkvdec/Kconfig b/drivers/staging/media/rkvdec/Kconfig new file mode 100644 index 0000000000000..c02199b5e0fdb --- /dev/null +++ b/drivers/staging/media/rkvdec/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0 +config VIDEO_ROCKCHIP_VDEC + tristate "Rockchip Video Decoder driver" + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on VIDEO_DEV && VIDEO_V4L2 + select MEDIA_CONTROLLER + select MEDIA_CONTROLLER_REQUEST_API + select VIDEOBUF2_DMA_CONTIG + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + select V4L2_H264 + help + Support for the Rockchip Video Decoder IP present on Rockchip SoCs, + which accelerates video decoding. + To compile this driver as a module, choose M here: the module + will be called rockchip-vdec. diff --git a/drivers/staging/media/rkvdec/Makefile b/drivers/staging/media/rkvdec/Makefile new file mode 100644 index 0000000000000..c08fed0a39f99 --- /dev/null +++ b/drivers/staging/media/rkvdec/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o + +rockchip-vdec-y += rkvdec.o rkvdec-h264.o diff --git a/drivers/staging/media/rkvdec/TODO b/drivers/staging/media/rkvdec/TODO new file mode 100644 index 0000000000000..e0f0f12f0ac57 --- /dev/null +++ b/drivers/staging/media/rkvdec/TODO @@ -0,0 +1,11 @@ +* Support for VP9 is planned for this driver. + + Given the V4L controls for those CODECs will be part of + the uABI, it will be required to have the driver in staging. + + For this reason, we are keeping this driver in staging for now. + +* Evaluate introducing a helper to consolidate duplicated + code in rkvdec_request_validate and cedrus_request_validate. + The helper needs to the driver private data associated with + the videobuf2 queue, from a media request. diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c new file mode 100644 index 0000000000000..cd4980d06be7e --- /dev/null +++ b/drivers/staging/media/rkvdec/rkvdec-h264.c @@ -0,0 +1,1156 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Video Decoder H264 backend + * + * Copyright (C) 2019 Collabora, Ltd. + * Boris Brezillon + * + * Copyright (C) 2016 Rockchip Electronics Co., Ltd. + * Jeffy Chen + */ + +#include +#include + +#include "rkvdec.h" +#include "rkvdec-regs.h" + +/* Size with u32 units. */ +#define RKV_CABAC_INIT_BUFFER_SIZE (3680 + 128) +#define RKV_RPS_SIZE ((128 + 128) / 4) +#define RKV_SCALING_LIST_SIZE (6 * 16 + 6 * 64 + 128) +#define RKV_ERROR_INFO_SIZE (256 * 144 * 4) + +#define RKVDEC_NUM_REFLIST 3 + +struct rkvdec_sps_pps_packet { + u32 info[8]; +}; + +struct rkvdec_ps_field { + u16 offset; + u8 len; +}; + +#define PS_FIELD(_offset, _len) \ + ((struct rkvdec_ps_field){ _offset, _len }) + +#define SEQ_PARAMETER_SET_ID PS_FIELD(0, 4) +#define PROFILE_IDC PS_FIELD(4, 8) +#define CONSTRAINT_SET3_FLAG PS_FIELD(12, 1) +#define CHROMA_FORMAT_IDC PS_FIELD(13, 2) +#define BIT_DEPTH_LUMA PS_FIELD(15, 3) +#define BIT_DEPTH_CHROMA PS_FIELD(18, 3) +#define QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG PS_FIELD(21, 1) +#define LOG2_MAX_FRAME_NUM_MINUS4 PS_FIELD(22, 4) +#define MAX_NUM_REF_FRAMES PS_FIELD(26, 5) +#define PIC_ORDER_CNT_TYPE PS_FIELD(31, 2) +#define LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4 PS_FIELD(33, 4) +#define DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG PS_FIELD(37, 1) +#define PIC_WIDTH_IN_MBS PS_FIELD(38, 9) +#define PIC_HEIGHT_IN_MBS PS_FIELD(47, 9) +#define FRAME_MBS_ONLY_FLAG PS_FIELD(56, 1) +#define MB_ADAPTIVE_FRAME_FIELD_FLAG PS_FIELD(57, 1) +#define DIRECT_8X8_INFERENCE_FLAG PS_FIELD(58, 1) +#define MVC_EXTENSION_ENABLE PS_FIELD(59, 1) +#define NUM_VIEWS PS_FIELD(60, 2) +#define VIEW_ID(i) PS_FIELD(62 + ((i) * 10), 10) +#define NUM_ANCHOR_REFS_L(i) PS_FIELD(82 + ((i) * 11), 1) +#define ANCHOR_REF_L(i) PS_FIELD(83 + ((i) * 11), 10) +#define NUM_NON_ANCHOR_REFS_L(i) PS_FIELD(104 + ((i) * 11), 1) +#define NON_ANCHOR_REFS_L(i) PS_FIELD(105 + ((i) * 11), 10) +#define PIC_PARAMETER_SET_ID PS_FIELD(128, 8) +#define PPS_SEQ_PARAMETER_SET_ID PS_FIELD(136, 5) +#define ENTROPY_CODING_MODE_FLAG PS_FIELD(141, 1) +#define BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT_FLAG PS_FIELD(142, 1) +#define NUM_REF_IDX_L_DEFAULT_ACTIVE_MINUS1(i) PS_FIELD(143 + ((i) * 5), 5) +#define WEIGHTED_PRED_FLAG PS_FIELD(153, 1) +#define WEIGHTED_BIPRED_IDC PS_FIELD(154, 2) +#define PIC_INIT_QP_MINUS26 PS_FIELD(156, 7) +#define PIC_INIT_QS_MINUS26 PS_FIELD(163, 6) +#define CHROMA_QP_INDEX_OFFSET PS_FIELD(169, 5) +#define DEBLOCKING_FILTER_CONTROL_PRESENT_FLAG PS_FIELD(174, 1) +#define CONSTRAINED_INTRA_PRED_FLAG PS_FIELD(175, 1) +#define REDUNDANT_PIC_CNT_PRESENT PS_FIELD(176, 1) +#define TRANSFORM_8X8_MODE_FLAG PS_FIELD(177, 1) +#define SECOND_CHROMA_QP_INDEX_OFFSET PS_FIELD(178, 5) +#define SCALING_LIST_ENABLE_FLAG PS_FIELD(183, 1) +#define SCALING_LIST_ADDRESS PS_FIELD(184, 32) +#define IS_LONG_TERM(i) PS_FIELD(216 + (i), 1) + +#define DPB_OFFS(i, j) (288 + ((j) * 32 * 7) + ((i) * 7)) +#define DPB_INFO(i, j) PS_FIELD(DPB_OFFS(i, j), 5) +#define BOTTOM_FLAG(i, j) PS_FIELD(DPB_OFFS(i, j) + 5, 1) +#define VIEW_INDEX_OFF(i, j) PS_FIELD(DPB_OFFS(i, j) + 6, 1) + +/* Data structure describing auxiliary buffer format. */ +struct rkvdec_h264_priv_tbl { + s8 cabac_table[4][464][2]; + u8 scaling_list[RKV_SCALING_LIST_SIZE]; + u32 rps[RKV_RPS_SIZE]; + struct rkvdec_sps_pps_packet param_set[256]; + u8 err_info[RKV_ERROR_INFO_SIZE]; +}; + +#define RKVDEC_H264_DPB_SIZE 16 + +struct rkvdec_h264_reflists { + u8 p[RKVDEC_H264_DPB_SIZE]; + u8 b0[RKVDEC_H264_DPB_SIZE]; + u8 b1[RKVDEC_H264_DPB_SIZE]; + u8 num_valid; +}; + +struct rkvdec_h264_run { + struct rkvdec_run base; + const struct v4l2_ctrl_h264_decode_params *decode_params; + const struct v4l2_ctrl_h264_slice_params *slices_params; + const struct v4l2_ctrl_h264_sps *sps; + const struct v4l2_ctrl_h264_pps *pps; + const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix; +}; + +struct rkvdec_h264_ctx { + struct rkvdec_aux_buf priv_tbl; + struct rkvdec_h264_reflists reflists; +}; + +#define CABAC_ENTRY(ctxidx, idc0_m, idc0_n, idc1_m, idc1_n, \ + idc2_m, idc2_n, intra_m, intra_n) \ + [0][(ctxidx)] = {idc0_m, idc0_n}, \ + [1][(ctxidx)] = {idc1_m, idc1_n}, \ + [2][(ctxidx)] = {idc2_m, idc2_n}, \ + [3][(ctxidx)] = {intra_m, intra_n} + +/* + * Constant CABAC table. + * Built from the tables described in section '9.3.1.1 Initialisation process + * for context variables' of the H264 spec. + */ +static const s8 rkvdec_h264_cabac_table[4][464][2] = { + /* Table 9-12 – Values of variables m and n for ctxIdx from 0 to 10 */ + CABAC_ENTRY(0, 20, -15, 20, -15, 20, -15, 20, -15), + CABAC_ENTRY(1, 2, 54, 2, 54, 2, 54, 2, 54), + CABAC_ENTRY(2, 3, 74, 3, 74, 3, 74, 3, 74), + CABAC_ENTRY(3, 20, -15, 20, -15, 20, -15, 20, -15), + CABAC_ENTRY(4, 2, 54, 2, 54, 2, 54, 2, 54), + CABAC_ENTRY(5, 3, 74, 3, 74, 3, 74, 3, 74), + CABAC_ENTRY(6, -28, 127, -28, 127, -28, 127, -28, 127), + CABAC_ENTRY(7, -23, 104, -23, 104, -23, 104, -23, 104), + CABAC_ENTRY(8, -6, 53, -6, 53, -6, 53, -6, 53), + CABAC_ENTRY(9, -1, 54, -1, 54, -1, 54, -1, 54), + CABAC_ENTRY(10, 7, 51, 7, 51, 7, 51, 7, 51), + + /* Table 9-13 – Values of variables m and n for ctxIdx from 11 to 23 */ + CABAC_ENTRY(11, 23, 33, 22, 25, 29, 16, 0, 0), + CABAC_ENTRY(12, 23, 2, 34, 0, 25, 0, 0, 0), + CABAC_ENTRY(13, 21, 0, 16, 0, 14, 0, 0, 0), + CABAC_ENTRY(14, 1, 9, -2, 9, -10, 51, 0, 0), + CABAC_ENTRY(15, 0, 49, 4, 41, -3, 62, 0, 0), + CABAC_ENTRY(16, -37, 118, -29, 118, -27, 99, 0, 0), + CABAC_ENTRY(17, 5, 57, 2, 65, 26, 16, 0, 0), + CABAC_ENTRY(18, -13, 78, -6, 71, -4, 85, 0, 0), + CABAC_ENTRY(19, -11, 65, -13, 79, -24, 102, 0, 0), + CABAC_ENTRY(20, 1, 62, 5, 52, 5, 57, 0, 0), + CABAC_ENTRY(21, 12, 49, 9, 50, 6, 57, 0, 0), + CABAC_ENTRY(22, -4, 73, -3, 70, -17, 73, 0, 0), + CABAC_ENTRY(23, 17, 50, 10, 54, 14, 57, 0, 0), + + /* Table 9-14 – Values of variables m and n for ctxIdx from 24 to 39 */ + CABAC_ENTRY(24, 18, 64, 26, 34, 20, 40, 0, 0), + CABAC_ENTRY(25, 9, 43, 19, 22, 20, 10, 0, 0), + CABAC_ENTRY(26, 29, 0, 40, 0, 29, 0, 0, 0), + CABAC_ENTRY(27, 26, 67, 57, 2, 54, 0, 0, 0), + CABAC_ENTRY(28, 16, 90, 41, 36, 37, 42, 0, 0), + CABAC_ENTRY(29, 9, 104, 26, 69, 12, 97, 0, 0), + CABAC_ENTRY(30, -46, 127, -45, 127, -32, 127, 0, 0), + CABAC_ENTRY(31, -20, 104, -15, 101, -22, 117, 0, 0), + CABAC_ENTRY(32, 1, 67, -4, 76, -2, 74, 0, 0), + CABAC_ENTRY(33, -13, 78, -6, 71, -4, 85, 0, 0), + CABAC_ENTRY(34, -11, 65, -13, 79, -24, 102, 0, 0), + CABAC_ENTRY(35, 1, 62, 5, 52, 5, 57, 0, 0), + CABAC_ENTRY(36, -6, 86, 6, 69, -6, 93, 0, 0), + CABAC_ENTRY(37, -17, 95, -13, 90, -14, 88, 0, 0), + CABAC_ENTRY(38, -6, 61, 0, 52, -6, 44, 0, 0), + CABAC_ENTRY(39, 9, 45, 8, 43, 4, 55, 0, 0), + + /* Table 9-15 – Values of variables m and n for ctxIdx from 40 to 53 */ + CABAC_ENTRY(40, -3, 69, -2, 69, -11, 89, 0, 0), + CABAC_ENTRY(41, -6, 81, -5, 82, -15, 103, 0, 0), + CABAC_ENTRY(42, -11, 96, -10, 96, -21, 116, 0, 0), + CABAC_ENTRY(43, 6, 55, 2, 59, 19, 57, 0, 0), + CABAC_ENTRY(44, 7, 67, 2, 75, 20, 58, 0, 0), + CABAC_ENTRY(45, -5, 86, -3, 87, 4, 84, 0, 0), + CABAC_ENTRY(46, 2, 88, -3, 100, 6, 96, 0, 0), + CABAC_ENTRY(47, 0, 58, 1, 56, 1, 63, 0, 0), + CABAC_ENTRY(48, -3, 76, -3, 74, -5, 85, 0, 0), + CABAC_ENTRY(49, -10, 94, -6, 85, -13, 106, 0, 0), + CABAC_ENTRY(50, 5, 54, 0, 59, 5, 63, 0, 0), + CABAC_ENTRY(51, 4, 69, -3, 81, 6, 75, 0, 0), + CABAC_ENTRY(52, -3, 81, -7, 86, -3, 90, 0, 0), + CABAC_ENTRY(53, 0, 88, -5, 95, -1, 101, 0, 0), + + /* Table 9-16 – Values of variables m and n for ctxIdx from 54 to 59 */ + CABAC_ENTRY(54, -7, 67, -1, 66, 3, 55, 0, 0), + CABAC_ENTRY(55, -5, 74, -1, 77, -4, 79, 0, 0), + CABAC_ENTRY(56, -4, 74, 1, 70, -2, 75, 0, 0), + CABAC_ENTRY(57, -5, 80, -2, 86, -12, 97, 0, 0), + CABAC_ENTRY(58, -7, 72, -5, 72, -7, 50, 0, 0), + CABAC_ENTRY(59, 1, 58, 0, 61, 1, 60, 0, 0), + + /* Table 9-17 – Values of variables m and n for ctxIdx from 60 to 69 */ + CABAC_ENTRY(60, 0, 41, 0, 41, 0, 41, 0, 41), + CABAC_ENTRY(61, 0, 63, 0, 63, 0, 63, 0, 63), + CABAC_ENTRY(62, 0, 63, 0, 63, 0, 63, 0, 63), + CABAC_ENTRY(63, 0, 63, 0, 63, 0, 63, 0, 63), + CABAC_ENTRY(64, -9, 83, -9, 83, -9, 83, -9, 83), + CABAC_ENTRY(65, 4, 86, 4, 86, 4, 86, 4, 86), + CABAC_ENTRY(66, 0, 97, 0, 97, 0, 97, 0, 97), + CABAC_ENTRY(67, -7, 72, -7, 72, -7, 72, -7, 72), + CABAC_ENTRY(68, 13, 41, 13, 41, 13, 41, 13, 41), + CABAC_ENTRY(69, 3, 62, 3, 62, 3, 62, 3, 62), + + /* Table 9-18 – Values of variables m and n for ctxIdx from 70 to 104 */ + CABAC_ENTRY(70, 0, 45, 13, 15, 7, 34, 0, 11), + CABAC_ENTRY(71, -4, 78, 7, 51, -9, 88, 1, 55), + CABAC_ENTRY(72, -3, 96, 2, 80, -20, 127, 0, 69), + CABAC_ENTRY(73, -27, 126, -39, 127, -36, 127, -17, 127), + CABAC_ENTRY(74, -28, 98, -18, 91, -17, 91, -13, 102), + CABAC_ENTRY(75, -25, 101, -17, 96, -14, 95, 0, 82), + CABAC_ENTRY(76, -23, 67, -26, 81, -25, 84, -7, 74), + CABAC_ENTRY(77, -28, 82, -35, 98, -25, 86, -21, 107), + CABAC_ENTRY(78, -20, 94, -24, 102, -12, 89, -27, 127), + CABAC_ENTRY(79, -16, 83, -23, 97, -17, 91, -31, 127), + CABAC_ENTRY(80, -22, 110, -27, 119, -31, 127, -24, 127), + CABAC_ENTRY(81, -21, 91, -24, 99, -14, 76, -18, 95), + CABAC_ENTRY(82, -18, 102, -21, 110, -18, 103, -27, 127), + CABAC_ENTRY(83, -13, 93, -18, 102, -13, 90, -21, 114), + CABAC_ENTRY(84, -29, 127, -36, 127, -37, 127, -30, 127), + CABAC_ENTRY(85, -7, 92, 0, 80, 11, 80, -17, 123), + CABAC_ENTRY(86, -5, 89, -5, 89, 5, 76, -12, 115), + CABAC_ENTRY(87, -7, 96, -7, 94, 2, 84, -16, 122), + CABAC_ENTRY(88, -13, 108, -4, 92, 5, 78, -11, 115), + CABAC_ENTRY(89, -3, 46, 0, 39, -6, 55, -12, 63), + CABAC_ENTRY(90, -1, 65, 0, 65, 4, 61, -2, 68), + CABAC_ENTRY(91, -1, 57, -15, 84, -14, 83, -15, 84), + CABAC_ENTRY(92, -9, 93, -35, 127, -37, 127, -13, 104), + CABAC_ENTRY(93, -3, 74, -2, 73, -5, 79, -3, 70), + CABAC_ENTRY(94, -9, 92, -12, 104, -11, 104, -8, 93), + CABAC_ENTRY(95, -8, 87, -9, 91, -11, 91, -10, 90), + CABAC_ENTRY(96, -23, 126, -31, 127, -30, 127, -30, 127), + CABAC_ENTRY(97, 5, 54, 3, 55, 0, 65, -1, 74), + CABAC_ENTRY(98, 6, 60, 7, 56, -2, 79, -6, 97), + CABAC_ENTRY(99, 6, 59, 7, 55, 0, 72, -7, 91), + CABAC_ENTRY(100, 6, 69, 8, 61, -4, 92, -20, 127), + CABAC_ENTRY(101, -1, 48, -3, 53, -6, 56, -4, 56), + CABAC_ENTRY(102, 0, 68, 0, 68, 3, 68, -5, 82), + CABAC_ENTRY(103, -4, 69, -7, 74, -8, 71, -7, 76), + CABAC_ENTRY(104, -8, 88, -9, 88, -13, 98, -22, 125), + + /* Table 9-19 – Values of variables m and n for ctxIdx from 105 to 165 */ + CABAC_ENTRY(105, -2, 85, -13, 103, -4, 86, -7, 93), + CABAC_ENTRY(106, -6, 78, -13, 91, -12, 88, -11, 87), + CABAC_ENTRY(107, -1, 75, -9, 89, -5, 82, -3, 77), + CABAC_ENTRY(108, -7, 77, -14, 92, -3, 72, -5, 71), + CABAC_ENTRY(109, 2, 54, -8, 76, -4, 67, -4, 63), + CABAC_ENTRY(110, 5, 50, -12, 87, -8, 72, -4, 68), + CABAC_ENTRY(111, -3, 68, -23, 110, -16, 89, -12, 84), + CABAC_ENTRY(112, 1, 50, -24, 105, -9, 69, -7, 62), + CABAC_ENTRY(113, 6, 42, -10, 78, -1, 59, -7, 65), + CABAC_ENTRY(114, -4, 81, -20, 112, 5, 66, 8, 61), + CABAC_ENTRY(115, 1, 63, -17, 99, 4, 57, 5, 56), + CABAC_ENTRY(116, -4, 70, -78, 127, -4, 71, -2, 66), + CABAC_ENTRY(117, 0, 67, -70, 127, -2, 71, 1, 64), + CABAC_ENTRY(118, 2, 57, -50, 127, 2, 58, 0, 61), + CABAC_ENTRY(119, -2, 76, -46, 127, -1, 74, -2, 78), + CABAC_ENTRY(120, 11, 35, -4, 66, -4, 44, 1, 50), + CABAC_ENTRY(121, 4, 64, -5, 78, -1, 69, 7, 52), + CABAC_ENTRY(122, 1, 61, -4, 71, 0, 62, 10, 35), + CABAC_ENTRY(123, 11, 35, -8, 72, -7, 51, 0, 44), + CABAC_ENTRY(124, 18, 25, 2, 59, -4, 47, 11, 38), + CABAC_ENTRY(125, 12, 24, -1, 55, -6, 42, 1, 45), + CABAC_ENTRY(126, 13, 29, -7, 70, -3, 41, 0, 46), + CABAC_ENTRY(127, 13, 36, -6, 75, -6, 53, 5, 44), + CABAC_ENTRY(128, -10, 93, -8, 89, 8, 76, 31, 17), + CABAC_ENTRY(129, -7, 73, -34, 119, -9, 78, 1, 51), + CABAC_ENTRY(130, -2, 73, -3, 75, -11, 83, 7, 50), + CABAC_ENTRY(131, 13, 46, 32, 20, 9, 52, 28, 19), + CABAC_ENTRY(132, 9, 49, 30, 22, 0, 67, 16, 33), + CABAC_ENTRY(133, -7, 100, -44, 127, -5, 90, 14, 62), + CABAC_ENTRY(134, 9, 53, 0, 54, 1, 67, -13, 108), + CABAC_ENTRY(135, 2, 53, -5, 61, -15, 72, -15, 100), + CABAC_ENTRY(136, 5, 53, 0, 58, -5, 75, -13, 101), + CABAC_ENTRY(137, -2, 61, -1, 60, -8, 80, -13, 91), + CABAC_ENTRY(138, 0, 56, -3, 61, -21, 83, -12, 94), + CABAC_ENTRY(139, 0, 56, -8, 67, -21, 64, -10, 88), + CABAC_ENTRY(140, -13, 63, -25, 84, -13, 31, -16, 84), + CABAC_ENTRY(141, -5, 60, -14, 74, -25, 64, -10, 86), + CABAC_ENTRY(142, -1, 62, -5, 65, -29, 94, -7, 83), + CABAC_ENTRY(143, 4, 57, 5, 52, 9, 75, -13, 87), + CABAC_ENTRY(144, -6, 69, 2, 57, 17, 63, -19, 94), + CABAC_ENTRY(145, 4, 57, 0, 61, -8, 74, 1, 70), + CABAC_ENTRY(146, 14, 39, -9, 69, -5, 35, 0, 72), + CABAC_ENTRY(147, 4, 51, -11, 70, -2, 27, -5, 74), + CABAC_ENTRY(148, 13, 68, 18, 55, 13, 91, 18, 59), + CABAC_ENTRY(149, 3, 64, -4, 71, 3, 65, -8, 102), + CABAC_ENTRY(150, 1, 61, 0, 58, -7, 69, -15, 100), + CABAC_ENTRY(151, 9, 63, 7, 61, 8, 77, 0, 95), + CABAC_ENTRY(152, 7, 50, 9, 41, -10, 66, -4, 75), + CABAC_ENTRY(153, 16, 39, 18, 25, 3, 62, 2, 72), + CABAC_ENTRY(154, 5, 44, 9, 32, -3, 68, -11, 75), + CABAC_ENTRY(155, 4, 52, 5, 43, -20, 81, -3, 71), + CABAC_ENTRY(156, 11, 48, 9, 47, 0, 30, 15, 46), + CABAC_ENTRY(157, -5, 60, 0, 44, 1, 7, -13, 69), + CABAC_ENTRY(158, -1, 59, 0, 51, -3, 23, 0, 62), + CABAC_ENTRY(159, 0, 59, 2, 46, -21, 74, 0, 65), + CABAC_ENTRY(160, 22, 33, 19, 38, 16, 66, 21, 37), + CABAC_ENTRY(161, 5, 44, -4, 66, -23, 124, -15, 72), + CABAC_ENTRY(162, 14, 43, 15, 38, 17, 37, 9, 57), + CABAC_ENTRY(163, -1, 78, 12, 42, 44, -18, 16, 54), + CABAC_ENTRY(164, 0, 60, 9, 34, 50, -34, 0, 62), + CABAC_ENTRY(165, 9, 69, 0, 89, -22, 127, 12, 72), + + /* Table 9-20 – Values of variables m and n for ctxIdx from 166 to 226 */ + CABAC_ENTRY(166, 11, 28, 4, 45, 4, 39, 24, 0), + CABAC_ENTRY(167, 2, 40, 10, 28, 0, 42, 15, 9), + CABAC_ENTRY(168, 3, 44, 10, 31, 7, 34, 8, 25), + CABAC_ENTRY(169, 0, 49, 33, -11, 11, 29, 13, 18), + CABAC_ENTRY(170, 0, 46, 52, -43, 8, 31, 15, 9), + CABAC_ENTRY(171, 2, 44, 18, 15, 6, 37, 13, 19), + CABAC_ENTRY(172, 2, 51, 28, 0, 7, 42, 10, 37), + CABAC_ENTRY(173, 0, 47, 35, -22, 3, 40, 12, 18), + CABAC_ENTRY(174, 4, 39, 38, -25, 8, 33, 6, 29), + CABAC_ENTRY(175, 2, 62, 34, 0, 13, 43, 20, 33), + CABAC_ENTRY(176, 6, 46, 39, -18, 13, 36, 15, 30), + CABAC_ENTRY(177, 0, 54, 32, -12, 4, 47, 4, 45), + CABAC_ENTRY(178, 3, 54, 102, -94, 3, 55, 1, 58), + CABAC_ENTRY(179, 2, 58, 0, 0, 2, 58, 0, 62), + CABAC_ENTRY(180, 4, 63, 56, -15, 6, 60, 7, 61), + CABAC_ENTRY(181, 6, 51, 33, -4, 8, 44, 12, 38), + CABAC_ENTRY(182, 6, 57, 29, 10, 11, 44, 11, 45), + CABAC_ENTRY(183, 7, 53, 37, -5, 14, 42, 15, 39), + CABAC_ENTRY(184, 6, 52, 51, -29, 7, 48, 11, 42), + CABAC_ENTRY(185, 6, 55, 39, -9, 4, 56, 13, 44), + CABAC_ENTRY(186, 11, 45, 52, -34, 4, 52, 16, 45), + CABAC_ENTRY(187, 14, 36, 69, -58, 13, 37, 12, 41), + CABAC_ENTRY(188, 8, 53, 67, -63, 9, 49, 10, 49), + CABAC_ENTRY(189, -1, 82, 44, -5, 19, 58, 30, 34), + CABAC_ENTRY(190, 7, 55, 32, 7, 10, 48, 18, 42), + CABAC_ENTRY(191, -3, 78, 55, -29, 12, 45, 10, 55), + CABAC_ENTRY(192, 15, 46, 32, 1, 0, 69, 17, 51), + CABAC_ENTRY(193, 22, 31, 0, 0, 20, 33, 17, 46), + CABAC_ENTRY(194, -1, 84, 27, 36, 8, 63, 0, 89), + CABAC_ENTRY(195, 25, 7, 33, -25, 35, -18, 26, -19), + CABAC_ENTRY(196, 30, -7, 34, -30, 33, -25, 22, -17), + CABAC_ENTRY(197, 28, 3, 36, -28, 28, -3, 26, -17), + CABAC_ENTRY(198, 28, 4, 38, -28, 24, 10, 30, -25), + CABAC_ENTRY(199, 32, 0, 38, -27, 27, 0, 28, -20), + CABAC_ENTRY(200, 34, -1, 34, -18, 34, -14, 33, -23), + CABAC_ENTRY(201, 30, 6, 35, -16, 52, -44, 37, -27), + CABAC_ENTRY(202, 30, 6, 34, -14, 39, -24, 33, -23), + CABAC_ENTRY(203, 32, 9, 32, -8, 19, 17, 40, -28), + CABAC_ENTRY(204, 31, 19, 37, -6, 31, 25, 38, -17), + CABAC_ENTRY(205, 26, 27, 35, 0, 36, 29, 33, -11), + CABAC_ENTRY(206, 26, 30, 30, 10, 24, 33, 40, -15), + CABAC_ENTRY(207, 37, 20, 28, 18, 34, 15, 41, -6), + CABAC_ENTRY(208, 28, 34, 26, 25, 30, 20, 38, 1), + CABAC_ENTRY(209, 17, 70, 29, 41, 22, 73, 41, 17), + CABAC_ENTRY(210, 1, 67, 0, 75, 20, 34, 30, -6), + CABAC_ENTRY(211, 5, 59, 2, 72, 19, 31, 27, 3), + CABAC_ENTRY(212, 9, 67, 8, 77, 27, 44, 26, 22), + CABAC_ENTRY(213, 16, 30, 14, 35, 19, 16, 37, -16), + CABAC_ENTRY(214, 18, 32, 18, 31, 15, 36, 35, -4), + CABAC_ENTRY(215, 18, 35, 17, 35, 15, 36, 38, -8), + CABAC_ENTRY(216, 22, 29, 21, 30, 21, 28, 38, -3), + CABAC_ENTRY(217, 24, 31, 17, 45, 25, 21, 37, 3), + CABAC_ENTRY(218, 23, 38, 20, 42, 30, 20, 38, 5), + CABAC_ENTRY(219, 18, 43, 18, 45, 31, 12, 42, 0), + CABAC_ENTRY(220, 20, 41, 27, 26, 27, 16, 35, 16), + CABAC_ENTRY(221, 11, 63, 16, 54, 24, 42, 39, 22), + CABAC_ENTRY(222, 9, 59, 7, 66, 0, 93, 14, 48), + CABAC_ENTRY(223, 9, 64, 16, 56, 14, 56, 27, 37), + CABAC_ENTRY(224, -1, 94, 11, 73, 15, 57, 21, 60), + CABAC_ENTRY(225, -2, 89, 10, 67, 26, 38, 12, 68), + CABAC_ENTRY(226, -9, 108, -10, 116, -24, 127, 2, 97), + + /* Table 9-21 – Values of variables m and n for ctxIdx from 227 to 275 */ + CABAC_ENTRY(227, -6, 76, -23, 112, -24, 115, -3, 71), + CABAC_ENTRY(228, -2, 44, -15, 71, -22, 82, -6, 42), + CABAC_ENTRY(229, 0, 45, -7, 61, -9, 62, -5, 50), + CABAC_ENTRY(230, 0, 52, 0, 53, 0, 53, -3, 54), + CABAC_ENTRY(231, -3, 64, -5, 66, 0, 59, -2, 62), + CABAC_ENTRY(232, -2, 59, -11, 77, -14, 85, 0, 58), + CABAC_ENTRY(233, -4, 70, -9, 80, -13, 89, 1, 63), + CABAC_ENTRY(234, -4, 75, -9, 84, -13, 94, -2, 72), + CABAC_ENTRY(235, -8, 82, -10, 87, -11, 92, -1, 74), + CABAC_ENTRY(236, -17, 102, -34, 127, -29, 127, -9, 91), + CABAC_ENTRY(237, -9, 77, -21, 101, -21, 100, -5, 67), + CABAC_ENTRY(238, 3, 24, -3, 39, -14, 57, -5, 27), + CABAC_ENTRY(239, 0, 42, -5, 53, -12, 67, -3, 39), + CABAC_ENTRY(240, 0, 48, -7, 61, -11, 71, -2, 44), + CABAC_ENTRY(241, 0, 55, -11, 75, -10, 77, 0, 46), + CABAC_ENTRY(242, -6, 59, -15, 77, -21, 85, -16, 64), + CABAC_ENTRY(243, -7, 71, -17, 91, -16, 88, -8, 68), + CABAC_ENTRY(244, -12, 83, -25, 107, -23, 104, -10, 78), + CABAC_ENTRY(245, -11, 87, -25, 111, -15, 98, -6, 77), + CABAC_ENTRY(246, -30, 119, -28, 122, -37, 127, -10, 86), + CABAC_ENTRY(247, 1, 58, -11, 76, -10, 82, -12, 92), + CABAC_ENTRY(248, -3, 29, -10, 44, -8, 48, -15, 55), + CABAC_ENTRY(249, -1, 36, -10, 52, -8, 61, -10, 60), + CABAC_ENTRY(250, 1, 38, -10, 57, -8, 66, -6, 62), + CABAC_ENTRY(251, 2, 43, -9, 58, -7, 70, -4, 65), + CABAC_ENTRY(252, -6, 55, -16, 72, -14, 75, -12, 73), + CABAC_ENTRY(253, 0, 58, -7, 69, -10, 79, -8, 76), + CABAC_ENTRY(254, 0, 64, -4, 69, -9, 83, -7, 80), + CABAC_ENTRY(255, -3, 74, -5, 74, -12, 92, -9, 88), + CABAC_ENTRY(256, -10, 90, -9, 86, -18, 108, -17, 110), + CABAC_ENTRY(257, 0, 70, 2, 66, -4, 79, -11, 97), + CABAC_ENTRY(258, -4, 29, -9, 34, -22, 69, -20, 84), + CABAC_ENTRY(259, 5, 31, 1, 32, -16, 75, -11, 79), + CABAC_ENTRY(260, 7, 42, 11, 31, -2, 58, -6, 73), + CABAC_ENTRY(261, 1, 59, 5, 52, 1, 58, -4, 74), + CABAC_ENTRY(262, -2, 58, -2, 55, -13, 78, -13, 86), + CABAC_ENTRY(263, -3, 72, -2, 67, -9, 83, -13, 96), + CABAC_ENTRY(264, -3, 81, 0, 73, -4, 81, -11, 97), + CABAC_ENTRY(265, -11, 97, -8, 89, -13, 99, -19, 117), + CABAC_ENTRY(266, 0, 58, 3, 52, -13, 81, -8, 78), + CABAC_ENTRY(267, 8, 5, 7, 4, -6, 38, -5, 33), + CABAC_ENTRY(268, 10, 14, 10, 8, -13, 62, -4, 48), + CABAC_ENTRY(269, 14, 18, 17, 8, -6, 58, -2, 53), + CABAC_ENTRY(270, 13, 27, 16, 19, -2, 59, -3, 62), + CABAC_ENTRY(271, 2, 40, 3, 37, -16, 73, -13, 71), + CABAC_ENTRY(272, 0, 58, -1, 61, -10, 76, -10, 79), + CABAC_ENTRY(273, -3, 70, -5, 73, -13, 86, -12, 86), + CABAC_ENTRY(274, -6, 79, -1, 70, -9, 83, -13, 90), + CABAC_ENTRY(275, -8, 85, -4, 78, -10, 87, -14, 97), + + /* Table 9-22 – Values of variables m and n for ctxIdx from 277 to 337 */ + CABAC_ENTRY(277, -13, 106, -21, 126, -22, 127, -6, 93), + CABAC_ENTRY(278, -16, 106, -23, 124, -25, 127, -6, 84), + CABAC_ENTRY(279, -10, 87, -20, 110, -25, 120, -8, 79), + CABAC_ENTRY(280, -21, 114, -26, 126, -27, 127, 0, 66), + CABAC_ENTRY(281, -18, 110, -25, 124, -19, 114, -1, 71), + CABAC_ENTRY(282, -14, 98, -17, 105, -23, 117, 0, 62), + CABAC_ENTRY(283, -22, 110, -27, 121, -25, 118, -2, 60), + CABAC_ENTRY(284, -21, 106, -27, 117, -26, 117, -2, 59), + CABAC_ENTRY(285, -18, 103, -17, 102, -24, 113, -5, 75), + CABAC_ENTRY(286, -21, 107, -26, 117, -28, 118, -3, 62), + CABAC_ENTRY(287, -23, 108, -27, 116, -31, 120, -4, 58), + CABAC_ENTRY(288, -26, 112, -33, 122, -37, 124, -9, 66), + CABAC_ENTRY(289, -10, 96, -10, 95, -10, 94, -1, 79), + CABAC_ENTRY(290, -12, 95, -14, 100, -15, 102, 0, 71), + CABAC_ENTRY(291, -5, 91, -8, 95, -10, 99, 3, 68), + CABAC_ENTRY(292, -9, 93, -17, 111, -13, 106, 10, 44), + CABAC_ENTRY(293, -22, 94, -28, 114, -50, 127, -7, 62), + CABAC_ENTRY(294, -5, 86, -6, 89, -5, 92, 15, 36), + CABAC_ENTRY(295, 9, 67, -2, 80, 17, 57, 14, 40), + CABAC_ENTRY(296, -4, 80, -4, 82, -5, 86, 16, 27), + CABAC_ENTRY(297, -10, 85, -9, 85, -13, 94, 12, 29), + CABAC_ENTRY(298, -1, 70, -8, 81, -12, 91, 1, 44), + CABAC_ENTRY(299, 7, 60, -1, 72, -2, 77, 20, 36), + CABAC_ENTRY(300, 9, 58, 5, 64, 0, 71, 18, 32), + CABAC_ENTRY(301, 5, 61, 1, 67, -1, 73, 5, 42), + CABAC_ENTRY(302, 12, 50, 9, 56, 4, 64, 1, 48), + CABAC_ENTRY(303, 15, 50, 0, 69, -7, 81, 10, 62), + CABAC_ENTRY(304, 18, 49, 1, 69, 5, 64, 17, 46), + CABAC_ENTRY(305, 17, 54, 7, 69, 15, 57, 9, 64), + CABAC_ENTRY(306, 10, 41, -7, 69, 1, 67, -12, 104), + CABAC_ENTRY(307, 7, 46, -6, 67, 0, 68, -11, 97), + CABAC_ENTRY(308, -1, 51, -16, 77, -10, 67, -16, 96), + CABAC_ENTRY(309, 7, 49, -2, 64, 1, 68, -7, 88), + CABAC_ENTRY(310, 8, 52, 2, 61, 0, 77, -8, 85), + CABAC_ENTRY(311, 9, 41, -6, 67, 2, 64, -7, 85), + CABAC_ENTRY(312, 6, 47, -3, 64, 0, 68, -9, 85), + CABAC_ENTRY(313, 2, 55, 2, 57, -5, 78, -13, 88), + CABAC_ENTRY(314, 13, 41, -3, 65, 7, 55, 4, 66), + CABAC_ENTRY(315, 10, 44, -3, 66, 5, 59, -3, 77), + CABAC_ENTRY(316, 6, 50, 0, 62, 2, 65, -3, 76), + CABAC_ENTRY(317, 5, 53, 9, 51, 14, 54, -6, 76), + CABAC_ENTRY(318, 13, 49, -1, 66, 15, 44, 10, 58), + CABAC_ENTRY(319, 4, 63, -2, 71, 5, 60, -1, 76), + CABAC_ENTRY(320, 6, 64, -2, 75, 2, 70, -1, 83), + CABAC_ENTRY(321, -2, 69, -1, 70, -2, 76, -7, 99), + CABAC_ENTRY(322, -2, 59, -9, 72, -18, 86, -14, 95), + CABAC_ENTRY(323, 6, 70, 14, 60, 12, 70, 2, 95), + CABAC_ENTRY(324, 10, 44, 16, 37, 5, 64, 0, 76), + CABAC_ENTRY(325, 9, 31, 0, 47, -12, 70, -5, 74), + CABAC_ENTRY(326, 12, 43, 18, 35, 11, 55, 0, 70), + CABAC_ENTRY(327, 3, 53, 11, 37, 5, 56, -11, 75), + CABAC_ENTRY(328, 14, 34, 12, 41, 0, 69, 1, 68), + CABAC_ENTRY(329, 10, 38, 10, 41, 2, 65, 0, 65), + CABAC_ENTRY(330, -3, 52, 2, 48, -6, 74, -14, 73), + CABAC_ENTRY(331, 13, 40, 12, 41, 5, 54, 3, 62), + CABAC_ENTRY(332, 17, 32, 13, 41, 7, 54, 4, 62), + CABAC_ENTRY(333, 7, 44, 0, 59, -6, 76, -1, 68), + CABAC_ENTRY(334, 7, 38, 3, 50, -11, 82, -13, 75), + CABAC_ENTRY(335, 13, 50, 19, 40, -2, 77, 11, 55), + CABAC_ENTRY(336, 10, 57, 3, 66, -2, 77, 5, 64), + CABAC_ENTRY(337, 26, 43, 18, 50, 25, 42, 12, 70), + + /* Table 9-23 – Values of variables m and n for ctxIdx from 338 to 398 */ + CABAC_ENTRY(338, 14, 11, 19, -6, 17, -13, 15, 6), + CABAC_ENTRY(339, 11, 14, 18, -6, 16, -9, 6, 19), + CABAC_ENTRY(340, 9, 11, 14, 0, 17, -12, 7, 16), + CABAC_ENTRY(341, 18, 11, 26, -12, 27, -21, 12, 14), + CABAC_ENTRY(342, 21, 9, 31, -16, 37, -30, 18, 13), + CABAC_ENTRY(343, 23, -2, 33, -25, 41, -40, 13, 11), + CABAC_ENTRY(344, 32, -15, 33, -22, 42, -41, 13, 15), + CABAC_ENTRY(345, 32, -15, 37, -28, 48, -47, 15, 16), + CABAC_ENTRY(346, 34, -21, 39, -30, 39, -32, 12, 23), + CABAC_ENTRY(347, 39, -23, 42, -30, 46, -40, 13, 23), + CABAC_ENTRY(348, 42, -33, 47, -42, 52, -51, 15, 20), + CABAC_ENTRY(349, 41, -31, 45, -36, 46, -41, 14, 26), + CABAC_ENTRY(350, 46, -28, 49, -34, 52, -39, 14, 44), + CABAC_ENTRY(351, 38, -12, 41, -17, 43, -19, 17, 40), + CABAC_ENTRY(352, 21, 29, 32, 9, 32, 11, 17, 47), + CABAC_ENTRY(353, 45, -24, 69, -71, 61, -55, 24, 17), + CABAC_ENTRY(354, 53, -45, 63, -63, 56, -46, 21, 21), + CABAC_ENTRY(355, 48, -26, 66, -64, 62, -50, 25, 22), + CABAC_ENTRY(356, 65, -43, 77, -74, 81, -67, 31, 27), + CABAC_ENTRY(357, 43, -19, 54, -39, 45, -20, 22, 29), + CABAC_ENTRY(358, 39, -10, 52, -35, 35, -2, 19, 35), + CABAC_ENTRY(359, 30, 9, 41, -10, 28, 15, 14, 50), + CABAC_ENTRY(360, 18, 26, 36, 0, 34, 1, 10, 57), + CABAC_ENTRY(361, 20, 27, 40, -1, 39, 1, 7, 63), + CABAC_ENTRY(362, 0, 57, 30, 14, 30, 17, -2, 77), + CABAC_ENTRY(363, -14, 82, 28, 26, 20, 38, -4, 82), + CABAC_ENTRY(364, -5, 75, 23, 37, 18, 45, -3, 94), + CABAC_ENTRY(365, -19, 97, 12, 55, 15, 54, 9, 69), + CABAC_ENTRY(366, -35, 125, 11, 65, 0, 79, -12, 109), + CABAC_ENTRY(367, 27, 0, 37, -33, 36, -16, 36, -35), + CABAC_ENTRY(368, 28, 0, 39, -36, 37, -14, 36, -34), + CABAC_ENTRY(369, 31, -4, 40, -37, 37, -17, 32, -26), + CABAC_ENTRY(370, 27, 6, 38, -30, 32, 1, 37, -30), + CABAC_ENTRY(371, 34, 8, 46, -33, 34, 15, 44, -32), + CABAC_ENTRY(372, 30, 10, 42, -30, 29, 15, 34, -18), + CABAC_ENTRY(373, 24, 22, 40, -24, 24, 25, 34, -15), + CABAC_ENTRY(374, 33, 19, 49, -29, 34, 22, 40, -15), + CABAC_ENTRY(375, 22, 32, 38, -12, 31, 16, 33, -7), + CABAC_ENTRY(376, 26, 31, 40, -10, 35, 18, 35, -5), + CABAC_ENTRY(377, 21, 41, 38, -3, 31, 28, 33, 0), + CABAC_ENTRY(378, 26, 44, 46, -5, 33, 41, 38, 2), + CABAC_ENTRY(379, 23, 47, 31, 20, 36, 28, 33, 13), + CABAC_ENTRY(380, 16, 65, 29, 30, 27, 47, 23, 35), + CABAC_ENTRY(381, 14, 71, 25, 44, 21, 62, 13, 58), + CABAC_ENTRY(382, 8, 60, 12, 48, 18, 31, 29, -3), + CABAC_ENTRY(383, 6, 63, 11, 49, 19, 26, 26, 0), + CABAC_ENTRY(384, 17, 65, 26, 45, 36, 24, 22, 30), + CABAC_ENTRY(385, 21, 24, 22, 22, 24, 23, 31, -7), + CABAC_ENTRY(386, 23, 20, 23, 22, 27, 16, 35, -15), + CABAC_ENTRY(387, 26, 23, 27, 21, 24, 30, 34, -3), + CABAC_ENTRY(388, 27, 32, 33, 20, 31, 29, 34, 3), + CABAC_ENTRY(389, 28, 23, 26, 28, 22, 41, 36, -1), + CABAC_ENTRY(390, 28, 24, 30, 24, 22, 42, 34, 5), + CABAC_ENTRY(391, 23, 40, 27, 34, 16, 60, 32, 11), + CABAC_ENTRY(392, 24, 32, 18, 42, 15, 52, 35, 5), + CABAC_ENTRY(393, 28, 29, 25, 39, 14, 60, 34, 12), + CABAC_ENTRY(394, 23, 42, 18, 50, 3, 78, 39, 11), + CABAC_ENTRY(395, 19, 57, 12, 70, -16, 123, 30, 29), + CABAC_ENTRY(396, 22, 53, 21, 54, 21, 53, 34, 26), + CABAC_ENTRY(397, 22, 61, 14, 71, 22, 56, 29, 39), + CABAC_ENTRY(398, 11, 86, 11, 83, 25, 61, 19, 66), + + /* Values of variables m and n for ctxIdx from 399 to 463 (not documented) */ + CABAC_ENTRY(399, 12, 40, 25, 32, 21, 33, 31, 21), + CABAC_ENTRY(400, 11, 51, 21, 49, 19, 50, 31, 31), + CABAC_ENTRY(401, 14, 59, 21, 54, 17, 61, 25, 50), + CABAC_ENTRY(402, -4, 79, -5, 85, -3, 78, -17, 120), + CABAC_ENTRY(403, -7, 71, -6, 81, -8, 74, -20, 112), + CABAC_ENTRY(404, -5, 69, -10, 77, -9, 72, -18, 114), + CABAC_ENTRY(405, -9, 70, -7, 81, -10, 72, -11, 85), + CABAC_ENTRY(406, -8, 66, -17, 80, -18, 75, -15, 92), + CABAC_ENTRY(407, -10, 68, -18, 73, -12, 71, -14, 89), + CABAC_ENTRY(408, -19, 73, -4, 74, -11, 63, -26, 71), + CABAC_ENTRY(409, -12, 69, -10, 83, -5, 70, -15, 81), + CABAC_ENTRY(410, -16, 70, -9, 71, -17, 75, -14, 80), + CABAC_ENTRY(411, -15, 67, -9, 67, -14, 72, 0, 68), + CABAC_ENTRY(412, -20, 62, -1, 61, -16, 67, -14, 70), + CABAC_ENTRY(413, -19, 70, -8, 66, -8, 53, -24, 56), + CABAC_ENTRY(414, -16, 66, -14, 66, -14, 59, -23, 68), + CABAC_ENTRY(415, -22, 65, 0, 59, -9, 52, -24, 50), + CABAC_ENTRY(416, -20, 63, 2, 59, -11, 68, -11, 74), + CABAC_ENTRY(417, 9, -2, 17, -10, 9, -2, 23, -13), + CABAC_ENTRY(418, 26, -9, 32, -13, 30, -10, 26, -13), + CABAC_ENTRY(419, 33, -9, 42, -9, 31, -4, 40, -15), + CABAC_ENTRY(420, 39, -7, 49, -5, 33, -1, 49, -14), + CABAC_ENTRY(421, 41, -2, 53, 0, 33, 7, 44, 3), + CABAC_ENTRY(422, 45, 3, 64, 3, 31, 12, 45, 6), + CABAC_ENTRY(423, 49, 9, 68, 10, 37, 23, 44, 34), + CABAC_ENTRY(424, 45, 27, 66, 27, 31, 38, 33, 54), + CABAC_ENTRY(425, 36, 59, 47, 57, 20, 64, 19, 82), + CABAC_ENTRY(426, -6, 66, -5, 71, -9, 71, -3, 75), + CABAC_ENTRY(427, -7, 35, 0, 24, -7, 37, -1, 23), + CABAC_ENTRY(428, -7, 42, -1, 36, -8, 44, 1, 34), + CABAC_ENTRY(429, -8, 45, -2, 42, -11, 49, 1, 43), + CABAC_ENTRY(430, -5, 48, -2, 52, -10, 56, 0, 54), + CABAC_ENTRY(431, -12, 56, -9, 57, -12, 59, -2, 55), + CABAC_ENTRY(432, -6, 60, -6, 63, -8, 63, 0, 61), + CABAC_ENTRY(433, -5, 62, -4, 65, -9, 67, 1, 64), + CABAC_ENTRY(434, -8, 66, -4, 67, -6, 68, 0, 68), + CABAC_ENTRY(435, -8, 76, -7, 82, -10, 79, -9, 92), + CABAC_ENTRY(436, -5, 85, -3, 81, -3, 78, -14, 106), + CABAC_ENTRY(437, -6, 81, -3, 76, -8, 74, -13, 97), + CABAC_ENTRY(438, -10, 77, -7, 72, -9, 72, -15, 90), + CABAC_ENTRY(439, -7, 81, -6, 78, -10, 72, -12, 90), + CABAC_ENTRY(440, -17, 80, -12, 72, -18, 75, -18, 88), + CABAC_ENTRY(441, -18, 73, -14, 68, -12, 71, -10, 73), + CABAC_ENTRY(442, -4, 74, -3, 70, -11, 63, -9, 79), + CABAC_ENTRY(443, -10, 83, -6, 76, -5, 70, -14, 86), + CABAC_ENTRY(444, -9, 71, -5, 66, -17, 75, -10, 73), + CABAC_ENTRY(445, -9, 67, -5, 62, -14, 72, -10, 70), + CABAC_ENTRY(446, -1, 61, 0, 57, -16, 67, -10, 69), + CABAC_ENTRY(447, -8, 66, -4, 61, -8, 53, -5, 66), + CABAC_ENTRY(448, -14, 66, -9, 60, -14, 59, -9, 64), + CABAC_ENTRY(449, 0, 59, 1, 54, -9, 52, -5, 58), + CABAC_ENTRY(450, 2, 59, 2, 58, -11, 68, 2, 59), + CABAC_ENTRY(451, 21, -13, 17, -10, 9, -2, 21, -10), + CABAC_ENTRY(452, 33, -14, 32, -13, 30, -10, 24, -11), + CABAC_ENTRY(453, 39, -7, 42, -9, 31, -4, 28, -8), + CABAC_ENTRY(454, 46, -2, 49, -5, 33, -1, 28, -1), + CABAC_ENTRY(455, 51, 2, 53, 0, 33, 7, 29, 3), + CABAC_ENTRY(456, 60, 6, 64, 3, 31, 12, 29, 9), + CABAC_ENTRY(457, 61, 17, 68, 10, 37, 23, 35, 20), + CABAC_ENTRY(458, 55, 34, 66, 27, 31, 38, 29, 36), + CABAC_ENTRY(459, 42, 62, 47, 57, 20, 64, 14, 67), +}; + +static void set_ps_field(u32 *buf, struct rkvdec_ps_field field, u32 value) +{ + u8 bit = field.offset % 32, word = field.offset / 32; + u64 mask = GENMASK_ULL(bit + field.len - 1, bit); + u64 val = ((u64)value << bit) & mask; + + buf[word] &= ~mask; + buf[word] |= val; + if (bit + field.len > 32) { + buf[word + 1] &= ~(mask >> 32); + buf[word + 1] |= val >> 32; + } +} + +static void assemble_hw_pps(struct rkvdec_ctx *ctx, + struct rkvdec_h264_run *run) +{ + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + const struct v4l2_ctrl_h264_sps *sps = run->sps; + const struct v4l2_ctrl_h264_pps *pps = run->pps; + const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; + const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; + struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; + struct rkvdec_sps_pps_packet *hw_ps; + dma_addr_t scaling_list_address; + u32 scaling_distance; + u32 i; + + /* + * HW read the SPS/PPS information from PPS packet index by PPS id. + * offset from the base can be calculated by PPS_id * 32 (size per PPS + * packet unit). so the driver copy SPS/PPS information to the exact PPS + * packet unit for HW accessing. + */ + hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; + memset(hw_ps, 0, sizeof(*hw_ps)); + +#define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value) + /* write sps */ + WRITE_PPS(0xf, SEQ_PARAMETER_SET_ID); + WRITE_PPS(0xff, PROFILE_IDC); + WRITE_PPS(1, CONSTRAINT_SET3_FLAG); + WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC); + WRITE_PPS(sps->bit_depth_luma_minus8 + 8, BIT_DEPTH_LUMA); + WRITE_PPS(sps->bit_depth_chroma_minus8 + 8, BIT_DEPTH_CHROMA); + WRITE_PPS(0, QPPRIME_Y_ZERO_TRANSFORM_BYPASS_FLAG); + WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4); + WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES); + WRITE_PPS(sps->pic_order_cnt_type, PIC_ORDER_CNT_TYPE); + WRITE_PPS(sps->log2_max_pic_order_cnt_lsb_minus4, + LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4); + WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO), + DELTA_PIC_ORDER_ALWAYS_ZERO_FLAG); + WRITE_PPS(DIV_ROUND_UP(ctx->coded_fmt.fmt.pix_mp.width, 16), PIC_WIDTH_IN_MBS); + WRITE_PPS(DIV_ROUND_UP(ctx->coded_fmt.fmt.pix_mp.height, 16), PIC_HEIGHT_IN_MBS); + WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY), + FRAME_MBS_ONLY_FLAG); + WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD), + MB_ADAPTIVE_FRAME_FIELD_FLAG); + WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE), + DIRECT_8X8_INFERENCE_FLAG); + + /* write pps */ + WRITE_PPS(0xff, PIC_PARAMETER_SET_ID); + WRITE_PPS(0x1f, PPS_SEQ_PARAMETER_SET_ID); + WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE), + ENTROPY_CODING_MODE_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT), + BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT_FLAG); + WRITE_PPS(pps->num_ref_idx_l0_default_active_minus1, + NUM_REF_IDX_L_DEFAULT_ACTIVE_MINUS1(0)); + WRITE_PPS(pps->num_ref_idx_l1_default_active_minus1, + NUM_REF_IDX_L_DEFAULT_ACTIVE_MINUS1(1)); + WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED), + WEIGHTED_PRED_FLAG); + WRITE_PPS(pps->weighted_bipred_idc, WEIGHTED_BIPRED_IDC); + WRITE_PPS(pps->pic_init_qp_minus26, PIC_INIT_QP_MINUS26); + WRITE_PPS(pps->pic_init_qs_minus26, PIC_INIT_QS_MINUS26); + WRITE_PPS(pps->chroma_qp_index_offset, CHROMA_QP_INDEX_OFFSET); + WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT), + DEBLOCKING_FILTER_CONTROL_PRESENT_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED), + CONSTRAINED_INTRA_PRED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT), + REDUNDANT_PIC_CNT_PRESENT); + WRITE_PPS(!!(pps->flags & V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE), + TRANSFORM_8X8_MODE_FLAG); + WRITE_PPS(pps->second_chroma_qp_index_offset, + SECOND_CHROMA_QP_INDEX_OFFSET); + + /* always use the matrix sent from userspace */ + WRITE_PPS(1, SCALING_LIST_ENABLE_FLAG); + + scaling_distance = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); + scaling_list_address = h264_ctx->priv_tbl.dma + scaling_distance; + WRITE_PPS(scaling_list_address, SCALING_LIST_ADDRESS); + + for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { + u32 is_longterm = 0; + + if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) + is_longterm = 1; + + WRITE_PPS(is_longterm, IS_LONG_TERM(i)); + } +} + +static void assemble_hw_rps(struct rkvdec_ctx *ctx, + struct rkvdec_h264_run *run) +{ + const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; + const struct v4l2_ctrl_h264_slice_params *sl_params = &run->slices_params[0]; + const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + const struct v4l2_ctrl_h264_sps *sps = run->sps; + struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; + u32 max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4); + + u32 *hw_rps = priv_tbl->rps; + u32 i, j; + u16 *p = (u16 *)hw_rps; + + memset(hw_rps, 0, sizeof(priv_tbl->rps)); + + /* + * Assign an invalid pic_num if DPB entry at that position is inactive. + * If we assign 0 in that position hardware will treat that as a real + * reference picture with pic_num 0, triggering output picture + * corruption. + */ + for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { + if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) + continue; + + if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM || + dpb[i].frame_num < sl_params->frame_num) { + p[i] = dpb[i].frame_num; + continue; + } + + p[i] = dpb[i].frame_num - max_frame_num; + } + + for (j = 0; j < RKVDEC_NUM_REFLIST; j++) { + for (i = 0; i < h264_ctx->reflists.num_valid; i++) { + u8 dpb_valid = 0; + u8 idx = 0; + + switch (j) { + case 0: + idx = h264_ctx->reflists.p[i]; + break; + case 1: + idx = h264_ctx->reflists.b0[i]; + break; + case 2: + idx = h264_ctx->reflists.b1[i]; + break; + } + + if (idx >= ARRAY_SIZE(dec_params->dpb)) + continue; + dpb_valid = !!(dpb[idx].flags & + V4L2_H264_DPB_ENTRY_FLAG_ACTIVE); + + set_ps_field(hw_rps, DPB_INFO(i, j), + idx | dpb_valid << 4); + } + } +} + +/* + * NOTE: The values in a scaling list are in zig-zag order, apply inverse + * scanning process to get the values in matrix order. + */ +static const u32 zig_zag_4x4[16] = { + 0, 1, 4, 8, 5, 2, 3, 6, 9, 12, 13, 10, 7, 11, 14, 15 +}; + +static const u32 zig_zag_8x8[64] = { + 0, 1, 8, 16, 9, 2, 3, 10, 17, 24, 32, 25, 18, 11, 4, 5, + 12, 19, 26, 33, 40, 48, 41, 34, 27, 20, 13, 6, 7, 14, 21, 28, + 35, 42, 49, 56, 57, 50, 43, 36, 29, 22, 15, 23, 30, 37, 44, 51, + 58, 59, 52, 45, 38, 31, 39, 46, 53, 60, 61, 54, 47, 55, 62, 63 +}; + +static void reorder_scaling_list(struct rkvdec_ctx *ctx, + struct rkvdec_h264_run *run) +{ + const struct v4l2_ctrl_h264_scaling_matrix *scaling = run->scaling_matrix; + const size_t num_list_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4); + const size_t list_len_4x4 = ARRAY_SIZE(scaling->scaling_list_4x4[0]); + const size_t num_list_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8); + const size_t list_len_8x8 = ARRAY_SIZE(scaling->scaling_list_8x8[0]); + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; + u8 *dst = tbl->scaling_list; + const u8 *src; + int i, j; + + BUILD_BUG_ON(ARRAY_SIZE(zig_zag_4x4) != list_len_4x4); + BUILD_BUG_ON(ARRAY_SIZE(zig_zag_8x8) != list_len_8x8); + BUILD_BUG_ON(ARRAY_SIZE(tbl->scaling_list) < + num_list_4x4 * list_len_4x4 + + num_list_8x8 * list_len_8x8); + + src = &scaling->scaling_list_4x4[0][0]; + for (i = 0; i < num_list_4x4; ++i) { + for (j = 0; j < list_len_4x4; ++j) + dst[zig_zag_4x4[j]] = src[j]; + src += list_len_4x4; + dst += list_len_4x4; + } + + src = &scaling->scaling_list_8x8[0][0]; + for (i = 0; i < num_list_8x8; ++i) { + for (j = 0; j < list_len_8x8; ++j) + dst[zig_zag_8x8[j]] = src[j]; + src += list_len_8x8; + dst += list_len_8x8; + } +} + +/* + * dpb poc related registers table + */ +static const u32 poc_reg_tbl_top_field[16] = { + RKVDEC_REG_H264_POC_REFER0(0), + RKVDEC_REG_H264_POC_REFER0(2), + RKVDEC_REG_H264_POC_REFER0(4), + RKVDEC_REG_H264_POC_REFER0(6), + RKVDEC_REG_H264_POC_REFER0(8), + RKVDEC_REG_H264_POC_REFER0(10), + RKVDEC_REG_H264_POC_REFER0(12), + RKVDEC_REG_H264_POC_REFER0(14), + RKVDEC_REG_H264_POC_REFER1(1), + RKVDEC_REG_H264_POC_REFER1(3), + RKVDEC_REG_H264_POC_REFER1(5), + RKVDEC_REG_H264_POC_REFER1(7), + RKVDEC_REG_H264_POC_REFER1(9), + RKVDEC_REG_H264_POC_REFER1(11), + RKVDEC_REG_H264_POC_REFER1(13), + RKVDEC_REG_H264_POC_REFER2(0) +}; + +static const u32 poc_reg_tbl_bottom_field[16] = { + RKVDEC_REG_H264_POC_REFER0(1), + RKVDEC_REG_H264_POC_REFER0(3), + RKVDEC_REG_H264_POC_REFER0(5), + RKVDEC_REG_H264_POC_REFER0(7), + RKVDEC_REG_H264_POC_REFER0(9), + RKVDEC_REG_H264_POC_REFER0(11), + RKVDEC_REG_H264_POC_REFER0(13), + RKVDEC_REG_H264_POC_REFER1(0), + RKVDEC_REG_H264_POC_REFER1(2), + RKVDEC_REG_H264_POC_REFER1(4), + RKVDEC_REG_H264_POC_REFER1(6), + RKVDEC_REG_H264_POC_REFER1(8), + RKVDEC_REG_H264_POC_REFER1(10), + RKVDEC_REG_H264_POC_REFER1(12), + RKVDEC_REG_H264_POC_REFER1(14), + RKVDEC_REG_H264_POC_REFER2(1) +}; + +static struct vb2_buffer * +get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_h264_run *run, + unsigned int dpb_idx) +{ + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + const struct v4l2_h264_dpb_entry *dpb = run->decode_params->dpb; + struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; + int buf_idx = -1; + + if (dpb[dpb_idx].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE) + buf_idx = vb2_find_timestamp(cap_q, + dpb[dpb_idx].reference_ts, 0); + + /* + * If a DPB entry is unused or invalid, address of current destination + * buffer is returned. + */ + if (buf_idx < 0) + return &run->base.bufs.dst->vb2_buf; + + return vb2_get_buffer(cap_q, buf_idx); +} + +static void config_registers(struct rkvdec_ctx *ctx, + struct rkvdec_h264_run *run) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; + const struct v4l2_ctrl_h264_sps *sps = run->sps; + const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + dma_addr_t priv_start_addr = h264_ctx->priv_tbl.dma; + const struct v4l2_pix_format_mplane *dst_fmt; + struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; + struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; + const struct v4l2_format *f; + dma_addr_t rlc_addr; + dma_addr_t refer_addr; + u32 rlc_len; + u32 hor_virstride = 0; + u32 ver_virstride = 0; + u32 y_virstride = 0; + u32 yuv_virstride = 0; + u32 offset; + dma_addr_t dst_addr; + u32 reg, i; + + reg = RKVDEC_MODE(RKVDEC_MODE_H264); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_SYSCTRL); + + f = &ctx->decoded_fmt; + dst_fmt = &f->fmt.pix_mp; + hor_virstride = (sps->bit_depth_luma_minus8 + 8) * dst_fmt->width / 8; + ver_virstride = round_up(dst_fmt->height, 16); + y_virstride = hor_virstride * ver_virstride; + + if (sps->chroma_format_idc == 0) + yuv_virstride = y_virstride; + else if (sps->chroma_format_idc == 1) + yuv_virstride += y_virstride + y_virstride / 2; + else if (sps->chroma_format_idc == 2) + yuv_virstride += 2 * y_virstride; + + reg = RKVDEC_Y_HOR_VIRSTRIDE(hor_virstride / 16) | + RKVDEC_UV_HOR_VIRSTRIDE(hor_virstride / 16) | + RKVDEC_SLICE_NUM_HIGHBIT | + RKVDEC_SLICE_NUM_LOWBITS(0x7ff); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_PICPAR); + + /* config rlc base address */ + rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); + writel_relaxed(rlc_addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); + writel_relaxed(rlc_addr, rkvdec->regs + RKVDEC_REG_RLCWRITE_BASE); + + rlc_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); + reg = RKVDEC_STRM_LEN(rlc_len); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_STRM_LEN); + + /* config cabac table */ + offset = offsetof(struct rkvdec_h264_priv_tbl, cabac_table); + writel_relaxed(priv_start_addr + offset, + rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); + + /* config output base address */ + dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + writel_relaxed(dst_addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); + + reg = RKVDEC_Y_VIRSTRIDE(y_virstride / 16); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); + + reg = RKVDEC_YUV_VIRSTRIDE(yuv_virstride / 16); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); + + /* config ref pic address & poc */ + for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { + struct vb2_buffer *vb_buf = get_ref_buf(ctx, run, i); + + refer_addr = vb2_dma_contig_plane_dma_addr(vb_buf, 0) | + RKVDEC_COLMV_USED_FLAG_REF; + + if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) + refer_addr |= RKVDEC_TOPFIELD_USED_REF | + RKVDEC_BOTFIELD_USED_REF; + else if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD) + refer_addr |= RKVDEC_BOTFIELD_USED_REF; + else + refer_addr |= RKVDEC_TOPFIELD_USED_REF; + + writel_relaxed(dpb[i].top_field_order_cnt, + rkvdec->regs + poc_reg_tbl_top_field[i]); + writel_relaxed(dpb[i].bottom_field_order_cnt, + rkvdec->regs + poc_reg_tbl_bottom_field[i]); + + if (i < V4L2_H264_NUM_DPB_ENTRIES - 1) + writel_relaxed(refer_addr, + rkvdec->regs + RKVDEC_REG_H264_BASE_REFER(i)); + else + writel_relaxed(refer_addr, + rkvdec->regs + RKVDEC_REG_H264_BASE_REFER15); + } + + /* + * Since support frame mode only + * top_field_order_cnt is the same as bottom_field_order_cnt + */ + reg = RKVDEC_CUR_POC(dec_params->top_field_order_cnt); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_CUR_POC0); + + reg = RKVDEC_CUR_POC(dec_params->bottom_field_order_cnt); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_CUR_POC1); + + /* config hw pps address */ + offset = offsetof(struct rkvdec_h264_priv_tbl, param_set); + writel_relaxed(priv_start_addr + offset, + rkvdec->regs + RKVDEC_REG_PPS_BASE); + + /* config hw rps address */ + offset = offsetof(struct rkvdec_h264_priv_tbl, rps); + writel_relaxed(priv_start_addr + offset, + rkvdec->regs + RKVDEC_REG_RPS_BASE); + + reg = RKVDEC_AXI_DDR_RDATA(0); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_RDATA); + + reg = RKVDEC_AXI_DDR_WDATA(0); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_WDATA); + + offset = offsetof(struct rkvdec_h264_priv_tbl, err_info); + writel_relaxed(priv_start_addr + offset, + rkvdec->regs + RKVDEC_REG_H264_ERRINFO_BASE); +} + +#define RKVDEC_H264_MAX_DEPTH_IN_BYTES 2 + +static int rkvdec_h264_adjust_fmt(struct rkvdec_ctx *ctx, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; + + fmt->num_planes = 1; + fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * + RKVDEC_H264_MAX_DEPTH_IN_BYTES; + return 0; +} + +static int rkvdec_h264_start(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_h264_priv_tbl *priv_tbl; + struct rkvdec_h264_ctx *h264_ctx; + int ret; + + h264_ctx = kzalloc(sizeof(*h264_ctx), GFP_KERNEL); + if (!h264_ctx) + return -ENOMEM; + + priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), + &h264_ctx->priv_tbl.dma, GFP_KERNEL); + if (!priv_tbl) { + ret = -ENOMEM; + goto err_free_ctx; + } + + h264_ctx->priv_tbl.size = sizeof(*priv_tbl); + h264_ctx->priv_tbl.cpu = priv_tbl; + memcpy(priv_tbl->cabac_table, rkvdec_h264_cabac_table, + sizeof(rkvdec_h264_cabac_table)); + + ctx->priv = h264_ctx; + return 0; + +err_free_ctx: + kfree(h264_ctx); + return ret; +} + +static void rkvdec_h264_stop(struct rkvdec_ctx *ctx) +{ + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + struct rkvdec_dev *rkvdec = ctx->dev; + + dma_free_coherent(rkvdec->dev, h264_ctx->priv_tbl.size, + h264_ctx->priv_tbl.cpu, h264_ctx->priv_tbl.dma); + kfree(h264_ctx); +} + +static void rkvdec_h264_run_preamble(struct rkvdec_ctx *ctx, + struct rkvdec_h264_run *run) +{ + struct v4l2_ctrl *ctrl; + + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS); + run->decode_params = ctrl ? ctrl->p_cur.p : NULL; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS); + run->slices_params = ctrl ? ctrl->p_cur.p : NULL; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_MPEG_VIDEO_H264_SPS); + run->sps = ctrl ? ctrl->p_cur.p : NULL; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_MPEG_VIDEO_H264_PPS); + run->pps = ctrl ? ctrl->p_cur.p : NULL; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX); + run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL; + + rkvdec_run_preamble(ctx, &run->base); +} + +static int rkvdec_h264_run(struct rkvdec_ctx *ctx) +{ + struct v4l2_h264_reflist_builder reflist_builder; + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + struct rkvdec_h264_run run; + + rkvdec_h264_run_preamble(ctx, &run); + + /* Build the P/B{0,1} ref lists. */ + v4l2_h264_init_reflist_builder(&reflist_builder, run.decode_params, + &run.slices_params[0], run.sps, + run.decode_params->dpb); + h264_ctx->reflists.num_valid = reflist_builder.num_valid; + v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); + v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, + h264_ctx->reflists.b1); + + reorder_scaling_list(ctx, &run); + assemble_hw_pps(ctx, &run); + assemble_hw_rps(ctx, &run); + config_registers(ctx, &run); + + rkvdec_run_postamble(ctx, &run.base); + + schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); + + writel(0xffffffff, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); + writel(0xffffffff, rkvdec->regs + RKVDEC_REG_H264_ERR_E); + writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); + writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); + + /* Start decoding! */ + writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | + RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, + rkvdec->regs + RKVDEC_REG_INTERRUPT); + + return 0; +} + +const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops = { + .adjust_fmt = rkvdec_h264_adjust_fmt, + .start = rkvdec_h264_start, + .stop = rkvdec_h264_stop, + .run = rkvdec_h264_run, +}; diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h new file mode 100644 index 0000000000000..15b9bee92016c --- /dev/null +++ b/drivers/staging/media/rkvdec/rkvdec-regs.h @@ -0,0 +1,223 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef RKVDEC_REGS_H_ +#define RKVDEC_REGS_H_ + +/* rkvcodec registers */ +#define RKVDEC_REG_INTERRUPT 0x004 +#define RKVDEC_INTERRUPT_DEC_E BIT(0) +#define RKVDEC_CONFIG_DEC_CLK_GATE_E BIT(1) +#define RKVDEC_E_STRMD_CLKGATE_DIS BIT(2) +#define RKVDEC_TIMEOUT_MODE BIT(3) +#define RKVDEC_IRQ_DIS BIT(4) +#define RKVDEC_TIMEOUT_E BIT(5) +#define RKVDEC_BUF_EMPTY_E BIT(6) +#define RKVDEC_STRM_E_WAITDECFIFO_EMPTY BIT(7) +#define RKVDEC_IRQ BIT(8) +#define RKVDEC_IRQ_RAW BIT(9) +#define RKVDEC_E_REWRITE_VALID BIT(10) +#define RKVDEC_COMMONIRQ_MODE BIT(11) +#define RKVDEC_RDY_STA BIT(12) +#define RKVDEC_BUS_STA BIT(13) +#define RKVDEC_ERR_STA BIT(14) +#define RKVDEC_TIMEOUT_STA BIT(15) +#define RKVDEC_BUF_EMPTY_STA BIT(16) +#define RKVDEC_COLMV_REF_ERR_STA BIT(17) +#define RKVDEC_CABU_END_STA BIT(18) +#define RKVDEC_H264ORVP9_ERR_MODE BIT(19) +#define RKVDEC_SOFTRST_EN_P BIT(20) +#define RKVDEC_FORCE_SOFTRESET_VALID BIT(21) +#define RKVDEC_SOFTRESET_RDY BIT(22) + +#define RKVDEC_REG_SYSCTRL 0x008 +#define RKVDEC_IN_ENDIAN BIT(0) +#define RKVDEC_IN_SWAP32_E BIT(1) +#define RKVDEC_IN_SWAP64_E BIT(2) +#define RKVDEC_STR_ENDIAN BIT(3) +#define RKVDEC_STR_SWAP32_E BIT(4) +#define RKVDEC_STR_SWAP64_E BIT(5) +#define RKVDEC_OUT_ENDIAN BIT(6) +#define RKVDEC_OUT_SWAP32_E BIT(7) +#define RKVDEC_OUT_CBCR_SWAP BIT(8) +#define RKVDEC_RLC_MODE_DIRECT_WRITE BIT(10) +#define RKVDEC_RLC_MODE BIT(11) +#define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12) +#define RKVDEC_MODE(x) (((x) & 0x03) << 20) +#define RKVDEC_MODE_H264 1 +#define RKVDEC_MODE_VP9 2 +#define RKVDEC_RPS_MODE BIT(24) +#define RKVDEC_STRM_MODE BIT(25) +#define RKVDEC_H264_STRM_LASTPKT BIT(26) +#define RKVDEC_H264_FIRSTSLICE_FLAG BIT(27) +#define RKVDEC_H264_FRAME_ORSLICE BIT(28) +#define RKVDEC_BUSPR_SLOT_DIS BIT(29) + +#define RKVDEC_REG_PICPAR 0x00C +#define RKVDEC_Y_HOR_VIRSTRIDE(x) ((x) & 0x1ff) +#define RKVDEC_SLICE_NUM_HIGHBIT BIT(11) +#define RKVDEC_UV_HOR_VIRSTRIDE(x) (((x) & 0x1ff) << 12) +#define RKVDEC_SLICE_NUM_LOWBITS(x) (((x) & 0x7ff) << 21) + +#define RKVDEC_REG_STRM_RLC_BASE 0x010 + +#define RKVDEC_REG_STRM_LEN 0x014 +#define RKVDEC_STRM_LEN(x) ((x) & 0x7ffffff) + +#define RKVDEC_REG_CABACTBL_PROB_BASE 0x018 +#define RKVDEC_REG_DECOUT_BASE 0x01C + +#define RKVDEC_REG_Y_VIRSTRIDE 0x020 +#define RKVDEC_Y_VIRSTRIDE(x) ((x) & 0xfffff) + +#define RKVDEC_REG_YUV_VIRSTRIDE 0x024 +#define RKVDEC_YUV_VIRSTRIDE(x) ((x) & 0x1fffff) +#define RKVDEC_REG_H264_BASE_REFER(i) (((i) * 0x04) + 0x028) + +#define RKVDEC_REG_H264_BASE_REFER15 0x0C0 +#define RKVDEC_FIELD_REF BIT(0) +#define RKVDEC_TOPFIELD_USED_REF BIT(1) +#define RKVDEC_BOTFIELD_USED_REF BIT(2) +#define RKVDEC_COLMV_USED_FLAG_REF BIT(3) + +#define RKVDEC_REG_VP9_LAST_FRAME_BASE 0x02c +#define RKVDEC_REG_VP9_GOLDEN_FRAME_BASE 0x030 +#define RKVDEC_REG_VP9_ALTREF_FRAME_BASE 0x034 + +#define RKVDEC_REG_VP9_CPRHEADER_OFFSET 0x028 +#define RKVDEC_VP9_CPRHEADER_OFFSET(x) ((x) & 0xffff) + +#define RKVDEC_REG_VP9_REFERLAST_BASE 0x02C +#define RKVDEC_REG_VP9_REFERGOLDEN_BASE 0x030 +#define RKVDEC_REG_VP9_REFERALFTER_BASE 0x034 + +#define RKVDEC_REG_VP9COUNT_BASE 0x038 +#define RKVDEC_VP9COUNT_UPDATE_EN BIT(0) + +#define RKVDEC_REG_VP9_SEGIDLAST_BASE 0x03C +#define RKVDEC_REG_VP9_SEGIDCUR_BASE 0x040 +#define RKVDEC_REG_VP9_FRAME_SIZE(i) ((i) * 0x04 + 0x044) +#define RKVDEC_VP9_FRAMEWIDTH(x) (((x) & 0xffff) << 0) +#define RKVDEC_VP9_FRAMEHEIGHT(x) (((x) & 0xffff) << 16) + +#define RKVDEC_VP9_SEGID_GRP(i) ((i) * 0x04 + 0x050) +#define RKVDEC_SEGID_ABS_DELTA(x) ((x) & 0x1) +#define RKVDEC_SEGID_FRAME_QP_DELTA_EN(x) (((x) & 0x1) << 1) +#define RKVDEC_SEGID_FRAME_QP_DELTA(x) (((x) & 0x1ff) << 2) +#define RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(x) (((x) & 0x1) << 11) +#define RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(x) (((x) & 0x7f) << 12) +#define RKVDEC_SEGID_REFERINFO_EN(x) (((x) & 0x1) << 19) +#define RKVDEC_SEGID_REFERINFO(x) (((x) & 0x03) << 20) +#define RKVDEC_SEGID_FRAME_SKIP_EN(x) (((x) & 0x1) << 22) + +#define RKVDEC_VP9_CPRHEADER_CONFIG 0x070 +#define RKVDEC_VP9_TX_MODE(x) ((x) & 0x07) +#define RKVDEC_VP9_FRAME_REF_MODE(x) (((x) & 0x03) << 3) + +#define RKVDEC_VP9_REF_SCALE(i) ((i) * 0x04 + 0x074) +#define RKVDEC_VP9_REF_HOR_SCALE(x) ((x) & 0xffff) +#define RKVDEC_VP9_REF_VER_SCALE(x) (((x) & 0xffff) << 16) + +#define RKVDEC_VP9_REF_DELTAS_LASTFRAME 0x080 +#define RKVDEC_REF_DELTAS_LASTFRAME(pos, val) (((val) & 0x7f) << ((pos) * 7)) + +#define RKVDEC_VP9_INFO_LASTFRAME 0x084 +#define RKVDEC_MODE_DELTAS_LASTFRAME(pos, val) (((val) & 0x7f) << ((pos) * 7)) +#define RKVDEC_SEG_EN_LASTFRAME BIT(16) +#define RKVDEC_LAST_SHOW_FRAME BIT(17) +#define RKVDEC_LAST_INTRA_ONLY BIT(18) +#define RKVDEC_LAST_WIDHHEIGHT_EQCUR BIT(19) +#define RKVDEC_COLOR_SPACE_LASTKEYFRAME(x) (((x) & 0x07) << 20) + +#define RKVDEC_VP9_INTERCMD_BASE 0x088 + +#define RKVDEC_VP9_INTERCMD_NUM 0x08C +#define RKVDEC_INTERCMD_NUM(x) ((x) & 0xffffff) + +#define RKVDEC_VP9_LASTTILE_SIZE 0x090 +#define RKVDEC_LASTTILE_SIZE(x) ((x) & 0xffffff) + +#define RKVDEC_VP9_HOR_VIRSTRIDE(i) ((i) * 0x04 + 0x094) +#define RKVDEC_HOR_Y_VIRSTRIDE(x) ((x) & 0x1ff) +#define RKVDEC_HOR_UV_VIRSTRIDE(x) (((x) & 0x1ff) << 16) + +#define RKVDEC_REG_H264_POC_REFER0(i) (((i) * 0x04) + 0x064) +#define RKVDEC_REG_H264_POC_REFER1(i) (((i) * 0x04) + 0x0C4) +#define RKVDEC_REG_H264_POC_REFER2(i) (((i) * 0x04) + 0x120) +#define RKVDEC_POC_REFER(x) ((x) & 0xffffffff) + +#define RKVDEC_REG_CUR_POC0 0x0A0 +#define RKVDEC_REG_CUR_POC1 0x128 +#define RKVDEC_CUR_POC(x) ((x) & 0xffffffff) + +#define RKVDEC_REG_RLCWRITE_BASE 0x0A4 +#define RKVDEC_REG_PPS_BASE 0x0A8 +#define RKVDEC_REG_RPS_BASE 0x0AC + +#define RKVDEC_REG_STRMD_ERR_EN 0x0B0 +#define RKVDEC_STRMD_ERR_EN(x) ((x) & 0xffffffff) + +#define RKVDEC_REG_STRMD_ERR_STA 0x0B4 +#define RKVDEC_STRMD_ERR_STA(x) ((x) & 0xfffffff) +#define RKVDEC_COLMV_ERR_REF_PICIDX(x) (((x) & 0x0f) << 28) + +#define RKVDEC_REG_STRMD_ERR_CTU 0x0B8 +#define RKVDEC_STRMD_ERR_CTU(x) ((x) & 0xff) +#define RKVDEC_STRMD_ERR_CTU_YOFFSET(x) (((x) & 0xff) << 8) +#define RKVDEC_STRMFIFO_SPACE2FULL(x) (((x) & 0x7f) << 16) +#define RKVDEC_VP9_ERR_EN_CTU0 BIT(24) + +#define RKVDEC_REG_SAO_CTU_POS 0x0BC +#define RKVDEC_SAOWR_XOFFSET(x) ((x) & 0x1ff) +#define RKVDEC_SAOWR_YOFFSET(x) (((x) & 0x3ff) << 16) + +#define RKVDEC_VP9_LAST_FRAME_YSTRIDE 0x0C0 +#define RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE 0x0C4 +#define RKVDEC_VP9_ALTREF_FRAME_YSTRIDE 0x0C8 +#define RKVDEC_VP9_REF_YSTRIDE(x) (((x) & 0xfffff) << 0) + +#define RKVDEC_VP9_LAST_FRAME_YUVSTRIDE 0x0CC +#define RKVDEC_VP9_REF_YUVSTRIDE(x) (((x) & 0x1fffff) << 0) + +#define RKVDEC_VP9_REF_COLMV_BASE 0x0D0 + +#define RKVDEC_REG_PERFORMANCE_CYCLE 0x100 +#define RKVDEC_PERFORMANCE_CYCLE(x) ((x) & 0xffffffff) + +#define RKVDEC_REG_AXI_DDR_RDATA 0x104 +#define RKVDEC_AXI_DDR_RDATA(x) ((x) & 0xffffffff) + +#define RKVDEC_REG_AXI_DDR_WDATA 0x108 +#define RKVDEC_AXI_DDR_WDATA(x) ((x) & 0xffffffff) + +#define RKVDEC_REG_FPGADEBUG_RESET 0x10C +#define RKVDEC_BUSIFD_RESETN BIT(0) +#define RKVDEC_CABAC_RESETN BIT(1) +#define RKVDEC_DEC_CTRL_RESETN BIT(2) +#define RKVDEC_TRANSD_RESETN BIT(3) +#define RKVDEC_INTRA_RESETN BIT(4) +#define RKVDEC_INTER_RESETN BIT(5) +#define RKVDEC_RECON_RESETN BIT(6) +#define RKVDEC_FILER_RESETN BIT(7) + +#define RKVDEC_REG_PERFORMANCE_SEL 0x110 +#define RKVDEC_PERF_SEL_CNT0(x) ((x) & 0x3f) +#define RKVDEC_PERF_SEL_CNT1(x) (((x) & 0x3f) << 8) +#define RKVDEC_PERF_SEL_CNT2(x) (((x) & 0x3f) << 16) + +#define RKVDEC_REG_PERFORMANCE_CNT(i) ((i) * 0x04 + 0x114) +#define RKVDEC_PERF_CNT(x) ((x) & 0xffffffff) + +#define RKVDEC_REG_H264_ERRINFO_BASE 0x12C + +#define RKVDEC_REG_H264_ERRINFO_NUM 0x130 +#define RKVDEC_SLICEDEC_NUM(x) ((x) & 0x3fff) +#define RKVDEC_STRMD_DECT_ERR_FLAG BIT(15) +#define RKVDEC_ERR_PKT_NUM(x) (((x) & 0x3fff) << 16) + +#define RKVDEC_REG_H264_ERR_E 0x134 +#define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff) + +#define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410 +#define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450 + +#endif /* RKVDEC_REGS_H_ */ diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c new file mode 100644 index 0000000000000..225eeca73356e --- /dev/null +++ b/drivers/staging/media/rkvdec/rkvdec.c @@ -0,0 +1,1103 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Video Decoder driver + * + * Copyright (C) 2019 Collabora, Ltd. + * + * Based on rkvdec driver by Google LLC. (Tomasz Figa ) + * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "rkvdec.h" +#include "rkvdec-regs.h" + +static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { + { + .per_request = true, + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS, + }, + { + .per_request = true, + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS, + }, + { + .per_request = true, + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SPS, + }, + { + .per_request = true, + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_PPS, + }, + { + .per_request = true, + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX, + }, + { + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE, + .cfg.min = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, + .cfg.max = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, + .cfg.def = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, + }, + { + .mandatory = true, + .cfg.id = V4L2_CID_MPEG_VIDEO_H264_START_CODE, + .cfg.min = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, + .cfg.def = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, + .cfg.max = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, + }, +}; + +static const struct rkvdec_ctrls rkvdec_h264_ctrls = { + .ctrls = rkvdec_h264_ctrl_descs, + .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), +}; + +static const u32 rkvdec_h264_decoded_fmts[] = { + V4L2_PIX_FMT_NV12, +}; + +static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_H264_SLICE, + .frmsize = { + .min_width = 48, + .max_width = 4096, + .step_width = 16, + .min_height = 48, + .max_height = 2304, + .step_height = 16, + }, + .ctrls = &rkvdec_h264_ctrls, + .ops = &rkvdec_h264_fmt_ops, + .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), + .decoded_fmts = rkvdec_h264_decoded_fmts, + } +}; + +static const struct rkvdec_coded_fmt_desc * +rkvdec_find_coded_fmt_desc(u32 fourcc) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) { + if (rkvdec_coded_fmts[i].fourcc == fourcc) + return &rkvdec_coded_fmts[i]; + } + + return NULL; +} + +static void rkvdec_reset_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f, + u32 fourcc) +{ + memset(f, 0, sizeof(*f)); + f->fmt.pix_mp.pixelformat = fourcc; + f->fmt.pix_mp.field = V4L2_FIELD_NONE; + f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_REC709, + f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; + f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; +} + +static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx) +{ + struct v4l2_format *f = &ctx->coded_fmt; + + ctx->coded_fmt_desc = &rkvdec_coded_fmts[0]; + rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->fourcc); + + f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; + f->fmt.pix_mp.width = ctx->coded_fmt_desc->frmsize.min_width; + f->fmt.pix_mp.height = ctx->coded_fmt_desc->frmsize.min_height; + + if (ctx->coded_fmt_desc->ops->adjust_fmt) + ctx->coded_fmt_desc->ops->adjust_fmt(ctx, f); +} + +static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx) +{ + struct v4l2_format *f = &ctx->decoded_fmt; + + rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]); + f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + v4l2_fill_pixfmt_mp(&f->fmt.pix_mp, + ctx->coded_fmt_desc->decoded_fmts[0], + ctx->coded_fmt.fmt.pix_mp.width, + ctx->coded_fmt.fmt.pix_mp.height); + f->fmt.pix_mp.plane_fmt[0].sizeimage += 128 * + DIV_ROUND_UP(f->fmt.pix_mp.width, 16) * + DIV_ROUND_UP(f->fmt.pix_mp.height, 16); +} + +static int rkvdec_enum_framesizes(struct file *file, void *priv, + struct v4l2_frmsizeenum *fsize) +{ + const struct rkvdec_coded_fmt_desc *fmt; + + if (fsize->index != 0) + return -EINVAL; + + fmt = rkvdec_find_coded_fmt_desc(fsize->pixel_format); + if (!fmt) + return -EINVAL; + + fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + fsize->stepwise = fmt->frmsize; + return 0; +} + +static int rkvdec_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + struct rkvdec_dev *rkvdec = video_drvdata(file); + struct video_device *vdev = video_devdata(file); + + strscpy(cap->driver, rkvdec->dev->driver->name, + sizeof(cap->driver)); + strscpy(cap->card, vdev->name, sizeof(cap->card)); + snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", + rkvdec->dev->driver->name); + return 0; +} + +static int rkvdec_try_capture_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + const struct rkvdec_coded_fmt_desc *coded_desc; + unsigned int i; + + /* + * The codec context should point to a coded format desc, if the format + * on the coded end has not been set yet, it should point to the + * default value. + */ + coded_desc = ctx->coded_fmt_desc; + if (WARN_ON(!coded_desc)) + return -EINVAL; + + for (i = 0; i < coded_desc->num_decoded_fmts; i++) { + if (coded_desc->decoded_fmts[i] == pix_mp->pixelformat) + break; + } + + if (i == coded_desc->num_decoded_fmts) + pix_mp->pixelformat = coded_desc->decoded_fmts[0]; + + /* Always apply the frmsize constraint of the coded end. */ + v4l2_apply_frmsize_constraints(&pix_mp->width, + &pix_mp->height, + &coded_desc->frmsize); + + v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat, + pix_mp->width, pix_mp->height); + pix_mp->plane_fmt[0].sizeimage += + 128 * + DIV_ROUND_UP(pix_mp->width, 16) * + DIV_ROUND_UP(pix_mp->height, 16); + pix_mp->field = V4L2_FIELD_NONE; + + return 0; +} + +static int rkvdec_try_output_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + const struct rkvdec_coded_fmt_desc *desc; + + desc = rkvdec_find_coded_fmt_desc(pix_mp->pixelformat); + if (!desc) { + pix_mp->pixelformat = rkvdec_coded_fmts[0].fourcc; + desc = &rkvdec_coded_fmts[0]; + } + + v4l2_apply_frmsize_constraints(&pix_mp->width, + &pix_mp->height, + &desc->frmsize); + + pix_mp->field = V4L2_FIELD_NONE; + /* All coded formats are considered single planar for now. */ + pix_mp->num_planes = 1; + + if (desc->ops->adjust_fmt) { + int ret; + + ret = desc->ops->adjust_fmt(ctx, f); + if (ret) + return ret; + } + + return 0; +} + +static int rkvdec_s_fmt(struct file *file, void *priv, + struct v4l2_format *f, + int (*try_fmt)(struct file *, void *, + struct v4l2_format *)) +{ + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + struct vb2_queue *vq; + + if (!try_fmt) + return -EINVAL; + + vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); + if (vb2_is_busy(vq)) + return -EBUSY; + + return try_fmt(file, priv, f); +} + +static int rkvdec_s_capture_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + int ret; + + ret = rkvdec_s_fmt(file, priv, f, rkvdec_try_capture_fmt); + if (ret) + return ret; + + ctx->decoded_fmt = *f; + return 0; +} + +static int rkvdec_s_output_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + const struct rkvdec_coded_fmt_desc *desc; + struct v4l2_format *cap_fmt; + struct vb2_queue *peer_vq; + int ret; + + /* + * Since format change on the OUTPUT queue will reset the CAPTURE + * queue, we can't allow doing so when the CAPTURE queue has buffers + * allocated. + */ + peer_vq = v4l2_m2m_get_vq(m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); + if (vb2_is_busy(peer_vq)) + return -EBUSY; + + ret = rkvdec_s_fmt(file, priv, f, rkvdec_try_output_fmt); + if (ret) + return ret; + + desc = rkvdec_find_coded_fmt_desc(f->fmt.pix_mp.pixelformat); + if (!desc) + return -EINVAL; + ctx->coded_fmt_desc = desc; + ctx->coded_fmt = *f; + + /* + * Current decoded format might have become invalid with newly + * selected codec, so reset it to default just to be safe and + * keep internal driver state sane. User is mandated to set + * the decoded format again after we return, so we don't need + * anything smarter. + * + * Note that this will propagates any size changes to the decoded format. + */ + rkvdec_reset_decoded_fmt(ctx); + + /* Propagate colorspace information to capture. */ + cap_fmt = &ctx->decoded_fmt; + cap_fmt->fmt.pix_mp.colorspace = f->fmt.pix_mp.colorspace; + cap_fmt->fmt.pix_mp.xfer_func = f->fmt.pix_mp.xfer_func; + cap_fmt->fmt.pix_mp.ycbcr_enc = f->fmt.pix_mp.ycbcr_enc; + cap_fmt->fmt.pix_mp.quantization = f->fmt.pix_mp.quantization; + + return 0; +} + +static int rkvdec_g_output_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + + *f = ctx->coded_fmt; + return 0; +} + +static int rkvdec_g_capture_fmt(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + + *f = ctx->decoded_fmt; + return 0; +} + +static int rkvdec_enum_output_fmt(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + if (f->index >= ARRAY_SIZE(rkvdec_coded_fmts)) + return -EINVAL; + + f->pixelformat = rkvdec_coded_fmts[f->index].fourcc; + return 0; +} + +static int rkvdec_enum_capture_fmt(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv); + + if (WARN_ON(!ctx->coded_fmt_desc)) + return -EINVAL; + + if (f->index >= ctx->coded_fmt_desc->num_decoded_fmts) + return -EINVAL; + + f->pixelformat = ctx->coded_fmt_desc->decoded_fmts[f->index]; + return 0; +} + +static const struct v4l2_ioctl_ops rkvdec_ioctl_ops = { + .vidioc_querycap = rkvdec_querycap, + .vidioc_enum_framesizes = rkvdec_enum_framesizes, + + .vidioc_try_fmt_vid_cap_mplane = rkvdec_try_capture_fmt, + .vidioc_try_fmt_vid_out_mplane = rkvdec_try_output_fmt, + .vidioc_s_fmt_vid_out_mplane = rkvdec_s_output_fmt, + .vidioc_s_fmt_vid_cap_mplane = rkvdec_s_capture_fmt, + .vidioc_g_fmt_vid_out_mplane = rkvdec_g_output_fmt, + .vidioc_g_fmt_vid_cap_mplane = rkvdec_g_capture_fmt, + .vidioc_enum_fmt_vid_out = rkvdec_enum_output_fmt, + .vidioc_enum_fmt_vid_cap = rkvdec_enum_capture_fmt, + + .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, + .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, + .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, + .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, + .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, + .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, + .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, + + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, + + .vidioc_streamon = v4l2_m2m_ioctl_streamon, + .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, +}; + +static int rkvdec_queue_setup(struct vb2_queue *vq, unsigned int *num_buffers, + unsigned int *num_planes, unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct rkvdec_ctx *ctx = vb2_get_drv_priv(vq); + struct v4l2_format *f; + unsigned int i; + + if (V4L2_TYPE_IS_OUTPUT(vq->type)) + f = &ctx->coded_fmt; + else + f = &ctx->decoded_fmt; + + if (*num_planes) { + if (*num_planes != f->fmt.pix_mp.num_planes) + return -EINVAL; + + for (i = 0; i < f->fmt.pix_mp.num_planes; i++) { + if (sizes[i] < f->fmt.pix_mp.plane_fmt[i].sizeimage) + return -EINVAL; + } + } else { + *num_planes = f->fmt.pix_mp.num_planes; + for (i = 0; i < f->fmt.pix_mp.num_planes; i++) + sizes[i] = f->fmt.pix_mp.plane_fmt[i].sizeimage; + } + + return 0; +} + +static int rkvdec_buf_prepare(struct vb2_buffer *vb) +{ + struct vb2_queue *vq = vb->vb2_queue; + struct rkvdec_ctx *ctx = vb2_get_drv_priv(vq); + struct v4l2_format *f; + unsigned int i; + + if (V4L2_TYPE_IS_OUTPUT(vq->type)) + f = &ctx->coded_fmt; + else + f = &ctx->decoded_fmt; + + for (i = 0; i < f->fmt.pix_mp.num_planes; ++i) { + u32 sizeimage = f->fmt.pix_mp.plane_fmt[i].sizeimage; + + if (vb2_plane_size(vb, i) < sizeimage) + return -EINVAL; + } + vb2_set_plane_payload(vb, 0, f->fmt.pix_mp.plane_fmt[0].sizeimage); + return 0; +} + +static void rkvdec_buf_queue(struct vb2_buffer *vb) +{ + struct rkvdec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); +} + +static int rkvdec_buf_out_validate(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + + vbuf->field = V4L2_FIELD_NONE; + return 0; +} + +static void rkvdec_buf_request_complete(struct vb2_buffer *vb) +{ + struct rkvdec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); + + v4l2_ctrl_request_complete(vb->req_obj.req, &ctx->ctrl_hdl); +} + +static int rkvdec_start_streaming(struct vb2_queue *q, unsigned int count) +{ + struct rkvdec_ctx *ctx = vb2_get_drv_priv(q); + const struct rkvdec_coded_fmt_desc *desc; + int ret; + + if (!V4L2_TYPE_IS_OUTPUT(q->type)) + return 0; + + desc = ctx->coded_fmt_desc; + if (WARN_ON(!desc)) + return -EINVAL; + + if (desc->ops->start) { + ret = desc->ops->start(ctx); + if (ret) + return ret; + } + + return 0; +} + +static void rkvdec_queue_cleanup(struct vb2_queue *vq, u32 state) +{ + struct rkvdec_ctx *ctx = vb2_get_drv_priv(vq); + + while (true) { + struct vb2_v4l2_buffer *vbuf; + + if (V4L2_TYPE_IS_OUTPUT(vq->type)) + vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); + else + vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); + + if (!vbuf) + break; + + v4l2_ctrl_request_complete(vbuf->vb2_buf.req_obj.req, + &ctx->ctrl_hdl); + v4l2_m2m_buf_done(vbuf, state); + } +} + +static void rkvdec_stop_streaming(struct vb2_queue *q) +{ + struct rkvdec_ctx *ctx = vb2_get_drv_priv(q); + + if (V4L2_TYPE_IS_OUTPUT(q->type)) { + const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc; + + if (WARN_ON(!desc)) + return; + + if (desc->ops->stop) + desc->ops->stop(ctx); + } + + rkvdec_queue_cleanup(q, VB2_BUF_STATE_ERROR); +} + +static const struct vb2_ops rkvdec_queue_ops = { + .queue_setup = rkvdec_queue_setup, + .buf_prepare = rkvdec_buf_prepare, + .buf_queue = rkvdec_buf_queue, + .buf_out_validate = rkvdec_buf_out_validate, + .buf_request_complete = rkvdec_buf_request_complete, + .start_streaming = rkvdec_start_streaming, + .stop_streaming = rkvdec_stop_streaming, + .wait_prepare = vb2_ops_wait_prepare, + .wait_finish = vb2_ops_wait_finish, +}; + +static int rkvdec_request_validate(struct media_request *req) +{ + struct media_request_object *obj; + const struct rkvdec_ctrls *ctrls; + struct v4l2_ctrl_handler *hdl; + struct rkvdec_ctx *ctx = NULL; + unsigned int count, i; + int ret; + + list_for_each_entry(obj, &req->objects, list) { + if (vb2_request_object_is_buffer(obj)) { + struct vb2_buffer *vb; + + vb = container_of(obj, struct vb2_buffer, req_obj); + ctx = vb2_get_drv_priv(vb->vb2_queue); + break; + } + } + + if (!ctx) + return -EINVAL; + + count = vb2_request_buffer_cnt(req); + if (!count) + return -ENOENT; + else if (count > 1) + return -EINVAL; + + hdl = v4l2_ctrl_request_hdl_find(req, &ctx->ctrl_hdl); + if (!hdl) + return -ENOENT; + + ret = 0; + ctrls = ctx->coded_fmt_desc->ctrls; + for (i = 0; ctrls && i < ctrls->num_ctrls; i++) { + u32 id = ctrls->ctrls[i].cfg.id; + struct v4l2_ctrl *ctrl; + + if (!ctrls->ctrls[i].per_request || !ctrls->ctrls[i].mandatory) + continue; + + ctrl = v4l2_ctrl_request_hdl_ctrl_find(hdl, id); + if (!ctrl) { + ret = -ENOENT; + break; + } + } + + v4l2_ctrl_request_hdl_put(hdl); + + if (ret) + return ret; + + return vb2_request_validate(req); +} + +static const struct media_device_ops rkvdec_media_ops = { + .req_validate = rkvdec_request_validate, + .req_queue = v4l2_m2m_request_queue, +}; + +static void rkvdec_job_finish_no_pm(struct rkvdec_ctx *ctx, + enum vb2_buffer_state result) +{ + if (ctx->coded_fmt_desc->ops->done) { + struct vb2_v4l2_buffer *src_buf, *dst_buf; + + src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + ctx->coded_fmt_desc->ops->done(ctx, src_buf, dst_buf, result); + } + + v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, + result); +} + +static void rkvdec_job_finish(struct rkvdec_ctx *ctx, + enum vb2_buffer_state result) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + + pm_runtime_mark_last_busy(rkvdec->dev); + pm_runtime_put_autosuspend(rkvdec->dev); + rkvdec_job_finish_no_pm(ctx, result); +} + +void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run) +{ + struct media_request *src_req; + + memset(run, 0, sizeof(*run)); + + run->bufs.src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); + run->bufs.dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); + + /* Apply request(s) controls if needed. */ + src_req = run->bufs.src->vb2_buf.req_obj.req; + if (src_req) + v4l2_ctrl_request_setup(src_req, &ctx->ctrl_hdl); + + v4l2_m2m_buf_copy_metadata(run->bufs.src, run->bufs.dst, true); +} + +void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run) +{ + struct media_request *src_req = run->bufs.src->vb2_buf.req_obj.req; + + if (src_req) + v4l2_ctrl_request_complete(src_req, &ctx->ctrl_hdl); +} + +static void rkvdec_device_run(void *priv) +{ + struct rkvdec_ctx *ctx = priv; + struct rkvdec_dev *rkvdec = ctx->dev; + const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc; + int ret; + + if (WARN_ON(!desc)) + return; + + ret = pm_runtime_get_sync(rkvdec->dev); + if (ret < 0) { + rkvdec_job_finish_no_pm(ctx, VB2_BUF_STATE_ERROR); + return; + } + + ret = desc->ops->run(ctx); + if (ret) + rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR); +} + +static struct v4l2_m2m_ops rkvdec_m2m_ops = { + .device_run = rkvdec_device_run, +}; + +static int rkvdec_queue_init(void *priv, + struct vb2_queue *src_vq, + struct vb2_queue *dst_vq) +{ + struct rkvdec_ctx *ctx = priv; + struct rkvdec_dev *rkvdec = ctx->dev; + int ret; + + src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; + src_vq->drv_priv = ctx; + src_vq->ops = &rkvdec_queue_ops; + src_vq->mem_ops = &vb2_dma_contig_memops; + + /* + * Driver does mostly sequential access, so sacrifice TLB efficiency + * for faster allocation. Also, no CPU access on the source queue, + * so no kernel mapping needed. + */ + src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES | + DMA_ATTR_NO_KERNEL_MAPPING; + src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + src_vq->lock = &rkvdec->vdev_lock; + src_vq->dev = rkvdec->v4l2_dev.dev; + src_vq->supports_requests = true; + src_vq->requires_requests = true; + + ret = vb2_queue_init(src_vq); + if (ret) + return ret; + + dst_vq->bidirectional = true; + dst_vq->mem_ops = &vb2_dma_contig_memops; + dst_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES | + DMA_ATTR_NO_KERNEL_MAPPING; + dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->drv_priv = ctx; + dst_vq->ops = &rkvdec_queue_ops; + dst_vq->buf_struct_size = sizeof(struct rkvdec_decoded_buffer); + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + dst_vq->lock = &rkvdec->vdev_lock; + dst_vq->dev = rkvdec->v4l2_dev.dev; + + return vb2_queue_init(dst_vq); +} + +static int rkvdec_add_ctrls(struct rkvdec_ctx *ctx, + const struct rkvdec_ctrls *ctrls) +{ + unsigned int i; + + for (i = 0; i < ctrls->num_ctrls; i++) { + const struct v4l2_ctrl_config *cfg = &ctrls->ctrls[i].cfg; + + v4l2_ctrl_new_custom(&ctx->ctrl_hdl, cfg, ctx); + if (ctx->ctrl_hdl.error) + return ctx->ctrl_hdl.error; + } + + return 0; +} + +static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx) +{ + unsigned int i, nctrls = 0; + int ret; + + for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) + nctrls += rkvdec_coded_fmts[i].ctrls->num_ctrls; + + v4l2_ctrl_handler_init(&ctx->ctrl_hdl, nctrls); + + for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) { + ret = rkvdec_add_ctrls(ctx, rkvdec_coded_fmts[i].ctrls); + if (ret) + goto err_free_handler; + } + + ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl); + if (ret) + goto err_free_handler; + + ctx->fh.ctrl_handler = &ctx->ctrl_hdl; + return 0; + +err_free_handler: + v4l2_ctrl_handler_free(&ctx->ctrl_hdl); + return ret; +} + +static int rkvdec_open(struct file *filp) +{ + struct rkvdec_dev *rkvdec = video_drvdata(filp); + struct rkvdec_ctx *ctx; + int ret; + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + ctx->dev = rkvdec; + rkvdec_reset_coded_fmt(ctx); + rkvdec_reset_decoded_fmt(ctx); + v4l2_fh_init(&ctx->fh, video_devdata(filp)); + + ret = rkvdec_init_ctrls(ctx); + if (ret) + goto err_free_ctx; + + ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(rkvdec->m2m_dev, ctx, + rkvdec_queue_init); + if (IS_ERR(ctx->fh.m2m_ctx)) { + ret = PTR_ERR(ctx->fh.m2m_ctx); + goto err_cleanup_ctrls; + } + + filp->private_data = &ctx->fh; + v4l2_fh_add(&ctx->fh); + + return 0; + +err_cleanup_ctrls: + v4l2_ctrl_handler_free(&ctx->ctrl_hdl); + +err_free_ctx: + kfree(ctx); + return ret; +} + +static int rkvdec_release(struct file *filp) +{ + struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(filp->private_data); + + v4l2_fh_del(&ctx->fh); + v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); + v4l2_ctrl_handler_free(&ctx->ctrl_hdl); + v4l2_fh_exit(&ctx->fh); + kfree(ctx); + + return 0; +} + +static const struct v4l2_file_operations rkvdec_fops = { + .owner = THIS_MODULE, + .open = rkvdec_open, + .release = rkvdec_release, + .poll = v4l2_m2m_fop_poll, + .unlocked_ioctl = video_ioctl2, + .mmap = v4l2_m2m_fop_mmap, +}; + +static int rkvdec_v4l2_init(struct rkvdec_dev *rkvdec) +{ + int ret; + + ret = v4l2_device_register(rkvdec->dev, &rkvdec->v4l2_dev); + if (ret) { + dev_err(rkvdec->dev, "Failed to register V4L2 device\n"); + return ret; + } + + rkvdec->m2m_dev = v4l2_m2m_init(&rkvdec_m2m_ops); + if (IS_ERR(rkvdec->m2m_dev)) { + v4l2_err(&rkvdec->v4l2_dev, "Failed to init mem2mem device\n"); + ret = PTR_ERR(rkvdec->m2m_dev); + goto err_unregister_v4l2; + } + + rkvdec->mdev.dev = rkvdec->dev; + strscpy(rkvdec->mdev.model, "rkvdec", sizeof(rkvdec->mdev.model)); + strscpy(rkvdec->mdev.bus_info, "platform:rkvdec", + sizeof(rkvdec->mdev.bus_info)); + media_device_init(&rkvdec->mdev); + rkvdec->mdev.ops = &rkvdec_media_ops; + rkvdec->v4l2_dev.mdev = &rkvdec->mdev; + + rkvdec->vdev.lock = &rkvdec->vdev_lock; + rkvdec->vdev.v4l2_dev = &rkvdec->v4l2_dev; + rkvdec->vdev.fops = &rkvdec_fops; + rkvdec->vdev.release = video_device_release_empty; + rkvdec->vdev.vfl_dir = VFL_DIR_M2M; + rkvdec->vdev.device_caps = V4L2_CAP_STREAMING | + V4L2_CAP_VIDEO_M2M_MPLANE; + rkvdec->vdev.ioctl_ops = &rkvdec_ioctl_ops; + video_set_drvdata(&rkvdec->vdev, rkvdec); + strscpy(rkvdec->vdev.name, "rkvdec", sizeof(rkvdec->vdev.name)); + + ret = video_register_device(&rkvdec->vdev, VFL_TYPE_VIDEO, -1); + if (ret) { + v4l2_err(&rkvdec->v4l2_dev, "Failed to register video device\n"); + goto err_cleanup_mc; + } + + ret = v4l2_m2m_register_media_controller(rkvdec->m2m_dev, &rkvdec->vdev, + MEDIA_ENT_F_PROC_VIDEO_DECODER); + if (ret) { + v4l2_err(&rkvdec->v4l2_dev, + "Failed to initialize V4L2 M2M media controller\n"); + goto err_unregister_vdev; + } + + ret = media_device_register(&rkvdec->mdev); + if (ret) { + v4l2_err(&rkvdec->v4l2_dev, "Failed to register media device\n"); + goto err_unregister_mc; + } + + return 0; + +err_unregister_mc: + v4l2_m2m_unregister_media_controller(rkvdec->m2m_dev); + +err_unregister_vdev: + video_unregister_device(&rkvdec->vdev); + +err_cleanup_mc: + media_device_cleanup(&rkvdec->mdev); + v4l2_m2m_release(rkvdec->m2m_dev); + +err_unregister_v4l2: + v4l2_device_unregister(&rkvdec->v4l2_dev); + return ret; +} + +static void rkvdec_v4l2_cleanup(struct rkvdec_dev *rkvdec) +{ + media_device_unregister(&rkvdec->mdev); + v4l2_m2m_unregister_media_controller(rkvdec->m2m_dev); + video_unregister_device(&rkvdec->vdev); + media_device_cleanup(&rkvdec->mdev); + v4l2_m2m_release(rkvdec->m2m_dev); + v4l2_device_unregister(&rkvdec->v4l2_dev); +} + +static irqreturn_t rkvdec_irq_handler(int irq, void *priv) +{ + struct rkvdec_dev *rkvdec = priv; + enum vb2_buffer_state state; + u32 status; + + status = readl(rkvdec->regs + RKVDEC_REG_INTERRUPT); + state = (status & RKVDEC_RDY_STA) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + writel(0, rkvdec->regs + RKVDEC_REG_INTERRUPT); + if (cancel_delayed_work(&rkvdec->watchdog_work)) { + struct rkvdec_ctx *ctx; + + ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev); + rkvdec_job_finish(ctx, state); + } + + return IRQ_HANDLED; +} + +static void rkvdec_watchdog_func(struct work_struct *work) +{ + struct rkvdec_dev *rkvdec; + struct rkvdec_ctx *ctx; + + rkvdec = container_of(to_delayed_work(work), struct rkvdec_dev, + watchdog_work); + ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev); + if (ctx) { + dev_err(rkvdec->dev, "Frame processing timed out!\n"); + writel(RKVDEC_IRQ_DIS, rkvdec->regs + RKVDEC_REG_INTERRUPT); + writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL); + rkvdec_job_finish(ctx, VB2_BUF_STATE_ERROR); + } +} + +static const struct of_device_id of_rkvdec_match[] = { + { .compatible = "rockchip,rk3399-vdec" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, of_rkvdec_match); + +static const char * const rkvdec_clk_names[] = { + "axi", "ahb", "cabac", "core" +}; + +static int rkvdec_probe(struct platform_device *pdev) +{ + struct rkvdec_dev *rkvdec; + struct resource *res; + unsigned int i; + int ret, irq; + + rkvdec = devm_kzalloc(&pdev->dev, sizeof(*rkvdec), GFP_KERNEL); + if (!rkvdec) + return -ENOMEM; + + platform_set_drvdata(pdev, rkvdec); + rkvdec->dev = &pdev->dev; + mutex_init(&rkvdec->vdev_lock); + INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func); + + rkvdec->clocks = devm_kcalloc(&pdev->dev, ARRAY_SIZE(rkvdec_clk_names), + sizeof(*rkvdec->clocks), GFP_KERNEL); + if (!rkvdec->clocks) + return -ENOMEM; + + for (i = 0; i < ARRAY_SIZE(rkvdec_clk_names); i++) + rkvdec->clocks[i].id = rkvdec_clk_names[i]; + + ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(rkvdec_clk_names), + rkvdec->clocks); + if (ret) + return ret; + + /* + * Bump ACLK to max. possible freq. (500 MHz) to improve performance + * When 4k video playback. + */ + clk_set_rate(rkvdec->clocks[0].clk, 500 * 1000 * 1000); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + rkvdec->regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(rkvdec->regs)) + return PTR_ERR(rkvdec->regs); + + ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(&pdev->dev, "Could not set DMA coherent mask.\n"); + return ret; + } + + vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); + + irq = platform_get_irq(pdev, 0); + if (irq <= 0) { + dev_err(&pdev->dev, "Could not get vdec IRQ\n"); + return -ENXIO; + } + + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + rkvdec_irq_handler, IRQF_ONESHOT, + dev_name(&pdev->dev), rkvdec); + if (ret) { + dev_err(&pdev->dev, "Could not request vdec IRQ\n"); + return ret; + } + + pm_runtime_set_autosuspend_delay(&pdev->dev, 100); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_enable(&pdev->dev); + + ret = rkvdec_v4l2_init(rkvdec); + if (ret) + goto err_disable_runtime_pm; + + return 0; + +err_disable_runtime_pm: + pm_runtime_dont_use_autosuspend(&pdev->dev); + pm_runtime_disable(&pdev->dev); + return ret; +} + +static int rkvdec_remove(struct platform_device *pdev) +{ + struct rkvdec_dev *rkvdec = platform_get_drvdata(pdev); + + rkvdec_v4l2_cleanup(rkvdec); + pm_runtime_disable(&pdev->dev); + pm_runtime_dont_use_autosuspend(&pdev->dev); + return 0; +} + +#ifdef CONFIG_PM +static int rkvdec_runtime_resume(struct device *dev) +{ + struct rkvdec_dev *rkvdec = dev_get_drvdata(dev); + + return clk_bulk_prepare_enable(ARRAY_SIZE(rkvdec_clk_names), + rkvdec->clocks); +} + +static int rkvdec_runtime_suspend(struct device *dev) +{ + struct rkvdec_dev *rkvdec = dev_get_drvdata(dev); + + clk_bulk_disable_unprepare(ARRAY_SIZE(rkvdec_clk_names), + rkvdec->clocks); + return 0; +} +#endif + +static const struct dev_pm_ops rkvdec_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(rkvdec_runtime_suspend, rkvdec_runtime_resume, NULL) +}; + +static struct platform_driver rkvdec_driver = { + .probe = rkvdec_probe, + .remove = rkvdec_remove, + .driver = { + .name = "rkvdec", + .of_match_table = of_match_ptr(of_rkvdec_match), + .pm = &rkvdec_pm_ops, + }, +}; +module_platform_driver(rkvdec_driver); + +MODULE_AUTHOR("Boris Brezillon "); +MODULE_DESCRIPTION("Rockchip Video Decoder driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h new file mode 100644 index 0000000000000..2fc9f46b69100 --- /dev/null +++ b/drivers/staging/media/rkvdec/rkvdec.h @@ -0,0 +1,121 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip Video Decoder driver + * + * Copyright (C) 2019 Collabora, Ltd. + * + * Based on rkvdec driver by Google LLC. (Tomasz Figa ) + * Based on s5p-mfc driver by Samsung Electronics Co., Ltd. + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + */ +#ifndef RKVDEC_H_ +#define RKVDEC_H_ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +struct rkvdec_ctx; + +struct rkvdec_ctrl_desc { + u32 per_request : 1; + u32 mandatory : 1; + struct v4l2_ctrl_config cfg; +}; + +struct rkvdec_ctrls { + const struct rkvdec_ctrl_desc *ctrls; + unsigned int num_ctrls; +}; + +struct rkvdec_run { + struct { + struct vb2_v4l2_buffer *src; + struct vb2_v4l2_buffer *dst; + } bufs; +}; + +struct rkvdec_vp9_decoded_buffer_info { + /* Info needed when the decoded frame serves as a reference frame. */ + u16 width; + u16 height; + u32 bit_depth : 4; +}; + +struct rkvdec_decoded_buffer { + /* Must be the first field in this struct. */ + struct v4l2_m2m_buffer base; +}; + +static inline struct rkvdec_decoded_buffer * +vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf) +{ + return container_of(buf, struct rkvdec_decoded_buffer, + base.vb.vb2_buf); +} + +struct rkvdec_coded_fmt_ops { + int (*adjust_fmt)(struct rkvdec_ctx *ctx, + struct v4l2_format *f); + int (*start)(struct rkvdec_ctx *ctx); + void (*stop)(struct rkvdec_ctx *ctx); + int (*run)(struct rkvdec_ctx *ctx); + void (*done)(struct rkvdec_ctx *ctx, struct vb2_v4l2_buffer *src_buf, + struct vb2_v4l2_buffer *dst_buf, + enum vb2_buffer_state result); +}; + +struct rkvdec_coded_fmt_desc { + u32 fourcc; + struct v4l2_frmsize_stepwise frmsize; + const struct rkvdec_ctrls *ctrls; + const struct rkvdec_coded_fmt_ops *ops; + unsigned int num_decoded_fmts; + const u32 *decoded_fmts; +}; + +struct rkvdec_dev { + struct v4l2_device v4l2_dev; + struct media_device mdev; + struct video_device vdev; + struct v4l2_m2m_dev *m2m_dev; + struct device *dev; + struct clk_bulk_data *clocks; + void __iomem *regs; + struct mutex vdev_lock; /* serializes ioctls */ + struct delayed_work watchdog_work; +}; + +struct rkvdec_ctx { + struct v4l2_fh fh; + struct v4l2_format coded_fmt; + struct v4l2_format decoded_fmt; + const struct rkvdec_coded_fmt_desc *coded_fmt_desc; + struct v4l2_ctrl_handler ctrl_hdl; + struct rkvdec_dev *dev; + void *priv; +}; + +static inline struct rkvdec_ctx *fh_to_rkvdec_ctx(struct v4l2_fh *fh) +{ + return container_of(fh, struct rkvdec_ctx, fh); +} + +struct rkvdec_aux_buf { + void *cpu; + dma_addr_t dma; + size_t size; +}; + +void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); +void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); + +extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; +#endif /* RKVDEC_H_ */ -- GitLab From 5714e84fee5068c1829e2f6ab94fc40b0bb34eb5 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:03:55 +0100 Subject: [PATCH 215/503] media: si2157: Enable tuner status flags Enable flags to get status of commands sent to the tuner. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index 898e0f9f8b70d..12f88304ac0fd 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -230,6 +230,28 @@ static int si2157_init(struct dvb_frontend *fe) dev_info(&client->dev, "firmware version: %c.%c.%d\n", cmd.args[6], cmd.args[7], cmd.args[8]); + + /* enable tuner status flags */ + memcpy(cmd.args, "\x14\x00\x01\x05\x01\x00", 6); + cmd.wlen = 6; + cmd.rlen = 1; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + memcpy(cmd.args, "\x14\x00\x01\x06\x01\x00", 6); + cmd.wlen = 6; + cmd.rlen = 1; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + memcpy(cmd.args, "\x14\x00\x01\x07\x01\x00", 6); + cmd.wlen = 6; + cmd.rlen = 1; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; warm: /* init statistics in order signal app which are supported */ c->strength.len = 1; -- GitLab From 5741f4affb694653c2cec3d75aa4dd56cae2175b Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:03:56 +0100 Subject: [PATCH 216/503] media: si2157: Check error status bit on cmd execute Check error status bit on command execute, if error bit is set return -EAGAIN. Ignore -EAGAIN in probe during device check. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index 12f88304ac0fd..69c625eaee25b 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -47,14 +47,20 @@ static int si2157_cmd_execute(struct i2c_client *client, struct si2157_cmd *cmd) break; } - dev_dbg(&client->dev, "cmd execution took %d ms\n", - jiffies_to_msecs(jiffies) - - (jiffies_to_msecs(timeout) - TIMEOUT)); + dev_dbg(&client->dev, "cmd execution took %d ms, status=%x\n", + jiffies_to_msecs(jiffies) - + (jiffies_to_msecs(timeout) - TIMEOUT), + cmd->args[0]); if (!((cmd->args[0] >> 7) & 0x01)) { ret = -ETIMEDOUT; goto err_mutex_unlock; } + /* check error status bit */ + if (cmd->args[0] & 0x40) { + ret = -EAGAIN; + goto err_mutex_unlock; + } } mutex_unlock(&dev->i2c_mutex); @@ -106,7 +112,7 @@ static int si2157_init(struct dvb_frontend *fe) } cmd.rlen = 1; ret = si2157_cmd_execute(client, &cmd); - if (ret) + if (ret && (dev->chiptype != SI2157_CHIPTYPE_SI2141 || ret != -EAGAIN)) goto err; /* Si2141 needs a second command before it answers the revision query */ @@ -478,7 +484,7 @@ static int si2157_probe(struct i2c_client *client, cmd.wlen = 0; cmd.rlen = 1; ret = si2157_cmd_execute(client, &cmd); - if (ret) + if (ret && ret != -EAGAIN) goto err_kfree; memcpy(&fe->ops.tuner_ops, &si2157_ops, sizeof(struct dvb_tuner_ops)); -- GitLab From e955f959ac52e145f27ff2be9078b646d0352af0 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:03:57 +0100 Subject: [PATCH 217/503] media: si2157: Better check for running tuner in init Getting the Xtal trim property to check if running is less error prone. Reset if_frequency if state is unknown. Replaces the previous "garbage check". Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index 69c625eaee25b..e1e23e78fd191 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -81,24 +81,23 @@ static int si2157_init(struct dvb_frontend *fe) struct si2157_cmd cmd; const struct firmware *fw; const char *fw_name; - unsigned int uitmp, chip_id; + unsigned int chip_id, xtal_trim; dev_dbg(&client->dev, "\n"); - /* Returned IF frequency is garbage when firmware is not running */ - memcpy(cmd.args, "\x15\x00\x06\x07", 4); + /* Try to get Xtal trim property, to verify tuner still running */ + memcpy(cmd.args, "\x15\x00\x04\x02", 4); cmd.wlen = 4; cmd.rlen = 4; ret = si2157_cmd_execute(client, &cmd); - if (ret) - goto err; - uitmp = cmd.args[2] << 0 | cmd.args[3] << 8; - dev_dbg(&client->dev, "if_frequency kHz=%u\n", uitmp); + xtal_trim = cmd.args[2] | (cmd.args[3] << 8); - if (uitmp == dev->if_frequency / 1000) + if (ret == 0 && xtal_trim < 16) goto warm; + dev->if_frequency = 0; /* we no longer know current tuner state */ + /* power up */ if (dev->chiptype == SI2157_CHIPTYPE_SI2146) { memcpy(cmd.args, "\xc0\x05\x01\x00\x00\x0b\x00\x00\x01", 9); -- GitLab From 7e80a8d14d9ffa5fbd10652da9a2d93c1cefd6f9 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:03:58 +0100 Subject: [PATCH 218/503] media: si2157: Add analog tuning related functions Include set_analog_params, get_frequency, and get_bandwidth. Tested with NTSC and PAL standards via ch3/4 generator. Other standards are included, but are untested due to lack of generator. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 231 ++++++++++++++++++++++++++++- drivers/media/tuners/si2157_priv.h | 2 + 2 files changed, 230 insertions(+), 3 deletions(-) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index e1e23e78fd191..1dad465220336 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -371,7 +371,7 @@ static int si2157_set_params(struct dvb_frontend *fe) if (ret) goto err; - /* set if frequency if needed */ + /* set digital if frequency if needed */ if (if_frequency != dev->if_frequency) { memcpy(cmd.args, "\x14\x00\x06\x07", 4); cmd.args[4] = (if_frequency / 1000) & 0xff; @@ -385,7 +385,7 @@ static int si2157_set_params(struct dvb_frontend *fe) dev->if_frequency = if_frequency; } - /* set frequency */ + /* set digital frequency */ memcpy(cmd.args, "\x41\x00\x00\x00\x00\x00\x00\x00", 8); cmd.args[4] = (c->frequency >> 0) & 0xff; cmd.args[5] = (c->frequency >> 8) & 0xff; @@ -397,18 +397,240 @@ static int si2157_set_params(struct dvb_frontend *fe) if (ret) goto err; + dev->bandwidth = bandwidth; + dev->frequency = c->frequency; + return 0; err: + dev->bandwidth = 0; + dev->frequency = 0; + dev->if_frequency = 0; dev_dbg(&client->dev, "failed=%d\n", ret); return ret; } +static int si2157_set_analog_params(struct dvb_frontend *fe, + struct analog_parameters *params) +{ + struct i2c_client *client = fe->tuner_priv; + struct si2157_dev *dev = i2c_get_clientdata(client); + char *std; /* for debugging */ + int ret; + struct si2157_cmd cmd; + u32 bandwidth = 0; + u32 if_frequency = 0; + u32 freq = 0; + u64 tmp_lval = 0; + u8 system = 0; + u8 color = 0; /* 0=NTSC/PAL, 0x10=SECAM */ + u8 invert_analog = 1; /* analog tuner spectrum; 0=normal, 1=inverted */ + + if (dev->chiptype != SI2157_CHIPTYPE_SI2157) { + dev_info(&client->dev, "Analog tuning not supported for chiptype=%u\n", + dev->chiptype); + ret = -EINVAL; + goto err; + } + + if (!dev->active) + si2157_init(fe); + + if (!dev->active) { + ret = -EAGAIN; + goto err; + } + if (params->mode == V4L2_TUNER_RADIO) { + /* + * std = "fm"; + * bandwidth = 1700000; //best can do for FM, AGC will be a mess though + * if_frequency = 1250000; //HVR-225x(saa7164), HVR-12xx(cx23885) + * if_frequency = 6600000; //HVR-9xx(cx231xx) + * if_frequency = 5500000; //HVR-19xx(pvrusb2) + */ + dev_err(&client->dev, "si2157 does not currently support FM radio\n"); + ret = -EINVAL; + goto err; + } + tmp_lval = params->frequency * 625LL; + do_div(tmp_lval, 10); /* convert to HZ */ + freq = (u32)tmp_lval; + + if (freq < 1000000) /* is freq in KHz */ + freq = freq * 1000; + dev->frequency = freq; + + /* if_frequency values based on tda187271C2 */ + if (params->std & (V4L2_STD_B | V4L2_STD_GH)) { + if (freq >= 470000000) { + std = "palGH"; + bandwidth = 8000000; + if_frequency = 6000000; + system = 1; + if (params->std & + (V4L2_STD_SECAM_G | V4L2_STD_SECAM_H)) { + std = "secamGH"; + color = 0x10; + } + } else { + std = "palB"; + bandwidth = 7000000; + if_frequency = 6000000; + system = 0; + if (params->std & V4L2_STD_SECAM_B) { + std = "secamB"; + color = 0x10; + } + } + } else if (params->std & V4L2_STD_MN) { + std = "MN"; + bandwidth = 6000000; + if_frequency = 5400000; + system = 2; + } else if (params->std & V4L2_STD_PAL_I) { + std = "palI"; + bandwidth = 8000000; + if_frequency = 7250000; /* TODO: does not work yet */ + system = 4; + } else if (params->std & V4L2_STD_DK) { + std = "palDK"; + bandwidth = 8000000; + if_frequency = 6900000; /* TODO: does not work yet */ + system = 5; + if (params->std & V4L2_STD_SECAM_DK) { + std = "secamDK"; + color = 0x10; + } + } else if (params->std & V4L2_STD_SECAM_L) { + std = "secamL"; + bandwidth = 8000000; + if_frequency = 6750000; /* TODO: untested */ + system = 6; + color = 0x10; + } else if (params->std & V4L2_STD_SECAM_LC) { + std = "secamL'"; + bandwidth = 7000000; + if_frequency = 1250000; /* TODO: untested */ + system = 7; + color = 0x10; + } else { + std = "unknown"; + } + /* calc channel center freq */ + freq = freq - 1250000 + (bandwidth / 2); + + dev_dbg(&client->dev, + "mode=%d system=%u std='%s' params->frequency=%u center freq=%u if=%u bandwidth=%u\n", + params->mode, system, std, params->frequency, + freq, if_frequency, bandwidth); + + /* set analog IF port */ + memcpy(cmd.args, "\x14\x00\x03\x06\x08\x02", 6); + /* in using dev->if_port, we assume analog and digital IF's */ + /* are always on different ports */ + /* assumes if_port definition is 0 or 1 for digital out */ + cmd.args[4] = (dev->if_port == 1) ? 8 : 10; + /* Analog AGC assumed external */ + cmd.args[5] = (dev->if_port == 1) ? 2 : 1; + cmd.wlen = 6; + cmd.rlen = 4; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + /* set analog IF output config */ + memcpy(cmd.args, "\x14\x00\x0d\x06\x94\x64", 6); + cmd.wlen = 6; + cmd.rlen = 4; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + /* make this distinct from a digital IF */ + dev->if_frequency = if_frequency | 1; + + /* calc and set tuner analog if center frequency */ + if_frequency = if_frequency + 1250000 - (bandwidth / 2); + dev_dbg(&client->dev, "IF Ctr freq=%d\n", if_frequency); + + memcpy(cmd.args, "\x14\x00\x0C\x06", 4); + cmd.args[4] = (if_frequency / 1000) & 0xff; + cmd.args[5] = ((if_frequency / 1000) >> 8) & 0xff; + cmd.wlen = 6; + cmd.rlen = 4; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + /* set analog AGC config */ + memcpy(cmd.args, "\x14\x00\x07\x06\x32\xc8", 6); + cmd.wlen = 6; + cmd.rlen = 4; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + /* set analog video mode */ + memcpy(cmd.args, "\x14\x00\x04\x06\x00\x00", 6); + cmd.args[4] = system | color; + /* can use dev->inversion if assumed applies to both digital/analog */ + if (invert_analog) + cmd.args[5] |= 0x02; + cmd.wlen = 6; + cmd.rlen = 1; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + /* set analog frequency */ + memcpy(cmd.args, "\x41\x01\x00\x00\x00\x00\x00\x00", 8); + cmd.args[4] = (freq >> 0) & 0xff; + cmd.args[5] = (freq >> 8) & 0xff; + cmd.args[6] = (freq >> 16) & 0xff; + cmd.args[7] = (freq >> 24) & 0xff; + cmd.wlen = 8; + cmd.rlen = 1; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + dev->bandwidth = bandwidth; + + return 0; +err: + dev->bandwidth = 0; + dev->frequency = 0; + dev->if_frequency = 0; + dev_dbg(&client->dev, "failed=%d\n", ret); + return ret; +} + +static int si2157_get_frequency(struct dvb_frontend *fe, u32 *frequency) +{ + struct i2c_client *client = fe->tuner_priv; + struct si2157_dev *dev = i2c_get_clientdata(client); + + *frequency = dev->frequency; + dev_dbg(&client->dev, "freq=%u\n", dev->frequency); + return 0; +} + +static int si2157_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) +{ + struct i2c_client *client = fe->tuner_priv; + struct si2157_dev *dev = i2c_get_clientdata(client); + + *bandwidth = dev->bandwidth; + dev_dbg(&client->dev, "bandwidth=%u\n", dev->bandwidth); + return 0; +} + static int si2157_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) { struct i2c_client *client = fe->tuner_priv; struct si2157_dev *dev = i2c_get_clientdata(client); - *frequency = dev->if_frequency; + *frequency = dev->if_frequency & ~1; /* strip analog IF indicator bit */ + dev_dbg(&client->dev, "if_frequency=%u\n", *frequency); return 0; } @@ -422,6 +644,9 @@ static const struct dvb_tuner_ops si2157_ops = { .init = si2157_init, .sleep = si2157_sleep, .set_params = si2157_set_params, + .set_analog_params = si2157_set_analog_params, + .get_frequency = si2157_get_frequency, + .get_bandwidth = si2157_get_bandwidth, .get_if_frequency = si2157_get_if_frequency, }; diff --git a/drivers/media/tuners/si2157_priv.h b/drivers/media/tuners/si2157_priv.h index 778f81b399965..ef47960989314 100644 --- a/drivers/media/tuners/si2157_priv.h +++ b/drivers/media/tuners/si2157_priv.h @@ -29,6 +29,8 @@ struct si2157_dev { u8 chiptype; u8 if_port; u32 if_frequency; + u32 bandwidth; + u32 frequency; struct delayed_work stat_work; #if defined(CONFIG_MEDIA_CONTROLLER) -- GitLab From 578147e968bd0cf6d74f4f04eee5a1f9b7e007da Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:03:59 +0100 Subject: [PATCH 219/503] media: si2157: Briefly wait for tuning operation to complete To detect errors in the tuning operation, this waits up 40ms for operation completion status. This allows for error detection and prevents issuing additional commands to the tuner before it is finished. Tuning typically completes in 20-30ms. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 52 +++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index 1dad465220336..b224415229216 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -301,6 +301,54 @@ static int si2157_sleep(struct dvb_frontend *fe) return ret; } +static int si2157_tune_wait(struct i2c_client *client) +{ +#define TUN_TIMEOUT 40 + struct si2157_dev *dev = i2c_get_clientdata(client); + int ret; + unsigned long timeout; + unsigned long start_time; + u8 wait_status; + + mutex_lock(&dev->i2c_mutex); + + /* wait tuner command complete */ + start_time = jiffies; + timeout = start_time + msecs_to_jiffies(TUN_TIMEOUT); + while (!time_after(jiffies, timeout)) { + ret = i2c_master_recv(client, &wait_status, + sizeof(wait_status)); + if (ret < 0) { + goto err_mutex_unlock; + } else if (ret != sizeof(wait_status)) { + ret = -EREMOTEIO; + goto err_mutex_unlock; + } + + /* tuner done? */ + if ((wait_status & 0x81) == 0x81) + break; + usleep_range(5000, 10000); + } + + dev_dbg(&client->dev, "tuning took %d ms, status=0x%x\n", + jiffies_to_msecs(jiffies) - jiffies_to_msecs(start_time), + wait_status); + + if ((wait_status & 0xc0) != 0x80) { + ret = -ETIMEDOUT; + goto err_mutex_unlock; + } + + mutex_unlock(&dev->i2c_mutex); + return 0; + +err_mutex_unlock: + mutex_unlock(&dev->i2c_mutex); + dev_err(&client->dev, "failed=%d\n", ret); + return ret; +} + static int si2157_set_params(struct dvb_frontend *fe) { struct i2c_client *client = fe->tuner_priv; @@ -400,6 +448,8 @@ static int si2157_set_params(struct dvb_frontend *fe) dev->bandwidth = bandwidth; dev->frequency = c->frequency; + si2157_tune_wait(client); /* wait to complete, ignore any errors */ + return 0; err: dev->bandwidth = 0; @@ -595,6 +645,8 @@ static int si2157_set_analog_params(struct dvb_frontend *fe, dev->bandwidth = bandwidth; + si2157_tune_wait(client); /* wait to complete, ignore any errors */ + return 0; err: dev->bandwidth = 0; -- GitLab From e4361015a4aa2960f1441482241520cf095d2de9 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:00 +0100 Subject: [PATCH 220/503] media: si2157: module debug option to wait on signal lock In some debugging cases it is useful to know how long it took signal lock to happen after tuning. This can help diagnose line issues. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 46 ++++++++++++++++++++++++++++++++--- 1 file changed, 43 insertions(+), 3 deletions(-) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index b224415229216..94db66107b98a 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -9,6 +9,10 @@ static const struct dvb_tuner_ops si2157_ops; +static int tuner_lock_debug; +module_param(tuner_lock_debug, int, 0644); +MODULE_PARM_DESC(tuner_lock_debug, "if set, signal lock is briefly waited on after setting params"); + /* execute firmware command */ static int si2157_cmd_execute(struct i2c_client *client, struct si2157_cmd *cmd) { @@ -301,14 +305,22 @@ static int si2157_sleep(struct dvb_frontend *fe) return ret; } -static int si2157_tune_wait(struct i2c_client *client) +static int si2157_tune_wait(struct i2c_client *client, u8 is_digital) { #define TUN_TIMEOUT 40 +#define DIG_TIMEOUT 30 +#define ANALOG_TIMEOUT 150 struct si2157_dev *dev = i2c_get_clientdata(client); int ret; unsigned long timeout; unsigned long start_time; u8 wait_status; + u8 tune_lock_mask; + + if (is_digital) + tune_lock_mask = 0x04; + else + tune_lock_mask = 0x02; mutex_lock(&dev->i2c_mutex); @@ -335,6 +347,34 @@ static int si2157_tune_wait(struct i2c_client *client) jiffies_to_msecs(jiffies) - jiffies_to_msecs(start_time), wait_status); + /* if we tuned ok, wait a bit for tuner lock */ + if (tuner_lock_debug && (wait_status & 0x81) == 0x81) { + if (is_digital) + timeout = jiffies + msecs_to_jiffies(DIG_TIMEOUT); + else + timeout = jiffies + msecs_to_jiffies(ANALOG_TIMEOUT); + + while (!time_after(jiffies, timeout)) { + ret = i2c_master_recv(client, &wait_status, + sizeof(wait_status)); + if (ret < 0) { + goto err_mutex_unlock; + } else if (ret != sizeof(wait_status)) { + ret = -EREMOTEIO; + goto err_mutex_unlock; + } + + /* tuner locked? */ + if (wait_status & tune_lock_mask) + break; + usleep_range(5000, 10000); + } + + dev_dbg(&client->dev, "tuning+lock took %d ms, status=0x%x\n", + jiffies_to_msecs(jiffies) - jiffies_to_msecs(start_time), + wait_status); + } + if ((wait_status & 0xc0) != 0x80) { ret = -ETIMEDOUT; goto err_mutex_unlock; @@ -448,7 +488,7 @@ static int si2157_set_params(struct dvb_frontend *fe) dev->bandwidth = bandwidth; dev->frequency = c->frequency; - si2157_tune_wait(client); /* wait to complete, ignore any errors */ + si2157_tune_wait(client, 1); /* wait to complete, ignore any errors */ return 0; err: @@ -645,7 +685,7 @@ static int si2157_set_analog_params(struct dvb_frontend *fe, dev->bandwidth = bandwidth; - si2157_tune_wait(client); /* wait to complete, ignore any errors */ + si2157_tune_wait(client, 0); /* wait to complete, ignore any errors */ return 0; err: -- GitLab From 81118817c4ae31ad372f187f43b8c7fb2acea0d8 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:01 +0100 Subject: [PATCH 221/503] media: cx23885: Add analog frontend to Hauppauge QuadHD Add analog tuner frontend to 888 Hauppauge QuadHD boards Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/cx23885/cx23885-cards.c | 31 ++++++++++++++++++++--- drivers/media/pci/cx23885/cx23885-dvb.c | 20 +++++++++++++++ drivers/media/pci/cx23885/cx23885-video.c | 8 +++++- 3 files changed, 54 insertions(+), 5 deletions(-) diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c index 8e5a2c580821e..266bd529017b1 100644 --- a/drivers/media/pci/cx23885/cx23885-cards.c +++ b/drivers/media/pci/cx23885/cx23885-cards.c @@ -757,24 +757,47 @@ struct cx23885_board cx23885_boards[] = { } }, }, [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = { - .name = "Hauppauge WinTV-QuadHD-DVB", + .name = "Hauppauge WinTV-QuadHD-DVB", + .porta = CX23885_ANALOG_VIDEO, .portb = CX23885_MPEG_DVB, .portc = CX23885_MPEG_DVB, + .tuner_type = TUNER_ABSENT, + .force_bff = 1, + .input = {{ + .type = CX23885_VMUX_TELEVISION, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN5_CH2 | + CX25840_VIN2_CH1 | + CX25840_DIF_ON, + .amux = CX25840_AUDIO8, + } }, }, [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = { - .name = "Hauppauge WinTV-QuadHD-DVB(885)", + .name = "Hauppauge WinTV-QuadHD-DVB(885)", .portb = CX23885_MPEG_DVB, .portc = CX23885_MPEG_DVB, + .tuner_type = TUNER_ABSENT, }, [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = { - .name = "Hauppauge WinTV-QuadHD-ATSC", + .name = "Hauppauge WinTV-QuadHD-ATSC", + .porta = CX23885_ANALOG_VIDEO, .portb = CX23885_MPEG_DVB, .portc = CX23885_MPEG_DVB, + .tuner_type = TUNER_ABSENT, + .input = {{ + .type = CX23885_VMUX_TELEVISION, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN5_CH2 | + CX25840_VIN2_CH1 | + CX25840_DIF_ON, + .amux = CX25840_AUDIO8, + } }, }, [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = { - .name = "Hauppauge WinTV-QuadHD-ATSC(885)", + .name = "Hauppauge WinTV-QuadHD-ATSC(885)", .portb = CX23885_MPEG_DVB, .portc = CX23885_MPEG_DVB, + .tuner_type = TUNER_ABSENT, }, [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = { .name = "Hauppauge WinTV-HVR-1265(161111)", diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c index 494751a067a31..81058d3005831 100644 --- a/drivers/media/pci/cx23885/cx23885-dvb.c +++ b/drivers/media/pci/cx23885/cx23885-dvb.c @@ -2367,6 +2367,16 @@ static int dvb_register(struct cx23885_tsport *port) goto frontend_detach; } port->i2c_client_tuner = client_tuner; + + /* we only attach tuner for analog on the 888 version */ + if (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_DVB) { + pr_info("%s(): QUADHD_DVB analog setup\n", + __func__); + dev->ts1.analog_fe.tuner_priv = client_tuner; + memcpy(&dev->ts1.analog_fe.ops.tuner_ops, + &fe0->dvb.frontend->ops.tuner_ops, + sizeof(struct dvb_tuner_ops)); + } break; /* port c - terrestrial/cable */ @@ -2456,6 +2466,16 @@ static int dvb_register(struct cx23885_tsport *port) goto frontend_detach; } port->i2c_client_tuner = client_tuner; + + /* we only attach tuner for analog on the 888 version */ + if (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC) { + pr_info("%s(): QUADHD_ATSC analog setup\n", + __func__); + dev->ts1.analog_fe.tuner_priv = client_tuner; + memcpy(&dev->ts1.analog_fe.ops.tuner_ops, + &fe0->dvb.frontend->ops.tuner_ops, + sizeof(struct dvb_tuner_ops)); + } break; /* port c - terrestrial/cable */ diff --git a/drivers/media/pci/cx23885/cx23885-video.c b/drivers/media/pci/cx23885/cx23885-video.c index 000c108b94fd7..a2a1dd48e914f 100644 --- a/drivers/media/pci/cx23885/cx23885-video.c +++ b/drivers/media/pci/cx23885/cx23885-video.c @@ -253,6 +253,8 @@ static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input) (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4) || + (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC) || + (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_DVB) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) || (dev->board == CX23885_BOARD_MYGICA_X8507) || (dev->board == CX23885_BOARD_AVERMEDIA_HC81R) || @@ -996,7 +998,9 @@ static int cx23885_set_freq_via_ops(struct cx23885_dev *dev, if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) || - (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4)) + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4) || + (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_DVB) || + (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC)) fe = &dev->ts1.analog_fe; if (fe && fe->ops.tuner_ops.set_analog_params) { @@ -1027,6 +1031,8 @@ int cx23885_set_frequency(struct file *file, void *priv, case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: case CX23885_BOARD_HAUPPAUGE_HVR1850: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: ret = cx23885_set_freq_via_ops(dev, f); break; default: -- GitLab From f8e76a5e26792fe1d4dd0afd706bbc17cb8b5ed8 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:02 +0100 Subject: [PATCH 222/503] media: cx23885: Add analog frontend to 1265_K4 Enables the analog tuning frontend for Hauppauge HVR-1265_K4. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/cx23885/cx23885-cards.c | 8 +++++++- drivers/media/pci/cx23885/cx23885-dvb.c | 5 +++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c index 266bd529017b1..f1bd73eb44cb7 100644 --- a/drivers/media/pci/cx23885/cx23885-cards.c +++ b/drivers/media/pci/cx23885/cx23885-cards.c @@ -804,8 +804,14 @@ struct cx23885_board cx23885_boards[] = { .porta = CX23885_ANALOG_VIDEO, .portc = CX23885_MPEG_DVB, .tuner_type = TUNER_ABSENT, - .force_bff = 1, .input = {{ + .type = CX23885_VMUX_TELEVISION, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN5_CH2 | + CX25840_VIN2_CH1 | + CX25840_DIF_ON, + .amux = CX25840_AUDIO8, + }, { .type = CX23885_VMUX_COMPOSITE1, .vmux = CX25840_VIN7_CH3 | CX25840_VIN4_CH2 | diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c index 81058d3005831..7c2c8f15945d0 100644 --- a/drivers/media/pci/cx23885/cx23885-dvb.c +++ b/drivers/media/pci/cx23885/cx23885-dvb.c @@ -2547,6 +2547,11 @@ static int dvb_register(struct cx23885_tsport *port) goto frontend_detach; } port->i2c_client_tuner = client_tuner; + + dev->ts1.analog_fe.tuner_priv = client_tuner; + memcpy(&dev->ts1.analog_fe.ops.tuner_ops, + &fe0->dvb.frontend->ops.tuner_ops, + sizeof(struct dvb_tuner_ops)); break; } break; -- GitLab From 2be355a08e191110237b9b908b8af1e3da573d9b Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:03 +0100 Subject: [PATCH 223/503] media: cx23885: Add analog frontend to HVR5525 Enables the analog tuning frontend for Hauppauge HVR-5525. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/cx23885/cx23885-cards.c | 12 ++++++++++++ drivers/media/pci/cx23885/cx23885-dvb.c | 6 ++++++ drivers/media/pci/cx23885/cx23885-video.c | 3 +++ 3 files changed, 21 insertions(+) diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c index f1bd73eb44cb7..570a4a09c387a 100644 --- a/drivers/media/pci/cx23885/cx23885-cards.c +++ b/drivers/media/pci/cx23885/cx23885-cards.c @@ -703,8 +703,19 @@ struct cx23885_board cx23885_boards[] = { }, [CX23885_BOARD_HAUPPAUGE_HVR5525] = { .name = "Hauppauge WinTV-HVR5525", + .porta = CX23885_ANALOG_VIDEO, .portb = CX23885_MPEG_DVB, .portc = CX23885_MPEG_DVB, + .tuner_type = TUNER_ABSENT, + .force_bff = 1, + .input = {{ + .type = CX23885_VMUX_TELEVISION, + .vmux = CX25840_VIN7_CH3 | + CX25840_VIN5_CH2 | + CX25840_VIN2_CH1 | + CX25840_DIF_ON, + .amux = CX25840_AUDIO8, + } }, }, [CX23885_BOARD_VIEWCAST_260E] = { .name = "ViewCast 260e", @@ -2379,6 +2390,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1850: + case CX23885_BOARD_HAUPPAUGE_HVR5525: case CX23885_BOARD_MYGICA_X8506: case CX23885_BOARD_MAGICPRO_PROHDTVE2: case CX23885_BOARD_HAUPPAUGE_HVR1290: diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c index 7c2c8f15945d0..45c2f4afceb82 100644 --- a/drivers/media/pci/cx23885/cx23885-dvb.c +++ b/drivers/media/pci/cx23885/cx23885-dvb.c @@ -2314,6 +2314,12 @@ static int dvb_register(struct cx23885_tsport *port) goto frontend_detach; } port->i2c_client_tuner = client_tuner; + + dev->ts1.analog_fe.tuner_priv = client_tuner; + memcpy(&dev->ts1.analog_fe.ops.tuner_ops, + &fe0->dvb.frontend->ops.tuner_ops, + sizeof(struct dvb_tuner_ops)); + break; } break; diff --git a/drivers/media/pci/cx23885/cx23885-video.c b/drivers/media/pci/cx23885/cx23885-video.c index a2a1dd48e914f..3c1051ded9b59 100644 --- a/drivers/media/pci/cx23885/cx23885-video.c +++ b/drivers/media/pci/cx23885/cx23885-video.c @@ -256,6 +256,7 @@ static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input) (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC) || (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_DVB) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) || + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR5525) || (dev->board == CX23885_BOARD_MYGICA_X8507) || (dev->board == CX23885_BOARD_AVERMEDIA_HC81R) || (dev->board == CX23885_BOARD_VIEWCAST_260E) || @@ -999,6 +1000,7 @@ static int cx23885_set_freq_via_ops(struct cx23885_dev *dev, (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) || (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4) || + (dev->board == CX23885_BOARD_HAUPPAUGE_HVR5525) || (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_DVB) || (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC)) fe = &dev->ts1.analog_fe; @@ -1031,6 +1033,7 @@ int cx23885_set_frequency(struct file *file, void *priv, case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: case CX23885_BOARD_HAUPPAUGE_HVR1850: + case CX23885_BOARD_HAUPPAUGE_HVR5525: case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: ret = cx23885_set_freq_via_ops(dev, f); -- GitLab From fbc9a49cf2721ac78b964c3eef7566efc6f1db23 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:04 +0100 Subject: [PATCH 224/503] media: cx23885: Add i2c device analog tuner support Hauppauge QuadHD/1265/5525 boards all use i2c device drivers and have tuner_type equal TUNER_ABSENT. This means additional support is required to enable the analog tuning capability, a case statement is used to identify these models. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/cx23885/cx23885-video.c | 88 +++++++++++++++++++---- 1 file changed, 76 insertions(+), 12 deletions(-) diff --git a/drivers/media/pci/cx23885/cx23885-video.c b/drivers/media/pci/cx23885/cx23885-video.c index 3c1051ded9b59..440d108b7dddb 100644 --- a/drivers/media/pci/cx23885/cx23885-video.c +++ b/drivers/media/pci/cx23885/cx23885-video.c @@ -639,8 +639,18 @@ static int vidioc_querycap(struct file *file, void *priv, V4L2_CAP_AUDIO | V4L2_CAP_VBI_CAPTURE | V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS; - if (dev->tuner_type != TUNER_ABSENT) + switch (dev->board) { /* i2c device tuners */ + case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: + case CX23885_BOARD_HAUPPAUGE_HVR5525: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: cap->capabilities |= V4L2_CAP_TUNER; + break; + default: + if (dev->tuner_type != TUNER_ABSENT) + cap->capabilities |= V4L2_CAP_TUNER; + break; + } return 0; } @@ -886,8 +896,17 @@ static int vidioc_g_tuner(struct file *file, void *priv, { struct cx23885_dev *dev = video_drvdata(file); - if (dev->tuner_type == TUNER_ABSENT) - return -EINVAL; + switch (dev->board) { /* i2c device tuners */ + case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: + case CX23885_BOARD_HAUPPAUGE_HVR5525: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: + break; + default: + if (dev->tuner_type == TUNER_ABSENT) + return -EINVAL; + break; + } if (0 != t->index) return -EINVAL; @@ -902,8 +921,17 @@ static int vidioc_s_tuner(struct file *file, void *priv, { struct cx23885_dev *dev = video_drvdata(file); - if (dev->tuner_type == TUNER_ABSENT) - return -EINVAL; + switch (dev->board) { /* i2c device tuners */ + case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: + case CX23885_BOARD_HAUPPAUGE_HVR5525: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: + break; + default: + if (dev->tuner_type == TUNER_ABSENT) + return -EINVAL; + break; + } if (0 != t->index) return -EINVAL; /* Update the A/V core */ @@ -917,9 +945,17 @@ static int vidioc_g_frequency(struct file *file, void *priv, { struct cx23885_dev *dev = video_drvdata(file); - if (dev->tuner_type == TUNER_ABSENT) - return -EINVAL; - + switch (dev->board) { /* i2c device tuners */ + case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: + case CX23885_BOARD_HAUPPAUGE_HVR5525: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: + break; + default: + if (dev->tuner_type == TUNER_ABSENT) + return -EINVAL; + break; + } f->type = V4L2_TUNER_ANALOG_TV; f->frequency = dev->freq; @@ -933,8 +969,17 @@ static int cx23885_set_freq(struct cx23885_dev *dev, const struct v4l2_frequency struct v4l2_ctrl *mute; int old_mute_val = 1; - if (dev->tuner_type == TUNER_ABSENT) - return -EINVAL; + switch (dev->board) { /* i2c device tuners */ + case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: + case CX23885_BOARD_HAUPPAUGE_HVR5525: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: + break; + default: + if (dev->tuner_type == TUNER_ABSENT) + return -EINVAL; + break; + } if (unlikely(f->tuner != 0)) return -EINVAL; @@ -1311,8 +1356,18 @@ int cx23885_video_register(struct cx23885_dev *dev) dev->video_dev->queue = &dev->vb2_vidq; dev->video_dev->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_VIDEO_CAPTURE; - if (dev->tuner_type != TUNER_ABSENT) + switch (dev->board) { /* i2c device tuners */ + case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: + case CX23885_BOARD_HAUPPAUGE_HVR5525: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: dev->video_dev->device_caps |= V4L2_CAP_TUNER; + break; + default: + if (dev->tuner_type != TUNER_ABSENT) + dev->video_dev->device_caps |= V4L2_CAP_TUNER; + } + err = video_register_device(dev->video_dev, VFL_TYPE_VIDEO, video_nr[dev->nr]); if (err < 0) { @@ -1329,8 +1384,17 @@ int cx23885_video_register(struct cx23885_dev *dev) dev->vbi_dev->queue = &dev->vb2_vbiq; dev->vbi_dev->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_VBI_CAPTURE; - if (dev->tuner_type != TUNER_ABSENT) + switch (dev->board) { /* i2c device tuners */ + case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: + case CX23885_BOARD_HAUPPAUGE_HVR5525: + case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: + case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: dev->vbi_dev->device_caps |= V4L2_CAP_TUNER; + break; + default: + if (dev->tuner_type != TUNER_ABSENT) + dev->vbi_dev->device_caps |= V4L2_CAP_TUNER; + } err = video_register_device(dev->vbi_dev, VFL_TYPE_VBI, vbi_nr[dev->nr]); if (err < 0) { -- GitLab From 3c1ccbad80802fa8bf807725db75a92d0887c9f2 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:05 +0100 Subject: [PATCH 225/503] media: cx231xx: Add i2c device analog tuner support The boards listed below use i2c device drivers and have tuner_type equal TUNER_ABSENT. This means additional support is required to enable the analog tuning capability, a case statement is used to identify these models. Models with analog tuning enabled: - CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx (tested) - CX231XX_BOARD_HAUPPAUGE_935C (tested) - CX231XX_BOARD_HAUPPAUGE_955Q (tested) - CX231XX_BOARD_HAUPPAUGE_975 (tested) - CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD (untested) The EvroMedia model was added, since it uses the si2157 tuner and the board profile claims it has analog inputs. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/cx231xx/cx231xx-avcore.c | 35 +++++++-- drivers/media/usb/cx231xx/cx231xx-video.c | 85 ++++++++++++++++++---- 2 files changed, 101 insertions(+), 19 deletions(-) diff --git a/drivers/media/usb/cx231xx/cx231xx-avcore.c b/drivers/media/usb/cx231xx/cx231xx-avcore.c index 0974965e848f7..d6117093491b9 100644 --- a/drivers/media/usb/cx231xx/cx231xx-avcore.c +++ b/drivers/media/usb/cx231xx/cx231xx-avcore.c @@ -587,14 +587,27 @@ int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input) return status; } } - if (dev->tuner_type == TUNER_NXP_TDA18271) + switch (dev->model) { /* i2c device tuners */ + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx: + case CX231XX_BOARD_HAUPPAUGE_935C: + case CX231XX_BOARD_HAUPPAUGE_955Q: + case CX231XX_BOARD_HAUPPAUGE_975: + case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD: status = cx231xx_set_decoder_video_input(dev, CX231XX_VMUX_TELEVISION, INPUT(input)->vmux); - else - status = cx231xx_set_decoder_video_input(dev, + break; + default: + if (dev->tuner_type == TUNER_NXP_TDA18271) + status = cx231xx_set_decoder_video_input(dev, + CX231XX_VMUX_TELEVISION, + INPUT(input)->vmux); + else + status = cx231xx_set_decoder_video_input(dev, CX231XX_VMUX_COMPOSITE1, INPUT(input)->vmux); + break; + }; break; default: @@ -1193,12 +1206,22 @@ int cx231xx_set_audio_decoder_input(struct cx231xx *dev, cx231xx_set_field(FLD_SIF_EN, 0)); break; default: + switch (dev->model) { /* i2c device tuners */ + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx: + case CX231XX_BOARD_HAUPPAUGE_935C: + case CX231XX_BOARD_HAUPPAUGE_955Q: + case CX231XX_BOARD_HAUPPAUGE_975: + case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD: + /* TODO: Normal mode: SIF passthrough at 14.32 MHz?? */ + break; + default: /* This is just a casual suggestion to people adding new boards in case they use a tuner type we don't currently know about */ - dev_info(dev->dev, - "Unknown tuner type configuring SIF"); - break; + dev_info(dev->dev, + "Unknown tuner type configuring SIF"); + break; + } } break; diff --git a/drivers/media/usb/cx231xx/cx231xx-video.c b/drivers/media/usb/cx231xx/cx231xx-video.c index 8bff7d8a0310f..d9f953f2d0882 100644 --- a/drivers/media/usb/cx231xx/cx231xx-video.c +++ b/drivers/media/usb/cx231xx/cx231xx-video.c @@ -1129,7 +1129,7 @@ int cx231xx_s_frequency(struct file *file, void *priv, { struct cx231xx *dev = video_drvdata(file); struct v4l2_frequency new_freq = *f; - int rc; + int rc, need_if_freq = 0; u32 if_frequency = 5400000; dev_dbg(dev->dev, @@ -1142,14 +1142,30 @@ int cx231xx_s_frequency(struct file *file, void *priv, /* set pre channel change settings in DIF first */ rc = cx231xx_tuner_pre_channel_change(dev); - call_all(dev, tuner, s_frequency, f); - call_all(dev, tuner, g_frequency, &new_freq); - dev->ctl_freq = new_freq.frequency; + switch (dev->model) { /* i2c device tuners */ + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx: + case CX231XX_BOARD_HAUPPAUGE_935C: + case CX231XX_BOARD_HAUPPAUGE_955Q: + case CX231XX_BOARD_HAUPPAUGE_975: + case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD: + if (dev->cx231xx_set_analog_freq) + dev->cx231xx_set_analog_freq(dev, f->frequency); + dev->ctl_freq = f->frequency; + need_if_freq = 1; + break; + default: + call_all(dev, tuner, s_frequency, f); + call_all(dev, tuner, g_frequency, &new_freq); + dev->ctl_freq = new_freq.frequency; + break; + } + + pr_debug("%s() %u : %u\n", __func__, f->frequency, dev->ctl_freq); /* set post channel change settings in DIF first */ rc = cx231xx_tuner_post_channel_change(dev); - if (dev->tuner_type == TUNER_NXP_TDA18271) { + if (need_if_freq || dev->tuner_type == TUNER_NXP_TDA18271) { if (dev->norm & (V4L2_STD_MN | V4L2_STD_NTSC_443)) if_frequency = 5400000; /*5.4MHz */ else if (dev->norm & V4L2_STD_B) @@ -1362,9 +1378,20 @@ int cx231xx_querycap(struct file *file, void *priv, V4L2_CAP_STREAMING | V4L2_CAP_DEVICE_CAPS; if (video_is_registered(&dev->radio_dev)) cap->capabilities |= V4L2_CAP_RADIO; - if (dev->tuner_type != TUNER_ABSENT) - cap->capabilities |= V4L2_CAP_TUNER; + switch (dev->model) { + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx: + case CX231XX_BOARD_HAUPPAUGE_935C: + case CX231XX_BOARD_HAUPPAUGE_955Q: + case CX231XX_BOARD_HAUPPAUGE_975: + case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD: + cap->capabilities |= V4L2_CAP_TUNER; + break; + default: + if (dev->tuner_type != TUNER_ABSENT) + cap->capabilities |= V4L2_CAP_TUNER; + break; + } return 0; } @@ -1708,10 +1735,20 @@ static void cx231xx_vdev_init(struct cx231xx *dev, video_set_drvdata(vfd, dev); if (dev->tuner_type == TUNER_ABSENT) { - v4l2_disable_ioctl(vfd, VIDIOC_G_FREQUENCY); - v4l2_disable_ioctl(vfd, VIDIOC_S_FREQUENCY); - v4l2_disable_ioctl(vfd, VIDIOC_G_TUNER); - v4l2_disable_ioctl(vfd, VIDIOC_S_TUNER); + switch (dev->model) { + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx: + case CX231XX_BOARD_HAUPPAUGE_935C: + case CX231XX_BOARD_HAUPPAUGE_955Q: + case CX231XX_BOARD_HAUPPAUGE_975: + case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD: + break; + default: + v4l2_disable_ioctl(vfd, VIDIOC_G_FREQUENCY); + v4l2_disable_ioctl(vfd, VIDIOC_S_FREQUENCY); + v4l2_disable_ioctl(vfd, VIDIOC_G_TUNER); + v4l2_disable_ioctl(vfd, VIDIOC_S_TUNER); + break; + } } } @@ -1781,8 +1818,20 @@ int cx231xx_register_analog_devices(struct cx231xx *dev) dev->vdev.queue = q; dev->vdev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE; - if (dev->tuner_type != TUNER_ABSENT) + + switch (dev->model) { /* i2c device tuners */ + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx: + case CX231XX_BOARD_HAUPPAUGE_935C: + case CX231XX_BOARD_HAUPPAUGE_955Q: + case CX231XX_BOARD_HAUPPAUGE_975: + case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD: dev->vdev.device_caps |= V4L2_CAP_TUNER; + break; + default: + if (dev->tuner_type != TUNER_ABSENT) + dev->vdev.device_caps |= V4L2_CAP_TUNER; + break; + } /* register v4l2 video video_device */ ret = video_register_device(&dev->vdev, VFL_TYPE_VIDEO, @@ -1829,8 +1878,18 @@ int cx231xx_register_analog_devices(struct cx231xx *dev) dev->vbi_dev.queue = q; dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING | V4L2_CAP_VBI_CAPTURE; - if (dev->tuner_type != TUNER_ABSENT) + switch (dev->model) { /* i2c device tuners */ + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx: + case CX231XX_BOARD_HAUPPAUGE_935C: + case CX231XX_BOARD_HAUPPAUGE_955Q: + case CX231XX_BOARD_HAUPPAUGE_975: + case CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD: dev->vbi_dev.device_caps |= V4L2_CAP_TUNER; + break; + default: + if (dev->tuner_type != TUNER_ABSENT) + dev->vbi_dev.device_caps |= V4L2_CAP_TUNER; + } /* register v4l2 vbi video_device */ ret = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI, -- GitLab From d99846cb1c0ecba0856276da5b8c2368dd402623 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:06 +0100 Subject: [PATCH 226/503] media: si2157: add on-demand rf strength func Add get_rf_strength callback to get RSSI from the tuner. DVBv5 stat cache is updated. get_rf_strength is called by tuner_core for analog tuners and is also used by some bridge drivers to obtain RSSI directly from the tuner. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 40 ++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index 94db66107b98a..6b452565dedbd 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -726,6 +726,42 @@ static int si2157_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) return 0; } +static int si2157_get_rf_strength(struct dvb_frontend *fe, u16 *rssi) +{ + struct i2c_client *client = fe->tuner_priv; + struct dtv_frontend_properties *c = &fe->dtv_property_cache; + struct si2157_cmd cmd; + int ret; + int strength; + + dev_dbg(&client->dev, "\n"); + + memcpy(cmd.args, "\x42\x00", 2); + cmd.wlen = 2; + cmd.rlen = 12; + ret = si2157_cmd_execute(client, &cmd); + if (ret) + goto err; + + c->strength.stat[0].scale = FE_SCALE_DECIBEL; + c->strength.stat[0].svalue = (s8)cmd.args[3] * 1000; + + /* normalize values based on Silicon Labs reference + * add 100, then anything > 80 is 100% signal + */ + strength = (s8)cmd.args[3] + 100; + strength = clamp_val(strength, 0, 80); + *rssi = (u16)(strength * 0xffff / 80); + + dev_dbg(&client->dev, "strength=%d rssi=%u\n", + (s8)cmd.args[3], *rssi); + + return 0; +err: + dev_dbg(&client->dev, "failed=%d\n", ret); + return ret; +} + static const struct dvb_tuner_ops si2157_ops = { .info = { .name = "Silicon Labs Si2141/Si2146/2147/2148/2157/2158", @@ -739,7 +775,9 @@ static const struct dvb_tuner_ops si2157_ops = { .set_analog_params = si2157_set_analog_params, .get_frequency = si2157_get_frequency, .get_bandwidth = si2157_get_bandwidth, - .get_if_frequency = si2157_get_if_frequency, + .get_if_frequency = si2157_get_if_frequency, + + .get_rf_strength = si2157_get_rf_strength, }; static void si2157_stat_work(struct work_struct *work) -- GitLab From 722b3c140dd471ee484b072793addbb7e2cbd999 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:07 +0100 Subject: [PATCH 227/503] media: lgdt3306a: Add CNR v5 stat The CNR is already calculated, so populate DVBv5 CNR stat during read_status. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/lgdt3306a.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/media/dvb-frontends/lgdt3306a.c b/drivers/media/dvb-frontends/lgdt3306a.c index 6c4adec581747..d3c330e035c45 100644 --- a/drivers/media/dvb-frontends/lgdt3306a.c +++ b/drivers/media/dvb-frontends/lgdt3306a.c @@ -846,6 +846,7 @@ static int lgdt3306a_fe_sleep(struct dvb_frontend *fe) static int lgdt3306a_init(struct dvb_frontend *fe) { struct lgdt3306a_state *state = fe->demodulator_priv; + struct dtv_frontend_properties *c = &fe->dtv_property_cache; u8 val; int ret; @@ -997,6 +998,9 @@ static int lgdt3306a_init(struct dvb_frontend *fe) ret = lgdt3306a_sleep(state); lg_chkerr(ret); + c->cnr.len = 1; + c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; + fail: return ret; } @@ -1597,6 +1601,7 @@ static int lgdt3306a_read_status(struct dvb_frontend *fe, enum fe_status *status) { struct lgdt3306a_state *state = fe->demodulator_priv; + struct dtv_frontend_properties *c = &fe->dtv_property_cache; u16 strength = 0; int ret = 0; @@ -1637,6 +1642,15 @@ static int lgdt3306a_read_status(struct dvb_frontend *fe, default: ret = -EINVAL; } + + if (*status & FE_HAS_SYNC) { + c->cnr.len = 1; + c->cnr.stat[0].scale = FE_SCALE_DECIBEL; + c->cnr.stat[0].svalue = lgdt3306a_calculate_snr_x100(state) * 10; + } else { + c->cnr.len = 1; + c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE; + } } return ret; } -- GitLab From 038fd4141029879563cf93efb2a09e5935d3df5f Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 Nov 2019 21:04:08 +0100 Subject: [PATCH 228/503] media: cx25840: Register labeling, chip specific correction Remove vbi_regs_offset from a group of registers that are 888 specific, include those registers names. Sources used for reference are 885 and 888 datasheets. Add labels to some undocumented registers. Signed-off-by: Brad Love Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/cx25840/cx25840-core.c | 40 ++++++++++++------------ 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/media/i2c/cx25840/cx25840-core.c b/drivers/media/i2c/cx25840/cx25840-core.c index 0de946fe2109d..e2e935f789869 100644 --- a/drivers/media/i2c/cx25840/cx25840-core.c +++ b/drivers/media/i2c/cx25840/cx25840-core.c @@ -997,14 +997,14 @@ static void cx23885_initialize(struct i2c_client *client) */ cx25840_write4(client, 0x404, 0x0010253e); - /* CC on - Undocumented Register */ + /* CC on - VBI_LINE_CTRL3, FLD_VBI_MD_LINE12 */ cx25840_write(client, state->vbi_regs_offset + 0x42f, 0x66); /* HVR-1250 / HVR1850 DIF related */ /* Power everything up */ cx25840_write4(client, 0x130, 0x0); - /* Undocumented */ + /* SRC_COMB_CFG */ if (is_cx23888(state)) cx25840_write4(client, 0x454, 0x6628021F); else @@ -1486,24 +1486,24 @@ static int set_input(struct i2c_client *client, cx25840_write4(client, 0x410, 0xffff0dbf); cx25840_write4(client, 0x414, 0x00137d03); - cx25840_write4(client, state->vbi_regs_offset + 0x42c, - 0x42600000); - cx25840_write4(client, state->vbi_regs_offset + 0x430, - 0x0000039b); - cx25840_write4(client, state->vbi_regs_offset + 0x438, - 0x00000000); - - cx25840_write4(client, state->vbi_regs_offset + 0x440, - 0xF8E3E824); - cx25840_write4(client, state->vbi_regs_offset + 0x444, - 0x401040dc); - cx25840_write4(client, state->vbi_regs_offset + 0x448, - 0xcd3f02a0); - cx25840_write4(client, state->vbi_regs_offset + 0x44c, - 0x161f1000); - cx25840_write4(client, state->vbi_regs_offset + 0x450, - 0x00000802); - + if (is_cx23888(state)) { + /* 888 MISC_TIM_CTRL */ + cx25840_write4(client, 0x42c, 0x42600000); + /* 888 FIELD_COUNT */ + cx25840_write4(client, 0x430, 0x0000039b); + /* 888 VSCALE_CTRL */ + cx25840_write4(client, 0x438, 0x00000000); + /* 888 DFE_CTRL1 */ + cx25840_write4(client, 0x440, 0xF8E3E824); + /* 888 DFE_CTRL2 */ + cx25840_write4(client, 0x444, 0x401040dc); + /* 888 DFE_CTRL3 */ + cx25840_write4(client, 0x448, 0xcd3f02a0); + /* 888 PLL_CTRL */ + cx25840_write4(client, 0x44c, 0x161f1000); + /* 888 HTL_CTRL */ + cx25840_write4(client, 0x450, 0x00000802); + } cx25840_write4(client, 0x91c, 0x01000000); cx25840_write4(client, 0x8e0, 0x03063870); cx25840_write4(client, 0x8d4, 0x7FFF0024); -- GitLab From fdb9e30e9143ac92be79f58c234db9b92c561bd4 Mon Sep 17 00:00:00 2001 From: Sean Young Date: Wed, 15 Apr 2020 13:47:38 +0200 Subject: [PATCH 229/503] media: iguanair: rc drivers no longer need to do locking Since commit 4957133fe32f ("media: lirc: improve locking"), drivers do not need to do any of their own locking. During suspend and resume, no processes are running so no locking is needed. Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/rc/iguanair.c | 36 +++--------------------------------- 1 file changed, 3 insertions(+), 33 deletions(-) diff --git a/drivers/media/rc/iguanair.c b/drivers/media/rc/iguanair.c index 3c8bd13d029ad..566c2816d5bef 100644 --- a/drivers/media/rc/iguanair.c +++ b/drivers/media/rc/iguanair.c @@ -14,7 +14,6 @@ #include #include -#define DRIVER_NAME "iguanair" #define BUF_SIZE 152 struct iguanair { @@ -27,8 +26,6 @@ struct iguanair { uint8_t bufsize; uint8_t cycle_overhead; - struct mutex lock; - /* receiver support */ bool receiver_on; dma_addr_t dma_in, dma_out; @@ -284,8 +281,6 @@ static int iguanair_set_tx_carrier(struct rc_dev *dev, uint32_t carrier) if (carrier < 25000 || carrier > 150000) return -EINVAL; - mutex_lock(&ir->lock); - if (carrier != ir->carrier) { uint32_t cycles, fours, sevens; @@ -314,8 +309,6 @@ static int iguanair_set_tx_carrier(struct rc_dev *dev, uint32_t carrier) ir->packet->busy4 = 110 - fours; } - mutex_unlock(&ir->lock); - return 0; } @@ -326,9 +319,7 @@ static int iguanair_set_tx_mask(struct rc_dev *dev, uint32_t mask) if (mask > 15) return 4; - mutex_lock(&ir->lock); ir->packet->channels = mask << 4; - mutex_unlock(&ir->lock); return 0; } @@ -339,8 +330,6 @@ static int iguanair_tx(struct rc_dev *dev, unsigned *txbuf, unsigned count) unsigned int i, size, p, periods; int rc; - mutex_lock(&ir->lock); - /* convert from us to carrier periods */ for (i = size = 0; i < count; i++) { periods = DIV_ROUND_CLOSEST(txbuf[i] * ir->carrier, 1000000); @@ -368,8 +357,6 @@ static int iguanair_tx(struct rc_dev *dev, unsigned *txbuf, unsigned count) rc = -EOVERFLOW; out: - mutex_unlock(&ir->lock); - return rc ? rc : count; } @@ -378,14 +365,10 @@ static int iguanair_open(struct rc_dev *rdev) struct iguanair *ir = rdev->priv; int rc; - mutex_lock(&ir->lock); - rc = iguanair_receiver(ir, true); if (rc == 0) ir->receiver_on = true; - mutex_unlock(&ir->lock); - return rc; } @@ -394,14 +377,10 @@ static void iguanair_close(struct rc_dev *rdev) struct iguanair *ir = rdev->priv; int rc; - mutex_lock(&ir->lock); - rc = iguanair_receiver(ir, false); ir->receiver_on = false; if (rc && rc != -ENODEV) dev_warn(ir->dev, "failed to disable receiver: %d\n", rc); - - mutex_unlock(&ir->lock); } static int iguanair_probe(struct usb_interface *intf, @@ -441,7 +420,6 @@ static int iguanair_probe(struct usb_interface *intf, ir->rc = rc; ir->dev = &intf->dev; ir->udev = udev; - mutex_init(&ir->lock); init_completion(&ir->completion); pipeout = usb_sndintpipe(udev, @@ -483,7 +461,7 @@ static int iguanair_probe(struct usb_interface *intf, rc->s_tx_mask = iguanair_set_tx_mask; rc->s_tx_carrier = iguanair_set_tx_carrier; rc->tx_ir = iguanair_tx; - rc->driver_name = DRIVER_NAME; + rc->driver_name = KBUILD_MODNAME; rc->map_name = RC_MAP_RC6_MCE; rc->min_timeout = 1; rc->timeout = IR_DEFAULT_TIMEOUT; @@ -538,8 +516,6 @@ static int iguanair_suspend(struct usb_interface *intf, pm_message_t message) struct iguanair *ir = usb_get_intfdata(intf); int rc = 0; - mutex_lock(&ir->lock); - if (ir->receiver_on) { rc = iguanair_receiver(ir, false); if (rc) @@ -549,17 +525,13 @@ static int iguanair_suspend(struct usb_interface *intf, pm_message_t message) usb_kill_urb(ir->urb_in); usb_kill_urb(ir->urb_out); - mutex_unlock(&ir->lock); - return rc; } static int iguanair_resume(struct usb_interface *intf) { struct iguanair *ir = usb_get_intfdata(intf); - int rc = 0; - - mutex_lock(&ir->lock); + int rc; rc = usb_submit_urb(ir->urb_in, GFP_KERNEL); if (rc) @@ -571,8 +543,6 @@ static int iguanair_resume(struct usb_interface *intf) dev_warn(ir->dev, "failed to enable receiver after resume\n"); } - mutex_unlock(&ir->lock); - return rc; } @@ -582,7 +552,7 @@ static const struct usb_device_id iguanair_table[] = { }; static struct usb_driver iguanair_driver = { - .name = DRIVER_NAME, + .name = KBUILD_MODNAME, .probe = iguanair_probe, .disconnect = iguanair_disconnect, .suspend = iguanair_suspend, -- GitLab From 7c3bae3f430af6b4fcbdb7272e191e266fd94b45 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 3 Mar 2020 12:01:59 +0100 Subject: [PATCH 230/503] media: v4l2-ctrls: v4l2_ctrl_g/s_ctrl*(): don't continue when WARN_ON If the v4l2_ctrl_g_ctrl*() or __v4l2_ctrl_s_ctrl*() functions are called for the wrong control type then they call WARN_ON since that is a driver error. But they still continue, potentially overwriting data. Change this to return an error (s_ctrl) or 0 (g_ctrl), just to be safe. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-ctrls.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 0186ba85aac7e..77b0132d9f6f6 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -3799,7 +3799,8 @@ s32 v4l2_ctrl_g_ctrl(struct v4l2_ctrl *ctrl) struct v4l2_ext_control c; /* It's a driver bug if this happens. */ - WARN_ON(!ctrl->is_int); + if (WARN_ON(!ctrl->is_int)) + return 0; c.value = 0; get_ctrl(ctrl, &c); return c.value; @@ -3811,7 +3812,8 @@ s64 v4l2_ctrl_g_ctrl_int64(struct v4l2_ctrl *ctrl) struct v4l2_ext_control c; /* It's a driver bug if this happens. */ - WARN_ON(ctrl->is_ptr || ctrl->type != V4L2_CTRL_TYPE_INTEGER64); + if (WARN_ON(ctrl->is_ptr || ctrl->type != V4L2_CTRL_TYPE_INTEGER64)) + return 0; c.value64 = 0; get_ctrl(ctrl, &c); return c.value64; @@ -4220,7 +4222,8 @@ int __v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val) lockdep_assert_held(ctrl->handler->lock); /* It's a driver bug if this happens. */ - WARN_ON(!ctrl->is_int); + if (WARN_ON(!ctrl->is_int)) + return -EINVAL; ctrl->val = val; return set_ctrl(NULL, ctrl, 0); } @@ -4231,7 +4234,8 @@ int __v4l2_ctrl_s_ctrl_int64(struct v4l2_ctrl *ctrl, s64 val) lockdep_assert_held(ctrl->handler->lock); /* It's a driver bug if this happens. */ - WARN_ON(ctrl->is_ptr || ctrl->type != V4L2_CTRL_TYPE_INTEGER64); + if (WARN_ON(ctrl->is_ptr || ctrl->type != V4L2_CTRL_TYPE_INTEGER64)) + return -EINVAL; *ctrl->p_new.p_s64 = val; return set_ctrl(NULL, ctrl, 0); } @@ -4242,7 +4246,8 @@ int __v4l2_ctrl_s_ctrl_string(struct v4l2_ctrl *ctrl, const char *s) lockdep_assert_held(ctrl->handler->lock); /* It's a driver bug if this happens. */ - WARN_ON(ctrl->type != V4L2_CTRL_TYPE_STRING); + if (WARN_ON(ctrl->type != V4L2_CTRL_TYPE_STRING)) + return -EINVAL; strscpy(ctrl->p_new.p_char, s, ctrl->maximum + 1); return set_ctrl(NULL, ctrl, 0); } @@ -4254,7 +4259,8 @@ int __v4l2_ctrl_s_ctrl_area(struct v4l2_ctrl *ctrl, lockdep_assert_held(ctrl->handler->lock); /* It's a driver bug if this happens. */ - WARN_ON(ctrl->type != V4L2_CTRL_TYPE_AREA); + if (WARN_ON(ctrl->type != V4L2_CTRL_TYPE_AREA)) + return -EINVAL; *ctrl->p_new.p_area = *area; return set_ctrl(NULL, ctrl, 0); } -- GitLab From b2b1046f1de6263e6281d46fd376ee048f09d013 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 3 Mar 2020 12:02:00 +0100 Subject: [PATCH 231/503] media: v4l2-ctrls: add __v4l2_ctrl_s_ctrl_compound() Rather than creating new compound control helpers for each new type, create one generic function and just create defines on top. Signed-off-by: Hans Verkuil Tested-by: Paul Kocialkowski Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-ctrls.c | 10 +++--- include/media/v4l2-ctrls.h | 49 ++++++++++++++++------------ 2 files changed, 34 insertions(+), 25 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 77b0132d9f6f6..1c617b42a944d 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -4253,18 +4253,18 @@ int __v4l2_ctrl_s_ctrl_string(struct v4l2_ctrl *ctrl, const char *s) } EXPORT_SYMBOL(__v4l2_ctrl_s_ctrl_string); -int __v4l2_ctrl_s_ctrl_area(struct v4l2_ctrl *ctrl, - const struct v4l2_area *area) +int __v4l2_ctrl_s_ctrl_compound(struct v4l2_ctrl *ctrl, + enum v4l2_ctrl_type type, const void *p) { lockdep_assert_held(ctrl->handler->lock); /* It's a driver bug if this happens. */ - if (WARN_ON(ctrl->type != V4L2_CTRL_TYPE_AREA)) + if (WARN_ON(ctrl->type != type)) return -EINVAL; - *ctrl->p_new.p_area = *area; + memcpy(ctrl->p_new.p, p, ctrl->elems * ctrl->elem_size); return set_ctrl(NULL, ctrl, 0); } -EXPORT_SYMBOL(__v4l2_ctrl_s_ctrl_area); +EXPORT_SYMBOL(__v4l2_ctrl_s_ctrl_compound); void v4l2_ctrl_request_complete(struct media_request *req, struct v4l2_ctrl_handler *main_hdl) diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index 7db9e719a5838..75a8daacb4c4a 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h @@ -1113,45 +1113,54 @@ static inline int v4l2_ctrl_s_ctrl_string(struct v4l2_ctrl *ctrl, const char *s) } /** - * __v4l2_ctrl_s_ctrl_area() - Unlocked variant of v4l2_ctrl_s_ctrl_area(). + * __v4l2_ctrl_s_ctrl_compound() - Unlocked variant to set a compound control * - * @ctrl: The control. - * @area: The new area. + * @ctrl: The control. + * @type: The type of the data. + * @p: The new compound payload. * - * This sets the control's new area safely by going through the control - * framework. This function assumes the control's handler is already locked, - * allowing it to be used from within the &v4l2_ctrl_ops functions. + * This sets the control's new compound payload safely by going through the + * control framework. This function assumes the control's handler is already + * locked, allowing it to be used from within the &v4l2_ctrl_ops functions. * - * This function is for area type controls only. + * This function is for compound type controls only. */ -int __v4l2_ctrl_s_ctrl_area(struct v4l2_ctrl *ctrl, - const struct v4l2_area *area); +int __v4l2_ctrl_s_ctrl_compound(struct v4l2_ctrl *ctrl, + enum v4l2_ctrl_type type, const void *p); /** - * v4l2_ctrl_s_ctrl_area() - Helper function to set a control's area value - * from within a driver. + * v4l2_ctrl_s_ctrl_compound() - Helper function to set a compound control + * from within a driver. * - * @ctrl: The control. - * @area: The new area. + * @ctrl: The control. + * @type: The type of the data. + * @p: The new compound payload. * - * This sets the control's new area safely by going through the control - * framework. This function will lock the control's handler, so it cannot be - * used from within the &v4l2_ctrl_ops functions. + * This sets the control's new compound payload safely by going through the + * control framework. This function will lock the control's handler, so it + * cannot be used from within the &v4l2_ctrl_ops functions. * - * This function is for area type controls only. + * This function is for compound type controls only. */ -static inline int v4l2_ctrl_s_ctrl_area(struct v4l2_ctrl *ctrl, - const struct v4l2_area *area) +static inline int v4l2_ctrl_s_ctrl_compound(struct v4l2_ctrl *ctrl, + enum v4l2_ctrl_type type, + const void *p) { int rval; v4l2_ctrl_lock(ctrl); - rval = __v4l2_ctrl_s_ctrl_area(ctrl, area); + rval = __v4l2_ctrl_s_ctrl_compound(ctrl, type, p); v4l2_ctrl_unlock(ctrl); return rval; } +/* Helper defines for area type controls */ +#define __v4l2_ctrl_s_ctrl_area(ctrl, area) \ + __v4l2_ctrl_s_ctrl_compound((ctrl), V4L2_CTRL_TYPE_AREA, (area)) +#define v4l2_ctrl_s_ctrl_area(ctrl, area) \ + v4l2_ctrl_s_ctrl_compound((ctrl), V4L2_CTRL_TYPE_AREA, (area)) + /* Internal helper functions that deal with control events. */ extern const struct v4l2_subscribed_event_ops v4l2_ctrl_sub_ev_ops; -- GitLab From 60e915354c27035717d95af4465cfa1b42b9240a Mon Sep 17 00:00:00 2001 From: Helen Koike Date: Mon, 16 Mar 2020 22:00:43 +0100 Subject: [PATCH 232/503] media: staging: rkisp1: cap: fix return values from pm functions If no errors occurs, pm functions return usage counters, so they can return positive numbers. This happens when streaming from multiple capture devices (mainpath and selfpath). Fix simultaneous streaming from mainpath and selfpath by not failing when pm usage counters returns a positive number. Signed-off-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 7e3d498d0b4f8..b371bbd70d63f 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -892,7 +892,7 @@ static void rkisp1_vb2_stop_streaming(struct vb2_queue *queue) v4l2_pipeline_pm_put(&node->vdev.entity); ret = pm_runtime_put(rkisp1->dev); - if (ret) + if (ret < 0) dev_err(rkisp1->dev, "power down failed error:%d\n", ret); rkisp1_dummy_buf_destroy(cap); @@ -945,7 +945,7 @@ rkisp1_vb2_start_streaming(struct vb2_queue *queue, unsigned int count) goto err_ret_buffers; ret = pm_runtime_get_sync(cap->rkisp1->dev); - if (ret) { + if (ret < 0) { dev_err(cap->rkisp1->dev, "power up failed %d\n", ret); goto err_destroy_dummy; } -- GitLab From e4b0326c4d706fa9cb844878595b55c82f8a4701 Mon Sep 17 00:00:00 2001 From: Helen Koike Date: Mon, 16 Mar 2020 22:00:44 +0100 Subject: [PATCH 233/503] media: staging: rkisp1: cap: serialize start/stop stream In order to support simultaneous streaming from both capture devices, start/stop vb2 calls need to be serialized to allow multiple concurrent calls. Signed-off-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 9 +++++++++ drivers/staging/media/rkisp1/rkisp1-common.h | 2 ++ drivers/staging/media/rkisp1/rkisp1-dev.c | 2 ++ 3 files changed, 13 insertions(+) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index b371bbd70d63f..144a690049917 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -880,6 +880,8 @@ static void rkisp1_vb2_stop_streaming(struct vb2_queue *queue) struct rkisp1_device *rkisp1 = cap->rkisp1; int ret; + mutex_lock(&cap->rkisp1->stream_lock); + rkisp1_stream_stop(cap); media_pipeline_stop(&node->vdev.entity); ret = rkisp1_pipeline_sink_walk(&node->vdev.entity, NULL, @@ -896,6 +898,8 @@ static void rkisp1_vb2_stop_streaming(struct vb2_queue *queue) dev_err(rkisp1->dev, "power down failed error:%d\n", ret); rkisp1_dummy_buf_destroy(cap); + + mutex_unlock(&cap->rkisp1->stream_lock); } /* @@ -940,6 +944,8 @@ rkisp1_vb2_start_streaming(struct vb2_queue *queue, unsigned int count) struct media_entity *entity = &cap->vnode.vdev.entity; int ret; + mutex_lock(&cap->rkisp1->stream_lock); + ret = rkisp1_dummy_buf_create(cap); if (ret) goto err_ret_buffers; @@ -969,6 +975,8 @@ rkisp1_vb2_start_streaming(struct vb2_queue *queue, unsigned int count) goto err_pipe_disable; } + mutex_unlock(&cap->rkisp1->stream_lock); + return 0; err_pipe_disable: @@ -982,6 +990,7 @@ rkisp1_vb2_start_streaming(struct vb2_queue *queue, unsigned int count) rkisp1_dummy_buf_destroy(cap); err_ret_buffers: rkisp1_return_all_buffers(cap, VB2_BUF_STATE_QUEUED); + mutex_unlock(&cap->rkisp1->stream_lock); return ret; } diff --git a/drivers/staging/media/rkisp1/rkisp1-common.h b/drivers/staging/media/rkisp1/rkisp1-common.h index ccf4bb0deb02c..5d2c3187871d7 100644 --- a/drivers/staging/media/rkisp1/rkisp1-common.h +++ b/drivers/staging/media/rkisp1/rkisp1-common.h @@ -240,6 +240,7 @@ struct rkisp1_debug { * @rkisp1_capture: capture video device * @stats: ISP statistics output device * @params: ISP input parameters device + * @stream_lock: lock to serialize start/stop streaming in capture devices. */ struct rkisp1_device { void __iomem *base_addr; @@ -259,6 +260,7 @@ struct rkisp1_device { struct rkisp1_params params; struct media_pipeline pipe; struct vb2_alloc_ctx *alloc_ctx; + struct mutex stream_lock; struct rkisp1_debug debug; }; diff --git a/drivers/staging/media/rkisp1/rkisp1-dev.c b/drivers/staging/media/rkisp1/rkisp1-dev.c index 3f62857093525..92d4cd66d36eb 100644 --- a/drivers/staging/media/rkisp1/rkisp1-dev.c +++ b/drivers/staging/media/rkisp1/rkisp1-dev.c @@ -472,6 +472,8 @@ static int rkisp1_probe(struct platform_device *pdev) dev_set_drvdata(dev, rkisp1); rkisp1->dev = dev; + mutex_init(&rkisp1->stream_lock); + rkisp1->base_addr = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(rkisp1->base_addr)) return PTR_ERR(rkisp1->base_addr); -- GitLab From 4d0b43804c1245c63b5f87d89d14affc2195336f Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Tue, 17 Mar 2020 19:07:00 +0100 Subject: [PATCH 234/503] media: staging: rkisp1: remove mbus field from rkisp1_sensor_async 'struct v4l2_mbus_config' is a legacy struct that should not be used in new drivers. So replace it with the fields: enum v4l2_mbus_type mbus_type; unsigned int mbus_flags; Signed-off-by: Dafna Hirschfeld Acked-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-common.h | 3 +- drivers/staging/media/rkisp1/rkisp1-dev.c | 20 ++------ drivers/staging/media/rkisp1/rkisp1-isp.c | 50 +++++++------------- 3 files changed, 21 insertions(+), 52 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-common.h b/drivers/staging/media/rkisp1/rkisp1-common.h index 5d2c3187871d7..0c4fe503adc90 100644 --- a/drivers/staging/media/rkisp1/rkisp1-common.h +++ b/drivers/staging/media/rkisp1/rkisp1-common.h @@ -73,8 +73,9 @@ enum rkisp1_isp_pad { */ struct rkisp1_sensor_async { struct v4l2_async_subdev asd; - struct v4l2_mbus_config mbus; unsigned int lanes; + enum v4l2_mbus_type mbus_type; + unsigned int mbus_flags; struct v4l2_subdev *sd; struct v4l2_ctrl *pixel_rate_ctrl; struct phy *dphy; diff --git a/drivers/staging/media/rkisp1/rkisp1-dev.c b/drivers/staging/media/rkisp1/rkisp1-dev.c index 92d4cd66d36eb..ec7d9cf291069 100644 --- a/drivers/staging/media/rkisp1/rkisp1-dev.c +++ b/drivers/staging/media/rkisp1/rkisp1-dev.c @@ -250,26 +250,12 @@ static int rkisp1_fwnode_parse(struct device *dev, return -EINVAL; } - s_asd->mbus.type = vep->bus_type; - s_asd->mbus.flags = vep->bus.mipi_csi2.flags; + s_asd->mbus_type = vep->bus_type; + s_asd->mbus_flags = vep->bus.mipi_csi2.flags; s_asd->lanes = vep->bus.mipi_csi2.num_data_lanes; - switch (vep->bus.mipi_csi2.num_data_lanes) { - case 1: - s_asd->mbus.flags |= V4L2_MBUS_CSI2_1_LANE; - break; - case 2: - s_asd->mbus.flags |= V4L2_MBUS_CSI2_2_LANE; - break; - case 3: - s_asd->mbus.flags |= V4L2_MBUS_CSI2_3_LANE; - break; - case 4: - s_asd->mbus.flags |= V4L2_MBUS_CSI2_4_LANE; - break; - default: + if (s_asd->lanes < 1 || s_asd->lanes > 4) return -EINVAL; - } return 0; } diff --git a/drivers/staging/media/rkisp1/rkisp1-isp.c b/drivers/staging/media/rkisp1/rkisp1-isp.c index 60f6b8d9004ba..61f159e59d07a 100644 --- a/drivers/staging/media/rkisp1/rkisp1-isp.c +++ b/drivers/staging/media/rkisp1/rkisp1-isp.c @@ -299,17 +299,17 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) rkisp1_write(rkisp1, RKISP1_CIF_ISP_DEMOSAIC_TH(0xc), RKISP1_CIF_ISP_DEMOSAIC); - if (sensor->mbus.type == V4L2_MBUS_BT656) + if (sensor->mbus_type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU656; else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601; } } else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) { acq_mult = 2; - if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) { + if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) { isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; } else { - if (sensor->mbus.type == V4L2_MBUS_BT656) + if (sensor->mbus_type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656; else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; @@ -319,17 +319,17 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) } /* Set up input acquisition properties */ - if (sensor->mbus.type == V4L2_MBUS_BT656 || - sensor->mbus.type == V4L2_MBUS_PARALLEL) { - if (sensor->mbus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING) + if (sensor->mbus_type == V4L2_MBUS_BT656 || + sensor->mbus_type == V4L2_MBUS_PARALLEL) { + if (sensor->mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) signal = RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE; } - if (sensor->mbus.type == V4L2_MBUS_PARALLEL) { - if (sensor->mbus.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) + if (sensor->mbus_type == V4L2_MBUS_PARALLEL) { + if (sensor->mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) signal |= RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW; - if (sensor->mbus.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) + if (sensor->mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) signal |= RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW; } @@ -401,29 +401,11 @@ static int rkisp1_config_dvp(struct rkisp1_device *rkisp1) static int rkisp1_config_mipi(struct rkisp1_device *rkisp1) { const struct rkisp1_isp_mbus_info *sink_fmt = rkisp1->isp.sink_fmt; - unsigned int lanes; + unsigned int lanes = rkisp1->active_sensor->lanes; u32 mipi_ctrl; - /* - * rkisp1->active_sensor->mbus is set in isp or d-phy notifier_bound - * function - */ - switch (rkisp1->active_sensor->mbus.flags & V4L2_MBUS_CSI2_LANES) { - case V4L2_MBUS_CSI2_4_LANE: - lanes = 4; - break; - case V4L2_MBUS_CSI2_3_LANE: - lanes = 3; - break; - case V4L2_MBUS_CSI2_2_LANE: - lanes = 2; - break; - case V4L2_MBUS_CSI2_1_LANE: - lanes = 1; - break; - default: + if (lanes < 1 || lanes > 4) return -EINVAL; - } mipi_ctrl = RKISP1_CIF_MIPI_CTRL_NUM_LANES(lanes - 1) | RKISP1_CIF_MIPI_CTRL_SHUTDOWNLANES(0xf) | @@ -470,11 +452,11 @@ static int rkisp1_config_path(struct rkisp1_device *rkisp1) u32 dpcl = rkisp1_read(rkisp1, RKISP1_CIF_VI_DPCL); int ret = 0; - if (sensor->mbus.type == V4L2_MBUS_BT656 || - sensor->mbus.type == V4L2_MBUS_PARALLEL) { + if (sensor->mbus_type == V4L2_MBUS_BT656 || + sensor->mbus_type == V4L2_MBUS_PARALLEL) { ret = rkisp1_config_dvp(rkisp1); dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL; - } else if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) { + } else if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) { ret = rkisp1_config_mipi(rkisp1); dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_MIPI; } @@ -561,7 +543,7 @@ static void rkisp1_isp_start(struct rkisp1_device *rkisp1) rkisp1_config_clk(rkisp1); /* Activate MIPI */ - if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) { + if (sensor->mbus_type == V4L2_MBUS_CSI2_DPHY) { val = rkisp1_read(rkisp1, RKISP1_CIF_MIPI_CTRL); rkisp1_write(rkisp1, val | RKISP1_CIF_MIPI_CTRL_OUTPUT_ENA, RKISP1_CIF_MIPI_CTRL); @@ -956,7 +938,7 @@ static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable) rkisp1->active_sensor = container_of(sensor_sd->asd, struct rkisp1_sensor_async, asd); - if (rkisp1->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY) + if (rkisp1->active_sensor->mbus_type != V4L2_MBUS_CSI2_DPHY) return -EINVAL; atomic_set(&rkisp1->isp.frame_sequence, -1); -- GitLab From 1d3ac27801e51ca919ba78350d0b0079ceb1a39b Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Tue, 17 Mar 2020 19:07:01 +0100 Subject: [PATCH 235/503] media: staging: rkisp1: replace the call to v4l2_async_notifier_parse_fwnode_endpoints_by_port don't call 'v4l2_async_notifier_parse_fwnode_endpoints_by_port' in order to register async subdevices. Instead call 'v4l2_fwnode_endpoint_parse' to parse the remote endpoints and then register each async subdev with 'v4l2_async_notifier_add_fwnode_remote_subdev' Also remove the relevant item in the TODO file Signed-off-by: Dafna Hirschfeld Acked-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/TODO | 3 - drivers/staging/media/rkisp1/rkisp1-dev.c | 90 +++++++++++++---------- 2 files changed, 53 insertions(+), 40 deletions(-) diff --git a/drivers/staging/media/rkisp1/TODO b/drivers/staging/media/rkisp1/TODO index f495b81777676..c0cbec0a164d2 100644 --- a/drivers/staging/media/rkisp1/TODO +++ b/drivers/staging/media/rkisp1/TODO @@ -1,6 +1,3 @@ -* Don't use v4l2_async_notifier_parse_fwnode_endpoints_by_port(). -e.g. isp_parse_of_endpoints in drivers/media/platform/omap3isp/isp.c -cio2_parse_firmware in drivers/media/pci/intel/ipu3/ipu3-cio2.c. * Fix pad format size for statistics and parameters entities. * Use threaded interrupt for rkisp1_stats_isr(), remove work queue. * Fix checkpatch errors. diff --git a/drivers/staging/media/rkisp1/rkisp1-dev.c b/drivers/staging/media/rkisp1/rkisp1-dev.c index ec7d9cf291069..9ac38bafb8399 100644 --- a/drivers/staging/media/rkisp1/rkisp1-dev.c +++ b/drivers/staging/media/rkisp1/rkisp1-dev.c @@ -233,33 +233,6 @@ static int rkisp1_subdev_notifier_complete(struct v4l2_async_notifier *notifier) return 0; } -static int rkisp1_fwnode_parse(struct device *dev, - struct v4l2_fwnode_endpoint *vep, - struct v4l2_async_subdev *asd) -{ - struct rkisp1_sensor_async *s_asd = - container_of(asd, struct rkisp1_sensor_async, asd); - - if (vep->bus_type != V4L2_MBUS_CSI2_DPHY) { - dev_err(dev, "Only CSI2 bus type is currently supported\n"); - return -EINVAL; - } - - if (vep->base.port != 0) { - dev_err(dev, "The ISP has only port 0\n"); - return -EINVAL; - } - - s_asd->mbus_type = vep->bus_type; - s_asd->mbus_flags = vep->bus.mipi_csi2.flags; - s_asd->lanes = vep->bus.mipi_csi2.num_data_lanes; - - if (s_asd->lanes < 1 || s_asd->lanes > 4) - return -EINVAL; - - return 0; -} - static const struct v4l2_async_notifier_operations rkisp1_subdev_notifier_ops = { .bound = rkisp1_subdev_notifier_bound, .unbind = rkisp1_subdev_notifier_unbind, @@ -269,23 +242,66 @@ static const struct v4l2_async_notifier_operations rkisp1_subdev_notifier_ops = static int rkisp1_subdev_notifier(struct rkisp1_device *rkisp1) { struct v4l2_async_notifier *ntf = &rkisp1->notifier; - struct device *dev = rkisp1->dev; + unsigned int next_id = 0; int ret; v4l2_async_notifier_init(ntf); - ret = v4l2_async_notifier_parse_fwnode_endpoints_by_port(dev, ntf, - sizeof(struct rkisp1_sensor_async), - 0, rkisp1_fwnode_parse); - if (ret) - return ret; + while (1) { + struct v4l2_fwnode_endpoint vep = { + .bus_type = V4L2_MBUS_CSI2_DPHY + }; + struct rkisp1_sensor_async *rk_asd = NULL; + struct fwnode_handle *ep; - if (list_empty(&ntf->asd_list)) - return -ENODEV; + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(rkisp1->dev), + 0, next_id, FWNODE_GRAPH_ENDPOINT_NEXT); + if (!ep) + break; - ntf->ops = &rkisp1_subdev_notifier_ops; + ret = v4l2_fwnode_endpoint_parse(ep, &vep); + if (ret) + goto err_parse; - return v4l2_async_notifier_register(&rkisp1->v4l2_dev, ntf); + rk_asd = kzalloc(sizeof(*rk_asd), GFP_KERNEL); + if (!rk_asd) { + ret = -ENOMEM; + goto err_parse; + } + + rk_asd->mbus_type = vep.bus_type; + rk_asd->mbus_flags = vep.bus.mipi_csi2.flags; + rk_asd->lanes = vep.bus.mipi_csi2.num_data_lanes; + + ret = v4l2_async_notifier_add_fwnode_remote_subdev(ntf, ep, + &rk_asd->asd); + if (ret) + goto err_parse; + + dev_dbg(rkisp1->dev, "registered ep id %d with %d lanes\n", + vep.base.id, rk_asd->lanes); + + next_id = vep.base.id + 1; + + fwnode_handle_put(ep); + + continue; +err_parse: + fwnode_handle_put(ep); + kfree(rk_asd); + v4l2_async_notifier_cleanup(ntf); + return ret; + } + + if (next_id == 0) + dev_dbg(rkisp1->dev, "no remote subdevice found\n"); + ntf->ops = &rkisp1_subdev_notifier_ops; + ret = v4l2_async_notifier_register(&rkisp1->v4l2_dev, ntf); + if (ret) { + v4l2_async_notifier_cleanup(ntf); + return ret; + } + return 0; } /* ---------------------------------------------------------------------------- -- GitLab From 66f92c4e1701d9d3c8b97503bd3aeb614a441a62 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Wed, 18 Mar 2020 19:36:49 +0100 Subject: [PATCH 236/503] media: coda: add RC enable controls Currently the encoder enables the rate control algorithms if the bitrate control is non-zero. Implement the V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE and V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE controls to allow userspace to choose frame-level or macroblock-level rate control updates, or to explicitly disable rate control. Both controls are initially enabled to keep the current behavior. Signed-off-by: Philipp Zabel Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/coda/coda-bit.c | 9 +++++++-- drivers/media/platform/coda/coda-common.c | 10 ++++++++++ drivers/media/platform/coda/coda.h | 2 ++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/coda/coda-bit.c b/drivers/media/platform/coda/coda-bit.c index 3443396ba5f3c..b021604eceaad 100644 --- a/drivers/media/platform/coda/coda-bit.c +++ b/drivers/media/platform/coda/coda-bit.c @@ -1215,7 +1215,8 @@ static int coda_start_encoding(struct coda_ctx *ctx) coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE); } - if (ctx->params.bitrate) { + if (ctx->params.bitrate && (ctx->params.frame_rc_enable || + ctx->params.mb_rc_enable)) { ctx->params.bitrate_changed = false; ctx->params.h264_intra_qp_changed = false; @@ -1276,7 +1277,11 @@ static int coda_start_encoding(struct coda_ctx *ctx) } coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION); - coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE); + if (ctx->params.frame_rc_enable && !ctx->params.mb_rc_enable) + value = 1; + else + value = 0; + coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE); coda_setup_iram(ctx); diff --git a/drivers/media/platform/coda/coda-common.c b/drivers/media/platform/coda/coda-common.c index 80ad2db3e9c9d..6f41f74d492c6 100644 --- a/drivers/media/platform/coda/coda-common.c +++ b/drivers/media/platform/coda/coda-common.c @@ -2223,6 +2223,12 @@ static int coda_s_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION: ctx->params.h264_constrained_intra_pred_flag = ctrl->val; break; + case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE: + ctx->params.frame_rc_enable = ctrl->val; + break; + case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE: + ctx->params.mb_rc_enable = ctrl->val; + break; case V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET: ctx->params.h264_chroma_qp_index_offset = ctrl->val; break; @@ -2321,6 +2327,10 @@ static void coda_encode_ctrls(struct coda_ctx *ctx) v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, V4L2_CID_MPEG_VIDEO_H264_CONSTRAINED_INTRA_PREDICTION, 0, 1, 1, 0); + v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, + V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE, 0, 1, 1, 1); + v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, + V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, 0, 1, 1, 1); v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops, V4L2_CID_MPEG_VIDEO_H264_CHROMA_QP_INDEX_OFFSET, -12, 12, 1, 0); v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops, diff --git a/drivers/media/platform/coda/coda.h b/drivers/media/platform/coda/coda.h index af0f8252b0c69..b81f3aca9209d 100644 --- a/drivers/media/platform/coda/coda.h +++ b/drivers/media/platform/coda/coda.h @@ -148,6 +148,8 @@ struct coda_params { bool h264_intra_qp_changed; bool intra_refresh_changed; bool slice_mode_changed; + bool frame_rc_enable; + bool mb_rc_enable; }; struct coda_buffer_meta { -- GitLab From ba99522b2bd08bf3ec7126bd363cf18ade74ed2f Mon Sep 17 00:00:00 2001 From: Marco Felsch Date: Thu, 2 Apr 2020 10:49:57 +0200 Subject: [PATCH 237/503] media: v4l2-image-sizes: add HD and Full-HD definitions Add common (Full-)HD definitions also known as 720p and 1080p. Signed-off-by: Marco Felsch Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-image-sizes.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/media/v4l2-image-sizes.h b/include/media/v4l2-image-sizes.h index 450f4f5d3d6a1..24a7a0bb59aba 100644 --- a/include/media/v4l2-image-sizes.h +++ b/include/media/v4l2-image-sizes.h @@ -10,6 +10,12 @@ #define CIF_WIDTH 352 #define CIF_HEIGHT 288 +#define HD_720_WIDTH 1280 +#define HD_720_HEIGHT 720 + +#define HD_1080_WIDTH 1920 +#define HD_1080_HEIGHT 1080 + #define QCIF_WIDTH 176 #define QCIF_HEIGHT 144 -- GitLab From ceb348690e29e3b14f9506d2d6d36748b1eda3c2 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 11 Apr 2020 18:05:57 +0200 Subject: [PATCH 238/503] media: staging: rkisp1: cap: cleanup in mainpath config for uv swap format The value RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP equals BIT(0), Therefore when writing it to the register there is no need to mask it first with ~BIT(0). Signed-off-by: Dafna Hirschfeld Acked-by: Helen Koike Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 144a690049917..9a0455aafde6f 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -386,8 +386,7 @@ static void rkisp1_mp_config(struct rkisp1_capture *cap) if (cap->pix.cfg->uv_swap) { reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - reg = (reg & ~BIT(0)) | - RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; + reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); } -- GitLab From a557c3fa96c867b8f98a6bb65deb8c6b1de7c2c5 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 11 Apr 2020 18:05:58 +0200 Subject: [PATCH 239/503] media: staging: rkisp1: cap: fix value written to uv swap register in selfpath The value RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP should be set to the register instead of masking with ~BIT(1) Signed-off-by: Dafna Hirschfeld Acked-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 9a0455aafde6f..cd6b94be9daff 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -423,8 +423,8 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap) if (cap->pix.cfg->uv_swap) { u32 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - rkisp1_write(rkisp1, reg & ~BIT(1), - RKISP1_CIF_MI_XTD_FORMAT_CTRL); + reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; + rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); } rkisp1_mi_config_ctrl(cap); -- GitLab From b82b3993745946def468694be6075fcbde53c287 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 11 Apr 2020 18:05:59 +0200 Subject: [PATCH 240/503] media: staging: rkisp1: cap: change the logic for writing to uv swap register The register RKISP1_CIF_MI_XTD_FORMAT_CTRL is currently written with "on" only if the u,v streams need to be swapped. This patch also write to it with "off" if they don't need to be swapped. Signed-off-by: Dafna Hirschfeld Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 21 ++++++++++--------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index cd6b94be9daff..7ffedf6525e77 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -383,12 +383,12 @@ static void rkisp1_mp_config(struct rkisp1_capture *cap) cap->config->mi.cr_size_init); rkisp1_irq_frame_end_enable(cap); - if (cap->pix.cfg->uv_swap) { - reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + if (cap->pix.cfg->uv_swap) reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; - rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - } + else + reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; + rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); rkisp1_mi_config_ctrl(cap); @@ -406,7 +406,7 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap) { const struct v4l2_pix_format_mplane *pixm = &cap->pix.fmt; struct rkisp1_device *rkisp1 = cap->rkisp1; - u32 mi_ctrl; + u32 mi_ctrl, reg; rkisp1_write(rkisp1, rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_Y), cap->config->mi.y_size_init); @@ -420,12 +420,13 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap) rkisp1_write(rkisp1, cap->sp_y_stride, RKISP1_CIF_MI_SP_Y_LLENGTH); rkisp1_irq_frame_end_enable(cap); - if (cap->pix.cfg->uv_swap) { - u32 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + if (cap->pix.cfg->uv_swap) reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; - rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - } + else + reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; + rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); rkisp1_mi_config_ctrl(cap); -- GitLab From c6a86569e841259d41db81d3d8f619f205be8217 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 11 Apr 2020 18:06:00 +0200 Subject: [PATCH 241/503] media: staging: rkisp1: cap: support uv swap only for semiplanar formats The register RKISP1_CIF_MI_XTD_FORMAT_CTRL is relevant only for semiplanar formats, therefore the uv swap can be supported through this register only for semiplanar formats. Signed-off-by: Dafna Hirschfeld Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 31 ++++++++++++------- 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 7ffedf6525e77..4c18b081480c9 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -383,12 +383,16 @@ static void rkisp1_mp_config(struct rkisp1_capture *cap) cap->config->mi.cr_size_init); rkisp1_irq_frame_end_enable(cap); - reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - if (cap->pix.cfg->uv_swap) - reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; - else - reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; - rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + + /* set uv swapping for semiplanar formats */ + if (cap->pix.info->comp_planes == 2) { + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + if (cap->pix.cfg->uv_swap) + reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; + else + reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP; + rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + } rkisp1_mi_config_ctrl(cap); @@ -421,12 +425,15 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap) rkisp1_irq_frame_end_enable(cap); - reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); - if (cap->pix.cfg->uv_swap) - reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; - else - reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; - rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + /* set uv swapping for semiplanar formats */ + if (cap->pix.info->comp_planes == 2) { + reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + if (cap->pix.cfg->uv_swap) + reg |= RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; + else + reg &= ~RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP; + rkisp1_write(rkisp1, reg, RKISP1_CIF_MI_XTD_FORMAT_CTRL); + } rkisp1_mi_config_ctrl(cap); -- GitLab From d0dd92789f44cb093d1da9a68d40a5f09402462a Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sat, 11 Apr 2020 18:06:01 +0200 Subject: [PATCH 242/503] media: staging: rkisp1: cap: support uv swapped planar formats Planar formats with the u and v planes swapped can be supported by swapping the address of the cb and cr buffers. Signed-off-by: Dafna Hirschfeld Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 4c18b081480c9..21496fb2c4daa 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -738,6 +738,14 @@ static void rkisp1_vb2_buf_queue(struct vb2_buffer *vb) rkisp1_pixfmt_comp_size(pixm, RKISP1_PLANE_CB); } + /* + * uv swap can be supported for planar formats by switching + * the address of cb and cr + */ + if (cap->pix.info->comp_planes == 3 && cap->pix.cfg->uv_swap) + swap(ispbuf->buff_addr[RKISP1_PLANE_CR], + ispbuf->buff_addr[RKISP1_PLANE_CB]); + spin_lock_irqsave(&cap->buf.lock, flags); /* -- GitLab From b1f487ef3339de6e9db92a45c054f6bb1679636d Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Fri, 3 Apr 2020 15:06:06 +0200 Subject: [PATCH 243/503] media: dt-bindings: media: convert rockchip rga bindings to yaml Current dts files for Rockchip with 'rga' nodes are manually verified. In order to automate this process rockchip-rga.txt has to be converted to yaml. Changed: Add missing reg property Signed-off-by: Johan Jonker Reviewed-by: Rob Herring Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../bindings/media/rockchip-rga.txt | 34 -------- .../bindings/media/rockchip-rga.yaml | 78 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 79 insertions(+), 34 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.yaml diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt b/Documentation/devicetree/bindings/media/rockchip-rga.txt deleted file mode 100644 index c53a8e5133f6e..0000000000000 --- a/Documentation/devicetree/bindings/media/rockchip-rga.txt +++ /dev/null @@ -1,34 +0,0 @@ -device-tree bindings for rockchip 2D raster graphic acceleration controller (RGA) - -RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D -graphics operations, such as point/line drawing, image scaling, rotation, -BitBLT, alpha blending and image blur/sharpness. - -Required properties: -- compatible: value should be one of the following - "rockchip,rk3228-rga", "rockchip,rk3288-rga": for Rockchip RK3228 - "rockchip,rk3288-rga": for Rockchip RK3288 - "rockchip,rk3399-rga": for Rockchip RK3399 - -- interrupts: RGA interrupt specifier. - -- clocks: phandle to RGA sclk/hclk/aclk clocks - -- clock-names: should be "aclk", "hclk" and "sclk" - -- resets: Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: should be "core", "axi" and "ahb" - -Example: -SoC-specific DT entry: - rga: rga@ff680000 { - compatible = "rockchip,rk3399-rga"; - reg = <0xff680000 0x10000>; - interrupts = ; - clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>; - clock-names = "aclk", "hclk", "sclk"; - - resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>; - reset-names = "core, "axi", "ahb"; - }; diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.yaml b/Documentation/devicetree/bindings/media/rockchip-rga.yaml new file mode 100644 index 0000000000000..3b110b574bce3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip-rga.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip-rga.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip 2D raster graphic acceleration controller (RGA) + +description: + RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D + graphics operations, such as point/line drawing, image scaling, rotation, + BitBLT, alpha blending and image blur/sharpness. + +maintainers: + - Jacob Chen + - Ezequiel Garcia + +properties: + compatible: + oneOf: + - const: rockchip,rk3288-rga + - const: rockchip,rk3399-rga + - items: + - const: rockchip,rk3228-rga + - const: rockchip,rk3288-rga + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: aclk + - const: hclk + - const: sclk + + resets: + maxItems: 3 + + reset-names: + items: + - const: core + - const: axi + - const: ahb + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + #include + #include + rga: rga@ff680000 { + compatible = "rockchip,rk3399-rga"; + reg = <0xff680000 0x10000>; + interrupts = ; + clocks = <&cru ACLK_RGA>, + <&cru HCLK_RGA>, + <&cru SCLK_RGA_CORE>; + clock-names = "aclk", "hclk", "sclk"; + resets = <&cru SRST_RGA_CORE>, + <&cru SRST_A_RGA>, + <&cru SRST_H_RGA>; + reset-names = "core", "axi", "ahb"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index a796ee586e2f0..a973a73cc2158 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14484,6 +14484,7 @@ M: Ezequiel Garcia L: linux-media@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +F: Documentation/devicetree/bindings/media/rockchip-rga.yaml F: Documentation/devicetree/bindings/media/rockchip-vpu.yaml F: drivers/media/platform/rockchip/rga/ -- GitLab From b2965c912a3dbc40821cd27fa5548ae9a086a375 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Fri, 3 Apr 2020 15:06:07 +0200 Subject: [PATCH 244/503] media: dt-bindings: media: rockchip-rga: add power-domains property In the old txt situation we add/describe only properties that are used by the driver/hardware itself. With yaml it also filters things in a node that are used by other drivers like 'power-domains' for rk3399, so add it to 'rockchip-rga.yaml'. Signed-off-by: Johan Jonker Reviewed-by: Rob Herring Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/devicetree/bindings/media/rockchip-rga.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.yaml b/Documentation/devicetree/bindings/media/rockchip-rga.yaml index 3b110b574bce3..dd645ddccb075 100644 --- a/Documentation/devicetree/bindings/media/rockchip-rga.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-rga.yaml @@ -39,6 +39,9 @@ properties: - const: hclk - const: sclk + power-domains: + maxItems: 1 + resets: maxItems: 3 @@ -63,6 +66,7 @@ examples: - | #include #include + #include rga: rga@ff680000 { compatible = "rockchip,rk3399-rga"; reg = <0xff680000 0x10000>; @@ -71,6 +75,7 @@ examples: <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>; clock-names = "aclk", "hclk", "sclk"; + power-domains = <&power RK3399_PD_RGA>; resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>; -- GitLab From 49c6644eb6acc71a76a46bedb17dd204b105161b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 15:58:55 +0200 Subject: [PATCH 245/503] media: dvb-usb-ids.h: fix an USB PID name The USB_PID_ALINK_DTU is a Product ID, not a vendor ID. Fix that. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/dvb-usb-v2/gl861.c | 2 +- include/media/dvb-usb-ids.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/usb/dvb-usb-v2/gl861.c b/drivers/media/usb/dvb-usb-v2/gl861.c index 42c3b8af0774a..b7ca236174f3e 100644 --- a/drivers/media/usb/dvb-usb-v2/gl861.c +++ b/drivers/media/usb/dvb-usb-v2/gl861.c @@ -550,7 +550,7 @@ static struct dvb_usb_device_properties friio_props = { static const struct usb_device_id gl861_id_table[] = { { DVB_USB_DEVICE(USB_VID_MSI, USB_PID_MSI_MEGASKY580_55801, &gl861_props, "MSI Mega Sky 55801 DVB-T USB2.0", NULL) }, - { DVB_USB_DEVICE(USB_VID_ALINK, USB_VID_ALINK_DTU, + { DVB_USB_DEVICE(USB_VID_ALINK, USB_PID_ALINK_DTU, &gl861_props, "A-LINK DTU DVB-T USB2.0", NULL) }, { DVB_USB_DEVICE(USB_VID_774, USB_PID_FRIIO_WHITE, &friio_props, "774 Friio White ISDB-T USB2.0", NULL) }, diff --git a/include/media/dvb-usb-ids.h b/include/media/dvb-usb-ids.h index 800d473b03c44..41f0bf122f536 100644 --- a/include/media/dvb-usb-ids.h +++ b/include/media/dvb-usb-ids.h @@ -96,7 +96,7 @@ #define USB_PID_AFATECH_AF9035_9035 0x9035 #define USB_PID_TREKSTOR_DVBT 0x901b #define USB_PID_TREKSTOR_TERRES_2_0 0xC803 -#define USB_VID_ALINK_DTU 0xf170 +#define USB_PID_ALINK_DTU 0xf170 #define USB_PID_ANSONIC_DVBT_USB 0x6000 #define USB_PID_ANYSEE 0x861f #define USB_PID_AZUREWAVE_AD_TU700 0x3237 -- GitLab From 8cbaa12100a1f84b1fbe4b68aae2a10104d41e27 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 16:11:52 +0200 Subject: [PATCH 246/503] media: dvb-usb-v2: use DVB_USB_DEVICE() macro Instead of using USB_DEVICE() macro directly, use the DVB_USB_DEVICE() one, as other dvb-usb-v2 devices. The usage of the new macro makes cleaner and easier to parse the supported device names in a way that it would be easily parseable to generate cardlists. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/dvb-usb-v2/ec168.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/media/usb/dvb-usb-v2/ec168.c b/drivers/media/usb/dvb-usb-v2/ec168.c index e30305876840f..7ed0ab9e429b1 100644 --- a/drivers/media/usb/dvb-usb-v2/ec168.c +++ b/drivers/media/usb/dvb-usb-v2/ec168.c @@ -332,22 +332,17 @@ static const struct dvb_usb_device_properties ec168_props = { }, }; -static const struct dvb_usb_driver_info ec168_driver_info = { - .name = "E3C EC168 reference design", - .props = &ec168_props, -}; - static const struct usb_device_id ec168_id[] = { - { USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168), - .driver_info = (kernel_ulong_t) &ec168_driver_info }, - { USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_2), - .driver_info = (kernel_ulong_t) &ec168_driver_info }, - { USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_3), - .driver_info = (kernel_ulong_t) &ec168_driver_info }, - { USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_4), - .driver_info = (kernel_ulong_t) &ec168_driver_info }, - { USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_5), - .driver_info = (kernel_ulong_t) &ec168_driver_info }, + { DVB_USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168, + &ec168_props, "E3C EC168 reference design", NULL)}, + { DVB_USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_2, + &ec168_props, "E3C EC168 reference design", NULL)}, + { DVB_USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_3, + &ec168_props, "E3C EC168 reference design", NULL)}, + { DVB_USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_4, + &ec168_props, "E3C EC168 reference design", NULL)}, + { DVB_USB_DEVICE(USB_VID_E3C, USB_PID_E3C_EC168_5, + &ec168_props, "E3C EC168 reference design", NULL)}, {} }; MODULE_DEVICE_TABLE(usb, ec168_id); -- GitLab From 52b88c87e22b5b8dc4de52c2bf2ef16f46e6cdd5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 17:26:56 +0200 Subject: [PATCH 247/503] media: pwc-if.c: Update comments about each pwc supported model The USB_DEVICE() list contain some of the product names, but some are missing, and others are different than the message printed during device detection. Update the comments in order to match what the driver prints. That makes easier to discover what model matches what physical device. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/pwc/pwc-if.c | 42 +++++++++++++++++----------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/media/usb/pwc/pwc-if.c b/drivers/media/usb/pwc/pwc-if.c index d57b8b786506d..8270fb061bd60 100644 --- a/drivers/media/usb/pwc/pwc-if.c +++ b/drivers/media/usb/pwc/pwc-if.c @@ -71,37 +71,37 @@ /* hotplug device table support */ static const struct usb_device_id pwc_device_table [] = { - { USB_DEVICE(0x0471, 0x0302) }, /* Philips models */ - { USB_DEVICE(0x0471, 0x0303) }, - { USB_DEVICE(0x0471, 0x0304) }, - { USB_DEVICE(0x0471, 0x0307) }, - { USB_DEVICE(0x0471, 0x0308) }, - { USB_DEVICE(0x0471, 0x030C) }, - { USB_DEVICE(0x0471, 0x0310) }, - { USB_DEVICE(0x0471, 0x0311) }, /* Philips ToUcam PRO II */ - { USB_DEVICE(0x0471, 0x0312) }, - { USB_DEVICE(0x0471, 0x0313) }, /* the 'new' 720K */ - { USB_DEVICE(0x0471, 0x0329) }, /* Philips SPC 900NC PC Camera */ - { USB_DEVICE(0x0471, 0x032C) }, /* Philips SPC 880NC PC Camera */ - { USB_DEVICE(0x069A, 0x0001) }, /* Askey */ - { USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam Pro 3000 */ + { USB_DEVICE(0x0471, 0x0302) }, /* Philips PCA645VC */ + { USB_DEVICE(0x0471, 0x0303) }, /* Philips PCA646VC */ + { USB_DEVICE(0x0471, 0x0304) }, /* Askey VC010 type 2 */ + { USB_DEVICE(0x0471, 0x0307) }, /* Philips PCVC675K (Vesta) */ + { USB_DEVICE(0x0471, 0x0308) }, /* Philips PCVC680K (Vesta Pro) */ + { USB_DEVICE(0x0471, 0x030C) }, /* Philips PCVC690K (Vesta Pro Scan) */ + { USB_DEVICE(0x0471, 0x0310) }, /* Philips PCVC730K (ToUCam Fun)/PCVC830 (ToUCam II) */ + { USB_DEVICE(0x0471, 0x0311) }, /* Philips PCVC740K (ToUCam Pro)/PCVC840 (ToUCam II) */ + { USB_DEVICE(0x0471, 0x0312) }, /* Philips PCVC750K (ToUCam Pro Scan) */ + { USB_DEVICE(0x0471, 0x0313) }, /* Philips PCVC720K/40 (ToUCam XS) */ + { USB_DEVICE(0x0471, 0x0329) }, /* Philips SPC 900NC webcam */ + { USB_DEVICE(0x0471, 0x032C) }, /* Philips SPC 880NC webcam */ + { USB_DEVICE(0x069A, 0x0001) }, /* Askey VC010 type 1 */ + { USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam 3000 Pro */ { USB_DEVICE(0x046D, 0x08B1) }, /* Logitech QuickCam Notebook Pro */ - { USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam Pro 4000 */ + { USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam 4000 Pro */ { USB_DEVICE(0x046D, 0x08B3) }, /* Logitech QuickCam Zoom (old model) */ { USB_DEVICE(0x046D, 0x08B4) }, /* Logitech QuickCam Zoom (new model) */ { USB_DEVICE(0x046D, 0x08B5) }, /* Logitech QuickCam Orbit/Sphere */ - { USB_DEVICE(0x046D, 0x08B6) }, /* Cisco VT Camera */ + { USB_DEVICE(0x046D, 0x08B6) }, /* Logitech/Cisco VT Camera */ { USB_DEVICE(0x046D, 0x08B7) }, /* Logitech ViewPort AV 100 */ - { USB_DEVICE(0x046D, 0x08B8) }, /* Logitech (reserved) */ + { USB_DEVICE(0x046D, 0x08B8) }, /* Logitech QuickCam */ { USB_DEVICE(0x055D, 0x9000) }, /* Samsung MPC-C10 */ { USB_DEVICE(0x055D, 0x9001) }, /* Samsung MPC-C30 */ { USB_DEVICE(0x055D, 0x9002) }, /* Samsung SNC-35E (Ver3.0) */ { USB_DEVICE(0x041E, 0x400C) }, /* Creative Webcam 5 */ { USB_DEVICE(0x041E, 0x4011) }, /* Creative Webcam Pro Ex */ - { USB_DEVICE(0x04CC, 0x8116) }, /* Afina Eye */ - { USB_DEVICE(0x06BE, 0x8116) }, /* new Afina Eye */ - { USB_DEVICE(0x0d81, 0x1910) }, /* Visionite */ - { USB_DEVICE(0x0d81, 0x1900) }, + { USB_DEVICE(0x04CC, 0x8116) }, /* Sotec Afina Eye */ + { USB_DEVICE(0x06BE, 0x8116) }, /* AME Co. Afina Eye */ + { USB_DEVICE(0x0d81, 0x1900) }, /* Visionite VCS-UC300 */ + { USB_DEVICE(0x0d81, 0x1910) }, /* Visionite VCS-UM100 */ { } }; MODULE_DEVICE_TABLE(usb, pwc_device_table); -- GitLab From 787103913b9135610db97aea17a9729d04d071e7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 17:29:40 +0200 Subject: [PATCH 248/503] media: pwc-if: place USB device list on numberical order It seems easier to maintain the list if the USB_DEVICE is ordered. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/pwc/pwc-if.c | 34 +++++++++++++++++++++------------- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/drivers/media/usb/pwc/pwc-if.c b/drivers/media/usb/pwc/pwc-if.c index 8270fb061bd60..61869636ec613 100644 --- a/drivers/media/usb/pwc/pwc-if.c +++ b/drivers/media/usb/pwc/pwc-if.c @@ -71,6 +71,19 @@ /* hotplug device table support */ static const struct usb_device_id pwc_device_table [] = { + { USB_DEVICE(0x041E, 0x400C) }, /* Creative Webcam 5 */ + { USB_DEVICE(0x041E, 0x4011) }, /* Creative Webcam Pro Ex */ + + { USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam 3000 Pro */ + { USB_DEVICE(0x046D, 0x08B1) }, /* Logitech QuickCam Notebook Pro */ + { USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam 4000 Pro */ + { USB_DEVICE(0x046D, 0x08B3) }, /* Logitech QuickCam Zoom (old model) */ + { USB_DEVICE(0x046D, 0x08B4) }, /* Logitech QuickCam Zoom (new model) */ + { USB_DEVICE(0x046D, 0x08B5) }, /* Logitech QuickCam Orbit/Sphere */ + { USB_DEVICE(0x046D, 0x08B6) }, /* Logitech/Cisco VT Camera */ + { USB_DEVICE(0x046D, 0x08B7) }, /* Logitech ViewPort AV 100 */ + { USB_DEVICE(0x046D, 0x08B8) }, /* Logitech QuickCam */ + { USB_DEVICE(0x0471, 0x0302) }, /* Philips PCA645VC */ { USB_DEVICE(0x0471, 0x0303) }, /* Philips PCA646VC */ { USB_DEVICE(0x0471, 0x0304) }, /* Askey VC010 type 2 */ @@ -83,25 +96,20 @@ static const struct usb_device_id pwc_device_table [] = { { USB_DEVICE(0x0471, 0x0313) }, /* Philips PCVC720K/40 (ToUCam XS) */ { USB_DEVICE(0x0471, 0x0329) }, /* Philips SPC 900NC webcam */ { USB_DEVICE(0x0471, 0x032C) }, /* Philips SPC 880NC webcam */ - { USB_DEVICE(0x069A, 0x0001) }, /* Askey VC010 type 1 */ - { USB_DEVICE(0x046D, 0x08B0) }, /* Logitech QuickCam 3000 Pro */ - { USB_DEVICE(0x046D, 0x08B1) }, /* Logitech QuickCam Notebook Pro */ - { USB_DEVICE(0x046D, 0x08B2) }, /* Logitech QuickCam 4000 Pro */ - { USB_DEVICE(0x046D, 0x08B3) }, /* Logitech QuickCam Zoom (old model) */ - { USB_DEVICE(0x046D, 0x08B4) }, /* Logitech QuickCam Zoom (new model) */ - { USB_DEVICE(0x046D, 0x08B5) }, /* Logitech QuickCam Orbit/Sphere */ - { USB_DEVICE(0x046D, 0x08B6) }, /* Logitech/Cisco VT Camera */ - { USB_DEVICE(0x046D, 0x08B7) }, /* Logitech ViewPort AV 100 */ - { USB_DEVICE(0x046D, 0x08B8) }, /* Logitech QuickCam */ + + { USB_DEVICE(0x04CC, 0x8116) }, /* Sotec Afina Eye */ + { USB_DEVICE(0x055D, 0x9000) }, /* Samsung MPC-C10 */ { USB_DEVICE(0x055D, 0x9001) }, /* Samsung MPC-C30 */ { USB_DEVICE(0x055D, 0x9002) }, /* Samsung SNC-35E (Ver3.0) */ - { USB_DEVICE(0x041E, 0x400C) }, /* Creative Webcam 5 */ - { USB_DEVICE(0x041E, 0x4011) }, /* Creative Webcam Pro Ex */ - { USB_DEVICE(0x04CC, 0x8116) }, /* Sotec Afina Eye */ + + { USB_DEVICE(0x069A, 0x0001) }, /* Askey VC010 type 1 */ + { USB_DEVICE(0x06BE, 0x8116) }, /* AME Co. Afina Eye */ + { USB_DEVICE(0x0d81, 0x1900) }, /* Visionite VCS-UC300 */ { USB_DEVICE(0x0d81, 0x1910) }, /* Visionite VCS-UM100 */ + { } }; MODULE_DEVICE_TABLE(usb, pwc_device_table); -- GitLab From 74da0d515c20e567456b1b0b382e583d9d0c4ab3 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 12:24:02 +0200 Subject: [PATCH 249/503] media: admin-guide: add a card list for cx231xx boards It is interesting to have a card list also for cx231xx driver, as it currently supports 27 different boards. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 1 + .../admin-guide/media/cx231xx-cardlist.rst | 99 +++++++++++++++++++ 2 files changed, 100 insertions(+) create mode 100644 Documentation/admin-guide/media/cx231xx-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 5c9c3c97bcb21..527188ee96974 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -9,6 +9,7 @@ Cards List au0828-cardlist bttv-cardlist cx18-cardlist + cx231xx-cardlist cx23885-cardlist cx88-cardlist em28xx-cardlist diff --git a/Documentation/admin-guide/media/cx231xx-cardlist.rst b/Documentation/admin-guide/media/cx231xx-cardlist.rst new file mode 100644 index 0000000000000..d374101be047f --- /dev/null +++ b/Documentation/admin-guide/media/cx231xx-cardlist.rst @@ -0,0 +1,99 @@ +.. SPDX-License-Identifier: GPL-2.0 + +cx231xx cards list +================== + +.. tabularcolumns:: |p{1.4cm}|p{10.0cm}|p{6.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 2 12 19 + :stub-columns: 0 + + * - Card number + - Card name + - USB IDs + * - 0 + - Unknown CX231xx video grabber + - 0572:5A3C + * - 1 + - Conexant Hybrid TV - CARRAERA + - 0572:58A2 + * - 2 + - Conexant Hybrid TV - SHELBY + - 0572:58A1 + * - 3 + - Conexant Hybrid TV - RDE253S + - 0572:58A4 + * - 4 + - Conexant Hybrid TV - RDU253S + - 0572:58A5 + * - 5 + - Conexant VIDEO GRABBER + - 0572:58A6, 07ca:c039 + * - 6 + - Conexant Hybrid TV - rde 250 + - 0572:589E + * - 7 + - Conexant Hybrid TV - RDU 250 + - 0572:58A0 + * - 8 + - Hauppauge EXETER + - 2040:b120, 2040:b140 + * - 9 + - Hauppauge USB Live 2 + - 2040:c200 + * - 10 + - Pixelview PlayTV USB Hybrid + - 4000:4001 + * - 11 + - Pixelview Xcapture USB + - 1D19:6109, 4000:4001 + * - 12 + - Kworld UB430 USB Hybrid + - 1b80:e424 + * - 13 + - Iconbit Analog Stick U100 FM + - 1f4d:0237 + * - 14 + - Hauppauge WinTV USB2 FM (PAL) + - 2040:b110 + * - 15 + - Hauppauge WinTV USB2 FM (NTSC) + - 2040:b111 + * - 16 + - Elgato Video Capture V2 + - 0fd9:0037 + * - 17 + - Geniatech OTG102 + - 1f4d:0102 + * - 18 + - Kworld UB445 USB Hybrid + - 1b80:e421 + * - 19 + - Hauppauge WinTV 930C-HD (1113xx) / HVR-900H (111xxx) / PCTV QuatroStick 521e + - 2040:b130, 2040:b138, 2013:0259 + * - 20 + - Hauppauge WinTV 930C-HD (1114xx) / HVR-901H (1114xx) / PCTV QuatroStick 522e + - 2040:b131, 2040:b139, 2013:025e + * - 21 + - Hauppauge WinTV-HVR-955Q (111401) + - 2040:b123, 2040:b124 + * - 22 + - Terratec Grabby + - 1f4d:0102 + * - 23 + - Evromedia USB Full Hybrid Full HD + - 1b80:d3b2 + * - 24 + - Astrometa T2hybrid + - 15f4:0135 + * - 25 + - The Imaging Source DFG/USB2pro + - 199e:8002 + * - 26 + - Hauppauge WinTV-HVR-935C + - 2040:b151 + * - 27 + - Hauppauge WinTV-HVR-975 + - 2040:b150 -- GitLab From 433c8e566098423b7eaf6ac462f5df54bed7c8d8 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 12:37:23 +0200 Subject: [PATCH 250/503] media: admin-guide: update em28xx cardlist A new em28xx card was added upstream. Update cards list accordingly. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/em28xx-cardlist.rst | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/admin-guide/media/em28xx-cardlist.rst b/Documentation/admin-guide/media/em28xx-cardlist.rst index cb2e693a56a2b..a5f0e6d22a1aa 100644 --- a/Documentation/admin-guide/media/em28xx-cardlist.rst +++ b/Documentation/admin-guide/media/em28xx-cardlist.rst @@ -430,3 +430,7 @@ EM28xx cards list - Magix USB Videowandler-2 - em2861 - 1b80:e349 + * - 104 + - PCTV DVB-S2 Stick (461e v2) + - em28178 + - 2013:0461, 2013:0259 -- GitLab From d9d43617bb1324b82db6169660e44f53348c7181 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 13:31:40 +0200 Subject: [PATCH 251/503] media: admin-guide: Add an introduction chapter The media's admin guide is currently just a group of not-connected docs. Add an introduction chapter for it to start making sense to a random reader. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/index.rst | 2 ++ Documentation/admin-guide/media/intro.rst | 27 +++++++++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 Documentation/admin-guide/media/intro.rst diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index 6e5e6bdb6d4ba..f79d4f1e05ba0 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -34,6 +34,8 @@ Video4Linux (V4L) driver-specific documentation :maxdepth: 5 :numbered: + intro + cardlist v4l-with-ir diff --git a/Documentation/admin-guide/media/intro.rst b/Documentation/admin-guide/media/intro.rst new file mode 100644 index 0000000000000..fec8122f24128 --- /dev/null +++ b/Documentation/admin-guide/media/intro.rst @@ -0,0 +1,27 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============ +Introduction +============ + +The media subsystem consists on Linux support for several different types +of devices: + +- Audio and video grabbers; +- PC and Laptop Cameras; +- Complex cameras found on Embedded hardware; +- Analog and digital TV; +- HDMI Customer Electronics Control (CEC); +- Multi-touch input devices; +- Remote Controllers; +- Media encoders and decoders. + +Due to the diversity of devices, the subsystem provides several different +APIs: + +- Remote Controller API; +- HDMI CEC API; +- Video4Linux API; +- Media controller API; +- Video4Linux Request API (experimental); +- Digital TV API (also known as DVB API). -- GitLab From 2aca74c8b1a1496ec39051b1e8ed2337a4755ed5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 13:31:50 +0200 Subject: [PATCH 252/503] media: admin-guide: add a generic building guide Several of the existing documents under the media admin-guide contain build procedures. Add an specific chapter describing it. This document was partially inspired on the modifications I made to the bttv.rst file. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/building.rst | 357 +++++++++++++++++++ Documentation/admin-guide/media/index.rst | 1 + 2 files changed, 358 insertions(+) create mode 100644 Documentation/admin-guide/media/building.rst diff --git a/Documentation/admin-guide/media/building.rst b/Documentation/admin-guide/media/building.rst new file mode 100644 index 0000000000000..c898e3a981c1f --- /dev/null +++ b/Documentation/admin-guide/media/building.rst @@ -0,0 +1,357 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================================== +Building support for a media device +=================================== + +The first step is to download the Kernel's source code, either via a +distribution-specific source file or via the Kernel's main git tree\ [1]_. + +Please notice, however, that, if: + +- you're a braveheart and want to experiment with new stuff; +- if you want to report a bug; +- if you're developing new patches + +you should use the main media development tree ``master`` branch: + + https://git.linuxtv.org/media_tree.git/ + +In this case, you may find some useful information at the +`LinuxTv wiki pages `_: + + https://linuxtv.org/wiki/index.php/How_to_Obtain,_Build_and_Install_V4L-DVB_Device_Drivers + +.. [1] The upstream Linux Kernel development tree is located at + + https://git.kernel.org/pub/scm/li nux/kernel/git/torvalds/linux.git/ + +Configuring the Linux Kernel +============================ + +You can access a menu of Kernel building options with:: + + $ make menuconfig + +Then, select all desired options and exit it, saving the configuration. + +The changed configuration will be at the ``.config`` file. It would +look like:: + + ... + # CONFIG_RC_CORE is not set + # CONFIG_CEC_CORE is not set + CONFIG_MEDIA_SUPPORT=m + CONFIG_MEDIA_SUPPORT_FILTER=y + ... + +The media subsystem is controlled by those menu configuration options:: + + Device Drivers ---> + Remote Controller support ---> + [ ] HDMI CEC RC integration + [ ] Enable CEC error injection support + [*] HDMI CEC drivers ---> + <*> Multimedia support ---> + +The ``Remote Controller support`` option enables the core support for +remote controllers\ [2]_. + +The ``HDMI CEC RC integration`` option enables integration of HDMI CEC +with Linux, allowing to receive data via HDMI CEC as if it were produced +by a remote controller directly connected to the machine. + +The ``HDMI CEC drivers`` option allow selecting platform and USB drivers +that receives and/or transmits CEC codes via HDMI interfaces\ [3]_. + +The last option (``Multimedia support``) enables support for cameras, +audio/video grabbers and TV. + +The media subsystem support can either be built together with the main +Kernel or as a module. For most use cases, it is preferred to have it +built as modules. + +.. note:: + + Instead of using a menu, the Kernel provides a script with allows + enabling configuration options directly. To enable media support + and remote controller support using Kernel modules, you could use:: + + $ scripts/config -m RC_CORE + $ scripts/config -m MEDIA_SUPPORT + +.. [2] ``Remote Controller support`` should also be enabled if you + want to use some TV card drivers that may depend on the remote + controller core support. + +.. [3] Please notice that the DRM subsystem also have drivers for GPUs + that use the media HDMI CEC support. + + Those GPU-specific drivers are selected via the ``Graphics support`` + menu, under ``Device Drivers``. + + When a GPU driver supports supports HDMI CEC, it will automatically + enable the CEC core support at the media subsystem. + +Media dependencies +------------------ + +It should be noticed that enabling the above from a clean config is +usually not enough. The media subsystem depends on several other Linux +core support in order to work. + +For example, most media devices use a serial communication bus in +order to talk with some peripherals. Such bus is called I²C +(Inter-Integrated Circuit). In order to be able to build support +for such hardware, the I²C bus support should be enabled, either via +menu or with:: + + ./scripts/config -m I2C + +Another example: the remote controller core requires support for +input devices, with can be enabled with:: + + ./scripts/config -m INPUT + +Other core functionality may also be needed (like PCI and/or USB support), +depending on the specific driver(s) you would like to enable. + +Enabling Remote Controller Support +---------------------------------- + +The remote controller menu allows selecting drivers for specific devices. +It's menu looks like this:: + + --- Remote Controller support + Compile Remote Controller keymap modules + [*] LIRC user interface + [*] Support for eBPF programs attached to lirc devices + [*] Remote controller decoders ---> + [*] Remote Controller devices ---> + +The ``Compile Remote Controller keymap modules`` option creates key maps for +several popular remote controllers. + +The ``LIRC user interface`` option adds enhanced functionality when using the +``lirc`` program, by enabling an API that allows userspace to receive raw data +from remote controllers. + +The ``Support for eBPF programs attached to lirc devices`` option allows +the usage of special programs (called eBPF) that would allow aplications +to add extra remote controller decoding functionality to the Linux Kernel. + +The ``Remote controller decoders`` option allows selecting the +protocols that will be recognized by the Linux Kernel. Except if you +want to disable some specific decoder, it is suggested to keep all +sub-options enabled. + +The ``Remote Controller devices`` allows you to select the drivers +that would be needed to support your device. + +The same configuration can also be set via the ``script/config`` +script. So, for instance, in order to support the ITE remote controller +driver (found on Intel NUCs and on some ASUS x86 desktops), you could do:: + + $ scripts/config -e INPUT + $ scripts/config -e ACPI + $ scripts/config -e MODULES + $ scripts/config -m RC_CORE + $ scripts/config -e RC_DEVICES + $ scripts/config -e RC_DECODERS + $ scripts/config -m IR_RC5_DECODER + $ scripts/config -m IR_ITE_CIR + +Enabling HDMI CEC Support +------------------------- + +The HDMI CEC support is set automatically when a driver requires it. So, +all you need to do is to enable support either for a graphics card +that needs it or by one of the existing HDMI drivers. + +The HDMI-specific drivers are available at the ``HDMI CEC drivers`` +menu\ [4]_:: + + --- HDMI CEC drivers + < > ChromeOS EC CEC driver + < > Amlogic Meson AO CEC driver + < > Amlogic Meson G12A AO CEC driver + < > Generic GPIO-based CEC driver + < > Samsung S5P CEC driver + < > STMicroelectronics STiH4xx HDMI CEC driver + < > STMicroelectronics STM32 HDMI CEC driver + < > Tegra HDMI CEC driver + < > SECO Boards HDMI CEC driver + [ ] SECO Boards IR RC5 support + < > Pulse Eight HDMI CEC + < > RainShadow Tech HDMI CEC + +.. [4] The above contents is just an example. The actual options for + HDMI devices depends on the system's architecture and may vary + on new Kernels. + +Enabling Media Support +---------------------- + +The Media menu has a lot more options than the remote controller menu. +Once selected, you should see the following options:: + + --- Media support + [ ] Filter media drivers + [*] Autoselect ancillary drivers + Media device types ---> + Media core support ---> + Video4Linux options ---> + Media controller options ---> + Digital TV options ---> + HDMI CEC options ---> + Media drivers ---> + Media ancillary drivers ---> + +Except if you know exactly what you're doing, or if you want to build +a driver for a SoC platform, it is strongly recommended to keep the +``Autoselect ancillary drivers`` option turned on, as it will auto-select +the needed I²C ancillary drivers. + +There are now two ways to select media device drivers, as described +below. + +``Filter media drivers`` menu +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +This menu is meant to easy setup for PC and Laptop hardware. It works +by letting the user to specify what kind of media drivers are desired, +with those options:: + + [ ] Cameras and video grabbers + [ ] Analog TV + [ ] Digital TV + [ ] AM/FM radio receivers/transmitters + [ ] Software defined radio + [ ] Platform-specific devices + [ ] Test drivers + +So, if you want to add support to a camera or video grabber only, +select just the first option. Multiple options are allowed. + +Once the options on this menu are selected, the building system will +auto-select the needed core drivers in order to support the selected +functionality. + +.. note:: + + Most TV cards are hybrid: they support both Analog TV and Digital TV. + + If you have an hybrid card, you may need to enable both ``Analog TV`` + and ``Digital TV`` at the menu. + +When using this option, the defaults for the the media support core +functionality are usually good enough to provide the basic functionality +for the driver. Yet, you could manually enable some desired extra (optional) +functionality using the settings under each of the following +``Media support`` sub-menus:: + + Media core support ---> + Video4Linux options ---> + Media controller options ---> + Digital TV options ---> + HDMI CEC options ---> + +Once you select the desired filters, the drivers that matches the filtering +criteria will be available at the ``Media support->Media drivers`` sub-menu. + +``Media Core Support`` menu without filtering +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +If you disable the ``Filter media drivers`` menu, all drivers available +for your system whose dependencies are met should be shown at the +``Media drivers`` menu. + +Please notice, however, that you should first ensure that the +``Media Core Support`` menu has all the core functionality your drivers +would need, as otherwise the corresponding device drivers won't be shown. + +Example +------- + +In order to enable modular support for one of the boards listed on +:doc:`this table `, with modular media core modules, the +``.config`` file should contain those lines:: + + CONFIG_MODULES=y + CONFIG_USB=y + CONFIG_I2C=y + CONFIG_INPUT=y + CONFIG_RC_CORE=m + CONFIG_MEDIA_SUPPORT=m + CONFIG_MEDIA_SUPPORT_FILTER=y + CONFIG_MEDIA_ANALOG_TV_SUPPORT=y + CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y + CONFIG_MEDIA_USB_SUPPORT=y + CONFIG_VIDEO_CX231XX=y + CONFIG_VIDEO_CX231XX_DVB=y + +Building and installing a new Kernel +==================================== + +Once the ``.config`` file has everything needed, all it takes to build +is to run the ``make`` command:: + + $ make + +And then install the new Kernel and its modules:: + + $ sudo make modules_install + $ sudo make install + +Building just the new media drivers and core +============================================ + +Running a new development Kernel from the development tree is usually risky, +because it may have experimental changes that may have bugs. So, there are +some ways to build just the new drivers, using alternative trees. + +There is the `Linux Kernel backports project +`_, with contains +newer drivers meant to be compiled against stable Kernels. + +The LinuxTV developers, with are responsible for maintaining the media +subsystem also maintains a backport tree, with just the media drivers +daily updated from the newest kernel. Such tree is available at: + +https://git.linuxtv.org/media_build.git/ + +It should be noticed that, while it should be relatively safe to use the +``media_build`` tree for testing purposes, there are not warranties that +it would work (or even build) on a random Kernel. This tree is maintained +using a "best-efforts" principle, as time permits us to fix issues there. + +If you notice anything wrong on it, feel free to submit patches at the +Linux media subsystem's mailing list: media@vger.kernel.org. Please +add ``[PATCH media-build]`` at the e-mail's subject if you submit a new +patch for the media-build. + +Before using it, you should run:: + + $ ./build + +.. note:: + + 1) you may need to run it twice if the ``media-build`` tree gets + updated; + 2) you may need to do a ``make distclean`` if you had built it + in the past for a different Kernel version than the one you're + currently using; + 3) by default, it will use the same config options for media as + the ones defined on the Kernel you're running. + +In order to select different drivers or different config options, +use:: + + $ make menuconfig + +Then, you can build and install the new drivers:: + + $ make && sudo make install + +This will override the previous media drivers that your Kernel were +using. diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index f79d4f1e05ba0..ecaf28effa6a4 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -35,6 +35,7 @@ Video4Linux (V4L) driver-specific documentation :numbered: intro + building cardlist -- GitLab From 17ce5e6d72d5acc838e8e6218c3fadc2a7abe7da Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 14:20:54 +0200 Subject: [PATCH 253/503] media: admin-guide: improve cardlist.rst documentation The cardlist section is important for some boards, because they may require extra modprobe parameters. Improve the docs to mention that. Thanks-to: Hans Verkuil # for providing me some PCI IDs Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 116 ++++++++++++++++++- 1 file changed, 111 insertions(+), 5 deletions(-) diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 527188ee96974..025d251764c2d 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -1,22 +1,128 @@ .. SPDX-License-Identifier: GPL-2.0 +========== Cards List ========== +The media subsystem provide support for lots of PCI and USB drivers, plus +platform-specific drivers. It also contains several ancillary I²C drivers. + +The platform-specific drivers are usually present on embedded systems, +or are supported by the main board. Usually, setting them is done via +OpenFirmware or ACPI. + +The PCI and USB drivers, however, are independent of the system's board, +and may be added/removed by the user. + +This section contains a list of supported PCI and USB boards. + +Please notice that this list is not exaustive. + +USB drivers +=========== + +The USB boards are identified by an identification called USB ID. + +The ``lsusb`` command allows identifying the USB IDs:: + + $ lsusb + ... + Bus 001 Device 015: ID 046d:082d Logitech, Inc. HD Pro Webcam C920 + Bus 001 Device 074: ID 2040:b131 Hauppauge + Bus 001 Device 075: ID 2013:024f PCTV Systems nanoStick T2 290e + ... + +Newer camera devices use a standard way to expose themselves as such, +via USB Video Class. Those cameras are automatically supported by the +``uvc-driver``. + +Older cameras and TV USB devices uses USB Vendor Classes: each vendor +defines its own way to access the device. This section contains +card lists for such vendor-class devices. + +While this is not as common as on PCI, sometimes the same USB ID is used +by different products. So, several media drivers allow passing a ``card=`` +parameter, in order to setup a card number that would match the correct +settings for an specific product type. + .. toctree:: :maxdepth: 1 au0828-cardlist + cx231xx-cardlist + em28xx-cardlist + tm6000-cardlist + usbvision-cardlist + gspca-cardlist + +PCI drivers +=========== + +The PCI boards are identified by an identification called PCI ID. The PCI ID +is actually composed by two parts: + + - Vendor ID and device ID; + - Subsystem ID and Subsystem device ID; + +The ``lspci -nn`` command allows identifying the vendor/device PCI IDs:: + + $ lspci -nn + ... + 00:0b.0 Multimedia controller [0480]: Brooktree Corporation Bt878 Audio Capture [109e:0878] (rev 11) + 01:00.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23887/8 PCIe Broadcast Audio and Video Decoder with 3D Comb [14f1:8880] (rev 0f) + 01:01.0 Multimedia controller [0480]: Philips Semiconductors SAA7131/SAA7133/SAA7135 Video Broadcast Decoder [1131:7133] (rev d1) + 02:01.0 Multimedia video controller [0400]: Internext Compression Inc iTVC15 (CX23415) Video Decoder [4444:0803] (rev 01) + 02:02.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23418 Single-Chip MPEG-2 Encoder with Integrated Analog Video/Broadcast Audio Decoder [14f1:5b7a] + 02:03.0 Multimedia video controller [0400]: Brooktree Corporation Bt878 Video Capture [109e:036e] (rev 11) + ... + +The subsystem IDs can be obtained using ``lspci -vn`` + +.. code-block:: none + :emphasize-lines: 4 + + $ lspci -vn + ... + 01:01.0 0480: 1131:7133 (rev d1) + Subsystem: 1461:f01d + Flags: bus master, medium devsel, latency 32, IRQ 209 + Memory at e2002000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [40] Power Management version 2 + ... + +Unfortunately, sometimes the same PCI ID is used by different products. +So, several media drivers allow passing a ``card=`` parameter, in order +to setup a card number that would match the correct settings for an +specific board. + +.. toctree:: + :maxdepth: 1 + bttv-cardlist cx18-cardlist - cx231xx-cardlist cx23885-cardlist cx88-cardlist - em28xx-cardlist ivtv-cardlist saa7134-cardlist saa7164-cardlist - tm6000-cardlist + +I²C drivers +=========== + +The I²C (Inter-Integrated Circuit) bus is a three-wires bus used internally +at the media cards for communication between different chips. While the bus +is not visible to the Linux Kernel, drivers need to send and receive +commands via the bus. The Linux Kernel driver abstraction has support to +implement different drivers for each component inside an I²C bus, as if +the bus were visible to the main system board. + +One of the problems with I²C devices is that sometimes the same device may +work with different I²C hardware. This is common, for example, on devices +that comes with a tuner for North America market, and another one for +Europe. Some drivers have a ``tuner=`` modprobe parameter to allow using a +different tuner number in order to address such issue. + +.. toctree:: + :maxdepth: 1 + tuner-cardlist - usbvision-cardlist - gspca-cardlist -- GitLab From 760ec48b6bea48b052b292c16ac1fb2958a7ef5f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 15:17:06 +0200 Subject: [PATCH 254/503] media: admin-guide: add dvb-usb-v2 card lists Include cardlist documentation for the sub-drivers supported by dvb-usb-v2 core. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 15 ++++ .../media/dvb-usb-af9015-cardlist.rst | 80 +++++++++++++++++++ .../media/dvb-usb-af9035-cardlist.rst | 74 +++++++++++++++++ .../media/dvb-usb-anysee-cardlist.rst | 16 ++++ .../media/dvb-usb-au6610-cardlist.rst | 16 ++++ .../media/dvb-usb-az6007-cardlist.rst | 20 +++++ .../media/dvb-usb-ce6230-cardlist.rst | 18 +++++ .../media/dvb-usb-dvbsky-cardlist.rst | 42 ++++++++++ .../media/dvb-usb-ec168-cardlist.rst | 16 ++++ .../media/dvb-usb-gl861-cardlist.rst | 20 +++++ .../media/dvb-usb-lmedm04-cardlist.rst | 20 +++++ .../media/dvb-usb-mxl111sf-cardlist.rst | 36 +++++++++ .../media/dvb-usb-rtl28xxu-cardlist.rst | 80 +++++++++++++++++++ .../media/dvb-usb-zd1301-cardlist.rst | 16 ++++ 14 files changed, 469 insertions(+) create mode 100644 Documentation/admin-guide/media/dvb-usb-af9015-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-af9035-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-anysee-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-au6610-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-az6007-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-ce6230-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-ec168-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-gl861-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-lmedm04-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-mxl111sf-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-rtl28xxu-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-zd1301-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 025d251764c2d..6ecd28af411f9 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -55,6 +55,21 @@ settings for an specific product type. usbvision-cardlist gspca-cardlist + dvb-usb-af9015-cardlist + dvb-usb-af9035-cardlist + dvb-usb-anysee-cardlist + dvb-usb-au6610-cardlist + dvb-usb-az6007-cardlist + dvb-usb-ce6230-cardlist + dvb-usb-dib0700-cardlist + dvb-usb-dvbsky-cardlist + dvb-usb-ec168-cardlist + dvb-usb-gl861-cardlist + dvb-usb-lmedm04-cardlist + dvb-usb-mxl111sf-cardlist + dvb-usb-rtl28xxu-cardlist + dvb-usb-zd1301-cardlist + PCI drivers =========== diff --git a/Documentation/admin-guide/media/dvb-usb-af9015-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-af9015-cardlist.rst new file mode 100644 index 0000000000000..c557994f796ae --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-af9015-cardlist.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-af9015 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AVerMedia A309 + - 07ca:a309 + * - AVerMedia AVerTV DVB-T Volar X + - 07ca:a815 + * - Afatech AF9015 reference design + - 15a4:9015, 15a4:9016 + * - AverMedia AVerTV Red HD+ (A850T) + - 07ca:850b + * - AverMedia AVerTV Volar Black HD (A850) + - 07ca:850a + * - AverMedia AVerTV Volar GPS 805 (A805) + - 07ca:a805 + * - AverMedia AVerTV Volar M (A815Mac) + - 07ca:815a + * - Conceptronic USB2.0 DVB-T CTVDIGRCU V3.0 + - 1b80:e397 + * - DigitalNow TinyTwin + - 13d3:3226 + * - DigitalNow TinyTwin v2 + - 1b80:e402 + * - DigitalNow TinyTwin v3 + - 1f4d:9016 + * - Fujitsu-Siemens Slim Mobile USB DVB-T + - 07ca:8150 + * - Genius TVGo DVB-T03 + - 0458:4012 + * - KWorld Digital MC-810 + - 1b80:c810 + * - KWorld PlusTV DVB-T PCI Pro Card (DVB-T PC160-T) + - 1b80:c161 + * - KWorld PlusTV Dual DVB-T PCI (DVB-T PC160-2T) + - 1b80:c160 + * - KWorld PlusTV Dual DVB-T Stick (DVB-T 399U) + - 1b80:e399, 1b80:e400 + * - KWorld USB DVB-T Stick Mobile (UB383-T) + - 1b80:e383 + * - KWorld USB DVB-T TV Stick II (VS-DVB-T 395U) + - 1b80:e396, 1b80:e39b, 1b80:e395, 1b80:e39a + * - Leadtek WinFast DTV Dongle Gold + - 0413:6029 + * - Leadtek WinFast DTV2000DS + - 0413:6a04 + * - MSI DIGIVOX Duo + - 1462:8801 + * - MSI Digi VOX mini III + - 1462:8807 + * - Pinnacle PCTV 71e + - 2304:022b + * - Sveon STV20 Tuner USB DVB-T HDTV + - 1b80:e39d + * - Sveon STV22 Dual USB DVB-T Tuner HDTV + - 1b80:e401 + * - Telestar Starstick 2 + - 10b9:8000 + * - TerraTec Cinergy T Stick Dual RC + - 0ccd:0099 + * - TerraTec Cinergy T Stick RC + - 0ccd:0097 + * - TerraTec Cinergy T USB XE + - 0ccd:0069 + * - TrekStor DVB-T USB Stick + - 15a4:901b + * - TwinHan AzureWave AD-TU700(704J) + - 13d3:3237 + * - Xtensions XD-380 + - 1ae7:0381 diff --git a/Documentation/admin-guide/media/dvb-usb-af9035-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-af9035-cardlist.rst new file mode 100644 index 0000000000000..63e4170777c44 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-af9035-cardlist.rst @@ -0,0 +1,74 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-af9035 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AVerMedia AVerTV Volar HD/PRO (A835) + - 07ca:a835, 07ca:b835 + * - AVerMedia HD Volar (A867) + - 07ca:1867, 07ca:a867, 07ca:0337 + * - AVerMedia TD310 DVB-T2 + - 07ca:1871 + * - AVerMedia Twinstar (A825) + - 07ca:0825 + * - Afatech AF9035 reference design + - 15a4:9035, 15a4:1000, 15a4:1001, 15a4:1002, 15a4:1003 + * - Asus U3100Mini Plus + - 0b05:1779 + * - Avermedia A835B(1835) + - 07ca:1835 + * - Avermedia A835B(2835) + - 07ca:2835 + * - Avermedia A835B(3835) + - 07ca:3835 + * - Avermedia A835B(4835) + - 07ca:4835 + * - Avermedia AverTV Volar HD 2 (TD110) + - 07ca:a110 + * - Avermedia H335 + - 07ca:0335 + * - Digital Dual TV Receiver CTVDIGDUAL_V2 + - 1b80:e410 + * - EVOLVEO XtraTV stick + - 1f4d:a115 + * - Hauppauge WinTV-MiniStick 2 + - 2040:f900 + * - ITE 9135 Generic + - 048d:9135 + * - ITE 9135(9005) Generic + - 048d:9005 + * - ITE 9135(9006) Generic + - 048d:9006 + * - ITE 9303 Generic + - 048d:9306 + * - Kworld UB499-2T T09 + - 1b80:e409 + * - Leadtek WinFast DTV Dongle Dual + - 0413:6a05 + * - Logilink VG0022A + - 1d19:0100 + * - PCTV AndroiDTV (78e) + - 2013:025a + * - PCTV microStick (79e) + - 2013:0262 + * - Sveon STV22 Dual DVB-T HDTV + - 1b80:e411 + * - TerraTec Cinergy T Stick + - 0ccd:0093 + * - TerraTec Cinergy T Stick (rev. 2) + - 0ccd:00aa + * - TerraTec Cinergy T Stick Dual RC (rev. 2) + - 0ccd:0099 + * - TerraTec Cinergy TC2 Stick + - 0ccd:10b2 + * - TerraTec T1 + - 0ccd:10ae diff --git a/Documentation/admin-guide/media/dvb-usb-anysee-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-anysee-cardlist.rst new file mode 100644 index 0000000000000..1fb5d22a00dc8 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-anysee-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-anysee cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Anysee + - 04b4:861f, 1c73:861f diff --git a/Documentation/admin-guide/media/dvb-usb-au6610-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-au6610-cardlist.rst new file mode 100644 index 0000000000000..02b2b742710b4 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-au6610-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-au6610 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Sigmatek DVB-110 + - 058f:6610 diff --git a/Documentation/admin-guide/media/dvb-usb-az6007-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-az6007-cardlist.rst new file mode 100644 index 0000000000000..db27eb47cc8f0 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-az6007-cardlist.rst @@ -0,0 +1,20 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-az6007 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Azurewave 6007 + - 13d3:0ccd + * - Technisat CableStar Combo HD CI + - 14f7:0003 + * - Terratec H7 + - 0ccd:10b4, 0ccd:10a3 diff --git a/Documentation/admin-guide/media/dvb-usb-ce6230-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-ce6230-cardlist.rst new file mode 100644 index 0000000000000..09750e8ac1398 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-ce6230-cardlist.rst @@ -0,0 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-ce6230 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AVerMedia A310 USB 2.0 DVB-T tuner + - 07ca:a310 + * - Intel CE9500 reference design + - 8086:9500 diff --git a/Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst new file mode 100644 index 0000000000000..4fb4ce56df7cc --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst @@ -0,0 +1,42 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-dvbsky cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - DVBSky S960/S860 + - 0572:6831 + * - DVBSky S960CI + - 0572:960c + * - DVBSky T330 + - 0572:0320 + * - DVBSky T680CI + - 0572:680c + * - MyGica Mini DVB-T2 USB Stick T230 + - 0572:c688 + * - MyGica Mini DVB-T2 USB Stick T230C + - 0572:c689 + * - MyGica Mini DVB-T2 USB Stick T230C Lite + - 0572:c699 + * - MyGica Mini DVB-T2 USB Stick T230C v2 + - 0572:c68a + * - TechnoTrend TT-connect CT2-4650 CI + - 0b48:3012 + * - TechnoTrend TT-connect CT2-4650 CI v1.1 + - 0b48:3015 + * - TechnoTrend TT-connect S2-4650 CI + - 0b48:3017 + * - TechnoTrend TVStick CT2-4400 + - 0b48:3014 + * - Terratec Cinergy S2 Rev.4 + - 0ccd:0105 + * - Terratec H7 Rev.4 + - 0ccd:10a5 diff --git a/Documentation/admin-guide/media/dvb-usb-ec168-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-ec168-cardlist.rst new file mode 100644 index 0000000000000..a3660dfa5dcc5 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-ec168-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-ec168 cards list +======================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - E3C EC168 reference design + - 18b4:1689, 18b4:fffa, 18b4:fffb, 18b4:1001, 18b4:1002 diff --git a/Documentation/admin-guide/media/dvb-usb-gl861-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-gl861-cardlist.rst new file mode 100644 index 0000000000000..5ec62fe03d64f --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-gl861-cardlist.rst @@ -0,0 +1,20 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-gl861 cards list +======================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - 774 Friio White ISDB-T USB2.0 + - 7a69:0001 + * - A-LINK DTU DVB-T USB2.0 + - 05e3:f170 + * - MSI Mega Sky 55801 DVB-T USB2.0 + - 0db0:5581 diff --git a/Documentation/admin-guide/media/dvb-usb-lmedm04-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-lmedm04-cardlist.rst new file mode 100644 index 0000000000000..2050fbf03d4a7 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-lmedm04-cardlist.rst @@ -0,0 +1,20 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-lmedm04 cards list +========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - DM04_LME2510C_DVB-S + - 3344:1120 + * - DM04_LME2510C_DVB-S RS2000 + - 3344:22f0 + * - DM04_LME2510_DVB-S + - 3344:1122 diff --git a/Documentation/admin-guide/media/dvb-usb-mxl111sf-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-mxl111sf-cardlist.rst new file mode 100644 index 0000000000000..6974801c43b6e --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-mxl111sf-cardlist.rst @@ -0,0 +1,36 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-mxl111sf cards list +=========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - HCW 117xxx + - 2040:b702 + * - HCW 126xxx + - 2040:c602, 2040:c60a + * - Hauppauge 117xxx ATSC+ + - 2040:b700, 2040:b703, 2040:b753, 2040:b763, 2040:b757, 2040:b767 + * - Hauppauge 117xxx DVBT + - 2040:b704, 2040:b764 + * - Hauppauge 126xxx + - 2040:c612, 2040:c61a + * - Hauppauge 126xxx ATSC + - 2040:c601, 2040:c609, 2040:b701 + * - Hauppauge 126xxx ATSC+ + - 2040:c600, 2040:c603, 2040:c60b, 2040:c653, 2040:c65b + * - Hauppauge 126xxx DVBT + - 2040:c604, 2040:c60c + * - Hauppauge 138xxx DVBT + - 2040:d854, 2040:d864, 2040:d8d4, 2040:d8e4 + * - Hauppauge Mercury + - 2040:d853, 2040:d863, 2040:d8d3, 2040:d8e3, 2040:d8ff + * - Hauppauge WinTV-Aero-M + - 2040:c613, 2040:c61b diff --git a/Documentation/admin-guide/media/dvb-usb-rtl28xxu-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-rtl28xxu-cardlist.rst new file mode 100644 index 0000000000000..9f4295331a159 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-rtl28xxu-cardlist.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-rtl28xxu cards list +=========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - ASUS My Cinema-U3100Mini Plus V2 + - 1b80:d3a8 + * - Astrometa DVB-T2 + - 15f4:0131 + * - Compro VideoMate U620F + - 185b:0620 + * - Compro VideoMate U650F + - 185b:0650 + * - Crypto ReDi PC 50 A + - 1f4d:a803 + * - Dexatek DK DVB-T Dongle + - 1d19:1101 + * - Dexatek DK mini DVB-T Dongle + - 1d19:1102 + * - DigitalNow Quad DVB-T Receiver + - 0413:6680 + * - Freecom USB2.0 DVB-T + - 14aa:0160, 14aa:0161 + * - G-Tek Electronics Group Lifeview LV5TDLX DVB-T + - 1f4d:b803 + * - GIGABYTE U7300 + - 1b80:d393 + * - Genius TVGo DVB-T03 + - 0458:707f + * - GoTView MasterHD 3 + - 5654:ca42 + * - Leadtek WinFast DTV Dongle mini + - 0413:6a03 + * - Leadtek WinFast DTV2000DS Plus + - 0413:6f12 + * - Leadtek Winfast DTV Dongle Mini D + - 0413:6f0f + * - MSI DIGIVOX Micro HD + - 1d19:1104 + * - MaxMedia HU394-T + - 1b80:d394 + * - PROlectrix DV107669 + - 1f4d:d803 + * - Peak DVB-T USB + - 1b80:d395 + * - Realtek RTL2831U reference design + - 0bda:2831 + * - Realtek RTL2832U reference design + - 0bda:2832, 0bda:2838 + * - Sveon STV20 + - 1b80:d39d + * - Sveon STV21 + - 1b80:d3b0 + * - Sveon STV27 + - 1b80:d3af + * - TURBO-X Pure TV Tuner DTT-2000 + - 1b80:d3a4 + * - TerraTec Cinergy T Stick Black + - 0ccd:00a9 + * - TerraTec Cinergy T Stick RC (Rev. 3) + - 0ccd:00d3 + * - TerraTec Cinergy T Stick+ + - 0ccd:00d7 + * - TerraTec NOXON DAB Stick + - 0ccd:00b3 + * - TerraTec NOXON DAB Stick (rev 2) + - 0ccd:00e0 + * - TerraTec NOXON DAB Stick (rev 3) + - 0ccd:00b4 + * - Trekstor DVB-T Stick Terres 2.0 + - 1f4d:C803 diff --git a/Documentation/admin-guide/media/dvb-usb-zd1301-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-zd1301-cardlist.rst new file mode 100644 index 0000000000000..9ca446184753a --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-zd1301-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-zd1301 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - ZyDAS ZD1301 reference design + - 0ace:13a1 -- GitLab From 9f054a7e7d1f625124e55d3666d8df42e12f9f6c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 16 Apr 2020 17:07:03 +0200 Subject: [PATCH 255/503] media: admin-guide: add cardlist for dib0700 driver Document the cards supported by dib0700 driver. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 2 + .../media/dvb-usb-dib0700-cardlist.rst | 162 ++++++++++++++++++ 2 files changed, 164 insertions(+) create mode 100644 Documentation/admin-guide/media/dvb-usb-dib0700-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 6ecd28af411f9..0632f186e22ea 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -55,6 +55,8 @@ settings for an specific product type. usbvision-cardlist gspca-cardlist + dvb-usb-dib0700-cardlist + dvb-usb-af9015-cardlist dvb-usb-af9035-cardlist dvb-usb-anysee-cardlist diff --git a/Documentation/admin-guide/media/dvb-usb-dib0700-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dib0700-cardlist.rst new file mode 100644 index 0000000000000..4b76b6f1089b6 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-dib0700-cardlist.rst @@ -0,0 +1,162 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-dib0700 cards list +========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - ASUS My Cinema U3000 Mini DVBT Tuner + - 0b05:171f + * - ASUS My Cinema U3100 Mini DVBT Tuner + - 0b05:173f + * - AVerMedia AVerTV DVB-T Express + - 07ca:b568 + * - AVerMedia AVerTV DVB-T Volar + - 07ca:a807, 07ca:b808 + * - Artec T14BR DVB-T + - 05d8:810f + * - Asus My Cinema-U3000Hybrid + - 0b05:1736 + * - Compro Videomate U500 + - 185b:1e78, 185b:1e80 + * - DiBcom NIM7090 reference design + - 10b8:1bb2 + * - DiBcom NIM8096MD reference design + - 10b8:1fa8 + * - DiBcom NIM9090MD reference design + - 10b8:2384 + * - DiBcom STK7070P reference design + - 10b8:1ebc + * - DiBcom STK7070PD reference design + - 10b8:1ebe + * - DiBcom STK7700D reference design + - 10b8:1ef0 + * - DiBcom STK7700P reference design + - 10b8:1e14, 10b8:1e78 + * - DiBcom STK7770P reference design + - 10b8:1e80 + * - DiBcom STK807xP reference design + - 10b8:1f90 + * - DiBcom STK807xPVR reference design + - 10b8:1f98 + * - DiBcom STK8096-PVR reference design + - 2013:1faa, 10b8:1faa + * - DiBcom STK8096GP reference design + - 10b8:1fa0 + * - DiBcom STK9090M reference design + - 10b8:2383 + * - DiBcom TFE7090PVR reference design + - 10b8:1bb4 + * - DiBcom TFE7790P reference design + - 10b8:1e6e + * - DiBcom TFE8096P reference design + - 10b8:1f9C + * - Elgato EyeTV DTT + - 0fd9:0021 + * - Elgato EyeTV DTT rev. 2 + - 0fd9:003f + * - Elgato EyeTV Diversity + - 0fd9:0011 + * - Elgato EyeTV Dtt Dlx PD378S + - 0fd9:0020 + * - EvolutePC TVWay+ + - 1e59:0002 + * - Gigabyte U7000 + - 1044:7001 + * - Gigabyte U8000-RH + - 1044:7002 + * - Hama DVB=T Hybrid USB Stick + - 147f:2758 + * - Hauppauge ATSC MiniCard (B200) + - 2040:b200 + * - Hauppauge ATSC MiniCard (B210) + - 2040:b210 + * - Hauppauge Nova-T 500 Dual DVB-T + - 2040:9941, 2040:9950 + * - Hauppauge Nova-T MyTV.t + - 2040:7080 + * - Hauppauge Nova-T Stick + - 2040:7050, 2040:7060, 2040:7070 + * - Hauppauge Nova-TD Stick (52009) + - 2040:5200 + * - Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity + - 2040:9580 + * - Hauppauge Nova-TD-500 (84xxx) + - 2040:8400 + * - Leadtek WinFast DTV Dongle H + - 0413:60f6 + * - Leadtek Winfast DTV Dongle (STK7700P based) + - 0413:6f00, 0413:6f01 + * - Medion CTX1921 DVB-T USB + - 1660:1921 + * - Microsoft Xbox One Digital TV Tuner + - 045e:02d5 + * - PCTV 2002e + - 2013:025c + * - PCTV 2002e SE + - 2013:025d + * - Pinnacle Expresscard 320cx + - 2304:022e + * - Pinnacle PCTV 2000e + - 2304:022c + * - Pinnacle PCTV 282e + - 2013:0248, 2304:0248 + * - Pinnacle PCTV 340e HD Pro USB Stick + - 2304:023d + * - Pinnacle PCTV 72e + - 2304:0236 + * - Pinnacle PCTV 73A + - 2304:0243 + * - Pinnacle PCTV 73e + - 2304:0237 + * - Pinnacle PCTV 73e SE + - 2013:0245, 2304:0245 + * - Pinnacle PCTV DVB-T Flash Stick + - 2304:0228 + * - Pinnacle PCTV Dual DVB-T Diversity Stick + - 2304:0229 + * - Pinnacle PCTV HD Pro USB Stick + - 2304:023a + * - Pinnacle PCTV HD USB Stick + - 2304:023b + * - Pinnacle PCTV Hybrid Stick Solo + - 2304:023e + * - Prolink Pixelview SBTVD + - 1554:5010 + * - Sony PlayTV + - 1415:0003 + * - TechniSat AirStar TeleStick 2 + - 14f7:0004 + * - Terratec Cinergy DT USB XS Diversity/ T5 + - 0ccd:0081, 0ccd:10a1 + * - Terratec Cinergy DT XS Diversity + - 0ccd:005a + * - Terratec Cinergy HT Express + - 0ccd:0060 + * - Terratec Cinergy HT USB XE + - 0ccd:0058 + * - Terratec Cinergy T Express + - 0ccd:0062 + * - Terratec Cinergy T USB XXS (HD)/ T3 + - 0ccd:0078, 0ccd:10a0, 0ccd:00ab + * - Uniwill STK7700P based (Hama and others) + - 1584:6003 + * - YUAN High-Tech DiBcom STK7700D + - 1164:1e8c + * - YUAN High-Tech MC770 + - 1164:0871 + * - YUAN High-Tech STK7700D + - 1164:1efc + * - YUAN High-Tech STK7700PH + - 1164:1f08 + * - Yuan EC372S + - 1164:1edc + * - Yuan PD378S + - 1164:2edc -- GitLab From f21067392bbda75b175edc6dc9bb5066240b94be Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 10:58:43 +0200 Subject: [PATCH 256/503] media: admin-guide: add dibusb-mb and dibusb-mc card lists Document the supported dib0300 boards. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 2 + .../media/dvb-usb-dibusb-mb-cardlist.rst | 42 +++++++++++++++++++ .../media/dvb-usb-dibusb-mc-cardlist.rst | 30 +++++++++++++ 3 files changed, 74 insertions(+) create mode 100644 Documentation/admin-guide/media/dvb-usb-dibusb-mb-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-dibusb-mc-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 0632f186e22ea..4e80ed19416a6 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -56,6 +56,8 @@ settings for an specific product type. gspca-cardlist dvb-usb-dib0700-cardlist + dvb-usb-dibusb-mb-cardlist + dvb-usb-dibusb-mc-cardlist dvb-usb-af9015-cardlist dvb-usb-af9035-cardlist diff --git a/Documentation/admin-guide/media/dvb-usb-dibusb-mb-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dibusb-mb-cardlist.rst new file mode 100644 index 0000000000000..f25a54721f0de --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-dibusb-mb-cardlist.rst @@ -0,0 +1,42 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-dibusb-mb cards list +============================ + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AVerMedia AverTV DVBT USB1.1 + - 14aa:0001, 14aa:0002 + * - Artec T1 USB1.1 TVBOX with AN2135 + - 05d8:8105, 05d8:8106 + * - Artec T1 USB1.1 TVBOX with AN2235 + - 05d8:8107, 05d8:8108 + * - Artec T1 USB1.1 TVBOX with AN2235 (faulty USB IDs) + - 0547:2235 + * - Artec T1 USB2.0 + - 05d8:8109, 05d8:810a + * - Compro Videomate DVB-U2000 - DVB-T USB1.1 (please confirm to linux-dvb) + - 185b:d000, 145f:010c, 185b:d001 + * - DiBcom USB1.1 DVB-T reference design (MOD3000) + - 10b8:0bb8, 10b8:0bb9 + * - Grandtec USB1.1 DVB-T + - 5032:0fa0, 5032:0bb8, 5032:0fa1, 5032:0bb9 + * - KWorld V-Stream XPERT DTV - DVB-T USB1.1 + - eb1a:17de, eb1a:17df + * - KWorld Xpert DVB-T USB2.0 + - eb2a:17de + * - KWorld/ADSTech Instant DVB-T USB2.0 + - 06e1:a333, 06e1:a334 + * - TwinhanDTV USB-Ter USB1.1 / Magic Box I / HAMA USB1.1 DVB-T device + - 13d3:3201, 1822:3201, 13d3:3202, 1822:3202 + * - Unknown USB1.1 DVB-T device ???? please report the name to the author + - 1025:005e, 1025:005f + * - VideoWalker DVB-T USB + - 0458:701e, 0458:701f diff --git a/Documentation/admin-guide/media/dvb-usb-dibusb-mc-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dibusb-mc-cardlist.rst new file mode 100644 index 0000000000000..8d03bae0e084c --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-dibusb-mc-cardlist.rst @@ -0,0 +1,30 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-dibusb-mc cards list +============================ + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Artec T1 USB2.0 TVBOX (please check the warm ID) + - 05d8:8109, 05d8:810a + * - Artec T14 - USB2.0 DVB-T + - 05d8:810b, 05d8:810c + * - DiBcom USB2.0 DVB-T reference design (MOD3000P) + - 10b8:0bc6, 10b8:0bc7 + * - GRAND - USB2.0 DVB-T adapter + - 5032:0bc6, 5032:0bc7 + * - Humax/Coex DVB-T USB Stick 2.0 High Speed + - 10b9:5000, 10b9:5001 + * - LITE-ON USB2.0 DVB-T Tuner + - 04ca:f000, 04ca:f001 + * - Leadtek - USB2.0 Winfast DTV dongle + - 0413:6025, 0413:6026 + * - MSI Digivox Mini SL + - eb1a:e360, eb1a:e361 -- GitLab From 4b45a0cd391a85ef54dedac5a623bcb51a46a48a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 12:36:51 +0200 Subject: [PATCH 257/503] media: admin-guide: add support for the remaining dvb-usb boards Add documentation for the remaining dvb-usb boards. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 21 +++++++- .../media/dvb-usb-a800-cardlist.rst | 16 ++++++ .../media/dvb-usb-af9005-cardlist.rst | 20 +++++++ .../media/dvb-usb-az6027-cardlist.rst | 24 +++++++++ .../media/dvb-usb-cinergyT2-cardlist.rst | 16 ++++++ .../media/dvb-usb-cxusb-cardlist.rst | 40 ++++++++++++++ .../media/dvb-usb-digitv-cardlist.rst | 16 ++++++ .../media/dvb-usb-dtt200u-cardlist.rst | 22 ++++++++ .../media/dvb-usb-dtv5100-cardlist.rst | 16 ++++++ .../media/dvb-usb-dw2102-cardlist.rst | 52 +++++++++++++++++++ .../media/dvb-usb-gp8psk-cardlist.rst | 22 ++++++++ .../media/dvb-usb-m920x-cardlist.rst | 26 ++++++++++ .../media/dvb-usb-nova-t-usb2-cardlist.rst | 16 ++++++ .../media/dvb-usb-opera1-cardlist.rst | 16 ++++++ .../media/dvb-usb-pctv452e-cardlist.rst | 20 +++++++ .../media/dvb-usb-technisat-usb2-cardlist.rst | 16 ++++++ .../media/dvb-usb-ttusb2-cardlist.rst | 24 +++++++++ .../media/dvb-usb-umt-010-cardlist.rst | 16 ++++++ .../media/dvb-usb-vp702x-cardlist.rst | 16 ++++++ .../media/dvb-usb-vp7045-cardlist.rst | 18 +++++++ 20 files changed, 432 insertions(+), 1 deletion(-) create mode 100644 Documentation/admin-guide/media/dvb-usb-a800-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-af9005-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-az6027-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-cinergyT2-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-cxusb-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-digitv-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-dtt200u-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-dtv5100-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-gp8psk-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-m920x-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-nova-t-usb2-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-opera1-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-pctv452e-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-technisat-usb2-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-ttusb2-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-umt-010-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-vp702x-cardlist.rst create mode 100644 Documentation/admin-guide/media/dvb-usb-vp7045-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 4e80ed19416a6..39ccd91ac786b 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -59,13 +59,32 @@ settings for an specific product type. dvb-usb-dibusb-mb-cardlist dvb-usb-dibusb-mc-cardlist + dvb-usb-a800-cardlist + dvb-usb-af9005-cardlist + dvb-usb-az6027-cardlist + dvb-usb-cinergyT2-cardlist + dvb-usb-cxusb-cardlist + dvb-usb-digitv-cardlist + dvb-usb-dtt200u-cardlist + dvb-usb-dtv5100-cardlist + dvb-usb-dw2102-cardlist + dvb-usb-gp8psk-cardlist + dvb-usb-m920x-cardlist + dvb-usb-nova-t-usb2-cardlist + dvb-usb-opera1-cardlist + dvb-usb-pctv452e-cardlist + dvb-usb-technisat-usb2-cardlist + dvb-usb-ttusb2-cardlist + dvb-usb-umt-010-cardlist + dvb-usb-vp702x-cardlist + dvb-usb-vp7045-cardlist + dvb-usb-af9015-cardlist dvb-usb-af9035-cardlist dvb-usb-anysee-cardlist dvb-usb-au6610-cardlist dvb-usb-az6007-cardlist dvb-usb-ce6230-cardlist - dvb-usb-dib0700-cardlist dvb-usb-dvbsky-cardlist dvb-usb-ec168-cardlist dvb-usb-gl861-cardlist diff --git a/Documentation/admin-guide/media/dvb-usb-a800-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-a800-cardlist.rst new file mode 100644 index 0000000000000..2ec8bb8230ff9 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-a800-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-a800 cards list +======================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AVerMedia AverTV DVB-T USB 2.0 (A800) + - 07ca:a800, 07ca:a801 diff --git a/Documentation/admin-guide/media/dvb-usb-af9005-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-af9005-cardlist.rst new file mode 100644 index 0000000000000..285160ee82e85 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-af9005-cardlist.rst @@ -0,0 +1,20 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-af9005 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Afatech DVB-T USB1.1 stick + - 15a4:9020 + * - Ansonic DVB-T USB1.1 stick + - 10b9:6000 + * - TerraTec Cinergy T USB XE + - 0ccd:0055 diff --git a/Documentation/admin-guide/media/dvb-usb-az6027-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-az6027-cardlist.rst new file mode 100644 index 0000000000000..6d8575e9d90ce --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-az6027-cardlist.rst @@ -0,0 +1,24 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-az6027 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AZUREWAVE DVB-S/S2 USB2.0 (AZ6027) + - 13d3:3275 + * - Elgato EyeTV Sat + - 0fd9:002a, 0fd9:0025, 0fd9:0036 + * - TERRATEC S7 + - 0ccd:10a4 + * - TERRATEC S7 MKII + - 0ccd:10ac + * - Technisat SkyStar USB 2 HD CI + - 14f7:0001, 14f7:0002 diff --git a/Documentation/admin-guide/media/dvb-usb-cinergyT2-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-cinergyT2-cardlist.rst new file mode 100644 index 0000000000000..0ee753929eca9 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-cinergyT2-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-cinergyT2 cards list +============================ + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - TerraTec/qanu USB2.0 Highspeed DVB-T Receiver + - 0ccd:0x0038 diff --git a/Documentation/admin-guide/media/dvb-usb-cxusb-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-cxusb-cardlist.rst new file mode 100644 index 0000000000000..a73f15d1acf5f --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-cxusb-cardlist.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-cxusb cards list +======================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AVerMedia AVerTVHD Volar (A868R) + - + * - Conexant DMB-TH Stick + - + * - DViCO FusionHDTV DVB-T Dual Digital 2 + - + * - DViCO FusionHDTV DVB-T Dual Digital 4 + - + * - DViCO FusionHDTV DVB-T Dual Digital 4 (rev 2) + - + * - DViCO FusionHDTV DVB-T Dual USB + - + * - DViCO FusionHDTV DVB-T NANO2 + - + * - DViCO FusionHDTV DVB-T USB (LGZ201) + - + * - DViCO FusionHDTV DVB-T USB (TH7579) + - + * - DViCO FusionHDTV5 USB Gold + - + * - DigitalNow DVB-T Dual USB + - + * - Medion MD95700 (MDUSBTV-HYBRID) + - + * - Mygica D689 DMB-TH + - diff --git a/Documentation/admin-guide/media/dvb-usb-digitv-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-digitv-cardlist.rst new file mode 100644 index 0000000000000..2b4d8325e8e99 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-digitv-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-digitv cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Nebula Electronics uDigiTV DVB-T USB2.0) + - 0547:0201 diff --git a/Documentation/admin-guide/media/dvb-usb-dtt200u-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dtt200u-cardlist.rst new file mode 100644 index 0000000000000..b4150a7bf31fd --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-dtt200u-cardlist.rst @@ -0,0 +1,22 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-dtt200u cards list +========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - WideView WT-220U PenType Receiver (Miglia) + - 18f3:0220 + * - WideView WT-220U PenType Receiver (Typhoon/Freecom) + - 14aa:0222, 14aa:0220, 14aa:0221, 14aa:0225, 14aa:0226 + * - WideView WT-220U PenType Receiver (based on ZL353) + - 14aa:022a, 14aa:022b + * - WideView/Yuan/Yakumo/Hama/Typhoon DVB-T USB2.0 (WT-200U) + - 14aa:0201, 14aa:0301 diff --git a/Documentation/admin-guide/media/dvb-usb-dtv5100-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dtv5100-cardlist.rst new file mode 100644 index 0000000000000..91d6e35e6f9d1 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-dtv5100-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-dtv5100 cards list +========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - AME DTV-5100 USB2.0 DVB-T + - 0x06be:0xa232 diff --git a/Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst new file mode 100644 index 0000000000000..f01f9df1e2495 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst @@ -0,0 +1,52 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-dw2102 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - DVBWorld DVB-C 3101 USB2.0 + - 04b4:3101 + * - DVBWorld DVB-S 2101 USB2.0 + - 04b4:0x2101 + * - DVBWorld DVB-S 2102 USB2.0 + - 04b4:2102 + * - DVBWorld DW2104 USB2.0 + - 04b4:2104 + * - GOTVIEW Satellite HD + - 0x1FE1:5456 + * - Geniatech T220 DVB-T/T2 USB2.0 + - 0x1f4d:0xD220 + * - SU3000HD DVB-S USB2.0 + - 0x1f4d:0x3000 + * - TeVii S482 (tuner 1) + - 0x9022:0xd483 + * - TeVii S482 (tuner 2) + - 0x9022:0xd484 + * - TeVii S630 USB + - 0x9022:d630 + * - TeVii S650 USB2.0 + - 0x9022:d650 + * - TeVii S662 + - 0x9022:d662 + * - TechnoTrend TT-connect S2-4600 + - 0b48:3011 + * - TerraTec Cinergy S USB + - 0ccd:0064 + * - Terratec Cinergy S2 USB BOX + - 0ccd:0x0105 + * - Terratec Cinergy S2 USB HD + - 0ccd:00a8 + * - Terratec Cinergy S2 USB HD Rev.2 + - 0ccd:00b0 + * - Terratec Cinergy S2 USB HD Rev.3 + - 0ccd:0102 + * - X3M TV SPC1400HD PCI + - 0x1f4d:0x3100 diff --git a/Documentation/admin-guide/media/dvb-usb-gp8psk-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-gp8psk-cardlist.rst new file mode 100644 index 0000000000000..150fa9f7810ac --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-gp8psk-cardlist.rst @@ -0,0 +1,22 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-gp8psk cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Genpix 8PSK-to-USB2 Rev.1 DVB-S receiver + - 09c0:0200, 09c0:0201 + * - Genpix 8PSK-to-USB2 Rev.2 DVB-S receiver + - 09c0:0202 + * - Genpix SkyWalker-1 DVB-S receiver + - 09c0:0203 + * - Genpix SkyWalker-2 DVB-S receiver + - 09c0:0206 diff --git a/Documentation/admin-guide/media/dvb-usb-m920x-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-m920x-cardlist.rst new file mode 100644 index 0000000000000..73145940b5c56 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-m920x-cardlist.rst @@ -0,0 +1,26 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-m920x cards list +======================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - DTV-DVB UDTT7049 + - 13d3:3219 + * - Dposh DVB-T USB2.0 + - 1498:9206, 1498:a090 + * - LifeView TV Walker Twin DVB-T USB2.0 + - 10fd:0514, 10fd:0513 + * - MSI DIGI VOX mini II DVB-T USB2.0 + - 10fd:1513 + * - MSI Mega Sky 580 DVB-T USB2.0 + - 0db0:5580 + * - Pinnacle PCTV 310e + - 13d3:3211 diff --git a/Documentation/admin-guide/media/dvb-usb-nova-t-usb2-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-nova-t-usb2-cardlist.rst new file mode 100644 index 0000000000000..e295f912a5851 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-nova-t-usb2-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-nova-t-usb2 cards list +============================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Hauppauge WinTV-NOVA-T usb2 + - 2040:9300, 2040:9301 diff --git a/Documentation/admin-guide/media/dvb-usb-opera1-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-opera1-cardlist.rst new file mode 100644 index 0000000000000..362245f5a46a3 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-opera1-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-opera1 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Opera1 DVB-S USB2.0 + - 04b4:2830, 695c:3829 diff --git a/Documentation/admin-guide/media/dvb-usb-pctv452e-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-pctv452e-cardlist.rst new file mode 100644 index 0000000000000..886d8cc18acb0 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-pctv452e-cardlist.rst @@ -0,0 +1,20 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-pctv452e cards list +=========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - PCTV HDTV USB + - 2304:021f + * - Technotrend TT Connect S2-3600 + - 0b48:3007 + * - Technotrend TT Connect S2-3650-CI + - 0b48:300a diff --git a/Documentation/admin-guide/media/dvb-usb-technisat-usb2-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-technisat-usb2-cardlist.rst new file mode 100644 index 0000000000000..30ee92ada134d --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-technisat-usb2-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-technisat-usb2 cards list +================================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Technisat SkyStar USB HD (DVB-S/S2) + - 14f7:0500 diff --git a/Documentation/admin-guide/media/dvb-usb-ttusb2-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-ttusb2-cardlist.rst new file mode 100644 index 0000000000000..faa78e5f3f5d9 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-ttusb2-cardlist.rst @@ -0,0 +1,24 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-ttusb2 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Pinnacle 400e DVB-S USB2.0 + - 2304:020f + * - Pinnacle 450e DVB-S USB2.0 + - 2304:0222 + * - Technotrend TT-connect CT-3650 + - 0b48:300d + * - Technotrend TT-connect S-2400 + - 0b48:3006 + * - Technotrend TT-connect S-2400 (8kB EEPROM) + - 0b48:3009 diff --git a/Documentation/admin-guide/media/dvb-usb-umt-010-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-umt-010-cardlist.rst new file mode 100644 index 0000000000000..ce7ce901b5ac3 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-umt-010-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-umt-010 cards list +========================== + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Hanftek UMT-010 DVB-T USB2.0 + - 15f4:0001, 15f4:0015 diff --git a/Documentation/admin-guide/media/dvb-usb-vp702x-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-vp702x-cardlist.rst new file mode 100644 index 0000000000000..1014424342685 --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-vp702x-cardlist.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-vp702x cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - TwinhanDTV StarBox DVB-S USB2.0 (VP7021) + - 13d3:3207 diff --git a/Documentation/admin-guide/media/dvb-usb-vp7045-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-vp7045-cardlist.rst new file mode 100644 index 0000000000000..2fc8fc4ecc32a --- /dev/null +++ b/Documentation/admin-guide/media/dvb-usb-vp7045-cardlist.rst @@ -0,0 +1,18 @@ +.. SPDX-License-Identifier: GPL-2.0 + +dvb-usb-vp7045 cards list +========================= + +.. tabularcolumns:: |p{7.0cm}|p{10.5cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 7 13 + :stub-columns: 0 + + * - Card name + - USB IDs + * - DigitalNow TinyUSB 2 DVB-t Receiver + - 13d3:3223, 13d3:3224 + * - Twinhan USB2.0 DVB-T receiver (TwinhanDTV Alpha/MagicBox II) + - 13d3:3205, 13d3:3206 -- GitLab From da95d30bb06e797716776945710cc10c004b3a57 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 18:42:24 +0200 Subject: [PATCH 258/503] media: admin-guide: add a card list for the Siano driver The siano driver looks like em28xx, except that its cards are split on 3 drivers. Add a card list for it. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 2 + .../admin-guide/media/siano-cardlist.rst | 56 +++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 Documentation/admin-guide/media/siano-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 39ccd91ac786b..755f49472d88f 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -52,7 +52,9 @@ settings for an specific product type. cx231xx-cardlist em28xx-cardlist tm6000-cardlist + siano-cardlist usbvision-cardlist + gspca-cardlist dvb-usb-dib0700-cardlist diff --git a/Documentation/admin-guide/media/siano-cardlist.rst b/Documentation/admin-guide/media/siano-cardlist.rst new file mode 100644 index 0000000000000..d387c04d753c0 --- /dev/null +++ b/Documentation/admin-guide/media/siano-cardlist.rst @@ -0,0 +1,56 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Siano cards list +================ + +.. tabularcolumns:: p{13.3cm}|p{4.2cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 17 16 + :stub-columns: 0 + + * - Card name + - USB IDs + * - Hauppauge Catamount + - 2040:1700 + * - Hauppauge Okemo-A + - 2040:1800 + * - Hauppauge Okemo-B + - 2040:1801 + * - Hauppauge WinTV MiniCard + - 2040:2000, 2040:200a, 2040:2010, 2040:2011, 2040:2019 + * - Hauppauge WinTV MiniCard + - 2040:2009 + * - Hauppauge WinTV MiniStick + - 2040:5500, 2040:5510, 2040:5520, 2040:5530, 2040:5580, 2040:5590, 2040:b900, 2040:b910, 2040:b980, 2040:b990, 2040:c000, 2040:c010, 2040:c080, 2040:c090, 2040:c0a0, 2040:f5a0 + * - Hauppauge microStick 77e + - 2013:0257 + * - ONDA Data Card Digital Receiver + - 19D2:0078 + * - Siano Denver (ATSC-M/H) Digital Receiver + - 187f:0800 + * - Siano Denver (TDMB) Digital Receiver + - 187f:0700 + * - Siano Ming Digital Receiver + - 187f:0310 + * - Siano Nice Digital Receiver + - 187f:0202, 187f:0202 + * - Siano Nova A Digital Receiver + - 187f:0200 + * - Siano Nova B Digital Receiver + - 187f:0201 + * - Siano Pele Digital Receiver + - 187f:0500 + * - Siano Rio Digital Receiver + - 187f:0600, 3275:0080 + * - Siano Stellar Digital Receiver + - 187f:0100 + * - Siano Stellar Digital Receiver ROM + - 187f:0010 + * - Siano Vega Digital Receiver + - 187f:0300 + * - Siano Venice Digital Receiver + - 187f:0301, 187f:0301, 187f:0302 + * - ZTE Data Card Digital Receiver + - 19D2:0086 -- GitLab From ea90626fdf6ee6ca6aa4843f9bf05dee198db192 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 17 Apr 2020 17:58:04 +0200 Subject: [PATCH 259/503] media: admin-guide: add a cardlist for all other USB cards There are several other USB cards. Most of them support just one device. The only exception is the "pwc" driver. But, as updates to it are not frequent, let's just place everything manually into a single file. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 2 + .../admin-guide/media/other-usb-cardlist.rst | 92 +++++++++++++++++++ 2 files changed, 94 insertions(+) create mode 100644 Documentation/admin-guide/media/other-usb-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 755f49472d88f..8a9ccaec5dea9 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -95,6 +95,8 @@ settings for an specific product type. dvb-usb-rtl28xxu-cardlist dvb-usb-zd1301-cardlist + other-usb-cardlist + PCI drivers =========== diff --git a/Documentation/admin-guide/media/other-usb-cardlist.rst b/Documentation/admin-guide/media/other-usb-cardlist.rst new file mode 100644 index 0000000000000..bbfdb1389c189 --- /dev/null +++ b/Documentation/admin-guide/media/other-usb-cardlist.rst @@ -0,0 +1,92 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Other USB cards list +==================== + +================ ====================================== ===================== +Driver Card name USB IDs +================ ====================================== ===================== +airspy Airspy 1d50:60a1 +dvb-as102 Abilis Systems DVB-Titan 1BA6:0001 +dvb-as102 PCTV Systems picoStick (74e) 2013:0246 +dvb-as102 Elgato EyeTV DTT Deluxe 0fd9:002c +dvb-as102 nBox DVB-T Dongle 0b89:0007 +dvb-as102 Sky IT Digital Key (green led) 2137:0001 +b2c2-flexcop-usb Technisat/B2C2 FlexCop II/IIb/III 0af7:0101 + Digital TV +cpia2 Vision's CPiA2 cameras 0553:0100, 0553:0140, + such as the Digital Blue QX5 0553:0151 +go7007 WIS GO7007 MPEG encoder 1943:a250, 093b:a002, + 093b:a004, 0eb1:6666, + 0eb1:6668 +hackrf HackRF Software Decoder Radio 1d50:6089 +hdpvr Hauppauge HD PVR 2040:4900, 2040:4901, + 2040:4902, 2040:4982, + 2040:4903 +msi2500 Mirics MSi3101 SDR Dongle 1df7:2500, 2040:d300 +pvrusb2 Hauppauge WinTV-PVR USB2 2040:2900, 2040:2950, + 2040:2400, 1164:0622, + 1164:0602, 11ba:1003, + 11ba:1001, 2040:7300, + 2040:7500, 2040:7501, + 0ccd:0039, 2040:7502, + 2040:7510 +pwc Creative Webcam 5 041E:400C +pwc Creative Webcam Pro Ex 041E:4011 +pwc Logitech QuickCam 3000 Pro 046D:08B0 +pwc Logitech QuickCam Notebook Pro 046D:08B1 +pwc Logitech QuickCam 4000 Pro 046D:08B2 +pwc Logitech QuickCam Zoom (old model) 046D:08B3 +pwc Logitech QuickCam Zoom (new model) 046D:08B4 +pwc Logitech QuickCam Orbit/Sphere 046D:08B5 +pwc Logitech/Cisco VT Camera 046D:08B6 +pwc Logitech ViewPort AV 100 046D:08B7 +pwc Logitech QuickCam 046D:08B8 +pwc Philips PCA645VC 0471:0302 +pwc Philips PCA646VC 0471:0303 +pwc Askey VC010 type 2 0471:0304 +pwc Philips PCVC675K (Vesta) 0471:0307 +pwc Philips PCVC680K (Vesta Pro) 0471:0308 +pwc Philips PCVC690K (Vesta Pro Scan) 0471:030C +pwc Philips PCVC730K (ToUCam Fun), 0471:0310 + PCVC830 (ToUCam II) +pwc Philips PCVC740K (ToUCam Pro), 0471:0311 + PCVC840 (ToUCam II) +pwc Philips PCVC750K (ToUCam Pro Scan) 0471:0312 +pwc Philips PCVC720K/40 (ToUCam XS) 0471:0313 +pwc Philips SPC 900NC 0471:0329 +pwc Philips SPC 880NC 0471:032C +pwc Sotec Afina Eye 04CC:8116 +pwc Samsung MPC-C10 055D:9000 +pwc Samsung MPC-C30 055D:9001 +pwc Samsung SNC-35E (Ver3.0) 055D:9002 +pwc Askey VC010 type 1 069A:0001 +pwc AME Co. Afina Eye 06BE:8116 +pwc Visionite VCS-UC300 0d81:1900 +pwc Visionite VCS-UM100 0d81:1910 +s2255drv Sensoray 2255 1943:2255, 1943:2257 +stk1160 STK1160 USB video capture dongle 05e1:0408 +stkwebcam Syntek DC1125 174f:a311, 05e1:0501 +dvb-ttusb-budget Technotrend/Hauppauge Nova-USB devices 0b48:1003, 0b48:1004, + 0b48:1005 +dvb-ttusb_dec Technotrend/Hauppauge MPEG decoder 0b48:1006 + DEC3000-s +dvb-ttusb_dec Technotrend/Hauppauge MPEG decoder 0b48:1007 +dvb-ttusb_dec Technotrend/Hauppauge MPEG decoder 0b48:1008 + DEC2000-t +dvb-ttusb_dec Technotrend/Hauppauge MPEG decoder + DEC2540-t 0b48:1009 +usbtv Fushicai USBTV007 Audio-Video Grabber 1b71:3002, 1f71:3301, + 1f71:3306 +zr364xx USB ZR364XX Camera 08ca:0109, 041e:4024, + 0d64:0108, 0546:3187, + 0d64:3108, 0595:4343, + 0bb0:500d, 0feb:2004, + 055f:b500, 08ca:2062, + 052b:1a18, 04c8:0729, + 04f2:a208, 0784:0040, + 06d6:0034, 0a17:0062, + 06d6:003b, 0a17:004e, + 041e:405d, 08ca:2102, + 06d6:003d +================ ====================================== ===================== -- GitLab From d3cb0832072905db31ab08778cb5cf8482b9f700 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 08:40:57 +0200 Subject: [PATCH 260/503] media: admin-guide: split DVB cards.rst The DVB cards.rst file is old and outdated. It also contains data that are contained on other cardlists. Remove the duplicated information and split frontends and PCI cards on separate files. As all USB cards already have their own card lists, just drop the old USB data there. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 7 +- Documentation/admin-guide/media/cards.rst | 146 ------------------ .../admin-guide/media/frontend-cardlist.rst | 48 ++++++ Documentation/admin-guide/media/index.rst | 1 - .../admin-guide/media/other-pci-cardlist.rst | 25 +++ 5 files changed, 79 insertions(+), 148 deletions(-) delete mode 100644 Documentation/admin-guide/media/cards.rst create mode 100644 Documentation/admin-guide/media/frontend-cardlist.rst create mode 100644 Documentation/admin-guide/media/other-pci-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 8a9ccaec5dea9..f379617498971 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -16,7 +16,9 @@ and may be added/removed by the user. This section contains a list of supported PCI and USB boards. -Please notice that this list is not exaustive. +Please notice that this list is not exhaustive. You may also take a +look at https://linuxtv.org/wiki/index.php/Hardware_Device_Information +for more details about supported cards. USB drivers =========== @@ -148,6 +150,8 @@ specific board. saa7134-cardlist saa7164-cardlist + other-pci-cardlist + I²C drivers =========== @@ -168,3 +172,4 @@ different tuner number in order to address such issue. :maxdepth: 1 tuner-cardlist + frontend-cardlist diff --git a/Documentation/admin-guide/media/cards.rst b/Documentation/admin-guide/media/cards.rst deleted file mode 100644 index e2e30a56b4502..0000000000000 --- a/Documentation/admin-guide/media/cards.rst +++ /dev/null @@ -1,146 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -Hardware supported by the linuxtv.org DVB drivers -================================================= - -.. note:: - - This documentation is outdated. Please check at the DVB wiki - at https://linuxtv.org/wiki for more updated info. - - Please look at - https://linuxtv.org/wiki/index.php/Hardware_Device_Information - for an updated list of supported cards. - -Generally, the DVB hardware manufacturers frequently change the -frontends (i.e. tuner / demodulator units) used, usually without -changing the product name, revision number or specs. Some cards -are also available in versions with different frontends for -DVB-S/DVB-C/DVB-T. Thus the frontend drivers are listed separately. - -.. note:: - - #) There is no guarantee that every frontend driver works - out of the box with every card, because of different wiring. - - #) The demodulator chips can be used with a variety of - tuner/PLL chips, and not all combinations are supported. Often - the demodulator and tuner/PLL chip are inside a metal box for - shielding, and the whole metal box has its own part number. - - -- Frontends drivers: - - - dvb_dummy_fe: for testing... - - DVB-S: - - ves1x93 : Alps BSRV2 (ves1893 demodulator) and dbox2 (ves1993) - - cx24110 : Conexant HM1221/HM1811 (cx24110 or cx24106 demod, cx24108 PLL) - - grundig_29504-491 : Grundig 29504-491 (Philips TDA8083 demodulator), tsa5522 PLL - - mt312 : Zarlink mt312 or Mitel vp310 demodulator, sl1935 or tsa5059 PLLi, Technisat Sky2Pc with bios Rev. 2.3 - - stv0299 : Alps BSRU6 (tsa5059 PLL), LG TDQB-S00x (tsa5059 PLL), - LG TDQF-S001F (sl1935 PLL), Philips SU1278 (tua6100 PLL), - Philips SU1278SH (tsa5059 PLL), Samsung TBMU24112IMB, Technisat Sky2Pc with bios Rev. 2.6 - - DVB-C: - - ves1820 : various (ves1820 demodulator, sp5659c or spXXXX PLL) - - at76c651 : Atmel AT76c651(B) with DAT7021 PLL - - DVB-T: - - alps_tdlb7 : Alps TDLB7 (sp8870 demodulator, sp5659 PLL) - - alps_tdmb7 : Alps TDMB7 (cx22700 demodulator) - - grundig_29504-401 : Grundig 29504-401 (LSI L64781 demodulator), tsa5060 PLL - - tda1004x : Philips tda10045h (td1344 or tdm1316l PLL) - - nxt6000 : Alps TDME7 (MITEL SP5659 PLL), Alps TDED4 (TI ALP510 PLL), Comtech DVBT-6k07 (SP5730 PLL), (NxtWave Communications NXT6000 demodulator) - - sp887x : Microtune 7202D - - dib3000mb : DiBcom 3000-MB demodulator - - DVB-S/C/T: - - dst : TwinHan DST Frontend - - ATSC: - - nxt200x : Nxtwave NXT2002 & NXT2004 - - or51211 : or51211 based (pcHDTV HD2000 card) - - or51132 : or51132 based (pcHDTV HD3000 card) - - bcm3510 : Broadcom BCM3510 - - lgdt330x : LG Electronics DT3302 & DT3303 - - -- Cards based on the Phillips saa7146 multimedia PCI bridge chip: - - - TI AV7110 based cards (i.e. with hardware MPEG decoder): - - Siemens/Technotrend/Hauppauge PCI DVB card revision 1.1, 1.3, 1.5, 1.6, 2.1 (aka Hauppauge Nexus) - - "budget" cards (i.e. without hardware MPEG decoder): - - Technotrend Budget / Hauppauge WinTV-Nova PCI Cards - - SATELCO Multimedia PCI - - KNC1 DVB-S, Typhoon DVB-S, Terratec Cinergy 1200 DVB-S (no CI support) - - Typhoon DVB-S budget - - Fujitsu-Siemens Activy DVB-S budget card - -- Cards based on the B2C2 Inc. FlexCopII/IIb/III: - - - Technisat SkyStar2 PCI DVB card revision 2.3, 2.6B, 2.6C - -- Cards based on the Conexant Bt8xx PCI bridge: - - - Pinnacle PCTV Sat DVB - - Nebula Electronics DigiTV - - TwinHan DST - - Avermedia DVB-T - - ChainTech digitop DST-1000 DVB-S - - pcHDTV HD-2000 TV - - DViCO FusionHDTV DVB-T Lite - - DViCO FusionHDTV5 Lite - -- Technotrend / Hauppauge DVB USB devices: - - - Nova USB - - DEC 2000-T, 3000-S, 2540-T - -- DiBcom DVB-T USB based devices: - - - Twinhan VisionPlus VisionDTV USB-Ter DVB-T Device - - HAMA DVB-T USB device - - CTS Portable (Chinese Television System) - - KWorld V-Stream XPERT DTV DVB-T USB - - JetWay DTV DVB-T USB - - ADSTech Instant TV DVB-T USB - - Ultima Electronic/Artec T1 USB TVBOX (AN2135 and AN2235) - - Compro Videomate DVB-U2000 - DVB-T USB - - Grandtec USB DVB-T - - Avermedia AverTV DVBT USB - - DiBcom USB DVB-T reference device (non-public) - - Yakumo DVB-T mobile USB2.0 - - DiBcom USB2.0 DVB-T reference device (non-public) - -- Experimental support for the analog module of the Siemens DVB-C PCI card - -- Cards based on the Conexant cx2388x PCI bridge: - - - ADS Tech Instant TV DVB-T PCI - - ATI HDTV Wonder - - digitalnow DNTV Live! DVB-T - - DViCO FusionHDTV DVB-T1 - - DViCO FusionHDTV DVB-T Plus - - DViCO FusionHDTV3 Gold-Q - - DViCO FusionHDTV3 Gold-T - - DViCO FusionHDTV5 Gold - - Hauppauge Nova-T DVB-T - - KWorld/VStream XPert DVB-T - - pcHDTV HD3000 HDTV - - TerraTec Cinergy 1400 DVB-T - - WinFast DTV1000-T - -- Cards based on the Phillips saa7134 PCI bridge: - - - Medion 7134 - - Pinnacle PCTV 300i DVB-T + PAL - - LifeView FlyDVB-T DUO - - Typhoon DVB-T Duo Digital/Analog Cardbus - - Philips TOUGH DVB-T reference design - - Philips EUROPA V3 reference design - - Compro Videomate DVB-T300 - - Compro Videomate DVB-T200 - - AVerMedia AVerTVHD MCE A180 - - KWorld PC150-U ATSC Hybrid - diff --git a/Documentation/admin-guide/media/frontend-cardlist.rst b/Documentation/admin-guide/media/frontend-cardlist.rst new file mode 100644 index 0000000000000..6702729824298 --- /dev/null +++ b/Documentation/admin-guide/media/frontend-cardlist.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Frontend drivers +================ + +.. note:: + + #) There is no guarantee that every frontend driver works + out of the box with every card, because of different wiring. + + #) The demodulator chips can be used with a variety of + tuner/PLL chips, and not all combinations are supported. Often + the demodulator and tuner/PLL chip are inside a metal box for + shielding, and the whole metal box has its own part number. + + - dvb_dummy_fe: for testing... + + DVB-S: + - ves1x93 : Alps BSRV2 (ves1893 demodulator) and dbox2 (ves1993) + - cx24110 : Conexant HM1221/HM1811 (cx24110 or cx24106 demod, cx24108 PLL) + - grundig_29504-491 : Grundig 29504-491 (Philips TDA8083 demodulator), tsa5522 PLL + - mt312 : Zarlink mt312 or Mitel vp310 demodulator, sl1935 or tsa5059 PLLi, Technisat Sky2Pc with bios Rev. 2.3 + - stv0299 : Alps BSRU6 (tsa5059 PLL), LG TDQB-S00x (tsa5059 PLL), + LG TDQF-S001F (sl1935 PLL), Philips SU1278 (tua6100 PLL), + Philips SU1278SH (tsa5059 PLL), Samsung TBMU24112IMB, Technisat Sky2Pc with bios Rev. 2.6 + + DVB-C: + - ves1820 : various (ves1820 demodulator, sp5659c or spXXXX PLL) + - at76c651 : Atmel AT76c651(B) with DAT7021 PLL + + DVB-T: + - alps_tdlb7 : Alps TDLB7 (sp8870 demodulator, sp5659 PLL) + - alps_tdmb7 : Alps TDMB7 (cx22700 demodulator) + - grundig_29504-401 : Grundig 29504-401 (LSI L64781 demodulator), tsa5060 PLL + - tda1004x : Philips tda10045h (td1344 or tdm1316l PLL) + - nxt6000 : Alps TDME7 (MITEL SP5659 PLL), Alps TDED4 (TI ALP510 PLL), Comtech DVBT-6k07 (SP5730 PLL), (NxtWave Communications NXT6000 demodulator) + - sp887x : Microtune 7202D + - dib3000mb : DiBcom 3000-MB demodulator + + DVB-S/C/T: + - dst : TwinHan DST Frontend + + ATSC: + - nxt200x : Nxtwave NXT2002 & NXT2004 + - or51211 : or51211 based (pcHDTV HD2000 card) + - or51132 : or51132 based (pcHDTV HD3000 card) + - bcm3510 : Broadcom BCM3510 + - lgdt330x : LG Electronics DT3302 & DT3303 diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index ecaf28effa6a4..dbe36e427e6ba 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -83,7 +83,6 @@ Linux Digital TV driver-specific documentation faq dvb_references - cards avermedia bt8xx lmedm04 diff --git a/Documentation/admin-guide/media/other-pci-cardlist.rst b/Documentation/admin-guide/media/other-pci-cardlist.rst new file mode 100644 index 0000000000000..5ae65547add0d --- /dev/null +++ b/Documentation/admin-guide/media/other-pci-cardlist.rst @@ -0,0 +1,25 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Other PCI Hardware supported by media subsystem +=============================================== + +Generally, media hardware manufacturers frequently change the ancillary +drivers, like tuners and demodulator units used, usually without +changing the product name, revision number or specs. + +- Cards based on the Phillips saa7146 multimedia PCI bridge chip: + + - TI AV7110 based cards (i.e. with hardware MPEG decoder): + - Siemens/Technotrend/Hauppauge PCI DVB card revision 1.1, 1.3, 1.5, 1.6, 2.1 (aka Hauppauge Nexus) + - "budget" cards (i.e. without hardware MPEG decoder): + - Technotrend Budget / Hauppauge WinTV-Nova PCI Cards + - SATELCO Multimedia PCI + - KNC1 DVB-S, Typhoon DVB-S, Terratec Cinergy 1200 DVB-S (no CI support) + - Typhoon DVB-S budget + - Fujitsu-Siemens Activy DVB-S budget card + +- Cards based on the B2C2 Inc. FlexCopII/IIb/III: + + - Technisat SkyStar2 PCI DVB card revision 2.3, 2.6B, 2.6C + +- Experimental support for the analog module of the Siemens DVB-C PCI card -- GitLab From 97b202b004b47f8f220a0641a868083181d3656a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 10:16:06 +0200 Subject: [PATCH 261/503] media: admin-guide: replace the frontend drivers list The frontend drivers list is incomplete. Update it from what's there at the Kernel Kconfig files. Signed-off-by: Mauro Carvalho Chehab --- .../admin-guide/media/frontend-cardlist.rst | 244 +++++++++++++++--- 1 file changed, 211 insertions(+), 33 deletions(-) diff --git a/Documentation/admin-guide/media/frontend-cardlist.rst b/Documentation/admin-guide/media/frontend-cardlist.rst index 6702729824298..73a248c1b0644 100644 --- a/Documentation/admin-guide/media/frontend-cardlist.rst +++ b/Documentation/admin-guide/media/frontend-cardlist.rst @@ -1,5 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0 +================ Frontend drivers ================ @@ -13,36 +14,213 @@ Frontend drivers the demodulator and tuner/PLL chip are inside a metal box for shielding, and the whole metal box has its own part number. - - dvb_dummy_fe: for testing... - - DVB-S: - - ves1x93 : Alps BSRV2 (ves1893 demodulator) and dbox2 (ves1993) - - cx24110 : Conexant HM1221/HM1811 (cx24110 or cx24106 demod, cx24108 PLL) - - grundig_29504-491 : Grundig 29504-491 (Philips TDA8083 demodulator), tsa5522 PLL - - mt312 : Zarlink mt312 or Mitel vp310 demodulator, sl1935 or tsa5059 PLLi, Technisat Sky2Pc with bios Rev. 2.3 - - stv0299 : Alps BSRU6 (tsa5059 PLL), LG TDQB-S00x (tsa5059 PLL), - LG TDQF-S001F (sl1935 PLL), Philips SU1278 (tua6100 PLL), - Philips SU1278SH (tsa5059 PLL), Samsung TBMU24112IMB, Technisat Sky2Pc with bios Rev. 2.6 - - DVB-C: - - ves1820 : various (ves1820 demodulator, sp5659c or spXXXX PLL) - - at76c651 : Atmel AT76c651(B) with DAT7021 PLL - - DVB-T: - - alps_tdlb7 : Alps TDLB7 (sp8870 demodulator, sp5659 PLL) - - alps_tdmb7 : Alps TDMB7 (cx22700 demodulator) - - grundig_29504-401 : Grundig 29504-401 (LSI L64781 demodulator), tsa5060 PLL - - tda1004x : Philips tda10045h (td1344 or tdm1316l PLL) - - nxt6000 : Alps TDME7 (MITEL SP5659 PLL), Alps TDED4 (TI ALP510 PLL), Comtech DVBT-6k07 (SP5730 PLL), (NxtWave Communications NXT6000 demodulator) - - sp887x : Microtune 7202D - - dib3000mb : DiBcom 3000-MB demodulator - - DVB-S/C/T: - - dst : TwinHan DST Frontend - - ATSC: - - nxt200x : Nxtwave NXT2002 & NXT2004 - - or51211 : or51211 based (pcHDTV HD2000 card) - - or51132 : or51132 based (pcHDTV HD3000 card) - - bcm3510 : Broadcom BCM3510 - - lgdt330x : LG Electronics DT3302 & DT3303 + +Common Interface (EN50221) controller drivers +============================================= + +============== ========================================================= +Driver Name +============== ========================================================= +cxd2099 Sony CXD2099AR Common Interface driver +sp2 CIMaX SP2 +============== ========================================================= + +ATSC (North American/Korean Terrestrial/Cable DTV) frontends +============================================================ + +============== ========================================================= +Driver Name +============== ========================================================= +au8522_dig Auvitek AU8522 based DTV demod +au8522_decoder Auvitek AU8522 based ATV demod +bcm3510 Broadcom BCM3510 +lg2160 LG Electronics LG216x based +lgdt3305 LG Electronics LGDT3304 and LGDT3305 based +lgdt3306a LG Electronics LGDT3306A based +lgdt330x LG Electronics LGDT3302/LGDT3303 based +nxt200x NxtWave Communications NXT2002/NXT2004 based +or51132 Oren OR51132 based +or51211 Oren OR51211 based +s5h1409 Samsung S5H1409 based +s5h1411 Samsung S5H1411 based +============== ========================================================= + +DVB-C (cable) frontends +======================= + +============== ========================================================= +Driver Name +============== ========================================================= +stv0297 ST STV0297 based +tda10021 Philips TDA10021 based +tda10023 Philips TDA10023 based +ves1820 VLSI VES1820 based +============== ========================================================= + +DVB-S (satellite) frontends +=========================== + +============== ========================================================= +Driver Name +============== ========================================================= +cx24110 Conexant CX24110 based +cx24116 Conexant CX24116 based +cx24117 Conexant CX24117 based +cx24120 Conexant CX24120 based +cx24123 Conexant CX24123 based +ds3000 Montage Tehnology DS3000 based +mb86a16 Fujitsu MB86A16 based +mt312 Zarlink VP310/MT312/ZL10313 based +s5h1420 Samsung S5H1420 based +si21xx Silicon Labs SI21XX based +stb6000 ST STB6000 silicon tuner +stv0288 ST STV0288 based +stv0299 ST STV0299 based +stv0900 ST STV0900 based +stv6110 ST STV6110 silicon tuner +tda10071 NXP TDA10071 +tda10086 Philips TDA10086 based +tda8083 Philips TDA8083 based +tda8261 Philips TDA8261 based +tda826x Philips TDA826X silicon tuner +ts2020 Montage Tehnology TS2020 based tuners +tua6100 Infineon TUA6100 PLL +cx24113 Conexant CX24113/CX24128 tuner for DVB-S/DSS +itd1000 Integrant ITD1000 Zero IF tuner for DVB-S/DSS +ves1x93 VLSI VES1893 or VES1993 based +zl10036 Zarlink ZL10036 silicon tuner +zl10039 Zarlink ZL10039 silicon tuner +============== ========================================================= + +DVB-T (terrestrial) frontends +============================= + +============== ========================================================= +Driver Name +============== ========================================================= +af9013 Afatech AF9013 demodulator +cx22700 Conexant CX22700 based +cx22702 Conexant cx22702 demodulator (OFDM) +cxd2820r Sony CXD2820R +cxd2841er Sony CXD2841ER +cxd2880 Sony CXD2880 DVB-T2/T tuner + demodulator +dib3000mb DiBcom 3000M-B +dib3000mc DiBcom 3000P/M-C +dib7000m DiBcom 7000MA/MB/PA/PB/MC +dib7000p DiBcom 7000PC +dib9000 DiBcom 9000 +drxd Micronas DRXD driver +ec100 E3C EC100 +l64781 LSI L64781 +mt352 Zarlink MT352 based +nxt6000 NxtWave Communications NXT6000 based +rtl2830 Realtek RTL2830 DVB-T +rtl2832 Realtek RTL2832 DVB-T +rtl2832_sdr Realtek RTL2832 SDR +s5h1432 Samsung s5h1432 demodulator (OFDM) +si2168 Silicon Labs Si2168 +sp8870 Spase sp8870 based +sp887x Spase sp887x based +stv0367 ST STV0367 based +tda10048 Philips TDA10048HN based +tda1004x Philips TDA10045H/TDA10046H based +zd1301_demod ZyDAS ZD1301 +zl10353 Zarlink ZL10353 based +============== ========================================================= + +Digital terrestrial only tuners/PLL +=================================== + +============== ========================================================= +Driver Name +============== ========================================================= +dvb-pll Generic I2C PLL based tuners +dib0070 DiBcom DiB0070 silicon base-band tuner +dib0090 DiBcom DiB0090 silicon base-band tuner +============== ========================================================= + +ISDB-S (satellite) & ISDB-T (terrestrial) frontends +=================================================== + +============== ========================================================= +Driver Name +============== ========================================================= +mn88443x Socionext MN88443x +tc90522 Toshiba TC90522 +============== ========================================================= + +ISDB-T (terrestrial) frontends +============================== + +============== ========================================================= +Driver Name +============== ========================================================= +dib8000 DiBcom 8000MB/MC +mb86a20s Fujitsu mb86a20s +s921 Sharp S921 frontend +============== ========================================================= + +Multistandard (cable + terrestrial) frontends +============================================= + +============== ========================================================= +Driver Name +============== ========================================================= +drxk Micronas DRXK based +mn88472 Panasonic MN88472 +mn88473 Panasonic MN88473 +si2165 Silicon Labs si2165 based +tda18271c2dd NXP TDA18271C2 silicon tuner +============== ========================================================= + +Multistandard (satellite) frontends +=================================== + +============== ========================================================= +Driver Name +============== ========================================================= +m88ds3103 Montage Technology M88DS3103 +mxl5xx MaxLinear MxL5xx based tuner-demodulators +stb0899 STB0899 based +stb6100 STB6100 based tuners +stv090x STV0900/STV0903(A/B) based +stv0910 STV0910 based +stv6110x STV6110/(A) based tuners +stv6111 STV6111 based tuners +============== ========================================================= + +SEC control devices for DVB-S +============================= + +============== ========================================================= +Driver Name +============== ========================================================= +a8293 Allegro A8293 +af9033 Afatech AF9033 DVB-T demodulator +ascot2e Sony Ascot2E tuner +atbm8830 AltoBeam ATBM8830/8831 DMB-TH demodulator +drx39xyj Micronas DRX-J demodulator +helene Sony HELENE Sat/Ter tuner (CXD2858ER) +horus3a Sony Horus3A tuner +isl6405 ISL6405 SEC controller +isl6421 ISL6421 SEC controller +isl6423 ISL6423 SEC controller +ix2505v Sharp IX2505V silicon tuner +lgs8gl5 Silicon Legend LGS-8GL5 demodulator (OFDM) +lgs8gxx Legend Silicon LGS8913/LGS8GL5/LGS8GXX DMB-TH demodulator +lnbh25 LNBH25 SEC controller +lnbh29 LNBH29 SEC controller +lnbp21 LNBP21/LNBH24 SEC controllers +lnbp22 LNBP22 SEC controllers +m88rs2000 M88RS2000 DVB-S demodulator and tuner +tda665x TDA665x tuner +============== ========================================================= + +Tools to develop new frontends +============================== + +============== ========================================================= +Driver Name +============== ========================================================= +dvb_dummy_fe Dummy frontend driver +============== ========================================================= -- GitLab From 0cb8f667ec6adc731c4573609486e25ea48b5057 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 10:23:29 +0200 Subject: [PATCH 262/503] media: admin-guide: add a list of media PCI cards Instead of listing "other" PCI card list, just add a list with the existing drivers (not including sub-drivers). Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 50 ++++++++++++++++++- .../admin-guide/media/other-pci-cardlist.rst | 25 ---------- 2 files changed, 48 insertions(+), 27 deletions(-) delete mode 100644 Documentation/admin-guide/media/other-pci-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index f379617498971..231e9a8e01bf0 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -139,6 +139,54 @@ So, several media drivers allow passing a ``card=`` parameter, in order to setup a card number that would match the correct settings for an specific board. +The current supported PCI/PCIe cards (not including staging drivers) are +listed below\ [#]_. + +.. [#] some of the drivers have sub-drivers, not shown at this table + +================ ======================================================== +Driver Name +================ ======================================================== +altera-ci Altera FPGA based CI module +b2c2-flexcop-pci Technisat/B2C2 Air/Sky/Cable2PC PCI +bt878 DVB/ATSC Support for bt878 based TV cards +bttv BT8x8 Video For Linux +cobalt Cisco Cobalt +cx18 Conexant cx23418 MPEG encoder +cx23885 Conexant cx23885 (2388x successor) +cx25821 Conexant cx25821 +cx88xx Conexant 2388x (bt878 successor) +ddbridge Digital Devices bridge +dm1105 SDMC DM1105 based PCI cards +dt3155 DT3155 frame grabber +dvb-ttpci AV7110 cards +earth-pt1 PT1 cards +earth-pt3 Earthsoft PT3 cards +hexium_gemini Hexium Gemini frame grabber +hexium_orion Hexium HV-PCI6 and Orion frame grabber +hopper HOPPER based cards +ipu3-cio2 Intel ipu3-cio2 driver +ivtv Conexant cx23416/cx23415 MPEG encoder/decoder +ivtvfb Conexant cx23415 framebuffer +mantis MANTIS based cards +meye Sony Vaio Picturebook Motion Eye +mxb Siemens-Nixdorf 'Multimedia eXtension Board' +netup-unidvb NetUP Universal DVB card +ngene Micronas nGene +pluto2 Pluto2 cards +saa7134 Philips SAA7134 +saa7164 NXP SAA7164 +smipcie SMI PCIe DVBSky cards +solo6x10 Bluecherry / Softlogic 6x10 capture cards (MPEG-4/H.264) +sta2x11_vip STA2X11 VIP Video For Linux +tw5864 Techwell TW5864 video/audio grabber and encoder +tw686x Intersil/Techwell TW686x +tw68 Techwell tw68x Video For Linux +================ ======================================================== + +Some of those drivers support multiple devices, as shown at the card +lists below: + .. toctree:: :maxdepth: 1 @@ -150,8 +198,6 @@ specific board. saa7134-cardlist saa7164-cardlist - other-pci-cardlist - I²C drivers =========== diff --git a/Documentation/admin-guide/media/other-pci-cardlist.rst b/Documentation/admin-guide/media/other-pci-cardlist.rst deleted file mode 100644 index 5ae65547add0d..0000000000000 --- a/Documentation/admin-guide/media/other-pci-cardlist.rst +++ /dev/null @@ -1,25 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -Other PCI Hardware supported by media subsystem -=============================================== - -Generally, media hardware manufacturers frequently change the ancillary -drivers, like tuners and demodulator units used, usually without -changing the product name, revision number or specs. - -- Cards based on the Phillips saa7146 multimedia PCI bridge chip: - - - TI AV7110 based cards (i.e. with hardware MPEG decoder): - - Siemens/Technotrend/Hauppauge PCI DVB card revision 1.1, 1.3, 1.5, 1.6, 2.1 (aka Hauppauge Nexus) - - "budget" cards (i.e. without hardware MPEG decoder): - - Technotrend Budget / Hauppauge WinTV-Nova PCI Cards - - SATELCO Multimedia PCI - - KNC1 DVB-S, Typhoon DVB-S, Terratec Cinergy 1200 DVB-S (no CI support) - - Typhoon DVB-S budget - - Fujitsu-Siemens Activy DVB-S budget card - -- Cards based on the B2C2 Inc. FlexCopII/IIb/III: - - - Technisat SkyStar2 PCI DVB card revision 2.3, 2.6B, 2.6C - -- Experimental support for the analog module of the Siemens DVB-C PCI card -- GitLab From 0753351432ef95379b707e65f100048ba9990660 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 10:48:04 +0200 Subject: [PATCH 263/503] media: admin-guide: add a table with USB drivers Having a table with a list of all USB drivers seems worth, and it comes almost for free, as we can just use Kconfig descriptions (with some adjustments). So, add a table for that. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 78 ++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 231e9a8e01bf0..411131678cd97 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -47,6 +47,84 @@ by different products. So, several media drivers allow passing a ``card=`` parameter, in order to setup a card number that would match the correct settings for an specific product type. +The current supported USB cards (not including staging drivers) are +listed below\ [#]_. + +.. [#] + + some of the drivers have sub-drivers, not shown at this table. + In particular, gspca driver has lots of sub-drivers, + for cameras not supported by the USB Video Class (UVC) driver, + as shown at :doc:`gspca card list `. + + +====================== ========================================================= +Driver Name +====================== ========================================================= +airspy AirSpy +au0828 Auvitek AU0828 +b2c2-flexcop-usb Technisat/B2C2 Air/Sky/Cable2PC USB +cpia2 CPiA2 Video For Linux +cx231xx Conexant cx231xx USB video capture +dvb-as102 Abilis AS102 DVB receiver +dvb-ttusb-budget Technotrend/Hauppauge Nova - USB devices +dvb-usb-a800 AVerMedia AverTV DVB-T USB 2.0 (A800) +dvb-usb-af9005 Afatech AF9005 DVB-T USB1.1 +dvb-usb-af9015 Afatech AF9015 DVB-T USB2.0 +dvb-usb-af9035 Afatech AF9035 DVB-T USB2.0 +dvb-usb-anysee Anysee DVB-T/C USB2.0 +dvb-usb-au6610 Alcor Micro AU6610 USB2.0 +dvb-usb-az6007 AzureWave 6007 and clones DVB-T/C USB2.0 +dvb-usb-az6027 Azurewave DVB-S/S2 USB2.0 AZ6027 +dvb-usb-ce6230 Intel CE6230 DVB-T USB2.0 +dvb-usb-cinergyT2 Terratec CinergyT2/qanu USB 2.0 DVB-T +dvb-usb-cxusb Conexant USB2.0 hybrid +dvb-usb-dib0700 DiBcom DiB0700 +dvb-usb-dibusb-common DiBcom DiB3000M-B +dvb-usb-dibusb-mc DiBcom DiB3000M-C/P +dvb-usb-digitv Nebula Electronics uDigiTV DVB-T USB2.0 +dvb-usb-dtt200u WideView WT-200U and WT-220U (pen) DVB-T +dvb-usb-dtv5100 AME DTV-5100 USB2.0 DVB-T +dvb-usb-dvbsky DVBSky USB +dvb-usb-dw2102 DvbWorld & TeVii DVB-S/S2 USB2.0 +dvb-usb-ec168 E3C EC168 DVB-T USB2.0 +dvb-usb-gl861 Genesys Logic GL861 USB2.0 +dvb-usb-gp8psk GENPIX 8PSK->USB module +dvb-usb-lmedm04 LME DM04/QQBOX DVB-S USB2.0 +dvb-usb-m920x Uli m920x DVB-T USB2.0 +dvb-usb-nova-t-usb2 Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 +dvb-usb-opera Opera1 DVB-S USB2.0 receiver +dvb-usb-pctv452e Pinnacle PCTV HDTV Pro USB device/TT Connect S2-3600 +dvb-usb-rtl28xxu Realtek RTL28xxU DVB USB +dvb-usb-technisat-usb2 Technisat DVB-S/S2 USB2.0 +dvb-usb-ttusb2 Pinnacle 400e DVB-S USB2.0 +dvb-usb-umt-010 HanfTek UMT-010 DVB-T USB2.0 +dvb_usb_v2 Support for various USB DVB devices v2 +dvb-usb-vp702x TwinhanDTV StarBox and clones DVB-S USB2.0 +dvb-usb-vp7045 TwinhanDTV Alpha/MagicBoxII, DNTV tinyUSB2, Beetle USB2.0 +em28xx Empia EM28xx USB devices +go7007 WIS GO7007 MPEG encoder +gspca Drivers for several USB Cameras +hackrf HackRF +hdpvr Hauppauge HD PVR +msi2500 Mirics MSi2500 +mxl111sf-tuner MxL111SF DTV USB2.0 +pvrusb2 Hauppauge WinTV-PVR USB2 +pwc USB Philips Cameras +s2250 Sensoray 2250/2251 +s2255drv USB Sensoray 2255 video capture device +smsusb Siano SMS1xxx based MDTV receiver +stkwebcam USB Syntek DC1125 Camera +tm6000-alsa TV Master TM5600/6000/6010 audio +tm6000-dvb DVB Support for tm6000 based TV cards +tm6000 TV Master TM5600/6000/6010 driver +ttusb_dec Technotrend/Hauppauge USB DEC devices +usbtv USBTV007 video capture +uvcvideo USB Video Class (UVC) +zd1301 ZyDAS ZD1301 +zr364xx USB ZR364XX Camera +====================== ========================================================= + .. toctree:: :maxdepth: 1 -- GitLab From 9436af9eb4e440d5d4d9fa5109eb8ec56b6c7bab Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 10:56:34 +0200 Subject: [PATCH 264/503] media: admin-guide: add a list of platform drivers There's no reason why to keep platform drivers out of the card list. Add them. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 86 ++++++++++++++++++-- 1 file changed, 81 insertions(+), 5 deletions(-) diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 411131678cd97..4bcdeee09cac6 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -14,10 +14,8 @@ OpenFirmware or ACPI. The PCI and USB drivers, however, are independent of the system's board, and may be added/removed by the user. -This section contains a list of supported PCI and USB boards. - -Please notice that this list is not exhaustive. You may also take a -look at https://linuxtv.org/wiki/index.php/Hardware_Device_Information +You may also take a look at +https://linuxtv.org/wiki/index.php/Hardware_Device_Information for more details about supported cards. USB drivers @@ -57,7 +55,6 @@ listed below\ [#]_. for cameras not supported by the USB Video Class (UVC) driver, as shown at :doc:`gspca card list `. - ====================== ========================================================= Driver Name ====================== ========================================================= @@ -276,6 +273,85 @@ lists below: saa7134-cardlist saa7164-cardlist +Platform drivers +================ + +There are several drivers that are focused on providing support for +functionality that are already included at the main board, and don't +use neither USB nor PCI bus. Those drivers are called platform +drivers, and are very popular on embedded devices. + +The current supported of platform drivers (not including staging drivers) are +listed below + +================= ============================================================ +Driver Name +================= ============================================================ +am437x-vpfe TI AM437x VPFE +aspeed-video Aspeed AST2400 and AST2500 +atmel-isc ATMEL Image Sensor Controller (ISC) +atmel-isi ATMEL Image Sensor Interface (ISI) +c8sectpfe SDR platform devices +c8sectpfe SDR platform devices +cafe_ccic Marvell 88ALP01 (Cafe) CMOS Camera Controller +cdns-csi2rx Cadence MIPI-CSI2 RX Controller +cdns-csi2tx Cadence MIPI-CSI2 TX Controller +coda-vpu Chips&Media Coda multi-standard codec IP +dm355_ccdc TI DM355 CCDC video capture +dm644x_ccdc TI DM6446 CCDC video capture +exynos-fimc-is EXYNOS4x12 FIMC-IS (Imaging Subsystem) +exynos-fimc-lite EXYNOS FIMC-LITE camera interface +exynos-gsc Samsung Exynos G-Scaler +exy Samsung S5P/EXYNOS4 SoC series Camera Subsystem +fsl-viu Freescale VIU +imx-pxp i.MX Pixel Pipeline (PXP) +isdf TI DM365 ISIF video capture +mmp_camera Marvell Armada 610 integrated camera controller +mtk_jpeg Mediatek JPEG Codec +mtk-mdp Mediatek MDP +mtk-vcodec-dec Mediatek Video Codec +mtk-vpu Mediatek Video Processor Unit +mx2_emmaprp MX2 eMMa-PrP +omap3-isp OMAP 3 Camera +omap-vout OMAP2/OMAP3 V4L2-Display +pxa_camera PXA27x Quick Capture Interface +qcom-camss Qualcomm V4L2 Camera Subsystem +rcar-csi2 R-Car MIPI CSI-2 Receiver +rcar_drif Renesas Digital Radio Interface (DRIF) +rcar-fcp Renesas Frame Compression Processor +rcar_fdp1 Renesas Fine Display Processor +rcar_jpu Renesas JPEG Processing Unit +rcar-vin R-Car Video Input (VIN) +renesas-ceu Renesas Capture Engine Unit (CEU) +rockchip-rga Rockchip Raster 2d Graphic Acceleration Unit +s3c-camif Samsung S3C24XX/S3C64XX SoC Camera Interface +s5p-csis S5P/EXYNOS MIPI-CSI2 receiver (MIPI-CSIS) +s5p-fimc S5P/EXYNOS4 FIMC/CAMIF camera interface +s5p-g2d Samsung S5P and EXYNOS4 G2D 2d graphics accelerator +s5p-jpeg Samsung S5P/Exynos3250/Exynos4 JPEG codec +s5p-mfc Samsung S5P MFC Video Codec +sh_veu SuperH VEU mem2mem video processing +sh_vou SuperH VOU video output +stm32-dcmi STM32 Digital Camera Memory Interface (DCMI) +sun4i-csi Allwinner A10 CMOS Sensor Interface Support +sun6i-csi Allwinner V3s Camera Sensor Interface +sun8i-di Allwinner Deinterlace +sun8i-rotate Allwinner DE2 rotation +ti-cal TI Memory-to-memory multimedia devices +ti-csc TI DVB platform devices +ti-vpe TI VPE (Video Processing Engine) +venus-enc Qualcomm Venus V4L2 encoder/decoder +via-camera VIAFB camera controller +video-mux Video Multiplexer +vpif_display TI DaVinci VPIF V4L2-Display +vpif_capture TI DaVinci VPIF video capture +vpss TI DaVinci VPBE V4L2-Display +vsp1 Renesas VSP1 Video Processing Engine +xilinx-tpg Xilinx Video Test Pattern Generator +xilinx-video Xilinx Video IP (EXPERIMENTAL) +xilinx-vtc Xilinx Video Timing Controller +================= ============================================================ + I²C drivers =========== -- GitLab From c127fa9d3d54e38ca2714c17e82365bc467021b0 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 11:08:54 +0200 Subject: [PATCH 265/503] media: admin-guide: add a list of I2C drivers For completeness, let's add a list of I2C drivers. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 267 +++++++++++++++++++ 1 file changed, 267 insertions(+) diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 4bcdeee09cac6..619b40c0f120f 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -368,6 +368,273 @@ that comes with a tuner for North America market, and another one for Europe. Some drivers have a ``tuner=`` modprobe parameter to allow using a different tuner number in order to address such issue. +The current supported of I²C drivers (not including staging drivers) are +listed below. + +Audio decoders, processors and mixers +------------------------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +cs3308 Cirrus Logic CS3308 audio ADC +cs5345 Cirrus Logic CS5345 audio ADC +cs53l32a Cirrus Logic CS53L32A audio ADC +msp3400 Micronas MSP34xx audio decoders +sony-btf-mpx Sony BTF's internal MPX +tda1997x NXP TDA1997x HDMI receiver +tda7432 Philips TDA7432 audio processor +tda9840 Philips TDA9840 audio processor +tea6415c Philips TEA6415C audio processor +tea6420 Philips TEA6420 audio processor +tlv320aic23b Texas Instruments TLV320AIC23B audio codec +tvaudio Simple audio decoder chips +uda1342 Philips UDA1342 audio codec +vp27smpx Panasonic VP27's internal MPX +wm8739 Wolfson Microelectronics WM8739 stereo audio ADC +wm8775 Wolfson Microelectronics WM8775 audio ADC with input mixer +============ ========================================================== + +Audio/Video compression chips +----------------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +saa6752hs Philips SAA6752HS MPEG-2 Audio/Video Encoder +============ ========================================================== + +Camera sensor devices +--------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +et8ek8 ET8EK8 camera sensor +hi556 Hynix Hi-556 sensor +imx214 Sony IMX214 sensor +imx219 Sony IMX219 sensor +imx258 Sony IMX258 sensor +imx274 Sony IMX274 sensor +imx290 Sony IMX290 sensor +imx319 Sony IMX319 sensor +imx355 Sony IMX355 sensor +m5mols Fujitsu M-5MOLS 8MP sensor +mt9m001 mt9m001 +mt9m032 MT9M032 camera sensor +mt9m111 mt9m111, mt9m112 and mt9m131 +mt9p031 Aptina MT9P031 +mt9t001 Aptina MT9T001 +mt9t112 Aptina MT9T111/MT9T112 +mt9v011 Micron mt9v011 sensor +mt9v032 Micron MT9V032 sensor +mt9v111 Aptina MT9V111 sensor +noon010pc30 Siliconfile NOON010PC30 sensor +ov13858 OmniVision OV13858 sensor +ov2640 OmniVision OV2640 sensor +ov2659 OmniVision OV2659 sensor +ov2680 OmniVision OV2680 sensor +ov2685 OmniVision OV2685 sensor +ov5640 OmniVision OV5640 sensor +ov5645 OmniVision OV5645 sensor +ov5647 OmniVision OV5647 sensor +ov5670 OmniVision OV5670 sensor +ov5675 OmniVision OV5675 sensor +ov5695 OmniVision OV5695 sensor +ov6650 OmniVision OV6650 sensor +ov7251 OmniVision OV7251 sensor +ov7640 OmniVision OV7640 sensor +ov7670 OmniVision OV7670 sensor +ov772x OmniVision OV772x sensor +ov7740 OmniVision OV7740 sensor +ov8856 OmniVision OV8856 sensor +ov9640 OmniVision OV9640 sensor +ov9650 OmniVision OV9650/OV9652 sensor +rj54n1cb0c Sharp RJ54N1CB0C sensor +s5c73m3 Samsung S5C73M3 sensor +s5k4ecgx Samsung S5K4ECGX sensor +s5k5baf Samsung S5K5BAF sensor +s5k6a3 Samsung S5K6A3 sensor +s5k6aa Samsung S5K6AAFX sensor +smiapp SMIA++/SMIA sensor +sr030pc30 Siliconfile SR030PC30 sensor +vs6624 ST VS6624 sensor +============ ========================================================== + +Flash devices +------------- + +============ ========================================================== +Driver Name +============ ========================================================== +adp1653 ADP1653 flash +lm3560 LM3560 dual flash driver +lm3646 LM3646 dual flash driver +============ ========================================================== + +IR I2C driver +------------- + +============ ========================================================== +Driver Name +============ ========================================================== +ir-kbd-i2c I2C module for IR +============ ========================================================== + +Lens drivers +------------ + +============ ========================================================== +Driver Name +============ ========================================================== +ad5820 AD5820 lens voice coil +ak7375 AK7375 lens voice coil +dw9714 DW9714 lens voice coil +dw9807-vcm DW9807 lens voice coil +============ ========================================================== + +Miscellaneous helper chips +-------------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +video-i2c I2C transport video +m52790 Mitsubishi M52790 A/V switch +st-mipid02 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge +ths7303 THS7303/53 Video Amplifier +============ ========================================================== + +RDS decoders +------------ + +============ ========================================================== +Driver Name +============ ========================================================== +saa6588 SAA6588 Radio Chip RDS decoder +============ ========================================================== + +SDR tuner chips +--------------- + +============ ========================================================== +Driver Name +============ ========================================================== +max2175 Maxim 2175 RF to Bits tuner +============ ========================================================== + +Video and audio decoders +------------------------ + +============ ========================================================== +Driver Name +============ ========================================================== +cx25840 Conexant CX2584x audio/video decoders +saa717x Philips SAA7171/3/4 audio/video decoders +============ ========================================================== + +Video decoders +-------------- + +============ ========================================================== +Driver Name +============ ========================================================== +adv7180 Analog Devices ADV7180 decoder +adv7183 Analog Devices ADV7183 decoder +adv748x Analog Devices ADV748x decoder +adv7604 Analog Devices ADV7604 decoder +adv7842 Analog Devices ADV7842 decoder +bt819 BT819A VideoStream decoder +bt856 BT856 VideoStream decoder +bt866 BT866 VideoStream decoder +ks0127 KS0127 video decoder +ml86v7667 OKI ML86V7667 video decoder +saa7110 Philips SAA7110 video decoder +saa7115 Philips SAA7111/3/4/5 video decoders +tc358743 Toshiba TC358743 decoder +tvp514x Texas Instruments TVP514x video decoder +tvp5150 Texas Instruments TVP5150 video decoder +tvp7002 Texas Instruments TVP7002 video decoder +tw2804 Techwell TW2804 multiple video decoder +tw9903 Techwell TW9903 video decoder +tw9906 Techwell TW9906 video decoder +tw9910 Techwell TW9910 video decoder +vpx3220 vpx3220a, vpx3216b & vpx3214c video decoders +============ ========================================================== + +Video encoders +-------------- + +============ ========================================================== +Driver Name +============ ========================================================== +ad9389b Analog Devices AD9389B encoder +adv7170 Analog Devices ADV7170 video encoder +adv7175 Analog Devices ADV7175 video encoder +adv7343 ADV7343 video encoder +adv7393 ADV7393 video encoder +adv7511-v4l2 Analog Devices ADV7511 encoder +ak881x AK8813/AK8814 video encoders +saa7127 Philips SAA7127/9 digital video encoders +saa7185 Philips SAA7185 video encoder +ths8200 Texas Instruments THS8200 video encoder +============ ========================================================== + +Video improvement chips +----------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +upd64031a NEC Electronics uPD64031A Ghost Reduction +upd64083 NEC Electronics uPD64083 3-Dimensional Y/C separation +============ ========================================================== + +Tuner drivers +------------- + +============ ================================================== +Driver Name +============ ================================================== +e4000 Elonics E4000 silicon tuner +fc0011 Fitipower FC0011 silicon tuner +fc0012 Fitipower FC0012 silicon tuner +fc0013 Fitipower FC0013 silicon tuner +fc2580 FCI FC2580 silicon tuner +it913x ITE Tech IT913x silicon tuner +m88rs6000t Montage M88RS6000 internal tuner +max2165 Maxim MAX2165 silicon tuner +mc44s803 Freescale MC44S803 Low Power CMOS Broadband tuners +msi001 Mirics MSi001 +mt2060 Microtune MT2060 silicon IF tuner +mt2063 Microtune MT2063 silicon IF tuner +mt20xx Microtune 2032 / 2050 tuners +mt2131 Microtune MT2131 silicon tuner +mt2266 Microtune MT2266 silicon tuner +mxl301rf MaxLinear MxL301RF tuner +mxl5005s MaxLinear MSL5005S silicon tuner +mxl5007t MaxLinear MxL5007T silicon tuner +qm1d1b0004 Sharp QM1D1B0004 tuner +qm1d1c0042 Sharp QM1D1C0042 tuner +qt1010 Quantek QT1010 silicon tuner +r820t Rafael Micro R820T silicon tuner +si2157 Silicon Labs Si2157 silicon tuner +tuner-types Simple tuner support +tda18212 NXP TDA18212 silicon tuner +tda18218 NXP TDA18218 silicon tuner +tda18250 NXP TDA18250 silicon tuner +tda18271 NXP TDA18271 silicon tuner +tda827x Philips TDA827X silicon tuner +tda8290 TDA 8290/8295 + 8275(a)/18271 tuner combo +tda9887 TDA 9885/6/7 analog IF demodulator +tea5761 TEA 5761 radio tuner +tea5767 TEA 5767 radio tuner +tua9001 Infineon TUA9001 silicon tuner +tuner-xc2028 XCeive xc2028/xc3028 tuners +xc4000 Xceive XC4000 silicon tuner +xc5000 Xceive XC5000 silicon tuner +============ ================================================== + .. toctree:: :maxdepth: 1 -- GitLab From a70559d37a6b564f16b324d6e18dfae48278243f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 11:13:58 +0200 Subject: [PATCH 266/503] media: admin-guide: add SPI cards to platform drivers The SPI cards are also under the concept of "platform" drivers as defined at the section introduction. So, add a SPI card list there. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 619b40c0f120f..5fe75fbec3bd6 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -352,6 +352,15 @@ xilinx-video Xilinx Video IP (EXPERIMENTAL) xilinx-vtc Xilinx Video Timing Controller ================= ============================================================ +MMC/SDIO DVB adapters +--------------------- + +======= =========================================== +Driver Name +======= =========================================== +smssdio Siano SMS1xxx based MDTV via SDIO interface +======= =========================================== + I²C drivers =========== -- GitLab From c84315dd8aece8b400610cd1e4c1614209faac14 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 11:13:58 +0200 Subject: [PATCH 267/503] media: admin-guide: add card lists for radio and firewire Document the supported radio devices, plus document the firewire driver. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 54 ++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 5fe75fbec3bd6..334372b52f418 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -361,6 +361,60 @@ Driver Name smssdio Siano SMS1xxx based MDTV via SDIO interface ======= =========================================== +Firewire driver +=============== + +The media subsystem also provides a firewire driver for digital TV: + +======= ===================== +Driver Name +======= ===================== +firedtv FireDTV and FloppyDTV +======= ===================== + +Radio drivers +============= + +There is also support for pure AM/FM radio, and even for some FM radio +transmitters: + +===================== ========================================================= +Driver Name +===================== ========================================================= +si4713 Silicon Labs Si4713 FM Radio Transmitter +radio-aztech Aztech/Packard Bell Radio +radio-cadet ADS Cadet AM/FM Tuner +radio-gemtek GemTek Radio card (or compatible) +radio-maxiradio Guillemot MAXI Radio FM 2000 radio +radio-miropcm20 miroSOUND PCM20 radio +radio-aimslab AIMSlab RadioTrack (aka RadioReveal) +radio-rtrack2 AIMSlab RadioTrack II +saa7706h SAA7706H Car Radio DSP +radio-sf16fmi SF16-FMI/SF16-FMP/SF16-FMD Radio +radio-sf16fmr2 SF16-FMR2/SF16-FMD2 Radio +radio-shark Griffin radioSHARK USB radio receiver +shark2 Griffin radioSHARK2 USB radio receiver +radio-si470x-common Silicon Labs Si470x FM Radio Receiver +radio-si476x Silicon Laboratories Si476x I2C FM Radio +radio-tea5764 TEA5764 I2C FM radio +tef6862 TEF6862 Car Radio Enhanced Selectivity Tuner +radio-terratec TerraTec ActiveRadio ISA Standalone +radio-timb Enable the Timberdale radio driver +radio-trust Trust FM radio card +radio-typhoon Typhoon Radio (a.k.a. EcoRadio) +radio-wl1273 Texas Instruments WL1273 I2C FM Radio +fm_drv ISA radio devices +fm_drv ISA radio devices +radio-zoltrix Zoltrix Radio +dsbr100 D-Link/GemTek USB FM radio +radio-keene Keene FM Transmitter USB +radio-ma901 Masterkit MA901 USB FM radio +radio-mr800 AverMedia MR 800 USB FM radio +radio-raremono Thanko's Raremono AM/FM/SW radio +radio-si470x-usb Silicon Labs Si470x FM Radio Receiver support with USB +radio-usb-si4713 Silicon Labs Si4713 FM Radio Transmitter support with USB +===================== ========================================================= + I²C drivers =========== -- GitLab From 8cf8f0a68a99de6e5bee188907faf81b40aead28 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 11:15:06 +0200 Subject: [PATCH 268/503] media: admin-guide: add test-drivers While test drivers is probably something that normal users won't bother, it doesn't hurt to add them to the card list. This way, all drivers, except for the ones under staging, would be listed there. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 334372b52f418..8cdb9d4ca7d6f 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -703,3 +703,19 @@ xc5000 Xceive XC5000 silicon tuner tuner-cardlist frontend-cardlist + +Test drivers +============ + +In order to test userspace applications, there's a number of virtual +drivers, with provide test functionality, simulating real hardware +devices: + +======= ====================================== +Driver Name +======= ====================================== +vicodec Virtual Codec Driver +vim2m Virtual Memory-to-Memory Driver +vimc Virtual Media Controller Driver (VIMC) +vivid Virtual Video Test Driver +======= ====================================== -- GitLab From f45ce7a1e582678468afc2c7cc33794dea1ddeca Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 11:59:20 +0200 Subject: [PATCH 269/503] media: admin-guide: bt8xx.rst: fix a broken cross-reference The old cards.rst file doesn't exist anymore. Also, it is not the right reference there, as it should be pointing to the bttv-specific cardlist. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/bt8xx.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/admin-guide/media/bt8xx.rst b/Documentation/admin-guide/media/bt8xx.rst index a55f4f5af042a..d6cf81d83d61a 100644 --- a/Documentation/admin-guide/media/bt8xx.rst +++ b/Documentation/admin-guide/media/bt8xx.rst @@ -18,7 +18,7 @@ General information This class of cards has a bt878a as the PCI interface, and require the bttv driver for accessing the i2c bus and the gpio pins of the bt8xx chipset. -Please see :doc:`cards` for a complete list of Cards based on the +Please see :doc:`bttv-cardlist` for a complete list of Cards based on the Conexant Bt8xx PCI bridge supported by the Linux Kernel. In order to be able to compile the kernel, some config options should be -- GitLab From a79a0e71ae67ec9f43df9a2d2d611ab56fcef89f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 11:59:24 +0200 Subject: [PATCH 270/503] media: admin-guide: reorganize the guide Separate the generic documentation from the driver-specific parts, and use a better title for the documentation. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/dvb.rst | 12 +++++ Documentation/admin-guide/media/index.rst | 46 +++++++++++-------- ...{v4l-with-ir.rst => remote-controller.rst} | 9 ++-- 3 files changed, 44 insertions(+), 23 deletions(-) create mode 100644 Documentation/admin-guide/media/dvb.rst rename Documentation/admin-guide/media/{v4l-with-ir.rst => remote-controller.rst} (96%) diff --git a/Documentation/admin-guide/media/dvb.rst b/Documentation/admin-guide/media/dvb.rst new file mode 100644 index 0000000000000..e5258bfa5cd9b --- /dev/null +++ b/Documentation/admin-guide/media/dvb.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========== +Digital TV +========== + +.. toctree:: + + dvb_intro + ci + faq + dvb_references diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index dbe36e427e6ba..05ddd49306994 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -2,9 +2,9 @@ .. include:: -============================ -Media subsystem usage guides -============================ +==================================== +Media subsystem admin and user guide +==================================== This section contains usage information about media subsystem and its supported drivers. @@ -18,11 +18,8 @@ Please see: for driver development information and Kernel APIs used by media devices; -.. _uapi-v4l-drivers: - -################################################ -Video4Linux (V4L) driver-specific documentation -################################################ +The media subsystem +=================== .. only:: html @@ -37,9 +34,27 @@ Video4Linux (V4L) driver-specific documentation intro building + remote-controller + + dvb + cardlist - v4l-with-ir + +.. _uapi-v4l-drivers: + +Video4Linux (V4L) driver-specific documentation +=============================================== + +.. only:: html + + .. class:: toc-title + + Table of Contents + +.. toctree:: + :maxdepth: 5 + :numbered: bttv cafe_ccic @@ -64,9 +79,8 @@ Video4Linux (V4L) driver-specific documentation vimc vivid -############################################## -Linux Digital TV driver-specific documentation -############################################## +Digital TV driver-specific documentation +======================================== .. only:: html @@ -78,11 +92,6 @@ Linux Digital TV driver-specific documentation :maxdepth: 5 :numbered: - dvb_intro - ci - faq - dvb_references - avermedia bt8xx lmedm04 @@ -91,9 +100,8 @@ Linux Digital TV driver-specific documentation ttusb-dec zr364xx -################################# CEC driver-specific documentation -################################# +================================= .. only:: html diff --git a/Documentation/admin-guide/media/v4l-with-ir.rst b/Documentation/admin-guide/media/remote-controller.rst similarity index 96% rename from Documentation/admin-guide/media/v4l-with-ir.rst rename to Documentation/admin-guide/media/remote-controller.rst index ce23c8a7bc938..fa05410c3cd5e 100644 --- a/Documentation/admin-guide/media/v4l-with-ir.rst +++ b/Documentation/admin-guide/media/remote-controller.rst @@ -1,12 +1,13 @@ .. SPDX-License-Identifier: GPL-2.0 +====================================================== Infrared remote control support in video4linux drivers ====================================================== Authors: Gerd Hoffmann, Mauro Carvalho Chehab Basics ------- +====== Most analog and digital TV boards support remote controllers. Several of them have a microprocessor that receives the IR carriers, convert into @@ -33,7 +34,7 @@ detected. However, for a few devices, you need to manually load the ir-kbd-i2c module. How it works ------------- +============ The modules register the remote as keyboard within the linux input layer, i.e. you'll see the keys of the remote as normal key strokes @@ -55,7 +56,7 @@ the keymaps, like the input kbd utility. Using with lircd -================ +---------------- The latest versions of the lircd daemon supports reading events from the linux input layer (via event device). It also supports receiving IR codes @@ -63,7 +64,7 @@ in lirc mode. Using without lircd -=================== +------------------- Xorg recognizes several IR keycodes that have its numerical value lower than 247. With the advent of Wayland, the input driver got updated too, -- GitLab From 33fc918ab89bec747e45e4ffcb2803d37f01dd4d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 18 Apr 2020 12:07:11 +0200 Subject: [PATCH 271/503] media: admin-guide: split driver-specific indexes to new files In order to better organize the main admin-guide index, place the driver-specific indexes on separate files. This ensures a more consistent numbering at the main index. Signed-off-by: Mauro Carvalho Chehab --- .../admin-guide/media/cec-drivers.rst | 10 +++ .../admin-guide/media/dvb-drivers.rst | 16 ++++ Documentation/admin-guide/media/index.rst | 79 +------------------ .../admin-guide/media/v4l-drivers.rst | 33 ++++++++ 4 files changed, 63 insertions(+), 75 deletions(-) create mode 100644 Documentation/admin-guide/media/cec-drivers.rst create mode 100644 Documentation/admin-guide/media/dvb-drivers.rst create mode 100644 Documentation/admin-guide/media/v4l-drivers.rst diff --git a/Documentation/admin-guide/media/cec-drivers.rst b/Documentation/admin-guide/media/cec-drivers.rst new file mode 100644 index 0000000000000..8d9686c08df91 --- /dev/null +++ b/Documentation/admin-guide/media/cec-drivers.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0 + +================================= +CEC driver-specific documentation +================================= + +.. toctree:: + :maxdepth: 2 + + pulse8-cec diff --git a/Documentation/admin-guide/media/dvb-drivers.rst b/Documentation/admin-guide/media/dvb-drivers.rst new file mode 100644 index 0000000000000..8df637c375f9e --- /dev/null +++ b/Documentation/admin-guide/media/dvb-drivers.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0 + +======================================== +Digital TV driver-specific documentation +======================================== + +.. toctree:: + :maxdepth: 2 + + avermedia + bt8xx + lmedm04 + opera-firmware + technisat + ttusb-dec + zr364xx diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst index 05ddd49306994..6e0d2bae71543 100644 --- a/Documentation/admin-guide/media/index.rst +++ b/Documentation/admin-guide/media/index.rst @@ -28,7 +28,7 @@ The media subsystem Table of Contents .. toctree:: - :maxdepth: 5 + :maxdepth: 2 :numbered: intro @@ -40,80 +40,9 @@ The media subsystem cardlist - -.. _uapi-v4l-drivers: - -Video4Linux (V4L) driver-specific documentation -=============================================== - -.. only:: html - - .. class:: toc-title - - Table of Contents - -.. toctree:: - :maxdepth: 5 - :numbered: - - bttv - cafe_ccic - cpia2 - cx88 - davinci-vpbe - fimc - imx - imx7 - ipu3 - ivtv - meye - omap3isp - omap4_camera - philips - qcom_camss - rcar-fdp1 - saa7134 - si470x - si4713 - si476x - vimc - vivid - -Digital TV driver-specific documentation -======================================== - -.. only:: html - - .. class:: toc-title - - Table of Contents - -.. toctree:: - :maxdepth: 5 - :numbered: - - avermedia - bt8xx - lmedm04 - opera-firmware - technisat - ttusb-dec - zr364xx - -CEC driver-specific documentation -================================= - -.. only:: html - - .. class:: toc-title - - Table of Contents - -.. toctree:: - :maxdepth: 5 - :numbered: - - pulse8-cec + v4l-drivers + dvb-drivers + cec-drivers **Copyright** |copy| 1999-2020 : LinuxTV Developers diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst new file mode 100644 index 0000000000000..251cc4ede0b69 --- /dev/null +++ b/Documentation/admin-guide/media/v4l-drivers.rst @@ -0,0 +1,33 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. _uapi-v4l-drivers: + +=============================================== +Video4Linux (V4L) driver-specific documentation +=============================================== + +.. toctree:: + :maxdepth: 2 + + bttv + cafe_ccic + cpia2 + cx88 + davinci-vpbe + fimc + imx + imx7 + ipu3 + ivtv + meye + omap3isp + omap4_camera + philips + qcom_camss + rcar-fdp1 + saa7134 + si470x + si4713 + si476x + vimc + vivid -- GitLab From 19ce44f027ca6ed8c33b3a95a6c26c03d6a04448 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Wed, 22 Apr 2020 13:14:21 +0200 Subject: [PATCH 272/503] media: rkisp1: fix missing mbus.type -> mbus_type conversion There was one missing sensor->mbus.type to sensor->mbus_type conversion which broke the build. I suspect this was due to a merge conflict that was incorrectly resolved. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-isp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-isp.c b/drivers/staging/media/rkisp1/rkisp1-isp.c index 61f159e59d07a..dc2b59a0160a8 100644 --- a/drivers/staging/media/rkisp1/rkisp1-isp.c +++ b/drivers/staging/media/rkisp1/rkisp1-isp.c @@ -291,7 +291,7 @@ static int rkisp1_config_isp(struct rkisp1_device *rkisp1) if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { acq_mult = 1; if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { - if (sensor->mbus.type == V4L2_MBUS_BT656) + if (sensor->mbus_type == V4L2_MBUS_BT656) isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT_ITU656; else isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT; -- GitLab From a349d3d97ea2d532a9c2d7211272623a4f71e8d0 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Wed, 22 Apr 2020 13:14:03 +0200 Subject: [PATCH 273/503] media: MAINTAINERS: Fix Hantro, Rga and Rkvdec entries It seems recent merges introduced a couple issues here, so let's fix them all. Also, reorder Rockchip video decoder as per parse-maintainers.pl script and add linux-rockchip mailing list. Reported-by: Johan Jonker Signed-off-by: Ezequiel Garcia Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index a973a73cc2158..1c03e6a2ad279 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7460,7 +7460,7 @@ L: linux-media@vger.kernel.org L: linux-rockchip@lists.infradead.org S: Maintained F: Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml -F: Documentation/devicetree/bindings/media/rockchip-vpu.txt +F: Documentation/devicetree/bindings/media/rockchip-vpu.yaml F: drivers/staging/media/hantro/ HARD DRIVE ACTIVE PROTECTION SYSTEM (HDAPS) DRIVER @@ -14465,13 +14465,6 @@ F: Documentation/ABI/*/sysfs-driver-hid-roccat* F: drivers/hid/hid-roccat* F: include/linux/hid-roccat* -ROCKCHIP VIDEO DECODER DRIVER -M: Ezequiel Garcia -L: linux-media@vger.kernel.org -S: Maintained -F: drivers/staging/media/rkvdec/ -F: Documentation/devicetree/bindings/media/rockchip,vdec.yaml - ROCKCHIP ISP V1 DRIVER M: Helen Koike L: linux-media@vger.kernel.org @@ -14482,12 +14475,19 @@ ROCKCHIP RASTER 2D GRAPHIC ACCELERATION UNIT DRIVER M: Jacob Chen M: Ezequiel Garcia L: linux-media@vger.kernel.org +L: linux-rockchip@lists.infradead.org S: Maintained -F: Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml F: Documentation/devicetree/bindings/media/rockchip-rga.yaml -F: Documentation/devicetree/bindings/media/rockchip-vpu.yaml F: drivers/media/platform/rockchip/rga/ +ROCKCHIP VIDEO DECODER DRIVER +M: Ezequiel Garcia +L: linux-media@vger.kernel.org +L: linux-rockchip@lists.infradead.org +S: Maintained +F: drivers/staging/media/rkvdec/ +F: Documentation/devicetree/bindings/media/rockchip,vdec.yaml + ROCKER DRIVER M: Jiri Pirko L: netdev@vger.kernel.org -- GitLab From 5c98639814988647e6da17cf0d9ad905077219c4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 15:59:54 +0200 Subject: [PATCH 274/503] MAINTAINERS: reorder media attributes Some media entry attributes got out of the order after the bug was split into 3. Also, as reported by Johan, the Rockchip VPU entry also had their attributes at the wrong order. As those entries weren't merged yet upstream, let's reorder them with: ./scripts/parse-maintainers.pl --input=MAINTAINERS --output=MAINTAINERS --order Reported-by: Johan Jonker Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 1c03e6a2ad279..d633a131dcd73 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5125,14 +5125,14 @@ F: scripts/documentation-file-ref-check F: scripts/kernel-doc F: scripts/sphinx-pre-install X: Documentation/ABI/ +X: Documentation/admin-guide/media/ X: Documentation/devicetree/ +X: Documentation/driver-api/media/ X: Documentation/firmware-guide/acpi/ X: Documentation/i2c/ -X: Documentation/admin-guide/media/ -X: Documentation/userspace-api/media/ -X: Documentation/driver-api/media/ X: Documentation/power/ X: Documentation/spi/ +X: Documentation/userspace-api/media/ DOCUMENTATION SCRIPTS M: Mauro Carvalho Chehab @@ -8654,9 +8654,9 @@ INTEL IPU3 CSI-2 IMGU DRIVER M: Sakari Ailus L: linux-media@vger.kernel.org S: Maintained -F: Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst F: Documentation/admin-guide/media/ipu3.rst F: Documentation/admin-guide/media/ipu3_rcb.svg +F: Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst F: drivers/staging/media/ipu3/ INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT @@ -10453,8 +10453,8 @@ M: Philipp Zabel L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git -F: Documentation/devicetree/bindings/media/imx.txt F: Documentation/admin-guide/media/imx.rst +F: Documentation/devicetree/bindings/media/imx.txt F: drivers/staging/media/imx/ F: include/linux/imx-media.h F: include/media/imx.h @@ -10464,9 +10464,9 @@ M: Rui Miguel Silva L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git +F: Documentation/admin-guide/media/imx7.rst F: Documentation/devicetree/bindings/media/imx7-csi.txt F: Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt -F: Documentation/admin-guide/media/imx7.rst F: drivers/staging/media/imx/imx7-media-csi.c F: drivers/staging/media/imx/imx7-mipi-csis.c @@ -10612,10 +10612,10 @@ S: Maintained W: https://linuxtv.org Q: http://patchwork.kernel.org/project/linux-media/list/ T: git git://linuxtv.org/media_tree.git +F: Documentation/admin-guide/media/ F: Documentation/devicetree/bindings/media/ -X: Documentation/admin-guide/media/ -F: Documentation/userspace-api/media/ F: Documentation/driver-api/media/ +F: Documentation/userspace-api/media/ F: drivers/media/ F: drivers/staging/media/ F: include/linux/platform_data/media/ @@ -13962,8 +13962,8 @@ QUALCOMM CAMERA SUBSYSTEM DRIVER M: Todor Tomov L: linux-media@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/media/qcom,camss.txt F: Documentation/admin-guide/media/qcom_camss.rst +F: Documentation/devicetree/bindings/media/qcom,camss.txt F: drivers/media/platform/qcom/camss/ QUALCOMM CORE POWER REDUCTION (CPR) AVS DRIVER @@ -14485,8 +14485,8 @@ M: Ezequiel Garcia L: linux-media@vger.kernel.org L: linux-rockchip@lists.infradead.org S: Maintained -F: drivers/staging/media/rkvdec/ F: Documentation/devicetree/bindings/media/rockchip,vdec.yaml +F: drivers/staging/media/rkvdec/ ROCKER DRIVER M: Jiri Pirko -- GitLab From 4bdbff4da40584ec2225bb429b7c66ad54d19cda Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 22:53:12 +0200 Subject: [PATCH 275/503] media: tuners: Kconfig: add some missing VIDEO_V4L2 dependencies There are three tuners that depend on some functions inside V4L2 core: $ git grep -l -E 'v4l2_[0-9a-zA-Z_]+\(' drivers/media/tuners/ drivers/media/tuners/e4000.c drivers/media/tuners/fc2580.c drivers/media/tuners/msi001.c Make them dependent of VIDEO_V4L2, as otherwise, this would happen: on x86_64: CONFIG_VIDEO_V4L2=m CONFIG_MEDIA_TUNER_E4000=y ld: drivers/media/tuners/e4000.o: in function `e4000_remove': e4000.c:(.text+0x34): undefined reference to `v4l2_ctrl_handler_free' ld: drivers/media/tuners/e4000.o: in function `e4000_probe': e4000.c:(.text+0x16c1): undefined reference to `v4l2_ctrl_handler_init_class' ld: e4000.c:(.text+0x16eb): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x1731): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x1762): undefined reference to `v4l2_ctrl_auto_cluster' ld: e4000.c:(.text+0x178c): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x17d6): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x1804): undefined reference to `v4l2_ctrl_auto_cluster' ld: e4000.c:(.text+0x182e): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x1878): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x18a6): undefined reference to `v4l2_ctrl_auto_cluster' ld: e4000.c:(.text+0x18d0): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x191a): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x1948): undefined reference to `v4l2_ctrl_auto_cluster' ld: e4000.c:(.text+0x1972): undefined reference to `v4l2_ctrl_new_std' ld: e4000.c:(.text+0x19a6): undefined reference to `v4l2_ctrl_handler_free' ld: e4000.c:(.text+0x1a2a): undefined reference to `v4l2_i2c_subdev_init' Reported-by: Randy Dunlap Acked-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/tuners/Kconfig b/drivers/media/tuners/Kconfig index 2368b0e230e53..4605bb3775749 100644 --- a/drivers/media/tuners/Kconfig +++ b/drivers/media/tuners/Kconfig @@ -223,7 +223,7 @@ config MEDIA_TUNER_TDA18212 config MEDIA_TUNER_E4000 tristate "Elonics E4000 silicon tuner" - depends on MEDIA_SUPPORT && I2C + depends on MEDIA_SUPPORT && I2C && VIDEO_V4L2 select REGMAP_I2C default m if !MEDIA_SUBDRV_AUTOSELECT help @@ -231,7 +231,7 @@ config MEDIA_TUNER_E4000 config MEDIA_TUNER_FC2580 tristate "FCI FC2580 silicon tuner" - depends on MEDIA_SUPPORT && I2C + depends on MEDIA_SUPPORT && I2C && VIDEO_V4L2 select REGMAP_I2C default m if !MEDIA_SUBDRV_AUTOSELECT help -- GitLab From 324efc704352ad728ba5aa77dd81e4f35bebc3c2 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 16:46:07 +0200 Subject: [PATCH 276/503] media: platform: fix VIA_CAMERA dependencies As detected by a randconfig: WARNING: unmet direct dependencies detected for VIDEO_OV7670 Depends on [n]: MEDIA_SUPPORT [=y] && I2C [=y] && VIDEO_V4L2 [=n] Selected by [y]: - VIDEO_VIA_CAMERA [=y] && MEDIA_SUPPORT [=y] && MEDIA_PLATFORM_SUPPORT [=y] && V4L_PLATFORM_DRIVERS [=y] && FB_VIA [=y] There's a missing dependency on VIDEO_V4L2 for VIA_CAMERA. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index b1ac9c6c9cdbc..8110373fb0e9f 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -14,7 +14,7 @@ source "drivers/media/platform/marvell-ccic/Kconfig" config VIDEO_VIA_CAMERA tristate "VIAFB camera controller support" - depends on FB_VIA + depends on FB_VIA && VIDEO_V4L2 select VIDEOBUF2_DMA_SG select VIDEO_OV7670 help -- GitLab From 4e5552b23f9fdfdca008a1ab05725daa471f5a83 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 17:58:13 +0200 Subject: [PATCH 277/503] media: Kconfig: fix some dvb-usb-v2 dependencies There are some tuners used by a few pure DVB boards that use internally V4L2 function calls. Due to that, such drivers now depends on v4l2 core support, and can't be auto-selected if !VIDEO_V4L2: WARNING: unmet direct dependencies detected for DVB_RTL2832_SDR Depends on [n]: MEDIA_SUPPORT [=y] && MEDIA_DIGITAL_TV_SUPPORT [=y] && DVB_CORE [=y] && I2C [=y] && I2C_MUX [=y] && VIDEO_V4L2 [=n] && MEDIA_SDR_SUPPORT [=y] && USB [=y] Selected by [y]: - DVB_USB_RTL28XXU [=y] && USB [=y] && MEDIA_SUPPORT [=y] && MEDIA_USB_SUPPORT [=y] && I2C [=y] && MEDIA_DIGITAL_TV_SUPPORT [=y] && DVB_USB_V2 [=y] && I2C_MUX [=y] && MEDIA_SUBDRV_AUTOSELECT [=y] && MEDIA_SDR_SUPPORT [=y] WARNING: unmet direct dependencies detected for MEDIA_TUNER_E4000 Depends on [n]: (MEDIA_ANALOG_TV_SUPPORT [=y] || MEDIA_DIGITAL_TV_SUPPORT [=y] || MEDIA_RADIO_SUPPORT [=y] || MEDIA_SDR_SUPPORT [=y]) && MEDIA_SUPPORT [=y] && I2C [=y] && VIDEO_V4L2 [=n] Selected by [y]: - DVB_USB_RTL28XXU [=y] && USB [=y] && MEDIA_SUPPORT [=y] && MEDIA_USB_SUPPORT [=y] && I2C [=y] && MEDIA_DIGITAL_TV_SUPPORT [=y] && DVB_USB_V2 [=y] && I2C_MUX [=y] && MEDIA_SUBDRV_AUTOSELECT [=y] WARNING: unmet direct dependencies detected for MEDIA_TUNER_FC2580 Depends on [n]: (MEDIA_ANALOG_TV_SUPPORT [=y] || MEDIA_DIGITAL_TV_SUPPORT [=y] || MEDIA_RADIO_SUPPORT [=y] || MEDIA_SDR_SUPPORT [=y]) && MEDIA_SUPPORT [=y] && I2C [=y] && VIDEO_V4L2 [=n] Selected by [y]: - DVB_USB_RTL28XXU [=y] && USB [=y] && MEDIA_SUPPORT [=y] && MEDIA_USB_SUPPORT [=y] && I2C [=y] && MEDIA_DIGITAL_TV_SUPPORT [=y] && DVB_USB_V2 [=y] && I2C_MUX [=y] && MEDIA_SUBDRV_AUTOSELECT [=y] Detected via randconfig builds. Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/dvb-usb-v2/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/usb/dvb-usb-v2/Kconfig b/drivers/media/usb/dvb-usb-v2/Kconfig index ff0ae64424c43..5c75303fba9d0 100644 --- a/drivers/media/usb/dvb-usb-v2/Kconfig +++ b/drivers/media/usb/dvb-usb-v2/Kconfig @@ -38,7 +38,7 @@ config DVB_USB_AF9035 select MEDIA_TUNER_FC0011 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_MXL5007T if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_TDA18218 if MEDIA_SUBDRV_AUTOSELECT - select MEDIA_TUNER_FC2580 if MEDIA_SUBDRV_AUTOSELECT + select MEDIA_TUNER_FC2580 if (MEDIA_SUBDRV_AUTOSELECT && VIDEO_V4L2) select MEDIA_TUNER_IT913X if MEDIA_SUBDRV_AUTOSELECT help Say Y here to support the Afatech AF9035 based DVB USB receiver. @@ -137,12 +137,12 @@ config DVB_USB_RTL28XXU select DVB_CXD2841ER if MEDIA_SUBDRV_AUTOSELECT select DVB_RTL2830 select DVB_RTL2832 - select DVB_RTL2832_SDR if (MEDIA_SUBDRV_AUTOSELECT && MEDIA_SDR_SUPPORT) + select DVB_RTL2832_SDR if (MEDIA_SUBDRV_AUTOSELECT && MEDIA_SDR_SUPPORT && VIDEO_V4L2) select DVB_SI2168 if MEDIA_SUBDRV_AUTOSELECT - select MEDIA_TUNER_E4000 if MEDIA_SUBDRV_AUTOSELECT + select MEDIA_TUNER_E4000 if (MEDIA_SUBDRV_AUTOSELECT && VIDEO_V4L2) select MEDIA_TUNER_FC0012 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_FC0013 if MEDIA_SUBDRV_AUTOSELECT - select MEDIA_TUNER_FC2580 if MEDIA_SUBDRV_AUTOSELECT + select MEDIA_TUNER_FC2580 if (MEDIA_SUBDRV_AUTOSELECT && VIDEO_V4L2) select MEDIA_TUNER_MT2060 if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_MXL5005S if MEDIA_SUBDRV_AUTOSELECT select MEDIA_TUNER_QT1010 if MEDIA_SUBDRV_AUTOSELECT -- GitLab From c4ed27cfed45c16c2dd16c9fa3b883e306177e40 Mon Sep 17 00:00:00 2001 From: Sean Young Date: Thu, 16 Apr 2020 16:22:15 +0200 Subject: [PATCH 278/503] media: m88ds3103: error in set_frontend is swallowed and not reported Bail out if registers can not be updated. Addresses-Coverity-ID: 1461655 ("Code maintainability issues") Reported-by: coverity-bot Fixes: e6089feca460 ("media: m88ds3103: Add support for ds3103b demod") Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/m88ds3103.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c index bc356ac4fe5e7..f204e715bc59d 100644 --- a/drivers/media/dvb-frontends/m88ds3103.c +++ b/drivers/media/dvb-frontends/m88ds3103.c @@ -980,6 +980,8 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe) goto err; ret = m88ds3103_update_bits(dev, 0xc9, 0x08, 0x08); + if (ret) + goto err; } dev_dbg(&client->dev, "carrier offset=%d\n", -- GitLab From 408d0244421c1e76e9910b10d4f82f086b9751b3 Mon Sep 17 00:00:00 2001 From: Sean Young Date: Tue, 21 Apr 2020 12:19:27 +0200 Subject: [PATCH 279/503] media: rc: no need for decoder state if decoder not enabled One struct ir_raw_event_ctrl is allocated per raw IR device; reduce the amount allocated if not all decoders are enabled. Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/rc/rc-core-priv.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/media/rc/rc-core-priv.h b/drivers/media/rc/rc-core-priv.h index 5f36244cc34f0..1eeab277a08e2 100644 --- a/drivers/media/rc/rc-core-priv.h +++ b/drivers/media/rc/rc-core-priv.h @@ -64,6 +64,7 @@ struct ir_raw_event_ctrl { u32 bpf_sample; struct bpf_prog_array __rcu *progs; #endif +#if IS_ENABLED(CONFIG_IR_NEC_DECODER) struct nec_dec { int state; unsigned count; @@ -71,12 +72,16 @@ struct ir_raw_event_ctrl { bool is_nec_x; bool necx_repeat; } nec; +#endif +#if IS_ENABLED(CONFIG_IR_RC5_DECODER) struct rc5_dec { int state; u32 bits; unsigned count; bool is_rc5x; } rc5; +#endif +#if IS_ENABLED(CONFIG_IR_RC6_DECODER) struct rc6_dec { int state; u8 header; @@ -85,11 +90,15 @@ struct ir_raw_event_ctrl { unsigned count; unsigned wanted_bits; } rc6; +#endif +#if IS_ENABLED(CONFIG_IR_SONY_DECODER) struct sony_dec { int state; u32 bits; unsigned count; } sony; +#endif +#if IS_ENABLED(CONFIG_IR_JVC_DECODER) struct jvc_dec { int state; u16 bits; @@ -98,17 +107,23 @@ struct ir_raw_event_ctrl { bool first; bool toggle; } jvc; +#endif +#if IS_ENABLED(CONFIG_IR_SANYO_DECODER) struct sanyo_dec { int state; unsigned count; u64 bits; } sanyo; +#endif +#if IS_ENABLED(CONFIG_IR_SHARP_DECODER) struct sharp_dec { int state; unsigned count; u32 bits; unsigned int pulse_len; } sharp; +#endif +#if IS_ENABLED(CONFIG_IR_MCE_KBD_DECODER) struct mce_kbd_dec { /* locks key up timer */ spinlock_t keylock; @@ -119,11 +134,15 @@ struct ir_raw_event_ctrl { unsigned count; unsigned wanted_bits; } mce_kbd; +#endif +#if IS_ENABLED(CONFIG_IR_XMP_DECODER) struct xmp_dec { int state; unsigned count; u32 durations[16]; } xmp; +#endif +#if IS_ENABLED(CONFIG_IR_IMON_DECODER) struct imon_dec { int state; int count; @@ -131,11 +150,14 @@ struct ir_raw_event_ctrl { unsigned int bits; bool stick_keyboard; } imon; +#endif +#if IS_ENABLED(CONFIG_IR_RCMM_DECODER) struct rcmm_dec { int state; unsigned int count; u32 bits; } rcmm; +#endif }; /* Mutex for locking raw IR processing and handler change */ -- GitLab From b7ba9f34800aee62e1ffcd4386a421116e09f4fe Mon Sep 17 00:00:00 2001 From: Sean Young Date: Wed, 22 Apr 2020 21:16:46 +0200 Subject: [PATCH 280/503] media: si2157: ensure wait_status is initialized smatch reports wait_status is uninitialized, because smatch cannot assume the loop body is ever executed. Clarify the code so that wait_status is retrieved at least once. Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/tuners/si2157.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c index 6b452565dedbd..fefb2625f6558 100644 --- a/drivers/media/tuners/si2157.c +++ b/drivers/media/tuners/si2157.c @@ -327,7 +327,7 @@ static int si2157_tune_wait(struct i2c_client *client, u8 is_digital) /* wait tuner command complete */ start_time = jiffies; timeout = start_time + msecs_to_jiffies(TUN_TIMEOUT); - while (!time_after(jiffies, timeout)) { + while (1) { ret = i2c_master_recv(client, &wait_status, sizeof(wait_status)); if (ret < 0) { @@ -337,6 +337,9 @@ static int si2157_tune_wait(struct i2c_client *client, u8 is_digital) goto err_mutex_unlock; } + if (time_after(jiffies, timeout)) + break; + /* tuner done? */ if ((wait_status & 0x81) == 0x81) break; -- GitLab From 9a42a5ff3daccc37ae4dbcfb6ce5c5d95419740b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Date: Fri, 17 Apr 2020 17:09:29 +0200 Subject: [PATCH 281/503] media: vimc: cap: Report a colorspace MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The colorspace reported by a video nodes should not be V4L2_COLORSPACE_DEFAULT. Instead a default colorspace should be picked by the driver if V4L2_COLORSPACE_DEFAULT is given by userspace to {G,S,TRY}_FMT. The colorspace V4L2_COLORSPACE_SRGB is arbitrary chosen as the vimc default format to report as it's used for most webcams. Signed-off-by: Niklas Söderlund Acked-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test-drivers/vimc/vimc-capture.c | 5 ++++- drivers/media/test-drivers/vimc/vimc-debayer.c | 2 +- drivers/media/test-drivers/vimc/vimc-scaler.c | 2 +- drivers/media/test-drivers/vimc/vimc-sensor.c | 2 +- 4 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/media/test-drivers/vimc/vimc-capture.c b/drivers/media/test-drivers/vimc/vimc-capture.c index 5315c201314c9..20c2f5e281bc4 100644 --- a/drivers/media/test-drivers/vimc/vimc-capture.c +++ b/drivers/media/test-drivers/vimc/vimc-capture.c @@ -37,7 +37,7 @@ static const struct v4l2_pix_format fmt_default = { .height = 480, .pixelformat = V4L2_PIX_FMT_RGB24, .field = V4L2_FIELD_NONE, - .colorspace = V4L2_COLORSPACE_DEFAULT, + .colorspace = V4L2_COLORSPACE_SRGB, }; struct vimc_cap_buffer { @@ -107,6 +107,9 @@ static int vimc_cap_try_fmt_vid_cap(struct file *file, void *priv, vimc_colorimetry_clamp(format); + if (format->colorspace == V4L2_COLORSPACE_DEFAULT) + format->colorspace = fmt_default.colorspace; + return 0; } diff --git a/drivers/media/test-drivers/vimc/vimc-debayer.c b/drivers/media/test-drivers/vimc/vimc-debayer.c index d10aee9f84c44..c4765ebaeec28 100644 --- a/drivers/media/test-drivers/vimc/vimc-debayer.c +++ b/drivers/media/test-drivers/vimc/vimc-debayer.c @@ -48,7 +48,7 @@ static const struct v4l2_mbus_framefmt sink_fmt_default = { .height = 480, .code = MEDIA_BUS_FMT_SRGGB8_1X8, .field = V4L2_FIELD_NONE, - .colorspace = V4L2_COLORSPACE_DEFAULT, + .colorspace = V4L2_COLORSPACE_SRGB, }; static const struct vimc_deb_pix_map vimc_deb_pix_map_list[] = { diff --git a/drivers/media/test-drivers/vimc/vimc-scaler.c b/drivers/media/test-drivers/vimc/vimc-scaler.c index 465b906b74977..2231e72b24e2e 100644 --- a/drivers/media/test-drivers/vimc/vimc-scaler.c +++ b/drivers/media/test-drivers/vimc/vimc-scaler.c @@ -42,7 +42,7 @@ static const struct v4l2_mbus_framefmt sink_fmt_default = { .height = VIMC_SCA_FMT_HEIGHT_DEFAULT, .code = MEDIA_BUS_FMT_RGB888_1X24, .field = V4L2_FIELD_NONE, - .colorspace = V4L2_COLORSPACE_DEFAULT, + .colorspace = V4L2_COLORSPACE_SRGB, }; static const struct v4l2_rect crop_rect_default = { diff --git a/drivers/media/test-drivers/vimc/vimc-sensor.c b/drivers/media/test-drivers/vimc/vimc-sensor.c index 228120b3a6ddc..56e8ec14be464 100644 --- a/drivers/media/test-drivers/vimc/vimc-sensor.c +++ b/drivers/media/test-drivers/vimc/vimc-sensor.c @@ -30,7 +30,7 @@ static const struct v4l2_mbus_framefmt fmt_default = { .height = 480, .code = MEDIA_BUS_FMT_RGB888_1X24, .field = V4L2_FIELD_NONE, - .colorspace = V4L2_COLORSPACE_DEFAULT, + .colorspace = V4L2_COLORSPACE_SRGB, }; static int vimc_sen_init_cfg(struct v4l2_subdev *sd, -- GitLab From 9cc056e6064c8fd4bb43df7e7276249ddce89339 Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Sat, 18 Apr 2020 11:45:46 +0200 Subject: [PATCH 282/503] media: MAINTAINERS: adjust entries to moving CEC USB drivers Commit a81068181aad ("media: move CEC USB drivers to a separate directory") moved drivers/media/usb/{pulse8,rainshadow}-cec to drivers/media/cec/usb/{rainshadow,pulse8}, but did not adjust the entries in MAINTAINERS. Since then, ./scripts/get_maintainer.pl --self-test=patterns complains: warning: no file matches F: drivers/media/usb/pulse8-cec/* warning: no file matches F: drivers/media/usb/rainshadow-cec/* Update the MAINTAINERS entries to the new file locations. Signed-off-by: Lukas Bulwahn Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index d633a131dcd73..bf08cc4954255 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13706,7 +13706,7 @@ L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git F: Documentation/admin-guide/media/pulse8-cec.rst -F: drivers/media/usb/pulse8-cec/* +F: drivers/media/cec/usb/pulse8/ PVRUSB2 VIDEO4LINUX DRIVER M: Mike Isely @@ -14122,7 +14122,7 @@ M: Hans Verkuil L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git -F: drivers/media/usb/rainshadow-cec/* +F: drivers/media/cec/usb/rainshadow/ RALINK MIPS ARCHITECTURE M: John Crispin -- GitLab From fcab45adb853a668e9b2f653e792770399bb441a Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Mon, 20 Apr 2020 14:57:38 +0200 Subject: [PATCH 283/503] media: vidioc-reqbufs/create-bufs.rst: fix typo any others capabilities -> any other capabilities Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst | 2 +- Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst b/Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst index bd580232be101..e1afc5b504c23 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst @@ -113,7 +113,7 @@ than the number requested. - Set by the driver. If 0, then the driver doesn't support capabilities. In that case all you know is that the driver is guaranteed to support ``V4L2_MEMORY_MMAP`` and *might* support - other :c:type:`v4l2_memory` types. It will not support any others + other :c:type:`v4l2_memory` types. It will not support any other capabilities. See :ref:`here ` for a list of the capabilities. diff --git a/Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst b/Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst index 79884bb4893b6..b6d52083707b4 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst @@ -104,7 +104,7 @@ aborting or finishing any DMA in progress, an implicit - Set by the driver. If 0, then the driver doesn't support capabilities. In that case all you know is that the driver is guaranteed to support ``V4L2_MEMORY_MMAP`` and *might* support - other :c:type:`v4l2_memory` types. It will not support any others + other :c:type:`v4l2_memory` types. It will not support any other capabilities. If you want to query the capabilities with a minimum of side-effects, -- GitLab From e5ad7db4b2f35aaed796669b47e24c6d79cab3d0 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 21 Apr 2020 11:23:41 +0200 Subject: [PATCH 284/503] media: cec-gpio: handle gpiod_get_value errors correctly gpiod_get_value() can return negative values if an error occurs. In several places this error code was ignored. Ensure that errors codes are handled correctly throughout the CEC pin framework and CEC pin drivers. The return code of the cec_pin_ops read() callback had to be changed from 'bool' to 'int', which mean the prototype of that callback in the sun4i drm driver also had to be changed. Signed-off-by: Hans Verkuil Reported-by: Dan Carpenter Signed-off-by: Mauro Carvalho Chehab --- drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 2 +- drivers/media/cec/platform/cec-gpio/cec-gpio.c | 18 +++++++++++------- include/media/cec-pin.h | 16 +++++++--------- 3 files changed, 19 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c index 68d4644ac2dcc..126e1517ade2f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c @@ -282,7 +282,7 @@ static const struct drm_connector_funcs sun4i_hdmi_connector_funcs = { }; #ifdef CONFIG_DRM_SUN4I_HDMI_CEC -static bool sun4i_hdmi_cec_pin_read(struct cec_adapter *adap) +static int sun4i_hdmi_cec_pin_read(struct cec_adapter *adap) { struct sun4i_hdmi *hdmi = cec_get_drvdata(adap); diff --git a/drivers/media/cec/platform/cec-gpio/cec-gpio.c b/drivers/media/cec/platform/cec-gpio/cec-gpio.c index 42d2c2cd9a786..c8c4efc83f5f0 100644 --- a/drivers/media/cec/platform/cec-gpio/cec-gpio.c +++ b/drivers/media/cec/platform/cec-gpio/cec-gpio.c @@ -31,12 +31,12 @@ struct cec_gpio { ktime_t v5_ts; }; -static bool cec_gpio_read(struct cec_adapter *adap) +static int cec_gpio_read(struct cec_adapter *adap) { struct cec_gpio *cec = cec_get_drvdata(adap); if (cec->cec_is_low) - return false; + return 0; return gpiod_get_value(cec->cec_gpio); } @@ -71,9 +71,10 @@ static irqreturn_t cec_hpd_gpio_irq_handler_thread(int irq, void *priv) static irqreturn_t cec_5v_gpio_irq_handler(int irq, void *priv) { struct cec_gpio *cec = priv; - bool is_high = gpiod_get_value(cec->v5_gpio); + int val = gpiod_get_value(cec->v5_gpio); + bool is_high = val > 0; - if (is_high == cec->v5_is_high) + if (val < 0 || is_high == cec->v5_is_high) return IRQ_HANDLED; cec->v5_ts = ktime_get(); cec->v5_is_high = is_high; @@ -91,9 +92,10 @@ static irqreturn_t cec_5v_gpio_irq_handler_thread(int irq, void *priv) static irqreturn_t cec_hpd_gpio_irq_handler(int irq, void *priv) { struct cec_gpio *cec = priv; - bool is_high = gpiod_get_value(cec->hpd_gpio); + int val = gpiod_get_value(cec->hpd_gpio); + bool is_high = val > 0; - if (is_high == cec->hpd_is_high) + if (val < 0 || is_high == cec->hpd_is_high) return IRQ_HANDLED; cec->hpd_ts = ktime_get(); cec->hpd_is_high = is_high; @@ -103,8 +105,10 @@ static irqreturn_t cec_hpd_gpio_irq_handler(int irq, void *priv) static irqreturn_t cec_gpio_irq_handler(int irq, void *priv) { struct cec_gpio *cec = priv; + int val = gpiod_get_value(cec->cec_gpio); - cec_pin_changed(cec->adap, gpiod_get_value(cec->cec_gpio)); + if (val >= 0) + cec_pin_changed(cec->adap, val > 0); return IRQ_HANDLED; } diff --git a/include/media/cec-pin.h b/include/media/cec-pin.h index 88c8b016eb09f..483bc4769fe94 100644 --- a/include/media/cec-pin.h +++ b/include/media/cec-pin.h @@ -13,7 +13,8 @@ /** * struct cec_pin_ops - low-level CEC pin operations - * @read: read the CEC pin. Return true if high, false if low. + * @read: read the CEC pin. Returns > 0 if high, 0 if low, or an error + * if negative. * @low: drive the CEC pin low. * @high: stop driving the CEC pin. The pull-up will drive the pin * high, unless someone else is driving the pin low. @@ -22,13 +23,10 @@ * @free: optional. Free any allocated resources. Called when the * adapter is deleted. * @status: optional, log status information. - * @read_hpd: read the HPD pin. Return true if high, false if low or - * an error if negative. If NULL or -ENOTTY is returned, - * then this is not supported. - * @read_5v: read the 5V pin. Return true if high, false if low or - * an error if negative. If NULL or -ENOTTY is returned, - * then this is not supported. - * + * @read_hpd: optional. Read the HPD pin. Returns > 0 if high, 0 if low or + * an error if negative. + * @read_5v: optional. Read the 5V pin. Returns > 0 if high, 0 if low or + * an error if negative. * @received: optional. High-level CEC message callback. Allows the driver * to process CEC messages. * @@ -36,7 +34,7 @@ * cec pin framework to manipulate the CEC pin. */ struct cec_pin_ops { - bool (*read)(struct cec_adapter *adap); + int (*read)(struct cec_adapter *adap); void (*low)(struct cec_adapter *adap); void (*high)(struct cec_adapter *adap); bool (*enable_irq)(struct cec_adapter *adap); -- GitLab From e51759f56d314d28c25be7606b03791f048e44c7 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Thu, 23 Apr 2020 13:42:32 +0200 Subject: [PATCH 285/503] media: v4l2-ctrls.h: clarify the p_def argument of v4l2_ctrl_new_std_compound It was not sufficiently clear how to create and use p_def. Improve the documentation. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-ctrls.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index 75a8daacb4c4a..757a713bad412 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h @@ -685,7 +685,9 @@ struct v4l2_ctrl *v4l2_ctrl_new_std_menu_items(struct v4l2_ctrl_handler *hdl, * @p_def: The control's default value. * * Sames as v4l2_ctrl_new_std(), but with support to compound controls, thanks - * to the @p_def field. + * to the @p_def field. Use v4l2_ctrl_ptr_create() to create @p_def from a + * pointer. Use v4l2_ctrl_ptr_create(NULL) if the default value of the + * compound control should be all zeroes. * */ struct v4l2_ctrl *v4l2_ctrl_new_std_compound(struct v4l2_ctrl_handler *hdl, -- GitLab From cb1c05c89b1f0b5ee24b65fbad3811127f3205d0 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Tue, 31 Mar 2020 16:54:28 +0200 Subject: [PATCH 286/503] media: venus: core: Add missing mutex destroy This adds missing mutex_destroy in remove method of venus core driver. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index 4395cb96fb043..f8b9a732bc65c 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -335,6 +335,7 @@ static int venus_remove(struct platform_device *pdev) v4l2_device_unregister(&core->v4l2_dev); mutex_destroy(&core->pm_lock); + mutex_destroy(&core->lock); return ret; } -- GitLab From 82223aa54bb7075e9bf24b64720c18361ed190a1 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Tue, 31 Mar 2020 17:37:02 +0200 Subject: [PATCH 287/503] media: venus: core: Fix mutex destroy in remove The hfi_destroy function is called too early in remove method. It destroys a mutex which is used later in the .remove from pmruntime. Solve the issue by moving hfi_destroy after last usage of the mutex. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index f8b9a732bc65c..afd76bcd99783 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -318,7 +318,6 @@ static int venus_remove(struct platform_device *pdev) ret = hfi_core_deinit(core, true); WARN_ON(ret); - hfi_destroy(core); venus_shutdown(core); of_platform_depopulate(dev); @@ -330,6 +329,8 @@ static int venus_remove(struct platform_device *pdev) if (pm_ops->core_put) pm_ops->core_put(dev); + hfi_destroy(core); + icc_put(core->video_path); icc_put(core->cpucfg_path); -- GitLab From 18cf8ba1d3e6faf8db8c6e49f4014b657ac96888 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Tue, 31 Mar 2020 17:42:52 +0200 Subject: [PATCH 288/503] media: venus: core: Constify codec frequency data array The array is not changed in the code, so make it const. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index afd76bcd99783..203c6538044fb 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -456,7 +456,7 @@ static const struct freq_tbl sdm845_freq_table[] = { { 244800, 100000000 }, /* 1920x1080@30 */ }; -static struct codec_freq_data sdm845_codec_freq_data[] = { +static const struct codec_freq_data sdm845_codec_freq_data[] = { { V4L2_PIX_FMT_H264, VIDC_SESSION_TYPE_ENC, 675, 10 }, { V4L2_PIX_FMT_HEVC, VIDC_SESSION_TYPE_ENC, 675, 10 }, { V4L2_PIX_FMT_VP8, VIDC_SESSION_TYPE_ENC, 675, 10 }, -- GitLab From 0febf9236970b5282588147961b068b889a77563 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Tue, 31 Mar 2020 17:47:38 +0200 Subject: [PATCH 289/503] media: venus: helpers: Done buffers per queue type Currently calling venus_helper_buffers_done() will return buffers to user for both capture and output queues in the same call. This is wrong because both queues are really separate and calling stop_streaming on one queue shouldn't return buffers for the other. Solve this by add a new queue type argument and fix the clients of the helper function. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/helpers.c | 18 ++++++++++++------ drivers/media/platform/qcom/venus/helpers.h | 2 +- drivers/media/platform/qcom/venus/vdec.c | 5 ++--- drivers/media/platform/qcom/venus/venc.c | 2 +- 4 files changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/qcom/venus/helpers.c b/drivers/media/platform/qcom/venus/helpers.c index bcc6038040412..0143af7822b22 100644 --- a/drivers/media/platform/qcom/venus/helpers.c +++ b/drivers/media/platform/qcom/venus/helpers.c @@ -1129,15 +1129,18 @@ void venus_helper_vb2_buf_queue(struct vb2_buffer *vb) } EXPORT_SYMBOL_GPL(venus_helper_vb2_buf_queue); -void venus_helper_buffers_done(struct venus_inst *inst, +void venus_helper_buffers_done(struct venus_inst *inst, unsigned int type, enum vb2_buffer_state state) { struct vb2_v4l2_buffer *buf; - while ((buf = v4l2_m2m_src_buf_remove(inst->m2m_ctx))) - v4l2_m2m_buf_done(buf, state); - while ((buf = v4l2_m2m_dst_buf_remove(inst->m2m_ctx))) - v4l2_m2m_buf_done(buf, state); + if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { + while ((buf = v4l2_m2m_src_buf_remove(inst->m2m_ctx))) + v4l2_m2m_buf_done(buf, state); + } else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { + while ((buf = v4l2_m2m_dst_buf_remove(inst->m2m_ctx))) + v4l2_m2m_buf_done(buf, state); + } } EXPORT_SYMBOL_GPL(venus_helper_buffers_done); @@ -1168,7 +1171,10 @@ void venus_helper_vb2_stop_streaming(struct vb2_queue *q) INIT_LIST_HEAD(&inst->registeredbufs); } - venus_helper_buffers_done(inst, VB2_BUF_STATE_ERROR); + venus_helper_buffers_done(inst, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, + VB2_BUF_STATE_ERROR); + venus_helper_buffers_done(inst, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, + VB2_BUF_STATE_ERROR); if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) inst->streamon_out = 0; diff --git a/drivers/media/platform/qcom/venus/helpers.h b/drivers/media/platform/qcom/venus/helpers.h index b648755640648..8fbbda12a4fe7 100644 --- a/drivers/media/platform/qcom/venus/helpers.h +++ b/drivers/media/platform/qcom/venus/helpers.h @@ -14,7 +14,7 @@ struct venus_core; bool venus_helper_check_codec(struct venus_inst *inst, u32 v4l2_pixfmt); struct vb2_v4l2_buffer *venus_helper_find_buf(struct venus_inst *inst, unsigned int type, u32 idx); -void venus_helper_buffers_done(struct venus_inst *inst, +void venus_helper_buffers_done(struct venus_inst *inst, unsigned int type, enum vb2_buffer_state state); int venus_helper_vb2_buf_init(struct vb2_buffer *vb); int venus_helper_vb2_buf_prepare(struct vb2_buffer *vb); diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index e8e1ecf7cf4a4..7d093accbd596 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -1044,7 +1044,7 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) put_power: vdec_pm_put(inst, false); error: - venus_helper_buffers_done(inst, VB2_BUF_STATE_QUEUED); + venus_helper_buffers_done(inst, q->type, VB2_BUF_STATE_QUEUED); mutex_unlock(&inst->lock); return ret; } @@ -1071,7 +1071,6 @@ static int vdec_stop_capture(struct venus_inst *inst) break; case VENUS_DEC_STATE_DRC: ret = hfi_session_flush(inst, HFI_FLUSH_OUTPUT); - vdec_cancel_dst_buffers(inst); inst->codec_state = VENUS_DEC_STATE_CAPTURE_SETUP; INIT_LIST_HEAD(&inst->registeredbufs); venus_helper_free_dpb_bufs(inst); @@ -1117,7 +1116,7 @@ static void vdec_stop_streaming(struct vb2_queue *q) else ret = vdec_stop_output(inst); - venus_helper_buffers_done(inst, VB2_BUF_STATE_ERROR); + venus_helper_buffers_done(inst, q->type, VB2_BUF_STATE_ERROR); if (ret) goto unlock; diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c index 9981a2a27c90c..3d8431dc14c45 100644 --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c @@ -1018,7 +1018,7 @@ static int venc_start_streaming(struct vb2_queue *q, unsigned int count) deinit_sess: hfi_session_deinit(inst); bufs_done: - venus_helper_buffers_done(inst, VB2_BUF_STATE_QUEUED); + venus_helper_buffers_done(inst, q->type, VB2_BUF_STATE_QUEUED); if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) inst->streamon_out = 0; else -- GitLab From 51df3c81ba10b00f4da81225310a3503b0583062 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Tue, 31 Mar 2020 18:19:51 +0200 Subject: [PATCH 290/503] media: venus: vdec: Mark flushed buffers with error state Once the hfi_session_flush is issued by the vdec all queued buffers to firmware should be returned to the v4l driver. Some of those buffers are not processed at the time of flush command, those buffers has filled len zero (no data). Catch that in buffer_done callback and mark not filled capture buffers with error state so that client can discard them. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/vdec.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 7d093accbd596..5823537b3131d 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -1241,6 +1241,9 @@ static void vdec_buf_done(struct venus_inst *inst, unsigned int buf_type, if (inst->codec_state == VENUS_DEC_STATE_DRAIN) inst->codec_state = VENUS_DEC_STATE_STOPPED; } + + if (!bytesused) + state = VB2_BUF_STATE_ERROR; } else { vbuf->sequence = inst->sequence_out++; } -- GitLab From bc3d870e414b42d72cd386aa20a4fc3612e4feb7 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Fri, 3 Apr 2020 15:10:13 +0200 Subject: [PATCH 291/503] media: venus: vdec: Init registered list unconditionally Presently the list initialization is done only in dynamic-resolution-change state, which leads to list corruptions and use-after-free. Init list_head unconditionally in vdec_stop_capture called by vb2 stop_streaming without takeing into account current codec state. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/vdec.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 5823537b3131d..f23cbd812ef44 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -1072,13 +1072,14 @@ static int vdec_stop_capture(struct venus_inst *inst) case VENUS_DEC_STATE_DRC: ret = hfi_session_flush(inst, HFI_FLUSH_OUTPUT); inst->codec_state = VENUS_DEC_STATE_CAPTURE_SETUP; - INIT_LIST_HEAD(&inst->registeredbufs); venus_helper_free_dpb_bufs(inst); break; default: - return 0; + break; } + INIT_LIST_HEAD(&inst->registeredbufs); + return ret; } -- GitLab From 85872f861d4cc535b0dbfd0a9062bdbdcbed20c3 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Fri, 3 Apr 2020 17:56:29 +0200 Subject: [PATCH 292/503] media: venus: Mark last capture buffer According to stateful Codec API the decoder will process all remaining buffers from before the source change event in dynamic-resolution-change state and mark the last buffer with V4L2_BUF_FLAG_LAST. In Venus case the firmware doesn't mark that last buffer and some mechanism have to be created in v4l decoder driver. Fortunately the firmware interface (HFI) claims that the decoder output buffers will be returned to v4l decoder driver before it send the insufficient event. In order to do that we save last queued in the driver capture buffer in the event_notify and issue flush on output firmware buffers queue. Once the saved buffer is returned (as a result of flush command) we mark it as LAST. For all that possible we extend HFI flush command with one more argument and one more flush_done HFI driver callback. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/core.h | 5 ++- drivers/media/platform/qcom/venus/hfi.c | 10 +++-- drivers/media/platform/qcom/venus/hfi.h | 3 +- drivers/media/platform/qcom/venus/hfi_msgs.c | 2 + drivers/media/platform/qcom/venus/vdec.c | 45 +++++++++++++++++--- 5 files changed, 54 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 3ab644a397863..7118612673c97 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -261,7 +261,8 @@ enum venus_dec_state { VENUS_DEC_STATE_SEEK = 4, VENUS_DEC_STATE_DRAIN = 5, VENUS_DEC_STATE_DECODING = 6, - VENUS_DEC_STATE_DRC = 7 + VENUS_DEC_STATE_DRC = 7, + VENUS_DEC_STATE_DRC_FLUSH_DONE = 8, }; struct venus_ts_metadata { @@ -326,6 +327,7 @@ struct venus_ts_metadata { * @priv: a private for HFI operations callbacks * @session_type: the type of the session (decoder or encoder) * @hprop: a union used as a holder by get property + * @last_buf: last capture buffer for dynamic-resoluton-change */ struct venus_inst { struct list_head list; @@ -387,6 +389,7 @@ struct venus_inst { union hfi_get_property hprop; unsigned int core_acquired: 1; unsigned int bit_depth; + struct vb2_buffer *last_buf; }; #define IS_V1(core) ((core)->res->hfi_version == HFI_VERSION_1XX) diff --git a/drivers/media/platform/qcom/venus/hfi.c b/drivers/media/platform/qcom/venus/hfi.c index 3d8b1284d1f35..a211eb93e0f92 100644 --- a/drivers/media/platform/qcom/venus/hfi.c +++ b/drivers/media/platform/qcom/venus/hfi.c @@ -382,7 +382,7 @@ int hfi_session_unload_res(struct venus_inst *inst) } EXPORT_SYMBOL_GPL(hfi_session_unload_res); -int hfi_session_flush(struct venus_inst *inst, u32 type) +int hfi_session_flush(struct venus_inst *inst, u32 type, bool block) { const struct hfi_ops *ops = inst->core->ops; int ret; @@ -393,9 +393,11 @@ int hfi_session_flush(struct venus_inst *inst, u32 type) if (ret) return ret; - ret = wait_session_msg(inst); - if (ret) - return ret; + if (block) { + ret = wait_session_msg(inst); + if (ret) + return ret; + } return 0; } diff --git a/drivers/media/platform/qcom/venus/hfi.h b/drivers/media/platform/qcom/venus/hfi.h index 855822c9f39b7..62c3152914848 100644 --- a/drivers/media/platform/qcom/venus/hfi.h +++ b/drivers/media/platform/qcom/venus/hfi.h @@ -102,6 +102,7 @@ struct hfi_inst_ops { u32 hfi_flags, u64 timestamp_us); void (*event_notify)(struct venus_inst *inst, u32 event, struct hfi_event_data *data); + void (*flush_done)(struct venus_inst *inst); }; struct hfi_ops { @@ -161,7 +162,7 @@ int hfi_session_continue(struct venus_inst *inst); int hfi_session_abort(struct venus_inst *inst); int hfi_session_load_res(struct venus_inst *inst); int hfi_session_unload_res(struct venus_inst *inst); -int hfi_session_flush(struct venus_inst *inst, u32 type); +int hfi_session_flush(struct venus_inst *inst, u32 type, bool block); int hfi_session_set_buffers(struct venus_inst *inst, struct hfi_buffer_desc *bd); int hfi_session_unset_buffers(struct venus_inst *inst, diff --git a/drivers/media/platform/qcom/venus/hfi_msgs.c b/drivers/media/platform/qcom/venus/hfi_msgs.c index 04ef2286efc65..279a9d6fe737f 100644 --- a/drivers/media/platform/qcom/venus/hfi_msgs.c +++ b/drivers/media/platform/qcom/venus/hfi_msgs.c @@ -439,6 +439,8 @@ static void hfi_session_flush_done(struct venus_core *core, inst->error = pkt->error_type; complete(&inst->done); + if (inst->ops->flush_done) + inst->ops->flush_done(inst); } static void hfi_session_etb_done(struct venus_core *core, diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index f23cbd812ef44..527944c822b51 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -906,7 +906,7 @@ static int vdec_start_capture(struct venus_inst *inst) return 0; reconfigure: - ret = hfi_session_flush(inst, HFI_FLUSH_OUTPUT); + ret = hfi_session_flush(inst, HFI_FLUSH_OUTPUT, true); if (ret) return ret; @@ -1063,14 +1063,16 @@ static int vdec_stop_capture(struct venus_inst *inst) switch (inst->codec_state) { case VENUS_DEC_STATE_DECODING: - ret = hfi_session_flush(inst, HFI_FLUSH_ALL); + ret = hfi_session_flush(inst, HFI_FLUSH_ALL, true); /* fallthrough */ case VENUS_DEC_STATE_DRAIN: vdec_cancel_dst_buffers(inst); inst->codec_state = VENUS_DEC_STATE_STOPPED; break; case VENUS_DEC_STATE_DRC: - ret = hfi_session_flush(inst, HFI_FLUSH_OUTPUT); + WARN_ON(1); + fallthrough; + case VENUS_DEC_STATE_DRC_FLUSH_DONE: inst->codec_state = VENUS_DEC_STATE_CAPTURE_SETUP; venus_helper_free_dpb_bufs(inst); break; @@ -1091,12 +1093,12 @@ static int vdec_stop_output(struct venus_inst *inst) case VENUS_DEC_STATE_DECODING: case VENUS_DEC_STATE_DRAIN: case VENUS_DEC_STATE_STOPPED: - ret = hfi_session_flush(inst, HFI_FLUSH_ALL); + ret = hfi_session_flush(inst, HFI_FLUSH_ALL, true); inst->codec_state = VENUS_DEC_STATE_SEEK; break; case VENUS_DEC_STATE_INIT: case VENUS_DEC_STATE_CAPTURE_SETUP: - ret = hfi_session_flush(inst, HFI_FLUSH_INPUT); + ret = hfi_session_flush(inst, HFI_FLUSH_INPUT, true); break; default: break; @@ -1234,6 +1236,13 @@ static void vdec_buf_done(struct venus_inst *inst, unsigned int buf_type, vb->timestamp = timestamp_us * NSEC_PER_USEC; vbuf->sequence = inst->sequence_cap++; + if (inst->last_buf == vb) { + inst->last_buf = NULL; + vbuf->flags |= V4L2_BUF_FLAG_LAST; + vb2_set_plane_payload(vb, 0, 0); + vb->timestamp = 0; + } + if (vbuf->flags & V4L2_BUF_FLAG_LAST) { const struct v4l2_event ev = { .type = V4L2_EVENT_EOS }; @@ -1311,6 +1320,25 @@ static void vdec_event_change(struct venus_inst *inst, } } + /* + * The assumption is that the firmware have to return the last buffer + * before this event is received in the v4l2 driver. Also the firmware + * itself doesn't mark the last decoder output buffer with HFI EOS flag. + */ + + if (!sufficient && inst->codec_state == VENUS_DEC_STATE_DRC) { + struct vb2_v4l2_buffer *last; + int ret; + + last = v4l2_m2m_last_dst_buf(inst->m2m_ctx); + if (last) + inst->last_buf = &last->vb2_buf; + + ret = hfi_session_flush(inst, HFI_FLUSH_OUTPUT, false); + if (ret) + dev_dbg(dev, "flush output error %d\n", ret); + } + inst->reconfig = true; v4l2_event_queue_fh(&inst->fh, &ev); wake_up(&inst->reconf_wait); @@ -1351,9 +1379,16 @@ static void vdec_event_notify(struct venus_inst *inst, u32 event, } } +static void vdec_flush_done(struct venus_inst *inst) +{ + if (inst->codec_state == VENUS_DEC_STATE_DRC) + inst->codec_state = VENUS_DEC_STATE_DRC_FLUSH_DONE; +} + static const struct hfi_inst_ops vdec_hfi_ops = { .buf_done = vdec_buf_done, .event_notify = vdec_event_notify, + .flush_done = vdec_flush_done, }; static void vdec_inst_init(struct venus_inst *inst) -- GitLab From 4470ff693833ad2cf06d4d07067b2e6a2458c6c1 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Sat, 18 Apr 2020 11:06:22 +0200 Subject: [PATCH 293/503] media: venus: venc,vdec: Return EBUSY on S_FMT while streaming According to the v4l spec s_fmt must return EBUSY while the particular queue is streaming. Add such check in encoder and decoder s_fmt methods. Signed-off-by: Stanimir Varbanov Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/qcom/venus/vdec.c | 8 ++++++++ drivers/media/platform/qcom/venus/venc.c | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 527944c822b51..7c4c483d54389 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -276,6 +276,14 @@ static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f) const struct venus_format *fmt; struct v4l2_format format; u32 pixfmt_out = 0, pixfmt_cap = 0; + struct vb2_queue *q; + + q = v4l2_m2m_get_vq(inst->m2m_ctx, f->type); + if (!q) + return -EINVAL; + + if (vb2_is_busy(q)) + return -EBUSY; orig_pixmp = *pixmp; diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c index 3d8431dc14c45..feed648550d19 100644 --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c @@ -357,6 +357,14 @@ static int venc_s_fmt(struct file *file, void *fh, struct v4l2_format *f) const struct venus_format *fmt; struct v4l2_format format; u32 pixfmt_out = 0, pixfmt_cap = 0; + struct vb2_queue *q; + + q = v4l2_m2m_get_vq(inst->m2m_ctx, f->type); + if (!q) + return -EINVAL; + + if (vb2_is_busy(q)) + return -EBUSY; orig_pixmp = *pixmp; -- GitLab From 735a02f1bbc2c5e6e9cdbf0222948ff03ff7ab2d Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Sat, 11 Apr 2020 19:37:10 +0200 Subject: [PATCH 294/503] media: staging: ipu3: Fix stale list entries on parameter queue failure When queuing parameters fails, current code bails out without deleting the corresponding vb2 buffer from the driver buffer list, but the buffer is returned to vb2. This leads to stale list entries and a crash when the driver stops streaming: [ 224.935561] ipu3-imgu 0000:00:05.0: set parameters failed. [ 224.998932] ipu3-imgu 0000:00:05.0: set parameters failed. [ 225.064430] ipu3-imgu 0000:00:05.0: set parameters failed. [ 225.128534] ipu3-imgu 0000:00:05.0: set parameters failed. [ 225.194945] ipu3-imgu 0000:00:05.0: set parameters failed. [ 225.360363] ------------[ cut here ]------------ [ 225.360372] WARNING: CPU: 0 PID: 6704 at drivers/media/common/videobuf2/videobuf2-core.c:927 vb2_buffer_done+0x20f/0x21a [videobuf2_common] [ 225.360374] Modules linked in: snd_seq_dummy snd_seq snd_seq_device veth bridge stp llc tun nf_nat_tftp nf_conntrack_tftp nf_nat_ftp nf_conntrack_ftp esp6 ah6 ip6t_REJECT ip6t_ipv6header cmac rfcomm uinput ipu3_imgu(C) ipu3_cio2 iova videobuf2_v4l2 videobuf2_common videobuf2_dma_sg videobuf2_memops ov13858 ov5670 v4l2_fwnode dw9714 acpi_als xt_MASQUERADE fuse iio_trig_sysfs cros_ec_sensors_ring cros_ec_light_prox cros_ec_sensors cros_ec_sensors_core industrialio_triggered_buffer kfifo_buf industrialio cros_ec_sensorsupport cdc_ether btusb btrtl btintel btbcm usbnet bluetooth ecdh_generic ecc hid_google_hammer iwlmvm iwl7000_mac80211 r8152 mii lzo_rle lzo_compress iwlwifi zram cfg80211 joydev [ 225.360400] CPU: 0 PID: 6704 Comm: CameraDeviceOps Tainted: G C 5.4.30 #5 [ 225.360402] Hardware name: HP Soraka/Soraka, BIOS Google_Soraka.10431.106.0 12/03/2019 [ 225.360405] RIP: 0010:vb2_buffer_done+0x20f/0x21a [videobuf2_common] [ 225.360408] Code: 5e 41 5f 5d e9 e0 16 5a d4 41 8b 55 08 48 c7 c7 8f 8b 5c c0 48 c7 c6 36 9a 5c c0 44 89 f9 31 c0 e8 a5 1c 5b d4 e9 53 fe ff ff <0f> 0b eb a3 e8 12 d7 43 d4 eb 97 0f 1f 44 00 00 55 48 89 e5 41 56 [ 225.360410] RSP: 0018:ffff9468ab32fba8 EFLAGS: 00010297 [ 225.360412] RAX: ffff8aa7a51577a8 RBX: dead000000000122 RCX: ffff8aa7a51577a8 [ 225.360414] RDX: 0000000000000000 RSI: 0000000000000006 RDI: ffff8aa7a5157400 [ 225.360416] RBP: ffff9468ab32fbd8 R08: ffff8aa64e47e600 R09: 0000000000000000 [ 225.360418] R10: 0000000000000000 R11: ffffffffc06036e6 R12: dead000000000100 [ 225.360420] R13: ffff8aa7820f1940 R14: ffff8aa7a51577a8 R15: 0000000000000006 [ 225.360422] FS: 00007c1146ffd700(0000) GS:ffff8aa7baa00000(0000) knlGS:0000000000000000 [ 225.360424] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 225.360426] CR2: 00007aea3473a000 CR3: 00000000537d6004 CR4: 00000000003606f0 [ 225.360427] Call Trace: [ 225.360434] imgu_return_all_buffers+0x6f/0x8e [ipu3_imgu] [ 225.360438] imgu_vb2_stop_streaming+0xd6/0xf0 [ipu3_imgu] [ 225.360441] __vb2_queue_cancel+0x33/0x22d [videobuf2_common] [ 225.360443] vb2_core_streamoff+0x16/0x78 [videobuf2_common] [ 225.360448] __video_do_ioctl+0x33d/0x42a [ 225.360452] video_usercopy+0x34a/0x615 [ 225.360455] ? video_ioctl2+0x16/0x16 [ 225.360458] v4l2_ioctl+0x46/0x53 [ 225.360462] do_vfs_ioctl+0x50a/0x787 [ 225.360465] ksys_ioctl+0x58/0x83 [ 225.360468] __x64_sys_ioctl+0x1a/0x1e [ 225.360470] do_syscall_64+0x54/0x68 [ 225.360474] entry_SYSCALL_64_after_hwframe+0x44/0xa9 [ 225.360476] RIP: 0033:0x7c118030f497 [ 225.360479] Code: 8a 66 90 48 8b 05 d1 d9 2b 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d a1 d9 2b 00 f7 d8 64 89 01 48 [ 225.360480] RSP: 002b:00007c1146ffa5a8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 225.360483] RAX: ffffffffffffffda RBX: 00007c1140010018 RCX: 00007c118030f497 [ 225.360484] RDX: 00007c114001019c RSI: 0000000040045613 RDI: 000000000000004c [ 225.360486] RBP: 00007c1146ffa700 R08: 00007c1140010048 R09: 0000000000000000 [ 225.360488] R10: 0000000000000000 R11: 0000000000000246 R12: 00007c11400101b0 [ 225.360489] R13: 00007c1140010200 R14: 00007c1140010048 R15: 0000000000000001 [ 225.360492] ---[ end trace 73625ecfbd1c930e ]--- [ 225.360498] general protection fault: 0000 [#1] PREEMPT SMP PTI [ 225.360501] CPU: 0 PID: 6704 Comm: CameraDeviceOps Tainted: G WC 5.4.30 #5 [ 225.360502] Hardware name: HP Soraka/Soraka, BIOS Google_Soraka.10431.106.0 12/03/2019 [ 225.360505] RIP: 0010:imgu_return_all_buffers+0x52/0x8e [ipu3_imgu] [ 225.360507] Code: d4 49 8b 85 70 0a 00 00 49 81 c5 70 0a 00 00 49 39 c5 74 3b 49 bc 00 01 00 00 00 00 ad de 49 8d 5c 24 22 4c 8b 30 48 8b 48 08 <49> 89 4e 08 4c 89 31 4c 89 20 48 89 58 08 48 8d b8 58 fc ff ff 44 [ 225.360509] RSP: 0018:ffff9468ab32fbe8 EFLAGS: 00010293 [ 225.360511] RAX: ffff8aa7a51577a8 RBX: dead000000000122 RCX: dead000000000122 [ 225.360512] RDX: 0000000000000000 RSI: 0000000000000006 RDI: ffff8aa7a5157400 [ 225.360514] RBP: ffff9468ab32fc18 R08: ffff8aa64e47e600 R09: 0000000000000000 [ 225.360515] R10: 0000000000000000 R11: ffffffffc06036e6 R12: dead000000000100 [ 225.360517] R13: ffff8aa7820f1940 R14: dead000000000100 R15: 0000000000000006 [ 225.360519] FS: 00007c1146ffd700(0000) GS:ffff8aa7baa00000(0000) knlGS:0000000000000000 [ 225.360521] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 225.360523] CR2: 00007aea3473a000 CR3: 00000000537d6004 CR4: 00000000003606f0 [ 225.360525] Call Trace: [ 225.360528] imgu_vb2_stop_streaming+0xd6/0xf0 [ipu3_imgu] [ 225.360531] __vb2_queue_cancel+0x33/0x22d [videobuf2_common] [ 225.360534] vb2_core_streamoff+0x16/0x78 [videobuf2_common] [ 225.360537] __video_do_ioctl+0x33d/0x42a [ 225.360540] video_usercopy+0x34a/0x615 [ 225.360542] ? video_ioctl2+0x16/0x16 [ 225.360546] v4l2_ioctl+0x46/0x53 [ 225.360548] do_vfs_ioctl+0x50a/0x787 [ 225.360551] ksys_ioctl+0x58/0x83 [ 225.360554] __x64_sys_ioctl+0x1a/0x1e [ 225.360556] do_syscall_64+0x54/0x68 [ 225.360559] entry_SYSCALL_64_after_hwframe+0x44/0xa9 [ 225.360561] RIP: 0033:0x7c118030f497 [ 225.360563] Code: 8a 66 90 48 8b 05 d1 d9 2b 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d a1 d9 2b 00 f7 d8 64 89 01 48 [ 225.360565] RSP: 002b:00007c1146ffa5a8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 225.360567] RAX: ffffffffffffffda RBX: 00007c1140010018 RCX: 00007c118030f497 [ 225.360569] RDX: 00007c114001019c RSI: 0000000040045613 RDI: 000000000000004c [ 225.360570] RBP: 00007c1146ffa700 R08: 00007c1140010048 R09: 0000000000000000 [ 225.360572] R10: 0000000000000000 R11: 0000000000000246 R12: 00007c11400101b0 [ 225.360574] R13: 00007c1140010200 R14: 00007c1140010048 R15: 0000000000000001 [ 225.360576] Modules linked in: snd_seq_dummy snd_seq snd_seq_device veth bridge stp llc tun nf_nat_tftp nf_conntrack_tftp nf_nat_ftp nf_conntrack_ftp esp6 ah6 ip6t_REJECT ip6t_ipv6header cmac rfcomm uinput ipu3_imgu(C) ipu3_cio2 iova videobuf2_v4l2 videobuf2_common videobuf2_dma_sg videobuf2_memops ov13858 ov567 Fix this by moving the list_del() call just below the list_first_entry() call when the buffer no longer needs to be in the list. Fixes: 8ecc7c9da013 ("media: staging/intel-ipu3: parameter buffer refactoring") Signed-off-by: Tomasz Figa Reviewed-by: Laurent Pinchart Reviewed-by: Bingbu Cao Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/ipu3/ipu3.c b/drivers/staging/media/ipu3/ipu3.c index a25a997cfd7ef..ee1bba6bdcacd 100644 --- a/drivers/staging/media/ipu3/ipu3.c +++ b/drivers/staging/media/ipu3/ipu3.c @@ -261,6 +261,7 @@ int imgu_queue_buffers(struct imgu_device *imgu, bool initial, unsigned int pipe ivb = list_first_entry(&imgu_pipe->nodes[node].buffers, struct imgu_vb2_buffer, list); + list_del(&ivb->list); vb = &ivb->vbb.vb2_buf; r = imgu_css_set_parameters(&imgu->css, pipe, vb2_plane_vaddr(vb, 0)); @@ -274,7 +275,6 @@ int imgu_queue_buffers(struct imgu_device *imgu, bool initial, unsigned int pipe vb2_buffer_done(vb, VB2_BUF_STATE_DONE); dev_dbg(&imgu->pci_dev->dev, "queue user parameters %d to css.", vb->index); - list_del(&ivb->list); } else if (imgu_pipe->queue_enabled[node]) { struct imgu_css_buffer *buf = imgu_queue_getbuf(imgu, node, pipe); -- GitLab From 11de96b94f7c61956d07f58751b224ad2acc43b4 Mon Sep 17 00:00:00 2001 From: Bingbu Cao Date: Fri, 17 Apr 2020 11:34:33 +0200 Subject: [PATCH 295/503] media: ipu3.rst: add explanation for running mode Add some explanation of the ImgU running mode and add more information about firmware selection and running mode usage. Signed-off-by: Bingbu Cao Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/ipu3.rst | 27 ++++++++++++++++++++---- drivers/staging/media/ipu3/TODO | 4 ---- 2 files changed, 23 insertions(+), 8 deletions(-) diff --git a/Documentation/admin-guide/media/ipu3.rst b/Documentation/admin-guide/media/ipu3.rst index 11e2ac4888f5d..7a257c358f9d5 100644 --- a/Documentation/admin-guide/media/ipu3.rst +++ b/Documentation/admin-guide/media/ipu3.rst @@ -231,12 +231,31 @@ Configuring the Intel IPU3 The IPU3 ImgU pipelines can be configured using the Media Controller, defined at :ref:`media_controller`. -Firmware binary selection +Running mode and firmware binary selection ------------------------- +ImgU works based on firmware, currently the ImgU firmware support run 2 pipes in +time-sharing with single input frame data. Each pipe can run at certain mode - +"VIDEO" or "STILL", "VIDEO" mode is commonly used for video frames capture, and +"STILL" is used for still frame capture. However, you can also select "VIDEO" to +capture still frames if you want to capture images with less system load and +power. For "STILL" mode, ImgU will try to use smaller BDS factor and output +larger bayer frame for further YUV processing than "VIDEO" mode to get high +quality images. Besides, "STILL" mode need XNR3 to do noise reduction, hence +"STILL" mode will need more power and memory bandwidth than "VIDEO" mode. TNR +will be enabled in "VIDEO" mode and bypassed by "STILL" mode. ImgU is running at +“VIDEO” mode by default, the user can use v4l2 control V4L2_CID_INTEL_IPU3_MODE +(currently defined in drivers/staging/media/ipu3/include/intel-ipu3.h) to query +and set the running mode. For user, there is no difference for buffer queueing +between the "VIDEO" and "STILL" mode, mandatory input and main output node +should be enabled and buffers need be queued, the statistics and the view-finder +queues are optional. + +The firmware binary will be selected according to current running mode, such log +"using binary if_to_osys_striped " or "using binary if_to_osys_primary_striped" +could be observed if you enable the ImgU dynamic debug, the binary +if_to_osys_striped is selected for "VIDEO" and the binary +"if_to_osys_primary_striped" is selected for "STILL". -The firmware binary is selected using the V4L2_CID_INTEL_IPU3_MODE, currently -defined in drivers/staging/media/ipu3/include/intel-ipu3.h . "VIDEO" and "STILL" -modes are available. Processing the image in raw Bayer format ---------------------------------------- diff --git a/drivers/staging/media/ipu3/TODO b/drivers/staging/media/ipu3/TODO index 4bcb665cb5f79..3fd1fc10b68d6 100644 --- a/drivers/staging/media/ipu3/TODO +++ b/drivers/staging/media/ipu3/TODO @@ -10,7 +10,3 @@ staging directory. - Elaborate the functionality of different selection rectangles in driver documentation. This may require driver changes as well. - -- Document different operation modes, and which buffer queues are relevant - in each mode. To process an image, which queues require a buffer an in - which ones is it optional? -- GitLab From f9d813cc93e26aad82f4a9090491d0a7dbe45b20 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Wed, 22 Apr 2020 20:13:26 +0200 Subject: [PATCH 296/503] media: MAINTAINERS: ipu3-imgu: Add Tian Shu and Bingbu as reviewers Add Bingbu Cao and Tian Shu Qiu as reviewers for the IPU3 ImgU driver. Signed-off-by: Sakari Ailus Cc: Bingbu Cao Cc: Tian Shu Qiu Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index bf08cc4954255..60cfa3a801309 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8652,6 +8652,8 @@ F: drivers/media/pci/intel/ipu3/ INTEL IPU3 CSI-2 IMGU DRIVER M: Sakari Ailus +R: Bingbu Cao +R: Tian Shu Qiu L: linux-media@vger.kernel.org S: Maintained F: Documentation/admin-guide/media/ipu3.rst -- GitLab From 81d1adeb52c97fbe097e8c94e36c3eb702cdb110 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Wed, 15 Apr 2020 17:34:05 +0200 Subject: [PATCH 297/503] media: Revert "staging: imgu: Address a compiler warning on alignment" This reverts commit c9d52c114a9fcc61c30512c7f810247a9f2812af. The patch being reverted changed the memory layout of struct ipu3_uapi_acc_param. Revert it, and address the compiler warning issues in further patches. Fixes: commit c9d52c114a9f ("media: staging: imgu: Address a compiler warning on alignment") Reported-by: Tomasz Figa Tested-by: Bingbu Cao Cc: stable@vger.kernel.org # for v5.3 and up Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/include/intel-ipu3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index 1c9c3ba4d518d..5f43f631cf62f 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -2477,7 +2477,7 @@ struct ipu3_uapi_acc_param { struct ipu3_uapi_yuvp1_yds_config yds2 __attribute__((aligned(32))); struct ipu3_uapi_yuvp2_tcc_static_config tcc __attribute__((aligned(32))); struct ipu3_uapi_anr_config anr; - struct ipu3_uapi_awb_fr_config_s awb_fr __attribute__((aligned(32))); + struct ipu3_uapi_awb_fr_config_s awb_fr; struct ipu3_uapi_ae_config ae; struct ipu3_uapi_af_config_s af; struct ipu3_uapi_awb_config awb; -- GitLab From 8c038effd893920facedf18c2c0976cec4a33408 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Wed, 15 Apr 2020 17:40:09 +0200 Subject: [PATCH 298/503] media: staging: ipu3-imgu: Move alignment attribute to field Move the alignment attribute of struct ipu3_uapi_awb_fr_config_s to the field in struct ipu3_uapi_4a_config, the other location where the struct is used. Fixes: commit c9d52c114a9f ("media: staging: imgu: Address a compiler warning on alignment") Reported-by: Tomasz Figa Tested-by: Bingbu Cao Cc: stable@vger.kernel.org # for v5.3 and up Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/include/intel-ipu3.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index 5f43f631cf62f..a607b0158c81d 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -450,7 +450,7 @@ struct ipu3_uapi_awb_fr_config_s { __u32 bayer_sign; __u8 bayer_nf; __u8 reserved2[7]; -} __attribute__((aligned(32))) __packed; +} __packed; /** * struct ipu3_uapi_4a_config - 4A config @@ -466,7 +466,8 @@ struct ipu3_uapi_4a_config { struct ipu3_uapi_ae_grid_config ae_grd_config; __u8 padding[20]; struct ipu3_uapi_af_config_s af_config; - struct ipu3_uapi_awb_fr_config_s awb_fr_config; + struct ipu3_uapi_awb_fr_config_s awb_fr_config + __attribute__((aligned(32))); } __packed; /** -- GitLab From 839efdb65ffd8f2b1055e60d26d703f832a38c54 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Thu, 16 Apr 2020 09:45:07 +0200 Subject: [PATCH 299/503] media: staging: ipu3-imgu: Add a sanity check for the parameter struct size There have been cases where seemingly innocuous patches have broken the uAPI by changing the memory layout of the parameter struct. Generally such changes also introduce a change in the size of the entire struct. This patch adds a sanity check to avoid such cases happening in the future. Signed-off-by: Sakari Ailus Tested-by: Tested-by: Bingbu Cao Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3-css.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/staging/media/ipu3/ipu3-css.c b/drivers/staging/media/ipu3/ipu3-css.c index 4f04fe838b0c0..3c700ae9c94e9 100644 --- a/drivers/staging/media/ipu3/ipu3-css.c +++ b/drivers/staging/media/ipu3/ipu3-css.c @@ -1911,6 +1911,13 @@ int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt) switch (fmt->dataformat) { case V4L2_META_FMT_IPU3_PARAMS: fmt->buffersize = sizeof(struct ipu3_uapi_params); + + /* + * Sanity check for the parameter struct size. This must + * not change! + */ + BUILD_BUG_ON(sizeof(struct ipu3_uapi_params) != 39328); + break; case V4L2_META_FMT_IPU3_STAT_3A: fmt->buffersize = sizeof(struct ipu3_uapi_stats_3a); -- GitLab From e9ebce2d4c8b59c30ddc453770899aff9d3c58d0 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sun, 12 Apr 2020 14:05:01 +0200 Subject: [PATCH 300/503] media: staging: rkisp1: rsz: get the capture format info from the capture struct Currently the format info of the capture is retrieved by calling the function v4l2_format_info. This is not needed since it is already saved in the capture object. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-resizer.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-resizer.c b/drivers/staging/media/rkisp1/rkisp1-resizer.c index 7b6b7ddd4169a..84f23a91b0a05 100644 --- a/drivers/staging/media/rkisp1/rkisp1-resizer.c +++ b/drivers/staging/media/rkisp1/rkisp1-resizer.c @@ -387,11 +387,9 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, if (rsz->pixel_enc == V4L2_PIXEL_ENC_YUV) { struct rkisp1_capture *cap = &rsz->rkisp1->capture_devs[rsz->id]; - const struct v4l2_format_info *pixfmt_info = - v4l2_format_info(cap->pix.fmt.pixelformat); - hdiv = pixfmt_info->hdiv; - vdiv = pixfmt_info->vdiv; + hdiv = cap->pix.info->hdiv; + vdiv = cap->pix.info->vdiv; } src_c.width = src_y.width / hdiv; src_c.height = src_y.height / vdiv; -- GitLab From 21e4cdcb62ae60b9dc23917e9d65b7283fbc8bc7 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sun, 12 Apr 2020 14:05:02 +0200 Subject: [PATCH 301/503] media: staging: rkisp1: rsz: remove redundant if statement and add inline doc The statement "if (rsz->fmt_type == V4L2_PIXEL_ENC_YUV)" can be removed since the value of rsz->fmt_type is either V4L2_PIXEL_ENC_YUV or V4L2_PIXEL_ENC_BAYER and the function returns if it is bayer. In addition some doc with clarification is added. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-resizer.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-resizer.c b/drivers/staging/media/rkisp1/rkisp1-resizer.c index 84f23a91b0a05..c28919b9af443 100644 --- a/drivers/staging/media/rkisp1/rkisp1-resizer.c +++ b/drivers/staging/media/rkisp1/rkisp1-resizer.c @@ -365,12 +365,17 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, struct v4l2_rect sink_y, sink_c, src_y, src_c; struct v4l2_mbus_framefmt *src_fmt; struct v4l2_rect *sink_crop; + struct rkisp1_capture *cap = &rsz->rkisp1->capture_devs[rsz->id]; sink_crop = rkisp1_rsz_get_pad_crop(rsz, NULL, RKISP1_RSZ_PAD_SINK, V4L2_SUBDEV_FORMAT_ACTIVE); src_fmt = rkisp1_rsz_get_pad_fmt(rsz, NULL, RKISP1_RSZ_PAD_SRC, V4L2_SUBDEV_FORMAT_ACTIVE); + /* + * The resizer only works on yuv formats, + * so return if it is bayer format. + */ if (rsz->pixel_enc == V4L2_PIXEL_ENC_BAYER) { rkisp1_rsz_disable(rsz, when); return; @@ -384,13 +389,15 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, sink_c.width = sink_y.width / RKISP1_MBUS_FMT_HDIV; sink_c.height = sink_y.height / RKISP1_MBUS_FMT_VDIV; - if (rsz->pixel_enc == V4L2_PIXEL_ENC_YUV) { - struct rkisp1_capture *cap = - &rsz->rkisp1->capture_devs[rsz->id]; + /* + * The resizer is used not only to change the dimensions of the frame + * but also to change the scale for YUV formats, + * (4:2:2 -> 4:2:0 for example). So the width/height of the CbCr + * streams should be set according to the pixel format in the capture. + */ + hdiv = cap->pix.info->hdiv; + vdiv = cap->pix.info->vdiv; - hdiv = cap->pix.info->hdiv; - vdiv = cap->pix.info->vdiv; - } src_c.width = src_y.width / hdiv; src_c.height = src_y.height / vdiv; -- GitLab From 0b64a837817ec562ed7079964236890e29cbc666 Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sun, 12 Apr 2020 14:05:03 +0200 Subject: [PATCH 302/503] media: staging: rkisp1: rsz: change (hv)div only if capture format is YUV RGB formats in selfpath should receive input format as YUV422. The resizer input format is always YUV422 and therefore if the capture format is RGB, the resizer should not change the YUV rations. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-resizer.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-resizer.c b/drivers/staging/media/rkisp1/rkisp1-resizer.c index c28919b9af443..d049374413dcf 100644 --- a/drivers/staging/media/rkisp1/rkisp1-resizer.c +++ b/drivers/staging/media/rkisp1/rkisp1-resizer.c @@ -394,9 +394,14 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, * but also to change the scale for YUV formats, * (4:2:2 -> 4:2:0 for example). So the width/height of the CbCr * streams should be set according to the pixel format in the capture. + * The resizer always gets the input as YUV422. If the capture format + * is RGB then the memory input should be YUV422 so we don't change the + * default hdiv, vdiv in that case. */ - hdiv = cap->pix.info->hdiv; - vdiv = cap->pix.info->vdiv; + if (v4l2_is_format_yuv(cap->pix.info)) { + hdiv = cap->pix.info->hdiv; + vdiv = cap->pix.info->vdiv; + } src_c.width = src_y.width / hdiv; src_c.height = src_y.height / vdiv; -- GitLab From bcf10abe8c40a23666a46ef413f0c49464769bad Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Sun, 12 Apr 2020 14:05:04 +0200 Subject: [PATCH 303/503] media: staging: rkisp1: cap: enable RGB capture format with YUV media bus In selfpath, RGB capture formats are received in the sink pad as YUV and are converted to RGB only when writing to memory. So the validation function should accept YUV bus formats with RGB capture encoding. Signed-off-by: Dafna Hirschfeld Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/rkisp1/rkisp1-capture.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c index 21496fb2c4daa..f69235f82c457 100644 --- a/drivers/staging/media/rkisp1/rkisp1-capture.c +++ b/drivers/staging/media/rkisp1/rkisp1-capture.c @@ -1227,6 +1227,8 @@ static int rkisp1_capture_link_validate(struct media_link *link) media_entity_to_v4l2_subdev(link->source->entity); struct rkisp1_capture *cap = video_get_drvdata(vdev); struct rkisp1_isp *isp = &cap->rkisp1->isp; + u8 isp_pix_enc = isp->src_fmt->pixel_enc; + u8 cap_pix_enc = cap->pix.info->pixel_enc; struct v4l2_subdev_format sd_fmt; int ret; @@ -1237,7 +1239,9 @@ static int rkisp1_capture_link_validate(struct media_link *link) return -EPIPE; } - if (cap->pix.info->pixel_enc != isp->src_fmt->pixel_enc) { + if (cap_pix_enc != isp_pix_enc && + !(isp_pix_enc == V4L2_PIXEL_ENC_YUV && + cap_pix_enc == V4L2_PIXEL_ENC_RGB)) { dev_err(cap->rkisp1->dev, "format type mismatch in link '%s:%d->%s:%d'\n", link->source->entity->name, link->source->index, -- GitLab From e01bc6cbb1fc262e7fccceb5f8fd5ee8e6418f66 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Tue, 21 Apr 2020 17:51:31 +0200 Subject: [PATCH 304/503] media: dt-bindings: media: rockchip-vpu: fix interrupt-names A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: video-codec@ff350000: interrupts: [[0, 9, 4]] is too short arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: video-codec@ff350000: interrupt-names: ['vdpu'] is too short arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: video-codec@ff350000: interrupt-names:0: 'vepu' was expected With the conversion of rockchip-vpu.txt to yaml the correct 'interrupt-names' for rk3328 was not included, so add them now. Also add 'minItems' to 'interrupts'for the completeness. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-vpu.yaml Signed-off-by: Johan Jonker Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/devicetree/bindings/media/rockchip-vpu.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml index d7a42e6f9bcfd..27df18ad6a814 100644 --- a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml @@ -24,12 +24,15 @@ properties: maxItems: 1 interrupts: + minItems: 1 maxItems: 2 interrupt-names: - items: - - const: vepu + oneOf: - const: vdpu + - items: + - const: vepu + - const: vdpu clocks: maxItems: 2 -- GitLab From 54ac3fc348719d57d87b3bcd0977d75668c0c5d1 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Tue, 21 Apr 2020 18:29:40 +0200 Subject: [PATCH 305/503] media: imx: utils: Default colorspace to SRGB The function imx_media_init_mbus_fmt() initializes the imx subdevice mbus colorimetry to some sane defaults when the subdevice is registered. Currently it guesses at a colorspace based on the passed mbus pixel format. If the format is RGB, it chooses colorspace V4L2_COLORSPACE_SRGB, and if the format is YUV, it chooses V4L2_COLORSPACE_SMPTE170M. While that might be a good guess, it's not necessarily true that a RGB pixel format encoding uses a SRGB colorspace, or that a YUV encoding uses a SMPTE170M colorspace. Instead of making this dubious guess, just default the colorspace to SRGB. Reported-by: Hans Verkuil Signed-off-by: Steve Longerbeam Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-utils.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 42e64b618a61f..4ba6a5310f762 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -388,8 +388,7 @@ int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus, mbus->code = code; - mbus->colorspace = (lcc->cs == IPUV3_COLORSPACE_RGB) ? - V4L2_COLORSPACE_SRGB : V4L2_COLORSPACE_SMPTE170M; + mbus->colorspace = V4L2_COLORSPACE_SRGB; mbus->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(mbus->colorspace); mbus->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(mbus->colorspace); mbus->quantization = -- GitLab From 0d7f7d2d31919a9c557acb2b4511770e6956c9ee Mon Sep 17 00:00:00 2001 From: Koji Matsuoka Date: Fri, 24 Apr 2020 12:39:45 +0200 Subject: [PATCH 306/503] media: rcar-csi2: Fix comment of VCDT/VCDT2 register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to latest H/W manual v1.50, the description of channel number in the VCDT/VCDT2 register is decremented by one. Therefore, this patch fixes it about comment. Signed-off-by: Koji Matsuoka Signed-off-by: Wolfram Sang Reviewed-by: Niklas Söderlund Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/rcar-vin/rcar-csi2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/rcar-vin/rcar-csi2.c b/drivers/media/platform/rcar-vin/rcar-csi2.c index faa9fb23a2e9b..151e6a90c5fbc 100644 --- a/drivers/media/platform/rcar-vin/rcar-csi2.c +++ b/drivers/media/platform/rcar-vin/rcar-csi2.c @@ -52,8 +52,8 @@ struct rcar_csi2; /* * Channel Data Type Select - * VCDT[0-15]: Channel 1 VCDT[16-31]: Channel 2 - * VCDT2[0-15]: Channel 3 VCDT2[16-31]: Channel 4 + * VCDT[0-15]: Channel 0 VCDT[16-31]: Channel 1 + * VCDT2[0-15]: Channel 2 VCDT2[16-31]: Channel 3 */ #define VCDT_REG 0x10 #define VCDT2_REG 0x14 -- GitLab From 149d65e549f32710cfe22b5640f3010e8e68a837 Mon Sep 17 00:00:00 2001 From: Zou Wei Date: Tue, 28 Apr 2020 14:08:09 +0200 Subject: [PATCH 307/503] media: cx231xx: Remove unneeded semicolon Fixes coccicheck warnings: drivers/media/usb/cx231xx/cx231xx-avcore.c:610:3-4: Unneeded semicolon Reported-by: Hulk Robot Signed-off-by: Zou Wei Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/cx231xx/cx231xx-avcore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/usb/cx231xx/cx231xx-avcore.c b/drivers/media/usb/cx231xx/cx231xx-avcore.c index d6117093491b9..3d3c881c8e587 100644 --- a/drivers/media/usb/cx231xx/cx231xx-avcore.c +++ b/drivers/media/usb/cx231xx/cx231xx-avcore.c @@ -607,7 +607,7 @@ int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input) CX231XX_VMUX_COMPOSITE1, INPUT(input)->vmux); break; - }; + } break; default: -- GitLab From f84fdf99e9e2d1af699f7518b87c87d8e9f435c6 Mon Sep 17 00:00:00 2001 From: Maxime Jourdan Date: Tue, 28 Apr 2020 14:50:34 +0200 Subject: [PATCH 308/503] media: meson: vdec: enable mcrcc for VP9 The motion compensation reference cache controller allows caching parts of reference frames for faster decoding. Fixes: 00c43088aa68 ("media: meson: vdec: add VP9 decoder support") Signed-off-by: Maxime Jourdan Signed-off-by: Neil Armstrong Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/meson/vdec/codec_vp9.c | 31 ++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/staging/media/meson/vdec/codec_vp9.c b/drivers/staging/media/meson/vdec/codec_vp9.c index 60e4fc0052b3e..897f5d7a6aad1 100644 --- a/drivers/staging/media/meson/vdec/codec_vp9.c +++ b/drivers/staging/media/meson/vdec/codec_vp9.c @@ -854,6 +854,36 @@ static int codec_vp9_stop(struct amvdec_session *sess) return 0; } +/* + * Program LAST & GOLDEN frames into the motion compensation reference cache + * controller + */ +static void codec_vp9_set_mcrcc(struct amvdec_session *sess) +{ + struct amvdec_core *core = sess->core; + struct codec_vp9 *vp9 = sess->priv; + u32 val; + + /* Reset mcrcc */ + amvdec_write_dos(core, HEVCD_MCRCC_CTL1, 0x2); + /* Disable on I-frame */ + if (vp9->cur_frame->type == KEY_FRAME || vp9->cur_frame->intra_only) { + amvdec_write_dos(core, HEVCD_MCRCC_CTL1, 0x0); + return; + } + + amvdec_write_dos(core, HEVCD_MPP_ANC_CANVAS_ACCCONFIG_ADDR, BIT(1)); + val = amvdec_read_dos(core, HEVCD_MPP_ANC_CANVAS_DATA_ADDR) & 0xffff; + val |= (val << 16); + amvdec_write_dos(core, HEVCD_MCRCC_CTL2, val); + val = amvdec_read_dos(core, HEVCD_MPP_ANC_CANVAS_DATA_ADDR) & 0xffff; + val |= (val << 16); + amvdec_write_dos(core, HEVCD_MCRCC_CTL3, val); + + /* Enable mcrcc progressive-mode */ + amvdec_write_dos(core, HEVCD_MCRCC_CTL1, 0xff0); +} + static void codec_vp9_set_sao(struct amvdec_session *sess, struct vb2_buffer *vb) { @@ -1267,6 +1297,7 @@ static void codec_vp9_process_frame(struct amvdec_session *sess) amvdec_write_dos(core, HEVC_PARSER_PICTURE_SIZE, (vp9->height << 16) | vp9->width); + codec_vp9_set_mcrcc(sess); codec_vp9_set_sao(sess, &vp9->cur_frame->vbuf->vb2_buf); vp9_loop_filter_frame_init(core, &vp9->seg_4lf, -- GitLab From d251c653aa3f07a3947cd716052a92d705d4ded5 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 28 Apr 2020 14:50:36 +0200 Subject: [PATCH 309/503] media: MAINTAINERS: update the Amlogic VDEC driver maintainer entry Add myself as co-maintainer of the Amlogic VDEC driver, and add the missing vdec DT yaml bindings. Signed-off-by: Neil Armstrong Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 60cfa3a801309..a7bb6e22d5dac 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11011,10 +11011,12 @@ F: drivers/mtd/nand/raw/meson_* MESON VIDEO DECODER DRIVER FOR AMLOGIC SOCS M: Maxime Jourdan +M: Neil Armstrong L: linux-media@vger.kernel.org L: linux-amlogic@lists.infradead.org S: Supported T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml F: drivers/staging/media/meson/vdec/ METHODE UDPU SUPPORT -- GitLab From a97f52b0f1a687141fee82246306ce7ff93b49dd Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 28 Apr 2020 19:04:05 +0200 Subject: [PATCH 310/503] media: staging: media: imx: no need to check return value of debugfs_create functions When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Steve Longerbeam Cc: Philipp Zabel Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: devel@driverdev.osuosl.org Signed-off-by: Greg Kroah-Hartman Reviewed-by: Rui Miguel Silva Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 29 ++++------------------ 1 file changed, 5 insertions(+), 24 deletions(-) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index e2403b448b6d3..ca20f5da9ac64 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -1017,33 +1017,14 @@ static int mipi_csis_dump_regs_show(struct seq_file *m, void *private) } DEFINE_SHOW_ATTRIBUTE(mipi_csis_dump_regs); -static int mipi_csis_debugfs_init(struct csi_state *state) +static void mipi_csis_debugfs_init(struct csi_state *state) { - struct dentry *d; - - if (!debugfs_initialized()) - return -ENODEV; - state->debugfs_root = debugfs_create_dir(dev_name(state->dev), NULL); - if (!state->debugfs_root) - return -ENOMEM; - - d = debugfs_create_bool("debug_enable", 0600, state->debugfs_root, - &state->debug); - if (!d) - goto remove_debugfs; - - d = debugfs_create_file("dump_regs", 0600, state->debugfs_root, - state, &mipi_csis_dump_regs_fops); - if (!d) - goto remove_debugfs; - - return 0; - -remove_debugfs: - debugfs_remove_recursive(state->debugfs_root); - return -ENOMEM; + debugfs_create_bool("debug_enable", 0600, state->debugfs_root, + &state->debug); + debugfs_create_file("dump_regs", 0600, state->debugfs_root, state, + &mipi_csis_dump_regs_fops); } static void mipi_csis_debugfs_exit(struct csi_state *state) -- GitLab From 7c192ebf394c2c67a572050ee872548c0d2f639b Mon Sep 17 00:00:00 2001 From: John Oldman Date: Tue, 28 Apr 2020 19:26:55 +0200 Subject: [PATCH 311/503] media: staging: media: usbvision: usbvision-core Correct spelling Correct spelling in comment Signed-off-by: John Oldman Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/usbvision/usbvision-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/usbvision/usbvision-core.c b/drivers/staging/media/usbvision/usbvision-core.c index f05a5c84dc188..e35dee35b068f 100644 --- a/drivers/staging/media/usbvision/usbvision-core.c +++ b/drivers/staging/media/usbvision/usbvision-core.c @@ -1268,7 +1268,7 @@ static void usbvision_isoc_irq(struct urb *urb) if (!USBVISION_IS_OPERATIONAL(usbvision)) return; - /* any urb with wrong status is ignored without acknowledgement */ + /* any urb with wrong status is ignored without acknowledgment */ if (urb->status == -ENOENT) return; -- GitLab From 6c8d0cdd6ccb21badd52a10d627f80cf1a6ab63f Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 28 Apr 2020 23:34:19 +0200 Subject: [PATCH 312/503] media: ti-vpe: avoid gcc-9 warning gcc warns about empty array declarations, which we get in this driver when compile-testing without CONFIG_OF: drivers/media/platform/ti-vpe/cal.c:2194:34: warning: array 'cal_of_match' assumed to have one element 2194 | static const struct of_device_id cal_of_match[]; Since all users of this driver do need CONFIG_OF anyway, there is no point in making the array definition conditional to save space, so just remove the #ifdef and move the array up a little. Fixes: 343e89a792a5 ("[media] media: ti-vpe: Add CAL v4l2 camera capture driver") Signed-off-by: Arnd Bergmann Reviewed-by: Benoit Parrot Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/ti-vpe/cal.c | 46 +++++++++++++---------------- 1 file changed, 21 insertions(+), 25 deletions(-) diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 49204872e711d..9b18db7af6c38 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -2237,7 +2237,26 @@ static struct cal_ctx *cal_create_instance(struct cal_dev *dev, int inst) return NULL; } -static const struct of_device_id cal_of_match[]; +static const struct of_device_id cal_of_match[] = { + { + .compatible = "ti,dra72-cal", + .data = (void *)&dra72x_cal_data, + }, + { + .compatible = "ti,dra72-pre-es2-cal", + .data = (void *)&dra72x_es1_cal_data, + }, + { + .compatible = "ti,dra76-cal", + .data = (void *)&dra76x_cal_data, + }, + { + .compatible = "ti,am654-cal", + .data = (void *)&am654_cal_data, + }, + {}, +}; +MODULE_DEVICE_TABLE(of, cal_of_match); static int cal_probe(struct platform_device *pdev) { @@ -2413,29 +2432,6 @@ static int cal_remove(struct platform_device *pdev) return 0; } -#if defined(CONFIG_OF) -static const struct of_device_id cal_of_match[] = { - { - .compatible = "ti,dra72-cal", - .data = (void *)&dra72x_cal_data, - }, - { - .compatible = "ti,dra72-pre-es2-cal", - .data = (void *)&dra72x_es1_cal_data, - }, - { - .compatible = "ti,dra76-cal", - .data = (void *)&dra76x_cal_data, - }, - { - .compatible = "ti,am654-cal", - .data = (void *)&am654_cal_data, - }, - {}, -}; -MODULE_DEVICE_TABLE(of, cal_of_match); -#endif - static int cal_runtime_resume(struct device *dev) { struct cal_dev *caldev = dev_get_drvdata(dev); @@ -2462,7 +2458,7 @@ static struct platform_driver cal_pdrv = { .driver = { .name = CAL_MODULE_NAME, .pm = &cal_pm_ops, - .of_match_table = of_match_ptr(cal_of_match), + .of_match_table = cal_of_match, }, }; -- GitLab From b77da87c84f8d3f0290ef96f72edac9a9d2b1d23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Date: Fri, 1 May 2020 15:11:02 +0200 Subject: [PATCH 313/503] media: vimc: Support multiple media bus codes for each pixelformat MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change vimc_pix_map_list to allow multiple media bus codes to map to the same pixelformat, making it possible to add media bus codes for which there are no pixelformat. Acked-by: Helen Koike Signed-off-by: Nícolas F. R. A. Prado Signed-off-by: Hans Verkuil [hverkuil-cisco@xs4all.nl: fix sparse warning: const u32 -> u32] Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test-drivers/vimc/vimc-common.c | 71 ++++++++++++------- drivers/media/test-drivers/vimc/vimc-common.h | 13 +++- drivers/media/test-drivers/vimc/vimc-scaler.c | 10 ++- drivers/media/test-drivers/vimc/vimc-sensor.c | 6 +- 4 files changed, 68 insertions(+), 32 deletions(-) diff --git a/drivers/media/test-drivers/vimc/vimc-common.c b/drivers/media/test-drivers/vimc/vimc-common.c index c95c17c048f2e..24dcc28854c8a 100644 --- a/drivers/media/test-drivers/vimc/vimc-common.c +++ b/drivers/media/test-drivers/vimc/vimc-common.c @@ -19,19 +19,19 @@ static const struct vimc_pix_map vimc_pix_map_list[] = { /* RGB formats */ { - .code = MEDIA_BUS_FMT_BGR888_1X24, + .code = { MEDIA_BUS_FMT_BGR888_1X24 }, .pixelformat = V4L2_PIX_FMT_BGR24, .bpp = 3, .bayer = false, }, { - .code = MEDIA_BUS_FMT_RGB888_1X24, + .code = { MEDIA_BUS_FMT_RGB888_1X24 }, .pixelformat = V4L2_PIX_FMT_RGB24, .bpp = 3, .bayer = false, }, { - .code = MEDIA_BUS_FMT_ARGB8888_1X32, + .code = { MEDIA_BUS_FMT_ARGB8888_1X32 }, .pixelformat = V4L2_PIX_FMT_ARGB32, .bpp = 4, .bayer = false, @@ -39,49 +39,49 @@ static const struct vimc_pix_map vimc_pix_map_list[] = { /* Bayer formats */ { - .code = MEDIA_BUS_FMT_SBGGR8_1X8, + .code = { MEDIA_BUS_FMT_SBGGR8_1X8 }, .pixelformat = V4L2_PIX_FMT_SBGGR8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGBRG8_1X8, + .code = { MEDIA_BUS_FMT_SGBRG8_1X8 }, .pixelformat = V4L2_PIX_FMT_SGBRG8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGRBG8_1X8, + .code = { MEDIA_BUS_FMT_SGRBG8_1X8 }, .pixelformat = V4L2_PIX_FMT_SGRBG8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SRGGB8_1X8, + .code = { MEDIA_BUS_FMT_SRGGB8_1X8 }, .pixelformat = V4L2_PIX_FMT_SRGGB8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SBGGR10_1X10, + .code = { MEDIA_BUS_FMT_SBGGR10_1X10 }, .pixelformat = V4L2_PIX_FMT_SBGGR10, .bpp = 2, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGBRG10_1X10, + .code = { MEDIA_BUS_FMT_SGBRG10_1X10 }, .pixelformat = V4L2_PIX_FMT_SGBRG10, .bpp = 2, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGRBG10_1X10, + .code = { MEDIA_BUS_FMT_SGRBG10_1X10 }, .pixelformat = V4L2_PIX_FMT_SGRBG10, .bpp = 2, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SRGGB10_1X10, + .code = { MEDIA_BUS_FMT_SRGGB10_1X10 }, .pixelformat = V4L2_PIX_FMT_SRGGB10, .bpp = 2, .bayer = true, @@ -89,25 +89,25 @@ static const struct vimc_pix_map vimc_pix_map_list[] = { /* 10bit raw bayer a-law compressed to 8 bits */ { - .code = MEDIA_BUS_FMT_SBGGR10_ALAW8_1X8, + .code = { MEDIA_BUS_FMT_SBGGR10_ALAW8_1X8 }, .pixelformat = V4L2_PIX_FMT_SBGGR10ALAW8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGBRG10_ALAW8_1X8, + .code = { MEDIA_BUS_FMT_SGBRG10_ALAW8_1X8 }, .pixelformat = V4L2_PIX_FMT_SGBRG10ALAW8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8, + .code = { MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8 }, .pixelformat = V4L2_PIX_FMT_SGRBG10ALAW8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SRGGB10_ALAW8_1X8, + .code = { MEDIA_BUS_FMT_SRGGB10_ALAW8_1X8 }, .pixelformat = V4L2_PIX_FMT_SRGGB10ALAW8, .bpp = 1, .bayer = true, @@ -115,49 +115,49 @@ static const struct vimc_pix_map vimc_pix_map_list[] = { /* 10bit raw bayer DPCM compressed to 8 bits */ { - .code = MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8, + .code = { MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8 }, .pixelformat = V4L2_PIX_FMT_SBGGR10DPCM8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8, + .code = { MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8 }, .pixelformat = V4L2_PIX_FMT_SGBRG10DPCM8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8, + .code = { MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8 }, .pixelformat = V4L2_PIX_FMT_SGRBG10DPCM8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8, + .code = { MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8 }, .pixelformat = V4L2_PIX_FMT_SRGGB10DPCM8, .bpp = 1, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SBGGR12_1X12, + .code = { MEDIA_BUS_FMT_SBGGR12_1X12 }, .pixelformat = V4L2_PIX_FMT_SBGGR12, .bpp = 2, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGBRG12_1X12, + .code = { MEDIA_BUS_FMT_SGBRG12_1X12 }, .pixelformat = V4L2_PIX_FMT_SGBRG12, .bpp = 2, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SGRBG12_1X12, + .code = { MEDIA_BUS_FMT_SGRBG12_1X12 }, .pixelformat = V4L2_PIX_FMT_SGRBG12, .bpp = 2, .bayer = true, }, { - .code = MEDIA_BUS_FMT_SRGGB12_1X12, + .code = { MEDIA_BUS_FMT_SRGGB12_1X12 }, .pixelformat = V4L2_PIX_FMT_SRGGB12, .bpp = 2, .bayer = true, @@ -182,13 +182,32 @@ const struct vimc_pix_map *vimc_pix_map_by_index(unsigned int i) return &vimc_pix_map_list[i]; } +u32 vimc_mbus_code_by_index(unsigned int index) +{ + unsigned int i, j; + + for (i = 0; i < ARRAY_SIZE(vimc_pix_map_list); i++) { + for (j = 0; j < ARRAY_SIZE(vimc_pix_map_list[i].code); j++) { + if (!vimc_pix_map_list[i].code[j]) + break; + + if (!index) + return vimc_pix_map_list[i].code[j]; + index--; + } + } + return 0; +} + const struct vimc_pix_map *vimc_pix_map_by_code(u32 code) { - unsigned int i; + unsigned int i, j; for (i = 0; i < ARRAY_SIZE(vimc_pix_map_list); i++) { - if (vimc_pix_map_list[i].code == code) - return &vimc_pix_map_list[i]; + for (j = 0; j < ARRAY_SIZE(vimc_pix_map_list[i].code); j++) { + if (vimc_pix_map_list[i].code[j] == code) + return &vimc_pix_map_list[i]; + } } return NULL; } diff --git a/drivers/media/test-drivers/vimc/vimc-common.h b/drivers/media/test-drivers/vimc/vimc-common.h index 487bd020f85c8..1b5fbedae6567 100644 --- a/drivers/media/test-drivers/vimc/vimc-common.h +++ b/drivers/media/test-drivers/vimc/vimc-common.h @@ -32,6 +32,8 @@ #define VIMC_IS_SRC(pad) (pad) #define VIMC_IS_SINK(pad) (!(pad)) +#define VIMC_PIX_FMT_MAX_CODES 1 + /** * vimc_colorimetry_clamp - Adjust colorimetry parameters * @@ -70,7 +72,7 @@ do { \ * V4L2_PIX_FMT_* fourcc pixelformat and its bytes per pixel (bpp) */ struct vimc_pix_map { - unsigned int code; + unsigned int code[VIMC_PIX_FMT_MAX_CODES]; unsigned int bpp; u32 pixelformat; bool bayer; @@ -169,6 +171,15 @@ extern struct vimc_ent_type vimc_cap_type; */ const struct vimc_pix_map *vimc_pix_map_by_index(unsigned int i); +/** + * vimc_mbus_code_by_index - get mbus code by its index + * + * @index: index of the mbus code in vimc_pix_map_list + * + * Returns 0 if no mbus code is found for the given index. + */ +u32 vimc_mbus_code_by_index(unsigned int index); + /** * vimc_pix_map_by_code - get vimc_pix_map struct by media bus code * diff --git a/drivers/media/test-drivers/vimc/vimc-scaler.c b/drivers/media/test-drivers/vimc/vimc-scaler.c index 2231e72b24e2e..121fa7d62a2e6 100644 --- a/drivers/media/test-drivers/vimc/vimc-scaler.c +++ b/drivers/media/test-drivers/vimc/vimc-scaler.c @@ -110,13 +110,19 @@ static int vimc_sca_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) { - const struct vimc_pix_map *vpix = vimc_pix_map_by_index(code->index); + u32 mbus_code = vimc_mbus_code_by_index(code->index); + const struct vimc_pix_map *vpix; + + if (!mbus_code) + return -EINVAL; + + vpix = vimc_pix_map_by_code(mbus_code); /* We don't support bayer format */ if (!vpix || vpix->bayer) return -EINVAL; - code->code = vpix->code; + code->code = mbus_code; return 0; } diff --git a/drivers/media/test-drivers/vimc/vimc-sensor.c b/drivers/media/test-drivers/vimc/vimc-sensor.c index 56e8ec14be464..a2f09ac9a3604 100644 --- a/drivers/media/test-drivers/vimc/vimc-sensor.c +++ b/drivers/media/test-drivers/vimc/vimc-sensor.c @@ -52,12 +52,12 @@ static int vimc_sen_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) { - const struct vimc_pix_map *vpix = vimc_pix_map_by_index(code->index); + u32 mbus_code = vimc_mbus_code_by_index(code->index); - if (!vpix) + if (!mbus_code) return -EINVAL; - code->code = vpix->code; + code->code = mbus_code; return 0; } -- GitLab From 772563b27c9f5cb0e19bf6c5fb4383a86e3347e3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Date: Fri, 1 May 2020 15:11:12 +0200 Subject: [PATCH 314/503] media: vimc: Add missing {RGB,BGR,GBR}888 media bus codes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add missing RGB888_*, BGR888_* and GBR888_* media bus codes in the vimc_pix_map_list. Since there is no GBR24 pixelformat, use the RGB24 pixelformat for MEDIA_BUS_FMT_GBR888_1X24. Acked-by: Helen Koike Co-developed-by: Vitor Massaru Iha Signed-off-by: Vitor Massaru Iha Signed-off-by: Nícolas F. R. A. Prado Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test-drivers/vimc/vimc-common.c | 16 ++++++++++++++-- drivers/media/test-drivers/vimc/vimc-common.h | 2 +- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/media/test-drivers/vimc/vimc-common.c b/drivers/media/test-drivers/vimc/vimc-common.c index 24dcc28854c8a..7b27153c0728b 100644 --- a/drivers/media/test-drivers/vimc/vimc-common.c +++ b/drivers/media/test-drivers/vimc/vimc-common.c @@ -19,13 +19,25 @@ static const struct vimc_pix_map vimc_pix_map_list[] = { /* RGB formats */ { - .code = { MEDIA_BUS_FMT_BGR888_1X24 }, + .code = { + MEDIA_BUS_FMT_BGR888_1X24, + MEDIA_BUS_FMT_BGR888_3X8 + }, .pixelformat = V4L2_PIX_FMT_BGR24, .bpp = 3, .bayer = false, }, { - .code = { MEDIA_BUS_FMT_RGB888_1X24 }, + .code = { + MEDIA_BUS_FMT_RGB888_1X24, + MEDIA_BUS_FMT_RGB888_2X12_BE, + MEDIA_BUS_FMT_RGB888_2X12_LE, + MEDIA_BUS_FMT_RGB888_3X8, + MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, + MEDIA_BUS_FMT_RGB888_1X32_PADHI, + MEDIA_BUS_FMT_GBR888_1X24 + }, .pixelformat = V4L2_PIX_FMT_RGB24, .bpp = 3, .bayer = false, diff --git a/drivers/media/test-drivers/vimc/vimc-common.h b/drivers/media/test-drivers/vimc/vimc-common.h index 1b5fbedae6567..ae163dec2459c 100644 --- a/drivers/media/test-drivers/vimc/vimc-common.h +++ b/drivers/media/test-drivers/vimc/vimc-common.h @@ -32,7 +32,7 @@ #define VIMC_IS_SRC(pad) (pad) #define VIMC_IS_SINK(pad) (!(pad)) -#define VIMC_PIX_FMT_MAX_CODES 1 +#define VIMC_PIX_FMT_MAX_CODES 8 /** * vimc_colorimetry_clamp - Adjust colorimetry parameters -- GitLab From f4d12d8009d9e9917859c6a4291d49c6e70e92c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Date: Fri, 1 May 2020 15:11:23 +0200 Subject: [PATCH 315/503] media: vimc: deb: Add support for {RGB,BGR,GBR}888 bus formats on source pad MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for RGB888_*, BGR888_* and GBR888_* media bus formats on the source pad of debayer subdevices. Acked-by: Helen Koike Co-developed-by: Vitor Massaru Iha Signed-off-by: Vitor Massaru Iha Signed-off-by: Nícolas F. R. A. Prado Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../media/test-drivers/vimc/vimc-debayer.c | 71 ++++++++++++++----- 1 file changed, 54 insertions(+), 17 deletions(-) diff --git a/drivers/media/test-drivers/vimc/vimc-debayer.c b/drivers/media/test-drivers/vimc/vimc-debayer.c index c4765ebaeec28..c3f6fef34f686 100644 --- a/drivers/media/test-drivers/vimc/vimc-debayer.c +++ b/drivers/media/test-drivers/vimc/vimc-debayer.c @@ -51,6 +51,19 @@ static const struct v4l2_mbus_framefmt sink_fmt_default = { .colorspace = V4L2_COLORSPACE_SRGB, }; +static const u32 vimc_deb_src_mbus_codes[] = { + MEDIA_BUS_FMT_GBR888_1X24, + MEDIA_BUS_FMT_BGR888_1X24, + MEDIA_BUS_FMT_BGR888_3X8, + MEDIA_BUS_FMT_RGB888_1X24, + MEDIA_BUS_FMT_RGB888_2X12_BE, + MEDIA_BUS_FMT_RGB888_2X12_LE, + MEDIA_BUS_FMT_RGB888_3X8, + MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, + MEDIA_BUS_FMT_RGB888_1X32_PADHI, +}; + static const struct vimc_deb_pix_map vimc_deb_pix_map_list[] = { { .code = MEDIA_BUS_FMT_SBGGR8_1X8, @@ -125,6 +138,17 @@ static const struct vimc_deb_pix_map *vimc_deb_pix_map_by_code(u32 code) return NULL; } +static bool vimc_deb_src_code_is_valid(u32 code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(vimc_deb_src_mbus_codes); i++) + if (vimc_deb_src_mbus_codes[i] == code) + return true; + + return false; +} + static int vimc_deb_init_cfg(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg) { @@ -148,14 +172,11 @@ static int vimc_deb_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_mbus_code_enum *code) { - /* We only support one format for source pads */ if (VIMC_IS_SRC(code->pad)) { - struct vimc_deb_device *vdeb = v4l2_get_subdevdata(sd); - - if (code->index) + if (code->index >= ARRAY_SIZE(vimc_deb_src_mbus_codes)) return -EINVAL; - code->code = vdeb->src_code; + code->code = vimc_deb_src_mbus_codes[code->index]; } else { if (code->index >= ARRAY_SIZE(vimc_deb_pix_map_list)) return -EINVAL; @@ -170,8 +191,6 @@ static int vimc_deb_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) { - struct vimc_deb_device *vdeb = v4l2_get_subdevdata(sd); - if (fse->index) return -EINVAL; @@ -181,7 +200,7 @@ static int vimc_deb_enum_frame_size(struct v4l2_subdev *sd, if (!vpix) return -EINVAL; - } else if (fse->code != vdeb->src_code) { + } else if (!vimc_deb_src_code_is_valid(fse->code)) { return -EINVAL; } @@ -237,6 +256,7 @@ static int vimc_deb_set_fmt(struct v4l2_subdev *sd, { struct vimc_deb_device *vdeb = v4l2_get_subdevdata(sd); struct v4l2_mbus_framefmt *sink_fmt; + u32 *src_code; if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { /* Do not change the format while stream is on */ @@ -244,8 +264,10 @@ static int vimc_deb_set_fmt(struct v4l2_subdev *sd, return -EBUSY; sink_fmt = &vdeb->sink_fmt; + src_code = &vdeb->src_code; } else { sink_fmt = v4l2_subdev_get_try_format(sd, cfg, 0); + src_code = &v4l2_subdev_get_try_format(sd, cfg, 1)->code; } /* @@ -253,9 +275,14 @@ static int vimc_deb_set_fmt(struct v4l2_subdev *sd, * it is propagated from the sink */ if (VIMC_IS_SRC(fmt->pad)) { + u32 code = fmt->format.code; + fmt->format = *sink_fmt; - /* TODO: Add support for other formats */ - fmt->format.code = vdeb->src_code; + + if (vimc_deb_src_code_is_valid(code)) + *src_code = code; + + fmt->format.code = *src_code; } else { /* Set the new format in the sink pad */ vimc_deb_adjust_sink_fmt(&fmt->format); @@ -286,16 +313,26 @@ static const struct v4l2_subdev_pad_ops vimc_deb_pad_ops = { .set_fmt = vimc_deb_set_fmt, }; -static void vimc_deb_set_rgb_mbus_fmt_rgb888_1x24(struct vimc_deb_device *vdeb, - unsigned int lin, - unsigned int col, - unsigned int rgb[3]) +static void vimc_deb_process_rgb_frame(struct vimc_deb_device *vdeb, + unsigned int lin, + unsigned int col, + unsigned int rgb[3]) { + const struct vimc_pix_map *vpix; unsigned int i, index; + vpix = vimc_pix_map_by_code(vdeb->src_code); index = VIMC_FRAME_INDEX(lin, col, vdeb->sink_fmt.width, 3); - for (i = 0; i < 3; i++) - vdeb->src_frame[index + i] = rgb[i]; + for (i = 0; i < 3; i++) { + switch (vpix->pixelformat) { + case V4L2_PIX_FMT_RGB24: + vdeb->src_frame[index + i] = rgb[i]; + break; + case V4L2_PIX_FMT_BGR24: + vdeb->src_frame[index + i] = rgb[2 - i]; + break; + } + } } static int vimc_deb_s_stream(struct v4l2_subdev *sd, int enable) @@ -568,7 +605,7 @@ static struct vimc_ent_device *vimc_deb_add(struct vimc_device *vimc, * for the code */ vdeb->src_code = MEDIA_BUS_FMT_RGB888_1X24; - vdeb->set_rgb_src = vimc_deb_set_rgb_mbus_fmt_rgb888_1x24; + vdeb->set_rgb_src = vimc_deb_process_rgb_frame; return &vdeb->ved; -- GitLab From 62eedb356188376acd0368384a9b294d5180c00b Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Tue, 5 May 2020 09:50:34 +0200 Subject: [PATCH 316/503] media: sun8i: Fix an error handling path in 'deinterlace_runtime_resume()' It is spurious to call 'clk_disable_unprepare()' when 'clk_prepare_enable()' has not been called yet. Re-order the error handling path to avoid it. Fixes: a4260ea49547 ("media: sun4i: Add H3 deinterlace driver") Signed-off-by: Christophe JAILLET Acked-by: Chen-Yu Tsai Signed-off-by: Hans Verkuil [hverkuil-cisco@xs4all.nl: err_exlusive_rate -> err_exclusive_rate] Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/sunxi/sun8i-di/sun8i-di.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c b/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c index d78f6593ddd1b..ba5d078866072 100644 --- a/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c +++ b/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c @@ -941,7 +941,7 @@ static int deinterlace_runtime_resume(struct device *device) if (ret) { dev_err(dev->dev, "Failed to enable bus clock\n"); - goto err_exlusive_rate; + goto err_exclusive_rate; } ret = clk_prepare_enable(dev->mod_clk); @@ -969,14 +969,14 @@ static int deinterlace_runtime_resume(struct device *device) return 0; -err_exlusive_rate: - clk_rate_exclusive_put(dev->mod_clk); err_ram_clk: clk_disable_unprepare(dev->ram_clk); err_mod_clk: clk_disable_unprepare(dev->mod_clk); err_bus_clk: clk_disable_unprepare(dev->bus_clk); +err_exclusive_rate: + clk_rate_exclusive_put(dev->mod_clk); return ret; } -- GitLab From 3b5af3171e2d5a73ae6f04965ed653d039904eb6 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Tue, 5 May 2020 10:25:56 +0200 Subject: [PATCH 317/503] media: cec: silence shift wrapping warning in __cec_s_log_addrs() The log_addrs->log_addr_type[i] value is a u8 which is controlled by the user and comes from the ioctl. If it's over 31 then that results in undefined behavior (shift wrapping) and that leads to a Smatch static checker warning. We already cap the value later so we can silence the warning just by re-ordering the existing checks. I think the UBSan checker will also catch this bug at runtime and generate a warning. But otherwise the bug is harmless. Fixes: 9881fe0ca187 ("[media] cec: add HDMI CEC framework (adapter)") Signed-off-by: Dan Carpenter Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/cec/core/cec-adap.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/cec/core/cec-adap.c b/drivers/media/cec/core/cec-adap.c index 6c95dc471d4c6..6a04d19a96b2e 100644 --- a/drivers/media/cec/core/cec-adap.c +++ b/drivers/media/cec/core/cec-adap.c @@ -1734,6 +1734,10 @@ int __cec_s_log_addrs(struct cec_adapter *adap, unsigned j; log_addrs->log_addr[i] = CEC_LOG_ADDR_INVALID; + if (log_addrs->log_addr_type[i] > CEC_LOG_ADDR_TYPE_UNREGISTERED) { + dprintk(1, "unknown logical address type\n"); + return -EINVAL; + } if (type_mask & (1 << log_addrs->log_addr_type[i])) { dprintk(1, "duplicate logical address type\n"); return -EINVAL; @@ -1754,10 +1758,6 @@ int __cec_s_log_addrs(struct cec_adapter *adap, dprintk(1, "invalid primary device type\n"); return -EINVAL; } - if (log_addrs->log_addr_type[i] > CEC_LOG_ADDR_TYPE_UNREGISTERED) { - dprintk(1, "unknown logical address type\n"); - return -EINVAL; - } for (j = 0; j < feature_sz; j++) { if ((features[j] & 0x80) == 0) { if (op_is_dev_features) -- GitLab From 716448642d71aa73dcdd494bc7bd309aaaf8896c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 09:25:00 +0200 Subject: [PATCH 318/503] media: admin-guide: make clear about PCI subsystem IDs On several parts of the document, it mentions "PCI ID", when it is actually referring to the subsystem's part of the PCI ID. Change the language to let it be clear. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/bt8xx.rst | 2 +- .../admin-guide/media/bttv-cardlist.rst | 2 +- Documentation/admin-guide/media/cardlist.rst | 29 ++++++++++++------- .../admin-guide/media/cx23885-cardlist.rst | 2 +- .../admin-guide/media/cx88-cardlist.rst | 2 +- .../admin-guide/media/ivtv-cardlist.rst | 2 +- .../admin-guide/media/saa7134-cardlist.rst | 2 +- .../admin-guide/media/saa7164-cardlist.rst | 2 +- 8 files changed, 25 insertions(+), 18 deletions(-) diff --git a/Documentation/admin-guide/media/bt8xx.rst b/Documentation/admin-guide/media/bt8xx.rst index d6cf81d83d61a..1382ada1e38eb 100644 --- a/Documentation/admin-guide/media/bt8xx.rst +++ b/Documentation/admin-guide/media/bt8xx.rst @@ -70,7 +70,7 @@ frontend and backend modules will be loaded automatically. Exceptions are: -- Old TV cards without EEPROMs, sharing a common PCI ID; +- Old TV cards without EEPROMs, sharing a common PCI subsystem ID; - Old TwinHan DST cards or clones with or without CA slot and not containing an Eeprom. diff --git a/Documentation/admin-guide/media/bttv-cardlist.rst b/Documentation/admin-guide/media/bttv-cardlist.rst index f5806856b5a19..8671d4f7ba7b5 100644 --- a/Documentation/admin-guide/media/bttv-cardlist.rst +++ b/Documentation/admin-guide/media/bttv-cardlist.rst @@ -12,7 +12,7 @@ BTTV cards list * - Card number - Card name - - PCI IDs + - PCI subsystem IDs * - 0 - *** UNKNOWN/GENERIC *** diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 8cdb9d4ca7d6f..678765f6e9f10 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -183,13 +183,16 @@ is actually composed by two parts: - Vendor ID and device ID; - Subsystem ID and Subsystem device ID; -The ``lspci -nn`` command allows identifying the vendor/device PCI IDs:: +The ``lspci -nn`` command allows identifying the vendor/device PCI IDs: + +.. code-block:: none + :emphasize-lines: 4 $ lspci -nn ... + 00:0a.0 Multimedia controller [0480]: Philips Semiconductors SAA7131/SAA7133/SAA7135 Video Broadcast Decoder [1131:7133] (rev d1) 00:0b.0 Multimedia controller [0480]: Brooktree Corporation Bt878 Audio Capture [109e:0878] (rev 11) 01:00.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23887/8 PCIe Broadcast Audio and Video Decoder with 3D Comb [14f1:8880] (rev 0f) - 01:01.0 Multimedia controller [0480]: Philips Semiconductors SAA7131/SAA7133/SAA7135 Video Broadcast Decoder [1131:7133] (rev d1) 02:01.0 Multimedia video controller [0400]: Internext Compression Inc iTVC15 (CX23415) Video Decoder [4444:0803] (rev 01) 02:02.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23418 Single-Chip MPEG-2 Encoder with Integrated Analog Video/Broadcast Audio Decoder [14f1:5b7a] 02:03.0 Multimedia video controller [0400]: Brooktree Corporation Bt878 Video Capture [109e:036e] (rev 11) @@ -202,17 +205,21 @@ The subsystem IDs can be obtained using ``lspci -vn`` $ lspci -vn ... - 01:01.0 0480: 1131:7133 (rev d1) - Subsystem: 1461:f01d - Flags: bus master, medium devsel, latency 32, IRQ 209 - Memory at e2002000 (32-bit, non-prefetchable) [size=2K] - Capabilities: [40] Power Management version 2 + 00:0a.0 0480: 1131:7133 (rev d1) + Subsystem: 1461:f01d + Flags: bus master, medium devsel, latency 32, IRQ 209 + Memory at e2002000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [40] Power Management version 2 ... -Unfortunately, sometimes the same PCI ID is used by different products. -So, several media drivers allow passing a ``card=`` parameter, in order -to setup a card number that would match the correct settings for an -specific board. +At the above example, the first card uses the ``saa7134`` driver, and +has a vendor/device PCI ID equal to ``1131:7133`` and a PCI subsystem +ID equal to ``1461:f01d``. + +Unfortunately, sometimes the same PCI subsystem ID is used by different +products. So, several media drivers allow passing a ``card=`` parameter, +in order to setup a card number that would match the correct settings for +an specific board. The current supported PCI/PCIe cards (not including staging drivers) are listed below\ [#]_. diff --git a/Documentation/admin-guide/media/cx23885-cardlist.rst b/Documentation/admin-guide/media/cx23885-cardlist.rst index 0415b8e0be6fa..c47514fead334 100644 --- a/Documentation/admin-guide/media/cx23885-cardlist.rst +++ b/Documentation/admin-guide/media/cx23885-cardlist.rst @@ -12,7 +12,7 @@ cx23885 cards list * - Card number - Card name - - PCI IDs + - PCI subsystem IDs * - 0 - UNKNOWN/GENERIC diff --git a/Documentation/admin-guide/media/cx88-cardlist.rst b/Documentation/admin-guide/media/cx88-cardlist.rst index 4524dfb13d18f..76dc9a14cf91b 100644 --- a/Documentation/admin-guide/media/cx88-cardlist.rst +++ b/Documentation/admin-guide/media/cx88-cardlist.rst @@ -12,7 +12,7 @@ CX88 cards list * - Card number - Card name - - PCI IDs + - PCI subsystem IDs * - 0 - UNKNOWN/GENERIC diff --git a/Documentation/admin-guide/media/ivtv-cardlist.rst b/Documentation/admin-guide/media/ivtv-cardlist.rst index c34a9ebc9ac2f..0ffc3b71ae60d 100644 --- a/Documentation/admin-guide/media/ivtv-cardlist.rst +++ b/Documentation/admin-guide/media/ivtv-cardlist.rst @@ -12,7 +12,7 @@ IVTV cards list * - Card number - Card name - - PCI IDs + - PCI subsystem IDs * - 0 - Hauppauge WinTV PVR-250 diff --git a/Documentation/admin-guide/media/saa7134-cardlist.rst b/Documentation/admin-guide/media/saa7134-cardlist.rst index afb0e2fb52b05..3ef8fab6bcadf 100644 --- a/Documentation/admin-guide/media/saa7134-cardlist.rst +++ b/Documentation/admin-guide/media/saa7134-cardlist.rst @@ -12,7 +12,7 @@ SAA7134 cards list * - Card number - Card name - - PCI IDs + - PCI subsystem IDs * - 0 - UNKNOWN/GENERIC diff --git a/Documentation/admin-guide/media/saa7164-cardlist.rst b/Documentation/admin-guide/media/saa7164-cardlist.rst index e8f36e084537c..7949c09aa900a 100644 --- a/Documentation/admin-guide/media/saa7164-cardlist.rst +++ b/Documentation/admin-guide/media/saa7164-cardlist.rst @@ -12,7 +12,7 @@ SAA7164 cards list * - Card number - Card name - - PCI IDs + - PCI subsystem IDs * - 0 - Unknown -- GitLab From 92f0fa8b5df43a88e0a0a7d9f4cbebc079bdcf79 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 10:44:21 +0200 Subject: [PATCH 319/503] media: admin-guide: split cardlist.rst file After adding all cardlists, this file became too big. Split it on smaller files, in order to make easier to maintain. Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/cardlist.rst | 715 +----------------- .../admin-guide/media/i2c-cardlist.rst | 290 +++++++ .../admin-guide/media/misc-cardlist.rst | 28 + .../admin-guide/media/pci-cardlist.rst | 107 +++ .../admin-guide/media/platform-cardlist.rst | 90 +++ .../admin-guide/media/radio-cardlist.rst | 44 ++ .../admin-guide/media/usb-cardlist.rst | 157 ++++ 7 files changed, 724 insertions(+), 707 deletions(-) create mode 100644 Documentation/admin-guide/media/i2c-cardlist.rst create mode 100644 Documentation/admin-guide/media/misc-cardlist.rst create mode 100644 Documentation/admin-guide/media/pci-cardlist.rst create mode 100644 Documentation/admin-guide/media/platform-cardlist.rst create mode 100644 Documentation/admin-guide/media/radio-cardlist.rst create mode 100644 Documentation/admin-guide/media/usb-cardlist.rst diff --git a/Documentation/admin-guide/media/cardlist.rst b/Documentation/admin-guide/media/cardlist.rst index 678765f6e9f10..5b38bfd6a19dc 100644 --- a/Documentation/admin-guide/media/cardlist.rst +++ b/Documentation/admin-guide/media/cardlist.rst @@ -18,711 +18,12 @@ You may also take a look at https://linuxtv.org/wiki/index.php/Hardware_Device_Information for more details about supported cards. -USB drivers -=========== - -The USB boards are identified by an identification called USB ID. - -The ``lsusb`` command allows identifying the USB IDs:: - - $ lsusb - ... - Bus 001 Device 015: ID 046d:082d Logitech, Inc. HD Pro Webcam C920 - Bus 001 Device 074: ID 2040:b131 Hauppauge - Bus 001 Device 075: ID 2013:024f PCTV Systems nanoStick T2 290e - ... - -Newer camera devices use a standard way to expose themselves as such, -via USB Video Class. Those cameras are automatically supported by the -``uvc-driver``. - -Older cameras and TV USB devices uses USB Vendor Classes: each vendor -defines its own way to access the device. This section contains -card lists for such vendor-class devices. - -While this is not as common as on PCI, sometimes the same USB ID is used -by different products. So, several media drivers allow passing a ``card=`` -parameter, in order to setup a card number that would match the correct -settings for an specific product type. - -The current supported USB cards (not including staging drivers) are -listed below\ [#]_. - -.. [#] - - some of the drivers have sub-drivers, not shown at this table. - In particular, gspca driver has lots of sub-drivers, - for cameras not supported by the USB Video Class (UVC) driver, - as shown at :doc:`gspca card list `. - -====================== ========================================================= -Driver Name -====================== ========================================================= -airspy AirSpy -au0828 Auvitek AU0828 -b2c2-flexcop-usb Technisat/B2C2 Air/Sky/Cable2PC USB -cpia2 CPiA2 Video For Linux -cx231xx Conexant cx231xx USB video capture -dvb-as102 Abilis AS102 DVB receiver -dvb-ttusb-budget Technotrend/Hauppauge Nova - USB devices -dvb-usb-a800 AVerMedia AverTV DVB-T USB 2.0 (A800) -dvb-usb-af9005 Afatech AF9005 DVB-T USB1.1 -dvb-usb-af9015 Afatech AF9015 DVB-T USB2.0 -dvb-usb-af9035 Afatech AF9035 DVB-T USB2.0 -dvb-usb-anysee Anysee DVB-T/C USB2.0 -dvb-usb-au6610 Alcor Micro AU6610 USB2.0 -dvb-usb-az6007 AzureWave 6007 and clones DVB-T/C USB2.0 -dvb-usb-az6027 Azurewave DVB-S/S2 USB2.0 AZ6027 -dvb-usb-ce6230 Intel CE6230 DVB-T USB2.0 -dvb-usb-cinergyT2 Terratec CinergyT2/qanu USB 2.0 DVB-T -dvb-usb-cxusb Conexant USB2.0 hybrid -dvb-usb-dib0700 DiBcom DiB0700 -dvb-usb-dibusb-common DiBcom DiB3000M-B -dvb-usb-dibusb-mc DiBcom DiB3000M-C/P -dvb-usb-digitv Nebula Electronics uDigiTV DVB-T USB2.0 -dvb-usb-dtt200u WideView WT-200U and WT-220U (pen) DVB-T -dvb-usb-dtv5100 AME DTV-5100 USB2.0 DVB-T -dvb-usb-dvbsky DVBSky USB -dvb-usb-dw2102 DvbWorld & TeVii DVB-S/S2 USB2.0 -dvb-usb-ec168 E3C EC168 DVB-T USB2.0 -dvb-usb-gl861 Genesys Logic GL861 USB2.0 -dvb-usb-gp8psk GENPIX 8PSK->USB module -dvb-usb-lmedm04 LME DM04/QQBOX DVB-S USB2.0 -dvb-usb-m920x Uli m920x DVB-T USB2.0 -dvb-usb-nova-t-usb2 Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 -dvb-usb-opera Opera1 DVB-S USB2.0 receiver -dvb-usb-pctv452e Pinnacle PCTV HDTV Pro USB device/TT Connect S2-3600 -dvb-usb-rtl28xxu Realtek RTL28xxU DVB USB -dvb-usb-technisat-usb2 Technisat DVB-S/S2 USB2.0 -dvb-usb-ttusb2 Pinnacle 400e DVB-S USB2.0 -dvb-usb-umt-010 HanfTek UMT-010 DVB-T USB2.0 -dvb_usb_v2 Support for various USB DVB devices v2 -dvb-usb-vp702x TwinhanDTV StarBox and clones DVB-S USB2.0 -dvb-usb-vp7045 TwinhanDTV Alpha/MagicBoxII, DNTV tinyUSB2, Beetle USB2.0 -em28xx Empia EM28xx USB devices -go7007 WIS GO7007 MPEG encoder -gspca Drivers for several USB Cameras -hackrf HackRF -hdpvr Hauppauge HD PVR -msi2500 Mirics MSi2500 -mxl111sf-tuner MxL111SF DTV USB2.0 -pvrusb2 Hauppauge WinTV-PVR USB2 -pwc USB Philips Cameras -s2250 Sensoray 2250/2251 -s2255drv USB Sensoray 2255 video capture device -smsusb Siano SMS1xxx based MDTV receiver -stkwebcam USB Syntek DC1125 Camera -tm6000-alsa TV Master TM5600/6000/6010 audio -tm6000-dvb DVB Support for tm6000 based TV cards -tm6000 TV Master TM5600/6000/6010 driver -ttusb_dec Technotrend/Hauppauge USB DEC devices -usbtv USBTV007 video capture -uvcvideo USB Video Class (UVC) -zd1301 ZyDAS ZD1301 -zr364xx USB ZR364XX Camera -====================== ========================================================= - .. toctree:: - :maxdepth: 1 - - au0828-cardlist - cx231xx-cardlist - em28xx-cardlist - tm6000-cardlist - siano-cardlist - usbvision-cardlist - - gspca-cardlist - - dvb-usb-dib0700-cardlist - dvb-usb-dibusb-mb-cardlist - dvb-usb-dibusb-mc-cardlist - - dvb-usb-a800-cardlist - dvb-usb-af9005-cardlist - dvb-usb-az6027-cardlist - dvb-usb-cinergyT2-cardlist - dvb-usb-cxusb-cardlist - dvb-usb-digitv-cardlist - dvb-usb-dtt200u-cardlist - dvb-usb-dtv5100-cardlist - dvb-usb-dw2102-cardlist - dvb-usb-gp8psk-cardlist - dvb-usb-m920x-cardlist - dvb-usb-nova-t-usb2-cardlist - dvb-usb-opera1-cardlist - dvb-usb-pctv452e-cardlist - dvb-usb-technisat-usb2-cardlist - dvb-usb-ttusb2-cardlist - dvb-usb-umt-010-cardlist - dvb-usb-vp702x-cardlist - dvb-usb-vp7045-cardlist - - dvb-usb-af9015-cardlist - dvb-usb-af9035-cardlist - dvb-usb-anysee-cardlist - dvb-usb-au6610-cardlist - dvb-usb-az6007-cardlist - dvb-usb-ce6230-cardlist - dvb-usb-dvbsky-cardlist - dvb-usb-ec168-cardlist - dvb-usb-gl861-cardlist - dvb-usb-lmedm04-cardlist - dvb-usb-mxl111sf-cardlist - dvb-usb-rtl28xxu-cardlist - dvb-usb-zd1301-cardlist - - other-usb-cardlist - -PCI drivers -=========== - -The PCI boards are identified by an identification called PCI ID. The PCI ID -is actually composed by two parts: - - - Vendor ID and device ID; - - Subsystem ID and Subsystem device ID; - -The ``lspci -nn`` command allows identifying the vendor/device PCI IDs: - -.. code-block:: none - :emphasize-lines: 4 - - $ lspci -nn - ... - 00:0a.0 Multimedia controller [0480]: Philips Semiconductors SAA7131/SAA7133/SAA7135 Video Broadcast Decoder [1131:7133] (rev d1) - 00:0b.0 Multimedia controller [0480]: Brooktree Corporation Bt878 Audio Capture [109e:0878] (rev 11) - 01:00.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23887/8 PCIe Broadcast Audio and Video Decoder with 3D Comb [14f1:8880] (rev 0f) - 02:01.0 Multimedia video controller [0400]: Internext Compression Inc iTVC15 (CX23415) Video Decoder [4444:0803] (rev 01) - 02:02.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23418 Single-Chip MPEG-2 Encoder with Integrated Analog Video/Broadcast Audio Decoder [14f1:5b7a] - 02:03.0 Multimedia video controller [0400]: Brooktree Corporation Bt878 Video Capture [109e:036e] (rev 11) - ... - -The subsystem IDs can be obtained using ``lspci -vn`` - -.. code-block:: none - :emphasize-lines: 4 - - $ lspci -vn - ... - 00:0a.0 0480: 1131:7133 (rev d1) - Subsystem: 1461:f01d - Flags: bus master, medium devsel, latency 32, IRQ 209 - Memory at e2002000 (32-bit, non-prefetchable) [size=2K] - Capabilities: [40] Power Management version 2 - ... - -At the above example, the first card uses the ``saa7134`` driver, and -has a vendor/device PCI ID equal to ``1131:7133`` and a PCI subsystem -ID equal to ``1461:f01d``. - -Unfortunately, sometimes the same PCI subsystem ID is used by different -products. So, several media drivers allow passing a ``card=`` parameter, -in order to setup a card number that would match the correct settings for -an specific board. - -The current supported PCI/PCIe cards (not including staging drivers) are -listed below\ [#]_. - -.. [#] some of the drivers have sub-drivers, not shown at this table - -================ ======================================================== -Driver Name -================ ======================================================== -altera-ci Altera FPGA based CI module -b2c2-flexcop-pci Technisat/B2C2 Air/Sky/Cable2PC PCI -bt878 DVB/ATSC Support for bt878 based TV cards -bttv BT8x8 Video For Linux -cobalt Cisco Cobalt -cx18 Conexant cx23418 MPEG encoder -cx23885 Conexant cx23885 (2388x successor) -cx25821 Conexant cx25821 -cx88xx Conexant 2388x (bt878 successor) -ddbridge Digital Devices bridge -dm1105 SDMC DM1105 based PCI cards -dt3155 DT3155 frame grabber -dvb-ttpci AV7110 cards -earth-pt1 PT1 cards -earth-pt3 Earthsoft PT3 cards -hexium_gemini Hexium Gemini frame grabber -hexium_orion Hexium HV-PCI6 and Orion frame grabber -hopper HOPPER based cards -ipu3-cio2 Intel ipu3-cio2 driver -ivtv Conexant cx23416/cx23415 MPEG encoder/decoder -ivtvfb Conexant cx23415 framebuffer -mantis MANTIS based cards -meye Sony Vaio Picturebook Motion Eye -mxb Siemens-Nixdorf 'Multimedia eXtension Board' -netup-unidvb NetUP Universal DVB card -ngene Micronas nGene -pluto2 Pluto2 cards -saa7134 Philips SAA7134 -saa7164 NXP SAA7164 -smipcie SMI PCIe DVBSky cards -solo6x10 Bluecherry / Softlogic 6x10 capture cards (MPEG-4/H.264) -sta2x11_vip STA2X11 VIP Video For Linux -tw5864 Techwell TW5864 video/audio grabber and encoder -tw686x Intersil/Techwell TW686x -tw68 Techwell tw68x Video For Linux -================ ======================================================== - -Some of those drivers support multiple devices, as shown at the card -lists below: - -.. toctree:: - :maxdepth: 1 - - bttv-cardlist - cx18-cardlist - cx23885-cardlist - cx88-cardlist - ivtv-cardlist - saa7134-cardlist - saa7164-cardlist - -Platform drivers -================ - -There are several drivers that are focused on providing support for -functionality that are already included at the main board, and don't -use neither USB nor PCI bus. Those drivers are called platform -drivers, and are very popular on embedded devices. - -The current supported of platform drivers (not including staging drivers) are -listed below - -================= ============================================================ -Driver Name -================= ============================================================ -am437x-vpfe TI AM437x VPFE -aspeed-video Aspeed AST2400 and AST2500 -atmel-isc ATMEL Image Sensor Controller (ISC) -atmel-isi ATMEL Image Sensor Interface (ISI) -c8sectpfe SDR platform devices -c8sectpfe SDR platform devices -cafe_ccic Marvell 88ALP01 (Cafe) CMOS Camera Controller -cdns-csi2rx Cadence MIPI-CSI2 RX Controller -cdns-csi2tx Cadence MIPI-CSI2 TX Controller -coda-vpu Chips&Media Coda multi-standard codec IP -dm355_ccdc TI DM355 CCDC video capture -dm644x_ccdc TI DM6446 CCDC video capture -exynos-fimc-is EXYNOS4x12 FIMC-IS (Imaging Subsystem) -exynos-fimc-lite EXYNOS FIMC-LITE camera interface -exynos-gsc Samsung Exynos G-Scaler -exy Samsung S5P/EXYNOS4 SoC series Camera Subsystem -fsl-viu Freescale VIU -imx-pxp i.MX Pixel Pipeline (PXP) -isdf TI DM365 ISIF video capture -mmp_camera Marvell Armada 610 integrated camera controller -mtk_jpeg Mediatek JPEG Codec -mtk-mdp Mediatek MDP -mtk-vcodec-dec Mediatek Video Codec -mtk-vpu Mediatek Video Processor Unit -mx2_emmaprp MX2 eMMa-PrP -omap3-isp OMAP 3 Camera -omap-vout OMAP2/OMAP3 V4L2-Display -pxa_camera PXA27x Quick Capture Interface -qcom-camss Qualcomm V4L2 Camera Subsystem -rcar-csi2 R-Car MIPI CSI-2 Receiver -rcar_drif Renesas Digital Radio Interface (DRIF) -rcar-fcp Renesas Frame Compression Processor -rcar_fdp1 Renesas Fine Display Processor -rcar_jpu Renesas JPEG Processing Unit -rcar-vin R-Car Video Input (VIN) -renesas-ceu Renesas Capture Engine Unit (CEU) -rockchip-rga Rockchip Raster 2d Graphic Acceleration Unit -s3c-camif Samsung S3C24XX/S3C64XX SoC Camera Interface -s5p-csis S5P/EXYNOS MIPI-CSI2 receiver (MIPI-CSIS) -s5p-fimc S5P/EXYNOS4 FIMC/CAMIF camera interface -s5p-g2d Samsung S5P and EXYNOS4 G2D 2d graphics accelerator -s5p-jpeg Samsung S5P/Exynos3250/Exynos4 JPEG codec -s5p-mfc Samsung S5P MFC Video Codec -sh_veu SuperH VEU mem2mem video processing -sh_vou SuperH VOU video output -stm32-dcmi STM32 Digital Camera Memory Interface (DCMI) -sun4i-csi Allwinner A10 CMOS Sensor Interface Support -sun6i-csi Allwinner V3s Camera Sensor Interface -sun8i-di Allwinner Deinterlace -sun8i-rotate Allwinner DE2 rotation -ti-cal TI Memory-to-memory multimedia devices -ti-csc TI DVB platform devices -ti-vpe TI VPE (Video Processing Engine) -venus-enc Qualcomm Venus V4L2 encoder/decoder -via-camera VIAFB camera controller -video-mux Video Multiplexer -vpif_display TI DaVinci VPIF V4L2-Display -vpif_capture TI DaVinci VPIF video capture -vpss TI DaVinci VPBE V4L2-Display -vsp1 Renesas VSP1 Video Processing Engine -xilinx-tpg Xilinx Video Test Pattern Generator -xilinx-video Xilinx Video IP (EXPERIMENTAL) -xilinx-vtc Xilinx Video Timing Controller -================= ============================================================ - -MMC/SDIO DVB adapters ---------------------- - -======= =========================================== -Driver Name -======= =========================================== -smssdio Siano SMS1xxx based MDTV via SDIO interface -======= =========================================== - -Firewire driver -=============== - -The media subsystem also provides a firewire driver for digital TV: - -======= ===================== -Driver Name -======= ===================== -firedtv FireDTV and FloppyDTV -======= ===================== - -Radio drivers -============= - -There is also support for pure AM/FM radio, and even for some FM radio -transmitters: - -===================== ========================================================= -Driver Name -===================== ========================================================= -si4713 Silicon Labs Si4713 FM Radio Transmitter -radio-aztech Aztech/Packard Bell Radio -radio-cadet ADS Cadet AM/FM Tuner -radio-gemtek GemTek Radio card (or compatible) -radio-maxiradio Guillemot MAXI Radio FM 2000 radio -radio-miropcm20 miroSOUND PCM20 radio -radio-aimslab AIMSlab RadioTrack (aka RadioReveal) -radio-rtrack2 AIMSlab RadioTrack II -saa7706h SAA7706H Car Radio DSP -radio-sf16fmi SF16-FMI/SF16-FMP/SF16-FMD Radio -radio-sf16fmr2 SF16-FMR2/SF16-FMD2 Radio -radio-shark Griffin radioSHARK USB radio receiver -shark2 Griffin radioSHARK2 USB radio receiver -radio-si470x-common Silicon Labs Si470x FM Radio Receiver -radio-si476x Silicon Laboratories Si476x I2C FM Radio -radio-tea5764 TEA5764 I2C FM radio -tef6862 TEF6862 Car Radio Enhanced Selectivity Tuner -radio-terratec TerraTec ActiveRadio ISA Standalone -radio-timb Enable the Timberdale radio driver -radio-trust Trust FM radio card -radio-typhoon Typhoon Radio (a.k.a. EcoRadio) -radio-wl1273 Texas Instruments WL1273 I2C FM Radio -fm_drv ISA radio devices -fm_drv ISA radio devices -radio-zoltrix Zoltrix Radio -dsbr100 D-Link/GemTek USB FM radio -radio-keene Keene FM Transmitter USB -radio-ma901 Masterkit MA901 USB FM radio -radio-mr800 AverMedia MR 800 USB FM radio -radio-raremono Thanko's Raremono AM/FM/SW radio -radio-si470x-usb Silicon Labs Si470x FM Radio Receiver support with USB -radio-usb-si4713 Silicon Labs Si4713 FM Radio Transmitter support with USB -===================== ========================================================= - -I²C drivers -=========== - -The I²C (Inter-Integrated Circuit) bus is a three-wires bus used internally -at the media cards for communication between different chips. While the bus -is not visible to the Linux Kernel, drivers need to send and receive -commands via the bus. The Linux Kernel driver abstraction has support to -implement different drivers for each component inside an I²C bus, as if -the bus were visible to the main system board. - -One of the problems with I²C devices is that sometimes the same device may -work with different I²C hardware. This is common, for example, on devices -that comes with a tuner for North America market, and another one for -Europe. Some drivers have a ``tuner=`` modprobe parameter to allow using a -different tuner number in order to address such issue. - -The current supported of I²C drivers (not including staging drivers) are -listed below. - -Audio decoders, processors and mixers -------------------------------------- - -============ ========================================================== -Driver Name -============ ========================================================== -cs3308 Cirrus Logic CS3308 audio ADC -cs5345 Cirrus Logic CS5345 audio ADC -cs53l32a Cirrus Logic CS53L32A audio ADC -msp3400 Micronas MSP34xx audio decoders -sony-btf-mpx Sony BTF's internal MPX -tda1997x NXP TDA1997x HDMI receiver -tda7432 Philips TDA7432 audio processor -tda9840 Philips TDA9840 audio processor -tea6415c Philips TEA6415C audio processor -tea6420 Philips TEA6420 audio processor -tlv320aic23b Texas Instruments TLV320AIC23B audio codec -tvaudio Simple audio decoder chips -uda1342 Philips UDA1342 audio codec -vp27smpx Panasonic VP27's internal MPX -wm8739 Wolfson Microelectronics WM8739 stereo audio ADC -wm8775 Wolfson Microelectronics WM8775 audio ADC with input mixer -============ ========================================================== - -Audio/Video compression chips ------------------------------ - -============ ========================================================== -Driver Name -============ ========================================================== -saa6752hs Philips SAA6752HS MPEG-2 Audio/Video Encoder -============ ========================================================== - -Camera sensor devices ---------------------- - -============ ========================================================== -Driver Name -============ ========================================================== -et8ek8 ET8EK8 camera sensor -hi556 Hynix Hi-556 sensor -imx214 Sony IMX214 sensor -imx219 Sony IMX219 sensor -imx258 Sony IMX258 sensor -imx274 Sony IMX274 sensor -imx290 Sony IMX290 sensor -imx319 Sony IMX319 sensor -imx355 Sony IMX355 sensor -m5mols Fujitsu M-5MOLS 8MP sensor -mt9m001 mt9m001 -mt9m032 MT9M032 camera sensor -mt9m111 mt9m111, mt9m112 and mt9m131 -mt9p031 Aptina MT9P031 -mt9t001 Aptina MT9T001 -mt9t112 Aptina MT9T111/MT9T112 -mt9v011 Micron mt9v011 sensor -mt9v032 Micron MT9V032 sensor -mt9v111 Aptina MT9V111 sensor -noon010pc30 Siliconfile NOON010PC30 sensor -ov13858 OmniVision OV13858 sensor -ov2640 OmniVision OV2640 sensor -ov2659 OmniVision OV2659 sensor -ov2680 OmniVision OV2680 sensor -ov2685 OmniVision OV2685 sensor -ov5640 OmniVision OV5640 sensor -ov5645 OmniVision OV5645 sensor -ov5647 OmniVision OV5647 sensor -ov5670 OmniVision OV5670 sensor -ov5675 OmniVision OV5675 sensor -ov5695 OmniVision OV5695 sensor -ov6650 OmniVision OV6650 sensor -ov7251 OmniVision OV7251 sensor -ov7640 OmniVision OV7640 sensor -ov7670 OmniVision OV7670 sensor -ov772x OmniVision OV772x sensor -ov7740 OmniVision OV7740 sensor -ov8856 OmniVision OV8856 sensor -ov9640 OmniVision OV9640 sensor -ov9650 OmniVision OV9650/OV9652 sensor -rj54n1cb0c Sharp RJ54N1CB0C sensor -s5c73m3 Samsung S5C73M3 sensor -s5k4ecgx Samsung S5K4ECGX sensor -s5k5baf Samsung S5K5BAF sensor -s5k6a3 Samsung S5K6A3 sensor -s5k6aa Samsung S5K6AAFX sensor -smiapp SMIA++/SMIA sensor -sr030pc30 Siliconfile SR030PC30 sensor -vs6624 ST VS6624 sensor -============ ========================================================== - -Flash devices -------------- - -============ ========================================================== -Driver Name -============ ========================================================== -adp1653 ADP1653 flash -lm3560 LM3560 dual flash driver -lm3646 LM3646 dual flash driver -============ ========================================================== - -IR I2C driver -------------- - -============ ========================================================== -Driver Name -============ ========================================================== -ir-kbd-i2c I2C module for IR -============ ========================================================== - -Lens drivers ------------- - -============ ========================================================== -Driver Name -============ ========================================================== -ad5820 AD5820 lens voice coil -ak7375 AK7375 lens voice coil -dw9714 DW9714 lens voice coil -dw9807-vcm DW9807 lens voice coil -============ ========================================================== - -Miscellaneous helper chips --------------------------- - -============ ========================================================== -Driver Name -============ ========================================================== -video-i2c I2C transport video -m52790 Mitsubishi M52790 A/V switch -st-mipid02 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge -ths7303 THS7303/53 Video Amplifier -============ ========================================================== - -RDS decoders ------------- - -============ ========================================================== -Driver Name -============ ========================================================== -saa6588 SAA6588 Radio Chip RDS decoder -============ ========================================================== - -SDR tuner chips ---------------- - -============ ========================================================== -Driver Name -============ ========================================================== -max2175 Maxim 2175 RF to Bits tuner -============ ========================================================== - -Video and audio decoders ------------------------- - -============ ========================================================== -Driver Name -============ ========================================================== -cx25840 Conexant CX2584x audio/video decoders -saa717x Philips SAA7171/3/4 audio/video decoders -============ ========================================================== - -Video decoders --------------- - -============ ========================================================== -Driver Name -============ ========================================================== -adv7180 Analog Devices ADV7180 decoder -adv7183 Analog Devices ADV7183 decoder -adv748x Analog Devices ADV748x decoder -adv7604 Analog Devices ADV7604 decoder -adv7842 Analog Devices ADV7842 decoder -bt819 BT819A VideoStream decoder -bt856 BT856 VideoStream decoder -bt866 BT866 VideoStream decoder -ks0127 KS0127 video decoder -ml86v7667 OKI ML86V7667 video decoder -saa7110 Philips SAA7110 video decoder -saa7115 Philips SAA7111/3/4/5 video decoders -tc358743 Toshiba TC358743 decoder -tvp514x Texas Instruments TVP514x video decoder -tvp5150 Texas Instruments TVP5150 video decoder -tvp7002 Texas Instruments TVP7002 video decoder -tw2804 Techwell TW2804 multiple video decoder -tw9903 Techwell TW9903 video decoder -tw9906 Techwell TW9906 video decoder -tw9910 Techwell TW9910 video decoder -vpx3220 vpx3220a, vpx3216b & vpx3214c video decoders -============ ========================================================== - -Video encoders --------------- - -============ ========================================================== -Driver Name -============ ========================================================== -ad9389b Analog Devices AD9389B encoder -adv7170 Analog Devices ADV7170 video encoder -adv7175 Analog Devices ADV7175 video encoder -adv7343 ADV7343 video encoder -adv7393 ADV7393 video encoder -adv7511-v4l2 Analog Devices ADV7511 encoder -ak881x AK8813/AK8814 video encoders -saa7127 Philips SAA7127/9 digital video encoders -saa7185 Philips SAA7185 video encoder -ths8200 Texas Instruments THS8200 video encoder -============ ========================================================== - -Video improvement chips ------------------------ - -============ ========================================================== -Driver Name -============ ========================================================== -upd64031a NEC Electronics uPD64031A Ghost Reduction -upd64083 NEC Electronics uPD64083 3-Dimensional Y/C separation -============ ========================================================== - -Tuner drivers -------------- - -============ ================================================== -Driver Name -============ ================================================== -e4000 Elonics E4000 silicon tuner -fc0011 Fitipower FC0011 silicon tuner -fc0012 Fitipower FC0012 silicon tuner -fc0013 Fitipower FC0013 silicon tuner -fc2580 FCI FC2580 silicon tuner -it913x ITE Tech IT913x silicon tuner -m88rs6000t Montage M88RS6000 internal tuner -max2165 Maxim MAX2165 silicon tuner -mc44s803 Freescale MC44S803 Low Power CMOS Broadband tuners -msi001 Mirics MSi001 -mt2060 Microtune MT2060 silicon IF tuner -mt2063 Microtune MT2063 silicon IF tuner -mt20xx Microtune 2032 / 2050 tuners -mt2131 Microtune MT2131 silicon tuner -mt2266 Microtune MT2266 silicon tuner -mxl301rf MaxLinear MxL301RF tuner -mxl5005s MaxLinear MSL5005S silicon tuner -mxl5007t MaxLinear MxL5007T silicon tuner -qm1d1b0004 Sharp QM1D1B0004 tuner -qm1d1c0042 Sharp QM1D1C0042 tuner -qt1010 Quantek QT1010 silicon tuner -r820t Rafael Micro R820T silicon tuner -si2157 Silicon Labs Si2157 silicon tuner -tuner-types Simple tuner support -tda18212 NXP TDA18212 silicon tuner -tda18218 NXP TDA18218 silicon tuner -tda18250 NXP TDA18250 silicon tuner -tda18271 NXP TDA18271 silicon tuner -tda827x Philips TDA827X silicon tuner -tda8290 TDA 8290/8295 + 8275(a)/18271 tuner combo -tda9887 TDA 9885/6/7 analog IF demodulator -tea5761 TEA 5761 radio tuner -tea5767 TEA 5767 radio tuner -tua9001 Infineon TUA9001 silicon tuner -tuner-xc2028 XCeive xc2028/xc3028 tuners -xc4000 Xceive XC4000 silicon tuner -xc5000 Xceive XC5000 silicon tuner -============ ================================================== - -.. toctree:: - :maxdepth: 1 - - tuner-cardlist - frontend-cardlist - -Test drivers -============ - -In order to test userspace applications, there's a number of virtual -drivers, with provide test functionality, simulating real hardware -devices: - -======= ====================================== -Driver Name -======= ====================================== -vicodec Virtual Codec Driver -vim2m Virtual Memory-to-Memory Driver -vimc Virtual Media Controller Driver (VIMC) -vivid Virtual Video Test Driver -======= ====================================== + :maxdepth: 2 + + usb-cardlist + pci-cardlist + platform-cardlist + radio-cardlist + i2c-cardlist + misc-cardlist diff --git a/Documentation/admin-guide/media/i2c-cardlist.rst b/Documentation/admin-guide/media/i2c-cardlist.rst new file mode 100644 index 0000000000000..e60d459d18a91 --- /dev/null +++ b/Documentation/admin-guide/media/i2c-cardlist.rst @@ -0,0 +1,290 @@ +.. SPDX-License-Identifier: GPL-2.0 + +I²C drivers +=========== + +The I²C (Inter-Integrated Circuit) bus is a three-wires bus used internally +at the media cards for communication between different chips. While the bus +is not visible to the Linux Kernel, drivers need to send and receive +commands via the bus. The Linux Kernel driver abstraction has support to +implement different drivers for each component inside an I²C bus, as if +the bus were visible to the main system board. + +One of the problems with I²C devices is that sometimes the same device may +work with different I²C hardware. This is common, for example, on devices +that comes with a tuner for North America market, and another one for +Europe. Some drivers have a ``tuner=`` modprobe parameter to allow using a +different tuner number in order to address such issue. + +The current supported of I²C drivers (not including staging drivers) are +listed below. + +Audio decoders, processors and mixers +------------------------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +cs3308 Cirrus Logic CS3308 audio ADC +cs5345 Cirrus Logic CS5345 audio ADC +cs53l32a Cirrus Logic CS53L32A audio ADC +msp3400 Micronas MSP34xx audio decoders +sony-btf-mpx Sony BTF's internal MPX +tda1997x NXP TDA1997x HDMI receiver +tda7432 Philips TDA7432 audio processor +tda9840 Philips TDA9840 audio processor +tea6415c Philips TEA6415C audio processor +tea6420 Philips TEA6420 audio processor +tlv320aic23b Texas Instruments TLV320AIC23B audio codec +tvaudio Simple audio decoder chips +uda1342 Philips UDA1342 audio codec +vp27smpx Panasonic VP27's internal MPX +wm8739 Wolfson Microelectronics WM8739 stereo audio ADC +wm8775 Wolfson Microelectronics WM8775 audio ADC with input mixer +============ ========================================================== + +Audio/Video compression chips +----------------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +saa6752hs Philips SAA6752HS MPEG-2 Audio/Video Encoder +============ ========================================================== + +Camera sensor devices +--------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +et8ek8 ET8EK8 camera sensor +hi556 Hynix Hi-556 sensor +imx214 Sony IMX214 sensor +imx219 Sony IMX219 sensor +imx258 Sony IMX258 sensor +imx274 Sony IMX274 sensor +imx290 Sony IMX290 sensor +imx319 Sony IMX319 sensor +imx355 Sony IMX355 sensor +m5mols Fujitsu M-5MOLS 8MP sensor +mt9m001 mt9m001 +mt9m032 MT9M032 camera sensor +mt9m111 mt9m111, mt9m112 and mt9m131 +mt9p031 Aptina MT9P031 +mt9t001 Aptina MT9T001 +mt9t112 Aptina MT9T111/MT9T112 +mt9v011 Micron mt9v011 sensor +mt9v032 Micron MT9V032 sensor +mt9v111 Aptina MT9V111 sensor +noon010pc30 Siliconfile NOON010PC30 sensor +ov13858 OmniVision OV13858 sensor +ov2640 OmniVision OV2640 sensor +ov2659 OmniVision OV2659 sensor +ov2680 OmniVision OV2680 sensor +ov2685 OmniVision OV2685 sensor +ov5640 OmniVision OV5640 sensor +ov5645 OmniVision OV5645 sensor +ov5647 OmniVision OV5647 sensor +ov5670 OmniVision OV5670 sensor +ov5675 OmniVision OV5675 sensor +ov5695 OmniVision OV5695 sensor +ov6650 OmniVision OV6650 sensor +ov7251 OmniVision OV7251 sensor +ov7640 OmniVision OV7640 sensor +ov7670 OmniVision OV7670 sensor +ov772x OmniVision OV772x sensor +ov7740 OmniVision OV7740 sensor +ov8856 OmniVision OV8856 sensor +ov9640 OmniVision OV9640 sensor +ov9650 OmniVision OV9650/OV9652 sensor +rj54n1cb0c Sharp RJ54N1CB0C sensor +s5c73m3 Samsung S5C73M3 sensor +s5k4ecgx Samsung S5K4ECGX sensor +s5k5baf Samsung S5K5BAF sensor +s5k6a3 Samsung S5K6A3 sensor +s5k6aa Samsung S5K6AAFX sensor +smiapp SMIA++/SMIA sensor +sr030pc30 Siliconfile SR030PC30 sensor +vs6624 ST VS6624 sensor +============ ========================================================== + +Flash devices +------------- + +============ ========================================================== +Driver Name +============ ========================================================== +adp1653 ADP1653 flash +lm3560 LM3560 dual flash driver +lm3646 LM3646 dual flash driver +============ ========================================================== + +IR I2C driver +------------- + +============ ========================================================== +Driver Name +============ ========================================================== +ir-kbd-i2c I2C module for IR +============ ========================================================== + +Lens drivers +------------ + +============ ========================================================== +Driver Name +============ ========================================================== +ad5820 AD5820 lens voice coil +ak7375 AK7375 lens voice coil +dw9714 DW9714 lens voice coil +dw9807-vcm DW9807 lens voice coil +============ ========================================================== + +Miscellaneous helper chips +-------------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +video-i2c I2C transport video +m52790 Mitsubishi M52790 A/V switch +st-mipid02 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge +ths7303 THS7303/53 Video Amplifier +============ ========================================================== + +RDS decoders +------------ + +============ ========================================================== +Driver Name +============ ========================================================== +saa6588 SAA6588 Radio Chip RDS decoder +============ ========================================================== + +SDR tuner chips +--------------- + +============ ========================================================== +Driver Name +============ ========================================================== +max2175 Maxim 2175 RF to Bits tuner +============ ========================================================== + +Video and audio decoders +------------------------ + +============ ========================================================== +Driver Name +============ ========================================================== +cx25840 Conexant CX2584x audio/video decoders +saa717x Philips SAA7171/3/4 audio/video decoders +============ ========================================================== + +Video decoders +-------------- + +============ ========================================================== +Driver Name +============ ========================================================== +adv7180 Analog Devices ADV7180 decoder +adv7183 Analog Devices ADV7183 decoder +adv748x Analog Devices ADV748x decoder +adv7604 Analog Devices ADV7604 decoder +adv7842 Analog Devices ADV7842 decoder +bt819 BT819A VideoStream decoder +bt856 BT856 VideoStream decoder +bt866 BT866 VideoStream decoder +ks0127 KS0127 video decoder +ml86v7667 OKI ML86V7667 video decoder +saa7110 Philips SAA7110 video decoder +saa7115 Philips SAA7111/3/4/5 video decoders +tc358743 Toshiba TC358743 decoder +tvp514x Texas Instruments TVP514x video decoder +tvp5150 Texas Instruments TVP5150 video decoder +tvp7002 Texas Instruments TVP7002 video decoder +tw2804 Techwell TW2804 multiple video decoder +tw9903 Techwell TW9903 video decoder +tw9906 Techwell TW9906 video decoder +tw9910 Techwell TW9910 video decoder +vpx3220 vpx3220a, vpx3216b & vpx3214c video decoders +============ ========================================================== + +Video encoders +-------------- + +============ ========================================================== +Driver Name +============ ========================================================== +ad9389b Analog Devices AD9389B encoder +adv7170 Analog Devices ADV7170 video encoder +adv7175 Analog Devices ADV7175 video encoder +adv7343 ADV7343 video encoder +adv7393 ADV7393 video encoder +adv7511-v4l2 Analog Devices ADV7511 encoder +ak881x AK8813/AK8814 video encoders +saa7127 Philips SAA7127/9 digital video encoders +saa7185 Philips SAA7185 video encoder +ths8200 Texas Instruments THS8200 video encoder +============ ========================================================== + +Video improvement chips +----------------------- + +============ ========================================================== +Driver Name +============ ========================================================== +upd64031a NEC Electronics uPD64031A Ghost Reduction +upd64083 NEC Electronics uPD64083 3-Dimensional Y/C separation +============ ========================================================== + +Tuner drivers +------------- + +============ ================================================== +Driver Name +============ ================================================== +e4000 Elonics E4000 silicon tuner +fc0011 Fitipower FC0011 silicon tuner +fc0012 Fitipower FC0012 silicon tuner +fc0013 Fitipower FC0013 silicon tuner +fc2580 FCI FC2580 silicon tuner +it913x ITE Tech IT913x silicon tuner +m88rs6000t Montage M88RS6000 internal tuner +max2165 Maxim MAX2165 silicon tuner +mc44s803 Freescale MC44S803 Low Power CMOS Broadband tuners +msi001 Mirics MSi001 +mt2060 Microtune MT2060 silicon IF tuner +mt2063 Microtune MT2063 silicon IF tuner +mt20xx Microtune 2032 / 2050 tuners +mt2131 Microtune MT2131 silicon tuner +mt2266 Microtune MT2266 silicon tuner +mxl301rf MaxLinear MxL301RF tuner +mxl5005s MaxLinear MSL5005S silicon tuner +mxl5007t MaxLinear MxL5007T silicon tuner +qm1d1b0004 Sharp QM1D1B0004 tuner +qm1d1c0042 Sharp QM1D1C0042 tuner +qt1010 Quantek QT1010 silicon tuner +r820t Rafael Micro R820T silicon tuner +si2157 Silicon Labs Si2157 silicon tuner +tuner-types Simple tuner support +tda18212 NXP TDA18212 silicon tuner +tda18218 NXP TDA18218 silicon tuner +tda18250 NXP TDA18250 silicon tuner +tda18271 NXP TDA18271 silicon tuner +tda827x Philips TDA827X silicon tuner +tda8290 TDA 8290/8295 + 8275(a)/18271 tuner combo +tda9887 TDA 9885/6/7 analog IF demodulator +tea5761 TEA 5761 radio tuner +tea5767 TEA 5767 radio tuner +tua9001 Infineon TUA9001 silicon tuner +tuner-xc2028 XCeive xc2028/xc3028 tuners +xc4000 Xceive XC4000 silicon tuner +xc5000 Xceive XC5000 silicon tuner +============ ================================================== + +.. toctree:: + :maxdepth: 1 + + tuner-cardlist + frontend-cardlist diff --git a/Documentation/admin-guide/media/misc-cardlist.rst b/Documentation/admin-guide/media/misc-cardlist.rst new file mode 100644 index 0000000000000..4c26bcfccd612 --- /dev/null +++ b/Documentation/admin-guide/media/misc-cardlist.rst @@ -0,0 +1,28 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Firewire driver +=============== + +The media subsystem also provides a firewire driver for digital TV: + +======= ===================== +Driver Name +======= ===================== +firedtv FireDTV and FloppyDTV +======= ===================== + +Test drivers +============ + +In order to test userspace applications, there's a number of virtual +drivers, with provide test functionality, simulating real hardware +devices: + +======= ====================================== +Driver Name +======= ====================================== +vicodec Virtual Codec Driver +vim2m Virtual Memory-to-Memory Driver +vimc Virtual Media Controller Driver (VIMC) +vivid Virtual Video Test Driver +======= ====================================== diff --git a/Documentation/admin-guide/media/pci-cardlist.rst b/Documentation/admin-guide/media/pci-cardlist.rst new file mode 100644 index 0000000000000..434fe996b5417 --- /dev/null +++ b/Documentation/admin-guide/media/pci-cardlist.rst @@ -0,0 +1,107 @@ +.. SPDX-License-Identifier: GPL-2.0 + +PCI drivers +=========== + +The PCI boards are identified by an identification called PCI ID. The PCI ID +is actually composed by two parts: + + - Vendor ID and device ID; + - Subsystem ID and Subsystem device ID; + +The ``lspci -nn`` command allows identifying the vendor/device PCI IDs: + +.. code-block:: none + :emphasize-lines: 3 + + $ lspci -nn + ... + 00:0a.0 Multimedia controller [0480]: Philips Semiconductors SAA7131/SAA7133/SAA7135 Video Broadcast Decoder [1131:7133] (rev d1) + 00:0b.0 Multimedia controller [0480]: Brooktree Corporation Bt878 Audio Capture [109e:0878] (rev 11) + 01:00.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23887/8 PCIe Broadcast Audio and Video Decoder with 3D Comb [14f1:8880] (rev 0f) + 02:01.0 Multimedia video controller [0400]: Internext Compression Inc iTVC15 (CX23415) Video Decoder [4444:0803] (rev 01) + 02:02.0 Multimedia video controller [0400]: Conexant Systems, Inc. CX23418 Single-Chip MPEG-2 Encoder with Integrated Analog Video/Broadcast Audio Decoder [14f1:5b7a] + 02:03.0 Multimedia video controller [0400]: Brooktree Corporation Bt878 Video Capture [109e:036e] (rev 11) + ... + +The subsystem IDs can be obtained using ``lspci -vn`` + +.. code-block:: none + :emphasize-lines: 4 + + $ lspci -vn + ... + 00:0a.0 0480: 1131:7133 (rev d1) + Subsystem: 1461:f01d + Flags: bus master, medium devsel, latency 32, IRQ 209 + Memory at e2002000 (32-bit, non-prefetchable) [size=2K] + Capabilities: [40] Power Management version 2 + ... + +At the above example, the first card uses the ``saa7134`` driver, and +has a vendor/device PCI ID equal to ``1131:7133`` and a PCI subsystem +ID equal to ``1461:f01d`` (see :doc:`Saa7134 card list`). + +Unfortunately, sometimes the same PCI subsystem ID is used by different +products. So, several media drivers allow passing a ``card=`` parameter, +in order to setup a card number that would match the correct settings for +an specific board. + +The current supported PCI/PCIe cards (not including staging drivers) are +listed below\ [#]_. + +.. [#] some of the drivers have sub-drivers, not shown at this table + +================ ======================================================== +Driver Name +================ ======================================================== +altera-ci Altera FPGA based CI module +b2c2-flexcop-pci Technisat/B2C2 Air/Sky/Cable2PC PCI +bt878 DVB/ATSC Support for bt878 based TV cards +bttv BT8x8 Video For Linux +cobalt Cisco Cobalt +cx18 Conexant cx23418 MPEG encoder +cx23885 Conexant cx23885 (2388x successor) +cx25821 Conexant cx25821 +cx88xx Conexant 2388x (bt878 successor) +ddbridge Digital Devices bridge +dm1105 SDMC DM1105 based PCI cards +dt3155 DT3155 frame grabber +dvb-ttpci AV7110 cards +earth-pt1 PT1 cards +earth-pt3 Earthsoft PT3 cards +hexium_gemini Hexium Gemini frame grabber +hexium_orion Hexium HV-PCI6 and Orion frame grabber +hopper HOPPER based cards +ipu3-cio2 Intel ipu3-cio2 driver +ivtv Conexant cx23416/cx23415 MPEG encoder/decoder +ivtvfb Conexant cx23415 framebuffer +mantis MANTIS based cards +meye Sony Vaio Picturebook Motion Eye +mxb Siemens-Nixdorf 'Multimedia eXtension Board' +netup-unidvb NetUP Universal DVB card +ngene Micronas nGene +pluto2 Pluto2 cards +saa7134 Philips SAA7134 +saa7164 NXP SAA7164 +smipcie SMI PCIe DVBSky cards +solo6x10 Bluecherry / Softlogic 6x10 capture cards (MPEG-4/H.264) +sta2x11_vip STA2X11 VIP Video For Linux +tw5864 Techwell TW5864 video/audio grabber and encoder +tw686x Intersil/Techwell TW686x +tw68 Techwell tw68x Video For Linux +================ ======================================================== + +Some of those drivers support multiple devices, as shown at the card +lists below: + +.. toctree:: + :maxdepth: 1 + + bttv-cardlist + cx18-cardlist + cx23885-cardlist + cx88-cardlist + ivtv-cardlist + saa7134-cardlist + saa7164-cardlist diff --git a/Documentation/admin-guide/media/platform-cardlist.rst b/Documentation/admin-guide/media/platform-cardlist.rst new file mode 100644 index 0000000000000..261e7772eb3ee --- /dev/null +++ b/Documentation/admin-guide/media/platform-cardlist.rst @@ -0,0 +1,90 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Platform drivers +================ + +There are several drivers that are focused on providing support for +functionality that are already included at the main board, and don't +use neither USB nor PCI bus. Those drivers are called platform +drivers, and are very popular on embedded devices. + +The current supported of platform drivers (not including staging drivers) are +listed below + +================= ============================================================ +Driver Name +================= ============================================================ +am437x-vpfe TI AM437x VPFE +aspeed-video Aspeed AST2400 and AST2500 +atmel-isc ATMEL Image Sensor Controller (ISC) +atmel-isi ATMEL Image Sensor Interface (ISI) +c8sectpfe SDR platform devices +c8sectpfe SDR platform devices +cafe_ccic Marvell 88ALP01 (Cafe) CMOS Camera Controller +cdns-csi2rx Cadence MIPI-CSI2 RX Controller +cdns-csi2tx Cadence MIPI-CSI2 TX Controller +coda-vpu Chips&Media Coda multi-standard codec IP +dm355_ccdc TI DM355 CCDC video capture +dm644x_ccdc TI DM6446 CCDC video capture +exynos-fimc-is EXYNOS4x12 FIMC-IS (Imaging Subsystem) +exynos-fimc-lite EXYNOS FIMC-LITE camera interface +exynos-gsc Samsung Exynos G-Scaler +exy Samsung S5P/EXYNOS4 SoC series Camera Subsystem +fsl-viu Freescale VIU +imx-pxp i.MX Pixel Pipeline (PXP) +isdf TI DM365 ISIF video capture +mmp_camera Marvell Armada 610 integrated camera controller +mtk_jpeg Mediatek JPEG Codec +mtk-mdp Mediatek MDP +mtk-vcodec-dec Mediatek Video Codec +mtk-vpu Mediatek Video Processor Unit +mx2_emmaprp MX2 eMMa-PrP +omap3-isp OMAP 3 Camera +omap-vout OMAP2/OMAP3 V4L2-Display +pxa_camera PXA27x Quick Capture Interface +qcom-camss Qualcomm V4L2 Camera Subsystem +rcar-csi2 R-Car MIPI CSI-2 Receiver +rcar_drif Renesas Digital Radio Interface (DRIF) +rcar-fcp Renesas Frame Compression Processor +rcar_fdp1 Renesas Fine Display Processor +rcar_jpu Renesas JPEG Processing Unit +rcar-vin R-Car Video Input (VIN) +renesas-ceu Renesas Capture Engine Unit (CEU) +rockchip-rga Rockchip Raster 2d Graphic Acceleration Unit +s3c-camif Samsung S3C24XX/S3C64XX SoC Camera Interface +s5p-csis S5P/EXYNOS MIPI-CSI2 receiver (MIPI-CSIS) +s5p-fimc S5P/EXYNOS4 FIMC/CAMIF camera interface +s5p-g2d Samsung S5P and EXYNOS4 G2D 2d graphics accelerator +s5p-jpeg Samsung S5P/Exynos3250/Exynos4 JPEG codec +s5p-mfc Samsung S5P MFC Video Codec +sh_veu SuperH VEU mem2mem video processing +sh_vou SuperH VOU video output +stm32-dcmi STM32 Digital Camera Memory Interface (DCMI) +sun4i-csi Allwinner A10 CMOS Sensor Interface Support +sun6i-csi Allwinner V3s Camera Sensor Interface +sun8i-di Allwinner Deinterlace +sun8i-rotate Allwinner DE2 rotation +ti-cal TI Memory-to-memory multimedia devices +ti-csc TI DVB platform devices +ti-vpe TI VPE (Video Processing Engine) +venus-enc Qualcomm Venus V4L2 encoder/decoder +via-camera VIAFB camera controller +video-mux Video Multiplexer +vpif_display TI DaVinci VPIF V4L2-Display +vpif_capture TI DaVinci VPIF video capture +vpss TI DaVinci VPBE V4L2-Display +vsp1 Renesas VSP1 Video Processing Engine +xilinx-tpg Xilinx Video Test Pattern Generator +xilinx-video Xilinx Video IP (EXPERIMENTAL) +xilinx-vtc Xilinx Video Timing Controller +================= ============================================================ + +MMC/SDIO DVB adapters +--------------------- + +======= =========================================== +Driver Name +======= =========================================== +smssdio Siano SMS1xxx based MDTV via SDIO interface +======= =========================================== + diff --git a/Documentation/admin-guide/media/radio-cardlist.rst b/Documentation/admin-guide/media/radio-cardlist.rst new file mode 100644 index 0000000000000..a82a146bf9126 --- /dev/null +++ b/Documentation/admin-guide/media/radio-cardlist.rst @@ -0,0 +1,44 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Radio drivers +============= + +There is also support for pure AM/FM radio, and even for some FM radio +transmitters: + +===================== ========================================================= +Driver Name +===================== ========================================================= +si4713 Silicon Labs Si4713 FM Radio Transmitter +radio-aztech Aztech/Packard Bell Radio +radio-cadet ADS Cadet AM/FM Tuner +radio-gemtek GemTek Radio card (or compatible) +radio-maxiradio Guillemot MAXI Radio FM 2000 radio +radio-miropcm20 miroSOUND PCM20 radio +radio-aimslab AIMSlab RadioTrack (aka RadioReveal) +radio-rtrack2 AIMSlab RadioTrack II +saa7706h SAA7706H Car Radio DSP +radio-sf16fmi SF16-FMI/SF16-FMP/SF16-FMD Radio +radio-sf16fmr2 SF16-FMR2/SF16-FMD2 Radio +radio-shark Griffin radioSHARK USB radio receiver +shark2 Griffin radioSHARK2 USB radio receiver +radio-si470x-common Silicon Labs Si470x FM Radio Receiver +radio-si476x Silicon Laboratories Si476x I2C FM Radio +radio-tea5764 TEA5764 I2C FM radio +tef6862 TEF6862 Car Radio Enhanced Selectivity Tuner +radio-terratec TerraTec ActiveRadio ISA Standalone +radio-timb Enable the Timberdale radio driver +radio-trust Trust FM radio card +radio-typhoon Typhoon Radio (a.k.a. EcoRadio) +radio-wl1273 Texas Instruments WL1273 I2C FM Radio +fm_drv ISA radio devices +fm_drv ISA radio devices +radio-zoltrix Zoltrix Radio +dsbr100 D-Link/GemTek USB FM radio +radio-keene Keene FM Transmitter USB +radio-ma901 Masterkit MA901 USB FM radio +radio-mr800 AverMedia MR 800 USB FM radio +radio-raremono Thanko's Raremono AM/FM/SW radio +radio-si470x-usb Silicon Labs Si470x FM Radio Receiver support with USB +radio-usb-si4713 Silicon Labs Si4713 FM Radio Transmitter support with USB +===================== ========================================================= diff --git a/Documentation/admin-guide/media/usb-cardlist.rst b/Documentation/admin-guide/media/usb-cardlist.rst new file mode 100644 index 0000000000000..546fd40da4c3a --- /dev/null +++ b/Documentation/admin-guide/media/usb-cardlist.rst @@ -0,0 +1,157 @@ +.. SPDX-License-Identifier: GPL-2.0 + +USB drivers +=========== + +The USB boards are identified by an identification called USB ID. + +The ``lsusb`` command allows identifying the USB IDs:: + + $ lsusb + ... + Bus 001 Device 015: ID 046d:082d Logitech, Inc. HD Pro Webcam C920 + Bus 001 Device 074: ID 2040:b131 Hauppauge + Bus 001 Device 075: ID 2013:024f PCTV Systems nanoStick T2 290e + ... + +Newer camera devices use a standard way to expose themselves as such, +via USB Video Class. Those cameras are automatically supported by the +``uvc-driver``. + +Older cameras and TV USB devices uses USB Vendor Classes: each vendor +defines its own way to access the device. This section contains +card lists for such vendor-class devices. + +While this is not as common as on PCI, sometimes the same USB ID is used +by different products. So, several media drivers allow passing a ``card=`` +parameter, in order to setup a card number that would match the correct +settings for an specific product type. + +The current supported USB cards (not including staging drivers) are +listed below\ [#]_. + +.. [#] + + some of the drivers have sub-drivers, not shown at this table. + In particular, gspca driver has lots of sub-drivers, + for cameras not supported by the USB Video Class (UVC) driver, + as shown at :doc:`gspca card list `. + +====================== ========================================================= +Driver Name +====================== ========================================================= +airspy AirSpy +au0828 Auvitek AU0828 +b2c2-flexcop-usb Technisat/B2C2 Air/Sky/Cable2PC USB +cpia2 CPiA2 Video For Linux +cx231xx Conexant cx231xx USB video capture +dvb-as102 Abilis AS102 DVB receiver +dvb-ttusb-budget Technotrend/Hauppauge Nova - USB devices +dvb-usb-a800 AVerMedia AverTV DVB-T USB 2.0 (A800) +dvb-usb-af9005 Afatech AF9005 DVB-T USB1.1 +dvb-usb-af9015 Afatech AF9015 DVB-T USB2.0 +dvb-usb-af9035 Afatech AF9035 DVB-T USB2.0 +dvb-usb-anysee Anysee DVB-T/C USB2.0 +dvb-usb-au6610 Alcor Micro AU6610 USB2.0 +dvb-usb-az6007 AzureWave 6007 and clones DVB-T/C USB2.0 +dvb-usb-az6027 Azurewave DVB-S/S2 USB2.0 AZ6027 +dvb-usb-ce6230 Intel CE6230 DVB-T USB2.0 +dvb-usb-cinergyT2 Terratec CinergyT2/qanu USB 2.0 DVB-T +dvb-usb-cxusb Conexant USB2.0 hybrid +dvb-usb-dib0700 DiBcom DiB0700 +dvb-usb-dibusb-common DiBcom DiB3000M-B +dvb-usb-dibusb-mc DiBcom DiB3000M-C/P +dvb-usb-digitv Nebula Electronics uDigiTV DVB-T USB2.0 +dvb-usb-dtt200u WideView WT-200U and WT-220U (pen) DVB-T +dvb-usb-dtv5100 AME DTV-5100 USB2.0 DVB-T +dvb-usb-dvbsky DVBSky USB +dvb-usb-dw2102 DvbWorld & TeVii DVB-S/S2 USB2.0 +dvb-usb-ec168 E3C EC168 DVB-T USB2.0 +dvb-usb-gl861 Genesys Logic GL861 USB2.0 +dvb-usb-gp8psk GENPIX 8PSK->USB module +dvb-usb-lmedm04 LME DM04/QQBOX DVB-S USB2.0 +dvb-usb-m920x Uli m920x DVB-T USB2.0 +dvb-usb-nova-t-usb2 Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 +dvb-usb-opera Opera1 DVB-S USB2.0 receiver +dvb-usb-pctv452e Pinnacle PCTV HDTV Pro USB device/TT Connect S2-3600 +dvb-usb-rtl28xxu Realtek RTL28xxU DVB USB +dvb-usb-technisat-usb2 Technisat DVB-S/S2 USB2.0 +dvb-usb-ttusb2 Pinnacle 400e DVB-S USB2.0 +dvb-usb-umt-010 HanfTek UMT-010 DVB-T USB2.0 +dvb_usb_v2 Support for various USB DVB devices v2 +dvb-usb-vp702x TwinhanDTV StarBox and clones DVB-S USB2.0 +dvb-usb-vp7045 TwinhanDTV Alpha/MagicBoxII, DNTV tinyUSB2, Beetle USB2.0 +em28xx Empia EM28xx USB devices +go7007 WIS GO7007 MPEG encoder +gspca Drivers for several USB Cameras +hackrf HackRF +hdpvr Hauppauge HD PVR +msi2500 Mirics MSi2500 +mxl111sf-tuner MxL111SF DTV USB2.0 +pvrusb2 Hauppauge WinTV-PVR USB2 +pwc USB Philips Cameras +s2250 Sensoray 2250/2251 +s2255drv USB Sensoray 2255 video capture device +smsusb Siano SMS1xxx based MDTV receiver +stkwebcam USB Syntek DC1125 Camera +tm6000-alsa TV Master TM5600/6000/6010 audio +tm6000-dvb DVB Support for tm6000 based TV cards +tm6000 TV Master TM5600/6000/6010 driver +ttusb_dec Technotrend/Hauppauge USB DEC devices +usbtv USBTV007 video capture +uvcvideo USB Video Class (UVC) +zd1301 ZyDAS ZD1301 +zr364xx USB ZR364XX Camera +====================== ========================================================= + +.. toctree:: + :maxdepth: 1 + + au0828-cardlist + cx231xx-cardlist + em28xx-cardlist + tm6000-cardlist + siano-cardlist + usbvision-cardlist + + gspca-cardlist + + dvb-usb-dib0700-cardlist + dvb-usb-dibusb-mb-cardlist + dvb-usb-dibusb-mc-cardlist + + dvb-usb-a800-cardlist + dvb-usb-af9005-cardlist + dvb-usb-az6027-cardlist + dvb-usb-cinergyT2-cardlist + dvb-usb-cxusb-cardlist + dvb-usb-digitv-cardlist + dvb-usb-dtt200u-cardlist + dvb-usb-dtv5100-cardlist + dvb-usb-dw2102-cardlist + dvb-usb-gp8psk-cardlist + dvb-usb-m920x-cardlist + dvb-usb-nova-t-usb2-cardlist + dvb-usb-opera1-cardlist + dvb-usb-pctv452e-cardlist + dvb-usb-technisat-usb2-cardlist + dvb-usb-ttusb2-cardlist + dvb-usb-umt-010-cardlist + dvb-usb-vp702x-cardlist + dvb-usb-vp7045-cardlist + + dvb-usb-af9015-cardlist + dvb-usb-af9035-cardlist + dvb-usb-anysee-cardlist + dvb-usb-au6610-cardlist + dvb-usb-az6007-cardlist + dvb-usb-ce6230-cardlist + dvb-usb-dvbsky-cardlist + dvb-usb-ec168-cardlist + dvb-usb-gl861-cardlist + dvb-usb-lmedm04-cardlist + dvb-usb-mxl111sf-cardlist + dvb-usb-rtl28xxu-cardlist + dvb-usb-zd1301-cardlist + + other-usb-cardlist -- GitLab From f645e6256bd1b12523b759fcc610861fb21c24c7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Date: Tue, 21 Apr 2020 15:57:38 +0200 Subject: [PATCH 320/503] media: v4l2-dev/ioctl: Add V4L2_CAP_IO_MC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a video device capability flag to indicate that its inputs and/or outputs are controlled by the Media Controller instead of the V4L2 API. When this flag is set, ioctl for enum inputs and outputs are automatically enabled and programmed to call a helper function. Suggested-by: Hans Verkuil Signed-off-by: Helen Koike Signed-off-by: Niklas Söderlund Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l/vidioc-querycap.rst | 6 ++ .../media/videodev2.h.rst.exceptions | 1 + drivers/media/v4l2-core/v4l2-dev.c | 25 ++++++-- drivers/media/v4l2-core/v4l2-ioctl.c | 57 +++++++++++++++++-- include/uapi/linux/videodev2.h | 2 + 5 files changed, 81 insertions(+), 10 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/vidioc-querycap.rst b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst index 28e1f766128c4..666ac4d420519 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-querycap.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-querycap.rst @@ -264,6 +264,12 @@ specification the ioctl returns an ``EINVAL`` error code. * - ``V4L2_CAP_TOUCH`` - 0x10000000 - This is a touch device. + * - ``V4L2_CAP_IO_MC`` + - 0x20000000 + - There is only one input and/or output seen from userspace. The whole + video topology configuration, including which I/O entity is routed to + the input/output, is configured by userspace via the Media Controller. + See :ref:`media_controller`. * - ``V4L2_CAP_DEVICE_CAPS`` - 0x80000000 - The driver fills the ``device_caps`` field. This capability can diff --git a/Documentation/userspace-api/media/videodev2.h.rst.exceptions b/Documentation/userspace-api/media/videodev2.h.rst.exceptions index cb6ccf91776e6..a625fb90e3a98 100644 --- a/Documentation/userspace-api/media/videodev2.h.rst.exceptions +++ b/Documentation/userspace-api/media/videodev2.h.rst.exceptions @@ -176,6 +176,7 @@ replace define V4L2_CAP_STREAMING device-capabilities replace define V4L2_CAP_META_OUTPUT device-capabilities replace define V4L2_CAP_DEVICE_CAPS device-capabilities replace define V4L2_CAP_TOUCH device-capabilities +replace define V4L2_CAP_IO_MC device-capabilities # V4L2 pix flags replace define V4L2_PIX_FMT_PRIV_MAGIC :c:type:`v4l2_pix_format` diff --git a/drivers/media/v4l2-core/v4l2-dev.c b/drivers/media/v4l2-core/v4l2-dev.c index 97b6a3af13614..a593ea0598b55 100644 --- a/drivers/media/v4l2-core/v4l2-dev.c +++ b/drivers/media/v4l2-core/v4l2-dev.c @@ -552,6 +552,7 @@ static void determine_valid_ioctls(struct video_device *vdev) (vdev->device_caps & meta_caps); bool is_rx = vdev->vfl_dir != VFL_DIR_TX; bool is_tx = vdev->vfl_dir != VFL_DIR_RX; + bool is_io_mc = vdev->device_caps & V4L2_CAP_IO_MC; bitmap_zero(valid_ioctls, BASE_VIDIOC_PRIVATE); @@ -725,9 +726,15 @@ static void determine_valid_ioctls(struct video_device *vdev) SET_VALID_IOCTL(ops, VIDIOC_G_STD, vidioc_g_std); if (is_rx) { SET_VALID_IOCTL(ops, VIDIOC_QUERYSTD, vidioc_querystd); - SET_VALID_IOCTL(ops, VIDIOC_ENUMINPUT, vidioc_enum_input); - SET_VALID_IOCTL(ops, VIDIOC_G_INPUT, vidioc_g_input); - SET_VALID_IOCTL(ops, VIDIOC_S_INPUT, vidioc_s_input); + if (is_io_mc) { + set_bit(_IOC_NR(VIDIOC_ENUMINPUT), valid_ioctls); + set_bit(_IOC_NR(VIDIOC_G_INPUT), valid_ioctls); + set_bit(_IOC_NR(VIDIOC_S_INPUT), valid_ioctls); + } else { + SET_VALID_IOCTL(ops, VIDIOC_ENUMINPUT, vidioc_enum_input); + SET_VALID_IOCTL(ops, VIDIOC_G_INPUT, vidioc_g_input); + SET_VALID_IOCTL(ops, VIDIOC_S_INPUT, vidioc_s_input); + } SET_VALID_IOCTL(ops, VIDIOC_ENUMAUDIO, vidioc_enumaudio); SET_VALID_IOCTL(ops, VIDIOC_G_AUDIO, vidioc_g_audio); SET_VALID_IOCTL(ops, VIDIOC_S_AUDIO, vidioc_s_audio); @@ -735,9 +742,15 @@ static void determine_valid_ioctls(struct video_device *vdev) SET_VALID_IOCTL(ops, VIDIOC_S_EDID, vidioc_s_edid); } if (is_tx) { - SET_VALID_IOCTL(ops, VIDIOC_ENUMOUTPUT, vidioc_enum_output); - SET_VALID_IOCTL(ops, VIDIOC_G_OUTPUT, vidioc_g_output); - SET_VALID_IOCTL(ops, VIDIOC_S_OUTPUT, vidioc_s_output); + if (is_io_mc) { + set_bit(_IOC_NR(VIDIOC_ENUMOUTPUT), valid_ioctls); + set_bit(_IOC_NR(VIDIOC_G_OUTPUT), valid_ioctls); + set_bit(_IOC_NR(VIDIOC_S_OUTPUT), valid_ioctls); + } else { + SET_VALID_IOCTL(ops, VIDIOC_ENUMOUTPUT, vidioc_enum_output); + SET_VALID_IOCTL(ops, VIDIOC_G_OUTPUT, vidioc_g_output); + SET_VALID_IOCTL(ops, VIDIOC_S_OUTPUT, vidioc_s_output); + } SET_VALID_IOCTL(ops, VIDIOC_ENUMAUDOUT, vidioc_enumaudout); SET_VALID_IOCTL(ops, VIDIOC_G_AUDOUT, vidioc_g_audout); SET_VALID_IOCTL(ops, VIDIOC_S_AUDOUT, vidioc_s_audout); diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 833e79a2cb98d..665b2bc7b7321 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1085,6 +1085,32 @@ static int v4l_querycap(const struct v4l2_ioctl_ops *ops, return ret; } +static int v4l_g_input(const struct v4l2_ioctl_ops *ops, + struct file *file, void *fh, void *arg) +{ + struct video_device *vfd = video_devdata(file); + + if (vfd->device_caps & V4L2_CAP_IO_MC) { + *(int *)arg = 0; + return 0; + } + + return ops->vidioc_g_input(file, fh, arg); +} + +static int v4l_g_output(const struct v4l2_ioctl_ops *ops, + struct file *file, void *fh, void *arg) +{ + struct video_device *vfd = video_devdata(file); + + if (vfd->device_caps & V4L2_CAP_IO_MC) { + *(int *)arg = 0; + return 0; + } + + return ops->vidioc_g_output(file, fh, arg); +} + static int v4l_s_input(const struct v4l2_ioctl_ops *ops, struct file *file, void *fh, void *arg) { @@ -1094,12 +1120,21 @@ static int v4l_s_input(const struct v4l2_ioctl_ops *ops, ret = v4l_enable_media_source(vfd); if (ret) return ret; + + if (vfd->device_caps & V4L2_CAP_IO_MC) + return *(int *)arg ? -EINVAL : 0; + return ops->vidioc_s_input(file, fh, *(unsigned int *)arg); } static int v4l_s_output(const struct v4l2_ioctl_ops *ops, struct file *file, void *fh, void *arg) { + struct video_device *vfd = video_devdata(file); + + if (vfd->device_caps & V4L2_CAP_IO_MC) + return *(int *)arg ? -EINVAL : 0; + return ops->vidioc_s_output(file, fh, *(unsigned int *)arg); } @@ -1143,6 +1178,14 @@ static int v4l_enuminput(const struct v4l2_ioctl_ops *ops, if (is_valid_ioctl(vfd, VIDIOC_S_STD)) p->capabilities |= V4L2_IN_CAP_STD; + if (vfd->device_caps & V4L2_CAP_IO_MC) { + if (p->index) + return -EINVAL; + strscpy(p->name, vfd->name, sizeof(p->name)); + p->type = V4L2_INPUT_TYPE_CAMERA; + return 0; + } + return ops->vidioc_enum_input(file, fh, p); } @@ -1161,6 +1204,14 @@ static int v4l_enumoutput(const struct v4l2_ioctl_ops *ops, if (is_valid_ioctl(vfd, VIDIOC_S_STD)) p->capabilities |= V4L2_OUT_CAP_STD; + if (vfd->device_caps & V4L2_CAP_IO_MC) { + if (p->index) + return -EINVAL; + strscpy(p->name, vfd->name, sizeof(p->name)); + p->type = V4L2_OUTPUT_TYPE_ANALOG; + return 0; + } + return ops->vidioc_enum_output(file, fh, p); } @@ -2683,10 +2734,8 @@ DEFINE_V4L_STUB_FUNC(expbuf) DEFINE_V4L_STUB_FUNC(g_std) DEFINE_V4L_STUB_FUNC(g_audio) DEFINE_V4L_STUB_FUNC(s_audio) -DEFINE_V4L_STUB_FUNC(g_input) DEFINE_V4L_STUB_FUNC(g_edid) DEFINE_V4L_STUB_FUNC(s_edid) -DEFINE_V4L_STUB_FUNC(g_output) DEFINE_V4L_STUB_FUNC(g_audout) DEFINE_V4L_STUB_FUNC(s_audout) DEFINE_V4L_STUB_FUNC(g_jpegcomp) @@ -2735,11 +2784,11 @@ static const struct v4l2_ioctl_info v4l2_ioctls[] = { IOCTL_INFO(VIDIOC_S_AUDIO, v4l_stub_s_audio, v4l_print_audio, INFO_FL_PRIO), IOCTL_INFO(VIDIOC_QUERYCTRL, v4l_queryctrl, v4l_print_queryctrl, INFO_FL_CTRL | INFO_FL_CLEAR(v4l2_queryctrl, id)), IOCTL_INFO(VIDIOC_QUERYMENU, v4l_querymenu, v4l_print_querymenu, INFO_FL_CTRL | INFO_FL_CLEAR(v4l2_querymenu, index)), - IOCTL_INFO(VIDIOC_G_INPUT, v4l_stub_g_input, v4l_print_u32, 0), + IOCTL_INFO(VIDIOC_G_INPUT, v4l_g_input, v4l_print_u32, 0), IOCTL_INFO(VIDIOC_S_INPUT, v4l_s_input, v4l_print_u32, INFO_FL_PRIO), IOCTL_INFO(VIDIOC_G_EDID, v4l_stub_g_edid, v4l_print_edid, INFO_FL_ALWAYS_COPY), IOCTL_INFO(VIDIOC_S_EDID, v4l_stub_s_edid, v4l_print_edid, INFO_FL_PRIO | INFO_FL_ALWAYS_COPY), - IOCTL_INFO(VIDIOC_G_OUTPUT, v4l_stub_g_output, v4l_print_u32, 0), + IOCTL_INFO(VIDIOC_G_OUTPUT, v4l_g_output, v4l_print_u32, 0), IOCTL_INFO(VIDIOC_S_OUTPUT, v4l_s_output, v4l_print_u32, INFO_FL_PRIO), IOCTL_INFO(VIDIOC_ENUMOUTPUT, v4l_enumoutput, v4l_print_enumoutput, INFO_FL_CLEAR(v4l2_output, index)), IOCTL_INFO(VIDIOC_G_AUDOUT, v4l_stub_g_audout, v4l_print_audioout, 0), diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 9817b7e2c968f..b18f3f7cde31c 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -487,6 +487,8 @@ struct v4l2_capability { #define V4L2_CAP_TOUCH 0x10000000 /* Is a touch device */ +#define V4L2_CAP_IO_MC 0x20000000 /* Is input/output controlled by the media controller */ + #define V4L2_CAP_DEVICE_CAPS 0x80000000 /* sets device capabilities field */ /* -- GitLab From b72f14ee7eb3e9e2f8a9c4cb807a1ec749a4c022 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 21 Apr 2020 15:57:39 +0200 Subject: [PATCH 321/503] media: pci: Fill v4l2_fmtdesc with designated initializers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace initialization of static const v4l2_fmtdesc instances that specify every struct member with designated initializers. This allows not zeroing the reserved fields explicitly, and will avoid a need to patch these drivers every time a reserved field is repurposed. Signed-off-by: Laurent Pinchart Reviewed-by: Niklas Söderlund Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/cx18/cx18-ioctl.c | 22 ++++++++++++++++------ drivers/media/pci/ivtv/ivtv-ioctl.c | 26 ++++++++++++++------------ 2 files changed, 30 insertions(+), 18 deletions(-) diff --git a/drivers/media/pci/cx18/cx18-ioctl.c b/drivers/media/pci/cx18/cx18-ioctl.c index fa57e12f2ac8f..4864def20676e 100644 --- a/drivers/media/pci/cx18/cx18-ioctl.c +++ b/drivers/media/pci/cx18/cx18-ioctl.c @@ -466,14 +466,24 @@ static int cx18_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtdesc *fmt) { static const struct v4l2_fmtdesc formats[] = { - { 0, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0, - "HM12 (YUV 4:1:1)", V4L2_PIX_FMT_HM12, { 0, 0, 0, 0 } + { + .index = 0, + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, + .description = "HM12 (YUV 4:1:1)", + .pixelformat = V4L2_PIX_FMT_HM12, }, - { 1, V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FMT_FLAG_COMPRESSED, - "MPEG", V4L2_PIX_FMT_MPEG, { 0, 0, 0, 0 } + { + .index = 1, + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, + .flags = V4L2_FMT_FLAG_COMPRESSED, + .description = "MPEG", + .pixelformat = V4L2_PIX_FMT_MPEG, }, - { 2, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0, - "UYVY 4:2:2", V4L2_PIX_FMT_UYVY, { 0, 0, 0, 0 } + { + .index = 2, + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, + .description = "UYVY 4:2:2", + .pixelformat = V4L2_PIX_FMT_UYVY, }, }; diff --git a/drivers/media/pci/ivtv/ivtv-ioctl.c b/drivers/media/pci/ivtv/ivtv-ioctl.c index 137853944e461..35dccb31174c1 100644 --- a/drivers/media/pci/ivtv/ivtv-ioctl.c +++ b/drivers/media/pci/ivtv/ivtv-ioctl.c @@ -920,14 +920,15 @@ static int ivtv_g_selection(struct file *file, void *fh, static int ivtv_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtdesc *fmt) { static const struct v4l2_fmtdesc hm12 = { - 0, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0, - "HM12 (YUV 4:2:0)", V4L2_PIX_FMT_HM12, - { 0, 0, 0, 0 } + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, + .description = "HM12 (YUV 4:2:0)", + .pixelformat = V4L2_PIX_FMT_HM12, }; static const struct v4l2_fmtdesc mpeg = { - 0, V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FMT_FLAG_COMPRESSED, - "MPEG", V4L2_PIX_FMT_MPEG, - { 0, 0, 0, 0 } + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, + .flags = V4L2_FMT_FLAG_COMPRESSED, + .description = "MPEG", + .pixelformat = V4L2_PIX_FMT_MPEG, }; struct ivtv *itv = fh2id(fh)->itv; struct ivtv_stream *s = &itv->streams[fh2id(fh)->type]; @@ -946,14 +947,15 @@ static int ivtv_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtdes static int ivtv_enum_fmt_vid_out(struct file *file, void *fh, struct v4l2_fmtdesc *fmt) { static const struct v4l2_fmtdesc hm12 = { - 0, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0, - "HM12 (YUV 4:2:0)", V4L2_PIX_FMT_HM12, - { 0, 0, 0, 0 } + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT, + .description = "HM12 (YUV 4:2:0)", + .pixelformat = V4L2_PIX_FMT_HM12, }; static const struct v4l2_fmtdesc mpeg = { - 0, V4L2_BUF_TYPE_VIDEO_OUTPUT, V4L2_FMT_FLAG_COMPRESSED, - "MPEG", V4L2_PIX_FMT_MPEG, - { 0, 0, 0, 0 } + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT, + .flags = V4L2_FMT_FLAG_COMPRESSED, + .description = "MPEG", + .pixelformat = V4L2_PIX_FMT_MPEG, }; struct ivtv *itv = fh2id(fh)->itv; struct ivtv_stream *s = &itv->streams[fh2id(fh)->type]; -- GitLab From e5b6b07a1b45dd9d19bec1fa1d60750b0fcf2fb0 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 24 Apr 2020 15:43:31 +0200 Subject: [PATCH 322/503] media: v4l2: Extend VIDIOC_ENUM_FMT to support MC-centric devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The VIDIOC_ENUM_FMT ioctl enumerates all formats supported by a video node. For MC-centric devices, its behaviour has always been ill-defined, with drivers implementing one of the following behaviours: - No support for VIDIOC_ENUM_FMT at all - Enumerating all formats supported by the video node, regardless of the configuration of the pipeline - Enumerating formats supported by the video node for the active configuration of the connected subdevice The first behaviour is obviously useless for applications. The second behaviour provides the most information, but doesn't offer a way to find what formats are compatible with a given pipeline configuration. The third behaviour fixes that, but with the drawback that applications can't enumerate all supported formats anymore, and have to modify the active configuration of the pipeline to enumerate formats. The situation is messy as none of the implemented behaviours are ideal, and userspace can't predict what will happen as the behaviour is driver-specific. To fix this, let's extend the VIDIOC_ENUM_FMT with a missing capability: enumerating pixel formats for a given media bus code. The media bus code is passed through the v4l2_fmtdesc structure in a new mbus_code field (repurposed from the reserved fields). With this capability in place, applications can enumerate pixel formats for a given media bus code without modifying the active configuration of the device. The current behaviour of the ioctl is preserved when the new mbus_code field is set to 0, ensuring compatibility with existing userspace. The API extension is documented as mandatory for MC-centric devices (as advertised through the V4L2_CAP_IO_MC capability), allowing applications and compliance tools to easily determine the availability of the VIDIOC_ENUM_FMT extension. Signed-off-by: Laurent Pinchart Acked-by: Sakari Ailus Signed-off-by: Niklas Söderlund Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l/vidioc-enum-fmt.rst | 27 +++++++++++++++---- drivers/media/v4l2-core/v4l2-ioctl.c | 13 +++++++-- include/uapi/linux/videodev2.h | 3 ++- 3 files changed, 35 insertions(+), 8 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst b/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst index 7e3142e11d77d..9694111772a2b 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst @@ -48,10 +48,21 @@ one until ``EINVAL`` is returned. If applicable, drivers shall return formats in preference order, where preferred formats are returned before (that is, with lower ``index`` value) less-preferred formats. -.. note:: - - After switching input or output the list of enumerated image - formats may be different. +If the driver doesn't advertise the ``V4L2_CAP_IO_MC`` :ref:`capability +`, applications shall initialize the ``mbus_code`` field +to zero and drivers shall ignore the value of the field. Drivers shall +enumerate all image formats. The enumerated formats may depend on the active +input or output of the device. + +If the driver advertises the ``V4L2_CAP_IO_MC`` :ref:`capability +`, applications may initialize the ``mbus_code`` field to +a valid :ref:`media bus format code `. If the +``mbus_code`` field is not zero, drivers shall restrict enumeration to only the +image formats that can produce (for video output devices) or be produced from +(for video capture devices) that media bus code. Regardless of the value of +the ``mbus_code`` field, the enumerated image formats shall not depend on the +active configuration of the video device or device pipeline. Enumeration shall +otherwise operate as previously described. .. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}| @@ -106,7 +117,13 @@ formats in preference order, where preferred formats are returned before These codes are not the same as those used in the Windows world. * - __u32 - - ``reserved``\ [4] + - ``mbus_code`` + - Media bus code restricting the enumerated formats, set by the + application. Only applicable to drivers that advertise the + ``V4L2_CAP_IO_MC`` :ref:`capability `, shall be 0 + otherwise. + * - __u32 + - ``reserved``\ [3] - Reserved for future extensions. Drivers must set the array to zero. diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 665b2bc7b7321..2322f08a98be6 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -264,12 +264,13 @@ static void v4l_print_fmtdesc(const void *arg, bool write_only) { const struct v4l2_fmtdesc *p = arg; - pr_cont("index=%u, type=%s, flags=0x%x, pixelformat=%c%c%c%c, description='%.*s'\n", + pr_cont("index=%u, type=%s, flags=0x%x, pixelformat=%c%c%c%c, mbus_code=0x%04x, description='%.*s'\n", p->index, prt_names(p->type, v4l2_type_names), p->flags, (p->pixelformat & 0xff), (p->pixelformat >> 8) & 0xff, (p->pixelformat >> 16) & 0xff, (p->pixelformat >> 24) & 0xff, + p->mbus_code, (int)sizeof(p->description), p->description); } @@ -1472,12 +1473,20 @@ static int v4l_enum_fmt(const struct v4l2_ioctl_ops *ops, struct video_device *vdev = video_devdata(file); struct v4l2_fmtdesc *p = arg; int ret = check_fmt(file, p->type); + u32 mbus_code; u32 cap_mask; if (ret) return ret; ret = -EINVAL; + if (!(vdev->device_caps & V4L2_CAP_IO_MC)) + p->mbus_code = 0; + + mbus_code = p->mbus_code; + CLEAR_AFTER_FIELD(p, type); + p->mbus_code = mbus_code; + switch (p->type) { case V4L2_BUF_TYPE_VIDEO_CAPTURE: case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: @@ -2757,7 +2766,7 @@ DEFINE_V4L_STUB_FUNC(dv_timings_cap) static const struct v4l2_ioctl_info v4l2_ioctls[] = { IOCTL_INFO(VIDIOC_QUERYCAP, v4l_querycap, v4l_print_querycap, 0), - IOCTL_INFO(VIDIOC_ENUM_FMT, v4l_enum_fmt, v4l_print_fmtdesc, INFO_FL_CLEAR(v4l2_fmtdesc, type)), + IOCTL_INFO(VIDIOC_ENUM_FMT, v4l_enum_fmt, v4l_print_fmtdesc, 0), IOCTL_INFO(VIDIOC_G_FMT, v4l_g_fmt, v4l_print_format, 0), IOCTL_INFO(VIDIOC_S_FMT, v4l_s_fmt, v4l_print_format, INFO_FL_PRIO), IOCTL_INFO(VIDIOC_REQBUFS, v4l_reqbufs, v4l_print_requestbuffers, INFO_FL_PRIO | INFO_FL_QUEUE), diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index b18f3f7cde31c..c3a1cf1c507f5 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -784,7 +784,8 @@ struct v4l2_fmtdesc { __u32 flags; __u8 description[32]; /* Description string */ __u32 pixelformat; /* Format fourcc */ - __u32 reserved[4]; + __u32 mbus_code; /* Media bus code */ + __u32 reserved[3]; }; #define V4L2_FMT_FLAG_COMPRESSED 0x0001 -- GitLab From d5f74a1eff9aef3ba23673c8ef74719ba8a105f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Date: Tue, 21 Apr 2020 15:57:41 +0200 Subject: [PATCH 323/503] media: rcar-vin: Make use of V4L2_CAP_IO_MC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set the V4L2_CAP_IO_MC capability flag and remove the driver specific vidioc_enum_input, vidioc_g_input and vidioc_s_input callbacks for the media controller enabled part of the driver. Also add support mbus_code filtering for format enumeration. Signed-off-by: Niklas Söderlund Reviewed-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/rcar-vin/rcar-v4l2.c | 40 ++++++++++++--------- 1 file changed, 24 insertions(+), 16 deletions(-) diff --git a/drivers/media/platform/rcar-vin/rcar-v4l2.c b/drivers/media/platform/rcar-vin/rcar-v4l2.c index 5151a3cd8a6e6..f421e25848756 100644 --- a/drivers/media/platform/rcar-vin/rcar-v4l2.c +++ b/drivers/media/platform/rcar-vin/rcar-v4l2.c @@ -343,6 +343,29 @@ static int rvin_enum_fmt_vid_cap(struct file *file, void *priv, unsigned int i; int matched; + /* + * If mbus_code is set only enumerate supported pixel formats for that + * bus code. Converting from YCbCr to RGB and RGB to YCbCr is possible + * with VIN, so all supported YCbCr and RGB media bus codes can produce + * all of the related pixel formats. If mbus_code is not set enumerate + * all possible pixelformats. + * + * TODO: Once raw capture formats are added to the driver this needs + * to be extended so raw media bus codes only result in raw pixel + * formats. + */ + switch (f->mbus_code) { + case 0: + case MEDIA_BUS_FMT_YUYV8_1X16: + case MEDIA_BUS_FMT_UYVY8_1X16: + case MEDIA_BUS_FMT_UYVY8_2X8: + case MEDIA_BUS_FMT_UYVY10_2X10: + case MEDIA_BUS_FMT_RGB888_1X24: + break; + default: + return -EINVAL; + } + matched = -1; for (i = 0; i < ARRAY_SIZE(rvin_formats); i++) { if (rvin_format_from_pixel(vin, rvin_formats[i].fourcc)) @@ -767,18 +790,6 @@ static int rvin_mc_s_fmt_vid_cap(struct file *file, void *priv, return 0; } -static int rvin_mc_enum_input(struct file *file, void *priv, - struct v4l2_input *i) -{ - if (i->index != 0) - return -EINVAL; - - i->type = V4L2_INPUT_TYPE_CAMERA; - strscpy(i->name, "Camera", sizeof(i->name)); - - return 0; -} - static const struct v4l2_ioctl_ops rvin_mc_ioctl_ops = { .vidioc_querycap = rvin_querycap, .vidioc_try_fmt_vid_cap = rvin_mc_try_fmt_vid_cap, @@ -786,10 +797,6 @@ static const struct v4l2_ioctl_ops rvin_mc_ioctl_ops = { .vidioc_s_fmt_vid_cap = rvin_mc_s_fmt_vid_cap, .vidioc_enum_fmt_vid_cap = rvin_enum_fmt_vid_cap, - .vidioc_enum_input = rvin_mc_enum_input, - .vidioc_g_input = rvin_g_input, - .vidioc_s_input = rvin_s_input, - .vidioc_reqbufs = vb2_ioctl_reqbufs, .vidioc_create_bufs = vb2_ioctl_create_bufs, .vidioc_querybuf = vb2_ioctl_querybuf, @@ -961,6 +968,7 @@ int rvin_v4l2_register(struct rvin_dev *vin) vin->format.colorspace = RVIN_DEFAULT_COLORSPACE; if (vin->info->use_mc) { + vdev->device_caps |= V4L2_CAP_IO_MC; vdev->ioctl_ops = &rvin_mc_ioctl_ops; } else { vdev->ioctl_ops = &rvin_ioctl_ops; -- GitLab From 148dd20602d5d9bab5de46fd8a6047ab285ce9c3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Date: Tue, 21 Apr 2020 15:57:42 +0200 Subject: [PATCH 324/503] media: staging/intel-ipu3: Make use of V4L2_CAP_IO_MC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set the V4L2_CAP_IO_MC capability flag and remove the driver specific vidioc_enum_{input,output}, vidioc_g_{input,output} and vidioc_s_{input,output} callbacks. Signed-off-by: Niklas Söderlund Acked-by: Sakari Ailus Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/ipu3/ipu3-v4l2.c | 64 +++----------------------- 1 file changed, 7 insertions(+), 57 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-v4l2.c b/drivers/staging/media/ipu3/ipu3-v4l2.c index afbb4636e714d..4dc8d9165f634 100644 --- a/drivers/staging/media/ipu3/ipu3-v4l2.c +++ b/drivers/staging/media/ipu3/ipu3-v4l2.c @@ -605,6 +605,9 @@ static int enum_fmts(struct v4l2_fmtdesc *f, u32 type) { unsigned int i, j; + if (f->mbus_code != 0 && f->mbus_code != MEDIA_BUS_FMT_FIXED) + return -EINVAL; + for (i = j = 0; i < ARRAY_SIZE(formats); ++i) { if (formats[i].type == type) { if (j == f->index) @@ -834,6 +837,9 @@ static int imgu_meta_enum_format(struct file *file, void *fh, if (fmt->index > 0 || fmt->type != node->vbq.type) return -EINVAL; + if (fmt->mbus_code != 0 && fmt->mbus_code != MEDIA_BUS_FMT_FIXED) + return -EINVAL; + strscpy(fmt->description, meta_fmts[i].name, sizeof(fmt->description)); fmt->pixelformat = meta_fmts[i].fourcc; @@ -853,54 +859,6 @@ static int imgu_vidioc_g_meta_fmt(struct file *file, void *fh, return 0; } -static int imgu_vidioc_enum_input(struct file *file, void *fh, - struct v4l2_input *input) -{ - if (input->index > 0) - return -EINVAL; - strscpy(input->name, "camera", sizeof(input->name)); - input->type = V4L2_INPUT_TYPE_CAMERA; - - return 0; -} - -static int imgu_vidioc_g_input(struct file *file, void *fh, unsigned int *input) -{ - *input = 0; - - return 0; -} - -static int imgu_vidioc_s_input(struct file *file, void *fh, unsigned int input) -{ - return input == 0 ? 0 : -EINVAL; -} - -static int imgu_vidioc_enum_output(struct file *file, void *fh, - struct v4l2_output *output) -{ - if (output->index > 0) - return -EINVAL; - strscpy(output->name, "camera", sizeof(output->name)); - output->type = V4L2_INPUT_TYPE_CAMERA; - - return 0; -} - -static int imgu_vidioc_g_output(struct file *file, void *fh, - unsigned int *output) -{ - *output = 0; - - return 0; -} - -static int imgu_vidioc_s_output(struct file *file, void *fh, - unsigned int output) -{ - return output == 0 ? 0 : -EINVAL; -} - /******************** function pointers ********************/ static struct v4l2_subdev_internal_ops imgu_subdev_internal_ops = { @@ -973,14 +931,6 @@ static const struct v4l2_ioctl_ops imgu_v4l2_ioctl_ops = { .vidioc_s_fmt_vid_out_mplane = imgu_vidioc_s_fmt, .vidioc_try_fmt_vid_out_mplane = imgu_vidioc_try_fmt, - .vidioc_enum_output = imgu_vidioc_enum_output, - .vidioc_g_output = imgu_vidioc_g_output, - .vidioc_s_output = imgu_vidioc_s_output, - - .vidioc_enum_input = imgu_vidioc_enum_input, - .vidioc_g_input = imgu_vidioc_g_input, - .vidioc_s_input = imgu_vidioc_s_input, - /* buffer queue management */ .vidioc_reqbufs = vb2_ioctl_reqbufs, .vidioc_create_bufs = vb2_ioctl_create_bufs, @@ -1094,7 +1044,7 @@ static void imgu_node_to_v4l2(u32 node, struct video_device *vdev, vdev->ioctl_ops = &imgu_v4l2_ioctl_ops; } - vdev->device_caps = V4L2_CAP_STREAMING | cap; + vdev->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_IO_MC | cap; } static int imgu_v4l2_subdev_register(struct imgu_device *imgu, -- GitLab From c7ff09f6e262c1ed3e0bf3d465d5204042957036 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Date: Tue, 21 Apr 2020 15:57:43 +0200 Subject: [PATCH 325/503] media: vimc: Make use of V4L2_CAP_IO_MC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set the V4L2_CAP_IO_MC capability flag to report this vimc inputs/outputs are controlled by the media graph. Signed-off-by: Niklas Söderlund Signed-off-by: Laurent Pinchart Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/test-drivers/vimc/vimc-capture.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/media/test-drivers/vimc/vimc-capture.c b/drivers/media/test-drivers/vimc/vimc-capture.c index 20c2f5e281bc4..c63496b17b9a5 100644 --- a/drivers/media/test-drivers/vimc/vimc-capture.c +++ b/drivers/media/test-drivers/vimc/vimc-capture.c @@ -149,7 +149,16 @@ static int vimc_cap_s_fmt_vid_cap(struct file *file, void *priv, static int vimc_cap_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *f) { - const struct vimc_pix_map *vpix = vimc_pix_map_by_index(f->index); + const struct vimc_pix_map *vpix; + + if (f->mbus_code) { + if (f->index > 0) + return -EINVAL; + + vpix = vimc_pix_map_by_code(f->mbus_code); + } else { + vpix = vimc_pix_map_by_index(f->index); + } if (!vpix) return -EINVAL; @@ -450,7 +459,8 @@ static struct vimc_ent_device *vimc_cap_add(struct vimc_device *vimc, /* Initialize the video_device struct */ vdev = &vcap->vdev; - vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; + vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING + | V4L2_CAP_IO_MC; vdev->entity.ops = &vimc_cap_mops; vdev->release = video_device_release_empty; vdev->fops = &vimc_cap_fops; -- GitLab From 6ba189d3f78c331153c4a6eb27163e27fc274123 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Wed, 6 May 2020 14:16:00 +0200 Subject: [PATCH 326/503] media: vidioc-enum-fmt.rst: make the ENUM_FMT text clearer Rework the documentation to make it easier for the reader to understand the differences in behavior of this ioctl between MC and non-MC drivers. Note the addition of the 'video-node-centric' and 'MC-centric' terms to help understand what the IO_MC capability really means. Also mention in the beginning that mbus_code is one of the fields that application should initialize, and add META_OUTPUT as one of the types that this ioctl supports (that was never added here when the META_OUTPUT buffer type was added). Finally document that EINVAL will be returned if mbus_code is unsupported. Fixes: e5b6b07a1b45 ("media: v4l2: Extend VIDIOC_ENUM_FMT to support MC-centric devices") Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l/vidioc-enum-fmt.rst | 55 +++++++++++++------ 1 file changed, 37 insertions(+), 18 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst b/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst index 9694111772a2b..a53dd3d7f7e2a 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-enum-fmt.rst @@ -39,8 +39,8 @@ Arguments Description =========== -To enumerate image formats applications initialize the ``type`` and -``index`` field of struct :c:type:`v4l2_fmtdesc` and call +To enumerate image formats applications initialize the ``type``, ``mbus_code`` +and ``index`` fields of struct :c:type:`v4l2_fmtdesc` and call the :ref:`VIDIOC_ENUM_FMT` ioctl with a pointer to this structure. Drivers fill the rest of the structure or return an ``EINVAL`` error code. All formats are enumerable by beginning at index zero and incrementing by @@ -48,21 +48,36 @@ one until ``EINVAL`` is returned. If applicable, drivers shall return formats in preference order, where preferred formats are returned before (that is, with lower ``index`` value) less-preferred formats. -If the driver doesn't advertise the ``V4L2_CAP_IO_MC`` :ref:`capability -`, applications shall initialize the ``mbus_code`` field -to zero and drivers shall ignore the value of the field. Drivers shall -enumerate all image formats. The enumerated formats may depend on the active -input or output of the device. +Depending on the ``V4L2_CAP_IO_MC`` :ref:`capability `, +the ``mbus_code`` field is handled differently: -If the driver advertises the ``V4L2_CAP_IO_MC`` :ref:`capability -`, applications may initialize the ``mbus_code`` field to -a valid :ref:`media bus format code `. If the -``mbus_code`` field is not zero, drivers shall restrict enumeration to only the -image formats that can produce (for video output devices) or be produced from -(for video capture devices) that media bus code. Regardless of the value of -the ``mbus_code`` field, the enumerated image formats shall not depend on the -active configuration of the video device or device pipeline. Enumeration shall -otherwise operate as previously described. +1) ``V4L2_CAP_IO_MC`` is not set (also known as a 'video-node-centric' driver) + + Applications shall initialize the ``mbus_code`` field to zero and drivers + shall ignore the value of the field. + + Drivers shall enumerate all image formats. + + .. note:: + + After switching the input or output the list of enumerated image + formats may be different. + +2) ``V4L2_CAP_IO_MC`` is set (also known as an 'MC-centric' driver) + + If the ``mbus_code`` field is zero, then all image formats + shall be enumerated. + + If the ``mbus_code`` field is initialized to a valid (non-zero) + :ref:`media bus format code `, then drivers + shall restrict enumeration to only the image formats that can produce + (for video output devices) or be produced from (for video capture + devices) that media bus code. If the ``mbus_code`` is unsupported by + the driver, then ``EINVAL`` shall be returned. + + Regardless of the value of the ``mbus_code`` field, the enumerated image + formats shall not depend on the active configuration of the video device + or device pipeline. .. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}| @@ -87,8 +102,9 @@ otherwise operate as previously described. ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE``, ``V4L2_BUF_TYPE_VIDEO_OVERLAY``, ``V4L2_BUF_TYPE_SDR_CAPTURE``, - ``V4L2_BUF_TYPE_SDR_OUTPUT`` and - ``V4L2_BUF_TYPE_META_CAPTURE``. + ``V4L2_BUF_TYPE_SDR_OUTPUT``, + ``V4L2_BUF_TYPE_META_CAPTURE`` and + ``V4L2_BUF_TYPE_META_OUTPUT``. See :c:type:`v4l2_buf_type`. * - __u32 - ``flags`` @@ -174,3 +190,6 @@ appropriately. The generic error codes are described at the EINVAL The struct :c:type:`v4l2_fmtdesc` ``type`` is not supported or the ``index`` is out of bounds. + + If ``V4L2_CAP_IO_MC`` is set and the specified ``mbus_code`` + is unsupported, then also return this error code. -- GitLab From 5b9f8e4ac9473962fa0e824fd1f04138600d459d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 6 May 2020 13:20:51 +0200 Subject: [PATCH 327/503] media: ipu3.rst: fix a build warning Sphinx 2.4.4 produces this warning: Documentation/admin-guide/media/ipu3.rst:235: WARNING: Title underline too short. Acked-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- Documentation/admin-guide/media/ipu3.rst | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/media/ipu3.rst b/Documentation/admin-guide/media/ipu3.rst index 7a257c358f9d5..9361c34f123e6 100644 --- a/Documentation/admin-guide/media/ipu3.rst +++ b/Documentation/admin-guide/media/ipu3.rst @@ -232,7 +232,8 @@ The IPU3 ImgU pipelines can be configured using the Media Controller, defined at :ref:`media_controller`. Running mode and firmware binary selection -------------------------- +------------------------------------------ + ImgU works based on firmware, currently the ImgU firmware support run 2 pipes in time-sharing with single input frame data. Each pipe can run at certain mode - "VIDEO" or "STILL", "VIDEO" mode is commonly used for video frames capture, and -- GitLab From 18200e9e243d9095be953cf09cba29f9b3b5f262 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Thu, 7 May 2020 17:12:48 +0200 Subject: [PATCH 328/503] media: Documentation: media: Update sub-device API intro Update the V4L2 sub-device userspace API introduction to provide more details on why complex devices might want to register devnodes for the connected subdevices. Acked-by: Sakari Ailus Suggested-by: Laurent Pinchart Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- Documentation/driver-api/media/v4l2-subdev.rst | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/driver-api/media/v4l2-subdev.rst b/Documentation/driver-api/media/v4l2-subdev.rst index 29e07e23f8885..41ccb3e5c7075 100644 --- a/Documentation/driver-api/media/v4l2-subdev.rst +++ b/Documentation/driver-api/media/v4l2-subdev.rst @@ -275,8 +275,13 @@ system the .unbind() method is called. All three callbacks are optional. V4L2 sub-device userspace API ----------------------------- -Beside exposing a kernel API through the :c:type:`v4l2_subdev_ops` structure, -V4L2 sub-devices can also be controlled directly by userspace applications. +Bridge drivers traditionally expose one or multiple video nodes to userspace, +and control subdevices through the :c:type:`v4l2_subdev_ops` operations in +response to video node operations. This hides the complexity of the underlying +hardware from applications. For complex devices, finer-grained control of the +device than what the video nodes offer may be required. In those cases, bridge +drivers that implement :ref:`the media controller API ` may +opt for making the subdevice operations directly accessible from userpace. Device nodes named ``v4l-subdev``\ *X* can be created in ``/dev`` to access sub-devices directly. If a sub-device supports direct userspace configuration -- GitLab From 3fb0ee8b3b79ee9c8fb7769bdf802bffeae7e085 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Thu, 7 May 2020 17:12:49 +0200 Subject: [PATCH 329/503] media: Documentation: media: Document read-only subdevice Document a new kAPI function to register subdev device nodes in read only mode and for each affected ioctl report how access is restricted. Acked-by: Sakari Ailus Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../driver-api/media/v4l2-subdev.rst | 44 +++++++++++++++++++ .../userspace-api/media/v4l/dev-subdev.rst | 5 +++ .../media/v4l/vidioc-g-dv-timings.rst | 6 +++ .../userspace-api/media/v4l/vidioc-g-std.rst | 6 +++ .../media/v4l/vidioc-subdev-g-crop.rst | 9 ++++ .../media/v4l/vidioc-subdev-g-fmt.rst | 8 ++++ .../v4l/vidioc-subdev-g-frame-interval.rst | 8 ++++ .../media/v4l/vidioc-subdev-g-selection.rst | 8 ++++ 8 files changed, 94 insertions(+) diff --git a/Documentation/driver-api/media/v4l2-subdev.rst b/Documentation/driver-api/media/v4l2-subdev.rst index 41ccb3e5c7075..6ced2381952ab 100644 --- a/Documentation/driver-api/media/v4l2-subdev.rst +++ b/Documentation/driver-api/media/v4l2-subdev.rst @@ -332,6 +332,50 @@ Private ioctls All ioctls not in the above list are passed directly to the sub-device driver through the core::ioctl operation. +Read-only sub-device userspace API +---------------------------------- + +Bridge drivers that control their connected subdevices through direct calls to +the kernel API realized by :c:type:`v4l2_subdev_ops` structure do not usually +want userspace to be able to change the same parameters through the subdevice +device node and thus do not usually register any. + +It is sometimes useful to report to userspace the current subdevice +configuration through a read-only API, that does not permit applications to +change to the device parameters but allows interfacing to the subdevice device +node to inspect them. + +For instance, to implement cameras based on computational photography, userspace +needs to know the detailed camera sensor configuration (in terms of skipping, +binning, cropping and scaling) for each supported output resolution. To support +such use cases, bridge drivers may expose the subdevice operations to userspace +through a read-only API. + +To create a read-only device node for all the subdevices registered with the +``V4L2_SUBDEV_FL_HAS_DEVNODE`` set, the :c:type:`v4l2_device` driver should call +:c:func:`v4l2_device_register_ro_subdev_nodes`. + +Access to the following ioctls for userspace applications is restricted on +sub-device device nodes registered with +:c:func:`v4l2_device_register_ro_subdev_nodes`. + +``VIDIOC_SUBDEV_S_FMT``, +``VIDIOC_SUBDEV_S_CROP``, +``VIDIOC_SUBDEV_S_SELECTION``: + + These ioctls are only allowed on a read-only subdevice device node + for the :ref:`V4L2_SUBDEV_FORMAT_TRY ` + formats and selection rectangles. + +``VIDIOC_SUBDEV_S_FRAME_INTERVAL``, +``VIDIOC_SUBDEV_S_DV_TIMINGS``, +``VIDIOC_SUBDEV_S_STD``: + + These ioctls are not allowed on a read-only subdevice node. + +In case the ioctl is not allowed, or the format to modify is set to +``V4L2_SUBDEV_FORMAT_ACTIVE``, the core returns a negative error code and +the errno variable is set to ``-EPERM``. I2C sub-device drivers ---------------------- diff --git a/Documentation/userspace-api/media/v4l/dev-subdev.rst b/Documentation/userspace-api/media/v4l/dev-subdev.rst index 0c1a5f50ee218..134d2fb909fa4 100644 --- a/Documentation/userspace-api/media/v4l/dev-subdev.rst +++ b/Documentation/userspace-api/media/v4l/dev-subdev.rst @@ -39,6 +39,11 @@ will feature a character device node on which ioctls can be called to Sub-device character device nodes, conventionally named ``/dev/v4l-subdev*``, use major number 81. +Drivers may opt to limit the sub-device character devices to only expose +operations that do not modify the device state. In such a case the sub-devices +are referred to as ``read-only`` in the rest of this documentation, and the +related restrictions are documented in individual ioctls. + Controls ======== diff --git a/Documentation/userspace-api/media/v4l/vidioc-g-dv-timings.rst b/Documentation/userspace-api/media/v4l/vidioc-g-dv-timings.rst index 84806a893cb7b..9a035a4ea0f05 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-g-dv-timings.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-dv-timings.rst @@ -57,6 +57,10 @@ pointer to the struct :c:type:`v4l2_dv_timings` structure as argument. If the ioctl is not supported or the timing values are not correct, the driver returns ``EINVAL`` error code. +Calling ``VIDIOC_SUBDEV_S_DV_TIMINGS`` on a subdev device node that has been +registered in read-only mode is not allowed. An error is returned and the errno +variable is set to ``-EPERM``. + The ``linux/v4l2-dv-timings.h`` header can be used to get the timings of the formats in the :ref:`cea861` and :ref:`vesadmt` standards. If the current input or output does not support DV timings (e.g. if @@ -81,6 +85,8 @@ ENODATA EBUSY The device is busy and therefore can not change the timings. +EPERM + ``VIDIOC_SUBDEV_S_DV_TIMINGS`` has been called on a read-only subdevice. .. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}| diff --git a/Documentation/userspace-api/media/v4l/vidioc-g-std.rst b/Documentation/userspace-api/media/v4l/vidioc-g-std.rst index b0bdb719d4050..6d8cb7f29ac62 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-g-std.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-g-std.rst @@ -66,6 +66,9 @@ video timings (e.g. if :ref:`VIDIOC_ENUMINPUT` does not set the ``V4L2_IN_CAP_STD`` flag), then ``ENODATA`` error code is returned. +Calling ``VIDIOC_SUBDEV_S_STD`` on a subdev device node that has been registered +in read-only mode is not allowed. An error is returned and the errno variable is +set to ``-EPERM``. Return Value ============ @@ -79,3 +82,6 @@ EINVAL ENODATA Standard video timings are not supported for this input or output. + +EPERM + ``VIDIOC_SUBDEV_S_STD`` has been called on a read-only subdevice. diff --git a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-crop.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-crop.rst index 8d9fc13015a61..615e3efdf9356 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-crop.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-crop.rst @@ -73,6 +73,11 @@ crop rectangles and stored in the sub-device file handle. Two applications querying the same sub-device would thus not interact with each other. +If the subdev device node has been registered in read-only mode, calls to +``VIDIOC_SUBDEV_S_CROP`` are only valid if the ``which`` field is set to +``V4L2_SUBDEV_FORMAT_TRY``, otherwise an error is returned and the errno +variable is set to ``-EPERM``. + Drivers must not return an error solely because the requested crop rectangle doesn't match the device capabilities. They must instead modify the rectangle to match what the hardware can provide. The @@ -123,3 +128,7 @@ EINVAL references a non-existing pad, the ``which`` field references a non-existing format, or cropping is not supported on the given subdev pad. + +EPERM + The ``VIDIOC_SUBDEV_S_CROP`` ioctl has been called on a read-only subdevice + and the ``which`` field is set to ``V4L2_SUBDEV_FORMAT_ACTIVE``. diff --git a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-fmt.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-fmt.rst index 69d60e18664ba..909ee9f908673 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-fmt.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-fmt.rst @@ -78,6 +78,11 @@ current links configuration or sub-device controls value. For instance, a low-pass noise filter might crop pixels at the frame boundaries, modifying its output frame size. +If the subdev device node has been registered in read-only mode, calls to +``VIDIOC_SUBDEV_S_FMT`` are only valid if the ``which`` field is set to +``V4L2_SUBDEV_FORMAT_TRY``, otherwise an error is returned and the errno +variable is set to ``-EPERM``. + Drivers must not return an error solely because the requested format doesn't match the device capabilities. They must instead modify the format to match what the hardware can provide. The modified format @@ -146,6 +151,9 @@ EINVAL ``pad`` references a non-existing pad, or the ``which`` field references a non-existing format. +EPERM + The ``VIDIOC_SUBDEV_S_FMT`` ioctl has been called on a read-only subdevice + and the ``which`` field is set to ``V4L2_SUBDEV_FORMAT_ACTIVE``. ============ diff --git a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst index b61baaf116240..51e1bff797f01 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst @@ -65,6 +65,10 @@ struct contains the current frame interval as would be returned by a ``VIDIOC_SUBDEV_G_FRAME_INTERVAL`` call. +Calling ``VIDIOC_SUBDEV_S_FRAME_INTERVAL`` on a subdev device node that has been +registered in read-only mode is not allowed. An error is returned and the errno +variable is set to ``-EPERM``. + Drivers must not return an error solely because the requested interval doesn't match the device capabilities. They must instead modify the interval to match what the hardware can provide. The modified interval @@ -118,3 +122,7 @@ EINVAL :c:type:`v4l2_subdev_frame_interval` ``pad`` references a non-existing pad, or the pad doesn't support frame intervals. + +EPERM + The ``VIDIOC_SUBDEV_S_FRAME_INTERVAL`` ioctl has been called on a read-only + subdevice. diff --git a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst index 981c95df2dec0..06c9553ac48f5 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst @@ -53,6 +53,10 @@ function of the crop API, and more, are supported by the selections API. See :ref:`subdev` for more information on how each selection target affects the image processing pipeline inside the subdevice. +If the subdev device node has been registered in read-only mode, calls to +``VIDIOC_SUBDEV_S_SELECTION`` are only valid if the ``which`` field is set to +``V4L2_SUBDEV_FORMAT_TRY``, otherwise an error is returned and the errno +variable is set to ``-EPERM``. Types of selection targets -------------------------- @@ -123,3 +127,7 @@ EINVAL ``pad`` references a non-existing pad, the ``which`` field references a non-existing format, or the selection target is not supported on the given subdev pad. + +EPERM + The ``VIDIOC_SUBDEV_S_SELECTION`` ioctl has been called on a read-only + subdevice and the ``which`` field is set to ``V4L2_SUBDEV_FORMAT_ACTIVE``. -- GitLab From f75c431e54e2e43c91fe267097b974ff2e5dc668 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Thu, 7 May 2020 17:12:50 +0200 Subject: [PATCH 330/503] media: v4l2-dev: Add v4l2_device_register_ro_subdev_node() Add to the V4L2 core a function to register device nodes for video subdevices in read-only mode. Registering a device node in read-only mode is useful to expose to userspace the current sub-device configuration, without allowing application to change it by using the V4L2 subdevice ioctls. Acked-by: Sakari Ailus Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-device.c | 7 ++-- drivers/media/v4l2-core/v4l2-subdev.c | 19 ++++++++++ include/media/v4l2-dev.h | 7 ++++ include/media/v4l2-device.h | 50 ++++++++++++++++++++++++--- 4 files changed, 77 insertions(+), 6 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-device.c b/drivers/media/v4l2-core/v4l2-device.c index c69941214bb29..de4287251a896 100644 --- a/drivers/media/v4l2-core/v4l2-device.c +++ b/drivers/media/v4l2-core/v4l2-device.c @@ -186,7 +186,8 @@ static void v4l2_device_release_subdev_node(struct video_device *vdev) kfree(vdev); } -int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) +int __v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev, + bool read_only) { struct video_device *vdev; struct v4l2_subdev *sd; @@ -215,6 +216,8 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) vdev->fops = &v4l2_subdev_fops; vdev->release = v4l2_device_release_subdev_node; vdev->ctrl_handler = sd->ctrl_handler; + if (read_only) + set_bit(V4L2_FL_SUBDEV_RO_DEVNODE, &vdev->flags); err = __video_register_device(vdev, VFL_TYPE_SUBDEV, -1, 1, sd->owner); if (err < 0) { @@ -252,7 +255,7 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) return err; } -EXPORT_SYMBOL_GPL(v4l2_device_register_subdev_nodes); +EXPORT_SYMBOL_GPL(__v4l2_device_register_subdev_nodes); void v4l2_device_unregister_subdev(struct v4l2_subdev *sd) { diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c index a376b351135f1..1dc263c2ca0aa 100644 --- a/drivers/media/v4l2-core/v4l2-subdev.c +++ b/drivers/media/v4l2-core/v4l2-subdev.c @@ -331,6 +331,7 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) struct v4l2_fh *vfh = file->private_data; #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh); + bool ro_subdev = test_bit(V4L2_FL_SUBDEV_RO_DEVNODE, &vdev->flags); #endif int rval; @@ -477,6 +478,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) case VIDIOC_SUBDEV_S_FMT: { struct v4l2_subdev_format *format = arg; + if (format->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) + return -EPERM; + memset(format->reserved, 0, sizeof(format->reserved)); memset(format->format.reserved, 0, sizeof(format->format.reserved)); return v4l2_subdev_call(sd, pad, set_fmt, subdev_fh->pad, format); @@ -504,6 +508,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) struct v4l2_subdev_crop *crop = arg; struct v4l2_subdev_selection sel; + if (crop->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) + return -EPERM; + memset(crop->reserved, 0, sizeof(crop->reserved)); memset(&sel, 0, sizeof(sel)); sel.which = crop->which; @@ -545,6 +552,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) case VIDIOC_SUBDEV_S_FRAME_INTERVAL: { struct v4l2_subdev_frame_interval *fi = arg; + if (ro_subdev) + return -EPERM; + memset(fi->reserved, 0, sizeof(fi->reserved)); return v4l2_subdev_call(sd, video, s_frame_interval, arg); } @@ -568,6 +578,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) case VIDIOC_SUBDEV_S_SELECTION: { struct v4l2_subdev_selection *sel = arg; + if (sel->which != V4L2_SUBDEV_FORMAT_TRY && ro_subdev) + return -EPERM; + memset(sel->reserved, 0, sizeof(sel->reserved)); return v4l2_subdev_call( sd, pad, set_selection, subdev_fh->pad, sel); @@ -604,6 +617,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) return v4l2_subdev_call(sd, video, g_dv_timings, arg); case VIDIOC_SUBDEV_S_DV_TIMINGS: + if (ro_subdev) + return -EPERM; + return v4l2_subdev_call(sd, video, s_dv_timings, arg); case VIDIOC_SUBDEV_G_STD: @@ -612,6 +628,9 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) case VIDIOC_SUBDEV_S_STD: { v4l2_std_id *std = arg; + if (ro_subdev) + return -EPERM; + return v4l2_subdev_call(sd, video, s_std, *std); } diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index 4602c15ff8788..ad2d419524426 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -82,11 +82,18 @@ struct v4l2_ctrl_handler; * but the old crop API will still work as expected in order to preserve * backwards compatibility. * Never set this flag for new drivers. + * @V4L2_FL_SUBDEV_RO_DEVNODE: + * indicates that the video device node is registered in read-only mode. + * The flag only applies to device nodes registered for sub-devices, it is + * set by the core when the sub-devices device nodes are registered with + * v4l2_device_register_ro_subdev_nodes() and used by the sub-device ioctl + * handler to restrict access to some ioctl calls. */ enum v4l2_video_device_flags { V4L2_FL_REGISTERED = 0, V4L2_FL_USES_V4L2_FH = 1, V4L2_FL_QUIRK_INVERTED_CROP = 2, + V4L2_FL_SUBDEV_RO_DEVNODE = 3, }; /* Priority helper functions */ diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h index 7c912b7d2870a..64ec4de948e98 100644 --- a/include/media/v4l2-device.h +++ b/include/media/v4l2-device.h @@ -174,14 +174,56 @@ int __must_check v4l2_device_register_subdev(struct v4l2_device *v4l2_dev, void v4l2_device_unregister_subdev(struct v4l2_subdev *sd); /** - * v4l2_device_register_subdev_nodes - Registers device nodes for all subdevs - * of the v4l2 device that are marked with - * the %V4L2_SUBDEV_FL_HAS_DEVNODE flag. + * __v4l2_device_register_ro_subdev_nodes - Registers device nodes for + * all subdevs of the v4l2 device that are marked with the + * %V4L2_SUBDEV_FL_HAS_DEVNODE flag. * * @v4l2_dev: pointer to struct v4l2_device + * @read_only: subdevices read-only flag. True to register the subdevices + * device nodes in read-only mode, false to allow full access to the + * subdevice userspace API. */ int __must_check -v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev); +__v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev, + bool read_only); + +/** + * v4l2_device_register_subdev_nodes - Registers subdevices device nodes with + * unrestricted access to the subdevice userspace operations + * + * Internally calls __v4l2_device_register_subdev_nodes(). See its documentation + * for more details. + * + * @v4l2_dev: pointer to struct v4l2_device + */ +static inline int __must_check +v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) +{ +#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) + return __v4l2_device_register_subdev_nodes(v4l2_dev, false); +#else + return 0; +#endif +} + +/** + * v4l2_device_register_ro_subdev_nodes - Registers subdevices device nodes + * in read-only mode + * + * Internally calls __v4l2_device_register_subdev_nodes(). See its documentation + * for more details. + * + * @v4l2_dev: pointer to struct v4l2_device + */ +static inline int __must_check +v4l2_device_register_ro_subdev_nodes(struct v4l2_device *v4l2_dev) +{ +#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) + return __v4l2_device_register_subdev_nodes(v4l2_dev, true); +#else + return 0; +#endif +} /** * v4l2_subdev_notify - Sends a notification to v4l2_device. -- GitLab From fb15db8c0060e73317a7872986b909343504eb84 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Thu, 7 May 2020 17:12:51 +0200 Subject: [PATCH 331/503] media: v4l2-subdev: Guard whole fops and ioctl hdlr A sub-device device node can be registered in user space only if the CONFIG_VIDEO_V4L2_SUBDEV_API Kconfig option is selected. Currently the open/close file operations and the ioctl handler have some parts of their implementations guarded by #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API), while they are actually not accessible without a video device node registered to user space. Guard the whole open, close and ioctl handler and provide stubs if the VIDEO_V4L2_SUBDEV_API Kconfig option is not selected. This slightly reduces the kernel size when the option is not selected and simplifies the file ops and ioctl implementations. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-subdev.c | 39 +++++++++++++++++++++------ 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c index 1dc263c2ca0aa..174778f9c0bc4 100644 --- a/drivers/media/v4l2-core/v4l2-subdev.c +++ b/drivers/media/v4l2-core/v4l2-subdev.c @@ -22,24 +22,22 @@ #include #include +#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) static int subdev_fh_init(struct v4l2_subdev_fh *fh, struct v4l2_subdev *sd) { -#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) if (sd->entity.num_pads) { fh->pad = v4l2_subdev_alloc_pad_config(sd); if (fh->pad == NULL) return -ENOMEM; } -#endif + return 0; } static void subdev_fh_free(struct v4l2_subdev_fh *fh) { -#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) v4l2_subdev_free_pad_config(fh->pad); fh->pad = NULL; -#endif } static int subdev_open(struct file *file) @@ -111,6 +109,17 @@ static int subdev_close(struct file *file) return 0; } +#else /* CONFIG_VIDEO_V4L2_SUBDEV_API */ +static int subdev_open(struct file *file) +{ + return -ENODEV; +} + +static int subdev_close(struct file *file) +{ + return -ENODEV; +} +#endif /* CONFIG_VIDEO_V4L2_SUBDEV_API */ static inline int check_which(u32 which) { @@ -324,15 +333,14 @@ const struct v4l2_subdev_ops v4l2_subdev_call_wrappers = { }; EXPORT_SYMBOL(v4l2_subdev_call_wrappers); +#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) { struct video_device *vdev = video_devdata(file); struct v4l2_subdev *sd = vdev_to_v4l2_subdev(vdev); struct v4l2_fh *vfh = file->private_data; -#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) struct v4l2_subdev_fh *subdev_fh = to_v4l2_subdev_fh(vfh); bool ro_subdev = test_bit(V4L2_FL_SUBDEV_RO_DEVNODE, &vdev->flags); -#endif int rval; switch (cmd) { @@ -466,7 +474,6 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) return ret; } -#if defined(CONFIG_VIDEO_V4L2_SUBDEV_API) case VIDIOC_SUBDEV_G_FMT: { struct v4l2_subdev_format *format = arg; @@ -646,7 +653,7 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) case VIDIOC_SUBDEV_QUERYSTD: return v4l2_subdev_call(sd, video, querystd, arg); -#endif + default: return v4l2_subdev_call(sd, core, ioctl, cmd, arg); } @@ -686,6 +693,22 @@ static long subdev_compat_ioctl32(struct file *file, unsigned int cmd, } #endif +#else /* CONFIG_VIDEO_V4L2_SUBDEV_API */ +static long subdev_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + return -ENODEV; +} + +#ifdef CONFIG_COMPAT +static long subdev_compat_ioctl32(struct file *file, unsigned int cmd, + unsigned long arg) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_VIDEO_V4L2_SUBDEV_API */ + static __poll_t subdev_poll(struct file *file, poll_table *wait) { struct video_device *vdev = video_devdata(file); -- GitLab From 6446ec6cbf46483737e832cd6050885fa8eb87fa Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Thu, 7 May 2020 17:12:52 +0200 Subject: [PATCH 332/503] media: v4l2-subdev: add VIDIOC_SUBDEV_QUERYCAP ioctl While normal video/radio/vbi/swradio nodes have a proper QUERYCAP ioctl that apps can call to determine that it is indeed a V4L2 device, there is currently no equivalent for v4l-subdev nodes. Adding this ioctl will solve that, and it will allow utilities like v4l2-compliance to be used with these devices as well. SUBDEV_QUERYCAP currently returns the version and capabilities of the subdevice. Define a capability flag to report if the subdevice is registered in read-only mode. Signed-off-by: Hans Verkuil Signed-off-by: Jacopo Mondi Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-subdev.c | 11 +++++++++++ include/uapi/linux/v4l2-subdev.h | 16 ++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c index 174778f9c0bc4..665b0c0f74cf8 100644 --- a/drivers/media/v4l2-core/v4l2-subdev.c +++ b/drivers/media/v4l2-core/v4l2-subdev.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -344,6 +345,16 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) int rval; switch (cmd) { + case VIDIOC_SUBDEV_QUERYCAP: { + struct v4l2_subdev_capability *cap = arg; + + memset(cap->reserved, 0, sizeof(cap->reserved)); + cap->version = LINUX_VERSION_CODE; + cap->capabilities = ro_subdev ? V4L2_SUBDEV_CAP_RO_SUBDEV : 0; + + return 0; + } + case VIDIOC_QUERYCTRL: /* * TODO: this really should be folded into v4l2_queryctrl (this diff --git a/include/uapi/linux/v4l2-subdev.h b/include/uapi/linux/v4l2-subdev.h index 03970ce307419..5d2a1dab79112 100644 --- a/include/uapi/linux/v4l2-subdev.h +++ b/include/uapi/linux/v4l2-subdev.h @@ -155,9 +155,25 @@ struct v4l2_subdev_selection { __u32 reserved[8]; }; +/** + * struct v4l2_subdev_capability - subdev capabilities + * @version: the driver versioning number + * @capabilities: the subdev capabilities, see V4L2_SUBDEV_CAP_* + * @reserved: for future use, set to zero for now + */ +struct v4l2_subdev_capability { + __u32 version; + __u32 capabilities; + __u32 reserved[14]; +}; + +/* The v4l2 sub-device video device node is registered in read-only mode. */ +#define V4L2_SUBDEV_CAP_RO_SUBDEV BIT(0) + /* Backwards compatibility define --- to be removed */ #define v4l2_subdev_edid v4l2_edid +#define VIDIOC_SUBDEV_QUERYCAP _IOR('V', 0, struct v4l2_subdev_capability) #define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format) #define VIDIOC_SUBDEV_S_FMT _IOWR('V', 5, struct v4l2_subdev_format) #define VIDIOC_SUBDEV_G_FRAME_INTERVAL _IOWR('V', 21, struct v4l2_subdev_frame_interval) -- GitLab From 0e06a071dce75434d4b95036d0958ae8c11b9a29 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Thu, 7 May 2020 17:12:53 +0200 Subject: [PATCH 333/503] media: v4l: document VIDIOC_SUBDEV_QUERYCAP Add documentation for the new VIDIOC_SUBDEV_QUERYCAP ioctl. Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil Signed-off-by: Jacopo Mondi Signed-off-by: Mauro Carvalho Chehab --- .../userspace-api/media/v4l/user-func.rst | 1 + .../media/v4l/vidioc-subdev-querycap.rst | 112 ++++++++++++++++++ 2 files changed, 113 insertions(+) create mode 100644 Documentation/userspace-api/media/v4l/vidioc-subdev-querycap.rst diff --git a/Documentation/userspace-api/media/v4l/user-func.rst b/Documentation/userspace-api/media/v4l/user-func.rst index f235f88efe891..bf77c842718e5 100644 --- a/Documentation/userspace-api/media/v4l/user-func.rst +++ b/Documentation/userspace-api/media/v4l/user-func.rst @@ -78,6 +78,7 @@ Function Reference vidioc-subdev-g-fmt vidioc-subdev-g-frame-interval vidioc-subdev-g-selection + vidioc-subdev-querycap vidioc-subscribe-event func-mmap func-munmap diff --git a/Documentation/userspace-api/media/v4l/vidioc-subdev-querycap.rst b/Documentation/userspace-api/media/v4l/vidioc-subdev-querycap.rst new file mode 100644 index 0000000000000..0371a76321af8 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/vidioc-subdev-querycap.rst @@ -0,0 +1,112 @@ +.. Permission is granted to copy, distribute and/or modify this +.. document under the terms of the GNU Free Documentation License, +.. Version 1.1 or any later version published by the Free Software +.. Foundation, with no Invariant Sections, no Front-Cover Texts +.. and no Back-Cover Texts. A copy of the license is included at +.. Documentation/userspace-api/media/fdl-appendix.rst. +.. +.. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections + +.. _VIDIOC_SUBDEV_QUERYCAP: + +**************************** +ioctl VIDIOC_SUBDEV_QUERYCAP +**************************** + +Name +==== + +VIDIOC_SUBDEV_QUERYCAP - Query sub-device capabilities + + +Synopsis +======== + +.. c:function:: int ioctl( int fd, VIDIOC_SUBDEV_QUERYCAP, struct v4l2_subdev_capability *argp ) + :name: VIDIOC_SUBDEV_QUERYCAP + + +Arguments +========= + +``fd`` + File descriptor returned by :ref:`open() `. + +``argp`` + Pointer to struct :c:type:`v4l2_subdev_capability`. + + +Description +=========== + +All V4L2 sub-devices support the ``VIDIOC_SUBDEV_QUERYCAP`` ioctl. It is used to +identify kernel devices compatible with this specification and to obtain +information about driver and hardware capabilities. The ioctl takes a pointer to +a struct :c:type:`v4l2_subdev_capability` which is filled by the driver. When +the driver is not compatible with this specification the ioctl returns +``ENOTTY`` error code. + +.. tabularcolumns:: |p{1.5cm}|p{2.5cm}|p{13cm}| + +.. c:type:: v4l2_subdev_capability + +.. flat-table:: struct v4l2_subdev_capability + :header-rows: 0 + :stub-columns: 0 + :widths: 3 4 20 + + * - __u32 + - ``version`` + - Version number of the driver. + + The version reported is provided by the V4L2 subsystem following the + kernel numbering scheme. However, it may not always return the same + version as the kernel if, for example, a stable or + distribution-modified kernel uses the V4L2 stack from a newer kernel. + + The version number is formatted using the ``KERNEL_VERSION()`` + macro: + * - :cspan:`2` + + ``#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))`` + + ``__u32 version = KERNEL_VERSION(0, 8, 1);`` + + ``printf ("Version: %u.%u.%u\\n",`` + + ``(version >> 16) & 0xFF, (version >> 8) & 0xFF, version & 0xFF);`` + * - __u32 + - ``capabilities`` + - Sub-device capabilities of the opened device, see + :ref:`subdevice-capabilities`. + * - __u32 + - ``reserved``\ [14] + - Reserved for future extensions. Set to 0 by the V4L2 core. + +.. tabularcolumns:: |p{6cm}|p{2.2cm}|p{8.8cm}| + +.. _subdevice-capabilities: + +.. cssclass:: longtable + +.. flat-table:: Sub-Device Capabilities Flags + :header-rows: 0 + :stub-columns: 0 + :widths: 3 1 4 + + * - V4L2_SUBDEV_CAP_RO_SUBDEV + - 0x00000001 + - The sub-device device node is registered in read-only mode. + Access to the sub-device ioctls that modify the device state is + restricted. Refer to each individual subdevice ioctl documentation + for a description of which restrictions apply to a read-only sub-device. + +Return Value +============ + +On success 0 is returned, on error -1 and the ``errno`` variable is set +appropriately. The generic error codes are described at the +:ref:`Generic Error Codes ` chapter. + +ENOTTY + The device node is not a V4L2 sub-device. -- GitLab From ea8912b788f8144e7d32ee61e5ccba45424bef83 Mon Sep 17 00:00:00 2001 From: Sean Young Date: Sat, 2 May 2020 14:50:52 +0200 Subject: [PATCH 334/503] media: gpio-ir-tx: improve precision of transmitted signal due to scheduling usleep_range() may take longer than the max argument due to scheduling, especially under load. This is causing random errors in the transmitted IR. Remove the usleep_range() in favour of busy-looping with udelay(). Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/rc/gpio-ir-tx.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/media/rc/gpio-ir-tx.c b/drivers/media/rc/gpio-ir-tx.c index 18ca12d78314c..66703989ae185 100644 --- a/drivers/media/rc/gpio-ir-tx.c +++ b/drivers/media/rc/gpio-ir-tx.c @@ -79,13 +79,8 @@ static int gpio_ir_tx(struct rc_dev *dev, unsigned int *txbuf, // space edge = ktime_add_us(edge, txbuf[i]); delta = ktime_us_delta(edge, ktime_get()); - if (delta > 10) { - spin_unlock_irqrestore(&gpio_ir->lock, flags); - usleep_range(delta, delta + 10); - spin_lock_irqsave(&gpio_ir->lock, flags); - } else if (delta > 0) { + if (delta > 0) udelay(delta); - } } else { // pulse ktime_t last = ktime_add_us(edge, txbuf[i]); -- GitLab From 1195a28dcf1b297be1653da5472ac5c36dcb34e3 Mon Sep 17 00:00:00 2001 From: Sean Young Date: Wed, 6 May 2020 11:54:39 +0200 Subject: [PATCH 335/503] media: gpio-ir-tx: allow transmission without carrier Some IR protocols do not use a carrier. Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/rc/gpio-ir-tx.c | 44 +++++++++++++++++++++++++++++++---- 1 file changed, 40 insertions(+), 4 deletions(-) diff --git a/drivers/media/rc/gpio-ir-tx.c b/drivers/media/rc/gpio-ir-tx.c index 66703989ae185..f33b443bfa47b 100644 --- a/drivers/media/rc/gpio-ir-tx.c +++ b/drivers/media/rc/gpio-ir-tx.c @@ -42,7 +42,7 @@ static int gpio_ir_tx_set_carrier(struct rc_dev *dev, u32 carrier) { struct gpio_ir *gpio_ir = dev->priv; - if (!carrier) + if (carrier > 500000) return -EINVAL; gpio_ir->carrier = carrier; @@ -50,10 +50,35 @@ static int gpio_ir_tx_set_carrier(struct rc_dev *dev, u32 carrier) return 0; } -static int gpio_ir_tx(struct rc_dev *dev, unsigned int *txbuf, - unsigned int count) +static void gpio_ir_tx_unmodulated(struct gpio_ir *gpio_ir, uint *txbuf, + uint count) +{ + unsigned long flags; + ktime_t edge; + s32 delta; + int i; + + spin_lock_irqsave(&gpio_ir->lock, flags); + + edge = ktime_get(); + + for (i = 0; i < count; i++) { + gpiod_set_value(gpio_ir->gpio, !(i % 2)); + + edge = ktime_add_us(edge, txbuf[i]); + delta = ktime_us_delta(edge, ktime_get()); + if (delta > 0) + udelay(delta); + } + + gpiod_set_value(gpio_ir->gpio, 0); + + spin_unlock_irqrestore(&gpio_ir->lock, flags); +} + +static void gpio_ir_tx_modulated(struct gpio_ir *gpio_ir, uint *txbuf, + uint count) { - struct gpio_ir *gpio_ir = dev->priv; unsigned long flags; ktime_t edge; /* @@ -105,6 +130,17 @@ static int gpio_ir_tx(struct rc_dev *dev, unsigned int *txbuf, } spin_unlock_irqrestore(&gpio_ir->lock, flags); +} + +static int gpio_ir_tx(struct rc_dev *dev, unsigned int *txbuf, + unsigned int count) +{ + struct gpio_ir *gpio_ir = dev->priv; + + if (gpio_ir->carrier) + gpio_ir_tx_modulated(gpio_ir, txbuf, count); + else + gpio_ir_tx_unmodulated(gpio_ir, txbuf, count); return count; } -- GitLab From 1bcecace15d2ebdf8ad039afe8cbd5439894f92f Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Fri, 24 Apr 2020 13:16:00 +0200 Subject: [PATCH 336/503] media: dvb: remove redundant assignment to variable bw The variable bw is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/cxd2880/cxd2880_top.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/dvb-frontends/cxd2880/cxd2880_top.c b/drivers/media/dvb-frontends/cxd2880/cxd2880_top.c index f87e27481ea7b..d5b1b3788e392 100644 --- a/drivers/media/dvb-frontends/cxd2880/cxd2880_top.c +++ b/drivers/media/dvb-frontends/cxd2880/cxd2880_top.c @@ -685,7 +685,7 @@ static int cxd2880_set_ber_per_period_t(struct dvb_frontend *fe) int ret; struct cxd2880_priv *priv; struct cxd2880_dvbt_tpsinfo info; - enum cxd2880_dtv_bandwidth bw = CXD2880_DTV_BW_1_7_MHZ; + enum cxd2880_dtv_bandwidth bw; u32 pre_ber_rate = 0; u32 post_ber_rate = 0; u32 ucblock_rate = 0; -- GitLab From 4e054aab8a1f1b43f4c34846b713ad6d8b43c729 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Sat, 25 Apr 2020 13:22:05 +0200 Subject: [PATCH 337/503] media: stv0900_core: remove redundant assignment to variable val The variable val is being initializeed with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/stv0900_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/dvb-frontends/stv0900_core.c b/drivers/media/dvb-frontends/stv0900_core.c index 7d93a1617e866..212312d20ff62 100644 --- a/drivers/media/dvb-frontends/stv0900_core.c +++ b/drivers/media/dvb-frontends/stv0900_core.c @@ -193,7 +193,7 @@ void stv0900_write_bits(struct stv0900_internal *intp, u32 label, u8 val) u8 stv0900_get_bits(struct stv0900_internal *intp, u32 label) { - u8 val = 0xff; + u8 val; u8 mask, pos; extract_mask_pos(label, &mask, &pos); -- GitLab From f933d160b1e71dd8ab3d4e2586b9ff0f584d985c Mon Sep 17 00:00:00 2001 From: Jia-Ju Bai Date: Thu, 7 May 2020 12:25:21 +0200 Subject: [PATCH 338/503] media: usb: ttusb-dec: reduce the number of memory reads in ttusb_dec_handle_irq() In ttusb_dec_handle_irq(), buffer[4] is continuously read from memory three times, without being modified. To reduce the number of memory reads, buffer[4] is first assigned to a local variable index, and then index is used to replace buffer[4]. Signed-off-by: Jia-Ju Bai Reviewed-by: Greg Kroah-Hartman Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/ttusb-dec/ttusb_dec.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/media/usb/ttusb-dec/ttusb_dec.c b/drivers/media/usb/ttusb-dec/ttusb_dec.c index 3198f9624b7c0..b8d39b2f777fa 100644 --- a/drivers/media/usb/ttusb-dec/ttusb_dec.c +++ b/drivers/media/usb/ttusb-dec/ttusb_dec.c @@ -250,6 +250,7 @@ static void ttusb_dec_handle_irq( struct urb *urb) struct ttusb_dec *dec = urb->context; char *buffer = dec->irq_buffer; int retval; + int index = buffer[4]; switch(urb->status) { case 0: /*success*/ @@ -281,11 +282,11 @@ static void ttusb_dec_handle_irq( struct urb *urb) * this should/could be added later ... * for now lets report each signal as a key down and up */ - if (buffer[4] - 1 < ARRAY_SIZE(rc_keys)) { - dprintk("%s:rc signal:%d\n", __func__, buffer[4]); - input_report_key(dec->rc_input_dev, rc_keys[buffer[4] - 1], 1); + if (index - 1 < ARRAY_SIZE(rc_keys)) { + dprintk("%s:rc signal:%d\n", __func__, index); + input_report_key(dec->rc_input_dev, rc_keys[index - 1], 1); input_sync(dec->rc_input_dev); - input_report_key(dec->rc_input_dev, rc_keys[buffer[4] - 1], 0); + input_report_key(dec->rc_input_dev, rc_keys[index - 1], 0); input_sync(dec->rc_input_dev); } } -- GitLab From 77d30eab04485a5996feb48d4e07cb72fbaccadb Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Thu, 7 May 2020 23:43:31 +0200 Subject: [PATCH 339/503] media: mantis_dvb: remove redundant initialization to variable result The variable result is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/mantis/mantis_dvb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/pci/mantis/mantis_dvb.c b/drivers/media/pci/mantis/mantis_dvb.c index e78ca1f26e684..2da94be5b3737 100644 --- a/drivers/media/pci/mantis/mantis_dvb.c +++ b/drivers/media/pci/mantis/mantis_dvb.c @@ -135,7 +135,7 @@ static int mantis_dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed) int mantis_dvb_init(struct mantis_pci *mantis) { struct mantis_hwconfig *config = mantis->hwconfig; - int result = -1; + int result; dprintk(MANTIS_DEBUG, 1, "dvb_register_adapter"); -- GitLab From 43c4dc3f59e75f3a8b726c4c90cb894c3780e91c Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Fri, 8 May 2020 00:00:40 +0200 Subject: [PATCH 340/503] media: dvb-frontends: remove redundant initialization of variable status The variable status is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-frontends/drxk_hard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/dvb-frontends/drxk_hard.c b/drivers/media/dvb-frontends/drxk_hard.c index 0a4875b391d9c..7e8e5c308d1c6 100644 --- a/drivers/media/dvb-frontends/drxk_hard.c +++ b/drivers/media/dvb-frontends/drxk_hard.c @@ -1093,7 +1093,7 @@ static int init_hi(struct drxk_state *state) static int mpegts_configure_pins(struct drxk_state *state, bool mpeg_enable) { - int status = -1; + int status; u16 sio_pdr_mclk_cfg = 0; u16 sio_pdr_mdx_cfg = 0; u16 err_cfg = 0; -- GitLab From 35dd70b4c4935012ee02b4296618e56bd6ae3040 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 7 May 2020 14:27:57 +0200 Subject: [PATCH 341/503] media: media: sh_veu: Remove driver Since its inclusion in v3.9, no users of the SuperH VEU mem2mem video processing driver have appeared upstream. All VEU devices in SuperH board code still bind to the "uio_pdrv_genirq" driver instead. The original author marked the driver orphaned in v3.15. Remove the driver; it can always be resurrected from git history when needed. Signed-off-by: Geert Uytterhoeven Acked-by: Rob Landley Acked-by: Laurent Pinchart Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 5 - drivers/media/platform/Kconfig | 9 - drivers/media/platform/Makefile | 2 - drivers/media/platform/sh_veu.c | 1203 ------------------------------- 4 files changed, 1219 deletions(-) delete mode 100644 drivers/media/platform/sh_veu.c diff --git a/MAINTAINERS b/MAINTAINERS index a7bb6e22d5dac..d5502e189ed21 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15236,11 +15236,6 @@ T: git git://linuxtv.org/media_tree.git F: drivers/media/i2c/rj54n1cb0c.c F: include/media/i2c/rj54n1cb0c.h -SH_VEU V4L2 MEM2MEM DRIVER -L: linux-media@vger.kernel.org -S: Orphan -F: drivers/media/platform/sh_veu.c - SH_VOU V4L2 OUTPUT DRIVER L: linux-media@vger.kernel.org S: Orphan diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 8110373fb0e9f..c57ee78fa99dc 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -393,15 +393,6 @@ config VIDEO_STI_DELTA_DRIVER endif # VIDEO_STI_DELTA -config VIDEO_SH_VEU - tristate "SuperH VEU mem2mem video processing driver" - depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA - select VIDEOBUF2_DMA_CONTIG - select V4L2_MEM2MEM_DEV - help - Support for the Video Engine Unit (VEU) on SuperH and - SH-Mobile SoCs. - config VIDEO_RENESAS_FDP1 tristate "Renesas Fine Display Processor" depends on VIDEO_DEV && VIDEO_V4L2 diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index ac31d47488699..62b6cdc8c7300 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -21,8 +21,6 @@ obj-$(CONFIG_VIDEO_CODA) += coda/ obj-$(CONFIG_VIDEO_IMX_PXP) += imx-pxp.o -obj-$(CONFIG_VIDEO_SH_VEU) += sh_veu.o - obj-$(CONFIG_VIDEO_MEM2MEM_DEINTERLACE) += m2m-deinterlace.o obj-$(CONFIG_VIDEO_MUX) += video-mux.o diff --git a/drivers/media/platform/sh_veu.c b/drivers/media/platform/sh_veu.c deleted file mode 100644 index f08b8fc192d87..0000000000000 --- a/drivers/media/platform/sh_veu.c +++ /dev/null @@ -1,1203 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * sh-mobile VEU mem2mem driver - * - * Copyright (C) 2012 Renesas Electronics Corporation - * Author: Guennadi Liakhovetski, - * Copyright (C) 2008 Magnus Damm - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#define VEU_STR 0x00 /* start register */ -#define VEU_SWR 0x10 /* src: line length */ -#define VEU_SSR 0x14 /* src: image size */ -#define VEU_SAYR 0x18 /* src: y/rgb plane address */ -#define VEU_SACR 0x1c /* src: c plane address */ -#define VEU_BSSR 0x20 /* bundle mode register */ -#define VEU_EDWR 0x30 /* dst: line length */ -#define VEU_DAYR 0x34 /* dst: y/rgb plane address */ -#define VEU_DACR 0x38 /* dst: c plane address */ -#define VEU_TRCR 0x50 /* transform control */ -#define VEU_RFCR 0x54 /* resize scale */ -#define VEU_RFSR 0x58 /* resize clip */ -#define VEU_ENHR 0x5c /* enhance */ -#define VEU_FMCR 0x70 /* filter mode */ -#define VEU_VTCR 0x74 /* lowpass vertical */ -#define VEU_HTCR 0x78 /* lowpass horizontal */ -#define VEU_APCR 0x80 /* color match */ -#define VEU_ECCR 0x84 /* color replace */ -#define VEU_AFXR 0x90 /* fixed mode */ -#define VEU_SWPR 0x94 /* swap */ -#define VEU_EIER 0xa0 /* interrupt mask */ -#define VEU_EVTR 0xa4 /* interrupt event */ -#define VEU_STAR 0xb0 /* status */ -#define VEU_BSRR 0xb4 /* reset */ - -#define VEU_MCR00 0x200 /* color conversion matrix coefficient 00 */ -#define VEU_MCR01 0x204 /* color conversion matrix coefficient 01 */ -#define VEU_MCR02 0x208 /* color conversion matrix coefficient 02 */ -#define VEU_MCR10 0x20c /* color conversion matrix coefficient 10 */ -#define VEU_MCR11 0x210 /* color conversion matrix coefficient 11 */ -#define VEU_MCR12 0x214 /* color conversion matrix coefficient 12 */ -#define VEU_MCR20 0x218 /* color conversion matrix coefficient 20 */ -#define VEU_MCR21 0x21c /* color conversion matrix coefficient 21 */ -#define VEU_MCR22 0x220 /* color conversion matrix coefficient 22 */ -#define VEU_COFFR 0x224 /* color conversion offset */ -#define VEU_CBR 0x228 /* color conversion clip */ - -/* - * 4092x4092 max size is the normal case. In some cases it can be reduced to - * 2048x2048, in other cases it can be 4092x8188 or even 8188x8188. - */ -#define MAX_W 4092 -#define MAX_H 4092 -#define MIN_W 8 -#define MIN_H 8 -#define ALIGN_W 4 - -/* 3 buffers of 2048 x 1536 - 3 megapixels @ 16bpp */ -#define VIDEO_MEM_LIMIT ALIGN(2048 * 1536 * 2 * 3, 1024 * 1024) - -#define MEM2MEM_DEF_TRANSLEN 1 - -struct sh_veu_dev; - -struct sh_veu_file { - struct v4l2_fh fh; - struct sh_veu_dev *veu_dev; - bool cfg_needed; -}; - -struct sh_veu_format { - u32 fourcc; - unsigned int depth; - unsigned int ydepth; -}; - -/* video data format */ -struct sh_veu_vfmt { - /* Replace with v4l2_rect */ - struct v4l2_rect frame; - unsigned int bytesperline; - unsigned int offset_y; - unsigned int offset_c; - const struct sh_veu_format *fmt; -}; - -struct sh_veu_dev { - struct v4l2_device v4l2_dev; - struct video_device vdev; - struct v4l2_m2m_dev *m2m_dev; - struct device *dev; - struct v4l2_m2m_ctx *m2m_ctx; - struct sh_veu_vfmt vfmt_out; - struct sh_veu_vfmt vfmt_in; - /* Only single user per direction so far */ - struct sh_veu_file *capture; - struct sh_veu_file *output; - struct mutex fop_lock; - void __iomem *base; - spinlock_t lock; - bool is_2h; - unsigned int xaction; - bool aborting; -}; - -enum sh_veu_fmt_idx { - SH_VEU_FMT_NV12, - SH_VEU_FMT_NV16, - SH_VEU_FMT_NV24, - SH_VEU_FMT_RGB332, - SH_VEU_FMT_RGB444, - SH_VEU_FMT_RGB565, - SH_VEU_FMT_RGB666, - SH_VEU_FMT_RGB24, -}; - -#define DEFAULT_IN_WIDTH VGA_WIDTH -#define DEFAULT_IN_HEIGHT VGA_HEIGHT -#define DEFAULT_IN_FMTIDX SH_VEU_FMT_NV12 -#define DEFAULT_OUT_WIDTH VGA_WIDTH -#define DEFAULT_OUT_HEIGHT VGA_HEIGHT -#define DEFAULT_OUT_FMTIDX SH_VEU_FMT_RGB565 - -/* - * Alignment: Y-plane should be 4-byte aligned for NV12 and NV16, and 8-byte - * aligned for NV24. - */ -static const struct sh_veu_format sh_veu_fmt[] = { - [SH_VEU_FMT_NV12] = { .ydepth = 8, .depth = 12, .fourcc = V4L2_PIX_FMT_NV12 }, - [SH_VEU_FMT_NV16] = { .ydepth = 8, .depth = 16, .fourcc = V4L2_PIX_FMT_NV16 }, - [SH_VEU_FMT_NV24] = { .ydepth = 8, .depth = 24, .fourcc = V4L2_PIX_FMT_NV24 }, - [SH_VEU_FMT_RGB332] = { .ydepth = 8, .depth = 8, .fourcc = V4L2_PIX_FMT_RGB332 }, - [SH_VEU_FMT_RGB444] = { .ydepth = 16, .depth = 16, .fourcc = V4L2_PIX_FMT_RGB444 }, - [SH_VEU_FMT_RGB565] = { .ydepth = 16, .depth = 16, .fourcc = V4L2_PIX_FMT_RGB565 }, - [SH_VEU_FMT_RGB666] = { .ydepth = 32, .depth = 32, .fourcc = V4L2_PIX_FMT_BGR666 }, - [SH_VEU_FMT_RGB24] = { .ydepth = 24, .depth = 24, .fourcc = V4L2_PIX_FMT_RGB24 }, -}; - -#define DEFAULT_IN_VFMT (struct sh_veu_vfmt){ \ - .frame = { \ - .width = VGA_WIDTH, \ - .height = VGA_HEIGHT, \ - }, \ - .bytesperline = (VGA_WIDTH * sh_veu_fmt[DEFAULT_IN_FMTIDX].ydepth) >> 3, \ - .fmt = &sh_veu_fmt[DEFAULT_IN_FMTIDX], \ -} - -#define DEFAULT_OUT_VFMT (struct sh_veu_vfmt){ \ - .frame = { \ - .width = VGA_WIDTH, \ - .height = VGA_HEIGHT, \ - }, \ - .bytesperline = (VGA_WIDTH * sh_veu_fmt[DEFAULT_OUT_FMTIDX].ydepth) >> 3, \ - .fmt = &sh_veu_fmt[DEFAULT_OUT_FMTIDX], \ -} - -/* - * TODO: add support for further output formats: - * SH_VEU_FMT_NV12, - * SH_VEU_FMT_NV16, - * SH_VEU_FMT_NV24, - * SH_VEU_FMT_RGB332, - * SH_VEU_FMT_RGB444, - * SH_VEU_FMT_RGB666, - * SH_VEU_FMT_RGB24, - */ - -static const int sh_veu_fmt_out[] = { - SH_VEU_FMT_RGB565, -}; - -/* - * TODO: add support for further input formats: - * SH_VEU_FMT_NV16, - * SH_VEU_FMT_NV24, - * SH_VEU_FMT_RGB565, - * SH_VEU_FMT_RGB666, - * SH_VEU_FMT_RGB24, - */ -static const int sh_veu_fmt_in[] = { - SH_VEU_FMT_NV12, -}; - -static enum v4l2_colorspace sh_veu_4cc2cspace(u32 fourcc) -{ - switch (fourcc) { - default: - BUG(); - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV16: - case V4L2_PIX_FMT_NV24: - return V4L2_COLORSPACE_SMPTE170M; - case V4L2_PIX_FMT_RGB332: - case V4L2_PIX_FMT_RGB444: - case V4L2_PIX_FMT_RGB565: - case V4L2_PIX_FMT_BGR666: - case V4L2_PIX_FMT_RGB24: - return V4L2_COLORSPACE_SRGB; - } -} - -static u32 sh_veu_reg_read(struct sh_veu_dev *veu, unsigned int reg) -{ - return ioread32(veu->base + reg); -} - -static void sh_veu_reg_write(struct sh_veu_dev *veu, unsigned int reg, - u32 value) -{ - iowrite32(value, veu->base + reg); -} - - /* ========== mem2mem callbacks ========== */ - -static void sh_veu_job_abort(void *priv) -{ - struct sh_veu_dev *veu = priv; - - /* Will cancel the transaction in the next interrupt handler */ - veu->aborting = true; -} - -static void sh_veu_process(struct sh_veu_dev *veu, - struct vb2_buffer *src_buf, - struct vb2_buffer *dst_buf) -{ - dma_addr_t addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0); - - sh_veu_reg_write(veu, VEU_DAYR, addr + veu->vfmt_out.offset_y); - sh_veu_reg_write(veu, VEU_DACR, veu->vfmt_out.offset_c ? - addr + veu->vfmt_out.offset_c : 0); - dev_dbg(veu->dev, "%s(): dst base %lx, y: %x, c: %x\n", __func__, - (unsigned long)addr, - veu->vfmt_out.offset_y, veu->vfmt_out.offset_c); - - addr = vb2_dma_contig_plane_dma_addr(src_buf, 0); - sh_veu_reg_write(veu, VEU_SAYR, addr + veu->vfmt_in.offset_y); - sh_veu_reg_write(veu, VEU_SACR, veu->vfmt_in.offset_c ? - addr + veu->vfmt_in.offset_c : 0); - dev_dbg(veu->dev, "%s(): src base %lx, y: %x, c: %x\n", __func__, - (unsigned long)addr, - veu->vfmt_in.offset_y, veu->vfmt_in.offset_c); - - sh_veu_reg_write(veu, VEU_STR, 1); - - sh_veu_reg_write(veu, VEU_EIER, 1); /* enable interrupt in VEU */ -} - -/* - * sh_veu_device_run() - prepares and starts the device - * - * This will be called by the framework when it decides to schedule a particular - * instance. - */ -static void sh_veu_device_run(void *priv) -{ - struct sh_veu_dev *veu = priv; - struct vb2_v4l2_buffer *src_buf, *dst_buf; - - src_buf = v4l2_m2m_next_src_buf(veu->m2m_ctx); - dst_buf = v4l2_m2m_next_dst_buf(veu->m2m_ctx); - - if (src_buf && dst_buf) - sh_veu_process(veu, &src_buf->vb2_buf, &dst_buf->vb2_buf); -} - - /* ========== video ioctls ========== */ - -static bool sh_veu_is_streamer(struct sh_veu_dev *veu, struct sh_veu_file *veu_file, - enum v4l2_buf_type type) -{ - return (type == V4L2_BUF_TYPE_VIDEO_CAPTURE && - veu_file == veu->capture) || - (type == V4L2_BUF_TYPE_VIDEO_OUTPUT && - veu_file == veu->output); -} - -static int sh_veu_queue_init(void *priv, struct vb2_queue *src_vq, - struct vb2_queue *dst_vq); - -/* - * It is not unusual to have video nodes open()ed multiple times. While some - * V4L2 operations are non-intrusive, like querying formats and various - * parameters, others, like setting formats, starting and stopping streaming, - * queuing and dequeuing buffers, directly affect hardware configuration and / - * or execution. This function verifies availability of the requested interface - * and, if available, reserves it for the requesting user. - */ -static int sh_veu_stream_init(struct sh_veu_dev *veu, struct sh_veu_file *veu_file, - enum v4l2_buf_type type) -{ - struct sh_veu_file **stream; - - switch (type) { - case V4L2_BUF_TYPE_VIDEO_CAPTURE: - stream = &veu->capture; - break; - case V4L2_BUF_TYPE_VIDEO_OUTPUT: - stream = &veu->output; - break; - default: - return -EINVAL; - } - - if (*stream == veu_file) - return 0; - - if (*stream) - return -EBUSY; - - *stream = veu_file; - - return 0; -} - -static int sh_veu_context_init(struct sh_veu_dev *veu) -{ - if (veu->m2m_ctx) - return 0; - - veu->m2m_ctx = v4l2_m2m_ctx_init(veu->m2m_dev, veu, - sh_veu_queue_init); - - return PTR_ERR_OR_ZERO(veu->m2m_ctx); -} - -static int sh_veu_querycap(struct file *file, void *priv, - struct v4l2_capability *cap) -{ - strscpy(cap->driver, "sh-veu", sizeof(cap->driver)); - strscpy(cap->card, "sh-mobile VEU", sizeof(cap->card)); - strscpy(cap->bus_info, "platform:sh-veu", sizeof(cap->bus_info)); - return 0; -} - -static int sh_veu_enum_fmt(struct v4l2_fmtdesc *f, const int *fmt, int fmt_num) -{ - if (f->index >= fmt_num) - return -EINVAL; - - f->pixelformat = sh_veu_fmt[fmt[f->index]].fourcc; - return 0; -} - -static int sh_veu_enum_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_fmtdesc *f) -{ - return sh_veu_enum_fmt(f, sh_veu_fmt_out, ARRAY_SIZE(sh_veu_fmt_out)); -} - -static int sh_veu_enum_fmt_vid_out(struct file *file, void *priv, - struct v4l2_fmtdesc *f) -{ - return sh_veu_enum_fmt(f, sh_veu_fmt_in, ARRAY_SIZE(sh_veu_fmt_in)); -} - -static struct sh_veu_vfmt *sh_veu_get_vfmt(struct sh_veu_dev *veu, - enum v4l2_buf_type type) -{ - switch (type) { - case V4L2_BUF_TYPE_VIDEO_CAPTURE: - return &veu->vfmt_out; - case V4L2_BUF_TYPE_VIDEO_OUTPUT: - return &veu->vfmt_in; - default: - return NULL; - } -} - -static int sh_veu_g_fmt(struct sh_veu_file *veu_file, struct v4l2_format *f) -{ - struct v4l2_pix_format *pix = &f->fmt.pix; - struct sh_veu_dev *veu = veu_file->veu_dev; - struct sh_veu_vfmt *vfmt; - - vfmt = sh_veu_get_vfmt(veu, f->type); - - pix->width = vfmt->frame.width; - pix->height = vfmt->frame.height; - pix->field = V4L2_FIELD_NONE; - pix->pixelformat = vfmt->fmt->fourcc; - pix->colorspace = sh_veu_4cc2cspace(pix->pixelformat); - pix->bytesperline = vfmt->bytesperline; - pix->sizeimage = vfmt->bytesperline * pix->height * - vfmt->fmt->depth / vfmt->fmt->ydepth; - dev_dbg(veu->dev, "%s(): type: %d, size %u @ %ux%u, fmt %x\n", __func__, - f->type, pix->sizeimage, pix->width, pix->height, pix->pixelformat); - - return 0; -} - -static int sh_veu_g_fmt_vid_out(struct file *file, void *priv, - struct v4l2_format *f) -{ - return sh_veu_g_fmt(priv, f); -} - -static int sh_veu_g_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *f) -{ - return sh_veu_g_fmt(priv, f); -} - -static int sh_veu_try_fmt(struct v4l2_format *f, const struct sh_veu_format *fmt) -{ - struct v4l2_pix_format *pix = &f->fmt.pix; - unsigned int y_bytes_used; - - /* - * V4L2 specification suggests, that the driver should correct the - * format struct if any of the dimensions is unsupported - */ - switch (pix->field) { - default: - case V4L2_FIELD_ANY: - pix->field = V4L2_FIELD_NONE; - /* fall through: continue handling V4L2_FIELD_NONE */ - case V4L2_FIELD_NONE: - break; - } - - v4l_bound_align_image(&pix->width, MIN_W, MAX_W, ALIGN_W, - &pix->height, MIN_H, MAX_H, 0, 0); - - y_bytes_used = (pix->width * fmt->ydepth) >> 3; - - if (pix->bytesperline < y_bytes_used) - pix->bytesperline = y_bytes_used; - pix->sizeimage = pix->height * pix->bytesperline * fmt->depth / fmt->ydepth; - - pix->pixelformat = fmt->fourcc; - pix->colorspace = sh_veu_4cc2cspace(pix->pixelformat); - - pr_debug("%s(): type: %d, size %u\n", __func__, f->type, pix->sizeimage); - - return 0; -} - -static const struct sh_veu_format *sh_veu_find_fmt(const struct v4l2_format *f) -{ - const int *fmt; - int i, n, dflt; - - pr_debug("%s(%d;%d)\n", __func__, f->type, f->fmt.pix.field); - - switch (f->type) { - case V4L2_BUF_TYPE_VIDEO_CAPTURE: - fmt = sh_veu_fmt_out; - n = ARRAY_SIZE(sh_veu_fmt_out); - dflt = DEFAULT_OUT_FMTIDX; - break; - case V4L2_BUF_TYPE_VIDEO_OUTPUT: - default: - fmt = sh_veu_fmt_in; - n = ARRAY_SIZE(sh_veu_fmt_in); - dflt = DEFAULT_IN_FMTIDX; - break; - } - - for (i = 0; i < n; i++) - if (sh_veu_fmt[fmt[i]].fourcc == f->fmt.pix.pixelformat) - return &sh_veu_fmt[fmt[i]]; - - return &sh_veu_fmt[dflt]; -} - -static int sh_veu_try_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *f) -{ - const struct sh_veu_format *fmt; - - fmt = sh_veu_find_fmt(f); - - return sh_veu_try_fmt(f, fmt); -} - -static int sh_veu_try_fmt_vid_out(struct file *file, void *priv, - struct v4l2_format *f) -{ - const struct sh_veu_format *fmt; - - fmt = sh_veu_find_fmt(f); - - return sh_veu_try_fmt(f, fmt); -} - -static void sh_veu_colour_offset(struct sh_veu_dev *veu, struct sh_veu_vfmt *vfmt) -{ - /* dst_left and dst_top validity will be verified in CROP / COMPOSE */ - unsigned int left = vfmt->frame.left & ~0x03; - unsigned int top = vfmt->frame.top; - dma_addr_t offset = (dma_addr_t)top * veu->vfmt_out.bytesperline + - (((dma_addr_t)left * veu->vfmt_out.fmt->depth) >> 3); - unsigned int y_line; - - vfmt->offset_y = offset; - - switch (vfmt->fmt->fourcc) { - case V4L2_PIX_FMT_NV12: - case V4L2_PIX_FMT_NV16: - case V4L2_PIX_FMT_NV24: - y_line = ALIGN(vfmt->frame.width, 16); - vfmt->offset_c = offset + y_line * vfmt->frame.height; - break; - case V4L2_PIX_FMT_RGB332: - case V4L2_PIX_FMT_RGB444: - case V4L2_PIX_FMT_RGB565: - case V4L2_PIX_FMT_BGR666: - case V4L2_PIX_FMT_RGB24: - vfmt->offset_c = 0; - break; - default: - BUG(); - } -} - -static int sh_veu_s_fmt(struct sh_veu_file *veu_file, struct v4l2_format *f) -{ - struct v4l2_pix_format *pix = &f->fmt.pix; - struct sh_veu_dev *veu = veu_file->veu_dev; - struct sh_veu_vfmt *vfmt; - struct vb2_queue *vq; - int ret = sh_veu_context_init(veu); - if (ret < 0) - return ret; - - vq = v4l2_m2m_get_vq(veu->m2m_ctx, f->type); - if (!vq) - return -EINVAL; - - if (vb2_is_busy(vq)) { - v4l2_err(&veu_file->veu_dev->v4l2_dev, "%s queue busy\n", __func__); - return -EBUSY; - } - - vfmt = sh_veu_get_vfmt(veu, f->type); - /* called after try_fmt(), hence vfmt != NULL. Implicit BUG_ON() below */ - - vfmt->fmt = sh_veu_find_fmt(f); - /* vfmt->fmt != NULL following the same argument as above */ - vfmt->frame.width = pix->width; - vfmt->frame.height = pix->height; - vfmt->bytesperline = pix->bytesperline; - - sh_veu_colour_offset(veu, vfmt); - - /* - * We could also verify and require configuration only if any parameters - * actually have changed, but it is unlikely, that the user requests the - * same configuration several times without closing the device. - */ - veu_file->cfg_needed = true; - - dev_dbg(veu->dev, - "Setting format for type %d, wxh: %dx%d, fmt: %x\n", - f->type, pix->width, pix->height, vfmt->fmt->fourcc); - - return 0; -} - -static int sh_veu_s_fmt_vid_cap(struct file *file, void *priv, - struct v4l2_format *f) -{ - int ret = sh_veu_try_fmt_vid_cap(file, priv, f); - if (ret) - return ret; - - return sh_veu_s_fmt(priv, f); -} - -static int sh_veu_s_fmt_vid_out(struct file *file, void *priv, - struct v4l2_format *f) -{ - int ret = sh_veu_try_fmt_vid_out(file, priv, f); - if (ret) - return ret; - - return sh_veu_s_fmt(priv, f); -} - -static int sh_veu_reqbufs(struct file *file, void *priv, - struct v4l2_requestbuffers *reqbufs) -{ - struct sh_veu_file *veu_file = priv; - struct sh_veu_dev *veu = veu_file->veu_dev; - int ret = sh_veu_context_init(veu); - if (ret < 0) - return ret; - - ret = sh_veu_stream_init(veu, veu_file, reqbufs->type); - if (ret < 0) - return ret; - - return v4l2_m2m_reqbufs(file, veu->m2m_ctx, reqbufs); -} - -static int sh_veu_querybuf(struct file *file, void *priv, - struct v4l2_buffer *buf) -{ - struct sh_veu_file *veu_file = priv; - - if (!sh_veu_is_streamer(veu_file->veu_dev, veu_file, buf->type)) - return -EBUSY; - - return v4l2_m2m_querybuf(file, veu_file->veu_dev->m2m_ctx, buf); -} - -static int sh_veu_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf) -{ - struct sh_veu_file *veu_file = priv; - - dev_dbg(veu_file->veu_dev->dev, "%s(%d)\n", __func__, buf->type); - if (!sh_veu_is_streamer(veu_file->veu_dev, veu_file, buf->type)) - return -EBUSY; - - return v4l2_m2m_qbuf(file, veu_file->veu_dev->m2m_ctx, buf); -} - -static int sh_veu_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf) -{ - struct sh_veu_file *veu_file = priv; - - dev_dbg(veu_file->veu_dev->dev, "%s(%d)\n", __func__, buf->type); - if (!sh_veu_is_streamer(veu_file->veu_dev, veu_file, buf->type)) - return -EBUSY; - - return v4l2_m2m_dqbuf(file, veu_file->veu_dev->m2m_ctx, buf); -} - -static void sh_veu_calc_scale(struct sh_veu_dev *veu, - int size_in, int size_out, int crop_out, - u32 *mant, u32 *frac, u32 *rep) -{ - u32 fixpoint; - - /* calculate FRAC and MANT */ - *rep = *mant = *frac = 0; - - if (size_in == size_out) { - if (crop_out != size_out) - *mant = 1; /* needed for cropping */ - return; - } - - /* VEU2H special upscale */ - if (veu->is_2h && size_out > size_in) { - u32 fixpoint = (4096 * size_in) / size_out; - *mant = fixpoint / 4096; - *frac = (fixpoint - (*mant * 4096)) & ~0x07; - - switch (*frac) { - case 0x800: - *rep = 1; - break; - case 0x400: - *rep = 3; - break; - case 0x200: - *rep = 7; - break; - } - if (*rep) - return; - } - - fixpoint = (4096 * (size_in - 1)) / (size_out + 1); - *mant = fixpoint / 4096; - *frac = fixpoint - (*mant * 4096); - - if (*frac & 0x07) { - /* - * FIXME: do we really have to round down twice in the - * up-scaling case? - */ - *frac &= ~0x07; - if (size_out > size_in) - *frac -= 8; /* round down if scaling up */ - else - *frac += 8; /* round up if scaling down */ - } -} - -static unsigned long sh_veu_scale_v(struct sh_veu_dev *veu, - int size_in, int size_out, int crop_out) -{ - u32 mant, frac, value, rep; - - sh_veu_calc_scale(veu, size_in, size_out, crop_out, &mant, &frac, &rep); - - /* set scale */ - value = (sh_veu_reg_read(veu, VEU_RFCR) & ~0xffff0000) | - (((mant << 12) | frac) << 16); - - sh_veu_reg_write(veu, VEU_RFCR, value); - - /* set clip */ - value = (sh_veu_reg_read(veu, VEU_RFSR) & ~0xffff0000) | - (((rep << 12) | crop_out) << 16); - - sh_veu_reg_write(veu, VEU_RFSR, value); - - return ALIGN((size_in * crop_out) / size_out, 4); -} - -static unsigned long sh_veu_scale_h(struct sh_veu_dev *veu, - int size_in, int size_out, int crop_out) -{ - u32 mant, frac, value, rep; - - sh_veu_calc_scale(veu, size_in, size_out, crop_out, &mant, &frac, &rep); - - /* set scale */ - value = (sh_veu_reg_read(veu, VEU_RFCR) & ~0xffff) | - (mant << 12) | frac; - - sh_veu_reg_write(veu, VEU_RFCR, value); - - /* set clip */ - value = (sh_veu_reg_read(veu, VEU_RFSR) & ~0xffff) | - (rep << 12) | crop_out; - - sh_veu_reg_write(veu, VEU_RFSR, value); - - return ALIGN((size_in * crop_out) / size_out, 4); -} - -static void sh_veu_configure(struct sh_veu_dev *veu) -{ - u32 src_width, src_stride, src_height; - u32 dst_width, dst_stride, dst_height; - u32 real_w, real_h; - - /* reset VEU */ - sh_veu_reg_write(veu, VEU_BSRR, 0x100); - - src_width = veu->vfmt_in.frame.width; - src_height = veu->vfmt_in.frame.height; - src_stride = ALIGN(veu->vfmt_in.frame.width, 16); - - dst_width = real_w = veu->vfmt_out.frame.width; - dst_height = real_h = veu->vfmt_out.frame.height; - /* Datasheet is unclear - whether it's always number of bytes or not */ - dst_stride = veu->vfmt_out.bytesperline; - - /* - * So far real_w == dst_width && real_h == dst_height, but it wasn't - * necessarily the case in the original vidix driver, so, it may change - * here in the future too. - */ - src_width = sh_veu_scale_h(veu, src_width, real_w, dst_width); - src_height = sh_veu_scale_v(veu, src_height, real_h, dst_height); - - sh_veu_reg_write(veu, VEU_SWR, src_stride); - sh_veu_reg_write(veu, VEU_SSR, src_width | (src_height << 16)); - sh_veu_reg_write(veu, VEU_BSSR, 0); /* not using bundle mode */ - - sh_veu_reg_write(veu, VEU_EDWR, dst_stride); - sh_veu_reg_write(veu, VEU_DACR, 0); /* unused for RGB */ - - sh_veu_reg_write(veu, VEU_SWPR, 0x67); - sh_veu_reg_write(veu, VEU_TRCR, (6 << 16) | (0 << 14) | 2 | 4); - - if (veu->is_2h) { - sh_veu_reg_write(veu, VEU_MCR00, 0x0cc5); - sh_veu_reg_write(veu, VEU_MCR01, 0x0950); - sh_veu_reg_write(veu, VEU_MCR02, 0x0000); - - sh_veu_reg_write(veu, VEU_MCR10, 0x397f); - sh_veu_reg_write(veu, VEU_MCR11, 0x0950); - sh_veu_reg_write(veu, VEU_MCR12, 0x3ccd); - - sh_veu_reg_write(veu, VEU_MCR20, 0x0000); - sh_veu_reg_write(veu, VEU_MCR21, 0x0950); - sh_veu_reg_write(veu, VEU_MCR22, 0x1023); - - sh_veu_reg_write(veu, VEU_COFFR, 0x00800010); - } -} - -static int sh_veu_streamon(struct file *file, void *priv, - enum v4l2_buf_type type) -{ - struct sh_veu_file *veu_file = priv; - - if (!sh_veu_is_streamer(veu_file->veu_dev, veu_file, type)) - return -EBUSY; - - if (veu_file->cfg_needed) { - struct sh_veu_dev *veu = veu_file->veu_dev; - veu_file->cfg_needed = false; - sh_veu_configure(veu_file->veu_dev); - veu->xaction = 0; - veu->aborting = false; - } - - return v4l2_m2m_streamon(file, veu_file->veu_dev->m2m_ctx, type); -} - -static int sh_veu_streamoff(struct file *file, void *priv, - enum v4l2_buf_type type) -{ - struct sh_veu_file *veu_file = priv; - - if (!sh_veu_is_streamer(veu_file->veu_dev, veu_file, type)) - return -EBUSY; - - return v4l2_m2m_streamoff(file, veu_file->veu_dev->m2m_ctx, type); -} - -static const struct v4l2_ioctl_ops sh_veu_ioctl_ops = { - .vidioc_querycap = sh_veu_querycap, - - .vidioc_enum_fmt_vid_cap = sh_veu_enum_fmt_vid_cap, - .vidioc_g_fmt_vid_cap = sh_veu_g_fmt_vid_cap, - .vidioc_try_fmt_vid_cap = sh_veu_try_fmt_vid_cap, - .vidioc_s_fmt_vid_cap = sh_veu_s_fmt_vid_cap, - - .vidioc_enum_fmt_vid_out = sh_veu_enum_fmt_vid_out, - .vidioc_g_fmt_vid_out = sh_veu_g_fmt_vid_out, - .vidioc_try_fmt_vid_out = sh_veu_try_fmt_vid_out, - .vidioc_s_fmt_vid_out = sh_veu_s_fmt_vid_out, - - .vidioc_reqbufs = sh_veu_reqbufs, - .vidioc_querybuf = sh_veu_querybuf, - - .vidioc_qbuf = sh_veu_qbuf, - .vidioc_dqbuf = sh_veu_dqbuf, - - .vidioc_streamon = sh_veu_streamon, - .vidioc_streamoff = sh_veu_streamoff, -}; - - /* ========== Queue operations ========== */ - -static int sh_veu_queue_setup(struct vb2_queue *vq, - unsigned int *nbuffers, unsigned int *nplanes, - unsigned int sizes[], struct device *alloc_devs[]) -{ - struct sh_veu_dev *veu = vb2_get_drv_priv(vq); - struct sh_veu_vfmt *vfmt = sh_veu_get_vfmt(veu, vq->type); - unsigned int count = *nbuffers; - unsigned int size = vfmt->bytesperline * vfmt->frame.height * - vfmt->fmt->depth / vfmt->fmt->ydepth; - - if (count < 2) - *nbuffers = count = 2; - - if (size * count > VIDEO_MEM_LIMIT) { - count = VIDEO_MEM_LIMIT / size; - *nbuffers = count; - } - - if (*nplanes) - return sizes[0] < size ? -EINVAL : 0; - - *nplanes = 1; - sizes[0] = size; - - dev_dbg(veu->dev, "get %d buffer(s) of size %d each.\n", count, size); - - return 0; -} - -static int sh_veu_buf_prepare(struct vb2_buffer *vb) -{ - struct sh_veu_dev *veu = vb2_get_drv_priv(vb->vb2_queue); - struct sh_veu_vfmt *vfmt; - unsigned int sizeimage; - - vfmt = sh_veu_get_vfmt(veu, vb->vb2_queue->type); - sizeimage = vfmt->bytesperline * vfmt->frame.height * - vfmt->fmt->depth / vfmt->fmt->ydepth; - - if (vb2_plane_size(vb, 0) < sizeimage) { - dev_dbg(veu->dev, "%s data will not fit into plane (%lu < %u)\n", - __func__, vb2_plane_size(vb, 0), sizeimage); - return -EINVAL; - } - - vb2_set_plane_payload(vb, 0, sizeimage); - - return 0; -} - -static void sh_veu_buf_queue(struct vb2_buffer *vb) -{ - struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); - struct sh_veu_dev *veu = vb2_get_drv_priv(vb->vb2_queue); - dev_dbg(veu->dev, "%s(%d)\n", __func__, vb->type); - v4l2_m2m_buf_queue(veu->m2m_ctx, vbuf); -} - -static const struct vb2_ops sh_veu_qops = { - .queue_setup = sh_veu_queue_setup, - .buf_prepare = sh_veu_buf_prepare, - .buf_queue = sh_veu_buf_queue, - .wait_prepare = vb2_ops_wait_prepare, - .wait_finish = vb2_ops_wait_finish, -}; - -static int sh_veu_queue_init(void *priv, struct vb2_queue *src_vq, - struct vb2_queue *dst_vq) -{ - struct sh_veu_dev *veu = priv; - int ret; - - memset(src_vq, 0, sizeof(*src_vq)); - src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; - src_vq->io_modes = VB2_MMAP | VB2_USERPTR; - src_vq->drv_priv = veu; - src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); - src_vq->ops = &sh_veu_qops; - src_vq->mem_ops = &vb2_dma_contig_memops; - src_vq->lock = &veu->fop_lock; - src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; - src_vq->dev = veu->v4l2_dev.dev; - - ret = vb2_queue_init(src_vq); - if (ret < 0) - return ret; - - memset(dst_vq, 0, sizeof(*dst_vq)); - dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - dst_vq->io_modes = VB2_MMAP | VB2_USERPTR; - dst_vq->drv_priv = veu; - dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); - dst_vq->ops = &sh_veu_qops; - dst_vq->mem_ops = &vb2_dma_contig_memops; - dst_vq->lock = &veu->fop_lock; - dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; - dst_vq->dev = veu->v4l2_dev.dev; - - return vb2_queue_init(dst_vq); -} - - /* ========== File operations ========== */ - -static int sh_veu_open(struct file *file) -{ - struct sh_veu_dev *veu = video_drvdata(file); - struct sh_veu_file *veu_file; - - veu_file = kzalloc(sizeof(*veu_file), GFP_KERNEL); - if (!veu_file) - return -ENOMEM; - - v4l2_fh_init(&veu_file->fh, video_devdata(file)); - veu_file->veu_dev = veu; - veu_file->cfg_needed = true; - - file->private_data = veu_file; - - pm_runtime_get_sync(veu->dev); - v4l2_fh_add(&veu_file->fh); - - dev_dbg(veu->dev, "Created instance %p\n", veu_file); - - return 0; -} - -static int sh_veu_release(struct file *file) -{ - struct sh_veu_dev *veu = video_drvdata(file); - struct sh_veu_file *veu_file = file->private_data; - - dev_dbg(veu->dev, "Releasing instance %p\n", veu_file); - - if (veu_file == veu->capture) { - veu->capture = NULL; - vb2_queue_release(v4l2_m2m_get_vq(veu->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE)); - } - - if (veu_file == veu->output) { - veu->output = NULL; - vb2_queue_release(v4l2_m2m_get_vq(veu->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT)); - } - - if (!veu->output && !veu->capture && veu->m2m_ctx) { - v4l2_m2m_ctx_release(veu->m2m_ctx); - veu->m2m_ctx = NULL; - } - - pm_runtime_put(veu->dev); - v4l2_fh_del(&veu_file->fh); - v4l2_fh_exit(&veu_file->fh); - - kfree(veu_file); - - return 0; -} - -static __poll_t sh_veu_poll(struct file *file, - struct poll_table_struct *wait) -{ - struct sh_veu_file *veu_file = file->private_data; - - return v4l2_m2m_poll(file, veu_file->veu_dev->m2m_ctx, wait); -} - -static int sh_veu_mmap(struct file *file, struct vm_area_struct *vma) -{ - struct sh_veu_file *veu_file = file->private_data; - - return v4l2_m2m_mmap(file, veu_file->veu_dev->m2m_ctx, vma); -} - -static const struct v4l2_file_operations sh_veu_fops = { - .owner = THIS_MODULE, - .open = sh_veu_open, - .release = sh_veu_release, - .poll = sh_veu_poll, - .unlocked_ioctl = video_ioctl2, - .mmap = sh_veu_mmap, -}; - -static const struct video_device sh_veu_videodev = { - .name = "sh-veu", - .fops = &sh_veu_fops, - .ioctl_ops = &sh_veu_ioctl_ops, - .minor = -1, - .release = video_device_release_empty, - .vfl_dir = VFL_DIR_M2M, - .device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING, -}; - -static const struct v4l2_m2m_ops sh_veu_m2m_ops = { - .device_run = sh_veu_device_run, - .job_abort = sh_veu_job_abort, -}; - -static irqreturn_t sh_veu_bh(int irq, void *dev_id) -{ - struct sh_veu_dev *veu = dev_id; - - if (veu->xaction == MEM2MEM_DEF_TRANSLEN || veu->aborting) { - v4l2_m2m_job_finish(veu->m2m_dev, veu->m2m_ctx); - veu->xaction = 0; - } else { - sh_veu_device_run(veu); - } - - return IRQ_HANDLED; -} - -static irqreturn_t sh_veu_isr(int irq, void *dev_id) -{ - struct sh_veu_dev *veu = dev_id; - struct vb2_v4l2_buffer *dst; - struct vb2_v4l2_buffer *src; - u32 status = sh_veu_reg_read(veu, VEU_EVTR); - - /* bundle read mode not used */ - if (!(status & 1)) - return IRQ_NONE; - - /* disable interrupt in VEU */ - sh_veu_reg_write(veu, VEU_EIER, 0); - /* halt operation */ - sh_veu_reg_write(veu, VEU_STR, 0); - /* ack int, write 0 to clear bits */ - sh_veu_reg_write(veu, VEU_EVTR, status & ~1); - - /* conversion completed */ - dst = v4l2_m2m_dst_buf_remove(veu->m2m_ctx); - src = v4l2_m2m_src_buf_remove(veu->m2m_ctx); - if (!src || !dst) - return IRQ_NONE; - - dst->vb2_buf.timestamp = src->vb2_buf.timestamp; - dst->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK; - dst->flags |= - src->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK; - dst->timecode = src->timecode; - - spin_lock(&veu->lock); - v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE); - v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE); - spin_unlock(&veu->lock); - - veu->xaction++; - - return IRQ_WAKE_THREAD; -} - -static int sh_veu_probe(struct platform_device *pdev) -{ - struct sh_veu_dev *veu; - struct resource *reg_res; - struct video_device *vdev; - int irq, ret; - - reg_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - irq = platform_get_irq(pdev, 0); - - if (!reg_res || irq <= 0) { - dev_err(&pdev->dev, "Insufficient VEU platform information.\n"); - return -ENODEV; - } - - veu = devm_kzalloc(&pdev->dev, sizeof(*veu), GFP_KERNEL); - if (!veu) - return -ENOMEM; - - veu->is_2h = resource_size(reg_res) == 0x22c; - - veu->base = devm_ioremap_resource(&pdev->dev, reg_res); - if (IS_ERR(veu->base)) - return PTR_ERR(veu->base); - - ret = devm_request_threaded_irq(&pdev->dev, irq, sh_veu_isr, sh_veu_bh, - 0, "veu", veu); - if (ret < 0) - return ret; - - ret = v4l2_device_register(&pdev->dev, &veu->v4l2_dev); - if (ret < 0) { - dev_err(&pdev->dev, "Error registering v4l2 device\n"); - return ret; - } - - vdev = &veu->vdev; - - *vdev = sh_veu_videodev; - vdev->v4l2_dev = &veu->v4l2_dev; - spin_lock_init(&veu->lock); - mutex_init(&veu->fop_lock); - vdev->lock = &veu->fop_lock; - - video_set_drvdata(vdev, veu); - - veu->dev = &pdev->dev; - veu->vfmt_out = DEFAULT_OUT_VFMT; - veu->vfmt_in = DEFAULT_IN_VFMT; - - veu->m2m_dev = v4l2_m2m_init(&sh_veu_m2m_ops); - if (IS_ERR(veu->m2m_dev)) { - ret = PTR_ERR(veu->m2m_dev); - v4l2_err(&veu->v4l2_dev, "Failed to init mem2mem device: %d\n", ret); - goto em2minit; - } - - pm_runtime_enable(&pdev->dev); - pm_runtime_resume(&pdev->dev); - - ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); - pm_runtime_suspend(&pdev->dev); - if (ret < 0) - goto evidreg; - - return ret; - -evidreg: - pm_runtime_disable(&pdev->dev); - v4l2_m2m_release(veu->m2m_dev); -em2minit: - v4l2_device_unregister(&veu->v4l2_dev); - return ret; -} - -static int sh_veu_remove(struct platform_device *pdev) -{ - struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev); - struct sh_veu_dev *veu = container_of(v4l2_dev, - struct sh_veu_dev, v4l2_dev); - - video_unregister_device(&veu->vdev); - pm_runtime_disable(&pdev->dev); - v4l2_m2m_release(veu->m2m_dev); - v4l2_device_unregister(&veu->v4l2_dev); - - return 0; -} - -static struct platform_driver __refdata sh_veu_pdrv = { - .remove = sh_veu_remove, - .driver = { - .name = "sh_veu", - }, -}; - -module_platform_driver_probe(sh_veu_pdrv, sh_veu_probe); - -MODULE_DESCRIPTION("sh-mobile VEU mem2mem driver"); -MODULE_AUTHOR("Guennadi Liakhovetski, "); -MODULE_LICENSE("GPL v2"); -- GitLab From e6d4ef7d58aa7e64aa735e1b3c7b670e4fb34d6f Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Wed, 29 Apr 2020 11:50:38 +0200 Subject: [PATCH 342/503] media: i2c: imx219: Implement get_selection Implement the get_selection pad operation for the IMX219 sensor driver. The supported targets report the sensor's native size, the crop default rectangle and the crop rectangle. Reviewed-by: Laurent Pinchart Signed-off-by: Jacopo Mondi Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/imx219.c | 94 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index cb03bdec1f9c8..8ff2a610cdc76 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -112,6 +112,14 @@ #define IMX219_TESTP_BLUE_DEFAULT 0 #define IMX219_TESTP_GREENB_DEFAULT 0 +/* IMX219 native and active pixel array size. */ +#define IMX219_NATIVE_WIDTH 3296U +#define IMX219_NATIVE_HEIGHT 2480U +#define IMX219_PIXEL_ARRAY_LEFT 8U +#define IMX219_PIXEL_ARRAY_TOP 8U +#define IMX219_PIXEL_ARRAY_WIDTH 3280U +#define IMX219_PIXEL_ARRAY_HEIGHT 2464U + struct imx219_reg { u16 address; u8 val; @@ -129,6 +137,9 @@ struct imx219_mode { /* Frame height */ unsigned int height; + /* Analog crop rectangle. */ + struct v4l2_rect crop; + /* V-timing */ unsigned int vts_def; @@ -463,6 +474,12 @@ static const struct imx219_mode supported_modes[] = { /* 8MPix 15fps mode */ .width = 3280, .height = 2464, + .crop = { + .left = 0, + .top = 0, + .width = 3280, + .height = 2464 + }, .vts_def = IMX219_VTS_15FPS, .reg_list = { .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs), @@ -473,6 +490,12 @@ static const struct imx219_mode supported_modes[] = { /* 1080P 30fps cropped */ .width = 1920, .height = 1080, + .crop = { + .left = 680, + .top = 692, + .width = 1920, + .height = 1080 + }, .vts_def = IMX219_VTS_30FPS_1080P, .reg_list = { .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs), @@ -483,6 +506,12 @@ static const struct imx219_mode supported_modes[] = { /* 2x2 binned 30fps mode */ .width = 1640, .height = 1232, + .crop = { + .left = 0, + .top = 0, + .width = 3280, + .height = 2464 + }, .vts_def = IMX219_VTS_30FPS_BINNED, .reg_list = { .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs), @@ -493,6 +522,12 @@ static const struct imx219_mode supported_modes[] = { /* 640x480 30fps mode */ .width = 640, .height = 480, + .crop = { + .left = 1000, + .top = 752, + .width = 1280, + .height = 960 + }, .vts_def = IMX219_VTS_30FPS_640x480, .reg_list = { .num_of_regs = ARRAY_SIZE(mode_640_480_regs), @@ -654,6 +689,7 @@ static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) struct imx219 *imx219 = to_imx219(sd); struct v4l2_mbus_framefmt *try_fmt = v4l2_subdev_get_try_format(sd, fh->pad, 0); + struct v4l2_rect *try_crop; mutex_lock(&imx219->mutex); @@ -664,6 +700,13 @@ static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) MEDIA_BUS_FMT_SRGGB10_1X10); try_fmt->field = V4L2_FIELD_NONE; + /* Initialize try_crop rectangle. */ + try_crop = v4l2_subdev_get_try_crop(sd, fh->pad, 0); + try_crop->top = IMX219_PIXEL_ARRAY_TOP; + try_crop->left = IMX219_PIXEL_ARRAY_LEFT; + try_crop->width = IMX219_PIXEL_ARRAY_WIDTH; + try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT; + mutex_unlock(&imx219->mutex); return 0; @@ -928,6 +971,56 @@ static int imx219_set_framefmt(struct imx219 *imx219) return -EINVAL; } +static const struct v4l2_rect * +__imx219_get_pad_crop(struct imx219 *imx219, struct v4l2_subdev_pad_config *cfg, + unsigned int pad, enum v4l2_subdev_format_whence which) +{ + switch (which) { + case V4L2_SUBDEV_FORMAT_TRY: + return v4l2_subdev_get_try_crop(&imx219->sd, cfg, pad); + case V4L2_SUBDEV_FORMAT_ACTIVE: + return &imx219->mode->crop; + } + + return NULL; +} + +static int imx219_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + switch (sel->target) { + case V4L2_SEL_TGT_CROP: { + struct imx219 *imx219 = to_imx219(sd); + + mutex_lock(&imx219->mutex); + sel->r = *__imx219_get_pad_crop(imx219, cfg, sel->pad, + sel->which); + mutex_unlock(&imx219->mutex); + + return 0; + } + + case V4L2_SEL_TGT_NATIVE_SIZE: + sel->r.top = 0; + sel->r.left = 0; + sel->r.width = IMX219_NATIVE_WIDTH; + sel->r.height = IMX219_NATIVE_HEIGHT; + + return 0; + + case V4L2_SEL_TGT_CROP_DEFAULT: + sel->r.top = IMX219_PIXEL_ARRAY_TOP; + sel->r.left = IMX219_PIXEL_ARRAY_LEFT; + sel->r.width = IMX219_PIXEL_ARRAY_WIDTH; + sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT; + + return 0; + } + + return -EINVAL; +} + static int imx219_start_streaming(struct imx219 *imx219) { struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); @@ -1152,6 +1245,7 @@ static const struct v4l2_subdev_pad_ops imx219_pad_ops = { .enum_mbus_code = imx219_enum_mbus_code, .get_fmt = imx219_get_pad_format, .set_fmt = imx219_set_pad_format, + .get_selection = imx219_get_selection, .enum_frame_size = imx219_enum_frame_size, }; -- GitLab From b2bbf1aac61186ef904fd28079e847d3feadb89e Mon Sep 17 00:00:00 2001 From: Dafna Hirschfeld Date: Tue, 31 Mar 2020 20:06:30 +0200 Subject: [PATCH 343/503] media: i2c: imx219: Fix a bug in imx219_enum_frame_size When enumerating the frame sizes, the value sent to imx219_get_format_code should be fse->code (the code from the ioctl) and not imx219->fmt.code which is the code set currently in the driver. Fixes: 22da1d56e982 ("media: i2c: imx219: Add support for RAW8 bit bayer format") Signed-off-by: Dafna Hirschfeld Reviewed-by: Helen Koike Reviewed-by: Dave Stevenson Reviewed-by: Lad Prabhakar Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/imx219.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index 8ff2a610cdc76..e63288ddd7215 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -824,7 +824,7 @@ static int imx219_enum_frame_size(struct v4l2_subdev *sd, if (fse->index >= ARRAY_SIZE(supported_modes)) return -EINVAL; - if (fse->code != imx219_get_format_code(imx219, imx219->fmt.code)) + if (fse->code != imx219_get_format_code(imx219, fse->code)) return -EINVAL; fse->min_width = supported_modes[fse->index].width; -- GitLab From 70d4a9efee9cdd580207473379e3ee64b331ae75 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:35 +0200 Subject: [PATCH 344/503] media: entity: Pass entity to get_fwnode_pad operation Add a missing pointer to the entity in the media_entity operation get_fwnode_pad. There are no implementers of this op yet, but a future entity that does so will almost certainly need a reference to itself to carry out the work. operation") Fixes: ae45cd5efc120 ("[media] media: entity: Add get_fwnode_pad entity Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/mc/mc-entity.c | 2 +- include/media/media-entity.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/mc/mc-entity.c b/drivers/media/mc/mc-entity.c index 211279c5fd77d..12b45e669bcc3 100644 --- a/drivers/media/mc/mc-entity.c +++ b/drivers/media/mc/mc-entity.c @@ -386,7 +386,7 @@ int media_entity_get_fwnode_pad(struct media_entity *entity, if (ret) return ret; - ret = entity->ops->get_fwnode_pad(&endpoint); + ret = entity->ops->get_fwnode_pad(entity, &endpoint); if (ret < 0) return ret; diff --git a/include/media/media-entity.h b/include/media/media-entity.h index 8cb2c504a05c7..cde80ad029b7b 100644 --- a/include/media/media-entity.h +++ b/include/media/media-entity.h @@ -212,7 +212,8 @@ struct media_pad { * mutex held. */ struct media_entity_operations { - int (*get_fwnode_pad)(struct fwnode_endpoint *endpoint); + int (*get_fwnode_pad)(struct media_entity *entity, + struct fwnode_endpoint *endpoint); int (*link_setup)(struct media_entity *entity, const struct media_pad *local, const struct media_pad *remote, u32 flags); -- GitLab From 8fe784b9abb296124d0182eac35b96dbc29d049a Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:36 +0200 Subject: [PATCH 345/503] media: v4l2-subdev: add v4l2_subdev_get_fwnode_pad_1_to_1 Add a convenience function that can be used as the .get_fwnode_pad operation for subdevices that map port numbers and pad indexes 1:1. The function verifies the endpoint is owned by the subdevice, and if so returns the endpoint port number. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-subdev.c | 22 ++++++++++++++++++++++ include/media/v4l2-subdev.h | 17 +++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-subdev.c b/drivers/media/v4l2-core/v4l2-subdev.c index 665b0c0f74cf8..6b989fe5a0a9a 100644 --- a/drivers/media/v4l2-core/v4l2-subdev.c +++ b/drivers/media/v4l2-core/v4l2-subdev.c @@ -749,6 +749,28 @@ const struct v4l2_file_operations v4l2_subdev_fops = { }; #ifdef CONFIG_MEDIA_CONTROLLER + +int v4l2_subdev_get_fwnode_pad_1_to_1(struct media_entity *entity, + struct fwnode_endpoint *endpoint) +{ + struct fwnode_handle *fwnode; + struct v4l2_subdev *sd; + + if (!is_media_entity_v4l2_subdev(entity)) + return -EINVAL; + + sd = media_entity_to_v4l2_subdev(entity); + + fwnode = fwnode_graph_get_port_parent(endpoint->local_fwnode); + fwnode_handle_put(fwnode); + + if (dev_fwnode(sd->dev) == fwnode) + return endpoint->port; + + return -ENXIO; +} +EXPORT_SYMBOL_GPL(v4l2_subdev_get_fwnode_pad_1_to_1); + int v4l2_subdev_link_validate_default(struct v4l2_subdev *sd, struct media_link *link, struct v4l2_subdev_format *source_fmt, diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h index a4848de598521..f7fe78a6f65a9 100644 --- a/include/media/v4l2-subdev.h +++ b/include/media/v4l2-subdev.h @@ -1027,6 +1027,23 @@ static inline void *v4l2_get_subdev_hostdata(const struct v4l2_subdev *sd) #ifdef CONFIG_MEDIA_CONTROLLER +/** + * v4l2_subdev_get_fwnode_pad_1_to_1 - Get pad number from a subdev fwnode + * endpoint, assuming 1:1 port:pad + * + * @entity - Pointer to the subdev entity + * @endpoint - Pointer to a parsed fwnode endpoint + * + * This function can be used as the .get_fwnode_pad operation for + * subdevices that map port numbers and pad indexes 1:1. If the endpoint + * is owned by the subdevice, the function returns the endpoint port + * number. + * + * Returns the endpoint port number on success or a negative error code. + */ +int v4l2_subdev_get_fwnode_pad_1_to_1(struct media_entity *entity, + struct fwnode_endpoint *endpoint); + /** * v4l2_subdev_link_validate_default - validates a media link * -- GitLab From 0d3c81e82da90f0752a09c38ffae7e7ffec01b33 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:37 +0200 Subject: [PATCH 346/503] media: v4l2-mc: add v4l2_create_fwnode_links helpers Add functions to create media links between source and sink subdevices, based on the fwnode endpoint connections between them: v4l2_create_fwnode_links_to_pad() - create links from a source subdev to a single sink pad based on fwnode endpoint connections. v4l2_create_fwnode_links() - create all links from a source to sink subdev based on fwnode endpoint connections. These functions can be used in a sink's v4l2-async notifier subdev bound callback to make the links from the bound subdev. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-mc.c | 95 +++++++++++++++++++++++++++++++ include/media/v4l2-mc.h | 48 ++++++++++++++++ 2 files changed, 143 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-mc.c b/drivers/media/v4l2-core/v4l2-mc.c index 0fffdd3ce6a43..ba2f2b8dcc8c3 100644 --- a/drivers/media/v4l2-core/v4l2-mc.c +++ b/drivers/media/v4l2-core/v4l2-mc.c @@ -309,6 +309,101 @@ int v4l_vb2q_enable_media_source(struct vb2_queue *q) } EXPORT_SYMBOL_GPL(v4l_vb2q_enable_media_source); +int v4l2_create_fwnode_links_to_pad(struct v4l2_subdev *src_sd, + struct media_pad *sink) +{ + struct fwnode_handle *endpoint; + struct v4l2_subdev *sink_sd; + + if (!(sink->flags & MEDIA_PAD_FL_SINK) || + !is_media_entity_v4l2_subdev(sink->entity)) + return -EINVAL; + + sink_sd = media_entity_to_v4l2_subdev(sink->entity); + + fwnode_graph_for_each_endpoint(dev_fwnode(src_sd->dev), endpoint) { + struct fwnode_handle *remote_ep; + int src_idx, sink_idx, ret; + struct media_pad *src; + + src_idx = media_entity_get_fwnode_pad(&src_sd->entity, + endpoint, + MEDIA_PAD_FL_SOURCE); + if (src_idx < 0) + continue; + + remote_ep = fwnode_graph_get_remote_endpoint(endpoint); + if (!remote_ep) + continue; + + /* + * ask the sink to verify it owns the remote endpoint, + * and translate to a sink pad. + */ + sink_idx = media_entity_get_fwnode_pad(&sink_sd->entity, + remote_ep, + MEDIA_PAD_FL_SINK); + fwnode_handle_put(remote_ep); + + if (sink_idx < 0 || sink_idx != sink->index) + continue; + + /* + * the source endpoint corresponds to one of its source pads, + * the source endpoint connects to an endpoint at the sink + * entity, and the sink endpoint corresponds to the sink + * pad requested, so we have found an endpoint connection + * that works, create the media link for it. + */ + + src = &src_sd->entity.pads[src_idx]; + + /* skip if link already exists */ + if (media_entity_find_link(src, sink)) + continue; + + dev_dbg(sink_sd->dev, "creating link %s:%d -> %s:%d\n", + src_sd->entity.name, src_idx, + sink_sd->entity.name, sink_idx); + + ret = media_create_pad_link(&src_sd->entity, src_idx, + &sink_sd->entity, sink_idx, 0); + if (ret) { + dev_err(sink_sd->dev, + "link %s:%d -> %s:%d failed with %d\n", + src_sd->entity.name, src_idx, + sink_sd->entity.name, sink_idx, ret); + + fwnode_handle_put(endpoint); + return ret; + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(v4l2_create_fwnode_links_to_pad); + +int v4l2_create_fwnode_links(struct v4l2_subdev *src_sd, + struct v4l2_subdev *sink_sd) +{ + unsigned int i; + + for (i = 0; i < sink_sd->entity.num_pads; i++) { + struct media_pad *pad = &sink_sd->entity.pads[i]; + int ret; + + if (!(pad->flags & MEDIA_PAD_FL_SINK)) + continue; + + ret = v4l2_create_fwnode_links_to_pad(src_sd, pad); + if (ret) + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(v4l2_create_fwnode_links); + /* ----------------------------------------------------------------------------- * Pipeline power management * diff --git a/include/media/v4l2-mc.h b/include/media/v4l2-mc.h index 5e73eb8e28f63..246eed3986482 100644 --- a/include/media/v4l2-mc.h +++ b/include/media/v4l2-mc.h @@ -12,6 +12,7 @@ #include #include +#include #include /* We don't need to include pci.h or usb.h here */ @@ -84,6 +85,53 @@ void v4l_disable_media_source(struct video_device *vdev); */ int v4l_vb2q_enable_media_source(struct vb2_queue *q); +/** + * v4l2_create_fwnode_links_to_pad - Create fwnode-based links from a + * source subdev to a sink subdev pad. + * + * @src_sd - pointer to a source subdev + * @sink - pointer to a subdev sink pad + * + * This function searches for fwnode endpoint connections from a source + * subdevice to a single sink pad, and if suitable connections are found, + * translates them into media links to that pad. The function can be + * called by the sink subdevice, in its v4l2-async notifier subdev bound + * callback, to create links from a bound source subdevice. + * + * .. note:: + * + * Any sink subdevice that calls this function must implement the + * .get_fwnode_pad media operation in order to verify endpoints passed + * to the sink are owned by the sink. + * + * Return 0 on success or a negative error code on failure. + */ +int v4l2_create_fwnode_links_to_pad(struct v4l2_subdev *src_sd, + struct media_pad *sink); + +/** + * v4l2_create_fwnode_links - Create fwnode-based links from a source + * subdev to a sink subdev. + * + * @src_sd - pointer to a source subdevice + * @sink_sd - pointer to a sink subdevice + * + * This function searches for any and all fwnode endpoint connections + * between source and sink subdevices, and translates them into media + * links. The function can be called by the sink subdevice, in its + * v4l2-async notifier subdev bound callback, to create all links from + * a bound source subdevice. + * + * .. note:: + * + * Any sink subdevice that calls this function must implement the + * .get_fwnode_pad media operation in order to verify endpoints passed + * to the sink are owned by the sink. + * + * Return 0 on success or a negative error code on failure. + */ +int v4l2_create_fwnode_links(struct v4l2_subdev *src_sd, + struct v4l2_subdev *sink_sd); /** * v4l2_pipeline_pm_get - Increase the use count of a pipeline -- GitLab From f4d7a681b82665cf50c993623956fa07e34d73aa Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:38 +0200 Subject: [PATCH 347/503] media: video-mux: Parse information from firmware without using callbacks Instead of using the convenience function v4l2_async_register_fwnode_subdev(), parse the video-mux input endpoints and set up the async sub-devices without using callbacks. The video-mux knows which ports it must parse (the input ports) and how to handle unconnected remotes, so it makes the code simpler to transfer control of endpoint parsing to the driver. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/video-mux.c | 70 ++++++++++++++++++++---------- 1 file changed, 46 insertions(+), 24 deletions(-) diff --git a/drivers/media/platform/video-mux.c b/drivers/media/platform/video-mux.c index ddd0e338f9e40..7b6c96a29aa52 100644 --- a/drivers/media/platform/video-mux.c +++ b/drivers/media/platform/video-mux.c @@ -21,6 +21,7 @@ struct video_mux { struct v4l2_subdev subdev; + struct v4l2_async_notifier notifier; struct media_pad *pads; struct v4l2_mbus_framefmt *format_mbus; struct mux_control *mux; @@ -330,36 +331,49 @@ static const struct v4l2_subdev_ops video_mux_subdev_ops = { .video = &video_mux_subdev_video_ops, }; -static int video_mux_parse_endpoint(struct device *dev, - struct v4l2_fwnode_endpoint *vep, - struct v4l2_async_subdev *asd) -{ - /* - * it's not an error if remote is missing on a video-mux - * input port, return -ENOTCONN to skip this endpoint with - * no error. - */ - return fwnode_device_is_available(asd->match.fwnode) ? 0 : -ENOTCONN; -} - static int video_mux_async_register(struct video_mux *vmux, unsigned int num_input_pads) { - unsigned int i, *ports; + unsigned int i; int ret; - ports = kcalloc(num_input_pads, sizeof(*ports), GFP_KERNEL); - if (!ports) - return -ENOMEM; - for (i = 0; i < num_input_pads; i++) - ports[i] = i; + v4l2_async_notifier_init(&vmux->notifier); - ret = v4l2_async_register_fwnode_subdev( - &vmux->subdev, sizeof(struct v4l2_async_subdev), - ports, num_input_pads, video_mux_parse_endpoint); + for (i = 0; i < num_input_pads; i++) { + struct v4l2_async_subdev *asd; + struct fwnode_handle *ep; - kfree(ports); - return ret; + ep = fwnode_graph_get_endpoint_by_id( + dev_fwnode(vmux->subdev.dev), i, 0, + FWNODE_GRAPH_ENDPOINT_NEXT); + if (!ep) + continue; + + asd = kzalloc(sizeof(*asd), GFP_KERNEL); + if (!asd) { + fwnode_handle_put(ep); + return -ENOMEM; + } + + ret = v4l2_async_notifier_add_fwnode_remote_subdev( + &vmux->notifier, ep, asd); + + fwnode_handle_put(ep); + + if (ret) { + kfree(asd); + /* OK if asd already exists */ + if (ret != -EEXIST) + return ret; + } + } + + ret = v4l2_async_subdev_notifier_register(&vmux->subdev, + &vmux->notifier); + if (ret) + return ret; + + return v4l2_async_register_subdev(&vmux->subdev); } static int video_mux_probe(struct platform_device *pdev) @@ -434,7 +448,13 @@ static int video_mux_probe(struct platform_device *pdev) vmux->subdev.entity.ops = &video_mux_ops; - return video_mux_async_register(vmux, num_pads - 1); + ret = video_mux_async_register(vmux, num_pads - 1); + if (ret) { + v4l2_async_notifier_unregister(&vmux->notifier); + v4l2_async_notifier_cleanup(&vmux->notifier); + } + + return ret; } static int video_mux_remove(struct platform_device *pdev) @@ -442,6 +462,8 @@ static int video_mux_remove(struct platform_device *pdev) struct video_mux *vmux = platform_get_drvdata(pdev); struct v4l2_subdev *sd = &vmux->subdev; + v4l2_async_notifier_unregister(&vmux->notifier); + v4l2_async_notifier_cleanup(&vmux->notifier); v4l2_async_unregister_subdev(sd); media_entity_cleanup(&sd->entity); -- GitLab From 0e63a5e4bb4ea3c87ff5978a5856f0c6365c7619 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:39 +0200 Subject: [PATCH 348/503] media: imx: Parse information from firmware without using callbacks Instead of using the convenience functions v4l2_async_notifier_parse_fwnode_endpoints*() or v4l2_async_register_fwnode_subdev(), parse the input endpoints and set up the async sub-devices without using callbacks. The drivers know which ports it must parse and how to handle unconnected remotes, so it makes the code simpler to transfer control of endpoint parsing to the driver. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-csi.c | 78 +++++++++---------- drivers/staging/media/imx/imx6-mipi-csi2.c | 70 ++++++++++++----- drivers/staging/media/imx/imx7-media-csi.c | 53 ++++++++++--- drivers/staging/media/imx/imx7-mipi-csis.c | 91 +++++++++++++++------- 4 files changed, 192 insertions(+), 100 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 66468326bcbc0..905b1ee27db67 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -58,6 +58,8 @@ struct csi_priv { struct ipu_soc *ipu; struct v4l2_subdev sd; struct media_pad pad[CSI_NUM_PADS]; + struct v4l2_async_notifier notifier; + /* the video device at IDMAC output pad */ struct imx_media_video_dev *vdev; struct imx_media_fim *fim; @@ -1869,59 +1871,49 @@ static const struct v4l2_subdev_internal_ops csi_internal_ops = { .unregistered = csi_unregistered, }; -static int imx_csi_parse_endpoint(struct device *dev, - struct v4l2_fwnode_endpoint *vep, - struct v4l2_async_subdev *asd) -{ - return fwnode_device_is_available(asd->match.fwnode) ? 0 : -ENOTCONN; -} - static int imx_csi_async_register(struct csi_priv *priv) { - struct v4l2_async_notifier *notifier; - struct fwnode_handle *fwnode; + struct v4l2_async_subdev *asd = NULL; + struct fwnode_handle *ep; unsigned int port; int ret; - notifier = kzalloc(sizeof(*notifier), GFP_KERNEL); - if (!notifier) - return -ENOMEM; - - v4l2_async_notifier_init(notifier); - - fwnode = dev_fwnode(priv->dev); + v4l2_async_notifier_init(&priv->notifier); /* get this CSI's port id */ - ret = fwnode_property_read_u32(fwnode, "reg", &port); - if (ret < 0) - goto out_free; - - ret = v4l2_async_notifier_parse_fwnode_endpoints_by_port( - priv->dev->parent, notifier, sizeof(struct v4l2_async_subdev), - port, imx_csi_parse_endpoint); + ret = fwnode_property_read_u32(dev_fwnode(priv->dev), "reg", &port); if (ret < 0) - goto out_cleanup; + return ret; - ret = v4l2_async_subdev_notifier_register(&priv->sd, notifier); - if (ret < 0) - goto out_cleanup; + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(priv->dev->parent), + port, 0, + FWNODE_GRAPH_ENDPOINT_NEXT); + if (ep) { + asd = kzalloc(sizeof(*asd), GFP_KERNEL); + if (!asd) { + fwnode_handle_put(ep); + return -ENOMEM; + } - ret = v4l2_async_register_subdev(&priv->sd); - if (ret < 0) - goto out_unregister; + ret = v4l2_async_notifier_add_fwnode_remote_subdev( + &priv->notifier, ep, asd); - priv->sd.subdev_notifier = notifier; + fwnode_handle_put(ep); - return 0; + if (ret) { + kfree(asd); + /* OK if asd already exists */ + if (ret != -EEXIST) + return ret; + } + } -out_unregister: - v4l2_async_notifier_unregister(notifier); -out_cleanup: - v4l2_async_notifier_cleanup(notifier); -out_free: - kfree(notifier); + ret = v4l2_async_subdev_notifier_register(&priv->sd, + &priv->notifier); + if (ret) + return ret; - return ret; + return v4l2_async_register_subdev(&priv->sd); } static int imx_csi_probe(struct platform_device *pdev) @@ -2001,9 +1993,13 @@ static int imx_csi_probe(struct platform_device *pdev) ret = imx_csi_async_register(priv); if (ret) - goto free; + goto cleanup; return 0; + +cleanup: + v4l2_async_notifier_unregister(&priv->notifier); + v4l2_async_notifier_cleanup(&priv->notifier); free: v4l2_ctrl_handler_free(&priv->ctrl_hdlr); mutex_destroy(&priv->lock); @@ -2017,6 +2013,8 @@ static int imx_csi_remove(struct platform_device *pdev) v4l2_ctrl_handler_free(&priv->ctrl_hdlr); mutex_destroy(&priv->lock); + v4l2_async_notifier_unregister(&priv->notifier); + v4l2_async_notifier_cleanup(&priv->notifier); v4l2_async_unregister_subdev(sd); media_entity_cleanup(&sd->entity); diff --git a/drivers/staging/media/imx/imx6-mipi-csi2.c b/drivers/staging/media/imx/imx6-mipi-csi2.c index 8ab823042c09c..332d77aec8aa8 100644 --- a/drivers/staging/media/imx/imx6-mipi-csi2.c +++ b/drivers/staging/media/imx/imx6-mipi-csi2.c @@ -35,6 +35,7 @@ struct csi2_dev { struct device *dev; struct v4l2_subdev sd; + struct v4l2_async_notifier notifier; struct media_pad pad[CSI2_NUM_PADS]; struct clk *dphy_clk; struct clk *pllref_clk; @@ -530,34 +531,59 @@ static const struct v4l2_subdev_internal_ops csi2_internal_ops = { .registered = csi2_registered, }; -static int csi2_parse_endpoint(struct device *dev, - struct v4l2_fwnode_endpoint *vep, - struct v4l2_async_subdev *asd) +static int csi2_async_register(struct csi2_dev *csi2) { - struct v4l2_subdev *sd = dev_get_drvdata(dev); - struct csi2_dev *csi2 = sd_to_dev(sd); + struct v4l2_fwnode_endpoint vep = { + .bus_type = V4L2_MBUS_CSI2_DPHY, + }; + struct v4l2_async_subdev *asd = NULL; + struct fwnode_handle *ep; + int ret; - if (!fwnode_device_is_available(asd->match.fwnode)) { - v4l2_err(&csi2->sd, "remote is not available\n"); - return -EINVAL; - } + v4l2_async_notifier_init(&csi2->notifier); - if (vep->bus_type != V4L2_MBUS_CSI2_DPHY) { - v4l2_err(&csi2->sd, "invalid bus type, must be MIPI CSI2\n"); - return -EINVAL; - } + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(csi2->dev), 0, 0, + FWNODE_GRAPH_ENDPOINT_NEXT); + if (!ep) + return -ENOTCONN; + + ret = v4l2_fwnode_endpoint_parse(ep, &vep); + if (ret) + goto err_parse; - csi2->bus = vep->bus.mipi_csi2; + csi2->bus = vep.bus.mipi_csi2; dev_dbg(csi2->dev, "data lanes: %d\n", csi2->bus.num_data_lanes); dev_dbg(csi2->dev, "flags: 0x%08x\n", csi2->bus.flags); - return 0; + asd = kzalloc(sizeof(*asd), GFP_KERNEL); + if (!asd) { + ret = -ENOMEM; + goto err_parse; + } + + ret = v4l2_async_notifier_add_fwnode_remote_subdev( + &csi2->notifier, ep, asd); + if (ret) + goto err_parse; + + fwnode_handle_put(ep); + + ret = v4l2_async_subdev_notifier_register(&csi2->sd, + &csi2->notifier); + if (ret) + return ret; + + return v4l2_async_register_subdev(&csi2->sd); + +err_parse: + fwnode_handle_put(ep); + kfree(asd); + return ret; } static int csi2_probe(struct platform_device *pdev) { - unsigned int sink_port = 0; struct csi2_dev *csi2; struct resource *res; int i, ret; @@ -633,15 +659,15 @@ static int csi2_probe(struct platform_device *pdev) platform_set_drvdata(pdev, &csi2->sd); - ret = v4l2_async_register_fwnode_subdev( - &csi2->sd, sizeof(struct v4l2_async_subdev), - &sink_port, 1, csi2_parse_endpoint); + ret = csi2_async_register(csi2); if (ret) - goto dphy_off; + goto clean_notifier; return 0; -dphy_off: +clean_notifier: + v4l2_async_notifier_unregister(&csi2->notifier); + v4l2_async_notifier_cleanup(&csi2->notifier); clk_disable_unprepare(csi2->dphy_clk); pllref_off: clk_disable_unprepare(csi2->pllref_clk); @@ -655,6 +681,8 @@ static int csi2_remove(struct platform_device *pdev) struct v4l2_subdev *sd = platform_get_drvdata(pdev); struct csi2_dev *csi2 = sd_to_dev(sd); + v4l2_async_notifier_unregister(&csi2->notifier); + v4l2_async_notifier_cleanup(&csi2->notifier); v4l2_async_unregister_subdev(sd); clk_disable_unprepare(csi2->dphy_clk); clk_disable_unprepare(csi2->pllref_clk); diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index 1ac10f807ac07..abef59dc22b66 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -155,6 +155,7 @@ struct imx7_csi { struct device *dev; struct v4l2_subdev sd; + struct v4l2_async_notifier notifier; struct imx_media_video_dev *vdev; struct imx_media_dev *imxmd; struct media_pad pad[IMX7_CSI_PADS_NUM]; @@ -1202,11 +1203,41 @@ static const struct v4l2_subdev_internal_ops imx7_csi_internal_ops = { .unregistered = imx7_csi_unregistered, }; -static int imx7_csi_parse_endpoint(struct device *dev, - struct v4l2_fwnode_endpoint *vep, - struct v4l2_async_subdev *asd) +static int imx7_csi_async_register(struct imx7_csi *csi) { - return fwnode_device_is_available(asd->match.fwnode) ? 0 : -EINVAL; + struct v4l2_async_subdev *asd = NULL; + struct fwnode_handle *ep; + int ret; + + v4l2_async_notifier_init(&csi->notifier); + + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(csi->dev), 0, 0, + FWNODE_GRAPH_ENDPOINT_NEXT); + if (ep) { + asd = kzalloc(sizeof(*asd), GFP_KERNEL); + if (!asd) { + fwnode_handle_put(ep); + return -ENOMEM; + } + + ret = v4l2_async_notifier_add_fwnode_remote_subdev( + &csi->notifier, ep, asd); + + fwnode_handle_put(ep); + + if (ret) { + kfree(asd); + /* OK if asd already exists */ + if (ret != -EEXIST) + return ret; + } + } + + ret = v4l2_async_subdev_notifier_register(&csi->sd, &csi->notifier); + if (ret) + return ret; + + return v4l2_async_register_subdev(&csi->sd); } static int imx7_csi_probe(struct platform_device *pdev) @@ -1289,19 +1320,21 @@ static int imx7_csi_probe(struct platform_device *pdev) if (ret < 0) goto free; - ret = v4l2_async_register_fwnode_subdev(&csi->sd, - sizeof(struct v4l2_async_subdev), - NULL, 0, - imx7_csi_parse_endpoint); + ret = imx7_csi_async_register(csi); if (ret) - goto free; + goto subdev_notifier_cleanup; return 0; +subdev_notifier_cleanup: + v4l2_async_notifier_unregister(&csi->notifier); + v4l2_async_notifier_cleanup(&csi->notifier); + free: v4l2_ctrl_handler_free(&csi->ctrl_hdlr); cleanup: + v4l2_async_notifier_unregister(&imxmd->notifier); v4l2_async_notifier_cleanup(&imxmd->notifier); v4l2_device_unregister(&imxmd->v4l2_dev); media_device_unregister(&imxmd->md); @@ -1326,6 +1359,8 @@ static int imx7_csi_remove(struct platform_device *pdev) v4l2_device_unregister(&imxmd->v4l2_dev); media_device_cleanup(&imxmd->md); + v4l2_async_notifier_unregister(&csi->notifier); + v4l2_async_notifier_cleanup(&csi->notifier); v4l2_async_unregister_subdev(sd); v4l2_ctrl_handler_free(&csi->ctrl_hdlr); diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index ca20f5da9ac64..0be232f981934 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -221,6 +221,7 @@ struct csi_state { struct device *dev; struct media_pad pads[CSIS_PADS_NUM]; struct v4l2_subdev mipi_sd; + struct v4l2_async_notifier notifier; struct v4l2_subdev *src_sd; u8 index; @@ -946,33 +947,11 @@ static int mipi_csis_parse_dt(struct platform_device *pdev, static int mipi_csis_pm_resume(struct device *dev, bool runtime); -static int mipi_csis_parse_endpoint(struct device *dev, - struct v4l2_fwnode_endpoint *ep, - struct v4l2_async_subdev *asd) -{ - struct v4l2_subdev *mipi_sd = dev_get_drvdata(dev); - struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); - - if (ep->bus_type != V4L2_MBUS_CSI2_DPHY) { - dev_err(dev, "invalid bus type, must be MIPI CSI2\n"); - return -EINVAL; - } - - state->bus = ep->bus.mipi_csi2; - - dev_dbg(state->dev, "data lanes: %d\n", state->bus.num_data_lanes); - dev_dbg(state->dev, "flags: 0x%08x\n", state->bus.flags); - - return 0; -} - static int mipi_csis_subdev_init(struct v4l2_subdev *mipi_sd, struct platform_device *pdev, const struct v4l2_subdev_ops *ops) { struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); - unsigned int sink_port = 0; - int ret; v4l2_subdev_init(mipi_sd, ops); mipi_sd->owner = THIS_MODULE; @@ -994,17 +973,58 @@ static int mipi_csis_subdev_init(struct v4l2_subdev *mipi_sd, state->pads[CSIS_PAD_SINK].flags = MEDIA_PAD_FL_SINK; state->pads[CSIS_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; - ret = media_entity_pads_init(&mipi_sd->entity, CSIS_PADS_NUM, - state->pads); + return media_entity_pads_init(&mipi_sd->entity, CSIS_PADS_NUM, + state->pads); +} + +static int mipi_csis_async_register(struct csi_state *state) +{ + struct v4l2_fwnode_endpoint vep = { + .bus_type = V4L2_MBUS_CSI2_DPHY, + }; + struct v4l2_async_subdev *asd = NULL; + struct fwnode_handle *ep; + int ret; + + v4l2_async_notifier_init(&state->notifier); + + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(state->dev), 0, 0, + FWNODE_GRAPH_ENDPOINT_NEXT); + if (!ep) + return -ENOTCONN; + + ret = v4l2_fwnode_endpoint_parse(ep, &vep); + if (ret) + goto err_parse; + + state->bus = vep.bus.mipi_csi2; + + dev_dbg(state->dev, "data lanes: %d\n", state->bus.num_data_lanes); + dev_dbg(state->dev, "flags: 0x%08x\n", state->bus.flags); + + asd = kzalloc(sizeof(*asd), GFP_KERNEL); + if (!asd) { + ret = -ENOMEM; + goto err_parse; + } + + ret = v4l2_async_notifier_add_fwnode_remote_subdev( + &state->notifier, ep, asd); + if (ret) + goto err_parse; + + fwnode_handle_put(ep); + + ret = v4l2_async_subdev_notifier_register(&state->mipi_sd, + &state->notifier); if (ret) return ret; - ret = v4l2_async_register_fwnode_subdev(mipi_sd, - sizeof(struct v4l2_async_subdev), - &sink_port, 1, - mipi_csis_parse_endpoint); - if (ret < 0) - dev_err(&pdev->dev, "async fwnode register failed: %d\n", ret); + return v4l2_async_register_subdev(&state->mipi_sd); + +err_parse: + fwnode_handle_put(ep); + kfree(asd); return ret; } @@ -1092,6 +1112,12 @@ static int mipi_csis_probe(struct platform_device *pdev) if (ret < 0) goto disable_clock; + ret = mipi_csis_async_register(state); + if (ret < 0) { + dev_err(&pdev->dev, "async register failed: %d\n", ret); + goto cleanup; + } + memcpy(state->events, mipi_csis_events, sizeof(state->events)); mipi_csis_debugfs_init(state); @@ -1110,7 +1136,10 @@ static int mipi_csis_probe(struct platform_device *pdev) unregister_all: mipi_csis_debugfs_exit(state); +cleanup: media_entity_cleanup(&state->mipi_sd.entity); + v4l2_async_notifier_unregister(&state->notifier); + v4l2_async_notifier_cleanup(&state->notifier); v4l2_async_unregister_subdev(&state->mipi_sd); disable_clock: mipi_csis_clk_disable(state); @@ -1198,6 +1227,8 @@ static int mipi_csis_remove(struct platform_device *pdev) struct csi_state *state = mipi_sd_to_csis_state(mipi_sd); mipi_csis_debugfs_exit(state); + v4l2_async_notifier_unregister(&state->notifier); + v4l2_async_notifier_cleanup(&state->notifier); v4l2_async_unregister_subdev(&state->mipi_sd); pm_runtime_disable(&pdev->dev); -- GitLab From acee6033c5c5b7758b521ea63bb9f989578aa9fd Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:40 +0200 Subject: [PATCH 349/503] media: Revert "media: v4l2-fwnode: Add a convenience function for registering subdevs with notifiers" The users of v4l2_async_register_fwnode_subdev() have switched to parsing their endpoints and setting up async sub-device lists in their notifiers locally, without using the endpoint parsing callbacks. There are no more users of v4l2_async_register_fwnode_subdev() so this convenience function can be removed. This reverts commit 1634f0eded87d1f150e823fa56cd782ea0775eb2. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-fwnode.c | 62 --------------------------- include/media/v4l2-fwnode.h | 38 ---------------- 2 files changed, 100 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c index 97f0f8b23b5dd..e1f273ae85223 100644 --- a/drivers/media/v4l2-core/v4l2-fwnode.c +++ b/drivers/media/v4l2-core/v4l2-fwnode.c @@ -1323,68 +1323,6 @@ int v4l2_async_register_subdev_sensor_common(struct v4l2_subdev *sd) } EXPORT_SYMBOL_GPL(v4l2_async_register_subdev_sensor_common); -int v4l2_async_register_fwnode_subdev(struct v4l2_subdev *sd, - size_t asd_struct_size, - unsigned int *ports, - unsigned int num_ports, - parse_endpoint_func parse_endpoint) -{ - struct v4l2_async_notifier *notifier; - struct device *dev = sd->dev; - struct fwnode_handle *fwnode; - int ret; - - if (WARN_ON(!dev)) - return -ENODEV; - - fwnode = dev_fwnode(dev); - if (!fwnode_device_is_available(fwnode)) - return -ENODEV; - - notifier = kzalloc(sizeof(*notifier), GFP_KERNEL); - if (!notifier) - return -ENOMEM; - - v4l2_async_notifier_init(notifier); - - if (!ports) { - ret = v4l2_async_notifier_parse_fwnode_endpoints(dev, notifier, - asd_struct_size, - parse_endpoint); - if (ret < 0) - goto out_cleanup; - } else { - unsigned int i; - - for (i = 0; i < num_ports; i++) { - ret = v4l2_async_notifier_parse_fwnode_endpoints_by_port(dev, notifier, asd_struct_size, ports[i], parse_endpoint); - if (ret < 0) - goto out_cleanup; - } - } - - ret = v4l2_async_subdev_notifier_register(sd, notifier); - if (ret < 0) - goto out_cleanup; - - ret = v4l2_async_register_subdev(sd); - if (ret < 0) - goto out_unregister; - - sd->subdev_notifier = notifier; - - return 0; - -out_unregister: - v4l2_async_notifier_unregister(notifier); -out_cleanup: - v4l2_async_notifier_cleanup(notifier); - kfree(notifier); - - return ret; -} -EXPORT_SYMBOL_GPL(v4l2_async_register_fwnode_subdev); - MODULE_LICENSE("GPL"); MODULE_AUTHOR("Sakari Ailus "); MODULE_AUTHOR("Sylwester Nawrocki "); diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h index dd82d6d9764ef..fad7a6480bf94 100644 --- a/include/media/v4l2-fwnode.h +++ b/include/media/v4l2-fwnode.h @@ -20,7 +20,6 @@ #include #include -#include struct fwnode_handle; struct v4l2_async_notifier; @@ -490,43 +489,6 @@ v4l2_async_notifier_parse_fwnode_endpoints_by_port(struct device *dev, int v4l2_async_notifier_parse_fwnode_sensor_common(struct device *dev, struct v4l2_async_notifier *notifier); -/** - * v4l2_async_register_fwnode_subdev - registers a sub-device to the - * asynchronous sub-device framework - * and parses fwnode endpoints - * - * @sd: pointer to struct &v4l2_subdev - * @asd_struct_size: size of the driver's async sub-device struct, including - * sizeof(struct v4l2_async_subdev). The &struct - * v4l2_async_subdev shall be the first member of - * the driver's async sub-device struct, i.e. both - * begin at the same memory address. - * @ports: array of port id's to parse for fwnode endpoints. If NULL, will - * parse all ports owned by the sub-device. - * @num_ports: number of ports in @ports array. Ignored if @ports is NULL. - * @parse_endpoint: Driver's callback function called on each V4L2 fwnode - * endpoint. Optional. - * - * This function is just like v4l2_async_register_subdev() with the - * exception that calling it will also allocate a notifier for the - * sub-device, parse the sub-device's firmware node endpoints using - * v4l2_async_notifier_parse_fwnode_endpoints() or - * v4l2_async_notifier_parse_fwnode_endpoints_by_port(), and - * registers the sub-device notifier. The sub-device is similarly - * unregistered by calling v4l2_async_unregister_subdev(). - * - * While registered, the subdev module is marked as in-use. - * - * An error is returned if the module is no longer loaded on any attempts - * to register it. - */ -int -v4l2_async_register_fwnode_subdev(struct v4l2_subdev *sd, - size_t asd_struct_size, - unsigned int *ports, - unsigned int num_ports, - parse_endpoint_func parse_endpoint); - /* Helper macros to access the connector links. */ /** v4l2_connector_last_link - Helper macro to get the first -- GitLab From 596e5c5801cd97d3528b30447e23578656eba10b Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:41 +0200 Subject: [PATCH 350/503] media: imx: csi: Implement get_fwnode_pad op The CSI does not have a 1:1 relationship between fwnode port numbers and pad indexes. In fact the CSI fwnode device is itself a port which is the sink, containing only a single fwnode endpoint. Implement media_entity operation get_fwnode_pad to first verify the given endpoint is the CSI's sink endpoint, and if so return the CSI sink pad index. Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-csi.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 905b1ee27db67..08f698af47979 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -1832,9 +1832,32 @@ static void csi_unregistered(struct v4l2_subdev *sd) ipu_csi_put(priv->csi); } +/* + * The CSI has only one fwnode endpoint, at the sink pad. Verify the + * endpoint belongs to us, and return CSI_SINK_PAD. + */ +static int csi_get_fwnode_pad(struct media_entity *entity, + struct fwnode_endpoint *endpoint) +{ + struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); + struct csi_priv *priv = v4l2_get_subdevdata(sd); + struct fwnode_handle *csi_port = dev_fwnode(priv->dev); + struct fwnode_handle *csi_ep; + int ret; + + csi_ep = fwnode_get_next_child_node(csi_port, NULL); + + ret = endpoint->local_fwnode == csi_ep ? CSI_SINK_PAD : -ENXIO; + + fwnode_handle_put(csi_ep); + + return ret; +} + static const struct media_entity_operations csi_entity_ops = { .link_setup = csi_link_setup, .link_validate = v4l2_subdev_link_validate, + .get_fwnode_pad = csi_get_fwnode_pad, }; static const struct v4l2_subdev_core_ops csi_core_ops = { -- GitLab From 318cd36542801caecfc3eaa1fd733f59574ac0a9 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:42 +0200 Subject: [PATCH 351/503] media: video-mux: Implement get_fwnode_pad op Use v4l2_subdev_get_fwnode_pad_1_to_1() as the get_fwnode_pad operation. The video mux maps fwnode port numbers and pad indexes 1:1. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/video-mux.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/video-mux.c b/drivers/media/platform/video-mux.c index 7b6c96a29aa52..9f148f403603e 100644 --- a/drivers/media/platform/video-mux.c +++ b/drivers/media/platform/video-mux.c @@ -97,6 +97,7 @@ static int video_mux_link_setup(struct media_entity *entity, static const struct media_entity_operations video_mux_ops = { .link_setup = video_mux_link_setup, .link_validate = v4l2_subdev_link_validate, + .get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1, }; static int video_mux_s_stream(struct v4l2_subdev *sd, int enable) -- GitLab From fd5b69df4ffc62e81b149b54c0676125b8afe25c Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:43 +0200 Subject: [PATCH 352/503] media: imx: mipi csi-2: Implement get_fwnode_pad op Use v4l2_subdev_get_fwnode_pad_1_to_1() as the get_fwnode_pad operation. The MIPI CSI-2 receiver maps port numbers and pad indexes 1:1. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx6-mipi-csi2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/imx/imx6-mipi-csi2.c b/drivers/staging/media/imx/imx6-mipi-csi2.c index 332d77aec8aa8..23823c8c6c3d6 100644 --- a/drivers/staging/media/imx/imx6-mipi-csi2.c +++ b/drivers/staging/media/imx/imx6-mipi-csi2.c @@ -510,6 +510,7 @@ static int csi2_registered(struct v4l2_subdev *sd) static const struct media_entity_operations csi2_entity_ops = { .link_setup = csi2_link_setup, .link_validate = v4l2_subdev_link_validate, + .get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1, }; static const struct v4l2_subdev_video_ops csi2_video_ops = { -- GitLab From eff218f2418094a8dd45a4ec8cf239d669123a4d Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:44 +0200 Subject: [PATCH 353/503] media: imx: imx7-mipi-csis: Implement get_fwnode_pad op Use v4l2_subdev_get_fwnode_pad_1_to_1() as the get_fwnode_pad operation. The imx7-mipi-csis maps port numbers and pad indexes 1:1. Signed-off-by: Steve Longerbeam Acked-by: Rui Miguel Silva Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 0be232f981934..2da59d298ccf5 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -906,6 +906,7 @@ static const struct v4l2_subdev_core_ops mipi_csis_core_ops = { static const struct media_entity_operations mipi_csis_entity_ops = { .link_setup = mipi_csis_link_setup, .link_validate = v4l2_subdev_link_validate, + .get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1, }; static const struct v4l2_subdev_video_ops mipi_csis_video_ops = { -- GitLab From 400a9034c466358c7ae25a47f948648db8735b57 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:45 +0200 Subject: [PATCH 354/503] media: imx: imx7-media-csi: Implement get_fwnode_pad op Use v4l2_subdev_get_fwnode_pad_1_to_1() as the get_fwnode_pad operation. The i.MX7 CSI maps port numbers and pad indexes 1:1. Acked-by: Rui Miguel Silva Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-media-csi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index abef59dc22b66..c74455f65b3e7 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -1179,6 +1179,7 @@ static int imx7_csi_init_cfg(struct v4l2_subdev *sd, static const struct media_entity_operations imx7_csi_entity_ops = { .link_setup = imx7_csi_link_setup, .link_validate = v4l2_subdev_link_validate, + .get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1, }; static const struct v4l2_subdev_video_ops imx7_csi_video_ops = { -- GitLab From 612b385efb1e40ea65b6ae081b746bf2ec688a81 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:46 +0200 Subject: [PATCH 355/503] media: video-mux: Create media links in bound notifier Implement a notifier bound op to register media links from the remote sub-device's source pad(s) to the video-mux sink pad(s). Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/platform/video-mux.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/media/platform/video-mux.c b/drivers/media/platform/video-mux.c index 9f148f403603e..53570250a25d5 100644 --- a/drivers/media/platform/video-mux.c +++ b/drivers/media/platform/video-mux.c @@ -17,6 +17,7 @@ #include #include #include +#include #include struct video_mux { @@ -36,6 +37,12 @@ static const struct v4l2_mbus_framefmt video_mux_format_mbus_default = { .field = V4L2_FIELD_NONE, }; +static inline struct video_mux * +notifier_to_video_mux(struct v4l2_async_notifier *n) +{ + return container_of(n, struct video_mux, notifier); +} + static inline struct video_mux *v4l2_subdev_to_video_mux(struct v4l2_subdev *sd) { return container_of(sd, struct video_mux, subdev); @@ -332,6 +339,19 @@ static const struct v4l2_subdev_ops video_mux_subdev_ops = { .video = &video_mux_subdev_video_ops, }; +static int video_mux_notify_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) +{ + struct video_mux *vmux = notifier_to_video_mux(notifier); + + return v4l2_create_fwnode_links(sd, &vmux->subdev); +} + +static const struct v4l2_async_notifier_operations video_mux_notify_ops = { + .bound = video_mux_notify_bound, +}; + static int video_mux_async_register(struct video_mux *vmux, unsigned int num_input_pads) { @@ -369,6 +389,8 @@ static int video_mux_async_register(struct video_mux *vmux, } } + vmux->notifier.ops = &video_mux_notify_ops; + ret = v4l2_async_subdev_notifier_register(&vmux->subdev, &vmux->notifier); if (ret) -- GitLab From 8b4713c9939b6aa638b95a97d6b30eadaae799b0 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:47 +0200 Subject: [PATCH 356/503] media: imx: mipi csi-2: Create media links in bound notifier Implement a notifier bound op to register media links from the remote sub-device's source pad(s) to the mipi csi-2 receiver sink pad. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx6-mipi-csi2.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/staging/media/imx/imx6-mipi-csi2.c b/drivers/staging/media/imx/imx6-mipi-csi2.c index 23823c8c6c3d6..94d87d27d3896 100644 --- a/drivers/staging/media/imx/imx6-mipi-csi2.c +++ b/drivers/staging/media/imx/imx6-mipi-csi2.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include "imx-media.h" @@ -91,6 +92,11 @@ static inline struct csi2_dev *sd_to_dev(struct v4l2_subdev *sdev) return container_of(sdev, struct csi2_dev, sd); } +static inline struct csi2_dev *notifier_to_dev(struct v4l2_async_notifier *n) +{ + return container_of(n, struct csi2_dev, notifier); +} + /* * The required sequence of MIPI CSI-2 startup as specified in the i.MX6 * reference manual is as follows: @@ -532,6 +538,20 @@ static const struct v4l2_subdev_internal_ops csi2_internal_ops = { .registered = csi2_registered, }; +static int csi2_notify_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) +{ + struct csi2_dev *csi2 = notifier_to_dev(notifier); + struct media_pad *sink = &csi2->sd.entity.pads[CSI2_SINK_PAD]; + + return v4l2_create_fwnode_links_to_pad(sd, sink); +} + +static const struct v4l2_async_notifier_operations csi2_notify_ops = { + .bound = csi2_notify_bound, +}; + static int csi2_async_register(struct csi2_dev *csi2) { struct v4l2_fwnode_endpoint vep = { @@ -570,6 +590,8 @@ static int csi2_async_register(struct csi2_dev *csi2) fwnode_handle_put(ep); + csi2->notifier.ops = &csi2_notify_ops; + ret = v4l2_async_subdev_notifier_register(&csi2->sd, &csi2->notifier); if (ret) -- GitLab From 6e996653e757407d616d1f1fef760f74db6ef92c Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:48 +0200 Subject: [PATCH 357/503] media: imx7: mipi csis: Create media links in bound notifier Implement a notifier bound op to register media links from the remote sub-device's source pad(s) to the mipi csi-2 receiver sink pad. Signed-off-by: Steve Longerbeam Acked-by: Rui Miguel Silva Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-mipi-csis.c | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c index 2da59d298ccf5..7612993cc1d68 100644 --- a/drivers/staging/media/imx/imx7-mipi-csis.c +++ b/drivers/staging/media/imx/imx7-mipi-csis.c @@ -26,6 +26,7 @@ #include #include +#include #include #define CSIS_DRIVER_NAME "imx7-mipi-csis" @@ -385,6 +386,12 @@ static int mipi_csis_dump_regs(struct csi_state *state) return 0; } +static struct csi_state * +mipi_notifier_to_csis_state(struct v4l2_async_notifier *n) +{ + return container_of(n, struct csi_state, notifier); +} + static struct csi_state *mipi_sd_to_csis_state(struct v4l2_subdev *sdev) { return container_of(sdev, struct csi_state, mipi_sd); @@ -948,6 +955,20 @@ static int mipi_csis_parse_dt(struct platform_device *pdev, static int mipi_csis_pm_resume(struct device *dev, bool runtime); +static int mipi_csis_notify_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) +{ + struct csi_state *state = mipi_notifier_to_csis_state(notifier); + struct media_pad *sink = &state->mipi_sd.entity.pads[CSIS_PAD_SINK]; + + return v4l2_create_fwnode_links_to_pad(sd, sink); +} + +static const struct v4l2_async_notifier_operations mipi_csis_notify_ops = { + .bound = mipi_csis_notify_bound, +}; + static int mipi_csis_subdev_init(struct v4l2_subdev *mipi_sd, struct platform_device *pdev, const struct v4l2_subdev_ops *ops) @@ -1016,6 +1037,8 @@ static int mipi_csis_async_register(struct csi_state *state) fwnode_handle_put(ep); + state->notifier.ops = &mipi_csis_notify_ops; + ret = v4l2_async_subdev_notifier_register(&state->mipi_sd, &state->notifier); if (ret) -- GitLab From 94b99296f3d97360b9ba6ad181584f3b5504a540 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:49 +0200 Subject: [PATCH 358/503] media: imx7: csi: Create media links in bound notifier Implement a notifier bound op to register media links from the remote sub-device's source pad(s) to the CSI sink pad. Signed-off-by: Steve Longerbeam Reviewed-by: Rui Miguel Silva Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-media-csi.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index c74455f65b3e7..21a86fa3d89b0 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -196,6 +196,12 @@ struct imx7_csi { struct completion last_eof_completion; }; +static struct imx7_csi * +imx7_csi_notifier_to_dev(struct v4l2_async_notifier *n) +{ + return container_of(n, struct imx7_csi, notifier); +} + static u32 imx7_csi_reg_read(struct imx7_csi *csi, unsigned int offset) { return readl(csi->regbase + offset); @@ -1204,6 +1210,20 @@ static const struct v4l2_subdev_internal_ops imx7_csi_internal_ops = { .unregistered = imx7_csi_unregistered, }; +static int imx7_csi_notify_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) +{ + struct imx7_csi *csi = imx7_csi_notifier_to_dev(notifier); + struct media_pad *sink = &csi->sd.entity.pads[IMX7_CSI_PAD_SINK]; + + return v4l2_create_fwnode_links_to_pad(sd, sink); +} + +static const struct v4l2_async_notifier_operations imx7_csi_notify_ops = { + .bound = imx7_csi_notify_bound, +}; + static int imx7_csi_async_register(struct imx7_csi *csi) { struct v4l2_async_subdev *asd = NULL; @@ -1234,6 +1254,8 @@ static int imx7_csi_async_register(struct imx7_csi *csi) } } + csi->notifier.ops = &imx7_csi_notify_ops; + ret = v4l2_async_subdev_notifier_register(&csi->sd, &csi->notifier); if (ret) return ret; -- GitLab From 2c586f18919895f0acb9906dcd8a1790b19464bc Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:50 +0200 Subject: [PATCH 359/503] media: imx: csi: Create media links in bound notifier Implement a notifier bound op to register media links from the remote sub-device's source pad(s) to the CSI sink pad. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-csi.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 08f698af47979..a051a063a2db3 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -120,6 +120,11 @@ static inline struct csi_priv *sd_to_dev(struct v4l2_subdev *sdev) return container_of(sdev, struct csi_priv, sd); } +static inline struct csi_priv *notifier_to_dev(struct v4l2_async_notifier *n) +{ + return container_of(n, struct csi_priv, notifier); +} + static inline bool is_parallel_bus(struct v4l2_fwnode_endpoint *ep) { return ep->bus_type != V4L2_MBUS_CSI2_DPHY; @@ -1894,6 +1899,20 @@ static const struct v4l2_subdev_internal_ops csi_internal_ops = { .unregistered = csi_unregistered, }; +static int imx_csi_notify_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_subdev *asd) +{ + struct csi_priv *priv = notifier_to_dev(notifier); + struct media_pad *sink = &priv->sd.entity.pads[CSI_SINK_PAD]; + + return v4l2_create_fwnode_links_to_pad(sd, sink); +} + +static const struct v4l2_async_notifier_operations csi_notify_ops = { + .bound = imx_csi_notify_bound, +}; + static int imx_csi_async_register(struct csi_priv *priv) { struct v4l2_async_subdev *asd = NULL; @@ -1931,6 +1950,8 @@ static int imx_csi_async_register(struct csi_priv *priv) } } + priv->notifier.ops = &csi_notify_ops; + ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier); if (ret) -- GitLab From fe7aee5d353346968eba111a0414250d8cc09527 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:51 +0200 Subject: [PATCH 360/503] media: imx7: csi: Remove imx7_csi_get_upstream_endpoint() The function imx7_csi_get_upstream_endpoint() is not necessary for imx7. First, the imx7 CSI only receives from the CSI mux, so much of the code in there is pointless. Second, it is only used to determine whether the CSI mux has selected the CSI-2 input or the parallel input. This can be accomplished much more simply by getting the function type of selected input entity to the CSI mux. Signed-off-by: Steve Longerbeam Acked-by: Rui Miguel Silva Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx7-media-csi.c | 77 ++++------------------ 1 file changed, 12 insertions(+), 65 deletions(-) diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index 21a86fa3d89b0..69f7abb32ae1a 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -169,8 +169,6 @@ struct imx7_csi { struct media_entity *sink; - struct v4l2_fwnode_endpoint upstream_ep; - struct v4l2_mbus_framefmt format_mbus[IMX7_CSI_PADS_NUM]; const struct imx_media_pixfmt *cc[IMX7_CSI_PADS_NUM]; struct v4l2_fract frame_interval[IMX7_CSI_PADS_NUM]; @@ -435,61 +433,6 @@ static void imx7_csi_deinit(struct imx7_csi *csi) csi->is_init = false; } -static int imx7_csi_get_upstream_endpoint(struct imx7_csi *csi, - struct v4l2_fwnode_endpoint *ep, - bool skip_mux) -{ - struct device_node *endpoint, *port; - struct media_entity *src; - struct v4l2_subdev *sd; - struct media_pad *pad; - - if (!csi->src_sd) - return -EPIPE; - - src = &csi->src_sd->entity; - - /* - * if the source is neither a mux or csi2 get the one directly upstream - * from this csi - */ - if (src->function != MEDIA_ENT_F_VID_IF_BRIDGE && - src->function != MEDIA_ENT_F_VID_MUX) - src = &csi->sd.entity; - -skip_video_mux: - /* get source pad of entity directly upstream from src */ - pad = imx_media_pipeline_pad(src, 0, 0, true); - if (!pad) - return -ENODEV; - - sd = media_entity_to_v4l2_subdev(pad->entity); - - /* To get bus type we may need to skip video mux */ - if (skip_mux && src->function == MEDIA_ENT_F_VID_MUX) { - src = &sd->entity; - goto skip_video_mux; - } - - /* - * NOTE: this assumes an OF-graph port id is the same as a - * media pad index. - */ - port = of_graph_get_port_by_id(sd->dev->of_node, pad->index); - if (!port) - return -ENODEV; - - endpoint = of_get_next_child(port, NULL); - of_node_put(port); - if (!endpoint) - return -ENODEV; - - v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), ep); - of_node_put(endpoint); - - return 0; -} - static int imx7_csi_link_setup(struct media_entity *entity, const struct media_pad *local, const struct media_pad *remote, u32 flags) @@ -556,23 +499,27 @@ static int imx7_csi_pad_link_validate(struct v4l2_subdev *sd, struct v4l2_subdev_format *sink_fmt) { struct imx7_csi *csi = v4l2_get_subdevdata(sd); - struct v4l2_fwnode_endpoint upstream_ep = {}; + struct media_pad *pad; int ret; ret = v4l2_subdev_link_validate_default(sd, link, source_fmt, sink_fmt); if (ret) return ret; - ret = imx7_csi_get_upstream_endpoint(csi, &upstream_ep, true); - if (ret) { - v4l2_err(&csi->sd, "failed to find upstream endpoint\n"); - return ret; - } + if (!csi->src_sd) + return -EPIPE; + + /* + * find the entity that is selected by the CSI mux. This is needed + * to distinguish between a parallel or CSI-2 pipeline. + */ + pad = imx_media_pipeline_pad(&csi->src_sd->entity, 0, 0, true); + if (!pad) + return -ENODEV; mutex_lock(&csi->lock); - csi->upstream_ep = upstream_ep; - csi->is_csi2 = (upstream_ep.bus_type == V4L2_MBUS_CSI2_DPHY); + csi->is_csi2 = (pad->entity->function == MEDIA_ENT_F_VID_IF_BRIDGE); mutex_unlock(&csi->lock); -- GitLab From 86e02d07871c2ea389cc94becb2009c59420cd57 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:52 +0200 Subject: [PATCH 361/503] media: imx5/6/7: csi: Mark a bound video mux as a CSI mux For i.MX5/6, if the bound subdev is a video mux, it must be one of the CSI muxes, and for i.MX7, the bound subdev must always be a CSI mux. So if the bound subdev is a video mux, mark it as a CSI mux with a new group id IMX_MEDIA_GRP_ID_CSI_MUX. In the process use the new group id in csi_get_upstream_endpoint(), and do some cleanup in that function for better readability. Suggested-by: Laurent Pinchart Signed-off-by: Steve Longerbeam Acked-by: Rui Miguel Silva Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-csi.c | 45 +++++++++++++--------- drivers/staging/media/imx/imx-media.h | 1 + drivers/staging/media/imx/imx7-media-csi.c | 7 ++++ 3 files changed, 35 insertions(+), 18 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index a051a063a2db3..6cfbe67c43d17 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -165,7 +165,6 @@ static int csi_get_upstream_endpoint(struct csi_priv *priv, struct v4l2_fwnode_endpoint *ep) { struct device_node *endpoint, *port; - struct media_entity *src; struct v4l2_subdev *sd; struct media_pad *pad; @@ -176,30 +175,33 @@ static int csi_get_upstream_endpoint(struct csi_priv *priv, return -EPIPE; sd = priv->src_sd; - src = &sd->entity; - if (src->function == MEDIA_ENT_F_VID_MUX) { + switch (sd->grp_id) { + case IMX_MEDIA_GRP_ID_CSI_MUX: /* - * CSI is connected directly to video mux, skip up to + * CSI is connected directly to CSI mux, skip up to * CSI-2 receiver if it is in the path, otherwise stay - * with video mux. + * with the CSI mux. */ - sd = imx_media_pipeline_subdev(src, IMX_MEDIA_GRP_ID_CSI2, + sd = imx_media_pipeline_subdev(&sd->entity, + IMX_MEDIA_GRP_ID_CSI2, true); - if (!IS_ERR(sd)) - src = &sd->entity; + if (IS_ERR(sd)) + sd = priv->src_sd; + break; + case IMX_MEDIA_GRP_ID_CSI2: + break; + default: + /* + * the source is neither the CSI mux nor the CSI-2 receiver, + * get the source pad directly upstream from CSI itself. + */ + sd = &priv->sd; + break; } - /* - * If the source is neither the video mux nor the CSI-2 receiver, - * get the source pad directly upstream from CSI itself. - */ - if (src->function != MEDIA_ENT_F_VID_MUX && - sd->grp_id != IMX_MEDIA_GRP_ID_CSI2) - src = &priv->sd.entity; - - /* get source pad of entity directly upstream from src */ - pad = imx_media_pipeline_pad(src, 0, 0, true); + /* get source pad of entity directly upstream from sd */ + pad = imx_media_pipeline_pad(&sd->entity, 0, 0, true); if (!pad) return -ENODEV; @@ -1906,6 +1908,13 @@ static int imx_csi_notify_bound(struct v4l2_async_notifier *notifier, struct csi_priv *priv = notifier_to_dev(notifier); struct media_pad *sink = &priv->sd.entity.pads[CSI_SINK_PAD]; + /* + * If the subdev is a video mux, it must be one of the CSI + * muxes. Mark it as such via its group id. + */ + if (sd->entity.function == MEDIA_ENT_F_VID_MUX) + sd->grp_id = IMX_MEDIA_GRP_ID_CSI_MUX; + return v4l2_create_fwnode_links_to_pad(sd, sink); } diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index ca36beca16deb..b5b7d32457279 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -311,5 +311,6 @@ void imx_media_csc_scaler_device_unregister(struct imx_media_video_dev *vdev); #define IMX_MEDIA_GRP_ID_IPU_IC_PRP BIT(13) #define IMX_MEDIA_GRP_ID_IPU_IC_PRPENC BIT(14) #define IMX_MEDIA_GRP_ID_IPU_IC_PRPVF BIT(15) +#define IMX_MEDIA_GRP_ID_CSI_MUX BIT(16) #endif diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index 69f7abb32ae1a..a3f3df9017046 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -1164,6 +1164,13 @@ static int imx7_csi_notify_bound(struct v4l2_async_notifier *notifier, struct imx7_csi *csi = imx7_csi_notifier_to_dev(notifier); struct media_pad *sink = &csi->sd.entity.pads[IMX7_CSI_PAD_SINK]; + /* The bound subdev must always be the CSI mux */ + if (WARN_ON(sd->entity.function != MEDIA_ENT_F_VID_MUX)) + return -ENXIO; + + /* Mark it as such via its group id */ + sd->grp_id = IMX_MEDIA_GRP_ID_CSI_MUX; + return v4l2_create_fwnode_links_to_pad(sd, sink); } -- GitLab From f02eac790df271976a2e22a11c46d1d95f8b93eb Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:53 +0200 Subject: [PATCH 362/503] media: imx: csi: Lookup upstream endpoint with imx_media_get_pad_fwnode Fix the 1:1 port-id:pad-index assumption for the upstream subdevice, by searching the upstream subdevice's endpoints for one that maps to the pad's index. This is carried out by a new reverse mapping function imx_media_get_pad_fwnode(). Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-csi.c | 22 ++++---------- drivers/staging/media/imx/imx-media-utils.c | 33 +++++++++++++++++++++ drivers/staging/media/imx/imx-media.h | 1 + 3 files changed, 40 insertions(+), 16 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c index 6cfbe67c43d17..d7e5b9ed27b83 100644 --- a/drivers/staging/media/imx/imx-media-csi.c +++ b/drivers/staging/media/imx/imx-media-csi.c @@ -164,7 +164,7 @@ static inline bool requires_passthrough(struct v4l2_fwnode_endpoint *ep, static int csi_get_upstream_endpoint(struct csi_priv *priv, struct v4l2_fwnode_endpoint *ep) { - struct device_node *endpoint, *port; + struct fwnode_handle *endpoint; struct v4l2_subdev *sd; struct media_pad *pad; @@ -205,23 +205,13 @@ static int csi_get_upstream_endpoint(struct csi_priv *priv, if (!pad) return -ENODEV; - sd = media_entity_to_v4l2_subdev(pad->entity); + endpoint = imx_media_get_pad_fwnode(pad); + if (IS_ERR(endpoint)) + return PTR_ERR(endpoint); - /* - * NOTE: this assumes an OF-graph port id is the same as a - * media pad index. - */ - port = of_graph_get_port_by_id(sd->dev->of_node, pad->index); - if (!port) - return -ENODEV; - - endpoint = of_get_next_child(port, NULL); - of_node_put(port); - if (!endpoint) - return -ENODEV; + v4l2_fwnode_endpoint_parse(endpoint, ep); - v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), ep); - of_node_put(endpoint); + fwnode_handle_put(endpoint); return 0; } diff --git a/drivers/staging/media/imx/imx-media-utils.c b/drivers/staging/media/imx/imx-media-utils.c index 4ba6a5310f762..c2088f7ceef55 100644 --- a/drivers/staging/media/imx/imx-media-utils.c +++ b/drivers/staging/media/imx/imx-media-utils.c @@ -834,6 +834,39 @@ imx_media_pipeline_video_device(struct media_entity *start_entity, } EXPORT_SYMBOL_GPL(imx_media_pipeline_video_device); +/* + * Find a fwnode endpoint that maps to the given subdevice's pad. + * If there are multiple endpoints that map to the pad, only the + * first endpoint encountered is returned. + * + * On success the refcount of the returned fwnode endpoint is + * incremented. + */ +struct fwnode_handle *imx_media_get_pad_fwnode(struct media_pad *pad) +{ + struct fwnode_handle *endpoint; + struct v4l2_subdev *sd; + + if (!is_media_entity_v4l2_subdev(pad->entity)) + return ERR_PTR(-ENODEV); + + sd = media_entity_to_v4l2_subdev(pad->entity); + + fwnode_graph_for_each_endpoint(dev_fwnode(sd->dev), endpoint) { + int pad_idx = media_entity_get_fwnode_pad(&sd->entity, + endpoint, + pad->flags); + if (pad_idx < 0) + continue; + + if (pad_idx == pad->index) + return endpoint; + } + + return ERR_PTR(-ENODEV); +} +EXPORT_SYMBOL_GPL(imx_media_get_pad_fwnode); + /* * Turn current pipeline streaming on/off starting from entity. */ diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index b5b7d32457279..c5f2aa2f0e980 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -220,6 +220,7 @@ imx_media_pipeline_subdev(struct media_entity *start_entity, u32 grp_id, struct video_device * imx_media_pipeline_video_device(struct media_entity *start_entity, enum v4l2_buf_type buftype, bool upstream); +struct fwnode_handle *imx_media_get_pad_fwnode(struct media_pad *pad); struct imx_media_dma_buf { void *virt; -- GitLab From f0c1210f8a12c5c03f3b9717869af5052d42c4c3 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:54 +0200 Subject: [PATCH 363/503] media: imx: Create missing links from CSI-2 receiver The entities external to the i.MX6 IPU and i.MX7 now create the links to their fwnode-endpoint connected entities in their notifier bound callbacks. Which means imx_media_create_of_links() and imx_media_create_csi_of_links() are no longer needed and are removed. However there is still one case in which imx-media needs to create fwnode-endpoint based links at probe completion. The v4l2-async framework does not allow multiple subdevice notifiers to contain a duplicate subdevice in their asd_list. Only the first subdev notifier that discovers and adds that one subdevice to its asd_list will receive a bound callback for it. Other subdevices that also have firmware endpoint connections to this duplicate subdevice will not have it in their asd_list, and thus will never receive a bound callback for it. In the case of imx-media, the one duplicate subdevice in question is the i.MX6 MIPI CSI-2 receiver. Until there is a solution to that problem, rewrite imx_media_create_links() to add the missing links from the CSI-2 receiver to the CSIs and CSI muxes. The function is renamed imx_media_create_csi2_links(). Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/imx/imx-media-dev-common.c | 46 +++---- drivers/staging/media/imx/imx-media-of.c | 114 ------------------ drivers/staging/media/imx/imx-media.h | 4 - 3 files changed, 17 insertions(+), 147 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-dev-common.c b/drivers/staging/media/imx/imx-media-dev-common.c index 66b505f7e8dff..f6ad9631fa0e0 100644 --- a/drivers/staging/media/imx/imx-media-dev-common.c +++ b/drivers/staging/media/imx/imx-media-dev-common.c @@ -30,41 +30,31 @@ static int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, } /* - * Create the media links for all subdevs that registered. + * Create the missing media links from the CSI-2 receiver. * Called after all async subdevs have bound. */ -static int imx_media_create_links(struct v4l2_async_notifier *notifier) +static void imx_media_create_csi2_links(struct imx_media_dev *imxmd) { - struct imx_media_dev *imxmd = notifier2dev(notifier); - struct v4l2_subdev *sd; + struct v4l2_subdev *sd, *csi2 = NULL; list_for_each_entry(sd, &imxmd->v4l2_dev.subdevs, list) { - switch (sd->grp_id) { - case IMX_MEDIA_GRP_ID_IPU_VDIC: - case IMX_MEDIA_GRP_ID_IPU_IC_PRP: - case IMX_MEDIA_GRP_ID_IPU_IC_PRPENC: - case IMX_MEDIA_GRP_ID_IPU_IC_PRPVF: - /* - * links have already been created for the - * sync-registered subdevs. - */ - break; - case IMX_MEDIA_GRP_ID_IPU_CSI0: - case IMX_MEDIA_GRP_ID_IPU_CSI1: - case IMX_MEDIA_GRP_ID_CSI: - imx_media_create_csi_of_links(imxmd, sd); - break; - default: - /* - * if this subdev has fwnode links, create media - * links for them. - */ - imx_media_create_of_links(imxmd, sd); + if (sd->grp_id == IMX_MEDIA_GRP_ID_CSI2) { + csi2 = sd; break; } } + if (!csi2) + return; - return 0; + list_for_each_entry(sd, &imxmd->v4l2_dev.subdevs, list) { + /* skip if not a CSI or a CSI mux */ + if (!(sd->grp_id & IMX_MEDIA_GRP_ID_IPU_CSI) && + !(sd->grp_id & IMX_MEDIA_GRP_ID_CSI) && + !(sd->grp_id & IMX_MEDIA_GRP_ID_CSI_MUX)) + continue; + + v4l2_create_fwnode_links(csi2, sd); + } } /* @@ -196,9 +186,7 @@ int imx_media_probe_complete(struct v4l2_async_notifier *notifier) mutex_lock(&imxmd->mutex); - ret = imx_media_create_links(notifier); - if (ret) - goto unlock; + imx_media_create_csi2_links(imxmd); ret = imx_media_create_pad_vdev_lists(imxmd); if (ret) diff --git a/drivers/staging/media/imx/imx-media-of.c b/drivers/staging/media/imx/imx-media-of.c index 2d3efd2a6dde0..82e13e972e233 100644 --- a/drivers/staging/media/imx/imx-media-of.c +++ b/drivers/staging/media/imx/imx-media-of.c @@ -74,117 +74,3 @@ int imx_media_add_of_subdevs(struct imx_media_dev *imxmd, return ret; } EXPORT_SYMBOL_GPL(imx_media_add_of_subdevs); - -/* - * Create a single media link to/from sd using a fwnode link. - * - * NOTE: this function assumes an OF port node is equivalent to - * a media pad (port id equal to media pad index), and that an - * OF endpoint node is equivalent to a media link. - */ -static int create_of_link(struct imx_media_dev *imxmd, - struct v4l2_subdev *sd, - struct v4l2_fwnode_link *link) -{ - struct v4l2_subdev *remote, *src, *sink; - int src_pad, sink_pad; - - if (link->local_port >= sd->entity.num_pads) - return -EINVAL; - - remote = imx_media_find_subdev_by_fwnode(imxmd, link->remote_node); - if (!remote) - return 0; - - if (sd->entity.pads[link->local_port].flags & MEDIA_PAD_FL_SINK) { - src = remote; - src_pad = link->remote_port; - sink = sd; - sink_pad = link->local_port; - } else { - src = sd; - src_pad = link->local_port; - sink = remote; - sink_pad = link->remote_port; - } - - /* make sure link doesn't already exist before creating */ - if (media_entity_find_link(&src->entity.pads[src_pad], - &sink->entity.pads[sink_pad])) - return 0; - - v4l2_info(sd->v4l2_dev, "%s:%d -> %s:%d\n", - src->name, src_pad, sink->name, sink_pad); - - return media_create_pad_link(&src->entity, src_pad, - &sink->entity, sink_pad, 0); -} - -/* - * Create media links to/from sd using its device-tree endpoints. - */ -int imx_media_create_of_links(struct imx_media_dev *imxmd, - struct v4l2_subdev *sd) -{ - struct v4l2_fwnode_link link; - struct device_node *ep; - int ret; - - for_each_endpoint_of_node(sd->dev->of_node, ep) { - ret = v4l2_fwnode_parse_link(of_fwnode_handle(ep), &link); - if (ret) - continue; - - ret = create_of_link(imxmd, sd, &link); - v4l2_fwnode_put_link(&link); - if (ret) - return ret; - } - - return 0; -} -EXPORT_SYMBOL_GPL(imx_media_create_of_links); - -/* - * Create media links to the given CSI subdevice's sink pads, - * using its device-tree endpoints. - */ -int imx_media_create_csi_of_links(struct imx_media_dev *imxmd, - struct v4l2_subdev *csi) -{ - struct device_node *csi_np = csi->dev->of_node; - struct device_node *ep; - - for_each_child_of_node(csi_np, ep) { - struct fwnode_handle *fwnode, *csi_ep; - struct v4l2_fwnode_link link; - int ret; - - memset(&link, 0, sizeof(link)); - - link.local_node = of_fwnode_handle(csi_np); - link.local_port = CSI_SINK_PAD; - - csi_ep = of_fwnode_handle(ep); - - fwnode = fwnode_graph_get_remote_endpoint(csi_ep); - if (!fwnode) - continue; - - fwnode = fwnode_get_parent(fwnode); - fwnode_property_read_u32(fwnode, "reg", &link.remote_port); - fwnode = fwnode_get_next_parent(fwnode); - if (is_of_node(fwnode) && - of_node_name_eq(to_of_node(fwnode), "ports")) - fwnode = fwnode_get_next_parent(fwnode); - link.remote_node = fwnode; - - ret = create_of_link(imxmd, csi, &link); - fwnode_handle_put(link.remote_node); - if (ret) - return ret; - } - - return 0; -} -EXPORT_SYMBOL_GPL(imx_media_create_csi_of_links); diff --git a/drivers/staging/media/imx/imx-media.h b/drivers/staging/media/imx/imx-media.h index c5f2aa2f0e980..f17135158029e 100644 --- a/drivers/staging/media/imx/imx-media.h +++ b/drivers/staging/media/imx/imx-media.h @@ -263,10 +263,6 @@ void imx_media_unregister_ipu_internal_subdevs(struct imx_media_dev *imxmd); /* imx-media-of.c */ int imx_media_add_of_subdevs(struct imx_media_dev *dev, struct device_node *np); -int imx_media_create_of_links(struct imx_media_dev *imxmd, - struct v4l2_subdev *sd); -int imx_media_create_csi_of_links(struct imx_media_dev *imxmd, - struct v4l2_subdev *csi); int imx_media_of_add_csi(struct imx_media_dev *imxmd, struct device_node *csi_np); -- GitLab From 50da3f36e60e84f671e5bcb67f436512b43e5eac Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:55 +0200 Subject: [PATCH 364/503] media: imx: silence a couple debug messages Convert to dev_dbg the "subdev bound" and IPU-internal media-link creation messages. Signed-off-by: Steve Longerbeam Reviewed-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/imx-media-dev-common.c | 4 +++- drivers/staging/media/imx/imx-media-dev.c | 2 +- drivers/staging/media/imx/imx-media-internal-sd.c | 6 +++--- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/imx/imx-media-dev-common.c b/drivers/staging/media/imx/imx-media-dev-common.c index f6ad9631fa0e0..5fe4b22ab8473 100644 --- a/drivers/staging/media/imx/imx-media-dev-common.c +++ b/drivers/staging/media/imx/imx-media-dev-common.c @@ -24,7 +24,9 @@ static int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, struct v4l2_subdev *sd, struct v4l2_async_subdev *asd) { - v4l2_info(sd->v4l2_dev, "subdev %s bound\n", sd->name); + struct imx_media_dev *imxmd = notifier2dev(notifier); + + dev_dbg(imxmd->md.dev, "subdev %s bound\n", sd->name); return 0; } diff --git a/drivers/staging/media/imx/imx-media-dev.c b/drivers/staging/media/imx/imx-media-dev.c index 2c3c2adca6832..6d2205461e565 100644 --- a/drivers/staging/media/imx/imx-media-dev.c +++ b/drivers/staging/media/imx/imx-media-dev.c @@ -32,7 +32,7 @@ static int imx_media_subdev_bound(struct v4l2_async_notifier *notifier, return ret; } - v4l2_info(&imxmd->v4l2_dev, "subdev %s bound\n", sd->name); + dev_dbg(imxmd->md.dev, "subdev %s bound\n", sd->name); return 0; } diff --git a/drivers/staging/media/imx/imx-media-internal-sd.c b/drivers/staging/media/imx/imx-media-internal-sd.c index d4237e1a4241a..da4109b2fd136 100644 --- a/drivers/staging/media/imx/imx-media-internal-sd.c +++ b/drivers/staging/media/imx/imx-media-internal-sd.c @@ -142,9 +142,9 @@ static int create_internal_link(struct imx_media_dev *imxmd, &sink->entity.pads[link->remote_pad])) return 0; - v4l2_info(&imxmd->v4l2_dev, "%s:%d -> %s:%d\n", - src->name, link->local_pad, - sink->name, link->remote_pad); + dev_dbg(imxmd->md.dev, "%s:%d -> %s:%d\n", + src->name, link->local_pad, + sink->name, link->remote_pad); ret = media_create_pad_link(&src->entity, link->local_pad, &sink->entity, link->remote_pad, 0); -- GitLab From c4e053660371a7a3a46cb1a1196c5785e4095890 Mon Sep 17 00:00:00 2001 From: Steve Longerbeam Date: Fri, 1 May 2020 19:15:56 +0200 Subject: [PATCH 365/503] media: imx: TODO: Remove media link creation todos Remove the TODO items regarding media link creation, these issues are resolved by moving media link creation to individual entity bound callbacks and the implementation of the get_fwnode_pad operation. Signed-off-by: Steve Longerbeam Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/imx/TODO | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/drivers/staging/media/imx/TODO b/drivers/staging/media/imx/TODO index 6f29b5ca5324c..a371cdedcdb0f 100644 --- a/drivers/staging/media/imx/TODO +++ b/drivers/staging/media/imx/TODO @@ -17,35 +17,6 @@ decided whether this feature is useful enough to make it generally available by exporting to v4l2-core. -- After all async subdevices have been bound, v4l2_fwnode_parse_link() - is used to form the media links between the devices discovered in - the OF graph. - - While this approach allows support for arbitrary OF graphs, there - are some assumptions for this to work: - - 1. If a port owned by a device in the graph has endpoint nodes, the - port is treated as a media pad. - - This presents problems for devices that don't make this port = pad - assumption. Examples are SMIAPP compatible cameras which define only - a single output port node, but which define multiple pads owned - by multiple subdevices (pixel-array, binner, scaler). Or video - decoders (entity function MEDIA_ENT_F_ATV_DECODER), which also define - only a single output port node, but define multiple pads for video, - VBI, and audio out. - - A workaround at present is to set the port reg properties to - correspond to the media pad index that the port represents. A - possible long-term solution is to implement a subdev API that - maps a port id to a media pad index. - - 2. Every endpoint of a port owned by a device in the graph is treated - as a media link. - - Which means a port must not contain mixed-use endpoints, they - must all refer to media links between V4L2 subdevices. - - i.MX7: all of the above, since it uses the imx media core - i.MX7: use Frame Interval Monitor -- GitLab From cabc918e5b877ed547e5b6463f5ea6e3ac4edbb3 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:44 +0200 Subject: [PATCH 366/503] media: dt-bindings: video-interfaces: Document 'orientation' property Add the 'orientation' device property, used to specify the device mounting position. The property is particularly meaningful for mobile devices with a well defined usage orientation. Reviewed-by: Rob Herring Acked-by: Tomasz Figa Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/media/video-interfaces.txt | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt index f884ada0bffc8..b1ff492c7da7a 100644 --- a/Documentation/devicetree/bindings/media/video-interfaces.txt +++ b/Documentation/devicetree/bindings/media/video-interfaces.txt @@ -89,6 +89,17 @@ Optional properties but a number of degrees counter clockwise. Typical values are 0 and 180 (upside down). +- orientation: The orientation of a device (typically an image sensor or a flash + LED) describing its mounting position relative to the usage orientation of the + system where the device is installed on. + Possible values are: + 0 - Front. The device is mounted on the front facing side of the system. + For mobile devices such as smartphones, tablets and laptops the front side is + the user facing side. + 1 - Back. The device is mounted on the back side of the system, which is + defined as the opposite side of the front facing one. + 2 - External. The device is not attached directly to the system but is + attached in a way that allows it to move freely. Optional endpoint properties ---------------------------- -- GitLab From 915bd31ce9ed328535e5ecf3ca730c5764ec1a38 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:45 +0200 Subject: [PATCH 367/503] media: dt-bindings: video-interface: Replace 'rotation' description Replace the 'rotation' property description by providing a definition relative to the camera sensor pixel array coordinate system and the captured scene. Acked-by: Rob Herring Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../bindings/media/video-interfaces.txt | 359 +++++++++++++++++- 1 file changed, 356 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt index b1ff492c7da7a..3920f25a91235 100644 --- a/Documentation/devicetree/bindings/media/video-interfaces.txt +++ b/Documentation/devicetree/bindings/media/video-interfaces.txt @@ -85,9 +85,362 @@ Optional properties - lens-focus: A phandle to the node of the focus lens controller. -- rotation: The device, typically an image sensor, is not mounted upright, - but a number of degrees counter clockwise. Typical values are 0 and 180 - (upside down). +- rotation: The camera rotation is expressed as the angular difference in + degrees between two reference systems, one relative to the camera module, and + one defined on the external world scene to be captured when projected on the + image sensor pixel array. + + A camera sensor has a 2-dimensional reference system 'Rc' defined by + its pixel array read-out order. The origin is set to the first pixel + being read out, the X-axis points along the column read-out direction + towards the last columns, and the Y-axis along the row read-out + direction towards the last row. + + A typical example for a sensor with a 2592x1944 pixel array matrix + observed from the front is: + + 2591 X-axis 0 + <------------------------+ 0 + .......... ... ..........! + .......... ... ..........! Y-axis + ... ! + .......... ... ..........! + .......... ... ..........! 1943 + V + + The external world scene reference system 'Rs' is a 2-dimensional + reference system on the focal plane of the camera module. The origin is + placed on the top-left corner of the visible scene, the X-axis points + towards the right, and the Y-axis points towards the bottom of the + scene. The top, bottom, left and right directions are intentionally not + defined and depend on the environment in which the camera is used. + + A typical example of a (very common) picture of a shark swimming from + left to right, as seen from the camera, is: + + 0 X-axis + 0 +-------------------------------------> + ! + ! + ! + ! |\____)\___ + ! ) _____ __`< + ! |/ )/ + ! + ! + ! + V + Y-axis + + with the reference system 'Rs' placed on the camera focal plane: + + ¸.·˙! + ¸.·˙ ! + _ ¸.·˙ ! + +-/ \-+¸.·˙ ! + | (o) | ! Camera focal plane + +-----+˙·.¸ ! + ˙·.¸ ! + ˙·.¸ ! + ˙·.¸! + + When projected on the sensor's pixel array, the image and the associated + reference system 'Rs' are typically (but not always) inverted, due to + the camera module's lens optical inversion effect. + + Assuming the above represented scene of the swimming shark, the lens + inversion projects the scene and its reference system onto the sensor + pixel array, seen from the front of the camera sensor, as follows: + + Y-axis + ^ + ! + ! + ! + ! |\_____)\__ + ! ) ____ ___.< + ! |/ )/ + ! + ! + ! + 0 +-------------------------------------> + 0 X-axis + + Note the shark being upside-down. + + The resulting projected reference system is named 'Rp'. + + The camera rotation property is then defined as the angular difference + in the counter-clockwise direction between the camera reference system + 'Rc' and the projected scene reference system 'Rp'. It is expressed in + degrees as a number in the range [0, 360[. + + Examples + + 0 degrees camera rotation: + + + Y-Rp + ^ + Y-Rc ! + ^ ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! 0 +-------------------------------------> + ! 0 X-Rp + 0 +-------------------------------------> + 0 X-Rc + + + X-Rc 0 + <------------------------------------+ 0 + X-Rp 0 ! + <------------------------------------+ 0 ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! V + ! Y-Rc + V + Y-Rp + + 90 degrees camera rotation: + + 0 Y-Rc + 0 +--------------------> + ! Y-Rp + ! ^ + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! 0 +-------------------------------------> + ! 0 X-Rp + ! + ! + ! + ! + V + X-Rc + + 180 degrees camera rotation: + + 0 + <------------------------------------+ 0 + X-Rc ! + Y-Rp ! + ^ ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! V + ! Y-Rc + 0 +-------------------------------------> + 0 X-Rp + + 270 degrees camera rotation: + + 0 Y-Rc + 0 +--------------------> + ! 0 + ! <-----------------------------------+ 0 + ! X-Rp ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! ! + ! V + ! Y-Rp + ! + ! + ! + ! + V + X-Rc + + + Example one - Webcam + + A camera module installed on the user facing part of a laptop screen + casing used for video calls. The captured images are meant to be + displayed in landscape mode (width > height) on the laptop screen. + + The camera is typically mounted upside-down to compensate the lens + optical inversion effect: + + Y-Rp + Y-Rc ^ + ^ ! + ! ! + ! ! |\_____)\__ + ! ! ) ____ ___.< + ! ! |/ )/ + ! ! + ! ! + ! ! + ! 0 +-------------------------------------> + ! 0 X-Rp + 0 +-------------------------------------> + 0 X-Rc + + The two reference systems are aligned, the resulting camera rotation is + 0 degrees, no rotation correction needs to be applied to the resulting + image once captured to memory buffers to correctly display it to users: + + +--------------------------------------+ + ! ! + ! ! + ! ! + ! |\____)\___ ! + ! ) _____ __`< ! + ! |/ )/ ! + ! ! + ! ! + ! ! + +--------------------------------------+ + + If the camera sensor is not mounted upside-down to compensate for the + lens optical inversion, the two reference systems will not be aligned, + with 'Rp' being rotated 180 degrees relatively to 'Rc': + + + X-Rc 0 + <------------------------------------+ 0 + ! + Y-Rp ! + ^ ! + ! ! + ! |\_____)\__ ! + ! ) ____ ___.< ! + ! |/ )/ ! + ! ! + ! ! + ! V + ! Y-Rc + 0 +-------------------------------------> + 0 X-Rp + + The image once captured to memory will then be rotated by 180 degrees: + + +--------------------------------------+ + ! ! + ! ! + ! ! + ! __/(_____/| ! + ! >.___ ____ ( ! + ! \( \| ! + ! ! + ! ! + ! ! + +--------------------------------------+ + + A software rotation correction of 180 degrees should be applied to + correctly display the image: + + +--------------------------------------+ + ! ! + ! ! + ! ! + ! |\____)\___ ! + ! ) _____ __`< ! + ! |/ )/ ! + ! ! + ! ! + ! ! + +--------------------------------------+ + + Example two - Phone camera + + A camera installed on the back side of a mobile device facing away from + the user. The captured images are meant to be displayed in portrait mode + (height > width) to match the device screen orientation and the device + usage orientation used when taking the picture. + + The camera sensor is typically mounted with its pixel array longer side + aligned to the device longer side, upside-down mounted to compensate for + the lens optical inversion effect: + + 0 Y-Rc + 0 +--------------------> + ! Y-Rp + ! ^ + ! ! + ! ! + ! ! + ! ! |\_____)\__ + ! ! ) ____ ___.< + ! ! |/ )/ + ! ! + ! ! + ! ! + ! 0 +-------------------------------------> + ! 0 X-Rp + ! + ! + ! + ! + V + X-Rc + + The two reference systems are not aligned and the 'Rp' reference + system is rotated by 90 degrees in the counter-clockwise direction + relatively to the 'Rc' reference system. + + The image once captured to memory will be rotated: + + +-------------------------------------+ + | _ _ | + | \ / | + | | | | + | | | | + | | > | + | < | | + | | | | + | . | + | V | + +-------------------------------------+ + + A correction of 90 degrees in counter-clockwise direction has to be + applied to correctly display the image in portrait mode on the device + screen: + + +--------------------+ + | | + | | + | | + | | + | | + | | + | |\____)\___ | + | ) _____ __`< | + | |/ )/ | + | | + | | + | | + | | + | | + +--------------------+ - orientation: The orientation of a device (typically an image sensor or a flash LED) describing its mounting position relative to the usage orientation of the -- GitLab From 9397a83f40183eeafd5c787af2240ed0d6b26daa Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:46 +0200 Subject: [PATCH 368/503] media: v4l2-ctrl: Document V4L2_CID_CAMERA_ORIENTATION Add documentation for the V4L2_CID_CAMERA_ORIENTATION camera control. The newly added read-only control reports the camera device orientation relative to the usage orientation of the system the camera is installed on. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l/ext-ctrls-camera.rst | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst index e39f84d2447f8..5d7fca799f2a8 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst @@ -510,6 +510,36 @@ enum v4l2_scene_mode - value down. A value of zero stops the motion if one is in progress and has no effect otherwise. +``V4L2_CID_CAMERA_ORIENTATION (menu)`` + This read-only control describes the camera orientation by reporting its + mounting position on the device where the camera is installed. The control + value is constant and not modifiable by software. This control is + particularly meaningful for devices which have a well defined orientation, + such as phones, laptops and portable devices since the control is expressed + as a position relative to the device's intended usage orientation. For + example, a camera installed on the user-facing side of a phone, a tablet or + a laptop device is said to be have ``V4L2_CAMERA_ORIENTATION_FRONT`` + orientation, while a camera installed on the opposite side of the front one + is said to be have ``V4L2_CAMERA_ORIENTATION_BACK`` orientation. Camera + sensors not directly attached to the device, or attached in a way that + allows them to move freely, such as webcams and digital cameras, are said to + have the ``V4L2_CAMERA_ORIENTATION_EXTERNAL`` orientation. + + + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + + * - ``V4L2_CAMERA_ORIENTATION_FRONT`` + - The camera is oriented towards the user facing side of the device. + * - ``V4L2_CAMERA_ORIENTATION_BACK`` + - The camera is oriented towards the back facing side of the device. + * - ``V4L2_CAMERA_ORIENTATION_EXTERNAL`` + - The camera is not directly attached to the device and is freely movable. + + + .. [#f1] This control may be changed to a menu control in the future, if more options are required. -- GitLab From 9926c2248740a632b0629fd8c07d0fc361dc15cc Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:47 +0200 Subject: [PATCH 369/503] media: v4l2-ctrl: Document V4L2_CID_CAMERA_SENSOR_ROTATION Add documentation for the V4L2_CID_CAMERA_SENSOR_ROTATION camera control. The newly added read-only control reports the rotation correction to be applied to images before displaying them to the user. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../media/v4l/ext-ctrls-camera.rst | 121 ++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst index 5d7fca799f2a8..d9a117f75c9c8 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-camera.rst @@ -540,6 +540,127 @@ enum v4l2_scene_mode - +``V4L2_CID_CAMERA_SENSOR_ROTATION (integer)`` + This read-only control describes the rotation correction in degrees in the + counter-clockwise direction to be applied to the captured images once + captured to memory to compensate for the camera sensor mounting rotation. + + For a precise definition of the sensor mounting rotation refer to the + extensive description of the 'rotation' properties in the device tree + bindings file 'video-interfaces.txt'. + + A few examples are below reported, using a shark swimming from left to + right in front of the user as the example scene to capture. :: + + 0 X-axis + 0 +-------------------------------------> + ! + ! + ! + ! |\____)\___ + ! ) _____ __`< + ! |/ )/ + ! + ! + ! + V + Y-axis + + Example one - Webcam + + Assuming you can bring your laptop with you while swimming with sharks, + the camera module of the laptop is installed on the user facing part of a + laptop screen casing, and is typically used for video calls. The captured + images are meant to be displayed in landscape mode (width > height) on the + laptop screen. + + The camera is typically mounted upside-down to compensate the lens optical + inversion effect. In this case the value of the + V4L2_CID_CAMERA_SENSOR_ROTATION control is 0, no rotation is required to + display images correctly to the user. + + If the camera sensor is not mounted upside-down it is required to compensate + the lens optical inversion effect and the value of the + V4L2_CID_CAMERA_SENSOR_ROTATION control is 180 degrees, as images will + result rotated when captured to memory. :: + + +--------------------------------------+ + ! ! + ! ! + ! ! + ! __/(_____/| ! + ! >.___ ____ ( ! + ! \( \| ! + ! ! + ! ! + ! ! + +--------------------------------------+ + + A software rotation correction of 180 degrees has to be applied to correctly + display the image on the user screen. :: + + +--------------------------------------+ + ! ! + ! ! + ! ! + ! |\____)\___ ! + ! ) _____ __`< ! + ! |/ )/ ! + ! ! + ! ! + ! ! + +--------------------------------------+ + + Example two - Phone camera + + It is more handy to go and swim with sharks with only your mobile phone + with you and take pictures with the camera that is installed on the back + side of the device, facing away from the user. The captured images are meant + to be displayed in portrait mode (height > width) to match the device screen + orientation and the device usage orientation used when taking the picture. + + The camera sensor is typically mounted with its pixel array longer side + aligned to the device longer side, upside-down mounted to compensate for + the lens optical inversion effect. + + The images once captured to memory will be rotated and the value of the + V4L2_CID_CAMERA_SENSOR_ROTATION will report a 90 degree rotation. :: + + + +-------------------------------------+ + | _ _ | + | \ / | + | | | | + | | | | + | | > | + | < | | + | | | | + | . | + | V | + +-------------------------------------+ + + A correction of 90 degrees in counter-clockwise direction has to be + applied to correctly display the image in portrait mode on the device + screen. :: + + +--------------------+ + | | + | | + | | + | | + | | + | | + | |\____)\___ | + | ) _____ __`< | + | |/ )/ | + | | + | | + | | + | | + | | + +--------------------+ + + .. [#f1] This control may be changed to a menu control in the future, if more options are required. -- GitLab From 926645d43fd43622a2b056471a2cf41cc19cbf4c Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:48 +0200 Subject: [PATCH 370/503] media: v4l2-ctrls: Add camera orientation and rotation Add support for the newly defined V4L2_CID_CAMERA_ORIENTATION and V4L2_CID_CAMERA_SENSOR_ROTATION read-only controls used to report the camera device mounting position and orientation respectively. Reviewed-by: Laurent Pinchart Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-ctrls.c | 13 +++++++++++++ include/uapi/linux/v4l2-controls.h | 7 +++++++ 2 files changed, 20 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 1c617b42a944d..92c3e39efc28f 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -583,6 +583,12 @@ const char * const *v4l2_ctrl_get_menu(u32 id) "Annex B Start Code", NULL, }; + static const char * const camera_orientation[] = { + "Front", + "Back", + "External", + NULL, + }; switch (id) { case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: @@ -708,6 +714,8 @@ const char * const *v4l2_ctrl_get_menu(u32 id) return hevc_decode_mode; case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return hevc_start_code; + case V4L2_CID_CAMERA_ORIENTATION: + return camera_orientation; default: return NULL; } @@ -1020,6 +1028,8 @@ const char *v4l2_ctrl_get_name(u32 id) case V4L2_CID_PAN_SPEED: return "Pan, Speed"; case V4L2_CID_TILT_SPEED: return "Tilt, Speed"; case V4L2_CID_UNIT_CELL_SIZE: return "Unit Cell Size"; + case V4L2_CID_CAMERA_ORIENTATION: return "Camera Orientation"; + case V4L2_CID_CAMERA_SENSOR_ROTATION: return "Camera Sensor Rotation"; /* FM Radio Modulator controls */ /* Keep the order of the 'case's the same as in v4l2-controls.h! */ @@ -1293,6 +1303,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE: case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: + case V4L2_CID_CAMERA_ORIENTATION: *type = V4L2_CTRL_TYPE_MENU; break; case V4L2_CID_LINK_FREQ: @@ -1482,6 +1493,8 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, case V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT: case V4L2_CID_RDS_RX_TRAFFIC_PROGRAM: case V4L2_CID_RDS_RX_MUSIC_SPEECH: + case V4L2_CID_CAMERA_ORIENTATION: + case V4L2_CID_CAMERA_SENSOR_ROTATION: *flags |= V4L2_CTRL_FLAG_READ_ONLY; break; case V4L2_CID_RF_TUNER_PLL_LOCK: diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 0ba1005c96519..62271418c1bea 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -923,6 +923,13 @@ enum v4l2_auto_focus_range { #define V4L2_CID_PAN_SPEED (V4L2_CID_CAMERA_CLASS_BASE+32) #define V4L2_CID_TILT_SPEED (V4L2_CID_CAMERA_CLASS_BASE+33) +#define V4L2_CID_CAMERA_ORIENTATION (V4L2_CID_CAMERA_CLASS_BASE+34) +#define V4L2_CAMERA_ORIENTATION_FRONT 0 +#define V4L2_CAMERA_ORIENTATION_BACK 1 +#define V4L2_CAMERA_ORIENTATION_EXTERNAL 2 + +#define V4L2_CID_CAMERA_SENSOR_ROTATION (V4L2_CID_CAMERA_CLASS_BASE+35) + /* FM Modulator class control IDs */ #define V4L2_CID_FM_TX_CLASS_BASE (V4L2_CTRL_CLASS_FM_TX | 0x900) -- GitLab From 344897ef1d9b33e246b64e255d807ca6c053f349 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:49 +0200 Subject: [PATCH 371/503] media: v4l2-fwnode: Add helper to parse device properties Add an helper function to parse common device properties in the same way as v4l2_fwnode_endpoint_parse() parses common endpoint properties. Parse the 'rotation' and 'orientation' properties from the firmware interface. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-fwnode.c | 42 ++++++++++++++++++++++++ include/media/v4l2-fwnode.h | 47 +++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c index e1f273ae85223..6cd52e1ef5e47 100644 --- a/drivers/media/v4l2-core/v4l2-fwnode.c +++ b/drivers/media/v4l2-core/v4l2-fwnode.c @@ -756,6 +756,48 @@ int v4l2_fwnode_connector_add_link(struct fwnode_handle *fwnode, } EXPORT_SYMBOL_GPL(v4l2_fwnode_connector_add_link); +int v4l2_fwnode_device_parse(struct device *dev, + struct v4l2_fwnode_device_properties *props) +{ + struct fwnode_handle *fwnode = dev_fwnode(dev); + u32 val; + int ret; + + memset(props, 0, sizeof(*props)); + + props->orientation = V4L2_FWNODE_PROPERTY_UNSET; + ret = fwnode_property_read_u32(fwnode, "orientation", &val); + if (!ret) { + switch (val) { + case V4L2_FWNODE_ORIENTATION_FRONT: + case V4L2_FWNODE_ORIENTATION_BACK: + case V4L2_FWNODE_ORIENTATION_EXTERNAL: + break; + default: + dev_warn(dev, "Unsupported device orientation: %u\n", val); + return -EINVAL; + } + + props->orientation = val; + dev_dbg(dev, "device orientation: %u\n", val); + } + + props->rotation = V4L2_FWNODE_PROPERTY_UNSET; + ret = fwnode_property_read_u32(fwnode, "rotation", &val); + if (!ret) { + if (val >= 360) { + dev_warn(dev, "Unsupported device rotation: %u\n", val); + return -EINVAL; + } + + props->rotation = val; + dev_dbg(dev, "device rotation: %u\n", val); + } + + return 0; +} +EXPORT_SYMBOL_GPL(v4l2_fwnode_device_parse); + static int v4l2_async_notifier_fwnode_parse_endpoint(struct device *dev, struct v4l2_async_notifier *notifier, diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h index fad7a6480bf94..c47b70636e429 100644 --- a/include/media/v4l2-fwnode.h +++ b/include/media/v4l2-fwnode.h @@ -108,6 +108,36 @@ struct v4l2_fwnode_endpoint { unsigned int nr_of_link_frequencies; }; +/** + * V4L2_FWNODE_PROPERTY_UNSET - identify a non initialized property + * + * All properties in &struct v4l2_fwnode_device_properties are initialized + * to this value. + */ +#define V4L2_FWNODE_PROPERTY_UNSET (-1U) + +/** + * enum v4l2_fwnode_orientation - possible device orientation + * @V4L2_FWNODE_ORIENTATION_FRONT: device installed on the front side + * @V4L2_FWNODE_ORIENTATION_BACK: device installed on the back side + * @V4L2_FWNODE_ORIENTATION_EXTERNAL: device externally located + */ +enum v4l2_fwnode_orientation { + V4L2_FWNODE_ORIENTATION_FRONT, + V4L2_FWNODE_ORIENTATION_BACK, + V4L2_FWNODE_ORIENTATION_EXTERNAL +}; + +/** + * struct v4l2_fwnode_device_properties - fwnode device properties + * @orientation: device orientation. See &enum v4l2_fwnode_orientation + * @rotation: device rotation + */ +struct v4l2_fwnode_device_properties { + enum v4l2_fwnode_orientation orientation; + unsigned int rotation; +}; + /** * struct v4l2_fwnode_link - a link between two endpoints * @local_node: pointer to device_node of this endpoint @@ -353,6 +383,23 @@ int v4l2_fwnode_connector_parse(struct fwnode_handle *fwnode, int v4l2_fwnode_connector_add_link(struct fwnode_handle *fwnode, struct v4l2_fwnode_connector *connector); +/** + * v4l2_fwnode_device_parse() - parse fwnode device properties + * @dev: pointer to &struct device + * @props: pointer to &struct v4l2_fwnode_device_properties where to store the + * parsed properties values + * + * This function parses and validates the V4L2 fwnode device properties from the + * firmware interface, and fills the @struct v4l2_fwnode_device_properties + * provided by the caller. + * + * Return: + * % 0 on success + * %-EINVAL if a parsed property value is not valid + */ +int v4l2_fwnode_device_parse(struct device *dev, + struct v4l2_fwnode_device_properties *props); + /** * typedef parse_endpoint_func - Driver's callback function to be called on * each V4L2 fwnode endpoint. -- GitLab From ae6ff16cf745a56b7ef88a7177e5e8257849feb7 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:50 +0200 Subject: [PATCH 372/503] media: include: v4l2-ctrl: Sort forward declarations Before adding a new forward declaration to the v4l2-ctrls.h header file, sort the existing ones alphabetically. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-ctrls.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index 757a713bad412..224c10823bbff 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h @@ -25,14 +25,14 @@ /* forward references */ struct file; +struct poll_table_struct; +struct v4l2_ctrl; struct v4l2_ctrl_handler; struct v4l2_ctrl_helper; -struct v4l2_ctrl; -struct video_device; +struct v4l2_fh; struct v4l2_subdev; struct v4l2_subscribed_event; -struct v4l2_fh; -struct poll_table_struct; +struct video_device; /** * union v4l2_ctrl_ptr - A pointer to a control value. -- GitLab From e0837a6c08e127d8a7b765decc16abbed26589e1 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:51 +0200 Subject: [PATCH 373/503] media: v4l2-ctrls: Sort includes alphabetically Before adding a new include directive, sort the existing ones in alphabetical order. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-ctrls.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 92c3e39efc28f..4273d56dac653 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -9,14 +9,14 @@ #define pr_fmt(fmt) "v4l2-ctrls: " fmt #include +#include #include #include -#include -#include -#include #include -#include #include +#include +#include +#include #define dprintk(vdev, fmt, arg...) do { \ if (!WARN_ON(!(vdev)) && ((vdev)->dev_debug & V4L2_DEV_DEBUG_CTRL)) \ -- GitLab From e0a360630debdf12355d9ec9f1417172c3fa6756 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:52 +0200 Subject: [PATCH 374/503] media: v4l2-ctrls: Add helper to register properties Add an helper function to v4l2-ctrls to register controls associated with a device property. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/v4l2-core/v4l2-ctrls.c | 40 ++++++++++++++++++++++++++++ include/media/v4l2-ctrls.h | 26 ++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 4273d56dac653..b188577db40f0 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #define dprintk(vdev, fmt, arg...) do { \ @@ -4621,3 +4622,42 @@ __poll_t v4l2_ctrl_poll(struct file *file, struct poll_table_struct *wait) return 0; } EXPORT_SYMBOL(v4l2_ctrl_poll); + +int v4l2_ctrl_new_fwnode_properties(struct v4l2_ctrl_handler *hdl, + const struct v4l2_ctrl_ops *ctrl_ops, + const struct v4l2_fwnode_device_properties *p) +{ + if (p->orientation != V4L2_FWNODE_PROPERTY_UNSET) { + u32 orientation_ctrl; + + switch (p->orientation) { + case V4L2_FWNODE_ORIENTATION_FRONT: + orientation_ctrl = V4L2_CAMERA_ORIENTATION_FRONT; + break; + case V4L2_FWNODE_ORIENTATION_BACK: + orientation_ctrl = V4L2_CAMERA_ORIENTATION_BACK; + break; + case V4L2_FWNODE_ORIENTATION_EXTERNAL: + orientation_ctrl = V4L2_CAMERA_ORIENTATION_EXTERNAL; + break; + default: + return -EINVAL; + } + if (!v4l2_ctrl_new_std_menu(hdl, ctrl_ops, + V4L2_CID_CAMERA_ORIENTATION, + V4L2_CAMERA_ORIENTATION_EXTERNAL, 0, + orientation_ctrl)) + return hdl->error; + } + + if (p->rotation != V4L2_FWNODE_PROPERTY_UNSET) { + if (!v4l2_ctrl_new_std(hdl, ctrl_ops, + V4L2_CID_CAMERA_SENSOR_ROTATION, + p->rotation, p->rotation, 1, + p->rotation)) + return hdl->error; + } + + return hdl->error; +} +EXPORT_SYMBOL(v4l2_ctrl_new_fwnode_properties); diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index 224c10823bbff..f40e2cbb21d34 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h @@ -30,6 +30,7 @@ struct v4l2_ctrl; struct v4l2_ctrl_handler; struct v4l2_ctrl_helper; struct v4l2_fh; +struct v4l2_fwnode_device_properties; struct v4l2_subdev; struct v4l2_subscribed_event; struct video_device; @@ -1428,4 +1429,29 @@ int v4l2_ctrl_subdev_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh, */ int v4l2_ctrl_subdev_log_status(struct v4l2_subdev *sd); +/** + * v4l2_ctrl_new_fwnode_properties() - Register controls for the device + * properties + * + * @hdl: pointer to &struct v4l2_ctrl_handler to register controls on + * @ctrl_ops: pointer to &struct v4l2_ctrl_ops to register controls with + * @p: pointer to &struct v4l2_fwnode_device_properties + * + * This function registers controls associated to device properties, using the + * property values contained in @p parameter, if the property has been set to + * a value. + * + * Currently the following v4l2 controls are parsed and registered: + * - V4L2_CID_CAMERA_ORIENTATION + * - V4L2_CID_CAMERA_SENSOR_ROTATION; + * + * Controls already registered by the caller with the @hdl control handler are + * not overwritten. Callers should register the controls they want to handle + * themselves before calling this function. + * + * Return: 0 on success, a negative error code on failure. + */ +int v4l2_ctrl_new_fwnode_properties(struct v4l2_ctrl_handler *hdl, + const struct v4l2_ctrl_ops *ctrl_ops, + const struct v4l2_fwnode_device_properties *p); #endif -- GitLab From eba08021e15076afc21b506e71e2f4e523f27f8c Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:53 +0200 Subject: [PATCH 375/503] media: i2c: ov5670: Parse and register properties Parse device properties and register controls for them using the newly introduced helpers. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/ov5670.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/ov5670.c b/drivers/media/i2c/ov5670.c index 041fcbb4eebdf..f26252e35e08d 100644 --- a/drivers/media/i2c/ov5670.c +++ b/drivers/media/i2c/ov5670.c @@ -7,6 +7,7 @@ #include #include #include +#include #define OV5670_REG_CHIP_ID 0x300a #define OV5670_CHIP_ID 0x005670 @@ -2059,6 +2060,8 @@ static const struct v4l2_ctrl_ops ov5670_ctrl_ops = { /* Initialize control handlers */ static int ov5670_init_controls(struct ov5670 *ov5670) { + struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd); + struct v4l2_fwnode_device_properties props; struct v4l2_ctrl_handler *ctrl_hdlr; s64 vblank_max; s64 vblank_def; @@ -2067,7 +2070,7 @@ static int ov5670_init_controls(struct ov5670 *ov5670) int ret; ctrl_hdlr = &ov5670->ctrl_handler; - ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10); if (ret) return ret; @@ -2129,6 +2132,15 @@ static int ov5670_init_controls(struct ov5670 *ov5670) goto error; } + ret = v4l2_fwnode_device_parse(&client->dev, &props); + if (ret) + goto error; + + ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov5670_ctrl_ops, + &props); + if (ret) + goto error; + ov5670->sd.ctrl_handler = ctrl_hdlr; return 0; -- GitLab From 74c3ddd9887f60824891d2574a1689e8c13bf191 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:54 +0200 Subject: [PATCH 376/503] media: i2c: ov13858: Parse and register properties Parse device properties and register controls for them using the newly introduced helpers. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/ov13858.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/ov13858.c b/drivers/media/i2c/ov13858.c index aac6f77afa0f4..236ad2c816b70 100644 --- a/drivers/media/i2c/ov13858.c +++ b/drivers/media/i2c/ov13858.c @@ -7,6 +7,7 @@ #include #include #include +#include #define OV13858_REG_VALUE_08BIT 1 #define OV13858_REG_VALUE_16BIT 2 @@ -1589,6 +1590,7 @@ static const struct v4l2_subdev_internal_ops ov13858_internal_ops = { static int ov13858_init_controls(struct ov13858 *ov13858) { struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd); + struct v4l2_fwnode_device_properties props; struct v4l2_ctrl_handler *ctrl_hdlr; s64 exposure_max; s64 vblank_def; @@ -1600,7 +1602,7 @@ static int ov13858_init_controls(struct ov13858 *ov13858) int ret; ctrl_hdlr = &ov13858->ctrl_handler; - ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10); if (ret) return ret; @@ -1666,6 +1668,15 @@ static int ov13858_init_controls(struct ov13858 *ov13858) goto error; } + ret = v4l2_fwnode_device_parse(&client->dev, &props); + if (ret) + goto error; + + ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov13858_ctrl_ops, + &props); + if (ret) + goto error; + ov13858->sd.ctrl_handler = ctrl_hdlr; return 0; -- GitLab From ad3a44cbd1b2e1559c6b93e80dc0c9c29632969a Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Sat, 9 May 2020 11:04:55 +0200 Subject: [PATCH 377/503] media: i2c: imx219: Parse and register properties Parse device properties and register controls for them using the newly introduced helpers. Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/imx219.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index e63288ddd7215..adf35f9ff6a13 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -1265,11 +1265,12 @@ static int imx219_init_controls(struct imx219 *imx219) struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); struct v4l2_ctrl_handler *ctrl_hdlr; unsigned int height = imx219->mode->height; + struct v4l2_fwnode_device_properties props; int exposure_max, exposure_def, hblank; int i, ret; ctrl_hdlr = &imx219->ctrl_handler; - ret = v4l2_ctrl_handler_init(ctrl_hdlr, 9); + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 11); if (ret) return ret; @@ -1348,6 +1349,15 @@ static int imx219_init_controls(struct imx219 *imx219) goto error; } + ret = v4l2_fwnode_device_parse(&client->dev, &props); + if (ret) + goto error; + + ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops, + &props); + if (ret) + goto error; + imx219->sd.ctrl_handler = ctrl_hdlr; return 0; -- GitLab From ad85094b293e40e7a2f831b0311a389d952ebd5e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 12:18:13 +0200 Subject: [PATCH 378/503] Revert "media: staging: atomisp: Remove driver" There are some interest on having this driver back, and I can probably dedicate some time to address its issue. So, let's ressurect it. For now, the driver causes a recursive error and doesn't build, so, make it depend on BROKEN. This reverts commit 51b8dc5163d2ff2bf04019f8bf7e3bd0e75bb654. Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 7 + drivers/staging/media/Kconfig | 2 + drivers/staging/media/Makefile | 1 + drivers/staging/media/atomisp/Kconfig | 14 + drivers/staging/media/atomisp/Makefile | 6 + drivers/staging/media/atomisp/TODO | 74 + drivers/staging/media/atomisp/i2c/Kconfig | 86 + drivers/staging/media/atomisp/i2c/Makefile | 18 + .../media/atomisp/i2c/atomisp-gc0310.c | 1392 ++ .../media/atomisp/i2c/atomisp-gc2235.c | 1124 ++ .../atomisp/i2c/atomisp-libmsrlisthelper.c | 205 + .../media/atomisp/i2c/atomisp-lm3554.c | 968 ++ .../media/atomisp/i2c/atomisp-mt9m114.c | 1908 +++ .../media/atomisp/i2c/atomisp-ov2680.c | 1470 ++ .../media/atomisp/i2c/atomisp-ov2722.c | 1271 ++ drivers/staging/media/atomisp/i2c/gc0310.h | 404 + drivers/staging/media/atomisp/i2c/gc2235.h | 677 + drivers/staging/media/atomisp/i2c/mt9m114.h | 1788 +++ drivers/staging/media/atomisp/i2c/ov2680.h | 858 ++ drivers/staging/media/atomisp/i2c/ov2722.h | 1268 ++ .../staging/media/atomisp/i2c/ov5693/Kconfig | 11 + .../staging/media/atomisp/i2c/ov5693/Makefile | 2 + .../staging/media/atomisp/i2c/ov5693/ad5823.h | 63 + .../media/atomisp/i2c/ov5693/atomisp-ov5693.c | 1993 +++ .../staging/media/atomisp/i2c/ov5693/ov5693.h | 1392 ++ .../media/atomisp/include/linux/atomisp.h | 1359 ++ .../include/linux/atomisp_gmin_platform.h | 36 + .../atomisp/include/linux/atomisp_platform.h | 249 + .../atomisp/include/linux/libmsrlisthelper.h | 28 + .../media/atomisp/include/media/lm3554.h | 131 + drivers/staging/media/atomisp/pci/Kconfig | 14 + drivers/staging/media/atomisp/pci/Makefile | 5 + .../media/atomisp/pci/atomisp2/Makefile | 349 + .../media/atomisp/pci/atomisp2/atomisp-regs.h | 205 + .../media/atomisp/pci/atomisp2/atomisp_acc.c | 604 + .../media/atomisp/pci/atomisp2/atomisp_acc.h | 120 + .../media/atomisp/pci/atomisp2/atomisp_cmd.c | 6697 ++++++++++ .../media/atomisp/pci/atomisp2/atomisp_cmd.h | 446 + .../atomisp/pci/atomisp2/atomisp_common.h | 75 + .../atomisp/pci/atomisp2/atomisp_compat.h | 662 + .../pci/atomisp2/atomisp_compat_css20.c | 4704 +++++++ .../pci/atomisp2/atomisp_compat_css20.h | 277 + .../pci/atomisp2/atomisp_compat_ioctl32.c | 1225 ++ .../pci/atomisp2/atomisp_compat_ioctl32.h | 365 + .../media/atomisp/pci/atomisp2/atomisp_csi2.c | 442 + .../media/atomisp/pci/atomisp2/atomisp_csi2.h | 57 + .../atomisp/pci/atomisp2/atomisp_dfs_tables.h | 408 + .../atomisp/pci/atomisp2/atomisp_drvfs.c | 205 + .../atomisp/pci/atomisp2/atomisp_drvfs.h | 24 + .../media/atomisp/pci/atomisp2/atomisp_file.c | 225 + .../media/atomisp/pci/atomisp2/atomisp_file.h | 43 + .../media/atomisp/pci/atomisp2/atomisp_fops.c | 1302 ++ .../media/atomisp/pci/atomisp2/atomisp_fops.h | 50 + .../atomisp/pci/atomisp2/atomisp_helper.h | 29 + .../atomisp/pci/atomisp2/atomisp_internal.h | 310 + .../atomisp/pci/atomisp2/atomisp_ioctl.c | 3123 +++++ .../atomisp/pci/atomisp2/atomisp_ioctl.h | 69 + .../atomisp/pci/atomisp2/atomisp_subdev.c | 1422 ++ .../atomisp/pci/atomisp2/atomisp_subdev.h | 467 + .../atomisp/pci/atomisp2/atomisp_tables.h | 187 + .../media/atomisp/pci/atomisp2/atomisp_tpg.c | 164 + .../media/atomisp/pci/atomisp2/atomisp_tpg.h | 38 + .../pci/atomisp2/atomisp_trace_event.h | 129 + .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 1562 +++ .../media/atomisp/pci/atomisp2/atomisp_v4l2.h | 40 + .../atomisp/pci/atomisp2/css2400/Makefile | 2 + .../base/circbuf/interface/ia_css_circbuf.h | 376 + .../circbuf/interface/ia_css_circbuf_comm.h | 56 + .../circbuf/interface/ia_css_circbuf_desc.h | 169 + .../css2400/base/circbuf/src/circbuf.c | 321 + .../base/refcount/interface/ia_css_refcount.h | 83 + .../css2400/base/refcount/src/refcount.c | 281 + .../pipe/interface/ia_css_pipe_binarydesc.h | 297 + .../pipe/interface/ia_css_pipe_stagedesc.h | 52 + .../camera/pipe/interface/ia_css_pipe_util.h | 39 + .../css2400/camera/pipe/src/pipe_binarydesc.c | 880 ++ .../css2400/camera/pipe/src/pipe_stagedesc.c | 115 + .../css2400/camera/pipe/src/pipe_util.c | 51 + .../camera/util/interface/ia_css_util.h | 141 + .../atomisp2/css2400/camera/util/src/util.c | 227 + .../ia_css_isp_configs.c | 360 + .../ia_css_isp_configs.h | 189 + .../ia_css_isp_params.c | 3221 +++++ .../ia_css_isp_params.h | 399 + .../ia_css_isp_states.c | 214 + .../ia_css_isp_states.h | 72 + .../css2400/css_2400_system/hrt/bits.h | 104 + .../css2400/css_2400_system/hrt/cell_params.h | 42 + .../hrt/css_receiver_2400_common_defs.h | 200 + .../hrt/css_receiver_2400_defs.h | 258 + .../css2400/css_2400_system/hrt/defs.h | 36 + .../css2400/css_2400_system/hrt/dma_v2_defs.h | 199 + .../css2400/css_2400_system/hrt/gdc_v2_defs.h | 170 + .../css_2400_system/hrt/gp_timer_defs.h | 36 + .../css_2400_system/hrt/gpio_block_defs.h | 42 + .../css_2400_system/hrt/hive_isp_css_defs.h | 416 + .../hrt/hive_isp_css_host_ids_hrt.h | 84 + .../hrt/hive_isp_css_irq_types_hrt.h | 72 + ...hive_isp_css_streaming_to_mipi_types_hrt.h | 26 + .../css2400/css_2400_system/hrt/hive_types.h | 128 + .../css2400/css_2400_system/hrt/if_defs.h | 22 + .../hrt/input_formatter_subsystem_defs.h | 53 + .../css_2400_system/hrt/input_selector_defs.h | 89 + .../hrt/input_switch_2400_defs.h | 30 + .../hrt/input_system_ctrl_defs.h | 254 + .../css_2400_system/hrt/input_system_defs.h | 126 + .../css_2400_system/hrt/irq_controller_defs.h | 28 + .../hrt/isp2400_mamoiada_params.h | 254 + .../css_2400_system/hrt/isp2400_support.h | 38 + .../hrt/isp_acquisition_defs.h | 234 + .../css_2400_system/hrt/isp_capture_defs.h | 310 + .../css2400/css_2400_system/hrt/mmu_defs.h | 23 + .../hrt/scalar_processor_2400_params.h | 20 + .../css_2400_system/hrt/str2mem_defs.h | 39 + .../hrt/streaming_to_mipi_defs.h | 28 + .../hrt/timed_controller_defs.h | 22 + .../css2400/css_2400_system/hrt/var.h | 74 + .../css2400/css_2400_system/hrt/version.h | 20 + .../css2400/css_2400_system/spmem_dump.c | 3634 +++++ .../css_2401_csi2p_system/csi_rx_global.h | 63 + .../ia_css_isp_configs.c | 360 + .../ia_css_isp_configs.h | 189 + .../ia_css_isp_params.c | 3220 +++++ .../ia_css_isp_params.h | 399 + .../ia_css_isp_states.c | 214 + .../ia_css_isp_states.h | 72 + .../css_2401_csi2p_system/host/csi_rx.c | 41 + .../css_2401_csi2p_system/host/csi_rx_local.h | 61 + .../host/csi_rx_private.h | 282 + .../css_2401_csi2p_system/host/ibuf_ctrl.c | 22 + .../host/ibuf_ctrl_local.h | 58 + .../host/ibuf_ctrl_private.h | 233 + .../host/input_system_local.h | 106 + .../host/input_system_private.h | 128 + .../css_2401_csi2p_system/host/isys_dma.c | 40 + .../host/isys_dma_local.h | 20 + .../host/isys_dma_private.h | 60 + .../css_2401_csi2p_system/host/isys_irq.c | 39 + .../host/isys_irq_local.h | 35 + .../host/isys_irq_private.h | 108 + .../host/isys_stream2mmio.c | 21 + .../host/isys_stream2mmio_local.h | 36 + .../host/isys_stream2mmio_private.h | 168 + .../host/pixelgen_local.h | 50 + .../host/pixelgen_private.h | 164 + .../css_2401_csi2p_system/host/system_local.h | 366 + .../hrt/PixelGen_SysBlock_defs.h | 126 + .../css2400/css_2401_csi2p_system/hrt/bits.h | 104 + .../css_2401_csi2p_system/hrt/cell_params.h | 42 + .../hrt/css_receiver_2400_common_defs.h | 200 + .../hrt/css_receiver_2400_defs.h | 258 + .../css2400/css_2401_csi2p_system/hrt/defs.h | 36 + .../css_2401_csi2p_system/hrt/dma_v2_defs.h | 199 + .../css_2401_csi2p_system/hrt/gdc_v2_defs.h | 170 + .../css_2401_csi2p_system/hrt/gp_timer_defs.h | 36 + .../hrt/gpio_block_defs.h | 42 + .../hrt/hive_isp_css_2401_irq_types_hrt.h | 68 + .../hrt/hive_isp_css_defs.h | 435 + .../hrt/hive_isp_css_host_ids_hrt.h | 119 + ...hive_isp_css_streaming_to_mipi_types_hrt.h | 26 + .../css_2401_csi2p_system/hrt/hive_types.h | 128 + .../hrt/ibuf_cntrl_defs.h | 138 + .../css_2401_csi2p_system/hrt/if_defs.h | 22 + .../hrt/input_formatter_subsystem_defs.h | 53 + .../hrt/input_selector_defs.h | 89 + .../hrt/input_switch_2400_defs.h | 30 + .../hrt/input_system_ctrl_defs.h | 254 + .../hrt/input_system_defs.h | 126 + .../hrt/irq_controller_defs.h | 28 + .../hrt/isp2400_support.h | 38 + .../hrt/isp2401_mamoiada_params.h | 258 + .../hrt/isp_acquisition_defs.h | 234 + .../hrt/isp_capture_defs.h | 310 + .../hrt/mipi_backend_common_defs.h | 210 + .../hrt/mipi_backend_defs.h | 215 + .../css_2401_csi2p_system/hrt/mmu_defs.h | 23 + .../css_2401_csi2p_system/hrt/rx_csi_defs.h | 175 + .../hrt/scalar_processor_2400_params.h | 20 + .../css_2401_csi2p_system/hrt/str2mem_defs.h | 39 + .../hrt/stream2mmio_defs.h | 71 + .../hrt/streaming_to_mipi_defs.h | 28 + .../hrt/timed_controller_defs.h | 22 + .../css2400/css_2401_csi2p_system/hrt/var.h | 99 + .../css_2401_csi2p_system/hrt/version.h | 20 + .../css_2401_csi2p_system/ibuf_ctrl_global.h | 80 + .../input_system_global.h | 206 + .../css_2401_csi2p_system/isys_dma_global.h | 87 + .../css_2401_csi2p_system/isys_irq_global.h | 35 + .../isys_stream2mmio_global.h | 39 + .../css_2401_csi2p_system/pixelgen_global.h | 91 + .../css_2401_csi2p_system/spmem_dump.c | 3686 +++++ .../css_2401_csi2p_system/system_global.h | 458 + .../ia_css_isp_configs.c | 360 + .../ia_css_isp_configs.h | 189 + .../ia_css_isp_params.c | 3220 +++++ .../ia_css_isp_params.h | 399 + .../ia_css_isp_states.c | 214 + .../ia_css_isp_states.h | 72 + .../css2400/css_2401_system/hrt/bits.h | 104 + .../css2400/css_2401_system/hrt/cell_params.h | 42 + .../hrt/css_receiver_2400_common_defs.h | 200 + .../hrt/css_receiver_2400_defs.h | 258 + .../css2400/css_2401_system/hrt/defs.h | 36 + .../css2400/css_2401_system/hrt/dma_v2_defs.h | 199 + .../css2400/css_2401_system/hrt/gdc_v2_defs.h | 170 + .../css_2401_system/hrt/gp_timer_defs.h | 36 + .../css_2401_system/hrt/gpio_block_defs.h | 42 + .../hrt/hive_isp_css_2401_irq_types_hrt.h | 69 + .../css_2401_system/hrt/hive_isp_css_defs.h | 435 + .../hrt/hive_isp_css_host_ids_hrt.h | 119 + ...hive_isp_css_streaming_to_mipi_types_hrt.h | 26 + .../css2400/css_2401_system/hrt/hive_types.h | 128 + .../css2400/css_2401_system/hrt/if_defs.h | 22 + .../hrt/input_formatter_subsystem_defs.h | 53 + .../css_2401_system/hrt/input_selector_defs.h | 89 + .../hrt/input_switch_2400_defs.h | 30 + .../hrt/input_system_ctrl_defs.h | 254 + .../css_2401_system/hrt/input_system_defs.h | 126 + .../css_2401_system/hrt/irq_controller_defs.h | 28 + .../css_2401_system/hrt/isp2400_support.h | 38 + .../hrt/isp2401_mamoiada_params.h | 258 + .../hrt/isp_acquisition_defs.h | 234 + .../css_2401_system/hrt/isp_capture_defs.h | 310 + .../css2400/css_2401_system/hrt/mmu_defs.h | 23 + .../hrt/scalar_processor_2400_params.h | 20 + .../css_2401_system/hrt/str2mem_defs.h | 39 + .../hrt/streaming_to_mipi_defs.h | 28 + .../hrt/timed_controller_defs.h | 22 + .../css2400/css_2401_system/hrt/var.h | 99 + .../css2400/css_2401_system/hrt/version.h | 20 + .../css2400/css_2401_system/spmem_dump.c | 3634 +++++ .../atomisp/pci/atomisp2/css2400/css_trace.h | 388 + .../hive_isp_css_common/debug_global.h | 83 + .../css2400/hive_isp_css_common/dma_global.h | 255 + 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mode 100644 drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_common.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/include/mmu/sh_mmu_mrfld.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c create mode 100644 drivers/staging/media/atomisp/platform/Makefile create mode 100644 drivers/staging/media/atomisp/platform/intel-mid/Makefile create mode 100644 drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c diff --git a/MAINTAINERS b/MAINTAINERS index d5502e189ed21..e24af3b1a3374 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15949,6 +15949,13 @@ L: stable@vger.kernel.org S: Supported F: Documentation/process/stable-kernel-rules.rst +STAGING - ATOMISP DRIVER +M: Alan Cox +M: Sakari Ailus +L: linux-media@vger.kernel.org +S: Maintained +F: drivers/staging/media/atomisp/ + STAGING - COMEDI M: Ian Abbott M: H Hartley Sweeten diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig index c6b4fb5d48b44..053f485eb994b 100644 --- a/drivers/staging/media/Kconfig +++ b/drivers/staging/media/Kconfig @@ -22,6 +22,8 @@ if STAGING_MEDIA && MEDIA_SUPPORT # Please keep them in alphabetic order source "drivers/staging/media/allegro-dvt/Kconfig" +source "drivers/staging/media/atomisp/Kconfig" + source "drivers/staging/media/hantro/Kconfig" source "drivers/staging/media/imx/Kconfig" diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile index 8b24be1a70765..e01f13a1b4a20 100644 --- a/drivers/staging/media/Makefile +++ b/drivers/staging/media/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_VIDEO_ALLEGRO_DVT) += allegro-dvt/ +obj-$(CONFIG_INTEL_ATOMISP) += atomisp/ obj-$(CONFIG_VIDEO_IMX_MEDIA) += imx/ obj-$(CONFIG_VIDEO_MESON_VDEC) += meson/vdec/ obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/ diff --git a/drivers/staging/media/atomisp/Kconfig b/drivers/staging/media/atomisp/Kconfig new file mode 100644 index 0000000000000..fbaba41ba7db8 --- /dev/null +++ b/drivers/staging/media/atomisp/Kconfig @@ -0,0 +1,14 @@ +menuconfig INTEL_ATOMISP + bool "Enable support to Intel MIPI camera drivers" + depends on X86 && EFI && PCI && ACPI + depends on BROKEN + select MEDIA_CONTROLLER + select COMMON_CLK + help + Enable support for the Intel ISP2 camera interfaces and MIPI + sensor drivers. + +if INTEL_ATOMISP +source "drivers/staging/media/atomisp/pci/Kconfig" +source "drivers/staging/media/atomisp/i2c/Kconfig" +endif diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile new file mode 100644 index 0000000000000..403fe5edff6d4 --- /dev/null +++ b/drivers/staging/media/atomisp/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for camera drivers. +# +obj-$(CONFIG_INTEL_ATOMISP) += pci/ +obj-$(CONFIG_INTEL_ATOMISP) += i2c/ +obj-$(CONFIG_INTEL_ATOMISP) += platform/ diff --git a/drivers/staging/media/atomisp/TODO b/drivers/staging/media/atomisp/TODO new file mode 100644 index 0000000000000..255ce3630c2a4 --- /dev/null +++ b/drivers/staging/media/atomisp/TODO @@ -0,0 +1,74 @@ +1. A single AtomISP driver needs to be implemented to support both BYT and + CHT platforms. The current driver is a mechanical and hand combined merge + of the two using an ifdef ISP2401 to select the CHT version, which at the + moment is not enabled. Eventually this should become a runtime if check, + but there are some quite tricky things that need sorting out before that + will be possible. + +2. The file structure needs to get tidied up to resemble a normal Linux + driver. + +3. Lots of the midlayer glue. unused code and abstraction needs removing. + +3. The sensor drivers read MIPI settings from EFI variables or default to the + settings hard-coded in the platform data file for different platforms. + This isn't ideal but may be hard to improve as this is how existing + platforms work. + +4. The sensor drivers use the regulator framework API. In the ideal world it + would be using ACPI but that's not how the existing devices work. + +5. The AtomISP driver includes some special IOCTLS (ATOMISP_IOC_XXXX_XXXX) + that may need some cleaning up. + +6. Correct Coding Style. Please don't send coding style patches for this + driver until the other work is done. + +7. The ISP code depends on the exact FW version. The version defined in + BYT: + drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c + static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); + CHT: + drivers/staging/media/atomisp/pci/atomisp2/css/sh_css_firmware.c + static const char *release_version = STR(irci_ecr-master_20150911_0724); + + At some point we may need to round up a few driver versions and see if + there are any specific things that can be done to fold in support for + multiple firmware versions. + +8. Switch to V4L2 async API to set up sensor, lens and flash devices. + Control those devices using V4L2 sub-device API without custom + extensions. + +9. Switch to standard V4L2 sub-device API for sensor and lens. In + particular, the user space API needs to support V4L2 controls as + defined in the V4L2 spec and references to atomisp must be removed from + these drivers. + +10. Use LED flash API for flash LED drivers such as LM3554 (which already + has a LED class driver). + +11. Switch from videobuf1 to videobuf2. Videobuf1 is being removed! + +Limitations: + +1. To test the patches, you also need the ISP firmware + + for BYT:/lib/firmware/shisp_2400b0_v21.bin + for CHT:/lib/firmware/shisp_2401a0_v21.bin + + The firmware files will usually be found in /etc/firmware on an Android + device but can also be extracted from the upgrade kit if you've managed + to lose them somehow. + +2. Without a 3A libary the capture behaviour is not very good. To take a good + picture, you need tune ISP parameters by IOCTL functions or use a 3A libary + such as libxcam. + +3. The driver is intended to drive the PCI exposed versions of the device. + It will not detect those devices enumerated via ACPI as a field of the + i915 GPU driver. + +4. The driver supports only v2 of the IPU/Camera. It will not work with the + versions of the hardware in other SoCs. + diff --git a/drivers/staging/media/atomisp/i2c/Kconfig b/drivers/staging/media/atomisp/i2c/Kconfig new file mode 100644 index 0000000000000..f7f7177b9b379 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/Kconfig @@ -0,0 +1,86 @@ +# +# Kconfig for sensor drivers +# + +source "drivers/staging/media/atomisp/i2c/ov5693/Kconfig" + +config VIDEO_ATOMISP_OV2722 + tristate "OVT ov2722 sensor support" + depends on ACPI + depends on I2C && VIDEO_V4L2 + ---help--- + This is a Video4Linux2 sensor-level driver for the OVT + OV2722 raw camera. + + OVT is a 2M raw sensor. + + It currently only works with the atomisp driver. + +config VIDEO_ATOMISP_GC2235 + tristate "Galaxy gc2235 sensor support" + depends on ACPI + depends on I2C && VIDEO_V4L2 + ---help--- + This is a Video4Linux2 sensor-level driver for the OVT + GC2235 raw camera. + + GC2235 is a 2M raw sensor. + + It currently only works with the atomisp driver. + +config VIDEO_ATOMISP_MSRLIST_HELPER + tristate "Helper library to load, parse and apply large register lists." + depends on I2C + ---help--- + This is a helper library to be used from a sensor driver to load, parse + and apply large register lists. + + To compile this driver as a module, choose M here: the + module will be called libmsrlisthelper. + +config VIDEO_ATOMISP_MT9M114 + tristate "Aptina mt9m114 sensor support" + depends on ACPI + depends on I2C && VIDEO_V4L2 + ---help--- + This is a Video4Linux2 sensor-level driver for the Micron + mt9m114 1.3 Mpixel camera. + + mt9m114 is video camera sensor. + + It currently only works with the atomisp driver. + +config VIDEO_ATOMISP_GC0310 + tristate "GC0310 sensor support" + depends on ACPI + depends on I2C && VIDEO_V4L2 + ---help--- + This is a Video4Linux2 sensor-level driver for the Galaxycore + GC0310 0.3MP sensor. + +config VIDEO_ATOMISP_OV2680 + tristate "Omnivision OV2680 sensor support" + depends on ACPI + depends on I2C && VIDEO_V4L2 + ---help--- + This is a Video4Linux2 sensor-level driver for the Omnivision + OV2680 raw camera. + + ov2680 is a 2M raw sensor. + + It currently only works with the atomisp driver. + +# +# Kconfig for flash drivers +# + +config VIDEO_ATOMISP_LM3554 + tristate "LM3554 flash light driver" + depends on ACPI + depends on VIDEO_V4L2 && I2C + ---help--- + This is a Video4Linux2 sub-dev driver for the LM3554 + flash light driver. + + To compile this driver as a module, choose M here: the + module will be called lm3554 diff --git a/drivers/staging/media/atomisp/i2c/Makefile b/drivers/staging/media/atomisp/i2c/Makefile new file mode 100644 index 0000000000000..8d022986e199e --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/Makefile @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for sensor drivers +# + +obj-$(CONFIG_VIDEO_ATOMISP_OV5693) += ov5693/ +obj-$(CONFIG_VIDEO_ATOMISP_MT9M114) += atomisp-mt9m114.o +obj-$(CONFIG_VIDEO_ATOMISP_GC2235) += atomisp-gc2235.o +obj-$(CONFIG_VIDEO_ATOMISP_OV2722) += atomisp-ov2722.o +obj-$(CONFIG_VIDEO_ATOMISP_OV2680) += atomisp-ov2680.o +obj-$(CONFIG_VIDEO_ATOMISP_GC0310) += atomisp-gc0310.o + +obj-$(CONFIG_VIDEO_ATOMISP_MSRLIST_HELPER) += atomisp-libmsrlisthelper.o + +# Makefile for flash drivers +# + +obj-$(CONFIG_VIDEO_ATOMISP_LM3554) += atomisp-lm3554.o diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c new file mode 100644 index 0000000000000..3b38cbccf294a --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -0,0 +1,1392 @@ +/* + * Support for GalaxyCore GC0310 VGA camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../include/linux/atomisp_gmin_platform.h" + +#include "gc0310.h" + +/* i2c read/write stuff */ +static int gc0310_read_reg(struct i2c_client *client, + u16 data_length, u8 reg, u8 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[1]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != GC0310_8BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0, sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = I2C_MSG_LENGTH; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == GC0310_8BIT) + *val = (u8)data[0]; + + return 0; +} + +static int gc0310_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int gc0310_write_reg(struct i2c_client *client, u16 data_length, + u8 reg, u8 val) +{ + int ret; + unsigned char data[2] = {0}; + u8 *wreg = (u8 *)data; + const u16 len = data_length + sizeof(u8); /* 8-bit address + data */ + + if (data_length != GC0310_8BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + *wreg = (u8)(reg & 0xff); + + if (data_length == GC0310_8BIT) + data[1] = (u8)(val); + + ret = gc0310_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +/* + * gc0310_write_reg_array - Initializes a list of GC0310 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __gc0310_flush_reg_array, __gc0310_buf_reg_array() and + * __gc0310_write_reg_is_consecutive() are internal functions to + * gc0310_write_reg_array_fast() and should be not used anywhere else. + * + */ + +static int __gc0310_flush_reg_array(struct i2c_client *client, + struct gc0310_write_ctrl *ctrl) +{ + u16 size; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u8) + ctrl->index; /* 8-bit address + data */ + ctrl->buffer.addr = (u8)(ctrl->buffer.addr); + ctrl->index = 0; + + return gc0310_i2c_write(client, size, (u8 *)&ctrl->buffer); +} + +static int __gc0310_buf_reg_array(struct i2c_client *client, + struct gc0310_write_ctrl *ctrl, + const struct gc0310_reg *next) +{ + int size; + + switch (next->type) { + case GC0310_8BIT: + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u8) >= GC0310_MAX_WRITE_BUF_SIZE) + return __gc0310_flush_reg_array(client, ctrl); + + return 0; +} + +static int __gc0310_write_reg_is_consecutive(struct i2c_client *client, + struct gc0310_write_ctrl *ctrl, + const struct gc0310_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int gc0310_write_reg_array(struct i2c_client *client, + const struct gc0310_reg *reglist) +{ + const struct gc0310_reg *next = reglist; + struct gc0310_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != GC0310_TOK_TERM; next++) { + switch (next->type & GC0310_TOK_MASK) { + case GC0310_TOK_DELAY: + err = __gc0310_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__gc0310_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __gc0310_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __gc0310_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __gc0310_flush_reg_array(client, &ctrl); +} +static int gc0310_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC0310_FOCAL_LENGTH_NUM << 16) | GC0310_FOCAL_LENGTH_DEM; + return 0; +} + +static int gc0310_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for imx*/ + *val = (GC0310_F_NUMBER_DEFAULT_NUM << 16) | GC0310_F_NUMBER_DEM; + return 0; +} + +static int gc0310_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC0310_F_NUMBER_DEFAULT_NUM << 24) | + (GC0310_F_NUMBER_DEM << 16) | + (GC0310_F_NUMBER_DEFAULT_NUM << 8) | GC0310_F_NUMBER_DEM; + return 0; +} + +static int gc0310_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + *val = gc0310_res[dev->fmt_idx].bin_factor_x; + + return 0; +} + +static int gc0310_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + *val = gc0310_res[dev->fmt_idx].bin_factor_y; + + return 0; +} + +static int gc0310_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct gc0310_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct atomisp_sensor_mode_data *buf = &info->data; + u16 val; + u8 reg_val; + int ret; + unsigned int hori_blanking; + unsigned int vert_blanking; + unsigned int sh_delay; + + if (!info) + return -EINVAL; + + /* pixel clock calculattion */ + dev->vt_pix_clk_freq_mhz = 14400000; // 16.8MHz + buf->vt_pix_clk_freq_mhz = dev->vt_pix_clk_freq_mhz; + pr_info("vt_pix_clk_freq_mhz=%d\n", buf->vt_pix_clk_freq_mhz); + + /* get integration time */ + buf->coarse_integration_time_min = GC0310_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + GC0310_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = GC0310_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + GC0310_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = GC0310_FINE_INTG_TIME_MIN; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + /* Getting crop_horizontal_start */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_CROP_START_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_CROP_START_L, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = val | (reg_val & 0xFF); + pr_info("crop_horizontal_start=%d\n", buf->crop_horizontal_start); + + /* Getting crop_vertical_start */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_CROP_START_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_CROP_START_L, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = val | (reg_val & 0xFF); + pr_info("crop_vertical_start=%d\n", buf->crop_vertical_start); + + /* Getting output_width */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_OUTSIZE_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_width = val | (reg_val & 0xFF); + pr_info("output_width=%d\n", buf->output_width); + + /* Getting output_height */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_OUTSIZE_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_height = val | (reg_val & 0xFF); + pr_info("output_height=%d\n", buf->output_height); + + buf->crop_horizontal_end = buf->crop_horizontal_start + buf->output_width - 1; + buf->crop_vertical_end = buf->crop_vertical_start + buf->output_height - 1; + pr_info("crop_horizontal_end=%d\n", buf->crop_horizontal_end); + pr_info("crop_vertical_end=%d\n", buf->crop_vertical_end); + + /* Getting line_length_pck */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_BLANKING_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_H_BLANKING_L, ®_val); + if (ret) + return ret; + hori_blanking = val | (reg_val & 0xFF); + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_SH_DELAY, ®_val); + if (ret) + return ret; + sh_delay = reg_val; + buf->line_length_pck = buf->output_width + hori_blanking + sh_delay + 4; + pr_info("hori_blanking=%d sh_delay=%d line_length_pck=%d\n", hori_blanking, sh_delay, buf->line_length_pck); + + /* Getting frame_length_lines */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_BLANKING_H, ®_val); + if (ret) + return ret; + val = (reg_val & 0xFF) << 8; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_V_BLANKING_L, ®_val); + if (ret) + return ret; + vert_blanking = val | (reg_val & 0xFF); + buf->frame_length_lines = buf->output_height + vert_blanking; + pr_info("vert_blanking=%d frame_length_lines=%d\n", vert_blanking, buf->frame_length_lines); + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static int gc0310_set_gain(struct v4l2_subdev *sd, int gain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u8 again, dgain; + + if (gain < 0x20) + gain = 0x20; + if (gain > 0x80) + gain = 0x80; + + if (gain >= 0x20 && gain < 0x40) { + again = 0x0; /* sqrt(2) */ + dgain = gain; + } else { + again = 0x2; /* 2 * sqrt(2) */ + dgain = gain / 2; + } + + pr_info("gain=0x%x again=0x%x dgain=0x%x\n", gain, again, dgain); + + /* set analog gain */ + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_AGC_ADJ, again); + if (ret) + return ret; + + /* set digital gain */ + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_DGC_ADJ, dgain); + if (ret) + return ret; + + return 0; +} + +static int __gc0310_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + pr_info("coarse_itg=%d gain=%d digitgain=%d\n", coarse_itg, gain, digitgain); + + /* set exposure */ + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_L, + coarse_itg & 0xff); + if (ret) + return ret; + + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_H, + (coarse_itg >> 8) & 0x0f); + if (ret) + return ret; + + ret = gc0310_set_gain(sd, gain); + if (ret) + return ret; + + return ret; +} + +static int gc0310_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __gc0310_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long gc0310_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + int exp = exposure->integration_time[0]; + int gain = exposure->gain[0]; + int digitgain = exposure->gain[1]; + + /* we should not accept the invalid value below. */ + if (gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + return gc0310_set_exposure(sd, exp, gain, digitgain); +} + +/* TO DO */ +static int gc0310_v_flip(struct v4l2_subdev *sd, s32 value) +{ + return 0; +} + +/* TO DO */ +static int gc0310_h_flip(struct v4l2_subdev *sd, s32 value) +{ + return 0; +} + +static long gc0310_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return gc0310_s_exposure(sd, arg); + default: + return -EINVAL; + } + return 0; +} + +/* This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int gc0310_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u8 reg_v; + int ret; + + /* get exposure */ + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_L, + ®_v); + if (ret) + goto err; + + *value = reg_v; + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_AEC_PK_EXPO_H, + ®_v); + if (ret) + goto err; + + *value = *value + (reg_v << 8); +err: + return ret; +} + +static int gc0310_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct gc0310_device *dev = + container_of(ctrl->handler, struct gc0310_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + dev_dbg(&client->dev, "%s: CID_VFLIP:%d.\n", + __func__, ctrl->val); + ret = gc0310_v_flip(&dev->sd, ctrl->val); + break; + case V4L2_CID_HFLIP: + dev_dbg(&client->dev, "%s: CID_HFLIP:%d.\n", + __func__, ctrl->val); + ret = gc0310_h_flip(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int gc0310_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct gc0310_device *dev = + container_of(ctrl->handler, struct gc0310_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = gc0310_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = gc0310_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = gc0310_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = gc0310_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_HORZ: + ret = gc0310_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = gc0310_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = gc0310_s_ctrl, + .g_volatile_ctrl = gc0310_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config gc0310_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flip", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Mirror", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = GC0310_FOCAL_LENGTH_DEFAULT, + .max = GC0310_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = GC0310_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = GC0310_F_NUMBER_DEFAULT, + .max = GC0310_F_NUMBER_DEFAULT, + .step = 0x01, + .def = GC0310_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = GC0310_F_NUMBER_RANGE, + .max = GC0310_F_NUMBER_RANGE, + .step = 0x01, + .def = GC0310_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = GC0310_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = GC0310_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, +}; + +static int gc0310_init(struct v4l2_subdev *sd) +{ + int ret; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct gc0310_device *dev = to_gc0310_sensor(sd); + + pr_info("%s S\n", __func__); + mutex_lock(&dev->input_lock); + + /* set inital registers */ + ret = gc0310_write_reg_array(client, gc0310_reset_register); + + /* restore settings */ + gc0310_res = gc0310_res_preview; + N_RES = N_RES_PREVIEW; + + mutex_unlock(&dev->input_lock); + + pr_info("%s E\n", __func__); + return ret; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = 0; + struct gc0310_device *dev = to_gc0310_sensor(sd); + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + /* The upstream module driver (written to Crystal + * Cove) had this logic to pulse the rails low first. + * This appears to break things on the MRD7 with the + * X-Powers PMIC... + * + * ret = dev->platform_data->v1p8_ctrl(sd, 0); + * ret |= dev->platform_data->v2p8_ctrl(sd, 0); + * mdelay(50); + */ + ret |= dev->platform_data->v1p8_ctrl(sd, 1); + ret |= dev->platform_data->v2p8_ctrl(sd, 1); + usleep_range(10000, 15000); + } + + if (!flag || ret) { + ret |= dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct gc0310_device *dev = to_gc0310_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* GPIO0 == "reset" (active low), GPIO1 == "power down" */ + if (flag) { + /* Pulse reset, then release power down */ + ret = dev->platform_data->gpio0_ctrl(sd, 0); + usleep_range(5000, 10000); + ret |= dev->platform_data->gpio0_ctrl(sd, 1); + usleep_range(10000, 15000); + ret |= dev->platform_data->gpio1_ctrl(sd, 0); + usleep_range(10000, 15000); + } else { + ret = dev->platform_data->gpio1_ctrl(sd, 1); + ret |= dev->platform_data->gpio0_ctrl(sd, 0); + } + return ret; +} + + +static int power_down(struct v4l2_subdev *sd); + +static int power_up(struct v4l2_subdev *sd) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + pr_info("%s S\n", __func__); + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_gpio; + } + + msleep(100); + + pr_info("%s E\n", __func__); + return 0; + +fail_gpio: + dev->platform_data->flisclk_ctrl(sd, 0); +fail_clk: + power_ctrl(sd, 0); +fail_power: + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int gc0310_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + if (on == 0) + return power_down(sd); + else { + ret = power_up(sd); + if (!ret) + return gc0310_init(sd); + } + return ret; +} + +/* + * distance - calculate the distance + * @res: resolution + * @w: width + * @h: height + * + * Get the gap between resolution and w/h. + * res->width/height smaller than w/h wouldn't be considered. + * Returns the value of gap or -1 if fail. + */ +#define LARGEST_ALLOWED_RATIO_MISMATCH 800 +static int distance(struct gc0310_resolution *res, u32 w, u32 h) +{ + unsigned int w_ratio = (res->width << 13) / w; + unsigned int h_ratio; + int match; + + if (h == 0) + return -1; + h_ratio = (res->height << 13) / h; + if (h_ratio == 0) + return -1; + match = abs(((w_ratio << 13) / h_ratio) - ((int)8192)); + + if ((w_ratio < (int)8192) || (h_ratio < (int)8192) || + (match > LARGEST_ALLOWED_RATIO_MISMATCH)) + return -1; + + return w_ratio + h_ratio; +} + +/* Return the nearest higher resolution index */ +static int nearest_resolution_index(int w, int h) +{ + int i; + int idx = -1; + int dist; + int min_dist = INT_MAX; + struct gc0310_resolution *tmp_res = NULL; + + for (i = 0; i < N_RES; i++) { + tmp_res = &gc0310_res[i]; + dist = distance(tmp_res, w, h); + if (dist == -1) + continue; + if (dist < min_dist) { + min_dist = dist; + idx = i; + } + } + + return idx; +} + +static int get_resolution_index(int w, int h) +{ + int i; + + for (i = 0; i < N_RES; i++) { + if (w != gc0310_res[i].width) + continue; + if (h != gc0310_res[i].height) + continue; + + return i; + } + + return -1; +} + + +/* TODO: remove it. */ +static int startup(struct v4l2_subdev *sd) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + pr_info("%s S\n", __func__); + + ret = gc0310_write_reg_array(client, gc0310_res[dev->fmt_idx].regs); + if (ret) { + dev_err(&client->dev, "gc0310 write register err.\n"); + return ret; + } + + pr_info("%s E\n", __func__); + return ret; +} + +static int gc0310_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *gc0310_info = NULL; + int ret = 0; + int idx = 0; + pr_info("%s S\n", __func__); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + gc0310_info = v4l2_get_subdev_hostdata(sd); + if (!gc0310_info) + return -EINVAL; + + mutex_lock(&dev->input_lock); + + idx = nearest_resolution_index(fmt->width, fmt->height); + if (idx == -1) { + /* return the largest resolution */ + fmt->width = gc0310_res[N_RES - 1].width; + fmt->height = gc0310_res[N_RES - 1].height; + } else { + fmt->width = gc0310_res[idx].width; + fmt->height = gc0310_res[idx].height; + } + fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + cfg->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); + if (dev->fmt_idx == -1) { + dev_err(&client->dev, "get resolution fail\n"); + mutex_unlock(&dev->input_lock); + return -EINVAL; + } + + printk("%s: before gc0310_write_reg_array %s\n", __FUNCTION__, + gc0310_res[dev->fmt_idx].desc); + ret = startup(sd); + if (ret) { + dev_err(&client->dev, "gc0310 startup err\n"); + goto err; + } + + ret = gc0310_get_intg_factor(client, gc0310_info, + &gc0310_res[dev->fmt_idx]); + if (ret) { + dev_err(&client->dev, "failed to get integration_factor\n"); + goto err; + } + + pr_info("%s E\n", __func__); +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc0310_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc0310_device *dev = to_gc0310_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = gc0310_res[dev->fmt_idx].width; + fmt->height = gc0310_res[dev->fmt_idx].height; + fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; + + return 0; +} + +static int gc0310_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u8 high, low; + int ret; + u16 id; + + pr_info("%s S\n", __func__); + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_SC_CMMN_CHIP_ID_H, &high); + if (ret) { + dev_err(&client->dev, "read sensor_id_high failed\n"); + return -ENODEV; + } + ret = gc0310_read_reg(client, GC0310_8BIT, + GC0310_SC_CMMN_CHIP_ID_L, &low); + if (ret) { + dev_err(&client->dev, "read sensor_id_low failed\n"); + return -ENODEV; + } + id = ((((u16) high) << 8) | (u16) low); + pr_info("sensor ID = 0x%x\n", id); + + if (id != GC0310_ID) { + dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n", id, GC0310_ID); + return -ENODEV; + } + + dev_dbg(&client->dev, "detect gc0310 success\n"); + + pr_info("%s E\n", __func__); + + return 0; +} + +static int gc0310_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + pr_info("%s S enable=%d\n", __func__, enable); + mutex_lock(&dev->input_lock); + + if (enable) { + /* enable per frame MIPI and sensor ctrl reset */ + ret = gc0310_write_reg(client, GC0310_8BIT, + 0xFE, 0x30); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + } + + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + + ret = gc0310_write_reg(client, GC0310_8BIT, GC0310_SW_STREAM, + enable ? GC0310_START_STREAMING : + GC0310_STOP_STREAMING); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + + ret = gc0310_write_reg(client, GC0310_8BIT, + GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0); + if (ret) { + mutex_unlock(&dev->input_lock); + return ret; + } + + mutex_unlock(&dev->input_lock); + pr_info("%s E\n", __func__); + return ret; +} + + +static int gc0310_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + pr_info("%s S\n", __func__); + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc0310 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "gc0310 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = gc0310_detect(client); + if (ret) { + dev_err(&client->dev, "gc0310_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc0310 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + pr_info("%s E\n", __func__); + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc0310_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = gc0310_res[dev->fmt_idx].fps; + + return 0; +} + +static int gc0310_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SGRBG8_1X8; + return 0; +} + +static int gc0310_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = gc0310_res[index].width; + fse->min_height = gc0310_res[index].height; + fse->max_width = gc0310_res[index].width; + fse->max_height = gc0310_res[index].height; + + return 0; + +} + + +static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct gc0310_device *dev = to_gc0310_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = gc0310_res[dev->fmt_idx].skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_sensor_ops gc0310_sensor_ops = { + .g_skip_frames = gc0310_g_skip_frames, +}; + +static const struct v4l2_subdev_video_ops gc0310_video_ops = { + .s_stream = gc0310_s_stream, + .g_frame_interval = gc0310_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops gc0310_core_ops = { + .s_power = gc0310_s_power, + .ioctl = gc0310_ioctl, +}; + +static const struct v4l2_subdev_pad_ops gc0310_pad_ops = { + .enum_mbus_code = gc0310_enum_mbus_code, + .enum_frame_size = gc0310_enum_frame_size, + .get_fmt = gc0310_get_fmt, + .set_fmt = gc0310_set_fmt, +}; + +static const struct v4l2_subdev_ops gc0310_ops = { + .core = &gc0310_core_ops, + .video = &gc0310_video_ops, + .pad = &gc0310_pad_ops, + .sensor = &gc0310_sensor_ops, +}; + +static int gc0310_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc0310_device *dev = to_gc0310_sensor(sd); + dev_dbg(&client->dev, "gc0310_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); + + return 0; +} + +static int gc0310_probe(struct i2c_client *client) +{ + struct gc0310_device *dev; + int ret; + void *pdata; + unsigned int i; + + pr_info("%s S\n", __func__); + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->fmt_idx = 0; + v4l2_i2c_subdev_init(&(dev->sd), client, &gc0310_ops); + + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_8, + atomisp_bayer_order_grbg); + if (!pdata) { + ret = -EINVAL; + goto out_free; + } + + ret = gc0310_s_config(&dev->sd, client->irq, pdata); + if (ret) + goto out_free; + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SGRBG8_1X8; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(gc0310_controls)); + if (ret) { + gc0310_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(gc0310_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &gc0310_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + gc0310_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + gc0310_remove(client); + + pr_info("%s E\n", __func__); + return ret; +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id gc0310_acpi_match[] = { + {"XXGC0310"}, + {"INT0310"}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, gc0310_acpi_match); + +static struct i2c_driver gc0310_driver = { + .driver = { + .name = "gc0310", + .acpi_match_table = gc0310_acpi_match, + }, + .probe_new = gc0310_probe, + .remove = gc0310_remove, +}; +module_i2c_driver(gc0310_driver); + +MODULE_AUTHOR("Lai, Angie "); +MODULE_DESCRIPTION("A low-level driver for GalaxyCore GC0310 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c new file mode 100644 index 0000000000000..4b6b6568b3cf3 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -0,0 +1,1124 @@ +/* + * Support for GalaxyCore GC2235 2M camera sensor. + * + * Copyright (c) 2014 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../include/linux/atomisp_gmin_platform.h" +#include +#include + +#include "gc2235.h" + +/* i2c read/write stuff */ +static int gc2235_read_reg(struct i2c_client *client, + u16 data_length, u16 reg, u16 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[6]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != GC2235_8BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0, sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = 1; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == GC2235_8BIT) + *val = (u8)data[0]; + + return 0; +} + +static int gc2235_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int gc2235_write_reg(struct i2c_client *client, u16 data_length, + u8 reg, u8 val) +{ + int ret; + unsigned char data[4] = {0}; + const u16 len = data_length + sizeof(u8); /* 16-bit address + data */ + + if (data_length != GC2235_8BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + data[0] = reg; + data[1] = val; + + ret = gc2235_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +static int __gc2235_flush_reg_array(struct i2c_client *client, + struct gc2235_write_ctrl *ctrl) +{ + u16 size; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u8) + ctrl->index; /* 8-bit address + data */ + ctrl->index = 0; + + return gc2235_i2c_write(client, size, (u8 *)&ctrl->buffer); +} + +static int __gc2235_buf_reg_array(struct i2c_client *client, + struct gc2235_write_ctrl *ctrl, + const struct gc2235_reg *next) +{ + int size; + + if (next->type != GC2235_8BIT) + return -EINVAL; + + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u8) >= GC2235_MAX_WRITE_BUF_SIZE) + return __gc2235_flush_reg_array(client, ctrl); + + return 0; +} +static int __gc2235_write_reg_is_consecutive(struct i2c_client *client, + struct gc2235_write_ctrl *ctrl, + const struct gc2235_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} +static int gc2235_write_reg_array(struct i2c_client *client, + const struct gc2235_reg *reglist) +{ + const struct gc2235_reg *next = reglist; + struct gc2235_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != GC2235_TOK_TERM; next++) { + switch (next->type & GC2235_TOK_MASK) { + case GC2235_TOK_DELAY: + err = __gc2235_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__gc2235_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __gc2235_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __gc2235_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __gc2235_flush_reg_array(client, &ctrl); +} + +static int gc2235_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC2235_FOCAL_LENGTH_NUM << 16) | GC2235_FOCAL_LENGTH_DEM; + return 0; +} + +static int gc2235_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for imx*/ + *val = (GC2235_F_NUMBER_DEFAULT_NUM << 16) | GC2235_F_NUMBER_DEM; + return 0; +} + +static int gc2235_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (GC2235_F_NUMBER_DEFAULT_NUM << 24) | + (GC2235_F_NUMBER_DEM << 16) | + (GC2235_F_NUMBER_DEFAULT_NUM << 8) | GC2235_F_NUMBER_DEM; + return 0; +} + + +static int gc2235_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct gc2235_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct atomisp_sensor_mode_data *buf = &info->data; + u16 reg_val, reg_val_h; + int ret; + + if (!info) + return -EINVAL; + + /* pixel clock calculattion */ + buf->vt_pix_clk_freq_mhz = dev->vt_pix_clk_freq_mhz = 30000000; + + /* get integration time */ + buf->coarse_integration_time_min = GC2235_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + GC2235_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = GC2235_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + GC2235_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = GC2235_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_CROP_START_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_CROP_START_L, ®_val); + if (ret) + return ret; + + buf->crop_horizontal_start = (reg_val_h << 8) | reg_val; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_CROP_START_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_CROP_START_L, ®_val); + if (ret) + return ret; + + buf->crop_vertical_start = (reg_val_h << 8) | reg_val; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_OUTSIZE_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_H_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_width = (reg_val_h << 8) | reg_val; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_OUTSIZE_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_V_OUTSIZE_L, ®_val); + if (ret) + return ret; + buf->output_height = (reg_val_h << 8) | reg_val; + + buf->crop_horizontal_end = buf->crop_horizontal_start + + buf->output_width - 1; + buf->crop_vertical_end = buf->crop_vertical_start + + buf->output_height - 1; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_HB_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_HB_L, ®_val); + if (ret) + return ret; + +#if 0 + u16 dummy = (reg_val_h << 8) | reg_val; +#endif + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_SH_DELAY_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_SH_DELAY_L, ®_val); + +#if 0 + buf->line_length_pck = buf->output_width + 16 + dummy + + (((u16)reg_val_h << 8) | (u16)reg_val) + 4; +#endif + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_VB_H, ®_val_h); + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_VB_L, ®_val); + if (ret) + return ret; + +#if 0 + buf->frame_length_lines = buf->output_height + 32 + + (((u16)reg_val_h << 8) | (u16)reg_val); +#endif + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 coarse_integration = (u16)coarse_itg; + int ret = 0; + u16 expo_coarse_h, expo_coarse_l, gain_val = 0xF0, gain_val2 = 0xF0; + expo_coarse_h = coarse_integration >> 8; + expo_coarse_l = coarse_integration & 0xff; + + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_H, expo_coarse_h); + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_L, expo_coarse_l); + + if (gain <= 0x58) { + gain_val = 0x40; + gain_val2 = 0x58; + } else if (gain < 256) { + gain_val = 0x40; + gain_val2 = gain; + } else { + gain_val2 = 64 * gain / 256; + gain_val = 0xff; + } + + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_GLOBAL_GAIN, (u8)gain_val); + ret = gc2235_write_reg(client, GC2235_8BIT, + GC2235_PRE_GAIN, (u8)gain_val2); + + return ret; +} + + +static int gc2235_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __gc2235_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long gc2235_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + int exp = exposure->integration_time[0]; + int gain = exposure->gain[0]; + int digitgain = exposure->gain[1]; + + /* we should not accept the invalid value below. */ + if (gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + return gc2235_set_exposure(sd, exp, gain, digitgain); +} +static long gc2235_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return gc2235_s_exposure(sd, arg); + default: + return -EINVAL; + } + return 0; +} +/* This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int gc2235_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 reg_v, reg_v2; + int ret; + + /* get exposure */ + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_L, + ®_v); + if (ret) + goto err; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_EXPOSURE_H, + ®_v2); + if (ret) + goto err; + + reg_v += reg_v2 << 8; + + *value = reg_v; +err: + return ret; +} + +static int gc2235_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct gc2235_device *dev = + container_of(ctrl->handler, struct gc2235_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = gc2235_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = gc2235_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = gc2235_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = gc2235_g_fnumber_range(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .g_volatile_ctrl = gc2235_g_volatile_ctrl +}; + +static struct v4l2_ctrl_config gc2235_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = GC2235_FOCAL_LENGTH_DEFAULT, + .max = GC2235_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = GC2235_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = GC2235_F_NUMBER_DEFAULT, + .max = GC2235_F_NUMBER_DEFAULT, + .step = 0x01, + .def = GC2235_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = GC2235_F_NUMBER_RANGE, + .max = GC2235_F_NUMBER_RANGE, + .step = 0x01, + .def = GC2235_F_NUMBER_RANGE, + .flags = 0, + }, +}; + +static int __gc2235_init(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + /* restore settings */ + gc2235_res = gc2235_res_preview; + N_RES = N_RES_PREVIEW; + + return gc2235_write_reg_array(client, gc2235_init_settings); +} + +static int is_init; + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = -1; + struct gc2235_device *dev = to_gc2235_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + usleep_range(60, 90); + if (ret == 0) + ret |= dev->platform_data->v2p8_ctrl(sd, 1); + } else { + ret = dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + int ret = -1; + + if (!dev || !dev->platform_data) + return -ENODEV; + + ret |= dev->platform_data->gpio1_ctrl(sd, !flag); + usleep_range(60, 90); + return dev->platform_data->gpio0_ctrl(sd, flag); +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + usleep_range(5000, 6000); + + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + usleep_range(5000, 6000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_power; + } + + msleep(5); + return 0; + +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int gc2235_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + + if (on == 0) + ret = power_down(sd); + else { + ret = power_up(sd); + if (!ret) + ret = __gc2235_init(sd); + is_init = 1; + } + return ret; +} + +/* + * distance - calculate the distance + * @res: resolution + * @w: width + * @h: height + * + * Get the gap between resolution and w/h. + * res->width/height smaller than w/h wouldn't be considered. + * Returns the value of gap or -1 if fail. + */ +#define LARGEST_ALLOWED_RATIO_MISMATCH 800 +static int distance(struct gc2235_resolution *res, u32 w, u32 h) +{ + unsigned int w_ratio = (res->width << 13) / w; + unsigned int h_ratio; + int match; + + if (h == 0) + return -1; + h_ratio = (res->height << 13) / h; + if (h_ratio == 0) + return -1; + match = abs(((w_ratio << 13) / h_ratio) - 8192); + + if ((w_ratio < 8192) || (h_ratio < 8192) || + (match > LARGEST_ALLOWED_RATIO_MISMATCH)) + return -1; + + return w_ratio + h_ratio; +} + +/* Return the nearest higher resolution index */ +static int nearest_resolution_index(int w, int h) +{ + int i; + int idx = -1; + int dist; + int min_dist = INT_MAX; + struct gc2235_resolution *tmp_res = NULL; + + for (i = 0; i < N_RES; i++) { + tmp_res = &gc2235_res[i]; + dist = distance(tmp_res, w, h); + if (dist == -1) + continue; + if (dist < min_dist) { + min_dist = dist; + idx = i; + } + } + + return idx; +} + +static int get_resolution_index(int w, int h) +{ + int i; + + for (i = 0; i < N_RES; i++) { + if (w != gc2235_res[i].width) + continue; + if (h != gc2235_res[i].height) + continue; + + return i; + } + + return -1; +} + +static int startup(struct v4l2_subdev *sd) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + if (is_init == 0) { + /* force gc2235 to do a reset in res change, otherwise it + * can not output normal after switching res. and it is not + * necessary for first time run up after power on, for the sack + * of performance + */ + power_down(sd); + power_up(sd); + gc2235_write_reg_array(client, gc2235_init_settings); + } + + ret = gc2235_write_reg_array(client, gc2235_res[dev->fmt_idx].regs); + if (ret) { + dev_err(&client->dev, "gc2235 write register err.\n"); + return ret; + } + is_init = 0; + + return ret; +} + +static int gc2235_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *gc2235_info = NULL; + int ret = 0; + int idx; + + gc2235_info = v4l2_get_subdev_hostdata(sd); + if (!gc2235_info) + return -EINVAL; + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + mutex_lock(&dev->input_lock); + idx = nearest_resolution_index(fmt->width, fmt->height); + if (idx == -1) { + /* return the largest resolution */ + fmt->width = gc2235_res[N_RES - 1].width; + fmt->height = gc2235_res[N_RES - 1].height; + } else { + fmt->width = gc2235_res[idx].width; + fmt->height = gc2235_res[idx].height; + } + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + cfg->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); + if (dev->fmt_idx == -1) { + dev_err(&client->dev, "get resolution fail\n"); + mutex_unlock(&dev->input_lock); + return -EINVAL; + } + + ret = startup(sd); + if (ret) { + dev_err(&client->dev, "gc2235 startup err\n"); + goto err; + } + + ret = gc2235_get_intg_factor(client, gc2235_info, + &gc2235_res[dev->fmt_idx]); + if (ret) + dev_err(&client->dev, "failed to get integration_factor\n"); + +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc2235_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct gc2235_device *dev = to_gc2235_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = gc2235_res[dev->fmt_idx].width; + fmt->height = gc2235_res[dev->fmt_idx].height; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + + return 0; +} + +static int gc2235_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u16 high, low; + int ret; + u16 id; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_SENSOR_ID_H, &high); + if (ret) { + dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); + return -ENODEV; + } + ret = gc2235_read_reg(client, GC2235_8BIT, + GC2235_SENSOR_ID_L, &low); + id = ((high << 8) | low); + + if (id != GC2235_ID) { + dev_err(&client->dev, "sensor ID error, 0x%x\n", id); + return -ENODEV; + } + + dev_info(&client->dev, "detect gc2235 success\n"); + return 0; +} + +static int gc2235_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + mutex_lock(&dev->input_lock); + + if (enable) + ret = gc2235_write_reg_array(client, gc2235_stream_on); + else + ret = gc2235_write_reg_array(client, gc2235_stream_off); + + mutex_unlock(&dev->input_lock); + return ret; +} + + +static int gc2235_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc2235 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "gc2235 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = gc2235_detect(client); + if (ret) { + dev_err(&client->dev, "gc2235_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "gc2235 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int gc2235_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = gc2235_res[dev->fmt_idx].fps; + + return 0; +} + +static int gc2235_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int gc2235_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = gc2235_res[index].width; + fse->min_height = gc2235_res[index].height; + fse->max_width = gc2235_res[index].width; + fse->max_height = gc2235_res[index].height; + + return 0; + +} + +static int gc2235_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct gc2235_device *dev = to_gc2235_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = gc2235_res[dev->fmt_idx].skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_sensor_ops gc2235_sensor_ops = { + .g_skip_frames = gc2235_g_skip_frames, +}; + +static const struct v4l2_subdev_video_ops gc2235_video_ops = { + .s_stream = gc2235_s_stream, + .g_frame_interval = gc2235_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops gc2235_core_ops = { + .s_power = gc2235_s_power, + .ioctl = gc2235_ioctl, +}; + +static const struct v4l2_subdev_pad_ops gc2235_pad_ops = { + .enum_mbus_code = gc2235_enum_mbus_code, + .enum_frame_size = gc2235_enum_frame_size, + .get_fmt = gc2235_get_fmt, + .set_fmt = gc2235_set_fmt, +}; + +static const struct v4l2_subdev_ops gc2235_ops = { + .core = &gc2235_core_ops, + .video = &gc2235_video_ops, + .pad = &gc2235_pad_ops, + .sensor = &gc2235_sensor_ops, +}; + +static int gc2235_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct gc2235_device *dev = to_gc2235_sensor(sd); + dev_dbg(&client->dev, "gc2235_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); + + return 0; +} + +static int gc2235_probe(struct i2c_client *client) +{ + struct gc2235_device *dev; + void *gcpdev; + int ret; + unsigned int i; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->fmt_idx = 0; + v4l2_i2c_subdev_init(&(dev->sd), client, &gc2235_ops); + + gcpdev = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_grbg); + + ret = gc2235_s_config(&dev->sd, client->irq, gcpdev); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(gc2235_controls)); + if (ret) { + gc2235_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(gc2235_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &gc2235_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + gc2235_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + gc2235_remove(client); + + return atomisp_register_i2c_module(&dev->sd, gcpdev, RAW_CAMERA); + +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + + return ret; +} + +static const struct acpi_device_id gc2235_acpi_match[] = { + { "INT33F8" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, gc2235_acpi_match); + +static struct i2c_driver gc2235_driver = { + .driver = { + .name = "gc2235", + .acpi_match_table = gc2235_acpi_match, + }, + .probe_new = gc2235_probe, + .remove = gc2235_remove, +}; +module_i2c_driver(gc2235_driver); + +MODULE_AUTHOR("Shuguang Gong "); +MODULE_DESCRIPTION("A low-level driver for GC2235 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c new file mode 100644 index 0000000000000..81e5ec0c2b64c --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c @@ -0,0 +1,205 @@ +/* + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include +#include +#include +#include +#include "../include/linux/libmsrlisthelper.h" +#include +#include + +/* Tagged binary data container structure definitions. */ +struct tbd_header { + uint32_t tag; /*!< Tag identifier, also checks endianness */ + uint32_t size; /*!< Container size including this header */ + uint32_t version; /*!< Version, format 0xYYMMDDVV */ + uint32_t revision; /*!< Revision, format 0xYYMMDDVV */ + uint32_t config_bits; /*!< Configuration flag bits set */ + uint32_t checksum; /*!< Global checksum, header included */ +} __packed; + +struct tbd_record_header { + uint32_t size; /*!< Size of record including header */ + uint8_t format_id; /*!< tbd_format_t enumeration values used */ + uint8_t packing_key; /*!< Packing method; 0 = no packing */ + uint16_t class_id; /*!< tbd_class_t enumeration values used */ +} __packed; + +struct tbd_data_record_header { + uint16_t next_offset; + uint16_t flags; + uint16_t data_offset; + uint16_t data_size; +} __packed; + +#define TBD_CLASS_DRV_ID 2 + +static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr, + unsigned int size) +{ + /* The configuration data contains any number of sequences where + * the first byte (that is, uint8_t) that marks the number of bytes + * in the sequence to follow, is indeed followed by the indicated + * number of bytes of actual data to be written to sensor. + * By convention, the first two bytes of actual data should be + * understood as an address in the sensor address space (hibyte + * followed by lobyte) where the remaining data in the sequence + * will be written. */ + + uint8_t *ptr = bufptr; + while (ptr < bufptr + size) { + struct i2c_msg msg = { + .addr = client->addr, + .flags = 0, + }; + int ret; + + /* How many bytes */ + msg.len = *ptr++; + /* Where the bytes are located */ + msg.buf = ptr; + ptr += msg.len; + + if (ptr > bufptr + size) + /* Accessing data beyond bounds is not tolerated */ + return -EINVAL; + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret < 0) { + dev_err(&client->dev, "i2c write error: %d", ret); + return ret; + } + } + return 0; +} + +static int parse_and_apply(struct i2c_client *client, uint8_t *buffer, + unsigned int size) +{ + uint8_t *endptr8 = buffer + size; + struct tbd_data_record_header *header = + (struct tbd_data_record_header *)buffer; + + /* There may be any number of datasets present */ + unsigned int dataset = 0; + + do { + /* In below, four variables are read from buffer */ + if ((uint8_t *)header + sizeof(*header) > endptr8) + return -EINVAL; + + /* All data should be located within given buffer */ + if ((uint8_t *)header + header->data_offset + + header->data_size > endptr8) + return -EINVAL; + + /* We have a new valid dataset */ + dataset++; + /* See whether there is MSR data */ + /* If yes, update the reg info */ + if (header->data_size && (header->flags & 1)) { + int ret; + + dev_info(&client->dev, + "New MSR data for sensor driver (dataset %02d) size:%d\n", + dataset, header->data_size); + ret = set_msr_configuration(client, + buffer + header->data_offset, + header->data_size); + if (ret) + return ret; + } + header = (struct tbd_data_record_header *)(buffer + + header->next_offset); + } while (header->next_offset); + + return 0; +} + +int apply_msr_data(struct i2c_client *client, const struct firmware *fw) +{ + struct tbd_header *header; + struct tbd_record_header *record; + + if (!fw) { + dev_warn(&client->dev, "Drv data is not loaded.\n"); + return -EINVAL; + } + + if (sizeof(*header) > fw->size) + return -EINVAL; + + header = (struct tbd_header *)fw->data; + /* Check that we have drvb block. */ + if (memcmp(&header->tag, "DRVB", 4)) + return -EINVAL; + + /* Check the size */ + if (header->size != fw->size) + return -EINVAL; + + if (sizeof(*header) + sizeof(*record) > fw->size) + return -EINVAL; + + record = (struct tbd_record_header *)(header + 1); + /* Check that class id mathes tbd's drv id. */ + if (record->class_id != TBD_CLASS_DRV_ID) + return -EINVAL; + + /* Size 0 shall not be treated as an error */ + if (!record->size) + return 0; + + return parse_and_apply(client, (uint8_t *)(record + 1), record->size); +} +EXPORT_SYMBOL_GPL(apply_msr_data); + +int load_msr_list(struct i2c_client *client, char *name, + const struct firmware **fw) +{ + int ret = request_firmware(fw, name, &client->dev); + if (ret) { + dev_err(&client->dev, + "Error %d while requesting firmware %s\n", + ret, name); + return ret; + } + dev_info(&client->dev, "Received %lu bytes drv data\n", + (unsigned long)(*fw)->size); + + return 0; +} +EXPORT_SYMBOL_GPL(load_msr_list); + +void release_msr_list(struct i2c_client *client, const struct firmware *fw) +{ + release_firmware(fw); +} +EXPORT_SYMBOL_GPL(release_msr_list); + +static int init_msrlisthelper(void) +{ + return 0; +} + +static void exit_msrlisthelper(void) +{ +} + +module_init(init_msrlisthelper); +module_exit(exit_msrlisthelper); + +MODULE_AUTHOR("Jukka Kaartinen "); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c new file mode 100644 index 0000000000000..7098bf317f164 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c @@ -0,0 +1,968 @@ +/* + * LED flash driver for LM3554 + * + * Copyright (c) 2010-2012 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include +#include +#include +#include +#include +#include + +#include "../include/media/lm3554.h" +#include +#include +#include +#include +#include "../include/linux/atomisp_gmin_platform.h" +#include "../include/linux/atomisp.h" + +/* Registers */ + +#define LM3554_TORCH_BRIGHTNESS_REG 0xA0 +#define LM3554_TORCH_MODE_SHIFT 0 +#define LM3554_TORCH_CURRENT_SHIFT 3 +#define LM3554_INDICATOR_CURRENT_SHIFT 6 + +#define LM3554_FLASH_BRIGHTNESS_REG 0xB0 +#define LM3554_FLASH_MODE_SHIFT 0 +#define LM3554_FLASH_CURRENT_SHIFT 3 +#define LM3554_STROBE_SENSITIVITY_SHIFT 7 + +#define LM3554_FLASH_DURATION_REG 0xC0 +#define LM3554_FLASH_TIMEOUT_SHIFT 0 +#define LM3554_CURRENT_LIMIT_SHIFT 5 + +#define LM3554_FLAGS_REG 0xD0 +#define LM3554_FLAG_TIMEOUT (1 << 0) +#define LM3554_FLAG_THERMAL_SHUTDOWN (1 << 1) +#define LM3554_FLAG_LED_FAULT (1 << 2) +#define LM3554_FLAG_TX1_INTERRUPT (1 << 3) +#define LM3554_FLAG_TX2_INTERRUPT (1 << 4) +#define LM3554_FLAG_LED_THERMAL_FAULT (1 << 5) +#define LM3554_FLAG_UNUSED (1 << 6) +#define LM3554_FLAG_INPUT_VOLTAGE_LOW (1 << 7) + +#define LM3554_CONFIG_REG_1 0xE0 +#define LM3554_ENVM_TX2_SHIFT 5 +#define LM3554_TX2_POLARITY_SHIFT 6 + +struct lm3554 { + struct v4l2_subdev sd; + + struct mutex power_lock; + struct v4l2_ctrl_handler ctrl_handler; + int power_count; + + unsigned int mode; + int timeout; + u8 torch_current; + u8 indicator_current; + u8 flash_current; + + struct timer_list flash_off_delay; + struct lm3554_platform_data *pdata; +}; + +#define to_lm3554(p_sd) container_of(p_sd, struct lm3554, sd) + +/* Return negative errno else zero on success */ +static int lm3554_write(struct lm3554 *flash, u8 addr, u8 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + int ret; + + ret = i2c_smbus_write_byte_data(client, addr, val); + + dev_dbg(&client->dev, "Write Addr:%02X Val:%02X %s\n", addr, val, + ret < 0 ? "fail" : "ok"); + + return ret; +} + +/* Return negative errno else a data byte received from the device. */ +static int lm3554_read(struct lm3554 *flash, u8 addr) +{ + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + int ret; + + ret = i2c_smbus_read_byte_data(client, addr); + + dev_dbg(&client->dev, "Read Addr:%02X Val:%02X %s\n", addr, ret, + ret < 0 ? "fail" : "ok"); + + return ret; +} + +/* ----------------------------------------------------------------------------- + * Hardware configuration + */ + +static int lm3554_set_mode(struct lm3554 *flash, unsigned int mode) +{ + u8 val; + int ret; + + val = (mode << LM3554_FLASH_MODE_SHIFT) | + (flash->flash_current << LM3554_FLASH_CURRENT_SHIFT); + + ret = lm3554_write(flash, LM3554_FLASH_BRIGHTNESS_REG, val); + if (ret == 0) + flash->mode = mode; + return ret; +} + +static int lm3554_set_torch(struct lm3554 *flash) +{ + u8 val; + + val = (flash->mode << LM3554_TORCH_MODE_SHIFT) | + (flash->torch_current << LM3554_TORCH_CURRENT_SHIFT) | + (flash->indicator_current << LM3554_INDICATOR_CURRENT_SHIFT); + + return lm3554_write(flash, LM3554_TORCH_BRIGHTNESS_REG, val); +} + +static int lm3554_set_flash(struct lm3554 *flash) +{ + u8 val; + + val = (flash->mode << LM3554_FLASH_MODE_SHIFT) | + (flash->flash_current << LM3554_FLASH_CURRENT_SHIFT); + + return lm3554_write(flash, LM3554_FLASH_BRIGHTNESS_REG, val); +} + +static int lm3554_set_duration(struct lm3554 *flash) +{ + u8 val; + + val = (flash->timeout << LM3554_FLASH_TIMEOUT_SHIFT) | + (flash->pdata->current_limit << LM3554_CURRENT_LIMIT_SHIFT); + + return lm3554_write(flash, LM3554_FLASH_DURATION_REG, val); +} + +static int lm3554_set_config1(struct lm3554 *flash) +{ + u8 val; + + val = (flash->pdata->envm_tx2 << LM3554_ENVM_TX2_SHIFT) | + (flash->pdata->tx2_polarity << LM3554_TX2_POLARITY_SHIFT); + return lm3554_write(flash, LM3554_CONFIG_REG_1, val); +} + +/* ----------------------------------------------------------------------------- + * Hardware trigger + */ +static void lm3554_flash_off_delay(struct timer_list *t) +{ + struct lm3554 *flash = from_timer(flash, t, flash_off_delay); + struct lm3554_platform_data *pdata = flash->pdata; + + gpio_set_value(pdata->gpio_strobe, 0); +} + +static int lm3554_hw_strobe(struct i2c_client *client, bool strobe) +{ + int ret, timer_pending; + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + struct lm3554_platform_data *pdata = flash->pdata; + + /* + * An abnormal high flash current is observed when strobe off the + * flash. Workaround here is firstly set flash current to lower level, + * wait a short moment, and then strobe off the flash. + */ + + timer_pending = del_timer_sync(&flash->flash_off_delay); + + /* Flash off */ + if (!strobe) { + /* set current to 70mA and wait a while */ + ret = lm3554_write(flash, LM3554_FLASH_BRIGHTNESS_REG, 0); + if (ret < 0) + goto err; + mod_timer(&flash->flash_off_delay, + jiffies + msecs_to_jiffies(LM3554_TIMER_DELAY)); + return 0; + } + + /* Flash on */ + + /* + * If timer is killed before run, flash is not strobe off, + * so must strobe off here + */ + if (timer_pending) + gpio_set_value(pdata->gpio_strobe, 0); + + /* Restore flash current settings */ + ret = lm3554_set_flash(flash); + if (ret < 0) + goto err; + + /* Strobe on Flash */ + gpio_set_value(pdata->gpio_strobe, 1); + + return 0; +err: + dev_err(&client->dev, "failed to %s flash strobe (%d)\n", + strobe ? "on" : "off", ret); + return ret; +} + +/* ----------------------------------------------------------------------------- + * V4L2 controls + */ + +static int lm3554_read_status(struct lm3554 *flash) +{ + int ret; + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + + /* NOTE: reading register clear fault status */ + ret = lm3554_read(flash, LM3554_FLAGS_REG); + if (ret < 0) + return ret; + + /* + * Accordingly to datasheet we read back '1' in bit 6. + * Clear it first. + */ + ret &= ~LM3554_FLAG_UNUSED; + + /* + * Do not take TX1/TX2 signal as an error + * because MSIC will not turn off flash, but turn to + * torch mode according to gsm modem signal by hardware. + */ + ret &= ~(LM3554_FLAG_TX1_INTERRUPT | LM3554_FLAG_TX2_INTERRUPT); + + if (ret > 0) + dev_dbg(&client->dev, "LM3554 flag status: %02x\n", ret); + + return ret; +} + +static int lm3554_s_flash_timeout(struct v4l2_subdev *sd, u32 val) +{ + struct lm3554 *flash = to_lm3554(sd); + + val = clamp(val, LM3554_MIN_TIMEOUT, LM3554_MAX_TIMEOUT); + val = val / LM3554_TIMEOUT_STEPSIZE - 1; + + flash->timeout = val; + + return lm3554_set_duration(flash); +} + +static int lm3554_g_flash_timeout(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = (u32)(flash->timeout + 1) * LM3554_TIMEOUT_STEPSIZE; + + return 0; +} + +static int lm3554_s_flash_intensity(struct v4l2_subdev *sd, u32 intensity) +{ + struct lm3554 *flash = to_lm3554(sd); + + intensity = LM3554_CLAMP_PERCENTAGE(intensity); + intensity = LM3554_PERCENT_TO_VALUE(intensity, LM3554_FLASH_STEP); + + flash->flash_current = intensity; + + return lm3554_set_flash(flash); +} + +static int lm3554_g_flash_intensity(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = LM3554_VALUE_TO_PERCENT((u32)flash->flash_current, + LM3554_FLASH_STEP); + + return 0; +} + +static int lm3554_s_torch_intensity(struct v4l2_subdev *sd, u32 intensity) +{ + struct lm3554 *flash = to_lm3554(sd); + + intensity = LM3554_CLAMP_PERCENTAGE(intensity); + intensity = LM3554_PERCENT_TO_VALUE(intensity, LM3554_TORCH_STEP); + + flash->torch_current = intensity; + + return lm3554_set_torch(flash); +} + +static int lm3554_g_torch_intensity(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = LM3554_VALUE_TO_PERCENT((u32)flash->torch_current, + LM3554_TORCH_STEP); + + return 0; +} + +static int lm3554_s_indicator_intensity(struct v4l2_subdev *sd, u32 intensity) +{ + struct lm3554 *flash = to_lm3554(sd); + + intensity = LM3554_CLAMP_PERCENTAGE(intensity); + intensity = LM3554_PERCENT_TO_VALUE(intensity, LM3554_INDICATOR_STEP); + + flash->indicator_current = intensity; + + return lm3554_set_torch(flash); +} + +static int lm3554_g_indicator_intensity(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + + *val = LM3554_VALUE_TO_PERCENT((u32)flash->indicator_current, + LM3554_INDICATOR_STEP); + + return 0; +} + +static int lm3554_s_flash_strobe(struct v4l2_subdev *sd, u32 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + return lm3554_hw_strobe(client, val); +} + +static int lm3554_s_flash_mode(struct v4l2_subdev *sd, u32 new_mode) +{ + struct lm3554 *flash = to_lm3554(sd); + unsigned int mode; + + switch (new_mode) { + case ATOMISP_FLASH_MODE_OFF: + mode = LM3554_MODE_SHUTDOWN; + break; + case ATOMISP_FLASH_MODE_FLASH: + mode = LM3554_MODE_FLASH; + break; + case ATOMISP_FLASH_MODE_INDICATOR: + mode = LM3554_MODE_INDICATOR; + break; + case ATOMISP_FLASH_MODE_TORCH: + mode = LM3554_MODE_TORCH; + break; + default: + return -EINVAL; + } + + return lm3554_set_mode(flash, mode); +} + +static int lm3554_g_flash_mode(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + *val = flash->mode; + return 0; +} + +static int lm3554_g_flash_status(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + int value; + + value = lm3554_read_status(flash); + if (value < 0) + return value; + + if (value & LM3554_FLAG_TIMEOUT) + *val = ATOMISP_FLASH_STATUS_TIMEOUT; + else if (value > 0) + *val = ATOMISP_FLASH_STATUS_HW_ERROR; + else + *val = ATOMISP_FLASH_STATUS_OK; + + return 0; +} + +#ifndef CSS15 +static int lm3554_g_flash_status_register(struct v4l2_subdev *sd, s32 *val) +{ + struct lm3554 *flash = to_lm3554(sd); + int ret; + + ret = lm3554_read(flash, LM3554_FLAGS_REG); + + if (ret < 0) + return ret; + + *val = ret; + return 0; +} +#endif + +static int lm3554_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct lm3554 *dev = + container_of(ctrl->handler, struct lm3554, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_FLASH_TIMEOUT: + ret = lm3554_s_flash_timeout(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_INTENSITY: + ret = lm3554_s_flash_intensity(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_TORCH_INTENSITY: + ret = lm3554_s_torch_intensity(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_INDICATOR_INTENSITY: + ret = lm3554_s_indicator_intensity(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_STROBE: + ret = lm3554_s_flash_strobe(&dev->sd, ctrl->val); + break; + case V4L2_CID_FLASH_MODE: + ret = lm3554_s_flash_mode(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int lm3554_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct lm3554 *dev = + container_of(ctrl->handler, struct lm3554, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_FLASH_TIMEOUT: + ret = lm3554_g_flash_timeout(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_INTENSITY: + ret = lm3554_g_flash_intensity(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_TORCH_INTENSITY: + ret = lm3554_g_torch_intensity(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_INDICATOR_INTENSITY: + ret = lm3554_g_indicator_intensity(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_MODE: + ret = lm3554_g_flash_mode(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FLASH_STATUS: + ret = lm3554_g_flash_status(&dev->sd, &ctrl->val); + break; +#ifndef CSS15 + case V4L2_CID_FLASH_STATUS_REGISTER: + ret = lm3554_g_flash_status_register(&dev->sd, &ctrl->val); + break; +#endif + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = lm3554_s_ctrl, + .g_volatile_ctrl = lm3554_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config lm3554_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_TIMEOUT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Timeout", + .min = 0x0, + .max = LM3554_MAX_TIMEOUT, + .step = 0x01, + .def = LM3554_DEFAULT_TIMEOUT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_FLASH_DEFAULT_BRIGHTNESS, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_TORCH_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Torch Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_TORCH_DEFAULT_BRIGHTNESS, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_INDICATOR_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Indicator Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_INDICATOR_DEFAULT_BRIGHTNESS, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STROBE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flash Strobe", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_MODE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Mode", + .min = 0, + .max = 100, + .step = 1, + .def = ATOMISP_FLASH_MODE_OFF, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STATUS, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Status", + .min = ATOMISP_FLASH_STATUS_OK, + .max = ATOMISP_FLASH_STATUS_TIMEOUT, + .step = 1, + .def = ATOMISP_FLASH_STATUS_OK, + .flags = 0, + }, +#ifndef CSS15 + { + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STATUS_REGISTER, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Status Register", + .min = 0, + .max = 255, + .step = 1, + .def = 0, + .flags = 0, + }, +#endif +}; + +/* ----------------------------------------------------------------------------- + * V4L2 subdev core operations + */ + +/* Put device into known state. */ +static int lm3554_setup(struct lm3554 *flash) +{ + struct i2c_client *client = v4l2_get_subdevdata(&flash->sd); + int ret; + + /* clear the flags register */ + ret = lm3554_read(flash, LM3554_FLAGS_REG); + if (ret < 0) + return ret; + + dev_dbg(&client->dev, "Fault info: %02x\n", ret); + + ret = lm3554_set_config1(flash); + if (ret < 0) + return ret; + + ret = lm3554_set_duration(flash); + if (ret < 0) + return ret; + + ret = lm3554_set_torch(flash); + if (ret < 0) + return ret; + + ret = lm3554_set_flash(flash); + if (ret < 0) + return ret; + + /* read status */ + ret = lm3554_read_status(flash); + if (ret < 0) + return ret; + + return ret ? -EIO : 0; +} + +static int __lm3554_s_power(struct lm3554 *flash, int power) +{ + struct lm3554_platform_data *pdata = flash->pdata; + int ret; + + /*initialize flash driver*/ + gpio_set_value(pdata->gpio_reset, power); + usleep_range(100, 100 + 1); + + if (power) { + /* Setup default values. This makes sure that the chip + * is in a known state. + */ + ret = lm3554_setup(flash); + if (ret < 0) { + __lm3554_s_power(flash, 0); + return ret; + } + } + + return 0; +} + +static int lm3554_s_power(struct v4l2_subdev *sd, int power) +{ + struct lm3554 *flash = to_lm3554(sd); + int ret = 0; + + mutex_lock(&flash->power_lock); + + if (flash->power_count == !power) { + ret = __lm3554_s_power(flash, !!power); + if (ret < 0) + goto done; + } + + flash->power_count += power ? 1 : -1; + WARN_ON(flash->power_count < 0); + +done: + mutex_unlock(&flash->power_lock); + return ret; +} + +static const struct v4l2_subdev_core_ops lm3554_core_ops = { + .s_power = lm3554_s_power, +}; + +static const struct v4l2_subdev_ops lm3554_ops = { + .core = &lm3554_core_ops, +}; + +static int lm3554_detect(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct i2c_adapter *adapter = client->adapter; + struct lm3554 *flash = to_lm3554(sd); + int ret; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_err(&client->dev, "lm3554_detect i2c error\n"); + return -ENODEV; + } + + /* Power up the flash driver and reset it */ + ret = lm3554_s_power(&flash->sd, 1); + if (ret < 0) { + dev_err(&client->dev, "Failed to power on lm3554 LED flash\n"); + } else { + dev_dbg(&client->dev, "Successfully detected lm3554 LED flash\n"); + lm3554_s_power(&flash->sd, 0); + } + + return ret; +} + +static int lm3554_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + return lm3554_s_power(sd, 1); +} + +static int lm3554_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + return lm3554_s_power(sd, 0); +} + +static const struct v4l2_subdev_internal_ops lm3554_internal_ops = { + .registered = lm3554_detect, + .open = lm3554_open, + .close = lm3554_close, +}; + +/* ----------------------------------------------------------------------------- + * I2C driver + */ +#ifdef CONFIG_PM + +static int lm3554_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(subdev); + int rval; + + if (flash->power_count == 0) + return 0; + + rval = __lm3554_s_power(flash, 0); + + dev_dbg(&client->dev, "Suspend %s\n", rval < 0 ? "failed" : "ok"); + + return rval; +} + +static int lm3554_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *subdev = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(subdev); + int rval; + + if (flash->power_count == 0) + return 0; + + rval = __lm3554_s_power(flash, 1); + + dev_dbg(&client->dev, "Resume %s\n", rval < 0 ? "fail" : "ok"); + + return rval; +} + +#else + +#define lm3554_suspend NULL +#define lm3554_resume NULL + +#endif /* CONFIG_PM */ + +static int lm3554_gpio_init(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + struct lm3554_platform_data *pdata = flash->pdata; + int ret; + + if (!gpio_is_valid(pdata->gpio_reset)) + return -EINVAL; + + ret = gpio_direction_output(pdata->gpio_reset, 0); + if (ret < 0) + goto err_gpio_reset; + dev_info(&client->dev, "flash led reset successfully\n"); + + if (!gpio_is_valid(pdata->gpio_strobe)) { + ret = -EINVAL; + goto err_gpio_dir_reset; + } + + ret = gpio_direction_output(pdata->gpio_strobe, 0); + if (ret < 0) + goto err_gpio_strobe; + + return 0; + +err_gpio_strobe: + gpio_free(pdata->gpio_strobe); +err_gpio_dir_reset: + gpio_direction_output(pdata->gpio_reset, 0); +err_gpio_reset: + gpio_free(pdata->gpio_reset); + + return ret; +} + +static int lm3554_gpio_uninit(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + struct lm3554_platform_data *pdata = flash->pdata; + int ret; + + ret = gpio_direction_output(pdata->gpio_strobe, 0); + if (ret < 0) + return ret; + + ret = gpio_direction_output(pdata->gpio_reset, 0); + if (ret < 0) + return ret; + + gpio_free(pdata->gpio_strobe); + gpio_free(pdata->gpio_reset); + return 0; +} + +static void *lm3554_platform_data_func(struct i2c_client *client) +{ + static struct lm3554_platform_data platform_data; + + platform_data.gpio_reset = + desc_to_gpio(gpiod_get_index(&client->dev, + NULL, 2, GPIOD_OUT_LOW)); + platform_data.gpio_strobe = + desc_to_gpio(gpiod_get_index(&client->dev, + NULL, 0, GPIOD_OUT_LOW)); + platform_data.gpio_torch = + desc_to_gpio(gpiod_get_index(&client->dev, + NULL, 1, GPIOD_OUT_LOW)); + dev_info(&client->dev, "camera pdata: lm3554: reset: %d strobe %d torch %d\n", + platform_data.gpio_reset, platform_data.gpio_strobe, + platform_data.gpio_torch); + + /* Set to TX2 mode, then ENVM/TX2 pin is a power amplifier sync input: + * ENVM/TX pin asserted, flash forced into torch; + * ENVM/TX pin desserted, flash set back; + */ + platform_data.envm_tx2 = 1; + platform_data.tx2_polarity = 0; + + /* set peak current limit to be 1000mA */ + platform_data.current_limit = 0; + + return &platform_data; +} + +static int lm3554_probe(struct i2c_client *client) +{ + int err = 0; + struct lm3554 *flash; + unsigned int i; + int ret; + + flash = kzalloc(sizeof(*flash), GFP_KERNEL); + if (!flash) + return -ENOMEM; + + flash->pdata = lm3554_platform_data_func(client); + + v4l2_i2c_subdev_init(&flash->sd, client, &lm3554_ops); + flash->sd.internal_ops = &lm3554_internal_ops; + flash->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + flash->mode = ATOMISP_FLASH_MODE_OFF; + flash->timeout = LM3554_MAX_TIMEOUT / LM3554_TIMEOUT_STEPSIZE - 1; + ret = + v4l2_ctrl_handler_init(&flash->ctrl_handler, + ARRAY_SIZE(lm3554_controls)); + if (ret) { + dev_err(&client->dev, "error initialize a ctrl_handler.\n"); + goto fail2; + } + + for (i = 0; i < ARRAY_SIZE(lm3554_controls); i++) + v4l2_ctrl_new_custom(&flash->ctrl_handler, &lm3554_controls[i], + NULL); + + if (flash->ctrl_handler.error) { + + dev_err(&client->dev, "ctrl_handler error.\n"); + goto fail2; + } + + flash->sd.ctrl_handler = &flash->ctrl_handler; + err = media_entity_pads_init(&flash->sd.entity, 0, NULL); + if (err) { + dev_err(&client->dev, "error initialize a media entity.\n"); + goto fail1; + } + + flash->sd.entity.function = MEDIA_ENT_F_FLASH; + + mutex_init(&flash->power_lock); + + timer_setup(&flash->flash_off_delay, lm3554_flash_off_delay, 0); + + err = lm3554_gpio_init(client); + if (err) { + dev_err(&client->dev, "gpio request/direction_output fail"); + goto fail2; + } + return atomisp_register_i2c_module(&flash->sd, NULL, LED_FLASH); +fail2: + media_entity_cleanup(&flash->sd.entity); + v4l2_ctrl_handler_free(&flash->ctrl_handler); +fail1: + v4l2_device_unregister_subdev(&flash->sd); + kfree(flash); + + return err; +} + +static int lm3554_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct lm3554 *flash = to_lm3554(sd); + int ret; + + media_entity_cleanup(&flash->sd.entity); + v4l2_ctrl_handler_free(&flash->ctrl_handler); + v4l2_device_unregister_subdev(sd); + + atomisp_gmin_remove_subdev(sd); + + del_timer_sync(&flash->flash_off_delay); + + ret = lm3554_gpio_uninit(client); + if (ret < 0) + goto fail; + + kfree(flash); + + return 0; +fail: + dev_err(&client->dev, "gpio request/direction_output fail"); + return ret; +} + +static const struct dev_pm_ops lm3554_pm_ops = { + .suspend = lm3554_suspend, + .resume = lm3554_resume, +}; + +static const struct acpi_device_id lm3554_acpi_match[] = { + { "INTCF1C" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, lm3554_acpi_match); + +static struct i2c_driver lm3554_driver = { + .driver = { + .name = "lm3554", + .pm = &lm3554_pm_ops, + .acpi_match_table = lm3554_acpi_match, + }, + .probe_new = lm3554_probe, + .remove = lm3554_remove, +}; +module_i2c_driver(lm3554_driver); + +MODULE_AUTHOR("Jing Tao "); +MODULE_DESCRIPTION("LED flash driver for LM3554"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c new file mode 100644 index 0000000000000..8e180f9033359 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -0,0 +1,1908 @@ +/* + * Support for mt9m114 Camera Sensor. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../include/linux/atomisp_gmin_platform.h" +#include + +#include "mt9m114.h" + +#define to_mt9m114_sensor(sd) container_of(sd, struct mt9m114_device, sd) + +/* + * TODO: use debug parameter to actually define when debug messages should + * be printed. + */ +static int debug; +static int aaalock; +module_param(debug, int, 0644); +MODULE_PARM_DESC(debug, "Debug level (0-1)"); + +static int mt9m114_t_vflip(struct v4l2_subdev *sd, int value); +static int mt9m114_t_hflip(struct v4l2_subdev *sd, int value); +static int mt9m114_wait_state(struct i2c_client *client, int timeout); + +static int +mt9m114_read_reg(struct i2c_client *client, u16 data_length, u32 reg, u32 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[4]; + + if (!client->adapter) { + v4l2_err(client, "%s error, no client->adapter\n", __func__); + return -ENODEV; + } + + if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT + && data_length != MISENSOR_32BIT) { + v4l2_err(client, "%s error, invalid data length\n", __func__); + return -EINVAL; + } + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = MSG_LEN_OFFSET; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u16) (reg >> 8); + data[1] = (u16) (reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + + if (err >= 0) { + *val = 0; + /* high byte comes first */ + if (data_length == MISENSOR_8BIT) + *val = data[0]; + else if (data_length == MISENSOR_16BIT) + *val = data[1] + (data[0] << 8); + else + *val = data[3] + (data[2] << 8) + + (data[1] << 16) + (data[0] << 24); + + return 0; + } + + dev_err(&client->dev, "read from offset 0x%x error %d", reg, err); + return err; +} + +static int +mt9m114_write_reg(struct i2c_client *client, u16 data_length, u16 reg, u32 val) +{ + int num_msg; + struct i2c_msg msg; + unsigned char data[6] = {0}; + __be16 *wreg; + int retry = 0; + + if (!client->adapter) { + v4l2_err(client, "%s error, no client->adapter\n", __func__); + return -ENODEV; + } + + if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT + && data_length != MISENSOR_32BIT) { + v4l2_err(client, "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + memset(&msg, 0, sizeof(msg)); + +again: + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2 + data_length; + msg.buf = data; + + /* high byte goes out first */ + wreg = (void *)data; + *wreg = cpu_to_be16(reg); + + if (data_length == MISENSOR_8BIT) { + data[2] = (u8)(val); + } else if (data_length == MISENSOR_16BIT) { + u16 *wdata = (void *)&data[2]; + + *wdata = be16_to_cpu(*(__be16 *)&data[2]); + } else { + /* MISENSOR_32BIT */ + u32 *wdata = (void *)&data[2]; + + *wdata = be32_to_cpu(*(__be32 *)&data[2]); + } + + num_msg = i2c_transfer(client->adapter, &msg, 1); + + /* + * HACK: Need some delay here for Rev 2 sensors otherwise some + * registers do not seem to load correctly. + */ + mdelay(1); + + if (num_msg >= 0) + return 0; + + dev_err(&client->dev, "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, num_msg); + if (retry <= I2C_RETRY_COUNT) { + dev_dbg(&client->dev, "retrying... %d", retry); + retry++; + msleep(20); + goto again; + } + + return num_msg; +} + +/** + * misensor_rmw_reg - Read/Modify/Write a value to a register in the sensor + * device + * @client: i2c driver client structure + * @data_length: 8/16/32-bits length + * @reg: register address + * @mask: masked out bits + * @set: bits set + * + * Read/modify/write a value to a register in the sensor device. + * Returns zero if successful, or non-zero otherwise. + */ +static int +misensor_rmw_reg(struct i2c_client *client, u16 data_length, u16 reg, + u32 mask, u32 set) +{ + int err; + u32 val; + + /* Exit when no mask */ + if (mask == 0) + return 0; + + /* @mask must not exceed data length */ + switch (data_length) { + case MISENSOR_8BIT: + if (mask & ~0xff) + return -EINVAL; + break; + case MISENSOR_16BIT: + if (mask & ~0xffff) + return -EINVAL; + break; + case MISENSOR_32BIT: + break; + default: + /* Wrong @data_length */ + return -EINVAL; + } + + err = mt9m114_read_reg(client, data_length, reg, &val); + if (err) { + v4l2_err(client, "misensor_rmw_reg error exit, read failed\n"); + return -EINVAL; + } + + val &= ~mask; + + /* + * Perform the OR function if the @set exists. + * Shift @set value to target bit location. @set should set only + * bits included in @mask. + * + * REVISIT: This function expects @set to be non-shifted. Its shift + * value is then defined to be equal to mask's LSB position. + * How about to inform values in their right offset position and avoid + * this unneeded shift operation? + */ + set <<= ffs(mask) - 1; + val |= set & mask; + + err = mt9m114_write_reg(client, data_length, reg, val); + if (err) { + v4l2_err(client, "misensor_rmw_reg error exit, write failed\n"); + return -EINVAL; + } + + return 0; +} + + +static int __mt9m114_flush_reg_array(struct i2c_client *client, + struct mt9m114_write_ctrl *ctrl) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + int retry = 0; + __be16 *data16 = (void *)&ctrl->buffer.addr; + + if (ctrl->index == 0) + return 0; + +again: + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2 + ctrl->index; + *data16 = cpu_to_be16(ctrl->buffer.addr); + msg.buf = (u8 *)&ctrl->buffer; + + ret = i2c_transfer(client->adapter, &msg, num_msg); + if (ret != num_msg) { + if (++retry <= I2C_RETRY_COUNT) { + dev_dbg(&client->dev, "retrying... %d\n", retry); + msleep(20); + goto again; + } + dev_err(&client->dev, "%s: i2c transfer error\n", __func__); + return -EIO; + } + + ctrl->index = 0; + + /* + * REVISIT: Previously we had a delay after writing data to sensor. + * But it was removed as our tests have shown it is not necessary + * anymore. + */ + + return 0; +} + +static int __mt9m114_buf_reg_array(struct i2c_client *client, + struct mt9m114_write_ctrl *ctrl, + const struct misensor_reg *next) +{ + __be16 *data16; + __be32 *data32; + int err; + + /* Insufficient buffer? Let's flush and get more free space. */ + if (ctrl->index + next->length >= MT9M114_MAX_WRITE_BUF_SIZE) { + err = __mt9m114_flush_reg_array(client, ctrl); + if (err) + return err; + } + + switch (next->length) { + case MISENSOR_8BIT: + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + case MISENSOR_16BIT: + data16 = (__be16 *)&ctrl->buffer.data[ctrl->index]; + *data16 = cpu_to_be16((u16)next->val); + break; + case MISENSOR_32BIT: + data32 = (__be32 *)&ctrl->buffer.data[ctrl->index]; + *data32 = cpu_to_be32(next->val); + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += next->length; + + return 0; +} + +static int +__mt9m114_write_reg_is_consecutive(struct i2c_client *client, + struct mt9m114_write_ctrl *ctrl, + const struct misensor_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +/* + * mt9m114_write_reg_array - Initializes a list of mt9m114 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * @poll: completion polling requirement + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __mt9m114_flush_reg_array, __mt9m114_buf_reg_array() and + * __mt9m114_write_reg_is_consecutive() are internal functions to + * mt9m114_write_reg_array() and should be not used anywhere else. + * + */ +static int mt9m114_write_reg_array(struct i2c_client *client, + const struct misensor_reg *reglist, + int poll) +{ + const struct misensor_reg *next = reglist; + struct mt9m114_write_ctrl ctrl; + int err; + + if (poll == PRE_POLLING) { + err = mt9m114_wait_state(client, MT9M114_WAIT_STAT_TIMEOUT); + if (err) + return err; + } + + ctrl.index = 0; + for (; next->length != MISENSOR_TOK_TERM; next++) { + switch (next->length & MISENSOR_TOK_MASK) { + case MISENSOR_TOK_DELAY: + err = __mt9m114_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + case MISENSOR_TOK_RMW: + err = __mt9m114_flush_reg_array(client, &ctrl); + err |= misensor_rmw_reg(client, + next->length & + ~MISENSOR_TOK_RMW, + next->reg, next->val, + next->val2); + if (err) { + dev_err(&client->dev, "%s read err. aborted\n", + __func__); + return -EINVAL; + } + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__mt9m114_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __mt9m114_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __mt9m114_buf_reg_array(client, &ctrl, next); + if (err) { + v4l2_err(client, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + err = __mt9m114_flush_reg_array(client, &ctrl); + if (err) + return err; + + if (poll == POST_POLLING) + return mt9m114_wait_state(client, MT9M114_WAIT_STAT_TIMEOUT); + + return 0; +} + +static int mt9m114_wait_state(struct i2c_client *client, int timeout) +{ + int ret; + unsigned int val; + + while (timeout-- > 0) { + ret = mt9m114_read_reg(client, MISENSOR_16BIT, 0x0080, &val); + if (ret) + return ret; + if ((val & 0x2) == 0) + return 0; + msleep(20); + } + + return -EINVAL; + +} + +static int mt9m114_set_suspend(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + return mt9m114_write_reg_array(client, + mt9m114_standby_reg, POST_POLLING); +} + +static int mt9m114_init_common(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + + return mt9m114_write_reg_array(client, mt9m114_common, PRE_POLLING); +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + ret = dev->platform_data->v2p8_ctrl(sd, 1); + if (ret == 0) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + if (ret) + ret = dev->platform_data->v2p8_ctrl(sd, 0); + } + } else { + ret = dev->platform_data->v2p8_ctrl(sd, 0); + ret = dev->platform_data->v1p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* Note: current modules wire only one GPIO signal (RESET#), + * but the schematic wires up two to the connector. BIOS + * versions have been unfortunately inconsistent with which + * ACPI index RESET# is on, so hit both */ + + if (flag) { + ret = dev->platform_data->gpio0_ctrl(sd, 0); + ret = dev->platform_data->gpio1_ctrl(sd, 0); + msleep(60); + ret |= dev->platform_data->gpio0_ctrl(sd, 1); + ret |= dev->platform_data->gpio1_ctrl(sd, 1); + } else { + ret = dev->platform_data->gpio0_ctrl(sd, 0); + ret = dev->platform_data->gpio1_ctrl(sd, 0); + } + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (NULL == dev->platform_data) { + dev_err(&client->dev, "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) + dev_err(&client->dev, "gpio failed 1\n"); + /* + * according to DS, 44ms is needed between power up and first i2c + * commend + */ + msleep(50); + + return 0; + +fail_clk: + dev->platform_data->flisclk_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (NULL == dev->platform_data) { + dev_err(&client->dev, "no camera_sensor_platform_data"); + return -ENODEV; + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 1\n"); + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + /*according to DS, 20ms is needed after power down*/ + msleep(20); + + return ret; +} + +static int mt9m114_s_power(struct v4l2_subdev *sd, int power) +{ + if (power == 0) + return power_down(sd); + else { + if (power_up(sd)) + return -EINVAL; + + return mt9m114_init_common(sd); + } +} + +/* + * distance - calculate the distance + * @res: resolution + * @w: width + * @h: height + * + * Get the gap between resolution and w/h. + * res->width/height smaller than w/h wouldn't be considered. + * Returns the value of gap or -1 if fail. + */ +#define LARGEST_ALLOWED_RATIO_MISMATCH 600 +static int distance(struct mt9m114_res_struct const *res, u32 w, u32 h) +{ + unsigned int w_ratio; + unsigned int h_ratio; + int match; + + if (w == 0) + return -1; + w_ratio = (res->width << 13) / w; + if (h == 0) + return -1; + h_ratio = (res->height << 13) / h; + if (h_ratio == 0) + return -1; + match = abs(((w_ratio << 13) / h_ratio) - 8192); + + if ((w_ratio < 8192) || (h_ratio < 8192) || + (match > LARGEST_ALLOWED_RATIO_MISMATCH)) + return -1; + + return w_ratio + h_ratio; +} + +/* Return the nearest higher resolution index */ +static int nearest_resolution_index(int w, int h) +{ + int i; + int idx = -1; + int dist; + int min_dist = INT_MAX; + const struct mt9m114_res_struct *tmp_res = NULL; + + for (i = 0; i < ARRAY_SIZE(mt9m114_res); i++) { + tmp_res = &mt9m114_res[i]; + dist = distance(tmp_res, w, h); + if (dist == -1) + continue; + if (dist < min_dist) { + min_dist = dist; + idx = i; + } + } + + return idx; +} + +static int mt9m114_try_res(u32 *w, u32 *h) +{ + int idx = 0; + + if ((*w > MT9M114_RES_960P_SIZE_H) + || (*h > MT9M114_RES_960P_SIZE_V)) { + *w = MT9M114_RES_960P_SIZE_H; + *h = MT9M114_RES_960P_SIZE_V; + } else { + idx = nearest_resolution_index(*w, *h); + + /* + * nearest_resolution_index() doesn't return smaller + * resolutions. If it fails, it means the requested + * resolution is higher than wecan support. Fallback + * to highest possible resolution in this case. + */ + if (idx == -1) + idx = ARRAY_SIZE(mt9m114_res) - 1; + + *w = mt9m114_res[idx].width; + *h = mt9m114_res[idx].height; + } + + return 0; +} + +static struct mt9m114_res_struct *mt9m114_to_res(u32 w, u32 h) +{ + int index; + + for (index = 0; index < N_RES; index++) { + if ((mt9m114_res[index].width == w) && + (mt9m114_res[index].height == h)) + break; + } + + /* No mode found */ + if (index >= N_RES) + return NULL; + + return &mt9m114_res[index]; +} + +static int mt9m114_res2size(struct v4l2_subdev *sd, int *h_size, int *v_size) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + unsigned short hsize; + unsigned short vsize; + + switch (dev->res) { + case MT9M114_RES_736P: + hsize = MT9M114_RES_736P_SIZE_H; + vsize = MT9M114_RES_736P_SIZE_V; + break; + case MT9M114_RES_864P: + hsize = MT9M114_RES_864P_SIZE_H; + vsize = MT9M114_RES_864P_SIZE_V; + break; + case MT9M114_RES_960P: + hsize = MT9M114_RES_960P_SIZE_H; + vsize = MT9M114_RES_960P_SIZE_V; + break; + default: + v4l2_err(sd, "%s: Resolution 0x%08x unknown\n", __func__, + dev->res); + return -EINVAL; + } + + if (h_size != NULL) + *h_size = hsize; + if (v_size != NULL) + *v_size = vsize; + + return 0; +} + +static int mt9m114_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct mt9m114_res_struct *res) +{ + struct atomisp_sensor_mode_data *buf = &info->data; + u32 reg_val; + int ret; + + if (info == NULL) + return -EINVAL; + + ret = mt9m114_read_reg(client, MISENSOR_32BIT, + REG_PIXEL_CLK, ®_val); + if (ret) + return ret; + buf->vt_pix_clk_freq_mhz = reg_val; + + /* get integration time */ + buf->coarse_integration_time_min = MT9M114_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + MT9M114_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = MT9M114_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + MT9M114_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = MT9M114_FINE_INTG_TIME_MIN; + + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_H_START, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_V_START, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_H_END, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_V_END, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_WIDTH, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_HEIGHT, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_TIMING_HTS, ®_val); + if (ret) + return ret; + buf->line_length_pck = reg_val; + + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_TIMING_VTS, ®_val); + if (ret) + return ret; + buf->frame_length_lines = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static int mt9m114_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + int width, height; + int ret; + if (format->pad) + return -EINVAL; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + + ret = mt9m114_res2size(sd, &width, &height); + if (ret) + return ret; + fmt->width = width; + fmt->height = height; + + return 0; +} + +static int mt9m114_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct i2c_client *c = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct mt9m114_res_struct *res_index; + u32 width = fmt->width; + u32 height = fmt->height; + struct camera_mipi_info *mt9m114_info = NULL; + + int ret; + if (format->pad) + return -EINVAL; + dev->streamon = 0; + dev->first_exp = MT9M114_DEFAULT_FIRST_EXP; + + mt9m114_info = v4l2_get_subdev_hostdata(sd); + if (mt9m114_info == NULL) + return -EINVAL; + + mt9m114_try_res(&width, &height); + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + cfg->try_fmt = *fmt; + return 0; + } + res_index = mt9m114_to_res(width, height); + + /* Sanity check */ + if (unlikely(!res_index)) { + WARN_ON(1); + return -EINVAL; + } + + switch (res_index->res) { + case MT9M114_RES_736P: + ret = mt9m114_write_reg_array(c, mt9m114_736P_init, NO_POLLING); + ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + break; + case MT9M114_RES_864P: + ret = mt9m114_write_reg_array(c, mt9m114_864P_init, NO_POLLING); + ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + break; + case MT9M114_RES_960P: + ret = mt9m114_write_reg_array(c, mt9m114_976P_init, NO_POLLING); + /* set sensor read_mode to Normal */ + ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + break; + default: + v4l2_err(sd, "set resolution: %d failed!\n", res_index->res); + return -EINVAL; + } + + if (ret) + return -EINVAL; + + ret = mt9m114_write_reg_array(c, mt9m114_chgstat_reg, POST_POLLING); + if (ret < 0) + return ret; + + if (mt9m114_set_suspend(sd)) + return -EINVAL; + + if (dev->res != res_index->res) { + int index; + + /* Switch to different size */ + if (width <= 640) { + dev->nctx = 0x00; /* Set for context A */ + } else { + /* + * Context B is used for resolutions larger than 640x480 + * Using YUV for Context B. + */ + dev->nctx = 0x01; /* set for context B */ + } + + /* + * Marked current sensor res as being "used" + * + * REVISIT: We don't need to use an "used" field on each mode + * list entry to know which mode is selected. If this + * information is really necessary, how about to use a single + * variable on sensor dev struct? + */ + for (index = 0; index < N_RES; index++) { + if ((width == mt9m114_res[index].width) && + (height == mt9m114_res[index].height)) { + mt9m114_res[index].used = true; + continue; + } + mt9m114_res[index].used = false; + } + } + ret = mt9m114_get_intg_factor(c, mt9m114_info, + &mt9m114_res[res_index->res]); + if (ret) { + dev_err(&c->dev, "failed to get integration_factor\n"); + return -EINVAL; + } + /* + * mt9m114 - we don't poll for context switch + * because it does not happen with streaming disabled. + */ + dev->res = res_index->res; + + fmt->width = width; + fmt->height = height; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + return 0; +} + +/* TODO: Update to SOC functions, remove exposure and gain */ +static int mt9m114_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (MT9M114_FOCAL_LENGTH_NUM << 16) | MT9M114_FOCAL_LENGTH_DEM; + return 0; +} + +static int mt9m114_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for mt9m114*/ + *val = (MT9M114_F_NUMBER_DEFAULT_NUM << 16) | MT9M114_F_NUMBER_DEM; + return 0; +} + +static int mt9m114_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (MT9M114_F_NUMBER_DEFAULT_NUM << 24) | + (MT9M114_F_NUMBER_DEM << 16) | + (MT9M114_F_NUMBER_DEFAULT_NUM << 8) | MT9M114_F_NUMBER_DEM; + return 0; +} + +/* Horizontal flip the image. */ +static int mt9m114_g_hflip(struct v4l2_subdev *sd, s32 *val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int ret; + u32 data; + ret = mt9m114_read_reg(c, MISENSOR_16BIT, + (u32)MISENSOR_READ_MODE, &data); + if (ret) + return ret; + *val = !!(data & MISENSOR_HFLIP_MASK); + + return 0; +} + +static int mt9m114_g_vflip(struct v4l2_subdev *sd, s32 *val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int ret; + u32 data; + + ret = mt9m114_read_reg(c, MISENSOR_16BIT, + (u32)MISENSOR_READ_MODE, &data); + if (ret) + return ret; + *val = !!(data & MISENSOR_VFLIP_MASK); + + return 0; +} + +static long mt9m114_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + int ret = 0; + unsigned int coarse_integration = 0; + unsigned int FLines = 0; + unsigned int FrameLengthLines = 0; /* ExposureTime.FrameLengthLines; */ + unsigned int AnalogGain, DigitalGain; + u32 AnalogGainToWrite = 0; + + dev_dbg(&client->dev, "%s(0x%X 0x%X 0x%X)\n", __func__, + exposure->integration_time[0], exposure->gain[0], + exposure->gain[1]); + + coarse_integration = exposure->integration_time[0]; + /* fine_integration = ExposureTime.FineIntegrationTime; */ + /* FrameLengthLines = ExposureTime.FrameLengthLines; */ + FLines = mt9m114_res[dev->res].lines_per_frame; + AnalogGain = exposure->gain[0]; + DigitalGain = exposure->gain[1]; + if (!dev->streamon) { + /*Save the first exposure values while stream is off*/ + dev->first_exp = coarse_integration; + dev->first_gain = AnalogGain; + dev->first_diggain = DigitalGain; + } + /* DigitalGain = 0x400 * (((u16) DigitalGain) >> 8) + + ((unsigned int)(0x400 * (((u16) DigitalGain) & 0xFF)) >>8); */ + + /* set frame length */ + if (FLines < coarse_integration + 6) + FLines = coarse_integration + 6; + if (FLines < FrameLengthLines) + FLines = FrameLengthLines; + ret = mt9m114_write_reg(client, MISENSOR_16BIT, 0x300A, FLines); + if (ret) { + v4l2_err(client, "%s: fail to set FLines\n", __func__); + return -EINVAL; + } + + /* set coarse integration */ + /* 3A provide real exposure time. + should not translate to any value here. */ + ret = mt9m114_write_reg(client, MISENSOR_16BIT, + REG_EXPO_COARSE, (u16)(coarse_integration)); + if (ret) { + v4l2_err(client, "%s: fail to set exposure time\n", __func__); + return -EINVAL; + } + + /* + // set analog/digital gain + switch(AnalogGain) + { + case 0: + AnalogGainToWrite = 0x0; + break; + case 1: + AnalogGainToWrite = 0x20; + break; + case 2: + AnalogGainToWrite = 0x60; + break; + case 4: + AnalogGainToWrite = 0xA0; + break; + case 8: + AnalogGainToWrite = 0xE0; + break; + default: + AnalogGainToWrite = 0x20; + break; + } + */ + if (DigitalGain >= 16 || DigitalGain <= 1) + DigitalGain = 1; + /* AnalogGainToWrite = + (u16)((DigitalGain << 12) | AnalogGainToWrite); */ + AnalogGainToWrite = (u16)((DigitalGain << 12) | (u16)AnalogGain); + ret = mt9m114_write_reg(client, MISENSOR_16BIT, + REG_GAIN, AnalogGainToWrite); + if (ret) { + v4l2_err(client, "%s: fail to set AnalogGainToWrite\n", + __func__); + return -EINVAL; + } + + return ret; +} + +static long mt9m114_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return mt9m114_s_exposure(sd, arg); + default: + return -EINVAL; + } + + return 0; +} + +/* This returns the exposure time being used. This should only be used + for filling in EXIF data, not for actual image processing. */ +static int mt9m114_g_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u32 coarse; + int ret; + + /* the fine integration time is currently not calculated */ + ret = mt9m114_read_reg(client, MISENSOR_16BIT, + REG_EXPO_COARSE, &coarse); + if (ret) + return ret; + + *value = coarse; + return 0; +} +#ifndef CSS15 +/* + * This function will return the sensor supported max exposure zone number. + * the sensor which supports max exposure zone number is 1. + */ +static int mt9m114_g_exposure_zone_num(struct v4l2_subdev *sd, s32 *val) +{ + *val = 1; + + return 0; +} + +/* + * set exposure metering, average/center_weighted/spot/matrix. + */ +static int mt9m114_s_exposure_metering(struct v4l2_subdev *sd, s32 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + switch (val) { + case V4L2_EXPOSURE_METERING_SPOT: + ret = mt9m114_write_reg_array(client, mt9m114_exp_average, + NO_POLLING); + if (ret) { + dev_err(&client->dev, "write exp_average reg err.\n"); + return ret; + } + break; + case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED: + default: + ret = mt9m114_write_reg_array(client, mt9m114_exp_center, + NO_POLLING); + if (ret) { + dev_err(&client->dev, "write exp_default reg err"); + return ret; + } + } + + return 0; +} + +/* + * This function is for touch exposure feature. + */ +static int mt9m114_s_exposure_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct misensor_reg exp_reg; + int width, height; + int grid_width, grid_height; + int grid_left, grid_top, grid_right, grid_bottom; + int win_left, win_top, win_right, win_bottom; + int i, j; + int ret; + + if (sel->which != V4L2_SUBDEV_FORMAT_TRY && + sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) + return -EINVAL; + + grid_left = sel->r.left; + grid_top = sel->r.top; + grid_right = sel->r.left + sel->r.width - 1; + grid_bottom = sel->r.top + sel->r.height - 1; + + ret = mt9m114_res2size(sd, &width, &height); + if (ret) + return ret; + + grid_width = width / 5; + grid_height = height / 5; + + if (grid_width && grid_height) { + win_left = grid_left / grid_width; + win_top = grid_top / grid_height; + win_right = grid_right / grid_width; + win_bottom = grid_bottom / grid_height; + } else { + dev_err(&client->dev, "Incorrect exp grid.\n"); + return -EINVAL; + } + + win_left = clamp_t(int, win_left, 0, 4); + win_top = clamp_t(int, win_top, 0, 4); + win_right = clamp_t(int, win_right, 0, 4); + win_bottom = clamp_t(int, win_bottom, 0, 4); + + ret = mt9m114_write_reg_array(client, mt9m114_exp_average, NO_POLLING); + if (ret) { + dev_err(&client->dev, "write exp_average reg err.\n"); + return ret; + } + + for (i = win_top; i <= win_bottom; i++) { + for (j = win_left; j <= win_right; j++) { + exp_reg = mt9m114_exp_win[i][j]; + + ret = mt9m114_write_reg(client, exp_reg.length, + exp_reg.reg, exp_reg.val); + if (ret) { + dev_err(&client->dev, "write exp_reg err.\n"); + return ret; + } + } + } + + return 0; +} +#endif + +static int mt9m114_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + *val = mt9m114_res[dev->res].bin_factor_x; + + return 0; +} + +static int mt9m114_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + *val = mt9m114_res[dev->res].bin_factor_y; + + return 0; +} + +static int mt9m114_s_ev(struct v4l2_subdev *sd, s32 val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + s32 luma = 0x37; + int err; + + /* EV value only support -2 to 2 + * 0: 0x37, 1:0x47, 2:0x57, -1:0x27, -2:0x17 + */ + if (val < -2 || val > 2) + return -EINVAL; + luma += 0x10 * val; + dev_dbg(&c->dev, "%s val:%d luma:0x%x\n", __func__, val, luma); + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC87A); + if (err) { + dev_err(&c->dev, "%s logic addr access error\n", __func__); + return err; + } + err = mt9m114_write_reg(c, MISENSOR_8BIT, 0xC87A, (u32)luma); + if (err) { + dev_err(&c->dev, "%s write target_average_luma failed\n", + __func__); + return err; + } + udelay(10); + + return 0; +} + +static int mt9m114_g_ev(struct v4l2_subdev *sd, s32 *val) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int err; + u32 luma; + + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC87A); + if (err) { + dev_err(&c->dev, "%s logic addr access error\n", __func__); + return err; + } + err = mt9m114_read_reg(c, MISENSOR_8BIT, 0xC87A, &luma); + if (err) { + dev_err(&c->dev, "%s read target_average_luma failed\n", + __func__); + return err; + } + luma -= 0x17; + luma /= 0x10; + *val = (s32)luma - 2; + dev_dbg(&c->dev, "%s val:%d\n", __func__, *val); + + return 0; +} + +/* Fake interface + * mt9m114 now can not support 3a_lock +*/ +static int mt9m114_s_3a_lock(struct v4l2_subdev *sd, s32 val) +{ + aaalock = val; + return 0; +} + +static int mt9m114_g_3a_lock(struct v4l2_subdev *sd, s32 *val) +{ + if (aaalock) + return V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE + | V4L2_LOCK_FOCUS; + return 0; +} + +static int mt9m114_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct mt9m114_device *dev = + container_of(ctrl->handler, struct mt9m114_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + dev_dbg(&client->dev, "%s: CID_VFLIP:%d.\n", + __func__, ctrl->val); + ret = mt9m114_t_vflip(&dev->sd, ctrl->val); + break; + case V4L2_CID_HFLIP: + dev_dbg(&client->dev, "%s: CID_HFLIP:%d.\n", + __func__, ctrl->val); + ret = mt9m114_t_hflip(&dev->sd, ctrl->val); + break; +#ifndef CSS15 + case V4L2_CID_EXPOSURE_METERING: + ret = mt9m114_s_exposure_metering(&dev->sd, ctrl->val); + break; +#endif + case V4L2_CID_EXPOSURE: + ret = mt9m114_s_ev(&dev->sd, ctrl->val); + break; + case V4L2_CID_3A_LOCK: + ret = mt9m114_s_3a_lock(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int mt9m114_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct mt9m114_device *dev = + container_of(ctrl->handler, struct mt9m114_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + ret = mt9m114_g_vflip(&dev->sd, &ctrl->val); + break; + case V4L2_CID_HFLIP: + ret = mt9m114_g_hflip(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = mt9m114_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = mt9m114_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = mt9m114_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = mt9m114_g_exposure(&dev->sd, &ctrl->val); + break; +#ifndef CSS15 + case V4L2_CID_EXPOSURE_ZONE_NUM: + ret = mt9m114_g_exposure_zone_num(&dev->sd, &ctrl->val); + break; +#endif + case V4L2_CID_BIN_FACTOR_HORZ: + ret = mt9m114_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = mt9m114_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + case V4L2_CID_EXPOSURE: + ret = mt9m114_g_ev(&dev->sd, &ctrl->val); + break; + case V4L2_CID_3A_LOCK: + ret = mt9m114_g_3a_lock(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = mt9m114_s_ctrl, + .g_volatile_ctrl = mt9m114_g_volatile_ctrl +}; + +static struct v4l2_ctrl_config mt9m114_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .name = "Image v-Flip", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .name = "Image h-Flip", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .name = "focal length", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_FOCAL_LENGTH_DEFAULT, + .max = MT9M114_FOCAL_LENGTH_DEFAULT, + .step = 1, + .def = MT9M114_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .name = "f-number", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_F_NUMBER_DEFAULT, + .max = MT9M114_F_NUMBER_DEFAULT, + .step = 1, + .def = MT9M114_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .name = "f-number range", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_F_NUMBER_RANGE, + .max = MT9M114_F_NUMBER_RANGE, + .step = 1, + .def = MT9M114_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .name = "exposure", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 0xffff, + .step = 1, + .def = 0, + .flags = 0, + }, +#ifndef CSS15 + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ZONE_NUM, + .name = "one-time exposure zone number", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 0xffff, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_METERING, + .name = "metering", + .type = V4L2_CTRL_TYPE_MENU, + .min = 0, + .max = 3, + .step = 0, + .def = 1, + .flags = 0, + }, +#endif + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .name = "horizontal binning factor", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = MT9M114_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .name = "vertical binning factor", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = MT9M114_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE, + .name = "exposure biasx", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = -2, + .max = 2, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_3A_LOCK, + .name = "3a lock", + .type = V4L2_CTRL_TYPE_BITMASK, + .min = 0, + .max = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE | V4L2_LOCK_FOCUS, + .step = 1, + .def = 0, + .flags = 0, + }, +}; + +static int mt9m114_detect(struct mt9m114_device *dev, struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u32 retvalue; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { + dev_err(&client->dev, "%s: i2c error", __func__); + return -ENODEV; + } + mt9m114_read_reg(client, MISENSOR_16BIT, (u32)MT9M114_PID, &retvalue); + dev->real_model_id = retvalue; + + if (retvalue != MT9M114_MOD_ID) { + dev_err(&client->dev, "%s: failed: client->addr = %x\n", + __func__, client->addr); + return -ENODEV; + } + + return 0; +} + +static int +mt9m114_s_config(struct v4l2_subdev *sd, int irq, void *platform_data) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (NULL == platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + ret = power_up(sd); + if (ret) { + v4l2_err(client, "mt9m114 power-up err"); + return ret; + } + + /* config & detect sensor */ + ret = mt9m114_detect(dev, client); + if (ret) { + v4l2_err(client, "mt9m114_detect err s_config.\n"); + goto fail_detect; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + ret = mt9m114_set_suspend(sd); + if (ret) { + v4l2_err(client, "mt9m114 suspend err"); + return ret; + } + + ret = power_down(sd); + if (ret) { + v4l2_err(client, "mt9m114 power down err"); + return ret; + } + + return ret; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_detect: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); + return ret; +} + +/* Horizontal flip the image. */ +static int mt9m114_t_hflip(struct v4l2_subdev *sd, int value) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + int err; + /* set for direct mode */ + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC850); + if (value) { + /* enable H flip ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x01, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x01, 0x01); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x01, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x01, 0x01); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_HFLIP_MASK, MISENSOR_FLIP_EN); + + dev->bpat = MT9M114_BPAT_GRGRBGBG; + } else { + /* disable H flip ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x01, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x01, 0x00); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x01, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x01, 0x00); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_HFLIP_MASK, MISENSOR_FLIP_DIS); + + dev->bpat = MT9M114_BPAT_BGBGGRGR; + } + + err += mt9m114_write_reg(c, MISENSOR_8BIT, 0x8404, 0x06); + udelay(10); + + return !!err; +} + +/* Vertically flip the image */ +static int mt9m114_t_vflip(struct v4l2_subdev *sd, int value) +{ + struct i2c_client *c = v4l2_get_subdevdata(sd); + int err; + /* set for direct mode */ + err = mt9m114_write_reg(c, MISENSOR_16BIT, 0x098E, 0xC850); + if (value >= 1) { + /* enable H flip - ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x02, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x02, 0x01); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x02, 0x01); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x02, 0x01); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_VFLIP_MASK, MISENSOR_FLIP_EN); + } else { + /* disable H flip - ctx A */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC850, 0x02, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC851, 0x02, 0x00); + /* ctx B */ + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC888, 0x02, 0x00); + err += misensor_rmw_reg(c, MISENSOR_8BIT, 0xC889, 0x02, 0x00); + + err += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, + MISENSOR_VFLIP_MASK, MISENSOR_FLIP_DIS); + } + + err += mt9m114_write_reg(c, MISENSOR_8BIT, 0x8404, 0x06); + udelay(10); + + return !!err; +} + +static int mt9m114_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = mt9m114_res[dev->res].fps; + + return 0; +} + +static int mt9m114_s_stream(struct v4l2_subdev *sd, int enable) +{ + int ret; + struct i2c_client *c = v4l2_get_subdevdata(sd); + struct mt9m114_device *dev = to_mt9m114_sensor(sd); + struct atomisp_exposure exposure; + + if (enable) { + ret = mt9m114_write_reg_array(c, mt9m114_chgstat_reg, + POST_POLLING); + if (ret < 0) + return ret; + + if (dev->first_exp > MT9M114_MAX_FIRST_EXP) { + exposure.integration_time[0] = dev->first_exp; + exposure.gain[0] = dev->first_gain; + exposure.gain[1] = dev->first_diggain; + mt9m114_s_exposure(sd, &exposure); + } + dev->streamon = 1; + + } else { + dev->streamon = 0; + ret = mt9m114_set_suspend(sd); + } + + return ret; +} + +static int mt9m114_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index) + return -EINVAL; + code->code = MEDIA_BUS_FMT_SGRBG10_1X10; + + return 0; +} + +static int mt9m114_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + + unsigned int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = mt9m114_res[index].width; + fse->min_height = mt9m114_res[index].height; + fse->max_width = mt9m114_res[index].width; + fse->max_height = mt9m114_res[index].height; + + return 0; +} + +static int mt9m114_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + int index; + struct mt9m114_device *snr = to_mt9m114_sensor(sd); + + if (frames == NULL) + return -EINVAL; + + for (index = 0; index < N_RES; index++) { + if (mt9m114_res[index].res == snr->res) + break; + } + + if (index >= N_RES) + return -EINVAL; + + *frames = mt9m114_res[index].skip_frames; + + return 0; +} + +static const struct v4l2_subdev_video_ops mt9m114_video_ops = { + .s_stream = mt9m114_s_stream, + .g_frame_interval = mt9m114_g_frame_interval, +}; + +static const struct v4l2_subdev_sensor_ops mt9m114_sensor_ops = { + .g_skip_frames = mt9m114_g_skip_frames, +}; + +static const struct v4l2_subdev_core_ops mt9m114_core_ops = { + .s_power = mt9m114_s_power, + .ioctl = mt9m114_ioctl, +}; + +/* REVISIT: Do we need pad operations? */ +static const struct v4l2_subdev_pad_ops mt9m114_pad_ops = { + .enum_mbus_code = mt9m114_enum_mbus_code, + .enum_frame_size = mt9m114_enum_frame_size, + .get_fmt = mt9m114_get_fmt, + .set_fmt = mt9m114_set_fmt, +#ifndef CSS15 + .set_selection = mt9m114_s_exposure_selection, +#endif +}; + +static const struct v4l2_subdev_ops mt9m114_ops = { + .core = &mt9m114_core_ops, + .video = &mt9m114_video_ops, + .pad = &mt9m114_pad_ops, + .sensor = &mt9m114_sensor_ops, +}; + +static int mt9m114_remove(struct i2c_client *client) +{ + struct mt9m114_device *dev; + struct v4l2_subdev *sd = i2c_get_clientdata(client); + + dev = container_of(sd, struct mt9m114_device, sd); + dev->platform_data->csi_cfg(sd, 0); + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); + return 0; +} + +static int mt9m114_probe(struct i2c_client *client) +{ + struct mt9m114_device *dev; + int ret = 0; + unsigned int i; + void *pdata; + + /* Setup sensor configuration structure */ + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + v4l2_i2c_subdev_init(&dev->sd, client, &mt9m114_ops); + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_grbg); + if (pdata) + ret = mt9m114_s_config(&dev->sd, client->irq, pdata); + if (!pdata || ret) { + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; + } + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) { + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + /* Coverity CID 298095 - return on error */ + return ret; + } + + /*TODO add format code here*/ + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SGRBG10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(mt9m114_controls)); + if (ret) { + mt9m114_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(mt9m114_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &mt9m114_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + mt9m114_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + /* REVISIT: Do we need media controller? */ + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) { + mt9m114_remove(client); + return ret; + } + return 0; +} + +static const struct acpi_device_id mt9m114_acpi_match[] = { + { "INT33F0" }, + { "CRMT1040" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, mt9m114_acpi_match); + +static struct i2c_driver mt9m114_driver = { + .driver = { + .name = "mt9m114", + .acpi_match_table = mt9m114_acpi_match, + }, + .probe_new = mt9m114_probe, + .remove = mt9m114_remove, +}; +module_i2c_driver(mt9m114_driver); + +MODULE_AUTHOR("Shuguang Gong "); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c new file mode 100644 index 0000000000000..bba3d17459084 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -0,0 +1,1470 @@ +/* + * Support for OmniVision OV2680 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../include/linux/atomisp_gmin_platform.h" + +#include "ov2680.h" + +static int h_flag = 0; +static int v_flag = 0; +static enum atomisp_bayer_order ov2680_bayer_order_mapping[] = { + atomisp_bayer_order_bggr, + atomisp_bayer_order_grbg, + atomisp_bayer_order_gbrg, + atomisp_bayer_order_rggb, +}; + +/* i2c read/write stuff */ +static int ov2680_read_reg(struct i2c_client *client, + u16 data_length, u16 reg, u16 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[6]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != OV2680_8BIT && data_length != OV2680_16BIT + && data_length != OV2680_32BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0 , sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = I2C_MSG_LENGTH; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg >> 8); + data[1] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == OV2680_8BIT) + *val = (u8)data[0]; + else if (data_length == OV2680_16BIT) + *val = be16_to_cpu(*(__be16 *)&data[0]); + else + *val = be32_to_cpu(*(__be32 *)&data[0]); + //dev_dbg(&client->dev, "++++i2c read adr%x = %x\n", reg,*val); + return 0; +} + +static int ov2680_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + //dev_dbg(&client->dev, "+++i2c write reg=%x->%x\n", data[0]*256 +data[1],data[2]); + return ret == num_msg ? 0 : -EIO; +} + +static int ov2680_write_reg(struct i2c_client *client, u16 data_length, + u16 reg, u16 val) +{ + int ret; + unsigned char data[4] = {0}; + __be16 *wreg = (void *)data; + const u16 len = data_length + sizeof(u16); /* 16-bit address + data */ + + if (data_length != OV2680_8BIT && data_length != OV2680_16BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + *wreg = cpu_to_be16(reg); + + if (data_length == OV2680_8BIT) { + data[2] = (u8)(val); + } else { + /* OV2680_16BIT */ + __be16 *wdata = (void *)&data[2]; + + *wdata = cpu_to_be16(val); + } + + ret = ov2680_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +/* + * ov2680_write_reg_array - Initializes a list of OV2680 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __ov2680_flush_reg_array, __ov2680_buf_reg_array() and + * __ov2680_write_reg_is_consecutive() are internal functions to + * ov2680_write_reg_array_fast() and should be not used anywhere else. + * + */ + +static int __ov2680_flush_reg_array(struct i2c_client *client, + struct ov2680_write_ctrl *ctrl) +{ + u16 size; + __be16 *data16 = (void *)&ctrl->buffer.addr; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u16) + ctrl->index; /* 16-bit address + data */ + *data16 = cpu_to_be16(ctrl->buffer.addr); + ctrl->index = 0; + + return ov2680_i2c_write(client, size, (u8 *)&ctrl->buffer); +} + +static int __ov2680_buf_reg_array(struct i2c_client *client, + struct ov2680_write_ctrl *ctrl, + const struct ov2680_reg *next) +{ + int size; + __be16 *data16; + + switch (next->type) { + case OV2680_8BIT: + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + case OV2680_16BIT: + size = 2; + data16 = (void *)&ctrl->buffer.data[ctrl->index]; + *data16 = cpu_to_be16((u16)next->val); + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u16) >= OV2680_MAX_WRITE_BUF_SIZE) + return __ov2680_flush_reg_array(client, ctrl); + + return 0; +} + +static int __ov2680_write_reg_is_consecutive(struct i2c_client *client, + struct ov2680_write_ctrl *ctrl, + const struct ov2680_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int ov2680_write_reg_array(struct i2c_client *client, + const struct ov2680_reg *reglist) +{ + const struct ov2680_reg *next = reglist; + struct ov2680_write_ctrl ctrl; + int err; + dev_dbg(&client->dev, "++++write reg array\n"); + ctrl.index = 0; + for (; next->type != OV2680_TOK_TERM; next++) { + switch (next->type & OV2680_TOK_MASK) { + case OV2680_TOK_DELAY: + err = __ov2680_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg,next->val); + if (!__ov2680_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __ov2680_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __ov2680_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __ov2680_flush_reg_array(client, &ctrl); +} +static int ov2680_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + + *val = (OV2680_FOCAL_LENGTH_NUM << 16) | OV2680_FOCAL_LENGTH_DEM; + return 0; +} + +static int ov2680_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for ov2680*/ + + *val = (OV2680_F_NUMBER_DEFAULT_NUM << 16) | OV2680_F_NUMBER_DEM; + return 0; +} + +static int ov2680_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV2680_F_NUMBER_DEFAULT_NUM << 24) | + (OV2680_F_NUMBER_DEM << 16) | + (OV2680_F_NUMBER_DEFAULT_NUM << 8) | OV2680_F_NUMBER_DEM; + return 0; +} + +static int ov2680_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + dev_dbg(&client->dev, "++++ov2680_g_bin_factor_x\n"); + *val = ov2680_res[dev->fmt_idx].bin_factor_x; + + return 0; +} + +static int ov2680_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + + *val = ov2680_res[dev->fmt_idx].bin_factor_y; + dev_dbg(&client->dev, "++++ov2680_g_bin_factor_y\n"); + return 0; +} + + +static int ov2680_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct ov2680_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct atomisp_sensor_mode_data *buf = &info->data; + unsigned int pix_clk_freq_hz; + u16 reg_val; + int ret; + dev_dbg(&client->dev, "++++ov2680_get_intg_factor\n"); + if (!info) + return -EINVAL; + + /* pixel clock */ + pix_clk_freq_hz = res->pix_clk_freq * 1000000; + + dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + + /* get integration time */ + buf->coarse_integration_time_min = OV2680_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + OV2680_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = OV2680_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + OV2680_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = OV2680_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = ov2680_read_reg(client, OV2680_16BIT, + OV2680_HORIZONTAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = ov2680_read_reg(client, OV2680_16BIT, + OV2680_VERTICAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = ov2680_read_reg(client, OV2680_16BIT, + OV2680_HORIZONTAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = ov2680_read_reg(client, OV2680_16BIT, + OV2680_VERTICAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = ov2680_read_reg(client, OV2680_16BIT, + OV2680_HORIZONTAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = ov2680_read_reg(client, OV2680_16BIT, + OV2680_VERTICAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + (res->bin_factor_x * 2) : 1; + buf->binning_factor_y = res->bin_factor_y ? + (res->bin_factor_y * 2) : 1; + return 0; +} + +static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2680_device *dev = to_ov2680_sensor(sd); + u16 vts; + int ret,exp_val; + + dev_dbg(&client->dev, + "+++++++__ov2680_set_exposure coarse_itg %d, gain %d, digitgain %d++\n", + coarse_itg, gain, digitgain); + + vts = ov2680_res[dev->fmt_idx].lines_per_frame; + + /* group hold */ + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_GROUP_ACCESS, 0x00); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_GROUP_ACCESS); + return ret; + } + + /* Increase the VTS to match exposure + MARGIN */ + if (coarse_itg > vts - OV2680_INTEGRATION_TIME_MARGIN) + vts = (u16) coarse_itg + OV2680_INTEGRATION_TIME_MARGIN; + + ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_TIMING_VTS_H, vts); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_TIMING_VTS_H); + return ret; + } + + /* set exposure */ + + /* Lower four bit should be 0*/ + exp_val = coarse_itg << 4; + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_EXPOSURE_L, exp_val & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_EXPOSURE_L); + return ret; + } + + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_EXPOSURE_M, (exp_val >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_EXPOSURE_M); + return ret; + } + + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_EXPOSURE_H, (exp_val >> 16) & 0x0F); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_EXPOSURE_H); + return ret; + } + + /* Analog gain */ + ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_AGC_H, gain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_AGC_H); + return ret; + } + /* Digital gain */ + if (digitgain) { + ret = ov2680_write_reg(client, OV2680_16BIT, + OV2680_MWB_RED_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_MWB_RED_GAIN_H); + return ret; + } + + ret = ov2680_write_reg(client, OV2680_16BIT, + OV2680_MWB_GREEN_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_MWB_RED_GAIN_H); + return ret; + } + + ret = ov2680_write_reg(client, OV2680_16BIT, + OV2680_MWB_BLUE_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV2680_MWB_RED_GAIN_H); + return ret; + } + } + + /* End group */ + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_GROUP_ACCESS, 0x10); + if (ret) + return ret; + + /* Delay launch group */ + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_GROUP_ACCESS, 0xa0); + if (ret) + return ret; + return ret; +} + +static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __ov2680_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long ov2680_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + u16 coarse_itg = exposure->integration_time[0]; + u16 analog_gain = exposure->gain[0]; + u16 digital_gain = exposure->gain[1]; + + /* we should not accept the invalid value below */ + if (analog_gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + // EXPOSURE CONTROL DISABLED FOR INITIAL CHECKIN, TUNING DOESN'T WORK + return ov2680_set_exposure(sd, coarse_itg, analog_gain, digital_gain); +} + + + + + +static long ov2680_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return ov2680_s_exposure(sd, arg); + + default: + return -EINVAL; + } + return 0; +} + +/* This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int ov2680_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 reg_v, reg_v2; + int ret; + + /* get exposure */ + ret = ov2680_read_reg(client, OV2680_8BIT, + OV2680_EXPOSURE_L, + ®_v); + if (ret) + goto err; + + ret = ov2680_read_reg(client, OV2680_8BIT, + OV2680_EXPOSURE_M, + ®_v2); + if (ret) + goto err; + + reg_v += reg_v2 << 8; + ret = ov2680_read_reg(client, OV2680_8BIT, + OV2680_EXPOSURE_H, + ®_v2); + if (ret) + goto err; + + *value = reg_v + (((u32)reg_v2 << 16)); +err: + return ret; +} + +static u32 ov2680_translate_bayer_order(enum atomisp_bayer_order code) +{ + switch (code) { + case atomisp_bayer_order_rggb: + return MEDIA_BUS_FMT_SRGGB10_1X10; + case atomisp_bayer_order_grbg: + return MEDIA_BUS_FMT_SGRBG10_1X10; + case atomisp_bayer_order_bggr: + return MEDIA_BUS_FMT_SBGGR10_1X10; + case atomisp_bayer_order_gbrg: + return MEDIA_BUS_FMT_SGBRG10_1X10; + } + return 0; +} + +static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct camera_mipi_info *ov2680_info = NULL; + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u16 val; + u8 index; + dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); + ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_FLIP_REG, &val); + if (ret) + return ret; + if (value) { + val |= OV2680_FLIP_MIRROR_BIT_ENABLE; + } else { + val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; + } + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_FLIP_REG, val); + if (ret) + return ret; + index = (v_flag>0?OV2680_FLIP_BIT:0) | (h_flag>0?OV2680_MIRROR_BIT:0); + ov2680_info = v4l2_get_subdev_hostdata(sd); + if (ov2680_info) { + ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; + dev->format.code = ov2680_translate_bayer_order( + ov2680_info->raw_bayer_order); + } + return ret; +} + +static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct camera_mipi_info *ov2680_info = NULL; + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + u16 val; + u8 index; + dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); + + ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_MIRROR_REG, &val); + if (ret) + return ret; + if (value) { + val |= OV2680_FLIP_MIRROR_BIT_ENABLE; + } else { + val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; + } + ret = ov2680_write_reg(client, OV2680_8BIT, + OV2680_MIRROR_REG, val); + if (ret) + return ret; + index = (v_flag>0?OV2680_FLIP_BIT:0) | (h_flag>0?OV2680_MIRROR_BIT:0); + ov2680_info = v4l2_get_subdev_hostdata(sd); + if (ov2680_info) { + ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; + dev->format.code = ov2680_translate_bayer_order( + ov2680_info->raw_bayer_order); + } + return ret; +} + +static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2680_device *dev = + container_of(ctrl->handler, struct ov2680_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_VFLIP: + dev_dbg(&client->dev, "%s: CID_VFLIP:%d.\n", + __func__, ctrl->val); + ret = ov2680_v_flip(&dev->sd, ctrl->val); + break; + case V4L2_CID_HFLIP: + dev_dbg(&client->dev, "%s: CID_HFLIP:%d.\n", + __func__, ctrl->val); + ret = ov2680_h_flip(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int ov2680_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2680_device *dev = + container_of(ctrl->handler, struct ov2680_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = ov2680_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = ov2680_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = ov2680_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = ov2680_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_HORZ: + ret = ov2680_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = ov2680_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = ov2680_s_ctrl, + .g_volatile_ctrl = ov2680_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config ov2680_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV2680_FOCAL_LENGTH_DEFAULT, + .max = OV2680_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV2680_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV2680_F_NUMBER_DEFAULT, + .max = OV2680_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV2680_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV2680_F_NUMBER_RANGE, + .max = OV2680_F_NUMBER_RANGE, + .step = 0x01, + .def = OV2680_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = OV2680_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = OV2680_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flip", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Mirror", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, +}; + +static int ov2680_init_registers(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_SW_RESET, 0x01); + ret |= ov2680_write_reg_array(client, ov2680_global_setting); + + return ret; +} + +static int ov2680_init(struct v4l2_subdev *sd) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + + int ret; + + mutex_lock(&dev->input_lock); + + /* restore settings */ + ov2680_res = ov2680_res_preview; + N_RES = N_RES_PREVIEW; + + ret = ov2680_init_registers(sd); + + mutex_unlock(&dev->input_lock); + + return ret; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = 0; + struct ov2680_device *dev = to_ov2680_sensor(sd); + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + ret |= dev->platform_data->v1p8_ctrl(sd, 1); + ret |= dev->platform_data->v2p8_ctrl(sd, 1); + usleep_range(10000, 15000); + } + + if (!flag || ret) { + ret |= dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct ov2680_device *dev = to_ov2680_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* The OV2680 documents only one GPIO input (#XSHUTDN), but + * existing integrations often wire two (reset/power_down) + * because that is the way other sensors work. There is no + * way to tell how it is wired internally, so existing + * firmwares expose both and we drive them symmetrically. */ + if (flag) { + ret = dev->platform_data->gpio0_ctrl(sd, 1); + usleep_range(10000, 15000); + /* Ignore return from second gpio, it may not be there */ + dev->platform_data->gpio1_ctrl(sd, 1); + usleep_range(10000, 15000); + } else { + dev->platform_data->gpio1_ctrl(sd, 0); + ret = dev->platform_data->gpio0_ctrl(sd, 0); + } + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + usleep_range(5000, 6000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_power; + } + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* according to DS, 20ms is needed between PWDN and i2c access */ + msleep(20); + + return 0; + +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + h_flag = 0; + v_flag = 0; + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int ov2680_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + + if (on == 0){ + ret = power_down(sd); + } else { + ret = power_up(sd); + if (!ret) + return ov2680_init(sd); + } + return ret; +} + +/* + * distance - calculate the distance + * @res: resolution + * @w: width + * @h: height + * + * Get the gap between resolution and w/h. + * res->width/height smaller than w/h wouldn't be considered. + * Returns the value of gap or -1 if fail. + */ +#define LARGEST_ALLOWED_RATIO_MISMATCH 600 +static int distance(struct ov2680_resolution *res, u32 w, u32 h) +{ + unsigned int w_ratio = (res->width << 13) / w; + unsigned int h_ratio; + int match; + + if (h == 0) + return -1; + h_ratio = (res->height << 13) / h; + if (h_ratio == 0) + return -1; + match = abs(((w_ratio << 13) / h_ratio) - ((int)8192)); + + + if ((w_ratio < (int)8192) || (h_ratio < (int)8192) || + (match > LARGEST_ALLOWED_RATIO_MISMATCH)) + return -1; + + return w_ratio + h_ratio; +} + +/* Return the nearest higher resolution index */ +static int nearest_resolution_index(int w, int h) +{ + int i; + int idx = -1; + int dist; + int min_dist = INT_MAX; + struct ov2680_resolution *tmp_res = NULL; + + for (i = 0; i < N_RES; i++) { + tmp_res = &ov2680_res[i]; + dist = distance(tmp_res, w, h); + if (dist == -1) + continue; + if (dist < min_dist) { + min_dist = dist; + idx = i; + } + } + + return idx; +} + +static int get_resolution_index(int w, int h) +{ + int i; + + for (i = 0; i < N_RES; i++) { + if (w != ov2680_res[i].width) + continue; + if (h != ov2680_res[i].height) + continue; + + return i; + } + + return -1; +} + +static int ov2680_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *ov2680_info = NULL; + int ret = 0; + int idx = 0; + dev_dbg(&client->dev, "+++++ov2680_s_mbus_fmt+++++l\n"); + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + ov2680_info = v4l2_get_subdev_hostdata(sd); + if (!ov2680_info) + return -EINVAL; + + mutex_lock(&dev->input_lock); + idx = nearest_resolution_index(fmt->width, fmt->height); + if (idx == -1) { + /* return the largest resolution */ + fmt->width = ov2680_res[N_RES - 1].width; + fmt->height = ov2680_res[N_RES - 1].height; + } else { + fmt->width = ov2680_res[idx].width; + fmt->height = ov2680_res[idx].height; + } + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + cfg->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); + dev_dbg(&client->dev, "+++++get_resolution_index=%d+++++l\n", + dev->fmt_idx); + if (dev->fmt_idx == -1) { + dev_err(&client->dev, "get resolution fail\n"); + mutex_unlock(&dev->input_lock); + return -EINVAL; + } + v4l2_info(client, "__s_mbus_fmt i=%d, w=%d, h=%d\n", dev->fmt_idx, + fmt->width, fmt->height); + dev_dbg(&client->dev, "__s_mbus_fmt i=%d, w=%d, h=%d\n", + dev->fmt_idx, fmt->width, fmt->height); + + ret = ov2680_write_reg_array(client, ov2680_res[dev->fmt_idx].regs); + if (ret) + dev_err(&client->dev, "ov2680 write resolution register err\n"); + + ret = ov2680_get_intg_factor(client, ov2680_info, + &ov2680_res[dev->fmt_idx]); + if (ret) { + dev_err(&client->dev, "failed to get integration_factor\n"); + goto err; + } + + /*recall flip functions to avoid flip registers + * were overridden by default setting + */ + if (h_flag) + ov2680_h_flip(sd, h_flag); + if (v_flag) + ov2680_v_flip(sd, v_flag); + + v4l2_info(client, "\n%s idx %d \n", __func__, dev->fmt_idx); + + /*ret = startup(sd); + * if (ret) + * dev_err(&client->dev, "ov2680 startup err\n"); + */ +err: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2680_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2680_device *dev = to_ov2680_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = ov2680_res[dev->fmt_idx].width; + fmt->height = ov2680_res[dev->fmt_idx].height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + + return 0; +} + +static int ov2680_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u16 high, low; + int ret; + u16 id; + u8 revision; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = ov2680_read_reg(client, OV2680_8BIT, + OV2680_SC_CMMN_CHIP_ID_H, &high); + if (ret) { + dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); + return -ENODEV; + } + ret = ov2680_read_reg(client, OV2680_8BIT, + OV2680_SC_CMMN_CHIP_ID_L, &low); + id = ((((u16) high) << 8) | (u16) low); + + if (id != OV2680_ID) { + dev_err(&client->dev, "sensor ID error 0x%x\n", id); + return -ENODEV; + } + + ret = ov2680_read_reg(client, OV2680_8BIT, + OV2680_SC_CMMN_SUB_ID, &high); + revision = (u8) high & 0x0f; + + dev_info(&client->dev, "sensor_revision id = 0x%x, rev= %d\n", + id, revision); + + return 0; +} + +static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + mutex_lock(&dev->input_lock); + if(enable ) + dev_dbg(&client->dev, "ov2680_s_stream one \n"); + else + dev_dbg(&client->dev, "ov2680_s_stream off \n"); + + ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_SW_STREAM, + enable ? OV2680_START_STREAMING : + OV2680_STOP_STREAMING); +#if 0 + /* restore settings */ + ov2680_res = ov2680_res_preview; + N_RES = N_RES_PREVIEW; +#endif + + //otp valid at stream on state + //if(!dev->otp_data) + // dev->otp_data = ov2680_otp_read(sd); + + mutex_unlock(&dev->input_lock); + + return ret; +} + + +static int ov2680_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov2680 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "ov2680 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = ov2680_detect(client); + if (ret) { + dev_err(&client->dev, "ov2680_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov2680 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2680_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = ov2680_res[dev->fmt_idx].fps; + + return 0; +} + +static int ov2680_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int ov2680_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = ov2680_res[index].width; + fse->min_height = ov2680_res[index].height; + fse->max_width = ov2680_res[index].width; + fse->max_height = ov2680_res[index].height; + + return 0; + +} + +static int ov2680_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct ov2680_device *dev = to_ov2680_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = ov2680_res[dev->fmt_idx].skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_video_ops ov2680_video_ops = { + .s_stream = ov2680_s_stream, + .g_frame_interval = ov2680_g_frame_interval, +}; + +static const struct v4l2_subdev_sensor_ops ov2680_sensor_ops = { + .g_skip_frames = ov2680_g_skip_frames, +}; + +static const struct v4l2_subdev_core_ops ov2680_core_ops = { + .s_power = ov2680_s_power, + .ioctl = ov2680_ioctl, +}; + +static const struct v4l2_subdev_pad_ops ov2680_pad_ops = { + .enum_mbus_code = ov2680_enum_mbus_code, + .enum_frame_size = ov2680_enum_frame_size, + .get_fmt = ov2680_get_fmt, + .set_fmt = ov2680_set_fmt, +}; + +static const struct v4l2_subdev_ops ov2680_ops = { + .core = &ov2680_core_ops, + .video = &ov2680_video_ops, + .pad = &ov2680_pad_ops, + .sensor = &ov2680_sensor_ops, +}; + +static int ov2680_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2680_device *dev = to_ov2680_sensor(sd); + dev_dbg(&client->dev, "ov2680_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); + + return 0; +} + +static int ov2680_probe(struct i2c_client *client) +{ + struct ov2680_device *dev; + int ret; + void *pdata; + unsigned int i; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->fmt_idx = 0; + v4l2_i2c_subdev_init(&(dev->sd), client, &ov2680_ops); + + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_bggr); + if (!pdata) { + ret = -EINVAL; + goto out_free; + } + + ret = ov2680_s_config(&dev->sd, client->irq, pdata); + if (ret) + goto out_free; + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(ov2680_controls)); + if (ret) { + ov2680_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(ov2680_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &ov2680_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + ov2680_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + { + ov2680_remove(client); + dev_dbg(&client->dev, "+++ remove ov2680 \n"); + } + return ret; +out_free: + dev_dbg(&client->dev, "+++ out free \n"); + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id ov2680_acpi_match[] = { + {"XXOV2680"}, + {"OVTI2680"}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, ov2680_acpi_match); + +static struct i2c_driver ov2680_driver = { + .driver = { + .name = "ov2680", + .acpi_match_table = ov2680_acpi_match, + }, + .probe_new = ov2680_probe, + .remove = ov2680_remove, +}; +module_i2c_driver(ov2680_driver); + +MODULE_AUTHOR("Jacky Wang "); +MODULE_DESCRIPTION("A low-level driver for OmniVision 2680 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c new file mode 100644 index 0000000000000..a362eebd882f7 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -0,0 +1,1271 @@ +/* + * Support for OmniVision OV2722 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../include/linux/atomisp_gmin_platform.h" +#include +#include + +#include "ov2722.h" + +/* i2c read/write stuff */ +static int ov2722_read_reg(struct i2c_client *client, + u16 data_length, u16 reg, u16 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[6]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != OV2722_8BIT && data_length != OV2722_16BIT + && data_length != OV2722_32BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0 , sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = I2C_MSG_LENGTH; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg >> 8); + data[1] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == OV2722_8BIT) + *val = (u8)data[0]; + else if (data_length == OV2722_16BIT) + *val = be16_to_cpu(*(__be16 *)&data[0]); + else + *val = be32_to_cpu(*(__be32 *)&data[0]); + + return 0; +} + +static int ov2722_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int ov2722_write_reg(struct i2c_client *client, u16 data_length, + u16 reg, u16 val) +{ + int ret; + unsigned char data[4] = {0}; + __be16 *wreg = (__be16 *)data; + const u16 len = data_length + sizeof(u16); /* 16-bit address + data */ + + if (data_length != OV2722_8BIT && data_length != OV2722_16BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + *wreg = cpu_to_be16(reg); + + if (data_length == OV2722_8BIT) { + data[2] = (u8)(val); + } else { + /* OV2722_16BIT */ + __be16 *wdata = (__be16 *)&data[2]; + + *wdata = cpu_to_be16(val); + } + + ret = ov2722_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +/* + * ov2722_write_reg_array - Initializes a list of OV2722 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __ov2722_flush_reg_array, __ov2722_buf_reg_array() and + * __ov2722_write_reg_is_consecutive() are internal functions to + * ov2722_write_reg_array_fast() and should be not used anywhere else. + * + */ + +static int __ov2722_flush_reg_array(struct i2c_client *client, + struct ov2722_write_ctrl *ctrl) +{ + u16 size; + __be16 *data16 = (void *)&ctrl->buffer.addr; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u16) + ctrl->index; /* 16-bit address + data */ + *data16 = cpu_to_be16(ctrl->buffer.addr); + ctrl->index = 0; + + return ov2722_i2c_write(client, size, (u8 *)&ctrl->buffer); +} + +static int __ov2722_buf_reg_array(struct i2c_client *client, + struct ov2722_write_ctrl *ctrl, + const struct ov2722_reg *next) +{ + int size; + __be16 *data16; + + switch (next->type) { + case OV2722_8BIT: + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + case OV2722_16BIT: + size = 2; + data16 = (void *)&ctrl->buffer.data[ctrl->index]; + *data16 = cpu_to_be16((u16)next->val); + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u16) >= OV2722_MAX_WRITE_BUF_SIZE) + return __ov2722_flush_reg_array(client, ctrl); + + return 0; +} + +static int __ov2722_write_reg_is_consecutive(struct i2c_client *client, + struct ov2722_write_ctrl *ctrl, + const struct ov2722_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int ov2722_write_reg_array(struct i2c_client *client, + const struct ov2722_reg *reglist) +{ + const struct ov2722_reg *next = reglist; + struct ov2722_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != OV2722_TOK_TERM; next++) { + switch (next->type & OV2722_TOK_MASK) { + case OV2722_TOK_DELAY: + err = __ov2722_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__ov2722_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __ov2722_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __ov2722_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __ov2722_flush_reg_array(client, &ctrl); +} +static int ov2722_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV2722_FOCAL_LENGTH_NUM << 16) | OV2722_FOCAL_LENGTH_DEM; + return 0; +} + +static int ov2722_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for imx*/ + *val = (OV2722_F_NUMBER_DEFAULT_NUM << 16) | OV2722_F_NUMBER_DEM; + return 0; +} + +static int ov2722_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV2722_F_NUMBER_DEFAULT_NUM << 24) | + (OV2722_F_NUMBER_DEM << 16) | + (OV2722_F_NUMBER_DEFAULT_NUM << 8) | OV2722_F_NUMBER_DEM; + return 0; +} + +static int ov2722_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct ov2722_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2722_device *dev = NULL; + struct atomisp_sensor_mode_data *buf = &info->data; + const unsigned int ext_clk_freq_hz = 19200000; + const unsigned int pll_invariant_div = 10; + unsigned int pix_clk_freq_hz; + u16 pre_pll_clk_div; + u16 pll_multiplier; + u16 op_pix_clk_div; + u16 reg_val; + int ret; + + if (!info) + return -EINVAL; + + dev = to_ov2722_sensor(sd); + + /* pixel clock calculattion */ + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_PLL_CTRL3, &pre_pll_clk_div); + if (ret) + return ret; + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_PLL_MULTIPLIER, &pll_multiplier); + if (ret) + return ret; + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_PLL_DEBUG_OPT, &op_pix_clk_div); + if (ret) + return ret; + + pre_pll_clk_div = (pre_pll_clk_div & 0x70) >> 4; + if (0 == pre_pll_clk_div) + return -EINVAL; + + pll_multiplier = pll_multiplier & 0x7f; + op_pix_clk_div = op_pix_clk_div & 0x03; + pix_clk_freq_hz = ext_clk_freq_hz / pre_pll_clk_div * pll_multiplier + * op_pix_clk_div / pll_invariant_div; + + dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + + /* get integration time */ + buf->coarse_integration_time_min = OV2722_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + OV2722_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = OV2722_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + OV2722_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = OV2722_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_H_CROP_START_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_V_CROP_START_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_H_CROP_END_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_V_CROP_END_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_H_OUTSIZE_H, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = ov2722_read_reg(client, OV2722_16BIT, + OV2722_V_OUTSIZE_H, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static long __ov2722_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov2722_device *dev = to_ov2722_sensor(sd); + u16 hts, vts; + int ret; + + dev_dbg(&client->dev, "set_exposure without group hold\n"); + + /* clear VTS_DIFF on manual mode */ + ret = ov2722_write_reg(client, OV2722_16BIT, OV2722_VTS_DIFF_H, 0); + if (ret) + return ret; + + hts = dev->pixels_per_line; + vts = dev->lines_per_frame; + + if ((coarse_itg + OV2722_COARSE_INTG_TIME_MAX_MARGIN) > vts) + vts = coarse_itg + OV2722_COARSE_INTG_TIME_MAX_MARGIN; + + coarse_itg <<= 4; + digitgain <<= 2; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_VTS_H, vts); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_HTS_H, hts); + if (ret) + return ret; + + /* set exposure */ + ret = ov2722_write_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_L, + coarse_itg & 0xff); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_AEC_PK_EXPO_H, + (coarse_itg >> 8) & 0xfff); + if (ret) + return ret; + + /* set analog gain */ + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_AGC_ADJ_H, gain); + if (ret) + return ret; + + /* set digital gain */ + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_MWB_GAIN_R_H, digitgain); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_MWB_GAIN_G_H, digitgain); + if (ret) + return ret; + + ret = ov2722_write_reg(client, OV2722_16BIT, + OV2722_MWB_GAIN_B_H, digitgain); + + return ret; +} + +static int ov2722_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __ov2722_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long ov2722_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + int exp = exposure->integration_time[0]; + int gain = exposure->gain[0]; + int digitgain = exposure->gain[1]; + + /* we should not accept the invalid value below. */ + if (gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + + return ov2722_set_exposure(sd, exp, gain, digitgain); +} + +static long ov2722_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return ov2722_s_exposure(sd, arg); + default: + return -EINVAL; + } + return 0; +} + +/* This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int ov2722_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 reg_v, reg_v2; + int ret; + + /* get exposure */ + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_L, + ®_v); + if (ret) + goto err; + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_M, + ®_v2); + if (ret) + goto err; + + reg_v += reg_v2 << 8; + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_AEC_PK_EXPO_H, + ®_v2); + if (ret) + goto err; + + *value = reg_v + (((u32)reg_v2 << 16)); +err: + return ret; +} + +static int ov2722_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2722_device *dev = + container_of(ctrl->handler, struct ov2722_device, ctrl_handler); + int ret = 0; + unsigned int val; + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = ov2722_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = ov2722_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = ov2722_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = ov2722_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_LINK_FREQ: + val = ov2722_res[dev->fmt_idx].mipi_freq; + if (val == 0) + return -EINVAL; + + ctrl->val = val * 1000; /* To Hz */ + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .g_volatile_ctrl = ov2722_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config ov2722_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV2722_FOCAL_LENGTH_DEFAULT, + .max = OV2722_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV2722_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV2722_F_NUMBER_DEFAULT, + .max = OV2722_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV2722_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV2722_F_NUMBER_RANGE, + .max = OV2722_F_NUMBER_RANGE, + .step = 0x01, + .def = OV2722_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_LINK_FREQ, + .name = "Link Frequency", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 1, + .max = 1500000 * 1000, + .step = 1, + .def = 1, + .flags = V4L2_CTRL_FLAG_VOLATILE | V4L2_CTRL_FLAG_READ_ONLY, + }, +}; + +static int ov2722_init(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + + mutex_lock(&dev->input_lock); + + /* restore settings */ + ov2722_res = ov2722_res_preview; + N_RES = N_RES_PREVIEW; + + mutex_unlock(&dev->input_lock); + + return 0; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret = -1; + struct ov2722_device *dev = to_ov2722_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + if (flag) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + if (ret == 0) { + ret = dev->platform_data->v2p8_ctrl(sd, 1); + if (ret) + dev->platform_data->v1p8_ctrl(sd, 0); + } + } else { + ret = dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + int ret = -1; + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* Note: the GPIO order is asymmetric: always RESET# + * before PWDN# when turning it on or off. + */ + ret = dev->platform_data->gpio0_ctrl(sd, flag); + /* + *ov2722 PWDN# active high when pull down,opposite to the convention + */ + ret |= dev->platform_data->gpio1_ctrl(sd, !flag); + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + usleep_range(5000, 6000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + goto fail_power; + } + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + /* according to DS, 20ms is needed between PWDN and i2c access */ + msleep(20); + + return 0; + +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int ov2722_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + if (on == 0) + return power_down(sd); + else { + ret = power_up(sd); + if (!ret) + return ov2722_init(sd); + } + return ret; +} + +/* + * distance - calculate the distance + * @res: resolution + * @w: width + * @h: height + * + * Get the gap between resolution and w/h. + * res->width/height smaller than w/h wouldn't be considered. + * Returns the value of gap or -1 if fail. + */ +#define LARGEST_ALLOWED_RATIO_MISMATCH 800 +static int distance(struct ov2722_resolution *res, u32 w, u32 h) +{ + unsigned int w_ratio = (res->width << 13) / w; + unsigned int h_ratio; + int match; + + if (h == 0) + return -1; + h_ratio = (res->height << 13) / h; + if (h_ratio == 0) + return -1; + match = abs(((w_ratio << 13) / h_ratio) - 8192); + + if ((w_ratio < 8192) || (h_ratio < 8192) || + (match > LARGEST_ALLOWED_RATIO_MISMATCH)) + return -1; + + return w_ratio + h_ratio; +} + +/* Return the nearest higher resolution index */ +static int nearest_resolution_index(int w, int h) +{ + int i; + int idx = -1; + int dist; + int min_dist = INT_MAX; + struct ov2722_resolution *tmp_res = NULL; + + for (i = 0; i < N_RES; i++) { + tmp_res = &ov2722_res[i]; + dist = distance(tmp_res, w, h); + if (dist == -1) + continue; + if (dist < min_dist) { + min_dist = dist; + idx = i; + } + } + + return idx; +} + +static int get_resolution_index(int w, int h) +{ + int i; + + for (i = 0; i < N_RES; i++) { + if (w != ov2722_res[i].width) + continue; + if (h != ov2722_res[i].height) + continue; + + return i; + } + + return -1; +} + +/* TODO: remove it. */ +static int startup(struct v4l2_subdev *sd) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + ret = ov2722_write_reg(client, OV2722_8BIT, + OV2722_SW_RESET, 0x01); + if (ret) { + dev_err(&client->dev, "ov2722 reset err.\n"); + return ret; + } + + ret = ov2722_write_reg_array(client, ov2722_res[dev->fmt_idx].regs); + if (ret) { + dev_err(&client->dev, "ov2722 write register err.\n"); + return ret; + } + + return ret; +} + +static int ov2722_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *ov2722_info = NULL; + int ret = 0; + int idx; + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + ov2722_info = v4l2_get_subdev_hostdata(sd); + if (!ov2722_info) + return -EINVAL; + + mutex_lock(&dev->input_lock); + idx = nearest_resolution_index(fmt->width, fmt->height); + if (idx == -1) { + /* return the largest resolution */ + fmt->width = ov2722_res[N_RES - 1].width; + fmt->height = ov2722_res[N_RES - 1].height; + } else { + fmt->width = ov2722_res[idx].width; + fmt->height = ov2722_res[idx].height; + } + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + cfg->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); + if (dev->fmt_idx == -1) { + dev_err(&client->dev, "get resolution fail\n"); + mutex_unlock(&dev->input_lock); + return -EINVAL; + } + + dev->pixels_per_line = ov2722_res[dev->fmt_idx].pixels_per_line; + dev->lines_per_frame = ov2722_res[dev->fmt_idx].lines_per_frame; + + ret = startup(sd); + if (ret) { + int i = 0; + dev_err(&client->dev, "ov2722 startup err, retry to power up\n"); + for (i = 0; i < OV2722_POWER_UP_RETRY_NUM; i++) { + dev_err(&client->dev, + "ov2722 retry to power up %d/%d times, result: ", + i + 1, OV2722_POWER_UP_RETRY_NUM); + power_down(sd); + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "power up failed, continue\n"); + continue; + } + ret = startup(sd); + if (ret) { + dev_err(&client->dev, " startup FAILED!\n"); + } else { + dev_err(&client->dev, " startup SUCCESS!\n"); + break; + } + } + if (ret) { + dev_err(&client->dev, "ov2722 startup err\n"); + goto err; + } + } + + ret = ov2722_get_intg_factor(client, ov2722_info, + &ov2722_res[dev->fmt_idx]); + if (ret) + dev_err(&client->dev, "failed to get integration_factor\n"); + +err: + mutex_unlock(&dev->input_lock); + return ret; +} +static int ov2722_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov2722_device *dev = to_ov2722_sensor(sd); + + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + + fmt->width = ov2722_res[dev->fmt_idx].width; + fmt->height = ov2722_res[dev->fmt_idx].height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + + return 0; +} + +static int ov2722_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u16 high, low; + int ret; + u16 id; + u8 revision; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_CHIP_ID_H, &high); + if (ret) { + dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); + return -ENODEV; + } + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_CHIP_ID_L, &low); + id = (high << 8) | low; + + if ((id != OV2722_ID) && (id != OV2720_ID)) { + dev_err(&client->dev, "sensor ID error\n"); + return -ENODEV; + } + + ret = ov2722_read_reg(client, OV2722_8BIT, + OV2722_SC_CMMN_SUB_ID, &high); + revision = (u8) high & 0x0f; + + dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); + dev_dbg(&client->dev, "detect ov2722 success\n"); + return 0; +} + +static int ov2722_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + mutex_lock(&dev->input_lock); + + ret = ov2722_write_reg(client, OV2722_8BIT, OV2722_SW_STREAM, + enable ? OV2722_START_STREAMING : + OV2722_STOP_STREAMING); + + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2722_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (!platform_data) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov2722 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "ov2722 power-up err.\n"); + goto fail_power_on; + } + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = ov2722_detect(client); + if (ret) { + dev_err(&client->dev, "ov2722_detect err s_config.\n"); + goto fail_csi_cfg; + } + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov2722 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return 0; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov2722_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = ov2722_res[dev->fmt_idx].fps; + + return 0; +} + +static int ov2722_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int ov2722_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = ov2722_res[index].width; + fse->min_height = ov2722_res[index].height; + fse->max_width = ov2722_res[index].width; + fse->max_height = ov2722_res[index].height; + + return 0; + +} + + +static int ov2722_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + struct ov2722_device *dev = to_ov2722_sensor(sd); + + mutex_lock(&dev->input_lock); + *frames = ov2722_res[dev->fmt_idx].skip_frames; + mutex_unlock(&dev->input_lock); + + return 0; +} + +static const struct v4l2_subdev_sensor_ops ov2722_sensor_ops = { + .g_skip_frames = ov2722_g_skip_frames, +}; + +static const struct v4l2_subdev_video_ops ov2722_video_ops = { + .s_stream = ov2722_s_stream, + .g_frame_interval = ov2722_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops ov2722_core_ops = { + .s_power = ov2722_s_power, + .ioctl = ov2722_ioctl, +}; + +static const struct v4l2_subdev_pad_ops ov2722_pad_ops = { + .enum_mbus_code = ov2722_enum_mbus_code, + .enum_frame_size = ov2722_enum_frame_size, + .get_fmt = ov2722_get_fmt, + .set_fmt = ov2722_set_fmt, +}; + +static const struct v4l2_subdev_ops ov2722_ops = { + .core = &ov2722_core_ops, + .video = &ov2722_video_ops, + .pad = &ov2722_pad_ops, + .sensor = &ov2722_sensor_ops, +}; + +static int ov2722_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2722_device *dev = to_ov2722_sensor(sd); + dev_dbg(&client->dev, "ov2722_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + v4l2_device_unregister_subdev(sd); + + atomisp_gmin_remove_subdev(sd); + + media_entity_cleanup(&dev->sd.entity); + kfree(dev); + + return 0; +} + +static int __ov2722_init_ctrl_handler(struct ov2722_device *dev) +{ + struct v4l2_ctrl_handler *hdl; + unsigned int i; + hdl = &dev->ctrl_handler; + v4l2_ctrl_handler_init(&dev->ctrl_handler, ARRAY_SIZE(ov2722_controls)); + for (i = 0; i < ARRAY_SIZE(ov2722_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &ov2722_controls[i], + NULL); + + dev->link_freq = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_LINK_FREQ); + + if (dev->ctrl_handler.error || !dev->link_freq) + return dev->ctrl_handler.error; + + dev->sd.ctrl_handler = hdl; + + return 0; +} + +static int ov2722_probe(struct i2c_client *client) +{ + struct ov2722_device *dev; + void *ovpdev; + int ret; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->fmt_idx = 0; + v4l2_i2c_subdev_init(&(dev->sd), client, &ov2722_ops); + + ovpdev = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_grbg); + + ret = ov2722_s_config(&dev->sd, client->irq, ovpdev); + if (ret) + goto out_free; + + ret = __ov2722_init_ctrl_handler(dev); + if (ret) + goto out_ctrl_handler_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + ov2722_remove(client); + + return atomisp_register_i2c_module(&dev->sd, ovpdev, RAW_CAMERA); + +out_ctrl_handler_free: + v4l2_ctrl_handler_free(&dev->ctrl_handler); + +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id ov2722_acpi_match[] = { + { "INT33FB" }, + {}, +}; +MODULE_DEVICE_TABLE(acpi, ov2722_acpi_match); + +static struct i2c_driver ov2722_driver = { + .driver = { + .name = "ov2722", + .acpi_match_table = ov2722_acpi_match, + }, + .probe_new = ov2722_probe, + .remove = ov2722_remove, +}; +module_i2c_driver(ov2722_driver); + +MODULE_AUTHOR("Wei Liu "); +MODULE_DESCRIPTION("A low-level driver for OmniVision 2722 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/gc0310.h b/drivers/staging/media/atomisp/i2c/gc0310.h new file mode 100644 index 0000000000000..70c252c5163c6 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/gc0310.h @@ -0,0 +1,404 @@ +/* + * Support for GalaxyCore GC0310 VGA camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __GC0310_H__ +#define __GC0310_H__ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../include/linux/atomisp_platform.h" + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 1 +#define I2C_RETRY_COUNT 5 + +#define GC0310_FOCAL_LENGTH_NUM 278 /*2.78mm*/ +#define GC0310_FOCAL_LENGTH_DEM 100 +#define GC0310_F_NUMBER_DEFAULT_NUM 26 +#define GC0310_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC0310_FOCAL_LENGTH_DEFAULT 0x1160064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC0310_F_NUMBER_DEFAULT 0x1a000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define GC0310_F_NUMBER_RANGE 0x1a0a1a0a +#define GC0310_ID 0xa310 + +#define GC0310_RESET_RELATED 0xFE +#define GC0310_REGISTER_PAGE_0 0x0 +#define GC0310_REGISTER_PAGE_3 0x3 + +#define GC0310_FINE_INTG_TIME_MIN 0 +#define GC0310_FINE_INTG_TIME_MAX_MARGIN 0 +#define GC0310_COARSE_INTG_TIME_MIN 1 +#define GC0310_COARSE_INTG_TIME_MAX_MARGIN 6 + +/* + * GC0310 System control registers + */ +#define GC0310_SW_STREAM 0x10 + +#define GC0310_SC_CMMN_CHIP_ID_H 0xf0 +#define GC0310_SC_CMMN_CHIP_ID_L 0xf1 + +#define GC0310_AEC_PK_EXPO_H 0x03 +#define GC0310_AEC_PK_EXPO_L 0x04 +#define GC0310_AGC_ADJ 0x48 +#define GC0310_DGC_ADJ 0x71 +#if 0 +#define GC0310_GROUP_ACCESS 0x3208 +#endif + +#define GC0310_H_CROP_START_H 0x09 +#define GC0310_H_CROP_START_L 0x0A +#define GC0310_V_CROP_START_H 0x0B +#define GC0310_V_CROP_START_L 0x0C +#define GC0310_H_OUTSIZE_H 0x0F +#define GC0310_H_OUTSIZE_L 0x10 +#define GC0310_V_OUTSIZE_H 0x0D +#define GC0310_V_OUTSIZE_L 0x0E +#define GC0310_H_BLANKING_H 0x05 +#define GC0310_H_BLANKING_L 0x06 +#define GC0310_V_BLANKING_H 0x07 +#define GC0310_V_BLANKING_L 0x08 +#define GC0310_SH_DELAY 0x11 + +#define GC0310_START_STREAMING 0x94 /* 8-bit enable */ +#define GC0310_STOP_STREAMING 0x0 /* 8-bit disable */ + +#define GC0310_BIN_FACTOR_MAX 3 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct gc0310_resolution { + u8 *desc; + const struct gc0310_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; +}; + +struct gc0310_format { + u8 *desc; + u32 pixelformat; + struct gc0310_reg *regs; +}; + +/* + * gc0310 device structure. + */ +struct gc0310_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + int fmt_idx; + u8 res; + u8 type; +}; + +enum gc0310_tok_type { + GC0310_8BIT = 0x0001, + GC0310_TOK_TERM = 0xf000, /* terminating token for reg list */ + GC0310_TOK_DELAY = 0xfe00, /* delay token for reg list */ + GC0310_TOK_MASK = 0xfff0 +}; + +/** + * struct gc0310_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct gc0310_reg { + enum gc0310_tok_type type; + u8 reg; + u8 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_gc0310_sensor(x) container_of(x, struct gc0310_device, sd) + +#define GC0310_MAX_WRITE_BUF_SIZE 30 + +struct gc0310_write_buffer { + u8 addr; + u8 data[GC0310_MAX_WRITE_BUF_SIZE]; +}; + +struct gc0310_write_ctrl { + int index; + struct gc0310_write_buffer buffer; +}; + +/* + * Register settings for various resolution + */ +static const struct gc0310_reg gc0310_reset_register[] = { +///////////////////////////////////////////////// +///////////////// system reg ///////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0xfe, 0xf0}, + {GC0310_8BIT, 0xfe, 0xf0}, + {GC0310_8BIT, 0xfe, 0x00}, + + {GC0310_8BIT, 0xfc, 0x0e}, //4e + {GC0310_8BIT, 0xfc, 0x0e}, //16//4e // [0]apwd [6]regf_clk_gate + {GC0310_8BIT, 0xf2, 0x80}, //sync output + {GC0310_8BIT, 0xf3, 0x00}, //1f//01 data output + {GC0310_8BIT, 0xf7, 0x33}, //f9 + {GC0310_8BIT, 0xf8, 0x05}, //00 + {GC0310_8BIT, 0xf9, 0x0e}, // 0x8e //0f + {GC0310_8BIT, 0xfa, 0x11}, + +///////////////////////////////////////////////// +/////////////////// MIPI //////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0xfe, 0x03}, + {GC0310_8BIT, 0x01, 0x03}, ///mipi 1lane + {GC0310_8BIT, 0x02, 0x22}, // 0x33 + {GC0310_8BIT, 0x03, 0x94}, + {GC0310_8BIT, 0x04, 0x01}, // fifo_prog + {GC0310_8BIT, 0x05, 0x00}, //fifo_prog + {GC0310_8BIT, 0x06, 0x80}, //b0 //YUV ISP data + {GC0310_8BIT, 0x11, 0x2a},//1e //LDI set YUV422 + {GC0310_8BIT, 0x12, 0x90},//00 //04 //00 //04//00 //LWC[7:0] // + {GC0310_8BIT, 0x13, 0x02},//05 //05 //LWC[15:8] + {GC0310_8BIT, 0x15, 0x12}, // 0x10 //DPHYY_MODE read_ready + {GC0310_8BIT, 0x17, 0x01}, + {GC0310_8BIT, 0x40, 0x08}, + {GC0310_8BIT, 0x41, 0x00}, + {GC0310_8BIT, 0x42, 0x00}, + {GC0310_8BIT, 0x43, 0x00}, + {GC0310_8BIT, 0x21, 0x02}, // 0x01 + {GC0310_8BIT, 0x22, 0x02}, // 0x01 + {GC0310_8BIT, 0x23, 0x01}, // 0x05 //Nor:0x05 DOU:0x06 + {GC0310_8BIT, 0x29, 0x00}, + {GC0310_8BIT, 0x2A, 0x25}, // 0x05 //data zero 0x7a de + {GC0310_8BIT, 0x2B, 0x02}, + + {GC0310_8BIT, 0xfe, 0x00}, + +///////////////////////////////////////////////// +///////////////// CISCTL reg ///////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x00, 0x2f}, //2f//0f//02//01 + {GC0310_8BIT, 0x01, 0x0f}, //06 + {GC0310_8BIT, 0x02, 0x04}, + {GC0310_8BIT, 0x4f, 0x00}, //AEC 0FF + {GC0310_8BIT, 0x03, 0x01}, // 0x03 //04 + {GC0310_8BIT, 0x04, 0xc0}, // 0xe8 //58 + {GC0310_8BIT, 0x05, 0x00}, + {GC0310_8BIT, 0x06, 0xb2}, // 0x0a //HB + {GC0310_8BIT, 0x07, 0x00}, + {GC0310_8BIT, 0x08, 0x0c}, // 0x89 //VB + {GC0310_8BIT, 0x09, 0x00}, //row start + {GC0310_8BIT, 0x0a, 0x00}, // + {GC0310_8BIT, 0x0b, 0x00}, //col start + {GC0310_8BIT, 0x0c, 0x00}, + {GC0310_8BIT, 0x0d, 0x01}, //height + {GC0310_8BIT, 0x0e, 0xf2}, // 0xf7 //height + {GC0310_8BIT, 0x0f, 0x02}, //width + {GC0310_8BIT, 0x10, 0x94}, // 0xa0 //height + {GC0310_8BIT, 0x17, 0x14}, + {GC0310_8BIT, 0x18, 0x1a}, //0a//[4]double reset + {GC0310_8BIT, 0x19, 0x14}, //AD pipeline + {GC0310_8BIT, 0x1b, 0x48}, + {GC0310_8BIT, 0x1e, 0x6b}, //3b//col bias + {GC0310_8BIT, 0x1f, 0x28}, //20//00//08//txlow + {GC0310_8BIT, 0x20, 0x89}, //88//0c//[3:2]DA15 + {GC0310_8BIT, 0x21, 0x49}, //48//[3] txhigh + {GC0310_8BIT, 0x22, 0xb0}, + {GC0310_8BIT, 0x23, 0x04}, //[1:0]vcm_r + {GC0310_8BIT, 0x24, 0x16}, //15 + {GC0310_8BIT, 0x34, 0x20}, //[6:4] rsg high//range + +///////////////////////////////////////////////// +//////////////////// BLK //////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x26, 0x23}, //[1]dark_current_en [0]offset_en + {GC0310_8BIT, 0x28, 0xff}, //BLK_limie_value + {GC0310_8BIT, 0x29, 0x00}, //global offset + {GC0310_8BIT, 0x33, 0x18}, //offset_ratio + {GC0310_8BIT, 0x37, 0x20}, //dark_current_ratio + {GC0310_8BIT, 0x2a, 0x00}, + {GC0310_8BIT, 0x2b, 0x00}, + {GC0310_8BIT, 0x2c, 0x00}, + {GC0310_8BIT, 0x2d, 0x00}, + {GC0310_8BIT, 0x2e, 0x00}, + {GC0310_8BIT, 0x2f, 0x00}, + {GC0310_8BIT, 0x30, 0x00}, + {GC0310_8BIT, 0x31, 0x00}, + {GC0310_8BIT, 0x47, 0x80}, //a7 + {GC0310_8BIT, 0x4e, 0x66}, //select_row + {GC0310_8BIT, 0xa8, 0x02}, //win_width_dark, same with crop_win_width + {GC0310_8BIT, 0xa9, 0x80}, + +///////////////////////////////////////////////// +////////////////// ISP reg /////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x40, 0x06}, // 0xff //ff //48 + {GC0310_8BIT, 0x41, 0x00}, // 0x21 //00//[0]curve_en + {GC0310_8BIT, 0x42, 0x04}, // 0xcf //0a//[1]awn_en + {GC0310_8BIT, 0x44, 0x18}, // 0x18 //02 + {GC0310_8BIT, 0x46, 0x02}, // 0x03 //sync + {GC0310_8BIT, 0x49, 0x03}, + {GC0310_8BIT, 0x4c, 0x20}, //00[5]pretect exp + {GC0310_8BIT, 0x50, 0x01}, //crop enable + {GC0310_8BIT, 0x51, 0x00}, + {GC0310_8BIT, 0x52, 0x00}, + {GC0310_8BIT, 0x53, 0x00}, + {GC0310_8BIT, 0x54, 0x01}, + {GC0310_8BIT, 0x55, 0x01}, //crop window height + {GC0310_8BIT, 0x56, 0xf0}, + {GC0310_8BIT, 0x57, 0x02}, //crop window width + {GC0310_8BIT, 0x58, 0x90}, + +///////////////////////////////////////////////// +/////////////////// GAIN //////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0x70, 0x70}, //70 //80//global gain + {GC0310_8BIT, 0x71, 0x20}, // pregain gain + {GC0310_8BIT, 0x72, 0x40}, // post gain + {GC0310_8BIT, 0x5a, 0x84}, //84//analog gain 0 + {GC0310_8BIT, 0x5b, 0xc9}, //c9 + {GC0310_8BIT, 0x5c, 0xed}, //ed//not use pga gain highest level + {GC0310_8BIT, 0x77, 0x40}, // R gain 0x74 //awb gain + {GC0310_8BIT, 0x78, 0x40}, // G gain + {GC0310_8BIT, 0x79, 0x40}, // B gain 0x5f + + {GC0310_8BIT, 0x48, 0x00}, + {GC0310_8BIT, 0xfe, 0x01}, + {GC0310_8BIT, 0x0a, 0x45}, //[7]col gain mode + + {GC0310_8BIT, 0x3e, 0x40}, + {GC0310_8BIT, 0x3f, 0x5c}, + {GC0310_8BIT, 0x40, 0x7b}, + {GC0310_8BIT, 0x41, 0xbd}, + {GC0310_8BIT, 0x42, 0xf6}, + {GC0310_8BIT, 0x43, 0x63}, + {GC0310_8BIT, 0x03, 0x60}, + {GC0310_8BIT, 0x44, 0x03}, + +///////////////////////////////////////////////// +///////////////// dark sun ////////////////// +///////////////////////////////////////////////// + {GC0310_8BIT, 0xfe, 0x01}, + {GC0310_8BIT, 0x45, 0xa4}, // 0xf7 + {GC0310_8BIT, 0x46, 0xf0}, // 0xff //f0//sun vaule th + {GC0310_8BIT, 0x48, 0x03}, //sun mode + {GC0310_8BIT, 0x4f, 0x60}, //sun_clamp + {GC0310_8BIT, 0xfe, 0x00}, + + {GC0310_TOK_TERM, 0, 0}, +}; + +static struct gc0310_reg const gc0310_VGA_30fps[] = { + {GC0310_8BIT, 0xfe, 0x00}, + {GC0310_8BIT, 0x0d, 0x01}, //height + {GC0310_8BIT, 0x0e, 0xf2}, // 0xf7 //height + {GC0310_8BIT, 0x0f, 0x02}, //width + {GC0310_8BIT, 0x10, 0x94}, // 0xa0 //height + + {GC0310_8BIT, 0x50, 0x01}, //crop enable + {GC0310_8BIT, 0x51, 0x00}, + {GC0310_8BIT, 0x52, 0x00}, + {GC0310_8BIT, 0x53, 0x00}, + {GC0310_8BIT, 0x54, 0x01}, + {GC0310_8BIT, 0x55, 0x01}, //crop window height + {GC0310_8BIT, 0x56, 0xf0}, + {GC0310_8BIT, 0x57, 0x02}, //crop window width + {GC0310_8BIT, 0x58, 0x90}, + + {GC0310_8BIT, 0xfe, 0x03}, + {GC0310_8BIT, 0x12, 0x90},//00 //04 //00 //04//00 //LWC[7:0] // + {GC0310_8BIT, 0x13, 0x02},//05 //05 //LWC[15:8] + + {GC0310_8BIT, 0xfe, 0x00}, + + {GC0310_TOK_TERM, 0, 0}, +}; + +static struct gc0310_resolution gc0310_res_preview[] = { + { + .desc = "gc0310_VGA_30fps", + .width = 656, // 648, + .height = 496, // 488, + .fps = 30, + //.pix_clk_freq = 73, + .used = 0, +#if 0 + .pixels_per_line = 0x0314, + .lines_per_frame = 0x0213, +#endif + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 2, + .regs = gc0310_VGA_30fps, + }, +}; +#define N_RES_PREVIEW (ARRAY_SIZE(gc0310_res_preview)) + +static struct gc0310_resolution *gc0310_res = gc0310_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif + diff --git a/drivers/staging/media/atomisp/i2c/gc2235.h b/drivers/staging/media/atomisp/i2c/gc2235.h new file mode 100644 index 0000000000000..54bf7812b27a0 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/gc2235.h @@ -0,0 +1,677 @@ +/* + * Support for GalaxyCore GC2235 2M camera sensor. + * + * Copyright (c) 2014 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. + * + */ + +#ifndef __GC2235_H__ +#define __GC2235_H__ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../include/linux/atomisp_platform.h" + +/* + * FIXME: non-preview resolutions are currently broken + */ +#define ENABLE_NON_PREVIEW 0 + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define GC2235_FOCAL_LENGTH_NUM 278 /*2.78mm*/ +#define GC2235_FOCAL_LENGTH_DEM 100 +#define GC2235_F_NUMBER_DEFAULT_NUM 26 +#define GC2235_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC2235_FOCAL_LENGTH_DEFAULT 0x1160064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define GC2235_F_NUMBER_DEFAULT 0x1a000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define GC2235_F_NUMBER_RANGE 0x1a0a1a0a +#define GC2235_ID 0x2235 + +#define GC2235_FINE_INTG_TIME_MIN 0 +#define GC2235_FINE_INTG_TIME_MAX_MARGIN 0 +#define GC2235_COARSE_INTG_TIME_MIN 1 +#define GC2235_COARSE_INTG_TIME_MAX_MARGIN 6 + +/* + * GC2235 System control registers + */ +/* + * GC2235 System control registers + */ +#define GC2235_SENSOR_ID_H 0xF0 +#define GC2235_SENSOR_ID_L 0xF1 +#define GC2235_RESET_RELATED 0xFE +#define GC2235_SW_RESET 0x8 +#define GC2235_MIPI_RESET 0x3 +#define GC2235_RESET_BIT 0x4 +#define GC2235_REGISTER_PAGE_0 0x0 +#define GC2235_REGISTER_PAGE_3 0x3 + +#define GC2235_V_CROP_START_H 0x91 +#define GC2235_V_CROP_START_L 0x92 +#define GC2235_H_CROP_START_H 0x93 +#define GC2235_H_CROP_START_L 0x94 +#define GC2235_V_OUTSIZE_H 0x95 +#define GC2235_V_OUTSIZE_L 0x96 +#define GC2235_H_OUTSIZE_H 0x97 +#define GC2235_H_OUTSIZE_L 0x98 + +#define GC2235_HB_H 0x5 +#define GC2235_HB_L 0x6 +#define GC2235_VB_H 0x7 +#define GC2235_VB_L 0x8 +#define GC2235_SH_DELAY_H 0x11 +#define GC2235_SH_DELAY_L 0x12 + +#define GC2235_CSI2_MODE 0x10 + +#define GC2235_EXPOSURE_H 0x3 +#define GC2235_EXPOSURE_L 0x4 +#define GC2235_GLOBAL_GAIN 0xB0 +#define GC2235_PRE_GAIN 0xB1 +#define GC2235_AWB_R_GAIN 0xB3 +#define GC2235_AWB_G_GAIN 0xB4 +#define GC2235_AWB_B_GAIN 0xB5 + +#define GC2235_START_STREAMING 0x91 +#define GC2235_STOP_STREAMING 0x0 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct gc2235_resolution { + u8 *desc; + const struct gc2235_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; +}; + +struct gc2235_format { + u8 *desc; + u32 pixelformat; + struct gc2235_reg *regs; +}; + +/* + * gc2235 device structure. + */ +struct gc2235_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + int fmt_idx; + u8 res; + u8 type; +}; + +enum gc2235_tok_type { + GC2235_8BIT = 0x0001, + GC2235_16BIT = 0x0002, + GC2235_32BIT = 0x0004, + GC2235_TOK_TERM = 0xf000, /* terminating token for reg list */ + GC2235_TOK_DELAY = 0xfe00, /* delay token for reg list */ + GC2235_TOK_MASK = 0xfff0 +}; + +/** + * struct gc2235_reg - MI sensor register format + * @type: type of the register + * @reg: 8-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct gc2235_reg { + enum gc2235_tok_type type; + u8 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_gc2235_sensor(x) container_of(x, struct gc2235_device, sd) + +#define GC2235_MAX_WRITE_BUF_SIZE 30 + +struct gc2235_write_buffer { + u8 addr; + u8 data[GC2235_MAX_WRITE_BUF_SIZE]; +}; + +struct gc2235_write_ctrl { + int index; + struct gc2235_write_buffer buffer; +}; + +static struct gc2235_reg const gc2235_stream_on[] = { + { GC2235_8BIT, 0xfe, 0x03}, /* switch to P3 */ + { GC2235_8BIT, 0x10, 0x91}, /* start mipi */ + { GC2235_8BIT, 0xfe, 0x00}, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_stream_off[] = { + { GC2235_8BIT, 0xfe, 0x03}, /* switch to P3 */ + { GC2235_8BIT, 0x10, 0x01}, /* stop mipi */ + { GC2235_8BIT, 0xfe, 0x00}, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_init_settings[] = { + /* Sysytem */ + { GC2235_8BIT, 0xfe, 0x80 }, + { GC2235_8BIT, 0xfe, 0x80 }, + { GC2235_8BIT, 0xfe, 0x80 }, + { GC2235_8BIT, 0xf2, 0x00 }, + { GC2235_8BIT, 0xf6, 0x00 }, + { GC2235_8BIT, 0xfc, 0x06 }, + { GC2235_8BIT, 0xf7, 0x15 }, + { GC2235_8BIT, 0xf8, 0x84 }, + { GC2235_8BIT, 0xf9, 0xfe }, + { GC2235_8BIT, 0xfa, 0x00 }, + { GC2235_8BIT, 0xfe, 0x00 }, + /* Analog & cisctl */ + { GC2235_8BIT, 0x03, 0x04 }, + { GC2235_8BIT, 0x04, 0x9E }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x06, 0xfd }, + { GC2235_8BIT, 0x07, 0x00 }, + { GC2235_8BIT, 0x08, 0x14 }, + { GC2235_8BIT, 0x0a, 0x02 }, /* row start */ + { GC2235_8BIT, 0x0c, 0x00 }, /* col start */ + { GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */ + { GC2235_8BIT, 0x0e, 0xd0 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */ + { GC2235_8BIT, 0x10, 0x60 }, + { GC2235_8BIT, 0x17, 0x15 }, /* mirror flip */ + { GC2235_8BIT, 0x18, 0x1a }, + { GC2235_8BIT, 0x19, 0x06 }, + { GC2235_8BIT, 0x1a, 0x01 }, + { GC2235_8BIT, 0x1b, 0x4d }, + { GC2235_8BIT, 0x1e, 0x88 }, + { GC2235_8BIT, 0x1f, 0x48 }, + { GC2235_8BIT, 0x20, 0x03 }, + { GC2235_8BIT, 0x21, 0x7f }, + { GC2235_8BIT, 0x22, 0x83 }, + { GC2235_8BIT, 0x23, 0x42 }, + { GC2235_8BIT, 0x24, 0x16 }, + { GC2235_8BIT, 0x26, 0x01 }, /*analog gain*/ + { GC2235_8BIT, 0x27, 0x30 }, + { GC2235_8BIT, 0x3f, 0x00 }, /* PRC */ + /* blk */ + { GC2235_8BIT, 0x40, 0xa3 }, + { GC2235_8BIT, 0x41, 0x82 }, + { GC2235_8BIT, 0x43, 0x20 }, + { GC2235_8BIT, 0x5e, 0x18 }, + { GC2235_8BIT, 0x5f, 0x18 }, + { GC2235_8BIT, 0x60, 0x18 }, + { GC2235_8BIT, 0x61, 0x18 }, + { GC2235_8BIT, 0x62, 0x18 }, + { GC2235_8BIT, 0x63, 0x18 }, + { GC2235_8BIT, 0x64, 0x18 }, + { GC2235_8BIT, 0x65, 0x18 }, + { GC2235_8BIT, 0x66, 0x20 }, + { GC2235_8BIT, 0x67, 0x20 }, + { GC2235_8BIT, 0x68, 0x20 }, + { GC2235_8BIT, 0x69, 0x20 }, + /* Gain */ + { GC2235_8BIT, 0xb2, 0x00 }, + { GC2235_8BIT, 0xb3, 0x40 }, + { GC2235_8BIT, 0xb4, 0x40 }, + { GC2235_8BIT, 0xb5, 0x40 }, + /* Dark sun */ + { GC2235_8BIT, 0xbc, 0x00 }, + + { GC2235_8BIT, 0xfe, 0x03 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; +/* + * Register settings for various resolution + */ +#if ENABLE_NON_PREVIEW +static struct gc2235_reg const gc2235_1296_736_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x07, 0x01 }, /* VBI */ + { GC2235_8BIT, 0x08, 0x44 }, + { GC2235_8BIT, 0x09, 0x00 }, /* row start */ + { GC2235_8BIT, 0x0a, 0xf0 }, + { GC2235_8BIT, 0x0b, 0x00 }, /* col start */ + { GC2235_8BIT, 0x0c, 0xa0 }, + { GC2235_8BIT, 0x0d, 0x02 }, /* win height 736 */ + { GC2235_8BIT, 0x0e, 0xf0 }, + { GC2235_8BIT, 0x0f, 0x05 }, /* win width: 1296 */ + { GC2235_8BIT, 0x10, 0x20 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x08 }, + { GC2235_8BIT, 0x94, 0x08 }, + { GC2235_8BIT, 0x95, 0x02 }, /* crop win height 736 */ + { GC2235_8BIT, 0x96, 0xe0 }, + { GC2235_8BIT, 0x97, 0x05 }, /* crop win width 1296 */ + { GC2235_8BIT, 0x98, 0x10 }, + /* mimi init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0x54 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x06 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_960_640_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x07, 0x02 }, /* VBI */ + { GC2235_8BIT, 0x08, 0xA4 }, + { GC2235_8BIT, 0x09, 0x01 }, /* row start */ + { GC2235_8BIT, 0x0a, 0x18 }, + { GC2235_8BIT, 0x0b, 0x01 }, /* col start */ + { GC2235_8BIT, 0x0c, 0x40 }, + { GC2235_8BIT, 0x0d, 0x02 }, /* win height 656 */ + { GC2235_8BIT, 0x0e, 0x90 }, + { GC2235_8BIT, 0x0f, 0x03 }, /* win width: 976 */ + { GC2235_8BIT, 0x10, 0xd0 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x02 }, + { GC2235_8BIT, 0x94, 0x06 }, + { GC2235_8BIT, 0x95, 0x02 }, /* crop win height 640 */ + { GC2235_8BIT, 0x96, 0x80 }, + { GC2235_8BIT, 0x97, 0x03 }, /* crop win width 960 */ + { GC2235_8BIT, 0x98, 0xc0 }, + /* mimp init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xb0 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x04 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; +#endif + +static struct gc2235_reg const gc2235_1600_900_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x0d, 0x03 }, /* win height 932 */ + { GC2235_8BIT, 0x0e, 0xa4 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1632 */ + { GC2235_8BIT, 0x10, 0x50 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x02 }, + { GC2235_8BIT, 0x94, 0x06 }, + { GC2235_8BIT, 0x95, 0x03 }, /* crop win height 900 */ + { GC2235_8BIT, 0x96, 0x84 }, + { GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1600 */ + { GC2235_8BIT, 0x98, 0x40 }, + /* mimi init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xd0 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_1616_1082_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */ + { GC2235_8BIT, 0x0e, 0xd0 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */ + { GC2235_8BIT, 0x10, 0x50 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x4a }, + { GC2235_8BIT, 0x94, 0x00 }, + { GC2235_8BIT, 0x95, 0x04 }, /* crop win height 1082 */ + { GC2235_8BIT, 0x96, 0x3a }, + { GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1616 */ + { GC2235_8BIT, 0x98, 0x50 }, + /* mimp init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xe4 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */ + + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_reg const gc2235_1616_1216_30fps[] = { + { GC2235_8BIT, 0x8b, 0xa0 }, + { GC2235_8BIT, 0x8c, 0x02 }, + + { GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */ + { GC2235_8BIT, 0x0e, 0xd0 }, + { GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */ + { GC2235_8BIT, 0x10, 0x50 }, + + { GC2235_8BIT, 0x90, 0x01 }, + { GC2235_8BIT, 0x92, 0x02 }, + { GC2235_8BIT, 0x94, 0x00 }, + { GC2235_8BIT, 0x95, 0x04 }, /* crop win height 1216 */ + { GC2235_8BIT, 0x96, 0xc0 }, + { GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1616 */ + { GC2235_8BIT, 0x98, 0x50 }, + /* mimi init */ + { GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */ + { GC2235_8BIT, 0x01, 0x07 }, + { GC2235_8BIT, 0x02, 0x11 }, + { GC2235_8BIT, 0x03, 0x11 }, + { GC2235_8BIT, 0x06, 0x80 }, + { GC2235_8BIT, 0x11, 0x2b }, + /* set mipi buffer */ + { GC2235_8BIT, 0x12, 0xe4 }, /* val_low = (width * 10 / 8) & 0xFF */ + { GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */ + { GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/ + { GC2235_8BIT, 0x04, 0x10 }, + { GC2235_8BIT, 0x05, 0x00 }, + { GC2235_8BIT, 0x17, 0x01 }, + { GC2235_8BIT, 0x22, 0x01 }, + { GC2235_8BIT, 0x23, 0x05 }, + { GC2235_8BIT, 0x24, 0x10 }, + { GC2235_8BIT, 0x25, 0x10 }, + { GC2235_8BIT, 0x26, 0x02 }, + { GC2235_8BIT, 0x21, 0x10 }, + { GC2235_8BIT, 0x29, 0x01 }, + { GC2235_8BIT, 0x2a, 0x02 }, + { GC2235_8BIT, 0x2b, 0x02 }, + { GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */ + { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ + { GC2235_TOK_TERM, 0, 0 } +}; + +static struct gc2235_resolution gc2235_res_preview[] = { + + { + .desc = "gc2235_1600_900_30fps", + .width = 1600, + .height = 900, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1068, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1600_900_30fps, + }, + + { + .desc = "gc2235_1600_1066_30fps", + .width = 1616, + .height = 1082, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1082_30fps, + }, + { + .desc = "gc2235_1600_1200_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1216_30fps, + }, + +}; +#define N_RES_PREVIEW (ARRAY_SIZE(gc2235_res_preview)) + +/* + * Disable non-preview configurations until the configuration selection is + * improved. + */ +#if ENABLE_NON_PREVIEW +static struct gc2235_resolution gc2235_res_still[] = { + { + .desc = "gc2235_1600_900_30fps", + .width = 1600, + .height = 900, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1068, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1600_900_30fps, + }, + { + .desc = "gc2235_1600_1066_30fps", + .width = 1616, + .height = 1082, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1082_30fps, + }, + { + .desc = "gc2235_1600_1200_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 2132, + .lines_per_frame = 1368, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1616_1216_30fps, + }, + +}; +#define N_RES_STILL (ARRAY_SIZE(gc2235_res_still)) + +static struct gc2235_resolution gc2235_res_video[] = { + { + .desc = "gc2235_1296_736_30fps", + .width = 1296, + .height = 736, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 1828, + .lines_per_frame = 888, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_1296_736_30fps, + }, + { + .desc = "gc2235_960_640_30fps", + .width = 960, + .height = 640, + .pix_clk_freq = 30, + .fps = 30, + .used = 0, + .pixels_per_line = 1492, + .lines_per_frame = 792, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = gc2235_960_640_30fps, + }, + +}; +#define N_RES_VIDEO (ARRAY_SIZE(gc2235_res_video)) +#endif + +static struct gc2235_resolution *gc2235_res = gc2235_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif diff --git a/drivers/staging/media/atomisp/i2c/mt9m114.h b/drivers/staging/media/atomisp/i2c/mt9m114.h new file mode 100644 index 0000000000000..de39cc1413086 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/mt9m114.h @@ -0,0 +1,1788 @@ +/* + * Support for mt9m114 Camera Sensor. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __A1040_H__ +#define __A1040_H__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../include/linux/atomisp_platform.h" +#include "../include/linux/atomisp.h" + +#define V4L2_IDENT_MT9M114 8245 + +#define MT9P111_REV3 +#define FULLINISUPPORT + +/* #defines for register writes and register array processing */ +#define MISENSOR_8BIT 1 +#define MISENSOR_16BIT 2 +#define MISENSOR_32BIT 4 + +#define MISENSOR_FWBURST0 0x80 +#define MISENSOR_FWBURST1 0x81 +#define MISENSOR_FWBURST4 0x84 +#define MISENSOR_FWBURST 0x88 + +#define MISENSOR_TOK_TERM 0xf000 /* terminating token for reg list */ +#define MISENSOR_TOK_DELAY 0xfe00 /* delay token for reg list */ +#define MISENSOR_TOK_FWLOAD 0xfd00 /* token indicating load FW */ +#define MISENSOR_TOK_POLL 0xfc00 /* token indicating poll instruction */ +#define MISENSOR_TOK_RMW 0x0010 /* RMW operation */ +#define MISENSOR_TOK_MASK 0xfff0 +#define MISENSOR_AWB_STEADY (1<<0) /* awb steady */ +#define MISENSOR_AE_READY (1<<3) /* ae status ready */ + +/* mask to set sensor read_mode via misensor_rmw_reg */ +#define MISENSOR_R_MODE_MASK 0x0330 +/* mask to set sensor vert_flip and horz_mirror */ +#define MISENSOR_VFLIP_MASK 0x0002 +#define MISENSOR_HFLIP_MASK 0x0001 +#define MISENSOR_FLIP_EN 1 +#define MISENSOR_FLIP_DIS 0 + +/* bits set to set sensor read_mode via misensor_rmw_reg */ +#define MISENSOR_SKIPPING_SET 0x0011 +#define MISENSOR_SUMMING_SET 0x0033 +#define MISENSOR_NORMAL_SET 0x0000 + +/* sensor register that control sensor read-mode and mirror */ +#define MISENSOR_READ_MODE 0xC834 +/* sensor ae-track status register */ +#define MISENSOR_AE_TRACK_STATUS 0xA800 +/* sensor awb status register */ +#define MISENSOR_AWB_STATUS 0xAC00 +/* sensor coarse integration time register */ +#define MISENSOR_COARSE_INTEGRATION_TIME 0xC83C + +/* registers */ +#define REG_SW_RESET 0x301A +#define REG_SW_STREAM 0xDC00 +#define REG_SCCB_CTRL 0x3100 +#define REG_SC_CMMN_CHIP_ID 0x0000 +#define REG_V_START 0xc800 /* 16bits */ +#define REG_H_START 0xc802 /* 16bits */ +#define REG_V_END 0xc804 /* 16bits */ +#define REG_H_END 0xc806 /* 16bits */ +#define REG_PIXEL_CLK 0xc808 /* 32bits */ +#define REG_TIMING_VTS 0xc812 /* 16bits */ +#define REG_TIMING_HTS 0xc814 /* 16bits */ +#define REG_WIDTH 0xC868 /* 16bits */ +#define REG_HEIGHT 0xC86A /* 16bits */ +#define REG_EXPO_COARSE 0x3012 /* 16bits */ +#define REG_EXPO_FINE 0x3014 /* 16bits */ +#define REG_GAIN 0x305E +#define REG_ANALOGGAIN 0x305F +#define REG_ADDR_ACESSS 0x098E /* logical_address_access */ +#define REG_COMM_Register 0x0080 /* command_register */ + +#define SENSOR_DETECTED 1 +#define SENSOR_NOT_DETECTED 0 + +#define I2C_RETRY_COUNT 5 +#define MSG_LEN_OFFSET 2 + +#ifndef MIPI_CONTROL +#define MIPI_CONTROL 0x3400 /* MIPI_Control */ +#endif + +/* GPIO pin on Moorestown */ +#define GPIO_SCLK_25 44 +#define GPIO_STB_PIN 47 + +#define GPIO_STDBY_PIN 49 /* ab:new */ +#define GPIO_RESET_PIN 50 + +/* System control register for Aptina A-1040SOC*/ +#define MT9M114_PID 0x0 + +/* MT9P111_DEVICE_ID */ +#define MT9M114_MOD_ID 0x2481 + +#define MT9M114_FINE_INTG_TIME_MIN 0 +#define MT9M114_FINE_INTG_TIME_MAX_MARGIN 0 +#define MT9M114_COARSE_INTG_TIME_MIN 1 +#define MT9M114_COARSE_INTG_TIME_MAX_MARGIN 6 + + +/* ulBPat; */ + +#define MT9M114_BPAT_RGRGGBGB (1 << 0) +#define MT9M114_BPAT_GRGRBGBG (1 << 1) +#define MT9M114_BPAT_GBGBRGRG (1 << 2) +#define MT9M114_BPAT_BGBGGRGR (1 << 3) + +#define MT9M114_FOCAL_LENGTH_NUM 208 /*2.08mm*/ +#define MT9M114_FOCAL_LENGTH_DEM 100 +#define MT9M114_F_NUMBER_DEFAULT_NUM 24 +#define MT9M114_F_NUMBER_DEM 10 +#define MT9M114_WAIT_STAT_TIMEOUT 100 +#define MT9M114_FLICKER_MODE_50HZ 1 +#define MT9M114_FLICKER_MODE_60HZ 2 +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define MT9M114_FOCAL_LENGTH_DEFAULT 0xD00064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define MT9M114_F_NUMBER_DEFAULT 0x18000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define MT9M114_F_NUMBER_RANGE 0x180a180a + +/* Supported resolutions */ +enum { + MT9M114_RES_736P, + MT9M114_RES_864P, + MT9M114_RES_960P, +}; +#define MT9M114_RES_960P_SIZE_H 1296 +#define MT9M114_RES_960P_SIZE_V 976 +#define MT9M114_RES_720P_SIZE_H 1280 +#define MT9M114_RES_720P_SIZE_V 720 +#define MT9M114_RES_576P_SIZE_H 1024 +#define MT9M114_RES_576P_SIZE_V 576 +#define MT9M114_RES_480P_SIZE_H 768 +#define MT9M114_RES_480P_SIZE_V 480 +#define MT9M114_RES_VGA_SIZE_H 640 +#define MT9M114_RES_VGA_SIZE_V 480 +#define MT9M114_RES_QVGA_SIZE_H 320 +#define MT9M114_RES_QVGA_SIZE_V 240 +#define MT9M114_RES_QCIF_SIZE_H 176 +#define MT9M114_RES_QCIF_SIZE_V 144 + +#define MT9M114_RES_720_480p_768_SIZE_H 736 +#define MT9M114_RES_720_480p_768_SIZE_V 496 +#define MT9M114_RES_736P_SIZE_H 1296 +#define MT9M114_RES_736P_SIZE_V 736 +#define MT9M114_RES_864P_SIZE_H 1296 +#define MT9M114_RES_864P_SIZE_V 864 +#define MT9M114_RES_976P_SIZE_H 1296 +#define MT9M114_RES_976P_SIZE_V 976 + +#define MT9M114_BIN_FACTOR_MAX 3 + +#define MT9M114_DEFAULT_FIRST_EXP 0x10 +#define MT9M114_MAX_FIRST_EXP 0x302 + +/* completion status polling requirements, usage based on Aptina .INI Rev2 */ +enum poll_reg { + NO_POLLING, + PRE_POLLING, + POST_POLLING, +}; +/* + * struct misensor_reg - MI sensor register format + * @length: length of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * Define a structure for sensor register initialization values + */ +struct misensor_reg { + u32 length; + u32 reg; + u32 val; /* value or for read/mod/write, AND mask */ + u32 val2; /* optional; for rmw, OR mask */ +}; + +/* + * struct misensor_fwreg - Firmware burst command + * @type: FW burst or 8/16 bit register + * @addr: 16-bit offset to register or other values depending on type + * @valx: data value for burst (or other commands) + * + * Define a structure for sensor register initialization values + */ +struct misensor_fwreg { + u32 type; /* type of value, register or FW burst string */ + u32 addr; /* target address */ + u32 val0; + u32 val1; + u32 val2; + u32 val3; + u32 val4; + u32 val5; + u32 val6; + u32 val7; +}; + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct mt9m114_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + + struct camera_sensor_platform_data *platform_data; + struct mutex input_lock; /* serialize sensor's ioctl */ + struct v4l2_ctrl_handler ctrl_handler; + int real_model_id; + int nctx; + int power; + + unsigned int bus_width; + unsigned int mode; + unsigned int field_inv; + unsigned int field_sel; + unsigned int ycseq; + unsigned int conv422; + unsigned int bpat; + unsigned int hpol; + unsigned int vpol; + unsigned int edge; + unsigned int bls; + unsigned int gamma; + unsigned int cconv; + unsigned int res; + unsigned int dwn_sz; + unsigned int blc; + unsigned int agc; + unsigned int awb; + unsigned int aec; + /* extention SENSOR version 2 */ + unsigned int cie_profile; + + /* extention SENSOR version 3 */ + unsigned int flicker_freq; + + /* extension SENSOR version 4 */ + unsigned int smia_mode; + unsigned int mipi_mode; + + /* Add name here to load shared library */ + unsigned int type; + + /*Number of MIPI lanes*/ + unsigned int mipi_lanes; + /*WA for low light AE*/ + unsigned int first_exp; + unsigned int first_gain; + unsigned int first_diggain; + char name[32]; + + u8 lightfreq; + u8 streamon; +}; + +struct mt9m114_format_struct { + u8 *desc; + u32 pixelformat; + struct regval_list *regs; +}; + +struct mt9m114_res_struct { + u8 *desc; + int res; + int width; + int height; + int fps; + int skip_frames; + bool used; + struct regval_list *regs; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; +}; + +/* 2 bytes used for address: 256 bytes total */ +#define MT9M114_MAX_WRITE_BUF_SIZE 254 +struct mt9m114_write_buffer { + u16 addr; + u8 data[MT9M114_MAX_WRITE_BUF_SIZE]; +}; + +struct mt9m114_write_ctrl { + int index; + struct mt9m114_write_buffer buffer; +}; + +/* + * Modes supported by the mt9m114 driver. + * Please, keep them in ascending order. + */ +static struct mt9m114_res_struct mt9m114_res[] = { + { + .desc = "720P", + .res = MT9M114_RES_736P, + .width = 1296, + .height = 736, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0640, + .lines_per_frame = 0x0307, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + }, + { + .desc = "848P", + .res = MT9M114_RES_864P, + .width = 1296, + .height = 864, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0640, + .lines_per_frame = 0x03E8, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + }, + { + .desc = "960P", + .res = MT9M114_RES_960P, + .width = 1296, + .height = 976, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0644, /* consistent with regs arrays */ + .lines_per_frame = 0x03E5, /* consistent with regs arrays */ + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + }, +}; +#define N_RES (ARRAY_SIZE(mt9m114_res)) + +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_exitstandby[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + /* exit-standby */ + {MISENSOR_8BIT, 0xDC00, 0x54}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_exp_win[5][5] = { + { + {MISENSOR_8BIT, 0xA407, 0x64}, + {MISENSOR_8BIT, 0xA408, 0x64}, + {MISENSOR_8BIT, 0xA409, 0x64}, + {MISENSOR_8BIT, 0xA40A, 0x64}, + {MISENSOR_8BIT, 0xA40B, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA40C, 0x64}, + {MISENSOR_8BIT, 0xA40D, 0x64}, + {MISENSOR_8BIT, 0xA40E, 0x64}, + {MISENSOR_8BIT, 0xA40F, 0x64}, + {MISENSOR_8BIT, 0xA410, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA411, 0x64}, + {MISENSOR_8BIT, 0xA412, 0x64}, + {MISENSOR_8BIT, 0xA413, 0x64}, + {MISENSOR_8BIT, 0xA414, 0x64}, + {MISENSOR_8BIT, 0xA415, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA416, 0x64}, + {MISENSOR_8BIT, 0xA417, 0x64}, + {MISENSOR_8BIT, 0xA418, 0x64}, + {MISENSOR_8BIT, 0xA419, 0x64}, + {MISENSOR_8BIT, 0xA41A, 0x64}, + }, + { + {MISENSOR_8BIT, 0xA41B, 0x64}, + {MISENSOR_8BIT, 0xA41C, 0x64}, + {MISENSOR_8BIT, 0xA41D, 0x64}, + {MISENSOR_8BIT, 0xA41E, 0x64}, + {MISENSOR_8BIT, 0xA41F, 0x64}, + }, +}; + +static struct misensor_reg const mt9m114_exp_average[] = { + {MISENSOR_8BIT, 0xA407, 0x00}, + {MISENSOR_8BIT, 0xA408, 0x00}, + {MISENSOR_8BIT, 0xA409, 0x00}, + {MISENSOR_8BIT, 0xA40A, 0x00}, + {MISENSOR_8BIT, 0xA40B, 0x00}, + {MISENSOR_8BIT, 0xA40C, 0x00}, + {MISENSOR_8BIT, 0xA40D, 0x00}, + {MISENSOR_8BIT, 0xA40E, 0x00}, + {MISENSOR_8BIT, 0xA40F, 0x00}, + {MISENSOR_8BIT, 0xA410, 0x00}, + {MISENSOR_8BIT, 0xA411, 0x00}, + {MISENSOR_8BIT, 0xA412, 0x00}, + {MISENSOR_8BIT, 0xA413, 0x00}, + {MISENSOR_8BIT, 0xA414, 0x00}, + {MISENSOR_8BIT, 0xA415, 0x00}, + {MISENSOR_8BIT, 0xA416, 0x00}, + {MISENSOR_8BIT, 0xA417, 0x00}, + {MISENSOR_8BIT, 0xA418, 0x00}, + {MISENSOR_8BIT, 0xA419, 0x00}, + {MISENSOR_8BIT, 0xA41A, 0x00}, + {MISENSOR_8BIT, 0xA41B, 0x00}, + {MISENSOR_8BIT, 0xA41C, 0x00}, + {MISENSOR_8BIT, 0xA41D, 0x00}, + {MISENSOR_8BIT, 0xA41E, 0x00}, + {MISENSOR_8BIT, 0xA41F, 0x00}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_exp_center[] = { + {MISENSOR_8BIT, 0xA407, 0x19}, + {MISENSOR_8BIT, 0xA408, 0x19}, + {MISENSOR_8BIT, 0xA409, 0x19}, + {MISENSOR_8BIT, 0xA40A, 0x19}, + {MISENSOR_8BIT, 0xA40B, 0x19}, + {MISENSOR_8BIT, 0xA40C, 0x19}, + {MISENSOR_8BIT, 0xA40D, 0x4B}, + {MISENSOR_8BIT, 0xA40E, 0x4B}, + {MISENSOR_8BIT, 0xA40F, 0x4B}, + {MISENSOR_8BIT, 0xA410, 0x19}, + {MISENSOR_8BIT, 0xA411, 0x19}, + {MISENSOR_8BIT, 0xA412, 0x4B}, + {MISENSOR_8BIT, 0xA413, 0x64}, + {MISENSOR_8BIT, 0xA414, 0x4B}, + {MISENSOR_8BIT, 0xA415, 0x19}, + {MISENSOR_8BIT, 0xA416, 0x19}, + {MISENSOR_8BIT, 0xA417, 0x4B}, + {MISENSOR_8BIT, 0xA418, 0x4B}, + {MISENSOR_8BIT, 0xA419, 0x4B}, + {MISENSOR_8BIT, 0xA41A, 0x19}, + {MISENSOR_8BIT, 0xA41B, 0x19}, + {MISENSOR_8BIT, 0xA41C, 0x19}, + {MISENSOR_8BIT, 0xA41D, 0x19}, + {MISENSOR_8BIT, 0xA41E, 0x19}, + {MISENSOR_8BIT, 0xA41F, 0x19}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_suspend[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x40}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_streaming[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x34}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_standby_reg[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x50}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_wakeup_reg[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x54}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_chgstat_reg[] = { + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [1296x976_30fps] - Intel */ +#if 0 +static struct misensor_reg const mt9m114_960P_init[] = { + {MISENSOR_16BIT, 0x098E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0000}, /* cam_sensor_cfg_y_addr_start = 0 */ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x03CF}, /* cam_sensor_cfg_y_addr_end = 971 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1291 */ + {MISENSOR_16BIT, 0xC808, 0x02DC}, /* cam_sensor_cfg_pixclk = 48000000 */ + {MISENSOR_16BIT, 0xC80A, 0x6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* cam_sensor_cfg_fine_integ_time_max = 1459 */ + {MISENSOR_16BIT, 0xC810, 0x05B3}, + /* cam_sensor_cfg_frame_length_lines = 1006 */ + {MISENSOR_16BIT, 0xC812, 0x03F6}, + /* cam_sensor_cfg_line_length_pck = 1590 */ + {MISENSOR_16BIT, 0xC814, 0x063E}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 963 */ + {MISENSOR_16BIT, 0xC818, 0x03C3}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1280 */ + {MISENSOR_16BIT, 0xC85A, 0x03C8}, /* cam_crop_window_height = 960 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1280 */ + {MISENSOR_16BIT, 0xC86A, 0x03C8}, /* cam_output_height = 960 */ + {MISENSOR_TOK_TERM, 0, 0}, +}; +#endif + +/* [1296x976_30fps_768Mbps] */ +static struct misensor_reg const mt9m114_976P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0000}, /* cam_sensor_cfg_y_addr_start = 0 */ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x03CF}, /* cam_sensor_cfg_y_addr_end = 975 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1295 */ + {MISENSOR_32BIT, 0xC808, 0x2DC6C00},/* cam_sensor_cfg_pixclk = 480000*/ + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */ + {MISENSOR_16BIT, 0xC810, 0x05B3}, + /* 0x074C //cam_sensor_cfg_frame_length_lines = 1006 */ + {MISENSOR_16BIT, 0xC812, 0x03E5}, + /* 0x06B1 /cam_sensor_cfg_line_length_pck = 1590 */ + {MISENSOR_16BIT, 0xC814, 0x0644}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 963 */ + {MISENSOR_16BIT, 0xC818, 0x03C3}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1288 */ + {MISENSOR_16BIT, 0xC85A, 0x03C8}, /* cam_crop_window_height = 968 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1288 */ + {MISENSOR_16BIT, 0xC86A, 0x03C8}, /* cam_output_height = 968 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [1296x864_30fps] */ +static struct misensor_reg const mt9m114_864P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0038}, /* cam_sensor_cfg_y_addr_start = 56 */ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x0397}, /* cam_sensor_cfg_y_addr_end = 919 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1295 */ + /* cam_sensor_cfg_pixclk = 48000000 */ + {MISENSOR_32BIT, 0xC808, 0x2DC6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* cam_sensor_cfg_fine_integ_time_max = 1469 */ + {MISENSOR_16BIT, 0xC810, 0x05BD}, + /* cam_sensor_cfg_frame_length_lines = 1000 */ + {MISENSOR_16BIT, 0xC812, 0x03E8}, + /* cam_sensor_cfg_line_length_pck = 1600 */ + {MISENSOR_16BIT, 0xC814, 0x0640}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 859 */ + {MISENSOR_16BIT, 0xC818, 0x035B}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1288 */ + {MISENSOR_16BIT, 0xC85A, 0x0358}, /* cam_crop_window_height = 856 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1288 */ + {MISENSOR_16BIT, 0xC86A, 0x0358}, /* cam_output_height = 856 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [1296x736_30fps] */ +static struct misensor_reg const mt9m114_736P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x011F}, /* cam_sysctl_pll_divider_m_n = 287 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0078}, /* cam_sensor_cfg_y_addr_start = 120*/ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 0 */ + {MISENSOR_16BIT, 0xC804, 0x0357}, /* cam_sensor_cfg_y_addr_end = 855 */ + {MISENSOR_16BIT, 0xC806, 0x050F}, /* cam_sensor_cfg_x_addr_end = 1295 */ + {MISENSOR_32BIT, 0xC808, 0x237A07F}, /* cam_sensor_cfg_pixclk=37199999*/ + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1469 */ + {MISENSOR_16BIT, 0xC810, 0x05BD}, + /* 0x074C //cam_sensor_cfg_frame_length_lines = 775 */ + {MISENSOR_16BIT, 0xC812, 0x0307}, + /* 0x06B1 /cam_sensor_cfg_line_length_pck = 1600 */ + {MISENSOR_16BIT, 0xC814, 0x0640}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + /* cam_sensor_cfg_cpipe_last_row = 731 */ + {MISENSOR_16BIT, 0xC818, 0x02DB}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0508}, /* cam_crop_window_width = 1288 */ + {MISENSOR_16BIT, 0xC85A, 0x02D8}, /* cam_crop_window_height = 728 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0508}, /* cam_output_width = 1288 */ + {MISENSOR_16BIT, 0xC86A, 0x02D8}, /* cam_output_height = 728 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; + +/* [736x496_30fps_768Mbps] */ +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_720_480P_init[] = { + {MISENSOR_16BIT, 0x98E, 0x1000}, + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x00F0}, /* cam_sensor_cfg_y_addr_start = 240*/ + {MISENSOR_16BIT, 0xC802, 0x0118}, /* cam_sensor_cfg_x_addr_start = 280*/ + {MISENSOR_16BIT, 0xC804, 0x02DF}, /* cam_sensor_cfg_y_addr_end = 735 */ + {MISENSOR_16BIT, 0xC806, 0x03F7}, /* cam_sensor_cfg_x_addr_end = 1015 */ + /* cam_sensor_cfg_pixclk = 48000000 */ + {MISENSOR_32BIT, 0xC808, 0x2DC6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x00DB}, + /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */ + {MISENSOR_16BIT, 0xC810, 0x05B3}, + /* 0x074C //cam_sensor_cfg_frame_length_lines = 997 */ + {MISENSOR_16BIT, 0xC812, 0x03E5}, + /* 0x06B1 /cam_sensor_cfg_line_length_pck = 1604 */ + {MISENSOR_16BIT, 0xC814, 0x0644}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x0060}, + {MISENSOR_16BIT, 0xC818, 0x03C3}, /* cam_sensor_cfg_cpipe_last_row=963*/ + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0000}, /* cam_sensor_control_read_mode = 0*/ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x02D8}, /* cam_crop_window_width = 728 */ + {MISENSOR_16BIT, 0xC85A, 0x01E8}, /* cam_crop_window_height = 488 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x02D8}, /* cam_output_width = 728 */ + {MISENSOR_16BIT, 0xC86A, 0x01E8}, /* cam_output_height = 488 */ + {MISENSOR_8BIT, 0xC878, 0x00}, /* 0x0E //cam_aet_aemode = 0 */ + {MISENSOR_TOK_TERM, 0, 0} +}; +#endif + +static struct misensor_reg const mt9m114_common[] = { + /* reset */ + {MISENSOR_16BIT, 0x301A, 0x0234}, + /* LOAD = Step2-PLL_Timing //PLL and Timing */ + {MISENSOR_16BIT, 0x098E, 0x1000}, /* LOGICAL_ADDRESS_ACCESS */ + {MISENSOR_8BIT, 0xC97E, 0x01}, /* cam_sysctl_pll_enable = 1 */ + {MISENSOR_16BIT, 0xC980, 0x0128}, /* cam_sysctl_pll_divider_m_n = 276 */ + {MISENSOR_16BIT, 0xC982, 0x0700}, /* cam_sysctl_pll_divider_p = 1792 */ + {MISENSOR_16BIT, 0xC800, 0x0000}, /* cam_sensor_cfg_y_addr_start = 216*/ + {MISENSOR_16BIT, 0xC802, 0x0000}, /* cam_sensor_cfg_x_addr_start = 168*/ + {MISENSOR_16BIT, 0xC804, 0x03CD}, /* cam_sensor_cfg_y_addr_end = 761 */ + {MISENSOR_16BIT, 0xC806, 0x050D}, /* cam_sensor_cfg_x_addr_end = 1127 */ + {MISENSOR_16BIT, 0xC808, 0x02DC}, /* cam_sensor_cfg_pixclk = 24000000 */ + {MISENSOR_16BIT, 0xC80A, 0x6C00}, + {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ + /* cam_sensor_cfg_fine_integ_time_min = 219 */ + {MISENSOR_16BIT, 0xC80E, 0x01C3}, + /* cam_sensor_cfg_fine_integ_time_max = 1149 */ + {MISENSOR_16BIT, 0xC810, 0x03F7}, + /* cam_sensor_cfg_frame_length_lines = 625 */ + {MISENSOR_16BIT, 0xC812, 0x0500}, + /* cam_sensor_cfg_line_length_pck = 1280 */ + {MISENSOR_16BIT, 0xC814, 0x04E2}, + /* cam_sensor_cfg_fine_correction = 96 */ + {MISENSOR_16BIT, 0xC816, 0x00E0}, + /* cam_sensor_cfg_cpipe_last_row = 541 */ + {MISENSOR_16BIT, 0xC818, 0x01E3}, + {MISENSOR_16BIT, 0xC826, 0x0020}, /* cam_sensor_cfg_reg_0_data = 32 */ + {MISENSOR_16BIT, 0xC834, 0x0330}, /* cam_sensor_control_read_mode = 0 */ + {MISENSOR_16BIT, 0xC854, 0x0000}, /* cam_crop_window_xoffset = 0 */ + {MISENSOR_16BIT, 0xC856, 0x0000}, /* cam_crop_window_yoffset = 0 */ + {MISENSOR_16BIT, 0xC858, 0x0280}, /* cam_crop_window_width = 952 */ + {MISENSOR_16BIT, 0xC85A, 0x01E0}, /* cam_crop_window_height = 538 */ + {MISENSOR_8BIT, 0xC85C, 0x03}, /* cam_crop_cropmode = 3 */ + {MISENSOR_16BIT, 0xC868, 0x0280}, /* cam_output_width = 952 */ + {MISENSOR_16BIT, 0xC86A, 0x01E0}, /* cam_output_height = 538 */ + /* LOAD = Step3-Recommended + * Patch,Errata and Sensor optimization Setting */ + {MISENSOR_16BIT, 0x316A, 0x8270}, /* DAC_TXLO_ROW */ + {MISENSOR_16BIT, 0x316C, 0x8270}, /* DAC_TXLO */ + {MISENSOR_16BIT, 0x3ED0, 0x2305}, /* DAC_LD_4_5 */ + {MISENSOR_16BIT, 0x3ED2, 0x77CF}, /* DAC_LD_6_7 */ + {MISENSOR_16BIT, 0x316E, 0x8202}, /* DAC_ECL */ + {MISENSOR_16BIT, 0x3180, 0x87FF}, /* DELTA_DK_CONTROL */ + {MISENSOR_16BIT, 0x30D4, 0x6080}, /* COLUMN_CORRECTION */ + {MISENSOR_16BIT, 0xA802, 0x0008}, /* AE_TRACK_MODE */ + {MISENSOR_16BIT, 0x3E14, 0xFF39}, /* SAMP_COL_PUP2 */ + {MISENSOR_16BIT, 0x31E0, 0x0003}, /* PIX_DEF_ID */ + /* LOAD = Step8-Features //Ports, special features, etc. */ + {MISENSOR_16BIT, 0x098E, 0x0000}, /* LOGICAL_ADDRESS_ACCESS */ + {MISENSOR_16BIT, 0x001E, 0x0777}, /* PAD_SLEW */ + {MISENSOR_16BIT, 0x098E, 0x0000}, /* LOGICAL_ADDRESS_ACCESS */ + {MISENSOR_16BIT, 0xC984, 0x8001}, /* CAM_PORT_OUTPUT_CONTROL */ + {MISENSOR_16BIT, 0xC988, 0x0F00}, /* CAM_PORT_MIPI_TIMING_T_HS_ZERO */ + /* CAM_PORT_MIPI_TIMING_T_HS_EXIT_HS_TRAIL */ + {MISENSOR_16BIT, 0xC98A, 0x0B07}, + /* CAM_PORT_MIPI_TIMING_T_CLK_POST_CLK_PRE */ + {MISENSOR_16BIT, 0xC98C, 0x0D01}, + /* CAM_PORT_MIPI_TIMING_T_CLK_TRAIL_CLK_ZERO */ + {MISENSOR_16BIT, 0xC98E, 0x071D}, + {MISENSOR_16BIT, 0xC990, 0x0006}, /* CAM_PORT_MIPI_TIMING_T_LPX */ + {MISENSOR_16BIT, 0xC992, 0x0A0C}, /* CAM_PORT_MIPI_TIMING_INIT_TIMING */ + {MISENSOR_16BIT, 0x3C5A, 0x0009}, /* MIPI_DELAY_TRIM */ + {MISENSOR_16BIT, 0xC86C, 0x0210}, /* CAM_OUTPUT_FORMAT */ + {MISENSOR_16BIT, 0xA804, 0x0000}, /* AE_TRACK_ALGO */ + /* default exposure */ + {MISENSOR_16BIT, 0x3012, 0x0110}, /* COMMAND_REGISTER */ + {MISENSOR_TOK_TERM, 0, 0}, + +}; +#if 0 /* Currently unused */ +static struct misensor_reg const mt9m114_antiflicker_50hz[] = { + {MISENSOR_16BIT, 0x098E, 0xC88B}, + {MISENSOR_8BIT, 0xC88B, 0x32}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_antiflicker_60hz[] = { + {MISENSOR_16BIT, 0x098E, 0xC88B}, + {MISENSOR_8BIT, 0xC88B, 0x3C}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} +}; + +static struct misensor_reg const mt9m114_iq[] = { + /* [Step3-Recommended] [Sensor optimization] */ + {MISENSOR_16BIT, 0x316A, 0x8270}, + {MISENSOR_16BIT, 0x316C, 0x8270}, + {MISENSOR_16BIT, 0x3ED0, 0x2305}, + {MISENSOR_16BIT, 0x3ED2, 0x77CF}, + {MISENSOR_16BIT, 0x316E, 0x8202}, + {MISENSOR_16BIT, 0x3180, 0x87FF}, + {MISENSOR_16BIT, 0x30D4, 0x6080}, + {MISENSOR_16BIT, 0xA802, 0x0008}, + + /* This register is from vender to avoid low light color noise */ + {MISENSOR_16BIT, 0x31E0, 0x0001}, + + /* LOAD=Errata item 1 */ + {MISENSOR_16BIT, 0x3E14, 0xFF39}, + + /* LOAD=Errata item 2 */ + {MISENSOR_16BIT, 0x301A, 0x8234}, + + /* + * LOAD=Errata item 3 + * LOAD=Patch 0202; + * Feature Recommended; Black level correction fix + */ + {MISENSOR_16BIT, 0x0982, 0x0001}, + {MISENSOR_16BIT, 0x098A, 0x5000}, + {MISENSOR_16BIT, 0xD000, 0x70CF}, + {MISENSOR_16BIT, 0xD002, 0xFFFF}, + {MISENSOR_16BIT, 0xD004, 0xC5D4}, + {MISENSOR_16BIT, 0xD006, 0x903A}, + {MISENSOR_16BIT, 0xD008, 0x2144}, + {MISENSOR_16BIT, 0xD00A, 0x0C00}, + {MISENSOR_16BIT, 0xD00C, 0x2186}, + {MISENSOR_16BIT, 0xD00E, 0x0FF3}, + {MISENSOR_16BIT, 0xD010, 0xB844}, + {MISENSOR_16BIT, 0xD012, 0xB948}, + {MISENSOR_16BIT, 0xD014, 0xE082}, + {MISENSOR_16BIT, 0xD016, 0x20CC}, + {MISENSOR_16BIT, 0xD018, 0x80E2}, + {MISENSOR_16BIT, 0xD01A, 0x21CC}, + {MISENSOR_16BIT, 0xD01C, 0x80A2}, + {MISENSOR_16BIT, 0xD01E, 0x21CC}, + {MISENSOR_16BIT, 0xD020, 0x80E2}, + {MISENSOR_16BIT, 0xD022, 0xF404}, + {MISENSOR_16BIT, 0xD024, 0xD801}, + {MISENSOR_16BIT, 0xD026, 0xF003}, + {MISENSOR_16BIT, 0xD028, 0xD800}, + {MISENSOR_16BIT, 0xD02A, 0x7EE0}, + {MISENSOR_16BIT, 0xD02C, 0xC0F1}, + {MISENSOR_16BIT, 0xD02E, 0x08BA}, + + {MISENSOR_16BIT, 0xD030, 0x0600}, + {MISENSOR_16BIT, 0xD032, 0xC1A1}, + {MISENSOR_16BIT, 0xD034, 0x76CF}, + {MISENSOR_16BIT, 0xD036, 0xFFFF}, + {MISENSOR_16BIT, 0xD038, 0xC130}, + {MISENSOR_16BIT, 0xD03A, 0x6E04}, + {MISENSOR_16BIT, 0xD03C, 0xC040}, + {MISENSOR_16BIT, 0xD03E, 0x71CF}, + {MISENSOR_16BIT, 0xD040, 0xFFFF}, + {MISENSOR_16BIT, 0xD042, 0xC790}, + {MISENSOR_16BIT, 0xD044, 0x8103}, + {MISENSOR_16BIT, 0xD046, 0x77CF}, + {MISENSOR_16BIT, 0xD048, 0xFFFF}, + {MISENSOR_16BIT, 0xD04A, 0xC7C0}, + {MISENSOR_16BIT, 0xD04C, 0xE001}, + {MISENSOR_16BIT, 0xD04E, 0xA103}, + {MISENSOR_16BIT, 0xD050, 0xD800}, + {MISENSOR_16BIT, 0xD052, 0x0C6A}, + {MISENSOR_16BIT, 0xD054, 0x04E0}, + {MISENSOR_16BIT, 0xD056, 0xB89E}, + {MISENSOR_16BIT, 0xD058, 0x7508}, + {MISENSOR_16BIT, 0xD05A, 0x8E1C}, + {MISENSOR_16BIT, 0xD05C, 0x0809}, + {MISENSOR_16BIT, 0xD05E, 0x0191}, + + {MISENSOR_16BIT, 0xD060, 0xD801}, + {MISENSOR_16BIT, 0xD062, 0xAE1D}, + {MISENSOR_16BIT, 0xD064, 0xE580}, + {MISENSOR_16BIT, 0xD066, 0x20CA}, + {MISENSOR_16BIT, 0xD068, 0x0022}, + {MISENSOR_16BIT, 0xD06A, 0x20CF}, + {MISENSOR_16BIT, 0xD06C, 0x0522}, + {MISENSOR_16BIT, 0xD06E, 0x0C5C}, + {MISENSOR_16BIT, 0xD070, 0x04E2}, + {MISENSOR_16BIT, 0xD072, 0x21CA}, + {MISENSOR_16BIT, 0xD074, 0x0062}, + {MISENSOR_16BIT, 0xD076, 0xE580}, + {MISENSOR_16BIT, 0xD078, 0xD901}, + {MISENSOR_16BIT, 0xD07A, 0x79C0}, + {MISENSOR_16BIT, 0xD07C, 0xD800}, + {MISENSOR_16BIT, 0xD07E, 0x0BE6}, + {MISENSOR_16BIT, 0xD080, 0x04E0}, + {MISENSOR_16BIT, 0xD082, 0xB89E}, + {MISENSOR_16BIT, 0xD084, 0x70CF}, + {MISENSOR_16BIT, 0xD086, 0xFFFF}, + {MISENSOR_16BIT, 0xD088, 0xC8D4}, + {MISENSOR_16BIT, 0xD08A, 0x9002}, + {MISENSOR_16BIT, 0xD08C, 0x0857}, + {MISENSOR_16BIT, 0xD08E, 0x025E}, + + {MISENSOR_16BIT, 0xD090, 0xFFDC}, + {MISENSOR_16BIT, 0xD092, 0xE080}, + {MISENSOR_16BIT, 0xD094, 0x25CC}, + {MISENSOR_16BIT, 0xD096, 0x9022}, + {MISENSOR_16BIT, 0xD098, 0xF225}, + {MISENSOR_16BIT, 0xD09A, 0x1700}, + {MISENSOR_16BIT, 0xD09C, 0x108A}, + {MISENSOR_16BIT, 0xD09E, 0x73CF}, + {MISENSOR_16BIT, 0xD0A0, 0xFF00}, + {MISENSOR_16BIT, 0xD0A2, 0x3174}, + {MISENSOR_16BIT, 0xD0A4, 0x9307}, + {MISENSOR_16BIT, 0xD0A6, 0x2A04}, + {MISENSOR_16BIT, 0xD0A8, 0x103E}, + {MISENSOR_16BIT, 0xD0AA, 0x9328}, + {MISENSOR_16BIT, 0xD0AC, 0x2942}, + {MISENSOR_16BIT, 0xD0AE, 0x7140}, + {MISENSOR_16BIT, 0xD0B0, 0x2A04}, + {MISENSOR_16BIT, 0xD0B2, 0x107E}, + {MISENSOR_16BIT, 0xD0B4, 0x9349}, + {MISENSOR_16BIT, 0xD0B6, 0x2942}, + {MISENSOR_16BIT, 0xD0B8, 0x7141}, + {MISENSOR_16BIT, 0xD0BA, 0x2A04}, + {MISENSOR_16BIT, 0xD0BC, 0x10BE}, + {MISENSOR_16BIT, 0xD0BE, 0x934A}, + + {MISENSOR_16BIT, 0xD0C0, 0x2942}, + {MISENSOR_16BIT, 0xD0C2, 0x714B}, + {MISENSOR_16BIT, 0xD0C4, 0x2A04}, + {MISENSOR_16BIT, 0xD0C6, 0x10BE}, + {MISENSOR_16BIT, 0xD0C8, 0x130C}, + {MISENSOR_16BIT, 0xD0CA, 0x010A}, + {MISENSOR_16BIT, 0xD0CC, 0x2942}, + {MISENSOR_16BIT, 0xD0CE, 0x7142}, + {MISENSOR_16BIT, 0xD0D0, 0x2250}, + {MISENSOR_16BIT, 0xD0D2, 0x13CA}, + {MISENSOR_16BIT, 0xD0D4, 0x1B0C}, + {MISENSOR_16BIT, 0xD0D6, 0x0284}, + {MISENSOR_16BIT, 0xD0D8, 0xB307}, + {MISENSOR_16BIT, 0xD0DA, 0xB328}, + {MISENSOR_16BIT, 0xD0DC, 0x1B12}, + {MISENSOR_16BIT, 0xD0DE, 0x02C4}, + {MISENSOR_16BIT, 0xD0E0, 0xB34A}, + {MISENSOR_16BIT, 0xD0E2, 0xED88}, + {MISENSOR_16BIT, 0xD0E4, 0x71CF}, + {MISENSOR_16BIT, 0xD0E6, 0xFF00}, + {MISENSOR_16BIT, 0xD0E8, 0x3174}, + {MISENSOR_16BIT, 0xD0EA, 0x9106}, + {MISENSOR_16BIT, 0xD0EC, 0xB88F}, + {MISENSOR_16BIT, 0xD0EE, 0xB106}, + + {MISENSOR_16BIT, 0xD0F0, 0x210A}, + {MISENSOR_16BIT, 0xD0F2, 0x8340}, + {MISENSOR_16BIT, 0xD0F4, 0xC000}, + {MISENSOR_16BIT, 0xD0F6, 0x21CA}, + {MISENSOR_16BIT, 0xD0F8, 0x0062}, + {MISENSOR_16BIT, 0xD0FA, 0x20F0}, + {MISENSOR_16BIT, 0xD0FC, 0x0040}, + {MISENSOR_16BIT, 0xD0FE, 0x0B02}, + {MISENSOR_16BIT, 0xD100, 0x0320}, + {MISENSOR_16BIT, 0xD102, 0xD901}, + {MISENSOR_16BIT, 0xD104, 0x07F1}, + {MISENSOR_16BIT, 0xD106, 0x05E0}, + {MISENSOR_16BIT, 0xD108, 0xC0A1}, + {MISENSOR_16BIT, 0xD10A, 0x78E0}, + {MISENSOR_16BIT, 0xD10C, 0xC0F1}, + {MISENSOR_16BIT, 0xD10E, 0x71CF}, + {MISENSOR_16BIT, 0xD110, 0xFFFF}, + {MISENSOR_16BIT, 0xD112, 0xC7C0}, + {MISENSOR_16BIT, 0xD114, 0xD840}, + {MISENSOR_16BIT, 0xD116, 0xA900}, + {MISENSOR_16BIT, 0xD118, 0x71CF}, + {MISENSOR_16BIT, 0xD11A, 0xFFFF}, + {MISENSOR_16BIT, 0xD11C, 0xD02C}, + {MISENSOR_16BIT, 0xD11E, 0xD81E}, + + {MISENSOR_16BIT, 0xD120, 0x0A5A}, + {MISENSOR_16BIT, 0xD122, 0x04E0}, + {MISENSOR_16BIT, 0xD124, 0xDA00}, + {MISENSOR_16BIT, 0xD126, 0xD800}, + {MISENSOR_16BIT, 0xD128, 0xC0D1}, + {MISENSOR_16BIT, 0xD12A, 0x7EE0}, + + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xE000, 0x010C}, + {MISENSOR_16BIT, 0xE002, 0x0202}, + {MISENSOR_16BIT, 0xE004, 0x4103}, + {MISENSOR_16BIT, 0xE006, 0x0202}, + {MISENSOR_16BIT, 0x0080, 0xFFF0}, + {MISENSOR_16BIT, 0x0080, 0xFFF1}, + + /* LOAD=Patch 0302; Feature Recommended; Adaptive Sensitivity */ + {MISENSOR_16BIT, 0x0982, 0x0001}, + {MISENSOR_16BIT, 0x098A, 0x512C}, + {MISENSOR_16BIT, 0xD12C, 0x70CF}, + {MISENSOR_16BIT, 0xD12E, 0xFFFF}, + {MISENSOR_16BIT, 0xD130, 0xC5D4}, + {MISENSOR_16BIT, 0xD132, 0x903A}, + {MISENSOR_16BIT, 0xD134, 0x2144}, + {MISENSOR_16BIT, 0xD136, 0x0C00}, + {MISENSOR_16BIT, 0xD138, 0x2186}, + {MISENSOR_16BIT, 0xD13A, 0x0FF3}, + {MISENSOR_16BIT, 0xD13C, 0xB844}, + {MISENSOR_16BIT, 0xD13E, 0x262F}, + {MISENSOR_16BIT, 0xD140, 0xF008}, + {MISENSOR_16BIT, 0xD142, 0xB948}, + {MISENSOR_16BIT, 0xD144, 0x21CC}, + {MISENSOR_16BIT, 0xD146, 0x8021}, + {MISENSOR_16BIT, 0xD148, 0xD801}, + {MISENSOR_16BIT, 0xD14A, 0xF203}, + {MISENSOR_16BIT, 0xD14C, 0xD800}, + {MISENSOR_16BIT, 0xD14E, 0x7EE0}, + {MISENSOR_16BIT, 0xD150, 0xC0F1}, + {MISENSOR_16BIT, 0xD152, 0x71CF}, + {MISENSOR_16BIT, 0xD154, 0xFFFF}, + {MISENSOR_16BIT, 0xD156, 0xC610}, + {MISENSOR_16BIT, 0xD158, 0x910E}, + {MISENSOR_16BIT, 0xD15A, 0x208C}, + {MISENSOR_16BIT, 0xD15C, 0x8014}, + {MISENSOR_16BIT, 0xD15E, 0xF418}, + {MISENSOR_16BIT, 0xD160, 0x910F}, + {MISENSOR_16BIT, 0xD162, 0x208C}, + {MISENSOR_16BIT, 0xD164, 0x800F}, + {MISENSOR_16BIT, 0xD166, 0xF414}, + {MISENSOR_16BIT, 0xD168, 0x9116}, + {MISENSOR_16BIT, 0xD16A, 0x208C}, + {MISENSOR_16BIT, 0xD16C, 0x800A}, + {MISENSOR_16BIT, 0xD16E, 0xF410}, + {MISENSOR_16BIT, 0xD170, 0x9117}, + {MISENSOR_16BIT, 0xD172, 0x208C}, + {MISENSOR_16BIT, 0xD174, 0x8807}, + {MISENSOR_16BIT, 0xD176, 0xF40C}, + {MISENSOR_16BIT, 0xD178, 0x9118}, + {MISENSOR_16BIT, 0xD17A, 0x2086}, + {MISENSOR_16BIT, 0xD17C, 0x0FF3}, + {MISENSOR_16BIT, 0xD17E, 0xB848}, + {MISENSOR_16BIT, 0xD180, 0x080D}, + {MISENSOR_16BIT, 0xD182, 0x0090}, + {MISENSOR_16BIT, 0xD184, 0xFFEA}, + {MISENSOR_16BIT, 0xD186, 0xE081}, + {MISENSOR_16BIT, 0xD188, 0xD801}, + {MISENSOR_16BIT, 0xD18A, 0xF203}, + {MISENSOR_16BIT, 0xD18C, 0xD800}, + {MISENSOR_16BIT, 0xD18E, 0xC0D1}, + {MISENSOR_16BIT, 0xD190, 0x7EE0}, + {MISENSOR_16BIT, 0xD192, 0x78E0}, + {MISENSOR_16BIT, 0xD194, 0xC0F1}, + {MISENSOR_16BIT, 0xD196, 0x71CF}, + {MISENSOR_16BIT, 0xD198, 0xFFFF}, + {MISENSOR_16BIT, 0xD19A, 0xC610}, + {MISENSOR_16BIT, 0xD19C, 0x910E}, + {MISENSOR_16BIT, 0xD19E, 0x208C}, + {MISENSOR_16BIT, 0xD1A0, 0x800A}, + {MISENSOR_16BIT, 0xD1A2, 0xF418}, + {MISENSOR_16BIT, 0xD1A4, 0x910F}, + {MISENSOR_16BIT, 0xD1A6, 0x208C}, + {MISENSOR_16BIT, 0xD1A8, 0x8807}, + {MISENSOR_16BIT, 0xD1AA, 0xF414}, + {MISENSOR_16BIT, 0xD1AC, 0x9116}, + {MISENSOR_16BIT, 0xD1AE, 0x208C}, + {MISENSOR_16BIT, 0xD1B0, 0x800A}, + {MISENSOR_16BIT, 0xD1B2, 0xF410}, + {MISENSOR_16BIT, 0xD1B4, 0x9117}, + {MISENSOR_16BIT, 0xD1B6, 0x208C}, + {MISENSOR_16BIT, 0xD1B8, 0x8807}, + {MISENSOR_16BIT, 0xD1BA, 0xF40C}, + {MISENSOR_16BIT, 0xD1BC, 0x9118}, + {MISENSOR_16BIT, 0xD1BE, 0x2086}, + {MISENSOR_16BIT, 0xD1C0, 0x0FF3}, + {MISENSOR_16BIT, 0xD1C2, 0xB848}, + {MISENSOR_16BIT, 0xD1C4, 0x080D}, + {MISENSOR_16BIT, 0xD1C6, 0x0090}, + {MISENSOR_16BIT, 0xD1C8, 0xFFD9}, + {MISENSOR_16BIT, 0xD1CA, 0xE080}, + {MISENSOR_16BIT, 0xD1CC, 0xD801}, + {MISENSOR_16BIT, 0xD1CE, 0xF203}, + {MISENSOR_16BIT, 0xD1D0, 0xD800}, + {MISENSOR_16BIT, 0xD1D2, 0xF1DF}, + {MISENSOR_16BIT, 0xD1D4, 0x9040}, + {MISENSOR_16BIT, 0xD1D6, 0x71CF}, + {MISENSOR_16BIT, 0xD1D8, 0xFFFF}, + {MISENSOR_16BIT, 0xD1DA, 0xC5D4}, + {MISENSOR_16BIT, 0xD1DC, 0xB15A}, + {MISENSOR_16BIT, 0xD1DE, 0x9041}, + {MISENSOR_16BIT, 0xD1E0, 0x73CF}, + {MISENSOR_16BIT, 0xD1E2, 0xFFFF}, + {MISENSOR_16BIT, 0xD1E4, 0xC7D0}, + {MISENSOR_16BIT, 0xD1E6, 0xB140}, + {MISENSOR_16BIT, 0xD1E8, 0x9042}, + {MISENSOR_16BIT, 0xD1EA, 0xB141}, + {MISENSOR_16BIT, 0xD1EC, 0x9043}, + {MISENSOR_16BIT, 0xD1EE, 0xB142}, + {MISENSOR_16BIT, 0xD1F0, 0x9044}, + {MISENSOR_16BIT, 0xD1F2, 0xB143}, + {MISENSOR_16BIT, 0xD1F4, 0x9045}, + {MISENSOR_16BIT, 0xD1F6, 0xB147}, + {MISENSOR_16BIT, 0xD1F8, 0x9046}, + {MISENSOR_16BIT, 0xD1FA, 0xB148}, + {MISENSOR_16BIT, 0xD1FC, 0x9047}, + {MISENSOR_16BIT, 0xD1FE, 0xB14B}, + {MISENSOR_16BIT, 0xD200, 0x9048}, + {MISENSOR_16BIT, 0xD202, 0xB14C}, + {MISENSOR_16BIT, 0xD204, 0x9049}, + {MISENSOR_16BIT, 0xD206, 0x1958}, + {MISENSOR_16BIT, 0xD208, 0x0084}, + {MISENSOR_16BIT, 0xD20A, 0x904A}, + {MISENSOR_16BIT, 0xD20C, 0x195A}, + {MISENSOR_16BIT, 0xD20E, 0x0084}, + {MISENSOR_16BIT, 0xD210, 0x8856}, + {MISENSOR_16BIT, 0xD212, 0x1B36}, + {MISENSOR_16BIT, 0xD214, 0x8082}, + {MISENSOR_16BIT, 0xD216, 0x8857}, + {MISENSOR_16BIT, 0xD218, 0x1B37}, + {MISENSOR_16BIT, 0xD21A, 0x8082}, + {MISENSOR_16BIT, 0xD21C, 0x904C}, + {MISENSOR_16BIT, 0xD21E, 0x19A7}, + {MISENSOR_16BIT, 0xD220, 0x009C}, + {MISENSOR_16BIT, 0xD222, 0x881A}, + {MISENSOR_16BIT, 0xD224, 0x7FE0}, + {MISENSOR_16BIT, 0xD226, 0x1B54}, + {MISENSOR_16BIT, 0xD228, 0x8002}, + {MISENSOR_16BIT, 0xD22A, 0x78E0}, + {MISENSOR_16BIT, 0xD22C, 0x71CF}, + {MISENSOR_16BIT, 0xD22E, 0xFFFF}, + {MISENSOR_16BIT, 0xD230, 0xC350}, + {MISENSOR_16BIT, 0xD232, 0xD828}, + {MISENSOR_16BIT, 0xD234, 0xA90B}, + {MISENSOR_16BIT, 0xD236, 0x8100}, + {MISENSOR_16BIT, 0xD238, 0x01C5}, + {MISENSOR_16BIT, 0xD23A, 0x0320}, + {MISENSOR_16BIT, 0xD23C, 0xD900}, + {MISENSOR_16BIT, 0xD23E, 0x78E0}, + {MISENSOR_16BIT, 0xD240, 0x220A}, + {MISENSOR_16BIT, 0xD242, 0x1F80}, + {MISENSOR_16BIT, 0xD244, 0xFFFF}, + {MISENSOR_16BIT, 0xD246, 0xD4E0}, + {MISENSOR_16BIT, 0xD248, 0xC0F1}, + {MISENSOR_16BIT, 0xD24A, 0x0811}, + {MISENSOR_16BIT, 0xD24C, 0x0051}, + {MISENSOR_16BIT, 0xD24E, 0x2240}, + {MISENSOR_16BIT, 0xD250, 0x1200}, + {MISENSOR_16BIT, 0xD252, 0xFFE1}, + {MISENSOR_16BIT, 0xD254, 0xD801}, + {MISENSOR_16BIT, 0xD256, 0xF006}, + {MISENSOR_16BIT, 0xD258, 0x2240}, + {MISENSOR_16BIT, 0xD25A, 0x1900}, + {MISENSOR_16BIT, 0xD25C, 0xFFDE}, + {MISENSOR_16BIT, 0xD25E, 0xD802}, + {MISENSOR_16BIT, 0xD260, 0x1A05}, + {MISENSOR_16BIT, 0xD262, 0x1002}, + {MISENSOR_16BIT, 0xD264, 0xFFF2}, + {MISENSOR_16BIT, 0xD266, 0xF195}, + {MISENSOR_16BIT, 0xD268, 0xC0F1}, + {MISENSOR_16BIT, 0xD26A, 0x0E7E}, + {MISENSOR_16BIT, 0xD26C, 0x05C0}, + {MISENSOR_16BIT, 0xD26E, 0x75CF}, + {MISENSOR_16BIT, 0xD270, 0xFFFF}, + {MISENSOR_16BIT, 0xD272, 0xC84C}, + {MISENSOR_16BIT, 0xD274, 0x9502}, + {MISENSOR_16BIT, 0xD276, 0x77CF}, + {MISENSOR_16BIT, 0xD278, 0xFFFF}, + {MISENSOR_16BIT, 0xD27A, 0xC344}, + {MISENSOR_16BIT, 0xD27C, 0x2044}, + {MISENSOR_16BIT, 0xD27E, 0x008E}, + {MISENSOR_16BIT, 0xD280, 0xB8A1}, + {MISENSOR_16BIT, 0xD282, 0x0926}, + {MISENSOR_16BIT, 0xD284, 0x03E0}, + {MISENSOR_16BIT, 0xD286, 0xB502}, + {MISENSOR_16BIT, 0xD288, 0x9502}, + {MISENSOR_16BIT, 0xD28A, 0x952E}, + {MISENSOR_16BIT, 0xD28C, 0x7E05}, + {MISENSOR_16BIT, 0xD28E, 0xB5C2}, + {MISENSOR_16BIT, 0xD290, 0x70CF}, + {MISENSOR_16BIT, 0xD292, 0xFFFF}, + {MISENSOR_16BIT, 0xD294, 0xC610}, + {MISENSOR_16BIT, 0xD296, 0x099A}, + {MISENSOR_16BIT, 0xD298, 0x04A0}, + {MISENSOR_16BIT, 0xD29A, 0xB026}, + {MISENSOR_16BIT, 0xD29C, 0x0E02}, + {MISENSOR_16BIT, 0xD29E, 0x0560}, + {MISENSOR_16BIT, 0xD2A0, 0xDE00}, + {MISENSOR_16BIT, 0xD2A2, 0x0A12}, + {MISENSOR_16BIT, 0xD2A4, 0x0320}, + {MISENSOR_16BIT, 0xD2A6, 0xB7C4}, + {MISENSOR_16BIT, 0xD2A8, 0x0B36}, + {MISENSOR_16BIT, 0xD2AA, 0x03A0}, + {MISENSOR_16BIT, 0xD2AC, 0x70C9}, + {MISENSOR_16BIT, 0xD2AE, 0x9502}, + {MISENSOR_16BIT, 0xD2B0, 0x7608}, + {MISENSOR_16BIT, 0xD2B2, 0xB8A8}, + {MISENSOR_16BIT, 0xD2B4, 0xB502}, + {MISENSOR_16BIT, 0xD2B6, 0x70CF}, + {MISENSOR_16BIT, 0xD2B8, 0x0000}, + {MISENSOR_16BIT, 0xD2BA, 0x5536}, + {MISENSOR_16BIT, 0xD2BC, 0x7860}, + {MISENSOR_16BIT, 0xD2BE, 0x2686}, + {MISENSOR_16BIT, 0xD2C0, 0x1FFB}, + {MISENSOR_16BIT, 0xD2C2, 0x9502}, + {MISENSOR_16BIT, 0xD2C4, 0x78C5}, + {MISENSOR_16BIT, 0xD2C6, 0x0631}, + {MISENSOR_16BIT, 0xD2C8, 0x05E0}, + {MISENSOR_16BIT, 0xD2CA, 0xB502}, + {MISENSOR_16BIT, 0xD2CC, 0x72CF}, + {MISENSOR_16BIT, 0xD2CE, 0xFFFF}, + {MISENSOR_16BIT, 0xD2D0, 0xC5D4}, + {MISENSOR_16BIT, 0xD2D2, 0x923A}, + {MISENSOR_16BIT, 0xD2D4, 0x73CF}, + {MISENSOR_16BIT, 0xD2D6, 0xFFFF}, + {MISENSOR_16BIT, 0xD2D8, 0xC7D0}, + {MISENSOR_16BIT, 0xD2DA, 0xB020}, + {MISENSOR_16BIT, 0xD2DC, 0x9220}, + {MISENSOR_16BIT, 0xD2DE, 0xB021}, + {MISENSOR_16BIT, 0xD2E0, 0x9221}, + {MISENSOR_16BIT, 0xD2E2, 0xB022}, + {MISENSOR_16BIT, 0xD2E4, 0x9222}, + {MISENSOR_16BIT, 0xD2E6, 0xB023}, + {MISENSOR_16BIT, 0xD2E8, 0x9223}, + {MISENSOR_16BIT, 0xD2EA, 0xB024}, + {MISENSOR_16BIT, 0xD2EC, 0x9227}, + {MISENSOR_16BIT, 0xD2EE, 0xB025}, + {MISENSOR_16BIT, 0xD2F0, 0x9228}, + {MISENSOR_16BIT, 0xD2F2, 0xB026}, + {MISENSOR_16BIT, 0xD2F4, 0x922B}, + {MISENSOR_16BIT, 0xD2F6, 0xB027}, + {MISENSOR_16BIT, 0xD2F8, 0x922C}, + {MISENSOR_16BIT, 0xD2FA, 0xB028}, + {MISENSOR_16BIT, 0xD2FC, 0x1258}, + {MISENSOR_16BIT, 0xD2FE, 0x0101}, + {MISENSOR_16BIT, 0xD300, 0xB029}, + {MISENSOR_16BIT, 0xD302, 0x125A}, + {MISENSOR_16BIT, 0xD304, 0x0101}, + {MISENSOR_16BIT, 0xD306, 0xB02A}, + {MISENSOR_16BIT, 0xD308, 0x1336}, + {MISENSOR_16BIT, 0xD30A, 0x8081}, + {MISENSOR_16BIT, 0xD30C, 0xA836}, + {MISENSOR_16BIT, 0xD30E, 0x1337}, + {MISENSOR_16BIT, 0xD310, 0x8081}, + {MISENSOR_16BIT, 0xD312, 0xA837}, + {MISENSOR_16BIT, 0xD314, 0x12A7}, + {MISENSOR_16BIT, 0xD316, 0x0701}, + {MISENSOR_16BIT, 0xD318, 0xB02C}, + {MISENSOR_16BIT, 0xD31A, 0x1354}, + {MISENSOR_16BIT, 0xD31C, 0x8081}, + {MISENSOR_16BIT, 0xD31E, 0x7FE0}, + {MISENSOR_16BIT, 0xD320, 0xA83A}, + {MISENSOR_16BIT, 0xD322, 0x78E0}, + {MISENSOR_16BIT, 0xD324, 0xC0F1}, + {MISENSOR_16BIT, 0xD326, 0x0DC2}, + {MISENSOR_16BIT, 0xD328, 0x05C0}, + {MISENSOR_16BIT, 0xD32A, 0x7608}, + {MISENSOR_16BIT, 0xD32C, 0x09BB}, + {MISENSOR_16BIT, 0xD32E, 0x0010}, + {MISENSOR_16BIT, 0xD330, 0x75CF}, + {MISENSOR_16BIT, 0xD332, 0xFFFF}, + {MISENSOR_16BIT, 0xD334, 0xD4E0}, + {MISENSOR_16BIT, 0xD336, 0x8D21}, + {MISENSOR_16BIT, 0xD338, 0x8D00}, + {MISENSOR_16BIT, 0xD33A, 0x2153}, + {MISENSOR_16BIT, 0xD33C, 0x0003}, + {MISENSOR_16BIT, 0xD33E, 0xB8C0}, + {MISENSOR_16BIT, 0xD340, 0x8D45}, + {MISENSOR_16BIT, 0xD342, 0x0B23}, + {MISENSOR_16BIT, 0xD344, 0x0000}, + {MISENSOR_16BIT, 0xD346, 0xEA8F}, + {MISENSOR_16BIT, 0xD348, 0x0915}, + {MISENSOR_16BIT, 0xD34A, 0x001E}, + {MISENSOR_16BIT, 0xD34C, 0xFF81}, + {MISENSOR_16BIT, 0xD34E, 0xE808}, + {MISENSOR_16BIT, 0xD350, 0x2540}, + {MISENSOR_16BIT, 0xD352, 0x1900}, + {MISENSOR_16BIT, 0xD354, 0xFFDE}, + {MISENSOR_16BIT, 0xD356, 0x8D00}, + {MISENSOR_16BIT, 0xD358, 0xB880}, + {MISENSOR_16BIT, 0xD35A, 0xF004}, + {MISENSOR_16BIT, 0xD35C, 0x8D00}, + {MISENSOR_16BIT, 0xD35E, 0xB8A0}, + {MISENSOR_16BIT, 0xD360, 0xAD00}, + {MISENSOR_16BIT, 0xD362, 0x8D05}, + {MISENSOR_16BIT, 0xD364, 0xE081}, + {MISENSOR_16BIT, 0xD366, 0x20CC}, + {MISENSOR_16BIT, 0xD368, 0x80A2}, + {MISENSOR_16BIT, 0xD36A, 0xDF00}, + {MISENSOR_16BIT, 0xD36C, 0xF40A}, + {MISENSOR_16BIT, 0xD36E, 0x71CF}, + {MISENSOR_16BIT, 0xD370, 0xFFFF}, + {MISENSOR_16BIT, 0xD372, 0xC84C}, + {MISENSOR_16BIT, 0xD374, 0x9102}, + {MISENSOR_16BIT, 0xD376, 0x7708}, + {MISENSOR_16BIT, 0xD378, 0xB8A6}, + {MISENSOR_16BIT, 0xD37A, 0x2786}, + {MISENSOR_16BIT, 0xD37C, 0x1FFE}, + {MISENSOR_16BIT, 0xD37E, 0xB102}, + {MISENSOR_16BIT, 0xD380, 0x0B42}, + {MISENSOR_16BIT, 0xD382, 0x0180}, + {MISENSOR_16BIT, 0xD384, 0x0E3E}, + {MISENSOR_16BIT, 0xD386, 0x0180}, + {MISENSOR_16BIT, 0xD388, 0x0F4A}, + {MISENSOR_16BIT, 0xD38A, 0x0160}, + {MISENSOR_16BIT, 0xD38C, 0x70C9}, + {MISENSOR_16BIT, 0xD38E, 0x8D05}, + {MISENSOR_16BIT, 0xD390, 0xE081}, + {MISENSOR_16BIT, 0xD392, 0x20CC}, + {MISENSOR_16BIT, 0xD394, 0x80A2}, + {MISENSOR_16BIT, 0xD396, 0xF429}, + {MISENSOR_16BIT, 0xD398, 0x76CF}, + {MISENSOR_16BIT, 0xD39A, 0xFFFF}, + {MISENSOR_16BIT, 0xD39C, 0xC84C}, + {MISENSOR_16BIT, 0xD39E, 0x082D}, + {MISENSOR_16BIT, 0xD3A0, 0x0051}, + {MISENSOR_16BIT, 0xD3A2, 0x70CF}, + {MISENSOR_16BIT, 0xD3A4, 0xFFFF}, + {MISENSOR_16BIT, 0xD3A6, 0xC90C}, + {MISENSOR_16BIT, 0xD3A8, 0x8805}, + {MISENSOR_16BIT, 0xD3AA, 0x09B6}, + {MISENSOR_16BIT, 0xD3AC, 0x0360}, + {MISENSOR_16BIT, 0xD3AE, 0xD908}, + {MISENSOR_16BIT, 0xD3B0, 0x2099}, + {MISENSOR_16BIT, 0xD3B2, 0x0802}, + {MISENSOR_16BIT, 0xD3B4, 0x9634}, + {MISENSOR_16BIT, 0xD3B6, 0xB503}, + {MISENSOR_16BIT, 0xD3B8, 0x7902}, + {MISENSOR_16BIT, 0xD3BA, 0x1523}, + {MISENSOR_16BIT, 0xD3BC, 0x1080}, + {MISENSOR_16BIT, 0xD3BE, 0xB634}, + {MISENSOR_16BIT, 0xD3C0, 0xE001}, + {MISENSOR_16BIT, 0xD3C2, 0x1D23}, + {MISENSOR_16BIT, 0xD3C4, 0x1002}, + {MISENSOR_16BIT, 0xD3C6, 0xF00B}, + {MISENSOR_16BIT, 0xD3C8, 0x9634}, + {MISENSOR_16BIT, 0xD3CA, 0x9503}, + {MISENSOR_16BIT, 0xD3CC, 0x6038}, + {MISENSOR_16BIT, 0xD3CE, 0xB614}, + {MISENSOR_16BIT, 0xD3D0, 0x153F}, + {MISENSOR_16BIT, 0xD3D2, 0x1080}, + {MISENSOR_16BIT, 0xD3D4, 0xE001}, + {MISENSOR_16BIT, 0xD3D6, 0x1D3F}, + {MISENSOR_16BIT, 0xD3D8, 0x1002}, + {MISENSOR_16BIT, 0xD3DA, 0xFFA4}, + {MISENSOR_16BIT, 0xD3DC, 0x9602}, + {MISENSOR_16BIT, 0xD3DE, 0x7F05}, + {MISENSOR_16BIT, 0xD3E0, 0xD800}, + {MISENSOR_16BIT, 0xD3E2, 0xB6E2}, + {MISENSOR_16BIT, 0xD3E4, 0xAD05}, + {MISENSOR_16BIT, 0xD3E6, 0x0511}, + {MISENSOR_16BIT, 0xD3E8, 0x05E0}, + {MISENSOR_16BIT, 0xD3EA, 0xD800}, + {MISENSOR_16BIT, 0xD3EC, 0xC0F1}, + {MISENSOR_16BIT, 0xD3EE, 0x0CFE}, + {MISENSOR_16BIT, 0xD3F0, 0x05C0}, + {MISENSOR_16BIT, 0xD3F2, 0x0A96}, + {MISENSOR_16BIT, 0xD3F4, 0x05A0}, + {MISENSOR_16BIT, 0xD3F6, 0x7608}, + {MISENSOR_16BIT, 0xD3F8, 0x0C22}, + {MISENSOR_16BIT, 0xD3FA, 0x0240}, + {MISENSOR_16BIT, 0xD3FC, 0xE080}, + {MISENSOR_16BIT, 0xD3FE, 0x20CA}, + {MISENSOR_16BIT, 0xD400, 0x0F82}, + {MISENSOR_16BIT, 0xD402, 0x0000}, + {MISENSOR_16BIT, 0xD404, 0x190B}, + {MISENSOR_16BIT, 0xD406, 0x0C60}, + {MISENSOR_16BIT, 0xD408, 0x05A2}, + {MISENSOR_16BIT, 0xD40A, 0x21CA}, + {MISENSOR_16BIT, 0xD40C, 0x0022}, + {MISENSOR_16BIT, 0xD40E, 0x0C56}, + {MISENSOR_16BIT, 0xD410, 0x0240}, + {MISENSOR_16BIT, 0xD412, 0xE806}, + {MISENSOR_16BIT, 0xD414, 0x0E0E}, + {MISENSOR_16BIT, 0xD416, 0x0220}, + {MISENSOR_16BIT, 0xD418, 0x70C9}, + {MISENSOR_16BIT, 0xD41A, 0xF048}, + {MISENSOR_16BIT, 0xD41C, 0x0896}, + {MISENSOR_16BIT, 0xD41E, 0x0440}, + {MISENSOR_16BIT, 0xD420, 0x0E96}, + {MISENSOR_16BIT, 0xD422, 0x0400}, + {MISENSOR_16BIT, 0xD424, 0x0966}, + {MISENSOR_16BIT, 0xD426, 0x0380}, + {MISENSOR_16BIT, 0xD428, 0x75CF}, + {MISENSOR_16BIT, 0xD42A, 0xFFFF}, + {MISENSOR_16BIT, 0xD42C, 0xD4E0}, + {MISENSOR_16BIT, 0xD42E, 0x8D00}, + {MISENSOR_16BIT, 0xD430, 0x084D}, + {MISENSOR_16BIT, 0xD432, 0x001E}, + {MISENSOR_16BIT, 0xD434, 0xFF47}, + {MISENSOR_16BIT, 0xD436, 0x080D}, + {MISENSOR_16BIT, 0xD438, 0x0050}, + {MISENSOR_16BIT, 0xD43A, 0xFF57}, + {MISENSOR_16BIT, 0xD43C, 0x0841}, + {MISENSOR_16BIT, 0xD43E, 0x0051}, + {MISENSOR_16BIT, 0xD440, 0x8D04}, + {MISENSOR_16BIT, 0xD442, 0x9521}, + {MISENSOR_16BIT, 0xD444, 0xE064}, + {MISENSOR_16BIT, 0xD446, 0x790C}, + {MISENSOR_16BIT, 0xD448, 0x702F}, + {MISENSOR_16BIT, 0xD44A, 0x0CE2}, + {MISENSOR_16BIT, 0xD44C, 0x05E0}, + {MISENSOR_16BIT, 0xD44E, 0xD964}, + {MISENSOR_16BIT, 0xD450, 0x72CF}, + {MISENSOR_16BIT, 0xD452, 0xFFFF}, + {MISENSOR_16BIT, 0xD454, 0xC700}, + {MISENSOR_16BIT, 0xD456, 0x9235}, + {MISENSOR_16BIT, 0xD458, 0x0811}, + {MISENSOR_16BIT, 0xD45A, 0x0043}, + {MISENSOR_16BIT, 0xD45C, 0xFF3D}, + {MISENSOR_16BIT, 0xD45E, 0x080D}, + {MISENSOR_16BIT, 0xD460, 0x0051}, + {MISENSOR_16BIT, 0xD462, 0xD801}, + {MISENSOR_16BIT, 0xD464, 0xFF77}, + {MISENSOR_16BIT, 0xD466, 0xF025}, + {MISENSOR_16BIT, 0xD468, 0x9501}, + {MISENSOR_16BIT, 0xD46A, 0x9235}, + {MISENSOR_16BIT, 0xD46C, 0x0911}, + {MISENSOR_16BIT, 0xD46E, 0x0003}, + {MISENSOR_16BIT, 0xD470, 0xFF49}, + {MISENSOR_16BIT, 0xD472, 0x080D}, + {MISENSOR_16BIT, 0xD474, 0x0051}, + {MISENSOR_16BIT, 0xD476, 0xD800}, + {MISENSOR_16BIT, 0xD478, 0xFF72}, + {MISENSOR_16BIT, 0xD47A, 0xF01B}, + {MISENSOR_16BIT, 0xD47C, 0x0886}, + {MISENSOR_16BIT, 0xD47E, 0x03E0}, + {MISENSOR_16BIT, 0xD480, 0xD801}, + {MISENSOR_16BIT, 0xD482, 0x0EF6}, + {MISENSOR_16BIT, 0xD484, 0x03C0}, + {MISENSOR_16BIT, 0xD486, 0x0F52}, + {MISENSOR_16BIT, 0xD488, 0x0340}, + {MISENSOR_16BIT, 0xD48A, 0x0DBA}, + {MISENSOR_16BIT, 0xD48C, 0x0200}, + {MISENSOR_16BIT, 0xD48E, 0x0AF6}, + {MISENSOR_16BIT, 0xD490, 0x0440}, + {MISENSOR_16BIT, 0xD492, 0x0C22}, + {MISENSOR_16BIT, 0xD494, 0x0400}, + {MISENSOR_16BIT, 0xD496, 0x0D72}, + {MISENSOR_16BIT, 0xD498, 0x0440}, + {MISENSOR_16BIT, 0xD49A, 0x0DC2}, + {MISENSOR_16BIT, 0xD49C, 0x0200}, + {MISENSOR_16BIT, 0xD49E, 0x0972}, + {MISENSOR_16BIT, 0xD4A0, 0x0440}, + {MISENSOR_16BIT, 0xD4A2, 0x0D3A}, + {MISENSOR_16BIT, 0xD4A4, 0x0220}, + {MISENSOR_16BIT, 0xD4A6, 0xD820}, + {MISENSOR_16BIT, 0xD4A8, 0x0BFA}, + {MISENSOR_16BIT, 0xD4AA, 0x0260}, + {MISENSOR_16BIT, 0xD4AC, 0x70C9}, + {MISENSOR_16BIT, 0xD4AE, 0x0451}, + {MISENSOR_16BIT, 0xD4B0, 0x05C0}, + {MISENSOR_16BIT, 0xD4B2, 0x78E0}, + {MISENSOR_16BIT, 0xD4B4, 0xD900}, + {MISENSOR_16BIT, 0xD4B6, 0xF00A}, + {MISENSOR_16BIT, 0xD4B8, 0x70CF}, + {MISENSOR_16BIT, 0xD4BA, 0xFFFF}, + {MISENSOR_16BIT, 0xD4BC, 0xD520}, + {MISENSOR_16BIT, 0xD4BE, 0x7835}, + {MISENSOR_16BIT, 0xD4C0, 0x8041}, + {MISENSOR_16BIT, 0xD4C2, 0x8000}, + {MISENSOR_16BIT, 0xD4C4, 0xE102}, + {MISENSOR_16BIT, 0xD4C6, 0xA040}, + {MISENSOR_16BIT, 0xD4C8, 0x09F1}, + {MISENSOR_16BIT, 0xD4CA, 0x8114}, + {MISENSOR_16BIT, 0xD4CC, 0x71CF}, + {MISENSOR_16BIT, 0xD4CE, 0xFFFF}, + {MISENSOR_16BIT, 0xD4D0, 0xD4E0}, + {MISENSOR_16BIT, 0xD4D2, 0x70CF}, + {MISENSOR_16BIT, 0xD4D4, 0xFFFF}, + {MISENSOR_16BIT, 0xD4D6, 0xC594}, + {MISENSOR_16BIT, 0xD4D8, 0xB03A}, + {MISENSOR_16BIT, 0xD4DA, 0x7FE0}, + {MISENSOR_16BIT, 0xD4DC, 0xD800}, + {MISENSOR_16BIT, 0xD4DE, 0x0000}, + {MISENSOR_16BIT, 0xD4E0, 0x0000}, + {MISENSOR_16BIT, 0xD4E2, 0x0500}, + {MISENSOR_16BIT, 0xD4E4, 0x0500}, + {MISENSOR_16BIT, 0xD4E6, 0x0200}, + {MISENSOR_16BIT, 0xD4E8, 0x0330}, + {MISENSOR_16BIT, 0xD4EA, 0x0000}, + {MISENSOR_16BIT, 0xD4EC, 0x0000}, + {MISENSOR_16BIT, 0xD4EE, 0x03CD}, + {MISENSOR_16BIT, 0xD4F0, 0x050D}, + {MISENSOR_16BIT, 0xD4F2, 0x01C5}, + {MISENSOR_16BIT, 0xD4F4, 0x03B3}, + {MISENSOR_16BIT, 0xD4F6, 0x00E0}, + {MISENSOR_16BIT, 0xD4F8, 0x01E3}, + {MISENSOR_16BIT, 0xD4FA, 0x0280}, + {MISENSOR_16BIT, 0xD4FC, 0x01E0}, + {MISENSOR_16BIT, 0xD4FE, 0x0109}, + {MISENSOR_16BIT, 0xD500, 0x0080}, + {MISENSOR_16BIT, 0xD502, 0x0500}, + {MISENSOR_16BIT, 0xD504, 0x0000}, + {MISENSOR_16BIT, 0xD506, 0x0000}, + {MISENSOR_16BIT, 0xD508, 0x0000}, + {MISENSOR_16BIT, 0xD50A, 0x0000}, + {MISENSOR_16BIT, 0xD50C, 0x0000}, + {MISENSOR_16BIT, 0xD50E, 0x0000}, + {MISENSOR_16BIT, 0xD510, 0x0000}, + {MISENSOR_16BIT, 0xD512, 0x0000}, + {MISENSOR_16BIT, 0xD514, 0x0000}, + {MISENSOR_16BIT, 0xD516, 0x0000}, + {MISENSOR_16BIT, 0xD518, 0x0000}, + {MISENSOR_16BIT, 0xD51A, 0x0000}, + {MISENSOR_16BIT, 0xD51C, 0x0000}, + {MISENSOR_16BIT, 0xD51E, 0x0000}, + {MISENSOR_16BIT, 0xD520, 0xFFFF}, + {MISENSOR_16BIT, 0xD522, 0xC9B4}, + {MISENSOR_16BIT, 0xD524, 0xFFFF}, + {MISENSOR_16BIT, 0xD526, 0xD324}, + {MISENSOR_16BIT, 0xD528, 0xFFFF}, + {MISENSOR_16BIT, 0xD52A, 0xCA34}, + {MISENSOR_16BIT, 0xD52C, 0xFFFF}, + {MISENSOR_16BIT, 0xD52E, 0xD3EC}, + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xE000, 0x04B4}, + {MISENSOR_16BIT, 0xE002, 0x0302}, + {MISENSOR_16BIT, 0xE004, 0x4103}, + {MISENSOR_16BIT, 0xE006, 0x0202}, + {MISENSOR_16BIT, 0x0080, 0xFFF0}, + {MISENSOR_16BIT, 0x0080, 0xFFF1}, + + /* PGA parameter and APGA + * [Step4-APGA] [TP101_MT9M114_APGA] + */ + {MISENSOR_16BIT, 0x098E, 0x495E}, + {MISENSOR_16BIT, 0xC95E, 0x0000}, + {MISENSOR_16BIT, 0x3640, 0x02B0}, + {MISENSOR_16BIT, 0x3642, 0x8063}, + {MISENSOR_16BIT, 0x3644, 0x78D0}, + {MISENSOR_16BIT, 0x3646, 0x50CC}, + {MISENSOR_16BIT, 0x3648, 0x3511}, + {MISENSOR_16BIT, 0x364A, 0x0110}, + {MISENSOR_16BIT, 0x364C, 0xBD8A}, + {MISENSOR_16BIT, 0x364E, 0x0CD1}, + {MISENSOR_16BIT, 0x3650, 0x24ED}, + {MISENSOR_16BIT, 0x3652, 0x7C11}, + {MISENSOR_16BIT, 0x3654, 0x0150}, + {MISENSOR_16BIT, 0x3656, 0x124C}, + {MISENSOR_16BIT, 0x3658, 0x3130}, + {MISENSOR_16BIT, 0x365A, 0x508C}, + {MISENSOR_16BIT, 0x365C, 0x21F1}, + {MISENSOR_16BIT, 0x365E, 0x0090}, + {MISENSOR_16BIT, 0x3660, 0xBFCA}, + {MISENSOR_16BIT, 0x3662, 0x0A11}, + {MISENSOR_16BIT, 0x3664, 0x4F4B}, + {MISENSOR_16BIT, 0x3666, 0x28B1}, + {MISENSOR_16BIT, 0x3680, 0x50A9}, + {MISENSOR_16BIT, 0x3682, 0xA04B}, + {MISENSOR_16BIT, 0x3684, 0x0E2D}, + {MISENSOR_16BIT, 0x3686, 0x73EC}, + {MISENSOR_16BIT, 0x3688, 0x164F}, + {MISENSOR_16BIT, 0x368A, 0xF829}, + {MISENSOR_16BIT, 0x368C, 0xC1A8}, + {MISENSOR_16BIT, 0x368E, 0xB0EC}, + {MISENSOR_16BIT, 0x3690, 0xE76A}, + {MISENSOR_16BIT, 0x3692, 0x69AF}, + {MISENSOR_16BIT, 0x3694, 0x378C}, + {MISENSOR_16BIT, 0x3696, 0xA70D}, + {MISENSOR_16BIT, 0x3698, 0x884F}, + {MISENSOR_16BIT, 0x369A, 0xEE8B}, + {MISENSOR_16BIT, 0x369C, 0x5DEF}, + {MISENSOR_16BIT, 0x369E, 0x27CC}, + {MISENSOR_16BIT, 0x36A0, 0xCAAC}, + {MISENSOR_16BIT, 0x36A2, 0x840E}, + {MISENSOR_16BIT, 0x36A4, 0xDAA9}, + {MISENSOR_16BIT, 0x36A6, 0xF00C}, + {MISENSOR_16BIT, 0x36C0, 0x1371}, + {MISENSOR_16BIT, 0x36C2, 0x272F}, + {MISENSOR_16BIT, 0x36C4, 0x2293}, + {MISENSOR_16BIT, 0x36C6, 0xE6D0}, + {MISENSOR_16BIT, 0x36C8, 0xEC32}, + {MISENSOR_16BIT, 0x36CA, 0x11B1}, + {MISENSOR_16BIT, 0x36CC, 0x7BAF}, + {MISENSOR_16BIT, 0x36CE, 0x5813}, + {MISENSOR_16BIT, 0x36D0, 0xB871}, + {MISENSOR_16BIT, 0x36D2, 0x8913}, + {MISENSOR_16BIT, 0x36D4, 0x4610}, + {MISENSOR_16BIT, 0x36D6, 0x7EEE}, + {MISENSOR_16BIT, 0x36D8, 0x0DF3}, + {MISENSOR_16BIT, 0x36DA, 0xB84F}, + {MISENSOR_16BIT, 0x36DC, 0xB532}, + {MISENSOR_16BIT, 0x36DE, 0x1171}, + {MISENSOR_16BIT, 0x36E0, 0x13CF}, + {MISENSOR_16BIT, 0x36E2, 0x22F3}, + {MISENSOR_16BIT, 0x36E4, 0xE090}, + {MISENSOR_16BIT, 0x36E6, 0x8133}, + {MISENSOR_16BIT, 0x3700, 0x88AE}, + {MISENSOR_16BIT, 0x3702, 0x00EA}, + {MISENSOR_16BIT, 0x3704, 0x344F}, + {MISENSOR_16BIT, 0x3706, 0xEC88}, + {MISENSOR_16BIT, 0x3708, 0x3E91}, + {MISENSOR_16BIT, 0x370A, 0xF12D}, + {MISENSOR_16BIT, 0x370C, 0xB0EF}, + {MISENSOR_16BIT, 0x370E, 0x77CD}, + {MISENSOR_16BIT, 0x3710, 0x7930}, + {MISENSOR_16BIT, 0x3712, 0x5C12}, + {MISENSOR_16BIT, 0x3714, 0x500C}, + {MISENSOR_16BIT, 0x3716, 0x22CE}, + {MISENSOR_16BIT, 0x3718, 0x2370}, + {MISENSOR_16BIT, 0x371A, 0x258F}, + {MISENSOR_16BIT, 0x371C, 0x3D30}, + {MISENSOR_16BIT, 0x371E, 0x370C}, + {MISENSOR_16BIT, 0x3720, 0x03ED}, + {MISENSOR_16BIT, 0x3722, 0x9AD0}, + {MISENSOR_16BIT, 0x3724, 0x7ECF}, + {MISENSOR_16BIT, 0x3726, 0x1093}, + {MISENSOR_16BIT, 0x3740, 0x2391}, + {MISENSOR_16BIT, 0x3742, 0xAAD0}, + {MISENSOR_16BIT, 0x3744, 0x28F2}, + {MISENSOR_16BIT, 0x3746, 0xBA4F}, + {MISENSOR_16BIT, 0x3748, 0xC536}, + {MISENSOR_16BIT, 0x374A, 0x1472}, + {MISENSOR_16BIT, 0x374C, 0xD110}, + {MISENSOR_16BIT, 0x374E, 0x2933}, + {MISENSOR_16BIT, 0x3750, 0xD0D1}, + {MISENSOR_16BIT, 0x3752, 0x9F37}, + {MISENSOR_16BIT, 0x3754, 0x34D1}, + {MISENSOR_16BIT, 0x3756, 0x1C6C}, + {MISENSOR_16BIT, 0x3758, 0x3FD2}, + {MISENSOR_16BIT, 0x375A, 0xCB72}, + {MISENSOR_16BIT, 0x375C, 0xBA96}, + {MISENSOR_16BIT, 0x375E, 0x1551}, + {MISENSOR_16BIT, 0x3760, 0xB74F}, + {MISENSOR_16BIT, 0x3762, 0x1672}, + {MISENSOR_16BIT, 0x3764, 0x84F1}, + {MISENSOR_16BIT, 0x3766, 0xC2D6}, + {MISENSOR_16BIT, 0x3782, 0x01E0}, + {MISENSOR_16BIT, 0x3784, 0x0280}, + {MISENSOR_16BIT, 0x37C0, 0xA6EA}, + {MISENSOR_16BIT, 0x37C2, 0x874B}, + {MISENSOR_16BIT, 0x37C4, 0x85CB}, + {MISENSOR_16BIT, 0x37C6, 0x968A}, + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xC960, 0x0AF0}, + {MISENSOR_16BIT, 0xC962, 0x79E2}, + {MISENSOR_16BIT, 0xC964, 0x5EC8}, + {MISENSOR_16BIT, 0xC966, 0x791F}, + {MISENSOR_16BIT, 0xC968, 0x76EE}, + {MISENSOR_16BIT, 0xC96A, 0x0FA0}, + {MISENSOR_16BIT, 0xC96C, 0x7DFA}, + {MISENSOR_16BIT, 0xC96E, 0x7DAF}, + {MISENSOR_16BIT, 0xC970, 0x7E02}, + {MISENSOR_16BIT, 0xC972, 0x7E0A}, + {MISENSOR_16BIT, 0xC974, 0x1964}, + {MISENSOR_16BIT, 0xC976, 0x7CDC}, + {MISENSOR_16BIT, 0xC978, 0x7838}, + {MISENSOR_16BIT, 0xC97A, 0x7C2F}, + {MISENSOR_16BIT, 0xC97C, 0x7792}, + {MISENSOR_16BIT, 0xC95E, 0x0003}, + + /* [Step4-APGA] */ + {MISENSOR_16BIT, 0x098E, 0x0000}, + {MISENSOR_16BIT, 0xC95E, 0x0003}, + + /* [Step5-AWB_CCM]1: LOAD=CCM */ + {MISENSOR_16BIT, 0xC892, 0x0267}, + {MISENSOR_16BIT, 0xC894, 0xFF1A}, + {MISENSOR_16BIT, 0xC896, 0xFFB3}, + {MISENSOR_16BIT, 0xC898, 0xFF80}, + {MISENSOR_16BIT, 0xC89A, 0x0166}, + {MISENSOR_16BIT, 0xC89C, 0x0003}, + {MISENSOR_16BIT, 0xC89E, 0xFF9A}, + {MISENSOR_16BIT, 0xC8A0, 0xFEB4}, + {MISENSOR_16BIT, 0xC8A2, 0x024D}, + {MISENSOR_16BIT, 0xC8A4, 0x01BF}, + {MISENSOR_16BIT, 0xC8A6, 0xFF01}, + {MISENSOR_16BIT, 0xC8A8, 0xFFF3}, + {MISENSOR_16BIT, 0xC8AA, 0xFF75}, + {MISENSOR_16BIT, 0xC8AC, 0x0198}, + {MISENSOR_16BIT, 0xC8AE, 0xFFFD}, + {MISENSOR_16BIT, 0xC8B0, 0xFF9A}, + {MISENSOR_16BIT, 0xC8B2, 0xFEE7}, + {MISENSOR_16BIT, 0xC8B4, 0x02A8}, + {MISENSOR_16BIT, 0xC8B6, 0x01D9}, + {MISENSOR_16BIT, 0xC8B8, 0xFF26}, + {MISENSOR_16BIT, 0xC8BA, 0xFFF3}, + {MISENSOR_16BIT, 0xC8BC, 0xFFB3}, + {MISENSOR_16BIT, 0xC8BE, 0x0132}, + {MISENSOR_16BIT, 0xC8C0, 0xFFE8}, + {MISENSOR_16BIT, 0xC8C2, 0xFFDA}, + {MISENSOR_16BIT, 0xC8C4, 0xFECD}, + {MISENSOR_16BIT, 0xC8C6, 0x02C2}, + {MISENSOR_16BIT, 0xC8C8, 0x0075}, + {MISENSOR_16BIT, 0xC8CA, 0x011C}, + {MISENSOR_16BIT, 0xC8CC, 0x009A}, + {MISENSOR_16BIT, 0xC8CE, 0x0105}, + {MISENSOR_16BIT, 0xC8D0, 0x00A4}, + {MISENSOR_16BIT, 0xC8D2, 0x00AC}, + {MISENSOR_16BIT, 0xC8D4, 0x0A8C}, + {MISENSOR_16BIT, 0xC8D6, 0x0F0A}, + {MISENSOR_16BIT, 0xC8D8, 0x1964}, + + /* LOAD=AWB */ + {MISENSOR_16BIT, 0xC914, 0x0000}, + {MISENSOR_16BIT, 0xC916, 0x0000}, + {MISENSOR_16BIT, 0xC918, 0x04FF}, + {MISENSOR_16BIT, 0xC91A, 0x02CF}, + {MISENSOR_16BIT, 0xC904, 0x0033}, + {MISENSOR_16BIT, 0xC906, 0x0040}, + {MISENSOR_8BIT, 0xC8F2, 0x03}, + {MISENSOR_8BIT, 0xC8F3, 0x02}, + {MISENSOR_16BIT, 0xC906, 0x003C}, + {MISENSOR_16BIT, 0xC8F4, 0x0000}, + {MISENSOR_16BIT, 0xC8F6, 0x0000}, + {MISENSOR_16BIT, 0xC8F8, 0x0000}, + {MISENSOR_16BIT, 0xC8FA, 0xE724}, + {MISENSOR_16BIT, 0xC8FC, 0x1583}, + {MISENSOR_16BIT, 0xC8FE, 0x2045}, + {MISENSOR_16BIT, 0xC900, 0x05DC}, + {MISENSOR_16BIT, 0xC902, 0x007C}, + {MISENSOR_8BIT, 0xC90C, 0x80}, + {MISENSOR_8BIT, 0xC90D, 0x80}, + {MISENSOR_8BIT, 0xC90E, 0x80}, + {MISENSOR_8BIT, 0xC90F, 0x88}, + {MISENSOR_8BIT, 0xC910, 0x80}, + {MISENSOR_8BIT, 0xC911, 0x80}, + + /* LOAD=Step7-CPIPE_Preference */ + {MISENSOR_16BIT, 0xC926, 0x0020}, + {MISENSOR_16BIT, 0xC928, 0x009A}, + {MISENSOR_16BIT, 0xC946, 0x0070}, + {MISENSOR_16BIT, 0xC948, 0x00F3}, + {MISENSOR_16BIT, 0xC952, 0x0020}, + {MISENSOR_16BIT, 0xC954, 0x009A}, + {MISENSOR_8BIT, 0xC92A, 0x80}, + {MISENSOR_8BIT, 0xC92B, 0x4B}, + {MISENSOR_8BIT, 0xC92C, 0x00}, + {MISENSOR_8BIT, 0xC92D, 0xFF}, + {MISENSOR_8BIT, 0xC92E, 0x3C}, + {MISENSOR_8BIT, 0xC92F, 0x02}, + {MISENSOR_8BIT, 0xC930, 0x06}, + {MISENSOR_8BIT, 0xC931, 0x64}, + {MISENSOR_8BIT, 0xC932, 0x01}, + {MISENSOR_8BIT, 0xC933, 0x0C}, + {MISENSOR_8BIT, 0xC934, 0x3C}, + {MISENSOR_8BIT, 0xC935, 0x3C}, + {MISENSOR_8BIT, 0xC936, 0x3C}, + {MISENSOR_8BIT, 0xC937, 0x0F}, + {MISENSOR_8BIT, 0xC938, 0x64}, + {MISENSOR_8BIT, 0xC939, 0x64}, + {MISENSOR_8BIT, 0xC93A, 0x64}, + {MISENSOR_8BIT, 0xC93B, 0x32}, + {MISENSOR_16BIT, 0xC93C, 0x0020}, + {MISENSOR_16BIT, 0xC93E, 0x009A}, + {MISENSOR_16BIT, 0xC940, 0x00DC}, + {MISENSOR_8BIT, 0xC942, 0x38}, + {MISENSOR_8BIT, 0xC943, 0x30}, + {MISENSOR_8BIT, 0xC944, 0x50}, + {MISENSOR_8BIT, 0xC945, 0x19}, + {MISENSOR_16BIT, 0xC94A, 0x0230}, + {MISENSOR_16BIT, 0xC94C, 0x0010}, + {MISENSOR_16BIT, 0xC94E, 0x01CD}, + {MISENSOR_8BIT, 0xC950, 0x05}, + {MISENSOR_8BIT, 0xC951, 0x40}, + {MISENSOR_8BIT, 0xC87B, 0x1B}, + {MISENSOR_8BIT, 0xC878, 0x0E}, + {MISENSOR_16BIT, 0xC890, 0x0080}, + {MISENSOR_16BIT, 0xC886, 0x0100}, + {MISENSOR_16BIT, 0xC87C, 0x005A}, + {MISENSOR_8BIT, 0xB42A, 0x05}, + {MISENSOR_8BIT, 0xA80A, 0x20}, + + /* Speed up AE/AWB */ + {MISENSOR_16BIT, 0x098E, 0x2802}, + {MISENSOR_16BIT, 0xA802, 0x0008}, + {MISENSOR_8BIT, 0xC908, 0x01}, + {MISENSOR_8BIT, 0xC879, 0x01}, + {MISENSOR_8BIT, 0xC909, 0x02}, + {MISENSOR_8BIT, 0xA80A, 0x18}, + {MISENSOR_8BIT, 0xA80B, 0x18}, + {MISENSOR_8BIT, 0xAC16, 0x18}, + {MISENSOR_8BIT, 0xC878, 0x0E}, + + {MISENSOR_TOK_TERM, 0, 0} +}; + +#endif +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h new file mode 100644 index 0000000000000..bde2f148184dc --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -0,0 +1,858 @@ +/* + * Support for OmniVision OV2680 5M camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __OV2680_H__ +#define __OV2680_H__ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../include/linux/atomisp_platform.h" + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define OV2680_FOCAL_LENGTH_NUM 334 /*3.34mm*/ +#define OV2680_FOCAL_LENGTH_DEM 100 +#define OV2680_F_NUMBER_DEFAULT_NUM 24 +#define OV2680_F_NUMBER_DEM 10 + +#define OV2680_BIN_FACTOR_MAX 4 + +#define MAX_FMTS 1 + +/* sensor_mode_data read_mode adaptation */ +#define OV2680_READ_MODE_BINNING_ON 0x0400 +#define OV2680_READ_MODE_BINNING_OFF 0x00 +#define OV2680_INTEGRATION_TIME_MARGIN 8 + +#define OV2680_MAX_EXPOSURE_VALUE 0xFFF1 +#define OV2680_MAX_GAIN_VALUE 0xFF + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2680_FOCAL_LENGTH_DEFAULT 0x1B70064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2680_F_NUMBER_DEFAULT 0x18000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define OV2680_F_NUMBER_RANGE 0x180a180a +#define OV2680_ID 0x2680 + +#define OV2680_FINE_INTG_TIME_MIN 0 +#define OV2680_FINE_INTG_TIME_MAX_MARGIN 0 +#define OV2680_COARSE_INTG_TIME_MIN 1 +#define OV2680_COARSE_INTG_TIME_MAX_MARGIN 6 + +/* + * OV2680 System control registers + */ +#define OV2680_SW_SLEEP 0x0100 +#define OV2680_SW_RESET 0x0103 +#define OV2680_SW_STREAM 0x0100 + +#define OV2680_SC_CMMN_CHIP_ID_H 0x300A +#define OV2680_SC_CMMN_CHIP_ID_L 0x300B +#define OV2680_SC_CMMN_SCCB_ID 0x302B /* 0x300C*/ +#define OV2680_SC_CMMN_SUB_ID 0x302A /* process, version*/ + +#define OV2680_GROUP_ACCESS 0x3208 /*Bit[7:4] Group control, Bit[3:0] Group ID*/ + +#define OV2680_EXPOSURE_H 0x3500 /*Bit[3:0] Bit[19:16] of exposure, remaining 16 bits lies in Reg0x3501&Reg0x3502*/ +#define OV2680_EXPOSURE_M 0x3501 +#define OV2680_EXPOSURE_L 0x3502 +#define OV2680_AGC_H 0x350A /*Bit[1:0] means Bit[9:8] of gain*/ +#define OV2680_AGC_L 0x350B /*Bit[7:0] of gain*/ + +#define OV2680_HORIZONTAL_START_H 0x3800 /*Bit[11:8]*/ +#define OV2680_HORIZONTAL_START_L 0x3801 /*Bit[7:0]*/ +#define OV2680_VERTICAL_START_H 0x3802 /*Bit[11:8]*/ +#define OV2680_VERTICAL_START_L 0x3803 /*Bit[7:0]*/ +#define OV2680_HORIZONTAL_END_H 0x3804 /*Bit[11:8]*/ +#define OV2680_HORIZONTAL_END_L 0x3805 /*Bit[7:0]*/ +#define OV2680_VERTICAL_END_H 0x3806 /*Bit[11:8]*/ +#define OV2680_VERTICAL_END_L 0x3807 /*Bit[7:0]*/ +#define OV2680_HORIZONTAL_OUTPUT_SIZE_H 0x3808 /*Bit[3:0]*/ +#define OV2680_HORIZONTAL_OUTPUT_SIZE_L 0x3809 /*Bit[7:0]*/ +#define OV2680_VERTICAL_OUTPUT_SIZE_H 0x380a /*Bit[3:0]*/ +#define OV2680_VERTICAL_OUTPUT_SIZE_L 0x380b /*Bit[7:0]*/ +#define OV2680_TIMING_HTS_H 0x380C /*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV2680_TIMING_HTS_L 0x380D /*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV2680_TIMING_VTS_H 0x380e /*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV2680_TIMING_VTS_L 0x380f /*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV2680_FRAME_OFF_NUM 0x4202 + +/*Flip/Mirror*/ +#define OV2680_FLIP_REG 0x3820 +#define OV2680_MIRROR_REG 0x3821 +#define OV2680_FLIP_BIT 1 +#define OV2680_MIRROR_BIT 2 +#define OV2680_FLIP_MIRROR_BIT_ENABLE 4 + +#define OV2680_MWB_RED_GAIN_H 0x5004/*0x3400*/ +#define OV2680_MWB_GREEN_GAIN_H 0x5006/*0x3402*/ +#define OV2680_MWB_BLUE_GAIN_H 0x5008/*0x3404*/ +#define OV2680_MWB_GAIN_MAX 0x0fff + +#define OV2680_START_STREAMING 0x01 +#define OV2680_STOP_STREAMING 0x00 + + +#define OV2680_INVALID_CONFIG 0xffffffff + + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct ov2680_resolution { + u8 *desc; + const struct ov2680_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; +}; + +struct ov2680_format { + u8 *desc; + u32 pixelformat; + struct ov2680_reg *regs; +}; + + /* + * ov2680 device structure. + */ + struct ov2680_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + int fmt_idx; + int run_mode; + u8 res; + u8 type; + }; + + enum ov2680_tok_type { + OV2680_8BIT = 0x0001, + OV2680_16BIT = 0x0002, + OV2680_32BIT = 0x0004, + OV2680_TOK_TERM = 0xf000, /* terminating token for reg list */ + OV2680_TOK_DELAY = 0xfe00, /* delay token for reg list */ + OV2680_TOK_MASK = 0xfff0 + }; + + /** + * struct ov2680_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ + struct ov2680_reg { + enum ov2680_tok_type type; + u16 reg; + u32 val; /* @set value for read/mod/write, @mask */ + }; + + #define to_ov2680_sensor(x) container_of(x, struct ov2680_device, sd) + + #define OV2680_MAX_WRITE_BUF_SIZE 30 + + struct ov2680_write_buffer { + u16 addr; + u8 data[OV2680_MAX_WRITE_BUF_SIZE]; + }; + + struct ov2680_write_ctrl { + int index; + struct ov2680_write_buffer buffer; + }; + + static struct ov2680_reg const ov2680_global_setting[] = { + {OV2680_8BIT, 0x0103, 0x01}, + {OV2680_8BIT, 0x3002, 0x00}, + {OV2680_8BIT, 0x3016, 0x1c}, + {OV2680_8BIT, 0x3018, 0x44}, + {OV2680_8BIT, 0x3020, 0x00}, + {OV2680_8BIT, 0x3080, 0x02}, + {OV2680_8BIT, 0x3082, 0x45}, + {OV2680_8BIT, 0x3084, 0x09}, + {OV2680_8BIT, 0x3085, 0x04}, + {OV2680_8BIT, 0x3503, 0x03}, + {OV2680_8BIT, 0x350b, 0x36}, + {OV2680_8BIT, 0x3600, 0xb4}, + {OV2680_8BIT, 0x3603, 0x39}, + {OV2680_8BIT, 0x3604, 0x24}, + {OV2680_8BIT, 0x3605, 0x00}, + {OV2680_8BIT, 0x3620, 0x26}, + {OV2680_8BIT, 0x3621, 0x37}, + {OV2680_8BIT, 0x3622, 0x04}, + {OV2680_8BIT, 0x3628, 0x00}, + {OV2680_8BIT, 0x3705, 0x3c}, + {OV2680_8BIT, 0x370c, 0x50}, + {OV2680_8BIT, 0x370d, 0xc0}, + {OV2680_8BIT, 0x3718, 0x88}, + {OV2680_8BIT, 0x3720, 0x00}, + {OV2680_8BIT, 0x3721, 0x00}, + {OV2680_8BIT, 0x3722, 0x00}, + {OV2680_8BIT, 0x3723, 0x00}, + {OV2680_8BIT, 0x3738, 0x00}, + {OV2680_8BIT, 0x3717, 0x58}, + {OV2680_8BIT, 0x3781, 0x80}, + {OV2680_8BIT, 0x3789, 0x60}, + {OV2680_8BIT, 0x3800, 0x00}, + {OV2680_8BIT, 0x3819, 0x04}, + {OV2680_8BIT, 0x4000, 0x81}, + {OV2680_8BIT, 0x4001, 0x40}, + {OV2680_8BIT, 0x4602, 0x02}, + {OV2680_8BIT, 0x481f, 0x36}, + {OV2680_8BIT, 0x4825, 0x36}, + {OV2680_8BIT, 0x4837, 0x18}, + {OV2680_8BIT, 0x5002, 0x30}, + {OV2680_8BIT, 0x5004, 0x04},//manual awb 1x + {OV2680_8BIT, 0x5005, 0x00}, + {OV2680_8BIT, 0x5006, 0x04}, + {OV2680_8BIT, 0x5007, 0x00}, + {OV2680_8BIT, 0x5008, 0x04}, + {OV2680_8BIT, 0x5009, 0x00}, + {OV2680_8BIT, 0x5080, 0x00}, + {OV2680_8BIT, 0x3701, 0x64}, //add on 14/05/13 + {OV2680_8BIT, 0x3784, 0x0c}, //based OV2680_R1A_AM10.ovt add on 14/06/13 + {OV2680_8BIT, 0x5780, 0x3e}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {OV2680_8BIT, 0x5781, 0x0f}, + {OV2680_8BIT, 0x5782, 0x04}, + {OV2680_8BIT, 0x5783, 0x02}, + {OV2680_8BIT, 0x5784, 0x01}, + {OV2680_8BIT, 0x5785, 0x01}, + {OV2680_8BIT, 0x5786, 0x00}, + {OV2680_8BIT, 0x5787, 0x04}, + {OV2680_8BIT, 0x5788, 0x02}, + {OV2680_8BIT, 0x5789, 0x00}, + {OV2680_8BIT, 0x578a, 0x01}, + {OV2680_8BIT, 0x578b, 0x02}, + {OV2680_8BIT, 0x578c, 0x03}, + {OV2680_8BIT, 0x578d, 0x03}, + {OV2680_8BIT, 0x578e, 0x08}, + {OV2680_8BIT, 0x578f, 0x0c}, + {OV2680_8BIT, 0x5790, 0x08}, + {OV2680_8BIT, 0x5791, 0x04}, + {OV2680_8BIT, 0x5792, 0x00}, + {OV2680_8BIT, 0x5793, 0x00}, + {OV2680_8BIT, 0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {OV2680_8BIT, 0x0100, 0x00}, //stream off + + {OV2680_TOK_TERM, 0, 0} + }; + + +#if 0 /* None of the definitions below are used currently */ + /* + * 176x144 30fps VBlanking 1lane 10Bit (binning) + */ + static struct ov2680_reg const ov2680_QCIF_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xaf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x47}, + {OV2680_8BIT, 0x3808, 0x00}, + {OV2680_8BIT, 0x3809, 0xC0}, + {OV2680_8BIT, 0x380a, 0x00}, + {OV2680_8BIT, 0x380b, 0xa0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4000, 0x81}, + {OV2680_8BIT, 0x4001, 0x40}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} + }; + + /* + * 352x288 30fps VBlanking 1lane 10Bit (binning) + */ + static struct ov2680_reg const ov2680_CIF_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x03}, + {OV2680_8BIT, 0x3805, 0x8f}, + {OV2680_8BIT, 0x3806, 0x02}, + {OV2680_8BIT, 0x3807, 0xe7}, + {OV2680_8BIT, 0x3808, 0x01}, + {OV2680_8BIT, 0x3809, 0x70}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0x30}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} + }; + + /* + * 336x256 30fps VBlanking 1lane 10Bit (binning) + */ + static struct ov2680_reg const ov2680_QVGA_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x03}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x02}, + {OV2680_8BIT, 0x3807, 0x87}, + {OV2680_8BIT, 0x3808, 0x01}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0x00}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} + }; + + + /* + * 656x496 30fps VBlanking 1lane 10Bit (binning) + */ + static struct ov2680_reg const ov2680_656x496_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xcf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x67}, + {OV2680_8BIT, 0x3808, 0x02}, + {OV2680_8BIT, 0x3809, 0x90}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0xf0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} + }; + /* + * 800x600 30fps VBlanking 1lane 10Bit (binning) + */ + static struct ov2680_reg const ov2680_720x592_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x26}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0x00}, // X_ADDR_START; + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, // Y_ADDR_START; + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xaf}, // X_ADDR_END; + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xaf}, // Y_ADDR_END; + {OV2680_8BIT, 0x3808, 0x02}, + {OV2680_8BIT, 0x3809, 0xd0}, // X_OUTPUT_SIZE; + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0x50}, // Y_OUTPUT_SIZE; + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xac}, // HTS; + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, // VTS; + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5708, 0x00}, + {OV2680_8BIT, 0x5704, 0x02}, + {OV2680_8BIT, 0x5705, 0xd0}, // X_WIN; + {OV2680_8BIT, 0x5706, 0x02}, + {OV2680_8BIT, 0x5707, 0x50}, // Y_WIN; + {OV2680_8BIT, 0x3820, 0xc2}, // FLIP_FORMAT; + {OV2680_8BIT, 0x3821, 0x01}, // MIRROR_FORMAT; + {OV2680_8BIT, 0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; + // BIT[3]: Mirror order, BG or GB; + // BIT[2]: Flip order, BR or RB; + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} + }; + /* + * 800x600 30fps VBlanking 1lane 10Bit (binning) + */ + static struct ov2680_reg const ov2680_800x600_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x26}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x03}, + {OV2680_8BIT, 0x3809, 0x20}, + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0x58}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xac}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x5708, 0x00}, + {OV2680_8BIT, 0x5704, 0x03}, + {OV2680_8BIT, 0x5705, 0x20}, + {OV2680_8BIT, 0x5706, 0x02}, + {OV2680_8BIT, 0x5707, 0x58}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + {OV2680_8BIT, 0x5090, 0x00}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} + }; + + /* + * 720p=1280*720 30fps VBlanking 1lane 10Bit (no-Scaling) + */ + static struct ov2680_reg const ov2680_720p_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0xf2}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xbf}, + {OV2680_8BIT, 0x3806, 0x03}, + {OV2680_8BIT, 0x3807, 0xdd}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0x10}, + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0xe0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x06}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} + }; + + /* + * 1296x976 30fps VBlanking 1lane 10Bit(no-scaling) + */ + static struct ov2680_reg const ov2680_1296x976_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xbf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x57}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0x10}, + {OV2680_8BIT, 0x380a, 0x03}, + {OV2680_8BIT, 0x380b, 0xd0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x08}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, //miror/flip + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} + }; + + /* + * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling) + */ + static struct ov2680_reg const ov2680_1456x1096_30fps[]= { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x90}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xC0}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0xb0}, + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0x48}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} + }; +#endif + + /* + *1616x916 30fps VBlanking 1lane 10bit + */ + + static struct ov2680_reg const ov2680_1616x916_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x96}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x39}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x03}, + {OV2680_8BIT, 0x380b, 0x94}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x08}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x03}, + {OV2680_8BIT, 0x5707, 0x94}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_TOK_TERM, 0, 0} + }; + + /* + * 1612x1212 30fps VBlanking 1lane 10Bit + */ +#if 0 + static struct ov2680_reg const ov2680_1616x1082_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x86}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0x3a}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x04}, + {OV2680_8BIT, 0x5707, 0x3a}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} + }; +#endif + /* + * 1616x1216 30fps VBlanking 1lane 10Bit + */ + static struct ov2680_reg const ov2680_1616x1216_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50},//50},//4line for mirror and flip + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0xc0},//c0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x0b}, + {OV2680_8BIT, 0x5081, 0x01}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x04}, + {OV2680_8BIT, 0x5707, 0xcc}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_TOK_TERM, 0, 0} + }; + + static struct ov2680_resolution ov2680_res_preview[] = { + { + .desc = "ov2680_1616x1216_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 66, + .fps = 30, + .used = 0, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1616x1216_30fps, + }, + { + .desc = "ov2680_1616x916_30fps", + .width = 1616, + .height = 916, + .fps = 30, + .pix_clk_freq = 66, + .used = 0, + .pixels_per_line = 1698,//1704, + .lines_per_frame = 1294, + .bin_factor_x = 0, + .bin_factor_y = 0, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2680_1616x916_30fps, + }, +}; +#define N_RES_PREVIEW (ARRAY_SIZE(ov2680_res_preview)) + +static struct ov2680_resolution *ov2680_res = ov2680_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; + +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov2722.h b/drivers/staging/media/atomisp/i2c/ov2722.h new file mode 100644 index 0000000000000..d99188a5c9d07 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov2722.h @@ -0,0 +1,1268 @@ +/* + * Support for OmniVision OV2722 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __OV2722_H__ +#define __OV2722_H__ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../include/linux/atomisp_platform.h" + +#define OV2722_POWER_UP_RETRY_NUM 5 + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define OV2722_FOCAL_LENGTH_NUM 278 /*2.78mm*/ +#define OV2722_FOCAL_LENGTH_DEM 100 +#define OV2722_F_NUMBER_DEFAULT_NUM 26 +#define OV2722_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV2722_F_NUMBER_DEFAULT 0x1a000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define OV2722_F_NUMBER_RANGE 0x1a0a1a0a +#define OV2720_ID 0x2720 +#define OV2722_ID 0x2722 + +#define OV2722_FINE_INTG_TIME_MIN 0 +#define OV2722_FINE_INTG_TIME_MAX_MARGIN 0 +#define OV2722_COARSE_INTG_TIME_MIN 1 +#define OV2722_COARSE_INTG_TIME_MAX_MARGIN 4 + +/* + * OV2722 System control registers + */ +#define OV2722_SW_SLEEP 0x0100 +#define OV2722_SW_RESET 0x0103 +#define OV2722_SW_STREAM 0x0100 + +#define OV2722_SC_CMMN_CHIP_ID_H 0x300A +#define OV2722_SC_CMMN_CHIP_ID_L 0x300B +#define OV2722_SC_CMMN_SCCB_ID 0x300C +#define OV2722_SC_CMMN_SUB_ID 0x302A /* process, version*/ + +#define OV2722_SC_CMMN_PAD_OEN0 0x3000 +#define OV2722_SC_CMMN_PAD_OEN1 0x3001 +#define OV2722_SC_CMMN_PAD_OEN2 0x3002 +#define OV2722_SC_CMMN_PAD_OUT0 0x3008 +#define OV2722_SC_CMMN_PAD_OUT1 0x3009 +#define OV2722_SC_CMMN_PAD_OUT2 0x300D +#define OV2722_SC_CMMN_PAD_SEL0 0x300E +#define OV2722_SC_CMMN_PAD_SEL1 0x300F +#define OV2722_SC_CMMN_PAD_SEL2 0x3010 + +#define OV2722_SC_CMMN_PAD_PK 0x3011 +#define OV2722_SC_CMMN_A_PWC_PK_O_13 0x3013 +#define OV2722_SC_CMMN_A_PWC_PK_O_14 0x3014 + +#define OV2722_SC_CMMN_CLKRST0 0x301A +#define OV2722_SC_CMMN_CLKRST1 0x301B +#define OV2722_SC_CMMN_CLKRST2 0x301C +#define OV2722_SC_CMMN_CLKRST3 0x301D +#define OV2722_SC_CMMN_CLKRST4 0x301E +#define OV2722_SC_CMMN_CLKRST5 0x3005 +#define OV2722_SC_CMMN_PCLK_DIV_CTRL 0x3007 +#define OV2722_SC_CMMN_CLOCK_SEL 0x3020 +#define OV2722_SC_SOC_CLKRST5 0x3040 + +#define OV2722_SC_CMMN_PLL_CTRL0 0x3034 +#define OV2722_SC_CMMN_PLL_CTRL1 0x3035 +#define OV2722_SC_CMMN_PLL_CTRL2 0x3039 +#define OV2722_SC_CMMN_PLL_CTRL3 0x3037 +#define OV2722_SC_CMMN_PLL_MULTIPLIER 0x3036 +#define OV2722_SC_CMMN_PLL_DEBUG_OPT 0x3038 +#define OV2722_SC_CMMN_PLLS_CTRL0 0x303A +#define OV2722_SC_CMMN_PLLS_CTRL1 0x303B +#define OV2722_SC_CMMN_PLLS_CTRL2 0x303C +#define OV2722_SC_CMMN_PLLS_CTRL3 0x303D + +#define OV2722_SC_CMMN_MIPI_PHY_16 0x3016 +#define OV2722_SC_CMMN_MIPI_PHY_17 0x3017 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_18 0x3018 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_19 0x3019 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_21 0x3021 +#define OV2722_SC_CMMN_MIPI_SC_CTRL_22 0x3022 + +#define OV2722_AEC_PK_EXPO_H 0x3500 +#define OV2722_AEC_PK_EXPO_M 0x3501 +#define OV2722_AEC_PK_EXPO_L 0x3502 +#define OV2722_AEC_MANUAL_CTRL 0x3503 +#define OV2722_AGC_ADJ_H 0x3508 +#define OV2722_AGC_ADJ_L 0x3509 +#define OV2722_VTS_DIFF_H 0x350c +#define OV2722_VTS_DIFF_L 0x350d +#define OV2722_GROUP_ACCESS 0x3208 +#define OV2722_HTS_H 0x380c +#define OV2722_HTS_L 0x380d +#define OV2722_VTS_H 0x380e +#define OV2722_VTS_L 0x380f + +#define OV2722_MWB_GAIN_R_H 0x5186 +#define OV2722_MWB_GAIN_R_L 0x5187 +#define OV2722_MWB_GAIN_G_H 0x5188 +#define OV2722_MWB_GAIN_G_L 0x5189 +#define OV2722_MWB_GAIN_B_H 0x518a +#define OV2722_MWB_GAIN_B_L 0x518b + +#define OV2722_H_CROP_START_H 0x3800 +#define OV2722_H_CROP_START_L 0x3801 +#define OV2722_V_CROP_START_H 0x3802 +#define OV2722_V_CROP_START_L 0x3803 +#define OV2722_H_CROP_END_H 0x3804 +#define OV2722_H_CROP_END_L 0x3805 +#define OV2722_V_CROP_END_H 0x3806 +#define OV2722_V_CROP_END_L 0x3807 +#define OV2722_H_OUTSIZE_H 0x3808 +#define OV2722_H_OUTSIZE_L 0x3809 +#define OV2722_V_OUTSIZE_H 0x380a +#define OV2722_V_OUTSIZE_L 0x380b + +#define OV2722_START_STREAMING 0x01 +#define OV2722_STOP_STREAMING 0x00 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct ov2722_resolution { + u8 *desc; + const struct ov2722_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u32 skip_frames; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; + int mipi_freq; +}; + +struct ov2722_format { + u8 *desc; + u32 pixelformat; + struct ov2722_reg *regs; +}; + +/* + * ov2722 device structure. + */ +struct ov2722_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + int fmt_idx; + int run_mode; + u16 pixels_per_line; + u16 lines_per_frame; + u8 res; + u8 type; + + struct v4l2_ctrl_handler ctrl_handler; + struct v4l2_ctrl *link_freq; +}; + +enum ov2722_tok_type { + OV2722_8BIT = 0x0001, + OV2722_16BIT = 0x0002, + OV2722_32BIT = 0x0004, + OV2722_TOK_TERM = 0xf000, /* terminating token for reg list */ + OV2722_TOK_DELAY = 0xfe00, /* delay token for reg list */ + OV2722_TOK_MASK = 0xfff0 +}; + +/** + * struct ov2722_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct ov2722_reg { + enum ov2722_tok_type type; + u16 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_ov2722_sensor(x) container_of(x, struct ov2722_device, sd) + +#define OV2722_MAX_WRITE_BUF_SIZE 30 + +struct ov2722_write_buffer { + u16 addr; + u8 data[OV2722_MAX_WRITE_BUF_SIZE]; +}; + +struct ov2722_write_ctrl { + int index; + struct ov2722_write_buffer buffer; +}; + +/* + * Register settings for various resolution + */ +#if 0 +static struct ov2722_reg const ov2722_QVGA_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x0c}, + {OV2722_8BIT, 0x373a, 0x1c}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x0c}, + {OV2722_8BIT, 0x3705, 0x06}, + {OV2722_8BIT, 0x3730, 0x0e}, + {OV2722_8BIT, 0x3704, 0x1c}, + {OV2722_8BIT, 0x3f06, 0x00}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0x46}, + {OV2722_8BIT, 0x371e, 0x00}, + {OV2722_8BIT, 0x371f, 0x63}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0x95}, /* H crop end: 1685 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x27}, /* V crop end: 1063 */ + {OV2722_8BIT, 0x3808, 0x01}, + {OV2722_8BIT, 0x3809, 0x50}, /* H output size: 336 */ + {OV2722_8BIT, 0x380a, 0x01}, + {OV2722_8BIT, 0x380b, 0x00}, /* V output size: 256 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0xc0}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ + {OV2722_8BIT, 0x3814, 0x71}, + {OV2722_8BIT, 0x3815, 0x71}, + {OV2722_8BIT, 0x3612, 0x49}, + {OV2722_8BIT, 0x3618, 0x00}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0xc3}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x77}, + {OV2722_8BIT, 0x3a0d, 0x00}, + {OV2722_8BIT, 0x3a0e, 0x00}, + {OV2722_8BIT, 0x4520, 0x09}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xff}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3a00, 0x58}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, + +}; + +static struct ov2722_reg const ov2722_480P_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x18}, + {OV2722_8BIT, 0x373a, 0x3c}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x1d}, + {OV2722_8BIT, 0x3705, 0x12}, + {OV2722_8BIT, 0x3730, 0x1f}, + {OV2722_8BIT, 0x3704, 0x3f}, + {OV2722_8BIT, 0x3f06, 0x1d}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0x83}, + {OV2722_8BIT, 0x371e, 0x00}, + {OV2722_8BIT, 0x371f, 0xbd}, + {OV2722_8BIT, 0x3708, 0x63}, + {OV2722_8BIT, 0x3709, 0x52}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0xf2}, /* H crop start: 322 - 80 = 242*/ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0xBB}, /* H crop end: 1643 + 80 = 1723*/ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/ + {OV2722_8BIT, 0x3808, 0x02}, + {OV2722_8BIT, 0x3809, 0xE0}, /* H output size: 656 +80 = 736*/ + {OV2722_8BIT, 0x380a, 0x01}, + {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ + {OV2722_8BIT, 0x3814, 0x31}, + {OV2722_8BIT, 0x3815, 0x31}, + {OV2722_8BIT, 0x3612, 0x4b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x02}, + {OV2722_8BIT, 0x3a09, 0x67}, + {OV2722_8BIT, 0x3a0a, 0x02}, + {OV2722_8BIT, 0x3a0b, 0x00}, + {OV2722_8BIT, 0x3a0d, 0x00}, + {OV2722_8BIT, 0x3a0e, 0x00}, + {OV2722_8BIT, 0x4520, 0x0a}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xff}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3a00, 0x58}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, +}; + +static struct ov2722_reg const ov2722_VGA_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x18}, + {OV2722_8BIT, 0x373a, 0x3c}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x1d}, + {OV2722_8BIT, 0x3705, 0x12}, + {OV2722_8BIT, 0x3730, 0x1f}, + {OV2722_8BIT, 0x3704, 0x3f}, + {OV2722_8BIT, 0x3f06, 0x1d}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0x83}, + {OV2722_8BIT, 0x371e, 0x00}, + {OV2722_8BIT, 0x371f, 0xbd}, + {OV2722_8BIT, 0x3708, 0x63}, + {OV2722_8BIT, 0x3709, 0x52}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32*/ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0x6B}, /* H crop end: 1643*/ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x03}, /* V crop end: 1027*/ + {OV2722_8BIT, 0x3808, 0x02}, + {OV2722_8BIT, 0x3809, 0x90}, /* H output size: 656 */ + {OV2722_8BIT, 0x380a, 0x01}, + {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/ + {OV2722_8BIT, 0x3814, 0x31}, + {OV2722_8BIT, 0x3815, 0x31}, + {OV2722_8BIT, 0x3612, 0x4b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x02}, + {OV2722_8BIT, 0x3a09, 0x67}, + {OV2722_8BIT, 0x3a0a, 0x02}, + {OV2722_8BIT, 0x3a0b, 0x00}, + {OV2722_8BIT, 0x3a0d, 0x00}, + {OV2722_8BIT, 0x3a0e, 0x00}, + {OV2722_8BIT, 0x4520, 0x0a}, + {OV2722_8BIT, 0x4837, 0x29}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xff}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3a00, 0x58}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, +}; +#endif + +static struct ov2722_reg const ov2722_1632_1092_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for + a whole frame complete.(vblank) */ + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0x9E}, /* H crop start: 158 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ + {OV2722_8BIT, 0x3804, 0x07}, + {OV2722_8BIT, 0x3805, 0x05}, /* H crop end: 1797 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ + + {OV2722_8BIT, 0x3808, 0x06}, + {OV2722_8BIT, 0x3809, 0x60}, /* H output size: 1632 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0} +}; + +static struct ov2722_reg const ov2722_1452_1092_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for + a whole frame complete.(vblank) */ + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0xF8}, /* H crop start: 248 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0xab}, /* H crop end: 1707 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ + {OV2722_8BIT, 0x3808, 0x05}, + {OV2722_8BIT, 0x3809, 0xac}, /* H output size: 1452 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0} +}; +#if 0 +static struct ov2722_reg const ov2722_1M3_30fps[] = { + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x4a}, /* H crop start: 330 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x03}, /* V crop start: 3 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0xe1}, /* H crop end: 1761 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x47}, /* V crop end: 1095 */ + {OV2722_8BIT, 0x3808, 0x05}, + {OV2722_8BIT, 0x3809, 0x88}, /* H output size: 1416 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x0a}, /* V output size: 1034 */ + + /* H blank timing */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x05}, /* H window offset: 5 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* flip isp */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */ + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */ + {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */ + {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */ + {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */ + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */ + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + + /* Added for power optimization */ + {OV2722_8BIT, 0x3000, 0x00}, + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x46}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x10}, + {OV2722_TOK_TERM, 0, 0}, +}; +#endif + +static struct ov2722_reg const ov2722_1080p_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for a whole + frame complete.(vblank) */ + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x2b}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x28}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x00}, + {OV2722_8BIT, 0x3801, 0x08}, /* H crop start: 8 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */ + {OV2722_8BIT, 0x3804, 0x07}, + {OV2722_8BIT, 0x3805, 0x9b}, /* H crop end: 1947 */ + {OV2722_8BIT, 0x3806, 0x04}, + {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */ + {OV2722_8BIT, 0x3808, 0x07}, + {OV2722_8BIT, 0x3809, 0x8c}, /* H output size: 1932 */ + {OV2722_8BIT, 0x380a, 0x04}, + {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x14}, /* H timing: 2068 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0x5a}, /* V timing: 1114 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x4b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3000, 0xff}, + {OV2722_8BIT, 0x3001, 0xff}, + {OV2722_8BIT, 0x3002, 0xf0}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x63}, + {OV2722_8BIT, 0x3634, 0x24}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcd}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x3503, 0x17}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x24}, /* 345.6 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3011, 0x22}, + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0} +}; + +#if 0 /* Currently unused */ +static struct ov2722_reg const ov2722_720p_30fps[] = { + {OV2722_8BIT, 0x3021, 0x03}, + {OV2722_8BIT, 0x3718, 0x10}, + {OV2722_8BIT, 0x3702, 0x24}, + {OV2722_8BIT, 0x373a, 0x60}, + {OV2722_8BIT, 0x3715, 0x01}, + {OV2722_8BIT, 0x3703, 0x2e}, + {OV2722_8BIT, 0x3705, 0x10}, + {OV2722_8BIT, 0x3730, 0x30}, + {OV2722_8BIT, 0x3704, 0x62}, + {OV2722_8BIT, 0x3f06, 0x3a}, + {OV2722_8BIT, 0x371c, 0x00}, + {OV2722_8BIT, 0x371d, 0xc4}, + {OV2722_8BIT, 0x371e, 0x01}, + {OV2722_8BIT, 0x371f, 0x0d}, + {OV2722_8BIT, 0x3708, 0x61}, + {OV2722_8BIT, 0x3709, 0x12}, + {OV2722_8BIT, 0x3800, 0x01}, + {OV2722_8BIT, 0x3801, 0x40}, /* H crop start: 320 */ + {OV2722_8BIT, 0x3802, 0x00}, + {OV2722_8BIT, 0x3803, 0xb1}, /* V crop start: 177 */ + {OV2722_8BIT, 0x3804, 0x06}, + {OV2722_8BIT, 0x3805, 0x55}, /* H crop end: 1621 */ + {OV2722_8BIT, 0x3806, 0x03}, + {OV2722_8BIT, 0x3807, 0x95}, /* V crop end: 918 */ + {OV2722_8BIT, 0x3808, 0x05}, + {OV2722_8BIT, 0x3809, 0x10}, /* H output size: 0x0788==1928 */ + {OV2722_8BIT, 0x380a, 0x02}, + {OV2722_8BIT, 0x380b, 0xe0}, /* output size: 0x02DE==734 */ + {OV2722_8BIT, 0x380c, 0x08}, + {OV2722_8BIT, 0x380d, 0x00}, /* H timing: 2048 */ + {OV2722_8BIT, 0x380e, 0x04}, + {OV2722_8BIT, 0x380f, 0xa3}, /* V timing: 1187 */ + {OV2722_8BIT, 0x3810, 0x00}, + {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */ + {OV2722_8BIT, 0x3812, 0x00}, + {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */ + {OV2722_8BIT, 0x3820, 0x80}, + {OV2722_8BIT, 0x3821, 0x06}, /* mirror */ + {OV2722_8BIT, 0x3814, 0x11}, + {OV2722_8BIT, 0x3815, 0x11}, + {OV2722_8BIT, 0x3612, 0x0b}, + {OV2722_8BIT, 0x3618, 0x04}, + {OV2722_8BIT, 0x3a08, 0x01}, + {OV2722_8BIT, 0x3a09, 0x50}, + {OV2722_8BIT, 0x3a0a, 0x01}, + {OV2722_8BIT, 0x3a0b, 0x18}, + {OV2722_8BIT, 0x3a0d, 0x03}, + {OV2722_8BIT, 0x3a0e, 0x03}, + {OV2722_8BIT, 0x4520, 0x00}, + {OV2722_8BIT, 0x4837, 0x1b}, + {OV2722_8BIT, 0x3600, 0x08}, + {OV2722_8BIT, 0x3621, 0xc0}, + {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */ + {OV2722_8BIT, 0x3633, 0x23}, + {OV2722_8BIT, 0x3634, 0x54}, + {OV2722_8BIT, 0x3f01, 0x0c}, + {OV2722_8BIT, 0x5001, 0xc1}, + {OV2722_8BIT, 0x3614, 0xf0}, + {OV2722_8BIT, 0x3630, 0x2d}, + {OV2722_8BIT, 0x370b, 0x62}, + {OV2722_8BIT, 0x3706, 0x61}, + {OV2722_8BIT, 0x4000, 0x02}, + {OV2722_8BIT, 0x4002, 0xc5}, + {OV2722_8BIT, 0x4005, 0x08}, + {OV2722_8BIT, 0x404f, 0x84}, + {OV2722_8BIT, 0x4051, 0x00}, + {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */ + {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */ + {OV2722_8BIT, 0x3a18, 0x00}, + {OV2722_8BIT, 0x3a19, 0x80}, + {OV2722_8BIT, 0x4521, 0x00}, + {OV2722_8BIT, 0x5183, 0xb0}, + {OV2722_8BIT, 0x5184, 0xb0}, + {OV2722_8BIT, 0x5185, 0xb0}, + {OV2722_8BIT, 0x370c, 0x0c}, + {OV2722_8BIT, 0x3035, 0x00}, + {OV2722_8BIT, 0x3036, 0x26}, /* {0x3036, 0x2c}, //422.4 MHz */ + {OV2722_8BIT, 0x3037, 0xa1}, + {OV2722_8BIT, 0x303e, 0x19}, + {OV2722_8BIT, 0x3038, 0x06}, + {OV2722_8BIT, 0x3018, 0x04}, + {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */ + {OV2722_8BIT, 0x3001, 0x00}, + {OV2722_8BIT, 0x3002, 0x00}, + {OV2722_8BIT, 0x3a0f, 0x40}, + {OV2722_8BIT, 0x3a10, 0x38}, + {OV2722_8BIT, 0x3a1b, 0x48}, + {OV2722_8BIT, 0x3a1e, 0x30}, + {OV2722_8BIT, 0x3a11, 0x90}, + {OV2722_8BIT, 0x3a1f, 0x10}, + {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */ + {OV2722_8BIT, 0x3500, 0x00}, + {OV2722_8BIT, 0x3501, 0x3F}, + {OV2722_8BIT, 0x3502, 0x00}, + {OV2722_8BIT, 0x3508, 0x00}, + {OV2722_8BIT, 0x3509, 0x00}, + {OV2722_TOK_TERM, 0, 0}, +}; +#endif + +static struct ov2722_resolution ov2722_res_preview[] = { + { + .desc = "ov2722_1632_1092_30fps", + .width = 1632, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1632_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1452_1092_30fps", + .width = 1452, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1452_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1080P_30fps", + .width = 1932, + .height = 1092, + .pix_clk_freq = 69, + .fps = 30, + .used = 0, + .pixels_per_line = 2068, + .lines_per_frame = 1114, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1080p_30fps, + .mipi_freq = 345600, + }, +}; +#define N_RES_PREVIEW (ARRAY_SIZE(ov2722_res_preview)) + +/* + * Disable non-preview configurations until the configuration selection is + * improved. + */ +#if 0 +struct ov2722_resolution ov2722_res_still[] = { + { + .desc = "ov2722_480P_30fps", + .width = 1632, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1632_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1452_1092_30fps", + .width = 1452, + .height = 1092, + .fps = 30, + .pix_clk_freq = 85, + .used = 0, + .pixels_per_line = 2260, + .lines_per_frame = 1244, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1452_1092_30fps, + .mipi_freq = 422400, + }, + { + .desc = "ov2722_1080P_30fps", + .width = 1932, + .height = 1092, + .pix_clk_freq = 69, + .fps = 30, + .used = 0, + .pixels_per_line = 2068, + .lines_per_frame = 1114, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1080p_30fps, + .mipi_freq = 345600, + }, +}; +#define N_RES_STILL (ARRAY_SIZE(ov2722_res_still)) + +struct ov2722_resolution ov2722_res_video[] = { + { + .desc = "ov2722_QVGA_30fps", + .width = 336, + .height = 256, + .fps = 30, + .pix_clk_freq = 73, + .used = 0, + .pixels_per_line = 2048, + .lines_per_frame = 1184, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_QVGA_30fps, + .mipi_freq = 364800, + }, + { + .desc = "ov2722_480P_30fps", + .width = 736, + .height = 496, + .fps = 30, + .pix_clk_freq = 73, + .used = 0, + .pixels_per_line = 2048, + .lines_per_frame = 1184, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_480P_30fps, + }, + { + .desc = "ov2722_1080P_30fps", + .width = 1932, + .height = 1092, + .pix_clk_freq = 69, + .fps = 30, + .used = 0, + .pixels_per_line = 2068, + .lines_per_frame = 1114, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .skip_frames = 3, + .regs = ov2722_1080p_30fps, + .mipi_freq = 345600, + }, +}; +#define N_RES_VIDEO (ARRAY_SIZE(ov2722_res_video)) +#endif + +static struct ov2722_resolution *ov2722_res = ov2722_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov5693/Kconfig b/drivers/staging/media/atomisp/i2c/ov5693/Kconfig new file mode 100644 index 0000000000000..3f527f2047a74 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/Kconfig @@ -0,0 +1,11 @@ +config VIDEO_ATOMISP_OV5693 + tristate "Omnivision ov5693 sensor support" + depends on ACPI + depends on I2C && VIDEO_V4L2 + ---help--- + This is a Video4Linux2 sensor-level driver for the Micron + ov5693 5 Mpixel camera. + + ov5693 is video camera sensor. + + It currently only works with the atomisp driver. diff --git a/drivers/staging/media/atomisp/i2c/ov5693/Makefile b/drivers/staging/media/atomisp/i2c/ov5693/Makefile new file mode 100644 index 0000000000000..3275f2be229e7 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_VIDEO_ATOMISP_OV5693) += atomisp-ov5693.o diff --git a/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h b/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h new file mode 100644 index 0000000000000..4de44569fe542 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h @@ -0,0 +1,63 @@ +/* + * Support for AD5823 VCM. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __AD5823_H__ +#define __AD5823_H__ + +#include + + +#define AD5823_VCM_ADDR 0x0c + +#define AD5823_REG_RESET 0x01 +#define AD5823_REG_MODE 0x02 +#define AD5823_REG_VCM_MOVE_TIME 0x03 +#define AD5823_REG_VCM_CODE_MSB 0x04 +#define AD5823_REG_VCM_CODE_LSB 0x05 +#define AD5823_REG_VCM_THRESHOLD_MSB 0x06 +#define AD5823_REG_VCM_THRESHOLD_LSB 0x07 + +#define AD5823_REG_LENGTH 0x1 + +#define AD5823_RING_CTRL_ENABLE 0x04 +#define AD5823_RING_CTRL_DISABLE 0x00 + +#define AD5823_RESONANCE_PERIOD 100000 +#define AD5823_RESONANCE_COEF 512 +#define AD5823_HIGH_FREQ_RANGE 0x80 + +#define VCM_CODE_MSB_MASK 0xfc +#define AD5823_INIT_FOCUS_POS 350 + +enum ad5823_tok_type { + AD5823_8BIT = 0x1, + AD5823_16BIT = 0x2, +}; + +enum ad5823_vcm_mode { + AD5823_ARC_RES0 = 0x0, /* Actuator response control RES1 */ + AD5823_ARC_RES1 = 0x1, /* Actuator response control RES0.5 */ + AD5823_ARC_RES2 = 0x2, /* Actuator response control RES2 */ + AD5823_ESRC = 0x3, /* Enhanced slew rate control */ + AD5823_DIRECT = 0x4, /* Direct control */ +}; + +#define AD5823_INVALID_CONFIG 0xffffffff +#define AD5823_MAX_FOCUS_POS 1023 +#define DELAY_PER_STEP_NS 1000000 +#define DELAY_MAX_PER_STEP_NS (1000000 * 1023) +#endif diff --git a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c new file mode 100644 index 0000000000000..714297c36b3e9 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c @@ -0,0 +1,1993 @@ +/* + * Support for OmniVision OV5693 1080p HD camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../include/linux/atomisp_gmin_platform.h" + +#include "ov5693.h" +#include "ad5823.h" + +#define __cci_delay(t) \ + do { \ + if ((t) < 10) { \ + usleep_range((t) * 1000, ((t) + 1) * 1000); \ + } else { \ + msleep((t)); \ + } \ + } while (0) + +/* Value 30ms reached through experimentation on byt ecs. + * The DS specifies a much lower value but when using a smaller value + * the I2C bus sometimes locks up permanently when starting the camera. + * This issue could not be reproduced on cht, so we can reduce the + * delay value to a lower value when insmod. + */ +static uint up_delay = 30; +module_param(up_delay, uint, 0644); +MODULE_PARM_DESC(up_delay, "Delay prior to the first CCI transaction for ov5693"); + +static int vcm_ad_i2c_wr8(struct i2c_client *client, u8 reg, u8 val) +{ + int err; + struct i2c_msg msg; + u8 buf[2]; + + buf[0] = reg; + buf[1] = val; + + msg.addr = VCM_ADDR; + msg.flags = 0; + msg.len = 2; + msg.buf = &buf[0]; + + err = i2c_transfer(client->adapter, &msg, 1); + if (err != 1) { + dev_err(&client->dev, "%s: vcm i2c fail, err code = %d\n", + __func__, err); + return -EIO; + } + return 0; +} + +static int ad5823_i2c_write(struct i2c_client *client, u8 reg, u8 val) +{ + struct i2c_msg msg; + u8 buf[2]; + + buf[0] = reg; + buf[1] = val; + msg.addr = AD5823_VCM_ADDR; + msg.flags = 0; + msg.len = 0x02; + msg.buf = &buf[0]; + + if (i2c_transfer(client->adapter, &msg, 1) != 1) + return -EIO; + return 0; +} + +static int ad5823_i2c_read(struct i2c_client *client, u8 reg, u8 *val) +{ + struct i2c_msg msg[2]; + u8 buf[2]; + + buf[0] = reg; + buf[1] = 0; + + msg[0].addr = AD5823_VCM_ADDR; + msg[0].flags = 0; + msg[0].len = 0x01; + msg[0].buf = &buf[0]; + + msg[1].addr = 0x0c; + msg[1].flags = I2C_M_RD; + msg[1].len = 0x01; + msg[1].buf = &buf[1]; + *val = 0; + if (i2c_transfer(client->adapter, msg, 2) != 2) + return -EIO; + *val = buf[1]; + return 0; +} + + +static const uint32_t ov5693_embedded_effective_size = 28; + +/* i2c read/write stuff */ +static int ov5693_read_reg(struct i2c_client *client, + u16 data_length, u16 reg, u16 *val) +{ + int err; + struct i2c_msg msg[2]; + unsigned char data[6]; + + if (!client->adapter) { + dev_err(&client->dev, "%s error, no client->adapter\n", + __func__); + return -ENODEV; + } + + if (data_length != OV5693_8BIT && data_length != OV5693_16BIT + && data_length != OV5693_32BIT) { + dev_err(&client->dev, "%s error, invalid data length\n", + __func__); + return -EINVAL; + } + + memset(msg, 0, sizeof(msg)); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = I2C_MSG_LENGTH; + msg[0].buf = data; + + /* high byte goes out first */ + data[0] = (u8)(reg >> 8); + data[1] = (u8)(reg & 0xff); + + msg[1].addr = client->addr; + msg[1].len = data_length; + msg[1].flags = I2C_M_RD; + msg[1].buf = data; + + err = i2c_transfer(client->adapter, msg, 2); + if (err != 2) { + if (err >= 0) + err = -EIO; + dev_err(&client->dev, + "read from offset 0x%x error %d", reg, err); + return err; + } + + *val = 0; + /* high byte comes first */ + if (data_length == OV5693_8BIT) + *val = (u8)data[0]; + else if (data_length == OV5693_16BIT) + *val = be16_to_cpu(*(__be16 *)&data[0]); + else + *val = be32_to_cpu(*(__be32 *)&data[0]); + + return 0; +} + +static int ov5693_i2c_write(struct i2c_client *client, u16 len, u8 *data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +static int vcm_dw_i2c_write(struct i2c_client *client, u16 data) +{ + struct i2c_msg msg; + const int num_msg = 1; + int ret; + __be16 val; + + val = cpu_to_be16(data); + msg.addr = VCM_ADDR; + msg.flags = 0; + msg.len = OV5693_16BIT; + msg.buf = (void *)&val; + + ret = i2c_transfer(client->adapter, &msg, 1); + + return ret == num_msg ? 0 : -EIO; +} + +/* + * Theory: per datasheet, the two VCMs both allow for a 2-byte read. + * The DW9714 doesn't actually specify what this does (it has a + * two-byte write-only protocol, but specifies the read sequence as + * legal), but it returns the same data (zeroes) always, after an + * undocumented initial NAK. The AD5823 has a one-byte address + * register to which all writes go, and subsequent reads will cycle + * through the 8 bytes of registers. Notably, the default values (the + * device is always power-cycled affirmatively, so we can rely on + * these) in AD5823 are not pairwise repetitions of the same 16 bit + * word. So all we have to do is sequentially read two bytes at a + * time and see if we detect a difference in any of the first four + * pairs. + */ +static int vcm_detect(struct i2c_client *client) +{ + int i, ret; + struct i2c_msg msg; + u16 data0 = 0, data; + + for (i = 0; i < 4; i++) { + msg.addr = VCM_ADDR; + msg.flags = I2C_M_RD; + msg.len = sizeof(data); + msg.buf = (u8 *)&data; + ret = i2c_transfer(client->adapter, &msg, 1); + + /* + * DW9714 always fails the first read and returns + * zeroes for subsequent ones + */ + if (i == 0 && ret == -EREMOTEIO) { + data0 = 0; + continue; + } + + if (i == 0) + data0 = data; + + if (data != data0) + return VCM_AD5823; + } + return ret == 1 ? VCM_DW9714 : ret; +} + +static int ov5693_write_reg(struct i2c_client *client, u16 data_length, + u16 reg, u16 val) +{ + int ret; + unsigned char data[4] = {0}; + __be16 *wreg = (void *)data; + const u16 len = data_length + sizeof(u16); /* 16-bit address + data */ + + if (data_length != OV5693_8BIT && data_length != OV5693_16BIT) { + dev_err(&client->dev, + "%s error, invalid data_length\n", __func__); + return -EINVAL; + } + + /* high byte goes out first */ + *wreg = cpu_to_be16(reg); + + if (data_length == OV5693_8BIT) { + data[2] = (u8)(val); + } else { + /* OV5693_16BIT */ + __be16 *wdata = (void *)&data[2]; + + *wdata = cpu_to_be16(val); + } + + ret = ov5693_i2c_write(client, len, data); + if (ret) + dev_err(&client->dev, + "write error: wrote 0x%x to offset 0x%x error %d", + val, reg, ret); + + return ret; +} + +/* + * ov5693_write_reg_array - Initializes a list of OV5693 registers + * @client: i2c driver client structure + * @reglist: list of registers to be written + * + * This function initializes a list of registers. When consecutive addresses + * are found in a row on the list, this function creates a buffer and sends + * consecutive data in a single i2c_transfer(). + * + * __ov5693_flush_reg_array, __ov5693_buf_reg_array() and + * __ov5693_write_reg_is_consecutive() are internal functions to + * ov5693_write_reg_array_fast() and should be not used anywhere else. + * + */ + +static int __ov5693_flush_reg_array(struct i2c_client *client, + struct ov5693_write_ctrl *ctrl) +{ + u16 size; + __be16 *reg = (void *)&ctrl->buffer.addr; + + if (ctrl->index == 0) + return 0; + + size = sizeof(u16) + ctrl->index; /* 16-bit address + data */ + + *reg = cpu_to_be16(ctrl->buffer.addr); + ctrl->index = 0; + + return ov5693_i2c_write(client, size, (u8 *)reg); +} + +static int __ov5693_buf_reg_array(struct i2c_client *client, + struct ov5693_write_ctrl *ctrl, + const struct ov5693_reg *next) +{ + int size; + __be16 *data16; + + switch (next->type) { + case OV5693_8BIT: + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; + break; + case OV5693_16BIT: + size = 2; + + data16 = (void *)&ctrl->buffer.data[ctrl->index]; + *data16 = cpu_to_be16((u16)next->val); + break; + default: + return -EINVAL; + } + + /* When first item is added, we need to store its starting address */ + if (ctrl->index == 0) + ctrl->buffer.addr = next->reg; + + ctrl->index += size; + + /* + * Buffer cannot guarantee free space for u32? Better flush it to avoid + * possible lack of memory for next item. + */ + if (ctrl->index + sizeof(u16) >= OV5693_MAX_WRITE_BUF_SIZE) + return __ov5693_flush_reg_array(client, ctrl); + + return 0; +} + +static int __ov5693_write_reg_is_consecutive(struct i2c_client *client, + struct ov5693_write_ctrl *ctrl, + const struct ov5693_reg *next) +{ + if (ctrl->index == 0) + return 1; + + return ctrl->buffer.addr + ctrl->index == next->reg; +} + +static int ov5693_write_reg_array(struct i2c_client *client, + const struct ov5693_reg *reglist) +{ + const struct ov5693_reg *next = reglist; + struct ov5693_write_ctrl ctrl; + int err; + + ctrl.index = 0; + for (; next->type != OV5693_TOK_TERM; next++) { + switch (next->type & OV5693_TOK_MASK) { + case OV5693_TOK_DELAY: + err = __ov5693_flush_reg_array(client, &ctrl); + if (err) + return err; + msleep(next->val); + break; + default: + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + if (!__ov5693_write_reg_is_consecutive(client, &ctrl, + next)) { + err = __ov5693_flush_reg_array(client, &ctrl); + if (err) + return err; + } + err = __ov5693_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, + "%s: write error, aborted\n", + __func__); + return err; + } + break; + } + } + + return __ov5693_flush_reg_array(client, &ctrl); +} +static int ov5693_g_focal(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV5693_FOCAL_LENGTH_NUM << 16) | OV5693_FOCAL_LENGTH_DEM; + return 0; +} + +static int ov5693_g_fnumber(struct v4l2_subdev *sd, s32 *val) +{ + /*const f number for imx*/ + *val = (OV5693_F_NUMBER_DEFAULT_NUM << 16) | OV5693_F_NUMBER_DEM; + return 0; +} + +static int ov5693_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) +{ + *val = (OV5693_F_NUMBER_DEFAULT_NUM << 24) | + (OV5693_F_NUMBER_DEM << 16) | + (OV5693_F_NUMBER_DEFAULT_NUM << 8) | OV5693_F_NUMBER_DEM; + return 0; +} + +static int ov5693_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + *val = ov5693_res[dev->fmt_idx].bin_factor_x; + + return 0; +} + +static int ov5693_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + *val = ov5693_res[dev->fmt_idx].bin_factor_y; + + return 0; +} + +static int ov5693_get_intg_factor(struct i2c_client *client, + struct camera_mipi_info *info, + const struct ov5693_resolution *res) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct atomisp_sensor_mode_data *buf = &info->data; + unsigned int pix_clk_freq_hz; + u16 reg_val; + int ret; + + if (info == NULL) + return -EINVAL; + + /* pixel clock */ + pix_clk_freq_hz = res->pix_clk_freq * 1000000; + + dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; + + /* get integration time */ + buf->coarse_integration_time_min = OV5693_COARSE_INTG_TIME_MIN; + buf->coarse_integration_time_max_margin = + OV5693_COARSE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_min = OV5693_FINE_INTG_TIME_MIN; + buf->fine_integration_time_max_margin = + OV5693_FINE_INTG_TIME_MAX_MARGIN; + + buf->fine_integration_time_def = OV5693_FINE_INTG_TIME_MIN; + buf->frame_length_lines = res->lines_per_frame; + buf->line_length_pck = res->pixels_per_line; + buf->read_mode = res->bin_mode; + + /* get the cropping and output resolution to ISP for this mode. */ + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_HORIZONTAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_start = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_VERTICAL_START_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_start = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_HORIZONTAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_horizontal_end = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_VERTICAL_END_H, ®_val); + if (ret) + return ret; + buf->crop_vertical_end = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_HORIZONTAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_width = reg_val; + + ret = ov5693_read_reg(client, OV5693_16BIT, + OV5693_VERTICAL_OUTPUT_SIZE_H, ®_val); + if (ret) + return ret; + buf->output_height = reg_val; + + buf->binning_factor_x = res->bin_factor_x ? + res->bin_factor_x : 1; + buf->binning_factor_y = res->bin_factor_y ? + res->bin_factor_y : 1; + return 0; +} + +static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, + int gain, int digitgain) + +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5693_device *dev = to_ov5693_sensor(sd); + u16 vts, hts; + int ret, exp_val; + + hts = ov5693_res[dev->fmt_idx].pixels_per_line; + vts = ov5693_res[dev->fmt_idx].lines_per_frame; + /* + * If coarse_itg is larger than 1<<15, can not write to reg directly. + * The way is to write coarse_itg/2 to the reg, meanwhile write 2*hts + * to the reg. + */ + if (coarse_itg > (1 << 15)) { + hts = hts * 2; + coarse_itg = (int)coarse_itg / 2; + } + /* group hold */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_GROUP_ACCESS, 0x00); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_GROUP_ACCESS); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_HTS_H, (hts >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_HTS_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_HTS_L, hts & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_HTS_L); + return ret; + } + /* Increase the VTS to match exposure + MARGIN */ + if (coarse_itg > vts - OV5693_INTEGRATION_TIME_MARGIN) + vts = (u16) coarse_itg + OV5693_INTEGRATION_TIME_MARGIN; + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_VTS_H, (vts >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_VTS_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_TIMING_VTS_L, vts & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_TIMING_VTS_L); + return ret; + } + + /* set exposure */ + + /* Lower four bit should be 0*/ + exp_val = coarse_itg << 4; + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_L, exp_val & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_EXPOSURE_L); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_M, (exp_val >> 8) & 0xFF); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_EXPOSURE_M); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_H, (exp_val >> 16) & 0x0F); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_EXPOSURE_H); + return ret; + } + + /* Analog gain */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_AGC_L, gain & 0xff); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_AGC_L); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_AGC_H, (gain >> 8) & 0xff); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_AGC_H); + return ret; + } + + /* Digital gain */ + if (digitgain) { + ret = ov5693_write_reg(client, OV5693_16BIT, + OV5693_MWB_RED_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_MWB_RED_GAIN_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_16BIT, + OV5693_MWB_GREEN_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_MWB_RED_GAIN_H); + return ret; + } + + ret = ov5693_write_reg(client, OV5693_16BIT, + OV5693_MWB_BLUE_GAIN_H, digitgain); + if (ret) { + dev_err(&client->dev, "%s: write %x error, aborted\n", + __func__, OV5693_MWB_RED_GAIN_H); + return ret; + } + } + + /* End group */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_GROUP_ACCESS, 0x10); + if (ret) + return ret; + + /* Delay launch group */ + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_GROUP_ACCESS, 0xa0); + if (ret) + return ret; + return ret; +} + +static int ov5693_set_exposure(struct v4l2_subdev *sd, int exposure, + int gain, int digitgain) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + int ret; + + mutex_lock(&dev->input_lock); + ret = __ov5693_set_exposure(sd, exposure, gain, digitgain); + mutex_unlock(&dev->input_lock); + + return ret; +} + +static long ov5693_s_exposure(struct v4l2_subdev *sd, + struct atomisp_exposure *exposure) +{ + u16 coarse_itg = exposure->integration_time[0]; + u16 analog_gain = exposure->gain[0]; + u16 digital_gain = exposure->gain[1]; + + /* we should not accept the invalid value below */ + if (analog_gain == 0) { + struct i2c_client *client = v4l2_get_subdevdata(sd); + + v4l2_err(client, "%s: invalid value\n", __func__); + return -EINVAL; + } + return ov5693_set_exposure(sd, coarse_itg, analog_gain, digital_gain); +} + +static int ov5693_read_otp_reg_array(struct i2c_client *client, u16 size, + u16 addr, u8 *buf) +{ + u16 index; + int ret; + u16 *pVal = NULL; + + for (index = 0; index <= size; index++) { + pVal = (u16 *) (buf + index); + ret = + ov5693_read_reg(client, OV5693_8BIT, addr + index, + pVal); + if (ret) + return ret; + } + + return 0; +} + +static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5693_device *dev = to_ov5693_sensor(sd); + int ret; + int i; + u8 *b = buf; + + dev->otp_size = 0; + for (i = 1; i < OV5693_OTP_BANK_MAX; i++) { + /*set bank NO and OTP read mode. */ + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_BANK_REG, (i | 0xc0)); //[7:6] 2'b11 [5:0] bank no + if (ret) { + dev_err(&client->dev, "failed to prepare OTP page\n"); + return ret; + } + //pr_debug("write 0x%x->0x%x\n",OV5693_OTP_BANK_REG,(i|0xc0)); + + /*enable read */ + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_READ_REG, OV5693_OTP_MODE_READ); // enable :1 + if (ret) { + dev_err(&client->dev, + "failed to set OTP reading mode page"); + return ret; + } + //pr_debug("write 0x%x->0x%x\n",OV5693_OTP_READ_REG,OV5693_OTP_MODE_READ); + + /* Reading the OTP data array */ + ret = ov5693_read_otp_reg_array(client, OV5693_OTP_BANK_SIZE, + OV5693_OTP_START_ADDR, + b); + if (ret) { + dev_err(&client->dev, "failed to read OTP data\n"); + return ret; + } + + //pr_debug("BANK[%2d] %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", i, *b, *(b+1), *(b+2), *(b+3), *(b+4), *(b+5), *(b+6), *(b+7), *(b+8), *(b+9), *(b+10), *(b+11), *(b+12), *(b+13), *(b+14), *(b+15)); + + //Intel OTP map, try to read 320byts first. + if (i == 21) { + if ((*b) == 0) { + dev->otp_size = 320; + break; + } else { + b = buf; + continue; + } + } else if (i == 24) { //if the first 320bytes data doesn't not exist, try to read the next 32bytes data. + if ((*b) == 0) { + dev->otp_size = 32; + break; + } else { + b = buf; + continue; + } + } else if (i == 27) { //if the prvious 32bytes data doesn't exist, try to read the next 32bytes data again. + if ((*b) == 0) { + dev->otp_size = 32; + break; + } else { + dev->otp_size = 0; // no OTP data. + break; + } + } + + b = b + OV5693_OTP_BANK_SIZE; + } + return 0; +} + +/* + * Read otp data and store it into a kmalloced buffer. + * The caller must kfree the buffer when no more needed. + * @size: set to the size of the returned otp data. + */ +static void *ov5693_otp_read(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u8 *buf; + int ret; + + buf = devm_kzalloc(&client->dev, (OV5693_OTP_DATA_SIZE + 16), GFP_KERNEL); + if (!buf) + return ERR_PTR(-ENOMEM); + + //otp valid after mipi on and sw stream on + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_FRAME_OFF_NUM, 0x00); + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_SW_STREAM, OV5693_START_STREAMING); + + ret = __ov5693_otp_read(sd, buf); + + //mipi off and sw stream off after otp read + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_FRAME_OFF_NUM, 0x0f); + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_SW_STREAM, OV5693_STOP_STREAMING); + + /* Driver has failed to find valid data */ + if (ret) { + dev_err(&client->dev, "sensor found no valid OTP data\n"); + return ERR_PTR(ret); + } + + return buf; +} + +static int ov5693_g_priv_int_data(struct v4l2_subdev *sd, + struct v4l2_private_int_data *priv) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct ov5693_device *dev = to_ov5693_sensor(sd); + u8 __user *to = priv->data; + u32 read_size = priv->size; + int ret; + + /* No need to copy data if size is 0 */ + if (!read_size) + goto out; + + if (IS_ERR(dev->otp_data)) { + dev_err(&client->dev, "OTP data not available"); + return PTR_ERR(dev->otp_data); + } + + /* Correct read_size value only if bigger than maximum */ + if (read_size > OV5693_OTP_DATA_SIZE) + read_size = OV5693_OTP_DATA_SIZE; + + ret = copy_to_user(to, dev->otp_data, read_size); + if (ret) { + dev_err(&client->dev, "%s: failed to copy OTP data to user\n", + __func__); + return -EFAULT; + } + + pr_debug("%s read_size:%d\n", __func__, read_size); + +out: + /* Return correct size */ + priv->size = dev->otp_size; + + return 0; + +} + +static long ov5693_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) +{ + + switch (cmd) { + case ATOMISP_IOC_S_EXPOSURE: + return ov5693_s_exposure(sd, arg); + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA: + return ov5693_g_priv_int_data(sd, arg); + default: + return -EINVAL; + } + return 0; +} + +/* + * This returns the exposure time being used. This should only be used + * for filling in EXIF data, not for actual image processing. + */ +static int ov5693_q_exposure(struct v4l2_subdev *sd, s32 *value) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 reg_v, reg_v2; + int ret; + + /* get exposure */ + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_L, + ®_v); + if (ret) + goto err; + + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_M, + ®_v2); + if (ret) + goto err; + + reg_v += reg_v2 << 8; + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_EXPOSURE_H, + ®_v2); + if (ret) + goto err; + + *value = reg_v + (((u32)reg_v2 << 16)); +err: + return ret; +} + +static int ad5823_t_focus_vcm(struct v4l2_subdev *sd, u16 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = -EINVAL; + u8 vcm_code; + + ret = ad5823_i2c_read(client, AD5823_REG_VCM_CODE_MSB, &vcm_code); + if (ret) + return ret; + + /* set reg VCM_CODE_MSB Bit[1:0] */ + vcm_code = (vcm_code & VCM_CODE_MSB_MASK) | + ((val >> 8) & ~VCM_CODE_MSB_MASK); + ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_MSB, vcm_code); + if (ret) + return ret; + + /* set reg VCM_CODE_LSB Bit[7:0] */ + ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_LSB, (val & 0xff)); + if (ret) + return ret; + + /* set required vcm move time */ + vcm_code = AD5823_RESONANCE_PERIOD / AD5823_RESONANCE_COEF + - AD5823_HIGH_FREQ_RANGE; + ret = ad5823_i2c_write(client, AD5823_REG_VCM_MOVE_TIME, vcm_code); + + return ret; +} + +static int ad5823_t_focus_abs(struct v4l2_subdev *sd, s32 value) +{ + value = min(value, AD5823_MAX_FOCUS_POS); + return ad5823_t_focus_vcm(sd, value); +} + +static int ov5693_t_focus_abs(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + dev_dbg(&client->dev, "%s: FOCUS_POS: 0x%x\n", __func__, value); + value = clamp(value, 0, OV5693_VCM_MAX_FOCUS_POS); + if (dev->vcm == VCM_DW9714) { + if (dev->vcm_update) { + ret = vcm_dw_i2c_write(client, VCM_PROTECTION_OFF); + if (ret) + return ret; + ret = vcm_dw_i2c_write(client, DIRECT_VCM); + if (ret) + return ret; + ret = vcm_dw_i2c_write(client, VCM_PROTECTION_ON); + if (ret) + return ret; + dev->vcm_update = false; + } + ret = vcm_dw_i2c_write(client, + vcm_val(value, VCM_DEFAULT_S)); + } else if (dev->vcm == VCM_AD5823) { + ad5823_t_focus_abs(sd, value); + } + if (ret == 0) { + dev->number_of_steps = value - dev->focus; + dev->focus = value; + dev->timestamp_t_focus_abs = ktime_get(); + } else + dev_err(&client->dev, + "%s: i2c failed. ret %d\n", __func__, ret); + + return ret; +} + +static int ov5693_t_focus_rel(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + return ov5693_t_focus_abs(sd, dev->focus + value); +} + +#define DELAY_PER_STEP_NS 1000000 +#define DELAY_MAX_PER_STEP_NS (1000000 * 1023) +static int ov5693_q_focus_status(struct v4l2_subdev *sd, s32 *value) +{ + u32 status = 0; + struct ov5693_device *dev = to_ov5693_sensor(sd); + ktime_t temptime; + ktime_t timedelay = ns_to_ktime(min_t(u32, + abs(dev->number_of_steps) * DELAY_PER_STEP_NS, + DELAY_MAX_PER_STEP_NS)); + + temptime = ktime_sub(ktime_get(), (dev->timestamp_t_focus_abs)); + if (ktime_compare(temptime, timedelay) <= 0) { + status |= ATOMISP_FOCUS_STATUS_MOVING; + status |= ATOMISP_FOCUS_HP_IN_PROGRESS; + } else { + status |= ATOMISP_FOCUS_STATUS_ACCEPTS_NEW_MOVE; + status |= ATOMISP_FOCUS_HP_COMPLETE; + } + + *value = status; + + return 0; +} + +static int ov5693_q_focus_abs(struct v4l2_subdev *sd, s32 *value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + s32 val; + + ov5693_q_focus_status(sd, &val); + + if (val & ATOMISP_FOCUS_STATUS_MOVING) + *value = dev->focus - dev->number_of_steps; + else + *value = dev->focus; + + return 0; +} + +static int ov5693_t_vcm_slew(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + dev->number_of_steps = value; + dev->vcm_update = true; + return 0; +} + +static int ov5693_t_vcm_timing(struct v4l2_subdev *sd, s32 value) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + dev->number_of_steps = value; + dev->vcm_update = true; + return 0; +} + +static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov5693_device *dev = + container_of(ctrl->handler, struct ov5693_device, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_FOCUS_ABSOLUTE: + dev_dbg(&client->dev, "%s: CID_FOCUS_ABSOLUTE:%d.\n", + __func__, ctrl->val); + ret = ov5693_t_focus_abs(&dev->sd, ctrl->val); + break; + case V4L2_CID_FOCUS_RELATIVE: + dev_dbg(&client->dev, "%s: CID_FOCUS_RELATIVE:%d.\n", + __func__, ctrl->val); + ret = ov5693_t_focus_rel(&dev->sd, ctrl->val); + break; + case V4L2_CID_VCM_SLEW: + ret = ov5693_t_vcm_slew(&dev->sd, ctrl->val); + break; + case V4L2_CID_VCM_TIMEING: + ret = ov5693_t_vcm_timing(&dev->sd, ctrl->val); + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov5693_device *dev = + container_of(ctrl->handler, struct ov5693_device, ctrl_handler); + int ret = 0; + + switch (ctrl->id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + ret = ov5693_q_exposure(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCAL_ABSOLUTE: + ret = ov5693_g_focal(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_ABSOLUTE: + ret = ov5693_g_fnumber(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FNUMBER_RANGE: + ret = ov5693_g_fnumber_range(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCUS_ABSOLUTE: + ret = ov5693_q_focus_abs(&dev->sd, &ctrl->val); + break; + case V4L2_CID_FOCUS_STATUS: + ret = ov5693_q_focus_status(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_HORZ: + ret = ov5693_g_bin_factor_x(&dev->sd, &ctrl->val); + break; + case V4L2_CID_BIN_FACTOR_VERT: + ret = ov5693_g_bin_factor_y(&dev->sd, &ctrl->val); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = ov5693_s_ctrl, + .g_volatile_ctrl = ov5693_g_volatile_ctrl +}; + +static const struct v4l2_ctrl_config ov5693_controls[] = { + { + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV5693_FOCAL_LENGTH_DEFAULT, + .max = OV5693_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV5693_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV5693_F_NUMBER_DEFAULT, + .max = OV5693_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV5693_F_NUMBER_DEFAULT, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV5693_F_NUMBER_RANGE, + .max = OV5693_F_NUMBER_RANGE, + .step = 0x01, + .def = OV5693_F_NUMBER_RANGE, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus move absolute", + .min = 0, + .max = OV5693_VCM_MAX_FOCUS_POS, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_RELATIVE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus move relative", + .min = OV5693_VCM_MAX_FOCUS_NEG, + .max = OV5693_VCM_MAX_FOCUS_POS, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_STATUS, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus status", + .min = 0, + .max = 100, /* allow enum to grow in the future */ + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VCM_SLEW, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vcm slew", + .min = 0, + .max = OV5693_VCM_SLEW_STEP_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_VCM_TIMEING, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vcm step time", + .min = 0, + .max = OV5693_VCM_SLEW_TIME_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = OV5693_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, + { + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = OV5693_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, +}; + +static int ov5693_init(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + pr_info("%s\n", __func__); + mutex_lock(&dev->input_lock); + dev->vcm_update = false; + + if (dev->vcm == VCM_AD5823) { + ret = vcm_ad_i2c_wr8(client, 0x01, 0x01); /* vcm init test */ + if (ret) + dev_err(&client->dev, + "vcm reset failed\n"); + /*change the mode*/ + ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_MSB, + AD5823_RING_CTRL_ENABLE); + if (ret) + dev_err(&client->dev, + "vcm enable ringing failed\n"); + ret = ad5823_i2c_write(client, AD5823_REG_MODE, + AD5823_ARC_RES1); + if (ret) + dev_err(&client->dev, + "vcm change mode failed\n"); + } + + /*change initial focus value for ad5823*/ + if (dev->vcm == VCM_AD5823) { + dev->focus = AD5823_INIT_FOCUS_POS; + ov5693_t_focus_abs(sd, AD5823_INIT_FOCUS_POS); + } else { + dev->focus = 0; + ov5693_t_focus_abs(sd, 0); + } + + mutex_unlock(&dev->input_lock); + + return 0; +} + +static int power_ctrl(struct v4l2_subdev *sd, bool flag) +{ + int ret; + struct ov5693_device *dev = to_ov5693_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + /* + * This driver assumes "internal DVDD, PWDNB tied to DOVDD". + * In this set up only gpio0 (XSHUTDN) should be available + * but in some products (for example ECS) gpio1 (PWDNB) is + * also available. If gpio1 is available we emulate it being + * tied to DOVDD here. + */ + if (flag) { + ret = dev->platform_data->v2p8_ctrl(sd, 1); + dev->platform_data->gpio1_ctrl(sd, 1); + if (ret == 0) { + ret = dev->platform_data->v1p8_ctrl(sd, 1); + if (ret) { + dev->platform_data->gpio1_ctrl(sd, 0); + ret = dev->platform_data->v2p8_ctrl(sd, 0); + } + } + } else { + dev->platform_data->gpio1_ctrl(sd, 0); + ret = dev->platform_data->v1p8_ctrl(sd, 0); + ret |= dev->platform_data->v2p8_ctrl(sd, 0); + } + + return ret; +} + +static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + if (!dev || !dev->platform_data) + return -ENODEV; + + return dev->platform_data->gpio0_ctrl(sd, flag); +} + +static int __power_up(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + /* power control */ + ret = power_ctrl(sd, 1); + if (ret) + goto fail_power; + + /* according to DS, at least 5ms is needed between DOVDD and PWDN */ + /* add this delay time to 10~11ms*/ + usleep_range(10000, 11000); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 1); + if (ret) { + ret = gpio_ctrl(sd, 1); + if (ret) + goto fail_power; + } + + /* flis clock control */ + ret = dev->platform_data->flisclk_ctrl(sd, 1); + if (ret) + goto fail_clk; + + __cci_delay(up_delay); + + return 0; + +fail_clk: + gpio_ctrl(sd, 0); +fail_power: + power_ctrl(sd, 0); + dev_err(&client->dev, "sensor power-up failed\n"); + + return ret; +} + +static int power_down(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + dev->focus = OV5693_INVALID_CONFIG; + if (!dev->platform_data) { + dev_err(&client->dev, + "no camera_sensor_platform_data"); + return -ENODEV; + } + + ret = dev->platform_data->flisclk_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "flisclk failed\n"); + + /* gpio ctrl */ + ret = gpio_ctrl(sd, 0); + if (ret) { + ret = gpio_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "gpio failed 2\n"); + } + + /* power control */ + ret = power_ctrl(sd, 0); + if (ret) + dev_err(&client->dev, "vprog failed.\n"); + + return ret; +} + +static int power_up(struct v4l2_subdev *sd) +{ + static const int retry_count = 4; + int i, ret; + + for (i = 0; i < retry_count; i++) { + ret = __power_up(sd); + if (!ret) + return 0; + + power_down(sd); + } + return ret; +} + +static int ov5693_s_power(struct v4l2_subdev *sd, int on) +{ + int ret; + + pr_info("%s: on %d\n", __func__, on); + if (on == 0) + return power_down(sd); + else { + ret = power_up(sd); + if (!ret) { + ret = ov5693_init(sd); + /* restore settings */ + ov5693_res = ov5693_res_preview; + N_RES = N_RES_PREVIEW; + } + } + return ret; +} + +/* + * distance - calculate the distance + * @res: resolution + * @w: width + * @h: height + * + * Get the gap between res_w/res_h and w/h. + * distance = (res_w/res_h - w/h) / (w/h) * 8192 + * res->width/height smaller than w/h wouldn't be considered. + * The gap of ratio larger than 1/8 wouldn't be considered. + * Returns the value of gap or -1 if fail. + */ +#define LARGEST_ALLOWED_RATIO_MISMATCH 1024 +static int distance(struct ov5693_resolution *res, u32 w, u32 h) +{ + int ratio; + int distance; + + if (w == 0 || h == 0 || + res->width < w || res->height < h) + return -1; + + ratio = res->width << 13; + ratio /= w; + ratio *= h; + ratio /= res->height; + + distance = abs(ratio - 8192); + + if (distance > LARGEST_ALLOWED_RATIO_MISMATCH) + return -1; + + return distance; +} + +/* Return the nearest higher resolution index + * Firstly try to find the approximate aspect ratio resolution + * If we find multiple same AR resolutions, choose the + * minimal size. + */ +static int nearest_resolution_index(int w, int h) +{ + int i; + int idx = -1; + int dist; + int min_dist = INT_MAX; + int min_res_w = INT_MAX; + struct ov5693_resolution *tmp_res = NULL; + + for (i = 0; i < N_RES; i++) { + tmp_res = &ov5693_res[i]; + dist = distance(tmp_res, w, h); + if (dist == -1) + continue; + if (dist < min_dist) { + min_dist = dist; + idx = i; + min_res_w = ov5693_res[i].width; + continue; + } + if (dist == min_dist && ov5693_res[i].width < min_res_w) + idx = i; + } + + return idx; +} + +static int get_resolution_index(int w, int h) +{ + int i; + + for (i = 0; i < N_RES; i++) { + if (w != ov5693_res[i].width) + continue; + if (h != ov5693_res[i].height) + continue; + + return i; + } + + return -1; +} + +/* TODO: remove it. */ +static int startup(struct v4l2_subdev *sd) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + ret = ov5693_write_reg(client, OV5693_8BIT, + OV5693_SW_RESET, 0x01); + if (ret) { + dev_err(&client->dev, "ov5693 reset err.\n"); + return ret; + } + + ret = ov5693_write_reg_array(client, ov5693_global_setting); + if (ret) { + dev_err(&client->dev, "ov5693 write register err.\n"); + return ret; + } + + ret = ov5693_write_reg_array(client, ov5693_res[dev->fmt_idx].regs); + if (ret) { + dev_err(&client->dev, "ov5693 write register err.\n"); + return ret; + } + + return ret; +} + +static int ov5693_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *ov5693_info = NULL; + int ret = 0; + int idx; + + if (format->pad) + return -EINVAL; + if (!fmt) + return -EINVAL; + ov5693_info = v4l2_get_subdev_hostdata(sd); + if (ov5693_info == NULL) + return -EINVAL; + + mutex_lock(&dev->input_lock); + idx = nearest_resolution_index(fmt->width, fmt->height); + if (idx == -1) { + /* return the largest resolution */ + fmt->width = ov5693_res[N_RES - 1].width; + fmt->height = ov5693_res[N_RES - 1].height; + } else { + fmt->width = ov5693_res[idx].width; + fmt->height = ov5693_res[idx].height; + } + + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + cfg->try_fmt = *fmt; + mutex_unlock(&dev->input_lock); + return 0; + } + + dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); + if (dev->fmt_idx == -1) { + dev_err(&client->dev, "get resolution fail\n"); + mutex_unlock(&dev->input_lock); + return -EINVAL; + } + + ret = startup(sd); + if (ret) { + int i = 0; + + dev_err(&client->dev, "ov5693 startup err, retry to power up\n"); + for (i = 0; i < OV5693_POWER_UP_RETRY_NUM; i++) { + dev_err(&client->dev, + "ov5693 retry to power up %d/%d times, result: ", + i+1, OV5693_POWER_UP_RETRY_NUM); + power_down(sd); + ret = power_up(sd); + if (!ret) { + mutex_unlock(&dev->input_lock); + ov5693_init(sd); + mutex_lock(&dev->input_lock); + } else { + dev_err(&client->dev, "power up failed, continue\n"); + continue; + } + ret = startup(sd); + if (ret) { + dev_err(&client->dev, " startup FAILED!\n"); + } else { + dev_err(&client->dev, " startup SUCCESS!\n"); + break; + } + } + } + + /* + * After sensor settings are set to HW, sometimes stream is started. + * This would cause ISP timeout because ISP is not ready to receive + * data yet. So add stop streaming here. + */ + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM, + OV5693_STOP_STREAMING); + if (ret) + dev_warn(&client->dev, "ov5693 stream off err\n"); + + ret = ov5693_get_intg_factor(client, ov5693_info, + &ov5693_res[dev->fmt_idx]); + if (ret) { + dev_err(&client->dev, "failed to get integration_factor\n"); + goto err; + } + + ov5693_info->metadata_width = fmt->width * 10 / 8; + ov5693_info->metadata_height = 1; + ov5693_info->metadata_effective_width = &ov5693_embedded_effective_size; + +err: + mutex_unlock(&dev->input_lock); + return ret; +} +static int ov5693_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct ov5693_device *dev = to_ov5693_sensor(sd); + + if (format->pad) + return -EINVAL; + + if (!fmt) + return -EINVAL; + + fmt->width = ov5693_res[dev->fmt_idx].width; + fmt->height = ov5693_res[dev->fmt_idx].height; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + + return 0; +} + +static int ov5693_detect(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + u16 high, low; + int ret; + u16 id; + u8 revision; + + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_SC_CMMN_CHIP_ID_H, &high); + if (ret) { + dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); + return -ENODEV; + } + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_SC_CMMN_CHIP_ID_L, &low); + id = ((((u16) high) << 8) | (u16) low); + + if (id != OV5693_ID) { + dev_err(&client->dev, "sensor ID error 0x%x\n", id); + return -ENODEV; + } + + ret = ov5693_read_reg(client, OV5693_8BIT, + OV5693_SC_CMMN_SUB_ID, &high); + revision = (u8) high & 0x0f; + + dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); + dev_dbg(&client->dev, "detect ov5693 success\n"); + return 0; +} + +static int ov5693_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret; + + mutex_lock(&dev->input_lock); + + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM, + enable ? OV5693_START_STREAMING : + OV5693_STOP_STREAMING); + + mutex_unlock(&dev->input_lock); + + return ret; +} + + +static int ov5693_s_config(struct v4l2_subdev *sd, + int irq, void *platform_data) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (platform_data == NULL) + return -ENODEV; + + dev->platform_data = + (struct camera_sensor_platform_data *)platform_data; + + mutex_lock(&dev->input_lock); + /* power off the module, then power on it in future + * as first power on by board may not fulfill the + * power on sequqence needed by the module + */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov5693 power-off err.\n"); + goto fail_power_off; + } + + ret = power_up(sd); + if (ret) { + dev_err(&client->dev, "ov5693 power-up err.\n"); + goto fail_power_on; + } + + if (!dev->vcm) + dev->vcm = vcm_detect(client); + + ret = dev->platform_data->csi_cfg(sd, 1); + if (ret) + goto fail_csi_cfg; + + /* config & detect sensor */ + ret = ov5693_detect(client); + if (ret) { + dev_err(&client->dev, "ov5693_detect err s_config.\n"); + goto fail_csi_cfg; + } + + dev->otp_data = ov5693_otp_read(sd); + + /* turn off sensor, after probed */ + ret = power_down(sd); + if (ret) { + dev_err(&client->dev, "ov5693 power-off err.\n"); + goto fail_csi_cfg; + } + mutex_unlock(&dev->input_lock); + + return ret; + +fail_csi_cfg: + dev->platform_data->csi_cfg(sd, 0); +fail_power_on: + power_down(sd); + dev_err(&client->dev, "sensor power-gating failed\n"); +fail_power_off: + mutex_unlock(&dev->input_lock); + return ret; +} + +static int ov5693_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *interval) +{ + struct ov5693_device *dev = to_ov5693_sensor(sd); + + interval->interval.numerator = 1; + interval->interval.denominator = ov5693_res[dev->fmt_idx].fps; + + return 0; +} + +static int ov5693_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= MAX_FMTS) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int ov5693_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + int index = fse->index; + + if (index >= N_RES) + return -EINVAL; + + fse->min_width = ov5693_res[index].width; + fse->min_height = ov5693_res[index].height; + fse->max_width = ov5693_res[index].width; + fse->max_height = ov5693_res[index].height; + + return 0; + +} + +static const struct v4l2_subdev_video_ops ov5693_video_ops = { + .s_stream = ov5693_s_stream, + .g_frame_interval = ov5693_g_frame_interval, +}; + +static const struct v4l2_subdev_core_ops ov5693_core_ops = { + .s_power = ov5693_s_power, + .ioctl = ov5693_ioctl, +}; + +static const struct v4l2_subdev_pad_ops ov5693_pad_ops = { + .enum_mbus_code = ov5693_enum_mbus_code, + .enum_frame_size = ov5693_enum_frame_size, + .get_fmt = ov5693_get_fmt, + .set_fmt = ov5693_set_fmt, +}; + +static const struct v4l2_subdev_ops ov5693_ops = { + .core = &ov5693_core_ops, + .video = &ov5693_video_ops, + .pad = &ov5693_pad_ops, +}; + +static int ov5693_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov5693_device *dev = to_ov5693_sensor(sd); + + dev_dbg(&client->dev, "ov5693_remove...\n"); + + dev->platform_data->csi_cfg(sd, 0); + + v4l2_device_unregister_subdev(sd); + + atomisp_gmin_remove_subdev(sd); + + media_entity_cleanup(&dev->sd.entity); + v4l2_ctrl_handler_free(&dev->ctrl_handler); + kfree(dev); + + return 0; +} + +static int ov5693_probe(struct i2c_client *client) +{ + struct ov5693_device *dev; + int i2c; + int ret = 0; + void *pdata; + unsigned int i; + + /* + * Firmware workaround: Some modules use a "secondary default" + * address of 0x10 which doesn't appear on schematics, and + * some BIOS versions haven't gotten the memo. Work around + * via config. + */ + i2c = gmin_get_var_int(&client->dev, "I2CAddr", -1); + if (i2c != -1) { + dev_info(&client->dev, + "Overriding firmware-provided I2C address (0x%x) with 0x%x\n", + client->addr, i2c); + client->addr = i2c; + } + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + mutex_init(&dev->input_lock); + + dev->fmt_idx = 0; + v4l2_i2c_subdev_init(&(dev->sd), client, &ov5693_ops); + + pdata = gmin_camera_platform_data(&dev->sd, + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_bggr); + if (!pdata) + goto out_free; + + ret = ov5693_s_config(&dev->sd, client->irq, pdata); + if (ret) + goto out_free; + + ret = atomisp_register_i2c_module(&dev->sd, pdata, RAW_CAMERA); + if (ret) + goto out_free; + + dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + dev->pad.flags = MEDIA_PAD_FL_SOURCE; + dev->format.code = MEDIA_BUS_FMT_SBGGR10_1X10; + dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = + v4l2_ctrl_handler_init(&dev->ctrl_handler, + ARRAY_SIZE(ov5693_controls)); + if (ret) { + ov5693_remove(client); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(ov5693_controls); i++) + v4l2_ctrl_new_custom(&dev->ctrl_handler, &ov5693_controls[i], + NULL); + + if (dev->ctrl_handler.error) { + ov5693_remove(client); + return dev->ctrl_handler.error; + } + + /* Use same lock for controls as for everything else. */ + dev->ctrl_handler.lock = &dev->input_lock; + dev->sd.ctrl_handler = &dev->ctrl_handler; + + ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); + if (ret) + ov5693_remove(client); + + return ret; +out_free: + v4l2_device_unregister_subdev(&dev->sd); + kfree(dev); + return ret; +} + +static const struct acpi_device_id ov5693_acpi_match[] = { + {"INT33BE"}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match); + +static struct i2c_driver ov5693_driver = { + .driver = { + .name = "ov5693", + .acpi_match_table = ov5693_acpi_match, + }, + .probe_new = ov5693_probe, + .remove = ov5693_remove, +}; +module_i2c_driver(ov5693_driver); + +MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h b/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h new file mode 100644 index 0000000000000..bba99406785e3 --- /dev/null +++ b/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h @@ -0,0 +1,1392 @@ +/* + * Support for OmniVision OV5693 5M camera sensor. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __OV5693_H__ +#define __OV5693_H__ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../../include/linux/atomisp_platform.h" + +/* + * FIXME: non-preview resolutions are currently broken + */ +#define ENABLE_NON_PREVIEW 0 + + +#define OV5693_POWER_UP_RETRY_NUM 5 + +/* Defines for register writes and register array processing */ +#define I2C_MSG_LENGTH 0x2 +#define I2C_RETRY_COUNT 5 + +#define OV5693_FOCAL_LENGTH_NUM 334 /*3.34mm*/ +#define OV5693_FOCAL_LENGTH_DEM 100 +#define OV5693_F_NUMBER_DEFAULT_NUM 24 +#define OV5693_F_NUMBER_DEM 10 + +#define MAX_FMTS 1 + +/* sensor_mode_data read_mode adaptation */ +#define OV5693_READ_MODE_BINNING_ON 0x0400 +#define OV5693_READ_MODE_BINNING_OFF 0x00 +#define OV5693_INTEGRATION_TIME_MARGIN 8 + +#define OV5693_MAX_EXPOSURE_VALUE 0xFFF1 +#define OV5693_MAX_GAIN_VALUE 0xFF + +/* + * focal length bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV5693_FOCAL_LENGTH_DEFAULT 0x1B70064 + +/* + * current f-number bits definition: + * bits 31-16: numerator, bits 15-0: denominator + */ +#define OV5693_F_NUMBER_DEFAULT 0x18000a + +/* + * f-number range bits definition: + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ +#define OV5693_F_NUMBER_RANGE 0x180a180a +#define OV5693_ID 0x5690 + +#define OV5693_FINE_INTG_TIME_MIN 0 +#define OV5693_FINE_INTG_TIME_MAX_MARGIN 0 +#define OV5693_COARSE_INTG_TIME_MIN 1 +#define OV5693_COARSE_INTG_TIME_MAX_MARGIN 6 + +#define OV5693_BIN_FACTOR_MAX 4 +/* + * OV5693 System control registers + */ +#define OV5693_SW_SLEEP 0x0100 +#define OV5693_SW_RESET 0x0103 +#define OV5693_SW_STREAM 0x0100 + +#define OV5693_SC_CMMN_CHIP_ID_H 0x300A +#define OV5693_SC_CMMN_CHIP_ID_L 0x300B +#define OV5693_SC_CMMN_SCCB_ID 0x300C +#define OV5693_SC_CMMN_SUB_ID 0x302A /* process, version*/ +/*Bit[7:4] Group control, Bit[3:0] Group ID*/ +#define OV5693_GROUP_ACCESS 0x3208 +/* +*Bit[3:0] Bit[19:16] of exposure, +*remaining 16 bits lies in Reg0x3501&Reg0x3502 +*/ +#define OV5693_EXPOSURE_H 0x3500 +#define OV5693_EXPOSURE_M 0x3501 +#define OV5693_EXPOSURE_L 0x3502 +/*Bit[1:0] means Bit[9:8] of gain*/ +#define OV5693_AGC_H 0x350A +#define OV5693_AGC_L 0x350B /*Bit[7:0] of gain*/ + +#define OV5693_HORIZONTAL_START_H 0x3800 /*Bit[11:8]*/ +#define OV5693_HORIZONTAL_START_L 0x3801 /*Bit[7:0]*/ +#define OV5693_VERTICAL_START_H 0x3802 /*Bit[11:8]*/ +#define OV5693_VERTICAL_START_L 0x3803 /*Bit[7:0]*/ +#define OV5693_HORIZONTAL_END_H 0x3804 /*Bit[11:8]*/ +#define OV5693_HORIZONTAL_END_L 0x3805 /*Bit[7:0]*/ +#define OV5693_VERTICAL_END_H 0x3806 /*Bit[11:8]*/ +#define OV5693_VERTICAL_END_L 0x3807 /*Bit[7:0]*/ +#define OV5693_HORIZONTAL_OUTPUT_SIZE_H 0x3808 /*Bit[3:0]*/ +#define OV5693_HORIZONTAL_OUTPUT_SIZE_L 0x3809 /*Bit[7:0]*/ +#define OV5693_VERTICAL_OUTPUT_SIZE_H 0x380a /*Bit[3:0]*/ +#define OV5693_VERTICAL_OUTPUT_SIZE_L 0x380b /*Bit[7:0]*/ +/*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV5693_TIMING_HTS_H 0x380C +/*High 8-bit, and low 8-bit HTS address is 0x380d*/ +#define OV5693_TIMING_HTS_L 0x380D +/*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV5693_TIMING_VTS_H 0x380e +/*High 8-bit, and low 8-bit HTS address is 0x380f*/ +#define OV5693_TIMING_VTS_L 0x380f + +#define OV5693_MWB_RED_GAIN_H 0x3400 +#define OV5693_MWB_GREEN_GAIN_H 0x3402 +#define OV5693_MWB_BLUE_GAIN_H 0x3404 +#define OV5693_MWB_GAIN_MAX 0x0fff + +#define OV5693_START_STREAMING 0x01 +#define OV5693_STOP_STREAMING 0x00 + +#define VCM_ADDR 0x0c +#define VCM_CODE_MSB 0x04 + +#define OV5693_INVALID_CONFIG 0xffffffff + +#define OV5693_VCM_SLEW_STEP 0x30F0 +#define OV5693_VCM_SLEW_STEP_MAX 0x7 +#define OV5693_VCM_SLEW_STEP_MASK 0x7 +#define OV5693_VCM_CODE 0x30F2 +#define OV5693_VCM_SLEW_TIME 0x30F4 +#define OV5693_VCM_SLEW_TIME_MAX 0xffff +#define OV5693_VCM_ENABLE 0x8000 + +#define OV5693_VCM_MAX_FOCUS_NEG -1023 +#define OV5693_VCM_MAX_FOCUS_POS 1023 + +#define DLC_ENABLE 1 +#define DLC_DISABLE 0 +#define VCM_PROTECTION_OFF 0xeca3 +#define VCM_PROTECTION_ON 0xdc51 +#define VCM_DEFAULT_S 0x0 +#define vcm_step_s(a) (u8)(a & 0xf) +#define vcm_step_mclk(a) (u8)((a >> 4) & 0x3) +#define vcm_dlc_mclk(dlc, mclk) (u16)((dlc << 3) | mclk | 0xa104) +#define vcm_tsrc(tsrc) (u16)(tsrc << 3 | 0xf200) +#define vcm_val(data, s) (u16)(data << 4 | s) +#define DIRECT_VCM vcm_dlc_mclk(0, 0) + +/* Defines for OTP Data Registers */ +#define OV5693_FRAME_OFF_NUM 0x4202 +#define OV5693_OTP_BYTE_MAX 32 //change to 32 as needed by otpdata +#define OV5693_OTP_SHORT_MAX 16 +#define OV5693_OTP_START_ADDR 0x3D00 +#define OV5693_OTP_END_ADDR 0x3D0F +#define OV5693_OTP_DATA_SIZE 320 +#define OV5693_OTP_PROGRAM_REG 0x3D80 +#define OV5693_OTP_READ_REG 0x3D81 // 1:Enable 0:disable +#define OV5693_OTP_BANK_REG 0x3D84 //otp bank and mode +#define OV5693_OTP_READY_REG_DONE 1 +#define OV5693_OTP_BANK_MAX 28 +#define OV5693_OTP_BANK_SIZE 16 //16 bytes per bank +#define OV5693_OTP_READ_ONETIME 16 +#define OV5693_OTP_MODE_READ 1 + +struct regval_list { + u16 reg_num; + u8 value; +}; + +struct ov5693_resolution { + u8 *desc; + const struct ov5693_reg *regs; + int res; + int width; + int height; + int fps; + int pix_clk_freq; + u16 pixels_per_line; + u16 lines_per_frame; + u8 bin_factor_x; + u8 bin_factor_y; + u8 bin_mode; + bool used; +}; + +struct ov5693_format { + u8 *desc; + u32 pixelformat; + struct ov5693_reg *regs; +}; + +enum vcm_type { + VCM_UNKNOWN, + VCM_AD5823, + VCM_DW9714, +}; + +/* + * ov5693 device structure. + */ +struct ov5693_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; + struct v4l2_ctrl_handler ctrl_handler; + + struct camera_sensor_platform_data *platform_data; + ktime_t timestamp_t_focus_abs; + int vt_pix_clk_freq_mhz; + int fmt_idx; + int run_mode; + int otp_size; + u8 *otp_data; + u32 focus; + s16 number_of_steps; + u8 res; + u8 type; + bool vcm_update; + enum vcm_type vcm; +}; + +enum ov5693_tok_type { + OV5693_8BIT = 0x0001, + OV5693_16BIT = 0x0002, + OV5693_32BIT = 0x0004, + OV5693_TOK_TERM = 0xf000, /* terminating token for reg list */ + OV5693_TOK_DELAY = 0xfe00, /* delay token for reg list */ + OV5693_TOK_MASK = 0xfff0 +}; + +/** + * struct ov5693_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct ov5693_reg { + enum ov5693_tok_type type; + u16 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd) + +#define OV5693_MAX_WRITE_BUF_SIZE 30 + +struct ov5693_write_buffer { + u16 addr; + u8 data[OV5693_MAX_WRITE_BUF_SIZE]; +}; + +struct ov5693_write_ctrl { + int index; + struct ov5693_write_buffer buffer; +}; + +static struct ov5693_reg const ov5693_global_setting[] = { + {OV5693_8BIT, 0x0103, 0x01}, + {OV5693_8BIT, 0x3001, 0x0a}, + {OV5693_8BIT, 0x3002, 0x80}, + {OV5693_8BIT, 0x3006, 0x00}, + {OV5693_8BIT, 0x3011, 0x21}, + {OV5693_8BIT, 0x3012, 0x09}, + {OV5693_8BIT, 0x3013, 0x10}, + {OV5693_8BIT, 0x3014, 0x00}, + {OV5693_8BIT, 0x3015, 0x08}, + {OV5693_8BIT, 0x3016, 0xf0}, + {OV5693_8BIT, 0x3017, 0xf0}, + {OV5693_8BIT, 0x3018, 0xf0}, + {OV5693_8BIT, 0x301b, 0xb4}, + {OV5693_8BIT, 0x301d, 0x02}, + {OV5693_8BIT, 0x3021, 0x00}, + {OV5693_8BIT, 0x3022, 0x01}, + {OV5693_8BIT, 0x3028, 0x44}, + {OV5693_8BIT, 0x3098, 0x02}, + {OV5693_8BIT, 0x3099, 0x19}, + {OV5693_8BIT, 0x309a, 0x02}, + {OV5693_8BIT, 0x309b, 0x01}, + {OV5693_8BIT, 0x309c, 0x00}, + {OV5693_8BIT, 0x30a0, 0xd2}, + {OV5693_8BIT, 0x30a2, 0x01}, + {OV5693_8BIT, 0x30b2, 0x00}, + {OV5693_8BIT, 0x30b3, 0x7d}, + {OV5693_8BIT, 0x30b4, 0x03}, + {OV5693_8BIT, 0x30b5, 0x04}, + {OV5693_8BIT, 0x30b6, 0x01}, + {OV5693_8BIT, 0x3104, 0x21}, + {OV5693_8BIT, 0x3106, 0x00}, + {OV5693_8BIT, 0x3400, 0x04}, + {OV5693_8BIT, 0x3401, 0x00}, + {OV5693_8BIT, 0x3402, 0x04}, + {OV5693_8BIT, 0x3403, 0x00}, + {OV5693_8BIT, 0x3404, 0x04}, + {OV5693_8BIT, 0x3405, 0x00}, + {OV5693_8BIT, 0x3406, 0x01}, + {OV5693_8BIT, 0x3500, 0x00}, + {OV5693_8BIT, 0x3503, 0x07}, + {OV5693_8BIT, 0x3504, 0x00}, + {OV5693_8BIT, 0x3505, 0x00}, + {OV5693_8BIT, 0x3506, 0x00}, + {OV5693_8BIT, 0x3507, 0x02}, + {OV5693_8BIT, 0x3508, 0x00}, + {OV5693_8BIT, 0x3509, 0x10}, + {OV5693_8BIT, 0x350a, 0x00}, + {OV5693_8BIT, 0x350b, 0x40}, + {OV5693_8BIT, 0x3601, 0x0a}, + {OV5693_8BIT, 0x3602, 0x38}, + {OV5693_8BIT, 0x3612, 0x80}, + {OV5693_8BIT, 0x3620, 0x54}, + {OV5693_8BIT, 0x3621, 0xc7}, + {OV5693_8BIT, 0x3622, 0x0f}, + {OV5693_8BIT, 0x3625, 0x10}, + {OV5693_8BIT, 0x3630, 0x55}, + {OV5693_8BIT, 0x3631, 0xf4}, + {OV5693_8BIT, 0x3632, 0x00}, + {OV5693_8BIT, 0x3633, 0x34}, + {OV5693_8BIT, 0x3634, 0x02}, + {OV5693_8BIT, 0x364d, 0x0d}, + {OV5693_8BIT, 0x364f, 0xdd}, + {OV5693_8BIT, 0x3660, 0x04}, + {OV5693_8BIT, 0x3662, 0x10}, + {OV5693_8BIT, 0x3663, 0xf1}, + {OV5693_8BIT, 0x3665, 0x00}, + {OV5693_8BIT, 0x3666, 0x20}, + {OV5693_8BIT, 0x3667, 0x00}, + {OV5693_8BIT, 0x366a, 0x80}, + {OV5693_8BIT, 0x3680, 0xe0}, + {OV5693_8BIT, 0x3681, 0x00}, + {OV5693_8BIT, 0x3700, 0x42}, + {OV5693_8BIT, 0x3701, 0x14}, + {OV5693_8BIT, 0x3702, 0xa0}, + {OV5693_8BIT, 0x3703, 0xd8}, + {OV5693_8BIT, 0x3704, 0x78}, + {OV5693_8BIT, 0x3705, 0x02}, + {OV5693_8BIT, 0x370a, 0x00}, + {OV5693_8BIT, 0x370b, 0x20}, + {OV5693_8BIT, 0x370c, 0x0c}, + {OV5693_8BIT, 0x370d, 0x11}, + {OV5693_8BIT, 0x370e, 0x00}, + {OV5693_8BIT, 0x370f, 0x40}, + {OV5693_8BIT, 0x3710, 0x00}, + {OV5693_8BIT, 0x371a, 0x1c}, + {OV5693_8BIT, 0x371b, 0x05}, + {OV5693_8BIT, 0x371c, 0x01}, + {OV5693_8BIT, 0x371e, 0xa1}, + {OV5693_8BIT, 0x371f, 0x0c}, + {OV5693_8BIT, 0x3721, 0x00}, + {OV5693_8BIT, 0x3724, 0x10}, + {OV5693_8BIT, 0x3726, 0x00}, + {OV5693_8BIT, 0x372a, 0x01}, + {OV5693_8BIT, 0x3730, 0x10}, + {OV5693_8BIT, 0x3738, 0x22}, + {OV5693_8BIT, 0x3739, 0xe5}, + {OV5693_8BIT, 0x373a, 0x50}, + {OV5693_8BIT, 0x373b, 0x02}, + {OV5693_8BIT, 0x373c, 0x41}, + {OV5693_8BIT, 0x373f, 0x02}, + {OV5693_8BIT, 0x3740, 0x42}, + {OV5693_8BIT, 0x3741, 0x02}, + {OV5693_8BIT, 0x3742, 0x18}, + {OV5693_8BIT, 0x3743, 0x01}, + {OV5693_8BIT, 0x3744, 0x02}, + {OV5693_8BIT, 0x3747, 0x10}, + {OV5693_8BIT, 0x374c, 0x04}, + {OV5693_8BIT, 0x3751, 0xf0}, + {OV5693_8BIT, 0x3752, 0x00}, + {OV5693_8BIT, 0x3753, 0x00}, + {OV5693_8BIT, 0x3754, 0xc0}, + {OV5693_8BIT, 0x3755, 0x00}, + {OV5693_8BIT, 0x3756, 0x1a}, + {OV5693_8BIT, 0x3758, 0x00}, + {OV5693_8BIT, 0x3759, 0x0f}, + {OV5693_8BIT, 0x376b, 0x44}, + {OV5693_8BIT, 0x375c, 0x04}, + {OV5693_8BIT, 0x3774, 0x10}, + {OV5693_8BIT, 0x3776, 0x00}, + {OV5693_8BIT, 0x377f, 0x08}, + {OV5693_8BIT, 0x3780, 0x22}, + {OV5693_8BIT, 0x3781, 0x0c}, + {OV5693_8BIT, 0x3784, 0x2c}, + {OV5693_8BIT, 0x3785, 0x1e}, + {OV5693_8BIT, 0x378f, 0xf5}, + {OV5693_8BIT, 0x3791, 0xb0}, + {OV5693_8BIT, 0x3795, 0x00}, + {OV5693_8BIT, 0x3796, 0x64}, + {OV5693_8BIT, 0x3797, 0x11}, + {OV5693_8BIT, 0x3798, 0x30}, + {OV5693_8BIT, 0x3799, 0x41}, + {OV5693_8BIT, 0x379a, 0x07}, + {OV5693_8BIT, 0x379b, 0xb0}, + {OV5693_8BIT, 0x379c, 0x0c}, + {OV5693_8BIT, 0x37c5, 0x00}, + {OV5693_8BIT, 0x37c6, 0x00}, + {OV5693_8BIT, 0x37c7, 0x00}, + {OV5693_8BIT, 0x37c9, 0x00}, + {OV5693_8BIT, 0x37ca, 0x00}, + {OV5693_8BIT, 0x37cb, 0x00}, + {OV5693_8BIT, 0x37de, 0x00}, + {OV5693_8BIT, 0x37df, 0x00}, + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3810, 0x00}, + {OV5693_8BIT, 0x3812, 0x00}, + {OV5693_8BIT, 0x3823, 0x00}, + {OV5693_8BIT, 0x3824, 0x00}, + {OV5693_8BIT, 0x3825, 0x00}, + {OV5693_8BIT, 0x3826, 0x00}, + {OV5693_8BIT, 0x3827, 0x00}, + {OV5693_8BIT, 0x382a, 0x04}, + {OV5693_8BIT, 0x3a04, 0x06}, + {OV5693_8BIT, 0x3a05, 0x14}, + {OV5693_8BIT, 0x3a06, 0x00}, + {OV5693_8BIT, 0x3a07, 0xfe}, + {OV5693_8BIT, 0x3b00, 0x00}, + {OV5693_8BIT, 0x3b02, 0x00}, + {OV5693_8BIT, 0x3b03, 0x00}, + {OV5693_8BIT, 0x3b04, 0x00}, + {OV5693_8BIT, 0x3b05, 0x00}, + {OV5693_8BIT, 0x3e07, 0x20}, + {OV5693_8BIT, 0x4000, 0x08}, + {OV5693_8BIT, 0x4001, 0x04}, + {OV5693_8BIT, 0x4002, 0x45}, + {OV5693_8BIT, 0x4004, 0x08}, + {OV5693_8BIT, 0x4005, 0x18}, + {OV5693_8BIT, 0x4006, 0x20}, + {OV5693_8BIT, 0x4008, 0x24}, + {OV5693_8BIT, 0x4009, 0x10}, + {OV5693_8BIT, 0x400c, 0x00}, + {OV5693_8BIT, 0x400d, 0x00}, + {OV5693_8BIT, 0x4058, 0x00}, + {OV5693_8BIT, 0x404e, 0x37}, + {OV5693_8BIT, 0x404f, 0x8f}, + {OV5693_8BIT, 0x4058, 0x00}, + {OV5693_8BIT, 0x4101, 0xb2}, + {OV5693_8BIT, 0x4303, 0x00}, + {OV5693_8BIT, 0x4304, 0x08}, + {OV5693_8BIT, 0x4307, 0x31}, + {OV5693_8BIT, 0x4311, 0x04}, + {OV5693_8BIT, 0x4315, 0x01}, + {OV5693_8BIT, 0x4511, 0x05}, + {OV5693_8BIT, 0x4512, 0x01}, + {OV5693_8BIT, 0x4806, 0x00}, + {OV5693_8BIT, 0x4816, 0x52}, + {OV5693_8BIT, 0x481f, 0x30}, + {OV5693_8BIT, 0x4826, 0x2c}, + {OV5693_8BIT, 0x4831, 0x64}, + {OV5693_8BIT, 0x4d00, 0x04}, + {OV5693_8BIT, 0x4d01, 0x71}, + {OV5693_8BIT, 0x4d02, 0xfd}, + {OV5693_8BIT, 0x4d03, 0xf5}, + {OV5693_8BIT, 0x4d04, 0x0c}, + {OV5693_8BIT, 0x4d05, 0xcc}, + {OV5693_8BIT, 0x4837, 0x0a}, + {OV5693_8BIT, 0x5000, 0x06}, + {OV5693_8BIT, 0x5001, 0x01}, + {OV5693_8BIT, 0x5003, 0x20}, + {OV5693_8BIT, 0x5046, 0x0a}, + {OV5693_8BIT, 0x5013, 0x00}, + {OV5693_8BIT, 0x5046, 0x0a}, + {OV5693_8BIT, 0x5780, 0x1c}, + {OV5693_8BIT, 0x5786, 0x20}, + {OV5693_8BIT, 0x5787, 0x10}, + {OV5693_8BIT, 0x5788, 0x18}, + {OV5693_8BIT, 0x578a, 0x04}, + {OV5693_8BIT, 0x578b, 0x02}, + {OV5693_8BIT, 0x578c, 0x02}, + {OV5693_8BIT, 0x578e, 0x06}, + {OV5693_8BIT, 0x578f, 0x02}, + {OV5693_8BIT, 0x5790, 0x02}, + {OV5693_8BIT, 0x5791, 0xff}, + {OV5693_8BIT, 0x5842, 0x01}, + {OV5693_8BIT, 0x5843, 0x2b}, + {OV5693_8BIT, 0x5844, 0x01}, + {OV5693_8BIT, 0x5845, 0x92}, + {OV5693_8BIT, 0x5846, 0x01}, + {OV5693_8BIT, 0x5847, 0x8f}, + {OV5693_8BIT, 0x5848, 0x01}, + {OV5693_8BIT, 0x5849, 0x0c}, + {OV5693_8BIT, 0x5e00, 0x00}, + {OV5693_8BIT, 0x5e10, 0x0c}, + {OV5693_8BIT, 0x0100, 0x00}, + {OV5693_TOK_TERM, 0, 0} +}; + +#if ENABLE_NON_PREVIEW +/* + * 654x496 30fps 17ms VBlanking 2lane 10Bit (Scaling) + */ +static struct ov5693_reg const ov5693_654x496[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x02}, + {OV5693_8BIT, 0x3809, 0x90}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0xf0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x08}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * 1296x976 30fps 17ms VBlanking 2lane 10Bit (Scaling) +*DS from 2592x1952 +*/ +static struct ov5693_reg const ov5693_1296x976[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0x00}, + + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xA3}, + + {OV5693_8BIT, 0x3808, 0x05}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x03}, + {OV5693_8BIT, 0x380b, 0xD0}, + + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + + {OV5693_8BIT, 0x3810, 0x00}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3812, 0x00}, + {OV5693_8BIT, 0x3813, 0x02}, + + {OV5693_8BIT, 0x3814, 0x11}, /*X subsample control*/ + {OV5693_8BIT, 0x3815, 0x11}, /*Y subsample control*/ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} + +}; + + +/* + * 336x256 30fps 17ms VBlanking 2lane 10Bit (Scaling) + DS from 2564x1956 + */ +static struct ov5693_reg const ov5693_336x256[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x01}, + {OV5693_8BIT, 0x3809, 0x50}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0x00}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x1E}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * 336x256 30fps 17ms VBlanking 2lane 10Bit (Scaling) + DS from 2368x1956 + */ +static struct ov5693_reg const ov5693_368x304[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3808, 0x01}, + {OV5693_8BIT, 0x3809, 0x70}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0x30}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x80}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * ov5693_192x160 30fps 17ms VBlanking 2lane 10Bit (Scaling) + DS from 2460x1956 + */ +static struct ov5693_reg const ov5693_192x160[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x80}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xA3}, + {OV5693_8BIT, 0x3808, 0x00}, + {OV5693_8BIT, 0x3809, 0xC0}, + {OV5693_8BIT, 0x380a, 0x00}, + {OV5693_8BIT, 0x380b, 0xA0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x40}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + + +static struct ov5693_reg const ov5693_736x496[] = { + {OV5693_8BIT, 0x3501, 0x3d}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc7}, + {OV5693_8BIT, 0x3803, 0x68}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0x3b}, + {OV5693_8BIT, 0x3808, 0x02}, + {OV5693_8BIT, 0x3809, 0xe0}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0xf0}, + {OV5693_8BIT, 0x380c, 0x0a}, /*hts*/ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /*vts*/ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x08}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x04}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +/* +static struct ov5693_reg const ov5693_736x496[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe6}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x02}, + {OV5693_8BIT, 0x3809, 0xe0}, + {OV5693_8BIT, 0x380a, 0x01}, + {OV5693_8BIT, 0x380b, 0xf0}, + {OV5693_8BIT, 0x380c, 0x0d}, + {OV5693_8BIT, 0x380d, 0xb0}, + {OV5693_8BIT, 0x380e, 0x05}, + {OV5693_8BIT, 0x380f, 0xf2}, + {OV5693_8BIT, 0x3811, 0x08}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x31}, + {OV5693_8BIT, 0x3815, 0x31}, + {OV5693_8BIT, 0x3820, 0x01}, + {OV5693_8BIT, 0x3821, 0x1f}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +*/ +/* + * 976x556 30fps 8.8ms VBlanking 2lane 10Bit (Scaling) + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_976x556[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa7}, + {OV5693_8BIT, 0x3808, 0x03}, + {OV5693_8BIT, 0x3809, 0xd0}, + {OV5693_8BIT, 0x380a, 0x02}, + {OV5693_8BIT, 0x380b, 0x2C}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +/*DS from 2624x1492*/ +static struct ov5693_reg const ov5693_1296x736[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0x00}, + + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xA3}, + + {OV5693_8BIT, 0x3808, 0x05}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x02}, + {OV5693_8BIT, 0x380b, 0xe0}, + + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + + {OV5693_8BIT, 0x3813, 0xE8}, + + {OV5693_8BIT, 0x3814, 0x11}, /*X subsample control*/ + {OV5693_8BIT, 0x3815, 0x11}, /*Y subsample control*/ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_reg const ov5693_1636p_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa7}, + {OV5693_8BIT, 0x3808, 0x06}, + {OV5693_8BIT, 0x3809, 0x64}, + {OV5693_8BIT, 0x380a, 0x04}, + {OV5693_8BIT, 0x380b, 0x48}, + {OV5693_8BIT, 0x380c, 0x0a}, /*hts*/ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /*vts*/ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x02}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +static struct ov5693_reg const ov5693_1616x1216_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x80}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, /*{3800,3801} Array X start*/ + {OV5693_8BIT, 0x3801, 0x08}, /* 04 //{3800,3801} Array X start*/ + {OV5693_8BIT, 0x3802, 0x00}, /*{3802,3803} Array Y start*/ + {OV5693_8BIT, 0x3803, 0x04}, /* 00 //{3802,3803} Array Y start*/ + {OV5693_8BIT, 0x3804, 0x0a}, /*{3804,3805} Array X end*/ + {OV5693_8BIT, 0x3805, 0x37}, /* 3b //{3804,3805} Array X end*/ + {OV5693_8BIT, 0x3806, 0x07}, /*{3806,3807} Array Y end*/ + {OV5693_8BIT, 0x3807, 0x9f}, /* a3 //{3806,3807} Array Y end*/ + {OV5693_8BIT, 0x3808, 0x06}, /*{3808,3809} Final output H size*/ + {OV5693_8BIT, 0x3809, 0x50}, /*{3808,3809} Final output H size*/ + {OV5693_8BIT, 0x380a, 0x04}, /*{380a,380b} Final output V size*/ + {OV5693_8BIT, 0x380b, 0xc0}, /*{380a,380b} Final output V size*/ + {OV5693_8BIT, 0x380c, 0x0a}, /*{380c,380d} HTS*/ + {OV5693_8BIT, 0x380d, 0x80}, /*{380c,380d} HTS*/ + {OV5693_8BIT, 0x380e, 0x07}, /*{380e,380f} VTS*/ + {OV5693_8BIT, 0x380f, 0xc0}, /* bc //{380e,380f} VTS*/ + {OV5693_8BIT, 0x3810, 0x00}, /*{3810,3811} windowing X offset*/ + {OV5693_8BIT, 0x3811, 0x10}, /*{3810,3811} windowing X offset*/ + {OV5693_8BIT, 0x3812, 0x00}, /*{3812,3813} windowing Y offset*/ + {OV5693_8BIT, 0x3813, 0x06}, /*{3812,3813} windowing Y offset*/ + {OV5693_8BIT, 0x3814, 0x11}, /*X subsample control*/ + {OV5693_8BIT, 0x3815, 0x11}, /*Y subsample control*/ + {OV5693_8BIT, 0x3820, 0x00}, /*FLIP/Binnning control*/ + {OV5693_8BIT, 0x3821, 0x1e}, /*MIRROR control*/ + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + + +/* + * 1940x1096 30fps 8.8ms VBlanking 2lane 10bit (Scaling) + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_1940x1096[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa7}, + {OV5693_8BIT, 0x3808, 0x07}, + {OV5693_8BIT, 0x3809, 0x94}, + {OV5693_8BIT, 0x380a, 0x04}, + {OV5693_8BIT, 0x380b, 0x48}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x02}, + {OV5693_8BIT, 0x3813, 0x02}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x80}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_reg const ov5693_2592x1456_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa4}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x20}, + {OV5693_8BIT, 0x380a, 0x05}, + {OV5693_8BIT, 0x380b, 0xb0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +static struct ov5693_reg const ov5693_2576x1456_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, + {OV5693_8BIT, 0x3801, 0x00}, + {OV5693_8BIT, 0x3802, 0x00}, + {OV5693_8BIT, 0x3803, 0xf0}, + {OV5693_8BIT, 0x3804, 0x0a}, + {OV5693_8BIT, 0x3805, 0x3f}, + {OV5693_8BIT, 0x3806, 0x06}, + {OV5693_8BIT, 0x3807, 0xa4}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x05}, + {OV5693_8BIT, 0x380b, 0xb0}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x18}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_TOK_TERM, 0, 0} +}; + +/* + * 2592x1944 30fps 0.6ms VBlanking 2lane 10Bit + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_2592x1944_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x20}, + {OV5693_8BIT, 0x380a, 0x07}, + {OV5693_8BIT, 0x380b, 0x98}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x10}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +/* + * 11:9 Full FOV Output, expected FOV Res: 2346x1920 + * ISP Effect Res: 1408x1152 + * Sensor out: 1424x1168, DS From: 2380x1952 + * + * WA: Left Offset: 8, Hor scal: 64 + */ +#if ENABLE_NON_PREVIEW +static struct ov5693_reg const ov5693_1424x1168_30fps[] = { + {OV5693_8BIT, 0x3501, 0x3b}, /* long exposure[15:8] */ + {OV5693_8BIT, 0x3502, 0x80}, /* long exposure[7:0] */ + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, /* TIMING_X_ADDR_START */ + {OV5693_8BIT, 0x3801, 0x50}, /* 80 */ + {OV5693_8BIT, 0x3802, 0x00}, /* TIMING_Y_ADDR_START */ + {OV5693_8BIT, 0x3803, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3804, 0x09}, /* TIMING_X_ADDR_END */ + {OV5693_8BIT, 0x3805, 0xdd}, /* 2525 */ + {OV5693_8BIT, 0x3806, 0x07}, /* TIMING_Y_ADDR_END */ + {OV5693_8BIT, 0x3807, 0xa1}, /* 1953 */ + {OV5693_8BIT, 0x3808, 0x05}, /* TIMING_X_OUTPUT_SIZE */ + {OV5693_8BIT, 0x3809, 0x90}, /* 1424 */ + {OV5693_8BIT, 0x380a, 0x04}, /* TIMING_Y_OUTPUT_SIZE */ + {OV5693_8BIT, 0x380b, 0x90}, /* 1168 */ + {OV5693_8BIT, 0x380c, 0x0a}, /* TIMING_HTS */ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /* TIMING_VTS */ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3810, 0x00}, /* TIMING_ISP_X_WIN */ + {OV5693_8BIT, 0x3811, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3812, 0x00}, /* TIMING_ISP_Y_WIN */ + {OV5693_8BIT, 0x3813, 0x00}, /* 0 */ + {OV5693_8BIT, 0x3814, 0x11}, /* TIME_X_INC */ + {OV5693_8BIT, 0x3815, 0x11}, /* TIME_Y_INC */ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; +#endif + +/* + * 3:2 Full FOV Output, expected FOV Res: 2560x1706 + * ISP Effect Res: 720x480 + * Sensor out: 736x496, DS From 2616x1764 + */ +static struct ov5693_reg const ov5693_736x496_30fps[] = { + {OV5693_8BIT, 0x3501, 0x3b}, /* long exposure[15:8] */ + {OV5693_8BIT, 0x3502, 0x80}, /* long exposure[7:0] */ + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3800, 0x00}, /* TIMING_X_ADDR_START */ + {OV5693_8BIT, 0x3801, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3802, 0x00}, /* TIMING_Y_ADDR_START */ + {OV5693_8BIT, 0x3803, 0x62}, /* 98 */ + {OV5693_8BIT, 0x3804, 0x0a}, /* TIMING_X_ADDR_END */ + {OV5693_8BIT, 0x3805, 0x3b}, /* 2619 */ + {OV5693_8BIT, 0x3806, 0x07}, /* TIMING_Y_ADDR_END */ + {OV5693_8BIT, 0x3807, 0x43}, /* 1859 */ + {OV5693_8BIT, 0x3808, 0x02}, /* TIMING_X_OUTPUT_SIZE */ + {OV5693_8BIT, 0x3809, 0xe0}, /* 736 */ + {OV5693_8BIT, 0x380a, 0x01}, /* TIMING_Y_OUTPUT_SIZE */ + {OV5693_8BIT, 0x380b, 0xf0}, /* 496 */ + {OV5693_8BIT, 0x380c, 0x0a}, /* TIMING_HTS */ + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, /* TIMING_VTS */ + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3810, 0x00}, /* TIMING_ISP_X_WIN */ + {OV5693_8BIT, 0x3811, 0x02}, /* 2 */ + {OV5693_8BIT, 0x3812, 0x00}, /* TIMING_ISP_Y_WIN */ + {OV5693_8BIT, 0x3813, 0x00}, /* 0 */ + {OV5693_8BIT, 0x3814, 0x11}, /* TIME_X_INC */ + {OV5693_8BIT, 0x3815, 0x11}, /* TIME_Y_INC */ + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x5041, 0x84}, /* scale is auto enabled */ + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_reg const ov5693_2576x1936_30fps[] = { + {OV5693_8BIT, 0x3501, 0x7b}, + {OV5693_8BIT, 0x3502, 0x00}, + {OV5693_8BIT, 0x3708, 0xe2}, + {OV5693_8BIT, 0x3709, 0xc3}, + {OV5693_8BIT, 0x3803, 0x00}, + {OV5693_8BIT, 0x3806, 0x07}, + {OV5693_8BIT, 0x3807, 0xa3}, + {OV5693_8BIT, 0x3808, 0x0a}, + {OV5693_8BIT, 0x3809, 0x10}, + {OV5693_8BIT, 0x380a, 0x07}, + {OV5693_8BIT, 0x380b, 0x90}, + {OV5693_8BIT, 0x380c, 0x0a}, + {OV5693_8BIT, 0x380d, 0x80}, + {OV5693_8BIT, 0x380e, 0x07}, + {OV5693_8BIT, 0x380f, 0xc0}, + {OV5693_8BIT, 0x3811, 0x18}, + {OV5693_8BIT, 0x3813, 0x00}, + {OV5693_8BIT, 0x3814, 0x11}, + {OV5693_8BIT, 0x3815, 0x11}, + {OV5693_8BIT, 0x3820, 0x00}, + {OV5693_8BIT, 0x3821, 0x1e}, + {OV5693_8BIT, 0x5002, 0x00}, + {OV5693_8BIT, 0x0100, 0x01}, + {OV5693_TOK_TERM, 0, 0} +}; + +static struct ov5693_resolution ov5693_res_preview[] = { + { + .desc = "ov5693_736x496_30fps", + .width = 736, + .height = 496, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_736x496_30fps, + }, + { + .desc = "ov5693_1616x1216_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1616x1216_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2576, + .height = 1456, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2576x1456_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2576, + .height = 1936, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2576x1936_30fps, + }, +}; +#define N_RES_PREVIEW (ARRAY_SIZE(ov5693_res_preview)) + +/* + * Disable non-preview configurations until the configuration selection is + * improved. + */ +#if ENABLE_NON_PREVIEW +struct ov5693_resolution ov5693_res_still[] = { + { + .desc = "ov5693_736x496_30fps", + .width = 736, + .height = 496, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_736x496_30fps, + }, + { + .desc = "ov5693_1424x1168_30fps", + .width = 1424, + .height = 1168, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1424x1168_30fps, + }, + { + .desc = "ov5693_1616x1216_30fps", + .width = 1616, + .height = 1216, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1616x1216_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1456, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1456_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1944, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1944_30fps, + }, +}; +#define N_RES_STILL (ARRAY_SIZE(ov5693_res_still)) + +struct ov5693_resolution ov5693_res_video[] = { + { + .desc = "ov5693_736x496_30fps", + .width = 736, + .height = 496, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_736x496, + }, + { + .desc = "ov5693_336x256_30fps", + .width = 336, + .height = 256, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_336x256, + }, + { + .desc = "ov5693_368x304_30fps", + .width = 368, + .height = 304, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_368x304, + }, + { + .desc = "ov5693_192x160_30fps", + .width = 192, + .height = 160, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 1, + .regs = ov5693_192x160, + }, + { + .desc = "ov5693_1296x736_30fps", + .width = 1296, + .height = 736, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 0, + .regs = ov5693_1296x736, + }, + { + .desc = "ov5693_1296x976_30fps", + .width = 1296, + .height = 976, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 2, + .bin_factor_y = 2, + .bin_mode = 0, + .regs = ov5693_1296x976, + }, + { + .desc = "ov5693_1636P_30fps", + .width = 1636, + .height = 1096, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1636p_30fps, + }, + { + .desc = "ov5693_1080P_30fps", + .width = 1940, + .height = 1096, + .fps = 30, + .pix_clk_freq = 160, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_1940x1096, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1456, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1456_30fps, + }, + { + .desc = "ov5693_5M_30fps", + .width = 2592, + .height = 1944, + .pix_clk_freq = 160, + .fps = 30, + .used = 0, + .pixels_per_line = 2688, + .lines_per_frame = 1984, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, + .regs = ov5693_2592x1944_30fps, + }, +}; +#define N_RES_VIDEO (ARRAY_SIZE(ov5693_res_video)) +#endif + +static struct ov5693_resolution *ov5693_res = ov5693_res_preview; +static unsigned long N_RES = N_RES_PREVIEW; +#endif diff --git a/drivers/staging/media/atomisp/include/linux/atomisp.h b/drivers/staging/media/atomisp/include/linux/atomisp.h new file mode 100644 index 0000000000000..ebe193ba3871c --- /dev/null +++ b/drivers/staging/media/atomisp/include/linux/atomisp.h @@ -0,0 +1,1359 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifdef CSS15 +#include +#else + +#ifndef _ATOM_ISP_H +#define _ATOM_ISP_H + +#include +#include + +/* struct media_device_info.hw_revision */ +#define ATOMISP_HW_REVISION_MASK 0x0000ff00 +#define ATOMISP_HW_REVISION_SHIFT 8 +#define ATOMISP_HW_REVISION_ISP2300 0x00 +#define ATOMISP_HW_REVISION_ISP2400 0x10 +#define ATOMISP_HW_REVISION_ISP2401_LEGACY 0x11 +#define ATOMISP_HW_REVISION_ISP2401 0x20 + +#define ATOMISP_HW_STEPPING_MASK 0x000000ff +#define ATOMISP_HW_STEPPING_A0 0x00 +#define ATOMISP_HW_STEPPING_B0 0x10 + +/*ISP binary running mode*/ +#define CI_MODE_PREVIEW 0x8000 +#define CI_MODE_VIDEO 0x4000 +#define CI_MODE_STILL_CAPTURE 0x2000 +#define CI_MODE_CONTINUOUS 0x1000 +#define CI_MODE_NONE 0x0000 + +#define OUTPUT_MODE_FILE 0x0100 +#define OUTPUT_MODE_TEXT 0x0200 + +/* + * Camera HAL sets this flag in v4l2_buffer reserved2 to indicate this + * buffer has a per-frame parameter. + */ +#define ATOMISP_BUFFER_HAS_PER_FRAME_SETTING 0x80000000 + +/* Custom format for RAW capture from M10MO 0x3130314d */ +#define V4L2_PIX_FMT_CUSTOM_M10MO_RAW v4l2_fourcc('M', '1', '0', '1') + +/* Custom media bus formats being used in atomisp */ +#define V4L2_MBUS_FMT_CUSTOM_YUV420 0x8001 +#define V4L2_MBUS_FMT_CUSTOM_YVU420 0x8002 +#define V4L2_MBUS_FMT_CUSTOM_YUV422P 0x8003 +#define V4L2_MBUS_FMT_CUSTOM_YUV444 0x8004 +#define V4L2_MBUS_FMT_CUSTOM_NV12 0x8005 +#define V4L2_MBUS_FMT_CUSTOM_NV21 0x8006 +#define V4L2_MBUS_FMT_CUSTOM_NV16 0x8007 +#define V4L2_MBUS_FMT_CUSTOM_YUYV 0x8008 +#define V4L2_MBUS_FMT_CUSTOM_SBGGR16 0x8009 +#define V4L2_MBUS_FMT_CUSTOM_RGB32 0x800a + +/* Custom media bus format for M10MO RAW capture */ +#if 0 +#define V4L2_MBUS_FMT_CUSTOM_M10MO_RAW 0x800b +#endif + +/* Configuration used by Bayer noise reduction and YCC noise reduction */ +struct atomisp_nr_config { + /* [gain] Strength of noise reduction for Bayer NR (Used by Bayer NR) */ + unsigned int bnr_gain; + /* [gain] Strength of noise reduction for YCC NR (Used by YCC NR) */ + unsigned int ynr_gain; + /* [intensity] Sensitivity of Edge (Used by Bayer NR) */ + unsigned int direction; + /* [intensity] coring threshold for Cb (Used by YCC NR) */ + unsigned int threshold_cb; + /* [intensity] coring threshold for Cr (Used by YCC NR) */ + unsigned int threshold_cr; +}; + +/* Temporal noise reduction configuration */ +struct atomisp_tnr_config { + unsigned int gain; /* [gain] Strength of NR */ + unsigned int threshold_y;/* [intensity] Motion sensitivity for Y */ + unsigned int threshold_uv;/* [intensity] Motion sensitivity for U/V */ +}; + +/* Histogram. This contains num_elements values of type unsigned int. + * The data pointer is a DDR pointer (virtual address). + */ +struct atomisp_histogram { + unsigned int num_elements; + void __user *data; +}; + +enum atomisp_ob_mode { + atomisp_ob_mode_none, + atomisp_ob_mode_fixed, + atomisp_ob_mode_raster +}; + +/* Optical black level configuration */ +struct atomisp_ob_config { + /* Obtical black level mode (Fixed / Raster) */ + enum atomisp_ob_mode mode; + /* [intensity] optical black level for GR (relevant for fixed mode) */ + unsigned int level_gr; + /* [intensity] optical black level for R (relevant for fixed mode) */ + unsigned int level_r; + /* [intensity] optical black level for B (relevant for fixed mode) */ + unsigned int level_b; + /* [intensity] optical black level for GB (relevant for fixed mode) */ + unsigned int level_gb; + /* [BQ] 0..63 start position of OB area (relevant for raster mode) */ + unsigned short start_position; + /* [BQ] start..63 end position of OB area (relevant for raster mode) */ + unsigned short end_position; +}; + +/* Edge enhancement (sharpen) configuration */ +struct atomisp_ee_config { + /* [gain] The strength of sharpness. u5_11 */ + unsigned int gain; + /* [intensity] The threshold that divides noises from edge. u8_8 */ + unsigned int threshold; + /* [gain] The strength of sharpness in pell-mell area. u5_11 */ + unsigned int detail_gain; +}; + +struct atomisp_3a_output { + int ae_y; + int awb_cnt; + int awb_gr; + int awb_r; + int awb_b; + int awb_gb; + int af_hpf1; + int af_hpf2; +}; + +enum atomisp_calibration_type { + calibration_type1, + calibration_type2, + calibration_type3 +}; + +struct atomisp_calibration_group { + unsigned int size; + unsigned int type; + unsigned short *calb_grp_values; +}; + +struct atomisp_gc_config { + __u16 gain_k1; + __u16 gain_k2; +}; + +struct atomisp_3a_config { + unsigned int ae_y_coef_r; /* [gain] Weight of R for Y */ + unsigned int ae_y_coef_g; /* [gain] Weight of G for Y */ + unsigned int ae_y_coef_b; /* [gain] Weight of B for Y */ + unsigned int awb_lg_high_raw; /* [intensity] + AWB level gate high for raw */ + unsigned int awb_lg_low; /* [intensity] AWB level gate low */ + unsigned int awb_lg_high; /* [intensity] AWB level gate high */ + int af_fir1_coef[7]; /* [factor] AF FIR coefficients of fir1 */ + int af_fir2_coef[7]; /* [factor] AF FIR coefficients of fir2 */ +}; + +struct atomisp_dvs_grid_info { + uint32_t enable; + uint32_t width; + uint32_t aligned_width; + uint32_t height; + uint32_t aligned_height; + uint32_t bqs_per_grid_cell; + uint32_t num_hor_coefs; + uint32_t num_ver_coefs; +}; + +struct atomisp_dvs_envelop { + unsigned int width; + unsigned int height; +}; + +struct atomisp_grid_info { + uint32_t enable; + uint32_t use_dmem; + uint32_t has_histogram; + uint32_t s3a_width; + uint32_t s3a_height; + uint32_t aligned_width; + uint32_t aligned_height; + uint32_t s3a_bqs_per_grid_cell; + uint32_t deci_factor_log2; + uint32_t elem_bit_depth; +}; + +struct atomisp_dis_vector { + int x; + int y; +}; + + +/* DVS 2.0 Coefficient types. This structure contains 4 pointers to + * arrays that contain the coeffients for each type. + */ +struct atomisp_dvs2_coef_types { + short __user *odd_real; /** real part of the odd coefficients*/ + short __user *odd_imag; /** imaginary part of the odd coefficients*/ + short __user *even_real;/** real part of the even coefficients*/ + short __user *even_imag;/** imaginary part of the even coefficients*/ +}; + +/* + * DVS 2.0 Statistic types. This structure contains 4 pointers to + * arrays that contain the statistics for each type. + */ +struct atomisp_dvs2_stat_types { + int __user *odd_real; /** real part of the odd statistics*/ + int __user *odd_imag; /** imaginary part of the odd statistics*/ + int __user *even_real;/** real part of the even statistics*/ + int __user *even_imag;/** imaginary part of the even statistics*/ +}; + +struct atomisp_dis_coefficients { + struct atomisp_dvs_grid_info grid_info; + struct atomisp_dvs2_coef_types hor_coefs; + struct atomisp_dvs2_coef_types ver_coefs; +}; + +struct atomisp_dvs2_statistics { + struct atomisp_dvs_grid_info grid_info; + struct atomisp_dvs2_stat_types hor_prod; + struct atomisp_dvs2_stat_types ver_prod; +}; + +struct atomisp_dis_statistics { + struct atomisp_dvs2_statistics dvs2_stat; + uint32_t exp_id; +}; + +struct atomisp_3a_rgby_output { + uint32_t r; + uint32_t g; + uint32_t b; + uint32_t y; +}; + +/* + * Because we have 2 pipes at max to output metadata, therefore driver will use + * ATOMISP_MAIN_METADATA to specify the metadata from the pipe which keeps + * streaming always and use ATOMISP_SEC_METADATA to specify the metadata from + * the pipe which is streaming by request like capture pipe of ZSL or SDV mode + * as secondary metadata. And for the use case which has only one pipe + * streaming like online capture, ATOMISP_MAIN_METADATA will be used. + */ +enum atomisp_metadata_type { + ATOMISP_MAIN_METADATA = 0, + ATOMISP_SEC_METADATA, + ATOMISP_METADATA_TYPE_NUM, +}; + +struct atomisp_metadata_with_type { + /* to specify which type of metadata to get */ + enum atomisp_metadata_type type; + void __user *data; + uint32_t width; + uint32_t height; + uint32_t stride; /* in bytes */ + uint32_t exp_id; /* exposure ID */ + uint32_t *effective_width; /* mipi packets valid data size */ +}; + +struct atomisp_metadata { + void __user *data; + uint32_t width; + uint32_t height; + uint32_t stride; /* in bytes */ + uint32_t exp_id; /* exposure ID */ + uint32_t *effective_width; /* mipi packets valid data size */ +}; + +struct atomisp_ext_isp_ctrl { + uint32_t id; + uint32_t data; +}; + +struct atomisp_3a_statistics { + struct atomisp_grid_info grid_info; + struct atomisp_3a_output __user *data; + struct atomisp_3a_rgby_output __user *rgby_data; + uint32_t exp_id; /* exposure ID */ + uint32_t isp_config_id; /* isp config ID */ +}; + +/** + * struct atomisp_cont_capture_conf - continuous capture parameters + * @num_captures: number of still images to capture + * @skip_frames: number of frames to skip between 2 captures + * @offset: offset in ring buffer to start capture + * + * For example, to capture 1 frame from past, current, and 1 from future + * and skip one frame between each capture, parameters would be: + * num_captures:3 + * skip_frames:1 + * offset:-2 + */ + +struct atomisp_cont_capture_conf { + int num_captures; + unsigned int skip_frames; + int offset; + __u32 reserved[5]; +}; + +struct atomisp_ae_window { + int x_left; + int x_right; + int y_top; + int y_bottom; + int weight; +}; + +/* White Balance (Gain Adjust) */ +struct atomisp_wb_config { + unsigned int integer_bits; + unsigned int gr; /* unsigned .<16-integer_bits> */ + unsigned int r; /* unsigned .<16-integer_bits> */ + unsigned int b; /* unsigned .<16-integer_bits> */ + unsigned int gb; /* unsigned .<16-integer_bits> */ +}; + +/* Color Space Conversion settings */ +struct atomisp_cc_config { + unsigned int fraction_bits; + int matrix[3 * 3]; /* RGB2YUV Color matrix, signed + <13-fraction_bits>. */ +}; + +/* De pixel noise configuration */ +struct atomisp_de_config { + unsigned int pixelnoise; + unsigned int c1_coring_threshold; + unsigned int c2_coring_threshold; +}; + +/* Chroma enhancement */ +struct atomisp_ce_config { + unsigned char uv_level_min; + unsigned char uv_level_max; +}; + +/* Defect pixel correction configuration */ +struct atomisp_dp_config { + /* [intensity] The threshold of defect Pixel Correction, representing + * the permissible difference of intensity between one pixel and its + * surrounding pixels. Smaller values result in more frequent pixel + * corrections. u0_16 + */ + unsigned int threshold; + /* [gain] The sensitivity of mis-correction. ISP will miss a lot of + * defects if the value is set too large. u8_8 + */ + unsigned int gain; + unsigned int gr; + unsigned int r; + unsigned int b; + unsigned int gb; +}; + +/* XNR threshold */ +struct atomisp_xnr_config { + __u16 threshold; +}; + +/* metadata config */ +struct atomisp_metadata_config { + uint32_t metadata_height; + uint32_t metadata_stride; +}; + +/* + * Generic resolution structure. + */ +struct atomisp_resolution { + uint32_t width; /** Width */ + uint32_t height; /** Height */ +}; + +/* + * This specifies the coordinates (x,y) + */ +struct atomisp_zoom_point { + int32_t x; /** x coordinate */ + int32_t y; /** y coordinate */ +}; + +/* + * This specifies the region + */ +struct atomisp_zoom_region { + struct atomisp_zoom_point origin; /* Starting point coordinates for the region */ + struct atomisp_resolution resolution; /* Region resolution */ +}; + +struct atomisp_dz_config { + uint32_t dx; /** Horizontal zoom factor */ + uint32_t dy; /** Vertical zoom factor */ + struct atomisp_zoom_region zoom_region; /** region for zoom */ +}; + +struct atomisp_parm { + struct atomisp_grid_info info; + struct atomisp_dvs_grid_info dvs_grid; + struct atomisp_dvs_envelop dvs_envelop; + struct atomisp_wb_config wb_config; + struct atomisp_cc_config cc_config; + struct atomisp_ob_config ob_config; + struct atomisp_de_config de_config; + struct atomisp_dz_config dz_config; + struct atomisp_ce_config ce_config; + struct atomisp_dp_config dp_config; + struct atomisp_nr_config nr_config; + struct atomisp_ee_config ee_config; + struct atomisp_tnr_config tnr_config; + struct atomisp_metadata_config metadata_config; +}; + +struct dvs2_bq_resolution { + int width_bq; /* width [BQ] */ + int height_bq; /* height [BQ] */ +}; + +struct atomisp_dvs2_bq_resolutions { + /* GDC source image size [BQ] */ + struct dvs2_bq_resolution source_bq; + /* GDC output image size [BQ] */ + struct dvs2_bq_resolution output_bq; + /* GDC effective envelope size [BQ] */ + struct dvs2_bq_resolution envelope_bq; + /* isp pipe filter size [BQ] */ + struct dvs2_bq_resolution ispfilter_bq; + /* GDC shit size [BQ] */ + struct dvs2_bq_resolution gdc_shift_bq; +}; + +struct atomisp_dvs_6axis_config { + uint32_t exp_id; + uint32_t width_y; + uint32_t height_y; + uint32_t width_uv; + uint32_t height_uv; + uint32_t *xcoords_y; + uint32_t *ycoords_y; + uint32_t *xcoords_uv; + uint32_t *ycoords_uv; +}; + +struct atomisp_formats_config { + uint32_t video_full_range_flag; +}; + +struct atomisp_parameters { + struct atomisp_wb_config *wb_config; /* White Balance config */ + struct atomisp_cc_config *cc_config; /* Color Correction config */ + struct atomisp_tnr_config *tnr_config; /* Temporal Noise Reduction */ + struct atomisp_ecd_config *ecd_config; /* Eigen Color Demosaicing */ + struct atomisp_ynr_config *ynr_config; /* Y(Luma) Noise Reduction */ + struct atomisp_fc_config *fc_config; /* Fringe Control */ + struct atomisp_formats_config *formats_config; /* Formats Control */ + struct atomisp_cnr_config *cnr_config; /* Chroma Noise Reduction */ + struct atomisp_macc_config *macc_config; /* MACC */ + struct atomisp_ctc_config *ctc_config; /* Chroma Tone Control */ + struct atomisp_aa_config *aa_config; /* Anti-Aliasing */ + struct atomisp_aa_config *baa_config; /* Anti-Aliasing */ + struct atomisp_ce_config *ce_config; + struct atomisp_dvs_6axis_config *dvs_6axis_config; + struct atomisp_ob_config *ob_config; /* Objective Black config */ + struct atomisp_dp_config *dp_config; /* Dead Pixel config */ + struct atomisp_nr_config *nr_config; /* Noise Reduction config */ + struct atomisp_ee_config *ee_config; /* Edge Enhancement config */ + struct atomisp_de_config *de_config; /* Demosaic config */ + struct atomisp_gc_config *gc_config; /* Gamma Correction config */ + struct atomisp_anr_config *anr_config; /* Advanced Noise Reduction */ + struct atomisp_3a_config *a3a_config; /* 3A Statistics config */ + struct atomisp_xnr_config *xnr_config; /* eXtra Noise Reduction */ + struct atomisp_dz_config *dz_config; /* Digital Zoom */ + struct atomisp_cc_config *yuv2rgb_cc_config; /* Color + Correction config */ + struct atomisp_cc_config *rgb2yuv_cc_config; /* Color + Correction config */ + struct atomisp_macc_table *macc_table; + struct atomisp_gamma_table *gamma_table; + struct atomisp_ctc_table *ctc_table; + struct atomisp_xnr_table *xnr_table; + struct atomisp_rgb_gamma_table *r_gamma_table; + struct atomisp_rgb_gamma_table *g_gamma_table; + struct atomisp_rgb_gamma_table *b_gamma_table; + struct atomisp_vector *motion_vector; /* For 2-axis DVS */ + struct atomisp_shading_table *shading_table; + struct atomisp_morph_table *morph_table; + struct atomisp_dvs_coefficients *dvs_coefs; /* DVS 1.0 coefficients */ + struct atomisp_dvs2_coefficients *dvs2_coefs; /* DVS 2.0 coefficients */ + struct atomisp_capture_config *capture_config; + struct atomisp_anr_thres *anr_thres; + + void *lin_2500_config; /* Skylake: Linearization config */ + void *obgrid_2500_config; /* Skylake: OBGRID config */ + void *bnr_2500_config; /* Skylake: bayer denoise config */ + void *shd_2500_config; /* Skylake: shading config */ + void *dm_2500_config; /* Skylake: demosaic config */ + void *rgbpp_2500_config; /* Skylake: RGBPP config */ + void *dvs_stat_2500_config; /* Skylake: DVS STAT config */ + void *lace_stat_2500_config; /* Skylake: LACE STAT config */ + void *yuvp1_2500_config; /* Skylake: yuvp1 config */ + void *yuvp2_2500_config; /* Skylake: yuvp2 config */ + void *tnr_2500_config; /* Skylake: TNR config */ + void *dpc_2500_config; /* Skylake: DPC config */ + void *awb_2500_config; /* Skylake: auto white balance config */ + void *awb_fr_2500_config; /* Skylake: auto white balance filter response config */ + void *anr_2500_config; /* Skylake: ANR config */ + void *af_2500_config; /* Skylake: auto focus config */ + void *ae_2500_config; /* Skylake: auto exposure config */ + void *bds_2500_config; /* Skylake: bayer downscaler config */ + void *dvs_2500_config; /* Skylake: digital video stabilization config */ + void *res_mgr_2500_config; + + /* + * Output frame pointer the config is to be applied to (optional), + * set to NULL to make this config is applied as global. + */ + void *output_frame; + /* + * Unique ID to track which config was actually applied to a particular + * frame, driver will send this id back with output frame together. + */ + uint32_t isp_config_id; + + /* + * Switch to control per_frame setting: + * 0: this is a global setting + * 1: this is a per_frame setting + * PLEASE KEEP THIS AT THE END OF THE STRUCTURE!! + */ + uint32_t per_frame_setting; +}; + +#define ATOMISP_GAMMA_TABLE_SIZE 1024 +struct atomisp_gamma_table { + unsigned short data[ATOMISP_GAMMA_TABLE_SIZE]; +}; + +/* Morphing table for advanced ISP. + * Each line of width elements takes up COORD_TABLE_EXT_WIDTH elements + * in memory. + */ +#define ATOMISP_MORPH_TABLE_NUM_PLANES 6 +struct atomisp_morph_table { + unsigned int enabled; + + unsigned int height; + unsigned int width; /* number of valid elements per line */ + unsigned short __user *coordinates_x[ATOMISP_MORPH_TABLE_NUM_PLANES]; + unsigned short __user *coordinates_y[ATOMISP_MORPH_TABLE_NUM_PLANES]; +}; + +#define ATOMISP_NUM_SC_COLORS 4 +#define ATOMISP_SC_FLAG_QUERY (1 << 0) + +struct atomisp_shading_table { + __u32 enable; + + __u32 sensor_width; + __u32 sensor_height; + __u32 width; + __u32 height; + __u32 fraction_bits; + + __u16 *data[ATOMISP_NUM_SC_COLORS]; +}; + +struct atomisp_makernote_info { + /* bits 31-16: numerator, bits 15-0: denominator */ + unsigned int focal_length; + /* bits 31-16: numerator, bits 15-0: denominator*/ + unsigned int f_number_curr; + /* + * bits 31-24: max f-number numerator + * bits 23-16: max f-number denominator + * bits 15-8: min f-number numerator + * bits 7-0: min f-number denominator + */ + unsigned int f_number_range; +}; + +/* parameter for MACC */ +#define ATOMISP_NUM_MACC_AXES 16 +struct atomisp_macc_table { + short data[4 * ATOMISP_NUM_MACC_AXES]; +}; + +struct atomisp_macc_config { + int color_effect; + struct atomisp_macc_table table; +}; + +/* Parameter for ctc parameter control */ +#define ATOMISP_CTC_TABLE_SIZE 1024 +struct atomisp_ctc_table { + unsigned short data[ATOMISP_CTC_TABLE_SIZE]; +}; + +/* Parameter for overlay image loading */ +struct atomisp_overlay { + /* the frame containing the overlay data The overlay frame width should + * be the multiples of 2*ISP_VEC_NELEMS. The overlay frame height + * should be the multiples of 2. + */ + struct v4l2_framebuffer *frame; + /* Y value of overlay background */ + unsigned char bg_y; + /* U value of overlay background */ + char bg_u; + /* V value of overlay background */ + char bg_v; + /* the blending percent of input data for Y subpixels */ + unsigned char blend_input_perc_y; + /* the blending percent of input data for U subpixels */ + unsigned char blend_input_perc_u; + /* the blending percent of input data for V subpixels */ + unsigned char blend_input_perc_v; + /* the blending percent of overlay data for Y subpixels */ + unsigned char blend_overlay_perc_y; + /* the blending percent of overlay data for U subpixels */ + unsigned char blend_overlay_perc_u; + /* the blending percent of overlay data for V subpixels */ + unsigned char blend_overlay_perc_v; + /* the overlay start x pixel position on output frame It should be the + multiples of 2*ISP_VEC_NELEMS. */ + unsigned int overlay_start_x; + /* the overlay start y pixel position on output frame It should be the + multiples of 2. */ + unsigned int overlay_start_y; +}; + +/* Sensor resolution specific data for AE calculation.*/ +struct atomisp_sensor_mode_data { + unsigned int coarse_integration_time_min; + unsigned int coarse_integration_time_max_margin; + unsigned int fine_integration_time_min; + unsigned int fine_integration_time_max_margin; + unsigned int fine_integration_time_def; + unsigned int frame_length_lines; + unsigned int line_length_pck; + unsigned int read_mode; + unsigned int vt_pix_clk_freq_mhz; + unsigned int crop_horizontal_start; /* Sensor crop start cord. (x0,y0)*/ + unsigned int crop_vertical_start; + unsigned int crop_horizontal_end; /* Sensor crop end cord. (x1,y1)*/ + unsigned int crop_vertical_end; + unsigned int output_width; /* input size to ISP after binning/scaling */ + unsigned int output_height; + uint8_t binning_factor_x; /* horizontal binning factor used */ + uint8_t binning_factor_y; /* vertical binning factor used */ + uint16_t hts; +}; + +struct atomisp_exposure { + unsigned int integration_time[8]; + unsigned int shutter_speed[8]; + unsigned int gain[4]; + unsigned int aperture; +}; + +/* For texture streaming. */ +struct atomisp_bc_video_package { + int ioctl_cmd; + int device_id; + int inputparam; + int outputparam; +}; + +enum atomisp_focus_hp { + ATOMISP_FOCUS_HP_IN_PROGRESS = (1U << 2), + ATOMISP_FOCUS_HP_COMPLETE = (2U << 2), + ATOMISP_FOCUS_HP_FAILED = (3U << 2) +}; + +/* Masks */ +#define ATOMISP_FOCUS_STATUS_MOVING (1U << 0) +#define ATOMISP_FOCUS_STATUS_ACCEPTS_NEW_MOVE (1U << 1) +#define ATOMISP_FOCUS_STATUS_HOME_POSITION (3U << 2) + +enum atomisp_camera_port { + ATOMISP_CAMERA_PORT_SECONDARY, + ATOMISP_CAMERA_PORT_PRIMARY, + ATOMISP_CAMERA_PORT_TERTIARY, + ATOMISP_CAMERA_NR_PORTS +}; + +/* Flash modes. Default is off. + * Setting a flash to TORCH or INDICATOR mode will automatically + * turn it on. Setting it to FLASH mode will not turn on the flash + * until the FLASH_STROBE command is sent. */ +enum atomisp_flash_mode { + ATOMISP_FLASH_MODE_OFF, + ATOMISP_FLASH_MODE_FLASH, + ATOMISP_FLASH_MODE_TORCH, + ATOMISP_FLASH_MODE_INDICATOR, +}; + +/* Flash statuses, used by atomisp driver to check before starting + * flash and after having started flash. */ +enum atomisp_flash_status { + ATOMISP_FLASH_STATUS_OK, + ATOMISP_FLASH_STATUS_HW_ERROR, + ATOMISP_FLASH_STATUS_INTERRUPTED, + ATOMISP_FLASH_STATUS_TIMEOUT, +}; + +/* Frame status. This is used to detect corrupted frames and flash + * exposed frames. Usually, the first 2 frames coming out of the sensor + * are corrupted. When using flash, the frame before and the frame after + * the flash exposed frame may be partially exposed by flash. The ISP + * statistics for these frames should not be used by the 3A library. + * The frame status value can be found in the "reserved" field in the + * v4l2_buffer struct. */ +enum atomisp_frame_status { + ATOMISP_FRAME_STATUS_OK, + ATOMISP_FRAME_STATUS_CORRUPTED, + ATOMISP_FRAME_STATUS_FLASH_EXPOSED, + ATOMISP_FRAME_STATUS_FLASH_PARTIAL, + ATOMISP_FRAME_STATUS_FLASH_FAILED, +}; + +enum atomisp_acc_type { + ATOMISP_ACC_STANDALONE, /* Stand-alone acceleration */ + ATOMISP_ACC_OUTPUT, /* Accelerator stage on output frame */ + ATOMISP_ACC_VIEWFINDER /* Accelerator stage on viewfinder frame */ +}; + +enum atomisp_acc_arg_type { + ATOMISP_ACC_ARG_SCALAR_IN, /* Scalar input argument */ + ATOMISP_ACC_ARG_SCALAR_OUT, /* Scalar output argument */ + ATOMISP_ACC_ARG_SCALAR_IO, /* Scalar in/output argument */ + ATOMISP_ACC_ARG_PTR_IN, /* Pointer input argument */ + ATOMISP_ACC_ARG_PTR_OUT, /* Pointer output argument */ + ATOMISP_ACC_ARG_PTR_IO, /* Pointer in/output argument */ + ATOMISP_ARG_PTR_NOFLUSH, /* Pointer argument will not be flushed */ + ATOMISP_ARG_PTR_STABLE, /* Pointer input argument that is stable */ + ATOMISP_ACC_ARG_FRAME /* Frame argument */ +}; + +/* ISP memories, isp2400 */ +enum atomisp_acc_memory { + ATOMISP_ACC_MEMORY_PMEM0 = 0, + ATOMISP_ACC_MEMORY_DMEM0, + /* for backward compatibility */ + ATOMISP_ACC_MEMORY_DMEM = ATOMISP_ACC_MEMORY_DMEM0, + ATOMISP_ACC_MEMORY_VMEM0, + ATOMISP_ACC_MEMORY_VAMEM0, + ATOMISP_ACC_MEMORY_VAMEM1, + ATOMISP_ACC_MEMORY_VAMEM2, + ATOMISP_ACC_MEMORY_HMEM0, + ATOMISP_ACC_NR_MEMORY +}; + +enum atomisp_ext_isp_id { + EXT_ISP_CID_ISO = 0, + EXT_ISP_CID_CAPTURE_HDR, + EXT_ISP_CID_CAPTURE_LLS, + EXT_ISP_CID_FOCUS_MODE, + EXT_ISP_CID_FOCUS_EXECUTION, + EXT_ISP_CID_TOUCH_POSX, + EXT_ISP_CID_TOUCH_POSY, + EXT_ISP_CID_CAF_STATUS, + EXT_ISP_CID_AF_STATUS, + EXT_ISP_CID_GET_AF_MODE, + EXT_ISP_CID_CAPTURE_BURST, + EXT_ISP_CID_FLASH_MODE, + EXT_ISP_CID_ZOOM, + EXT_ISP_CID_SHOT_MODE +}; + +#define EXT_ISP_FOCUS_MODE_NORMAL 0 +#define EXT_ISP_FOCUS_MODE_MACRO 1 +#define EXT_ISP_FOCUS_MODE_TOUCH_AF 2 +#define EXT_ISP_FOCUS_MODE_PREVIEW_CAF 3 +#define EXT_ISP_FOCUS_MODE_MOVIE_CAF 4 +#define EXT_ISP_FOCUS_MODE_FACE_CAF 5 +#define EXT_ISP_FOCUS_MODE_TOUCH_MACRO 6 +#define EXT_ISP_FOCUS_MODE_TOUCH_CAF 7 + +#define EXT_ISP_FOCUS_STOP 0 +#define EXT_ISP_FOCUS_SEARCH 1 +#define EXT_ISP_PAN_FOCUSING 2 + +#define EXT_ISP_CAF_RESTART_CHECK 1 +#define EXT_ISP_CAF_STATUS_FOCUSING 2 +#define EXT_ISP_CAF_STATUS_SUCCESS 3 +#define EXT_ISP_CAF_STATUS_FAIL 4 + +#define EXT_ISP_AF_STATUS_INVALID 1 +#define EXT_ISP_AF_STATUS_FOCUSING 2 +#define EXT_ISP_AF_STATUS_SUCCESS 3 +#define EXT_ISP_AF_STATUS_FAIL 4 + +enum atomisp_burst_capture_options { + EXT_ISP_BURST_CAPTURE_CTRL_START = 0, + EXT_ISP_BURST_CAPTURE_CTRL_STOP +}; + +#define EXT_ISP_FLASH_MODE_OFF 0 +#define EXT_ISP_FLASH_MODE_ON 1 +#define EXT_ISP_FLASH_MODE_AUTO 2 +#define EXT_ISP_LED_TORCH_OFF 3 +#define EXT_ISP_LED_TORCH_ON 4 + +#define EXT_ISP_SHOT_MODE_AUTO 0 +#define EXT_ISP_SHOT_MODE_BEAUTY_FACE 1 +#define EXT_ISP_SHOT_MODE_BEST_PHOTO 2 +#define EXT_ISP_SHOT_MODE_DRAMA 3 +#define EXT_ISP_SHOT_MODE_BEST_FACE 4 +#define EXT_ISP_SHOT_MODE_ERASER 5 +#define EXT_ISP_SHOT_MODE_PANORAMA 6 +#define EXT_ISP_SHOT_MODE_RICH_TONE_HDR 7 +#define EXT_ISP_SHOT_MODE_NIGHT 8 +#define EXT_ISP_SHOT_MODE_SOUND_SHOT 9 +#define EXT_ISP_SHOT_MODE_ANIMATED_PHOTO 10 +#define EXT_ISP_SHOT_MODE_SPORTS 11 + +struct atomisp_sp_arg { + enum atomisp_acc_arg_type type; /* Type of SP argument */ + void *value; /* Value of SP argument */ + unsigned int size; /* Size of SP argument */ +}; + +/* Acceleration API */ + +/* For CSS 1.0 only */ +struct atomisp_acc_fw_arg { + unsigned int fw_handle; + unsigned int index; + void __user *value; + size_t size; +}; + +/* + * Set arguments after first mapping with ATOMISP_IOC_ACC_S_MAPPED_ARG. + */ +struct atomisp_acc_s_mapped_arg { + unsigned int fw_handle; + __u32 memory; /* one of enum atomisp_acc_memory */ + size_t length; + unsigned long css_ptr; +}; + +struct atomisp_acc_fw_abort { + unsigned int fw_handle; + /* Timeout in us */ + unsigned int timeout; +}; + +struct atomisp_acc_fw_load { + unsigned int size; + unsigned int fw_handle; + void __user *data; +}; + +/* + * Load firmware to specified pipeline. + */ +struct atomisp_acc_fw_load_to_pipe { + __u32 flags; /* Flags, see below for valid values */ + unsigned int fw_handle; /* Handle, filled by kernel. */ + __u32 size; /* Firmware binary size */ + void __user *data; /* Pointer to firmware */ + __u32 type; /* Binary type */ + __u32 reserved[3]; /* Set to zero */ +}; +/* + * Set Senor run mode + */ +struct atomisp_s_runmode { + __u32 mode; +}; + +#define ATOMISP_ACC_FW_LOAD_FL_PREVIEW (1 << 0) +#define ATOMISP_ACC_FW_LOAD_FL_COPY (1 << 1) +#define ATOMISP_ACC_FW_LOAD_FL_VIDEO (1 << 2) +#define ATOMISP_ACC_FW_LOAD_FL_CAPTURE (1 << 3) +#define ATOMISP_ACC_FW_LOAD_FL_ACC (1 << 4) +#define ATOMISP_ACC_FW_LOAD_FL_ENABLE (1 << 16) + +#define ATOMISP_ACC_FW_LOAD_TYPE_NONE 0 /* Normal binary: don't use */ +#define ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT 1 /* Stage on output */ +#define ATOMISP_ACC_FW_LOAD_TYPE_VIEWFINDER 2 /* Stage on viewfinder */ +#define ATOMISP_ACC_FW_LOAD_TYPE_STANDALONE 3 /* Stand-alone acceleration */ + +struct atomisp_acc_map { + __u32 flags; /* Flags, see list below */ + __u32 length; /* Length of data in bytes */ + void __user *user_ptr; /* Pointer into user space */ + unsigned long css_ptr; /* Pointer into CSS address space */ + __u32 reserved[4]; /* Set to zero */ +}; + +#define ATOMISP_MAP_FLAG_NOFLUSH 0x0001 /* Do not flush cache */ +#define ATOMISP_MAP_FLAG_CACHED 0x0002 /* Enable cache */ + +struct atomisp_acc_state { + __u32 flags; /* Flags, see list below */ +#define ATOMISP_STATE_FLAG_ENABLE ATOMISP_ACC_FW_LOAD_FL_ENABLE + unsigned int fw_handle; +}; + +struct atomisp_update_exposure { + unsigned int gain; + unsigned int digi_gain; + unsigned int update_gain; + unsigned int update_digi_gain; +}; + +/* + * V4L2 private internal data interface. + * ----------------------------------------------------------------------------- + * struct v4l2_private_int_data - request private data stored in video device + * internal memory. + * @size: sanity check to ensure userspace's buffer fits whole private data. + * If not, kernel will make partial copy (or nothing if @size == 0). + * @size is always corrected for the minimum necessary if IOCTL returns + * no error. + * @data: pointer to userspace buffer. + */ +struct v4l2_private_int_data { + __u32 size; + void __user *data; + __u32 reserved[2]; +}; + +enum atomisp_sensor_ae_bracketing_mode { + SENSOR_AE_BRACKETING_MODE_OFF = 0, + SENSOR_AE_BRACKETING_MODE_SINGLE, /* back to SW standby after bracketing */ + SENSOR_AE_BRACKETING_MODE_SINGLE_TO_STREAMING, /* back to normal streaming after bracketing */ + SENSOR_AE_BRACKETING_MODE_LOOP, /* continue AE bracketing in loop mode */ +}; + +struct atomisp_sensor_ae_bracketing_info { + unsigned int modes; /* bit mask to indicate supported modes */ + unsigned int lut_depth; +}; + +struct atomisp_sensor_ae_bracketing_lut_entry { + __u16 coarse_integration_time; + __u16 analog_gain; + __u16 digital_gain; +}; + +struct atomisp_sensor_ae_bracketing_lut { + struct atomisp_sensor_ae_bracketing_lut_entry *lut; + unsigned int lut_size; +}; + +/*Private IOCTLs for ISP */ +#define ATOMISP_IOC_G_XNR \ + _IOR('v', BASE_VIDIOC_PRIVATE + 0, int) +#define ATOMISP_IOC_S_XNR \ + _IOW('v', BASE_VIDIOC_PRIVATE + 0, int) +#define ATOMISP_IOC_G_NR \ + _IOR('v', BASE_VIDIOC_PRIVATE + 1, struct atomisp_nr_config) +#define ATOMISP_IOC_S_NR \ + _IOW('v', BASE_VIDIOC_PRIVATE + 1, struct atomisp_nr_config) +#define ATOMISP_IOC_G_TNR \ + _IOR('v', BASE_VIDIOC_PRIVATE + 2, struct atomisp_tnr_config) +#define ATOMISP_IOC_S_TNR \ + _IOW('v', BASE_VIDIOC_PRIVATE + 2, struct atomisp_tnr_config) +#define ATOMISP_IOC_G_HISTOGRAM \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 3, struct atomisp_histogram) +#define ATOMISP_IOC_S_HISTOGRAM \ + _IOW('v', BASE_VIDIOC_PRIVATE + 3, struct atomisp_histogram) +#define ATOMISP_IOC_G_BLACK_LEVEL_COMP \ + _IOR('v', BASE_VIDIOC_PRIVATE + 4, struct atomisp_ob_config) +#define ATOMISP_IOC_S_BLACK_LEVEL_COMP \ + _IOW('v', BASE_VIDIOC_PRIVATE + 4, struct atomisp_ob_config) +#define ATOMISP_IOC_G_EE \ + _IOR('v', BASE_VIDIOC_PRIVATE + 5, struct atomisp_ee_config) +#define ATOMISP_IOC_S_EE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 5, struct atomisp_ee_config) +/* Digital Image Stabilization: + * 1. get dis statistics: reads DIS statistics from ISP (every frame) + * 2. set dis coefficients: set DIS filter coefficients (one time) + * 3. set dis motion vecotr: set motion vector (result of DIS, every frame) + */ +#define ATOMISP_IOC_G_DIS_STAT \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 6, struct atomisp_dis_statistics) + +#define ATOMISP_IOC_G_DVS2_BQ_RESOLUTIONS \ + _IOR('v', BASE_VIDIOC_PRIVATE + 6, struct atomisp_dvs2_bq_resolutions) + +#define ATOMISP_IOC_S_DIS_COEFS \ + _IOW('v', BASE_VIDIOC_PRIVATE + 6, struct atomisp_dis_coefficients) + +#define ATOMISP_IOC_S_DIS_VECTOR \ + _IOW('v', BASE_VIDIOC_PRIVATE + 6, struct atomisp_dvs_6axis_config) + +#define ATOMISP_IOC_G_3A_STAT \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 7, struct atomisp_3a_statistics) +#define ATOMISP_IOC_G_ISP_PARM \ + _IOR('v', BASE_VIDIOC_PRIVATE + 8, struct atomisp_parm) +#define ATOMISP_IOC_S_ISP_PARM \ + _IOW('v', BASE_VIDIOC_PRIVATE + 8, struct atomisp_parm) +#define ATOMISP_IOC_G_ISP_GAMMA \ + _IOR('v', BASE_VIDIOC_PRIVATE + 9, struct atomisp_gamma_table) +#define ATOMISP_IOC_S_ISP_GAMMA \ + _IOW('v', BASE_VIDIOC_PRIVATE + 9, struct atomisp_gamma_table) +#define ATOMISP_IOC_G_ISP_GDC_TAB \ + _IOR('v', BASE_VIDIOC_PRIVATE + 10, struct atomisp_morph_table) +#define ATOMISP_IOC_S_ISP_GDC_TAB \ + _IOW('v', BASE_VIDIOC_PRIVATE + 10, struct atomisp_morph_table) +#define ATOMISP_IOC_ISP_MAKERNOTE \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 11, struct atomisp_makernote_info) + +/* macc parameter control*/ +#define ATOMISP_IOC_G_ISP_MACC \ + _IOR('v', BASE_VIDIOC_PRIVATE + 12, struct atomisp_macc_config) +#define ATOMISP_IOC_S_ISP_MACC \ + _IOW('v', BASE_VIDIOC_PRIVATE + 12, struct atomisp_macc_config) + +/* Defect pixel detection & Correction */ +#define ATOMISP_IOC_G_ISP_BAD_PIXEL_DETECTION \ + _IOR('v', BASE_VIDIOC_PRIVATE + 13, struct atomisp_dp_config) +#define ATOMISP_IOC_S_ISP_BAD_PIXEL_DETECTION \ + _IOW('v', BASE_VIDIOC_PRIVATE + 13, struct atomisp_dp_config) + +/* False Color Correction */ +#define ATOMISP_IOC_G_ISP_FALSE_COLOR_CORRECTION \ + _IOR('v', BASE_VIDIOC_PRIVATE + 14, struct atomisp_de_config) +#define ATOMISP_IOC_S_ISP_FALSE_COLOR_CORRECTION \ + _IOW('v', BASE_VIDIOC_PRIVATE + 14, struct atomisp_de_config) + +/* ctc parameter control */ +#define ATOMISP_IOC_G_ISP_CTC \ + _IOR('v', BASE_VIDIOC_PRIVATE + 15, struct atomisp_ctc_table) +#define ATOMISP_IOC_S_ISP_CTC \ + _IOW('v', BASE_VIDIOC_PRIVATE + 15, struct atomisp_ctc_table) + +/* white balance Correction */ +#define ATOMISP_IOC_G_ISP_WHITE_BALANCE \ + _IOR('v', BASE_VIDIOC_PRIVATE + 16, struct atomisp_wb_config) +#define ATOMISP_IOC_S_ISP_WHITE_BALANCE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 16, struct atomisp_wb_config) + +/* fpn table loading */ +#define ATOMISP_IOC_S_ISP_FPN_TABLE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 17, struct v4l2_framebuffer) + +/* overlay image loading */ +#define ATOMISP_IOC_G_ISP_OVERLAY \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 18, struct atomisp_overlay) +#define ATOMISP_IOC_S_ISP_OVERLAY \ + _IOW('v', BASE_VIDIOC_PRIVATE + 18, struct atomisp_overlay) + +/* bcd driver bridge */ +#define ATOMISP_IOC_CAMERA_BRIDGE \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 19, struct atomisp_bc_video_package) + +/* Sensor resolution specific info for AE */ +#define ATOMISP_IOC_G_SENSOR_MODE_DATA \ + _IOR('v', BASE_VIDIOC_PRIVATE + 20, struct atomisp_sensor_mode_data) + +#define ATOMISP_IOC_S_EXPOSURE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 21, struct atomisp_exposure) + +/* sensor calibration registers group */ +#define ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 22, struct atomisp_calibration_group) + +/* white balance Correction */ +#define ATOMISP_IOC_G_3A_CONFIG \ + _IOR('v', BASE_VIDIOC_PRIVATE + 23, struct atomisp_3a_config) +#define ATOMISP_IOC_S_3A_CONFIG \ + _IOW('v', BASE_VIDIOC_PRIVATE + 23, struct atomisp_3a_config) + +/* Accelerate ioctls */ +#define ATOMISP_IOC_ACC_LOAD \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 24, struct atomisp_acc_fw_load) + +#define ATOMISP_IOC_ACC_UNLOAD \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 24, unsigned int) + +/* For CSS 1.0 only */ +#define ATOMISP_IOC_ACC_S_ARG \ + _IOW('v', BASE_VIDIOC_PRIVATE + 24, struct atomisp_acc_fw_arg) + +#define ATOMISP_IOC_ACC_START \ + _IOW('v', BASE_VIDIOC_PRIVATE + 24, unsigned int) + +#define ATOMISP_IOC_ACC_WAIT \ + _IOW('v', BASE_VIDIOC_PRIVATE + 25, unsigned int) + +#define ATOMISP_IOC_ACC_ABORT \ + _IOW('v', BASE_VIDIOC_PRIVATE + 25, struct atomisp_acc_fw_abort) + +#define ATOMISP_IOC_ACC_DESTAB \ + _IOW('v', BASE_VIDIOC_PRIVATE + 25, struct atomisp_acc_fw_arg) + +/* sensor OTP memory read */ +#define ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 26, struct v4l2_private_int_data) + +/* LCS (shading) table write */ +#define ATOMISP_IOC_S_ISP_SHD_TAB \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 27, struct atomisp_shading_table) + +/* Gamma Correction */ +#define ATOMISP_IOC_G_ISP_GAMMA_CORRECTION \ + _IOR('v', BASE_VIDIOC_PRIVATE + 28, struct atomisp_gc_config) + +#define ATOMISP_IOC_S_ISP_GAMMA_CORRECTION \ + _IOW('v', BASE_VIDIOC_PRIVATE + 28, struct atomisp_gc_config) + +/* motor internal memory read */ +#define ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 29, struct v4l2_private_int_data) + +/* + * Ioctls to map and unmap user buffers to CSS address space for acceleration. + * User fills fields length and user_ptr and sets other fields to zero, + * kernel may modify the flags and sets css_ptr. + */ +#define ATOMISP_IOC_ACC_MAP \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 30, struct atomisp_acc_map) + +/* User fills fields length, user_ptr, and css_ptr and zeroes other fields. */ +#define ATOMISP_IOC_ACC_UNMAP \ + _IOW('v', BASE_VIDIOC_PRIVATE + 30, struct atomisp_acc_map) + +#define ATOMISP_IOC_ACC_S_MAPPED_ARG \ + _IOW('v', BASE_VIDIOC_PRIVATE + 30, struct atomisp_acc_s_mapped_arg) + +#define ATOMISP_IOC_ACC_LOAD_TO_PIPE \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 31, struct atomisp_acc_fw_load_to_pipe) + +#define ATOMISP_IOC_S_PARAMETERS \ + _IOW('v', BASE_VIDIOC_PRIVATE + 32, struct atomisp_parameters) + +#define ATOMISP_IOC_S_CONT_CAPTURE_CONFIG \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 33, struct atomisp_cont_capture_conf) + +#define ATOMISP_IOC_G_METADATA \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 34, struct atomisp_metadata) + +#define ATOMISP_IOC_G_METADATA_BY_TYPE \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 34, struct atomisp_metadata_with_type) + +#define ATOMISP_IOC_EXT_ISP_CTRL \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 35, struct atomisp_ext_isp_ctrl) + +#define ATOMISP_IOC_EXP_ID_UNLOCK \ + _IOW('v', BASE_VIDIOC_PRIVATE + 36, int) + +#define ATOMISP_IOC_EXP_ID_CAPTURE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 37, int) + +#define ATOMISP_IOC_S_ENABLE_DZ_CAPT_PIPE \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 38, unsigned int) + +#define ATOMISP_IOC_G_FORMATS_CONFIG \ + _IOR('v', BASE_VIDIOC_PRIVATE + 39, struct atomisp_formats_config) + +#define ATOMISP_IOC_S_FORMATS_CONFIG \ + _IOW('v', BASE_VIDIOC_PRIVATE + 39, struct atomisp_formats_config) + +#define ATOMISP_IOC_S_EXPOSURE_WINDOW \ + _IOW('v', BASE_VIDIOC_PRIVATE + 40, struct atomisp_ae_window) + +#define ATOMISP_IOC_S_ACC_STATE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 41, struct atomisp_acc_state) + +#define ATOMISP_IOC_G_ACC_STATE \ + _IOR('v', BASE_VIDIOC_PRIVATE + 41, struct atomisp_acc_state) + +#define ATOMISP_IOC_INJECT_A_FAKE_EVENT \ + _IOW('v', BASE_VIDIOC_PRIVATE + 42, int) + +#define ATOMISP_IOC_G_SENSOR_AE_BRACKETING_INFO \ + _IOR('v', BASE_VIDIOC_PRIVATE + 43, struct atomisp_sensor_ae_bracketing_info) + +#define ATOMISP_IOC_S_SENSOR_AE_BRACKETING_MODE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 43, unsigned int) + +#define ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE \ + _IOR('v', BASE_VIDIOC_PRIVATE + 43, unsigned int) + +#define ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT \ + _IOW('v', BASE_VIDIOC_PRIVATE + 43, struct atomisp_sensor_ae_bracketing_lut) + +#define ATOMISP_IOC_G_INVALID_FRAME_NUM \ + _IOR('v', BASE_VIDIOC_PRIVATE + 44, unsigned int) + +#define ATOMISP_IOC_S_ARRAY_RESOLUTION \ + _IOW('v', BASE_VIDIOC_PRIVATE + 45, struct atomisp_resolution) + +/* for depth mode sensor frame sync compensation */ +#define ATOMISP_IOC_G_DEPTH_SYNC_COMP \ + _IOR('v', BASE_VIDIOC_PRIVATE + 46, unsigned int) + +#define ATOMISP_IOC_S_SENSOR_EE_CONFIG \ + _IOW('v', BASE_VIDIOC_PRIVATE + 47, unsigned int) + +#define ATOMISP_IOC_S_SENSOR_RUNMODE \ + _IOW('v', BASE_VIDIOC_PRIVATE + 48, struct atomisp_s_runmode) + +#define ATOMISP_IOC_G_UPDATE_EXPOSURE \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 49, struct atomisp_update_exposure) + +/* + * Reserved ioctls. We have customer implementing it internally. + * We can't use both numbers to not cause ABI conflict. + * Anyway, those ioctls are hacks and not implemented by us: + * + * #define ATOMISP_IOC_G_SENSOR_REG \ + * _IOW('v', BASE_VIDIOC_PRIVATE + 55, struct atomisp_sensor_regs) + * #define ATOMISP_IOC_S_SENSOR_REG \ + * _IOW('v', BASE_VIDIOC_PRIVATE + 56, struct atomisp_sensor_regs) + */ + +/* ISP Private control IDs */ +#define V4L2_CID_ATOMISP_BAD_PIXEL_DETECTION \ + (V4L2_CID_PRIVATE_BASE + 0) +#define V4L2_CID_ATOMISP_POSTPROCESS_GDC_CAC \ + (V4L2_CID_PRIVATE_BASE + 1) +#define V4L2_CID_ATOMISP_VIDEO_STABLIZATION \ + (V4L2_CID_PRIVATE_BASE + 2) +#define V4L2_CID_ATOMISP_FIXED_PATTERN_NR \ + (V4L2_CID_PRIVATE_BASE + 3) +#define V4L2_CID_ATOMISP_FALSE_COLOR_CORRECTION \ + (V4L2_CID_PRIVATE_BASE + 4) +#define V4L2_CID_ATOMISP_LOW_LIGHT \ + (V4L2_CID_PRIVATE_BASE + 5) + +/* Camera class: + * Exposure, Flash and privacy (indicator) light controls, to be upstreamed */ +#define V4L2_CID_CAMERA_LASTP1 (V4L2_CID_CAMERA_CLASS_BASE + 1024) + +#define V4L2_CID_FOCAL_ABSOLUTE (V4L2_CID_CAMERA_LASTP1 + 0) +#define V4L2_CID_FNUMBER_ABSOLUTE (V4L2_CID_CAMERA_LASTP1 + 1) +#define V4L2_CID_FNUMBER_RANGE (V4L2_CID_CAMERA_LASTP1 + 2) + +/* Flash related CIDs, see also: + * http://linuxtv.org/downloads/v4l-dvb-apis/extended-controls.html\ + * #flash-controls */ + +/* Request a number of flash-exposed frames. The frame status can be + * found in the reserved field in the v4l2_buffer struct. */ +#define V4L2_CID_REQUEST_FLASH (V4L2_CID_CAMERA_LASTP1 + 3) +/* Query flash driver status. See enum atomisp_flash_status above. */ +#define V4L2_CID_FLASH_STATUS (V4L2_CID_CAMERA_LASTP1 + 5) +/* Set the flash mode (see enum atomisp_flash_mode) */ +#define V4L2_CID_FLASH_MODE (V4L2_CID_CAMERA_LASTP1 + 10) + +/* VCM slew control */ +#define V4L2_CID_VCM_SLEW (V4L2_CID_CAMERA_LASTP1 + 11) +/* VCM step time */ +#define V4L2_CID_VCM_TIMEING (V4L2_CID_CAMERA_LASTP1 + 12) + +/* Query Focus Status */ +#define V4L2_CID_FOCUS_STATUS (V4L2_CID_CAMERA_LASTP1 + 14) + +/* Query sensor's binning factor */ +#define V4L2_CID_BIN_FACTOR_HORZ (V4L2_CID_CAMERA_LASTP1 + 15) +#define V4L2_CID_BIN_FACTOR_VERT (V4L2_CID_CAMERA_LASTP1 + 16) + +/* number of frames to skip at stream start */ +#define V4L2_CID_G_SKIP_FRAMES (V4L2_CID_CAMERA_LASTP1 + 17) + +/* Query sensor's 2A status */ +#define V4L2_CID_2A_STATUS (V4L2_CID_CAMERA_LASTP1 + 18) +#define V4L2_2A_STATUS_AE_READY (1 << 0) +#define V4L2_2A_STATUS_AWB_READY (1 << 1) + +#define V4L2_CID_FMT_AUTO (V4L2_CID_CAMERA_LASTP1 + 19) + +#define V4L2_CID_RUN_MODE (V4L2_CID_CAMERA_LASTP1 + 20) +#define ATOMISP_RUN_MODE_VIDEO 1 +#define ATOMISP_RUN_MODE_STILL_CAPTURE 2 +#define ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE 3 +#define ATOMISP_RUN_MODE_PREVIEW 4 +#define ATOMISP_RUN_MODE_SDV 5 + +#define V4L2_CID_ENABLE_VFPP (V4L2_CID_CAMERA_LASTP1 + 21) +#define V4L2_CID_ATOMISP_CONTINUOUS_MODE (V4L2_CID_CAMERA_LASTP1 + 22) +#define V4L2_CID_ATOMISP_CONTINUOUS_RAW_BUFFER_SIZE \ + (V4L2_CID_CAMERA_LASTP1 + 23) +#define V4L2_CID_ATOMISP_CONTINUOUS_VIEWFINDER \ + (V4L2_CID_CAMERA_LASTP1 + 24) + +#define V4L2_CID_VFPP (V4L2_CID_CAMERA_LASTP1 + 25) +#define ATOMISP_VFPP_ENABLE 0 +#define ATOMISP_VFPP_DISABLE_SCALER 1 +#define ATOMISP_VFPP_DISABLE_LOWLAT 2 + +/* Query real flash status register value */ +#define V4L2_CID_FLASH_STATUS_REGISTER (V4L2_CID_CAMERA_LASTP1 + 26) + +#define V4L2_CID_START_ZSL_CAPTURE (V4L2_CID_CAMERA_LASTP1 + 28) +/* Lock and unlock raw buffer */ +#define V4L2_CID_ENABLE_RAW_BUFFER_LOCK (V4L2_CID_CAMERA_LASTP1 + 29) + +#define V4L2_CID_DEPTH_MODE (V4L2_CID_CAMERA_LASTP1 + 30) + +#define V4L2_CID_EXPOSURE_ZONE_NUM (V4L2_CID_CAMERA_LASTP1 + 31) +/* Disable digital zoom */ +#define V4L2_CID_DISABLE_DZ (V4L2_CID_CAMERA_LASTP1 + 32) + +#define V4L2_CID_TEST_PATTERN_COLOR_R (V4L2_CID_CAMERA_LASTP1 + 33) +#define V4L2_CID_TEST_PATTERN_COLOR_GR (V4L2_CID_CAMERA_LASTP1 + 34) +#define V4L2_CID_TEST_PATTERN_COLOR_GB (V4L2_CID_CAMERA_LASTP1 + 35) +#define V4L2_CID_TEST_PATTERN_COLOR_B (V4L2_CID_CAMERA_LASTP1 + 36) + +#define V4L2_CID_ATOMISP_SELECT_ISP_VERSION (V4L2_CID_CAMERA_LASTP1 + 38) + +#define V4L2_BUF_FLAG_BUFFER_INVALID 0x0400 +#define V4L2_BUF_FLAG_BUFFER_VALID 0x0800 + +#define V4L2_BUF_TYPE_VIDEO_CAPTURE_ION (V4L2_BUF_TYPE_PRIVATE + 1024) + +#define V4L2_EVENT_ATOMISP_3A_STATS_READY (V4L2_EVENT_PRIVATE_START + 1) +#define V4L2_EVENT_ATOMISP_METADATA_READY (V4L2_EVENT_PRIVATE_START + 2) +#define V4L2_EVENT_ATOMISP_RAW_BUFFERS_ALLOC_DONE (V4L2_EVENT_PRIVATE_START + 3) +#define V4L2_EVENT_ATOMISP_ACC_COMPLETE (V4L2_EVENT_PRIVATE_START + 4) +#define V4L2_EVENT_ATOMISP_PAUSE_BUFFER (V4L2_EVENT_PRIVATE_START + 5) +#define V4L2_EVENT_ATOMISP_CSS_RESET (V4L2_EVENT_PRIVATE_START + 6) +/* Nonstandard color effects for V4L2_CID_COLORFX */ +enum { + V4L2_COLORFX_SKIN_WHITEN_LOW = 1001, + V4L2_COLORFX_SKIN_WHITEN_HIGH = 1002, + V4L2_COLORFX_WARM = 1003, + V4L2_COLORFX_COLD = 1004, + V4L2_COLORFX_WASHED = 1005, + V4L2_COLORFX_RED = 1006, + V4L2_COLORFX_GREEN = 1007, + V4L2_COLORFX_BLUE = 1008, + V4L2_COLORFX_PINK = 1009, + V4L2_COLORFX_YELLOW = 1010, + V4L2_COLORFX_PURPLE = 1011, +}; + +#endif /* _ATOM_ISP_H */ +#endif /* CSS15*/ diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h new file mode 100644 index 0000000000000..c52c56a17e17e --- /dev/null +++ b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h @@ -0,0 +1,36 @@ +/* + * Support for Intel MID SoC Camera Imaging ISP subsystem. + * + * Copyright (c) 2014 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef ATOMISP_GMIN_PLATFORM_H_ +#define ATOMISP_GMIN_PLATFORM_H_ + +#include "atomisp_platform.h" + +int atomisp_register_i2c_module(struct v4l2_subdev *subdev, + struct camera_sensor_platform_data *plat_data, + enum intel_v4l2_subdev_type type); +struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter, + struct i2c_board_info *board_info); +int atomisp_gmin_remove_subdev(struct v4l2_subdev *sd); +int gmin_get_var_int(struct device *dev, const char *var, int def); +int camera_sensor_csi(struct v4l2_subdev *sd, u32 port, + u32 lanes, u32 format, u32 bayer_order, int flag); +struct camera_sensor_platform_data *gmin_camera_platform_data( + struct v4l2_subdev *subdev, + enum atomisp_input_format csi_format, + enum atomisp_bayer_order csi_bayer); + +int atomisp_gmin_register_vcm_control(struct camera_vcm_control *); + +#endif diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h new file mode 100644 index 0000000000000..aa5e294e7b7dc --- /dev/null +++ b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h @@ -0,0 +1,249 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef ATOMISP_PLATFORM_H_ +#define ATOMISP_PLATFORM_H_ + +#include +#include +#include +#include "atomisp.h" + +#define MAX_SENSORS_PER_PORT 4 +#define MAX_STREAMS_PER_CHANNEL 2 + +#define CAMERA_MODULE_ID_LEN 64 + +enum atomisp_bayer_order { + atomisp_bayer_order_grbg, + atomisp_bayer_order_rggb, + atomisp_bayer_order_bggr, + atomisp_bayer_order_gbrg +}; + +enum atomisp_input_stream_id { + ATOMISP_INPUT_STREAM_GENERAL = 0, + ATOMISP_INPUT_STREAM_CAPTURE = 0, + ATOMISP_INPUT_STREAM_POSTVIEW, + ATOMISP_INPUT_STREAM_PREVIEW, + ATOMISP_INPUT_STREAM_VIDEO, + ATOMISP_INPUT_STREAM_NUM +}; + +enum atomisp_input_format { + ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY,/* 8 bits per subpixel (legacy) */ + ATOMISP_INPUT_FORMAT_YUV420_8, /* 8 bits per subpixel */ + ATOMISP_INPUT_FORMAT_YUV420_10,/* 10 bits per subpixel */ + ATOMISP_INPUT_FORMAT_YUV420_16,/* 16 bits per subpixel */ + ATOMISP_INPUT_FORMAT_YUV422_8, /* UYVY..UVYV, 8 bits per subpixel */ + ATOMISP_INPUT_FORMAT_YUV422_10,/* UYVY..UVYV, 10 bits per subpixel */ + ATOMISP_INPUT_FORMAT_YUV422_16,/* UYVY..UVYV, 16 bits per subpixel */ + ATOMISP_INPUT_FORMAT_RGB_444, /* BGR..BGR, 4 bits per subpixel */ + ATOMISP_INPUT_FORMAT_RGB_555, /* BGR..BGR, 5 bits per subpixel */ + ATOMISP_INPUT_FORMAT_RGB_565, /* BGR..BGR, 5 bits B and R, 6 bits G */ + ATOMISP_INPUT_FORMAT_RGB_666, /* BGR..BGR, 6 bits per subpixel */ + ATOMISP_INPUT_FORMAT_RGB_888, /* BGR..BGR, 8 bits per subpixel */ + ATOMISP_INPUT_FORMAT_RAW_6, /* RAW data, 6 bits per pixel */ + ATOMISP_INPUT_FORMAT_RAW_7, /* RAW data, 7 bits per pixel */ + ATOMISP_INPUT_FORMAT_RAW_8, /* RAW data, 8 bits per pixel */ + ATOMISP_INPUT_FORMAT_RAW_10, /* RAW data, 10 bits per pixel */ + ATOMISP_INPUT_FORMAT_RAW_12, /* RAW data, 12 bits per pixel */ + ATOMISP_INPUT_FORMAT_RAW_14, /* RAW data, 14 bits per pixel */ + ATOMISP_INPUT_FORMAT_RAW_16, /* RAW data, 16 bits per pixel */ + ATOMISP_INPUT_FORMAT_BINARY_8, /* Binary byte stream. */ + + /* CSI2-MIPI specific format: Generic short packet data. It is used to + * keep the timing information for the opening/closing of shutters, + * triggering of flashes and etc. + */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT1, /* Generic Short Packet Code 1 */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT2, /* Generic Short Packet Code 2 */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT3, /* Generic Short Packet Code 3 */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT4, /* Generic Short Packet Code 4 */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT5, /* Generic Short Packet Code 5 */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT6, /* Generic Short Packet Code 6 */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT7, /* Generic Short Packet Code 7 */ + ATOMISP_INPUT_FORMAT_GENERIC_SHORT8, /* Generic Short Packet Code 8 */ + + /* CSI2-MIPI specific format: YUV data. + */ + ATOMISP_INPUT_FORMAT_YUV420_8_SHIFT, /* YUV420 8-bit (Chroma Shifted + Pixel Sampling) */ + ATOMISP_INPUT_FORMAT_YUV420_10_SHIFT, /* YUV420 8-bit (Chroma Shifted + Pixel Sampling) */ + + /* CSI2-MIPI specific format: Generic long packet data + */ + ATOMISP_INPUT_FORMAT_EMBEDDED, /* Embedded 8-bit non Image Data */ + + /* CSI2-MIPI specific format: User defined byte-based data. For example, + * the data transmitter (e.g. the SoC sensor) can keep the JPEG data as + * the User Defined Data Type 4 and the MPEG data as the + * User Defined Data Type 7. + */ + ATOMISP_INPUT_FORMAT_USER_DEF1, /* User defined 8-bit data type 1 */ + ATOMISP_INPUT_FORMAT_USER_DEF2, /* User defined 8-bit data type 2 */ + ATOMISP_INPUT_FORMAT_USER_DEF3, /* User defined 8-bit data type 3 */ + ATOMISP_INPUT_FORMAT_USER_DEF4, /* User defined 8-bit data type 4 */ + ATOMISP_INPUT_FORMAT_USER_DEF5, /* User defined 8-bit data type 5 */ + ATOMISP_INPUT_FORMAT_USER_DEF6, /* User defined 8-bit data type 6 */ + ATOMISP_INPUT_FORMAT_USER_DEF7, /* User defined 8-bit data type 7 */ + ATOMISP_INPUT_FORMAT_USER_DEF8, /* User defined 8-bit data type 8 */ +}; + +#define N_ATOMISP_INPUT_FORMAT (ATOMISP_INPUT_FORMAT_USER_DEF8 + 1) + + + +enum intel_v4l2_subdev_type { + RAW_CAMERA = 1, + SOC_CAMERA = 2, + CAMERA_MOTOR = 3, + LED_FLASH = 4, + XENON_FLASH = 5, + FILE_INPUT = 6, + TEST_PATTERN = 7, +}; + +struct intel_v4l2_subdev_id { + char name[17]; + enum intel_v4l2_subdev_type type; + enum atomisp_camera_port port; +}; + +struct intel_v4l2_subdev_i2c_board_info { + struct i2c_board_info board_info; + int i2c_adapter_id; +}; + +struct intel_v4l2_subdev_table { + struct intel_v4l2_subdev_i2c_board_info v4l2_subdev; + enum intel_v4l2_subdev_type type; + enum atomisp_camera_port port; + struct v4l2_subdev *subdev; +}; + +struct atomisp_platform_data { + struct intel_v4l2_subdev_table *subdevs; +}; + +/* Describe the capacities of one single sensor. */ +struct atomisp_sensor_caps { + /* The number of streams this sensor can output. */ + int stream_num; + bool is_slave; +}; + +/* Describe the capacities of sensors connected to one camera port. */ +struct atomisp_camera_caps { + /* The number of sensors connected to this camera port. */ + int sensor_num; + /* The capacities of each sensor. */ + struct atomisp_sensor_caps sensor[MAX_SENSORS_PER_PORT]; + /* Define whether stream control is required for multiple streams. */ + bool multi_stream_ctrl; +}; + +/* + * Sensor of external ISP can send multiple steams with different mipi data + * type in the same virtual channel. This information needs to come from the + * sensor or external ISP + */ +struct atomisp_isys_config_info { + u8 input_format; + u16 width; + u16 height; +}; + +struct atomisp_input_stream_info { + enum atomisp_input_stream_id stream; + u8 enable; + /* Sensor driver fills ch_id with the id + of the virtual channel. */ + u8 ch_id; + /* Tells how many streams in this virtual channel. If 0 ignore rest + * and the input format will be from mipi_info */ + u8 isys_configs; + /* + * if more isys_configs is more than 0, sensor needs to configure the + * input format differently. width and height can be 0. If width and + * height is not zero, then the corresponsing data needs to be set + */ + struct atomisp_isys_config_info isys_info[MAX_STREAMS_PER_CHANNEL]; +}; + +struct camera_vcm_control; +struct camera_vcm_ops { + int (*power_up)(struct v4l2_subdev *sd, struct camera_vcm_control *vcm); + int (*power_down)(struct v4l2_subdev *sd, + struct camera_vcm_control *vcm); + int (*queryctrl)(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc, + struct camera_vcm_control *vcm); + int (*g_ctrl)(struct v4l2_subdev *sd, struct v4l2_control *ctrl, + struct camera_vcm_control *vcm); + int (*s_ctrl)(struct v4l2_subdev *sd, struct v4l2_control *ctrl, + struct camera_vcm_control *vcm); +}; + +struct camera_vcm_control { + char camera_module[CAMERA_MODULE_ID_LEN]; + struct camera_vcm_ops *ops; + struct list_head list; +}; + +struct camera_sensor_platform_data { + int (*flisclk_ctrl)(struct v4l2_subdev *subdev, int flag); + int (*csi_cfg)(struct v4l2_subdev *subdev, int flag); + + /* + * New G-Min power and GPIO interface to control individual + * lines as implemented on all known camera modules. + */ + int (*gpio0_ctrl)(struct v4l2_subdev *subdev, int on); + int (*gpio1_ctrl)(struct v4l2_subdev *subdev, int on); + int (*v1p8_ctrl)(struct v4l2_subdev *subdev, int on); + int (*v2p8_ctrl)(struct v4l2_subdev *subdev, int on); + int (*v1p2_ctrl)(struct v4l2_subdev *subdev, int on); + struct camera_vcm_control * (*get_vcm_ctrl)(struct v4l2_subdev *subdev, + char *module_id); +}; + +struct camera_mipi_info { + enum atomisp_camera_port port; + unsigned int num_lanes; + enum atomisp_input_format input_format; + enum atomisp_bayer_order raw_bayer_order; + struct atomisp_sensor_mode_data data; + enum atomisp_input_format metadata_format; + uint32_t metadata_width; + uint32_t metadata_height; + const uint32_t *metadata_effective_width; +}; + +extern const struct atomisp_platform_data *atomisp_get_platform_data(void); +extern const struct atomisp_camera_caps *atomisp_get_default_camera_caps(void); + +/* API from old platform_camera.h, new CPUID implementation */ +#define __IS_SOC(x) (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && \ + boot_cpu_data.x86 == 6 && \ + boot_cpu_data.x86_model == x) + +#define IS_MFLD __IS_SOC(0x27) +#define IS_BYT __IS_SOC(0x37) +#define IS_CHT __IS_SOC(0x4C) +#define IS_MOFD __IS_SOC(0x5A) + +#endif /* ATOMISP_PLATFORM_H_ */ diff --git a/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h b/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h new file mode 100644 index 0000000000000..8988b37943b3a --- /dev/null +++ b/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __LIBMSRLISTHELPER_H__ +#define __LIBMSRLISTHELPER_H__ + +struct i2c_client; +struct firmware; + +extern int load_msr_list(struct i2c_client *client, char *path, + const struct firmware **fw); +extern int apply_msr_data(struct i2c_client *client, const struct firmware *fw); +extern void release_msr_list(struct i2c_client *client, + const struct firmware *fw); + + +#endif /* ifndef __LIBMSRLISTHELPER_H__ */ diff --git a/drivers/staging/media/atomisp/include/media/lm3554.h b/drivers/staging/media/atomisp/include/media/lm3554.h new file mode 100644 index 0000000000000..9276ce44d9070 --- /dev/null +++ b/drivers/staging/media/atomisp/include/media/lm3554.h @@ -0,0 +1,131 @@ +/* + * include/media/lm3554.h + * + * Copyright (c) 2010-2012 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef _LM3554_H_ +#define _LM3554_H_ + +#include +#include + +#define LM3554_ID 3554 + +#define v4l2_queryctrl_entry_integer(_id, _name,\ + _minimum, _maximum, _step, \ + _default_value, _flags) \ + {\ + .id = (_id), \ + .type = V4L2_CTRL_TYPE_INTEGER, \ + .name = _name, \ + .minimum = (_minimum), \ + .maximum = (_maximum), \ + .step = (_step), \ + .default_value = (_default_value),\ + .flags = (_flags),\ + } +#define v4l2_queryctrl_entry_boolean(_id, _name,\ + _default_value, _flags) \ + {\ + .id = (_id), \ + .type = V4L2_CTRL_TYPE_BOOLEAN, \ + .name = _name, \ + .minimum = 0, \ + .maximum = 1, \ + .step = 1, \ + .default_value = (_default_value),\ + .flags = (_flags),\ + } + +#define s_ctrl_id_entry_integer(_id, _name, \ + _minimum, _maximum, _step, \ + _default_value, _flags, \ + _s_ctrl, _g_ctrl) \ + {\ + .qc = v4l2_queryctrl_entry_integer(_id, _name,\ + _minimum, _maximum, _step,\ + _default_value, _flags), \ + .s_ctrl = _s_ctrl, \ + .g_ctrl = _g_ctrl, \ + } + +#define s_ctrl_id_entry_boolean(_id, _name, \ + _default_value, _flags, \ + _s_ctrl, _g_ctrl) \ + {\ + .qc = v4l2_queryctrl_entry_boolean(_id, _name,\ + _default_value, _flags), \ + .s_ctrl = _s_ctrl, \ + .g_ctrl = _g_ctrl, \ + } + +/* Value settings for Flash Time-out Duration*/ +#define LM3554_DEFAULT_TIMEOUT 512U +#define LM3554_MIN_TIMEOUT 32U +#define LM3554_MAX_TIMEOUT 1024U +#define LM3554_TIMEOUT_STEPSIZE 32U + +/* Flash modes */ +#define LM3554_MODE_SHUTDOWN 0 +#define LM3554_MODE_INDICATOR 1 +#define LM3554_MODE_TORCH 2 +#define LM3554_MODE_FLASH 3 + +/* timer delay time */ +#define LM3554_TIMER_DELAY 5 + +/* Percentage <-> value macros */ +#define LM3554_MIN_PERCENT 0U +#define LM3554_MAX_PERCENT 100U +#define LM3554_CLAMP_PERCENTAGE(val) \ + clamp(val, LM3554_MIN_PERCENT, LM3554_MAX_PERCENT) + +#define LM3554_VALUE_TO_PERCENT(v, step) (((((unsigned long)(v))*(step))+50)/100) +#define LM3554_PERCENT_TO_VALUE(p, step) (((((unsigned long)(p))*100)+(step>>1))/(step)) + +/* Product specific limits + * TODO: get these from platform data */ +#define LM3554_FLASH_MAX_LVL 0x0F /* 1191mA */ + +/* Flash brightness, input is percentage, output is [0..15] */ +#define LM3554_FLASH_STEP \ + ((100ul*(LM3554_MAX_PERCENT)+((LM3554_FLASH_MAX_LVL)>>1))/((LM3554_FLASH_MAX_LVL))) +#define LM3554_FLASH_DEFAULT_BRIGHTNESS \ + LM3554_VALUE_TO_PERCENT(13, LM3554_FLASH_STEP) + +/* Torch brightness, input is percentage, output is [0..7] */ +#define LM3554_TORCH_STEP 1250 +#define LM3554_TORCH_DEFAULT_BRIGHTNESS \ + LM3554_VALUE_TO_PERCENT(2, LM3554_TORCH_STEP) + +/* Indicator brightness, input is percentage, output is [0..3] */ +#define LM3554_INDICATOR_STEP 2500 +#define LM3554_INDICATOR_DEFAULT_BRIGHTNESS \ + LM3554_VALUE_TO_PERCENT(1, LM3554_INDICATOR_STEP) + +/* + * lm3554_platform_data - Flash controller platform data + */ +struct lm3554_platform_data { + int gpio_torch; + int gpio_strobe; + int gpio_reset; + + unsigned int current_limit; + unsigned int envm_tx2; + unsigned int tx2_polarity; +}; + +#endif /* _LM3554_H_ */ + diff --git a/drivers/staging/media/atomisp/pci/Kconfig b/drivers/staging/media/atomisp/pci/Kconfig new file mode 100644 index 0000000000000..41f116d520609 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/Kconfig @@ -0,0 +1,14 @@ +# +# Kconfig for ISP driver +# + +config VIDEO_ATOMISP + tristate "Intel Atom Image Signal Processor Driver" + depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + select IOSF_MBI + select VIDEOBUF_VMALLOC + ---help--- + Say Y here if your platform supports Intel Atom SoC + camera imaging subsystem. + To compile this driver as a module, choose M here: the + module will be called atomisp diff --git a/drivers/staging/media/atomisp/pci/Makefile b/drivers/staging/media/atomisp/pci/Makefile new file mode 100644 index 0000000000000..61ad1fbb1ee60 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for ISP driver +# + +obj-$(CONFIG_VIDEO_ATOMISP) += atomisp2/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/Makefile b/drivers/staging/media/atomisp/pci/atomisp2/Makefile new file mode 100644 index 0000000000000..7fead5fc9a7df --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/Makefile @@ -0,0 +1,349 @@ +# SPDX-License-Identifier: GPL-2.0 +atomisp-objs += \ + atomisp_drvfs.o \ + atomisp_file.o \ + css2400/sh_css_mipi.o \ + css2400/runtime/pipeline/src/pipeline.o \ + css2400/runtime/spctrl/src/spctrl.o \ + css2400/runtime/rmgr/src/rmgr.o \ + css2400/runtime/rmgr/src/rmgr_vbuf.o \ + css2400/runtime/isp_param/src/isp_param.o \ + css2400/runtime/inputfifo/src/inputfifo.o \ + css2400/runtime/queue/src/queue_access.o \ + css2400/runtime/queue/src/queue.o \ + css2400/runtime/frame/src/frame.o \ + css2400/runtime/eventq/src/eventq.o \ + css2400/runtime/binary/src/binary.o \ + css2400/runtime/timer/src/timer.o \ + css2400/runtime/isys/src/csi_rx_rmgr.o \ + css2400/runtime/isys/src/isys_stream2mmio_rmgr.o \ + css2400/runtime/isys/src/virtual_isys.o \ + css2400/runtime/isys/src/rx.o \ + css2400/runtime/isys/src/isys_dma_rmgr.o \ + css2400/runtime/isys/src/ibuf_ctrl_rmgr.o \ + css2400/runtime/isys/src/isys_init.o \ + css2400/runtime/bufq/src/bufq.o \ + css2400/runtime/ifmtr/src/ifmtr.o \ + css2400/runtime/debug/src/ia_css_debug.o \ + css2400/runtime/event/src/event.o \ + css2400/sh_css_sp.o \ + css2400/css_2400_system/spmem_dump.o \ + css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.o \ + css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.o \ + css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.o \ + css2400/sh_css_stream_format.o \ + css2400/sh_css_hrt.o \ + css2400/sh_css_properties.o \ + css2400/memory_realloc.o \ + css2400/hive_isp_css_shared/host/tag.o \ + css2400/sh_css_params.o \ + css2400/sh_css.o \ + css2400/isp/kernels/hdr/ia_css_hdr.host.o \ + css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.o \ + css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.o \ + css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.o \ + css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.o \ + css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.o \ + css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.o \ + css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.o \ + css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.o \ + css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.o \ + css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.o \ + css2400/isp/kernels/output/output_1.0/ia_css_output.host.o \ + css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.o \ + css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.o \ + css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.o \ + css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.o \ + css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.o \ + css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.o \ + css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.o \ + css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.o \ + css2400/isp/kernels/dpc2/ia_css_dpc2.host.o \ + css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.o \ + css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.o \ + css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.o \ + css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.o \ + css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.o \ + css2400/isp/kernels/bh/bh_2/ia_css_bh.host.o \ + css2400/isp/kernels/bnlm/ia_css_bnlm.host.o \ + css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.o \ + css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.o \ + css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.o \ + css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.o \ + css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.o \ + css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.o \ + css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.o \ + css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.o \ + css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.o \ + css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.o \ + css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.o \ + css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.o \ + css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.o \ + css2400/isp/kernels/de/de_1.0/ia_css_de.host.o \ + css2400/isp/kernels/de/de_2/ia_css_de2.host.o \ + css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.o \ + css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.o \ + css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.o \ + css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.o \ + css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.o \ + css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ + css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.o \ + css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.o \ + css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.o \ + css2400/isp/kernels/ob/ob2/ia_css_ob2.host.o \ + css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.o \ + css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.o \ + css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.o \ + css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.o \ + css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ + css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.o \ + css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.o \ + css2400/sh_css_pipe.o \ + css2400/ia_css_device_access.o \ + css2400/sh_css_host_data.o \ + css2400/sh_css_mmu.o \ + css2400/sh_css_metadata.o \ + css2400/base/refcount/src/refcount.o \ + css2400/base/circbuf/src/circbuf.o \ + css2400/camera/pipe/src/pipe_binarydesc.o \ + css2400/camera/pipe/src/pipe_util.o \ + css2400/camera/pipe/src/pipe_stagedesc.o \ + css2400/camera/util/src/util.o \ + css2400/sh_css_metrics.o \ + css2400/sh_css_version.o \ + css2400/ia_css_memory_access.o \ + css2400/sh_css_param_shading.o \ + css2400/sh_css_morph.o \ + css2400/sh_css_firmware.o \ + css2400/hive_isp_css_common/host/isp.o \ + css2400/hive_isp_css_common/host/gdc.o \ + css2400/hive_isp_css_common/host/sp.o \ + css2400/hive_isp_css_common/host/vmem.o \ + css2400/hive_isp_css_common/host/dma.o \ + css2400/hive_isp_css_common/host/input_formatter.o \ + css2400/hive_isp_css_common/host/debug.o \ + css2400/hive_isp_css_common/host/hmem.o \ + css2400/hive_isp_css_common/host/gp_device.o \ + css2400/hive_isp_css_common/host/fifo_monitor.o \ + css2400/hive_isp_css_common/host/gp_timer.o \ + css2400/hive_isp_css_common/host/irq.o \ + css2400/hive_isp_css_common/host/input_system.o \ + css2400/hive_isp_css_common/host/timed_ctrl.o \ + css2400/hive_isp_css_common/host/mmu.o \ + css2400/hive_isp_css_common/host/event_fifo.o \ + css2400/sh_css_param_dvs.o \ + css2400/sh_css_shading.o \ + css2400/sh_css_stream.o \ + mmu/sh_mmu_mrfld.o \ + mmu/isp_mmu.o \ + atomisp_acc.o \ + atomisp_compat_css20.o \ + atomisp_fops.o \ + atomisp_subdev.o \ + atomisp_ioctl.o \ + atomisp_compat_ioctl32.o \ + atomisp_csi2.o \ + atomisp_cmd.o \ + atomisp_tpg.o \ + hmm/hmm_vm.o \ + hmm/hmm.o \ + hmm/hmm_bo.o \ + hmm/hmm_reserved_pool.o \ + hmm/hmm_dynamic_pool.o \ + hrt/hive_isp_css_mm_hrt.o \ + atomisp_v4l2.o + +# These will be needed when clean merge CHT support nicely into the driver +# Keep them here handy for when we get to that point +# + +obj-cht= \ + css2400/css_2401_system/spmem_dump.o \ + css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.o \ + css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.o \ + css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.o \ + css2400/css_2401_csi2p_system/spmem_dump.o \ + css2400/css_2401_csi2p_system/host/isys_stream2mmio.o \ + css2400/css_2401_csi2p_system/host/ibuf_ctrl.o \ + css2400/css_2401_csi2p_system/host/isys_irq.o \ + css2400/css_2401_csi2p_system/host/isys_dma.o \ + css2400/css_2401_csi2p_system/host/csi_rx.o \ + css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.o \ + css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.o \ + css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.o \ + +# -I$(atomisp)/css2400/css_2401_csi2p_system/ \ +# -I$(atomisp)/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ \ +# -I$(atomisp)/css2400/css_2401_csi2p_system/host/ \ +# -I$(atomisp)/css2400/css_2401_csi2p_system/hrt/ \ +# -I$(atomisp)/css2400/css_2401_system/hive_isp_css_2401_system_generated/ \ +# -I$(atomisp)/css2400/css_2401_system/hrt/ \ + + + +obj-$(CONFIG_VIDEO_ATOMISP) += atomisp.o + +atomisp = $(srctree)/drivers/staging/media/atomisp/pci/atomisp2 + +INCLUDES += \ + -I$(atomisp)/ \ + -I$(atomisp)/css2400/ \ + -I$(atomisp)/hrt/ \ + -I$(atomisp)/include/ \ + -I$(atomisp)/include/hmm/ \ + -I$(atomisp)/include/mmu/ \ + -I$(atomisp)/css2400/base/circbuf/interface/ \ + -I$(atomisp)/css2400/base/refcount/interface/ \ + -I$(atomisp)/css2400/camera/pipe/interface/ \ + -I$(atomisp)/css2400/camera/util/interface/ \ + -I$(atomisp)/css2400/css_2400_system/ \ + -I$(atomisp)/css2400/css_2400_system/hive_isp_css_2400_system_generated/ \ + -I$(atomisp)/css2400/css_2400_system/hrt/ \ + -I$(atomisp)/css2400/hive_isp_css_common/ \ + -I$(atomisp)/css2400/hive_isp_css_common/host/ \ + -I$(atomisp)/css2400/hive_isp_css_include/ \ + -I$(atomisp)/css2400/hive_isp_css_include/device_access/ \ + -I$(atomisp)/css2400/hive_isp_css_include/host/ \ + -I$(atomisp)/css2400/hive_isp_css_include/memory_access/ \ + -I$(atomisp)/css2400/hive_isp_css_shared/ \ + -I$(atomisp)/css2400/hive_isp_css_shared/host/ \ + -I$(atomisp)/css2400/isp/kernels/ \ + -I$(atomisp)/css2400/isp/kernels/aa/aa_2/ \ + -I$(atomisp)/css2400/isp/kernels/anr/anr_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/anr/anr_2/ \ + -I$(atomisp)/css2400/isp/kernels/bh/bh_2/ \ + -I$(atomisp)/css2400/isp/kernels/bnlm/ \ + -I$(atomisp)/css2400/isp/kernels/bnr/ \ + -I$(atomisp)/css2400/isp/kernels/bnr/bnr_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/bnr/bnr2_2/ \ + -I$(atomisp)/css2400/isp/kernels/cnr/ \ + -I$(atomisp)/css2400/isp/kernels/cnr/cnr_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/cnr/cnr_2/ \ + -I$(atomisp)/css2400/isp/kernels/conversion/ \ + -I$(atomisp)/css2400/isp/kernels/conversion/conversion_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/copy_output/ \ + -I$(atomisp)/css2400/isp/kernels/copy_output/copy_output_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/crop/ \ + -I$(atomisp)/css2400/isp/kernels/crop/crop_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/csc/ \ + -I$(atomisp)/css2400/isp/kernels/csc/csc_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/ctc/ \ + -I$(atomisp)/css2400/isp/kernels/ctc/ctc_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/ctc/ctc1_5/ \ + -I$(atomisp)/css2400/isp/kernels/ctc/ctc2/ \ + -I$(atomisp)/css2400/isp/kernels/de/ \ + -I$(atomisp)/css2400/isp/kernels/de/de_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/de/de_2/ \ + -I$(atomisp)/css2400/isp/kernels/dpc2/ \ + -I$(atomisp)/css2400/isp/kernels/dp/ \ + -I$(atomisp)/css2400/isp/kernels/dp/dp_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/dvs/ \ + -I$(atomisp)/css2400/isp/kernels/dvs/dvs_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/eed1_8/ \ + -I$(atomisp)/css2400/isp/kernels/fc/ \ + -I$(atomisp)/css2400/isp/kernels/fc/fc_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/fixedbds/ \ + -I$(atomisp)/css2400/isp/kernels/fixedbds/fixedbds_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/fpn/ \ + -I$(atomisp)/css2400/isp/kernels/fpn/fpn_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/gc/ \ + -I$(atomisp)/css2400/isp/kernels/gc/gc_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/gc/gc_2/ \ + -I$(atomisp)/css2400/isp/kernels/hdr/ \ + -I$(atomisp)/css2400/isp/kernels/io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/io_ls/bayer_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/io_ls/common/ \ + -I$(atomisp)/css2400/isp/kernels/io_ls/yuv444_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/common/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/iterator/ \ + -I$(atomisp)/css2400/isp/kernels/iterator/iterator_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/macc/ \ + -I$(atomisp)/css2400/isp/kernels/macc/macc_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/macc/macc1_5/ \ + -I$(atomisp)/css2400/isp/kernels/norm/ \ + -I$(atomisp)/css2400/isp/kernels/norm/norm_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/ob/ \ + -I$(atomisp)/css2400/isp/kernels/ob/ob_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/ob/ob2/ \ + -I$(atomisp)/css2400/isp/kernels/output/ \ + -I$(atomisp)/css2400/isp/kernels/output/output_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/qplane/ \ + -I$(atomisp)/css2400/isp/kernels/qplane/qplane_2/ \ + -I$(atomisp)/css2400/isp/kernels/raw_aa_binning/ \ + -I$(atomisp)/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/raw/ \ + -I$(atomisp)/css2400/isp/kernels/raw/raw_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/ref/ \ + -I$(atomisp)/css2400/isp/kernels/ref/ref_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/s3a/ \ + -I$(atomisp)/css2400/isp/kernels/s3a/s3a_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/sc/ \ + -I$(atomisp)/css2400/isp/kernels/sc/sc_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/sdis/ \ + -I$(atomisp)/css2400/isp/kernels/sdis/common/ \ + -I$(atomisp)/css2400/isp/kernels/sdis/sdis_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/sdis/sdis_2/ \ + -I$(atomisp)/css2400/isp/kernels/tdf/ \ + -I$(atomisp)/css2400/isp/kernels/tdf/tdf_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/tnr/ \ + -I$(atomisp)/css2400/isp/kernels/tnr/tnr_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/tnr/tnr3/ \ + -I$(atomisp)/css2400/isp/kernels/uds/ \ + -I$(atomisp)/css2400/isp/kernels/uds/uds_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/vf/ \ + -I$(atomisp)/css2400/isp/kernels/vf/vf_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/wb/ \ + -I$(atomisp)/css2400/isp/kernels/wb/wb_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/xnr/ \ + -I$(atomisp)/css2400/isp/kernels/xnr/xnr_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/xnr/xnr_3.0/ \ + -I$(atomisp)/css2400/isp/kernels/ynr/ \ + -I$(atomisp)/css2400/isp/kernels/ynr/ynr_1.0/ \ + -I$(atomisp)/css2400/isp/kernels/ynr/ynr_2/ \ + -I$(atomisp)/css2400/isp/modes/interface/ \ + -I$(atomisp)/css2400/runtime/binary/interface/ \ + -I$(atomisp)/css2400/runtime/bufq/interface/ \ + -I$(atomisp)/css2400/runtime/debug/interface/ \ + -I$(atomisp)/css2400/runtime/event/interface/ \ + -I$(atomisp)/css2400/runtime/eventq/interface/ \ + -I$(atomisp)/css2400/runtime/frame/interface/ \ + -I$(atomisp)/css2400/runtime/ifmtr/interface/ \ + -I$(atomisp)/css2400/runtime/inputfifo/interface/ \ + -I$(atomisp)/css2400/runtime/isp_param/interface/ \ + -I$(atomisp)/css2400/runtime/isys/interface/ \ + -I$(atomisp)/css2400/runtime/isys/src/ \ + -I$(atomisp)/css2400/runtime/pipeline/interface/ \ + -I$(atomisp)/css2400/runtime/queue/interface/ \ + -I$(atomisp)/css2400/runtime/queue/src/ \ + -I$(atomisp)/css2400/runtime/rmgr/interface/ \ + -I$(atomisp)/css2400/runtime/spctrl/interface/ \ + -I$(atomisp)/css2400/runtime/tagger/interface/ + +ifeq ($(CONFIG_ION),y) +INCLUDES += -I$(srctree)/drivers/staging/android/ion +endif + +DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__ +#DEFINES += -DUSE_DYNAMIC_BIN +#DEFINES += -DISP_POWER_GATING +#DEFINES += -DUSE_INTERRUPTS +#DEFINES += -DUSE_SSSE3 +#DEFINES += -DPUNIT_CAMERA_BUSY +#DEFINES += -DUSE_KMEM_CACHE + +DEFINES += -DATOMISP_POSTFIX=\"css2400b0_v21\" -DISP2400B0 +DEFINES += -DSYSTEM_hive_isp_css_2400_system -DISP2400 + +ccflags-y += $(INCLUDES) $(DEFINES) -fno-common + +# HACK! While this driver is in bad shape, don't enable several warnings +# that would be otherwise enabled with W=1 +ccflags-y += $(call cc-disable-warning, implicit-fallthrough) +ccflags-y += $(call cc-disable-warning, missing-prototypes) +ccflags-y += $(call cc-disable-warning, missing-declarations) +ccflags-y += $(call cc-disable-warning, suggest-attribute=format) +ccflags-y += $(call cc-disable-warning, unused-const-variable) +ccflags-y += $(call cc-disable-warning, unused-but-set-variable) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h new file mode 100644 index 0000000000000..5d102a4f8affc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h @@ -0,0 +1,205 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2012 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef ATOMISP_REGS_H +#define ATOMISP_REGS_H + +/* common register definitions */ +#define PUNIT_PORT 0x04 +#define CCK_PORT 0x14 + +#define PCICMDSTS 0x01 +#define INTR 0x0f +#define MSI_CAPID 0x24 +#define MSI_ADDRESS 0x25 +#define MSI_DATA 0x26 +#define INTR_CTL 0x27 + +#define PCI_MSI_CAPID 0x90 +#define PCI_MSI_ADDR 0x94 +#define PCI_MSI_DATA 0x98 +#define PCI_INTERRUPT_CTRL 0x9C +#define PCI_I_CONTROL 0xfc + +/* MRFLD specific register definitions */ +#define MRFLD_CSI_AFE 0x39 +#define MRFLD_CSI_CONTROL 0x3a +#define MRFLD_CSI_RCOMP 0x3d + +#define MRFLD_PCI_PMCS 0x84 +#define MRFLD_PCI_CSI_ACCESS_CTRL_VIOL 0xd4 +#define MRFLD_PCI_CSI_AFE_HS_CONTROL 0xdc +#define MRFLD_PCI_CSI_AFE_RCOMP_CONTROL 0xe0 +#define MRFLD_PCI_CSI_CONTROL 0xe8 +#define MRFLD_PCI_CSI_AFE_TRIM_CONTROL 0xe4 +#define MRFLD_PCI_CSI_DEADLINE_CONTROL 0xec +#define MRFLD_PCI_CSI_RCOMP_CONTROL 0xf4 + +/* Select Arasan (legacy)/Intel input system */ +#define MRFLD_PCI_CSI_CONTROL_PARPATHEN BIT(24) +/* Enable CSI interface (ANN B0/K0) */ +#define MRFLD_PCI_CSI_CONTROL_CSI_READY BIT(25) + +/* + * Enables the combining of adjacent 32-byte read requests to the same + * cache line. When cleared, each 32-byte read request is sent as a + * separate request on the IB interface. + */ +#define MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING 0x1 + +/* + * Register: MRFLD_PCI_CSI_RCOMP_CONTROL + * If cleared, the high speed clock going to the digital logic is gated when + * RCOMP update is happening. The clock is gated for a minimum of 100 nsec. + * If this bit is set, then the high speed clock is not gated during the + * update cycle. + */ +#define MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE 0x800000 + +/* + * Enables the combining of adjacent 32-byte write requests to the same + * cache line. When cleared, each 32-byte write request is sent as a + * separate request on the IB interface. + */ +#define MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING 0x2 + +#define MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK 0xc + +#define MRFLD_PCI_CSI1_HSRXCLKTRIM 0x2 +#define MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT 16 +#define MRFLD_PCI_CSI2_HSRXCLKTRIM 0x3 +#define MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT 24 +#define MRFLD_PCI_CSI3_HSRXCLKTRIM 0x2 +#define MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT 28 +#define MRFLD_PCI_CSI_HSRXCLKTRIM_MASK 0xf + +/* + * This register is IUINT MMIO register, it is used to select the CSI + * receiver backend. + * 1: SH CSI backend + * 0: Arasan CSI backend + */ +#define MRFLD_CSI_RECEIVER_SELECTION_REG 0x8081c + +#define MRFLD_INTR_CLEAR_REG 0x50c +#define MRFLD_INTR_STATUS_REG 0x508 +#define MRFLD_INTR_ENABLE_REG 0x510 + +#define MRFLD_MAX_ZOOM_FACTOR 1024 + +/* MRFLD ISP POWER related */ +#define MRFLD_ISPSSPM0 0x39 +#define MRFLD_ISPSSPM0_ISPSSC_OFFSET 0 +#define MRFLD_ISPSSPM0_ISPSSS_OFFSET 24 +#define MRFLD_ISPSSPM0_ISPSSC_MASK 0x3 +#define MRFLD_ISPSSPM0_IUNIT_POWER_ON 0 +#define MRFLD_ISPSSPM0_IUNIT_POWER_OFF 0x3 +#define MRFLD_ISPSSDVFS 0x13F +#define MRFLD_BIT0 0x0001 +#define MRFLD_BIT1 0x0002 + +/* MRFLD CSI lane configuration related */ +#define MRFLD_PORT_CONFIG_NUM 8 +#define MRFLD_PORT_NUM 3 +#define MRFLD_PORT1_ENABLE_SHIFT 0 +#define MRFLD_PORT2_ENABLE_SHIFT 1 +#define MRFLD_PORT3_ENABLE_SHIFT 2 +#define MRFLD_PORT1_LANES_SHIFT 3 +#define MRFLD_PORT2_LANES_SHIFT 7 +#define MRFLD_PORT3_LANES_SHIFT 8 +#define MRFLD_PORT_CONFIG_MASK 0x000f03ff +#define MRFLD_PORT_CONFIGCODE_SHIFT 16 +#define MRFLD_ALL_CSI_PORTS_OFF_MASK 0x7 + +#define CHV_PORT3_LANES_SHIFT 9 +#define CHV_PORT_CONFIG_MASK 0x1f07ff + +#define ISPSSPM1 0x3a +#define ISP_FREQ_STAT_MASK (0x1f << ISP_FREQ_STAT_OFFSET) +#define ISP_REQ_FREQ_MASK 0x1f +#define ISP_FREQ_VALID_MASK (0x1 << ISP_FREQ_VALID_OFFSET) +#define ISP_FREQ_STAT_OFFSET 0x18 +#define ISP_REQ_GUAR_FREQ_OFFSET 0x8 +#define ISP_REQ_FREQ_OFFSET 0x0 +#define ISP_FREQ_VALID_OFFSET 0x7 +#define ISP_FREQ_RULE_ANY 0x0 + +#define ISP_FREQ_457MHZ 0x1C9 +#define ISP_FREQ_400MHZ 0x190 +#define ISP_FREQ_356MHZ 0x164 +#define ISP_FREQ_320MHZ 0x140 +#define ISP_FREQ_266MHZ 0x10a +#define ISP_FREQ_200MHZ 0xc8 +#define ISP_FREQ_100MHZ 0x64 + +#define HPLL_FREQ_800MHZ 0x320 +#define HPLL_FREQ_1600MHZ 0x640 +#define HPLL_FREQ_2000MHZ 0x7D0 + +#define CCK_FUSE_REG_0 0x08 +#define CCK_FUSE_HPLL_FREQ_MASK 0x03 + +#if defined(ISP2401) +#define ISP_FREQ_MAX ISP_FREQ_320MHZ +#else +#define ISP_FREQ_MAX ISP_FREQ_400MHZ +#endif + +/* ISP2401 CSI2+ receiver delay settings */ +#define CSI2_PORT_A_BASE 0xC0000 +#define CSI2_PORT_B_BASE 0xC2000 +#define CSI2_PORT_C_BASE 0xC4000 + +#define CSI2_LANE_CL_BASE 0x418 +#define CSI2_LANE_D0_BASE 0x420 +#define CSI2_LANE_D1_BASE 0x428 +#define CSI2_LANE_D2_BASE 0x430 +#define CSI2_LANE_D3_BASE 0x438 + +#define CSI2_REG_RX_CSI_DLY_CNT_TERMEN 0 +#define CSI2_REG_RX_CSI_DLY_CNT_SETTLE 0x4 + +#define CSI2_PORT_A_RX_CSI_DLY_CNT_TERMEN_CLANE 0xC0418 +#define CSI2_PORT_A_RX_CSI_DLY_CNT_SETTLE_CLANE 0xC041C +#define CSI2_PORT_A_RX_CSI_DLY_CNT_TERMEN_DLANE0 0xC0420 +#define CSI2_PORT_A_RX_CSI_DLY_CNT_SETTLE_DLANE0 0xC0424 +#define CSI2_PORT_A_RX_CSI_DLY_CNT_TERMEN_DLANE1 0xC0428 +#define CSI2_PORT_A_RX_CSI_DLY_CNT_SETTLE_DLANE1 0xC042C +#define CSI2_PORT_A_RX_CSI_DLY_CNT_TERMEN_DLANE2 0xC0430 +#define CSI2_PORT_A_RX_CSI_DLY_CNT_SETTLE_DLANE2 0xC0434 +#define CSI2_PORT_A_RX_CSI_DLY_CNT_TERMEN_DLANE3 0xC0438 +#define CSI2_PORT_A_RX_CSI_DLY_CNT_SETTLE_DLANE3 0xC043C + +#define CSI2_PORT_B_RX_CSI_DLY_CNT_TERMEN_CLANE 0xC2418 +#define CSI2_PORT_B_RX_CSI_DLY_CNT_SETTLE_CLANE 0xC241C +#define CSI2_PORT_B_RX_CSI_DLY_CNT_TERMEN_DLANE0 0xC2420 +#define CSI2_PORT_B_RX_CSI_DLY_CNT_SETTLE_DLANE0 0xC2424 +#define CSI2_PORT_B_RX_CSI_DLY_CNT_TERMEN_DLANE1 0xC2428 +#define CSI2_PORT_B_RX_CSI_DLY_CNT_SETTLE_DLANE1 0xC242C + +#define CSI2_PORT_C_RX_CSI_DLY_CNT_TERMEN_CLANE 0xC4418 +#define CSI2_PORT_C_RX_CSI_DLY_CNT_SETTLE_CLANE 0xC441C +#define CSI2_PORT_C_RX_CSI_DLY_CNT_TERMEN_DLANE0 0xC4420 +#define CSI2_PORT_C_RX_CSI_DLY_CNT_SETTLE_DLANE0 0xC4424 +#define CSI2_PORT_C_RX_CSI_DLY_CNT_TERMEN_DLANE1 0xC4428 +#define CSI2_PORT_C_RX_CSI_DLY_CNT_SETTLE_DLANE1 0xC442C + +#define DMA_BURST_SIZE_REG 0xCD408 + +#define ISP_DFS_TRY_TIMES 2 + +#endif /* ATOMISP_REGS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c new file mode 100644 index 0000000000000..7ebcebd80b772 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c @@ -0,0 +1,604 @@ +/* + * Support for Clovertrail PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2012 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +/* + * This file implements loadable acceleration firmware API, + * including ioctls to map and unmap acceleration parameters and buffers. + */ + +#include +#include + +#include "atomisp_acc.h" +#include "atomisp_internal.h" +#include "atomisp_compat.h" +#include "atomisp_cmd.h" + +#include "hrt/hive_isp_css_mm_hrt.h" +#include "memory_access/memory_access.h" +#include "ia_css.h" + +static const struct { + unsigned int flag; + enum atomisp_css_pipe_id pipe_id; +} acc_flag_to_pipe[] = { + { ATOMISP_ACC_FW_LOAD_FL_PREVIEW, CSS_PIPE_ID_PREVIEW }, + { ATOMISP_ACC_FW_LOAD_FL_COPY, CSS_PIPE_ID_COPY }, + { ATOMISP_ACC_FW_LOAD_FL_VIDEO, CSS_PIPE_ID_VIDEO }, + { ATOMISP_ACC_FW_LOAD_FL_CAPTURE, CSS_PIPE_ID_CAPTURE }, + { ATOMISP_ACC_FW_LOAD_FL_ACC, CSS_PIPE_ID_ACC } +}; + +/* + * Allocate struct atomisp_acc_fw along with space for firmware. + * The returned struct atomisp_acc_fw is cleared (firmware region is not). + */ +static struct atomisp_acc_fw *acc_alloc_fw(unsigned int fw_size) +{ + struct atomisp_acc_fw *acc_fw; + + acc_fw = kzalloc(sizeof(*acc_fw), GFP_KERNEL); + if (!acc_fw) + return NULL; + + acc_fw->fw = vmalloc(fw_size); + if (!acc_fw->fw) { + kfree(acc_fw); + return NULL; + } + + return acc_fw; +} + +static void acc_free_fw(struct atomisp_acc_fw *acc_fw) +{ + vfree(acc_fw->fw); + kfree(acc_fw); +} + +static struct atomisp_acc_fw * +acc_get_fw(struct atomisp_sub_device *asd, unsigned int handle) +{ + struct atomisp_acc_fw *acc_fw; + + list_for_each_entry(acc_fw, &asd->acc.fw, list) + if (acc_fw->handle == handle) + return acc_fw; + + return NULL; +} + +static struct atomisp_map *acc_get_map(struct atomisp_sub_device *asd, + unsigned long css_ptr, size_t length) +{ + struct atomisp_map *atomisp_map; + + list_for_each_entry(atomisp_map, &asd->acc.memory_maps, list) { + if (atomisp_map->ptr == css_ptr && + atomisp_map->length == length) + return atomisp_map; + } + return NULL; +} + +static int acc_stop_acceleration(struct atomisp_sub_device *asd) +{ + int ret; + + ret = atomisp_css_stop_acc_pipe(asd); + atomisp_css_destroy_acc_pipe(asd); + + return ret; +} + +void atomisp_acc_cleanup(struct atomisp_device *isp) +{ + int i; + + for (i = 0; i < isp->num_of_streams; i++) + ida_destroy(&isp->asd[i].acc.ida); +} + +void atomisp_acc_release(struct atomisp_sub_device *asd) +{ + struct atomisp_acc_fw *acc_fw, *ta; + struct atomisp_map *atomisp_map, *tm; + + /* Stop acceleration if already running */ + if (asd->acc.pipeline) + acc_stop_acceleration(asd); + + /* Unload all loaded acceleration binaries */ + list_for_each_entry_safe(acc_fw, ta, &asd->acc.fw, list) { + list_del(&acc_fw->list); + ida_remove(&asd->acc.ida, acc_fw->handle); + acc_free_fw(acc_fw); + } + + /* Free all mapped memory blocks */ + list_for_each_entry_safe(atomisp_map, tm, &asd->acc.memory_maps, list) { + list_del(&atomisp_map->list); + hmm_free(atomisp_map->ptr); + kfree(atomisp_map); + } +} + +int atomisp_acc_load_to_pipe(struct atomisp_sub_device *asd, + struct atomisp_acc_fw_load_to_pipe *user_fw) +{ + static const unsigned int pipeline_flags = + ATOMISP_ACC_FW_LOAD_FL_PREVIEW | ATOMISP_ACC_FW_LOAD_FL_COPY | + ATOMISP_ACC_FW_LOAD_FL_VIDEO | + ATOMISP_ACC_FW_LOAD_FL_CAPTURE | ATOMISP_ACC_FW_LOAD_FL_ACC; + + struct atomisp_acc_fw *acc_fw; + int handle; + + if (!user_fw->data || user_fw->size < sizeof(*acc_fw->fw)) + return -EINVAL; + + /* Binary has to be enabled at least for one pipeline */ + if (!(user_fw->flags & pipeline_flags)) + return -EINVAL; + + /* We do not support other flags yet */ + if (user_fw->flags & ~pipeline_flags) + return -EINVAL; + + if (user_fw->type < ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT || + user_fw->type > ATOMISP_ACC_FW_LOAD_TYPE_STANDALONE) + return -EINVAL; + + if (asd->acc.pipeline || asd->acc.extension_mode) + return -EBUSY; + + acc_fw = acc_alloc_fw(user_fw->size); + if (!acc_fw) + return -ENOMEM; + + if (copy_from_user(acc_fw->fw, user_fw->data, user_fw->size)) { + acc_free_fw(acc_fw); + return -EFAULT; + } + + if (!ida_pre_get(&asd->acc.ida, GFP_KERNEL) || + ida_get_new_above(&asd->acc.ida, 1, &handle)) { + acc_free_fw(acc_fw); + return -ENOSPC; + } + + user_fw->fw_handle = handle; + acc_fw->handle = handle; + acc_fw->flags = user_fw->flags; + acc_fw->type = user_fw->type; + acc_fw->fw->handle = handle; + + /* + * correct isp firmware type in order ISP firmware can be appended + * to correct pipe properly + */ + if (acc_fw->fw->type == ia_css_isp_firmware) { + static const int type_to_css[] = { + [ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT] = + IA_CSS_ACC_OUTPUT, + [ATOMISP_ACC_FW_LOAD_TYPE_VIEWFINDER] = + IA_CSS_ACC_VIEWFINDER, + [ATOMISP_ACC_FW_LOAD_TYPE_STANDALONE] = + IA_CSS_ACC_STANDALONE, + }; + acc_fw->fw->info.isp.type = type_to_css[acc_fw->type]; + } + + list_add_tail(&acc_fw->list, &asd->acc.fw); + return 0; +} + +int atomisp_acc_load(struct atomisp_sub_device *asd, + struct atomisp_acc_fw_load *user_fw) +{ + struct atomisp_acc_fw_load_to_pipe ltp = {0}; + int r; + + ltp.flags = ATOMISP_ACC_FW_LOAD_FL_ACC; + ltp.type = ATOMISP_ACC_FW_LOAD_TYPE_STANDALONE; + ltp.size = user_fw->size; + ltp.data = user_fw->data; + r = atomisp_acc_load_to_pipe(asd, <p); + user_fw->fw_handle = ltp.fw_handle; + return r; +} + +int atomisp_acc_unload(struct atomisp_sub_device *asd, unsigned int *handle) +{ + struct atomisp_acc_fw *acc_fw; + + if (asd->acc.pipeline || asd->acc.extension_mode) + return -EBUSY; + + acc_fw = acc_get_fw(asd, *handle); + if (!acc_fw) + return -EINVAL; + + list_del(&acc_fw->list); + ida_remove(&asd->acc.ida, acc_fw->handle); + acc_free_fw(acc_fw); + + return 0; +} + +int atomisp_acc_start(struct atomisp_sub_device *asd, unsigned int *handle) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_acc_fw *acc_fw; + int ret; + unsigned int nbin; + + if (asd->acc.pipeline || asd->acc.extension_mode) + return -EBUSY; + + /* Invalidate caches. FIXME: should flush only necessary buffers */ + wbinvd(); + + ret = atomisp_css_create_acc_pipe(asd); + if (ret) + return ret; + + nbin = 0; + list_for_each_entry(acc_fw, &asd->acc.fw, list) { + if (*handle != 0 && *handle != acc_fw->handle) + continue; + + if (acc_fw->type != ATOMISP_ACC_FW_LOAD_TYPE_STANDALONE) + continue; + + /* Add the binary into the pipeline */ + ret = atomisp_css_load_acc_binary(asd, acc_fw->fw, nbin); + if (ret < 0) { + dev_err(isp->dev, "acc_load_binary failed\n"); + goto err_stage; + } + + ret = atomisp_css_set_acc_parameters(acc_fw); + if (ret < 0) { + dev_err(isp->dev, "acc_set_parameters failed\n"); + goto err_stage; + } + nbin++; + } + if (nbin < 1) { + /* Refuse creating pipelines with no binaries */ + dev_err(isp->dev, "%s: no acc binary available\n", __func__); + ret = -EINVAL; + goto err_stage; + } + + ret = atomisp_css_start_acc_pipe(asd); + if (ret) { + dev_err(isp->dev, "%s: atomisp_acc_start_acc_pipe failed\n", + __func__); + goto err_stage; + } + + return 0; + +err_stage: + atomisp_css_destroy_acc_pipe(asd); + return ret; +} + +int atomisp_acc_wait(struct atomisp_sub_device *asd, unsigned int *handle) +{ + struct atomisp_device *isp = asd->isp; + int ret; + + if (!asd->acc.pipeline) + return -ENOENT; + + if (*handle && !acc_get_fw(asd, *handle)) + return -EINVAL; + + ret = atomisp_css_wait_acc_finish(asd); + if (acc_stop_acceleration(asd) == -EIO) { + atomisp_reset(isp); + return -EINVAL; + } + + return ret; +} + +void atomisp_acc_done(struct atomisp_sub_device *asd, unsigned int handle) +{ + struct v4l2_event event = { 0 }; + + event.type = V4L2_EVENT_ATOMISP_ACC_COMPLETE; + event.u.frame_sync.frame_sequence = atomic_read(&asd->sequence); + event.id = handle; + + v4l2_event_queue(asd->subdev.devnode, &event); +} + +int atomisp_acc_map(struct atomisp_sub_device *asd, struct atomisp_acc_map *map) +{ + struct atomisp_map *atomisp_map; + ia_css_ptr cssptr; + int pgnr; + + if (map->css_ptr) + return -EINVAL; + + if (asd->acc.pipeline) + return -EBUSY; + + if (map->user_ptr) { + /* Buffer to map must be page-aligned */ + if ((unsigned long)map->user_ptr & ~PAGE_MASK) { + dev_err(asd->isp->dev, + "%s: mapped buffer address %p is not page aligned\n", + __func__, map->user_ptr); + return -EINVAL; + } + + pgnr = DIV_ROUND_UP(map->length, PAGE_SIZE); + cssptr = hrt_isp_css_mm_alloc_user_ptr(map->length, + map->user_ptr, + pgnr, HRT_USR_PTR, + (map->flags & ATOMISP_MAP_FLAG_CACHED)); + } else { + /* Allocate private buffer. */ + if (map->flags & ATOMISP_MAP_FLAG_CACHED) + cssptr = hrt_isp_css_mm_calloc_cached(map->length); + else + cssptr = hrt_isp_css_mm_calloc(map->length); + } + + if (!cssptr) + return -ENOMEM; + + atomisp_map = kmalloc(sizeof(*atomisp_map), GFP_KERNEL); + if (!atomisp_map) { + hmm_free(cssptr); + return -ENOMEM; + } + atomisp_map->ptr = cssptr; + atomisp_map->length = map->length; + list_add(&atomisp_map->list, &asd->acc.memory_maps); + + dev_dbg(asd->isp->dev, "%s: userptr %p, css_address 0x%x, size %d\n", + __func__, map->user_ptr, cssptr, map->length); + map->css_ptr = cssptr; + return 0; +} + +int atomisp_acc_unmap(struct atomisp_sub_device *asd, struct atomisp_acc_map *map) +{ + struct atomisp_map *atomisp_map; + + if (asd->acc.pipeline) + return -EBUSY; + + atomisp_map = acc_get_map(asd, map->css_ptr, map->length); + if (!atomisp_map) + return -EINVAL; + + list_del(&atomisp_map->list); + hmm_free(atomisp_map->ptr); + kfree(atomisp_map); + return 0; +} + +int atomisp_acc_s_mapped_arg(struct atomisp_sub_device *asd, + struct atomisp_acc_s_mapped_arg *arg) +{ + struct atomisp_acc_fw *acc_fw; + + if (arg->memory >= ATOMISP_ACC_NR_MEMORY) + return -EINVAL; + + if (asd->acc.pipeline) + return -EBUSY; + + acc_fw = acc_get_fw(asd, arg->fw_handle); + if (!acc_fw) + return -EINVAL; + + if (arg->css_ptr != 0 || arg->length != 0) { + /* Unless the parameter is cleared, check that it exists */ + if (!acc_get_map(asd, arg->css_ptr, arg->length)) + return -EINVAL; + } + + acc_fw->args[arg->memory].length = arg->length; + acc_fw->args[arg->memory].css_ptr = arg->css_ptr; + + dev_dbg(asd->isp->dev, "%s: mem %d, address %p, size %ld\n", + __func__, arg->memory, (void *)arg->css_ptr, + (unsigned long)arg->length); + return 0; +} + +/* + * Appends the loaded acceleration binary extensions to the + * current ISP mode. Must be called just before sh_css_start(). + */ +int atomisp_acc_load_extensions(struct atomisp_sub_device *asd) +{ + struct atomisp_acc_fw *acc_fw; + bool ext_loaded = false; + bool continuous = asd->continuous_mode->val && + asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW; + int ret = 0, i = -1; + struct atomisp_device *isp = asd->isp; + + if (asd->acc.pipeline || asd->acc.extension_mode) + return -EBUSY; + + /* Invalidate caches. FIXME: should flush only necessary buffers */ + wbinvd(); + + list_for_each_entry(acc_fw, &asd->acc.fw, list) { + if (acc_fw->type != ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT && + acc_fw->type != ATOMISP_ACC_FW_LOAD_TYPE_VIEWFINDER) + continue; + + for (i = 0; i < ARRAY_SIZE(acc_flag_to_pipe); i++) { + /* QoS (ACC pipe) acceleration stages are currently + * allowed only in continuous mode. Skip them for + * all other modes. */ + if (!continuous && + acc_flag_to_pipe[i].flag == + ATOMISP_ACC_FW_LOAD_FL_ACC) + continue; + + if (acc_fw->flags & acc_flag_to_pipe[i].flag) { + ret = atomisp_css_load_acc_extension(asd, + acc_fw->fw, + acc_flag_to_pipe[i].pipe_id, + acc_fw->type); + if (ret) + goto error; + + ext_loaded = true; + } + } + + ret = atomisp_css_set_acc_parameters(acc_fw); + if (ret < 0) + goto error; + } + + if (!ext_loaded) + return ret; + + ret = atomisp_css_update_stream(asd); + if (ret) { + dev_err(isp->dev, "%s: update stream failed.\n", __func__); + goto error; + } + + asd->acc.extension_mode = true; + return 0; + +error: + while (--i >= 0) { + if (acc_fw->flags & acc_flag_to_pipe[i].flag) { + atomisp_css_unload_acc_extension(asd, acc_fw->fw, + acc_flag_to_pipe[i].pipe_id); + } + } + + list_for_each_entry_continue_reverse(acc_fw, &asd->acc.fw, list) { + if (acc_fw->type != ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT && + acc_fw->type != ATOMISP_ACC_FW_LOAD_TYPE_VIEWFINDER) + continue; + + for (i = ARRAY_SIZE(acc_flag_to_pipe) - 1; i >= 0; i--) { + if (!continuous && + acc_flag_to_pipe[i].flag == + ATOMISP_ACC_FW_LOAD_FL_ACC) + continue; + if (acc_fw->flags & acc_flag_to_pipe[i].flag) { + atomisp_css_unload_acc_extension(asd, + acc_fw->fw, + acc_flag_to_pipe[i].pipe_id); + } + } + } + return ret; +} + +void atomisp_acc_unload_extensions(struct atomisp_sub_device *asd) +{ + struct atomisp_acc_fw *acc_fw; + int i; + + if (!asd->acc.extension_mode) + return; + + list_for_each_entry_reverse(acc_fw, &asd->acc.fw, list) { + if (acc_fw->type != ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT && + acc_fw->type != ATOMISP_ACC_FW_LOAD_TYPE_VIEWFINDER) + continue; + + for (i = ARRAY_SIZE(acc_flag_to_pipe) - 1; i >= 0; i--) { + if (acc_fw->flags & acc_flag_to_pipe[i].flag) { + atomisp_css_unload_acc_extension(asd, + acc_fw->fw, + acc_flag_to_pipe[i].pipe_id); + } + } + } + + asd->acc.extension_mode = false; +} + +int atomisp_acc_set_state(struct atomisp_sub_device *asd, + struct atomisp_acc_state *arg) +{ + struct atomisp_acc_fw *acc_fw; + bool enable = (arg->flags & ATOMISP_STATE_FLAG_ENABLE) != 0; + struct ia_css_pipe *pipe; + enum ia_css_err r; + int i; + + if (!asd->acc.extension_mode) + return -EBUSY; + + if (arg->flags & ~ATOMISP_STATE_FLAG_ENABLE) + return -EINVAL; + + acc_fw = acc_get_fw(asd, arg->fw_handle); + if (!acc_fw) + return -EINVAL; + + if (enable) + wbinvd(); + + for (i = 0; i < ARRAY_SIZE(acc_flag_to_pipe); i++) { + if (acc_fw->flags & acc_flag_to_pipe[i].flag) { + pipe = asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + pipes[acc_flag_to_pipe[i].pipe_id]; + r = ia_css_pipe_set_qos_ext_state(pipe, acc_fw->handle, + enable); + if (r != IA_CSS_SUCCESS) + return -EBADRQC; + } + } + + if (enable) + acc_fw->flags |= ATOMISP_ACC_FW_LOAD_FL_ENABLE; + else + acc_fw->flags &= ~ATOMISP_ACC_FW_LOAD_FL_ENABLE; + + return 0; +} + +int atomisp_acc_get_state(struct atomisp_sub_device *asd, + struct atomisp_acc_state *arg) +{ + struct atomisp_acc_fw *acc_fw; + + if (!asd->acc.extension_mode) + return -EBUSY; + + acc_fw = acc_get_fw(asd, arg->fw_handle); + if (!acc_fw) + return -EINVAL; + + arg->flags = acc_fw->flags; + + return 0; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h new file mode 100644 index 0000000000000..56386154643b2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h @@ -0,0 +1,120 @@ +/* + * Support for Clovertrail PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2012 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_ACC_H__ +#define __ATOMISP_ACC_H__ + +#include "../../include/linux/atomisp.h" +#include "atomisp_internal.h" + +#include "ia_css_types.h" + +/* + * Interface functions for AtomISP driver acceleration API implementation. + */ + +struct atomisp_sub_device; + +void atomisp_acc_cleanup(struct atomisp_device *isp); + +/* + * Free up any allocated resources. + * Must be called each time when the device is closed. + * Note that there isn't corresponding open() call; + * this function may be called sequentially multiple times. + * Must be called to free up resources before driver is unloaded. + */ +void atomisp_acc_release(struct atomisp_sub_device *asd); + +/* Load acceleration binary. DEPRECATED. */ +int atomisp_acc_load(struct atomisp_sub_device *asd, + struct atomisp_acc_fw_load *fw); + +/* Load acceleration binary with specified properties */ +int atomisp_acc_load_to_pipe(struct atomisp_sub_device *asd, + struct atomisp_acc_fw_load_to_pipe *fw); + +/* Unload specified acceleration binary */ +int atomisp_acc_unload(struct atomisp_sub_device *asd, + unsigned int *handle); + +/* + * Map a memory region into ISP memory space. + */ +int atomisp_acc_map(struct atomisp_sub_device *asd, + struct atomisp_acc_map *map); + +/* + * Unmap a mapped memory region. + */ +int atomisp_acc_unmap(struct atomisp_sub_device *asd, + struct atomisp_acc_map *map); + +/* + * Set acceleration binary argument to a previously mapped memory region. + */ +int atomisp_acc_s_mapped_arg(struct atomisp_sub_device *asd, + struct atomisp_acc_s_mapped_arg *arg); + + +/* + * Start acceleration. + * Return immediately, acceleration is left running in background. + * Specify either acceleration binary or pipeline which to start. + */ +int atomisp_acc_start(struct atomisp_sub_device *asd, + unsigned int *handle); + +/* + * Wait until acceleration finishes. + * This MUST be called after each acceleration has been started. + * Specify either acceleration binary or pipeline handle. + */ +int atomisp_acc_wait(struct atomisp_sub_device *asd, + unsigned int *handle); + +/* + * Used by ISR to notify ACC stage finished. + * This is internally used and does not export as IOCTL. + */ +void atomisp_acc_done(struct atomisp_sub_device *asd, unsigned int handle); + +/* + * Appends the loaded acceleration binary extensions to the + * current ISP mode. Must be called just before atomisp_css_start(). + */ +int atomisp_acc_load_extensions(struct atomisp_sub_device *asd); + +/* + * Must be called after streaming is stopped: + * unloads any loaded acceleration extensions. + */ +void atomisp_acc_unload_extensions(struct atomisp_sub_device *asd); + +/* + * Set acceleration firmware flags. + */ +int atomisp_acc_set_state(struct atomisp_sub_device *asd, + struct atomisp_acc_state *arg); + +/* + * Get acceleration firmware flags. + */ +int atomisp_acc_get_state(struct atomisp_sub_device *asd, + struct atomisp_acc_state *arg); + +#endif /* __ATOMISP_ACC_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c new file mode 100644 index 0000000000000..8741656548506 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -0,0 +1,6697 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#define CREATE_TRACE_POINTS +#include "atomisp_trace_event.h" + +#include "atomisp_cmd.h" +#include "atomisp_common.h" +#include "atomisp_fops.h" +#include "atomisp_internal.h" +#include "atomisp_ioctl.h" +#include "atomisp-regs.h" +#include "atomisp_tables.h" +#include "atomisp_acc.h" +#include "atomisp_compat.h" +#include "atomisp_subdev.h" +#include "atomisp_dfs_tables.h" + +#include "hrt/hive_isp_css_mm_hrt.h" + +#include "sh_css_hrt.h" +#include "sh_css_defs.h" +#include "system_global.h" +#include "sh_css_internal.h" +#include "sh_css_sp.h" +#include "gp_device.h" +#include "device_access.h" +#include "irq.h" + +#include "ia_css_types.h" +#include "ia_css_stream.h" +#include "error_support.h" +#include "hrt/bits.h" + + +/* We should never need to run the flash for more than 2 frames. + * At 15fps this means 133ms. We set the timeout a bit longer. + * Each flash driver is supposed to set its own timeout, but + * just in case someone else changed the timeout, we set it + * here to make sure we don't damage the flash hardware. */ +#define FLASH_TIMEOUT 800 /* ms */ + +union host { + struct { + void *kernel_ptr; + void __user *user_ptr; + int size; + } scalar; + struct { + void *hmm_ptr; + } ptr; +}; + +/* + * get sensor:dis71430/ov2720 related info from v4l2_subdev->priv data field. + * subdev->priv is set in mrst.c + */ +struct camera_mipi_info *atomisp_to_sensor_mipi_info(struct v4l2_subdev *sd) +{ + return (struct camera_mipi_info *)v4l2_get_subdev_hostdata(sd); +} + +/* + * get struct atomisp_video_pipe from v4l2 video_device + */ +struct atomisp_video_pipe *atomisp_to_video_pipe(struct video_device *dev) +{ + return (struct atomisp_video_pipe *) + container_of(dev, struct atomisp_video_pipe, vdev); +} + +/* + * get struct atomisp_acc_pipe from v4l2 video_device + */ +struct atomisp_acc_pipe *atomisp_to_acc_pipe(struct video_device *dev) +{ + return (struct atomisp_acc_pipe *) + container_of(dev, struct atomisp_acc_pipe, vdev); +} + +static unsigned short atomisp_get_sensor_fps(struct atomisp_sub_device *asd) +{ + struct v4l2_subdev_frame_interval fi; + struct atomisp_device *isp = asd->isp; + + unsigned short fps = 0; + int ret; + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + video, g_frame_interval, &fi); + + if (!ret && fi.interval.numerator) + fps = fi.interval.denominator / fi.interval.numerator; + + return fps; +} + +/* + * DFS progress is shown as follows: + * 1. Target frequency is calculated according to FPS/Resolution/ISP running + * mode. + * 2. Ratio is calculated using formula: 2 * HPLL / target frequency - 1 + * with proper rounding. + * 3. Set ratio to ISPFREQ40, 1 to FREQVALID and ISPFREQGUAR40 + * to 200MHz in ISPSSPM1. + * 4. Wait for FREQVALID to be cleared by P-Unit. + * 5. Wait for field ISPFREQSTAT40 in ISPSSPM1 turn to ratio set in 3. + */ +static int write_target_freq_to_hw(struct atomisp_device *isp, + unsigned int new_freq) +{ + unsigned int ratio, timeout, guar_ratio; + u32 isp_sspm1 = 0; + int i; + + if (!isp->hpll_freq) { + dev_err(isp->dev, "failed to get hpll_freq. no change to freq\n"); + return -EINVAL; + } + + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); + if (isp_sspm1 & ISP_FREQ_VALID_MASK) { + dev_dbg(isp->dev, "clearing ISPSSPM1 valid bit.\n"); + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1, + isp_sspm1 & ~(1 << ISP_FREQ_VALID_OFFSET)); + } + + ratio = (2 * isp->hpll_freq + new_freq / 2) / new_freq - 1; + guar_ratio = (2 * isp->hpll_freq + 200 / 2) / 200 - 1; + + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); + isp_sspm1 &= ~(0x1F << ISP_REQ_FREQ_OFFSET); + + for (i = 0; i < ISP_DFS_TRY_TIMES; i++) { + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1, + isp_sspm1 + | ratio << ISP_REQ_FREQ_OFFSET + | 1 << ISP_FREQ_VALID_OFFSET + | guar_ratio << ISP_REQ_GUAR_FREQ_OFFSET); + + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); + timeout = 20; + while ((isp_sspm1 & ISP_FREQ_VALID_MASK) && timeout) { + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); + dev_dbg(isp->dev, "waiting for ISPSSPM1 valid bit to be 0.\n"); + udelay(100); + timeout--; + } + + if (timeout != 0) + break; + } + + if (timeout == 0) { + dev_err(isp->dev, "DFS failed due to HW error.\n"); + return -EINVAL; + } + + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); + timeout = 10; + while (((isp_sspm1 >> ISP_FREQ_STAT_OFFSET) != ratio) && timeout) { + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); + dev_dbg(isp->dev, "waiting for ISPSSPM1 status bit to be 0x%x.\n", + new_freq); + udelay(100); + timeout--; + } + if (timeout == 0) { + dev_err(isp->dev, "DFS target freq is rejected by HW.\n"); + return -EINVAL; + } + + return 0; +} +int atomisp_freq_scaling(struct atomisp_device *isp, + enum atomisp_dfs_mode mode, + bool force) +{ + /* FIXME! Only use subdev[0] status yet */ + struct atomisp_sub_device *asd = &isp->asd[0]; + const struct atomisp_dfs_config *dfs; + unsigned int new_freq; + struct atomisp_freq_scaling_rule curr_rules; + int i, ret; + unsigned short fps = 0; + + if (isp->sw_contex.power_state != ATOM_ISP_POWER_UP) { + dev_err(isp->dev, "DFS cannot proceed due to no power.\n"); + return -EINVAL; + } + + if ((isp->pdev->device & ATOMISP_PCI_DEVICE_SOC_MASK) == + ATOMISP_PCI_DEVICE_SOC_CHT && ATOMISP_USE_YUVPP(asd)) + isp->dfs = &dfs_config_cht_soc; + + dfs = isp->dfs; + + if (dfs->lowest_freq == 0 || dfs->max_freq_at_vmin == 0 || + dfs->highest_freq == 0 || dfs->dfs_table_size == 0 || + !dfs->dfs_table) { + dev_err(isp->dev, "DFS configuration is invalid.\n"); + return -EINVAL; + } + + if (mode == ATOMISP_DFS_MODE_LOW) { + new_freq = dfs->lowest_freq; + goto done; + } + + if (mode == ATOMISP_DFS_MODE_MAX) { + new_freq = dfs->highest_freq; + goto done; + } + + fps = atomisp_get_sensor_fps(asd); + if (fps == 0) + return -EINVAL; + + curr_rules.width = asd->fmt[asd->capture_pad].fmt.width; + curr_rules.height = asd->fmt[asd->capture_pad].fmt.height; + curr_rules.fps = fps; + curr_rules.run_mode = asd->run_mode->val; + /* + * For continuous mode, we need to make the capture setting applied + * since preview mode, because there is no chance to do this when + * starting image capture. + */ + if (asd->continuous_mode->val) { + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) + curr_rules.run_mode = ATOMISP_RUN_MODE_SDV; + else + curr_rules.run_mode = + ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE; + } + + /* search for the target frequency by looping freq rules*/ + for (i = 0; i < dfs->dfs_table_size; i++) { + if (curr_rules.width != dfs->dfs_table[i].width && + dfs->dfs_table[i].width != ISP_FREQ_RULE_ANY) + continue; + if (curr_rules.height != dfs->dfs_table[i].height && + dfs->dfs_table[i].height != ISP_FREQ_RULE_ANY) + continue; + if (curr_rules.fps != dfs->dfs_table[i].fps && + dfs->dfs_table[i].fps != ISP_FREQ_RULE_ANY) + continue; + if (curr_rules.run_mode != dfs->dfs_table[i].run_mode && + dfs->dfs_table[i].run_mode != ISP_FREQ_RULE_ANY) + continue; + break; + } + + if (i == dfs->dfs_table_size) + new_freq = dfs->max_freq_at_vmin; + else + new_freq = dfs->dfs_table[i].isp_freq; + +done: + dev_dbg(isp->dev, "DFS target frequency=%d.\n", new_freq); + + if ((new_freq == isp->sw_contex.running_freq) && !force) + return 0; + + dev_dbg(isp->dev, "Programming DFS frequency to %d\n", new_freq); + + ret = write_target_freq_to_hw(isp, new_freq); + if (!ret) { + isp->sw_contex.running_freq = new_freq; + trace_ipu_pstate(new_freq, -1); + } + return ret; +} + +/* + * reset and restore ISP + */ +int atomisp_reset(struct atomisp_device *isp) +{ + /* Reset ISP by power-cycling it */ + int ret = 0; + + dev_dbg(isp->dev, "%s\n", __func__); + atomisp_css_suspend(isp); + ret = atomisp_runtime_suspend(isp->dev); + if (ret < 0) + dev_err(isp->dev, "atomisp_runtime_suspend failed, %d\n", ret); + ret = atomisp_mrfld_power_down(isp); + if (ret < 0) { + dev_err(isp->dev, "can not disable ISP power\n"); + } else { + ret = atomisp_mrfld_power_up(isp); + if (ret < 0) + dev_err(isp->dev, "can not enable ISP power\n"); + ret = atomisp_runtime_resume(isp->dev); + if (ret < 0) + dev_err(isp->dev, "atomisp_runtime_resume failed, %d\n", ret); + } + ret = atomisp_css_resume(isp); + if (ret) + isp->isp_fatal_error = true; + + return ret; +} + +/* + * interrupt disable functions + */ +static void disable_isp_irq(enum hrt_isp_css_irq irq) +{ + irq_disable_channel(IRQ0_ID, irq); + + if (irq != hrt_isp_css_irq_sp) + return; + + cnd_sp_irq_enable(SP0_ID, false); +} + +/* + * interrupt clean function + */ +static void clear_isp_irq(enum hrt_isp_css_irq irq) +{ + irq_clear_all(IRQ0_ID); +} + +void atomisp_msi_irq_init(struct atomisp_device *isp, struct pci_dev *dev) +{ + u32 msg32; + u16 msg16; + + pci_read_config_dword(dev, PCI_MSI_CAPID, &msg32); + msg32 |= 1 << MSI_ENABLE_BIT; + pci_write_config_dword(dev, PCI_MSI_CAPID, msg32); + + msg32 = (1 << INTR_IER) | (1 << INTR_IIR); + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, msg32); + + pci_read_config_word(dev, PCI_COMMAND, &msg16); + msg16 |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_INTX_DISABLE); + pci_write_config_word(dev, PCI_COMMAND, msg16); +} + +void atomisp_msi_irq_uninit(struct atomisp_device *isp, struct pci_dev *dev) +{ + u32 msg32; + u16 msg16; + + pci_read_config_dword(dev, PCI_MSI_CAPID, &msg32); + msg32 &= ~(1 << MSI_ENABLE_BIT); + pci_write_config_dword(dev, PCI_MSI_CAPID, msg32); + + msg32 = 0x0; + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, msg32); + + pci_read_config_word(dev, PCI_COMMAND, &msg16); + msg16 &= ~(PCI_COMMAND_MASTER); + pci_write_config_word(dev, PCI_COMMAND, msg16); +} + +static void atomisp_sof_event(struct atomisp_sub_device *asd) +{ + struct v4l2_event event = {0}; + + event.type = V4L2_EVENT_FRAME_SYNC; + event.u.frame_sync.frame_sequence = atomic_read(&asd->sof_count); + + v4l2_event_queue(asd->subdev.devnode, &event); +} + +void atomisp_eof_event(struct atomisp_sub_device *asd, uint8_t exp_id) +{ + struct v4l2_event event = {0}; + + event.type = V4L2_EVENT_FRAME_END; + event.u.frame_sync.frame_sequence = exp_id; + + v4l2_event_queue(asd->subdev.devnode, &event); +} + +static void atomisp_3a_stats_ready_event(struct atomisp_sub_device *asd, uint8_t exp_id) +{ + struct v4l2_event event = {0}; + + event.type = V4L2_EVENT_ATOMISP_3A_STATS_READY; + event.u.frame_sync.frame_sequence = exp_id; + + v4l2_event_queue(asd->subdev.devnode, &event); +} + +static void atomisp_metadata_ready_event(struct atomisp_sub_device *asd, + enum atomisp_metadata_type md_type) +{ + struct v4l2_event event = {0}; + + event.type = V4L2_EVENT_ATOMISP_METADATA_READY; + event.u.data[0] = md_type; + + v4l2_event_queue(asd->subdev.devnode, &event); +} + +static void atomisp_reset_event(struct atomisp_sub_device *asd) +{ + struct v4l2_event event = {0}; + + event.type = V4L2_EVENT_ATOMISP_CSS_RESET; + + v4l2_event_queue(asd->subdev.devnode, &event); +} + + +static void print_csi_rx_errors(enum mipi_port_id port, + struct atomisp_device *isp) +{ + u32 infos = 0; + + atomisp_css_rx_get_irq_info(port, &infos); + + dev_err(isp->dev, "CSI Receiver port %d errors:\n", port); + if (infos & CSS_RX_IRQ_INFO_BUFFER_OVERRUN) + dev_err(isp->dev, " buffer overrun"); + if (infos & CSS_RX_IRQ_INFO_ERR_SOT) + dev_err(isp->dev, " start-of-transmission error"); + if (infos & CSS_RX_IRQ_INFO_ERR_SOT_SYNC) + dev_err(isp->dev, " start-of-transmission sync error"); + if (infos & CSS_RX_IRQ_INFO_ERR_CONTROL) + dev_err(isp->dev, " control error"); + if (infos & CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE) + dev_err(isp->dev, " 2 or more ECC errors"); + if (infos & CSS_RX_IRQ_INFO_ERR_CRC) + dev_err(isp->dev, " CRC mismatch"); + if (infos & CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID) + dev_err(isp->dev, " unknown error"); + if (infos & CSS_RX_IRQ_INFO_ERR_FRAME_SYNC) + dev_err(isp->dev, " frame sync error"); + if (infos & CSS_RX_IRQ_INFO_ERR_FRAME_DATA) + dev_err(isp->dev, " frame data error"); + if (infos & CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT) + dev_err(isp->dev, " data timeout"); + if (infos & CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC) + dev_err(isp->dev, " unknown escape command entry"); + if (infos & CSS_RX_IRQ_INFO_ERR_LINE_SYNC) + dev_err(isp->dev, " line sync error"); +} + +/* Clear irq reg */ +static void clear_irq_reg(struct atomisp_device *isp) +{ + u32 msg_ret; + pci_read_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, &msg_ret); + msg_ret |= 1 << INTR_IIR; + pci_write_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, msg_ret); +} + +static struct atomisp_sub_device * +__get_asd_from_port(struct atomisp_device *isp, enum mipi_port_id port) +{ + int i; + + /* Check which isp subdev to send eof */ + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + struct camera_mipi_info *mipi_info; + + mipi_info = atomisp_to_sensor_mipi_info( + isp->inputs[asd->input_curr].camera); + + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED && + __get_mipi_port(isp, mipi_info->port) == port) { + return asd; + } + } + + return NULL; +} + +/* interrupt handling function*/ +irqreturn_t atomisp_isr(int irq, void *dev) +{ + struct atomisp_device *isp = (struct atomisp_device *)dev; + struct atomisp_sub_device *asd; + struct atomisp_css_event eof_event; + unsigned int irq_infos = 0; + unsigned long flags; + unsigned int i; + int err; + + spin_lock_irqsave(&isp->lock, flags); + if (isp->sw_contex.power_state != ATOM_ISP_POWER_UP || + !isp->css_initialized) { + spin_unlock_irqrestore(&isp->lock, flags); + return IRQ_HANDLED; + } + err = atomisp_css_irq_translate(isp, &irq_infos); + if (err) { + spin_unlock_irqrestore(&isp->lock, flags); + return IRQ_NONE; + } + + dev_dbg(isp->dev, "irq:0x%x\n", irq_infos); + + clear_irq_reg(isp); + + if (!atomisp_streaming_count(isp) && !atomisp_is_acc_enabled(isp)) + goto out_nowake; + + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + continue; + /* + * Current SOF only support one stream, so the SOF only valid + * either solely one stream is running + */ + if (irq_infos & CSS_IRQ_INFO_CSS_RECEIVER_SOF) { + atomic_inc(&asd->sof_count); + atomisp_sof_event(asd); + + /* If sequence_temp and sequence are the same + * there where no frames lost so we can increase + * sequence_temp. + * If not then processing of frame is still in progress + * and driver needs to keep old sequence_temp value. + * NOTE: There is assumption here that ISP will not + * start processing next frame from sensor before old + * one is completely done. */ + if (atomic_read(&asd->sequence) == atomic_read( + &asd->sequence_temp)) + atomic_set(&asd->sequence_temp, + atomic_read(&asd->sof_count)); + } + if (irq_infos & CSS_IRQ_INFO_EVENTS_READY) + atomic_set(&asd->sequence, + atomic_read(&asd->sequence_temp)); + } + + if (irq_infos & CSS_IRQ_INFO_CSS_RECEIVER_SOF) + irq_infos &= ~CSS_IRQ_INFO_CSS_RECEIVER_SOF; + + if ((irq_infos & CSS_IRQ_INFO_INPUT_SYSTEM_ERROR) || + (irq_infos & CSS_IRQ_INFO_IF_ERROR)) { + /* handle mipi receiver error */ + u32 rx_infos; + enum mipi_port_id port; + + for (port = MIPI_PORT0_ID; port <= MIPI_PORT2_ID; + port++) { + print_csi_rx_errors(port, isp); + atomisp_css_rx_get_irq_info(port, &rx_infos); + atomisp_css_rx_clear_irq_info(port, rx_infos); + } + } + + if (irq_infos & IA_CSS_IRQ_INFO_ISYS_EVENTS_READY) { + while (ia_css_dequeue_isys_event(&(eof_event.event)) == + IA_CSS_SUCCESS) { + /* EOF Event does not have the css_pipe returned */ + asd = __get_asd_from_port(isp, eof_event.event.port); + if (!asd) { + dev_err(isp->dev, "%s:no subdev.event:%d", __func__, + eof_event.event.type); + continue; + } + + atomisp_eof_event(asd, eof_event.event.exp_id); + dev_dbg(isp->dev, "%s EOF exp_id %d, asd %d\n", + __func__, eof_event.event.exp_id, asd->index); + } + + irq_infos &= ~IA_CSS_IRQ_INFO_ISYS_EVENTS_READY; + if (irq_infos == 0) + goto out_nowake; + } + + spin_unlock_irqrestore(&isp->lock, flags); + + return IRQ_WAKE_THREAD; + +out_nowake: + spin_unlock_irqrestore(&isp->lock, flags); + + return IRQ_HANDLED; +} + +void atomisp_clear_css_buffer_counters(struct atomisp_sub_device *asd) +{ + int i; + memset(asd->s3a_bufs_in_css, 0, sizeof(asd->s3a_bufs_in_css)); + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) + memset(asd->metadata_bufs_in_css[i], 0, + sizeof(asd->metadata_bufs_in_css[i])); + asd->dis_bufs_in_css = 0; + asd->video_out_capture.buffers_in_css = 0; + asd->video_out_vf.buffers_in_css = 0; + asd->video_out_preview.buffers_in_css = 0; + asd->video_out_video_capture.buffers_in_css = 0; +} + +#ifndef ISP2401 +bool atomisp_buffers_queued(struct atomisp_sub_device *asd) +#else +bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe) +#endif +{ +#ifndef ISP2401 + return asd->video_out_capture.buffers_in_css || + asd->video_out_vf.buffers_in_css || + asd->video_out_preview.buffers_in_css || + asd->video_out_video_capture.buffers_in_css ? + true : false; +#else + return pipe->buffers_in_css ? true : false; +#endif +} + +/* 0x100000 is the start of dmem inside SP */ +#define SP_DMEM_BASE 0x100000 + +void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr, + unsigned int size) +{ + unsigned int data = 0; + unsigned int size32 = DIV_ROUND_UP(size, sizeof(u32)); + + dev_dbg(isp->dev, "atomisp_io_base:%p\n", atomisp_io_base); + dev_dbg(isp->dev, "%s, addr:0x%x, size: %d, size32: %d\n", __func__, + addr, size, size32); + if (size32 * 4 + addr > 0x4000) { + dev_err(isp->dev, "illegal size (%d) or addr (0x%x)\n", + size32, addr); + return; + } + addr += SP_DMEM_BASE; + do { + data = _hrt_master_port_uload_32(addr); + + dev_dbg(isp->dev, "%s, \t [0x%x]:0x%x\n", __func__, addr, data); + addr += sizeof(unsigned int); + size32 -= 1; + } while (size32 > 0); +} + +static struct videobuf_buffer *atomisp_css_frame_to_vbuf( + struct atomisp_video_pipe *pipe, struct atomisp_css_frame *frame) +{ + struct videobuf_vmalloc_memory *vm_mem; + struct atomisp_css_frame *handle; + int i; + + for (i = 0; pipe->capq.bufs[i]; i++) { + vm_mem = pipe->capq.bufs[i]->priv; + handle = vm_mem->vaddr; + if (handle && handle->data == frame->data) + return pipe->capq.bufs[i]; + } + + return NULL; +} + +static void get_buf_timestamp(struct timeval *tv) +{ + struct timespec ts; + ktime_get_ts(&ts); + tv->tv_sec = ts.tv_sec; + tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC; +} + +static void atomisp_flush_video_pipe(struct atomisp_sub_device *asd, + struct atomisp_video_pipe *pipe) +{ + unsigned long irqflags; + int i; + + if (!pipe->users) + return; + + for (i = 0; pipe->capq.bufs[i]; i++) { + spin_lock_irqsave(&pipe->irq_lock, irqflags); + if (pipe->capq.bufs[i]->state == VIDEOBUF_ACTIVE || + pipe->capq.bufs[i]->state == VIDEOBUF_QUEUED) { + get_buf_timestamp(&pipe->capq.bufs[i]->ts); + pipe->capq.bufs[i]->field_count = + atomic_read(&asd->sequence) << 1; + dev_dbg(asd->isp->dev, "release buffers on device %s\n", + pipe->vdev.name); + if (pipe->capq.bufs[i]->state == VIDEOBUF_QUEUED) + list_del_init(&pipe->capq.bufs[i]->queue); + pipe->capq.bufs[i]->state = VIDEOBUF_ERROR; + wake_up(&pipe->capq.bufs[i]->done); + } + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + } +} + +/* Returns queued buffers back to video-core */ +void atomisp_flush_bufs_and_wakeup(struct atomisp_sub_device *asd) +{ + atomisp_flush_video_pipe(asd, &asd->video_out_capture); + atomisp_flush_video_pipe(asd, &asd->video_out_vf); + atomisp_flush_video_pipe(asd, &asd->video_out_preview); + atomisp_flush_video_pipe(asd, &asd->video_out_video_capture); +} + +/* clean out the parameters that did not apply */ +void atomisp_flush_params_queue(struct atomisp_video_pipe *pipe) +{ + struct atomisp_css_params_with_list *param; + + while (!list_empty(&pipe->per_frame_params)) { + param = list_entry(pipe->per_frame_params.next, + struct atomisp_css_params_with_list, list); + list_del(¶m->list); + atomisp_free_css_parameters(¶m->params); + kvfree(param); + } +} + +/* Re-queue per-frame parameters */ +static void atomisp_recover_params_queue(struct atomisp_video_pipe *pipe) +{ + struct atomisp_css_params_with_list *param; + int i; + + for (i = 0; i < VIDEO_MAX_FRAME; i++) { + param = pipe->frame_params[i]; + if (param) + list_add_tail(¶m->list, &pipe->per_frame_params); + pipe->frame_params[i] = NULL; + } + atomisp_handle_parameter_and_buffer(pipe); +} + +/* find atomisp_video_pipe with css pipe id, buffer type and atomisp run_mode */ +static struct atomisp_video_pipe *__atomisp_get_pipe( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id, + enum atomisp_css_buffer_type buf_type) +{ + struct atomisp_device *isp = asd->isp; + + if (css_pipe_id == CSS_PIPE_ID_COPY && + isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num > 1) { + switch (stream_id) { + case ATOMISP_INPUT_STREAM_PREVIEW: + return &asd->video_out_preview; + case ATOMISP_INPUT_STREAM_POSTVIEW: + return &asd->video_out_vf; + case ATOMISP_INPUT_STREAM_VIDEO: + return &asd->video_out_video_capture; + case ATOMISP_INPUT_STREAM_CAPTURE: + default: + return &asd->video_out_capture; + } + } + + /* video is same in online as in continuouscapture mode */ + if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) { + /* + * Disable vf_pp and run CSS in still capture mode. In this + * mode, CSS does not cause extra latency with buffering, but + * scaling is not available. + */ + return &asd->video_out_capture; + } else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { + /* + * Disable vf_pp and run CSS in video mode. This allows using + * ISP scaling but it has one frame delay due to CSS internal + * buffering. + */ + return &asd->video_out_video_capture; + } else if (css_pipe_id == CSS_PIPE_ID_YUVPP) { + /* + * to SOC camera, yuvpp pipe is run for capture/video/SDV/ZSL. + */ + if (asd->continuous_mode->val) { + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + /* SDV case */ + switch (buf_type) { + case CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: + return &asd->video_out_video_capture; + case CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME: + return &asd->video_out_preview; + case CSS_BUFFER_TYPE_OUTPUT_FRAME: + return &asd->video_out_capture; + default: + return &asd->video_out_vf; + } + } else if (asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { + /* ZSL case */ + switch (buf_type) { + case CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: + return &asd->video_out_preview; + case CSS_BUFFER_TYPE_OUTPUT_FRAME: + return &asd->video_out_capture; + default: + return &asd->video_out_vf; + } + } + } else if (buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) { + switch (asd->run_mode->val) { + case ATOMISP_RUN_MODE_VIDEO: + return &asd->video_out_video_capture; + case ATOMISP_RUN_MODE_PREVIEW: + return &asd->video_out_preview; + default: + return &asd->video_out_capture; + } + } else if (buf_type == CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) { + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) + return &asd->video_out_preview; + else + return &asd->video_out_vf; + } + } else if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + /* For online video or SDV video pipe. */ + if (css_pipe_id == CSS_PIPE_ID_VIDEO || + css_pipe_id == CSS_PIPE_ID_COPY) { + if (buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) + return &asd->video_out_video_capture; + return &asd->video_out_preview; + } + } else if (asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { + /* For online preview or ZSL preview pipe. */ + if (css_pipe_id == CSS_PIPE_ID_PREVIEW || + css_pipe_id == CSS_PIPE_ID_COPY) + return &asd->video_out_preview; + } + /* For capture pipe. */ + if (buf_type == CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) + return &asd->video_out_vf; + return &asd->video_out_capture; +} + +enum atomisp_metadata_type +atomisp_get_metadata_type(struct atomisp_sub_device *asd, + enum ia_css_pipe_id pipe_id) +{ + if (!asd->continuous_mode->val) + return ATOMISP_MAIN_METADATA; + + if (pipe_id == IA_CSS_PIPE_ID_CAPTURE) /* online capture pipe */ + return ATOMISP_SEC_METADATA; + else + return ATOMISP_MAIN_METADATA; +} + +void atomisp_buf_done(struct atomisp_sub_device *asd, int error, + enum atomisp_css_buffer_type buf_type, + enum atomisp_css_pipe_id css_pipe_id, + bool q_buffers, enum atomisp_input_stream_id stream_id) +{ + struct videobuf_buffer *vb = NULL; + struct atomisp_video_pipe *pipe = NULL; + struct atomisp_css_buffer buffer; + bool requeue = false; + int err; + unsigned long irqflags; + struct atomisp_css_frame *frame = NULL; + struct atomisp_s3a_buf *s3a_buf = NULL, *_s3a_buf_tmp; + struct atomisp_dis_buf *dis_buf = NULL, *_dis_buf_tmp; + struct atomisp_metadata_buf *md_buf = NULL, *_md_buf_tmp; + enum atomisp_metadata_type md_type; + struct atomisp_device *isp = asd->isp; + struct v4l2_control ctrl; +#ifdef ISP2401 + bool reset_wdt_timer = false; +#endif + + if ( + buf_type != CSS_BUFFER_TYPE_METADATA && + buf_type != CSS_BUFFER_TYPE_3A_STATISTICS && + buf_type != CSS_BUFFER_TYPE_DIS_STATISTICS && + buf_type != CSS_BUFFER_TYPE_OUTPUT_FRAME && + buf_type != CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME && + buf_type != CSS_BUFFER_TYPE_RAW_OUTPUT_FRAME && + buf_type != CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME && + buf_type != CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) { + dev_err(isp->dev, "%s, unsupported buffer type: %d\n", + __func__, buf_type); + return; + } + + memset(&buffer, 0, sizeof(struct atomisp_css_buffer)); + buffer.css_buffer.type = buf_type; + err = atomisp_css_dequeue_buffer(asd, stream_id, css_pipe_id, + buf_type, &buffer); + if (err) { + dev_err(isp->dev, + "atomisp_css_dequeue_buffer failed: 0x%x\n", err); + return; + } + + /* need to know the atomisp pipe for frame buffers */ + pipe = __atomisp_get_pipe(asd, stream_id, css_pipe_id, buf_type); + if (pipe == NULL) { + dev_err(isp->dev, "error getting atomisp pipe\n"); + return; + } + + switch (buf_type) { + case CSS_BUFFER_TYPE_3A_STATISTICS: + list_for_each_entry_safe(s3a_buf, _s3a_buf_tmp, + &asd->s3a_stats_in_css, list) { + if (s3a_buf->s3a_data == + buffer.css_buffer.data.stats_3a) { + list_del_init(&s3a_buf->list); + list_add_tail(&s3a_buf->list, + &asd->s3a_stats_ready); + break; + } + } + + asd->s3a_bufs_in_css[css_pipe_id]--; + atomisp_3a_stats_ready_event(asd, buffer.css_buffer.exp_id); + dev_dbg(isp->dev, "%s: s3a stat with exp_id %d is ready\n", + __func__, s3a_buf->s3a_data->exp_id); + break; + case CSS_BUFFER_TYPE_METADATA: + if (error) + break; + + md_type = atomisp_get_metadata_type(asd, css_pipe_id); + list_for_each_entry_safe(md_buf, _md_buf_tmp, + &asd->metadata_in_css[md_type], list) { + if (md_buf->metadata == + buffer.css_buffer.data.metadata) { + list_del_init(&md_buf->list); + list_add_tail(&md_buf->list, + &asd->metadata_ready[md_type]); + break; + } + } + asd->metadata_bufs_in_css[stream_id][css_pipe_id]--; + atomisp_metadata_ready_event(asd, md_type); + dev_dbg(isp->dev, "%s: metadata with exp_id %d is ready\n", + __func__, md_buf->metadata->exp_id); + break; + case CSS_BUFFER_TYPE_DIS_STATISTICS: + list_for_each_entry_safe(dis_buf, _dis_buf_tmp, + &asd->dis_stats_in_css, list) { + if (dis_buf->dis_data == + buffer.css_buffer.data.stats_dvs) { + spin_lock_irqsave(&asd->dis_stats_lock, + irqflags); + list_del_init(&dis_buf->list); + list_add(&dis_buf->list, &asd->dis_stats); + asd->params.dis_proj_data_valid = true; + spin_unlock_irqrestore(&asd->dis_stats_lock, + irqflags); + break; + } + } + asd->dis_bufs_in_css--; + dev_dbg(isp->dev, "%s: dis stat with exp_id %d is ready\n", + __func__, dis_buf->dis_data->exp_id); + break; + case CSS_BUFFER_TYPE_VF_OUTPUT_FRAME: + case CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME: +#ifdef ISP2401 + reset_wdt_timer = true; +#endif + pipe->buffers_in_css--; + frame = buffer.css_buffer.data.frame; + if (!frame) { + WARN_ON(1); + break; + } + if (!frame->valid) + error = true; + + /* FIXME: + * YUVPP doesn't set postview exp_id correctlly in SDV mode. + * This is a WORKAROUND to set exp_id. see HSDES-1503911606. + */ + if (IS_BYT && buf_type == CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME && + asd->continuous_mode->val && ATOMISP_USE_YUVPP(asd)) + frame->exp_id = (asd->postview_exp_id++) % + (ATOMISP_MAX_EXP_ID + 1); + + dev_dbg(isp->dev, "%s: vf frame with exp_id %d is ready\n", + __func__, frame->exp_id); + if (asd->params.flash_state == ATOMISP_FLASH_ONGOING) { + if (frame->flash_state + == CSS_FRAME_FLASH_STATE_PARTIAL) + dev_dbg(isp->dev, "%s thumb partially flashed\n", + __func__); + else if (frame->flash_state + == CSS_FRAME_FLASH_STATE_FULL) + dev_dbg(isp->dev, "%s thumb completely flashed\n", + __func__); + else + dev_dbg(isp->dev, "%s thumb no flash in this frame\n", + __func__); + } + vb = atomisp_css_frame_to_vbuf(pipe, frame); + WARN_ON(!vb); + if (vb) + pipe->frame_config_id[vb->i] = frame->isp_config_id; + if (css_pipe_id == IA_CSS_PIPE_ID_CAPTURE && + asd->pending_capture_request > 0) { + err = atomisp_css_offline_capture_configure(asd, + asd->params.offline_parm.num_captures, + asd->params.offline_parm.skip_frames, + asd->params.offline_parm.offset); +#ifndef ISP2401 + asd->pending_capture_request--; + dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", + err); +#else + asd->pending_capture_request--; + asd->re_trigger_capture = false; + dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", + err); + } else { + asd->re_trigger_capture = true; + } +#endif + } + break; + case CSS_BUFFER_TYPE_OUTPUT_FRAME: + case CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: +#ifdef ISP2401 + reset_wdt_timer = true; +#endif + pipe->buffers_in_css--; + frame = buffer.css_buffer.data.frame; + if (!frame) { + WARN_ON(1); + break; + } + + if (!frame->valid) + error = true; + + /* FIXME: + * YUVPP doesn't set preview exp_id correctlly in ZSL mode. + * This is a WORKAROUND to set exp_id. see HSDES-1503911606. + */ + if (IS_BYT && buf_type == CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME && + asd->continuous_mode->val && ATOMISP_USE_YUVPP(asd)) + frame->exp_id = (asd->preview_exp_id++) % + (ATOMISP_MAX_EXP_ID + 1); + + dev_dbg(isp->dev, "%s: main frame with exp_id %d is ready\n", + __func__, frame->exp_id); + vb = atomisp_css_frame_to_vbuf(pipe, frame); + if (!vb) { + WARN_ON(1); + break; + } + + /* free the parameters */ + if (pipe->frame_params[vb->i]) { + if (asd->params.dvs_6axis == + pipe->frame_params[vb->i]->params.dvs_6axis) + asd->params.dvs_6axis = NULL; + atomisp_free_css_parameters( + &pipe->frame_params[vb->i]->params); + kvfree(pipe->frame_params[vb->i]); + pipe->frame_params[vb->i] = NULL; + } + + pipe->frame_config_id[vb->i] = frame->isp_config_id; + ctrl.id = V4L2_CID_FLASH_MODE; + if (asd->params.flash_state == ATOMISP_FLASH_ONGOING) { + if (frame->flash_state + == CSS_FRAME_FLASH_STATE_PARTIAL) { + asd->frame_status[vb->i] = + ATOMISP_FRAME_STATUS_FLASH_PARTIAL; + dev_dbg(isp->dev, "%s partially flashed\n", + __func__); + } else if (frame->flash_state + == CSS_FRAME_FLASH_STATE_FULL) { + asd->frame_status[vb->i] = + ATOMISP_FRAME_STATUS_FLASH_EXPOSED; + asd->params.num_flash_frames--; + dev_dbg(isp->dev, "%s completely flashed\n", + __func__); + } else { + asd->frame_status[vb->i] = + ATOMISP_FRAME_STATUS_OK; + dev_dbg(isp->dev, + "%s no flash in this frame\n", + __func__); + } + + /* Check if flashing sequence is done */ + if (asd->frame_status[vb->i] == + ATOMISP_FRAME_STATUS_FLASH_EXPOSED) + asd->params.flash_state = ATOMISP_FLASH_DONE; + } else if (isp->flash) { + if (v4l2_g_ctrl(isp->flash->ctrl_handler, &ctrl) == + 0 && ctrl.value == ATOMISP_FLASH_MODE_TORCH) { + ctrl.id = V4L2_CID_FLASH_TORCH_INTENSITY; + if (v4l2_g_ctrl(isp->flash->ctrl_handler, &ctrl) + == 0 && ctrl.value > 0) { + asd->frame_status[vb->i] = + ATOMISP_FRAME_STATUS_FLASH_EXPOSED; + } else { + asd->frame_status[vb->i] = + ATOMISP_FRAME_STATUS_OK; + } + } else + asd->frame_status[vb->i] = + ATOMISP_FRAME_STATUS_OK; + } else { + asd->frame_status[vb->i] = ATOMISP_FRAME_STATUS_OK; + } + + asd->params.last_frame_status = asd->frame_status[vb->i]; + + if (asd->continuous_mode->val) { + if (css_pipe_id == CSS_PIPE_ID_PREVIEW || + css_pipe_id == CSS_PIPE_ID_VIDEO) { + asd->latest_preview_exp_id = frame->exp_id; + } else if (css_pipe_id == + CSS_PIPE_ID_CAPTURE) { + if (asd->run_mode->val == + ATOMISP_RUN_MODE_VIDEO) + dev_dbg(isp->dev, "SDV capture raw buffer id: %u\n", + frame->exp_id); + else + dev_dbg(isp->dev, "ZSL capture raw buffer id: %u\n", + frame->exp_id); + } + } + /* + * Only after enabled the raw buffer lock + * and in continuous mode. + * in preview/video pipe, each buffer will + * be locked automatically, so record it here. + */ + if (((css_pipe_id == CSS_PIPE_ID_PREVIEW) || + (css_pipe_id == CSS_PIPE_ID_VIDEO)) && + asd->enable_raw_buffer_lock->val && + asd->continuous_mode->val) { + atomisp_set_raw_buffer_bitmap(asd, frame->exp_id); + WARN_ON(frame->exp_id > ATOMISP_MAX_EXP_ID); + } + + if (asd->params.css_update_params_needed) { + atomisp_apply_css_parameters(asd, + &asd->params.css_param); + if (asd->params.css_param.update_flag.dz_config) + atomisp_css_set_dz_config(asd, + &asd->params.css_param.dz_config); + /* New global dvs 6axis config should be blocked + * here if there's a buffer with per-frame parameters + * pending in CSS frame buffer queue. + * This is to aviod zooming vibration since global + * parameters take effect immediately while + * per-frame parameters are taken after previous + * buffers in CSS got processed. + */ + if (asd->params.dvs_6axis) + atomisp_css_set_dvs_6axis(asd, + asd->params.dvs_6axis); + else + asd->params.css_update_params_needed = false; + /* The update flag should not be cleaned here + * since it is still going to be used to make up + * following per-frame parameters. + * This will introduce more copy work since each + * time when updating global parameters, the whole + * parameter set are applied. + * FIXME: A new set of parameter copy functions can + * be added to make up per-frame parameters based on + * solid structures stored in asd->params.css_param + * instead of using shadow pointers in update flag. + */ + atomisp_css_update_isp_params(asd); + } + break; + default: + break; + } + if (vb) { + get_buf_timestamp(&vb->ts); + vb->field_count = atomic_read(&asd->sequence) << 1; + /*mark videobuffer done for dequeue*/ + spin_lock_irqsave(&pipe->irq_lock, irqflags); + vb->state = !error ? VIDEOBUF_DONE : VIDEOBUF_ERROR; + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + + /* + * Frame capture done, wake up any process block on + * current active buffer + * possibly hold by videobuf_dqbuf() + */ + wake_up(&vb->done); + } +#ifdef ISP2401 + atomic_set(&pipe->wdt_count, 0); +#endif + /* + * Requeue should only be done for 3a and dis buffers. + * Queue/dequeue order will change if driver recycles image buffers. + */ + if (requeue) { + err = atomisp_css_queue_buffer(asd, + stream_id, css_pipe_id, + buf_type, &buffer); + if (err) + dev_err(isp->dev, "%s, q to css fails: %d\n", + __func__, err); + return; + } + if (!error && q_buffers) + atomisp_qbuffers_to_css(asd); +#ifdef ISP2401 + + /* If there are no buffers queued then + * delete wdt timer. */ + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + return; + if (!atomisp_buffers_queued_pipe(pipe)) + atomisp_wdt_stop_pipe(pipe, false); + else if (reset_wdt_timer) + /* SOF irq should not reset wdt timer. */ + atomisp_wdt_refresh_pipe(pipe, + ATOMISP_WDT_KEEP_CURRENT_DELAY); +#endif +} + +void atomisp_delayed_init_work(struct work_struct *work) +{ + struct atomisp_sub_device *asd = container_of(work, + struct atomisp_sub_device, + delayed_init_work); + /* + * to SOC camera, use yuvpp pipe and no support continuous mode. + */ + if (!ATOMISP_USE_YUVPP(asd)) { + struct v4l2_event event = {0}; + + atomisp_css_allocate_continuous_frames(false, asd); + atomisp_css_update_continuous_frames(asd); + + event.type = V4L2_EVENT_ATOMISP_RAW_BUFFERS_ALLOC_DONE; + v4l2_event_queue(asd->subdev.devnode, &event); + } + + /* signal streamon after delayed init is done */ + asd->delayed_init = ATOMISP_DELAYED_INIT_DONE; + complete(&asd->init_done); +} + +static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) +{ + enum atomisp_css_pipe_id css_pipe_id; + bool stream_restart[MAX_STREAM_NUM] = {0}; + bool depth_mode = false; + int i, ret, depth_cnt = 0; + + if (!isp->sw_contex.file_input) + atomisp_css_irq_enable(isp, + CSS_IRQ_INFO_CSS_RECEIVER_SOF, false); + + BUG_ON(isp->num_of_streams > MAX_STREAM_NUM); + + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + struct ia_css_pipeline *acc_pipeline; + struct ia_css_pipe *acc_pipe = NULL; + + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED && + !asd->stream_prepared) + continue; + + /* + * AtomISP::waitStageUpdate is blocked when WDT happens. + * By calling acc_done() for all loaded fw_handles, + * HAL will be unblocked. + */ + acc_pipe = asd->stream_env[i].pipes[CSS_PIPE_ID_ACC]; + if (acc_pipe != NULL) { + acc_pipeline = ia_css_pipe_get_pipeline(acc_pipe); + if (acc_pipeline) { + struct ia_css_pipeline_stage *stage; + for (stage = acc_pipeline->stages; stage; + stage = stage->next) { + const struct ia_css_fw_info *fw; + fw = stage->firmware; + atomisp_acc_done(asd, fw->handle); + } + } + } + + depth_cnt++; + + if (asd->delayed_init == ATOMISP_DELAYED_INIT_QUEUED) + cancel_work_sync(&asd->delayed_init_work); + + complete(&asd->init_done); + asd->delayed_init = ATOMISP_DELAYED_INIT_NOT_QUEUED; + + stream_restart[asd->index] = true; + + asd->streaming = ATOMISP_DEVICE_STREAMING_STOPPING; + + /* stream off sensor */ + ret = v4l2_subdev_call( + isp->inputs[asd->input_curr]. + camera, video, s_stream, 0); + if (ret) + dev_warn(isp->dev, + "can't stop streaming on sensor!\n"); + + atomisp_acc_unload_extensions(asd); + + atomisp_clear_css_buffer_counters(asd); + + css_pipe_id = atomisp_get_css_pipe_id(asd); + atomisp_css_stop(asd, css_pipe_id, true); + + asd->streaming = ATOMISP_DEVICE_STREAMING_DISABLED; + + asd->preview_exp_id = 1; + asd->postview_exp_id = 1; + /* notify HAL the CSS reset */ + dev_dbg(isp->dev, + "send reset event to %s\n", asd->subdev.devnode->name); + atomisp_reset_event(asd); + } + + /* clear irq */ + disable_isp_irq(hrt_isp_css_irq_sp); + clear_isp_irq(hrt_isp_css_irq_sp); + + /* Set the SRSE to 3 before resetting */ + pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control | + MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK); + + /* reset ISP and restore its state */ + isp->isp_timeout = true; + atomisp_reset(isp); + isp->isp_timeout = false; + + if (!isp_timeout) { + for (i = 0; i < isp->num_of_streams; i++) { + if (isp->asd[i].depth_mode->val) + return; + } + } + + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + + if (!stream_restart[i]) + continue; + + if (isp->inputs[asd->input_curr].type != FILE_INPUT) + atomisp_css_input_set_mode(asd, + CSS_INPUT_MODE_SENSOR); + + css_pipe_id = atomisp_get_css_pipe_id(asd); + if (atomisp_css_start(asd, css_pipe_id, true)) + dev_warn(isp->dev, + "start SP failed, so do not set streaming to be enable!\n"); + else + asd->streaming = ATOMISP_DEVICE_STREAMING_ENABLED; + + atomisp_csi2_configure(asd); + } + + if (!isp->sw_contex.file_input) { + atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF, + atomisp_css_valid_sof(isp)); + + if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_AUTO, true) < 0) + dev_dbg(isp->dev, "dfs failed!\n"); + } else { + if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_MAX, true) < 0) + dev_dbg(isp->dev, "dfs failed!\n"); + } + + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd; + + asd = &isp->asd[i]; + + if (!stream_restart[i]) + continue; + + if (asd->continuous_mode->val && + asd->delayed_init == ATOMISP_DELAYED_INIT_NOT_QUEUED) { + reinit_completion(&asd->init_done); + asd->delayed_init = ATOMISP_DELAYED_INIT_QUEUED; + queue_work(asd->delayed_init_workq, + &asd->delayed_init_work); + } + /* + * dequeueing buffers is not needed. CSS will recycle + * buffers that it has. + */ + atomisp_flush_bufs_and_wakeup(asd); + + /* Requeue unprocessed per-frame parameters. */ + atomisp_recover_params_queue(&asd->video_out_capture); + atomisp_recover_params_queue(&asd->video_out_preview); + atomisp_recover_params_queue(&asd->video_out_video_capture); + + if ((asd->depth_mode->val) && + (depth_cnt == ATOMISP_DEPTH_SENSOR_STREAMON_COUNT)) { + depth_mode = true; + continue; + } + + ret = v4l2_subdev_call( + isp->inputs[asd->input_curr].camera, video, + s_stream, 1); + if (ret) + dev_warn(isp->dev, + "can't start streaming on sensor!\n"); + + } + + if (depth_mode) { + if (atomisp_stream_on_master_slave_sensor(isp, true)) + dev_warn(isp->dev, + "master slave sensor stream on failed!\n"); + } +} + +void atomisp_wdt_work(struct work_struct *work) +{ + struct atomisp_device *isp = container_of(work, struct atomisp_device, + wdt_work); + int i; +#ifdef ISP2401 + unsigned int pipe_wdt_cnt[MAX_STREAM_NUM][4] = { {0} }; + bool css_recover = true; +#endif + + rt_mutex_lock(&isp->mutex); + if (!atomisp_streaming_count(isp)) { + atomic_set(&isp->wdt_work_queued, 0); + rt_mutex_unlock(&isp->mutex); + return; + } + +#ifndef ISP2401 + dev_err(isp->dev, "timeout %d of %d\n", + atomic_read(&isp->wdt_count) + 1, + ATOMISP_ISP_MAX_TIMEOUT_COUNT); +#else + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + pipe_wdt_cnt[i][0] += + atomic_read(&asd->video_out_capture.wdt_count); + pipe_wdt_cnt[i][1] += + atomic_read(&asd->video_out_vf.wdt_count); + pipe_wdt_cnt[i][2] += + atomic_read(&asd->video_out_preview.wdt_count); + pipe_wdt_cnt[i][3] += + atomic_read(&asd->video_out_video_capture.wdt_count); + css_recover = + (pipe_wdt_cnt[i][0] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][1] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][2] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][3] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT) + ? true : false; + dev_err(isp->dev, "pipe on asd%d timeout cnt: (%d, %d, %d, %d) of %d, recover = %d\n", + asd->index, pipe_wdt_cnt[i][0], pipe_wdt_cnt[i][1], + pipe_wdt_cnt[i][2], pipe_wdt_cnt[i][3], + ATOMISP_ISP_MAX_TIMEOUT_COUNT, css_recover); + } +#endif + +#ifndef ISP2401 + if (atomic_inc_return(&isp->wdt_count) < + ATOMISP_ISP_MAX_TIMEOUT_COUNT) { +#else + if (css_recover) { +#endif + unsigned int old_dbglevel = dbg_level; + atomisp_css_debug_dump_sp_sw_debug_info(); + atomisp_css_debug_dump_debug_info(__func__); + dbg_level = old_dbglevel; + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + continue; + dev_err(isp->dev, "%s, vdev %s buffers in css: %d\n", + __func__, + asd->video_out_capture.vdev.name, + asd->video_out_capture. + buffers_in_css); + dev_err(isp->dev, + "%s, vdev %s buffers in css: %d\n", + __func__, + asd->video_out_vf.vdev.name, + asd->video_out_vf. + buffers_in_css); + dev_err(isp->dev, + "%s, vdev %s buffers in css: %d\n", + __func__, + asd->video_out_preview.vdev.name, + asd->video_out_preview. + buffers_in_css); + dev_err(isp->dev, + "%s, vdev %s buffers in css: %d\n", + __func__, + asd->video_out_video_capture.vdev.name, + asd->video_out_video_capture. + buffers_in_css); + dev_err(isp->dev, + "%s, s3a buffers in css preview pipe:%d\n", + __func__, + asd->s3a_bufs_in_css[CSS_PIPE_ID_PREVIEW]); + dev_err(isp->dev, + "%s, s3a buffers in css capture pipe:%d\n", + __func__, + asd->s3a_bufs_in_css[CSS_PIPE_ID_CAPTURE]); + dev_err(isp->dev, + "%s, s3a buffers in css video pipe:%d\n", + __func__, + asd->s3a_bufs_in_css[CSS_PIPE_ID_VIDEO]); + dev_err(isp->dev, + "%s, dis buffers in css: %d\n", + __func__, asd->dis_bufs_in_css); + dev_err(isp->dev, + "%s, metadata buffers in css preview pipe:%d\n", + __func__, + asd->metadata_bufs_in_css + [ATOMISP_INPUT_STREAM_GENERAL] + [CSS_PIPE_ID_PREVIEW]); + dev_err(isp->dev, + "%s, metadata buffers in css capture pipe:%d\n", + __func__, + asd->metadata_bufs_in_css + [ATOMISP_INPUT_STREAM_GENERAL] + [CSS_PIPE_ID_CAPTURE]); + dev_err(isp->dev, + "%s, metadata buffers in css video pipe:%d\n", + __func__, + asd->metadata_bufs_in_css + [ATOMISP_INPUT_STREAM_GENERAL] + [CSS_PIPE_ID_VIDEO]); + if (asd->enable_raw_buffer_lock->val) { + unsigned int j; + + dev_err(isp->dev, "%s, raw_buffer_locked_count %d\n", + __func__, asd->raw_buffer_locked_count); + for (j = 0; j <= ATOMISP_MAX_EXP_ID/32; j++) + dev_err(isp->dev, "%s, raw_buffer_bitmap[%d]: 0x%x\n", + __func__, j, + asd->raw_buffer_bitmap[j]); + } + } + + /*sh_css_dump_sp_state();*/ + /*sh_css_dump_isp_state();*/ + } else { + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + if (asd->streaming == + ATOMISP_DEVICE_STREAMING_ENABLED) { + atomisp_clear_css_buffer_counters(asd); + atomisp_flush_bufs_and_wakeup(asd); + complete(&asd->init_done); + } +#ifdef ISP2401 + atomisp_wdt_stop(asd, false); +#endif + } + +#ifndef ISP2401 + atomic_set(&isp->wdt_count, 0); +#endif + isp->isp_fatal_error = true; + atomic_set(&isp->wdt_work_queued, 0); + + rt_mutex_unlock(&isp->mutex); + return; + } + + __atomisp_css_recover(isp, true); +#ifdef ISP2401 + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + if (asd->streaming == + ATOMISP_DEVICE_STREAMING_ENABLED) { + atomisp_wdt_refresh(asd, + isp->sw_contex.file_input ? + ATOMISP_ISP_FILE_TIMEOUT_DURATION : + ATOMISP_ISP_TIMEOUT_DURATION); + } + } +#endif + dev_err(isp->dev, "timeout recovery handling done\n"); + atomic_set(&isp->wdt_work_queued, 0); + + rt_mutex_unlock(&isp->mutex); +} + +void atomisp_css_flush(struct atomisp_device *isp) +{ + int i; + + if (!atomisp_streaming_count(isp)) + return; + + /* Disable wdt */ + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + atomisp_wdt_stop(asd, true); + } + + /* Start recover */ + __atomisp_css_recover(isp, false); + /* Restore wdt */ + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + + if (asd->streaming != + ATOMISP_DEVICE_STREAMING_ENABLED) + continue; + + atomisp_wdt_refresh(asd, + isp->sw_contex.file_input ? + ATOMISP_ISP_FILE_TIMEOUT_DURATION : + ATOMISP_ISP_TIMEOUT_DURATION); + } + dev_dbg(isp->dev, "atomisp css flush done\n"); +} + +void atomisp_wdt(struct timer_list *t) +{ +#ifndef ISP2401 + struct atomisp_sub_device *asd = from_timer(asd, t, wdt); +#else + struct atomisp_video_pipe *pipe = from_timer(pipe, t, wdt); + struct atomisp_sub_device *asd = pipe->asd; +#endif + struct atomisp_device *isp = asd->isp; + +#ifdef ISP2401 + atomic_inc(&pipe->wdt_count); + dev_warn(isp->dev, + "[WARNING]asd %d pipe %s ISP timeout %d!\n", + asd->index, pipe->vdev.name, + atomic_read(&pipe->wdt_count)); +#endif + if (atomic_read(&isp->wdt_work_queued)) { + dev_dbg(isp->dev, "ISP watchdog was put into workqueue\n"); + return; + } + atomic_set(&isp->wdt_work_queued, 1); + queue_work(isp->wdt_work_queue, &isp->wdt_work); +} + +#ifndef ISP2401 +void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) +#else +void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, + unsigned int delay) +#endif +{ + unsigned long next; + + if (delay != ATOMISP_WDT_KEEP_CURRENT_DELAY) +#ifndef ISP2401 + asd->wdt_duration = delay; +#else + pipe->wdt_duration = delay; +#endif + +#ifndef ISP2401 + next = jiffies + asd->wdt_duration; +#else + next = jiffies + pipe->wdt_duration; +#endif + + /* Override next if it has been pushed beyon the "next" time */ +#ifndef ISP2401 + if (atomisp_is_wdt_running(asd) && time_after(asd->wdt_expires, next)) + next = asd->wdt_expires; +#else + if (atomisp_is_wdt_running(pipe) && time_after(pipe->wdt_expires, next)) + next = pipe->wdt_expires; +#endif + +#ifndef ISP2401 + asd->wdt_expires = next; +#else + pipe->wdt_expires = next; +#endif + +#ifndef ISP2401 + if (atomisp_is_wdt_running(asd)) + dev_dbg(asd->isp->dev, "WDT will hit after %d ms\n", + ((int)(next - jiffies) * 1000 / HZ)); +#else + if (atomisp_is_wdt_running(pipe)) + dev_dbg(pipe->asd->isp->dev, "WDT will hit after %d ms (%s)\n", + ((int)(next - jiffies) * 1000 / HZ), pipe->vdev.name); +#endif + else +#ifndef ISP2401 + dev_dbg(asd->isp->dev, "WDT starts with %d ms period\n", + ((int)(next - jiffies) * 1000 / HZ)); +#else + dev_dbg(pipe->asd->isp->dev, "WDT starts with %d ms period (%s)\n", + ((int)(next - jiffies) * 1000 / HZ), pipe->vdev.name); +#endif + +#ifndef ISP2401 + mod_timer(&asd->wdt, next); + atomic_set(&asd->isp->wdt_count, 0); +#else + mod_timer(&pipe->wdt, next); +#endif +} + +#ifndef ISP2401 +void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync) +#else +void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) +{ + dev_dbg(asd->isp->dev, "WDT refresh all:\n"); + if (atomisp_is_wdt_running(&asd->video_out_capture)) + atomisp_wdt_refresh_pipe(&asd->video_out_capture, delay); + if (atomisp_is_wdt_running(&asd->video_out_preview)) + atomisp_wdt_refresh_pipe(&asd->video_out_preview, delay); + if (atomisp_is_wdt_running(&asd->video_out_vf)) + atomisp_wdt_refresh_pipe(&asd->video_out_vf, delay); + if (atomisp_is_wdt_running(&asd->video_out_video_capture)) + atomisp_wdt_refresh_pipe(&asd->video_out_video_capture, delay); +} + + +void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync) +#endif +{ +#ifndef ISP2401 + dev_dbg(asd->isp->dev, "WDT stop\n"); +#else + if (!atomisp_is_wdt_running(pipe)) + return; + + dev_dbg(pipe->asd->isp->dev, + "WDT stop asd %d (%s)\n", pipe->asd->index, pipe->vdev.name); + +#endif + if (sync) { +#ifndef ISP2401 + del_timer_sync(&asd->wdt); + cancel_work_sync(&asd->isp->wdt_work); +#else + del_timer_sync(&pipe->wdt); + cancel_work_sync(&pipe->asd->isp->wdt_work); +#endif + } else { +#ifndef ISP2401 + del_timer(&asd->wdt); +#else + del_timer(&pipe->wdt); +#endif + } +} + +#ifndef ISP2401 +void atomisp_wdt_start(struct atomisp_sub_device *asd) +#else +void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync) +{ + dev_dbg(asd->isp->dev, "WDT stop all:\n"); + atomisp_wdt_stop_pipe(&asd->video_out_capture, sync); + atomisp_wdt_stop_pipe(&asd->video_out_preview, sync); + atomisp_wdt_stop_pipe(&asd->video_out_vf, sync); + atomisp_wdt_stop_pipe(&asd->video_out_video_capture, sync); +} + +void atomisp_wdt_start(struct atomisp_video_pipe *pipe) +#endif +{ +#ifndef ISP2401 + atomisp_wdt_refresh(asd, ATOMISP_ISP_TIMEOUT_DURATION); +#else + atomisp_wdt_refresh_pipe(pipe, ATOMISP_ISP_TIMEOUT_DURATION); +#endif +} + +void atomisp_setup_flash(struct atomisp_sub_device *asd) +{ + struct atomisp_device *isp = asd->isp; + struct v4l2_control ctrl; + + if (isp->flash == NULL) + return; + + if (asd->params.flash_state != ATOMISP_FLASH_REQUESTED && + asd->params.flash_state != ATOMISP_FLASH_DONE) + return; + + if (asd->params.num_flash_frames) { + /* make sure the timeout is set before setting flash mode */ + ctrl.id = V4L2_CID_FLASH_TIMEOUT; + ctrl.value = FLASH_TIMEOUT; + + if (v4l2_s_ctrl(NULL, isp->flash->ctrl_handler, &ctrl)) { + dev_err(isp->dev, "flash timeout configure failed\n"); + return; + } + + atomisp_css_request_flash(asd); + asd->params.flash_state = ATOMISP_FLASH_ONGOING; + } else { + asd->params.flash_state = ATOMISP_FLASH_IDLE; + } +} + +irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr) +{ + struct atomisp_device *isp = isp_ptr; + unsigned long flags; + bool frame_done_found[MAX_STREAM_NUM] = {0}; + bool css_pipe_done[MAX_STREAM_NUM] = {0}; + unsigned int i; + struct atomisp_sub_device *asd; + + dev_dbg(isp->dev, ">%s\n", __func__); + + spin_lock_irqsave(&isp->lock, flags); + + if (!atomisp_streaming_count(isp) && !atomisp_is_acc_enabled(isp)) { + spin_unlock_irqrestore(&isp->lock, flags); + return IRQ_HANDLED; + } + + spin_unlock_irqrestore(&isp->lock, flags); + + /* + * The standard CSS2.0 API tells the following calling sequence of + * dequeue ready buffers: + * while (ia_css_dequeue_event(...)) { + * switch (event.type) { + * ... + * ia_css_pipe_dequeue_buffer() + * } + * } + * That is, dequeue event and buffer are one after another. + * + * But the following implementation is to first deuque all the event + * to a FIFO, then process the event in the FIFO. + * This will not have issue in single stream mode, but it do have some + * issue in multiple stream case. The issue is that + * ia_css_pipe_dequeue_buffer() will not return the corrent buffer in + * a specific pipe. + * + * This is due to ia_css_pipe_dequeue_buffer() does not take the + * ia_css_pipe parameter. + * + * So: + * For CSS2.0: we change the way to not dequeue all the event at one + * time, instead, dequue one and process one, then another + */ + rt_mutex_lock(&isp->mutex); + if (atomisp_css_isr_thread(isp, frame_done_found, css_pipe_done)) + goto out; + + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + continue; + atomisp_setup_flash(asd); + + } +out: + rt_mutex_unlock(&isp->mutex); + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED + && css_pipe_done[asd->index] + && isp->sw_contex.file_input) + v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + video, s_stream, 1); + /* FIXME! FIX ACC implementation */ + if (asd->acc.pipeline && css_pipe_done[asd->index]) + atomisp_css_acc_done(asd); + } + dev_dbg(isp->dev, "<%s\n", __func__); + + return IRQ_HANDLED; +} + +/* + * utils for buffer allocation/free + */ + +int atomisp_get_frame_pgnr(struct atomisp_device *isp, + const struct atomisp_css_frame *frame, u32 *p_pgnr) +{ + if (!frame) { + dev_err(isp->dev, "%s: NULL frame pointer ERROR.\n", __func__); + return -EINVAL; + } + + *p_pgnr = DIV_ROUND_UP(frame->data_bytes, PAGE_SIZE); + return 0; +} + +/* + * Get internal fmt according to V4L2 fmt + */ +static enum atomisp_css_frame_format +v4l2_fmt_to_sh_fmt(u32 fmt) +{ + switch (fmt) { + case V4L2_PIX_FMT_YUV420: + return CSS_FRAME_FORMAT_YUV420; + case V4L2_PIX_FMT_YVU420: + return CSS_FRAME_FORMAT_YV12; + case V4L2_PIX_FMT_YUV422P: + return CSS_FRAME_FORMAT_YUV422; + case V4L2_PIX_FMT_YUV444: + return CSS_FRAME_FORMAT_YUV444; + case V4L2_PIX_FMT_NV12: + return CSS_FRAME_FORMAT_NV12; + case V4L2_PIX_FMT_NV21: + return CSS_FRAME_FORMAT_NV21; + case V4L2_PIX_FMT_NV16: + return CSS_FRAME_FORMAT_NV16; + case V4L2_PIX_FMT_NV61: + return CSS_FRAME_FORMAT_NV61; + case V4L2_PIX_FMT_UYVY: + return CSS_FRAME_FORMAT_UYVY; + case V4L2_PIX_FMT_YUYV: + return CSS_FRAME_FORMAT_YUYV; + case V4L2_PIX_FMT_RGB24: + return CSS_FRAME_FORMAT_PLANAR_RGB888; + case V4L2_PIX_FMT_RGB32: + return CSS_FRAME_FORMAT_RGBA888; + case V4L2_PIX_FMT_RGB565: + return CSS_FRAME_FORMAT_RGB565; + case V4L2_PIX_FMT_JPEG: + case V4L2_PIX_FMT_CUSTOM_M10MO_RAW: + return CSS_FRAME_FORMAT_BINARY_8; + case V4L2_PIX_FMT_SBGGR16: + case V4L2_PIX_FMT_SBGGR10: + case V4L2_PIX_FMT_SGBRG10: + case V4L2_PIX_FMT_SGRBG10: + case V4L2_PIX_FMT_SRGGB10: + case V4L2_PIX_FMT_SBGGR12: + case V4L2_PIX_FMT_SGBRG12: + case V4L2_PIX_FMT_SGRBG12: + case V4L2_PIX_FMT_SRGGB12: + case V4L2_PIX_FMT_SBGGR8: + case V4L2_PIX_FMT_SGBRG8: + case V4L2_PIX_FMT_SGRBG8: + case V4L2_PIX_FMT_SRGGB8: + return CSS_FRAME_FORMAT_RAW; + default: + return -EINVAL; + } +} +/* + * raw format match between SH format and V4L2 format + */ +static int raw_output_format_match_input(u32 input, u32 output) +{ + if ((input == CSS_FORMAT_RAW_12) && + ((output == V4L2_PIX_FMT_SRGGB12) || + (output == V4L2_PIX_FMT_SGRBG12) || + (output == V4L2_PIX_FMT_SBGGR12) || + (output == V4L2_PIX_FMT_SGBRG12))) + return 0; + + if ((input == CSS_FORMAT_RAW_10) && + ((output == V4L2_PIX_FMT_SRGGB10) || + (output == V4L2_PIX_FMT_SGRBG10) || + (output == V4L2_PIX_FMT_SBGGR10) || + (output == V4L2_PIX_FMT_SGBRG10))) + return 0; + + if ((input == CSS_FORMAT_RAW_8) && + ((output == V4L2_PIX_FMT_SRGGB8) || + (output == V4L2_PIX_FMT_SGRBG8) || + (output == V4L2_PIX_FMT_SBGGR8) || + (output == V4L2_PIX_FMT_SGBRG8))) + return 0; + + if ((input == CSS_FORMAT_RAW_16) && (output == V4L2_PIX_FMT_SBGGR16)) + return 0; + + return -EINVAL; +} + +static u32 get_pixel_depth(u32 pixelformat) +{ + switch (pixelformat) { + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_NV12: + case V4L2_PIX_FMT_NV21: + case V4L2_PIX_FMT_YVU420: + return 12; + case V4L2_PIX_FMT_YUV422P: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_NV16: + case V4L2_PIX_FMT_NV61: + case V4L2_PIX_FMT_RGB565: + case V4L2_PIX_FMT_SBGGR16: + case V4L2_PIX_FMT_SBGGR12: + case V4L2_PIX_FMT_SGBRG12: + case V4L2_PIX_FMT_SGRBG12: + case V4L2_PIX_FMT_SRGGB12: + case V4L2_PIX_FMT_SBGGR10: + case V4L2_PIX_FMT_SGBRG10: + case V4L2_PIX_FMT_SGRBG10: + case V4L2_PIX_FMT_SRGGB10: + return 16; + case V4L2_PIX_FMT_RGB24: + case V4L2_PIX_FMT_YUV444: + return 24; + case V4L2_PIX_FMT_RGB32: + return 32; + case V4L2_PIX_FMT_JPEG: + case V4L2_PIX_FMT_CUSTOM_M10MO_RAW: + case V4L2_PIX_FMT_SBGGR8: + case V4L2_PIX_FMT_SGBRG8: + case V4L2_PIX_FMT_SGRBG8: + case V4L2_PIX_FMT_SRGGB8: + return 8; + default: + return 8 * 2; /* raw type now */ + } +} + +bool atomisp_is_mbuscode_raw(uint32_t code) +{ + return code >= 0x3000 && code < 0x4000; +} + +/* + * ISP features control function + */ + +/* + * Set ISP capture mode based on current settings + */ +static void atomisp_update_capture_mode(struct atomisp_sub_device *asd) +{ + if (asd->params.gdc_cac_en) + atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_ADVANCED); + else if (asd->params.low_light) + atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_LOW_LIGHT); + else if (asd->video_out_capture.sh_fmt == CSS_FRAME_FORMAT_RAW) + atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_RAW); + else + atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_PRIMARY); +} + +#ifdef ISP2401 +int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, + struct atomisp_s_runmode *runmode) +{ + struct atomisp_device *isp = asd->isp; + struct v4l2_ctrl *c; + struct v4l2_streamparm p = {0}; + int ret = 0; + int modes[] = { CI_MODE_NONE, + CI_MODE_VIDEO, + CI_MODE_STILL_CAPTURE, + CI_MODE_CONTINUOUS, + CI_MODE_PREVIEW }; + + if (!(runmode && (runmode->mode & RUNMODE_MASK))) + return -EINVAL; + + mutex_lock(asd->ctrl_handler.lock); + c = v4l2_ctrl_find(isp->inputs[asd->input_curr].camera->ctrl_handler, + V4L2_CID_RUN_MODE); + + if (c) + ret = v4l2_ctrl_s_ctrl(c, runmode->mode); + + mutex_unlock(asd->ctrl_handler.lock); + return ret; +} + +#endif +/* + * Function to enable/disable lens geometry distortion correction (GDC) and + * chromatic aberration correction (CAC) + */ +int atomisp_gdc_cac(struct atomisp_sub_device *asd, int flag, + __s32 *value) +{ + if (flag == 0) { + *value = asd->params.gdc_cac_en; + return 0; + } + + asd->params.gdc_cac_en = !!*value; + if (asd->params.gdc_cac_en) { + atomisp_css_set_morph_table(asd, + asd->params.css_param.morph_table); + } else { + atomisp_css_set_morph_table(asd, NULL); + } + asd->params.css_update_params_needed = true; + atomisp_update_capture_mode(asd); + return 0; +} + +/* + * Function to enable/disable low light mode including ANR + */ +int atomisp_low_light(struct atomisp_sub_device *asd, int flag, + __s32 *value) +{ + if (flag == 0) { + *value = asd->params.low_light; + return 0; + } + + asd->params.low_light = (*value != 0); + atomisp_update_capture_mode(asd); + return 0; +} + +/* + * Function to enable/disable extra noise reduction (XNR) in low light + * condition + */ +int atomisp_xnr(struct atomisp_sub_device *asd, int flag, + int *xnr_enable) +{ + if (flag == 0) { + *xnr_enable = asd->params.xnr_en; + return 0; + } + + atomisp_css_capture_enable_xnr(asd, !!*xnr_enable); + + return 0; +} + +/* + * Function to configure bayer noise reduction + */ +int atomisp_nr(struct atomisp_sub_device *asd, int flag, + struct atomisp_nr_config *arg) +{ + if (flag == 0) { + /* Get nr config from current setup */ + if (atomisp_css_get_nr_config(asd, arg)) + return -EINVAL; + } else { + /* Set nr config to isp parameters */ + memcpy(&asd->params.css_param.nr_config, arg, + sizeof(struct atomisp_css_nr_config)); + atomisp_css_set_nr_config(asd, &asd->params.css_param.nr_config); + asd->params.css_update_params_needed = true; + } + return 0; +} + +/* + * Function to configure temporal noise reduction (TNR) + */ +int atomisp_tnr(struct atomisp_sub_device *asd, int flag, + struct atomisp_tnr_config *config) +{ + /* Get tnr config from current setup */ + if (flag == 0) { + /* Get tnr config from current setup */ + if (atomisp_css_get_tnr_config(asd, config)) + return -EINVAL; + } else { + /* Set tnr config to isp parameters */ + memcpy(&asd->params.css_param.tnr_config, config, + sizeof(struct atomisp_css_tnr_config)); + atomisp_css_set_tnr_config(asd, &asd->params.css_param.tnr_config); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +/* + * Function to configure black level compensation + */ +int atomisp_black_level(struct atomisp_sub_device *asd, int flag, + struct atomisp_ob_config *config) +{ + if (flag == 0) { + /* Get ob config from current setup */ + if (atomisp_css_get_ob_config(asd, config)) + return -EINVAL; + } else { + /* Set ob config to isp parameters */ + memcpy(&asd->params.css_param.ob_config, config, + sizeof(struct atomisp_css_ob_config)); + atomisp_css_set_ob_config(asd, &asd->params.css_param.ob_config); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +/* + * Function to configure edge enhancement + */ +int atomisp_ee(struct atomisp_sub_device *asd, int flag, + struct atomisp_ee_config *config) +{ + if (flag == 0) { + /* Get ee config from current setup */ + if (atomisp_css_get_ee_config(asd, config)) + return -EINVAL; + } else { + /* Set ee config to isp parameters */ + memcpy(&asd->params.css_param.ee_config, config, + sizeof(asd->params.css_param.ee_config)); + atomisp_css_set_ee_config(asd, &asd->params.css_param.ee_config); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +/* + * Function to update Gamma table for gamma, brightness and contrast config + */ +int atomisp_gamma(struct atomisp_sub_device *asd, int flag, + struct atomisp_gamma_table *config) +{ + if (flag == 0) { + /* Get gamma table from current setup */ + if (atomisp_css_get_gamma_table(asd, config)) + return -EINVAL; + } else { + /* Set gamma table to isp parameters */ + memcpy(&asd->params.css_param.gamma_table, config, + sizeof(asd->params.css_param.gamma_table)); + atomisp_css_set_gamma_table(asd, &asd->params.css_param.gamma_table); + } + + return 0; +} + +/* + * Function to update Ctc table for Chroma Enhancement + */ +int atomisp_ctc(struct atomisp_sub_device *asd, int flag, + struct atomisp_ctc_table *config) +{ + if (flag == 0) { + /* Get ctc table from current setup */ + if (atomisp_css_get_ctc_table(asd, config)) + return -EINVAL; + } else { + /* Set ctc table to isp parameters */ + memcpy(&asd->params.css_param.ctc_table, config, + sizeof(asd->params.css_param.ctc_table)); + atomisp_css_set_ctc_table(asd, &asd->params.css_param.ctc_table); + } + + return 0; +} + +/* + * Function to update gamma correction parameters + */ +int atomisp_gamma_correction(struct atomisp_sub_device *asd, int flag, + struct atomisp_gc_config *config) +{ + if (flag == 0) { + /* Get gamma correction params from current setup */ + if (atomisp_css_get_gc_config(asd, config)) + return -EINVAL; + } else { + /* Set gamma correction params to isp parameters */ + memcpy(&asd->params.css_param.gc_config, config, + sizeof(asd->params.css_param.gc_config)); + atomisp_css_set_gc_config(asd, &asd->params.css_param.gc_config); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +/* + * Function to update narrow gamma flag + */ +int atomisp_formats(struct atomisp_sub_device *asd, int flag, + struct atomisp_formats_config *config) +{ + if (flag == 0) { + /* Get narrow gamma flag from current setup */ + if (atomisp_css_get_formats_config(asd, config)) + return -EINVAL; + } else { + /* Set narrow gamma flag to isp parameters */ + memcpy(&asd->params.css_param.formats_config, config, + sizeof(asd->params.css_param.formats_config)); + atomisp_css_set_formats_config(asd, &asd->params.css_param.formats_config); + } + + return 0; +} + +void atomisp_free_internal_buffers(struct atomisp_sub_device *asd) +{ + atomisp_free_css_parameters(&asd->params.css_param); + + if (asd->raw_output_frame) { + atomisp_css_frame_free(asd->raw_output_frame); + asd->raw_output_frame = NULL; + } +} + +static void atomisp_update_grid_info(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, + int source_pad) +{ + struct atomisp_device *isp = asd->isp; + int err; + uint16_t stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + + if (atomisp_css_get_grid_info(asd, pipe_id, source_pad)) + return; + + /* We must free all buffers because they no longer match + the grid size. */ + atomisp_css_free_stat_buffers(asd); + + err = atomisp_alloc_css_stat_bufs(asd, stream_id); + if (err) { + dev_err(isp->dev, "stat_buf allocate error\n"); + goto err; + } + + if (atomisp_alloc_3a_output_buf(asd)) { + /* Failure for 3A buffers does not influence DIS buffers */ + if (asd->params.s3a_output_bytes != 0) { + /* For SOC sensor happens s3a_output_bytes == 0, + * using if condition to exclude false error log */ + dev_err(isp->dev, "Failed to allocate memory for 3A statistics\n"); + } + goto err; + } + + if (atomisp_alloc_dis_coef_buf(asd)) { + dev_err(isp->dev, + "Failed to allocate memory for DIS statistics\n"); + goto err; + } + + if (atomisp_alloc_metadata_output_buf(asd)) { + dev_err(isp->dev, "Failed to allocate memory for metadata\n"); + goto err; + } + + return; + +err: + atomisp_css_free_stat_buffers(asd); + return; +} + +static void atomisp_curr_user_grid_info(struct atomisp_sub_device *asd, + struct atomisp_grid_info *info) +{ + memcpy(info, &asd->params.curr_grid_info.s3a_grid, + sizeof(struct atomisp_css_3a_grid_info)); +} + +int atomisp_compare_grid(struct atomisp_sub_device *asd, + struct atomisp_grid_info *atomgrid) +{ + struct atomisp_grid_info tmp = {0}; + + atomisp_curr_user_grid_info(asd, &tmp); + return memcmp(atomgrid, &tmp, sizeof(tmp)); +} + +/* + * Function to update Gdc table for gdc + */ +int atomisp_gdc_cac_table(struct atomisp_sub_device *asd, int flag, + struct atomisp_morph_table *config) +{ + int ret; + int i; + struct atomisp_device *isp = asd->isp; + + if (flag == 0) { + /* Get gdc table from current setup */ + struct atomisp_css_morph_table tab = {0}; + atomisp_css_get_morph_table(asd, &tab); + + config->width = tab.width; + config->height = tab.height; + + for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { + ret = copy_to_user(config->coordinates_x[i], + tab.coordinates_x[i], tab.height * + tab.width * sizeof(*tab.coordinates_x[i])); + if (ret) { + dev_err(isp->dev, + "Failed to copy to User for x\n"); + return -EFAULT; + } + ret = copy_to_user(config->coordinates_y[i], + tab.coordinates_y[i], tab.height * + tab.width * sizeof(*tab.coordinates_y[i])); + if (ret) { + dev_err(isp->dev, + "Failed to copy to User for y\n"); + return -EFAULT; + } + } + } else { + struct atomisp_css_morph_table *tab = + asd->params.css_param.morph_table; + + /* free first if we have one */ + if (tab) { + atomisp_css_morph_table_free(tab); + asd->params.css_param.morph_table = NULL; + } + + /* allocate new one */ + tab = atomisp_css_morph_table_allocate(config->width, + config->height); + + if (!tab) { + dev_err(isp->dev, "out of memory\n"); + return -EINVAL; + } + + for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { + ret = copy_from_user(tab->coordinates_x[i], + config->coordinates_x[i], + config->height * config->width * + sizeof(*config->coordinates_x[i])); + if (ret) { + dev_err(isp->dev, + "Failed to copy from User for x, ret %d\n", + ret); + atomisp_css_morph_table_free(tab); + return -EFAULT; + } + ret = copy_from_user(tab->coordinates_y[i], + config->coordinates_y[i], + config->height * config->width * + sizeof(*config->coordinates_y[i])); + if (ret) { + dev_err(isp->dev, + "Failed to copy from User for y, ret is %d\n", + ret); + atomisp_css_morph_table_free(tab); + return -EFAULT; + } + } + asd->params.css_param.morph_table = tab; + if (asd->params.gdc_cac_en) + atomisp_css_set_morph_table(asd, tab); + } + + return 0; +} + +int atomisp_macc_table(struct atomisp_sub_device *asd, int flag, + struct atomisp_macc_config *config) +{ + struct atomisp_css_macc_table *macc_table; + + switch (config->color_effect) { + case V4L2_COLORFX_NONE: + macc_table = &asd->params.css_param.macc_table; + break; + case V4L2_COLORFX_SKY_BLUE: + macc_table = &blue_macc_table; + break; + case V4L2_COLORFX_GRASS_GREEN: + macc_table = &green_macc_table; + break; + case V4L2_COLORFX_SKIN_WHITEN_LOW: + macc_table = &skin_low_macc_table; + break; + case V4L2_COLORFX_SKIN_WHITEN: + macc_table = &skin_medium_macc_table; + break; + case V4L2_COLORFX_SKIN_WHITEN_HIGH: + macc_table = &skin_high_macc_table; + break; + default: + return -EINVAL; + } + + if (flag == 0) { + /* Get macc table from current setup */ + memcpy(&config->table, macc_table, + sizeof(struct atomisp_css_macc_table)); + } else { + memcpy(macc_table, &config->table, + sizeof(struct atomisp_css_macc_table)); + if (config->color_effect == asd->params.color_effect) + atomisp_css_set_macc_table(asd, macc_table); + } + + return 0; +} + +int atomisp_set_dis_vector(struct atomisp_sub_device *asd, + struct atomisp_dis_vector *vector) +{ + atomisp_css_video_set_dis_vector(asd, vector); + + asd->params.dis_proj_data_valid = false; + asd->params.css_update_params_needed = true; + return 0; +} + +/* + * Function to set/get image stablization statistics + */ +int atomisp_get_dis_stat(struct atomisp_sub_device *asd, + struct atomisp_dis_statistics *stats) +{ + return atomisp_css_get_dis_stat(asd, stats); +} + +/* + * Function set camrea_prefiles.xml current sensor pixel array size + */ +int atomisp_set_array_res(struct atomisp_sub_device *asd, + struct atomisp_resolution *config) +{ + dev_dbg(asd->isp->dev, ">%s start\n", __func__); + if (!config) { + dev_err(asd->isp->dev, "Set sensor array size is not valid\n"); + return -EINVAL; + } + + asd->sensor_array_res.width = config->width; + asd->sensor_array_res.height = config->height; + return 0; +} + +/* + * Function to get DVS2 BQ resolution settings + */ +int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, + struct atomisp_dvs2_bq_resolutions *bq_res) +{ + struct ia_css_pipe_config *pipe_cfg = NULL; + struct ia_css_stream_config *stream_cfg = NULL; + struct ia_css_stream_input_config *input_config = NULL; + + struct ia_css_stream *stream = + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream; + if (!stream) { + dev_warn(asd->isp->dev, "stream is not created"); + return -EAGAIN; + } + + pipe_cfg = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[CSS_PIPE_ID_VIDEO]; + stream_cfg = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config; + input_config = &stream_cfg->input_config; + + if (!bq_res) + return -EINVAL; + + /* the GDC output resolution */ + bq_res->output_bq.width_bq = pipe_cfg->output_info[0].res.width / 2; + bq_res->output_bq.height_bq = pipe_cfg->output_info[0].res.height / 2; + + bq_res->envelope_bq.width_bq = 0; + bq_res->envelope_bq.height_bq = 0; + /* the GDC input resolution */ + if (!asd->continuous_mode->val) { + bq_res->source_bq.width_bq = bq_res->output_bq.width_bq + + pipe_cfg->dvs_envelope.width / 2; + bq_res->source_bq.height_bq = bq_res->output_bq.height_bq + + pipe_cfg->dvs_envelope.height / 2; + /* + * Bad pixels caused by spatial filter processing + * ISP filter resolution should be given by CSS/FW, but for now + * there is not such API to query, and it is fixed value, so + * hardcoded here. + */ + bq_res->ispfilter_bq.width_bq = 12 / 2; + bq_res->ispfilter_bq.height_bq = 12 / 2; + /* spatial filter shift, always 4 pixels */ + bq_res->gdc_shift_bq.width_bq = 4 / 2; + bq_res->gdc_shift_bq.height_bq = 4 / 2; + + if (asd->params.video_dis_en) { + bq_res->envelope_bq.width_bq = pipe_cfg->dvs_envelope.width + / 2 - bq_res->ispfilter_bq.width_bq; + bq_res->envelope_bq.height_bq = pipe_cfg->dvs_envelope.height + / 2 - bq_res->ispfilter_bq.height_bq; + } + } else { + unsigned int w_padding; + unsigned int gdc_effective_input = 0; + + /* For GDC: + * gdc_effective_input = effective_input + envelope + * + * From the comment and formula in BZ1786, + * we see the source_bq should be: + * effective_input / bayer_ds_ratio + */ + bq_res->source_bq.width_bq = + (input_config->effective_res.width * + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width + 1) / 2; + bq_res->source_bq.height_bq = + (input_config->effective_res.height * + pipe_cfg->bayer_ds_out_res.height / + input_config->effective_res.height + 1) / 2; + + + if (!asd->params.video_dis_en) { + /* + * We adjust the ispfilter_bq to: + * ispfilter_bq = 128/BDS + * we still need firmware team to provide an offical + * formula for SDV. + */ + bq_res->ispfilter_bq.width_bq = 128 * + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width / 2; + bq_res->ispfilter_bq.height_bq = 128 * + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width / 2; + + if (IS_HWREVISION(asd->isp, ATOMISP_HW_REVISION_ISP2401)) { + /* No additional left padding for ISYS2401 */ + bq_res->gdc_shift_bq.width_bq = 4 / 2; + bq_res->gdc_shift_bq.height_bq = 4 / 2; + } else { + /* + * For the w_padding and gdc_shift_bq cacluation + * Please see the BZ 1786 and 4358 for more info. + * Just test that this formula can work now, + * but we still have no offical formula. + * + * w_padding = ceiling(gdc_effective_input + * /128, 1) * 128 - effective_width + * gdc_shift_bq = w_padding/BDS/2 + ispfilter_bq/2 + */ + gdc_effective_input = + input_config->effective_res.width + + pipe_cfg->dvs_envelope.width; + w_padding = roundup(gdc_effective_input, 128) - + input_config->effective_res.width; + w_padding = w_padding * + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width + 1; + w_padding = roundup(w_padding/2, 1); + + bq_res->gdc_shift_bq.width_bq = bq_res->ispfilter_bq.width_bq / 2 + + w_padding; + bq_res->gdc_shift_bq.height_bq = 4 / 2; + } + } else { + unsigned int dvs_w, dvs_h, dvs_w_max, dvs_h_max; + + bq_res->ispfilter_bq.width_bq = 8 / 2; + bq_res->ispfilter_bq.height_bq = 8 / 2; + + if (IS_HWREVISION(asd->isp, ATOMISP_HW_REVISION_ISP2401)) { + /* No additional left padding for ISYS2401 */ + bq_res->gdc_shift_bq.width_bq = 4 / 2; + bq_res->gdc_shift_bq.height_bq = 4 / 2; + } else { + w_padding = + roundup(input_config->effective_res.width, 128) - + input_config->effective_res.width; + if (w_padding < 12) + w_padding = 12; + bq_res->gdc_shift_bq.width_bq = 4 / 2 + + ((w_padding - 12) * + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width + 1) / 2; + bq_res->gdc_shift_bq.height_bq = 4 / 2; + } + + dvs_w = pipe_cfg->bayer_ds_out_res.width - + pipe_cfg->output_info[0].res.width; + dvs_h = pipe_cfg->bayer_ds_out_res.height - + pipe_cfg->output_info[0].res.height; + dvs_w_max = rounddown( + pipe_cfg->output_info[0].res.width / 5, + ATOM_ISP_STEP_WIDTH); + dvs_h_max = rounddown( + pipe_cfg->output_info[0].res.height / 5, + ATOM_ISP_STEP_HEIGHT); + bq_res->envelope_bq.width_bq = + min((dvs_w / 2), (dvs_w_max / 2)) - + bq_res->ispfilter_bq.width_bq; + bq_res->envelope_bq.height_bq = + min((dvs_h / 2), (dvs_h_max / 2)) - + bq_res->ispfilter_bq.height_bq; + } + } + + dev_dbg(asd->isp->dev, "source_bq.width_bq %d, source_bq.height_bq %d,\nispfilter_bq.width_bq %d, ispfilter_bq.height_bq %d,\ngdc_shift_bq.width_bq %d, gdc_shift_bq.height_bq %d,\nenvelope_bq.width_bq %d, envelope_bq.height_bq %d,\noutput_bq.width_bq %d, output_bq.height_bq %d\n", + bq_res->source_bq.width_bq, bq_res->source_bq.height_bq, + bq_res->ispfilter_bq.width_bq, bq_res->ispfilter_bq.height_bq, + bq_res->gdc_shift_bq.width_bq, bq_res->gdc_shift_bq.height_bq, + bq_res->envelope_bq.width_bq, bq_res->envelope_bq.height_bq, + bq_res->output_bq.width_bq, bq_res->output_bq.height_bq); + + return 0; +} + +int atomisp_set_dis_coefs(struct atomisp_sub_device *asd, + struct atomisp_dis_coefficients *coefs) +{ + return atomisp_css_set_dis_coefs(asd, coefs); +} + +/* + * Function to set/get 3A stat from isp + */ +int atomisp_3a_stat(struct atomisp_sub_device *asd, int flag, + struct atomisp_3a_statistics *config) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_s3a_buf *s3a_buf; + unsigned long ret; + + if (flag != 0) + return -EINVAL; + + /* sanity check to avoid writing into unallocated memory. */ + if (asd->params.s3a_output_bytes == 0) + return -EINVAL; + + if (atomisp_compare_grid(asd, &config->grid_info) != 0) { + /* If the grid info in the argument differs from the current + grid info, we tell the caller to reset the grid size and + try again. */ + return -EAGAIN; + } + + if (list_empty(&asd->s3a_stats_ready)) { + dev_err(isp->dev, "3a statistics is not valid.\n"); + return -EAGAIN; + } + + s3a_buf = list_entry(asd->s3a_stats_ready.next, + struct atomisp_s3a_buf, list); + if (s3a_buf->s3a_map) + ia_css_translate_3a_statistics( + asd->params.s3a_user_stat, s3a_buf->s3a_map); + else + ia_css_get_3a_statistics(asd->params.s3a_user_stat, + s3a_buf->s3a_data); + + config->exp_id = s3a_buf->s3a_data->exp_id; + config->isp_config_id = s3a_buf->s3a_data->isp_config_id; + + ret = copy_to_user(config->data, asd->params.s3a_user_stat->data, + asd->params.s3a_output_bytes); + if (ret) { + dev_err(isp->dev, "copy to user failed: copied %lu bytes\n", + ret); + return -EFAULT; + } + + /* Move to free buffer list */ + list_del_init(&s3a_buf->list); + list_add_tail(&s3a_buf->list, &asd->s3a_stats); + dev_dbg(isp->dev, "%s: finish getting exp_id %d 3a stat, isp_config_id %d\n", __func__, + config->exp_id, config->isp_config_id); + return 0; +} + +int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag, + struct atomisp_metadata *md) +{ + struct atomisp_device *isp = asd->isp; + struct ia_css_stream_config *stream_config; + struct ia_css_stream_info *stream_info; + struct camera_mipi_info *mipi_info; + struct atomisp_metadata_buf *md_buf; + enum atomisp_metadata_type md_type = ATOMISP_MAIN_METADATA; + int ret, i; + + if (flag != 0) + return -EINVAL; + + stream_config = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + stream_config; + stream_info = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + stream_info; + + /* We always return the resolution and stride even if there is + * no valid metadata. This allows the caller to get the information + * needed to allocate user-space buffers. */ + md->width = stream_info->metadata_info.resolution.width; + md->height = stream_info->metadata_info.resolution.height; + md->stride = stream_info->metadata_info.stride; + + /* sanity check to avoid writing into unallocated memory. + * This does not return an error because it is a valid way + * for applications to detect that metadata is not enabled. */ + if (md->width == 0 || md->height == 0 || !md->data) + return 0; + + /* This is done in the atomisp_buf_done() */ + if (list_empty(&asd->metadata_ready[md_type])) { + dev_warn(isp->dev, "Metadata queue is empty now!\n"); + return -EAGAIN; + } + + mipi_info = atomisp_to_sensor_mipi_info( + isp->inputs[asd->input_curr].camera); + if (mipi_info == NULL) + return -EINVAL; + + if (mipi_info->metadata_effective_width != NULL) { + for (i = 0; i < md->height; i++) + md->effective_width[i] = + mipi_info->metadata_effective_width[i]; + } + + md_buf = list_entry(asd->metadata_ready[md_type].next, + struct atomisp_metadata_buf, list); + md->exp_id = md_buf->metadata->exp_id; + if (md_buf->md_vptr) { + ret = copy_to_user(md->data, + md_buf->md_vptr, + stream_info->metadata_info.size); + } else { + hmm_load(md_buf->metadata->address, + asd->params.metadata_user[md_type], + stream_info->metadata_info.size); + + ret = copy_to_user(md->data, + asd->params.metadata_user[md_type], + stream_info->metadata_info.size); + } + if (ret) { + dev_err(isp->dev, "copy to user failed: copied %d bytes\n", + ret); + return -EFAULT; + } + + list_del_init(&md_buf->list); + list_add_tail(&md_buf->list, &asd->metadata[md_type]); + + dev_dbg(isp->dev, "%s: HAL de-queued metadata type %d with exp_id %d\n", + __func__, md_type, md->exp_id); + return 0; +} + +int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag, + struct atomisp_metadata_with_type *md) +{ + struct atomisp_device *isp = asd->isp; + struct ia_css_stream_config *stream_config; + struct ia_css_stream_info *stream_info; + struct camera_mipi_info *mipi_info; + struct atomisp_metadata_buf *md_buf; + enum atomisp_metadata_type md_type; + int ret, i; + + if (flag != 0) + return -EINVAL; + + stream_config = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + stream_config; + stream_info = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + stream_info; + + /* We always return the resolution and stride even if there is + * no valid metadata. This allows the caller to get the information + * needed to allocate user-space buffers. */ + md->width = stream_info->metadata_info.resolution.width; + md->height = stream_info->metadata_info.resolution.height; + md->stride = stream_info->metadata_info.stride; + + /* sanity check to avoid writing into unallocated memory. + * This does not return an error because it is a valid way + * for applications to detect that metadata is not enabled. */ + if (md->width == 0 || md->height == 0 || !md->data) + return 0; + + md_type = md->type; + if (md_type < 0 || md_type >= ATOMISP_METADATA_TYPE_NUM) + return -EINVAL; + + /* This is done in the atomisp_buf_done() */ + if (list_empty(&asd->metadata_ready[md_type])) { + dev_warn(isp->dev, "Metadata queue is empty now!\n"); + return -EAGAIN; + } + + mipi_info = atomisp_to_sensor_mipi_info( + isp->inputs[asd->input_curr].camera); + if (mipi_info == NULL) + return -EINVAL; + + if (mipi_info->metadata_effective_width != NULL) { + for (i = 0; i < md->height; i++) + md->effective_width[i] = + mipi_info->metadata_effective_width[i]; + } + + md_buf = list_entry(asd->metadata_ready[md_type].next, + struct atomisp_metadata_buf, list); + md->exp_id = md_buf->metadata->exp_id; + if (md_buf->md_vptr) { + ret = copy_to_user(md->data, + md_buf->md_vptr, + stream_info->metadata_info.size); + } else { + hmm_load(md_buf->metadata->address, + asd->params.metadata_user[md_type], + stream_info->metadata_info.size); + + ret = copy_to_user(md->data, + asd->params.metadata_user[md_type], + stream_info->metadata_info.size); + } + if (ret) { + dev_err(isp->dev, "copy to user failed: copied %d bytes\n", + ret); + return -EFAULT; + } else { + list_del_init(&md_buf->list); + list_add_tail(&md_buf->list, &asd->metadata[md_type]); + } + dev_dbg(isp->dev, "%s: HAL de-queued metadata type %d with exp_id %d\n", + __func__, md_type, md->exp_id); + return 0; +} + +/* + * Function to calculate real zoom region for every pipe + */ +int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, + struct ia_css_dz_config *dz_config, + enum atomisp_css_pipe_id css_pipe_id) + +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + struct atomisp_resolution eff_res, out_res; +#ifdef ISP2401 + int w_offset, h_offset; +#endif + + memset(&eff_res, 0, sizeof(eff_res)); + memset(&out_res, 0, sizeof(out_res)); + + if (dz_config->dx || dz_config->dy) + return 0; + + if (css_pipe_id != IA_CSS_PIPE_ID_PREVIEW + && css_pipe_id != IA_CSS_PIPE_ID_CAPTURE) { + dev_err(asd->isp->dev, "%s the set pipe no support crop region" + , __func__); + return -EINVAL; + } + + eff_res.width = + stream_env->stream_config.input_config.effective_res.width; + eff_res.height = + stream_env->stream_config.input_config.effective_res.height; + if (eff_res.width == 0 || eff_res.height == 0) { + dev_err(asd->isp->dev, "%s err effective resolution" + , __func__); + return -EINVAL; + } + + if (dz_config->zoom_region.resolution.width + == asd->sensor_array_res.width + || dz_config->zoom_region.resolution.height + == asd->sensor_array_res.height) { + /*no need crop region*/ + dz_config->zoom_region.origin.x = 0; + dz_config->zoom_region.origin.y = 0; + dz_config->zoom_region.resolution.width = eff_res.width; + dz_config->zoom_region.resolution.height = eff_res.height; + return 0; + } + + /* FIXME: + * This is not the correct implementation with Google's definition, due + * to firmware limitation. + * map real crop region base on above calculating base max crop region. + */ +#ifdef ISP2401 + out_res.width = + stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; + out_res.height = + stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; + if (out_res.width == 0 || out_res.height == 0) { + dev_err(asd->isp->dev, "%s err current pipe output resolution" + , __func__); + return -EINVAL; + } + + if (asd->sensor_array_res.width * out_res.height + < out_res.width * asd->sensor_array_res.height) { + h_offset = asd->sensor_array_res.height - + asd->sensor_array_res.width + * out_res.height / out_res.width; + h_offset = h_offset / 2; + if (dz_config->zoom_region.origin.y < h_offset) + dz_config->zoom_region.origin.y = 0; + else + dz_config->zoom_region.origin.y = + dz_config->zoom_region.origin.y - h_offset; + w_offset = 0; + } else { + w_offset = asd->sensor_array_res.width - + asd->sensor_array_res.height + * out_res.width / out_res.height; + w_offset = w_offset / 2; + if (dz_config->zoom_region.origin.x < w_offset) + dz_config->zoom_region.origin.x = 0; + else + dz_config->zoom_region.origin.x = + dz_config->zoom_region.origin.x - w_offset; + h_offset = 0; + } +#endif + dz_config->zoom_region.origin.x = + dz_config->zoom_region.origin.x + * eff_res.width +#ifndef ISP2401 + / asd->sensor_array_res.width; +#else + / (asd->sensor_array_res.width - + 2 * w_offset); +#endif + dz_config->zoom_region.origin.y = + dz_config->zoom_region.origin.y + * eff_res.height +#ifndef ISP2401 + / asd->sensor_array_res.height; +#else + / (asd->sensor_array_res.height - + 2 * h_offset); +#endif + dz_config->zoom_region.resolution.width = + dz_config->zoom_region.resolution.width + * eff_res.width +#ifndef ISP2401 + / asd->sensor_array_res.width; +#else + / (asd->sensor_array_res.width - + 2 * w_offset); +#endif + dz_config->zoom_region.resolution.height = + dz_config->zoom_region.resolution.height + * eff_res.height +#ifndef ISP2401 + / asd->sensor_array_res.height; +#else + / (asd->sensor_array_res.height - + 2 * h_offset); +#endif + + /* + * Set same ratio of crop region resolution and current pipe output + * resolution + */ +#ifndef ISP2401 + out_res.width = + stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; + out_res.height = + stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; + if (out_res.width == 0 || out_res.height == 0) { + dev_err(asd->isp->dev, "%s err current pipe output resolution" + , __func__); + return -EINVAL; + } + +#endif + if (out_res.width * dz_config->zoom_region.resolution.height + > dz_config->zoom_region.resolution.width * out_res.height) { + dz_config->zoom_region.resolution.height = + dz_config->zoom_region.resolution.width + * out_res.height / out_res.width; + } else { + dz_config->zoom_region.resolution.width = + dz_config->zoom_region.resolution.height + * out_res.width / out_res.height; + } + dev_dbg(asd->isp->dev, "%s crop region:(%d,%d),(%d,%d) eff_res(%d, %d) array_size(%d,%d) out_res(%d, %d)\n", + __func__, dz_config->zoom_region.origin.x, + dz_config->zoom_region.origin.y, + dz_config->zoom_region.resolution.width, + dz_config->zoom_region.resolution.height, + eff_res.width, eff_res.height, + asd->sensor_array_res.width, + asd->sensor_array_res.height, + out_res.width, out_res.height); + + + if ((dz_config->zoom_region.origin.x + + dz_config->zoom_region.resolution.width + > eff_res.width) || + (dz_config->zoom_region.origin.y + + dz_config->zoom_region.resolution.height + > eff_res.height)) + return -EINVAL; + + return 0; +} + + +/* + * Function to check the zoom region whether is effective + */ +static bool atomisp_check_zoom_region( + struct atomisp_sub_device *asd, + struct ia_css_dz_config *dz_config) +{ + struct atomisp_resolution config; + bool flag = false; + unsigned int w , h; + + memset(&config, 0, sizeof(struct atomisp_resolution)); + + if (dz_config->dx && dz_config->dy) + return true; + + config.width = asd->sensor_array_res.width; + config.height = asd->sensor_array_res.height; + w = dz_config->zoom_region.origin.x + + dz_config->zoom_region.resolution.width; + h = dz_config->zoom_region.origin.y + + dz_config->zoom_region.resolution.height; + + if ((w <= config.width) && (h <= config.height) && w > 0 && h > 0) + flag = true; + else + /* setting error zoom region */ + dev_err(asd->isp->dev, "%s zoom region ERROR:dz_config:(%d,%d),(%d,%d)array_res(%d, %d)\n", + __func__, dz_config->zoom_region.origin.x, + dz_config->zoom_region.origin.y, + dz_config->zoom_region.resolution.width, + dz_config->zoom_region.resolution.height, + config.width, config.height); + + return flag; +} + +void atomisp_apply_css_parameters( + struct atomisp_sub_device *asd, + struct atomisp_css_params *css_param) +{ + if (css_param->update_flag.wb_config) + atomisp_css_set_wb_config(asd, &css_param->wb_config); + + if (css_param->update_flag.ob_config) + atomisp_css_set_ob_config(asd, &css_param->ob_config); + + if (css_param->update_flag.dp_config) + atomisp_css_set_dp_config(asd, &css_param->dp_config); + + if (css_param->update_flag.nr_config) + atomisp_css_set_nr_config(asd, &css_param->nr_config); + + if (css_param->update_flag.ee_config) + atomisp_css_set_ee_config(asd, &css_param->ee_config); + + if (css_param->update_flag.tnr_config) + atomisp_css_set_tnr_config(asd, &css_param->tnr_config); + + if (css_param->update_flag.a3a_config) + atomisp_css_set_3a_config(asd, &css_param->s3a_config); + + if (css_param->update_flag.ctc_config) + atomisp_css_set_ctc_config(asd, &css_param->ctc_config); + + if (css_param->update_flag.cnr_config) + atomisp_css_set_cnr_config(asd, &css_param->cnr_config); + + if (css_param->update_flag.ecd_config) + atomisp_css_set_ecd_config(asd, &css_param->ecd_config); + + if (css_param->update_flag.ynr_config) + atomisp_css_set_ynr_config(asd, &css_param->ynr_config); + + if (css_param->update_flag.fc_config) + atomisp_css_set_fc_config(asd, &css_param->fc_config); + + if (css_param->update_flag.macc_config) + atomisp_css_set_macc_config(asd, &css_param->macc_config); + + if (css_param->update_flag.aa_config) + atomisp_css_set_aa_config(asd, &css_param->aa_config); + + if (css_param->update_flag.anr_config) + atomisp_css_set_anr_config(asd, &css_param->anr_config); + + if (css_param->update_flag.xnr_config) + atomisp_css_set_xnr_config(asd, &css_param->xnr_config); + + if (css_param->update_flag.yuv2rgb_cc_config) + atomisp_css_set_yuv2rgb_cc_config(asd, + &css_param->yuv2rgb_cc_config); + + if (css_param->update_flag.rgb2yuv_cc_config) + atomisp_css_set_rgb2yuv_cc_config(asd, + &css_param->rgb2yuv_cc_config); + + if (css_param->update_flag.macc_table) + atomisp_css_set_macc_table(asd, &css_param->macc_table); + + if (css_param->update_flag.xnr_table) + atomisp_css_set_xnr_table(asd, &css_param->xnr_table); + + if (css_param->update_flag.r_gamma_table) + atomisp_css_set_r_gamma_table(asd, &css_param->r_gamma_table); + + if (css_param->update_flag.g_gamma_table) + atomisp_css_set_g_gamma_table(asd, &css_param->g_gamma_table); + + if (css_param->update_flag.b_gamma_table) + atomisp_css_set_b_gamma_table(asd, &css_param->b_gamma_table); + + if (css_param->update_flag.anr_thres) + atomisp_css_set_anr_thres(asd, &css_param->anr_thres); + + if (css_param->update_flag.shading_table) + atomisp_css_set_shading_table(asd, css_param->shading_table); + + if (css_param->update_flag.morph_table && asd->params.gdc_cac_en) + atomisp_css_set_morph_table(asd, css_param->morph_table); + + if (css_param->update_flag.dvs2_coefs) { + struct atomisp_css_dvs_grid_info *dvs_grid_info = + atomisp_css_get_dvs_grid_info( + &asd->params.curr_grid_info); + + if (dvs_grid_info && dvs_grid_info->enable) + atomisp_css_set_dvs2_coefs(asd, css_param->dvs2_coeff); + } + + if (css_param->update_flag.dvs_6axis_config) + atomisp_css_set_dvs_6axis(asd, css_param->dvs_6axis); + + atomisp_css_set_isp_config_id(asd, css_param->isp_config_id); + /* + * These configurations are on used by ISP1.x, not for ISP2.x, + * so do not handle them. see comments of ia_css_isp_config. + * 1 cc_config + * 2 ce_config + * 3 de_config + * 4 gc_config + * 5 gamma_table + * 6 ctc_table + * 7 dvs_coefs + */ +} + +static unsigned int long copy_from_compatible(void *to, const void *from, + unsigned long n, bool from_user) +{ + if (from_user) + return copy_from_user(to, (void __user *)from, n); + else + memcpy(to, from, n); + return 0; +} + +int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, + struct atomisp_parameters *arg, + struct atomisp_css_params *css_param, + bool from_user) +{ + struct atomisp_parameters *cur_config = &css_param->update_flag; + + if (!arg || !asd || !css_param) + return -EINVAL; + + if (arg->wb_config && (from_user || !cur_config->wb_config)) { + if (copy_from_compatible(&css_param->wb_config, arg->wb_config, + sizeof(struct atomisp_css_wb_config), + from_user)) + return -EFAULT; + css_param->update_flag.wb_config = + (struct atomisp_wb_config *) &css_param->wb_config; + } + + if (arg->ob_config && (from_user || !cur_config->ob_config)) { + if (copy_from_compatible(&css_param->ob_config, arg->ob_config, + sizeof(struct atomisp_css_ob_config), + from_user)) + return -EFAULT; + css_param->update_flag.ob_config = + (struct atomisp_ob_config *) &css_param->ob_config; + } + + if (arg->dp_config && (from_user || !cur_config->dp_config)) { + if (copy_from_compatible(&css_param->dp_config, arg->dp_config, + sizeof(struct atomisp_css_dp_config), + from_user)) + return -EFAULT; + css_param->update_flag.dp_config = + (struct atomisp_dp_config *) &css_param->dp_config; + } + + if (asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { + if (arg->dz_config && (from_user || !cur_config->dz_config)) { + if (copy_from_compatible(&css_param->dz_config, + arg->dz_config, + sizeof(struct atomisp_css_dz_config), + from_user)) + return -EFAULT; + if (!atomisp_check_zoom_region(asd, + &css_param->dz_config)) { + dev_err(asd->isp->dev, "crop region error!"); + return -EINVAL; + } + css_param->update_flag.dz_config = + (struct atomisp_dz_config *) + &css_param->dz_config; + } + } + + if (arg->nr_config && (from_user || !cur_config->nr_config)) { + if (copy_from_compatible(&css_param->nr_config, arg->nr_config, + sizeof(struct atomisp_css_nr_config), + from_user)) + return -EFAULT; + css_param->update_flag.nr_config = + (struct atomisp_nr_config *) &css_param->nr_config; + } + + if (arg->ee_config && (from_user || !cur_config->ee_config)) { + if (copy_from_compatible(&css_param->ee_config, arg->ee_config, + sizeof(struct atomisp_css_ee_config), + from_user)) + return -EFAULT; + css_param->update_flag.ee_config = + (struct atomisp_ee_config *) &css_param->ee_config; + } + + if (arg->tnr_config && (from_user || !cur_config->tnr_config)) { + if (copy_from_compatible(&css_param->tnr_config, + arg->tnr_config, + sizeof(struct atomisp_css_tnr_config), + from_user)) + return -EFAULT; + css_param->update_flag.tnr_config = + (struct atomisp_tnr_config *) + &css_param->tnr_config; + } + + if (arg->a3a_config && (from_user || !cur_config->a3a_config)) { + if (copy_from_compatible(&css_param->s3a_config, + arg->a3a_config, + sizeof(struct atomisp_css_3a_config), + from_user)) + return -EFAULT; + css_param->update_flag.a3a_config = + (struct atomisp_3a_config *) &css_param->s3a_config; + } + + if (arg->ctc_config && (from_user || !cur_config->ctc_config)) { + if (copy_from_compatible(&css_param->ctc_config, + arg->ctc_config, + sizeof(struct atomisp_css_ctc_config), + from_user)) + return -EFAULT; + css_param->update_flag.ctc_config = + (struct atomisp_ctc_config *) + &css_param->ctc_config; + } + + if (arg->cnr_config && (from_user || !cur_config->cnr_config)) { + if (copy_from_compatible(&css_param->cnr_config, + arg->cnr_config, + sizeof(struct atomisp_css_cnr_config), + from_user)) + return -EFAULT; + css_param->update_flag.cnr_config = + (struct atomisp_cnr_config *) + &css_param->cnr_config; + } + + if (arg->ecd_config && (from_user || !cur_config->ecd_config)) { + if (copy_from_compatible(&css_param->ecd_config, + arg->ecd_config, + sizeof(struct atomisp_css_ecd_config), + from_user)) + return -EFAULT; + css_param->update_flag.ecd_config = + (struct atomisp_ecd_config *) + &css_param->ecd_config; + } + + if (arg->ynr_config && (from_user || !cur_config->ynr_config)) { + if (copy_from_compatible(&css_param->ynr_config, + arg->ynr_config, + sizeof(struct atomisp_css_ynr_config), + from_user)) + return -EFAULT; + css_param->update_flag.ynr_config = + (struct atomisp_ynr_config *) + &css_param->ynr_config; + } + + if (arg->fc_config && (from_user || !cur_config->fc_config)) { + if (copy_from_compatible(&css_param->fc_config, + arg->fc_config, + sizeof(struct atomisp_css_fc_config), + from_user)) + return -EFAULT; + css_param->update_flag.fc_config = + (struct atomisp_fc_config *) &css_param->fc_config; + } + + if (arg->macc_config && (from_user || !cur_config->macc_config)) { + if (copy_from_compatible(&css_param->macc_config, + arg->macc_config, + sizeof(struct atomisp_css_macc_config), + from_user)) + return -EFAULT; + css_param->update_flag.macc_config = + (struct atomisp_macc_config *) + &css_param->macc_config; + } + + if (arg->aa_config && (from_user || !cur_config->aa_config)) { + if (copy_from_compatible(&css_param->aa_config, arg->aa_config, + sizeof(struct atomisp_css_aa_config), + from_user)) + return -EFAULT; + css_param->update_flag.aa_config = + (struct atomisp_aa_config *) &css_param->aa_config; + } + + if (arg->anr_config && (from_user || !cur_config->anr_config)) { + if (copy_from_compatible(&css_param->anr_config, + arg->anr_config, + sizeof(struct atomisp_css_anr_config), + from_user)) + return -EFAULT; + css_param->update_flag.anr_config = + (struct atomisp_anr_config *) + &css_param->anr_config; + } + + if (arg->xnr_config && (from_user || !cur_config->xnr_config)) { + if (copy_from_compatible(&css_param->xnr_config, + arg->xnr_config, + sizeof(struct atomisp_css_xnr_config), + from_user)) + return -EFAULT; + css_param->update_flag.xnr_config = + (struct atomisp_xnr_config *) + &css_param->xnr_config; + } + + if (arg->yuv2rgb_cc_config && + (from_user || !cur_config->yuv2rgb_cc_config)) { + if (copy_from_compatible(&css_param->yuv2rgb_cc_config, + arg->yuv2rgb_cc_config, + sizeof(struct atomisp_css_cc_config), + from_user)) + return -EFAULT; + css_param->update_flag.yuv2rgb_cc_config = + (struct atomisp_cc_config *) + &css_param->yuv2rgb_cc_config; + } + + if (arg->rgb2yuv_cc_config && + (from_user || !cur_config->rgb2yuv_cc_config)) { + if (copy_from_compatible(&css_param->rgb2yuv_cc_config, + arg->rgb2yuv_cc_config, + sizeof(struct atomisp_css_cc_config), + from_user)) + return -EFAULT; + css_param->update_flag.rgb2yuv_cc_config = + (struct atomisp_cc_config *) + &css_param->rgb2yuv_cc_config; + } + + if (arg->macc_table && (from_user || !cur_config->macc_table)) { + if (copy_from_compatible(&css_param->macc_table, + arg->macc_table, + sizeof(struct atomisp_css_macc_table), + from_user)) + return -EFAULT; + css_param->update_flag.macc_table = + (struct atomisp_macc_table *) + &css_param->macc_table; + } + + if (arg->xnr_table && (from_user || !cur_config->xnr_table)) { + if (copy_from_compatible(&css_param->xnr_table, + arg->xnr_table, + sizeof(struct atomisp_css_xnr_table), + from_user)) + return -EFAULT; + css_param->update_flag.xnr_table = + (struct atomisp_xnr_table *) &css_param->xnr_table; + } + + if (arg->r_gamma_table && (from_user || !cur_config->r_gamma_table)) { + if (copy_from_compatible(&css_param->r_gamma_table, + arg->r_gamma_table, + sizeof(struct atomisp_css_rgb_gamma_table), + from_user)) + return -EFAULT; + css_param->update_flag.r_gamma_table = + (struct atomisp_rgb_gamma_table *) + &css_param->r_gamma_table; + } + + if (arg->g_gamma_table && (from_user || !cur_config->g_gamma_table)) { + if (copy_from_compatible(&css_param->g_gamma_table, + arg->g_gamma_table, + sizeof(struct atomisp_css_rgb_gamma_table), + from_user)) + return -EFAULT; + css_param->update_flag.g_gamma_table = + (struct atomisp_rgb_gamma_table *) + &css_param->g_gamma_table; + } + + if (arg->b_gamma_table && (from_user || !cur_config->b_gamma_table)) { + if (copy_from_compatible(&css_param->b_gamma_table, + arg->b_gamma_table, + sizeof(struct atomisp_css_rgb_gamma_table), + from_user)) + return -EFAULT; + css_param->update_flag.b_gamma_table = + (struct atomisp_rgb_gamma_table *) + &css_param->b_gamma_table; + } + + if (arg->anr_thres && (from_user || !cur_config->anr_thres)) { + if (copy_from_compatible(&css_param->anr_thres, arg->anr_thres, + sizeof(struct atomisp_css_anr_thres), + from_user)) + return -EFAULT; + css_param->update_flag.anr_thres = + (struct atomisp_anr_thres *) &css_param->anr_thres; + } + + if (from_user) + css_param->isp_config_id = arg->isp_config_id; + /* + * These configurations are on used by ISP1.x, not for ISP2.x, + * so do not handle them. see comments of ia_css_isp_config. + * 1 cc_config + * 2 ce_config + * 3 de_config + * 4 gc_config + * 5 gamma_table + * 6 ctc_table + * 7 dvs_coefs + */ + return 0; +} + +int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, + struct atomisp_shading_table *source_st, + struct atomisp_css_params *css_param, + bool from_user) +{ + unsigned int i; + unsigned int len_table; + struct atomisp_css_shading_table *shading_table; + struct atomisp_css_shading_table *old_table; +#ifdef ISP2401 + struct atomisp_shading_table st; +#endif + + if (!source_st) + return 0; + + if (!css_param) + return -EINVAL; + + if (!from_user && css_param->update_flag.shading_table) + return 0; + +#ifdef ISP2401 + if (copy_from_compatible(&st, source_st, + sizeof(struct atomisp_shading_table), + from_user)) { + dev_err(asd->isp->dev, "copy shading table failed!"); + return -EFAULT; + } + +#endif + old_table = css_param->shading_table; + +#ifdef ISP2401 + +#endif + /* user config is to disable the shading table. */ +#ifndef ISP2401 + if (!source_st->enable) { +#else + if (!st.enable) { +#endif + /* Generate a minimum table with enable = 0. */ + shading_table = atomisp_css_shading_table_alloc(1, 1); + if (!shading_table) + return -ENOMEM; + shading_table->enable = 0; + goto set_lsc; + } + + /* Setting a new table. Validate first - all tables must be set */ + for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { +#ifndef ISP2401 + if (!source_st->data[i]) +#else + if (!st.data[i]) { + dev_err(asd->isp->dev, "shading table validate failed"); +#endif + return -EINVAL; +#ifdef ISP2401 + } +#endif + } + + /* Shading table size per color */ +#ifndef ISP2401 + if (source_st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + source_st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) +#else + if (st.width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + st.height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { + dev_err(asd->isp->dev, "shading table w/h validate failed!"); +#endif + return -EINVAL; +#ifdef ISP2401 + } +#endif + +#ifndef ISP2401 + shading_table = atomisp_css_shading_table_alloc(source_st->width, + source_st->height); + if (!shading_table) + return -ENOMEM; +#else + shading_table = atomisp_css_shading_table_alloc(st.width, + st.height); + if (!shading_table) { + dev_err(asd->isp->dev, "shading table alloc failed!"); + return -ENOMEM; + } +#endif + +#ifndef ISP2401 + len_table = source_st->width * source_st->height * ATOMISP_SC_TYPE_SIZE; +#else + len_table = st.width * st.height * ATOMISP_SC_TYPE_SIZE; +#endif + for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { + if (copy_from_compatible(shading_table->data[i], +#ifndef ISP2401 + source_st->data[i], len_table, from_user)) { +#else + st.data[i], len_table, from_user)) { +#endif + atomisp_css_shading_table_free(shading_table); + return -EFAULT; + } + + } +#ifndef ISP2401 + shading_table->sensor_width = source_st->sensor_width; + shading_table->sensor_height = source_st->sensor_height; + shading_table->fraction_bits = source_st->fraction_bits; + shading_table->enable = source_st->enable; +#else + shading_table->sensor_width = st.sensor_width; + shading_table->sensor_height = st.sensor_height; + shading_table->fraction_bits = st.fraction_bits; + shading_table->enable = st.enable; +#endif + + /* No need to update shading table if it is the same */ + if (old_table != NULL && + old_table->sensor_width == shading_table->sensor_width && + old_table->sensor_height == shading_table->sensor_height && + old_table->width == shading_table->width && + old_table->height == shading_table->height && + old_table->fraction_bits == shading_table->fraction_bits && + old_table->enable == shading_table->enable) { + bool data_is_same = true; + + for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { + if (memcmp(shading_table->data[i], old_table->data[i], + len_table) != 0) { + data_is_same = false; + break; + } + } + + if (data_is_same) { + atomisp_css_shading_table_free(shading_table); + return 0; + } + } + +set_lsc: + /* set LSC to CSS */ + css_param->shading_table = shading_table; + css_param->update_flag.shading_table = + (struct atomisp_shading_table *) shading_table; + asd->params.sc_en = shading_table != NULL; + + if (old_table) + atomisp_css_shading_table_free(old_table); + + return 0; +} + +int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, + struct ia_css_dvs2_coefficients *coefs, + struct atomisp_css_params *css_param, + bool from_user) +{ + struct atomisp_css_dvs_grid_info *cur = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + int dvs_hor_coef_bytes, dvs_ver_coef_bytes; +#ifdef ISP2401 + struct ia_css_dvs2_coefficients dvs2_coefs; +#endif + + if (!coefs || !cur) + return 0; + + if (!from_user && css_param->update_flag.dvs2_coefs) + return 0; + +#ifndef ISP2401 + if (sizeof(*cur) != sizeof(coefs->grid) || + memcmp(&coefs->grid, cur, sizeof(coefs->grid))) { +#else + if (copy_from_compatible(&dvs2_coefs, coefs, + sizeof(struct ia_css_dvs2_coefficients), + from_user)) { + dev_err(asd->isp->dev, "copy dvs2 coef failed"); + return -EFAULT; + } + + if (sizeof(*cur) != sizeof(dvs2_coefs.grid) || + memcmp(&dvs2_coefs.grid, cur, sizeof(dvs2_coefs.grid))) { +#endif + dev_err(asd->isp->dev, "dvs grid mis-match!\n"); + /* If the grid info in the argument differs from the current + grid info, we tell the caller to reset the grid size and + try again. */ + return -EAGAIN; + } + +#ifndef ISP2401 + if (coefs->hor_coefs.odd_real == NULL || + coefs->hor_coefs.odd_imag == NULL || + coefs->hor_coefs.even_real == NULL || + coefs->hor_coefs.even_imag == NULL || + coefs->ver_coefs.odd_real == NULL || + coefs->ver_coefs.odd_imag == NULL || + coefs->ver_coefs.even_real == NULL || + coefs->ver_coefs.even_imag == NULL) +#else + if (dvs2_coefs.hor_coefs.odd_real == NULL || + dvs2_coefs.hor_coefs.odd_imag == NULL || + dvs2_coefs.hor_coefs.even_real == NULL || + dvs2_coefs.hor_coefs.even_imag == NULL || + dvs2_coefs.ver_coefs.odd_real == NULL || + dvs2_coefs.ver_coefs.odd_imag == NULL || + dvs2_coefs.ver_coefs.even_real == NULL || + dvs2_coefs.ver_coefs.even_imag == NULL) +#endif + return -EINVAL; + + if (!css_param->dvs2_coeff) { + /* DIS coefficients. */ + css_param->dvs2_coeff = ia_css_dvs2_coefficients_allocate(cur); + if (!css_param->dvs2_coeff) + return -ENOMEM; + } + + dvs_hor_coef_bytes = asd->params.dvs_hor_coef_bytes; + dvs_ver_coef_bytes = asd->params.dvs_ver_coef_bytes; + if (copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_real, +#ifndef ISP2401 + coefs->hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || +#else + dvs2_coefs.hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || +#endif + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_imag, +#ifndef ISP2401 + coefs->hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || +#else + dvs2_coefs.hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || +#endif + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_real, +#ifndef ISP2401 + coefs->hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || +#else + dvs2_coefs.hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || +#endif + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_imag, +#ifndef ISP2401 + coefs->hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || +#else + dvs2_coefs.hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || +#endif + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_real, +#ifndef ISP2401 + coefs->ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || +#else + dvs2_coefs.ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || +#endif + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_imag, +#ifndef ISP2401 + coefs->ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || +#else + dvs2_coefs.ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || +#endif + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_real, +#ifndef ISP2401 + coefs->ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || +#else + dvs2_coefs.ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || +#endif + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_imag, +#ifndef ISP2401 + coefs->ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { +#else + dvs2_coefs.ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { +#endif + ia_css_dvs2_coefficients_free(css_param->dvs2_coeff); + css_param->dvs2_coeff = NULL; + return -EFAULT; + } + + css_param->update_flag.dvs2_coefs = + (struct atomisp_dvs2_coefficients *)css_param->dvs2_coeff; + return 0; +} + +int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, + struct atomisp_dvs_6axis_config *source_6axis_config, + struct atomisp_css_params *css_param, + bool from_user) +{ + struct atomisp_css_dvs_6axis_config *dvs_6axis_config; + struct atomisp_css_dvs_6axis_config *old_6axis_config; +#ifdef ISP2401 + struct atomisp_css_dvs_6axis_config t_6axis_config; +#endif + struct ia_css_stream *stream = + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream; + struct atomisp_css_dvs_grid_info *dvs_grid_info = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + int ret = -EFAULT; + + if (stream == NULL) { + dev_err(asd->isp->dev, "%s: internal error!", __func__); + return -EINVAL; + } + + if (!source_6axis_config || !dvs_grid_info) + return 0; + + if (!dvs_grid_info->enable) + return 0; + + if (!from_user && css_param->update_flag.dvs_6axis_config) + return 0; + + /* check whether need to reallocate for 6 axis config */ + old_6axis_config = css_param->dvs_6axis; + dvs_6axis_config = old_6axis_config; +#ifdef ISP2401 + + if (copy_from_compatible(&t_6axis_config, source_6axis_config, + sizeof(struct atomisp_dvs_6axis_config), + from_user)) { + dev_err(asd->isp->dev, "copy morph table failed!"); + return -EFAULT; + } + +#endif + if (old_6axis_config && +#ifndef ISP2401 + (old_6axis_config->width_y != source_6axis_config->width_y || + old_6axis_config->height_y != source_6axis_config->height_y || + old_6axis_config->width_uv != source_6axis_config->width_uv || + old_6axis_config->height_uv != source_6axis_config->height_uv)) { +#else + (old_6axis_config->width_y != t_6axis_config.width_y || + old_6axis_config->height_y != t_6axis_config.height_y || + old_6axis_config->width_uv != t_6axis_config.width_uv || + old_6axis_config->height_uv != t_6axis_config.height_uv)) { +#endif + ia_css_dvs2_6axis_config_free(css_param->dvs_6axis); + css_param->dvs_6axis = NULL; + + dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); + if (!dvs_6axis_config) + return -ENOMEM; + } else if (!dvs_6axis_config) { + dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); + if (!dvs_6axis_config) + return -ENOMEM; + } + +#ifndef ISP2401 + dvs_6axis_config->exp_id = source_6axis_config->exp_id; +#else + dvs_6axis_config->exp_id = t_6axis_config.exp_id; +#endif + + if (copy_from_compatible(dvs_6axis_config->xcoords_y, +#ifndef ISP2401 + source_6axis_config->xcoords_y, + source_6axis_config->width_y * + source_6axis_config->height_y * + sizeof(*source_6axis_config->xcoords_y), +#else + t_6axis_config.xcoords_y, + t_6axis_config.width_y * + t_6axis_config.height_y * + sizeof(*dvs_6axis_config->xcoords_y), +#endif + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->ycoords_y, +#ifndef ISP2401 + source_6axis_config->ycoords_y, + source_6axis_config->width_y * + source_6axis_config->height_y * + sizeof(*source_6axis_config->ycoords_y), +#else + t_6axis_config.ycoords_y, + t_6axis_config.width_y * + t_6axis_config.height_y * + sizeof(*dvs_6axis_config->ycoords_y), +#endif + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->xcoords_uv, +#ifndef ISP2401 + source_6axis_config->xcoords_uv, + source_6axis_config->width_uv * + source_6axis_config->height_uv * + sizeof(*source_6axis_config->xcoords_uv), +#else + t_6axis_config.xcoords_uv, + t_6axis_config.width_uv * + t_6axis_config.height_uv * + sizeof(*dvs_6axis_config->xcoords_uv), +#endif + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->ycoords_uv, +#ifndef ISP2401 + source_6axis_config->ycoords_uv, + source_6axis_config->width_uv * + source_6axis_config->height_uv * + sizeof(*source_6axis_config->ycoords_uv), +#else + t_6axis_config.ycoords_uv, + t_6axis_config.width_uv * + t_6axis_config.height_uv * + sizeof(*dvs_6axis_config->ycoords_uv), +#endif + from_user)) + goto error; + + css_param->dvs_6axis = dvs_6axis_config; + css_param->update_flag.dvs_6axis_config = + (struct atomisp_dvs_6axis_config *) dvs_6axis_config; + return 0; + +error: + if (dvs_6axis_config) + ia_css_dvs2_6axis_config_free(dvs_6axis_config); + return ret; +} + +int atomisp_cp_morph_table(struct atomisp_sub_device *asd, + struct atomisp_morph_table *source_morph_table, + struct atomisp_css_params *css_param, + bool from_user) +{ + int ret = -EFAULT; + unsigned int i; + struct atomisp_css_morph_table *morph_table; +#ifdef ISP2401 + struct atomisp_css_morph_table mtbl; +#endif + struct atomisp_css_morph_table *old_morph_table; + + if (!source_morph_table) + return 0; + + if (!from_user && css_param->update_flag.morph_table) + return 0; + + old_morph_table = css_param->morph_table; + +#ifdef ISP2401 + if (copy_from_compatible(&mtbl, source_morph_table, + sizeof(struct atomisp_morph_table), + from_user)) { + dev_err(asd->isp->dev, "copy morph table failed!"); + return -EFAULT; + } + +#endif + morph_table = atomisp_css_morph_table_allocate( +#ifndef ISP2401 + source_morph_table->width, + source_morph_table->height); +#else + mtbl.width, + mtbl.height); +#endif + if (!morph_table) + return -ENOMEM; + + for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { + if (copy_from_compatible(morph_table->coordinates_x[i], + (__force void *)source_morph_table->coordinates_x[i], +#ifndef ISP2401 + source_morph_table->height * source_morph_table->width * + sizeof(*source_morph_table->coordinates_x[i]), +#else + mtbl.height * mtbl.width * + sizeof(*morph_table->coordinates_x[i]), +#endif + from_user)) + goto error; + + if (copy_from_compatible(morph_table->coordinates_y[i], + (__force void *)source_morph_table->coordinates_y[i], +#ifndef ISP2401 + source_morph_table->height * source_morph_table->width * + sizeof(*source_morph_table->coordinates_y[i]), +#else + mtbl.height * mtbl.width * + sizeof(*morph_table->coordinates_y[i]), +#endif + from_user)) + goto error; + } + + css_param->morph_table = morph_table; + if (old_morph_table) + atomisp_css_morph_table_free(old_morph_table); + css_param->update_flag.morph_table = + (struct atomisp_morph_table *) morph_table; + return 0; + +error: + if (morph_table) + atomisp_css_morph_table_free(morph_table); + return ret; +} + +int atomisp_makeup_css_parameters(struct atomisp_sub_device *asd, + struct atomisp_parameters *arg, + struct atomisp_css_params *css_param) +{ + int ret; + + ret = atomisp_cp_general_isp_parameters(asd, arg, css_param, false); + if (ret) + return ret; + ret = atomisp_cp_lsc_table(asd, arg->shading_table, css_param, false); + if (ret) + return ret; + ret = atomisp_cp_morph_table(asd, arg->morph_table, css_param, false); + if (ret) + return ret; + ret = atomisp_css_cp_dvs2_coefs(asd, + (struct ia_css_dvs2_coefficients *) arg->dvs2_coefs, + css_param, false); + if (ret) + return ret; + ret = atomisp_cp_dvs_6axis_config(asd, arg->dvs_6axis_config, + css_param, false); + return ret; +} + +void atomisp_free_css_parameters(struct atomisp_css_params *css_param) +{ + if (css_param->dvs_6axis) { + ia_css_dvs2_6axis_config_free(css_param->dvs_6axis); + css_param->dvs_6axis = NULL; + } + if (css_param->dvs2_coeff) { + ia_css_dvs2_coefficients_free(css_param->dvs2_coeff); + css_param->dvs2_coeff = NULL; + } + if (css_param->shading_table) { + ia_css_shading_table_free(css_param->shading_table); + css_param->shading_table = NULL; + } + if (css_param->morph_table) { + ia_css_morph_table_free(css_param->morph_table); + css_param->morph_table = NULL; + } +} + +/* + * Check parameter queue list and buffer queue list to find out if matched items + * and then set parameter to CSS and enqueue buffer to CSS. + * Of course, if the buffer in buffer waiting list is not bound to a per-frame + * parameter, it will be enqueued into CSS as long as the per-frame setting + * buffers before it get enqueued. + */ +void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe) +{ + struct atomisp_sub_device *asd = pipe->asd; + struct videobuf_buffer *vb = NULL, *vb_tmp; + struct atomisp_css_params_with_list *param = NULL, *param_tmp; + struct videobuf_vmalloc_memory *vm_mem = NULL; + unsigned long irqflags; + bool need_to_enqueue_buffer = false; + + if (atomisp_is_vf_pipe(pipe)) + return; + + /* + * CSS/FW requires set parameter and enqueue buffer happen after ISP + * is streamon. + */ + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + return; + + if (list_empty(&pipe->per_frame_params) || + list_empty(&pipe->buffers_waiting_for_param)) + return; + + list_for_each_entry_safe(vb, vb_tmp, + &pipe->buffers_waiting_for_param, queue) { + if (pipe->frame_request_config_id[vb->i]) { + list_for_each_entry_safe(param, param_tmp, + &pipe->per_frame_params, list) { + if (pipe->frame_request_config_id[vb->i] != + param->params.isp_config_id) + continue; + + list_del(¶m->list); + list_del(&vb->queue); + /* + * clear the request config id as the buffer + * will be handled and enqueued into CSS soon + */ + pipe->frame_request_config_id[vb->i] = 0; + pipe->frame_params[vb->i] = param; + vm_mem = vb->priv; + BUG_ON(!vm_mem); + break; + } + + if (vm_mem) { + spin_lock_irqsave(&pipe->irq_lock, irqflags); + list_add_tail(&vb->queue, &pipe->activeq); + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + vm_mem = NULL; + need_to_enqueue_buffer = true; + } else { + /* The is the end, stop further loop */ + break; + } + } else { + list_del(&vb->queue); + pipe->frame_params[vb->i] = NULL; + spin_lock_irqsave(&pipe->irq_lock, irqflags); + list_add_tail(&vb->queue, &pipe->activeq); + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + need_to_enqueue_buffer = true; + } + } + + if (need_to_enqueue_buffer) { + atomisp_qbuffers_to_css(asd); +#ifndef ISP2401 + if (!atomisp_is_wdt_running(asd) && atomisp_buffers_queued(asd)) + atomisp_wdt_start(asd); +#else + if (atomisp_buffers_queued_pipe(pipe)) { + if (!atomisp_is_wdt_running(pipe)) + atomisp_wdt_start(pipe); + else + atomisp_wdt_refresh_pipe(pipe, + ATOMISP_WDT_KEEP_CURRENT_DELAY); + } +#endif + } +} + +/* +* Function to configure ISP parameters +*/ +int atomisp_set_parameters(struct video_device *vdev, + struct atomisp_parameters *arg) +{ + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct atomisp_css_params_with_list *param = NULL; + struct atomisp_css_params *css_param = &asd->params.css_param; + int ret; + + if (asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream == NULL) { + dev_err(asd->isp->dev, "%s: internal error!\n", __func__); + return -EINVAL; + } + + dev_dbg(asd->isp->dev, "%s: set parameter(per_frame_setting %d) for asd%d with isp_config_id %d of %s\n", + __func__, arg->per_frame_setting, asd->index, + arg->isp_config_id, vdev->name); +#ifdef ISP2401 + + if (atomisp_is_vf_pipe(pipe) && arg->per_frame_setting) { + dev_err(asd->isp->dev, "%s: vf pipe not support per_frame_setting", + __func__); + return -EINVAL; + } + +#endif + if (arg->per_frame_setting && !atomisp_is_vf_pipe(pipe)) { + /* + * Per-frame setting enabled, we allocate a new paramter + * buffer to cache the parameters and only when frame buffers + * are ready, the parameters will be set to CSS. + * per-frame setting only works for the main output frame. + */ + param = kvzalloc(sizeof(*param), GFP_KERNEL); + if (!param) { + dev_err(asd->isp->dev, "%s: failed to alloc params buffer\n", + __func__); + return -ENOMEM; + } + css_param = ¶m->params; + } + + ret = atomisp_cp_general_isp_parameters(asd, arg, css_param, true); + if (ret) + goto apply_parameter_failed; + + ret = atomisp_cp_lsc_table(asd, arg->shading_table, css_param, true); + if (ret) + goto apply_parameter_failed; + + ret = atomisp_cp_morph_table(asd, arg->morph_table, css_param, true); + if (ret) + goto apply_parameter_failed; + + ret = atomisp_css_cp_dvs2_coefs(asd, + (struct ia_css_dvs2_coefficients *) arg->dvs2_coefs, + css_param, true); + if (ret) + goto apply_parameter_failed; + + ret = atomisp_cp_dvs_6axis_config(asd, arg->dvs_6axis_config, + css_param, true); + if (ret) + goto apply_parameter_failed; + + if (!(arg->per_frame_setting && !atomisp_is_vf_pipe(pipe))) { + /* indicate to CSS that we have parameters to be updated */ + asd->params.css_update_params_needed = true; + } else { + list_add_tail(¶m->list, &pipe->per_frame_params); + atomisp_handle_parameter_and_buffer(pipe); + } + + return 0; + +apply_parameter_failed: + if (css_param) + atomisp_free_css_parameters(css_param); + if (param) + kvfree(param); + + return ret; +} + +/* + * Function to set/get isp parameters to isp + */ +int atomisp_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_parm *config) +{ + struct atomisp_device *isp = asd->isp; + struct ia_css_pipe_config *vp_cfg = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + pipe_configs[IA_CSS_PIPE_ID_VIDEO]; + + /* Read parameter for 3A binary info */ + if (flag == 0) { + struct atomisp_css_dvs_grid_info *dvs_grid_info = + atomisp_css_get_dvs_grid_info( + &asd->params.curr_grid_info); + + if (&config->info == NULL) { + dev_err(isp->dev, "ERROR: NULL pointer in grid_info\n"); + return -EINVAL; + } + atomisp_curr_user_grid_info(asd, &config->info); + + /* We always return the resolution and stride even if there is + * no valid metadata. This allows the caller to get the + * information needed to allocate user-space buffers. */ + config->metadata_config.metadata_height = asd-> + stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_info. + metadata_info.resolution.height; + config->metadata_config.metadata_stride = asd-> + stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_info. + metadata_info.stride; + + /* update dvs grid info */ + if (dvs_grid_info) + memcpy(&config->dvs_grid, + dvs_grid_info, + sizeof(struct atomisp_css_dvs_grid_info)); + + if (asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { + config->dvs_envelop.width = 0; + config->dvs_envelop.height = 0; + return 0; + } + + /* update dvs envelop info */ + if (!asd->continuous_mode->val) { + config->dvs_envelop.width = vp_cfg->dvs_envelope.width; + config->dvs_envelop.height = + vp_cfg->dvs_envelope.height; + } else { + unsigned int dvs_w, dvs_h, dvs_w_max, dvs_h_max; + + dvs_w = vp_cfg->bayer_ds_out_res.width - + vp_cfg->output_info[0].res.width; + dvs_h = vp_cfg->bayer_ds_out_res.height - + vp_cfg->output_info[0].res.height; + dvs_w_max = rounddown( + vp_cfg->output_info[0].res.width / 5, + ATOM_ISP_STEP_WIDTH); + dvs_h_max = rounddown( + vp_cfg->output_info[0].res.height / 5, + ATOM_ISP_STEP_HEIGHT); + + config->dvs_envelop.width = min(dvs_w, dvs_w_max); + config->dvs_envelop.height = min(dvs_h, dvs_h_max); + } + + return 0; + } + + memcpy(&asd->params.css_param.wb_config, &config->wb_config, + sizeof(struct atomisp_css_wb_config)); + memcpy(&asd->params.css_param.ob_config, &config->ob_config, + sizeof(struct atomisp_css_ob_config)); + memcpy(&asd->params.css_param.dp_config, &config->dp_config, + sizeof(struct atomisp_css_dp_config)); + memcpy(&asd->params.css_param.de_config, &config->de_config, + sizeof(struct atomisp_css_de_config)); + memcpy(&asd->params.css_param.dz_config, &config->dz_config, + sizeof(struct atomisp_css_dz_config)); + memcpy(&asd->params.css_param.ce_config, &config->ce_config, + sizeof(struct atomisp_css_ce_config)); + memcpy(&asd->params.css_param.nr_config, &config->nr_config, + sizeof(struct atomisp_css_nr_config)); + memcpy(&asd->params.css_param.ee_config, &config->ee_config, + sizeof(struct atomisp_css_ee_config)); + memcpy(&asd->params.css_param.tnr_config, &config->tnr_config, + sizeof(struct atomisp_css_tnr_config)); + + if (asd->params.color_effect == V4L2_COLORFX_NEGATIVE) { + asd->params.css_param.cc_config.matrix[3] = -config->cc_config.matrix[3]; + asd->params.css_param.cc_config.matrix[4] = -config->cc_config.matrix[4]; + asd->params.css_param.cc_config.matrix[5] = -config->cc_config.matrix[5]; + asd->params.css_param.cc_config.matrix[6] = -config->cc_config.matrix[6]; + asd->params.css_param.cc_config.matrix[7] = -config->cc_config.matrix[7]; + asd->params.css_param.cc_config.matrix[8] = -config->cc_config.matrix[8]; + } + + if (asd->params.color_effect != V4L2_COLORFX_SEPIA && + asd->params.color_effect != V4L2_COLORFX_BW) { + memcpy(&asd->params.css_param.cc_config, &config->cc_config, + sizeof(struct atomisp_css_cc_config)); + atomisp_css_set_cc_config(asd, &asd->params.css_param.cc_config); + } + + atomisp_css_set_wb_config(asd, &asd->params.css_param.wb_config); + atomisp_css_set_ob_config(asd, &asd->params.css_param.ob_config); + atomisp_css_set_de_config(asd, &asd->params.css_param.de_config); + atomisp_css_set_dz_config(asd, &asd->params.css_param.dz_config); + atomisp_css_set_ce_config(asd, &asd->params.css_param.ce_config); + atomisp_css_set_dp_config(asd, &asd->params.css_param.dp_config); + atomisp_css_set_nr_config(asd, &asd->params.css_param.nr_config); + atomisp_css_set_ee_config(asd, &asd->params.css_param.ee_config); + atomisp_css_set_tnr_config(asd, &asd->params.css_param.tnr_config); + asd->params.css_update_params_needed = true; + + return 0; +} + +/* + * Function to configure color effect of the image + */ +int atomisp_color_effect(struct atomisp_sub_device *asd, int flag, + __s32 *effect) +{ + struct atomisp_css_cc_config *cc_config = NULL; + struct atomisp_css_macc_table *macc_table = NULL; + struct atomisp_css_ctc_table *ctc_table = NULL; + int ret = 0; + struct v4l2_control control; + struct atomisp_device *isp = asd->isp; + + if (flag == 0) { + *effect = asd->params.color_effect; + return 0; + } + + + control.id = V4L2_CID_COLORFX; + control.value = *effect; + ret = + v4l2_s_ctrl(NULL, isp->inputs[asd->input_curr].camera->ctrl_handler, + &control); + /* + * if set color effect to sensor successfully, return + * 0 directly. + */ + if (!ret) { + asd->params.color_effect = (u32)*effect; + return 0; + } + + if (*effect == asd->params.color_effect) + return 0; + + /* + * isp_subdev->params.macc_en should be set to false. + */ + asd->params.macc_en = false; + + switch (*effect) { + case V4L2_COLORFX_NONE: + macc_table = &asd->params.css_param.macc_table; + asd->params.macc_en = true; + break; + case V4L2_COLORFX_SEPIA: + cc_config = &sepia_cc_config; + break; + case V4L2_COLORFX_NEGATIVE: + cc_config = &nega_cc_config; + break; + case V4L2_COLORFX_BW: + cc_config = &mono_cc_config; + break; + case V4L2_COLORFX_SKY_BLUE: + macc_table = &blue_macc_table; + asd->params.macc_en = true; + break; + case V4L2_COLORFX_GRASS_GREEN: + macc_table = &green_macc_table; + asd->params.macc_en = true; + break; + case V4L2_COLORFX_SKIN_WHITEN_LOW: + macc_table = &skin_low_macc_table; + asd->params.macc_en = true; + break; + case V4L2_COLORFX_SKIN_WHITEN: + macc_table = &skin_medium_macc_table; + asd->params.macc_en = true; + break; + case V4L2_COLORFX_SKIN_WHITEN_HIGH: + macc_table = &skin_high_macc_table; + asd->params.macc_en = true; + break; + case V4L2_COLORFX_VIVID: + ctc_table = &vivid_ctc_table; + break; + default: + return -EINVAL; + } + atomisp_update_capture_mode(asd); + + if (cc_config) + atomisp_css_set_cc_config(asd, cc_config); + if (macc_table) + atomisp_css_set_macc_table(asd, macc_table); + if (ctc_table) + atomisp_css_set_ctc_table(asd, ctc_table); + asd->params.color_effect = (u32)*effect; + asd->params.css_update_params_needed = true; + return 0; +} + +/* + * Function to configure bad pixel correction + */ +int atomisp_bad_pixel(struct atomisp_sub_device *asd, int flag, + __s32 *value) +{ + + if (flag == 0) { + *value = asd->params.bad_pixel_en; + return 0; + } + asd->params.bad_pixel_en = !!*value; + + return 0; +} + +/* + * Function to configure bad pixel correction params + */ +int atomisp_bad_pixel_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_dp_config *config) +{ + if (flag == 0) { + /* Get bad pixel from current setup */ + if (atomisp_css_get_dp_config(asd, config)) + return -EINVAL; + } else { + /* Set bad pixel to isp parameters */ + memcpy(&asd->params.css_param.dp_config, config, + sizeof(asd->params.css_param.dp_config)); + atomisp_css_set_dp_config(asd, &asd->params.css_param.dp_config); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +/* + * Function to enable/disable video image stablization + */ +int atomisp_video_stable(struct atomisp_sub_device *asd, int flag, + __s32 *value) +{ + if (flag == 0) + *value = asd->params.video_dis_en; + else + asd->params.video_dis_en = !!*value; + + return 0; +} + +/* + * Function to configure fixed pattern noise + */ +int atomisp_fixed_pattern(struct atomisp_sub_device *asd, int flag, + __s32 *value) +{ + + if (flag == 0) { + *value = asd->params.fpn_en; + return 0; + } + + if (*value == 0) { + asd->params.fpn_en = false; + return 0; + } + + /* Add function to get black from from sensor with shutter off */ + return 0; +} + +static unsigned int +atomisp_bytesperline_to_padded_width(unsigned int bytesperline, + enum atomisp_css_frame_format format) +{ + switch (format) { + case CSS_FRAME_FORMAT_UYVY: + case CSS_FRAME_FORMAT_YUYV: + case CSS_FRAME_FORMAT_RAW: + case CSS_FRAME_FORMAT_RGB565: + return bytesperline/2; + case CSS_FRAME_FORMAT_RGBA888: + return bytesperline/4; + /* The following cases could be removed, but we leave them + in to document the formats that are included. */ + case CSS_FRAME_FORMAT_NV11: + case CSS_FRAME_FORMAT_NV12: + case CSS_FRAME_FORMAT_NV16: + case CSS_FRAME_FORMAT_NV21: + case CSS_FRAME_FORMAT_NV61: + case CSS_FRAME_FORMAT_YV12: + case CSS_FRAME_FORMAT_YV16: + case CSS_FRAME_FORMAT_YUV420: + case CSS_FRAME_FORMAT_YUV420_16: + case CSS_FRAME_FORMAT_YUV422: + case CSS_FRAME_FORMAT_YUV422_16: + case CSS_FRAME_FORMAT_YUV444: + case CSS_FRAME_FORMAT_YUV_LINE: + case CSS_FRAME_FORMAT_PLANAR_RGB888: + case CSS_FRAME_FORMAT_QPLANE6: + case CSS_FRAME_FORMAT_BINARY_8: + default: + return bytesperline; + } +} + +static int +atomisp_v4l2_framebuffer_to_css_frame(const struct v4l2_framebuffer *arg, + struct atomisp_css_frame **result) +{ + struct atomisp_css_frame *res = NULL; + unsigned int padded_width; + enum atomisp_css_frame_format sh_format; + char *tmp_buf = NULL; + int ret = 0; + + sh_format = v4l2_fmt_to_sh_fmt(arg->fmt.pixelformat); + padded_width = atomisp_bytesperline_to_padded_width( + arg->fmt.bytesperline, sh_format); + + /* Note: the padded width on an atomisp_css_frame is in elements, not in + bytes. The RAW frame we use here should always be a 16bit RAW + frame. This is why we bytesperline/2 is equal to the padded with */ + if (atomisp_css_frame_allocate(&res, arg->fmt.width, arg->fmt.height, + sh_format, padded_width, 0)) { + ret = -ENOMEM; + goto err; + } + + tmp_buf = vmalloc(arg->fmt.sizeimage); + if (!tmp_buf) { + ret = -ENOMEM; + goto err; + } + if (copy_from_user(tmp_buf, (void __user __force *)arg->base, + arg->fmt.sizeimage)) { + ret = -EFAULT; + goto err; + } + + if (hmm_store(res->data, tmp_buf, arg->fmt.sizeimage)) { + ret = -EINVAL; + goto err; + } + +err: + if (ret && res) + atomisp_css_frame_free(res); + if (tmp_buf) + vfree(tmp_buf); + if (ret == 0) + *result = res; + return ret; +} + +/* + * Function to configure fixed pattern noise table + */ +int atomisp_fixed_pattern_table(struct atomisp_sub_device *asd, + struct v4l2_framebuffer *arg) +{ + struct atomisp_css_frame *raw_black_frame = NULL; + int ret; + + if (arg == NULL) + return -EINVAL; + + ret = atomisp_v4l2_framebuffer_to_css_frame(arg, &raw_black_frame); + if (ret) + return ret; + if (atomisp_css_set_black_frame(asd, raw_black_frame)) + ret = -ENOMEM; + + atomisp_css_frame_free(raw_black_frame); + return ret; +} + +/* + * Function to configure false color correction + */ +int atomisp_false_color(struct atomisp_sub_device *asd, int flag, + __s32 *value) +{ + /* Get nr config from current setup */ + if (flag == 0) { + *value = asd->params.false_color; + return 0; + } + + /* Set nr config to isp parameters */ + if (*value) { + atomisp_css_set_default_de_config(asd); + } else { + asd->params.css_param.de_config.pixelnoise = 0; + atomisp_css_set_de_config(asd, &asd->params.css_param.de_config); + } + asd->params.css_update_params_needed = true; + asd->params.false_color = *value; + return 0; +} + +/* + * Function to configure bad pixel correction params + */ +int atomisp_false_color_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_de_config *config) +{ + if (flag == 0) { + /* Get false color from current setup */ + if (atomisp_css_get_de_config(asd, config)) + return -EINVAL; + } else { + /* Set false color to isp parameters */ + memcpy(&asd->params.css_param.de_config, config, + sizeof(asd->params.css_param.de_config)); + atomisp_css_set_de_config(asd, &asd->params.css_param.de_config); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +/* + * Function to configure white balance params + */ +int atomisp_white_balance_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_wb_config *config) +{ + if (flag == 0) { + /* Get white balance from current setup */ + if (atomisp_css_get_wb_config(asd, config)) + return -EINVAL; + } else { + /* Set white balance to isp parameters */ + memcpy(&asd->params.css_param.wb_config, config, + sizeof(asd->params.css_param.wb_config)); + atomisp_css_set_wb_config(asd, &asd->params.css_param.wb_config); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +int atomisp_3a_config_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_3a_config *config) +{ + struct atomisp_device *isp = asd->isp; + + dev_dbg(isp->dev, ">%s %d\n", __func__, flag); + + if (flag == 0) { + /* Get white balance from current setup */ + if (atomisp_css_get_3a_config(asd, config)) + return -EINVAL; + } else { + /* Set white balance to isp parameters */ + memcpy(&asd->params.css_param.s3a_config, config, + sizeof(asd->params.css_param.s3a_config)); + atomisp_css_set_3a_config(asd, &asd->params.css_param.s3a_config); + asd->params.css_update_params_needed = true; + } + + dev_dbg(isp->dev, "<%s %d\n", __func__, flag); + return 0; +} + +/* + * Function to setup digital zoom + */ +int atomisp_digital_zoom(struct atomisp_sub_device *asd, int flag, + __s32 *value) +{ + u32 zoom; + struct atomisp_device *isp = asd->isp; + + unsigned int max_zoom = MRFLD_MAX_ZOOM_FACTOR; + + if (flag == 0) { + atomisp_css_get_zoom_factor(asd, &zoom); + *value = max_zoom - zoom; + } else { + if (*value < 0) + return -EINVAL; + + zoom = max_zoom - min_t(u32, max_zoom - 1, *value); + atomisp_css_set_zoom_factor(asd, zoom); + + dev_dbg(isp->dev, "%s, zoom: %d\n", __func__, zoom); + asd->params.css_update_params_needed = true; + } + + return 0; +} + +/* + * Function to get sensor specific info for current resolution, + * which will be used for auto exposure conversion. + */ +int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, + struct atomisp_sensor_mode_data *config) +{ + struct camera_mipi_info *mipi_info; + struct atomisp_device *isp = asd->isp; + + mipi_info = atomisp_to_sensor_mipi_info( + isp->inputs[asd->input_curr].camera); + if (mipi_info == NULL) + return -EINVAL; + + memcpy(config, &mipi_info->data, sizeof(*config)); + return 0; +} + +int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f) +{ + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + + f->fmt.pix = pipe->pix; + + return 0; +} + +static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, + uint16_t stream_index, struct atomisp_input_stream_info *stream_info) +{ + int i; + +#if defined(ISP2401_NEW_INPUT_SYSTEM) + /* assign virtual channel id return from sensor driver query */ + asd->stream_env[stream_index].ch_id = stream_info->ch_id; +#endif + asd->stream_env[stream_index].isys_configs = stream_info->isys_configs; + for (i = 0; i < stream_info->isys_configs; i++) { + asd->stream_env[stream_index].isys_info[i].input_format = + stream_info->isys_info[i].input_format; + asd->stream_env[stream_index].isys_info[i].width = + stream_info->isys_info[i].width; + asd->stream_env[stream_index].isys_info[i].height = + stream_info->isys_info[i].height; + } +} + +static void __atomisp_init_stream_info(uint16_t stream_index, + struct atomisp_input_stream_info *stream_info) +{ + int i; + + stream_info->enable = 1; + stream_info->stream = stream_index; + stream_info->ch_id = 0; + stream_info->isys_configs = 0; + for (i = 0; i < MAX_STREAMS_PER_CHANNEL; i++) { + stream_info->isys_info[i].input_format = 0; + stream_info->isys_info[i].width = 0; + stream_info->isys_info[i].height = 0; + } +} + +/* This function looks up the closest available resolution. */ +int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, + bool *res_overflow) +{ + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct v4l2_subdev_pad_config pad_cfg; + struct v4l2_subdev_format format = { + .which = V4L2_SUBDEV_FORMAT_TRY, + }; + + struct v4l2_mbus_framefmt *snr_mbus_fmt = &format.format; + const struct atomisp_format_bridge *fmt; + struct atomisp_input_stream_info *stream_info = + (struct atomisp_input_stream_info *)snr_mbus_fmt->reserved; + uint16_t stream_index; + int source_pad = atomisp_subdev_source_pad(vdev); + int ret; + + if (isp->inputs[asd->input_curr].camera == NULL) + return -EINVAL; + + stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + fmt = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (fmt == NULL) { + dev_err(isp->dev, "unsupported pixelformat!\n"); + fmt = atomisp_output_fmts; + } + +#ifdef ISP2401 + if (f->fmt.pix.width <= 0 || f->fmt.pix.height <= 0) + return -EINVAL; + +#endif + snr_mbus_fmt->code = fmt->mbus_code; + snr_mbus_fmt->width = f->fmt.pix.width; + snr_mbus_fmt->height = f->fmt.pix.height; + + __atomisp_init_stream_info(stream_index, stream_info); + + dev_dbg(isp->dev, "try_mbus_fmt: asking for %ux%u\n", + snr_mbus_fmt->width, snr_mbus_fmt->height); + + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + pad, set_fmt, &pad_cfg, &format); + if (ret) + return ret; + + dev_dbg(isp->dev, "try_mbus_fmt: got %ux%u\n", + snr_mbus_fmt->width, snr_mbus_fmt->height); + + fmt = atomisp_get_format_bridge_from_mbus(snr_mbus_fmt->code); + if (fmt == NULL) { + dev_err(isp->dev, "unknown sensor format 0x%8.8x\n", + snr_mbus_fmt->code); + return -EINVAL; + } + + f->fmt.pix.pixelformat = fmt->pixelformat; + + /* + * If the format is jpeg or custom RAW, then the width and height will + * not satisfy the normal atomisp requirements and no need to check + * the below conditions. So just assign to what is being returned from + * the sensor driver. + */ + if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_JPEG || + f->fmt.pix.pixelformat == V4L2_PIX_FMT_CUSTOM_M10MO_RAW) { + f->fmt.pix.width = snr_mbus_fmt->width; + f->fmt.pix.height = snr_mbus_fmt->height; + return 0; + } + + if (snr_mbus_fmt->width < f->fmt.pix.width + && snr_mbus_fmt->height < f->fmt.pix.height) { + f->fmt.pix.width = snr_mbus_fmt->width; + f->fmt.pix.height = snr_mbus_fmt->height; + /* Set the flag when resolution requested is + * beyond the max value supported by sensor + */ + if (res_overflow != NULL) + *res_overflow = true; + } + + /* app vs isp */ + f->fmt.pix.width = rounddown( + clamp_t(u32, f->fmt.pix.width, ATOM_ISP_MIN_WIDTH, + ATOM_ISP_MAX_WIDTH), ATOM_ISP_STEP_WIDTH); + f->fmt.pix.height = rounddown( + clamp_t(u32, f->fmt.pix.height, ATOM_ISP_MIN_HEIGHT, + ATOM_ISP_MAX_HEIGHT), ATOM_ISP_STEP_HEIGHT); + + return 0; +} + +static int +atomisp_try_fmt_file(struct atomisp_device *isp, struct v4l2_format *f) +{ + u32 width = f->fmt.pix.width; + u32 height = f->fmt.pix.height; + u32 pixelformat = f->fmt.pix.pixelformat; + enum v4l2_field field = f->fmt.pix.field; + u32 depth; + + if (!atomisp_get_format_bridge(pixelformat)) { + dev_err(isp->dev, "Wrong output pixelformat\n"); + return -EINVAL; + } + + depth = get_pixel_depth(pixelformat); + + if (field == V4L2_FIELD_ANY) + field = V4L2_FIELD_NONE; + else if (field != V4L2_FIELD_NONE) { + dev_err(isp->dev, "Wrong output field\n"); + return -EINVAL; + } + + f->fmt.pix.field = field; + f->fmt.pix.width = clamp_t(u32, + rounddown(width, (u32)ATOM_ISP_STEP_WIDTH), + ATOM_ISP_MIN_WIDTH, ATOM_ISP_MAX_WIDTH); + f->fmt.pix.height = clamp_t(u32, rounddown(height, + (u32)ATOM_ISP_STEP_HEIGHT), + ATOM_ISP_MIN_HEIGHT, ATOM_ISP_MAX_HEIGHT); + f->fmt.pix.bytesperline = (width * depth) >> 3; + + return 0; +} + +enum mipi_port_id __get_mipi_port(struct atomisp_device *isp, + enum atomisp_camera_port port) +{ + switch (port) { + case ATOMISP_CAMERA_PORT_PRIMARY: + return MIPI_PORT0_ID; + case ATOMISP_CAMERA_PORT_SECONDARY: + return MIPI_PORT1_ID; + case ATOMISP_CAMERA_PORT_TERTIARY: + if (MIPI_PORT1_ID + 1 != N_MIPI_PORT_ID) + return MIPI_PORT1_ID + 1; + /* go through down for else case */ + default: + dev_err(isp->dev, "unsupported port: %d\n", port); + return MIPI_PORT0_ID; + } +} + +static inline int atomisp_set_sensor_mipi_to_isp( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct camera_mipi_info *mipi_info) +{ + struct v4l2_control ctrl; + struct atomisp_device *isp = asd->isp; + const struct atomisp_in_fmt_conv *fc; + int mipi_freq = 0; + unsigned int input_format, bayer_order; + + ctrl.id = V4L2_CID_LINK_FREQ; + if (v4l2_g_ctrl + (isp->inputs[asd->input_curr].camera->ctrl_handler, &ctrl) == 0) + mipi_freq = ctrl.value; + + if (asd->stream_env[stream_id].isys_configs == 1) { + input_format = + asd->stream_env[stream_id].isys_info[0].input_format; + atomisp_css_isys_set_format(asd, stream_id, + input_format, IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX); + } else if (asd->stream_env[stream_id].isys_configs == 2) { + atomisp_css_isys_two_stream_cfg_update_stream1( + asd, stream_id, + asd->stream_env[stream_id].isys_info[0].input_format, + asd->stream_env[stream_id].isys_info[0].width, + asd->stream_env[stream_id].isys_info[0].height); + + atomisp_css_isys_two_stream_cfg_update_stream2( + asd, stream_id, + asd->stream_env[stream_id].isys_info[1].input_format, + asd->stream_env[stream_id].isys_info[1].width, + asd->stream_env[stream_id].isys_info[1].height); + } + + /* Compatibility for sensors which provide no media bus code + * in s_mbus_framefmt() nor support pad formats. */ + if (mipi_info->input_format != -1) { + bayer_order = mipi_info->raw_bayer_order; + + /* Input stream config is still needs configured */ + /* TODO: Check if this is necessary */ + fc = atomisp_find_in_fmt_conv_by_atomisp_in_fmt( + mipi_info->input_format); + if (!fc) + return -EINVAL; + input_format = fc->css_stream_fmt; + } else { + struct v4l2_mbus_framefmt *sink; + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); + fc = atomisp_find_in_fmt_conv(sink->code); + if (!fc) + return -EINVAL; + input_format = fc->css_stream_fmt; + bayer_order = fc->bayer_order; + } + + atomisp_css_input_set_format(asd, stream_id, input_format); + atomisp_css_input_set_bayer_order(asd, stream_id, bayer_order); + + fc = atomisp_find_in_fmt_conv_by_atomisp_in_fmt( + mipi_info->metadata_format); + if (!fc) + return -EINVAL; + input_format = fc->css_stream_fmt; + atomisp_css_input_configure_port(asd, + __get_mipi_port(asd->isp, mipi_info->port), + mipi_info->num_lanes, + 0xffff4, mipi_freq, + input_format, + mipi_info->metadata_width, + mipi_info->metadata_height); + return 0; +} + +static int __enable_continuous_mode(struct atomisp_sub_device *asd, + bool enable) +{ + struct atomisp_device *isp = asd->isp; + + dev_dbg(isp->dev, + "continuous mode %d, raw buffers %d, stop preview %d\n", + enable, asd->continuous_raw_buffer_size->val, + !asd->continuous_viewfinder->val); +#ifndef ISP2401 + atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_PRIMARY); +#else + atomisp_update_capture_mode(asd); +#endif + /* in case of ANR, force capture pipe to offline mode */ + atomisp_css_capture_enable_online(asd, ATOMISP_INPUT_STREAM_GENERAL, + asd->params.low_light ? false : !enable); + atomisp_css_preview_enable_online(asd, ATOMISP_INPUT_STREAM_GENERAL, + !enable); + atomisp_css_enable_continuous(asd, enable); + atomisp_css_enable_cvf(asd, asd->continuous_viewfinder->val); + + if (atomisp_css_continuous_set_num_raw_frames(asd, + asd->continuous_raw_buffer_size->val)) { + dev_err(isp->dev, "css_continuous_set_num_raw_frames failed\n"); + return -EINVAL; + } + + if (!enable) { + atomisp_css_enable_raw_binning(asd, false); + atomisp_css_input_set_two_pixels_per_clock(asd, false); + } + + if (isp->inputs[asd->input_curr].type != FILE_INPUT) + atomisp_css_input_set_mode(asd, CSS_INPUT_MODE_SENSOR); + + return atomisp_update_run_mode(asd); +} + +static int configure_pp_input_nop(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) +{ + return 0; +} + +static int configure_output_nop(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format sh_fmt) +{ + return 0; +} + +static int get_frame_info_nop(struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *finfo) +{ + return 0; +} + +/* + * Resets CSS parameters that depend on input resolution. + * + * Update params like CSS RAW binning, 2ppc mode and pp_input + * which depend on input size, but are not automatically + * handled in CSS when the input resolution is changed. + */ +static int css_input_resolution_changed(struct atomisp_sub_device *asd, + struct v4l2_mbus_framefmt *ffmt) +{ + struct atomisp_metadata_buf *md_buf = NULL, *_md_buf; + unsigned int i; + + dev_dbg(asd->isp->dev, "css_input_resolution_changed to %ux%u\n", + ffmt->width, ffmt->height); + +#if defined(ISP2401_NEW_INPUT_SYSTEM) + atomisp_css_input_set_two_pixels_per_clock(asd, false); +#else + atomisp_css_input_set_two_pixels_per_clock(asd, true); +#endif + if (asd->continuous_mode->val) { + /* Note for all checks: ffmt includes pad_w+pad_h */ + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO || + (ffmt->width >= 2048 || ffmt->height >= 1536)) { + /* + * For preview pipe, enable only if resolution + * is >= 3M for ISP2400. + */ + atomisp_css_enable_raw_binning(asd, true); + } + } + /* + * If sensor input changed, which means metadata resolution changed + * together. Release all metadata buffers here to let it re-allocated + * next time in reqbufs. + */ + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + list_for_each_entry_safe(md_buf, _md_buf, &asd->metadata[i], + list) { + atomisp_css_free_metadata_buffer(md_buf); + list_del(&md_buf->list); + kfree(md_buf); + } + } + return 0; + + /* + * TODO: atomisp_css_preview_configure_pp_input() not + * reset due to CSS bug tracked as PSI BZ 115124 + */ +} + +static int atomisp_set_fmt_to_isp(struct video_device *vdev, + struct atomisp_css_frame_info *output_info, + struct atomisp_css_frame_info *raw_output_info, + struct v4l2_pix_format *pix, + unsigned int source_pad) +{ + struct camera_mipi_info *mipi_info; + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + const struct atomisp_format_bridge *format; + struct v4l2_rect *isp_sink_crop; + enum atomisp_css_pipe_id pipe_id; + struct v4l2_subdev_fh fh; + int (*configure_output)(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format sh_fmt) = + configure_output_nop; + int (*get_frame_info)(struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *finfo) = + get_frame_info_nop; + int (*configure_pp_input)(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) = + configure_pp_input_nop; + uint16_t stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + const struct atomisp_in_fmt_conv *fc; + int ret; + + v4l2_fh_init(&fh.vfh, vdev); + + isp_sink_crop = atomisp_subdev_get_rect( + &asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, V4L2_SEL_TGT_CROP); + + format = atomisp_get_format_bridge(pix->pixelformat); + if (format == NULL) + return -EINVAL; + + if (isp->inputs[asd->input_curr].type != TEST_PATTERN && + isp->inputs[asd->input_curr].type != FILE_INPUT) { + mipi_info = atomisp_to_sensor_mipi_info( + isp->inputs[asd->input_curr].camera); + if (!mipi_info) { + dev_err(isp->dev, "mipi_info is NULL\n"); + return -EINVAL; + } + if (atomisp_set_sensor_mipi_to_isp(asd, stream_index, + mipi_info)) + return -EINVAL; + fc = atomisp_find_in_fmt_conv_by_atomisp_in_fmt( + mipi_info->input_format); + if (!fc) + fc = atomisp_find_in_fmt_conv( + atomisp_subdev_get_ffmt(&asd->subdev, + NULL, V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK)->code); + if (!fc) + return -EINVAL; + if (format->sh_fmt == CSS_FRAME_FORMAT_RAW && + raw_output_format_match_input(fc->css_stream_fmt, + pix->pixelformat)) + return -EINVAL; + } + + /* + * Configure viewfinder also when vfpp is disabled: the + * CSS still requires viewfinder configuration. + */ + if (asd->fmt_auto->val || + asd->vfpp->val != ATOMISP_VFPP_ENABLE) { + struct v4l2_rect vf_size = {0}; + struct v4l2_mbus_framefmt vf_ffmt = {0}; + + if (pix->width < 640 || pix->height < 480) { + vf_size.width = pix->width; + vf_size.height = pix->height; + } else { + vf_size.width = 640; + vf_size.height = 480; + } + + /* FIXME: proper format name for this one. See + atomisp_output_fmts[] in atomisp_v4l2.c */ + vf_ffmt.code = V4L2_MBUS_FMT_CUSTOM_YUV420; + + atomisp_subdev_set_selection(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_VF, + V4L2_SEL_TGT_COMPOSE, 0, &vf_size); + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_VF, &vf_ffmt); + asd->video_out_vf.sh_fmt = CSS_FRAME_FORMAT_NV12; + + if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { + atomisp_css_video_configure_viewfinder(asd, + vf_size.width, vf_size.height, 0, + asd->video_out_vf.sh_fmt); + } else if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW || + source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) + atomisp_css_video_configure_viewfinder(asd, + vf_size.width, vf_size.height, 0, + asd->video_out_vf.sh_fmt); + else + atomisp_css_capture_configure_viewfinder(asd, + vf_size.width, vf_size.height, 0, + asd->video_out_vf.sh_fmt); + } else if (source_pad != ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW || + asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) { + atomisp_css_capture_configure_viewfinder(asd, + vf_size.width, vf_size.height, 0, + asd->video_out_vf.sh_fmt); + } + } + + if (asd->continuous_mode->val) { + ret = __enable_continuous_mode(asd, true); + if (ret) + return -EINVAL; + } + + atomisp_css_input_set_mode(asd, CSS_INPUT_MODE_SENSOR); + atomisp_css_disable_vf_pp(asd, + asd->vfpp->val != ATOMISP_VFPP_ENABLE); + + /* ISP2401 new input system need to use copy pipe */ + if (asd->copy_mode) { + pipe_id = CSS_PIPE_ID_COPY; + atomisp_css_capture_enable_online(asd, stream_index, false); + } else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { + /* video same in continuouscapture and online modes */ + configure_output = atomisp_css_video_configure_output; + get_frame_info = atomisp_css_video_get_output_frame_info; + pipe_id = CSS_PIPE_ID_VIDEO; + } else if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + if (!asd->continuous_mode->val) { + configure_output = atomisp_css_video_configure_output; + get_frame_info = + atomisp_css_video_get_output_frame_info; + pipe_id = CSS_PIPE_ID_VIDEO; + } else { + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW || + source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { + configure_output = + atomisp_css_video_configure_output; + get_frame_info = + atomisp_css_video_get_output_frame_info; + configure_pp_input = + atomisp_css_video_configure_pp_input; + pipe_id = CSS_PIPE_ID_VIDEO; + } else { + configure_output = + atomisp_css_capture_configure_output; + get_frame_info = + atomisp_css_capture_get_output_frame_info; + configure_pp_input = + atomisp_css_capture_configure_pp_input; + pipe_id = CSS_PIPE_ID_CAPTURE; + + atomisp_update_capture_mode(asd); + atomisp_css_capture_enable_online(asd, stream_index, false); + } + } + } else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) { + configure_output = atomisp_css_preview_configure_output; + get_frame_info = atomisp_css_preview_get_output_frame_info; + configure_pp_input = atomisp_css_preview_configure_pp_input; + pipe_id = CSS_PIPE_ID_PREVIEW; + } else { + /* CSS doesn't support low light mode on SOC cameras, so disable + * it. FIXME: if this is done elsewhere, it gives corrupted + * colors into thumbnail image. + */ + if (isp->inputs[asd->input_curr].type == SOC_CAMERA) + asd->params.low_light = false; + + if (format->sh_fmt == CSS_FRAME_FORMAT_RAW) { + atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_RAW); + atomisp_css_enable_dz(asd, false); + } else { + atomisp_update_capture_mode(asd); + } + + if (!asd->continuous_mode->val) + /* in case of ANR, force capture pipe to offline mode */ + atomisp_css_capture_enable_online(asd, stream_index, + asd->params.low_light ? + false : asd->params.online_process); + + configure_output = atomisp_css_capture_configure_output; + get_frame_info = atomisp_css_capture_get_output_frame_info; + configure_pp_input = atomisp_css_capture_configure_pp_input; + pipe_id = CSS_PIPE_ID_CAPTURE; + + if (!asd->params.online_process && + !asd->continuous_mode->val) { + ret = atomisp_css_capture_get_output_raw_frame_info(asd, + raw_output_info); + if (ret) + return ret; + } + if (!asd->continuous_mode->val && asd->run_mode->val + != ATOMISP_RUN_MODE_STILL_CAPTURE) { + dev_err(isp->dev, + "Need to set the running mode first\n"); + asd->run_mode->val = ATOMISP_RUN_MODE_STILL_CAPTURE; + } + } + + /* + * to SOC camera, use yuvpp pipe. + */ + if (ATOMISP_USE_YUVPP(asd)) + pipe_id = CSS_PIPE_ID_YUVPP; + + if (asd->copy_mode) + ret = atomisp_css_copy_configure_output(asd, stream_index, + pix->width, pix->height, + format->planar ? pix->bytesperline : + pix->bytesperline * 8 / format->depth, + format->sh_fmt); + else + ret = configure_output(asd, pix->width, pix->height, + format->planar ? pix->bytesperline : + pix->bytesperline * 8 / format->depth, + format->sh_fmt); + if (ret) { + dev_err(isp->dev, "configure_output %ux%u, format %8.8x\n", + pix->width, pix->height, format->sh_fmt); + return -EINVAL; + } + + if (asd->continuous_mode->val && + (configure_pp_input == atomisp_css_preview_configure_pp_input || + configure_pp_input == atomisp_css_video_configure_pp_input)) { + /* for isp 2.2, configure pp input is available for continuous + * mode */ + ret = configure_pp_input(asd, isp_sink_crop->width, + isp_sink_crop->height); + if (ret) { + dev_err(isp->dev, "configure_pp_input %ux%u\n", + isp_sink_crop->width, + isp_sink_crop->height); + return -EINVAL; + } + } else { + ret = configure_pp_input(asd, isp_sink_crop->width, + isp_sink_crop->height); + if (ret) { + dev_err(isp->dev, "configure_pp_input %ux%u\n", + isp_sink_crop->width, isp_sink_crop->height); + return -EINVAL; + } + } + if (asd->copy_mode) + ret = atomisp_css_copy_get_output_frame_info(asd, stream_index, + output_info); + else + ret = get_frame_info(asd, output_info); + if (ret) { + dev_err(isp->dev, "get_frame_info %ux%u (padded to %u)\n", + pix->width, pix->height, pix->bytesperline); + return -EINVAL; + } + + atomisp_update_grid_info(asd, pipe_id, source_pad); + + /* Free the raw_dump buffer first */ + atomisp_css_frame_free(asd->raw_output_frame); + asd->raw_output_frame = NULL; + + if (!asd->continuous_mode->val && + !asd->params.online_process && !isp->sw_contex.file_input && + atomisp_css_frame_allocate_from_info(&asd->raw_output_frame, + raw_output_info)) + return -ENOMEM; + + return 0; +} + +static void atomisp_get_dis_envelop(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int *dvs_env_w, unsigned int *dvs_env_h) +{ + struct atomisp_device *isp = asd->isp; + + /* if subdev type is SOC camera,we do not need to set DVS */ + if (isp->inputs[asd->input_curr].type == SOC_CAMERA) + asd->params.video_dis_en = false; + + if (asd->params.video_dis_en && + asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + /* envelope is 20% of the output resolution */ + /* + * dvs envelope cannot be round up. + * it would cause ISP timeout and color switch issue + */ + *dvs_env_w = rounddown(width / 5, ATOM_ISP_STEP_WIDTH); + *dvs_env_h = rounddown(height / 5, ATOM_ISP_STEP_HEIGHT); + } + + asd->params.dis_proj_data_valid = false; + asd->params.css_update_params_needed = true; +} + +static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, + int source_pad, struct v4l2_format *f) +{ +#if defined(ISP2401_NEW_INPUT_SYSTEM) + struct v4l2_mbus_framefmt *sink, *src; + + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK); + src = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, source_pad); + + if ((sink->code == src->code && + sink->width == f->fmt.pix.width && + sink->height == f->fmt.pix.height) || + ((asd->isp->inputs[asd->input_curr].type == SOC_CAMERA) && + (asd->isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num > 1))) + asd->copy_mode = true; + else +#endif + /* Only used for the new input system */ + asd->copy_mode = false; + + dev_dbg(asd->isp->dev, "copy_mode: %d\n", asd->copy_mode); + +} + +static int atomisp_set_fmt_to_snr(struct video_device *vdev, + struct v4l2_format *f, unsigned int pixelformat, + unsigned int padding_w, unsigned int padding_h, + unsigned int dvs_env_w, unsigned int dvs_env_h) +{ + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + const struct atomisp_format_bridge *format; + struct v4l2_subdev_pad_config pad_cfg; + struct v4l2_subdev_format vformat = { + .which = V4L2_SUBDEV_FORMAT_TRY, + }; + struct v4l2_mbus_framefmt *ffmt = &vformat.format; + struct v4l2_mbus_framefmt *req_ffmt; + struct atomisp_device *isp = asd->isp; + struct atomisp_input_stream_info *stream_info = + (struct atomisp_input_stream_info *)ffmt->reserved; + uint16_t stream_index = ATOMISP_INPUT_STREAM_GENERAL; + int source_pad = atomisp_subdev_source_pad(vdev); + struct v4l2_subdev_fh fh; + int ret; + + v4l2_fh_init(&fh.vfh, vdev); + + stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + + format = atomisp_get_format_bridge(pixelformat); + if (format == NULL) + return -EINVAL; + + v4l2_fill_mbus_format(ffmt, &f->fmt.pix, format->mbus_code); + ffmt->height += padding_h + dvs_env_h; + ffmt->width += padding_w + dvs_env_w; + + dev_dbg(isp->dev, "s_mbus_fmt: ask %ux%u (padding %ux%u, dvs %ux%u)\n", + ffmt->width, ffmt->height, padding_w, padding_h, + dvs_env_w, dvs_env_h); + + __atomisp_init_stream_info(stream_index, stream_info); + + req_ffmt = ffmt; + + /* Disable dvs if resolution can't be supported by sensor */ + if (asd->params.video_dis_en && + source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { + vformat.which = V4L2_SUBDEV_FORMAT_TRY; + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + pad, set_fmt, &pad_cfg, &vformat); + if (ret) + return ret; + if (ffmt->width < req_ffmt->width || + ffmt->height < req_ffmt->height) { + req_ffmt->height -= dvs_env_h; + req_ffmt->width -= dvs_env_w; + ffmt = req_ffmt; + dev_warn(isp->dev, + "can not enable video dis due to sensor limitation."); + asd->params.video_dis_en = false; + } + } + dev_dbg(isp->dev, "sensor width: %d, height: %d\n", + ffmt->width, ffmt->height); + vformat.which = V4L2_SUBDEV_FORMAT_ACTIVE; + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, + set_fmt, NULL, &vformat); + if (ret) + return ret; + + __atomisp_update_stream_env(asd, stream_index, stream_info); + + dev_dbg(isp->dev, "sensor width: %d, height: %d\n", + ffmt->width, ffmt->height); + + if (ffmt->width < ATOM_ISP_STEP_WIDTH || + ffmt->height < ATOM_ISP_STEP_HEIGHT) + return -EINVAL; + + if (asd->params.video_dis_en && + source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO && + (ffmt->width < req_ffmt->width || ffmt->height < req_ffmt->height)) { + dev_warn(isp->dev, + "can not enable video dis due to sensor limitation."); + asd->params.video_dis_en = false; + } + + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, ffmt); + + return css_input_resolution_changed(asd, ffmt); +} + +int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) +{ + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + const struct atomisp_format_bridge *format_bridge; + const struct atomisp_format_bridge *snr_format_bridge; + struct atomisp_css_frame_info output_info, raw_output_info; + struct v4l2_format snr_fmt = *f; + struct v4l2_format backup_fmt = *f, s_fmt = *f; + unsigned int dvs_env_w = 0, dvs_env_h = 0; + unsigned int padding_w = pad_w, padding_h = pad_h; + bool res_overflow = false, crop_needs_override = false; + struct v4l2_mbus_framefmt isp_sink_fmt; + struct v4l2_mbus_framefmt isp_source_fmt = {0}; + struct v4l2_rect isp_sink_crop; + uint16_t source_pad = atomisp_subdev_source_pad(vdev); + struct v4l2_subdev_fh fh; + int ret; + + dev_dbg(isp->dev, + "setting resolution %ux%u on pad %u for asd%d, bytesperline %u\n", + f->fmt.pix.width, f->fmt.pix.height, source_pad, + asd->index, f->fmt.pix.bytesperline); + + if (source_pad >= ATOMISP_SUBDEV_PADS_NUM) + return -EINVAL; + + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED) { + dev_warn(isp->dev, "ISP does not support set format while at streaming!\n"); + return -EBUSY; + } + + v4l2_fh_init(&fh.vfh, vdev); + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (format_bridge == NULL) + return -EINVAL; + + pipe->sh_fmt = format_bridge->sh_fmt; + pipe->pix.pixelformat = f->fmt.pix.pixelformat; + + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VF || + (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW + && asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO)) { + if (asd->fmt_auto->val) { + struct v4l2_rect *capture_comp; + struct v4l2_rect r = {0}; + + r.width = f->fmt.pix.width; + r.height = f->fmt.pix.height; + + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) + capture_comp = atomisp_subdev_get_rect( + &asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_VIDEO, + V4L2_SEL_TGT_COMPOSE); + else + capture_comp = atomisp_subdev_get_rect( + &asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE, + V4L2_SEL_TGT_COMPOSE); + + if (capture_comp->width < r.width + || capture_comp->height < r.height) { + r.width = capture_comp->width; + r.height = capture_comp->height; + } + + atomisp_subdev_set_selection( + &asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, source_pad, + V4L2_SEL_TGT_COMPOSE, 0, &r); + + f->fmt.pix.width = r.width; + f->fmt.pix.height = r.height; + } + + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && + (asd->isp->inputs[asd->input_curr].type == SOC_CAMERA) && + (asd->isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num > 1)) { + /* For M10MO outputing YUV preview images. */ + uint16_t video_index = + atomisp_source_pad_to_stream_id(asd, + ATOMISP_SUBDEV_PAD_SOURCE_VIDEO); + + ret = atomisp_css_copy_get_output_frame_info(asd, + video_index, &output_info); + if (ret) { + dev_err(isp->dev, + "copy_get_output_frame_info ret %i", ret); + return -EINVAL; + } + if (!asd->yuvpp_mode) { + /* + * If viewfinder was configured into copy_mode, + * we switch to using yuvpp pipe instead. + */ + asd->yuvpp_mode = true; + ret = atomisp_css_copy_configure_output( + asd, video_index, 0, 0, 0, 0); + if (ret) { + dev_err(isp->dev, + "failed to disable copy pipe"); + return -EINVAL; + } + ret = atomisp_css_yuvpp_configure_output( + asd, video_index, + output_info.res.width, + output_info.res.height, + output_info.padded_width, + output_info.format); + if (ret) { + dev_err(isp->dev, + "failed to set up yuvpp pipe\n"); + return -EINVAL; + } + atomisp_css_video_enable_online(asd, false); + atomisp_css_preview_enable_online(asd, + ATOMISP_INPUT_STREAM_GENERAL, false); + } + atomisp_css_yuvpp_configure_viewfinder(asd, video_index, + f->fmt.pix.width, f->fmt.pix.height, + format_bridge->planar ? f->fmt.pix.bytesperline + : f->fmt.pix.bytesperline * 8 + / format_bridge->depth, format_bridge->sh_fmt); + atomisp_css_yuvpp_get_viewfinder_frame_info( + asd, video_index, &output_info); + } else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) { + atomisp_css_video_configure_viewfinder(asd, + f->fmt.pix.width, f->fmt.pix.height, + format_bridge->planar ? f->fmt.pix.bytesperline + : f->fmt.pix.bytesperline * 8 + / format_bridge->depth, format_bridge->sh_fmt); + atomisp_css_video_get_viewfinder_frame_info(asd, + &output_info); + asd->copy_mode = false; + } else { + atomisp_css_capture_configure_viewfinder(asd, + f->fmt.pix.width, f->fmt.pix.height, + format_bridge->planar ? f->fmt.pix.bytesperline + : f->fmt.pix.bytesperline * 8 + / format_bridge->depth, format_bridge->sh_fmt); + atomisp_css_capture_get_viewfinder_frame_info(asd, + &output_info); + asd->copy_mode = false; + } + + goto done; + } + /* + * Check whether main resolution configured smaller + * than snapshot resolution. If so, force main resolution + * to be the same as snapshot resolution + */ + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) { + struct v4l2_rect *r; + + r = atomisp_subdev_get_rect( + &asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_VF, V4L2_SEL_TGT_COMPOSE); + + if (r->width && r->height + && (r->width > f->fmt.pix.width + || r->height > f->fmt.pix.height)) + dev_warn(isp->dev, + "Main Resolution config smaller then Vf Resolution. Force to be equal with Vf Resolution."); + } + + /* Pipeline configuration done through subdevs. Bail out now. */ + if (!asd->fmt_auto->val) + goto set_fmt_to_isp; + + /* get sensor resolution and format */ + ret = atomisp_try_fmt(vdev, &snr_fmt, &res_overflow); + if (ret) + return ret; + f->fmt.pix.width = snr_fmt.fmt.pix.width; + f->fmt.pix.height = snr_fmt.fmt.pix.height; + + snr_format_bridge = + atomisp_get_format_bridge(snr_fmt.fmt.pix.pixelformat); + if (!snr_format_bridge) + return -EINVAL; + + atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK)->code = + snr_format_bridge->mbus_code; + + isp_sink_fmt = *atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); + + isp_source_fmt.code = format_bridge->mbus_code; + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + source_pad, &isp_source_fmt); + + if (!atomisp_subdev_format_conversion(asd, source_pad)) { + padding_w = 0; + padding_h = 0; + } else if (IS_BYT) { + padding_w = 12; + padding_h = 12; + } + + /* construct resolution supported by isp */ + if (res_overflow && !asd->continuous_mode->val) { + f->fmt.pix.width = rounddown( + clamp_t(u32, f->fmt.pix.width - padding_w, + ATOM_ISP_MIN_WIDTH, + ATOM_ISP_MAX_WIDTH), ATOM_ISP_STEP_WIDTH); + f->fmt.pix.height = rounddown( + clamp_t(u32, f->fmt.pix.height - padding_h, + ATOM_ISP_MIN_HEIGHT, + ATOM_ISP_MAX_HEIGHT), ATOM_ISP_STEP_HEIGHT); + } + + atomisp_get_dis_envelop(asd, f->fmt.pix.width, f->fmt.pix.height, + &dvs_env_w, &dvs_env_h); + + if (asd->continuous_mode->val) { + struct v4l2_rect *r; + + r = atomisp_subdev_get_rect( + &asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE, + V4L2_SEL_TGT_COMPOSE); + /* + * The ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE should get resolutions + * properly set otherwise, it should not be the capture_pad. + */ + if (r->width && r->height) + asd->capture_pad = ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE; + else + asd->capture_pad = source_pad; + } else { + asd->capture_pad = source_pad; + } + /* + * set format info to sensor + * In continuous mode, resolution is set only if it is higher than + * existing value. This because preview pipe will be configured after + * capture pipe and usually has lower resolution than capture pipe. + */ + if (!asd->continuous_mode->val || + isp_sink_fmt.width < (f->fmt.pix.width + padding_w + dvs_env_w) || + isp_sink_fmt.height < (f->fmt.pix.height + padding_h + + dvs_env_h)) { + /* + * For jpeg or custom raw format the sensor will return constant + * width and height. Because we already had quried try_mbus_fmt, + * f->fmt.pix.width and f->fmt.pix.height has been changed to + * this fixed width and height. So we cannot select the correct + * resolution with that information. So use the original width + * and height while set_mbus_fmt() so actual resolutions are + * being used in while set media bus format. + */ + s_fmt = *f; + if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_JPEG || + f->fmt.pix.pixelformat == V4L2_PIX_FMT_CUSTOM_M10MO_RAW) { + s_fmt.fmt.pix.width = backup_fmt.fmt.pix.width; + s_fmt.fmt.pix.height = backup_fmt.fmt.pix.height; + } + ret = atomisp_set_fmt_to_snr(vdev, &s_fmt, + f->fmt.pix.pixelformat, padding_w, + padding_h, dvs_env_w, dvs_env_h); + if (ret) + return -EINVAL; + + atomisp_csi_lane_config(isp); + crop_needs_override = true; + } + + atomisp_check_copy_mode(asd, source_pad, &backup_fmt); + asd->yuvpp_mode = false; /* Reset variable */ + + isp_sink_crop = *atomisp_subdev_get_rect(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, + V4L2_SEL_TGT_CROP); + + /* Try to enable YUV downscaling if ISP input is 10 % (either + * width or height) bigger than the desired result. */ + if (isp_sink_crop.width * 9 / 10 < f->fmt.pix.width || + isp_sink_crop.height * 9 / 10 < f->fmt.pix.height || + (atomisp_subdev_format_conversion(asd, source_pad) && + ((asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + !asd->continuous_mode->val) || + asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER))) { + /* for continuous mode, preview size might be smaller than + * still capture size. if preview size still needs crop, + * pick the larger one between crop size of preview and + * still capture. + */ + if (asd->continuous_mode->val + && source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW + && !crop_needs_override) { + isp_sink_crop.width = + max_t(unsigned int, f->fmt.pix.width, + isp_sink_crop.width); + isp_sink_crop.height = + max_t(unsigned int, f->fmt.pix.height, + isp_sink_crop.height); + } else { + isp_sink_crop.width = f->fmt.pix.width; + isp_sink_crop.height = f->fmt.pix.height; + } + + atomisp_subdev_set_selection(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, + V4L2_SEL_TGT_CROP, + V4L2_SEL_FLAG_KEEP_CONFIG, + &isp_sink_crop); + atomisp_subdev_set_selection(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + source_pad, V4L2_SEL_TGT_COMPOSE, + 0, &isp_sink_crop); + } else if (IS_MOFD) { + struct v4l2_rect main_compose = {0}; + + main_compose.width = isp_sink_crop.width; + main_compose.height = + DIV_ROUND_UP(main_compose.width * f->fmt.pix.height, + f->fmt.pix.width); + if (main_compose.height > isp_sink_crop.height) { + main_compose.height = isp_sink_crop.height; + main_compose.width = + DIV_ROUND_UP(main_compose.height * + f->fmt.pix.width, + f->fmt.pix.height); + } + + atomisp_subdev_set_selection(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + source_pad, + V4L2_SEL_TGT_COMPOSE, 0, + &main_compose); + } else { + struct v4l2_rect sink_crop = {0}; + struct v4l2_rect main_compose = {0}; + + main_compose.width = f->fmt.pix.width; + main_compose.height = f->fmt.pix.height; + +#ifndef ISP2401 + /* WORKAROUND: this override is universally enabled in + * GMIN to work around a CTS failures (GMINL-539) + * which appears to be related by a hardware + * performance limitation. It's unclear why this + * particular code triggers the issue. */ + if (1 || + crop_needs_override) { +#else + if (crop_needs_override) { +#endif + if (isp_sink_crop.width * main_compose.height > + isp_sink_crop.height * main_compose.width) { + sink_crop.height = isp_sink_crop.height; + sink_crop.width = DIV_NEAREST_STEP( + sink_crop.height * + f->fmt.pix.width, + f->fmt.pix.height, + ATOM_ISP_STEP_WIDTH); + } else { + sink_crop.width = isp_sink_crop.width; + sink_crop.height = DIV_NEAREST_STEP( + sink_crop.width * + f->fmt.pix.height, + f->fmt.pix.width, + ATOM_ISP_STEP_HEIGHT); + } + atomisp_subdev_set_selection(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, + V4L2_SEL_TGT_CROP, + V4L2_SEL_FLAG_KEEP_CONFIG, + &sink_crop); + } + atomisp_subdev_set_selection(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + source_pad, + V4L2_SEL_TGT_COMPOSE, 0, + &main_compose); + } + +set_fmt_to_isp: + ret = atomisp_set_fmt_to_isp(vdev, &output_info, &raw_output_info, + &f->fmt.pix, source_pad); + if (ret) + return -EINVAL; +done: + pipe->pix.width = f->fmt.pix.width; + pipe->pix.height = f->fmt.pix.height; + pipe->pix.pixelformat = f->fmt.pix.pixelformat; + if (format_bridge->planar) { + pipe->pix.bytesperline = output_info.padded_width; + pipe->pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * + DIV_ROUND_UP(format_bridge->depth * + output_info.padded_width, 8)); + } else { + pipe->pix.bytesperline = + DIV_ROUND_UP(format_bridge->depth * + output_info.padded_width, 8); + pipe->pix.sizeimage = + PAGE_ALIGN(f->fmt.pix.height * pipe->pix.bytesperline); + + } + if (f->fmt.pix.field == V4L2_FIELD_ANY) + f->fmt.pix.field = V4L2_FIELD_NONE; + pipe->pix.field = f->fmt.pix.field; + + f->fmt.pix = pipe->pix; + f->fmt.pix.priv = PAGE_ALIGN(pipe->pix.width * + pipe->pix.height * 2); + + pipe->capq.field = f->fmt.pix.field; + + /* + * If in video 480P case, no GFX throttle + */ + if (asd->run_mode->val == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO && + f->fmt.pix.width == 720 && f->fmt.pix.height == 480) + isp->need_gfx_throttle = false; + else + isp->need_gfx_throttle = true; + + return 0; +} + +int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f) +{ + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct v4l2_mbus_framefmt ffmt = {0}; + const struct atomisp_format_bridge *format_bridge; + struct v4l2_subdev_fh fh; + int ret; + + v4l2_fh_init(&fh.vfh, vdev); + + dev_dbg(isp->dev, "setting fmt %ux%u 0x%x for file inject\n", + f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.pixelformat); + ret = atomisp_try_fmt_file(isp, f); + if (ret) { + dev_err(isp->dev, "atomisp_try_fmt_file err: %d\n", ret); + return ret; + } + + format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); + if (format_bridge == NULL) { + dev_dbg(isp->dev, "atomisp_get_format_bridge err! fmt:0x%x\n", + f->fmt.pix.pixelformat); + return -EINVAL; + } + + pipe->pix = f->fmt.pix; + atomisp_css_input_set_mode(asd, CSS_INPUT_MODE_FIFO); + atomisp_css_input_configure_port(asd, + __get_mipi_port(isp, ATOMISP_CAMERA_PORT_PRIMARY), 2, 0xffff4, + 0, 0, 0, 0); + ffmt.width = f->fmt.pix.width; + ffmt.height = f->fmt.pix.height; + ffmt.code = format_bridge->mbus_code; + + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, &ffmt); + + return 0; +} + +int atomisp_set_shading_table(struct atomisp_sub_device *asd, + struct atomisp_shading_table *user_shading_table) +{ + struct atomisp_css_shading_table *shading_table; + struct atomisp_css_shading_table *free_table; + unsigned int len_table; + int i; + int ret = 0; + + if (!user_shading_table) + return -EINVAL; + + if (!user_shading_table->enable) { + atomisp_css_set_shading_table(asd, NULL); + asd->params.sc_en = false; + return 0; + } + + /* If enabling, all tables must be set */ + for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { + if (!user_shading_table->data[i]) + return -EINVAL; + } + + /* Shading table size per color */ + if (user_shading_table->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + user_shading_table->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) + return -EINVAL; + + shading_table = atomisp_css_shading_table_alloc( + user_shading_table->width, user_shading_table->height); + if (!shading_table) + return -ENOMEM; + + len_table = user_shading_table->width * user_shading_table->height * + ATOMISP_SC_TYPE_SIZE; + for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { + ret = copy_from_user(shading_table->data[i], + (void __user *)user_shading_table->data[i], + len_table); + if (ret) { + free_table = shading_table; + ret = -EFAULT; + goto out; + } + } + shading_table->sensor_width = user_shading_table->sensor_width; + shading_table->sensor_height = user_shading_table->sensor_height; + shading_table->fraction_bits = user_shading_table->fraction_bits; + + free_table = asd->params.css_param.shading_table; + asd->params.css_param.shading_table = shading_table; + atomisp_css_set_shading_table(asd, shading_table); + asd->params.sc_en = true; + +out: + if (free_table != NULL) + atomisp_css_shading_table_free(free_table); + + return ret; +} + +/*Turn off ISP dphy */ +int atomisp_ospm_dphy_down(struct atomisp_device *isp) +{ + unsigned long flags; + u32 reg; + + dev_dbg(isp->dev, "%s\n", __func__); + + /* if ISP timeout, we can force powerdown */ + if (isp->isp_timeout) + goto done; + + if (!atomisp_dev_users(isp)) + goto done; + + spin_lock_irqsave(&isp->lock, flags); + isp->sw_contex.power_state = ATOM_ISP_POWER_DOWN; + spin_unlock_irqrestore(&isp->lock, flags); +done: + /* + * MRFLD IUNIT DPHY is located in an always-power-on island + * MRFLD HW design need all CSI ports are disabled before + * powering down the IUNIT. + */ + pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, ®); + reg |= MRFLD_ALL_CSI_PORTS_OFF_MASK; + pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, reg); + return 0; +} + +/*Turn on ISP dphy */ +int atomisp_ospm_dphy_up(struct atomisp_device *isp) +{ + unsigned long flags; + dev_dbg(isp->dev, "%s\n", __func__); + + spin_lock_irqsave(&isp->lock, flags); + isp->sw_contex.power_state = ATOM_ISP_POWER_UP; + spin_unlock_irqrestore(&isp->lock, flags); + + return 0; +} + + +int atomisp_exif_makernote(struct atomisp_sub_device *asd, + struct atomisp_makernote_info *config) +{ + struct v4l2_control ctrl; + struct atomisp_device *isp = asd->isp; + + ctrl.id = V4L2_CID_FOCAL_ABSOLUTE; + if (v4l2_g_ctrl + (isp->inputs[asd->input_curr].camera->ctrl_handler, &ctrl)) { + dev_warn(isp->dev, "failed to g_ctrl for focal length\n"); + return -EINVAL; + } else { + config->focal_length = ctrl.value; + } + + ctrl.id = V4L2_CID_FNUMBER_ABSOLUTE; + if (v4l2_g_ctrl + (isp->inputs[asd->input_curr].camera->ctrl_handler, &ctrl)) { + dev_warn(isp->dev, "failed to g_ctrl for f-number\n"); + return -EINVAL; + } else { + config->f_number_curr = ctrl.value; + } + + ctrl.id = V4L2_CID_FNUMBER_RANGE; + if (v4l2_g_ctrl + (isp->inputs[asd->input_curr].camera->ctrl_handler, &ctrl)) { + dev_warn(isp->dev, "failed to g_ctrl for f number range\n"); + return -EINVAL; + } else { + config->f_number_range = ctrl.value; + } + + return 0; +} + +int atomisp_offline_capture_configure(struct atomisp_sub_device *asd, + struct atomisp_cont_capture_conf *cvf_config) +{ + struct v4l2_ctrl *c; + + /* + * In case of M10MO ZSL capture case, we need to issue a separate + * capture request to M10MO which will output captured jpeg image + */ + c = v4l2_ctrl_find( + asd->isp->inputs[asd->input_curr].camera->ctrl_handler, + V4L2_CID_START_ZSL_CAPTURE); + if (c) { + int ret; + dev_dbg(asd->isp->dev, "%s trigger ZSL capture request\n", + __func__); + /* TODO: use the cvf_config */ + ret = v4l2_ctrl_s_ctrl(c, 1); + if (ret) + return ret; + + return v4l2_ctrl_s_ctrl(c, 0); + } + + asd->params.offline_parm = *cvf_config; + + if (asd->params.offline_parm.num_captures) { + if (asd->streaming == ATOMISP_DEVICE_STREAMING_DISABLED) { + unsigned int init_raw_num; + + if (asd->enable_raw_buffer_lock->val) { + init_raw_num = + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES_LOCK_EN; + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + asd->params.video_dis_en) + init_raw_num += + ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; + } else { + init_raw_num = + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES; + } + + /* TODO: this can be removed once user-space + * has been updated to use control API */ + asd->continuous_raw_buffer_size->val = + max_t(int, + asd->continuous_raw_buffer_size->val, + asd->params.offline_parm. + num_captures + init_raw_num); + asd->continuous_raw_buffer_size->val = + min_t(int, ATOMISP_CONT_RAW_FRAMES, + asd->continuous_raw_buffer_size->val); + } + asd->continuous_mode->val = true; + } else { + asd->continuous_mode->val = false; + __enable_continuous_mode(asd, false); + } + + return 0; +} + +/* + * set auto exposure metering window to camera sensor + */ +int atomisp_s_ae_window(struct atomisp_sub_device *asd, + struct atomisp_ae_window *arg) +{ + struct atomisp_device *isp = asd->isp; + /* Coverity CID 298071 - initialzize struct */ + struct v4l2_subdev_selection sel = { 0 }; + + sel.r.left = arg->x_left; + sel.r.top = arg->y_top; + sel.r.width = arg->x_right - arg->x_left + 1; + sel.r.height = arg->y_bottom - arg->y_top + 1; + + if (v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + pad, set_selection, NULL, &sel)) { + dev_err(isp->dev, "failed to call sensor set_selection.\n"); + return -EINVAL; + } + + return 0; +} + +int atomisp_flash_enable(struct atomisp_sub_device *asd, int num_frames) +{ + struct atomisp_device *isp = asd->isp; + + if (num_frames < 0) { + dev_dbg(isp->dev, "%s ERROR: num_frames: %d\n", __func__, + num_frames); + return -EINVAL; + } + /* a requested flash is still in progress. */ + if (num_frames && asd->params.flash_state != ATOMISP_FLASH_IDLE) { + dev_dbg(isp->dev, "%s flash busy: %d frames left: %d\n", + __func__, asd->params.flash_state, + asd->params.num_flash_frames); + return -EBUSY; + } + + asd->params.num_flash_frames = num_frames; + asd->params.flash_state = ATOMISP_FLASH_REQUESTED; + return 0; +} + +int atomisp_source_pad_to_stream_id(struct atomisp_sub_device *asd, + uint16_t source_pad) +{ + int stream_id; + struct atomisp_device *isp = asd->isp; + + if (isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num == 1) + return ATOMISP_INPUT_STREAM_GENERAL; + + switch (source_pad) { + case ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE: + stream_id = ATOMISP_INPUT_STREAM_CAPTURE; + break; + case ATOMISP_SUBDEV_PAD_SOURCE_VF: + stream_id = ATOMISP_INPUT_STREAM_POSTVIEW; + break; + case ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW: + stream_id = ATOMISP_INPUT_STREAM_PREVIEW; + break; + case ATOMISP_SUBDEV_PAD_SOURCE_VIDEO: + stream_id = ATOMISP_INPUT_STREAM_VIDEO; + break; + default: + stream_id = ATOMISP_INPUT_STREAM_GENERAL; + } + + return stream_id; +} + +bool atomisp_is_vf_pipe(struct atomisp_video_pipe *pipe) +{ + struct atomisp_sub_device *asd = pipe->asd; + + if (pipe == &asd->video_out_vf) + return true; + + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + pipe == &asd->video_out_preview) + return true; + + return false; +} + +static int __checking_exp_id(struct atomisp_sub_device *asd, int exp_id) +{ + struct atomisp_device *isp = asd->isp; + + if (!asd->enable_raw_buffer_lock->val) { + dev_warn(isp->dev, "%s Raw Buffer Lock is disable.\n", __func__); + return -EINVAL; + } + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) { + dev_err(isp->dev, "%s streaming %d invalid exp_id %d.\n", + __func__, exp_id, asd->streaming); + return -EINVAL; + } + if ((exp_id > ATOMISP_MAX_EXP_ID) || (exp_id <= 0)) { + dev_err(isp->dev, "%s exp_id %d invalid.\n", __func__, exp_id); + return -EINVAL; + } + return 0; +} + +void atomisp_init_raw_buffer_bitmap(struct atomisp_sub_device *asd) +{ + unsigned long flags; + spin_lock_irqsave(&asd->raw_buffer_bitmap_lock, flags); + memset(asd->raw_buffer_bitmap, 0, sizeof(asd->raw_buffer_bitmap)); + asd->raw_buffer_locked_count = 0; + spin_unlock_irqrestore(&asd->raw_buffer_bitmap_lock, flags); +} + +int atomisp_set_raw_buffer_bitmap(struct atomisp_sub_device *asd, int exp_id) +{ + int *bitmap, bit; + unsigned long flags; + + if (__checking_exp_id(asd, exp_id)) + return -EINVAL; + + bitmap = asd->raw_buffer_bitmap + exp_id / 32; + bit = exp_id % 32; + spin_lock_irqsave(&asd->raw_buffer_bitmap_lock, flags); + (*bitmap) |= (1 << bit); + asd->raw_buffer_locked_count++; + spin_unlock_irqrestore(&asd->raw_buffer_bitmap_lock, flags); + + dev_dbg(asd->isp->dev, "%s: exp_id %d, raw_buffer_locked_count %d\n", + __func__, exp_id, asd->raw_buffer_locked_count); + + /* Check if the raw buffer after next is still locked!!! */ + exp_id += 2; + if (exp_id > ATOMISP_MAX_EXP_ID) + exp_id -= ATOMISP_MAX_EXP_ID; + bitmap = asd->raw_buffer_bitmap + exp_id / 32; + bit = exp_id % 32; + if ((*bitmap) & (1 << bit)) { + int ret; + + /* WORKAROUND unlock the raw buffer compulsively */ + ret = atomisp_css_exp_id_unlock(asd, exp_id); + if (ret) { + dev_err(asd->isp->dev, "%s exp_id is wrapping back to %d but force unlock failed,, err %d.\n", + __func__, exp_id, ret); + return ret; + } + + spin_lock_irqsave(&asd->raw_buffer_bitmap_lock, flags); + (*bitmap) &= ~(1 << bit); + asd->raw_buffer_locked_count--; + spin_unlock_irqrestore(&asd->raw_buffer_bitmap_lock, flags); + dev_warn(asd->isp->dev, "%s exp_id is wrapping back to %d but it is still locked so force unlock it, raw_buffer_locked_count %d\n", + __func__, exp_id, asd->raw_buffer_locked_count); + } + return 0; +} + +static int __is_raw_buffer_locked(struct atomisp_sub_device *asd, int exp_id) +{ + int *bitmap, bit; + unsigned long flags; + int ret; + + if (__checking_exp_id(asd, exp_id)) + return -EINVAL; + + bitmap = asd->raw_buffer_bitmap + exp_id / 32; + bit = exp_id % 32; + spin_lock_irqsave(&asd->raw_buffer_bitmap_lock, flags); + ret = ((*bitmap) & (1 << bit)); + spin_unlock_irqrestore(&asd->raw_buffer_bitmap_lock, flags); + return !ret; +} + +static int __clear_raw_buffer_bitmap(struct atomisp_sub_device *asd, int exp_id) +{ + int *bitmap, bit; + unsigned long flags; + + if (__is_raw_buffer_locked(asd, exp_id)) + return -EINVAL; + + bitmap = asd->raw_buffer_bitmap + exp_id / 32; + bit = exp_id % 32; + spin_lock_irqsave(&asd->raw_buffer_bitmap_lock, flags); + (*bitmap) &= ~(1 << bit); + asd->raw_buffer_locked_count--; + spin_unlock_irqrestore(&asd->raw_buffer_bitmap_lock, flags); + + dev_dbg(asd->isp->dev, "%s: exp_id %d, raw_buffer_locked_count %d\n", + __func__, exp_id, asd->raw_buffer_locked_count); + return 0; +} + +int atomisp_exp_id_capture(struct atomisp_sub_device *asd, int *exp_id) +{ + struct atomisp_device *isp = asd->isp; + int value = *exp_id; + int ret; + + ret = __is_raw_buffer_locked(asd, value); + if (ret) { + dev_err(isp->dev, "%s exp_id %d invalid %d.\n", __func__, value, ret); + return -EINVAL; + } + + dev_dbg(isp->dev, "%s exp_id %d\n", __func__, value); + ret = atomisp_css_exp_id_capture(asd, value); + if (ret) { + dev_err(isp->dev, "%s exp_id %d failed.\n", __func__, value); + return -EIO; + } + return 0; +} + +int atomisp_exp_id_unlock(struct atomisp_sub_device *asd, int *exp_id) +{ + struct atomisp_device *isp = asd->isp; + int value = *exp_id; + int ret; + + ret = __clear_raw_buffer_bitmap(asd, value); + if (ret) { + dev_err(isp->dev, "%s exp_id %d invalid %d.\n", __func__, value, ret); + return -EINVAL; + } + + dev_dbg(isp->dev, "%s exp_id %d\n", __func__, value); + ret = atomisp_css_exp_id_unlock(asd, value); + if (ret) + dev_err(isp->dev, "%s exp_id %d failed, err %d.\n", + __func__, value, ret); + + return ret; +} + +int atomisp_enable_dz_capt_pipe(struct atomisp_sub_device *asd, + unsigned int *enable) +{ + bool value; + + if (enable == NULL) + return -EINVAL; + + value = *enable > 0 ? true : false; + + atomisp_en_dz_capt_pipe(asd, value); + + return 0; +} + +int atomisp_inject_a_fake_event(struct atomisp_sub_device *asd, int *event) +{ + if (!event || asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + return -EINVAL; + + dev_dbg(asd->isp->dev, "%s: trying to inject a fake event 0x%x\n", + __func__, *event); + + switch (*event) { + case V4L2_EVENT_FRAME_SYNC: + atomisp_sof_event(asd); + break; + case V4L2_EVENT_FRAME_END: + atomisp_eof_event(asd, 0); + break; + case V4L2_EVENT_ATOMISP_3A_STATS_READY: + atomisp_3a_stats_ready_event(asd, 0); + break; + case V4L2_EVENT_ATOMISP_METADATA_READY: + atomisp_metadata_ready_event(asd, 0); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int atomisp_get_pipe_id(struct atomisp_video_pipe *pipe) +{ + struct atomisp_sub_device *asd = pipe->asd; + + if (ATOMISP_USE_YUVPP(asd)) + return CSS_PIPE_ID_YUVPP; + else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) + return CSS_PIPE_ID_VIDEO; + else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) + return CSS_PIPE_ID_CAPTURE; + else if (pipe == &asd->video_out_video_capture) + return CSS_PIPE_ID_VIDEO; + else if (pipe == &asd->video_out_vf) + return CSS_PIPE_ID_CAPTURE; + else if (pipe == &asd->video_out_preview) { + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) + return CSS_PIPE_ID_VIDEO; + else + return CSS_PIPE_ID_PREVIEW; + } else if (pipe == &asd->video_out_capture) { + if (asd->copy_mode) + return IA_CSS_PIPE_ID_COPY; + else + return CSS_PIPE_ID_CAPTURE; + } + + /* fail through */ + dev_warn(asd->isp->dev, "%s failed to find proper pipe\n", + __func__); + return CSS_PIPE_ID_CAPTURE; +} + +int atomisp_get_invalid_frame_num(struct video_device *vdev, + int *invalid_frame_num) +{ + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + enum atomisp_css_pipe_id pipe_id; + struct ia_css_pipe_info p_info; + int ret; + + if (asd->isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num > 1) { + /* External ISP */ + *invalid_frame_num = 0; + return 0; + } + + pipe_id = atomisp_get_pipe_id(pipe); + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].pipes[pipe_id]) { + dev_warn(asd->isp->dev, "%s pipe %d has not been created yet, do SET_FMT first!\n", + __func__, pipe_id); + return -EINVAL; + } + + ret = ia_css_pipe_get_info( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipes[pipe_id], &p_info); + if (ret == IA_CSS_SUCCESS) { + *invalid_frame_num = p_info.num_invalid_frames; + return 0; + } else { + dev_warn(asd->isp->dev, "%s get pipe infor failed %d\n", + __func__, ret); + return -EINVAL; + } +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h new file mode 100644 index 0000000000000..79d493dba4037 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h @@ -0,0 +1,446 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_CMD_H__ +#define __ATOMISP_CMD_H__ + +#include "../../include/linux/atomisp.h" +#include +#include + +#include + +#include "atomisp_internal.h" + +#include "ia_css_types.h" +#include "ia_css.h" + +struct atomisp_device; +struct atomisp_css_frame; + +#define MSI_ENABLE_BIT 16 +#define INTR_DISABLE_BIT 10 +#define BUS_MASTER_ENABLE 2 +#define MEMORY_SPACE_ENABLE 1 +#define INTR_IER 24 +#define INTR_IIR 16 +#ifdef ISP2401 +#define RUNMODE_MASK (ATOMISP_RUN_MODE_VIDEO | ATOMISP_RUN_MODE_STILL_CAPTURE \ + | ATOMISP_RUN_MODE_PREVIEW) + +/* FIXME: check if can go */ +extern int atomisp_punit_hpll_freq; +#endif + +/* + * Helper function + */ +void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr, + unsigned int size); +struct camera_mipi_info *atomisp_to_sensor_mipi_info(struct v4l2_subdev *sd); +struct atomisp_video_pipe *atomisp_to_video_pipe(struct video_device *dev); +struct atomisp_acc_pipe *atomisp_to_acc_pipe(struct video_device *dev); +int atomisp_reset(struct atomisp_device *isp); +void atomisp_flush_bufs_and_wakeup(struct atomisp_sub_device *asd); +void atomisp_clear_css_buffer_counters(struct atomisp_sub_device *asd); +#ifndef ISP2401 +bool atomisp_buffers_queued(struct atomisp_sub_device *asd); +#else +bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe); +#endif + +/* TODO:should be here instead of atomisp_helper.h +extern void __iomem *atomisp_io_base; + +static inline void __iomem *atomisp_get_io_virt_addr(unsigned int address) +{ + void __iomem *ret = atomisp_io_base + (address & 0x003FFFFF); + return ret; +} +*/ + +/* + * Interrupt functions + */ +void atomisp_msi_irq_init(struct atomisp_device *isp, struct pci_dev *dev); +void atomisp_msi_irq_uninit(struct atomisp_device *isp, struct pci_dev *dev); +void atomisp_wdt_work(struct work_struct *work); +void atomisp_wdt(struct timer_list *t); +void atomisp_setup_flash(struct atomisp_sub_device *asd); +irqreturn_t atomisp_isr(int irq, void *dev); +irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr); +const struct atomisp_format_bridge *get_atomisp_format_bridge_from_mbus( + u32 mbus_code); +bool atomisp_is_mbuscode_raw(uint32_t code); +int atomisp_get_frame_pgnr(struct atomisp_device *isp, + const struct atomisp_css_frame *frame, u32 *p_pgnr); +void atomisp_delayed_init_work(struct work_struct *work); + +/* + * Get internal fmt according to V4L2 fmt + */ + +bool atomisp_is_viewfinder_support(struct atomisp_device *isp); + +/* + * ISP features control function + */ + +/* +#ifdef ISP2401 + * Function to set sensor runmode by user when + * ATOMISP_IOC_S_SENSOR_RUNMODE ioctl was called + */ +int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, + struct atomisp_s_runmode *runmode); +/* +#endif + * Function to enable/disable lens geometry distortion correction (GDC) and + * chromatic aberration correction (CAC) + */ +int atomisp_gdc_cac(struct atomisp_sub_device *asd, int flag, + __s32 *value); + +/* + * Function to enable/disable low light mode (including ANR) + */ +int atomisp_low_light(struct atomisp_sub_device *asd, int flag, + __s32 *value); + +/* + * Function to enable/disable extra noise reduction (XNR) in low light + * condition + */ +int atomisp_xnr(struct atomisp_sub_device *asd, int flag, int *arg); + +int atomisp_formats(struct atomisp_sub_device *asd, int flag, + struct atomisp_formats_config *config); + +/* + * Function to configure noise reduction + */ +int atomisp_nr(struct atomisp_sub_device *asd, int flag, + struct atomisp_nr_config *config); + +/* + * Function to configure temporal noise reduction (TNR) + */ +int atomisp_tnr(struct atomisp_sub_device *asd, int flag, + struct atomisp_tnr_config *config); + +/* + * Function to configure black level compensation + */ +int atomisp_black_level(struct atomisp_sub_device *asd, int flag, + struct atomisp_ob_config *config); + +/* + * Function to configure edge enhancement + */ +int atomisp_ee(struct atomisp_sub_device *asd, int flag, + struct atomisp_ee_config *config); + +/* + * Function to update Gamma table for gamma, brightness and contrast config + */ +int atomisp_gamma(struct atomisp_sub_device *asd, int flag, + struct atomisp_gamma_table *config); +/* + * Function to update Ctc table for Chroma Enhancement + */ +int atomisp_ctc(struct atomisp_sub_device *asd, int flag, + struct atomisp_ctc_table *config); + +/* + * Function to update gamma correction parameters + */ +int atomisp_gamma_correction(struct atomisp_sub_device *asd, int flag, + struct atomisp_gc_config *config); + +/* + * Function to update Gdc table for gdc + */ +int atomisp_gdc_cac_table(struct atomisp_sub_device *asd, int flag, + struct atomisp_morph_table *config); + +/* + * Function to update table for macc + */ +int atomisp_macc_table(struct atomisp_sub_device *asd, int flag, + struct atomisp_macc_config *config); +/* + * Function to get DIS statistics. + */ +int atomisp_get_dis_stat(struct atomisp_sub_device *asd, + struct atomisp_dis_statistics *stats); + +/* + * Function to get DVS2 BQ resolution settings + */ +int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, + struct atomisp_dvs2_bq_resolutions *bq_res); + +/* + * Function to set the DIS coefficients. + */ +int atomisp_set_dis_coefs(struct atomisp_sub_device *asd, + struct atomisp_dis_coefficients *coefs); + +/* + * Function to set the DIS motion vector. + */ +int atomisp_set_dis_vector(struct atomisp_sub_device *asd, + struct atomisp_dis_vector *vector); + +/* + * Function to set/get 3A stat from isp + */ +int atomisp_3a_stat(struct atomisp_sub_device *asd, int flag, + struct atomisp_3a_statistics *config); + +/* + * Function to get metadata from isp + */ +int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag, + struct atomisp_metadata *config); + +int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag, + struct atomisp_metadata_with_type *config); + +int atomisp_set_parameters(struct video_device *vdev, + struct atomisp_parameters *arg); +/* + * Function to set/get isp parameters to isp + */ +int atomisp_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_parm *config); + +/* + * Function to configure color effect of the image + */ +int atomisp_color_effect(struct atomisp_sub_device *asd, int flag, + __s32 *effect); + +/* + * Function to configure bad pixel correction + */ +int atomisp_bad_pixel(struct atomisp_sub_device *asd, int flag, + __s32 *value); + +/* + * Function to configure bad pixel correction params + */ +int atomisp_bad_pixel_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_dp_config *config); + +/* + * Function to enable/disable video image stablization + */ +int atomisp_video_stable(struct atomisp_sub_device *asd, int flag, + __s32 *value); + +/* + * Function to configure fixed pattern noise + */ +int atomisp_fixed_pattern(struct atomisp_sub_device *asd, int flag, + __s32 *value); + +/* + * Function to configure fixed pattern noise table + */ +int atomisp_fixed_pattern_table(struct atomisp_sub_device *asd, + struct v4l2_framebuffer *config); + +/* + * Function to configure false color correction + */ +int atomisp_false_color(struct atomisp_sub_device *asd, int flag, + __s32 *value); + +/* + * Function to configure false color correction params + */ +int atomisp_false_color_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_de_config *config); + +/* + * Function to configure white balance params + */ +int atomisp_white_balance_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_wb_config *config); + +int atomisp_3a_config_param(struct atomisp_sub_device *asd, int flag, + struct atomisp_3a_config *config); + +/* + * Function to setup digital zoom + */ +int atomisp_digital_zoom(struct atomisp_sub_device *asd, int flag, + __s32 *value); + +/* + * Function set camera_prefiles.xml current sensor pixel array size + */ +int atomisp_set_array_res(struct atomisp_sub_device *asd, + struct atomisp_resolution *config); + +/* + * Function to calculate real zoom region for every pipe + */ +int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, + struct atomisp_css_dz_config *dz_config, + enum atomisp_css_pipe_id css_pipe_id); + +int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, + struct atomisp_parameters *arg, + struct atomisp_css_params *css_param, + bool from_user); + +int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, + struct atomisp_shading_table *source_st, + struct atomisp_css_params *css_param, + bool from_user); + +int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, + struct ia_css_dvs2_coefficients *coefs, + struct atomisp_css_params *css_param, + bool from_user); + +int atomisp_cp_morph_table(struct atomisp_sub_device *asd, + struct atomisp_morph_table *source_morph_table, + struct atomisp_css_params *css_param, + bool from_user); + +int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, + struct atomisp_dvs_6axis_config *user_6axis_config, + struct atomisp_css_params *css_param, + bool from_user); + +int atomisp_makeup_css_parameters(struct atomisp_sub_device *asd, + struct atomisp_parameters *arg, + struct atomisp_css_params *css_param); + +int atomisp_compare_grid(struct atomisp_sub_device *asd, + struct atomisp_grid_info *atomgrid); + +int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, + struct atomisp_sensor_mode_data *config); + +int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f); + + +/* This function looks up the closest available resolution. */ +int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, + bool *res_overflow); + +int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f); +int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f); + +int atomisp_set_shading_table(struct atomisp_sub_device *asd, + struct atomisp_shading_table *shading_table); + +int atomisp_offline_capture_configure(struct atomisp_sub_device *asd, + struct atomisp_cont_capture_conf *cvf_config); + +int atomisp_ospm_dphy_down(struct atomisp_device *isp); +int atomisp_ospm_dphy_up(struct atomisp_device *isp); +int atomisp_exif_makernote(struct atomisp_sub_device *asd, + struct atomisp_makernote_info *config); + +void atomisp_free_internal_buffers(struct atomisp_sub_device *asd); + +int atomisp_s_ae_window(struct atomisp_sub_device *asd, + struct atomisp_ae_window *arg); + +int atomisp_flash_enable(struct atomisp_sub_device *asd, + int num_frames); + +int atomisp_freq_scaling(struct atomisp_device *vdev, + enum atomisp_dfs_mode mode, + bool force); + +void atomisp_buf_done(struct atomisp_sub_device *asd, int error, + enum atomisp_css_buffer_type buf_type, + enum atomisp_css_pipe_id css_pipe_id, + bool q_buffers, enum atomisp_input_stream_id stream_id); + +void atomisp_css_flush(struct atomisp_device *isp); +int atomisp_source_pad_to_stream_id(struct atomisp_sub_device *asd, + uint16_t source_pad); + +/* + * Events. Only one event has to be exported for now. + */ +void atomisp_eof_event(struct atomisp_sub_device *asd, uint8_t exp_id); + +enum mipi_port_id __get_mipi_port(struct atomisp_device *isp, + enum atomisp_camera_port port); + +bool atomisp_is_vf_pipe(struct atomisp_video_pipe *pipe); + +void atomisp_apply_css_parameters( + struct atomisp_sub_device *asd, + struct atomisp_css_params *css_param); +void atomisp_free_css_parameters(struct atomisp_css_params *css_param); + +void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe); + +void atomisp_flush_params_queue(struct atomisp_video_pipe *asd); +/* + * Function to do Raw Buffer related operation, after enable Lock Unlock Raw Buffer + */ +int atomisp_exp_id_unlock(struct atomisp_sub_device *asd, int *exp_id); +int atomisp_exp_id_capture(struct atomisp_sub_device *asd, int *exp_id); + +/* + * Function to update Raw Buffer bitmap + */ +int atomisp_set_raw_buffer_bitmap(struct atomisp_sub_device *asd, int exp_id); +void atomisp_init_raw_buffer_bitmap(struct atomisp_sub_device *asd); + +/* + * Function to enable/disable zoom for capture pipe + */ +int atomisp_enable_dz_capt_pipe(struct atomisp_sub_device *asd, + unsigned int *enable); + +/* + * Function to get metadata type bu pipe id + */ +enum atomisp_metadata_type +atomisp_get_metadata_type(struct atomisp_sub_device *asd, + enum ia_css_pipe_id pipe_id); + +/* + * Function for HAL to inject a fake event to wake up poll thread + */ +int atomisp_inject_a_fake_event(struct atomisp_sub_device *asd, int *event); + +/* + * Function for HAL to query how many invalid frames at the beginning of ISP + * pipeline output + */ +int atomisp_get_invalid_frame_num(struct video_device *vdev, + int *invalid_frame_num); + +int atomisp_mrfld_power_up(struct atomisp_device *isp); +int atomisp_mrfld_power_down(struct atomisp_device *isp); +int atomisp_runtime_suspend(struct device *dev); +int atomisp_runtime_resume(struct device *dev); +#endif /* __ATOMISP_CMD_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h new file mode 100644 index 0000000000000..2558193045a69 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h @@ -0,0 +1,75 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_COMMON_H__ +#define __ATOMISP_COMMON_H__ + +#include "../../include/linux/atomisp.h" + +#include + +#include + +#include "atomisp_compat.h" + +#include "ia_css.h" + +extern int dbg_level; +extern int dbg_func; +extern int mipicsi_flag; +extern int pad_w; +extern int pad_h; + +#define CSS_DTRACE_VERBOSITY_LEVEL 5 /* Controls trace verbosity */ +#define CSS_DTRACE_VERBOSITY_TIMEOUT 9 /* Verbosity on ISP timeout */ +#define MRFLD_MAX_ZOOM_FACTOR 1024 +#ifdef ISP2401 +#define ATOMISP_CSS_ISP_PIPE_VERSION_2_2 0 +#define ATOMISP_CSS_ISP_PIPE_VERSION_2_7 1 +#endif + +#define IS_ISP2401(isp) \ + (((isp)->media_dev.hw_revision & ATOMISP_HW_REVISION_MASK) \ + >= (ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)) + +struct atomisp_format_bridge { + unsigned int pixelformat; + unsigned int depth; + u32 mbus_code; + enum atomisp_css_frame_format sh_fmt; + unsigned char description[32]; /* the same as struct v4l2_fmtdesc */ + bool planar; +}; + +struct atomisp_fmt { + u32 pixelformat; + u32 depth; + u32 bytesperline; + u32 framesize; + u32 imagesize; + u32 width; + u32 height; + u32 bayer_order; +}; + +struct atomisp_buffer { + struct videobuf_buffer vb; +}; + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h new file mode 100644 index 0000000000000..aac0eccee7983 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h @@ -0,0 +1,662 @@ +/* + * Support for Clovertrail PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2012 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_COMPAT_H__ +#define __ATOMISP_COMPAT_H__ + +#include "atomisp_compat_css20.h" + +#include "../../include/linux/atomisp.h" +#include + +#define CSS_RX_IRQ_INFO_BUFFER_OVERRUN \ + CSS_ID(CSS_RX_IRQ_INFO_BUFFER_OVERRUN) +#define CSS_RX_IRQ_INFO_ENTER_SLEEP_MODE \ + CSS_ID(CSS_RX_IRQ_INFO_ENTER_SLEEP_MODE) +#define CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE \ + CSS_ID(CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE) +#define CSS_RX_IRQ_INFO_ECC_CORRECTED \ + CSS_ID(CSS_RX_IRQ_INFO_ECC_CORRECTED) +#define CSS_RX_IRQ_INFO_ERR_SOT \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_SOT) +#define CSS_RX_IRQ_INFO_ERR_SOT_SYNC \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_SOT_SYNC) +#define CSS_RX_IRQ_INFO_ERR_CONTROL \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_CONTROL) +#define CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE) +#define CSS_RX_IRQ_INFO_ERR_CRC \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_CRC) +#define CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID) +#define CSS_RX_IRQ_INFO_ERR_FRAME_SYNC \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_FRAME_SYNC) +#define CSS_RX_IRQ_INFO_ERR_FRAME_DATA \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_FRAME_DATA) +#define CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT) +#define CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC) +#define CSS_RX_IRQ_INFO_ERR_LINE_SYNC \ + CSS_ID(CSS_RX_IRQ_INFO_ERR_LINE_SYNC) +#define CSS_RX_IRQ_INFO_INIT_TIMEOUT \ + CSS_ID(CSS_RX_IRQ_INFO_INIT_TIMEOUT) + +#define CSS_IRQ_INFO_CSS_RECEIVER_SOF CSS_ID(CSS_IRQ_INFO_CSS_RECEIVER_SOF) +#define CSS_IRQ_INFO_CSS_RECEIVER_EOF CSS_ID(CSS_IRQ_INFO_CSS_RECEIVER_EOF) +#define CSS_IRQ_INFO_CSS_RECEIVER_FIFO_OVERFLOW \ + CSS_ID(CSS_IRQ_INFO_CSS_RECEIVER_FIFO_OVERFLOW) +#define CSS_EVENT_OUTPUT_FRAME_DONE CSS_EVENT(OUTPUT_FRAME_DONE) +#define CSS_EVENT_SEC_OUTPUT_FRAME_DONE CSS_EVENT(SECOND_OUTPUT_FRAME_DONE) +#define CSS_EVENT_VF_OUTPUT_FRAME_DONE CSS_EVENT(VF_OUTPUT_FRAME_DONE) +#define CSS_EVENT_SEC_VF_OUTPUT_FRAME_DONE CSS_EVENT(SECOND_VF_OUTPUT_FRAME_DONE) +#define CSS_EVENT_3A_STATISTICS_DONE CSS_EVENT(3A_STATISTICS_DONE) +#define CSS_EVENT_DIS_STATISTICS_DONE CSS_EVENT(DIS_STATISTICS_DONE) +#define CSS_EVENT_PIPELINE_DONE CSS_EVENT(PIPELINE_DONE) +#define CSS_EVENT_METADATA_DONE CSS_EVENT(METADATA_DONE) +#define CSS_EVENT_ACC_STAGE_COMPLETE CSS_EVENT(ACC_STAGE_COMPLETE) +#define CSS_EVENT_TIMER CSS_EVENT(TIMER) + +#define CSS_BUFFER_TYPE_METADATA CSS_ID(CSS_BUFFER_TYPE_METADATA) +#define CSS_BUFFER_TYPE_3A_STATISTICS CSS_ID(CSS_BUFFER_TYPE_3A_STATISTICS) +#define CSS_BUFFER_TYPE_DIS_STATISTICS CSS_ID(CSS_BUFFER_TYPE_DIS_STATISTICS) +#define CSS_BUFFER_TYPE_INPUT_FRAME CSS_ID(CSS_BUFFER_TYPE_INPUT_FRAME) +#define CSS_BUFFER_TYPE_OUTPUT_FRAME CSS_ID(CSS_BUFFER_TYPE_OUTPUT_FRAME) +#define CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME CSS_ID(CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) +#define CSS_BUFFER_TYPE_VF_OUTPUT_FRAME CSS_ID(CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) +#define CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME CSS_ID(CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME) +#define CSS_BUFFER_TYPE_RAW_OUTPUT_FRAME \ + CSS_ID(CSS_BUFFER_TYPE_RAW_OUTPUT_FRAME) + +#define CSS_FORMAT_RAW_8 CSS_FORMAT(RAW_8) +#define CSS_FORMAT_RAW_10 CSS_FORMAT(RAW_10) +#define CSS_FORMAT_RAW_12 CSS_FORMAT(RAW_12) +#define CSS_FORMAT_RAW_16 CSS_FORMAT(RAW_16) + +#define CSS_CAPTURE_MODE_RAW CSS_ID(CSS_CAPTURE_MODE_RAW) +#define CSS_CAPTURE_MODE_BAYER CSS_ID(CSS_CAPTURE_MODE_BAYER) +#define CSS_CAPTURE_MODE_PRIMARY CSS_ID(CSS_CAPTURE_MODE_PRIMARY) +#define CSS_CAPTURE_MODE_ADVANCED CSS_ID(CSS_CAPTURE_MODE_ADVANCED) +#define CSS_CAPTURE_MODE_LOW_LIGHT CSS_ID(CSS_CAPTURE_MODE_LOW_LIGHT) + +#define CSS_MORPH_TABLE_NUM_PLANES CSS_ID(CSS_MORPH_TABLE_NUM_PLANES) + +#define CSS_FRAME_FORMAT_NV11 CSS_ID(CSS_FRAME_FORMAT_NV11) +#define CSS_FRAME_FORMAT_NV12 CSS_ID(CSS_FRAME_FORMAT_NV12) +#define CSS_FRAME_FORMAT_NV16 CSS_ID(CSS_FRAME_FORMAT_NV16) +#define CSS_FRAME_FORMAT_NV21 CSS_ID(CSS_FRAME_FORMAT_NV21) +#define CSS_FRAME_FORMAT_NV61 CSS_ID(CSS_FRAME_FORMAT_NV61) +#define CSS_FRAME_FORMAT_YV12 CSS_ID(CSS_FRAME_FORMAT_YV12) +#define CSS_FRAME_FORMAT_YV16 CSS_ID(CSS_FRAME_FORMAT_YV16) +#define CSS_FRAME_FORMAT_YUV420 CSS_ID(CSS_FRAME_FORMAT_YUV420) +#define CSS_FRAME_FORMAT_YUV420_16 CSS_ID(CSS_FRAME_FORMAT_YUV420_16) +#define CSS_FRAME_FORMAT_YUV422 CSS_ID(CSS_FRAME_FORMAT_YUV422) +#define CSS_FRAME_FORMAT_YUV422_16 CSS_ID(CSS_FRAME_FORMAT_YUV422_16) +#define CSS_FRAME_FORMAT_UYVY CSS_ID(CSS_FRAME_FORMAT_UYVY) +#define CSS_FRAME_FORMAT_YUYV CSS_ID(CSS_FRAME_FORMAT_YUYV) +#define CSS_FRAME_FORMAT_YUV444 CSS_ID(CSS_FRAME_FORMAT_YUV444) +#define CSS_FRAME_FORMAT_YUV_LINE CSS_ID(CSS_FRAME_FORMAT_YUV_LINE) +#define CSS_FRAME_FORMAT_RAW CSS_ID(CSS_FRAME_FORMAT_RAW) +#define CSS_FRAME_FORMAT_RGB565 CSS_ID(CSS_FRAME_FORMAT_RGB565) +#define CSS_FRAME_FORMAT_PLANAR_RGB888 CSS_ID(CSS_FRAME_FORMAT_PLANAR_RGB888) +#define CSS_FRAME_FORMAT_RGBA888 CSS_ID(CSS_FRAME_FORMAT_RGBA888) +#define CSS_FRAME_FORMAT_QPLANE6 CSS_ID(CSS_FRAME_FORMAT_QPLANE6) +#define CSS_FRAME_FORMAT_BINARY_8 CSS_ID(CSS_FRAME_FORMAT_BINARY_8) + +struct atomisp_device; +struct atomisp_sub_device; +struct video_device; +enum atomisp_input_stream_id; + +struct atomisp_metadata_buf { + struct ia_css_metadata *metadata; + void *md_vptr; + struct list_head list; +}; + +void atomisp_css_debug_dump_sp_sw_debug_info(void); +void atomisp_css_debug_dump_debug_info(const char *context); +void atomisp_css_debug_set_dtrace_level(const unsigned int trace_level); + +void atomisp_store_uint32(hrt_address addr, uint32_t data); +void atomisp_load_uint32(hrt_address addr, uint32_t *data); + +int atomisp_css_init(struct atomisp_device *isp); + +void atomisp_css_uninit(struct atomisp_device *isp); + +void atomisp_css_suspend(struct atomisp_device *isp); + +int atomisp_css_resume(struct atomisp_device *isp); + +void atomisp_css_init_struct(struct atomisp_sub_device *asd); + +int atomisp_css_irq_translate(struct atomisp_device *isp, + unsigned int *infos); + +void atomisp_css_rx_get_irq_info(enum mipi_port_id port, + unsigned int *infos); + +void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, + unsigned int infos); + +int atomisp_css_irq_enable(struct atomisp_device *isp, + enum atomisp_css_irq_info info, bool enable); + +int atomisp_q_video_buffer_to_css(struct atomisp_sub_device *asd, + struct videobuf_vmalloc_memory *vm_mem, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id); + +int atomisp_q_s3a_buffer_to_css(struct atomisp_sub_device *asd, + struct atomisp_s3a_buf *s3a_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id); + +int atomisp_q_metadata_buffer_to_css(struct atomisp_sub_device *asd, + struct atomisp_metadata_buf *metadata_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id); + +int atomisp_q_dis_buffer_to_css(struct atomisp_sub_device *asd, + struct atomisp_dis_buf *dis_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id); + +void atomisp_css_mmu_invalidate_cache(void); + +void atomisp_css_mmu_invalidate_tlb(void); + +int atomisp_css_start(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, bool in_reset); + +void atomisp_css_update_isp_params(struct atomisp_sub_device *asd); +void atomisp_css_update_isp_params_on_pipe(struct atomisp_sub_device *asd, + struct ia_css_pipe *pipe); + +int atomisp_css_queue_buffer(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id pipe_id, + enum atomisp_css_buffer_type buf_type, + struct atomisp_css_buffer *isp_css_buffer); + +int atomisp_css_dequeue_buffer(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id pipe_id, + enum atomisp_css_buffer_type buf_type, + struct atomisp_css_buffer *isp_css_buffer); + +int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, + uint16_t stream_id, + struct atomisp_s3a_buf *s3a_buf, + struct atomisp_dis_buf *dis_buf, + struct atomisp_metadata_buf *md_buf); + +void atomisp_css_free_stat_buffers(struct atomisp_sub_device *asd); + +void atomisp_css_free_3a_buffer(struct atomisp_s3a_buf *s3a_buf); + +void atomisp_css_free_dis_buffer(struct atomisp_dis_buf *dis_buf); + +void atomisp_css_free_metadata_buffer(struct atomisp_metadata_buf *metadata_buf); + +int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, + int source_pad); + +int atomisp_alloc_3a_output_buf(struct atomisp_sub_device *asd); + +int atomisp_alloc_dis_coef_buf(struct atomisp_sub_device *asd); + +int atomisp_alloc_metadata_output_buf(struct atomisp_sub_device *asd); + +void atomisp_free_metadata_output_buf(struct atomisp_sub_device *asd); + +void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, + struct atomisp_css_buffer *isp_css_buffer, + struct ia_css_isp_dvs_statistics_map *dvs_map); + +int atomisp_css_dequeue_event(struct atomisp_css_event *current_event); + +void atomisp_css_temp_pipe_to_pipe_id(struct atomisp_sub_device *asd, + struct atomisp_css_event *current_event); + +int atomisp_css_isys_set_resolution(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt, + int isys_stream); + +void atomisp_css_isys_set_link(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + int link, + int isys_stream); + +void atomisp_css_isys_set_valid(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + bool valid, + int isys_stream); + +void atomisp_css_isys_set_format(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format format, + int isys_stream); + +int atomisp_css_set_default_isys_config(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt); + +int atomisp_css_isys_two_stream_cfg(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format); + +void atomisp_css_isys_two_stream_cfg_update_stream1( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height); + +void atomisp_css_isys_two_stream_cfg_update_stream2( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height); + +int atomisp_css_input_set_resolution(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt); + +void atomisp_css_input_set_binning_factor(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + unsigned int bin_factor); + +void atomisp_css_input_set_bayer_order(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_bayer_order bayer_order); + +void atomisp_css_input_set_format(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format format); + +int atomisp_css_input_set_effective_resolution( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + unsigned int width, + unsigned int height); + +void atomisp_css_video_set_dis_envelope(struct atomisp_sub_device *asd, + unsigned int dvs_w, unsigned int dvs_h); + +void atomisp_css_input_set_two_pixels_per_clock( + struct atomisp_sub_device *asd, + bool two_ppc); + +void atomisp_css_enable_raw_binning(struct atomisp_sub_device *asd, + bool enable); + +void atomisp_css_enable_dz(struct atomisp_sub_device *asd, bool enable); + +void atomisp_css_capture_set_mode(struct atomisp_sub_device *asd, + enum atomisp_css_capture_mode mode); + +void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, + enum atomisp_css_input_mode mode); + +void atomisp_css_capture_enable_online(struct atomisp_sub_device *asd, + unsigned short stream_index, bool enable); + +void atomisp_css_preview_enable_online(struct atomisp_sub_device *asd, + unsigned short stream_index, bool enable); + +void atomisp_css_video_enable_online(struct atomisp_sub_device *asd, + bool enable); + +void atomisp_css_enable_continuous(struct atomisp_sub_device *asd, + bool enable); + +void atomisp_css_enable_cvf(struct atomisp_sub_device *asd, + bool enable); + +int atomisp_css_input_configure_port(struct atomisp_sub_device *asd, + enum mipi_port_id port, + unsigned int num_lanes, + unsigned int timeout, + unsigned int mipi_freq, + enum atomisp_input_format metadata_format, + unsigned int metadata_width, + unsigned int metadata_height); + +int atomisp_css_frame_allocate(struct atomisp_css_frame **frame, + unsigned int width, unsigned int height, + enum atomisp_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth); + +int atomisp_css_frame_allocate_from_info(struct atomisp_css_frame **frame, + const struct atomisp_css_frame_info *info); + +void atomisp_css_frame_free(struct atomisp_css_frame *frame); + +int atomisp_css_frame_map(struct atomisp_css_frame **frame, + const struct atomisp_css_frame_info *info, + const void __user *data, uint16_t attribute, + void *context); + +int atomisp_css_set_black_frame(struct atomisp_sub_device *asd, + const struct atomisp_css_frame *raw_black_frame); + +int atomisp_css_allocate_continuous_frames(bool init_time, + struct atomisp_sub_device *asd); + +void atomisp_css_update_continuous_frames(struct atomisp_sub_device *asd); + +void atomisp_create_pipes_stream(struct atomisp_sub_device *asd); +void atomisp_destroy_pipes_stream_force(struct atomisp_sub_device *asd); + +int atomisp_css_stop(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, bool in_reset); + +int atomisp_css_continuous_set_num_raw_frames( + struct atomisp_sub_device *asd, + int num_frames); + +void atomisp_css_disable_vf_pp(struct atomisp_sub_device *asd, + bool disable); + +int atomisp_css_copy_configure_output(struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format); + +int atomisp_css_yuvpp_configure_output(struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format); + +int atomisp_css_yuvpp_configure_viewfinder( + struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); + +int atomisp_css_yuvpp_get_output_frame_info( + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info); + +int atomisp_css_yuvpp_get_viewfinder_frame_info( + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info); + +int atomisp_css_preview_configure_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); + +int atomisp_css_capture_configure_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); + +int atomisp_css_video_configure_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); + +int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, + uint16_t source_pad, + struct atomisp_css_frame_info *frame_info); + +int atomisp_css_video_configure_viewfinder(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); + +int atomisp_css_capture_configure_viewfinder( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); + +int atomisp_css_video_get_viewfinder_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); + +int atomisp_css_capture_get_viewfinder_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); + +int atomisp_css_copy_get_output_frame_info( + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info); + +int atomisp_css_capture_get_output_raw_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); + +int atomisp_css_preview_get_output_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); + +int atomisp_css_capture_get_output_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); + +int atomisp_css_video_get_output_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); + +int atomisp_css_preview_configure_pp_input( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height); + +int atomisp_css_capture_configure_pp_input( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height); + +int atomisp_css_video_configure_pp_input( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height); + +int atomisp_css_offline_capture_configure(struct atomisp_sub_device *asd, + int num_captures, unsigned int skip, int offset); +int atomisp_css_exp_id_capture(struct atomisp_sub_device *asd, int exp_id); +int atomisp_css_exp_id_unlock(struct atomisp_sub_device *asd, int exp_id); + +int atomisp_css_capture_enable_xnr(struct atomisp_sub_device *asd, + bool enable); + +void atomisp_css_send_input_frame(struct atomisp_sub_device *asd, + unsigned short *data, unsigned int width, + unsigned int height); + +bool atomisp_css_isp_has_started(void); + +void atomisp_css_request_flash(struct atomisp_sub_device *asd); + +void atomisp_css_set_wb_config(struct atomisp_sub_device *asd, + struct atomisp_css_wb_config *wb_config); + +void atomisp_css_set_ob_config(struct atomisp_sub_device *asd, + struct atomisp_css_ob_config *ob_config); + +void atomisp_css_set_dp_config(struct atomisp_sub_device *asd, + struct atomisp_css_dp_config *dp_config); + +void atomisp_css_set_de_config(struct atomisp_sub_device *asd, + struct atomisp_css_de_config *de_config); + +void atomisp_css_set_dz_config(struct atomisp_sub_device *asd, + struct atomisp_css_dz_config *dz_config); + +void atomisp_css_set_default_de_config(struct atomisp_sub_device *asd); + +void atomisp_css_set_ce_config(struct atomisp_sub_device *asd, + struct atomisp_css_ce_config *ce_config); + +void atomisp_css_set_nr_config(struct atomisp_sub_device *asd, + struct atomisp_css_nr_config *nr_config); + +void atomisp_css_set_ee_config(struct atomisp_sub_device *asd, + struct atomisp_css_ee_config *ee_config); + +void atomisp_css_set_tnr_config(struct atomisp_sub_device *asd, + struct atomisp_css_tnr_config *tnr_config); + +void atomisp_css_set_cc_config(struct atomisp_sub_device *asd, + struct atomisp_css_cc_config *cc_config); + +void atomisp_css_set_macc_table(struct atomisp_sub_device *asd, + struct atomisp_css_macc_table *macc_table); + +void atomisp_css_set_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_gamma_table *gamma_table); + +void atomisp_css_set_ctc_table(struct atomisp_sub_device *asd, + struct atomisp_css_ctc_table *ctc_table); + +void atomisp_css_set_gc_config(struct atomisp_sub_device *asd, + struct atomisp_css_gc_config *gc_config); + +void atomisp_css_set_3a_config(struct atomisp_sub_device *asd, + struct atomisp_css_3a_config *s3a_config); + +void atomisp_css_video_set_dis_vector(struct atomisp_sub_device *asd, + struct atomisp_dis_vector *vector); + +void atomisp_css_set_dvs2_coefs(struct atomisp_sub_device *asd, + struct ia_css_dvs2_coefficients *coefs); + +int atomisp_css_set_dis_coefs(struct atomisp_sub_device *asd, + struct atomisp_dis_coefficients *coefs); + +void atomisp_css_set_zoom_factor(struct atomisp_sub_device *asd, + unsigned int zoom); + +int atomisp_css_get_wb_config(struct atomisp_sub_device *asd, + struct atomisp_wb_config *config); + +int atomisp_css_get_ob_config(struct atomisp_sub_device *asd, + struct atomisp_ob_config *config); + +int atomisp_css_get_dp_config(struct atomisp_sub_device *asd, + struct atomisp_dp_config *config); + +int atomisp_css_get_de_config(struct atomisp_sub_device *asd, + struct atomisp_de_config *config); + +int atomisp_css_get_nr_config(struct atomisp_sub_device *asd, + struct atomisp_nr_config *config); + +int atomisp_css_get_ee_config(struct atomisp_sub_device *asd, + struct atomisp_ee_config *config); + +int atomisp_css_get_tnr_config(struct atomisp_sub_device *asd, + struct atomisp_tnr_config *config); + +int atomisp_css_get_ctc_table(struct atomisp_sub_device *asd, + struct atomisp_ctc_table *config); + +int atomisp_css_get_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_gamma_table *config); + +int atomisp_css_get_gc_config(struct atomisp_sub_device *asd, + struct atomisp_gc_config *config); + +int atomisp_css_get_3a_config(struct atomisp_sub_device *asd, + struct atomisp_3a_config *config); + +int atomisp_css_get_formats_config(struct atomisp_sub_device *asd, + struct atomisp_formats_config *formats_config); + +void atomisp_css_set_formats_config(struct atomisp_sub_device *asd, + struct atomisp_css_formats_config *formats_config); + +int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, + unsigned int *zoom); + +struct atomisp_css_shading_table *atomisp_css_shading_table_alloc( + unsigned int width, unsigned int height); + +void atomisp_css_set_shading_table(struct atomisp_sub_device *asd, + struct atomisp_css_shading_table *table); + +void atomisp_css_shading_table_free(struct atomisp_css_shading_table *table); + +struct atomisp_css_morph_table *atomisp_css_morph_table_allocate( + unsigned int width, unsigned int height); + +void atomisp_css_set_morph_table(struct atomisp_sub_device *asd, + struct atomisp_css_morph_table *table); + +void atomisp_css_get_morph_table(struct atomisp_sub_device *asd, + struct atomisp_css_morph_table *table); + +void atomisp_css_morph_table_free(struct atomisp_css_morph_table *table); + +void atomisp_css_set_cont_prev_start_time(struct atomisp_device *isp, + unsigned int overlap); + +int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd, + struct atomisp_dis_statistics *stats); + +int atomisp_css_update_stream(struct atomisp_sub_device *asd); + +int atomisp_css_create_acc_pipe(struct atomisp_sub_device *asd); + +int atomisp_css_start_acc_pipe(struct atomisp_sub_device *asd); + +int atomisp_css_stop_acc_pipe(struct atomisp_sub_device *asd); + +void atomisp_css_destroy_acc_pipe(struct atomisp_sub_device *asd); + +int atomisp_css_load_acc_extension(struct atomisp_sub_device *asd, + struct atomisp_css_fw_info *fw, + enum atomisp_css_pipe_id pipe_id, + unsigned int type); + +void atomisp_css_unload_acc_extension(struct atomisp_sub_device *asd, + struct atomisp_css_fw_info *fw, + enum atomisp_css_pipe_id pipe_id); + +int atomisp_css_wait_acc_finish(struct atomisp_sub_device *asd); + +void atomisp_css_acc_done(struct atomisp_sub_device *asd); + +int atomisp_css_load_acc_binary(struct atomisp_sub_device *asd, + struct atomisp_css_fw_info *fw, + unsigned int index); + +void atomisp_css_unload_acc_binary(struct atomisp_sub_device *asd); + +struct atomisp_acc_fw; +int atomisp_css_set_acc_parameters(struct atomisp_acc_fw *acc_fw); + +int atomisp_css_isr_thread(struct atomisp_device *isp, + bool *frame_done_found, + bool *css_pipe_done); + +bool atomisp_css_valid_sof(struct atomisp_device *isp); + +void atomisp_en_dz_capt_pipe(struct atomisp_sub_device *asd, bool enable); + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c new file mode 100644 index 0000000000000..df88d9df20274 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c @@ -0,0 +1,4704 @@ +/* + * Support for Clovertrail PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include +#include + +#include "mmu/isp_mmu.h" +#include "mmu/sh_mmu_mrfld.h" +#include "hmm/hmm_bo.h" +#include "hmm/hmm.h" + +#include "atomisp_compat.h" +#include "atomisp_internal.h" +#include "atomisp_cmd.h" +#include "atomisp-regs.h" +#include "atomisp_fops.h" +#include "atomisp_ioctl.h" +#include "atomisp_acc.h" + +#include "hrt/hive_isp_css_mm_hrt.h" + +#include + +#include "ia_css_debug.h" +#include "ia_css_isp_param.h" +#include "sh_css_hrt.h" +#include "ia_css_isys.h" + +#include + +/* Assume max number of ACC stages */ +#define MAX_ACC_STAGES 20 + +/* Ideally, this should come from CSS headers */ +#define NO_LINK -1 + +/* + * to serialize MMIO access , this is due to ISP2400 silicon issue Sighting + * #4684168, if concurrency access happened, system may hard hang. + */ +static DEFINE_SPINLOCK(mmio_lock); + +enum frame_info_type { + ATOMISP_CSS_VF_FRAME, + ATOMISP_CSS_SECOND_VF_FRAME, + ATOMISP_CSS_OUTPUT_FRAME, + ATOMISP_CSS_SECOND_OUTPUT_FRAME, + ATOMISP_CSS_RAW_FRAME, +}; + +struct bayer_ds_factor { + unsigned int numerator; + unsigned int denominator; +}; + +void atomisp_css_debug_dump_sp_sw_debug_info(void) +{ + ia_css_debug_dump_sp_sw_debug_info(); +} + +void atomisp_css_debug_dump_debug_info(const char *context) +{ + ia_css_debug_dump_debug_info(context); +} + +void atomisp_css_debug_set_dtrace_level(const unsigned int trace_level) +{ + ia_css_debug_set_dtrace_level(trace_level); +} + +unsigned int atomisp_css_debug_get_dtrace_level(void) +{ + return ia_css_debug_trace_level; +} + +static void atomisp_css2_hw_store_8(hrt_address addr, uint8_t data) +{ + unsigned long flags; + + spin_lock_irqsave(&mmio_lock, flags); + _hrt_master_port_store_8(addr, data); + spin_unlock_irqrestore(&mmio_lock, flags); +} + +static void atomisp_css2_hw_store_16(hrt_address addr, uint16_t data) +{ + unsigned long flags; + + spin_lock_irqsave(&mmio_lock, flags); + _hrt_master_port_store_16(addr, data); + spin_unlock_irqrestore(&mmio_lock, flags); +} + +static void atomisp_css2_hw_store_32(hrt_address addr, uint32_t data) +{ + unsigned long flags; + + spin_lock_irqsave(&mmio_lock, flags); + _hrt_master_port_store_32(addr, data); + spin_unlock_irqrestore(&mmio_lock, flags); +} + +static uint8_t atomisp_css2_hw_load_8(hrt_address addr) +{ + unsigned long flags; + uint8_t ret; + + spin_lock_irqsave(&mmio_lock, flags); + ret = _hrt_master_port_load_8(addr); + spin_unlock_irqrestore(&mmio_lock, flags); + return ret; +} + +static uint16_t atomisp_css2_hw_load_16(hrt_address addr) +{ + unsigned long flags; + uint16_t ret; + + spin_lock_irqsave(&mmio_lock, flags); + ret = _hrt_master_port_load_16(addr); + spin_unlock_irqrestore(&mmio_lock, flags); + return ret; +} + +static uint32_t atomisp_css2_hw_load_32(hrt_address addr) +{ + unsigned long flags; + uint32_t ret; + + spin_lock_irqsave(&mmio_lock, flags); + ret = _hrt_master_port_load_32(addr); + spin_unlock_irqrestore(&mmio_lock, flags); + return ret; +} + +static void atomisp_css2_hw_store(hrt_address addr, + const void *from, uint32_t n) +{ + unsigned long flags; + unsigned int i; + unsigned int _to = (unsigned int)addr; + const char *_from = (const char *)from; + + spin_lock_irqsave(&mmio_lock, flags); + for (i = 0; i < n; i++, _to++, _from++) + _hrt_master_port_store_8(_to , *_from); + spin_unlock_irqrestore(&mmio_lock, flags); +} + +static void atomisp_css2_hw_load(hrt_address addr, void *to, uint32_t n) +{ + unsigned long flags; + unsigned int i; + char *_to = (char *)to; + unsigned int _from = (unsigned int)addr; + + spin_lock_irqsave(&mmio_lock, flags); + for (i = 0; i < n; i++, _to++, _from++) + *_to = _hrt_master_port_load_8(_from); + spin_unlock_irqrestore(&mmio_lock, flags); +} + +static int atomisp_css2_dbg_print(const char *fmt, va_list args) +{ + vprintk(fmt, args); + return 0; +} + +static int atomisp_css2_dbg_ftrace_print(const char *fmt, va_list args) +{ + ftrace_vprintk(fmt, args); + return 0; +} + +static int atomisp_css2_err_print(const char *fmt, va_list args) +{ + vprintk(fmt, args); + return 0; +} + +void atomisp_store_uint32(hrt_address addr, uint32_t data) +{ + atomisp_css2_hw_store_32(addr, data); +} + +void atomisp_load_uint32(hrt_address addr, uint32_t *data) +{ + *data = atomisp_css2_hw_load_32(addr); +} +static int hmm_get_mmu_base_addr(unsigned int *mmu_base_addr) +{ + if (sh_mmu_mrfld.get_pd_base == NULL) { + dev_err(atomisp_dev, "get mmu base address failed.\n"); + return -EINVAL; + } + + *mmu_base_addr = sh_mmu_mrfld.get_pd_base(&bo_device.mmu, + bo_device.mmu.base_address); + return 0; +} + +static void atomisp_isp_parameters_clean_up( + struct atomisp_css_isp_config *config) +{ + /* + * Set NULL to configs pointer to avoid they are set into isp again when + * some configs are changed and need to be updated later. + */ + memset(config, 0, sizeof(*config)); +} + +static void __dump_pipe_config(struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env, + unsigned int pipe_id) +{ + struct atomisp_device *isp = asd->isp; + + if (stream_env->pipes[pipe_id]) { + struct ia_css_pipe_config *p_config; + struct ia_css_pipe_extra_config *pe_config; + + p_config = &stream_env->pipe_configs[pipe_id]; + pe_config = &stream_env->pipe_extra_configs[pipe_id]; + dev_dbg(isp->dev, "dumping pipe[%d] config:\n", pipe_id); + dev_dbg(isp->dev, + "pipe_config.pipe_mode:%d.\n", p_config->mode); + dev_dbg(isp->dev, + "pipe_config.output_info[0] w=%d, h=%d.\n", + p_config->output_info[0].res.width, + p_config->output_info[0].res.height); + dev_dbg(isp->dev, + "pipe_config.vf_pp_in_res w=%d, h=%d.\n", + p_config->vf_pp_in_res.width, + p_config->vf_pp_in_res.height); + dev_dbg(isp->dev, + "pipe_config.capt_pp_in_res w=%d, h=%d.\n", + p_config->capt_pp_in_res.width, + p_config->capt_pp_in_res.height); + dev_dbg(isp->dev, + "pipe_config.output.padded w=%d.\n", + p_config->output_info[0].padded_width); + dev_dbg(isp->dev, + "pipe_config.vf_output_info[0] w=%d, h=%d.\n", + p_config->vf_output_info[0].res.width, + p_config->vf_output_info[0].res.height); + dev_dbg(isp->dev, + "pipe_config.bayer_ds_out_res w=%d, h=%d.\n", + p_config->bayer_ds_out_res.width, + p_config->bayer_ds_out_res.height); + dev_dbg(isp->dev, + "pipe_config.envelope w=%d, h=%d.\n", + p_config->dvs_envelope.width, + p_config->dvs_envelope.height); + dev_dbg(isp->dev, + "pipe_config.dvs_frame_delay=%d.\n", + p_config->dvs_frame_delay); + dev_dbg(isp->dev, + "pipe_config.isp_pipe_version:%d.\n", + p_config->isp_pipe_version); + dev_dbg(isp->dev, + "pipe_config.acc_extension=%p.\n", + p_config->acc_extension); + dev_dbg(isp->dev, + "pipe_config.acc_stages=%p.\n", + p_config->acc_stages); + dev_dbg(isp->dev, + "pipe_config.num_acc_stages=%d.\n", + p_config->num_acc_stages); + dev_dbg(isp->dev, + "pipe_config.acc_num_execs=%d.\n", + p_config->acc_num_execs); + dev_dbg(isp->dev, + "pipe_config.default_capture_config.capture_mode=%d.\n", + p_config->default_capture_config.mode); + dev_dbg(isp->dev, + "pipe_config.enable_dz=%d.\n", + p_config->enable_dz); + dev_dbg(isp->dev, + "pipe_config.default_capture_config.enable_xnr=%d.\n", + p_config->default_capture_config.enable_xnr); + dev_dbg(isp->dev, + "dumping pipe[%d] extra config:\n", pipe_id); + dev_dbg(isp->dev, + "pipe_extra_config.enable_raw_binning:%d.\n", + pe_config->enable_raw_binning); + dev_dbg(isp->dev, + "pipe_extra_config.enable_yuv_ds:%d.\n", + pe_config->enable_yuv_ds); + dev_dbg(isp->dev, + "pipe_extra_config.enable_high_speed:%d.\n", + pe_config->enable_high_speed); + dev_dbg(isp->dev, + "pipe_extra_config.enable_dvs_6axis:%d.\n", + pe_config->enable_dvs_6axis); + dev_dbg(isp->dev, + "pipe_extra_config.enable_reduced_pipe:%d.\n", + pe_config->enable_reduced_pipe); + dev_dbg(isp->dev, + "pipe_(extra_)config.enable_dz:%d.\n", + p_config->enable_dz); + dev_dbg(isp->dev, + "pipe_extra_config.disable_vf_pp:%d.\n", + pe_config->disable_vf_pp); + } +} + +static void __dump_stream_config(struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env) +{ + struct atomisp_device *isp = asd->isp; + struct ia_css_stream_config *s_config; + int j; + bool valid_stream = false; + + for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) { + if (stream_env->pipes[j]) { + __dump_pipe_config(asd, stream_env, j); + valid_stream = true; + } + } + if (!valid_stream) + return; + s_config = &stream_env->stream_config; + dev_dbg(isp->dev, "stream_config.mode=%d.\n", s_config->mode); + + if (s_config->mode == IA_CSS_INPUT_MODE_SENSOR || + s_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + dev_dbg(isp->dev, "stream_config.source.port.port=%d.\n", + s_config->source.port.port); + dev_dbg(isp->dev, "stream_config.source.port.num_lanes=%d.\n", + s_config->source.port.num_lanes); + dev_dbg(isp->dev, "stream_config.source.port.timeout=%d.\n", + s_config->source.port.timeout); + dev_dbg(isp->dev, "stream_config.source.port.rxcount=0x%x.\n", + s_config->source.port.rxcount); + dev_dbg(isp->dev, "stream_config.source.port.compression.type=%d.\n", + s_config->source.port.compression.type); + dev_dbg(isp->dev, "stream_config.source.port.compression.compressed_bits_per_pixel=%d.\n", + s_config->source.port.compression. + compressed_bits_per_pixel); + dev_dbg(isp->dev, "stream_config.source.port.compression.uncompressed_bits_per_pixel=%d.\n", + s_config->source.port.compression. + uncompressed_bits_per_pixel); + } else if (s_config->mode == IA_CSS_INPUT_MODE_TPG) { + dev_dbg(isp->dev, "stream_config.source.tpg.id=%d.\n", + s_config->source.tpg.id); + dev_dbg(isp->dev, "stream_config.source.tpg.mode=%d.\n", + s_config->source.tpg.mode); + dev_dbg(isp->dev, "stream_config.source.tpg.x_mask=%d.\n", + s_config->source.tpg.x_mask); + dev_dbg(isp->dev, "stream_config.source.tpg.x_delta=%d.\n", + s_config->source.tpg.x_delta); + dev_dbg(isp->dev, "stream_config.source.tpg.y_mask=%d.\n", + s_config->source.tpg.y_mask); + dev_dbg(isp->dev, "stream_config.source.tpg.y_delta=%d.\n", + s_config->source.tpg.y_delta); + dev_dbg(isp->dev, "stream_config.source.tpg.xy_mask=%d.\n", + s_config->source.tpg.xy_mask); + } else if (s_config->mode == IA_CSS_INPUT_MODE_PRBS) { + dev_dbg(isp->dev, "stream_config.source.prbs.id=%d.\n", + s_config->source.prbs.id); + dev_dbg(isp->dev, "stream_config.source.prbs.h_blank=%d.\n", + s_config->source.prbs.h_blank); + dev_dbg(isp->dev, "stream_config.source.prbs.v_blank=%d.\n", + s_config->source.prbs.v_blank); + dev_dbg(isp->dev, "stream_config.source.prbs.seed=%d.\n", + s_config->source.prbs.seed); + dev_dbg(isp->dev, "stream_config.source.prbs.seed1=%d.\n", + s_config->source.prbs.seed1); + } + + for (j = 0; j < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; j++) { + dev_dbg(isp->dev, "stream_configisys_config[%d].input_res w=%d, h=%d.\n", + j, + s_config->isys_config[j].input_res.width, + s_config->isys_config[j].input_res.height); + + dev_dbg(isp->dev, "stream_configisys_config[%d].linked_isys_stream_id=%d\n", + j, + s_config->isys_config[j].linked_isys_stream_id); + + dev_dbg(isp->dev, "stream_configisys_config[%d].format=%d\n", + j, + s_config->isys_config[j].format); + + dev_dbg(isp->dev, "stream_configisys_config[%d].valid=%d.\n", + j, + s_config->isys_config[j].valid); + } + + dev_dbg(isp->dev, "stream_config.input_config.input_res w=%d, h=%d.\n", + s_config->input_config.input_res.width, + s_config->input_config.input_res.height); + + dev_dbg(isp->dev, "stream_config.input_config.effective_res w=%d, h=%d.\n", + s_config->input_config.effective_res.width, + s_config->input_config.effective_res.height); + + dev_dbg(isp->dev, "stream_config.input_config.format=%d\n", + s_config->input_config.format); + + dev_dbg(isp->dev, "stream_config.input_config.bayer_order=%d.\n", + s_config->input_config.bayer_order); + + dev_dbg(isp->dev, "stream_config.pixels_per_clock=%d.\n", + s_config->pixels_per_clock); + dev_dbg(isp->dev, "stream_config.online=%d.\n", s_config->online); + dev_dbg(isp->dev, "stream_config.continuous=%d.\n", + s_config->continuous); + dev_dbg(isp->dev, "stream_config.disable_cont_viewfinder=%d.\n", + s_config->disable_cont_viewfinder); + dev_dbg(isp->dev, "stream_config.channel_id=%d.\n", + s_config->channel_id); + dev_dbg(isp->dev, "stream_config.init_num_cont_raw_buf=%d.\n", + s_config->init_num_cont_raw_buf); + dev_dbg(isp->dev, "stream_config.target_num_cont_raw_buf=%d.\n", + s_config->target_num_cont_raw_buf); + dev_dbg(isp->dev, "stream_config.left_padding=%d.\n", + s_config->left_padding); + dev_dbg(isp->dev, "stream_config.sensor_binning_factor=%d.\n", + s_config->sensor_binning_factor); + dev_dbg(isp->dev, "stream_config.pixels_per_clock=%d.\n", + s_config->pixels_per_clock); + dev_dbg(isp->dev, "stream_config.pack_raw_pixels=%d.\n", + s_config->pack_raw_pixels); + dev_dbg(isp->dev, "stream_config.flash_gpio_pin=%d.\n", + s_config->flash_gpio_pin); + dev_dbg(isp->dev, "stream_config.mipi_buffer_config.size_mem_words=%d.\n", + s_config->mipi_buffer_config.size_mem_words); + dev_dbg(isp->dev, "stream_config.mipi_buffer_config.contiguous=%d.\n", + s_config->mipi_buffer_config.contiguous); + dev_dbg(isp->dev, "stream_config.metadata_config.data_type=%d.\n", + s_config->metadata_config.data_type); + dev_dbg(isp->dev, "stream_config.metadata_config.resolution w=%d, h=%d.\n", + s_config->metadata_config.resolution.width, + s_config->metadata_config.resolution.height); +} + +static int __destroy_stream(struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env, bool force) +{ + struct atomisp_device *isp = asd->isp; + int i; + unsigned long timeout; + + if (!stream_env->stream) + return 0; + + if (!force) { + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + if (stream_env->update_pipe[i]) + break; + + if (i == IA_CSS_PIPE_ID_NUM) + return 0; + } + + if (stream_env->stream_state == CSS_STREAM_STARTED + && ia_css_stream_stop(stream_env->stream) != IA_CSS_SUCCESS) { + dev_err(isp->dev, "stop stream failed.\n"); + return -EINVAL; + } + + if (stream_env->stream_state == CSS_STREAM_STARTED) { + timeout = jiffies + msecs_to_jiffies(40); + while (1) { + if (ia_css_stream_has_stopped(stream_env->stream)) + break; + + if (time_after(jiffies, timeout)) { + dev_warn(isp->dev, "stop stream timeout.\n"); + break; + } + + usleep_range(100, 200); + } + } + + stream_env->stream_state = CSS_STREAM_STOPPED; + + if (ia_css_stream_destroy(stream_env->stream) != IA_CSS_SUCCESS) { + dev_err(isp->dev, "destroy stream failed.\n"); + return -EINVAL; + } + stream_env->stream_state = CSS_STREAM_UNINIT; + stream_env->stream = NULL; + + return 0; +} + +static int __destroy_streams(struct atomisp_sub_device *asd, bool force) +{ + int ret, i; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + ret = __destroy_stream(asd, &asd->stream_env[i], force); + if (ret) + return ret; + } + asd->stream_prepared = false; + return 0; +} +static int __create_stream(struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env) +{ + int pipe_index = 0, i; + struct ia_css_pipe *multi_pipes[IA_CSS_PIPE_ID_NUM]; + + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + if (stream_env->pipes[i]) + multi_pipes[pipe_index++] = stream_env->pipes[i]; + } + if (pipe_index == 0) + return 0; + + stream_env->stream_config.target_num_cont_raw_buf = + asd->continuous_raw_buffer_size->val; + stream_env->stream_config.channel_id = stream_env->ch_id; + stream_env->stream_config.ia_css_enable_raw_buffer_locking = + asd->enable_raw_buffer_lock->val; + + __dump_stream_config(asd, stream_env); + if (ia_css_stream_create(&stream_env->stream_config, + pipe_index, multi_pipes, &stream_env->stream) != IA_CSS_SUCCESS) + return -EINVAL; + if (ia_css_stream_get_info(stream_env->stream, + &stream_env->stream_info) != IA_CSS_SUCCESS) { + ia_css_stream_destroy(stream_env->stream); + stream_env->stream = NULL; + return -EINVAL; + } + + stream_env->stream_state = CSS_STREAM_CREATED; + return 0; +} + +static int __create_streams(struct atomisp_sub_device *asd) +{ + int ret, i; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + ret = __create_stream(asd, &asd->stream_env[i]); + if (ret) + goto rollback; + } + asd->stream_prepared = true; + return 0; +rollback: + for (i--; i >= 0; i--) + __destroy_stream(asd, &asd->stream_env[i], true); + return ret; +} + +static int __destroy_stream_pipes(struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env, + bool force) +{ + struct atomisp_device *isp = asd->isp; + int ret = 0; + int i; + + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + if (!stream_env->pipes[i] || + !(force || stream_env->update_pipe[i])) + continue; + if (ia_css_pipe_destroy(stream_env->pipes[i]) + != IA_CSS_SUCCESS) { + dev_err(isp->dev, + "destroy pipe[%d]failed.cannot recover.\n", i); + ret = -EINVAL; + } + stream_env->pipes[i] = NULL; + stream_env->update_pipe[i] = false; + } + return ret; +} + +static int __destroy_pipes(struct atomisp_sub_device *asd, bool force) +{ + struct atomisp_device *isp = asd->isp; + int i; + int ret = 0; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + if (asd->stream_env[i].stream) { + + dev_err(isp->dev, + "cannot destroy css pipes for stream[%d].\n", + i); + continue; + } + + ret = __destroy_stream_pipes(asd, &asd->stream_env[i], force); + if (ret) + return ret; + } + + return 0; +} + +void atomisp_destroy_pipes_stream_force(struct atomisp_sub_device *asd) +{ + __destroy_streams(asd, true); + __destroy_pipes(asd, true); +} + +static void __apply_additional_pipe_config( + struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + + if (pipe_id < 0 || pipe_id >= IA_CSS_PIPE_ID_NUM) { + dev_err(isp->dev, + "wrong pipe_id for additional pipe config.\n"); + return; + } + + /* apply default pipe config */ + stream_env->pipe_configs[pipe_id].isp_pipe_version = 2; + stream_env->pipe_configs[pipe_id].enable_dz = + asd->disable_dz->val ? false : true; + /* apply isp 2.2 specific config for baytrail*/ + switch (pipe_id) { + case IA_CSS_PIPE_ID_CAPTURE: + /* enable capture pp/dz manually or digital zoom would + * fail*/ + if (stream_env->pipe_configs[pipe_id]. + default_capture_config.mode == CSS_CAPTURE_MODE_RAW) + stream_env->pipe_configs[pipe_id].enable_dz = false; +#ifdef ISP2401 + + /* the isp default to use ISP2.2 and the camera hal will + * control whether use isp2.7 */ + if (asd->select_isp_version->val == + ATOMISP_CSS_ISP_PIPE_VERSION_2_7) + stream_env->pipe_configs[pipe_id].isp_pipe_version = + SH_CSS_ISP_PIPE_VERSION_2_7; + else + stream_env->pipe_configs[pipe_id].isp_pipe_version = + SH_CSS_ISP_PIPE_VERSION_2_2; +#endif + break; + case IA_CSS_PIPE_ID_VIDEO: + /* enable reduced pipe to have binary + * video_dz_2_min selected*/ + stream_env->pipe_extra_configs[pipe_id] + .enable_reduced_pipe = true; + stream_env->pipe_configs[pipe_id] + .enable_dz = false; + if (ATOMISP_SOC_CAMERA(asd)) + stream_env->pipe_configs[pipe_id].enable_dz = true; + + if (asd->params.video_dis_en) { + stream_env->pipe_extra_configs[pipe_id] + .enable_dvs_6axis = true; + stream_env->pipe_configs[pipe_id] + .dvs_frame_delay = + ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; + } + break; + case IA_CSS_PIPE_ID_PREVIEW: + break; + case IA_CSS_PIPE_ID_YUVPP: + case IA_CSS_PIPE_ID_COPY: + if (ATOMISP_SOC_CAMERA(asd)) + stream_env->pipe_configs[pipe_id].enable_dz = true; + else + stream_env->pipe_configs[pipe_id].enable_dz = false; + break; + case IA_CSS_PIPE_ID_ACC: + stream_env->pipe_configs[pipe_id].mode = IA_CSS_PIPE_MODE_ACC; + stream_env->pipe_configs[pipe_id].enable_dz = false; + break; + default: + break; + } +} + +static bool is_pipe_valid_to_current_run_mode(struct atomisp_sub_device *asd, + enum ia_css_pipe_id pipe_id) +{ + if (!asd) + return false; + + if (pipe_id == CSS_PIPE_ID_ACC || pipe_id == CSS_PIPE_ID_YUVPP) + return true; + + if (asd->vfpp) { + if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { + if (pipe_id == IA_CSS_PIPE_ID_VIDEO) + return true; + else + return false; + } else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) { + if (pipe_id == IA_CSS_PIPE_ID_CAPTURE) + return true; + else + return false; + } + } + + if (!asd->run_mode) + return false; + + if (asd->copy_mode && pipe_id == IA_CSS_PIPE_ID_COPY) + return true; + + switch (asd->run_mode->val) { + case ATOMISP_RUN_MODE_STILL_CAPTURE: + if (pipe_id == IA_CSS_PIPE_ID_CAPTURE) + return true; + else + return false; + case ATOMISP_RUN_MODE_PREVIEW: + if (!asd->continuous_mode->val) { + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) + return true; + else + return false; + } + /* fall through to ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE */ + case ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE: + if (pipe_id == IA_CSS_PIPE_ID_CAPTURE || + pipe_id == IA_CSS_PIPE_ID_PREVIEW) + return true; + else + return false; + case ATOMISP_RUN_MODE_VIDEO: + if (!asd->continuous_mode->val) { + if (pipe_id == IA_CSS_PIPE_ID_VIDEO || + pipe_id == IA_CSS_PIPE_ID_YUVPP) + return true; + else + return false; + } + /* fall through to ATOMISP_RUN_MODE_SDV */ + case ATOMISP_RUN_MODE_SDV: + if (pipe_id == IA_CSS_PIPE_ID_CAPTURE || + pipe_id == IA_CSS_PIPE_ID_VIDEO) + return true; + else + return false; + } + + return false; +} + +static int __create_pipe(struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + struct ia_css_pipe_extra_config extra_config; + enum ia_css_err ret; + + if (pipe_id >= IA_CSS_PIPE_ID_NUM) + return -EINVAL; + + if (pipe_id != CSS_PIPE_ID_ACC && + !stream_env->pipe_configs[pipe_id].output_info[0].res.width) + return 0; + + if (pipe_id == CSS_PIPE_ID_ACC && + !stream_env->pipe_configs[pipe_id].acc_extension) + return 0; + + if (!is_pipe_valid_to_current_run_mode(asd, pipe_id)) + return 0; + + ia_css_pipe_extra_config_defaults(&extra_config); + + __apply_additional_pipe_config(asd, stream_env, pipe_id); + if (!memcmp(&extra_config, + &stream_env->pipe_extra_configs[pipe_id], + sizeof(extra_config))) + ret = ia_css_pipe_create( + &stream_env->pipe_configs[pipe_id], + &stream_env->pipes[pipe_id]); + else + ret = ia_css_pipe_create_extra( + &stream_env->pipe_configs[pipe_id], + &stream_env->pipe_extra_configs[pipe_id], + &stream_env->pipes[pipe_id]); + if (ret != IA_CSS_SUCCESS) + dev_err(isp->dev, "create pipe[%d] error.\n", pipe_id); + return ret; +} + +static int __create_pipes(struct atomisp_sub_device *asd) +{ + enum ia_css_err ret; + int i, j; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) { + ret = __create_pipe(asd, &asd->stream_env[i], j); + if (ret != IA_CSS_SUCCESS) + break; + } + if (j < IA_CSS_PIPE_ID_NUM) + goto pipe_err; + } + return 0; +pipe_err: + for (; i >= 0; i--) { + for (j--; j >= 0; j--) { + if (asd->stream_env[i].pipes[j]) { + ia_css_pipe_destroy(asd->stream_env[i].pipes[j]); + asd->stream_env[i].pipes[j] = NULL; + } + } + j = IA_CSS_PIPE_ID_NUM; + } + return -EINVAL; +} + +void atomisp_create_pipes_stream(struct atomisp_sub_device *asd) +{ + __create_pipes(asd); + __create_streams(asd); +} + +int atomisp_css_update_stream(struct atomisp_sub_device *asd) +{ + int ret; + struct atomisp_device *isp = asd->isp; + + if (__destroy_streams(asd, true) != IA_CSS_SUCCESS) + dev_warn(isp->dev, "destroy stream failed.\n"); + + if (__destroy_pipes(asd, true) != IA_CSS_SUCCESS) + dev_warn(isp->dev, "destroy pipe failed.\n"); + + ret = __create_pipes(asd); + if (ret != IA_CSS_SUCCESS) { + dev_err(isp->dev, "create pipe failed %d.\n", ret); + return -EIO; + } + + ret = __create_streams(asd); + if (ret != IA_CSS_SUCCESS) { + dev_warn(isp->dev, "create stream failed %d.\n", ret); + __destroy_pipes(asd, true); + return -EIO; + } + + return 0; +} + +int atomisp_css_init(struct atomisp_device *isp) +{ + unsigned int mmu_base_addr; + int ret; + enum ia_css_err err; + + ret = hmm_get_mmu_base_addr(&mmu_base_addr); + if (ret) + return ret; + + /* Init ISP */ + err = ia_css_init(&isp->css_env.isp_css_env, NULL, + (uint32_t)mmu_base_addr, IA_CSS_IRQ_TYPE_PULSE); + if (err != IA_CSS_SUCCESS) { + dev_err(isp->dev, "css init failed --- bad firmware?\n"); + return -EINVAL; + } + ia_css_enable_isys_event_queue(true); + + isp->css_initialized = true; + dev_dbg(isp->dev, "sh_css_init success\n"); + + return 0; +} + +static inline int __set_css_print_env(struct atomisp_device *isp, int opt) +{ + int ret = 0; + + if (opt == 0) + isp->css_env.isp_css_env.print_env.debug_print = NULL; + else if (opt == 1) + isp->css_env.isp_css_env.print_env.debug_print = + atomisp_css2_dbg_ftrace_print; + else if (opt == 2) + isp->css_env.isp_css_env.print_env.debug_print = + atomisp_css2_dbg_print; + else + ret = -EINVAL; + + return ret; +} + +int atomisp_css_check_firmware_version(struct atomisp_device *isp) +{ + if (!sh_css_check_firmware_version((void *)isp->firmware->data)) { + dev_err(isp->dev, "Fw version check failed.\n"); + return -EINVAL; + } + return 0; +} + +int atomisp_css_load_firmware(struct atomisp_device *isp) +{ + enum ia_css_err err; + + /* set css env */ + isp->css_env.isp_css_fw.data = (void *)isp->firmware->data; + isp->css_env.isp_css_fw.bytes = isp->firmware->size; + + isp->css_env.isp_css_env.hw_access_env.store_8 = + atomisp_css2_hw_store_8; + isp->css_env.isp_css_env.hw_access_env.store_16 = + atomisp_css2_hw_store_16; + isp->css_env.isp_css_env.hw_access_env.store_32 = + atomisp_css2_hw_store_32; + + isp->css_env.isp_css_env.hw_access_env.load_8 = atomisp_css2_hw_load_8; + isp->css_env.isp_css_env.hw_access_env.load_16 = + atomisp_css2_hw_load_16; + isp->css_env.isp_css_env.hw_access_env.load_32 = + atomisp_css2_hw_load_32; + + isp->css_env.isp_css_env.hw_access_env.load = atomisp_css2_hw_load; + isp->css_env.isp_css_env.hw_access_env.store = atomisp_css2_hw_store; + + __set_css_print_env(isp, dbg_func); + + isp->css_env.isp_css_env.print_env.error_print = atomisp_css2_err_print; + + /* load isp fw into ISP memory */ + err = ia_css_load_firmware(&isp->css_env.isp_css_env, + &isp->css_env.isp_css_fw); + if (err != IA_CSS_SUCCESS) { + dev_err(isp->dev, "css load fw failed.\n"); + return -EINVAL; + } + + return 0; +} + +void atomisp_css_unload_firmware(struct atomisp_device *isp) +{ + ia_css_unload_firmware(); +} + +void atomisp_css_uninit(struct atomisp_device *isp) +{ + struct atomisp_sub_device *asd; + unsigned int i; + + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + atomisp_isp_parameters_clean_up(&asd->params.config); + asd->params.css_update_params_needed = false; + } + + isp->css_initialized = false; + ia_css_uninit(); +} + +void atomisp_css_suspend(struct atomisp_device *isp) +{ + isp->css_initialized = false; + ia_css_uninit(); +} + +int atomisp_css_resume(struct atomisp_device *isp) +{ + unsigned int mmu_base_addr; + int ret; + + ret = hmm_get_mmu_base_addr(&mmu_base_addr); + if (ret) { + dev_err(isp->dev, "get base address error.\n"); + return -EINVAL; + } + + ret = ia_css_init(&isp->css_env.isp_css_env, NULL, + mmu_base_addr, IA_CSS_IRQ_TYPE_PULSE); + if (ret) { + dev_err(isp->dev, "re-init css failed.\n"); + return -EINVAL; + } + ia_css_enable_isys_event_queue(true); + + isp->css_initialized = true; + return 0; +} + +int atomisp_css_irq_translate(struct atomisp_device *isp, + unsigned int *infos) +{ + int err; + + err = ia_css_irq_translate(infos); + if (err != IA_CSS_SUCCESS) { + dev_warn(isp->dev, + "%s:failed to translate irq (err = %d,infos = %d)\n", + __func__, err, *infos); + return -EINVAL; + } + + return 0; +} + +void atomisp_css_rx_get_irq_info(enum mipi_port_id port, + unsigned int *infos) +{ +#ifndef ISP2401_NEW_INPUT_SYSTEM + ia_css_isys_rx_get_irq_info(port, infos); +#else + *infos = 0; +#endif +} + +void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, + unsigned int infos) +{ +#ifndef ISP2401_NEW_INPUT_SYSTEM + ia_css_isys_rx_clear_irq_info(port, infos); +#endif +} + +int atomisp_css_irq_enable(struct atomisp_device *isp, + enum atomisp_css_irq_info info, bool enable) +{ + if (ia_css_irq_enable(info, enable) != IA_CSS_SUCCESS) { + dev_warn(isp->dev, "%s:Invalid irq info.\n", __func__); + return -EINVAL; + } + + return 0; +} + +void atomisp_css_init_struct(struct atomisp_sub_device *asd) +{ + int i, j; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + asd->stream_env[i].stream = NULL; + for (j = 0; j < IA_CSS_PIPE_MODE_NUM; j++) { + asd->stream_env[i].pipes[j] = NULL; + asd->stream_env[i].update_pipe[j] = false; + ia_css_pipe_config_defaults( + &asd->stream_env[i].pipe_configs[j]); + ia_css_pipe_extra_config_defaults( + &asd->stream_env[i].pipe_extra_configs[j]); + } + ia_css_stream_config_defaults(&asd->stream_env[i].stream_config); + } +} + +int atomisp_q_video_buffer_to_css(struct atomisp_sub_device *asd, + struct videobuf_vmalloc_memory *vm_mem, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; + struct ia_css_buffer css_buf = {0}; + enum ia_css_err err; + + css_buf.type = css_buf_type; + css_buf.data.frame = vm_mem->vaddr; + + err = ia_css_pipe_enqueue_buffer( + stream_env->pipes[css_pipe_id], &css_buf); + if (err != IA_CSS_SUCCESS) + return -EINVAL; + + return 0; +} + +int atomisp_q_metadata_buffer_to_css(struct atomisp_sub_device *asd, + struct atomisp_metadata_buf *metadata_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; + struct ia_css_buffer buffer = {0}; + struct atomisp_device *isp = asd->isp; + + buffer.type = IA_CSS_BUFFER_TYPE_METADATA; + buffer.data.metadata = metadata_buf->metadata; + if (ia_css_pipe_enqueue_buffer(stream_env->pipes[css_pipe_id], + &buffer)) { + dev_err(isp->dev, "failed to q meta data buffer\n"); + return -EINVAL; + } + + return 0; +} + +int atomisp_q_s3a_buffer_to_css(struct atomisp_sub_device *asd, + struct atomisp_s3a_buf *s3a_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; + struct ia_css_buffer buffer = {0}; + struct atomisp_device *isp = asd->isp; + + buffer.type = IA_CSS_BUFFER_TYPE_3A_STATISTICS; + buffer.data.stats_3a = s3a_buf->s3a_data; + if (ia_css_pipe_enqueue_buffer( + stream_env->pipes[css_pipe_id], + &buffer)) { + dev_dbg(isp->dev, "failed to q s3a stat buffer\n"); + return -EINVAL; + } + + return 0; +} + +int atomisp_q_dis_buffer_to_css(struct atomisp_sub_device *asd, + struct atomisp_dis_buf *dis_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; + struct ia_css_buffer buffer = {0}; + struct atomisp_device *isp = asd->isp; + + buffer.type = IA_CSS_BUFFER_TYPE_DIS_STATISTICS; + buffer.data.stats_dvs = dis_buf->dis_data; + if (ia_css_pipe_enqueue_buffer( + stream_env->pipes[css_pipe_id], + &buffer)) { + dev_dbg(isp->dev, "failed to q dvs stat buffer\n"); + return -EINVAL; + } + + return 0; +} + +void atomisp_css_mmu_invalidate_cache(void) +{ + ia_css_mmu_invalidate_cache(); +} + +void atomisp_css_mmu_invalidate_tlb(void) +{ + ia_css_mmu_invalidate_cache(); +} + +int atomisp_css_start(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, bool in_reset) +{ + struct atomisp_device *isp = asd->isp; + bool sp_is_started = false; + int ret = 0, i = 0; + + if (in_reset) { + if (__destroy_streams(asd, true)) + dev_warn(isp->dev, "destroy stream failed.\n"); + + if (__destroy_pipes(asd, true)) + dev_warn(isp->dev, "destroy pipe failed.\n"); + + if (__create_pipes(asd)) { + dev_err(isp->dev, "create pipe error.\n"); + return -EINVAL; + } + if (__create_streams(asd)) { + dev_err(isp->dev, "create stream error.\n"); + ret = -EINVAL; + goto stream_err; + } + /* in_reset == true, extension firmwares are reloaded after the recovery */ + atomisp_acc_load_extensions(asd); + } + + /* + * For dual steam case, it is possible that: + * 1: for this stream, it is at the stage that: + * - after set_fmt is called + * - before stream on is called + * 2: for the other stream, the stream off is called which css reset + * has been done. + * + * Thus the stream created in set_fmt get destroyed and need to be + * recreated in the next stream on. + */ + if (asd->stream_prepared == false) { + if (__create_pipes(asd)) { + dev_err(isp->dev, "create pipe error.\n"); + return -EINVAL; + } + if (__create_streams(asd)) { + dev_err(isp->dev, "create stream error.\n"); + ret = -EINVAL; + goto stream_err; + } + } + /* + * SP can only be started one time + * if atomisp_subdev_streaming_count() tell there already has some + * subdev at streamming, then SP should already be started previously, + * so need to skip start sp procedure + */ + if (atomisp_streaming_count(isp)) { + dev_dbg(isp->dev, "skip start sp\n"); + } else { + if (!sh_css_hrt_system_is_idle()) + dev_err(isp->dev, "CSS HW not idle before starting SP\n"); + if (ia_css_start_sp() != IA_CSS_SUCCESS) { + dev_err(isp->dev, "start sp error.\n"); + ret = -EINVAL; + goto start_err; + } else { + sp_is_started = true; + } + } + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + if (asd->stream_env[i].stream) { + if (ia_css_stream_start(asd->stream_env[i] + .stream) != IA_CSS_SUCCESS) { + dev_err(isp->dev, "stream[%d] start error.\n", i); + ret = -EINVAL; + goto start_err; + } else { + asd->stream_env[i].stream_state = CSS_STREAM_STARTED; + dev_dbg(isp->dev, "stream[%d] started.\n", i); + } + } + } + + return 0; + +start_err: + __destroy_streams(asd, true); +stream_err: + __destroy_pipes(asd, true); + + /* css 2.0 API limitation: ia_css_stop_sp() could be only called after + * destroy all pipes + */ + /* + * SP can not be stop if other streams are in use + */ + if ((atomisp_streaming_count(isp) == 0) && sp_is_started) + ia_css_stop_sp(); + + return ret; +} + +void atomisp_css_update_isp_params(struct atomisp_sub_device *asd) +{ + /* + * FIXME! + * for ISP2401 new input system, this api is under development. + * Calling it would cause kernel panic. + * + * VIED BZ: 1458 + * + * Check if it is Cherry Trail and also new input system + */ + if (asd->copy_mode) { + dev_warn(asd->isp->dev, + "%s: ia_css_stream_set_isp_config() not supported in copy mode!.\n", + __func__); + return; + } + + ia_css_stream_set_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &asd->params.config); + atomisp_isp_parameters_clean_up(&asd->params.config); +} + + +void atomisp_css_update_isp_params_on_pipe(struct atomisp_sub_device *asd, + struct ia_css_pipe *pipe) +{ + enum ia_css_err ret; + + if (!pipe) { + atomisp_css_update_isp_params(asd); + return; + } + + dev_dbg(asd->isp->dev, "%s: apply parameter for ia_css_frame %p with isp_config_id %d on pipe %p.\n", + __func__, asd->params.config.output_frame, + asd->params.config.isp_config_id, pipe); + + ret = ia_css_stream_set_isp_config_on_pipe( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &asd->params.config, pipe); + if (ret != IA_CSS_SUCCESS) + dev_warn(asd->isp->dev, "%s: ia_css_stream_set_isp_config_on_pipe failed %d\n", + __func__, ret); + atomisp_isp_parameters_clean_up(&asd->params.config); +} + +int atomisp_css_queue_buffer(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id pipe_id, + enum atomisp_css_buffer_type buf_type, + struct atomisp_css_buffer *isp_css_buffer) +{ + if (ia_css_pipe_enqueue_buffer( + asd->stream_env[stream_id].pipes[pipe_id], + &isp_css_buffer->css_buffer) + != IA_CSS_SUCCESS) + return -EINVAL; + + return 0; +} + +int atomisp_css_dequeue_buffer(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id pipe_id, + enum atomisp_css_buffer_type buf_type, + struct atomisp_css_buffer *isp_css_buffer) +{ + struct atomisp_device *isp = asd->isp; + enum ia_css_err err; + + err = ia_css_pipe_dequeue_buffer( + asd->stream_env[stream_id].pipes[pipe_id], + &isp_css_buffer->css_buffer); + if (err != IA_CSS_SUCCESS) { + dev_err(isp->dev, + "ia_css_pipe_dequeue_buffer failed: 0x%x\n", err); + return -EINVAL; + } + + return 0; +} + +int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, + uint16_t stream_id, + struct atomisp_s3a_buf *s3a_buf, + struct atomisp_dis_buf *dis_buf, + struct atomisp_metadata_buf *md_buf) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_css_dvs_grid_info *dvs_grid_info = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + + if (s3a_buf && asd->params.curr_grid_info.s3a_grid.enable) { + void *s3a_ptr; + + s3a_buf->s3a_data = ia_css_isp_3a_statistics_allocate( + &asd->params.curr_grid_info.s3a_grid); + if (!s3a_buf->s3a_data) { + dev_err(isp->dev, "3a buf allocation failed.\n"); + return -EINVAL; + } + + s3a_ptr = hmm_vmap(s3a_buf->s3a_data->data_ptr, true); + s3a_buf->s3a_map = ia_css_isp_3a_statistics_map_allocate( + s3a_buf->s3a_data, s3a_ptr); + } + + if (dis_buf && dvs_grid_info && dvs_grid_info->enable) { + void *dvs_ptr; + + dis_buf->dis_data = ia_css_isp_dvs2_statistics_allocate( + dvs_grid_info); + if (!dis_buf->dis_data) { + dev_err(isp->dev, "dvs buf allocation failed.\n"); + if (s3a_buf) + ia_css_isp_3a_statistics_free(s3a_buf->s3a_data); + return -EINVAL; + } + + dvs_ptr = hmm_vmap(dis_buf->dis_data->data_ptr, true); + dis_buf->dvs_map = ia_css_isp_dvs_statistics_map_allocate( + dis_buf->dis_data, dvs_ptr); + } + + if (asd->stream_env[stream_id].stream_info. + metadata_info.size && md_buf) { + md_buf->metadata = ia_css_metadata_allocate( + &asd->stream_env[stream_id].stream_info.metadata_info); + if (!md_buf->metadata) { + if (s3a_buf) + ia_css_isp_3a_statistics_free(s3a_buf->s3a_data); + if (dis_buf) + ia_css_isp_dvs2_statistics_free(dis_buf->dis_data); + dev_err(isp->dev, "metadata buf allocation failed.\n"); + return -EINVAL; + } + md_buf->md_vptr = hmm_vmap(md_buf->metadata->address, false); + } + + return 0; +} + +void atomisp_css_free_3a_buffer(struct atomisp_s3a_buf *s3a_buf) +{ + if (s3a_buf->s3a_data) + hmm_vunmap(s3a_buf->s3a_data->data_ptr); + + ia_css_isp_3a_statistics_map_free(s3a_buf->s3a_map); + s3a_buf->s3a_map = NULL; + ia_css_isp_3a_statistics_free(s3a_buf->s3a_data); +} + +void atomisp_css_free_dis_buffer(struct atomisp_dis_buf *dis_buf) +{ + if (dis_buf->dis_data) + hmm_vunmap(dis_buf->dis_data->data_ptr); + + ia_css_isp_dvs_statistics_map_free(dis_buf->dvs_map); + dis_buf->dvs_map = NULL; + ia_css_isp_dvs2_statistics_free(dis_buf->dis_data); +} + +void atomisp_css_free_metadata_buffer(struct atomisp_metadata_buf *metadata_buf) +{ + if (metadata_buf->md_vptr) { + hmm_vunmap(metadata_buf->metadata->address); + metadata_buf->md_vptr = NULL; + } + ia_css_metadata_free(metadata_buf->metadata); +} + +void atomisp_css_free_stat_buffers(struct atomisp_sub_device *asd) +{ + struct atomisp_s3a_buf *s3a_buf, *_s3a_buf; + struct atomisp_dis_buf *dis_buf, *_dis_buf; + struct atomisp_metadata_buf *md_buf, *_md_buf; + struct atomisp_css_dvs_grid_info *dvs_grid_info = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + unsigned int i; + + /* 3A statistics use vmalloc, DIS use kmalloc */ + if (dvs_grid_info && dvs_grid_info->enable) { + ia_css_dvs2_coefficients_free(asd->params.css_param.dvs2_coeff); + ia_css_dvs2_statistics_free(asd->params.dvs_stat); + asd->params.css_param.dvs2_coeff = NULL; + asd->params.dvs_stat = NULL; + asd->params.dvs_hor_proj_bytes = 0; + asd->params.dvs_ver_proj_bytes = 0; + asd->params.dvs_hor_coef_bytes = 0; + asd->params.dvs_ver_coef_bytes = 0; + asd->params.dis_proj_data_valid = false; + list_for_each_entry_safe(dis_buf, _dis_buf, + &asd->dis_stats, list) { + atomisp_css_free_dis_buffer(dis_buf); + list_del(&dis_buf->list); + kfree(dis_buf); + } + list_for_each_entry_safe(dis_buf, _dis_buf, + &asd->dis_stats_in_css, list) { + atomisp_css_free_dis_buffer(dis_buf); + list_del(&dis_buf->list); + kfree(dis_buf); + } + } + if (asd->params.curr_grid_info.s3a_grid.enable) { + ia_css_3a_statistics_free(asd->params.s3a_user_stat); + asd->params.s3a_user_stat = NULL; + asd->params.s3a_output_bytes = 0; + list_for_each_entry_safe(s3a_buf, _s3a_buf, + &asd->s3a_stats, list) { + atomisp_css_free_3a_buffer(s3a_buf); + list_del(&s3a_buf->list); + kfree(s3a_buf); + } + list_for_each_entry_safe(s3a_buf, _s3a_buf, + &asd->s3a_stats_in_css, list) { + atomisp_css_free_3a_buffer(s3a_buf); + list_del(&s3a_buf->list); + kfree(s3a_buf); + } + list_for_each_entry_safe(s3a_buf, _s3a_buf, + &asd->s3a_stats_ready, list) { + atomisp_css_free_3a_buffer(s3a_buf); + list_del(&s3a_buf->list); + kfree(s3a_buf); + } + } + + if (asd->params.css_param.dvs_6axis) { + ia_css_dvs2_6axis_config_free(asd->params.css_param.dvs_6axis); + asd->params.css_param.dvs_6axis = NULL; + } + + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + list_for_each_entry_safe(md_buf, _md_buf, + &asd->metadata[i], list) { + atomisp_css_free_metadata_buffer(md_buf); + list_del(&md_buf->list); + kfree(md_buf); + } + list_for_each_entry_safe(md_buf, _md_buf, + &asd->metadata_in_css[i], list) { + atomisp_css_free_metadata_buffer(md_buf); + list_del(&md_buf->list); + kfree(md_buf); + } + list_for_each_entry_safe(md_buf, _md_buf, + &asd->metadata_ready[i], list) { + atomisp_css_free_metadata_buffer(md_buf); + list_del(&md_buf->list); + kfree(md_buf); + } + } + asd->params.metadata_width_size = 0; + atomisp_free_metadata_output_buf(asd); +} + +int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, + int source_pad) +{ + struct ia_css_pipe_info p_info; + struct ia_css_grid_info old_info; + struct atomisp_device *isp = asd->isp; + int stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + int md_width = asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + stream_config.metadata_config.resolution.width; + + memset(&p_info, 0, sizeof(struct ia_css_pipe_info)); + memset(&old_info, 0, sizeof(struct ia_css_grid_info)); + + if (ia_css_pipe_get_info( + asd->stream_env[stream_index].pipes[pipe_id], + &p_info) != IA_CSS_SUCCESS) { + dev_err(isp->dev, "ia_css_pipe_get_info failed\n"); + return -EINVAL; + } + + memcpy(&old_info, &asd->params.curr_grid_info, + sizeof(struct ia_css_grid_info)); + memcpy(&asd->params.curr_grid_info, &p_info.grid_info, + sizeof(struct ia_css_grid_info)); + /* + * Record which css pipe enables s3a_grid. + * Currently would have one css pipe that need it + */ + if (asd->params.curr_grid_info.s3a_grid.enable) { + if (asd->params.s3a_enabled_pipe != CSS_PIPE_ID_NUM) + dev_dbg(isp->dev, "css pipe %d enabled s3a grid replaced by: %d.\n", + asd->params.s3a_enabled_pipe, pipe_id); + asd->params.s3a_enabled_pipe = pipe_id; + } + + /* If the grid info has not changed and the buffers for 3A and + * DIS statistics buffers are allocated or buffer size would be zero + * then no need to do anything. */ + if (((!memcmp(&old_info, &asd->params.curr_grid_info, sizeof(old_info)) + && asd->params.s3a_user_stat && asd->params.dvs_stat) + || asd->params.curr_grid_info.s3a_grid.width == 0 + || asd->params.curr_grid_info.s3a_grid.height == 0) + && asd->params.metadata_width_size == md_width) { + dev_dbg(isp->dev, + "grid info change escape. memcmp=%d, s3a_user_stat=%d," + "dvs_stat=%d, s3a.width=%d, s3a.height=%d, metadata width =%d\n", + !memcmp(&old_info, &asd->params.curr_grid_info, + sizeof(old_info)), + !!asd->params.s3a_user_stat, !!asd->params.dvs_stat, + asd->params.curr_grid_info.s3a_grid.width, + asd->params.curr_grid_info.s3a_grid.height, + asd->params.metadata_width_size); + return -EINVAL; + } + asd->params.metadata_width_size = md_width; + + return 0; +} + +int atomisp_alloc_3a_output_buf(struct atomisp_sub_device *asd) +{ + if (!asd->params.curr_grid_info.s3a_grid.width || + !asd->params.curr_grid_info.s3a_grid.height) + return 0; + + asd->params.s3a_user_stat = ia_css_3a_statistics_allocate( + &asd->params.curr_grid_info.s3a_grid); + if (!asd->params.s3a_user_stat) + return -ENOMEM; + /* 3A statistics. These can be big, so we use vmalloc. */ + asd->params.s3a_output_bytes = + asd->params.curr_grid_info.s3a_grid.width * + asd->params.curr_grid_info.s3a_grid.height * + sizeof(*asd->params.s3a_user_stat->data); + + return 0; +} + +int atomisp_alloc_dis_coef_buf(struct atomisp_sub_device *asd) +{ + struct atomisp_css_dvs_grid_info *dvs_grid = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + + if (!dvs_grid) + return 0; + + if (!dvs_grid->enable) { + dev_dbg(asd->isp->dev, "%s: dvs_grid not enabled.\n", __func__); + return 0; + } + + /* DIS coefficients. */ + asd->params.css_param.dvs2_coeff = ia_css_dvs2_coefficients_allocate( + dvs_grid); + if (!asd->params.css_param.dvs2_coeff) + return -ENOMEM; + + asd->params.dvs_hor_coef_bytes = dvs_grid->num_hor_coefs * + sizeof(*asd->params.css_param.dvs2_coeff->hor_coefs.odd_real); + + asd->params.dvs_ver_coef_bytes = dvs_grid->num_ver_coefs * + sizeof(*asd->params.css_param.dvs2_coeff->ver_coefs.odd_real); + + /* DIS projections. */ + asd->params.dis_proj_data_valid = false; + asd->params.dvs_stat = ia_css_dvs2_statistics_allocate(dvs_grid); + if (!asd->params.dvs_stat) + return -ENOMEM; + + asd->params.dvs_hor_proj_bytes = + dvs_grid->aligned_height * dvs_grid->aligned_width * + sizeof(*asd->params.dvs_stat->hor_prod.odd_real); + + asd->params.dvs_ver_proj_bytes = + dvs_grid->aligned_height * dvs_grid->aligned_width * + sizeof(*asd->params.dvs_stat->ver_prod.odd_real); + + return 0; +} + +int atomisp_alloc_metadata_output_buf(struct atomisp_sub_device *asd) +{ + int i; + + /* We allocate the cpu-side buffer used for communication with user + * space */ + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + asd->params.metadata_user[i] = kvmalloc( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + stream_info.metadata_info.size, GFP_KERNEL); + if (!asd->params.metadata_user[i]) { + while (--i >= 0) { + kvfree(asd->params.metadata_user[i]); + asd->params.metadata_user[i] = NULL; + } + return -ENOMEM; + } + } + + return 0; +} + +void atomisp_free_metadata_output_buf(struct atomisp_sub_device *asd) +{ + unsigned int i; + + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + if (asd->params.metadata_user[i]) { + kvfree(asd->params.metadata_user[i]); + asd->params.metadata_user[i] = NULL; + } + } +} + +void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, + struct atomisp_css_buffer *isp_css_buffer, + struct ia_css_isp_dvs_statistics_map *dvs_map) +{ + if (asd->params.dvs_stat) { + if (dvs_map) + ia_css_translate_dvs2_statistics( + asd->params.dvs_stat, dvs_map); + else + ia_css_get_dvs2_statistics(asd->params.dvs_stat, + isp_css_buffer->css_buffer.data.stats_dvs); + + } +} + +int atomisp_css_dequeue_event(struct atomisp_css_event *current_event) +{ + if (ia_css_dequeue_event(¤t_event->event) != IA_CSS_SUCCESS) + return -EINVAL; + + return 0; +} + +void atomisp_css_temp_pipe_to_pipe_id(struct atomisp_sub_device *asd, + struct atomisp_css_event *current_event) +{ + /* + * FIXME! + * Pipe ID reported in CSS event is not correct for new system's + * copy pipe. + * VIED BZ: 1463 + */ + ia_css_temp_pipe_to_pipe_id(current_event->event.pipe, + ¤t_event->pipe); + if (asd && asd->copy_mode && + current_event->pipe == IA_CSS_PIPE_ID_CAPTURE) + current_event->pipe = IA_CSS_PIPE_ID_COPY; +} + +int atomisp_css_isys_set_resolution(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt, + int isys_stream) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + if (isys_stream >= IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH) + return -EINVAL; + + s_config->isys_config[isys_stream].input_res.width = ffmt->width; + s_config->isys_config[isys_stream].input_res.height = ffmt->height; + return 0; +} + +int atomisp_css_input_set_resolution(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->input_config.input_res.width = ffmt->width; + s_config->input_config.input_res.height = ffmt->height; + return 0; +} + +void atomisp_css_input_set_binning_factor(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + unsigned int bin_factor) +{ + asd->stream_env[stream_id] + .stream_config.sensor_binning_factor = bin_factor; +} + +void atomisp_css_input_set_bayer_order(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_bayer_order bayer_order) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + s_config->input_config.bayer_order = bayer_order; +} + +void atomisp_css_isys_set_link(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + int link, + int isys_stream) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->isys_config[isys_stream].linked_isys_stream_id = link; +} + +void atomisp_css_isys_set_valid(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + bool valid, + int isys_stream) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->isys_config[isys_stream].valid = valid; +} + +void atomisp_css_isys_set_format(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format format, + int isys_stream) +{ + + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->isys_config[isys_stream].format = format; +} + +void atomisp_css_input_set_format(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format format) +{ + + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->input_config.format = format; +} + +int atomisp_css_set_default_isys_config(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt) +{ + int i; + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + /* + * Set all isys configs to not valid. + * Currently we support only one stream per channel + */ + for (i = IA_CSS_STREAM_ISYS_STREAM_0; + i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) + s_config->isys_config[i].valid = false; + + atomisp_css_isys_set_resolution(asd, stream_id, ffmt, + IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX); + atomisp_css_isys_set_format(asd, stream_id, + s_config->input_config.format, + IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX); + atomisp_css_isys_set_link(asd, stream_id, NO_LINK, + IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX); + atomisp_css_isys_set_valid(asd, stream_id, true, + IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX); + + return 0; +} + +int atomisp_css_isys_two_stream_cfg(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.width = + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.width; + + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.height = + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.height / 2; + + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].linked_isys_stream_id + = IA_CSS_STREAM_ISYS_STREAM_0; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].format = + ATOMISP_INPUT_FORMAT_USER_DEF1; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].format = + ATOMISP_INPUT_FORMAT_USER_DEF2; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].valid = true; + return 0; +} + +void atomisp_css_isys_two_stream_cfg_update_stream1( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.width = + width; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.height = + height; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].format = + input_format; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].valid = true; +} + +void atomisp_css_isys_two_stream_cfg_update_stream2( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.width = + width; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.height = + height; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].linked_isys_stream_id + = IA_CSS_STREAM_ISYS_STREAM_0; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].format = + input_format; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].valid = true; +} + +int atomisp_css_input_set_effective_resolution( + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + unsigned int width, unsigned int height) +{ + struct ia_css_stream_config *s_config = + &asd->stream_env[stream_id].stream_config; + s_config->input_config.effective_res.width = width; + s_config->input_config.effective_res.height = height; + return 0; +} + +void atomisp_css_video_set_dis_envelope(struct atomisp_sub_device *asd, + unsigned int dvs_w, unsigned int dvs_h) +{ + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[IA_CSS_PIPE_ID_VIDEO].dvs_envelope.width = dvs_w; + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[IA_CSS_PIPE_ID_VIDEO].dvs_envelope.height = dvs_h; +} + +void atomisp_css_input_set_two_pixels_per_clock( + struct atomisp_sub_device *asd, + bool two_ppc) +{ + int i; + + if (asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config.pixels_per_clock == (two_ppc ? 2 : 1)) + return; + + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config.pixels_per_clock = (two_ppc ? 2 : 1); + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .update_pipe[i] = true; +} + +void atomisp_css_enable_raw_binning(struct atomisp_sub_device *asd, + bool enable) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + unsigned int pipe; + + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) + pipe = IA_CSS_PIPE_ID_VIDEO; + else + pipe = IA_CSS_PIPE_ID_PREVIEW; + + stream_env->pipe_extra_configs[pipe].enable_raw_binning = enable; + stream_env->update_pipe[pipe] = true; + if (enable) + stream_env->pipe_configs[pipe].output_info[0].padded_width = + stream_env->stream_config.input_config.effective_res.width; +} + +void atomisp_css_enable_dz(struct atomisp_sub_device *asd, bool enable) +{ + int i; + + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[i].enable_dz = enable; +} + +void atomisp_css_capture_set_mode(struct atomisp_sub_device *asd, + enum atomisp_css_capture_mode mode) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + + if (stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE] + .default_capture_config.mode == mode) + return; + + stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE]. + default_capture_config.mode = mode; + stream_env->update_pipe[IA_CSS_PIPE_ID_CAPTURE] = true; +} + +void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, + enum atomisp_css_input_mode mode) +{ + int i; + struct atomisp_device *isp = asd->isp; + unsigned int size_mem_words; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) + asd->stream_env[i].stream_config.mode = mode; + + if (isp->inputs[asd->input_curr].type == TEST_PATTERN) { + struct ia_css_stream_config *s_config = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_config; + s_config->mode = IA_CSS_INPUT_MODE_TPG; + s_config->source.tpg.mode = IA_CSS_TPG_MODE_CHECKERBOARD; + s_config->source.tpg.x_mask = (1 << 4) - 1; + s_config->source.tpg.x_delta = -2; + s_config->source.tpg.y_mask = (1 << 4) - 1; + s_config->source.tpg.y_delta = 3; + s_config->source.tpg.xy_mask = (1 << 8) - 1; + return; + } + + if (mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + return; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + /* + * TODO: sensor needs to export the embedded_data_size_words + * information to atomisp for each setting. + * Here using a large safe value. + */ + struct ia_css_stream_config *s_config = + &asd->stream_env[i].stream_config; + + if (s_config->input_config.input_res.width == 0) + continue; + + if (ia_css_mipi_frame_calculate_size( + s_config->input_config.input_res.width, + s_config->input_config.input_res.height, + s_config->input_config.format, + true, + 0x13000, + &size_mem_words) != IA_CSS_SUCCESS) { + if (intel_mid_identify_cpu() == + INTEL_MID_CPU_CHIP_TANGIER) + size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_2; + else + size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_1; + dev_warn(asd->isp->dev, + "ia_css_mipi_frame_calculate_size failed," + "applying pre-defined MIPI buffer size %u.\n", + size_mem_words); + } + s_config->mipi_buffer_config.size_mem_words = size_mem_words; + s_config->mipi_buffer_config.nof_mipi_buffers = 2; + } +} + +void atomisp_css_capture_enable_online(struct atomisp_sub_device *asd, + unsigned short stream_index, bool enable) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[stream_index]; + + if (stream_env->stream_config.online == !!enable) + return; + + stream_env->stream_config.online = !!enable; + stream_env->update_pipe[IA_CSS_PIPE_ID_CAPTURE] = true; +} + +void atomisp_css_preview_enable_online(struct atomisp_sub_device *asd, + unsigned short stream_index, bool enable) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[stream_index]; + int i; + + if (stream_env->stream_config.online != !!enable) { + stream_env->stream_config.online = !!enable; + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + stream_env->update_pipe[i] = true; + } +} + +void atomisp_css_video_enable_online(struct atomisp_sub_device *asd, + bool enable) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_VIDEO]; + int i; + + if (stream_env->stream_config.online != enable) { + stream_env->stream_config.online = enable; + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + stream_env->update_pipe[i] = true; + } +} + +void atomisp_css_enable_continuous(struct atomisp_sub_device *asd, + bool enable) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + int i; + + /* + * To SOC camera, there is only one YUVPP pipe in any case + * including ZSL/SDV/continuous viewfinder, so always set + * stream_config.continuous to 0. + */ + if (ATOMISP_USE_YUVPP(asd)) { + stream_env->stream_config.continuous = 0; + stream_env->stream_config.online = 1; + return; + } + + if (stream_env->stream_config.continuous != !!enable) { + stream_env->stream_config.continuous = !!enable; + stream_env->stream_config.pack_raw_pixels = true; + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + stream_env->update_pipe[i] = true; + } +} + +void atomisp_css_enable_cvf(struct atomisp_sub_device *asd, + bool enable) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + int i; + + if (stream_env->stream_config.disable_cont_viewfinder != !enable) { + stream_env->stream_config.disable_cont_viewfinder = !enable; + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + stream_env->update_pipe[i] = true; + } +} + +int atomisp_css_input_configure_port( + struct atomisp_sub_device *asd, + enum mipi_port_id port, + unsigned int num_lanes, + unsigned int timeout, + unsigned int mipi_freq, + enum atomisp_input_format metadata_format, + unsigned int metadata_width, + unsigned int metadata_height) +{ + int i; + struct atomisp_stream_env *stream_env; + /* + * Calculate rx_count as follows: + * Input: mipi_freq : CSI-2 bus frequency in Hz + * UI = 1 / (2 * mipi_freq) : period of one bit on the bus + * min = 85e-9 + 6 * UI : Limits for rx_count in seconds + * max = 145e-9 + 10 * UI + * rxcount0 = min / (4 / mipi_freq) : convert seconds to byte clocks + * rxcount = rxcount0 - 2 : adjust for better results + * The formula below is simplified version of the above with + * 10-bit fixed points for improved accuracy. + */ + const unsigned int rxcount = + min(((mipi_freq / 46000) - 1280) >> 10, 0xffU) * 0x01010101U; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + stream_env = &asd->stream_env[i]; + stream_env->stream_config.source.port.port = port; + stream_env->stream_config.source.port.num_lanes = num_lanes; + stream_env->stream_config.source.port.timeout = timeout; + if (mipi_freq) + stream_env->stream_config.source.port.rxcount = rxcount; + stream_env->stream_config. + metadata_config.data_type = metadata_format; + stream_env->stream_config. + metadata_config.resolution.width = metadata_width; + stream_env->stream_config. + metadata_config.resolution.height = metadata_height; + } + + return 0; +} + +int atomisp_css_frame_allocate(struct atomisp_css_frame **frame, + unsigned int width, unsigned int height, + enum atomisp_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth) +{ + if (ia_css_frame_allocate(frame, width, height, format, + padded_width, raw_bit_depth) != IA_CSS_SUCCESS) + return -ENOMEM; + + return 0; +} + +int atomisp_css_frame_allocate_from_info(struct atomisp_css_frame **frame, + const struct atomisp_css_frame_info *info) +{ + if (ia_css_frame_allocate_from_info(frame, info) != IA_CSS_SUCCESS) + return -ENOMEM; + + return 0; +} + +void atomisp_css_frame_free(struct atomisp_css_frame *frame) +{ + ia_css_frame_free(frame); +} + +int atomisp_css_frame_map(struct atomisp_css_frame **frame, + const struct atomisp_css_frame_info *info, + const void __user *data, uint16_t attribute, + void *context) +{ + if (ia_css_frame_map(frame, info, data, attribute, context) + != IA_CSS_SUCCESS) + return -ENOMEM; + + return 0; +} + +int atomisp_css_set_black_frame(struct atomisp_sub_device *asd, + const struct atomisp_css_frame *raw_black_frame) +{ + if (sh_css_set_black_frame( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + raw_black_frame) != IA_CSS_SUCCESS) + return -ENOMEM; + + return 0; +} + +int atomisp_css_allocate_continuous_frames(bool init_time, + struct atomisp_sub_device *asd) +{ + if (ia_css_alloc_continuous_frame_remain( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) + != IA_CSS_SUCCESS) + return -EINVAL; + return 0; +} + +void atomisp_css_update_continuous_frames(struct atomisp_sub_device *asd) +{ + ia_css_update_continuous_frames( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream); +} + +int atomisp_css_stop(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, bool in_reset) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_s3a_buf *s3a_buf; + struct atomisp_dis_buf *dis_buf; + struct atomisp_metadata_buf *md_buf; + unsigned long irqflags; + unsigned int i; + + /* if is called in atomisp_reset(), force destroy stream */ + if (__destroy_streams(asd, true)) + dev_err(isp->dev, "destroy stream failed.\n"); + + /* if is called in atomisp_reset(), force destroy all pipes */ + if (__destroy_pipes(asd, true)) + dev_err(isp->dev, "destroy pipes failed.\n"); + + atomisp_init_raw_buffer_bitmap(asd); + + /* + * SP can not be stop if other streams are in use + */ + if (atomisp_streaming_count(isp) == 0) + ia_css_stop_sp(); + + if (!in_reset) { + struct atomisp_stream_env *stream_env; + int i, j; + + for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { + stream_env = &asd->stream_env[i]; + for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) { + ia_css_pipe_config_defaults( + &stream_env->pipe_configs[j]); + ia_css_pipe_extra_config_defaults( + &stream_env->pipe_extra_configs[j]); + } + ia_css_stream_config_defaults( + &stream_env->stream_config); + } + atomisp_isp_parameters_clean_up(&asd->params.config); + asd->params.css_update_params_needed = false; + } + + /* move stats buffers to free queue list */ + while (!list_empty(&asd->s3a_stats_in_css)) { + s3a_buf = list_entry(asd->s3a_stats_in_css.next, + struct atomisp_s3a_buf, list); + list_del(&s3a_buf->list); + list_add_tail(&s3a_buf->list, &asd->s3a_stats); + } + while (!list_empty(&asd->s3a_stats_ready)) { + s3a_buf = list_entry(asd->s3a_stats_ready.next, + struct atomisp_s3a_buf, list); + list_del(&s3a_buf->list); + list_add_tail(&s3a_buf->list, &asd->s3a_stats); + } + + spin_lock_irqsave(&asd->dis_stats_lock, irqflags); + while (!list_empty(&asd->dis_stats_in_css)) { + dis_buf = list_entry(asd->dis_stats_in_css.next, + struct atomisp_dis_buf, list); + list_del(&dis_buf->list); + list_add_tail(&dis_buf->list, &asd->dis_stats); + } + asd->params.dis_proj_data_valid = false; + spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags); + + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + while (!list_empty(&asd->metadata_in_css[i])) { + md_buf = list_entry(asd->metadata_in_css[i].next, + struct atomisp_metadata_buf, list); + list_del(&md_buf->list); + list_add_tail(&md_buf->list, &asd->metadata[i]); + } + while (!list_empty(&asd->metadata_ready[i])) { + md_buf = list_entry(asd->metadata_ready[i].next, + struct atomisp_metadata_buf, list); + list_del(&md_buf->list); + list_add_tail(&md_buf->list, &asd->metadata[i]); + } + } + + atomisp_flush_params_queue(&asd->video_out_capture); + atomisp_flush_params_queue(&asd->video_out_vf); + atomisp_flush_params_queue(&asd->video_out_preview); + atomisp_flush_params_queue(&asd->video_out_video_capture); + atomisp_free_css_parameters(&asd->params.css_param); + memset(&asd->params.css_param, 0, sizeof(asd->params.css_param)); + return 0; +} + +int atomisp_css_continuous_set_num_raw_frames( + struct atomisp_sub_device *asd, + int num_frames) +{ + if (asd->enable_raw_buffer_lock->val) { + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config.init_num_cont_raw_buf = + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES_LOCK_EN; + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + asd->params.video_dis_en) + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config.init_num_cont_raw_buf += + ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; + } else { + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config.init_num_cont_raw_buf = + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES; + } + + if (asd->params.video_dis_en) + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config.init_num_cont_raw_buf += + ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; + + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .stream_config.target_num_cont_raw_buf = num_frames; + return 0; +} + +void atomisp_css_disable_vf_pp(struct atomisp_sub_device *asd, + bool disable) +{ + int i; + + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_extra_configs[i].disable_vf_pp = !!disable; +} + +static enum ia_css_pipe_mode __pipe_id_to_pipe_mode( + struct atomisp_sub_device *asd, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + struct camera_mipi_info *mipi_info = atomisp_to_sensor_mipi_info( + isp->inputs[asd->input_curr].camera); + + switch (pipe_id) { + case IA_CSS_PIPE_ID_COPY: + /* Currently only YUVPP mode supports YUV420_Legacy format. + * Revert this when other pipe modes can support + * YUV420_Legacy format. + */ + if (mipi_info && mipi_info->input_format == + ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) + return IA_CSS_PIPE_MODE_YUVPP; + return IA_CSS_PIPE_MODE_COPY; + case IA_CSS_PIPE_ID_PREVIEW: + return IA_CSS_PIPE_MODE_PREVIEW; + case IA_CSS_PIPE_ID_CAPTURE: + return IA_CSS_PIPE_MODE_CAPTURE; + case IA_CSS_PIPE_ID_VIDEO: + return IA_CSS_PIPE_MODE_VIDEO; + case IA_CSS_PIPE_ID_ACC: + return IA_CSS_PIPE_MODE_ACC; + case IA_CSS_PIPE_ID_YUVPP: + return IA_CSS_PIPE_MODE_YUVPP; + default: + WARN_ON(1); + return IA_CSS_PIPE_MODE_PREVIEW; + } + +} + +static void __configure_output(struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int min_width, + enum ia_css_frame_format format, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_stream_env *stream_env = + &asd->stream_env[stream_index]; + struct ia_css_stream_config *s_config = &stream_env->stream_config; + + stream_env->pipe_configs[pipe_id].mode = + __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + stream_env->pipe_configs[pipe_id].output_info[0].res.width = width; + stream_env->pipe_configs[pipe_id].output_info[0].res.height = height; + stream_env->pipe_configs[pipe_id].output_info[0].format = format; + stream_env->pipe_configs[pipe_id].output_info[0].padded_width = min_width; + + /* isp binary 2.2 specific setting*/ + if (width > s_config->input_config.effective_res.width || + height > s_config->input_config.effective_res.height) { + s_config->input_config.effective_res.width = width; + s_config->input_config.effective_res.height = height; + } + + dev_dbg(isp->dev, "configuring pipe[%d] output info w=%d.h=%d.f=%d.\n", + pipe_id, width, height, format); +} + +static void __configure_video_preview_output(struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int min_width, + enum ia_css_frame_format format, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_stream_env *stream_env = + &asd->stream_env[stream_index]; + struct ia_css_frame_info *css_output_info; + struct ia_css_stream_config *stream_config = &stream_env->stream_config; + + stream_env->pipe_configs[pipe_id].mode = + __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + /* + * second_output will be as video main output in SDV mode + * with SOC camera. output will be as video main output in + * normal video mode. + */ + if (asd->continuous_mode->val) + css_output_info = &stream_env->pipe_configs[pipe_id]. + output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + else + css_output_info = &stream_env->pipe_configs[pipe_id]. + output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + + css_output_info->res.width = width; + css_output_info->res.height = height; + css_output_info->format = format; + css_output_info->padded_width = min_width; + + /* isp binary 2.2 specific setting*/ + if (width > stream_config->input_config.effective_res.width || + height > stream_config->input_config.effective_res.height) { + stream_config->input_config.effective_res.width = width; + stream_config->input_config.effective_res.height = height; + } + + dev_dbg(isp->dev, "configuring pipe[%d] output info w=%d.h=%d.f=%d.\n", + pipe_id, width, height, format); +} + +/* + * For CSS2.1, capture pipe uses capture_pp_in_res to configure yuv + * downscaling input resolution. + */ +static void __configure_capture_pp_input(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + struct ia_css_stream_config *stream_config = &stream_env->stream_config; + struct ia_css_pipe_config *pipe_configs = + &stream_env->pipe_configs[pipe_id]; + struct ia_css_pipe_extra_config *pipe_extra_configs = + &stream_env->pipe_extra_configs[pipe_id]; + unsigned int hor_ds_factor = 0, ver_ds_factor = 0; + + if (width == 0 && height == 0) + return; + + if (width * 9 / 10 < pipe_configs->output_info[0].res.width || + height * 9 / 10 < pipe_configs->output_info[0].res.height) + return; + /* here just copy the calculation in css */ + hor_ds_factor = CEIL_DIV(width >> 1, + pipe_configs->output_info[0].res.width); + ver_ds_factor = CEIL_DIV(height >> 1, + pipe_configs->output_info[0].res.height); + + if ((asd->isp->media_dev.hw_revision < + (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) || + IS_CHT) && hor_ds_factor != ver_ds_factor) { + dev_warn(asd->isp->dev, + "Cropping for capture due to FW limitation"); + return; + } + + pipe_configs->mode = __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + pipe_extra_configs->enable_yuv_ds = true; + + pipe_configs->capt_pp_in_res.width = + stream_config->input_config.effective_res.width; + pipe_configs->capt_pp_in_res.height = + stream_config->input_config.effective_res.height; + + dev_dbg(isp->dev, "configuring pipe[%d]capture pp input w=%d.h=%d.\n", + pipe_id, width, height); +} + +/* + * For CSS2.1, preview pipe could support bayer downscaling, yuv decimation and + * yuv downscaling, which needs addtional configurations. + */ +static void __configure_preview_pp_input(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + int out_width, out_height, yuv_ds_in_width, yuv_ds_in_height; + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + struct ia_css_stream_config *stream_config = &stream_env->stream_config; + struct ia_css_pipe_config *pipe_configs = + &stream_env->pipe_configs[pipe_id]; + struct ia_css_pipe_extra_config *pipe_extra_configs = + &stream_env->pipe_extra_configs[pipe_id]; + struct ia_css_resolution *bayer_ds_out_res = + &pipe_configs->bayer_ds_out_res; + struct ia_css_resolution *vf_pp_in_res = + &pipe_configs->vf_pp_in_res; + struct ia_css_resolution *effective_res = + &stream_config->input_config.effective_res; + + const struct bayer_ds_factor bds_fct[] = {{2, 1}, {3, 2}, {5, 4} }; + /* + * BZ201033: YUV decimation factor of 4 causes couple of rightmost + * columns to be shaded. Remove this factor to work around the CSS bug. + * const unsigned int yuv_dec_fct[] = {4, 2}; + */ + const unsigned int yuv_dec_fct[] = { 2 }; + unsigned int i; + + if (width == 0 && height == 0) + return; + + pipe_configs->mode = __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + out_width = pipe_configs->output_info[0].res.width; + out_height = pipe_configs->output_info[0].res.height; + + /* + * The ISP could do bayer downscaling, yuv decimation and yuv + * downscaling: + * 1: Bayer Downscaling: between effective resolution and + * bayer_ds_res_out; + * 2: YUV Decimation: between bayer_ds_res_out and vf_pp_in_res; + * 3: YUV Downscaling: between vf_pp_in_res and final vf output + * + * Rule for Bayer Downscaling: support factor 2, 1.5 and 1.25 + * Rule for YUV Decimation: support factor 2, 4 + * Rule for YUV Downscaling: arbitary value below 2 + * + * General rule of factor distribution among these stages: + * 1: try to do Bayer downscaling first if not in online mode. + * 2: try to do maximum of 2 for YUV downscaling + * 3: the remainling for YUV decimation + * + * Note: + * Do not configure bayer_ds_out_res if: + * online == 1 or continuous == 0 or raw_binning = 0 + */ + if (stream_config->online || !stream_config->continuous || + !pipe_extra_configs->enable_raw_binning) { + bayer_ds_out_res->width = 0; + bayer_ds_out_res->height = 0; + } else { + bayer_ds_out_res->width = effective_res->width; + bayer_ds_out_res->height = effective_res->height; + + for (i = 0; i < ARRAY_SIZE(bds_fct); i++) { + if (effective_res->width >= out_width * + bds_fct[i].numerator / bds_fct[i].denominator && + effective_res->height >= out_height * + bds_fct[i].numerator / bds_fct[i].denominator) { + bayer_ds_out_res->width = + effective_res->width * + bds_fct[i].denominator / + bds_fct[i].numerator; + bayer_ds_out_res->height = + effective_res->height * + bds_fct[i].denominator / + bds_fct[i].numerator; + break; + } + } + } + /* + * calculate YUV Decimation, YUV downscaling facor: + * YUV Downscaling factor must not exceed 2. + * YUV Decimation factor could be 2, 4. + */ + /* first decide the yuv_ds input resolution */ + if (bayer_ds_out_res->width == 0) { + yuv_ds_in_width = effective_res->width; + yuv_ds_in_height = effective_res->height; + } else { + yuv_ds_in_width = bayer_ds_out_res->width; + yuv_ds_in_height = bayer_ds_out_res->height; + } + + vf_pp_in_res->width = yuv_ds_in_width; + vf_pp_in_res->height = yuv_ds_in_height; + + /* find out the yuv decimation factor */ + for (i = 0; i < ARRAY_SIZE(yuv_dec_fct); i++) { + if (yuv_ds_in_width >= out_width * yuv_dec_fct[i] && + yuv_ds_in_height >= out_height * yuv_dec_fct[i]) { + vf_pp_in_res->width = yuv_ds_in_width / yuv_dec_fct[i]; + vf_pp_in_res->height = yuv_ds_in_height / yuv_dec_fct[i]; + break; + } + } + + if (vf_pp_in_res->width == out_width && + vf_pp_in_res->height == out_height) { + pipe_extra_configs->enable_yuv_ds = false; + vf_pp_in_res->width = 0; + vf_pp_in_res->height = 0; + } else { + pipe_extra_configs->enable_yuv_ds = true; + } + + dev_dbg(isp->dev, "configuring pipe[%d]preview pp input w=%d.h=%d.\n", + pipe_id, width, height); +} + +/* + * For CSS2.1, offline video pipe could support bayer decimation, and + * yuv downscaling, which needs addtional configurations. + */ +static void __configure_video_pp_input(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + int out_width, out_height; + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + struct ia_css_stream_config *stream_config = &stream_env->stream_config; + struct ia_css_pipe_config *pipe_configs = + &stream_env->pipe_configs[pipe_id]; + struct ia_css_pipe_extra_config *pipe_extra_configs = + &stream_env->pipe_extra_configs[pipe_id]; + struct ia_css_resolution *bayer_ds_out_res = + &pipe_configs->bayer_ds_out_res; + struct ia_css_resolution *effective_res = + &stream_config->input_config.effective_res; + + const struct bayer_ds_factor bds_factors[] = { + {8, 1}, {6, 1}, {4, 1}, {3, 1}, {2, 1}, {3, 2} }; + unsigned int i; + + if (width == 0 && height == 0) + return; + + pipe_configs->mode = __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + pipe_extra_configs->enable_yuv_ds = false; + + /* + * If DVS is enabled, video binary will take care the dvs envelope + * and usually the bayer_ds_out_res should be larger than 120% of + * destination resolution, the extra 20% will be cropped as DVS + * envelope. But, if the bayer_ds_out_res is less than 120% of the + * destination. The ISP can still work, but DVS quality is not good. + */ + /* taking at least 10% as envelope */ + if (asd->params.video_dis_en) { + out_width = pipe_configs->output_info[0].res.width * 110 / 100; + out_height = pipe_configs->output_info[0].res.height * 110 / 100; + } else { + out_width = pipe_configs->output_info[0].res.width; + out_height = pipe_configs->output_info[0].res.height; + } + + /* + * calculate bayer decimate factor: + * 1: only 1.5, 2, 4 and 8 get supported + * 2: Do not configure bayer_ds_out_res if: + * online == 1 or continuous == 0 or raw_binning = 0 + */ + if (stream_config->online || !stream_config->continuous) { + bayer_ds_out_res->width = 0; + bayer_ds_out_res->height = 0; + goto done; + } + + pipe_extra_configs->enable_raw_binning = true; + bayer_ds_out_res->width = effective_res->width; + bayer_ds_out_res->height = effective_res->height; + + for (i = 0; i < sizeof(bds_factors) / sizeof(struct bayer_ds_factor); + i++) { + if (effective_res->width >= out_width * + bds_factors[i].numerator / bds_factors[i].denominator && + effective_res->height >= out_height * + bds_factors[i].numerator / bds_factors[i].denominator) { + bayer_ds_out_res->width = effective_res->width * + bds_factors[i].denominator / + bds_factors[i].numerator; + bayer_ds_out_res->height = effective_res->height * + bds_factors[i].denominator / + bds_factors[i].numerator; + break; + } + } + + /* + * DVS is cropped from BDS output, so we do not really need to set the + * envelope to 20% of output resolution here. always set it to 12x12 + * per firmware requirement. + */ + pipe_configs->dvs_envelope.width = 12; + pipe_configs->dvs_envelope.height = 12; + +done: + if (pipe_id == IA_CSS_PIPE_ID_YUVPP) + stream_config->left_padding = -1; + else + stream_config->left_padding = 12; + dev_dbg(isp->dev, "configuring pipe[%d]video pp input w=%d.h=%d.\n", + pipe_id, width, height); +} + +static void __configure_vf_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + stream_env->pipe_configs[pipe_id].mode = + __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + stream_env->pipe_configs[pipe_id].vf_output_info[0].res.width = width; + stream_env->pipe_configs[pipe_id].vf_output_info[0].res.height = height; + stream_env->pipe_configs[pipe_id].vf_output_info[0].format = format; + stream_env->pipe_configs[pipe_id].vf_output_info[0].padded_width = + min_width; + dev_dbg(isp->dev, + "configuring pipe[%d] vf output info w=%d.h=%d.f=%d.\n", + pipe_id, width, height, format); +} + +static void __configure_video_vf_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + struct ia_css_frame_info *css_output_info; + + stream_env->pipe_configs[pipe_id].mode = + __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + /* + * second_vf_output will be as video viewfinder in SDV mode + * with SOC camera. vf_output will be as video viewfinder in + * normal video mode. + */ + if (asd->continuous_mode->val) + css_output_info = &stream_env->pipe_configs[pipe_id]. + vf_output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + else + css_output_info = &stream_env->pipe_configs[pipe_id]. + vf_output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + + css_output_info->res.width = width; + css_output_info->res.height = height; + css_output_info->format = format; + css_output_info->padded_width = min_width; + dev_dbg(isp->dev, + "configuring pipe[%d] vf output info w=%d.h=%d.f=%d.\n", + pipe_id, width, height, format); +} + +static int __get_frame_info(struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info, + enum frame_info_type type, + enum ia_css_pipe_id pipe_id) +{ + struct atomisp_device *isp = asd->isp; + enum ia_css_err ret; + struct ia_css_pipe_info p_info; + + /* FIXME! No need to destroy/recreate all streams */ + if (__destroy_streams(asd, true)) + dev_warn(isp->dev, "destroy stream failed.\n"); + + if (__destroy_pipes(asd, true)) + dev_warn(isp->dev, "destroy pipe failed.\n"); + + if (__create_pipes(asd)) + return -EINVAL; + + if (__create_streams(asd)) + goto stream_err; + + ret = ia_css_pipe_get_info( + asd->stream_env[stream_index] + .pipes[pipe_id], &p_info); + if (ret == IA_CSS_SUCCESS) { + switch (type) { + case ATOMISP_CSS_VF_FRAME: + *info = p_info.vf_output_info[0]; + dev_dbg(isp->dev, "getting vf frame info.\n"); + break; + case ATOMISP_CSS_SECOND_VF_FRAME: + *info = p_info.vf_output_info[1]; + dev_dbg(isp->dev, "getting second vf frame info.\n"); + break; + case ATOMISP_CSS_OUTPUT_FRAME: + *info = p_info.output_info[0]; + dev_dbg(isp->dev, "getting main frame info.\n"); + break; + case ATOMISP_CSS_SECOND_OUTPUT_FRAME: + *info = p_info.output_info[1]; + dev_dbg(isp->dev, "getting second main frame info.\n"); + break; + case ATOMISP_CSS_RAW_FRAME: + *info = p_info.raw_output_info; + dev_dbg(isp->dev, "getting raw frame info.\n"); + } + dev_dbg(isp->dev, "get frame info: w=%d, h=%d, num_invalid_frames %d.\n", + info->res.width, info->res.height, p_info.num_invalid_frames); + return 0; + } + +stream_err: + __destroy_pipes(asd, true); + return -EINVAL; +} + +static unsigned int atomisp_get_pipe_index(struct atomisp_sub_device *asd, + uint16_t source_pad) +{ + struct atomisp_device *isp = asd->isp; + /* + * to SOC camera, use yuvpp pipe. + */ + if (ATOMISP_USE_YUVPP(asd)) + return IA_CSS_PIPE_ID_YUVPP; + + switch (source_pad) { + case ATOMISP_SUBDEV_PAD_SOURCE_VIDEO: + if (asd->yuvpp_mode) + return IA_CSS_PIPE_ID_YUVPP; + if (asd->copy_mode) + return IA_CSS_PIPE_ID_COPY; + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO + || asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) + return IA_CSS_PIPE_ID_VIDEO; + else + return IA_CSS_PIPE_ID_CAPTURE; + case ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE: + if (asd->copy_mode) + return IA_CSS_PIPE_ID_COPY; + return IA_CSS_PIPE_ID_CAPTURE; + case ATOMISP_SUBDEV_PAD_SOURCE_VF: + if (!atomisp_is_mbuscode_raw( + asd->fmt[asd->capture_pad].fmt.code)) + return IA_CSS_PIPE_ID_CAPTURE; + case ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW: + if (asd->yuvpp_mode) + return IA_CSS_PIPE_ID_YUVPP; + if (asd->copy_mode) + return IA_CSS_PIPE_ID_COPY; + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) + return IA_CSS_PIPE_ID_VIDEO; + else + return IA_CSS_PIPE_ID_PREVIEW; + } + dev_warn(isp->dev, + "invalid source pad:%d, return default preview pipe index.\n", + source_pad); + return IA_CSS_PIPE_ID_PREVIEW; +} + +int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, + uint16_t source_pad, + struct atomisp_css_frame_info *frame_info) +{ + struct ia_css_pipe_info info; + int pipe_index = atomisp_get_pipe_index(asd, source_pad); + int stream_index; + struct atomisp_device *isp = asd->isp; + + if (ATOMISP_SOC_CAMERA(asd)) + stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + else { + stream_index = (pipe_index == IA_CSS_PIPE_ID_YUVPP) ? + ATOMISP_INPUT_STREAM_VIDEO : + atomisp_source_pad_to_stream_id(asd, source_pad); + } + + if (IA_CSS_SUCCESS != ia_css_pipe_get_info(asd->stream_env[stream_index] + .pipes[pipe_index], &info)) { + dev_err(isp->dev, "ia_css_pipe_get_info FAILED"); + return -EINVAL; + } + + switch (source_pad) { + case ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE: + *frame_info = info.output_info[0]; + break; + case ATOMISP_SUBDEV_PAD_SOURCE_VIDEO: + if (ATOMISP_USE_YUVPP(asd) && asd->continuous_mode->val) + *frame_info = info. + output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + else + *frame_info = info. + output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + break; + case ATOMISP_SUBDEV_PAD_SOURCE_VF: + if (stream_index == ATOMISP_INPUT_STREAM_POSTVIEW) + *frame_info = info.output_info[0]; + else + *frame_info = info.vf_output_info[0]; + break; + case ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW: + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + (pipe_index == IA_CSS_PIPE_ID_VIDEO || + pipe_index == IA_CSS_PIPE_ID_YUVPP)) + if (ATOMISP_USE_YUVPP(asd) && asd->continuous_mode->val) + *frame_info = info. + vf_output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + else + *frame_info = info. + vf_output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + else if (ATOMISP_USE_YUVPP(asd) && asd->continuous_mode->val) + *frame_info = + info.output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + else + *frame_info = + info.output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + + break; + default: + frame_info = NULL; + break; + } + return frame_info ? 0 : -EINVAL; +} + +int atomisp_css_copy_configure_output(struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format) +{ + asd->stream_env[stream_index].pipe_configs[IA_CSS_PIPE_ID_COPY]. + default_capture_config.mode = + CSS_CAPTURE_MODE_RAW; + + __configure_output(asd, stream_index, width, height, padded_width, + format, IA_CSS_PIPE_ID_COPY); + return 0; +} + +int atomisp_css_yuvpp_configure_output(struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format) +{ + asd->stream_env[stream_index].pipe_configs[IA_CSS_PIPE_ID_YUVPP]. + default_capture_config.mode = + CSS_CAPTURE_MODE_RAW; + + __configure_output(asd, stream_index, width, height, padded_width, + format, IA_CSS_PIPE_ID_YUVPP); + return 0; +} + +int atomisp_css_yuvpp_configure_viewfinder( + struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[stream_index]; + enum ia_css_pipe_id pipe_id = IA_CSS_PIPE_ID_YUVPP; + + stream_env->pipe_configs[pipe_id].mode = + __pipe_id_to_pipe_mode(asd, pipe_id); + stream_env->update_pipe[pipe_id] = true; + + stream_env->pipe_configs[pipe_id].vf_output_info[0].res.width = width; + stream_env->pipe_configs[pipe_id].vf_output_info[0].res.height = height; + stream_env->pipe_configs[pipe_id].vf_output_info[0].format = format; + stream_env->pipe_configs[pipe_id].vf_output_info[0].padded_width = + min_width; + return 0; +} + +int atomisp_css_yuvpp_get_output_frame_info( + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info) +{ + return __get_frame_info(asd, stream_index, info, + ATOMISP_CSS_OUTPUT_FRAME, IA_CSS_PIPE_ID_YUVPP); +} + +int atomisp_css_yuvpp_get_viewfinder_frame_info( + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info) +{ + return __get_frame_info(asd, stream_index, info, + ATOMISP_CSS_VF_FRAME, IA_CSS_PIPE_ID_YUVPP); +} + +int atomisp_css_preview_configure_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) +{ + /* + * to SOC camera, use yuvpp pipe. + */ + if (ATOMISP_USE_YUVPP(asd)) + __configure_video_preview_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, + min_width, format, IA_CSS_PIPE_ID_YUVPP); + else + __configure_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, + min_width, format, IA_CSS_PIPE_ID_PREVIEW); + return 0; +} + +int atomisp_css_capture_configure_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) +{ + enum ia_css_pipe_id pipe_id; + + /* + * to SOC camera, use yuvpp pipe. + */ + if (ATOMISP_USE_YUVPP(asd)) + pipe_id = IA_CSS_PIPE_ID_YUVPP; + else + pipe_id = IA_CSS_PIPE_ID_CAPTURE; + + __configure_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, + min_width, format, pipe_id); + return 0; +} + +int atomisp_css_video_configure_output(struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) +{ + /* + * to SOC camera, use yuvpp pipe. + */ + if (ATOMISP_USE_YUVPP(asd)) + __configure_video_preview_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, + min_width, format, IA_CSS_PIPE_ID_YUVPP); + else + __configure_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, + min_width, format, IA_CSS_PIPE_ID_VIDEO); + return 0; +} + +int atomisp_css_video_configure_viewfinder( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) +{ + /* + * to SOC camera, video will use yuvpp pipe. + */ + if (ATOMISP_USE_YUVPP(asd)) + __configure_video_vf_output(asd, width, height, min_width, format, + IA_CSS_PIPE_ID_YUVPP); + else + __configure_vf_output(asd, width, height, min_width, format, + IA_CSS_PIPE_ID_VIDEO); + return 0; +} + +int atomisp_css_capture_configure_viewfinder( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) +{ + enum ia_css_pipe_id pipe_id; + + /* + * to SOC camera, video will use yuvpp pipe. + */ + if (ATOMISP_USE_YUVPP(asd)) + pipe_id = IA_CSS_PIPE_ID_YUVPP; + else + pipe_id = IA_CSS_PIPE_ID_CAPTURE; + + __configure_vf_output(asd, width, height, min_width, format, + pipe_id); + return 0; +} + +int atomisp_css_video_get_viewfinder_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) +{ + enum ia_css_pipe_id pipe_id; + enum frame_info_type frame_type = ATOMISP_CSS_VF_FRAME; + + if (ATOMISP_USE_YUVPP(asd)) { + pipe_id = IA_CSS_PIPE_ID_YUVPP; + if (asd->continuous_mode->val) + frame_type = ATOMISP_CSS_SECOND_VF_FRAME; + } else { + pipe_id = IA_CSS_PIPE_ID_VIDEO; + } + + return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, + frame_type, pipe_id); +} + +int atomisp_css_capture_get_viewfinder_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) +{ + enum ia_css_pipe_id pipe_id; + + if (ATOMISP_USE_YUVPP(asd)) + pipe_id = IA_CSS_PIPE_ID_YUVPP; + else + pipe_id = IA_CSS_PIPE_ID_CAPTURE; + + return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, + ATOMISP_CSS_VF_FRAME, pipe_id); +} + +int atomisp_css_capture_get_output_raw_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) +{ + if (ATOMISP_USE_YUVPP(asd)) + return 0; + + return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, + ATOMISP_CSS_RAW_FRAME, IA_CSS_PIPE_ID_CAPTURE); +} + +int atomisp_css_copy_get_output_frame_info( + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info) +{ + return __get_frame_info(asd, stream_index, info, + ATOMISP_CSS_OUTPUT_FRAME, IA_CSS_PIPE_ID_COPY); +} + +int atomisp_css_preview_get_output_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) +{ + enum ia_css_pipe_id pipe_id; + enum frame_info_type frame_type = ATOMISP_CSS_OUTPUT_FRAME; + + if (ATOMISP_USE_YUVPP(asd)) { + pipe_id = IA_CSS_PIPE_ID_YUVPP; + if (asd->continuous_mode->val) + frame_type = ATOMISP_CSS_SECOND_OUTPUT_FRAME; + } else { + pipe_id = IA_CSS_PIPE_ID_PREVIEW; + } + + return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, + frame_type, pipe_id); +} + +int atomisp_css_capture_get_output_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) +{ + enum ia_css_pipe_id pipe_id; + + if (ATOMISP_USE_YUVPP(asd)) + pipe_id = IA_CSS_PIPE_ID_YUVPP; + else + pipe_id = IA_CSS_PIPE_ID_CAPTURE; + + return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, + ATOMISP_CSS_OUTPUT_FRAME, pipe_id); +} + +int atomisp_css_video_get_output_frame_info( + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) +{ + enum ia_css_pipe_id pipe_id; + enum frame_info_type frame_type = ATOMISP_CSS_OUTPUT_FRAME; + + if (ATOMISP_USE_YUVPP(asd)) { + pipe_id = IA_CSS_PIPE_ID_YUVPP; + if (asd->continuous_mode->val) + frame_type = ATOMISP_CSS_SECOND_OUTPUT_FRAME; + } else { + pipe_id = IA_CSS_PIPE_ID_VIDEO; + } + + return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, + frame_type, pipe_id); +} + +int atomisp_css_preview_configure_pp_input( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + __configure_preview_pp_input(asd, width, height, + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_PREVIEW); + + if (width > stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE]. + capt_pp_in_res.width) + __configure_capture_pp_input(asd, width, height, + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); + return 0; +} + +int atomisp_css_capture_configure_pp_input( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) +{ + __configure_capture_pp_input(asd, width, height, + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); + return 0; +} + +int atomisp_css_video_configure_pp_input( + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + + __configure_video_pp_input(asd, width, height, + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_VIDEO); + + if (width > stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE]. + capt_pp_in_res.width) + __configure_capture_pp_input(asd, width, height, + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); + return 0; +} + +int atomisp_css_offline_capture_configure(struct atomisp_sub_device *asd, + int num_captures, unsigned int skip, int offset) +{ + enum ia_css_err ret; + +#ifdef ISP2401 + dev_dbg(asd->isp->dev, "%s num_capture:%d skip:%d offset:%d\n", + __func__, num_captures, skip, offset); +#endif + ret = ia_css_stream_capture( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + num_captures, skip, offset); + if (ret != IA_CSS_SUCCESS) + return -EINVAL; + + return 0; +} + +int atomisp_css_exp_id_capture(struct atomisp_sub_device *asd, int exp_id) +{ + enum ia_css_err ret; + + ret = ia_css_stream_capture_frame( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + exp_id); + if (ret == IA_CSS_ERR_QUEUE_IS_FULL) { + /* capture cmd queue is full */ + return -EBUSY; + } else if (ret != IA_CSS_SUCCESS) { + return -EIO; + } + + return 0; +} + +int atomisp_css_exp_id_unlock(struct atomisp_sub_device *asd, int exp_id) +{ + enum ia_css_err ret; + + ret = ia_css_unlock_raw_frame( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + exp_id); + if (ret == IA_CSS_ERR_QUEUE_IS_FULL) + return -EAGAIN; + else if (ret != IA_CSS_SUCCESS) + return -EIO; + + return 0; +} + +int atomisp_css_capture_enable_xnr(struct atomisp_sub_device *asd, + bool enable) +{ + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[IA_CSS_PIPE_ID_CAPTURE] + .default_capture_config.enable_xnr = enable; + asd->params.capture_config.enable_xnr = enable; + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .update_pipe[IA_CSS_PIPE_ID_CAPTURE] = true; + + return 0; +} + +void atomisp_css_send_input_frame(struct atomisp_sub_device *asd, + unsigned short *data, unsigned int width, + unsigned int height) +{ + ia_css_stream_send_input_frame( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + data, width, height); +} + +bool atomisp_css_isp_has_started(void) +{ + return ia_css_isp_has_started(); +} + +void atomisp_css_request_flash(struct atomisp_sub_device *asd) +{ + ia_css_stream_request_flash( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream); +} + +void atomisp_css_set_wb_config(struct atomisp_sub_device *asd, + struct atomisp_css_wb_config *wb_config) +{ + asd->params.config.wb_config = wb_config; +} + +void atomisp_css_set_ob_config(struct atomisp_sub_device *asd, + struct atomisp_css_ob_config *ob_config) +{ + asd->params.config.ob_config = ob_config; +} + +void atomisp_css_set_dp_config(struct atomisp_sub_device *asd, + struct atomisp_css_dp_config *dp_config) +{ + asd->params.config.dp_config = dp_config; +} + +void atomisp_css_set_de_config(struct atomisp_sub_device *asd, + struct atomisp_css_de_config *de_config) +{ + asd->params.config.de_config = de_config; +} + +void atomisp_css_set_dz_config(struct atomisp_sub_device *asd, + struct atomisp_css_dz_config *dz_config) +{ + asd->params.config.dz_config = dz_config; +} + +void atomisp_css_set_default_de_config(struct atomisp_sub_device *asd) +{ + asd->params.config.de_config = NULL; +} + +void atomisp_css_set_ce_config(struct atomisp_sub_device *asd, + struct atomisp_css_ce_config *ce_config) +{ + asd->params.config.ce_config = ce_config; +} + +void atomisp_css_set_nr_config(struct atomisp_sub_device *asd, + struct atomisp_css_nr_config *nr_config) +{ + asd->params.config.nr_config = nr_config; +} + +void atomisp_css_set_ee_config(struct atomisp_sub_device *asd, + struct atomisp_css_ee_config *ee_config) +{ + asd->params.config.ee_config = ee_config; +} + +void atomisp_css_set_tnr_config(struct atomisp_sub_device *asd, + struct atomisp_css_tnr_config *tnr_config) +{ + asd->params.config.tnr_config = tnr_config; +} + +void atomisp_css_set_cc_config(struct atomisp_sub_device *asd, + struct atomisp_css_cc_config *cc_config) +{ + asd->params.config.cc_config = cc_config; +} + +void atomisp_css_set_macc_table(struct atomisp_sub_device *asd, + struct atomisp_css_macc_table *macc_table) +{ + asd->params.config.macc_table = macc_table; +} + +void atomisp_css_set_macc_config(struct atomisp_sub_device *asd, + struct atomisp_css_macc_config *macc_config) +{ + asd->params.config.macc_config = macc_config; +} + +void atomisp_css_set_ecd_config(struct atomisp_sub_device *asd, + struct atomisp_css_ecd_config *ecd_config) +{ + asd->params.config.ecd_config = ecd_config; +} + +void atomisp_css_set_ynr_config(struct atomisp_sub_device *asd, + struct atomisp_css_ynr_config *ynr_config) +{ + asd->params.config.ynr_config = ynr_config; +} + +void atomisp_css_set_fc_config(struct atomisp_sub_device *asd, + struct atomisp_css_fc_config *fc_config) +{ + asd->params.config.fc_config = fc_config; +} + +void atomisp_css_set_ctc_config(struct atomisp_sub_device *asd, + struct atomisp_css_ctc_config *ctc_config) +{ + asd->params.config.ctc_config = ctc_config; +} + +void atomisp_css_set_cnr_config(struct atomisp_sub_device *asd, + struct atomisp_css_cnr_config *cnr_config) +{ + asd->params.config.cnr_config = cnr_config; +} + +void atomisp_css_set_aa_config(struct atomisp_sub_device *asd, + struct atomisp_css_aa_config *aa_config) +{ + asd->params.config.aa_config = aa_config; +} + +void atomisp_css_set_baa_config(struct atomisp_sub_device *asd, + struct atomisp_css_baa_config *baa_config) +{ + asd->params.config.baa_config = baa_config; +} + +void atomisp_css_set_anr_config(struct atomisp_sub_device *asd, + struct atomisp_css_anr_config *anr_config) +{ + asd->params.config.anr_config = anr_config; +} + +void atomisp_css_set_xnr_config(struct atomisp_sub_device *asd, + struct atomisp_css_xnr_config *xnr_config) +{ + asd->params.config.xnr_config = xnr_config; +} + +void atomisp_css_set_yuv2rgb_cc_config(struct atomisp_sub_device *asd, + struct atomisp_css_cc_config *yuv2rgb_cc_config) +{ + asd->params.config.yuv2rgb_cc_config = yuv2rgb_cc_config; +} + +void atomisp_css_set_rgb2yuv_cc_config(struct atomisp_sub_device *asd, + struct atomisp_css_cc_config *rgb2yuv_cc_config) +{ + asd->params.config.rgb2yuv_cc_config = rgb2yuv_cc_config; +} + +void atomisp_css_set_xnr_table(struct atomisp_sub_device *asd, + struct atomisp_css_xnr_table *xnr_table) +{ + asd->params.config.xnr_table = xnr_table; +} + +void atomisp_css_set_r_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_rgb_gamma_table *r_gamma_table) +{ + asd->params.config.r_gamma_table = r_gamma_table; +} + +void atomisp_css_set_g_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_rgb_gamma_table *g_gamma_table) +{ + asd->params.config.g_gamma_table = g_gamma_table; +} + +void atomisp_css_set_b_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_rgb_gamma_table *b_gamma_table) +{ + asd->params.config.b_gamma_table = b_gamma_table; +} + +void atomisp_css_set_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_gamma_table *gamma_table) +{ + asd->params.config.gamma_table = gamma_table; +} + +void atomisp_css_set_ctc_table(struct atomisp_sub_device *asd, + struct atomisp_css_ctc_table *ctc_table) +{ + int i; + uint16_t *vamem_ptr = ctc_table->data.vamem_1; + int data_size = IA_CSS_VAMEM_1_CTC_TABLE_SIZE; + bool valid = false; + + /* workaround: if ctc_table is all 0, do not apply it */ + if (ctc_table->vamem_type == IA_CSS_VAMEM_TYPE_2) { + vamem_ptr = ctc_table->data.vamem_2; + data_size = IA_CSS_VAMEM_2_CTC_TABLE_SIZE; + } + + for (i = 0; i < data_size; i++) { + if (*(vamem_ptr + i)) { + valid = true; + break; + } + } + + if (valid) + asd->params.config.ctc_table = ctc_table; + else + dev_warn(asd->isp->dev, "Bypass the invalid ctc_table.\n"); +} + +void atomisp_css_set_anr_thres(struct atomisp_sub_device *asd, + struct atomisp_css_anr_thres *anr_thres) +{ + asd->params.config.anr_thres = anr_thres; +} + +void atomisp_css_set_dvs_6axis(struct atomisp_sub_device *asd, + struct atomisp_css_dvs_6axis *dvs_6axis) +{ + asd->params.config.dvs_6axis_config = dvs_6axis; +} + +void atomisp_css_set_gc_config(struct atomisp_sub_device *asd, + struct atomisp_css_gc_config *gc_config) +{ + asd->params.config.gc_config = gc_config; +} + +void atomisp_css_set_3a_config(struct atomisp_sub_device *asd, + struct atomisp_css_3a_config *s3a_config) +{ + asd->params.config.s3a_config = s3a_config; +} + +void atomisp_css_video_set_dis_vector(struct atomisp_sub_device *asd, + struct atomisp_dis_vector *vector) +{ + if (!asd->params.config.motion_vector) + asd->params.config.motion_vector = &asd->params.css_param.motion_vector; + + memset(asd->params.config.motion_vector, + 0, sizeof(struct ia_css_vector)); + asd->params.css_param.motion_vector.x = vector->x; + asd->params.css_param.motion_vector.y = vector->y; +} + +static int atomisp_compare_dvs_grid(struct atomisp_sub_device *asd, + struct atomisp_dvs_grid_info *atomgrid) +{ + struct atomisp_css_dvs_grid_info *cur = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + + if (!cur) { + dev_err(asd->isp->dev, "dvs grid not available!\n"); + return -EINVAL; + } + + if (sizeof(*cur) != sizeof(*atomgrid)) { + dev_err(asd->isp->dev, "dvs grid mis-match!\n"); + return -EINVAL; + } + + if (!cur->enable) { + dev_err(asd->isp->dev, "dvs not enabled!\n"); + return -EINVAL; + } + + return memcmp(atomgrid, cur, sizeof(*cur)); +} + +void atomisp_css_set_dvs2_coefs(struct atomisp_sub_device *asd, + struct ia_css_dvs2_coefficients *coefs) +{ + asd->params.config.dvs2_coefs = coefs; +} + +int atomisp_css_set_dis_coefs(struct atomisp_sub_device *asd, + struct atomisp_dis_coefficients *coefs) +{ + if (atomisp_compare_dvs_grid(asd, &coefs->grid_info) != 0) + /* If the grid info in the argument differs from the current + grid info, we tell the caller to reset the grid size and + try again. */ + return -EAGAIN; + + if (coefs->hor_coefs.odd_real == NULL || + coefs->hor_coefs.odd_imag == NULL || + coefs->hor_coefs.even_real == NULL || + coefs->hor_coefs.even_imag == NULL || + coefs->ver_coefs.odd_real == NULL || + coefs->ver_coefs.odd_imag == NULL || + coefs->ver_coefs.even_real == NULL || + coefs->ver_coefs.even_imag == NULL || + asd->params.css_param.dvs2_coeff->hor_coefs.odd_real == NULL || + asd->params.css_param.dvs2_coeff->hor_coefs.odd_imag == NULL || + asd->params.css_param.dvs2_coeff->hor_coefs.even_real == NULL || + asd->params.css_param.dvs2_coeff->hor_coefs.even_imag == NULL || + asd->params.css_param.dvs2_coeff->ver_coefs.odd_real == NULL || + asd->params.css_param.dvs2_coeff->ver_coefs.odd_imag == NULL || + asd->params.css_param.dvs2_coeff->ver_coefs.even_real == NULL || + asd->params.css_param.dvs2_coeff->ver_coefs.even_imag == NULL) + return -EINVAL; + + if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.odd_real, + coefs->hor_coefs.odd_real, asd->params.dvs_hor_coef_bytes)) + return -EFAULT; + if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.odd_imag, + coefs->hor_coefs.odd_imag, asd->params.dvs_hor_coef_bytes)) + return -EFAULT; + if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.even_real, + coefs->hor_coefs.even_real, asd->params.dvs_hor_coef_bytes)) + return -EFAULT; + if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.even_imag, + coefs->hor_coefs.even_imag, asd->params.dvs_hor_coef_bytes)) + return -EFAULT; + + if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.odd_real, + coefs->ver_coefs.odd_real, asd->params.dvs_ver_coef_bytes)) + return -EFAULT; + if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.odd_imag, + coefs->ver_coefs.odd_imag, asd->params.dvs_ver_coef_bytes)) + return -EFAULT; + if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.even_real, + coefs->ver_coefs.even_real, asd->params.dvs_ver_coef_bytes)) + return -EFAULT; + if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.even_imag, + coefs->ver_coefs.even_imag, asd->params.dvs_ver_coef_bytes)) + return -EFAULT; + + asd->params.css_param.update_flag.dvs2_coefs = + (struct atomisp_dvs2_coefficients *) + asd->params.css_param.dvs2_coeff; + /* FIXME! */ +/* asd->params.dis_proj_data_valid = false; */ + asd->params.css_update_params_needed = true; + + return 0; +} + +void atomisp_css_set_zoom_factor(struct atomisp_sub_device *asd, + unsigned int zoom) +{ + struct atomisp_device *isp = asd->isp; + + if (zoom == asd->params.css_param.dz_config.dx && + zoom == asd->params.css_param.dz_config.dy) { + dev_dbg(isp->dev, "same zoom scale. skipped.\n"); + return; + } + + memset(&asd->params.css_param.dz_config, 0, + sizeof(struct ia_css_dz_config)); + asd->params.css_param.dz_config.dx = zoom; + asd->params.css_param.dz_config.dy = zoom; + + asd->params.css_param.update_flag.dz_config = + (struct atomisp_dz_config *) &asd->params.css_param.dz_config; + asd->params.css_update_params_needed = true; +} + +void atomisp_css_set_formats_config(struct atomisp_sub_device *asd, + struct atomisp_css_formats_config *formats_config) +{ + asd->params.config.formats_config = formats_config; +} + +int atomisp_css_get_wb_config(struct atomisp_sub_device *asd, + struct atomisp_wb_config *config) +{ + struct atomisp_css_wb_config wb_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&wb_config, 0, sizeof(struct atomisp_css_wb_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.wb_config = &wb_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, &wb_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_ob_config(struct atomisp_sub_device *asd, + struct atomisp_ob_config *config) +{ + struct atomisp_css_ob_config ob_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&ob_config, 0, sizeof(struct atomisp_css_ob_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.ob_config = &ob_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, &ob_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_dp_config(struct atomisp_sub_device *asd, + struct atomisp_dp_config *config) +{ + struct atomisp_css_dp_config dp_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&dp_config, 0, sizeof(struct atomisp_css_dp_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.dp_config = &dp_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, &dp_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_de_config(struct atomisp_sub_device *asd, + struct atomisp_de_config *config) +{ + struct atomisp_css_de_config de_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&de_config, 0, sizeof(struct atomisp_css_de_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.de_config = &de_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, &de_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_nr_config(struct atomisp_sub_device *asd, + struct atomisp_nr_config *config) +{ + struct atomisp_css_nr_config nr_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&nr_config, 0, sizeof(struct atomisp_css_nr_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + + isp_config.nr_config = &nr_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, &nr_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_ee_config(struct atomisp_sub_device *asd, + struct atomisp_ee_config *config) +{ + struct atomisp_css_ee_config ee_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&ee_config, 0, sizeof(struct atomisp_css_ee_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.ee_config = &ee_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, &ee_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_tnr_config(struct atomisp_sub_device *asd, + struct atomisp_tnr_config *config) +{ + struct atomisp_css_tnr_config tnr_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&tnr_config, 0, sizeof(struct atomisp_css_tnr_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.tnr_config = &tnr_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, &tnr_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_ctc_table(struct atomisp_sub_device *asd, + struct atomisp_ctc_table *config) +{ + struct atomisp_css_ctc_table *tab; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + + tab = vzalloc(sizeof(struct atomisp_css_ctc_table)); + if (!tab) + return -ENOMEM; + + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.ctc_table = tab; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, tab, sizeof(*tab)); + vfree(tab); + + return 0; +} + +int atomisp_css_get_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_gamma_table *config) +{ + struct atomisp_css_gamma_table *tab; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + + tab = vzalloc(sizeof(struct atomisp_css_gamma_table)); + if (!tab) + return -ENOMEM; + + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.gamma_table = tab; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + memcpy(config, tab, sizeof(*tab)); + vfree(tab); + + return 0; +} + +int atomisp_css_get_gc_config(struct atomisp_sub_device *asd, + struct atomisp_gc_config *config) +{ + struct atomisp_css_gc_config gc_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&gc_config, 0, sizeof(struct atomisp_css_gc_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.gc_config = &gc_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + /* Get gamma correction params from current setup */ + memcpy(config, &gc_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_3a_config(struct atomisp_sub_device *asd, + struct atomisp_3a_config *config) +{ + struct atomisp_css_3a_config s3a_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&s3a_config, 0, sizeof(struct atomisp_css_3a_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.s3a_config = &s3a_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + /* Get white balance from current setup */ + memcpy(config, &s3a_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_formats_config(struct atomisp_sub_device *asd, + struct atomisp_formats_config *config) +{ + struct atomisp_css_formats_config formats_config; + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&formats_config, 0, sizeof(formats_config)); + memset(&isp_config, 0, sizeof(isp_config)); + isp_config.formats_config = &formats_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + /* Get narrow gamma from current setup */ + memcpy(config, &formats_config, sizeof(*config)); + + return 0; +} + +int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, + unsigned int *zoom) +{ + struct ia_css_dz_config dz_config; /** Digital Zoom */ + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, "%s called after streamoff, skipping.\n", + __func__); + return -EINVAL; + } + memset(&dz_config, 0, sizeof(struct ia_css_dz_config)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.dz_config = &dz_config; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); + *zoom = dz_config.dx; + + return 0; +} + + +/* + * Function to set/get image stablization statistics + */ +int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd, + struct atomisp_dis_statistics *stats) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_dis_buf *dis_buf; + unsigned long flags; + + if (asd->params.dvs_stat->hor_prod.odd_real == NULL || + asd->params.dvs_stat->hor_prod.odd_imag == NULL || + asd->params.dvs_stat->hor_prod.even_real == NULL || + asd->params.dvs_stat->hor_prod.even_imag == NULL || + asd->params.dvs_stat->ver_prod.odd_real == NULL || + asd->params.dvs_stat->ver_prod.odd_imag == NULL || + asd->params.dvs_stat->ver_prod.even_real == NULL || + asd->params.dvs_stat->ver_prod.even_imag == NULL) + return -EINVAL; + + /* isp needs to be streaming to get DIS statistics */ + spin_lock_irqsave(&isp->lock, flags); + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) { + spin_unlock_irqrestore(&isp->lock, flags); + return -EINVAL; + } + spin_unlock_irqrestore(&isp->lock, flags); + + if (atomisp_compare_dvs_grid(asd, &stats->dvs2_stat.grid_info) != 0) + /* If the grid info in the argument differs from the current + grid info, we tell the caller to reset the grid size and + try again. */ + return -EAGAIN; + + spin_lock_irqsave(&asd->dis_stats_lock, flags); + if (!asd->params.dis_proj_data_valid || list_empty(&asd->dis_stats)) { + spin_unlock_irqrestore(&asd->dis_stats_lock, flags); + dev_err(isp->dev, "dis statistics is not valid.\n"); + return -EAGAIN; + } + + dis_buf = list_entry(asd->dis_stats.next, + struct atomisp_dis_buf, list); + list_del_init(&dis_buf->list); + spin_unlock_irqrestore(&asd->dis_stats_lock, flags); + + if (dis_buf->dvs_map) + ia_css_translate_dvs2_statistics( + asd->params.dvs_stat, dis_buf->dvs_map); + else + ia_css_get_dvs2_statistics(asd->params.dvs_stat, + dis_buf->dis_data); + stats->exp_id = dis_buf->dis_data->exp_id; + + spin_lock_irqsave(&asd->dis_stats_lock, flags); + list_add_tail(&dis_buf->list, &asd->dis_stats); + spin_unlock_irqrestore(&asd->dis_stats_lock, flags); + + if (copy_to_user(stats->dvs2_stat.ver_prod.odd_real, + asd->params.dvs_stat->ver_prod.odd_real, + asd->params.dvs_ver_proj_bytes)) + return -EFAULT; + if (copy_to_user(stats->dvs2_stat.ver_prod.odd_imag, + asd->params.dvs_stat->ver_prod.odd_imag, + asd->params.dvs_ver_proj_bytes)) + return -EFAULT; + if (copy_to_user(stats->dvs2_stat.ver_prod.even_real, + asd->params.dvs_stat->ver_prod.even_real, + asd->params.dvs_ver_proj_bytes)) + return -EFAULT; + if (copy_to_user(stats->dvs2_stat.ver_prod.even_imag, + asd->params.dvs_stat->ver_prod.even_imag, + asd->params.dvs_ver_proj_bytes)) + return -EFAULT; + if (copy_to_user(stats->dvs2_stat.hor_prod.odd_real, + asd->params.dvs_stat->hor_prod.odd_real, + asd->params.dvs_hor_proj_bytes)) + return -EFAULT; + if (copy_to_user(stats->dvs2_stat.hor_prod.odd_imag, + asd->params.dvs_stat->hor_prod.odd_imag, + asd->params.dvs_hor_proj_bytes)) + return -EFAULT; + if (copy_to_user(stats->dvs2_stat.hor_prod.even_real, + asd->params.dvs_stat->hor_prod.even_real, + asd->params.dvs_hor_proj_bytes)) + return -EFAULT; + if (copy_to_user(stats->dvs2_stat.hor_prod.even_imag, + asd->params.dvs_stat->hor_prod.even_imag, + asd->params.dvs_hor_proj_bytes)) + return -EFAULT; + + return 0; +} + +struct atomisp_css_shading_table *atomisp_css_shading_table_alloc( + unsigned int width, unsigned int height) +{ + return ia_css_shading_table_alloc(width, height); +} + +void atomisp_css_set_shading_table(struct atomisp_sub_device *asd, + struct atomisp_css_shading_table *table) +{ + asd->params.config.shading_table = table; +} + +void atomisp_css_shading_table_free(struct atomisp_css_shading_table *table) +{ + ia_css_shading_table_free(table); +} + +struct atomisp_css_morph_table *atomisp_css_morph_table_allocate( + unsigned int width, unsigned int height) +{ + return ia_css_morph_table_allocate(width, height); +} + +void atomisp_css_set_morph_table(struct atomisp_sub_device *asd, + struct atomisp_css_morph_table *table) +{ + asd->params.config.morph_table = table; +} + +void atomisp_css_get_morph_table(struct atomisp_sub_device *asd, + struct atomisp_css_morph_table *table) +{ + struct ia_css_isp_config isp_config; + struct atomisp_device *isp = asd->isp; + + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { + dev_err(isp->dev, + "%s called after streamoff, skipping.\n", __func__); + return; + } + memset(table, 0, sizeof(struct atomisp_css_morph_table)); + memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); + isp_config.morph_table = table; + ia_css_stream_get_isp_config( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); +} + +void atomisp_css_morph_table_free(struct atomisp_css_morph_table *table) +{ + ia_css_morph_table_free(table); +} + +void atomisp_css_set_cont_prev_start_time(struct atomisp_device *isp, + unsigned int overlap) +{ + /* CSS 2.0 doesn't support this API. */ + dev_dbg(isp->dev, "set cont prev start time is not supported.\n"); + return; +} + +void atomisp_css_acc_done(struct atomisp_sub_device *asd) +{ + complete(&asd->acc.acc_done); +} + +int atomisp_css_wait_acc_finish(struct atomisp_sub_device *asd) +{ + int ret = 0; + struct atomisp_device *isp = asd->isp; + + /* Unlock the isp mutex taken in IOCTL handler before sleeping! */ + rt_mutex_unlock(&isp->mutex); + if (wait_for_completion_interruptible_timeout(&asd->acc.acc_done, + ATOMISP_ISP_TIMEOUT_DURATION) == 0) { + dev_err(isp->dev, "<%s: completion timeout\n", __func__); + atomisp_css_debug_dump_sp_sw_debug_info(); + atomisp_css_debug_dump_debug_info(__func__); + ret = -EIO; + } + rt_mutex_lock(&isp->mutex); + + return ret; +} + +/* Set the ACC binary arguments */ +int atomisp_css_set_acc_parameters(struct atomisp_acc_fw *acc_fw) +{ + unsigned int mem; + + for (mem = 0; mem < ATOMISP_ACC_NR_MEMORY; mem++) { + if (acc_fw->args[mem].length == 0) + continue; + + ia_css_isp_param_set_css_mem_init(&acc_fw->fw->mem_initializers, + IA_CSS_PARAM_CLASS_PARAM, mem, + acc_fw->args[mem].css_ptr, + acc_fw->args[mem].length); + } + + return 0; +} + +/* Load acc binary extension */ +int atomisp_css_load_acc_extension(struct atomisp_sub_device *asd, + struct atomisp_css_fw_info *fw, + enum atomisp_css_pipe_id pipe_id, + unsigned int type) +{ + struct atomisp_css_fw_info **hd; + + fw->next = NULL; + hd = &(asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[pipe_id].acc_extension); + while (*hd) + hd = &(*hd)->next; + *hd = fw; + + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .update_pipe[pipe_id] = true; + return 0; +} + +/* Unload acc binary extension */ +void atomisp_css_unload_acc_extension(struct atomisp_sub_device *asd, + struct atomisp_css_fw_info *fw, + enum atomisp_css_pipe_id pipe_id) +{ + struct atomisp_css_fw_info **hd; + + hd = &(asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[pipe_id].acc_extension); + while (*hd && *hd != fw) + hd = &(*hd)->next; + if (!*hd) { + dev_err(asd->isp->dev, "did not find acc fw for removal\n"); + return; + } + *hd = fw->next; + fw->next = NULL; + + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .update_pipe[pipe_id] = true; +} + +int atomisp_css_create_acc_pipe(struct atomisp_sub_device *asd) +{ + struct atomisp_device *isp = asd->isp; + struct ia_css_pipe_config *pipe_config; + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + + if (stream_env->acc_stream) { + if (stream_env->acc_stream_state == CSS_STREAM_STARTED) { + if (ia_css_stream_stop(stream_env->acc_stream) + != IA_CSS_SUCCESS) { + dev_err(isp->dev, "stop acc_stream failed.\n"); + return -EBUSY; + } + } + + if (ia_css_stream_destroy(stream_env->acc_stream) + != IA_CSS_SUCCESS) { + dev_err(isp->dev, "destroy acc_stream failed.\n"); + return -EBUSY; + } + stream_env->acc_stream = NULL; + } + + pipe_config = &stream_env->pipe_configs[CSS_PIPE_ID_ACC]; + ia_css_pipe_config_defaults(pipe_config); + asd->acc.acc_stages = kzalloc(MAX_ACC_STAGES * + sizeof(void *), GFP_KERNEL); + if (!asd->acc.acc_stages) + return -ENOMEM; + pipe_config->acc_stages = asd->acc.acc_stages; + pipe_config->mode = IA_CSS_PIPE_MODE_ACC; + pipe_config->num_acc_stages = 0; + + /* + * We delay the ACC pipeline creation to atomisp_css_start_acc_pipe, + * because pipe configuration will soon be changed by + * atomisp_css_load_acc_binary() + */ + return 0; +} + +int atomisp_css_start_acc_pipe(struct atomisp_sub_device *asd) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + struct ia_css_pipe_config *pipe_config = + &stream_env->pipe_configs[IA_CSS_PIPE_ID_ACC]; + + if (ia_css_pipe_create(pipe_config, + &stream_env->pipes[IA_CSS_PIPE_ID_ACC]) != IA_CSS_SUCCESS) { + dev_err(isp->dev, "%s: ia_css_pipe_create failed\n", + __func__); + return -EBADE; + } + + memset(&stream_env->acc_stream_config, 0, + sizeof(struct ia_css_stream_config)); + if (ia_css_stream_create(&stream_env->acc_stream_config, 1, + &stream_env->pipes[IA_CSS_PIPE_ID_ACC], + &stream_env->acc_stream) != IA_CSS_SUCCESS) { + dev_err(isp->dev, "%s: create acc_stream error.\n", __func__); + return -EINVAL; + } + stream_env->acc_stream_state = CSS_STREAM_CREATED; + + init_completion(&asd->acc.acc_done); + asd->acc.pipeline = stream_env->pipes[IA_CSS_PIPE_ID_ACC]; + + atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_MAX, false); + + if (ia_css_start_sp() != IA_CSS_SUCCESS) { + dev_err(isp->dev, "start sp error.\n"); + return -EIO; + } + + if (ia_css_stream_start(stream_env->acc_stream) + != IA_CSS_SUCCESS) { + dev_err(isp->dev, "acc_stream start error.\n"); + return -EIO; + } + + stream_env->acc_stream_state = CSS_STREAM_STARTED; + return 0; +} + +int atomisp_css_stop_acc_pipe(struct atomisp_sub_device *asd) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + if (stream_env->acc_stream_state == CSS_STREAM_STARTED) { + ia_css_stream_stop(stream_env->acc_stream); + stream_env->acc_stream_state = CSS_STREAM_STOPPED; + } + return 0; +} + +void atomisp_css_destroy_acc_pipe(struct atomisp_sub_device *asd) +{ + struct atomisp_stream_env *stream_env = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + if (stream_env->acc_stream) { + if (ia_css_stream_destroy(stream_env->acc_stream) + != IA_CSS_SUCCESS) + dev_warn(asd->isp->dev, + "destroy acc_stream failed.\n"); + stream_env->acc_stream = NULL; + } + + if (stream_env->pipes[IA_CSS_PIPE_ID_ACC]) { + if (ia_css_pipe_destroy(stream_env->pipes[IA_CSS_PIPE_ID_ACC]) + != IA_CSS_SUCCESS) + dev_warn(asd->isp->dev, + "destroy ACC pipe failed.\n"); + stream_env->pipes[IA_CSS_PIPE_ID_ACC] = NULL; + stream_env->update_pipe[IA_CSS_PIPE_ID_ACC] = false; + ia_css_pipe_config_defaults( + &stream_env->pipe_configs[IA_CSS_PIPE_ID_ACC]); + ia_css_pipe_extra_config_defaults( + &stream_env->pipe_extra_configs[IA_CSS_PIPE_ID_ACC]); + } + asd->acc.pipeline = NULL; + + /* css 2.0 API limitation: ia_css_stop_sp() could be only called after + * destroy all pipes + */ + ia_css_stop_sp(); + + kfree(asd->acc.acc_stages); + asd->acc.acc_stages = NULL; + + atomisp_freq_scaling(asd->isp, ATOMISP_DFS_MODE_LOW, false); +} + +int atomisp_css_load_acc_binary(struct atomisp_sub_device *asd, + struct atomisp_css_fw_info *fw, + unsigned int index) +{ + struct ia_css_pipe_config *pipe_config = + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[IA_CSS_PIPE_ID_ACC]; + + if (index >= MAX_ACC_STAGES) { + dev_dbg(asd->isp->dev, "%s: index(%d) out of range\n", + __func__, index); + return -ENOMEM; + } + + pipe_config->acc_stages[index] = fw; + pipe_config->num_acc_stages = index + 1; + pipe_config->acc_num_execs = 1; + + return 0; +} + +static struct atomisp_sub_device *__get_atomisp_subdev( + struct ia_css_pipe *css_pipe, + struct atomisp_device *isp, + enum atomisp_input_stream_id *stream_id) +{ + int i, j, k; + struct atomisp_sub_device *asd; + struct atomisp_stream_env *stream_env; + + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + if (asd->streaming == ATOMISP_DEVICE_STREAMING_DISABLED && + !asd->acc.pipeline) + continue; + for (j = 0; j < ATOMISP_INPUT_STREAM_NUM; j++) { + stream_env = &asd->stream_env[j]; + for (k = 0; k < IA_CSS_PIPE_ID_NUM; k++) { + if (stream_env->pipes[k] && + stream_env->pipes[k] == css_pipe) { + *stream_id = j; + return asd; + } + } + } + } + + return NULL; +} + +int atomisp_css_isr_thread(struct atomisp_device *isp, + bool *frame_done_found, + bool *css_pipe_done) +{ + enum atomisp_input_stream_id stream_id = 0; + struct atomisp_css_event current_event; + struct atomisp_sub_device *asd; +#ifndef ISP2401 + bool reset_wdt_timer[MAX_STREAM_NUM] = {false}; +#endif + int i; + + while (!atomisp_css_dequeue_event(¤t_event)) { + if (current_event.event.type == + IA_CSS_EVENT_TYPE_FW_ASSERT) { + /* + * Received FW assertion signal, + * trigger WDT to recover + */ + dev_err(isp->dev, "%s: ISP reports FW_ASSERT event! fw_assert_module_id %d fw_assert_line_no %d\n", + __func__, + current_event.event.fw_assert_module_id, + current_event.event.fw_assert_line_no); + for (i = 0; i < isp->num_of_streams; i++) + atomisp_wdt_stop(&isp->asd[i], 0); +#ifndef ISP2401 + atomisp_wdt(&isp->asd[0].wdt); +#else + queue_work(isp->wdt_work_queue, &isp->wdt_work); +#endif + return -EINVAL; + } else if (current_event.event.type == IA_CSS_EVENT_TYPE_FW_WARNING) { + dev_warn(isp->dev, "%s: ISP reports warning, code is %d, exp_id %d\n", + __func__, current_event.event.fw_warning, + current_event.event.exp_id); + continue; + } + + asd = __get_atomisp_subdev(current_event.event.pipe, + isp, &stream_id); + if (!asd) { + if (current_event.event.type == CSS_EVENT_TIMER) + dev_dbg(isp->dev, + "event: Timer event."); + else + dev_warn(isp->dev, "%s:no subdev.event:%d", + __func__, + current_event.event.type); + continue; + } + + atomisp_css_temp_pipe_to_pipe_id(asd, ¤t_event); + switch (current_event.event.type) { + case CSS_EVENT_OUTPUT_FRAME_DONE: + frame_done_found[asd->index] = true; + atomisp_buf_done(asd, 0, CSS_BUFFER_TYPE_OUTPUT_FRAME, + current_event.pipe, true, stream_id); +#ifndef ISP2401 + reset_wdt_timer[asd->index] = true; /* ISP running */ +#endif + break; + case CSS_EVENT_SEC_OUTPUT_FRAME_DONE: + frame_done_found[asd->index] = true; + atomisp_buf_done(asd, 0, CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME, + current_event.pipe, true, stream_id); +#ifndef ISP2401 + reset_wdt_timer[asd->index] = true; /* ISP running */ +#endif + break; + case CSS_EVENT_3A_STATISTICS_DONE: + atomisp_buf_done(asd, 0, + CSS_BUFFER_TYPE_3A_STATISTICS, + current_event.pipe, + false, stream_id); + break; + case CSS_EVENT_METADATA_DONE: + atomisp_buf_done(asd, 0, + CSS_BUFFER_TYPE_METADATA, + current_event.pipe, + false, stream_id); + break; + case CSS_EVENT_VF_OUTPUT_FRAME_DONE: + atomisp_buf_done(asd, 0, + CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, + current_event.pipe, true, stream_id); +#ifndef ISP2401 + reset_wdt_timer[asd->index] = true; /* ISP running */ +#endif + break; + case CSS_EVENT_SEC_VF_OUTPUT_FRAME_DONE: + atomisp_buf_done(asd, 0, + CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME, + current_event.pipe, true, stream_id); +#ifndef ISP2401 + reset_wdt_timer[asd->index] = true; /* ISP running */ +#endif + break; + case CSS_EVENT_DIS_STATISTICS_DONE: + atomisp_buf_done(asd, 0, + CSS_BUFFER_TYPE_DIS_STATISTICS, + current_event.pipe, + false, stream_id); + break; + case CSS_EVENT_PIPELINE_DONE: + css_pipe_done[asd->index] = true; + break; + case CSS_EVENT_ACC_STAGE_COMPLETE: + atomisp_acc_done(asd, current_event.event.fw_handle); + break; + default: + dev_dbg(isp->dev, "unhandled css stored event: 0x%x\n", + current_event.event.type); + break; + } + } +#ifndef ISP2401 + /* If there are no buffers queued then + * delete wdt timer. */ + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + if (!asd) + continue; + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + continue; + if (!atomisp_buffers_queued(asd)) + atomisp_wdt_stop(asd, false); + else if (reset_wdt_timer[i]) + /* SOF irq should not reset wdt timer. */ + atomisp_wdt_refresh(asd, + ATOMISP_WDT_KEEP_CURRENT_DELAY); + } +#endif + + return 0; +} + +bool atomisp_css_valid_sof(struct atomisp_device *isp) +{ + unsigned int i, j; + + /* Loop for each css stream */ + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + /* Loop for each css vc stream */ + for (j = 0; j < ATOMISP_INPUT_STREAM_NUM; j++) { + if (asd->stream_env[j].stream && + asd->stream_env[j].stream_config.mode == + IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + return false; + } + } + + return true; +} + +int atomisp_css_debug_dump_isp_binary(void) +{ + ia_css_debug_dump_isp_binary(); + return 0; +} + +int atomisp_css_dump_sp_raw_copy_linecount(bool reduced) +{ + sh_css_dump_sp_raw_copy_linecount(reduced); + return 0; +} + +int atomisp_css_dump_blob_infor(void) +{ + struct ia_css_blob_descr *bd = sh_css_blob_info; + unsigned int i, nm = sh_css_num_binaries; + + if (nm == 0) + return -EPERM; + if (bd == NULL) + return -EPERM; + + for (i = 1; i < sh_css_num_binaries; i++) + dev_dbg(atomisp_dev, "Num%d binary id is %d, name is %s\n", i, + bd[i-1].header.info.isp.sp.id, bd[i-1].name); + + return 0; +} + +void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd, + uint32_t isp_config_id) +{ + asd->params.config.isp_config_id = isp_config_id; +} + +void atomisp_css_set_isp_config_applied_frame(struct atomisp_sub_device *asd, + struct atomisp_css_frame *output_frame) +{ + asd->params.config.output_frame = output_frame; +} + +int atomisp_get_css_dbgfunc(void) +{ + return dbg_func; +} + +int atomisp_set_css_dbgfunc(struct atomisp_device *isp, int opt) +{ + int ret; + + ret = __set_css_print_env(isp, opt); + if (ret == 0) + dbg_func = opt; + + return ret; +} +void atomisp_en_dz_capt_pipe(struct atomisp_sub_device *asd, bool enable) +{ + ia_css_en_dz_capt_pipe( + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + enable); +} + +struct atomisp_css_dvs_grid_info *atomisp_css_get_dvs_grid_info( + struct atomisp_css_grid_info *grid_info) +{ + if (!grid_info) + return NULL; + +#ifdef IA_CSS_DVS_STAT_GRID_INFO_SUPPORTED + return &grid_info->dvs_grid.dvs_grid_info; +#else + return &grid_info->dvs_grid; +#endif +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h new file mode 100644 index 0000000000000..a06c5b6e8027d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h @@ -0,0 +1,277 @@ +/* + * Support for Clovertrail PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_COMPAT_CSS20_H__ +#define __ATOMISP_COMPAT_CSS20_H__ + +#include + +#include "ia_css.h" +#include "ia_css_types.h" +#include "ia_css_acc_types.h" +#include "sh_css_legacy.h" + +#define ATOMISP_CSS2_PIPE_MAX 2 +#define ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES 3 +#define ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES_LOCK_EN 4 +#define ATOMISP_CSS2_NUM_DVS_FRAME_DELAY 2 + +#define atomisp_css_pipe_id ia_css_pipe_id +#define atomisp_css_pipeline ia_css_pipe +#define atomisp_css_buffer_type ia_css_buffer_type +#define atomisp_css_dis_data ia_css_isp_dvs_statistics +#define atomisp_css_irq_info ia_css_irq_info +#define atomisp_css_isp_config ia_css_isp_config +#define atomisp_css_bayer_order ia_css_bayer_order +#define atomisp_css_capture_mode ia_css_capture_mode +#define atomisp_css_input_mode ia_css_input_mode +#define atomisp_css_frame ia_css_frame +#define atomisp_css_frame_format ia_css_frame_format +#define atomisp_css_frame_info ia_css_frame_info +#define atomisp_css_dp_config ia_css_dp_config +#define atomisp_css_wb_config ia_css_wb_config +#define atomisp_css_cc_config ia_css_cc_config +#define atomisp_css_nr_config ia_css_nr_config +#define atomisp_css_ee_config ia_css_ee_config +#define atomisp_css_ob_config ia_css_ob_config +#define atomisp_css_de_config ia_css_de_config +#define atomisp_css_dz_config ia_css_dz_config +#define atomisp_css_ce_config ia_css_ce_config +#define atomisp_css_gc_config ia_css_gc_config +#define atomisp_css_tnr_config ia_css_tnr_config +#define atomisp_css_cnr_config ia_css_cnr_config +#define atomisp_css_ctc_config ia_css_ctc_config +#define atomisp_css_3a_config ia_css_3a_config +#define atomisp_css_ecd_config ia_css_ecd_config +#define atomisp_css_ynr_config ia_css_ynr_config +#define atomisp_css_fc_config ia_css_fc_config +#define atomisp_css_aa_config ia_css_aa_config +#define atomisp_css_baa_config ia_css_aa_config +#define atomisp_css_anr_config ia_css_anr_config +#define atomisp_css_xnr_config ia_css_xnr_config +#define atomisp_css_macc_config ia_css_macc_config +#define atomisp_css_gamma_table ia_css_gamma_table +#define atomisp_css_ctc_table ia_css_ctc_table +#define atomisp_css_macc_table ia_css_macc_table +#define atomisp_css_xnr_table ia_css_xnr_table +#define atomisp_css_rgb_gamma_table ia_css_rgb_gamma_table +#define atomisp_css_anr_thres ia_css_anr_thres +#define atomisp_css_dvs_6axis ia_css_dvs_6axis_config +#define atomisp_css_grid_info ia_css_grid_info +#define atomisp_css_3a_grid_info ia_css_3a_grid_info +#define atomisp_css_dvs_grid_info ia_css_dvs_grid_info +#define atomisp_css_shading_table ia_css_shading_table +#define atomisp_css_morph_table ia_css_morph_table +#define atomisp_css_dvs_6axis_config ia_css_dvs_6axis_config +#define atomisp_css_fw_info ia_css_fw_info +#define atomisp_css_formats_config ia_css_formats_config + +#define CSS_PIPE_ID_PREVIEW IA_CSS_PIPE_ID_PREVIEW +#define CSS_PIPE_ID_COPY IA_CSS_PIPE_ID_COPY +#define CSS_PIPE_ID_VIDEO IA_CSS_PIPE_ID_VIDEO +#define CSS_PIPE_ID_CAPTURE IA_CSS_PIPE_ID_CAPTURE +#define CSS_PIPE_ID_ACC IA_CSS_PIPE_ID_ACC +#define CSS_PIPE_ID_YUVPP IA_CSS_PIPE_ID_YUVPP +#define CSS_PIPE_ID_NUM IA_CSS_PIPE_ID_NUM + +#define CSS_INPUT_MODE_SENSOR IA_CSS_INPUT_MODE_BUFFERED_SENSOR +#define CSS_INPUT_MODE_FIFO IA_CSS_INPUT_MODE_FIFO +#define CSS_INPUT_MODE_TPG IA_CSS_INPUT_MODE_TPG +#define CSS_INPUT_MODE_PRBS IA_CSS_INPUT_MODE_PRBS +#define CSS_INPUT_MODE_MEMORY IA_CSS_INPUT_MODE_MEMORY + +#define CSS_IRQ_INFO_CSS_RECEIVER_ERROR IA_CSS_IRQ_INFO_CSS_RECEIVER_ERROR +#define CSS_IRQ_INFO_EVENTS_READY IA_CSS_IRQ_INFO_EVENTS_READY +#define CSS_IRQ_INFO_INPUT_SYSTEM_ERROR \ + IA_CSS_IRQ_INFO_INPUT_SYSTEM_ERROR +#define CSS_IRQ_INFO_IF_ERROR IA_CSS_IRQ_INFO_IF_ERROR + +#define CSS_BUFFER_TYPE_NUM IA_CSS_BUFFER_TYPE_NUM + +#define CSS_FRAME_FLASH_STATE_NONE IA_CSS_FRAME_FLASH_STATE_NONE +#define CSS_FRAME_FLASH_STATE_PARTIAL IA_CSS_FRAME_FLASH_STATE_PARTIAL +#define CSS_FRAME_FLASH_STATE_FULL IA_CSS_FRAME_FLASH_STATE_FULL + +#define CSS_BAYER_ORDER_GRBG IA_CSS_BAYER_ORDER_GRBG +#define CSS_BAYER_ORDER_RGGB IA_CSS_BAYER_ORDER_RGGB +#define CSS_BAYER_ORDER_BGGR IA_CSS_BAYER_ORDER_BGGR +#define CSS_BAYER_ORDER_GBRG IA_CSS_BAYER_ORDER_GBRG + +/* + * Hide IA_ naming difference in otherwise common CSS macros. + */ +#define CSS_ID(val) (IA_ ## val) +#define CSS_EVENT(val) (IA_CSS_EVENT_TYPE_ ## val) +#define CSS_FORMAT(val) (ATOMISP_INPUT_FORMAT_ ## val) + +#define CSS_EVENT_PORT_EOF CSS_EVENT(PORT_EOF) +#define CSS_EVENT_FRAME_TAGGED CSS_EVENT(FRAME_TAGGED) + +#define CSS_MIPI_FRAME_BUFFER_SIZE_1 0x60000 +#define CSS_MIPI_FRAME_BUFFER_SIZE_2 0x80000 + +struct atomisp_device; +struct atomisp_sub_device; + +#define MAX_STREAMS_PER_CHANNEL 2 + +/* + * These are used to indicate the css stream state, corresponding + * stream handling can be done via judging the different state. + */ +enum atomisp_css_stream_state { + CSS_STREAM_UNINIT, + CSS_STREAM_CREATED, + CSS_STREAM_STARTED, + CSS_STREAM_STOPPED, +}; + +/* + * Sensor of external ISP can send multiple steams with different mipi data + * type in the same virtual channel. This information needs to come from the + * sensor or external ISP + */ +struct atomisp_css_isys_config_info { + unsigned int input_format; + unsigned int width; + unsigned int height; +}; + +struct atomisp_stream_env { + struct ia_css_stream *stream; + struct ia_css_stream_config stream_config; + struct ia_css_stream_info stream_info; + struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; + struct ia_css_pipe *multi_pipes[IA_CSS_PIPE_ID_NUM]; + struct ia_css_pipe_config pipe_configs[IA_CSS_PIPE_ID_NUM]; + struct ia_css_pipe_extra_config pipe_extra_configs[IA_CSS_PIPE_ID_NUM]; + bool update_pipe[IA_CSS_PIPE_ID_NUM]; + enum atomisp_css_stream_state stream_state; + struct ia_css_stream *acc_stream; + enum atomisp_css_stream_state acc_stream_state; + struct ia_css_stream_config acc_stream_config; + unsigned int ch_id; /* virtual channel ID */ + unsigned int isys_configs; + struct atomisp_css_isys_config_info isys_info[MAX_STREAMS_PER_CHANNEL]; +}; + +struct atomisp_css_env { + struct ia_css_env isp_css_env; + struct ia_css_fw isp_css_fw; +}; + +struct atomisp_s3a_buf { + struct ia_css_isp_3a_statistics *s3a_data; + struct ia_css_isp_3a_statistics_map *s3a_map; + struct list_head list; +}; + +struct atomisp_dis_buf { + struct atomisp_css_dis_data *dis_data; + struct ia_css_isp_dvs_statistics_map *dvs_map; + struct list_head list; +}; + +struct atomisp_css_buffer { + struct ia_css_buffer css_buffer; +}; + +struct atomisp_css_event { + enum atomisp_css_pipe_id pipe; + struct ia_css_event event; +}; + +void atomisp_css_set_macc_config(struct atomisp_sub_device *asd, + struct atomisp_css_macc_config *macc_config); + +void atomisp_css_set_ecd_config(struct atomisp_sub_device *asd, + struct atomisp_css_ecd_config *ecd_config); + +void atomisp_css_set_ynr_config(struct atomisp_sub_device *asd, + struct atomisp_css_ynr_config *ynr_config); + +void atomisp_css_set_fc_config(struct atomisp_sub_device *asd, + struct atomisp_css_fc_config *fc_config); + +void atomisp_css_set_aa_config(struct atomisp_sub_device *asd, + struct atomisp_css_aa_config *aa_config); + +void atomisp_css_set_baa_config(struct atomisp_sub_device *asd, + struct atomisp_css_baa_config *baa_config); + +void atomisp_css_set_anr_config(struct atomisp_sub_device *asd, + struct atomisp_css_anr_config *anr_config); + +void atomisp_css_set_xnr_config(struct atomisp_sub_device *asd, + struct atomisp_css_xnr_config *xnr_config); + +void atomisp_css_set_cnr_config(struct atomisp_sub_device *asd, + struct atomisp_css_cnr_config *cnr_config); + +void atomisp_css_set_ctc_config(struct atomisp_sub_device *asd, + struct atomisp_css_ctc_config *ctc_config); + +void atomisp_css_set_yuv2rgb_cc_config(struct atomisp_sub_device *asd, + struct atomisp_css_cc_config *yuv2rgb_cc_config); + +void atomisp_css_set_rgb2yuv_cc_config(struct atomisp_sub_device *asd, + struct atomisp_css_cc_config *rgb2yuv_cc_config); + +void atomisp_css_set_xnr_table(struct atomisp_sub_device *asd, + struct atomisp_css_xnr_table *xnr_table); + +void atomisp_css_set_r_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_rgb_gamma_table *r_gamma_table); + +void atomisp_css_set_g_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_rgb_gamma_table *g_gamma_table); + +void atomisp_css_set_b_gamma_table(struct atomisp_sub_device *asd, + struct atomisp_css_rgb_gamma_table *b_gamma_table); + +void atomisp_css_set_anr_thres(struct atomisp_sub_device *asd, + struct atomisp_css_anr_thres *anr_thres); + +int atomisp_css_check_firmware_version(struct atomisp_device *isp); + +int atomisp_css_load_firmware(struct atomisp_device *isp); + +void atomisp_css_unload_firmware(struct atomisp_device *isp); + +void atomisp_css_set_dvs_6axis(struct atomisp_sub_device *asd, + struct atomisp_css_dvs_6axis *dvs_6axis); + +unsigned int atomisp_css_debug_get_dtrace_level(void); + +int atomisp_css_debug_dump_isp_binary(void); + +int atomisp_css_dump_sp_raw_copy_linecount(bool reduced); + +int atomisp_css_dump_blob_infor(void); + +void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd, + uint32_t isp_config_id); + +void atomisp_css_set_isp_config_applied_frame(struct atomisp_sub_device *asd, + struct atomisp_css_frame *output_frame); + +int atomisp_get_css_dbgfunc(void); + +int atomisp_set_css_dbgfunc(struct atomisp_device *isp, int opt); +struct atomisp_css_dvs_grid_info *atomisp_css_get_dvs_grid_info( + struct atomisp_css_grid_info *grid_info); +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c new file mode 100644 index 0000000000000..b86ab107a9e5f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c @@ -0,0 +1,1225 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifdef CONFIG_COMPAT +#include + +#include + +#include "atomisp_internal.h" +#include "atomisp_compat.h" +#include "atomisp_ioctl.h" +#include "atomisp_compat_ioctl32.h" + +static int get_atomisp_histogram32(struct atomisp_histogram *kp, + struct atomisp_histogram32 __user *up) +{ + compat_uptr_t tmp; + + if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_histogram32)) || + get_user(kp->num_elements, &up->num_elements) || + get_user(tmp, &up->data)) + return -EFAULT; + + kp->data = compat_ptr(tmp); + return 0; +} + +static int put_atomisp_histogram32(struct atomisp_histogram *kp, + struct atomisp_histogram32 __user *up) +{ + compat_uptr_t tmp = (compat_uptr_t)((uintptr_t)kp->data); + + if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_histogram32)) || + put_user(kp->num_elements, &up->num_elements) || + put_user(tmp, &up->data)) + return -EFAULT; + + return 0; +} + +static inline int get_v4l2_pix_format(struct v4l2_pix_format *kp, + struct v4l2_pix_format __user *up) +{ + if (copy_from_user(kp, up, sizeof(struct v4l2_pix_format))) + return -EFAULT; + return 0; +} + +static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp, + struct v4l2_pix_format __user *up) +{ + if (copy_to_user(up, kp, sizeof(struct v4l2_pix_format))) + return -EFAULT; + return 0; +} + +static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp, + struct v4l2_framebuffer32 __user *up) +{ + compat_uptr_t tmp; + + if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_framebuffer32)) || + get_user(tmp, &up->base) || + get_user(kp->capability, &up->capability) || + get_user(kp->flags, &up->flags)) + return -EFAULT; + + kp->base = (void __force *)compat_ptr(tmp); + get_v4l2_pix_format((struct v4l2_pix_format *)&kp->fmt, &up->fmt); + return 0; +} + +static int get_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, + struct atomisp_dis_statistics32 __user *up) +{ + compat_uptr_t hor_prod_odd_real; + compat_uptr_t hor_prod_odd_imag; + compat_uptr_t hor_prod_even_real; + compat_uptr_t hor_prod_even_imag; + compat_uptr_t ver_prod_odd_real; + compat_uptr_t ver_prod_odd_imag; + compat_uptr_t ver_prod_even_real; + compat_uptr_t ver_prod_even_imag; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_dis_statistics32)) || + copy_from_user(kp, up, sizeof(struct atomisp_dvs_grid_info)) || + get_user(hor_prod_odd_real, + &up->dvs2_stat.hor_prod.odd_real) || + get_user(hor_prod_odd_imag, + &up->dvs2_stat.hor_prod.odd_imag) || + get_user(hor_prod_even_real, + &up->dvs2_stat.hor_prod.even_real) || + get_user(hor_prod_even_imag, + &up->dvs2_stat.hor_prod.even_imag) || + get_user(ver_prod_odd_real, + &up->dvs2_stat.ver_prod.odd_real) || + get_user(ver_prod_odd_imag, + &up->dvs2_stat.ver_prod.odd_imag) || + get_user(ver_prod_even_real, + &up->dvs2_stat.ver_prod.even_real) || + get_user(ver_prod_even_imag, + &up->dvs2_stat.ver_prod.even_imag) || + get_user(kp->exp_id, &up->exp_id)) + return -EFAULT; + + kp->dvs2_stat.hor_prod.odd_real = compat_ptr(hor_prod_odd_real); + kp->dvs2_stat.hor_prod.odd_imag = compat_ptr(hor_prod_odd_imag); + kp->dvs2_stat.hor_prod.even_real = compat_ptr(hor_prod_even_real); + kp->dvs2_stat.hor_prod.even_imag = compat_ptr(hor_prod_even_imag); + kp->dvs2_stat.ver_prod.odd_real = compat_ptr(ver_prod_odd_real); + kp->dvs2_stat.ver_prod.odd_imag = compat_ptr(ver_prod_odd_imag); + kp->dvs2_stat.ver_prod.even_real = compat_ptr(ver_prod_even_real); + kp->dvs2_stat.ver_prod.even_imag = compat_ptr(ver_prod_even_imag); + return 0; +} + +static int put_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, + struct atomisp_dis_statistics32 __user *up) +{ + compat_uptr_t hor_prod_odd_real = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_real); + compat_uptr_t hor_prod_odd_imag = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_imag); + compat_uptr_t hor_prod_even_real = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_real); + compat_uptr_t hor_prod_even_imag = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_imag); + compat_uptr_t ver_prod_odd_real = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_real); + compat_uptr_t ver_prod_odd_imag = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_imag); + compat_uptr_t ver_prod_even_real = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_real); + compat_uptr_t ver_prod_even_imag = + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_imag); + + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_dis_statistics32)) || + copy_to_user(up, kp, sizeof(struct atomisp_dvs_grid_info)) || + put_user(hor_prod_odd_real, + &up->dvs2_stat.hor_prod.odd_real) || + put_user(hor_prod_odd_imag, + &up->dvs2_stat.hor_prod.odd_imag) || + put_user(hor_prod_even_real, + &up->dvs2_stat.hor_prod.even_real) || + put_user(hor_prod_even_imag, + &up->dvs2_stat.hor_prod.even_imag) || + put_user(ver_prod_odd_real, + &up->dvs2_stat.ver_prod.odd_real) || + put_user(ver_prod_odd_imag, + &up->dvs2_stat.ver_prod.odd_imag) || + put_user(ver_prod_even_real, + &up->dvs2_stat.ver_prod.even_real) || + put_user(ver_prod_even_imag, + &up->dvs2_stat.ver_prod.even_imag) || + put_user(kp->exp_id, &up->exp_id)) + return -EFAULT; + + return 0; +} + +static int get_atomisp_dis_coefficients32(struct atomisp_dis_coefficients *kp, + struct atomisp_dis_coefficients32 __user *up) +{ + compat_uptr_t hor_coefs_odd_real; + compat_uptr_t hor_coefs_odd_imag; + compat_uptr_t hor_coefs_even_real; + compat_uptr_t hor_coefs_even_imag; + compat_uptr_t ver_coefs_odd_real; + compat_uptr_t ver_coefs_odd_imag; + compat_uptr_t ver_coefs_even_real; + compat_uptr_t ver_coefs_even_imag; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_dis_coefficients32)) || + copy_from_user(kp, up, sizeof(struct atomisp_dvs_grid_info)) || + get_user(hor_coefs_odd_real, &up->hor_coefs.odd_real) || + get_user(hor_coefs_odd_imag, &up->hor_coefs.odd_imag) || + get_user(hor_coefs_even_real, &up->hor_coefs.even_real) || + get_user(hor_coefs_even_imag, &up->hor_coefs.even_imag) || + get_user(ver_coefs_odd_real, &up->ver_coefs.odd_real) || + get_user(ver_coefs_odd_imag, &up->ver_coefs.odd_imag) || + get_user(ver_coefs_even_real, &up->ver_coefs.even_real) || + get_user(ver_coefs_even_imag, &up->ver_coefs.even_imag)) + return -EFAULT; + + kp->hor_coefs.odd_real = compat_ptr(hor_coefs_odd_real); + kp->hor_coefs.odd_imag = compat_ptr(hor_coefs_odd_imag); + kp->hor_coefs.even_real = compat_ptr(hor_coefs_even_real); + kp->hor_coefs.even_imag = compat_ptr(hor_coefs_even_imag); + kp->ver_coefs.odd_real = compat_ptr(ver_coefs_odd_real); + kp->ver_coefs.odd_imag = compat_ptr(ver_coefs_odd_imag); + kp->ver_coefs.even_real = compat_ptr(ver_coefs_even_real); + kp->ver_coefs.even_imag = compat_ptr(ver_coefs_even_imag); + return 0; +} + +static int get_atomisp_dvs_6axis_config32(struct atomisp_dvs_6axis_config *kp, + struct atomisp_dvs_6axis_config32 __user *up) +{ compat_uptr_t xcoords_y; + compat_uptr_t ycoords_y; + compat_uptr_t xcoords_uv; + compat_uptr_t ycoords_uv; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_dvs_6axis_config32)) || + get_user(kp->exp_id, &up->exp_id) || + get_user(kp->width_y, &up->width_y) || + get_user(kp->height_y, &up->height_y) || + get_user(kp->width_uv, &up->width_uv) || + get_user(kp->height_uv, &up->height_uv) || + get_user(xcoords_y, &up->xcoords_y) || + get_user(ycoords_y, &up->ycoords_y) || + get_user(xcoords_uv, &up->xcoords_uv) || + get_user(ycoords_uv, &up->ycoords_uv)) + return -EFAULT; + + kp->xcoords_y = (void __force *)compat_ptr(xcoords_y); + kp->ycoords_y = (void __force *)compat_ptr(ycoords_y); + kp->xcoords_uv = (void __force *)compat_ptr(xcoords_uv); + kp->ycoords_uv = (void __force *)compat_ptr(ycoords_uv); + return 0; +} + +static int get_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, + struct atomisp_3a_statistics32 __user *up) +{ + compat_uptr_t data; + compat_uptr_t rgby_data; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_3a_statistics32)) || + copy_from_user(kp, up, sizeof(struct atomisp_grid_info)) || + get_user(rgby_data, &up->rgby_data) || + get_user(data, &up->data) || + get_user(kp->exp_id, &up->exp_id) || + get_user(kp->isp_config_id, &up->isp_config_id)) + return -EFAULT; + + kp->data = compat_ptr(data); + kp->rgby_data = compat_ptr(rgby_data); + + return 0; +} + +static int put_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, + struct atomisp_3a_statistics32 __user *up) +{ + compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); + compat_uptr_t rgby_data = (compat_uptr_t)((uintptr_t)kp->rgby_data); + + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_3a_statistics32)) || + copy_to_user(up, kp, sizeof(struct atomisp_grid_info)) || + put_user(rgby_data, &up->rgby_data) || + put_user(data, &up->data) || + put_user(kp->exp_id, &up->exp_id) || + put_user(kp->isp_config_id, &up->isp_config_id)) + return -EFAULT; + + return 0; +} + + +static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp, + struct atomisp_metadata32 __user *up) +{ + compat_uptr_t data; + compat_uptr_t effective_width; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_metadata32)) || + get_user(data, &up->data) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height) || + get_user(kp->stride, &up->stride) || + get_user(kp->exp_id, &up->exp_id) || + get_user(effective_width, &up->effective_width)) + return -EFAULT; + + kp->data = compat_ptr(data); + kp->effective_width = (void __force *)compat_ptr(effective_width); + return 0; +} + + +static int put_atomisp_metadata_stat32(struct atomisp_metadata *kp, + struct atomisp_metadata32 __user *up) +{ + compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); + compat_uptr_t effective_width = + (compat_uptr_t)((uintptr_t)kp->effective_width); + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_metadata32)) || + put_user(data, &up->data) || + put_user(kp->width, &up->width) || + put_user(kp->height, &up->height) || + put_user(kp->stride, &up->stride) || + put_user(kp->exp_id, &up->exp_id) || + put_user(effective_width, &up->effective_width)) + return -EFAULT; + + return 0; +} + +static int put_atomisp_metadata_by_type_stat32( + struct atomisp_metadata_with_type *kp, + struct atomisp_metadata_with_type32 __user *up) +{ + compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); + compat_uptr_t effective_width = + (compat_uptr_t)((uintptr_t)kp->effective_width); + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_metadata_with_type32)) || + put_user(data, &up->data) || + put_user(kp->width, &up->width) || + put_user(kp->height, &up->height) || + put_user(kp->stride, &up->stride) || + put_user(kp->exp_id, &up->exp_id) || + put_user(effective_width, &up->effective_width) || + put_user(kp->type, &up->type)) + return -EFAULT; + + return 0; +} + +static int get_atomisp_metadata_by_type_stat32( + struct atomisp_metadata_with_type *kp, + struct atomisp_metadata_with_type32 __user *up) +{ + compat_uptr_t data; + compat_uptr_t effective_width; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_metadata_with_type32)) || + get_user(data, &up->data) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height) || + get_user(kp->stride, &up->stride) || + get_user(kp->exp_id, &up->exp_id) || + get_user(effective_width, &up->effective_width) || + get_user(kp->type, &up->type)) + return -EFAULT; + + kp->data = compat_ptr(data); + kp->effective_width = (void __force *)compat_ptr(effective_width); + return 0; +} + +static int get_atomisp_morph_table32(struct atomisp_morph_table *kp, + struct atomisp_morph_table32 __user *up) +{ + unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_morph_table32)) || + get_user(kp->enabled, &up->enabled) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height)) + return -EFAULT; + + while (n-- > 0) { + uintptr_t *coord_kp = (uintptr_t *)&kp->coordinates_x[n]; + + if (get_user((*coord_kp), &up->coordinates_x[n])) + return -EFAULT; + + coord_kp = (uintptr_t *)&kp->coordinates_y[n]; + if (get_user((*coord_kp), &up->coordinates_y[n])) + return -EFAULT; + } + return 0; +} + +static int put_atomisp_morph_table32(struct atomisp_morph_table *kp, + struct atomisp_morph_table32 __user *up) +{ + unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES; + + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_morph_table32)) || + put_user(kp->enabled, &up->enabled) || + put_user(kp->width, &up->width) || + put_user(kp->height, &up->height)) + return -EFAULT; + + while (n-- > 0) { + uintptr_t *coord_kp = (uintptr_t *)&kp->coordinates_x[n]; + + if (put_user((*coord_kp), &up->coordinates_x[n])) + return -EFAULT; + + coord_kp = (uintptr_t *)&kp->coordinates_y[n]; + if (put_user((*coord_kp), &up->coordinates_y[n])) + return -EFAULT; + } + return 0; +} + +static int get_atomisp_overlay32(struct atomisp_overlay *kp, + struct atomisp_overlay32 __user *up) +{ + compat_uptr_t frame; + if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_overlay32)) || + get_user(frame, &up->frame) || + get_user(kp->bg_y, &up->bg_y) || + get_user(kp->bg_u, &up->bg_u) || + get_user(kp->bg_v, &up->bg_v) || + get_user(kp->blend_input_perc_y, &up->blend_input_perc_y) || + get_user(kp->blend_input_perc_u, &up->blend_input_perc_u) || + get_user(kp->blend_input_perc_v, &up->blend_input_perc_v) || + get_user(kp->blend_overlay_perc_y, + &up->blend_overlay_perc_y) || + get_user(kp->blend_overlay_perc_u, + &up->blend_overlay_perc_u) || + get_user(kp->blend_overlay_perc_v, + &up->blend_overlay_perc_v) || + get_user(kp->blend_overlay_perc_u, + &up->blend_overlay_perc_u) || + get_user(kp->overlay_start_x, &up->overlay_start_y)) + return -EFAULT; + + kp->frame = (void __force *)compat_ptr(frame); + return 0; +} + +static int put_atomisp_overlay32(struct atomisp_overlay *kp, + struct atomisp_overlay32 __user *up) +{ + compat_uptr_t frame = (compat_uptr_t)((uintptr_t)kp->frame); + + if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_overlay32)) || + put_user(frame, &up->frame) || + put_user(kp->bg_y, &up->bg_y) || + put_user(kp->bg_u, &up->bg_u) || + put_user(kp->bg_v, &up->bg_v) || + put_user(kp->blend_input_perc_y, &up->blend_input_perc_y) || + put_user(kp->blend_input_perc_u, &up->blend_input_perc_u) || + put_user(kp->blend_input_perc_v, &up->blend_input_perc_v) || + put_user(kp->blend_overlay_perc_y, + &up->blend_overlay_perc_y) || + put_user(kp->blend_overlay_perc_u, + &up->blend_overlay_perc_u) || + put_user(kp->blend_overlay_perc_v, + &up->blend_overlay_perc_v) || + put_user(kp->blend_overlay_perc_u, + &up->blend_overlay_perc_u) || + put_user(kp->overlay_start_x, &up->overlay_start_y)) + return -EFAULT; + + return 0; +} + +static int get_atomisp_calibration_group32( + struct atomisp_calibration_group *kp, + struct atomisp_calibration_group32 __user *up) +{ + compat_uptr_t calb_grp_values; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_calibration_group32)) || + get_user(kp->size, &up->size) || + get_user(kp->type, &up->type) || + get_user(calb_grp_values, &up->calb_grp_values)) + return -EFAULT; + + kp->calb_grp_values = (void __force *)compat_ptr(calb_grp_values); + return 0; +} + +static int put_atomisp_calibration_group32( + struct atomisp_calibration_group *kp, + struct atomisp_calibration_group32 __user *up) +{ + compat_uptr_t calb_grp_values = + (compat_uptr_t)((uintptr_t)kp->calb_grp_values); + + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_calibration_group32)) || + put_user(kp->size, &up->size) || + put_user(kp->type, &up->type) || + put_user(calb_grp_values, &up->calb_grp_values)) + return -EFAULT; + + return 0; +} + +static int get_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, + struct atomisp_acc_fw_load32 __user *up) +{ + compat_uptr_t data; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_acc_fw_load32)) || + get_user(kp->size, &up->size) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(data, &up->data)) + return -EFAULT; + + kp->data = compat_ptr(data); + return 0; +} + +static int put_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, + struct atomisp_acc_fw_load32 __user *up) +{ + compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); + + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_acc_fw_load32)) || + put_user(kp->size, &up->size) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(data, &up->data)) + return -EFAULT; + + return 0; +} + +static int get_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, + struct atomisp_acc_fw_arg32 __user *up) +{ + compat_uptr_t value; + + if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_acc_fw_arg32)) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(kp->index, &up->index) || + get_user(value, &up->value) || + get_user(kp->size, &up->size)) + return -EFAULT; + + kp->value = compat_ptr(value); + return 0; +} + +static int put_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, + struct atomisp_acc_fw_arg32 __user *up) +{ + compat_uptr_t value = (compat_uptr_t)((uintptr_t)kp->value); + + if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_acc_fw_arg32)) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(kp->index, &up->index) || + put_user(value, &up->value) || + put_user(kp->size, &up->size)) + return -EFAULT; + + return 0; +} + +static int get_v4l2_private_int_data32(struct v4l2_private_int_data *kp, + struct v4l2_private_int_data32 __user *up) +{ + compat_uptr_t data; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct v4l2_private_int_data32)) || + get_user(kp->size, &up->size) || + get_user(data, &up->data) || + get_user(kp->reserved[0], &up->reserved[0]) || + get_user(kp->reserved[1], &up->reserved[1])) + return -EFAULT; + + kp->data = compat_ptr(data); + return 0; +} + +static int put_v4l2_private_int_data32(struct v4l2_private_int_data *kp, + struct v4l2_private_int_data32 __user *up) +{ + compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); + + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct v4l2_private_int_data32)) || + put_user(kp->size, &up->size) || + put_user(data, &up->data) || + put_user(kp->reserved[0], &up->reserved[0]) || + put_user(kp->reserved[1], &up->reserved[1])) + return -EFAULT; + + return 0; +} + +static int get_atomisp_shading_table32(struct atomisp_shading_table *kp, + struct atomisp_shading_table32 __user *up) +{ + unsigned int n = ATOMISP_NUM_SC_COLORS; + + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_shading_table32)) || + get_user(kp->enable, &up->enable) || + get_user(kp->sensor_width, &up->sensor_width) || + get_user(kp->sensor_height, &up->sensor_height) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height) || + get_user(kp->fraction_bits, &up->fraction_bits)) + return -EFAULT; + + while (n-- > 0) { + uintptr_t *data_p = (uintptr_t *)&kp->data[n]; + + if (get_user((*data_p), &up->data[n])) + return -EFAULT; + } + return 0; +} + +static int get_atomisp_acc_map32(struct atomisp_acc_map *kp, + struct atomisp_acc_map32 __user *up) +{ + compat_uptr_t user_ptr; + + if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_acc_map32)) || + get_user(kp->flags, &up->flags) || + get_user(kp->length, &up->length) || + get_user(user_ptr, &up->user_ptr) || + get_user(kp->css_ptr, &up->css_ptr) || + get_user(kp->reserved[0], &up->reserved[0]) || + get_user(kp->reserved[1], &up->reserved[1]) || + get_user(kp->reserved[2], &up->reserved[2]) || + get_user(kp->reserved[3], &up->reserved[3])) + return -EFAULT; + + kp->user_ptr = compat_ptr(user_ptr); + return 0; +} + +static int put_atomisp_acc_map32(struct atomisp_acc_map *kp, + struct atomisp_acc_map32 __user *up) +{ + compat_uptr_t user_ptr = (compat_uptr_t)((uintptr_t)kp->user_ptr); + + if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_acc_map32)) || + put_user(kp->flags, &up->flags) || + put_user(kp->length, &up->length) || + put_user(user_ptr, &up->user_ptr) || + put_user(kp->css_ptr, &up->css_ptr) || + put_user(kp->reserved[0], &up->reserved[0]) || + put_user(kp->reserved[1], &up->reserved[1]) || + put_user(kp->reserved[2], &up->reserved[2]) || + put_user(kp->reserved[3], &up->reserved[3])) + return -EFAULT; + + return 0; +} + +static int get_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, + struct atomisp_acc_s_mapped_arg32 __user *up) +{ + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_acc_s_mapped_arg32)) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(kp->memory, &up->memory) || + get_user(kp->length, &up->length) || + get_user(kp->css_ptr, &up->css_ptr)) + return -EFAULT; + + return 0; +} + +static int put_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, + struct atomisp_acc_s_mapped_arg32 __user *up) +{ + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_acc_s_mapped_arg32)) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(kp->memory, &up->memory) || + put_user(kp->length, &up->length) || + put_user(kp->css_ptr, &up->css_ptr)) + return -EFAULT; + + return 0; +} + +static int get_atomisp_parameters32(struct atomisp_parameters *kp, + struct atomisp_parameters32 __user *up) +{ + int n = offsetof(struct atomisp_parameters32, output_frame) / + sizeof(compat_uptr_t); + unsigned int size, offset = 0; + void __user *user_ptr; + unsigned int stp, mtp, dcp, dscp = 0; + + if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_parameters32))) + return -EFAULT; + + while (n >= 0) { + compat_uptr_t __user *src = ((compat_uptr_t __user *)up) + n; + uintptr_t *dst = ((uintptr_t *)kp) + n; + + if (get_user((*dst), src)) + return -EFAULT; + n--; + } + if (get_user(kp->isp_config_id, &up->isp_config_id) || + get_user(kp->per_frame_setting, &up->per_frame_setting) || + get_user(stp, &up->shading_table) || + get_user(mtp, &up->morph_table) || + get_user(dcp, &up->dvs2_coefs) || + get_user(dscp, &up->dvs_6axis_config)) + return -EFAULT; + + { + union { + struct atomisp_shading_table shading_table; + struct atomisp_morph_table morph_table; + struct atomisp_dis_coefficients dvs2_coefs; + struct atomisp_dvs_6axis_config dvs_6axis_config; + } karg; + + size = sizeof(struct atomisp_shading_table) + + sizeof(struct atomisp_morph_table) + + sizeof(struct atomisp_dis_coefficients) + + sizeof(struct atomisp_dvs_6axis_config); + user_ptr = compat_alloc_user_space(size); + + /* handle shading table */ + if (stp != 0) { + if (get_atomisp_shading_table32(&karg.shading_table, + (struct atomisp_shading_table32 __user *) + (uintptr_t)stp)) + return -EFAULT; + + kp->shading_table = (void __force *)user_ptr + offset; + offset = sizeof(struct atomisp_shading_table); + if (!kp->shading_table) + return -EFAULT; + + if (copy_to_user((void __user *)kp->shading_table, + &karg.shading_table, + sizeof(struct atomisp_shading_table))) + return -EFAULT; + } + + /* handle morph table */ + if (mtp != 0) { + if (get_atomisp_morph_table32(&karg.morph_table, + (struct atomisp_morph_table32 __user *) + (uintptr_t)mtp)) + return -EFAULT; + + kp->morph_table = (void __force *)user_ptr + offset; + offset += sizeof(struct atomisp_morph_table); + if (!kp->morph_table) + return -EFAULT; + + if (copy_to_user((void __user *)kp->morph_table, + &karg.morph_table, + sizeof(struct atomisp_morph_table))) + return -EFAULT; + } + + /* handle dvs2 coefficients */ + if (dcp != 0) { + if (get_atomisp_dis_coefficients32(&karg.dvs2_coefs, + (struct atomisp_dis_coefficients32 __user *) + (uintptr_t)dcp)) + return -EFAULT; + + kp->dvs2_coefs = (void __force *)user_ptr + offset; + offset += sizeof(struct atomisp_dis_coefficients); + if (!kp->dvs2_coefs) + return -EFAULT; + + if (copy_to_user((void __user *)kp->dvs2_coefs, + &karg.dvs2_coefs, + sizeof(struct atomisp_dis_coefficients))) + return -EFAULT; + } + /* handle dvs 6axis configuration */ + if (dscp != 0) { + if (get_atomisp_dvs_6axis_config32(&karg.dvs_6axis_config, + (struct atomisp_dvs_6axis_config32 __user *) + (uintptr_t)dscp)) + return -EFAULT; + + kp->dvs_6axis_config = (void __force *)user_ptr + offset; + offset += sizeof(struct atomisp_dvs_6axis_config); + if (!kp->dvs_6axis_config) + return -EFAULT; + + if (copy_to_user((void __user *)kp->dvs_6axis_config, + &karg.dvs_6axis_config, + sizeof(struct atomisp_dvs_6axis_config))) + return -EFAULT; + } + } + return 0; +} + +static int get_atomisp_acc_fw_load_to_pipe32( + struct atomisp_acc_fw_load_to_pipe *kp, + struct atomisp_acc_fw_load_to_pipe32 __user *up) +{ + compat_uptr_t data; + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_acc_fw_load_to_pipe32)) || + get_user(kp->flags, &up->flags) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(kp->size, &up->size) || + get_user(kp->type, &up->type) || + get_user(kp->reserved[0], &up->reserved[0]) || + get_user(kp->reserved[1], &up->reserved[1]) || + get_user(kp->reserved[2], &up->reserved[2]) || + get_user(data, &up->data)) + return -EFAULT; + + kp->data = compat_ptr(data); + return 0; +} + +static int put_atomisp_acc_fw_load_to_pipe32( + struct atomisp_acc_fw_load_to_pipe *kp, + struct atomisp_acc_fw_load_to_pipe32 __user *up) +{ + compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); + if (!access_ok(VERIFY_WRITE, up, + sizeof(struct atomisp_acc_fw_load_to_pipe32)) || + put_user(kp->flags, &up->flags) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(kp->size, &up->size) || + put_user(kp->type, &up->type) || + put_user(kp->reserved[0], &up->reserved[0]) || + put_user(kp->reserved[1], &up->reserved[1]) || + put_user(kp->reserved[2], &up->reserved[2]) || + put_user(data, &up->data)) + return -EFAULT; + + return 0; +} + +static int get_atomisp_sensor_ae_bracketing_lut( + struct atomisp_sensor_ae_bracketing_lut *kp, + struct atomisp_sensor_ae_bracketing_lut32 __user *up) +{ + compat_uptr_t lut; + if (!access_ok(VERIFY_READ, up, + sizeof(struct atomisp_sensor_ae_bracketing_lut32)) || + get_user(kp->lut_size, &up->lut_size) || + get_user(lut, &up->lut)) + return -EFAULT; + + kp->lut = (void __force *)compat_ptr(lut); + return 0; +} + +static long native_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + long ret = -ENOIOCTLCMD; + + if (file->f_op->unlocked_ioctl) + ret = file->f_op->unlocked_ioctl(file, cmd, arg); + + return ret; +} + +static long atomisp_do_compat_ioctl(struct file *file, + unsigned int cmd, unsigned long arg) +{ + union { + struct atomisp_histogram his; + struct atomisp_dis_statistics dis_s; + struct atomisp_dis_coefficients dis_c; + struct atomisp_dvs_6axis_config dvs_c; + struct atomisp_3a_statistics s3a_s; + struct atomisp_morph_table mor_t; + struct v4l2_framebuffer v4l2_buf; + struct atomisp_overlay overlay; + struct atomisp_calibration_group cal_grp; + struct atomisp_acc_fw_load acc_fw_load; + struct atomisp_acc_fw_arg acc_fw_arg; + struct v4l2_private_int_data v4l2_pri_data; + struct atomisp_shading_table shd_tbl; + struct atomisp_acc_map acc_map; + struct atomisp_acc_s_mapped_arg acc_map_arg; + struct atomisp_parameters param; + struct atomisp_acc_fw_load_to_pipe acc_fw_to_pipe; + struct atomisp_metadata md; + struct atomisp_metadata_with_type md_with_type; + struct atomisp_sensor_ae_bracketing_lut lut; + } karg; + mm_segment_t old_fs; + void __user *up = compat_ptr(arg); + long err = -ENOIOCTLCMD; + + /* First, convert the command. */ + switch (cmd) { + case ATOMISP_IOC_G_HISTOGRAM32: + cmd = ATOMISP_IOC_G_HISTOGRAM; + break; + case ATOMISP_IOC_S_HISTOGRAM32: + cmd = ATOMISP_IOC_S_HISTOGRAM; + break; + case ATOMISP_IOC_G_DIS_STAT32: + cmd = ATOMISP_IOC_G_DIS_STAT; + break; + case ATOMISP_IOC_S_DIS_COEFS32: + cmd = ATOMISP_IOC_S_DIS_COEFS; + break; + case ATOMISP_IOC_S_DIS_VECTOR32: + cmd = ATOMISP_IOC_S_DIS_VECTOR; + break; + case ATOMISP_IOC_G_3A_STAT32: + cmd = ATOMISP_IOC_G_3A_STAT; + break; + case ATOMISP_IOC_G_ISP_GDC_TAB32: + cmd = ATOMISP_IOC_G_ISP_GDC_TAB; + break; + case ATOMISP_IOC_S_ISP_GDC_TAB32: + cmd = ATOMISP_IOC_S_ISP_GDC_TAB; + break; + case ATOMISP_IOC_S_ISP_FPN_TABLE32: + cmd = ATOMISP_IOC_S_ISP_FPN_TABLE; + break; + case ATOMISP_IOC_G_ISP_OVERLAY32: + cmd = ATOMISP_IOC_G_ISP_OVERLAY; + break; + case ATOMISP_IOC_S_ISP_OVERLAY32: + cmd = ATOMISP_IOC_S_ISP_OVERLAY; + break; + case ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP32: + cmd = ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP; + break; + case ATOMISP_IOC_ACC_LOAD32: + cmd = ATOMISP_IOC_ACC_LOAD; + break; + case ATOMISP_IOC_ACC_S_ARG32: + cmd = ATOMISP_IOC_ACC_S_ARG; + break; + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA32: + cmd = ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA; + break; + case ATOMISP_IOC_S_ISP_SHD_TAB32: + cmd = ATOMISP_IOC_S_ISP_SHD_TAB; + break; + case ATOMISP_IOC_ACC_DESTAB32: + cmd = ATOMISP_IOC_ACC_DESTAB; + break; + case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA32: + cmd = ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA; + break; + case ATOMISP_IOC_ACC_MAP32: + cmd = ATOMISP_IOC_ACC_MAP; + break; + case ATOMISP_IOC_ACC_UNMAP32: + cmd = ATOMISP_IOC_ACC_UNMAP; + break; + case ATOMISP_IOC_ACC_S_MAPPED_ARG32: + cmd = ATOMISP_IOC_ACC_S_MAPPED_ARG; + break; + case ATOMISP_IOC_S_PARAMETERS32: + cmd = ATOMISP_IOC_S_PARAMETERS; + break; + case ATOMISP_IOC_ACC_LOAD_TO_PIPE32: + cmd = ATOMISP_IOC_ACC_LOAD_TO_PIPE; + break; + case ATOMISP_IOC_G_METADATA32: + cmd = ATOMISP_IOC_G_METADATA; + break; + case ATOMISP_IOC_G_METADATA_BY_TYPE32: + cmd = ATOMISP_IOC_G_METADATA_BY_TYPE; + break; + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT32: + cmd = ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT; + break; + } + + switch (cmd) { + case ATOMISP_IOC_G_HISTOGRAM: + case ATOMISP_IOC_S_HISTOGRAM: + err = get_atomisp_histogram32(&karg.his, up); + break; + case ATOMISP_IOC_G_DIS_STAT: + err = get_atomisp_dis_statistics32(&karg.dis_s, up); + break; + case ATOMISP_IOC_S_DIS_COEFS: + err = get_atomisp_dis_coefficients32(&karg.dis_c, up); + break; + case ATOMISP_IOC_S_DIS_VECTOR: + err = get_atomisp_dvs_6axis_config32(&karg.dvs_c, up); + break; + case ATOMISP_IOC_G_3A_STAT: + err = get_atomisp_3a_statistics32(&karg.s3a_s, up); + break; + case ATOMISP_IOC_G_ISP_GDC_TAB: + case ATOMISP_IOC_S_ISP_GDC_TAB: + err = get_atomisp_morph_table32(&karg.mor_t, up); + break; + case ATOMISP_IOC_S_ISP_FPN_TABLE: + err = get_v4l2_framebuffer32(&karg.v4l2_buf, up); + break; + case ATOMISP_IOC_G_ISP_OVERLAY: + case ATOMISP_IOC_S_ISP_OVERLAY: + err = get_atomisp_overlay32(&karg.overlay, up); + break; + case ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP: + err = get_atomisp_calibration_group32(&karg.cal_grp, up); + break; + case ATOMISP_IOC_ACC_LOAD: + err = get_atomisp_acc_fw_load32(&karg.acc_fw_load, up); + break; + case ATOMISP_IOC_ACC_S_ARG: + case ATOMISP_IOC_ACC_DESTAB: + err = get_atomisp_acc_fw_arg32(&karg.acc_fw_arg, up); + break; + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA: + case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA: + err = get_v4l2_private_int_data32(&karg.v4l2_pri_data, up); + break; + case ATOMISP_IOC_S_ISP_SHD_TAB: + err = get_atomisp_shading_table32(&karg.shd_tbl, up); + break; + case ATOMISP_IOC_ACC_MAP: + case ATOMISP_IOC_ACC_UNMAP: + err = get_atomisp_acc_map32(&karg.acc_map, up); + break; + case ATOMISP_IOC_ACC_S_MAPPED_ARG: + err = get_atomisp_acc_s_mapped_arg32(&karg.acc_map_arg, up); + break; + case ATOMISP_IOC_S_PARAMETERS: + err = get_atomisp_parameters32(&karg.param, up); + break; + case ATOMISP_IOC_ACC_LOAD_TO_PIPE: + err = get_atomisp_acc_fw_load_to_pipe32(&karg.acc_fw_to_pipe, + up); + break; + case ATOMISP_IOC_G_METADATA: + err = get_atomisp_metadata_stat32(&karg.md, up); + break; + case ATOMISP_IOC_G_METADATA_BY_TYPE: + err = get_atomisp_metadata_by_type_stat32(&karg.md_with_type, + up); + break; + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: + err = get_atomisp_sensor_ae_bracketing_lut(&karg.lut, up); + break; + } + if (err) + return err; + + old_fs = get_fs(); + set_fs(KERNEL_DS); + err = native_ioctl(file, cmd, (unsigned long)&karg); + set_fs(old_fs); + if (err) + return err; + + switch (cmd) { + case ATOMISP_IOC_G_HISTOGRAM: + err = put_atomisp_histogram32(&karg.his, up); + break; + case ATOMISP_IOC_G_DIS_STAT: + err = put_atomisp_dis_statistics32(&karg.dis_s, up); + break; + case ATOMISP_IOC_G_3A_STAT: + err = put_atomisp_3a_statistics32(&karg.s3a_s, up); + break; + case ATOMISP_IOC_G_ISP_GDC_TAB: + err = put_atomisp_morph_table32(&karg.mor_t, up); + break; + case ATOMISP_IOC_G_ISP_OVERLAY: + err = put_atomisp_overlay32(&karg.overlay, up); + break; + case ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP: + err = put_atomisp_calibration_group32(&karg.cal_grp, up); + break; + case ATOMISP_IOC_ACC_LOAD: + err = put_atomisp_acc_fw_load32(&karg.acc_fw_load, up); + break; + case ATOMISP_IOC_ACC_S_ARG: + case ATOMISP_IOC_ACC_DESTAB: + err = put_atomisp_acc_fw_arg32(&karg.acc_fw_arg, up); + break; + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA: + case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA: + err = put_v4l2_private_int_data32(&karg.v4l2_pri_data, up); + break; + case ATOMISP_IOC_ACC_MAP: + case ATOMISP_IOC_ACC_UNMAP: + err = put_atomisp_acc_map32(&karg.acc_map, up); + break; + case ATOMISP_IOC_ACC_S_MAPPED_ARG: + err = put_atomisp_acc_s_mapped_arg32(&karg.acc_map_arg, up); + break; + case ATOMISP_IOC_ACC_LOAD_TO_PIPE: + err = put_atomisp_acc_fw_load_to_pipe32(&karg.acc_fw_to_pipe, + up); + break; + case ATOMISP_IOC_G_METADATA: + err = put_atomisp_metadata_stat32(&karg.md, up); + break; + case ATOMISP_IOC_G_METADATA_BY_TYPE: + err = put_atomisp_metadata_by_type_stat32(&karg.md_with_type, + up); + break; + } + + return err; +} + +long atomisp_compat_ioctl32(struct file *file, + unsigned int cmd, unsigned long arg) +{ + + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + long ret = -ENOIOCTLCMD; + + if (!file->f_op->unlocked_ioctl) + return ret; + + switch (cmd) { + case ATOMISP_IOC_G_XNR: + case ATOMISP_IOC_S_XNR: + case ATOMISP_IOC_G_NR: + case ATOMISP_IOC_S_NR: + case ATOMISP_IOC_G_TNR: + case ATOMISP_IOC_S_TNR: + case ATOMISP_IOC_G_BLACK_LEVEL_COMP: + case ATOMISP_IOC_S_BLACK_LEVEL_COMP: + case ATOMISP_IOC_G_EE: + case ATOMISP_IOC_S_EE: + case ATOMISP_IOC_S_DIS_VECTOR: + case ATOMISP_IOC_G_ISP_PARM: + case ATOMISP_IOC_S_ISP_PARM: + case ATOMISP_IOC_G_ISP_GAMMA: + case ATOMISP_IOC_S_ISP_GAMMA: + case ATOMISP_IOC_ISP_MAKERNOTE: + case ATOMISP_IOC_G_ISP_MACC: + case ATOMISP_IOC_S_ISP_MACC: + case ATOMISP_IOC_G_ISP_BAD_PIXEL_DETECTION: + case ATOMISP_IOC_S_ISP_BAD_PIXEL_DETECTION: + case ATOMISP_IOC_G_ISP_FALSE_COLOR_CORRECTION: + case ATOMISP_IOC_S_ISP_FALSE_COLOR_CORRECTION: + case ATOMISP_IOC_G_ISP_CTC: + case ATOMISP_IOC_S_ISP_CTC: + case ATOMISP_IOC_G_ISP_WHITE_BALANCE: + case ATOMISP_IOC_S_ISP_WHITE_BALANCE: + case ATOMISP_IOC_CAMERA_BRIDGE: + case ATOMISP_IOC_G_SENSOR_MODE_DATA: + case ATOMISP_IOC_S_EXPOSURE: + case ATOMISP_IOC_G_3A_CONFIG: + case ATOMISP_IOC_S_3A_CONFIG: + case ATOMISP_IOC_ACC_UNLOAD: + case ATOMISP_IOC_ACC_START: + case ATOMISP_IOC_ACC_WAIT: + case ATOMISP_IOC_ACC_ABORT: + case ATOMISP_IOC_G_ISP_GAMMA_CORRECTION: + case ATOMISP_IOC_S_ISP_GAMMA_CORRECTION: + case ATOMISP_IOC_S_CONT_CAPTURE_CONFIG: + case ATOMISP_IOC_G_DVS2_BQ_RESOLUTIONS: + case ATOMISP_IOC_EXT_ISP_CTRL: + case ATOMISP_IOC_EXP_ID_UNLOCK: + case ATOMISP_IOC_EXP_ID_CAPTURE: + case ATOMISP_IOC_S_ENABLE_DZ_CAPT_PIPE: + case ATOMISP_IOC_G_FORMATS_CONFIG: + case ATOMISP_IOC_S_FORMATS_CONFIG: + case ATOMISP_IOC_S_EXPOSURE_WINDOW: + case ATOMISP_IOC_S_ACC_STATE: + case ATOMISP_IOC_G_ACC_STATE: + case ATOMISP_IOC_INJECT_A_FAKE_EVENT: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_INFO: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_G_INVALID_FRAME_NUM: + case ATOMISP_IOC_S_ARRAY_RESOLUTION: +#ifdef ISP2401 + case ATOMISP_IOC_S_SENSOR_RUNMODE: + case ATOMISP_IOC_G_UPDATE_EXPOSURE: +#endif + ret = native_ioctl(file, cmd, arg); + break; + + case ATOMISP_IOC_G_HISTOGRAM32: + case ATOMISP_IOC_S_HISTOGRAM32: + case ATOMISP_IOC_G_DIS_STAT32: + case ATOMISP_IOC_S_DIS_COEFS32: + case ATOMISP_IOC_S_DIS_VECTOR32: + case ATOMISP_IOC_G_3A_STAT32: + case ATOMISP_IOC_G_ISP_GDC_TAB32: + case ATOMISP_IOC_S_ISP_GDC_TAB32: + case ATOMISP_IOC_S_ISP_FPN_TABLE32: + case ATOMISP_IOC_G_ISP_OVERLAY32: + case ATOMISP_IOC_S_ISP_OVERLAY32: + case ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP32: + case ATOMISP_IOC_ACC_LOAD32: + case ATOMISP_IOC_ACC_S_ARG32: + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA32: + case ATOMISP_IOC_S_ISP_SHD_TAB32: + case ATOMISP_IOC_ACC_DESTAB32: + case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA32: + case ATOMISP_IOC_ACC_MAP32: + case ATOMISP_IOC_ACC_UNMAP32: + case ATOMISP_IOC_ACC_S_MAPPED_ARG32: + case ATOMISP_IOC_S_PARAMETERS32: + case ATOMISP_IOC_ACC_LOAD_TO_PIPE32: + case ATOMISP_IOC_G_METADATA32: + case ATOMISP_IOC_G_METADATA_BY_TYPE32: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT32: + ret = atomisp_do_compat_ioctl(file, cmd, arg); + break; + + default: + dev_warn(isp->dev, + "%s: unknown ioctl '%c', dir=%d, #%d (0x%08x)\n", + __func__, _IOC_TYPE(cmd), _IOC_DIR(cmd), _IOC_NR(cmd), + cmd); + break; + } + return ret; +} +#endif /* CONFIG_COMPAT */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h new file mode 100644 index 0000000000000..95669eedaad11 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h @@ -0,0 +1,365 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __ATOMISP_COMPAT_IOCTL32_H__ +#define __ATOMISP_COMPAT_IOCTL32_H__ + +#include +#include + +#include "atomisp_compat.h" + +struct atomisp_histogram32 { + unsigned int num_elements; + compat_uptr_t data; +}; + +struct atomisp_dvs2_stat_types32 { + compat_uptr_t odd_real; /** real part of the odd statistics*/ + compat_uptr_t odd_imag; /** imaginary part of the odd statistics*/ + compat_uptr_t even_real;/** real part of the even statistics*/ + compat_uptr_t even_imag;/** imaginary part of the even statistics*/ +}; + +struct atomisp_dvs2_coef_types32 { + compat_uptr_t odd_real; /** real part of the odd coefficients*/ + compat_uptr_t odd_imag; /** imaginary part of the odd coefficients*/ + compat_uptr_t even_real;/** real part of the even coefficients*/ + compat_uptr_t even_imag;/** imaginary part of the even coefficients*/ +}; + +struct atomisp_dvs2_statistics32 { + struct atomisp_dvs_grid_info grid_info; + struct atomisp_dvs2_stat_types32 hor_prod; + struct atomisp_dvs2_stat_types32 ver_prod; +}; + +struct atomisp_dis_statistics32 { + struct atomisp_dvs2_statistics32 dvs2_stat; + uint32_t exp_id; +}; + +struct atomisp_dis_coefficients32 { + struct atomisp_dvs_grid_info grid_info; + struct atomisp_dvs2_coef_types32 hor_coefs; + struct atomisp_dvs2_coef_types32 ver_coefs; +}; + +struct atomisp_3a_statistics32 { + struct atomisp_grid_info grid_info; + compat_uptr_t data; + compat_uptr_t rgby_data; + uint32_t exp_id; + uint32_t isp_config_id; +}; + +struct atomisp_metadata_with_type32 { + /* to specify which type of metadata to get */ + enum atomisp_metadata_type type; + compat_uptr_t data; + uint32_t width; + uint32_t height; + uint32_t stride; /* in bytes */ + uint32_t exp_id; /* exposure ID */ + compat_uptr_t effective_width; +}; + +struct atomisp_metadata32 { + compat_uptr_t data; + uint32_t width; + uint32_t height; + uint32_t stride; + uint32_t exp_id; + compat_uptr_t effective_width; +}; + +struct atomisp_morph_table32 { + unsigned int enabled; + unsigned int height; + unsigned int width; /* number of valid elements per line */ + compat_uptr_t coordinates_x[ATOMISP_MORPH_TABLE_NUM_PLANES]; + compat_uptr_t coordinates_y[ATOMISP_MORPH_TABLE_NUM_PLANES]; +}; + +struct v4l2_framebuffer32 { + __u32 capability; + __u32 flags; + compat_uptr_t base; + struct v4l2_pix_format fmt; +}; + +struct atomisp_overlay32 { + /* the frame containing the overlay data The overlay frame width should + * be the multiples of 2*ISP_VEC_NELEMS. The overlay frame height + * should be the multiples of 2. + */ + compat_uptr_t frame; + /* Y value of overlay background */ + unsigned char bg_y; + /* U value of overlay background */ + char bg_u; + /* V value of overlay background */ + char bg_v; + /* the blending percent of input data for Y subpixels */ + unsigned char blend_input_perc_y; + /* the blending percent of input data for U subpixels */ + unsigned char blend_input_perc_u; + /* the blending percent of input data for V subpixels */ + unsigned char blend_input_perc_v; + /* the blending percent of overlay data for Y subpixels */ + unsigned char blend_overlay_perc_y; + /* the blending percent of overlay data for U subpixels */ + unsigned char blend_overlay_perc_u; + /* the blending percent of overlay data for V subpixels */ + unsigned char blend_overlay_perc_v; + /* the overlay start x pixel position on output frame It should be the + multiples of 2*ISP_VEC_NELEMS. */ + unsigned int overlay_start_x; + /* the overlay start y pixel position on output frame It should be the + multiples of 2. */ + unsigned int overlay_start_y; +}; + +struct atomisp_calibration_group32 { + unsigned int size; + unsigned int type; + compat_uptr_t calb_grp_values; +}; + +struct atomisp_acc_fw_load32 { + unsigned int size; + unsigned int fw_handle; + compat_uptr_t data; +}; + +struct atomisp_acc_fw_arg32 { + unsigned int fw_handle; + unsigned int index; + compat_uptr_t value; + compat_size_t size; +}; + +struct v4l2_private_int_data32 { + __u32 size; + compat_uptr_t data; + __u32 reserved[2]; +}; + +struct atomisp_shading_table32 { + __u32 enable; + __u32 sensor_width; + __u32 sensor_height; + __u32 width; + __u32 height; + __u32 fraction_bits; + + compat_uptr_t data[ATOMISP_NUM_SC_COLORS]; +}; + +struct atomisp_acc_map32 { + __u32 flags; /* Flags, see list below */ + __u32 length; /* Length of data in bytes */ + compat_uptr_t user_ptr; /* Pointer into user space */ + compat_ulong_t css_ptr; /* Pointer into CSS address space */ + __u32 reserved[4]; /* Set to zero */ +}; + +struct atomisp_acc_s_mapped_arg32 { + unsigned int fw_handle; + __u32 memory; /* one of enum atomisp_acc_memory */ + compat_size_t length; + compat_ulong_t css_ptr; +}; + +struct atomisp_parameters32 { + compat_uptr_t wb_config; /* White Balance config */ + compat_uptr_t cc_config; /* Color Correction config */ + compat_uptr_t tnr_config; /* Temporal Noise Reduction */ + compat_uptr_t ecd_config; /* Eigen Color Demosaicing */ + compat_uptr_t ynr_config; /* Y(Luma) Noise Reduction */ + compat_uptr_t fc_config; /* Fringe Control */ + compat_uptr_t formats_config; /* Formats Control */ + compat_uptr_t cnr_config; /* Chroma Noise Reduction */ + compat_uptr_t macc_config; /* MACC */ + compat_uptr_t ctc_config; /* Chroma Tone Control */ + compat_uptr_t aa_config; /* Anti-Aliasing */ + compat_uptr_t baa_config; /* Anti-Aliasing */ + compat_uptr_t ce_config; + compat_uptr_t dvs_6axis_config; + compat_uptr_t ob_config; /* Objective Black config */ + compat_uptr_t dp_config; /* Dead Pixel config */ + compat_uptr_t nr_config; /* Noise Reduction config */ + compat_uptr_t ee_config; /* Edge Enhancement config */ + compat_uptr_t de_config; /* Demosaic config */ + compat_uptr_t gc_config; /* Gamma Correction config */ + compat_uptr_t anr_config; /* Advanced Noise Reduction */ + compat_uptr_t a3a_config; /* 3A Statistics config */ + compat_uptr_t xnr_config; /* eXtra Noise Reduction */ + compat_uptr_t dz_config; /* Digital Zoom */ + compat_uptr_t yuv2rgb_cc_config; /* Color + Correction config */ + compat_uptr_t rgb2yuv_cc_config; /* Color + Correction config */ + compat_uptr_t macc_table; + compat_uptr_t gamma_table; + compat_uptr_t ctc_table; + compat_uptr_t xnr_table; + compat_uptr_t r_gamma_table; + compat_uptr_t g_gamma_table; + compat_uptr_t b_gamma_table; + compat_uptr_t motion_vector; /* For 2-axis DVS */ + compat_uptr_t shading_table; + compat_uptr_t morph_table; + compat_uptr_t dvs_coefs; /* DVS 1.0 coefficients */ + compat_uptr_t dvs2_coefs; /* DVS 2.0 coefficients */ + compat_uptr_t capture_config; + compat_uptr_t anr_thres; + + compat_uptr_t lin_2500_config; /* Skylake: Linearization config */ + compat_uptr_t obgrid_2500_config; /* Skylake: OBGRID config */ + compat_uptr_t bnr_2500_config; /* Skylake: bayer denoise config */ + compat_uptr_t shd_2500_config; /* Skylake: shading config */ + compat_uptr_t dm_2500_config; /* Skylake: demosaic config */ + compat_uptr_t rgbpp_2500_config; /* Skylake: RGBPP config */ + compat_uptr_t dvs_stat_2500_config; /* Skylake: DVS STAT config */ + compat_uptr_t lace_stat_2500_config; /* Skylake: LACE STAT config */ + compat_uptr_t yuvp1_2500_config; /* Skylake: yuvp1 config */ + compat_uptr_t yuvp2_2500_config; /* Skylake: yuvp2 config */ + compat_uptr_t tnr_2500_config; /* Skylake: TNR config */ + compat_uptr_t dpc_2500_config; /* Skylake: DPC config */ + compat_uptr_t awb_2500_config; /* Skylake: auto white balance config */ + compat_uptr_t awb_fr_2500_config; /* Skylake: auto white balance filter response config */ + compat_uptr_t anr_2500_config; /* Skylake: ANR config */ + compat_uptr_t af_2500_config; /* Skylake: auto focus config */ + compat_uptr_t ae_2500_config; /* Skylake: auto exposure config */ + compat_uptr_t bds_2500_config; /* Skylake: bayer downscaler config */ + compat_uptr_t dvs_2500_config; /* Skylake: digital video stabilization config */ + compat_uptr_t res_mgr_2500_config; + + /* + * Output frame pointer the config is to be applied to (optional), + * set to NULL to make this config is applied as global. + */ + compat_uptr_t output_frame; + /* + * Unique ID to track which config was actually applied to a particular + * frame, driver will send this id back with output frame together. + */ + uint32_t isp_config_id; + uint32_t per_frame_setting; +}; + +struct atomisp_acc_fw_load_to_pipe32 { + __u32 flags; /* Flags, see below for valid values */ + unsigned int fw_handle; /* Handle, filled by kernel. */ + __u32 size; /* Firmware binary size */ + compat_uptr_t data; /* Pointer to firmware */ + __u32 type; /* Binary type */ + __u32 reserved[3]; /* Set to zero */ +}; + +struct atomisp_dvs_6axis_config32 { + uint32_t exp_id; + uint32_t width_y; + uint32_t height_y; + uint32_t width_uv; + uint32_t height_uv; + compat_uptr_t xcoords_y; + compat_uptr_t ycoords_y; + compat_uptr_t xcoords_uv; + compat_uptr_t ycoords_uv; +}; + +struct atomisp_sensor_ae_bracketing_lut32 { + compat_uptr_t lut; + unsigned int lut_size; +}; + +#define ATOMISP_IOC_G_HISTOGRAM32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 3, struct atomisp_histogram32) +#define ATOMISP_IOC_S_HISTOGRAM32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 3, struct atomisp_histogram32) + +#define ATOMISP_IOC_G_DIS_STAT32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 6, struct atomisp_dis_statistics32) +#define ATOMISP_IOC_S_DIS_COEFS32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 6, struct atomisp_dis_coefficients32) + +#define ATOMISP_IOC_S_DIS_VECTOR32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 6, struct atomisp_dvs_6axis_config32) + +#define ATOMISP_IOC_G_3A_STAT32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 7, struct atomisp_3a_statistics32) + +#define ATOMISP_IOC_G_ISP_GDC_TAB32 \ + _IOR('v', BASE_VIDIOC_PRIVATE + 10, struct atomisp_morph_table32) +#define ATOMISP_IOC_S_ISP_GDC_TAB32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 10, struct atomisp_morph_table32) + +#define ATOMISP_IOC_S_ISP_FPN_TABLE32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 17, struct v4l2_framebuffer32) + +#define ATOMISP_IOC_G_ISP_OVERLAY32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 18, struct atomisp_overlay32) +#define ATOMISP_IOC_S_ISP_OVERLAY32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 18, struct atomisp_overlay32) + +#define ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 22, struct atomisp_calibration_group32) + +#define ATOMISP_IOC_ACC_LOAD32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 24, struct atomisp_acc_fw_load32) + +#define ATOMISP_IOC_ACC_S_ARG32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 24, struct atomisp_acc_fw_arg32) + +#define ATOMISP_IOC_ACC_DESTAB32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 25, struct atomisp_acc_fw_arg32) + +#define ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 26, struct v4l2_private_int_data32) + +#define ATOMISP_IOC_S_ISP_SHD_TAB32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 27, struct atomisp_shading_table32) + +#define ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 29, struct v4l2_private_int_data32) + +#define ATOMISP_IOC_ACC_MAP32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 30, struct atomisp_acc_map32) + +#define ATOMISP_IOC_ACC_UNMAP32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 30, struct atomisp_acc_map32) + +#define ATOMISP_IOC_ACC_S_MAPPED_ARG32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 30, struct atomisp_acc_s_mapped_arg32) + +#define ATOMISP_IOC_ACC_LOAD_TO_PIPE32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 31, struct atomisp_acc_fw_load_to_pipe32) + +#define ATOMISP_IOC_S_PARAMETERS32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 32, struct atomisp_parameters32) + +#define ATOMISP_IOC_G_METADATA32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 34, struct atomisp_metadata32) + +#define ATOMISP_IOC_G_METADATA_BY_TYPE32 \ + _IOWR('v', BASE_VIDIOC_PRIVATE + 34, struct atomisp_metadata_with_type32) + +#define ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT32 \ + _IOW('v', BASE_VIDIOC_PRIVATE + 43, struct atomisp_sensor_ae_bracketing_lut32) + +#endif /* __ATOMISP_COMPAT_IOCTL32_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c new file mode 100644 index 0000000000000..fa03b78c3580d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c @@ -0,0 +1,442 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include +#include "atomisp_cmd.h" +#include "atomisp_internal.h" +#include "atomisp-regs.h" + +static struct v4l2_mbus_framefmt *__csi2_get_format(struct + atomisp_mipi_csi2_device + *csi2, + struct + v4l2_subdev_pad_config *cfg, + enum + v4l2_subdev_format_whence + which, unsigned int pad) +{ + if (which == V4L2_SUBDEV_FORMAT_TRY) + return v4l2_subdev_get_try_format(&csi2->subdev, cfg, pad); + else + return &csi2->formats[pad]; +} + +/* + * csi2_enum_mbus_code - Handle pixel format enumeration + * @sd : pointer to v4l2 subdev structure + * @fh : V4L2 subdev file handle + * @code : pointer to v4l2_subdev_pad_mbus_code_enum structure + * return -EINVAL or zero on success +*/ +static int csi2_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + const struct atomisp_in_fmt_conv *ic = atomisp_in_fmt_conv; + unsigned int i = 0; + + while (ic->code) { + if (i == code->index) { + code->code = ic->code; + return 0; + } + i++, ic++; + } + + return -EINVAL; +} + +/* + * csi2_get_format - Handle get format by pads subdev method + * @sd : pointer to v4l2 subdev structure + * @fh : V4L2 subdev file handle + * @pad: pad num + * @fmt: pointer to v4l2 format structure + * return -EINVAL or zero on sucess +*/ +static int csi2_get_format(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *format; + + format = __csi2_get_format(csi2, cfg, fmt->which, fmt->pad); + + fmt->format = *format; + + return 0; +} + +int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + unsigned int which, uint16_t pad, + struct v4l2_mbus_framefmt *ffmt) +{ + struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *actual_ffmt = +#ifndef ISP2401 + __csi2_get_format(csi2, cfg, which, pad); +#else + __csi2_get_format(csi2, cfg, which, pad); +#endif + + if (pad == CSI2_PAD_SINK) { + const struct atomisp_in_fmt_conv *ic; + struct v4l2_mbus_framefmt tmp_ffmt; + + ic = atomisp_find_in_fmt_conv(ffmt->code); + if (ic) + actual_ffmt->code = ic->code; + else + actual_ffmt->code = atomisp_in_fmt_conv[0].code; + + actual_ffmt->width = clamp_t( + u32, ffmt->width, ATOM_ISP_MIN_WIDTH, + ATOM_ISP_MAX_WIDTH); + actual_ffmt->height = clamp_t( + u32, ffmt->height, ATOM_ISP_MIN_HEIGHT, + ATOM_ISP_MAX_HEIGHT); + + tmp_ffmt = *ffmt = *actual_ffmt; + + return atomisp_csi2_set_ffmt(sd, cfg, which, CSI2_PAD_SOURCE, + &tmp_ffmt); + } + + /* FIXME: DPCM decompression */ + *actual_ffmt = *ffmt = +#ifndef ISP2401 + *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); +#else + *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); +#endif + + return 0; +} + +/* + * csi2_set_format - Handle set format by pads subdev method + * @sd : pointer to v4l2 subdev structure + * @fh : V4L2 subdev file handle + * @pad: pad num + * @fmt: pointer to v4l2 format structure + * return -EINVAL or zero on success +*/ +static int csi2_set_format(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + return atomisp_csi2_set_ffmt(sd, cfg, fmt->which, fmt->pad, + &fmt->format); +} + +/* + * csi2_set_stream - Enable/Disable streaming on the CSI2 module + * @sd: ISP CSI2 V4L2 subdevice + * @enable: Enable/disable stream (1/0) + * + * Return 0 on success or a negative error code otherwise. +*/ +static int csi2_set_stream(struct v4l2_subdev *sd, int enable) +{ + return 0; +} + +/* subdev core operations */ +static const struct v4l2_subdev_core_ops csi2_core_ops = { +}; + +/* subdev video operations */ +static const struct v4l2_subdev_video_ops csi2_video_ops = { + .s_stream = csi2_set_stream, +}; + +/* subdev pad operations */ +static const struct v4l2_subdev_pad_ops csi2_pad_ops = { + .enum_mbus_code = csi2_enum_mbus_code, + .get_fmt = csi2_get_format, + .set_fmt = csi2_set_format, + .link_validate = v4l2_subdev_link_validate_default, +}; + +/* subdev operations */ +static const struct v4l2_subdev_ops csi2_ops = { + .core = &csi2_core_ops, + .video = &csi2_video_ops, + .pad = &csi2_pad_ops, +}; + +#ifndef ISP2401 + +#endif +/* + * csi2_link_setup - Setup CSI2 connections. + * @entity : Pointer to media entity structure + * @local : Pointer to local pad array + * @remote : Pointer to remote pad array + * @flags : Link flags + * return -EINVAL or zero on success +*/ +static int csi2_link_setup(struct media_entity *entity, + const struct media_pad *local, + const struct media_pad *remote, u32 flags) +{ + struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); + struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd); + u32 result = local->index | is_media_entity_v4l2_subdev(remote->entity); + + switch (result) { + case CSI2_PAD_SOURCE | MEDIA_ENT_F_OLD_BASE: + /* not supported yet */ + return -EINVAL; + + case CSI2_PAD_SOURCE | MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN: + if (flags & MEDIA_LNK_FL_ENABLED) { + if (csi2->output & ~CSI2_OUTPUT_ISP_SUBDEV) + return -EBUSY; + csi2->output |= CSI2_OUTPUT_ISP_SUBDEV; + } else { + csi2->output &= ~CSI2_OUTPUT_ISP_SUBDEV; + } + break; + + default: + /* Link from camera to CSI2 is fixed... */ + return -EINVAL; + } + return 0; +} + +/* media operations */ +static const struct media_entity_operations csi2_media_ops = { + .link_setup = csi2_link_setup, + .link_validate = v4l2_subdev_link_validate, +}; + +/* +* ispcsi2_init_entities - Initialize subdev and media entity. +* @csi2: Pointer to ispcsi2 structure. +* return -ENOMEM or zero on success +*/ +static int mipi_csi2_init_entities(struct atomisp_mipi_csi2_device *csi2, + int port) +{ + struct v4l2_subdev *sd = &csi2->subdev; + struct media_pad *pads = csi2->pads; + struct media_entity *me = &sd->entity; + int ret; + + v4l2_subdev_init(sd, &csi2_ops); + snprintf(sd->name, sizeof(sd->name), "ATOM ISP CSI2-port%d", port); + + v4l2_set_subdevdata(sd, csi2); + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + + pads[CSI2_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; + pads[CSI2_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + + me->ops = &csi2_media_ops; + me->function = MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN; + ret = media_entity_pads_init(me, CSI2_PADS_NUM, pads); + if (ret < 0) + return ret; + + csi2->formats[CSI2_PAD_SINK].code = + csi2->formats[CSI2_PAD_SOURCE].code = + atomisp_in_fmt_conv[0].code; + + return 0; +} + +void +atomisp_mipi_csi2_unregister_entities(struct atomisp_mipi_csi2_device *csi2) +{ + media_entity_cleanup(&csi2->subdev.entity); + v4l2_device_unregister_subdev(&csi2->subdev); +} + +int atomisp_mipi_csi2_register_entities(struct atomisp_mipi_csi2_device *csi2, + struct v4l2_device *vdev) +{ + int ret; + + /* Register the subdev and video nodes. */ + ret = v4l2_device_register_subdev(vdev, &csi2->subdev); + if (ret < 0) + goto error; + + return 0; + +error: + atomisp_mipi_csi2_unregister_entities(csi2); + return ret; +} + +static const int LIMIT_SHIFT = 6; /* Limit numeric range into 31 bits */ + +static int +atomisp_csi2_configure_calc(const short int coeffs[2], int mipi_freq, int def) +{ + /* Delay counter accuracy, 1/0.0625 for ANN/CHT, 1/0.125 for BXT */ + static const int accinv = 16; /* 1 / COUNT_ACC */ + int r; + + if (mipi_freq >> LIMIT_SHIFT <= 0) + return def; + + r = accinv * coeffs[1] * (500000000 >> LIMIT_SHIFT); + r /= mipi_freq >> LIMIT_SHIFT; + r += accinv * coeffs[0]; + + return r; +} + +static void atomisp_csi2_configure_isp2401(struct atomisp_sub_device *asd) +{ + /* + * The ISP2401 new input system CSI2+ receiver has several + * parameters affecting the receiver timings. These depend + * on the MIPI bus frequency F in Hz (sensor transmitter rate) + * as follows: + * register value = (A/1e9 + B * UI) / COUNT_ACC + * where + * UI = 1 / (2 * F) in seconds + * COUNT_ACC = counter accuracy in seconds + * For ANN and CHV, COUNT_ACC = 0.0625 ns + * For BXT, COUNT_ACC = 0.125 ns + * A and B are coefficients from the table below, + * depending whether the register minimum or maximum value is + * calculated. + * Minimum Maximum + * Clock lane A B A B + * reg_rx_csi_dly_cnt_termen_clane 0 0 38 0 + * reg_rx_csi_dly_cnt_settle_clane 95 -8 300 -16 + * Data lanes + * reg_rx_csi_dly_cnt_termen_dlane0 0 0 35 4 + * reg_rx_csi_dly_cnt_settle_dlane0 85 -2 145 -6 + * reg_rx_csi_dly_cnt_termen_dlane1 0 0 35 4 + * reg_rx_csi_dly_cnt_settle_dlane1 85 -2 145 -6 + * reg_rx_csi_dly_cnt_termen_dlane2 0 0 35 4 + * reg_rx_csi_dly_cnt_settle_dlane2 85 -2 145 -6 + * reg_rx_csi_dly_cnt_termen_dlane3 0 0 35 4 + * reg_rx_csi_dly_cnt_settle_dlane3 85 -2 145 -6 + * + * We use the minimum values in the calculations below. + */ + static const short int coeff_clk_termen[] = { 0, 0 }; + static const short int coeff_clk_settle[] = { 95, -8 }; + static const short int coeff_dat_termen[] = { 0, 0 }; + static const short int coeff_dat_settle[] = { 85, -2 }; + static const int TERMEN_DEFAULT = 0 * 0; + static const int SETTLE_DEFAULT = 0x480; + static const hrt_address csi2_port_base[] = { + [ATOMISP_CAMERA_PORT_PRIMARY] = CSI2_PORT_A_BASE, + [ATOMISP_CAMERA_PORT_SECONDARY] = CSI2_PORT_B_BASE, + [ATOMISP_CAMERA_PORT_TERTIARY] = CSI2_PORT_C_BASE, + }; + /* Number of lanes on each port, excluding clock lane */ + static const unsigned char csi2_port_lanes[] = { + [ATOMISP_CAMERA_PORT_PRIMARY] = 4, + [ATOMISP_CAMERA_PORT_SECONDARY] = 2, + [ATOMISP_CAMERA_PORT_TERTIARY] = 2, + }; + static const hrt_address csi2_lane_base[] = { + CSI2_LANE_CL_BASE, + CSI2_LANE_D0_BASE, + CSI2_LANE_D1_BASE, + CSI2_LANE_D2_BASE, + CSI2_LANE_D3_BASE, + }; + + int clk_termen; + int clk_settle; + int dat_termen; + int dat_settle; + + struct v4l2_control ctrl; + struct atomisp_device *isp = asd->isp; + struct camera_mipi_info *mipi_info; + int mipi_freq = 0; + enum atomisp_camera_port port; + + int n; + + mipi_info = atomisp_to_sensor_mipi_info( + isp->inputs[asd->input_curr].camera); + port = mipi_info->port; + + ctrl.id = V4L2_CID_LINK_FREQ; + if (v4l2_g_ctrl + (isp->inputs[asd->input_curr].camera->ctrl_handler, &ctrl) == 0) + mipi_freq = ctrl.value; + + clk_termen = atomisp_csi2_configure_calc(coeff_clk_termen, + mipi_freq, TERMEN_DEFAULT); + clk_settle = atomisp_csi2_configure_calc(coeff_clk_settle, + mipi_freq, SETTLE_DEFAULT); + dat_termen = atomisp_csi2_configure_calc(coeff_dat_termen, + mipi_freq, TERMEN_DEFAULT); + dat_settle = atomisp_csi2_configure_calc(coeff_dat_settle, + mipi_freq, SETTLE_DEFAULT); + for (n = 0; n < csi2_port_lanes[port] + 1; n++) { + hrt_address base = csi2_port_base[port] + csi2_lane_base[n]; + atomisp_store_uint32(base + CSI2_REG_RX_CSI_DLY_CNT_TERMEN, + n == 0 ? clk_termen : dat_termen); + atomisp_store_uint32(base + CSI2_REG_RX_CSI_DLY_CNT_SETTLE, + n == 0 ? clk_settle : dat_settle); + } +} + +void atomisp_csi2_configure(struct atomisp_sub_device *asd) +{ + if (IS_HWREVISION(asd->isp, ATOMISP_HW_REVISION_ISP2401)) + atomisp_csi2_configure_isp2401(asd); +} + +/* + * atomisp_mipi_csi2_cleanup - Routine for module driver cleanup +*/ +void atomisp_mipi_csi2_cleanup(struct atomisp_device *isp) +{ +} + +#ifndef ISP2401 + +#endif +int atomisp_mipi_csi2_init(struct atomisp_device *isp) +{ + struct atomisp_mipi_csi2_device *csi2_port; + unsigned int i; + int ret; + + for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) { + csi2_port = &isp->csi2_port[i]; + csi2_port->isp = isp; + ret = mipi_csi2_init_entities(csi2_port, i); + if (ret < 0) + goto fail; + } + + return 0; + +fail: + atomisp_mipi_csi2_cleanup(isp); + return ret; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h new file mode 100644 index 0000000000000..0191d28a55bca --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h @@ -0,0 +1,57 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __ATOMISP_CSI2_H__ +#define __ATOMISP_CSI2_H__ + +#include +#include + +#define CSI2_PAD_SINK 0 +#define CSI2_PAD_SOURCE 1 +#define CSI2_PADS_NUM 2 + +#define CSI2_OUTPUT_ISP_SUBDEV (1 << 0) +#define CSI2_OUTPUT_MEMORY (1 << 1) + +struct atomisp_device; +struct v4l2_device; +struct atomisp_sub_device; + +struct atomisp_mipi_csi2_device { + struct v4l2_subdev subdev; + struct media_pad pads[CSI2_PADS_NUM]; + struct v4l2_mbus_framefmt formats[CSI2_PADS_NUM]; + + struct v4l2_ctrl_handler ctrls; + struct atomisp_device *isp; + + u32 output; /* output direction */ +}; + +int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, + unsigned int which, uint16_t pad, + struct v4l2_mbus_framefmt *ffmt); +int atomisp_mipi_csi2_init(struct atomisp_device *isp); +void atomisp_mipi_csi2_cleanup(struct atomisp_device *isp); +void atomisp_mipi_csi2_unregister_entities( + struct atomisp_mipi_csi2_device *csi2); +int atomisp_mipi_csi2_register_entities(struct atomisp_mipi_csi2_device *csi2, + struct v4l2_device *vdev); + +void atomisp_csi2_configure(struct atomisp_sub_device *asd); + +#endif /* __ATOMISP_CSI2_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h new file mode 100644 index 0000000000000..54e28605b5de7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h @@ -0,0 +1,408 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __ATOMISP_DFS_TABLES_H__ +#define __ATOMISP_DFS_TABLES_H__ + +#include + +struct atomisp_freq_scaling_rule { + unsigned int width; + unsigned int height; + unsigned short fps; + unsigned int isp_freq; + unsigned int run_mode; +}; + + +struct atomisp_dfs_config { + unsigned int lowest_freq; + unsigned int max_freq_at_vmin; + unsigned int highest_freq; + const struct atomisp_freq_scaling_rule *dfs_table; + unsigned int dfs_table_size; +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_457MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +/* Merrifield and Moorefield DFS rules */ +static const struct atomisp_dfs_config dfs_config_merr = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_400MHZ, + .highest_freq = ISP_FREQ_457MHZ, + .dfs_table = dfs_rules_merr, + .dfs_table_size = ARRAY_SIZE(dfs_rules_merr), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_merr_1179 = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_400MHZ, + .highest_freq = ISP_FREQ_400MHZ, + .dfs_table = dfs_rules_merr_1179, + .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { + { + .width = 1920, + .height = 1080, + .fps = 30, + .isp_freq = ISP_FREQ_266MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = 1080, + .height = 1920, + .fps = 30, +#ifndef ISP2401 + .isp_freq = ISP_FREQ_266MHZ, +#else + .isp_freq = ISP_FREQ_400MHZ, +#endif + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = 1920, + .height = 1080, + .fps = 45, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = 1080, + .height = 1920, + .fps = 45, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = 60, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_200MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_200MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_merr_117a = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_200MHZ, + .highest_freq = ISP_FREQ_400MHZ, + .dfs_table = dfs_rules_merr_117a, + .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_byt = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_400MHZ, + .highest_freq = ISP_FREQ_400MHZ, + .dfs_table = dfs_rules_byt, + .dfs_table_size = ARRAY_SIZE(dfs_rules_byt), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_byt_cr[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_byt_cr = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_320MHZ, + .highest_freq = ISP_FREQ_320MHZ, + .dfs_table = dfs_rules_byt_cr, + .dfs_table_size = ARRAY_SIZE(dfs_rules_byt_cr), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = 1280, + .height = 720, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_cht = { + .lowest_freq = ISP_FREQ_100MHZ, + .max_freq_at_vmin = ISP_FREQ_356MHZ, + .highest_freq = ISP_FREQ_356MHZ, + .dfs_table = dfs_rules_cht, + .dfs_table_size = ARRAY_SIZE(dfs_rules_cht), +}; + +static const struct atomisp_dfs_config dfs_config_cht_soc = { + .lowest_freq = ISP_FREQ_100MHZ, + .max_freq_at_vmin = ISP_FREQ_356MHZ, + .highest_freq = ISP_FREQ_356MHZ, + .dfs_table = dfs_rules_cht_soc, + .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc), +}; + +#endif /* __ATOMISP_DFS_TABLES_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c new file mode 100644 index 0000000000000..a815c768bda94 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c @@ -0,0 +1,205 @@ +/* + * Support for atomisp driver sysfs interface + * + * Copyright (c) 2014 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include +#include + +#include "atomisp_compat.h" +#include "atomisp_internal.h" +#include "atomisp_ioctl.h" +#include "atomisp_drvfs.h" +#include "hmm/hmm.h" + +/* + * _iunit_debug: + * dbglvl: iunit css driver trace level + * dbgopt: iunit debug option: + * bit 0: binary list + * bit 1: running binary + * bit 2: memory statistic +*/ +struct _iunit_debug { + struct device_driver *drv; + struct atomisp_device *isp; + unsigned int dbglvl; + unsigned int dbgfun; + unsigned int dbgopt; +}; + +#define OPTION_BIN_LIST (1<<0) +#define OPTION_BIN_RUN (1<<1) +#define OPTION_MEM_STAT (1<<2) +#define OPTION_VALID (OPTION_BIN_LIST \ + | OPTION_BIN_RUN \ + | OPTION_MEM_STAT) + +static struct _iunit_debug iunit_debug = { + .dbglvl = 0, + .dbgopt = OPTION_BIN_LIST, +}; + +static inline int iunit_dump_dbgopt(struct atomisp_device *isp, + unsigned int opt) +{ + int ret = 0; + + if (opt & OPTION_VALID) { + if (opt & OPTION_BIN_LIST) { + ret = atomisp_css_dump_blob_infor(); + if (ret) { + dev_err(atomisp_dev, "%s dump blob infor err[ret:%d]\n", + __func__, ret); + goto opt_err; + } + } + + if (opt & OPTION_BIN_RUN) { + if (atomisp_streaming_count(isp)) { + atomisp_css_dump_sp_raw_copy_linecount(true); + atomisp_css_debug_dump_isp_binary(); + } else { + ret = -EPERM; + dev_err(atomisp_dev, "%s dump running bin err[ret:%d]\n", + __func__, ret); + goto opt_err; + } + } + + if (opt & OPTION_MEM_STAT) + hmm_show_mem_stat(__func__, __LINE__); + } else { + ret = -EINVAL; + dev_err(atomisp_dev, "%s dump nothing[ret=%d]\n", __func__, + ret); + } + +opt_err: + return ret; +} + +static ssize_t iunit_dbglvl_show(struct device_driver *drv, char *buf) +{ + iunit_debug.dbglvl = atomisp_css_debug_get_dtrace_level(); + return sprintf(buf, "dtrace level:%u\n", iunit_debug.dbglvl); +} + +static ssize_t iunit_dbglvl_store(struct device_driver *drv, const char *buf, + size_t size) +{ + if (kstrtouint(buf, 10, &iunit_debug.dbglvl) + || iunit_debug.dbglvl < 1 + || iunit_debug.dbglvl > 9) { + return -ERANGE; + } + atomisp_css_debug_set_dtrace_level(iunit_debug.dbglvl); + + return size; +} + +static ssize_t iunit_dbgfun_show(struct device_driver *drv, char *buf) +{ + iunit_debug.dbgfun = atomisp_get_css_dbgfunc(); + return sprintf(buf, "dbgfun opt:%u\n", iunit_debug.dbgfun); +} + +static ssize_t iunit_dbgfun_store(struct device_driver *drv, const char *buf, + size_t size) +{ + unsigned int opt; + int ret; + + ret = kstrtouint(buf, 10, &opt); + if (ret) + return ret; + + ret = atomisp_set_css_dbgfunc(iunit_debug.isp, opt); + if (ret) + return ret; + + iunit_debug.dbgfun = opt; + + return size; +} + +static ssize_t iunit_dbgopt_show(struct device_driver *drv, char *buf) +{ + return sprintf(buf, "option:0x%x\n", iunit_debug.dbgopt); +} + +static ssize_t iunit_dbgopt_store(struct device_driver *drv, const char *buf, + size_t size) +{ + unsigned int opt; + int ret; + + ret = kstrtouint(buf, 10, &opt); + if (ret) + return ret; + + iunit_debug.dbgopt = opt; + ret = iunit_dump_dbgopt(iunit_debug.isp, iunit_debug.dbgopt); + if (ret) + return ret; + + return size; +} + +static const struct driver_attribute iunit_drvfs_attrs[] = { + __ATTR(dbglvl, 0644, iunit_dbglvl_show, iunit_dbglvl_store), + __ATTR(dbgfun, 0644, iunit_dbgfun_show, iunit_dbgfun_store), + __ATTR(dbgopt, 0644, iunit_dbgopt_show, iunit_dbgopt_store), +}; + +static int iunit_drvfs_create_files(struct device_driver *drv) +{ + int i, ret = 0; + + for (i = 0; i < ARRAY_SIZE(iunit_drvfs_attrs); i++) + ret |= driver_create_file(drv, &iunit_drvfs_attrs[i]); + + return ret; +} + +static void iunit_drvfs_remove_files(struct device_driver *drv) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(iunit_drvfs_attrs); i++) + driver_remove_file(drv, &iunit_drvfs_attrs[i]); +} + +int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp) +{ + int ret; + + iunit_debug.isp = isp; + iunit_debug.drv = drv; + + ret = iunit_drvfs_create_files(iunit_debug.drv); + if (ret) { + dev_err(atomisp_dev, "drvfs_create_files error: %d\n", ret); + iunit_drvfs_remove_files(iunit_debug.drv); + } + + return ret; +} + +void atomisp_drvfs_exit(void) +{ + iunit_drvfs_remove_files(iunit_debug.drv); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.h new file mode 100644 index 0000000000000..7c99240d107a3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.h @@ -0,0 +1,24 @@ +/* + * Support for atomisp driver sysfs interface. + * + * Copyright (c) 2014 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_DRVFS_H__ +#define __ATOMISP_DRVFS_H__ + +int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp); +void atomisp_drvfs_exit(void); + +#endif /* __ATOMISP_DRVFS_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c new file mode 100644 index 0000000000000..c6d96987561db --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c @@ -0,0 +1,225 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include + +#include +#include + +#include "ia_css.h" + +#include "atomisp_cmd.h" +#include "atomisp_common.h" +#include "atomisp_file.h" +#include "atomisp_internal.h" +#include "atomisp_ioctl.h" + +static void file_work(struct work_struct *work) +{ + struct atomisp_file_device *file_dev = + container_of(work, struct atomisp_file_device, work); + struct atomisp_device *isp = file_dev->isp; + /* only support file injection on subdev0 */ + struct atomisp_sub_device *asd = &isp->asd[0]; + struct atomisp_video_pipe *out_pipe = &asd->video_in; + unsigned short *buf = videobuf_to_vmalloc(out_pipe->outq.bufs[0]); + struct v4l2_mbus_framefmt isp_sink_fmt; + + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + return; + + dev_dbg(isp->dev, ">%s: ready to start streaming\n", __func__); + isp_sink_fmt = *atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); + + while (!atomisp_css_isp_has_started()) + usleep_range(1000, 1500); + + atomisp_css_send_input_frame(asd, buf, isp_sink_fmt.width, + isp_sink_fmt.height); + dev_dbg(isp->dev, "<%s: streaming done\n", __func__); +} + +static int file_input_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct atomisp_file_device *file_dev = v4l2_get_subdevdata(sd); + struct atomisp_device *isp = file_dev->isp; + /* only support file injection on subdev0 */ + struct atomisp_sub_device *asd = &isp->asd[0]; + + dev_dbg(isp->dev, "%s: enable %d\n", __func__, enable); + if (enable) { + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + return 0; + + queue_work(file_dev->work_queue, &file_dev->work); + return 0; + } + cancel_work_sync(&file_dev->work); + return 0; +} + +static int file_input_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct atomisp_file_device *file_dev = v4l2_get_subdevdata(sd); + struct atomisp_device *isp = file_dev->isp; + /* only support file injection on subdev0 */ + struct atomisp_sub_device *asd = &isp->asd[0]; + struct v4l2_mbus_framefmt *isp_sink_fmt; + if (format->pad) + return -EINVAL; + isp_sink_fmt = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); + + fmt->width = isp_sink_fmt->width; + fmt->height = isp_sink_fmt->height; + fmt->code = isp_sink_fmt->code; + + return 0; +} + +static int file_input_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + if (format->pad) + return -EINVAL; + file_input_get_fmt(sd, cfg, format); + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + cfg->try_fmt = *fmt; + return 0; +} + +static int file_input_log_status(struct v4l2_subdev *sd) +{ + /*to fake*/ + return 0; +} + +static int file_input_s_power(struct v4l2_subdev *sd, int on) +{ + /* to fake */ + return 0; +} + +static int file_input_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + /*to fake*/ + return 0; +} + +static int file_input_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + /*to fake*/ + return 0; +} + +static int file_input_enum_frame_ival(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_interval_enum + *fie) +{ + /*to fake*/ + return 0; +} + +static const struct v4l2_subdev_video_ops file_input_video_ops = { + .s_stream = file_input_s_stream, +}; + +static const struct v4l2_subdev_core_ops file_input_core_ops = { + .log_status = file_input_log_status, + .s_power = file_input_s_power, +}; + +static const struct v4l2_subdev_pad_ops file_input_pad_ops = { + .enum_mbus_code = file_input_enum_mbus_code, + .enum_frame_size = file_input_enum_frame_size, + .enum_frame_interval = file_input_enum_frame_ival, + .get_fmt = file_input_get_fmt, + .set_fmt = file_input_set_fmt, +}; + +static const struct v4l2_subdev_ops file_input_ops = { + .core = &file_input_core_ops, + .video = &file_input_video_ops, + .pad = &file_input_pad_ops, +}; + +void +atomisp_file_input_unregister_entities(struct atomisp_file_device *file_dev) +{ + media_entity_cleanup(&file_dev->sd.entity); + v4l2_device_unregister_subdev(&file_dev->sd); +} + +int atomisp_file_input_register_entities(struct atomisp_file_device *file_dev, + struct v4l2_device *vdev) +{ + /* Register the subdev and video nodes. */ + return v4l2_device_register_subdev(vdev, &file_dev->sd); +} + +void atomisp_file_input_cleanup(struct atomisp_device *isp) +{ + struct atomisp_file_device *file_dev = &isp->file_dev; + + if (file_dev->work_queue) { + destroy_workqueue(file_dev->work_queue); + file_dev->work_queue = NULL; + } +} + +int atomisp_file_input_init(struct atomisp_device *isp) +{ + struct atomisp_file_device *file_dev = &isp->file_dev; + struct v4l2_subdev *sd = &file_dev->sd; + struct media_pad *pads = file_dev->pads; + struct media_entity *me = &sd->entity; + + file_dev->isp = isp; + file_dev->work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1); + if (file_dev->work_queue == NULL) { + dev_err(isp->dev, "Failed to initialize file inject workq\n"); + return -ENOMEM; + } + + INIT_WORK(&file_dev->work, file_work); + + v4l2_subdev_init(sd, &file_input_ops); + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + strcpy(sd->name, "file_input_subdev"); + v4l2_set_subdevdata(sd, file_dev); + + pads[0].flags = MEDIA_PAD_FL_SINK; + me->function = MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN; + + return media_entity_pads_init(me, 1, pads); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h new file mode 100644 index 0000000000000..61fdeb5ee60a2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h @@ -0,0 +1,43 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_FILE_H__ +#define __ATOMISP_FILE_H__ + +#include +#include + +struct atomisp_device; + +struct atomisp_file_device { + struct v4l2_subdev sd; + struct atomisp_device *isp; + struct media_pad pads[1]; + + struct workqueue_struct *work_queue; + struct work_struct work; +}; + +void atomisp_file_input_cleanup(struct atomisp_device *isp); +int atomisp_file_input_init(struct atomisp_device *isp); +void atomisp_file_input_unregister_entities( + struct atomisp_file_device *file_dev); +int atomisp_file_input_register_entities(struct atomisp_file_device *file_dev, + struct v4l2_device *vdev); +#endif /* __ATOMISP_FILE_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c new file mode 100644 index 0000000000000..693b905547e43 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c @@ -0,0 +1,1302 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include + +#include +#include + +#include "atomisp_cmd.h" +#include "atomisp_common.h" +#include "atomisp_fops.h" +#include "atomisp_internal.h" +#include "atomisp_ioctl.h" +#include "atomisp_compat.h" +#include "atomisp_subdev.h" +#include "atomisp_v4l2.h" +#include "atomisp-regs.h" +#include "hmm/hmm.h" + +#include "hrt/hive_isp_css_mm_hrt.h" + +#include "type_support.h" +#include "device_access/device_access.h" +#include "memory_access/memory_access.h" + +#include "atomisp_acc.h" + +#define ISP_LEFT_PAD 128 /* equal to 2*NWAY */ + +/* + * input image data, and current frame resolution for test + */ +#define ISP_PARAM_MMAP_OFFSET 0xfffff000 + +#define MAGIC_CHECK(is, should) \ + do { \ + if (unlikely((is) != (should))) { \ + pr_err("magic mismatch: %x (expected %x)\n", \ + is, should); \ + BUG(); \ + } \ + } while (0) + +/* + * Videobuf ops + */ +static int atomisp_buf_setup(struct videobuf_queue *vq, unsigned int *count, + unsigned int *size) +{ + struct atomisp_video_pipe *pipe = vq->priv_data; + + *size = pipe->pix.sizeimage; + + return 0; +} + +static int atomisp_buf_prepare(struct videobuf_queue *vq, + struct videobuf_buffer *vb, + enum v4l2_field field) +{ + struct atomisp_video_pipe *pipe = vq->priv_data; + + vb->size = pipe->pix.sizeimage; + vb->width = pipe->pix.width; + vb->height = pipe->pix.height; + vb->field = field; + vb->state = VIDEOBUF_PREPARED; + + return 0; +} + +static int atomisp_q_one_metadata_buffer(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct atomisp_metadata_buf *metadata_buf; + enum atomisp_metadata_type md_type = + atomisp_get_metadata_type(asd, css_pipe_id); + struct list_head *metadata_list; + + if (asd->metadata_bufs_in_css[stream_id][css_pipe_id] >= + ATOMISP_CSS_Q_DEPTH) + return 0; /* we have reached CSS queue depth */ + + if (!list_empty(&asd->metadata[md_type])) { + metadata_list = &asd->metadata[md_type]; + } else if (!list_empty(&asd->metadata_ready[md_type])) { + metadata_list = &asd->metadata_ready[md_type]; + } else { + dev_warn(asd->isp->dev, "%s: No metadata buffers available for type %d!\n", + __func__, md_type); + return -EINVAL; + } + + metadata_buf = list_entry(metadata_list->next, + struct atomisp_metadata_buf, list); + list_del_init(&metadata_buf->list); + + if (atomisp_q_metadata_buffer_to_css(asd, metadata_buf, + stream_id, css_pipe_id)) { + list_add(&metadata_buf->list, metadata_list); + return -EINVAL; + } else { + list_add_tail(&metadata_buf->list, + &asd->metadata_in_css[md_type]); + } + asd->metadata_bufs_in_css[stream_id][css_pipe_id]++; + + return 0; +} + +static int atomisp_q_one_s3a_buffer(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct atomisp_s3a_buf *s3a_buf; + struct list_head *s3a_list; + unsigned int exp_id; + + if (asd->s3a_bufs_in_css[css_pipe_id] >= ATOMISP_CSS_Q_DEPTH) + return 0; /* we have reached CSS queue depth */ + + if (!list_empty(&asd->s3a_stats)) { + s3a_list = &asd->s3a_stats; + } else if (!list_empty(&asd->s3a_stats_ready)) { + s3a_list = &asd->s3a_stats_ready; + } else { + dev_warn(asd->isp->dev, "%s: No s3a buffers available!\n", + __func__); + return -EINVAL; + } + + s3a_buf = list_entry(s3a_list->next, struct atomisp_s3a_buf, list); + list_del_init(&s3a_buf->list); + exp_id = s3a_buf->s3a_data->exp_id; + + hmm_flush_vmap(s3a_buf->s3a_data->data_ptr); + if (atomisp_q_s3a_buffer_to_css(asd, s3a_buf, + stream_id, css_pipe_id)) { + /* got from head, so return back to the head */ + list_add(&s3a_buf->list, s3a_list); + return -EINVAL; + } else { + list_add_tail(&s3a_buf->list, &asd->s3a_stats_in_css); + if (s3a_list == &asd->s3a_stats_ready) + dev_warn(asd->isp->dev, "%s: drop one s3a stat which has exp_id %d!\n", + __func__, exp_id); + } + + asd->s3a_bufs_in_css[css_pipe_id]++; + return 0; +} + +static int atomisp_q_one_dis_buffer(struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct atomisp_dis_buf *dis_buf; + unsigned long irqflags; + + if (asd->dis_bufs_in_css >= ATOMISP_CSS_Q_DEPTH) + return 0; /* we have reached CSS queue depth */ + + spin_lock_irqsave(&asd->dis_stats_lock, irqflags); + if (list_empty(&asd->dis_stats)) { + spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags); + dev_warn(asd->isp->dev, "%s: No dis buffers available!\n", + __func__); + return -EINVAL; + } + + dis_buf = list_entry(asd->dis_stats.prev, + struct atomisp_dis_buf, list); + list_del_init(&dis_buf->list); + spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags); + + hmm_flush_vmap(dis_buf->dis_data->data_ptr); + if (atomisp_q_dis_buffer_to_css(asd, dis_buf, + stream_id, css_pipe_id)) { + spin_lock_irqsave(&asd->dis_stats_lock, irqflags); + /* got from tail, so return back to the tail */ + list_add_tail(&dis_buf->list, &asd->dis_stats); + spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags); + return -EINVAL; + } else { + spin_lock_irqsave(&asd->dis_stats_lock, irqflags); + list_add_tail(&dis_buf->list, &asd->dis_stats_in_css); + spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags); + } + + asd->dis_bufs_in_css++; + + return 0; +} + +int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd, + struct atomisp_video_pipe *pipe, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id) +{ + struct videobuf_vmalloc_memory *vm_mem; + struct atomisp_css_params_with_list *param; + struct atomisp_css_dvs_grid_info *dvs_grid = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + unsigned long irqflags; + int err = 0; + + while (pipe->buffers_in_css < ATOMISP_CSS_Q_DEPTH) { + struct videobuf_buffer *vb; + + spin_lock_irqsave(&pipe->irq_lock, irqflags); + if (list_empty(&pipe->activeq)) { + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + return -EINVAL; + } + vb = list_entry(pipe->activeq.next, + struct videobuf_buffer, queue); + list_del_init(&vb->queue); + vb->state = VIDEOBUF_ACTIVE; + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + + /* + * If there is a per_frame setting to apply on the buffer, + * do it before buffer en-queueing. + */ + vm_mem = vb->priv; + + param = pipe->frame_params[vb->i]; + if (param) { + atomisp_makeup_css_parameters(asd, + &asd->params.css_param.update_flag, + ¶m->params); + atomisp_apply_css_parameters(asd, ¶m->params); + + if (param->params.update_flag.dz_config && + asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { + err = atomisp_calculate_real_zoom_region(asd, + ¶m->params.dz_config, css_pipe_id); + if (!err) + atomisp_css_set_dz_config(asd, + ¶m->params.dz_config); + } + atomisp_css_set_isp_config_applied_frame(asd, + vm_mem->vaddr); + atomisp_css_update_isp_params_on_pipe(asd, + asd->stream_env[stream_id].pipes[css_pipe_id]); + asd->params.dvs_6axis = (struct atomisp_css_dvs_6axis *) + param->params.dvs_6axis; + + /* + * WORKAROUND: + * Because the camera halv3 can't ensure to set zoom + * region to per_frame setting and global setting at + * same time and only set zoom region to pre_frame + * setting now.so when the pre_frame setting inculde + * zoom region,I will set it to global setting. + */ + if (param->params.update_flag.dz_config && + asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO + && !err) { + memcpy(&asd->params.css_param.dz_config, + ¶m->params.dz_config, + sizeof(struct ia_css_dz_config)); + asd->params.css_param.update_flag.dz_config = + (struct atomisp_dz_config *) + &asd->params.css_param.dz_config; + asd->params.css_update_params_needed = true; + } + } + /* Enqueue buffer */ + err = atomisp_q_video_buffer_to_css(asd, vm_mem, stream_id, + css_buf_type, css_pipe_id); + if (err) { + spin_lock_irqsave(&pipe->irq_lock, irqflags); + list_add_tail(&vb->queue, &pipe->activeq); + vb->state = VIDEOBUF_QUEUED; + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + dev_err(asd->isp->dev, "%s, css q fails: %d\n", + __func__, err); + return -EINVAL; + } + pipe->buffers_in_css++; + + /* enqueue 3A/DIS/metadata buffers */ + if (asd->params.curr_grid_info.s3a_grid.enable && + css_pipe_id == asd->params.s3a_enabled_pipe && + css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) + atomisp_q_one_s3a_buffer(asd, stream_id, + css_pipe_id); + + if (asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_info. + metadata_info.size && + css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) + atomisp_q_one_metadata_buffer(asd, stream_id, + css_pipe_id); + + if (dvs_grid && dvs_grid->enable && + css_pipe_id == CSS_PIPE_ID_VIDEO && + css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) + atomisp_q_one_dis_buffer(asd, stream_id, + css_pipe_id); + } + + return 0; +} + +static int atomisp_get_css_buf_type(struct atomisp_sub_device *asd, + enum atomisp_css_pipe_id pipe_id, + uint16_t source_pad) +{ + if (ATOMISP_USE_YUVPP(asd)) { + /* when run ZSL case */ + if (asd->continuous_mode->val && + asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) + return CSS_BUFFER_TYPE_OUTPUT_FRAME; + else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) + return CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME; + else + return CSS_BUFFER_TYPE_VF_OUTPUT_FRAME; + } + + /*when run SDV case*/ + if (asd->continuous_mode->val && + asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) + return CSS_BUFFER_TYPE_OUTPUT_FRAME; + else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) + return CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME; + else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) + return CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME; + else + return CSS_BUFFER_TYPE_VF_OUTPUT_FRAME; + } + + /*other case: default setting*/ + if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE || + source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO || + (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && + asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO)) + return CSS_BUFFER_TYPE_OUTPUT_FRAME; + else + return CSS_BUFFER_TYPE_VF_OUTPUT_FRAME; + } + + if (pipe_id == CSS_PIPE_ID_COPY || + source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE || + source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO || + (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && + asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO)) + return CSS_BUFFER_TYPE_OUTPUT_FRAME; + else + return CSS_BUFFER_TYPE_VF_OUTPUT_FRAME; +} + +static int atomisp_qbuffers_to_css_for_all_pipes(struct atomisp_sub_device *asd) +{ + enum atomisp_css_buffer_type buf_type; + enum atomisp_css_pipe_id css_capture_pipe_id = CSS_PIPE_ID_COPY; + enum atomisp_css_pipe_id css_preview_pipe_id = CSS_PIPE_ID_COPY; + enum atomisp_css_pipe_id css_video_pipe_id = CSS_PIPE_ID_COPY; + enum atomisp_input_stream_id input_stream_id; + struct atomisp_video_pipe *capture_pipe; + struct atomisp_video_pipe *preview_pipe; + struct atomisp_video_pipe *video_pipe; + + capture_pipe = &asd->video_out_capture; + preview_pipe = &asd->video_out_preview; + video_pipe = &asd->video_out_video_capture; + + buf_type = atomisp_get_css_buf_type( + asd, css_preview_pipe_id, + atomisp_subdev_source_pad(&preview_pipe->vdev)); + input_stream_id = ATOMISP_INPUT_STREAM_PREVIEW; + atomisp_q_video_buffers_to_css(asd, preview_pipe, + input_stream_id, + buf_type, css_preview_pipe_id); + + buf_type = atomisp_get_css_buf_type(asd, css_capture_pipe_id, + atomisp_subdev_source_pad(&capture_pipe->vdev)); + input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; + atomisp_q_video_buffers_to_css(asd, capture_pipe, + input_stream_id, + buf_type, css_capture_pipe_id); + + buf_type = atomisp_get_css_buf_type(asd, css_video_pipe_id, + atomisp_subdev_source_pad(&video_pipe->vdev)); + input_stream_id = ATOMISP_INPUT_STREAM_VIDEO; + atomisp_q_video_buffers_to_css(asd, video_pipe, + input_stream_id, + buf_type, css_video_pipe_id); + return 0; +} + + +/* queue all available buffers to css */ +int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) +{ + enum atomisp_css_buffer_type buf_type; + enum atomisp_css_pipe_id css_capture_pipe_id = CSS_PIPE_ID_NUM; + enum atomisp_css_pipe_id css_preview_pipe_id = CSS_PIPE_ID_NUM; + enum atomisp_css_pipe_id css_video_pipe_id = CSS_PIPE_ID_NUM; + enum atomisp_input_stream_id input_stream_id; + struct atomisp_video_pipe *capture_pipe = NULL; + struct atomisp_video_pipe *vf_pipe = NULL; + struct atomisp_video_pipe *preview_pipe = NULL; + struct atomisp_video_pipe *video_pipe = NULL; + bool raw_mode = atomisp_is_mbuscode_raw( + asd->fmt[asd->capture_pad].fmt.code); + + if (asd->isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num == 2 && + !asd->yuvpp_mode) + return atomisp_qbuffers_to_css_for_all_pipes(asd); + + if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { + video_pipe = &asd->video_out_video_capture; + css_video_pipe_id = CSS_PIPE_ID_VIDEO; + } else if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) { + preview_pipe = &asd->video_out_capture; + css_preview_pipe_id = CSS_PIPE_ID_CAPTURE; + } else if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + if (asd->continuous_mode->val) { + capture_pipe = &asd->video_out_capture; + vf_pipe = &asd->video_out_vf; + css_capture_pipe_id = CSS_PIPE_ID_CAPTURE; + } + video_pipe = &asd->video_out_video_capture; + preview_pipe = &asd->video_out_preview; + css_video_pipe_id = CSS_PIPE_ID_VIDEO; + css_preview_pipe_id = CSS_PIPE_ID_VIDEO; + } else if (asd->continuous_mode->val) { + capture_pipe = &asd->video_out_capture; + vf_pipe = &asd->video_out_vf; + preview_pipe = &asd->video_out_preview; + + css_preview_pipe_id = CSS_PIPE_ID_PREVIEW; + css_capture_pipe_id = CSS_PIPE_ID_CAPTURE; + } else if (asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { + preview_pipe = &asd->video_out_preview; + css_preview_pipe_id = CSS_PIPE_ID_PREVIEW; + } else { + /* ATOMISP_RUN_MODE_STILL_CAPTURE */ + capture_pipe = &asd->video_out_capture; + if (!raw_mode) + vf_pipe = &asd->video_out_vf; + css_capture_pipe_id = CSS_PIPE_ID_CAPTURE; + } + +#ifdef ISP2401_NEW_INPUT_SYSTEM + if (asd->copy_mode) { + css_capture_pipe_id = CSS_PIPE_ID_COPY; + css_preview_pipe_id = CSS_PIPE_ID_COPY; + css_video_pipe_id = CSS_PIPE_ID_COPY; + } +#endif + + if (asd->yuvpp_mode) { + capture_pipe = &asd->video_out_capture; + video_pipe = &asd->video_out_video_capture; + preview_pipe = &asd->video_out_preview; + css_capture_pipe_id = CSS_PIPE_ID_COPY; + css_video_pipe_id = CSS_PIPE_ID_YUVPP; + css_preview_pipe_id = CSS_PIPE_ID_YUVPP; + } + + if (capture_pipe) { + buf_type = atomisp_get_css_buf_type( + asd, css_capture_pipe_id, + atomisp_subdev_source_pad(&capture_pipe->vdev)); + input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; + + /* + * use yuvpp pipe for SOC camera. + */ + if (ATOMISP_USE_YUVPP(asd)) + css_capture_pipe_id = CSS_PIPE_ID_YUVPP; + + atomisp_q_video_buffers_to_css(asd, capture_pipe, + input_stream_id, + buf_type, css_capture_pipe_id); + } + + if (vf_pipe) { + buf_type = atomisp_get_css_buf_type( + asd, css_capture_pipe_id, + atomisp_subdev_source_pad(&vf_pipe->vdev)); + if (asd->stream_env[ATOMISP_INPUT_STREAM_POSTVIEW].stream) + input_stream_id = ATOMISP_INPUT_STREAM_POSTVIEW; + else + input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; + + /* + * use yuvpp pipe for SOC camera. + */ + if (ATOMISP_USE_YUVPP(asd)) + css_capture_pipe_id = CSS_PIPE_ID_YUVPP; + atomisp_q_video_buffers_to_css(asd, vf_pipe, + input_stream_id, + buf_type, css_capture_pipe_id); + } + + if (preview_pipe) { + buf_type = atomisp_get_css_buf_type( + asd, css_preview_pipe_id, + atomisp_subdev_source_pad(&preview_pipe->vdev)); + if (ATOMISP_SOC_CAMERA(asd) && css_preview_pipe_id == CSS_PIPE_ID_YUVPP) + input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; + /* else for ext isp use case */ + else if (css_preview_pipe_id == CSS_PIPE_ID_YUVPP) + input_stream_id = ATOMISP_INPUT_STREAM_VIDEO; + else if (asd->stream_env[ATOMISP_INPUT_STREAM_PREVIEW].stream) + input_stream_id = ATOMISP_INPUT_STREAM_PREVIEW; + else + input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; + + /* + * use yuvpp pipe for SOC camera. + */ + if (ATOMISP_USE_YUVPP(asd)) + css_preview_pipe_id = CSS_PIPE_ID_YUVPP; + + atomisp_q_video_buffers_to_css(asd, preview_pipe, + input_stream_id, + buf_type, css_preview_pipe_id); + } + + if (video_pipe) { + buf_type = atomisp_get_css_buf_type( + asd, css_video_pipe_id, + atomisp_subdev_source_pad(&video_pipe->vdev)); + if (asd->stream_env[ATOMISP_INPUT_STREAM_VIDEO].stream) + input_stream_id = ATOMISP_INPUT_STREAM_VIDEO; + else + input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; + + /* + * use yuvpp pipe for SOC camera. + */ + if (ATOMISP_USE_YUVPP(asd)) + css_video_pipe_id = CSS_PIPE_ID_YUVPP; + + atomisp_q_video_buffers_to_css(asd, video_pipe, + input_stream_id, + buf_type, css_video_pipe_id); + } + + return 0; +} + +static void atomisp_buf_queue(struct videobuf_queue *vq, + struct videobuf_buffer *vb) +{ + struct atomisp_video_pipe *pipe = vq->priv_data; + + /* + * when a frame buffer meets following conditions, it should be put into + * the waiting list: + * 1. It is not a main output frame, and it has a per-frame parameter + * to go with it. + * 2. It is not a main output frame, and the waiting buffer list is not + * empty, to keep the FIFO sequence of frame buffer processing, it + * is put to waiting list until previous per-frame parameter buffers + * get enqueued. + */ + if (!atomisp_is_vf_pipe(pipe) && + (pipe->frame_request_config_id[vb->i] || + !list_empty(&pipe->buffers_waiting_for_param))) + list_add_tail(&vb->queue, &pipe->buffers_waiting_for_param); + else + list_add_tail(&vb->queue, &pipe->activeq); + + vb->state = VIDEOBUF_QUEUED; +} + +static void atomisp_buf_release(struct videobuf_queue *vq, + struct videobuf_buffer *vb) +{ + vb->state = VIDEOBUF_NEEDS_INIT; + atomisp_videobuf_free_buf(vb); +} + +static int atomisp_buf_setup_output(struct videobuf_queue *vq, + unsigned int *count, unsigned int *size) +{ + struct atomisp_video_pipe *pipe = vq->priv_data; + + *size = pipe->pix.sizeimage; + + return 0; +} + +static int atomisp_buf_prepare_output(struct videobuf_queue *vq, + struct videobuf_buffer *vb, + enum v4l2_field field) +{ + struct atomisp_video_pipe *pipe = vq->priv_data; + + vb->size = pipe->pix.sizeimage; + vb->width = pipe->pix.width; + vb->height = pipe->pix.height; + vb->field = field; + vb->state = VIDEOBUF_PREPARED; + + return 0; +} + +static void atomisp_buf_queue_output(struct videobuf_queue *vq, + struct videobuf_buffer *vb) +{ + struct atomisp_video_pipe *pipe = vq->priv_data; + + list_add_tail(&vb->queue, &pipe->activeq_out); + vb->state = VIDEOBUF_QUEUED; +} + +static void atomisp_buf_release_output(struct videobuf_queue *vq, + struct videobuf_buffer *vb) +{ + videobuf_vmalloc_free(vb); + vb->state = VIDEOBUF_NEEDS_INIT; +} + +static const struct videobuf_queue_ops videobuf_qops = { + .buf_setup = atomisp_buf_setup, + .buf_prepare = atomisp_buf_prepare, + .buf_queue = atomisp_buf_queue, + .buf_release = atomisp_buf_release, +}; + +static const struct videobuf_queue_ops videobuf_qops_output = { + .buf_setup = atomisp_buf_setup_output, + .buf_prepare = atomisp_buf_prepare_output, + .buf_queue = atomisp_buf_queue_output, + .buf_release = atomisp_buf_release_output, +}; + +static int atomisp_init_pipe(struct atomisp_video_pipe *pipe) +{ + /* init locks */ + spin_lock_init(&pipe->irq_lock); + + videobuf_queue_vmalloc_init(&pipe->capq, &videobuf_qops, NULL, + &pipe->irq_lock, + V4L2_BUF_TYPE_VIDEO_CAPTURE, + V4L2_FIELD_NONE, + sizeof(struct atomisp_buffer), pipe, + NULL); /* ext_lock: NULL */ + + videobuf_queue_vmalloc_init(&pipe->outq, &videobuf_qops_output, NULL, + &pipe->irq_lock, + V4L2_BUF_TYPE_VIDEO_OUTPUT, + V4L2_FIELD_NONE, + sizeof(struct atomisp_buffer), pipe, + NULL); /* ext_lock: NULL */ + + INIT_LIST_HEAD(&pipe->activeq); + INIT_LIST_HEAD(&pipe->activeq_out); + INIT_LIST_HEAD(&pipe->buffers_waiting_for_param); + INIT_LIST_HEAD(&pipe->per_frame_params); + memset(pipe->frame_request_config_id, 0, + VIDEO_MAX_FRAME * sizeof(unsigned int)); + memset(pipe->frame_params, 0, + VIDEO_MAX_FRAME * + sizeof(struct atomisp_css_params_with_list *)); + + return 0; +} + +static void atomisp_dev_init_struct(struct atomisp_device *isp) +{ + unsigned int i; + + isp->sw_contex.file_input = false; + isp->need_gfx_throttle = true; + isp->isp_fatal_error = false; + isp->mipi_frame_size = 0; + + for (i = 0; i < isp->input_cnt; i++) + isp->inputs[i].asd = NULL; + /* + * For Merrifield, frequency is scalable. + * After boot-up, the default frequency is 200MHz. + */ + isp->sw_contex.running_freq = ISP_FREQ_200MHZ; +} + +static void atomisp_subdev_init_struct(struct atomisp_sub_device *asd) +{ + v4l2_ctrl_s_ctrl(asd->run_mode, ATOMISP_RUN_MODE_STILL_CAPTURE); + memset(&asd->params.css_param, 0, sizeof(asd->params.css_param)); + asd->params.color_effect = V4L2_COLORFX_NONE; + asd->params.bad_pixel_en = true; + asd->params.gdc_cac_en = false; + asd->params.video_dis_en = false; + asd->params.sc_en = false; + asd->params.fpn_en = false; + asd->params.xnr_en = false; + asd->params.false_color = 0; + asd->params.online_process = 1; + asd->params.yuv_ds_en = 0; + /* s3a grid not enabled for any pipe */ + asd->params.s3a_enabled_pipe = CSS_PIPE_ID_NUM; + + asd->params.offline_parm.num_captures = 1; + asd->params.offline_parm.skip_frames = 0; + asd->params.offline_parm.offset = 0; + asd->delayed_init = ATOMISP_DELAYED_INIT_NOT_QUEUED; + /* Add for channel */ + asd->input_curr = 0; + + asd->mipi_frame_size = 0; + asd->copy_mode = false; + asd->yuvpp_mode = false; + + asd->stream_prepared = false; + asd->high_speed_mode = false; + asd->sensor_array_res.height = 0; + asd->sensor_array_res.width = 0; + atomisp_css_init_struct(asd); +} +/* + * file operation functions + */ +static unsigned int atomisp_subdev_users(struct atomisp_sub_device *asd) +{ + return asd->video_out_preview.users + + asd->video_out_vf.users + + asd->video_out_capture.users + + asd->video_out_video_capture.users + + asd->video_acc.users + + asd->video_in.users; +} + +unsigned int atomisp_dev_users(struct atomisp_device *isp) +{ + unsigned int i, sum; + for (i = 0, sum = 0; i < isp->num_of_streams; i++) + sum += atomisp_subdev_users(&isp->asd[i]); + + return sum; +} + +static int atomisp_open(struct file *file) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = NULL; + struct atomisp_acc_pipe *acc_pipe = NULL; + struct atomisp_sub_device *asd; + bool acc_node = false; + int ret; + + dev_dbg(isp->dev, "open device %s\n", vdev->name); + + rt_mutex_lock(&isp->mutex); + + acc_node = !strcmp(vdev->name, "ATOMISP ISP ACC"); + if (acc_node) { + acc_pipe = atomisp_to_acc_pipe(vdev); + asd = acc_pipe->asd; + } else { + pipe = atomisp_to_video_pipe(vdev); + asd = pipe->asd; + } + asd->subdev.devnode = vdev; + /* Deferred firmware loading case. */ + if (isp->css_env.isp_css_fw.bytes == 0) { + isp->firmware = atomisp_load_firmware(isp); + if (!isp->firmware) { + dev_err(isp->dev, "Failed to load ISP firmware.\n"); + ret = -ENOENT; + goto error; + } + ret = atomisp_css_load_firmware(isp); + if (ret) { + dev_err(isp->dev, "Failed to init css.\n"); + goto error; + } + /* No need to keep FW in memory anymore. */ + release_firmware(isp->firmware); + isp->firmware = NULL; + isp->css_env.isp_css_fw.data = NULL; + } + + if (acc_node && acc_pipe->users) { + dev_dbg(isp->dev, "acc node already opened\n"); + rt_mutex_unlock(&isp->mutex); + return -EBUSY; + } else if (acc_node) { + goto dev_init; + } + + if (!isp->input_cnt) { + dev_err(isp->dev, "no camera attached\n"); + ret = -EINVAL; + goto error; + } + + /* + * atomisp does not allow multiple open + */ + if (pipe->users) { + dev_dbg(isp->dev, "video node already opened\n"); + rt_mutex_unlock(&isp->mutex); + return -EBUSY; + } + + ret = atomisp_init_pipe(pipe); + if (ret) + goto error; + +dev_init: + if (atomisp_dev_users(isp)) { + dev_dbg(isp->dev, "skip init isp in open\n"); + goto init_subdev; + } + + /* runtime power management, turn on ISP */ + ret = pm_runtime_get_sync(vdev->v4l2_dev->dev); + if (ret < 0) { + dev_err(isp->dev, "Failed to power on device\n"); + goto error; + } + + if (dypool_enable) { + ret = hmm_pool_register(dypool_pgnr, HMM_POOL_TYPE_DYNAMIC); + if (ret) + dev_err(isp->dev, "Failed to register dynamic memory pool.\n"); + } + + /* Init ISP */ + if (atomisp_css_init(isp)) { + ret = -EINVAL; + /* Need to clean up CSS init if it fails. */ + goto css_error; + } + + atomisp_dev_init_struct(isp); + + ret = v4l2_subdev_call(isp->flash, core, s_power, 1); + if (ret < 0 && ret != -ENODEV && ret != -ENOIOCTLCMD) { + dev_err(isp->dev, "Failed to power-on flash\n"); + goto css_error; + } + +init_subdev: + if (atomisp_subdev_users(asd)) + goto done; + + atomisp_subdev_init_struct(asd); + +done: + + if (acc_node) + acc_pipe->users++; + else + pipe->users++; + rt_mutex_unlock(&isp->mutex); + return 0; + +css_error: + atomisp_css_uninit(isp); +error: + hmm_pool_unregister(HMM_POOL_TYPE_DYNAMIC); + pm_runtime_put(vdev->v4l2_dev->dev); + rt_mutex_unlock(&isp->mutex); + return ret; +} + +static int atomisp_release(struct file *file) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe; + struct atomisp_acc_pipe *acc_pipe; + struct atomisp_sub_device *asd; + bool acc_node; + struct v4l2_requestbuffers req; + struct v4l2_subdev_fh fh; + struct v4l2_rect clear_compose = {0}; + int ret = 0; + + v4l2_fh_init(&fh.vfh, vdev); + + req.count = 0; + if (isp == NULL) + return -EBADF; + + mutex_lock(&isp->streamoff_mutex); + rt_mutex_lock(&isp->mutex); + + dev_dbg(isp->dev, "release device %s\n", vdev->name); + acc_node = !strcmp(vdev->name, "ATOMISP ISP ACC"); + if (acc_node) { + acc_pipe = atomisp_to_acc_pipe(vdev); + asd = acc_pipe->asd; + } else { + pipe = atomisp_to_video_pipe(vdev); + asd = pipe->asd; + } + asd->subdev.devnode = vdev; + if (acc_node) { + acc_pipe->users--; + goto subdev_uninit; + } + pipe->users--; + + if (pipe->capq.streaming) + dev_warn(isp->dev, + "%s: ISP still streaming while closing!", + __func__); + + if (pipe->capq.streaming && + __atomisp_streamoff(file, NULL, V4L2_BUF_TYPE_VIDEO_CAPTURE)) { + dev_err(isp->dev, + "atomisp_streamoff failed on release, driver bug"); + goto done; + } + + if (pipe->users) + goto done; + + if (__atomisp_reqbufs(file, NULL, &req)) { + dev_err(isp->dev, + "atomisp_reqbufs failed on release, driver bug"); + goto done; + } + + if (pipe->outq.bufs[0]) { + mutex_lock(&pipe->outq.vb_lock); + videobuf_queue_cancel(&pipe->outq); + mutex_unlock(&pipe->outq.vb_lock); + } + + /* + * A little trick here: + * file injection input resolution is recorded in the sink pad, + * therefore can not be cleared when releaseing one device node. + * The sink pad setting can only be cleared when all device nodes + * get released. + */ + if (!isp->sw_contex.file_input && asd->fmt_auto->val) { + struct v4l2_mbus_framefmt isp_sink_fmt = { 0 }; + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, &isp_sink_fmt); + } +subdev_uninit: + if (atomisp_subdev_users(asd)) + goto done; + + /* clear the sink pad for file input */ + if (isp->sw_contex.file_input && asd->fmt_auto->val) { + struct v4l2_mbus_framefmt isp_sink_fmt = { 0 }; + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, &isp_sink_fmt); + } + + atomisp_css_free_stat_buffers(asd); + atomisp_free_internal_buffers(asd); + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + core, s_power, 0); + if (ret) + dev_warn(isp->dev, "Failed to power-off sensor\n"); + + /* clear the asd field to show this camera is not used */ + isp->inputs[asd->input_curr].asd = NULL; + asd->streaming = ATOMISP_DEVICE_STREAMING_DISABLED; + + if (atomisp_dev_users(isp)) + goto done; + + atomisp_acc_release(asd); + + atomisp_destroy_pipes_stream_force(asd); + atomisp_css_uninit(isp); + + if (defer_fw_load) { + atomisp_css_unload_firmware(isp); + isp->css_env.isp_css_fw.data = NULL; + isp->css_env.isp_css_fw.bytes = 0; + } + + hmm_pool_unregister(HMM_POOL_TYPE_DYNAMIC); + + ret = v4l2_subdev_call(isp->flash, core, s_power, 0); + if (ret < 0 && ret != -ENODEV && ret != -ENOIOCTLCMD) + dev_warn(isp->dev, "Failed to power-off flash\n"); + + if (pm_runtime_put_sync(vdev->v4l2_dev->dev) < 0) + dev_err(isp->dev, "Failed to power off device\n"); + +done: + if (!acc_node) { + atomisp_subdev_set_selection(&asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, + atomisp_subdev_source_pad(vdev), + V4L2_SEL_TGT_COMPOSE, 0, + &clear_compose); + } + rt_mutex_unlock(&isp->mutex); + mutex_unlock(&isp->streamoff_mutex); + + return 0; +} + +/* + * Memory help functions for image frame and private parameters + */ +static int do_isp_mm_remap(struct atomisp_device *isp, + struct vm_area_struct *vma, + ia_css_ptr isp_virt, u32 host_virt, u32 pgnr) +{ + u32 pfn; + + while (pgnr) { + pfn = hmm_virt_to_phys(isp_virt) >> PAGE_SHIFT; + if (remap_pfn_range(vma, host_virt, pfn, + PAGE_SIZE, PAGE_SHARED)) { + dev_err(isp->dev, "remap_pfn_range err.\n"); + return -EAGAIN; + } + + isp_virt += PAGE_SIZE; + host_virt += PAGE_SIZE; + pgnr--; + } + + return 0; +} + +static int frame_mmap(struct atomisp_device *isp, + const struct atomisp_css_frame *frame, struct vm_area_struct *vma) +{ + ia_css_ptr isp_virt; + u32 host_virt; + u32 pgnr; + + if (!frame) { + dev_err(isp->dev, "%s: NULL frame pointer.\n", __func__); + return -EINVAL; + } + + host_virt = vma->vm_start; + isp_virt = frame->data; + atomisp_get_frame_pgnr(isp, frame, &pgnr); + + if (do_isp_mm_remap(isp, vma, isp_virt, host_virt, pgnr)) + return -EAGAIN; + + return 0; +} + +int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q, + struct vm_area_struct *vma) +{ + u32 offset = vma->vm_pgoff << PAGE_SHIFT; + int ret = -EINVAL, i; + struct atomisp_device *isp = + ((struct atomisp_video_pipe *)(q->priv_data))->isp; + struct videobuf_vmalloc_memory *vm_mem; + struct videobuf_mapping *map; + + MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS); + if (!(vma->vm_flags & VM_WRITE) || !(vma->vm_flags & VM_SHARED)) { + dev_err(isp->dev, "map appl bug: PROT_WRITE and MAP_SHARED are required\n"); + return -EINVAL; + } + + mutex_lock(&q->vb_lock); + for (i = 0; i < VIDEO_MAX_FRAME; i++) { + struct videobuf_buffer *buf = q->bufs[i]; + if (buf == NULL) + continue; + + map = kzalloc(sizeof(struct videobuf_mapping), GFP_KERNEL); + if (!map) { + mutex_unlock(&q->vb_lock); + return -ENOMEM; + } + + buf->map = map; + map->q = q; + + buf->baddr = vma->vm_start; + + if (buf && buf->memory == V4L2_MEMORY_MMAP && + buf->boff == offset) { + vm_mem = buf->priv; + ret = frame_mmap(isp, vm_mem->vaddr, vma); + vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP; + break; + } + } + mutex_unlock(&q->vb_lock); + + return ret; +} + +/* The input frame contains left and right padding that need to be removed. + * There is always ISP_LEFT_PAD padding on the left side. + * There is also padding on the right (padded_width - width). + */ +static int remove_pad_from_frame(struct atomisp_device *isp, + struct atomisp_css_frame *in_frame, __u32 width, __u32 height) +{ + unsigned int i; + unsigned short *buffer; + int ret = 0; + ia_css_ptr load = in_frame->data; + ia_css_ptr store = load; + + buffer = kmalloc(width*sizeof(load), GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + load += ISP_LEFT_PAD; + for (i = 0; i < height; i++) { + ret = hmm_load(load, buffer, width*sizeof(load)); + if (ret < 0) + goto remove_pad_error; + + ret = hmm_store(store, buffer, width*sizeof(store)); + if (ret < 0) + goto remove_pad_error; + + load += in_frame->info.padded_width; + store += width; + } + +remove_pad_error: + kfree(buffer); + return ret; +} + +static int atomisp_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct atomisp_css_frame *raw_virt_addr; + u32 start = vma->vm_start; + u32 end = vma->vm_end; + u32 size = end - start; + u32 origin_size, new_size; + int ret; + + if (!(vma->vm_flags & (VM_WRITE | VM_READ))) + return -EACCES; + + rt_mutex_lock(&isp->mutex); + + if (!(vma->vm_flags & VM_SHARED)) { + /* Map private buffer. + * Set VM_SHARED to the flags since we need + * to map the buffer page by page. + * Without VM_SHARED, remap_pfn_range() treats + * this kind of mapping as invalid. + */ + vma->vm_flags |= VM_SHARED; + ret = hmm_mmap(vma, vma->vm_pgoff << PAGE_SHIFT); + rt_mutex_unlock(&isp->mutex); + return ret; + } + + /* mmap for ISP offline raw data */ + if (atomisp_subdev_source_pad(vdev) + == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE && + vma->vm_pgoff == (ISP_PARAM_MMAP_OFFSET >> PAGE_SHIFT)) { + new_size = pipe->pix.width * pipe->pix.height * 2; + if (asd->params.online_process != 0) { + ret = -EINVAL; + goto error; + } + raw_virt_addr = asd->raw_output_frame; + if (raw_virt_addr == NULL) { + dev_err(isp->dev, "Failed to request RAW frame\n"); + ret = -EINVAL; + goto error; + } + + ret = remove_pad_from_frame(isp, raw_virt_addr, + pipe->pix.width, pipe->pix.height); + if (ret < 0) { + dev_err(isp->dev, "remove pad failed.\n"); + goto error; + } + origin_size = raw_virt_addr->data_bytes; + raw_virt_addr->data_bytes = new_size; + + if (size != PAGE_ALIGN(new_size)) { + dev_err(isp->dev, "incorrect size for mmap ISP Raw Frame\n"); + ret = -EINVAL; + goto error; + } + + if (frame_mmap(isp, raw_virt_addr, vma)) { + dev_err(isp->dev, "frame_mmap failed.\n"); + raw_virt_addr->data_bytes = origin_size; + ret = -EAGAIN; + goto error; + } + raw_virt_addr->data_bytes = origin_size; + vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP; + rt_mutex_unlock(&isp->mutex); + return 0; + } + + /* + * mmap for normal frames + */ + if (size != pipe->pix.sizeimage) { + dev_err(isp->dev, "incorrect size for mmap ISP frames\n"); + ret = -EINVAL; + goto error; + } + rt_mutex_unlock(&isp->mutex); + + return atomisp_videobuf_mmap_mapper(&pipe->capq, vma); + +error: + rt_mutex_unlock(&isp->mutex); + + return ret; +} + +static int atomisp_file_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + + return videobuf_mmap_mapper(&pipe->outq, vma); +} + +static __poll_t atomisp_poll(struct file *file, + struct poll_table_struct *pt) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + + rt_mutex_lock(&isp->mutex); + if (pipe->capq.streaming != 1) { + rt_mutex_unlock(&isp->mutex); + return EPOLLERR; + } + rt_mutex_unlock(&isp->mutex); + + return videobuf_poll_stream(file, &pipe->capq, pt); +} + +const struct v4l2_file_operations atomisp_fops = { + .owner = THIS_MODULE, + .open = atomisp_open, + .release = atomisp_release, + .mmap = atomisp_mmap, + .unlocked_ioctl = video_ioctl2, +#ifdef CONFIG_COMPAT + /* + * There are problems with this code. Disable this for now. + .compat_ioctl32 = atomisp_compat_ioctl32, + */ +#endif + .poll = atomisp_poll, +}; + +const struct v4l2_file_operations atomisp_file_fops = { + .owner = THIS_MODULE, + .open = atomisp_open, + .release = atomisp_release, + .mmap = atomisp_file_mmap, + .unlocked_ioctl = video_ioctl2, +#ifdef CONFIG_COMPAT + /* + * There are problems with this code. Disable this for now. + .compat_ioctl32 = atomisp_compat_ioctl32, + */ +#endif + .poll = atomisp_poll, +}; + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h new file mode 100644 index 0000000000000..2faab3429d439 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h @@ -0,0 +1,50 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_FOPS_H__ +#define __ATOMISP_FOPS_H__ +#include "atomisp_subdev.h" + +int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd, + struct atomisp_video_pipe *pipe, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id); + +unsigned int atomisp_dev_users(struct atomisp_device *isp); +unsigned int atomisp_sub_dev_users(struct atomisp_sub_device *asd); + +/* + * Memory help functions for image frame and private parameters + */ + +int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q, + struct vm_area_struct *vma); + +int atomisp_qbuf_to_css(struct atomisp_device *isp, + struct atomisp_video_pipe *pipe, + struct videobuf_buffer *vb); + +int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd); + +extern const struct v4l2_file_operations atomisp_fops; + +extern bool defer_fw_load; + +#endif /* __ATOMISP_FOPS_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h new file mode 100644 index 0000000000000..55ba185b43a08 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h @@ -0,0 +1,29 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef _atomisp_helper_h_ +#define _atomisp_helper_h_ +extern void __iomem *atomisp_io_base; + +static inline void __iomem *atomisp_get_io_virt_addr(unsigned int address) +{ + void __iomem *ret = atomisp_io_base + (address & 0x003FFFFF); + return ret; +} +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h new file mode 100644 index 0000000000000..dc476a3dd271e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h @@ -0,0 +1,310 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __ATOMISP_INTERNAL_H__ +#define __ATOMISP_INTERNAL_H__ + +#include "../../include/linux/atomisp_platform.h" +#include +#include +#include +#include + +#include +#include + +#ifndef ISP2401 +#include "ia_css_types.h" +#include "sh_css_legacy.h" +#else +/*#include "ia_css_types.h"*/ +/*#include "sh_css_legacy.h"*/ +#endif + +#include "atomisp_csi2.h" +#include "atomisp_file.h" +#include "atomisp_subdev.h" +#include "atomisp_tpg.h" +#include "atomisp_compat.h" + +#include "gp_device.h" +#include "irq.h" +#include + +#define V4L2_EVENT_FRAME_END 5 + +#define IS_HWREVISION(isp, rev) \ + (((isp)->media_dev.hw_revision & ATOMISP_HW_REVISION_MASK) == \ + ((rev) << ATOMISP_HW_REVISION_SHIFT)) + +#define MAX_STREAM_NUM 2 + +#define ATOMISP_PCI_DEVICE_SOC_MASK 0xfff8 +/* MRFLD with 0x1178: ISP freq can burst to 457MHz */ +#define ATOMISP_PCI_DEVICE_SOC_MRFLD 0x1178 +/* MRFLD with 0x1179: max ISP freq limited to 400MHz */ +#define ATOMISP_PCI_DEVICE_SOC_MRFLD_1179 0x1179 +/* MRFLD with 0x117a: max ISP freq is 400MHz and max freq at Vmin is 200MHz */ +#define ATOMISP_PCI_DEVICE_SOC_MRFLD_117A 0x117a +#define ATOMISP_PCI_DEVICE_SOC_BYT 0x0f38 +#define ATOMISP_PCI_DEVICE_SOC_ANN 0x1478 +#define ATOMISP_PCI_DEVICE_SOC_CHT 0x22b8 + +#define ATOMISP_PCI_REV_MRFLD_A0_MAX 0 +#define ATOMISP_PCI_REV_BYT_A0_MAX 4 + +#define ATOM_ISP_STEP_WIDTH 2 +#define ATOM_ISP_STEP_HEIGHT 2 + +#define ATOM_ISP_MIN_WIDTH 4 +#define ATOM_ISP_MIN_HEIGHT 4 +#define ATOM_ISP_MAX_WIDTH UINT_MAX +#define ATOM_ISP_MAX_HEIGHT UINT_MAX + +/* sub-QCIF resolution */ +#define ATOM_RESOLUTION_SUBQCIF_WIDTH 128 +#define ATOM_RESOLUTION_SUBQCIF_HEIGHT 96 + +#define ATOM_ISP_MAX_WIDTH_TMP 1280 +#define ATOM_ISP_MAX_HEIGHT_TMP 720 + +#define ATOM_ISP_I2C_BUS_1 4 +#define ATOM_ISP_I2C_BUS_2 5 + +#define ATOM_ISP_POWER_DOWN 0 +#define ATOM_ISP_POWER_UP 1 + +#define ATOM_ISP_MAX_INPUTS 4 + +#define ATOMISP_SC_TYPE_SIZE 2 + +#define ATOMISP_ISP_TIMEOUT_DURATION (2 * HZ) +#define ATOMISP_EXT_ISP_TIMEOUT_DURATION (6 * HZ) +#define ATOMISP_ISP_FILE_TIMEOUT_DURATION (60 * HZ) +#define ATOMISP_WDT_KEEP_CURRENT_DELAY 0 +#define ATOMISP_ISP_MAX_TIMEOUT_COUNT 2 +#define ATOMISP_CSS_STOP_TIMEOUT_US 200000 + +#define ATOMISP_CSS_Q_DEPTH 3 +#define ATOMISP_CSS_EVENTS_MAX 16 +#define ATOMISP_CONT_RAW_FRAMES 15 +#define ATOMISP_METADATA_QUEUE_DEPTH_FOR_HAL 8 +#define ATOMISP_S3A_BUF_QUEUE_DEPTH_FOR_HAL 8 + +#define ATOMISP_DELAYED_INIT_NOT_QUEUED 0 +#define ATOMISP_DELAYED_INIT_QUEUED 1 +#define ATOMISP_DELAYED_INIT_DONE 2 + +#define ATOMISP_CALC_CSS_PREV_OVERLAP(lines) \ + ((lines) * 38 / 100 & 0xfffffe) + +/* + * Define how fast CPU should be able to serve ISP interrupts. + * The bigger the value, the higher risk that the ISP is not + * triggered sufficiently fast for it to process image during + * vertical blanking time, increasing risk of dropped frames. + * 1000 us is a reasonable value considering that the processing + * time is typically ~2000 us. + */ +#define ATOMISP_MAX_ISR_LATENCY 1000 + +/* Add new YUVPP pipe for SOC sensor. */ +#define ATOMISP_CSS_SUPPORT_YUVPP 1 + +#define ATOMISP_CSS_OUTPUT_SECOND_INDEX 1 +#define ATOMISP_CSS_OUTPUT_DEFAULT_INDEX 0 + +/* + * ATOMISP_SOC_CAMERA + * This is to differentiate between ext-isp and soc camera in + * Moorefield/Baytrail platform. + */ +#define ATOMISP_SOC_CAMERA(asd) \ + (asd->isp->inputs[asd->input_curr].type == SOC_CAMERA \ + && asd->isp->inputs[asd->input_curr].camera_caps-> \ + sensor[asd->sensor_curr].stream_num == 1) + +#define ATOMISP_USE_YUVPP(asd) \ + (ATOMISP_SOC_CAMERA(asd) && ATOMISP_CSS_SUPPORT_YUVPP && \ + !asd->copy_mode) + +#define ATOMISP_DEPTH_SENSOR_STREAMON_COUNT 2 + +#define ATOMISP_DEPTH_DEFAULT_MASTER_SENSOR 0 +#define ATOMISP_DEPTH_DEFAULT_SLAVE_SENSOR 1 + +#ifdef ISP2401 +#define ATOMISP_ION_DEVICE_FD_OFFSET 16 +#define ATOMISP_ION_SHARED_FD_MASK (0xFFFF) +#define ATOMISP_ION_DEVICE_FD_MASK (~ATOMISP_ION_SHARED_FD_MASK) +#define ION_FD_UNSET (-1) + +#endif +#define DIV_NEAREST_STEP(n, d, step) \ + round_down((2 * (n) + (d) * (step))/(2 * (d)), (step)) + +struct atomisp_input_subdev { + unsigned int type; + enum atomisp_camera_port port; + struct v4l2_subdev *camera; + struct v4l2_subdev *motor; + struct v4l2_frmsizeenum frame_size; + + /* + * To show this resource is used by + * which stream, in ISP multiple stream mode + */ + struct atomisp_sub_device *asd; + + const struct atomisp_camera_caps *camera_caps; + int sensor_index; +}; + +enum atomisp_dfs_mode { + ATOMISP_DFS_MODE_AUTO = 0, + ATOMISP_DFS_MODE_LOW, + ATOMISP_DFS_MODE_MAX, +}; + +struct atomisp_regs { + /* PCI config space info */ + u16 pcicmdsts; + u32 ispmmadr; + u32 msicap; + u32 msi_addr; + u16 msi_data; + u8 intr; + u32 interrupt_control; + u32 pmcs; + u32 cg_dis; + u32 i_control; + + /* I-Unit PHY related info */ + u32 csi_rcomp_config; + u32 csi_afe_dly; + u32 csi_control; + + /* New for MRFLD */ + u32 csi_afe_rcomp_config; + u32 csi_afe_hs_control; + u32 csi_deadline_control; + u32 csi_access_viol; +}; + +struct atomisp_sw_contex { + bool file_input; + int power_state; + int running_freq; +}; + + +#define ATOMISP_DEVICE_STREAMING_DISABLED 0 +#define ATOMISP_DEVICE_STREAMING_ENABLED 1 +#define ATOMISP_DEVICE_STREAMING_STOPPING 2 + +/* + * ci device struct + */ +struct atomisp_device { + struct pci_dev *pdev; + struct device *dev; + struct v4l2_device v4l2_dev; + struct media_device media_dev; + struct atomisp_platform_data *pdata; + void *mmu_l1_base; + const struct firmware *firmware; + + struct pm_qos_request pm_qos; + s32 max_isr_latency; + + /* + * ISP modules + * Multiple streams are represents by multiple + * atomisp_sub_device instances + */ + struct atomisp_sub_device *asd; + /* + * this will be assiged dyanamically. + * For Merr/BTY(ISP2400), 2 streams are supported. + */ + unsigned int num_of_streams; + + struct atomisp_mipi_csi2_device csi2_port[ATOMISP_CAMERA_NR_PORTS]; + struct atomisp_tpg_device tpg; + struct atomisp_file_device file_dev; + + /* Purpose of mutex is to protect and serialize use of isp data + * structures and css API calls. */ + struct rt_mutex mutex; + /* + * Serialise streamoff: mutex is dropped during streamoff to + * cancel the watchdog queue. MUST be acquired BEFORE + * "mutex". + */ + struct mutex streamoff_mutex; + + unsigned int input_cnt; + struct atomisp_input_subdev inputs[ATOM_ISP_MAX_INPUTS]; + struct v4l2_subdev *flash; + struct v4l2_subdev *motor; + + struct atomisp_regs saved_regs; + struct atomisp_sw_contex sw_contex; + struct atomisp_css_env css_env; + + /* isp timeout status flag */ + bool isp_timeout; + bool isp_fatal_error; + struct workqueue_struct *wdt_work_queue; + struct work_struct wdt_work; +#ifndef ISP2401 + atomic_t wdt_count; +#endif + atomic_t wdt_work_queued; + + spinlock_t lock; /* Just for streaming below */ + + bool need_gfx_throttle; + + unsigned int mipi_frame_size; + const struct atomisp_dfs_config *dfs; + unsigned int hpll_freq; + + bool css_initialized; +}; + +#define v4l2_dev_to_atomisp_device(dev) \ + container_of(dev, struct atomisp_device, v4l2_dev) + +extern struct device *atomisp_dev; + +#define atomisp_is_wdt_running(a) timer_pending(&(a)->wdt) +#ifdef ISP2401 +extern void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, + unsigned int delay); +#endif +extern void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay); +#ifndef ISP2401 +extern void atomisp_wdt_start(struct atomisp_sub_device *asd); +#else +extern void atomisp_wdt_start(struct atomisp_video_pipe *pipe); +extern void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync); +#endif +extern void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync); + +#endif /* __ATOMISP_INTERNAL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c new file mode 100644 index 0000000000000..8c67aea67b6b4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c @@ -0,0 +1,3123 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include + + +#include +#include +#include + +#include "atomisp_acc.h" +#include "atomisp_cmd.h" +#include "atomisp_common.h" +#include "atomisp_fops.h" +#include "atomisp_internal.h" +#include "atomisp_ioctl.h" +#include "atomisp-regs.h" +#include "atomisp_compat.h" + +#include "sh_css_hrt.h" + +#include "gp_device.h" +#include "device_access.h" +#include "irq.h" + +#include "hrt/hive_isp_css_mm_hrt.h" + +/* for v4l2_capability */ +static const char *DRIVER = "atomisp"; /* max size 15 */ +static const char *CARD = "ATOM ISP"; /* max size 31 */ +static const char *BUS_INFO = "PCI-3"; /* max size 31 */ + +/* + * FIXME: ISP should not know beforehand all CIDs supported by sensor. + * Instead, it needs to propagate to sensor unkonwn CIDs. + */ +static struct v4l2_queryctrl ci_v4l2_controls[] = { + { + .id = V4L2_CID_AUTO_WHITE_BALANCE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Automatic White Balance", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_RED_BALANCE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Red Balance", + .minimum = 0x00, + .maximum = 0xff, + .step = 1, + .default_value = 0x00, + }, + { + .id = V4L2_CID_BLUE_BALANCE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Blue Balance", + .minimum = 0x00, + .maximum = 0xff, + .step = 1, + .default_value = 0x00, + }, + { + .id = V4L2_CID_GAMMA, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Gamma", + .minimum = 0x00, + .maximum = 0xff, + .step = 1, + .default_value = 0x00, + }, + { + .id = V4L2_CID_POWER_LINE_FREQUENCY, + .type = V4L2_CTRL_TYPE_MENU, + .name = "Light frequency filter", + .minimum = 1, + .maximum = 2, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_COLORFX, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Image Color Effect", + .minimum = 0, + .maximum = 9, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_COLORFX_CBCR, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Image Color Effect CbCr", + .minimum = 0, + .maximum = 0xffff, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_ATOMISP_BAD_PIXEL_DETECTION, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Bad Pixel Correction", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_ATOMISP_POSTPROCESS_GDC_CAC, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "GDC/CAC", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_ATOMISP_VIDEO_STABLIZATION, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Video Stablization", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_ATOMISP_FIXED_PATTERN_NR, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Fixed Pattern Noise Reduction", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_ATOMISP_FALSE_COLOR_CORRECTION, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "False Color Correction", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_REQUEST_FLASH, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Request flash frames", + .minimum = 0, + .maximum = 10, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_ATOMISP_LOW_LIGHT, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Low light mode", + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Horizontal binning factor", + .minimum = 0, + .maximum = 10, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Vertical binning factor", + .minimum = 0, + .maximum = 10, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_2A_STATUS, + .type = V4L2_CTRL_TYPE_BITMASK, + .name = "AE and AWB status", + .minimum = 0, + .maximum = V4L2_2A_STATUS_AE_READY | V4L2_2A_STATUS_AWB_READY, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_EXPOSURE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .minimum = -4, + .maximum = 4, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_EXPOSURE_ZONE_NUM, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "one-time exposure zone number", + .minimum = 0x0, + .maximum = 0xffff, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_EXPOSURE_AUTO_PRIORITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Exposure auto priority", + .minimum = V4L2_EXPOSURE_AUTO, + .maximum = V4L2_EXPOSURE_APERTURE_PRIORITY, + .step = 1, + .default_value = V4L2_EXPOSURE_AUTO, + }, + { + .id = V4L2_CID_SCENE_MODE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "scene mode", + .minimum = 0, + .maximum = 13, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_ISO_SENSITIVITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "iso", + .minimum = -4, + .maximum = 4, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_ISO_SENSITIVITY_AUTO, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "iso mode", + .minimum = V4L2_ISO_SENSITIVITY_MANUAL, + .maximum = V4L2_ISO_SENSITIVITY_AUTO, + .step = 1, + .default_value = V4L2_ISO_SENSITIVITY_AUTO, + }, + { + .id = V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "white balance", + .minimum = 0, + .maximum = 9, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_EXPOSURE_METERING, + .type = V4L2_CTRL_TYPE_MENU, + .name = "metering", + .minimum = 0, + .maximum = 3, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_3A_LOCK, + .type = V4L2_CTRL_TYPE_BITMASK, + .name = "3a lock", + .minimum = 0, + .maximum = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE + | V4L2_LOCK_FOCUS, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_TEST_PATTERN, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Test Pattern", + .minimum = 0, + .maximum = 0xffff, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_TEST_PATTERN_COLOR_R, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Test Pattern Solid Color R", + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_TEST_PATTERN_COLOR_GR, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Test Pattern Solid Color GR", + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_TEST_PATTERN_COLOR_GB, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Test Pattern Solid Color GB", + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_TEST_PATTERN_COLOR_B, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Test Pattern Solid Color B", + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, +}; +static const u32 ctrls_num = ARRAY_SIZE(ci_v4l2_controls); + +/* + * supported V4L2 fmts and resolutions + */ +const struct atomisp_format_bridge atomisp_output_fmts[] = { + { + .pixelformat = V4L2_PIX_FMT_YUV420, + .depth = 12, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_YUV420, + .sh_fmt = CSS_FRAME_FORMAT_YUV420, + .description = "YUV420, planar", + .planar = true + }, { + .pixelformat = V4L2_PIX_FMT_YVU420, + .depth = 12, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_YVU420, + .sh_fmt = CSS_FRAME_FORMAT_YV12, + .description = "YVU420, planar", + .planar = true + }, { + .pixelformat = V4L2_PIX_FMT_YUV422P, + .depth = 16, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_YUV422P, + .sh_fmt = CSS_FRAME_FORMAT_YUV422, + .description = "YUV422, planar", + .planar = true + }, { + .pixelformat = V4L2_PIX_FMT_YUV444, + .depth = 24, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_YUV444, + .sh_fmt = CSS_FRAME_FORMAT_YUV444, + .description = "YUV444" + }, { + .pixelformat = V4L2_PIX_FMT_NV12, + .depth = 12, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_NV12, + .sh_fmt = CSS_FRAME_FORMAT_NV12, + .description = "NV12, Y-plane, CbCr interleaved", + .planar = true + }, { + .pixelformat = V4L2_PIX_FMT_NV21, + .depth = 12, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_NV21, + .sh_fmt = CSS_FRAME_FORMAT_NV21, + .description = "NV21, Y-plane, CbCr interleaved", + .planar = true + }, { + .pixelformat = V4L2_PIX_FMT_NV16, + .depth = 16, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_NV16, + .sh_fmt = CSS_FRAME_FORMAT_NV16, + .description = "NV16, Y-plane, CbCr interleaved", + .planar = true + }, { + .pixelformat = V4L2_PIX_FMT_YUYV, + .depth = 16, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_YUYV, + .sh_fmt = CSS_FRAME_FORMAT_YUYV, + .description = "YUYV, interleaved" + }, { + .pixelformat = V4L2_PIX_FMT_UYVY, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, + .sh_fmt = CSS_FRAME_FORMAT_UYVY, + .description = "UYVY, interleaved" + }, { /* This one is for parallel sensors! DO NOT USE! */ + .pixelformat = V4L2_PIX_FMT_UYVY, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, + .sh_fmt = CSS_FRAME_FORMAT_UYVY, + .description = "UYVY, interleaved" + }, { + .pixelformat = V4L2_PIX_FMT_SBGGR16, + .depth = 16, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_SBGGR16, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 16" + }, { + .pixelformat = V4L2_PIX_FMT_SBGGR8, + .depth = 8, + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 8" + }, { + .pixelformat = V4L2_PIX_FMT_SGBRG8, + .depth = 8, + .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 8" + }, { + .pixelformat = V4L2_PIX_FMT_SGRBG8, + .depth = 8, + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 8" + }, { + .pixelformat = V4L2_PIX_FMT_SRGGB8, + .depth = 8, + .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 8" + }, { + .pixelformat = V4L2_PIX_FMT_SBGGR10, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 10" + }, { + .pixelformat = V4L2_PIX_FMT_SGBRG10, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 10" + }, { + .pixelformat = V4L2_PIX_FMT_SGRBG10, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 10" + }, { + .pixelformat = V4L2_PIX_FMT_SRGGB10, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 10" + }, { + .pixelformat = V4L2_PIX_FMT_SBGGR12, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 12" + }, { + .pixelformat = V4L2_PIX_FMT_SGBRG12, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 12" + }, { + .pixelformat = V4L2_PIX_FMT_SGRBG12, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 12" + }, { + .pixelformat = V4L2_PIX_FMT_SRGGB12, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, + .sh_fmt = CSS_FRAME_FORMAT_RAW, + .description = "Bayer 12" + }, { + .pixelformat = V4L2_PIX_FMT_RGB32, + .depth = 32, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_RGB32, + .sh_fmt = CSS_FRAME_FORMAT_RGBA888, + .description = "32 RGB 8-8-8-8" + }, { + .pixelformat = V4L2_PIX_FMT_RGB565, + .depth = 16, + .mbus_code = MEDIA_BUS_FMT_BGR565_2X8_LE, + .sh_fmt = CSS_FRAME_FORMAT_RGB565, + .description = "16 RGB 5-6-5" + }, { + .pixelformat = V4L2_PIX_FMT_JPEG, + .depth = 8, + .mbus_code = MEDIA_BUS_FMT_JPEG_1X8, + .sh_fmt = CSS_FRAME_FORMAT_BINARY_8, + .description = "JPEG" + }, +#if 0 + { + /* This is a custom format being used by M10MO to send the RAW data */ + .pixelformat = V4L2_PIX_FMT_CUSTOM_M10MO_RAW, + .depth = 8, + .mbus_code = V4L2_MBUS_FMT_CUSTOM_M10MO_RAW, + .sh_fmt = CSS_FRAME_FORMAT_BINARY_8, + .description = "Custom RAW for M10MO" + }, +#endif +}; + +const struct atomisp_format_bridge *atomisp_get_format_bridge( + unsigned int pixelformat) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(atomisp_output_fmts); i++) { + if (atomisp_output_fmts[i].pixelformat == pixelformat) + return &atomisp_output_fmts[i]; + } + + return NULL; +} + +const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus( + u32 mbus_code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(atomisp_output_fmts); i++) { + if (mbus_code == atomisp_output_fmts[i].mbus_code) + return &atomisp_output_fmts[i]; + } + + return NULL; +} + +/* + * v4l2 ioctls + * return ISP capabilities + * + * FIXME: capabilities should be different for video0/video2/video3 + */ +static int atomisp_querycap(struct file *file, void *fh, + struct v4l2_capability *cap) +{ + memset(cap, 0, sizeof(struct v4l2_capability)); + + WARN_ON(sizeof(DRIVER) > sizeof(cap->driver) || + sizeof(CARD) > sizeof(cap->card) || + sizeof(BUS_INFO) > sizeof(cap->bus_info)); + + strncpy(cap->driver, DRIVER, sizeof(cap->driver) - 1); + strncpy(cap->card, CARD, sizeof(cap->card) - 1); + strncpy(cap->bus_info, BUS_INFO, sizeof(cap->card) - 1); + + cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | + V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT; + cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; + return 0; +} + +/* + * enum input are used to check primary/secondary camera + */ +static int atomisp_enum_input(struct file *file, void *fh, + struct v4l2_input *input) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + int index = input->index; + + if (index >= isp->input_cnt) + return -EINVAL; + + if (!isp->inputs[index].camera) + return -EINVAL; + + memset(input, 0, sizeof(struct v4l2_input)); + strncpy(input->name, isp->inputs[index].camera->name, + sizeof(input->name) - 1); + + /* + * HACK: append actuator's name to sensor's + * As currently userspace can't talk directly to subdev nodes, this + * ioctl is the only way to enum inputs + possible external actuators + * for 3A tuning purpose. + */ +#ifndef ISP2401 + if (isp->inputs[index].motor && + strlen(isp->inputs[index].motor->name) > 0) { +#else + if (isp->motor && + strlen(isp->motor->name) > 0) { +#endif + const int cur_len = strlen(input->name); + const int max_size = sizeof(input->name) - cur_len - 1; + + if (max_size > 1) { + input->name[cur_len] = '+'; + strncpy(&input->name[cur_len + 1], +#ifndef ISP2401 + isp->inputs[index].motor->name, max_size - 1); +#else + isp->motor->name, max_size - 1); +#endif + } + } + + input->type = V4L2_INPUT_TYPE_CAMERA; + input->index = index; + input->reserved[0] = isp->inputs[index].type; + input->reserved[1] = isp->inputs[index].port; + + return 0; +} + +static unsigned int atomisp_subdev_streaming_count( + struct atomisp_sub_device *asd) +{ + return asd->video_out_preview.capq.streaming + + asd->video_out_capture.capq.streaming + + asd->video_out_video_capture.capq.streaming + + asd->video_out_vf.capq.streaming + + asd->video_in.capq.streaming; +} + +unsigned int atomisp_streaming_count(struct atomisp_device *isp) +{ + unsigned int i, sum; + + for (i = 0, sum = 0; i < isp->num_of_streams; i++) + sum += isp->asd[i].streaming == + ATOMISP_DEVICE_STREAMING_ENABLED; + + return sum; +} + +unsigned int atomisp_is_acc_enabled(struct atomisp_device *isp) +{ + unsigned int i; + + for (i = 0; i < isp->num_of_streams; i++) + if (isp->asd[i].acc.pipeline) + return 1; + + return 0; +} +/* + * get input are used to get current primary/secondary camera + */ +static int atomisp_g_input(struct file *file, void *fh, unsigned int *input) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + + rt_mutex_lock(&isp->mutex); + *input = asd->input_curr; + rt_mutex_unlock(&isp->mutex); + + return 0; +} +/* + * set input are used to set current primary/secondary camera + */ +static int atomisp_s_input(struct file *file, void *fh, unsigned int input) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct v4l2_subdev *camera = NULL; + int ret; + + rt_mutex_lock(&isp->mutex); + if (input >= ATOM_ISP_MAX_INPUTS || input >= isp->input_cnt) { + dev_dbg(isp->dev, "input_cnt: %d\n", isp->input_cnt); + ret = -EINVAL; + goto error; + } + + /* + * check whether the request camera: + * 1: already in use + * 2: if in use, whether it is used by other streams + */ + if (isp->inputs[input].asd != NULL && isp->inputs[input].asd != asd) { + dev_err(isp->dev, + "%s, camera is already used by stream: %d\n", __func__, + isp->inputs[input].asd->index); + ret = -EBUSY; + goto error; + } + + camera = isp->inputs[input].camera; + if (!camera) { + dev_err(isp->dev, "%s, no camera\n", __func__); + ret = -EINVAL; + goto error; + } + + if (atomisp_subdev_streaming_count(asd)) { + dev_err(isp->dev, + "ISP is still streaming, stop first\n"); + ret = -EINVAL; + goto error; + } + + /* power off the current owned sensor, as it is not used this time */ + if (isp->inputs[asd->input_curr].asd == asd && + asd->input_curr != input) { + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + core, s_power, 0); + if (ret) + dev_warn(isp->dev, + "Failed to power-off sensor\n"); + /* clear the asd field to show this camera is not used */ + isp->inputs[asd->input_curr].asd = NULL; + } + + /* powe on the new sensor */ + ret = v4l2_subdev_call(isp->inputs[input].camera, core, s_power, 1); + if (ret) { + dev_err(isp->dev, "Failed to power-on sensor\n"); + goto error; + } + /* + * Some sensor driver resets the run mode during power-on, thus force + * update the run mode to sensor after power-on. + */ + atomisp_update_run_mode(asd); + + /* select operating sensor */ + ret = v4l2_subdev_call(isp->inputs[input].camera, video, s_routing, + 0, isp->inputs[input].sensor_index, 0); + if (ret && (ret != -ENOIOCTLCMD)) { + dev_err(isp->dev, "Failed to select sensor\n"); + goto error; + } + +#ifndef ISP2401 + if (!isp->sw_contex.file_input && isp->inputs[input].motor) + ret = v4l2_subdev_call(isp->inputs[input].motor, core, + init, 1); +#else + if (isp->motor) + ret = v4l2_subdev_call(isp->motor, core, s_power, 1); + + if (!isp->sw_contex.file_input && isp->motor) + ret = v4l2_subdev_call(isp->motor, core, init, 1); +#endif + + asd->input_curr = input; + /* mark this camera is used by the current stream */ + isp->inputs[input].asd = asd; + rt_mutex_unlock(&isp->mutex); + + return 0; + +error: + rt_mutex_unlock(&isp->mutex); + + return ret; +} + +static int atomisp_enum_fmt_cap(struct file *file, void *fh, + struct v4l2_fmtdesc *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct v4l2_subdev_mbus_code_enum code = { 0 }; + unsigned int i, fi = 0; + int rval; + + rt_mutex_lock(&isp->mutex); + rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, + enum_mbus_code, NULL, &code); + if (rval == -ENOIOCTLCMD) { + dev_warn(isp->dev, "enum_mbus_code pad op not supported. Please fix your sensor driver!\n"); + // rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + // video, enum_mbus_fmt, 0, &code.code); + } + rt_mutex_unlock(&isp->mutex); + + if (rval) + return rval; + + for (i = 0; i < ARRAY_SIZE(atomisp_output_fmts); i++) { + const struct atomisp_format_bridge *format = + &atomisp_output_fmts[i]; + + /* + * Is the atomisp-supported format is valid for the + * sensor (configuration)? If not, skip it. + */ + if (format->sh_fmt == CSS_FRAME_FORMAT_RAW + && format->mbus_code != code.code) + continue; + + /* Found a match. Now let's pick f->index'th one. */ + if (fi < f->index) { + fi++; + continue; + } + + strlcpy(f->description, format->description, + sizeof(f->description)); + f->pixelformat = format->pixelformat; + return 0; + } + + return -EINVAL; +} + +static int atomisp_g_fmt_cap(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + + int ret; + + rt_mutex_lock(&isp->mutex); + ret = atomisp_get_fmt(vdev, f); + rt_mutex_unlock(&isp->mutex); + return ret; +} + +static int atomisp_g_fmt_file(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + + rt_mutex_lock(&isp->mutex); + f->fmt.pix = pipe->pix; + rt_mutex_unlock(&isp->mutex); + + return 0; +} + +/* This function looks up the closest available resolution. */ +static int atomisp_try_fmt_cap(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + int ret; + + rt_mutex_lock(&isp->mutex); + ret = atomisp_try_fmt(vdev, f, NULL); + rt_mutex_unlock(&isp->mutex); + return ret; +} + +static int atomisp_s_fmt_cap(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + int ret; + + rt_mutex_lock(&isp->mutex); + if (isp->isp_fatal_error) { + ret = -EIO; + rt_mutex_unlock(&isp->mutex); + return ret; + } + ret = atomisp_set_fmt(vdev, f); + rt_mutex_unlock(&isp->mutex); + return ret; +} + +static int atomisp_s_fmt_file(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + int ret; + + rt_mutex_lock(&isp->mutex); + ret = atomisp_set_fmt_file(vdev, f); + rt_mutex_unlock(&isp->mutex); + return ret; +} + +/* + * Free videobuffer buffer priv data + */ +void atomisp_videobuf_free_buf(struct videobuf_buffer *vb) +{ + struct videobuf_vmalloc_memory *vm_mem; + + if (vb == NULL) + return; + + vm_mem = vb->priv; + if (vm_mem && vm_mem->vaddr) { + atomisp_css_frame_free(vm_mem->vaddr); + vm_mem->vaddr = NULL; + } +} + +/* + * this function is used to free video buffer queue + */ +static void atomisp_videobuf_free_queue(struct videobuf_queue *q) +{ + int i; + + for (i = 0; i < VIDEO_MAX_FRAME; i++) { + atomisp_videobuf_free_buf(q->bufs[i]); + kfree(q->bufs[i]); + q->bufs[i] = NULL; + } +} + +int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, + uint16_t stream_id) +{ + struct atomisp_device *isp = asd->isp; + struct atomisp_s3a_buf *s3a_buf = NULL, *_s3a_buf; + struct atomisp_dis_buf *dis_buf = NULL, *_dis_buf; + struct atomisp_metadata_buf *md_buf = NULL, *_md_buf; + int count; + struct atomisp_css_dvs_grid_info *dvs_grid_info = + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + unsigned int i; + + if (list_empty(&asd->s3a_stats) && + asd->params.curr_grid_info.s3a_grid.enable) { + count = ATOMISP_CSS_Q_DEPTH + + ATOMISP_S3A_BUF_QUEUE_DEPTH_FOR_HAL; + dev_dbg(isp->dev, "allocating %d 3a buffers\n", count); + while (count--) { + s3a_buf = kzalloc(sizeof(struct atomisp_s3a_buf), GFP_KERNEL); + if (!s3a_buf) + goto error; + + if (atomisp_css_allocate_stat_buffers( + asd, stream_id, s3a_buf, NULL, NULL)) { + kfree(s3a_buf); + goto error; + } + + list_add_tail(&s3a_buf->list, &asd->s3a_stats); + } + } + + if (list_empty(&asd->dis_stats) && dvs_grid_info && + dvs_grid_info->enable) { + count = ATOMISP_CSS_Q_DEPTH + 1; + dev_dbg(isp->dev, "allocating %d dis buffers\n", count); + while (count--) { + dis_buf = kzalloc(sizeof(struct atomisp_dis_buf), GFP_KERNEL); + if (!dis_buf) { + kfree(s3a_buf); + goto error; + } + if (atomisp_css_allocate_stat_buffers( + asd, stream_id, NULL, dis_buf, NULL)) { + kfree(dis_buf); + goto error; + } + + list_add_tail(&dis_buf->list, &asd->dis_stats); + } + } + + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + if (list_empty(&asd->metadata[i]) && + list_empty(&asd->metadata_ready[i]) && + list_empty(&asd->metadata_in_css[i])) { + count = ATOMISP_CSS_Q_DEPTH + + ATOMISP_METADATA_QUEUE_DEPTH_FOR_HAL; + dev_dbg(isp->dev, "allocating %d metadata buffers for type %d\n", + count, i); + while (count--) { + md_buf = kzalloc(sizeof(struct atomisp_metadata_buf), + GFP_KERNEL); + if (!md_buf) + goto error; + + if (atomisp_css_allocate_stat_buffers( + asd, stream_id, NULL, NULL, md_buf)) { + kfree(md_buf); + goto error; + } + list_add_tail(&md_buf->list, &asd->metadata[i]); + } + } + } + return 0; + +error: + dev_err(isp->dev, "failed to allocate statistics buffers\n"); + + list_for_each_entry_safe(dis_buf, _dis_buf, &asd->dis_stats, list) { + atomisp_css_free_dis_buffer(dis_buf); + list_del(&dis_buf->list); + kfree(dis_buf); + } + + list_for_each_entry_safe(s3a_buf, _s3a_buf, &asd->s3a_stats, list) { + atomisp_css_free_3a_buffer(s3a_buf); + list_del(&s3a_buf->list); + kfree(s3a_buf); + } + + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + list_for_each_entry_safe(md_buf, _md_buf, &asd->metadata[i], + list) { + atomisp_css_free_metadata_buffer(md_buf); + list_del(&md_buf->list); + kfree(md_buf); + } + } + return -ENOMEM; +} + +/* + * Initiate Memory Mapping or User Pointer I/O + */ +int __atomisp_reqbufs(struct file *file, void *fh, + struct v4l2_requestbuffers *req) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct atomisp_css_frame_info frame_info; + struct atomisp_css_frame *frame; + struct videobuf_vmalloc_memory *vm_mem; + uint16_t source_pad = atomisp_subdev_source_pad(vdev); + uint16_t stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + int ret = 0, i = 0; + + if (req->count == 0) { + mutex_lock(&pipe->capq.vb_lock); + if (!list_empty(&pipe->capq.stream)) + videobuf_queue_cancel(&pipe->capq); + + atomisp_videobuf_free_queue(&pipe->capq); + mutex_unlock(&pipe->capq.vb_lock); + /* clear request config id */ + memset(pipe->frame_request_config_id, 0, + VIDEO_MAX_FRAME * sizeof(unsigned int)); + memset(pipe->frame_params, 0, + VIDEO_MAX_FRAME * + sizeof(struct atomisp_css_params_with_list *)); + return 0; + } + + ret = videobuf_reqbufs(&pipe->capq, req); + if (ret) + return ret; + + atomisp_alloc_css_stat_bufs(asd, stream_id); + + /* + * for user pointer type, buffers are not really allcated here, + * buffers are setup in QBUF operation through v4l2_buffer structure + */ + if (req->memory == V4L2_MEMORY_USERPTR) + return 0; + + ret = atomisp_get_css_frame_info(asd, source_pad, &frame_info); + if (ret) + return ret; + + /* + * Allocate the real frame here for selected node using our + * memory management function + */ + for (i = 0; i < req->count; i++) { + if (atomisp_css_frame_allocate_from_info(&frame, &frame_info)) + goto error; + vm_mem = pipe->capq.bufs[i]->priv; + vm_mem->vaddr = frame; + } + + return ret; + +error: + while (i--) { + vm_mem = pipe->capq.bufs[i]->priv; + atomisp_css_frame_free(vm_mem->vaddr); + } + + if (asd->vf_frame) + atomisp_css_frame_free(asd->vf_frame); + + return -ENOMEM; +} + +int atomisp_reqbufs(struct file *file, void *fh, + struct v4l2_requestbuffers *req) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + int ret; + + rt_mutex_lock(&isp->mutex); + ret = __atomisp_reqbufs(file, fh, req); + rt_mutex_unlock(&isp->mutex); + + return ret; +} + +static int atomisp_reqbufs_file(struct file *file, void *fh, + struct v4l2_requestbuffers *req) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + + if (req->count == 0) { + mutex_lock(&pipe->outq.vb_lock); + atomisp_videobuf_free_queue(&pipe->outq); + mutex_unlock(&pipe->outq.vb_lock); + return 0; + } + + return videobuf_reqbufs(&pipe->outq, req); +} + +/* application query the status of a buffer */ +static int atomisp_querybuf(struct file *file, void *fh, + struct v4l2_buffer *buf) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + + return videobuf_querybuf(&pipe->capq, buf); +} + +static int atomisp_querybuf_file(struct file *file, void *fh, + struct v4l2_buffer *buf) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + + return videobuf_querybuf(&pipe->outq, buf); +} + +/* + * Applications call the VIDIOC_QBUF ioctl to enqueue an empty (capturing) or + * filled (output) buffer in the drivers incoming queue. + */ +static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) +{ + static const int NOFLUSH_FLAGS = V4L2_BUF_FLAG_NO_CACHE_INVALIDATE | + V4L2_BUF_FLAG_NO_CACHE_CLEAN; + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct videobuf_buffer *vb; + struct videobuf_vmalloc_memory *vm_mem; + struct atomisp_css_frame_info frame_info; + struct atomisp_css_frame *handle = NULL; + u32 length; + u32 pgnr; + int ret = 0; + + rt_mutex_lock(&isp->mutex); + if (isp->isp_fatal_error) { + ret = -EIO; + goto error; + } + + if (asd->streaming == ATOMISP_DEVICE_STREAMING_STOPPING) { + dev_err(isp->dev, "%s: reject, as ISP at stopping.\n", + __func__); + ret = -EIO; + goto error; + } + + if (!buf || buf->index >= VIDEO_MAX_FRAME || + !pipe->capq.bufs[buf->index]) { + dev_err(isp->dev, "Invalid index for qbuf.\n"); + ret = -EINVAL; + goto error; + } + + /* + * For userptr type frame, we convert user space address to physic + * address and reprograme out page table properly + */ + if (buf->memory == V4L2_MEMORY_USERPTR) { + struct hrt_userbuffer_attr attributes; + vb = pipe->capq.bufs[buf->index]; + vm_mem = vb->priv; + if (!vm_mem) { + ret = -EINVAL; + goto error; + } + + length = vb->bsize; + pgnr = (length + (PAGE_SIZE - 1)) >> PAGE_SHIFT; + + if (vb->baddr == buf->m.userptr && vm_mem->vaddr) + goto done; + + if (atomisp_get_css_frame_info(asd, + atomisp_subdev_source_pad(vdev), &frame_info)) { + ret = -EIO; + goto error; + } + + attributes.pgnr = pgnr; +#ifdef CONFIG_ION +#ifndef ISP2401 + attributes.type = buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_ION + ? HRT_USR_ION : HRT_USR_PTR; +#else + if (buf->reserved & ATOMISP_BUFFER_TYPE_IS_ION) { + attributes.type = HRT_USR_ION; + if (asd->ion_dev_fd->val != ION_FD_UNSET) { + dev_dbg(isp->dev, "ION buffer queued, share_fd=%lddev_fd=%d.\n", + buf->m.userptr, asd->ion_dev_fd->val); + /* + * Make sure the shared fd we just got + * from user space isn't larger than + * the space we have for it. + */ + if ((buf->m.userptr & + (ATOMISP_ION_DEVICE_FD_MASK)) != 0) { + dev_err(isp->dev, + "Error: v4l2 buffer fd:0X%0lX > 0XFFFF.\n", + buf->m.userptr); + ret = -EINVAL; + goto error; + } + buf->m.userptr |= asd->ion_dev_fd->val << + ATOMISP_ION_DEVICE_FD_OFFSET; + } else { + dev_err(isp->dev, "v4l2 buffer type is ION, \ + but no dev fd set from userspace.\n"); + ret = -EINVAL; + goto error; + } + } else { + attributes.type = HRT_USR_PTR; + } +#endif +#else + attributes.type = HRT_USR_PTR; +#endif + ret = atomisp_css_frame_map(&handle, &frame_info, + (void __user *)buf->m.userptr, + 0, &attributes); + if (ret) { + dev_err(isp->dev, "Failed to map user buffer\n"); + goto error; + } + + if (vm_mem->vaddr) { + mutex_lock(&pipe->capq.vb_lock); + atomisp_css_frame_free(vm_mem->vaddr); + vm_mem->vaddr = NULL; + vb->state = VIDEOBUF_NEEDS_INIT; + mutex_unlock(&pipe->capq.vb_lock); + } + + vm_mem->vaddr = handle; + + buf->flags &= ~V4L2_BUF_FLAG_MAPPED; + buf->flags |= V4L2_BUF_FLAG_QUEUED; + buf->flags &= ~V4L2_BUF_FLAG_DONE; + } else if (buf->memory == V4L2_MEMORY_MMAP) { + buf->flags |= V4L2_BUF_FLAG_MAPPED; + buf->flags |= V4L2_BUF_FLAG_QUEUED; + buf->flags &= ~V4L2_BUF_FLAG_DONE; + } + +done: + if (!((buf->flags & NOFLUSH_FLAGS) == NOFLUSH_FLAGS)) + wbinvd(); + + if (!atomisp_is_vf_pipe(pipe) && + (buf->reserved2 & ATOMISP_BUFFER_HAS_PER_FRAME_SETTING)) { + /* this buffer will have a per-frame parameter */ + pipe->frame_request_config_id[buf->index] = buf->reserved2 & + ~ATOMISP_BUFFER_HAS_PER_FRAME_SETTING; + dev_dbg(isp->dev, "This buffer requires per_frame setting which has isp_config_id %d\n", + pipe->frame_request_config_id[buf->index]); + } else { + pipe->frame_request_config_id[buf->index] = 0; + } + + pipe->frame_params[buf->index] = NULL; + + rt_mutex_unlock(&isp->mutex); + + ret = videobuf_qbuf(&pipe->capq, buf); + rt_mutex_lock(&isp->mutex); + if (ret) + goto error; + + /* TODO: do this better, not best way to queue to css */ + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED) { + if (!list_empty(&pipe->buffers_waiting_for_param)) { + atomisp_handle_parameter_and_buffer(pipe); + } else { + atomisp_qbuffers_to_css(asd); + +#ifndef ISP2401 + if (!atomisp_is_wdt_running(asd) && atomisp_buffers_queued(asd)) + atomisp_wdt_start(asd); +#else + if (!atomisp_is_wdt_running(pipe) && + atomisp_buffers_queued_pipe(pipe)) + atomisp_wdt_start(pipe); +#endif + } + } + + /* Workaround: Due to the design of HALv3, + * sometimes in ZSL or SDV mode HAL needs to + * capture multiple images within one streaming cycle. + * But the capture number cannot be determined by HAL. + * So HAL only sets the capture number to be 1 and queue multiple + * buffers. Atomisp driver needs to check this case and re-trigger + * CSS to do capture when new buffer is queued. */ + if (asd->continuous_mode->val && + atomisp_subdev_source_pad(vdev) + == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE && + pipe->capq.streaming && + !asd->enable_raw_buffer_lock->val && + asd->params.offline_parm.num_captures == 1) { +#ifndef ISP2401 + asd->pending_capture_request++; + dev_dbg(isp->dev, "Add one pending capture request.\n"); +#else + if (asd->re_trigger_capture) { + ret = atomisp_css_offline_capture_configure(asd, + asd->params.offline_parm.num_captures, + asd->params.offline_parm.skip_frames, + asd->params.offline_parm.offset); + asd->re_trigger_capture = false; + dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n", + __func__, ret); + + } else { + asd->pending_capture_request++; + asd->re_trigger_capture = false; + dev_dbg(isp->dev, "Add one pending capture request.\n"); + } +#endif + } + rt_mutex_unlock(&isp->mutex); + + dev_dbg(isp->dev, "qbuf buffer %d (%s) for asd%d\n", buf->index, + vdev->name, asd->index); + + return ret; + +error: + rt_mutex_unlock(&isp->mutex); + return ret; +} + +static int atomisp_qbuf_file(struct file *file, void *fh, + struct v4l2_buffer *buf) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + int ret; + + rt_mutex_lock(&isp->mutex); + if (isp->isp_fatal_error) { + ret = -EIO; + goto error; + } + + if (!buf || buf->index >= VIDEO_MAX_FRAME || + !pipe->outq.bufs[buf->index]) { + dev_err(isp->dev, "Invalid index for qbuf.\n"); + ret = -EINVAL; + goto error; + } + + if (buf->memory != V4L2_MEMORY_MMAP) { + dev_err(isp->dev, "Unsupported memory method\n"); + ret = -EINVAL; + goto error; + } + + if (buf->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + dev_err(isp->dev, "Unsupported buffer type\n"); + ret = -EINVAL; + goto error; + } + rt_mutex_unlock(&isp->mutex); + + return videobuf_qbuf(&pipe->outq, buf); + +error: + rt_mutex_unlock(&isp->mutex); + + return ret; +} + +static int __get_frame_exp_id(struct atomisp_video_pipe *pipe, + struct v4l2_buffer *buf) +{ + struct videobuf_vmalloc_memory *vm_mem; + struct atomisp_css_frame *handle; + int i; + + for (i = 0; pipe->capq.bufs[i]; i++) { + vm_mem = pipe->capq.bufs[i]->priv; + handle = vm_mem->vaddr; + if (buf->index == pipe->capq.bufs[i]->i && handle) + return handle->exp_id; + } + return -EINVAL; +} + +/* + * Applications call the VIDIOC_DQBUF ioctl to dequeue a filled (capturing) or + * displayed (output buffer)from the driver's outgoing queue + */ +static int atomisp_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + int ret = 0; + + rt_mutex_lock(&isp->mutex); + + if (isp->isp_fatal_error) { + rt_mutex_unlock(&isp->mutex); + return -EIO; + } + + if (asd->streaming == ATOMISP_DEVICE_STREAMING_STOPPING) { + rt_mutex_unlock(&isp->mutex); + dev_err(isp->dev, "%s: reject, as ISP at stopping.\n", + __func__); + return -EIO; + } + + rt_mutex_unlock(&isp->mutex); + + ret = videobuf_dqbuf(&pipe->capq, buf, file->f_flags & O_NONBLOCK); + if (ret) { + dev_dbg(isp->dev, "<%s: %d\n", __func__, ret); + return ret; + } + rt_mutex_lock(&isp->mutex); + buf->bytesused = pipe->pix.sizeimage; + buf->reserved = asd->frame_status[buf->index]; + + /* + * Hack: + * Currently frame_status in the enum type which takes no more lower + * 8 bit. + * use bit[31:16] for exp_id as it is only in the range of 1~255 + */ + buf->reserved &= 0x0000ffff; + if (!(buf->flags & V4L2_BUF_FLAG_ERROR)) + buf->reserved |= __get_frame_exp_id(pipe, buf) << 16; + buf->reserved2 = pipe->frame_config_id[buf->index]; + rt_mutex_unlock(&isp->mutex); + + dev_dbg(isp->dev, "dqbuf buffer %d (%s) for asd%d with exp_id %d, isp_config_id %d\n", + buf->index, vdev->name, asd->index, buf->reserved >> 16, + buf->reserved2); + return 0; +} + +enum atomisp_css_pipe_id atomisp_get_css_pipe_id(struct atomisp_sub_device *asd) +{ + if (ATOMISP_USE_YUVPP(asd)) + return CSS_PIPE_ID_YUVPP; + + if (asd->continuous_mode->val) { + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) + return CSS_PIPE_ID_VIDEO; + else + return CSS_PIPE_ID_PREVIEW; + } + + /* + * Disable vf_pp and run CSS in video mode. This allows using ISP + * scaling but it has one frame delay due to CSS internal buffering. + */ + if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) + return CSS_PIPE_ID_VIDEO; + + /* + * Disable vf_pp and run CSS in still capture mode. In this mode + * CSS does not cause extra latency with buffering, but scaling + * is not available. + */ + if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) + return CSS_PIPE_ID_CAPTURE; + + switch (asd->run_mode->val) { + case ATOMISP_RUN_MODE_PREVIEW: + return CSS_PIPE_ID_PREVIEW; + case ATOMISP_RUN_MODE_VIDEO: + return CSS_PIPE_ID_VIDEO; + case ATOMISP_RUN_MODE_STILL_CAPTURE: + /* fall through */ + default: + return CSS_PIPE_ID_CAPTURE; + } +} + +static unsigned int atomisp_sensor_start_stream(struct atomisp_sub_device *asd) +{ + struct atomisp_device *isp = asd->isp; + + if (isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num > 1) { + if (asd->high_speed_mode) + return 1; + else + return 2; + } + + if (asd->vfpp->val != ATOMISP_VFPP_ENABLE || + asd->copy_mode) + return 1; + + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO || + (asd->run_mode->val == ATOMISP_RUN_MODE_STILL_CAPTURE && + !atomisp_is_mbuscode_raw( + asd->fmt[ + asd->capture_pad].fmt.code) && + !asd->continuous_mode->val)) + return 2; + else + return 1; +} + +int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, + bool isp_timeout) +{ + unsigned int master = -1, slave = -1, delay_slave = 0; + int i, ret; + + /* + * ISP only support 2 streams now so ignore multiple master/slave + * case to reduce the delay between 2 stream_on calls. + */ + for (i = 0; i < isp->num_of_streams; i++) { + int sensor_index = isp->asd[i].input_curr; + if (isp->inputs[sensor_index].camera_caps-> + sensor[isp->asd[i].sensor_curr].is_slave) + slave = sensor_index; + else + master = sensor_index; + } + + if (master == -1 || slave == -1) { + master = ATOMISP_DEPTH_DEFAULT_MASTER_SENSOR; + slave = ATOMISP_DEPTH_DEFAULT_SLAVE_SENSOR; + dev_warn(isp->dev, + "depth mode use default master=%s.slave=%s.\n", + isp->inputs[master].camera->name, + isp->inputs[slave].camera->name); + } + + ret = v4l2_subdev_call(isp->inputs[master].camera, core, + ioctl, ATOMISP_IOC_G_DEPTH_SYNC_COMP, + &delay_slave); + if (ret) + dev_warn(isp->dev, + "get depth sensor %s compensation delay failed.\n", + isp->inputs[master].camera->name); + + ret = v4l2_subdev_call(isp->inputs[master].camera, + video, s_stream, 1); + if (ret) { + dev_err(isp->dev, "depth mode master sensor %s stream-on failed.\n", + isp->inputs[master].camera->name); + return -EINVAL; + } + + if (delay_slave != 0) + udelay(delay_slave); + + ret = v4l2_subdev_call(isp->inputs[slave].camera, + video, s_stream, 1); + if (ret) { + dev_err(isp->dev, "depth mode slave sensor %s stream-on failed.\n", + isp->inputs[slave].camera->name); + v4l2_subdev_call(isp->inputs[master].camera, video, s_stream, 0); + + return -EINVAL; + } + + return 0; +} + +/* FIXME! */ +#ifndef ISP2401 +static void __wdt_on_master_slave_sensor(struct atomisp_device *isp, + unsigned int wdt_duration) +#else +static void __wdt_on_master_slave_sensor(struct atomisp_video_pipe *pipe, + unsigned int wdt_duration, + bool enable) +#endif +{ +#ifndef ISP2401 + if (atomisp_buffers_queued(&isp->asd[0])) + atomisp_wdt_refresh(&isp->asd[0], wdt_duration); + if (atomisp_buffers_queued(&isp->asd[1])) + atomisp_wdt_refresh(&isp->asd[1], wdt_duration); +#else + static struct atomisp_video_pipe *pipe0; + + if (enable) { + if (atomisp_buffers_queued_pipe(pipe0)) + atomisp_wdt_refresh_pipe(pipe0, wdt_duration); + if (atomisp_buffers_queued_pipe(pipe)) + atomisp_wdt_refresh_pipe(pipe, wdt_duration); + } else { + pipe0 = pipe; + } +#endif +} + +static void atomisp_pause_buffer_event(struct atomisp_device *isp) +{ + struct v4l2_event event = {0}; + int i; + + event.type = V4L2_EVENT_ATOMISP_PAUSE_BUFFER; + + for (i = 0; i < isp->num_of_streams; i++) { + int sensor_index = isp->asd[i].input_curr; + if (isp->inputs[sensor_index].camera_caps-> + sensor[isp->asd[i].sensor_curr].is_slave) { + v4l2_event_queue(isp->asd[i].subdev.devnode, &event); + break; + } + } +} + +/* Input system HW workaround */ +/* Input system address translation corrupts burst during */ +/* invalidate. SW workaround for this is to set burst length */ +/* manually to 128 in case of 13MPx snapshot and to 1 otherwise. */ +static void atomisp_dma_burst_len_cfg(struct atomisp_sub_device *asd) +{ + + struct v4l2_mbus_framefmt *sink; + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); + + if (sink->width * sink->height >= 4096*3072) + atomisp_store_uint32(DMA_BURST_SIZE_REG, 0x7F); + else + atomisp_store_uint32(DMA_BURST_SIZE_REG, 0x00); +} + +/* + * This ioctl start the capture during streaming I/O. + */ +static int atomisp_streamon(struct file *file, void *fh, + enum v4l2_buf_type type) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + enum atomisp_css_pipe_id css_pipe_id; + unsigned int sensor_start_stream; + unsigned int wdt_duration = ATOMISP_ISP_TIMEOUT_DURATION; + int ret = 0; + unsigned long irqflags; + + dev_dbg(isp->dev, "Start stream on pad %d for asd%d\n", + atomisp_subdev_source_pad(vdev), asd->index); + + if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + dev_dbg(isp->dev, "unsupported v4l2 buf type\n"); + return -EINVAL; + } + + rt_mutex_lock(&isp->mutex); + if (isp->isp_fatal_error) { + ret = -EIO; + goto out; + } + + if (asd->streaming == ATOMISP_DEVICE_STREAMING_STOPPING) { + ret = -EBUSY; + goto out; + } + + if (pipe->capq.streaming) + goto out; + + /* Input system HW workaround */ + atomisp_dma_burst_len_cfg(asd); + + /* + * The number of streaming video nodes is based on which + * binary is going to be run. + */ + sensor_start_stream = atomisp_sensor_start_stream(asd); + + spin_lock_irqsave(&pipe->irq_lock, irqflags); + if (list_empty(&(pipe->capq.stream))) { + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + dev_dbg(isp->dev, "no buffer in the queue\n"); + ret = -EINVAL; + goto out; + } + spin_unlock_irqrestore(&pipe->irq_lock, irqflags); + + ret = videobuf_streamon(&pipe->capq); + if (ret) + goto out; + + /* Reset pending capture request count. */ + asd->pending_capture_request = 0; +#ifdef ISP2401 + asd->re_trigger_capture = false; +#endif + + if ((atomisp_subdev_streaming_count(asd) > sensor_start_stream) && + (!isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl)) { + /* trigger still capture */ + if (asd->continuous_mode->val && + atomisp_subdev_source_pad(vdev) + == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) { + if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) + dev_dbg(isp->dev, "SDV last video raw buffer id: %u\n", + asd->latest_preview_exp_id); + else + dev_dbg(isp->dev, "ZSL last preview raw buffer id: %u\n", + asd->latest_preview_exp_id); + + if (asd->delayed_init == ATOMISP_DELAYED_INIT_QUEUED) { + flush_work(&asd->delayed_init_work); + rt_mutex_unlock(&isp->mutex); + if (wait_for_completion_interruptible( + &asd->init_done) != 0) + return -ERESTARTSYS; + rt_mutex_lock(&isp->mutex); + } + + /* handle per_frame_setting parameter and buffers */ + atomisp_handle_parameter_and_buffer(pipe); + + /* + * only ZSL/SDV capture request will be here, raise + * the ISP freq to the highest possible to minimize + * the S2S latency. + */ + atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_MAX, false); + /* + * When asd->enable_raw_buffer_lock->val is true, + * An extra IOCTL is needed to call + * atomisp_css_exp_id_capture and trigger real capture + */ + if (!asd->enable_raw_buffer_lock->val) { + ret = atomisp_css_offline_capture_configure(asd, + asd->params.offline_parm.num_captures, + asd->params.offline_parm.skip_frames, + asd->params.offline_parm.offset); + if (ret) { + ret = -EINVAL; + goto out; + } + if (asd->depth_mode->val) + atomisp_pause_buffer_event(isp); + } + } + atomisp_qbuffers_to_css(asd); + goto out; + } + + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED) { + atomisp_qbuffers_to_css(asd); + goto start_sensor; + } + + css_pipe_id = atomisp_get_css_pipe_id(asd); + + ret = atomisp_acc_load_extensions(asd); + if (ret < 0) { + dev_err(isp->dev, "acc extension failed to load\n"); + goto out; + } + + if (asd->params.css_update_params_needed) { + atomisp_apply_css_parameters(asd, &asd->params.css_param); + if (asd->params.css_param.update_flag.dz_config) + atomisp_css_set_dz_config(asd, + &asd->params.css_param.dz_config); + atomisp_css_update_isp_params(asd); + asd->params.css_update_params_needed = false; + memset(&asd->params.css_param.update_flag, 0, + sizeof(struct atomisp_parameters)); + } + asd->params.dvs_6axis = NULL; + + ret = atomisp_css_start(asd, css_pipe_id, false); + if (ret) + goto out; + + asd->streaming = ATOMISP_DEVICE_STREAMING_ENABLED; + atomic_set(&asd->sof_count, -1); + atomic_set(&asd->sequence, -1); + atomic_set(&asd->sequence_temp, -1); + if (isp->sw_contex.file_input) + wdt_duration = ATOMISP_ISP_FILE_TIMEOUT_DURATION; + + asd->params.dis_proj_data_valid = false; + asd->latest_preview_exp_id = 0; + asd->postview_exp_id = 1; + asd->preview_exp_id = 1; + + /* handle per_frame_setting parameter and buffers */ + atomisp_handle_parameter_and_buffer(pipe); + + atomisp_qbuffers_to_css(asd); + + /* Only start sensor when the last streaming instance started */ + if (atomisp_subdev_streaming_count(asd) < sensor_start_stream) + goto out; + +start_sensor: + if (isp->flash) { + asd->params.num_flash_frames = 0; + asd->params.flash_state = ATOMISP_FLASH_IDLE; + atomisp_setup_flash(asd); + } + + if (!isp->sw_contex.file_input) { + atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF, + atomisp_css_valid_sof(isp)); + atomisp_csi2_configure(asd); + /* + * set freq to max when streaming count > 1 which indicate + * dual camera would run + */ + if (atomisp_streaming_count(isp) > 1) { + if (atomisp_freq_scaling(isp, + ATOMISP_DFS_MODE_MAX, false) < 0) + dev_dbg(isp->dev, "dfs failed!\n"); + } else { + if (atomisp_freq_scaling(isp, + ATOMISP_DFS_MODE_AUTO, false) < 0) + dev_dbg(isp->dev, "dfs failed!\n"); + } + } else { + if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_MAX, false) < 0) + dev_dbg(isp->dev, "dfs failed!\n"); + } + + if (asd->depth_mode->val && atomisp_streaming_count(isp) == + ATOMISP_DEPTH_SENSOR_STREAMON_COUNT) { + ret = atomisp_stream_on_master_slave_sensor(isp, false); + if (ret) { + dev_err(isp->dev, "master slave sensor stream on failed!\n"); + goto out; + } +#ifndef ISP2401 + __wdt_on_master_slave_sensor(isp, wdt_duration); +#else + __wdt_on_master_slave_sensor(pipe, wdt_duration, true); +#endif + goto start_delay_wq; + } else if (asd->depth_mode->val && (atomisp_streaming_count(isp) < + ATOMISP_DEPTH_SENSOR_STREAMON_COUNT)) { +#ifdef ISP2401 + __wdt_on_master_slave_sensor(pipe, wdt_duration, false); +#endif + goto start_delay_wq; + } + + /* Enable the CSI interface on ANN B0/K0 */ + if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 << + ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) { + pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL, + isp->saved_regs.csi_control | + MRFLD_PCI_CSI_CONTROL_CSI_READY); + } + + /* stream on the sensor */ + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + video, s_stream, 1); + if (ret) { + asd->streaming = ATOMISP_DEVICE_STREAMING_DISABLED; + ret = -EINVAL; + goto out; + } + +#ifndef ISP2401 + if (atomisp_buffers_queued(asd)) + atomisp_wdt_refresh(asd, wdt_duration); +#else + if (atomisp_buffers_queued_pipe(pipe)) + atomisp_wdt_refresh_pipe(pipe, wdt_duration); +#endif + +start_delay_wq: + if (asd->continuous_mode->val) { + struct v4l2_mbus_framefmt *sink; + + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); + + reinit_completion(&asd->init_done); + asd->delayed_init = ATOMISP_DELAYED_INIT_QUEUED; + queue_work(asd->delayed_init_workq, &asd->delayed_init_work); + atomisp_css_set_cont_prev_start_time(isp, + ATOMISP_CALC_CSS_PREV_OVERLAP(sink->height)); + } else { + asd->delayed_init = ATOMISP_DELAYED_INIT_NOT_QUEUED; + } +out: + rt_mutex_unlock(&isp->mutex); + return ret; +} + +int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); + struct atomisp_sub_device *asd = pipe->asd; + struct atomisp_video_pipe *capture_pipe = NULL; + struct atomisp_video_pipe *vf_pipe = NULL; + struct atomisp_video_pipe *preview_pipe = NULL; + struct atomisp_video_pipe *video_pipe = NULL; + struct videobuf_buffer *vb, *_vb; + enum atomisp_css_pipe_id css_pipe_id; + int ret; + unsigned long flags; + bool first_streamoff = false; + + dev_dbg(isp->dev, "Stop stream on pad %d for asd%d\n", + atomisp_subdev_source_pad(vdev), asd->index); + + BUG_ON(!rt_mutex_is_locked(&isp->mutex)); + BUG_ON(!mutex_is_locked(&isp->streamoff_mutex)); + + if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + dev_dbg(isp->dev, "unsupported v4l2 buf type\n"); + return -EINVAL; + } + + /* + * do only videobuf_streamoff for capture & vf pipes in + * case of continuous capture + */ + if ((asd->continuous_mode->val || + isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) && + atomisp_subdev_source_pad(vdev) != + ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && + atomisp_subdev_source_pad(vdev) != + ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { + + if (isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) { + v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + video, s_stream, 0); + } else if (atomisp_subdev_source_pad(vdev) + == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) { + /* stop continuous still capture if needed */ + if (asd->params.offline_parm.num_captures == -1) + atomisp_css_offline_capture_configure(asd, + 0, 0, 0); + atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_AUTO, false); + } + /* + * Currently there is no way to flush buffers queued to css. + * When doing videobuf_streamoff, active buffers will be + * marked as VIDEOBUF_NEEDS_INIT. HAL will be able to use + * these buffers again, and these buffers might be queued to + * css more than once! Warn here, if HAL has not dequeued all + * buffers back before calling streamoff. + */ + if (pipe->buffers_in_css != 0) { + WARN(1, "%s: buffers of vdev %s still in CSS!\n", + __func__, pipe->vdev.name); + + /* + * Buffers remained in css maybe dequeued out in the + * next stream on, while this will causes serious + * issues as buffers already get invalid after + * previous stream off. + * + * No way to flush buffers but to reset the whole css + */ + dev_warn(isp->dev, "Reset CSS to clean up css buffers.\n"); + atomisp_css_flush(isp); + } + + return videobuf_streamoff(&pipe->capq); + } + + if (!pipe->capq.streaming) + return 0; + + spin_lock_irqsave(&isp->lock, flags); + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED) { + asd->streaming = ATOMISP_DEVICE_STREAMING_STOPPING; + first_streamoff = true; + } + spin_unlock_irqrestore(&isp->lock, flags); + + if (first_streamoff) { + /* if other streams are running, should not disable watch dog */ + rt_mutex_unlock(&isp->mutex); + atomisp_wdt_stop(asd, true); + + /* + * must stop sending pixels into GP_FIFO before stop + * the pipeline. + */ + if (isp->sw_contex.file_input) + v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + video, s_stream, 0); + + rt_mutex_lock(&isp->mutex); + atomisp_acc_unload_extensions(asd); + } + + spin_lock_irqsave(&isp->lock, flags); + if (atomisp_subdev_streaming_count(asd) == 1) + asd->streaming = ATOMISP_DEVICE_STREAMING_DISABLED; + spin_unlock_irqrestore(&isp->lock, flags); + + if (!first_streamoff) { + ret = videobuf_streamoff(&pipe->capq); + if (ret) + return ret; + goto stopsensor; + } + + atomisp_clear_css_buffer_counters(asd); + + if (!isp->sw_contex.file_input) + atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF, + false); + + if (asd->delayed_init == ATOMISP_DELAYED_INIT_QUEUED) { + cancel_work_sync(&asd->delayed_init_work); + asd->delayed_init = ATOMISP_DELAYED_INIT_NOT_QUEUED; + } + if (first_streamoff) { + css_pipe_id = atomisp_get_css_pipe_id(asd); + ret = atomisp_css_stop(asd, css_pipe_id, false); + } + /* cancel work queue*/ + if (asd->video_out_capture.users) { + capture_pipe = &asd->video_out_capture; + wake_up_interruptible(&capture_pipe->capq.wait); + } + if (asd->video_out_vf.users) { + vf_pipe = &asd->video_out_vf; + wake_up_interruptible(&vf_pipe->capq.wait); + } + if (asd->video_out_preview.users) { + preview_pipe = &asd->video_out_preview; + wake_up_interruptible(&preview_pipe->capq.wait); + } + if (asd->video_out_video_capture.users) { + video_pipe = &asd->video_out_video_capture; + wake_up_interruptible(&video_pipe->capq.wait); + } + ret = videobuf_streamoff(&pipe->capq); + if (ret) + return ret; + + /* cleanup css here */ + /* no need for this, as ISP will be reset anyway */ + /*atomisp_flush_bufs_in_css(isp);*/ + + spin_lock_irqsave(&pipe->irq_lock, flags); + list_for_each_entry_safe(vb, _vb, &pipe->activeq, queue) { + vb->state = VIDEOBUF_PREPARED; + list_del(&vb->queue); + } + list_for_each_entry_safe(vb, _vb, &pipe->buffers_waiting_for_param, queue) { + vb->state = VIDEOBUF_PREPARED; + list_del(&vb->queue); + pipe->frame_request_config_id[vb->i] = 0; + } + spin_unlock_irqrestore(&pipe->irq_lock, flags); + + atomisp_subdev_cleanup_pending_events(asd); +stopsensor: + if (atomisp_subdev_streaming_count(asd) + 1 + != atomisp_sensor_start_stream(asd)) + return 0; + + if (!isp->sw_contex.file_input) + ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + video, s_stream, 0); + + if (isp->flash) { + asd->params.num_flash_frames = 0; + asd->params.flash_state = ATOMISP_FLASH_IDLE; + } + + /* if other streams are running, isp should not be powered off */ + if (atomisp_streaming_count(isp)) { + atomisp_css_flush(isp); + return 0; + } + + /* Disable the CSI interface on ANN B0/K0 */ + if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 << + ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) { + pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL, + isp->saved_regs.csi_control & + ~MRFLD_PCI_CSI_CONTROL_CSI_READY); + } + + if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, false)) + dev_warn(isp->dev, "DFS failed.\n"); + /* + * ISP work around, need to reset isp + * Is it correct time to reset ISP when first node does streamoff? + */ + if (isp->sw_contex.power_state == ATOM_ISP_POWER_UP) { + unsigned int i; + bool recreate_streams[MAX_STREAM_NUM] = {0}; + if (isp->isp_timeout) + dev_err(isp->dev, "%s: Resetting with WA activated", + __func__); + /* + * It is possible that the other asd stream is in the stage + * that v4l2_setfmt is just get called on it, which will + * create css stream on that stream. But at this point, there + * is no way to destroy the css stream created on that stream. + * + * So force stream destroy here. + */ + for (i = 0; i < isp->num_of_streams; i++) { + if (isp->asd[i].stream_prepared) { + atomisp_destroy_pipes_stream_force(&isp-> + asd[i]); + recreate_streams[i] = true; + } + } + + /* disable PUNIT/ISP acknowlede/handshake - SRSE=3 */ + pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control | + MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK); + dev_err(isp->dev, "atomisp_reset"); + atomisp_reset(isp); + for (i = 0; i < isp->num_of_streams; i++) { + if (recreate_streams[i]) + atomisp_create_pipes_stream(&isp->asd[i]); + } + isp->isp_timeout = false; + } + return ret; +} + +static int atomisp_streamoff(struct file *file, void *fh, + enum v4l2_buf_type type) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + int rval; + + mutex_lock(&isp->streamoff_mutex); + rt_mutex_lock(&isp->mutex); + rval = __atomisp_streamoff(file, fh, type); + rt_mutex_unlock(&isp->mutex); + mutex_unlock(&isp->streamoff_mutex); + + return rval; +} + +/* + * To get the current value of a control. + * applications initialize the id field of a struct v4l2_control and + * call this ioctl with a pointer to this structure + */ +static int atomisp_g_ctrl(struct file *file, void *fh, + struct v4l2_control *control) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + int i, ret = -EINVAL; + + for (i = 0; i < ctrls_num; i++) { + if (ci_v4l2_controls[i].id == control->id) { + ret = 0; + break; + } + } + + if (ret) + return ret; + + rt_mutex_lock(&isp->mutex); + + switch (control->id) { + case V4L2_CID_IRIS_ABSOLUTE: + case V4L2_CID_EXPOSURE_ABSOLUTE: + case V4L2_CID_FNUMBER_ABSOLUTE: + case V4L2_CID_2A_STATUS: + case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: + case V4L2_CID_EXPOSURE: + case V4L2_CID_EXPOSURE_AUTO: + case V4L2_CID_SCENE_MODE: + case V4L2_CID_ISO_SENSITIVITY: + case V4L2_CID_ISO_SENSITIVITY_AUTO: + case V4L2_CID_CONTRAST: + case V4L2_CID_SATURATION: + case V4L2_CID_SHARPNESS: + case V4L2_CID_3A_LOCK: + case V4L2_CID_EXPOSURE_ZONE_NUM: + case V4L2_CID_TEST_PATTERN: + case V4L2_CID_TEST_PATTERN_COLOR_R: + case V4L2_CID_TEST_PATTERN_COLOR_GR: + case V4L2_CID_TEST_PATTERN_COLOR_GB: + case V4L2_CID_TEST_PATTERN_COLOR_B: + rt_mutex_unlock(&isp->mutex); + return v4l2_g_ctrl(isp->inputs[asd->input_curr].camera-> + ctrl_handler, control); + case V4L2_CID_COLORFX: + ret = atomisp_color_effect(asd, 0, &control->value); + break; + case V4L2_CID_ATOMISP_BAD_PIXEL_DETECTION: + ret = atomisp_bad_pixel(asd, 0, &control->value); + break; + case V4L2_CID_ATOMISP_POSTPROCESS_GDC_CAC: + ret = atomisp_gdc_cac(asd, 0, &control->value); + break; + case V4L2_CID_ATOMISP_VIDEO_STABLIZATION: + ret = atomisp_video_stable(asd, 0, &control->value); + break; + case V4L2_CID_ATOMISP_FIXED_PATTERN_NR: + ret = atomisp_fixed_pattern(asd, 0, &control->value); + break; + case V4L2_CID_ATOMISP_FALSE_COLOR_CORRECTION: + ret = atomisp_false_color(asd, 0, &control->value); + break; + case V4L2_CID_ATOMISP_LOW_LIGHT: + ret = atomisp_low_light(asd, 0, &control->value); + break; + default: + ret = -EINVAL; + break; + } + + rt_mutex_unlock(&isp->mutex); + return ret; +} + +/* + * To change the value of a control. + * applications initialize the id and value fields of a struct v4l2_control + * and call this ioctl. + */ +static int atomisp_s_ctrl(struct file *file, void *fh, + struct v4l2_control *control) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + int i, ret = -EINVAL; + + for (i = 0; i < ctrls_num; i++) { + if (ci_v4l2_controls[i].id == control->id) { + ret = 0; + break; + } + } + + if (ret) + return ret; + + rt_mutex_lock(&isp->mutex); + switch (control->id) { + case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: + case V4L2_CID_EXPOSURE: + case V4L2_CID_EXPOSURE_AUTO: + case V4L2_CID_EXPOSURE_AUTO_PRIORITY: + case V4L2_CID_SCENE_MODE: + case V4L2_CID_ISO_SENSITIVITY: + case V4L2_CID_ISO_SENSITIVITY_AUTO: + case V4L2_CID_POWER_LINE_FREQUENCY: + case V4L2_CID_EXPOSURE_METERING: + case V4L2_CID_CONTRAST: + case V4L2_CID_SATURATION: + case V4L2_CID_SHARPNESS: + case V4L2_CID_3A_LOCK: + case V4L2_CID_COLORFX_CBCR: + case V4L2_CID_TEST_PATTERN: + case V4L2_CID_TEST_PATTERN_COLOR_R: + case V4L2_CID_TEST_PATTERN_COLOR_GR: + case V4L2_CID_TEST_PATTERN_COLOR_GB: + case V4L2_CID_TEST_PATTERN_COLOR_B: + rt_mutex_unlock(&isp->mutex); + return v4l2_s_ctrl(NULL, + isp->inputs[asd->input_curr].camera-> + ctrl_handler, control); + case V4L2_CID_COLORFX: + ret = atomisp_color_effect(asd, 1, &control->value); + break; + case V4L2_CID_ATOMISP_BAD_PIXEL_DETECTION: + ret = atomisp_bad_pixel(asd, 1, &control->value); + break; + case V4L2_CID_ATOMISP_POSTPROCESS_GDC_CAC: + ret = atomisp_gdc_cac(asd, 1, &control->value); + break; + case V4L2_CID_ATOMISP_VIDEO_STABLIZATION: + ret = atomisp_video_stable(asd, 1, &control->value); + break; + case V4L2_CID_ATOMISP_FIXED_PATTERN_NR: + ret = atomisp_fixed_pattern(asd, 1, &control->value); + break; + case V4L2_CID_ATOMISP_FALSE_COLOR_CORRECTION: + ret = atomisp_false_color(asd, 1, &control->value); + break; + case V4L2_CID_REQUEST_FLASH: + ret = atomisp_flash_enable(asd, control->value); + break; + case V4L2_CID_ATOMISP_LOW_LIGHT: + ret = atomisp_low_light(asd, 1, &control->value); + break; + default: + ret = -EINVAL; + break; + } + rt_mutex_unlock(&isp->mutex); + return ret; +} +/* + * To query the attributes of a control. + * applications set the id field of a struct v4l2_queryctrl and call the + * this ioctl with a pointer to this structure. The driver fills + * the rest of the structure. + */ +static int atomisp_queryctl(struct file *file, void *fh, + struct v4l2_queryctrl *qc) +{ + int i, ret = -EINVAL; + struct video_device *vdev = video_devdata(file); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + + switch (qc->id) { + case V4L2_CID_FOCUS_ABSOLUTE: + case V4L2_CID_FOCUS_RELATIVE: + case V4L2_CID_FOCUS_STATUS: +#ifndef ISP2401 + return v4l2_queryctrl(isp->inputs[asd->input_curr].camera-> + ctrl_handler, qc); +#else + if (isp->motor) + return v4l2_queryctrl(isp->motor->ctrl_handler, qc); + else + return v4l2_queryctrl(isp->inputs[asd->input_curr]. + camera->ctrl_handler, qc); +#endif + } + + if (qc->id & V4L2_CTRL_FLAG_NEXT_CTRL) + return ret; + + for (i = 0; i < ctrls_num; i++) { + if (ci_v4l2_controls[i].id == qc->id) { + memcpy(qc, &ci_v4l2_controls[i], + sizeof(struct v4l2_queryctrl)); + qc->reserved[0] = 0; + ret = 0; + break; + } + } + if (ret != 0) + qc->flags = V4L2_CTRL_FLAG_DISABLED; + + return ret; +} + +static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, + struct v4l2_ext_controls *c) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + struct v4l2_control ctrl; + int i; + int ret = 0; + + for (i = 0; i < c->count; i++) { + ctrl.id = c->controls[i].id; + ctrl.value = c->controls[i].value; + switch (ctrl.id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + case V4L2_CID_EXPOSURE_AUTO: + case V4L2_CID_IRIS_ABSOLUTE: + case V4L2_CID_FNUMBER_ABSOLUTE: + case V4L2_CID_BIN_FACTOR_HORZ: + case V4L2_CID_BIN_FACTOR_VERT: + case V4L2_CID_3A_LOCK: + case V4L2_CID_TEST_PATTERN: + case V4L2_CID_TEST_PATTERN_COLOR_R: + case V4L2_CID_TEST_PATTERN_COLOR_GR: + case V4L2_CID_TEST_PATTERN_COLOR_GB: + case V4L2_CID_TEST_PATTERN_COLOR_B: + /* + * Exposure related control will be handled by sensor + * driver + */ + ret = + v4l2_g_ctrl(isp->inputs[asd->input_curr].camera-> + ctrl_handler, &ctrl); + break; + case V4L2_CID_FOCUS_ABSOLUTE: + case V4L2_CID_FOCUS_RELATIVE: + case V4L2_CID_FOCUS_STATUS: + case V4L2_CID_FOCUS_AUTO: +#ifndef ISP2401 + if (isp->inputs[asd->input_curr].motor) +#else + if (isp->motor) +#endif + ret = +#ifndef ISP2401 + v4l2_g_ctrl(isp->inputs[asd->input_curr]. + motor->ctrl_handler, &ctrl); +#else + v4l2_g_ctrl(isp->motor->ctrl_handler, + &ctrl); +#endif + else + ret = + v4l2_g_ctrl(isp->inputs[asd->input_curr]. + camera->ctrl_handler, &ctrl); + break; + case V4L2_CID_FLASH_STATUS: + case V4L2_CID_FLASH_INTENSITY: + case V4L2_CID_FLASH_TORCH_INTENSITY: + case V4L2_CID_FLASH_INDICATOR_INTENSITY: + case V4L2_CID_FLASH_TIMEOUT: + case V4L2_CID_FLASH_STROBE: + case V4L2_CID_FLASH_MODE: + case V4L2_CID_FLASH_STATUS_REGISTER: + if (isp->flash) + ret = + v4l2_g_ctrl(isp->flash->ctrl_handler, + &ctrl); + break; + case V4L2_CID_ZOOM_ABSOLUTE: + rt_mutex_lock(&isp->mutex); + ret = atomisp_digital_zoom(asd, 0, &ctrl.value); + rt_mutex_unlock(&isp->mutex); + break; + case V4L2_CID_G_SKIP_FRAMES: + ret = v4l2_subdev_call( + isp->inputs[asd->input_curr].camera, + sensor, g_skip_frames, (u32 *)&ctrl.value); + break; + default: + ret = -EINVAL; + } + + if (ret) { + c->error_idx = i; + break; + } + c->controls[i].value = ctrl.value; + } + return ret; +} + +/* This ioctl allows the application to get multiple controls by class */ +static int atomisp_g_ext_ctrls(struct file *file, void *fh, + struct v4l2_ext_controls *c) +{ + struct v4l2_control ctrl; + int i, ret = 0; + + /* input_lock is not need for the Camera releated IOCTLs + * The input_lock downgrade the FPS of 3A*/ + ret = atomisp_camera_g_ext_ctrls(file, fh, c); + if (ret != -EINVAL) + return ret; + + for (i = 0; i < c->count; i++) { + ctrl.id = c->controls[i].id; + ctrl.value = c->controls[i].value; + ret = atomisp_g_ctrl(file, fh, &ctrl); + c->controls[i].value = ctrl.value; + if (ret) { + c->error_idx = i; + break; + } + } + return ret; +} + +static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, + struct v4l2_ext_controls *c) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + struct v4l2_control ctrl; + int i; + int ret = 0; + + for (i = 0; i < c->count; i++) { + struct v4l2_ctrl *ctr; + + ctrl.id = c->controls[i].id; + ctrl.value = c->controls[i].value; + switch (ctrl.id) { + case V4L2_CID_EXPOSURE_ABSOLUTE: + case V4L2_CID_EXPOSURE_AUTO: + case V4L2_CID_EXPOSURE_METERING: + case V4L2_CID_IRIS_ABSOLUTE: + case V4L2_CID_FNUMBER_ABSOLUTE: + case V4L2_CID_VCM_TIMEING: + case V4L2_CID_VCM_SLEW: + case V4L2_CID_3A_LOCK: + case V4L2_CID_TEST_PATTERN: + case V4L2_CID_TEST_PATTERN_COLOR_R: + case V4L2_CID_TEST_PATTERN_COLOR_GR: + case V4L2_CID_TEST_PATTERN_COLOR_GB: + case V4L2_CID_TEST_PATTERN_COLOR_B: + ret = v4l2_s_ctrl(NULL, + isp->inputs[asd->input_curr].camera-> + ctrl_handler, &ctrl); + break; + case V4L2_CID_FOCUS_ABSOLUTE: + case V4L2_CID_FOCUS_RELATIVE: + case V4L2_CID_FOCUS_STATUS: + case V4L2_CID_FOCUS_AUTO: +#ifndef ISP2401 + if (isp->inputs[asd->input_curr].motor) +#else + if (isp->motor) +#endif + ret = v4l2_s_ctrl(NULL, +#ifndef ISP2401 + isp->inputs[asd->input_curr]. + motor->ctrl_handler, &ctrl); +#else + isp->motor->ctrl_handler, + &ctrl); +#endif + else + ret = v4l2_s_ctrl(NULL, + isp->inputs[asd->input_curr]. + camera->ctrl_handler, &ctrl); + break; + case V4L2_CID_FLASH_STATUS: + case V4L2_CID_FLASH_INTENSITY: + case V4L2_CID_FLASH_TORCH_INTENSITY: + case V4L2_CID_FLASH_INDICATOR_INTENSITY: + case V4L2_CID_FLASH_TIMEOUT: + case V4L2_CID_FLASH_STROBE: + case V4L2_CID_FLASH_MODE: + case V4L2_CID_FLASH_STATUS_REGISTER: + rt_mutex_lock(&isp->mutex); + if (isp->flash) { + ret = + v4l2_s_ctrl(NULL, isp->flash->ctrl_handler, + &ctrl); + /* When flash mode is changed we need to reset + * flash state */ + if (ctrl.id == V4L2_CID_FLASH_MODE) { + asd->params.flash_state = + ATOMISP_FLASH_IDLE; + asd->params.num_flash_frames = 0; + } + } + rt_mutex_unlock(&isp->mutex); + break; + case V4L2_CID_ZOOM_ABSOLUTE: + rt_mutex_lock(&isp->mutex); + ret = atomisp_digital_zoom(asd, 1, &ctrl.value); + rt_mutex_unlock(&isp->mutex); + break; + default: + ctr = v4l2_ctrl_find(&asd->ctrl_handler, ctrl.id); + if (ctr) + ret = v4l2_ctrl_s_ctrl(ctr, ctrl.value); + else + ret = -EINVAL; + } + + if (ret) { + c->error_idx = i; + break; + } + c->controls[i].value = ctrl.value; + } + return ret; +} + +/* This ioctl allows the application to set multiple controls by class */ +static int atomisp_s_ext_ctrls(struct file *file, void *fh, + struct v4l2_ext_controls *c) +{ + struct v4l2_control ctrl; + int i, ret = 0; + + /* input_lock is not need for the Camera releated IOCTLs + * The input_lock downgrade the FPS of 3A*/ + ret = atomisp_camera_s_ext_ctrls(file, fh, c); + if (ret != -EINVAL) + return ret; + + for (i = 0; i < c->count; i++) { + ctrl.id = c->controls[i].id; + ctrl.value = c->controls[i].value; + ret = atomisp_s_ctrl(file, fh, &ctrl); + c->controls[i].value = ctrl.value; + if (ret) { + c->error_idx = i; + break; + } + } + return ret; +} + +/* + * vidioc_g/s_param are used to switch isp running mode + */ +static int atomisp_g_parm(struct file *file, void *fh, + struct v4l2_streamparm *parm) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + struct atomisp_device *isp = video_get_drvdata(vdev); + + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + dev_err(isp->dev, "unsupport v4l2 buf type\n"); + return -EINVAL; + } + + rt_mutex_lock(&isp->mutex); + parm->parm.capture.capturemode = asd->run_mode->val; + rt_mutex_unlock(&isp->mutex); + + return 0; +} + +static int atomisp_s_parm(struct file *file, void *fh, + struct v4l2_streamparm *parm) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; + int mode; + int rval; + int fps; + + if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { + dev_err(isp->dev, "unsupport v4l2 buf type\n"); + return -EINVAL; + } + + rt_mutex_lock(&isp->mutex); + + asd->high_speed_mode = false; + switch (parm->parm.capture.capturemode) { + case CI_MODE_NONE: { + struct v4l2_subdev_frame_interval fi = {0}; + + fi.interval = parm->parm.capture.timeperframe; + + rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + video, s_frame_interval, &fi); + if (!rval) + parm->parm.capture.timeperframe = fi.interval; + + if (fi.interval.numerator != 0) { + fps = fi.interval.denominator / fi.interval.numerator; + if (fps > 30) + asd->high_speed_mode = true; + } + + goto out; + } + case CI_MODE_VIDEO: + mode = ATOMISP_RUN_MODE_VIDEO; + break; + case CI_MODE_STILL_CAPTURE: + mode = ATOMISP_RUN_MODE_STILL_CAPTURE; + break; + case CI_MODE_CONTINUOUS: + mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE; + break; + case CI_MODE_PREVIEW: + mode = ATOMISP_RUN_MODE_PREVIEW; + break; + default: + rval = -EINVAL; + goto out; + } + + rval = v4l2_ctrl_s_ctrl(asd->run_mode, mode); + +out: + rt_mutex_unlock(&isp->mutex); + + return rval == -ENOIOCTLCMD ? 0 : rval; +} + +static int atomisp_s_parm_file(struct file *file, void *fh, + struct v4l2_streamparm *parm) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + + if (parm->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { + dev_err(isp->dev, "unsupport v4l2 buf type for output\n"); + return -EINVAL; + } + + rt_mutex_lock(&isp->mutex); + isp->sw_contex.file_input = true; + rt_mutex_unlock(&isp->mutex); + + return 0; +} + +static long atomisp_vidioc_default(struct file *file, void *fh, + bool valid_prio, unsigned int cmd, void *arg) +{ + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); + struct atomisp_sub_device *asd; + bool acc_node; + int err; + + acc_node = !strcmp(vdev->name, "ATOMISP ISP ACC"); + if (acc_node) + asd = atomisp_to_acc_pipe(vdev)->asd; + else + asd = atomisp_to_video_pipe(vdev)->asd; + + switch (cmd) { + case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA: + case ATOMISP_IOC_S_EXPOSURE: + case ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP: + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA: + case ATOMISP_IOC_EXT_ISP_CTRL: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_INFO: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: + case ATOMISP_IOC_S_SENSOR_EE_CONFIG: +#ifdef ISP2401 + case ATOMISP_IOC_G_UPDATE_EXPOSURE: +#endif + /* we do not need take isp->mutex for these IOCTLs */ + break; + default: + rt_mutex_lock(&isp->mutex); + break; + } + switch (cmd) { +#ifdef ISP2401 + case ATOMISP_IOC_S_SENSOR_RUNMODE: + err = atomisp_set_sensor_runmode(asd, arg); + break; + +#endif + case ATOMISP_IOC_G_XNR: + err = atomisp_xnr(asd, 0, arg); + break; + + case ATOMISP_IOC_S_XNR: + err = atomisp_xnr(asd, 1, arg); + break; + + case ATOMISP_IOC_G_NR: + err = atomisp_nr(asd, 0, arg); + break; + + case ATOMISP_IOC_S_NR: + err = atomisp_nr(asd, 1, arg); + break; + + case ATOMISP_IOC_G_TNR: + err = atomisp_tnr(asd, 0, arg); + break; + + case ATOMISP_IOC_S_TNR: + err = atomisp_tnr(asd, 1, arg); + break; + + case ATOMISP_IOC_G_BLACK_LEVEL_COMP: + err = atomisp_black_level(asd, 0, arg); + break; + + case ATOMISP_IOC_S_BLACK_LEVEL_COMP: + err = atomisp_black_level(asd, 1, arg); + break; + + case ATOMISP_IOC_G_EE: + err = atomisp_ee(asd, 0, arg); + break; + + case ATOMISP_IOC_S_EE: + err = atomisp_ee(asd, 1, arg); + break; + + case ATOMISP_IOC_G_DIS_STAT: + err = atomisp_get_dis_stat(asd, arg); + break; + + case ATOMISP_IOC_G_DVS2_BQ_RESOLUTIONS: + err = atomisp_get_dvs2_bq_resolutions(asd, arg); + break; + + case ATOMISP_IOC_S_DIS_COEFS: + err = atomisp_css_cp_dvs2_coefs(asd, arg, + &asd->params.css_param, true); + if (!err && arg) + asd->params.css_update_params_needed = true; + break; + + case ATOMISP_IOC_S_DIS_VECTOR: + err = atomisp_cp_dvs_6axis_config(asd, arg, + &asd->params.css_param, true); + if (!err && arg) + asd->params.css_update_params_needed = true; + break; + + case ATOMISP_IOC_G_ISP_PARM: + err = atomisp_param(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_PARM: + err = atomisp_param(asd, 1, arg); + break; + + case ATOMISP_IOC_G_3A_STAT: + err = atomisp_3a_stat(asd, 0, arg); + break; + + case ATOMISP_IOC_G_ISP_GAMMA: + err = atomisp_gamma(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_GAMMA: + err = atomisp_gamma(asd, 1, arg); + break; + + case ATOMISP_IOC_G_ISP_GDC_TAB: + err = atomisp_gdc_cac_table(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_GDC_TAB: + err = atomisp_gdc_cac_table(asd, 1, arg); + break; + + case ATOMISP_IOC_G_ISP_MACC: + err = atomisp_macc_table(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_MACC: + err = atomisp_macc_table(asd, 1, arg); + break; + + case ATOMISP_IOC_G_ISP_BAD_PIXEL_DETECTION: + err = atomisp_bad_pixel_param(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_BAD_PIXEL_DETECTION: + err = atomisp_bad_pixel_param(asd, 1, arg); + break; + + case ATOMISP_IOC_G_ISP_FALSE_COLOR_CORRECTION: + err = atomisp_false_color_param(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_FALSE_COLOR_CORRECTION: + err = atomisp_false_color_param(asd, 1, arg); + break; + + case ATOMISP_IOC_G_ISP_CTC: + err = atomisp_ctc(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_CTC: + err = atomisp_ctc(asd, 1, arg); + break; + + case ATOMISP_IOC_G_ISP_WHITE_BALANCE: + err = atomisp_white_balance_param(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_WHITE_BALANCE: + err = atomisp_white_balance_param(asd, 1, arg); + break; + + case ATOMISP_IOC_G_3A_CONFIG: + err = atomisp_3a_config_param(asd, 0, arg); + break; + + case ATOMISP_IOC_S_3A_CONFIG: + err = atomisp_3a_config_param(asd, 1, arg); + break; + + case ATOMISP_IOC_S_ISP_FPN_TABLE: + err = atomisp_fixed_pattern_table(asd, arg); + break; + + case ATOMISP_IOC_ISP_MAKERNOTE: + err = atomisp_exif_makernote(asd, arg); + break; + + case ATOMISP_IOC_G_SENSOR_MODE_DATA: + err = atomisp_get_sensor_mode_data(asd, arg); + break; + + case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA: +#ifndef ISP2401 + if (isp->inputs[asd->input_curr].motor) +#else + if (isp->motor) +#endif +#ifndef ISP2401 + err = v4l2_subdev_call( + isp->inputs[asd->input_curr].motor, + core, ioctl, cmd, arg); +#else + err = v4l2_subdev_call( + isp->motor, + core, ioctl, cmd, arg); +#endif + else + err = v4l2_subdev_call( + isp->inputs[asd->input_curr].camera, + core, ioctl, cmd, arg); + break; + + case ATOMISP_IOC_S_EXPOSURE: + case ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP: + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_INFO: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: +#ifdef ISP2401 + case ATOMISP_IOC_G_UPDATE_EXPOSURE: +#endif + err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + core, ioctl, cmd, arg); + break; + + case ATOMISP_IOC_ACC_LOAD: + err = atomisp_acc_load(asd, arg); + break; + + case ATOMISP_IOC_ACC_LOAD_TO_PIPE: + err = atomisp_acc_load_to_pipe(asd, arg); + break; + + case ATOMISP_IOC_ACC_UNLOAD: + err = atomisp_acc_unload(asd, arg); + break; + + case ATOMISP_IOC_ACC_START: + err = atomisp_acc_start(asd, arg); + break; + + case ATOMISP_IOC_ACC_WAIT: + err = atomisp_acc_wait(asd, arg); + break; + + case ATOMISP_IOC_ACC_MAP: + err = atomisp_acc_map(asd, arg); + break; + + case ATOMISP_IOC_ACC_UNMAP: + err = atomisp_acc_unmap(asd, arg); + break; + + case ATOMISP_IOC_ACC_S_MAPPED_ARG: + err = atomisp_acc_s_mapped_arg(asd, arg); + break; + + case ATOMISP_IOC_S_ISP_SHD_TAB: + err = atomisp_set_shading_table(asd, arg); + break; + + case ATOMISP_IOC_G_ISP_GAMMA_CORRECTION: + err = atomisp_gamma_correction(asd, 0, arg); + break; + + case ATOMISP_IOC_S_ISP_GAMMA_CORRECTION: + err = atomisp_gamma_correction(asd, 1, arg); + break; + + case ATOMISP_IOC_S_PARAMETERS: + err = atomisp_set_parameters(vdev, arg); + break; + + case ATOMISP_IOC_S_CONT_CAPTURE_CONFIG: + err = atomisp_offline_capture_configure(asd, arg); + break; + case ATOMISP_IOC_G_METADATA: + err = atomisp_get_metadata(asd, 0, arg); + break; + case ATOMISP_IOC_G_METADATA_BY_TYPE: + err = atomisp_get_metadata_by_type(asd, 0, arg); + break; + case ATOMISP_IOC_EXT_ISP_CTRL: + err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + core, ioctl, cmd, arg); + break; + case ATOMISP_IOC_EXP_ID_UNLOCK: + err = atomisp_exp_id_unlock(asd, arg); + break; + case ATOMISP_IOC_EXP_ID_CAPTURE: + err = atomisp_exp_id_capture(asd, arg); + break; + case ATOMISP_IOC_S_ENABLE_DZ_CAPT_PIPE: + err = atomisp_enable_dz_capt_pipe(asd, arg); + break; + case ATOMISP_IOC_G_FORMATS_CONFIG: + err = atomisp_formats(asd, 0, arg); + break; + + case ATOMISP_IOC_S_FORMATS_CONFIG: + err = atomisp_formats(asd, 1, arg); + break; + case ATOMISP_IOC_S_EXPOSURE_WINDOW: + err = atomisp_s_ae_window(asd, arg); + break; + case ATOMISP_IOC_S_ACC_STATE: + err = atomisp_acc_set_state(asd, arg); + break; + case ATOMISP_IOC_G_ACC_STATE: + err = atomisp_acc_get_state(asd, arg); + break; + case ATOMISP_IOC_INJECT_A_FAKE_EVENT: + err = atomisp_inject_a_fake_event(asd, arg); + break; + case ATOMISP_IOC_G_INVALID_FRAME_NUM: + err = atomisp_get_invalid_frame_num(vdev, arg); + break; + case ATOMISP_IOC_S_ARRAY_RESOLUTION: + err = atomisp_set_array_res(asd, arg); + break; + default: + err = -EINVAL; + break; + } + + switch (cmd) { + case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA: + case ATOMISP_IOC_S_EXPOSURE: + case ATOMISP_IOC_G_SENSOR_CALIBRATION_GROUP: + case ATOMISP_IOC_G_SENSOR_PRIV_INT_DATA: + case ATOMISP_IOC_EXT_ISP_CTRL: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_INFO: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: + case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: +#ifdef ISP2401 + case ATOMISP_IOC_G_UPDATE_EXPOSURE: +#endif + break; + default: + rt_mutex_unlock(&isp->mutex); + break; + } + return err; +} + +const struct v4l2_ioctl_ops atomisp_ioctl_ops = { + .vidioc_querycap = atomisp_querycap, + .vidioc_enum_input = atomisp_enum_input, + .vidioc_g_input = atomisp_g_input, + .vidioc_s_input = atomisp_s_input, + .vidioc_queryctrl = atomisp_queryctl, + .vidioc_s_ctrl = atomisp_s_ctrl, + .vidioc_g_ctrl = atomisp_g_ctrl, + .vidioc_s_ext_ctrls = atomisp_s_ext_ctrls, + .vidioc_g_ext_ctrls = atomisp_g_ext_ctrls, + .vidioc_enum_fmt_vid_cap = atomisp_enum_fmt_cap, + .vidioc_try_fmt_vid_cap = atomisp_try_fmt_cap, + .vidioc_g_fmt_vid_cap = atomisp_g_fmt_cap, + .vidioc_s_fmt_vid_cap = atomisp_s_fmt_cap, + .vidioc_reqbufs = atomisp_reqbufs, + .vidioc_querybuf = atomisp_querybuf, + .vidioc_qbuf = atomisp_qbuf, + .vidioc_dqbuf = atomisp_dqbuf, + .vidioc_streamon = atomisp_streamon, + .vidioc_streamoff = atomisp_streamoff, + .vidioc_default = atomisp_vidioc_default, + .vidioc_s_parm = atomisp_s_parm, + .vidioc_g_parm = atomisp_g_parm, +}; + +const struct v4l2_ioctl_ops atomisp_file_ioctl_ops = { + .vidioc_querycap = atomisp_querycap, + .vidioc_g_fmt_vid_out = atomisp_g_fmt_file, + .vidioc_s_fmt_vid_out = atomisp_s_fmt_file, + .vidioc_s_parm = atomisp_s_parm_file, + .vidioc_reqbufs = atomisp_reqbufs_file, + .vidioc_querybuf = atomisp_querybuf_file, + .vidioc_qbuf = atomisp_qbuf_file, +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h new file mode 100644 index 0000000000000..0d2785b9ef990 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h @@ -0,0 +1,69 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_IOCTL_H__ +#define __ATOMISP_IOCTL_H__ + +#include "ia_css.h" + +struct atomisp_device; +struct atomisp_video_pipe; + +extern const struct atomisp_format_bridge atomisp_output_fmts[]; + +const struct atomisp_format_bridge *atomisp_get_format_bridge( + unsigned int pixelformat); +#ifndef ISP2401 +const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus( + u32 mbus_code); +#else +const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus(u32 + mbus_code); +#endif + +int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, + uint16_t stream_id); + +int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type); +int __atomisp_reqbufs(struct file *file, void *fh, + struct v4l2_requestbuffers *req); + +int atomisp_reqbufs(struct file *file, void *fh, + struct v4l2_requestbuffers *req); + +enum atomisp_css_pipe_id atomisp_get_css_pipe_id(struct atomisp_sub_device + *asd); + +void atomisp_videobuf_free_buf(struct videobuf_buffer *vb); + +extern const struct v4l2_file_operations atomisp_file_fops; + +extern const struct v4l2_ioctl_ops atomisp_ioctl_ops; + +extern const struct v4l2_ioctl_ops atomisp_file_ioctl_ops; + +unsigned int atomisp_streaming_count(struct atomisp_device *isp); + +unsigned int atomisp_is_acc_enabled(struct atomisp_device *isp); +/* compat_ioctl for 32bit userland app and 64bit kernel */ +long atomisp_compat_ioctl32(struct file *file, + unsigned int cmd, unsigned long arg); + +int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, bool isp_timeout); +#endif /* __ATOMISP_IOCTL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c new file mode 100644 index 0000000000000..49a9973b4289a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c @@ -0,0 +1,1422 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "atomisp_cmd.h" +#include "atomisp_common.h" +#include "atomisp_compat.h" +#include "atomisp_internal.h" + +const struct atomisp_in_fmt_conv atomisp_in_fmt_conv[] = { + { MEDIA_BUS_FMT_SBGGR8_1X8, 8, 8, ATOMISP_INPUT_FORMAT_RAW_8, CSS_BAYER_ORDER_BGGR, CSS_FORMAT_RAW_8 }, + { MEDIA_BUS_FMT_SGBRG8_1X8, 8, 8, ATOMISP_INPUT_FORMAT_RAW_8, CSS_BAYER_ORDER_GBRG, CSS_FORMAT_RAW_8 }, + { MEDIA_BUS_FMT_SGRBG8_1X8, 8, 8, ATOMISP_INPUT_FORMAT_RAW_8, CSS_BAYER_ORDER_GRBG, CSS_FORMAT_RAW_8 }, + { MEDIA_BUS_FMT_SRGGB8_1X8, 8, 8, ATOMISP_INPUT_FORMAT_RAW_8, CSS_BAYER_ORDER_RGGB, CSS_FORMAT_RAW_8 }, + { MEDIA_BUS_FMT_SBGGR10_1X10, 10, 10, ATOMISP_INPUT_FORMAT_RAW_10, CSS_BAYER_ORDER_BGGR, CSS_FORMAT_RAW_10 }, + { MEDIA_BUS_FMT_SGBRG10_1X10, 10, 10, ATOMISP_INPUT_FORMAT_RAW_10, CSS_BAYER_ORDER_GBRG, CSS_FORMAT_RAW_10 }, + { MEDIA_BUS_FMT_SGRBG10_1X10, 10, 10, ATOMISP_INPUT_FORMAT_RAW_10, CSS_BAYER_ORDER_GRBG, CSS_FORMAT_RAW_10 }, + { MEDIA_BUS_FMT_SRGGB10_1X10, 10, 10, ATOMISP_INPUT_FORMAT_RAW_10, CSS_BAYER_ORDER_RGGB, CSS_FORMAT_RAW_10 }, + { MEDIA_BUS_FMT_SBGGR12_1X12, 12, 12, ATOMISP_INPUT_FORMAT_RAW_12, CSS_BAYER_ORDER_BGGR, CSS_FORMAT_RAW_12 }, + { MEDIA_BUS_FMT_SGBRG12_1X12, 12, 12, ATOMISP_INPUT_FORMAT_RAW_12, CSS_BAYER_ORDER_GBRG, CSS_FORMAT_RAW_12 }, + { MEDIA_BUS_FMT_SGRBG12_1X12, 12, 12, ATOMISP_INPUT_FORMAT_RAW_12, CSS_BAYER_ORDER_GRBG, CSS_FORMAT_RAW_12 }, + { MEDIA_BUS_FMT_SRGGB12_1X12, 12, 12, ATOMISP_INPUT_FORMAT_RAW_12, CSS_BAYER_ORDER_RGGB, CSS_FORMAT_RAW_12 }, + { MEDIA_BUS_FMT_UYVY8_1X16, 8, 8, ATOMISP_INPUT_FORMAT_YUV422_8, 0, ATOMISP_INPUT_FORMAT_YUV422_8 }, + { MEDIA_BUS_FMT_YUYV8_1X16, 8, 8, ATOMISP_INPUT_FORMAT_YUV422_8, 0, ATOMISP_INPUT_FORMAT_YUV422_8 }, + { MEDIA_BUS_FMT_JPEG_1X8, 8, 8, CSS_FRAME_FORMAT_BINARY_8, 0, ATOMISP_INPUT_FORMAT_BINARY_8 }, + { V4L2_MBUS_FMT_CUSTOM_NV12, 12, 12, CSS_FRAME_FORMAT_NV12, 0, CSS_FRAME_FORMAT_NV12 }, + { V4L2_MBUS_FMT_CUSTOM_NV21, 12, 12, CSS_FRAME_FORMAT_NV21, 0, CSS_FRAME_FORMAT_NV21 }, + { V4L2_MBUS_FMT_CUSTOM_YUV420, 12, 12, ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY, 0, ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY }, +#if 0 + { V4L2_MBUS_FMT_CUSTOM_M10MO_RAW, 8, 8, CSS_FRAME_FORMAT_BINARY_8, 0, ATOMISP_INPUT_FORMAT_BINARY_8 }, +#endif + /* no valid V4L2 MBUS code for metadata format, so leave it 0. */ + { 0, 0, 0, ATOMISP_INPUT_FORMAT_EMBEDDED, 0, ATOMISP_INPUT_FORMAT_EMBEDDED }, + {} +}; + +static const struct { + u32 code; + u32 compressed; +} compressed_codes[] = { + { MEDIA_BUS_FMT_SBGGR10_1X10, MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8 }, + { MEDIA_BUS_FMT_SGBRG10_1X10, MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8 }, + { MEDIA_BUS_FMT_SGRBG10_1X10, MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8 }, + { MEDIA_BUS_FMT_SRGGB10_1X10, MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8 }, +}; + +u32 atomisp_subdev_uncompressed_code(u32 code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(compressed_codes); i++) + if (code == compressed_codes[i].compressed) + return compressed_codes[i].code; + + return code; +} + +bool atomisp_subdev_is_compressed(u32 code) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(atomisp_in_fmt_conv) - 1; i++) + if (code == atomisp_in_fmt_conv[i].code) + return atomisp_in_fmt_conv[i].bpp != + atomisp_in_fmt_conv[i].depth; + + return false; +} + +const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv(u32 code) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(atomisp_in_fmt_conv) - 1; i++) + if (code == atomisp_in_fmt_conv[i].code) + return atomisp_in_fmt_conv + i; + + return NULL; +} + +const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt( + enum atomisp_input_format atomisp_in_fmt) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(atomisp_in_fmt_conv) - 1; i++) + if (atomisp_in_fmt_conv[i].atomisp_in_fmt == atomisp_in_fmt) + return atomisp_in_fmt_conv + i; + + return NULL; +} + +bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd, + unsigned int source_pad) +{ + struct v4l2_mbus_framefmt *sink, *src; + + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); + src = atomisp_subdev_get_ffmt(&asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, source_pad); + + return atomisp_is_mbuscode_raw(sink->code) + && !atomisp_is_mbuscode_raw(src->code); +} + +uint16_t atomisp_subdev_source_pad(struct video_device * vdev) +{ + struct media_link *link; + uint16_t ret = 0; + list_for_each_entry(link, &vdev->entity.links, list) { + if (link->source) { + ret = link->source->index; + break; + } + } + return ret; +} + +/* + * V4L2 subdev operations + */ + +/* + * isp_subdev_ioctl - CCDC module private ioctl's + * @sd: ISP V4L2 subdevice + * @cmd: ioctl command + * @arg: ioctl argument + * + * Return 0 on success or a negative error code otherwise. + */ +static long isp_subdev_ioctl(struct v4l2_subdev *sd, + unsigned int cmd, void *arg) +{ + return 0; +} + +/* + * isp_subdev_set_power - Power on/off the CCDC module + * @sd: ISP V4L2 subdevice + * @on: power on/off + * + * Return 0 on success or a negative error code otherwise. + */ +static int isp_subdev_set_power(struct v4l2_subdev *sd, int on) +{ + return 0; +} + +static int isp_subdev_subscribe_event(struct v4l2_subdev *sd, + struct v4l2_fh *fh, + struct v4l2_event_subscription *sub) +{ + struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); + struct atomisp_device *isp = isp_sd->isp; + + if (sub->type != V4L2_EVENT_FRAME_SYNC && + sub->type != V4L2_EVENT_FRAME_END && + sub->type != V4L2_EVENT_ATOMISP_3A_STATS_READY && + sub->type != V4L2_EVENT_ATOMISP_METADATA_READY && + sub->type != V4L2_EVENT_ATOMISP_PAUSE_BUFFER && + sub->type != V4L2_EVENT_ATOMISP_CSS_RESET && + sub->type != V4L2_EVENT_ATOMISP_RAW_BUFFERS_ALLOC_DONE && + sub->type != V4L2_EVENT_ATOMISP_ACC_COMPLETE) + return -EINVAL; + + if (sub->type == V4L2_EVENT_FRAME_SYNC && + !atomisp_css_valid_sof(isp)) + return -EINVAL; + + return v4l2_event_subscribe(fh, sub, 16, NULL); +} + +static int isp_subdev_unsubscribe_event(struct v4l2_subdev *sd, + struct v4l2_fh *fh, + struct v4l2_event_subscription *sub) +{ + return v4l2_event_unsubscribe(fh, sub); +} + +/* + * isp_subdev_enum_mbus_code - Handle pixel format enumeration + * @sd: pointer to v4l2 subdev structure + * @fh : V4L2 subdev file handle + * @code: pointer to v4l2_subdev_pad_mbus_code_enum structure + * return -EINVAL or zero on success + */ +static int isp_subdev_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= ARRAY_SIZE(atomisp_in_fmt_conv) - 1) + return -EINVAL; + + code->code = atomisp_in_fmt_conv[code->index].code; + + return 0; +} + +static int isp_subdev_validate_rect(struct v4l2_subdev *sd, uint32_t pad, + uint32_t target) +{ + switch (pad) { + case ATOMISP_SUBDEV_PAD_SINK: + switch (target) { + case V4L2_SEL_TGT_CROP: + return 0; + } + break; + default: + switch (target) { + case V4L2_SEL_TGT_COMPOSE: + return 0; + } + break; + } + + return -EINVAL; +} + +struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + uint32_t which, uint32_t pad, + uint32_t target) +{ + struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); + + if (which == V4L2_SUBDEV_FORMAT_TRY) { + switch (target) { + case V4L2_SEL_TGT_CROP: + return v4l2_subdev_get_try_crop(sd, cfg, pad); + case V4L2_SEL_TGT_COMPOSE: + return v4l2_subdev_get_try_compose(sd, cfg, pad); + } + } + + switch (target) { + case V4L2_SEL_TGT_CROP: + return &isp_sd->fmt[pad].crop; + case V4L2_SEL_TGT_COMPOSE: + return &isp_sd->fmt[pad].compose; + } + + return NULL; +} + +struct v4l2_mbus_framefmt +*atomisp_subdev_get_ffmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, uint32_t which, + uint32_t pad) +{ + struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); + + if (which == V4L2_SUBDEV_FORMAT_TRY) + return v4l2_subdev_get_try_format(sd, cfg, pad); + + return &isp_sd->fmt[pad].fmt; +} + +static void isp_get_fmt_rect(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, uint32_t which, + struct v4l2_mbus_framefmt **ffmt, + struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM], + struct v4l2_rect *comp[ATOMISP_SUBDEV_PADS_NUM]) +{ + unsigned int i; + + for (i = 0; i < ATOMISP_SUBDEV_PADS_NUM; i++) { + ffmt[i] = atomisp_subdev_get_ffmt(sd, cfg, which, i); + crop[i] = atomisp_subdev_get_rect(sd, cfg, which, i, + V4L2_SEL_TGT_CROP); + comp[i] = atomisp_subdev_get_rect(sd, cfg, which, i, + V4L2_SEL_TGT_COMPOSE); + } +} + +static void isp_subdev_propagate(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + uint32_t which, uint32_t pad, uint32_t target, + uint32_t flags) +{ + struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM]; + struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM], + *comp[ATOMISP_SUBDEV_PADS_NUM]; + + if (flags & V4L2_SEL_FLAG_KEEP_CONFIG) + return; + + isp_get_fmt_rect(sd, cfg, which, ffmt, crop, comp); + + switch (pad) { + case ATOMISP_SUBDEV_PAD_SINK: { + struct v4l2_rect r = {0}; + + /* Only crop target supported on sink pad. */ + r.width = ffmt[pad]->width; + r.height = ffmt[pad]->height; + + atomisp_subdev_set_selection(sd, cfg, which, pad, + target, flags, &r); + break; + } + } +} + +static int isp_subdev_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + struct v4l2_rect *rec; + int rval = isp_subdev_validate_rect(sd, sel->pad, sel->target); + + if (rval) + return rval; + + rec = atomisp_subdev_get_rect(sd, cfg, sel->which, sel->pad, + sel->target); + if (!rec) + return -EINVAL; + + sel->r = *rec; + return 0; +} + +static char *atomisp_pad_str[] = { "ATOMISP_SUBDEV_PAD_SINK", + "ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE", + "ATOMISP_SUBDEV_PAD_SOURCE_VF", + "ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW", + "ATOMISP_SUBDEV_PAD_SOURCE_VIDEO"}; + +int atomisp_subdev_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + uint32_t which, uint32_t pad, uint32_t target, + uint32_t flags, struct v4l2_rect *r) +{ + struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); + struct atomisp_device *isp = isp_sd->isp; + struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM]; + uint16_t vdev_pad = atomisp_subdev_source_pad(sd->devnode); + struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM], + *comp[ATOMISP_SUBDEV_PADS_NUM]; + enum atomisp_input_stream_id stream_id; + unsigned int i; + unsigned int padding_w = pad_w; + unsigned int padding_h = pad_h; + + stream_id = atomisp_source_pad_to_stream_id(isp_sd, vdev_pad); + + isp_get_fmt_rect(sd, cfg, which, ffmt, crop, comp); + + dev_dbg(isp->dev, + "sel: pad %s tgt %s l %d t %d w %d h %d which %s f 0x%8.8x\n", + atomisp_pad_str[pad], target == V4L2_SEL_TGT_CROP + ? "V4L2_SEL_TGT_CROP" : "V4L2_SEL_TGT_COMPOSE", + r->left, r->top, r->width, r->height, + which == V4L2_SUBDEV_FORMAT_TRY ? "V4L2_SUBDEV_FORMAT_TRY" + : "V4L2_SUBDEV_FORMAT_ACTIVE", flags); + + r->width = rounddown(r->width, ATOM_ISP_STEP_WIDTH); + r->height = rounddown(r->height, ATOM_ISP_STEP_HEIGHT); + + switch (pad) { + case ATOMISP_SUBDEV_PAD_SINK: { + /* Only crop target supported on sink pad. */ + unsigned int dvs_w, dvs_h; + + crop[pad]->width = ffmt[pad]->width; + crop[pad]->height = ffmt[pad]->height; + + /* Workaround for BYT 1080p perfectshot since the maxinum resolution of + * front camera ov2722 is 1932x1092 and cannot use pad_w > 12*/ + if (!strncmp(isp->inputs[isp_sd->input_curr].camera->name, + "ov2722", 6) && crop[pad]->height == 1092) { + padding_w = 12; + padding_h = 12; + } + + if (isp->inputs[isp_sd->input_curr].type == SOC_CAMERA) { + padding_w = 0; + padding_h = 0; + } + + if (atomisp_subdev_format_conversion(isp_sd, + isp_sd->capture_pad) + && crop[pad]->width && crop[pad]->height) + crop[pad]->width -= padding_w, crop[pad]->height -= padding_h; + + /* if subdev type is SOC camera,we do not need to set DVS */ + if (isp->inputs[isp_sd->input_curr].type == SOC_CAMERA) + isp_sd->params.video_dis_en = 0; + + if (isp_sd->params.video_dis_en && + isp_sd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + !isp_sd->continuous_mode->val) { + /* This resolution contains 20 % of DVS slack + * (of the desired captured image before + * scaling, or 1 / 6 of what we get from the + * sensor) in both width and height. Remove + * it. */ + crop[pad]->width = roundup(crop[pad]->width * 5 / 6, + ATOM_ISP_STEP_WIDTH); + crop[pad]->height = roundup(crop[pad]->height * 5 / 6, + ATOM_ISP_STEP_HEIGHT); + } + + crop[pad]->width = min(crop[pad]->width, r->width); + crop[pad]->height = min(crop[pad]->height, r->height); + + if (!(flags & V4L2_SEL_FLAG_KEEP_CONFIG)) { + for (i = ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE; + i < ATOMISP_SUBDEV_PADS_NUM; i++) { + struct v4l2_rect tmp = *crop[pad]; + + atomisp_subdev_set_selection( + sd, cfg, which, i, V4L2_SEL_TGT_COMPOSE, + flags, &tmp); + } + } + + if (which == V4L2_SUBDEV_FORMAT_TRY) + break; + + if (isp_sd->params.video_dis_en && + isp_sd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + !isp_sd->continuous_mode->val) { + dvs_w = rounddown(crop[pad]->width / 5, + ATOM_ISP_STEP_WIDTH); + dvs_h = rounddown(crop[pad]->height / 5, + ATOM_ISP_STEP_HEIGHT); + } else if (!isp_sd->params.video_dis_en && + isp_sd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + /* + * For CSS2.0, digital zoom needs to set dvs envelope to 12 + * when dvs is disabled. + */ + dvs_w = dvs_h = 12; + } else + dvs_w = dvs_h = 0; + + atomisp_css_video_set_dis_envelope(isp_sd, dvs_w, dvs_h); + atomisp_css_input_set_effective_resolution(isp_sd, stream_id, + crop[pad]->width, crop[pad]->height); + + break; + } + case ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE: + case ATOMISP_SUBDEV_PAD_SOURCE_VIDEO: { + /* Only compose target is supported on source pads. */ + + if (isp_sd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) { + /* Scaling is disabled in this mode */ + r->width = crop[ATOMISP_SUBDEV_PAD_SINK]->width; + r->height = crop[ATOMISP_SUBDEV_PAD_SINK]->height; + } + + if (crop[ATOMISP_SUBDEV_PAD_SINK]->width == r->width + && crop[ATOMISP_SUBDEV_PAD_SINK]->height == r->height) + isp_sd->params.yuv_ds_en = false; + else + isp_sd->params.yuv_ds_en = true; + + comp[pad]->width = r->width; + comp[pad]->height = r->height; + + if (r->width == 0 || r->height == 0 || + crop[ATOMISP_SUBDEV_PAD_SINK]->width == 0 || + crop[ATOMISP_SUBDEV_PAD_SINK]->height == 0) + break; + /* + * do cropping on sensor input if ratio of required resolution + * is different with sensor output resolution ratio: + * + * ratio = width / height + * + * if ratio_output < ratio_sensor: + * effect_width = sensor_height * out_width / out_height; + * effect_height = sensor_height; + * else + * effect_width = sensor_width; + * effect_height = sensor_width * out_height / out_width; + * + */ + if (r->width * crop[ATOMISP_SUBDEV_PAD_SINK]->height < + crop[ATOMISP_SUBDEV_PAD_SINK]->width * r->height) + atomisp_css_input_set_effective_resolution(isp_sd, + stream_id, + rounddown(crop[ATOMISP_SUBDEV_PAD_SINK]-> + height * r->width / r->height, + ATOM_ISP_STEP_WIDTH), + crop[ATOMISP_SUBDEV_PAD_SINK]->height); + else + atomisp_css_input_set_effective_resolution(isp_sd, + stream_id, + crop[ATOMISP_SUBDEV_PAD_SINK]->width, + rounddown(crop[ATOMISP_SUBDEV_PAD_SINK]-> + width * r->height / r->width, + ATOM_ISP_STEP_WIDTH)); + + break; + } + case ATOMISP_SUBDEV_PAD_SOURCE_VF: + case ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW: + comp[pad]->width = r->width; + comp[pad]->height = r->height; + break; + default: + return -EINVAL; + } + + /* Set format dimensions on non-sink pads as well. */ + if (pad != ATOMISP_SUBDEV_PAD_SINK) { + ffmt[pad]->width = comp[pad]->width; + ffmt[pad]->height = comp[pad]->height; + } + + if (!atomisp_subdev_get_rect(sd, cfg, which, pad, target)) + return -EINVAL; + *r = *atomisp_subdev_get_rect(sd, cfg, which, pad, target); + + dev_dbg(isp->dev, "sel actual: l %d t %d w %d h %d\n", + r->left, r->top, r->width, r->height); + + return 0; +} + +static int isp_subdev_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_selection *sel) +{ + int rval = isp_subdev_validate_rect(sd, sel->pad, sel->target); + if (rval) + return rval; + + return atomisp_subdev_set_selection(sd, cfg, sel->which, sel->pad, + sel->target, sel->flags, &sel->r); +} + +static int atomisp_get_sensor_bin_factor(struct atomisp_sub_device *asd) +{ + struct v4l2_control ctrl = {0}; + struct atomisp_device *isp = asd->isp; + int hbin, vbin; + int ret; + + if (isp->inputs[asd->input_curr].type == FILE_INPUT || + isp->inputs[asd->input_curr].type == TEST_PATTERN) + return 0; + + ctrl.id = V4L2_CID_BIN_FACTOR_HORZ; + ret = + v4l2_g_ctrl(isp->inputs[asd->input_curr].camera->ctrl_handler, + &ctrl); + hbin = ctrl.value; + ctrl.id = V4L2_CID_BIN_FACTOR_VERT; + ret |= + v4l2_g_ctrl(isp->inputs[asd->input_curr].camera->ctrl_handler, + &ctrl); + vbin = ctrl.value; + + /* + * ISP needs to know binning factor from sensor. + * In case horizontal and vertical sensor's binning factors + * are different or sensor does not support binning factor CID, + * ISP will apply default 0 value. + */ + if (ret || hbin != vbin) + hbin = 0; + + return hbin; +} + +void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, uint32_t which, + uint32_t pad, struct v4l2_mbus_framefmt *ffmt) +{ + struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); + struct atomisp_device *isp = isp_sd->isp; + struct v4l2_mbus_framefmt *__ffmt = + atomisp_subdev_get_ffmt(sd, cfg, which, pad); + uint16_t vdev_pad = atomisp_subdev_source_pad(sd->devnode); + enum atomisp_input_stream_id stream_id; + + dev_dbg(isp->dev, "ffmt: pad %s w %d h %d code 0x%8.8x which %s\n", + atomisp_pad_str[pad], ffmt->width, ffmt->height, ffmt->code, + which == V4L2_SUBDEV_FORMAT_TRY ? "V4L2_SUBDEV_FORMAT_TRY" + : "V4L2_SUBDEV_FORMAT_ACTIVE"); + + stream_id = atomisp_source_pad_to_stream_id(isp_sd, vdev_pad); + + switch (pad) { + case ATOMISP_SUBDEV_PAD_SINK: { + const struct atomisp_in_fmt_conv *fc = + atomisp_find_in_fmt_conv(ffmt->code); + + if (!fc) { + fc = atomisp_in_fmt_conv; + ffmt->code = fc->code; + dev_dbg(isp->dev, "using 0x%8.8x instead\n", + ffmt->code); + } + + *__ffmt = *ffmt; + + isp_subdev_propagate(sd, cfg, which, pad, + V4L2_SEL_TGT_CROP, 0); + + if (which == V4L2_SUBDEV_FORMAT_ACTIVE) { + atomisp_css_input_set_resolution(isp_sd, + stream_id, ffmt); + atomisp_css_input_set_binning_factor(isp_sd, + stream_id, + atomisp_get_sensor_bin_factor(isp_sd)); + atomisp_css_input_set_bayer_order(isp_sd, stream_id, + fc->bayer_order); + atomisp_css_input_set_format(isp_sd, stream_id, + fc->css_stream_fmt); + atomisp_css_set_default_isys_config(isp_sd, stream_id, + ffmt); + } + + break; + } + case ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE: + case ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW: + case ATOMISP_SUBDEV_PAD_SOURCE_VF: + case ATOMISP_SUBDEV_PAD_SOURCE_VIDEO: + __ffmt->code = ffmt->code; + break; + } +} + +/* + * isp_subdev_get_format - Retrieve the video format on a pad + * @sd : ISP V4L2 subdevice + * @fh : V4L2 subdev file handle + * @pad: Pad number + * @fmt: Format + * + * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond + * to the format type. + */ +static int isp_subdev_get_format(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + fmt->format = *atomisp_subdev_get_ffmt(sd, cfg, fmt->which, fmt->pad); + + return 0; +} + +/* + * isp_subdev_set_format - Set the video format on a pad + * @sd : ISP subdev V4L2 subdevice + * @fh : V4L2 subdev file handle + * @pad: Pad number + * @fmt: Format + * + * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond + * to the format type. + */ +static int isp_subdev_set_format(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + atomisp_subdev_set_ffmt(sd, cfg, fmt->which, fmt->pad, &fmt->format); + + return 0; +} + +/* V4L2 subdev core operations */ +static const struct v4l2_subdev_core_ops isp_subdev_v4l2_core_ops = { + .ioctl = isp_subdev_ioctl, .s_power = isp_subdev_set_power, + .subscribe_event = isp_subdev_subscribe_event, + .unsubscribe_event = isp_subdev_unsubscribe_event, +}; + +/* V4L2 subdev pad operations */ +static const struct v4l2_subdev_pad_ops isp_subdev_v4l2_pad_ops = { + .enum_mbus_code = isp_subdev_enum_mbus_code, + .get_fmt = isp_subdev_get_format, + .set_fmt = isp_subdev_set_format, + .get_selection = isp_subdev_get_selection, + .set_selection = isp_subdev_set_selection, + .link_validate = v4l2_subdev_link_validate_default, +}; + +/* V4L2 subdev operations */ +static const struct v4l2_subdev_ops isp_subdev_v4l2_ops = { + .core = &isp_subdev_v4l2_core_ops, + .pad = &isp_subdev_v4l2_pad_ops, +}; + +static void isp_subdev_init_params(struct atomisp_sub_device *asd) +{ + unsigned int i; + + /* parameters initialization */ + INIT_LIST_HEAD(&asd->s3a_stats); + INIT_LIST_HEAD(&asd->s3a_stats_in_css); + INIT_LIST_HEAD(&asd->s3a_stats_ready); + INIT_LIST_HEAD(&asd->dis_stats); + INIT_LIST_HEAD(&asd->dis_stats_in_css); + spin_lock_init(&asd->dis_stats_lock); + for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { + INIT_LIST_HEAD(&asd->metadata[i]); + INIT_LIST_HEAD(&asd->metadata_in_css[i]); + INIT_LIST_HEAD(&asd->metadata_ready[i]); + } +} + +/* +* isp_subdev_link_setup - Setup isp subdev connections +* @entity: ispsubdev media entity +* @local: Pad at the local end of the link +* @remote: Pad at the remote end of the link +* @flags: Link flags +* +* return -EINVAL or zero on success +*/ +static int isp_subdev_link_setup(struct media_entity *entity, + const struct media_pad *local, + const struct media_pad *remote, u32 flags) +{ + struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); + struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); + struct atomisp_device *isp = isp_sd->isp; + unsigned int i; + + switch (local->index | is_media_entity_v4l2_subdev(remote->entity)) { + case ATOMISP_SUBDEV_PAD_SINK | MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN: + /* Read from the sensor CSI2-ports. */ + if (!(flags & MEDIA_LNK_FL_ENABLED)) { + isp_sd->input = ATOMISP_SUBDEV_INPUT_NONE; + break; + } + + if (isp_sd->input != ATOMISP_SUBDEV_INPUT_NONE) + return -EBUSY; + + for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) { + if (remote->entity != &isp->csi2_port[i].subdev.entity) + continue; + + isp_sd->input = ATOMISP_SUBDEV_INPUT_CSI2_PORT1 + i; + return 0; + } + + return -EINVAL; + + case ATOMISP_SUBDEV_PAD_SINK | MEDIA_ENT_F_OLD_BASE: + /* read from memory */ + if (flags & MEDIA_LNK_FL_ENABLED) { + if (isp_sd->input >= ATOMISP_SUBDEV_INPUT_CSI2_PORT1 && + isp_sd->input < (ATOMISP_SUBDEV_INPUT_CSI2_PORT1 + + ATOMISP_CAMERA_NR_PORTS)) + return -EBUSY; + isp_sd->input = ATOMISP_SUBDEV_INPUT_MEMORY; + } else { + if (isp_sd->input == ATOMISP_SUBDEV_INPUT_MEMORY) + isp_sd->input = ATOMISP_SUBDEV_INPUT_NONE; + } + break; + + case ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW | MEDIA_ENT_F_OLD_BASE: + /* always write to memory */ + break; + + case ATOMISP_SUBDEV_PAD_SOURCE_VF | MEDIA_ENT_F_OLD_BASE: + /* always write to memory */ + break; + + case ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE | MEDIA_ENT_F_OLD_BASE: + /* always write to memory */ + break; + + case ATOMISP_SUBDEV_PAD_SOURCE_VIDEO | MEDIA_ENT_F_OLD_BASE: + /* always write to memory */ + break; + + default: + return -EINVAL; + } + + return 0; +} + +/* media operations */ +static const struct media_entity_operations isp_subdev_media_ops = { + .link_setup = isp_subdev_link_setup, + .link_validate = v4l2_subdev_link_validate, +/* .set_power = v4l2_subdev_set_power, */ +}; + +static int __atomisp_update_run_mode(struct atomisp_sub_device *asd) +{ + struct atomisp_device *isp = asd->isp; + struct v4l2_ctrl *ctrl = asd->run_mode; + struct v4l2_ctrl *c; + s32 mode; + + if (ctrl->val != ATOMISP_RUN_MODE_VIDEO && + asd->continuous_mode->val) + mode = ATOMISP_RUN_MODE_PREVIEW; + else + mode = ctrl->val; + + c = v4l2_ctrl_find( + isp->inputs[asd->input_curr].camera->ctrl_handler, + V4L2_CID_RUN_MODE); + + if (c) + return v4l2_ctrl_s_ctrl(c, mode); + + return 0; +} + +int atomisp_update_run_mode(struct atomisp_sub_device *asd) +{ + int rval; + + mutex_lock(asd->ctrl_handler.lock); + rval = __atomisp_update_run_mode(asd); + mutex_unlock(asd->ctrl_handler.lock); + + return rval; +} + +static int s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct atomisp_sub_device *asd = container_of( + ctrl->handler, struct atomisp_sub_device, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_RUN_MODE: + return __atomisp_update_run_mode(asd); + case V4L2_CID_DEPTH_MODE: + if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) { + dev_err(asd->isp->dev, "ISP is streaming, it is not supported to change the depth mode\n"); + return -EINVAL; + } + break; + } + + return 0; +} + +static const struct v4l2_ctrl_ops ctrl_ops = { + .s_ctrl = &s_ctrl, +}; + +static const struct v4l2_ctrl_config ctrl_fmt_auto = { + .ops = &ctrl_ops, + .id = V4L2_CID_FMT_AUTO, + .name = "Automatic format guessing", + .type = V4L2_CTRL_TYPE_BOOLEAN, + .min = 0, + .max = 1, + .step = 1, + .def = 1, +}; + +static const char * const ctrl_run_mode_menu[] = { + NULL, + "Video", + "Still capture", + "Continuous capture", + "Preview", +}; + +static const struct v4l2_ctrl_config ctrl_run_mode = { + .ops = &ctrl_ops, + .id = V4L2_CID_RUN_MODE, + .name = "Atomisp run mode", + .type = V4L2_CTRL_TYPE_MENU, + .min = 1, + .def = 1, + .max = 4, + .qmenu = ctrl_run_mode_menu, +}; + +static const char * const ctrl_vfpp_mode_menu[] = { + "Enable", /* vfpp always enabled */ + "Disable to scaler mode", /* CSS into video mode and disable */ + "Disable to low latency mode", /* CSS into still mode and disable */ +}; + +static const struct v4l2_ctrl_config ctrl_vfpp = { + .id = V4L2_CID_VFPP, + .name = "Atomisp vf postprocess", + .type = V4L2_CTRL_TYPE_MENU, + .min = 0, + .def = 0, + .max = 2, + .qmenu = ctrl_vfpp_mode_menu, +}; + +/* + * Control for ISP continuous mode + * + * When enabled, capture processing is possible without + * stopping the preview pipeline. When disabled, ISP needs + * to be restarted between preview and capture. + */ +static const struct v4l2_ctrl_config ctrl_continuous_mode = { + .ops = &ctrl_ops, + .id = V4L2_CID_ATOMISP_CONTINUOUS_MODE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Continuous mode", + .min = 0, + .max = 1, + .step = 1, + .def = 0, +}; + +/* + * Control for continuous mode raw buffer size + * + * The size of the RAW ringbuffer sets limit on how much + * back in time application can go when requesting capture + * frames to be rendered, and how many frames can be rendered + * in a burst at full sensor rate. + * + * Note: this setting has a big impact on memory consumption of + * the CSS subsystem. + */ +static const struct v4l2_ctrl_config ctrl_continuous_raw_buffer_size = { + .ops = &ctrl_ops, + .id = V4L2_CID_ATOMISP_CONTINUOUS_RAW_BUFFER_SIZE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Continuous raw ringbuffer size", + .min = 1, + .max = 100, /* depends on CSS version, runtime checked */ + .step = 1, + .def = 3, +}; + +/* + * Control for enabling continuous viewfinder + * + * When enabled, and ISP is in continuous mode (see ctrl_continuous_mode ), + * preview pipeline continues concurrently with capture + * processing. When disabled, and continuous mode is used, + * preview is paused while captures are processed, but + * full pipeline restart is not needed. + * + * By setting this to disabled, capture processing is + * essentially given priority over preview, and the effective + * capture output rate may be higher than with continuous + * viewfinder enabled. + */ +static const struct v4l2_ctrl_config ctrl_continuous_viewfinder = { + .id = V4L2_CID_ATOMISP_CONTINUOUS_VIEWFINDER, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Continuous viewfinder", + .min = 0, + .max = 1, + .step = 1, + .def = 0, +}; + +/* + * Control for enabling Lock&Unlock Raw Buffer mechanism + * + * When enabled, Raw Buffer can be locked and unlocked. + * Application can hold the exp_id of Raw Buffer + * and unlock it when no longer needed. + * Note: Make sure set this configuration before creating stream. + */ +static const struct v4l2_ctrl_config ctrl_enable_raw_buffer_lock = { + .id = V4L2_CID_ENABLE_RAW_BUFFER_LOCK, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Lock Unlock Raw Buffer", + .min = 0, + .max = 1, + .step = 1, + .def = 0, +}; + +/* + * Control to disable digital zoom of the whole stream + * + * When it is true, pipe configuation enable_dz will be set to false. + * This can help get a better performance by disabling pp binary. + * + * Note: Make sure set this configuration before creating stream. + */ +static const struct v4l2_ctrl_config ctrl_disable_dz = { + .id = V4L2_CID_DISABLE_DZ, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Disable digital zoom", + .min = 0, + .max = 1, + .step = 1, + .def = 0, +}; + +/* + * Control for ISP depth mode + * + * When enabled, that means ISP will deal with dual streams and sensors will be + * in slave/master mode. + * slave sensor will have no output until master sensor is streamed on. + */ +static const struct v4l2_ctrl_config ctrl_depth_mode = { + .ops = &ctrl_ops, + .id = V4L2_CID_DEPTH_MODE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Depth mode", + .min = 0, + .max = 1, + .step = 1, + .def = 0, +}; + +#ifdef ISP2401 +/* + * Control for selectting ISP version + * + * When enabled, that means ISP version will be used ISP2.7. when disable, the + * isp will default to use ISP2.2. + * Note: Make sure set this configuration before creating stream. + */ +static const struct v4l2_ctrl_config ctrl_select_isp_version = { + .ops = &ctrl_ops, + .id = V4L2_CID_ATOMISP_SELECT_ISP_VERSION, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Select Isp version", + .min = 0, + .max = 1, + .step = 1, + .def = 0, +}; + +#ifdef CONFIG_ION +/* + * Control for ISP ion device fd + * + * userspace will open ion device and pass the fd to kernel. + * this fd will be used to map shared fd to buffer. + */ +static const struct v4l2_ctrl_config ctrl_ion_dev_fd = { + .ops = &ctrl_ops, + .id = V4L2_CID_ATOMISP_ION_DEVICE_FD, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Ion Device Fd", + .min = -1, + .max = 1024, + .step = 1, + .def = ION_FD_UNSET +}; +#endif + +#endif +static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd, + struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type) +{ + pipe->type = buf_type; + pipe->asd = asd; + pipe->isp = asd->isp; + spin_lock_init(&pipe->irq_lock); + INIT_LIST_HEAD(&pipe->activeq); + INIT_LIST_HEAD(&pipe->activeq_out); + INIT_LIST_HEAD(&pipe->buffers_waiting_for_param); + INIT_LIST_HEAD(&pipe->per_frame_params); + memset(pipe->frame_request_config_id, + 0, VIDEO_MAX_FRAME * sizeof(unsigned int)); + memset(pipe->frame_params, + 0, VIDEO_MAX_FRAME * + sizeof(struct atomisp_css_params_with_list *)); +} + +static void atomisp_init_acc_pipe(struct atomisp_sub_device *asd, + struct atomisp_acc_pipe *pipe) +{ + pipe->asd = asd; + pipe->isp = asd->isp; + INIT_LIST_HEAD(&asd->acc.fw); + INIT_LIST_HEAD(&asd->acc.memory_maps); + ida_init(&asd->acc.ida); +} + +/* + * isp_subdev_init_entities - Initialize V4L2 subdev and media entity + * @asd: ISP CCDC module + * + * Return 0 on success and a negative error code on failure. + */ +static int isp_subdev_init_entities(struct atomisp_sub_device *asd) +{ + struct v4l2_subdev *sd = &asd->subdev; + struct media_pad *pads = asd->pads; + struct media_entity *me = &sd->entity; + int ret; + + asd->input = ATOMISP_SUBDEV_INPUT_NONE; + + v4l2_subdev_init(sd, &isp_subdev_v4l2_ops); + sprintf(sd->name, "ATOMISP_SUBDEV_%d", asd->index); + v4l2_set_subdevdata(sd, asd); + sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE; + + pads[ATOMISP_SUBDEV_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + pads[ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW].flags = MEDIA_PAD_FL_SOURCE; + pads[ATOMISP_SUBDEV_PAD_SOURCE_VF].flags = MEDIA_PAD_FL_SOURCE; + pads[ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE].flags = MEDIA_PAD_FL_SOURCE; + pads[ATOMISP_SUBDEV_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE; + + asd->fmt[ATOMISP_SUBDEV_PAD_SINK].fmt.code = + MEDIA_BUS_FMT_SBGGR10_1X10; + asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW].fmt.code = + MEDIA_BUS_FMT_SBGGR10_1X10; + asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_VF].fmt.code = + MEDIA_BUS_FMT_SBGGR10_1X10; + asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE].fmt.code = + MEDIA_BUS_FMT_SBGGR10_1X10; + asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_VIDEO].fmt.code = + MEDIA_BUS_FMT_SBGGR10_1X10; + + me->ops = &isp_subdev_media_ops; + me->function = MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN; + ret = media_entity_pads_init(me, ATOMISP_SUBDEV_PADS_NUM, pads); + if (ret < 0) + return ret; + + atomisp_init_subdev_pipe(asd, &asd->video_in, + V4L2_BUF_TYPE_VIDEO_OUTPUT); + + atomisp_init_subdev_pipe(asd, &asd->video_out_preview, + V4L2_BUF_TYPE_VIDEO_CAPTURE); + + atomisp_init_subdev_pipe(asd, &asd->video_out_vf, + V4L2_BUF_TYPE_VIDEO_CAPTURE); + + atomisp_init_subdev_pipe(asd, &asd->video_out_capture, + V4L2_BUF_TYPE_VIDEO_CAPTURE); + + atomisp_init_subdev_pipe(asd, &asd->video_out_video_capture, + V4L2_BUF_TYPE_VIDEO_CAPTURE); + + atomisp_init_acc_pipe(asd, &asd->video_acc); + + ret = atomisp_video_init(&asd->video_in, "MEMORY"); + if (ret < 0) + return ret; + + ret = atomisp_video_init(&asd->video_out_capture, "CAPTURE"); + if (ret < 0) + return ret; + + ret = atomisp_video_init(&asd->video_out_vf, "VIEWFINDER"); + if (ret < 0) + return ret; + + ret = atomisp_video_init(&asd->video_out_preview, "PREVIEW"); + if (ret < 0) + return ret; + + ret = atomisp_video_init(&asd->video_out_video_capture, "VIDEO"); + if (ret < 0) + return ret; + + atomisp_acc_init(&asd->video_acc, "ACC"); + + ret = v4l2_ctrl_handler_init(&asd->ctrl_handler, 1); + if (ret) + return ret; + + asd->fmt_auto = v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_fmt_auto, NULL); + asd->run_mode = v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_run_mode, NULL); + asd->vfpp = v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_vfpp, NULL); + asd->continuous_mode = v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_continuous_mode, NULL); + asd->continuous_viewfinder = v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_continuous_viewfinder, + NULL); + asd->continuous_raw_buffer_size = + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_continuous_raw_buffer_size, + NULL); + + asd->enable_raw_buffer_lock = + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_enable_raw_buffer_lock, + NULL); + asd->depth_mode = + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_depth_mode, + NULL); + asd->disable_dz = + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_disable_dz, + NULL); +#ifdef ISP2401 + asd->select_isp_version = + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_select_isp_version, + NULL); + +#ifdef CONFIG_ION + asd->ion_dev_fd = + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_ion_dev_fd, + NULL); +#endif +#endif + + /* Make controls visible on subdev as well. */ + asd->subdev.ctrl_handler = &asd->ctrl_handler; + spin_lock_init(&asd->raw_buffer_bitmap_lock); + return asd->ctrl_handler.error; +} + +int atomisp_create_pads_links(struct atomisp_device *isp) +{ + struct atomisp_sub_device *asd; + int i, j, ret = 0; + isp->num_of_streams = 2; + for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) { + for (j = 0; j < isp->num_of_streams; j++) { + ret = + media_create_pad_link(&isp->csi2_port[i].subdev. + entity, CSI2_PAD_SOURCE, + &isp->asd[j].subdev.entity, + ATOMISP_SUBDEV_PAD_SINK, 0); + if (ret < 0) + return ret; + } + } + for (i = 0; i < isp->input_cnt - 2; i++) { + ret = media_create_pad_link(&isp->inputs[i].camera->entity, 0, + &isp->csi2_port[isp->inputs[i]. + port].subdev.entity, + CSI2_PAD_SINK, + MEDIA_LNK_FL_ENABLED | + MEDIA_LNK_FL_IMMUTABLE); + if (ret < 0) + return ret; + } + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + ret = media_create_pad_link(&asd->subdev.entity, + ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW, + &asd->video_out_preview.vdev.entity, + 0, 0); + if (ret < 0) + return ret; + ret = media_create_pad_link(&asd->subdev.entity, + ATOMISP_SUBDEV_PAD_SOURCE_VF, + &asd->video_out_vf.vdev.entity, 0, + 0); + if (ret < 0) + return ret; + ret = media_create_pad_link(&asd->subdev.entity, + ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE, + &asd->video_out_capture.vdev.entity, + 0, 0); + if (ret < 0) + return ret; + ret = media_create_pad_link(&asd->subdev.entity, + ATOMISP_SUBDEV_PAD_SOURCE_VIDEO, + &asd->video_out_video_capture.vdev. + entity, 0, 0); + if (ret < 0) + return ret; + /* + * file input only supported on subdev0 + * so do not create pad link for subdevs other then subdev0 + */ + if (asd->index) + return 0; + ret = media_create_pad_link(&asd->video_in.vdev.entity, + 0, &asd->subdev.entity, + ATOMISP_SUBDEV_PAD_SINK, 0); + if (ret < 0) + return ret; + } + return 0; +} + +static void atomisp_subdev_cleanup_entities(struct atomisp_sub_device *asd) +{ + v4l2_ctrl_handler_free(&asd->ctrl_handler); + + media_entity_cleanup(&asd->subdev.entity); +} + +void atomisp_subdev_cleanup_pending_events(struct atomisp_sub_device *asd) +{ + struct v4l2_fh *fh, *fh_tmp; + struct v4l2_event event; + unsigned int i, pending_event; + + list_for_each_entry_safe(fh, fh_tmp, + &asd->subdev.devnode->fh_list, list) { + pending_event = v4l2_event_pending(fh); + for (i = 0; i < pending_event; i++) + v4l2_event_dequeue(fh, &event, 1); + } +} + +void atomisp_subdev_unregister_entities(struct atomisp_sub_device *asd) +{ + atomisp_subdev_cleanup_entities(asd); + v4l2_device_unregister_subdev(&asd->subdev); + atomisp_video_unregister(&asd->video_in); + atomisp_video_unregister(&asd->video_out_preview); + atomisp_video_unregister(&asd->video_out_vf); + atomisp_video_unregister(&asd->video_out_capture); + atomisp_video_unregister(&asd->video_out_video_capture); + atomisp_acc_unregister(&asd->video_acc); +} + +int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, + struct v4l2_device *vdev) +{ + int ret; + + /* Register the subdev and video node. */ + ret = v4l2_device_register_subdev(vdev, &asd->subdev); + if (ret < 0) + goto error; + + ret = atomisp_video_register(&asd->video_out_capture, vdev); + if (ret < 0) + goto error; + + ret = atomisp_video_register(&asd->video_out_vf, vdev); + if (ret < 0) + goto error; + + ret = atomisp_video_register(&asd->video_out_preview, vdev); + if (ret < 0) + goto error; + + ret = atomisp_video_register(&asd->video_out_video_capture, vdev); + if (ret < 0) + goto error; + + ret = atomisp_acc_register(&asd->video_acc, vdev); + if (ret < 0) + goto error; + + /* + * file input only supported on subdev0 + * so do not create video node for subdevs other then subdev0 + */ + if (asd->index) + return 0; + ret = atomisp_video_register(&asd->video_in, vdev); + if (ret < 0) + goto error; + + return 0; + +error: + atomisp_subdev_unregister_entities(asd); + return ret; +} + +/* + * atomisp_subdev_init - ISP Subdevice initialization. + * @dev: Device pointer specific to the ATOM ISP. + * + * TODO: Get the initialisation values from platform data. + * + * Return 0 on success or a negative error code otherwise. + */ +int atomisp_subdev_init(struct atomisp_device *isp) +{ + struct atomisp_sub_device *asd; + int i, ret = 0; + + /* + * CSS2.0 running ISP2400 support + * multiple streams + */ + isp->num_of_streams = 2; + isp->asd = devm_kzalloc(isp->dev, sizeof(struct atomisp_sub_device) * + isp->num_of_streams, GFP_KERNEL); + if (!isp->asd) + return -ENOMEM; + for (i = 0; i < isp->num_of_streams; i++) { + asd = &isp->asd[i]; + spin_lock_init(&asd->lock); + asd->isp = isp; + isp_subdev_init_params(asd); + asd->index = i; + ret = isp_subdev_init_entities(asd); + if (ret < 0) { + atomisp_subdev_cleanup_entities(asd); + break; + } + } + + return ret; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h new file mode 100644 index 0000000000000..59ff8723c1827 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h @@ -0,0 +1,467 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __ATOMISP_SUBDEV_H__ +#define __ATOMISP_SUBDEV_H__ + +#include +#include +#include +#include + +#include "atomisp_common.h" +#include "atomisp_compat.h" +#include "atomisp_v4l2.h" + +#include "ia_css.h" + +/* EXP_ID's ranger is 1 ~ 250 */ +#define ATOMISP_MAX_EXP_ID (250) +enum atomisp_subdev_input_entity { + ATOMISP_SUBDEV_INPUT_NONE, + ATOMISP_SUBDEV_INPUT_MEMORY, + ATOMISP_SUBDEV_INPUT_CSI2, + /* + * The following enum for CSI2 port must go together in one row. + * Otherwise it breaks the code logic. + */ + ATOMISP_SUBDEV_INPUT_CSI2_PORT1, + ATOMISP_SUBDEV_INPUT_CSI2_PORT2, + ATOMISP_SUBDEV_INPUT_CSI2_PORT3, +}; + +#define ATOMISP_SUBDEV_PAD_SINK 0 +/* capture output for still frames */ +#define ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE 1 +/* viewfinder output for downscaled capture output */ +#define ATOMISP_SUBDEV_PAD_SOURCE_VF 2 +/* preview output for display */ +#define ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW 3 +/* main output for video pipeline */ +#define ATOMISP_SUBDEV_PAD_SOURCE_VIDEO 4 +#define ATOMISP_SUBDEV_PADS_NUM 5 + +struct atomisp_in_fmt_conv { + u32 code; + uint8_t bpp; /* bits per pixel */ + uint8_t depth; /* uncompressed */ + enum atomisp_input_format atomisp_in_fmt; + enum atomisp_css_bayer_order bayer_order; + enum atomisp_input_format css_stream_fmt; +}; + +struct atomisp_sub_device; + +struct atomisp_video_pipe { + struct video_device vdev; + enum v4l2_buf_type type; + struct media_pad pad; + struct videobuf_queue capq; + struct videobuf_queue outq; + struct list_head activeq; + struct list_head activeq_out; + /* + * the buffers waiting for per-frame parameters, this is only valid + * in per-frame setting mode. + */ + struct list_head buffers_waiting_for_param; + /* the link list to store per_frame parameters */ + struct list_head per_frame_params; + + unsigned int buffers_in_css; + + /* irq_lock is used to protect video buffer state change operations and + * also to make activeq, activeq_out, capq and outq list + * operations atomic. */ + spinlock_t irq_lock; + unsigned int users; + + struct atomisp_device *isp; + struct v4l2_pix_format pix; + uint32_t sh_fmt; + + struct atomisp_sub_device *asd; + + /* + * This frame_config_id is got from CSS when dequueues buffers from CSS, + * it is used to indicate which parameter it has applied. + */ + unsigned int frame_config_id[VIDEO_MAX_FRAME]; + /* + * This config id is set when camera HAL enqueues buffer, it has a + * non-zero value to indicate which parameter it needs to applu + */ + unsigned int frame_request_config_id[VIDEO_MAX_FRAME]; + struct atomisp_css_params_with_list *frame_params[VIDEO_MAX_FRAME]; +#ifdef ISP2401 + + /* + * move wdt from asd struct to create wdt for each pipe + */ + struct timer_list wdt; + unsigned int wdt_duration; /* in jiffies */ + unsigned long wdt_expires; + atomic_t wdt_count; +#endif +}; + +struct atomisp_acc_pipe { + struct video_device vdev; + unsigned int users; + bool running; + struct atomisp_sub_device *asd; + struct atomisp_device *isp; +}; + +struct atomisp_pad_format { + struct v4l2_mbus_framefmt fmt; + struct v4l2_rect crop; + struct v4l2_rect compose; +}; + +/* Internal states for flash process */ +enum atomisp_flash_state { + ATOMISP_FLASH_IDLE, + ATOMISP_FLASH_REQUESTED, + ATOMISP_FLASH_ONGOING, + ATOMISP_FLASH_DONE +}; + +/* + * This structure is used to cache the CSS parameters, it aligns to + * struct ia_css_isp_config but without un-supported and deprecated parts. + */ +struct atomisp_css_params { + struct ia_css_wb_config wb_config; + struct ia_css_cc_config cc_config; + struct ia_css_tnr_config tnr_config; + struct ia_css_ecd_config ecd_config; + struct ia_css_ynr_config ynr_config; + struct ia_css_fc_config fc_config; + struct ia_css_formats_config formats_config; + struct ia_css_cnr_config cnr_config; + struct ia_css_macc_config macc_config; + struct ia_css_ctc_config ctc_config; + struct ia_css_aa_config aa_config; + struct ia_css_aa_config baa_config; + struct ia_css_ce_config ce_config; + struct ia_css_ob_config ob_config; + struct ia_css_dp_config dp_config; + struct ia_css_de_config de_config; + struct ia_css_gc_config gc_config; + struct ia_css_nr_config nr_config; + struct ia_css_ee_config ee_config; + struct ia_css_anr_config anr_config; + struct ia_css_3a_config s3a_config; + struct ia_css_xnr_config xnr_config; + struct ia_css_dz_config dz_config; + struct ia_css_cc_config yuv2rgb_cc_config; + struct ia_css_cc_config rgb2yuv_cc_config; + struct ia_css_macc_table macc_table; + struct ia_css_gamma_table gamma_table; + struct ia_css_ctc_table ctc_table; + + struct ia_css_xnr_table xnr_table; + struct ia_css_rgb_gamma_table r_gamma_table; + struct ia_css_rgb_gamma_table g_gamma_table; + struct ia_css_rgb_gamma_table b_gamma_table; + + struct ia_css_vector motion_vector; + struct ia_css_anr_thres anr_thres; + + struct ia_css_dvs_6axis_config *dvs_6axis; + struct ia_css_dvs2_coefficients *dvs2_coeff; + struct ia_css_shading_table *shading_table; + struct ia_css_morph_table *morph_table; + + /* + * Used to store the user pointer address of the frame. driver needs to + * translate to ia_css_frame * and then set to CSS. + */ + void *output_frame; + uint32_t isp_config_id; + + /* Indicates which parameters need to be updated. */ + struct atomisp_parameters update_flag; +}; + +struct atomisp_subdev_params { + /* FIXME: Determines whether raw capture buffer are being passed to + * user space. Unimplemented for now. */ + int online_process; + int yuv_ds_en; + unsigned int color_effect; + bool gdc_cac_en; + bool macc_en; + bool bad_pixel_en; + bool video_dis_en; + bool sc_en; + bool fpn_en; + bool xnr_en; + bool low_light; + int false_color; + unsigned int histogram_elenum; + + /* Current grid info */ + struct atomisp_css_grid_info curr_grid_info; + enum atomisp_css_pipe_id s3a_enabled_pipe; + + int s3a_output_bytes; + + bool dis_proj_data_valid; + + struct ia_css_dz_config dz_config; /** Digital Zoom */ + struct ia_css_capture_config capture_config; + + struct atomisp_css_isp_config config; + + /* current configurations */ + struct atomisp_css_params css_param; + + /* + * Intermediate buffers used to communicate data between + * CSS and user space. + */ + struct ia_css_3a_statistics *s3a_user_stat; + + void *metadata_user[ATOMISP_METADATA_TYPE_NUM]; + uint32_t metadata_width_size; + + struct ia_css_dvs2_statistics *dvs_stat; + struct atomisp_css_dvs_6axis *dvs_6axis; + uint32_t exp_id; + int dvs_hor_coef_bytes; + int dvs_ver_coef_bytes; + int dvs_ver_proj_bytes; + int dvs_hor_proj_bytes; + + /* Flash */ + int num_flash_frames; + enum atomisp_flash_state flash_state; + enum atomisp_frame_status last_frame_status; + + /* continuous capture */ + struct atomisp_cont_capture_conf offline_parm; + /* Flag to check if driver needs to update params to css */ + bool css_update_params_needed; +}; + +struct atomisp_css_params_with_list { + /* parameters for CSS */ + struct atomisp_css_params params; + struct list_head list; +}; + +struct atomisp_acc_fw { + struct atomisp_css_fw_info *fw; + unsigned int handle; + unsigned int flags; + unsigned int type; + struct { + size_t length; + unsigned long css_ptr; + } args[ATOMISP_ACC_NR_MEMORY]; + struct list_head list; +}; + +struct atomisp_map { + ia_css_ptr ptr; + size_t length; + struct list_head list; + /* FIXME: should keep book which maps are currently used + * by binaries and not allow releasing those + * which are in use. Implement by reference counting. + */ +}; + +struct atomisp_sub_device { + struct v4l2_subdev subdev; + struct media_pad pads[ATOMISP_SUBDEV_PADS_NUM]; + struct atomisp_pad_format fmt[ATOMISP_SUBDEV_PADS_NUM]; + uint16_t capture_pad; /* main capture pad; defines much of isp config */ + + enum atomisp_subdev_input_entity input; + unsigned int output; + struct atomisp_video_pipe video_in; + struct atomisp_video_pipe video_out_capture; /* capture output */ + struct atomisp_video_pipe video_out_vf; /* viewfinder output */ + struct atomisp_video_pipe video_out_preview; /* preview output */ + struct atomisp_acc_pipe video_acc; + /* video pipe main output */ + struct atomisp_video_pipe video_out_video_capture; + /* struct isp_subdev_params params; */ + spinlock_t lock; + struct atomisp_device *isp; + struct v4l2_ctrl_handler ctrl_handler; + struct v4l2_ctrl *fmt_auto; + struct v4l2_ctrl *run_mode; + struct v4l2_ctrl *depth_mode; + struct v4l2_ctrl *vfpp; + struct v4l2_ctrl *continuous_mode; + struct v4l2_ctrl *continuous_raw_buffer_size; + struct v4l2_ctrl *continuous_viewfinder; + struct v4l2_ctrl *enable_raw_buffer_lock; +#ifdef ISP2401 + struct v4l2_ctrl *ion_dev_fd; +#endif + struct v4l2_ctrl *disable_dz; +#ifdef ISP2401 + struct v4l2_ctrl *select_isp_version; +#endif + + struct { + struct list_head fw; + struct list_head memory_maps; + struct atomisp_css_pipeline *pipeline; + bool extension_mode; + struct ida ida; + struct completion acc_done; + void *acc_stages; + } acc; + + struct atomisp_subdev_params params; + + struct atomisp_stream_env stream_env[ATOMISP_INPUT_STREAM_NUM]; + + struct v4l2_pix_format dvs_envelop; + unsigned int s3a_bufs_in_css[CSS_PIPE_ID_NUM]; + unsigned int dis_bufs_in_css; + + unsigned int metadata_bufs_in_css + [ATOMISP_INPUT_STREAM_NUM][CSS_PIPE_ID_NUM]; + /* The list of free and available metadata buffers for CSS */ + struct list_head metadata[ATOMISP_METADATA_TYPE_NUM]; + /* The list of metadata buffers which have been en-queued to CSS */ + struct list_head metadata_in_css[ATOMISP_METADATA_TYPE_NUM]; + /* The list of metadata buffers which are ready for userspace to get */ + struct list_head metadata_ready[ATOMISP_METADATA_TYPE_NUM]; + + /* The list of free and available s3a stat buffers for CSS */ + struct list_head s3a_stats; + /* The list of s3a stat buffers which have been en-queued to CSS */ + struct list_head s3a_stats_in_css; + /* The list of s3a stat buffers which are ready for userspace to get */ + struct list_head s3a_stats_ready; + + struct list_head dis_stats; + struct list_head dis_stats_in_css; + spinlock_t dis_stats_lock; + + struct atomisp_css_frame *vf_frame; /* TODO: needed? */ + struct atomisp_css_frame *raw_output_frame; + enum atomisp_frame_status frame_status[VIDEO_MAX_FRAME]; + + /* This field specifies which camera (v4l2 input) is selected. */ + int input_curr; + /* This field specifies which sensor is being selected when there + are multiple sensors connected to the same MIPI port. */ + int sensor_curr; + + atomic_t sof_count; + atomic_t sequence; /* Sequence value that is assigned to buffer. */ + atomic_t sequence_temp; + + unsigned int streaming; /* Hold both mutex and lock to change this */ + bool stream_prepared; /* whether css stream is created */ + + /* subdev index: will be used to show which subdev is holding the + * resource, like which camera is used by which subdev + */ + unsigned int index; + + /* delayed memory allocation for css */ + struct completion init_done; + struct workqueue_struct *delayed_init_workq; + unsigned int delayed_init; + struct work_struct delayed_init_work; + + unsigned int latest_preview_exp_id; /* CSS ZSL/SDV raw buffer id */ + + unsigned int mipi_frame_size; + + bool copy_mode; /* CSI2+ use copy mode */ + bool yuvpp_mode; /* CSI2+ yuvpp pipe */ + + int raw_buffer_bitmap[ATOMISP_MAX_EXP_ID/32 + 1]; /* Record each Raw Buffer lock status */ + int raw_buffer_locked_count; + spinlock_t raw_buffer_bitmap_lock; + +#ifndef ISP2401 + struct timer_list wdt; + unsigned int wdt_duration; /* in jiffies */ + unsigned long wdt_expires; + +#endif + struct atomisp_resolution sensor_array_res; + bool high_speed_mode; /* Indicate whether now is a high speed mode */ + int pending_capture_request; /* Indicates the number of pending capture requests. */ +#ifndef ISP2401 + +#else + bool re_trigger_capture; +#endif + unsigned int preview_exp_id; + unsigned int postview_exp_id; +}; + +extern const struct atomisp_in_fmt_conv atomisp_in_fmt_conv[]; + +u32 atomisp_subdev_uncompressed_code(u32 code); +bool atomisp_subdev_is_compressed(u32 code); +const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv(u32 code); +#ifndef ISP2401 +const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt( + enum atomisp_input_format atomisp_in_fmt); +#else +const struct atomisp_in_fmt_conv + *atomisp_find_in_fmt_conv_by_atomisp_in_fmt(enum atomisp_input_format + atomisp_in_fmt); +#endif +const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_compressed(u32 code); +bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd, + unsigned int source_pad); +uint16_t atomisp_subdev_source_pad(struct video_device *vdev); + +/* Get pointer to appropriate format */ +struct v4l2_mbus_framefmt +*atomisp_subdev_get_ffmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, uint32_t which, + uint32_t pad); +struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + uint32_t which, uint32_t pad, + uint32_t target); +int atomisp_subdev_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + uint32_t which, uint32_t pad, uint32_t target, + uint32_t flags, struct v4l2_rect *r); +/* Actually set the format */ +void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, uint32_t which, + uint32_t pad, struct v4l2_mbus_framefmt *ffmt); + +int atomisp_update_run_mode(struct atomisp_sub_device *asd); + +void atomisp_subdev_cleanup_pending_events(struct atomisp_sub_device *asd); + +void atomisp_subdev_unregister_entities(struct atomisp_sub_device *asd); +int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, + struct v4l2_device *vdev); +int atomisp_subdev_init(struct atomisp_device *isp); +void atomisp_subdev_cleanup(struct atomisp_device *isp); +int atomisp_create_pads_links(struct atomisp_device *isp); + +#endif /* __ATOMISP_SUBDEV_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h new file mode 100644 index 0000000000000..319ded6a96daf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h @@ -0,0 +1,187 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __ATOMISP_TABLES_H__ +#define __ATOMISP_TABLES_H__ + +#include "sh_css_params.h" + +/*Sepia image effect table*/ +static struct atomisp_css_cc_config sepia_cc_config = { + .fraction_bits = 8, + .matrix = {141, 18, 68, -40, -5, -19, 35, 4, 16}, +}; + +/*Negative image effect table*/ +static struct atomisp_css_cc_config nega_cc_config = { + .fraction_bits = 8, + .matrix = {255, 29, 120, 0, 374, 342, 0, 672, -301}, +}; + +/*Mono image effect table*/ +static struct atomisp_css_cc_config mono_cc_config = { + .fraction_bits = 8, + .matrix = {255, 29, 120, 0, 0, 0, 0, 0, 0}, +}; + +/*Skin whiten image effect table*/ +static struct atomisp_css_macc_table skin_low_macc_table = { + .data = { + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 7168, 0, 2048, 8192, + 5120, -1024, 2048, 8192, + 8192, 2048, -1024, 5120, + 8192, 2048, 0, 7168, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 + } +}; + +static struct atomisp_css_macc_table skin_medium_macc_table = { + .data = { + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 5120, 0, 6144, 8192, + 3072, -1024, 2048, 6144, + 6144, 2048, -1024, 3072, + 8192, 6144, 0, 5120, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 + } +}; + +static struct atomisp_css_macc_table skin_high_macc_table = { + .data = { + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 4096, 0, 8192, 8192, + 0, -2048, 4096, 6144, + 6144, 4096, -2048, 0, + 8192, 8192, 0, 4096, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 + } +}; + +/*Blue enhencement image effect table*/ +static struct atomisp_css_macc_table blue_macc_table = { + .data = { + 9728, -3072, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 9728, 0, -3072, 8192, + 12800, 1536, -3072, 8192, + 11264, 0, 0, 11264, + 9728, -3072, 0, 11264 + } +}; + +/*Green enhencement image effect table*/ +static struct atomisp_css_macc_table green_macc_table = { + .data = { + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 10240, 4096, 0, 8192, + 10240, 4096, 0, 12288, + 12288, 0, 0, 12288, + 14336, -2048, 4096, 8192, + 10240, 0, 4096, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 + } +}; + +static struct atomisp_css_ctc_table vivid_ctc_table = { + .data.vamem_2 = { + 0, 384, 837, 957, 1011, 1062, 1083, 1080, + 1078, 1077, 1053, 1039, 1012, 992, 969, 951, + 929, 906, 886, 866, 845, 823, 809, 790, + 772, 758, 741, 726, 711, 701, 688, 675, + 666, 656, 648, 639, 633, 626, 618, 612, + 603, 594, 582, 572, 557, 545, 529, 516, + 504, 491, 480, 467, 459, 447, 438, 429, + 419, 412, 404, 397, 389, 382, 376, 368, + 363, 357, 351, 345, 340, 336, 330, 326, + 321, 318, 312, 308, 304, 300, 297, 294, + 291, 286, 284, 281, 278, 275, 271, 268, + 261, 257, 251, 245, 240, 235, 232, 225, + 223, 218, 213, 209, 206, 204, 199, 197, + 193, 189, 186, 185, 183, 179, 177, 175, + 172, 170, 169, 167, 164, 164, 162, 160, + 158, 157, 156, 154, 154, 152, 151, 150, + 149, 148, 146, 147, 146, 144, 143, 143, + 142, 141, 140, 141, 139, 138, 138, 138, + 137, 136, 136, 135, 134, 134, 134, 133, + 132, 132, 131, 130, 131, 130, 129, 128, + 129, 127, 127, 127, 127, 125, 125, 125, + 123, 123, 122, 120, 118, 115, 114, 111, + 110, 108, 106, 105, 103, 102, 100, 99, + 97, 97, 96, 95, 94, 93, 93, 91, + 91, 91, 90, 90, 89, 89, 88, 88, + 89, 88, 88, 87, 87, 87, 87, 86, + 87, 87, 86, 87, 86, 86, 84, 84, + 82, 80, 78, 76, 74, 72, 70, 68, + 67, 65, 62, 60, 58, 56, 55, 54, + 53, 51, 49, 49, 47, 45, 45, 45, + 41, 40, 39, 39, 34, 33, 34, 32, + 25, 23, 24, 20, 13, 9, 12, 0, + 0 + } +}; +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c new file mode 100644 index 0000000000000..adc900272f6fb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c @@ -0,0 +1,164 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include +#include +#include "atomisp_internal.h" +#include "atomisp_tpg.h" + +static int tpg_s_stream(struct v4l2_subdev *sd, int enable) +{ + return 0; +} + +static int tpg_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + /*to fake*/ + return 0; +} + +static int tpg_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + + if (format->pad) + return -EINVAL; + /* only raw8 grbg is supported by TPG */ + fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; + if (format->which == V4L2_SUBDEV_FORMAT_TRY) { + cfg->try_fmt = *fmt; + return 0; + } + return 0; +} + +static int tpg_log_status(struct v4l2_subdev *sd) +{ + /*to fake*/ + return 0; +} + +static int tpg_s_power(struct v4l2_subdev *sd, int on) +{ + return 0; +} + +static int tpg_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + /*to fake*/ + return 0; +} + +static int tpg_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + /*to fake*/ + return 0; +} + +static int tpg_enum_frame_ival(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_interval_enum *fie) +{ + /*to fake*/ + return 0; +} + +static const struct v4l2_subdev_video_ops tpg_video_ops = { + .s_stream = tpg_s_stream, +}; + +static const struct v4l2_subdev_core_ops tpg_core_ops = { + .log_status = tpg_log_status, + .s_power = tpg_s_power, +}; + +static const struct v4l2_subdev_pad_ops tpg_pad_ops = { + .enum_mbus_code = tpg_enum_mbus_code, + .enum_frame_size = tpg_enum_frame_size, + .enum_frame_interval = tpg_enum_frame_ival, + .get_fmt = tpg_get_fmt, + .set_fmt = tpg_set_fmt, +}; + +static const struct v4l2_subdev_ops tpg_ops = { + .core = &tpg_core_ops, + .video = &tpg_video_ops, + .pad = &tpg_pad_ops, +}; + +void atomisp_tpg_unregister_entities(struct atomisp_tpg_device *tpg) +{ + media_entity_cleanup(&tpg->sd.entity); + v4l2_device_unregister_subdev(&tpg->sd); +} + +int atomisp_tpg_register_entities(struct atomisp_tpg_device *tpg, + struct v4l2_device *vdev) +{ + int ret; + /* Register the subdev and video nodes. */ + ret = v4l2_device_register_subdev(vdev, &tpg->sd); + if (ret < 0) + goto error; + + return 0; + +error: + atomisp_tpg_unregister_entities(tpg); + return ret; +} + +void atomisp_tpg_cleanup(struct atomisp_device *isp) +{ + +} + +int atomisp_tpg_init(struct atomisp_device *isp) +{ + struct atomisp_tpg_device *tpg = &isp->tpg; + struct v4l2_subdev *sd = &tpg->sd; + struct media_pad *pads = tpg->pads; + struct media_entity *me = &sd->entity; + int ret; + + tpg->isp = isp; + v4l2_subdev_init(sd, &tpg_ops); + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + strcpy(sd->name, "tpg_subdev"); + v4l2_set_subdevdata(sd, tpg); + + pads[0].flags = MEDIA_PAD_FL_SINK; + me->function = MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN; + + ret = media_entity_pads_init(me, 1, pads); + if (ret < 0) + goto fail; + return 0; +fail: + atomisp_tpg_cleanup(isp); + return ret; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h new file mode 100644 index 0000000000000..af354c4bfd3eb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h @@ -0,0 +1,38 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_TPG_H__ +#define __ATOMISP_TPG_H__ + +#include +#include + +struct atomisp_tpg_device { + struct v4l2_subdev sd; + struct atomisp_device *isp; + struct media_pad pads[1]; +}; + +void atomisp_tpg_cleanup(struct atomisp_device *isp); +int atomisp_tpg_init(struct atomisp_device *isp); +void atomisp_tpg_unregister_entities(struct atomisp_tpg_device *tpg); +int atomisp_tpg_register_entities(struct atomisp_tpg_device *tpg, + struct v4l2_device *vdev); + +#endif /* __ATOMISP_TPG_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h new file mode 100644 index 0000000000000..462b296554c7b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h @@ -0,0 +1,129 @@ +/* + * Support Camera Imaging tracer core. + * + * Copyright (c) 2013 Intel Corporation. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM atomisp + +#if !defined(ATOMISP_TRACE_EVENT_H) || defined(TRACE_HEADER_MULTI_READ) +#define ATOMISP_TRACE_EVENT_H + +#include +#include +TRACE_EVENT(camera_meminfo, + + TP_PROTO(const char *name, int uptr_size, int counter, int sys_size, + int sys_res_size, int cam_sys_use, int cam_dyc_use, + int cam_res_use), + + TP_ARGS(name, uptr_size, counter, sys_size, sys_res_size, cam_sys_use, + cam_dyc_use, cam_res_use), + + TP_STRUCT__entry( + __array(char, name, 24) + __field(int, uptr_size) + __field(int, counter) + __field(int, sys_size) + __field(int, sys_res_size) + __field(int, cam_res_use) + __field(int, cam_dyc_use) + __field(int, cam_sys_use) + ), + + TP_fast_assign( + strlcpy(__entry->name, name, 24); + __entry->uptr_size = uptr_size; + __entry->counter = counter; + __entry->sys_size = sys_size; + __entry->sys_res_size = sys_res_size; + __entry->cam_res_use = cam_res_use; + __entry->cam_dyc_use = cam_dyc_use; + __entry->cam_sys_use = cam_sys_use; + ), + + TP_printk( + "<%s> User ptr memory:%d pages,\tISP private memory used:%d" + " pages:\tsysFP system size:%d,\treserved size:%d" + "\tcamFP sysUse:%d,\tdycUse:%d,\tresUse:%d.\n", + __entry->name, __entry->uptr_size, __entry->counter, + __entry->sys_size, __entry->sys_res_size, __entry->cam_sys_use, + __entry->cam_dyc_use, __entry->cam_res_use) +); + +TRACE_EVENT(camera_debug, + + TP_PROTO(const char *name, char *info, const int line), + + TP_ARGS(name, info, line), + + TP_STRUCT__entry( + __array(char, name, 24) + __array(char, info, 24) + __field(int, line) + ), + + TP_fast_assign( + strlcpy(__entry->name, name, 24); + strlcpy(__entry->info, info, 24); + __entry->line = line; + ), + + TP_printk("<%s>-<%d> %s\n", __entry->name, __entry->line, + __entry->info) +); + +TRACE_EVENT(ipu_cstate, + + TP_PROTO(int cstate), + + TP_ARGS(cstate), + + TP_STRUCT__entry( + __field(int, cstate) + ), + + TP_fast_assign( + __entry->cstate = cstate; + ), + + TP_printk("cstate=%d", __entry->cstate) +); + +TRACE_EVENT(ipu_pstate, + + TP_PROTO(int freq, int util), + + TP_ARGS(freq, util), + + TP_STRUCT__entry( + __field(int, freq) + __field(int, util) + ), + + TP_fast_assign( + __entry->freq = freq; + __entry->util = util; + ), + + TP_printk("freq=%d util=%d", __entry->freq, __entry->util) +); +#endif + +#undef TRACE_INCLUDE_PATH +#undef TRACE_INCLUDE_FILE +#define TRACE_INCLUDE_PATH . +#define TRACE_INCLUDE_FILE atomisp_trace_event +/* This part must be outside protection */ +#include diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c new file mode 100644 index 0000000000000..aaae663cc218e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -0,0 +1,1562 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "../../include/linux/atomisp_gmin_platform.h" + +#include "atomisp_cmd.h" +#include "atomisp_common.h" +#include "atomisp_fops.h" +#include "atomisp_file.h" +#include "atomisp_ioctl.h" +#include "atomisp_internal.h" +#include "atomisp_acc.h" +#include "atomisp-regs.h" +#include "atomisp_dfs_tables.h" +#include "atomisp_drvfs.h" +#include "hmm/hmm.h" +#include "atomisp_trace_event.h" + +#include "hrt/hive_isp_css_mm_hrt.h" + +#include "device_access.h" + +/* G-Min addition: pull this in from intel_mid_pm.h */ +#define CSTATE_EXIT_LATENCY_C1 1 + +static uint skip_fwload; +module_param(skip_fwload, uint, 0644); +MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load"); + +/* set reserved memory pool size in page */ +static unsigned int repool_pgnr; +module_param(repool_pgnr, uint, 0644); +MODULE_PARM_DESC(repool_pgnr, + "Set the reserved memory pool size in page (default:0)"); + +/* set dynamic memory pool size in page */ +unsigned int dypool_pgnr = UINT_MAX; +module_param(dypool_pgnr, uint, 0644); +MODULE_PARM_DESC(dypool_pgnr, + "Set the dynamic memory pool size in page (default:0)"); + +bool dypool_enable; +module_param(dypool_enable, bool, 0644); +MODULE_PARM_DESC(dypool_enable, + "dynamic memory pool enable/disable (default:disable)"); + +/* memory optimization: deferred firmware loading */ +bool defer_fw_load; +module_param(defer_fw_load, bool, 0644); +MODULE_PARM_DESC(defer_fw_load, + "Defer FW loading until device is opened (default:disable)"); + +/* cross componnet debug message flag */ +int dbg_level; +module_param(dbg_level, int, 0644); +MODULE_PARM_DESC(dbg_level, "debug message on/off (default:off)"); + +/* log function switch */ +int dbg_func = 2; +module_param(dbg_func, int, 0644); +MODULE_PARM_DESC(dbg_func, + "log function switch non/trace_printk/printk (default:printk)"); + +int mipicsi_flag; +module_param(mipicsi_flag, int, 0644); +MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm"); + +/*set to 16x16 since this is the amount of lines and pixels the sensor +exports extra. If these are kept at the 10x8 that they were on, in yuv +downscaling modes incorrect resolutions where requested to the sensor +driver with strange outcomes as a result. The proper way tot do this +would be to have a list of tables the specify the sensor res, mipi rec, +output res, and isp output res. however since we do not have this yet, +the chosen solution is the next best thing. */ +int pad_w = 16; +module_param(pad_w, int, 0644); +MODULE_PARM_DESC(pad_w, "extra data for ISP processing"); + +int pad_h = 16; +module_param(pad_h, int, 0644); +MODULE_PARM_DESC(pad_h, "extra data for ISP processing"); + +struct device *atomisp_dev; + +void __iomem *atomisp_io_base; + +int atomisp_video_init(struct atomisp_video_pipe *video, const char *name) +{ + int ret; + const char *direction; + + switch (video->type) { + case V4L2_BUF_TYPE_VIDEO_CAPTURE: + direction = "output"; + video->pad.flags = MEDIA_PAD_FL_SINK; + video->vdev.fops = &atomisp_fops; + video->vdev.ioctl_ops = &atomisp_ioctl_ops; + break; + case V4L2_BUF_TYPE_VIDEO_OUTPUT: + direction = "input"; + video->pad.flags = MEDIA_PAD_FL_SOURCE; + video->vdev.fops = &atomisp_file_fops; + video->vdev.ioctl_ops = &atomisp_file_ioctl_ops; + break; + default: + return -EINVAL; + } + + ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad); + if (ret < 0) + return ret; + + /* Initialize the video device. */ + snprintf(video->vdev.name, sizeof(video->vdev.name), + "ATOMISP ISP %s %s", name, direction); + video->vdev.release = video_device_release_empty; + video_set_drvdata(&video->vdev, video->isp); + + return 0; +} + +void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name) +{ + video->vdev.fops = &atomisp_fops; + video->vdev.ioctl_ops = &atomisp_ioctl_ops; + + /* Initialize the video device. */ + snprintf(video->vdev.name, sizeof(video->vdev.name), + "ATOMISP ISP %s", name); + video->vdev.release = video_device_release_empty; + video_set_drvdata(&video->vdev, video->isp); +} + +int atomisp_video_register(struct atomisp_video_pipe *video, + struct v4l2_device *vdev) +{ + int ret; + + video->vdev.v4l2_dev = vdev; + + ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1); + if (ret < 0) + dev_err(vdev->dev, "%s: could not register video device (%d)\n", + __func__, ret); + + return ret; +} + +int atomisp_acc_register(struct atomisp_acc_pipe *video, + struct v4l2_device *vdev) +{ + int ret; + + video->vdev.v4l2_dev = vdev; + + ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1); + if (ret < 0) + dev_err(vdev->dev, "%s: could not register video device (%d)\n", + __func__, ret); + + return ret; +} + +void atomisp_video_unregister(struct atomisp_video_pipe *video) +{ + if (video_is_registered(&video->vdev)) { + media_entity_cleanup(&video->vdev.entity); + video_unregister_device(&video->vdev); + } +} + +void atomisp_acc_unregister(struct atomisp_acc_pipe *video) +{ + if (video_is_registered(&video->vdev)) + video_unregister_device(&video->vdev); +} + +static int atomisp_save_iunit_reg(struct atomisp_device *isp) +{ + struct pci_dev *dev = isp->pdev; + + dev_dbg(isp->dev, "%s\n", __func__); + + pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts); + /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */ + pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap); + pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr); + pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data); + pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr); + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, + &isp->saved_regs.interrupt_control); + + pci_read_config_dword(dev, MRFLD_PCI_PMCS, + &isp->saved_regs.pmcs); + /* Ensure read/write combining is enabled. */ + pci_read_config_dword(dev, PCI_I_CONTROL, + &isp->saved_regs.i_control); + isp->saved_regs.i_control |= + MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING | + MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING; + pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL, + &isp->saved_regs.csi_access_viol); + pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL, + &isp->saved_regs.csi_rcomp_config); + /* + * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE. + * ANN/CHV: RCOMP updates do not happen when using CSI2+ path + * and sensor sending "continuous clock". + * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence + * is missed, and IUNIT can hang. + * For both issues, setting this bit is a workaround. + */ + isp->saved_regs.csi_rcomp_config |= + MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE; + pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, + &isp->saved_regs.csi_afe_dly); + pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL, + &isp->saved_regs.csi_control); + if (isp->media_dev.hw_revision >= + (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT)) + isp->saved_regs.csi_control |= + MRFLD_PCI_CSI_CONTROL_PARPATHEN; + /* + * On CHT CSI_READY bit should be enabled before stream on + */ + if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 << + ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0))) + isp->saved_regs.csi_control |= + MRFLD_PCI_CSI_CONTROL_CSI_READY; + pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL, + &isp->saved_regs.csi_afe_rcomp_config); + pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL, + &isp->saved_regs.csi_afe_hs_control); + pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL, + &isp->saved_regs.csi_deadline_control); + return 0; +} + +static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp) +{ + struct pci_dev *dev = isp->pdev; + + dev_dbg(isp->dev, "%s\n", __func__); + + pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts); + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, + isp->saved_regs.ispmmadr); + pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap); + pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr); + pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data); + pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr); + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, + isp->saved_regs.interrupt_control); + pci_write_config_dword(dev, PCI_I_CONTROL, + isp->saved_regs.i_control); + + pci_write_config_dword(dev, MRFLD_PCI_PMCS, + isp->saved_regs.pmcs); + pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL, + isp->saved_regs.csi_access_viol); + pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL, + isp->saved_regs.csi_rcomp_config); + pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, + isp->saved_regs.csi_afe_dly); + pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL, + isp->saved_regs.csi_control); + pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL, + isp->saved_regs.csi_afe_rcomp_config); + pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL, + isp->saved_regs.csi_afe_hs_control); + pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL, + isp->saved_regs.csi_deadline_control); + + /* + * for MRFLD, Software/firmware needs to write a 1 to bit0 + * of the register at CSI_RECEIVER_SELECTION_REG to enable + * SH CSI backend write 0 will enable Arasan CSI backend, + * which has bugs(like sighting:4567697 and 4567699) and + * will be removed in B0 + */ + atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1); + return 0; +} + +static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) +{ + struct pci_dev *dev = isp->pdev; + u32 irq; + unsigned long flags; + + spin_lock_irqsave(&isp->lock, flags); + if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) { + spin_unlock_irqrestore(&isp->lock, flags); + dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__); + return 0; + } + /* + * MRFLD HAS requirement: cannot power off i-unit if + * ISP has IRQ not serviced. + * So, here we need to check if there is any pending + * IRQ, if so, waiting for it to be served + */ + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq); + irq = irq & 1 << INTR_IIR; + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq); + + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq); + if (!(irq & (1 << INTR_IIR))) + goto done; + + atomisp_store_uint32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF); + atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq); + if (irq != 0) { + dev_err(isp->dev, + "%s: fail to clear isp interrupt status reg=0x%x\n", + __func__, irq); + spin_unlock_irqrestore(&isp->lock, flags); + return -EAGAIN; + } else { + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq); + irq = irq & 1 << INTR_IIR; + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq); + + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq); + if (!(irq & (1 << INTR_IIR))) { + atomisp_store_uint32(MRFLD_INTR_ENABLE_REG, 0x0); + goto done; + } + dev_err(isp->dev, + "%s: error in iunit interrupt. status reg=0x%x\n", + __func__, irq); + spin_unlock_irqrestore(&isp->lock, flags); + return -EAGAIN; + } +done: + /* + * MRFLD WORKAROUND: + * before powering off IUNIT, clear the pending interrupts + * and disable the interrupt. driver should avoid writing 0 + * to IIR. It could block subsequent interrupt messages. + * HW sighting:4568410. + */ + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq); + irq &= ~(1 << INTR_IER); + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq); + + atomisp_msi_irq_uninit(isp, dev); + atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true); + spin_unlock_irqrestore(&isp->lock, flags); + + return 0; +} + + + /* + * WA for DDR DVFS enable/disable + * By default, ISP will force DDR DVFS 1600MHz before disable DVFS + */ +static void punit_ddr_dvfs_enable(bool enable) +{ + int door_bell = 1 << 8; + int max_wait = 30; + int reg; + + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®); + if (enable) { + reg &= ~(MRFLD_BIT0 | MRFLD_BIT1); + } else { + reg |= (MRFLD_BIT1 | door_bell); + reg &= ~(MRFLD_BIT0); + } + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg); + + /* Check Req_ACK to see freq status, wait until door_bell is cleared */ + while ((reg & door_bell) && max_wait--) { + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®); + usleep_range(100, 500); + } + + if (max_wait == -1) + pr_info("DDR DVFS, door bell is not cleared within 3ms\n"); +} + +/* Workaround for pmu_nc_set_power_state not ready in MRFLD */ +int atomisp_mrfld_power_down(struct atomisp_device *isp) +{ + unsigned long timeout; + u32 reg_value; + + /* writing 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */ + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); + reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK; + reg_value |= MRFLD_ISPSSPM0_IUNIT_POWER_OFF; + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value); + + /*WA:Enable DVFS*/ + if (IS_CHT) + punit_ddr_dvfs_enable(true); + + /* + * There should be no iunit access while power-down is + * in progress HW sighting: 4567865 + * FIXME: msecs_to_jiffies(50)- experienced value + */ + timeout = jiffies + msecs_to_jiffies(50); + while (1) { + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); + dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n", + reg_value); + /* wait until ISPSSPM0 bit[25:24] shows 0x3 */ + if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) == + MRFLD_ISPSSPM0_IUNIT_POWER_OFF) { + trace_ipu_cstate(0); + return 0; + } + + if (time_after(jiffies, timeout)) { + dev_err(isp->dev, "power-off iunit timeout.\n"); + return -EBUSY; + } + /* FIXME: experienced value for delay */ + usleep_range(100, 150); + } +} + + +/* Workaround for pmu_nc_set_power_state not ready in MRFLD */ +int atomisp_mrfld_power_up(struct atomisp_device *isp) +{ + unsigned long timeout; + u32 reg_value; + + /*WA for PUNIT, if DVFS enabled, ISP timeout observed*/ + if (IS_CHT) + punit_ddr_dvfs_enable(false); + + /* + * FIXME:WA for ECS28A, with this sleep, CTS + * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort + * PASS, no impact on other platforms + */ + if (IS_BYT) + msleep(10); + + /* writing 0x0 to ISPSSPM0 bit[1:0] to power off the IUNIT */ + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); + reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK; + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value); + + /* FIXME: experienced value for delay */ + timeout = jiffies + msecs_to_jiffies(50); + while (1) { + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); + dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n", + reg_value); + /* wait until ISPSSPM0 bit[25:24] shows 0x0 */ + if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) == + MRFLD_ISPSSPM0_IUNIT_POWER_ON) { + trace_ipu_cstate(1); + return 0; + } + + if (time_after(jiffies, timeout)) { + dev_err(isp->dev, "power-on iunit timeout.\n"); + return -EBUSY; + } + /* FIXME: experienced value for delay */ + usleep_range(100, 150); + } +} + +int atomisp_runtime_suspend(struct device *dev) +{ + struct atomisp_device *isp = (struct atomisp_device *) + dev_get_drvdata(dev); + int ret; + + ret = atomisp_mrfld_pre_power_down(isp); + if (ret) + return ret; + + /*Turn off the ISP d-phy*/ + ret = atomisp_ospm_dphy_down(isp); + if (ret) + return ret; + pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); + return atomisp_mrfld_power_down(isp); +} + +int atomisp_runtime_resume(struct device *dev) +{ + struct atomisp_device *isp = (struct atomisp_device *) + dev_get_drvdata(dev); + int ret; + + ret = atomisp_mrfld_power_up(isp); + if (ret) + return ret; + + pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency); + if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) { + /*Turn on ISP d-phy */ + ret = atomisp_ospm_dphy_up(isp); + if (ret) { + dev_err(isp->dev, "Failed to power up ISP!.\n"); + return -EINVAL; + } + } + + /*restore register values for iUnit and iUnitPHY registers*/ + if (isp->saved_regs.pcicmdsts) + atomisp_restore_iunit_reg(isp); + + atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true); + return 0; +} + +static int __maybe_unused atomisp_suspend(struct device *dev) +{ + struct atomisp_device *isp = (struct atomisp_device *) + dev_get_drvdata(dev); + /* FIXME: only has one isp_subdev at present */ + struct atomisp_sub_device *asd = &isp->asd[0]; + unsigned long flags; + int ret; + + /* + * FIXME: Suspend is not supported by sensors. Abort if any video + * node was opened. + */ + if (atomisp_dev_users(isp)) + return -EBUSY; + + spin_lock_irqsave(&isp->lock, flags); + if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) { + spin_unlock_irqrestore(&isp->lock, flags); + dev_err(isp->dev, "atomisp cannot suspend at this time.\n"); + return -EINVAL; + } + spin_unlock_irqrestore(&isp->lock, flags); + + ret = atomisp_mrfld_pre_power_down(isp); + if (ret) + return ret; + + /*Turn off the ISP d-phy */ + ret = atomisp_ospm_dphy_down(isp); + if (ret) { + dev_err(isp->dev, "fail to power off ISP\n"); + return ret; + } + pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); + return atomisp_mrfld_power_down(isp); +} + +static int __maybe_unused atomisp_resume(struct device *dev) +{ + struct atomisp_device *isp = (struct atomisp_device *) + dev_get_drvdata(dev); + int ret; + + ret = atomisp_mrfld_power_up(isp); + if (ret) + return ret; + + pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency); + + /*Turn on ISP d-phy */ + ret = atomisp_ospm_dphy_up(isp); + if (ret) { + dev_err(isp->dev, "Failed to power up ISP!.\n"); + return -EINVAL; + } + + /*restore register values for iUnit and iUnitPHY registers*/ + if (isp->saved_regs.pcicmdsts) + atomisp_restore_iunit_reg(isp); + + atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true); + return 0; +} + +int atomisp_csi_lane_config(struct atomisp_device *isp) +{ + static const struct { + u8 code; + u8 lanes[MRFLD_PORT_NUM]; + } portconfigs[] = { + /* Tangier/Merrifield available lane configurations */ + { 0x00, { 4, 1, 0 } }, /* 00000 */ + { 0x01, { 3, 1, 0 } }, /* 00001 */ + { 0x02, { 2, 1, 0 } }, /* 00010 */ + { 0x03, { 1, 1, 0 } }, /* 00011 */ + { 0x04, { 2, 1, 2 } }, /* 00100 */ + { 0x08, { 3, 1, 1 } }, /* 01000 */ + { 0x09, { 2, 1, 1 } }, /* 01001 */ + { 0x0a, { 1, 1, 1 } }, /* 01010 */ + + /* Anniedale/Moorefield only configurations */ + { 0x10, { 4, 2, 0 } }, /* 10000 */ + { 0x11, { 3, 2, 0 } }, /* 10001 */ + { 0x12, { 2, 2, 0 } }, /* 10010 */ + { 0x13, { 1, 2, 0 } }, /* 10011 */ + { 0x14, { 2, 2, 2 } }, /* 10100 */ + { 0x18, { 3, 2, 1 } }, /* 11000 */ + { 0x19, { 2, 2, 1 } }, /* 11001 */ + { 0x1a, { 1, 2, 1 } }, /* 11010 */ + }; + + unsigned int i, j; + u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 }; + u32 csi_control; + int nportconfigs; + u32 port_config_mask; + int port3_lanes_shift; + + if (isp->media_dev.hw_revision < + ATOMISP_HW_REVISION_ISP2401_LEGACY << + ATOMISP_HW_REVISION_SHIFT) { + /* Merrifield */ + port_config_mask = MRFLD_PORT_CONFIG_MASK; + port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT; + } else { + /* Moorefield / Cherryview */ + port_config_mask = CHV_PORT_CONFIG_MASK; + port3_lanes_shift = CHV_PORT3_LANES_SHIFT; + } + + if (isp->media_dev.hw_revision < + ATOMISP_HW_REVISION_ISP2401 << + ATOMISP_HW_REVISION_SHIFT) { + /* Merrifield / Moorefield legacy input system */ + nportconfigs = MRFLD_PORT_CONFIG_NUM; + } else { + /* Moorefield / Cherryview new input system */ + nportconfigs = ARRAY_SIZE(portconfigs); + } + + for (i = 0; i < isp->input_cnt; i++) { + struct camera_mipi_info *mipi_info; + + if (isp->inputs[i].type != RAW_CAMERA && + isp->inputs[i].type != SOC_CAMERA) + continue; + + mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera); + if (!mipi_info) + continue; + + switch (mipi_info->port) { + case ATOMISP_CAMERA_PORT_PRIMARY: + sensor_lanes[0] = mipi_info->num_lanes; + break; + case ATOMISP_CAMERA_PORT_SECONDARY: + sensor_lanes[1] = mipi_info->num_lanes; + break; + case ATOMISP_CAMERA_PORT_TERTIARY: + sensor_lanes[2] = mipi_info->num_lanes; + break; + default: + dev_err(isp->dev, + "%s: invalid port: %d for the %dth sensor\n", + __func__, mipi_info->port, i); + return -EINVAL; + } + } + + for (i = 0; i < nportconfigs; i++) { + for (j = 0; j < MRFLD_PORT_NUM; j++) + if (sensor_lanes[j] && + sensor_lanes[j] != portconfigs[i].lanes[j]) + break; + + if (j == MRFLD_PORT_NUM) + break; /* Found matching setting */ + } + + if (i >= nportconfigs) { + dev_err(isp->dev, + "%s: could not find the CSI port setting for %d-%d-%d\n", + __func__, + sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]); + return -EINVAL; + } + + pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control); + csi_control &= ~port_config_mask; + csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT) + | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT)) + | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT)) + | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT)) + | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT) + | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT) + | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift); + + pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control); + + dev_dbg(isp->dev, + "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n", + __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1], + portconfigs[i].lanes[2], csi_control); + + return 0; +} + +static int atomisp_subdev_probe(struct atomisp_device *isp) +{ + const struct atomisp_platform_data *pdata; + struct intel_v4l2_subdev_table *subdevs; + int ret, raw_index = -1; + + pdata = atomisp_get_platform_data(); + if (pdata == NULL) { + dev_err(isp->dev, "no platform data available\n"); + return 0; + } + + for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) { + struct v4l2_subdev *subdev; + struct i2c_board_info *board_info = + &subdevs->v4l2_subdev.board_info; + struct i2c_adapter *adapter = + i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id); + int sensor_num, i; + + if (adapter == NULL) { + dev_err(isp->dev, + "Failed to find i2c adapter for subdev %s\n", + board_info->type); + break; + } + + /* In G-Min, the sensor devices will already be probed + * (via ACPI) and registered, do not create new + * ones */ + subdev = atomisp_gmin_find_subdev(adapter, board_info); + ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev); + if (ret) { + dev_warn(isp->dev, "Subdev %s detection fail\n", + board_info->type); + continue; + } + + if (subdev == NULL) { + dev_warn(isp->dev, "Subdev %s detection fail\n", + board_info->type); + continue; + } + + dev_info(isp->dev, "Subdev %s successfully register\n", + board_info->type); + + switch (subdevs->type) { + case RAW_CAMERA: + raw_index = isp->input_cnt; + dev_dbg(isp->dev, "raw_index: %d\n", raw_index); + case SOC_CAMERA: + dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt); + if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) { + dev_warn(isp->dev, + "too many atomisp inputs, ignored\n"); + break; + } + + isp->inputs[isp->input_cnt].type = subdevs->type; + isp->inputs[isp->input_cnt].port = subdevs->port; + isp->inputs[isp->input_cnt].camera = subdev; + isp->inputs[isp->input_cnt].sensor_index = 0; + /* + * initialize the subdev frame size, then next we can + * judge whether frame_size store effective value via + * pixel_format. + */ + isp->inputs[isp->input_cnt].frame_size.pixel_format = 0; + isp->inputs[isp->input_cnt].camera_caps = + atomisp_get_default_camera_caps(); + sensor_num = isp->inputs[isp->input_cnt] + .camera_caps->sensor_num; + isp->input_cnt++; + for (i = 1; i < sensor_num; i++) { + if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) { + dev_warn(isp->dev, + "atomisp inputs out of range\n"); + break; + } + isp->inputs[isp->input_cnt] = + isp->inputs[isp->input_cnt - 1]; + isp->inputs[isp->input_cnt].sensor_index = i; + isp->input_cnt++; + } + break; + case CAMERA_MOTOR: + isp->motor = subdev; + break; + case LED_FLASH: + case XENON_FLASH: + isp->flash = subdev; + break; + default: + dev_dbg(isp->dev, "unknown subdev probed\n"); + break; + } + + } + + /* + * HACK: Currently VCM belongs to primary sensor only, but correct + * approach must be to acquire from platform code which sensor + * owns it. + */ + if (isp->motor && raw_index >= 0) + isp->inputs[raw_index].motor = isp->motor; + + /* Proceed even if no modules detected. For COS mode and no modules. */ + if (!isp->inputs[0].camera) + dev_warn(isp->dev, "no camera attached or fail to detect\n"); + + return atomisp_csi_lane_config(isp); +} + +static void atomisp_unregister_entities(struct atomisp_device *isp) +{ + unsigned int i; + struct v4l2_subdev *sd, *next; + + for (i = 0; i < isp->num_of_streams; i++) + atomisp_subdev_unregister_entities(&isp->asd[i]); + atomisp_tpg_unregister_entities(&isp->tpg); + atomisp_file_input_unregister_entities(&isp->file_dev); + for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) + atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]); + + list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list) + v4l2_device_unregister_subdev(sd); + + v4l2_device_unregister(&isp->v4l2_dev); + media_device_unregister(&isp->media_dev); +} + +static int atomisp_register_entities(struct atomisp_device *isp) +{ + int ret = 0; + unsigned int i; + + isp->media_dev.dev = isp->dev; + + strlcpy(isp->media_dev.model, "Intel Atom ISP", + sizeof(isp->media_dev.model)); + + media_device_init(&isp->media_dev); + isp->v4l2_dev.mdev = &isp->media_dev; + ret = v4l2_device_register(isp->dev, &isp->v4l2_dev); + if (ret < 0) { + dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n", + __func__, ret); + goto v4l2_device_failed; + } + + ret = atomisp_subdev_probe(isp); + if (ret < 0) + goto csi_and_subdev_probe_failed; + + /* Register internal entities */ + for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) { + ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i], + &isp->v4l2_dev); + if (ret == 0) + continue; + + /* error case */ + dev_err(isp->dev, "failed to register the CSI port: %d\n", i); + /* deregister all registered CSI ports */ + while (i--) + atomisp_mipi_csi2_unregister_entities( + &isp->csi2_port[i]); + + goto csi_and_subdev_probe_failed; + } + + ret = + atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev); + if (ret < 0) { + dev_err(isp->dev, "atomisp_file_input_register_entities\n"); + goto file_input_register_failed; + } + + ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev); + if (ret < 0) { + dev_err(isp->dev, "atomisp_tpg_register_entities\n"); + goto tpg_register_failed; + } + + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + + ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev); + if (ret < 0) { + dev_err(isp->dev, + "atomisp_subdev_register_entities fail\n"); + for (; i > 0; i--) + atomisp_subdev_unregister_entities( + &isp->asd[i - 1]); + goto subdev_register_failed; + } + } + + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + + init_completion(&asd->init_done); + + asd->delayed_init_workq = + alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE, + 1); + if (asd->delayed_init_workq == NULL) { + dev_err(isp->dev, + "Failed to initialize delayed init workq\n"); + ret = -ENOMEM; + + for (; i > 0; i--) + destroy_workqueue(isp->asd[i - 1]. + delayed_init_workq); + goto wq_alloc_failed; + } + INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work); + } + + for (i = 0; i < isp->input_cnt; i++) { + if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) { + dev_err(isp->dev, "isp->inputs port %d not supported\n", + isp->inputs[i].port); + ret = -EINVAL; + goto link_failed; + } + } + + dev_dbg(isp->dev, + "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt); + isp->inputs[isp->input_cnt].type = FILE_INPUT; + isp->inputs[isp->input_cnt].port = -1; + isp->inputs[isp->input_cnt].camera_caps = + atomisp_get_default_camera_caps(); + isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd; + + if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) { + dev_dbg(isp->dev, + "TPG detected, camera_cnt: %d\n", isp->input_cnt); + isp->inputs[isp->input_cnt].type = TEST_PATTERN; + isp->inputs[isp->input_cnt].port = -1; + isp->inputs[isp->input_cnt].camera_caps = + atomisp_get_default_camera_caps(); + isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd; + } else { + dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n"); + } + + ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev); + if (ret < 0) + goto link_failed; + + return media_device_register(&isp->media_dev); + +link_failed: + for (i = 0; i < isp->num_of_streams; i++) + destroy_workqueue(isp->asd[i]. + delayed_init_workq); +wq_alloc_failed: + for (i = 0; i < isp->num_of_streams; i++) + atomisp_subdev_unregister_entities( + &isp->asd[i]); +subdev_register_failed: + atomisp_tpg_unregister_entities(&isp->tpg); +tpg_register_failed: + atomisp_file_input_unregister_entities(&isp->file_dev); +file_input_register_failed: + for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) + atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]); +csi_and_subdev_probe_failed: + v4l2_device_unregister(&isp->v4l2_dev); +v4l2_device_failed: + media_device_unregister(&isp->media_dev); + media_device_cleanup(&isp->media_dev); + return ret; +} + +static int atomisp_initialize_modules(struct atomisp_device *isp) +{ + int ret; + + ret = atomisp_mipi_csi2_init(isp); + if (ret < 0) { + dev_err(isp->dev, "mipi csi2 initialization failed\n"); + goto error_mipi_csi2; + } + + ret = atomisp_file_input_init(isp); + if (ret < 0) { + dev_err(isp->dev, + "file input device initialization failed\n"); + goto error_file_input; + } + + ret = atomisp_tpg_init(isp); + if (ret < 0) { + dev_err(isp->dev, "tpg initialization failed\n"); + goto error_tpg; + } + + ret = atomisp_subdev_init(isp); + if (ret < 0) { + dev_err(isp->dev, "ISP subdev initialization failed\n"); + goto error_isp_subdev; + } + + + return 0; + +error_isp_subdev: +error_tpg: + atomisp_tpg_cleanup(isp); +error_file_input: + atomisp_file_input_cleanup(isp); +error_mipi_csi2: + atomisp_mipi_csi2_cleanup(isp); + return ret; +} + +static void atomisp_uninitialize_modules(struct atomisp_device *isp) +{ + atomisp_tpg_cleanup(isp); + atomisp_file_input_cleanup(isp); + atomisp_mipi_csi2_cleanup(isp); +} + +const struct firmware * +atomisp_load_firmware(struct atomisp_device *isp) +{ + const struct firmware *fw; + int rc; + char *fw_path = NULL; + + if (skip_fwload) + return NULL; + + if (isp->media_dev.hw_revision == + ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) + | ATOMISP_HW_STEPPING_A0)) + fw_path = "shisp_2401a0_v21.bin"; + + if (isp->media_dev.hw_revision == + ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT) + | ATOMISP_HW_STEPPING_A0)) + fw_path = "shisp_2401a0_legacy_v21.bin"; + + if (isp->media_dev.hw_revision == + ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT) + | ATOMISP_HW_STEPPING_B0)) + fw_path = "shisp_2400b0_v21.bin"; + + if (!fw_path) { + dev_err(isp->dev, "Unsupported hw_revision 0x%x\n", + isp->media_dev.hw_revision); + return NULL; + } + + rc = request_firmware(&fw, fw_path, isp->dev); + if (rc) { + dev_err(isp->dev, + "atomisp: Error %d while requesting firmware %s\n", + rc, fw_path); + return NULL; + } + + return fw; +} + +/* + * Check for flags the driver was compiled with against the PCI + * device. Always returns true on other than ISP 2400. + */ +static bool is_valid_device(struct pci_dev *dev, + const struct pci_device_id *id) +{ + unsigned int a0_max_id; + + switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) { + case ATOMISP_PCI_DEVICE_SOC_MRFLD: + a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX; + break; + case ATOMISP_PCI_DEVICE_SOC_BYT: + a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX; + break; + default: + return true; + } + + return dev->revision > a0_max_id; +} + +static int init_atomisp_wdts(struct atomisp_device *isp) +{ + int i, err; + + atomic_set(&isp->wdt_work_queued, 0); + isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1); + if (isp->wdt_work_queue == NULL) { + dev_err(isp->dev, "Failed to initialize wdt work queue\n"); + err = -ENOMEM; + goto alloc_fail; + } + INIT_WORK(&isp->wdt_work, atomisp_wdt_work); + + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; +#ifndef ISP2401 + timer_setup(&asd->wdt, atomisp_wdt, 0); +#else + timer_setup(&asd->video_out_capture.wdt, atomisp_wdt, 0); + timer_setup(&asd->video_out_preview.wdt, atomisp_wdt, 0); + timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0); + timer_setup(&asd->video_out_video_capture.wdt, atomisp_wdt, 0); +#endif + } + return 0; +alloc_fail: + return err; +} + +#define ATOM_ISP_PCI_BAR 0 + +static int atomisp_pci_probe(struct pci_dev *dev, + const struct pci_device_id *id) +{ + const struct atomisp_platform_data *pdata; + struct atomisp_device *isp; + unsigned int start; + void __iomem *base; + int err, val; + u32 irq; + + if (!dev) { + dev_err(&dev->dev, "atomisp: error device ptr\n"); + return -EINVAL; + } + + if (!is_valid_device(dev, id)) + return -ENODEV; + /* Pointer to struct device. */ + atomisp_dev = &dev->dev; + + pdata = atomisp_get_platform_data(); + if (pdata == NULL) + dev_warn(&dev->dev, "no platform data available\n"); + + err = pcim_enable_device(dev); + if (err) { + dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n", + err); + return err; + } + + start = pci_resource_start(dev, ATOM_ISP_PCI_BAR); + dev_dbg(&dev->dev, "start: 0x%x\n", start); + + err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev)); + if (err) { + dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n", + err); + return err; + } + + base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR]; + dev_dbg(&dev->dev, "base: %p\n", base); + + atomisp_io_base = base; + + dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base); + + isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL); + if (!isp) { + dev_err(&dev->dev, "Failed to alloc CI ISP structure\n"); + return -ENOMEM; + } + isp->pdev = dev; + isp->dev = &dev->dev; + isp->sw_contex.power_state = ATOM_ISP_POWER_UP; + isp->saved_regs.ispmmadr = start; + + rt_mutex_init(&isp->mutex); + mutex_init(&isp->streamoff_mutex); + spin_lock_init(&isp->lock); + + /* This is not a true PCI device on SoC, so the delay is not needed. */ + isp->pdev->d3_delay = 0; + + switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) { + case ATOMISP_PCI_DEVICE_SOC_MRFLD: + isp->media_dev.hw_revision = + (ATOMISP_HW_REVISION_ISP2400 + << ATOMISP_HW_REVISION_SHIFT) | + ATOMISP_HW_STEPPING_B0; + + switch (id->device) { + case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179: + isp->dfs = &dfs_config_merr_1179; + break; + case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A: + isp->dfs = &dfs_config_merr_117a; + break; + default: + isp->dfs = &dfs_config_merr; + break; + } + isp->hpll_freq = HPLL_FREQ_1600MHZ; + break; + case ATOMISP_PCI_DEVICE_SOC_BYT: + isp->media_dev.hw_revision = + (ATOMISP_HW_REVISION_ISP2400 + << ATOMISP_HW_REVISION_SHIFT) | + ATOMISP_HW_STEPPING_B0; +#ifdef FIXME + if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) || + INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) { + isp->dfs = &dfs_config_byt_cr; + isp->hpll_freq = HPLL_FREQ_2000MHZ; + } else +#endif + { + isp->dfs = &dfs_config_byt; + isp->hpll_freq = HPLL_FREQ_1600MHZ; + } + /* HPLL frequency is known to be device-specific, but we don't + * have specs yet for exactly how it varies. Default to + * BYT-CR but let provisioning set it via EFI variable */ + isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq", + HPLL_FREQ_2000MHZ); + + /* + * for BYT/CHT we are put isp into D3cold to avoid pci registers access + * in power off. Set d3cold_delay to 0 since default 100ms is not + * necessary. + */ + isp->pdev->d3cold_delay = 0; + break; + case ATOMISP_PCI_DEVICE_SOC_ANN: + isp->media_dev.hw_revision = ( +#ifdef ISP2401_NEW_INPUT_SYSTEM + ATOMISP_HW_REVISION_ISP2401 +#else + ATOMISP_HW_REVISION_ISP2401_LEGACY +#endif + << ATOMISP_HW_REVISION_SHIFT); + isp->media_dev.hw_revision |= isp->pdev->revision < 2 ? + ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; + isp->dfs = &dfs_config_merr; + isp->hpll_freq = HPLL_FREQ_1600MHZ; + break; + case ATOMISP_PCI_DEVICE_SOC_CHT: + isp->media_dev.hw_revision = ( +#ifdef ISP2401_NEW_INPUT_SYSTEM + ATOMISP_HW_REVISION_ISP2401 +#else + ATOMISP_HW_REVISION_ISP2401_LEGACY +#endif + << ATOMISP_HW_REVISION_SHIFT); + isp->media_dev.hw_revision |= isp->pdev->revision < 2 ? + ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; + + isp->dfs = &dfs_config_cht; + isp->pdev->d3cold_delay = 0; + + iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val); + switch (val & CCK_FUSE_HPLL_FREQ_MASK) { + case 0x00: + isp->hpll_freq = HPLL_FREQ_800MHZ; + break; + case 0x01: + isp->hpll_freq = HPLL_FREQ_1600MHZ; + break; + case 0x02: + isp->hpll_freq = HPLL_FREQ_2000MHZ; + break; + default: + isp->hpll_freq = HPLL_FREQ_1600MHZ; + dev_warn(isp->dev, + "read HPLL from cck failed.default 1600MHz.\n"); + } + break; + default: + dev_err(&dev->dev, "un-supported IUNIT device\n"); + return -ENODEV; + } + + dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n", + isp->hpll_freq); + + isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY; + + /* Load isp firmware from user space */ + if (!defer_fw_load) { + isp->firmware = atomisp_load_firmware(isp); + if (!isp->firmware) { + err = -ENOENT; + goto load_fw_fail; + } + + err = atomisp_css_check_firmware_version(isp); + if (err) { + dev_dbg(&dev->dev, "Firmware version check failed\n"); + goto fw_validation_fail; + } + } + + pci_set_master(dev); + pci_set_drvdata(dev, isp); + + err = pci_enable_msi(dev); + if (err) { + dev_err(&dev->dev, "Failed to enable msi (%d)\n", err); + goto enable_msi_fail; + } + + atomisp_msi_irq_init(isp, dev); + + pm_qos_add_request(&isp->pm_qos, PM_QOS_CPU_DMA_LATENCY, + PM_QOS_DEFAULT_VALUE); + + /* + * for MRFLD, Software/firmware needs to write a 1 to bit 0 of + * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI + * backend write 0 will enable Arasan CSI backend, which has + * bugs(like sighting:4567697 and 4567699) and will be removed + * in B0 + */ + atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1); + + if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) == + ATOMISP_PCI_DEVICE_SOC_MRFLD) { + u32 csi_afe_trim; + + /* + * Workaround for imbalance data eye issue which is observed + * on TNG B0. + */ + pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, + &csi_afe_trim); + csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK << + MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) | + (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK << + MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) | + (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK << + MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT)); + csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM << + MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) | + (MRFLD_PCI_CSI2_HSRXCLKTRIM << + MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) | + (MRFLD_PCI_CSI3_HSRXCLKTRIM << + MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT); + pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, + csi_afe_trim); + } + + err = atomisp_initialize_modules(isp); + if (err < 0) { + dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err); + goto initialize_modules_fail; + } + + err = atomisp_register_entities(isp); + if (err < 0) { + dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n", + err); + goto register_entities_fail; + } + err = atomisp_create_pads_links(isp); + if (err < 0) + goto register_entities_fail; + /* init atomisp wdts */ + if (init_atomisp_wdts(isp) != 0) + goto wdt_work_queue_fail; + + /* save the iunit context only once after all the values are init'ed. */ + atomisp_save_iunit_reg(isp); + + pm_runtime_put_noidle(&dev->dev); + pm_runtime_allow(&dev->dev); + + hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr); + err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED); + if (err) { + dev_err(&dev->dev, "Failed to register reserved memory pool.\n"); + goto hmm_pool_fail; + } + + /* Init ISP memory management */ + hmm_init(); + + err = devm_request_threaded_irq(&dev->dev, dev->irq, + atomisp_isr, atomisp_isr_thread, + IRQF_SHARED, "isp_irq", isp); + if (err) { + dev_err(&dev->dev, "Failed to request irq (%d)\n", err); + goto request_irq_fail; + } + + /* Load firmware into ISP memory */ + if (!defer_fw_load) { + err = atomisp_css_load_firmware(isp); + if (err) { + dev_err(&dev->dev, "Failed to init css.\n"); + goto css_init_fail; + } + } else { + dev_dbg(&dev->dev, "Skip css init.\n"); + } + /* Clear FW image from memory */ + release_firmware(isp->firmware); + isp->firmware = NULL; + isp->css_env.isp_css_fw.data = NULL; + + atomisp_drvfs_init(&dev->driver->driver, isp); + + return 0; + +css_init_fail: + devm_free_irq(&dev->dev, dev->irq, isp); +request_irq_fail: + hmm_cleanup(); + hmm_pool_unregister(HMM_POOL_TYPE_RESERVED); +hmm_pool_fail: + destroy_workqueue(isp->wdt_work_queue); +wdt_work_queue_fail: + atomisp_acc_cleanup(isp); + atomisp_unregister_entities(isp); +register_entities_fail: + atomisp_uninitialize_modules(isp); +initialize_modules_fail: + pm_qos_remove_request(&isp->pm_qos); + atomisp_msi_irq_uninit(isp, dev); +enable_msi_fail: +fw_validation_fail: + release_firmware(isp->firmware); +load_fw_fail: + /* + * Switch off ISP, as keeping it powered on would prevent + * reaching S0ix states. + * + * The following lines have been copied from atomisp suspend path + */ + + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq); + irq = irq & 1 << INTR_IIR; + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq); + + pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq); + irq &= ~(1 << INTR_IER); + pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq); + + atomisp_msi_irq_uninit(isp, dev); + + atomisp_ospm_dphy_down(isp); + + /* Address later when we worry about the ...field chips */ + if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp)) + dev_err(&dev->dev, "Failed to switch off ISP\n"); + return err; +} + +static void atomisp_pci_remove(struct pci_dev *dev) +{ + struct atomisp_device *isp = (struct atomisp_device *) + pci_get_drvdata(dev); + + atomisp_drvfs_exit(); + + atomisp_acc_cleanup(isp); + + atomisp_css_unload_firmware(isp); + hmm_cleanup(); + + pm_runtime_forbid(&dev->dev); + pm_runtime_get_noresume(&dev->dev); + pm_qos_remove_request(&isp->pm_qos); + + atomisp_msi_irq_uninit(isp, dev); + atomisp_unregister_entities(isp); + + destroy_workqueue(isp->wdt_work_queue); + atomisp_file_input_cleanup(isp); + + release_firmware(isp->firmware); + + hmm_pool_unregister(HMM_POOL_TYPE_RESERVED); +} + +static const struct pci_device_id atomisp_pci_tbl[] = { +#if defined(ISP2400) || defined(ISP2400B0) + /* Merrifield */ + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x117a)}, + /* Baytrail */ + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0f38)}, +#elif defined(ISP2401) + /* Anniedale (Merrifield+ / Moorefield) */ + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1478)}, + /* Cherrytrail */ + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x22b8)}, +#endif + {0,} +}; + +MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl); + +static const struct dev_pm_ops atomisp_pm_ops = { + .runtime_suspend = atomisp_runtime_suspend, + .runtime_resume = atomisp_runtime_resume, + .suspend = atomisp_suspend, + .resume = atomisp_resume, +}; + +static struct pci_driver atomisp_pci_driver = { + .driver = { + .pm = &atomisp_pm_ops, + }, + .name = "atomisp-isp2", + .id_table = atomisp_pci_tbl, + .probe = atomisp_pci_probe, + .remove = atomisp_pci_remove, +}; + +module_pci_driver(atomisp_pci_driver); + +MODULE_AUTHOR("Wen Wang "); +MODULE_AUTHOR("Xiaolin Zhang "); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver"); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h new file mode 100644 index 0000000000000..944a6cf40a2f0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h @@ -0,0 +1,40 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __ATOMISP_V4L2_H__ +#define __ATOMISP_V4L2_H__ + +struct atomisp_video_pipe; +struct atomisp_acc_pipe; +struct v4l2_device; +struct atomisp_device; +struct firmware; + +int atomisp_video_init(struct atomisp_video_pipe *video, const char *name); +void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name); +void atomisp_video_unregister(struct atomisp_video_pipe *video); +int atomisp_video_register(struct atomisp_video_pipe *video, + struct v4l2_device *vdev); +void atomisp_acc_unregister(struct atomisp_acc_pipe *video); +int atomisp_acc_register(struct atomisp_acc_pipe *video, + struct v4l2_device *vdev); +const struct firmware *atomisp_load_firmware(struct atomisp_device *isp); +int atomisp_csi_lane_config(struct atomisp_device *isp); + +#endif /* __ATOMISP_V4L2_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile b/drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile new file mode 100644 index 0000000000000..ee5631b0e635a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile @@ -0,0 +1,2 @@ +ccflags-y += -DISP2400B0 +ISP2400B0 := y diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h new file mode 100644 index 0000000000000..914aa7f987000 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h @@ -0,0 +1,376 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_CIRCBUF_H +#define _IA_CSS_CIRCBUF_H + +#include +#include +#include +#include +#include +#include "ia_css_circbuf_comm.h" +#include "ia_css_circbuf_desc.h" + +/**************************************************************** + * + * Data structures. + * + ****************************************************************/ +/** + * @brief Data structure for the circular buffer. + */ +typedef struct ia_css_circbuf_s ia_css_circbuf_t; +struct ia_css_circbuf_s { + ia_css_circbuf_desc_t *desc; /* Pointer to the descriptor of the circbuf */ + ia_css_circbuf_elem_t *elems; /* an array of elements */ +}; + +/** + * @brief Create the circular buffer. + * + * @param cb The pointer to the circular buffer. + * @param elems An array of elements. + * @param desc The descriptor set to the size using ia_css_circbuf_desc_init(). + */ +extern void ia_css_circbuf_create( + ia_css_circbuf_t *cb, + ia_css_circbuf_elem_t *elems, + ia_css_circbuf_desc_t *desc); + +/** + * @brief Destroy the circular buffer. + * + * @param cb The pointer to the circular buffer. + */ +extern void ia_css_circbuf_destroy( + ia_css_circbuf_t *cb); + +/** + * @brief Pop a value out of the circular buffer. + * Get a value at the head of the circular buffer. + * The user should call "ia_css_circbuf_is_empty()" + * to avoid accessing to an empty buffer. + * + * @param cb The pointer to the circular buffer. + * + * @return the pop-out value. + */ +extern uint32_t ia_css_circbuf_pop( + ia_css_circbuf_t *cb); + +/** + * @brief Extract a value out of the circular buffer. + * Get a value at an arbitrary poistion in the circular + * buffer. The user should call "ia_css_circbuf_is_empty()" + * to avoid accessing to an empty buffer. + * + * @param cb The pointer to the circular buffer. + * @param offset The offset from "start" to the target position. + * + * @return the extracted value. + */ +extern uint32_t ia_css_circbuf_extract( + ia_css_circbuf_t *cb, + int offset); + +/**************************************************************** + * + * Inline functions. + * + ****************************************************************/ +/** + * @brief Set the "val" field in the element. + * + * @param elem The pointer to the element. + * @param val The value to be set. + */ +static inline void ia_css_circbuf_elem_set_val( + ia_css_circbuf_elem_t *elem, + uint32_t val) +{ + OP___assert(elem != NULL); + + elem->val = val; +} + +/** + * @brief Initialize the element. + * + * @param elem The pointer to the element. + */ +static inline void ia_css_circbuf_elem_init( + ia_css_circbuf_elem_t *elem) +{ + OP___assert(elem != NULL); + ia_css_circbuf_elem_set_val(elem, 0); +} + +/** + * @brief Copy an element. + * + * @param src The element as the copy source. + * @param dest The element as the copy destination. + */ +static inline void ia_css_circbuf_elem_cpy( + ia_css_circbuf_elem_t *src, + ia_css_circbuf_elem_t *dest) +{ + OP___assert(src != NULL); + OP___assert(dest != NULL); + + ia_css_circbuf_elem_set_val(dest, src->val); +} + +/** + * @brief Get position in the circular buffer. + * + * @param cb The pointer to the circular buffer. + * @param base The base position. + * @param offset The offset. + * + * @return the position at offset. + */ +static inline uint8_t ia_css_circbuf_get_pos_at_offset( + ia_css_circbuf_t *cb, + uint32_t base, + int offset) +{ + uint8_t dest; + + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + OP___assert(cb->desc->size > 0); + + /* step 1: adjudst the offset */ + while (offset < 0) { + offset += cb->desc->size; + } + + /* step 2: shift and round by the upper limit */ + dest = OP_std_modadd(base, offset, cb->desc->size); + + return dest; +} + +/** + * @brief Get the offset between two positions in the circular buffer. + * Get the offset from the source position to the terminal position, + * along the direction in which the new elements come in. + * + * @param cb The pointer to the circular buffer. + * @param src_pos The source position. + * @param dest_pos The terminal position. + * + * @return the offset. + */ +static inline int ia_css_circbuf_get_offset( + ia_css_circbuf_t *cb, + uint32_t src_pos, + uint32_t dest_pos) +{ + int offset; + + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + + offset = (int)(dest_pos - src_pos); + offset += (offset < 0) ? cb->desc->size : 0; + + return offset; +} + +/** + * @brief Get the maximum number of elements. + * + * @param cb The pointer to the circular buffer. + * + * @return the maximum number of elements. + * + * TODO: Test this API. + */ +static inline uint32_t ia_css_circbuf_get_size( + ia_css_circbuf_t *cb) +{ + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + + return cb->desc->size; +} + +/** + * @brief Get the number of available elements. + * + * @param cb The pointer to the circular buffer. + * + * @return the number of available elements. + */ +static inline uint32_t ia_css_circbuf_get_num_elems( + ia_css_circbuf_t *cb) +{ + int num; + + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + + num = ia_css_circbuf_get_offset(cb, cb->desc->start, cb->desc->end); + + return (uint32_t)num; +} + +/** + * @brief Test if the circular buffer is empty. + * + * @param cb The pointer to the circular buffer. + * + * @return + * - true when it is empty. + * - false when it is not empty. + */ +static inline bool ia_css_circbuf_is_empty( + ia_css_circbuf_t *cb) +{ + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + + return ia_css_circbuf_desc_is_empty(cb->desc); +} + +/** + * @brief Test if the circular buffer is full. + * + * @param cb The pointer to the circular buffer. + * + * @return + * - true when it is full. + * - false when it is not full. + */ +static inline bool ia_css_circbuf_is_full(ia_css_circbuf_t *cb) +{ + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + + return ia_css_circbuf_desc_is_full(cb->desc); +} + +/** + * @brief Write a new element into the circular buffer. + * Write a new element WITHOUT checking whether the + * circular buffer is full or not. So it also overwrites + * the oldest element when the buffer is full. + * + * @param cb The pointer to the circular buffer. + * @param elem The new element. + */ +static inline void ia_css_circbuf_write( + ia_css_circbuf_t *cb, + ia_css_circbuf_elem_t elem) +{ + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + + /* Cannot continue as the queue is full*/ + assert(!ia_css_circbuf_is_full(cb)); + + ia_css_circbuf_elem_cpy(&elem, &cb->elems[cb->desc->end]); + + cb->desc->end = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->end, 1); +} + +/** + * @brief Push a value in the circular buffer. + * Put a new value at the tail of the circular buffer. + * The user should call "ia_css_circbuf_is_full()" + * to avoid accessing to a full buffer. + * + * @param cb The pointer to the circular buffer. + * @param val The value to be pushed in. + */ +static inline void ia_css_circbuf_push( + ia_css_circbuf_t *cb, + uint32_t val) +{ + ia_css_circbuf_elem_t elem; + + OP___assert(cb != NULL); + + /* set up an element */ + ia_css_circbuf_elem_init(&elem); + ia_css_circbuf_elem_set_val(&elem, val); + + /* write the element into the buffer */ + ia_css_circbuf_write(cb, elem); +} + +/** + * @brief Get the number of free elements. + * + * @param cb The pointer to the circular buffer. + * + * @return: The number of free elements. + */ +static inline uint32_t ia_css_circbuf_get_free_elems( + ia_css_circbuf_t *cb) +{ + OP___assert(cb != NULL); + OP___assert(cb->desc != NULL); + + return ia_css_circbuf_desc_get_free_elems(cb->desc); +} + +/** + * @brief Peek an element in Circular Buffer. + * + * @param cb The pointer to the circular buffer. + * @param offset Offset to the element. + * + * @return the elements value. + */ +extern uint32_t ia_css_circbuf_peek( + ia_css_circbuf_t *cb, + int offset); + +/** + * @brief Get an element in Circular Buffer. + * + * @param cb The pointer to the circular buffer. + * @param offset Offset to the element. + * + * @return the elements value. + */ +extern uint32_t ia_css_circbuf_peek_from_start( + ia_css_circbuf_t *cb, + int offset); + +/** + * @brief Increase Size of a Circular Buffer. + * Use 'CAUTION' before using this function, This was added to + * support / fix issue with increasing size for tagger only + * + * @param cb The pointer to the circular buffer. + * @param sz_delta delta increase for new size + * @param elems (optional) pointers to new additional elements + * cb element array size will not be increased dynamically, + * but new elements should be added at the end to existing + * cb element array which if of max_size >= new size + * + * @return true on succesfully increasing the size + * false on failure + */ +extern bool ia_css_circbuf_increase_size( + ia_css_circbuf_t *cb, + unsigned int sz_delta, + ia_css_circbuf_elem_t *elems); + +#endif /*_IA_CSS_CIRCBUF_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h new file mode 100644 index 0000000000000..3fc0330b9526d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h @@ -0,0 +1,56 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_CIRCBUF_COMM_H +#define _IA_CSS_CIRCBUF_COMM_H + +#include /* uint8_t, uint32_t */ + +#define IA_CSS_CIRCBUF_PADDING 1 /* The circular buffer is implemented in lock-less manner, wherein + * the head and tail can advance independently without any locks. + * But to achieve this, an extra buffer element is required to detect + * queue full & empty conditions, wherein the tail trails the head for + * full and is equal to head for empty condition. This causes 1 buffer + * not being available for use. + */ + +/**************************************************************** + * + * Portable Data structures + * + ****************************************************************/ +/** + * @brief Data structure for the circular descriptor. + */ +typedef struct ia_css_circbuf_desc_s ia_css_circbuf_desc_t; +struct ia_css_circbuf_desc_s { + uint8_t size; /* the maximum number of elements*/ + uint8_t step; /* number of bytes per element */ + uint8_t start; /* index of the oldest element */ + uint8_t end; /* index at which to write the new element */ +}; +#define SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT \ + (4 * sizeof(uint8_t)) + +/** + * @brief Data structure for the circular buffer element. + */ +typedef struct ia_css_circbuf_elem_s ia_css_circbuf_elem_t; +struct ia_css_circbuf_elem_s { + uint32_t val; /* the value stored in the element */ +}; +#define SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT \ + (sizeof(uint32_t)) + +#endif /*_IA_CSS_CIRCBUF_COMM_H*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h new file mode 100644 index 0000000000000..8dd7cd6cd3d83 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h @@ -0,0 +1,169 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_CIRCBUF_DESC_H_ +#define _IA_CSS_CIRCBUF_DESC_H_ + +#include +#include +#include +#include +#include "ia_css_circbuf_comm.h" +/**************************************************************** + * + * Inline functions. + * + ****************************************************************/ +/** + * @brief Test if the circular buffer is empty. + * + * @param cb_desc The pointer to the circular buffer descriptor. + * + * @return + * - true when it is empty. + * - false when it is not empty. + */ +static inline bool ia_css_circbuf_desc_is_empty( + ia_css_circbuf_desc_t *cb_desc) +{ + OP___assert(cb_desc != NULL); + return (cb_desc->end == cb_desc->start); +} + +/** + * @brief Test if the circular buffer descriptor is full. + * + * @param cb_desc The pointer to the circular buffer + * descriptor. + * + * @return + * - true when it is full. + * - false when it is not full. + */ +static inline bool ia_css_circbuf_desc_is_full( + ia_css_circbuf_desc_t *cb_desc) +{ + OP___assert(cb_desc != NULL); + return (OP_std_modadd(cb_desc->end, 1, cb_desc->size) == cb_desc->start); +} + +/** + * @brief Initialize the circular buffer descriptor + * + * @param cb_desc The pointer circular buffer descriptor + * @param size The size of the circular buffer + */ +static inline void ia_css_circbuf_desc_init( + ia_css_circbuf_desc_t *cb_desc, + int8_t size) +{ + OP___assert(cb_desc != NULL); + cb_desc->size = size; +} + +/** + * @brief Get a position in the circular buffer descriptor. + * + * @param cb The pointer to the circular buffer descriptor. + * @param base The base position. + * @param offset The offset. + * + * @return the position in the circular buffer descriptor. + */ +static inline uint8_t ia_css_circbuf_desc_get_pos_at_offset( + ia_css_circbuf_desc_t *cb_desc, + uint32_t base, + int offset) +{ + uint8_t dest; + OP___assert(cb_desc != NULL); + OP___assert(cb_desc->size > 0); + + /* step 1: adjust the offset */ + while (offset < 0) { + offset += cb_desc->size; + } + + /* step 2: shift and round by the upper limit */ + dest = OP_std_modadd(base, offset, cb_desc->size); + + return dest; +} + +/** + * @brief Get the offset between two positions in the circular buffer + * descriptor. + * Get the offset from the source position to the terminal position, + * along the direction in which the new elements come in. + * + * @param cb_desc The pointer to the circular buffer descriptor. + * @param src_pos The source position. + * @param dest_pos The terminal position. + * + * @return the offset. + */ +static inline int ia_css_circbuf_desc_get_offset( + ia_css_circbuf_desc_t *cb_desc, + uint32_t src_pos, + uint32_t dest_pos) +{ + int offset; + OP___assert(cb_desc != NULL); + + offset = (int)(dest_pos - src_pos); + offset += (offset < 0) ? cb_desc->size : 0; + + return offset; +} + +/** + * @brief Get the number of available elements. + * + * @param cb_desc The pointer to the circular buffer. + * + * @return The number of available elements. + */ +static inline uint32_t ia_css_circbuf_desc_get_num_elems( + ia_css_circbuf_desc_t *cb_desc) +{ + int num; + OP___assert(cb_desc != NULL); + + num = ia_css_circbuf_desc_get_offset(cb_desc, + cb_desc->start, + cb_desc->end); + + return (uint32_t)num; +} + +/** + * @brief Get the number of free elements. + * + * @param cb_desc The pointer to the circular buffer descriptor. + * + * @return: The number of free elements. + */ +static inline uint32_t ia_css_circbuf_desc_get_free_elems( + ia_css_circbuf_desc_t *cb_desc) +{ + uint32_t num; + OP___assert(cb_desc != NULL); + + num = ia_css_circbuf_desc_get_offset(cb_desc, + cb_desc->start, + cb_desc->end); + + return (cb_desc->size - num); +} +#endif /*_IA_CSS_CIRCBUF_DESC_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c new file mode 100644 index 0000000000000..050d60f0894f7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c @@ -0,0 +1,321 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_circbuf.h" + +#include + +/********************************************************************** + * + * Forward declarations. + * + **********************************************************************/ +/* + * @brief Read the oldest element from the circular buffer. + * Read the oldest element WITHOUT checking whehter the + * circular buffer is empty or not. The oldest element is + * also removed out from the circular buffer. + * + * @param cb The pointer to the circular buffer. + * + * @return the oldest element. + */ +static inline ia_css_circbuf_elem_t +ia_css_circbuf_read(ia_css_circbuf_t *cb); + +/* + * @brief Shift a chunk of elements in the circular buffer. + * A chunk of elements (i.e. the ones from the "start" position + * to the "chunk_src" position) are shifted in the circular buffer, + * along the direction of new elements coming. + * + * @param cb The pointer to the circular buffer. + * @param chunk_src The position at which the first element in the chunk is. + * @param chunk_dest The position to which the first element in the chunk would be shift. + */ +static inline void ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, + uint32_t chunk_src, + uint32_t chunk_dest); + +/* + * @brief Get the "val" field in the element. + * + * @param elem The pointer to the element. + * + * @return the "val" field. + */ +static inline uint32_t +ia_css_circbuf_elem_get_val(ia_css_circbuf_elem_t *elem); + +/********************************************************************** + * + * Non-inline functions. + * + **********************************************************************/ +/* + * @brief Create the circular buffer. + * Refer to "ia_css_circbuf.h" for details. + */ +void +ia_css_circbuf_create(ia_css_circbuf_t *cb, + ia_css_circbuf_elem_t *elems, + ia_css_circbuf_desc_t *desc) +{ + uint32_t i; + + OP___assert(desc); + + cb->desc = desc; + /* Initialize to defaults */ + cb->desc->start = 0; + cb->desc->end = 0; + cb->desc->step = 0; + + for (i = 0; i < cb->desc->size; i++) + ia_css_circbuf_elem_init(&elems[i]); + + cb->elems = elems; +} + +/* + * @brief Destroy the circular buffer. + * Refer to "ia_css_circbuf.h" for details. + */ +void ia_css_circbuf_destroy(ia_css_circbuf_t *cb) +{ + cb->desc = NULL; + + cb->elems = NULL; +} + +/* + * @brief Pop a value out of the circular buffer. + * Refer to "ia_css_circbuf.h" for details. + */ +uint32_t ia_css_circbuf_pop(ia_css_circbuf_t *cb) +{ + uint32_t ret; + ia_css_circbuf_elem_t elem; + + assert(!ia_css_circbuf_is_empty(cb)); + + /* read an element from the buffer */ + elem = ia_css_circbuf_read(cb); + ret = ia_css_circbuf_elem_get_val(&elem); + return ret; +} + +/* + * @brief Extract a value out of the circular buffer. + * Refer to "ia_css_circbuf.h" for details. + */ +uint32_t ia_css_circbuf_extract(ia_css_circbuf_t *cb, int offset) +{ + int max_offset; + uint32_t val; + uint32_t pos; + uint32_t src_pos; + uint32_t dest_pos; + + /* get the maximum offest */ + max_offset = ia_css_circbuf_get_offset(cb, cb->desc->start, cb->desc->end); + max_offset--; + + /* + * Step 1: When the target element is at the "start" position. + */ + if (offset == 0) { + val = ia_css_circbuf_pop(cb); + return val; + } + + /* + * Step 2: When the target element is out of the range. + */ + if (offset > max_offset) { + val = 0; + return val; + } + + /* + * Step 3: When the target element is between the "start" and + * "end" position. + */ + /* get the position of the target element */ + pos = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, offset); + + /* get the value from the target element */ + val = ia_css_circbuf_elem_get_val(&cb->elems[pos]); + + /* shift the elements */ + src_pos = ia_css_circbuf_get_pos_at_offset(cb, pos, -1); + dest_pos = pos; + ia_css_circbuf_shift_chunk(cb, src_pos, dest_pos); + + return val; +} + +/* + * @brief Peek an element from the circular buffer. + * Refer to "ia_css_circbuf.h" for details. + */ +uint32_t ia_css_circbuf_peek(ia_css_circbuf_t *cb, int offset) +{ + int pos; + + pos = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->end, offset); + + /* get the value at the position */ + return cb->elems[pos].val; +} + +/* + * @brief Get the value of an element from the circular buffer. + * Refer to "ia_css_circbuf.h" for details. + */ +uint32_t ia_css_circbuf_peek_from_start(ia_css_circbuf_t *cb, int offset) +{ + int pos; + + pos = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, offset); + + /* get the value at the position */ + return cb->elems[pos].val; +} + +/* @brief increase size of a circular buffer. + * Use 'CAUTION' before using this function. This was added to + * support / fix issue with increasing size for tagger only + * Please refer to "ia_css_circbuf.h" for details. + */ +bool ia_css_circbuf_increase_size( + ia_css_circbuf_t *cb, + unsigned int sz_delta, + ia_css_circbuf_elem_t *elems) +{ + uint8_t curr_size; + uint8_t curr_end; + unsigned int i = 0; + + if (!cb || sz_delta == 0) + return false; + + curr_size = cb->desc->size; + curr_end = cb->desc->end; + /* We assume cb was pre defined as global to allow + * increase in size */ + /* FM: are we sure this cannot cause size to become too big? */ + if (((uint8_t)(cb->desc->size + (uint8_t)sz_delta) > cb->desc->size) && ((uint8_t)sz_delta == sz_delta)) + cb->desc->size += (uint8_t)sz_delta; + else + return false; /* overflow in size */ + + /* If elems are passed update them else we assume its been taken + * care before calling this function */ + if (elems) { + /* cb element array size will not be increased dynamically, + * but pointers to new elements can be added at the end + * of existing pre defined cb element array of + * size >= new size if not already added */ + for (i = curr_size; i < cb->desc->size; i++) + cb->elems[i] = elems[i - curr_size]; + } + /* Fix Start / End */ + if (curr_end < cb->desc->start) { + if (curr_end == 0) { + /* Easily fix End */ + cb->desc->end = curr_size; + } else { + /* Move elements and fix Start*/ + ia_css_circbuf_shift_chunk(cb, + curr_size - 1, + curr_size + sz_delta - 1); + } + } + + return true; +} + +/**************************************************************** + * + * Inline functions. + * + ****************************************************************/ +/* + * @brief Get the "val" field in the element. + * Refer to "Forward declarations" for details. + */ +static inline uint32_t +ia_css_circbuf_elem_get_val(ia_css_circbuf_elem_t *elem) +{ + return elem->val; +} + +/* + * @brief Read the oldest element from the circular buffer. + * Refer to "Forward declarations" for details. + */ +static inline ia_css_circbuf_elem_t +ia_css_circbuf_read(ia_css_circbuf_t *cb) +{ + ia_css_circbuf_elem_t elem; + + /* get the element from the target position */ + elem = cb->elems[cb->desc->start]; + + /* clear the target position */ + ia_css_circbuf_elem_init(&cb->elems[cb->desc->start]); + + /* adjust the "start" position */ + cb->desc->start = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, 1); + return elem; +} + +/* + * @brief Shift a chunk of elements in the circular buffer. + * Refer to "Forward declarations" for details. + */ +static inline void +ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, + uint32_t chunk_src, uint32_t chunk_dest) +{ + int chunk_offset; + int chunk_sz; + int i; + + /* get the chunk offset and size */ + chunk_offset = ia_css_circbuf_get_offset(cb, + chunk_src, chunk_dest); + chunk_sz = ia_css_circbuf_get_offset(cb, cb->desc->start, chunk_src) + 1; + + /* shift each element to its terminal position */ + for (i = 0; i < chunk_sz; i++) { + + /* copy the element from the source to the destination */ + ia_css_circbuf_elem_cpy(&cb->elems[chunk_src], + &cb->elems[chunk_dest]); + + /* clear the source position */ + ia_css_circbuf_elem_init(&cb->elems[chunk_src]); + + /* adjust the source/terminal positions */ + chunk_src = ia_css_circbuf_get_pos_at_offset(cb, chunk_src, -1); + chunk_dest = ia_css_circbuf_get_pos_at_offset(cb, chunk_dest, -1); + + } + + /* adjust the index "start" */ + cb->desc->start = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, chunk_offset); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h new file mode 100644 index 0000000000000..20db4de6beeb6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h @@ -0,0 +1,83 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_REFCOUNT_H_ +#define _IA_CSS_REFCOUNT_H_ + +#include +#include +#include + +typedef void (*clear_func)(hrt_vaddress ptr); + +/*! \brief Function for initializing refcount list + * + * \param[in] size Size of the refcount list. + * \return ia_css_err + */ +extern enum ia_css_err ia_css_refcount_init(uint32_t size); + +/*! \brief Function for de-initializing refcount list + * + * \return None + */ +extern void ia_css_refcount_uninit(void); + +/*! \brief Function for increasing reference by 1. + * + * \param[in] id ID of the object. + * \param[in] ptr Data of the object (ptr). + * \return hrt_vaddress (saved address) + */ +extern hrt_vaddress ia_css_refcount_increment(int32_t id, hrt_vaddress ptr); + +/*! \brief Function for decrease reference by 1. + * + * \param[in] id ID of the object. + * \param[in] ptr Data of the object (ptr). + * + * - true, if it is successful. + * - false, otherwise. + */ +extern bool ia_css_refcount_decrement(int32_t id, hrt_vaddress ptr); + +/*! \brief Function to check if reference count is 1. + * + * \param[in] ptr Data of the object (ptr). + * + * - true, if it is successful. + * - false, otherwise. + */ +extern bool ia_css_refcount_is_single(hrt_vaddress ptr); + +/*! \brief Function to clear reference list objects. + * + * \param[in] id ID of the object. + * \param[in] clear_func function to be run to free reference objects. + * + * return None + */ +extern void ia_css_refcount_clear(int32_t id, + clear_func clear_func_ptr); + +/*! \brief Function to verify if object is valid + * + * \param[in] ptr Data of the object (ptr) + * + * - true, if valid + * - false, if invalid + */ +extern bool ia_css_refcount_is_valid(hrt_vaddress ptr); + +#endif /* _IA_CSS_REFCOUNT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c new file mode 100644 index 0000000000000..6e3bd773ee4c1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c @@ -0,0 +1,281 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_refcount.h" +#include "memory_access/memory_access.h" +#include "sh_css_defs.h" + +#include "platform_support.h" + +#include "assert_support.h" + +#include "ia_css_debug.h" + +/* TODO: enable for other memory aswell + now only for hrt_vaddress */ +struct ia_css_refcount_entry { + uint32_t count; + hrt_vaddress data; + int32_t id; +}; + +struct ia_css_refcount_list { + uint32_t size; + struct ia_css_refcount_entry *items; +}; + +static struct ia_css_refcount_list myrefcount; + +static struct ia_css_refcount_entry *refcount_find_entry(hrt_vaddress ptr, + bool firstfree) +{ + uint32_t i; + + if (ptr == 0) + return NULL; + if (myrefcount.items == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "refcount_find_entry(): Ref count not initiliazed!\n"); + return NULL; + } + + for (i = 0; i < myrefcount.size; i++) { + + if ((&myrefcount.items[i])->data == 0) { + if (firstfree) { + /* for new entry */ + return &myrefcount.items[i]; + } + } + if ((&myrefcount.items[i])->data == ptr) { + /* found entry */ + return &myrefcount.items[i]; + } + } + return NULL; +} + +enum ia_css_err ia_css_refcount_init(uint32_t size) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + if (size == 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_init(): Size of 0 for Ref count init!\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + if (myrefcount.items != NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_init(): Ref count is already initialized\n"); + return IA_CSS_ERR_INTERNAL_ERROR; + } + myrefcount.items = + sh_css_malloc(sizeof(struct ia_css_refcount_entry) * size); + if (!myrefcount.items) + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + if (err == IA_CSS_SUCCESS) { + memset(myrefcount.items, 0, + sizeof(struct ia_css_refcount_entry) * size); + myrefcount.size = size; + } + return err; +} + +void ia_css_refcount_uninit(void) +{ + struct ia_css_refcount_entry *entry; + uint32_t i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_uninit() entry\n"); + for (i = 0; i < myrefcount.size; i++) { + /* driver verifier tool has issues with &arr[i] + and prefers arr + i; as these are actually equivalent + the line below uses + i + */ + entry = myrefcount.items + i; + if (entry->data != mmgr_NULL) { + /* ia_css_debug_dtrace(IA_CSS_DBG_TRACE, + "ia_css_refcount_uninit: freeing (%x)\n", + entry->data);*/ + hmm_free(entry->data); + entry->data = mmgr_NULL; + entry->count = 0; + entry->id = 0; + } + } + sh_css_free(myrefcount.items); + myrefcount.items = NULL; + myrefcount.size = 0; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_uninit() leave\n"); +} + +hrt_vaddress ia_css_refcount_increment(int32_t id, hrt_vaddress ptr) +{ + struct ia_css_refcount_entry *entry; + + if (ptr == mmgr_NULL) + return ptr; + + entry = refcount_find_entry(ptr, false); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_increment(%x) 0x%x\n", id, ptr); + + if (!entry) { + entry = refcount_find_entry(ptr, true); + assert(entry != NULL); + if (entry == NULL) + return mmgr_NULL; + entry->id = id; + } + + if (entry->id != id) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_refcount_increment(): Ref count IDS do not match!\n"); + return mmgr_NULL; + } + + if (entry->data == ptr) + entry->count += 1; + else if (entry->data == mmgr_NULL) { + entry->data = ptr; + entry->count = 1; + } else + return mmgr_NULL; + + return ptr; +} + +bool ia_css_refcount_decrement(int32_t id, hrt_vaddress ptr) +{ + struct ia_css_refcount_entry *entry; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_decrement(%x) 0x%x\n", id, ptr); + + if (ptr == mmgr_NULL) + return false; + + entry = refcount_find_entry(ptr, false); + + if (entry) { + if (entry->id != id) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_refcount_decrement(): Ref count IDS do not match!\n"); + return false; + } + if (entry->count > 0) { + entry->count -= 1; + if (entry->count == 0) { + /* ia_css_debug_dtrace(IA_CSS_DBEUG_TRACE, + "ia_css_refcount_decrement: freeing\n");*/ + hmm_free(ptr); + entry->data = mmgr_NULL; + entry->id = 0; + } + return true; + } + } + + /* SHOULD NOT HAPPEN: ptr not managed by refcount, or not + valid anymore */ + if (entry) + IA_CSS_ERROR("id %x, ptr 0x%x entry %p entry->id %x entry->count %d\n", + id, ptr, entry, entry->id, entry->count); + else + IA_CSS_ERROR("entry NULL\n"); +#ifdef ISP2401 + assert(false); +#endif + + return false; +} + +bool ia_css_refcount_is_single(hrt_vaddress ptr) +{ + struct ia_css_refcount_entry *entry; + + if (ptr == mmgr_NULL) + return false; + + entry = refcount_find_entry(ptr, false); + + if (entry) + return (entry->count == 1); + + return true; +} + +void ia_css_refcount_clear(int32_t id, clear_func clear_func_ptr) +{ + struct ia_css_refcount_entry *entry; + uint32_t i; + uint32_t count = 0; + + assert(clear_func_ptr != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_refcount_clear(%x)\n", + id); + + for (i = 0; i < myrefcount.size; i++) { + /* driver verifier tool has issues with &arr[i] + and prefers arr + i; as these are actually equivalent + the line below uses + i + */ + entry = myrefcount.items + i; + if ((entry->data != mmgr_NULL) && (entry->id == id)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_clear:" + " %x: 0x%x\n", id, entry->data); + if (clear_func_ptr) { + /* clear using provided function */ + clear_func_ptr(entry->data); + } else { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_clear: " + "using hmm_free: " + "no clear_func\n"); + hmm_free(entry->data); + } +#ifndef ISP2401 + +#else + assert(entry->count == 0); +#endif + if (entry->count != 0) { + IA_CSS_WARNING("Ref count for entry %x is not zero!", entry->id); + } + entry->data = mmgr_NULL; + entry->count = 0; + entry->id = 0; + count++; + } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_refcount_clear(%x): cleared %d\n", id, + count); +} + +bool ia_css_refcount_is_valid(hrt_vaddress ptr) +{ + struct ia_css_refcount_entry *entry; + + if (ptr == mmgr_NULL) + return false; + + entry = refcount_find_entry(ptr, false); + + return entry != NULL; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h new file mode 100644 index 0000000000000..a6d650a9a1f42 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h @@ -0,0 +1,297 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_PIPE_BINARYDESC_H__ +#define __IA_CSS_PIPE_BINARYDESC_H__ + +#include /* ia_css_pipe */ +#include /* ia_css_frame_info */ +#include /* ia_css_binary_descr */ + +/* @brief Get a binary descriptor for copy. + * + * @param[in] pipe + * @param[out] copy_desc + * @param[in/out] in_info + * @param[in/out] out_info + * @param[in/out] vf_info + * @return None + * + */ +extern void ia_css_pipe_get_copy_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *copy_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); + +/* @brief Get a binary descriptor for vfpp. + * + * @param[in] pipe + * @param[out] vfpp_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @return None + * + */ +extern void ia_css_pipe_get_vfpp_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *vf_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); + +/* @brief Get numerator and denominator of bayer downscaling factor. + * + * @param[in] bds_factor: The bayer downscaling factor. + * (= The bds_factor member in the sh_css_bds_factor structure.) + * @param[out] bds_factor_numerator: The numerator of the bayer downscaling factor. + * (= The numerator member in the sh_css_bds_factor structure.) + * @param[out] bds_factor_denominator: The denominator of the bayer downscaling factor. + * (= The denominator member in the sh_css_bds_factor structure.) + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +extern enum ia_css_err sh_css_bds_factor_get_numerator_denominator( + unsigned int bds_factor, + unsigned int *bds_factor_numerator, + unsigned int *bds_factor_denominator); + +/* @brief Get a binary descriptor for preview stage. + * + * @param[in] pipe + * @param[out] preview_descr + * @param[in/out] in_info + * @param[in/out] bds_out_info + * @param[in/out] out_info + * @param[in/out] vf_info + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +extern enum ia_css_err ia_css_pipe_get_preview_binarydesc( + struct ia_css_pipe * const pipe, + struct ia_css_binary_descr *preview_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); + +/* @brief Get a binary descriptor for video stage. + * + * @param[in/out] pipe + * @param[out] video_descr + * @param[in/out] in_info + * @param[in/out] bds_out_info + * @param[in/out] vf_info + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +extern enum ia_css_err ia_css_pipe_get_video_binarydesc( + struct ia_css_pipe * const pipe, + struct ia_css_binary_descr *video_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + int stream_config_left_padding); + +/* @brief Get a binary descriptor for yuv scaler stage. + * + * @param[in/out] pipe + * @param[out] yuv_scaler_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @param[in/out] internal_out_info + * @param[in/out] vf_info + * @return None + * + */ +void ia_css_pipe_get_yuvscaler_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *yuv_scaler_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *internal_out_info, + struct ia_css_frame_info *vf_info); + +/* @brief Get a binary descriptor for capture pp stage. + * + * @param[in/out] pipe + * @param[out] capture_pp_descr + * @param[in/out] in_info + * @param[in/out] vf_info + * @return None + * + */ +extern void ia_css_pipe_get_capturepp_binarydesc( + struct ia_css_pipe * const pipe, + struct ia_css_binary_descr *capture_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); + +/* @brief Get a binary descriptor for primary capture. + * + * @param[in] pipe + * @param[out] prim_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @param[in/out] vf_info + * @return None + * + */ +extern void ia_css_pipe_get_primary_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *prim_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int stage_idx); + +/* @brief Get a binary descriptor for pre gdc stage. + * + * @param[in] pipe + * @param[out] pre_gdc_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @return None + * + */ +extern void ia_css_pipe_get_pre_gdc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); + +/* @brief Get a binary descriptor for gdc stage. + * + * @param[in] pipe + * @param[out] gdc_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @return None + * + */ +extern void ia_css_pipe_get_gdc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); + +/* @brief Get a binary descriptor for post gdc. + * + * @param[in] pipe + * @param[out] post_gdc_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @param[in/out] vf_info + * @return None + * + */ +extern void ia_css_pipe_get_post_gdc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *post_gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); + +/* @brief Get a binary descriptor for de. + * + * @param[in] pipe + * @param[out] pre_de_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @return None + * + */ +extern void ia_css_pipe_get_pre_de_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *pre_de_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); + +/* @brief Get a binary descriptor for pre anr stage. + * + * @param[in] pipe + * @param[out] pre_anr_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @return None + * + */ +extern void ia_css_pipe_get_pre_anr_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *pre_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); + +/* @brief Get a binary descriptor for ANR stage. + * + * @param[in] pipe + * @param[out] anr_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @return None + * + */ +extern void ia_css_pipe_get_anr_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); + +/* @brief Get a binary descriptor for post anr stage. + * + * @param[in] pipe + * @param[out] post_anr_descr + * @param[in/out] in_info + * @param[in/out] out_info + * @param[in/out] vf_info + * @return None + * + */ +extern void ia_css_pipe_get_post_anr_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *post_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); + +/* @brief Get a binary descriptor for ldc stage. + * + * @param[in/out] pipe + * @param[out] capture_pp_descr + * @param[in/out] in_info + * @param[in/out] vf_info + * @return None + * + */ +extern void ia_css_pipe_get_ldc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *ldc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); + +/* @brief Calculates the required BDS factor + * + * @param[in] input_res + * @param[in] output_res + * @param[in/out] bds_factor + * @return IA_CSS_SUCCESS or error code upon error. + */ +enum ia_css_err binarydesc_calculate_bds_factor( + struct ia_css_resolution input_res, + struct ia_css_resolution output_res, + unsigned int *bds_factor); + +#endif /* __IA_CSS_PIPE_BINARYDESC_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h new file mode 100644 index 0000000000000..38690ea093c28 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h @@ -0,0 +1,52 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_PIPE_STAGEDESC_H__ +#define __IA_CSS_PIPE_STAGEDESC_H__ + +#include /* ia_css_fw_info */ +#include +#include +#include "ia_css_pipeline.h" +#include "ia_css_pipeline_common.h" + +extern void ia_css_pipe_get_generic_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame); + +extern void ia_css_pipe_get_firmwares_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame, + const struct ia_css_fw_info *fw, + unsigned int mode); + +extern void ia_css_pipe_get_acc_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_fw_info *fw); + +extern void ia_css_pipe_get_sp_func_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_frame *out_frame, + enum ia_css_pipeline_stage_sp_func sp_func, + unsigned max_input_width); + +#endif /*__IA_CSS_PIPE_STAGEDESC__H__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h new file mode 100644 index 0000000000000..155b6fb4722ba --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_PIPE_UTIL_H__ +#define __IA_CSS_PIPE_UTIL_H__ + +#include +#include + +/* @brief Get Input format bits per pixel based on stream configuration of this + * pipe. + * + * @param[in] pipe + * @return bits per pixel for the underlying stream + * + */ +extern unsigned int ia_css_pipe_util_pipe_input_format_bpp( + const struct ia_css_pipe * const pipe); + +extern void ia_css_pipe_util_create_output_frames( + struct ia_css_frame *frames[]); + +extern void ia_css_pipe_util_set_output_frames( + struct ia_css_frame *frames[], + unsigned int idx, + struct ia_css_frame *frame); + +#endif /* __IA_CSS_PIPE_UTIL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c new file mode 100644 index 0000000000000..98a2a3e9b3e67 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c @@ -0,0 +1,880 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_pipe_binarydesc.h" +#include "ia_css_frame_format.h" +#include "ia_css_pipe.h" +#include "ia_css_pipe_util.h" +#include "ia_css_util.h" +#include "ia_css_debug.h" +#include "sh_css_params.h" +#include +/* HRT_GDC_N */ +#include "gdc_device.h" +#include + +/* This module provides a binary descriptions to used to find a binary. Since, + * every stage is associated with a binary, it implicity helps stage + * description. Apart from providing a binary description, this module also + * populates the frame info's when required.*/ + +/* Generic descriptor for offline binaries. Internal function. */ +static void pipe_binarydesc_get_offline( + struct ia_css_pipe const * const pipe, + const int mode, + struct ia_css_binary_descr *descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info[], + struct ia_css_frame_info *vf_info) +{ + unsigned int i; + /* in_info, out_info, vf_info can be NULL */ + assert(pipe != NULL); + assert(descr != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "pipe_binarydesc_get_offline() enter:\n"); + + descr->mode = mode; + descr->online = false; + descr->continuous = pipe->stream->config.continuous; + descr->striped = false; + descr->two_ppc = false; + descr->enable_yuv_ds = false; + descr->enable_high_speed = false; + descr->enable_dvs_6axis = false; + descr->enable_reduced_pipe = false; + descr->enable_dz = true; + descr->enable_xnr = false; + descr->enable_dpc = false; +#ifdef ISP2401 + descr->enable_luma_only = false; + descr->enable_tnr = false; +#endif + descr->enable_capture_pp_bli = false; + descr->enable_fractional_ds = false; + descr->dvs_env.width = 0; + descr->dvs_env.height = 0; + descr->stream_format = pipe->stream->config.input_config.format; + descr->in_info = in_info; + descr->bds_out_info = NULL; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + descr->out_info[i] = out_info[i]; + descr->vf_info = vf_info; + descr->isp_pipe_version = pipe->config.isp_pipe_version; + descr->required_bds_factor = SH_CSS_BDS_FACTOR_1_00; + descr->stream_config_left_padding = -1; +} + +void ia_css_pipe_get_copy_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *copy_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) +{ + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + unsigned int i; + /* out_info can be NULL */ + assert(pipe != NULL); + assert(in_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_COPY, + copy_descr, in_info, out_infos, vf_info); + copy_descr->online = true; + copy_descr->continuous = false; + copy_descr->two_ppc = (pipe->stream->config.pixels_per_clock == 2); + copy_descr->enable_dz = false; + copy_descr->isp_pipe_version = IA_CSS_PIPE_VERSION_1; + IA_CSS_LEAVE_PRIVATE(""); +} +void ia_css_pipe_get_vfpp_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *vf_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) +{ + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + unsigned int i; + /* out_info can be NULL ??? */ + assert(pipe != NULL); + assert(in_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + in_info->raw_bit_depth = 0; + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_VF_PP, + vf_pp_descr, in_info, out_infos, NULL); + vf_pp_descr->enable_fractional_ds = true; + IA_CSS_LEAVE_PRIVATE(""); +} + +static struct sh_css_bds_factor bds_factors_list[] = { + {1, 1, SH_CSS_BDS_FACTOR_1_00}, + {5, 4, SH_CSS_BDS_FACTOR_1_25}, + {3, 2, SH_CSS_BDS_FACTOR_1_50}, + {2, 1, SH_CSS_BDS_FACTOR_2_00}, + {9, 4, SH_CSS_BDS_FACTOR_2_25}, + {5, 2, SH_CSS_BDS_FACTOR_2_50}, + {3, 1, SH_CSS_BDS_FACTOR_3_00}, + {4, 1, SH_CSS_BDS_FACTOR_4_00}, + {9, 2, SH_CSS_BDS_FACTOR_4_50}, + {5, 1, SH_CSS_BDS_FACTOR_5_00}, + {6, 1, SH_CSS_BDS_FACTOR_6_00}, + {8, 1, SH_CSS_BDS_FACTOR_8_00} +}; + +enum ia_css_err sh_css_bds_factor_get_numerator_denominator( + unsigned int bds_factor, + unsigned int *bds_factor_numerator, + unsigned int *bds_factor_denominator) +{ + unsigned int i; + + /* Loop over all bds factors until a match is found */ + for (i = 0; i < ARRAY_SIZE(bds_factors_list); i++) { + if (bds_factors_list[i].bds_factor == bds_factor) { + *bds_factor_numerator = bds_factors_list[i].numerator; + *bds_factor_denominator = bds_factors_list[i].denominator; + return IA_CSS_SUCCESS; + } + } + + /* Throw an error since bds_factor cannot be found + in bds_factors_list */ + return IA_CSS_ERR_INVALID_ARGUMENTS; +} + +enum ia_css_err binarydesc_calculate_bds_factor( + struct ia_css_resolution input_res, + struct ia_css_resolution output_res, + unsigned int *bds_factor) +{ + unsigned int i; + unsigned int in_w = input_res.width, + in_h = input_res.height, + out_w = output_res.width, out_h = output_res.height; + + unsigned int max_bds_factor = 8; + unsigned int max_rounding_margin = 2; + /* delta in pixels to account for rounding margin in the calculation */ + unsigned int delta = max_bds_factor * max_rounding_margin; + + /* Assert if the resolutions are not set */ + assert(in_w != 0 && in_h != 0); + assert(out_w != 0 && out_h != 0); + + /* Loop over all bds factors until a match is found */ + for (i = 0; i < ARRAY_SIZE(bds_factors_list); i++) { + unsigned num = bds_factors_list[i].numerator; + unsigned den = bds_factors_list[i].denominator; + + /* See width-wise and height-wise if this bds_factor + * satisfies the condition */ + bool cond = (out_w * num / den + delta > in_w) && + (out_w * num / den <= in_w) && + (out_h * num / den + delta > in_h) && + (out_h * num / den <= in_h); + + if (cond) { + *bds_factor = bds_factors_list[i].bds_factor; + return IA_CSS_SUCCESS; + } + } + + /* Throw an error since a suitable bds_factor cannot be found */ + return IA_CSS_ERR_INVALID_ARGUMENTS; +} + +enum ia_css_err ia_css_pipe_get_preview_binarydesc( + struct ia_css_pipe * const pipe, + struct ia_css_binary_descr *preview_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) +{ + enum ia_css_err err; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + int mode = IA_CSS_BINARY_MODE_PREVIEW; + unsigned int i; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + assert(vf_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + /* + * Set up the info of the input frame with + * the ISP required resolution + */ + in_info->res = pipe->config.input_effective_res; + in_info->padded_width = in_info->res.width; + in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); + + if (ia_css_util_is_input_format_yuv(pipe->stream->config.input_config.format)) + mode = IA_CSS_BINARY_MODE_COPY; + else + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, mode, + preview_descr, in_info, out_infos, vf_info); + if (pipe->stream->config.online) { + preview_descr->online = pipe->stream->config.online; + preview_descr->two_ppc = + (pipe->stream->config.pixels_per_clock == 2); + } + preview_descr->stream_format = pipe->stream->config.input_config.format; + + /* TODO: Remove this when bds_out_info is available! */ + *bds_out_info = *in_info; + + if (pipe->extra_config.enable_raw_binning) { + if (pipe->config.bayer_ds_out_res.width != 0 && + pipe->config.bayer_ds_out_res.height != 0) { + bds_out_info->res.width = + pipe->config.bayer_ds_out_res.width; + bds_out_info->res.height = + pipe->config.bayer_ds_out_res.height; + bds_out_info->padded_width = + pipe->config.bayer_ds_out_res.width; + err = + binarydesc_calculate_bds_factor(in_info->res, + bds_out_info->res, + &preview_descr->required_bds_factor); + if (err != IA_CSS_SUCCESS) + return err; + } else { + bds_out_info->res.width = in_info->res.width / 2; + bds_out_info->res.height = in_info->res.height / 2; + bds_out_info->padded_width = in_info->padded_width / 2; + preview_descr->required_bds_factor = + SH_CSS_BDS_FACTOR_2_00; + } + } else { + /* TODO: Remove this when bds_out_info->is available! */ + bds_out_info->res.width = in_info->res.width; + bds_out_info->res.height = in_info->res.height; + bds_out_info->padded_width = in_info->padded_width; + preview_descr->required_bds_factor = SH_CSS_BDS_FACTOR_1_00; + } + pipe->required_bds_factor = preview_descr->required_bds_factor; + + /* bayer ds and fractional ds cannot be enabled at the same time, + so we disable bds_out_info when fractional ds is used */ + if (!pipe->extra_config.enable_fractional_ds) + preview_descr->bds_out_info = bds_out_info; + else + preview_descr->bds_out_info = NULL; + /* + ----Preview binary----- + --in-->|--out->|vf_veceven|--|--->vf + ----------------------- + * Preview binary normally doesn't have a vf_port but + * instead it has an output port. However, the output is + * generated by vf_veceven module in which we might have + * a downscaling (by 1x, 2x, or 4x). Because the resolution + * might change, we need two different info, namely out_info + * & vf_info. In fill_binary_info we use out&vf info to + * calculate vf decimation factor. + */ + *out_info = *vf_info; + + /* In case of preview_ds binary, we can do any fractional amount + * of downscale, so there is no DS needed in vf_veceven. Therefore, + * out and vf infos will be the same. Otherwise, we set out resolution + * equal to in resolution. */ + if (!pipe->extra_config.enable_fractional_ds) { + /* TODO: Change this when bds_out_info is available! */ + out_info->res.width = bds_out_info->res.width; + out_info->res.height = bds_out_info->res.height; + out_info->padded_width = bds_out_info->padded_width; + } + preview_descr->enable_fractional_ds = + pipe->extra_config.enable_fractional_ds; + + preview_descr->enable_dpc = pipe->config.enable_dpc; + + preview_descr->isp_pipe_version = pipe->config.isp_pipe_version; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +enum ia_css_err ia_css_pipe_get_video_binarydesc( + struct ia_css_pipe * const pipe, + struct ia_css_binary_descr *video_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + int stream_config_left_padding) +{ + int mode = IA_CSS_BINARY_MODE_VIDEO; + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + enum ia_css_err err = IA_CSS_SUCCESS; + bool stream_dz_config = false; + + /* vf_info can be NULL */ + assert(pipe != NULL); + assert(in_info != NULL); + /* assert(vf_info != NULL); */ + IA_CSS_ENTER_PRIVATE(""); + + /* The solution below is not optimal; we should move to using ia_css_pipe_get_copy_binarydesc() + * But for now this fixes things; this code used to be there but was removed + * with gerrit 8908 as this was wrong for Skycam; however 240x still needs this + */ + if (ia_css_util_is_input_format_yuv(pipe->stream->config.input_config.format)) + mode = IA_CSS_BINARY_MODE_COPY; + + in_info->res = pipe->config.input_effective_res; + in_info->padded_width = in_info->res.width; + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, mode, + video_descr, in_info, out_infos, vf_info); + + if (pipe->stream->config.online) { + video_descr->online = pipe->stream->config.online; + video_descr->two_ppc = + (pipe->stream->config.pixels_per_clock == 2); + } + + if (mode == IA_CSS_BINARY_MODE_VIDEO) { + stream_dz_config = + ((pipe->stream->isp_params_configs->dz_config.dx != + HRT_GDC_N) + || (pipe->stream->isp_params_configs->dz_config.dy != + HRT_GDC_N)); + + video_descr->enable_dz = pipe->config.enable_dz + || stream_dz_config; + video_descr->dvs_env = pipe->config.dvs_envelope; + video_descr->enable_yuv_ds = pipe->extra_config.enable_yuv_ds; + video_descr->enable_high_speed = + pipe->extra_config.enable_high_speed; + video_descr->enable_dvs_6axis = + pipe->extra_config.enable_dvs_6axis; + video_descr->enable_reduced_pipe = + pipe->extra_config.enable_reduced_pipe; + video_descr->isp_pipe_version = pipe->config.isp_pipe_version; + video_descr->enable_fractional_ds = + pipe->extra_config.enable_fractional_ds; + video_descr->enable_dpc = + pipe->config.enable_dpc; +#ifdef ISP2401 + video_descr->enable_luma_only = + pipe->config.enable_luma_only; + video_descr->enable_tnr = + pipe->config.enable_tnr; +#endif + + if (pipe->extra_config.enable_raw_binning) { + if (pipe->config.bayer_ds_out_res.width != 0 && + pipe->config.bayer_ds_out_res.height != 0) { + bds_out_info->res.width = + pipe->config.bayer_ds_out_res.width; + bds_out_info->res.height = + pipe->config.bayer_ds_out_res.height; + bds_out_info->padded_width = + pipe->config.bayer_ds_out_res.width; + err = + binarydesc_calculate_bds_factor( + in_info->res, bds_out_info->res, + &video_descr->required_bds_factor); + if (err != IA_CSS_SUCCESS) + return err; + } else { + bds_out_info->res.width = + in_info->res.width / 2; + bds_out_info->res.height = + in_info->res.height / 2; + bds_out_info->padded_width = + in_info->padded_width / 2; + video_descr->required_bds_factor = + SH_CSS_BDS_FACTOR_2_00; + } + } else { + bds_out_info->res.width = in_info->res.width; + bds_out_info->res.height = in_info->res.height; + bds_out_info->padded_width = in_info->padded_width; + video_descr->required_bds_factor = + SH_CSS_BDS_FACTOR_1_00; + } + + pipe->required_bds_factor = video_descr->required_bds_factor; + + /* bayer ds and fractional ds cannot be enabled + at the same time, so we disable bds_out_info when + fractional ds is used */ + if (!pipe->extra_config.enable_fractional_ds) + video_descr->bds_out_info = bds_out_info; + else + video_descr->bds_out_info = NULL; + + video_descr->enable_fractional_ds = + pipe->extra_config.enable_fractional_ds; + video_descr->stream_config_left_padding = stream_config_left_padding; + } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +void ia_css_pipe_get_yuvscaler_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *yuv_scaler_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *internal_out_info, + struct ia_css_frame_info *vf_info) +{ + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame_info *this_vf_info = NULL; + + assert(pipe != NULL); + assert(in_info != NULL); + /* Note: if the following assert fails, the number of ports has been + * changed; in that case an additional initializer must be added + * a few lines below after which this assert can be updated. + */ + assert(IA_CSS_BINARY_MAX_OUTPUT_PORTS == 2); + IA_CSS_ENTER_PRIVATE(""); + + in_info->padded_width = in_info->res.width; + in_info->raw_bit_depth = 0; + ia_css_frame_info_set_width(in_info, in_info->res.width, 0); + out_infos[0] = out_info; + out_infos[1] = internal_out_info; + /* add initializers here if + * assert(IA_CSS_BINARY_MAX_OUTPUT_PORTS == ...); + * fails + */ + + if (vf_info) { + this_vf_info = (vf_info->res.width == 0 && + vf_info->res.height == 0) ? NULL : vf_info; + } + + pipe_binarydesc_get_offline(pipe, + IA_CSS_BINARY_MODE_CAPTURE_PP, + yuv_scaler_descr, + in_info, out_infos, this_vf_info); + + yuv_scaler_descr->enable_fractional_ds = true; + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_capturepp_binarydesc( + struct ia_css_pipe * const pipe, + struct ia_css_binary_descr *capture_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(vf_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + + /* the in_info is only used for resolution to enable + bayer down scaling. */ + if (pipe->out_yuv_ds_input_info.res.width) + *in_info = pipe->out_yuv_ds_input_info; + else + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_YUV420; + in_info->raw_bit_depth = 0; + ia_css_frame_info_set_width(in_info, in_info->res.width, 0); + + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, + IA_CSS_BINARY_MODE_CAPTURE_PP, + capture_pp_descr, + in_info, out_infos, vf_info); + + capture_pp_descr->enable_capture_pp_bli = + pipe->config.default_capture_config.enable_capture_pp_bli; + capture_pp_descr->enable_fractional_ds = true; + capture_pp_descr->enable_xnr = + pipe->config.default_capture_config.enable_xnr != 0; + IA_CSS_LEAVE_PRIVATE(""); +} + +/* lookup table for high quality primary binaries */ +static unsigned int primary_hq_binary_modes[NUM_PRIMARY_HQ_STAGES] = +{ + IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE0, + IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE1, + IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE2, + IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE3, + IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE4, + IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE5 +}; + +void ia_css_pipe_get_primary_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *prim_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int stage_idx) +{ + enum ia_css_pipe_version pipe_version = pipe->config.isp_pipe_version; + int mode; + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + assert(stage_idx < NUM_PRIMARY_HQ_STAGES); + /* vf_info can be NULL - example video_binarydescr */ + /*assert(vf_info != NULL);*/ + IA_CSS_ENTER_PRIVATE(""); + + if (pipe_version == IA_CSS_PIPE_VERSION_2_6_1) + mode = primary_hq_binary_modes[stage_idx]; + else + mode = IA_CSS_BINARY_MODE_PRIMARY; + + if (ia_css_util_is_input_format_yuv(pipe->stream->config.input_config.format)) + mode = IA_CSS_BINARY_MODE_COPY; + + in_info->res = pipe->config.input_effective_res; + in_info->padded_width = in_info->res.width; + +#if !defined(HAS_NO_PACKED_RAW_PIXELS) + if (pipe->stream->config.pack_raw_pixels) + in_info->format = IA_CSS_FRAME_FORMAT_RAW_PACKED; + else +#endif + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + + in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, mode, + prim_descr, in_info, out_infos, vf_info); + + if (pipe->stream->config.online && + pipe->stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) { + prim_descr->online = true; + prim_descr->two_ppc = + (pipe->stream->config.pixels_per_clock == 2); + prim_descr->stream_format = pipe->stream->config.input_config.format; + } + if (mode == IA_CSS_BINARY_MODE_PRIMARY) { + prim_descr->isp_pipe_version = pipe->config.isp_pipe_version; + prim_descr->enable_fractional_ds = + pipe->extra_config.enable_fractional_ds; +#ifdef ISP2401 + prim_descr->enable_luma_only = + pipe->config.enable_luma_only; +#endif + /* We have both striped and non-striped primary binaries, + * if continuous viewfinder is required, then we must select + * a striped one. Otherwise we prefer to use a non-striped + * since it has better performance. */ + if (pipe_version == IA_CSS_PIPE_VERSION_2_6_1) + prim_descr->striped = false; + else +#ifndef ISP2401 + prim_descr->striped = prim_descr->continuous && (!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf); +#else + prim_descr->striped = prim_descr->continuous && !pipe->stream->disable_cont_vf; + + if ((pipe->config.default_capture_config.enable_xnr != 0) && + (pipe->extra_config.enable_dvs_6axis == true)) + prim_descr->enable_xnr = true; +#endif + } + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_pre_gdc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *pre_gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP, + pre_gdc_descr, in_info, out_infos, NULL); + pre_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version; + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_gdc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_QPLANE6; + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_GDC, + gdc_descr, in_info, out_infos, NULL); + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_post_gdc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *post_gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + assert(vf_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_YUV420_16; + in_info->raw_bit_depth = 16; + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP, + post_gdc_descr, in_info, out_infos, vf_info); + + post_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version; + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_pre_de_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *pre_de_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP, + pre_de_descr, in_info, out_infos, NULL); + else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) { + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_DE, + pre_de_descr, in_info, out_infos, NULL); + } + + if (pipe->stream->config.online) { + pre_de_descr->online = true; + pre_de_descr->two_ppc = + (pipe->stream->config.pixels_per_clock == 2); + pre_de_descr->stream_format = pipe->stream->config.input_config.format; + } + pre_de_descr->isp_pipe_version = pipe->config.isp_pipe_version; + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_pre_anr_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *pre_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + in_info->raw_bit_depth = ia_css_pipe_util_pipe_input_format_bpp(pipe); + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP, + pre_anr_descr, in_info, out_infos, NULL); + + if (pipe->stream->config.online) { + pre_anr_descr->online = true; + pre_anr_descr->two_ppc = + (pipe->stream->config.pixels_per_clock == 2); + pre_anr_descr->stream_format = pipe->stream->config.input_config.format; + } + pre_anr_descr->isp_pipe_version = pipe->config.isp_pipe_version; + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_anr_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + in_info->raw_bit_depth = ANR_ELEMENT_BITS; + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_ANR, + anr_descr, in_info, out_infos, NULL); + + anr_descr->isp_pipe_version = pipe->config.isp_pipe_version; + IA_CSS_LEAVE_PRIVATE(""); +} + + +void ia_css_pipe_get_post_anr_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *post_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + assert(vf_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + + *in_info = *out_info; + in_info->format = IA_CSS_FRAME_FORMAT_RAW; + in_info->raw_bit_depth = ANR_ELEMENT_BITS; + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP, + post_anr_descr, in_info, out_infos, vf_info); + + post_anr_descr->isp_pipe_version = pipe->config.isp_pipe_version; + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_ldc_binarydesc( + struct ia_css_pipe const * const pipe, + struct ia_css_binary_descr *ldc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) +{ + unsigned int i; + struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + + assert(pipe != NULL); + assert(in_info != NULL); + assert(out_info != NULL); + IA_CSS_ENTER_PRIVATE(""); + +#ifndef ISP2401 + *in_info = *out_info; +#else + if (pipe->out_yuv_ds_input_info.res.width) + *in_info = pipe->out_yuv_ds_input_info; + else + *in_info = *out_info; +#endif + in_info->format = IA_CSS_FRAME_FORMAT_YUV420; + in_info->raw_bit_depth = 0; + ia_css_frame_info_set_width(in_info, in_info->res.width, 0); + + out_infos[0] = out_info; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + out_infos[i] = NULL; + + pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_CAPTURE_PP, + ldc_descr, in_info, out_infos, NULL); + ldc_descr->enable_dvs_6axis = + pipe->extra_config.enable_dvs_6axis; + IA_CSS_LEAVE_PRIVATE(""); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c new file mode 100644 index 0000000000000..40af8daf5ad96 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c @@ -0,0 +1,115 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_pipe_stagedesc.h" +#include "assert_support.h" +#include "ia_css_debug.h" + +void ia_css_pipe_get_generic_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame) +{ + unsigned int i; + IA_CSS_ENTER_PRIVATE("stage_desc = %p, binary = %p, out_frame = %p, in_frame = %p, vf_frame = %p", + stage_desc, binary, out_frame, in_frame, vf_frame); + + assert(stage_desc != NULL && binary != NULL && binary->info != NULL); + if (stage_desc == NULL || binary == NULL || binary->info == NULL) { + IA_CSS_ERROR("invalid arguments"); + goto ERR; + } + + stage_desc->binary = binary; + stage_desc->firmware = NULL; + stage_desc->sp_func = IA_CSS_PIPELINE_NO_FUNC; + stage_desc->max_input_width = 0; + stage_desc->mode = binary->info->sp.pipeline.mode; + stage_desc->in_frame = in_frame; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + stage_desc->out_frame[i] = out_frame[i]; + } + stage_desc->vf_frame = vf_frame; +ERR: + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_pipe_get_firmwares_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame, + const struct ia_css_fw_info *fw, + unsigned int mode) +{ + unsigned int i; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_firmwares_stage_desc() enter:\n"); + stage_desc->binary = binary; + stage_desc->firmware = fw; + stage_desc->sp_func = IA_CSS_PIPELINE_NO_FUNC; + stage_desc->max_input_width = 0; + stage_desc->mode = mode; + stage_desc->in_frame = in_frame; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + stage_desc->out_frame[i] = out_frame[i]; + } + stage_desc->vf_frame = vf_frame; +} + +void ia_css_pipe_get_acc_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_fw_info *fw) +{ + unsigned int i; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_acc_stage_desc() enter:\n"); + stage_desc->binary = binary; + stage_desc->firmware = fw; + stage_desc->sp_func = IA_CSS_PIPELINE_NO_FUNC; + stage_desc->max_input_width = 0; + stage_desc->mode = IA_CSS_BINARY_MODE_VF_PP; + stage_desc->in_frame = NULL; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + stage_desc->out_frame[i] = NULL; + } + stage_desc->vf_frame = NULL; +} + +void ia_css_pipe_get_sp_func_stage_desc( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_frame *out_frame, + enum ia_css_pipeline_stage_sp_func sp_func, + unsigned max_input_width) +{ + unsigned int i; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_sp_func_stage_desc() enter:\n"); + stage_desc->binary = NULL; + stage_desc->firmware = NULL; + stage_desc->sp_func = sp_func; + stage_desc->max_input_width = max_input_width; + stage_desc->mode = (unsigned int)-1; + stage_desc->in_frame = NULL; + stage_desc->out_frame[0] = out_frame; + for (i = 1; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + stage_desc->out_frame[i] = NULL; + } + stage_desc->vf_frame = NULL; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c new file mode 100644 index 0000000000000..5fc1718cb2bd0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c @@ -0,0 +1,51 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_pipe_util.h" +#include "ia_css_frame_public.h" +#include "ia_css_pipe.h" +#include "ia_css_util.h" +#include "assert_support.h" + +unsigned int ia_css_pipe_util_pipe_input_format_bpp( + const struct ia_css_pipe * const pipe) +{ + assert(pipe != NULL); + assert(pipe->stream != NULL); + + return ia_css_util_input_format_bpp(pipe->stream->config.input_config.format, + pipe->stream->config.pixels_per_clock == 2); +} + +void ia_css_pipe_util_create_output_frames( + struct ia_css_frame *frames[]) +{ + unsigned int i; + + assert(frames != NULL); + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + frames[i] = NULL; + } +} + +void ia_css_pipe_util_set_output_frames( + struct ia_css_frame *frames[], + unsigned int idx, + struct ia_css_frame *frame) +{ + assert(idx < IA_CSS_BINARY_MAX_OUTPUT_PORTS); + + frames[idx] = frame; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h new file mode 100644 index 0000000000000..5ab48f346790b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h @@ -0,0 +1,141 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_UTIL_H__ +#define __IA_CSS_UTIL_H__ + +#include +#include +#include +#include +#include +#include + +/* @brief convert "errno" error code to "ia_css_err" error code + * + * @param[in] "errno" error code + * @return "ia_css_err" error code + * + */ +enum ia_css_err ia_css_convert_errno( + int in_err); + +/* @brief check vf frame info. + * + * @param[in] info + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +extern enum ia_css_err ia_css_util_check_vf_info( + const struct ia_css_frame_info * const info); + +/* @brief check input configuration. + * + * @param[in] stream_config + * @param[in] must_be_raw + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +extern enum ia_css_err ia_css_util_check_input( + const struct ia_css_stream_config * const stream_config, + bool must_be_raw, + bool must_be_yuv); + +/* @brief check vf and out frame info. + * + * @param[in] out_info + * @param[in] vf_info + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +extern enum ia_css_err ia_css_util_check_vf_out_info( + const struct ia_css_frame_info * const out_info, + const struct ia_css_frame_info * const vf_info); + +/* @brief check width and height + * + * @param[in] width + * @param[in] height + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +extern enum ia_css_err ia_css_util_check_res( + unsigned int width, + unsigned int height); + +#ifdef ISP2401 +/* @brief compare resolutions (less or equal) + * + * @param[in] a resolution + * @param[in] b resolution + * @return true if both dimensions of a are less or + * equal than those of b, false otherwise + * + */ +extern bool ia_css_util_res_leq( + struct ia_css_resolution a, + struct ia_css_resolution b); + +/** + * @brief Check if resolution is zero + * + * @param[in] resolution The resolution to check + * + * @returns true if resolution is zero + */ +extern bool ia_css_util_resolution_is_zero( + const struct ia_css_resolution resolution); + +/** + * @brief Check if resolution is even + * + * @param[in] resolution The resolution to check + * + * @returns true if resolution is even + */ +extern bool ia_css_util_resolution_is_even( + const struct ia_css_resolution resolution); + +#endif +/* @brief check width and height + * + * @param[in] stream_format + * @param[in] two_ppc + * @return bits per pixel based on given parameters. + * + */ +extern unsigned int ia_css_util_input_format_bpp( + enum atomisp_input_format stream_format, + bool two_ppc); + +/* @brief check if input format it raw + * + * @param[in] stream_format + * @return true if the input format is raw or false otherwise + * + */ +extern bool ia_css_util_is_input_format_raw( + enum atomisp_input_format stream_format); + +/* @brief check if input format it yuv + * + * @param[in] stream_format + * @return true if the input format is yuv or false otherwise + * + */ +extern bool ia_css_util_is_input_format_yuv( + enum atomisp_input_format stream_format); + +#endif /* __IA_CSS_UTIL_H__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c new file mode 100644 index 0000000000000..91e5861123329 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c @@ -0,0 +1,227 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_util.h" +#include +#include +#include + +/* for ia_css_binary_max_vf_width() */ +#include "ia_css_binary.h" + + +enum ia_css_err ia_css_convert_errno( + int in_err) +{ + enum ia_css_err out_err; + + switch (in_err) { + case 0: + out_err = IA_CSS_SUCCESS; + break; + case EINVAL: + out_err = IA_CSS_ERR_INVALID_ARGUMENTS; + break; + case ENODATA: + out_err = IA_CSS_ERR_QUEUE_IS_EMPTY; + break; + case ENOSYS: + case ENOTSUP: + out_err = IA_CSS_ERR_INTERNAL_ERROR; + break; + case ENOBUFS: + out_err = IA_CSS_ERR_QUEUE_IS_FULL; + break; + default: + out_err = IA_CSS_ERR_INTERNAL_ERROR; + break; + } + return out_err; +} + +/* MW: Table look-up ??? */ +unsigned int ia_css_util_input_format_bpp( + enum atomisp_input_format format, + bool two_ppc) +{ + unsigned int rval = 0; + switch (format) { + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + case ATOMISP_INPUT_FORMAT_YUV420_8: + case ATOMISP_INPUT_FORMAT_YUV422_8: + case ATOMISP_INPUT_FORMAT_RGB_888: + case ATOMISP_INPUT_FORMAT_RAW_8: + case ATOMISP_INPUT_FORMAT_BINARY_8: + case ATOMISP_INPUT_FORMAT_EMBEDDED: + rval = 8; + break; + case ATOMISP_INPUT_FORMAT_YUV420_10: + case ATOMISP_INPUT_FORMAT_YUV422_10: + case ATOMISP_INPUT_FORMAT_RAW_10: + rval = 10; + break; + case ATOMISP_INPUT_FORMAT_YUV420_16: + case ATOMISP_INPUT_FORMAT_YUV422_16: + rval = 16; + break; + case ATOMISP_INPUT_FORMAT_RGB_444: + rval = 4; + break; + case ATOMISP_INPUT_FORMAT_RGB_555: + rval = 5; + break; + case ATOMISP_INPUT_FORMAT_RGB_565: + rval = 65; + break; + case ATOMISP_INPUT_FORMAT_RGB_666: + case ATOMISP_INPUT_FORMAT_RAW_6: + rval = 6; + break; + case ATOMISP_INPUT_FORMAT_RAW_7: + rval = 7; + break; + case ATOMISP_INPUT_FORMAT_RAW_12: + rval = 12; + break; + case ATOMISP_INPUT_FORMAT_RAW_14: + if (two_ppc) + rval = 14; + else + rval = 12; + break; + case ATOMISP_INPUT_FORMAT_RAW_16: + if (two_ppc) + rval = 16; + else + rval = 12; + break; + default: + rval = 0; + break; + + } + return rval; +} + +enum ia_css_err ia_css_util_check_vf_info( + const struct ia_css_frame_info * const info) +{ + enum ia_css_err err; + unsigned int max_vf_width; + assert(info != NULL); + err = ia_css_frame_check_info(info); + if (err != IA_CSS_SUCCESS) + return err; + max_vf_width = ia_css_binary_max_vf_width(); + if (max_vf_width != 0 && info->res.width > max_vf_width*2) + return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_SUCCESS; +} + +enum ia_css_err ia_css_util_check_vf_out_info( + const struct ia_css_frame_info * const out_info, + const struct ia_css_frame_info * const vf_info) +{ + enum ia_css_err err; + + assert(out_info != NULL); + assert(vf_info != NULL); + + err = ia_css_frame_check_info(out_info); + if (err != IA_CSS_SUCCESS) + return err; + err = ia_css_util_check_vf_info(vf_info); + if (err != IA_CSS_SUCCESS) + return err; + return IA_CSS_SUCCESS; +} + +enum ia_css_err ia_css_util_check_res(unsigned int width, unsigned int height) +{ + /* height can be odd number for jpeg/embedded data from ISYS2401 */ + if (((width == 0) || + (height == 0) || + IS_ODD(width))) { + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + return IA_CSS_SUCCESS; +} + +#ifdef ISP2401 +bool ia_css_util_res_leq(struct ia_css_resolution a, struct ia_css_resolution b) +{ + return a.width <= b.width && a.height <= b.height; +} + +bool ia_css_util_resolution_is_zero(const struct ia_css_resolution resolution) +{ + return (resolution.width == 0) || (resolution.height == 0); +} + +bool ia_css_util_resolution_is_even(const struct ia_css_resolution resolution) +{ + return IS_EVEN(resolution.height) && IS_EVEN(resolution.width); +} + +#endif +bool ia_css_util_is_input_format_raw(enum atomisp_input_format format) +{ + return ((format == ATOMISP_INPUT_FORMAT_RAW_6) || + (format == ATOMISP_INPUT_FORMAT_RAW_7) || + (format == ATOMISP_INPUT_FORMAT_RAW_8) || + (format == ATOMISP_INPUT_FORMAT_RAW_10) || + (format == ATOMISP_INPUT_FORMAT_RAW_12)); + /* raw_14 and raw_16 are not supported as input formats to the ISP. + * They can only be copied to a frame in memory using the + * copy binary. + */ +} + +bool ia_css_util_is_input_format_yuv(enum atomisp_input_format format) +{ + return format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY || + format == ATOMISP_INPUT_FORMAT_YUV420_8 || + format == ATOMISP_INPUT_FORMAT_YUV420_10 || + format == ATOMISP_INPUT_FORMAT_YUV420_16 || + format == ATOMISP_INPUT_FORMAT_YUV422_8 || + format == ATOMISP_INPUT_FORMAT_YUV422_10 || + format == ATOMISP_INPUT_FORMAT_YUV422_16; +} + +enum ia_css_err ia_css_util_check_input( + const struct ia_css_stream_config * const stream_config, + bool must_be_raw, + bool must_be_yuv) +{ + assert(stream_config != NULL); + + if (stream_config == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + +#ifdef IS_ISP_2400_SYSTEM + if (stream_config->input_config.effective_res.width == 0 || + stream_config->input_config.effective_res.height == 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; +#endif + if (must_be_raw && + !ia_css_util_is_input_format_raw(stream_config->input_config.format)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + if (must_be_yuv && + !ia_css_util_is_input_format_yuv(stream_config->input_config.format)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + return IA_CSS_SUCCESS; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c new file mode 100644 index 0000000000000..325b821f276cf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c @@ -0,0 +1,360 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_pipeline.h" +#include "ia_css_isp_configs.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_iterator( + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; + offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; + } + if (size) { + ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_copy_output( + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; + offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; + } + if (size) { + ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_crop( + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.crop.size; + offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; + } + if (size) { + ia_css_crop_config((struct sh_css_isp_crop_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_fpn( + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; + offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; + } + if (size) { + ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_dvs( + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; + offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; + } + if (size) { + ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_qplane( + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; + offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; + } + if (size) { + ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output0( + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output0.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; + } + if (size) { + ia_css_output0_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output1( + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output1.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; + } + if (size) { + ia_css_output1_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output( + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; + } + if (size) { + ia_css_output_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ +#ifdef ISP2401 + +void +ia_css_configure_sc( + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.sc.size; + offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; + } + if (size) { + ia_css_sc_config((struct sh_css_isp_sc_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ +#endif + +void +ia_css_configure_raw( + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.raw.size; + offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; + } + if (size) { + ia_css_raw_config((struct sh_css_isp_raw_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_tnr( + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; + offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; + } + if (size) { + ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_ref( + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.ref.size; + offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; + } + if (size) { + ia_css_ref_config((struct sh_css_isp_ref_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_vf( + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.vf.size; + offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; + } + if (size) { + ia_css_vf_config((struct sh_css_isp_vf_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h new file mode 100644 index 0000000000000..8aacd3dbc05a5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h @@ -0,0 +1,189 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifdef IA_CSS_INCLUDE_CONFIGURATIONS +#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" +#include "isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h" +#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" +#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" +#include "isp/kernels/output/output_1.0/ia_css_output.host.h" +#include "isp/kernels/qplane/qplane_2/ia_css_qplane.host.h" +#include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" +#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" +#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" +#ifdef ISP2401 +#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" +#endif +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" +#include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" +#include "isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h" +#endif /* IA_CSS_INCLUDE_CONFIGURATIONS */ +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_CONFIG_H +#define _IA_CSS_ISP_CONFIG_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_configuration_ids { + IA_CSS_ITERATOR_CONFIG_ID, + IA_CSS_COPY_OUTPUT_CONFIG_ID, + IA_CSS_CROP_CONFIG_ID, + IA_CSS_FPN_CONFIG_ID, + IA_CSS_DVS_CONFIG_ID, + IA_CSS_QPLANE_CONFIG_ID, + IA_CSS_OUTPUT0_CONFIG_ID, + IA_CSS_OUTPUT1_CONFIG_ID, + IA_CSS_OUTPUT_CONFIG_ID, +#ifdef ISP2401 + IA_CSS_SC_CONFIG_ID, +#endif + IA_CSS_RAW_CONFIG_ID, + IA_CSS_TNR_CONFIG_ID, + IA_CSS_REF_CONFIG_ID, + IA_CSS_VF_CONFIG_ID, + IA_CSS_NUM_CONFIGURATION_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_config_memory_offsets { + struct { + struct ia_css_isp_parameter iterator; + struct ia_css_isp_parameter copy_output; + struct ia_css_isp_parameter crop; + struct ia_css_isp_parameter fpn; + struct ia_css_isp_parameter dvs; + struct ia_css_isp_parameter qplane; + struct ia_css_isp_parameter output0; + struct ia_css_isp_parameter output1; + struct ia_css_isp_parameter output; +#ifdef ISP2401 + struct ia_css_isp_parameter sc; +#endif + struct ia_css_isp_parameter raw; + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter ref; + struct ia_css_isp_parameter vf; + } dmem; +}; + +#if defined(IA_CSS_INCLUDE_CONFIGURATIONS) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_iterator( + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_copy_output( + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_crop( + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_fpn( + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_dvs( + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_qplane( + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output0( + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output1( + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output( + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +#ifdef ISP2401 +void +ia_css_configure_sc( + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +#endif +void +ia_css_configure_raw( + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_tnr( + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_ref( + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_vf( + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); + +#endif /* IA_CSS_INCLUDE_CONFIGURATION */ + +#endif /* _IA_CSS_ISP_CONFIG_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c new file mode 100644 index 0000000000000..d418e763b7552 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c @@ -0,0 +1,3221 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#define IA_CSS_INCLUDE_PARAMETERS +#include "sh_css_params.h" +#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" +#include "isp/kernels/anr/anr_1.0/ia_css_anr.host.h" +#include "isp/kernels/anr/anr_2/ia_css_anr2.host.h" +#include "isp/kernels/bh/bh_2/ia_css_bh.host.h" +#include "isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h" +#include "isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h" +#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" +#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" +#include "isp/kernels/csc/csc_1.0/ia_css_csc.host.h" +#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h" +#include "isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h" +#include "isp/kernels/ctc/ctc2/ia_css_ctc2.host.h" +#include "isp/kernels/de/de_1.0/ia_css_de.host.h" +#include "isp/kernels/de/de_2/ia_css_de2.host.h" +#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" +#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" +#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" +#include "isp/kernels/gc/gc_1.0/ia_css_gc.host.h" +#include "isp/kernels/gc/gc_2/ia_css_gc2.host.h" +#include "isp/kernels/macc/macc_1.0/ia_css_macc.host.h" +#include "isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h" +#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" +#include "isp/kernels/ob/ob2/ia_css_ob2.host.h" +#include "isp/kernels/output/output_1.0/ia_css_output.host.h" +#include "isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h" +#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" +#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" +#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h" +#include "isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h" +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/uds/uds_1.0/ia_css_uds_param.h" +#include "isp/kernels/wb/wb_1.0/ia_css_wb.host.h" +#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h" +#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h" +#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" +#include "isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h" +#include "isp/kernels/fc/fc_1.0/ia_css_formats.host.h" +#include "isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h" +#include "isp/kernels/dpc2/ia_css_dpc2.host.h" +#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" +#include "isp/kernels/bnlm/ia_css_bnlm.host.h" +#include "isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h" +/* Generated code: do not edit or commmit. */ + +#include "ia_css_pipeline.h" +#include "ia_css_isp_params.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_aa( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + + if (size) { + struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + t->strength = params->aa_config.strength; + } + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_anr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); + + ia_css_anr_encode((struct sh_css_isp_anr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->anr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_anr2( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); + + ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->anr_thres, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bh( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); + + ia_css_bh_encode((struct sh_css_isp_bh_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_cnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); + + ia_css_cnr_encode((struct sh_css_isp_cnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_crop( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); + + ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->crop_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_csc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); + + ia_css_csc_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_dp( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); + + ia_css_dp_encode((struct sh_css_isp_dp_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dp_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); + + ia_css_bnr_encode((struct sh_css_isp_bnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_de( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); + + ia_css_de_encode((struct sh_css_isp_de_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->de_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ecd( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); + + ia_css_ecd_encode((struct sh_css_isp_ecd_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ecd_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_formats( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); + + ia_css_formats_encode((struct sh_css_isp_formats_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->formats_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_fpn( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); + + ia_css_fpn_encode((struct sh_css_isp_fpn_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fpn_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_gc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); + + ia_css_gc_encode((struct sh_css_isp_gc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->gc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); + + ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->gc_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ce( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); + + ia_css_ce_encode((struct sh_css_isp_ce_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ce_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_yuv2rgb( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); + + ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yuv2rgb_cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_rgb2yuv( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); + + ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->rgb2yuv_cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_r_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); + + ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->r_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_g_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); + + ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->g_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_b_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); + + ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], + ¶ms->b_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_uds( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + + if (size) { + struct sh_css_sp_uds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); + + p = (struct sh_css_sp_uds_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + p->crop_pos = params->uds_config.crop_pos; + p->uds = params->uds_config.uds; + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_raa( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); + + ia_css_raa_encode((struct sh_css_isp_aa_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->raa_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_s3a( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); + + ia_css_s3a_encode((struct sh_css_isp_s3a_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ob( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); + + ia_css_ob_encode((struct sh_css_isp_ob_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ob_config, +¶ms->stream_configs.ob, size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); + + ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->ob_config, +¶ms->stream_configs.ob, size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_output( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); + + ia_css_output_encode((struct sh_css_isp_output_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->output_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); + + ia_css_sc_encode((struct sh_css_isp_sc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->sc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bds( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + + if (size) { + struct sh_css_isp_bds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); + + p = (struct sh_css_isp_bds_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + p->baf_strength = params->bds_config.strength; + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_tnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); + + ia_css_tnr_encode((struct sh_css_isp_tnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->tnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_macc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); + + ia_css_macc_encode((struct sh_css_isp_macc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->macc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_horicoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); + + ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_vertcoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); + + ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_horiproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); + + ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_vertproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); + + ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_horicoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); + + ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_vertcoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); + + ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_horiproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); + + ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_vertproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); + + ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_wb( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); + + ia_css_wb_encode((struct sh_css_isp_wb_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->wb_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_nr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); + + ia_css_nr_encode((struct sh_css_isp_ynr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_yee( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); + + ia_css_yee_encode((struct sh_css_isp_yee_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yee_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ynr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); + + ia_css_ynr_encode((struct sh_css_isp_yee2_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ynr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_fc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); + + ia_css_fc_encode((struct sh_css_isp_fc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ctc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + + ia_css_ctc_encode((struct sh_css_isp_ctc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ctc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + + ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->ctc_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr_table( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); + + ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->xnr_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); + + ia_css_xnr_encode((struct sh_css_isp_xnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr3( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + + ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr3_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + } + + } +#ifdef ISP2401 + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + + ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->xnr3_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + } + + } +#endif +} + +/* Code generated by genparam/gencode.c:gen_param_process_table() */ + +void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) = { + ia_css_process_aa, + ia_css_process_anr, + ia_css_process_anr2, + ia_css_process_bh, + ia_css_process_cnr, + ia_css_process_crop, + ia_css_process_csc, + ia_css_process_dp, + ia_css_process_bnr, + ia_css_process_de, + ia_css_process_ecd, + ia_css_process_formats, + ia_css_process_fpn, + ia_css_process_gc, + ia_css_process_ce, + ia_css_process_yuv2rgb, + ia_css_process_rgb2yuv, + ia_css_process_r_gamma, + ia_css_process_g_gamma, + ia_css_process_b_gamma, + ia_css_process_uds, + ia_css_process_raa, + ia_css_process_s3a, + ia_css_process_ob, + ia_css_process_output, + ia_css_process_sc, + ia_css_process_bds, + ia_css_process_tnr, + ia_css_process_macc, + ia_css_process_sdis_horicoef, + ia_css_process_sdis_vertcoef, + ia_css_process_sdis_horiproj, + ia_css_process_sdis_vertproj, + ia_css_process_sdis2_horicoef, + ia_css_process_sdis2_vertcoef, + ia_css_process_sdis2_horiproj, + ia_css_process_sdis2_vertproj, + ia_css_process_wb, + ia_css_process_nr, + ia_css_process_yee, + ia_css_process_ynr, + ia_css_process_fc, + ia_css_process_ctc, + ia_css_process_xnr_table, + ia_css_process_xnr, + ia_css_process_xnr3, +}; + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_dp_config(const struct ia_css_isp_parameters *params, + struct ia_css_dp_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: " + "config=%p\n",config); + + *config = params->dp_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() leave\n"); + ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_dp_config(struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); + ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dp_config = *config; + params->config_changed[IA_CSS_DP_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_DP_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_wb_config(const struct ia_css_isp_parameters *params, + struct ia_css_wb_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: " + "config=%p\n",config); + + *config = params->wb_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() leave\n"); + ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_wb_config(struct ia_css_isp_parameters *params, + const struct ia_css_wb_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); + ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->wb_config = *config; + params->config_changed[IA_CSS_WB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_WB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_tnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: " + "config=%p\n",config); + + *config = params->tnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() leave\n"); + ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_tnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_tnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); + ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->tnr_config = *config; + params->config_changed[IA_CSS_TNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_TNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ob_config(const struct ia_css_isp_parameters *params, + struct ia_css_ob_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: " + "config=%p\n",config); + + *config = params->ob_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() leave\n"); + ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ob_config(struct ia_css_isp_parameters *params, + const struct ia_css_ob_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); + ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ob_config = *config; + params->config_changed[IA_CSS_OB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_OB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_de_config(const struct ia_css_isp_parameters *params, + struct ia_css_de_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: " + "config=%p\n",config); + + *config = params->de_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() leave\n"); + ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_de_config(struct ia_css_isp_parameters *params, + const struct ia_css_de_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); + ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->de_config = *config; + params->config_changed[IA_CSS_DE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_DE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_anr_config(const struct ia_css_isp_parameters *params, + struct ia_css_anr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: " + "config=%p\n",config); + + *config = params->anr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() leave\n"); + ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); + ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->anr_config = *config; + params->config_changed[IA_CSS_ANR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ANR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, + struct ia_css_anr_thres *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: " + "config=%p\n",config); + + *config = params->anr_thres; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() leave\n"); + ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr2_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_thres *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); + ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->anr_thres = *config; + params->config_changed[IA_CSS_ANR2_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ANR2_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ce_config(const struct ia_css_isp_parameters *params, + struct ia_css_ce_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: " + "config=%p\n",config); + + *config = params->ce_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() leave\n"); + ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ce_config(struct ia_css_isp_parameters *params, + const struct ia_css_ce_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); + ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ce_config = *config; + params->config_changed[IA_CSS_CE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, + struct ia_css_ecd_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: " + "config=%p\n",config); + + *config = params->ecd_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() leave\n"); + ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ecd_config(struct ia_css_isp_parameters *params, + const struct ia_css_ecd_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); + ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ecd_config = *config; + params->config_changed[IA_CSS_ECD_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ECD_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, + struct ia_css_ynr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: " + "config=%p\n",config); + + *config = params->ynr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() leave\n"); + ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ynr_config(struct ia_css_isp_parameters *params, + const struct ia_css_ynr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); + ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ynr_config = *config; + params->config_changed[IA_CSS_YNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_YNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_fc_config(const struct ia_css_isp_parameters *params, + struct ia_css_fc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: " + "config=%p\n",config); + + *config = params->fc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() leave\n"); + ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_fc_config(struct ia_css_isp_parameters *params, + const struct ia_css_fc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); + ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->fc_config = *config; + params->config_changed[IA_CSS_FC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_FC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_cnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: " + "config=%p\n",config); + + *config = params->cnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() leave\n"); + ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_cnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_cnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); + ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->cnr_config = *config; + params->config_changed[IA_CSS_CNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_macc_config(const struct ia_css_isp_parameters *params, + struct ia_css_macc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: " + "config=%p\n",config); + + *config = params->macc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() leave\n"); + ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_macc_config(struct ia_css_isp_parameters *params, + const struct ia_css_macc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); + ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->macc_config = *config; + params->config_changed[IA_CSS_MACC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_MACC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, + struct ia_css_ctc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: " + "config=%p\n",config); + + *config = params->ctc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() leave\n"); + ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ctc_config(struct ia_css_isp_parameters *params, + const struct ia_css_ctc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); + ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ctc_config = *config; + params->config_changed[IA_CSS_CTC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CTC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_aa_config(const struct ia_css_isp_parameters *params, + struct ia_css_aa_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: " + "config=%p\n",config); + + *config = params->aa_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() leave\n"); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_aa_config(struct ia_css_isp_parameters *params, + const struct ia_css_aa_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); + params->aa_config = *config; + params->config_changed[IA_CSS_AA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_AA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: " + "config=%p\n",config); + + *config = params->yuv2rgb_cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() leave\n"); + ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); + ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->yuv2rgb_cc_config = *config; + params->config_changed[IA_CSS_YUV2RGB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_YUV2RGB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: " + "config=%p\n",config); + + *config = params->rgb2yuv_cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() leave\n"); + ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); + ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->rgb2yuv_cc_config = *config; + params->config_changed[IA_CSS_RGB2YUV_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_RGB2YUV_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_csc_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: " + "config=%p\n",config); + + *config = params->cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() leave\n"); + ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_csc_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); + ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->cc_config = *config; + params->config_changed[IA_CSS_CSC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CSC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_nr_config(const struct ia_css_isp_parameters *params, + struct ia_css_nr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: " + "config=%p\n",config); + + *config = params->nr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() leave\n"); + ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_nr_config(struct ia_css_isp_parameters *params, + const struct ia_css_nr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); + ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->nr_config = *config; + params->config_changed[IA_CSS_BNR_ID] = true; + params->config_changed[IA_CSS_NR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_NR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_gc_config(const struct ia_css_isp_parameters *params, + struct ia_css_gc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: " + "config=%p\n",config); + + *config = params->gc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() leave\n"); + ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_gc_config(struct ia_css_isp_parameters *params, + const struct ia_css_gc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); + ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->gc_config = *config; + params->config_changed[IA_CSS_GC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_GC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() leave\n"); + ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); + ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() leave\n"); + ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); + ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() leave\n"); + ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); + ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() leave\n"); + ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); + ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() leave\n"); + ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); + ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() leave\n"); + ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); + ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() leave\n"); + ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); + ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() leave\n"); + ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); + ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: " + "config=%p\n",config); + + *config = params->r_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() leave\n"); + ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); + ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->r_gamma_table = *config; + params->config_changed[IA_CSS_R_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_R_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: " + "config=%p\n",config); + + *config = params->g_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() leave\n"); + ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); + ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->g_gamma_table = *config; + params->config_changed[IA_CSS_G_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_G_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: " + "config=%p\n",config); + + *config = params->b_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() leave\n"); + ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); + ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->b_gamma_table = *config; + params->config_changed[IA_CSS_B_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_B_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: " + "config=%p\n",config); + + *config = params->xnr_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() leave\n"); + ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); + ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr_table = *config; + params->config_changed[IA_CSS_XNR_TABLE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR_TABLE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_formats_config(const struct ia_css_isp_parameters *params, + struct ia_css_formats_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: " + "config=%p\n",config); + + *config = params->formats_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() leave\n"); + ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_formats_config(struct ia_css_isp_parameters *params, + const struct ia_css_formats_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); + ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->formats_config = *config; + params->config_changed[IA_CSS_FORMATS_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_FORMATS_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: " + "config=%p\n",config); + + *config = params->xnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() leave\n"); + ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); + ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr_config = *config; + params->config_changed[IA_CSS_XNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr3_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: " + "config=%p\n",config); + + *config = params->xnr3_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() leave\n"); + ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr3_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); + ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr3_config = *config; + params->config_changed[IA_CSS_XNR3_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR3_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, + struct ia_css_3a_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: " + "config=%p\n",config); + + *config = params->s3a_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() leave\n"); + ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_s3a_config(struct ia_css_isp_parameters *params, + const struct ia_css_3a_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); + ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->s3a_config = *config; + params->config_changed[IA_CSS_BH_ID] = true; + params->config_changed[IA_CSS_S3A_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_S3A_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_output_config(const struct ia_css_isp_parameters *params, + struct ia_css_output_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: " + "config=%p\n",config); + + *config = params->output_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() leave\n"); + ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_output_config(struct ia_css_isp_parameters *params, + const struct ia_css_output_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); + ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->output_config = *config; + params->config_changed[IA_CSS_OUTPUT_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_OUTPUT_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_get_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +{ + ia_css_get_dp_config(params, config->dp_config); + ia_css_get_wb_config(params, config->wb_config); + ia_css_get_tnr_config(params, config->tnr_config); + ia_css_get_ob_config(params, config->ob_config); + ia_css_get_de_config(params, config->de_config); + ia_css_get_anr_config(params, config->anr_config); + ia_css_get_anr2_config(params, config->anr_thres); + ia_css_get_ce_config(params, config->ce_config); + ia_css_get_ecd_config(params, config->ecd_config); + ia_css_get_ynr_config(params, config->ynr_config); + ia_css_get_fc_config(params, config->fc_config); + ia_css_get_cnr_config(params, config->cnr_config); + ia_css_get_macc_config(params, config->macc_config); + ia_css_get_ctc_config(params, config->ctc_config); + ia_css_get_aa_config(params, config->aa_config); + ia_css_get_yuv2rgb_config(params, config->yuv2rgb_cc_config); + ia_css_get_rgb2yuv_config(params, config->rgb2yuv_cc_config); + ia_css_get_csc_config(params, config->cc_config); + ia_css_get_nr_config(params, config->nr_config); + ia_css_get_gc_config(params, config->gc_config); + ia_css_get_sdis_horicoef_config(params, config->dvs_coefs); + ia_css_get_sdis_vertcoef_config(params, config->dvs_coefs); + ia_css_get_sdis_horiproj_config(params, config->dvs_coefs); + ia_css_get_sdis_vertproj_config(params, config->dvs_coefs); + ia_css_get_sdis2_horicoef_config(params, config->dvs2_coefs); + ia_css_get_sdis2_vertcoef_config(params, config->dvs2_coefs); + ia_css_get_sdis2_horiproj_config(params, config->dvs2_coefs); + ia_css_get_sdis2_vertproj_config(params, config->dvs2_coefs); + ia_css_get_r_gamma_config(params, config->r_gamma_table); + ia_css_get_g_gamma_config(params, config->g_gamma_table); + ia_css_get_b_gamma_config(params, config->b_gamma_table); + ia_css_get_xnr_table_config(params, config->xnr_table); + ia_css_get_formats_config(params, config->formats_config); + ia_css_get_xnr_config(params, config->xnr_config); + ia_css_get_xnr3_config(params, config->xnr3_config); + ia_css_get_s3a_config(params, config->s3a_config); + ia_css_get_output_config(params, config->output_config); +} + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_set_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +{ + ia_css_set_dp_config(params, config->dp_config); + ia_css_set_wb_config(params, config->wb_config); + ia_css_set_tnr_config(params, config->tnr_config); + ia_css_set_ob_config(params, config->ob_config); + ia_css_set_de_config(params, config->de_config); + ia_css_set_anr_config(params, config->anr_config); + ia_css_set_anr2_config(params, config->anr_thres); + ia_css_set_ce_config(params, config->ce_config); + ia_css_set_ecd_config(params, config->ecd_config); + ia_css_set_ynr_config(params, config->ynr_config); + ia_css_set_fc_config(params, config->fc_config); + ia_css_set_cnr_config(params, config->cnr_config); + ia_css_set_macc_config(params, config->macc_config); + ia_css_set_ctc_config(params, config->ctc_config); + ia_css_set_aa_config(params, config->aa_config); + ia_css_set_yuv2rgb_config(params, config->yuv2rgb_cc_config); + ia_css_set_rgb2yuv_config(params, config->rgb2yuv_cc_config); + ia_css_set_csc_config(params, config->cc_config); + ia_css_set_nr_config(params, config->nr_config); + ia_css_set_gc_config(params, config->gc_config); + ia_css_set_sdis_horicoef_config(params, config->dvs_coefs); + ia_css_set_sdis_vertcoef_config(params, config->dvs_coefs); + ia_css_set_sdis_horiproj_config(params, config->dvs_coefs); + ia_css_set_sdis_vertproj_config(params, config->dvs_coefs); + ia_css_set_sdis2_horicoef_config(params, config->dvs2_coefs); + ia_css_set_sdis2_vertcoef_config(params, config->dvs2_coefs); + ia_css_set_sdis2_horiproj_config(params, config->dvs2_coefs); + ia_css_set_sdis2_vertproj_config(params, config->dvs2_coefs); + ia_css_set_r_gamma_config(params, config->r_gamma_table); + ia_css_set_g_gamma_config(params, config->g_gamma_table); + ia_css_set_b_gamma_config(params, config->b_gamma_table); + ia_css_set_xnr_table_config(params, config->xnr_table); + ia_css_set_formats_config(params, config->formats_config); + ia_css_set_xnr_config(params, config->xnr_config); + ia_css_set_xnr3_config(params, config->xnr3_config); + ia_css_set_s3a_config(params, config->s3a_config); + ia_css_set_output_config(params, config->output_config); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h new file mode 100644 index 0000000000000..5b3deb7f74aec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h @@ -0,0 +1,399 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_PARAM_H +#define _IA_CSS_ISP_PARAM_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_parameter_ids { + IA_CSS_AA_ID, + IA_CSS_ANR_ID, + IA_CSS_ANR2_ID, + IA_CSS_BH_ID, + IA_CSS_CNR_ID, + IA_CSS_CROP_ID, + IA_CSS_CSC_ID, + IA_CSS_DP_ID, + IA_CSS_BNR_ID, + IA_CSS_DE_ID, + IA_CSS_ECD_ID, + IA_CSS_FORMATS_ID, + IA_CSS_FPN_ID, + IA_CSS_GC_ID, + IA_CSS_CE_ID, + IA_CSS_YUV2RGB_ID, + IA_CSS_RGB2YUV_ID, + IA_CSS_R_GAMMA_ID, + IA_CSS_G_GAMMA_ID, + IA_CSS_B_GAMMA_ID, + IA_CSS_UDS_ID, + IA_CSS_RAA_ID, + IA_CSS_S3A_ID, + IA_CSS_OB_ID, + IA_CSS_OUTPUT_ID, + IA_CSS_SC_ID, + IA_CSS_BDS_ID, + IA_CSS_TNR_ID, + IA_CSS_MACC_ID, + IA_CSS_SDIS_HORICOEF_ID, + IA_CSS_SDIS_VERTCOEF_ID, + IA_CSS_SDIS_HORIPROJ_ID, + IA_CSS_SDIS_VERTPROJ_ID, + IA_CSS_SDIS2_HORICOEF_ID, + IA_CSS_SDIS2_VERTCOEF_ID, + IA_CSS_SDIS2_HORIPROJ_ID, + IA_CSS_SDIS2_VERTPROJ_ID, + IA_CSS_WB_ID, + IA_CSS_NR_ID, + IA_CSS_YEE_ID, + IA_CSS_YNR_ID, + IA_CSS_FC_ID, + IA_CSS_CTC_ID, + IA_CSS_XNR_TABLE_ID, + IA_CSS_XNR_ID, + IA_CSS_XNR3_ID, + IA_CSS_NUM_PARAMETER_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_memory_offsets { + struct { + struct ia_css_isp_parameter aa; + struct ia_css_isp_parameter anr; + struct ia_css_isp_parameter bh; + struct ia_css_isp_parameter cnr; + struct ia_css_isp_parameter crop; + struct ia_css_isp_parameter csc; + struct ia_css_isp_parameter dp; + struct ia_css_isp_parameter bnr; + struct ia_css_isp_parameter de; + struct ia_css_isp_parameter ecd; + struct ia_css_isp_parameter formats; + struct ia_css_isp_parameter fpn; + struct ia_css_isp_parameter gc; + struct ia_css_isp_parameter ce; + struct ia_css_isp_parameter yuv2rgb; + struct ia_css_isp_parameter rgb2yuv; + struct ia_css_isp_parameter uds; + struct ia_css_isp_parameter raa; + struct ia_css_isp_parameter s3a; + struct ia_css_isp_parameter ob; + struct ia_css_isp_parameter output; + struct ia_css_isp_parameter sc; + struct ia_css_isp_parameter bds; + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter macc; + struct ia_css_isp_parameter sdis_horiproj; + struct ia_css_isp_parameter sdis_vertproj; + struct ia_css_isp_parameter sdis2_horiproj; + struct ia_css_isp_parameter sdis2_vertproj; + struct ia_css_isp_parameter wb; + struct ia_css_isp_parameter nr; + struct ia_css_isp_parameter yee; + struct ia_css_isp_parameter ynr; + struct ia_css_isp_parameter fc; + struct ia_css_isp_parameter ctc; + struct ia_css_isp_parameter xnr; + struct ia_css_isp_parameter xnr3; + struct ia_css_isp_parameter get; + struct ia_css_isp_parameter put; + } dmem; + struct { + struct ia_css_isp_parameter anr2; + struct ia_css_isp_parameter ob; + struct ia_css_isp_parameter sdis_horicoef; + struct ia_css_isp_parameter sdis_vertcoef; + struct ia_css_isp_parameter sdis2_horicoef; + struct ia_css_isp_parameter sdis2_vertcoef; +#ifdef ISP2401 + struct ia_css_isp_parameter xnr3; +#endif + } vmem; + struct { + struct ia_css_isp_parameter bh; + } hmem0; + struct { + struct ia_css_isp_parameter gc; + struct ia_css_isp_parameter g_gamma; + struct ia_css_isp_parameter xnr_table; + } vamem1; + struct { + struct ia_css_isp_parameter r_gamma; + struct ia_css_isp_parameter ctc; + } vamem0; + struct { + struct ia_css_isp_parameter b_gamma; + } vamem2; +}; + +#if defined(IA_CSS_INCLUDE_PARAMETERS) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/gencode.c:gen_param_process_table() */ + +struct ia_css_pipeline_stage; /* forward declaration */ + +extern void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_dp_config(struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_wb_config(struct ia_css_isp_parameters *params, + const struct ia_css_wb_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_tnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_tnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ob_config(struct ia_css_isp_parameters *params, + const struct ia_css_ob_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_de_config(struct ia_css_isp_parameters *params, + const struct ia_css_de_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr2_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_thres *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ce_config(struct ia_css_isp_parameters *params, + const struct ia_css_ce_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ecd_config(struct ia_css_isp_parameters *params, + const struct ia_css_ecd_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ynr_config(struct ia_css_isp_parameters *params, + const struct ia_css_ynr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_fc_config(struct ia_css_isp_parameters *params, + const struct ia_css_fc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_cnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_cnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_macc_config(struct ia_css_isp_parameters *params, + const struct ia_css_macc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ctc_config(struct ia_css_isp_parameters *params, + const struct ia_css_ctc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_aa_config(struct ia_css_isp_parameters *params, + const struct ia_css_aa_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_csc_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_nr_config(struct ia_css_isp_parameters *params, + const struct ia_css_nr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_gc_config(struct ia_css_isp_parameters *params, + const struct ia_css_gc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_formats_config(struct ia_css_isp_parameters *params, + const struct ia_css_formats_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr3_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_s3a_config(struct ia_css_isp_parameters *params, + const struct ia_css_3a_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_output_config(struct ia_css_isp_parameters *params, + const struct ia_css_output_config *config); + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_get_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +; +#ifdef ISP2401 + +#endif +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_set_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +; +#ifdef ISP2401 + +#endif +#endif /* IA_CSS_INCLUDE_PARAMETER */ + +#endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c new file mode 100644 index 0000000000000..fb3ba08f69c1e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c @@ -0,0 +1,214 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +/* Generated code: do not edit or commmit. */ + +#include "ia_css_pipeline.h" +#include "ia_css_isp_states.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_aa_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.aa.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; + + if (size) + memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_cnr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; + + if (size) { + ia_css_init_cnr_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_cnr2_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; + + if (size) { + ia_css_init_cnr2_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_dp_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.dp.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; + + if (size) { + ia_css_init_dp_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_de_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.de.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; + + if (size) { + ia_css_init_de_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_tnr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; + + if (size) { + ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_ref_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->dmem.ref.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; + + if (size) { + ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_ynr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; + + if (size) { + ia_css_init_ynr_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_state_init_table() */ + +void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = { + ia_css_initialize_aa_state, + ia_css_initialize_cnr_state, + ia_css_initialize_cnr2_state, + ia_css_initialize_dp_state, + ia_css_initialize_de_state, + ia_css_initialize_tnr_state, + ia_css_initialize_ref_state, + ia_css_initialize_ynr_state, +}; + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h new file mode 100644 index 0000000000000..732adafb0a633 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h @@ -0,0 +1,72 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#define IA_CSS_INCLUDE_STATES +#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" +#include "isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h" +#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" +#include "isp/kernels/de/de_1.0/ia_css_de.host.h" +#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" +#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" +#include "isp/kernels/dpc2/ia_css_dpc2.host.h" +#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_STATE_H +#define _IA_CSS_ISP_STATE_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_state_ids { + IA_CSS_AA_STATE_ID, + IA_CSS_CNR_STATE_ID, + IA_CSS_CNR2_STATE_ID, + IA_CSS_DP_STATE_ID, + IA_CSS_DE_STATE_ID, + IA_CSS_TNR_STATE_ID, + IA_CSS_REF_STATE_ID, + IA_CSS_YNR_STATE_ID, + IA_CSS_NUM_STATE_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_state_memory_offsets { + struct { + struct ia_css_isp_parameter aa; + struct ia_css_isp_parameter cnr; + struct ia_css_isp_parameter cnr2; + struct ia_css_isp_parameter dp; + struct ia_css_isp_parameter de; + struct ia_css_isp_parameter ynr; + } vmem; + struct { + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter ref; + } dmem; +}; + +#if defined(IA_CSS_INCLUDE_STATES) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/genstate.c:gen_state_init_table() */ + +extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary); + +#endif /* IA_CSS_INCLUDE_STATE */ + +#endif /* _IA_CSS_ISP_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h new file mode 100644 index 0000000000000..e71e33d9d1434 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h @@ -0,0 +1,104 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_BITS_H +#define _HRT_BITS_H + +#include "defs.h" + +#define _hrt_ones(n) HRTCAT(_hrt_ones_, n) +#define _hrt_ones_0x0 0x00000000U +#define _hrt_ones_0x1 0x00000001U +#define _hrt_ones_0x2 0x00000003U +#define _hrt_ones_0x3 0x00000007U +#define _hrt_ones_0x4 0x0000000FU +#define _hrt_ones_0x5 0x0000001FU +#define _hrt_ones_0x6 0x0000003FU +#define _hrt_ones_0x7 0x0000007FU +#define _hrt_ones_0x8 0x000000FFU +#define _hrt_ones_0x9 0x000001FFU +#define _hrt_ones_0xA 0x000003FFU +#define _hrt_ones_0xB 0x000007FFU +#define _hrt_ones_0xC 0x00000FFFU +#define _hrt_ones_0xD 0x00001FFFU +#define _hrt_ones_0xE 0x00003FFFU +#define _hrt_ones_0xF 0x00007FFFU +#define _hrt_ones_0x10 0x0000FFFFU +#define _hrt_ones_0x11 0x0001FFFFU +#define _hrt_ones_0x12 0x0003FFFFU +#define _hrt_ones_0x13 0x0007FFFFU +#define _hrt_ones_0x14 0x000FFFFFU +#define _hrt_ones_0x15 0x001FFFFFU +#define _hrt_ones_0x16 0x003FFFFFU +#define _hrt_ones_0x17 0x007FFFFFU +#define _hrt_ones_0x18 0x00FFFFFFU +#define _hrt_ones_0x19 0x01FFFFFFU +#define _hrt_ones_0x1A 0x03FFFFFFU +#define _hrt_ones_0x1B 0x07FFFFFFU +#define _hrt_ones_0x1C 0x0FFFFFFFU +#define _hrt_ones_0x1D 0x1FFFFFFFU +#define _hrt_ones_0x1E 0x3FFFFFFFU +#define _hrt_ones_0x1F 0x7FFFFFFFU +#define _hrt_ones_0x20 0xFFFFFFFFU + +#define _hrt_ones_0 _hrt_ones_0x0 +#define _hrt_ones_1 _hrt_ones_0x1 +#define _hrt_ones_2 _hrt_ones_0x2 +#define _hrt_ones_3 _hrt_ones_0x3 +#define _hrt_ones_4 _hrt_ones_0x4 +#define _hrt_ones_5 _hrt_ones_0x5 +#define _hrt_ones_6 _hrt_ones_0x6 +#define _hrt_ones_7 _hrt_ones_0x7 +#define _hrt_ones_8 _hrt_ones_0x8 +#define _hrt_ones_9 _hrt_ones_0x9 +#define _hrt_ones_10 _hrt_ones_0xA +#define _hrt_ones_11 _hrt_ones_0xB +#define _hrt_ones_12 _hrt_ones_0xC +#define _hrt_ones_13 _hrt_ones_0xD +#define _hrt_ones_14 _hrt_ones_0xE +#define _hrt_ones_15 _hrt_ones_0xF +#define _hrt_ones_16 _hrt_ones_0x10 +#define _hrt_ones_17 _hrt_ones_0x11 +#define _hrt_ones_18 _hrt_ones_0x12 +#define _hrt_ones_19 _hrt_ones_0x13 +#define _hrt_ones_20 _hrt_ones_0x14 +#define _hrt_ones_21 _hrt_ones_0x15 +#define _hrt_ones_22 _hrt_ones_0x16 +#define _hrt_ones_23 _hrt_ones_0x17 +#define _hrt_ones_24 _hrt_ones_0x18 +#define _hrt_ones_25 _hrt_ones_0x19 +#define _hrt_ones_26 _hrt_ones_0x1A +#define _hrt_ones_27 _hrt_ones_0x1B +#define _hrt_ones_28 _hrt_ones_0x1C +#define _hrt_ones_29 _hrt_ones_0x1D +#define _hrt_ones_30 _hrt_ones_0x1E +#define _hrt_ones_31 _hrt_ones_0x1F +#define _hrt_ones_32 _hrt_ones_0x20 + +#define _hrt_mask(b, n) \ + (_hrt_ones(n) << (b)) +#define _hrt_get_bits(w, b, n) \ + (((w) >> (b)) & _hrt_ones(n)) +#define _hrt_set_bits(w, b, n, v) \ + (((w) & ~_hrt_mask(b, n)) | (((v) & _hrt_ones(n)) << (b))) +#define _hrt_get_bit(w, b) \ + (((w) >> (b)) & 1) +#define _hrt_set_bit(w, b, v) \ + (((w) & (~(1 << (b)))) | (((v)&1) << (b))) +#define _hrt_set_lower_half(w, v) \ + _hrt_set_bits(w, 0, 16, v) +#define _hrt_set_upper_half(w, v) \ + _hrt_set_bits(w, 16, 16, v) + +#endif /* _HRT_BITS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h new file mode 100644 index 0000000000000..b5756bfe8eb6b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _cell_params_h +#define _cell_params_h + +#define SP_PMEM_LOG_WIDTH_BITS 6 /*Width of PC, 64 bits, 8 bytes*/ +#define SP_ICACHE_TAG_BITS 4 /*size of tag*/ +#define SP_ICACHE_SET_BITS 8 /* 256 sets*/ +#define SP_ICACHE_BLOCKS_PER_SET_BITS 1 /* 2 way associative*/ +#define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ + +#define SP_ICACHE_ADDRESS_BITS \ + (SP_ICACHE_TAG_BITS+SP_ICACHE_BLOCK_ADDRESS_BITS) + +#define SP_PMEM_DEPTH (1< input_selector*/ +/* !! Changes here should be copied to systems/isp/isp_css/bin/conv_transmitter_cmd.tcl !! */ +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB888 0 // 36 'h24 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB555 1 // 33 'h +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB444 2 // 32 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB565 3 // 34 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB666 4 // 35 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW10 6 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW6 7 // 40 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW7 8 // 41 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW12 9 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW14 10 // 45 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8 11 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10 12 // 25 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_8 13 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_10 14 // 31 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_1 15 // 48 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8L 16 // 26 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_Emb 17 // 18 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_2 18 // 49 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_3 19 // 50 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_4 20 // 51 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_5 21 // 52 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_6 22 // 53 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_7 23 // 54 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_8 24 // 55 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8_CSPS 25 // 28 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10_CSPS 26 // 29 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW16 27 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18 28 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_2 29 // ? Option 2 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_3 30 // ? Option 3 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding + +/* definition for state machine of data FIFO for decode different type of data */ +#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV420_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_YUV420_8L_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB555_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB565_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 +#define _HRT_CSS_RECEIVER_2400_RGB888_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW6_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW7_REPEAT_PTN 7 +#define _HRT_CSS_RECEIVER_2400_RAW8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_RAW10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW14_REPEAT_PTN 7 + +#define _HRT_CSS_RECEIVER_2400_MAX_REPEAT_PTN _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_WIDTH 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_IDX 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_WIDTH 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_USD_BITS 4 /* bits per USD type */ + +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_EN_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_EN_IDX 8 + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_NO_COMP 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_6_10 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_7_10 2 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_8_10 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_6_12 4 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_7_12 5 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_8_12 6 + + +/* packet bit definition */ +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_IDX 32 +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_BITS 1 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_IDX 22 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_BITS 2 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_IDX 16 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_BITS 16 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_BITS 32 + + +/*************************************************************************************************/ +/* Custom Decoding */ +/* These Custom Defs are defined based on design-time config in "csi_be_pixel_formatter.chdl" !! */ +/*************************************************************************************************/ +#define BE_CUST_EN_IDX 0 /* 2bits */ +#define BE_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ +#define BE_CUST_EN_WIDTH 8 +#define BE_CUST_MODE_ALL 1 /* Enable Custom Decoding for all DATA IDs */ +#define BE_CUST_MODE_ONE 3 /* Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID */ + +/* Data State config = {get_bits(6bits), valid(1bit)} */ +#define BE_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ +#define BE_CUST_DATA_STATE_S1_IDX 7 /* 7bits */ +#define BE_CUST_DATA_STATE_S2_IDX 14 /* 7bits */ +#define BE_CUST_DATA_STATE_WIDTH 21 +#define BE_CUST_DATA_STATE_VALID_IDX 0 /* 1bits */ +#define BE_CUST_DATA_STATE_GETBITS_IDX 1 /* 6bits */ + +/* Pixel Extractor config */ +#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 /* 5bits */ +#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 5 /* 5bits */ +#define BE_CUST_PIX_EXT_PIX_MASK_IDX 10 /* 18bits */ +#define BE_CUST_PIX_EXT_PIX_EN_IDX 28 /* 1bits */ +#define BE_CUST_PIX_EXT_WIDTH 29 + +/* Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} */ +#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_WIDTH 16 +#define BE_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 /* Normal (NO less get_bits case) Valid - 1bits */ +#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 /* Normal (NO less get_bits case) EoP - 1bits */ +#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 /* Especial (less get_bits case) Valid - 1bits */ +#define BE_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 /* Especial (less get_bits case) EoP - 1bits */ + +#endif /* _mipi_backend_common_defs_h_ */ +#endif /* _css_receiver_2400_common_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_defs.h new file mode 100644 index 0000000000000..6f5b7d3d3715e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_defs.h @@ -0,0 +1,258 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _css_receiver_2400_defs_h_ +#define _css_receiver_2400_defs_h_ + +#include "css_receiver_2400_common_defs.h" + +#define CSS_RECEIVER_DATA_WIDTH 8 +#define CSS_RECEIVER_RX_TRIG 4 +#define CSS_RECEIVER_RF_WORD 32 +#define CSS_RECEIVER_IMG_PROC_RF_ADDR 10 +#define CSS_RECEIVER_CSI_RF_ADDR 4 +#define CSS_RECEIVER_DATA_OUT 12 +#define CSS_RECEIVER_CHN_NO 2 +#define CSS_RECEIVER_DWORD_CNT 11 +#define CSS_RECEIVER_FORMAT_TYP 5 +#define CSS_RECEIVER_HRESPONSE 2 +#define CSS_RECEIVER_STATE_WIDTH 3 +#define CSS_RECEIVER_FIFO_DAT 32 +#define CSS_RECEIVER_CNT_VAL 2 +#define CSS_RECEIVER_PRED10_VAL 10 +#define CSS_RECEIVER_PRED12_VAL 12 +#define CSS_RECEIVER_CNT_WIDTH 8 +#define CSS_RECEIVER_WORD_CNT 16 +#define CSS_RECEIVER_PIXEL_LEN 6 +#define CSS_RECEIVER_PIXEL_CNT 5 +#define CSS_RECEIVER_COMP_8_BIT 8 +#define CSS_RECEIVER_COMP_7_BIT 7 +#define CSS_RECEIVER_COMP_6_BIT 6 + +#define CSI_CONFIG_WIDTH 4 + +/* division of gen_short data, ch_id and fmt_type over streaming data interface */ +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB 0 +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB - 1) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB - 1) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH - 1) + +#define _HRT_CSS_RECEIVER_2400_REG_ALIGN 4 +#define _HRT_CSS_RECEIVER_2400_BYTES_PER_PKT 4 + +#define hrt_css_receiver_2400_4_lane_port_offset 0x100 +#define hrt_css_receiver_2400_1_lane_port_offset 0x200 +#define hrt_css_receiver_2400_2_lane_port_offset 0x300 +#define hrt_css_receiver_2400_backend_port_offset 0x100 + +#define _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX 0 +#define _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX 1 +#define _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX 2 +#define _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX 3 +#define _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX 4 +#define _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX 7 +#define _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX 8 +#define _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX 9 +#define _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX 10 +#define _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX 11 +#define _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX 12 +#define _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX 13 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX 14 +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX 15 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX 16 +#define _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX 17 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX 18 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX 19 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX 20 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX 21 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX 22 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX 23 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX 24 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX 25 +#define _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX 26 +#define _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX 27 +#define _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX 28 + +/* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */ +#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT 0 +#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT 1 +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT 2 +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT 3 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT 4 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT 5 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT 6 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT 7 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT 8 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT 9 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT 10 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT 11 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT 12 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT 13 +#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT 14 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT 15 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT 16 + +#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_CAUSE_ "Fifo Overrun" +#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_CAUSE_ "Reserved" +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_CAUSE_ "Sleep mode entry" +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_CAUSE_ "Sleep mode exit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_CAUSE_ "Error high speed SOT" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_CAUSE_ "Error high speed sync SOT" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_CAUSE_ "Error control" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_CAUSE_ "Error correction double bit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_CAUSE_ "Error correction single bit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_CAUSE_ "No error" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_CAUSE_ "Error cyclic redundancy check" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_CAUSE_ "Error id" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_CAUSE_ "Error frame sync" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_CAUSE_ "Error frame data" +#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_CAUSE_ "Data time-out" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_CAUSE_ "Error escape" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_CAUSE_ "Error line sync" + +/* Bits for CSI2_DEVICE_READY register */ +#define _HRT_CSS_RECEIVER_2400_CSI2_DEVICE_READY_IDX 0 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_INIT_TIME_OUT_ERR_IDX 2 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_OVER_RUN_ERR_IDX 3 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_SOT_SYNC_ERR_IDX 4 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_RECEIVE_DATA_TIME_OUT_ERR_IDX 5 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_ECC_TWO_BIT_ERR_IDX 6 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_DATA_ID_ERR_IDX 7 + + +/* Bits for CSI2_FUNC_PROG register */ +#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS 19 + +/* Bits for INIT_COUNT register */ +#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_IDX 0 +#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_BITS 16 + +/* Bits for COUNT registers */ +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_BITS 8 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_BITS 8 + +/* Bits for RAW116_18_DATAID register */ +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_BITS 6 + +/* Bits for COMP_FORMAT register, this selects the compression data format */ +#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS 8 +#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_IDX (_HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX + _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS) +#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_BITS 8 + +/* Bits for COMP_PREDICT register, this selects the predictor algorithm */ +#define _HRT_CSS_RECEIVER_2400_PREDICT_NO_COMP 0 +#define _HRT_CSS_RECEIVER_2400_PREDICT_1 1 +#define _HRT_CSS_RECEIVER_2400_PREDICT_2 2 + +/* Number of bits used for the delay registers */ +#define _HRT_CSS_RECEIVER_2400_DELAY_BITS 8 + +/* Bits for COMP_SCHEME register, this selects the compression scheme for a VC */ +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD1_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD2_BITS_IDX 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD3_BITS_IDX 10 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD4_BITS_IDX 15 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD5_BITS_IDX 20 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD6_BITS_IDX 25 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD7_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD8_BITS_IDX 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_BITS_BITS 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_BITS 3 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_IDX 3 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_BITS 2 + + +/* BITS for backend RAW16 and RAW 18 registers */ + +#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_BITS 2 +#define _HRT_CSS_RECEIVER_2400_RAW18_EN_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW18_EN_BITS 1 + +#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_BITS 2 +#define _HRT_CSS_RECEIVER_2400_RAW16_EN_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW16_EN_BITS 1 + +/* These hsync and vsync values are for HSS simulation only */ +#define _HRT_CSS_RECEIVER_2400_HSYNC_VAL (1<<16) +#define _HRT_CSS_RECEIVER_2400_VSYNC_VAL (1<<17) + +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_WIDTH 28 +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB 0 +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB + CSS_RECEIVER_DATA_OUT - 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB + CSS_RECEIVER_DATA_OUT - 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_EOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT + 1) + +// SH Backend Register IDs +#define _HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX 1 +#define _HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX 2 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX 4 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX 5 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX 7 +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX 8 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX 9 +#define _HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX 10 +#define _HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX 11 +#define _HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX 12 +#define _HRT_CSS_RECEIVER_2400_BE_CUST_EN_REG_IDX 13 +#define _HRT_CSS_RECEIVER_2400_BE_CUST_DATA_STATE_REG_IDX 14 /* Data State 0,1,2 config */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P0_REG_IDX 15 /* Pixel Extractor config for Data State 0 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P1_REG_IDX 16 /* Pixel Extractor config for Data State 0 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P2_REG_IDX 17 /* Pixel Extractor config for Data State 0 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P3_REG_IDX 18 /* Pixel Extractor config for Data State 0 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P0_REG_IDX 19 /* Pixel Extractor config for Data State 1 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P1_REG_IDX 20 /* Pixel Extractor config for Data State 1 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P2_REG_IDX 21 /* Pixel Extractor config for Data State 1 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P3_REG_IDX 22 /* Pixel Extractor config for Data State 1 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P0_REG_IDX 23 /* Pixel Extractor config for Data State 2 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P1_REG_IDX 24 /* Pixel Extractor config for Data State 2 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P2_REG_IDX 25 /* Pixel Extractor config for Data State 2 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P3_REG_IDX 26 /* Pixel Extractor config for Data State 2 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_VALID_EOP_REG_IDX 27 /* Pixel Valid & EoP config for Pix 0,1,2,3 */ + +#define _HRT_CSS_RECEIVER_2400_BE_NOF_REGISTERS 28 + +#define _HRT_CSS_RECEIVER_2400_BE_SRST_HE 0 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_RCF 1 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_PF 2 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_SM 3 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_PD 4 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_SD 5 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_OT 6 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_BC 7 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_WIDTH 8 + +#endif /* _css_receiver_2400_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/defs.h new file mode 100644 index 0000000000000..47505f41790c1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/defs.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_DEFS_H_ +#define _HRT_DEFS_H_ + +#ifndef HRTCAT +#define _HRTCAT(m, n) m##n +#define HRTCAT(m, n) _HRTCAT(m, n) +#endif + +#ifndef HRTSTR +#define _HRTSTR(x) #x +#define HRTSTR(x) _HRTSTR(x) +#endif + +#ifndef HRTMIN +#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef HRTMAX +#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) +#endif + +#endif /* _HRT_DEFS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h new file mode 100644 index 0000000000000..d184a8b313c91 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h @@ -0,0 +1,199 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _dma_v2_defs_h +#define _dma_v2_defs_h + +#define _DMA_V2_NUM_CHANNELS_ID MaxNumChannels +#define _DMA_V2_CONNECTIONS_ID Connections +#define _DMA_V2_DEV_ELEM_WIDTHS_ID DevElemWidths +#define _DMA_V2_DEV_FIFO_DEPTH_ID DevFifoDepth +#define _DMA_V2_DEV_FIFO_RD_LAT_ID DevFifoRdLat +#define _DMA_V2_DEV_FIFO_LAT_BYPASS_ID DevFifoRdLatBypass +#define _DMA_V2_DEV_NO_BURST_ID DevNoBurst +#define _DMA_V2_DEV_RD_ACCEPT_ID DevRdAccept +#define _DMA_V2_DEV_SRMD_ID DevSRMD +#define _DMA_V2_DEV_HAS_CRUN_ID CRunMasters +#define _DMA_V2_CTRL_ACK_FIFO_DEPTH_ID CtrlAckFifoDepth +#define _DMA_V2_CMD_FIFO_DEPTH_ID CommandFifoDepth +#define _DMA_V2_CMD_FIFO_RD_LAT_ID CommandFifoRdLat +#define _DMA_V2_CMD_FIFO_LAT_BYPASS_ID CommandFifoRdLatBypass +#define _DMA_V2_NO_PACK_ID has_no_pack + +#define _DMA_V2_REG_ALIGN 4 +#define _DMA_V2_REG_ADDR_BITS 2 + +/* Command word */ +#define _DMA_V2_CMD_IDX 0 +#define _DMA_V2_CMD_BITS 6 +#define _DMA_V2_CHANNEL_IDX (_DMA_V2_CMD_IDX + _DMA_V2_CMD_BITS) +#define _DMA_V2_CHANNEL_BITS 5 + +/* The command to set a parameter contains the PARAM field next */ +#define _DMA_V2_PARAM_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) +#define _DMA_V2_PARAM_BITS 4 + +/* Commands to read, write or init specific blocks contain these + three values */ +#define _DMA_V2_SPEC_DEV_A_XB_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) +#define _DMA_V2_SPEC_DEV_A_XB_BITS 8 +#define _DMA_V2_SPEC_DEV_B_XB_IDX (_DMA_V2_SPEC_DEV_A_XB_IDX + _DMA_V2_SPEC_DEV_A_XB_BITS) +#define _DMA_V2_SPEC_DEV_B_XB_BITS 8 +#define _DMA_V2_SPEC_YB_IDX (_DMA_V2_SPEC_DEV_B_XB_IDX + _DMA_V2_SPEC_DEV_B_XB_BITS) +#define _DMA_V2_SPEC_YB_BITS (32-_DMA_V2_SPEC_DEV_B_XB_BITS-_DMA_V2_SPEC_DEV_A_XB_BITS-_DMA_V2_CMD_BITS-_DMA_V2_CHANNEL_BITS) + +/* */ +#define _DMA_V2_CMD_CTRL_IDX 4 +#define _DMA_V2_CMD_CTRL_BITS 4 + +/* Packing setup word */ +#define _DMA_V2_CONNECTION_IDX 0 +#define _DMA_V2_CONNECTION_BITS 4 +#define _DMA_V2_EXTENSION_IDX (_DMA_V2_CONNECTION_IDX + _DMA_V2_CONNECTION_BITS) +#define _DMA_V2_EXTENSION_BITS 1 + +/* Elements packing word */ +#define _DMA_V2_ELEMENTS_IDX 0 +#define _DMA_V2_ELEMENTS_BITS 8 +#define _DMA_V2_LEFT_CROPPING_IDX (_DMA_V2_ELEMENTS_IDX + _DMA_V2_ELEMENTS_BITS) +#define _DMA_V2_LEFT_CROPPING_BITS 8 + +#define _DMA_V2_WIDTH_IDX 0 +#define _DMA_V2_WIDTH_BITS 16 + +#define _DMA_V2_HEIGHT_IDX 0 +#define _DMA_V2_HEIGHT_BITS 16 + +#define _DMA_V2_STRIDE_IDX 0 +#define _DMA_V2_STRIDE_BITS 32 + +/* Command IDs */ +#define _DMA_V2_MOVE_B2A_COMMAND 0 +#define _DMA_V2_MOVE_B2A_BLOCK_COMMAND 1 +#define _DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND 2 +#define _DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND 3 +#define _DMA_V2_MOVE_A2B_COMMAND 4 +#define _DMA_V2_MOVE_A2B_BLOCK_COMMAND 5 +#define _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND 6 +#define _DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND 7 +#define _DMA_V2_INIT_A_COMMAND 8 +#define _DMA_V2_INIT_A_BLOCK_COMMAND 9 +#define _DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND 10 +#define _DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND 11 +#define _DMA_V2_INIT_B_COMMAND 12 +#define _DMA_V2_INIT_B_BLOCK_COMMAND 13 +#define _DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND 14 +#define _DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND 15 +#define _DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_A_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_B_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_CONFIG_CHANNEL_COMMAND 32 +#define _DMA_V2_SET_CHANNEL_PARAM_COMMAND 33 +#define _DMA_V2_SET_CRUN_COMMAND 62 + +/* Channel Parameter IDs */ +#define _DMA_V2_PACKING_SETUP_PARAM 0 +#define _DMA_V2_STRIDE_A_PARAM 1 +#define _DMA_V2_ELEM_CROPPING_A_PARAM 2 +#define _DMA_V2_WIDTH_A_PARAM 3 +#define _DMA_V2_STRIDE_B_PARAM 4 +#define _DMA_V2_ELEM_CROPPING_B_PARAM 5 +#define _DMA_V2_WIDTH_B_PARAM 6 +#define _DMA_V2_HEIGHT_PARAM 7 +#define _DMA_V2_QUEUED_CMDS 8 + +/* Parameter Constants */ +#define _DMA_V2_ZERO_EXTEND 0 +#define _DMA_V2_SIGN_EXTEND 1 + + /* SLAVE address map */ +#define _DMA_V2_SEL_FSM_CMD 0 +#define _DMA_V2_SEL_CH_REG 1 +#define _DMA_V2_SEL_CONN_GROUP 2 +#define _DMA_V2_SEL_DEV_INTERF 3 + +#define _DMA_V2_ADDR_SEL_COMP_IDX 12 +#define _DMA_V2_ADDR_SEL_COMP_BITS 4 +#define _DMA_V2_ADDR_SEL_CH_REG_IDX 2 +#define _DMA_V2_ADDR_SEL_CH_REG_BITS 6 +#define _DMA_V2_ADDR_SEL_PARAM_IDX (_DMA_V2_ADDR_SEL_CH_REG_BITS+_DMA_V2_ADDR_SEL_CH_REG_IDX) +#define _DMA_V2_ADDR_SEL_PARAM_BITS 4 + +#define _DMA_V2_ADDR_SEL_GROUP_COMP_IDX 2 +#define _DMA_V2_ADDR_SEL_GROUP_COMP_BITS 6 +#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_IDX (_DMA_V2_ADDR_SEL_GROUP_COMP_BITS + _DMA_V2_ADDR_SEL_GROUP_COMP_IDX) +#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_BITS 4 + +#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX 2 +#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS 6 +#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_IDX (_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX+_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS) +#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_BITS 4 + +#define _DMA_V2_FSM_GROUP_CMD_IDX 0 +#define _DMA_V2_FSM_GROUP_ADDR_SRC_IDX 1 +#define _DMA_V2_FSM_GROUP_ADDR_DEST_IDX 2 +#define _DMA_V2_FSM_GROUP_CMD_CTRL_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_IDX 4 +#define _DMA_V2_FSM_GROUP_FSM_PACK_IDX 5 +#define _DMA_V2_FSM_GROUP_FSM_REQ_IDX 6 +#define _DMA_V2_FSM_GROUP_FSM_WR_IDX 7 + +#define _DMA_V2_FSM_GROUP_FSM_CTRL_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_XB_IDX 4 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_YB_IDX 5 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX 6 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX 7 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX 8 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX 9 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX 10 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX 11 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX 12 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX 13 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX 14 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX 15 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_CMD_CTRL_IDX 15 + +#define _DMA_V2_FSM_GROUP_FSM_PACK_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX 3 + +#define _DMA_V2_FSM_GROUP_FSM_REQ_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_XB_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_REQ_XB_REMAINING_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_BURST_IDX 4 + +#define _DMA_V2_FSM_GROUP_FSM_WR_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_XB_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_WR_XB_REMAINING_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_BURST_IDX 4 + +#define _DMA_V2_DEV_INTERF_REQ_SIDE_STATUS_IDX 0 +#define _DMA_V2_DEV_INTERF_SEND_SIDE_STATUS_IDX 1 +#define _DMA_V2_DEV_INTERF_FIFO_STATUS_IDX 2 +#define _DMA_V2_DEV_INTERF_REQ_ONLY_COMPLETE_BURST_IDX 3 +#define _DMA_V2_DEV_INTERF_MAX_BURST_IDX 4 +#define _DMA_V2_DEV_INTERF_CHK_ADDR_ALIGN 5 + +#endif /* _dma_v2_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h new file mode 100644 index 0000000000000..77722d2057010 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h @@ -0,0 +1,170 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef HRT_GDC_v2_defs_h_ +#define HRT_GDC_v2_defs_h_ + +#define HRT_GDC_IS_V2 + +#define HRT_GDC_N 1024 /* Top-level design constant, equal to the number of entries in the LUT */ +#define HRT_GDC_FRAC_BITS 10 /* Number of fractional bits in the GDC block, driven by the size of the LUT */ + +#define HRT_GDC_BLI_FRAC_BITS 4 /* Number of fractional bits for the bi-linear interpolation type */ +#define HRT_GDC_BLI_COEF_ONE (1 << HRT_GDC_BLI_FRAC_BITS) + +#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ +#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS-2)) /* We represent signed 10 bit coefficients. */ + /* The supported range is [-256, .., +256] */ + /* in 14-bit signed notation, */ + /* We need all ten bits (MSB must be zero). */ + /* -s is inserted to solve this issue, and */ + /* therefore "1" is equal to +256. */ +#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) + +#define HRT_GDC_LUT_BYTES (HRT_GDC_N*4*2) /* 1024 addresses, 4 coefficients per address, */ + /* 2 bytes per coefficient */ + +#define _HRT_GDC_REG_ALIGN 4 + + // 31 30 29 25 24 0 + // |-----|---|--------|------------------------| + // | CMD | C | Reg_ID | Value | + + + // There are just two commands possible for the GDC block: + // 1 - Configure reg + // 0 - Data token + + // C - Reserved bit + // Used in protocol to indicate whether it is C-run or other type of runs + // In case of C-run, this bit has a value of 1, for all the other runs, it is 0. + + // Reg_ID - Address of the register to be configured + + // Value - Value to store to the addressed register, maximum of 24 bits + + // Configure reg command is not followed by any other token. + // The address of the register and the data to be filled in is contained in the same token + + // When the first data token is received, it must be: + // 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, + // 2. P0'X (device configured in one of the tetragon modes) + // After the first data token is received, pre-defined number of tokens with the following meaning follow: + // 1. two tokens: SRC address ; DST address + // 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address + +#define HRT_GDC_CONFIG_CMD 1 +#define HRT_GDC_DATA_CMD 0 + + +#define HRT_GDC_CMD_POS 31 +#define HRT_GDC_CMD_BITS 1 +#define HRT_GDC_CRUN_POS 30 +#define HRT_GDC_REG_ID_POS 25 +#define HRT_GDC_REG_ID_BITS 5 +#define HRT_GDC_DATA_POS 0 +#define HRT_GDC_DATA_BITS 25 + +#define HRT_GDC_FRYIPXFRX_BITS 26 +#define HRT_GDC_P0X_BITS 23 + + +#define HRT_GDC_MAX_OXDIM (8192-64) +#define HRT_GDC_MAX_OYDIM 4095 +#define HRT_GDC_MAX_IXDIM (8192-64) +#define HRT_GDC_MAX_IYDIM 4095 +#define HRT_GDC_MAX_DS_FAC 16 +#define HRT_GDC_MAX_DX (HRT_GDC_MAX_DS_FAC*HRT_GDC_N - 1) +#define HRT_GDC_MAX_DY HRT_GDC_MAX_DX + + +/* GDC lookup tables entries are 10 bits values, but they're + stored 2 by 2 as 32 bit values, yielding 16 bits per entry. + A GDC lookup table contains 64 * 4 elements */ + +#define HRT_GDC_PERF_1_1_pix 0 +#define HRT_GDC_PERF_2_1_pix 1 +#define HRT_GDC_PERF_1_2_pix 2 +#define HRT_GDC_PERF_2_2_pix 3 + +#define HRT_GDC_NND_MODE 0 +#define HRT_GDC_BLI_MODE 1 +#define HRT_GDC_BCI_MODE 2 +#define HRT_GDC_LUT_MODE 3 + +#define HRT_GDC_SCAN_STB 0 +#define HRT_GDC_SCAN_STR 1 + +#define HRT_GDC_MODE_SCALING 0 +#define HRT_GDC_MODE_TETRAGON 1 + +#define HRT_GDC_LUT_COEFF_OFFSET 16 +#define HRT_GDC_FRY_BIT_OFFSET 16 +// FRYIPXFRX is the only register where we store two values in one field, +// to save one token in the scaling protocol. +// Like this, we have three tokens in the scaling protocol, +// Otherwise, we would have had four. +// The register bit-map is: +// 31 26 25 16 15 10 9 0 +// |------|----------|------|----------| +// | XXXX | FRY | IPX | FRX | + + +#define HRT_GDC_CE_FSM0_POS 0 +#define HRT_GDC_CE_FSM0_LEN 2 +#define HRT_GDC_CE_OPY_POS 2 +#define HRT_GDC_CE_OPY_LEN 14 +#define HRT_GDC_CE_OPX_POS 16 +#define HRT_GDC_CE_OPX_LEN 16 +// CHK_ENGINE register bit-map: +// 31 16 15 2 1 0 +// |----------------|-----------|----| +// | OPX | OPY |FSM0| +// However, for the time being at least, +// this implementation is meaningless in hss model, +// So, we just return 0 + + +#define HRT_GDC_CHK_ENGINE_IDX 0 +#define HRT_GDC_WOIX_IDX 1 +#define HRT_GDC_WOIY_IDX 2 +#define HRT_GDC_BPP_IDX 3 +#define HRT_GDC_FRYIPXFRX_IDX 4 +#define HRT_GDC_OXDIM_IDX 5 +#define HRT_GDC_OYDIM_IDX 6 +#define HRT_GDC_SRC_ADDR_IDX 7 +#define HRT_GDC_SRC_END_ADDR_IDX 8 +#define HRT_GDC_SRC_WRAP_ADDR_IDX 9 +#define HRT_GDC_SRC_STRIDE_IDX 10 +#define HRT_GDC_DST_ADDR_IDX 11 +#define HRT_GDC_DST_STRIDE_IDX 12 +#define HRT_GDC_DX_IDX 13 +#define HRT_GDC_DY_IDX 14 +#define HRT_GDC_P0X_IDX 15 +#define HRT_GDC_P0Y_IDX 16 +#define HRT_GDC_P1X_IDX 17 +#define HRT_GDC_P1Y_IDX 18 +#define HRT_GDC_P2X_IDX 19 +#define HRT_GDC_P2Y_IDX 20 +#define HRT_GDC_P3X_IDX 21 +#define HRT_GDC_P3Y_IDX 22 +#define HRT_GDC_PERF_POINT_IDX 23 // 1x1 ; 1x2 ; 2x1 ; 2x2 pixels per cc +#define HRT_GDC_INTERP_TYPE_IDX 24 // NND ; BLI ; BCI ; LUT +#define HRT_GDC_SCAN_IDX 25 // 0 = STB (Slide To Bottom) ; 1 = STR (Slide To Right) +#define HRT_GDC_PROC_MODE_IDX 26 // 0 = Scaling ; 1 = Tetragon + +#define HRT_GDC_LUT_IDX 32 + + +#endif /* HRT_GDC_v2_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gp_timer_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gp_timer_defs.h new file mode 100644 index 0000000000000..3082e2f5e0141 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gp_timer_defs.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _gp_timer_defs_h +#define _gp_timer_defs_h + +#define _HRT_GP_TIMER_REG_ALIGN 4 + +#define HIVE_GP_TIMER_RESET_REG_IDX 0 +#define HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX 1 +#define HIVE_GP_TIMER_ENABLE_REG_IDX(timer) (HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX + 1 + timer) +#define HIVE_GP_TIMER_VALUE_REG_IDX(timer,timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timers) + timer) +#define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer,timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers, timers) + timer) +#define HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer,timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timers, timers) + timer) +#define HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq,timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timers, timers) + irq) +#define HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irqs, timers) + irq) +#define HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs, timers, irqs) + irq) + +#define HIVE_GP_TIMER_COUNT_TYPE_HIGH 0 +#define HIVE_GP_TIMER_COUNT_TYPE_LOW 1 +#define HIVE_GP_TIMER_COUNT_TYPE_POSEDGE 2 +#define HIVE_GP_TIMER_COUNT_TYPE_NEGEDGE 3 +#define HIVE_GP_TIMER_COUNT_TYPES 4 + +#endif /* _gp_timer_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h new file mode 100644 index 0000000000000..a807d4c990414 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _gpio_block_defs_h_ +#define _gpio_block_defs_h_ + +#define _HRT_GPIO_BLOCK_REG_ALIGN 4 + +/* R/W registers */ +#define _gpio_block_reg_do_e 0 +#define _gpio_block_reg_do_select 1 +#define _gpio_block_reg_do_0 2 +#define _gpio_block_reg_do_1 3 +#define _gpio_block_reg_do_pwm_cnt_0 4 +#define _gpio_block_reg_do_pwm_cnt_1 5 +#define _gpio_block_reg_do_pwm_cnt_2 6 +#define _gpio_block_reg_do_pwm_cnt_3 7 +#define _gpio_block_reg_do_pwm_main_cnt 8 +#define _gpio_block_reg_do_pwm_enable 9 +#define _gpio_block_reg_di_debounce_sel 10 +#define _gpio_block_reg_di_debounce_cnt_0 11 +#define _gpio_block_reg_di_debounce_cnt_1 12 +#define _gpio_block_reg_di_debounce_cnt_2 13 +#define _gpio_block_reg_di_debounce_cnt_3 14 +#define _gpio_block_reg_di_active_level 15 + + +/* read-only registers */ +#define _gpio_block_reg_di 16 + +#endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_defs.h new file mode 100644 index 0000000000000..39584996092e5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_defs.h @@ -0,0 +1,416 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _hive_isp_css_defs_h__ +#define _hive_isp_css_defs_h__ + +#define HIVE_ISP_CSS_IS_2400B0_SYSTEM + +#define HIVE_ISP_CTRL_DATA_WIDTH 32 +#define HIVE_ISP_CTRL_ADDRESS_WIDTH 32 +#define HIVE_ISP_CTRL_MAX_BURST_SIZE 1 +#define HIVE_ISP_DDR_ADDRESS_WIDTH 36 + +#define HIVE_ISP_HOST_MAX_BURST_SIZE 8 /* host supports bursts in order to prevent repeating DDRAM accesses */ +#define HIVE_ISP_NUM_GPIO_PINS 12 + +/* This list of vector num_elems/elem_bits pairs is valid both in C as initializer + and in the DMA parameter list */ +#define HIVE_ISP_DDR_DMA_SPECS {{32, 8}, {16, 16}, {18, 14}, {25, 10}, {21, 12}} +#define HIVE_ISP_DDR_WORD_BITS 256 +#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS/8) +#define HIVE_ISP_DDR_BYTES (512 * 1024 * 1024) /* hss only */ +#define HIVE_ISP_DDR_BYTES_RTL (127 * 1024 * 1024) /* RTL only */ +#define HIVE_ISP_DDR_SMALL_BYTES (128 * 256 / 8) +#define HIVE_ISP_PAGE_SHIFT 12 +#define HIVE_ISP_PAGE_SIZE (1<_defs.h + */ +typedef enum hrt_isp_css_irq { + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID , + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID , + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID , + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID , + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID , + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID , + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID , + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID , + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID , + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID , + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID , + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID , + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID , + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID , + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID , + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID , + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID , + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID , + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID , + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID , +#ifdef _HIVE_ISP_CSS_2401_SYSTEM + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID , +#else + hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID , +#endif + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID , + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID , + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID , + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID , + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID , + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID , + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID , + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID , + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID , + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID , + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID , + /* this must (obviously) be the last on in the enum */ + hrt_isp_css_irq_num_irqs +} hrt_isp_css_irq_t; + +typedef enum hrt_isp_css_irq_status { + hrt_isp_css_irq_status_error, + hrt_isp_css_irq_status_more_irqs, + hrt_isp_css_irq_status_success +} hrt_isp_css_irq_status_t; + +#endif /* _HIVE_ISP_CSS_IRQ_TYPES_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h new file mode 100644 index 0000000000000..b4211a0c631a2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _hive_isp_css_streaming_to_mipi_types_hrt_h_ +#define _hive_isp_css_streaming_to_mipi_types_hrt_h_ + +#include + +#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS)-1) +#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS)-1) + +#define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) +#define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) + +#endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h new file mode 100644 index 0000000000000..58b0e6effbd06 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h @@ -0,0 +1,128 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_HIVE_TYPES_H +#define _HRT_HIVE_TYPES_H + +#include "version.h" +#include "defs.h" + +#ifndef HRTCAT3 +#define _HRTCAT3(m,n,o) m##n##o +#define HRTCAT3(m,n,o) _HRTCAT3(m,n,o) +#endif + +#ifndef HRTCAT4 +#define _HRTCAT4(m,n,o,p) m##n##o##p +#define HRTCAT4(m,n,o,p) _HRTCAT4(m,n,o,p) +#endif + +#ifndef HRTMIN +#define HRTMIN(a,b) (((a)<(b))?(a):(b)) +#endif + +#ifndef HRTMAX +#define HRTMAX(a,b) (((a)>(b))?(a):(b)) +#endif + +/* boolean data type */ +typedef unsigned int hive_bool; +#define hive_false 0 +#define hive_true 1 + +typedef char hive_int8; +typedef short hive_int16; +typedef int hive_int32; +typedef long long hive_int64; + +typedef unsigned char hive_uint8; +typedef unsigned short hive_uint16; +typedef unsigned int hive_uint32; +typedef unsigned long long hive_uint64; + +/* by default assume 32 bit master port (both data and address) */ +#ifndef HRT_DATA_WIDTH +#define HRT_DATA_WIDTH 32 +#endif +#ifndef HRT_ADDRESS_WIDTH +#define HRT_ADDRESS_WIDTH 32 +#endif + +#define HRT_DATA_BYTES (HRT_DATA_WIDTH/8) +#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH/8) + +#if HRT_DATA_WIDTH == 64 +typedef hive_uint64 hrt_data; +#elif HRT_DATA_WIDTH == 32 +typedef hive_uint32 hrt_data; +#else +#error data width not supported +#endif + +#if HRT_ADDRESS_WIDTH == 64 +typedef hive_uint64 hrt_address; +#elif HRT_ADDRESS_WIDTH == 32 +typedef hive_uint32 hrt_address; +#else +#error adddres width not supported +#endif + +/* The SP side representation of an HMM virtual address */ +typedef hive_uint32 hrt_vaddress; + +/* use 64 bit addresses in simulation, where possible */ +typedef hive_uint64 hive_sim_address; + +/* below is for csim, not for hrt, rename and move this elsewhere */ + +typedef unsigned int hive_uint; +typedef hive_uint32 hive_address; +typedef hive_address hive_slave_address; +typedef hive_address hive_mem_address; + +/* MMIO devices */ +typedef hive_uint hive_mmio_id; +typedef hive_mmio_id hive_slave_id; +typedef hive_mmio_id hive_port_id; +typedef hive_mmio_id hive_master_id; +typedef hive_mmio_id hive_mem_id; +typedef hive_mmio_id hive_dev_id; +typedef hive_mmio_id hive_fifo_id; + +typedef hive_uint hive_hier_id; +typedef hive_hier_id hive_device_id; +typedef hive_device_id hive_proc_id; +typedef hive_device_id hive_cell_id; +typedef hive_device_id hive_host_id; +typedef hive_device_id hive_bus_id; +typedef hive_device_id hive_bridge_id; +typedef hive_device_id hive_fifo_adapter_id; +typedef hive_device_id hive_custom_device_id; + +typedef hive_uint hive_slot_id; +typedef hive_uint hive_fu_id; +typedef hive_uint hive_reg_file_id; +typedef hive_uint hive_reg_id; + +/* Streaming devices */ +typedef hive_uint hive_outport_id; +typedef hive_uint hive_inport_id; + +typedef hive_uint hive_msink_id; + +/* HRT specific */ +typedef char* hive_program; +typedef char* hive_function; + +#endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/if_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/if_defs.h new file mode 100644 index 0000000000000..7d39e45796ae1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/if_defs.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IF_DEFS_H +#define _IF_DEFS_H + +#define HIVE_IF_FRAME_REQUEST 0xA000 +#define HIVE_IF_LINES_REQUEST 0xB000 +#define HIVE_IF_VECTORS_REQUEST 0xC000 + +#endif /* _IF_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h new file mode 100644 index 0000000000000..7766f78cd1230 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _if_subsystem_defs_h__ +#define _if_subsystem_defs_h__ + +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 0 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_1 1 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_2 2 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_3 3 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 +#define HIVE_IFMT_GP_REGS_SRST_IDX 9 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 + +#define HIVE_IFMT_GP_REGS_CH_ID_FMT_TYPE_IDX 11 + +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_BASE HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 + +/* order of the input bits for the ifmt irq controller */ +#define HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID 0 +#define HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID 1 +#define HIVE_IFMT_IRQ_IFT_SEC_BIT_ID 2 +#define HIVE_IFMT_IRQ_MEM_CPY_BIT_ID 3 +#define HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID 4 + +/* order of the input bits for the ifmt Soft reset register */ +#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_BIT_IDX 0 +#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_B_BIT_IDX 1 +#define HIVE_IFMT_GP_REGS_SRST_IFT_SEC_BIT_IDX 2 +#define HIVE_IFMT_GP_REGS_SRST_MEM_CPY_BIT_IDX 3 + +/* order of the input bits for the ifmt Soft reset register */ +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_BIT_IDX 0 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_B_BIT_IDX 1 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_SEC_BIT_IDX 2 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_MEM_CPY_BIT_IDX 3 + +#endif /* _if_subsystem_defs_h__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h new file mode 100644 index 0000000000000..87fbf82edb5bc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h @@ -0,0 +1,89 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_selector_defs_h +#define _input_selector_defs_h + +#ifndef HIVE_ISP_ISEL_SEL_BITS +#define HIVE_ISP_ISEL_SEL_BITS 2 +#endif + +#ifndef HIVE_ISP_CH_ID_BITS +#define HIVE_ISP_CH_ID_BITS 2 +#endif + +#ifndef HIVE_ISP_FMT_TYPE_BITS +#define HIVE_ISP_FMT_TYPE_BITS 5 +#endif + +/* gp_register register id's -- Outputs */ +#define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 +#define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 +#define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 +#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 + +#define HIVE_ISEL_GP_REGS_SOF_IDX 8 +#define HIVE_ISEL_GP_REGS_EOF_IDX 9 +#define HIVE_ISEL_GP_REGS_SOL_IDX 10 +#define HIVE_ISEL_GP_REGS_EOL_IDX 11 + +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 +#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 + +#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 +#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 +#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 +#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 +#define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 +#define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 +#define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 +#define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 +#define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 + + +#define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 +#define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 +#define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 +#define HIVE_ISEL_GP_REGS_SBAND_SEL_IDX 32 +#define HIVE_ISEL_GP_REGS_SYNC_SEL_IDX 33 +#define HIVE_ISEL_GP_REGS_SRST_IDX 37 + +#define HIVE_ISEL_GP_REGS_SRST_SYNCGEN_BIT 0 +#define HIVE_ISEL_GP_REGS_SRST_PRBS_BIT 1 +#define HIVE_ISEL_GP_REGS_SRST_TPG_BIT 2 +#define HIVE_ISEL_GP_REGS_SRST_FIFO_BIT 3 + +/* gp_register register id's -- Inputs */ +#define HIVE_ISEL_GP_REGS_SYNCGEN_HOR_CNT_IDX 34 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VER_CNT_IDX 35 +#define HIVE_ISEL_GP_REGS_SYNCGEN_FRAMES_CNT_IDX 36 + +/* irq sources isel irq controller */ +#define HIVE_ISEL_IRQ_SYNC_GEN_SOF_BIT_ID 0 +#define HIVE_ISEL_IRQ_SYNC_GEN_EOF_BIT_ID 1 +#define HIVE_ISEL_IRQ_SYNC_GEN_SOL_BIT_ID 2 +#define HIVE_ISEL_IRQ_SYNC_GEN_EOL_BIT_ID 3 +#define HIVE_ISEL_IRQ_NUM_IRQS 4 + +#endif /* _input_selector_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h new file mode 100644 index 0000000000000..20a13c4cdb562 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_switch_2400_defs_h +#define _input_switch_2400_defs_h + +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id)*2) + ((fmt_type)>=16)) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type)%16) * 2) + +#define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 +#define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 +#define HIVE_INPUT_SWITCH_SELECT_IF_SEC 2 +#define HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM 3 +#define HIVE_INPUT_SWITCH_VSELECT_NO_OUTPUT 0 +#define HIVE_INPUT_SWITCH_VSELECT_IF_PRIM 1 +#define HIVE_INPUT_SWITCH_VSELECT_IF_SEC 2 +#define HIVE_INPUT_SWITCH_VSELECT_STR_TO_MEM 4 + +#endif /* _input_switch_2400_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h new file mode 100644 index 0000000000000..a7f0ca80bc9be --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h @@ -0,0 +1,254 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_system_ctrl_defs_h +#define _input_system_ctrl_defs_h + +#define _INPUT_SYSTEM_CTRL_REG_ALIGN 4 /* assuming 32 bit control bus width */ + +/* --------------------------------------------------*/ + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +// Number of registers +#define ISYS_CTRL_NOF_REGS 23 + +// Register id's of MMIO slave accesible registers +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_ID 0 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_ID 1 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_ID 2 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID 3 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID 4 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID 5 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID 6 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID 7 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID 8 +#define ISYS_CTRL_ACQ_START_ADDR_REG_ID 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID 10 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID 11 +#define ISYS_CTRL_INIT_REG_ID 12 +#define ISYS_CTRL_LAST_COMMAND_REG_ID 13 +#define ISYS_CTRL_NEXT_COMMAND_REG_ID 14 +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID 15 +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID 16 +#define ISYS_CTRL_FSM_STATE_INFO_REG_ID 17 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID 18 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID 19 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 + + +/* register reset value */ +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 +#define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ISYS_CTRL_INIT_REG_RSTVAL 0 +#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 + +/* register width value */ +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ISYS_CTRL_INIT_REG_WIDTH 3 +#define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ +#define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ISYS_CTRL_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_WIDTH 1 + +/* bit definitions */ + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ + +/* +InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 +[7:4] - CaptPortId, + CaptA-'b0000 + CaptB-'b0001 + CaptC-'b0010 +[31:16] - NOF_frames +InpSysCaptFrameExt 2/0 [3:0] - 'b0001' +[7:4] - CaptPortId, + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + + 2/1 [31:0] - external capture address +InpSysAcqFrame 2/0 [3:0] - 'b0010, +[31:4] - NOF_ext_mem_words + 2/1 [31:0] - external memory read start address +InpSysOverruleON 1/0 [3:0] - 'b0011, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysOverruleOFF 1/0 [3:0] - 'b0100, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysOverruleCmd 2/0 [3:0] - 'b0101, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + + 2/1 [31:0] - command token value for port opid + + +acknowledge tokens: + +InpSysAckCFA 1/0 [3:0] - 'b0000 + [7:4] - CaptPortId, + CaptA-'b0000 + CaptB- 'b0001 + CaptC-'b0010 + [31:16] - NOF_frames +InpSysAckCFE 1/0 [3:0] - 'b0001' +[7:4] - CaptPortId, + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + +InpSysAckAF 1/0 [3:0] - 'b0010 +InpSysAckOverruleON 1/0 [3:0] - 'b0011, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysAckOverrule 2/0 [3:0] - 'b0101, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + + 2/1 [31:0] - acknowledge token value from port opid + + + +*/ + + +/* Command and acknowledge tokens IDs */ +#define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ +#define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ +#define ISYS_CTRL_ACQ_FRAME_TOKEN_ID 2 /* 0010b */ +#define ISYS_CTRL_OVERRULE_ON_TOKEN_ID 3 /* 0011b */ +#define ISYS_CTRL_OVERRULE_OFF_TOKEN_ID 4 /* 0100b */ +#define ISYS_CTRL_OVERRULE_TOKEN_ID 5 /* 0101b */ + +#define ISYS_CTRL_ACK_CFA_TOKEN_ID 0 +#define ISYS_CTRL_ACK_CFE_TOKEN_ID 1 +#define ISYS_CTRL_ACK_AF_TOKEN_ID 2 +#define ISYS_CTRL_ACK_OVERRULE_ON_TOKEN_ID 3 +#define ISYS_CTRL_ACK_OVERRULE_OFF_TOKEN_ID 4 +#define ISYS_CTRL_ACK_OVERRULE_TOKEN_ID 5 +#define ISYS_CTRL_ACK_DEVICE_ERROR_TOKEN_ID 6 + +#define ISYS_CTRL_TOKEN_ID_MSB 3 +#define ISYS_CTRL_TOKEN_ID_LSB 0 +#define ISYS_CTRL_PORT_ID_TOKEN_MSB 7 +#define ISYS_CTRL_PORT_ID_TOKEN_LSB 4 +#define ISYS_CTRL_NOF_CAPT_TOKEN_MSB 31 +#define ISYS_CTRL_NOF_CAPT_TOKEN_LSB 16 +#define ISYS_CTRL_NOF_EXT_TOKEN_MSB 31 +#define ISYS_CTRL_NOF_EXT_TOKEN_LSB 8 + +#define ISYS_CTRL_TOKEN_ID_IDX 0 +#define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) +#define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) +#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB +1) +#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB +#define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) +#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB +#define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) + +#define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ +#define ISYS_CTRL_PORT_ID_CAPT_B 1 /* device ID for capture unit B */ +#define ISYS_CTRL_PORT_ID_CAPT_C 2 /* device ID for capture unit C */ +#define ISYS_CTRL_PORT_ID_ACQUISITION 3 /* device ID for acquistion unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_A 4 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_B 5 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_C 6 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ + +#define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ +#define ISYS_CTRL_NO_DMA_ACK 0 +#define ISYS_CTRL_NO_CAPT_ACK 16 + +#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_defs.h new file mode 100644 index 0000000000000..ae62163034a66 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_defs.h @@ -0,0 +1,126 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_system_defs_h +#define _input_system_defs_h + +/* csi controller modes */ +#define HIVE_CSI_CONFIG_MAIN 0 +#define HIVE_CSI_CONFIG_STEREO1 4 +#define HIVE_CSI_CONFIG_STEREO2 8 + +/* general purpose register IDs */ + +/* Stream Multicast select modes */ +#define HIVE_ISYS_GPREG_MULTICAST_A_IDX 0 +#define HIVE_ISYS_GPREG_MULTICAST_B_IDX 1 +#define HIVE_ISYS_GPREG_MULTICAST_C_IDX 2 + +/* Stream Mux select modes */ +#define HIVE_ISYS_GPREG_MUX_IDX 3 + +/* streaming monitor status and control */ +#define HIVE_ISYS_GPREG_STRMON_STAT_IDX 4 +#define HIVE_ISYS_GPREG_STRMON_COND_IDX 5 +#define HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX 6 +#define HIVE_ISYS_GPREG_SRST_IDX 7 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_IDX 8 +#define HIVE_ISYS_GPREG_REG_PORT_A_IDX 9 +#define HIVE_ISYS_GPREG_REG_PORT_B_IDX 10 + +/* Bit numbers of the soft reset register */ +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_A_BIT 0 +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_B_BIT 1 +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_C_BIT 2 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_A_BIT 3 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_B_BIT 4 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_C_BIT 5 +#define HIVE_ISYS_GPREG_SRST_CAPT_A_BIT 6 +#define HIVE_ISYS_GPREG_SRST_CAPT_B_BIT 7 +#define HIVE_ISYS_GPREG_SRST_CAPT_C_BIT 8 +#define HIVE_ISYS_GPREG_SRST_ACQ_BIT 9 +/* For ISYS_CTRL 5bits are defined to allow soft-reset per sub-controller and top-ctrl */ +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_BIT 10 /*LSB for 5bit vector */ +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_A_BIT 10 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_B_BIT 11 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_C_BIT 12 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_ACQ_BIT 13 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_TOP_BIT 14 +/* -- */ +#define HIVE_ISYS_GPREG_SRST_STR_MUX_BIT 15 +#define HIVE_ISYS_GPREG_SRST_CIO2AHB_BIT 16 +#define HIVE_ISYS_GPREG_SRST_GEN_SHORT_FIFO_BIT 17 +#define HIVE_ISYS_GPREG_SRST_WIDE_BUS_BIT 18 // includes CIO conv +#define HIVE_ISYS_GPREG_SRST_DMA_BIT 19 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_A_BIT 20 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_B_BIT 21 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_C_BIT 22 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_ACQ_BIT 23 +#define HIVE_ISYS_GPREG_SRST_CSI_BE_OUT_BIT 24 + +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_A_BIT 0 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_B_BIT 1 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_C_BIT 2 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_ACQ_BIT 3 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_DMA_BIT 4 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_ISYS_CTRL_BIT 5 + +/* streaming monitor port id's */ +#define HIVE_ISYS_STR_MON_PORT_CAPA 0 +#define HIVE_ISYS_STR_MON_PORT_CAPB 1 +#define HIVE_ISYS_STR_MON_PORT_CAPC 2 +#define HIVE_ISYS_STR_MON_PORT_ACQ 3 +#define HIVE_ISYS_STR_MON_PORT_CSS_GENSH 4 +#define HIVE_ISYS_STR_MON_PORT_SF_GENSH 5 +#define HIVE_ISYS_STR_MON_PORT_SP2ISYS 6 +#define HIVE_ISYS_STR_MON_PORT_ISYS2SP 7 +#define HIVE_ISYS_STR_MON_PORT_PIXA 8 +#define HIVE_ISYS_STR_MON_PORT_PIXB 9 + +/* interrupt bit ID's */ +#define HIVE_ISYS_IRQ_CSI_SOF_BIT_ID 0 +#define HIVE_ISYS_IRQ_CSI_EOF_BIT_ID 1 +#define HIVE_ISYS_IRQ_CSI_SOL_BIT_ID 2 +#define HIVE_ISYS_IRQ_CSI_EOL_BIT_ID 3 +#define HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID 4 +#define HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID 5 +#define HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP 6 +#define HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP 7 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_A_UNDEF_PH 7*/ +#define HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP 8 +#define HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP 9 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_B_UNDEF_PH 10*/ +#define HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP 10 +#define HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP 11 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_C_UNDEF_PH 13*/ +#define HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH 12 +/*#define HIVE_ISYS_IRQ_ACQ_UNIT_UNDEF_PH 15*/ +#define HIVE_ISYS_IRQ_INP_CTRL_CAPA 13 +#define HIVE_ISYS_IRQ_INP_CTRL_CAPB 14 +#define HIVE_ISYS_IRQ_INP_CTRL_CAPC 15 +#define HIVE_ISYS_IRQ_CIO2AHB 16 +#define HIVE_ISYS_IRQ_DMA_BIT_ID 17 +#define HIVE_ISYS_IRQ_STREAM_MON_BIT_ID 18 +#define HIVE_ISYS_IRQ_NUM_BITS 19 + +/* DMA */ +#define HIVE_ISYS_DMA_CHANNEL 0 +#define HIVE_ISYS_DMA_IBUF_DDR_CONN 0 +#define HIVE_ISYS_DMA_HEIGHT 1 +#define HIVE_ISYS_DMA_ELEMS 1 /* both master buses of same width */ +#define HIVE_ISYS_DMA_STRIDE 0 /* no stride required as height is fixed to 1 */ +#define HIVE_ISYS_DMA_CROP 0 /* no cropping */ +#define HIVE_ISYS_DMA_EXTENSION 0 /* no extension as elem width is same on both side */ + +#endif /* _input_system_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h new file mode 100644 index 0000000000000..ec6dd4487158e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _irq_controller_defs_h +#define _irq_controller_defs_h + +#define _HRT_IRQ_CONTROLLER_EDGE_REG_IDX 0 +#define _HRT_IRQ_CONTROLLER_MASK_REG_IDX 1 +#define _HRT_IRQ_CONTROLLER_STATUS_REG_IDX 2 +#define _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX 3 +#define _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX 4 +#define _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX 5 +#define _HRT_IRQ_CONTROLLER_STR_OUT_ENABLE_REG_IDX 6 + +#define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 + +#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h new file mode 100644 index 0000000000000..669060d17c4fc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h @@ -0,0 +1,254 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Version */ +#define RTL_VERSION + +/* Cell name */ +#define ISP_CELL_TYPE isp2400_mamoiada +#define ISP_VMEM simd_vmem +#define _HRT_ISP_VMEM isp2400_mamoiada_simd_vmem + +/* instruction pipeline depth */ +#define ISP_BRANCHDELAY 5 + +/* bus */ +#define ISP_BUS_WIDTH 32 +#define ISP_BUS_ADDR_WIDTH 32 +#define ISP_BUS_BURST_SIZE 1 + +/* data-path */ +#define ISP_SCALAR_WIDTH 32 +#define ISP_SLICE_NELEMS 4 +#define ISP_VEC_NELEMS 64 +#define ISP_VEC_ELEMBITS 14 +#define ISP_VEC_ELEM8BITS 16 +#define ISP_CLONE_DATAPATH_IS_16 1 + +/* memories */ +#define ISP_DMEM_DEPTH 4096 +#define ISP_DMEM_BSEL_DOWNSAMPLE 8 +#define ISP_VMEM_DEPTH 3072 +#define ISP_VMEM_BSEL_DOWNSAMPLE 8 +#define ISP_VMEM_ELEMBITS 14 +#define ISP_VMEM_ELEM_PRECISION 14 +#define ISP_VMEM_IS_BAMEM 1 +#if ISP_VMEM_IS_BAMEM + #define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 + #define ISP_VMEM_BAMEM_LATENCY 5 + #define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 + #define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 + #define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 + #define ISP_VMEM_BAMEM_LININT 0 + #define ISP_VMEM_BAMEM_DAP_BITS 3 + #define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 + #define ISP_VMEM_BAMEM_PID_BITS 3 + #define ISP_VMEM_BAMEM_OFFSET_BITS 19 + #define ISP_VMEM_BAMEM_ADDRESS_BITS 25 + #define ISP_VMEM_BAMEM_RID_BITS 4 + #define ISP_VMEM_BAMEM_TRANSPOSITION 1 + #define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 + #define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 + #define ISP_VMEM_BAMEM_LUT_ELEMS 16 + #define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 + #define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 + #define ISP_VMEM_BAMEM_SMART_FETCH 1 + #define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 +#endif /* ISP_VMEM_IS_BAMEM */ +#define ISP_PMEM_DEPTH 2048 +#define ISP_PMEM_WIDTH 640 +#define ISP_VAMEM_ADDRESS_BITS 12 +#define ISP_VAMEM_ELEMBITS 12 +#define ISP_VAMEM_DEPTH 2048 +#define ISP_VAMEM_ALIGNMENT 2 +#define ISP_VA_ADDRESS_WIDTH 896 +#define ISP_VEC_VALSU_LATENCY ISP_VEC_NELEMS +#define ISP_HIST_ADDRESS_BITS 12 +#define ISP_HIST_ALIGNMENT 4 +#define ISP_HIST_COMP_IN_PREC 12 +#define ISP_HIST_DEPTH 1024 +#define ISP_HIST_WIDTH 24 +#define ISP_HIST_COMPONENTS 4 + +/* program counter */ +#define ISP_PC_WIDTH 13 + +/* Template switches */ +#define ISP_SHIELD_INPUT_DMEM 0 +#define ISP_SHIELD_OUTPUT_DMEM 1 +#define ISP_SHIELD_INPUT_VMEM 0 +#define ISP_SHIELD_OUTPUT_VMEM 0 +#define ISP_SHIELD_INPUT_PMEM 1 +#define ISP_SHIELD_OUTPUT_PMEM 1 +#define ISP_SHIELD_INPUT_HIST 1 +#define ISP_SHIELD_OUTPUT_HIST 1 +/* When LUT is select the shielding is always on */ +#define ISP_SHIELD_INPUT_VAMEM 1 +#define ISP_SHIELD_OUTPUT_VAMEM 1 + +#define ISP_HAS_IRQ 1 +#define ISP_HAS_SOFT_RESET 1 +#define ISP_HAS_VEC_DIV 0 +#define ISP_HAS_VFU_W_2O 1 +#define ISP_HAS_DEINT3 1 +#define ISP_HAS_LUT 1 +#define ISP_HAS_HIST 1 +#define ISP_HAS_VALSU 1 +#define ISP_HAS_3rdVALSU 1 +#define ISP_VRF1_HAS_2P 1 + +#define ISP_SRU_GUARDING 1 +#define ISP_VLSU_GUARDING 1 + +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 + +#define ISP_SPLIT_VMUL_VADD_IS 0 +#define ISP_RFSPLIT_FPGA 0 + +/* RSN or Bus pipelining */ +#define ISP_RSN_PIPE 1 +#define ISP_VSF_BUS_PIPE 0 + +/* extra slave port to vmem */ +#define ISP_IF_VMEM 0 +#define ISP_GDC_VMEM 0 + +/* Streaming ports */ +#define ISP_IF 1 +#define ISP_IF_B 1 +#define ISP_GDC 1 +#define ISP_SCL 1 +#define ISP_GPFIFO 1 +#define ISP_SP 1 + +/* Removing Issue Slot(s) */ +#define ISP_HAS_NOT_SIMD_IS2 0 +#define ISP_HAS_NOT_SIMD_IS3 0 +#define ISP_HAS_NOT_SIMD_IS4 0 +#define ISP_HAS_NOT_SIMD_IS4_VADD 0 +#define ISP_HAS_NOT_SIMD_IS5 0 +#define ISP_HAS_NOT_SIMD_IS6 0 +#define ISP_HAS_NOT_SIMD_IS7 0 +#define ISP_HAS_NOT_SIMD_IS8 0 + +/* ICache */ +#define ISP_ICACHE 1 +#define ISP_ICACHE_ONLY 0 +#define ISP_ICACHE_PREFETCH 1 +#define ISP_ICACHE_INDEX_BITS 8 +#define ISP_ICACHE_SET_BITS 5 +#define ISP_ICACHE_BLOCKS_PER_SET_BITS 1 + +/* Experimental Flags */ +#define ISP_EXP_1 0 +#define ISP_EXP_2 0 +#define ISP_EXP_3 0 +#define ISP_EXP_4 0 +#define ISP_EXP_5 0 +#define ISP_EXP_6 0 + +/* Derived values */ +#define ISP_LOG2_PMEM_WIDTH 10 +#define ISP_VEC_WIDTH 896 +#define ISP_SLICE_WIDTH 56 +#define ISP_VMEM_WIDTH 896 +#define ISP_VMEM_ALIGN 128 +#if ISP_VMEM_IS_BAMEM + #define ISP_VMEM_ALIGN_ELEM 2 +#endif /* ISP_VMEM_IS_BAMEM */ +#define ISP_SIMDLSU 1 +#define ISP_LSU_IMM_BITS 12 + +/* convenient shortcuts for software*/ +#define ISP_NWAY ISP_VEC_NELEMS +#define NBITS ISP_VEC_ELEMBITS + +#define _isp_ceil_div(a,b) (((a)+(b)-1)/(b)) + +#define ISP_VEC_ALIGN ISP_VMEM_ALIGN + +/* HRT specific vector support */ +#define isp2400_mamoiada_vector_alignment ISP_VEC_ALIGN +#define isp2400_mamoiada_vector_elem_bits ISP_VMEM_ELEMBITS +#define isp2400_mamoiada_vector_elem_precision ISP_VMEM_ELEM_PRECISION +#define isp2400_mamoiada_vector_num_elems ISP_VEC_NELEMS + +/* register file sizes */ +#define ISP_RF0_SIZE 64 +#define ISP_RF1_SIZE 16 +#define ISP_RF2_SIZE 64 +#define ISP_RF3_SIZE 4 +#define ISP_RF4_SIZE 64 +#define ISP_RF5_SIZE 16 +#define ISP_RF6_SIZE 16 +#define ISP_RF7_SIZE 16 +#define ISP_RF8_SIZE 16 +#define ISP_RF9_SIZE 16 +#define ISP_RF10_SIZE 16 +#define ISP_RF11_SIZE 16 +#define ISP_VRF1_SIZE 24 +#define ISP_VRF2_SIZE 24 +#define ISP_VRF3_SIZE 24 +#define ISP_VRF4_SIZE 24 +#define ISP_VRF5_SIZE 24 +#define ISP_VRF6_SIZE 24 +#define ISP_VRF7_SIZE 24 +#define ISP_VRF8_SIZE 24 +#define ISP_SRF1_SIZE 4 +#define ISP_SRF2_SIZE 64 +#define ISP_SRF3_SIZE 64 +#define ISP_SRF4_SIZE 32 +#define ISP_SRF5_SIZE 64 +#define ISP_FRF0_SIZE 16 +#define ISP_FRF1_SIZE 4 +#define ISP_FRF2_SIZE 16 +#define ISP_FRF3_SIZE 4 +#define ISP_FRF4_SIZE 4 +#define ISP_FRF5_SIZE 8 +#define ISP_FRF6_SIZE 4 +/* register file read latency */ +#define ISP_VRF1_READ_LAT 1 +#define ISP_VRF2_READ_LAT 1 +#define ISP_VRF3_READ_LAT 1 +#define ISP_VRF4_READ_LAT 1 +#define ISP_VRF5_READ_LAT 1 +#define ISP_VRF6_READ_LAT 1 +#define ISP_VRF7_READ_LAT 1 +#define ISP_VRF8_READ_LAT 1 +#define ISP_SRF1_READ_LAT 1 +#define ISP_SRF2_READ_LAT 1 +#define ISP_SRF3_READ_LAT 1 +#define ISP_SRF4_READ_LAT 1 +#define ISP_SRF5_READ_LAT 1 +#define ISP_SRF5_READ_LAT 1 +/* immediate sizes */ +#define ISP_IS1_IMM_BITS 14 +#define ISP_IS2_IMM_BITS 13 +#define ISP_IS3_IMM_BITS 14 +#define ISP_IS4_IMM_BITS 14 +#define ISP_IS5_IMM_BITS 9 +#define ISP_IS6_IMM_BITS 16 +#define ISP_IS7_IMM_BITS 9 +#define ISP_IS8_IMM_BITS 16 +#define ISP_IS9_IMM_BITS 11 +/* fifo depths */ +#define ISP_IF_FIFO_DEPTH 0 +#define ISP_IF_B_FIFO_DEPTH 0 +#define ISP_DMA_FIFO_DEPTH 0 +#define ISP_OF_FIFO_DEPTH 0 +#define ISP_GDC_FIFO_DEPTH 0 +#define ISP_SCL_FIFO_DEPTH 0 +#define ISP_GPFIFO_FIFO_DEPTH 0 +#define ISP_SP_FIFO_DEPTH 0 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h new file mode 100644 index 0000000000000..e00bc841d0f0d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp2400_support_h +#define _isp2400_support_h + +#ifndef ISP2400_VECTOR_TYPES +/* This typedef is to be able to include hive header files + in the host code which is useful in crun */ +typedef char *tmemvectors, *tmemvectoru, *tvector; +#endif + +#define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem1), addr, val) +#define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem2), addr, val) + +#define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) +#define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) + +#define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) +#define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) + +#if ISP_HAS_HIST + #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) + #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) +#endif + +#endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h new file mode 100644 index 0000000000000..5936207216271 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h @@ -0,0 +1,234 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp_acquisition_defs_h +#define _isp_acquisition_defs_h + +#define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ +#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 + +/* --------------------------------------------------*/ + +#define NOF_ACQ_IRQS 1 + +/* --------------------------------------------------*/ +/* FSM */ +/* --------------------------------------------------*/ +#define MEM2STREAM_FSM_STATE_BITS 2 +#define ACQ_SYNCHRONIZER_FSM_STATE_BITS 2 + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +#define NOF_ACQ_REGS 12 + +// Register id's of MMIO slave accesible registers +#define ACQ_START_ADDR_REG_ID 0 +#define ACQ_MEM_REGION_SIZE_REG_ID 1 +#define ACQ_NUM_MEM_REGIONS_REG_ID 2 +#define ACQ_INIT_REG_ID 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 +#define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 +#define ACQ_LAST_COMMAND_REG_ID 6 +#define ACQ_NEXT_COMMAND_REG_ID 7 +#define ACQ_LAST_ACKNOWLEDGE_REG_ID 8 +#define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 +#define ACQ_FSM_STATE_INFO_REG_ID 10 +#define ACQ_INT_CNTR_INFO_REG_ID 11 + +// Register width +#define ACQ_START_ADDR_REG_WIDTH 9 +#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ACQ_INIT_REG_WIDTH 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define ACQ_LAST_COMMAND_REG_WIDTH 32 +#define ACQ_NEXT_COMMAND_REG_WIDTH 32 +#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS *3)) +#define ACQ_INT_CNTR_INFO_REG_WIDTH 32 + +/* register reset value */ +#define ACQ_START_ADDR_REG_RSTVAL 0 +#define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ACQ_INIT_REG_RSTVAL 0 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 +#define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 +#define ACQ_LAST_COMMAND_REG_RSTVAL 0 +#define ACQ_NEXT_COMMAND_REG_RSTVAL 0 +#define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 +#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 + +/* bit definitions */ +#define ACQ_INIT_RST_REG_BIT 0 +#define ACQ_INIT_RESYNC_BIT 2 +#define ACQ_INIT_RST_IDX ACQ_INIT_RST_REG_BIT +#define ACQ_INIT_RST_BITS 1 +#define ACQ_INIT_RESYNC_IDX ACQ_INIT_RESYNC_BIT +#define ACQ_INIT_RESYNC_BITS 1 + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ +#define ACQ_TOKEN_ID_LSB 0 +#define ACQ_TOKEN_ID_MSB 3 +#define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 +#define ACQ_TOKEN_ID_IDX 0 +#define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH +#define ACQ_INIT_CMD_INIT_IDX 4 +#define ACQ_INIT_CMD_INIT_BITS 3 +#define ACQ_CMD_START_ADDR_IDX 4 +#define ACQ_CMD_START_ADDR_BITS 9 +#define ACQ_CMD_NOFWORDS_IDX 13 +#define ACQ_CMD_NOFWORDS_BITS 9 +#define ACQ_MEM_REGION_ID_IDX 22 +#define ACQ_MEM_REGION_ID_BITS 9 +#define ACQ_PACKET_LENGTH_TOKEN_MSB 21 +#define ACQ_PACKET_LENGTH_TOKEN_LSB 13 +#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 +#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_LSB 4 +#define ACQ_PACKET_CH_ID_TOKEN_MSB 11 +#define ACQ_PACKET_CH_ID_TOKEN_LSB 10 +#define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ +#define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ + + +/* Command tokens IDs */ +#define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b +#define ACQ_READ_REGION_TOKEN_ID 1 //0001b +#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b +#define ACQ_INIT_TOKEN_ID 8 //1000b + +/* Acknowledge token IDs */ +#define ACQ_READ_REGION_ACK_TOKEN_ID 0 //0000b +#define ACQ_END_OF_PACKET_TOKEN_ID 4 //0100b +#define ACQ_END_OF_REGION_TOKEN_ID 5 //0101b +#define ACQ_SOP_MISMATCH_TOKEN_ID 6 //0110b +#define ACQ_UNDEF_PH_TOKEN_ID 7 //0111b + +#define ACQ_TOKEN_MEMREGIONID_MSB 30 +#define ACQ_TOKEN_MEMREGIONID_LSB 22 +#define ACQ_TOKEN_NOFWORDS_MSB 21 +#define ACQ_TOKEN_NOFWORDS_LSB 13 +#define ACQ_TOKEN_STARTADDR_MSB 12 +#define ACQ_TOKEN_STARTADDR_LSB 4 + + +/* --------------------------------------------------*/ +/* MIPI */ +/* --------------------------------------------------*/ + +#define WORD_COUNT_WIDTH 16 +#define PKT_CODE_WIDTH 6 +#define CHN_NO_WIDTH 2 +#define ERROR_INFO_WIDTH 8 + +#define LONG_PKTCODE_MAX 63 +#define LONG_PKTCODE_MIN 16 +#define SHORT_PKTCODE_MAX 15 + +#define EOF_CODE 1 + +/* --------------------------------------------------*/ +/* Packet Info */ +/* --------------------------------------------------*/ +#define ACQ_START_OF_FRAME 0 +#define ACQ_END_OF_FRAME 1 +#define ACQ_START_OF_LINE 2 +#define ACQ_END_OF_LINE 3 +#define ACQ_LINE_PAYLOAD 4 +#define ACQ_GEN_SH_PKT 5 + + +/* bit definition */ +#define ACQ_PKT_TYPE_IDX 16 +#define ACQ_PKT_TYPE_BITS 6 +#define ACQ_PKT_SOP_IDX 32 +#define ACQ_WORD_CNT_IDX 0 +#define ACQ_WORD_CNT_BITS 16 +#define ACQ_PKT_INFO_IDX 16 +#define ACQ_PKT_INFO_BITS 8 +#define ACQ_HEADER_DATA_IDX 0 +#define ACQ_HEADER_DATA_BITS 16 +#define ACQ_ACK_TOKEN_ID_IDX ACQ_TOKEN_ID_IDX +#define ACQ_ACK_TOKEN_ID_BITS ACQ_TOKEN_ID_BITS +#define ACQ_ACK_NOFWORDS_IDX 13 +#define ACQ_ACK_NOFWORDS_BITS 9 +#define ACQ_ACK_PKT_LEN_IDX 4 +#define ACQ_ACK_PKT_LEN_BITS 16 + + +/* --------------------------------------------------*/ +/* Packet Data Type */ +/* --------------------------------------------------*/ + + +#define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ +#define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ +#define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ +#define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ +#define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ +#define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ +#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ +#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ +#define ACQ_SOL_DATA 2 /* 00 0010 line start */ +#define ACQ_EOL_DATA 3 /* 00 0011 line end */ +#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_RESERVED_DATA_TYPE_MIN 56 +#define ACQ_RESERVED_DATA_TYPE_MAX 63 +#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 +#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 +#define ACQ_YUV_RESERVED_DATA_TYPE 27 +#define ACQ_RGB_RESERVED_DATA_TYPE_MIN 37 +#define ACQ_RGB_RESERVED_DATA_TYPE_MAX 39 +#define ACQ_RAW_RESERVED_DATA_TYPE_MIN 46 +#define ACQ_RAW_RESERVED_DATA_TYPE_MAX 47 + +/* --------------------------------------------------*/ + +#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h new file mode 100644 index 0000000000000..0a249ce3e5897 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h @@ -0,0 +1,310 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp_capture_defs_h +#define _isp_capture_defs_h + +#define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ +#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ +#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM/8 ) +#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ +#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM + +//#define CAPT_RCV_ACK 1 +//#define CAPT_WRT_ACK 2 +//#define CAPT_IRQ_ACK 3 + +/* --------------------------------------------------*/ + +#define NOF_IRQS 2 + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +// Number of registers +#define CAPT_NOF_REGS 16 + +// Register id's of MMIO slave accesible registers +#define CAPT_START_MODE_REG_ID 0 +#define CAPT_START_ADDR_REG_ID 1 +#define CAPT_MEM_REGION_SIZE_REG_ID 2 +#define CAPT_NUM_MEM_REGIONS_REG_ID 3 +#define CAPT_INIT_REG_ID 4 +#define CAPT_START_REG_ID 5 +#define CAPT_STOP_REG_ID 6 + +#define CAPT_PACKET_LENGTH_REG_ID 7 +#define CAPT_RECEIVED_LENGTH_REG_ID 8 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 +#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 +#define CAPT_LAST_COMMAND_REG_ID 11 +#define CAPT_NEXT_COMMAND_REG_ID 12 +#define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 +#define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 +#define CAPT_FSM_STATE_INFO_REG_ID 15 + +// Register width +#define CAPT_START_MODE_REG_WIDTH 1 +#define CAPT_START_ADDR_REG_WIDTH 9 +#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 +#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 +#define CAPT_INIT_REG_WIDTH (18 + 4) + +#define CAPT_START_REG_WIDTH 1 +#define CAPT_STOP_REG_WIDTH 1 + +/* --------------------------------------------------*/ +/* FSM */ +/* --------------------------------------------------*/ +#define CAPT_WRITE2MEM_FSM_STATE_BITS 2 +#define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 + + +#define CAPT_PACKET_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define CAPT_LAST_COMMAND_REG_WIDTH 32 +/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ +#define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) + +#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 +#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 + +/* register reset value */ +#define CAPT_START_MODE_REG_RSTVAL 0 +#define CAPT_START_ADDR_REG_RSTVAL 0 +#define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 +#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define CAPT_INIT_REG_RSTVAL 0 + +#define CAPT_START_REG_RSTVAL 0 +#define CAPT_STOP_REG_RSTVAL 0 + +#define CAPT_PACKET_LENGTH_REG_RSTVAL 0 +#define CAPT_RECEIVED_LENGTH_REG_RSTVAL 0 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 +#define CAPT_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 +#define CAPT_LAST_COMMAND_REG_RSTVAL 0 +#define CAPT_NEXT_COMMAND_REG_RSTVAL 0 +#define CAPT_LAST_ACKNOWLEDGE_REG_RSTVAL 0 +#define CAPT_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define CAPT_FSM_STATE_INFO_REG_RSTVAL 0 + +/* bit definitions */ +#define CAPT_INIT_RST_REG_BIT 0 +#define CAPT_INIT_FLUSH_BIT 1 +#define CAPT_INIT_RESYNC_BIT 2 +#define CAPT_INIT_RESTART_BIT 3 +#define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 +#define CAPT_INIT_RESTART_MEM_ADDR_MSB 12 +#define CAPT_INIT_RESTART_MEM_REGION_LSB 13 +#define CAPT_INIT_RESTART_MEM_REGION_MSB 21 + + +#define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT +#define CAPT_INIT_RST_REG_BITS 1 +#define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT +#define CAPT_INIT_FLUSH_BITS 1 +#define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT +#define CAPT_INIT_RESYNC_BITS 1 +#define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT +#define CAPT_INIT_RESTART_BITS 1 +#define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB +#define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) +#define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB +#define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) + + + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ +#define CAPT_TOKEN_ID_LSB 0 +#define CAPT_TOKEN_ID_MSB 3 +#define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ + +/* Command tokens IDs */ +#define CAPT_START_TOKEN_ID 0 /* 0000b */ +#define CAPT_STOP_TOKEN_ID 1 /* 0001b */ +#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ +#define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ +#define CAPT_INIT_TOKEN_ID 8 /* 1000b */ + +#define CAPT_START_TOKEN_BIT 0 +#define CAPT_STOP_TOKEN_BIT 0 +#define CAPT_FREEZE_TOKEN_BIT 0 +#define CAPT_RESUME_TOKEN_BIT 0 +#define CAPT_INIT_TOKEN_BIT 0 + +/* Acknowledge token IDs */ +#define CAPT_END_OF_PACKET_RECEIVED_TOKEN_ID 0 /* 0000b */ +#define CAPT_END_OF_PACKET_WRITTEN_TOKEN_ID 1 /* 0001b */ +#define CAPT_END_OF_REGION_WRITTEN_TOKEN_ID 2 /* 0010b */ +#define CAPT_FLUSH_DONE_TOKEN_ID 3 /* 0011b */ +#define CAPT_PREMATURE_SOP_TOKEN_ID 4 /* 0100b */ +#define CAPT_MISSING_SOP_TOKEN_ID 5 /* 0101b */ +#define CAPT_UNDEF_PH_TOKEN_ID 6 /* 0110b */ +#define CAPT_STOP_ACK_TOKEN_ID 7 /* 0111b */ + +#define CAPT_PACKET_LENGTH_TOKEN_MSB 19 +#define CAPT_PACKET_LENGTH_TOKEN_LSB 4 +#define CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB 20 +#define CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB 4 +#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB 25 +#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 +#define CAPT_PACKET_CH_ID_TOKEN_MSB 27 +#define CAPT_PACKET_CH_ID_TOKEN_LSB 26 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 + +/* bit definition */ +#define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB +#define CAPT_CMD_BITS (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) +#define CAPT_SOP_IDX 32 +#define CAPT_SOP_BITS 1 +#define CAPT_PKT_INFO_IDX 16 +#define CAPT_PKT_INFO_BITS 8 +#define CAPT_PKT_TYPE_IDX 0 +#define CAPT_PKT_TYPE_BITS 6 +#define CAPT_HEADER_DATA_IDX 0 +#define CAPT_HEADER_DATA_BITS 16 +#define CAPT_PKT_DATA_IDX 0 +#define CAPT_PKT_DATA_BITS 32 +#define CAPT_WORD_CNT_IDX 0 +#define CAPT_WORD_CNT_BITS 16 +#define CAPT_ACK_TOKEN_ID_IDX 0 +#define CAPT_ACK_TOKEN_ID_BITS 4 +//#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB +//#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) +//#define CAPT_ACK_PKT_INFO_IDX 20 +//#define CAPT_ACK_PKT_INFO_BITS 8 +//#define CAPT_ACK_MEM_REG_ID1_IDX 20 /* for capt_end_of_packet_written */ +//#define CAPT_ACK_MEM_REG_ID2_IDX 4 /* for capt_end_of_region_written */ +#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB +#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) +#define CAPT_ACK_SUPER_PKT_LEN_IDX CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB +#define CAPT_ACK_SUPER_PKT_LEN_BITS (CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB - CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB + 1) +#define CAPT_ACK_PKT_INFO_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB +#define CAPT_ACK_PKT_INFO_BITS (CAPT_PACKET_CH_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) +#define CAPT_ACK_MEM_REGION_ID_IDX CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB +#define CAPT_ACK_MEM_REGION_ID_BITS (CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB - CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB + 1) +#define CAPT_ACK_PKT_TYPE_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB +#define CAPT_ACK_PKT_TYPE_BITS (CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) +#define CAPT_INIT_TOKEN_INIT_IDX 4 +#define CAPT_INIT_TOKEN_INIT_BITS 22 + + +/* --------------------------------------------------*/ +/* MIPI */ +/* --------------------------------------------------*/ + +#define CAPT_WORD_COUNT_WIDTH 16 +#define CAPT_PKT_CODE_WIDTH 6 +#define CAPT_CHN_NO_WIDTH 2 +#define CAPT_ERROR_INFO_WIDTH 8 + +#define LONG_PKTCODE_MAX 63 +#define LONG_PKTCODE_MIN 16 +#define SHORT_PKTCODE_MAX 15 + + +/* --------------------------------------------------*/ +/* Packet Info */ +/* --------------------------------------------------*/ +#define CAPT_START_OF_FRAME 0 +#define CAPT_END_OF_FRAME 1 +#define CAPT_START_OF_LINE 2 +#define CAPT_END_OF_LINE 3 +#define CAPT_LINE_PAYLOAD 4 +#define CAPT_GEN_SH_PKT 5 + + +/* --------------------------------------------------*/ +/* Packet Data Type */ +/* --------------------------------------------------*/ + +#define CAPT_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ +#define CAPT_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ +#define CAPT_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ +#define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ +#define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ +#define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ +#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ +#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ +#define CAPT_SOL_DATA 2 /* 00 0010 line start */ +#define CAPT_EOL_DATA 3 /* 00 0011 line end */ +#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_RESERVED_DATA_TYPE_MIN 56 +#define CAPT_RESERVED_DATA_TYPE_MAX 63 +#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 +#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 +#define CAPT_YUV_RESERVED_DATA_TYPE 27 +#define CAPT_RGB_RESERVED_DATA_TYPE_MIN 37 +#define CAPT_RGB_RESERVED_DATA_TYPE_MAX 39 +#define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 +#define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 + + +/* --------------------------------------------------*/ +/* Capture Unit State */ +/* --------------------------------------------------*/ +#define CAPT_FREE_RUN 0 +#define CAPT_NO_SYNC 1 +#define CAPT_SYNC_SWP 2 +#define CAPT_SYNC_MWP 3 +#define CAPT_SYNC_WAIT 4 +#define CAPT_FREEZE 5 +#define CAPT_RUN 6 + + +/* --------------------------------------------------*/ + +#endif /* _isp_capture_defs_h */ + + + + + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/mmu_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/mmu_defs.h new file mode 100644 index 0000000000000..c038f39ffd25e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/mmu_defs.h @@ -0,0 +1,23 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _mmu_defs_h +#define _mmu_defs_h + +#define _HRT_MMU_INVALIDATE_TLB_REG_IDX 0 +#define _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX 1 + +#define _HRT_MMU_REG_ALIGN 4 + +#endif /* _mmu_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/scalar_processor_2400_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/scalar_processor_2400_params.h new file mode 100644 index 0000000000000..9b6c2893d9507 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/scalar_processor_2400_params.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _scalar_processor_2400_params_h +#define _scalar_processor_2400_params_h + +#include "cell_params.h" + +#endif /* _scalar_processor_2400_params_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/str2mem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/str2mem_defs.h new file mode 100644 index 0000000000000..1cb62444cf68b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/str2mem_defs.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _ST2MEM_DEFS_H +#define _ST2MEM_DEFS_H + +#define _STR2MEM_CRUN_BIT 0x100000 +#define _STR2MEM_CMD_BITS 0x0F0000 +#define _STR2MEM_COUNT_BITS 0x00FFFF + +#define _STR2MEM_BLOCKS_CMD 0xA0000 +#define _STR2MEM_PACKETS_CMD 0xB0000 +#define _STR2MEM_BYTES_CMD 0xC0000 +#define _STR2MEM_BYTES_FROM_PACKET_CMD 0xD0000 + +#define _STR2MEM_SOFT_RESET_REG_ID 0 +#define _STR2MEM_INPUT_ENDIANNESS_REG_ID 1 +#define _STR2MEM_OUTPUT_ENDIANNESS_REG_ID 2 +#define _STR2MEM_BIT_SWAPPING_REG_ID 3 +#define _STR2MEM_BLOCK_SYNC_LEVEL_REG_ID 4 +#define _STR2MEM_PACKET_SYNC_LEVEL_REG_ID 5 +#define _STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID 6 +#define _STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID 7 +#define _STR2MEM_EN_STAT_UPDATE_ID 8 + +#define _STR2MEM_REG_ALIGN 4 + +#endif /* _ST2MEM_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/streaming_to_mipi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/streaming_to_mipi_defs.h new file mode 100644 index 0000000000000..60143b8743a2d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/streaming_to_mipi_defs.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _streaming_to_mipi_defs_h +#define _streaming_to_mipi_defs_h + +#define HIVE_STR_TO_MIPI_VALID_A_BIT 0 +#define HIVE_STR_TO_MIPI_VALID_B_BIT 1 +#define HIVE_STR_TO_MIPI_SOL_BIT 2 +#define HIVE_STR_TO_MIPI_EOL_BIT 3 +#define HIVE_STR_TO_MIPI_SOF_BIT 4 +#define HIVE_STR_TO_MIPI_EOF_BIT 5 +#define HIVE_STR_TO_MIPI_CH_ID_LSB 6 + +#define HIVE_STR_TO_MIPI_DATA_A_LSB (HIVE_STR_TO_MIPI_VALID_B_BIT + 1) + +#endif /* _streaming_to_mipi_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h new file mode 100644 index 0000000000000..d2b8972b0d9ec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _timed_controller_defs_h +#define _timed_controller_defs_h + +#define _HRT_TIMED_CONTROLLER_CMD_REG_IDX 0 + +#define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 + +#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h new file mode 100644 index 0000000000000..5bc0ad34616e6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h @@ -0,0 +1,74 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_VAR_H +#define _HRT_VAR_H + +#include "version.h" +#include "system_api.h" +#include "hive_types.h" + +#define hrt_int_type_of_char char +#define hrt_int_type_of_uchar unsigned char +#define hrt_int_type_of_short short +#define hrt_int_type_of_ushort unsigned short +#define hrt_int_type_of_int int +#define hrt_int_type_of_uint unsigned int +#define hrt_int_type_of_long long +#define hrt_int_type_of_ulong unsigned long +#define hrt_int_type_of_ptr unsigned int + +#define hrt_host_type_of_char char +#define hrt_host_type_of_uchar unsigned char +#define hrt_host_type_of_short short +#define hrt_host_type_of_ushort unsigned short +#define hrt_host_type_of_int int +#define hrt_host_type_of_uint unsigned int +#define hrt_host_type_of_long long +#define hrt_host_type_of_ulong unsigned long +#define hrt_host_type_of_ptr void* + +#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type)/8) +#define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) +#define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) + +#define hrt_scalar_store(cell, type, var, data) \ + HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + cell, \ + HRTCAT(HIVE_MEM_,var), \ + HRTCAT(HIVE_ADDR_,var), \ + (HRT_INT_TYPE(type))(data)) + +#define hrt_scalar_load(cell, type, var) \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + cell, \ + HRTCAT(HIVE_MEM_,var), \ + HRTCAT(HIVE_ADDR_,var))) + +#define hrt_indexed_store(cell, type, array, index, data) \ + HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + cell, \ + HRTCAT(HIVE_MEM_,array), \ + (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)), \ + (HRT_INT_TYPE(type))(data)) + +#define hrt_indexed_load(cell, type, array, index) \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + cell, \ + HRTCAT(HIVE_MEM_,array), \ + (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)))) + +#endif /* _HRT_VAR_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/version.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/version.h new file mode 100644 index 0000000000000..bbc4948baea9b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/version.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef HRT_VERSION_H +#define HRT_VERSION_H +#define HRT_VERSION_MAJOR 1 +#define HRT_VERSION_MINOR 4 +#define HRT_VERSION 1_4 +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c new file mode 100644 index 0000000000000..ddc7a8f051536 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c @@ -0,0 +1,3634 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _sp_map_h_ +#define _sp_map_h_ + + +#ifndef _hrt_dummy_use_blob_sp +#define _hrt_dummy_use_blob_sp() +#endif + +#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) + +#ifndef ISP2401 +/* function input_system_acquisition_stop: ADE */ +#else +/* function input_system_acquisition_stop: AD8 */ +#endif + +#ifndef ISP2401 +/* function longjmp: 684E */ +#else +/* function longjmp: 69C1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_HIVE_IF_SRST_MASK +#define HIVE_MEM_HIVE_IF_SRST_MASK scalar_processor_2400_dmem +#define HIVE_ADDR_HIVE_IF_SRST_MASK 0x1C8 +#define HIVE_SIZE_HIVE_IF_SRST_MASK 16 +#else +#endif +#endif +#define HIVE_MEM_sp_HIVE_IF_SRST_MASK scalar_processor_2400_dmem +#define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 +#define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 + +#ifndef ISP2401 +/* function tmpmem_init_dmem: 6580 */ +#else +/* function tmpmem_init_dmem: 66BB */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_receive_ack: 5EC4 */ +#else +/* function ia_css_isys_sp_token_map_receive_ack: 5FFF */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_addr_B: 332C */ +#else +/* function ia_css_dmaproxy_sp_set_addr_B: 3520 */ + +/* function ia_css_pipe_data_init_tagger_resources: A4F */ +#endif + +/* function debug_buffer_set_ddr_addr: DD */ + +#ifndef ISP2401 +/* function receiver_port_reg_load: AC2 */ +#else +/* function receiver_port_reg_load: ABC */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_mipi +#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_mipi 0x631C +#else +#define HIVE_ADDR_vbuf_mipi 0x6378 +#endif +#define HIVE_SIZE_vbuf_mipi 12 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_mipi 0x631C +#else +#define HIVE_ADDR_sp_vbuf_mipi 0x6378 +#endif +#define HIVE_SIZE_sp_vbuf_mipi 12 + +#ifndef ISP2401 +/* function ia_css_event_sp_decode: 351D */ +#else +/* function ia_css_event_sp_decode: 3711 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_get_size: 48A5 */ +#else +/* function ia_css_queue_get_size: 4B2D */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_load: 4EE6 */ +#else +/* function ia_css_queue_load: 5144 */ +#endif + +#ifndef ISP2401 +/* function setjmp: 6857 */ +#else +/* function setjmp: 69CA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue +#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x4684 +#else +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x46CC +#endif +#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x4684 +#else +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x46CC +#endif +#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_wait_for_ack: 6E07 */ +#else +/* function ia_css_dmaproxy_sp_wait_for_ack: 6F4B */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_func: 510B */ +#else +/* function ia_css_sp_rawcopy_func: 5369 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_marked: 29F7 */ +#else +/* function ia_css_tagger_buf_sp_pop_marked: 2B99 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_stage +#define HIVE_MEM_isp_stage scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_stage 0x5C00 +#else +#define HIVE_ADDR_isp_stage 0x5C60 +#endif +#define HIVE_SIZE_isp_stage 832 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_stage 0x5C00 +#else +#define HIVE_ADDR_sp_isp_stage 0x5C60 +#endif +#define HIVE_SIZE_sp_isp_stage 832 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_raw +#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_raw 0x2F4 +#else +#define HIVE_ADDR_vbuf_raw 0x30C +#endif +#define HIVE_SIZE_vbuf_raw 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_raw 0x2F4 +#else +#define HIVE_ADDR_sp_vbuf_raw 0x30C +#endif +#define HIVE_SIZE_sp_vbuf_raw 4 + +#ifndef ISP2401 +/* function ia_css_sp_bin_copy_func: 5032 */ +#else +/* function ia_css_sp_bin_copy_func: 5290 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_item_store: 4C34 */ +#else +/* function ia_css_queue_item_store: 4E92 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 + +/* function sp_start_isp: 45D */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_binary_group +#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_binary_group 0x5FF0 +#else +#define HIVE_ADDR_sp_binary_group 0x6050 +#endif +#define HIVE_SIZE_sp_binary_group 32 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_binary_group 0x5FF0 +#else +#define HIVE_ADDR_sp_sp_binary_group 0x6050 +#endif +#define HIVE_SIZE_sp_sp_binary_group 32 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_sw_state +#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sw_state 0x62AC +#else +#define HIVE_ADDR_sp_sw_state 0x6308 +#endif +#define HIVE_SIZE_sp_sw_state 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_sw_state 0x62AC +#else +#define HIVE_ADDR_sp_sp_sw_state 0x6308 +#endif +#define HIVE_SIZE_sp_sp_sw_state 4 + +#ifndef ISP2401 +/* function ia_css_thread_sp_main: D5B */ +#else +/* function ia_css_thread_sp_main: D50 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_internal_buffers: 3723 */ +#else +/* function ia_css_ispctrl_sp_init_internal_buffers: 3952 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_psys_event_queue_handle +#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4B54 +#else +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4BB0 +#endif +#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4B54 +#else +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4BB0 +#endif +#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue +#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x4698 +#else +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x46E0 +#endif +#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x4698 +#else +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x46E0 +#endif +#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 + +#ifndef ISP2401 +/* function ia_css_tagger_sp_propagate_frame: 2410 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_stop_copy_preview +#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem +#define HIVE_ADDR_sp_stop_copy_preview 0x6290 +#define HIVE_SIZE_sp_stop_copy_preview 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_stop_copy_preview 0x6290 +#define HIVE_SIZE_sp_sp_stop_copy_preview 4 +#else +/* function ia_css_tagger_sp_propagate_frame: 2460 */ +#endif + +#ifndef ISP2401 +/* function input_system_reg_load: B17 */ +#else +/* function input_system_reg_load: B11 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_handles +#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_handles 0x6328 +#else +#define HIVE_ADDR_vbuf_handles 0x6384 +#endif +#define HIVE_SIZE_vbuf_handles 960 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_handles 0x6328 +#else +#define HIVE_ADDR_sp_vbuf_handles 0x6384 +#endif +#define HIVE_SIZE_sp_vbuf_handles 960 + +#ifndef ISP2401 +/* function ia_css_queue_store: 4D9A */ + +/* function ia_css_sp_flash_register: 2C2C */ +#else +/* function ia_css_queue_store: 4FF8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_dummy_function: 5652 */ +#else +/* function ia_css_sp_flash_register: 2DCE */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_create: 5B37 */ +#else +/* function ia_css_isys_sp_backend_create: 5C72 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_init: 1833 */ +#else +/* function ia_css_pipeline_sp_init: 186D */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_configure: 2300 */ +#else +/* function ia_css_tagger_sp_configure: 2350 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_end_binary: 3566 */ +#else +/* function ia_css_ispctrl_sp_end_binary: 375A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs +#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 +#else +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#endif +#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 + +#ifndef ISP2401 +/* function receiver_port_reg_store: AC9 */ +#else +/* function receiver_port_reg_store: AC3 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_is_pending_mask +#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem +#define HIVE_ADDR_event_is_pending_mask 0x5C +#define HIVE_SIZE_event_is_pending_mask 44 +#else +#endif +#endif +#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem +#define HIVE_ADDR_sp_event_is_pending_mask 0x5C +#define HIVE_SIZE_sp_event_is_pending_mask 44 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cb_elems_frame +#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cb_elems_frame 0x46AC +#else +#define HIVE_ADDR_sp_all_cb_elems_frame 0x46F4 +#endif +#define HIVE_SIZE_sp_all_cb_elems_frame 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46AC +#else +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46F4 +#endif +#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_isys_event_queue_handle +#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4B74 +#else +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4BD0 +#endif +#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4B74 +#else +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4BD0 +#endif +#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host_sp_com +#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host_sp_com 0x4114 +#else +#define HIVE_ADDR_host_sp_com 0x4134 +#endif +#define HIVE_SIZE_host_sp_com 220 +#else +#endif +#endif +#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host_sp_com 0x4114 +#else +#define HIVE_ADDR_sp_host_sp_com 0x4134 +#endif +#define HIVE_SIZE_sp_host_sp_com 220 + +#ifndef ISP2401 +/* function ia_css_queue_get_free_space: 49F9 */ +#else +/* function ia_css_queue_get_free_space: 4C57 */ +#endif + +#ifndef ISP2401 +/* function exec_image_pipe: 6C4 */ +#else +/* function exec_image_pipe: 658 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_init_dmem_data +#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_init_dmem_data 0x62B0 +#else +#define HIVE_ADDR_sp_init_dmem_data 0x630C +#endif +#define HIVE_SIZE_sp_init_dmem_data 24 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_init_dmem_data 0x62B0 +#else +#define HIVE_ADDR_sp_sp_init_dmem_data 0x630C +#endif +#define HIVE_SIZE_sp_sp_init_dmem_data 24 + +#ifndef ISP2401 +/* function ia_css_sp_metadata_start: 5914 */ +#else +/* function ia_css_sp_metadata_start: 5A4F */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_init_buffer_queues: 2C9B */ +#else +/* function ia_css_bufq_sp_init_buffer_queues: 2E3D */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_stop: 1816 */ +#else +/* function ia_css_pipeline_sp_stop: 1850 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_connect_pipes: 27EA */ +#else +/* function ia_css_tagger_sp_connect_pipes: 283A */ +#endif + +#ifndef ISP2401 +/* function sp_isys_copy_wait: 70D */ +#else +/* function sp_isys_copy_wait: 6A1 */ +#endif + +/* function is_isp_debug_buffer_full: 337 */ + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 32AF */ +#else +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3490 */ +#endif + +#ifndef ISP2401 +/* function encode_and_post_timer_event: A30 */ +#else +/* function encode_and_post_timer_event: 9C4 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_per_frame_data +#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_per_frame_data 0x41F0 +#else +#define HIVE_ADDR_sp_per_frame_data 0x4210 +#endif +#define HIVE_SIZE_sp_per_frame_data 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_per_frame_data 0x41F0 +#else +#define HIVE_ADDR_sp_sp_per_frame_data 0x4210 +#endif +#define HIVE_SIZE_sp_sp_per_frame_data 4 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_vbuf_dequeue: 62D4 */ +#else +/* function ia_css_rmgr_sp_vbuf_dequeue: 640F */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_psys_event_queue_handle +#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4B80 +#else +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4BDC +#endif +#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4B80 +#else +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4BDC +#endif +#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_xmem_bin_addr +#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_xmem_bin_addr 0x41F4 +#else +#define HIVE_ADDR_xmem_bin_addr 0x4214 +#endif +#define HIVE_SIZE_xmem_bin_addr 4 +#else +#endif +#endif +#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_xmem_bin_addr 0x41F4 +#else +#define HIVE_ADDR_sp_xmem_bin_addr 0x4214 +#endif +#define HIVE_SIZE_sp_xmem_bin_addr 4 + +#ifndef ISP2401 +/* function tmr_clock_init: 65A0 */ +#else +/* function tmr_clock_init: 66DB */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_run: 1403 */ +#else +/* function ia_css_pipeline_sp_run: 1424 */ +#endif + +#ifndef ISP2401 +/* function memcpy: 68F7 */ +#else +/* function memcpy: 6A6A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GP_DEVICE_BASE +#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_GP_DEVICE_BASE 0x2FC +#else +#define HIVE_ADDR_GP_DEVICE_BASE 0x314 +#endif +#define HIVE_SIZE_GP_DEVICE_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x2FC +#else +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x314 +#endif +#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue +#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E0 +#else +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E4 +#endif +#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E0 +#else +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E4 +#endif +#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 + +#ifndef ISP2401 +/* function input_system_reg_store: B1E */ +#else +/* function input_system_reg_store: B18 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_start: 5D4D */ +#else +/* function ia_css_isys_sp_frontend_start: 5E88 */ +#endif + +#ifndef ISP2401 +/* function ia_css_uds_sp_scale_params: 6600 */ +#else +/* function ia_css_uds_sp_scale_params: 6773 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_increase_size: E40 */ +#else +/* function ia_css_circbuf_increase_size: E35 */ +#endif + +#ifndef ISP2401 +/* function __divu: 6875 */ +#else +/* function __divu: 69E8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_get_state: C83 */ +#else +/* function ia_css_thread_sp_get_state: C78 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_cont_capt_stop +#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_cont_capt_stop 0x46BC +#else +#define HIVE_ADDR_sem_for_cont_capt_stop 0x4704 +#endif +#define HIVE_SIZE_sem_for_cont_capt_stop 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x46BC +#else +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x4704 +#endif +#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 + +#ifndef ISP2401 +/* function thread_fiber_sp_main: E39 */ +#else +/* function thread_fiber_sp_main: E2E */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_pipe_thread +#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_pipe_thread 0x4800 +#define HIVE_SIZE_sp_isp_pipe_thread 340 +#else +#define HIVE_ADDR_sp_isp_pipe_thread 0x4848 +#define HIVE_SIZE_sp_isp_pipe_thread 360 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4800 +#define HIVE_SIZE_sp_sp_isp_pipe_thread 340 +#else +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4848 +#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_handle_parameter_sets: 128A */ +#else +/* function ia_css_parambuf_sp_handle_parameter_sets: 127F */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_set_state: 5943 */ +#else +/* function ia_css_spctrl_sp_set_state: 5A7E */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_signal: 6AF7 */ +#else +/* function ia_css_thread_sem_sp_signal: 6C6C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_IRQ_BASE +#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_IRQ_BASE 0x2C +#define HIVE_SIZE_IRQ_BASE 16 +#else +#endif +#endif +#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_IRQ_BASE 0x2C +#define HIVE_SIZE_sp_IRQ_BASE 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_TIMED_CTRL_BASE +#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 +#define HIVE_SIZE_TIMED_CTRL_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 +#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 + +#ifndef ISP2401 +/* function ia_css_isys_sp_isr: 6FDC */ + +/* function ia_css_isys_sp_generate_exp_id: 60E5 */ +#else +/* function ia_css_isys_sp_isr: 7139 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_init: 61CF */ +#else +/* function ia_css_isys_sp_generate_exp_id: 6220 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_init: 6BC8 */ +#else +/* function ia_css_rmgr_sp_init: 630A */ +#endif + +#ifndef ISP2401 +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_is_isp_requested +#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_is_isp_requested 0x308 +#define HIVE_SIZE_is_isp_requested 4 +#else +#endif +#endif +#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_sp_is_isp_requested 0x308 +#define HIVE_SIZE_sp_is_isp_requested 4 +#else +/* function ia_css_thread_sem_sp_init: 6D3B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_cb_frame +#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_cb_frame 0x46D0 +#else +#define HIVE_ADDR_sem_for_reading_cb_frame 0x4718 +#endif +#define HIVE_SIZE_sem_for_reading_cb_frame 40 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x46D0 +#else +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x4718 +#endif +#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_execute: 3217 */ +#else +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_is_isp_requested +#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_is_isp_requested 0x320 +#define HIVE_SIZE_is_isp_requested 4 +#else +#endif +#endif +#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_sp_is_isp_requested 0x320 +#define HIVE_SIZE_sp_is_isp_requested 4 + +/* function ia_css_dmaproxy_sp_execute: 33F6 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_is_empty: 48E0 */ +#else +/* function ia_css_queue_is_empty: 7098 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_has_stopped: 180C */ +#else +/* function ia_css_pipeline_sp_has_stopped: 1846 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_extract: F44 */ +#else +/* function ia_css_circbuf_extract: F39 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_is_locked_from_start: 2B0D */ +#else +/* function ia_css_tagger_buf_sp_is_locked_from_start: 2CAF */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_current_sp_thread +#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem +#define HIVE_ADDR_current_sp_thread 0x1DC +#define HIVE_SIZE_current_sp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem +#define HIVE_ADDR_sp_current_sp_thread 0x1DC +#define HIVE_SIZE_sp_current_sp_thread 4 + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_get_spid: 594A */ +#else +/* function ia_css_spctrl_sp_get_spid: 5A85 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_reset_buffers: 2D22 */ +#else +/* function ia_css_bufq_sp_reset_buffers: 2EC4 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read_byte_addr: 6E35 */ +#else +/* function ia_css_dmaproxy_sp_read_byte_addr: 6F79 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_uninit: 61C8 */ +#else +/* function ia_css_rmgr_sp_uninit: 6303 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_stack +#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_stack 0x164 +#define HIVE_SIZE_sp_threads_stack 28 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_stack 0x164 +#define HIVE_SIZE_sp_sp_threads_stack 28 + +#ifndef ISP2401 +/* function ia_css_circbuf_peek: F26 */ +#else +/* function ia_css_circbuf_peek: F1B */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_wait_for_in_param: 1053 */ +#else +/* function ia_css_parambuf_sp_wait_for_in_param: 1048 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_get_exp_id: 5FAD */ +#else +/* function ia_css_isys_sp_token_map_get_exp_id: 60E8 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cb_elems_param +#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cb_elems_param 0x46F8 +#else +#define HIVE_ADDR_sp_all_cb_elems_param 0x4740 +#endif +#define HIVE_SIZE_sp_all_cb_elems_param 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x46F8 +#else +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x4740 +#endif +#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_pipeline_sp_curr_binary_id +#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1EC +#else +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1F0 +#endif +#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 +#else +#endif +#endif +#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1EC +#else +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1F0 +#endif +#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_frame_desc +#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4708 +#else +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4750 +#endif +#define HIVE_SIZE_sp_all_cbs_frame_desc 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4708 +#else +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4750 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 + +#ifndef ISP2401 +/* function sp_isys_copy_func_v2: 706 */ +#else +/* function sp_isys_copy_func_v2: 69A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_cb_param +#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_cb_param 0x4710 +#else +#define HIVE_ADDR_sem_for_reading_cb_param 0x4758 +#endif +#define HIVE_SIZE_sem_for_reading_cb_param 40 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4710 +#else +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4758 +#endif +#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 + +#ifndef ISP2401 +/* function ia_css_queue_get_used_space: 49AD */ +#else +/* function ia_css_queue_get_used_space: 4C0B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_cont_capt_start +#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_cont_capt_start 0x4738 +#else +#define HIVE_ADDR_sem_for_cont_capt_start 0x4780 +#endif +#define HIVE_SIZE_sem_for_cont_capt_start 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4738 +#else +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4780 +#endif +#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_tmp_heap +#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_tmp_heap 0x6010 +#else +#define HIVE_ADDR_tmp_heap 0x6070 +#endif +#define HIVE_SIZE_tmp_heap 640 +#else +#endif +#endif +#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_tmp_heap 0x6010 +#else +#define HIVE_ADDR_sp_tmp_heap 0x6070 +#endif +#define HIVE_SIZE_sp_tmp_heap 640 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_get_num_vbuf: 64D8 */ +#else +/* function ia_css_rmgr_sp_get_num_vbuf: 6613 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_output_compute_dma_info: 3F49 */ +#else +/* function ia_css_ispctrl_sp_output_compute_dma_info: 418C */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_lock_exp_id: 20CD */ +#else +/* function ia_css_tagger_sp_lock_exp_id: 211D */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 + +#ifndef ISP2401 +/* function ia_css_queue_is_full: 4A44 */ +#else +/* function ia_css_queue_is_full: 4CA2 */ +#endif + +/* function debug_buffer_init_isp: E4 */ + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_uninit: 5D07 */ +#else +/* function ia_css_isys_sp_frontend_uninit: 5E42 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_exp_id_is_locked: 2003 */ +#else +/* function ia_css_tagger_sp_exp_id_is_locked: 2053 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem +#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 +#else +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#endif +#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 +#else +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#endif +#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_dump: 62AF */ +#else +/* function ia_css_rmgr_sp_refcount_dump: 63EA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_pipe_threads +#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_pipe_threads 0x150 +#define HIVE_SIZE_sp_pipe_threads 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_pipe_threads 0x150 +#define HIVE_SIZE_sp_sp_pipe_threads 20 + +#ifndef ISP2401 +/* function sp_event_proxy_func: 71B */ +#else +/* function sp_event_proxy_func: 6AF */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_isys_event_queue_handle +#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4BDC +#else +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4C38 +#endif +#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4BDC +#else +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4C38 +#endif +#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 + +#ifndef ISP2401 +/* function ia_css_thread_sp_yield: 6A70 */ +#else +/* function ia_css_thread_sp_yield: 6BEA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_param_desc +#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_param_desc 0x474C +#else +#define HIVE_ADDR_sp_all_cbs_param_desc 0x4794 +#endif +#define HIVE_SIZE_sp_all_cbs_param_desc 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x474C +#else +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x4794 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb +#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 +#else +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#endif +#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 +#else +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#endif +#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 + +#ifndef ISP2401 +/* function ia_css_thread_sp_fork: D10 */ +#else +/* function ia_css_thread_sp_fork: D05 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_destroy: 27F4 */ +#else +/* function ia_css_tagger_sp_destroy: 2844 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_vmem_read: 31B7 */ +#else +/* function ia_css_dmaproxy_sp_vmem_read: 3396 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ifmtr_sp_init: 6136 */ +#else +/* function ia_css_ifmtr_sp_init: 6271 */ +#endif + +#ifndef ISP2401 +/* function initialize_sp_group: 6D4 */ +#else +/* function initialize_sp_group: 668 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_peek: 2919 */ +#else +/* function ia_css_tagger_buf_sp_peek: 2ABB */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_init: D3C */ +#else +/* function ia_css_thread_sp_init: D31 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_reset_exp_id: 60DD */ +#else +/* function ia_css_isys_sp_reset_exp_id: 6218 */ +#endif + +#ifndef ISP2401 +/* function qos_scheduler_update_fps: 65F0 */ +#else +/* function qos_scheduler_update_fps: 6763 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_set_stream_base_addr: 461E */ +#else +/* function ia_css_ispctrl_sp_set_stream_base_addr: 4879 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_DMEM_BASE +#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_DMEM_BASE 0x10 +#define HIVE_SIZE_ISP_DMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 +#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_SP_DMEM_BASE +#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_SP_DMEM_BASE 0x4 +#define HIVE_SIZE_SP_DMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 +#define HIVE_SIZE_sp_SP_DMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read: 322D */ +#else +/* function __ia_css_queue_is_empty_text: 4B68 */ + +/* function ia_css_dmaproxy_sp_read: 340C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_raw_copy_line_count +#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_raw_copy_line_count 0x2C8 +#else +#define HIVE_ADDR_raw_copy_line_count 0x2E0 +#endif +#define HIVE_SIZE_raw_copy_line_count 4 +#else +#endif +#endif +#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_raw_copy_line_count 0x2C8 +#else +#define HIVE_ADDR_sp_raw_copy_line_count 0x2E0 +#endif +#define HIVE_SIZE_sp_raw_copy_line_count 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle +#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4BE8 +#else +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4C44 +#endif +#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4BE8 +#else +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4C44 +#endif +#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 + +#ifndef ISP2401 +/* function ia_css_queue_peek: 4923 */ +#else +/* function ia_css_queue_peek: 4B81 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt +#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4A94 +#else +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4AF0 +#endif +#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4A94 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4AF0 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_can_send_token_mask +#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem +#define HIVE_ADDR_event_can_send_token_mask 0x88 +#define HIVE_SIZE_event_can_send_token_mask 44 +#else +#endif +#endif +#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem +#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 +#define HIVE_SIZE_sp_event_can_send_token_mask 44 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_thread +#define HIVE_MEM_isp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_thread 0x5F40 +#else +#define HIVE_ADDR_isp_thread 0x5FA0 +#endif +#define HIVE_SIZE_isp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_thread 0x5F40 +#else +#define HIVE_ADDR_sp_isp_thread 0x5FA0 +#endif +#define HIVE_SIZE_sp_isp_thread 4 + +#ifndef ISP2401 +/* function encode_and_post_sp_event_non_blocking: A78 */ +#else +/* function encode_and_post_sp_event_non_blocking: A0C */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_destroy: 5DDF */ +#else +/* function ia_css_isys_sp_frontend_destroy: 5F1A */ +#endif + +/* function is_ddr_debug_buffer_full: 2CC */ + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_stop: 5D1F */ +#else +/* function ia_css_isys_sp_frontend_stop: 5E5A */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_init: 607B */ +#else +/* function ia_css_isys_sp_token_map_init: 61B6 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2969 */ +#else +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2B0B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_fiber +#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_fiber 0x19C +#define HIVE_SIZE_sp_threads_fiber 28 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_fiber 0x19C +#define HIVE_SIZE_sp_sp_threads_fiber 28 + +#ifndef ISP2401 +/* function encode_and_post_sp_event: A01 */ +#else +/* function encode_and_post_sp_event: 995 */ +#endif + +/* function debug_enqueue_ddr: EE */ + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_init_vbuf: 626A */ +#else +/* function ia_css_rmgr_sp_refcount_init_vbuf: 63A5 */ +#endif + +#ifndef ISP2401 +/* function dmaproxy_sp_read_write: 6EE4 */ +#else +/* function dmaproxy_sp_read_write: 7017 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer +#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 +#else +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#endif +#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 +#else +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#endif +#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_buffer_queue_handle +#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4BF4 +#else +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4C50 +#endif +#define HIVE_SIZE_host2sp_buffer_queue_handle 480 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4BF4 +#else +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4C50 +#endif +#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_in_service +#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3178 +#else +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3198 +#endif +#define HIVE_SIZE_ia_css_flash_sp_in_service 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3178 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3198 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_process: 6BF0 */ +#else +/* function ia_css_dmaproxy_sp_process: 6D63 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_mark_from_end: 2BF1 */ +#else +/* function ia_css_tagger_buf_sp_mark_from_end: 2D93 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_rcv_acquire_ack: 59EC */ +#else +/* function ia_css_isys_sp_backend_rcv_acquire_ack: 5B27 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_pre_acquire_request: 5A02 */ +#else +/* function ia_css_isys_sp_backend_pre_acquire_request: 5B3D */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_cs: 3653 */ +#else +/* function ia_css_ispctrl_sp_init_cs: 3855 */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_init: 5958 */ +#else +/* function ia_css_spctrl_sp_init: 5A93 */ +#endif + +#ifndef ISP2401 +/* function sp_event_proxy_init: 730 */ +#else +/* function sp_event_proxy_init: 6C4 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_output +#define HIVE_MEM_sp_output scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_output 0x41F8 +#else +#define HIVE_ADDR_sp_output 0x4218 +#endif +#define HIVE_SIZE_sp_output 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_output 0x41F8 +#else +#define HIVE_ADDR_sp_sp_output 0x4218 +#endif +#define HIVE_SIZE_sp_sp_output 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues +#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC +#else +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_CTRL_BASE +#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_CTRL_BASE 0x8 +#define HIVE_SIZE_ISP_CTRL_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 +#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_INPUT_FORMATTER_BASE +#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C +#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 +#else +#endif +#endif +#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C +#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 + +#ifndef ISP2401 +/* function sp_dma_proxy_reset_channels: 3487 */ +#else +/* function sp_dma_proxy_reset_channels: 367B */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_acquire: 5B0D */ +#else +/* function ia_css_isys_sp_backend_acquire: 5C48 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_update_size: 28E8 */ +#else +/* function ia_css_tagger_sp_update_size: 2A8A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue +#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x511C +#else +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x5178 +#endif +#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x511C +#else +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x5178 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 + +#ifndef ISP2401 +/* function thread_fiber_sp_create: DA8 */ +#else +/* function thread_fiber_sp_create: D9D */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_increments: 3319 */ +#else +/* function ia_css_dmaproxy_sp_set_increments: 350D */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_writing_cb_frame +#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_writing_cb_frame 0x4754 +#else +#define HIVE_ADDR_sem_for_writing_cb_frame 0x479C +#endif +#define HIVE_SIZE_sem_for_writing_cb_frame 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x4754 +#else +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x479C +#endif +#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 + +#ifndef ISP2401 +/* function receiver_reg_store: AD7 */ +#else +/* function receiver_reg_store: AD1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_writing_cb_param +#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_writing_cb_param 0x4768 +#else +#define HIVE_ADDR_sem_for_writing_cb_param 0x47B0 +#endif +#define HIVE_SIZE_sem_for_writing_cb_param 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x4768 +#else +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x47B0 +#endif +#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 + +/* function sp_start_isp_entry: 453 */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifdef HIVE_ADDR_sp_start_isp_entry +#endif +#define HIVE_ADDR_sp_start_isp_entry 0x453 +#endif +#define HIVE_ADDR_sp_sp_start_isp_entry 0x453 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unmark_all: 2B75 */ +#else +/* function ia_css_tagger_buf_sp_unmark_all: 2D17 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unmark_from_start: 2BB6 */ +#else +/* function ia_css_tagger_buf_sp_unmark_from_start: 2D58 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_channel_acquire: 34B3 */ +#else +/* function ia_css_dmaproxy_sp_channel_acquire: 36A7 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_add_num_vbuf: 64B4 */ +#else +/* function ia_css_rmgr_sp_add_num_vbuf: 65EF */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_create: 60C4 */ +#else +/* function ia_css_isys_sp_token_map_create: 61FF */ +#endif + +#ifndef ISP2401 +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3183 */ +#else +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3362 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_acquire_buf_elem: 1FDB */ +#else +/* function ia_css_tagger_sp_acquire_buf_elem: 202B */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_is_dynamic_buffer: 306C */ +#else +/* function ia_css_bufq_sp_is_dynamic_buffer: 320E */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_group +#define HIVE_MEM_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_group 0x4208 +#define HIVE_SIZE_sp_group 1144 +#else +#define HIVE_ADDR_sp_group 0x4228 +#define HIVE_SIZE_sp_group 1184 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_group 0x4208 +#define HIVE_SIZE_sp_sp_group 1144 +#else +#define HIVE_ADDR_sp_sp_group 0x4228 +#define HIVE_SIZE_sp_sp_group 1184 +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_event_proxy_thread +#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_event_proxy_thread 0x4954 +#define HIVE_SIZE_sp_event_proxy_thread 68 +#else +#define HIVE_ADDR_sp_event_proxy_thread 0x49B0 +#define HIVE_SIZE_sp_event_proxy_thread 72 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x4954 +#define HIVE_SIZE_sp_sp_event_proxy_thread 68 +#else +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x49B0 +#define HIVE_SIZE_sp_sp_event_proxy_thread 72 +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_kill: CD6 */ +#else +/* function ia_css_thread_sp_kill: CCB */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_create: 28A2 */ +#else +/* function ia_css_tagger_sp_create: 2A38 */ +#endif + +#ifndef ISP2401 +/* function tmpmem_acquire_dmem: 6561 */ +#else +/* function tmpmem_acquire_dmem: 669C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_MMU_BASE +#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_MMU_BASE 0x24 +#define HIVE_SIZE_MMU_BASE 8 +#else +#endif +#endif +#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_MMU_BASE 0x24 +#define HIVE_SIZE_sp_MMU_BASE 8 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_channel_release: 349F */ +#else +/* function ia_css_dmaproxy_sp_channel_release: 3693 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_is_idle: 347F */ +#else +/* function ia_css_dmaproxy_sp_is_idle: 3673 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_qos_start +#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_qos_start 0x477C +#else +#define HIVE_ADDR_sem_for_qos_start 0x47C4 +#endif +#define HIVE_SIZE_sem_for_qos_start 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_qos_start 0x477C +#else +#define HIVE_ADDR_sp_sem_for_qos_start 0x47C4 +#endif +#define HIVE_SIZE_sp_sem_for_qos_start 20 + +#ifndef ISP2401 +/* function isp_hmem_load: B55 */ +#else +/* function isp_hmem_load: B4F */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_release_buf_elem: 1FB7 */ +#else +/* function ia_css_tagger_sp_release_buf_elem: 2007 */ +#endif + +#ifndef ISP2401 +/* function ia_css_eventq_sp_send: 34F5 */ +#else +/* function ia_css_eventq_sp_send: 36E9 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_isys_sp_error_cnt +#define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x62D4 +#else +#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x6330 +#endif +#define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x62D4 +#else +#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x6330 +#endif +#define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unlock_from_start: 2AA5 */ +#else +/* function ia_css_tagger_buf_sp_unlock_from_start: 2C47 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_debug_buffer_ddr_address +#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem +#define HIVE_ADDR_debug_buffer_ddr_address 0xBC +#define HIVE_SIZE_debug_buffer_ddr_address 4 +#else +#endif +#endif +#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem +#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC +#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 + +#ifndef ISP2401 +/* function sp_isys_copy_request: 714 */ +#else +/* function sp_isys_copy_request: 6A8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 6344 */ +#else +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 647F */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_set_priority: CCE */ +#else +/* function ia_css_thread_sp_set_priority: CC3 */ +#endif + +#ifndef ISP2401 +/* function sizeof_hmem: BFC */ +#else +/* function sizeof_hmem: BF6 */ +#endif + +#ifndef ISP2401 +/* function tmpmem_release_dmem: 6550 */ +#else +/* function tmpmem_release_dmem: 668B */ +#endif + +/* function cnd_input_system_cfg: 392 */ + +#ifndef ISP2401 +/* function __ia_css_sp_rawcopy_func_critical: 6F65 */ +#else +/* function __ia_css_sp_rawcopy_func_critical: 70C2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_width_exception: 3304 */ +#else +/* function __ia_css_dmaproxy_sp_process_text: 3306 */ +#endif + +#ifndef ISP2401 +/* function sp_event_assert: 8B1 */ +#else +/* function ia_css_dmaproxy_sp_set_width_exception: 34F8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_flash_sp_init_internal_params: 2C90 */ +#else +/* function sp_event_assert: 845 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 29AB */ +#else +/* function ia_css_flash_sp_init_internal_params: 2E32 */ +#endif + +#ifndef ISP2401 +/* function __modu: 68BB */ +#else +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 2B4D */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_isp_vector: 3189 */ +#else +/* function __modu: 6A2E */ + +/* function ia_css_dmaproxy_sp_init_isp_vector: 3368 */ +#endif + +/* function isp_vamem_store: 0 */ + +#ifdef ISP2401 +/* function ia_css_tagger_sp_set_copy_pipe: 2A2F */ + +#endif +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GDC_BASE +#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_GDC_BASE 0x44 +#define HIVE_SIZE_GDC_BASE 8 +#else +#endif +#endif +#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_GDC_BASE 0x44 +#define HIVE_SIZE_sp_GDC_BASE 8 + +#ifndef ISP2401 +/* function ia_css_queue_local_init: 4C0E */ +#else +/* function ia_css_queue_local_init: 4E6C */ +#endif + +#ifndef ISP2401 +/* function sp_event_proxy_callout_func: 6988 */ +#else +/* function sp_event_proxy_callout_func: 6AFB */ +#endif + +#ifndef ISP2401 +/* function qos_scheduler_schedule_stage: 65C1 */ +#else +/* function qos_scheduler_schedule_stage: 670F */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads +#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x49E0 +#else +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x4A40 +#endif +#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x49E0 +#else +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x4A40 +#endif +#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_stack_size +#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_stack_size 0x180 +#define HIVE_SIZE_sp_threads_stack_size 28 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_stack_size 0x180 +#define HIVE_SIZE_sp_sp_threads_stack_size 28 + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_isp_done_row_striping: 3F2F */ +#else +/* function ia_css_ispctrl_sp_isp_done_row_striping: 4172 */ +#endif + +#ifndef ISP2401 +/* function __ia_css_isys_sp_isr_text: 5E09 */ +#else +/* function __ia_css_isys_sp_isr_text: 5F44 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_dequeue: 4A8C */ +#else +/* function ia_css_queue_dequeue: 4CEA */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_configure_channel: 6E4C */ +#else +/* function is_qos_standalone_mode: 66EA */ + +/* function ia_css_dmaproxy_sp_configure_channel: 6F90 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_current_thread_fiber_sp +#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_current_thread_fiber_sp 0x49E8 +#else +#define HIVE_ADDR_current_thread_fiber_sp 0x4A44 +#endif +#define HIVE_SIZE_current_thread_fiber_sp 4 +#else +#endif +#endif +#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x49E8 +#else +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x4A44 +#endif +#define HIVE_SIZE_sp_current_thread_fiber_sp 4 + +#ifndef ISP2401 +/* function ia_css_circbuf_pop: FD8 */ +#else +/* function ia_css_circbuf_pop: FCD */ +#endif + +#ifndef ISP2401 +/* function memset: 693A */ +#else +/* function memset: 6AAD */ +#endif + +/* function irq_raise_set_token: B6 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GPIO_BASE +#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_GPIO_BASE 0x3C +#define HIVE_SIZE_GPIO_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_GPIO_BASE 0x3C +#define HIVE_SIZE_sp_GPIO_BASE 4 + +#ifndef ISP2401 +/* function ia_css_pipeline_acc_stage_enable: 17D7 */ +#else +/* function ia_css_pipeline_acc_stage_enable: 17FF */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_unlock_exp_id: 2028 */ +#else +/* function ia_css_tagger_sp_unlock_exp_id: 2078 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_ph +#define HIVE_MEM_isp_ph scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_ph 0x62E4 +#else +#define HIVE_ADDR_isp_ph 0x6340 +#endif +#define HIVE_SIZE_isp_ph 28 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_ph 0x62E4 +#else +#define HIVE_ADDR_sp_isp_ph 0x6340 +#endif +#define HIVE_SIZE_sp_isp_ph 28 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_flush: 6009 */ +#else +/* function ia_css_isys_sp_token_map_flush: 6144 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_ds: 37B2 */ +#else +/* function ia_css_ispctrl_sp_init_ds: 39E1 */ +#endif + +#ifndef ISP2401 +/* function get_xmem_base_addr_raw: 3B5F */ +#else +/* function get_xmem_base_addr_raw: 3D9A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_param +#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_param 0x4790 +#else +#define HIVE_ADDR_sp_all_cbs_param 0x47D8 +#endif +#define HIVE_SIZE_sp_all_cbs_param 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_param 0x4790 +#else +#define HIVE_ADDR_sp_sp_all_cbs_param 0x47D8 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_param 16 + +#ifndef ISP2401 +/* function ia_css_circbuf_create: 1026 */ +#else +/* function ia_css_circbuf_create: 101B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp_group +#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp_group 0x47A0 +#else +#define HIVE_ADDR_sem_for_sp_group 0x47E8 +#endif +#define HIVE_SIZE_sem_for_sp_group 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp_group 0x47A0 +#else +#define HIVE_ADDR_sp_sem_for_sp_group 0x47E8 +#endif +#define HIVE_SIZE_sp_sem_for_sp_group 20 + +#ifndef ISP2401 +/* function ia_css_framebuf_sp_wait_for_in_frame: 64DF */ +#else +/* function __ia_css_dmaproxy_sp_configure_channel_text: 34D7 */ + +/* function ia_css_framebuf_sp_wait_for_in_frame: 661A */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_tag_frame: 556F */ +#else +/* function ia_css_sp_rawcopy_tag_frame: 57B0 */ +#endif + +#ifndef ISP2401 +/* function isp_hmem_clear: B25 */ +#else +/* function isp_hmem_clear: B1F */ +#endif + +#ifndef ISP2401 +/* function ia_css_framebuf_sp_release_in_frame: 6522 */ +#else +/* function ia_css_framebuf_sp_release_in_frame: 665D */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_snd_acquire_request: 5A5F */ +#else +/* function ia_css_isys_sp_backend_snd_acquire_request: 5B9A */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_is_full: 5E90 */ +#else +/* function ia_css_isys_sp_token_map_is_full: 5FCB */ +#endif + +#ifndef ISP2401 +/* function input_system_acquisition_run: AF9 */ +#else +/* function input_system_acquisition_run: AF3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_start_binary: 3631 */ +#else +/* function ia_css_ispctrl_sp_start_binary: 3833 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs +#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 +#else +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 + +#ifndef ISP2401 +/* function ia_css_eventq_sp_recv: 34C7 */ +#else +/* function ia_css_eventq_sp_recv: 36BB */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_pool +#define HIVE_MEM_isp_pool scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_pool 0x2E8 +#else +#define HIVE_ADDR_isp_pool 0x300 +#endif +#define HIVE_SIZE_isp_pool 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_pool 0x2E8 +#else +#define HIVE_ADDR_sp_isp_pool 0x300 +#endif +#define HIVE_SIZE_sp_isp_pool 4 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_rel_gen: 6211 */ +#else +/* function ia_css_rmgr_sp_rel_gen: 634C */ + +/* function ia_css_tagger_sp_unblock_clients: 2900 */ +#endif + +#ifndef ISP2401 +/* function css_get_frame_processing_time_end: 1FA7 */ +#else +/* function css_get_frame_processing_time_end: 1FF7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_any_pending_mask +#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_event_any_pending_mask 0x300 +#else +#define HIVE_ADDR_event_any_pending_mask 0x318 +#endif +#define HIVE_SIZE_event_any_pending_mask 8 +#else +#endif +#endif +#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_event_any_pending_mask 0x300 +#else +#define HIVE_ADDR_sp_event_any_pending_mask 0x318 +#endif +#define HIVE_SIZE_sp_event_any_pending_mask 8 + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_push: 5A16 */ +#else +/* function ia_css_isys_sp_backend_push: 5B51 */ +#endif + +/* function sh_css_decode_tag_descr: 352 */ + +/* function debug_enqueue_isp: 27B */ + +#ifndef ISP2401 +/* function qos_scheduler_update_stage_budget: 65AF */ +#else +/* function qos_scheduler_update_stage_budget: 66F2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_uninit: 5951 */ +#else +/* function ia_css_spctrl_sp_uninit: 5A8C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE +#define HIVE_MEM_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem +#define HIVE_ADDR_HIVE_IF_SWITCH_CODE 0x1D8 +#define HIVE_SIZE_HIVE_IF_SWITCH_CODE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_HIVE_IF_SWITCH_CODE 0x1D8 +#define HIVE_SIZE_sp_HIVE_IF_SWITCH_CODE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_lock_from_start: 2AD9 */ +#else +/* function ia_css_tagger_buf_sp_lock_from_start: 2C7B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_isp_idle +#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_isp_idle 0x47B4 +#else +#define HIVE_ADDR_sem_for_isp_idle 0x47FC +#endif +#define HIVE_SIZE_sem_for_isp_idle 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_isp_idle 0x47B4 +#else +#define HIVE_ADDR_sp_sem_for_isp_idle 0x47FC +#endif +#define HIVE_SIZE_sp_sem_for_isp_idle 20 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_write_byte_addr: 31E6 */ +#else +/* function ia_css_dmaproxy_sp_write_byte_addr: 33C5 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init: 315D */ +#else +/* function ia_css_dmaproxy_sp_init: 333C */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2D62 */ +#else +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2F04 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_VAMEM_BASE +#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 +#define HIVE_SIZE_ISP_VAMEM_BASE 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 +#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger +#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x6294 +#else +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x62F0 +#endif +#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x6294 +#else +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x62F0 +#endif +#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 + +#ifndef ISP2401 +/* function ia_css_queue_item_load: 4D00 */ +#else +/* function ia_css_queue_item_load: 4F5E */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_get_state: 593C */ +#else +/* function ia_css_spctrl_sp_get_state: 5A77 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_uninit: 6026 */ +#else +/* function ia_css_isys_sp_token_map_uninit: 6161 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_callout_sp_thread +#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_callout_sp_thread 0x49DC +#else +#define HIVE_ADDR_callout_sp_thread 0x1E0 +#endif +#define HIVE_SIZE_callout_sp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_callout_sp_thread 0x49DC +#else +#define HIVE_ADDR_sp_callout_sp_thread 0x1E0 +#endif +#define HIVE_SIZE_sp_callout_sp_thread 4 + +#ifndef ISP2401 +/* function thread_fiber_sp_init: E2F */ +#else +/* function thread_fiber_sp_init: E24 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_SP_PMEM_BASE +#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_SP_PMEM_BASE 0x0 +#define HIVE_SIZE_SP_PMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 +#define HIVE_SIZE_sp_SP_PMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_snd_acquire_req: 5F96 */ +#else +/* function ia_css_isys_sp_token_map_snd_acquire_req: 60D1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_input_stream_format +#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_input_stream_format 0x40F8 +#else +#define HIVE_ADDR_sp_isp_input_stream_format 0x4118 +#endif +#define HIVE_SIZE_sp_isp_input_stream_format 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x40F8 +#else +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x4118 +#endif +#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 + +#ifndef ISP2401 +/* function __mod: 68A7 */ +#else +/* function __mod: 6A1A */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_dmem_channel: 3247 */ +#else +/* function ia_css_dmaproxy_sp_init_dmem_channel: 3426 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_join: CFF */ +#else +/* function ia_css_thread_sp_join: CF4 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_add_command: 6F4F */ +#else +/* function ia_css_dmaproxy_sp_add_command: 7082 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_metadata_thread_func: 57F0 */ +#else +/* function ia_css_sp_metadata_thread_func: 594F */ +#endif + +#ifndef ISP2401 +/* function __sp_event_proxy_func_critical: 6975 */ +#else +/* function __sp_event_proxy_func_critical: 6AE8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_metadata_wait: 5903 */ +#else +/* function ia_css_sp_metadata_wait: 5A3E */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_peek_from_start: F08 */ +#else +/* function ia_css_circbuf_peek_from_start: EFD */ +#endif + +#ifndef ISP2401 +/* function ia_css_event_sp_encode: 3552 */ +#else +/* function ia_css_event_sp_encode: 3746 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_run: D72 */ +#else +/* function ia_css_thread_sp_run: D67 */ +#endif + +#ifndef ISP2401 +/* function sp_isys_copy_func: 6F6 */ +#else +/* function sp_isys_copy_func: 68A */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_flush: 5A7F */ +#else +/* function ia_css_isys_sp_backend_flush: 5BBA */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_frame_exists: 599B */ +#else +/* function ia_css_isys_sp_backend_frame_exists: 5AD6 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_init_isp_memories: 4789 */ +#else +/* function ia_css_sp_isp_param_init_isp_memories: 4A11 */ +#endif + +#ifndef ISP2401 +/* function register_isr: 8A9 */ +#else +/* function register_isr: 83D */ +#endif + +/* function irq_raise: C8 */ + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_mmu_invalidate: 3124 */ +#else +/* function ia_css_dmaproxy_sp_mmu_invalidate: 32CC */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS +#define HIVE_MEM_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem +#define HIVE_ADDR_HIVE_IF_SRST_ADDRESS 0x1B8 +#define HIVE_SIZE_HIVE_IF_SRST_ADDRESS 16 +#else +#endif +#endif +#define HIVE_MEM_sp_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 +#define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 + +#ifndef ISP2401 +/* function pipeline_sp_initialize_stage: 190B */ +#else +/* function pipeline_sp_initialize_stage: 1945 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_isys_sp_frontend_states +#define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x62C8 +#else +#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x6324 +#endif +#define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x62C8 +#else +#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x6324 +#endif +#define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6E1E */ +#else +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6F62 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_done_ds: 3799 */ +#else +/* function ia_css_ispctrl_sp_done_ds: 39C8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_get_mem_inits: 4764 */ +#else +/* function ia_css_sp_isp_param_get_mem_inits: 49EC */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_init_buffer_queues: 13D0 */ +#else +/* function ia_css_parambuf_sp_init_buffer_queues: 13F1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_pfp_spref +#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_pfp_spref 0x2F0 +#else +#define HIVE_ADDR_vbuf_pfp_spref 0x308 +#endif +#define HIVE_SIZE_vbuf_pfp_spref 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x2F0 +#else +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x308 +#endif +#define HIVE_SIZE_sp_vbuf_pfp_spref 4 + +#ifndef ISP2401 +/* function input_system_cfg: ABB */ +#else +/* function input_system_cfg: AB5 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_HMEM_BASE +#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_HMEM_BASE 0x20 +#define HIVE_SIZE_ISP_HMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 +#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x59DC +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x59DC +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 + +#ifndef ISP2401 +/* function qos_scheduler_init_stage_budget: 65E8 */ +#else +/* function qos_scheduler_init_stage_budget: 6750 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_release: 5AF4 */ +#else +/* function ia_css_isys_sp_backend_release: 5C2F */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_destroy: 5B1E */ +#else +/* function ia_css_isys_sp_backend_destroy: 5C59 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_buffer_queue_handle +#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5AF4 +#else +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5B50 +#endif +#define HIVE_SIZE_sp2host_buffer_queue_handle 96 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5AF4 +#else +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5B50 +#endif +#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 5F5A */ +#else +/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 6095 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_isp_vars: 4483 */ +#else +/* function ia_css_ispctrl_sp_init_isp_vars: 46DE */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5B70 */ +#else +/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5CAB */ +#endif + +#ifndef ISP2401 +/* function sp_warning: 8DC */ +#else +/* function sp_warning: 870 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_vbuf_enqueue: 6304 */ +#else +/* function ia_css_rmgr_sp_vbuf_enqueue: 643F */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_tag_exp_id: 2142 */ +#else +/* function ia_css_tagger_sp_tag_exp_id: 2192 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_write: 31FD */ +#else +/* function ia_css_dmaproxy_sp_write: 33DC */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_release_in_param: 1250 */ +#else +/* function ia_css_parambuf_sp_release_in_param: 1245 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_irq_sw_interrupt_token +#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_irq_sw_interrupt_token 0x40F4 +#else +#define HIVE_ADDR_irq_sw_interrupt_token 0x4114 +#endif +#define HIVE_SIZE_irq_sw_interrupt_token 4 +#else +#endif +#endif +#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x40F4 +#else +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x4114 +#endif +#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_addresses +#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_addresses 0x5F44 +#else +#define HIVE_ADDR_sp_isp_addresses 0x5FA4 +#endif +#define HIVE_SIZE_sp_isp_addresses 172 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_addresses 0x5F44 +#else +#define HIVE_ADDR_sp_sp_isp_addresses 0x5FA4 +#endif +#define HIVE_SIZE_sp_sp_isp_addresses 172 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_acq_gen: 6229 */ +#else +/* function ia_css_rmgr_sp_acq_gen: 6364 */ +#endif + +#ifndef ISP2401 +/* function receiver_reg_load: AD0 */ +#else +/* function receiver_reg_load: ACA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isps +#define HIVE_MEM_isps scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isps 0x6300 +#else +#define HIVE_ADDR_isps 0x635C +#endif +#define HIVE_SIZE_isps 28 +#else +#endif +#endif +#define HIVE_MEM_sp_isps scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isps 0x6300 +#else +#define HIVE_ADDR_sp_isps 0x635C +#endif +#define HIVE_SIZE_sp_isps 28 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host_sp_queues_initialized +#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host_sp_queues_initialized 0x410C +#else +#define HIVE_ADDR_host_sp_queues_initialized 0x412C +#endif +#define HIVE_SIZE_host_sp_queues_initialized 4 +#else +#endif +#endif +#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x410C +#else +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x412C +#endif +#define HIVE_SIZE_sp_host_sp_queues_initialized 4 + +#ifndef ISP2401 +/* function ia_css_queue_uninit: 4BCC */ +#else +/* function ia_css_queue_uninit: 4E2A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started +#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5BFC +#else +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5C58 +#endif +#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5BFC +#else +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5C58 +#endif +#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 + +#ifndef ISP2401 +/* function ia_css_bufq_sp_release_dynamic_buf: 2DCE */ +#else +/* function ia_css_bufq_sp_release_dynamic_buf: 2F70 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_height_exception: 32F5 */ +#else +/* function ia_css_dmaproxy_sp_set_height_exception: 34E9 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_vmem_channel: 327A */ +#else +/* function ia_css_dmaproxy_sp_init_vmem_channel: 345A */ +#endif + +#ifndef ISP2401 +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_num_ready_threads +#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem +#define HIVE_ADDR_num_ready_threads 0x49E4 +#define HIVE_SIZE_num_ready_threads 4 +#else +#endif +#endif +#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_num_ready_threads 0x49E4 +#define HIVE_SIZE_sp_num_ready_threads 4 + +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 31CF */ +#else +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 33AE */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_spref +#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_spref 0x2EC +#else +#define HIVE_ADDR_vbuf_spref 0x304 +#endif +#define HIVE_SIZE_vbuf_spref 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_spref 0x2EC +#else +#define HIVE_ADDR_sp_vbuf_spref 0x304 +#endif +#define HIVE_SIZE_sp_vbuf_spref 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_metadata_thread +#define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_metadata_thread 0x4998 +#define HIVE_SIZE_sp_metadata_thread 68 +#else +#define HIVE_ADDR_sp_metadata_thread 0x49F8 +#define HIVE_SIZE_sp_metadata_thread 72 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_metadata_thread 0x4998 +#define HIVE_SIZE_sp_sp_metadata_thread 68 +#else +#define HIVE_ADDR_sp_sp_metadata_thread 0x49F8 +#define HIVE_SIZE_sp_sp_metadata_thread 72 +#endif + +#ifndef ISP2401 +/* function ia_css_queue_enqueue: 4B16 */ +#else +/* function ia_css_queue_enqueue: 4D74 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_request +#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_request 0x4A98 +#else +#define HIVE_ADDR_ia_css_flash_sp_request 0x4AF4 +#endif +#define HIVE_SIZE_ia_css_flash_sp_request 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4A98 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4AF4 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_vmem_write: 31A0 */ +#else +/* function ia_css_dmaproxy_sp_vmem_write: 337F */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_tagger_frames +#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_tagger_frames 0x49EC +#else +#define HIVE_ADDR_tagger_frames 0x4A48 +#endif +#define HIVE_SIZE_tagger_frames 168 +#else +#endif +#endif +#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_tagger_frames 0x49EC +#else +#define HIVE_ADDR_sp_tagger_frames 0x4A48 +#endif +#define HIVE_SIZE_sp_tagger_frames 168 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_snd_capture_req: 5FB8 */ +#else +/* function ia_css_isys_sp_token_map_snd_capture_req: 60F3 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_if +#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_if 0x47C8 +#else +#define HIVE_ADDR_sem_for_reading_if 0x4810 +#endif +#define HIVE_SIZE_sem_for_reading_if 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_if 0x47C8 +#else +#define HIVE_ADDR_sp_sem_for_reading_if 0x4810 +#endif +#define HIVE_SIZE_sp_sem_for_reading_if 20 + +#ifndef ISP2401 +/* function sp_generate_interrupts: 95B */ +#else +/* function sp_generate_interrupts: 8EF */ + +/* function ia_css_pipeline_sp_start: 1858 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_start: 181E */ +#else +/* function ia_css_thread_default_callout: 6BE3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_init: 50F3 */ +#else +/* function ia_css_sp_rawcopy_init: 5351 */ +#endif + +#ifndef ISP2401 +/* function tmr_clock_read: 6596 */ +#else +/* function tmr_clock_read: 66D1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_BAMEM_BASE +#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ISP_BAMEM_BASE 0x2F8 +#else +#define HIVE_ADDR_ISP_BAMEM_BASE 0x310 +#endif +#define HIVE_SIZE_ISP_BAMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x2F8 +#else +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x310 +#endif +#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5C1F */ +#else +/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5D5A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues +#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 +#else +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 + +#ifndef ISP2401 +/* function css_get_frame_processing_time_start: 1FAF */ +#else +/* function css_get_frame_processing_time_start: 1FFF */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_frame +#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_frame 0x47DC +#else +#define HIVE_ADDR_sp_all_cbs_frame 0x4824 +#endif +#define HIVE_SIZE_sp_all_cbs_frame 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x47DC +#else +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x4824 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_frame 16 + +#ifndef ISP2401 +/* function thread_sp_queue_print: D8F */ +#else +/* function thread_sp_queue_print: D84 */ +#endif + +#ifndef ISP2401 +/* function sp_notify_eof: 907 */ +#else +/* function sp_notify_eof: 89B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_str2mem +#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_str2mem 0x47EC +#else +#define HIVE_ADDR_sem_for_str2mem 0x4834 +#endif +#define HIVE_SIZE_sem_for_str2mem 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_str2mem 0x47EC +#else +#define HIVE_ADDR_sp_sem_for_str2mem 0x4834 +#endif +#define HIVE_SIZE_sp_sem_for_str2mem 20 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_is_marked_from_start: 2B41 */ +#else +/* function ia_css_tagger_buf_sp_is_marked_from_start: 2CE3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_acquire_dynamic_buf: 2F86 */ +#else +/* function ia_css_bufq_sp_acquire_dynamic_buf: 3128 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_destroy: 101D */ +#else +/* function ia_css_circbuf_destroy: 1012 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_PMEM_BASE +#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_PMEM_BASE 0xC +#define HIVE_SIZE_ISP_PMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC +#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_mem_load: 46F7 */ +#else +/* function ia_css_sp_isp_param_mem_load: 497F */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_from_start: 292D */ +#else +/* function ia_css_tagger_buf_sp_pop_from_start: 2ACF */ +#endif + +#ifndef ISP2401 +/* function __div: 685F */ +#else +/* function __div: 69D2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_create: 5DF0 */ +#else +/* function ia_css_isys_sp_frontend_create: 5F2B */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_release_vbuf: 6323 */ +#else +/* function ia_css_rmgr_sp_refcount_release_vbuf: 645E */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_in_use +#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4A9C +#else +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4AF8 +#endif +#define HIVE_SIZE_ia_css_flash_sp_in_use 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4A9C +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4AF8 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_wait: 6B42 */ +#else +/* function ia_css_thread_sem_sp_wait: 6CB7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_sleep_mode +#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sleep_mode 0x4110 +#else +#define HIVE_ADDR_sp_sleep_mode 0x4130 +#endif +#define HIVE_SIZE_sp_sleep_mode 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_sleep_mode 0x4110 +#else +#define HIVE_ADDR_sp_sp_sleep_mode 0x4130 +#endif +#define HIVE_SIZE_sp_sp_sleep_mode 4 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_push: 2A3C */ +#else +/* function ia_css_tagger_buf_sp_push: 2BDE */ +#endif + +/* function mmu_invalidate_cache: D3 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_max_cb_elems +#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem +#define HIVE_ADDR_sp_max_cb_elems 0x148 +#define HIVE_SIZE_sp_max_cb_elems 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 +#define HIVE_SIZE_sp_sp_max_cb_elems 8 + +#ifndef ISP2401 +/* function ia_css_queue_remote_init: 4BEE */ +#else +/* function ia_css_queue_remote_init: 4E4C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_stop_req +#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_stop_req 0x4680 +#else +#define HIVE_ADDR_isp_stop_req 0x46C8 +#endif +#define HIVE_SIZE_isp_stop_req 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_stop_req 0x4680 +#else +#define HIVE_ADDR_sp_isp_stop_req 0x46C8 +#endif +#define HIVE_SIZE_sp_isp_stop_req 4 + +#ifndef ISP2401 +#define HIVE_ICACHE_sp_critical_SEGMENT_START 0 +#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 +#endif + +#endif /* _sp_map_h_ */ +#ifndef ISP2401 +extern void sh_css_dump_sp_dmem(void); +void sh_css_dump_sp_dmem(void) +{ +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h new file mode 100644 index 0000000000000..146a578b7c74c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h @@ -0,0 +1,63 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CSI_RX_GLOBAL_H_INCLUDED__ +#define __CSI_RX_GLOBAL_H_INCLUDED__ + +#include + +typedef enum { + CSI_MIPI_PACKET_TYPE_UNDEFINED = 0, + CSI_MIPI_PACKET_TYPE_LONG, + CSI_MIPI_PACKET_TYPE_SHORT, + CSI_MIPI_PACKET_TYPE_RESERVED, + N_CSI_MIPI_PACKET_TYPE +} csi_mipi_packet_type_t; + +typedef struct csi_rx_backend_lut_entry_s csi_rx_backend_lut_entry_t; +struct csi_rx_backend_lut_entry_s { + uint32_t long_packet_entry; + uint32_t short_packet_entry; +}; + +typedef struct csi_rx_backend_cfg_s csi_rx_backend_cfg_t; +struct csi_rx_backend_cfg_s { + /* LUT entry for the packet */ + csi_rx_backend_lut_entry_t lut_entry; + + /* can be derived from the Data Type */ + csi_mipi_packet_type_t csi_mipi_packet_type; + + struct { + bool comp_enable; + uint32_t virtual_channel; + uint32_t data_type; + uint32_t comp_scheme; + uint32_t comp_predictor; + uint32_t comp_bit_idx; + } csi_mipi_cfg; +}; + +typedef struct csi_rx_frontend_cfg_s csi_rx_frontend_cfg_t; +struct csi_rx_frontend_cfg_s { + uint32_t active_lanes; +}; + +extern const uint32_t N_SHORT_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID]; +extern const uint32_t N_LONG_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID]; +extern const uint32_t N_CSI_RX_FE_CTRL_DLANES[N_CSI_RX_FRONTEND_ID]; +/* sid_width for CSI_RX_BACKEND_ID */ +extern const uint32_t N_CSI_RX_BE_SID_WIDTH[N_CSI_RX_BACKEND_ID]; + +#endif /* __CSI_RX_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c new file mode 100644 index 0000000000000..325b821f276cf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c @@ -0,0 +1,360 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_pipeline.h" +#include "ia_css_isp_configs.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_iterator( + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; + offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; + } + if (size) { + ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_copy_output( + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; + offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; + } + if (size) { + ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_crop( + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.crop.size; + offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; + } + if (size) { + ia_css_crop_config((struct sh_css_isp_crop_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_fpn( + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; + offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; + } + if (size) { + ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_dvs( + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; + offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; + } + if (size) { + ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_qplane( + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; + offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; + } + if (size) { + ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output0( + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output0.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; + } + if (size) { + ia_css_output0_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output1( + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output1.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; + } + if (size) { + ia_css_output1_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output( + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; + } + if (size) { + ia_css_output_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ +#ifdef ISP2401 + +void +ia_css_configure_sc( + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.sc.size; + offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; + } + if (size) { + ia_css_sc_config((struct sh_css_isp_sc_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ +#endif + +void +ia_css_configure_raw( + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.raw.size; + offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; + } + if (size) { + ia_css_raw_config((struct sh_css_isp_raw_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_tnr( + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; + offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; + } + if (size) { + ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_ref( + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.ref.size; + offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; + } + if (size) { + ia_css_ref_config((struct sh_css_isp_ref_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_vf( + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.vf.size; + offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; + } + if (size) { + ia_css_vf_config((struct sh_css_isp_vf_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h new file mode 100644 index 0000000000000..8aacd3dbc05a5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h @@ -0,0 +1,189 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifdef IA_CSS_INCLUDE_CONFIGURATIONS +#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" +#include "isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h" +#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" +#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" +#include "isp/kernels/output/output_1.0/ia_css_output.host.h" +#include "isp/kernels/qplane/qplane_2/ia_css_qplane.host.h" +#include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" +#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" +#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" +#ifdef ISP2401 +#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" +#endif +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" +#include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" +#include "isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h" +#endif /* IA_CSS_INCLUDE_CONFIGURATIONS */ +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_CONFIG_H +#define _IA_CSS_ISP_CONFIG_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_configuration_ids { + IA_CSS_ITERATOR_CONFIG_ID, + IA_CSS_COPY_OUTPUT_CONFIG_ID, + IA_CSS_CROP_CONFIG_ID, + IA_CSS_FPN_CONFIG_ID, + IA_CSS_DVS_CONFIG_ID, + IA_CSS_QPLANE_CONFIG_ID, + IA_CSS_OUTPUT0_CONFIG_ID, + IA_CSS_OUTPUT1_CONFIG_ID, + IA_CSS_OUTPUT_CONFIG_ID, +#ifdef ISP2401 + IA_CSS_SC_CONFIG_ID, +#endif + IA_CSS_RAW_CONFIG_ID, + IA_CSS_TNR_CONFIG_ID, + IA_CSS_REF_CONFIG_ID, + IA_CSS_VF_CONFIG_ID, + IA_CSS_NUM_CONFIGURATION_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_config_memory_offsets { + struct { + struct ia_css_isp_parameter iterator; + struct ia_css_isp_parameter copy_output; + struct ia_css_isp_parameter crop; + struct ia_css_isp_parameter fpn; + struct ia_css_isp_parameter dvs; + struct ia_css_isp_parameter qplane; + struct ia_css_isp_parameter output0; + struct ia_css_isp_parameter output1; + struct ia_css_isp_parameter output; +#ifdef ISP2401 + struct ia_css_isp_parameter sc; +#endif + struct ia_css_isp_parameter raw; + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter ref; + struct ia_css_isp_parameter vf; + } dmem; +}; + +#if defined(IA_CSS_INCLUDE_CONFIGURATIONS) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_iterator( + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_copy_output( + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_crop( + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_fpn( + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_dvs( + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_qplane( + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output0( + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output1( + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output( + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +#ifdef ISP2401 +void +ia_css_configure_sc( + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +#endif +void +ia_css_configure_raw( + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_tnr( + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_ref( + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_vf( + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); + +#endif /* IA_CSS_INCLUDE_CONFIGURATION */ + +#endif /* _IA_CSS_ISP_CONFIG_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c new file mode 100644 index 0000000000000..11e4463ebb506 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c @@ -0,0 +1,3220 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#define IA_CSS_INCLUDE_PARAMETERS +#include "sh_css_params.h" +#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" +#include "isp/kernels/anr/anr_1.0/ia_css_anr.host.h" +#include "isp/kernels/anr/anr_2/ia_css_anr2.host.h" +#include "isp/kernels/bh/bh_2/ia_css_bh.host.h" +#include "isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h" +#include "isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h" +#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" +#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" +#include "isp/kernels/csc/csc_1.0/ia_css_csc.host.h" +#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h" +#include "isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h" +#include "isp/kernels/ctc/ctc2/ia_css_ctc2.host.h" +#include "isp/kernels/de/de_1.0/ia_css_de.host.h" +#include "isp/kernels/de/de_2/ia_css_de2.host.h" +#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" +#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" +#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" +#include "isp/kernels/gc/gc_1.0/ia_css_gc.host.h" +#include "isp/kernels/gc/gc_2/ia_css_gc2.host.h" +#include "isp/kernels/macc/macc_1.0/ia_css_macc.host.h" +#include "isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h" +#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" +#include "isp/kernels/ob/ob2/ia_css_ob2.host.h" +#include "isp/kernels/output/output_1.0/ia_css_output.host.h" +#include "isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h" +#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" +#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" +#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h" +#include "isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h" +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/uds/uds_1.0/ia_css_uds_param.h" +#include "isp/kernels/wb/wb_1.0/ia_css_wb.host.h" +#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h" +#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h" +#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" +#include "isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h" +#include "isp/kernels/fc/fc_1.0/ia_css_formats.host.h" +#include "isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h" +#include "isp/kernels/dpc2/ia_css_dpc2.host.h" +#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" +#include "isp/kernels/bnlm/ia_css_bnlm.host.h" +#include "isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h" +/* Generated code: do not edit or commmit. */ + +#include "ia_css_pipeline.h" +#include "ia_css_isp_params.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_aa( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + + if (size) { + struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + t->strength = params->aa_config.strength; + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_anr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); + + ia_css_anr_encode((struct sh_css_isp_anr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->anr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_anr2( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); + + ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->anr_thres, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bh( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); + + ia_css_bh_encode((struct sh_css_isp_bh_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_cnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); + + ia_css_cnr_encode((struct sh_css_isp_cnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_crop( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); + + ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->crop_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_csc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); + + ia_css_csc_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_dp( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); + + ia_css_dp_encode((struct sh_css_isp_dp_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dp_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); + + ia_css_bnr_encode((struct sh_css_isp_bnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_de( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); + + ia_css_de_encode((struct sh_css_isp_de_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->de_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ecd( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); + + ia_css_ecd_encode((struct sh_css_isp_ecd_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ecd_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_formats( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); + + ia_css_formats_encode((struct sh_css_isp_formats_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->formats_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_fpn( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); + + ia_css_fpn_encode((struct sh_css_isp_fpn_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fpn_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_gc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); + + ia_css_gc_encode((struct sh_css_isp_gc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->gc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); + + ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->gc_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ce( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); + + ia_css_ce_encode((struct sh_css_isp_ce_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ce_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_yuv2rgb( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); + + ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yuv2rgb_cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_rgb2yuv( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); + + ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->rgb2yuv_cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_r_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); + + ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->r_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_g_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); + + ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->g_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_b_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); + + ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], + ¶ms->b_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_uds( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + + if (size) { + struct sh_css_sp_uds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); + + p = (struct sh_css_sp_uds_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + p->crop_pos = params->uds_config.crop_pos; + p->uds = params->uds_config.uds; + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_raa( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); + + ia_css_raa_encode((struct sh_css_isp_aa_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->raa_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_s3a( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); + + ia_css_s3a_encode((struct sh_css_isp_s3a_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ob( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); + + ia_css_ob_encode((struct sh_css_isp_ob_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ob_config, +¶ms->stream_configs.ob, size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); + + ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->ob_config, +¶ms->stream_configs.ob, size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_output( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); + + ia_css_output_encode((struct sh_css_isp_output_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->output_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); + + ia_css_sc_encode((struct sh_css_isp_sc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->sc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bds( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + + if (size) { + struct sh_css_isp_bds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); + + p = (struct sh_css_isp_bds_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + p->baf_strength = params->bds_config.strength; + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_tnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); + + ia_css_tnr_encode((struct sh_css_isp_tnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->tnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_macc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); + + ia_css_macc_encode((struct sh_css_isp_macc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->macc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_horicoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); + + ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_vertcoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); + + ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_horiproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); + + ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_vertproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); + + ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_horicoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); + + ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_vertcoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); + + ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_horiproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); + + ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_vertproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); + + ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_wb( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); + + ia_css_wb_encode((struct sh_css_isp_wb_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->wb_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_nr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); + + ia_css_nr_encode((struct sh_css_isp_ynr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_yee( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); + + ia_css_yee_encode((struct sh_css_isp_yee_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yee_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ynr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); + + ia_css_ynr_encode((struct sh_css_isp_yee2_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ynr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_fc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); + + ia_css_fc_encode((struct sh_css_isp_fc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ctc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + + ia_css_ctc_encode((struct sh_css_isp_ctc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ctc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + + ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->ctc_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr_table( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); + + ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->xnr_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); + + ia_css_xnr_encode((struct sh_css_isp_xnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr3( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + + ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr3_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + } + + } +#ifdef ISP2401 + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + + ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->xnr3_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + } + + } +#endif +} + +/* Code generated by genparam/gencode.c:gen_param_process_table() */ + +void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) = { + ia_css_process_aa, + ia_css_process_anr, + ia_css_process_anr2, + ia_css_process_bh, + ia_css_process_cnr, + ia_css_process_crop, + ia_css_process_csc, + ia_css_process_dp, + ia_css_process_bnr, + ia_css_process_de, + ia_css_process_ecd, + ia_css_process_formats, + ia_css_process_fpn, + ia_css_process_gc, + ia_css_process_ce, + ia_css_process_yuv2rgb, + ia_css_process_rgb2yuv, + ia_css_process_r_gamma, + ia_css_process_g_gamma, + ia_css_process_b_gamma, + ia_css_process_uds, + ia_css_process_raa, + ia_css_process_s3a, + ia_css_process_ob, + ia_css_process_output, + ia_css_process_sc, + ia_css_process_bds, + ia_css_process_tnr, + ia_css_process_macc, + ia_css_process_sdis_horicoef, + ia_css_process_sdis_vertcoef, + ia_css_process_sdis_horiproj, + ia_css_process_sdis_vertproj, + ia_css_process_sdis2_horicoef, + ia_css_process_sdis2_vertcoef, + ia_css_process_sdis2_horiproj, + ia_css_process_sdis2_vertproj, + ia_css_process_wb, + ia_css_process_nr, + ia_css_process_yee, + ia_css_process_ynr, + ia_css_process_fc, + ia_css_process_ctc, + ia_css_process_xnr_table, + ia_css_process_xnr, + ia_css_process_xnr3, +}; + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_dp_config(const struct ia_css_isp_parameters *params, + struct ia_css_dp_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: " + "config=%p\n",config); + + *config = params->dp_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() leave\n"); + ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_dp_config(struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); + ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dp_config = *config; + params->config_changed[IA_CSS_DP_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_DP_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_wb_config(const struct ia_css_isp_parameters *params, + struct ia_css_wb_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: " + "config=%p\n",config); + + *config = params->wb_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() leave\n"); + ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_wb_config(struct ia_css_isp_parameters *params, + const struct ia_css_wb_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); + ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->wb_config = *config; + params->config_changed[IA_CSS_WB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_WB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_tnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: " + "config=%p\n",config); + + *config = params->tnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() leave\n"); + ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_tnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_tnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); + ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->tnr_config = *config; + params->config_changed[IA_CSS_TNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_TNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ob_config(const struct ia_css_isp_parameters *params, + struct ia_css_ob_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: " + "config=%p\n",config); + + *config = params->ob_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() leave\n"); + ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ob_config(struct ia_css_isp_parameters *params, + const struct ia_css_ob_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); + ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ob_config = *config; + params->config_changed[IA_CSS_OB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_OB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_de_config(const struct ia_css_isp_parameters *params, + struct ia_css_de_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: " + "config=%p\n",config); + + *config = params->de_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() leave\n"); + ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_de_config(struct ia_css_isp_parameters *params, + const struct ia_css_de_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); + ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->de_config = *config; + params->config_changed[IA_CSS_DE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_DE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_anr_config(const struct ia_css_isp_parameters *params, + struct ia_css_anr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: " + "config=%p\n",config); + + *config = params->anr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() leave\n"); + ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); + ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->anr_config = *config; + params->config_changed[IA_CSS_ANR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ANR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, + struct ia_css_anr_thres *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: " + "config=%p\n",config); + + *config = params->anr_thres; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() leave\n"); + ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr2_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_thres *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); + ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->anr_thres = *config; + params->config_changed[IA_CSS_ANR2_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ANR2_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ce_config(const struct ia_css_isp_parameters *params, + struct ia_css_ce_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: " + "config=%p\n",config); + + *config = params->ce_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() leave\n"); + ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ce_config(struct ia_css_isp_parameters *params, + const struct ia_css_ce_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); + ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ce_config = *config; + params->config_changed[IA_CSS_CE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, + struct ia_css_ecd_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: " + "config=%p\n",config); + + *config = params->ecd_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() leave\n"); + ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ecd_config(struct ia_css_isp_parameters *params, + const struct ia_css_ecd_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); + ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ecd_config = *config; + params->config_changed[IA_CSS_ECD_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ECD_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, + struct ia_css_ynr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: " + "config=%p\n",config); + + *config = params->ynr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() leave\n"); + ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ynr_config(struct ia_css_isp_parameters *params, + const struct ia_css_ynr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); + ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ynr_config = *config; + params->config_changed[IA_CSS_YNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_YNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_fc_config(const struct ia_css_isp_parameters *params, + struct ia_css_fc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: " + "config=%p\n",config); + + *config = params->fc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() leave\n"); + ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_fc_config(struct ia_css_isp_parameters *params, + const struct ia_css_fc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); + ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->fc_config = *config; + params->config_changed[IA_CSS_FC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_FC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_cnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: " + "config=%p\n",config); + + *config = params->cnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() leave\n"); + ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_cnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_cnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); + ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->cnr_config = *config; + params->config_changed[IA_CSS_CNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_macc_config(const struct ia_css_isp_parameters *params, + struct ia_css_macc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: " + "config=%p\n",config); + + *config = params->macc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() leave\n"); + ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_macc_config(struct ia_css_isp_parameters *params, + const struct ia_css_macc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); + ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->macc_config = *config; + params->config_changed[IA_CSS_MACC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_MACC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, + struct ia_css_ctc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: " + "config=%p\n",config); + + *config = params->ctc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() leave\n"); + ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ctc_config(struct ia_css_isp_parameters *params, + const struct ia_css_ctc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); + ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ctc_config = *config; + params->config_changed[IA_CSS_CTC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CTC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_aa_config(const struct ia_css_isp_parameters *params, + struct ia_css_aa_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: " + "config=%p\n",config); + + *config = params->aa_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() leave\n"); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_aa_config(struct ia_css_isp_parameters *params, + const struct ia_css_aa_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); + params->aa_config = *config; + params->config_changed[IA_CSS_AA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_AA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: " + "config=%p\n",config); + + *config = params->yuv2rgb_cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() leave\n"); + ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); + ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->yuv2rgb_cc_config = *config; + params->config_changed[IA_CSS_YUV2RGB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_YUV2RGB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: " + "config=%p\n",config); + + *config = params->rgb2yuv_cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() leave\n"); + ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); + ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->rgb2yuv_cc_config = *config; + params->config_changed[IA_CSS_RGB2YUV_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_RGB2YUV_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_csc_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: " + "config=%p\n",config); + + *config = params->cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() leave\n"); + ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_csc_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); + ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->cc_config = *config; + params->config_changed[IA_CSS_CSC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CSC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_nr_config(const struct ia_css_isp_parameters *params, + struct ia_css_nr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: " + "config=%p\n",config); + + *config = params->nr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() leave\n"); + ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_nr_config(struct ia_css_isp_parameters *params, + const struct ia_css_nr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); + ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->nr_config = *config; + params->config_changed[IA_CSS_BNR_ID] = true; + params->config_changed[IA_CSS_NR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_NR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_gc_config(const struct ia_css_isp_parameters *params, + struct ia_css_gc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: " + "config=%p\n",config); + + *config = params->gc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() leave\n"); + ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_gc_config(struct ia_css_isp_parameters *params, + const struct ia_css_gc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); + ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->gc_config = *config; + params->config_changed[IA_CSS_GC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_GC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() leave\n"); + ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); + ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() leave\n"); + ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); + ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() leave\n"); + ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); + ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() leave\n"); + ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); + ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() leave\n"); + ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); + ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() leave\n"); + ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); + ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() leave\n"); + ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); + ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() leave\n"); + ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); + ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: " + "config=%p\n",config); + + *config = params->r_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() leave\n"); + ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); + ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->r_gamma_table = *config; + params->config_changed[IA_CSS_R_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_R_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: " + "config=%p\n",config); + + *config = params->g_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() leave\n"); + ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); + ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->g_gamma_table = *config; + params->config_changed[IA_CSS_G_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_G_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: " + "config=%p\n",config); + + *config = params->b_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() leave\n"); + ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); + ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->b_gamma_table = *config; + params->config_changed[IA_CSS_B_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_B_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: " + "config=%p\n",config); + + *config = params->xnr_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() leave\n"); + ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); + ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr_table = *config; + params->config_changed[IA_CSS_XNR_TABLE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR_TABLE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_formats_config(const struct ia_css_isp_parameters *params, + struct ia_css_formats_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: " + "config=%p\n",config); + + *config = params->formats_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() leave\n"); + ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_formats_config(struct ia_css_isp_parameters *params, + const struct ia_css_formats_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); + ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->formats_config = *config; + params->config_changed[IA_CSS_FORMATS_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_FORMATS_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: " + "config=%p\n",config); + + *config = params->xnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() leave\n"); + ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); + ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr_config = *config; + params->config_changed[IA_CSS_XNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr3_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: " + "config=%p\n",config); + + *config = params->xnr3_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() leave\n"); + ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr3_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); + ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr3_config = *config; + params->config_changed[IA_CSS_XNR3_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR3_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, + struct ia_css_3a_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: " + "config=%p\n",config); + + *config = params->s3a_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() leave\n"); + ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_s3a_config(struct ia_css_isp_parameters *params, + const struct ia_css_3a_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); + ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->s3a_config = *config; + params->config_changed[IA_CSS_BH_ID] = true; + params->config_changed[IA_CSS_S3A_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_S3A_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_output_config(const struct ia_css_isp_parameters *params, + struct ia_css_output_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: " + "config=%p\n",config); + + *config = params->output_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() leave\n"); + ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_output_config(struct ia_css_isp_parameters *params, + const struct ia_css_output_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); + ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->output_config = *config; + params->config_changed[IA_CSS_OUTPUT_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_OUTPUT_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_get_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +{ + ia_css_get_dp_config(params, config->dp_config); + ia_css_get_wb_config(params, config->wb_config); + ia_css_get_tnr_config(params, config->tnr_config); + ia_css_get_ob_config(params, config->ob_config); + ia_css_get_de_config(params, config->de_config); + ia_css_get_anr_config(params, config->anr_config); + ia_css_get_anr2_config(params, config->anr_thres); + ia_css_get_ce_config(params, config->ce_config); + ia_css_get_ecd_config(params, config->ecd_config); + ia_css_get_ynr_config(params, config->ynr_config); + ia_css_get_fc_config(params, config->fc_config); + ia_css_get_cnr_config(params, config->cnr_config); + ia_css_get_macc_config(params, config->macc_config); + ia_css_get_ctc_config(params, config->ctc_config); + ia_css_get_aa_config(params, config->aa_config); + ia_css_get_yuv2rgb_config(params, config->yuv2rgb_cc_config); + ia_css_get_rgb2yuv_config(params, config->rgb2yuv_cc_config); + ia_css_get_csc_config(params, config->cc_config); + ia_css_get_nr_config(params, config->nr_config); + ia_css_get_gc_config(params, config->gc_config); + ia_css_get_sdis_horicoef_config(params, config->dvs_coefs); + ia_css_get_sdis_vertcoef_config(params, config->dvs_coefs); + ia_css_get_sdis_horiproj_config(params, config->dvs_coefs); + ia_css_get_sdis_vertproj_config(params, config->dvs_coefs); + ia_css_get_sdis2_horicoef_config(params, config->dvs2_coefs); + ia_css_get_sdis2_vertcoef_config(params, config->dvs2_coefs); + ia_css_get_sdis2_horiproj_config(params, config->dvs2_coefs); + ia_css_get_sdis2_vertproj_config(params, config->dvs2_coefs); + ia_css_get_r_gamma_config(params, config->r_gamma_table); + ia_css_get_g_gamma_config(params, config->g_gamma_table); + ia_css_get_b_gamma_config(params, config->b_gamma_table); + ia_css_get_xnr_table_config(params, config->xnr_table); + ia_css_get_formats_config(params, config->formats_config); + ia_css_get_xnr_config(params, config->xnr_config); + ia_css_get_xnr3_config(params, config->xnr3_config); + ia_css_get_s3a_config(params, config->s3a_config); + ia_css_get_output_config(params, config->output_config); +} + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_set_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +{ + ia_css_set_dp_config(params, config->dp_config); + ia_css_set_wb_config(params, config->wb_config); + ia_css_set_tnr_config(params, config->tnr_config); + ia_css_set_ob_config(params, config->ob_config); + ia_css_set_de_config(params, config->de_config); + ia_css_set_anr_config(params, config->anr_config); + ia_css_set_anr2_config(params, config->anr_thres); + ia_css_set_ce_config(params, config->ce_config); + ia_css_set_ecd_config(params, config->ecd_config); + ia_css_set_ynr_config(params, config->ynr_config); + ia_css_set_fc_config(params, config->fc_config); + ia_css_set_cnr_config(params, config->cnr_config); + ia_css_set_macc_config(params, config->macc_config); + ia_css_set_ctc_config(params, config->ctc_config); + ia_css_set_aa_config(params, config->aa_config); + ia_css_set_yuv2rgb_config(params, config->yuv2rgb_cc_config); + ia_css_set_rgb2yuv_config(params, config->rgb2yuv_cc_config); + ia_css_set_csc_config(params, config->cc_config); + ia_css_set_nr_config(params, config->nr_config); + ia_css_set_gc_config(params, config->gc_config); + ia_css_set_sdis_horicoef_config(params, config->dvs_coefs); + ia_css_set_sdis_vertcoef_config(params, config->dvs_coefs); + ia_css_set_sdis_horiproj_config(params, config->dvs_coefs); + ia_css_set_sdis_vertproj_config(params, config->dvs_coefs); + ia_css_set_sdis2_horicoef_config(params, config->dvs2_coefs); + ia_css_set_sdis2_vertcoef_config(params, config->dvs2_coefs); + ia_css_set_sdis2_horiproj_config(params, config->dvs2_coefs); + ia_css_set_sdis2_vertproj_config(params, config->dvs2_coefs); + ia_css_set_r_gamma_config(params, config->r_gamma_table); + ia_css_set_g_gamma_config(params, config->g_gamma_table); + ia_css_set_b_gamma_config(params, config->b_gamma_table); + ia_css_set_xnr_table_config(params, config->xnr_table); + ia_css_set_formats_config(params, config->formats_config); + ia_css_set_xnr_config(params, config->xnr_config); + ia_css_set_xnr3_config(params, config->xnr3_config); + ia_css_set_s3a_config(params, config->s3a_config); + ia_css_set_output_config(params, config->output_config); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h new file mode 100644 index 0000000000000..5b3deb7f74aec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h @@ -0,0 +1,399 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_PARAM_H +#define _IA_CSS_ISP_PARAM_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_parameter_ids { + IA_CSS_AA_ID, + IA_CSS_ANR_ID, + IA_CSS_ANR2_ID, + IA_CSS_BH_ID, + IA_CSS_CNR_ID, + IA_CSS_CROP_ID, + IA_CSS_CSC_ID, + IA_CSS_DP_ID, + IA_CSS_BNR_ID, + IA_CSS_DE_ID, + IA_CSS_ECD_ID, + IA_CSS_FORMATS_ID, + IA_CSS_FPN_ID, + IA_CSS_GC_ID, + IA_CSS_CE_ID, + IA_CSS_YUV2RGB_ID, + IA_CSS_RGB2YUV_ID, + IA_CSS_R_GAMMA_ID, + IA_CSS_G_GAMMA_ID, + IA_CSS_B_GAMMA_ID, + IA_CSS_UDS_ID, + IA_CSS_RAA_ID, + IA_CSS_S3A_ID, + IA_CSS_OB_ID, + IA_CSS_OUTPUT_ID, + IA_CSS_SC_ID, + IA_CSS_BDS_ID, + IA_CSS_TNR_ID, + IA_CSS_MACC_ID, + IA_CSS_SDIS_HORICOEF_ID, + IA_CSS_SDIS_VERTCOEF_ID, + IA_CSS_SDIS_HORIPROJ_ID, + IA_CSS_SDIS_VERTPROJ_ID, + IA_CSS_SDIS2_HORICOEF_ID, + IA_CSS_SDIS2_VERTCOEF_ID, + IA_CSS_SDIS2_HORIPROJ_ID, + IA_CSS_SDIS2_VERTPROJ_ID, + IA_CSS_WB_ID, + IA_CSS_NR_ID, + IA_CSS_YEE_ID, + IA_CSS_YNR_ID, + IA_CSS_FC_ID, + IA_CSS_CTC_ID, + IA_CSS_XNR_TABLE_ID, + IA_CSS_XNR_ID, + IA_CSS_XNR3_ID, + IA_CSS_NUM_PARAMETER_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_memory_offsets { + struct { + struct ia_css_isp_parameter aa; + struct ia_css_isp_parameter anr; + struct ia_css_isp_parameter bh; + struct ia_css_isp_parameter cnr; + struct ia_css_isp_parameter crop; + struct ia_css_isp_parameter csc; + struct ia_css_isp_parameter dp; + struct ia_css_isp_parameter bnr; + struct ia_css_isp_parameter de; + struct ia_css_isp_parameter ecd; + struct ia_css_isp_parameter formats; + struct ia_css_isp_parameter fpn; + struct ia_css_isp_parameter gc; + struct ia_css_isp_parameter ce; + struct ia_css_isp_parameter yuv2rgb; + struct ia_css_isp_parameter rgb2yuv; + struct ia_css_isp_parameter uds; + struct ia_css_isp_parameter raa; + struct ia_css_isp_parameter s3a; + struct ia_css_isp_parameter ob; + struct ia_css_isp_parameter output; + struct ia_css_isp_parameter sc; + struct ia_css_isp_parameter bds; + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter macc; + struct ia_css_isp_parameter sdis_horiproj; + struct ia_css_isp_parameter sdis_vertproj; + struct ia_css_isp_parameter sdis2_horiproj; + struct ia_css_isp_parameter sdis2_vertproj; + struct ia_css_isp_parameter wb; + struct ia_css_isp_parameter nr; + struct ia_css_isp_parameter yee; + struct ia_css_isp_parameter ynr; + struct ia_css_isp_parameter fc; + struct ia_css_isp_parameter ctc; + struct ia_css_isp_parameter xnr; + struct ia_css_isp_parameter xnr3; + struct ia_css_isp_parameter get; + struct ia_css_isp_parameter put; + } dmem; + struct { + struct ia_css_isp_parameter anr2; + struct ia_css_isp_parameter ob; + struct ia_css_isp_parameter sdis_horicoef; + struct ia_css_isp_parameter sdis_vertcoef; + struct ia_css_isp_parameter sdis2_horicoef; + struct ia_css_isp_parameter sdis2_vertcoef; +#ifdef ISP2401 + struct ia_css_isp_parameter xnr3; +#endif + } vmem; + struct { + struct ia_css_isp_parameter bh; + } hmem0; + struct { + struct ia_css_isp_parameter gc; + struct ia_css_isp_parameter g_gamma; + struct ia_css_isp_parameter xnr_table; + } vamem1; + struct { + struct ia_css_isp_parameter r_gamma; + struct ia_css_isp_parameter ctc; + } vamem0; + struct { + struct ia_css_isp_parameter b_gamma; + } vamem2; +}; + +#if defined(IA_CSS_INCLUDE_PARAMETERS) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/gencode.c:gen_param_process_table() */ + +struct ia_css_pipeline_stage; /* forward declaration */ + +extern void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_dp_config(struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_wb_config(struct ia_css_isp_parameters *params, + const struct ia_css_wb_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_tnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_tnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ob_config(struct ia_css_isp_parameters *params, + const struct ia_css_ob_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_de_config(struct ia_css_isp_parameters *params, + const struct ia_css_de_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr2_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_thres *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ce_config(struct ia_css_isp_parameters *params, + const struct ia_css_ce_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ecd_config(struct ia_css_isp_parameters *params, + const struct ia_css_ecd_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ynr_config(struct ia_css_isp_parameters *params, + const struct ia_css_ynr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_fc_config(struct ia_css_isp_parameters *params, + const struct ia_css_fc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_cnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_cnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_macc_config(struct ia_css_isp_parameters *params, + const struct ia_css_macc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ctc_config(struct ia_css_isp_parameters *params, + const struct ia_css_ctc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_aa_config(struct ia_css_isp_parameters *params, + const struct ia_css_aa_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_csc_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_nr_config(struct ia_css_isp_parameters *params, + const struct ia_css_nr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_gc_config(struct ia_css_isp_parameters *params, + const struct ia_css_gc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_formats_config(struct ia_css_isp_parameters *params, + const struct ia_css_formats_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr3_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_s3a_config(struct ia_css_isp_parameters *params, + const struct ia_css_3a_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_output_config(struct ia_css_isp_parameters *params, + const struct ia_css_output_config *config); + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_get_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +; +#ifdef ISP2401 + +#endif +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_set_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +; +#ifdef ISP2401 + +#endif +#endif /* IA_CSS_INCLUDE_PARAMETER */ + +#endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c new file mode 100644 index 0000000000000..e87d05bc73ae8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c @@ -0,0 +1,214 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#include "ia_css_pipeline.h" +#include "ia_css_isp_states.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_aa_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.aa.size; + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; + + if (size) + memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_cnr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; + + if (size) { + ia_css_init_cnr_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_cnr2_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; + + if (size) { + ia_css_init_cnr2_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_dp_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.dp.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; + + if (size) { + ia_css_init_dp_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_de_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.de.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; + + if (size) { + ia_css_init_de_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_tnr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; + + if (size) { + ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_ref_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->dmem.ref.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; + + if (size) { + ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_ynr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; + + if (size) { + ia_css_init_ynr_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_state_init_table() */ + +void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = { + ia_css_initialize_aa_state, + ia_css_initialize_cnr_state, + ia_css_initialize_cnr2_state, + ia_css_initialize_dp_state, + ia_css_initialize_de_state, + ia_css_initialize_tnr_state, + ia_css_initialize_ref_state, + ia_css_initialize_ynr_state, +}; + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h new file mode 100644 index 0000000000000..732adafb0a633 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h @@ -0,0 +1,72 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#define IA_CSS_INCLUDE_STATES +#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" +#include "isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h" +#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" +#include "isp/kernels/de/de_1.0/ia_css_de.host.h" +#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" +#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" +#include "isp/kernels/dpc2/ia_css_dpc2.host.h" +#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_STATE_H +#define _IA_CSS_ISP_STATE_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_state_ids { + IA_CSS_AA_STATE_ID, + IA_CSS_CNR_STATE_ID, + IA_CSS_CNR2_STATE_ID, + IA_CSS_DP_STATE_ID, + IA_CSS_DE_STATE_ID, + IA_CSS_TNR_STATE_ID, + IA_CSS_REF_STATE_ID, + IA_CSS_YNR_STATE_ID, + IA_CSS_NUM_STATE_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_state_memory_offsets { + struct { + struct ia_css_isp_parameter aa; + struct ia_css_isp_parameter cnr; + struct ia_css_isp_parameter cnr2; + struct ia_css_isp_parameter dp; + struct ia_css_isp_parameter de; + struct ia_css_isp_parameter ynr; + } vmem; + struct { + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter ref; + } dmem; +}; + +#if defined(IA_CSS_INCLUDE_STATES) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/genstate.c:gen_state_init_table() */ + +extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary); + +#endif /* IA_CSS_INCLUDE_STATE */ + +#endif /* _IA_CSS_ISP_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c new file mode 100644 index 0000000000000..505e2b600beb9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + + +#include "system_global.h" + +const uint32_t N_SHORT_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { + 4, /* 4 entries at CSI_RX_BACKEND0_ID*/ + 4, /* 4 entries at CSI_RX_BACKEND1_ID*/ + 4 /* 4 entries at CSI_RX_BACKEND2_ID*/ +}; + +const uint32_t N_LONG_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { + 8, /* 8 entries at CSI_RX_BACKEND0_ID*/ + 4, /* 4 entries at CSI_RX_BACKEND1_ID*/ + 4 /* 4 entries at CSI_RX_BACKEND2_ID*/ +}; + +const uint32_t N_CSI_RX_FE_CTRL_DLANES[N_CSI_RX_FRONTEND_ID] = { + N_CSI_RX_DLANE_ID, /* 4 dlanes for CSI_RX_FR0NTEND0_ID */ + N_CSI_RX_DLANE_ID, /* 4 dlanes for CSI_RX_FR0NTEND1_ID */ + N_CSI_RX_DLANE_ID /* 4 dlanes for CSI_RX_FR0NTEND2_ID */ +}; + +/* sid_width for CSI_RX_BACKEND_ID */ +const uint32_t N_CSI_RX_BE_SID_WIDTH[N_CSI_RX_BACKEND_ID] = { + 3, + 2, + 2 +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h new file mode 100644 index 0000000000000..a2e9d54a4a376 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h @@ -0,0 +1,61 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CSI_RX_LOCAL_H_INCLUDED__ +#define __CSI_RX_LOCAL_H_INCLUDED__ + +#include "csi_rx_global.h" +#define N_CSI_RX_BE_MIPI_COMP_FMT_REG 4 +#define N_CSI_RX_BE_MIPI_CUSTOM_PEC 12 +#define N_CSI_RX_BE_SHORT_PKT_LUT 4 +#define N_CSI_RX_BE_LONG_PKT_LUT 8 +typedef struct csi_rx_fe_ctrl_state_s csi_rx_fe_ctrl_state_t; +typedef struct csi_rx_fe_ctrl_lane_s csi_rx_fe_ctrl_lane_t; +typedef struct csi_rx_be_ctrl_state_s csi_rx_be_ctrl_state_t; +/*mipi_backend_custom_mode_pixel_extraction_config*/ +typedef struct csi_rx_be_ctrl_pec_s csi_rx_be_ctrl_pec_t; + + +struct csi_rx_fe_ctrl_lane_s { + hrt_data termen; + hrt_data settle; +}; +struct csi_rx_fe_ctrl_state_s { + hrt_data enable; + hrt_data nof_enable_lanes; + hrt_data error_handling; + hrt_data status; + hrt_data status_dlane_hs; + hrt_data status_dlane_lp; + csi_rx_fe_ctrl_lane_t clane; + csi_rx_fe_ctrl_lane_t dlane[N_CSI_RX_DLANE_ID]; +}; +struct csi_rx_be_ctrl_state_s { + hrt_data enable; + hrt_data status; + hrt_data comp_format_reg[N_CSI_RX_BE_MIPI_COMP_FMT_REG]; + hrt_data raw16; + hrt_data raw18; + hrt_data force_raw8; + hrt_data irq_status; + hrt_data custom_mode_enable; + hrt_data custom_mode_data_state; + hrt_data pec[N_CSI_RX_BE_MIPI_CUSTOM_PEC]; + hrt_data custom_mode_valid_eop_config; + hrt_data global_lut_disregard_reg; + hrt_data packet_status_stall; + hrt_data short_packet_lut_entry[N_CSI_RX_BE_SHORT_PKT_LUT]; + hrt_data long_packet_lut_entry[N_CSI_RX_BE_LONG_PKT_LUT]; +}; +#endif /* __CSI_RX_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h new file mode 100644 index 0000000000000..4fa74e7a96e62 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h @@ -0,0 +1,282 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CSI_RX_PRIVATE_H_INCLUDED__ +#define __CSI_RX_PRIVATE_H_INCLUDED__ + +#include "rx_csi_defs.h" +#include "mipi_backend_defs.h" +#include "csi_rx_public.h" + +#include "device_access.h" /* ia_css_device_load_uint32 */ + +#include "assert_support.h" /* assert */ +#include "print_support.h" /* print */ + + +/***************************************************** + * + * Native command interface (NCI). + * + *****************************************************/ +/** + * @brief Get the csi rx fe state. + * Refer to "csi_rx_public.h" for details. + */ +static inline void csi_rx_fe_ctrl_get_state( + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state) +{ + uint32_t i; + + state->enable = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ENABLE_REG_IDX); + state->nof_enable_lanes = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX); + state->error_handling = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ERROR_HANDLING_REG_IDX); + state->status = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_REG_IDX); + state->status_dlane_hs = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX); + state->status_dlane_lp = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX); + state->clane.termen = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX); + state->clane.settle = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX); + + /* + * Get the values of the register-set per + * dlane. + */ + for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) { + csi_rx_fe_ctrl_get_dlane_state( + ID, + i, + &(state->dlane[i])); + } +} + +/** + * @brief Get the state of the csi rx fe dlane process. + * Refer to "csi_rx_public.h" for details. + */ +static inline void csi_rx_fe_ctrl_get_dlane_state( + const csi_rx_frontend_ID_t ID, + const uint32_t lane, + csi_rx_fe_ctrl_lane_t *dlane_state) +{ + + dlane_state->termen = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane)); + dlane_state->settle = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane)); + +} +/** + * @brief dump the csi rx fe state. + * Refer to "csi_rx_public.h" for details. + */ +static inline void csi_rx_fe_ctrl_dump_state( + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state) +{ + uint32_t i; + + ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x \n", ID, state->enable); + ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x \n", ID, state->nof_enable_lanes); + ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x \n", ID, state->error_handling); + ia_css_print("CSI RX FE STATE Controller %d Status 0x%x \n", ID, state->status); + ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x \n", ID, state->status_dlane_hs); + ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x \n", ID, state->status_dlane_lp); + ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x \n", ID, state->clane.termen); + ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x \n", ID, state->clane.settle); + + /* + * Get the values of the register-set per + * dlane. + */ + for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) { + ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x \n", ID, i, state->dlane[i].termen); + ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x \n", ID, i, state->dlane[i].settle); + } +} + +/** + * @brief Get the csi rx be state. + * Refer to "csi_rx_public.h" for details. + */ +static inline void csi_rx_be_ctrl_get_state( + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state) +{ + uint32_t i; + + state->enable = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_ENABLE_REG_IDX); + + state->status = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_STATUS_REG_IDX); + + for(i = 0; i comp_format_reg[i] = + csi_rx_be_ctrl_reg_load(ID, + _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX+i); + } + + state->raw16 = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_IDX); + + state->raw18 = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_IDX); + state->force_raw8 = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_FORCE_RAW8_REG_IDX); + state->irq_status = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX); +#if 0 /* device access error for these registers */ + /* ToDo: rootcause this failure */ + state->custom_mode_enable = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_EN_REG_IDX); + + state->custom_mode_data_state = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX); + for(i = 0; i pec[i] = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX + i); + } + state->custom_mode_valid_eop_config = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_REG_IDX); +#endif + state->global_lut_disregard_reg = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX); + state->packet_status_stall = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX); + /* + * Get the values of the register-set per + * lut. + */ + for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) { + state->short_packet_lut_entry[i] = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX + i); + } + for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) { + state->long_packet_lut_entry[i] = + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX + i); + } +} + +/** + * @brief Dump the csi rx be state. + * Refer to "csi_rx_public.h" for details. + */ +static inline void csi_rx_be_ctrl_dump_state( + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state) +{ + uint32_t i; + + ia_css_print("CSI RX BE STATE Controller %d Enable 0x%x \n", ID, state->enable); + ia_css_print("CSI RX BE STATE Controller %d Status 0x%x \n", ID, state->status); + + for(i = 0; i status); + } + ia_css_print("CSI RX BE STATE Controller %d RAW16 0x%x \n", ID, state->raw16); + ia_css_print("CSI RX BE STATE Controller %d RAW18 0x%x \n", ID, state->raw18); + ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x \n", ID, state->force_raw8); + ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x \n", ID, state->irq_status); +#if 0 /* ToDo:Getting device access error for this register */ + for(i = 0; i pec[i]); + } +#endif + ia_css_print("CSI RX BE STATE Controller %d Global LUT disregard reg 0x%x \n", ID, state->global_lut_disregard_reg); + ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x \n", ID, state->packet_status_stall); + /* + * Get the values of the register-set per + * lut. + */ + for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) { + ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x \n", ID, i, state->short_packet_lut_entry[i]); + } + for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) { + ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x \n", ID, i, state->long_packet_lut_entry[i]); + } +} +/* end of NCI */ +/***************************************************** + * + * Device level interface (DLI). + * + *****************************************************/ +/** + * @brief Load the register value. + * Refer to "csi_rx_public.h" for details. + */ +static inline hrt_data csi_rx_fe_ctrl_reg_load( + const csi_rx_frontend_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_CSI_RX_FRONTEND_ID); + assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg*sizeof(hrt_data)); +} + + +/** + * @brief Store a value to the register. + * Refer to "ibuf_ctrl_public.h" for details. + */ +static inline void csi_rx_fe_ctrl_reg_store( + const csi_rx_frontend_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_CSI_RX_FRONTEND_ID); + assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); + + ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +} +/** + * @brief Load the register value. + * Refer to "csi_rx_public.h" for details. + */ +static inline hrt_data csi_rx_be_ctrl_reg_load( + const csi_rx_backend_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_CSI_RX_BACKEND_ID); + assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg*sizeof(hrt_data)); +} + + +/** + * @brief Store a value to the register. + * Refer to "ibuf_ctrl_public.h" for details. + */ +static inline void csi_rx_be_ctrl_reg_store( + const csi_rx_backend_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_CSI_RX_BACKEND_ID); + assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); + + ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +} +/* end of DLI */ + +#endif /* __CSI_RX_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c new file mode 100644 index 0000000000000..14973d1c27560 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include "system_global.h" + +const uint32_t N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID] = { + 8, /* IBUF_CTRL0_ID supports at most 8 processes */ + 4, /* IBUF_CTRL1_ID supports at most 4 processes */ + 4 /* IBUF_CTRL2_ID supports at most 4 processes */ +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h new file mode 100644 index 0000000000000..ea40284623d1c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h @@ -0,0 +1,58 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IBUF_CTRL_LOCAL_H_INCLUDED__ +#define __IBUF_CTRL_LOCAL_H_INCLUDED__ + +#include "ibuf_ctrl_global.h" + +typedef struct ibuf_ctrl_proc_state_s ibuf_ctrl_proc_state_t; +typedef struct ibuf_ctrl_state_s ibuf_ctrl_state_t; + +struct ibuf_ctrl_proc_state_s { + hrt_data num_items; + hrt_data num_stores; + hrt_data dma_channel; + hrt_data dma_command; + hrt_data ibuf_st_addr; + hrt_data ibuf_stride; + hrt_data ibuf_end_addr; + hrt_data dest_st_addr; + hrt_data dest_stride; + hrt_data dest_end_addr; + hrt_data sync_frame; + hrt_data sync_command; + hrt_data store_command; + hrt_data shift_returned_items; + hrt_data elems_ibuf; + hrt_data elems_dest; + hrt_data cur_stores; + hrt_data cur_acks; + hrt_data cur_s2m_ibuf_addr; + hrt_data cur_dma_ibuf_addr; + hrt_data cur_dma_dest_addr; + hrt_data cur_isp_dest_addr; + hrt_data dma_cmds_send; + hrt_data main_cntrl_state; + hrt_data dma_sync_state; + hrt_data isp_sync_state; +}; + +struct ibuf_ctrl_state_s { + hrt_data recalc_words; + hrt_data arbiters; + ibuf_ctrl_proc_state_t proc_state[N_STREAM2MMIO_SID_ID]; +}; + +#endif /* __IBUF_CTRL_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h new file mode 100644 index 0000000000000..4d07c2fe14696 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h @@ -0,0 +1,233 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IBUF_CTRL_PRIVATE_H_INCLUDED__ +#define __IBUF_CTRL_PRIVATE_H_INCLUDED__ + +#include "ibuf_ctrl_public.h" + +#include "device_access.h" /* ia_css_device_load_uint32 */ + +#include "assert_support.h" /* assert */ +#include "print_support.h" /* print */ + + +/***************************************************** + * + * Native command interface (NCI). + * + *****************************************************/ +/** + * @brief Get the ibuf-controller state. + * Refer to "ibuf_ctrl_public.h" for details. + */ +STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state) +{ + uint32_t i; + + state->recalc_words = + ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS); + state->arbiters = + ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS); + + /* + * Get the values of the register-set per + * ibuf-controller process. + */ + for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) { + ibuf_ctrl_get_proc_state( + ID, + i, + &(state->proc_state[i])); + } +} + +/** + * @brief Get the state of the ibuf-controller process. + * Refer to "ibuf_ctrl_public.h" for details. + */ +STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state( + const ibuf_ctrl_ID_t ID, + const uint32_t proc_id, + ibuf_ctrl_proc_state_t *state) +{ + hrt_address reg_bank_offset; + + reg_bank_offset = + _IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id); + + state->num_items = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE); + + state->num_stores = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME); + + state->dma_channel = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL); + + state->dma_command = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD); + + state->ibuf_st_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS); + + state->ibuf_stride = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE); + + state->ibuf_end_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS); + + state->dest_st_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS); + + state->dest_stride = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE); + + state->dest_end_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS); + + state->sync_frame = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME); + + state->sync_command = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD); + + state->store_command = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD); + + state->shift_returned_items = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS); + + state->elems_ibuf = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF); + + state->elems_dest = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST); + + state->cur_stores = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES); + + state->cur_acks = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS); + + state->cur_s2m_ibuf_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR); + + state->cur_dma_ibuf_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR); + + state->cur_dma_dest_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR); + + state->cur_isp_dest_addr = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR); + + state->dma_cmds_send = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND); + + state->main_cntrl_state = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE); + + state->dma_sync_state = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE); + + state->isp_sync_state = + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE); +} +/** + * @brief Dump the ibuf-controller state. + * Refer to "ibuf_ctrl_public.h" for details. + */ +STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state( + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state) +{ + uint32_t i; + ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID, state->recalc_words); + ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters); + + /* + * Dump the values of the register-set per + * ibuf-controller process. + */ + for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) { + ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i, state->proc_state[i].num_items); + ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i, state->proc_state[i].num_stores); + ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i, state->proc_state[i].dma_channel); + ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i, state->proc_state[i].dma_command); + ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_st_addr); + ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i, state->proc_state[i].ibuf_stride); + ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_end_addr); + ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i, state->proc_state[i].dest_st_addr); + ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i, state->proc_state[i].dest_stride); + ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i, state->proc_state[i].dest_end_addr); + ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i, state->proc_state[i].sync_frame); + ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i, state->proc_state[i].sync_command); + ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i, state->proc_state[i].store_command); + ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n", ID, i, state->proc_state[i].shift_returned_items); + ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i, state->proc_state[i].elems_ibuf); + ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i, state->proc_state[i].elems_dest); + ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i, state->proc_state[i].cur_stores); + ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i, state->proc_state[i].cur_acks); + ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_s2m_ibuf_addr); + ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_ibuf_addr); + ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_dest_addr); + ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_isp_dest_addr); + ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i, state->proc_state[i].dma_cmds_send); + ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID, i, state->proc_state[i].main_cntrl_state); + ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i, state->proc_state[i].dma_sync_state); + ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, state->proc_state[i].isp_sync_state); + } +} +/* end of NCI */ + +/***************************************************** + * + * Device level interface (DLI). + * + *****************************************************/ +/** + * @brief Load the register value. + * Refer to "ibuf_ctrl_public.h" for details. + */ +STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load( + const ibuf_ctrl_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_IBUF_CTRL_ID); + assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data)); +} + + +/** + * @brief Store a value to the register. + * Refer to "ibuf_ctrl_public.h" for details. + */ +STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_reg_store( + const ibuf_ctrl_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_IBUF_CTRL_ID); + assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); + + ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +} +/* end of DLI */ + + +#endif /* __IBUF_CTRL_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h new file mode 100644 index 0000000000000..f199423e28dae --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h @@ -0,0 +1,106 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ +#define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ + +#include "type_support.h" +#include "input_system_global.h" + +#include "ibuf_ctrl.h" +#include "csi_rx.h" +#include "pixelgen.h" +#include "isys_stream2mmio.h" +#include "isys_irq.h" + +typedef input_system_err_t input_system_error_t; + +typedef enum { + MIPI_FORMAT_SHORT1 = 0x08, + MIPI_FORMAT_SHORT2, + MIPI_FORMAT_SHORT3, + MIPI_FORMAT_SHORT4, + MIPI_FORMAT_SHORT5, + MIPI_FORMAT_SHORT6, + MIPI_FORMAT_SHORT7, + MIPI_FORMAT_SHORT8, + MIPI_FORMAT_EMBEDDED = 0x12, + MIPI_FORMAT_YUV420_8 = 0x18, + MIPI_FORMAT_YUV420_10, + MIPI_FORMAT_YUV420_8_LEGACY, + MIPI_FORMAT_YUV420_8_SHIFT = 0x1C, + MIPI_FORMAT_YUV420_10_SHIFT, + MIPI_FORMAT_YUV422_8 = 0x1E, + MIPI_FORMAT_YUV422_10, + MIPI_FORMAT_RGB444 = 0x20, + MIPI_FORMAT_RGB555, + MIPI_FORMAT_RGB565, + MIPI_FORMAT_RGB666, + MIPI_FORMAT_RGB888, + MIPI_FORMAT_RAW6 = 0x28, + MIPI_FORMAT_RAW7, + MIPI_FORMAT_RAW8, + MIPI_FORMAT_RAW10, + MIPI_FORMAT_RAW12, + MIPI_FORMAT_RAW14, + MIPI_FORMAT_CUSTOM0 = 0x30, + MIPI_FORMAT_CUSTOM1, + MIPI_FORMAT_CUSTOM2, + MIPI_FORMAT_CUSTOM3, + MIPI_FORMAT_CUSTOM4, + MIPI_FORMAT_CUSTOM5, + MIPI_FORMAT_CUSTOM6, + MIPI_FORMAT_CUSTOM7, + //MIPI_FORMAT_RAW16, /*not supported by 2401*/ + //MIPI_FORMAT_RAW18, + N_MIPI_FORMAT +} mipi_format_t; + +#define N_MIPI_FORMAT_CUSTOM 8 + +/* The number of stores for compressed format types */ +#define N_MIPI_COMPRESSOR_CONTEXT (N_RX_CHANNEL_ID * N_MIPI_FORMAT_CUSTOM) +#define UNCOMPRESSED_BITS_PER_PIXEL_10 10 +#define UNCOMPRESSED_BITS_PER_PIXEL_12 12 +#define COMPRESSED_BITS_PER_PIXEL_6 6 +#define COMPRESSED_BITS_PER_PIXEL_7 7 +#define COMPRESSED_BITS_PER_PIXEL_8 8 +enum mipi_compressor { + MIPI_COMPRESSOR_NONE = 0, + MIPI_COMPRESSOR_10_6_10, + MIPI_COMPRESSOR_10_7_10, + MIPI_COMPRESSOR_10_8_10, + MIPI_COMPRESSOR_12_6_12, + MIPI_COMPRESSOR_12_7_12, + MIPI_COMPRESSOR_12_8_12, + N_MIPI_COMPRESSOR_METHODS +}; + +typedef enum { + MIPI_PREDICTOR_NONE = 0, + MIPI_PREDICTOR_TYPE1, + MIPI_PREDICTOR_TYPE2, + N_MIPI_PREDICTOR_TYPES +} mipi_predictor_t; + +typedef struct input_system_state_s input_system_state_t; +struct input_system_state_s { + ibuf_ctrl_state_t ibuf_ctrl_state[N_IBUF_CTRL_ID]; + csi_rx_fe_ctrl_state_t csi_rx_fe_ctrl_state[N_CSI_RX_FRONTEND_ID]; + csi_rx_be_ctrl_state_t csi_rx_be_ctrl_state[N_CSI_RX_BACKEND_ID]; + pixelgen_ctrl_state_t pixelgen_ctrl_state[N_PIXELGEN_ID]; + stream2mmio_state_t stream2mmio_state[N_STREAM2MMIO_ID]; + isys_irqc_state_t isys_irqc_state[N_ISYS_IRQ_ID]; +}; +#endif /* __INPUT_SYSTEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h new file mode 100644 index 0000000000000..97505e436047f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h @@ -0,0 +1,128 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ +#define __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ + +#include "input_system_public.h" + +STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( + const input_system_ID_t ID, + input_system_state_t *state) +{ + uint32_t i; + + (void)(ID); + + /* get the states of all CSI RX frontend devices */ + for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { + csi_rx_fe_ctrl_get_state( + (csi_rx_frontend_ID_t)i, + &(state->csi_rx_fe_ctrl_state[i])); + } + + /* get the states of all CIS RX backend devices */ + for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { + csi_rx_be_ctrl_get_state( + (csi_rx_backend_ID_t)i, + &(state->csi_rx_be_ctrl_state[i])); + } + + /* get the states of all pixelgen devices */ + for (i = 0; i < N_PIXELGEN_ID; i++) { + pixelgen_ctrl_get_state( + (pixelgen_ID_t)i, + &(state->pixelgen_ctrl_state[i])); + } + + /* get the states of all stream2mmio devices */ + for (i = 0; i < N_STREAM2MMIO_ID; i++) { + stream2mmio_get_state( + (stream2mmio_ID_t)i, + &(state->stream2mmio_state[i])); + } + + /* get the states of all ibuf-controller devices */ + for (i = 0; i < N_IBUF_CTRL_ID; i++) { + ibuf_ctrl_get_state( + (ibuf_ctrl_ID_t)i, + &(state->ibuf_ctrl_state[i])); + } + + /* get the states of all isys irq controllers */ + for (i = 0; i < N_ISYS_IRQ_ID; i++) { + isys_irqc_state_get((isys_irq_ID_t)i, &(state->isys_irqc_state[i])); + } + + /* TODO: get the states of all ISYS2401 DMA devices */ + for (i = 0; i < N_ISYS2401_DMA_ID; i++) { + } + + return INPUT_SYSTEM_ERR_NO_ERROR; +} +STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state( + const input_system_ID_t ID, + input_system_state_t *state) +{ + uint32_t i; + + (void)(ID); + + /* dump the states of all CSI RX frontend devices */ + for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { + csi_rx_fe_ctrl_dump_state( + (csi_rx_frontend_ID_t)i, + &(state->csi_rx_fe_ctrl_state[i])); + } + + /* dump the states of all CIS RX backend devices */ + for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { + csi_rx_be_ctrl_dump_state( + (csi_rx_backend_ID_t)i, + &(state->csi_rx_be_ctrl_state[i])); + } + + /* dump the states of all pixelgen devices */ + for (i = 0; i < N_PIXELGEN_ID; i++) { + pixelgen_ctrl_dump_state( + (pixelgen_ID_t)i, + &(state->pixelgen_ctrl_state[i])); + } + + /* dump the states of all st2mmio devices */ + for (i = 0; i < N_STREAM2MMIO_ID; i++) { + stream2mmio_dump_state( + (stream2mmio_ID_t)i, + &(state->stream2mmio_state[i])); + } + + /* dump the states of all ibuf-controller devices */ + for (i = 0; i < N_IBUF_CTRL_ID; i++) { + ibuf_ctrl_dump_state( + (ibuf_ctrl_ID_t)i, + &(state->ibuf_ctrl_state[i])); + } + + /* dump the states of all isys irq controllers */ + for (i = 0; i < N_ISYS_IRQ_ID; i++) { + isys_irqc_state_dump((isys_irq_ID_t)i, &(state->isys_irqc_state[i])); + } + + /* TODO: dump the states of all ISYS2401 DMA devices */ + for (i = 0; i < N_ISYS2401_DMA_ID; i++) { + } + + return; +} +#endif /* __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c new file mode 100644 index 0000000000000..77767228985ef --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "isys_dma.h" +#include "assert_support.h" + +#ifndef __INLINE_ISYS2401_DMA__ +/* + * Include definitions for isys dma register access functions. isys_dma.h + * includes declarations of these functions by including isys_dma_public.h. + */ +#include "isys_dma_private.h" +#endif + +const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID] = { + N_ISYS2401_DMA_CHANNEL +}; + +void isys2401_dma_set_max_burst_size( + const isys2401_dma_ID_t dma_id, + uint32_t max_burst_size) +{ + assert(dma_id < N_ISYS2401_DMA_ID); + assert((max_burst_size > 0x00) && (max_burst_size <= 0xFF)); + + isys2401_dma_reg_store(dma_id, + DMA_DEV_INFO_REG_IDX(_DMA_V2_DEV_INTERF_MAX_BURST_IDX, HIVE_DMA_BUS_DDR_CONN), + (max_burst_size - 1)); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h new file mode 100644 index 0000000000000..5c694a26386e9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_DMA_LOCAL_H_INCLUDED__ +#define __ISYS_DMA_LOCAL_H_INCLUDED__ + +#include "isys_dma_global.h" + +#endif /* __ISYS_DMA_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h new file mode 100644 index 0000000000000..2cd1aeecf617b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h @@ -0,0 +1,60 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_DMA_PRIVATE_H_INCLUDED__ +#define __ISYS_DMA_PRIVATE_H_INCLUDED__ + +#include "isys_dma_public.h" +#include "device_access.h" +#include "assert_support.h" +#include "dma.h" +#include "dma_v2_defs.h" +#include "print_support.h" + + +STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store( + const isys2401_dma_ID_t dma_id, + const unsigned int reg, + const hrt_data value) +{ + unsigned int reg_loc; + + assert(dma_id < N_ISYS2401_DMA_ID); + assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address)-1); + + reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); + + ia_css_print("isys dma store at addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value); + ia_css_device_store_uint32(reg_loc, value); +} + +STORAGE_CLASS_ISYS2401_DMA_C hrt_data isys2401_dma_reg_load( + const isys2401_dma_ID_t dma_id, + const unsigned int reg) +{ + unsigned int reg_loc; + hrt_data value; + + assert(dma_id < N_ISYS2401_DMA_ID); + assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address)-1); + + reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); + + value = ia_css_device_load_uint32(reg_loc); + ia_css_print("isys dma load from addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value); + + return value; +} + +#endif /* __ISYS_DMA_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c new file mode 100644 index 0000000000000..842ae340ae138 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include "device_access.h" +#include "assert_support.h" +#include "ia_css_debug.h" +#include "isys_irq.h" + +#ifndef __INLINE_ISYS2401_IRQ__ +/* + * Include definitions for isys irq private functions. isys_irq.h includes + * declarations of these functions by including isys_irq_public.h. + */ +#include "isys_irq_private.h" +#endif + +/* Public interface */ +STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_status_enable( + const isys_irq_ID_t isys_irqc_id) +{ + assert(isys_irqc_id < N_ISYS_IRQ_ID); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Setting irq mask for port %u\n", isys_irqc_id); + isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX, ISYS_IRQ_MASK_REG_VALUE); + isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX, ISYS_IRQ_CLEAR_REG_VALUE); + isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX, ISYS_IRQ_ENABLE_REG_VALUE); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h new file mode 100644 index 0000000000000..0bffb5680e255 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h @@ -0,0 +1,35 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_IRQ_LOCAL_H__ +#define __ISYS_IRQ_LOCAL_H__ + +#include + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + +typedef struct isys_irqc_state_s isys_irqc_state_t; + +struct isys_irqc_state_s { + hrt_data edge; + hrt_data mask; + hrt_data status; + hrt_data enable; + hrt_data level_no; +/*hrt_data clear; */ /* write-only register */ +}; + +#endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ + +#endif /* __ISYS_IRQ_LOCAL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h new file mode 100644 index 0000000000000..e69f39893bd2e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h @@ -0,0 +1,108 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_IRQ_PRIVATE_H__ +#define __ISYS_IRQ_PRIVATE_H__ + +#include "isys_irq_global.h" +#include "isys_irq_local.h" + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + +/* -------------------------------------------------------+ + | Native command interface (NCI) | + + -------------------------------------------------------*/ + +/** +* @brief Get the isys irq status. +* Refer to "isys_irq.h" for details. +*/ +STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_get( + const isys_irq_ID_t isys_irqc_id, + isys_irqc_state_t *state) +{ + state->edge = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_EDGE_REG_IDX); + state->mask = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX); + state->status = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_STATUS_REG_IDX); + state->enable = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX); + state->level_no = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_LEVEL_NO_REG_IDX); + /* + ** Invalid to read/load from write-only register 'clear' + ** state->clear = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX); + */ +} + +/** +* @brief Dump the isys irq status. +* Refer to "isys_irq.h" for details. +*/ +STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_dump( + const isys_irq_ID_t isys_irqc_id, + const isys_irqc_state_t *state) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "isys irq controller id %d" + "\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x" + "\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n", + isys_irqc_id, + state->status, state->edge, state->mask, state->enable, state->level_no); +} + +/* end of NCI */ + +/* -------------------------------------------------------+ + | Device level interface (DLI) | + + -------------------------------------------------------*/ + +/* Support functions */ +STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_reg_store( + const isys_irq_ID_t isys_irqc_id, + const unsigned int reg_idx, + const hrt_data value) +{ + unsigned int reg_addr; + + assert(isys_irqc_id < N_ISYS_IRQ_ID); + assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); + + reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); + + ia_css_device_store_uint32(reg_addr, value); +} + +STORAGE_CLASS_ISYS2401_IRQ_C hrt_data isys_irqc_reg_load( + const isys_irq_ID_t isys_irqc_id, + const unsigned int reg_idx) +{ + unsigned int reg_addr; + hrt_data value; + + assert(isys_irqc_id < N_ISYS_IRQ_ID); + assert(reg_idx <= ISYS_IRQ_LEVEL_NO_REG_IDX); + + reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); + value = ia_css_device_load_uint32(reg_addr); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); + + return value; +} + +/* end of DLI */ + +#endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ + +#endif /* __ISYS_IRQ_PRIVATE_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c new file mode 100644 index 0000000000000..67570138ba24c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c @@ -0,0 +1,21 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "isys_stream2mmio.h" + +const stream2mmio_sid_ID_t N_STREAM2MMIO_SID_PROCS[N_STREAM2MMIO_ID] = { + N_STREAM2MMIO_SID_ID, + STREAM2MMIO_SID4_ID, + STREAM2MMIO_SID4_ID +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h new file mode 100644 index 0000000000000..801523977e1d4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_STREAM2MMIO_LOCAL_H_INCLUDED__ +#define __ISYS_STREAM2MMIO_LOCAL_H_INCLUDED__ + +#include "isys_stream2mmio_global.h" + +typedef struct stream2mmio_state_s stream2mmio_state_t; +typedef struct stream2mmio_sid_state_s stream2mmio_sid_state_t; + +struct stream2mmio_sid_state_s { + hrt_data rcv_ack; + hrt_data pix_width_id; + hrt_data start_addr; + hrt_data end_addr; + hrt_data strides; + hrt_data num_items; + hrt_data block_when_no_cmd; +}; + +struct stream2mmio_state_s { + stream2mmio_sid_state_t sid_state[N_STREAM2MMIO_SID_ID]; +}; +#endif /* __ISYS_STREAM2MMIO_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h new file mode 100644 index 0000000000000..f946105ddf43a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h @@ -0,0 +1,168 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ +#define __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ + +#include "isys_stream2mmio_public.h" +#include "device_access.h" /* ia_css_device_load_uint32 */ +#include "assert_support.h" /* assert */ +#include "print_support.h" /* print */ + +#define STREAM2MMIO_COMMAND_REG_ID 0 +#define STREAM2MMIO_ACKNOWLEDGE_REG_ID 1 +#define STREAM2MMIO_PIX_WIDTH_ID_REG_ID 2 +#define STREAM2MMIO_START_ADDR_REG_ID 3 /* master port address,NOT Byte */ +#define STREAM2MMIO_END_ADDR_REG_ID 4 /* master port address,NOT Byte */ +#define STREAM2MMIO_STRIDE_REG_ID 5 /* stride in master port words, increment is per packet for long sids, stride is not used for short sid's*/ +#define STREAM2MMIO_NUM_ITEMS_REG_ID 6 /* number of packets for store packets cmd, number of words for store_words cmd */ +#define STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID 7 /* if this register is 1, input will be stalled if there is no pending command for this sid */ +#define STREAM2MMIO_REGS_PER_SID 8 + +/***************************************************** + * + * Native command interface (NCI). + * + *****************************************************/ +/** + * @brief Get the stream2mmio-controller state. + * Refer to "stream2mmio_public.h" for details. + */ +STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state( + const stream2mmio_ID_t ID, + stream2mmio_state_t *state) +{ + stream2mmio_sid_ID_t i; + + /* + * Get the values of the register-set per + * stream2mmio-controller sids. + */ + for (i = STREAM2MMIO_SID0_ID; i < N_STREAM2MMIO_SID_PROCS[ID]; i++) { + stream2mmio_get_sid_state(ID, i, &(state->sid_state[i])); + } +} + +/** + * @brief Get the state of the stream2mmio-controller sidess. + * Refer to "stream2mmio_public.h" for details. + */ +STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state( + const stream2mmio_ID_t ID, + const stream2mmio_sid_ID_t sid_id, + stream2mmio_sid_state_t *state) +{ + + state->rcv_ack = + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID); + + state->pix_width_id = + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_PIX_WIDTH_ID_REG_ID); + + state->start_addr = + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_START_ADDR_REG_ID); + + state->end_addr = + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_END_ADDR_REG_ID); + + state->strides = + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_STRIDE_REG_ID); + + state->num_items = + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_NUM_ITEMS_REG_ID); + + state->block_when_no_cmd = + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID); + +} + +/** + * @brief Dump the state of the stream2mmio-controller sidess. + * Refer to "stream2mmio_public.h" for details. + */ +STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state( + stream2mmio_sid_state_t *state) +{ + ia_css_print("\t \t Receive acks 0x%x\n", state->rcv_ack); + ia_css_print("\t \t Pixel width 0x%x\n", state->pix_width_id); + ia_css_print("\t \t Startaddr 0x%x\n", state->start_addr); + ia_css_print("\t \t Endaddr 0x%x\n", state->end_addr); + ia_css_print("\t \t Strides 0x%x\n", state->strides); + ia_css_print("\t \t Num Items 0x%x\n", state->num_items); + ia_css_print("\t \t block when no cmd 0x%x\n", state->block_when_no_cmd); + +} +/** + * @brief Dump the ibuf-controller state. + * Refer to "stream2mmio_public.h" for details. + */ +STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_dump_state( + const stream2mmio_ID_t ID, + stream2mmio_state_t *state) +{ + stream2mmio_sid_ID_t i; + + /* + * Get the values of the register-set per + * stream2mmio-controller sids. + */ + for (i = STREAM2MMIO_SID0_ID; i < N_STREAM2MMIO_SID_PROCS[ID]; i++) { + ia_css_print("StREAM2MMIO ID %d SID %d\n", ID, i); + stream2mmio_print_sid_state(&(state->sid_state[i])); + } +} +/* end of NCI */ + +/***************************************************** + * + * Device level interface (DLI). + * + *****************************************************/ +/** + * @brief Load the register value. + * Refer to "stream2mmio_public.h" for details. + */ +STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load( + const stream2mmio_ID_t ID, + const stream2mmio_sid_ID_t sid_id, + const uint32_t reg_idx) +{ + uint32_t reg_bank_offset; + + assert(ID < N_STREAM2MMIO_ID); + + reg_bank_offset = STREAM2MMIO_REGS_PER_SID * sid_id; + return ia_css_device_load_uint32(STREAM2MMIO_CTRL_BASE[ID] + + (reg_bank_offset + reg_idx) * sizeof(hrt_data)); +} + + +/** + * @brief Store a value to the register. + * Refer to "stream2mmio_public.h" for details. + */ +STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_reg_store( + const stream2mmio_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_STREAM2MMIO_ID); + assert(STREAM2MMIO_CTRL_BASE[ID] != (hrt_address)-1); + + ia_css_device_store_uint32(STREAM2MMIO_CTRL_BASE[ID] + + reg * sizeof(hrt_data), value); +} +/* end of DLI */ + +#endif /* __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h new file mode 100644 index 0000000000000..24f4da9aef401 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h @@ -0,0 +1,50 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __PIXELGEN_LOCAL_H_INCLUDED__ +#define __PIXELGEN_LOCAL_H_INCLUDED__ + +#include "pixelgen_global.h" + +typedef struct pixelgen_ctrl_state_s pixelgen_ctrl_state_t; +struct pixelgen_ctrl_state_s { + hrt_data com_enable; + hrt_data prbs_rstval0; + hrt_data prbs_rstval1; + hrt_data syng_sid; + hrt_data syng_free_run; + hrt_data syng_pause; + hrt_data syng_nof_frames; + hrt_data syng_nof_pixels; + hrt_data syng_nof_line; + hrt_data syng_hblank_cyc; + hrt_data syng_vblank_cyc; + hrt_data syng_stat_hcnt; + hrt_data syng_stat_vcnt; + hrt_data syng_stat_fcnt; + hrt_data syng_stat_done; + hrt_data tpg_mode; + hrt_data tpg_hcnt_mask; + hrt_data tpg_vcnt_mask; + hrt_data tpg_xycnt_mask; + hrt_data tpg_hcnt_delta; + hrt_data tpg_vcnt_delta; + hrt_data tpg_r1; + hrt_data tpg_g1; + hrt_data tpg_b1; + hrt_data tpg_r2; + hrt_data tpg_g2; + hrt_data tpg_b2; +}; +#endif /* __PIXELGEN_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h new file mode 100644 index 0000000000000..c5bf540eadf11 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h @@ -0,0 +1,164 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __PIXELGEN_PRIVATE_H_INCLUDED__ +#define __PIXELGEN_PRIVATE_H_INCLUDED__ +#include "pixelgen_public.h" +#include "hive_isp_css_host_ids_hrt.h" +#include "PixelGen_SysBlock_defs.h" +#include "device_access.h" /* ia_css_device_load_uint32 */ +#include "assert_support.h" /* assert */ + + +/***************************************************** + * + * Native command interface (NCI). + * + *****************************************************/ +/** + * @brief Get the pixelgen state. + * Refer to "pixelgen_public.h" for details. + */ +STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state( + const pixelgen_ID_t ID, + pixelgen_ctrl_state_t *state) +{ + + state->com_enable = + pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX); + state->prbs_rstval0 = + pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX); + state->prbs_rstval1 = + pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX); + state->syng_sid = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX); + state->syng_free_run = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX); + state->syng_pause = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX); + state->syng_nof_frames = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX); + state->syng_nof_pixels = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX); + state->syng_nof_line = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX); + state->syng_hblank_cyc = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX); + state->syng_vblank_cyc = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX); + state->syng_stat_hcnt = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX); + state->syng_stat_vcnt = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX); + state->syng_stat_fcnt = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX); + state->syng_stat_done = + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX); + state->tpg_mode = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX); + state->tpg_hcnt_mask = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_MASK_REG_IDX); + state->tpg_vcnt_mask = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_MASK_REG_IDX); + state->tpg_xycnt_mask = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_XYCNT_MASK_REG_IDX); + state->tpg_hcnt_delta = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_DELTA_REG_IDX); + state->tpg_vcnt_delta = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_DELTA_REG_IDX); + state->tpg_r1 = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_R1_REG_IDX); + state->tpg_g1 = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_G1_REG_IDX); + state->tpg_b1 = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_B1_REG_IDX); + state->tpg_r2 = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_R2_REG_IDX); + state->tpg_g2 = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_G2_REG_IDX); + state->tpg_b2 = + pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX); +} +/** + * @brief Dump the pixelgen state. + * Refer to "pixelgen_public.h" for details. + */ +STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state( + const pixelgen_ID_t ID, + pixelgen_ctrl_state_t *state) +{ + ia_css_print("Pixel Generator ID %d Enable 0x%x \n", ID, state->com_enable); + ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x \n", ID, state->prbs_rstval0); + ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x \n", ID, state->prbs_rstval1); + ia_css_print("Pixel Generator ID %d SYNC SID 0x%x \n", ID, state->syng_sid); + ia_css_print("Pixel Generator ID %d syng free run 0x%x \n", ID, state->syng_free_run); + ia_css_print("Pixel Generator ID %d syng pause 0x%x \n", ID, state->syng_pause); + ia_css_print("Pixel Generator ID %d syng no of frames 0x%x \n", ID, state->syng_nof_frames); + ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x \n", ID, state->syng_nof_pixels); + ia_css_print("Pixel Generator ID %d syng no of line 0x%x \n", ID, state->syng_nof_line); + ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x \n", ID, state->syng_hblank_cyc); + ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x \n", ID, state->syng_vblank_cyc); + ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x \n", ID, state->syng_stat_hcnt); + ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x \n", ID, state->syng_stat_vcnt); + ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x \n", ID, state->syng_stat_fcnt); + ia_css_print("Pixel Generator ID %d syng stat done 0x%x \n", ID, state->syng_stat_done); + ia_css_print("Pixel Generator ID %d tpg modee 0x%x \n", ID, state->tpg_mode); + ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x \n", ID, state->tpg_hcnt_mask); + ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x \n", ID, state->tpg_hcnt_mask); + ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x \n", ID, state->tpg_xycnt_mask); + ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x \n", ID, state->tpg_hcnt_delta); + ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x \n", ID, state->tpg_vcnt_delta); + ia_css_print("Pixel Generator ID %d tpg r1 0x%x \n", ID, state->tpg_r1); + ia_css_print("Pixel Generator ID %d tpg g1 0x%x \n", ID, state->tpg_g1); + ia_css_print("Pixel Generator ID %d tpg b1 0x%x \n", ID, state->tpg_b1); + ia_css_print("Pixel Generator ID %d tpg r2 0x%x \n", ID, state->tpg_r2); + ia_css_print("Pixel Generator ID %d tpg g2 0x%x \n", ID, state->tpg_g2); + ia_css_print("Pixel Generator ID %d tpg b2 0x%x \n", ID, state->tpg_b2); +} +/* end of NCI */ +/***************************************************** + * + * Device level interface (DLI). + * + *****************************************************/ +/** + * @brief Load the register value. + * Refer to "pixelgen_public.h" for details. + */ +STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load( + const pixelgen_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_PIXELGEN_ID); + assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg*sizeof(hrt_data)); +} + + +/** + * @brief Store a value to the register. + * Refer to "pixelgen_ctrl_public.h" for details. + */ +STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_reg_store( + const pixelgen_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_PIXELGEN_ID); + assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); + + ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +} +/* end of DLI */ +#endif /* __PIXELGEN_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h new file mode 100644 index 0000000000000..5600b32e29f4e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h @@ -0,0 +1,366 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SYSTEM_LOCAL_H_INCLUDED__ +#define __SYSTEM_LOCAL_H_INCLUDED__ + +#ifdef HRT_ISP_CSS_CUSTOM_HOST +#ifndef HRT_USE_VIR_ADDRS +#define HRT_USE_VIR_ADDRS +#endif +/* This interface is deprecated */ +/*#include "hive_isp_css_custom_host_hrt.h"*/ +#endif + +#include "system_global.h" + +#ifdef __FIST__ +#define HRT_ADDRESS_WIDTH 32 /* Surprise, this is a local property and even differs per platform */ +#else +#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ +#endif + +/* This interface is deprecated */ +#include "hrt/hive_types.h" + +/* + * Cell specific address maps + */ +#if HRT_ADDRESS_WIDTH == 64 + +#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */ + +/* DDR */ +static const hrt_address DDR_BASE[N_DDR_ID] = { + 0x0000000120000000ULL}; + +/* ISP */ +static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { + 0x0000000000020000ULL}; + +static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { + 0x0000000000200000ULL}; + +static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { + 0x0000000000100000ULL}; + +static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { + 0x00000000001C0000ULL, + 0x00000000001D0000ULL, + 0x00000000001E0000ULL}; + +static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { + 0x00000000001F0000ULL}; + +/* SP */ +static const hrt_address SP_CTRL_BASE[N_SP_ID] = { + 0x0000000000010000ULL}; + +static const hrt_address SP_DMEM_BASE[N_SP_ID] = { + 0x0000000000300000ULL}; + +/* MMU */ +#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) +/* + * MMU0_ID: The data MMU + * MMU1_ID: The icache MMU + */ +static const hrt_address MMU_BASE[N_MMU_ID] = { + 0x0000000000070000ULL, + 0x00000000000A0000ULL}; +#else +#error "system_local.h: SYSTEM must be one of {2400, 2401 }" +#endif + +/* DMA */ +static const hrt_address DMA_BASE[N_DMA_ID] = { + 0x0000000000040000ULL}; + +static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = { + 0x00000000000CA000ULL}; + +/* IRQ */ +static const hrt_address IRQ_BASE[N_IRQ_ID] = { + 0x0000000000000500ULL, + 0x0000000000030A00ULL, + 0x000000000008C000ULL, + 0x0000000000090200ULL}; +/* + 0x0000000000000500ULL}; + */ + +/* GDC */ +static const hrt_address GDC_BASE[N_GDC_ID] = { + 0x0000000000050000ULL, + 0x0000000000060000ULL}; + +/* FIFO_MONITOR (not a subset of GP_DEVICE) */ +static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { + 0x0000000000000000ULL}; + +/* +static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { + 0x0000000000000000ULL}; + +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + 0x0000000000090000ULL}; +*/ + +/* GP_DEVICE (single base for all separate GP_REG instances) */ +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + 0x0000000000000000ULL}; + +/*GP TIMER , all timer registers are inter-twined, + * so, having multiple base addresses for + * different timers does not help*/ +static const hrt_address GP_TIMER_BASE = + (hrt_address)0x0000000000000600ULL; + +/* GPIO */ +static const hrt_address GPIO_BASE[N_GPIO_ID] = { + 0x0000000000000400ULL}; + +/* TIMED_CTRL */ +static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { + 0x0000000000000100ULL}; + + +/* INPUT_FORMATTER */ +static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { + 0x0000000000030000ULL, + 0x0000000000030200ULL, + 0x0000000000030400ULL, + 0x0000000000030600ULL}; /* memcpy() */ + +/* INPUT_SYSTEM */ +static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { + 0x0000000000080000ULL}; +/* 0x0000000000081000ULL, */ /* capture A */ +/* 0x0000000000082000ULL, */ /* capture B */ +/* 0x0000000000083000ULL, */ /* capture C */ +/* 0x0000000000084000ULL, */ /* Acquisition */ +/* 0x0000000000085000ULL, */ /* DMA */ +/* 0x0000000000089000ULL, */ /* ctrl */ +/* 0x000000000008A000ULL, */ /* GP regs */ +/* 0x000000000008B000ULL, */ /* FIFO */ +/* 0x000000000008C000ULL, */ /* IRQ */ + +/* RX, the MIPI lane control regs start at offset 0 */ +static const hrt_address RX_BASE[N_RX_ID] = { + 0x0000000000080100ULL}; + +/* IBUF_CTRL, part of the Input System 2401 */ +static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = { + 0x00000000000C1800ULL, /* ibuf controller A */ + 0x00000000000C3800ULL, /* ibuf controller B */ + 0x00000000000C5800ULL /* ibuf controller C */ +}; + +/* ISYS IRQ Controllers, part of the Input System 2401 */ +static const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID] = { + 0x00000000000C1400ULL, /* port a */ + 0x00000000000C3400ULL, /* port b */ + 0x00000000000C5400ULL /* port c */ +}; + +/* CSI FE, part of the Input System 2401 */ +static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = { + 0x00000000000C0400ULL, /* csi fe controller A */ + 0x00000000000C2400ULL, /* csi fe controller B */ + 0x00000000000C4400ULL /* csi fe controller C */ +}; +/* CSI BE, part of the Input System 2401 */ +static const hrt_address CSI_RX_BE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = { + 0x00000000000C0800ULL, /* csi be controller A */ + 0x00000000000C2800ULL, /* csi be controller B */ + 0x00000000000C4800ULL /* csi be controller C */ +}; +/* PIXEL Generator, part of the Input System 2401 */ +static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = { + 0x00000000000C1000ULL, /* pixel gen controller A */ + 0x00000000000C3000ULL, /* pixel gen controller B */ + 0x00000000000C5000ULL /* pixel gen controller C */ +}; +/* Stream2MMIO, part of the Input System 2401 */ +static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = { + 0x00000000000C0C00ULL, /* stream2mmio controller A */ + 0x00000000000C2C00ULL, /* stream2mmio controller B */ + 0x00000000000C4C00ULL /* stream2mmio controller C */ +}; +#elif HRT_ADDRESS_WIDTH == 32 + +#define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */ + +/* DDR : Attention, this value not defined in 32-bit */ +static const hrt_address DDR_BASE[N_DDR_ID] = { + 0x00000000UL}; + +/* ISP */ +static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { + 0x00020000UL}; + +static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { + 0xffffffffUL}; + +static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { + 0xffffffffUL}; + +static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { + 0xffffffffUL, + 0xffffffffUL, + 0xffffffffUL}; + +static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { + 0xffffffffUL}; + +/* SP */ +static const hrt_address SP_CTRL_BASE[N_SP_ID] = { + 0x00010000UL}; + +static const hrt_address SP_DMEM_BASE[N_SP_ID] = { + 0x00300000UL}; + +/* MMU */ +#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) +/* + * MMU0_ID: The data MMU + * MMU1_ID: The icache MMU + */ +static const hrt_address MMU_BASE[N_MMU_ID] = { + 0x00070000UL, + 0x000A0000UL}; +#else +#error "system_local.h: SYSTEM must be one of {2400, 2401 }" +#endif + +/* DMA */ +static const hrt_address DMA_BASE[N_DMA_ID] = { + 0x00040000UL}; + +static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = { + 0x000CA000UL}; + +/* IRQ */ +static const hrt_address IRQ_BASE[N_IRQ_ID] = { + 0x00000500UL, + 0x00030A00UL, + 0x0008C000UL, + 0x00090200UL}; +/* + 0x00000500UL}; + */ + +/* GDC */ +static const hrt_address GDC_BASE[N_GDC_ID] = { + 0x00050000UL, + 0x00060000UL}; + +/* FIFO_MONITOR (not a subset of GP_DEVICE) */ +static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { + 0x00000000UL}; + +/* +static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { + 0x00000000UL}; + +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + 0x00090000UL}; +*/ + +/* GP_DEVICE (single base for all separate GP_REG instances) */ +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + 0x00000000UL}; + +/*GP TIMER , all timer registers are inter-twined, + * so, having multiple base addresses for + * different timers does not help*/ +static const hrt_address GP_TIMER_BASE = + (hrt_address)0x00000600UL; +/* GPIO */ +static const hrt_address GPIO_BASE[N_GPIO_ID] = { + 0x00000400UL}; + +/* TIMED_CTRL */ +static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { + 0x00000100UL}; + + +/* INPUT_FORMATTER */ +static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { + 0x00030000UL, + 0x00030200UL, + 0x00030400UL}; +/* 0x00030600UL, */ /* memcpy() */ + +/* INPUT_SYSTEM */ +static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { + 0x00080000UL}; +/* 0x00081000UL, */ /* capture A */ +/* 0x00082000UL, */ /* capture B */ +/* 0x00083000UL, */ /* capture C */ +/* 0x00084000UL, */ /* Acquisition */ +/* 0x00085000UL, */ /* DMA */ +/* 0x00089000UL, */ /* ctrl */ +/* 0x0008A000UL, */ /* GP regs */ +/* 0x0008B000UL, */ /* FIFO */ +/* 0x0008C000UL, */ /* IRQ */ + +/* RX, the MIPI lane control regs start at offset 0 */ +static const hrt_address RX_BASE[N_RX_ID] = { + 0x00080100UL}; + +/* IBUF_CTRL, part of the Input System 2401 */ +static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = { + 0x000C1800UL, /* ibuf controller A */ + 0x000C3800UL, /* ibuf controller B */ + 0x000C5800UL /* ibuf controller C */ +}; + +/* ISYS IRQ Controllers, part of the Input System 2401 */ +static const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID] = { + 0x000C1400ULL, /* port a */ + 0x000C3400ULL, /* port b */ + 0x000C5400ULL /* port c */ +}; + +/* CSI FE, part of the Input System 2401 */ +static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = { + 0x000C0400UL, /* csi fe controller A */ + 0x000C2400UL, /* csi fe controller B */ + 0x000C4400UL /* csi fe controller C */ +}; +/* CSI BE, part of the Input System 2401 */ +static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = { + 0x000C0800UL, /* csi be controller A */ + 0x000C2800UL, /* csi be controller B */ + 0x000C4800UL /* csi be controller C */ +}; +/* PIXEL Generator, part of the Input System 2401 */ +static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = { + 0x000C1000UL, /* pixel gen controller A */ + 0x000C3000UL, /* pixel gen controller B */ + 0x000C5000UL /* pixel gen controller C */ +}; +/* Stream2MMIO, part of the Input System 2401 */ +static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = { + 0x000C0C00UL, /* stream2mmio controller A */ + 0x000C2C00UL, /* stream2mmio controller B */ + 0x000C4C00UL /* stream2mmio controller C */ +}; + +#else +#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}" +#endif + +#endif /* __SYSTEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h new file mode 100644 index 0000000000000..1b3391c242a3d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h @@ -0,0 +1,126 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _PixelGen_SysBlock_defs_h +#define _PixelGen_SysBlock_defs_h + +#ifdef ISYS2401_PXG_A +#else +#ifdef ISYS2401_PXG_B +#else +#ifdef ISYS2401_PXG_C +#else +#include +#endif +#endif +#endif + +/* Parematers and User_Parameters for HSS */ +#define _PXG_PPC Ppc +#define _PXG_PIXEL_BITS PixelWidth +#define _PXG_MAX_NOF_SID MaxNofSids +#define _PXG_DATA_BITS DataWidth +#define _PXG_CNT_BITS CntWidth +#define _PXG_FIFODEPTH FifoDepth +#define _PXG_DBG Dbg_device_not_included + +/* ID's and Address */ +#define _PXG_ADRRESS_ALIGN_REG 4 + +#define _PXG_COM_ENABLE_REG_IDX 0 +#define _PXG_PRBS_RSTVAL_REG0_IDX 1 +#define _PXG_PRBS_RSTVAL_REG1_IDX 2 +#define _PXG_SYNG_SID_REG_IDX 3 +#define _PXG_SYNG_FREE_RUN_REG_IDX 4 +#define _PXG_SYNG_PAUSE_REG_IDX 5 +#define _PXG_SYNG_NOF_FRAME_REG_IDX 6 +#define _PXG_SYNG_NOF_PIXEL_REG_IDX 7 +#define _PXG_SYNG_NOF_LINE_REG_IDX 8 +#define _PXG_SYNG_HBLANK_CYC_REG_IDX 9 +#define _PXG_SYNG_VBLANK_CYC_REG_IDX 10 +#define _PXG_SYNG_STAT_HCNT_REG_IDX 11 +#define _PXG_SYNG_STAT_VCNT_REG_IDX 12 +#define _PXG_SYNG_STAT_FCNT_REG_IDX 13 +#define _PXG_SYNG_STAT_DONE_REG_IDX 14 +#define _PXG_TPG_MODE_REG_IDX 15 +#define _PXG_TPG_HCNT_MASK_REG_IDX 16 +#define _PXG_TPG_VCNT_MASK_REG_IDX 17 +#define _PXG_TPG_XYCNT_MASK_REG_IDX 18 +#define _PXG_TPG_HCNT_DELTA_REG_IDX 19 +#define _PXG_TPG_VCNT_DELTA_REG_IDX 20 +#define _PXG_TPG_R1_REG_IDX 21 +#define _PXG_TPG_G1_REG_IDX 22 +#define _PXG_TPG_B1_REG_IDX 23 +#define _PXG_TPG_R2_REG_IDX 24 +#define _PXG_TPG_G2_REG_IDX 25 +#define _PXG_TPG_B2_REG_IDX 26 +/* */ +#define _PXG_SYNG_PAUSE_CYCLES 0 +/* Subblock ID's */ +#define _PXG_DISBALE_IDX 0 +#define _PXG_PRBS_IDX 0 +#define _PXG_TPG_IDX 1 +#define _PXG_SYNG_IDX 2 +#define _PXG_SMUX_IDX 3 +/* Register Widths */ +#define _PXG_COM_ENABLE_REG_WIDTH 2 +#define _PXG_COM_SRST_REG_WIDTH 4 +#define _PXG_PRBS_RSTVAL_REG0_WIDTH 31 +#define _PXG_PRBS_RSTVAL_REG1_WIDTH 31 + +#define _PXG_SYNG_SID_REG_WIDTH 3 + +#define _PXG_SYNG_FREE_RUN_REG_WIDTH 1 +#define _PXG_SYNG_PAUSE_REG_WIDTH 1 +/* +#define _PXG_SYNG_NOF_FRAME_REG_WIDTH +#define _PXG_SYNG_NOF_PIXEL_REG_WIDTH +#define _PXG_SYNG_NOF_LINE_REG_WIDTH +#define _PXG_SYNG_HBLANK_CYC_REG_WIDTH +#define _PXG_SYNG_VBLANK_CYC_REG_WIDTH +#define _PXG_SYNG_STAT_HCNT_REG_WIDTH +#define _PXG_SYNG_STAT_VCNT_REG_WIDTH +#define _PXG_SYNG_STAT_FCNT_REG_WIDTH +*/ +#define _PXG_SYNG_STAT_DONE_REG_WIDTH 1 +#define _PXG_TPG_MODE_REG_WIDTH 2 +/* +#define _PXG_TPG_HCNT_MASK_REG_WIDTH +#define _PXG_TPG_VCNT_MASK_REG_WIDTH +#define _PXG_TPG_XYCNT_MASK_REG_WIDTH +*/ +#define _PXG_TPG_HCNT_DELTA_REG_WIDTH 4 +#define _PXG_TPG_VCNT_DELTA_REG_WIDTH 4 +/* +#define _PXG_TPG_R1_REG_WIDTH +#define _PXG_TPG_G1_REG_WIDTH +#define _PXG_TPG_B1_REG_WIDTH +#define _PXG_TPG_R2_REG_WIDTH +#define _PXG_TPG_G2_REG_WIDTH +#define _PXG_TPG_B2_REG_WIDTH +*/ +#define _PXG_FIFO_DEPTH 2 +/* MISC */ +#define _PXG_ENABLE_REG_VAL 1 +#define _PXG_PRBS_ENABLE_REG_VAL 1 +#define _PXG_TPG_ENABLE_REG_VAL 2 +#define _PXG_SYNG_ENABLE_REG_VAL 4 +#define _PXG_FIFO_ENABLE_REG_VAL 8 +#define _PXG_PXL_BITS 14 +#define _PXG_INVALID_FLAG 0xDEADBEEF +#define _PXG_CAFE_FLAG 0xCAFEBABE + + +#endif /* _PixelGen_SysBlock_defs_h */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h new file mode 100644 index 0000000000000..e71e33d9d1434 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h @@ -0,0 +1,104 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_BITS_H +#define _HRT_BITS_H + +#include "defs.h" + +#define _hrt_ones(n) HRTCAT(_hrt_ones_, n) +#define _hrt_ones_0x0 0x00000000U +#define _hrt_ones_0x1 0x00000001U +#define _hrt_ones_0x2 0x00000003U +#define _hrt_ones_0x3 0x00000007U +#define _hrt_ones_0x4 0x0000000FU +#define _hrt_ones_0x5 0x0000001FU +#define _hrt_ones_0x6 0x0000003FU +#define _hrt_ones_0x7 0x0000007FU +#define _hrt_ones_0x8 0x000000FFU +#define _hrt_ones_0x9 0x000001FFU +#define _hrt_ones_0xA 0x000003FFU +#define _hrt_ones_0xB 0x000007FFU +#define _hrt_ones_0xC 0x00000FFFU +#define _hrt_ones_0xD 0x00001FFFU +#define _hrt_ones_0xE 0x00003FFFU +#define _hrt_ones_0xF 0x00007FFFU +#define _hrt_ones_0x10 0x0000FFFFU +#define _hrt_ones_0x11 0x0001FFFFU +#define _hrt_ones_0x12 0x0003FFFFU +#define _hrt_ones_0x13 0x0007FFFFU +#define _hrt_ones_0x14 0x000FFFFFU +#define _hrt_ones_0x15 0x001FFFFFU +#define _hrt_ones_0x16 0x003FFFFFU +#define _hrt_ones_0x17 0x007FFFFFU +#define _hrt_ones_0x18 0x00FFFFFFU +#define _hrt_ones_0x19 0x01FFFFFFU +#define _hrt_ones_0x1A 0x03FFFFFFU +#define _hrt_ones_0x1B 0x07FFFFFFU +#define _hrt_ones_0x1C 0x0FFFFFFFU +#define _hrt_ones_0x1D 0x1FFFFFFFU +#define _hrt_ones_0x1E 0x3FFFFFFFU +#define _hrt_ones_0x1F 0x7FFFFFFFU +#define _hrt_ones_0x20 0xFFFFFFFFU + +#define _hrt_ones_0 _hrt_ones_0x0 +#define _hrt_ones_1 _hrt_ones_0x1 +#define _hrt_ones_2 _hrt_ones_0x2 +#define _hrt_ones_3 _hrt_ones_0x3 +#define _hrt_ones_4 _hrt_ones_0x4 +#define _hrt_ones_5 _hrt_ones_0x5 +#define _hrt_ones_6 _hrt_ones_0x6 +#define _hrt_ones_7 _hrt_ones_0x7 +#define _hrt_ones_8 _hrt_ones_0x8 +#define _hrt_ones_9 _hrt_ones_0x9 +#define _hrt_ones_10 _hrt_ones_0xA +#define _hrt_ones_11 _hrt_ones_0xB +#define _hrt_ones_12 _hrt_ones_0xC +#define _hrt_ones_13 _hrt_ones_0xD +#define _hrt_ones_14 _hrt_ones_0xE +#define _hrt_ones_15 _hrt_ones_0xF +#define _hrt_ones_16 _hrt_ones_0x10 +#define _hrt_ones_17 _hrt_ones_0x11 +#define _hrt_ones_18 _hrt_ones_0x12 +#define _hrt_ones_19 _hrt_ones_0x13 +#define _hrt_ones_20 _hrt_ones_0x14 +#define _hrt_ones_21 _hrt_ones_0x15 +#define _hrt_ones_22 _hrt_ones_0x16 +#define _hrt_ones_23 _hrt_ones_0x17 +#define _hrt_ones_24 _hrt_ones_0x18 +#define _hrt_ones_25 _hrt_ones_0x19 +#define _hrt_ones_26 _hrt_ones_0x1A +#define _hrt_ones_27 _hrt_ones_0x1B +#define _hrt_ones_28 _hrt_ones_0x1C +#define _hrt_ones_29 _hrt_ones_0x1D +#define _hrt_ones_30 _hrt_ones_0x1E +#define _hrt_ones_31 _hrt_ones_0x1F +#define _hrt_ones_32 _hrt_ones_0x20 + +#define _hrt_mask(b, n) \ + (_hrt_ones(n) << (b)) +#define _hrt_get_bits(w, b, n) \ + (((w) >> (b)) & _hrt_ones(n)) +#define _hrt_set_bits(w, b, n, v) \ + (((w) & ~_hrt_mask(b, n)) | (((v) & _hrt_ones(n)) << (b))) +#define _hrt_get_bit(w, b) \ + (((w) >> (b)) & 1) +#define _hrt_set_bit(w, b, v) \ + (((w) & (~(1 << (b)))) | (((v)&1) << (b))) +#define _hrt_set_lower_half(w, v) \ + _hrt_set_bits(w, 0, 16, v) +#define _hrt_set_upper_half(w, v) \ + _hrt_set_bits(w, 16, 16, v) + +#endif /* _HRT_BITS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h new file mode 100644 index 0000000000000..b5756bfe8eb6b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _cell_params_h +#define _cell_params_h + +#define SP_PMEM_LOG_WIDTH_BITS 6 /*Width of PC, 64 bits, 8 bytes*/ +#define SP_ICACHE_TAG_BITS 4 /*size of tag*/ +#define SP_ICACHE_SET_BITS 8 /* 256 sets*/ +#define SP_ICACHE_BLOCKS_PER_SET_BITS 1 /* 2 way associative*/ +#define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ + +#define SP_ICACHE_ADDRESS_BITS \ + (SP_ICACHE_TAG_BITS+SP_ICACHE_BLOCK_ADDRESS_BITS) + +#define SP_PMEM_DEPTH (1< input_selector*/ +/* !! Changes here should be copied to systems/isp/isp_css/bin/conv_transmitter_cmd.tcl !! */ +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB888 0 // 36 'h24 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB555 1 // 33 'h +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB444 2 // 32 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB565 3 // 34 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB666 4 // 35 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW10 6 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW6 7 // 40 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW7 8 // 41 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW12 9 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW14 10 // 45 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8 11 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10 12 // 25 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_8 13 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_10 14 // 31 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_1 15 // 48 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8L 16 // 26 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_Emb 17 // 18 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_2 18 // 49 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_3 19 // 50 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_4 20 // 51 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_5 21 // 52 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_6 22 // 53 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_7 23 // 54 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_8 24 // 55 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8_CSPS 25 // 28 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10_CSPS 26 // 29 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW16 27 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18 28 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_2 29 // ? Option 2 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_3 30 // ? Option 3 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding + +/* definition for state machine of data FIFO for decode different type of data */ +#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV420_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_YUV420_8L_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB555_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB565_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 +#define _HRT_CSS_RECEIVER_2400_RGB888_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW6_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW7_REPEAT_PTN 7 +#define _HRT_CSS_RECEIVER_2400_RAW8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_RAW10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW14_REPEAT_PTN 7 + +#define _HRT_CSS_RECEIVER_2400_MAX_REPEAT_PTN _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_WIDTH 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_IDX 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_WIDTH 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_USD_BITS 4 /* bits per USD type */ + +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_EN_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_EN_IDX 8 + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_NO_COMP 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_6_10 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_7_10 2 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_8_10 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_6_12 4 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_7_12 5 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_8_12 6 + + +/* packet bit definition */ +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_IDX 32 +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_BITS 1 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_IDX 22 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_BITS 2 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_IDX 16 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_BITS 16 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_BITS 32 + + +/*************************************************************************************************/ +/* Custom Decoding */ +/* These Custom Defs are defined based on design-time config in "csi_be_pixel_formatter.chdl" !! */ +/*************************************************************************************************/ +#define BE_CUST_EN_IDX 0 /* 2bits */ +#define BE_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ +#define BE_CUST_EN_WIDTH 8 +#define BE_CUST_MODE_ALL 1 /* Enable Custom Decoding for all DATA IDs */ +#define BE_CUST_MODE_ONE 3 /* Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID */ + +/* Data State config = {get_bits(6bits), valid(1bit)} */ +#define BE_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ +#define BE_CUST_DATA_STATE_S1_IDX 7 /* 7bits */ +#define BE_CUST_DATA_STATE_S2_IDX 14 /* 7bits */ +#define BE_CUST_DATA_STATE_WIDTH 21 +#define BE_CUST_DATA_STATE_VALID_IDX 0 /* 1bits */ +#define BE_CUST_DATA_STATE_GETBITS_IDX 1 /* 6bits */ + +/* Pixel Extractor config */ +#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 /* 5bits */ +#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 5 /* 5bits */ +#define BE_CUST_PIX_EXT_PIX_MASK_IDX 10 /* 18bits */ +#define BE_CUST_PIX_EXT_PIX_EN_IDX 28 /* 1bits */ +#define BE_CUST_PIX_EXT_WIDTH 29 + +/* Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} */ +#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_WIDTH 16 +#define BE_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 /* Normal (NO less get_bits case) Valid - 1bits */ +#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 /* Normal (NO less get_bits case) EoP - 1bits */ +#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 /* Especial (less get_bits case) Valid - 1bits */ +#define BE_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 /* Especial (less get_bits case) EoP - 1bits */ + +#endif /* _mipi_backend_common_defs_h_ */ +#endif /* _css_receiver_2400_common_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_defs.h new file mode 100644 index 0000000000000..6f5b7d3d3715e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_defs.h @@ -0,0 +1,258 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _css_receiver_2400_defs_h_ +#define _css_receiver_2400_defs_h_ + +#include "css_receiver_2400_common_defs.h" + +#define CSS_RECEIVER_DATA_WIDTH 8 +#define CSS_RECEIVER_RX_TRIG 4 +#define CSS_RECEIVER_RF_WORD 32 +#define CSS_RECEIVER_IMG_PROC_RF_ADDR 10 +#define CSS_RECEIVER_CSI_RF_ADDR 4 +#define CSS_RECEIVER_DATA_OUT 12 +#define CSS_RECEIVER_CHN_NO 2 +#define CSS_RECEIVER_DWORD_CNT 11 +#define CSS_RECEIVER_FORMAT_TYP 5 +#define CSS_RECEIVER_HRESPONSE 2 +#define CSS_RECEIVER_STATE_WIDTH 3 +#define CSS_RECEIVER_FIFO_DAT 32 +#define CSS_RECEIVER_CNT_VAL 2 +#define CSS_RECEIVER_PRED10_VAL 10 +#define CSS_RECEIVER_PRED12_VAL 12 +#define CSS_RECEIVER_CNT_WIDTH 8 +#define CSS_RECEIVER_WORD_CNT 16 +#define CSS_RECEIVER_PIXEL_LEN 6 +#define CSS_RECEIVER_PIXEL_CNT 5 +#define CSS_RECEIVER_COMP_8_BIT 8 +#define CSS_RECEIVER_COMP_7_BIT 7 +#define CSS_RECEIVER_COMP_6_BIT 6 + +#define CSI_CONFIG_WIDTH 4 + +/* division of gen_short data, ch_id and fmt_type over streaming data interface */ +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB 0 +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB - 1) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB - 1) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH - 1) + +#define _HRT_CSS_RECEIVER_2400_REG_ALIGN 4 +#define _HRT_CSS_RECEIVER_2400_BYTES_PER_PKT 4 + +#define hrt_css_receiver_2400_4_lane_port_offset 0x100 +#define hrt_css_receiver_2400_1_lane_port_offset 0x200 +#define hrt_css_receiver_2400_2_lane_port_offset 0x300 +#define hrt_css_receiver_2400_backend_port_offset 0x100 + +#define _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX 0 +#define _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX 1 +#define _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX 2 +#define _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX 3 +#define _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX 4 +#define _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX 7 +#define _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX 8 +#define _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX 9 +#define _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX 10 +#define _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX 11 +#define _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX 12 +#define _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX 13 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX 14 +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX 15 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX 16 +#define _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX 17 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX 18 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX 19 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX 20 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX 21 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX 22 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX 23 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX 24 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX 25 +#define _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX 26 +#define _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX 27 +#define _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX 28 + +/* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */ +#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT 0 +#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT 1 +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT 2 +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT 3 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT 4 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT 5 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT 6 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT 7 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT 8 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT 9 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT 10 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT 11 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT 12 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT 13 +#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT 14 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT 15 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT 16 + +#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_CAUSE_ "Fifo Overrun" +#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_CAUSE_ "Reserved" +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_CAUSE_ "Sleep mode entry" +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_CAUSE_ "Sleep mode exit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_CAUSE_ "Error high speed SOT" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_CAUSE_ "Error high speed sync SOT" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_CAUSE_ "Error control" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_CAUSE_ "Error correction double bit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_CAUSE_ "Error correction single bit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_CAUSE_ "No error" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_CAUSE_ "Error cyclic redundancy check" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_CAUSE_ "Error id" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_CAUSE_ "Error frame sync" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_CAUSE_ "Error frame data" +#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_CAUSE_ "Data time-out" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_CAUSE_ "Error escape" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_CAUSE_ "Error line sync" + +/* Bits for CSI2_DEVICE_READY register */ +#define _HRT_CSS_RECEIVER_2400_CSI2_DEVICE_READY_IDX 0 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_INIT_TIME_OUT_ERR_IDX 2 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_OVER_RUN_ERR_IDX 3 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_SOT_SYNC_ERR_IDX 4 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_RECEIVE_DATA_TIME_OUT_ERR_IDX 5 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_ECC_TWO_BIT_ERR_IDX 6 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_DATA_ID_ERR_IDX 7 + + +/* Bits for CSI2_FUNC_PROG register */ +#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS 19 + +/* Bits for INIT_COUNT register */ +#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_IDX 0 +#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_BITS 16 + +/* Bits for COUNT registers */ +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_BITS 8 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_BITS 8 + +/* Bits for RAW116_18_DATAID register */ +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_BITS 6 + +/* Bits for COMP_FORMAT register, this selects the compression data format */ +#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS 8 +#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_IDX (_HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX + _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS) +#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_BITS 8 + +/* Bits for COMP_PREDICT register, this selects the predictor algorithm */ +#define _HRT_CSS_RECEIVER_2400_PREDICT_NO_COMP 0 +#define _HRT_CSS_RECEIVER_2400_PREDICT_1 1 +#define _HRT_CSS_RECEIVER_2400_PREDICT_2 2 + +/* Number of bits used for the delay registers */ +#define _HRT_CSS_RECEIVER_2400_DELAY_BITS 8 + +/* Bits for COMP_SCHEME register, this selects the compression scheme for a VC */ +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD1_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD2_BITS_IDX 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD3_BITS_IDX 10 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD4_BITS_IDX 15 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD5_BITS_IDX 20 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD6_BITS_IDX 25 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD7_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD8_BITS_IDX 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_BITS_BITS 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_BITS 3 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_IDX 3 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_BITS 2 + + +/* BITS for backend RAW16 and RAW 18 registers */ + +#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_BITS 2 +#define _HRT_CSS_RECEIVER_2400_RAW18_EN_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW18_EN_BITS 1 + +#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_BITS 2 +#define _HRT_CSS_RECEIVER_2400_RAW16_EN_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW16_EN_BITS 1 + +/* These hsync and vsync values are for HSS simulation only */ +#define _HRT_CSS_RECEIVER_2400_HSYNC_VAL (1<<16) +#define _HRT_CSS_RECEIVER_2400_VSYNC_VAL (1<<17) + +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_WIDTH 28 +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB 0 +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB + CSS_RECEIVER_DATA_OUT - 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB + CSS_RECEIVER_DATA_OUT - 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_EOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT + 1) + +// SH Backend Register IDs +#define _HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX 1 +#define _HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX 2 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX 4 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX 5 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX 7 +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX 8 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX 9 +#define _HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX 10 +#define _HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX 11 +#define _HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX 12 +#define _HRT_CSS_RECEIVER_2400_BE_CUST_EN_REG_IDX 13 +#define _HRT_CSS_RECEIVER_2400_BE_CUST_DATA_STATE_REG_IDX 14 /* Data State 0,1,2 config */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P0_REG_IDX 15 /* Pixel Extractor config for Data State 0 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P1_REG_IDX 16 /* Pixel Extractor config for Data State 0 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P2_REG_IDX 17 /* Pixel Extractor config for Data State 0 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P3_REG_IDX 18 /* Pixel Extractor config for Data State 0 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P0_REG_IDX 19 /* Pixel Extractor config for Data State 1 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P1_REG_IDX 20 /* Pixel Extractor config for Data State 1 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P2_REG_IDX 21 /* Pixel Extractor config for Data State 1 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P3_REG_IDX 22 /* Pixel Extractor config for Data State 1 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P0_REG_IDX 23 /* Pixel Extractor config for Data State 2 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P1_REG_IDX 24 /* Pixel Extractor config for Data State 2 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P2_REG_IDX 25 /* Pixel Extractor config for Data State 2 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P3_REG_IDX 26 /* Pixel Extractor config for Data State 2 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_VALID_EOP_REG_IDX 27 /* Pixel Valid & EoP config for Pix 0,1,2,3 */ + +#define _HRT_CSS_RECEIVER_2400_BE_NOF_REGISTERS 28 + +#define _HRT_CSS_RECEIVER_2400_BE_SRST_HE 0 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_RCF 1 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_PF 2 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_SM 3 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_PD 4 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_SD 5 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_OT 6 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_BC 7 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_WIDTH 8 + +#endif /* _css_receiver_2400_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/defs.h new file mode 100644 index 0000000000000..47505f41790c1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/defs.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_DEFS_H_ +#define _HRT_DEFS_H_ + +#ifndef HRTCAT +#define _HRTCAT(m, n) m##n +#define HRTCAT(m, n) _HRTCAT(m, n) +#endif + +#ifndef HRTSTR +#define _HRTSTR(x) #x +#define HRTSTR(x) _HRTSTR(x) +#endif + +#ifndef HRTMIN +#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef HRTMAX +#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) +#endif + +#endif /* _HRT_DEFS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h new file mode 100644 index 0000000000000..d184a8b313c91 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h @@ -0,0 +1,199 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _dma_v2_defs_h +#define _dma_v2_defs_h + +#define _DMA_V2_NUM_CHANNELS_ID MaxNumChannels +#define _DMA_V2_CONNECTIONS_ID Connections +#define _DMA_V2_DEV_ELEM_WIDTHS_ID DevElemWidths +#define _DMA_V2_DEV_FIFO_DEPTH_ID DevFifoDepth +#define _DMA_V2_DEV_FIFO_RD_LAT_ID DevFifoRdLat +#define _DMA_V2_DEV_FIFO_LAT_BYPASS_ID DevFifoRdLatBypass +#define _DMA_V2_DEV_NO_BURST_ID DevNoBurst +#define _DMA_V2_DEV_RD_ACCEPT_ID DevRdAccept +#define _DMA_V2_DEV_SRMD_ID DevSRMD +#define _DMA_V2_DEV_HAS_CRUN_ID CRunMasters +#define _DMA_V2_CTRL_ACK_FIFO_DEPTH_ID CtrlAckFifoDepth +#define _DMA_V2_CMD_FIFO_DEPTH_ID CommandFifoDepth +#define _DMA_V2_CMD_FIFO_RD_LAT_ID CommandFifoRdLat +#define _DMA_V2_CMD_FIFO_LAT_BYPASS_ID CommandFifoRdLatBypass +#define _DMA_V2_NO_PACK_ID has_no_pack + +#define _DMA_V2_REG_ALIGN 4 +#define _DMA_V2_REG_ADDR_BITS 2 + +/* Command word */ +#define _DMA_V2_CMD_IDX 0 +#define _DMA_V2_CMD_BITS 6 +#define _DMA_V2_CHANNEL_IDX (_DMA_V2_CMD_IDX + _DMA_V2_CMD_BITS) +#define _DMA_V2_CHANNEL_BITS 5 + +/* The command to set a parameter contains the PARAM field next */ +#define _DMA_V2_PARAM_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) +#define _DMA_V2_PARAM_BITS 4 + +/* Commands to read, write or init specific blocks contain these + three values */ +#define _DMA_V2_SPEC_DEV_A_XB_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) +#define _DMA_V2_SPEC_DEV_A_XB_BITS 8 +#define _DMA_V2_SPEC_DEV_B_XB_IDX (_DMA_V2_SPEC_DEV_A_XB_IDX + _DMA_V2_SPEC_DEV_A_XB_BITS) +#define _DMA_V2_SPEC_DEV_B_XB_BITS 8 +#define _DMA_V2_SPEC_YB_IDX (_DMA_V2_SPEC_DEV_B_XB_IDX + _DMA_V2_SPEC_DEV_B_XB_BITS) +#define _DMA_V2_SPEC_YB_BITS (32-_DMA_V2_SPEC_DEV_B_XB_BITS-_DMA_V2_SPEC_DEV_A_XB_BITS-_DMA_V2_CMD_BITS-_DMA_V2_CHANNEL_BITS) + +/* */ +#define _DMA_V2_CMD_CTRL_IDX 4 +#define _DMA_V2_CMD_CTRL_BITS 4 + +/* Packing setup word */ +#define _DMA_V2_CONNECTION_IDX 0 +#define _DMA_V2_CONNECTION_BITS 4 +#define _DMA_V2_EXTENSION_IDX (_DMA_V2_CONNECTION_IDX + _DMA_V2_CONNECTION_BITS) +#define _DMA_V2_EXTENSION_BITS 1 + +/* Elements packing word */ +#define _DMA_V2_ELEMENTS_IDX 0 +#define _DMA_V2_ELEMENTS_BITS 8 +#define _DMA_V2_LEFT_CROPPING_IDX (_DMA_V2_ELEMENTS_IDX + _DMA_V2_ELEMENTS_BITS) +#define _DMA_V2_LEFT_CROPPING_BITS 8 + +#define _DMA_V2_WIDTH_IDX 0 +#define _DMA_V2_WIDTH_BITS 16 + +#define _DMA_V2_HEIGHT_IDX 0 +#define _DMA_V2_HEIGHT_BITS 16 + +#define _DMA_V2_STRIDE_IDX 0 +#define _DMA_V2_STRIDE_BITS 32 + +/* Command IDs */ +#define _DMA_V2_MOVE_B2A_COMMAND 0 +#define _DMA_V2_MOVE_B2A_BLOCK_COMMAND 1 +#define _DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND 2 +#define _DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND 3 +#define _DMA_V2_MOVE_A2B_COMMAND 4 +#define _DMA_V2_MOVE_A2B_BLOCK_COMMAND 5 +#define _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND 6 +#define _DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND 7 +#define _DMA_V2_INIT_A_COMMAND 8 +#define _DMA_V2_INIT_A_BLOCK_COMMAND 9 +#define _DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND 10 +#define _DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND 11 +#define _DMA_V2_INIT_B_COMMAND 12 +#define _DMA_V2_INIT_B_BLOCK_COMMAND 13 +#define _DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND 14 +#define _DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND 15 +#define _DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_A_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_B_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_CONFIG_CHANNEL_COMMAND 32 +#define _DMA_V2_SET_CHANNEL_PARAM_COMMAND 33 +#define _DMA_V2_SET_CRUN_COMMAND 62 + +/* Channel Parameter IDs */ +#define _DMA_V2_PACKING_SETUP_PARAM 0 +#define _DMA_V2_STRIDE_A_PARAM 1 +#define _DMA_V2_ELEM_CROPPING_A_PARAM 2 +#define _DMA_V2_WIDTH_A_PARAM 3 +#define _DMA_V2_STRIDE_B_PARAM 4 +#define _DMA_V2_ELEM_CROPPING_B_PARAM 5 +#define _DMA_V2_WIDTH_B_PARAM 6 +#define _DMA_V2_HEIGHT_PARAM 7 +#define _DMA_V2_QUEUED_CMDS 8 + +/* Parameter Constants */ +#define _DMA_V2_ZERO_EXTEND 0 +#define _DMA_V2_SIGN_EXTEND 1 + + /* SLAVE address map */ +#define _DMA_V2_SEL_FSM_CMD 0 +#define _DMA_V2_SEL_CH_REG 1 +#define _DMA_V2_SEL_CONN_GROUP 2 +#define _DMA_V2_SEL_DEV_INTERF 3 + +#define _DMA_V2_ADDR_SEL_COMP_IDX 12 +#define _DMA_V2_ADDR_SEL_COMP_BITS 4 +#define _DMA_V2_ADDR_SEL_CH_REG_IDX 2 +#define _DMA_V2_ADDR_SEL_CH_REG_BITS 6 +#define _DMA_V2_ADDR_SEL_PARAM_IDX (_DMA_V2_ADDR_SEL_CH_REG_BITS+_DMA_V2_ADDR_SEL_CH_REG_IDX) +#define _DMA_V2_ADDR_SEL_PARAM_BITS 4 + +#define _DMA_V2_ADDR_SEL_GROUP_COMP_IDX 2 +#define _DMA_V2_ADDR_SEL_GROUP_COMP_BITS 6 +#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_IDX (_DMA_V2_ADDR_SEL_GROUP_COMP_BITS + _DMA_V2_ADDR_SEL_GROUP_COMP_IDX) +#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_BITS 4 + +#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX 2 +#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS 6 +#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_IDX (_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX+_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS) +#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_BITS 4 + +#define _DMA_V2_FSM_GROUP_CMD_IDX 0 +#define _DMA_V2_FSM_GROUP_ADDR_SRC_IDX 1 +#define _DMA_V2_FSM_GROUP_ADDR_DEST_IDX 2 +#define _DMA_V2_FSM_GROUP_CMD_CTRL_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_IDX 4 +#define _DMA_V2_FSM_GROUP_FSM_PACK_IDX 5 +#define _DMA_V2_FSM_GROUP_FSM_REQ_IDX 6 +#define _DMA_V2_FSM_GROUP_FSM_WR_IDX 7 + +#define _DMA_V2_FSM_GROUP_FSM_CTRL_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_XB_IDX 4 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_YB_IDX 5 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX 6 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX 7 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX 8 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX 9 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX 10 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX 11 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX 12 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX 13 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX 14 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX 15 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_CMD_CTRL_IDX 15 + +#define _DMA_V2_FSM_GROUP_FSM_PACK_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX 3 + +#define _DMA_V2_FSM_GROUP_FSM_REQ_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_XB_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_REQ_XB_REMAINING_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_BURST_IDX 4 + +#define _DMA_V2_FSM_GROUP_FSM_WR_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_XB_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_WR_XB_REMAINING_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_BURST_IDX 4 + +#define _DMA_V2_DEV_INTERF_REQ_SIDE_STATUS_IDX 0 +#define _DMA_V2_DEV_INTERF_SEND_SIDE_STATUS_IDX 1 +#define _DMA_V2_DEV_INTERF_FIFO_STATUS_IDX 2 +#define _DMA_V2_DEV_INTERF_REQ_ONLY_COMPLETE_BURST_IDX 3 +#define _DMA_V2_DEV_INTERF_MAX_BURST_IDX 4 +#define _DMA_V2_DEV_INTERF_CHK_ADDR_ALIGN 5 + +#endif /* _dma_v2_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h new file mode 100644 index 0000000000000..77722d2057010 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h @@ -0,0 +1,170 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef HRT_GDC_v2_defs_h_ +#define HRT_GDC_v2_defs_h_ + +#define HRT_GDC_IS_V2 + +#define HRT_GDC_N 1024 /* Top-level design constant, equal to the number of entries in the LUT */ +#define HRT_GDC_FRAC_BITS 10 /* Number of fractional bits in the GDC block, driven by the size of the LUT */ + +#define HRT_GDC_BLI_FRAC_BITS 4 /* Number of fractional bits for the bi-linear interpolation type */ +#define HRT_GDC_BLI_COEF_ONE (1 << HRT_GDC_BLI_FRAC_BITS) + +#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ +#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS-2)) /* We represent signed 10 bit coefficients. */ + /* The supported range is [-256, .., +256] */ + /* in 14-bit signed notation, */ + /* We need all ten bits (MSB must be zero). */ + /* -s is inserted to solve this issue, and */ + /* therefore "1" is equal to +256. */ +#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) + +#define HRT_GDC_LUT_BYTES (HRT_GDC_N*4*2) /* 1024 addresses, 4 coefficients per address, */ + /* 2 bytes per coefficient */ + +#define _HRT_GDC_REG_ALIGN 4 + + // 31 30 29 25 24 0 + // |-----|---|--------|------------------------| + // | CMD | C | Reg_ID | Value | + + + // There are just two commands possible for the GDC block: + // 1 - Configure reg + // 0 - Data token + + // C - Reserved bit + // Used in protocol to indicate whether it is C-run or other type of runs + // In case of C-run, this bit has a value of 1, for all the other runs, it is 0. + + // Reg_ID - Address of the register to be configured + + // Value - Value to store to the addressed register, maximum of 24 bits + + // Configure reg command is not followed by any other token. + // The address of the register and the data to be filled in is contained in the same token + + // When the first data token is received, it must be: + // 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, + // 2. P0'X (device configured in one of the tetragon modes) + // After the first data token is received, pre-defined number of tokens with the following meaning follow: + // 1. two tokens: SRC address ; DST address + // 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address + +#define HRT_GDC_CONFIG_CMD 1 +#define HRT_GDC_DATA_CMD 0 + + +#define HRT_GDC_CMD_POS 31 +#define HRT_GDC_CMD_BITS 1 +#define HRT_GDC_CRUN_POS 30 +#define HRT_GDC_REG_ID_POS 25 +#define HRT_GDC_REG_ID_BITS 5 +#define HRT_GDC_DATA_POS 0 +#define HRT_GDC_DATA_BITS 25 + +#define HRT_GDC_FRYIPXFRX_BITS 26 +#define HRT_GDC_P0X_BITS 23 + + +#define HRT_GDC_MAX_OXDIM (8192-64) +#define HRT_GDC_MAX_OYDIM 4095 +#define HRT_GDC_MAX_IXDIM (8192-64) +#define HRT_GDC_MAX_IYDIM 4095 +#define HRT_GDC_MAX_DS_FAC 16 +#define HRT_GDC_MAX_DX (HRT_GDC_MAX_DS_FAC*HRT_GDC_N - 1) +#define HRT_GDC_MAX_DY HRT_GDC_MAX_DX + + +/* GDC lookup tables entries are 10 bits values, but they're + stored 2 by 2 as 32 bit values, yielding 16 bits per entry. + A GDC lookup table contains 64 * 4 elements */ + +#define HRT_GDC_PERF_1_1_pix 0 +#define HRT_GDC_PERF_2_1_pix 1 +#define HRT_GDC_PERF_1_2_pix 2 +#define HRT_GDC_PERF_2_2_pix 3 + +#define HRT_GDC_NND_MODE 0 +#define HRT_GDC_BLI_MODE 1 +#define HRT_GDC_BCI_MODE 2 +#define HRT_GDC_LUT_MODE 3 + +#define HRT_GDC_SCAN_STB 0 +#define HRT_GDC_SCAN_STR 1 + +#define HRT_GDC_MODE_SCALING 0 +#define HRT_GDC_MODE_TETRAGON 1 + +#define HRT_GDC_LUT_COEFF_OFFSET 16 +#define HRT_GDC_FRY_BIT_OFFSET 16 +// FRYIPXFRX is the only register where we store two values in one field, +// to save one token in the scaling protocol. +// Like this, we have three tokens in the scaling protocol, +// Otherwise, we would have had four. +// The register bit-map is: +// 31 26 25 16 15 10 9 0 +// |------|----------|------|----------| +// | XXXX | FRY | IPX | FRX | + + +#define HRT_GDC_CE_FSM0_POS 0 +#define HRT_GDC_CE_FSM0_LEN 2 +#define HRT_GDC_CE_OPY_POS 2 +#define HRT_GDC_CE_OPY_LEN 14 +#define HRT_GDC_CE_OPX_POS 16 +#define HRT_GDC_CE_OPX_LEN 16 +// CHK_ENGINE register bit-map: +// 31 16 15 2 1 0 +// |----------------|-----------|----| +// | OPX | OPY |FSM0| +// However, for the time being at least, +// this implementation is meaningless in hss model, +// So, we just return 0 + + +#define HRT_GDC_CHK_ENGINE_IDX 0 +#define HRT_GDC_WOIX_IDX 1 +#define HRT_GDC_WOIY_IDX 2 +#define HRT_GDC_BPP_IDX 3 +#define HRT_GDC_FRYIPXFRX_IDX 4 +#define HRT_GDC_OXDIM_IDX 5 +#define HRT_GDC_OYDIM_IDX 6 +#define HRT_GDC_SRC_ADDR_IDX 7 +#define HRT_GDC_SRC_END_ADDR_IDX 8 +#define HRT_GDC_SRC_WRAP_ADDR_IDX 9 +#define HRT_GDC_SRC_STRIDE_IDX 10 +#define HRT_GDC_DST_ADDR_IDX 11 +#define HRT_GDC_DST_STRIDE_IDX 12 +#define HRT_GDC_DX_IDX 13 +#define HRT_GDC_DY_IDX 14 +#define HRT_GDC_P0X_IDX 15 +#define HRT_GDC_P0Y_IDX 16 +#define HRT_GDC_P1X_IDX 17 +#define HRT_GDC_P1Y_IDX 18 +#define HRT_GDC_P2X_IDX 19 +#define HRT_GDC_P2Y_IDX 20 +#define HRT_GDC_P3X_IDX 21 +#define HRT_GDC_P3Y_IDX 22 +#define HRT_GDC_PERF_POINT_IDX 23 // 1x1 ; 1x2 ; 2x1 ; 2x2 pixels per cc +#define HRT_GDC_INTERP_TYPE_IDX 24 // NND ; BLI ; BCI ; LUT +#define HRT_GDC_SCAN_IDX 25 // 0 = STB (Slide To Bottom) ; 1 = STR (Slide To Right) +#define HRT_GDC_PROC_MODE_IDX 26 // 0 = Scaling ; 1 = Tetragon + +#define HRT_GDC_LUT_IDX 32 + + +#endif /* HRT_GDC_v2_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gp_timer_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gp_timer_defs.h new file mode 100644 index 0000000000000..3082e2f5e0141 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gp_timer_defs.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _gp_timer_defs_h +#define _gp_timer_defs_h + +#define _HRT_GP_TIMER_REG_ALIGN 4 + +#define HIVE_GP_TIMER_RESET_REG_IDX 0 +#define HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX 1 +#define HIVE_GP_TIMER_ENABLE_REG_IDX(timer) (HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX + 1 + timer) +#define HIVE_GP_TIMER_VALUE_REG_IDX(timer,timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timers) + timer) +#define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer,timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers, timers) + timer) +#define HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer,timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timers, timers) + timer) +#define HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq,timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timers, timers) + irq) +#define HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irqs, timers) + irq) +#define HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs, timers, irqs) + irq) + +#define HIVE_GP_TIMER_COUNT_TYPE_HIGH 0 +#define HIVE_GP_TIMER_COUNT_TYPE_LOW 1 +#define HIVE_GP_TIMER_COUNT_TYPE_POSEDGE 2 +#define HIVE_GP_TIMER_COUNT_TYPE_NEGEDGE 3 +#define HIVE_GP_TIMER_COUNT_TYPES 4 + +#endif /* _gp_timer_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h new file mode 100644 index 0000000000000..a807d4c990414 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _gpio_block_defs_h_ +#define _gpio_block_defs_h_ + +#define _HRT_GPIO_BLOCK_REG_ALIGN 4 + +/* R/W registers */ +#define _gpio_block_reg_do_e 0 +#define _gpio_block_reg_do_select 1 +#define _gpio_block_reg_do_0 2 +#define _gpio_block_reg_do_1 3 +#define _gpio_block_reg_do_pwm_cnt_0 4 +#define _gpio_block_reg_do_pwm_cnt_1 5 +#define _gpio_block_reg_do_pwm_cnt_2 6 +#define _gpio_block_reg_do_pwm_cnt_3 7 +#define _gpio_block_reg_do_pwm_main_cnt 8 +#define _gpio_block_reg_do_pwm_enable 9 +#define _gpio_block_reg_di_debounce_sel 10 +#define _gpio_block_reg_di_debounce_cnt_0 11 +#define _gpio_block_reg_di_debounce_cnt_1 12 +#define _gpio_block_reg_di_debounce_cnt_2 13 +#define _gpio_block_reg_di_debounce_cnt_3 14 +#define _gpio_block_reg_di_active_level 15 + + +/* read-only registers */ +#define _gpio_block_reg_di 16 + +#endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h new file mode 100644 index 0000000000000..2f7cb2dff0e9b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h @@ -0,0 +1,68 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ +#define _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ + +/* + * These are the indices of each interrupt in the interrupt + * controller's registers. these can be used as the irq_id + * argument to the hrt functions irq_controller.h. + * + * The definitions are taken from _defs.h + */ +typedef enum hrt_isp_css_irq { + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID , + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID , + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID , + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID , + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID , + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID , + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID , + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID , + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID , + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID , + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID , + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID , + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID , + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID , + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID , + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID , + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID , + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID , + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID , + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID , + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID , + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID , + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID , + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID , + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID , + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID , + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID , + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID , + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID , + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID , + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID , + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID , + /* this must (obviously) be the last on in the enum */ + hrt_isp_css_irq_num_irqs +} hrt_isp_css_irq_t; + +typedef enum hrt_isp_css_irq_status { + hrt_isp_css_irq_status_error, + hrt_isp_css_irq_status_more_irqs, + hrt_isp_css_irq_status_success +} hrt_isp_css_irq_status_t; + +#endif /* _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h new file mode 100644 index 0000000000000..5a2ce9108ae49 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h @@ -0,0 +1,435 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _hive_isp_css_defs_h__ +#define _hive_isp_css_defs_h__ + +#define _HIVE_ISP_CSS_2401_SYSTEM 1 +#define HIVE_ISP_CTRL_DATA_WIDTH 32 +#define HIVE_ISP_CTRL_ADDRESS_WIDTH 32 +#define HIVE_ISP_CTRL_MAX_BURST_SIZE 1 +#define HIVE_ISP_DDR_ADDRESS_WIDTH 36 + +#define HIVE_ISP_HOST_MAX_BURST_SIZE 8 /* host supports bursts in order to prevent repeating DDRAM accesses */ +#define HIVE_ISP_NUM_GPIO_PINS 12 + +/* This list of vector num_elems/elem_bits pairs is valid both in C as initializer + and in the DMA parameter list */ +#define HIVE_ISP_DDR_DMA_SPECS {{32, 8}, {16, 16}, {18, 14}, {25, 10}, {21, 12}} +#define HIVE_ISP_DDR_WORD_BITS 256 +#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS/8) +#define HIVE_ISP_DDR_BYTES (512 * 1024 * 1024) +#define HIVE_ISP_DDR_BYTES_RTL (127 * 1024 * 1024) +#define HIVE_ISP_DDR_SMALL_BYTES (128 * 256 / 8) +#define HIVE_ISP_PAGE_SHIFT 12 +#define HIVE_ISP_PAGE_SIZE (1< + +#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS)-1) +#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS)-1) + +#define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) +#define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) + +#endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h new file mode 100644 index 0000000000000..58b0e6effbd06 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h @@ -0,0 +1,128 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_HIVE_TYPES_H +#define _HRT_HIVE_TYPES_H + +#include "version.h" +#include "defs.h" + +#ifndef HRTCAT3 +#define _HRTCAT3(m,n,o) m##n##o +#define HRTCAT3(m,n,o) _HRTCAT3(m,n,o) +#endif + +#ifndef HRTCAT4 +#define _HRTCAT4(m,n,o,p) m##n##o##p +#define HRTCAT4(m,n,o,p) _HRTCAT4(m,n,o,p) +#endif + +#ifndef HRTMIN +#define HRTMIN(a,b) (((a)<(b))?(a):(b)) +#endif + +#ifndef HRTMAX +#define HRTMAX(a,b) (((a)>(b))?(a):(b)) +#endif + +/* boolean data type */ +typedef unsigned int hive_bool; +#define hive_false 0 +#define hive_true 1 + +typedef char hive_int8; +typedef short hive_int16; +typedef int hive_int32; +typedef long long hive_int64; + +typedef unsigned char hive_uint8; +typedef unsigned short hive_uint16; +typedef unsigned int hive_uint32; +typedef unsigned long long hive_uint64; + +/* by default assume 32 bit master port (both data and address) */ +#ifndef HRT_DATA_WIDTH +#define HRT_DATA_WIDTH 32 +#endif +#ifndef HRT_ADDRESS_WIDTH +#define HRT_ADDRESS_WIDTH 32 +#endif + +#define HRT_DATA_BYTES (HRT_DATA_WIDTH/8) +#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH/8) + +#if HRT_DATA_WIDTH == 64 +typedef hive_uint64 hrt_data; +#elif HRT_DATA_WIDTH == 32 +typedef hive_uint32 hrt_data; +#else +#error data width not supported +#endif + +#if HRT_ADDRESS_WIDTH == 64 +typedef hive_uint64 hrt_address; +#elif HRT_ADDRESS_WIDTH == 32 +typedef hive_uint32 hrt_address; +#else +#error adddres width not supported +#endif + +/* The SP side representation of an HMM virtual address */ +typedef hive_uint32 hrt_vaddress; + +/* use 64 bit addresses in simulation, where possible */ +typedef hive_uint64 hive_sim_address; + +/* below is for csim, not for hrt, rename and move this elsewhere */ + +typedef unsigned int hive_uint; +typedef hive_uint32 hive_address; +typedef hive_address hive_slave_address; +typedef hive_address hive_mem_address; + +/* MMIO devices */ +typedef hive_uint hive_mmio_id; +typedef hive_mmio_id hive_slave_id; +typedef hive_mmio_id hive_port_id; +typedef hive_mmio_id hive_master_id; +typedef hive_mmio_id hive_mem_id; +typedef hive_mmio_id hive_dev_id; +typedef hive_mmio_id hive_fifo_id; + +typedef hive_uint hive_hier_id; +typedef hive_hier_id hive_device_id; +typedef hive_device_id hive_proc_id; +typedef hive_device_id hive_cell_id; +typedef hive_device_id hive_host_id; +typedef hive_device_id hive_bus_id; +typedef hive_device_id hive_bridge_id; +typedef hive_device_id hive_fifo_adapter_id; +typedef hive_device_id hive_custom_device_id; + +typedef hive_uint hive_slot_id; +typedef hive_uint hive_fu_id; +typedef hive_uint hive_reg_file_id; +typedef hive_uint hive_reg_id; + +/* Streaming devices */ +typedef hive_uint hive_outport_id; +typedef hive_uint hive_inport_id; + +typedef hive_uint hive_msink_id; + +/* HRT specific */ +typedef char* hive_program; +typedef char* hive_function; + +#endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h new file mode 100644 index 0000000000000..f82bb79785cfc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h @@ -0,0 +1,138 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _ibuf_cntrl_defs_h_ +#define _ibuf_cntrl_defs_h_ + +#include +#include + +#define _IBUF_CNTRL_REG_ALIGN 4 + /* alignment of register banks, first bank are shared configuration and status registers: */ +#define _IBUF_CNTRL_PROC_REG_ALIGN 32 + + /* the actual amount of configuration registers per proc: */ +#define _IBUF_CNTRL_CONFIG_REGS_PER_PROC 18 + /* the actual amount of shared configuration registers: */ +#define _IBUF_CNTRL_CONFIG_REGS_NO_PROC 0 + + /* the actual amount of status registers per proc */ +#define _IBUF_CNTRL_STATUS_REGS_PER_PROC (_IBUF_CNTRL_CONFIG_REGS_PER_PROC + 10) + /* the actual amount shared status registers */ +#define _IBUF_CNTRL_STATUS_REGS_NO_PROC (_IBUF_CNTRL_CONFIG_REGS_NO_PROC + 2) + + /* time out bits, maximum time out value is 2^_IBUF_CNTRL_TIME_OUT_BITS - 1 */ +#define _IBUF_CNTRL_TIME_OUT_BITS 5 + +/* command token definition */ +#define _IBUF_CNTRL_CMD_TOKEN_LSB 0 +#define _IBUF_CNTRL_CMD_TOKEN_MSB 1 + +/* Str2MMIO defines */ +#define _IBUF_CNTRL_STREAM2MMIO_CMD_TOKEN_MSB _STREAM2MMIO_CMD_TOKEN_CMD_MSB +#define _IBUF_CNTRL_STREAM2MMIO_CMD_TOKEN_LSB _STREAM2MMIO_CMD_TOKEN_CMD_LSB +#define _IBUF_CNTRL_STREAM2MMIO_NUM_ITEMS_BITS _STREAM2MMIO_PACK_NUM_ITEMS_BITS +#define _IBUF_CNTRL_STREAM2MMIO_ACK_EOF_BIT _STREAM2MMIO_PACK_ACK_EOF_BIT +#define _IBUF_CNTRL_STREAM2MMIO_ACK_TOKEN_VALID_BIT _STREAM2MMIO_ACK_TOKEN_VALID_BIT + +/* acknowledge token definition */ +#define _IBUF_CNTRL_ACK_TOKEN_STORES_IDX 0 +#define _IBUF_CNTRL_ACK_TOKEN_STORES_BITS 15 +#define _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX (_IBUF_CNTRL_ACK_TOKEN_STORES_BITS + _IBUF_CNTRL_ACK_TOKEN_STORES_IDX) +#define _IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS _STREAM2MMIO_PACK_NUM_ITEMS_BITS +#define _IBUF_CNTRL_ACK_TOKEN_LSB _IBUF_CNTRL_ACK_TOKEN_STORES_IDX +#define _IBUF_CNTRL_ACK_TOKEN_MSB (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX - 1) + /* bit 31 indicates a valid ack: */ +#define _IBUF_CNTRL_ACK_TOKEN_VALID_BIT (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX) + + +/*shared registers:*/ +#define _IBUF_CNTRL_RECALC_WORDS_STATUS 0 +#define _IBUF_CNTRL_ARBITERS_STATUS 1 + +#define _IBUF_CNTRL_SET_CRUN 2 /* NO PHYSICAL REGISTER!! Only used in HSS model */ + + +/*register addresses for each proc: */ +#define _IBUF_CNTRL_CMD 0 +#define _IBUF_CNTRL_ACK 1 + + /* number of items (packets or words) per frame: */ +#define _IBUF_CNTRL_NUM_ITEMS_PER_STORE 2 + + /* number of stores (packets or words) per store/buffer: */ +#define _IBUF_CNTRL_NUM_STORES_PER_FRAME 3 + + /* the channel and command in the DMA */ +#define _IBUF_CNTRL_DMA_CHANNEL 4 +#define _IBUF_CNTRL_DMA_CMD 5 + + /* the start address and stride of the buffers */ +#define _IBUF_CNTRL_BUFFER_START_ADDRESS 6 +#define _IBUF_CNTRL_BUFFER_STRIDE 7 +#define _IBUF_CNTRL_BUFFER_END_ADDRESS 8 + + /* destination start address, stride and end address; should be the same as in the DMA */ +#define _IBUF_CNTRL_DEST_START_ADDRESS 9 +#define _IBUF_CNTRL_DEST_STRIDE 10 +#define _IBUF_CNTRL_DEST_END_ADDRESS 11 + + /* send a frame sync or not, default 1 */ +#define _IBUF_CNTRL_SYNC_FRAME 12 + + /* str2mmio cmds */ +#define _IBUF_CNTRL_STR2MMIO_SYNC_CMD 13 +#define _IBUF_CNTRL_STR2MMIO_STORE_CMD 14 + + /* num elems p word*/ +#define _IBUF_CNTRL_SHIFT_ITEMS 15 +#define _IBUF_CNTRL_ELEMS_P_WORD_IBUF 16 +#define _IBUF_CNTRL_ELEMS_P_WORD_DEST 17 + + + /* STATUS */ + /* current frame and stores in buffer */ +#define _IBUF_CNTRL_CUR_STORES 18 +#define _IBUF_CNTRL_CUR_ACKS 19 + + /* current buffer and destination address for DMA cmd's */ +#define _IBUF_CNTRL_CUR_S2M_IBUF_ADDR 20 +#define _IBUF_CNTRL_CUR_DMA_IBUF_ADDR 21 +#define _IBUF_CNTRL_CUR_DMA_DEST_ADDR 22 +#define _IBUF_CNTRL_CUR_ISP_DEST_ADDR 23 + +#define _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND 24 + +#define _IBUF_CNTRL_MAIN_CNTRL_STATE 25 +#define _IBUF_CNTRL_DMA_SYNC_STATE 26 +#define _IBUF_CNTRL_ISP_SYNC_STATE 27 + + +/*Commands: */ +#define _IBUF_CNTRL_CMD_STORE_FRAME_IDX 0 +#define _IBUF_CNTRL_CMD_ONLINE_IDX 1 + + /* initialize, copy st_addr to cur_addr etc */ +#define _IBUF_CNTRL_CMD_INITIALIZE 0 + + /* store an online frame (sync with ISP, use end cfg start, stride and end address: */ +#define _IBUF_CNTRL_CMD_STORE_ONLINE_FRAME ((1<<_IBUF_CNTRL_CMD_STORE_FRAME_IDX) | (1<<_IBUF_CNTRL_CMD_ONLINE_IDX)) + + /* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */ +#define _IBUF_CNTRL_CMD_STORE_OFFLINE_FRAME (1<<_IBUF_CNTRL_CMD_STORE_FRAME_IDX) + + /* false command token, should be different then commands. Use online bit, not store frame: */ +#define _IBUF_CNTRL_FALSE_ACK 2 + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/if_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/if_defs.h new file mode 100644 index 0000000000000..7d39e45796ae1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/if_defs.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IF_DEFS_H +#define _IF_DEFS_H + +#define HIVE_IF_FRAME_REQUEST 0xA000 +#define HIVE_IF_LINES_REQUEST 0xB000 +#define HIVE_IF_VECTORS_REQUEST 0xC000 + +#endif /* _IF_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h new file mode 100644 index 0000000000000..7766f78cd1230 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _if_subsystem_defs_h__ +#define _if_subsystem_defs_h__ + +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 0 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_1 1 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_2 2 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_3 3 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 +#define HIVE_IFMT_GP_REGS_SRST_IDX 9 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 + +#define HIVE_IFMT_GP_REGS_CH_ID_FMT_TYPE_IDX 11 + +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_BASE HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 + +/* order of the input bits for the ifmt irq controller */ +#define HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID 0 +#define HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID 1 +#define HIVE_IFMT_IRQ_IFT_SEC_BIT_ID 2 +#define HIVE_IFMT_IRQ_MEM_CPY_BIT_ID 3 +#define HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID 4 + +/* order of the input bits for the ifmt Soft reset register */ +#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_BIT_IDX 0 +#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_B_BIT_IDX 1 +#define HIVE_IFMT_GP_REGS_SRST_IFT_SEC_BIT_IDX 2 +#define HIVE_IFMT_GP_REGS_SRST_MEM_CPY_BIT_IDX 3 + +/* order of the input bits for the ifmt Soft reset register */ +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_BIT_IDX 0 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_B_BIT_IDX 1 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_SEC_BIT_IDX 2 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_MEM_CPY_BIT_IDX 3 + +#endif /* _if_subsystem_defs_h__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h new file mode 100644 index 0000000000000..87fbf82edb5bc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h @@ -0,0 +1,89 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_selector_defs_h +#define _input_selector_defs_h + +#ifndef HIVE_ISP_ISEL_SEL_BITS +#define HIVE_ISP_ISEL_SEL_BITS 2 +#endif + +#ifndef HIVE_ISP_CH_ID_BITS +#define HIVE_ISP_CH_ID_BITS 2 +#endif + +#ifndef HIVE_ISP_FMT_TYPE_BITS +#define HIVE_ISP_FMT_TYPE_BITS 5 +#endif + +/* gp_register register id's -- Outputs */ +#define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 +#define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 +#define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 +#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 + +#define HIVE_ISEL_GP_REGS_SOF_IDX 8 +#define HIVE_ISEL_GP_REGS_EOF_IDX 9 +#define HIVE_ISEL_GP_REGS_SOL_IDX 10 +#define HIVE_ISEL_GP_REGS_EOL_IDX 11 + +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 +#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 + +#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 +#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 +#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 +#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 +#define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 +#define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 +#define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 +#define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 +#define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 + + +#define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 +#define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 +#define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 +#define HIVE_ISEL_GP_REGS_SBAND_SEL_IDX 32 +#define HIVE_ISEL_GP_REGS_SYNC_SEL_IDX 33 +#define HIVE_ISEL_GP_REGS_SRST_IDX 37 + +#define HIVE_ISEL_GP_REGS_SRST_SYNCGEN_BIT 0 +#define HIVE_ISEL_GP_REGS_SRST_PRBS_BIT 1 +#define HIVE_ISEL_GP_REGS_SRST_TPG_BIT 2 +#define HIVE_ISEL_GP_REGS_SRST_FIFO_BIT 3 + +/* gp_register register id's -- Inputs */ +#define HIVE_ISEL_GP_REGS_SYNCGEN_HOR_CNT_IDX 34 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VER_CNT_IDX 35 +#define HIVE_ISEL_GP_REGS_SYNCGEN_FRAMES_CNT_IDX 36 + +/* irq sources isel irq controller */ +#define HIVE_ISEL_IRQ_SYNC_GEN_SOF_BIT_ID 0 +#define HIVE_ISEL_IRQ_SYNC_GEN_EOF_BIT_ID 1 +#define HIVE_ISEL_IRQ_SYNC_GEN_SOL_BIT_ID 2 +#define HIVE_ISEL_IRQ_SYNC_GEN_EOL_BIT_ID 3 +#define HIVE_ISEL_IRQ_NUM_IRQS 4 + +#endif /* _input_selector_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h new file mode 100644 index 0000000000000..20a13c4cdb562 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_switch_2400_defs_h +#define _input_switch_2400_defs_h + +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id)*2) + ((fmt_type)>=16)) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type)%16) * 2) + +#define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 +#define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 +#define HIVE_INPUT_SWITCH_SELECT_IF_SEC 2 +#define HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM 3 +#define HIVE_INPUT_SWITCH_VSELECT_NO_OUTPUT 0 +#define HIVE_INPUT_SWITCH_VSELECT_IF_PRIM 1 +#define HIVE_INPUT_SWITCH_VSELECT_IF_SEC 2 +#define HIVE_INPUT_SWITCH_VSELECT_STR_TO_MEM 4 + +#endif /* _input_switch_2400_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h new file mode 100644 index 0000000000000..a7f0ca80bc9be --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h @@ -0,0 +1,254 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_system_ctrl_defs_h +#define _input_system_ctrl_defs_h + +#define _INPUT_SYSTEM_CTRL_REG_ALIGN 4 /* assuming 32 bit control bus width */ + +/* --------------------------------------------------*/ + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +// Number of registers +#define ISYS_CTRL_NOF_REGS 23 + +// Register id's of MMIO slave accesible registers +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_ID 0 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_ID 1 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_ID 2 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID 3 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID 4 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID 5 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID 6 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID 7 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID 8 +#define ISYS_CTRL_ACQ_START_ADDR_REG_ID 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID 10 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID 11 +#define ISYS_CTRL_INIT_REG_ID 12 +#define ISYS_CTRL_LAST_COMMAND_REG_ID 13 +#define ISYS_CTRL_NEXT_COMMAND_REG_ID 14 +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID 15 +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID 16 +#define ISYS_CTRL_FSM_STATE_INFO_REG_ID 17 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID 18 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID 19 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 + + +/* register reset value */ +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 +#define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ISYS_CTRL_INIT_REG_RSTVAL 0 +#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 + +/* register width value */ +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ISYS_CTRL_INIT_REG_WIDTH 3 +#define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ +#define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ISYS_CTRL_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_WIDTH 1 + +/* bit definitions */ + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ + +/* +InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 +[7:4] - CaptPortId, + CaptA-'b0000 + CaptB-'b0001 + CaptC-'b0010 +[31:16] - NOF_frames +InpSysCaptFrameExt 2/0 [3:0] - 'b0001' +[7:4] - CaptPortId, + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + + 2/1 [31:0] - external capture address +InpSysAcqFrame 2/0 [3:0] - 'b0010, +[31:4] - NOF_ext_mem_words + 2/1 [31:0] - external memory read start address +InpSysOverruleON 1/0 [3:0] - 'b0011, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysOverruleOFF 1/0 [3:0] - 'b0100, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysOverruleCmd 2/0 [3:0] - 'b0101, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + + 2/1 [31:0] - command token value for port opid + + +acknowledge tokens: + +InpSysAckCFA 1/0 [3:0] - 'b0000 + [7:4] - CaptPortId, + CaptA-'b0000 + CaptB- 'b0001 + CaptC-'b0010 + [31:16] - NOF_frames +InpSysAckCFE 1/0 [3:0] - 'b0001' +[7:4] - CaptPortId, + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + +InpSysAckAF 1/0 [3:0] - 'b0010 +InpSysAckOverruleON 1/0 [3:0] - 'b0011, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysAckOverrule 2/0 [3:0] - 'b0101, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + + 2/1 [31:0] - acknowledge token value from port opid + + + +*/ + + +/* Command and acknowledge tokens IDs */ +#define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ +#define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ +#define ISYS_CTRL_ACQ_FRAME_TOKEN_ID 2 /* 0010b */ +#define ISYS_CTRL_OVERRULE_ON_TOKEN_ID 3 /* 0011b */ +#define ISYS_CTRL_OVERRULE_OFF_TOKEN_ID 4 /* 0100b */ +#define ISYS_CTRL_OVERRULE_TOKEN_ID 5 /* 0101b */ + +#define ISYS_CTRL_ACK_CFA_TOKEN_ID 0 +#define ISYS_CTRL_ACK_CFE_TOKEN_ID 1 +#define ISYS_CTRL_ACK_AF_TOKEN_ID 2 +#define ISYS_CTRL_ACK_OVERRULE_ON_TOKEN_ID 3 +#define ISYS_CTRL_ACK_OVERRULE_OFF_TOKEN_ID 4 +#define ISYS_CTRL_ACK_OVERRULE_TOKEN_ID 5 +#define ISYS_CTRL_ACK_DEVICE_ERROR_TOKEN_ID 6 + +#define ISYS_CTRL_TOKEN_ID_MSB 3 +#define ISYS_CTRL_TOKEN_ID_LSB 0 +#define ISYS_CTRL_PORT_ID_TOKEN_MSB 7 +#define ISYS_CTRL_PORT_ID_TOKEN_LSB 4 +#define ISYS_CTRL_NOF_CAPT_TOKEN_MSB 31 +#define ISYS_CTRL_NOF_CAPT_TOKEN_LSB 16 +#define ISYS_CTRL_NOF_EXT_TOKEN_MSB 31 +#define ISYS_CTRL_NOF_EXT_TOKEN_LSB 8 + +#define ISYS_CTRL_TOKEN_ID_IDX 0 +#define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) +#define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) +#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB +1) +#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB +#define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) +#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB +#define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) + +#define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ +#define ISYS_CTRL_PORT_ID_CAPT_B 1 /* device ID for capture unit B */ +#define ISYS_CTRL_PORT_ID_CAPT_C 2 /* device ID for capture unit C */ +#define ISYS_CTRL_PORT_ID_ACQUISITION 3 /* device ID for acquistion unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_A 4 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_B 5 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_C 6 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ + +#define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ +#define ISYS_CTRL_NO_DMA_ACK 0 +#define ISYS_CTRL_NO_CAPT_ACK 16 + +#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_defs.h new file mode 100644 index 0000000000000..ae62163034a66 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_defs.h @@ -0,0 +1,126 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_system_defs_h +#define _input_system_defs_h + +/* csi controller modes */ +#define HIVE_CSI_CONFIG_MAIN 0 +#define HIVE_CSI_CONFIG_STEREO1 4 +#define HIVE_CSI_CONFIG_STEREO2 8 + +/* general purpose register IDs */ + +/* Stream Multicast select modes */ +#define HIVE_ISYS_GPREG_MULTICAST_A_IDX 0 +#define HIVE_ISYS_GPREG_MULTICAST_B_IDX 1 +#define HIVE_ISYS_GPREG_MULTICAST_C_IDX 2 + +/* Stream Mux select modes */ +#define HIVE_ISYS_GPREG_MUX_IDX 3 + +/* streaming monitor status and control */ +#define HIVE_ISYS_GPREG_STRMON_STAT_IDX 4 +#define HIVE_ISYS_GPREG_STRMON_COND_IDX 5 +#define HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX 6 +#define HIVE_ISYS_GPREG_SRST_IDX 7 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_IDX 8 +#define HIVE_ISYS_GPREG_REG_PORT_A_IDX 9 +#define HIVE_ISYS_GPREG_REG_PORT_B_IDX 10 + +/* Bit numbers of the soft reset register */ +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_A_BIT 0 +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_B_BIT 1 +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_C_BIT 2 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_A_BIT 3 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_B_BIT 4 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_C_BIT 5 +#define HIVE_ISYS_GPREG_SRST_CAPT_A_BIT 6 +#define HIVE_ISYS_GPREG_SRST_CAPT_B_BIT 7 +#define HIVE_ISYS_GPREG_SRST_CAPT_C_BIT 8 +#define HIVE_ISYS_GPREG_SRST_ACQ_BIT 9 +/* For ISYS_CTRL 5bits are defined to allow soft-reset per sub-controller and top-ctrl */ +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_BIT 10 /*LSB for 5bit vector */ +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_A_BIT 10 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_B_BIT 11 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_C_BIT 12 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_ACQ_BIT 13 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_TOP_BIT 14 +/* -- */ +#define HIVE_ISYS_GPREG_SRST_STR_MUX_BIT 15 +#define HIVE_ISYS_GPREG_SRST_CIO2AHB_BIT 16 +#define HIVE_ISYS_GPREG_SRST_GEN_SHORT_FIFO_BIT 17 +#define HIVE_ISYS_GPREG_SRST_WIDE_BUS_BIT 18 // includes CIO conv +#define HIVE_ISYS_GPREG_SRST_DMA_BIT 19 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_A_BIT 20 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_B_BIT 21 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_C_BIT 22 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_ACQ_BIT 23 +#define HIVE_ISYS_GPREG_SRST_CSI_BE_OUT_BIT 24 + +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_A_BIT 0 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_B_BIT 1 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_C_BIT 2 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_ACQ_BIT 3 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_DMA_BIT 4 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_ISYS_CTRL_BIT 5 + +/* streaming monitor port id's */ +#define HIVE_ISYS_STR_MON_PORT_CAPA 0 +#define HIVE_ISYS_STR_MON_PORT_CAPB 1 +#define HIVE_ISYS_STR_MON_PORT_CAPC 2 +#define HIVE_ISYS_STR_MON_PORT_ACQ 3 +#define HIVE_ISYS_STR_MON_PORT_CSS_GENSH 4 +#define HIVE_ISYS_STR_MON_PORT_SF_GENSH 5 +#define HIVE_ISYS_STR_MON_PORT_SP2ISYS 6 +#define HIVE_ISYS_STR_MON_PORT_ISYS2SP 7 +#define HIVE_ISYS_STR_MON_PORT_PIXA 8 +#define HIVE_ISYS_STR_MON_PORT_PIXB 9 + +/* interrupt bit ID's */ +#define HIVE_ISYS_IRQ_CSI_SOF_BIT_ID 0 +#define HIVE_ISYS_IRQ_CSI_EOF_BIT_ID 1 +#define HIVE_ISYS_IRQ_CSI_SOL_BIT_ID 2 +#define HIVE_ISYS_IRQ_CSI_EOL_BIT_ID 3 +#define HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID 4 +#define HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID 5 +#define HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP 6 +#define HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP 7 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_A_UNDEF_PH 7*/ +#define HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP 8 +#define HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP 9 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_B_UNDEF_PH 10*/ +#define HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP 10 +#define HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP 11 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_C_UNDEF_PH 13*/ +#define HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH 12 +/*#define HIVE_ISYS_IRQ_ACQ_UNIT_UNDEF_PH 15*/ +#define HIVE_ISYS_IRQ_INP_CTRL_CAPA 13 +#define HIVE_ISYS_IRQ_INP_CTRL_CAPB 14 +#define HIVE_ISYS_IRQ_INP_CTRL_CAPC 15 +#define HIVE_ISYS_IRQ_CIO2AHB 16 +#define HIVE_ISYS_IRQ_DMA_BIT_ID 17 +#define HIVE_ISYS_IRQ_STREAM_MON_BIT_ID 18 +#define HIVE_ISYS_IRQ_NUM_BITS 19 + +/* DMA */ +#define HIVE_ISYS_DMA_CHANNEL 0 +#define HIVE_ISYS_DMA_IBUF_DDR_CONN 0 +#define HIVE_ISYS_DMA_HEIGHT 1 +#define HIVE_ISYS_DMA_ELEMS 1 /* both master buses of same width */ +#define HIVE_ISYS_DMA_STRIDE 0 /* no stride required as height is fixed to 1 */ +#define HIVE_ISYS_DMA_CROP 0 /* no cropping */ +#define HIVE_ISYS_DMA_EXTENSION 0 /* no extension as elem width is same on both side */ + +#endif /* _input_system_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h new file mode 100644 index 0000000000000..ec6dd4487158e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _irq_controller_defs_h +#define _irq_controller_defs_h + +#define _HRT_IRQ_CONTROLLER_EDGE_REG_IDX 0 +#define _HRT_IRQ_CONTROLLER_MASK_REG_IDX 1 +#define _HRT_IRQ_CONTROLLER_STATUS_REG_IDX 2 +#define _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX 3 +#define _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX 4 +#define _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX 5 +#define _HRT_IRQ_CONTROLLER_STR_OUT_ENABLE_REG_IDX 6 + +#define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 + +#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h new file mode 100644 index 0000000000000..e00bc841d0f0d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp2400_support_h +#define _isp2400_support_h + +#ifndef ISP2400_VECTOR_TYPES +/* This typedef is to be able to include hive header files + in the host code which is useful in crun */ +typedef char *tmemvectors, *tmemvectoru, *tvector; +#endif + +#define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem1), addr, val) +#define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem2), addr, val) + +#define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) +#define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) + +#define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) +#define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) + +#if ISP_HAS_HIST + #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) + #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) +#endif + +#endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h new file mode 100644 index 0000000000000..033e23bcf672a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h @@ -0,0 +1,258 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Version */ +#define RTL_VERSION + +/* Cell name */ +#define ISP_CELL_TYPE isp2401_mamoiada +#define ISP_VMEM simd_vmem +#define _HRT_ISP_VMEM isp2401_mamoiada_simd_vmem + +/* instruction pipeline depth */ +#define ISP_BRANCHDELAY 5 + +/* bus */ +#define ISP_BUS_WIDTH 32 +#define ISP_BUS_ADDR_WIDTH 32 +#define ISP_BUS_BURST_SIZE 1 + +/* data-path */ +#define ISP_SCALAR_WIDTH 32 +#define ISP_SLICE_NELEMS 4 +#define ISP_VEC_NELEMS 64 +#define ISP_VEC_ELEMBITS 14 +#define ISP_VEC_ELEM8BITS 16 +#define ISP_CLONE_DATAPATH_IS_16 1 + +/* memories */ +#define ISP_DMEM_DEPTH 4096 +#define ISP_DMEM_BSEL_DOWNSAMPLE 8 +#define ISP_VMEM_DEPTH 3072 +#define ISP_VMEM_BSEL_DOWNSAMPLE 8 +#define ISP_VMEM_ELEMBITS 14 +#define ISP_VMEM_ELEM_PRECISION 14 +#define ISP_VMEM_IS_BAMEM 1 +#if ISP_VMEM_IS_BAMEM + #define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 + #define ISP_VMEM_BAMEM_LATENCY 5 + #define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 + #define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 + #define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 + #define ISP_VMEM_BAMEM_LININT 0 + #define ISP_VMEM_BAMEM_DAP_BITS 3 + #define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 + #define ISP_VMEM_BAMEM_PID_BITS 3 + #define ISP_VMEM_BAMEM_OFFSET_BITS 19 + #define ISP_VMEM_BAMEM_ADDRESS_BITS 25 + #define ISP_VMEM_BAMEM_RID_BITS 4 + #define ISP_VMEM_BAMEM_TRANSPOSITION 1 + #define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 + #define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 + #define ISP_VMEM_BAMEM_LUT_ELEMS 16 + #define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 + #define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 + #define ISP_VMEM_BAMEM_SMART_FETCH 1 + #define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 +#endif /* ISP_VMEM_IS_BAMEM */ +#define ISP_PMEM_DEPTH 2048 +#define ISP_PMEM_WIDTH 640 +#define ISP_VAMEM_ADDRESS_BITS 12 +#define ISP_VAMEM_ELEMBITS 12 +#define ISP_VAMEM_DEPTH 2048 +#define ISP_VAMEM_ALIGNMENT 2 +#define ISP_VA_ADDRESS_WIDTH 896 +#define ISP_VEC_VALSU_LATENCY ISP_VEC_NELEMS +#define ISP_HIST_ADDRESS_BITS 12 +#define ISP_HIST_ALIGNMENT 4 +#define ISP_HIST_COMP_IN_PREC 12 +#define ISP_HIST_DEPTH 1024 +#define ISP_HIST_WIDTH 24 +#define ISP_HIST_COMPONENTS 4 + +/* program counter */ +#define ISP_PC_WIDTH 13 + +/* Template switches */ +#define ISP_SHIELD_INPUT_DMEM 0 +#define ISP_SHIELD_OUTPUT_DMEM 1 +#define ISP_SHIELD_INPUT_VMEM 0 +#define ISP_SHIELD_OUTPUT_VMEM 0 +#define ISP_SHIELD_INPUT_PMEM 1 +#define ISP_SHIELD_OUTPUT_PMEM 1 +#define ISP_SHIELD_INPUT_HIST 1 +#define ISP_SHIELD_OUTPUT_HIST 1 +/* When LUT is select the shielding is always on */ +#define ISP_SHIELD_INPUT_VAMEM 1 +#define ISP_SHIELD_OUTPUT_VAMEM 1 + +#define ISP_HAS_IRQ 1 +#define ISP_HAS_SOFT_RESET 1 +#define ISP_HAS_VEC_DIV 0 +#define ISP_HAS_VFU_W_2O 1 +#define ISP_HAS_DEINT3 1 +#define ISP_HAS_LUT 1 +#define ISP_HAS_HIST 1 +#define ISP_HAS_VALSU 1 +#define ISP_HAS_3rdVALSU 1 +#define ISP_VRF1_HAS_2P 1 + +#define ISP_SRU_GUARDING 1 +#define ISP_VLSU_GUARDING 1 + +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 + +#define ISP_SPLIT_VMUL_VADD_IS 0 +#define ISP_RFSPLIT_FPGA 0 + +/* RSN or Bus pipelining */ +#define ISP_RSN_PIPE 1 +#define ISP_VSF_BUS_PIPE 0 + +/* extra slave port to vmem */ +#define ISP_IF_VMEM 0 +#define ISP_GDC_VMEM 0 + +/* Streaming ports */ +#define ISP_IF 1 +#define ISP_IF_B 1 +#define ISP_GDC 1 +#define ISP_SCL 1 +#define ISP_GPFIFO 1 +#define ISP_SP 1 + +/* Removing Issue Slot(s) */ +#define ISP_HAS_NOT_SIMD_IS2 0 +#define ISP_HAS_NOT_SIMD_IS3 0 +#define ISP_HAS_NOT_SIMD_IS4 0 +#define ISP_HAS_NOT_SIMD_IS4_VADD 0 +#define ISP_HAS_NOT_SIMD_IS5 0 +#define ISP_HAS_NOT_SIMD_IS6 0 +#define ISP_HAS_NOT_SIMD_IS7 0 +#define ISP_HAS_NOT_SIMD_IS8 0 + +/* ICache */ +#define ISP_ICACHE 1 +#define ISP_ICACHE_ONLY 0 +#define ISP_ICACHE_PREFETCH 1 +#define ISP_ICACHE_INDEX_BITS 8 +#define ISP_ICACHE_SET_BITS 5 +#define ISP_ICACHE_BLOCKS_PER_SET_BITS 1 + +/* Experimental Flags */ +#define ISP_EXP_1 0 +#define ISP_EXP_2 0 +#define ISP_EXP_3 0 +#define ISP_EXP_4 0 +#define ISP_EXP_5 0 +#define ISP_EXP_6 0 + +/* Derived values */ +#define ISP_LOG2_PMEM_WIDTH 10 +#define ISP_VEC_WIDTH 896 +#define ISP_SLICE_WIDTH 56 +#define ISP_VMEM_WIDTH 896 +#define ISP_VMEM_ALIGN 128 +#if ISP_VMEM_IS_BAMEM + #define ISP_VMEM_ALIGN_ELEM 2 +#endif /* ISP_VMEM_IS_BAMEM */ +#define ISP_SIMDLSU 1 +#define ISP_LSU_IMM_BITS 12 + +/* convenient shortcuts for software*/ +#define ISP_NWAY ISP_VEC_NELEMS +#define NBITS ISP_VEC_ELEMBITS + +#define _isp_ceil_div(a,b) (((a)+(b)-1)/(b)) + +#ifdef C_RUN +#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64)*8) +#else +#define ISP_VEC_ALIGN ISP_VMEM_ALIGN +#endif + +/* HRT specific vector support */ +#define isp2401_mamoiada_vector_alignment ISP_VEC_ALIGN +#define isp2401_mamoiada_vector_elem_bits ISP_VMEM_ELEMBITS +#define isp2401_mamoiada_vector_elem_precision ISP_VMEM_ELEM_PRECISION +#define isp2401_mamoiada_vector_num_elems ISP_VEC_NELEMS + +/* register file sizes */ +#define ISP_RF0_SIZE 64 +#define ISP_RF1_SIZE 16 +#define ISP_RF2_SIZE 64 +#define ISP_RF3_SIZE 4 +#define ISP_RF4_SIZE 64 +#define ISP_RF5_SIZE 16 +#define ISP_RF6_SIZE 16 +#define ISP_RF7_SIZE 16 +#define ISP_RF8_SIZE 16 +#define ISP_RF9_SIZE 16 +#define ISP_RF10_SIZE 16 +#define ISP_RF11_SIZE 16 +#define ISP_VRF1_SIZE 32 +#define ISP_VRF2_SIZE 32 +#define ISP_VRF3_SIZE 32 +#define ISP_VRF4_SIZE 32 +#define ISP_VRF5_SIZE 32 +#define ISP_VRF6_SIZE 32 +#define ISP_VRF7_SIZE 32 +#define ISP_VRF8_SIZE 32 +#define ISP_SRF1_SIZE 4 +#define ISP_SRF2_SIZE 64 +#define ISP_SRF3_SIZE 64 +#define ISP_SRF4_SIZE 32 +#define ISP_SRF5_SIZE 64 +#define ISP_FRF0_SIZE 16 +#define ISP_FRF1_SIZE 4 +#define ISP_FRF2_SIZE 16 +#define ISP_FRF3_SIZE 4 +#define ISP_FRF4_SIZE 4 +#define ISP_FRF5_SIZE 8 +#define ISP_FRF6_SIZE 4 +/* register file read latency */ +#define ISP_VRF1_READ_LAT 1 +#define ISP_VRF2_READ_LAT 1 +#define ISP_VRF3_READ_LAT 1 +#define ISP_VRF4_READ_LAT 1 +#define ISP_VRF5_READ_LAT 1 +#define ISP_VRF6_READ_LAT 1 +#define ISP_VRF7_READ_LAT 1 +#define ISP_VRF8_READ_LAT 1 +#define ISP_SRF1_READ_LAT 1 +#define ISP_SRF2_READ_LAT 1 +#define ISP_SRF3_READ_LAT 1 +#define ISP_SRF4_READ_LAT 1 +#define ISP_SRF5_READ_LAT 1 +#define ISP_SRF5_READ_LAT 1 +/* immediate sizes */ +#define ISP_IS1_IMM_BITS 14 +#define ISP_IS2_IMM_BITS 13 +#define ISP_IS3_IMM_BITS 14 +#define ISP_IS4_IMM_BITS 14 +#define ISP_IS5_IMM_BITS 9 +#define ISP_IS6_IMM_BITS 16 +#define ISP_IS7_IMM_BITS 9 +#define ISP_IS8_IMM_BITS 16 +#define ISP_IS9_IMM_BITS 11 +/* fifo depths */ +#define ISP_IF_FIFO_DEPTH 0 +#define ISP_IF_B_FIFO_DEPTH 0 +#define ISP_DMA_FIFO_DEPTH 0 +#define ISP_OF_FIFO_DEPTH 0 +#define ISP_GDC_FIFO_DEPTH 0 +#define ISP_SCL_FIFO_DEPTH 0 +#define ISP_GPFIFO_FIFO_DEPTH 0 +#define ISP_SP_FIFO_DEPTH 0 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h new file mode 100644 index 0000000000000..5936207216271 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h @@ -0,0 +1,234 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp_acquisition_defs_h +#define _isp_acquisition_defs_h + +#define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ +#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 + +/* --------------------------------------------------*/ + +#define NOF_ACQ_IRQS 1 + +/* --------------------------------------------------*/ +/* FSM */ +/* --------------------------------------------------*/ +#define MEM2STREAM_FSM_STATE_BITS 2 +#define ACQ_SYNCHRONIZER_FSM_STATE_BITS 2 + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +#define NOF_ACQ_REGS 12 + +// Register id's of MMIO slave accesible registers +#define ACQ_START_ADDR_REG_ID 0 +#define ACQ_MEM_REGION_SIZE_REG_ID 1 +#define ACQ_NUM_MEM_REGIONS_REG_ID 2 +#define ACQ_INIT_REG_ID 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 +#define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 +#define ACQ_LAST_COMMAND_REG_ID 6 +#define ACQ_NEXT_COMMAND_REG_ID 7 +#define ACQ_LAST_ACKNOWLEDGE_REG_ID 8 +#define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 +#define ACQ_FSM_STATE_INFO_REG_ID 10 +#define ACQ_INT_CNTR_INFO_REG_ID 11 + +// Register width +#define ACQ_START_ADDR_REG_WIDTH 9 +#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ACQ_INIT_REG_WIDTH 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define ACQ_LAST_COMMAND_REG_WIDTH 32 +#define ACQ_NEXT_COMMAND_REG_WIDTH 32 +#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS *3)) +#define ACQ_INT_CNTR_INFO_REG_WIDTH 32 + +/* register reset value */ +#define ACQ_START_ADDR_REG_RSTVAL 0 +#define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ACQ_INIT_REG_RSTVAL 0 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 +#define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 +#define ACQ_LAST_COMMAND_REG_RSTVAL 0 +#define ACQ_NEXT_COMMAND_REG_RSTVAL 0 +#define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 +#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 + +/* bit definitions */ +#define ACQ_INIT_RST_REG_BIT 0 +#define ACQ_INIT_RESYNC_BIT 2 +#define ACQ_INIT_RST_IDX ACQ_INIT_RST_REG_BIT +#define ACQ_INIT_RST_BITS 1 +#define ACQ_INIT_RESYNC_IDX ACQ_INIT_RESYNC_BIT +#define ACQ_INIT_RESYNC_BITS 1 + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ +#define ACQ_TOKEN_ID_LSB 0 +#define ACQ_TOKEN_ID_MSB 3 +#define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 +#define ACQ_TOKEN_ID_IDX 0 +#define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH +#define ACQ_INIT_CMD_INIT_IDX 4 +#define ACQ_INIT_CMD_INIT_BITS 3 +#define ACQ_CMD_START_ADDR_IDX 4 +#define ACQ_CMD_START_ADDR_BITS 9 +#define ACQ_CMD_NOFWORDS_IDX 13 +#define ACQ_CMD_NOFWORDS_BITS 9 +#define ACQ_MEM_REGION_ID_IDX 22 +#define ACQ_MEM_REGION_ID_BITS 9 +#define ACQ_PACKET_LENGTH_TOKEN_MSB 21 +#define ACQ_PACKET_LENGTH_TOKEN_LSB 13 +#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 +#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_LSB 4 +#define ACQ_PACKET_CH_ID_TOKEN_MSB 11 +#define ACQ_PACKET_CH_ID_TOKEN_LSB 10 +#define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ +#define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ + + +/* Command tokens IDs */ +#define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b +#define ACQ_READ_REGION_TOKEN_ID 1 //0001b +#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b +#define ACQ_INIT_TOKEN_ID 8 //1000b + +/* Acknowledge token IDs */ +#define ACQ_READ_REGION_ACK_TOKEN_ID 0 //0000b +#define ACQ_END_OF_PACKET_TOKEN_ID 4 //0100b +#define ACQ_END_OF_REGION_TOKEN_ID 5 //0101b +#define ACQ_SOP_MISMATCH_TOKEN_ID 6 //0110b +#define ACQ_UNDEF_PH_TOKEN_ID 7 //0111b + +#define ACQ_TOKEN_MEMREGIONID_MSB 30 +#define ACQ_TOKEN_MEMREGIONID_LSB 22 +#define ACQ_TOKEN_NOFWORDS_MSB 21 +#define ACQ_TOKEN_NOFWORDS_LSB 13 +#define ACQ_TOKEN_STARTADDR_MSB 12 +#define ACQ_TOKEN_STARTADDR_LSB 4 + + +/* --------------------------------------------------*/ +/* MIPI */ +/* --------------------------------------------------*/ + +#define WORD_COUNT_WIDTH 16 +#define PKT_CODE_WIDTH 6 +#define CHN_NO_WIDTH 2 +#define ERROR_INFO_WIDTH 8 + +#define LONG_PKTCODE_MAX 63 +#define LONG_PKTCODE_MIN 16 +#define SHORT_PKTCODE_MAX 15 + +#define EOF_CODE 1 + +/* --------------------------------------------------*/ +/* Packet Info */ +/* --------------------------------------------------*/ +#define ACQ_START_OF_FRAME 0 +#define ACQ_END_OF_FRAME 1 +#define ACQ_START_OF_LINE 2 +#define ACQ_END_OF_LINE 3 +#define ACQ_LINE_PAYLOAD 4 +#define ACQ_GEN_SH_PKT 5 + + +/* bit definition */ +#define ACQ_PKT_TYPE_IDX 16 +#define ACQ_PKT_TYPE_BITS 6 +#define ACQ_PKT_SOP_IDX 32 +#define ACQ_WORD_CNT_IDX 0 +#define ACQ_WORD_CNT_BITS 16 +#define ACQ_PKT_INFO_IDX 16 +#define ACQ_PKT_INFO_BITS 8 +#define ACQ_HEADER_DATA_IDX 0 +#define ACQ_HEADER_DATA_BITS 16 +#define ACQ_ACK_TOKEN_ID_IDX ACQ_TOKEN_ID_IDX +#define ACQ_ACK_TOKEN_ID_BITS ACQ_TOKEN_ID_BITS +#define ACQ_ACK_NOFWORDS_IDX 13 +#define ACQ_ACK_NOFWORDS_BITS 9 +#define ACQ_ACK_PKT_LEN_IDX 4 +#define ACQ_ACK_PKT_LEN_BITS 16 + + +/* --------------------------------------------------*/ +/* Packet Data Type */ +/* --------------------------------------------------*/ + + +#define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ +#define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ +#define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ +#define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ +#define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ +#define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ +#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ +#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ +#define ACQ_SOL_DATA 2 /* 00 0010 line start */ +#define ACQ_EOL_DATA 3 /* 00 0011 line end */ +#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_RESERVED_DATA_TYPE_MIN 56 +#define ACQ_RESERVED_DATA_TYPE_MAX 63 +#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 +#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 +#define ACQ_YUV_RESERVED_DATA_TYPE 27 +#define ACQ_RGB_RESERVED_DATA_TYPE_MIN 37 +#define ACQ_RGB_RESERVED_DATA_TYPE_MAX 39 +#define ACQ_RAW_RESERVED_DATA_TYPE_MIN 46 +#define ACQ_RAW_RESERVED_DATA_TYPE_MAX 47 + +/* --------------------------------------------------*/ + +#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h new file mode 100644 index 0000000000000..aa413df022f2e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h @@ -0,0 +1,310 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp_capture_defs_h +#define _isp_capture_defs_h + +#define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ +#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ +#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM/8 ) +#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ +#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM + +//#define CAPT_RCV_ACK 1 +//#define CAPT_WRT_ACK 2 +//#define CAPT_IRQ_ACK 3 + +/* --------------------------------------------------*/ + +#define NOF_IRQS 2 + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +// Number of registers +#define CAPT_NOF_REGS 16 + +// Register id's of MMIO slave accesible registers +#define CAPT_START_MODE_REG_ID 0 +#define CAPT_START_ADDR_REG_ID 1 +#define CAPT_MEM_REGION_SIZE_REG_ID 2 +#define CAPT_NUM_MEM_REGIONS_REG_ID 3 +#define CAPT_INIT_REG_ID 4 +#define CAPT_START_REG_ID 5 +#define CAPT_STOP_REG_ID 6 + +#define CAPT_PACKET_LENGTH_REG_ID 7 +#define CAPT_RECEIVED_LENGTH_REG_ID 8 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 +#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 +#define CAPT_LAST_COMMAND_REG_ID 11 +#define CAPT_NEXT_COMMAND_REG_ID 12 +#define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 +#define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 +#define CAPT_FSM_STATE_INFO_REG_ID 15 + +// Register width +#define CAPT_START_MODE_REG_WIDTH 1 +//#define CAPT_START_ADDR_REG_WIDTH 9 +//#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 +//#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 +#define CAPT_INIT_REG_WIDTH (22 + 4) + +#define CAPT_START_REG_WIDTH 1 +#define CAPT_STOP_REG_WIDTH 1 + +/* --------------------------------------------------*/ +/* FSM */ +/* --------------------------------------------------*/ +#define CAPT_WRITE2MEM_FSM_STATE_BITS 2 +#define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 + + +#define CAPT_PACKET_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define CAPT_LAST_COMMAND_REG_WIDTH 32 +/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ +#define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) + +//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 +//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 + +/* register reset value */ +#define CAPT_START_MODE_REG_RSTVAL 0 +#define CAPT_START_ADDR_REG_RSTVAL 0 +#define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 +#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define CAPT_INIT_REG_RSTVAL 0 + +#define CAPT_START_REG_RSTVAL 0 +#define CAPT_STOP_REG_RSTVAL 0 + +#define CAPT_PACKET_LENGTH_REG_RSTVAL 0 +#define CAPT_RECEIVED_LENGTH_REG_RSTVAL 0 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 +#define CAPT_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 +#define CAPT_LAST_COMMAND_REG_RSTVAL 0 +#define CAPT_NEXT_COMMAND_REG_RSTVAL 0 +#define CAPT_LAST_ACKNOWLEDGE_REG_RSTVAL 0 +#define CAPT_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define CAPT_FSM_STATE_INFO_REG_RSTVAL 0 + +/* bit definitions */ +#define CAPT_INIT_RST_REG_BIT 0 +#define CAPT_INIT_FLUSH_BIT 1 +#define CAPT_INIT_RESYNC_BIT 2 +#define CAPT_INIT_RESTART_BIT 3 +#define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 +#define CAPT_INIT_RESTART_MEM_ADDR_MSB 14 +#define CAPT_INIT_RESTART_MEM_REGION_LSB 15 +#define CAPT_INIT_RESTART_MEM_REGION_MSB 25 + + +#define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT +#define CAPT_INIT_RST_REG_BITS 1 +#define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT +#define CAPT_INIT_FLUSH_BITS 1 +#define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT +#define CAPT_INIT_RESYNC_BITS 1 +#define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT +#define CAPT_INIT_RESTART_BITS 1 +#define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB +#define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) +#define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB +#define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) + + + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ +#define CAPT_TOKEN_ID_LSB 0 +#define CAPT_TOKEN_ID_MSB 3 +#define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ + +/* Command tokens IDs */ +#define CAPT_START_TOKEN_ID 0 /* 0000b */ +#define CAPT_STOP_TOKEN_ID 1 /* 0001b */ +#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ +#define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ +#define CAPT_INIT_TOKEN_ID 8 /* 1000b */ + +#define CAPT_START_TOKEN_BIT 0 +#define CAPT_STOP_TOKEN_BIT 0 +#define CAPT_FREEZE_TOKEN_BIT 0 +#define CAPT_RESUME_TOKEN_BIT 0 +#define CAPT_INIT_TOKEN_BIT 0 + +/* Acknowledge token IDs */ +#define CAPT_END_OF_PACKET_RECEIVED_TOKEN_ID 0 /* 0000b */ +#define CAPT_END_OF_PACKET_WRITTEN_TOKEN_ID 1 /* 0001b */ +#define CAPT_END_OF_REGION_WRITTEN_TOKEN_ID 2 /* 0010b */ +#define CAPT_FLUSH_DONE_TOKEN_ID 3 /* 0011b */ +#define CAPT_PREMATURE_SOP_TOKEN_ID 4 /* 0100b */ +#define CAPT_MISSING_SOP_TOKEN_ID 5 /* 0101b */ +#define CAPT_UNDEF_PH_TOKEN_ID 6 /* 0110b */ +#define CAPT_STOP_ACK_TOKEN_ID 7 /* 0111b */ + +#define CAPT_PACKET_LENGTH_TOKEN_MSB 19 +#define CAPT_PACKET_LENGTH_TOKEN_LSB 4 +#define CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB 20 +#define CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB 4 +#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB 25 +#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 +#define CAPT_PACKET_CH_ID_TOKEN_MSB 27 +#define CAPT_PACKET_CH_ID_TOKEN_LSB 26 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 + +/* bit definition */ +#define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB +#define CAPT_CMD_BITS (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) +#define CAPT_SOP_IDX 32 +#define CAPT_SOP_BITS 1 +#define CAPT_PKT_INFO_IDX 16 +#define CAPT_PKT_INFO_BITS 8 +#define CAPT_PKT_TYPE_IDX 0 +#define CAPT_PKT_TYPE_BITS 6 +#define CAPT_HEADER_DATA_IDX 0 +#define CAPT_HEADER_DATA_BITS 16 +#define CAPT_PKT_DATA_IDX 0 +#define CAPT_PKT_DATA_BITS 32 +#define CAPT_WORD_CNT_IDX 0 +#define CAPT_WORD_CNT_BITS 16 +#define CAPT_ACK_TOKEN_ID_IDX 0 +#define CAPT_ACK_TOKEN_ID_BITS 4 +//#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB +//#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) +//#define CAPT_ACK_PKT_INFO_IDX 20 +//#define CAPT_ACK_PKT_INFO_BITS 8 +//#define CAPT_ACK_MEM_REG_ID1_IDX 20 /* for capt_end_of_packet_written */ +//#define CAPT_ACK_MEM_REG_ID2_IDX 4 /* for capt_end_of_region_written */ +#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB +#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) +#define CAPT_ACK_SUPER_PKT_LEN_IDX CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB +#define CAPT_ACK_SUPER_PKT_LEN_BITS (CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB - CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB + 1) +#define CAPT_ACK_PKT_INFO_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB +#define CAPT_ACK_PKT_INFO_BITS (CAPT_PACKET_CH_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) +#define CAPT_ACK_MEM_REGION_ID_IDX CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB +#define CAPT_ACK_MEM_REGION_ID_BITS (CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB - CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB + 1) +#define CAPT_ACK_PKT_TYPE_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB +#define CAPT_ACK_PKT_TYPE_BITS (CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) +#define CAPT_INIT_TOKEN_INIT_IDX 4 +#define CAPT_INIT_TOKEN_INIT_BITS 22 + + +/* --------------------------------------------------*/ +/* MIPI */ +/* --------------------------------------------------*/ + +#define CAPT_WORD_COUNT_WIDTH 16 +#define CAPT_PKT_CODE_WIDTH 6 +#define CAPT_CHN_NO_WIDTH 2 +#define CAPT_ERROR_INFO_WIDTH 8 + +#define LONG_PKTCODE_MAX 63 +#define LONG_PKTCODE_MIN 16 +#define SHORT_PKTCODE_MAX 15 + + +/* --------------------------------------------------*/ +/* Packet Info */ +/* --------------------------------------------------*/ +#define CAPT_START_OF_FRAME 0 +#define CAPT_END_OF_FRAME 1 +#define CAPT_START_OF_LINE 2 +#define CAPT_END_OF_LINE 3 +#define CAPT_LINE_PAYLOAD 4 +#define CAPT_GEN_SH_PKT 5 + + +/* --------------------------------------------------*/ +/* Packet Data Type */ +/* --------------------------------------------------*/ + +#define CAPT_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ +#define CAPT_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ +#define CAPT_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ +#define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ +#define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ +#define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ +#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ +#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ +#define CAPT_SOL_DATA 2 /* 00 0010 line start */ +#define CAPT_EOL_DATA 3 /* 00 0011 line end */ +#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_RESERVED_DATA_TYPE_MIN 56 +#define CAPT_RESERVED_DATA_TYPE_MAX 63 +#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 +#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 +#define CAPT_YUV_RESERVED_DATA_TYPE 27 +#define CAPT_RGB_RESERVED_DATA_TYPE_MIN 37 +#define CAPT_RGB_RESERVED_DATA_TYPE_MAX 39 +#define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 +#define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 + + +/* --------------------------------------------------*/ +/* Capture Unit State */ +/* --------------------------------------------------*/ +#define CAPT_FREE_RUN 0 +#define CAPT_NO_SYNC 1 +#define CAPT_SYNC_SWP 2 +#define CAPT_SYNC_MWP 3 +#define CAPT_SYNC_WAIT 4 +#define CAPT_FREEZE 5 +#define CAPT_RUN 6 + + +/* --------------------------------------------------*/ + +#endif /* _isp_capture_defs_h */ + + + + + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h new file mode 100644 index 0000000000000..76705d7a2b44a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h @@ -0,0 +1,210 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _css_receiver_2400_common_defs_h_ +#define _css_receiver_2400_common_defs_h_ +#ifndef _mipi_backend_common_defs_h_ +#define _mipi_backend_common_defs_h_ + +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH 16 +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH 2 +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH 3 +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH (_HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_WIDTH 32 /* use 32 to be compatibel with streaming monitor !, MSB's of interface are tied to '0' */ + +/* Definition of data format ID at the interface CSS_receiver capture/acquisition units */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10 25 /* 01 1001 YUV420 10-bit */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8L 26 /* 01 1010 YUV420 8-bit legacy */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_8 30 /* 01 1110 YUV422 8-bit */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_10 31 /* 01 1111 YUV422 10-bit */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB444 32 /* 10 0000 RGB444 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB555 33 /* 10 0001 RGB555 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB565 34 /* 10 0010 RGB565 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB666 35 /* 10 0011 RGB666 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB888 36 /* 10 0100 RGB888 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW6 40 /* 10 1000 RAW6 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW7 41 /* 10 1001 RAW7 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW8 42 /* 10 1010 RAW8 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW10 43 /* 10 1011 RAW10 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW12 44 /* 10 1100 RAW12 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW14 45 /* 10 1101 RAW14 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_1 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_2 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_3 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_4 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_5 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_6 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_7 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_8 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_Emb 18 /* 01 0010 embedded eight bit non image data */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_SOF 0 /* 00 0000 frame start */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_EOF 1 /* 00 0001 frame end */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_SOL 2 /* 00 0010 line start */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_EOL 3 /* 00 0011 line end */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH1 8 /* 00 1000 Generic Short Packet Code 1 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH2 9 /* 00 1001 Generic Short Packet Code 2 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH3 10 /* 00 1010 Generic Short Packet Code 3 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH4 11 /* 00 1011 Generic Short Packet Code 4 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH5 12 /* 00 1100 Generic Short Packet Code 5 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH6 13 /* 00 1101 Generic Short Packet Code 6 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH7 14 /* 00 1110 Generic Short Packet Code 7 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +/* used reseved mipi positions for these */ +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_3 38 + +//_HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 63 +#define _HRT_MIPI_BACKEND_FMT_TYPE_CUSTOM 63 + +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_WIDTH 6 + +/* Definition of format_types at the interface CSS --> input_selector*/ +/* !! Changes here should be copied to systems/isp/isp_css/bin/conv_transmitter_cmd.tcl !! */ +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB888 0 // 36 'h24 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB555 1 // 33 'h +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB444 2 // 32 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB565 3 // 34 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB666 4 // 35 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW10 6 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW6 7 // 40 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW7 8 // 41 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW12 9 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW14 10 // 45 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8 11 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10 12 // 25 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_8 13 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_10 14 // 31 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_1 15 // 48 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8L 16 // 26 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_Emb 17 // 18 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_2 18 // 49 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_3 19 // 50 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_4 20 // 51 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_5 21 // 52 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_6 22 // 53 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_7 23 // 54 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_8 24 // 55 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8_CSPS 25 // 28 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10_CSPS 26 // 29 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW16 27 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18 28 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_2 29 // ? Option 2 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_3 30 // ? Option 3 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding + +/* definition for state machine of data FIFO for decode different type of data */ +#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV420_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_YUV420_8L_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB555_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB565_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 +#define _HRT_CSS_RECEIVER_2400_RGB888_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW6_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW7_REPEAT_PTN 7 +#define _HRT_CSS_RECEIVER_2400_RAW8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_RAW10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW14_REPEAT_PTN 7 + +#define _HRT_CSS_RECEIVER_2400_MAX_REPEAT_PTN _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_WIDTH 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_IDX 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_WIDTH 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_USD_BITS 4 /* bits per USD type */ + +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_EN_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_EN_IDX 8 + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_NO_COMP 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_6_10 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_7_10 2 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_8_10 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_6_12 4 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_7_12 5 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_8_12 6 + + +/* packet bit definition */ +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_IDX 32 +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_BITS 1 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_IDX 22 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_BITS 2 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_IDX 16 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_BITS 16 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_BITS 32 + + +/*************************************************************************************************/ +/* Custom Decoding */ +/* These Custom Defs are defined based on design-time config in "mipi_backend_pixel_formatter.chdl" !! */ +/*************************************************************************************************/ +/* +#define BE_CUST_EN_IDX 0 // 2bits +#define BE_CUST_EN_DATAID_IDX 2 // 6bits MIPI DATA ID +#define BE_CUST_EN_WIDTH 8 +#define BE_CUST_MODE_ALL 1 // Enable Custom Decoding for all DATA IDs +#define BE_CUST_MODE_ONE 3 // Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID + +// Data State config = {get_bits(6bits), valid(1bit)} // +#define BE_CUST_DATA_STATE_S0_IDX 0 // 7bits +#define BE_CUST_DATA_STATE_S1_IDX 8 //7 // 7bits +#define BE_CUST_DATA_STATE_S2_IDX 16//14 // 7bits / +#define BE_CUST_DATA_STATE_WIDTH 24//21 +#define BE_CUST_DATA_STATE_VALID_IDX 0 // 1bits +#define BE_CUST_DATA_STATE_GETBITS_IDX 1 // 6bits + + + + +// Pixel Extractor config +#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 // 6bits +#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 6//5 // 5bits +#define BE_CUST_PIX_EXT_PIX_MASK_IDX 11//10 // 18bits +#define BE_CUST_PIX_EXT_PIX_EN_IDX 29 //28 // 1bits + +#define BE_CUST_PIX_EXT_WIDTH 30//29 + +// Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} +#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 // 4bits +#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 // 4bits +#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 // 4bits +#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 // 4bits +#define BE_CUST_PIX_VALID_EOP_WIDTH 16 +#define BE_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 // Normal (NO less get_bits case) Valid - 1bits +#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 // Normal (NO less get_bits case) EoP - 1bits +#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 // Especial (less get_bits case) Valid - 1bits +#define BE_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 // Especial (less get_bits case) EoP - 1bits + +*/ + +#endif /* _mipi_backend_common_defs_h_ */ +#endif /* _css_receiver_2400_common_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h new file mode 100644 index 0000000000000..db5a1d2caba0b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h @@ -0,0 +1,215 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _mipi_backend_defs_h +#define _mipi_backend_defs_h + +#include "mipi_backend_common_defs.h" + +#define MIPI_BACKEND_REG_ALIGN 4 // assuming 32 bit control bus width + +#define _HRT_MIPI_BACKEND_NOF_IRQS 3 // sid_lut + +// SH Backend Register IDs +#define _HRT_MIPI_BACKEND_ENABLE_REG_IDX 0 +#define _HRT_MIPI_BACKEND_STATUS_REG_IDX 1 +//#define _HRT_MIPI_BACKEND_HIGH_PREC_REG_IDX 2 +#define _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX 2 +#define _HRT_MIPI_BACKEND_COMP_FORMAT_REG1_IDX 3 +#define _HRT_MIPI_BACKEND_COMP_FORMAT_REG2_IDX 4 +#define _HRT_MIPI_BACKEND_COMP_FORMAT_REG3_IDX 5 +#define _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_IDX 6 +#define _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_IDX 7 +#define _HRT_MIPI_BACKEND_FORCE_RAW8_REG_IDX 8 +#define _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX 9 +#define _HRT_MIPI_BACKEND_IRQ_CLEAR_REG_IDX 10 +//// +#define _HRT_MIPI_BACKEND_CUST_EN_REG_IDX 11 +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX 12 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX 13 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P1_REG_IDX 14 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P2_REG_IDX 15 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P3_REG_IDX 16 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S1P0_REG_IDX 17 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S1P1_REG_IDX 18 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S1P2_REG_IDX 19 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S1P3_REG_IDX 20 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S2P0_REG_IDX 21 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S2P1_REG_IDX 22 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S2P2_REG_IDX 23 +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S2P3_REG_IDX 24 +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_REG_IDX 25 +//// +#define _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX 26 +#define _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX 27 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENABLE_REG_IDX 28 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX 28 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_1_REG_IDX 29 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_2_REG_IDX 30 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_3_REG_IDX 31 + +#define _HRT_MIPI_BACKEND_NOF_REGISTERS 32 // excluding the LP LUT entries + +#define _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX 32 + + +///////////////////////////////////////////////////////////////////////////////////////////////////// +#define _HRT_MIPI_BACKEND_ENABLE_REG_WIDTH 1 +#define _HRT_MIPI_BACKEND_STATUS_REG_WIDTH 1 +//#define _HRT_MIPI_BACKEND_HIGH_PREC_REG_WIDTH 1 +#define _HRT_MIPI_BACKEND_COMP_FORMAT_REG_WIDTH 32 +#define _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_WIDTH 7 +#define _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_WIDTH 9 +#define _HRT_MIPI_BACKEND_FORCE_RAW8_REG_WIDTH 8 +#define _HRT_MIPI_BACKEND_IRQ_STATUS_REG_WIDTH _HRT_MIPI_BACKEND_NOF_IRQS +#define _HRT_MIPI_BACKEND_IRQ_CLEAR_REG_WIDTH 0 +#define _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_WIDTH 1 +#define _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_WIDTH 1+2+6 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENABLE_REG_WIDTH 1 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_WIDTH 7 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_1_REG_WIDTH 7 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_2_REG_WIDTH 7 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_3_REG_WIDTH 7 + +///////////////////////////////////////////////////////////////////////////////////////////////////// + +#define _HRT_MIPI_BACKEND_NOF_SP_LUT_ENTRIES 4 + +//#define _HRT_MIPI_BACKEND_MAX_NOF_LP_LUT_ENTRIES 16 // to satisfy hss model static array declaration + + +#define _HRT_MIPI_BACKEND_CHANNEL_ID_WIDTH 2 +#define _HRT_MIPI_BACKEND_FORMAT_TYPE_WIDTH 6 +#define _HRT_MIPI_BACKEND_PACKET_ID_WIDTH _HRT_MIPI_BACKEND_CHANNEL_ID_WIDTH + _HRT_MIPI_BACKEND_FORMAT_TYPE_WIDTH + +#define _HRT_MIPI_BACKEND_STREAMING_PIX_A_LSB 0 +#define _HRT_MIPI_BACKEND_STREAMING_PIX_A_MSB(pix_width) (_HRT_MIPI_BACKEND_STREAMING_PIX_A_LSB + (pix_width) - 1) +#define _HRT_MIPI_BACKEND_STREAMING_PIX_A_VAL_BIT(pix_width) (_HRT_MIPI_BACKEND_STREAMING_PIX_A_MSB(pix_width) + 1) +#define _HRT_MIPI_BACKEND_STREAMING_PIX_B_LSB(pix_width) (_HRT_MIPI_BACKEND_STREAMING_PIX_A_VAL_BIT(pix_width) + 1) +#define _HRT_MIPI_BACKEND_STREAMING_PIX_B_MSB(pix_width) (_HRT_MIPI_BACKEND_STREAMING_PIX_B_LSB(pix_width) + (pix_width) - 1) +#define _HRT_MIPI_BACKEND_STREAMING_PIX_B_VAL_BIT(pix_width) (_HRT_MIPI_BACKEND_STREAMING_PIX_B_MSB(pix_width) + 1) +#define _HRT_MIPI_BACKEND_STREAMING_SOP_BIT(pix_width) (_HRT_MIPI_BACKEND_STREAMING_PIX_B_VAL_BIT(pix_width) + 1) +#define _HRT_MIPI_BACKEND_STREAMING_EOP_BIT(pix_width) (_HRT_MIPI_BACKEND_STREAMING_SOP_BIT(pix_width) + 1) +#define _HRT_MIPI_BACKEND_STREAMING_WIDTH(pix_width) (_HRT_MIPI_BACKEND_STREAMING_EOP_BIT(pix_width) + 1) + +/*************************************************************************************************/ +/* Custom Decoding */ +/* These Custom Defs are defined based on design-time config in "mipi_backend_pixel_formatter.chdl" !! */ +/*************************************************************************************************/ +#define _HRT_MIPI_BACKEND_CUST_EN_IDX 0 /* 2bits */ +#define _HRT_MIPI_BACKEND_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ +#define _HRT_MIPI_BACKEND_CUST_EN_HIGH_PREC_IDX 8 // 1 bit +#define _HRT_MIPI_BACKEND_CUST_EN_WIDTH 9 +#define _HRT_MIPI_BACKEND_CUST_MODE_ALL 1 /* Enable Custom Decoding for all DATA IDs */ +#define _HRT_MIPI_BACKEND_CUST_MODE_ONE 3 /* Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID */ + +#define _HRT_MIPI_BACKEND_CUST_EN_OPTION_IDX 1 + +/* Data State config = {get_bits(6bits), valid(1bit)} */ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S1_IDX 8 /* 7bits */ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S2_IDX 16 /* was 14 7bits */ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_WIDTH 24 /* was 21*/ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_VALID_IDX 0 /* 1bits */ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_GETBITS_IDX 1 /* 6bits */ + +/* Pixel Extractor config */ +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_DATA_ALIGN_IDX 0 /* 6bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_PIX_ALIGN_IDX 6 /* 5bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_PIX_MASK_IDX 11 /* was 10 18bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_PIX_EN_IDX 29 /* was 28 1bits */ + +#define _HRT_MIPI_BACKEND_CUST_PIX_EXT_WIDTH 30 /* was 29 */ + +/* Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_P0_IDX 0 /* 4bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_P1_IDX 4 /* 4bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_P2_IDX 8 /* 4bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_P3_IDX 12 /* 4bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_WIDTH 16 +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 /* Normal (NO less get_bits case) Valid - 1bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 /* Normal (NO less get_bits case) EoP - 1bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 /* Especial (less get_bits case) Valid - 1bits */ +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 /* Especial (less get_bits case) EoP - 1bits */ + +/*************************************************************************************************/ +/* MIPI backend output streaming interface definition */ +/* These parameters define the fields within the streaming bus. These should also be used by the */ +/* subsequent block, ie stream2mmio. */ +/*************************************************************************************************/ +/* The pipe backend - stream2mmio should be design time configurable in */ +/* PixWidth - Number of bits per pixel */ +/* PPC - Pixel per Clocks */ +/* NumSids - Max number of source Ids (ifc's) and derived from that: */ +/* SidWidth - Number of bits required for the sid parameter */ +/* In order to keep this configurability, below Macro's have these as a parameter */ +/*************************************************************************************************/ + +#define HRT_MIPI_BACKEND_STREAM_EOP_BIT 0 +#define HRT_MIPI_BACKEND_STREAM_SOP_BIT 1 +#define HRT_MIPI_BACKEND_STREAM_EOF_BIT 2 +#define HRT_MIPI_BACKEND_STREAM_SOF_BIT 3 +#define HRT_MIPI_BACKEND_STREAM_CHID_LS_BIT 4 +#define HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT(sid_width) (HRT_MIPI_BACKEND_STREAM_CHID_LS_BIT+(sid_width)-1) +#define HRT_MIPI_BACKEND_STREAM_PIX_VAL_BIT(sid_width,p) (HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT(sid_width)+1+p) + +#define HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width,ppc,pix_width,p) (HRT_MIPI_BACKEND_STREAM_PIX_VAL_BIT(sid_width,ppc)+ ((pix_width)*p)) +#define HRT_MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_width,ppc,pix_width,p) (HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width,ppc,pix_width,p) + (pix_width) - 1) + +#if 0 +//#define HRT_MIPI_BACKEND_STREAM_PIX_BITS 14 +//#define HRT_MIPI_BACKEND_STREAM_CHID_BITS 4 +//#define HRT_MIPI_BACKEND_STREAM_PPC 4 +#endif + +#define HRT_MIPI_BACKEND_STREAM_BITS(sid_width,ppc,pix_width) (HRT_MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_width,ppc,pix_width,(ppc-1))+1) + + +/* SP and LP LUT BIT POSITIONS */ +#define HRT_MIPI_BACKEND_LUT_PKT_DISREGARD_BIT 0 // 0 +#define HRT_MIPI_BACKEND_LUT_SID_LS_BIT HRT_MIPI_BACKEND_LUT_PKT_DISREGARD_BIT + 1 // 1 +#define HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) (HRT_MIPI_BACKEND_LUT_SID_LS_BIT+(sid_width)-1) // 1 + (4) - 1 = 4 +#define HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_LS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) + 1 // 5 +#define HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_MS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_LS_BIT(sid_width) + _HRT_MIPI_BACKEND_CHANNEL_ID_WIDTH - 1 // 6 +#define HRT_MIPI_BACKEND_LUT_MIPI_FMT_LS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_MS_BIT(sid_width) + 1 // 7 +#define HRT_MIPI_BACKEND_LUT_MIPI_FMT_MS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_FMT_LS_BIT(sid_width) + _HRT_MIPI_BACKEND_FORMAT_TYPE_WIDTH - 1 // 12 + +/* #define HRT_MIPI_BACKEND_SP_LUT_BITS(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_MS_BIT(sid_width) + 1 // 7 */ + +#define HRT_MIPI_BACKEND_SP_LUT_BITS(sid_width) HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) + 1 +#define HRT_MIPI_BACKEND_LP_LUT_BITS(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_FMT_MS_BIT(sid_width) + 1 // 13 + + +// temp solution +//#define HRT_MIPI_BACKEND_STREAM_PIXA_VAL_BIT HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT + 1 // 8 +//#define HRT_MIPI_BACKEND_STREAM_PIXB_VAL_BIT HRT_MIPI_BACKEND_STREAM_PIXA_VAL_BIT + 1 // 9 +//#define HRT_MIPI_BACKEND_STREAM_PIXC_VAL_BIT HRT_MIPI_BACKEND_STREAM_PIXB_VAL_BIT + 1 // 10 +//#define HRT_MIPI_BACKEND_STREAM_PIXD_VAL_BIT HRT_MIPI_BACKEND_STREAM_PIXC_VAL_BIT + 1 // 11 +//#define HRT_MIPI_BACKEND_STREAM_PIXA_LS_BIT HRT_MIPI_BACKEND_STREAM_PIXD_VAL_BIT + 1 // 12 +//#define HRT_MIPI_BACKEND_STREAM_PIXA_MS_BIT HRT_MIPI_BACKEND_STREAM_PIXA_LS_BIT + HRT_MIPI_BACKEND_STREAM_PIX_BITS - 1 // 25 +//#define HRT_MIPI_BACKEND_STREAM_PIXB_LS_BIT HRT_MIPI_BACKEND_STREAM_PIXA_MS_BIT + 1 // 26 +//#define HRT_MIPI_BACKEND_STREAM_PIXB_MS_BIT HRT_MIPI_BACKEND_STREAM_PIXB_LS_BIT + HRT_MIPI_BACKEND_STREAM_PIX_BITS - 1 // 39 +//#define HRT_MIPI_BACKEND_STREAM_PIXC_LS_BIT HRT_MIPI_BACKEND_STREAM_PIXB_MS_BIT + 1 // 40 +//#define HRT_MIPI_BACKEND_STREAM_PIXC_MS_BIT HRT_MIPI_BACKEND_STREAM_PIXC_LS_BIT + HRT_MIPI_BACKEND_STREAM_PIX_BITS - 1 // 53 +//#define HRT_MIPI_BACKEND_STREAM_PIXD_LS_BIT HRT_MIPI_BACKEND_STREAM_PIXC_MS_BIT + 1 // 54 +//#define HRT_MIPI_BACKEND_STREAM_PIXD_MS_BIT HRT_MIPI_BACKEND_STREAM_PIXD_LS_BIT + HRT_MIPI_BACKEND_STREAM_PIX_BITS - 1 // 67 + +// vc hidden in pixb data (passed as raw12 the pipe) +#define HRT_MIPI_BACKEND_STREAM_VC_LS_BIT(sid_width,ppc,pix_width) HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width,ppc,pix_width,1) + 10 //HRT_MIPI_BACKEND_STREAM_PIXB_LS_BIT + 10 // 36 +#define HRT_MIPI_BACKEND_STREAM_VC_MS_BIT(sid_width,ppc,pix_width) HRT_MIPI_BACKEND_STREAM_VC_LS_BIT(sid_width,ppc,pix_width) + 1 // 37 + + + + +#endif /* _mipi_backend_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mmu_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mmu_defs.h new file mode 100644 index 0000000000000..c038f39ffd25e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mmu_defs.h @@ -0,0 +1,23 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _mmu_defs_h +#define _mmu_defs_h + +#define _HRT_MMU_INVALIDATE_TLB_REG_IDX 0 +#define _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX 1 + +#define _HRT_MMU_REG_ALIGN 4 + +#endif /* _mmu_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h new file mode 100644 index 0000000000000..0aad86e2e9145 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h @@ -0,0 +1,175 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _csi_rx_defs_h +#define _csi_rx_defs_h + +//#include "rx_csi_common_defs.h" + + + +#define MIPI_PKT_DATA_WIDTH 32 +//#define CLK_CROSSING_FIFO_DEPTH 16 +#define _CSI_RX_REG_ALIGN 4 + +//define number of IRQ (see below for definition of each IRQ bits) +#define CSI_RX_NOF_IRQS_BYTE_DOMAIN 11 +#define CSI_RX_NOF_IRQS_ISP_DOMAIN 15 // CSI_RX_NOF_IRQS_BYTE_DOMAIN + remaining from Dphy_rx already on ISP clock domain + +// REGISTER DESCRIPTION +//#define _HRT_CSI_RX_SOFTRESET_REG_IDX 0 +#define _HRT_CSI_RX_ENABLE_REG_IDX 0 +#define _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX 1 +#define _HRT_CSI_RX_ERROR_HANDLING_REG_IDX 2 +#define _HRT_CSI_RX_STATUS_REG_IDX 3 +#define _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX 4 +#define _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX 5 +//#define _HRT_CSI_RX_IRQ_CONFIG_REG_IDX 6 +#define _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX 6 +#define _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX 7 +#define _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane_idx) (8+(2*lane_idx)) +#define _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane_idx) (8+(2*lane_idx)+1) + +#define _HRT_CSI_RX_NOF_REGISTERS(nof_dlanes) (8+2*(nof_dlanes)) + + +//#define _HRT_CSI_RX_SOFTRESET_REG_WIDTH 1 +#define _HRT_CSI_RX_ENABLE_REG_WIDTH 1 +#define _HRT_CSI_RX_NOF_ENABLED_LANES_REG_WIDTH 3 +#define _HRT_CSI_RX_ERROR_HANDLING_REG_WIDTH 4 +#define _HRT_CSI_RX_STATUS_REG_WIDTH 1 +#define _HRT_CSI_RX_STATUS_DLANE_HS_REG_WIDTH 8 +#define _HRT_CSI_RX_STATUS_DLANE_LP_REG_WIDTH 24 +#define _HRT_CSI_RX_IRQ_CONFIG_REG_WIDTH (CSI_RX_NOF_IRQS_ISP_DOMAIN) +#define _HRT_CSI_RX_DLY_CNT_REG_WIDTH 24 +//#define _HRT_CSI_RX_IRQ_STATUS_REG_WIDTH NOF_IRQS +//#define _HRT_CSI_RX_IRQ_CLEAR_REG_WIDTH 0 + + +#define ONE_LANE_ENABLED 0 +#define TWO_LANES_ENABLED 1 +#define THREE_LANES_ENABLED 2 +#define FOUR_LANES_ENABLED 3 + +// Error handling reg bit positions +#define ERR_DECISION_BIT 0 +#define DISC_RESERVED_SP_BIT 1 +#define DISC_RESERVED_LP_BIT 2 +#define DIS_INCOMP_PKT_CHK_BIT 3 + +#define _HRT_CSI_RX_IRQ_CONFIG_REG_VAL_POSEDGE 0 +#define _HRT_CSI_RX_IRQ_CONFIG_REG_VAL_ORIGINAL 1 + +// Interrupt bits +#define _HRT_RX_CSI_IRQ_SINGLE_PH_ERROR_CORRECTED 0 +#define _HRT_RX_CSI_IRQ_MULTIPLE_PH_ERROR_DETECTED 1 +#define _HRT_RX_CSI_IRQ_PAYLOAD_CHECKSUM_ERROR 2 +#define _HRT_RX_CSI_IRQ_FIFO_FULL_ERROR 3 +#define _HRT_RX_CSI_IRQ_RESERVED_SP_DETECTED 4 +#define _HRT_RX_CSI_IRQ_RESERVED_LP_DETECTED 5 +//#define _HRT_RX_CSI_IRQ_PREMATURE_SOP 6 +#define _HRT_RX_CSI_IRQ_INCOMPLETE_PACKET 6 +#define _HRT_RX_CSI_IRQ_FRAME_SYNC_ERROR 7 +#define _HRT_RX_CSI_IRQ_LINE_SYNC_ERROR 8 +#define _HRT_RX_CSI_IRQ_DLANE_HS_SOT_ERROR 9 +#define _HRT_RX_CSI_IRQ_DLANE_HS_SOT_SYNC_ERROR 10 + +#define _HRT_RX_CSI_IRQ_DLANE_ESC_ERROR 11 +#define _HRT_RX_CSI_IRQ_DLANE_TRIGGERESC 12 +#define _HRT_RX_CSI_IRQ_DLANE_ULPSESC 13 +#define _HRT_RX_CSI_IRQ_CLANE_ULPSCLKNOT 14 + +/* OLD ARASAN FRONTEND IRQs +#define _HRT_RX_CSI_IRQ_OVERRUN_BIT 0 +#define _HRT_RX_CSI_IRQ_RESERVED_BIT 1 +#define _HRT_RX_CSI_IRQ_SLEEP_MODE_ENTRY_BIT 2 +#define _HRT_RX_CSI_IRQ_SLEEP_MODE_EXIT_BIT 3 +#define _HRT_RX_CSI_IRQ_ERR_SOT_HS_BIT 4 +#define _HRT_RX_CSI_IRQ_ERR_SOT_SYNC_HS_BIT 5 +#define _HRT_RX_CSI_IRQ_ERR_CONTROL_BIT 6 +#define _HRT_RX_CSI_IRQ_ERR_ECC_DOUBLE_BIT 7 +#define _HRT_RX_CSI_IRQ_ERR_ECC_CORRECTED_BIT 8 +#define _HRT_RX_CSI_IRQ_ERR_ECC_NO_CORRECTION_BIT 9 +#define _HRT_RX_CSI_IRQ_ERR_CRC_BIT 10 +#define _HRT_RX_CSI_IRQ_ERR_ID_BIT 11 +#define _HRT_RX_CSI_IRQ_ERR_FRAME_SYNC_BIT 12 +#define _HRT_RX_CSI_IRQ_ERR_FRAME_DATA_BIT 13 +#define _HRT_RX_CSI_IRQ_DATA_TIMEOUT_BIT 14 +#define _HRT_RX_CSI_IRQ_ERR_ESCAPE_BIT 15 +#define _HRT_RX_CSI_IRQ_ERR_LINE_SYNC_BIT 16 +*/ + + +////Bit Description for reg _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_ERR_LANE0 0 +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_ERR_LANE1 1 +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_ERR_LANE2 2 +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_ERR_LANE3 3 +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_SYNC_ERR_LANE0 4 +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_SYNC_ERR_LANE1 5 +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_SYNC_ERR_LANE2 6 +#define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_SYNC_ERR_LANE3 7 + +////Bit Description for reg _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX +#define _HRT_CSI_RX_STATUS_DLANE_LP_ESC_ERR_LANE0 0 +#define _HRT_CSI_RX_STATUS_DLANE_LP_ESC_ERR_LANE1 1 +#define _HRT_CSI_RX_STATUS_DLANE_LP_ESC_ERR_LANE2 2 +#define _HRT_CSI_RX_STATUS_DLANE_LP_ESC_ERR_LANE3 3 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC0_LANE0 4 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC1_LANE0 5 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC2_LANE0 6 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC3_LANE0 7 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC0_LANE1 8 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC1_LANE1 9 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC2_LANE1 10 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC3_LANE1 11 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC0_LANE2 12 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC1_LANE2 13 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC2_LANE2 14 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC3_LANE2 15 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC0_LANE3 16 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC1_LANE3 17 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC2_LANE3 18 +#define _HRT_CSI_RX_STATUS_DLANE_LP_TRIGGERESC3_LANE3 19 +#define _HRT_CSI_RX_STATUS_DLANE_LP_ULPSESC_LANE0 20 +#define _HRT_CSI_RX_STATUS_DLANE_LP_ULPSESC_LANE1 21 +#define _HRT_CSI_RX_STATUS_DLANE_LP_ULPSESC_LANE2 22 +#define _HRT_CSI_RX_STATUS_DLANE_LP_ULPSESC_LANE3 23 + +/*********************************************************/ +/*** Relevant declarations from rx_csi_common_defs.h *****/ +/*********************************************************/ +/* packet bit definition */ +#define _HRT_RX_CSI_PKT_SOP_BITPOS 32 +#define _HRT_RX_CSI_PKT_EOP_BITPOS 33 +#define _HRT_RX_CSI_PKT_PAYLOAD_BITPOS 0 +#define _HRT_RX_CSI_PH_CH_ID_BITPOS 22 +#define _HRT_RX_CSI_PH_FMT_ID_BITPOS 16 +#define _HRT_RX_CSI_PH_DATA_FIELD_BITPOS 0 + +#define _HRT_RX_CSI_PKT_SOP_BITS 1 +#define _HRT_RX_CSI_PKT_EOP_BITS 1 +#define _HRT_RX_CSI_PKT_PAYLOAD_BITS 32 +#define _HRT_RX_CSI_PH_CH_ID_BITS 2 +#define _HRT_RX_CSI_PH_FMT_ID_BITS 6 +#define _HRT_RX_CSI_PH_DATA_FIELD_BITS 16 + +/* Definition of data format ID at the interface CSS_receiver units */ +#define _HRT_RX_CSI_DATA_FORMAT_ID_SOF 0 /* 00 0000 frame start */ +#define _HRT_RX_CSI_DATA_FORMAT_ID_EOF 1 /* 00 0001 frame end */ +#define _HRT_RX_CSI_DATA_FORMAT_ID_SOL 2 /* 00 0010 line start */ +#define _HRT_RX_CSI_DATA_FORMAT_ID_EOL 3 /* 00 0011 line end */ + + +#endif /* _csi_rx_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/scalar_processor_2400_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/scalar_processor_2400_params.h new file mode 100644 index 0000000000000..9b6c2893d9507 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/scalar_processor_2400_params.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _scalar_processor_2400_params_h +#define _scalar_processor_2400_params_h + +#include "cell_params.h" + +#endif /* _scalar_processor_2400_params_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/str2mem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/str2mem_defs.h new file mode 100644 index 0000000000000..1cb62444cf68b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/str2mem_defs.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _ST2MEM_DEFS_H +#define _ST2MEM_DEFS_H + +#define _STR2MEM_CRUN_BIT 0x100000 +#define _STR2MEM_CMD_BITS 0x0F0000 +#define _STR2MEM_COUNT_BITS 0x00FFFF + +#define _STR2MEM_BLOCKS_CMD 0xA0000 +#define _STR2MEM_PACKETS_CMD 0xB0000 +#define _STR2MEM_BYTES_CMD 0xC0000 +#define _STR2MEM_BYTES_FROM_PACKET_CMD 0xD0000 + +#define _STR2MEM_SOFT_RESET_REG_ID 0 +#define _STR2MEM_INPUT_ENDIANNESS_REG_ID 1 +#define _STR2MEM_OUTPUT_ENDIANNESS_REG_ID 2 +#define _STR2MEM_BIT_SWAPPING_REG_ID 3 +#define _STR2MEM_BLOCK_SYNC_LEVEL_REG_ID 4 +#define _STR2MEM_PACKET_SYNC_LEVEL_REG_ID 5 +#define _STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID 6 +#define _STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID 7 +#define _STR2MEM_EN_STAT_UPDATE_ID 8 + +#define _STR2MEM_REG_ALIGN 4 + +#endif /* _ST2MEM_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h new file mode 100644 index 0000000000000..46b52fe5ae995 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h @@ -0,0 +1,71 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _STREAM2MMMIO_DEFS_H +#define _STREAM2MMMIO_DEFS_H + +#include + +#define _STREAM2MMIO_REG_ALIGN 4 + +#define _STREAM2MMIO_COMMAND_REG_ID 0 +#define _STREAM2MMIO_ACKNOWLEDGE_REG_ID 1 +#define _STREAM2MMIO_PIX_WIDTH_ID_REG_ID 2 +#define _STREAM2MMIO_START_ADDR_REG_ID 3 /* master port address,NOT Byte */ +#define _STREAM2MMIO_END_ADDR_REG_ID 4 /* master port address,NOT Byte */ +#define _STREAM2MMIO_STRIDE_REG_ID 5 /* stride in master port words, increment is per packet for long sids, stride is not used for short sid's*/ +#define _STREAM2MMIO_NUM_ITEMS_REG_ID 6 /* number of packets for store packets cmd, number of words for store_words cmd */ +#define _STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID 7 /* if this register is 1, input will be stalled if there is no pending command for this sid */ +#define _STREAM2MMIO_REGS_PER_SID 8 + +#define _STREAM2MMIO_SID_REG_OFFSET 8 +#define _STREAM2MMIO_MAX_NOF_SIDS 64 /* value used in hss model */ + +/* command token definition */ +#define _STREAM2MMIO_CMD_TOKEN_CMD_LSB 0 /* bits 1-0 is for the command field */ +#define _STREAM2MMIO_CMD_TOKEN_CMD_MSB 1 + +#define _STREAM2MMIO_CMD_TOKEN_WIDTH (_STREAM2MMIO_CMD_TOKEN_CMD_MSB+1-_STREAM2MMIO_CMD_TOKEN_CMD_LSB) + +#define _STREAM2MMIO_CMD_TOKEN_STORE_WORDS 0 /* command for storing a number of output words indicated by reg _STREAM2MMIO_NUM_ITEMS */ +#define _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS 1 /* command for storing a number of packets indicated by reg _STREAM2MMIO_NUM_ITEMS */ +#define _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME 2 /* command for waiting for a frame start */ + +/* acknowledges from packer module */ +/* fields: eof - indicates whether last (short) packet received was an eof packet */ +/* eop - indicates whether command has ended due to packet end or due to no of words requested has been received */ +/* count - indicates number of words stored */ +#define _STREAM2MMIO_PACK_NUM_ITEMS_BITS 16 +#define _STREAM2MMIO_PACK_ACK_EOP_BIT _STREAM2MMIO_PACK_NUM_ITEMS_BITS +#define _STREAM2MMIO_PACK_ACK_EOF_BIT (_STREAM2MMIO_PACK_ACK_EOP_BIT+1) + +/* acknowledge token definition */ +#define _STREAM2MMIO_ACK_TOKEN_NUM_ITEMS_LSB 0 /* bits 3-0 is for the command field */ +#define _STREAM2MMIO_ACK_TOKEN_NUM_ITEMS_MSB (_STREAM2MMIO_PACK_NUM_ITEMS_BITS-1) +#define _STREAM2MMIO_ACK_TOKEN_EOP_BIT _STREAM2MMIO_PACK_ACK_EOP_BIT +#define _STREAM2MMIO_ACK_TOKEN_EOF_BIT _STREAM2MMIO_PACK_ACK_EOF_BIT +#define _STREAM2MMIO_ACK_TOKEN_VALID_BIT (_STREAM2MMIO_ACK_TOKEN_EOF_BIT+1) /* this bit indicates a valid ack */ + /* if there is no valid ack, a read */ + /* on the ack register returns 0 */ +#define _STREAM2MMIO_ACK_TOKEN_WIDTH (_STREAM2MMIO_ACK_TOKEN_VALID_BIT+1) + +/* commands for packer module */ +#define _STREAM2MMIO_PACK_CMD_STORE_WORDS 0 +#define _STREAM2MMIO_PACK_CMD_STORE_LONG_PACKET 1 +#define _STREAM2MMIO_PACK_CMD_STORE_SHORT_PACKET 2 + + + + +#endif /* _STREAM2MMIO_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/streaming_to_mipi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/streaming_to_mipi_defs.h new file mode 100644 index 0000000000000..60143b8743a2d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/streaming_to_mipi_defs.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _streaming_to_mipi_defs_h +#define _streaming_to_mipi_defs_h + +#define HIVE_STR_TO_MIPI_VALID_A_BIT 0 +#define HIVE_STR_TO_MIPI_VALID_B_BIT 1 +#define HIVE_STR_TO_MIPI_SOL_BIT 2 +#define HIVE_STR_TO_MIPI_EOL_BIT 3 +#define HIVE_STR_TO_MIPI_SOF_BIT 4 +#define HIVE_STR_TO_MIPI_EOF_BIT 5 +#define HIVE_STR_TO_MIPI_CH_ID_LSB 6 + +#define HIVE_STR_TO_MIPI_DATA_A_LSB (HIVE_STR_TO_MIPI_VALID_B_BIT + 1) + +#endif /* _streaming_to_mipi_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h new file mode 100644 index 0000000000000..d2b8972b0d9ec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _timed_controller_defs_h +#define _timed_controller_defs_h + +#define _HRT_TIMED_CONTROLLER_CMD_REG_IDX 0 + +#define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 + +#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h new file mode 100644 index 0000000000000..19b19ef484f95 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h @@ -0,0 +1,99 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_VAR_H +#define _HRT_VAR_H + +#include "version.h" +#include "system_api.h" +#include "hive_types.h" + +#define hrt_int_type_of_char char +#define hrt_int_type_of_uchar unsigned char +#define hrt_int_type_of_short short +#define hrt_int_type_of_ushort unsigned short +#define hrt_int_type_of_int int +#define hrt_int_type_of_uint unsigned int +#define hrt_int_type_of_long long +#define hrt_int_type_of_ulong unsigned long +#define hrt_int_type_of_ptr unsigned int + +#define hrt_host_type_of_char char +#define hrt_host_type_of_uchar unsigned char +#define hrt_host_type_of_short short +#define hrt_host_type_of_ushort unsigned short +#define hrt_host_type_of_int int +#define hrt_host_type_of_uint unsigned int +#define hrt_host_type_of_long long +#define hrt_host_type_of_ulong unsigned long +#define hrt_host_type_of_ptr void* + +#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type)/8) +#define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) +#define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) + +#ifdef C_RUN + +#ifdef C_RUN_DYNAMIC_LINK_PROGRAMS +extern void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); +#define _hrt_cell_get_crun_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) +#define _hrt_cell_get_crun_indexed_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) +#else +#define _hrt_cell_get_crun_symbol(cell,sym) (&sym) +#define _hrt_cell_get_crun_indexed_symbol(cell,sym) (sym) +#endif // C_RUN_DYNAMIC_LINK_PROGRAMS + +#define hrt_scalar_store(cell, type, var, data) \ + ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var)) = (data)) +#define hrt_scalar_load(cell, type, var) \ + ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var))) + +#define hrt_indexed_store(cell, type, array, index, data) \ + ((((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) = (data)) +#define hrt_indexed_load(cell, type, array, index) \ + (((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) + +#else /* C_RUN */ + +#define hrt_scalar_store(cell, type, var, data) \ + HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + cell, \ + HRTCAT(HIVE_MEM_,var), \ + HRTCAT(HIVE_ADDR_,var), \ + (HRT_INT_TYPE(type))(data)) + +#define hrt_scalar_load(cell, type, var) \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + cell, \ + HRTCAT(HIVE_MEM_,var), \ + HRTCAT(HIVE_ADDR_,var))) + +#define hrt_indexed_store(cell, type, array, index, data) \ + HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + cell, \ + HRTCAT(HIVE_MEM_,array), \ + (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)), \ + (HRT_INT_TYPE(type))(data)) + +#define hrt_indexed_load(cell, type, array, index) \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + cell, \ + HRTCAT(HIVE_MEM_,array), \ + (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)))) + +#endif /* C_RUN */ + +#endif /* _HRT_VAR_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/version.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/version.h new file mode 100644 index 0000000000000..bbc4948baea9b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/version.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef HRT_VERSION_H +#define HRT_VERSION_H +#define HRT_VERSION_MAJOR 1 +#define HRT_VERSION_MINOR 4 +#define HRT_VERSION 1_4 +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h new file mode 100644 index 0000000000000..edb23252c48ea --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h @@ -0,0 +1,80 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IBUF_CTRL_GLOBAL_H_INCLUDED__ +#define __IBUF_CTRL_GLOBAL_H_INCLUDED__ + +#include + +#include /* _IBUF_CNTRL_RECALC_WORDS_STATUS, + * _IBUF_CNTRL_ARBITERS_STATUS, + * _IBUF_CNTRL_PROC_REG_ALIGN, + * etc. + */ + +/* Definition of contents of main controller state register is lacking + * in ibuf_cntrl_defs.h, so define these here: + */ +#define _IBUF_CNTRL_MAIN_CNTRL_FSM_MASK 0xf +#define _IBUF_CNTRL_MAIN_CNTRL_FSM_NEXT_COMMAND_CHECK 0x9 +#define _IBUF_CNTRL_MAIN_CNTRL_MEM_INP_BUF_ALLOC (1 << 8) +#define _IBUF_CNTRL_DMA_SYNC_WAIT_FOR_SYNC 1 +#define _IBUF_CNTRL_DMA_SYNC_FSM_WAIT_FOR_ACK (0x3 << 1) + +typedef struct ib_buffer_s ib_buffer_t; +struct ib_buffer_s { + uint32_t start_addr; /* start address of the buffer in the + * "input-buffer hardware block" + */ + + uint32_t stride; /* stride per buffer line (in bytes) */ + uint32_t lines; /* lines in the buffer */ +}; + +typedef struct ibuf_ctrl_cfg_s ibuf_ctrl_cfg_t; +struct ibuf_ctrl_cfg_s { + + bool online; + + struct { + /* DMA configuration */ + uint32_t channel; + uint32_t cmd; /* must be _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND */ + + /* DMA reconfiguration */ + uint32_t shift_returned_items; + uint32_t elems_per_word_in_ibuf; + uint32_t elems_per_word_in_dest; + } dma_cfg; + + ib_buffer_t ib_buffer; + + struct { + uint32_t stride; + uint32_t start_addr; + uint32_t lines; + } dest_buf_cfg; + + uint32_t items_per_store; + uint32_t stores_per_frame; + + struct { + uint32_t sync_cmd; /* must be _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME */ + uint32_t store_cmd; /* must be _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS */ + } stream2mmio_cfg; +}; + +extern const uint32_t N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID]; + +#endif /* __IBUF_CTRL_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h new file mode 100644 index 0000000000000..25e3f04f374ba --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h @@ -0,0 +1,206 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ +#define __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ + +#define IS_INPUT_SYSTEM_VERSION_VERSION_2401 + +/* CSI reveiver has 3 ports. */ +#define N_CSI_PORTS (3) + +#include "isys_dma.h" /* isys2401_dma_channel, + * isys2401_dma_cfg_t + */ + +#include "ibuf_ctrl.h" /* ibuf_cfg_t, + * ibuf_ctrl_cfg_t + */ + +#include "isys_stream2mmio.h" /* stream2mmio_cfg_t */ + +#include "csi_rx.h" /* csi_rx_frontend_cfg_t, + * csi_rx_backend_cfg_t, + * csi_rx_backend_lut_entry_t + */ +#include "pixelgen.h" + + +#define INPUT_SYSTEM_N_STREAM_ID 6 /* maximum number of simultaneous + virtual channels supported*/ + +typedef enum { + INPUT_SYSTEM_ERR_NO_ERROR = 0, + INPUT_SYSTEM_ERR_CREATE_CHANNEL_FAIL, + INPUT_SYSTEM_ERR_CONFIGURE_CHANNEL_FAIL, + INPUT_SYSTEM_ERR_OPEN_CHANNEL_FAIL, + INPUT_SYSTEM_ERR_TRANSFER_FAIL, + INPUT_SYSTEM_ERR_CREATE_INPUT_PORT_FAIL, + INPUT_SYSTEM_ERR_CONFIGURE_INPUT_PORT_FAIL, + INPUT_SYSTEM_ERR_OPEN_INPUT_PORT_FAIL, + N_INPUT_SYSTEM_ERR +} input_system_err_t; + +typedef enum { + INPUT_SYSTEM_SOURCE_TYPE_UNDEFINED = 0, + INPUT_SYSTEM_SOURCE_TYPE_SENSOR, + INPUT_SYSTEM_SOURCE_TYPE_TPG, + INPUT_SYSTEM_SOURCE_TYPE_PRBS, + N_INPUT_SYSTEM_SOURCE_TYPE +} input_system_source_type_t; + +typedef enum { + INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME, + INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST, +} input_system_polling_mode_t; + +typedef struct input_system_channel_s input_system_channel_t; +struct input_system_channel_s { + stream2mmio_ID_t stream2mmio_id; + stream2mmio_sid_ID_t stream2mmio_sid_id; + + ibuf_ctrl_ID_t ibuf_ctrl_id; + ib_buffer_t ib_buffer; + + isys2401_dma_ID_t dma_id; + isys2401_dma_channel dma_channel; +}; + +typedef struct input_system_channel_cfg_s input_system_channel_cfg_t; +struct input_system_channel_cfg_s { + stream2mmio_cfg_t stream2mmio_cfg; + ibuf_ctrl_cfg_t ibuf_ctrl_cfg; + isys2401_dma_cfg_t dma_cfg; + isys2401_dma_port_cfg_t dma_src_port_cfg; + isys2401_dma_port_cfg_t dma_dest_port_cfg; +}; + +typedef struct input_system_input_port_s input_system_input_port_t; +struct input_system_input_port_s { + input_system_source_type_t source_type; + + struct { + csi_rx_frontend_ID_t frontend_id; + csi_rx_backend_ID_t backend_id; + csi_mipi_packet_type_t packet_type; + csi_rx_backend_lut_entry_t backend_lut_entry; + } csi_rx; + + struct { + csi_mipi_packet_type_t packet_type; + csi_rx_backend_lut_entry_t backend_lut_entry; + } metadata; + + struct { + pixelgen_ID_t pixelgen_id; + } pixelgen; +}; + +typedef struct input_system_input_port_cfg_s input_system_input_port_cfg_t; +struct input_system_input_port_cfg_s { + struct { + csi_rx_frontend_cfg_t frontend_cfg; + csi_rx_backend_cfg_t backend_cfg; + csi_rx_backend_cfg_t md_backend_cfg; + } csi_rx_cfg; + + struct { + pixelgen_tpg_cfg_t tpg_cfg; + pixelgen_prbs_cfg_t prbs_cfg; + } pixelgen_cfg; +}; + +typedef struct input_system_cfg_s input_system_cfg_t; +struct input_system_cfg_s { + input_system_input_port_ID_t input_port_id; + + input_system_source_type_t mode; +#ifdef ISP2401 + input_system_polling_mode_t polling_mode; +#endif + + bool online; + bool raw_packed; + int8_t linked_isys_stream_id; + + struct { + bool comp_enable; + int32_t active_lanes; + int32_t fmt_type; + int32_t ch_id; + int32_t comp_predictor; + int32_t comp_scheme; + } csi_port_attr; + + pixelgen_tpg_cfg_t tpg_port_attr; + + pixelgen_prbs_cfg_t prbs_port_attr; + + struct { + int32_t align_req_in_bytes; + int32_t bits_per_pixel; + int32_t pixels_per_line; + int32_t lines_per_frame; + } input_port_resolution; + + struct { + int32_t left_padding; + int32_t max_isp_input_width; + } output_port_attr; + + struct { + bool enable; + int32_t fmt_type; + int32_t align_req_in_bytes; + int32_t bits_per_pixel; + int32_t pixels_per_line; + int32_t lines_per_frame; + } metadata; +}; + +typedef struct virtual_input_system_stream_s virtual_input_system_stream_t; +struct virtual_input_system_stream_s { + uint32_t id; /*Used when multiple MIPI data types and/or virtual channels are used. + Must be unique within one CSI RX + and lower than SH_CSS_MAX_ISYS_CHANNEL_NODES */ + uint8_t enable_metadata; + input_system_input_port_t input_port; + input_system_channel_t channel; + input_system_channel_t md_channel; /* metadata channel */ + uint8_t online; + int8_t linked_isys_stream_id; + uint8_t valid; +#ifdef ISP2401 + input_system_polling_mode_t polling_mode; + int32_t subscr_index; +#endif +}; + +typedef struct virtual_input_system_stream_cfg_s virtual_input_system_stream_cfg_t; +struct virtual_input_system_stream_cfg_s { + uint8_t enable_metadata; + input_system_input_port_cfg_t input_port_cfg; + input_system_channel_cfg_t channel_cfg; + input_system_channel_cfg_t md_channel_cfg; + uint8_t valid; +}; + +#define ISP_INPUT_BUF_START_ADDR 0 +#define NUM_OF_INPUT_BUF 2 +#define NUM_OF_LINES_PER_BUF 2 +#define LINES_OF_ISP_INPUT_BUF (NUM_OF_INPUT_BUF * NUM_OF_LINES_PER_BUF) +#define ISP_INPUT_BUF_STRIDE SH_CSS_MAX_SENSOR_WIDTH + + +#endif /* __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h new file mode 100644 index 0000000000000..1be5c6956d65b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h @@ -0,0 +1,87 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_DMA_GLOBAL_H_INCLUDED__ +#define __ISYS_DMA_GLOBAL_H_INCLUDED__ + +#include + +#define HIVE_ISYS2401_DMA_IBUF_DDR_CONN 0 +#define HIVE_ISYS2401_DMA_IBUF_VMEM_CONN 1 +#define _DMA_V2_ZERO_EXTEND 0 +#define _DMA_V2_SIGN_EXTEND 1 + +#define _DMA_ZERO_EXTEND _DMA_V2_ZERO_EXTEND +#define _DMA_SIGN_EXTEND _DMA_V2_SIGN_EXTEND + +/******************************************************** + * + * DMA Port. + * + * The DMA port definition for the input system + * 2401 DMA is the duplication of the DMA port + * definition for the CSS system DMA. It is duplicated + * here just as the temporal step before the device libary + * is available. The device libary is suppose to provide + * the capability of reusing the control interface of the + * same device prototypes. The refactor team will work on + * this, right? + * + ********************************************************/ +typedef struct isys2401_dma_port_cfg_s isys2401_dma_port_cfg_t; +struct isys2401_dma_port_cfg_s { + uint32_t stride; + uint32_t elements; + uint32_t cropping; + uint32_t width; + }; +/* end of DMA Port */ + +/************************************************ + * + * DMA Device. + * + * The DMA device definition for the input system + * 2401 DMA is the duplicattion of the DMA device + * definition for the CSS system DMA. It is duplicated + * here just as the temporal step before the device libary + * is available. The device libary is suppose to provide + * the capability of reusing the control interface of the + * same device prototypes. The refactor team will work on + * this, right? + * + ************************************************/ +typedef enum { + isys2401_dma_ibuf_to_ddr_connection = HIVE_ISYS2401_DMA_IBUF_DDR_CONN, + isys2401_dma_ibuf_to_vmem_connection = HIVE_ISYS2401_DMA_IBUF_VMEM_CONN +} isys2401_dma_connection; + +typedef enum { + isys2401_dma_zero_extension = _DMA_ZERO_EXTEND, + isys2401_dma_sign_extension = _DMA_SIGN_EXTEND +} isys2401_dma_extension; + +typedef struct isys2401_dma_cfg_s isys2401_dma_cfg_t; +struct isys2401_dma_cfg_s { + isys2401_dma_channel channel; + isys2401_dma_connection connection; + isys2401_dma_extension extension; + uint32_t height; +}; +/* end of DMA Device */ + +/* isys2401_dma_channel limits per DMA ID */ +extern const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID]; + +#endif /* __ISYS_DMA_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_irq_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_irq_global.h new file mode 100644 index 0000000000000..41d051db39876 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_irq_global.h @@ -0,0 +1,35 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_IRQ_GLOBAL_H__ +#define __ISYS_IRQ_GLOBAL_H__ + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + +/* Register offset/index from base location */ +#define ISYS_IRQ_EDGE_REG_IDX (0) +#define ISYS_IRQ_MASK_REG_IDX (ISYS_IRQ_EDGE_REG_IDX + 1) +#define ISYS_IRQ_STATUS_REG_IDX (ISYS_IRQ_EDGE_REG_IDX + 2) +#define ISYS_IRQ_CLEAR_REG_IDX (ISYS_IRQ_EDGE_REG_IDX + 3) +#define ISYS_IRQ_ENABLE_REG_IDX (ISYS_IRQ_EDGE_REG_IDX + 4) +#define ISYS_IRQ_LEVEL_NO_REG_IDX (ISYS_IRQ_EDGE_REG_IDX + 5) + +/* Register values */ +#define ISYS_IRQ_MASK_REG_VALUE (0xFFFF) +#define ISYS_IRQ_CLEAR_REG_VALUE (0xFFFF) +#define ISYS_IRQ_ENABLE_REG_VALUE (0xFFFF) + +#endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ + +#endif /* __ISYS_IRQ_GLOBAL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h new file mode 100644 index 0000000000000..649f44fd24086 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_STREAM2MMIO_GLOBAL_H_INCLUDED__ +#define __ISYS_STREAM2MMIO_GLOBAL_H_INCLUDED__ + +#include + +typedef struct stream2mmio_cfg_s stream2mmio_cfg_t; +struct stream2mmio_cfg_s { + uint32_t bits_per_pixel; + uint32_t enable_blocking; +}; + +/* Stream2MMIO limits per ID*/ +/* + * Stream2MMIO 0 has 8 SIDs that are indexed by + * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID7_ID]. + * + * Stream2MMIO 1 has 4 SIDs that are indexed by + * [STREAM2MMIO_SID0_ID...TREAM2MMIO_SID3_ID]. + * + * Stream2MMIO 2 has 4 SIDs that are indexed by + * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID3_ID]. + */ +extern const stream2mmio_sid_ID_t N_STREAM2MMIO_SID_PROCS[N_STREAM2MMIO_ID]; + +#endif /* __ISYS_STREAM2MMIO_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h new file mode 100644 index 0000000000000..0bf2feb8bbfb4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h @@ -0,0 +1,91 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __PIXELGEN_GLOBAL_H_INCLUDED__ +#define __PIXELGEN_GLOBAL_H_INCLUDED__ + +#include + +/** + * Pixel-generator. ("pixelgen_global.h") + */ +/* + * Duplicates "sync_generator_cfg_t" in "input_system_global.h". + */ +typedef struct sync_generator_cfg_s sync_generator_cfg_t; +struct sync_generator_cfg_s { + uint32_t hblank_cycles; + uint32_t vblank_cycles; + uint32_t pixels_per_clock; + uint32_t nr_of_frames; + uint32_t pixels_per_line; + uint32_t lines_per_frame; +}; + +typedef enum { + PIXELGEN_TPG_MODE_RAMP = 0, + PIXELGEN_TPG_MODE_CHBO, + PIXELGEN_TPG_MODE_MONO, + N_PIXELGEN_TPG_MODE +} pixelgen_tpg_mode_t; + +/* + * "pixelgen_tpg_cfg_t" duplicates parts of + * "tpg_cfg_t" in "input_system_global.h". + */ +typedef struct pixelgen_tpg_cfg_s pixelgen_tpg_cfg_t; +struct pixelgen_tpg_cfg_s { + pixelgen_tpg_mode_t mode; /* CHBO, MONO */ + + struct { + /* be used by CHBO and MON */ + uint32_t R1; + uint32_t G1; + uint32_t B1; + + /* be used by CHBO only */ + uint32_t R2; + uint32_t G2; + uint32_t B2; + } color_cfg; + + struct { + uint32_t h_mask; /* horizontal mask */ + uint32_t v_mask; /* vertical mask */ + uint32_t hv_mask; /* horizontal+vertical mask? */ + } mask_cfg; + + struct { + int32_t h_delta; /* horizontal delta? */ + int32_t v_delta; /* vertical delta? */ + } delta_cfg; + + sync_generator_cfg_t sync_gen_cfg; +}; + +/* + * "pixelgen_prbs_cfg_t" duplicates parts of + * prbs_cfg_t" in "input_system_global.h". + */ +typedef struct pixelgen_prbs_cfg_s pixelgen_prbs_cfg_t; +struct pixelgen_prbs_cfg_s { + int32_t seed0; + int32_t seed1; + + sync_generator_cfg_t sync_gen_cfg; +}; + +/* end of Pixel-generator: TPG. ("pixelgen_global.h") */ +#endif /* __PIXELGEN_GLOBAL_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c new file mode 100644 index 0000000000000..d733a3503a209 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c @@ -0,0 +1,3686 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _sp_map_h_ +#define _sp_map_h_ + + +#ifndef _hrt_dummy_use_blob_sp +#define _hrt_dummy_use_blob_sp() +#endif + +#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) + +#ifndef ISP2401 +/* function longjmp: 680D */ +#else +/* function longjmp: 6A0B */ +#endif + +#ifndef ISP2401 +/* function tmpmem_init_dmem: 6558 */ +#else +/* function tmpmem_init_dmem: 671E */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_addr_B: 3C50 */ +#else +/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ + +/* function ia_css_pipe_data_init_tagger_resources: AC7 */ +#endif + +/* function debug_buffer_set_ddr_addr: DD */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_mipi +#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_mipi 0x7398 +#else +#define HIVE_ADDR_vbuf_mipi 0x7444 +#endif +#define HIVE_SIZE_vbuf_mipi 12 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_mipi 0x7398 +#else +#define HIVE_ADDR_sp_vbuf_mipi 0x7444 +#endif +#define HIVE_SIZE_sp_vbuf_mipi 12 + +#ifndef ISP2401 +/* function ia_css_event_sp_decode: 3E41 */ +#else +/* function ia_css_event_sp_decode: 3FB6 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_get_size: 51BF */ +#else +/* function ia_css_queue_get_size: 53C8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_load: 5800 */ +#else +/* function ia_css_queue_load: 59DF */ +#endif + +#ifndef ISP2401 +/* function setjmp: 6816 */ +#else +/* function setjmp: 6A14 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_sfi_get_current_frame: 27BF */ +#else +/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue +#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x5760 +#else +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC +#endif +#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x5760 +#else +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC +#endif +#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_wait_for_ack: 6DA9 */ +#else +/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_func: 596B */ +#else +/* function ia_css_sp_rawcopy_func: 5B4A */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_marked: 3339 */ +#else +/* function ia_css_tagger_buf_sp_pop_marked: 345C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH +#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem +#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0 +#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0 +#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_stage +#define HIVE_MEM_isp_stage scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_stage 0x6C98 +#else +#define HIVE_ADDR_isp_stage 0x6D48 +#endif +#define HIVE_SIZE_isp_stage 832 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_stage 0x6C98 +#else +#define HIVE_ADDR_sp_isp_stage 0x6D48 +#endif +#define HIVE_SIZE_sp_isp_stage 832 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_raw +#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_raw 0x37C +#else +#define HIVE_ADDR_vbuf_raw 0x394 +#endif +#define HIVE_SIZE_vbuf_raw 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_raw 0x37C +#else +#define HIVE_ADDR_sp_vbuf_raw 0x394 +#endif +#define HIVE_SIZE_sp_vbuf_raw 4 + +#ifndef ISP2401 +/* function ia_css_sp_bin_copy_func: 594C */ +#else +/* function ia_css_sp_bin_copy_func: 5B2B */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_item_store: 554E */ +#else +/* function ia_css_queue_item_store: 572D */ +#endif + +#ifndef ISP2401 +/* function input_system_reset: 1286 */ +#else +/* function input_system_reset: 1201 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5B38 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5B38 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5B4C +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5B4C +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 + +/* function sp_start_isp: 39C */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_binary_group +#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_binary_group 0x7088 +#else +#define HIVE_ADDR_sp_binary_group 0x7138 +#endif +#define HIVE_SIZE_sp_binary_group 32 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_binary_group 0x7088 +#else +#define HIVE_ADDR_sp_sp_binary_group 0x7138 +#endif +#define HIVE_SIZE_sp_sp_binary_group 32 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_sw_state +#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sw_state 0x7344 +#else +#define HIVE_ADDR_sp_sw_state 0x73F0 +#endif +#define HIVE_SIZE_sp_sw_state 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_sw_state 0x7344 +#else +#define HIVE_ADDR_sp_sp_sw_state 0x73F0 +#endif +#define HIVE_SIZE_sp_sp_sw_state 4 + +#ifndef ISP2401 +/* function ia_css_thread_sp_main: 13F7 */ +#else +/* function ia_css_thread_sp_main: 136D */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_internal_buffers: 4047 */ +#else +/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_psys_event_queue_handle +#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5BEC +#else +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 +#endif +#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5BEC +#else +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 +#endif +#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 + +#ifndef ISP2401 +/* function pixelgen_unit_test: E68 */ +#else +/* function pixelgen_unit_test: E62 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue +#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5774 +#else +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 +#endif +#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5774 +#else +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 +#endif +#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 + +#ifndef ISP2401 +/* function ia_css_tagger_sp_propagate_frame: 2D52 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_stop_copy_preview +#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem +#define HIVE_ADDR_sp_stop_copy_preview 0x7328 +#define HIVE_SIZE_sp_stop_copy_preview 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_stop_copy_preview 0x7328 +#define HIVE_SIZE_sp_sp_stop_copy_preview 4 +#else +/* function ia_css_tagger_sp_propagate_frame: 2D23 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_handles +#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_handles 0x73A4 +#else +#define HIVE_ADDR_vbuf_handles 0x7450 +#endif +#define HIVE_SIZE_vbuf_handles 960 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_handles 0x73A4 +#else +#define HIVE_ADDR_sp_vbuf_handles 0x7450 +#endif +#define HIVE_SIZE_sp_vbuf_handles 960 + +#ifndef ISP2401 +/* function ia_css_queue_store: 56B4 */ + +/* function ia_css_sp_flash_register: 356E */ +#else +/* function ia_css_queue_store: 5893 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_dummy_function: 5CF7 */ +#else +/* function ia_css_sp_flash_register: 3691 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_init: 201C */ +#else +/* function ia_css_pipeline_sp_init: 1FD7 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_configure: 2C42 */ +#else +/* function ia_css_tagger_sp_configure: 2C13 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_end_binary: 3E8A */ +#else +/* function ia_css_ispctrl_sp_end_binary: 3FFF */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs +#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5BF8 +#else +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5BF8 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 + +#ifndef ISP2401 +/* function pixelgen_tpg_run: F1E */ +#else +/* function pixelgen_tpg_run: F18 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_is_pending_mask +#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem +#define HIVE_ADDR_event_is_pending_mask 0x5C +#define HIVE_SIZE_event_is_pending_mask 44 +#else +#endif +#endif +#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem +#define HIVE_ADDR_sp_event_is_pending_mask 0x5C +#define HIVE_SIZE_sp_event_is_pending_mask 44 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cb_elems_frame +#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cb_elems_frame 0x5788 +#else +#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 +#endif +#define HIVE_SIZE_sp_all_cb_elems_frame 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5788 +#else +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 +#endif +#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_isys_event_queue_handle +#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5C0C +#else +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 +#endif +#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5C0C +#else +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 +#endif +#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host_sp_com +#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host_sp_com 0x3E48 +#else +#define HIVE_ADDR_host_sp_com 0x3E6C +#endif +#define HIVE_SIZE_host_sp_com 220 +#else +#endif +#endif +#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host_sp_com 0x3E48 +#else +#define HIVE_ADDR_sp_host_sp_com 0x3E6C +#endif +#define HIVE_SIZE_sp_host_sp_com 220 + +#ifndef ISP2401 +/* function ia_css_queue_get_free_space: 5313 */ +#else +/* function ia_css_queue_get_free_space: 54F2 */ +#endif + +#ifndef ISP2401 +/* function exec_image_pipe: 5E6 */ +#else +/* function exec_image_pipe: 57A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_init_dmem_data +#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_init_dmem_data 0x7348 +#else +#define HIVE_ADDR_sp_init_dmem_data 0x73F4 +#endif +#define HIVE_SIZE_sp_init_dmem_data 24 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_init_dmem_data 0x7348 +#else +#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 +#endif +#define HIVE_SIZE_sp_sp_init_dmem_data 24 + +#ifndef ISP2401 +/* function ia_css_sp_metadata_start: 5DD1 */ +#else +/* function ia_css_sp_metadata_start: 5EB3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_init_buffer_queues: 35BF */ +#else +/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_stop: 1FFF */ +#else +/* function ia_css_pipeline_sp_stop: 1FBA */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_connect_pipes: 312C */ +#else +/* function ia_css_tagger_sp_connect_pipes: 30FD */ +#endif + +#ifndef ISP2401 +/* function sp_isys_copy_wait: 644 */ +#else +/* function sp_isys_copy_wait: 5D8 */ +#endif + +/* function is_isp_debug_buffer_full: 337 */ + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3BD3 */ +#else +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ +#endif + +#ifndef ISP2401 +/* function encode_and_post_timer_event: AA8 */ +#else +/* function encode_and_post_timer_event: A3C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_input_system_bz2788_active +#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_input_system_bz2788_active 0x250C +#else +#define HIVE_ADDR_input_system_bz2788_active 0x2524 +#endif +#define HIVE_SIZE_input_system_bz2788_active 4 +#else +#endif +#endif +#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_input_system_bz2788_active 0x250C +#else +#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 +#endif +#define HIVE_SIZE_sp_input_system_bz2788_active 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS +#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC +#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC +#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_per_frame_data +#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_per_frame_data 0x3F24 +#else +#define HIVE_ADDR_sp_per_frame_data 0x3F48 +#endif +#define HIVE_SIZE_sp_per_frame_data 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_per_frame_data 0x3F24 +#else +#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 +#endif +#define HIVE_SIZE_sp_sp_per_frame_data 4 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_vbuf_dequeue: 62AC */ +#else +/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_psys_event_queue_handle +#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5C18 +#else +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 +#endif +#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5C18 +#else +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 +#endif +#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_xmem_bin_addr +#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_xmem_bin_addr 0x3F28 +#else +#define HIVE_ADDR_xmem_bin_addr 0x3F4C +#endif +#define HIVE_SIZE_xmem_bin_addr 4 +#else +#endif +#endif +#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_xmem_bin_addr 0x3F28 +#else +#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C +#endif +#define HIVE_SIZE_sp_xmem_bin_addr 4 + +#ifndef ISP2401 +/* function tmr_clock_init: 16F9 */ +#else +/* function tmr_clock_init: 166F */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_run: 1ABF */ +#else +/* function ia_css_pipeline_sp_run: 1A61 */ +#endif + +#ifndef ISP2401 +/* function memcpy: 68B6 */ +#else +/* function memcpy: 6AB4 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS +#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 +#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4 +#else +#endif +#endif +#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 +#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GP_DEVICE_BASE +#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_GP_DEVICE_BASE 0x384 +#else +#define HIVE_ADDR_GP_DEVICE_BASE 0x39C +#endif +#define HIVE_SIZE_GP_DEVICE_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x384 +#else +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C +#endif +#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue +#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x278 +#else +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C +#endif +#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x278 +#else +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C +#endif +#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 + +#ifndef ISP2401 +/* function stream2mmio_send_command: E0A */ +#else +/* function stream2mmio_send_command: E04 */ +#endif + +#ifndef ISP2401 +/* function ia_css_uds_sp_scale_params: 65BF */ +#else +/* function ia_css_uds_sp_scale_params: 67BD */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_increase_size: 14DC */ +#else +/* function ia_css_circbuf_increase_size: 1452 */ +#endif + +#ifndef ISP2401 +/* function __divu: 6834 */ +#else +/* function __divu: 6A32 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_get_state: 131F */ +#else +/* function ia_css_thread_sp_get_state: 1295 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_cont_capt_stop +#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_cont_capt_stop 0x5798 +#else +#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 +#endif +#define HIVE_SIZE_sem_for_cont_capt_stop 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5798 +#else +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 +#endif +#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES +#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC +#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC +#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 + +#ifndef ISP2401 +/* function thread_fiber_sp_main: 14D5 */ +#else +/* function thread_fiber_sp_main: 144B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_pipe_thread +#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_pipe_thread 0x58DC +#define HIVE_SIZE_sp_isp_pipe_thread 340 +#else +#define HIVE_ADDR_sp_isp_pipe_thread 0x5978 +#define HIVE_SIZE_sp_isp_pipe_thread 360 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x58DC +#define HIVE_SIZE_sp_sp_isp_pipe_thread 340 +#else +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 +#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_handle_parameter_sets: 193F */ +#else +/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_set_state: 5DED */ +#else +/* function ia_css_spctrl_sp_set_state: 5ECF */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_signal: 6A99 */ +#else +/* function ia_css_thread_sem_sp_signal: 6D18 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_IRQ_BASE +#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_IRQ_BASE 0x2C +#define HIVE_SIZE_IRQ_BASE 16 +#else +#endif +#endif +#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_IRQ_BASE 0x2C +#define HIVE_SIZE_sp_IRQ_BASE 16 + +#ifndef ISP2401 +/* function ia_css_virtual_isys_sp_isr_init: 5E8C */ +#else +/* function ia_css_virtual_isys_sp_isr_init: 5F70 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_TIMED_CTRL_BASE +#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 +#define HIVE_SIZE_TIMED_CTRL_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 +#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 + +#ifndef ISP2401 +/* function ia_css_isys_sp_generate_exp_id: 613C */ + +/* function ia_css_rmgr_sp_init: 61A7 */ +#else +/* function ia_css_isys_sp_generate_exp_id: 6302 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_init: 6B6A */ +#else +/* function ia_css_rmgr_sp_init: 636D */ +#endif + +#ifndef ISP2401 +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_is_isp_requested +#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_is_isp_requested 0x390 +#define HIVE_SIZE_is_isp_requested 4 +#else +#endif +#endif +#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_sp_is_isp_requested 0x390 +#define HIVE_SIZE_sp_is_isp_requested 4 +#else +/* function ia_css_thread_sem_sp_init: 6DE7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_cb_frame +#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_cb_frame 0x57AC +#else +#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 +#endif +#define HIVE_SIZE_sem_for_reading_cb_frame 40 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x57AC +#else +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 +#endif +#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_execute: 3B3B */ +#else +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_is_isp_requested +#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_is_isp_requested 0x3A8 +#define HIVE_SIZE_is_isp_requested 4 +#else +#endif +#endif +#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_sp_is_isp_requested 0x3A8 +#define HIVE_SIZE_sp_is_isp_requested 4 + +/* function ia_css_dmaproxy_sp_execute: 3C9B */ +#endif + +#ifndef ISP2401 +/* function csi_rx_backend_rst: CE6 */ +#else +/* function csi_rx_backend_rst: CE0 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_is_empty: 51FA */ +#else +/* function ia_css_queue_is_empty: 7144 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_has_stopped: 1FF5 */ +#else +/* function ia_css_pipeline_sp_has_stopped: 1FB0 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_extract: 15E0 */ +#else +/* function ia_css_circbuf_extract: 1556 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_is_locked_from_start: 344F */ +#else +/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_current_sp_thread +#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem +#define HIVE_ADDR_current_sp_thread 0x274 +#define HIVE_SIZE_current_sp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem +#define HIVE_ADDR_sp_current_sp_thread 0x274 +#define HIVE_SIZE_sp_current_sp_thread 4 + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_get_spid: 5DF4 */ +#else +/* function ia_css_spctrl_sp_get_spid: 5ED6 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_reset_buffers: 3646 */ +#else +/* function ia_css_bufq_sp_reset_buffers: 3769 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read_byte_addr: 6DD7 */ +#else +/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_uninit: 61A0 */ +#else +/* function ia_css_rmgr_sp_uninit: 6366 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_stack +#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_stack 0x164 +#define HIVE_SIZE_sp_threads_stack 24 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_stack 0x164 +#define HIVE_SIZE_sp_sp_threads_stack 24 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS +#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218 +#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 +#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 + +#ifndef ISP2401 +/* function ia_css_circbuf_peek: 15C2 */ +#else +/* function ia_css_circbuf_peek: 1538 */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_wait_for_in_param: 1708 */ +#else +/* function ia_css_parambuf_sp_wait_for_in_param: 167E */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cb_elems_param +#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cb_elems_param 0x57D4 +#else +#define HIVE_ADDR_sp_all_cb_elems_param 0x5870 +#endif +#define HIVE_SIZE_sp_all_cb_elems_param 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x57D4 +#else +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 +#endif +#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_pipeline_sp_curr_binary_id +#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x284 +#else +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 +#endif +#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 +#else +#endif +#endif +#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x284 +#else +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 +#endif +#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_frame_desc +#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x57E4 +#else +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 +#endif +#define HIVE_SIZE_sp_all_cbs_frame_desc 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x57E4 +#else +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 + +#ifndef ISP2401 +/* function sp_isys_copy_func_v2: 629 */ +#else +/* function sp_isys_copy_func_v2: 5BD */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_cb_param +#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_cb_param 0x57EC +#else +#define HIVE_ADDR_sem_for_reading_cb_param 0x5888 +#endif +#define HIVE_SIZE_sem_for_reading_cb_param 40 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x57EC +#else +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 +#endif +#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 + +#ifndef ISP2401 +/* function ia_css_queue_get_used_space: 52C7 */ +#else +/* function ia_css_queue_get_used_space: 54A6 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_cont_capt_start +#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_cont_capt_start 0x5814 +#else +#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 +#endif +#define HIVE_SIZE_sem_for_cont_capt_start 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x5814 +#else +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 +#endif +#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_tmp_heap +#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_tmp_heap 0x70A8 +#else +#define HIVE_ADDR_tmp_heap 0x7158 +#endif +#define HIVE_SIZE_tmp_heap 640 +#else +#endif +#endif +#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_tmp_heap 0x70A8 +#else +#define HIVE_ADDR_sp_tmp_heap 0x7158 +#endif +#define HIVE_SIZE_sp_tmp_heap 640 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_get_num_vbuf: 64B0 */ +#else +/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_output_compute_dma_info: 4863 */ +#else +/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_lock_exp_id: 2A0F */ +#else +/* function ia_css_tagger_sp_lock_exp_id: 29E0 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5C24 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5C24 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 + +#ifndef ISP2401 +/* function ia_css_queue_is_full: 535E */ +#else +/* function ia_css_queue_is_full: 553D */ +#endif + +/* function debug_buffer_init_isp: E4 */ + +#ifndef ISP2401 +/* function ia_css_tagger_sp_exp_id_is_locked: 2945 */ +#else +/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem +#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7764 +#else +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 +#endif +#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7764 +#else +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 +#endif +#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_dump: 6287 */ +#else +/* function ia_css_rmgr_sp_refcount_dump: 644D */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5C60 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5C60 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_pipe_threads +#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_pipe_threads 0x150 +#define HIVE_SIZE_sp_pipe_threads 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_pipe_threads 0x150 +#define HIVE_SIZE_sp_sp_pipe_threads 20 + +#ifndef ISP2401 +/* function sp_event_proxy_func: 78D */ +#else +/* function sp_event_proxy_func: 721 */ +#endif + +#ifndef ISP2401 +/* function ibuf_ctrl_run: D7F */ +#else +/* function ibuf_ctrl_run: D79 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_isys_event_queue_handle +#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5C74 +#else +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 +#endif +#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5C74 +#else +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 +#endif +#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 + +#ifndef ISP2401 +/* function ia_css_thread_sp_yield: 6A12 */ +#else +/* function ia_css_thread_sp_yield: 6C96 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_param_desc +#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_param_desc 0x5828 +#else +#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 +#endif +#define HIVE_SIZE_sp_all_cbs_param_desc 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x5828 +#else +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb +#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6C8C +#else +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 +#endif +#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6C8C +#else +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 +#endif +#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 + +#ifndef ISP2401 +/* function ia_css_thread_sp_fork: 13AC */ +#else +/* function ia_css_thread_sp_fork: 1322 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_destroy: 3136 */ +#else +/* function ia_css_tagger_sp_destroy: 3107 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_vmem_read: 3ADB */ +#else +/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES +#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8 +#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 +#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 + +#ifndef ISP2401 +/* function initialize_sp_group: 5F6 */ +#else +/* function initialize_sp_group: 58A */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_peek: 325B */ +#else +/* function ia_css_tagger_buf_sp_peek: 337E */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_init: 13D8 */ +#else +/* function ia_css_thread_sp_init: 134E */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_reset_exp_id: 6133 */ +#else +/* function qos_scheduler_update_fps: 67AD */ +#endif + +#ifndef ISP2401 +/* function qos_scheduler_update_fps: 65AF */ +#else +/* function ia_css_isys_sp_reset_exp_id: 62F9 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_set_stream_base_addr: 4F38 */ +#else +/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_DMEM_BASE +#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_DMEM_BASE 0x10 +#define HIVE_SIZE_ISP_DMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 +#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_SP_DMEM_BASE +#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_SP_DMEM_BASE 0x4 +#define HIVE_SIZE_SP_DMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 +#define HIVE_SIZE_sp_SP_DMEM_BASE 4 + +#ifndef ISP2401 +/* function ibuf_ctrl_transfer: D67 */ +#else +/* function ibuf_ctrl_transfer: D61 */ + +/* function __ia_css_queue_is_empty_text: 5403 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read: 3B51 */ +#else +/* function ia_css_dmaproxy_sp_read: 3CB1 */ +#endif + +#ifndef ISP2401 +/* function virtual_isys_stream_is_capture_done: 5EB0 */ +#else +/* function virtual_isys_stream_is_capture_done: 5F94 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_raw_copy_line_count +#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_raw_copy_line_count 0x360 +#else +#define HIVE_ADDR_raw_copy_line_count 0x378 +#endif +#define HIVE_SIZE_raw_copy_line_count 4 +#else +#endif +#endif +#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_raw_copy_line_count 0x360 +#else +#define HIVE_ADDR_sp_raw_copy_line_count 0x378 +#endif +#define HIVE_SIZE_sp_raw_copy_line_count 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle +#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5C80 +#else +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C +#endif +#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5C80 +#else +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C +#endif +#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 + +#ifndef ISP2401 +/* function ia_css_queue_peek: 523D */ +#else +/* function ia_css_queue_peek: 541C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt +#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5B2C +#else +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 +#endif +#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5B2C +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_can_send_token_mask +#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem +#define HIVE_ADDR_event_can_send_token_mask 0x88 +#define HIVE_SIZE_event_can_send_token_mask 44 +#else +#endif +#endif +#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem +#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 +#define HIVE_SIZE_sp_event_can_send_token_mask 44 + +#ifndef ISP2401 +/* function csi_rx_frontend_stop: C11 */ +#else +/* function csi_rx_frontend_stop: C0B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_thread +#define HIVE_MEM_isp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_thread 0x6FD8 +#else +#define HIVE_ADDR_isp_thread 0x7088 +#endif +#define HIVE_SIZE_isp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_thread 0x6FD8 +#else +#define HIVE_ADDR_sp_isp_thread 0x7088 +#endif +#define HIVE_SIZE_sp_isp_thread 4 + +#ifndef ISP2401 +/* function encode_and_post_sp_event_non_blocking: AF0 */ +#else +/* function encode_and_post_sp_event_non_blocking: A84 */ +#endif + +/* function is_ddr_debug_buffer_full: 2CC */ + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 32AB */ +#else +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_fiber +#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_fiber 0x194 +#define HIVE_SIZE_sp_threads_fiber 24 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_fiber 0x194 +#define HIVE_SIZE_sp_sp_threads_fiber 24 + +#ifndef ISP2401 +/* function encode_and_post_sp_event: A79 */ +#else +/* function encode_and_post_sp_event: A0D */ +#endif + +/* function debug_enqueue_ddr: EE */ + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_init_vbuf: 6242 */ +#else +/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ +#endif + +#ifndef ISP2401 +/* function dmaproxy_sp_read_write: 6E86 */ +#else +/* function dmaproxy_sp_read_write: 70C3 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer +#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6C90 +#else +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C +#endif +#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6C90 +#else +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C +#endif +#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_buffer_queue_handle +#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5C8C +#else +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 +#endif +#define HIVE_SIZE_host2sp_buffer_queue_handle 480 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5C8C +#else +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 +#endif +#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_in_service +#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3054 +#else +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 +#endif +#define HIVE_SIZE_ia_css_flash_sp_in_service 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3054 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_process: 6B92 */ +#else +/* function ia_css_dmaproxy_sp_process: 6E0F */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_mark_from_end: 3533 */ +#else +/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_cs: 3F77 */ +#else +/* function ia_css_ispctrl_sp_init_cs: 40FA */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_init: 5E02 */ +#else +/* function ia_css_spctrl_sp_init: 5EE4 */ +#endif + +#ifndef ISP2401 +/* function sp_event_proxy_init: 7A2 */ +#else +/* function sp_event_proxy_init: 736 */ +#endif + +#ifndef ISP2401 +/* function input_system_input_port_close: 109B */ +#else +/* function input_system_input_port_close: 1095 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5E6C +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5E6C +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_output +#define HIVE_MEM_sp_output scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_output 0x3F2C +#else +#define HIVE_ADDR_sp_output 0x3F50 +#endif +#define HIVE_SIZE_sp_output 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_output 0x3F2C +#else +#define HIVE_ADDR_sp_sp_output 0x3F50 +#endif +#define HIVE_SIZE_sp_sp_output 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues +#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5E94 +#else +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5E94 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 + +#ifndef ISP2401 +/* function pixelgen_prbs_config: E93 */ +#else +/* function pixelgen_prbs_config: E8D */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_CTRL_BASE +#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_CTRL_BASE 0x8 +#define HIVE_SIZE_ISP_CTRL_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 +#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_INPUT_FORMATTER_BASE +#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C +#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 +#else +#endif +#endif +#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C +#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 + +#ifndef ISP2401 +/* function sp_dma_proxy_reset_channels: 3DAB */ +#else +/* function sp_dma_proxy_reset_channels: 3F20 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_update_size: 322A */ +#else +/* function ia_css_tagger_sp_update_size: 334D */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue +#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x61B4 +#else +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 +#endif +#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x61B4 +#else +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 + +#ifndef ISP2401 +/* function thread_fiber_sp_create: 1444 */ +#else +/* function thread_fiber_sp_create: 13BA */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_increments: 3C3D */ +#else +/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_writing_cb_frame +#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_writing_cb_frame 0x5830 +#else +#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC +#endif +#define HIVE_SIZE_sem_for_writing_cb_frame 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x5830 +#else +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC +#endif +#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_writing_cb_param +#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_writing_cb_param 0x5844 +#else +#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 +#endif +#define HIVE_SIZE_sem_for_writing_cb_param 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x5844 +#else +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 +#endif +#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 + +#ifndef ISP2401 +/* function pixelgen_tpg_is_done: F0D */ +#else +/* function pixelgen_tpg_is_done: F07 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_stream_capture_indication: 5FB6 */ +#else +/* function ia_css_isys_stream_capture_indication: 60D7 */ +#endif + +/* function sp_start_isp_entry: 392 */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifdef HIVE_ADDR_sp_start_isp_entry +#endif +#define HIVE_ADDR_sp_start_isp_entry 0x392 +#endif +#define HIVE_ADDR_sp_sp_start_isp_entry 0x392 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unmark_all: 34B7 */ +#else +/* function ia_css_tagger_buf_sp_unmark_all: 35DA */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unmark_from_start: 34F8 */ +#else +/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_channel_acquire: 3DD7 */ +#else +/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_add_num_vbuf: 648C */ +#else +/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ +#endif + +#ifndef ISP2401 +/* function ibuf_ctrl_config: D8B */ +#else +/* function ibuf_ctrl_config: D85 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_stream_stop: 602E */ +#else +/* function ia_css_isys_stream_stop: 61F4 */ +#endif + +#ifndef ISP2401 +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3AA7 */ +#else +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_acquire_buf_elem: 291D */ +#else +/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_is_dynamic_buffer: 3990 */ +#else +/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_group +#define HIVE_MEM_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_group 0x3F3C +#define HIVE_SIZE_sp_group 6176 +#else +#define HIVE_ADDR_sp_group 0x3F60 +#define HIVE_SIZE_sp_group 6296 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_group 0x3F3C +#define HIVE_SIZE_sp_sp_group 6176 +#else +#define HIVE_ADDR_sp_sp_group 0x3F60 +#define HIVE_SIZE_sp_sp_group 6296 +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_event_proxy_thread +#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_event_proxy_thread 0x5A30 +#define HIVE_SIZE_sp_event_proxy_thread 68 +#else +#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 +#define HIVE_SIZE_sp_event_proxy_thread 72 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5A30 +#define HIVE_SIZE_sp_sp_event_proxy_thread 68 +#else +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 +#define HIVE_SIZE_sp_sp_event_proxy_thread 72 +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_kill: 1372 */ +#else +/* function ia_css_thread_sp_kill: 12E8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_create: 31E4 */ +#else +/* function ia_css_tagger_sp_create: 32FB */ +#endif + +#ifndef ISP2401 +/* function tmpmem_acquire_dmem: 6539 */ +#else +/* function tmpmem_acquire_dmem: 66FF */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_MMU_BASE +#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_MMU_BASE 0x24 +#define HIVE_SIZE_MMU_BASE 8 +#else +#endif +#endif +#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_MMU_BASE 0x24 +#define HIVE_SIZE_sp_MMU_BASE 8 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_channel_release: 3DC3 */ +#else +/* function ia_css_dmaproxy_sp_channel_release: 3F38 */ +#endif + +#ifndef ISP2401 +/* function pixelgen_prbs_run: E81 */ +#else +/* function pixelgen_prbs_run: E7B */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_is_idle: 3DA3 */ +#else +/* function ia_css_dmaproxy_sp_is_idle: 3F18 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_qos_start +#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_qos_start 0x5858 +#else +#define HIVE_ADDR_sem_for_qos_start 0x58F4 +#endif +#define HIVE_SIZE_sem_for_qos_start 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_qos_start 0x5858 +#else +#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 +#endif +#define HIVE_SIZE_sp_sem_for_qos_start 20 + +#ifndef ISP2401 +/* function isp_hmem_load: B63 */ +#else +/* function isp_hmem_load: B5D */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_release_buf_elem: 28F9 */ +#else +/* function ia_css_tagger_sp_release_buf_elem: 28CA */ +#endif + +#ifndef ISP2401 +/* function ia_css_eventq_sp_send: 3E19 */ +#else +/* function ia_css_eventq_sp_send: 3F8E */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unlock_from_start: 33E7 */ +#else +/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_debug_buffer_ddr_address +#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem +#define HIVE_ADDR_debug_buffer_ddr_address 0xBC +#define HIVE_SIZE_debug_buffer_ddr_address 4 +#else +#endif +#endif +#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem +#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC +#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 + +#ifndef ISP2401 +/* function sp_isys_copy_request: 6ED */ +#else +/* function sp_isys_copy_request: 681 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 631C */ +#else +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_set_priority: 136A */ +#else +/* function ia_css_thread_sp_set_priority: 12E0 */ +#endif + +#ifndef ISP2401 +/* function sizeof_hmem: C0A */ +#else +/* function sizeof_hmem: C04 */ +#endif + +#ifndef ISP2401 +/* function input_system_channel_open: 1241 */ +#else +/* function input_system_channel_open: 11BC */ +#endif + +#ifndef ISP2401 +/* function pixelgen_tpg_stop: EFB */ +#else +/* function pixelgen_tpg_stop: EF5 */ +#endif + +#ifndef ISP2401 +/* function tmpmem_release_dmem: 6528 */ +#else +/* function tmpmem_release_dmem: 66EE */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_width_exception: 3C28 */ +#else +/* function __ia_css_dmaproxy_sp_process_text: 3BAB */ +#endif + +#ifndef ISP2401 +/* function sp_event_assert: 929 */ +#else +/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ +#endif + +#ifndef ISP2401 +/* function ia_css_flash_sp_init_internal_params: 35B4 */ +#else +/* function sp_event_assert: 8BD */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 32ED */ +#else +/* function ia_css_flash_sp_init_internal_params: 36D7 */ +#endif + +#ifndef ISP2401 +/* function __modu: 687A */ +#else +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_isp_vector: 3AAD */ +#else +/* function __modu: 6A78 */ +#endif + +#ifndef ISP2401 +/* function input_system_channel_transfer: 122A */ +#else +/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ + +/* function input_system_channel_transfer: 11A5 */ +#endif + +/* function isp_vamem_store: 0 */ + +#ifdef ISP2401 +/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ + +#endif +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GDC_BASE +#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_GDC_BASE 0x44 +#define HIVE_SIZE_GDC_BASE 8 +#else +#endif +#endif +#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_GDC_BASE 0x44 +#define HIVE_SIZE_sp_GDC_BASE 8 + +#ifndef ISP2401 +/* function ia_css_queue_local_init: 5528 */ +#else +/* function ia_css_queue_local_init: 5707 */ +#endif + +#ifndef ISP2401 +/* function sp_event_proxy_callout_func: 6947 */ +#else +/* function sp_event_proxy_callout_func: 6B45 */ +#endif + +#ifndef ISP2401 +/* function qos_scheduler_schedule_stage: 6580 */ +#else +/* function qos_scheduler_schedule_stage: 6759 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads +#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5A78 +#else +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 +#endif +#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5A78 +#else +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 +#endif +#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_stack_size +#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_stack_size 0x17C +#define HIVE_SIZE_sp_threads_stack_size 24 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C +#define HIVE_SIZE_sp_sp_threads_stack_size 24 + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_isp_done_row_striping: 4849 */ +#else +/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ +#endif + +#ifndef ISP2401 +/* function __ia_css_virtual_isys_sp_isr_text: 5E45 */ +#else +/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_dequeue: 53A6 */ +#else +/* function ia_css_queue_dequeue: 5585 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_configure_channel: 6DEE */ +#else +/* function is_qos_standalone_mode: 6734 */ + +/* function ia_css_dmaproxy_sp_configure_channel: 703C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_current_thread_fiber_sp +#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_current_thread_fiber_sp 0x5A80 +#else +#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C +#endif +#define HIVE_SIZE_current_thread_fiber_sp 4 +#else +#endif +#endif +#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5A80 +#else +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C +#endif +#define HIVE_SIZE_sp_current_thread_fiber_sp 4 + +#ifndef ISP2401 +/* function ia_css_circbuf_pop: 1674 */ +#else +/* function ia_css_circbuf_pop: 15EA */ +#endif + +#ifndef ISP2401 +/* function memset: 68F9 */ +#else +/* function memset: 6AF7 */ +#endif + +/* function irq_raise_set_token: B6 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GPIO_BASE +#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_GPIO_BASE 0x3C +#define HIVE_SIZE_GPIO_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_GPIO_BASE 0x3C +#define HIVE_SIZE_sp_GPIO_BASE 4 + +#ifndef ISP2401 +/* function pixelgen_prbs_stop: E6F */ +#else +/* function pixelgen_prbs_stop: E69 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_acc_stage_enable: 1FC0 */ +#else +/* function ia_css_pipeline_acc_stage_enable: 1F69 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_unlock_exp_id: 296A */ +#else +/* function ia_css_tagger_sp_unlock_exp_id: 293B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_ph +#define HIVE_MEM_isp_ph scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_ph 0x7360 +#else +#define HIVE_ADDR_isp_ph 0x740C +#endif +#define HIVE_SIZE_isp_ph 28 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_ph 0x7360 +#else +#define HIVE_ADDR_sp_isp_ph 0x740C +#endif +#define HIVE_SIZE_sp_isp_ph 28 + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_ds: 40D6 */ +#else +/* function ia_css_ispctrl_sp_init_ds: 4286 */ +#endif + +#ifndef ISP2401 +/* function get_xmem_base_addr_raw: 4479 */ +#else +/* function get_xmem_base_addr_raw: 4635 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_param +#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_param 0x586C +#else +#define HIVE_ADDR_sp_all_cbs_param 0x5908 +#endif +#define HIVE_SIZE_sp_all_cbs_param 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_param 0x586C +#else +#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_param 16 + +#ifndef ISP2401 +/* function pixelgen_tpg_config: F30 */ +#else +/* function pixelgen_tpg_config: F2A */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_create: 16C2 */ +#else +/* function ia_css_circbuf_create: 1638 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp_group +#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp_group 0x587C +#else +#define HIVE_ADDR_sem_for_sp_group 0x5918 +#endif +#define HIVE_SIZE_sem_for_sp_group 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp_group 0x587C +#else +#define HIVE_ADDR_sp_sem_for_sp_group 0x5918 +#endif +#define HIVE_SIZE_sp_sem_for_sp_group 20 + +#ifndef ISP2401 +/* function csi_rx_frontend_run: C22 */ +#else +/* function csi_rx_frontend_run: C1C */ + +/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ +#endif + +#ifndef ISP2401 +/* function ia_css_framebuf_sp_wait_for_in_frame: 64B7 */ +#else +/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_stream_open: 60E3 */ +#else +/* function ia_css_isys_stream_open: 62A9 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_tag_frame: 5C71 */ +#else +/* function ia_css_sp_rawcopy_tag_frame: 5E35 */ +#endif + +#ifndef ISP2401 +/* function input_system_channel_configure: 125D */ +#else +/* function input_system_channel_configure: 11D8 */ +#endif + +#ifndef ISP2401 +/* function isp_hmem_clear: B33 */ +#else +/* function isp_hmem_clear: B2D */ +#endif + +#ifndef ISP2401 +/* function ia_css_framebuf_sp_release_in_frame: 64FA */ +#else +/* function ia_css_framebuf_sp_release_in_frame: 66C0 */ +#endif + +#ifndef ISP2401 +/* function stream2mmio_config: E1B */ +#else +/* function stream2mmio_config: E15 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_start_binary: 3F55 */ +#else +/* function ia_css_ispctrl_sp_start_binary: 40D8 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs +#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x698C +#else +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x698C +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 + +#ifndef ISP2401 +/* function ia_css_eventq_sp_recv: 3DEB */ +#else +/* function ia_css_eventq_sp_recv: 3F60 */ +#endif + +#ifndef ISP2401 +/* function csi_rx_frontend_config: C7A */ +#else +/* function csi_rx_frontend_config: C74 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_pool +#define HIVE_MEM_isp_pool scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_pool 0x370 +#else +#define HIVE_ADDR_isp_pool 0x388 +#endif +#define HIVE_SIZE_isp_pool 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_pool 0x370 +#else +#define HIVE_ADDR_sp_isp_pool 0x388 +#endif +#define HIVE_SIZE_sp_isp_pool 4 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_rel_gen: 61E9 */ +#else +/* function ia_css_rmgr_sp_rel_gen: 63AF */ + +/* function ia_css_tagger_sp_unblock_clients: 31C3 */ +#endif + +#ifndef ISP2401 +/* function css_get_frame_processing_time_end: 28E9 */ +#else +/* function css_get_frame_processing_time_end: 28BA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_any_pending_mask +#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_event_any_pending_mask 0x388 +#else +#define HIVE_ADDR_event_any_pending_mask 0x3A0 +#endif +#define HIVE_SIZE_event_any_pending_mask 8 +#else +#endif +#endif +#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_event_any_pending_mask 0x388 +#else +#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 +#endif +#define HIVE_SIZE_sp_event_any_pending_mask 8 + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_get_pipe_io_status: 1AB8 */ +#else +/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ +#endif + +/* function sh_css_decode_tag_descr: 352 */ + +/* function debug_enqueue_isp: 27B */ + +#ifndef ISP2401 +/* function qos_scheduler_update_stage_budget: 656E */ +#else +/* function qos_scheduler_update_stage_budget: 673C */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_uninit: 5DFB */ +#else +/* function ia_css_spctrl_sp_uninit: 5EDD */ +#endif + +#ifndef ISP2401 +/* function csi_rx_backend_run: C68 */ +#else +/* function csi_rx_backend_run: C62 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x69A0 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x69A0 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_lock_from_start: 341B */ +#else +/* function ia_css_tagger_buf_sp_lock_from_start: 353E */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_isp_idle +#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_isp_idle 0x5890 +#else +#define HIVE_ADDR_sem_for_isp_idle 0x592C +#endif +#define HIVE_SIZE_sem_for_isp_idle 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_isp_idle 0x5890 +#else +#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C +#endif +#define HIVE_SIZE_sp_sem_for_isp_idle 20 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_write_byte_addr: 3B0A */ +#else +/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init: 3A81 */ +#else +/* function ia_css_dmaproxy_sp_init: 3BE1 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 3686 */ +#else +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_VAMEM_BASE +#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 +#define HIVE_SIZE_ISP_VAMEM_BASE 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 +#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 + +#ifndef ISP2401 +/* function input_system_channel_sync: 11A4 */ +#else +/* function input_system_channel_sync: 6C10 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger +#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x732C +#else +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 +#endif +#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x732C +#else +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 +#endif +#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6A2C +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6A2C +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 + +#ifndef ISP2401 +/* function ia_css_queue_item_load: 561A */ +#else +/* function ia_css_queue_item_load: 57F9 */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_get_state: 5DE6 */ +#else +/* function ia_css_spctrl_sp_get_state: 5EC8 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_callout_sp_thread +#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_callout_sp_thread 0x5A74 +#else +#define HIVE_ADDR_callout_sp_thread 0x278 +#endif +#define HIVE_SIZE_callout_sp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_callout_sp_thread 0x5A74 +#else +#define HIVE_ADDR_sp_callout_sp_thread 0x278 +#endif +#define HIVE_SIZE_sp_callout_sp_thread 4 + +#ifndef ISP2401 +/* function thread_fiber_sp_init: 14CB */ +#else +/* function thread_fiber_sp_init: 1441 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_SP_PMEM_BASE +#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_SP_PMEM_BASE 0x0 +#define HIVE_SIZE_SP_PMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 +#define HIVE_SIZE_sp_SP_PMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_input_stream_format +#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_input_stream_format 0x3E2C +#else +#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 +#endif +#define HIVE_SIZE_sp_isp_input_stream_format 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E2C +#else +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 +#endif +#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 + +#ifndef ISP2401 +/* function __mod: 6866 */ +#else +/* function __mod: 6A64 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_dmem_channel: 3B6B */ +#else +/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_join: 139B */ +#else +/* function ia_css_thread_sp_join: 1311 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_add_command: 6EF1 */ +#else +/* function ia_css_dmaproxy_sp_add_command: 712E */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_metadata_thread_func: 5DDF */ +#else +/* function ia_css_sp_metadata_thread_func: 5EC1 */ +#endif + +#ifndef ISP2401 +/* function __sp_event_proxy_func_critical: 6934 */ +#else +/* function __sp_event_proxy_func_critical: 6B32 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 5F53 */ +#else +/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_metadata_wait: 5DD8 */ +#else +/* function ia_css_sp_metadata_wait: 5EBA */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_peek_from_start: 15A4 */ +#else +/* function ia_css_circbuf_peek_from_start: 151A */ +#endif + +#ifndef ISP2401 +/* function ia_css_event_sp_encode: 3E76 */ +#else +/* function ia_css_event_sp_encode: 3FEB */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_run: 140E */ +#else +/* function ia_css_thread_sp_run: 1384 */ +#endif + +#ifndef ISP2401 +/* function sp_isys_copy_func: 618 */ +#else +/* function sp_isys_copy_func: 5AC */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_init_isp_memories: 50A3 */ +#else +/* function ia_css_sp_isp_param_init_isp_memories: 52AC */ +#endif + +#ifndef ISP2401 +/* function register_isr: 921 */ +#else +/* function register_isr: 8B5 */ +#endif + +/* function irq_raise: C8 */ + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_mmu_invalidate: 3A48 */ +#else +/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ +#endif + +#ifndef ISP2401 +/* function csi_rx_backend_disable: C34 */ +#else +/* function csi_rx_backend_disable: C2E */ +#endif + +#ifndef ISP2401 +/* function pipeline_sp_initialize_stage: 2104 */ +#else +/* function pipeline_sp_initialize_stage: 20BF */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES +#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem +#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4 +#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 +#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6DC0 */ +#else +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_done_ds: 40BD */ +#else +/* function ia_css_ispctrl_sp_done_ds: 426D */ +#endif + +#ifndef ISP2401 +/* function csi_rx_backend_config: C8B */ +#else +/* function csi_rx_backend_config: C85 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_get_mem_inits: 507E */ +#else +/* function ia_css_sp_isp_param_get_mem_inits: 5287 */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_init_buffer_queues: 1A85 */ +#else +/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_pfp_spref +#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_pfp_spref 0x378 +#else +#define HIVE_ADDR_vbuf_pfp_spref 0x390 +#endif +#define HIVE_SIZE_vbuf_pfp_spref 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x378 +#else +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 +#endif +#define HIVE_SIZE_sp_vbuf_pfp_spref 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_HMEM_BASE +#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_HMEM_BASE 0x20 +#define HIVE_SIZE_ISP_HMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 +#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6A74 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6A74 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 + +#ifndef ISP2401 +/* function qos_scheduler_init_stage_budget: 65A7 */ +#else +/* function qos_scheduler_init_stage_budget: 679A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_buffer_queue_handle +#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6B8C +#else +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 +#endif +#define HIVE_SIZE_sp2host_buffer_queue_handle 96 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6B8C +#else +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 +#endif +#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_isp_vars: 4D9D */ +#else +/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_stream_start: 6010 */ +#else +/* function ia_css_isys_stream_start: 6187 */ +#endif + +#ifndef ISP2401 +/* function sp_warning: 954 */ +#else +/* function sp_warning: 8E8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_vbuf_enqueue: 62DC */ +#else +/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_tag_exp_id: 2A84 */ +#else +/* function ia_css_tagger_sp_tag_exp_id: 2A55 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_sfi_release_current_frame: 276B */ +#else +/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_write: 3B21 */ +#else +/* function ia_css_dmaproxy_sp_write: 3C81 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_stream_start_async: 608A */ +#else +/* function ia_css_isys_stream_start_async: 6250 */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_release_in_param: 1905 */ +#else +/* function ia_css_parambuf_sp_release_in_param: 187B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_irq_sw_interrupt_token +#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_irq_sw_interrupt_token 0x3E28 +#else +#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C +#endif +#define HIVE_SIZE_irq_sw_interrupt_token 4 +#else +#endif +#endif +#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E28 +#else +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C +#endif +#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_addresses +#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_addresses 0x6FDC +#else +#define HIVE_ADDR_sp_isp_addresses 0x708C +#endif +#define HIVE_SIZE_sp_isp_addresses 172 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_addresses 0x6FDC +#else +#define HIVE_ADDR_sp_sp_isp_addresses 0x708C +#endif +#define HIVE_SIZE_sp_sp_isp_addresses 172 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_acq_gen: 6201 */ +#else +/* function ia_css_rmgr_sp_acq_gen: 63C7 */ +#endif + +#ifndef ISP2401 +/* function input_system_input_port_open: 10ED */ +#else +/* function input_system_input_port_open: 10E7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isps +#define HIVE_MEM_isps scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isps 0x737C +#else +#define HIVE_ADDR_isps 0x7428 +#endif +#define HIVE_SIZE_isps 28 +#else +#endif +#endif +#define HIVE_MEM_sp_isps scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isps 0x737C +#else +#define HIVE_ADDR_sp_isps 0x7428 +#endif +#define HIVE_SIZE_sp_isps 28 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host_sp_queues_initialized +#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host_sp_queues_initialized 0x3E40 +#else +#define HIVE_ADDR_host_sp_queues_initialized 0x3E64 +#endif +#define HIVE_SIZE_host_sp_queues_initialized 4 +#else +#endif +#endif +#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E40 +#else +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 +#endif +#define HIVE_SIZE_sp_host_sp_queues_initialized 4 + +#ifndef ISP2401 +/* function ia_css_queue_uninit: 54E6 */ +#else +/* function ia_css_queue_uninit: 56C5 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started +#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6C94 +#else +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 +#endif +#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6C94 +#else +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 +#endif +#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 + +#ifndef ISP2401 +/* function ia_css_bufq_sp_release_dynamic_buf: 36F2 */ +#else +/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_height_exception: 3C19 */ +#else +/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_vmem_channel: 3B9E */ +#else +/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ +#endif + +#ifndef ISP2401 +/* function csi_rx_backend_stop: C57 */ +#else +/* function csi_rx_backend_stop: C51 */ +#endif + +#ifndef ISP2401 +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_num_ready_threads +#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem +#define HIVE_ADDR_num_ready_threads 0x5A7C +#define HIVE_SIZE_num_ready_threads 4 +#else +#endif +#endif +#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_num_ready_threads 0x5A7C +#define HIVE_SIZE_sp_num_ready_threads 4 + +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3AF3 */ +#else +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_spref +#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_spref 0x374 +#else +#define HIVE_ADDR_vbuf_spref 0x38C +#endif +#define HIVE_SIZE_vbuf_spref 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_spref 0x374 +#else +#define HIVE_ADDR_sp_vbuf_spref 0x38C +#endif +#define HIVE_SIZE_sp_vbuf_spref 4 + +#ifndef ISP2401 +/* function ia_css_queue_enqueue: 5430 */ +#else +/* function ia_css_queue_enqueue: 560F */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_request +#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_request 0x5B30 +#else +#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC +#endif +#define HIVE_SIZE_ia_css_flash_sp_request 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5B30 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_vmem_write: 3AC4 */ +#else +/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_tagger_frames +#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_tagger_frames 0x5A84 +#else +#define HIVE_ADDR_tagger_frames 0x5B30 +#endif +#define HIVE_SIZE_tagger_frames 168 +#else +#endif +#endif +#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_tagger_frames 0x5A84 +#else +#define HIVE_ADDR_sp_tagger_frames 0x5B30 +#endif +#define HIVE_SIZE_sp_tagger_frames 168 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_if +#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_if 0x58A4 +#else +#define HIVE_ADDR_sem_for_reading_if 0x5940 +#endif +#define HIVE_SIZE_sem_for_reading_if 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_if 0x58A4 +#else +#define HIVE_ADDR_sp_sem_for_reading_if 0x5940 +#endif +#define HIVE_SIZE_sp_sem_for_reading_if 20 + +#ifndef ISP2401 +/* function sp_generate_interrupts: 9D3 */ +#else +/* function sp_generate_interrupts: 967 */ + +/* function ia_css_pipeline_sp_start: 1FC2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_start: 2007 */ +#else +/* function ia_css_thread_default_callout: 6C8F */ +#endif + +#ifndef ISP2401 +/* function csi_rx_backend_enable: C45 */ +#else +/* function csi_rx_backend_enable: C3F */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_init: 5953 */ +#else +/* function ia_css_sp_rawcopy_init: 5B32 */ +#endif + +#ifndef ISP2401 +/* function input_system_input_port_configure: 113F */ +#else +/* function input_system_input_port_configure: 1139 */ +#endif + +#ifndef ISP2401 +/* function tmr_clock_read: 16EF */ +#else +/* function tmr_clock_read: 1665 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_BAMEM_BASE +#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ISP_BAMEM_BASE 0x380 +#else +#define HIVE_ADDR_ISP_BAMEM_BASE 0x398 +#endif +#define HIVE_SIZE_ISP_BAMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x380 +#else +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 +#endif +#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues +#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6BEC +#else +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6BEC +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 + +#ifndef ISP2401 +/* function isys2401_dma_config_legacy: DE0 */ +#else +/* function isys2401_dma_config_legacy: DDA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ibuf_ctrl_master_ports +#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem +#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208 +#define HIVE_SIZE_ibuf_ctrl_master_ports 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 +#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 + +#ifndef ISP2401 +/* function css_get_frame_processing_time_start: 28F1 */ +#else +/* function css_get_frame_processing_time_start: 28C2 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_frame +#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_frame 0x58B8 +#else +#define HIVE_ADDR_sp_all_cbs_frame 0x5954 +#endif +#define HIVE_SIZE_sp_all_cbs_frame 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x58B8 +#else +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_frame 16 + +#ifndef ISP2401 +/* function ia_css_virtual_isys_sp_isr: 6F07 */ +#else +/* function ia_css_virtual_isys_sp_isr: 716E */ +#endif + +#ifndef ISP2401 +/* function thread_sp_queue_print: 142B */ +#else +/* function thread_sp_queue_print: 13A1 */ +#endif + +#ifndef ISP2401 +/* function sp_notify_eof: 97F */ +#else +/* function sp_notify_eof: 913 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_str2mem +#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_str2mem 0x58C8 +#else +#define HIVE_ADDR_sem_for_str2mem 0x5964 +#endif +#define HIVE_SIZE_sem_for_str2mem 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_str2mem 0x58C8 +#else +#define HIVE_ADDR_sp_sem_for_str2mem 0x5964 +#endif +#define HIVE_SIZE_sp_sem_for_str2mem 20 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_is_marked_from_start: 3483 */ +#else +/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_acquire_dynamic_buf: 38AA */ +#else +/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 28BF */ +#else +/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_destroy: 16B9 */ +#else +/* function ia_css_circbuf_destroy: 162F */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_PMEM_BASE +#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_PMEM_BASE 0xC +#define HIVE_SIZE_ISP_PMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC +#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_mem_load: 5011 */ +#else +/* function ia_css_sp_isp_param_mem_load: 521A */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_from_start: 326F */ +#else +/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ +#endif + +#ifndef ISP2401 +/* function __div: 681E */ +#else +/* function __div: 6A1C */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_release_vbuf: 62FB */ +#else +/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_in_use +#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5B34 +#else +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 +#endif +#define HIVE_SIZE_ia_css_flash_sp_in_use 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5B34 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_wait: 6AE4 */ +#else +/* function ia_css_thread_sem_sp_wait: 6D63 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_sleep_mode +#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sleep_mode 0x3E44 +#else +#define HIVE_ADDR_sp_sleep_mode 0x3E68 +#endif +#define HIVE_SIZE_sp_sleep_mode 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_sleep_mode 0x3E44 +#else +#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 +#endif +#define HIVE_SIZE_sp_sp_sleep_mode 4 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_push: 337E */ +#else +/* function ia_css_tagger_buf_sp_push: 34A1 */ +#endif + +/* function mmu_invalidate_cache: D3 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_max_cb_elems +#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem +#define HIVE_ADDR_sp_max_cb_elems 0x148 +#define HIVE_SIZE_sp_max_cb_elems 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 +#define HIVE_SIZE_sp_sp_max_cb_elems 8 + +#ifndef ISP2401 +/* function ia_css_queue_remote_init: 5508 */ +#else +/* function ia_css_queue_remote_init: 56E7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_stop_req +#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_stop_req 0x575C +#else +#define HIVE_ADDR_isp_stop_req 0x57F8 +#endif +#define HIVE_SIZE_isp_stop_req 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_stop_req 0x575C +#else +#define HIVE_ADDR_sp_isp_stop_req 0x57F8 +#endif +#define HIVE_SIZE_sp_isp_stop_req 4 + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_sfi_request_next_frame: 2781 */ +#else +/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ +#endif + +#ifndef ISP2401 +#define HIVE_ICACHE_sp_critical_SEGMENT_START 0 +#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 +#endif + +#endif /* _sp_map_h_ */ +#ifndef ISP2401 +extern void sh_css_dump_sp_dmem(void); +void sh_css_dump_sp_dmem(void) +{ +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h new file mode 100644 index 0000000000000..7907f0ff6d6c3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h @@ -0,0 +1,458 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SYSTEM_GLOBAL_H_INCLUDED__ +#define __SYSTEM_GLOBAL_H_INCLUDED__ + +#include +#include + +/* + * The longest allowed (uninteruptible) bus transfer, does not + * take stalling into account + */ +#define HIVE_ISP_MAX_BURST_LENGTH 1024 + +/* + * Maximum allowed burst length in words for the ISP DMA + * This value is set to 2 to prevent the ISP DMA from blocking + * the bus for too long; as the input system can only buffer + * 2 lines on Moorefield and Cherrytrail, the input system buffers + * may overflow if blocked for too long (BZ 2726). + */ +#define ISP_DMA_MAX_BURST_LENGTH 2 + +/* + * Create a list of HAS and IS properties that defines the system + * + * The configuration assumes the following + * - The system is hetereogeneous; Multiple cells and devices classes + * - The cell and device instances are homogeneous, each device type + * belongs to the same class + * - Device instances supporting a subset of the class capabilities are + * allowed + * + * We could manage different device classes through the enumerated + * lists (C) or the use of classes (C++), but that is presently not + * fully supported + * + * N.B. the 3 input formatters are of 2 different classess + */ + +#define USE_INPUT_SYSTEM_VERSION_2401 + +#define IS_ISP_2400_SYSTEM +/* + * Since this file is visible everywhere and the system definition + * macros are not, detect the separate definitions for {host, SP, ISP} + * + * The 2401 system has the nice property that it uses a vanilla 2400 SP + * so the SP will believe it is a 2400 system rather than 2401... + */ +/* #if defined(SYSTEM_hive_isp_css_2401_system) || defined(__isp2401_mamoiada) || defined(__scalar_processor_2401) */ +#if defined(SYSTEM_hive_isp_css_2401_system) || defined(__isp2401_mamoiada) +#define IS_ISP_2401_MAMOIADA_SYSTEM +#define HAS_ISP_2401_MAMOIADA +#define HAS_SP_2400 +/* #elif defined(SYSTEM_hive_isp_css_2400_system) || defined(__isp2400_mamoiada) || defined(__scalar_processor_2400)*/ +#elif defined(SYSTEM_hive_isp_css_2400_system) || defined(__isp2400_mamoiada) +#define IS_ISP_2400_MAMOIADA_SYSTEM +#define HAS_ISP_2400_MAMOIADA +#define HAS_SP_2400 +#else +#error "system_global.h: 2400_SYSTEM must be one of {2400, 2401 }" +#endif + +#define HAS_MMU_VERSION_2 +#define HAS_DMA_VERSION_2 +#define HAS_GDC_VERSION_2 +#define HAS_VAMEM_VERSION_2 +#define HAS_HMEM_VERSION_1 +#define HAS_BAMEM_VERSION_2 +#define HAS_IRQ_VERSION_2 +#define HAS_IRQ_MAP_VERSION_2 +#define HAS_INPUT_FORMATTER_VERSION_2 +/* 2401: HAS_INPUT_SYSTEM_VERSION_3 */ +/* 2400: HAS_INPUT_SYSTEM_VERSION_2 */ +#define HAS_INPUT_SYSTEM_VERSION_2 +#define HAS_INPUT_SYSTEM_VERSION_2401 +#define HAS_BUFFERED_SENSOR +#define HAS_FIFO_MONITORS_VERSION_2 +/* #define HAS_GP_REGS_VERSION_2 */ +#define HAS_GP_DEVICE_VERSION_2 +#define HAS_GPIO_VERSION_1 +#define HAS_TIMED_CTRL_VERSION_1 +#define HAS_RX_VERSION_2 +#define HAS_NO_INPUT_FORMATTER +/*#define HAS_NO_PACKED_RAW_PIXELS*/ +/*#define HAS_NO_DVS_6AXIS_CONFIG_UPDATE*/ + +#define DMA_DDR_TO_VAMEM_WORKAROUND +#define DMA_DDR_TO_HMEM_WORKAROUND + + +/* + * Semi global. "HRT" is accessible from SP, but + * the HRT types do not fully apply + */ +#define HRT_VADDRESS_WIDTH 32 +/* Surprise, this is a local property*/ +/*#define HRT_ADDRESS_WIDTH 64 */ +#define HRT_DATA_WIDTH 32 + +#define SIZEOF_HRT_REG (HRT_DATA_WIDTH>>3) +#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH/8) + +/* The main bus connecting all devices */ +#define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH +#define HRT_BUS_BYTES HIVE_ISP_CTRL_DATA_BYTES + +#define CSI2P_DISABLE_ISYS2401_ONLINE_MODE + +/* per-frame parameter handling support */ +#define SH_CSS_ENABLE_PER_FRAME_PARAMS + +typedef uint32_t hrt_bus_align_t; + +/* + * Enumerate the devices, device access through the API is by ID, + * through the DLI by address. The enumerator terminators are used + * to size the wiring arrays and as an exception value. + */ +typedef enum { + DDR0_ID = 0, + N_DDR_ID +} ddr_ID_t; + +typedef enum { + ISP0_ID = 0, + N_ISP_ID +} isp_ID_t; + +typedef enum { + SP0_ID = 0, + N_SP_ID +} sp_ID_t; + +#if defined(IS_ISP_2401_MAMOIADA_SYSTEM) +typedef enum { + MMU0_ID = 0, + MMU1_ID, + N_MMU_ID +} mmu_ID_t; +#elif defined(IS_ISP_2400_MAMOIADA_SYSTEM) +typedef enum { + MMU0_ID = 0, + MMU1_ID, + N_MMU_ID +} mmu_ID_t; +#else +#error "system_global.h: SYSTEM must be one of {2400, 2401}" +#endif + +typedef enum { + DMA0_ID = 0, + N_DMA_ID +} dma_ID_t; + +typedef enum { + GDC0_ID = 0, + GDC1_ID, + N_GDC_ID +} gdc_ID_t; + +/* this extra define is needed because we want to use it also + in the preprocessor, and that doesn't work with enums. + */ +#define N_GDC_ID_CPP 2 + +typedef enum { + VAMEM0_ID = 0, + VAMEM1_ID, + VAMEM2_ID, + N_VAMEM_ID +} vamem_ID_t; + +typedef enum { + BAMEM0_ID = 0, + N_BAMEM_ID +} bamem_ID_t; + +typedef enum { + HMEM0_ID = 0, + N_HMEM_ID +} hmem_ID_t; + +typedef enum { + ISYS_IRQ0_ID = 0, /* port a */ + ISYS_IRQ1_ID, /* port b */ + ISYS_IRQ2_ID, /* port c */ + N_ISYS_IRQ_ID +} isys_irq_ID_t; + +typedef enum { + IRQ0_ID = 0, /* GP IRQ block */ + IRQ1_ID, /* Input formatter */ + IRQ2_ID, /* input system */ + IRQ3_ID, /* input selector */ + N_IRQ_ID +} irq_ID_t; + +typedef enum { + FIFO_MONITOR0_ID = 0, + N_FIFO_MONITOR_ID +} fifo_monitor_ID_t; + +/* + * Deprecated: Since all gp_reg instances are different + * and put in the address maps of other devices we cannot + * enumerate them as that assumes the instrances are the + * same. + * + * We define a single GP_DEVICE containing all gp_regs + * w.r.t. a single base address + * +typedef enum { + GP_REGS0_ID = 0, + N_GP_REGS_ID +} gp_regs_ID_t; + */ +typedef enum { + GP_DEVICE0_ID = 0, + N_GP_DEVICE_ID +} gp_device_ID_t; + +typedef enum { + GP_TIMER0_ID = 0, + GP_TIMER1_ID, + GP_TIMER2_ID, + GP_TIMER3_ID, + GP_TIMER4_ID, + GP_TIMER5_ID, + GP_TIMER6_ID, + GP_TIMER7_ID, + N_GP_TIMER_ID +} gp_timer_ID_t; + +typedef enum { + GPIO0_ID = 0, + N_GPIO_ID +} gpio_ID_t; + +typedef enum { + TIMED_CTRL0_ID = 0, + N_TIMED_CTRL_ID +} timed_ctrl_ID_t; + +typedef enum { + INPUT_FORMATTER0_ID = 0, + INPUT_FORMATTER1_ID, + INPUT_FORMATTER2_ID, + INPUT_FORMATTER3_ID, + N_INPUT_FORMATTER_ID +} input_formatter_ID_t; + +/* The IF RST is outside the IF */ +#define INPUT_FORMATTER0_SRST_OFFSET 0x0824 +#define INPUT_FORMATTER1_SRST_OFFSET 0x0624 +#define INPUT_FORMATTER2_SRST_OFFSET 0x0424 +#define INPUT_FORMATTER3_SRST_OFFSET 0x0224 + +#define INPUT_FORMATTER0_SRST_MASK 0x0001 +#define INPUT_FORMATTER1_SRST_MASK 0x0002 +#define INPUT_FORMATTER2_SRST_MASK 0x0004 +#define INPUT_FORMATTER3_SRST_MASK 0x0008 + +typedef enum { + INPUT_SYSTEM0_ID = 0, + N_INPUT_SYSTEM_ID +} input_system_ID_t; + +typedef enum { + RX0_ID = 0, + N_RX_ID +} rx_ID_t; + +enum mipi_port_id { + MIPI_PORT0_ID = 0, + MIPI_PORT1_ID, + MIPI_PORT2_ID, + N_MIPI_PORT_ID +}; + +#define N_RX_CHANNEL_ID 4 + +/* Generic port enumeration with an internal port type ID */ +typedef enum { + CSI_PORT0_ID = 0, + CSI_PORT1_ID, + CSI_PORT2_ID, + TPG_PORT0_ID, + PRBS_PORT0_ID, + FIFO_PORT0_ID, + MEMORY_PORT0_ID, + N_INPUT_PORT_ID +} input_port_ID_t; + +typedef enum { + CAPTURE_UNIT0_ID = 0, + CAPTURE_UNIT1_ID, + CAPTURE_UNIT2_ID, + ACQUISITION_UNIT0_ID, + DMA_UNIT0_ID, + CTRL_UNIT0_ID, + GPREGS_UNIT0_ID, + FIFO_UNIT0_ID, + IRQ_UNIT0_ID, + N_SUB_SYSTEM_ID +} sub_system_ID_t; + +#define N_CAPTURE_UNIT_ID 3 +#define N_ACQUISITION_UNIT_ID 1 +#define N_CTRL_UNIT_ID 1 + +/* + * Input-buffer Controller. + */ +typedef enum { + IBUF_CTRL0_ID = 0, /* map to ISYS2401_IBUF_CNTRL_A */ + IBUF_CTRL1_ID, /* map to ISYS2401_IBUF_CNTRL_B */ + IBUF_CTRL2_ID, /* map ISYS2401_IBUF_CNTRL_C */ + N_IBUF_CTRL_ID +} ibuf_ctrl_ID_t; +/* end of Input-buffer Controller */ + +/* + * Stream2MMIO. + */ +typedef enum { + STREAM2MMIO0_ID = 0, /* map to ISYS2401_S2M_A */ + STREAM2MMIO1_ID, /* map to ISYS2401_S2M_B */ + STREAM2MMIO2_ID, /* map to ISYS2401_S2M_C */ + N_STREAM2MMIO_ID +} stream2mmio_ID_t; + +typedef enum { + /* + * Stream2MMIO 0 has 8 SIDs that are indexed by + * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID7_ID]. + * + * Stream2MMIO 1 has 4 SIDs that are indexed by + * [STREAM2MMIO_SID0_ID...TREAM2MMIO_SID3_ID]. + * + * Stream2MMIO 2 has 4 SIDs that are indexed by + * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID3_ID]. + */ + STREAM2MMIO_SID0_ID = 0, + STREAM2MMIO_SID1_ID, + STREAM2MMIO_SID2_ID, + STREAM2MMIO_SID3_ID, + STREAM2MMIO_SID4_ID, + STREAM2MMIO_SID5_ID, + STREAM2MMIO_SID6_ID, + STREAM2MMIO_SID7_ID, + N_STREAM2MMIO_SID_ID +} stream2mmio_sid_ID_t; +/* end of Stream2MMIO */ + +/** + * Input System 2401: CSI-MIPI recevier. + */ +typedef enum { + CSI_RX_BACKEND0_ID = 0, /* map to ISYS2401_MIPI_BE_A */ + CSI_RX_BACKEND1_ID, /* map to ISYS2401_MIPI_BE_B */ + CSI_RX_BACKEND2_ID, /* map to ISYS2401_MIPI_BE_C */ + N_CSI_RX_BACKEND_ID +} csi_rx_backend_ID_t; + +typedef enum { + CSI_RX_FRONTEND0_ID = 0, /* map to ISYS2401_CSI_RX_A */ + CSI_RX_FRONTEND1_ID, /* map to ISYS2401_CSI_RX_B */ + CSI_RX_FRONTEND2_ID, /* map to ISYS2401_CSI_RX_C */ +#define N_CSI_RX_FRONTEND_ID (CSI_RX_FRONTEND2_ID+1) +} csi_rx_frontend_ID_t; + +typedef enum { + CSI_RX_DLANE0_ID = 0, /* map to DLANE0 in CSI RX */ + CSI_RX_DLANE1_ID, /* map to DLANE1 in CSI RX */ + CSI_RX_DLANE2_ID, /* map to DLANE2 in CSI RX */ + CSI_RX_DLANE3_ID, /* map to DLANE3 in CSI RX */ + N_CSI_RX_DLANE_ID +} csi_rx_fe_dlane_ID_t; +/* end of CSI-MIPI receiver */ + +typedef enum { + ISYS2401_DMA0_ID = 0, + N_ISYS2401_DMA_ID +} isys2401_dma_ID_t; + +/** + * Pixel-generator. ("system_global.h") + */ +typedef enum { + PIXELGEN0_ID = 0, + PIXELGEN1_ID, + PIXELGEN2_ID, + N_PIXELGEN_ID +} pixelgen_ID_t; +/* end of pixel-generator. ("system_global.h") */ + +typedef enum { + INPUT_SYSTEM_CSI_PORT0_ID = 0, + INPUT_SYSTEM_CSI_PORT1_ID, + INPUT_SYSTEM_CSI_PORT2_ID, + + INPUT_SYSTEM_PIXELGEN_PORT0_ID, + INPUT_SYSTEM_PIXELGEN_PORT1_ID, + INPUT_SYSTEM_PIXELGEN_PORT2_ID, + + N_INPUT_SYSTEM_INPUT_PORT_ID +} input_system_input_port_ID_t; + +#define N_INPUT_SYSTEM_CSI_PORT 3 + +typedef enum { + ISYS2401_DMA_CHANNEL_0 = 0, + ISYS2401_DMA_CHANNEL_1, + ISYS2401_DMA_CHANNEL_2, + ISYS2401_DMA_CHANNEL_3, + ISYS2401_DMA_CHANNEL_4, + ISYS2401_DMA_CHANNEL_5, + ISYS2401_DMA_CHANNEL_6, + ISYS2401_DMA_CHANNEL_7, + ISYS2401_DMA_CHANNEL_8, + ISYS2401_DMA_CHANNEL_9, + ISYS2401_DMA_CHANNEL_10, + ISYS2401_DMA_CHANNEL_11, + N_ISYS2401_DMA_CHANNEL +} isys2401_dma_channel; + +enum ia_css_isp_memories { + IA_CSS_ISP_PMEM0 = 0, + IA_CSS_ISP_DMEM0, + IA_CSS_ISP_VMEM0, + IA_CSS_ISP_VAMEM0, + IA_CSS_ISP_VAMEM1, + IA_CSS_ISP_VAMEM2, + IA_CSS_ISP_HMEM0, + IA_CSS_SP_DMEM0, + IA_CSS_DDR, + N_IA_CSS_MEMORIES +}; +#define IA_CSS_NUM_MEMORIES 9 +/* For driver compatability */ +#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES +#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES + +#endif /* __SYSTEM_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c new file mode 100644 index 0000000000000..325b821f276cf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c @@ -0,0 +1,360 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_pipeline.h" +#include "ia_css_isp_configs.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_iterator( + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; + offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; + } + if (size) { + ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_copy_output( + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; + offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; + } + if (size) { + ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_crop( + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.crop.size; + offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; + } + if (size) { + ia_css_crop_config((struct sh_css_isp_crop_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_fpn( + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; + offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; + } + if (size) { + ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_dvs( + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; + offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; + } + if (size) { + ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_qplane( + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; + offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; + } + if (size) { + ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output0( + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output0.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; + } + if (size) { + ia_css_output0_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output1( + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output1.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; + } + if (size) { + ia_css_output1_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output( + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.output.size; + offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; + } + if (size) { + ia_css_output_config((struct sh_css_isp_output_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ +#ifdef ISP2401 + +void +ia_css_configure_sc( + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.sc.size; + offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; + } + if (size) { + ia_css_sc_config((struct sh_css_isp_sc_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ +#endif + +void +ia_css_configure_raw( + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.raw.size; + offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; + } + if (size) { + ia_css_raw_config((struct sh_css_isp_raw_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_tnr( + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; + offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; + } + if (size) { + ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_ref( + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.ref.size; + offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; + } + if (size) { + ia_css_ref_config((struct sh_css_isp_ref_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n"); +} + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_vf( + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); + + { + unsigned offset = 0; + unsigned size = 0; + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.vf.size; + offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; + } + if (size) { + ia_css_vf_config((struct sh_css_isp_vf_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h new file mode 100644 index 0000000000000..8aacd3dbc05a5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h @@ -0,0 +1,189 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifdef IA_CSS_INCLUDE_CONFIGURATIONS +#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" +#include "isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h" +#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" +#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" +#include "isp/kernels/output/output_1.0/ia_css_output.host.h" +#include "isp/kernels/qplane/qplane_2/ia_css_qplane.host.h" +#include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" +#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" +#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" +#ifdef ISP2401 +#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" +#endif +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" +#include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" +#include "isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h" +#endif /* IA_CSS_INCLUDE_CONFIGURATIONS */ +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_CONFIG_H +#define _IA_CSS_ISP_CONFIG_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_configuration_ids { + IA_CSS_ITERATOR_CONFIG_ID, + IA_CSS_COPY_OUTPUT_CONFIG_ID, + IA_CSS_CROP_CONFIG_ID, + IA_CSS_FPN_CONFIG_ID, + IA_CSS_DVS_CONFIG_ID, + IA_CSS_QPLANE_CONFIG_ID, + IA_CSS_OUTPUT0_CONFIG_ID, + IA_CSS_OUTPUT1_CONFIG_ID, + IA_CSS_OUTPUT_CONFIG_ID, +#ifdef ISP2401 + IA_CSS_SC_CONFIG_ID, +#endif + IA_CSS_RAW_CONFIG_ID, + IA_CSS_TNR_CONFIG_ID, + IA_CSS_REF_CONFIG_ID, + IA_CSS_VF_CONFIG_ID, + IA_CSS_NUM_CONFIGURATION_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_config_memory_offsets { + struct { + struct ia_css_isp_parameter iterator; + struct ia_css_isp_parameter copy_output; + struct ia_css_isp_parameter crop; + struct ia_css_isp_parameter fpn; + struct ia_css_isp_parameter dvs; + struct ia_css_isp_parameter qplane; + struct ia_css_isp_parameter output0; + struct ia_css_isp_parameter output1; + struct ia_css_isp_parameter output; +#ifdef ISP2401 + struct ia_css_isp_parameter sc; +#endif + struct ia_css_isp_parameter raw; + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter ref; + struct ia_css_isp_parameter vf; + } dmem; +}; + +#if defined(IA_CSS_INCLUDE_CONFIGURATIONS) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_iterator( + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_copy_output( + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_crop( + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_fpn( + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_dvs( + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_qplane( + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output0( + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output1( + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_output( + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +#ifdef ISP2401 +void +ia_css_configure_sc( + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +#endif +void +ia_css_configure_raw( + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_tnr( + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_ref( + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); + +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +void +ia_css_configure_vf( + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); + +#endif /* IA_CSS_INCLUDE_CONFIGURATION */ + +#endif /* _IA_CSS_ISP_CONFIG_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c new file mode 100644 index 0000000000000..11e4463ebb506 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c @@ -0,0 +1,3220 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#define IA_CSS_INCLUDE_PARAMETERS +#include "sh_css_params.h" +#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" +#include "isp/kernels/anr/anr_1.0/ia_css_anr.host.h" +#include "isp/kernels/anr/anr_2/ia_css_anr2.host.h" +#include "isp/kernels/bh/bh_2/ia_css_bh.host.h" +#include "isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h" +#include "isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h" +#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" +#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" +#include "isp/kernels/csc/csc_1.0/ia_css_csc.host.h" +#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h" +#include "isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h" +#include "isp/kernels/ctc/ctc2/ia_css_ctc2.host.h" +#include "isp/kernels/de/de_1.0/ia_css_de.host.h" +#include "isp/kernels/de/de_2/ia_css_de2.host.h" +#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" +#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" +#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" +#include "isp/kernels/gc/gc_1.0/ia_css_gc.host.h" +#include "isp/kernels/gc/gc_2/ia_css_gc2.host.h" +#include "isp/kernels/macc/macc_1.0/ia_css_macc.host.h" +#include "isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h" +#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" +#include "isp/kernels/ob/ob2/ia_css_ob2.host.h" +#include "isp/kernels/output/output_1.0/ia_css_output.host.h" +#include "isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h" +#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" +#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" +#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h" +#include "isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h" +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/uds/uds_1.0/ia_css_uds_param.h" +#include "isp/kernels/wb/wb_1.0/ia_css_wb.host.h" +#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h" +#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h" +#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" +#include "isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h" +#include "isp/kernels/fc/fc_1.0/ia_css_formats.host.h" +#include "isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h" +#include "isp/kernels/dpc2/ia_css_dpc2.host.h" +#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" +#include "isp/kernels/bnlm/ia_css_bnlm.host.h" +#include "isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h" +/* Generated code: do not edit or commmit. */ + +#include "ia_css_pipeline.h" +#include "ia_css_isp_params.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_aa( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + + if (size) { + struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + t->strength = params->aa_config.strength; + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_anr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); + + ia_css_anr_encode((struct sh_css_isp_anr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->anr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_anr2( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); + + ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->anr_thres, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bh( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); + + ia_css_bh_encode((struct sh_css_isp_bh_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_cnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); + + ia_css_cnr_encode((struct sh_css_isp_cnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_crop( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); + + ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->crop_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_csc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); + + ia_css_csc_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_dp( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); + + ia_css_dp_encode((struct sh_css_isp_dp_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dp_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); + + ia_css_bnr_encode((struct sh_css_isp_bnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_de( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); + + ia_css_de_encode((struct sh_css_isp_de_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->de_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ecd( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); + + ia_css_ecd_encode((struct sh_css_isp_ecd_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ecd_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_formats( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); + + ia_css_formats_encode((struct sh_css_isp_formats_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->formats_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_fpn( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); + + ia_css_fpn_encode((struct sh_css_isp_fpn_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fpn_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_gc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); + + ia_css_gc_encode((struct sh_css_isp_gc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->gc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); + + ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->gc_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ce( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); + + ia_css_ce_encode((struct sh_css_isp_ce_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ce_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_yuv2rgb( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); + + ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yuv2rgb_cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_rgb2yuv( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); + + ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->rgb2yuv_cc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_r_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); + + ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->r_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_g_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); + + ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->g_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_b_gamma( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); + + ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], + ¶ms->b_gamma_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_uds( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + + if (size) { + struct sh_css_sp_uds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); + + p = (struct sh_css_sp_uds_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + p->crop_pos = params->uds_config.crop_pos; + p->uds = params->uds_config.uds; + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_raa( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); + + ia_css_raa_encode((struct sh_css_isp_aa_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->raa_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_s3a( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); + + ia_css_s3a_encode((struct sh_css_isp_s3a_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ob( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); + + ia_css_ob_encode((struct sh_css_isp_ob_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ob_config, +¶ms->stream_configs.ob, size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); + + ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->ob_config, +¶ms->stream_configs.ob, size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_output( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); + + ia_css_output_encode((struct sh_css_isp_output_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->output_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); + + ia_css_sc_encode((struct sh_css_isp_sc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->sc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_bds( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + + if (size) { + struct sh_css_isp_bds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); + + p = (struct sh_css_isp_bds_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + p->baf_strength = params->bds_config.strength; + + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_tnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); + + ia_css_tnr_encode((struct sh_css_isp_tnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->tnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_macc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); + + ia_css_macc_encode((struct sh_css_isp_macc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->macc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_horicoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); + + ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_vertcoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); + + ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_horiproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); + + ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis_vertproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); + + ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_horicoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); + + ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_vertcoef( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); + + ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_horiproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); + + ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_sdis2_vertproj( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); + + ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_wb( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); + + ia_css_wb_encode((struct sh_css_isp_wb_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->wb_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_nr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); + + ia_css_nr_encode((struct sh_css_isp_ynr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_yee( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); + + ia_css_yee_encode((struct sh_css_isp_yee_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yee_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ynr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); + + ia_css_ynr_encode((struct sh_css_isp_yee2_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ynr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_fc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); + + ia_css_fc_encode((struct sh_css_isp_fc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_ctc( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + + ia_css_ctc_encode((struct sh_css_isp_ctc_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ctc_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + } + + } + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + + ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->ctc_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr_table( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); + + ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->xnr_table, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); + + ia_css_xnr_encode((struct sh_css_isp_xnr_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); + } + + } +} + +/* Code generated by genparam/gencode.c:gen_process_function() */ + +static void +ia_css_process_xnr3( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + + ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr3_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + } + + } +#ifdef ISP2401 + { + unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + + if (size) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + + ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->xnr3_config, +size); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + } + + } +#endif +} + +/* Code generated by genparam/gencode.c:gen_param_process_table() */ + +void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) = { + ia_css_process_aa, + ia_css_process_anr, + ia_css_process_anr2, + ia_css_process_bh, + ia_css_process_cnr, + ia_css_process_crop, + ia_css_process_csc, + ia_css_process_dp, + ia_css_process_bnr, + ia_css_process_de, + ia_css_process_ecd, + ia_css_process_formats, + ia_css_process_fpn, + ia_css_process_gc, + ia_css_process_ce, + ia_css_process_yuv2rgb, + ia_css_process_rgb2yuv, + ia_css_process_r_gamma, + ia_css_process_g_gamma, + ia_css_process_b_gamma, + ia_css_process_uds, + ia_css_process_raa, + ia_css_process_s3a, + ia_css_process_ob, + ia_css_process_output, + ia_css_process_sc, + ia_css_process_bds, + ia_css_process_tnr, + ia_css_process_macc, + ia_css_process_sdis_horicoef, + ia_css_process_sdis_vertcoef, + ia_css_process_sdis_horiproj, + ia_css_process_sdis_vertproj, + ia_css_process_sdis2_horicoef, + ia_css_process_sdis2_vertcoef, + ia_css_process_sdis2_horiproj, + ia_css_process_sdis2_vertproj, + ia_css_process_wb, + ia_css_process_nr, + ia_css_process_yee, + ia_css_process_ynr, + ia_css_process_fc, + ia_css_process_ctc, + ia_css_process_xnr_table, + ia_css_process_xnr, + ia_css_process_xnr3, +}; + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_dp_config(const struct ia_css_isp_parameters *params, + struct ia_css_dp_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: " + "config=%p\n",config); + + *config = params->dp_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() leave\n"); + ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_dp_config(struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); + ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dp_config = *config; + params->config_changed[IA_CSS_DP_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_DP_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_wb_config(const struct ia_css_isp_parameters *params, + struct ia_css_wb_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: " + "config=%p\n",config); + + *config = params->wb_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() leave\n"); + ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_wb_config(struct ia_css_isp_parameters *params, + const struct ia_css_wb_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); + ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->wb_config = *config; + params->config_changed[IA_CSS_WB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_WB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_tnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: " + "config=%p\n",config); + + *config = params->tnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() leave\n"); + ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_tnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_tnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); + ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->tnr_config = *config; + params->config_changed[IA_CSS_TNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_TNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ob_config(const struct ia_css_isp_parameters *params, + struct ia_css_ob_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: " + "config=%p\n",config); + + *config = params->ob_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() leave\n"); + ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ob_config(struct ia_css_isp_parameters *params, + const struct ia_css_ob_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); + ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ob_config = *config; + params->config_changed[IA_CSS_OB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_OB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_de_config(const struct ia_css_isp_parameters *params, + struct ia_css_de_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: " + "config=%p\n",config); + + *config = params->de_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() leave\n"); + ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_de_config(struct ia_css_isp_parameters *params, + const struct ia_css_de_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); + ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->de_config = *config; + params->config_changed[IA_CSS_DE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_DE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_anr_config(const struct ia_css_isp_parameters *params, + struct ia_css_anr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: " + "config=%p\n",config); + + *config = params->anr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() leave\n"); + ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); + ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->anr_config = *config; + params->config_changed[IA_CSS_ANR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ANR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, + struct ia_css_anr_thres *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: " + "config=%p\n",config); + + *config = params->anr_thres; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() leave\n"); + ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr2_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_thres *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); + ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->anr_thres = *config; + params->config_changed[IA_CSS_ANR2_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ANR2_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ce_config(const struct ia_css_isp_parameters *params, + struct ia_css_ce_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: " + "config=%p\n",config); + + *config = params->ce_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() leave\n"); + ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ce_config(struct ia_css_isp_parameters *params, + const struct ia_css_ce_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); + ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ce_config = *config; + params->config_changed[IA_CSS_CE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, + struct ia_css_ecd_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: " + "config=%p\n",config); + + *config = params->ecd_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() leave\n"); + ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ecd_config(struct ia_css_isp_parameters *params, + const struct ia_css_ecd_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); + ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ecd_config = *config; + params->config_changed[IA_CSS_ECD_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_ECD_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, + struct ia_css_ynr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: " + "config=%p\n",config); + + *config = params->ynr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() leave\n"); + ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ynr_config(struct ia_css_isp_parameters *params, + const struct ia_css_ynr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); + ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ynr_config = *config; + params->config_changed[IA_CSS_YNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_YNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_fc_config(const struct ia_css_isp_parameters *params, + struct ia_css_fc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: " + "config=%p\n",config); + + *config = params->fc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() leave\n"); + ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_fc_config(struct ia_css_isp_parameters *params, + const struct ia_css_fc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); + ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->fc_config = *config; + params->config_changed[IA_CSS_FC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_FC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_cnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: " + "config=%p\n",config); + + *config = params->cnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() leave\n"); + ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_cnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_cnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); + ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->cnr_config = *config; + params->config_changed[IA_CSS_CNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_macc_config(const struct ia_css_isp_parameters *params, + struct ia_css_macc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: " + "config=%p\n",config); + + *config = params->macc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() leave\n"); + ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_macc_config(struct ia_css_isp_parameters *params, + const struct ia_css_macc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); + ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->macc_config = *config; + params->config_changed[IA_CSS_MACC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_MACC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, + struct ia_css_ctc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: " + "config=%p\n",config); + + *config = params->ctc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() leave\n"); + ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ctc_config(struct ia_css_isp_parameters *params, + const struct ia_css_ctc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); + ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->ctc_config = *config; + params->config_changed[IA_CSS_CTC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CTC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_aa_config(const struct ia_css_isp_parameters *params, + struct ia_css_aa_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: " + "config=%p\n",config); + + *config = params->aa_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() leave\n"); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_aa_config(struct ia_css_isp_parameters *params, + const struct ia_css_aa_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); + params->aa_config = *config; + params->config_changed[IA_CSS_AA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_AA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: " + "config=%p\n",config); + + *config = params->yuv2rgb_cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() leave\n"); + ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); + ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->yuv2rgb_cc_config = *config; + params->config_changed[IA_CSS_YUV2RGB_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_YUV2RGB_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: " + "config=%p\n",config); + + *config = params->rgb2yuv_cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() leave\n"); + ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); + ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->rgb2yuv_cc_config = *config; + params->config_changed[IA_CSS_RGB2YUV_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_RGB2YUV_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_csc_config(const struct ia_css_isp_parameters *params, + struct ia_css_cc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: " + "config=%p\n",config); + + *config = params->cc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() leave\n"); + ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_csc_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); + ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->cc_config = *config; + params->config_changed[IA_CSS_CSC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_CSC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_nr_config(const struct ia_css_isp_parameters *params, + struct ia_css_nr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: " + "config=%p\n",config); + + *config = params->nr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() leave\n"); + ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_nr_config(struct ia_css_isp_parameters *params, + const struct ia_css_nr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); + ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->nr_config = *config; + params->config_changed[IA_CSS_BNR_ID] = true; + params->config_changed[IA_CSS_NR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_NR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_gc_config(const struct ia_css_isp_parameters *params, + struct ia_css_gc_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: " + "config=%p\n",config); + + *config = params->gc_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() leave\n"); + ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_gc_config(struct ia_css_isp_parameters *params, + const struct ia_css_gc_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); + ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->gc_config = *config; + params->config_changed[IA_CSS_GC_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_GC_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() leave\n"); + ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); + ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() leave\n"); + ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); + ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() leave\n"); + ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); + ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() leave\n"); + ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); + ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs_coefs = *config; + params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() leave\n"); + ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); + ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() leave\n"); + ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); + ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() leave\n"); + ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); + ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, + struct ia_css_dvs2_coefficients *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: " + "config=%p\n",config); + + *config = params->dvs2_coefs; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() leave\n"); + ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); + ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->dvs2_coefs = *config; + params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; + params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: " + "config=%p\n",config); + + *config = params->r_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() leave\n"); + ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); + ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->r_gamma_table = *config; + params->config_changed[IA_CSS_R_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_R_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: " + "config=%p\n",config); + + *config = params->g_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() leave\n"); + ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); + ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->g_gamma_table = *config; + params->config_changed[IA_CSS_G_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_G_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, + struct ia_css_rgb_gamma_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: " + "config=%p\n",config); + + *config = params->b_gamma_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() leave\n"); + ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); + ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->b_gamma_table = *config; + params->config_changed[IA_CSS_B_GAMMA_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_B_GAMMA_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr_table *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: " + "config=%p\n",config); + + *config = params->xnr_table; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() leave\n"); + ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_table *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); + ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr_table = *config; + params->config_changed[IA_CSS_XNR_TABLE_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR_TABLE_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_formats_config(const struct ia_css_isp_parameters *params, + struct ia_css_formats_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: " + "config=%p\n",config); + + *config = params->formats_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() leave\n"); + ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_formats_config(struct ia_css_isp_parameters *params, + const struct ia_css_formats_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); + ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->formats_config = *config; + params->config_changed[IA_CSS_FORMATS_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_FORMATS_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: " + "config=%p\n",config); + + *config = params->xnr_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() leave\n"); + ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); + ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr_config = *config; + params->config_changed[IA_CSS_XNR_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, + struct ia_css_xnr3_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: " + "config=%p\n",config); + + *config = params->xnr3_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() leave\n"); + ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr3_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); + ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->xnr3_config = *config; + params->config_changed[IA_CSS_XNR3_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_XNR3_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, + struct ia_css_3a_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: " + "config=%p\n",config); + + *config = params->s3a_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() leave\n"); + ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_s3a_config(struct ia_css_isp_parameters *params, + const struct ia_css_3a_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); + ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->s3a_config = *config; + params->config_changed[IA_CSS_BH_ID] = true; + params->config_changed[IA_CSS_S3A_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_S3A_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_get_function() */ + +static void +ia_css_get_output_config(const struct ia_css_isp_parameters *params, + struct ia_css_output_config *config){ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: " + "config=%p\n",config); + + *config = params->output_config; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() leave\n"); + ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); +} + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_output_config(struct ia_css_isp_parameters *params, + const struct ia_css_output_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); + ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); + params->output_config = *config; + params->config_changed[IA_CSS_OUTPUT_ID] = true; +#ifndef ISP2401 + params->config_changed[IA_CSS_OUTPUT_ID] = true; + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: " + "return_void\n"); +} + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_get_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +{ + ia_css_get_dp_config(params, config->dp_config); + ia_css_get_wb_config(params, config->wb_config); + ia_css_get_tnr_config(params, config->tnr_config); + ia_css_get_ob_config(params, config->ob_config); + ia_css_get_de_config(params, config->de_config); + ia_css_get_anr_config(params, config->anr_config); + ia_css_get_anr2_config(params, config->anr_thres); + ia_css_get_ce_config(params, config->ce_config); + ia_css_get_ecd_config(params, config->ecd_config); + ia_css_get_ynr_config(params, config->ynr_config); + ia_css_get_fc_config(params, config->fc_config); + ia_css_get_cnr_config(params, config->cnr_config); + ia_css_get_macc_config(params, config->macc_config); + ia_css_get_ctc_config(params, config->ctc_config); + ia_css_get_aa_config(params, config->aa_config); + ia_css_get_yuv2rgb_config(params, config->yuv2rgb_cc_config); + ia_css_get_rgb2yuv_config(params, config->rgb2yuv_cc_config); + ia_css_get_csc_config(params, config->cc_config); + ia_css_get_nr_config(params, config->nr_config); + ia_css_get_gc_config(params, config->gc_config); + ia_css_get_sdis_horicoef_config(params, config->dvs_coefs); + ia_css_get_sdis_vertcoef_config(params, config->dvs_coefs); + ia_css_get_sdis_horiproj_config(params, config->dvs_coefs); + ia_css_get_sdis_vertproj_config(params, config->dvs_coefs); + ia_css_get_sdis2_horicoef_config(params, config->dvs2_coefs); + ia_css_get_sdis2_vertcoef_config(params, config->dvs2_coefs); + ia_css_get_sdis2_horiproj_config(params, config->dvs2_coefs); + ia_css_get_sdis2_vertproj_config(params, config->dvs2_coefs); + ia_css_get_r_gamma_config(params, config->r_gamma_table); + ia_css_get_g_gamma_config(params, config->g_gamma_table); + ia_css_get_b_gamma_config(params, config->b_gamma_table); + ia_css_get_xnr_table_config(params, config->xnr_table); + ia_css_get_formats_config(params, config->formats_config); + ia_css_get_xnr_config(params, config->xnr_config); + ia_css_get_xnr3_config(params, config->xnr3_config); + ia_css_get_s3a_config(params, config->s3a_config); + ia_css_get_output_config(params, config->output_config); +} + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_set_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +{ + ia_css_set_dp_config(params, config->dp_config); + ia_css_set_wb_config(params, config->wb_config); + ia_css_set_tnr_config(params, config->tnr_config); + ia_css_set_ob_config(params, config->ob_config); + ia_css_set_de_config(params, config->de_config); + ia_css_set_anr_config(params, config->anr_config); + ia_css_set_anr2_config(params, config->anr_thres); + ia_css_set_ce_config(params, config->ce_config); + ia_css_set_ecd_config(params, config->ecd_config); + ia_css_set_ynr_config(params, config->ynr_config); + ia_css_set_fc_config(params, config->fc_config); + ia_css_set_cnr_config(params, config->cnr_config); + ia_css_set_macc_config(params, config->macc_config); + ia_css_set_ctc_config(params, config->ctc_config); + ia_css_set_aa_config(params, config->aa_config); + ia_css_set_yuv2rgb_config(params, config->yuv2rgb_cc_config); + ia_css_set_rgb2yuv_config(params, config->rgb2yuv_cc_config); + ia_css_set_csc_config(params, config->cc_config); + ia_css_set_nr_config(params, config->nr_config); + ia_css_set_gc_config(params, config->gc_config); + ia_css_set_sdis_horicoef_config(params, config->dvs_coefs); + ia_css_set_sdis_vertcoef_config(params, config->dvs_coefs); + ia_css_set_sdis_horiproj_config(params, config->dvs_coefs); + ia_css_set_sdis_vertproj_config(params, config->dvs_coefs); + ia_css_set_sdis2_horicoef_config(params, config->dvs2_coefs); + ia_css_set_sdis2_vertcoef_config(params, config->dvs2_coefs); + ia_css_set_sdis2_horiproj_config(params, config->dvs2_coefs); + ia_css_set_sdis2_vertproj_config(params, config->dvs2_coefs); + ia_css_set_r_gamma_config(params, config->r_gamma_table); + ia_css_set_g_gamma_config(params, config->g_gamma_table); + ia_css_set_b_gamma_config(params, config->b_gamma_table); + ia_css_set_xnr_table_config(params, config->xnr_table); + ia_css_set_formats_config(params, config->formats_config); + ia_css_set_xnr_config(params, config->xnr_config); + ia_css_set_xnr3_config(params, config->xnr3_config); + ia_css_set_s3a_config(params, config->s3a_config); + ia_css_set_output_config(params, config->output_config); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h new file mode 100644 index 0000000000000..5b3deb7f74aec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h @@ -0,0 +1,399 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_PARAM_H +#define _IA_CSS_ISP_PARAM_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_parameter_ids { + IA_CSS_AA_ID, + IA_CSS_ANR_ID, + IA_CSS_ANR2_ID, + IA_CSS_BH_ID, + IA_CSS_CNR_ID, + IA_CSS_CROP_ID, + IA_CSS_CSC_ID, + IA_CSS_DP_ID, + IA_CSS_BNR_ID, + IA_CSS_DE_ID, + IA_CSS_ECD_ID, + IA_CSS_FORMATS_ID, + IA_CSS_FPN_ID, + IA_CSS_GC_ID, + IA_CSS_CE_ID, + IA_CSS_YUV2RGB_ID, + IA_CSS_RGB2YUV_ID, + IA_CSS_R_GAMMA_ID, + IA_CSS_G_GAMMA_ID, + IA_CSS_B_GAMMA_ID, + IA_CSS_UDS_ID, + IA_CSS_RAA_ID, + IA_CSS_S3A_ID, + IA_CSS_OB_ID, + IA_CSS_OUTPUT_ID, + IA_CSS_SC_ID, + IA_CSS_BDS_ID, + IA_CSS_TNR_ID, + IA_CSS_MACC_ID, + IA_CSS_SDIS_HORICOEF_ID, + IA_CSS_SDIS_VERTCOEF_ID, + IA_CSS_SDIS_HORIPROJ_ID, + IA_CSS_SDIS_VERTPROJ_ID, + IA_CSS_SDIS2_HORICOEF_ID, + IA_CSS_SDIS2_VERTCOEF_ID, + IA_CSS_SDIS2_HORIPROJ_ID, + IA_CSS_SDIS2_VERTPROJ_ID, + IA_CSS_WB_ID, + IA_CSS_NR_ID, + IA_CSS_YEE_ID, + IA_CSS_YNR_ID, + IA_CSS_FC_ID, + IA_CSS_CTC_ID, + IA_CSS_XNR_TABLE_ID, + IA_CSS_XNR_ID, + IA_CSS_XNR3_ID, + IA_CSS_NUM_PARAMETER_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_memory_offsets { + struct { + struct ia_css_isp_parameter aa; + struct ia_css_isp_parameter anr; + struct ia_css_isp_parameter bh; + struct ia_css_isp_parameter cnr; + struct ia_css_isp_parameter crop; + struct ia_css_isp_parameter csc; + struct ia_css_isp_parameter dp; + struct ia_css_isp_parameter bnr; + struct ia_css_isp_parameter de; + struct ia_css_isp_parameter ecd; + struct ia_css_isp_parameter formats; + struct ia_css_isp_parameter fpn; + struct ia_css_isp_parameter gc; + struct ia_css_isp_parameter ce; + struct ia_css_isp_parameter yuv2rgb; + struct ia_css_isp_parameter rgb2yuv; + struct ia_css_isp_parameter uds; + struct ia_css_isp_parameter raa; + struct ia_css_isp_parameter s3a; + struct ia_css_isp_parameter ob; + struct ia_css_isp_parameter output; + struct ia_css_isp_parameter sc; + struct ia_css_isp_parameter bds; + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter macc; + struct ia_css_isp_parameter sdis_horiproj; + struct ia_css_isp_parameter sdis_vertproj; + struct ia_css_isp_parameter sdis2_horiproj; + struct ia_css_isp_parameter sdis2_vertproj; + struct ia_css_isp_parameter wb; + struct ia_css_isp_parameter nr; + struct ia_css_isp_parameter yee; + struct ia_css_isp_parameter ynr; + struct ia_css_isp_parameter fc; + struct ia_css_isp_parameter ctc; + struct ia_css_isp_parameter xnr; + struct ia_css_isp_parameter xnr3; + struct ia_css_isp_parameter get; + struct ia_css_isp_parameter put; + } dmem; + struct { + struct ia_css_isp_parameter anr2; + struct ia_css_isp_parameter ob; + struct ia_css_isp_parameter sdis_horicoef; + struct ia_css_isp_parameter sdis_vertcoef; + struct ia_css_isp_parameter sdis2_horicoef; + struct ia_css_isp_parameter sdis2_vertcoef; +#ifdef ISP2401 + struct ia_css_isp_parameter xnr3; +#endif + } vmem; + struct { + struct ia_css_isp_parameter bh; + } hmem0; + struct { + struct ia_css_isp_parameter gc; + struct ia_css_isp_parameter g_gamma; + struct ia_css_isp_parameter xnr_table; + } vamem1; + struct { + struct ia_css_isp_parameter r_gamma; + struct ia_css_isp_parameter ctc; + } vamem0; + struct { + struct ia_css_isp_parameter b_gamma; + } vamem2; +}; + +#if defined(IA_CSS_INCLUDE_PARAMETERS) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/gencode.c:gen_param_process_table() */ + +struct ia_css_pipeline_stage; /* forward declaration */ + +extern void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_dp_config(struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_wb_config(struct ia_css_isp_parameters *params, + const struct ia_css_wb_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_tnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_tnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ob_config(struct ia_css_isp_parameters *params, + const struct ia_css_ob_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_de_config(struct ia_css_isp_parameters *params, + const struct ia_css_de_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_anr2_config(struct ia_css_isp_parameters *params, + const struct ia_css_anr_thres *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ce_config(struct ia_css_isp_parameters *params, + const struct ia_css_ce_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ecd_config(struct ia_css_isp_parameters *params, + const struct ia_css_ecd_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ynr_config(struct ia_css_isp_parameters *params, + const struct ia_css_ynr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_fc_config(struct ia_css_isp_parameters *params, + const struct ia_css_fc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_cnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_cnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_macc_config(struct ia_css_isp_parameters *params, + const struct ia_css_macc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_ctc_config(struct ia_css_isp_parameters *params, + const struct ia_css_ctc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_aa_config(struct ia_css_isp_parameters *params, + const struct ia_css_aa_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_csc_config(struct ia_css_isp_parameters *params, + const struct ia_css_cc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_nr_config(struct ia_css_isp_parameters *params, + const struct ia_css_nr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_gc_config(struct ia_css_isp_parameters *params, + const struct ia_css_gc_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, + const struct ia_css_rgb_gamma_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_table *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_formats_config(struct ia_css_isp_parameters *params, + const struct ia_css_formats_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, + const struct ia_css_xnr3_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_s3a_config(struct ia_css_isp_parameters *params, + const struct ia_css_3a_config *config); + +/* Code generated by genparam/gencode.c:gen_set_function() */ + +void +ia_css_set_output_config(struct ia_css_isp_parameters *params, + const struct ia_css_output_config *config); + +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_get_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +; +#ifdef ISP2401 + +#endif +/* Code generated by genparam/gencode.c:gen_global_access_function() */ + +void +ia_css_set_configs(struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config) +; +#ifdef ISP2401 + +#endif +#endif /* IA_CSS_INCLUDE_PARAMETER */ + +#endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c new file mode 100644 index 0000000000000..e87d05bc73ae8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c @@ -0,0 +1,214 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Generated code: do not edit or commmit. */ + +#include "ia_css_pipeline.h" +#include "ia_css_isp_states.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_aa_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.aa.size; + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; + + if (size) + memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_cnr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; + + if (size) { + ia_css_init_cnr_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_cnr2_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; + + if (size) { + ia_css_init_cnr2_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_dp_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.dp.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; + + if (size) { + ia_css_init_dp_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_de_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.de.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; + + if (size) { + ia_css_init_de_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_tnr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; + + if (size) { + ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_ref_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->dmem.ref.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; + + if (size) { + ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_init_function() */ + +static void +ia_css_initialize_ynr_state( + const struct ia_css_binary *binary) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); + + { + unsigned size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; + + unsigned offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; + + if (size) { + ia_css_init_ynr_state( + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); + } + + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); +} + +/* Code generated by genparam/genstate.c:gen_state_init_table() */ + +void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = { + ia_css_initialize_aa_state, + ia_css_initialize_cnr_state, + ia_css_initialize_cnr2_state, + ia_css_initialize_dp_state, + ia_css_initialize_de_state, + ia_css_initialize_tnr_state, + ia_css_initialize_ref_state, + ia_css_initialize_ynr_state, +}; + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h new file mode 100644 index 0000000000000..732adafb0a633 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h @@ -0,0 +1,72 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#define IA_CSS_INCLUDE_STATES +#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" +#include "isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h" +#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" +#include "isp/kernels/de/de_1.0/ia_css_de.host.h" +#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" +#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" +#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" +#include "isp/kernels/dpc2/ia_css_dpc2.host.h" +#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" +/* Generated code: do not edit or commmit. */ + +#ifndef _IA_CSS_ISP_STATE_H +#define _IA_CSS_ISP_STATE_H + +/* Code generated by genparam/gencode.c:gen_param_enum() */ + +enum ia_css_state_ids { + IA_CSS_AA_STATE_ID, + IA_CSS_CNR_STATE_ID, + IA_CSS_CNR2_STATE_ID, + IA_CSS_DP_STATE_ID, + IA_CSS_DE_STATE_ID, + IA_CSS_TNR_STATE_ID, + IA_CSS_REF_STATE_ID, + IA_CSS_YNR_STATE_ID, + IA_CSS_NUM_STATE_IDS +}; + +/* Code generated by genparam/gencode.c:gen_param_offsets() */ + +struct ia_css_state_memory_offsets { + struct { + struct ia_css_isp_parameter aa; + struct ia_css_isp_parameter cnr; + struct ia_css_isp_parameter cnr2; + struct ia_css_isp_parameter dp; + struct ia_css_isp_parameter de; + struct ia_css_isp_parameter ynr; + } vmem; + struct { + struct ia_css_isp_parameter tnr; + struct ia_css_isp_parameter ref; + } dmem; +}; + +#if defined(IA_CSS_INCLUDE_STATES) + +#include "ia_css_stream.h" /* struct ia_css_stream */ +#include "ia_css_binary.h" /* struct ia_css_binary */ +/* Code generated by genparam/genstate.c:gen_state_init_table() */ + +extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary); + +#endif /* IA_CSS_INCLUDE_STATE */ + +#endif /* _IA_CSS_ISP_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h new file mode 100644 index 0000000000000..e71e33d9d1434 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h @@ -0,0 +1,104 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_BITS_H +#define _HRT_BITS_H + +#include "defs.h" + +#define _hrt_ones(n) HRTCAT(_hrt_ones_, n) +#define _hrt_ones_0x0 0x00000000U +#define _hrt_ones_0x1 0x00000001U +#define _hrt_ones_0x2 0x00000003U +#define _hrt_ones_0x3 0x00000007U +#define _hrt_ones_0x4 0x0000000FU +#define _hrt_ones_0x5 0x0000001FU +#define _hrt_ones_0x6 0x0000003FU +#define _hrt_ones_0x7 0x0000007FU +#define _hrt_ones_0x8 0x000000FFU +#define _hrt_ones_0x9 0x000001FFU +#define _hrt_ones_0xA 0x000003FFU +#define _hrt_ones_0xB 0x000007FFU +#define _hrt_ones_0xC 0x00000FFFU +#define _hrt_ones_0xD 0x00001FFFU +#define _hrt_ones_0xE 0x00003FFFU +#define _hrt_ones_0xF 0x00007FFFU +#define _hrt_ones_0x10 0x0000FFFFU +#define _hrt_ones_0x11 0x0001FFFFU +#define _hrt_ones_0x12 0x0003FFFFU +#define _hrt_ones_0x13 0x0007FFFFU +#define _hrt_ones_0x14 0x000FFFFFU +#define _hrt_ones_0x15 0x001FFFFFU +#define _hrt_ones_0x16 0x003FFFFFU +#define _hrt_ones_0x17 0x007FFFFFU +#define _hrt_ones_0x18 0x00FFFFFFU +#define _hrt_ones_0x19 0x01FFFFFFU +#define _hrt_ones_0x1A 0x03FFFFFFU +#define _hrt_ones_0x1B 0x07FFFFFFU +#define _hrt_ones_0x1C 0x0FFFFFFFU +#define _hrt_ones_0x1D 0x1FFFFFFFU +#define _hrt_ones_0x1E 0x3FFFFFFFU +#define _hrt_ones_0x1F 0x7FFFFFFFU +#define _hrt_ones_0x20 0xFFFFFFFFU + +#define _hrt_ones_0 _hrt_ones_0x0 +#define _hrt_ones_1 _hrt_ones_0x1 +#define _hrt_ones_2 _hrt_ones_0x2 +#define _hrt_ones_3 _hrt_ones_0x3 +#define _hrt_ones_4 _hrt_ones_0x4 +#define _hrt_ones_5 _hrt_ones_0x5 +#define _hrt_ones_6 _hrt_ones_0x6 +#define _hrt_ones_7 _hrt_ones_0x7 +#define _hrt_ones_8 _hrt_ones_0x8 +#define _hrt_ones_9 _hrt_ones_0x9 +#define _hrt_ones_10 _hrt_ones_0xA +#define _hrt_ones_11 _hrt_ones_0xB +#define _hrt_ones_12 _hrt_ones_0xC +#define _hrt_ones_13 _hrt_ones_0xD +#define _hrt_ones_14 _hrt_ones_0xE +#define _hrt_ones_15 _hrt_ones_0xF +#define _hrt_ones_16 _hrt_ones_0x10 +#define _hrt_ones_17 _hrt_ones_0x11 +#define _hrt_ones_18 _hrt_ones_0x12 +#define _hrt_ones_19 _hrt_ones_0x13 +#define _hrt_ones_20 _hrt_ones_0x14 +#define _hrt_ones_21 _hrt_ones_0x15 +#define _hrt_ones_22 _hrt_ones_0x16 +#define _hrt_ones_23 _hrt_ones_0x17 +#define _hrt_ones_24 _hrt_ones_0x18 +#define _hrt_ones_25 _hrt_ones_0x19 +#define _hrt_ones_26 _hrt_ones_0x1A +#define _hrt_ones_27 _hrt_ones_0x1B +#define _hrt_ones_28 _hrt_ones_0x1C +#define _hrt_ones_29 _hrt_ones_0x1D +#define _hrt_ones_30 _hrt_ones_0x1E +#define _hrt_ones_31 _hrt_ones_0x1F +#define _hrt_ones_32 _hrt_ones_0x20 + +#define _hrt_mask(b, n) \ + (_hrt_ones(n) << (b)) +#define _hrt_get_bits(w, b, n) \ + (((w) >> (b)) & _hrt_ones(n)) +#define _hrt_set_bits(w, b, n, v) \ + (((w) & ~_hrt_mask(b, n)) | (((v) & _hrt_ones(n)) << (b))) +#define _hrt_get_bit(w, b) \ + (((w) >> (b)) & 1) +#define _hrt_set_bit(w, b, v) \ + (((w) & (~(1 << (b)))) | (((v)&1) << (b))) +#define _hrt_set_lower_half(w, v) \ + _hrt_set_bits(w, 0, 16, v) +#define _hrt_set_upper_half(w, v) \ + _hrt_set_bits(w, 16, 16, v) + +#endif /* _HRT_BITS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h new file mode 100644 index 0000000000000..b5756bfe8eb6b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _cell_params_h +#define _cell_params_h + +#define SP_PMEM_LOG_WIDTH_BITS 6 /*Width of PC, 64 bits, 8 bytes*/ +#define SP_ICACHE_TAG_BITS 4 /*size of tag*/ +#define SP_ICACHE_SET_BITS 8 /* 256 sets*/ +#define SP_ICACHE_BLOCKS_PER_SET_BITS 1 /* 2 way associative*/ +#define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ + +#define SP_ICACHE_ADDRESS_BITS \ + (SP_ICACHE_TAG_BITS+SP_ICACHE_BLOCK_ADDRESS_BITS) + +#define SP_PMEM_DEPTH (1< input_selector*/ +/* !! Changes here should be copied to systems/isp/isp_css/bin/conv_transmitter_cmd.tcl !! */ +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB888 0 // 36 'h24 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB555 1 // 33 'h +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB444 2 // 32 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB565 3 // 34 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB666 4 // 35 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW10 6 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW6 7 // 40 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW7 8 // 41 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW12 9 // 43 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW14 10 // 45 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8 11 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10 12 // 25 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_8 13 // 30 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_10 14 // 31 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_1 15 // 48 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8L 16 // 26 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_Emb 17 // 18 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_2 18 // 49 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_3 19 // 50 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_4 20 // 51 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_5 21 // 52 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_6 22 // 53 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_7 23 // 54 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_8 24 // 55 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8_CSPS 25 // 28 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10_CSPS 26 // 29 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW16 27 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18 28 // ? +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_2 29 // ? Option 2 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_3 30 // ? Option 3 for depacketiser +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding + +/* definition for state machine of data FIFO for decode different type of data */ +#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV420_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_YUV420_8L_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV422_10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB555_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB565_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 +#define _HRT_CSS_RECEIVER_2400_RGB888_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW6_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW7_REPEAT_PTN 7 +#define _HRT_CSS_RECEIVER_2400_RAW8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_RAW10_REPEAT_PTN 5 +#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW14_REPEAT_PTN 7 + +#define _HRT_CSS_RECEIVER_2400_MAX_REPEAT_PTN _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_WIDTH 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_IDX 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_WIDTH 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_USD_BITS 4 /* bits per USD type */ + +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_EN_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_EN_IDX 8 + +#define _HRT_CSS_RECEIVER_2400_BE_COMP_NO_COMP 0 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_6_10 1 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_7_10 2 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_8_10 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_6_12 4 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_7_12 5 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_8_12 6 + + +/* packet bit definition */ +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_IDX 32 +#define _HRT_CSS_RECEIVER_2400_PKT_SOP_BITS 1 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_IDX 22 +#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_BITS 2 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_IDX 16 +#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_BITS 16 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_IDX 0 +#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_BITS 32 + + +/*************************************************************************************************/ +/* Custom Decoding */ +/* These Custom Defs are defined based on design-time config in "csi_be_pixel_formatter.chdl" !! */ +/*************************************************************************************************/ +#define BE_CUST_EN_IDX 0 /* 2bits */ +#define BE_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ +#define BE_CUST_EN_WIDTH 8 +#define BE_CUST_MODE_ALL 1 /* Enable Custom Decoding for all DATA IDs */ +#define BE_CUST_MODE_ONE 3 /* Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID */ + +/* Data State config = {get_bits(6bits), valid(1bit)} */ +#define BE_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ +#define BE_CUST_DATA_STATE_S1_IDX 7 /* 7bits */ +#define BE_CUST_DATA_STATE_S2_IDX 14 /* 7bits */ +#define BE_CUST_DATA_STATE_WIDTH 21 +#define BE_CUST_DATA_STATE_VALID_IDX 0 /* 1bits */ +#define BE_CUST_DATA_STATE_GETBITS_IDX 1 /* 6bits */ + +/* Pixel Extractor config */ +#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 /* 5bits */ +#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 5 /* 5bits */ +#define BE_CUST_PIX_EXT_PIX_MASK_IDX 10 /* 18bits */ +#define BE_CUST_PIX_EXT_PIX_EN_IDX 28 /* 1bits */ +#define BE_CUST_PIX_EXT_WIDTH 29 + +/* Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} */ +#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 /* 4bits */ +#define BE_CUST_PIX_VALID_EOP_WIDTH 16 +#define BE_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 /* Normal (NO less get_bits case) Valid - 1bits */ +#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 /* Normal (NO less get_bits case) EoP - 1bits */ +#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 /* Especial (less get_bits case) Valid - 1bits */ +#define BE_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 /* Especial (less get_bits case) EoP - 1bits */ + +#endif /* _mipi_backend_common_defs_h_ */ +#endif /* _css_receiver_2400_common_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_defs.h new file mode 100644 index 0000000000000..6f5b7d3d3715e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_defs.h @@ -0,0 +1,258 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _css_receiver_2400_defs_h_ +#define _css_receiver_2400_defs_h_ + +#include "css_receiver_2400_common_defs.h" + +#define CSS_RECEIVER_DATA_WIDTH 8 +#define CSS_RECEIVER_RX_TRIG 4 +#define CSS_RECEIVER_RF_WORD 32 +#define CSS_RECEIVER_IMG_PROC_RF_ADDR 10 +#define CSS_RECEIVER_CSI_RF_ADDR 4 +#define CSS_RECEIVER_DATA_OUT 12 +#define CSS_RECEIVER_CHN_NO 2 +#define CSS_RECEIVER_DWORD_CNT 11 +#define CSS_RECEIVER_FORMAT_TYP 5 +#define CSS_RECEIVER_HRESPONSE 2 +#define CSS_RECEIVER_STATE_WIDTH 3 +#define CSS_RECEIVER_FIFO_DAT 32 +#define CSS_RECEIVER_CNT_VAL 2 +#define CSS_RECEIVER_PRED10_VAL 10 +#define CSS_RECEIVER_PRED12_VAL 12 +#define CSS_RECEIVER_CNT_WIDTH 8 +#define CSS_RECEIVER_WORD_CNT 16 +#define CSS_RECEIVER_PIXEL_LEN 6 +#define CSS_RECEIVER_PIXEL_CNT 5 +#define CSS_RECEIVER_COMP_8_BIT 8 +#define CSS_RECEIVER_COMP_7_BIT 7 +#define CSS_RECEIVER_COMP_6_BIT 6 + +#define CSI_CONFIG_WIDTH 4 + +/* division of gen_short data, ch_id and fmt_type over streaming data interface */ +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB 0 +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB - 1) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB - 1) +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH - 1) + +#define _HRT_CSS_RECEIVER_2400_REG_ALIGN 4 +#define _HRT_CSS_RECEIVER_2400_BYTES_PER_PKT 4 + +#define hrt_css_receiver_2400_4_lane_port_offset 0x100 +#define hrt_css_receiver_2400_1_lane_port_offset 0x200 +#define hrt_css_receiver_2400_2_lane_port_offset 0x300 +#define hrt_css_receiver_2400_backend_port_offset 0x100 + +#define _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX 0 +#define _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX 1 +#define _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX 2 +#define _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX 3 +#define _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX 4 +#define _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX 7 +#define _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX 8 +#define _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX 9 +#define _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX 10 +#define _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX 11 +#define _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX 12 +#define _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX 13 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX 14 +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX 15 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX 16 +#define _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX 17 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX 18 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX 19 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX 20 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX 21 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX 22 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX 23 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX 24 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX 25 +#define _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX 26 +#define _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX 27 +#define _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX 28 + +/* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */ +#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT 0 +#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT 1 +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT 2 +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT 3 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT 4 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT 5 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT 6 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT 7 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT 8 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT 9 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT 10 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT 11 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT 12 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT 13 +#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT 14 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT 15 +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT 16 + +#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_CAUSE_ "Fifo Overrun" +#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_CAUSE_ "Reserved" +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_CAUSE_ "Sleep mode entry" +#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_CAUSE_ "Sleep mode exit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_CAUSE_ "Error high speed SOT" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_CAUSE_ "Error high speed sync SOT" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_CAUSE_ "Error control" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_CAUSE_ "Error correction double bit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_CAUSE_ "Error correction single bit" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_CAUSE_ "No error" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_CAUSE_ "Error cyclic redundancy check" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_CAUSE_ "Error id" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_CAUSE_ "Error frame sync" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_CAUSE_ "Error frame data" +#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_CAUSE_ "Data time-out" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_CAUSE_ "Error escape" +#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_CAUSE_ "Error line sync" + +/* Bits for CSI2_DEVICE_READY register */ +#define _HRT_CSS_RECEIVER_2400_CSI2_DEVICE_READY_IDX 0 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_INIT_TIME_OUT_ERR_IDX 2 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_OVER_RUN_ERR_IDX 3 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_SOT_SYNC_ERR_IDX 4 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_RECEIVE_DATA_TIME_OUT_ERR_IDX 5 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_ECC_TWO_BIT_ERR_IDX 6 +#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_DATA_ID_ERR_IDX 7 + + +/* Bits for CSI2_FUNC_PROG register */ +#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS 19 + +/* Bits for INIT_COUNT register */ +#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_IDX 0 +#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_BITS 16 + +/* Bits for COUNT registers */ +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_BITS 8 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RX_COUNT_BITS 8 + +/* Bits for RAW116_18_DATAID register */ +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_BITS 6 + +/* Bits for COMP_FORMAT register, this selects the compression data format */ +#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS 8 +#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_IDX (_HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX + _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS) +#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_BITS 8 + +/* Bits for COMP_PREDICT register, this selects the predictor algorithm */ +#define _HRT_CSS_RECEIVER_2400_PREDICT_NO_COMP 0 +#define _HRT_CSS_RECEIVER_2400_PREDICT_1 1 +#define _HRT_CSS_RECEIVER_2400_PREDICT_2 2 + +/* Number of bits used for the delay registers */ +#define _HRT_CSS_RECEIVER_2400_DELAY_BITS 8 + +/* Bits for COMP_SCHEME register, this selects the compression scheme for a VC */ +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD1_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD2_BITS_IDX 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD3_BITS_IDX 10 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD4_BITS_IDX 15 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD5_BITS_IDX 20 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD6_BITS_IDX 25 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD7_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD8_BITS_IDX 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_BITS_BITS 5 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_IDX 0 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_BITS 3 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_IDX 3 +#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_BITS 2 + + +/* BITS for backend RAW16 and RAW 18 registers */ + +#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_BITS 2 +#define _HRT_CSS_RECEIVER_2400_RAW18_EN_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW18_EN_BITS 1 + +#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_IDX 0 +#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_BITS 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_IDX 6 +#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_BITS 2 +#define _HRT_CSS_RECEIVER_2400_RAW16_EN_IDX 8 +#define _HRT_CSS_RECEIVER_2400_RAW16_EN_BITS 1 + +/* These hsync and vsync values are for HSS simulation only */ +#define _HRT_CSS_RECEIVER_2400_HSYNC_VAL (1<<16) +#define _HRT_CSS_RECEIVER_2400_VSYNC_VAL (1<<17) + +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_WIDTH 28 +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB 0 +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB + CSS_RECEIVER_DATA_OUT - 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB + CSS_RECEIVER_DATA_OUT - 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT + 1) +#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_EOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT + 1) + +// SH Backend Register IDs +#define _HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX 0 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX 1 +#define _HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX 2 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX 3 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX 4 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX 5 +#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX 6 +#define _HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX 7 +#define _HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX 8 +#define _HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX 9 +#define _HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX 10 +#define _HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX 11 +#define _HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX 12 +#define _HRT_CSS_RECEIVER_2400_BE_CUST_EN_REG_IDX 13 +#define _HRT_CSS_RECEIVER_2400_BE_CUST_DATA_STATE_REG_IDX 14 /* Data State 0,1,2 config */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P0_REG_IDX 15 /* Pixel Extractor config for Data State 0 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P1_REG_IDX 16 /* Pixel Extractor config for Data State 0 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P2_REG_IDX 17 /* Pixel Extractor config for Data State 0 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P3_REG_IDX 18 /* Pixel Extractor config for Data State 0 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P0_REG_IDX 19 /* Pixel Extractor config for Data State 1 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P1_REG_IDX 20 /* Pixel Extractor config for Data State 1 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P2_REG_IDX 21 /* Pixel Extractor config for Data State 1 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P3_REG_IDX 22 /* Pixel Extractor config for Data State 1 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P0_REG_IDX 23 /* Pixel Extractor config for Data State 2 & Pix 0 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P1_REG_IDX 24 /* Pixel Extractor config for Data State 2 & Pix 1 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P2_REG_IDX 25 /* Pixel Extractor config for Data State 2 & Pix 2 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P3_REG_IDX 26 /* Pixel Extractor config for Data State 2 & Pix 3 */ +#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_VALID_EOP_REG_IDX 27 /* Pixel Valid & EoP config for Pix 0,1,2,3 */ + +#define _HRT_CSS_RECEIVER_2400_BE_NOF_REGISTERS 28 + +#define _HRT_CSS_RECEIVER_2400_BE_SRST_HE 0 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_RCF 1 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_PF 2 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_SM 3 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_PD 4 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_SD 5 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_OT 6 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_BC 7 +#define _HRT_CSS_RECEIVER_2400_BE_SRST_WIDTH 8 + +#endif /* _css_receiver_2400_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/defs.h new file mode 100644 index 0000000000000..47505f41790c1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/defs.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_DEFS_H_ +#define _HRT_DEFS_H_ + +#ifndef HRTCAT +#define _HRTCAT(m, n) m##n +#define HRTCAT(m, n) _HRTCAT(m, n) +#endif + +#ifndef HRTSTR +#define _HRTSTR(x) #x +#define HRTSTR(x) _HRTSTR(x) +#endif + +#ifndef HRTMIN +#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef HRTMAX +#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) +#endif + +#endif /* _HRT_DEFS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h new file mode 100644 index 0000000000000..d184a8b313c91 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h @@ -0,0 +1,199 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _dma_v2_defs_h +#define _dma_v2_defs_h + +#define _DMA_V2_NUM_CHANNELS_ID MaxNumChannels +#define _DMA_V2_CONNECTIONS_ID Connections +#define _DMA_V2_DEV_ELEM_WIDTHS_ID DevElemWidths +#define _DMA_V2_DEV_FIFO_DEPTH_ID DevFifoDepth +#define _DMA_V2_DEV_FIFO_RD_LAT_ID DevFifoRdLat +#define _DMA_V2_DEV_FIFO_LAT_BYPASS_ID DevFifoRdLatBypass +#define _DMA_V2_DEV_NO_BURST_ID DevNoBurst +#define _DMA_V2_DEV_RD_ACCEPT_ID DevRdAccept +#define _DMA_V2_DEV_SRMD_ID DevSRMD +#define _DMA_V2_DEV_HAS_CRUN_ID CRunMasters +#define _DMA_V2_CTRL_ACK_FIFO_DEPTH_ID CtrlAckFifoDepth +#define _DMA_V2_CMD_FIFO_DEPTH_ID CommandFifoDepth +#define _DMA_V2_CMD_FIFO_RD_LAT_ID CommandFifoRdLat +#define _DMA_V2_CMD_FIFO_LAT_BYPASS_ID CommandFifoRdLatBypass +#define _DMA_V2_NO_PACK_ID has_no_pack + +#define _DMA_V2_REG_ALIGN 4 +#define _DMA_V2_REG_ADDR_BITS 2 + +/* Command word */ +#define _DMA_V2_CMD_IDX 0 +#define _DMA_V2_CMD_BITS 6 +#define _DMA_V2_CHANNEL_IDX (_DMA_V2_CMD_IDX + _DMA_V2_CMD_BITS) +#define _DMA_V2_CHANNEL_BITS 5 + +/* The command to set a parameter contains the PARAM field next */ +#define _DMA_V2_PARAM_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) +#define _DMA_V2_PARAM_BITS 4 + +/* Commands to read, write or init specific blocks contain these + three values */ +#define _DMA_V2_SPEC_DEV_A_XB_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) +#define _DMA_V2_SPEC_DEV_A_XB_BITS 8 +#define _DMA_V2_SPEC_DEV_B_XB_IDX (_DMA_V2_SPEC_DEV_A_XB_IDX + _DMA_V2_SPEC_DEV_A_XB_BITS) +#define _DMA_V2_SPEC_DEV_B_XB_BITS 8 +#define _DMA_V2_SPEC_YB_IDX (_DMA_V2_SPEC_DEV_B_XB_IDX + _DMA_V2_SPEC_DEV_B_XB_BITS) +#define _DMA_V2_SPEC_YB_BITS (32-_DMA_V2_SPEC_DEV_B_XB_BITS-_DMA_V2_SPEC_DEV_A_XB_BITS-_DMA_V2_CMD_BITS-_DMA_V2_CHANNEL_BITS) + +/* */ +#define _DMA_V2_CMD_CTRL_IDX 4 +#define _DMA_V2_CMD_CTRL_BITS 4 + +/* Packing setup word */ +#define _DMA_V2_CONNECTION_IDX 0 +#define _DMA_V2_CONNECTION_BITS 4 +#define _DMA_V2_EXTENSION_IDX (_DMA_V2_CONNECTION_IDX + _DMA_V2_CONNECTION_BITS) +#define _DMA_V2_EXTENSION_BITS 1 + +/* Elements packing word */ +#define _DMA_V2_ELEMENTS_IDX 0 +#define _DMA_V2_ELEMENTS_BITS 8 +#define _DMA_V2_LEFT_CROPPING_IDX (_DMA_V2_ELEMENTS_IDX + _DMA_V2_ELEMENTS_BITS) +#define _DMA_V2_LEFT_CROPPING_BITS 8 + +#define _DMA_V2_WIDTH_IDX 0 +#define _DMA_V2_WIDTH_BITS 16 + +#define _DMA_V2_HEIGHT_IDX 0 +#define _DMA_V2_HEIGHT_BITS 16 + +#define _DMA_V2_STRIDE_IDX 0 +#define _DMA_V2_STRIDE_BITS 32 + +/* Command IDs */ +#define _DMA_V2_MOVE_B2A_COMMAND 0 +#define _DMA_V2_MOVE_B2A_BLOCK_COMMAND 1 +#define _DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND 2 +#define _DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND 3 +#define _DMA_V2_MOVE_A2B_COMMAND 4 +#define _DMA_V2_MOVE_A2B_BLOCK_COMMAND 5 +#define _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND 6 +#define _DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND 7 +#define _DMA_V2_INIT_A_COMMAND 8 +#define _DMA_V2_INIT_A_BLOCK_COMMAND 9 +#define _DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND 10 +#define _DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND 11 +#define _DMA_V2_INIT_B_COMMAND 12 +#define _DMA_V2_INIT_B_BLOCK_COMMAND 13 +#define _DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND 14 +#define _DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND 15 +#define _DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_A_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_B_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_NO_ACK_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND + 16) +#define _DMA_V2_CONFIG_CHANNEL_COMMAND 32 +#define _DMA_V2_SET_CHANNEL_PARAM_COMMAND 33 +#define _DMA_V2_SET_CRUN_COMMAND 62 + +/* Channel Parameter IDs */ +#define _DMA_V2_PACKING_SETUP_PARAM 0 +#define _DMA_V2_STRIDE_A_PARAM 1 +#define _DMA_V2_ELEM_CROPPING_A_PARAM 2 +#define _DMA_V2_WIDTH_A_PARAM 3 +#define _DMA_V2_STRIDE_B_PARAM 4 +#define _DMA_V2_ELEM_CROPPING_B_PARAM 5 +#define _DMA_V2_WIDTH_B_PARAM 6 +#define _DMA_V2_HEIGHT_PARAM 7 +#define _DMA_V2_QUEUED_CMDS 8 + +/* Parameter Constants */ +#define _DMA_V2_ZERO_EXTEND 0 +#define _DMA_V2_SIGN_EXTEND 1 + + /* SLAVE address map */ +#define _DMA_V2_SEL_FSM_CMD 0 +#define _DMA_V2_SEL_CH_REG 1 +#define _DMA_V2_SEL_CONN_GROUP 2 +#define _DMA_V2_SEL_DEV_INTERF 3 + +#define _DMA_V2_ADDR_SEL_COMP_IDX 12 +#define _DMA_V2_ADDR_SEL_COMP_BITS 4 +#define _DMA_V2_ADDR_SEL_CH_REG_IDX 2 +#define _DMA_V2_ADDR_SEL_CH_REG_BITS 6 +#define _DMA_V2_ADDR_SEL_PARAM_IDX (_DMA_V2_ADDR_SEL_CH_REG_BITS+_DMA_V2_ADDR_SEL_CH_REG_IDX) +#define _DMA_V2_ADDR_SEL_PARAM_BITS 4 + +#define _DMA_V2_ADDR_SEL_GROUP_COMP_IDX 2 +#define _DMA_V2_ADDR_SEL_GROUP_COMP_BITS 6 +#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_IDX (_DMA_V2_ADDR_SEL_GROUP_COMP_BITS + _DMA_V2_ADDR_SEL_GROUP_COMP_IDX) +#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_BITS 4 + +#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX 2 +#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS 6 +#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_IDX (_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX+_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS) +#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_BITS 4 + +#define _DMA_V2_FSM_GROUP_CMD_IDX 0 +#define _DMA_V2_FSM_GROUP_ADDR_SRC_IDX 1 +#define _DMA_V2_FSM_GROUP_ADDR_DEST_IDX 2 +#define _DMA_V2_FSM_GROUP_CMD_CTRL_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_IDX 4 +#define _DMA_V2_FSM_GROUP_FSM_PACK_IDX 5 +#define _DMA_V2_FSM_GROUP_FSM_REQ_IDX 6 +#define _DMA_V2_FSM_GROUP_FSM_WR_IDX 7 + +#define _DMA_V2_FSM_GROUP_FSM_CTRL_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_XB_IDX 4 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_YB_IDX 5 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX 6 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX 7 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX 8 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX 9 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX 10 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX 11 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX 12 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX 13 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX 14 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX 15 +#define _DMA_V2_FSM_GROUP_FSM_CTRL_CMD_CTRL_IDX 15 + +#define _DMA_V2_FSM_GROUP_FSM_PACK_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX 3 + +#define _DMA_V2_FSM_GROUP_FSM_REQ_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_XB_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_REQ_XB_REMAINING_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_BURST_IDX 4 + +#define _DMA_V2_FSM_GROUP_FSM_WR_STATE_IDX 0 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_YB_IDX 1 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_XB_IDX 2 +#define _DMA_V2_FSM_GROUP_FSM_WR_XB_REMAINING_IDX 3 +#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_BURST_IDX 4 + +#define _DMA_V2_DEV_INTERF_REQ_SIDE_STATUS_IDX 0 +#define _DMA_V2_DEV_INTERF_SEND_SIDE_STATUS_IDX 1 +#define _DMA_V2_DEV_INTERF_FIFO_STATUS_IDX 2 +#define _DMA_V2_DEV_INTERF_REQ_ONLY_COMPLETE_BURST_IDX 3 +#define _DMA_V2_DEV_INTERF_MAX_BURST_IDX 4 +#define _DMA_V2_DEV_INTERF_CHK_ADDR_ALIGN 5 + +#endif /* _dma_v2_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h new file mode 100644 index 0000000000000..77722d2057010 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h @@ -0,0 +1,170 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef HRT_GDC_v2_defs_h_ +#define HRT_GDC_v2_defs_h_ + +#define HRT_GDC_IS_V2 + +#define HRT_GDC_N 1024 /* Top-level design constant, equal to the number of entries in the LUT */ +#define HRT_GDC_FRAC_BITS 10 /* Number of fractional bits in the GDC block, driven by the size of the LUT */ + +#define HRT_GDC_BLI_FRAC_BITS 4 /* Number of fractional bits for the bi-linear interpolation type */ +#define HRT_GDC_BLI_COEF_ONE (1 << HRT_GDC_BLI_FRAC_BITS) + +#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ +#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS-2)) /* We represent signed 10 bit coefficients. */ + /* The supported range is [-256, .., +256] */ + /* in 14-bit signed notation, */ + /* We need all ten bits (MSB must be zero). */ + /* -s is inserted to solve this issue, and */ + /* therefore "1" is equal to +256. */ +#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) + +#define HRT_GDC_LUT_BYTES (HRT_GDC_N*4*2) /* 1024 addresses, 4 coefficients per address, */ + /* 2 bytes per coefficient */ + +#define _HRT_GDC_REG_ALIGN 4 + + // 31 30 29 25 24 0 + // |-----|---|--------|------------------------| + // | CMD | C | Reg_ID | Value | + + + // There are just two commands possible for the GDC block: + // 1 - Configure reg + // 0 - Data token + + // C - Reserved bit + // Used in protocol to indicate whether it is C-run or other type of runs + // In case of C-run, this bit has a value of 1, for all the other runs, it is 0. + + // Reg_ID - Address of the register to be configured + + // Value - Value to store to the addressed register, maximum of 24 bits + + // Configure reg command is not followed by any other token. + // The address of the register and the data to be filled in is contained in the same token + + // When the first data token is received, it must be: + // 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, + // 2. P0'X (device configured in one of the tetragon modes) + // After the first data token is received, pre-defined number of tokens with the following meaning follow: + // 1. two tokens: SRC address ; DST address + // 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address + +#define HRT_GDC_CONFIG_CMD 1 +#define HRT_GDC_DATA_CMD 0 + + +#define HRT_GDC_CMD_POS 31 +#define HRT_GDC_CMD_BITS 1 +#define HRT_GDC_CRUN_POS 30 +#define HRT_GDC_REG_ID_POS 25 +#define HRT_GDC_REG_ID_BITS 5 +#define HRT_GDC_DATA_POS 0 +#define HRT_GDC_DATA_BITS 25 + +#define HRT_GDC_FRYIPXFRX_BITS 26 +#define HRT_GDC_P0X_BITS 23 + + +#define HRT_GDC_MAX_OXDIM (8192-64) +#define HRT_GDC_MAX_OYDIM 4095 +#define HRT_GDC_MAX_IXDIM (8192-64) +#define HRT_GDC_MAX_IYDIM 4095 +#define HRT_GDC_MAX_DS_FAC 16 +#define HRT_GDC_MAX_DX (HRT_GDC_MAX_DS_FAC*HRT_GDC_N - 1) +#define HRT_GDC_MAX_DY HRT_GDC_MAX_DX + + +/* GDC lookup tables entries are 10 bits values, but they're + stored 2 by 2 as 32 bit values, yielding 16 bits per entry. + A GDC lookup table contains 64 * 4 elements */ + +#define HRT_GDC_PERF_1_1_pix 0 +#define HRT_GDC_PERF_2_1_pix 1 +#define HRT_GDC_PERF_1_2_pix 2 +#define HRT_GDC_PERF_2_2_pix 3 + +#define HRT_GDC_NND_MODE 0 +#define HRT_GDC_BLI_MODE 1 +#define HRT_GDC_BCI_MODE 2 +#define HRT_GDC_LUT_MODE 3 + +#define HRT_GDC_SCAN_STB 0 +#define HRT_GDC_SCAN_STR 1 + +#define HRT_GDC_MODE_SCALING 0 +#define HRT_GDC_MODE_TETRAGON 1 + +#define HRT_GDC_LUT_COEFF_OFFSET 16 +#define HRT_GDC_FRY_BIT_OFFSET 16 +// FRYIPXFRX is the only register where we store two values in one field, +// to save one token in the scaling protocol. +// Like this, we have three tokens in the scaling protocol, +// Otherwise, we would have had four. +// The register bit-map is: +// 31 26 25 16 15 10 9 0 +// |------|----------|------|----------| +// | XXXX | FRY | IPX | FRX | + + +#define HRT_GDC_CE_FSM0_POS 0 +#define HRT_GDC_CE_FSM0_LEN 2 +#define HRT_GDC_CE_OPY_POS 2 +#define HRT_GDC_CE_OPY_LEN 14 +#define HRT_GDC_CE_OPX_POS 16 +#define HRT_GDC_CE_OPX_LEN 16 +// CHK_ENGINE register bit-map: +// 31 16 15 2 1 0 +// |----------------|-----------|----| +// | OPX | OPY |FSM0| +// However, for the time being at least, +// this implementation is meaningless in hss model, +// So, we just return 0 + + +#define HRT_GDC_CHK_ENGINE_IDX 0 +#define HRT_GDC_WOIX_IDX 1 +#define HRT_GDC_WOIY_IDX 2 +#define HRT_GDC_BPP_IDX 3 +#define HRT_GDC_FRYIPXFRX_IDX 4 +#define HRT_GDC_OXDIM_IDX 5 +#define HRT_GDC_OYDIM_IDX 6 +#define HRT_GDC_SRC_ADDR_IDX 7 +#define HRT_GDC_SRC_END_ADDR_IDX 8 +#define HRT_GDC_SRC_WRAP_ADDR_IDX 9 +#define HRT_GDC_SRC_STRIDE_IDX 10 +#define HRT_GDC_DST_ADDR_IDX 11 +#define HRT_GDC_DST_STRIDE_IDX 12 +#define HRT_GDC_DX_IDX 13 +#define HRT_GDC_DY_IDX 14 +#define HRT_GDC_P0X_IDX 15 +#define HRT_GDC_P0Y_IDX 16 +#define HRT_GDC_P1X_IDX 17 +#define HRT_GDC_P1Y_IDX 18 +#define HRT_GDC_P2X_IDX 19 +#define HRT_GDC_P2Y_IDX 20 +#define HRT_GDC_P3X_IDX 21 +#define HRT_GDC_P3Y_IDX 22 +#define HRT_GDC_PERF_POINT_IDX 23 // 1x1 ; 1x2 ; 2x1 ; 2x2 pixels per cc +#define HRT_GDC_INTERP_TYPE_IDX 24 // NND ; BLI ; BCI ; LUT +#define HRT_GDC_SCAN_IDX 25 // 0 = STB (Slide To Bottom) ; 1 = STR (Slide To Right) +#define HRT_GDC_PROC_MODE_IDX 26 // 0 = Scaling ; 1 = Tetragon + +#define HRT_GDC_LUT_IDX 32 + + +#endif /* HRT_GDC_v2_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gp_timer_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gp_timer_defs.h new file mode 100644 index 0000000000000..3082e2f5e0141 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gp_timer_defs.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _gp_timer_defs_h +#define _gp_timer_defs_h + +#define _HRT_GP_TIMER_REG_ALIGN 4 + +#define HIVE_GP_TIMER_RESET_REG_IDX 0 +#define HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX 1 +#define HIVE_GP_TIMER_ENABLE_REG_IDX(timer) (HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX + 1 + timer) +#define HIVE_GP_TIMER_VALUE_REG_IDX(timer,timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timers) + timer) +#define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer,timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers, timers) + timer) +#define HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer,timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timers, timers) + timer) +#define HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq,timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timers, timers) + irq) +#define HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irqs, timers) + irq) +#define HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs, timers, irqs) + irq) + +#define HIVE_GP_TIMER_COUNT_TYPE_HIGH 0 +#define HIVE_GP_TIMER_COUNT_TYPE_LOW 1 +#define HIVE_GP_TIMER_COUNT_TYPE_POSEDGE 2 +#define HIVE_GP_TIMER_COUNT_TYPE_NEGEDGE 3 +#define HIVE_GP_TIMER_COUNT_TYPES 4 + +#endif /* _gp_timer_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h new file mode 100644 index 0000000000000..a807d4c990414 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _gpio_block_defs_h_ +#define _gpio_block_defs_h_ + +#define _HRT_GPIO_BLOCK_REG_ALIGN 4 + +/* R/W registers */ +#define _gpio_block_reg_do_e 0 +#define _gpio_block_reg_do_select 1 +#define _gpio_block_reg_do_0 2 +#define _gpio_block_reg_do_1 3 +#define _gpio_block_reg_do_pwm_cnt_0 4 +#define _gpio_block_reg_do_pwm_cnt_1 5 +#define _gpio_block_reg_do_pwm_cnt_2 6 +#define _gpio_block_reg_do_pwm_cnt_3 7 +#define _gpio_block_reg_do_pwm_main_cnt 8 +#define _gpio_block_reg_do_pwm_enable 9 +#define _gpio_block_reg_di_debounce_sel 10 +#define _gpio_block_reg_di_debounce_cnt_0 11 +#define _gpio_block_reg_di_debounce_cnt_1 12 +#define _gpio_block_reg_di_debounce_cnt_2 13 +#define _gpio_block_reg_di_debounce_cnt_3 14 +#define _gpio_block_reg_di_active_level 15 + + +/* read-only registers */ +#define _gpio_block_reg_di 16 + +#endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h new file mode 100644 index 0000000000000..7a94c1d85b087 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h @@ -0,0 +1,69 @@ +/* +#ifndef ISP2401 + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ +#define _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ + +/* + * These are the indices of each interrupt in the interrupt + * controller's registers. these can be used as the irq_id + * argument to the hrt functions irq_controller.h. + * + * The definitions are taken from _defs.h + */ +typedef enum hrt_isp_css_irq { + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID , + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID , + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID , + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID , + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID , + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID , + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID , + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID , + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID , + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID , + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID , + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID , + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID , + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID , + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID , + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID , + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID , + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID , + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID , + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID , + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID , + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID , + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID , + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID , + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID , + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID , + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID , + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID , + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID , + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID , + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID , + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID , + /* this must (obviously) be the last on in the enum */ + hrt_isp_css_irq_num_irqs +} hrt_isp_css_irq_t; + +typedef enum hrt_isp_css_irq_status { + hrt_isp_css_irq_status_error, + hrt_isp_css_irq_status_more_irqs, + hrt_isp_css_irq_status_success +} hrt_isp_css_irq_status_t; + +#endif /* _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h new file mode 100644 index 0000000000000..5a2ce9108ae49 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h @@ -0,0 +1,435 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _hive_isp_css_defs_h__ +#define _hive_isp_css_defs_h__ + +#define _HIVE_ISP_CSS_2401_SYSTEM 1 +#define HIVE_ISP_CTRL_DATA_WIDTH 32 +#define HIVE_ISP_CTRL_ADDRESS_WIDTH 32 +#define HIVE_ISP_CTRL_MAX_BURST_SIZE 1 +#define HIVE_ISP_DDR_ADDRESS_WIDTH 36 + +#define HIVE_ISP_HOST_MAX_BURST_SIZE 8 /* host supports bursts in order to prevent repeating DDRAM accesses */ +#define HIVE_ISP_NUM_GPIO_PINS 12 + +/* This list of vector num_elems/elem_bits pairs is valid both in C as initializer + and in the DMA parameter list */ +#define HIVE_ISP_DDR_DMA_SPECS {{32, 8}, {16, 16}, {18, 14}, {25, 10}, {21, 12}} +#define HIVE_ISP_DDR_WORD_BITS 256 +#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS/8) +#define HIVE_ISP_DDR_BYTES (512 * 1024 * 1024) +#define HIVE_ISP_DDR_BYTES_RTL (127 * 1024 * 1024) +#define HIVE_ISP_DDR_SMALL_BYTES (128 * 256 / 8) +#define HIVE_ISP_PAGE_SHIFT 12 +#define HIVE_ISP_PAGE_SIZE (1< + +#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS)-1) +#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS)-1) + +#define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) +#define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) + +#endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h new file mode 100644 index 0000000000000..58b0e6effbd06 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h @@ -0,0 +1,128 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_HIVE_TYPES_H +#define _HRT_HIVE_TYPES_H + +#include "version.h" +#include "defs.h" + +#ifndef HRTCAT3 +#define _HRTCAT3(m,n,o) m##n##o +#define HRTCAT3(m,n,o) _HRTCAT3(m,n,o) +#endif + +#ifndef HRTCAT4 +#define _HRTCAT4(m,n,o,p) m##n##o##p +#define HRTCAT4(m,n,o,p) _HRTCAT4(m,n,o,p) +#endif + +#ifndef HRTMIN +#define HRTMIN(a,b) (((a)<(b))?(a):(b)) +#endif + +#ifndef HRTMAX +#define HRTMAX(a,b) (((a)>(b))?(a):(b)) +#endif + +/* boolean data type */ +typedef unsigned int hive_bool; +#define hive_false 0 +#define hive_true 1 + +typedef char hive_int8; +typedef short hive_int16; +typedef int hive_int32; +typedef long long hive_int64; + +typedef unsigned char hive_uint8; +typedef unsigned short hive_uint16; +typedef unsigned int hive_uint32; +typedef unsigned long long hive_uint64; + +/* by default assume 32 bit master port (both data and address) */ +#ifndef HRT_DATA_WIDTH +#define HRT_DATA_WIDTH 32 +#endif +#ifndef HRT_ADDRESS_WIDTH +#define HRT_ADDRESS_WIDTH 32 +#endif + +#define HRT_DATA_BYTES (HRT_DATA_WIDTH/8) +#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH/8) + +#if HRT_DATA_WIDTH == 64 +typedef hive_uint64 hrt_data; +#elif HRT_DATA_WIDTH == 32 +typedef hive_uint32 hrt_data; +#else +#error data width not supported +#endif + +#if HRT_ADDRESS_WIDTH == 64 +typedef hive_uint64 hrt_address; +#elif HRT_ADDRESS_WIDTH == 32 +typedef hive_uint32 hrt_address; +#else +#error adddres width not supported +#endif + +/* The SP side representation of an HMM virtual address */ +typedef hive_uint32 hrt_vaddress; + +/* use 64 bit addresses in simulation, where possible */ +typedef hive_uint64 hive_sim_address; + +/* below is for csim, not for hrt, rename and move this elsewhere */ + +typedef unsigned int hive_uint; +typedef hive_uint32 hive_address; +typedef hive_address hive_slave_address; +typedef hive_address hive_mem_address; + +/* MMIO devices */ +typedef hive_uint hive_mmio_id; +typedef hive_mmio_id hive_slave_id; +typedef hive_mmio_id hive_port_id; +typedef hive_mmio_id hive_master_id; +typedef hive_mmio_id hive_mem_id; +typedef hive_mmio_id hive_dev_id; +typedef hive_mmio_id hive_fifo_id; + +typedef hive_uint hive_hier_id; +typedef hive_hier_id hive_device_id; +typedef hive_device_id hive_proc_id; +typedef hive_device_id hive_cell_id; +typedef hive_device_id hive_host_id; +typedef hive_device_id hive_bus_id; +typedef hive_device_id hive_bridge_id; +typedef hive_device_id hive_fifo_adapter_id; +typedef hive_device_id hive_custom_device_id; + +typedef hive_uint hive_slot_id; +typedef hive_uint hive_fu_id; +typedef hive_uint hive_reg_file_id; +typedef hive_uint hive_reg_id; + +/* Streaming devices */ +typedef hive_uint hive_outport_id; +typedef hive_uint hive_inport_id; + +typedef hive_uint hive_msink_id; + +/* HRT specific */ +typedef char* hive_program; +typedef char* hive_function; + +#endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/if_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/if_defs.h new file mode 100644 index 0000000000000..7d39e45796ae1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/if_defs.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IF_DEFS_H +#define _IF_DEFS_H + +#define HIVE_IF_FRAME_REQUEST 0xA000 +#define HIVE_IF_LINES_REQUEST 0xB000 +#define HIVE_IF_VECTORS_REQUEST 0xC000 + +#endif /* _IF_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h new file mode 100644 index 0000000000000..7766f78cd1230 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _if_subsystem_defs_h__ +#define _if_subsystem_defs_h__ + +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 0 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_1 1 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_2 2 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_3 3 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 +#define HIVE_IFMT_GP_REGS_SRST_IDX 9 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 + +#define HIVE_IFMT_GP_REGS_CH_ID_FMT_TYPE_IDX 11 + +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_BASE HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 + +/* order of the input bits for the ifmt irq controller */ +#define HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID 0 +#define HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID 1 +#define HIVE_IFMT_IRQ_IFT_SEC_BIT_ID 2 +#define HIVE_IFMT_IRQ_MEM_CPY_BIT_ID 3 +#define HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID 4 + +/* order of the input bits for the ifmt Soft reset register */ +#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_BIT_IDX 0 +#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_B_BIT_IDX 1 +#define HIVE_IFMT_GP_REGS_SRST_IFT_SEC_BIT_IDX 2 +#define HIVE_IFMT_GP_REGS_SRST_MEM_CPY_BIT_IDX 3 + +/* order of the input bits for the ifmt Soft reset register */ +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_BIT_IDX 0 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_B_BIT_IDX 1 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_SEC_BIT_IDX 2 +#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_MEM_CPY_BIT_IDX 3 + +#endif /* _if_subsystem_defs_h__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h new file mode 100644 index 0000000000000..87fbf82edb5bc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h @@ -0,0 +1,89 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_selector_defs_h +#define _input_selector_defs_h + +#ifndef HIVE_ISP_ISEL_SEL_BITS +#define HIVE_ISP_ISEL_SEL_BITS 2 +#endif + +#ifndef HIVE_ISP_CH_ID_BITS +#define HIVE_ISP_CH_ID_BITS 2 +#endif + +#ifndef HIVE_ISP_FMT_TYPE_BITS +#define HIVE_ISP_FMT_TYPE_BITS 5 +#endif + +/* gp_register register id's -- Outputs */ +#define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 +#define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 +#define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 +#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 + +#define HIVE_ISEL_GP_REGS_SOF_IDX 8 +#define HIVE_ISEL_GP_REGS_EOF_IDX 9 +#define HIVE_ISEL_GP_REGS_SOL_IDX 10 +#define HIVE_ISEL_GP_REGS_EOL_IDX 11 + +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 +#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 + +#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 +#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 +#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 +#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 +#define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 +#define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 +#define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 +#define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 +#define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 + + +#define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 +#define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 +#define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 +#define HIVE_ISEL_GP_REGS_SBAND_SEL_IDX 32 +#define HIVE_ISEL_GP_REGS_SYNC_SEL_IDX 33 +#define HIVE_ISEL_GP_REGS_SRST_IDX 37 + +#define HIVE_ISEL_GP_REGS_SRST_SYNCGEN_BIT 0 +#define HIVE_ISEL_GP_REGS_SRST_PRBS_BIT 1 +#define HIVE_ISEL_GP_REGS_SRST_TPG_BIT 2 +#define HIVE_ISEL_GP_REGS_SRST_FIFO_BIT 3 + +/* gp_register register id's -- Inputs */ +#define HIVE_ISEL_GP_REGS_SYNCGEN_HOR_CNT_IDX 34 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VER_CNT_IDX 35 +#define HIVE_ISEL_GP_REGS_SYNCGEN_FRAMES_CNT_IDX 36 + +/* irq sources isel irq controller */ +#define HIVE_ISEL_IRQ_SYNC_GEN_SOF_BIT_ID 0 +#define HIVE_ISEL_IRQ_SYNC_GEN_EOF_BIT_ID 1 +#define HIVE_ISEL_IRQ_SYNC_GEN_SOL_BIT_ID 2 +#define HIVE_ISEL_IRQ_SYNC_GEN_EOL_BIT_ID 3 +#define HIVE_ISEL_IRQ_NUM_IRQS 4 + +#endif /* _input_selector_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h new file mode 100644 index 0000000000000..20a13c4cdb562 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_switch_2400_defs_h +#define _input_switch_2400_defs_h + +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id)*2) + ((fmt_type)>=16)) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type)%16) * 2) + +#define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 +#define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 +#define HIVE_INPUT_SWITCH_SELECT_IF_SEC 2 +#define HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM 3 +#define HIVE_INPUT_SWITCH_VSELECT_NO_OUTPUT 0 +#define HIVE_INPUT_SWITCH_VSELECT_IF_PRIM 1 +#define HIVE_INPUT_SWITCH_VSELECT_IF_SEC 2 +#define HIVE_INPUT_SWITCH_VSELECT_STR_TO_MEM 4 + +#endif /* _input_switch_2400_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h new file mode 100644 index 0000000000000..a7f0ca80bc9be --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h @@ -0,0 +1,254 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_system_ctrl_defs_h +#define _input_system_ctrl_defs_h + +#define _INPUT_SYSTEM_CTRL_REG_ALIGN 4 /* assuming 32 bit control bus width */ + +/* --------------------------------------------------*/ + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +// Number of registers +#define ISYS_CTRL_NOF_REGS 23 + +// Register id's of MMIO slave accesible registers +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_ID 0 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_ID 1 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_ID 2 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID 3 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID 4 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID 5 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID 6 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID 7 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID 8 +#define ISYS_CTRL_ACQ_START_ADDR_REG_ID 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID 10 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID 11 +#define ISYS_CTRL_INIT_REG_ID 12 +#define ISYS_CTRL_LAST_COMMAND_REG_ID 13 +#define ISYS_CTRL_NEXT_COMMAND_REG_ID 14 +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID 15 +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID 16 +#define ISYS_CTRL_FSM_STATE_INFO_REG_ID 17 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID 18 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID 19 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 + + +/* register reset value */ +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 +#define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ISYS_CTRL_INIT_REG_RSTVAL 0 +#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 + +/* register width value */ +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ISYS_CTRL_INIT_REG_WIDTH 3 +#define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ +#define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 +#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ISYS_CTRL_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_WIDTH 32 +#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_WIDTH 1 + +/* bit definitions */ + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ + +/* +InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 +[7:4] - CaptPortId, + CaptA-'b0000 + CaptB-'b0001 + CaptC-'b0010 +[31:16] - NOF_frames +InpSysCaptFrameExt 2/0 [3:0] - 'b0001' +[7:4] - CaptPortId, + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + + 2/1 [31:0] - external capture address +InpSysAcqFrame 2/0 [3:0] - 'b0010, +[31:4] - NOF_ext_mem_words + 2/1 [31:0] - external memory read start address +InpSysOverruleON 1/0 [3:0] - 'b0011, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysOverruleOFF 1/0 [3:0] - 'b0100, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysOverruleCmd 2/0 [3:0] - 'b0101, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + + 2/1 [31:0] - command token value for port opid + + +acknowledge tokens: + +InpSysAckCFA 1/0 [3:0] - 'b0000 + [7:4] - CaptPortId, + CaptA-'b0000 + CaptB- 'b0001 + CaptC-'b0010 + [31:16] - NOF_frames +InpSysAckCFE 1/0 [3:0] - 'b0001' +[7:4] - CaptPortId, + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + +InpSysAckAF 1/0 [3:0] - 'b0010 +InpSysAckOverruleON 1/0 [3:0] - 'b0011, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + +InpSysAckOverrule 2/0 [3:0] - 'b0101, +[7:4] - overrule port id (opid) + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA + + + 2/1 [31:0] - acknowledge token value from port opid + + + +*/ + + +/* Command and acknowledge tokens IDs */ +#define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ +#define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ +#define ISYS_CTRL_ACQ_FRAME_TOKEN_ID 2 /* 0010b */ +#define ISYS_CTRL_OVERRULE_ON_TOKEN_ID 3 /* 0011b */ +#define ISYS_CTRL_OVERRULE_OFF_TOKEN_ID 4 /* 0100b */ +#define ISYS_CTRL_OVERRULE_TOKEN_ID 5 /* 0101b */ + +#define ISYS_CTRL_ACK_CFA_TOKEN_ID 0 +#define ISYS_CTRL_ACK_CFE_TOKEN_ID 1 +#define ISYS_CTRL_ACK_AF_TOKEN_ID 2 +#define ISYS_CTRL_ACK_OVERRULE_ON_TOKEN_ID 3 +#define ISYS_CTRL_ACK_OVERRULE_OFF_TOKEN_ID 4 +#define ISYS_CTRL_ACK_OVERRULE_TOKEN_ID 5 +#define ISYS_CTRL_ACK_DEVICE_ERROR_TOKEN_ID 6 + +#define ISYS_CTRL_TOKEN_ID_MSB 3 +#define ISYS_CTRL_TOKEN_ID_LSB 0 +#define ISYS_CTRL_PORT_ID_TOKEN_MSB 7 +#define ISYS_CTRL_PORT_ID_TOKEN_LSB 4 +#define ISYS_CTRL_NOF_CAPT_TOKEN_MSB 31 +#define ISYS_CTRL_NOF_CAPT_TOKEN_LSB 16 +#define ISYS_CTRL_NOF_EXT_TOKEN_MSB 31 +#define ISYS_CTRL_NOF_EXT_TOKEN_LSB 8 + +#define ISYS_CTRL_TOKEN_ID_IDX 0 +#define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) +#define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) +#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB +1) +#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB +#define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) +#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB +#define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) + +#define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ +#define ISYS_CTRL_PORT_ID_CAPT_B 1 /* device ID for capture unit B */ +#define ISYS_CTRL_PORT_ID_CAPT_C 2 /* device ID for capture unit C */ +#define ISYS_CTRL_PORT_ID_ACQUISITION 3 /* device ID for acquistion unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_A 4 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_B 5 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_CAPT_C 6 /* device ID for dma unit */ +#define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ + +#define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ +#define ISYS_CTRL_NO_DMA_ACK 0 +#define ISYS_CTRL_NO_CAPT_ACK 16 + +#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_defs.h new file mode 100644 index 0000000000000..ae62163034a66 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_defs.h @@ -0,0 +1,126 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _input_system_defs_h +#define _input_system_defs_h + +/* csi controller modes */ +#define HIVE_CSI_CONFIG_MAIN 0 +#define HIVE_CSI_CONFIG_STEREO1 4 +#define HIVE_CSI_CONFIG_STEREO2 8 + +/* general purpose register IDs */ + +/* Stream Multicast select modes */ +#define HIVE_ISYS_GPREG_MULTICAST_A_IDX 0 +#define HIVE_ISYS_GPREG_MULTICAST_B_IDX 1 +#define HIVE_ISYS_GPREG_MULTICAST_C_IDX 2 + +/* Stream Mux select modes */ +#define HIVE_ISYS_GPREG_MUX_IDX 3 + +/* streaming monitor status and control */ +#define HIVE_ISYS_GPREG_STRMON_STAT_IDX 4 +#define HIVE_ISYS_GPREG_STRMON_COND_IDX 5 +#define HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX 6 +#define HIVE_ISYS_GPREG_SRST_IDX 7 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_IDX 8 +#define HIVE_ISYS_GPREG_REG_PORT_A_IDX 9 +#define HIVE_ISYS_GPREG_REG_PORT_B_IDX 10 + +/* Bit numbers of the soft reset register */ +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_A_BIT 0 +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_B_BIT 1 +#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_C_BIT 2 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_A_BIT 3 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_B_BIT 4 +#define HIVE_ISYS_GPREG_SRST_MULTICAST_C_BIT 5 +#define HIVE_ISYS_GPREG_SRST_CAPT_A_BIT 6 +#define HIVE_ISYS_GPREG_SRST_CAPT_B_BIT 7 +#define HIVE_ISYS_GPREG_SRST_CAPT_C_BIT 8 +#define HIVE_ISYS_GPREG_SRST_ACQ_BIT 9 +/* For ISYS_CTRL 5bits are defined to allow soft-reset per sub-controller and top-ctrl */ +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_BIT 10 /*LSB for 5bit vector */ +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_A_BIT 10 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_B_BIT 11 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_C_BIT 12 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_ACQ_BIT 13 +#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_TOP_BIT 14 +/* -- */ +#define HIVE_ISYS_GPREG_SRST_STR_MUX_BIT 15 +#define HIVE_ISYS_GPREG_SRST_CIO2AHB_BIT 16 +#define HIVE_ISYS_GPREG_SRST_GEN_SHORT_FIFO_BIT 17 +#define HIVE_ISYS_GPREG_SRST_WIDE_BUS_BIT 18 // includes CIO conv +#define HIVE_ISYS_GPREG_SRST_DMA_BIT 19 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_A_BIT 20 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_B_BIT 21 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_C_BIT 22 +#define HIVE_ISYS_GPREG_SRST_SF_CTRL_ACQ_BIT 23 +#define HIVE_ISYS_GPREG_SRST_CSI_BE_OUT_BIT 24 + +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_A_BIT 0 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_B_BIT 1 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_C_BIT 2 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_ACQ_BIT 3 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_DMA_BIT 4 +#define HIVE_ISYS_GPREG_SLV_REG_SRST_ISYS_CTRL_BIT 5 + +/* streaming monitor port id's */ +#define HIVE_ISYS_STR_MON_PORT_CAPA 0 +#define HIVE_ISYS_STR_MON_PORT_CAPB 1 +#define HIVE_ISYS_STR_MON_PORT_CAPC 2 +#define HIVE_ISYS_STR_MON_PORT_ACQ 3 +#define HIVE_ISYS_STR_MON_PORT_CSS_GENSH 4 +#define HIVE_ISYS_STR_MON_PORT_SF_GENSH 5 +#define HIVE_ISYS_STR_MON_PORT_SP2ISYS 6 +#define HIVE_ISYS_STR_MON_PORT_ISYS2SP 7 +#define HIVE_ISYS_STR_MON_PORT_PIXA 8 +#define HIVE_ISYS_STR_MON_PORT_PIXB 9 + +/* interrupt bit ID's */ +#define HIVE_ISYS_IRQ_CSI_SOF_BIT_ID 0 +#define HIVE_ISYS_IRQ_CSI_EOF_BIT_ID 1 +#define HIVE_ISYS_IRQ_CSI_SOL_BIT_ID 2 +#define HIVE_ISYS_IRQ_CSI_EOL_BIT_ID 3 +#define HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID 4 +#define HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID 5 +#define HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP 6 +#define HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP 7 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_A_UNDEF_PH 7*/ +#define HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP 8 +#define HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP 9 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_B_UNDEF_PH 10*/ +#define HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP 10 +#define HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP 11 +/*#define HIVE_ISYS_IRQ_CAP_UNIT_C_UNDEF_PH 13*/ +#define HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH 12 +/*#define HIVE_ISYS_IRQ_ACQ_UNIT_UNDEF_PH 15*/ +#define HIVE_ISYS_IRQ_INP_CTRL_CAPA 13 +#define HIVE_ISYS_IRQ_INP_CTRL_CAPB 14 +#define HIVE_ISYS_IRQ_INP_CTRL_CAPC 15 +#define HIVE_ISYS_IRQ_CIO2AHB 16 +#define HIVE_ISYS_IRQ_DMA_BIT_ID 17 +#define HIVE_ISYS_IRQ_STREAM_MON_BIT_ID 18 +#define HIVE_ISYS_IRQ_NUM_BITS 19 + +/* DMA */ +#define HIVE_ISYS_DMA_CHANNEL 0 +#define HIVE_ISYS_DMA_IBUF_DDR_CONN 0 +#define HIVE_ISYS_DMA_HEIGHT 1 +#define HIVE_ISYS_DMA_ELEMS 1 /* both master buses of same width */ +#define HIVE_ISYS_DMA_STRIDE 0 /* no stride required as height is fixed to 1 */ +#define HIVE_ISYS_DMA_CROP 0 /* no cropping */ +#define HIVE_ISYS_DMA_EXTENSION 0 /* no extension as elem width is same on both side */ + +#endif /* _input_system_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h new file mode 100644 index 0000000000000..ec6dd4487158e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _irq_controller_defs_h +#define _irq_controller_defs_h + +#define _HRT_IRQ_CONTROLLER_EDGE_REG_IDX 0 +#define _HRT_IRQ_CONTROLLER_MASK_REG_IDX 1 +#define _HRT_IRQ_CONTROLLER_STATUS_REG_IDX 2 +#define _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX 3 +#define _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX 4 +#define _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX 5 +#define _HRT_IRQ_CONTROLLER_STR_OUT_ENABLE_REG_IDX 6 + +#define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 + +#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h new file mode 100644 index 0000000000000..e00bc841d0f0d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp2400_support_h +#define _isp2400_support_h + +#ifndef ISP2400_VECTOR_TYPES +/* This typedef is to be able to include hive header files + in the host code which is useful in crun */ +typedef char *tmemvectors, *tmemvectoru, *tvector; +#endif + +#define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem1), addr, val) +#define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem2), addr, val) + +#define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) +#define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) + +#define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) +#define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) + +#if ISP_HAS_HIST + #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) + #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) +#endif + +#endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h new file mode 100644 index 0000000000000..033e23bcf672a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h @@ -0,0 +1,258 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* Version */ +#define RTL_VERSION + +/* Cell name */ +#define ISP_CELL_TYPE isp2401_mamoiada +#define ISP_VMEM simd_vmem +#define _HRT_ISP_VMEM isp2401_mamoiada_simd_vmem + +/* instruction pipeline depth */ +#define ISP_BRANCHDELAY 5 + +/* bus */ +#define ISP_BUS_WIDTH 32 +#define ISP_BUS_ADDR_WIDTH 32 +#define ISP_BUS_BURST_SIZE 1 + +/* data-path */ +#define ISP_SCALAR_WIDTH 32 +#define ISP_SLICE_NELEMS 4 +#define ISP_VEC_NELEMS 64 +#define ISP_VEC_ELEMBITS 14 +#define ISP_VEC_ELEM8BITS 16 +#define ISP_CLONE_DATAPATH_IS_16 1 + +/* memories */ +#define ISP_DMEM_DEPTH 4096 +#define ISP_DMEM_BSEL_DOWNSAMPLE 8 +#define ISP_VMEM_DEPTH 3072 +#define ISP_VMEM_BSEL_DOWNSAMPLE 8 +#define ISP_VMEM_ELEMBITS 14 +#define ISP_VMEM_ELEM_PRECISION 14 +#define ISP_VMEM_IS_BAMEM 1 +#if ISP_VMEM_IS_BAMEM + #define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 + #define ISP_VMEM_BAMEM_LATENCY 5 + #define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 + #define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 + #define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 + #define ISP_VMEM_BAMEM_LININT 0 + #define ISP_VMEM_BAMEM_DAP_BITS 3 + #define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 + #define ISP_VMEM_BAMEM_PID_BITS 3 + #define ISP_VMEM_BAMEM_OFFSET_BITS 19 + #define ISP_VMEM_BAMEM_ADDRESS_BITS 25 + #define ISP_VMEM_BAMEM_RID_BITS 4 + #define ISP_VMEM_BAMEM_TRANSPOSITION 1 + #define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 + #define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 + #define ISP_VMEM_BAMEM_LUT_ELEMS 16 + #define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 + #define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 + #define ISP_VMEM_BAMEM_SMART_FETCH 1 + #define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 +#endif /* ISP_VMEM_IS_BAMEM */ +#define ISP_PMEM_DEPTH 2048 +#define ISP_PMEM_WIDTH 640 +#define ISP_VAMEM_ADDRESS_BITS 12 +#define ISP_VAMEM_ELEMBITS 12 +#define ISP_VAMEM_DEPTH 2048 +#define ISP_VAMEM_ALIGNMENT 2 +#define ISP_VA_ADDRESS_WIDTH 896 +#define ISP_VEC_VALSU_LATENCY ISP_VEC_NELEMS +#define ISP_HIST_ADDRESS_BITS 12 +#define ISP_HIST_ALIGNMENT 4 +#define ISP_HIST_COMP_IN_PREC 12 +#define ISP_HIST_DEPTH 1024 +#define ISP_HIST_WIDTH 24 +#define ISP_HIST_COMPONENTS 4 + +/* program counter */ +#define ISP_PC_WIDTH 13 + +/* Template switches */ +#define ISP_SHIELD_INPUT_DMEM 0 +#define ISP_SHIELD_OUTPUT_DMEM 1 +#define ISP_SHIELD_INPUT_VMEM 0 +#define ISP_SHIELD_OUTPUT_VMEM 0 +#define ISP_SHIELD_INPUT_PMEM 1 +#define ISP_SHIELD_OUTPUT_PMEM 1 +#define ISP_SHIELD_INPUT_HIST 1 +#define ISP_SHIELD_OUTPUT_HIST 1 +/* When LUT is select the shielding is always on */ +#define ISP_SHIELD_INPUT_VAMEM 1 +#define ISP_SHIELD_OUTPUT_VAMEM 1 + +#define ISP_HAS_IRQ 1 +#define ISP_HAS_SOFT_RESET 1 +#define ISP_HAS_VEC_DIV 0 +#define ISP_HAS_VFU_W_2O 1 +#define ISP_HAS_DEINT3 1 +#define ISP_HAS_LUT 1 +#define ISP_HAS_HIST 1 +#define ISP_HAS_VALSU 1 +#define ISP_HAS_3rdVALSU 1 +#define ISP_VRF1_HAS_2P 1 + +#define ISP_SRU_GUARDING 1 +#define ISP_VLSU_GUARDING 1 + +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 + +#define ISP_SPLIT_VMUL_VADD_IS 0 +#define ISP_RFSPLIT_FPGA 0 + +/* RSN or Bus pipelining */ +#define ISP_RSN_PIPE 1 +#define ISP_VSF_BUS_PIPE 0 + +/* extra slave port to vmem */ +#define ISP_IF_VMEM 0 +#define ISP_GDC_VMEM 0 + +/* Streaming ports */ +#define ISP_IF 1 +#define ISP_IF_B 1 +#define ISP_GDC 1 +#define ISP_SCL 1 +#define ISP_GPFIFO 1 +#define ISP_SP 1 + +/* Removing Issue Slot(s) */ +#define ISP_HAS_NOT_SIMD_IS2 0 +#define ISP_HAS_NOT_SIMD_IS3 0 +#define ISP_HAS_NOT_SIMD_IS4 0 +#define ISP_HAS_NOT_SIMD_IS4_VADD 0 +#define ISP_HAS_NOT_SIMD_IS5 0 +#define ISP_HAS_NOT_SIMD_IS6 0 +#define ISP_HAS_NOT_SIMD_IS7 0 +#define ISP_HAS_NOT_SIMD_IS8 0 + +/* ICache */ +#define ISP_ICACHE 1 +#define ISP_ICACHE_ONLY 0 +#define ISP_ICACHE_PREFETCH 1 +#define ISP_ICACHE_INDEX_BITS 8 +#define ISP_ICACHE_SET_BITS 5 +#define ISP_ICACHE_BLOCKS_PER_SET_BITS 1 + +/* Experimental Flags */ +#define ISP_EXP_1 0 +#define ISP_EXP_2 0 +#define ISP_EXP_3 0 +#define ISP_EXP_4 0 +#define ISP_EXP_5 0 +#define ISP_EXP_6 0 + +/* Derived values */ +#define ISP_LOG2_PMEM_WIDTH 10 +#define ISP_VEC_WIDTH 896 +#define ISP_SLICE_WIDTH 56 +#define ISP_VMEM_WIDTH 896 +#define ISP_VMEM_ALIGN 128 +#if ISP_VMEM_IS_BAMEM + #define ISP_VMEM_ALIGN_ELEM 2 +#endif /* ISP_VMEM_IS_BAMEM */ +#define ISP_SIMDLSU 1 +#define ISP_LSU_IMM_BITS 12 + +/* convenient shortcuts for software*/ +#define ISP_NWAY ISP_VEC_NELEMS +#define NBITS ISP_VEC_ELEMBITS + +#define _isp_ceil_div(a,b) (((a)+(b)-1)/(b)) + +#ifdef C_RUN +#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64)*8) +#else +#define ISP_VEC_ALIGN ISP_VMEM_ALIGN +#endif + +/* HRT specific vector support */ +#define isp2401_mamoiada_vector_alignment ISP_VEC_ALIGN +#define isp2401_mamoiada_vector_elem_bits ISP_VMEM_ELEMBITS +#define isp2401_mamoiada_vector_elem_precision ISP_VMEM_ELEM_PRECISION +#define isp2401_mamoiada_vector_num_elems ISP_VEC_NELEMS + +/* register file sizes */ +#define ISP_RF0_SIZE 64 +#define ISP_RF1_SIZE 16 +#define ISP_RF2_SIZE 64 +#define ISP_RF3_SIZE 4 +#define ISP_RF4_SIZE 64 +#define ISP_RF5_SIZE 16 +#define ISP_RF6_SIZE 16 +#define ISP_RF7_SIZE 16 +#define ISP_RF8_SIZE 16 +#define ISP_RF9_SIZE 16 +#define ISP_RF10_SIZE 16 +#define ISP_RF11_SIZE 16 +#define ISP_VRF1_SIZE 32 +#define ISP_VRF2_SIZE 32 +#define ISP_VRF3_SIZE 32 +#define ISP_VRF4_SIZE 32 +#define ISP_VRF5_SIZE 32 +#define ISP_VRF6_SIZE 32 +#define ISP_VRF7_SIZE 32 +#define ISP_VRF8_SIZE 32 +#define ISP_SRF1_SIZE 4 +#define ISP_SRF2_SIZE 64 +#define ISP_SRF3_SIZE 64 +#define ISP_SRF4_SIZE 32 +#define ISP_SRF5_SIZE 64 +#define ISP_FRF0_SIZE 16 +#define ISP_FRF1_SIZE 4 +#define ISP_FRF2_SIZE 16 +#define ISP_FRF3_SIZE 4 +#define ISP_FRF4_SIZE 4 +#define ISP_FRF5_SIZE 8 +#define ISP_FRF6_SIZE 4 +/* register file read latency */ +#define ISP_VRF1_READ_LAT 1 +#define ISP_VRF2_READ_LAT 1 +#define ISP_VRF3_READ_LAT 1 +#define ISP_VRF4_READ_LAT 1 +#define ISP_VRF5_READ_LAT 1 +#define ISP_VRF6_READ_LAT 1 +#define ISP_VRF7_READ_LAT 1 +#define ISP_VRF8_READ_LAT 1 +#define ISP_SRF1_READ_LAT 1 +#define ISP_SRF2_READ_LAT 1 +#define ISP_SRF3_READ_LAT 1 +#define ISP_SRF4_READ_LAT 1 +#define ISP_SRF5_READ_LAT 1 +#define ISP_SRF5_READ_LAT 1 +/* immediate sizes */ +#define ISP_IS1_IMM_BITS 14 +#define ISP_IS2_IMM_BITS 13 +#define ISP_IS3_IMM_BITS 14 +#define ISP_IS4_IMM_BITS 14 +#define ISP_IS5_IMM_BITS 9 +#define ISP_IS6_IMM_BITS 16 +#define ISP_IS7_IMM_BITS 9 +#define ISP_IS8_IMM_BITS 16 +#define ISP_IS9_IMM_BITS 11 +/* fifo depths */ +#define ISP_IF_FIFO_DEPTH 0 +#define ISP_IF_B_FIFO_DEPTH 0 +#define ISP_DMA_FIFO_DEPTH 0 +#define ISP_OF_FIFO_DEPTH 0 +#define ISP_GDC_FIFO_DEPTH 0 +#define ISP_SCL_FIFO_DEPTH 0 +#define ISP_GPFIFO_FIFO_DEPTH 0 +#define ISP_SP_FIFO_DEPTH 0 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h new file mode 100644 index 0000000000000..5936207216271 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h @@ -0,0 +1,234 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp_acquisition_defs_h +#define _isp_acquisition_defs_h + +#define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ +#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 + +/* --------------------------------------------------*/ + +#define NOF_ACQ_IRQS 1 + +/* --------------------------------------------------*/ +/* FSM */ +/* --------------------------------------------------*/ +#define MEM2STREAM_FSM_STATE_BITS 2 +#define ACQ_SYNCHRONIZER_FSM_STATE_BITS 2 + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +#define NOF_ACQ_REGS 12 + +// Register id's of MMIO slave accesible registers +#define ACQ_START_ADDR_REG_ID 0 +#define ACQ_MEM_REGION_SIZE_REG_ID 1 +#define ACQ_NUM_MEM_REGIONS_REG_ID 2 +#define ACQ_INIT_REG_ID 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 +#define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 +#define ACQ_LAST_COMMAND_REG_ID 6 +#define ACQ_NEXT_COMMAND_REG_ID 7 +#define ACQ_LAST_ACKNOWLEDGE_REG_ID 8 +#define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 +#define ACQ_FSM_STATE_INFO_REG_ID 10 +#define ACQ_INT_CNTR_INFO_REG_ID 11 + +// Register width +#define ACQ_START_ADDR_REG_WIDTH 9 +#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ACQ_INIT_REG_WIDTH 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define ACQ_LAST_COMMAND_REG_WIDTH 32 +#define ACQ_NEXT_COMMAND_REG_WIDTH 32 +#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS *3)) +#define ACQ_INT_CNTR_INFO_REG_WIDTH 32 + +/* register reset value */ +#define ACQ_START_ADDR_REG_RSTVAL 0 +#define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ACQ_INIT_REG_RSTVAL 0 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 +#define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 +#define ACQ_LAST_COMMAND_REG_RSTVAL 0 +#define ACQ_NEXT_COMMAND_REG_RSTVAL 0 +#define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 +#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 + +/* bit definitions */ +#define ACQ_INIT_RST_REG_BIT 0 +#define ACQ_INIT_RESYNC_BIT 2 +#define ACQ_INIT_RST_IDX ACQ_INIT_RST_REG_BIT +#define ACQ_INIT_RST_BITS 1 +#define ACQ_INIT_RESYNC_IDX ACQ_INIT_RESYNC_BIT +#define ACQ_INIT_RESYNC_BITS 1 + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ +#define ACQ_TOKEN_ID_LSB 0 +#define ACQ_TOKEN_ID_MSB 3 +#define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 +#define ACQ_TOKEN_ID_IDX 0 +#define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH +#define ACQ_INIT_CMD_INIT_IDX 4 +#define ACQ_INIT_CMD_INIT_BITS 3 +#define ACQ_CMD_START_ADDR_IDX 4 +#define ACQ_CMD_START_ADDR_BITS 9 +#define ACQ_CMD_NOFWORDS_IDX 13 +#define ACQ_CMD_NOFWORDS_BITS 9 +#define ACQ_MEM_REGION_ID_IDX 22 +#define ACQ_MEM_REGION_ID_BITS 9 +#define ACQ_PACKET_LENGTH_TOKEN_MSB 21 +#define ACQ_PACKET_LENGTH_TOKEN_LSB 13 +#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 +#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_LSB 4 +#define ACQ_PACKET_CH_ID_TOKEN_MSB 11 +#define ACQ_PACKET_CH_ID_TOKEN_LSB 10 +#define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ +#define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ + + +/* Command tokens IDs */ +#define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b +#define ACQ_READ_REGION_TOKEN_ID 1 //0001b +#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b +#define ACQ_INIT_TOKEN_ID 8 //1000b + +/* Acknowledge token IDs */ +#define ACQ_READ_REGION_ACK_TOKEN_ID 0 //0000b +#define ACQ_END_OF_PACKET_TOKEN_ID 4 //0100b +#define ACQ_END_OF_REGION_TOKEN_ID 5 //0101b +#define ACQ_SOP_MISMATCH_TOKEN_ID 6 //0110b +#define ACQ_UNDEF_PH_TOKEN_ID 7 //0111b + +#define ACQ_TOKEN_MEMREGIONID_MSB 30 +#define ACQ_TOKEN_MEMREGIONID_LSB 22 +#define ACQ_TOKEN_NOFWORDS_MSB 21 +#define ACQ_TOKEN_NOFWORDS_LSB 13 +#define ACQ_TOKEN_STARTADDR_MSB 12 +#define ACQ_TOKEN_STARTADDR_LSB 4 + + +/* --------------------------------------------------*/ +/* MIPI */ +/* --------------------------------------------------*/ + +#define WORD_COUNT_WIDTH 16 +#define PKT_CODE_WIDTH 6 +#define CHN_NO_WIDTH 2 +#define ERROR_INFO_WIDTH 8 + +#define LONG_PKTCODE_MAX 63 +#define LONG_PKTCODE_MIN 16 +#define SHORT_PKTCODE_MAX 15 + +#define EOF_CODE 1 + +/* --------------------------------------------------*/ +/* Packet Info */ +/* --------------------------------------------------*/ +#define ACQ_START_OF_FRAME 0 +#define ACQ_END_OF_FRAME 1 +#define ACQ_START_OF_LINE 2 +#define ACQ_END_OF_LINE 3 +#define ACQ_LINE_PAYLOAD 4 +#define ACQ_GEN_SH_PKT 5 + + +/* bit definition */ +#define ACQ_PKT_TYPE_IDX 16 +#define ACQ_PKT_TYPE_BITS 6 +#define ACQ_PKT_SOP_IDX 32 +#define ACQ_WORD_CNT_IDX 0 +#define ACQ_WORD_CNT_BITS 16 +#define ACQ_PKT_INFO_IDX 16 +#define ACQ_PKT_INFO_BITS 8 +#define ACQ_HEADER_DATA_IDX 0 +#define ACQ_HEADER_DATA_BITS 16 +#define ACQ_ACK_TOKEN_ID_IDX ACQ_TOKEN_ID_IDX +#define ACQ_ACK_TOKEN_ID_BITS ACQ_TOKEN_ID_BITS +#define ACQ_ACK_NOFWORDS_IDX 13 +#define ACQ_ACK_NOFWORDS_BITS 9 +#define ACQ_ACK_PKT_LEN_IDX 4 +#define ACQ_ACK_PKT_LEN_BITS 16 + + +/* --------------------------------------------------*/ +/* Packet Data Type */ +/* --------------------------------------------------*/ + + +#define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ +#define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ +#define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ +#define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ +#define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ +#define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ +#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ +#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ +#define ACQ_SOL_DATA 2 /* 00 0010 line start */ +#define ACQ_EOL_DATA 3 /* 00 0011 line end */ +#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_RESERVED_DATA_TYPE_MIN 56 +#define ACQ_RESERVED_DATA_TYPE_MAX 63 +#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 +#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 +#define ACQ_YUV_RESERVED_DATA_TYPE 27 +#define ACQ_RGB_RESERVED_DATA_TYPE_MIN 37 +#define ACQ_RGB_RESERVED_DATA_TYPE_MAX 39 +#define ACQ_RAW_RESERVED_DATA_TYPE_MIN 46 +#define ACQ_RAW_RESERVED_DATA_TYPE_MAX 47 + +/* --------------------------------------------------*/ + +#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h new file mode 100644 index 0000000000000..aa413df022f2e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h @@ -0,0 +1,310 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _isp_capture_defs_h +#define _isp_capture_defs_h + +#define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ +#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ +#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM/8 ) +#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ +#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM + +//#define CAPT_RCV_ACK 1 +//#define CAPT_WRT_ACK 2 +//#define CAPT_IRQ_ACK 3 + +/* --------------------------------------------------*/ + +#define NOF_IRQS 2 + +/* --------------------------------------------------*/ +/* REGISTER INFO */ +/* --------------------------------------------------*/ + +// Number of registers +#define CAPT_NOF_REGS 16 + +// Register id's of MMIO slave accesible registers +#define CAPT_START_MODE_REG_ID 0 +#define CAPT_START_ADDR_REG_ID 1 +#define CAPT_MEM_REGION_SIZE_REG_ID 2 +#define CAPT_NUM_MEM_REGIONS_REG_ID 3 +#define CAPT_INIT_REG_ID 4 +#define CAPT_START_REG_ID 5 +#define CAPT_STOP_REG_ID 6 + +#define CAPT_PACKET_LENGTH_REG_ID 7 +#define CAPT_RECEIVED_LENGTH_REG_ID 8 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 +#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 +#define CAPT_LAST_COMMAND_REG_ID 11 +#define CAPT_NEXT_COMMAND_REG_ID 12 +#define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 +#define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 +#define CAPT_FSM_STATE_INFO_REG_ID 15 + +// Register width +#define CAPT_START_MODE_REG_WIDTH 1 +//#define CAPT_START_ADDR_REG_WIDTH 9 +//#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 +//#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 +#define CAPT_INIT_REG_WIDTH (22 + 4) + +#define CAPT_START_REG_WIDTH 1 +#define CAPT_STOP_REG_WIDTH 1 + +/* --------------------------------------------------*/ +/* FSM */ +/* --------------------------------------------------*/ +#define CAPT_WRITE2MEM_FSM_STATE_BITS 2 +#define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 + + +#define CAPT_PACKET_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define CAPT_LAST_COMMAND_REG_WIDTH 32 +/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ +#define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) + +//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 +//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 + +/* register reset value */ +#define CAPT_START_MODE_REG_RSTVAL 0 +#define CAPT_START_ADDR_REG_RSTVAL 0 +#define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 +#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define CAPT_INIT_REG_RSTVAL 0 + +#define CAPT_START_REG_RSTVAL 0 +#define CAPT_STOP_REG_RSTVAL 0 + +#define CAPT_PACKET_LENGTH_REG_RSTVAL 0 +#define CAPT_RECEIVED_LENGTH_REG_RSTVAL 0 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 +#define CAPT_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 +#define CAPT_LAST_COMMAND_REG_RSTVAL 0 +#define CAPT_NEXT_COMMAND_REG_RSTVAL 0 +#define CAPT_LAST_ACKNOWLEDGE_REG_RSTVAL 0 +#define CAPT_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define CAPT_FSM_STATE_INFO_REG_RSTVAL 0 + +/* bit definitions */ +#define CAPT_INIT_RST_REG_BIT 0 +#define CAPT_INIT_FLUSH_BIT 1 +#define CAPT_INIT_RESYNC_BIT 2 +#define CAPT_INIT_RESTART_BIT 3 +#define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 +#define CAPT_INIT_RESTART_MEM_ADDR_MSB 14 +#define CAPT_INIT_RESTART_MEM_REGION_LSB 15 +#define CAPT_INIT_RESTART_MEM_REGION_MSB 25 + + +#define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT +#define CAPT_INIT_RST_REG_BITS 1 +#define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT +#define CAPT_INIT_FLUSH_BITS 1 +#define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT +#define CAPT_INIT_RESYNC_BITS 1 +#define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT +#define CAPT_INIT_RESTART_BITS 1 +#define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB +#define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) +#define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB +#define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) + + + +/* --------------------------------------------------*/ +/* TOKEN INFO */ +/* --------------------------------------------------*/ +#define CAPT_TOKEN_ID_LSB 0 +#define CAPT_TOKEN_ID_MSB 3 +#define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ + +/* Command tokens IDs */ +#define CAPT_START_TOKEN_ID 0 /* 0000b */ +#define CAPT_STOP_TOKEN_ID 1 /* 0001b */ +#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ +#define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ +#define CAPT_INIT_TOKEN_ID 8 /* 1000b */ + +#define CAPT_START_TOKEN_BIT 0 +#define CAPT_STOP_TOKEN_BIT 0 +#define CAPT_FREEZE_TOKEN_BIT 0 +#define CAPT_RESUME_TOKEN_BIT 0 +#define CAPT_INIT_TOKEN_BIT 0 + +/* Acknowledge token IDs */ +#define CAPT_END_OF_PACKET_RECEIVED_TOKEN_ID 0 /* 0000b */ +#define CAPT_END_OF_PACKET_WRITTEN_TOKEN_ID 1 /* 0001b */ +#define CAPT_END_OF_REGION_WRITTEN_TOKEN_ID 2 /* 0010b */ +#define CAPT_FLUSH_DONE_TOKEN_ID 3 /* 0011b */ +#define CAPT_PREMATURE_SOP_TOKEN_ID 4 /* 0100b */ +#define CAPT_MISSING_SOP_TOKEN_ID 5 /* 0101b */ +#define CAPT_UNDEF_PH_TOKEN_ID 6 /* 0110b */ +#define CAPT_STOP_ACK_TOKEN_ID 7 /* 0111b */ + +#define CAPT_PACKET_LENGTH_TOKEN_MSB 19 +#define CAPT_PACKET_LENGTH_TOKEN_LSB 4 +#define CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB 20 +#define CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB 4 +#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB 25 +#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 +#define CAPT_PACKET_CH_ID_TOKEN_MSB 27 +#define CAPT_PACKET_CH_ID_TOKEN_LSB 26 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 + +/* bit definition */ +#define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB +#define CAPT_CMD_BITS (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) +#define CAPT_SOP_IDX 32 +#define CAPT_SOP_BITS 1 +#define CAPT_PKT_INFO_IDX 16 +#define CAPT_PKT_INFO_BITS 8 +#define CAPT_PKT_TYPE_IDX 0 +#define CAPT_PKT_TYPE_BITS 6 +#define CAPT_HEADER_DATA_IDX 0 +#define CAPT_HEADER_DATA_BITS 16 +#define CAPT_PKT_DATA_IDX 0 +#define CAPT_PKT_DATA_BITS 32 +#define CAPT_WORD_CNT_IDX 0 +#define CAPT_WORD_CNT_BITS 16 +#define CAPT_ACK_TOKEN_ID_IDX 0 +#define CAPT_ACK_TOKEN_ID_BITS 4 +//#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB +//#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) +//#define CAPT_ACK_PKT_INFO_IDX 20 +//#define CAPT_ACK_PKT_INFO_BITS 8 +//#define CAPT_ACK_MEM_REG_ID1_IDX 20 /* for capt_end_of_packet_written */ +//#define CAPT_ACK_MEM_REG_ID2_IDX 4 /* for capt_end_of_region_written */ +#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB +#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) +#define CAPT_ACK_SUPER_PKT_LEN_IDX CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB +#define CAPT_ACK_SUPER_PKT_LEN_BITS (CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB - CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB + 1) +#define CAPT_ACK_PKT_INFO_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB +#define CAPT_ACK_PKT_INFO_BITS (CAPT_PACKET_CH_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) +#define CAPT_ACK_MEM_REGION_ID_IDX CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB +#define CAPT_ACK_MEM_REGION_ID_BITS (CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB - CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB + 1) +#define CAPT_ACK_PKT_TYPE_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB +#define CAPT_ACK_PKT_TYPE_BITS (CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) +#define CAPT_INIT_TOKEN_INIT_IDX 4 +#define CAPT_INIT_TOKEN_INIT_BITS 22 + + +/* --------------------------------------------------*/ +/* MIPI */ +/* --------------------------------------------------*/ + +#define CAPT_WORD_COUNT_WIDTH 16 +#define CAPT_PKT_CODE_WIDTH 6 +#define CAPT_CHN_NO_WIDTH 2 +#define CAPT_ERROR_INFO_WIDTH 8 + +#define LONG_PKTCODE_MAX 63 +#define LONG_PKTCODE_MIN 16 +#define SHORT_PKTCODE_MAX 15 + + +/* --------------------------------------------------*/ +/* Packet Info */ +/* --------------------------------------------------*/ +#define CAPT_START_OF_FRAME 0 +#define CAPT_END_OF_FRAME 1 +#define CAPT_START_OF_LINE 2 +#define CAPT_END_OF_LINE 3 +#define CAPT_LINE_PAYLOAD 4 +#define CAPT_GEN_SH_PKT 5 + + +/* --------------------------------------------------*/ +/* Packet Data Type */ +/* --------------------------------------------------*/ + +#define CAPT_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ +#define CAPT_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ +#define CAPT_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ +#define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ +#define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ +#define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ +#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ +#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ +#define CAPT_SOL_DATA 2 /* 00 0010 line start */ +#define CAPT_EOL_DATA 3 /* 00 0011 line end */ +#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_RESERVED_DATA_TYPE_MIN 56 +#define CAPT_RESERVED_DATA_TYPE_MAX 63 +#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 +#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 +#define CAPT_YUV_RESERVED_DATA_TYPE 27 +#define CAPT_RGB_RESERVED_DATA_TYPE_MIN 37 +#define CAPT_RGB_RESERVED_DATA_TYPE_MAX 39 +#define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 +#define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 + + +/* --------------------------------------------------*/ +/* Capture Unit State */ +/* --------------------------------------------------*/ +#define CAPT_FREE_RUN 0 +#define CAPT_NO_SYNC 1 +#define CAPT_SYNC_SWP 2 +#define CAPT_SYNC_MWP 3 +#define CAPT_SYNC_WAIT 4 +#define CAPT_FREEZE 5 +#define CAPT_RUN 6 + + +/* --------------------------------------------------*/ + +#endif /* _isp_capture_defs_h */ + + + + + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/mmu_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/mmu_defs.h new file mode 100644 index 0000000000000..c038f39ffd25e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/mmu_defs.h @@ -0,0 +1,23 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _mmu_defs_h +#define _mmu_defs_h + +#define _HRT_MMU_INVALIDATE_TLB_REG_IDX 0 +#define _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX 1 + +#define _HRT_MMU_REG_ALIGN 4 + +#endif /* _mmu_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/scalar_processor_2400_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/scalar_processor_2400_params.h new file mode 100644 index 0000000000000..9b6c2893d9507 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/scalar_processor_2400_params.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _scalar_processor_2400_params_h +#define _scalar_processor_2400_params_h + +#include "cell_params.h" + +#endif /* _scalar_processor_2400_params_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/str2mem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/str2mem_defs.h new file mode 100644 index 0000000000000..1cb62444cf68b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/str2mem_defs.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _ST2MEM_DEFS_H +#define _ST2MEM_DEFS_H + +#define _STR2MEM_CRUN_BIT 0x100000 +#define _STR2MEM_CMD_BITS 0x0F0000 +#define _STR2MEM_COUNT_BITS 0x00FFFF + +#define _STR2MEM_BLOCKS_CMD 0xA0000 +#define _STR2MEM_PACKETS_CMD 0xB0000 +#define _STR2MEM_BYTES_CMD 0xC0000 +#define _STR2MEM_BYTES_FROM_PACKET_CMD 0xD0000 + +#define _STR2MEM_SOFT_RESET_REG_ID 0 +#define _STR2MEM_INPUT_ENDIANNESS_REG_ID 1 +#define _STR2MEM_OUTPUT_ENDIANNESS_REG_ID 2 +#define _STR2MEM_BIT_SWAPPING_REG_ID 3 +#define _STR2MEM_BLOCK_SYNC_LEVEL_REG_ID 4 +#define _STR2MEM_PACKET_SYNC_LEVEL_REG_ID 5 +#define _STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID 6 +#define _STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID 7 +#define _STR2MEM_EN_STAT_UPDATE_ID 8 + +#define _STR2MEM_REG_ALIGN 4 + +#endif /* _ST2MEM_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/streaming_to_mipi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/streaming_to_mipi_defs.h new file mode 100644 index 0000000000000..60143b8743a2d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/streaming_to_mipi_defs.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _streaming_to_mipi_defs_h +#define _streaming_to_mipi_defs_h + +#define HIVE_STR_TO_MIPI_VALID_A_BIT 0 +#define HIVE_STR_TO_MIPI_VALID_B_BIT 1 +#define HIVE_STR_TO_MIPI_SOL_BIT 2 +#define HIVE_STR_TO_MIPI_EOL_BIT 3 +#define HIVE_STR_TO_MIPI_SOF_BIT 4 +#define HIVE_STR_TO_MIPI_EOF_BIT 5 +#define HIVE_STR_TO_MIPI_CH_ID_LSB 6 + +#define HIVE_STR_TO_MIPI_DATA_A_LSB (HIVE_STR_TO_MIPI_VALID_B_BIT + 1) + +#endif /* _streaming_to_mipi_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h new file mode 100644 index 0000000000000..d2b8972b0d9ec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _timed_controller_defs_h +#define _timed_controller_defs_h + +#define _HRT_TIMED_CONTROLLER_CMD_REG_IDX 0 + +#define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 + +#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h new file mode 100644 index 0000000000000..19b19ef484f95 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h @@ -0,0 +1,99 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _HRT_VAR_H +#define _HRT_VAR_H + +#include "version.h" +#include "system_api.h" +#include "hive_types.h" + +#define hrt_int_type_of_char char +#define hrt_int_type_of_uchar unsigned char +#define hrt_int_type_of_short short +#define hrt_int_type_of_ushort unsigned short +#define hrt_int_type_of_int int +#define hrt_int_type_of_uint unsigned int +#define hrt_int_type_of_long long +#define hrt_int_type_of_ulong unsigned long +#define hrt_int_type_of_ptr unsigned int + +#define hrt_host_type_of_char char +#define hrt_host_type_of_uchar unsigned char +#define hrt_host_type_of_short short +#define hrt_host_type_of_ushort unsigned short +#define hrt_host_type_of_int int +#define hrt_host_type_of_uint unsigned int +#define hrt_host_type_of_long long +#define hrt_host_type_of_ulong unsigned long +#define hrt_host_type_of_ptr void* + +#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type)/8) +#define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) +#define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) + +#ifdef C_RUN + +#ifdef C_RUN_DYNAMIC_LINK_PROGRAMS +extern void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); +#define _hrt_cell_get_crun_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) +#define _hrt_cell_get_crun_indexed_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) +#else +#define _hrt_cell_get_crun_symbol(cell,sym) (&sym) +#define _hrt_cell_get_crun_indexed_symbol(cell,sym) (sym) +#endif // C_RUN_DYNAMIC_LINK_PROGRAMS + +#define hrt_scalar_store(cell, type, var, data) \ + ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var)) = (data)) +#define hrt_scalar_load(cell, type, var) \ + ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var))) + +#define hrt_indexed_store(cell, type, array, index, data) \ + ((((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) = (data)) +#define hrt_indexed_load(cell, type, array, index) \ + (((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) + +#else /* C_RUN */ + +#define hrt_scalar_store(cell, type, var, data) \ + HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + cell, \ + HRTCAT(HIVE_MEM_,var), \ + HRTCAT(HIVE_ADDR_,var), \ + (HRT_INT_TYPE(type))(data)) + +#define hrt_scalar_load(cell, type, var) \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + cell, \ + HRTCAT(HIVE_MEM_,var), \ + HRTCAT(HIVE_ADDR_,var))) + +#define hrt_indexed_store(cell, type, array, index, data) \ + HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + cell, \ + HRTCAT(HIVE_MEM_,array), \ + (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)), \ + (HRT_INT_TYPE(type))(data)) + +#define hrt_indexed_load(cell, type, array, index) \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + cell, \ + HRTCAT(HIVE_MEM_,array), \ + (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)))) + +#endif /* C_RUN */ + +#endif /* _HRT_VAR_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/version.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/version.h new file mode 100644 index 0000000000000..bbc4948baea9b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/version.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef HRT_VERSION_H +#define HRT_VERSION_H +#define HRT_VERSION_MAJOR 1 +#define HRT_VERSION_MINOR 4 +#define HRT_VERSION 1_4 +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c new file mode 100644 index 0000000000000..09f0780f0c800 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c @@ -0,0 +1,3634 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _sp_map_h_ +#define _sp_map_h_ + + +#ifndef _hrt_dummy_use_blob_sp +#define _hrt_dummy_use_blob_sp() +#endif + +#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) + +#ifndef ISP2401 +/* function input_system_acquisition_stop: ADE */ +#else +/* function input_system_acquisition_stop: AD8 */ +#endif + +#ifndef ISP2401 +/* function longjmp: 684E */ +#else +/* function longjmp: 69C1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_HIVE_IF_SRST_MASK +#define HIVE_MEM_HIVE_IF_SRST_MASK scalar_processor_2400_dmem +#define HIVE_ADDR_HIVE_IF_SRST_MASK 0x1C8 +#define HIVE_SIZE_HIVE_IF_SRST_MASK 16 +#else +#endif +#endif +#define HIVE_MEM_sp_HIVE_IF_SRST_MASK scalar_processor_2400_dmem +#define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 +#define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 + +#ifndef ISP2401 +/* function tmpmem_init_dmem: 6599 */ +#else +/* function tmpmem_init_dmem: 66D4 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_receive_ack: 5EDD */ +#else +/* function ia_css_isys_sp_token_map_receive_ack: 6018 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_addr_B: 3345 */ +#else +/* function ia_css_dmaproxy_sp_set_addr_B: 3539 */ + +/* function ia_css_pipe_data_init_tagger_resources: A4F */ +#endif + +/* function debug_buffer_set_ddr_addr: DD */ + +#ifndef ISP2401 +/* function receiver_port_reg_load: AC2 */ +#else +/* function receiver_port_reg_load: ABC */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_mipi +#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_mipi 0x631C +#else +#define HIVE_ADDR_vbuf_mipi 0x6378 +#endif +#define HIVE_SIZE_vbuf_mipi 12 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_mipi 0x631C +#else +#define HIVE_ADDR_sp_vbuf_mipi 0x6378 +#endif +#define HIVE_SIZE_sp_vbuf_mipi 12 + +#ifndef ISP2401 +/* function ia_css_event_sp_decode: 3536 */ +#else +/* function ia_css_event_sp_decode: 372A */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_get_size: 48BE */ +#else +/* function ia_css_queue_get_size: 4B46 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_load: 4EFF */ +#else +/* function ia_css_queue_load: 515D */ +#endif + +#ifndef ISP2401 +/* function setjmp: 6857 */ +#else +/* function setjmp: 69CA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue +#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x4684 +#else +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x46CC +#endif +#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x4684 +#else +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x46CC +#endif +#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_wait_for_ack: 6E07 */ +#else +/* function ia_css_dmaproxy_sp_wait_for_ack: 6F4B */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_func: 5124 */ +#else +/* function ia_css_sp_rawcopy_func: 5382 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_marked: 2A10 */ +#else +/* function ia_css_tagger_buf_sp_pop_marked: 2BB2 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_stage +#define HIVE_MEM_isp_stage scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_stage 0x5C00 +#else +#define HIVE_ADDR_isp_stage 0x5C60 +#endif +#define HIVE_SIZE_isp_stage 832 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_stage 0x5C00 +#else +#define HIVE_ADDR_sp_isp_stage 0x5C60 +#endif +#define HIVE_SIZE_sp_isp_stage 832 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_raw +#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_raw 0x2F4 +#else +#define HIVE_ADDR_vbuf_raw 0x30C +#endif +#define HIVE_SIZE_vbuf_raw 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_raw 0x2F4 +#else +#define HIVE_ADDR_sp_vbuf_raw 0x30C +#endif +#define HIVE_SIZE_sp_vbuf_raw 4 + +#ifndef ISP2401 +/* function ia_css_sp_bin_copy_func: 504B */ +#else +/* function ia_css_sp_bin_copy_func: 52A9 */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_item_store: 4C4D */ +#else +/* function ia_css_queue_item_store: 4EAB */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 + +/* function sp_start_isp: 45D */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_binary_group +#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_binary_group 0x5FF0 +#else +#define HIVE_ADDR_sp_binary_group 0x6050 +#endif +#define HIVE_SIZE_sp_binary_group 32 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_binary_group 0x5FF0 +#else +#define HIVE_ADDR_sp_sp_binary_group 0x6050 +#endif +#define HIVE_SIZE_sp_sp_binary_group 32 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_sw_state +#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sw_state 0x62AC +#else +#define HIVE_ADDR_sp_sw_state 0x6308 +#endif +#define HIVE_SIZE_sp_sw_state 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_sw_state 0x62AC +#else +#define HIVE_ADDR_sp_sp_sw_state 0x6308 +#endif +#define HIVE_SIZE_sp_sp_sw_state 4 + +#ifndef ISP2401 +/* function ia_css_thread_sp_main: D5B */ +#else +/* function ia_css_thread_sp_main: D50 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_internal_buffers: 373C */ +#else +/* function ia_css_ispctrl_sp_init_internal_buffers: 396B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_psys_event_queue_handle +#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4B54 +#else +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4BB0 +#endif +#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4B54 +#else +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4BB0 +#endif +#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue +#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x4698 +#else +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x46E0 +#endif +#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x4698 +#else +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x46E0 +#endif +#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 + +#ifndef ISP2401 +/* function ia_css_tagger_sp_propagate_frame: 2429 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_stop_copy_preview +#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem +#define HIVE_ADDR_sp_stop_copy_preview 0x6290 +#define HIVE_SIZE_sp_stop_copy_preview 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_stop_copy_preview 0x6290 +#define HIVE_SIZE_sp_sp_stop_copy_preview 4 +#else +/* function ia_css_tagger_sp_propagate_frame: 2479 */ +#endif + +#ifndef ISP2401 +/* function input_system_reg_load: B17 */ +#else +/* function input_system_reg_load: B11 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_handles +#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_handles 0x6328 +#else +#define HIVE_ADDR_vbuf_handles 0x6384 +#endif +#define HIVE_SIZE_vbuf_handles 960 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_handles 0x6328 +#else +#define HIVE_ADDR_sp_vbuf_handles 0x6384 +#endif +#define HIVE_SIZE_sp_vbuf_handles 960 + +#ifndef ISP2401 +/* function ia_css_queue_store: 4DB3 */ + +/* function ia_css_sp_flash_register: 2C45 */ +#else +/* function ia_css_queue_store: 5011 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_dummy_function: 566B */ +#else +/* function ia_css_sp_flash_register: 2DE7 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_create: 5B50 */ +#else +/* function ia_css_isys_sp_backend_create: 5C8B */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_init: 184C */ +#else +/* function ia_css_pipeline_sp_init: 1886 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_configure: 2319 */ +#else +/* function ia_css_tagger_sp_configure: 2369 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_end_binary: 357F */ +#else +/* function ia_css_ispctrl_sp_end_binary: 3773 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs +#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 +#else +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#endif +#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 + +#ifndef ISP2401 +/* function receiver_port_reg_store: AC9 */ +#else +/* function receiver_port_reg_store: AC3 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_is_pending_mask +#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem +#define HIVE_ADDR_event_is_pending_mask 0x5C +#define HIVE_SIZE_event_is_pending_mask 44 +#else +#endif +#endif +#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem +#define HIVE_ADDR_sp_event_is_pending_mask 0x5C +#define HIVE_SIZE_sp_event_is_pending_mask 44 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cb_elems_frame +#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cb_elems_frame 0x46AC +#else +#define HIVE_ADDR_sp_all_cb_elems_frame 0x46F4 +#endif +#define HIVE_SIZE_sp_all_cb_elems_frame 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46AC +#else +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46F4 +#endif +#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_isys_event_queue_handle +#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4B74 +#else +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4BD0 +#endif +#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4B74 +#else +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4BD0 +#endif +#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host_sp_com +#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host_sp_com 0x4114 +#else +#define HIVE_ADDR_host_sp_com 0x4134 +#endif +#define HIVE_SIZE_host_sp_com 220 +#else +#endif +#endif +#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host_sp_com 0x4114 +#else +#define HIVE_ADDR_sp_host_sp_com 0x4134 +#endif +#define HIVE_SIZE_sp_host_sp_com 220 + +#ifndef ISP2401 +/* function ia_css_queue_get_free_space: 4A12 */ +#else +/* function ia_css_queue_get_free_space: 4C70 */ +#endif + +#ifndef ISP2401 +/* function exec_image_pipe: 6C4 */ +#else +/* function exec_image_pipe: 658 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_init_dmem_data +#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_init_dmem_data 0x62B0 +#else +#define HIVE_ADDR_sp_init_dmem_data 0x630C +#endif +#define HIVE_SIZE_sp_init_dmem_data 24 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_init_dmem_data 0x62B0 +#else +#define HIVE_ADDR_sp_sp_init_dmem_data 0x630C +#endif +#define HIVE_SIZE_sp_sp_init_dmem_data 24 + +#ifndef ISP2401 +/* function ia_css_sp_metadata_start: 592D */ +#else +/* function ia_css_sp_metadata_start: 5A68 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_init_buffer_queues: 2CB4 */ +#else +/* function ia_css_bufq_sp_init_buffer_queues: 2E56 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_stop: 182F */ +#else +/* function ia_css_pipeline_sp_stop: 1869 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_connect_pipes: 2803 */ +#else +/* function ia_css_tagger_sp_connect_pipes: 2853 */ +#endif + +#ifndef ISP2401 +/* function sp_isys_copy_wait: 70D */ +#else +/* function sp_isys_copy_wait: 6A1 */ +#endif + +/* function is_isp_debug_buffer_full: 337 */ + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 32C8 */ +#else +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 34A9 */ +#endif + +#ifndef ISP2401 +/* function encode_and_post_timer_event: A30 */ +#else +/* function encode_and_post_timer_event: 9C4 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_per_frame_data +#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_per_frame_data 0x41F0 +#else +#define HIVE_ADDR_sp_per_frame_data 0x4210 +#endif +#define HIVE_SIZE_sp_per_frame_data 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_per_frame_data 0x41F0 +#else +#define HIVE_ADDR_sp_sp_per_frame_data 0x4210 +#endif +#define HIVE_SIZE_sp_sp_per_frame_data 4 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_vbuf_dequeue: 62ED */ +#else +/* function ia_css_rmgr_sp_vbuf_dequeue: 6428 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_psys_event_queue_handle +#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4B80 +#else +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4BDC +#endif +#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4B80 +#else +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4BDC +#endif +#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_xmem_bin_addr +#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_xmem_bin_addr 0x41F4 +#else +#define HIVE_ADDR_xmem_bin_addr 0x4214 +#endif +#define HIVE_SIZE_xmem_bin_addr 4 +#else +#endif +#endif +#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_xmem_bin_addr 0x41F4 +#else +#define HIVE_ADDR_sp_xmem_bin_addr 0x4214 +#endif +#define HIVE_SIZE_sp_xmem_bin_addr 4 + +#ifndef ISP2401 +/* function tmr_clock_init: 13FB */ +#else +/* function tmr_clock_init: 141C */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_run: 141C */ +#else +/* function ia_css_pipeline_sp_run: 143D */ +#endif + +#ifndef ISP2401 +/* function memcpy: 68F7 */ +#else +/* function memcpy: 6A6A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GP_DEVICE_BASE +#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_GP_DEVICE_BASE 0x2FC +#else +#define HIVE_ADDR_GP_DEVICE_BASE 0x314 +#endif +#define HIVE_SIZE_GP_DEVICE_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x2FC +#else +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x314 +#endif +#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue +#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E0 +#else +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E4 +#endif +#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E0 +#else +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E4 +#endif +#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 + +#ifndef ISP2401 +/* function input_system_reg_store: B1E */ +#else +/* function input_system_reg_store: B18 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_start: 5D66 */ +#else +/* function ia_css_isys_sp_frontend_start: 5EA1 */ +#endif + +#ifndef ISP2401 +/* function ia_css_uds_sp_scale_params: 6600 */ +#else +/* function ia_css_uds_sp_scale_params: 6773 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_increase_size: E40 */ +#else +/* function ia_css_circbuf_increase_size: E35 */ +#endif + +#ifndef ISP2401 +/* function __divu: 6875 */ +#else +/* function __divu: 69E8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_get_state: C83 */ +#else +/* function ia_css_thread_sp_get_state: C78 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_cont_capt_stop +#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_cont_capt_stop 0x46BC +#else +#define HIVE_ADDR_sem_for_cont_capt_stop 0x4704 +#endif +#define HIVE_SIZE_sem_for_cont_capt_stop 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x46BC +#else +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x4704 +#endif +#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 + +#ifndef ISP2401 +/* function thread_fiber_sp_main: E39 */ +#else +/* function thread_fiber_sp_main: E2E */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_pipe_thread +#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_pipe_thread 0x4800 +#define HIVE_SIZE_sp_isp_pipe_thread 340 +#else +#define HIVE_ADDR_sp_isp_pipe_thread 0x4848 +#define HIVE_SIZE_sp_isp_pipe_thread 360 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4800 +#define HIVE_SIZE_sp_sp_isp_pipe_thread 340 +#else +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4848 +#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_handle_parameter_sets: 128A */ +#else +/* function ia_css_parambuf_sp_handle_parameter_sets: 127F */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_set_state: 595C */ +#else +/* function ia_css_spctrl_sp_set_state: 5A97 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_signal: 6AF7 */ +#else +/* function ia_css_thread_sem_sp_signal: 6C6C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_IRQ_BASE +#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_IRQ_BASE 0x2C +#define HIVE_SIZE_IRQ_BASE 16 +#else +#endif +#endif +#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_IRQ_BASE 0x2C +#define HIVE_SIZE_sp_IRQ_BASE 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_TIMED_CTRL_BASE +#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 +#define HIVE_SIZE_TIMED_CTRL_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 +#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 + +#ifndef ISP2401 +/* function ia_css_isys_sp_isr: 6FDC */ + +/* function ia_css_isys_sp_generate_exp_id: 60FE */ +#else +/* function ia_css_isys_sp_isr: 7139 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_init: 61E8 */ +#else +/* function ia_css_isys_sp_generate_exp_id: 6239 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_init: 6BC8 */ +#else +/* function ia_css_rmgr_sp_init: 6323 */ +#endif + +#ifndef ISP2401 +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_is_isp_requested +#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_is_isp_requested 0x308 +#define HIVE_SIZE_is_isp_requested 4 +#else +#endif +#endif +#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_sp_is_isp_requested 0x308 +#define HIVE_SIZE_sp_is_isp_requested 4 +#else +/* function ia_css_thread_sem_sp_init: 6D3B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_cb_frame +#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_cb_frame 0x46D0 +#else +#define HIVE_ADDR_sem_for_reading_cb_frame 0x4718 +#endif +#define HIVE_SIZE_sem_for_reading_cb_frame 40 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x46D0 +#else +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x4718 +#endif +#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_execute: 3230 */ +#else +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_is_isp_requested +#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_is_isp_requested 0x320 +#define HIVE_SIZE_is_isp_requested 4 +#else +#endif +#endif +#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem +#define HIVE_ADDR_sp_is_isp_requested 0x320 +#define HIVE_SIZE_sp_is_isp_requested 4 + +/* function ia_css_dmaproxy_sp_execute: 340F */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_is_empty: 48F9 */ +#else +/* function ia_css_queue_is_empty: 7098 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_has_stopped: 1825 */ +#else +/* function ia_css_pipeline_sp_has_stopped: 185F */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_extract: F44 */ +#else +/* function ia_css_circbuf_extract: F39 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_is_locked_from_start: 2B26 */ +#else +/* function ia_css_tagger_buf_sp_is_locked_from_start: 2CC8 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_current_sp_thread +#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem +#define HIVE_ADDR_current_sp_thread 0x1DC +#define HIVE_SIZE_current_sp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem +#define HIVE_ADDR_sp_current_sp_thread 0x1DC +#define HIVE_SIZE_sp_current_sp_thread 4 + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_get_spid: 5963 */ +#else +/* function ia_css_spctrl_sp_get_spid: 5A9E */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_reset_buffers: 2D3B */ +#else +/* function ia_css_bufq_sp_reset_buffers: 2EDD */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read_byte_addr: 6E35 */ +#else +/* function ia_css_dmaproxy_sp_read_byte_addr: 6F79 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_uninit: 61E1 */ +#else +/* function ia_css_rmgr_sp_uninit: 631C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_stack +#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_stack 0x164 +#define HIVE_SIZE_sp_threads_stack 28 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_stack 0x164 +#define HIVE_SIZE_sp_sp_threads_stack 28 + +#ifndef ISP2401 +/* function ia_css_circbuf_peek: F26 */ +#else +/* function ia_css_circbuf_peek: F1B */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_wait_for_in_param: 1053 */ +#else +/* function ia_css_parambuf_sp_wait_for_in_param: 1048 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_get_exp_id: 5FC6 */ +#else +/* function ia_css_isys_sp_token_map_get_exp_id: 6101 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cb_elems_param +#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cb_elems_param 0x46F8 +#else +#define HIVE_ADDR_sp_all_cb_elems_param 0x4740 +#endif +#define HIVE_SIZE_sp_all_cb_elems_param 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x46F8 +#else +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x4740 +#endif +#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_pipeline_sp_curr_binary_id +#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1EC +#else +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1F0 +#endif +#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 +#else +#endif +#endif +#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1EC +#else +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1F0 +#endif +#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_frame_desc +#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4708 +#else +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4750 +#endif +#define HIVE_SIZE_sp_all_cbs_frame_desc 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4708 +#else +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4750 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 + +#ifndef ISP2401 +/* function sp_isys_copy_func_v2: 706 */ +#else +/* function sp_isys_copy_func_v2: 69A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_cb_param +#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_cb_param 0x4710 +#else +#define HIVE_ADDR_sem_for_reading_cb_param 0x4758 +#endif +#define HIVE_SIZE_sem_for_reading_cb_param 40 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4710 +#else +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4758 +#endif +#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 + +#ifndef ISP2401 +/* function ia_css_queue_get_used_space: 49C6 */ +#else +/* function ia_css_queue_get_used_space: 4C24 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_cont_capt_start +#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_cont_capt_start 0x4738 +#else +#define HIVE_ADDR_sem_for_cont_capt_start 0x4780 +#endif +#define HIVE_SIZE_sem_for_cont_capt_start 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4738 +#else +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4780 +#endif +#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_tmp_heap +#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_tmp_heap 0x6010 +#else +#define HIVE_ADDR_tmp_heap 0x6070 +#endif +#define HIVE_SIZE_tmp_heap 640 +#else +#endif +#endif +#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_tmp_heap 0x6010 +#else +#define HIVE_ADDR_sp_tmp_heap 0x6070 +#endif +#define HIVE_SIZE_sp_tmp_heap 640 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_get_num_vbuf: 64F1 */ +#else +/* function ia_css_rmgr_sp_get_num_vbuf: 662C */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_output_compute_dma_info: 3F62 */ +#else +/* function ia_css_ispctrl_sp_output_compute_dma_info: 41A5 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_lock_exp_id: 20E6 */ +#else +/* function ia_css_tagger_sp_lock_exp_id: 2136 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 + +#ifndef ISP2401 +/* function ia_css_queue_is_full: 4A5D */ +#else +/* function ia_css_queue_is_full: 4CBB */ +#endif + +/* function debug_buffer_init_isp: E4 */ + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_uninit: 5D20 */ +#else +/* function ia_css_isys_sp_frontend_uninit: 5E5B */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_exp_id_is_locked: 201C */ +#else +/* function ia_css_tagger_sp_exp_id_is_locked: 206C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem +#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 +#else +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#endif +#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 +#else +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#endif +#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_dump: 62C8 */ +#else +/* function ia_css_rmgr_sp_refcount_dump: 6403 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_pipe_threads +#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_pipe_threads 0x150 +#define HIVE_SIZE_sp_pipe_threads 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_pipe_threads 0x150 +#define HIVE_SIZE_sp_sp_pipe_threads 20 + +#ifndef ISP2401 +/* function sp_event_proxy_func: 71B */ +#else +/* function sp_event_proxy_func: 6AF */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_isys_event_queue_handle +#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4BDC +#else +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4C38 +#endif +#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4BDC +#else +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4C38 +#endif +#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 + +#ifndef ISP2401 +/* function ia_css_thread_sp_yield: 6A70 */ +#else +/* function ia_css_thread_sp_yield: 6BEA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_param_desc +#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_param_desc 0x474C +#else +#define HIVE_ADDR_sp_all_cbs_param_desc 0x4794 +#endif +#define HIVE_SIZE_sp_all_cbs_param_desc 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x474C +#else +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x4794 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb +#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 +#else +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#endif +#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 +#else +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#endif +#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 + +#ifndef ISP2401 +/* function ia_css_thread_sp_fork: D10 */ +#else +/* function ia_css_thread_sp_fork: D05 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_destroy: 280D */ +#else +/* function ia_css_tagger_sp_destroy: 285D */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_vmem_read: 31D0 */ +#else +/* function ia_css_dmaproxy_sp_vmem_read: 33AF */ +#endif + +#ifndef ISP2401 +/* function ia_css_ifmtr_sp_init: 614F */ +#else +/* function ia_css_ifmtr_sp_init: 628A */ +#endif + +#ifndef ISP2401 +/* function initialize_sp_group: 6D4 */ +#else +/* function initialize_sp_group: 668 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_peek: 2932 */ +#else +/* function ia_css_tagger_buf_sp_peek: 2AD4 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_init: D3C */ +#else +/* function ia_css_thread_sp_init: D31 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_reset_exp_id: 60F6 */ +#else +/* function ia_css_isys_sp_reset_exp_id: 6231 */ +#endif + +#ifndef ISP2401 +/* function qos_scheduler_update_fps: 65F0 */ +#else +/* function qos_scheduler_update_fps: 6763 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_set_stream_base_addr: 4637 */ +#else +/* function ia_css_ispctrl_sp_set_stream_base_addr: 4892 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_DMEM_BASE +#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_DMEM_BASE 0x10 +#define HIVE_SIZE_ISP_DMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 +#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_SP_DMEM_BASE +#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_SP_DMEM_BASE 0x4 +#define HIVE_SIZE_SP_DMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 +#define HIVE_SIZE_sp_SP_DMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read: 3246 */ +#else +/* function __ia_css_queue_is_empty_text: 4B81 */ + +/* function ia_css_dmaproxy_sp_read: 3425 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_raw_copy_line_count +#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_raw_copy_line_count 0x2C8 +#else +#define HIVE_ADDR_raw_copy_line_count 0x2E0 +#endif +#define HIVE_SIZE_raw_copy_line_count 4 +#else +#endif +#endif +#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_raw_copy_line_count 0x2C8 +#else +#define HIVE_ADDR_sp_raw_copy_line_count 0x2E0 +#endif +#define HIVE_SIZE_sp_raw_copy_line_count 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle +#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4BE8 +#else +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4C44 +#endif +#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4BE8 +#else +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4C44 +#endif +#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 + +#ifndef ISP2401 +/* function ia_css_queue_peek: 493C */ +#else +/* function ia_css_queue_peek: 4B9A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt +#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4A94 +#else +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4AF0 +#endif +#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4A94 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4AF0 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_can_send_token_mask +#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem +#define HIVE_ADDR_event_can_send_token_mask 0x88 +#define HIVE_SIZE_event_can_send_token_mask 44 +#else +#endif +#endif +#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem +#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 +#define HIVE_SIZE_sp_event_can_send_token_mask 44 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_thread +#define HIVE_MEM_isp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_thread 0x5F40 +#else +#define HIVE_ADDR_isp_thread 0x5FA0 +#endif +#define HIVE_SIZE_isp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_thread 0x5F40 +#else +#define HIVE_ADDR_sp_isp_thread 0x5FA0 +#endif +#define HIVE_SIZE_sp_isp_thread 4 + +#ifndef ISP2401 +/* function encode_and_post_sp_event_non_blocking: A78 */ +#else +/* function encode_and_post_sp_event_non_blocking: A0C */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_destroy: 5DF8 */ +#else +/* function ia_css_isys_sp_frontend_destroy: 5F33 */ +#endif + +/* function is_ddr_debug_buffer_full: 2CC */ + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_stop: 5D38 */ +#else +/* function ia_css_isys_sp_frontend_stop: 5E73 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_init: 6094 */ +#else +/* function ia_css_isys_sp_token_map_init: 61CF */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2982 */ +#else +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2B24 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_fiber +#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_fiber 0x19C +#define HIVE_SIZE_sp_threads_fiber 28 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_fiber 0x19C +#define HIVE_SIZE_sp_sp_threads_fiber 28 + +#ifndef ISP2401 +/* function encode_and_post_sp_event: A01 */ +#else +/* function encode_and_post_sp_event: 995 */ +#endif + +/* function debug_enqueue_ddr: EE */ + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_init_vbuf: 6283 */ +#else +/* function ia_css_rmgr_sp_refcount_init_vbuf: 63BE */ +#endif + +#ifndef ISP2401 +/* function dmaproxy_sp_read_write: 6EE4 */ +#else +/* function dmaproxy_sp_read_write: 7017 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer +#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 +#else +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#endif +#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 +#else +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#endif +#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host2sp_buffer_queue_handle +#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4BF4 +#else +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4C50 +#endif +#define HIVE_SIZE_host2sp_buffer_queue_handle 480 +#else +#endif +#endif +#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4BF4 +#else +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4C50 +#endif +#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_in_service +#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3178 +#else +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3198 +#endif +#define HIVE_SIZE_ia_css_flash_sp_in_service 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3178 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3198 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_process: 6BF0 */ +#else +/* function ia_css_dmaproxy_sp_process: 6D63 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_mark_from_end: 2C0A */ +#else +/* function ia_css_tagger_buf_sp_mark_from_end: 2DAC */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_rcv_acquire_ack: 5A05 */ +#else +/* function ia_css_isys_sp_backend_rcv_acquire_ack: 5B40 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_pre_acquire_request: 5A1B */ +#else +/* function ia_css_isys_sp_backend_pre_acquire_request: 5B56 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_cs: 366C */ +#else +/* function ia_css_ispctrl_sp_init_cs: 386E */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_init: 5971 */ +#else +/* function ia_css_spctrl_sp_init: 5AAC */ +#endif + +#ifndef ISP2401 +/* function sp_event_proxy_init: 730 */ +#else +/* function sp_event_proxy_init: 6C4 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_output +#define HIVE_MEM_sp_output scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_output 0x41F8 +#else +#define HIVE_ADDR_sp_output 0x4218 +#endif +#define HIVE_SIZE_sp_output 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_output 0x41F8 +#else +#define HIVE_ADDR_sp_sp_output 0x4218 +#endif +#define HIVE_SIZE_sp_sp_output 16 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues +#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC +#else +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_CTRL_BASE +#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_CTRL_BASE 0x8 +#define HIVE_SIZE_ISP_CTRL_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 +#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_INPUT_FORMATTER_BASE +#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C +#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 +#else +#endif +#endif +#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C +#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 + +#ifndef ISP2401 +/* function sp_dma_proxy_reset_channels: 34A0 */ +#else +/* function sp_dma_proxy_reset_channels: 3694 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_acquire: 5B26 */ +#else +/* function ia_css_isys_sp_backend_acquire: 5C61 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_update_size: 2901 */ +#else +/* function ia_css_tagger_sp_update_size: 2AA3 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue +#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x511C +#else +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x5178 +#endif +#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x511C +#else +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x5178 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 + +#ifndef ISP2401 +/* function thread_fiber_sp_create: DA8 */ +#else +/* function thread_fiber_sp_create: D9D */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_increments: 3332 */ +#else +/* function ia_css_dmaproxy_sp_set_increments: 3526 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_writing_cb_frame +#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_writing_cb_frame 0x4754 +#else +#define HIVE_ADDR_sem_for_writing_cb_frame 0x479C +#endif +#define HIVE_SIZE_sem_for_writing_cb_frame 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x4754 +#else +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x479C +#endif +#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 + +#ifndef ISP2401 +/* function receiver_reg_store: AD7 */ +#else +/* function receiver_reg_store: AD1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_writing_cb_param +#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_writing_cb_param 0x4768 +#else +#define HIVE_ADDR_sem_for_writing_cb_param 0x47B0 +#endif +#define HIVE_SIZE_sem_for_writing_cb_param 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x4768 +#else +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x47B0 +#endif +#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 + +/* function sp_start_isp_entry: 453 */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifdef HIVE_ADDR_sp_start_isp_entry +#endif +#define HIVE_ADDR_sp_start_isp_entry 0x453 +#endif +#define HIVE_ADDR_sp_sp_start_isp_entry 0x453 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unmark_all: 2B8E */ +#else +/* function ia_css_tagger_buf_sp_unmark_all: 2D30 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unmark_from_start: 2BCF */ +#else +/* function ia_css_tagger_buf_sp_unmark_from_start: 2D71 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_channel_acquire: 34CC */ +#else +/* function ia_css_dmaproxy_sp_channel_acquire: 36C0 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_add_num_vbuf: 64CD */ +#else +/* function ia_css_rmgr_sp_add_num_vbuf: 6608 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_create: 60DD */ +#else +/* function ia_css_isys_sp_token_map_create: 6218 */ +#endif + +#ifndef ISP2401 +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 319C */ +#else +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 337B */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_acquire_buf_elem: 1FF4 */ +#else +/* function ia_css_tagger_sp_acquire_buf_elem: 2044 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_is_dynamic_buffer: 3085 */ +#else +/* function ia_css_bufq_sp_is_dynamic_buffer: 3227 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_group +#define HIVE_MEM_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_group 0x4208 +#define HIVE_SIZE_sp_group 1144 +#else +#define HIVE_ADDR_sp_group 0x4228 +#define HIVE_SIZE_sp_group 1184 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_group 0x4208 +#define HIVE_SIZE_sp_sp_group 1144 +#else +#define HIVE_ADDR_sp_sp_group 0x4228 +#define HIVE_SIZE_sp_sp_group 1184 +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_event_proxy_thread +#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_event_proxy_thread 0x4954 +#define HIVE_SIZE_sp_event_proxy_thread 68 +#else +#define HIVE_ADDR_sp_event_proxy_thread 0x49B0 +#define HIVE_SIZE_sp_event_proxy_thread 72 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x4954 +#define HIVE_SIZE_sp_sp_event_proxy_thread 68 +#else +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x49B0 +#define HIVE_SIZE_sp_sp_event_proxy_thread 72 +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_kill: CD6 */ +#else +/* function ia_css_thread_sp_kill: CCB */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_create: 28BB */ +#else +/* function ia_css_tagger_sp_create: 2A51 */ +#endif + +#ifndef ISP2401 +/* function tmpmem_acquire_dmem: 657A */ +#else +/* function tmpmem_acquire_dmem: 66B5 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_MMU_BASE +#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_MMU_BASE 0x24 +#define HIVE_SIZE_MMU_BASE 8 +#else +#endif +#endif +#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_MMU_BASE 0x24 +#define HIVE_SIZE_sp_MMU_BASE 8 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_channel_release: 34B8 */ +#else +/* function ia_css_dmaproxy_sp_channel_release: 36AC */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_is_idle: 3498 */ +#else +/* function ia_css_dmaproxy_sp_is_idle: 368C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_qos_start +#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_qos_start 0x477C +#else +#define HIVE_ADDR_sem_for_qos_start 0x47C4 +#endif +#define HIVE_SIZE_sem_for_qos_start 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_qos_start 0x477C +#else +#define HIVE_ADDR_sp_sem_for_qos_start 0x47C4 +#endif +#define HIVE_SIZE_sp_sem_for_qos_start 20 + +#ifndef ISP2401 +/* function isp_hmem_load: B55 */ +#else +/* function isp_hmem_load: B4F */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_release_buf_elem: 1FD0 */ +#else +/* function ia_css_tagger_sp_release_buf_elem: 2020 */ +#endif + +#ifndef ISP2401 +/* function ia_css_eventq_sp_send: 350E */ +#else +/* function ia_css_eventq_sp_send: 3702 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_isys_sp_error_cnt +#define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x62D4 +#else +#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x6330 +#endif +#define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x62D4 +#else +#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x6330 +#endif +#define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_unlock_from_start: 2ABE */ +#else +/* function ia_css_tagger_buf_sp_unlock_from_start: 2C60 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_debug_buffer_ddr_address +#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem +#define HIVE_ADDR_debug_buffer_ddr_address 0xBC +#define HIVE_SIZE_debug_buffer_ddr_address 4 +#else +#endif +#endif +#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem +#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC +#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 + +#ifndef ISP2401 +/* function sp_isys_copy_request: 714 */ +#else +/* function sp_isys_copy_request: 6A8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 635D */ +#else +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 6498 */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_set_priority: CCE */ +#else +/* function ia_css_thread_sp_set_priority: CC3 */ +#endif + +#ifndef ISP2401 +/* function sizeof_hmem: BFC */ +#else +/* function sizeof_hmem: BF6 */ +#endif + +#ifndef ISP2401 +/* function tmpmem_release_dmem: 6569 */ +#else +/* function tmpmem_release_dmem: 66A4 */ +#endif + +/* function cnd_input_system_cfg: 392 */ + +#ifndef ISP2401 +/* function __ia_css_sp_rawcopy_func_critical: 6F65 */ +#else +/* function __ia_css_sp_rawcopy_func_critical: 70C2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_width_exception: 331D */ +#else +/* function __ia_css_dmaproxy_sp_process_text: 331F */ +#endif + +#ifndef ISP2401 +/* function sp_event_assert: 8B1 */ +#else +/* function ia_css_dmaproxy_sp_set_width_exception: 3511 */ +#endif + +#ifndef ISP2401 +/* function ia_css_flash_sp_init_internal_params: 2CA9 */ +#else +/* function sp_event_assert: 845 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 29C4 */ +#else +/* function ia_css_flash_sp_init_internal_params: 2E4B */ +#endif + +#ifndef ISP2401 +/* function __modu: 68BB */ +#else +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 2B66 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_isp_vector: 31A2 */ +#else +/* function __modu: 6A2E */ + +/* function ia_css_dmaproxy_sp_init_isp_vector: 3381 */ +#endif + +/* function isp_vamem_store: 0 */ + +#ifdef ISP2401 +/* function ia_css_tagger_sp_set_copy_pipe: 2A48 */ + +#endif +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GDC_BASE +#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_GDC_BASE 0x44 +#define HIVE_SIZE_GDC_BASE 8 +#else +#endif +#endif +#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_GDC_BASE 0x44 +#define HIVE_SIZE_sp_GDC_BASE 8 + +#ifndef ISP2401 +/* function ia_css_queue_local_init: 4C27 */ +#else +/* function ia_css_queue_local_init: 4E85 */ +#endif + +#ifndef ISP2401 +/* function sp_event_proxy_callout_func: 6988 */ +#else +/* function sp_event_proxy_callout_func: 6AFB */ +#endif + +#ifndef ISP2401 +/* function qos_scheduler_schedule_stage: 65C1 */ +#else +/* function qos_scheduler_schedule_stage: 670F */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads +#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x49E0 +#else +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x4A40 +#endif +#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x49E0 +#else +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x4A40 +#endif +#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_threads_stack_size +#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem +#define HIVE_ADDR_sp_threads_stack_size 0x180 +#define HIVE_SIZE_sp_threads_stack_size 28 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_threads_stack_size 0x180 +#define HIVE_SIZE_sp_sp_threads_stack_size 28 + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_isp_done_row_striping: 3F48 */ +#else +/* function ia_css_ispctrl_sp_isp_done_row_striping: 418B */ +#endif + +#ifndef ISP2401 +/* function __ia_css_isys_sp_isr_text: 5E22 */ +#else +/* function __ia_css_isys_sp_isr_text: 5F5D */ +#endif + +#ifndef ISP2401 +/* function ia_css_queue_dequeue: 4AA5 */ +#else +/* function ia_css_queue_dequeue: 4D03 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_configure_channel: 6E4C */ +#else +/* function is_qos_standalone_mode: 66EA */ + +/* function ia_css_dmaproxy_sp_configure_channel: 6F90 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_current_thread_fiber_sp +#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_current_thread_fiber_sp 0x49E8 +#else +#define HIVE_ADDR_current_thread_fiber_sp 0x4A44 +#endif +#define HIVE_SIZE_current_thread_fiber_sp 4 +#else +#endif +#endif +#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x49E8 +#else +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x4A44 +#endif +#define HIVE_SIZE_sp_current_thread_fiber_sp 4 + +#ifndef ISP2401 +/* function ia_css_circbuf_pop: FD8 */ +#else +/* function ia_css_circbuf_pop: FCD */ +#endif + +#ifndef ISP2401 +/* function memset: 693A */ +#else +/* function memset: 6AAD */ +#endif + +/* function irq_raise_set_token: B6 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_GPIO_BASE +#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_GPIO_BASE 0x3C +#define HIVE_SIZE_GPIO_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_GPIO_BASE 0x3C +#define HIVE_SIZE_sp_GPIO_BASE 4 + +#ifndef ISP2401 +/* function ia_css_pipeline_acc_stage_enable: 17F0 */ +#else +/* function ia_css_pipeline_acc_stage_enable: 1818 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_unlock_exp_id: 2041 */ +#else +/* function ia_css_tagger_sp_unlock_exp_id: 2091 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_ph +#define HIVE_MEM_isp_ph scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_ph 0x62E4 +#else +#define HIVE_ADDR_isp_ph 0x6340 +#endif +#define HIVE_SIZE_isp_ph 28 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_ph 0x62E4 +#else +#define HIVE_ADDR_sp_isp_ph 0x6340 +#endif +#define HIVE_SIZE_sp_isp_ph 28 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_flush: 6022 */ +#else +/* function ia_css_isys_sp_token_map_flush: 615D */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_ds: 37CB */ +#else +/* function ia_css_ispctrl_sp_init_ds: 39FA */ +#endif + +#ifndef ISP2401 +/* function get_xmem_base_addr_raw: 3B78 */ +#else +/* function get_xmem_base_addr_raw: 3DB3 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_param +#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_param 0x4790 +#else +#define HIVE_ADDR_sp_all_cbs_param 0x47D8 +#endif +#define HIVE_SIZE_sp_all_cbs_param 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_param 0x4790 +#else +#define HIVE_ADDR_sp_sp_all_cbs_param 0x47D8 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_param 16 + +#ifndef ISP2401 +/* function ia_css_circbuf_create: 1026 */ +#else +/* function ia_css_circbuf_create: 101B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_sp_group +#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_sp_group 0x47A0 +#else +#define HIVE_ADDR_sem_for_sp_group 0x47E8 +#endif +#define HIVE_SIZE_sem_for_sp_group 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_sp_group 0x47A0 +#else +#define HIVE_ADDR_sp_sem_for_sp_group 0x47E8 +#endif +#define HIVE_SIZE_sp_sem_for_sp_group 20 + +#ifndef ISP2401 +/* function ia_css_framebuf_sp_wait_for_in_frame: 64F8 */ +#else +/* function __ia_css_dmaproxy_sp_configure_channel_text: 34F0 */ + +/* function ia_css_framebuf_sp_wait_for_in_frame: 6633 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_tag_frame: 5588 */ +#else +/* function ia_css_sp_rawcopy_tag_frame: 57C9 */ +#endif + +#ifndef ISP2401 +/* function isp_hmem_clear: B25 */ +#else +/* function isp_hmem_clear: B1F */ +#endif + +#ifndef ISP2401 +/* function ia_css_framebuf_sp_release_in_frame: 653B */ +#else +/* function ia_css_framebuf_sp_release_in_frame: 6676 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_snd_acquire_request: 5A78 */ +#else +/* function ia_css_isys_sp_backend_snd_acquire_request: 5BB3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_is_full: 5EA9 */ +#else +/* function ia_css_isys_sp_token_map_is_full: 5FE4 */ +#endif + +#ifndef ISP2401 +/* function input_system_acquisition_run: AF9 */ +#else +/* function input_system_acquisition_run: AF3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_start_binary: 364A */ +#else +/* function ia_css_ispctrl_sp_start_binary: 384C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs +#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 +#else +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 + +#ifndef ISP2401 +/* function ia_css_eventq_sp_recv: 34E0 */ +#else +/* function ia_css_eventq_sp_recv: 36D4 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_pool +#define HIVE_MEM_isp_pool scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_pool 0x2E8 +#else +#define HIVE_ADDR_isp_pool 0x300 +#endif +#define HIVE_SIZE_isp_pool 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_pool 0x2E8 +#else +#define HIVE_ADDR_sp_isp_pool 0x300 +#endif +#define HIVE_SIZE_sp_isp_pool 4 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_rel_gen: 622A */ +#else +/* function ia_css_rmgr_sp_rel_gen: 6365 */ + +/* function ia_css_tagger_sp_unblock_clients: 2919 */ +#endif + +#ifndef ISP2401 +/* function css_get_frame_processing_time_end: 1FC0 */ +#else +/* function css_get_frame_processing_time_end: 2010 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_event_any_pending_mask +#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_event_any_pending_mask 0x300 +#else +#define HIVE_ADDR_event_any_pending_mask 0x318 +#endif +#define HIVE_SIZE_event_any_pending_mask 8 +#else +#endif +#endif +#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_event_any_pending_mask 0x300 +#else +#define HIVE_ADDR_sp_event_any_pending_mask 0x318 +#endif +#define HIVE_SIZE_sp_event_any_pending_mask 8 + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_push: 5A2F */ +#else +/* function ia_css_isys_sp_backend_push: 5B6A */ +#endif + +/* function sh_css_decode_tag_descr: 352 */ + +/* function debug_enqueue_isp: 27B */ + +#ifndef ISP2401 +/* function qos_scheduler_update_stage_budget: 65AF */ +#else +/* function qos_scheduler_update_stage_budget: 66F2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_uninit: 596A */ +#else +/* function ia_css_spctrl_sp_uninit: 5AA5 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE +#define HIVE_MEM_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem +#define HIVE_ADDR_HIVE_IF_SWITCH_CODE 0x1D8 +#define HIVE_SIZE_HIVE_IF_SWITCH_CODE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_HIVE_IF_SWITCH_CODE 0x1D8 +#define HIVE_SIZE_sp_HIVE_IF_SWITCH_CODE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_lock_from_start: 2AF2 */ +#else +/* function ia_css_tagger_buf_sp_lock_from_start: 2C94 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_isp_idle +#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_isp_idle 0x47B4 +#else +#define HIVE_ADDR_sem_for_isp_idle 0x47FC +#endif +#define HIVE_SIZE_sem_for_isp_idle 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_isp_idle 0x47B4 +#else +#define HIVE_ADDR_sp_sem_for_isp_idle 0x47FC +#endif +#define HIVE_SIZE_sp_sem_for_isp_idle 20 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_write_byte_addr: 31FF */ +#else +/* function ia_css_dmaproxy_sp_write_byte_addr: 33DE */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init: 3176 */ +#else +/* function ia_css_dmaproxy_sp_init: 3355 */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2D7B */ +#else +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2F1D */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_VAMEM_BASE +#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 +#define HIVE_SIZE_ISP_VAMEM_BASE 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 +#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger +#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x6294 +#else +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x62F0 +#endif +#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x6294 +#else +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x62F0 +#endif +#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 + +#ifndef ISP2401 +/* function ia_css_queue_item_load: 4D19 */ +#else +/* function ia_css_queue_item_load: 4F77 */ +#endif + +#ifndef ISP2401 +/* function ia_css_spctrl_sp_get_state: 5955 */ +#else +/* function ia_css_spctrl_sp_get_state: 5A90 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_uninit: 603F */ +#else +/* function ia_css_isys_sp_token_map_uninit: 617A */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_callout_sp_thread +#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_callout_sp_thread 0x49DC +#else +#define HIVE_ADDR_callout_sp_thread 0x1E0 +#endif +#define HIVE_SIZE_callout_sp_thread 4 +#else +#endif +#endif +#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_callout_sp_thread 0x49DC +#else +#define HIVE_ADDR_sp_callout_sp_thread 0x1E0 +#endif +#define HIVE_SIZE_sp_callout_sp_thread 4 + +#ifndef ISP2401 +/* function thread_fiber_sp_init: E2F */ +#else +/* function thread_fiber_sp_init: E24 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_SP_PMEM_BASE +#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_SP_PMEM_BASE 0x0 +#define HIVE_SIZE_SP_PMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 +#define HIVE_SIZE_sp_SP_PMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_snd_acquire_req: 5FAF */ +#else +/* function ia_css_isys_sp_token_map_snd_acquire_req: 60EA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_input_stream_format +#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_input_stream_format 0x40F8 +#else +#define HIVE_ADDR_sp_isp_input_stream_format 0x4118 +#endif +#define HIVE_SIZE_sp_isp_input_stream_format 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x40F8 +#else +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x4118 +#endif +#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 + +#ifndef ISP2401 +/* function __mod: 68A7 */ +#else +/* function __mod: 6A1A */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_dmem_channel: 3260 */ +#else +/* function ia_css_dmaproxy_sp_init_dmem_channel: 343F */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_join: CFF */ +#else +/* function ia_css_thread_sp_join: CF4 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_add_command: 6F4F */ +#else +/* function ia_css_dmaproxy_sp_add_command: 7082 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_metadata_thread_func: 5809 */ +#else +/* function ia_css_sp_metadata_thread_func: 5968 */ +#endif + +#ifndef ISP2401 +/* function __sp_event_proxy_func_critical: 6975 */ +#else +/* function __sp_event_proxy_func_critical: 6AE8 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_metadata_wait: 591C */ +#else +/* function ia_css_sp_metadata_wait: 5A57 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_peek_from_start: F08 */ +#else +/* function ia_css_circbuf_peek_from_start: EFD */ +#endif + +#ifndef ISP2401 +/* function ia_css_event_sp_encode: 356B */ +#else +/* function ia_css_event_sp_encode: 375F */ +#endif + +#ifndef ISP2401 +/* function ia_css_thread_sp_run: D72 */ +#else +/* function ia_css_thread_sp_run: D67 */ +#endif + +#ifndef ISP2401 +/* function sp_isys_copy_func: 6F6 */ +#else +/* function sp_isys_copy_func: 68A */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_flush: 5A98 */ +#else +/* function ia_css_isys_sp_backend_flush: 5BD3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_frame_exists: 59B4 */ +#else +/* function ia_css_isys_sp_backend_frame_exists: 5AEF */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_init_isp_memories: 47A2 */ +#else +/* function ia_css_sp_isp_param_init_isp_memories: 4A2A */ +#endif + +#ifndef ISP2401 +/* function register_isr: 8A9 */ +#else +/* function register_isr: 83D */ +#endif + +/* function irq_raise: C8 */ + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_mmu_invalidate: 313D */ +#else +/* function ia_css_dmaproxy_sp_mmu_invalidate: 32E5 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS +#define HIVE_MEM_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem +#define HIVE_ADDR_HIVE_IF_SRST_ADDRESS 0x1B8 +#define HIVE_SIZE_HIVE_IF_SRST_ADDRESS 16 +#else +#endif +#endif +#define HIVE_MEM_sp_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 +#define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 + +#ifndef ISP2401 +/* function pipeline_sp_initialize_stage: 1924 */ +#else +/* function pipeline_sp_initialize_stage: 195E */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_isys_sp_frontend_states +#define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x62C8 +#else +#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x6324 +#endif +#define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x62C8 +#else +#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x6324 +#endif +#define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6E1E */ +#else +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6F62 */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_done_ds: 37B2 */ +#else +/* function ia_css_ispctrl_sp_done_ds: 39E1 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_get_mem_inits: 477D */ +#else +/* function ia_css_sp_isp_param_get_mem_inits: 4A05 */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_init_buffer_queues: 13D0 */ +#else +/* function ia_css_parambuf_sp_init_buffer_queues: 13F1 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_pfp_spref +#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_pfp_spref 0x2F0 +#else +#define HIVE_ADDR_vbuf_pfp_spref 0x308 +#endif +#define HIVE_SIZE_vbuf_pfp_spref 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x2F0 +#else +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x308 +#endif +#define HIVE_SIZE_sp_vbuf_pfp_spref 4 + +#ifndef ISP2401 +/* function input_system_cfg: ABB */ +#else +/* function input_system_cfg: AB5 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_HMEM_BASE +#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_HMEM_BASE 0x20 +#define HIVE_SIZE_ISP_HMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 +#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames +#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x59DC +#else +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x59DC +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 + +#ifndef ISP2401 +/* function qos_scheduler_init_stage_budget: 65E8 */ +#else +/* function qos_scheduler_init_stage_budget: 6750 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_release: 5B0D */ +#else +/* function ia_css_isys_sp_backend_release: 5C48 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_backend_destroy: 5B37 */ +#else +/* function ia_css_isys_sp_backend_destroy: 5C72 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp2host_buffer_queue_handle +#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5AF4 +#else +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5B50 +#endif +#define HIVE_SIZE_sp2host_buffer_queue_handle 96 +#else +#endif +#endif +#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5AF4 +#else +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5B50 +#endif +#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 5F73 */ +#else +/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 60AE */ +#endif + +#ifndef ISP2401 +/* function ia_css_ispctrl_sp_init_isp_vars: 449C */ +#else +/* function ia_css_ispctrl_sp_init_isp_vars: 46F7 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5B89 */ +#else +/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5CC4 */ +#endif + +#ifndef ISP2401 +/* function sp_warning: 8DC */ +#else +/* function sp_warning: 870 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_vbuf_enqueue: 631D */ +#else +/* function ia_css_rmgr_sp_vbuf_enqueue: 6458 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_sp_tag_exp_id: 215B */ +#else +/* function ia_css_tagger_sp_tag_exp_id: 21AB */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_write: 3216 */ +#else +/* function ia_css_dmaproxy_sp_write: 33F5 */ +#endif + +#ifndef ISP2401 +/* function ia_css_parambuf_sp_release_in_param: 1250 */ +#else +/* function ia_css_parambuf_sp_release_in_param: 1245 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_irq_sw_interrupt_token +#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_irq_sw_interrupt_token 0x40F4 +#else +#define HIVE_ADDR_irq_sw_interrupt_token 0x4114 +#endif +#define HIVE_SIZE_irq_sw_interrupt_token 4 +#else +#endif +#endif +#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x40F4 +#else +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x4114 +#endif +#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_isp_addresses +#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_addresses 0x5F44 +#else +#define HIVE_ADDR_sp_isp_addresses 0x5FA4 +#endif +#define HIVE_SIZE_sp_isp_addresses 172 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_isp_addresses 0x5F44 +#else +#define HIVE_ADDR_sp_sp_isp_addresses 0x5FA4 +#endif +#define HIVE_SIZE_sp_sp_isp_addresses 172 + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_acq_gen: 6242 */ +#else +/* function ia_css_rmgr_sp_acq_gen: 637D */ +#endif + +#ifndef ISP2401 +/* function receiver_reg_load: AD0 */ +#else +/* function receiver_reg_load: ACA */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isps +#define HIVE_MEM_isps scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isps 0x6300 +#else +#define HIVE_ADDR_isps 0x635C +#endif +#define HIVE_SIZE_isps 28 +#else +#endif +#endif +#define HIVE_MEM_sp_isps scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isps 0x6300 +#else +#define HIVE_ADDR_sp_isps 0x635C +#endif +#define HIVE_SIZE_sp_isps 28 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_host_sp_queues_initialized +#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_host_sp_queues_initialized 0x410C +#else +#define HIVE_ADDR_host_sp_queues_initialized 0x412C +#endif +#define HIVE_SIZE_host_sp_queues_initialized 4 +#else +#endif +#endif +#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x410C +#else +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x412C +#endif +#define HIVE_SIZE_sp_host_sp_queues_initialized 4 + +#ifndef ISP2401 +/* function ia_css_queue_uninit: 4BE5 */ +#else +/* function ia_css_queue_uninit: 4E43 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started +#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5BFC +#else +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5C58 +#endif +#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5BFC +#else +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5C58 +#endif +#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 + +#ifndef ISP2401 +/* function ia_css_bufq_sp_release_dynamic_buf: 2DE7 */ +#else +/* function ia_css_bufq_sp_release_dynamic_buf: 2F89 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_set_height_exception: 330E */ +#else +/* function ia_css_dmaproxy_sp_set_height_exception: 3502 */ +#endif + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_init_vmem_channel: 3293 */ +#else +/* function ia_css_dmaproxy_sp_init_vmem_channel: 3473 */ +#endif + +#ifndef ISP2401 +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_num_ready_threads +#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem +#define HIVE_ADDR_num_ready_threads 0x49E4 +#define HIVE_SIZE_num_ready_threads 4 +#else +#endif +#endif +#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem +#define HIVE_ADDR_sp_num_ready_threads 0x49E4 +#define HIVE_SIZE_sp_num_ready_threads 4 + +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 31E8 */ +#else +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 33C7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_vbuf_spref +#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_vbuf_spref 0x2EC +#else +#define HIVE_ADDR_vbuf_spref 0x304 +#endif +#define HIVE_SIZE_vbuf_spref 4 +#else +#endif +#endif +#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_vbuf_spref 0x2EC +#else +#define HIVE_ADDR_sp_vbuf_spref 0x304 +#endif +#define HIVE_SIZE_sp_vbuf_spref 4 + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_metadata_thread +#define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_metadata_thread 0x4998 +#define HIVE_SIZE_sp_metadata_thread 68 +#else +#define HIVE_ADDR_sp_metadata_thread 0x49F8 +#define HIVE_SIZE_sp_metadata_thread 72 +#endif +#else +#endif +#endif +#define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_metadata_thread 0x4998 +#define HIVE_SIZE_sp_sp_metadata_thread 68 +#else +#define HIVE_ADDR_sp_sp_metadata_thread 0x49F8 +#define HIVE_SIZE_sp_sp_metadata_thread 72 +#endif + +#ifndef ISP2401 +/* function ia_css_queue_enqueue: 4B2F */ +#else +/* function ia_css_queue_enqueue: 4D8D */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_request +#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_request 0x4A98 +#else +#define HIVE_ADDR_ia_css_flash_sp_request 0x4AF4 +#endif +#define HIVE_SIZE_ia_css_flash_sp_request 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4A98 +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4AF4 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 + +#ifndef ISP2401 +/* function ia_css_dmaproxy_sp_vmem_write: 31B9 */ +#else +/* function ia_css_dmaproxy_sp_vmem_write: 3398 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_tagger_frames +#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_tagger_frames 0x49EC +#else +#define HIVE_ADDR_tagger_frames 0x4A48 +#endif +#define HIVE_SIZE_tagger_frames 168 +#else +#endif +#endif +#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_tagger_frames 0x49EC +#else +#define HIVE_ADDR_sp_tagger_frames 0x4A48 +#endif +#define HIVE_SIZE_sp_tagger_frames 168 + +#ifndef ISP2401 +/* function ia_css_isys_sp_token_map_snd_capture_req: 5FD1 */ +#else +/* function ia_css_isys_sp_token_map_snd_capture_req: 610C */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_reading_if +#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_reading_if 0x47C8 +#else +#define HIVE_ADDR_sem_for_reading_if 0x4810 +#endif +#define HIVE_SIZE_sem_for_reading_if 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_reading_if 0x47C8 +#else +#define HIVE_ADDR_sp_sem_for_reading_if 0x4810 +#endif +#define HIVE_SIZE_sp_sem_for_reading_if 20 + +#ifndef ISP2401 +/* function sp_generate_interrupts: 95B */ +#else +/* function sp_generate_interrupts: 8EF */ + +/* function ia_css_pipeline_sp_start: 1871 */ +#endif + +#ifndef ISP2401 +/* function ia_css_pipeline_sp_start: 1837 */ +#else +/* function ia_css_thread_default_callout: 6BE3 */ +#endif + +#ifndef ISP2401 +/* function ia_css_sp_rawcopy_init: 510C */ +#else +/* function ia_css_sp_rawcopy_init: 536A */ +#endif + +#ifndef ISP2401 +/* function tmr_clock_read: 13F1 */ +#else +/* function tmr_clock_read: 1412 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_BAMEM_BASE +#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ISP_BAMEM_BASE 0x2F8 +#else +#define HIVE_ADDR_ISP_BAMEM_BASE 0x310 +#endif +#define HIVE_SIZE_ISP_BAMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x2F8 +#else +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x310 +#endif +#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5C38 */ +#else +/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5D73 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues +#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 +#else +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#endif +#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 +#else +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#endif +#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 + +#ifndef ISP2401 +/* function css_get_frame_processing_time_start: 1FC8 */ +#else +/* function css_get_frame_processing_time_start: 2018 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_all_cbs_frame +#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_all_cbs_frame 0x47DC +#else +#define HIVE_ADDR_sp_all_cbs_frame 0x4824 +#endif +#define HIVE_SIZE_sp_all_cbs_frame 16 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x47DC +#else +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x4824 +#endif +#define HIVE_SIZE_sp_sp_all_cbs_frame 16 + +#ifndef ISP2401 +/* function thread_sp_queue_print: D8F */ +#else +/* function thread_sp_queue_print: D84 */ +#endif + +#ifndef ISP2401 +/* function sp_notify_eof: 907 */ +#else +/* function sp_notify_eof: 89B */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sem_for_str2mem +#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sem_for_str2mem 0x47EC +#else +#define HIVE_ADDR_sem_for_str2mem 0x4834 +#endif +#define HIVE_SIZE_sem_for_str2mem 20 +#else +#endif +#endif +#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sem_for_str2mem 0x47EC +#else +#define HIVE_ADDR_sp_sem_for_str2mem 0x4834 +#endif +#define HIVE_SIZE_sp_sem_for_str2mem 20 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_is_marked_from_start: 2B5A */ +#else +/* function ia_css_tagger_buf_sp_is_marked_from_start: 2CFC */ +#endif + +#ifndef ISP2401 +/* function ia_css_bufq_sp_acquire_dynamic_buf: 2F9F */ +#else +/* function ia_css_bufq_sp_acquire_dynamic_buf: 3141 */ +#endif + +#ifndef ISP2401 +/* function ia_css_circbuf_destroy: 101D */ +#else +/* function ia_css_circbuf_destroy: 1012 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ISP_PMEM_BASE +#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_ISP_PMEM_BASE 0xC +#define HIVE_SIZE_ISP_PMEM_BASE 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC +#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 + +#ifndef ISP2401 +/* function ia_css_sp_isp_param_mem_load: 4710 */ +#else +/* function ia_css_sp_isp_param_mem_load: 4998 */ +#endif + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_pop_from_start: 2946 */ +#else +/* function ia_css_tagger_buf_sp_pop_from_start: 2AE8 */ +#endif + +#ifndef ISP2401 +/* function __div: 685F */ +#else +/* function __div: 69D2 */ +#endif + +#ifndef ISP2401 +/* function ia_css_isys_sp_frontend_create: 5E09 */ +#else +/* function ia_css_isys_sp_frontend_create: 5F44 */ +#endif + +#ifndef ISP2401 +/* function ia_css_rmgr_sp_refcount_release_vbuf: 633C */ +#else +/* function ia_css_rmgr_sp_refcount_release_vbuf: 6477 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ia_css_flash_sp_in_use +#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4A9C +#else +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4AF8 +#endif +#define HIVE_SIZE_ia_css_flash_sp_in_use 4 +#else +#endif +#endif +#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4A9C +#else +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4AF8 +#endif +#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 + +#ifndef ISP2401 +/* function ia_css_thread_sem_sp_wait: 6B42 */ +#else +/* function ia_css_thread_sem_sp_wait: 6CB7 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_sleep_mode +#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sleep_mode 0x4110 +#else +#define HIVE_ADDR_sp_sleep_mode 0x4130 +#endif +#define HIVE_SIZE_sp_sleep_mode 4 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_sp_sleep_mode 0x4110 +#else +#define HIVE_ADDR_sp_sp_sleep_mode 0x4130 +#endif +#define HIVE_SIZE_sp_sp_sleep_mode 4 + +#ifndef ISP2401 +/* function ia_css_tagger_buf_sp_push: 2A55 */ +#else +/* function ia_css_tagger_buf_sp_push: 2BF7 */ +#endif + +/* function mmu_invalidate_cache: D3 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_sp_max_cb_elems +#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem +#define HIVE_ADDR_sp_max_cb_elems 0x148 +#define HIVE_SIZE_sp_max_cb_elems 8 +#else +#endif +#endif +#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem +#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 +#define HIVE_SIZE_sp_sp_max_cb_elems 8 + +#ifndef ISP2401 +/* function ia_css_queue_remote_init: 4C07 */ +#else +/* function ia_css_queue_remote_init: 4E65 */ +#endif + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_isp_stop_req +#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_isp_stop_req 0x4680 +#else +#define HIVE_ADDR_isp_stop_req 0x46C8 +#endif +#define HIVE_SIZE_isp_stop_req 4 +#else +#endif +#endif +#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem +#ifndef ISP2401 +#define HIVE_ADDR_sp_isp_stop_req 0x4680 +#else +#define HIVE_ADDR_sp_isp_stop_req 0x46C8 +#endif +#define HIVE_SIZE_sp_isp_stop_req 4 + +#ifndef ISP2401 +#define HIVE_ICACHE_sp_critical_SEGMENT_START 0 +#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 +#endif + +#endif /* _sp_map_h_ */ +#ifndef ISP2401 +extern void sh_css_dump_sp_dmem(void); +void sh_css_dump_sp_dmem(void) +{ +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h new file mode 100644 index 0000000000000..01f7c33b5b407 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h @@ -0,0 +1,388 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CSS_TRACE_H_ +#define __CSS_TRACE_H_ + +#include +#ifdef ISP2401 +#include "sh_css_internal.h" /* for SH_CSS_MAX_SP_THREADS */ +#endif + +/* + structs and constants for tracing +*/ + +/* one tracer item: major, minor and counter. The counter value can be used for GP data */ +struct trace_item_t { + uint8_t major; + uint8_t minor; + uint16_t counter; +}; + +#ifdef ISP2401 +#define MAX_SCRATCH_DATA 4 +#define MAX_CMD_DATA 2 + +#endif +/* trace header: holds the version and the topology of the tracer. */ +struct trace_header_t { +#ifndef ISP2401 + /* 1st dword */ +#else + /* 1st dword: descriptor */ +#endif + uint8_t version; + uint8_t max_threads; + uint16_t max_tracer_points; +#ifdef ISP2401 + /* 2nd field: command + data */ +#endif + /* 2nd dword */ + uint32_t command; + /* 3rd & 4th dword */ +#ifndef ISP2401 + uint32_t data[2]; +#else + uint32_t data[MAX_CMD_DATA]; + /* 3rd field: debug pointer */ +#endif + /* 5th & 6th dword: debug pointer mechanism */ + uint32_t debug_ptr_signature; + uint32_t debug_ptr_value; +#ifdef ISP2401 + /* Rest of the header: status & scratch data */ + uint8_t thr_status_byte[SH_CSS_MAX_SP_THREADS]; + uint16_t thr_status_word[SH_CSS_MAX_SP_THREADS]; + uint32_t thr_status_dword[SH_CSS_MAX_SP_THREADS]; + uint32_t scratch_debug[MAX_SCRATCH_DATA]; +#endif +}; + +#ifndef ISP2401 +#define TRACER_VER 2 +#else +/* offsets for master_port read/write */ +#define HDR_HDR_OFFSET 0 /* offset of the header */ +#define HDR_COMMAND_OFFSET offsetof(struct trace_header_t, command) +#define HDR_DATA_OFFSET offsetof(struct trace_header_t, data) +#define HDR_DEBUG_SIGNATURE_OFFSET offsetof(struct trace_header_t, debug_ptr_signature) +#define HDR_DEBUG_POINTER_OFFSET offsetof(struct trace_header_t, debug_ptr_value) +#define HDR_STATUS_OFFSET offsetof(struct trace_header_t, thr_status_byte) +#define HDR_STATUS_OFFSET_BYTE offsetof(struct trace_header_t, thr_status_byte) +#define HDR_STATUS_OFFSET_WORD offsetof(struct trace_header_t, thr_status_word) +#define HDR_STATUS_OFFSET_DWORD offsetof(struct trace_header_t, thr_status_dword) +#define HDR_STATUS_OFFSET_SCRATCH offsetof(struct trace_header_t, scratch_debug) + +/* +Trace version history: + 1: initial version, hdr = descr, command & ptr. + 2: added ISP + 24-bit fields. + 3: added thread ID. + 4: added status in header. +*/ +#define TRACER_VER 4 + +#endif +#define TRACE_BUFF_ADDR 0xA000 +#define TRACE_BUFF_SIZE 0x1000 /* 4K allocated */ + +#define TRACE_ENABLE_SP0 0 +#define TRACE_ENABLE_SP1 0 +#define TRACE_ENABLE_ISP 0 + +#ifndef ISP2401 +typedef enum { +#else +enum TRACE_CORE_ID { +#endif + TRACE_SP0_ID, + TRACE_SP1_ID, + TRACE_ISP_ID +#ifndef ISP2401 +} TRACE_CORE_ID; +#else +}; +#endif + +/* TODO: add timing format? */ +#ifndef ISP2401 +typedef enum { + TRACE_DUMP_FORMAT_POINT, + TRACE_DUMP_FORMAT_VALUE24_HEX, + TRACE_DUMP_FORMAT_VALUE24_DEC, +#else +enum TRACE_DUMP_FORMAT { + TRACE_DUMP_FORMAT_POINT_NO_TID, + TRACE_DUMP_FORMAT_VALUE24, +#endif + TRACE_DUMP_FORMAT_VALUE24_TIMING, +#ifndef ISP2401 + TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA +} TRACE_DUMP_FORMAT; +#else + TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA, + TRACE_DUMP_FORMAT_POINT +}; +#endif + + +/* currently divided as follows:*/ +#if (TRACE_ENABLE_SP0 + TRACE_ENABLE_SP1 + TRACE_ENABLE_ISP == 3) +/* can be divided as needed */ +#define TRACE_SP0_SIZE (TRACE_BUFF_SIZE/4) +#define TRACE_SP1_SIZE (TRACE_BUFF_SIZE/4) +#define TRACE_ISP_SIZE (TRACE_BUFF_SIZE/2) +#elif (TRACE_ENABLE_SP0 + TRACE_ENABLE_SP1 + TRACE_ENABLE_ISP == 2) +#if TRACE_ENABLE_SP0 +#define TRACE_SP0_SIZE (TRACE_BUFF_SIZE/2) +#else +#define TRACE_SP0_SIZE (0) +#endif +#if TRACE_ENABLE_SP1 +#define TRACE_SP1_SIZE (TRACE_BUFF_SIZE/2) +#else +#define TRACE_SP1_SIZE (0) +#endif +#if TRACE_ENABLE_ISP +#define TRACE_ISP_SIZE (TRACE_BUFF_SIZE/2) +#else +#define TRACE_ISP_SIZE (0) +#endif +#elif (TRACE_ENABLE_SP0 + TRACE_ENABLE_SP1 + TRACE_ENABLE_ISP == 1) +#if TRACE_ENABLE_SP0 +#define TRACE_SP0_SIZE (TRACE_BUFF_SIZE) +#else +#define TRACE_SP0_SIZE (0) +#endif +#if TRACE_ENABLE_SP1 +#define TRACE_SP1_SIZE (TRACE_BUFF_SIZE) +#else +#define TRACE_SP1_SIZE (0) +#endif +#if TRACE_ENABLE_ISP +#define TRACE_ISP_SIZE (TRACE_BUFF_SIZE) +#else +#define TRACE_ISP_SIZE (0) +#endif +#else +#define TRACE_SP0_SIZE (0) +#define TRACE_SP1_SIZE (0) +#define TRACE_ISP_SIZE (0) +#endif + +#define TRACE_SP0_ADDR (TRACE_BUFF_ADDR) +#define TRACE_SP1_ADDR (TRACE_SP0_ADDR + TRACE_SP0_SIZE) +#define TRACE_ISP_ADDR (TRACE_SP1_ADDR + TRACE_SP1_SIZE) + +/* check if it's a legal division */ +#if (TRACE_BUFF_SIZE < TRACE_SP0_SIZE + TRACE_SP1_SIZE + TRACE_ISP_SIZE) +#error trace sizes are not divided correctly and are above limit +#endif + +#define TRACE_SP0_HEADER_ADDR (TRACE_SP0_ADDR) +#define TRACE_SP0_HEADER_SIZE (sizeof(struct trace_header_t)) +#ifndef ISP2401 +#define TRACE_SP0_ITEM_SIZE (sizeof(struct trace_item_t)) +#define TRACE_SP0_DATA_ADDR (TRACE_SP0_HEADER_ADDR + TRACE_SP0_HEADER_SIZE) +#define TRACE_SP0_DATA_SIZE (TRACE_SP0_SIZE - TRACE_SP0_HEADER_SIZE) +#define TRACE_SP0_MAX_POINTS (TRACE_SP0_DATA_SIZE / TRACE_SP0_ITEM_SIZE) +#else +#define TRACE_SP0_ITEM_SIZE (sizeof(struct trace_item_t)) +#define TRACE_SP0_DATA_ADDR (TRACE_SP0_HEADER_ADDR + TRACE_SP0_HEADER_SIZE) +#define TRACE_SP0_DATA_SIZE (TRACE_SP0_SIZE - TRACE_SP0_HEADER_SIZE) +#define TRACE_SP0_MAX_POINTS (TRACE_SP0_DATA_SIZE / TRACE_SP0_ITEM_SIZE) +#endif + +#define TRACE_SP1_HEADER_ADDR (TRACE_SP1_ADDR) +#define TRACE_SP1_HEADER_SIZE (sizeof(struct trace_header_t)) +#ifndef ISP2401 +#define TRACE_SP1_ITEM_SIZE (sizeof(struct trace_item_t)) +#define TRACE_SP1_DATA_ADDR (TRACE_SP1_HEADER_ADDR + TRACE_SP1_HEADER_SIZE) +#define TRACE_SP1_DATA_SIZE (TRACE_SP1_SIZE - TRACE_SP1_HEADER_SIZE) +#define TRACE_SP1_MAX_POINTS (TRACE_SP1_DATA_SIZE / TRACE_SP1_ITEM_SIZE) +#else +#define TRACE_SP1_ITEM_SIZE (sizeof(struct trace_item_t)) +#define TRACE_SP1_DATA_ADDR (TRACE_SP1_HEADER_ADDR + TRACE_SP1_HEADER_SIZE) +#define TRACE_SP1_DATA_SIZE (TRACE_SP1_SIZE - TRACE_SP1_HEADER_SIZE) +#define TRACE_SP1_MAX_POINTS (TRACE_SP1_DATA_SIZE / TRACE_SP1_ITEM_SIZE) +#endif + +#define TRACE_ISP_HEADER_ADDR (TRACE_ISP_ADDR) +#define TRACE_ISP_HEADER_SIZE (sizeof(struct trace_header_t)) +#ifndef ISP2401 +#define TRACE_ISP_ITEM_SIZE (sizeof(struct trace_item_t)) +#define TRACE_ISP_DATA_ADDR (TRACE_ISP_HEADER_ADDR + TRACE_ISP_HEADER_SIZE) +#define TRACE_ISP_DATA_SIZE (TRACE_ISP_SIZE - TRACE_ISP_HEADER_SIZE) +#define TRACE_ISP_MAX_POINTS (TRACE_ISP_DATA_SIZE / TRACE_ISP_ITEM_SIZE) + +#else +#define TRACE_ISP_ITEM_SIZE (sizeof(struct trace_item_t)) +#define TRACE_ISP_DATA_ADDR (TRACE_ISP_HEADER_ADDR + TRACE_ISP_HEADER_SIZE) +#define TRACE_ISP_DATA_SIZE (TRACE_ISP_SIZE - TRACE_ISP_HEADER_SIZE) +#define TRACE_ISP_MAX_POINTS (TRACE_ISP_DATA_SIZE / TRACE_ISP_ITEM_SIZE) +#endif + +#ifndef ISP2401 +/* offsets for master_port read/write */ +#define HDR_HDR_OFFSET 0 /* offset of the header */ +#define HDR_COMMAND_OFFSET 4 /* offset of the command */ +#define HDR_DATA_OFFSET 8 /* offset of the command data */ +#define HDR_DEBUG_SIGNATURE_OFFSET 16 /* offset of the param debug signature in trace_header_t */ +#define HDR_DEBUG_POINTER_OFFSET 20 /* offset of the param debug pointer in trace_header_t */ +#endif + +/* common majors */ +#ifdef ISP2401 +/* SP0 */ +#endif +#define MAJOR_MAIN 1 +#define MAJOR_ISP_STAGE_ENTRY 2 +#define MAJOR_DMA_PRXY 3 +#define MAJOR_START_ISP 4 +#ifdef ISP2401 +/* SP1 */ +#define MAJOR_OBSERVER_ISP0_EVENT 21 +#define MAJOR_OBSERVER_OUTPUT_FORM_EVENT 22 +#define MAJOR_OBSERVER_OUTPUT_SCAL_EVENT 23 +#define MAJOR_OBSERVER_IF_ACK 24 +#define MAJOR_OBSERVER_SP0_EVENT 25 +#define MAJOR_OBSERVER_SP_TERMINATE_EVENT 26 +#define MAJOR_OBSERVER_DMA_ACK 27 +#define MAJOR_OBSERVER_ACC_ACK 28 +#endif + +#define DEBUG_PTR_SIGNATURE 0xABCD /* signature for the debug parameter pointer */ + +/* command codes (1st byte) */ +typedef enum { + CMD_SET_ONE_MAJOR = 1, /* mask in one major. 2nd byte in the command is the major code */ + CMD_UNSET_ONE_MAJOR = 2, /* mask out one major. 2nd byte in the command is the major code */ + CMD_SET_ALL_MAJORS = 3, /* set the major print mask. the full mask is in the data DWORD */ + CMD_SET_VERBOSITY = 4 /* set verbosity level */ +} DBG_commands; + +/* command signature */ +#define CMD_SIGNATURE 0xAABBCC00 + +/* shared macros in traces infrastructure */ +/* increment the pointer cyclicly */ +#define DBG_NEXT_ITEM(x, max_items) (((x+1) >= max_items) ? 0 : x+1) +#define DBG_PREV_ITEM(x, max_items) ((x) ? x-1 : max_items-1) + +#define FIELD_MASK(width) (((1 << (width)) - 1)) +#define FIELD_PACK(value,mask,offset) (((value) & (mask)) << (offset)) +#define FIELD_UNPACK(value,mask,offset) (((value) >> (offset)) & (mask)) + + +#define FIELD_VALUE_OFFSET (0) +#define FIELD_VALUE_WIDTH (16) +#define FIELD_VALUE_MASK FIELD_MASK(FIELD_VALUE_WIDTH) +#define FIELD_VALUE_PACK(f) FIELD_PACK(f,FIELD_VALUE_MASK,FIELD_VALUE_OFFSET) +#ifndef ISP2401 +#define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f,FIELD_VALUE_MASK,FIELD_VALUE_OFFSET) +#else +#define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f,FIELD_VALUE_MASK,FIELD_VALUE_OFFSET) +#endif + +#define FIELD_MINOR_OFFSET (FIELD_VALUE_OFFSET + FIELD_VALUE_WIDTH) +#define FIELD_MINOR_WIDTH (8) +#define FIELD_MINOR_MASK FIELD_MASK(FIELD_MINOR_WIDTH) +#define FIELD_MINOR_PACK(f) FIELD_PACK(f,FIELD_MINOR_MASK,FIELD_MINOR_OFFSET) +#ifndef ISP2401 +#define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MINOR_MASK,FIELD_MINOR_OFFSET) +#else +#define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MINOR_MASK,FIELD_MINOR_OFFSET) +#endif + +#define FIELD_MAJOR_OFFSET (FIELD_MINOR_OFFSET + FIELD_MINOR_WIDTH) +#define FIELD_MAJOR_WIDTH (5) +#define FIELD_MAJOR_MASK FIELD_MASK(FIELD_MAJOR_WIDTH) +#define FIELD_MAJOR_PACK(f) FIELD_PACK(f,FIELD_MAJOR_MASK,FIELD_MAJOR_OFFSET) +#ifndef ISP2401 +#define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MAJOR_MASK,FIELD_MAJOR_OFFSET) +#else +#define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MAJOR_MASK,FIELD_MAJOR_OFFSET) +#endif + +#ifndef ISP2401 +#define FIELD_FORMAT_OFFSET (FIELD_MAJOR_OFFSET + FIELD_MAJOR_WIDTH) +#define FIELD_FORMAT_WIDTH (3) +#define FIELD_FORMAT_MASK FIELD_MASK(FIELD_FORMAT_WIDTH) +#define FIELD_FORMAT_PACK(f) FIELD_PACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) +#define FIELD_FORMAT_UNPACK(f) FIELD_UNPACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) +#else +/* for quick traces - only insertion, compatible with the regular point */ +#define FIELD_FULL_MAJOR_WIDTH (8) +#define FIELD_FULL_MAJOR_MASK FIELD_MASK(FIELD_FULL_MAJOR_WIDTH) +#define FIELD_FULL_MAJOR_PACK(f) FIELD_PACK(f,FIELD_FULL_MAJOR_MASK,FIELD_MAJOR_OFFSET) + +/* The following 2 fields are used only when FIELD_TID value is 111b. + * it means we don't want to use thread id, but format. In this case, + * the last 2 MSB bits of the major field will indicates the format + */ +#define FIELD_MAJOR_W_FMT_OFFSET FIELD_MAJOR_OFFSET +#define FIELD_MAJOR_W_FMT_WIDTH (3) +#define FIELD_MAJOR_W_FMT_MASK FIELD_MASK(FIELD_MAJOR_W_FMT_WIDTH) +#define FIELD_MAJOR_W_FMT_PACK(f) FIELD_PACK(f,FIELD_MAJOR_W_FMT_MASK,FIELD_MAJOR_W_FMT_OFFSET) +#define FIELD_MAJOR_W_FMT_UNPACK(f) FIELD_UNPACK(f,FIELD_MAJOR_W_FMT_MASK,FIELD_MAJOR_W_FMT_OFFSET) + +#define FIELD_FORMAT_OFFSET (FIELD_MAJOR_OFFSET + FIELD_MAJOR_W_FMT_WIDTH) +#define FIELD_FORMAT_WIDTH (2) +#define FIELD_FORMAT_MASK FIELD_MASK(FIELD_MAJOR_W_FMT_WIDTH) +#define FIELD_FORMAT_PACK(f) FIELD_PACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) +#define FIELD_FORMAT_UNPACK(f) FIELD_UNPACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) + +#define FIELD_TID_SEL_FORMAT_PAT (7) + +#define FIELD_TID_OFFSET (FIELD_MAJOR_OFFSET + FIELD_MAJOR_WIDTH) +#define FIELD_TID_WIDTH (3) +#define FIELD_TID_MASK FIELD_MASK(FIELD_TID_WIDTH) +#define FIELD_TID_PACK(f) FIELD_PACK(f,FIELD_TID_MASK,FIELD_TID_OFFSET) +#define FIELD_TID_UNPACK(f) FIELD_UNPACK(f,FIELD_TID_MASK,FIELD_TID_OFFSET) +#endif + +#define FIELD_VALUE_24_OFFSET (0) +#define FIELD_VALUE_24_WIDTH (24) +#ifndef ISP2401 +#define FIELD_VALUE_24_MASK FIELD_MASK(FIELD_VALUE_24_WIDTH) +#else +#define FIELD_VALUE_24_MASK FIELD_MASK(FIELD_VALUE_24_WIDTH) +#endif +#define FIELD_VALUE_24_PACK(f) FIELD_PACK(f,FIELD_VALUE_24_MASK,FIELD_VALUE_24_OFFSET) +#define FIELD_VALUE_24_UNPACK(f) FIELD_UNPACK(f,FIELD_VALUE_24_MASK,FIELD_VALUE_24_OFFSET) + +#ifndef ISP2401 +#define PACK_TRACEPOINT(format,major, minor, value) \ + (FIELD_FORMAT_PACK(format) | FIELD_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor) | FIELD_VALUE_PACK(value)) +#else +#define PACK_TRACEPOINT(tid, major, minor, value) \ + (FIELD_TID_PACK(tid) | FIELD_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor) | FIELD_VALUE_PACK(value)) + +#define PACK_QUICK_TRACEPOINT(major, minor) \ + (FIELD_FULL_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor)) + +#define PACK_FORMATTED_TRACEPOINT(format, major, minor, value) \ + (FIELD_TID_PACK(FIELD_TID_SEL_FORMAT_PAT) | FIELD_FORMAT_PACK(format) | FIELD_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor) | FIELD_VALUE_PACK(value)) +#endif + +#ifndef ISP2401 +#define PACK_TRACE_VALUE24(format, major, value) \ + (FIELD_FORMAT_PACK(format) | FIELD_MAJOR_PACK(major) | FIELD_VALUE_24_PACK(value)) +#else +#define PACK_TRACE_VALUE24(major, value) \ + (FIELD_TID_PACK(FIELD_TID_SEL_FORMAT_PAT) | FIELD_MAJOR_PACK(major) | FIELD_VALUE_24_PACK(value)) +#endif + +#endif /* __CSS_TRACE_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h new file mode 100644 index 0000000000000..076c4ba761753 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h @@ -0,0 +1,83 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DEBUG_GLOBAL_H_INCLUDED__ +#define __DEBUG_GLOBAL_H_INCLUDED__ + +#include + +#define DEBUG_BUF_SIZE 1024 +#define DEBUG_BUF_MASK (DEBUG_BUF_SIZE - 1) + +#define DEBUG_DATA_ENABLE_ADDR 0x00 +#define DEBUG_DATA_BUF_MODE_ADDR 0x04 +#define DEBUG_DATA_HEAD_ADDR 0x08 +#define DEBUG_DATA_TAIL_ADDR 0x0C +#define DEBUG_DATA_BUF_ADDR 0x10 + +#define DEBUG_DATA_ENABLE_DDR_ADDR 0x00 +#define DEBUG_DATA_BUF_MODE_DDR_ADDR HIVE_ISP_DDR_WORD_BYTES +#define DEBUG_DATA_HEAD_DDR_ADDR (2 * HIVE_ISP_DDR_WORD_BYTES) +#define DEBUG_DATA_TAIL_DDR_ADDR (3 * HIVE_ISP_DDR_WORD_BYTES) +#define DEBUG_DATA_BUF_DDR_ADDR (4 * HIVE_ISP_DDR_WORD_BYTES) + +#define DEBUG_BUFFER_ISP_DMEM_ADDR 0x0 + +/* + * Enable HAS_WATCHDOG_SP_THREAD_DEBUG for additional SP thread and + * pipe information on watchdog output + * #undef HAS_WATCHDOG_SP_THREAD_DEBUG + * #define HAS_WATCHDOG_SP_THREAD_DEBUG + */ + + +/* + * The linear buffer mode will accept data until the first + * overflow and then stop accepting new data + * The circular buffer mode will accept if there is place + * and discard the data if the buffer is full + */ +typedef enum { + DEBUG_BUFFER_MODE_LINEAR = 0, + DEBUG_BUFFER_MODE_CIRCULAR, + N_DEBUG_BUFFER_MODE +} debug_buf_mode_t; + +struct debug_data_s { + uint32_t enable; + uint32_t bufmode; + uint32_t head; + uint32_t tail; + uint32_t buf[DEBUG_BUF_SIZE]; +}; + +/* thread.sp.c doesn't have a notion of HIVE_ISP_DDR_WORD_BYTES + still one point of control is needed for debug purposes */ + +#ifdef HIVE_ISP_DDR_WORD_BYTES +struct debug_data_ddr_s { + uint32_t enable; + int8_t padding1[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; + uint32_t bufmode; + int8_t padding2[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; + uint32_t head; + int8_t padding3[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; + uint32_t tail; + int8_t padding4[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; + uint32_t buf[DEBUG_BUF_SIZE]; +}; +#endif + +#endif /* __DEBUG_GLOBAL_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h new file mode 100644 index 0000000000000..60d6de1332cd6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h @@ -0,0 +1,255 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DMA_GLOBAL_H_INCLUDED__ +#define __DMA_GLOBAL_H_INCLUDED__ + +#include + +#define IS_DMA_VERSION_2 + +#define HIVE_ISP_NUM_DMA_CONNS 3 +#define HIVE_ISP_NUM_DMA_CHANNELS 32 + +#define N_DMA_CHANNEL_ID HIVE_ISP_NUM_DMA_CHANNELS + +#include "dma_v2_defs.h" + +/* + * Command token bit mappings + * + * transfer / config + * param id[4] channel id[5] cmd id[6] + * | b14 .. b11 | b10 ... b6 | b5 ... b0 | + * + * + * fast transfer: + * height[5] width[8] width[8] channel id[5] cmd id[6] + * | b31 .. b26 | b25 .. b18 | b17 .. b11 | b10 ... b6 | b5 ... b0 | + * + */ + +#define _DMA_PACKING_SETUP_PARAM _DMA_V2_PACKING_SETUP_PARAM +#define _DMA_HEIGHT_PARAM _DMA_V2_HEIGHT_PARAM +#define _DMA_STRIDE_A_PARAM _DMA_V2_STRIDE_A_PARAM +#define _DMA_ELEM_CROPPING_A_PARAM _DMA_V2_ELEM_CROPPING_A_PARAM +#define _DMA_WIDTH_A_PARAM _DMA_V2_WIDTH_A_PARAM +#define _DMA_STRIDE_B_PARAM _DMA_V2_STRIDE_B_PARAM +#define _DMA_ELEM_CROPPING_B_PARAM _DMA_V2_ELEM_CROPPING_B_PARAM +#define _DMA_WIDTH_B_PARAM _DMA_V2_WIDTH_B_PARAM + +#define _DMA_ZERO_EXTEND _DMA_V2_ZERO_EXTEND +#define _DMA_SIGN_EXTEND _DMA_V2_SIGN_EXTEND + + +typedef unsigned int dma_channel; + +typedef enum { + dma_isp_to_bus_connection = HIVE_DMA_ISP_BUS_CONN, + dma_isp_to_ddr_connection = HIVE_DMA_ISP_DDR_CONN, + dma_bus_to_ddr_connection = HIVE_DMA_BUS_DDR_CONN, +} dma_connection; + +typedef enum { + dma_zero_extension = _DMA_ZERO_EXTEND, + dma_sign_extension = _DMA_SIGN_EXTEND +} dma_extension; + + +#define DMA_PROP_SHIFT(val, param) ((val) << _DMA_V2_ ## param ## _IDX) +#define DMA_PROP_MASK(param) ((1U << _DMA_V2_ ## param ## _BITS)-1) +#define DMA_PACK(val, param) DMA_PROP_SHIFT((val) & DMA_PROP_MASK(param), param) + +#define DMA_PACK_COMMAND(cmd) DMA_PACK(cmd, CMD) +#define DMA_PACK_CHANNEL(ch) DMA_PACK(ch, CHANNEL) +#define DMA_PACK_PARAM(par) DMA_PACK(par, PARAM) +#define DMA_PACK_EXTENSION(ext) DMA_PACK(ext, EXTENSION) +#define DMA_PACK_LEFT_CROPPING(lc) DMA_PACK(lc, LEFT_CROPPING) +#define DMA_PACK_WIDTH_A(w) DMA_PACK(w, SPEC_DEV_A_XB) +#define DMA_PACK_WIDTH_B(w) DMA_PACK(w, SPEC_DEV_B_XB) +#define DMA_PACK_HEIGHT(h) DMA_PACK(h, SPEC_YB) + +#define DMA_PACK_CMD_CHANNEL(cmd, ch) (DMA_PACK_COMMAND(cmd) | DMA_PACK_CHANNEL(ch)) +#define DMA_PACK_SETUP(conn, ext) ((conn) | DMA_PACK_EXTENSION(ext)) +#define DMA_PACK_CROP_ELEMS(elems, crop) ((elems) | DMA_PACK_LEFT_CROPPING(crop)) + +#define hive_dma_snd(dma_id, token) OP_std_snd(dma_id, (unsigned int)(token)) + +#define DMA_PACK_BLOCK_CMD(cmd, ch, width_a, width_b, height) \ + (DMA_PACK_COMMAND(cmd) | \ + DMA_PACK_CHANNEL(ch) | \ + DMA_PACK_WIDTH_A(width_a) | \ + DMA_PACK_WIDTH_B(width_b) | \ + DMA_PACK_HEIGHT(height)) + +#define hive_dma_move_data(dma_id, read, channel, addr_a, addr_b, to_is_var, from_is_var) \ +{ \ + hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(read?_DMA_V2_MOVE_B2A_COMMAND:_DMA_V2_MOVE_A2B_COMMAND, channel)); \ + hive_dma_snd(dma_id, read?(unsigned)(addr_b):(unsigned)(addr_a)); \ + hive_dma_snd(dma_id, read?(unsigned)(addr_a):(unsigned)(addr_b)); \ + hive_dma_snd(dma_id, to_is_var); \ + hive_dma_snd(dma_id, from_is_var); \ +} +#define hive_dma_move_data_no_ack(dma_id, read, channel, addr_a, addr_b, to_is_var, from_is_var) \ +{ \ + hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(read?_DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND:_DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND, channel)); \ + hive_dma_snd(dma_id, read?(unsigned)(addr_b):(unsigned)(addr_a)); \ + hive_dma_snd(dma_id, read?(unsigned)(addr_a):(unsigned)(addr_b)); \ + hive_dma_snd(dma_id, to_is_var); \ + hive_dma_snd(dma_id, from_is_var); \ +} + +#define hive_dma_move_b2a_data(dma_id, channel, to_addr, from_addr, to_is_var, from_is_var) \ +{ \ + hive_dma_move_data(dma_id, true, channel, to_addr, from_addr, to_is_var, from_is_var) \ +} + +#define hive_dma_move_a2b_data(dma_id, channel, from_addr, to_addr, from_is_var, to_is_var) \ +{ \ + hive_dma_move_data(dma_id, false, channel, from_addr, to_addr, from_is_var, to_is_var) \ +} + +#define hive_dma_set_data(dma_id, channel, address, value, is_var) \ +{ \ + hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(_DMA_V2_INIT_A_COMMAND, channel)); \ + hive_dma_snd(dma_id, value); \ + hive_dma_snd(dma_id, address); \ + hive_dma_snd(dma_id, is_var); \ +} + +#define hive_dma_clear_data(dma_id, channel, address, is_var) hive_dma_set_data(dma_id, channel, address, 0, is_var) + +#define hive_dma_configure(dma_id, channel, connection, extension, height, \ + stride_A, elems_A, cropping_A, width_A, \ + stride_B, elems_B, cropping_B, width_B) \ +{ \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(_DMA_V2_CONFIG_CHANNEL_COMMAND, channel)); \ + hive_dma_snd(dma_id, DMA_PACK_SETUP(connection, extension)); \ + hive_dma_snd(dma_id, stride_A); \ + hive_dma_snd(dma_id, DMA_PACK_CROP_ELEMS(elems_A, cropping_A)); \ + hive_dma_snd(dma_id, width_A); \ + hive_dma_snd(dma_id, stride_B); \ + hive_dma_snd(dma_id, DMA_PACK_CROP_ELEMS(elems_B, cropping_B)); \ + hive_dma_snd(dma_id, width_B); \ + hive_dma_snd(dma_id, height); \ +} + +#define hive_dma_execute(dma_id, channel, cmd, to_addr, from_addr_value, to_is_var, from_is_var) \ +{ \ + hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(cmd, channel)); \ + hive_dma_snd(dma_id, to_addr); \ + hive_dma_snd(dma_id, from_addr_value); \ + hive_dma_snd(dma_id, to_is_var); \ + if ((cmd & DMA_CLEAR_CMDBIT) == 0) { \ + hive_dma_snd(dma_id, from_is_var); \ + } \ +} + +#define hive_dma_configure_fast(dma_id, channel, connection, extension, elems_A, elems_B) \ +{ \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(_DMA_V2_CONFIG_CHANNEL_COMMAND, channel)); \ + hive_dma_snd(dma_id, DMA_PACK_SETUP(connection, extension)); \ + hive_dma_snd(dma_id, 0); \ + hive_dma_snd(dma_id, DMA_PACK_CROP_ELEMS(elems_A, 0)); \ + hive_dma_snd(dma_id, 0); \ + hive_dma_snd(dma_id, 0); \ + hive_dma_snd(dma_id, DMA_PACK_CROP_ELEMS(elems_B, 0)); \ + hive_dma_snd(dma_id, 0); \ + hive_dma_snd(dma_id, 1); \ +} + +#define hive_dma_set_parameter(dma_id, channel, param, value) \ +{ \ + hive_dma_snd(dma_id, _DMA_V2_SET_CHANNEL_PARAM_COMMAND | DMA_PACK_CHANNEL(channel) | DMA_PACK_PARAM(param)); \ + hive_dma_snd(dma_id, value); \ +} + +#define DMA_SPECIFIC_CMDBIT 0x01 +#define DMA_CHECK_CMDBIT 0x02 +#define DMA_RW_CMDBIT 0x04 +#define DMA_CLEAR_CMDBIT 0x08 +#define DMA_ACK_CMDBIT 0x10 +#define DMA_CFG_CMDBIT 0x20 +#define DMA_PARAM_CMDBIT 0x01 + +/* Write complete check not necessary if there's no ack */ +#define DMA_NOACK_CMD (DMA_ACK_CMDBIT | DMA_CHECK_CMDBIT) +#define DMA_CFG_CMD (DMA_CFG_CMDBIT) +#define DMA_CFGPARAM_CMD (DMA_CFG_CMDBIT | DMA_PARAM_CMDBIT) + +#define DMA_CMD_NEEDS_ACK(cmd) ((cmd & DMA_NOACK_CMD) == 0) +#define DMA_CMD_IS_TRANSFER(cmd) ((cmd & DMA_CFG_CMDBIT) == 0) +#define DMA_CMD_IS_WR(cmd) ((cmd & DMA_RW_CMDBIT) != 0) +#define DMA_CMD_IS_RD(cmd) ((cmd & DMA_RW_CMDBIT) == 0) +#define DMA_CMD_IS_CLR(cmd) ((cmd & DMA_CLEAR_CMDBIT) != 0) +#define DMA_CMD_IS_CFG(cmd) ((cmd & DMA_CFG_CMDBIT) != 0) +#define DMA_CMD_IS_PARAMCFG(cmd) ((cmd & DMA_CFGPARAM_CMD) == DMA_CFGPARAM_CMD) + +/* As a matter of convention */ +#define DMA_TRANSFER_READ DMA_TRANSFER_B2A +#define DMA_TRANSFER_WRITE DMA_TRANSFER_A2B +/* store/load from the PoV of the system(memory) */ +#define DMA_TRANSFER_STORE DMA_TRANSFER_B2A +#define DMA_TRANSFER_LOAD DMA_TRANSFER_A2B +#define DMA_TRANSFER_CLEAR DMA_TRANSFER_CLEAR_A + +typedef enum { + DMA_TRANSFER_CLEAR_A = DMA_CLEAR_CMDBIT, /* 8 */ + DMA_TRANSFER_CLEAR_B = DMA_CLEAR_CMDBIT | DMA_RW_CMDBIT, /* 12 */ + DMA_TRANSFER_A2B = DMA_RW_CMDBIT, /* 4 */ + DMA_TRANSFER_B2A = 0, /* 0 */ + DMA_TRANSFER_CLEAR_A_NOACK = DMA_CLEAR_CMDBIT | DMA_NOACK_CMD, /* 26 */ + DMA_TRANSFER_CLEAR_B_NOACK = DMA_CLEAR_CMDBIT | DMA_RW_CMDBIT | DMA_NOACK_CMD, /* 30 */ + DMA_TRANSFER_A2B_NOACK = DMA_RW_CMDBIT | DMA_NOACK_CMD, /* 22 */ + DMA_TRANSFER_B2A_NOACK = DMA_NOACK_CMD, /* 18 */ + DMA_FASTTRANSFER_CLEAR_A = DMA_CLEAR_CMDBIT | DMA_SPECIFIC_CMDBIT, + DMA_FASTTRANSFER_CLEAR_B = DMA_CLEAR_CMDBIT | DMA_RW_CMDBIT | DMA_SPECIFIC_CMDBIT, + DMA_FASTTRANSFER_A2B = DMA_RW_CMDBIT | DMA_SPECIFIC_CMDBIT, + DMA_FASTTRANSFER_B2A = DMA_SPECIFIC_CMDBIT, + DMA_FASTTRANSFER_CLEAR_A_NOACK = DMA_CLEAR_CMDBIT | DMA_NOACK_CMD | DMA_SPECIFIC_CMDBIT, + DMA_FASTTRANSFER_CLEAR_B_NOACK = DMA_CLEAR_CMDBIT | DMA_RW_CMDBIT | DMA_NOACK_CMD | DMA_SPECIFIC_CMDBIT, + DMA_FASTTRANSFER_A2B_NOACK = DMA_RW_CMDBIT | DMA_NOACK_CMD | DMA_SPECIFIC_CMDBIT, + DMA_FASTTRANSFER_B2A_NOACK = DMA_NOACK_CMD | DMA_SPECIFIC_CMDBIT, +} dma_transfer_type_t; + +typedef enum { + DMA_CONFIG_SETUP = _DMA_V2_PACKING_SETUP_PARAM, + DMA_CONFIG_HEIGHT = _DMA_V2_HEIGHT_PARAM, + DMA_CONFIG_STRIDE_A_ = _DMA_V2_STRIDE_A_PARAM, + DMA_CONFIG_CROP_ELEM_A = _DMA_V2_ELEM_CROPPING_A_PARAM, + DMA_CONFIG_WIDTH_A = _DMA_V2_WIDTH_A_PARAM, + DMA_CONFIG_STRIDE_B_ = _DMA_V2_STRIDE_B_PARAM, + DMA_CONFIG_CROP_ELEM_B = _DMA_V2_ELEM_CROPPING_B_PARAM, + DMA_CONFIG_WIDTH_B = _DMA_V2_WIDTH_B_PARAM, +} dma_config_type_t; + +struct dma_port_config { + uint8_t crop, elems; + uint16_t width; + uint32_t stride; +}; + +/* Descriptor for dma configuration */ +struct dma_channel_config { + uint8_t connection; + uint8_t extension; + uint8_t height; + struct dma_port_config a, b; +}; + +#endif /* __DMA_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/event_fifo_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/event_fifo_global.h new file mode 100644 index 0000000000000..4df7a405cdcf2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/event_fifo_global.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __EVENT_FIFO_GLOBAL_H +#define __EVENT_FIFO_GLOBAL_H + +/*#error "event_global.h: No global event information permitted"*/ + +#endif /* __EVENT_FIFO_GLOBAL_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/fifo_monitor_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/fifo_monitor_global.h new file mode 100644 index 0000000000000..f43bf0ad24689 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/fifo_monitor_global.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __FIFO_MONITOR_GLOBAL_H_INCLUDED__ +#define __FIFO_MONITOR_GLOBAL_H_INCLUDED__ + +#define IS_FIFO_MONITOR_VERSION_2 + +/* +#define HIVE_ISP_CSS_STREAM_SWITCH_NONE 0 +#define HIVE_ISP_CSS_STREAM_SWITCH_SP 1 +#define HIVE_ISP_CSS_STREAM_SWITCH_ISP 2 + * + * Actually, "HIVE_ISP_CSS_STREAM_SWITCH_SP = 1", "HIVE_ISP_CSS_STREAM_SWITCH_ISP = 0" + * "hive_isp_css_stream_switch_hrt.h" + */ +#define HIVE_ISP_CSS_STREAM_SWITCH_ISP 0 +#define HIVE_ISP_CSS_STREAM_SWITCH_SP 1 +#define HIVE_ISP_CSS_STREAM_SWITCH_NONE 2 + +#endif /* __FIFO_MONITOR_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h new file mode 100644 index 0000000000000..4505775b224c9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h @@ -0,0 +1,90 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GDC_GLOBAL_H_INCLUDED__ +#define __GDC_GLOBAL_H_INCLUDED__ + +#define IS_GDC_VERSION_2 + +#include +#include "gdc_v2_defs.h" + +/* + * Storage addresses for packed data transfer + */ +#define GDC_PARAM_ICX_LEFT_ROUNDED_IDX 0 +#define GDC_PARAM_OXDIM_FLOORED_IDX 1 +#define GDC_PARAM_OXDIM_LAST_IDX 2 +#define GDC_PARAM_WOIX_LAST_IDX 3 +#define GDC_PARAM_IY_TOPLEFT_IDX 4 +#define GDC_PARAM_CHUNK_CNT_IDX 5 +/*#define GDC_PARAM_ELEMENTS_PER_XMEM_ADDR_IDX 6 */ /* Derived from bpp */ +#define GDC_PARAM_BPP_IDX 6 +#define GDC_PARAM_BLOCK_HEIGHT_IDX 7 +/*#define GDC_PARAM_DMA_CHANNEL_STRIDE_A_IDX 8*/ /* The DMA stride == the GDC buffer stride */ +#define GDC_PARAM_WOIX_IDX 8 +#define GDC_PARAM_DMA_CHANNEL_STRIDE_B_IDX 9 +#define GDC_PARAM_DMA_CHANNEL_WIDTH_A_IDX 10 +#define GDC_PARAM_DMA_CHANNEL_WIDTH_B_IDX 11 +#define GDC_PARAM_VECTORS_PER_LINE_IN_IDX 12 +#define GDC_PARAM_VECTORS_PER_LINE_OUT_IDX 13 +#define GDC_PARAM_VMEM_IN_DIMY_IDX 14 +#define GDC_PARAM_COMMAND_IDX 15 +#define N_GDC_PARAM 16 + +/* Because of the packed parameter transfer max(params) == max(fragments) */ +#define N_GDC_FRAGMENTS N_GDC_PARAM + +/* The GDC is capable of higher internal precision than the parameter data structures */ +#define HRT_GDC_COORD_SCALE_BITS 6 +#define HRT_GDC_COORD_SCALE (1 << HRT_GDC_COORD_SCALE_BITS) + +typedef enum { + GDC_CH0_ID = 0, + N_GDC_CHANNEL_ID +} gdc_channel_ID_t; + +typedef enum { + gdc_8_bpp = 8, + gdc_10_bpp = 10, + gdc_12_bpp = 12, + gdc_14_bpp = 14 +} gdc_bits_per_pixel_t; + +typedef struct gdc_scale_param_mem_s { + uint16_t params[N_GDC_PARAM]; + uint16_t ipx_start_array[N_GDC_PARAM]; + uint16_t ibuf_offset[N_GDC_PARAM]; + uint16_t obuf_offset[N_GDC_PARAM]; +} gdc_scale_param_mem_t; + +typedef struct gdc_warp_param_mem_s { + uint32_t origin_x; + uint32_t origin_y; + uint32_t in_addr_offset; + uint32_t in_block_width; + uint32_t in_block_height; + uint32_t p0_x; + uint32_t p0_y; + uint32_t p1_x; + uint32_t p1_y; + uint32_t p2_x; + uint32_t p2_y; + uint32_t p3_x; + uint32_t p3_y; + uint32_t padding[3]; +} gdc_warp_param_mem_t; + + +#endif /* __GDC_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h new file mode 100644 index 0000000000000..30ad77059d93c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h @@ -0,0 +1,85 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_DEVICE_GLOBAL_H_INCLUDED__ +#define __GP_DEVICE_GLOBAL_H_INCLUDED__ + +#define IS_GP_DEVICE_VERSION_2 + +#define _REG_GP_IRQ_REQ0_ADDR 0x08 +#define _REG_GP_IRQ_REQ1_ADDR 0x0C +/* The SP sends SW interrupt info to this register */ +#define _REG_GP_IRQ_REQUEST0_ADDR _REG_GP_IRQ_REQ0_ADDR +#define _REG_GP_IRQ_REQUEST1_ADDR _REG_GP_IRQ_REQ1_ADDR + +/* The SP configures FIFO switches in these registers */ +#define _REG_GP_SWITCH_IF_ADDR 0x40 +#define _REG_GP_SWITCH_GDC1_ADDR 0x44 +#define _REG_GP_SWITCH_GDC2_ADDR 0x48 +/* @ INPUT_FORMATTER_BASE -> GP_DEVICE_BASE */ +#define _REG_GP_IFMT_input_switch_lut_reg0 0x00030800 +#define _REG_GP_IFMT_input_switch_lut_reg1 0x00030804 +#define _REG_GP_IFMT_input_switch_lut_reg2 0x00030808 +#define _REG_GP_IFMT_input_switch_lut_reg3 0x0003080C +#define _REG_GP_IFMT_input_switch_lut_reg4 0x00030810 +#define _REG_GP_IFMT_input_switch_lut_reg5 0x00030814 +#define _REG_GP_IFMT_input_switch_lut_reg6 0x00030818 +#define _REG_GP_IFMT_input_switch_lut_reg7 0x0003081C +#define _REG_GP_IFMT_input_switch_fsync_lut 0x00030820 +#define _REG_GP_IFMT_srst 0x00030824 +#define _REG_GP_IFMT_slv_reg_srst 0x00030828 +#define _REG_GP_IFMT_input_switch_ch_id_fmt_type 0x0003082C + +/* @ GP_DEVICE_BASE */ +#define _REG_GP_SYNCGEN_ENABLE_ADDR 0x00090000 +#define _REG_GP_SYNCGEN_FREE_RUNNING_ADDR 0x00090004 +#define _REG_GP_SYNCGEN_PAUSE_ADDR 0x00090008 +#define _REG_GP_NR_FRAMES_ADDR 0x0009000C +#define _REG_GP_SYNGEN_NR_PIX_ADDR 0x00090010 +#define _REG_GP_SYNGEN_NR_LINES_ADDR 0x00090014 +#define _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR 0x00090018 +#define _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR 0x0009001C +#define _REG_GP_ISEL_SOF_ADDR 0x00090020 +#define _REG_GP_ISEL_EOF_ADDR 0x00090024 +#define _REG_GP_ISEL_SOL_ADDR 0x00090028 +#define _REG_GP_ISEL_EOL_ADDR 0x0009002C +#define _REG_GP_ISEL_LFSR_ENABLE_ADDR 0x00090030 +#define _REG_GP_ISEL_LFSR_ENABLE_B_ADDR 0x00090034 +#define _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR 0x00090038 +#define _REG_GP_ISEL_TPG_ENABLE_ADDR 0x0009003C +#define _REG_GP_ISEL_TPG_ENABLE_B_ADDR 0x00090040 +#define _REG_GP_ISEL_HOR_CNT_MASK_ADDR 0x00090044 +#define _REG_GP_ISEL_VER_CNT_MASK_ADDR 0x00090048 +#define _REG_GP_ISEL_XY_CNT_MASK_ADDR 0x0009004C +#define _REG_GP_ISEL_HOR_CNT_DELTA_ADDR 0x00090050 +#define _REG_GP_ISEL_VER_CNT_DELTA_ADDR 0x00090054 +#define _REG_GP_ISEL_TPG_MODE_ADDR 0x00090058 +#define _REG_GP_ISEL_TPG_RED1_ADDR 0x0009005C +#define _REG_GP_ISEL_TPG_GREEN1_ADDR 0x00090060 +#define _REG_GP_ISEL_TPG_BLUE1_ADDR 0x00090064 +#define _REG_GP_ISEL_TPG_RED2_ADDR 0x00090068 +#define _REG_GP_ISEL_TPG_GREEN2_ADDR 0x0009006C +#define _REG_GP_ISEL_TPG_BLUE2_ADDR 0x00090070 +#define _REG_GP_ISEL_CH_ID_ADDR 0x00090074 +#define _REG_GP_ISEL_FMT_TYPE_ADDR 0x00090078 +#define _REG_GP_ISEL_DATA_SEL_ADDR 0x0009007C +#define _REG_GP_ISEL_SBAND_SEL_ADDR 0x00090080 +#define _REG_GP_ISEL_SYNC_SEL_ADDR 0x00090084 +#define _REG_GP_SYNCGEN_HOR_CNT_ADDR 0x00090088 +#define _REG_GP_SYNCGEN_VER_CNT_ADDR 0x0009008C +#define _REG_GP_SYNCGEN_FRAME_CNT_ADDR 0x00090090 +#define _REG_GP_SOFT_RESET_ADDR 0x00090094 + + +#endif /* __GP_DEVICE_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_timer_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_timer_global.h new file mode 100644 index 0000000000000..ee636ad6c5b34 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_timer_global.h @@ -0,0 +1,33 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_TIMER_GLOBAL_H_INCLUDED__ +#define __GP_TIMER_GLOBAL_H_INCLUDED__ + +#include "hive_isp_css_defs.h" /*HIVE_GP_TIMER_SP_DMEM_ERROR_IRQ */ + +/* from gp_timer_defs.h*/ +#define GP_TIMER_COUNT_TYPE_HIGH 0 +#define GP_TIMER_COUNT_TYPE_LOW 1 +#define GP_TIMER_COUNT_TYPE_POSEDGE 2 +#define GP_TIMER_COUNT_TYPE_NEGEDGE 3 +#define GP_TIMER_COUNT_TYPE_TYPES 4 + +/* timer - 3 is selected */ +#define GP_TIMER_SEL 3 + +/*HIVE_GP_TIMER_SP_DMEM_ERROR_IRQ is selected*/ +#define GP_TIMER_SIGNAL_SELECT HIVE_GP_TIMER_SP_DMEM_ERROR_IRQ + +#endif /* __GP_TIMER_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gpio_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gpio_global.h new file mode 100644 index 0000000000000..a82ca2a8cadaf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gpio_global.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GPIO_GLOBAL_H_INCLUDED__ +#define __GPIO_GLOBAL_H_INCLUDED__ + +#define IS_GPIO_VERSION_1 + +#include + +/* pqiao: following part only defines in hive_isp_css_defs.h in fpga system. + port it here +*/ + +/* GPIO pin defines */ +/*#define HIVE_GPIO_CAMERA_BOARD_RESET_PIN_NR 0 +#define HIVE_GPIO_LCD_CLOCK_SELECT_PIN_NR 7 +#define HIVE_GPIO_HDMI_CLOCK_SELECT_PIN_NR 8 +#define HIVE_GPIO_LCD_VERT_FLIP_PIN_NR 8 +#define HIVE_GPIO_LCD_HOR_FLIP_PIN_NR 9 +#define HIVE_GPIO_AS3683_GPIO_P0_PIN_NR 1 +#define HIVE_GPIO_AS3683_DATA_P1_PIN_NR 2 +#define HIVE_GPIO_AS3683_CLK_P2_PIN_NR 3 +#define HIVE_GPIO_AS3683_T1_F0_PIN_NR 4 +#define HIVE_GPIO_AS3683_SFL_F1_PIN_NR 5 +#define HIVE_GPIO_AS3683_STROBE_F2_PIN_NR 6 +#define HIVE_GPIO_MAX1577_EN1_PIN_NR 1 +#define HIVE_GPIO_MAX1577_EN2_PIN_NR 2 +#define HIVE_GPIO_MAX8685A_EN_PIN_NR 3 +#define HIVE_GPIO_MAX8685A_TRIG_PIN_NR 4*/ + +#define HIVE_GPIO_STROBE_TRIGGER_PIN 2 + +#endif /* __GPIO_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h new file mode 100644 index 0000000000000..7e05d7d880d15 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __HMEM_GLOBAL_H_INCLUDED__ +#define __HMEM_GLOBAL_H_INCLUDED__ + +#include + +#define IS_HMEM_VERSION_1 + +#include "isp.h" + +/* +#define ISP_HIST_ADDRESS_BITS 12 +#define ISP_HIST_ALIGNMENT 4 +#define ISP_HIST_COMP_IN_PREC 12 +#define ISP_HIST_DEPTH 1024 +#define ISP_HIST_WIDTH 24 +#define ISP_HIST_COMPONENTS 4 +*/ +#define ISP_HIST_ALIGNMENT_LOG2 2 + +#define HMEM_SIZE_LOG2 (ISP_HIST_ADDRESS_BITS-ISP_HIST_ALIGNMENT_LOG2) +#define HMEM_SIZE ISP_HIST_DEPTH + +#define HMEM_UNIT_SIZE (HMEM_SIZE/ISP_HIST_COMPONENTS) +#define HMEM_UNIT_COUNT ISP_HIST_COMPONENTS + +#define HMEM_RANGE_LOG2 ISP_HIST_WIDTH +#define HMEM_RANGE (1UL<head == debug_data_ptr->tail); +} + +STORAGE_CLASS_DEBUG_C hrt_data debug_dequeue(void) +{ + hrt_data value = 0; + + assert(debug_buffer_address != ((hrt_address)-1)); + + debug_synch_queue(); + + if (!is_debug_buffer_empty()) { + value = debug_data_ptr->buf[debug_data_ptr->head]; + debug_data_ptr->head = (debug_data_ptr->head + 1) & DEBUG_BUF_MASK; + sp_dmem_store_uint32(SP0_ID, debug_buffer_address + DEBUG_DATA_HEAD_ADDR, debug_data_ptr->head); + } + + return value; +} + +STORAGE_CLASS_DEBUG_C void debug_synch_queue(void) +{ + uint32_t remote_tail = sp_dmem_load_uint32(SP0_ID, debug_buffer_address + DEBUG_DATA_TAIL_ADDR); +/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ + if (remote_tail > debug_data_ptr->tail) { + size_t delta = remote_tail - debug_data_ptr->tail; + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + } else if (remote_tail < debug_data_ptr->tail) { + size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); + } /* else we are up to date */ + debug_data_ptr->tail = remote_tail; +} + +STORAGE_CLASS_DEBUG_C void debug_synch_queue_isp(void) +{ + uint32_t remote_tail = isp_dmem_load_uint32(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_TAIL_ADDR); +/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ + if (remote_tail > debug_data_ptr->tail) { + size_t delta = remote_tail - debug_data_ptr->tail; + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + } else if (remote_tail < debug_data_ptr->tail) { + size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); + } /* else we are up to date */ + debug_data_ptr->tail = remote_tail; +} + +STORAGE_CLASS_DEBUG_C void debug_synch_queue_ddr(void) +{ + uint32_t remote_tail; + + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_TAIL_DDR_ADDR, &remote_tail, sizeof(uint32_t)); +/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ + if (remote_tail > debug_data_ptr->tail) { + size_t delta = remote_tail - debug_data_ptr->tail; + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + } else if (remote_tail < debug_data_ptr->tail) { + size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); + } /* else we are up to date */ + debug_data_ptr->tail = remote_tail; +} + +#endif /* __DEBUG_PRIVATE_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c new file mode 100644 index 0000000000000..770db7dff5d3b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c @@ -0,0 +1,299 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2016, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include + +#include "dma.h" + +#include "assert_support.h" + +#ifndef __INLINE_DMA__ +#include "dma_private.h" +#endif /* __INLINE_DMA__ */ + +void dma_get_state(const dma_ID_t ID, dma_state_t *state) +{ + int i; + hrt_data tmp; + + assert(ID < N_DMA_ID); + assert(state != NULL); + + tmp = dma_reg_load(ID, DMA_COMMAND_FSM_REG_IDX); + //reg [3:0] : flags error [3], stall, run, idle [0] + //reg [9:4] : command + //reg[14:10] : channel + //reg [23:15] : param + state->fsm_command_idle = tmp & 0x1; + state->fsm_command_run = tmp & 0x2; + state->fsm_command_stalling = tmp & 0x4; + state->fsm_command_error = tmp & 0x8; + state->last_command_channel = (tmp>>10 & 0x1F); + state->last_command_param = (tmp>>15 & 0x0F); + tmp = (tmp>>4) & 0x3F; +/* state->last_command = (dma_commands_t)tmp; */ +/* if the enumerator is made non-linear */ + /* AM: the list below does not cover all the cases*/ + /* and these are not correct */ + /* therefore for just dumpinmg this command*/ + state->last_command = tmp; + +/* + if (tmp == 0) + state->last_command = DMA_COMMAND_READ; + if (tmp == 1) + state->last_command = DMA_COMMAND_WRITE; + if (tmp == 2) + state->last_command = DMA_COMMAND_SET_CHANNEL; + if (tmp == 3) + state->last_command = DMA_COMMAND_SET_PARAM; + if (tmp == 4) + state->last_command = DMA_COMMAND_READ_SPECIFIC; + if (tmp == 5) + state->last_command = DMA_COMMAND_WRITE_SPECIFIC; + if (tmp == 8) + state->last_command = DMA_COMMAND_INIT; + if (tmp == 12) + state->last_command = DMA_COMMAND_INIT_SPECIFIC; + if (tmp == 15) + state->last_command = DMA_COMMAND_RST; +*/ + +/* No sub-fields, idx = 0 */ + state->current_command = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_CMD_IDX)); + state->current_addr_a = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_A_IDX)); + state->current_addr_b = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_B_IDX)); + + tmp = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_STATE_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_idle = tmp & 0x1; + state->fsm_ctrl_run = tmp & 0x2; + state->fsm_ctrl_stalling = tmp & 0x4; + state->fsm_ctrl_error = tmp & 0x8; + tmp = tmp >> 4; +/* state->fsm_ctrl_state = (dma_ctrl_states_t)tmp; */ + if (tmp == 0) + state->fsm_ctrl_state = DMA_CTRL_STATE_IDLE; + if (tmp == 1) + state->fsm_ctrl_state = DMA_CTRL_STATE_REQ_RCV; + if (tmp == 2) + state->fsm_ctrl_state = DMA_CTRL_STATE_RCV; + if (tmp == 3) + state->fsm_ctrl_state = DMA_CTRL_STATE_RCV_REQ; + if (tmp == 4) + state->fsm_ctrl_state = DMA_CTRL_STATE_INIT; + state->fsm_ctrl_source_dev = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_source_addr = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_source_stride = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_source_width = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_XB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_source_height = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_YB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_source_dev = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_dest_dev = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_dest_addr = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_dest_stride = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_source_width = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_dest_height = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_dest_width = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_source_elems = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_dest_elems = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + state->fsm_ctrl_pack_extension = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); + + tmp = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_STATE_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); + state->pack_idle = tmp & 0x1; + state->pack_run = tmp & 0x2; + state->pack_stalling = tmp & 0x4; + state->pack_error = tmp & 0x8; + state->pack_cnt_height = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_CNT_YB_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); + state->pack_src_cnt_width = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); + state->pack_dest_cnt_width = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); + + tmp = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_REQ_STATE_IDX, + _DMA_FSM_GROUP_FSM_REQ_IDX)); +/* state->read_state = (dma_rw_states_t)tmp; */ + if (tmp == 0) + state->read_state = DMA_RW_STATE_IDLE; + if (tmp == 1) + state->read_state = DMA_RW_STATE_REQ; + if (tmp == 2) + state->read_state = DMA_RW_STATE_NEXT_LINE; + if (tmp == 3) + state->read_state = DMA_RW_STATE_UNLOCK_CHANNEL; + state->read_cnt_height = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_REQ_CNT_YB_IDX, + _DMA_FSM_GROUP_FSM_REQ_IDX)); + state->read_cnt_width = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_REQ_CNT_XB_IDX, + _DMA_FSM_GROUP_FSM_REQ_IDX)); + + tmp = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_WR_STATE_IDX, + _DMA_FSM_GROUP_FSM_WR_IDX)); +/* state->write_state = (dma_rw_states_t)tmp; */ + if (tmp == 0) + state->write_state = DMA_RW_STATE_IDLE; + if (tmp == 1) + state->write_state = DMA_RW_STATE_REQ; + if (tmp == 2) + state->write_state = DMA_RW_STATE_NEXT_LINE; + if (tmp == 3) + state->write_state = DMA_RW_STATE_UNLOCK_CHANNEL; + state->write_height = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_WR_CNT_YB_IDX, + _DMA_FSM_GROUP_FSM_WR_IDX)); + state->write_width = dma_reg_load(ID, + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_WR_CNT_XB_IDX, + _DMA_FSM_GROUP_FSM_WR_IDX)); + + for (i = 0; i < HIVE_ISP_NUM_DMA_CONNS; i++) { + dma_port_state_t *port = &(state->port_states[i]); + + tmp = dma_reg_load(ID, DMA_DEV_INFO_REG_IDX(0, i)); + port->req_cs = ((tmp & 0x1) != 0); + port->req_we_n = ((tmp & 0x2) != 0); + port->req_run = ((tmp & 0x4) != 0); + port->req_ack = ((tmp & 0x8) != 0); + + tmp = dma_reg_load(ID, DMA_DEV_INFO_REG_IDX(1, i)); + port->send_cs = ((tmp & 0x1) != 0); + port->send_we_n = ((tmp & 0x2) != 0); + port->send_run = ((tmp & 0x4) != 0); + port->send_ack = ((tmp & 0x8) != 0); + + tmp = dma_reg_load(ID, DMA_DEV_INFO_REG_IDX(2, i)); + if (tmp & 0x1) + port->fifo_state = DMA_FIFO_STATE_WILL_BE_FULL; + if (tmp & 0x2) + port->fifo_state = DMA_FIFO_STATE_FULL; + if (tmp & 0x4) + port->fifo_state = DMA_FIFO_STATE_EMPTY; + port->fifo_counter = tmp >> 3; + } + + for (i = 0; i < HIVE_DMA_NUM_CHANNELS; i++) { + dma_channel_state_t *ch = &(state->channel_states[i]); + + ch->connection = DMA_GET_CONNECTION(dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_PACKING_SETUP_PARAM))); + ch->sign_extend = DMA_GET_EXTENSION(dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_PACKING_SETUP_PARAM))); + ch->height = dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_HEIGHT_PARAM)); + ch->stride_a = dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_STRIDE_A_PARAM)); + ch->elems_a = DMA_GET_ELEMENTS(dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_A_PARAM))); + ch->cropping_a = DMA_GET_CROPPING(dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_A_PARAM))); + ch->width_a = dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_WIDTH_A_PARAM)); + ch->stride_b = dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_STRIDE_B_PARAM)); + ch->elems_b = DMA_GET_ELEMENTS(dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_B_PARAM))); + ch->cropping_b = DMA_GET_CROPPING(dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_B_PARAM))); + ch->width_b = dma_reg_load(ID, + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_WIDTH_B_PARAM)); + } +} + +void +dma_set_max_burst_size(const dma_ID_t ID, dma_connection conn, + uint32_t max_burst_size) +{ + assert(ID < N_DMA_ID); + assert(max_burst_size > 0); + dma_reg_store(ID, DMA_DEV_INFO_REG_IDX(_DMA_DEV_INTERF_MAX_BURST_IDX, conn), + max_burst_size - 1); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h new file mode 100644 index 0000000000000..ab631e6f64b50 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h @@ -0,0 +1,207 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DMA_LOCAL_H_INCLUDED__ +#define __DMA_LOCAL_H_INCLUDED__ + +#include +#include "dma_global.h" + +#include /* HRTCAT() */ +#include /* _hrt_get_bits() */ +#include /* HIVE_DMA_NUM_CHANNELS */ +#include + +#define _DMA_FSM_GROUP_CMD_IDX _DMA_V2_FSM_GROUP_CMD_IDX +#define _DMA_FSM_GROUP_ADDR_A_IDX _DMA_V2_FSM_GROUP_ADDR_SRC_IDX +#define _DMA_FSM_GROUP_ADDR_B_IDX _DMA_V2_FSM_GROUP_ADDR_DEST_IDX + +#define _DMA_FSM_GROUP_CMD_CTRL_IDX _DMA_V2_FSM_GROUP_CMD_CTRL_IDX + +#define _DMA_FSM_GROUP_FSM_CTRL_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_STATE_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_STATE_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_REQ_XB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_XB_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_REQ_YB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_YB_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX +#define _DMA_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX + +#define _DMA_FSM_GROUP_FSM_PACK_IDX _DMA_V2_FSM_GROUP_FSM_PACK_IDX +#define _DMA_FSM_GROUP_FSM_PACK_STATE_IDX _DMA_V2_FSM_GROUP_FSM_PACK_STATE_IDX +#define _DMA_FSM_GROUP_FSM_PACK_CNT_YB_IDX _DMA_V2_FSM_GROUP_FSM_PACK_CNT_YB_IDX +#define _DMA_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX +#define _DMA_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX + +#define _DMA_FSM_GROUP_FSM_REQ_IDX _DMA_V2_FSM_GROUP_FSM_REQ_IDX +#define _DMA_FSM_GROUP_FSM_REQ_STATE_IDX _DMA_V2_FSM_GROUP_FSM_REQ_STATE_IDX +#define _DMA_FSM_GROUP_FSM_REQ_CNT_YB_IDX _DMA_V2_FSM_GROUP_FSM_REQ_CNT_YB_IDX +#define _DMA_FSM_GROUP_FSM_REQ_CNT_XB_IDX _DMA_V2_FSM_GROUP_FSM_REQ_CNT_XB_IDX + +#define _DMA_FSM_GROUP_FSM_WR_IDX _DMA_V2_FSM_GROUP_FSM_WR_IDX +#define _DMA_FSM_GROUP_FSM_WR_STATE_IDX _DMA_V2_FSM_GROUP_FSM_WR_STATE_IDX +#define _DMA_FSM_GROUP_FSM_WR_CNT_YB_IDX _DMA_V2_FSM_GROUP_FSM_WR_CNT_YB_IDX +#define _DMA_FSM_GROUP_FSM_WR_CNT_XB_IDX _DMA_V2_FSM_GROUP_FSM_WR_CNT_XB_IDX + +#define _DMA_DEV_INTERF_MAX_BURST_IDX _DMA_V2_DEV_INTERF_MAX_BURST_IDX + +/* + * Macro's to compute the DMA parameter register indices + */ +#define DMA_SEL_COMP(comp) (((comp) & _hrt_ones(_DMA_V2_ADDR_SEL_COMP_BITS)) << _DMA_V2_ADDR_SEL_COMP_IDX) +#define DMA_SEL_CH(ch) (((ch) & _hrt_ones(_DMA_V2_ADDR_SEL_CH_REG_BITS)) << _DMA_V2_ADDR_SEL_CH_REG_IDX) +#define DMA_SEL_PARAM(param) (((param) & _hrt_ones(_DMA_V2_ADDR_SEL_PARAM_BITS)) << _DMA_V2_ADDR_SEL_PARAM_IDX) +/* CG = Connection Group */ +#define DMA_SEL_CG_INFO(info) (((info) & _hrt_ones(_DMA_V2_ADDR_SEL_GROUP_COMP_INFO_BITS)) << _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_IDX) +#define DMA_SEL_CG_COMP(comp) (((comp) & _hrt_ones(_DMA_V2_ADDR_SEL_GROUP_COMP_BITS)) << _DMA_V2_ADDR_SEL_GROUP_COMP_IDX) +#define DMA_SEL_DEV_INFO(info) (((info) & _hrt_ones(_DMA_V2_ADDR_SEL_DEV_INTERF_INFO_BITS)) << _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_IDX) +#define DMA_SEL_DEV_ID(dev) (((dev) & _hrt_ones(_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS)) << _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX) + +#define DMA_COMMAND_FSM_REG_IDX (DMA_SEL_COMP(_DMA_V2_SEL_FSM_CMD) >> 2) +#define DMA_CHANNEL_PARAM_REG_IDX(ch, param) ((DMA_SEL_COMP(_DMA_V2_SEL_CH_REG) | DMA_SEL_CH(ch) | DMA_SEL_PARAM(param)) >> 2) +#define DMA_CG_INFO_REG_IDX(info_id, comp_id) ((DMA_SEL_COMP(_DMA_V2_SEL_CONN_GROUP) | DMA_SEL_CG_INFO(info_id) | DMA_SEL_CG_COMP(comp_id)) >> 2) +#define DMA_DEV_INFO_REG_IDX(info_id, dev_id) ((DMA_SEL_COMP(_DMA_V2_SEL_DEV_INTERF) | DMA_SEL_DEV_INFO(info_id) | DMA_SEL_DEV_ID(dev_id)) >> 2) +#define DMA_RST_REG_IDX (DMA_SEL_COMP(_DMA_V2_SEL_RESET) >> 2) + +#define DMA_GET_CONNECTION(val) _hrt_get_bits(val, _DMA_V2_CONNECTION_IDX, _DMA_V2_CONNECTION_BITS) +#define DMA_GET_EXTENSION(val) _hrt_get_bits(val, _DMA_V2_EXTENSION_IDX, _DMA_V2_EXTENSION_BITS) +#define DMA_GET_ELEMENTS(val) _hrt_get_bits(val, _DMA_V2_ELEMENTS_IDX, _DMA_V2_ELEMENTS_BITS) +#define DMA_GET_CROPPING(val) _hrt_get_bits(val, _DMA_V2_LEFT_CROPPING_IDX, _DMA_V2_LEFT_CROPPING_BITS) + +typedef enum { + DMA_CTRL_STATE_IDLE, + DMA_CTRL_STATE_REQ_RCV, + DMA_CTRL_STATE_RCV, + DMA_CTRL_STATE_RCV_REQ, + DMA_CTRL_STATE_INIT, + N_DMA_CTRL_STATES +} dma_ctrl_states_t; + +typedef enum { + DMA_COMMAND_READ, + DMA_COMMAND_WRITE, + DMA_COMMAND_SET_CHANNEL, + DMA_COMMAND_SET_PARAM, + DMA_COMMAND_READ_SPECIFIC, + DMA_COMMAND_WRITE_SPECIFIC, + DMA_COMMAND_INIT, + DMA_COMMAND_INIT_SPECIFIC, + DMA_COMMAND_RST, + N_DMA_COMMANDS +} dma_commands_t; + +typedef enum { + DMA_RW_STATE_IDLE, + DMA_RW_STATE_REQ, + DMA_RW_STATE_NEXT_LINE, + DMA_RW_STATE_UNLOCK_CHANNEL, + N_DMA_RW_STATES +} dma_rw_states_t; + +typedef enum { + DMA_FIFO_STATE_WILL_BE_FULL, + DMA_FIFO_STATE_FULL, + DMA_FIFO_STATE_EMPTY, + N_DMA_FIFO_STATES +} dma_fifo_states_t; + +/* typedef struct dma_state_s dma_state_t; */ +typedef struct dma_channel_state_s dma_channel_state_t; +typedef struct dma_port_state_s dma_port_state_t; + +struct dma_port_state_s { + bool req_cs; + bool req_we_n; + bool req_run; + bool req_ack; + bool send_cs; + bool send_we_n; + bool send_run; + bool send_ack; + dma_fifo_states_t fifo_state; + int fifo_counter; +}; + +struct dma_channel_state_s { + int connection; + bool sign_extend; + int height; + int stride_a; + int elems_a; + int cropping_a; + int width_a; + int stride_b; + int elems_b; + int cropping_b; + int width_b; +}; + +struct dma_state_s { + bool fsm_command_idle; + bool fsm_command_run; + bool fsm_command_stalling; + bool fsm_command_error; + dma_commands_t last_command; + int last_command_channel; + int last_command_param; + dma_commands_t current_command; + int current_addr_a; + int current_addr_b; + bool fsm_ctrl_idle; + bool fsm_ctrl_run; + bool fsm_ctrl_stalling; + bool fsm_ctrl_error; + dma_ctrl_states_t fsm_ctrl_state; + int fsm_ctrl_source_dev; + int fsm_ctrl_source_addr; + int fsm_ctrl_source_stride; + int fsm_ctrl_source_width; + int fsm_ctrl_source_height; + int fsm_ctrl_pack_source_dev; + int fsm_ctrl_pack_dest_dev; + int fsm_ctrl_dest_addr; + int fsm_ctrl_dest_stride; + int fsm_ctrl_pack_source_width; + int fsm_ctrl_pack_dest_height; + int fsm_ctrl_pack_dest_width; + int fsm_ctrl_pack_source_elems; + int fsm_ctrl_pack_dest_elems; + int fsm_ctrl_pack_extension; + int pack_idle; + int pack_run; + int pack_stalling; + int pack_error; + int pack_cnt_height; + int pack_src_cnt_width; + int pack_dest_cnt_width; + dma_rw_states_t read_state; + int read_cnt_height; + int read_cnt_width; + dma_rw_states_t write_state; + int write_height; + int write_width; + dma_port_state_t port_states[HIVE_ISP_NUM_DMA_CONNS]; + dma_channel_state_t channel_states[HIVE_DMA_NUM_CHANNELS]; +}; + +#endif /* __DMA_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h new file mode 100644 index 0000000000000..ba54b1f0467b7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DMA_PRIVATE_H_INCLUDED__ +#define __DMA_PRIVATE_H_INCLUDED__ + +#include "dma_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_DMA_C void dma_reg_store(const dma_ID_t ID, + const unsigned int reg, + const hrt_data value) +{ + assert(ID < N_DMA_ID); + assert(DMA_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(DMA_BASE[ID] + reg*sizeof(hrt_data), value); +} + +STORAGE_CLASS_DMA_C hrt_data dma_reg_load(const dma_ID_t ID, + const unsigned int reg) +{ + assert(ID < N_DMA_ID); + assert(DMA_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(DMA_BASE[ID] + reg*sizeof(hrt_data)); +} + +#endif /* __DMA_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c new file mode 100644 index 0000000000000..777670948d6f5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c @@ -0,0 +1,19 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "event_fifo.h" + +#ifndef __INLINE_EVENT__ +#include "event_fifo_private.h" +#endif /* __INLINE_EVENT__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h new file mode 100644 index 0000000000000..c595692c6ea98 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h @@ -0,0 +1,57 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _EVENT_FIFO_LOCAL_H +#define _EVENT_FIFO_LOCAL_H + +/* + * All events come from connections mapped on the system + * bus but do not use a global IRQ + */ +#include "event_fifo_global.h" + +typedef enum { + SP0_EVENT_ID, + ISP0_EVENT_ID, + STR2MIPI_EVENT_ID, + N_EVENT_ID +} event_ID_t; + +#define EVENT_QUERY_BIT 0 + +/* Events are read from FIFO */ +static const hrt_address event_source_addr[N_EVENT_ID] = { + 0x0000000000380000ULL, + 0x0000000000380004ULL, + 0xffffffffffffffffULL}; + +/* Read from FIFO are blocking, query data availability */ +static const hrt_address event_source_query_addr[N_EVENT_ID] = { + 0x0000000000380010ULL, + 0x0000000000380014ULL, + 0xffffffffffffffffULL}; + +/* Events are written to FIFO */ +static const hrt_address event_sink_addr[N_EVENT_ID] = { + 0x0000000000380008ULL, + 0x000000000038000CULL, + 0x0000000000090104ULL}; + +/* Writes to FIFO are blocking, query data space */ +static const hrt_address event_sink_query_addr[N_EVENT_ID] = { + 0x0000000000380018ULL, + 0x000000000038001CULL, + 0x000000000009010CULL}; + +#endif /* _EVENT_FIFO_LOCAL_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h new file mode 100644 index 0000000000000..bcfb734c2ed34 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h @@ -0,0 +1,75 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __EVENT_FIFO_PRIVATE_H +#define __EVENT_FIFO_PRIVATE_H + +#include "event_fifo_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +#include /* _hrt_get_bits() */ + +STORAGE_CLASS_EVENT_C void event_wait_for(const event_ID_t ID) +{ + assert(ID < N_EVENT_ID); + assert(event_source_addr[ID] != ((hrt_address)-1)); + (void)ia_css_device_load_uint32(event_source_addr[ID]); + return; +} + +STORAGE_CLASS_EVENT_C void cnd_event_wait_for(const event_ID_t ID, + const bool cnd) +{ + if (cnd) { + event_wait_for(ID); + } +} + +STORAGE_CLASS_EVENT_C hrt_data event_receive_token(const event_ID_t ID) +{ + assert(ID < N_EVENT_ID); + assert(event_source_addr[ID] != ((hrt_address)-1)); + return ia_css_device_load_uint32(event_source_addr[ID]); +} + +STORAGE_CLASS_EVENT_C void event_send_token(const event_ID_t ID, + const hrt_data token) +{ + assert(ID < N_EVENT_ID); + assert(event_sink_addr[ID] != ((hrt_address)-1)); + ia_css_device_store_uint32(event_sink_addr[ID], token); +} + +STORAGE_CLASS_EVENT_C bool is_event_pending(const event_ID_t ID) +{ + hrt_data value; + assert(ID < N_EVENT_ID); + assert(event_source_query_addr[ID] != ((hrt_address)-1)); + value = ia_css_device_load_uint32(event_source_query_addr[ID]); + return !_hrt_get_bit(value, EVENT_QUERY_BIT); +} + +STORAGE_CLASS_EVENT_C bool can_event_send_token(const event_ID_t ID) +{ + hrt_data value; + assert(ID < N_EVENT_ID); + assert(event_sink_query_addr[ID] != ((hrt_address)-1)); + value = ia_css_device_load_uint32(event_sink_query_addr[ID]); + return !_hrt_get_bit(value, EVENT_QUERY_BIT); +} + +#endif /* __EVENT_FIFO_PRIVATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c new file mode 100644 index 0000000000000..1bf292401adc1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c @@ -0,0 +1,567 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "fifo_monitor.h" + +#include +#include "device_access.h" + +#include + +#include "gp_device.h" + +#include "assert_support.h" + +#ifndef __INLINE_FIFO_MONITOR__ +#define STORAGE_CLASS_FIFO_MONITOR_DATA static const +#else +#define STORAGE_CLASS_FIFO_MONITOR_DATA const +#endif /* __INLINE_FIFO_MONITOR__ */ + +STORAGE_CLASS_FIFO_MONITOR_DATA unsigned int FIFO_SWITCH_ADDR[N_FIFO_SWITCH] = { + _REG_GP_SWITCH_IF_ADDR, + _REG_GP_SWITCH_GDC1_ADDR, + _REG_GP_SWITCH_GDC2_ADDR}; + +#ifndef __INLINE_FIFO_MONITOR__ +#include "fifo_monitor_private.h" +#endif /* __INLINE_FIFO_MONITOR__ */ + +static inline bool fifo_monitor_status_valid ( + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id); + +static inline bool fifo_monitor_status_accept( + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id); + + +void fifo_channel_get_state( + const fifo_monitor_ID_t ID, + const fifo_channel_t channel_id, + fifo_channel_state_t *state) +{ + assert(channel_id < N_FIFO_CHANNEL); + assert(state != NULL); + + switch (channel_id) { + case FIFO_CHANNEL_ISP0_TO_SP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_SP); /* ISP_STR_MON_PORT_ISP2SP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_SP); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_ISP); /* ISP_STR_MON_PORT_SP2ISP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_ISP); + break; + case FIFO_CHANNEL_SP0_TO_ISP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_ISP); /* ISP_STR_MON_PORT_SP2ISP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_ISP); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_SP); /* ISP_STR_MON_PORT_ISP2SP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_SP); + break; + case FIFO_CHANNEL_ISP0_TO_IF0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_A); /* ISP_STR_MON_PORT_ISP2PIFA */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_A); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); + break; + case FIFO_CHANNEL_IF0_TO_ISP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_A); /* ISP_STR_MON_PORT_PIFA2ISP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_A); + break; + case FIFO_CHANNEL_ISP0_TO_IF1: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_B); /* ISP_STR_MON_PORT_ISP2PIFA */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_B); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); + break; + case FIFO_CHANNEL_IF1_TO_ISP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); /* ISP_STR_MON_PORT_PIFB2ISP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); + break; + case FIFO_CHANNEL_ISP0_TO_DMA0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_DMA); /* ISP_STR_MON_PORT_ISP2DMA */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_DMA); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_ISP); /* MOD_STR_MON_PORT_ISP2DMA */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_ISP); + break; + case FIFO_CHANNEL_DMA0_TO_ISP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2ISP); /* MOD_STR_MON_PORT_DMA2ISP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2ISP); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_DMA); /* ISP_STR_MON_PORT_DMA2ISP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_DMA); + break; + case FIFO_CHANNEL_ISP0_TO_GDC0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GDC); /* ISP_STR_MON_PORT_ISP2GDC1 */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GDC); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_GDC); /* MOD_STR_MON_PORT_CELLS2GDC1 */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_GDC); + break; + case FIFO_CHANNEL_GDC0_TO_ISP0: + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_GDC); /* MOD_STR_MON_PORT_GDC12CELLS */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_GDC); + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GDC); /* ISP_STR_MON_PORT_GDC12ISP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GDC); + break; + case FIFO_CHANNEL_ISP0_TO_GDC1: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_ISP2GDC2); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_ISP2GDC2); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); + break; + case FIFO_CHANNEL_GDC1_TO_ISP0: + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_GDC22ISP); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_GDC22ISP); + break; + case FIFO_CHANNEL_ISP0_TO_HOST0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GPD); /* ISP_STR_MON_PORT_ISP2GPD */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GPD); + { + hrt_data value = ia_css_device_load_uint32(0x0000000000380014ULL); + state->fifo_valid = !_hrt_get_bit(value, 0); + state->sink_accept = false; /* no monitor connected */ + } + break; + case FIFO_CHANNEL_HOST0_TO_ISP0: + { + hrt_data value = ia_css_device_load_uint32(0x000000000038001CULL); + state->fifo_valid = false; /* no monitor connected */ + state->sink_accept = !_hrt_get_bit(value, 0); + } + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GPD); /* ISP_STR_MON_PORT_FA2ISP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GPD); + break; + case FIFO_CHANNEL_SP0_TO_IF0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_A); /* SP_STR_MON_PORT_SP2PIFA */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_A); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); + break; + case FIFO_CHANNEL_IF0_TO_SP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_PIF_A); /* SP_STR_MON_PORT_PIFA2SP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_PIF_A); + break; + case FIFO_CHANNEL_SP0_TO_IF1: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_B); /* SP_STR_MON_PORT_SP2PIFB */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_B); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); + break; + case FIFO_CHANNEL_IF1_TO_SP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); /* SP_STR_MON_PORT_PIFB2SP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); + break; + case FIFO_CHANNEL_SP0_TO_IF2: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_SIF); /* SP_STR_MON_PORT_SP2SIF */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_SIF); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_SIF); /* MOD_STR_MON_PORT_SP2SIF */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_SIF); + break; + case FIFO_CHANNEL_IF2_TO_SP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_SIF); /* MOD_STR_MON_PORT_SIF2SP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_SIF); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_SIF); /* SP_STR_MON_PORT_SIF2SP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_SIF); + break; + case FIFO_CHANNEL_SP0_TO_DMA0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_DMA); /* SP_STR_MON_PORT_SP2DMA */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_DMA); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_SP); /* MOD_STR_MON_PORT_SP2DMA */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_SP); + break; + case FIFO_CHANNEL_DMA0_TO_SP0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2SP); /* MOD_STR_MON_PORT_DMA2SP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2SP); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_DMA); /* SP_STR_MON_PORT_DMA2SP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_DMA); + break; + case FIFO_CHANNEL_SP0_TO_GDC0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC1); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC1); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC1); + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC1); + break; + case FIFO_CHANNEL_GDC0_TO_SP0: + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC12CELLS); + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC12CELLS); + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC12SP); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC12SP); + break; + case FIFO_CHANNEL_SP0_TO_GDC1: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC2); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC2); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); + break; + case FIFO_CHANNEL_GDC1_TO_SP0: + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC22SP); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC22SP); + break; + case FIFO_CHANNEL_SP0_TO_HOST0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_GPD); /* SP_STR_MON_PORT_SP2GPD */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_GPD); + { + hrt_data value = ia_css_device_load_uint32(0x0000000000380010ULL); + state->fifo_valid = !_hrt_get_bit(value, 0); + state->sink_accept = false; /* no monitor connected */ + } + break; + case FIFO_CHANNEL_HOST0_TO_SP0: + { + hrt_data value = ia_css_device_load_uint32(0x0000000000380018ULL); + state->fifo_valid = false; /* no monitor connected */ + state->sink_accept = !_hrt_get_bit(value, 0); + } + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_GPD); /* SP_STR_MON_PORT_FA2SP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_GPD); + break; + case FIFO_CHANNEL_SP0_TO_STREAM2MEM0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_SP2MC */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_MC); + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_SP2MC */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_MC); + break; + case FIFO_CHANNEL_STREAM2MEM0_TO_SP0: + state->fifo_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_MC2SP */ + state->sink_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_MC); + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_MC2SP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_MC); + break; + case FIFO_CHANNEL_SP0_TO_INPUT_SYSTEM0: + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SP2ISYS); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SP2ISYS); + state->fifo_valid = false; + state->sink_accept = false; + break; + case FIFO_CHANNEL_INPUT_SYSTEM0_TO_SP0: + state->fifo_valid = false; + state->sink_accept = false; + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_ISYS2SP); + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_ISYS2SP); + break; + default: + assert(0); + break; + } + + return; +} + +void fifo_switch_get_state( + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + fifo_switch_state_t *state) +{ + hrt_data data = (hrt_data)-1; + + assert(ID == FIFO_MONITOR0_ID); + assert(switch_id < N_FIFO_SWITCH); + assert(state != NULL); + + (void)ID; + + data = gp_device_reg_load(GP_DEVICE0_ID, FIFO_SWITCH_ADDR[switch_id]); + + state->is_none = (data == HIVE_ISP_CSS_STREAM_SWITCH_NONE); + state->is_sp = (data == HIVE_ISP_CSS_STREAM_SWITCH_SP); + state->is_isp = (data == HIVE_ISP_CSS_STREAM_SWITCH_ISP); + + return; +} + +void fifo_monitor_get_state( + const fifo_monitor_ID_t ID, + fifo_monitor_state_t *state) +{ + fifo_channel_t ch_id; + fifo_switch_t sw_id; + + assert(ID < N_FIFO_MONITOR_ID); + assert(state != NULL); + + for (ch_id = 0; ch_id < N_FIFO_CHANNEL; ch_id++) { + fifo_channel_get_state(ID, ch_id, + &(state->fifo_channels[ch_id])); + } + + for (sw_id = 0; sw_id < N_FIFO_SWITCH; sw_id++) { + fifo_switch_get_state(ID, sw_id, + &(state->fifo_switches[sw_id])); + } + return; +} + +static inline bool fifo_monitor_status_valid ( + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id) +{ + hrt_data data = fifo_monitor_reg_load(ID, reg); + + return (data >> (((port_id * 2) + _hive_str_mon_valid_offset))) & 0x1; +} + +static inline bool fifo_monitor_status_accept( + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id) +{ + hrt_data data = fifo_monitor_reg_load(ID, reg); + + return (data >> (((port_id * 2) + _hive_str_mon_accept_offset))) & 0x1; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h new file mode 100644 index 0000000000000..ed2f861817886 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h @@ -0,0 +1,99 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __FIFO_MONITOR_LOCAL_H_INCLUDED__ +#define __FIFO_MONITOR_LOCAL_H_INCLUDED__ + +#include +#include "fifo_monitor_global.h" + +#include "hive_isp_css_defs.h" /* ISP_STR_MON_PORT_SND_SP, ... */ + +#define _hive_str_mon_valid_offset 0 +#define _hive_str_mon_accept_offset 1 + +#define FIFO_CHANNEL_SP_VALID_MASK 0x55555555 +#define FIFO_CHANNEL_SP_VALID_B_MASK 0x00000055 +#define FIFO_CHANNEL_ISP_VALID_MASK 0x15555555 +#define FIFO_CHANNEL_MOD_VALID_MASK 0x55555555 + +typedef enum fifo_switch { + FIFO_SWITCH_IF, + FIFO_SWITCH_GDC0, + FIFO_SWITCH_GDC1, + N_FIFO_SWITCH +} fifo_switch_t; + +typedef enum fifo_channel { + FIFO_CHANNEL_ISP0_TO_SP0, + FIFO_CHANNEL_SP0_TO_ISP0, + FIFO_CHANNEL_ISP0_TO_IF0, + FIFO_CHANNEL_IF0_TO_ISP0, + FIFO_CHANNEL_ISP0_TO_IF1, + FIFO_CHANNEL_IF1_TO_ISP0, + FIFO_CHANNEL_ISP0_TO_DMA0, + FIFO_CHANNEL_DMA0_TO_ISP0, + FIFO_CHANNEL_ISP0_TO_GDC0, + FIFO_CHANNEL_GDC0_TO_ISP0, + FIFO_CHANNEL_ISP0_TO_GDC1, + FIFO_CHANNEL_GDC1_TO_ISP0, + FIFO_CHANNEL_ISP0_TO_HOST0, + FIFO_CHANNEL_HOST0_TO_ISP0, + FIFO_CHANNEL_SP0_TO_IF0, + FIFO_CHANNEL_IF0_TO_SP0, + FIFO_CHANNEL_SP0_TO_IF1, + FIFO_CHANNEL_IF1_TO_SP0, + FIFO_CHANNEL_SP0_TO_IF2, + FIFO_CHANNEL_IF2_TO_SP0, + FIFO_CHANNEL_SP0_TO_DMA0, + FIFO_CHANNEL_DMA0_TO_SP0, + FIFO_CHANNEL_SP0_TO_GDC0, + FIFO_CHANNEL_GDC0_TO_SP0, + FIFO_CHANNEL_SP0_TO_GDC1, + FIFO_CHANNEL_GDC1_TO_SP0, + FIFO_CHANNEL_SP0_TO_HOST0, + FIFO_CHANNEL_HOST0_TO_SP0, + FIFO_CHANNEL_SP0_TO_STREAM2MEM0, + FIFO_CHANNEL_STREAM2MEM0_TO_SP0, + FIFO_CHANNEL_SP0_TO_INPUT_SYSTEM0, + FIFO_CHANNEL_INPUT_SYSTEM0_TO_SP0, +/* + * No clue what this is + * + FIFO_CHANNEL_SP0_TO_IRQ0, + FIFO_CHANNEL_IRQ0_TO_SP0, + */ + N_FIFO_CHANNEL +} fifo_channel_t; + +struct fifo_channel_state_s { + bool src_valid; + bool fifo_accept; + bool fifo_valid; + bool sink_accept; +}; + +/* The switch is tri-state */ +struct fifo_switch_state_s { + bool is_none; + bool is_isp; + bool is_sp; +}; + +struct fifo_monitor_state_s { + struct fifo_channel_state_s fifo_channels[N_FIFO_CHANNEL]; + struct fifo_switch_state_s fifo_switches[N_FIFO_SWITCH]; +}; + +#endif /* __FIFO_MONITOR_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h new file mode 100644 index 0000000000000..d58cd7d1828d2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h @@ -0,0 +1,79 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __FIFO_MONITOR_PRIVATE_H_INCLUDED__ +#define __FIFO_MONITOR_PRIVATE_H_INCLUDED__ + +#include "fifo_monitor_public.h" + +#define __INLINE_GP_DEVICE__ +#include "gp_device.h" + +#include "device_access.h" + +#include "assert_support.h" + +#ifdef __INLINE_FIFO_MONITOR__ +extern const unsigned int FIFO_SWITCH_ADDR[N_FIFO_SWITCH]; +#endif + +STORAGE_CLASS_FIFO_MONITOR_C void fifo_switch_set( + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + const hrt_data sel) +{ + assert(ID == FIFO_MONITOR0_ID); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); + assert(switch_id < N_FIFO_SWITCH); + (void)ID; + + gp_device_reg_store(GP_DEVICE0_ID, FIFO_SWITCH_ADDR[switch_id], sel); + + return; +} + +STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_switch_get( + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id) +{ + assert(ID == FIFO_MONITOR0_ID); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); + assert(switch_id < N_FIFO_SWITCH); + (void)ID; + + return gp_device_reg_load(GP_DEVICE0_ID, FIFO_SWITCH_ADDR[switch_id]); +} + + +STORAGE_CLASS_FIFO_MONITOR_C void fifo_monitor_reg_store( + const fifo_monitor_ID_t ID, + const unsigned int reg, + const hrt_data value) +{ + assert(ID < N_FIFO_MONITOR_ID); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(FIFO_MONITOR_BASE[ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_monitor_reg_load( + const fifo_monitor_ID_t ID, + const unsigned int reg) +{ + assert(ID < N_FIFO_MONITOR_ID); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(FIFO_MONITOR_BASE[ID] + reg*sizeof(hrt_data)); +} + +#endif /* __FIFO_MONITOR_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c new file mode 100644 index 0000000000000..1966b147f8ab3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c @@ -0,0 +1,127 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* The name "gdc.h is already taken" */ +#include "gdc_device.h" + +#include "device_access.h" + +#include "assert_support.h" + +/* + * Local function declarations + */ +static inline void gdc_reg_store( + const gdc_ID_t ID, + const unsigned int reg, + const hrt_data value); + +static inline hrt_data gdc_reg_load( + const gdc_ID_t ID, + const unsigned int reg); + + +#ifndef __INLINE_GDC__ +#include "gdc_private.h" +#endif /* __INLINE_GDC__ */ + +/* + * Exported function implementations + */ +void gdc_lut_store( + const gdc_ID_t ID, + const int data[4][HRT_GDC_N]) +{ + unsigned int i, lut_offset = HRT_GDC_LUT_IDX; + + assert(ID < N_GDC_ID); + assert(HRT_GDC_LUT_COEFF_OFFSET <= (4*sizeof(hrt_data))); + + for (i = 0; i < HRT_GDC_N; i++) { + hrt_data entry_0 = data[0][i] & HRT_GDC_BCI_COEF_MASK; + hrt_data entry_1 = data[1][i] & HRT_GDC_BCI_COEF_MASK; + hrt_data entry_2 = data[2][i] & HRT_GDC_BCI_COEF_MASK; + hrt_data entry_3 = data[3][i] & HRT_GDC_BCI_COEF_MASK; + + hrt_data word_0 = entry_0 | + (entry_1 << HRT_GDC_LUT_COEFF_OFFSET); + hrt_data word_1 = entry_2 | + (entry_3 << HRT_GDC_LUT_COEFF_OFFSET); + + gdc_reg_store(ID, lut_offset++, word_0); + gdc_reg_store(ID, lut_offset++, word_1); + } + return; +} + +/* + * Input LUT format: + * c0[0-1023], c1[0-1023], c2[0-1023] c3[0-1023] + * + * Output LUT format (interleaved): + * c0[0], c1[0], c2[0], c3[0], c0[1], c1[1], c2[1], c3[1], .... + * c0[1023], c1[1023], c2[1023], c3[1023] + * + * The first format needs c0[0], c1[0] (which are 1024 words apart) + * to program gdc LUT registers. This makes it difficult to do piecemeal + * reads in SP side gdc_lut_store + * + * Interleaved format allows use of contiguous bytes to store into + * gdc LUT registers. + * + * See gdc_lut_store() definition in host/gdc.c vs sp/gdc_private.h + * + */ +void gdc_lut_convert_to_isp_format(const int in_lut[4][HRT_GDC_N], + int out_lut[4][HRT_GDC_N]) +{ + unsigned int i; + int *out = (int *)out_lut; + + for (i = 0; i < HRT_GDC_N; i++) { + out[0] = in_lut[0][i]; + out[1] = in_lut[1][i]; + out[2] = in_lut[2][i]; + out[3] = in_lut[3][i]; + out += 4; + } +} + +int gdc_get_unity( + const gdc_ID_t ID) +{ + assert(ID < N_GDC_ID); + (void)ID; + return (int)(1UL << HRT_GDC_FRAC_BITS); +} + + +/* + * Local function implementations + */ +static inline void gdc_reg_store( + const gdc_ID_t ID, + const unsigned int reg, + const hrt_data value) +{ + ia_css_device_store_uint32(GDC_BASE[ID] + reg*sizeof(hrt_data), value); + return; +} + +static inline hrt_data gdc_reg_load( + const gdc_ID_t ID, + const unsigned int reg) +{ + return ia_css_device_load_uint32(GDC_BASE[ID] + reg*sizeof(hrt_data)); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h new file mode 100644 index 0000000000000..0c6de867e012b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GDC_LOCAL_H_INCLUDED__ +#define __GDC_LOCAL_H_INCLUDED__ + +#include "gdc_global.h" + +#endif /* __GDC_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h new file mode 100644 index 0000000000000..f7dec75adf781 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GDC_PRIVATE_H_INCLUDED__ +#define __GDC_PRIVATE_H_INCLUDED__ + +#include "gdc_public.h" + +#endif /* __GDC_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c new file mode 100644 index 0000000000000..da88aa3af6644 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c @@ -0,0 +1,108 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "assert_support.h" +#include "gp_device.h" + +#ifndef __INLINE_GP_DEVICE__ +#include "gp_device_private.h" +#endif /* __INLINE_GP_DEVICE__ */ + +void gp_device_get_state( + const gp_device_ID_t ID, + gp_device_state_t *state) +{ + assert(ID < N_GP_DEVICE_ID); + assert(state != NULL); + + state->syncgen_enable = gp_device_reg_load(ID, + _REG_GP_SYNCGEN_ENABLE_ADDR); + state->syncgen_free_running = gp_device_reg_load(ID, + _REG_GP_SYNCGEN_FREE_RUNNING_ADDR); + state->syncgen_pause = gp_device_reg_load(ID, + _REG_GP_SYNCGEN_PAUSE_ADDR); + state->nr_frames = gp_device_reg_load(ID, + _REG_GP_NR_FRAMES_ADDR); + state->syngen_nr_pix = gp_device_reg_load(ID, + _REG_GP_SYNGEN_NR_PIX_ADDR); + state->syngen_nr_pix = gp_device_reg_load(ID, + _REG_GP_SYNGEN_NR_PIX_ADDR); + state->syngen_nr_lines = gp_device_reg_load(ID, + _REG_GP_SYNGEN_NR_LINES_ADDR); + state->syngen_hblank_cycles = gp_device_reg_load(ID, + _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR); + state->syngen_vblank_cycles = gp_device_reg_load(ID, + _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR); + state->isel_sof = gp_device_reg_load(ID, + _REG_GP_ISEL_SOF_ADDR); + state->isel_eof = gp_device_reg_load(ID, + _REG_GP_ISEL_EOF_ADDR); + state->isel_sol = gp_device_reg_load(ID, + _REG_GP_ISEL_SOL_ADDR); + state->isel_eol = gp_device_reg_load(ID, + _REG_GP_ISEL_EOL_ADDR); + state->isel_lfsr_enable = gp_device_reg_load(ID, + _REG_GP_ISEL_LFSR_ENABLE_ADDR); + state->isel_lfsr_enable_b = gp_device_reg_load(ID, + _REG_GP_ISEL_LFSR_ENABLE_B_ADDR); + state->isel_lfsr_reset_value = gp_device_reg_load(ID, + _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR); + state->isel_tpg_enable = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_ENABLE_ADDR); + state->isel_tpg_enable_b = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_ENABLE_B_ADDR); + state->isel_hor_cnt_mask = gp_device_reg_load(ID, + _REG_GP_ISEL_HOR_CNT_MASK_ADDR); + state->isel_ver_cnt_mask = gp_device_reg_load(ID, + _REG_GP_ISEL_VER_CNT_MASK_ADDR); + state->isel_xy_cnt_mask = gp_device_reg_load(ID, + _REG_GP_ISEL_XY_CNT_MASK_ADDR); + state->isel_hor_cnt_delta = gp_device_reg_load(ID, + _REG_GP_ISEL_HOR_CNT_DELTA_ADDR); + state->isel_ver_cnt_delta = gp_device_reg_load(ID, + _REG_GP_ISEL_VER_CNT_DELTA_ADDR); + state->isel_tpg_mode = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_MODE_ADDR); + state->isel_tpg_red1 = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_RED1_ADDR); + state->isel_tpg_green1 = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_GREEN1_ADDR); + state->isel_tpg_blue1 = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_BLUE1_ADDR); + state->isel_tpg_red2 = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_RED2_ADDR); + state->isel_tpg_green2 = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_GREEN2_ADDR); + state->isel_tpg_blue2 = gp_device_reg_load(ID, + _REG_GP_ISEL_TPG_BLUE2_ADDR); + state->isel_ch_id = gp_device_reg_load(ID, + _REG_GP_ISEL_CH_ID_ADDR); + state->isel_fmt_type = gp_device_reg_load(ID, + _REG_GP_ISEL_FMT_TYPE_ADDR); + state->isel_data_sel = gp_device_reg_load(ID, + _REG_GP_ISEL_DATA_SEL_ADDR); + state->isel_sband_sel = gp_device_reg_load(ID, + _REG_GP_ISEL_SBAND_SEL_ADDR); + state->isel_sync_sel = gp_device_reg_load(ID, + _REG_GP_ISEL_SYNC_SEL_ADDR); + state->syncgen_hor_cnt = gp_device_reg_load(ID, + _REG_GP_SYNCGEN_HOR_CNT_ADDR); + state->syncgen_ver_cnt = gp_device_reg_load(ID, + _REG_GP_SYNCGEN_VER_CNT_ADDR); + state->syncgen_frame_cnt = gp_device_reg_load(ID, + _REG_GP_SYNCGEN_FRAME_CNT_ADDR); + state->soft_reset = gp_device_reg_load(ID, + _REG_GP_SOFT_RESET_ADDR); + return; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h new file mode 100644 index 0000000000000..113d5ed32d421 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h @@ -0,0 +1,143 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_DEVICE_LOCAL_H_INCLUDED__ +#define __GP_DEVICE_LOCAL_H_INCLUDED__ + +#include "gp_device_global.h" + +/* @ GP_REGS_BASE -> GP_DEVICE_BASE */ +#define _REG_GP_SDRAM_WAKEUP_ADDR 0x00 +#define _REG_GP_IDLE_ADDR 0x04 +/* #define _REG_GP_IRQ_REQ0_ADDR 0x08 */ +/* #define _REG_GP_IRQ_REQ1_ADDR 0x0C */ +#define _REG_GP_SP_STREAM_STAT_ADDR 0x10 +#define _REG_GP_SP_STREAM_STAT_B_ADDR 0x14 +#define _REG_GP_ISP_STREAM_STAT_ADDR 0x18 +#define _REG_GP_MOD_STREAM_STAT_ADDR 0x1C +#define _REG_GP_SP_STREAM_STAT_IRQ_COND_ADDR 0x20 +#define _REG_GP_SP_STREAM_STAT_B_IRQ_COND_ADDR 0x24 +#define _REG_GP_ISP_STREAM_STAT_IRQ_COND_ADDR 0x28 +#define _REG_GP_MOD_STREAM_STAT_IRQ_COND_ADDR 0x2C +#define _REG_GP_SP_STREAM_STAT_IRQ_ENABLE_ADDR 0x30 +#define _REG_GP_SP_STREAM_STAT_B_IRQ_ENABLE_ADDR 0x34 +#define _REG_GP_ISP_STREAM_STAT_IRQ_ENABLE_ADDR 0x38 +#define _REG_GP_MOD_STREAM_STAT_IRQ_ENABLE_ADDR 0x3C +/* +#define _REG_GP_SWITCH_IF_ADDR 0x40 +#define _REG_GP_SWITCH_GDC1_ADDR 0x44 +#define _REG_GP_SWITCH_GDC2_ADDR 0x48 +*/ +#define _REG_GP_SLV_REG_RST_ADDR 0x50 +#define _REG_GP_SWITCH_ISYS2401_ADDR 0x54 + +/* @ INPUT_FORMATTER_BASE -> GP_DEVICE_BASE */ +/* +#define _REG_GP_IFMT_input_switch_lut_reg0 0x00030800 +#define _REG_GP_IFMT_input_switch_lut_reg1 0x00030804 +#define _REG_GP_IFMT_input_switch_lut_reg2 0x00030808 +#define _REG_GP_IFMT_input_switch_lut_reg3 0x0003080C +#define _REG_GP_IFMT_input_switch_lut_reg4 0x00030810 +#define _REG_GP_IFMT_input_switch_lut_reg5 0x00030814 +#define _REG_GP_IFMT_input_switch_lut_reg6 0x00030818 +#define _REG_GP_IFMT_input_switch_lut_reg7 0x0003081C +#define _REG_GP_IFMT_input_switch_fsync_lut 0x00030820 +#define _REG_GP_IFMT_srst 0x00030824 +#define _REG_GP_IFMT_slv_reg_srst 0x00030828 +#define _REG_GP_IFMT_input_switch_ch_id_fmt_type 0x0003082C +*/ +/* @ GP_DEVICE_BASE */ +/* +#define _REG_GP_SYNCGEN_ENABLE_ADDR 0x00090000 +#define _REG_GP_SYNCGEN_FREE_RUNNING_ADDR 0x00090004 +#define _REG_GP_SYNCGEN_PAUSE_ADDR 0x00090008 +#define _REG_GP_NR_FRAMES_ADDR 0x0009000C +#define _REG_GP_SYNGEN_NR_PIX_ADDR 0x00090010 +#define _REG_GP_SYNGEN_NR_LINES_ADDR 0x00090014 +#define _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR 0x00090018 +#define _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR 0x0009001C +#define _REG_GP_ISEL_SOF_ADDR 0x00090020 +#define _REG_GP_ISEL_EOF_ADDR 0x00090024 +#define _REG_GP_ISEL_SOL_ADDR 0x00090028 +#define _REG_GP_ISEL_EOL_ADDR 0x0009002C +#define _REG_GP_ISEL_LFSR_ENABLE_ADDR 0x00090030 +#define _REG_GP_ISEL_LFSR_ENABLE_B_ADDR 0x00090034 +#define _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR 0x00090038 +#define _REG_GP_ISEL_TPG_ENABLE_ADDR 0x0009003C +#define _REG_GP_ISEL_TPG_ENABLE_B_ADDR 0x00090040 +#define _REG_GP_ISEL_HOR_CNT_MASK_ADDR 0x00090044 +#define _REG_GP_ISEL_VER_CNT_MASK_ADDR 0x00090048 +#define _REG_GP_ISEL_XY_CNT_MASK_ADDR 0x0009004C +#define _REG_GP_ISEL_HOR_CNT_DELTA_ADDR 0x00090050 +#define _REG_GP_ISEL_VER_CNT_DELTA_ADDR 0x00090054 +#define _REG_GP_ISEL_TPG_MODE_ADDR 0x00090058 +#define _REG_GP_ISEL_TPG_RED1_ADDR 0x0009005C +#define _REG_GP_ISEL_TPG_GREEN1_ADDR 0x00090060 +#define _REG_GP_ISEL_TPG_BLUE1_ADDR 0x00090064 +#define _REG_GP_ISEL_TPG_RED2_ADDR 0x00090068 +#define _REG_GP_ISEL_TPG_GREEN2_ADDR 0x0009006C +#define _REG_GP_ISEL_TPG_BLUE2_ADDR 0x00090070 +#define _REG_GP_ISEL_CH_ID_ADDR 0x00090074 +#define _REG_GP_ISEL_FMT_TYPE_ADDR 0x00090078 +#define _REG_GP_ISEL_DATA_SEL_ADDR 0x0009007C +#define _REG_GP_ISEL_SBAND_SEL_ADDR 0x00090080 +#define _REG_GP_ISEL_SYNC_SEL_ADDR 0x00090084 +#define _REG_GP_SYNCGEN_HOR_CNT_ADDR 0x00090088 +#define _REG_GP_SYNCGEN_VER_CNT_ADDR 0x0009008C +#define _REG_GP_SYNCGEN_FRAME_CNT_ADDR 0x00090090 +#define _REG_GP_SOFT_RESET_ADDR 0x00090094 +*/ + +struct gp_device_state_s { + int syncgen_enable; + int syncgen_free_running; + int syncgen_pause; + int nr_frames; + int syngen_nr_pix; + int syngen_nr_lines; + int syngen_hblank_cycles; + int syngen_vblank_cycles; + int isel_sof; + int isel_eof; + int isel_sol; + int isel_eol; + int isel_lfsr_enable; + int isel_lfsr_enable_b; + int isel_lfsr_reset_value; + int isel_tpg_enable; + int isel_tpg_enable_b; + int isel_hor_cnt_mask; + int isel_ver_cnt_mask; + int isel_xy_cnt_mask; + int isel_hor_cnt_delta; + int isel_ver_cnt_delta; + int isel_tpg_mode; + int isel_tpg_red1; + int isel_tpg_green1; + int isel_tpg_blue1; + int isel_tpg_red2; + int isel_tpg_green2; + int isel_tpg_blue2; + int isel_ch_id; + int isel_fmt_type; + int isel_data_sel; + int isel_sband_sel; + int isel_sync_sel; + int syncgen_hor_cnt; + int syncgen_ver_cnt; + int syncgen_frame_cnt; + int soft_reset; +}; + +#endif /* __GP_DEVICE_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h new file mode 100644 index 0000000000000..7c0362c29411a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_DEVICE_PRIVATE_H_INCLUDED__ +#define __GP_DEVICE_PRIVATE_H_INCLUDED__ + +#include "gp_device_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_GP_DEVICE_C void gp_device_reg_store( + const gp_device_ID_t ID, + const unsigned int reg_addr, + const hrt_data value) +{ + assert(ID < N_GP_DEVICE_ID); + assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); + assert((reg_addr % sizeof(hrt_data)) == 0); + ia_css_device_store_uint32(GP_DEVICE_BASE[ID] + reg_addr, value); + return; +} + +STORAGE_CLASS_GP_DEVICE_C hrt_data gp_device_reg_load( + const gp_device_ID_t ID, + const hrt_address reg_addr) +{ + assert(ID < N_GP_DEVICE_ID); + assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); + assert((reg_addr % sizeof(hrt_data)) == 0); + return ia_css_device_load_uint32(GP_DEVICE_BASE[ID] + reg_addr); +} + +#endif /* __GP_DEVICE_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c new file mode 100644 index 0000000000000..b6b1344786b15 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c @@ -0,0 +1,70 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include /*uint32_t */ +#include "gp_timer.h" /*system_local.h, + gp_timer_public.h*/ + +#ifndef __INLINE_GP_TIMER__ +#include "gp_timer_private.h" /*device_access.h*/ +#endif /* __INLINE_GP_TIMER__ */ +#include "system_local.h" + +/* FIXME: not sure if reg_load(), reg_store() should be API. + */ +static uint32_t +gp_timer_reg_load(uint32_t reg); + +static void +gp_timer_reg_store(uint32_t reg, uint32_t value); + +static uint32_t +gp_timer_reg_load(uint32_t reg) +{ + return ia_css_device_load_uint32( + GP_TIMER_BASE + + (reg * sizeof(uint32_t))); +} + +static void +gp_timer_reg_store(uint32_t reg, uint32_t value) +{ + ia_css_device_store_uint32((GP_TIMER_BASE + + (reg * sizeof(uint32_t))), + value); +} + +void gp_timer_init(gp_timer_ID_t ID) +{ + /* set_overall_enable*/ + gp_timer_reg_store(_REG_GP_TIMER_OVERALL_ENABLE, 1); + + /*set enable*/ + gp_timer_reg_store(_REG_GP_TIMER_ENABLE_ID(ID), 1); + + /* set signal select */ + gp_timer_reg_store(_REG_GP_TIMER_SIGNAL_SELECT_ID(ID), GP_TIMER_SIGNAL_SELECT); + + /*set count type */ + gp_timer_reg_store(_REG_GP_TIMER_COUNT_TYPE_ID(ID), GP_TIMER_COUNT_TYPE_LOW); + + /*reset gp timer */ + gp_timer_reg_store(_REG_GP_TIMER_RESET_REG, 0xFF); +} + +uint32_t +gp_timer_read(gp_timer_ID_t ID) +{ + return gp_timer_reg_load(_REG_GP_TIMER_VALUE_ID(ID)); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h new file mode 100644 index 0000000000000..19ce35d87291e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_TIMER_LOCAL_H_INCLUDED__ +#define __GP_TIMER_LOCAL_H_INCLUDED__ + +#include "gp_timer_global.h" /*GP_TIMER_SEL + GP_TIMER_SIGNAL_SELECT*/ + +#include "gp_timer_defs.h" /*HIVE_GP_TIMER_xxx registers*/ +#include "hive_isp_css_defs.h" /*HIVE_GP_TIMER_NUM_COUNTERS + HIVE_GP_TIMER_NUM_IRQS*/ + +#define _REG_GP_TIMER_RESET_REG HIVE_GP_TIMER_RESET_REG_IDX +#define _REG_GP_TIMER_OVERALL_ENABLE HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX + +/*Register offsets for timers [1,7] can be obtained + * by adding (GP_TIMERx_ID * sizeof(uint32_t))*/ +#define _REG_GP_TIMER_ENABLE_ID(timer_id) HIVE_GP_TIMER_ENABLE_REG_IDX(timer_id) +#define _REG_GP_TIMER_VALUE_ID(timer_id) HIVE_GP_TIMER_VALUE_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) +#define _REG_GP_TIMER_COUNT_TYPE_ID(timer_id) HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) +#define _REG_GP_TIMER_SIGNAL_SELECT_ID(timer_id) HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) + + +#define _REG_GP_TIMER_IRQ_TRIGGER_VALUE_ID(irq_id) HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS) + +#define _REG_GP_TIMER_IRQ_TIMER_SELECT_ID(irq_id) \ + HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS, HIVE_GP_TIMER_NUM_IRQS) + +#define _REG_GP_TIMER_IRQ_ENABLE_ID(irq_id) \ + HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS, HIVE_GP_TIMER_NUM_IRQS) + + +#endif /*__GP_TIMER_LOCAL_H_INCLUDED__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h new file mode 100644 index 0000000000000..705be5e5cc704 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_TIMER_PRIVATE_H_INCLUDED__ +#define __GP_TIMER_PRIVATE_H_INCLUDED__ + +#include "gp_timer_public.h" +#include "device_access.h" +#include "assert_support.h" + +#endif /* __GP_TIMER_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h new file mode 100644 index 0000000000000..f4652b79734da --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GPIO_LOCAL_H_INCLUDED__ +#define __GPIO_LOCAL_H_INCLUDED__ + +#include "gpio_global.h" + +#endif /* __GPIO_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h new file mode 100644 index 0000000000000..b6ebf34eaa9df --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h @@ -0,0 +1,44 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GPIO_PRIVATE_H_INCLUDED__ +#define __GPIO_PRIVATE_H_INCLUDED__ + +#include "gpio_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_GPIO_C void gpio_reg_store( + const gpio_ID_t ID, + const unsigned int reg, + const hrt_data value) +{ +OP___assert(ID < N_GPIO_ID); +OP___assert(GPIO_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(GPIO_BASE[ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_GPIO_C hrt_data gpio_reg_load( + const gpio_ID_t ID, + const unsigned int reg) +{ +OP___assert(ID < N_GPIO_ID); +OP___assert(GPIO_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(GPIO_BASE[ID] + reg*sizeof(hrt_data)); +} + +#endif /* __GPIO_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c new file mode 100644 index 0000000000000..e48f180c9507a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c @@ -0,0 +1,19 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "hmem.h" + +#ifndef __INLINE_HMEM__ +#include "hmem_private.h" +#endif /* __INLINE_HMEM__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h new file mode 100644 index 0000000000000..499f55f07253c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __HMEM_LOCAL_H_INCLUDED__ +#define __HMEM_LOCAL_H_INCLUDED__ + +#include "hmem_global.h" + +#endif /* __HMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h new file mode 100644 index 0000000000000..32a780380e117 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __HMEM_PRIVATE_H_INCLUDED__ +#define __HMEM_PRIVATE_H_INCLUDED__ + +#include "hmem_public.h" + +#include "assert_support.h" + +STORAGE_CLASS_HMEM_C size_t sizeof_hmem( + const hmem_ID_t ID) +{ + assert(ID < N_HMEM_ID); + (void)ID; + return HMEM_SIZE*sizeof(hmem_data_t); +} + +#endif /* __HMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c new file mode 100644 index 0000000000000..0e1ca995fb06f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c @@ -0,0 +1,228 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "system_global.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2 + +#include "input_formatter.h" +#include +#include "gp_device.h" + +#include "assert_support.h" + +#ifndef __INLINE_INPUT_FORMATTER__ +#include "input_formatter_private.h" +#endif /* __INLINE_INPUT_FORMATTER__ */ + +const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID] = { + INPUT_FORMATTER0_SRST_OFFSET, + INPUT_FORMATTER1_SRST_OFFSET, + INPUT_FORMATTER2_SRST_OFFSET, + INPUT_FORMATTER3_SRST_OFFSET}; + +const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID] = { + INPUT_FORMATTER0_SRST_MASK, + INPUT_FORMATTER1_SRST_MASK, + INPUT_FORMATTER2_SRST_MASK, + INPUT_FORMATTER3_SRST_MASK}; + +const uint8_t HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID] = { + HIVE_INPUT_SWITCH_SELECT_IF_PRIM, + HIVE_INPUT_SWITCH_SELECT_IF_PRIM, + HIVE_INPUT_SWITCH_SELECT_IF_SEC, + HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM}; + +/* MW Should be part of system_global.h, where we have the main enumeration */ +static const bool HIVE_IF_BIN_COPY[N_INPUT_FORMATTER_ID] = { + false, false, false, true +}; + +void input_formatter_rst( + const input_formatter_ID_t ID) +{ + hrt_address addr; + hrt_data rst; + + assert(ID < N_INPUT_FORMATTER_ID); + + addr = HIVE_IF_SRST_ADDRESS[ID]; + rst = HIVE_IF_SRST_MASK[ID]; + + /* TEMPORARY HACK: THIS RESET BREAKS THE METADATA FEATURE + * WICH USES THE STREAM2MEMRY BLOCK. + * MUST BE FIXED PROPERLY + */ + if (!HIVE_IF_BIN_COPY[ID]) { + input_formatter_reg_store(ID, addr, rst); + } + + return; +} + +unsigned int input_formatter_get_alignment( + const input_formatter_ID_t ID) +{ + assert(ID < N_INPUT_FORMATTER_ID); + + return input_formatter_alignment[ID]; +} + +void input_formatter_set_fifo_blocking_mode( + const input_formatter_ID_t ID, + const bool enable) +{ + assert(ID < N_INPUT_FORMATTER_ID); + + /* cnd_input_formatter_reg_store() */ + if (!HIVE_IF_BIN_COPY[ID]) { + input_formatter_reg_store(ID, + HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS, enable); + } + return; +} + +void input_formatter_get_switch_state( + const input_formatter_ID_t ID, + input_formatter_switch_state_t *state) +{ + assert(ID < N_INPUT_FORMATTER_ID); + assert(state != NULL); + + /* We'll change this into an intelligent function to get switch info per IF */ + (void)ID; + + state->if_input_switch_lut_reg[0] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg0); + state->if_input_switch_lut_reg[1] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg1); + state->if_input_switch_lut_reg[2] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg2); + state->if_input_switch_lut_reg[3] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg3); + state->if_input_switch_lut_reg[4] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg4); + state->if_input_switch_lut_reg[5] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg5); + state->if_input_switch_lut_reg[6] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg6); + state->if_input_switch_lut_reg[7] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg7); + state->if_input_switch_fsync_lut = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_fsync_lut); + state->if_input_switch_ch_id_fmt_type = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_ch_id_fmt_type); + + return; +} + +void input_formatter_get_state( + const input_formatter_ID_t ID, + input_formatter_state_t *state) +{ + assert(ID < N_INPUT_FORMATTER_ID); + assert(state != NULL); +/* + state->reset = input_formatter_reg_load(ID, + HIVE_IF_RESET_ADDRESS); + */ + state->start_line = input_formatter_reg_load(ID, + HIVE_IF_START_LINE_ADDRESS); + state->start_column = input_formatter_reg_load(ID, + HIVE_IF_START_COLUMN_ADDRESS); + state->cropped_height = input_formatter_reg_load(ID, + HIVE_IF_CROPPED_HEIGHT_ADDRESS); + state->cropped_width = input_formatter_reg_load(ID, + HIVE_IF_CROPPED_WIDTH_ADDRESS); + state->ver_decimation = input_formatter_reg_load(ID, + HIVE_IF_VERTICAL_DECIMATION_ADDRESS); + state->hor_decimation = input_formatter_reg_load(ID, + HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS); + state->hor_deinterleaving = input_formatter_reg_load(ID, + HIVE_IF_H_DEINTERLEAVING_ADDRESS); + state->left_padding = input_formatter_reg_load(ID, + HIVE_IF_LEFTPADDING_WIDTH_ADDRESS); + state->eol_offset = input_formatter_reg_load(ID, + HIVE_IF_END_OF_LINE_OFFSET_ADDRESS); + state->vmem_start_address = input_formatter_reg_load(ID, + HIVE_IF_VMEM_START_ADDRESS_ADDRESS); + state->vmem_end_address = input_formatter_reg_load(ID, + HIVE_IF_VMEM_END_ADDRESS_ADDRESS); + state->vmem_increment = input_formatter_reg_load(ID, + HIVE_IF_VMEM_INCREMENT_ADDRESS); + state->is_yuv420 = input_formatter_reg_load(ID, + HIVE_IF_YUV_420_FORMAT_ADDRESS); + state->vsync_active_low = input_formatter_reg_load(ID, + HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS); + state->hsync_active_low = input_formatter_reg_load(ID, + HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS); + state->allow_fifo_overflow = input_formatter_reg_load(ID, + HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS); + state->block_fifo_when_no_req = input_formatter_reg_load(ID, + HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS); + state->ver_deinterleaving = input_formatter_reg_load(ID, + HIVE_IF_V_DEINTERLEAVING_ADDRESS); +/* FSM */ + state->fsm_sync_status = input_formatter_reg_load(ID, + HIVE_IF_FSM_SYNC_STATUS); + state->fsm_sync_counter = input_formatter_reg_load(ID, + HIVE_IF_FSM_SYNC_COUNTER); + state->fsm_crop_status = input_formatter_reg_load(ID, + HIVE_IF_FSM_CROP_STATUS); + state->fsm_crop_line_counter = input_formatter_reg_load(ID, + HIVE_IF_FSM_CROP_LINE_COUNTER); + state->fsm_crop_pixel_counter = input_formatter_reg_load(ID, + HIVE_IF_FSM_CROP_PIXEL_COUNTER); + state->fsm_deinterleaving_index = input_formatter_reg_load(ID, + HIVE_IF_FSM_DEINTERLEAVING_IDX); + state->fsm_dec_h_counter = input_formatter_reg_load(ID, + HIVE_IF_FSM_DECIMATION_H_COUNTER); + state->fsm_dec_v_counter = input_formatter_reg_load(ID, + HIVE_IF_FSM_DECIMATION_V_COUNTER); + state->fsm_dec_block_v_counter = input_formatter_reg_load(ID, + HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER); + state->fsm_padding_status = input_formatter_reg_load(ID, + HIVE_IF_FSM_PADDING_STATUS); + state->fsm_padding_elem_counter = input_formatter_reg_load(ID, + HIVE_IF_FSM_PADDING_ELEMENT_COUNTER); + state->fsm_vector_support_error = input_formatter_reg_load(ID, + HIVE_IF_FSM_VECTOR_SUPPORT_ERROR); + state->fsm_vector_buffer_full = input_formatter_reg_load(ID, + HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL); + state->vector_support = input_formatter_reg_load(ID, + HIVE_IF_FSM_VECTOR_SUPPORT); + state->sensor_data_lost = input_formatter_reg_load(ID, + HIVE_IF_FIFO_SENSOR_STATUS); + + return; +} + +void input_formatter_bin_get_state( + const input_formatter_ID_t ID, + input_formatter_bin_state_t *state) +{ + assert(ID < N_INPUT_FORMATTER_ID); + assert(state != NULL); + + state->reset = input_formatter_reg_load(ID, + HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS); + state->input_endianness = input_formatter_reg_load(ID, + HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS); + state->output_endianness = input_formatter_reg_load(ID, + HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS); + state->bitswap = input_formatter_reg_load(ID, + HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS); + state->block_synch = input_formatter_reg_load(ID, + HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS); + state->packet_synch = input_formatter_reg_load(ID, + HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS); + state->readpostwrite_synch = input_formatter_reg_load(ID, + HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS); + state->is_2ppc = input_formatter_reg_load(ID, + HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS); + state->en_status_update = input_formatter_reg_load(ID, + HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS); + return; +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h new file mode 100644 index 0000000000000..3e00b5e6bad7b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h @@ -0,0 +1,120 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_FORMATTER_LOCAL_H_INCLUDED__ +#define __INPUT_FORMATTER_LOCAL_H_INCLUDED__ + +#include "input_formatter_global.h" + +#include "isp.h" /* ISP_VEC_ALIGN */ + +typedef struct input_formatter_switch_state_s input_formatter_switch_state_t; +typedef struct input_formatter_state_s input_formatter_state_t; +typedef struct input_formatter_bin_state_s input_formatter_bin_state_t; + +#define HIVE_IF_FSM_SYNC_STATUS 0x100 +#define HIVE_IF_FSM_SYNC_COUNTER 0x104 +#define HIVE_IF_FSM_DEINTERLEAVING_IDX 0x114 +#define HIVE_IF_FSM_DECIMATION_H_COUNTER 0x118 +#define HIVE_IF_FSM_DECIMATION_V_COUNTER 0x11C +#define HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER 0x120 +#define HIVE_IF_FSM_PADDING_STATUS 0x124 +#define HIVE_IF_FSM_PADDING_ELEMENT_COUNTER 0x128 +#define HIVE_IF_FSM_VECTOR_SUPPORT_ERROR 0x12C +#define HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL 0x130 +#define HIVE_IF_FSM_VECTOR_SUPPORT 0x134 +#define HIVE_IF_FIFO_SENSOR_STATUS 0x138 + +/* + * The switch LUT's coding defines a sink for each + * single channel ID + channel format type. Conversely + * the sink (i.e. an input formatter) can be reached + * from multiple channel & format type combinations + * + * LUT[0,1] channel=0, format type {0,1,...31} + * LUT[2,3] channel=1, format type {0,1,...31} + * LUT[4,5] channel=2, format type {0,1,...31} + * LUT[6,7] channel=3, format type {0,1,...31} + * + * Each register hold 16 2-bit fields encoding the sink + * {0,1,2,3}, "0" means unconnected. + * + * The single FSYNCH register uses four 3-bit fields of 1-hot + * encoded sink information, "0" means unconnected. + * + * The encoding is redundant. The FSYNCH setting will connect + * a channel to a sink. At that point the LUT's belonging to + * that channel can be directed to another sink. Thus the data + * goes to another place than the synch + */ +struct input_formatter_switch_state_s { + int if_input_switch_lut_reg[8]; + int if_input_switch_fsync_lut; + int if_input_switch_ch_id_fmt_type; + bool if_input_switch_map[HIVE_SWITCH_N_CHANNELS][HIVE_SWITCH_N_FORMATTYPES]; +}; + +struct input_formatter_state_s { +/* int reset; */ + int start_line; + int start_column; + int cropped_height; + int cropped_width; + int ver_decimation; + int hor_decimation; + int ver_deinterleaving; + int hor_deinterleaving; + int left_padding; + int eol_offset; + int vmem_start_address; + int vmem_end_address; + int vmem_increment; + int is_yuv420; + int vsync_active_low; + int hsync_active_low; + int allow_fifo_overflow; + int block_fifo_when_no_req; + int fsm_sync_status; + int fsm_sync_counter; + int fsm_crop_status; + int fsm_crop_line_counter; + int fsm_crop_pixel_counter; + int fsm_deinterleaving_index; + int fsm_dec_h_counter; + int fsm_dec_v_counter; + int fsm_dec_block_v_counter; + int fsm_padding_status; + int fsm_padding_elem_counter; + int fsm_vector_support_error; + int fsm_vector_buffer_full; + int vector_support; + int sensor_data_lost; +}; + +struct input_formatter_bin_state_s { + uint32_t reset; + uint32_t input_endianness; + uint32_t output_endianness; + uint32_t bitswap; + uint32_t block_synch; + uint32_t packet_synch; + uint32_t readpostwrite_synch; + uint32_t is_2ppc; + uint32_t en_status_update; +}; + +static const unsigned int input_formatter_alignment[N_INPUT_FORMATTER_ID] = { + ISP_VEC_ALIGN, ISP_VEC_ALIGN, HIVE_ISP_CTRL_DATA_BYTES}; + +#endif /* __INPUT_FORMATTER_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h new file mode 100644 index 0000000000000..2f42a9c2771ce --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_FORMATTER_PRIVATE_H_INCLUDED__ +#define __INPUT_FORMATTER_PRIVATE_H_INCLUDED__ + +#include "input_formatter_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_INPUT_FORMATTER_C void input_formatter_reg_store( + const input_formatter_ID_t ID, + const hrt_address reg_addr, + const hrt_data value) +{ + assert(ID < N_INPUT_FORMATTER_ID); + assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); + assert((reg_addr % sizeof(hrt_data)) == 0); + ia_css_device_store_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr, value); + return; +} + +STORAGE_CLASS_INPUT_FORMATTER_C hrt_data input_formatter_reg_load( + const input_formatter_ID_t ID, + const unsigned int reg_addr) +{ + assert(ID < N_INPUT_FORMATTER_ID); + assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); + assert((reg_addr % sizeof(hrt_data)) == 0); + return ia_css_device_load_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr); +} + +#endif /* __INPUT_FORMATTER_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c new file mode 100644 index 0000000000000..2515e162828fe --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c @@ -0,0 +1,1823 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "system_global.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2 + +#include "input_system.h" +#include +#include "gp_device.h" + +#include "assert_support.h" + +#ifndef __INLINE_INPUT_SYSTEM__ +#include "input_system_private.h" +#endif /* __INLINE_INPUT_SYSTEM__ */ + +#define ZERO (0x0) +#define ONE (1U) + +static const ib_buffer_t IB_BUFFER_NULL = {0 ,0, 0 }; + +static input_system_error_t input_system_configure_channel( + const channel_cfg_t channel); + +static input_system_error_t input_system_configure_channel_sensor( + const channel_cfg_t channel); + +static input_system_error_t input_buffer_configuration(void); + +static input_system_error_t configuration_to_registers(void); + +static void receiver_rst(const rx_ID_t ID); +static void input_system_network_rst(const input_system_ID_t ID); + +static void capture_unit_configure( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t* const cfg); + +static void acquisition_unit_configure( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t* const cfg); + +static void ctrl_unit_configure( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ctrl_unit_cfg_t* const cfg); + +static void input_system_network_configure( + const input_system_ID_t ID, + const input_system_network_cfg_t * const cfg); + +// MW: CSI is previously named as "rx" short for "receiver" +static input_system_error_t set_csi_cfg( + csi_cfg_t* const lhs, + const csi_cfg_t* const rhs, + input_system_config_flags_t* const flags); + +static input_system_error_t set_source_type( + input_system_source_t* const lhs, + const input_system_source_t rhs, + input_system_config_flags_t* const flags); + +static input_system_error_t input_system_multiplexer_cfg( + input_system_multiplex_t* const lhs, + const input_system_multiplex_t rhs, + input_system_config_flags_t* const flags); + + + +static inline void capture_unit_get_state( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + capture_unit_state_t *state); + +static inline void acquisition_unit_get_state( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + acquisition_unit_state_t *state); + +static inline void ctrl_unit_get_state( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + ctrl_unit_state_t *state); + +static inline void mipi_port_get_state( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + mipi_port_state_t *state); + +static inline void rx_channel_get_state( + const rx_ID_t ID, + const unsigned int ch_id, + rx_channel_state_t *state); + +static void gp_device_rst(const gp_device_ID_t ID); + +static void input_selector_cfg_for_sensor(const gp_device_ID_t ID); + +static void input_switch_rst(const gp_device_ID_t ID); + +static void input_switch_cfg( + const gp_device_ID_t ID, + const input_switch_cfg_t * const cfg +); + +void input_system_get_state( + const input_system_ID_t ID, + input_system_state_t *state) +{ + sub_system_ID_t sub_id; + + assert(ID < N_INPUT_SYSTEM_ID); + assert(state != NULL); + + state->str_multicastA_sel = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX); + state->str_multicastB_sel = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_B_IDX); + state->str_multicastC_sel = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_C_IDX); + state->str_mux_sel = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX); + state->str_mon_status = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_STRMON_STAT_IDX); + state->str_mon_irq_cond = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_STRMON_COND_IDX); + state->str_mon_irq_en = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX); + state->isys_srst = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_SRST_IDX); + state->isys_slv_reg_srst = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_SLV_REG_SRST_IDX); + state->str_deint_portA_cnt = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_REG_PORT_A_IDX); + state->str_deint_portB_cnt = input_system_sub_system_reg_load(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_REG_PORT_B_IDX); + + for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { + capture_unit_get_state(ID, sub_id, + &(state->capture_unit[sub_id - CAPTURE_UNIT0_ID])); + } + for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { + acquisition_unit_get_state(ID, sub_id, + &(state->acquisition_unit[sub_id - ACQUISITION_UNIT0_ID])); + } + for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { + ctrl_unit_get_state(ID, sub_id, + &(state->ctrl_unit_state[sub_id - CTRL_UNIT0_ID])); + } + + return; +} + +void receiver_get_state( + const rx_ID_t ID, + receiver_state_t *state) +{ + enum mipi_port_id port_id; + unsigned int ch_id; + + assert(ID < N_RX_ID); + assert(state != NULL); + + state->fs_to_ls_delay = (uint8_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_FS_TO_LS_DELAY_REG_IDX); + state->ls_to_data_delay = (uint8_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_LS_TO_DATA_DELAY_REG_IDX); + state->data_to_le_delay = (uint8_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_DATA_TO_LE_DELAY_REG_IDX); + state->le_to_fe_delay = (uint8_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_LE_TO_FE_DELAY_REG_IDX); + state->fe_to_fs_delay = (uint8_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_FE_TO_FS_DELAY_REG_IDX); + state->le_to_fs_delay = (uint8_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_LE_TO_LS_DELAY_REG_IDX); + state->is_two_ppc = (bool)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX); + state->backend_rst = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BACKEND_RST_REG_IDX); + state->raw18 = (uint16_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_RAW18_REG_IDX); + state->force_raw8 = (bool)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_FORCE_RAW8_REG_IDX); + state->raw16 = (uint16_t)receiver_reg_load(ID, + _HRT_CSS_RECEIVER_RAW16_REG_IDX); + + for (port_id = (enum mipi_port_id)0; port_id < N_MIPI_PORT_ID; port_id++) { + mipi_port_get_state(ID, port_id, + &(state->mipi_port_state[port_id])); + } + for (ch_id = (unsigned int)0; ch_id < N_RX_CHANNEL_ID; ch_id++) { + rx_channel_get_state(ID, ch_id, + &(state->rx_channel_state[ch_id])); + } + + state->be_gsp_acc_ovl = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_GSP_ACC_OVL_REG_IDX); + state->be_srst = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_SRST_REG_IDX); + state->be_is_two_ppc = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX); + state->be_comp_format0 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG0_IDX); + state->be_comp_format1 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG1_IDX); + state->be_comp_format2 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG2_IDX); + state->be_comp_format3 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG3_IDX); + state->be_sel = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_SEL_REG_IDX); + state->be_raw16_config = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_RAW16_CONFIG_REG_IDX); + state->be_raw18_config = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_RAW18_CONFIG_REG_IDX); + state->be_force_raw8 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_FORCE_RAW8_REG_IDX); + state->be_irq_status = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_IRQ_STATUS_REG_IDX); + state->be_irq_clear = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_BE_IRQ_CLEAR_REG_IDX); + + return; +} + +bool is_mipi_format_yuv420( + const mipi_format_t mipi_format) +{ + bool is_yuv420 = ( + (mipi_format == MIPI_FORMAT_YUV420_8) || + (mipi_format == MIPI_FORMAT_YUV420_10) || + (mipi_format == MIPI_FORMAT_YUV420_8_SHIFT) || + (mipi_format == MIPI_FORMAT_YUV420_10_SHIFT)); +/* MIPI_FORMAT_YUV420_8_LEGACY is not YUV420 */ + + return is_yuv420; +} + +void receiver_set_compression( + const rx_ID_t ID, + const unsigned int cfg_ID, + const mipi_compressor_t comp, + const mipi_predictor_t pred) +{ + const unsigned int field_id = cfg_ID % N_MIPI_FORMAT_CUSTOM; + const unsigned int ch_id = cfg_ID / N_MIPI_FORMAT_CUSTOM; + hrt_data val; + hrt_address addr = 0; + hrt_data reg; + + assert(ID < N_RX_ID); + assert(cfg_ID < N_MIPI_COMPRESSOR_CONTEXT); + assert(field_id < N_MIPI_FORMAT_CUSTOM); + assert(ch_id < N_RX_CHANNEL_ID); + assert(comp < N_MIPI_COMPRESSOR_METHODS); + assert(pred < N_MIPI_PREDICTOR_TYPES); + + val = (((uint8_t)pred) << 3) | comp; + + switch (ch_id) { + case 0: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); + break; + case 1: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); + break; + case 2: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); + break; + case 3: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); + break; + default: + /* should not happen */ + assert(false); + return; + } + + reg = ((field_id < 6)?(val << (field_id * 5)):(val << ((field_id - 6) * 5))); + receiver_reg_store(ID, addr, reg); + + return; +} + +void receiver_port_enable( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const bool cnd) +{ + hrt_data reg = receiver_port_reg_load(ID, port_ID, + _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); + + if (cnd) { + reg |= 0x01; + } else { + reg &= ~0x01; + } + + receiver_port_reg_store(ID, port_ID, + _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, reg); + return; +} + +bool is_receiver_port_enabled( + const rx_ID_t ID, + const enum mipi_port_id port_ID) +{ + hrt_data reg = receiver_port_reg_load(ID, port_ID, + _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); + return ((reg & 0x01) != 0); +} + +void receiver_irq_enable( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info) +{ + receiver_port_reg_store(ID, + port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, irq_info); + return; +} + +rx_irq_info_t receiver_get_irq_info( + const rx_ID_t ID, + const enum mipi_port_id port_ID) +{ + return receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); +} + +void receiver_irq_clear( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info) +{ + receiver_port_reg_store(ID, + port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX, irq_info); + return; +} + +static inline void capture_unit_get_state( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + capture_unit_state_t *state) +{ + assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); + assert(state != NULL); + + state->StartMode = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_START_MODE_REG_ID); + state->Start_Addr = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_START_ADDR_REG_ID); + state->Mem_Region_Size = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_MEM_REGION_SIZE_REG_ID); + state->Num_Mem_Regions = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_NUM_MEM_REGIONS_REG_ID); +// AM: Illegal read from following registers. +/* state->Init = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_INIT_REG_ID); + state->Start = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_START_REG_ID); + state->Stop = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_STOP_REG_ID); +*/ + state->Packet_Length = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_PACKET_LENGTH_REG_ID); + state->Received_Length = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_RECEIVED_LENGTH_REG_ID); + state->Received_Short_Packets = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_RECEIVED_SHORT_PACKETS_REG_ID); + state->Received_Long_Packets = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_RECEIVED_LONG_PACKETS_REG_ID); + state->Last_Command = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_LAST_COMMAND_REG_ID); + state->Next_Command = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_NEXT_COMMAND_REG_ID); + state->Last_Acknowledge = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_LAST_ACKNOWLEDGE_REG_ID); + state->Next_Acknowledge = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_NEXT_ACKNOWLEDGE_REG_ID); + state->FSM_State_Info = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_FSM_STATE_INFO_REG_ID); + + return; +} + +static inline void acquisition_unit_get_state( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + acquisition_unit_state_t *state) +{ + assert(sub_id == ACQUISITION_UNIT0_ID); + assert(state != NULL); + + state->Start_Addr = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_START_ADDR_REG_ID); + state->Mem_Region_Size = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_MEM_REGION_SIZE_REG_ID); + state->Num_Mem_Regions = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_NUM_MEM_REGIONS_REG_ID); +// AM: Illegal read from following registers. +/* state->Init = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_INIT_REG_ID); +*/ + state->Received_Short_Packets = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_RECEIVED_SHORT_PACKETS_REG_ID); + state->Received_Long_Packets = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_RECEIVED_LONG_PACKETS_REG_ID); + state->Last_Command = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_LAST_COMMAND_REG_ID); + state->Next_Command = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_NEXT_COMMAND_REG_ID); + state->Last_Acknowledge = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_LAST_ACKNOWLEDGE_REG_ID); + state->Next_Acknowledge = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_NEXT_ACKNOWLEDGE_REG_ID); + state->FSM_State_Info = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_FSM_STATE_INFO_REG_ID); + state->Int_Cntr_Info = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_INT_CNTR_INFO_REG_ID); + + return; +} + +static inline void ctrl_unit_get_state( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + ctrl_unit_state_t *state) +{ + assert(sub_id == CTRL_UNIT0_ID); + assert(state != NULL); + + state->captA_start_addr = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_START_ADDR_A_REG_ID); + state->captB_start_addr = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_START_ADDR_B_REG_ID); + state->captC_start_addr = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_START_ADDR_C_REG_ID); + state->captA_mem_region_size = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID); + state->captB_mem_region_size = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID); + state->captC_mem_region_size = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID); + state->captA_num_mem_regions = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID); + state->captB_num_mem_regions = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID); + state->captC_num_mem_regions = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID); + state->acq_start_addr = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_ACQ_START_ADDR_REG_ID); + state->acq_mem_region_size = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID); + state->acq_num_mem_regions = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID); +// AM: Illegal read from following registers. +/* state->ctrl_init = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_INIT_REG_ID); +*/ + state->last_cmd = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_LAST_COMMAND_REG_ID); + state->next_cmd = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_NEXT_COMMAND_REG_ID); + state->last_ack = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID); + state->next_ack = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID); + state->top_fsm_state = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_FSM_STATE_INFO_REG_ID); + state->captA_fsm_state = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID); + state->captB_fsm_state = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID); + state->captC_fsm_state = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID); + state->acq_fsm_state = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID); + state->capt_reserve_one_mem_region = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID); + + return; +} + +static inline void mipi_port_get_state( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + mipi_port_state_t *state) +{ + int i; + + assert(ID < N_RX_ID); + assert(port_ID < N_MIPI_PORT_ID); + assert(state != NULL); + + state->device_ready = receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); + state->irq_status = receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); + state->irq_enable = receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); + state->timeout_count = receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_TIMEOUT_COUNT_REG_IDX); + state->init_count = (uint16_t)receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_INIT_COUNT_REG_IDX); + state->raw16_18 = (uint16_t)receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_RAW16_18_DATAID_REG_IDX); + state->sync_count = receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_SYNC_COUNT_REG_IDX); + state->rx_count = receiver_port_reg_load(ID, + port_ID, _HRT_CSS_RECEIVER_RX_COUNT_REG_IDX); + + for (i = 0; i < MIPI_4LANE_CFG ; i++) { + state->lane_sync_count[i] = (uint8_t)((state->sync_count)>>(i*8)); + state->lane_rx_count[i] = (uint8_t)((state->rx_count)>>(i*8)); + } + + return; +} + +static inline void rx_channel_get_state( + const rx_ID_t ID, + const unsigned int ch_id, + rx_channel_state_t *state) +{ + int i; + + assert(ID < N_RX_ID); + assert(ch_id < N_RX_CHANNEL_ID); + assert(state != NULL); + + switch (ch_id) { + case 0: + state->comp_scheme0 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX); + state->comp_scheme1 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); + break; + case 1: + state->comp_scheme0 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX); + state->comp_scheme1 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); + break; + case 2: + state->comp_scheme0 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX); + state->comp_scheme1 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); + break; + case 3: + state->comp_scheme0 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX); + state->comp_scheme1 = receiver_reg_load(ID, + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); + break; + } + +/* See Table 7.1.17,..., 7.1.24 */ + for (i = 0; i < 6; i++) { + uint8_t val = (uint8_t)((state->comp_scheme0)>>(i*5)) & 0x1f; + state->comp[i] = (mipi_compressor_t)(val & 0x07); + state->pred[i] = (mipi_predictor_t)((val & 0x18) >> 3); + } + for (i = 6; i < N_MIPI_FORMAT_CUSTOM; i++) { + uint8_t val = (uint8_t)((state->comp_scheme0)>>((i-6)*5)) & 0x1f; + state->comp[i] = (mipi_compressor_t)(val & 0x07); + state->pred[i] = (mipi_predictor_t)((val & 0x18) >> 3); + } + + return; +} + +// MW: "2400" in the name is not good, but this is to avoid a naming conflict +static input_system_cfg2400_t config; + +static void receiver_rst( + const rx_ID_t ID) +{ + enum mipi_port_id port_id; + + assert(ID < N_RX_ID); + +// Disable all ports. + for (port_id = MIPI_PORT0_ID; port_id < N_MIPI_PORT_ID; port_id++) { + receiver_port_enable(ID, port_id, false); + } + + // AM: Additional actions for stopping receiver? + + return; +} + +//Single function to reset all the devices mapped via GP_DEVICE. +static void gp_device_rst(const gp_device_ID_t ID) +{ + assert(ID < N_GP_DEVICE_ID); + + gp_device_reg_store(ID, _REG_GP_SYNCGEN_ENABLE_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNCGEN_FREE_RUNNING_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNCGEN_PAUSE_ADDR, ONE); + // gp_device_reg_store(ID, _REG_GP_NR_FRAMES_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNGEN_NR_PIX_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNGEN_NR_PIX_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNGEN_NR_LINES_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR, ZERO); +// AM: Following calls cause strange warnings. Probably they should not be initialized. +// gp_device_reg_store(ID, _REG_GP_ISEL_SOF_ADDR, ZERO); +// gp_device_reg_store(ID, _REG_GP_ISEL_EOF_ADDR, ZERO); +// gp_device_reg_store(ID, _REG_GP_ISEL_SOL_ADDR, ZERO); +// gp_device_reg_store(ID, _REG_GP_ISEL_EOL_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_LFSR_ENABLE_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_LFSR_ENABLE_B_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_ENABLE_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_ENABLE_B_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_HOR_CNT_MASK_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_VER_CNT_MASK_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_XY_CNT_MASK_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_HOR_CNT_DELTA_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_VER_CNT_DELTA_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_MODE_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_RED1_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_GREEN1_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_BLUE1_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_RED2_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_GREEN2_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_TPG_BLUE2_ADDR, ZERO); + //gp_device_reg_store(ID, _REG_GP_ISEL_CH_ID_ADDR, ZERO); + //gp_device_reg_store(ID, _REG_GP_ISEL_FMT_TYPE_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_DATA_SEL_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_SBAND_SEL_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_SYNC_SEL_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNCGEN_HOR_CNT_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNCGEN_VER_CNT_ADDR, ZERO); + // gp_device_reg_store(ID, _REG_GP_SYNCGEN_FRAME_CNT_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_SOFT_RESET_ADDR, ZERO); // AM: Maybe this soft reset is not safe. + + return; +} + +static void input_selector_cfg_for_sensor(const gp_device_ID_t ID) +{ + assert(ID < N_GP_DEVICE_ID); + + gp_device_reg_store(ID, _REG_GP_ISEL_SOF_ADDR, ONE); + gp_device_reg_store(ID, _REG_GP_ISEL_EOF_ADDR, ONE); + gp_device_reg_store(ID, _REG_GP_ISEL_SOL_ADDR, ONE); + gp_device_reg_store(ID, _REG_GP_ISEL_EOL_ADDR, ONE); + gp_device_reg_store(ID, _REG_GP_ISEL_CH_ID_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_FMT_TYPE_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_DATA_SEL_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_SBAND_SEL_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_ISEL_SYNC_SEL_ADDR, ZERO); + gp_device_reg_store(ID, _REG_GP_SOFT_RESET_ADDR, ZERO); + + return; +} + +static void input_switch_rst(const gp_device_ID_t ID) +{ + int addr; + + assert(ID < N_GP_DEVICE_ID); + + // Initialize the data&hsync LUT. + for (addr = _REG_GP_IFMT_input_switch_lut_reg0; + addr <= _REG_GP_IFMT_input_switch_lut_reg7; addr += SIZEOF_HRT_REG) { + + gp_device_reg_store(ID, addr, ZERO); + } + + // Initialize the vsync LUT. + gp_device_reg_store(ID, + _REG_GP_IFMT_input_switch_fsync_lut, + ZERO); + + return; +} + +static void input_switch_cfg( + const gp_device_ID_t ID, + const input_switch_cfg_t * const cfg) +{ + int addr_offset; + + assert(ID < N_GP_DEVICE_ID); + assert(cfg != NULL); + + // Initialize the data&hsync LUT. + for (addr_offset = 0; addr_offset < N_RX_CHANNEL_ID * 2; addr_offset++) { + assert(addr_offset * SIZEOF_HRT_REG + _REG_GP_IFMT_input_switch_lut_reg0 <= _REG_GP_IFMT_input_switch_lut_reg7); + gp_device_reg_store(ID, + _REG_GP_IFMT_input_switch_lut_reg0 + addr_offset * SIZEOF_HRT_REG, + cfg->hsync_data_reg[addr_offset]); + } + + // Initialize the vsync LUT. + gp_device_reg_store(ID, + _REG_GP_IFMT_input_switch_fsync_lut, + cfg->vsync_data_reg); + + return; +} + + +static void input_system_network_rst(const input_system_ID_t ID) +{ + unsigned int sub_id; + + // Reset all 3 multicasts. + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX, + INPUT_SYSTEM_DISCARD_ALL); + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_B_IDX, + INPUT_SYSTEM_DISCARD_ALL); + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_C_IDX, + INPUT_SYSTEM_DISCARD_ALL); + + // Reset stream mux. + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + N_INPUT_SYSTEM_MULTIPLEX); + + // Reset 3 capture units. + for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { + input_system_sub_system_reg_store(ID, + sub_id, + CAPT_INIT_REG_ID, + 1U << CAPT_INIT_RST_REG_BIT); + } + + // Reset acquisition unit. + for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { + input_system_sub_system_reg_store(ID, + sub_id, + ACQ_INIT_REG_ID, + 1U << ACQ_INIT_RST_REG_BIT); + } + + // DMA unit reset is not needed. + + // Reset controller units. + // NB: In future we need to keep part of ctrl_state for split capture and + for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_INIT_REG_ID, + 1U); //AM: Is there any named constant? + } + + return; +} + +// Function that resets current configuration. +input_system_error_t input_system_configuration_reset(void) +{ + unsigned int i; + + receiver_rst(RX0_ID); + + input_system_network_rst(INPUT_SYSTEM0_ID); + + gp_device_rst(INPUT_SYSTEM0_ID); + + input_switch_rst(INPUT_SYSTEM0_ID); + + //target_rst(); + + // Reset IRQ_CTRLs. + + // Reset configuration data structures. + for (i = 0; i < N_CHANNELS; i++ ) { + config.ch_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; + config.target_isp_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; + config.target_sp_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; + config.target_strm2mem_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; + } + + for (i = 0; i < N_CSI_PORTS; i++ ) { + config.csi_buffer_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; + config.multicast[i] = INPUT_SYSTEM_CFG_FLAG_RESET; + } + + config.source_type_flags = INPUT_SYSTEM_CFG_FLAG_RESET; + config.acquisition_buffer_unique_flags = INPUT_SYSTEM_CFG_FLAG_RESET; + config.unallocated_ib_mem_words = IB_CAPACITY_IN_WORDS; + //config.acq_allocated_ib_mem_words = 0; + + // Set the start of the session cofiguration. + config.session_flags = INPUT_SYSTEM_CFG_FLAG_REQUIRED; + + return INPUT_SYSTEM_ERR_NO_ERROR; +} + +// MW: Comments are good, but doxygen is required, place it at the declaration +// Function that appends the channel to current configuration. +static input_system_error_t input_system_configure_channel( + const channel_cfg_t channel) +{ + input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR; + // Check if channel is not already configured. + if (config.ch_flags[channel.ch_id] & INPUT_SYSTEM_CFG_FLAG_SET){ + return INPUT_SYSTEM_ERR_CHANNEL_ALREADY_SET; + } else { + switch (channel.source_type){ + case INPUT_SYSTEM_SOURCE_SENSOR : + error = input_system_configure_channel_sensor(channel); + break; + case INPUT_SYSTEM_SOURCE_TPG : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_SOURCE_PRBS : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_SOURCE_FIFO : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + default : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + } + + if (error != INPUT_SYSTEM_ERR_NO_ERROR) return error; + // Input switch channel configurations must be combined in united config. + config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2] = + channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[0]; + config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2 + 1] = + channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[1]; + config.input_switch_cfg.vsync_data_reg |= + (channel.target_cfg.input_switch_channel_cfg.vsync_data_reg & 0x7) << (channel.source_cfg.csi_cfg.csi_port * 3); + + // Other targets are just copied and marked as set. + config.target_isp[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_isp_cfg; + config.target_sp[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_sp_cfg; + config.target_strm2mem[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_strm2mem_cfg; + config.target_isp_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; + config.target_sp_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; + config.target_strm2mem_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; + + config.ch_flags[channel.ch_id] = INPUT_SYSTEM_CFG_FLAG_SET; + } + return INPUT_SYSTEM_ERR_NO_ERROR; +} + +// Function that partitions input buffer space with determining addresses. +static input_system_error_t input_buffer_configuration(void) +{ + uint32_t current_address = 0; + uint32_t unallocated_memory = IB_CAPACITY_IN_WORDS; + + ib_buffer_t candidate_buffer_acq = IB_BUFFER_NULL; + uint32_t size_requested; + input_system_config_flags_t acq_already_specified = INPUT_SYSTEM_CFG_FLAG_RESET; + input_system_csi_port_t port; + for (port = INPUT_SYSTEM_PORT_A; port < N_INPUT_SYSTEM_PORTS; port++) { + + csi_cfg_t source = config.csi_value[port];//.csi_cfg; + + if ( config.csi_flags[port] & INPUT_SYSTEM_CFG_FLAG_SET) { + + // Check and set csi buffer in input buffer. + switch (source.buffering_mode) { + case INPUT_SYSTEM_FIFO_CAPTURE : + case INPUT_SYSTEM_XMEM_ACQUIRE : + config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_BLOCKED; // Well, not used. + break; + + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : + case INPUT_SYSTEM_SRAM_BUFFERING : + case INPUT_SYSTEM_XMEM_BUFFERING : + case INPUT_SYSTEM_XMEM_CAPTURE : + size_requested = source.csi_buffer.mem_reg_size * source.csi_buffer.nof_mem_regs; + if (source.csi_buffer.mem_reg_size > 0 + && source.csi_buffer.nof_mem_regs >0 + && size_requested <= unallocated_memory + ) { + config.csi_buffer[port].mem_reg_addr = current_address; + config.csi_buffer[port].mem_reg_size = source.csi_buffer.mem_reg_size; + config.csi_buffer[port].nof_mem_regs = source.csi_buffer.nof_mem_regs; + current_address += size_requested; + unallocated_memory -= size_requested; + config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_SET; + } else { + config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + break; + + default : + config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + } + + // Check acquisition buffer specified but set it later since it has to be unique. + switch (source.buffering_mode) { + case INPUT_SYSTEM_FIFO_CAPTURE : + case INPUT_SYSTEM_SRAM_BUFFERING : + case INPUT_SYSTEM_XMEM_CAPTURE : + // Nothing to do. + break; + + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : + case INPUT_SYSTEM_XMEM_BUFFERING : + case INPUT_SYSTEM_XMEM_ACQUIRE : + if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_RESET) { + size_requested = source.acquisition_buffer.mem_reg_size + * source.acquisition_buffer.nof_mem_regs; + if (source.acquisition_buffer.mem_reg_size > 0 + && source.acquisition_buffer.nof_mem_regs >0 + && size_requested <= unallocated_memory + ) { + candidate_buffer_acq = source.acquisition_buffer; + acq_already_specified = INPUT_SYSTEM_CFG_FLAG_SET; + } + } else { + // Check if specified acquisition buffer is the same as specified before. + if (source.acquisition_buffer.mem_reg_size != candidate_buffer_acq.mem_reg_size + || source.acquisition_buffer.nof_mem_regs != candidate_buffer_acq.nof_mem_regs + ) { + config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + } + break; + + default : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + } + } else { + config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_BLOCKED; + } + } // end of for ( port ) + + // Set the acquisition buffer at the end. + size_requested = candidate_buffer_acq.mem_reg_size * candidate_buffer_acq.nof_mem_regs; + if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_SET + && size_requested <= unallocated_memory) { + config.acquisition_buffer_unique.mem_reg_addr = current_address; + config.acquisition_buffer_unique.mem_reg_size = candidate_buffer_acq.mem_reg_size; + config.acquisition_buffer_unique.nof_mem_regs = candidate_buffer_acq.nof_mem_regs; + current_address += size_requested; + unallocated_memory -= size_requested; + config.acquisition_buffer_unique_flags = INPUT_SYSTEM_CFG_FLAG_SET; + + assert(current_address <= IB_CAPACITY_IN_WORDS); + } + + return INPUT_SYSTEM_ERR_NO_ERROR; +} + +static void capture_unit_configure( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t* const cfg) +{ + assert(ID < N_INPUT_SYSTEM_ID); + assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); // Commented part is always true. + assert(cfg != NULL); + + input_system_sub_system_reg_store(ID, + sub_id, + CAPT_START_ADDR_REG_ID, + cfg->mem_reg_addr); + input_system_sub_system_reg_store(ID, + sub_id, + CAPT_MEM_REGION_SIZE_REG_ID, + cfg->mem_reg_size); + input_system_sub_system_reg_store(ID, + sub_id, + CAPT_NUM_MEM_REGIONS_REG_ID, + cfg->nof_mem_regs); + + return; +} + + +static void acquisition_unit_configure( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t* const cfg) +{ + assert(ID < N_INPUT_SYSTEM_ID); + assert(sub_id == ACQUISITION_UNIT0_ID); + assert(cfg != NULL); + + input_system_sub_system_reg_store(ID, + sub_id, + ACQ_START_ADDR_REG_ID, + cfg->mem_reg_addr); + input_system_sub_system_reg_store(ID, + sub_id, + ACQ_NUM_MEM_REGIONS_REG_ID, + cfg->nof_mem_regs); + input_system_sub_system_reg_store(ID, + sub_id, + ACQ_MEM_REGION_SIZE_REG_ID, + cfg->mem_reg_size); + + return; +} + + +static void ctrl_unit_configure( + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ctrl_unit_cfg_t* const cfg) +{ + assert(ID < N_INPUT_SYSTEM_ID); + assert(sub_id == CTRL_UNIT0_ID); + assert(cfg != NULL); + + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_START_ADDR_A_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_addr); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_size); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT0_ID].nof_mem_regs); + + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_START_ADDR_B_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_addr); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_size); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT1_ID].nof_mem_regs); + + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_START_ADDR_C_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_addr); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_size); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT2_ID].nof_mem_regs); + + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_ACQ_START_ADDR_REG_ID, + cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_addr); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID, + cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_size); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID, + cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].nof_mem_regs); + input_system_sub_system_reg_store(ID, + sub_id, + ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID, + 0); + return; +} + +static void input_system_network_configure( + const input_system_ID_t ID, + const input_system_network_cfg_t * const cfg) +{ + uint32_t sub_id; + + assert(ID < N_INPUT_SYSTEM_ID); + assert(cfg != NULL); + + // Set all 3 multicasts. + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX, + cfg->multicast_cfg[CAPTURE_UNIT0_ID]); + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_B_IDX, + cfg->multicast_cfg[CAPTURE_UNIT1_ID]); + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_C_IDX, + cfg->multicast_cfg[CAPTURE_UNIT2_ID]); + + // Set stream mux. + input_system_sub_system_reg_store(ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + cfg->mux_cfg); + + // Set capture units. + for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { + capture_unit_configure(ID, + sub_id, + &(cfg->ctrl_unit_cfg[ID].buffer_mipi[sub_id - CAPTURE_UNIT0_ID])); + } + + // Set acquisition units. + for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { + acquisition_unit_configure(ID, + sub_id, + &(cfg->ctrl_unit_cfg[sub_id - ACQUISITION_UNIT0_ID].buffer_acquire[sub_id - ACQUISITION_UNIT0_ID])); + } + + // No DMA configuration needed. Ctrl_unit will fully control it. + + // Set controller units. + for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { + ctrl_unit_configure(ID, + sub_id, + &(cfg->ctrl_unit_cfg[sub_id - CTRL_UNIT0_ID])); + } + + return; +} + +static input_system_error_t configuration_to_registers(void) +{ + input_system_network_cfg_t input_system_network_cfg; + int i; + + assert(config.source_type_flags & INPUT_SYSTEM_CFG_FLAG_SET); + + switch (config.source_type) { + case INPUT_SYSTEM_SOURCE_SENSOR : + + // Determine stream multicasts setting based on the mode of csi_cfg_t. + // AM: This should be moved towards earlier function call, e.g. in + // the commit function. + for (i = MIPI_PORT0_ID; i < N_MIPI_PORT_ID; i++) { + if (config.csi_flags[i] & INPUT_SYSTEM_CFG_FLAG_SET) { + + switch (config.csi_value[i].buffering_mode) { + + case INPUT_SYSTEM_FIFO_CAPTURE: + config.multicast[i] = INPUT_SYSTEM_CSI_BACKEND; + break; + + case INPUT_SYSTEM_XMEM_CAPTURE: + case INPUT_SYSTEM_SRAM_BUFFERING: + case INPUT_SYSTEM_XMEM_BUFFERING: + config.multicast[i] = INPUT_SYSTEM_INPUT_BUFFER; + break; + + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: + config.multicast[i] = INPUT_SYSTEM_MULTICAST; + break; + + case INPUT_SYSTEM_XMEM_ACQUIRE: + config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; + break; + + default: + config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + //break; + } + } else { + config.multicast[i]= INPUT_SYSTEM_DISCARD_ALL; + } + + input_system_network_cfg.multicast_cfg[i] = config.multicast[i]; + + } // for + + input_system_network_cfg.mux_cfg = config.multiplexer; + + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT0_ID] = config.csi_buffer[MIPI_PORT0_ID]; + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT1_ID] = config.csi_buffer[MIPI_PORT1_ID]; + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT2_ID] = config.csi_buffer[MIPI_PORT2_ID]; + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID] = + config.acquisition_buffer_unique; + + // First set input network around CSI receiver. + input_system_network_configure(INPUT_SYSTEM0_ID, &input_system_network_cfg); + + // Set the CSI receiver. + //... + break; + + case INPUT_SYSTEM_SOURCE_TPG : + + break; + + case INPUT_SYSTEM_SOURCE_PRBS : + + break; + + case INPUT_SYSTEM_SOURCE_FIFO : + break; + + default : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + + } // end of switch (source_type) + + // Set input selector. + input_selector_cfg_for_sensor(INPUT_SYSTEM0_ID); + + // Set input switch. + input_switch_cfg(INPUT_SYSTEM0_ID, &config.input_switch_cfg); + + // Set input formatters. + // AM: IF are set dynamically. + return INPUT_SYSTEM_ERR_NO_ERROR; +} + + +// Function that applies the whole configuration. +input_system_error_t input_system_configuration_commit(void) +{ + // The last configuration step is to configure the input buffer. + input_system_error_t error = input_buffer_configuration(); + if (error != INPUT_SYSTEM_ERR_NO_ERROR) { + return error; + } + + // Translate the whole configuration into registers. + error = configuration_to_registers(); + if (error != INPUT_SYSTEM_ERR_NO_ERROR) { + return error; + } + + // Translate the whole configuration into ctrl commands etc. + + return INPUT_SYSTEM_ERR_NO_ERROR; +} + + + +// FIFO + +input_system_error_t input_system_csi_fifo_channel_cfg( + uint32_t ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + target_cfg2400_t target +) +{ + channel_cfg_t channel; + + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; + channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; + //channel.source + channel.source_cfg.csi_cfg.csi_port = port; + channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_FIFO_CAPTURE; + channel.source_cfg.csi_cfg.csi_buffer = IB_BUFFER_NULL; + channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; + channel.source_cfg.csi_cfg.nof_xmem_buffers = 0; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + + +input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( + uint32_t ch_id, + uint32_t nof_frames, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t csi_mem_reg_size, + uint32_t csi_nof_mem_regs, + target_cfg2400_t target +) +{ + channel_cfg_t channel; + + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; + channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; + //channel.source + channel.source_cfg.csi_cfg.csi_port = port; + channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; + channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; + channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + + +// SRAM + +input_system_error_t input_system_csi_sram_channel_cfg( + uint32_t ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t csi_mem_reg_size, + uint32_t csi_nof_mem_regs, + // uint32_t acq_mem_reg_size, + // uint32_t acq_nof_mem_regs, + target_cfg2400_t target +) +{ + channel_cfg_t channel; + + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; + channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; + //channel.source + channel.source_cfg.csi_cfg.csi_port = port; + channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_SRAM_BUFFERING; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; + channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; + channel.source_cfg.csi_cfg.nof_xmem_buffers = 0; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + + +//XMEM + +// Collects all parameters and puts them in channel_cfg_t. +input_system_error_t input_system_csi_xmem_channel_cfg( + uint32_t ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t csi_mem_reg_size, + uint32_t csi_nof_mem_regs, + uint32_t acq_mem_reg_size, + uint32_t acq_nof_mem_regs, + target_cfg2400_t target, + uint32_t nof_xmem_buffers +) +{ + channel_cfg_t channel; + + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; + channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; + //channel.source + channel.source_cfg.csi_cfg.csi_port = port; + channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_BUFFERING; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; + channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; + channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; + channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; + channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_xmem_buffers; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + + + + +input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t acq_mem_reg_size, + uint32_t acq_nof_mem_regs, + target_cfg2400_t target) +{ + channel_cfg_t channel; + + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; + channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; + //channel.source + channel.source_cfg.csi_cfg.csi_port = port; + channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_ACQUIRE; + channel.source_cfg.csi_cfg.csi_buffer = IB_BUFFER_NULL; + channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; + channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; + channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; + channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + + +input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames, + input_system_csi_port_t port, + uint32_t csi_mem_reg_size, + uint32_t csi_nof_mem_regs, + uint32_t acq_mem_reg_size, + uint32_t acq_nof_mem_regs, + target_cfg2400_t target) +{ + channel_cfg_t channel; + + channel.ch_id = ch_id; + //channel.backend_ch = backend_ch; + channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; + //channel.source + channel.source_cfg.csi_cfg.csi_port = port; + //channel.source_cfg.csi_cfg.backend_ch = backend_ch; + channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_CAPTURE; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; + channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; + channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; + channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; + channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + + + +// Non - CSI + +input_system_error_t input_system_prbs_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames,//not used yet + uint32_t seed, + uint32_t sync_gen_width, + uint32_t sync_gen_height, + uint32_t sync_gen_hblank_cycles, + uint32_t sync_gen_vblank_cycles, + target_cfg2400_t target +) +{ + channel_cfg_t channel; + + (void)nof_frames; + + channel.ch_id = ch_id; + channel.source_type= INPUT_SYSTEM_SOURCE_PRBS; + + channel.source_cfg.prbs_cfg.seed = seed; + channel.source_cfg.prbs_cfg.sync_gen_cfg.width = sync_gen_width; + channel.source_cfg.prbs_cfg.sync_gen_cfg.height = sync_gen_height; + channel.source_cfg.prbs_cfg.sync_gen_cfg.hblank_cycles = sync_gen_hblank_cycles; + channel.source_cfg.prbs_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; + + channel.target_cfg = target; + + return input_system_configure_channel(channel); +} + + + +input_system_error_t input_system_tpg_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames,//not used yet + uint32_t x_mask, + uint32_t y_mask, + uint32_t x_delta, + uint32_t y_delta, + uint32_t xy_mask, + uint32_t sync_gen_width, + uint32_t sync_gen_height, + uint32_t sync_gen_hblank_cycles, + uint32_t sync_gen_vblank_cycles, + target_cfg2400_t target +) +{ + channel_cfg_t channel; + + (void)nof_frames; + + channel.ch_id = ch_id; + channel.source_type = INPUT_SYSTEM_SOURCE_TPG; + + channel.source_cfg.tpg_cfg.x_mask = x_mask; + channel.source_cfg.tpg_cfg.y_mask = y_mask; + channel.source_cfg.tpg_cfg.x_delta = x_delta; + channel.source_cfg.tpg_cfg.y_delta = y_delta; + channel.source_cfg.tpg_cfg.xy_mask = xy_mask; + channel.source_cfg.tpg_cfg.sync_gen_cfg.width = sync_gen_width; + channel.source_cfg.tpg_cfg.sync_gen_cfg.height = sync_gen_height; + channel.source_cfg.tpg_cfg.sync_gen_cfg.hblank_cycles = sync_gen_hblank_cycles; + channel.source_cfg.tpg_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + +// MW: Don't use system specific names, (even in system specific files) "cfg2400" -> cfg +input_system_error_t input_system_gpfifo_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames, //not used yet + target_cfg2400_t target) +{ + channel_cfg_t channel; + + (void)nof_frames; + + channel.ch_id = ch_id; + channel.source_type = INPUT_SYSTEM_SOURCE_FIFO; + + channel.target_cfg = target; + return input_system_configure_channel(channel); +} + +/////////////////////////////////////////////////////////////////////////// +// +// Private specialized functions for channel setting. +// +/////////////////////////////////////////////////////////////////////////// + +// Fills the parameters to config.csi_value[port] +static input_system_error_t input_system_configure_channel_sensor( + const channel_cfg_t channel) +{ + const uint32_t port = channel.source_cfg.csi_cfg.csi_port; + input_system_error_t status = INPUT_SYSTEM_ERR_NO_ERROR; + + input_system_multiplex_t mux; + + if (port >= N_INPUT_SYSTEM_PORTS) + return INPUT_SYSTEM_ERR_GENERIC; + + //check if port > N_INPUT_SYSTEM_MULTIPLEX + + status = set_source_type(&(config.source_type), channel.source_type, &config.source_type_flags); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + + // Check for conflicts on source (implicitly on multicast, capture unit and input buffer). + + status = set_csi_cfg(&(config.csi_value[port]), &channel.source_cfg.csi_cfg, &(config.csi_flags[port])); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + + + switch (channel.source_cfg.csi_cfg.buffering_mode){ + case INPUT_SYSTEM_FIFO_CAPTURE: + + // Check for conflicts on mux. + mux = INPUT_SYSTEM_MIPI_PORT0 + port; + status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + config.multicast[port] = INPUT_SYSTEM_CSI_BACKEND; + + // Shared resource, so it should be blocked. + //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + + break; + case INPUT_SYSTEM_SRAM_BUFFERING : + + // Check for conflicts on mux. + mux = INPUT_SYSTEM_ACQUISITION_UNIT; + status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; + + // Shared resource, so it should be blocked. + //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + + break; + case INPUT_SYSTEM_XMEM_BUFFERING : + + // Check for conflicts on mux. + mux = INPUT_SYSTEM_ACQUISITION_UNIT; + status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; + + // Shared resource, so it should be blocked. + //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + + break; + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_XMEM_CAPTURE : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_XMEM_ACQUIRE : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + default : + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + } + return INPUT_SYSTEM_ERR_NO_ERROR; +} + +// Test flags and set structure. +static input_system_error_t set_source_type( + input_system_source_t * const lhs, + const input_system_source_t rhs, + input_system_config_flags_t * const flags) +{ + // MW: Not enough asserts + assert(lhs != NULL); + assert(flags != NULL); + + if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + + if ((*flags) & INPUT_SYSTEM_CFG_FLAG_SET) { + // Check for consistency with already set value. + if ((*lhs) == (rhs)) { + return INPUT_SYSTEM_ERR_NO_ERROR; + } + else { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + } + // Check the value (individually). + if (rhs >= N_INPUT_SYSTEM_SOURCE) { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + // Set the value. + *lhs = rhs; + + *flags |= INPUT_SYSTEM_CFG_FLAG_SET; + return INPUT_SYSTEM_ERR_NO_ERROR; +} + + +// Test flags and set structure. +static input_system_error_t set_csi_cfg( + csi_cfg_t* const lhs, + const csi_cfg_t* const rhs, + input_system_config_flags_t * const flags) +{ + uint32_t memory_required; + uint32_t acq_memory_required; + + assert(lhs != NULL); + assert(flags != NULL); + + if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + + if (*flags & INPUT_SYSTEM_CFG_FLAG_SET) { + // check for consistency with already set value. + if (/*lhs->backend_ch == rhs.backend_ch + &&*/ lhs->buffering_mode == rhs->buffering_mode + && lhs->csi_buffer.mem_reg_size == rhs->csi_buffer.mem_reg_size + && lhs->csi_buffer.nof_mem_regs == rhs->csi_buffer.nof_mem_regs + && lhs->acquisition_buffer.mem_reg_size == rhs->acquisition_buffer.mem_reg_size + && lhs->acquisition_buffer.nof_mem_regs == rhs->acquisition_buffer.nof_mem_regs + && lhs->nof_xmem_buffers == rhs->nof_xmem_buffers + ) { + return INPUT_SYSTEM_ERR_NO_ERROR; + } + else { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + } + // Check the value (individually). + // no check for backend_ch + // no check for nof_xmem_buffers + memory_required = rhs->csi_buffer.mem_reg_size * rhs->csi_buffer.nof_mem_regs; + acq_memory_required = rhs->acquisition_buffer.mem_reg_size * rhs->acquisition_buffer.nof_mem_regs; + if (rhs->buffering_mode >= N_INPUT_SYSTEM_BUFFERING_MODE + || + // Check if required memory is available in input buffer (SRAM). + (memory_required + acq_memory_required )> config.unallocated_ib_mem_words + + ) { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + // Set the value. + //lhs[port]->backend_ch = rhs.backend_ch; + lhs->buffering_mode = rhs->buffering_mode; + lhs->nof_xmem_buffers = rhs->nof_xmem_buffers; + + lhs->csi_buffer.mem_reg_size = rhs->csi_buffer.mem_reg_size; + lhs->csi_buffer.nof_mem_regs = rhs->csi_buffer.nof_mem_regs; + lhs->acquisition_buffer.mem_reg_size = rhs->acquisition_buffer.mem_reg_size; + lhs->acquisition_buffer.nof_mem_regs = rhs->acquisition_buffer.nof_mem_regs; + // ALX: NB: Here we just set buffer parameters, but still not allocate it + // (no addresses determined). That will be done during commit. + + // FIXIT: acq_memory_required is not deducted, since it can be allocated multiple times. + config.unallocated_ib_mem_words -= memory_required; +//assert(config.unallocated_ib_mem_words >=0); + *flags |= INPUT_SYSTEM_CFG_FLAG_SET; + return INPUT_SYSTEM_ERR_NO_ERROR; +} + + +// Test flags and set structure. +static input_system_error_t input_system_multiplexer_cfg( + input_system_multiplex_t* const lhs, + const input_system_multiplex_t rhs, + input_system_config_flags_t* const flags) +{ + assert(lhs != NULL); + assert(flags != NULL); + + if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + + if ((*flags) & INPUT_SYSTEM_CFG_FLAG_SET) { + // Check for consistency with already set value. + if ((*lhs) == (rhs)) { + return INPUT_SYSTEM_ERR_NO_ERROR; + } + else { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + } + // Check the value (individually). + if (rhs >= N_INPUT_SYSTEM_MULTIPLEX) { + *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + } + // Set the value. + *lhs = rhs; + + *flags |= INPUT_SYSTEM_CFG_FLAG_SET; + return INPUT_SYSTEM_ERR_NO_ERROR; +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h new file mode 100644 index 0000000000000..bf9230fd08f23 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h @@ -0,0 +1,533 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_SYSTEM_LOCAL_H_INCLUDED__ +#define __INPUT_SYSTEM_LOCAL_H_INCLUDED__ + +#include + +#include "input_system_global.h" + +#include "input_system_defs.h" /* HIVE_ISYS_GPREG_MULTICAST_A_IDX,... */ +#include "css_receiver_2400_defs.h" /* _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX, _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX,... */ +#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) +#include "isp_capture_defs.h" +#elif defined(IS_ISP_2401_MAMOIADA_SYSTEM) +/* Same name, but keep the distinction,it is a different device */ +#include "isp_capture_defs.h" +#else +#error "input_system_local.h: 2400_SYSTEM must be one of {2400, 2401 }" +#endif +#include "isp_acquisition_defs.h" +#include "input_system_ctrl_defs.h" + + +typedef enum { + INPUT_SYSTEM_ERR_NO_ERROR = 0, + INPUT_SYSTEM_ERR_GENERIC, + INPUT_SYSTEM_ERR_CHANNEL_ALREADY_SET, + INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE, + INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED, + N_INPUT_SYSTEM_ERR +} input_system_error_t; + +typedef enum { + INPUT_SYSTEM_PORT_A = 0, + INPUT_SYSTEM_PORT_B, + INPUT_SYSTEM_PORT_C, + N_INPUT_SYSTEM_PORTS +} input_system_csi_port_t; + +typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; +typedef struct input_system_network_cfg_s input_system_network_cfg_t; +typedef struct target_cfg2400_s target_cfg2400_t; +typedef struct channel_cfg_s channel_cfg_t; +typedef struct backend_channel_cfg_s backend_channel_cfg_t; +typedef struct input_system_cfg2400_s input_system_cfg2400_t; +typedef struct mipi_port_state_s mipi_port_state_t; +typedef struct rx_channel_state_s rx_channel_state_t; +typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; +typedef struct input_switch_cfg_s input_switch_cfg_t; + +struct ctrl_unit_cfg_s { + ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; + ib_buffer_t buffer_acquire[N_ACQUISITION_UNIT_ID]; +}; + +struct input_system_network_cfg_s { + input_system_connection_t multicast_cfg[N_CAPTURE_UNIT_ID]; + input_system_multiplex_t mux_cfg; + ctrl_unit_cfg_t ctrl_unit_cfg[N_CTRL_UNIT_ID]; +}; + +typedef struct { +// TBD. + uint32_t dummy_parameter; +} target_isp_cfg_t; + + +typedef struct { +// TBD. + uint32_t dummy_parameter; +} target_sp_cfg_t; + + +typedef struct { +// TBD. + uint32_t dummy_parameter; +} target_strm2mem_cfg_t; + +struct input_switch_cfg_channel_s { + uint32_t hsync_data_reg[2]; + uint32_t vsync_data_reg; +}; + +struct target_cfg2400_s { + input_switch_cfg_channel_t input_switch_channel_cfg; + target_isp_cfg_t target_isp_cfg; + target_sp_cfg_t target_sp_cfg; + target_strm2mem_cfg_t target_strm2mem_cfg; +}; + +struct backend_channel_cfg_s { + uint32_t fmt_control_word_1; // Format config. + uint32_t fmt_control_word_2; + uint32_t no_side_band; +}; + +typedef union { + csi_cfg_t csi_cfg; + tpg_cfg_t tpg_cfg; + prbs_cfg_t prbs_cfg; + gpfifo_cfg_t gpfifo_cfg; +} source_cfg_t; + + +struct input_switch_cfg_s { + uint32_t hsync_data_reg[N_RX_CHANNEL_ID * 2]; + uint32_t vsync_data_reg; +}; + +// Configuration of a channel. +struct channel_cfg_s { + uint32_t ch_id; + backend_channel_cfg_t backend_ch; + input_system_source_t source_type; + source_cfg_t source_cfg; + target_cfg2400_t target_cfg; +}; + + +// Complete configuration for input system. +struct input_system_cfg2400_s { + + input_system_source_t source_type; input_system_config_flags_t source_type_flags; + //channel_cfg_t channel[N_CHANNELS]; + input_system_config_flags_t ch_flags[N_CHANNELS]; + // This is the place where the buffers' settings are collected, as given. + csi_cfg_t csi_value[N_CSI_PORTS]; input_system_config_flags_t csi_flags[N_CSI_PORTS]; + + // Possible another struct for ib. + // This buffers set at the end, based on the all configurations. + ib_buffer_t csi_buffer[N_CSI_PORTS]; input_system_config_flags_t csi_buffer_flags[N_CSI_PORTS]; + ib_buffer_t acquisition_buffer_unique; input_system_config_flags_t acquisition_buffer_unique_flags; + uint32_t unallocated_ib_mem_words; // Used for check.DEFAULT = IB_CAPACITY_IN_WORDS. + //uint32_t acq_allocated_ib_mem_words; + + input_system_connection_t multicast[N_CSI_PORTS]; + input_system_multiplex_t multiplexer; input_system_config_flags_t multiplexer_flags; + + + tpg_cfg_t tpg_value; input_system_config_flags_t tpg_flags; + prbs_cfg_t prbs_value; input_system_config_flags_t prbs_flags; + gpfifo_cfg_t gpfifo_value; input_system_config_flags_t gpfifo_flags; + + + input_switch_cfg_t input_switch_cfg; + + + target_isp_cfg_t target_isp [N_CHANNELS]; input_system_config_flags_t target_isp_flags [N_CHANNELS]; + target_sp_cfg_t target_sp [N_CHANNELS]; input_system_config_flags_t target_sp_flags [N_CHANNELS]; + target_strm2mem_cfg_t target_strm2mem [N_CHANNELS]; input_system_config_flags_t target_strm2mem_flags [N_CHANNELS]; + + input_system_config_flags_t session_flags; + +}; + +/* + * For each MIPI port + */ +#define _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX +#define _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX +#define _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX +#define _HRT_CSS_RECEIVER_TIMEOUT_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX +#define _HRT_CSS_RECEIVER_INIT_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX +/* new regs for each MIPI port w.r.t. 2300 */ +#define _HRT_CSS_RECEIVER_RAW16_18_DATAID_REG_IDX _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX +#define _HRT_CSS_RECEIVER_SYNC_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX +#define _HRT_CSS_RECEIVER_RX_COUNT_REG_IDX _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX + +/* _HRT_CSS_RECEIVER_2400_COMP_FORMAT_REG_IDX is not defined per MIPI port but per channel */ +/* _HRT_CSS_RECEIVER_2400_COMP_PREDICT_REG_IDX is not defined per MIPI port but per channel */ +#define _HRT_CSS_RECEIVER_FS_TO_LS_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX +#define _HRT_CSS_RECEIVER_LS_TO_DATA_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX +#define _HRT_CSS_RECEIVER_DATA_TO_LE_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX +#define _HRT_CSS_RECEIVER_LE_TO_FE_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX +#define _HRT_CSS_RECEIVER_FE_TO_FS_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX +#define _HRT_CSS_RECEIVER_LE_TO_LS_DELAY_REG_IDX _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX +#define _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX +#define _HRT_CSS_RECEIVER_BACKEND_RST_REG_IDX _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX +#define _HRT_CSS_RECEIVER_RAW18_REG_IDX _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX +#define _HRT_CSS_RECEIVER_FORCE_RAW8_REG_IDX _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX +#define _HRT_CSS_RECEIVER_RAW16_REG_IDX _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX + +/* Previously MIPI port regs, now 2x2 logical channel regs */ +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC0_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC0_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC1_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC1_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC2_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC2_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC3_REG0_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX +#define _HRT_CSS_RECEIVER_COMP_SCHEME_VC3_REG1_IDX _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX + +/* Second backend is at offset 0x0700 w.r.t. the first port at offset 0x0100 */ +#define _HRT_CSS_BE_OFFSET 448 +#define _HRT_CSS_RECEIVER_BE_GSP_ACC_OVL_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_SRST_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG0_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG1_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG2_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG3_IDX (_HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_SEL_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_RAW16_CONFIG_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_RAW18_CONFIG_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_FORCE_RAW8_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_IRQ_STATUS_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX + _HRT_CSS_BE_OFFSET) +#define _HRT_CSS_RECEIVER_BE_IRQ_CLEAR_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX + _HRT_CSS_BE_OFFSET) + + +#define _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT +#define _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT +#define _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT +#define _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT +#define _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT +#define _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT + +#define _HRT_CSS_RECEIVER_FUNC_PROG_REG_IDX _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX +#define _HRT_CSS_RECEIVER_DATA_TIMEOUT_IDX _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX +#define _HRT_CSS_RECEIVER_DATA_TIMEOUT_BITS _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS + +typedef struct capture_unit_state_s capture_unit_state_t; +typedef struct acquisition_unit_state_s acquisition_unit_state_t; +typedef struct ctrl_unit_state_s ctrl_unit_state_t; + +/* + * In 2300 ports can be configured independently and stream + * formats need to be specified. In 2400, there are only 8 + * supported configurations but the HW is fused to support + * only a single one. + * + * In 2300 the compressed format types are programmed by the + * user. In 2400 all stream formats are encoded on the stream. + * + * Use the enum to check validity of a user configuration + */ +typedef enum { + MONO_4L_1L_0L = 0, + MONO_3L_1L_0L, + MONO_2L_1L_0L, + MONO_1L_1L_0L, + STEREO_2L_1L_2L, + STEREO_3L_1L_1L, + STEREO_2L_1L_1L, + STEREO_1L_1L_1L, + N_RX_MODE +} rx_mode_t; + +typedef enum { + MIPI_PREDICTOR_NONE = 0, + MIPI_PREDICTOR_TYPE1, + MIPI_PREDICTOR_TYPE2, + N_MIPI_PREDICTOR_TYPES +} mipi_predictor_t; + +typedef enum { + MIPI_COMPRESSOR_NONE = 0, + MIPI_COMPRESSOR_10_6_10, + MIPI_COMPRESSOR_10_7_10, + MIPI_COMPRESSOR_10_8_10, + MIPI_COMPRESSOR_12_6_12, + MIPI_COMPRESSOR_12_7_12, + MIPI_COMPRESSOR_12_8_12, + N_MIPI_COMPRESSOR_METHODS +} mipi_compressor_t; + +typedef enum { + MIPI_FORMAT_RGB888 = 0, + MIPI_FORMAT_RGB555, + MIPI_FORMAT_RGB444, + MIPI_FORMAT_RGB565, + MIPI_FORMAT_RGB666, + MIPI_FORMAT_RAW8, /* 5 */ + MIPI_FORMAT_RAW10, + MIPI_FORMAT_RAW6, + MIPI_FORMAT_RAW7, + MIPI_FORMAT_RAW12, + MIPI_FORMAT_RAW14, /* 10 */ + MIPI_FORMAT_YUV420_8, + MIPI_FORMAT_YUV420_10, + MIPI_FORMAT_YUV422_8, + MIPI_FORMAT_YUV422_10, + MIPI_FORMAT_CUSTOM0, /* 15 */ + MIPI_FORMAT_YUV420_8_LEGACY, + MIPI_FORMAT_EMBEDDED, + MIPI_FORMAT_CUSTOM1, + MIPI_FORMAT_CUSTOM2, + MIPI_FORMAT_CUSTOM3, /* 20 */ + MIPI_FORMAT_CUSTOM4, + MIPI_FORMAT_CUSTOM5, + MIPI_FORMAT_CUSTOM6, + MIPI_FORMAT_CUSTOM7, + MIPI_FORMAT_YUV420_8_SHIFT, /* 25 */ + MIPI_FORMAT_YUV420_10_SHIFT, + MIPI_FORMAT_RAW16, + MIPI_FORMAT_RAW18, + N_MIPI_FORMAT, +} mipi_format_t; + +#define MIPI_FORMAT_JPEG MIPI_FORMAT_CUSTOM0 +#define MIPI_FORMAT_BINARY_8 MIPI_FORMAT_CUSTOM0 +#define N_MIPI_FORMAT_CUSTOM 8 + +/* The number of stores for compressed format types */ +#define N_MIPI_COMPRESSOR_CONTEXT (N_RX_CHANNEL_ID * N_MIPI_FORMAT_CUSTOM) + +typedef enum { + RX_IRQ_INFO_BUFFER_OVERRUN = 1UL << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT, + RX_IRQ_INFO_INIT_TIMEOUT = 1UL << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT, + RX_IRQ_INFO_ENTER_SLEEP_MODE = 1UL << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT, + RX_IRQ_INFO_EXIT_SLEEP_MODE = 1UL << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT, + RX_IRQ_INFO_ECC_CORRECTED = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT, + RX_IRQ_INFO_ERR_SOT = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT, + RX_IRQ_INFO_ERR_SOT_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT, + RX_IRQ_INFO_ERR_CONTROL = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT, + RX_IRQ_INFO_ERR_ECC_DOUBLE = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT, +/* RX_IRQ_INFO_NO_ERR = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT, */ + RX_IRQ_INFO_ERR_CRC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT, + RX_IRQ_INFO_ERR_UNKNOWN_ID = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT, + RX_IRQ_INFO_ERR_FRAME_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT, + RX_IRQ_INFO_ERR_FRAME_DATA = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT, + RX_IRQ_INFO_ERR_DATA_TIMEOUT = 1UL << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT, + RX_IRQ_INFO_ERR_UNKNOWN_ESC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT, + RX_IRQ_INFO_ERR_LINE_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT, +} rx_irq_info_t; + +typedef struct rx_cfg_s rx_cfg_t; + +/* + * Applied per port + */ +struct rx_cfg_s { + rx_mode_t mode; /* The HW config */ + enum mipi_port_id port; /* The port ID to apply the control on */ + unsigned int timeout; + unsigned int initcount; + unsigned int synccount; + unsigned int rxcount; + mipi_predictor_t comp; /* Just for backward compatibility */ + bool is_two_ppc; +}; + +/* NOTE: The base has already an offset of 0x0100 */ +static const hrt_address MIPI_PORT_OFFSET[N_MIPI_PORT_ID] = { + 0x00000000UL, + 0x00000100UL, + 0x00000200UL}; + +static const mipi_lane_cfg_t MIPI_PORT_MAXLANES[N_MIPI_PORT_ID] = { + MIPI_4LANE_CFG, + MIPI_1LANE_CFG, + MIPI_2LANE_CFG}; + +static const bool MIPI_PORT_ACTIVE[N_RX_MODE][N_MIPI_PORT_ID] = { + {true, true, false}, + {true, true, false}, + {true, true, false}, + {true, true, false}, + {true, true, true}, + {true, true, true}, + {true, true, true}, + {true, true, true}}; + +static const mipi_lane_cfg_t MIPI_PORT_LANES[N_RX_MODE][N_MIPI_PORT_ID] = { + {MIPI_4LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, + {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, + {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, + {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, + {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_2LANE_CFG}, + {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}, + {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}, + {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}}; + +static const hrt_address SUB_SYSTEM_OFFSET[N_SUB_SYSTEM_ID] = { + 0x00001000UL, + 0x00002000UL, + 0x00003000UL, + 0x00004000UL, + 0x00005000UL, + 0x00009000UL, + 0x0000A000UL, + 0x0000B000UL, + 0x0000C000UL}; + +struct capture_unit_state_s { + int Packet_Length; + int Received_Length; + int Received_Short_Packets; + int Received_Long_Packets; + int Last_Command; + int Next_Command; + int Last_Acknowledge; + int Next_Acknowledge; + int FSM_State_Info; + int StartMode; + int Start_Addr; + int Mem_Region_Size; + int Num_Mem_Regions; +/* int Init; write-only registers + int Start; + int Stop; */ +}; + +struct acquisition_unit_state_s { +/* int Init; write-only register */ + int Received_Short_Packets; + int Received_Long_Packets; + int Last_Command; + int Next_Command; + int Last_Acknowledge; + int Next_Acknowledge; + int FSM_State_Info; + int Int_Cntr_Info; + int Start_Addr; + int Mem_Region_Size; + int Num_Mem_Regions; +}; + +struct ctrl_unit_state_s { + int last_cmd; + int next_cmd; + int last_ack; + int next_ack; + int top_fsm_state; + int captA_fsm_state; + int captB_fsm_state; + int captC_fsm_state; + int acq_fsm_state; + int captA_start_addr; + int captB_start_addr; + int captC_start_addr; + int captA_mem_region_size; + int captB_mem_region_size; + int captC_mem_region_size; + int captA_num_mem_regions; + int captB_num_mem_regions; + int captC_num_mem_regions; + int acq_start_addr; + int acq_mem_region_size; + int acq_num_mem_regions; +/* int ctrl_init; write only register */ + int capt_reserve_one_mem_region; +}; + +struct input_system_state_s { + int str_multicastA_sel; + int str_multicastB_sel; + int str_multicastC_sel; + int str_mux_sel; + int str_mon_status; + int str_mon_irq_cond; + int str_mon_irq_en; + int isys_srst; + int isys_slv_reg_srst; + int str_deint_portA_cnt; + int str_deint_portB_cnt; + struct capture_unit_state_s capture_unit[N_CAPTURE_UNIT_ID]; + struct acquisition_unit_state_s acquisition_unit[N_ACQUISITION_UNIT_ID]; + struct ctrl_unit_state_s ctrl_unit_state[N_CTRL_UNIT_ID]; +}; + +struct mipi_port_state_s { + int device_ready; + int irq_status; + int irq_enable; + uint32_t timeout_count; + uint16_t init_count; + uint16_t raw16_18; + uint32_t sync_count; /*4 x uint8_t */ + uint32_t rx_count; /*4 x uint8_t */ + uint8_t lane_sync_count[MIPI_4LANE_CFG]; + uint8_t lane_rx_count[MIPI_4LANE_CFG]; +}; + +struct rx_channel_state_s { + uint32_t comp_scheme0; + uint32_t comp_scheme1; + mipi_predictor_t pred[N_MIPI_FORMAT_CUSTOM]; + mipi_compressor_t comp[N_MIPI_FORMAT_CUSTOM]; +}; + +struct receiver_state_s { + uint8_t fs_to_ls_delay; + uint8_t ls_to_data_delay; + uint8_t data_to_le_delay; + uint8_t le_to_fe_delay; + uint8_t fe_to_fs_delay; + uint8_t le_to_fs_delay; + bool is_two_ppc; + int backend_rst; + uint16_t raw18; + bool force_raw8; + uint16_t raw16; + struct mipi_port_state_s mipi_port_state[N_MIPI_PORT_ID]; + struct rx_channel_state_s rx_channel_state[N_RX_CHANNEL_ID]; + int be_gsp_acc_ovl; + int be_srst; + int be_is_two_ppc; + int be_comp_format0; + int be_comp_format1; + int be_comp_format2; + int be_comp_format3; + int be_sel; + int be_raw16_config; + int be_raw18_config; + int be_force_raw8; + int be_irq_status; + int be_irq_clear; +}; + +#endif /* __INPUT_SYSTEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h new file mode 100644 index 0000000000000..48876bb08b708 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h @@ -0,0 +1,116 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ +#define __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ + +#include "input_system_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_INPUT_SYSTEM_C void input_system_reg_store( + const input_system_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_INPUT_SYSTEM_ID); + assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_reg_load( + const input_system_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_INPUT_SYSTEM_ID); + assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg*sizeof(hrt_data)); +} + +STORAGE_CLASS_INPUT_SYSTEM_C void receiver_reg_store( + const rx_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_RX_ID); + assert(RX_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(RX_BASE[ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_reg_load( + const rx_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_RX_ID); + assert(RX_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(RX_BASE[ID] + reg*sizeof(hrt_data)); +} + +STORAGE_CLASS_INPUT_SYSTEM_C void receiver_port_reg_store( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_RX_ID); + assert(port_ID < N_MIPI_PORT_ID); + assert(RX_BASE[ID] != (hrt_address)-1); + assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); + ia_css_device_store_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_port_reg_load( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg) +{ + assert(ID < N_RX_ID); + assert(port_ID < N_MIPI_PORT_ID); + assert(RX_BASE[ID] != (hrt_address)-1); + assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); + return ia_css_device_load_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg*sizeof(hrt_data)); +} + +STORAGE_CLASS_INPUT_SYSTEM_C void input_system_sub_system_reg_store( + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_INPUT_SYSTEM_ID); + assert(sub_ID < N_SUB_SYSTEM_ID); + assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); + assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); + ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_sub_system_reg_load( + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg) +{ + assert(ID < N_INPUT_SYSTEM_ID); + assert(sub_ID < N_SUB_SYSTEM_ID); + assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); + assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); + return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg*sizeof(hrt_data)); +} + +#endif /* __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c new file mode 100644 index 0000000000000..51daf76c2aea3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c @@ -0,0 +1,448 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "assert_support.h" +#include "irq.h" + +#ifndef __INLINE_GP_DEVICE__ +#define __INLINE_GP_DEVICE__ +#endif +#include "gp_device.h" /* _REG_GP_IRQ_REQUEST_ADDR */ + +#include "platform_support.h" /* hrt_sleep() */ + +static inline void irq_wait_for_write_complete( + const irq_ID_t ID); + +static inline bool any_irq_channel_enabled( + const irq_ID_t ID); + +static inline irq_ID_t virq_get_irq_id( + const virq_id_t irq_ID, + unsigned int *channel_ID); + +#ifndef __INLINE_IRQ__ +#include "irq_private.h" +#endif /* __INLINE_IRQ__ */ + +static unsigned short IRQ_N_CHANNEL[N_IRQ_ID] = { + IRQ0_ID_N_CHANNEL, + IRQ1_ID_N_CHANNEL, + IRQ2_ID_N_CHANNEL, + IRQ3_ID_N_CHANNEL}; + +static unsigned short IRQ_N_ID_OFFSET[N_IRQ_ID + 1] = { + IRQ0_ID_OFFSET, + IRQ1_ID_OFFSET, + IRQ2_ID_OFFSET, + IRQ3_ID_OFFSET, + IRQ_END_OFFSET}; + +static virq_id_t IRQ_NESTING_ID[N_IRQ_ID] = { + N_virq_id, + virq_ifmt, + virq_isys, + virq_isel}; + +void irq_clear_all( + const irq_ID_t ID) +{ + hrt_data mask = 0xFFFFFFFF; + + assert(ID < N_IRQ_ID); + assert(IRQ_N_CHANNEL[ID] <= HRT_DATA_WIDTH); + + if (IRQ_N_CHANNEL[ID] < HRT_DATA_WIDTH) { + mask = ~((~(hrt_data)0)>>IRQ_N_CHANNEL[ID]); + } + + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, mask); + return; +} + +/* + * Do we want the user to be able to set the signalling method ? + */ +void irq_enable_channel( + const irq_ID_t ID, + const unsigned int irq_id) +{ + unsigned int mask = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_MASK_REG_IDX); + unsigned int enable = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + unsigned int edge_in = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); + unsigned int me = 1U << irq_id; + + assert(ID < N_IRQ_ID); + assert(irq_id < IRQ_N_CHANNEL[ID]); + + mask |= me; + enable |= me; + edge_in |= me; /* rising edge */ + +/* to avoid mishaps configuration must follow the following order */ + +/* mask this interrupt */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask & ~me); +/* rising edge at input */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_EDGE_REG_IDX, edge_in); +/* enable interrupt to output */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); +/* clear current irq only */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); +/* unmask interrupt from input */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); + + irq_wait_for_write_complete(ID); + + return; +} + +void irq_enable_pulse( + const irq_ID_t ID, + bool pulse) +{ + unsigned int edge_out = 0x0; + + if (pulse) { + edge_out = 0xffffffff; + } + /* output is given as edge, not pulse */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX, edge_out); + return; +} + +void irq_disable_channel( + const irq_ID_t ID, + const unsigned int irq_id) +{ + unsigned int mask = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_MASK_REG_IDX); + unsigned int enable = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + unsigned int me = 1U << irq_id; + + assert(ID < N_IRQ_ID); + assert(irq_id < IRQ_N_CHANNEL[ID]); + + mask &= ~me; + enable &= ~me; + +/* enable interrupt to output */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); +/* unmask interrupt from input */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); +/* clear current irq only */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); + + irq_wait_for_write_complete(ID); + + return; +} + +enum hrt_isp_css_irq_status irq_get_channel_id( + const irq_ID_t ID, + unsigned int *irq_id) +{ + unsigned int irq_status = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + unsigned int idx; + enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; + + assert(ID < N_IRQ_ID); + assert(irq_id != NULL); + +/* find the first irq bit */ + for (idx = 0; idx < IRQ_N_CHANNEL[ID]; idx++) { + if (irq_status & (1U << idx)) + break; + } + if (idx == IRQ_N_CHANNEL[ID]) + return hrt_isp_css_irq_status_error; + +/* now check whether there are more bits set */ + if (irq_status != (1U << idx)) + status = hrt_isp_css_irq_status_more_irqs; + + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); + + irq_wait_for_write_complete(ID); + + if (irq_id != NULL) + *irq_id = (unsigned int)idx; + + return status; +} + +static const hrt_address IRQ_REQUEST_ADDR[N_IRQ_SW_CHANNEL_ID] = { + _REG_GP_IRQ_REQUEST0_ADDR, + _REG_GP_IRQ_REQUEST1_ADDR}; + +void irq_raise( + const irq_ID_t ID, + const irq_sw_channel_id_t irq_id) +{ + hrt_address addr; + + OP___assert(ID == IRQ0_ID); + OP___assert(IRQ_BASE[ID] != (hrt_address)-1); + OP___assert(irq_id < N_IRQ_SW_CHANNEL_ID); + + (void)ID; + + addr = IRQ_REQUEST_ADDR[irq_id]; +/* The SW IRQ pins are remapped to offset zero */ + gp_device_reg_store(GP_DEVICE0_ID, + (unsigned int)addr, 1); + gp_device_reg_store(GP_DEVICE0_ID, + (unsigned int)addr, 0); + return; +} + +void irq_controller_get_state( + const irq_ID_t ID, + irq_controller_state_t *state) +{ + assert(ID < N_IRQ_ID); + assert(state != NULL); + + state->irq_edge = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); + state->irq_mask = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_MASK_REG_IDX); + state->irq_status = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + state->irq_enable = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + state->irq_level_not_pulse = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX); + return; +} + +bool any_virq_signal(void) +{ + unsigned int irq_status = irq_reg_load(IRQ0_ID, + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + + return (irq_status != 0); +} + +void cnd_virq_enable_channel( + const virq_id_t irq_ID, + const bool en) +{ + irq_ID_t i; + unsigned int channel_ID; + irq_ID_t ID = virq_get_irq_id(irq_ID, &channel_ID); + + assert(ID < N_IRQ_ID); + + for (i=IRQ1_ID;iirq_status_reg[ID] |= irq_data; + + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, irq_data); + + irq_wait_for_write_complete(ID); + } + } + + return irq_status; +} + +void virq_clear_info( + virq_info_t *irq_info) +{ + irq_ID_t ID; + + assert(irq_info != NULL); + + for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { + irq_info->irq_status_reg[ID] = 0; + } + return; +} + +enum hrt_isp_css_irq_status virq_get_channel_id( + virq_id_t *irq_id) +{ + unsigned int irq_status = irq_reg_load(IRQ0_ID, + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + unsigned int idx; + enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; + irq_ID_t ID; + + assert(irq_id != NULL); + +/* find the first irq bit on device 0 */ + for (idx = 0; idx < IRQ_N_CHANNEL[IRQ0_ID]; idx++) { + if (irq_status & (1U << idx)) + break; + } + + if (idx == IRQ_N_CHANNEL[IRQ0_ID]) { + return hrt_isp_css_irq_status_error; + } + +/* Check whether there are more bits set on device 0 */ + if (irq_status != (1U << idx)) { + status = hrt_isp_css_irq_status_more_irqs; + } + +/* Check whether we have an IRQ on one of the nested devices */ + for (ID = N_IRQ_ID-1 ; ID > (irq_ID_t)0; ID--) { + if (IRQ_NESTING_ID[ID] == (virq_id_t)idx) { + break; + } + } + +/* If we have a nested IRQ, load that state, discard the device 0 state */ + if (ID != IRQ0_ID) { + irq_status = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); +/* find the first irq bit on device "id" */ + for (idx = 0; idx < IRQ_N_CHANNEL[ID]; idx++) { + if (irq_status & (1U << idx)) + break; + } + + if (idx == IRQ_N_CHANNEL[ID]) { + return hrt_isp_css_irq_status_error; + } + +/* Alternatively check whether there are more bits set on this device */ + if (irq_status != (1U << idx)) { + status = hrt_isp_css_irq_status_more_irqs; + } else { +/* If this device is empty, clear the state on device 0 */ + irq_reg_store(IRQ0_ID, + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << IRQ_NESTING_ID[ID]); + } + } /* if (ID != IRQ0_ID) */ + +/* Here we proceed to clear the IRQ on detected device, if no nested IRQ, this is device 0 */ + irq_reg_store(ID, + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); + + irq_wait_for_write_complete(ID); + + idx += IRQ_N_ID_OFFSET[ID]; + if (irq_id != NULL) + *irq_id = (virq_id_t)idx; + + return status; +} + +static inline void irq_wait_for_write_complete( + const irq_ID_t ID) +{ + assert(ID < N_IRQ_ID); + assert(IRQ_BASE[ID] != (hrt_address)-1); + (void)ia_css_device_load_uint32(IRQ_BASE[ID] + + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX*sizeof(hrt_data)); +} + +static inline bool any_irq_channel_enabled( + const irq_ID_t ID) +{ + hrt_data en_reg; + + assert(ID < N_IRQ_ID); + + en_reg = irq_reg_load(ID, + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + + return (en_reg != 0); +} + +static inline irq_ID_t virq_get_irq_id( + const virq_id_t irq_ID, + unsigned int *channel_ID) +{ + irq_ID_t ID; + + assert(channel_ID != NULL); + + for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { + if (irq_ID < IRQ_N_ID_OFFSET[ID + 1]) { + break; + } + } + + *channel_ID = (unsigned int)irq_ID - IRQ_N_ID_OFFSET[ID]; + + return ID; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h new file mode 100644 index 0000000000000..f522dfd1a9f1a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h @@ -0,0 +1,136 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IRQ_LOCAL_H_INCLUDED__ +#define __IRQ_LOCAL_H_INCLUDED__ + +#include "irq_global.h" + +#include + +/* IRQ0_ID */ +#include "hive_isp_css_defs.h" +#define HIVE_GP_DEV_IRQ_NUM_IRQS 32 +/* IRQ1_ID */ +#include "input_formatter_subsystem_defs.h" +#define HIVE_IFMT_IRQ_NUM_IRQS 5 +/* IRQ2_ID */ +#include "input_system_defs.h" +/* IRQ3_ID */ +#include "input_selector_defs.h" + + +#define IRQ_ID_OFFSET 32 +#define IRQ0_ID_OFFSET 0 +#define IRQ1_ID_OFFSET IRQ_ID_OFFSET +#define IRQ2_ID_OFFSET (2*IRQ_ID_OFFSET) +#define IRQ3_ID_OFFSET (3*IRQ_ID_OFFSET) +#define IRQ_END_OFFSET (4*IRQ_ID_OFFSET) + +#define IRQ0_ID_N_CHANNEL HIVE_GP_DEV_IRQ_NUM_IRQS +#define IRQ1_ID_N_CHANNEL HIVE_IFMT_IRQ_NUM_IRQS +#define IRQ2_ID_N_CHANNEL HIVE_ISYS_IRQ_NUM_BITS +#define IRQ3_ID_N_CHANNEL HIVE_ISEL_IRQ_NUM_IRQS + +typedef struct virq_info_s virq_info_t; +typedef struct irq_controller_state_s irq_controller_state_t; + + +typedef enum { + virq_gpio_pin_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, + virq_gpio_pin_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, + virq_gpio_pin_2 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, + virq_gpio_pin_3 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, + virq_gpio_pin_4 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, + virq_gpio_pin_5 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, + virq_gpio_pin_6 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, + virq_gpio_pin_7 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, + virq_gpio_pin_8 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, + virq_gpio_pin_9 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, + virq_gpio_pin_10 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, + virq_gpio_pin_11 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, + virq_sp = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_BIT_ID, + virq_isp = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_BIT_ID, + virq_isys = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISYS_BIT_ID, + virq_isel = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISEL_BIT_ID, + virq_ifmt = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_IFMT_BIT_ID, + virq_sp_stream_mon = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, + virq_isp_stream_mon = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, + virq_mod_stream_mon = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, +#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) + virq_isp_pmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, +#elif defined(IS_ISP_2401_MAMOIADA_SYSTEM) + virq_isys_2401 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_IS2401_BIT_ID, +#else +#error "irq_local.h: 2400_SYSTEM must be one of {2400, 2401 }" +#endif + virq_isp_bamem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, + virq_isp_dmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, + virq_sp_icache_mem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, + virq_sp_dmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, + virq_mmu_cache_mem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, + virq_gp_timer_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, + virq_gp_timer_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + virq_sw_pin_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, + virq_sw_pin_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, + virq_dma = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_DMA_BIT_ID, + virq_sp_stream_mon_b = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, + + virq_ifmt0_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID, + virq_ifmt1_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID, + virq_ifmt2_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_IFT_SEC_BIT_ID, + virq_ifmt3_id = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_MEM_CPY_BIT_ID, + virq_ifmt_sideband_changed = IRQ1_ID_OFFSET + HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID, + + virq_isys_sof = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_SOF_BIT_ID, + virq_isys_eof = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_EOF_BIT_ID, + virq_isys_sol = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_SOL_BIT_ID, + virq_isys_eol = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_EOL_BIT_ID, + virq_isys_csi = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID, + virq_isys_csi_be = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID, + virq_isys_capt0_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP, + virq_isys_capt0_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP, + virq_isys_capt1_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP, + virq_isys_capt1_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP, + virq_isys_capt2_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP, + virq_isys_capt2_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP, + virq_isys_acq_sop_mismatch = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH, + virq_isys_ctrl_capt0 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPA, + virq_isys_ctrl_capt1 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPB, + virq_isys_ctrl_capt2 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPC, + virq_isys_cio_to_ahb = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CIO2AHB, + virq_isys_dma = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_DMA_BIT_ID, + virq_isys_fifo_monitor = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_STREAM_MON_BIT_ID, + + virq_isel_sof = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_SOF_BIT_ID, + virq_isel_eof = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_EOF_BIT_ID, + virq_isel_sol = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_SOL_BIT_ID, + virq_isel_eol = IRQ3_ID_OFFSET + HIVE_ISEL_IRQ_SYNC_GEN_EOL_BIT_ID, + + N_virq_id = IRQ_END_OFFSET +} virq_id_t; + +struct virq_info_s { + hrt_data irq_status_reg[N_IRQ_ID]; +}; + +struct irq_controller_state_s { + unsigned int irq_edge; + unsigned int irq_mask; + unsigned int irq_status; + unsigned int irq_enable; + unsigned int irq_level_not_pulse; +}; + +#endif /* __IRQ_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h new file mode 100644 index 0000000000000..23a13ac696c20 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h @@ -0,0 +1,44 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IRQ_PRIVATE_H_INCLUDED__ +#define __IRQ_PRIVATE_H_INCLUDED__ + +#include "irq_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_IRQ_C void irq_reg_store( + const irq_ID_t ID, + const unsigned int reg, + const hrt_data value) +{ + assert(ID < N_IRQ_ID); + assert(IRQ_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(IRQ_BASE[ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_IRQ_C hrt_data irq_reg_load( + const irq_ID_t ID, + const unsigned int reg) +{ + assert(ID < N_IRQ_ID); + assert(IRQ_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(IRQ_BASE[ID] + reg*sizeof(hrt_data)); +} + +#endif /* __IRQ_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c new file mode 100644 index 0000000000000..531c932a48f5d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c @@ -0,0 +1,129 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include "isp.h" + +#ifndef __INLINE_ISP__ +#include "isp_private.h" +#endif /* __INLINE_ISP__ */ + +#include "assert_support.h" +#include "platform_support.h" /* hrt_sleep() */ + +void cnd_isp_irq_enable( + const isp_ID_t ID, + const bool cnd) +{ + if (cnd) { + isp_ctrl_setbit(ID, ISP_IRQ_READY_REG, ISP_IRQ_READY_BIT); +/* Enabling the IRQ immediately triggers an interrupt, clear it */ + isp_ctrl_setbit(ID, ISP_IRQ_CLEAR_REG, ISP_IRQ_CLEAR_BIT); + } else { + isp_ctrl_clearbit(ID, ISP_IRQ_READY_REG, + ISP_IRQ_READY_BIT); + } + return; +} + +void isp_get_state( + const isp_ID_t ID, + isp_state_t *state, + isp_stall_t *stall) +{ + hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); + + assert(state != NULL); + assert(stall != NULL); + +#if defined(_hrt_sysmem_ident_address) + /* Patch to avoid compiler unused symbol warning in C_RUN build */ + (void)__hrt_sysmem_ident_address; + (void)_hrt_sysmem_map_var; +#endif + + state->pc = isp_ctrl_load(ID, ISP_PC_REG); + state->status_register = sc; + state->is_broken = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_BROKEN_BIT); + state->is_idle = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); + state->is_sleeping = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); + state->is_stalling = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_STALLING_BIT); + stall->stat_ctrl = + !isp_ctrl_getbit(ID, ISP_CTRL_SINK_REG, ISP_CTRL_SINK_BIT); + stall->pmem = + !isp_ctrl_getbit(ID, ISP_PMEM_SINK_REG, ISP_PMEM_SINK_BIT); + stall->dmem = + !isp_ctrl_getbit(ID, ISP_DMEM_SINK_REG, ISP_DMEM_SINK_BIT); + stall->vmem = + !isp_ctrl_getbit(ID, ISP_VMEM_SINK_REG, ISP_VMEM_SINK_BIT); + stall->fifo0 = + !isp_ctrl_getbit(ID, ISP_FIFO0_SINK_REG, ISP_FIFO0_SINK_BIT); + stall->fifo1 = + !isp_ctrl_getbit(ID, ISP_FIFO1_SINK_REG, ISP_FIFO1_SINK_BIT); + stall->fifo2 = + !isp_ctrl_getbit(ID, ISP_FIFO2_SINK_REG, ISP_FIFO2_SINK_BIT); + stall->fifo3 = + !isp_ctrl_getbit(ID, ISP_FIFO3_SINK_REG, ISP_FIFO3_SINK_BIT); + stall->fifo4 = + !isp_ctrl_getbit(ID, ISP_FIFO4_SINK_REG, ISP_FIFO4_SINK_BIT); + stall->fifo5 = + !isp_ctrl_getbit(ID, ISP_FIFO5_SINK_REG, ISP_FIFO5_SINK_BIT); + stall->fifo6 = + !isp_ctrl_getbit(ID, ISP_FIFO6_SINK_REG, ISP_FIFO6_SINK_BIT); + stall->vamem1 = + !isp_ctrl_getbit(ID, ISP_VAMEM1_SINK_REG, ISP_VAMEM1_SINK_BIT); + stall->vamem2 = + !isp_ctrl_getbit(ID, ISP_VAMEM2_SINK_REG, ISP_VAMEM2_SINK_BIT); + stall->vamem3 = + !isp_ctrl_getbit(ID, ISP_VAMEM3_SINK_REG, ISP_VAMEM3_SINK_BIT); + stall->hmem = + !isp_ctrl_getbit(ID, ISP_HMEM_SINK_REG, ISP_HMEM_SINK_BIT); +/* + stall->icache_master = + !isp_ctrl_getbit(ID, ISP_ICACHE_MT_SINK_REG, + ISP_ICACHE_MT_SINK_BIT); + */ + return; +} + +/* ISP functions to control the ISP state from the host, even in crun. */ + +/* Inspect readiness of an ISP indexed by ID */ +unsigned isp_is_ready(isp_ID_t ID) +{ + assert (ID < N_ISP_ID); + return isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); +} + +/* Inspect sleeping of an ISP indexed by ID */ +unsigned isp_is_sleeping(isp_ID_t ID) +{ + assert (ID < N_ISP_ID); + return isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); +} + +/* To be called by the host immediately before starting ISP ID. */ +void isp_start(isp_ID_t ID) +{ + assert (ID < N_ISP_ID); +} + +/* Wake up ISP ID. */ +void isp_wake(isp_ID_t ID) +{ + assert (ID < N_ISP_ID); + isp_ctrl_setbit(ID, ISP_SC_REG, ISP_START_BIT); + hrt_sleep(); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h new file mode 100644 index 0000000000000..5dcc52dff3dd4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h @@ -0,0 +1,57 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISP_LOCAL_H_INCLUDED__ +#define __ISP_LOCAL_H_INCLUDED__ + +#include + +#include "isp_global.h" + +#include + +#define HIVE_ISP_VMEM_MASK ((1U< +#endif + +#include "isp_public.h" + +#include "device_access.h" + +#include "assert_support.h" +#include "type_support.h" + +STORAGE_CLASS_ISP_C void isp_ctrl_store( + const isp_ID_t ID, + const unsigned int reg, + const hrt_data value) +{ + assert(ID < N_ISP_ID); + assert(ISP_CTRL_BASE[ID] != (hrt_address)-1); +#if !defined(HRT_MEMORY_ACCESS) + ia_css_device_store_uint32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +#else + hrt_master_port_store_32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +#endif + return; +} + +STORAGE_CLASS_ISP_C hrt_data isp_ctrl_load( + const isp_ID_t ID, + const unsigned int reg) +{ + assert(ID < N_ISP_ID); + assert(ISP_CTRL_BASE[ID] != (hrt_address)-1); +#if !defined(HRT_MEMORY_ACCESS) + return ia_css_device_load_uint32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data)); +#else + return hrt_master_port_uload_32(ISP_CTRL_BASE[ID] + reg*sizeof(hrt_data)); +#endif +} + +STORAGE_CLASS_ISP_C bool isp_ctrl_getbit( + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit) +{ + hrt_data val = isp_ctrl_load(ID, reg); + return (val & (1UL << bit)) != 0; +} + +STORAGE_CLASS_ISP_C void isp_ctrl_setbit( + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit) +{ + hrt_data data = isp_ctrl_load(ID, reg); + isp_ctrl_store(ID, reg, (data | (1UL << bit))); + return; +} + +STORAGE_CLASS_ISP_C void isp_ctrl_clearbit( + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit) +{ + hrt_data data = isp_ctrl_load(ID, reg); + isp_ctrl_store(ID, reg, (data & ~(1UL << bit))); + return; +} + +STORAGE_CLASS_ISP_C void isp_dmem_store( + const isp_ID_t ID, + unsigned int addr, + const void *data, + const size_t size) +{ + assert(ID < N_ISP_ID); + assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); +#if !defined(HRT_MEMORY_ACCESS) + ia_css_device_store(ISP_DMEM_BASE[ID] + addr, data, size); +#else + hrt_master_port_store(ISP_DMEM_BASE[ID] + addr, data, size); +#endif + return; +} + +STORAGE_CLASS_ISP_C void isp_dmem_load( + const isp_ID_t ID, + const unsigned int addr, + void *data, + const size_t size) +{ + assert(ID < N_ISP_ID); + assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); +#if !defined(HRT_MEMORY_ACCESS) + ia_css_device_load(ISP_DMEM_BASE[ID] + addr, data, size); +#else + hrt_master_port_load(ISP_DMEM_BASE[ID] + addr, data, size); +#endif + return; +} + +STORAGE_CLASS_ISP_C void isp_dmem_store_uint32( + const isp_ID_t ID, + unsigned int addr, + const uint32_t data) +{ + assert(ID < N_ISP_ID); + assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; +#if !defined(HRT_MEMORY_ACCESS) + ia_css_device_store_uint32(ISP_DMEM_BASE[ID] + addr, data); +#else + hrt_master_port_store_32(ISP_DMEM_BASE[ID] + addr, data); +#endif + return; +} + +STORAGE_CLASS_ISP_C uint32_t isp_dmem_load_uint32( + const isp_ID_t ID, + const unsigned int addr) +{ + assert(ID < N_ISP_ID); + assert(ISP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; +#if !defined(HRT_MEMORY_ACCESS) + return ia_css_device_load_uint32(ISP_DMEM_BASE[ID] + addr); +#else + return hrt_master_port_uload_32(ISP_DMEM_BASE[ID] + addr); +#endif +} + +STORAGE_CLASS_ISP_C uint32_t isp_2w_cat_1w( + const uint16_t x0, + const uint16_t x1) +{ + uint32_t out = ((uint32_t)(x1 & HIVE_ISP_VMEM_MASK) << ISP_VMEM_ELEMBITS) + | (x0 & HIVE_ISP_VMEM_MASK); + return out; +} + +#endif /* __ISP_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c new file mode 100644 index 0000000000000..1a1719d3e7455 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* The name "mmu.h is already taken" */ +#include "mmu_device.h" + +void mmu_set_page_table_base_index( + const mmu_ID_t ID, + const hrt_data base_index) +{ + mmu_reg_store(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX, base_index); + return; +} + +hrt_data mmu_get_page_table_base_index( + const mmu_ID_t ID) +{ + return mmu_reg_load(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX); +} + +void mmu_invalidate_cache( + const mmu_ID_t ID) +{ + mmu_reg_store(ID, _HRT_MMU_INVALIDATE_TLB_REG_IDX, 1); + return; +} + +void mmu_invalidate_cache_all(void) +{ + mmu_ID_t mmu_id; + for (mmu_id = (mmu_ID_t)0;mmu_id < N_MMU_ID; mmu_id++) { + mmu_invalidate_cache(mmu_id); + } +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h new file mode 100644 index 0000000000000..7c3ad157189f4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __MMU_LOCAL_H_INCLUDED__ +#define __MMU_LOCAL_H_INCLUDED__ + +#include "mmu_global.h" + +#endif /* __MMU_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c new file mode 100644 index 0000000000000..db694d3a6fbb6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c @@ -0,0 +1,81 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "sp.h" + +#ifndef __INLINE_SP__ +#include "sp_private.h" +#endif /* __INLINE_SP__ */ + +#include "assert_support.h" + +void cnd_sp_irq_enable( + const sp_ID_t ID, + const bool cnd) +{ + if (cnd) { + sp_ctrl_setbit(ID, SP_IRQ_READY_REG, SP_IRQ_READY_BIT); +/* Enabling the IRQ immediately triggers an interrupt, clear it */ + sp_ctrl_setbit(ID, SP_IRQ_CLEAR_REG, SP_IRQ_CLEAR_BIT); + } else { + sp_ctrl_clearbit(ID, SP_IRQ_READY_REG, SP_IRQ_READY_BIT); + } +} + +void sp_get_state( + const sp_ID_t ID, + sp_state_t *state, + sp_stall_t *stall) +{ + hrt_data sc = sp_ctrl_load(ID, SP_SC_REG); + + assert(state != NULL); + assert(stall != NULL); + + state->pc = sp_ctrl_load(ID, SP_PC_REG); + state->status_register = sc; + state->is_broken = (sc & (1U << SP_BROKEN_BIT)) != 0; + state->is_idle = (sc & (1U << SP_IDLE_BIT)) != 0; + state->is_sleeping = (sc & (1U << SP_SLEEPING_BIT)) != 0; + state->is_stalling = (sc & (1U << SP_STALLING_BIT)) != 0; + stall->fifo0 = + !sp_ctrl_getbit(ID, SP_FIFO0_SINK_REG, SP_FIFO0_SINK_BIT); + stall->fifo1 = + !sp_ctrl_getbit(ID, SP_FIFO1_SINK_REG, SP_FIFO1_SINK_BIT); + stall->fifo2 = + !sp_ctrl_getbit(ID, SP_FIFO2_SINK_REG, SP_FIFO2_SINK_BIT); + stall->fifo3 = + !sp_ctrl_getbit(ID, SP_FIFO3_SINK_REG, SP_FIFO3_SINK_BIT); + stall->fifo4 = + !sp_ctrl_getbit(ID, SP_FIFO4_SINK_REG, SP_FIFO4_SINK_BIT); + stall->fifo5 = + !sp_ctrl_getbit(ID, SP_FIFO5_SINK_REG, SP_FIFO5_SINK_BIT); + stall->fifo6 = + !sp_ctrl_getbit(ID, SP_FIFO6_SINK_REG, SP_FIFO6_SINK_BIT); + stall->fifo7 = + !sp_ctrl_getbit(ID, SP_FIFO7_SINK_REG, SP_FIFO7_SINK_BIT); + stall->fifo8 = + !sp_ctrl_getbit(ID, SP_FIFO8_SINK_REG, SP_FIFO8_SINK_BIT); + stall->fifo9 = + !sp_ctrl_getbit(ID, SP_FIFO9_SINK_REG, SP_FIFO9_SINK_BIT); + stall->fifoa = + !sp_ctrl_getbit(ID, SP_FIFOA_SINK_REG, SP_FIFOA_SINK_BIT); + stall->dmem = + !sp_ctrl_getbit(ID, SP_DMEM_SINK_REG, SP_DMEM_SINK_BIT); + stall->control_master = + !sp_ctrl_getbit(ID, SP_CTRL_MT_SINK_REG, SP_CTRL_MT_SINK_BIT); + stall->icache_master = + !sp_ctrl_getbit(ID, SP_ICACHE_MT_SINK_REG, + SP_ICACHE_MT_SINK_BIT); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h new file mode 100644 index 0000000000000..3c70b8fdb5324 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h @@ -0,0 +1,101 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SP_LOCAL_H_INCLUDED__ +#define __SP_LOCAL_H_INCLUDED__ + +#include +#include "sp_global.h" + +struct sp_state_s { + int pc; + int status_register; + bool is_broken; + bool is_idle; + bool is_sleeping; + bool is_stalling; +}; + +struct sp_stall_s { + bool fifo0; + bool fifo1; + bool fifo2; + bool fifo3; + bool fifo4; + bool fifo5; + bool fifo6; + bool fifo7; + bool fifo8; + bool fifo9; + bool fifoa; + bool dmem; + bool control_master; + bool icache_master; +}; + +#define sp_address_of(var) (HIVE_ADDR_ ## var) + +/* + * deprecated + */ +#define store_sp_int(var, value) \ + sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(var), \ + (uint32_t)(value)) + +#define store_sp_ptr(var, value) \ + sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(var), \ + (uint32_t)(value)) + +#define load_sp_uint(var) \ + sp_dmem_load_uint32(SP0_ID, (unsigned)sp_address_of(var)) + +#define load_sp_array_uint8(array_name, index) \ + sp_dmem_load_uint8(SP0_ID, (unsigned)sp_address_of(array_name) + \ + (index)*sizeof(uint8_t)) + +#define load_sp_array_uint16(array_name, index) \ + sp_dmem_load_uint16(SP0_ID, (unsigned)sp_address_of(array_name) + \ + (index)*sizeof(uint16_t)) + +#define load_sp_array_uint(array_name, index) \ + sp_dmem_load_uint32(SP0_ID, (unsigned)sp_address_of(array_name) + \ + (index)*sizeof(uint32_t)) + +#define store_sp_var(var, data, bytes) \ + sp_dmem_store(SP0_ID, (unsigned)sp_address_of(var), data, bytes) + +#define store_sp_array_uint8(array_name, index, value) \ + sp_dmem_store_uint8(SP0_ID, (unsigned)sp_address_of(array_name) + \ + (index)*sizeof(uint8_t), value) + +#define store_sp_array_uint16(array_name, index, value) \ + sp_dmem_store_uint16(SP0_ID, (unsigned)sp_address_of(array_name) + \ + (index)*sizeof(uint16_t), value) + +#define store_sp_array_uint(array_name, index, value) \ + sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(array_name) + \ + (index)*sizeof(uint32_t), value) + +#define store_sp_var_with_offset(var, offset, data, bytes) \ + sp_dmem_store(SP0_ID, (unsigned)sp_address_of(var) + \ + offset, data, bytes) + +#define load_sp_var(var, data, bytes) \ + sp_dmem_load(SP0_ID, (unsigned)sp_address_of(var), data, bytes) + +#define load_sp_var_with_offset(var, offset, data, bytes) \ + sp_dmem_load(SP0_ID, (unsigned)sp_address_of(var) + offset, \ + data, bytes) + +#endif /* __SP_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h new file mode 100644 index 0000000000000..5ea81c0e82d18 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h @@ -0,0 +1,163 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SP_PRIVATE_H_INCLUDED__ +#define __SP_PRIVATE_H_INCLUDED__ + +#include "sp_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_SP_C void sp_ctrl_store( + const sp_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_SP_ID); + assert(SP_CTRL_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); + return; +} + +STORAGE_CLASS_SP_C hrt_data sp_ctrl_load( + const sp_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_SP_ID); + assert(SP_CTRL_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg*sizeof(hrt_data)); +} + +STORAGE_CLASS_SP_C bool sp_ctrl_getbit( + const sp_ID_t ID, + const hrt_address reg, + const unsigned int bit) +{ + hrt_data val = sp_ctrl_load(ID, reg); + return (val & (1UL << bit)) != 0; +} + +STORAGE_CLASS_SP_C void sp_ctrl_setbit( + const sp_ID_t ID, + const hrt_address reg, + const unsigned int bit) +{ + hrt_data data = sp_ctrl_load(ID, reg); + sp_ctrl_store(ID, reg, (data | (1UL << bit))); + return; +} + +STORAGE_CLASS_SP_C void sp_ctrl_clearbit( + const sp_ID_t ID, + const hrt_address reg, + const unsigned int bit) +{ + hrt_data data = sp_ctrl_load(ID, reg); + sp_ctrl_store(ID, reg, (data & ~(1UL << bit))); + return; +} + +STORAGE_CLASS_SP_C void sp_dmem_store( + const sp_ID_t ID, + hrt_address addr, + const void *data, + const size_t size) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + ia_css_device_store(SP_DMEM_BASE[ID] + addr, data, size); + return; +} + +STORAGE_CLASS_SP_C void sp_dmem_load( + const sp_ID_t ID, + const hrt_address addr, + void *data, + const size_t size) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + ia_css_device_load(SP_DMEM_BASE[ID] + addr, data, size); + return; +} + +STORAGE_CLASS_SP_C void sp_dmem_store_uint8( + const sp_ID_t ID, + hrt_address addr, + const uint8_t data) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; + ia_css_device_store_uint8(SP_DMEM_BASE[SP0_ID] + addr, data); + return; +} + +STORAGE_CLASS_SP_C void sp_dmem_store_uint16( + const sp_ID_t ID, + hrt_address addr, + const uint16_t data) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; + ia_css_device_store_uint16(SP_DMEM_BASE[SP0_ID] + addr, data); + return; +} + +STORAGE_CLASS_SP_C void sp_dmem_store_uint32( + const sp_ID_t ID, + hrt_address addr, + const uint32_t data) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; + ia_css_device_store_uint32(SP_DMEM_BASE[SP0_ID] + addr, data); + return; +} + +STORAGE_CLASS_SP_C uint8_t sp_dmem_load_uint8( + const sp_ID_t ID, + const hrt_address addr) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; + return ia_css_device_load_uint8(SP_DMEM_BASE[SP0_ID] + addr); +} + +STORAGE_CLASS_SP_C uint16_t sp_dmem_load_uint16( + const sp_ID_t ID, + const hrt_address addr) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; + return ia_css_device_load_uint16(SP_DMEM_BASE[SP0_ID] + addr); +} + +STORAGE_CLASS_SP_C uint32_t sp_dmem_load_uint32( + const sp_ID_t ID, + const hrt_address addr) +{ + assert(ID < N_SP_ID); + assert(SP_DMEM_BASE[ID] != (hrt_address)-1); + (void)ID; + return ia_css_device_load_uint32(SP_DMEM_BASE[SP0_ID] + addr); +} + +#endif /* __SP_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h new file mode 100644 index 0000000000000..8be1cd020bf45 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h @@ -0,0 +1,291 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SYSTEM_LOCAL_H_INCLUDED__ +#define __SYSTEM_LOCAL_H_INCLUDED__ + +#ifdef HRT_ISP_CSS_CUSTOM_HOST +#ifndef HRT_USE_VIR_ADDRS +#define HRT_USE_VIR_ADDRS +#endif +/* This interface is deprecated */ +/*#include "hive_isp_css_custom_host_hrt.h"*/ +#endif + +#include "system_global.h" + +#ifdef __FIST__ +#define HRT_ADDRESS_WIDTH 32 /* Surprise, this is a local property and even differs per platform */ +#else +/* HRT assumes 32 by default (see Linux/include/hrt/hive_types.h), overrule it in case it is different */ +#undef HRT_ADDRESS_WIDTH +#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ +#endif + +/* This interface is deprecated */ +#include "hrt/hive_types.h" + +/* + * Cell specific address maps + */ +#if HRT_ADDRESS_WIDTH==64 + +#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */ + +/* DDR */ +static const hrt_address DDR_BASE[N_DDR_ID] = { + (hrt_address)0x0000000120000000ULL}; + +/* ISP */ +static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { + (hrt_address)0x0000000000020000ULL}; + +static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { + (hrt_address)0x0000000000200000ULL}; + +static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { + (hrt_address)0x0000000000100000ULL}; + +static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { + (hrt_address)0x00000000001C0000ULL, + (hrt_address)0x00000000001D0000ULL, + (hrt_address)0x00000000001E0000ULL}; + +static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { + (hrt_address)0x00000000001F0000ULL}; + +/* SP */ +static const hrt_address SP_CTRL_BASE[N_SP_ID] = { + (hrt_address)0x0000000000010000ULL}; + +static const hrt_address SP_DMEM_BASE[N_SP_ID] = { + (hrt_address)0x0000000000300000ULL}; + +static const hrt_address SP_PMEM_BASE[N_SP_ID] = { + (hrt_address)0x00000000000B0000ULL}; + +/* MMU */ +#if defined (IS_ISP_2400_MAMOIADA_SYSTEM) || defined (IS_ISP_2401_MAMOIADA_SYSTEM) +/* + * MMU0_ID: The data MMU + * MMU1_ID: The icache MMU + */ +static const hrt_address MMU_BASE[N_MMU_ID] = { + (hrt_address)0x0000000000070000ULL, + (hrt_address)0x00000000000A0000ULL}; +#else +#error "system_local.h: SYSTEM must be one of {2400, 2401 }" +#endif + +/* DMA */ +static const hrt_address DMA_BASE[N_DMA_ID] = { + (hrt_address)0x0000000000040000ULL}; + +/* IRQ */ +static const hrt_address IRQ_BASE[N_IRQ_ID] = { + (hrt_address)0x0000000000000500ULL, + (hrt_address)0x0000000000030A00ULL, + (hrt_address)0x000000000008C000ULL, + (hrt_address)0x0000000000090200ULL}; +/* + (hrt_address)0x0000000000000500ULL}; + */ + +/* GDC */ +static const hrt_address GDC_BASE[N_GDC_ID] = { + (hrt_address)0x0000000000050000ULL, + (hrt_address)0x0000000000060000ULL}; + +/* FIFO_MONITOR (not a subset of GP_DEVICE) */ +static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { + (hrt_address)0x0000000000000000ULL}; + +/* +static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { + (hrt_address)0x0000000000000000ULL}; + +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + (hrt_address)0x0000000000090000ULL}; +*/ + +/* GP_DEVICE (single base for all separate GP_REG instances) */ +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + (hrt_address)0x0000000000000000ULL}; + +/*GP TIMER , all timer registers are inter-twined, + * so, having multiple base addresses for + * different timers does not help*/ +static const hrt_address GP_TIMER_BASE = + (hrt_address)0x0000000000000600ULL; +/* GPIO */ +static const hrt_address GPIO_BASE[N_GPIO_ID] = { + (hrt_address)0x0000000000000400ULL}; + +/* TIMED_CTRL */ +static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { + (hrt_address)0x0000000000000100ULL}; + + +/* INPUT_FORMATTER */ +static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { + (hrt_address)0x0000000000030000ULL, + (hrt_address)0x0000000000030200ULL, + (hrt_address)0x0000000000030400ULL, + (hrt_address)0x0000000000030600ULL}; /* memcpy() */ + +/* INPUT_SYSTEM */ +static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { + (hrt_address)0x0000000000080000ULL}; +/* (hrt_address)0x0000000000081000ULL, */ /* capture A */ +/* (hrt_address)0x0000000000082000ULL, */ /* capture B */ +/* (hrt_address)0x0000000000083000ULL, */ /* capture C */ +/* (hrt_address)0x0000000000084000ULL, */ /* Acquisition */ +/* (hrt_address)0x0000000000085000ULL, */ /* DMA */ +/* (hrt_address)0x0000000000089000ULL, */ /* ctrl */ +/* (hrt_address)0x000000000008A000ULL, */ /* GP regs */ +/* (hrt_address)0x000000000008B000ULL, */ /* FIFO */ +/* (hrt_address)0x000000000008C000ULL, */ /* IRQ */ + +/* RX, the MIPI lane control regs start at offset 0 */ +static const hrt_address RX_BASE[N_RX_ID] = { + (hrt_address)0x0000000000080100ULL}; + +#elif HRT_ADDRESS_WIDTH==32 + +#define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */ + +/* DDR : Attention, this value not defined in 32-bit */ +static const hrt_address DDR_BASE[N_DDR_ID] = { + (hrt_address)0x00000000UL}; + +/* ISP */ +static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { + (hrt_address)0x00020000UL}; + +static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { + (hrt_address)0x00200000UL}; + +static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { + (hrt_address)0x100000UL}; + +static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { + (hrt_address)0xffffffffUL, + (hrt_address)0xffffffffUL, + (hrt_address)0xffffffffUL}; + +static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { + (hrt_address)0xffffffffUL}; + +/* SP */ +static const hrt_address SP_CTRL_BASE[N_SP_ID] = { + (hrt_address)0x00010000UL}; + +static const hrt_address SP_DMEM_BASE[N_SP_ID] = { + (hrt_address)0x00300000UL}; + +static const hrt_address SP_PMEM_BASE[N_SP_ID] = { + (hrt_address)0x000B0000UL}; + +/* MMU */ +#if defined (IS_ISP_2400_MAMOIADA_SYSTEM) || defined (IS_ISP_2401_MAMOIADA_SYSTEM) +/* + * MMU0_ID: The data MMU + * MMU1_ID: The icache MMU + */ +static const hrt_address MMU_BASE[N_MMU_ID] = { + (hrt_address)0x00070000UL, + (hrt_address)0x000A0000UL}; +#else +#error "system_local.h: SYSTEM must be one of {2400, 2401 }" +#endif + +/* DMA */ +static const hrt_address DMA_BASE[N_DMA_ID] = { + (hrt_address)0x00040000UL}; + +/* IRQ */ +static const hrt_address IRQ_BASE[N_IRQ_ID] = { + (hrt_address)0x00000500UL, + (hrt_address)0x00030A00UL, + (hrt_address)0x0008C000UL, + (hrt_address)0x00090200UL}; +/* + (hrt_address)0x00000500UL}; + */ + +/* GDC */ +static const hrt_address GDC_BASE[N_GDC_ID] = { + (hrt_address)0x00050000UL, + (hrt_address)0x00060000UL}; + +/* FIFO_MONITOR (not a subset of GP_DEVICE) */ +static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { + (hrt_address)0x00000000UL}; + +/* +static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { + (hrt_address)0x00000000UL}; + +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + (hrt_address)0x00090000UL}; +*/ + +/* GP_DEVICE (single base for all separate GP_REG instances) */ +static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { + (hrt_address)0x00000000UL}; + +/*GP TIMER , all timer registers are inter-twined, + * so, having multiple base addresses for + * different timers does not help*/ +static const hrt_address GP_TIMER_BASE = + (hrt_address)0x00000600UL; + +/* GPIO */ +static const hrt_address GPIO_BASE[N_GPIO_ID] = { + (hrt_address)0x00000400UL}; + +/* TIMED_CTRL */ +static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { + (hrt_address)0x00000100UL}; + + +/* INPUT_FORMATTER */ +static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { + (hrt_address)0x00030000UL, + (hrt_address)0x00030200UL, + (hrt_address)0x00030400UL}; +/* (hrt_address)0x00030600UL, */ /* memcpy() */ + +/* INPUT_SYSTEM */ +static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { + (hrt_address)0x00080000UL}; +/* (hrt_address)0x00081000UL, */ /* capture A */ +/* (hrt_address)0x00082000UL, */ /* capture B */ +/* (hrt_address)0x00083000UL, */ /* capture C */ +/* (hrt_address)0x00084000UL, */ /* Acquisition */ +/* (hrt_address)0x00085000UL, */ /* DMA */ +/* (hrt_address)0x00089000UL, */ /* ctrl */ +/* (hrt_address)0x0008A000UL, */ /* GP regs */ +/* (hrt_address)0x0008B000UL, */ /* FIFO */ +/* (hrt_address)0x0008C000UL, */ /* IRQ */ + +/* RX, the MIPI lane control regs start at offset 0 */ +static const hrt_address RX_BASE[N_RX_ID] = { + (hrt_address)0x00080100UL}; + +#else +#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}" +#endif + +#endif /* __SYSTEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c new file mode 100644 index 0000000000000..cd12d74024f75 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c @@ -0,0 +1,74 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "timed_ctrl.h" + +#ifndef __INLINE_TIMED_CTRL__ +#include "timed_ctrl_private.h" +#endif /* __INLINE_TIMED_CTRL__ */ + +#include "assert_support.h" + +void timed_ctrl_snd_commnd( + const timed_ctrl_ID_t ID, + hrt_data mask, + hrt_data condition, + hrt_data counter, + hrt_address addr, + hrt_data value) +{ + OP___assert(ID == TIMED_CTRL0_ID); + OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); + + timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, mask); + timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, condition); + timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, counter); + timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, (hrt_data)addr); + timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, value); +} + +/* pqiao TODO: make sure the following commands get + correct BASE address both for csim and android */ + +void timed_ctrl_snd_sp_commnd( + const timed_ctrl_ID_t ID, + hrt_data mask, + hrt_data condition, + hrt_data counter, + const sp_ID_t SP_ID, + hrt_address offset, + hrt_data value) +{ + OP___assert(SP_ID < N_SP_ID); + OP___assert(SP_DMEM_BASE[SP_ID] != (hrt_address)-1); + + timed_ctrl_snd_commnd(ID, mask, condition, counter, + SP_DMEM_BASE[SP_ID]+offset, value); +} + +void timed_ctrl_snd_gpio_commnd( + const timed_ctrl_ID_t ID, + hrt_data mask, + hrt_data condition, + hrt_data counter, + const gpio_ID_t GPIO_ID, + hrt_address offset, + hrt_data value) +{ + OP___assert(GPIO_ID < N_GPIO_ID); + OP___assert(GPIO_BASE[GPIO_ID] != (hrt_address)-1); + + timed_ctrl_snd_commnd(ID, mask, condition, counter, + GPIO_BASE[GPIO_ID]+offset, value); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h new file mode 100644 index 0000000000000..e570813af28dc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TIMED_CTRL_LOCAL_H_INCLUDED__ +#define __TIMED_CTRL_LOCAL_H_INCLUDED__ + +#include "timed_ctrl_global.h" + +#endif /* __TIMED_CTRL_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h new file mode 100644 index 0000000000000..fb0fdbb884352 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h @@ -0,0 +1,34 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TIMED_CTRL_PRIVATE_H_INCLUDED__ +#define __TIMED_CTRL_PRIVATE_H_INCLUDED__ + +#include "timed_ctrl_public.h" + +#include "device_access.h" + +#include "assert_support.h" + +STORAGE_CLASS_TIMED_CTRL_C void timed_ctrl_reg_store( + const timed_ctrl_ID_t ID, + const unsigned int reg, + const hrt_data value) +{ +OP___assert(ID < N_TIMED_CTRL_ID); +OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); + ia_css_device_store_uint32(TIMED_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +} + +#endif /* __GP_DEVICE_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h new file mode 100644 index 0000000000000..c4e99afe0d295 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VAMEM_LOCAL_H_INCLUDED__ +#define __VAMEM_LOCAL_H_INCLUDED__ + +#include "vamem_global.h" + +#endif /* __VAMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h new file mode 100644 index 0000000000000..5e05258673d55 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h @@ -0,0 +1,37 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VAMEM_PRIVATE_H_INCLUDED__ +#define __VAMEM_PRIVATE_H_INCLUDED__ + +#include "vamem_public.h" + +#include + +#include "assert_support.h" + + +STORAGE_CLASS_ISP_C void isp_vamem_store( + const vamem_ID_t ID, + vamem_data_t *addr, + const vamem_data_t *data, + const size_t size) /* in vamem_data_t */ +{ + assert(ID < N_VAMEM_ID); + assert(ISP_VAMEM_BASE[ID] != (hrt_address)-1); + hrt_master_port_store(ISP_VAMEM_BASE[ID] + (unsigned)addr, data, size * sizeof(vamem_data_t)); +} + + +#endif /* __VAMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c new file mode 100644 index 0000000000000..ea22c23fc7a49 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c @@ -0,0 +1,258 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010 - 2016, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "isp.h" +#include "vmem.h" +#include "vmem_local.h" + +#if !defined(HRT_MEMORY_ACCESS) +#include "ia_css_device_access.h" +#endif +#include "assert_support.h" +#include "platform_support.h" /* hrt_sleep() */ + +typedef unsigned long long hive_uedge; +typedef hive_uedge *hive_wide; + +/* Copied from SDK: sim_semantics.c */ + +/* subword bits move like this: MSB[____xxxx____]LSB -> MSB[00000000xxxx]LSB */ +#define SUBWORD(w, start, end) (((w) & (((1ULL << ((end)-1))-1) << 1 | 1)) >> (start)) + +/* inverse subword bits move like this: MSB[xxxx____xxxx]LSB -> MSB[xxxx0000xxxx]LSB */ +#define INV_SUBWORD(w, start, end) ((w) & (~(((1ULL << ((end)-1))-1) << 1 | 1) | ((1ULL << (start))-1)) ) + +#define uedge_bits (8*sizeof(hive_uedge)) +#define move_lower_bits(target, target_bit, src, src_bit) move_subword(target, target_bit, src, 0, src_bit) +#define move_upper_bits(target, target_bit, src, src_bit) move_subword(target, target_bit, src, src_bit, uedge_bits) +#define move_word(target, target_bit, src) move_subword(target, target_bit, src, 0, uedge_bits) + +static void +move_subword ( + hive_uedge *target, + unsigned target_bit, + hive_uedge src, + unsigned src_start, + unsigned src_end) +{ + unsigned int start_elem = target_bit / uedge_bits; + unsigned int start_bit = target_bit % uedge_bits; + unsigned subword_width = src_end - src_start; + + hive_uedge src_subword = SUBWORD(src, src_start, src_end); + + if (subword_width + start_bit > uedge_bits) { /* overlap */ + hive_uedge old_val1; + hive_uedge old_val0 = INV_SUBWORD(target[start_elem], start_bit, uedge_bits); + target[start_elem] = old_val0 | (src_subword << start_bit); + old_val1 = INV_SUBWORD(target[start_elem+1], 0, subword_width + start_bit - uedge_bits); + target[start_elem+1] = old_val1 | (src_subword >> ( uedge_bits - start_bit)); + } else { + hive_uedge old_val = INV_SUBWORD(target[start_elem], start_bit, start_bit + subword_width); + target[start_elem] = old_val | (src_subword << start_bit); + } +} + +static void +hive_sim_wide_unpack( + hive_wide vector, + hive_wide elem, + hive_uint elem_bits, + hive_uint index) +{ + /* pointers into wide_type: */ + unsigned int start_elem = (elem_bits * index) / uedge_bits; + unsigned int start_bit = (elem_bits * index) % uedge_bits; + unsigned int end_elem = (elem_bits * (index + 1) - 1) / uedge_bits; + unsigned int end_bit = ((elem_bits * (index + 1) - 1) % uedge_bits) + 1; + + if (elem_bits == uedge_bits) { + /* easy case for speedup: */ + elem[0] = vector[index]; + } else if (start_elem == end_elem) { + /* only one (<=64 bits) element needs to be (partly) copied: */ + move_subword(elem, 0, vector[start_elem], start_bit, end_bit); + } else { + /* general case: handles edge spanning cases (includes >64bit elements) */ + unsigned int bits_written = 0; + unsigned int i; + move_upper_bits(elem, bits_written, vector[start_elem], start_bit); + bits_written += (64 - start_bit); + for(i = start_elem+1; i < end_elem; i++) { + move_word(elem, bits_written, vector[i]); + bits_written += uedge_bits; + } + move_lower_bits(elem, bits_written , vector[end_elem], end_bit); + } +} + +static void +hive_sim_wide_pack( + hive_wide vector, + hive_wide elem, + hive_uint elem_bits, + hive_uint index) +{ + /* pointers into wide_type: */ + unsigned int start_elem = (elem_bits * index) / uedge_bits; + + /* easy case for speedup: */ + if (elem_bits == uedge_bits) { + vector[start_elem] = elem[0]; + } else if (elem_bits > uedge_bits) { + unsigned bits_to_write = elem_bits; + unsigned start_bit = elem_bits * index; + unsigned i = 0; + for(; bits_to_write > uedge_bits; bits_to_write -= uedge_bits, i++, start_bit += uedge_bits) { + move_word(vector, start_bit, elem[i]); + } + move_lower_bits(vector, start_bit, elem[i], bits_to_write); + } else { + /* only one element needs to be (partly) copied: */ + move_lower_bits(vector, elem_bits * index, elem[0], elem_bits); + } +} + +static void load_vector ( + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from) +{ + unsigned i; + hive_uedge *data; + unsigned size = sizeof(short)*ISP_NWAY; + VMEM_ARRAY(v, 2*ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ + assert(ISP_BAMEM_BASE[ID] != (hrt_address)-1); +#if !defined(HRT_MEMORY_ACCESS) + ia_css_device_load(ISP_BAMEM_BASE[ID] + (unsigned long)from, &v[0][0], size); +#else + hrt_master_port_load(ISP_BAMEM_BASE[ID] + (unsigned long)from, &v[0][0], size); +#endif + data = (hive_uedge *)v; + for (i = 0; i < ISP_NWAY; i++) { + hive_uedge elem = 0; + hive_sim_wide_unpack(data, &elem, ISP_VEC_ELEMBITS, i); + to[i] = elem; + } + hrt_sleep(); /* Spend at least 1 cycles per vector */ +} + +static void store_vector ( + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from) +{ + unsigned i; + unsigned size = sizeof(short)*ISP_NWAY; + VMEM_ARRAY(v, 2*ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ + //load_vector (&v[1][0], &to[ISP_NWAY]); /* Fetch the next vector, since it will be overwritten. */ + hive_uedge *data = (hive_uedge *)v; + for (i = 0; i < ISP_NWAY; i++) { + hive_sim_wide_pack(data, (hive_wide)&from[i], ISP_VEC_ELEMBITS, i); + } + assert(ISP_BAMEM_BASE[ID] != (hrt_address)-1); +#if !defined(HRT_MEMORY_ACCESS) + ia_css_device_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size); +#else + //hrt_mem_store (ISP, VMEM, (unsigned)to, &v, siz); /* This will overwrite the next vector as well */ + hrt_master_port_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size); +#endif + hrt_sleep(); /* Spend at least 1 cycles per vector */ +} + +void isp_vmem_load( + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned elems) /* In t_vmem_elem */ +{ + unsigned c; + const t_vmem_elem *vp = from; + assert(ID < N_ISP_ID); + assert((unsigned long)from % ISP_VEC_ALIGN == 0); + assert(elems % ISP_NWAY == 0); + for (c = 0; c < elems; c += ISP_NWAY) { + load_vector(ID, &to[c], vp); + vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + } +} + +void isp_vmem_store( + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned elems) /* In t_vmem_elem */ +{ + unsigned c; + t_vmem_elem *vp = to; + assert(ID < N_ISP_ID); + assert((unsigned long)to % ISP_VEC_ALIGN == 0); + assert(elems % ISP_NWAY == 0); + for (c = 0; c < elems; c += ISP_NWAY) { + store_vector (ID, vp, &from[c]); + vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + } +} + +void isp_vmem_2d_load ( + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned height, + unsigned width, + unsigned stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */) +{ + unsigned h; + + assert(ID < N_ISP_ID); + assert((unsigned long)from % ISP_VEC_ALIGN == 0); + assert(width % ISP_NWAY == 0); + assert(stride_from % ISP_NWAY == 0); + for (h = 0; h < height; h++) { + unsigned c; + const t_vmem_elem *vp = from; + for (c = 0; c < width; c += ISP_NWAY) { + load_vector(ID, &to[stride_to*h + c], vp); + vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + } + from = (const t_vmem_elem *)((const char *)from + stride_from/ISP_NWAY*ISP_VEC_ALIGN); + } +} + +void isp_vmem_2d_store ( + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned height, + unsigned width, + unsigned stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */) +{ + unsigned h; + + assert(ID < N_ISP_ID); + assert((unsigned long)to % ISP_VEC_ALIGN == 0); + assert(width % ISP_NWAY == 0); + assert(stride_to % ISP_NWAY == 0); + for (h = 0; h < height; h++) { + unsigned c; + t_vmem_elem *vp = to; + for (c = 0; c < width; c += ISP_NWAY) { + store_vector (ID, vp, &from[stride_from*h + c]); + vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + } + to = (t_vmem_elem *)((char *)to + stride_to/ISP_NWAY*ISP_VEC_ALIGN); + } +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h new file mode 100644 index 0000000000000..de85644b885e1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h @@ -0,0 +1,55 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VMEM_LOCAL_H_INCLUDED__ +#define __VMEM_LOCAL_H_INCLUDED__ + +#include "type_support.h" +#include "vmem_global.h" + +typedef uint16_t t_vmem_elem; + +#define VMEM_ARRAY(x,s) t_vmem_elem x[s/ISP_NWAY][ISP_NWAY] + +void isp_vmem_load( + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned elems); /* In t_vmem_elem */ + +void isp_vmem_store( + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned elems); /* In t_vmem_elem */ + +void isp_vmem_2d_load ( + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned height, + unsigned width, + unsigned stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */); + +void isp_vmem_2d_store ( + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned height, + unsigned width, + unsigned stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */); + +#endif /* __VMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h new file mode 100644 index 0000000000000..f48d1281b5a77 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VMEM_PRIVATE_H_INCLUDED__ +#define __VMEM_PRIVATE_H_INCLUDED__ + +#include "vmem_public.h" + +#endif /* __VMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h new file mode 100644 index 0000000000000..7558f49643135 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h @@ -0,0 +1,114 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ +#define __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ + +#define IS_INPUT_FORMATTER_VERSION2 +#define IS_INPUT_SWITCH_VERSION2 + +#include +#include +#include "if_defs.h" +#include "str2mem_defs.h" +#include "input_switch_2400_defs.h" + +#define _HIVE_INPUT_SWITCH_GET_FSYNC_REG_LSB(ch_id) ((ch_id) * 3) + +#define HIVE_SWITCH_N_CHANNELS 4 +#define HIVE_SWITCH_N_FORMATTYPES 32 +#define HIVE_SWITCH_N_SWITCH_CODE 4 +#define HIVE_SWITCH_M_CHANNELS 0x00000003 +#define HIVE_SWITCH_M_FORMATTYPES 0x0000001f +#define HIVE_SWITCH_M_SWITCH_CODE 0x00000003 +#define HIVE_SWITCH_M_FSYNC 0x00000007 + +#define HIVE_SWITCH_ENCODE_FSYNC(x) \ + (1U<<(((x)-1)&HIVE_SWITCH_M_CHANNELS)) + +#define _HIVE_INPUT_SWITCH_GET_LUT_FIELD(reg, bit_index) \ + (((reg) >> (bit_index)) & HIVE_SWITCH_M_SWITCH_CODE) +#define _HIVE_INPUT_SWITCH_SET_LUT_FIELD(reg, bit_index, val) \ + (((reg) & ~(HIVE_SWITCH_M_SWITCH_CODE<<(bit_index))) | (((hrt_data)(val)&HIVE_SWITCH_M_SWITCH_CODE)<<(bit_index))) +#define _HIVE_INPUT_SWITCH_GET_FSYNC_FIELD(reg, bit_index) \ + (((reg) >> (bit_index)) & HIVE_SWITCH_M_FSYNC) +#define _HIVE_INPUT_SWITCH_SET_FSYNC_FIELD(reg, bit_index, val) \ + (((reg) & ~(HIVE_SWITCH_M_FSYNC<<(bit_index))) | (((hrt_data)(val)&HIVE_SWITCH_M_FSYNC)<<(bit_index))) + +typedef struct input_formatter_cfg_s input_formatter_cfg_t; + +/* Hardware registers */ +/*#define HIVE_IF_RESET_ADDRESS 0x000*/ /* deprecated */ +#define HIVE_IF_START_LINE_ADDRESS 0x004 +#define HIVE_IF_START_COLUMN_ADDRESS 0x008 +#define HIVE_IF_CROPPED_HEIGHT_ADDRESS 0x00C +#define HIVE_IF_CROPPED_WIDTH_ADDRESS 0x010 +#define HIVE_IF_VERTICAL_DECIMATION_ADDRESS 0x014 +#define HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS 0x018 +#define HIVE_IF_H_DEINTERLEAVING_ADDRESS 0x01C +#define HIVE_IF_LEFTPADDING_WIDTH_ADDRESS 0x020 +#define HIVE_IF_END_OF_LINE_OFFSET_ADDRESS 0x024 +#define HIVE_IF_VMEM_START_ADDRESS_ADDRESS 0x028 +#define HIVE_IF_VMEM_END_ADDRESS_ADDRESS 0x02C +#define HIVE_IF_VMEM_INCREMENT_ADDRESS 0x030 +#define HIVE_IF_YUV_420_FORMAT_ADDRESS 0x034 +#define HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS 0x038 +#define HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS 0x03C +#define HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS 0x040 +#define HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS 0x044 +#define HIVE_IF_V_DEINTERLEAVING_ADDRESS 0x048 +#define HIVE_IF_FSM_CROP_PIXEL_COUNTER 0x110 +#define HIVE_IF_FSM_CROP_LINE_COUNTER 0x10C +#define HIVE_IF_FSM_CROP_STATUS 0x108 + +/* Registers only for simulation */ +#define HIVE_IF_CRUN_MODE_ADDRESS 0x04C +#define HIVE_IF_DUMP_OUTPUT_ADDRESS 0x050 + +/* Follow the DMA syntax, "cmd" last */ +#define IF_PACK(val, cmd) ((val & 0x0fff) | (cmd /*& 0xf000*/)) + +#define HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS (_STR2MEM_SOFT_RESET_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS (_STR2MEM_INPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS (_STR2MEM_OUTPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS (_STR2MEM_BIT_SWAPPING_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS (_STR2MEM_BLOCK_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS (_STR2MEM_PACKET_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS (_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS (_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID * _STR2MEM_REG_ALIGN) +#define HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS (_STR2MEM_EN_STAT_UPDATE_ID * _STR2MEM_REG_ALIGN) + +/* + * This data structure is shared between host and SP + */ +struct input_formatter_cfg_s { + uint32_t start_line; + uint32_t start_column; + uint32_t left_padding; + uint32_t cropped_height; + uint32_t cropped_width; + uint32_t deinterleaving; + uint32_t buf_vecs; + uint32_t buf_start_index; + uint32_t buf_increment; + uint32_t buf_eol_offset; + uint32_t is_yuv420_format; + uint32_t block_no_reqs; +}; + +extern const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID]; +extern const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID]; +extern const uint8_t HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID]; + +#endif /* __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h new file mode 100644 index 0000000000000..9ba36525e8d32 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h @@ -0,0 +1,155 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ +#define __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ + +#define IS_INPUT_SYSTEM_VERSION_2 + +#include + +//CSI reveiver has 3 ports. +#define N_CSI_PORTS (3) +//AM: Use previous define for this. + +//MIPI allows upto 4 channels. +#define N_CHANNELS (4) +// 12KB = 256bit x 384 words +#define IB_CAPACITY_IN_WORDS (384) + +typedef enum { + MIPI_0LANE_CFG = 0, + MIPI_1LANE_CFG = 1, + MIPI_2LANE_CFG = 2, + MIPI_3LANE_CFG = 3, + MIPI_4LANE_CFG = 4 +} mipi_lane_cfg_t; + +typedef enum { + INPUT_SYSTEM_SOURCE_SENSOR = 0, + INPUT_SYSTEM_SOURCE_FIFO, + INPUT_SYSTEM_SOURCE_TPG, + INPUT_SYSTEM_SOURCE_PRBS, + INPUT_SYSTEM_SOURCE_MEMORY, + N_INPUT_SYSTEM_SOURCE +} input_system_source_t; + +/* internal routing configuration */ +typedef enum { + INPUT_SYSTEM_DISCARD_ALL = 0, + INPUT_SYSTEM_CSI_BACKEND = 1, + INPUT_SYSTEM_INPUT_BUFFER = 2, + INPUT_SYSTEM_MULTICAST = 3, + N_INPUT_SYSTEM_CONNECTION +} input_system_connection_t; + +typedef enum { + INPUT_SYSTEM_MIPI_PORT0, + INPUT_SYSTEM_MIPI_PORT1, + INPUT_SYSTEM_MIPI_PORT2, + INPUT_SYSTEM_ACQUISITION_UNIT, + N_INPUT_SYSTEM_MULTIPLEX +} input_system_multiplex_t; + +typedef enum { + INPUT_SYSTEM_SINK_MEMORY = 0, + INPUT_SYSTEM_SINK_ISP, + INPUT_SYSTEM_SINK_SP, + N_INPUT_SYSTEM_SINK +} input_system_sink_t; + +typedef enum { + INPUT_SYSTEM_FIFO_CAPTURE = 0, + INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING, + INPUT_SYSTEM_SRAM_BUFFERING, + INPUT_SYSTEM_XMEM_BUFFERING, + INPUT_SYSTEM_XMEM_CAPTURE, + INPUT_SYSTEM_XMEM_ACQUIRE, + N_INPUT_SYSTEM_BUFFERING_MODE +} buffering_mode_t; + +typedef struct input_system_cfg_s input_system_cfg_t; +typedef struct sync_generator_cfg_s sync_generator_cfg_t; +typedef struct tpg_cfg_s tpg_cfg_t; +typedef struct prbs_cfg_s prbs_cfg_t; + +/* MW: uint16_t should be sufficient */ +struct input_system_cfg_s { + uint32_t no_side_band; + uint32_t fmt_type; + uint32_t ch_id; + uint32_t input_mode; +}; + +struct sync_generator_cfg_s { + uint32_t width; + uint32_t height; + uint32_t hblank_cycles; + uint32_t vblank_cycles; +}; + +/* MW: tpg & prbs are exclusive */ +struct tpg_cfg_s { + uint32_t x_mask; + uint32_t y_mask; + uint32_t x_delta; + uint32_t y_delta; + uint32_t xy_mask; + sync_generator_cfg_t sync_gen_cfg; +}; + +struct prbs_cfg_s { + uint32_t seed; + sync_generator_cfg_t sync_gen_cfg; +}; + +struct gpfifo_cfg_s { +// TBD. + sync_generator_cfg_t sync_gen_cfg; +}; + +typedef struct gpfifo_cfg_s gpfifo_cfg_t; + +//ALX:Commented out to pass the compilation. +//typedef struct input_system_cfg_s input_system_cfg_t; + +struct ib_buffer_s { + uint32_t mem_reg_size; + uint32_t nof_mem_regs; + uint32_t mem_reg_addr; +}; + +typedef struct ib_buffer_s ib_buffer_t; + +struct csi_cfg_s { + uint32_t csi_port; + buffering_mode_t buffering_mode; + ib_buffer_t csi_buffer; + ib_buffer_t acquisition_buffer; + uint32_t nof_xmem_buffers; +}; + +typedef struct csi_cfg_s csi_cfg_t; + +typedef enum { + INPUT_SYSTEM_CFG_FLAG_RESET = 0, + INPUT_SYSTEM_CFG_FLAG_SET = 1U << 0, + INPUT_SYSTEM_CFG_FLAG_BLOCKED = 1U << 1, + INPUT_SYSTEM_CFG_FLAG_REQUIRED = 1U << 2, + INPUT_SYSTEM_CFG_FLAG_CONFLICT = 1U << 3 // To mark a conflicting configuration. +} input_system_cfg_flag_t; + +typedef uint32_t input_system_config_flags_t; + +#endif /* __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/irq_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/irq_global.h new file mode 100644 index 0000000000000..64554d80dc0b6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/irq_global.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IRQ_GLOBAL_H_INCLUDED__ +#define __IRQ_GLOBAL_H_INCLUDED__ + +#include + +#define IS_IRQ_VERSION_2 +#define IS_IRQ_MAP_VERSION_2 + +/* We cannot include the (hrt host ID) file defining the "CSS_RECEIVER" property without side effects */ +#ifndef HAS_NO_RX +#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) +/*#define CSS_RECEIVER testbench_isp_inp_sys_csi_receiver*/ +#include "hive_isp_css_irq_types_hrt.h" /* enum hrt_isp_css_irq */ +#elif defined(IS_ISP_2401_MAMOIADA_SYSTEM) +/*#define CSS_RECEIVER testbench_isp_is_2400_inp_sys_csi_receiver*/ +#include "hive_isp_css_2401_irq_types_hrt.h" /* enum hrt_isp_css_irq */ +#else +#error "irq_global.h: 2400_SYSTEM must be one of {2400, 2401 }" +#endif +#endif + +/* The IRQ is not mapped uniformly on its related interfaces */ +#define IRQ_SW_CHANNEL_OFFSET hrt_isp_css_irq_sw_pin_0 + +typedef enum { + IRQ_SW_CHANNEL0_ID = hrt_isp_css_irq_sw_pin_0 - IRQ_SW_CHANNEL_OFFSET, + IRQ_SW_CHANNEL1_ID = hrt_isp_css_irq_sw_pin_1 - IRQ_SW_CHANNEL_OFFSET, + N_IRQ_SW_CHANNEL_ID +} irq_sw_channel_id_t; + +#endif /* __IRQ_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h new file mode 100644 index 0000000000000..14d574849a5b1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h @@ -0,0 +1,115 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISP_GLOBAL_H_INCLUDED__ +#define __ISP_GLOBAL_H_INCLUDED__ + +#include + +#if defined (HAS_ISP_2401_MAMOIADA) +#define IS_ISP_2401_MAMOIADA + +#include "isp2401_mamoiada_params.h" +#elif defined (HAS_ISP_2400_MAMOIADA) +#define IS_ISP_2400_MAMOIADA + +#include "isp2400_mamoiada_params.h" +#else +#error "isp_global_h: ISP_2400_MAMOIDA must be one of {2400, 2401 }" +#endif + +#define ISP_PMEM_WIDTH_LOG2 ISP_LOG2_PMEM_WIDTH +#define ISP_PMEM_SIZE ISP_PMEM_DEPTH + +#define ISP_NWAY_LOG2 6 +#define ISP_VEC_NELEMS_LOG2 ISP_NWAY_LOG2 + +#ifdef ISP2401 +#ifdef PIPE_GENERATION +#define PIPEMEM(x) MEM(x) +#define ISP_NWAY (1< + +#endif /* __MMU_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/sp_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/sp_global.h new file mode 100644 index 0000000000000..6ec4e590e3b4a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/sp_global.h @@ -0,0 +1,93 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SP_GLOBAL_H_INCLUDED__ +#define __SP_GLOBAL_H_INCLUDED__ + +#include + +#if defined(HAS_SP_2401) +#define IS_SP_2401 +/* 2401 uses 2400 */ +#include +#elif defined(HAS_SP_2400) +#define IS_SP_2400 + +#include +#else +#error "sp_global.h: SP_2400 must be one of {2400, 2401 }" +#endif + +#define SP_PMEM_WIDTH_LOG2 SP_PMEM_LOG_WIDTH_BITS +#define SP_PMEM_SIZE SP_PMEM_DEPTH + +#define SP_DMEM_SIZE 0x4000 + +/* SP Registers */ +#define SP_PC_REG 0x09 +#define SP_SC_REG 0x00 +#define SP_START_ADDR_REG 0x01 +#define SP_ICACHE_ADDR_REG 0x05 +#define SP_IRQ_READY_REG 0x00 +#define SP_IRQ_CLEAR_REG 0x00 +#define SP_ICACHE_INV_REG 0x00 +#define SP_CTRL_SINK_REG 0x0A + +/* SP Register bits */ +#define SP_RST_BIT 0x00 +#define SP_START_BIT 0x01 +#define SP_BREAK_BIT 0x02 +#define SP_RUN_BIT 0x03 +#define SP_BROKEN_BIT 0x04 +#define SP_IDLE_BIT 0x05 /* READY */ +#define SP_SLEEPING_BIT 0x06 +#define SP_STALLING_BIT 0x07 +#define SP_IRQ_CLEAR_BIT 0x08 +#define SP_IRQ_READY_BIT 0x0A +#define SP_IRQ_SLEEPING_BIT 0x0B + +#define SP_ICACHE_INV_BIT 0x0C +#define SP_IPREFETCH_EN_BIT 0x0D + +#define SP_FIFO0_SINK_BIT 0x00 +#define SP_FIFO1_SINK_BIT 0x01 +#define SP_FIFO2_SINK_BIT 0x02 +#define SP_FIFO3_SINK_BIT 0x03 +#define SP_FIFO4_SINK_BIT 0x04 +#define SP_FIFO5_SINK_BIT 0x05 +#define SP_FIFO6_SINK_BIT 0x06 +#define SP_FIFO7_SINK_BIT 0x07 +#define SP_FIFO8_SINK_BIT 0x08 +#define SP_FIFO9_SINK_BIT 0x09 +#define SP_FIFOA_SINK_BIT 0x0A +#define SP_DMEM_SINK_BIT 0x0B +#define SP_CTRL_MT_SINK_BIT 0x0C +#define SP_ICACHE_MT_SINK_BIT 0x0D + +#define SP_FIFO0_SINK_REG 0x0A +#define SP_FIFO1_SINK_REG 0x0A +#define SP_FIFO2_SINK_REG 0x0A +#define SP_FIFO3_SINK_REG 0x0A +#define SP_FIFO4_SINK_REG 0x0A +#define SP_FIFO5_SINK_REG 0x0A +#define SP_FIFO6_SINK_REG 0x0A +#define SP_FIFO7_SINK_REG 0x0A +#define SP_FIFO8_SINK_REG 0x0A +#define SP_FIFO9_SINK_REG 0x0A +#define SP_FIFOA_SINK_REG 0x0A +#define SP_DMEM_SINK_REG 0x0A +#define SP_CTRL_MT_SINK_REG 0x0A +#define SP_ICACHE_MT_SINK_REG 0x0A + +#endif /* __SP_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h new file mode 100644 index 0000000000000..6f63962a54e8f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h @@ -0,0 +1,348 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SYSTEM_GLOBAL_H_INCLUDED__ +#define __SYSTEM_GLOBAL_H_INCLUDED__ + +#include +#include + +/* + * The longest allowed (uninteruptible) bus transfer, does not + * take stalling into account + */ +#define HIVE_ISP_MAX_BURST_LENGTH 1024 + +/* + * Maximum allowed burst length in words for the ISP DMA + */ +#define ISP_DMA_MAX_BURST_LENGTH 128 + +/* + * Create a list of HAS and IS properties that defines the system + * + * The configuration assumes the following + * - The system is hetereogeneous; Multiple cells and devices classes + * - The cell and device instances are homogeneous, each device type + * belongs to the same class + * - Device instances supporting a subset of the class capabilities are + * allowed + * + * We could manage different device classes through the enumerated + * lists (C) or the use of classes (C++), but that is presently not + * fully supported + * + * N.B. the 3 input formatters are of 2 different classess + */ + +#define IS_ISP_2400_SYSTEM +/* + * Since this file is visible everywhere and the system definition + * macros are not, detect the separate definitions for {host, SP, ISP} + * + * The 2401 system has the nice property that it uses a vanilla 2400 SP + * so the SP will believe it is a 2400 system rather than 2401... + */ +//#if defined(SYSTEM_hive_isp_css_2401_system) || defined(__isp2401_mamoiada) || defined(__scalar_processor_2401) +#if defined(SYSTEM_hive_isp_css_2401_system) || defined(__isp2401_mamoiada) +#define IS_ISP_2401_MAMOIADA_SYSTEM +#define HAS_ISP_2401_MAMOIADA +#define HAS_SP_2400 +//#elif defined(SYSTEM_hive_isp_css_2400_system) || defined(__isp2400_mamoiada) || defined(__scalar_processor_2400) +#elif defined(SYSTEM_hive_isp_css_2400_system) || defined(__isp2400_mamoiada) +#define IS_ISP_2400_MAMOIADA_SYSTEM +#define HAS_ISP_2400_MAMOIADA +#define HAS_SP_2400 +#else +#error "system_global.h: 2400_SYSTEM must be one of {2400, 2401 }" +#endif + +#define USE_INPUT_SYSTEM_VERSION_2 + +#define HAS_MMU_VERSION_2 +#define HAS_DMA_VERSION_2 +#define HAS_GDC_VERSION_2 +#define HAS_VAMEM_VERSION_2 +#define HAS_HMEM_VERSION_1 +#define HAS_BAMEM_VERSION_2 +#define HAS_IRQ_VERSION_2 +#define HAS_IRQ_MAP_VERSION_2 +#define HAS_INPUT_FORMATTER_VERSION_2 +/* 2401: HAS_INPUT_SYSTEM_VERSION_2401 */ +#define HAS_INPUT_SYSTEM_VERSION_2 +#define HAS_BUFFERED_SENSOR +#define HAS_FIFO_MONITORS_VERSION_2 +/* #define HAS_GP_REGS_VERSION_2 */ +#define HAS_GP_DEVICE_VERSION_2 +#define HAS_GPIO_VERSION_1 +#define HAS_TIMED_CTRL_VERSION_1 +#define HAS_RX_VERSION_2 + +#define DMA_DDR_TO_VAMEM_WORKAROUND +#define DMA_DDR_TO_HMEM_WORKAROUND + +/* + * Semi global. "HRT" is accessible from SP, but the HRT types do not fully apply + */ +#define HRT_VADDRESS_WIDTH 32 +//#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property*/ +#define HRT_DATA_WIDTH 32 + +#define SIZEOF_HRT_REG (HRT_DATA_WIDTH>>3) +#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH/8) + +/* The main bus connecting all devices */ +#define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH +#define HRT_BUS_BYTES HIVE_ISP_CTRL_DATA_BYTES + +/* per-frame parameter handling support */ +#define SH_CSS_ENABLE_PER_FRAME_PARAMS + +typedef uint32_t hrt_bus_align_t; + +/* + * Enumerate the devices, device access through the API is by ID, through the DLI by address + * The enumerator terminators are used to size the wiring arrays and as an exception value. + */ +typedef enum { + DDR0_ID = 0, + N_DDR_ID +} ddr_ID_t; + +typedef enum { + ISP0_ID = 0, + N_ISP_ID +} isp_ID_t; + +typedef enum { + SP0_ID = 0, + N_SP_ID +} sp_ID_t; + +#if defined (IS_ISP_2401_MAMOIADA_SYSTEM) +typedef enum { + MMU0_ID = 0, + MMU1_ID, + N_MMU_ID +} mmu_ID_t; +#elif defined (IS_ISP_2400_MAMOIADA_SYSTEM) +typedef enum { + MMU0_ID = 0, + MMU1_ID, + N_MMU_ID +} mmu_ID_t; +#else +#error "system_global.h: SYSTEM must be one of {2400, 2401}" +#endif + +typedef enum { + DMA0_ID = 0, + N_DMA_ID +} dma_ID_t; + +typedef enum { + GDC0_ID = 0, + GDC1_ID, + N_GDC_ID +} gdc_ID_t; + +#define N_GDC_ID_CPP 2 // this extra define is needed because we want to use it also in the preprocessor, and that doesn't work with enums. + +typedef enum { + VAMEM0_ID = 0, + VAMEM1_ID, + VAMEM2_ID, + N_VAMEM_ID +} vamem_ID_t; + +typedef enum { + BAMEM0_ID = 0, + N_BAMEM_ID +} bamem_ID_t; + +typedef enum { + HMEM0_ID = 0, + N_HMEM_ID +} hmem_ID_t; + +/* +typedef enum { + IRQ0_ID = 0, + N_IRQ_ID +} irq_ID_t; +*/ + +typedef enum { + IRQ0_ID = 0, // GP IRQ block + IRQ1_ID, // Input formatter + IRQ2_ID, // input system + IRQ3_ID, // input selector + N_IRQ_ID +} irq_ID_t; + +typedef enum { + FIFO_MONITOR0_ID = 0, + N_FIFO_MONITOR_ID +} fifo_monitor_ID_t; + +/* + * Deprecated: Since all gp_reg instances are different + * and put in the address maps of other devices we cannot + * enumerate them as that assumes the instrances are the + * same. + * + * We define a single GP_DEVICE containing all gp_regs + * w.r.t. a single base address + * +typedef enum { + GP_REGS0_ID = 0, + N_GP_REGS_ID +} gp_regs_ID_t; + */ +typedef enum { + GP_DEVICE0_ID = 0, + N_GP_DEVICE_ID +} gp_device_ID_t; + +typedef enum { + GP_TIMER0_ID = 0, + GP_TIMER1_ID, + GP_TIMER2_ID, + GP_TIMER3_ID, + GP_TIMER4_ID, + GP_TIMER5_ID, + GP_TIMER6_ID, + GP_TIMER7_ID, + N_GP_TIMER_ID +} gp_timer_ID_t; + +typedef enum { + GPIO0_ID = 0, + N_GPIO_ID +} gpio_ID_t; + +typedef enum { + TIMED_CTRL0_ID = 0, + N_TIMED_CTRL_ID +} timed_ctrl_ID_t; + +typedef enum { + INPUT_FORMATTER0_ID = 0, + INPUT_FORMATTER1_ID, + INPUT_FORMATTER2_ID, + INPUT_FORMATTER3_ID, + N_INPUT_FORMATTER_ID +} input_formatter_ID_t; + +/* The IF RST is outside the IF */ +#define INPUT_FORMATTER0_SRST_OFFSET 0x0824 +#define INPUT_FORMATTER1_SRST_OFFSET 0x0624 +#define INPUT_FORMATTER2_SRST_OFFSET 0x0424 +#define INPUT_FORMATTER3_SRST_OFFSET 0x0224 + +#define INPUT_FORMATTER0_SRST_MASK 0x0001 +#define INPUT_FORMATTER1_SRST_MASK 0x0002 +#define INPUT_FORMATTER2_SRST_MASK 0x0004 +#define INPUT_FORMATTER3_SRST_MASK 0x0008 + +typedef enum { + INPUT_SYSTEM0_ID = 0, + N_INPUT_SYSTEM_ID +} input_system_ID_t; + +typedef enum { + RX0_ID = 0, + N_RX_ID +} rx_ID_t; + +enum mipi_port_id { + MIPI_PORT0_ID = 0, + MIPI_PORT1_ID, + MIPI_PORT2_ID, + N_MIPI_PORT_ID +}; + +#define N_RX_CHANNEL_ID 4 + +/* Generic port enumeration with an internal port type ID */ +typedef enum { + CSI_PORT0_ID = 0, + CSI_PORT1_ID, + CSI_PORT2_ID, + TPG_PORT0_ID, + PRBS_PORT0_ID, + FIFO_PORT0_ID, + MEMORY_PORT0_ID, + N_INPUT_PORT_ID +} input_port_ID_t; + +typedef enum { + CAPTURE_UNIT0_ID = 0, + CAPTURE_UNIT1_ID, + CAPTURE_UNIT2_ID, + ACQUISITION_UNIT0_ID, + DMA_UNIT0_ID, + CTRL_UNIT0_ID, + GPREGS_UNIT0_ID, + FIFO_UNIT0_ID, + IRQ_UNIT0_ID, + N_SUB_SYSTEM_ID +} sub_system_ID_t; + +#define N_CAPTURE_UNIT_ID 3 +#define N_ACQUISITION_UNIT_ID 1 +#define N_CTRL_UNIT_ID 1 + +enum ia_css_isp_memories { + IA_CSS_ISP_PMEM0 = 0, + IA_CSS_ISP_DMEM0, + IA_CSS_ISP_VMEM0, + IA_CSS_ISP_VAMEM0, + IA_CSS_ISP_VAMEM1, + IA_CSS_ISP_VAMEM2, + IA_CSS_ISP_HMEM0, + IA_CSS_SP_DMEM0, + IA_CSS_DDR, + N_IA_CSS_MEMORIES +}; +#define IA_CSS_NUM_MEMORIES 9 +/* For driver compatability */ +#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES +#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES + +#if 0 +typedef enum { + dev_chn, /* device channels, external resource */ + ext_mem, /* external memories */ + int_mem, /* internal memories */ + int_chn /* internal channels, user defined */ +} resource_type_t; + +/* if this enum is extended with other memory resources, pls also extend the function resource_to_memptr() */ +typedef enum { + vied_nci_dev_chn_dma_ext0, + int_mem_vmem0, + int_mem_dmem0 +} resource_id_t; + +/* enum listing the different memories within a program group. + This enum is used in the mem_ptr_t type */ +typedef enum { + buf_mem_invalid = 0, + buf_mem_vmem_prog0, + buf_mem_dmem_prog0 +} buf_mem_t; + +#endif +#endif /* __SYSTEM_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h new file mode 100644 index 0000000000000..c3e8a01040924 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h @@ -0,0 +1,56 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TIMED_CTRL_GLOBAL_H_INCLUDED__ +#define __TIMED_CTRL_GLOBAL_H_INCLUDED__ + +#define IS_TIMED_CTRL_VERSION_1 + +#include + +/** + * Order of the input bits for the timed controller taken from + * ISP_CSS_2401 System Architecture Description valid for + * 2400, 2401. + * + * Check for other systems. + */ +#define HIVE_TIMED_CTRL_GPIO_PIN_0_BIT_ID 0 +#define HIVE_TIMED_CTRL_GPIO_PIN_1_BIT_ID 1 +#define HIVE_TIMED_CTRL_GPIO_PIN_2_BIT_ID 2 +#define HIVE_TIMED_CTRL_GPIO_PIN_3_BIT_ID 3 +#define HIVE_TIMED_CTRL_GPIO_PIN_4_BIT_ID 4 +#define HIVE_TIMED_CTRL_GPIO_PIN_5_BIT_ID 5 +#define HIVE_TIMED_CTRL_GPIO_PIN_6_BIT_ID 6 +#define HIVE_TIMED_CTRL_GPIO_PIN_7_BIT_ID 7 +#define HIVE_TIMED_CTRL_GPIO_PIN_8_BIT_ID 8 +#define HIVE_TIMED_CTRL_GPIO_PIN_9_BIT_ID 9 +#define HIVE_TIMED_CTRL_GPIO_PIN_10_BIT_ID 10 +#define HIVE_TIMED_CTRL_GPIO_PIN_11_BIT_ID 11 +#define HIVE_TIMED_CTRL_IRQ_SP_BIT_ID 12 +#define HIVE_TIMED_CTRL_IRQ_ISP_BIT_ID 13 +#define HIVE_TIMED_CTRL_IRQ_INPUT_SYSTEM_BIT_ID 14 +#define HIVE_TIMED_CTRL_IRQ_INPUT_SELECTOR_BIT_ID 15 +#define HIVE_TIMED_CTRL_IRQ_IF_BLOCK_BIT_ID 16 +#define HIVE_TIMED_CTRL_IRQ_GP_TIMER_0_BIT_ID 17 +#define HIVE_TIMED_CTRL_IRQ_GP_TIMER_1_BIT_ID 18 +#define HIVE_TIMED_CTRL_CSI_SOL_BIT_ID 19 +#define HIVE_TIMED_CTRL_CSI_EOL_BIT_ID 20 +#define HIVE_TIMED_CTRL_CSI_SOF_BIT_ID 21 +#define HIVE_TIMED_CTRL_CSI_EOF_BIT_ID 22 +#define HIVE_TIMED_CTRL_IRQ_IS_STREAMING_MONITOR_BIT_ID 23 + + + +#endif /* __TIMED_CTRL_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h new file mode 100644 index 0000000000000..58713c6583b96 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h @@ -0,0 +1,34 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VAMEM_GLOBAL_H_INCLUDED__ +#define __VAMEM_GLOBAL_H_INCLUDED__ + +#include + +#define IS_VAMEM_VERSION_2 + +/* (log) stepsize of linear interpolation */ +#define VAMEM_INTERP_STEP_LOG2 4 +#define VAMEM_INTERP_STEP (1< +#define assert(cnd) ASSERT(cnd) +#else +/* Windows usermode compilation */ +#include +#endif + +#elif defined(__KERNEL__) +#include + +/* TODO: it would be cleaner to use this: + * #define assert(cnd) BUG_ON(cnd) + * but that causes many compiler warnings (==errors) under Android + * because it seems that the BUG_ON() macro is not seen as a check by + * gcc like the BUG() macro is. */ +#define assert(cnd) \ + do { \ + if (!(cnd)) \ + BUG(); \ + } while (0) + +#elif defined(__FIST__) || defined(__GNUC__) + +/* enable assert for crun */ +#include "assert.h" + +#else /* default for unknown environments */ +#define assert(cnd) ((void)0) +#endif + +#endif /* NDEBUG */ + +#ifndef PIPE_GENERATION +/* Deprecated OP___assert, this is still used in ~1000 places + * in the code. This will be removed over time. + * The implemenation for the pipe generation tool is in see support.isp.h */ +#define OP___assert(cnd) assert(cnd) + +static inline void compile_time_assert (unsigned cond) +{ + /* Call undefined function if cond is false */ + extern void _compile_time_assert (void); + if (!cond) _compile_time_assert(); +} +#endif /* PIPE_GENERATION */ + +#endif /* __ASSERT_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/bitop_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/bitop_support.h new file mode 100644 index 0000000000000..1b271c3c6a254 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/bitop_support.h @@ -0,0 +1,25 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __BITOP_SUPPORT_H_INCLUDED__ +#define __BITOP_SUPPORT_H_INCLUDED__ + +#define bitop_setbit(a, b) ((a) |= (1UL << (b))) + +#define bitop_getbit(a, b) (((a) & (1UL << (b))) != 0) + +#define bitop_clearbit(a, b) ((a) &= ~(1UL << (b))) + +#endif /* __BITOP_SUPPORT_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/csi_rx.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/csi_rx.h new file mode 100644 index 0000000000000..917ee8cdb1d9f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/csi_rx.h @@ -0,0 +1,43 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CSI_RX_H_INCLUDED__ +#define __CSI_RX_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & + * inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "csi_rx_local.h" + +#ifndef __INLINE_CSI_RX__ +#include "csi_rx_public.h" +#else /* __INLINE_CSI_RX__ */ +#include "csi_rx_private.h" +#endif /* __INLINE_CSI_RX__ */ + +#endif /* __CSI_RX_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/debug.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/debug.h new file mode 100644 index 0000000000000..0aa22446e27e9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/debug.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DEBUG_H_INCLUDED__ +#define __DEBUG_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the DMA device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + * + */ + + +#include "system_local.h" +#include "debug_local.h" + +#ifndef __INLINE_DEBUG__ +#define STORAGE_CLASS_DEBUG_H extern +#define STORAGE_CLASS_DEBUG_C +#include "debug_public.h" +#else /* __INLINE_DEBUG__ */ +#define STORAGE_CLASS_DEBUG_H static inline +#define STORAGE_CLASS_DEBUG_C static inline +#include "debug_private.h" +#endif /* __INLINE_DEBUG__ */ + +#endif /* __DEBUG_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h new file mode 100644 index 0000000000000..834e7c3e0814f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h @@ -0,0 +1,194 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __DEVICE_ACCESS_H_INCLUDED__ +#define __DEVICE_ACCESS_H_INCLUDED__ + +/*! + * \brief + * Define the public interface for physical system + * access functions to SRAM and registers. Access + * types are limited to those defined in + * All accesses are aligned + * + * The address representation is private to the system + * and represented as/stored in "hrt_address". + * + * The system global address can differ by an offset; + * The device base address. This offset must be added + * by the implementation of the access function + * + * "store" is a transfer to the device + * "load" is a transfer from the device + */ + +#include + +/* + * User provided file that defines the system address types: + * - hrt_address a type that can hold the (sub)system address range + */ +#include "system_types.h" +/* + * We cannot assume that the global system address size is the size of + * a pointer because a (say) 64-bit host can be simulated in a 32-bit + * environment. Only if the host environment is modelled as on the target + * we could use a pointer. Even then, prototyping may need to be done + * before the target environment is available. AS we cannot wait for that + * we are stuck with integer addresses + */ + +/*typedef char *sys_address;*/ +typedef hrt_address sys_address; + +/*! Set the (sub)system base address + + \param base_addr[in] The offset on which the (sub)system is located + in the global address map + + \return none, + */ +extern void device_set_base_address( + const sys_address base_addr); + + +/*! Get the (sub)system base address + + \return base_address, + */ +extern sys_address device_get_base_address(void); + +/*! Read an 8-bit value from a device register or memory in the device + + \param addr[in] Local address + + \return device[addr] + */ +extern uint8_t ia_css_device_load_uint8( + const hrt_address addr); + +/*! Read a 16-bit value from a device register or memory in the device + + \param addr[in] Local address + + \return device[addr] + */ +extern uint16_t ia_css_device_load_uint16( + const hrt_address addr); + +/*! Read a 32-bit value from a device register or memory in the device + + \param addr[in] Local address + + \return device[addr] + */ +extern uint32_t ia_css_device_load_uint32( + const hrt_address addr); + +/*! Read a 64-bit value from a device register or memory in the device + + \param addr[in] Local address + + \return device[addr] + */ +extern uint64_t ia_css_device_load_uint64( + const hrt_address addr); + +/*! Write an 8-bit value to a device register or memory in the device + + \param addr[in] Local address + \param data[in] value + + \return none, device[addr] = value + */ +extern void ia_css_device_store_uint8( + const hrt_address addr, + const uint8_t data); + +/*! Write a 16-bit value to a device register or memory in the device + + \param addr[in] Local address + \param data[in] value + + \return none, device[addr] = value + */ +extern void ia_css_device_store_uint16( + const hrt_address addr, + const uint16_t data); + +/*! Write a 32-bit value to a device register or memory in the device + + \param addr[in] Local address + \param data[in] value + + \return none, device[addr] = value + */ +extern void ia_css_device_store_uint32( + const hrt_address addr, + const uint32_t data); + +/*! Write a 64-bit value to a device register or memory in the device + + \param addr[in] Local address + \param data[in] value + + \return none, device[addr] = value + */ +extern void ia_css_device_store_uint64( + const hrt_address addr, + const uint64_t data); + +/*! Read an array of bytes from device registers or memory in the device + + \param addr[in] Local address + \param data[out] pointer to the destination array + \param size[in] number of bytes to read + + \return none + */ +extern void ia_css_device_load( + const hrt_address addr, + void *data, + const size_t size); + +/*! Write an array of bytes to device registers or memory in the device + + \param addr[in] Local address + \param data[in] pointer to the source array + \param size[in] number of bytes to write + + \return none + */ +extern void ia_css_device_store( + const hrt_address addr, + const void *data, + const size_t size); + +#endif /* __DEVICE_ACCESS_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/dma.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/dma.h new file mode 100644 index 0000000000000..d9dee691e3f8b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/dma.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DMA_H_INCLUDED__ +#define __DMA_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the DMA device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + * + */ + + +#include "system_local.h" +#include "dma_local.h" + +#ifndef __INLINE_DMA__ +#define STORAGE_CLASS_DMA_H extern +#define STORAGE_CLASS_DMA_C +#include "dma_public.h" +#else /* __INLINE_DMA__ */ +#define STORAGE_CLASS_DMA_H static inline +#define STORAGE_CLASS_DMA_C static inline +#include "dma_private.h" +#endif /* __INLINE_DMA__ */ + +#endif /* __DMA_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h new file mode 100644 index 0000000000000..6e5e5dd4107d4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h @@ -0,0 +1,70 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ERROR_SUPPORT_H_INCLUDED__ +#define __ERROR_SUPPORT_H_INCLUDED__ + +#if defined(_MSC_VER) +#include +/* + * Put here everything _MSC_VER specific not covered in + * "errno.h" + */ +#define EINVAL 22 +#define EBADE 52 +#define ENODATA 61 +#define ENOTCONN 107 +#define ENOTSUP 252 +#define ENOBUFS 233 + + +#elif defined(__KERNEL__) +#include +/* + * Put here everything __KERNEL__ specific not covered in + * "errno.h" + */ +#define ENOTSUP 252 + +#elif defined(__GNUC__) +#include +/* + * Put here everything __GNUC__ specific not covered in + * "errno.h" + */ + +#else /* default is for the FIST environment */ +#include +/* + * Put here everything FIST specific not covered in + * "errno.h" + */ + +#endif + +#define verifexit(cond,error_tag) \ +do { \ + if (!(cond)){ \ + goto EXIT; \ + } \ +} while(0) + +#define verifjmpexit(cond) \ +do { \ + if (!(cond)){ \ + goto EXIT; \ + } \ +} while(0) + +#endif /* __ERROR_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h new file mode 100644 index 0000000000000..df579e9027969 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __EVENT_FIFO_H +#define __EVENT_FIFO_H + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the IRQ device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "event_fifo_local.h" + +#ifndef __INLINE_EVENT__ +#define STORAGE_CLASS_EVENT_H extern +#define STORAGE_CLASS_EVENT_C +#include "event_fifo_public.h" +#else /* __INLINE_EVENT__ */ +#define STORAGE_CLASS_EVENT_H static inline +#define STORAGE_CLASS_EVENT_C static inline +#include "event_fifo_private.h" +#endif /* __INLINE_EVENT__ */ + +#endif /* __EVENT_FIFO_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h new file mode 100644 index 0000000000000..f10c4fa2e32b7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __FIFO_MONITOR_H_INCLUDED__ +#define __FIFO_MONITOR_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "fifo_monitor_local.h" + +#ifndef __INLINE_FIFO_MONITOR__ +#define STORAGE_CLASS_FIFO_MONITOR_H extern +#define STORAGE_CLASS_FIFO_MONITOR_C +#include "fifo_monitor_public.h" +#else /* __INLINE_FIFO_MONITOR__ */ +#define STORAGE_CLASS_FIFO_MONITOR_H static inline +#define STORAGE_CLASS_FIFO_MONITOR_C static inline +#include "fifo_monitor_private.h" +#endif /* __INLINE_FIFO_MONITOR__ */ + +#endif /* __FIFO_MONITOR_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h new file mode 100644 index 0000000000000..75c6854c8e7b6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h @@ -0,0 +1,48 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GDC_DEVICE_H_INCLUDED__ +#define __GDC_DEVICE_H_INCLUDED__ + +/* The file gdc.h already exists */ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the GDC device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "gdc_local.h" + +#ifndef __INLINE_GDC__ +#define STORAGE_CLASS_GDC_H extern +#define STORAGE_CLASS_GDC_C +#include "gdc_public.h" +#else /* __INLINE_GDC__ */ +#define STORAGE_CLASS_GDC_H static inline +#define STORAGE_CLASS_GDC_C static inline +#include "gdc_private.h" +#endif /* __INLINE_GDC__ */ + +#endif /* __GDC_DEVICE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h new file mode 100644 index 0000000000000..aba94e623043e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_DEVICE_H_INCLUDED__ +#define __GP_DEVICE_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "gp_device_local.h" + +#ifndef __INLINE_GP_DEVICE__ +#define STORAGE_CLASS_GP_DEVICE_H extern +#define STORAGE_CLASS_GP_DEVICE_C +#include "gp_device_public.h" +#else /* __INLINE_GP_DEVICE__ */ +#define STORAGE_CLASS_GP_DEVICE_H static inline +#define STORAGE_CLASS_GP_DEVICE_C static inline +#include "gp_device_private.h" +#endif /* __INLINE_GP_DEVICE__ */ + +#endif /* __GP_DEVICE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h new file mode 100644 index 0000000000000..d5d2df24e11aa --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_TIMER_H_INCLUDED__ +#define __GP_TIMER_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" /*GP_TIMER_BASE address */ +#include "gp_timer_local.h" /*GP_TIMER register offsets */ + +#ifndef __INLINE_GP_TIMER__ +#define STORAGE_CLASS_GP_TIMER_H extern +#define STORAGE_CLASS_GP_TIMER_C +#include "gp_timer_public.h" /* functions*/ +#else /* __INLINE_GP_TIMER__ */ +#define STORAGE_CLASS_GP_TIMER_H static inline +#define STORAGE_CLASS_GP_TIMER_C static inline +#include "gp_timer_private.h" /* inline functions*/ +#endif /* __INLINE_GP_TIMER__ */ + +#endif /* __GP_TIMER_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h new file mode 100644 index 0000000000000..d37f7166aa4ac --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GPIO_H_INCLUDED__ +#define __GPIO_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "gpio_local.h" + +#ifndef __INLINE_GPIO__ +#define STORAGE_CLASS_GPIO_H extern +#define STORAGE_CLASS_GPIO_C +#include "gpio_public.h" +#else /* __INLINE_GPIO__ */ +#define STORAGE_CLASS_GPIO_H static inline +#define STORAGE_CLASS_GPIO_C static inline +#include "gpio_private.h" +#endif /* __INLINE_GPIO__ */ + +#endif /* __GPIO_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h new file mode 100644 index 0000000000000..a82fd3a21e98a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __HMEM_H_INCLUDED__ +#define __HMEM_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the HMEM device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "hmem_local.h" + +#ifndef __INLINE_HMEM__ +#define STORAGE_CLASS_HMEM_H extern +#define STORAGE_CLASS_HMEM_C +#include "hmem_public.h" +#else /* __INLINE_HMEM__ */ +#define STORAGE_CLASS_HMEM_H static inline +#define STORAGE_CLASS_HMEM_C static inline +#include "hmem_private.h" +#endif /* __INLINE_HMEM__ */ + +#endif /* __HMEM_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h new file mode 100644 index 0000000000000..426d022d3a260 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h @@ -0,0 +1,135 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CSI_RX_PUBLIC_H_INCLUDED__ +#define __CSI_RX_PUBLIC_H_INCLUDED__ + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +/***************************************************** + * + * Native command interface (NCI). + * + *****************************************************/ +/** + * @brief Get the csi rx frontend state. + * Get the state of the csi rx frontend regiester-set. + * + * @param[in] id The global unique ID of the csi rx fe controller. + * @param[out] state Point to the register-state. + */ +extern void csi_rx_fe_ctrl_get_state( + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state); +/** + * @brief Dump the csi rx frontend state. + * Dump the state of the csi rx frontend regiester-set. + * + * @param[in] id The global unique ID of the csi rx fe controller. + * @param[in] state Point to the register-state. + */ +extern void csi_rx_fe_ctrl_dump_state( + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state); +/** + * @brief Get the state of the csi rx fe dlane. + * Get the state of the register set per dlane process. + * + * @param[in] id The global unique ID of the input-buffer controller. + * @param[in] lane The lane ID. + * @param[out] state Point to the dlane state. + */ +extern void csi_rx_fe_ctrl_get_dlane_state( + const csi_rx_frontend_ID_t ID, + const uint32_t lane, + csi_rx_fe_ctrl_lane_t *dlane_state); +/** + * @brief Get the csi rx backend state. + * Get the state of the csi rx backend regiester-set. + * + * @param[in] id The global unique ID of the csi rx be controller. + * @param[out] state Point to the register-state. + */ +extern void csi_rx_be_ctrl_get_state( + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state); +/** + * @brief Dump the csi rx backend state. + * Dump the state of the csi rx backend regiester-set. + * + * @param[in] id The global unique ID of the csi rx be controller. + * @param[in] state Point to the register-state. + */ +extern void csi_rx_be_ctrl_dump_state( + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state); +/* end of NCI */ + +/***************************************************** + * + * Device level interface (DLI). + * + *****************************************************/ +/** + * @brief Load the register value. + * Load the value of the register of the csi rx fe. + * + * @param[in] ID The global unique ID for the ibuf-controller instance. + * @param[in] reg The offet address of the register. + * + * @return the value of the register. + */ +extern hrt_data csi_rx_fe_ctrl_reg_load( + const csi_rx_frontend_ID_t ID, + const hrt_address reg); +/** + * @brief Store a value to the register. + * Store a value to the registe of the csi rx fe. + * + * @param[in] ID The global unique ID for the ibuf-controller instance. + * @param[in] reg The offet address of the register. + * @param[in] value The value to be stored. + * + */ +extern void csi_rx_fe_ctrl_reg_store( + const csi_rx_frontend_ID_t ID, + const hrt_address reg, + const hrt_data value); +/** + * @brief Load the register value. + * Load the value of the register of the csirx be. + * + * @param[in] ID The global unique ID for the ibuf-controller instance. + * @param[in] reg The offet address of the register. + * + * @return the value of the register. + */ +extern hrt_data csi_rx_be_ctrl_reg_load( + const csi_rx_backend_ID_t ID, + const hrt_address reg); +/** + * @brief Store a value to the register. + * Store a value to the registe of the csi rx be. + * + * @param[in] ID The global unique ID for the ibuf-controller instance. + * @param[in] reg The offet address of the register. + * @param[in] value The value to be stored. + * + */ +extern void csi_rx_be_ctrl_reg_store( + const csi_rx_backend_ID_t ID, + const hrt_address reg, + const hrt_data value); +/* end of DLI */ +#endif /* USE_INPUT_SYSTEM_VERSION_2401 */ +#endif /* __CSI_RX_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h new file mode 100644 index 0000000000000..90b4ba7e023fe --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h @@ -0,0 +1,99 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DEBUG_PUBLIC_H_INCLUDED__ +#define __DEBUG_PUBLIC_H_INCLUDED__ + +#include +#include "system_types.h" + +/*! brief + * + * Simple queuing trace buffer for debug data + * instantiatable in SP DMEM + * + * The buffer has a remote and and a local store + * which contain duplicate data (when in sync). + * The buffers are automatically synched when the + * user dequeues, or manualy using the synch function + * + * An alternative (storage efficient) implementation + * could manage the buffers to contain unique data + * + * The buffer empty status is computed from local + * state which does not reflect the presence of data + * in the remote buffer (unless the alternative + * implementation is followed) + */ + +typedef struct debug_data_s debug_data_t; +typedef struct debug_data_ddr_s debug_data_ddr_t; + +extern debug_data_t *debug_data_ptr; +extern hrt_address debug_buffer_address; +extern hrt_vaddress debug_buffer_ddr_address; + +/*! Check the empty state of the local debug data buffer + + \return isEmpty(buffer) + */ +STORAGE_CLASS_DEBUG_H bool is_debug_buffer_empty(void); + +/*! Dequeue a token from the debug data buffer + + \return isEmpty(buffer)?0:buffer[head] + */ +STORAGE_CLASS_DEBUG_H hrt_data debug_dequeue(void); + +/*! Synchronise the remote buffer to the local buffer + + \return none + */ +STORAGE_CLASS_DEBUG_H void debug_synch_queue(void); + +/*! Synchronise the remote buffer to the local buffer + + \return none + */ +STORAGE_CLASS_DEBUG_H void debug_synch_queue_isp(void); + + +/*! Synchronise the remote buffer to the local buffer + + \return none + */ +STORAGE_CLASS_DEBUG_H void debug_synch_queue_ddr(void); + +/*! Set the offset/address of the (remote) debug buffer + + \return none + */ +extern void debug_buffer_init( + const hrt_address addr); + +/*! Set the offset/address of the (remote) debug buffer + + \return none + */ +extern void debug_buffer_ddr_init( + const hrt_vaddress addr); + +/*! Set the (remote) operating mode of the debug buffer + + \return none + */ +extern void debug_buffer_setmode( + const debug_buf_mode_t mode); + +#endif /* __DEBUG_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h new file mode 100644 index 0000000000000..1d5e38ffe9389 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h @@ -0,0 +1,73 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __DMA_PUBLIC_H_INCLUDED__ +#define __DMA_PUBLIC_H_INCLUDED__ + +#include "system_types.h" + +typedef struct dma_state_s dma_state_t; + +/*! Read the control registers of DMA[ID] + + \param ID[in] DMA identifier + \param state[out] input formatter state structure + + \return none, state = DMA[ID].state + */ +extern void dma_get_state( + const dma_ID_t ID, + dma_state_t *state); + +/*! Write to a control register of DMA[ID] + + \param ID[in] DMA identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, DMA[ID].ctrl[reg] = value + */ +STORAGE_CLASS_DMA_H void dma_reg_store( + const dma_ID_t ID, + const unsigned int reg, + const hrt_data value); + +/*! Read from a control register of DMA[ID] + + \param ID[in] DMA identifier + \param reg[in] register index + \param value[in] The data to be written + + \return DMA[ID].ctrl[reg] + */ +STORAGE_CLASS_DMA_H hrt_data dma_reg_load( + const dma_ID_t ID, + const unsigned int reg); + + +/*! Set maximum burst size of DMA[ID] + + \param ID[in] DMA identifier + \param conn[in] Connection to set max burst size for + \param max_burst_size[in] Maximum burst size in words + + \return none +*/ +void +dma_set_max_burst_size( + dma_ID_t ID, + dma_connection conn, + uint32_t max_burst_size); + +#endif /* __DMA_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h new file mode 100644 index 0000000000000..d95bc7070f4c2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h @@ -0,0 +1,79 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __EVENT_FIFO_PUBLIC_H +#define __EVENT_FIFO_PUBLIC_H + +#include +#include "system_types.h" + +/*! Blocking read from an event source EVENT[ID] + + \param ID[in] EVENT identifier + + \return none, dequeue(event_queue[ID]) + */ +STORAGE_CLASS_EVENT_H void event_wait_for( + const event_ID_t ID); + +/*! Conditional blocking wait for an event source EVENT[ID] + + \param ID[in] EVENT identifier + \param cnd[in] predicate + + \return none, if(cnd) dequeue(event_queue[ID]) + */ +STORAGE_CLASS_EVENT_H void cnd_event_wait_for( + const event_ID_t ID, + const bool cnd); + +/*! Blocking read from an event source EVENT[ID] + + \param ID[in] EVENT identifier + + \return dequeue(event_queue[ID]) + */ +STORAGE_CLASS_EVENT_H hrt_data event_receive_token( + const event_ID_t ID); + +/*! Blocking write to an event sink EVENT[ID] + + \param ID[in] EVENT identifier + \param token[in] token to be written on the event + + \return none, enqueue(event_queue[ID]) + */ +STORAGE_CLASS_EVENT_H void event_send_token( + const event_ID_t ID, + const hrt_data token); + +/*! Query an event source EVENT[ID] + + \param ID[in] EVENT identifier + + \return !isempty(event_queue[ID]) + */ +STORAGE_CLASS_EVENT_H bool is_event_pending( + const event_ID_t ID); + +/*! Query an event sink EVENT[ID] + + \param ID[in] EVENT identifier + + \return !isfull(event_queue[ID]) + */ +STORAGE_CLASS_EVENT_H bool can_event_send_token( + const event_ID_t ID); + +#endif /* __EVENT_FIFO_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h new file mode 100644 index 0000000000000..329f5d5049f29 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h @@ -0,0 +1,110 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __FIFO_MONITOR_PUBLIC_H_INCLUDED__ +#define __FIFO_MONITOR_PUBLIC_H_INCLUDED__ + +#include "system_types.h" + +typedef struct fifo_channel_state_s fifo_channel_state_t; +typedef struct fifo_switch_state_s fifo_switch_state_t; +typedef struct fifo_monitor_state_s fifo_monitor_state_t; + +/*! Set a fifo switch multiplex + + \param ID[in] FIFO_MONITOR identifier + \param switch_id[in] fifo switch identifier + \param sel[in] fifo switch selector + + \return none, fifo_switch[switch_id].sel = sel + */ +STORAGE_CLASS_FIFO_MONITOR_H void fifo_switch_set( + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + const hrt_data sel); + +/*! Get a fifo switch multiplex + + \param ID[in] FIFO_MONITOR identifier + \param switch_id[in] fifo switch identifier + + \return fifo_switch[switch_id].sel + */ +STORAGE_CLASS_FIFO_MONITOR_H hrt_data fifo_switch_get( + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id); + +/*! Read the state of FIFO_MONITOR[ID] + + \param ID[in] FIFO_MONITOR identifier + \param state[out] fifo monitor state structure + + \return none, state = FIFO_MONITOR[ID].state + */ +extern void fifo_monitor_get_state( + const fifo_monitor_ID_t ID, + fifo_monitor_state_t *state); + +/*! Read the state of a fifo channel + + \param ID[in] FIFO_MONITOR identifier + \param channel_id[in] fifo channel identifier + \param state[out] fifo channel state structure + + \return none, state = fifo_channel[channel_id].state + */ +extern void fifo_channel_get_state( + const fifo_monitor_ID_t ID, + const fifo_channel_t channel_id, + fifo_channel_state_t *state); + +/*! Read the state of a fifo switch + + \param ID[in] FIFO_MONITOR identifier + \param switch_id[in] fifo switch identifier + \param state[out] fifo switch state structure + + \return none, state = fifo_switch[switch_id].state + */ +extern void fifo_switch_get_state( + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + fifo_switch_state_t *state); + +/*! Write to a control register of FIFO_MONITOR[ID] + + \param ID[in] FIFO_MONITOR identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, FIFO_MONITOR[ID].ctrl[reg] = value + */ +STORAGE_CLASS_FIFO_MONITOR_H void fifo_monitor_reg_store( + const fifo_monitor_ID_t ID, + const unsigned int reg, + const hrt_data value); + +/*! Read from a control register of FIFO_MONITOR[ID] + + \param ID[in] FIFO_MONITOR identifier + \param reg[in] register index + \param value[in] The data to be written + + \return FIFO_MONITOR[ID].ctrl[reg] + */ +STORAGE_CLASS_FIFO_MONITOR_H hrt_data fifo_monitor_reg_load( + const fifo_monitor_ID_t ID, + const unsigned int reg); + +#endif /* __FIFO_MONITOR_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h new file mode 100644 index 0000000000000..d09d1e3203066 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h @@ -0,0 +1,59 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GDC_PUBLIC_H_INCLUDED__ +#define __GDC_PUBLIC_H_INCLUDED__ + +/*! Write the bicubic interpolation table of GDC[ID] + + \param ID[in] GDC identifier + \param data[in] The data matrix to be written + + \pre + - data must point to a matrix[4][HRT_GDC_N] + + \implementation dependent + - The value of "HRT_GDC_N" is device specific + - The LUT should not be partially written + - The LUT format is a quadri-phase interpolation + table. The layout is device specific + - The range of the values data[n][m] is device + specific + + \return none, GDC[ID].lut[0...3][0...HRT_GDC_N-1] = data + */ +extern void gdc_lut_store( + const gdc_ID_t ID, + const int data[4][HRT_GDC_N]); + +/*! Convert the bicubic interpolation table of GDC[ID] to the ISP-specific format + + \param ID[in] GDC identifier + \param in_lut[in] The data matrix to be converted + \param out_lut[out] The data matrix as the output of conversion + */ +extern void gdc_lut_convert_to_isp_format( + const int in_lut[4][HRT_GDC_N], + int out_lut[4][HRT_GDC_N]); + +/*! Return the integer representation of 1.0 of GDC[ID] + + \param ID[in] GDC identifier + + \return unity + */ +extern int gdc_get_unity( + const gdc_ID_t ID); + +#endif /* __GDC_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h new file mode 100644 index 0000000000000..acbce0fd658fe --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h @@ -0,0 +1,58 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_DEVICE_PUBLIC_H_INCLUDED__ +#define __GP_DEVICE_PUBLIC_H_INCLUDED__ + +#include "system_types.h" + +typedef struct gp_device_state_s gp_device_state_t; + +/*! Read the state of GP_DEVICE[ID] + + \param ID[in] GP_DEVICE identifier + \param state[out] gp device state structure + + \return none, state = GP_DEVICE[ID].state + */ +extern void gp_device_get_state( + const gp_device_ID_t ID, + gp_device_state_t *state); + +/*! Write to a control register of GP_DEVICE[ID] + + \param ID[in] GP_DEVICE identifier + \param reg_addr[in] register byte address + \param value[in] The data to be written + + \return none, GP_DEVICE[ID].ctrl[reg] = value + */ +STORAGE_CLASS_GP_DEVICE_H void gp_device_reg_store( + const gp_device_ID_t ID, + const unsigned int reg_addr, + const hrt_data value); + +/*! Read from a control register of GP_DEVICE[ID] + + \param ID[in] GP_DEVICE identifier + \param reg_addr[in] register byte address + \param value[in] The data to be written + + \return GP_DEVICE[ID].ctrl[reg] + */ +STORAGE_CLASS_GP_DEVICE_H hrt_data gp_device_reg_load( + const gp_device_ID_t ID, + const hrt_address reg_addr); + +#endif /* __GP_DEVICE_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h new file mode 100644 index 0000000000000..276e2fa9b1e78 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h @@ -0,0 +1,34 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GP_TIMER_PUBLIC_H_INCLUDED__ +#define __GP_TIMER_PUBLIC_H_INCLUDED__ + +#include "system_types.h" + +/*! initialize mentioned timer +param ID timer_id +*/ +extern void +gp_timer_init(gp_timer_ID_t ID); + + +/*! read timer value for (platform selected)selected timer. +param ID timer_id + \return uint32_t 32 bit timer value +*/ +extern uint32_t +gp_timer_read(gp_timer_ID_t ID); + +#endif /* __GP_TIMER_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h new file mode 100644 index 0000000000000..82eaa0d48bee5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __GPIO_PUBLIC_H_INCLUDED__ +#define __GPIO_PUBLIC_H_INCLUDED__ + +#include "system_types.h" + +/*! Write to a control register of GPIO[ID] + + \param ID[in] GPIO identifier + \param reg_addr[in] register byte address + \param value[in] The data to be written + + \return none, GPIO[ID].ctrl[reg] = value + */ +STORAGE_CLASS_GPIO_H void gpio_reg_store( + const gpio_ID_t ID, + const unsigned int reg_addr, + const hrt_data value); + +/*! Read from a control register of GPIO[ID] + + \param ID[in] GPIO identifier + \param reg_addr[in] register byte address + \param value[in] The data to be written + + \return GPIO[ID].ctrl[reg] + */ +STORAGE_CLASS_GPIO_H hrt_data gpio_reg_load( + const gpio_ID_t ID, + const unsigned int reg_addr); + +#endif /* __GPIO_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h new file mode 100644 index 0000000000000..8538f86ab5e61 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __HMEM_PUBLIC_H_INCLUDED__ +#define __HMEM_PUBLIC_H_INCLUDED__ + +#include /* size_t */ + +/*! Return the size of HMEM[ID] + + \param ID[in] HMEM identifier + + \Note: The size is the byte size of the area it occupies + in the address map. I.e. disregarding internal structure + + \return sizeof(HMEM[ID]) + */ +STORAGE_CLASS_HMEM_H size_t sizeof_hmem( + const hmem_ID_t ID); + +#endif /* __HMEM_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h new file mode 100644 index 0000000000000..98ee9947fb8ef --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h @@ -0,0 +1,93 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IBUF_CTRL_PUBLIC_H_INCLUDED__ +#define __IBUF_CTRL_PUBLIC_H_INCLUDED__ + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +/***************************************************** + * + * Native command interface (NCI). + * + *****************************************************/ +/** + * @brief Get the ibuf-controller state. + * Get the state of the ibuf-controller regiester-set. + * + * @param[in] id The global unique ID of the input-buffer controller. + * @param[out] state Point to the register-state. + */ +STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_state( + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state); + +/** + * @brief Get the state of the ibuf-controller process. + * Get the state of the register set per buf-controller process. + * + * @param[in] id The global unique ID of the input-buffer controller. + * @param[in] proc_id The process ID. + * @param[out] state Point to the process state. + */ +STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_proc_state( + const ibuf_ctrl_ID_t ID, + const uint32_t proc_id, + ibuf_ctrl_proc_state_t *state); +/** + * @brief Dump the ibuf-controller state. + * Dump the state of the ibuf-controller regiester-set. + * + * @param[in] id The global unique ID of the input-buffer controller. + * @param[in] state Pointer to the register-state. + */ +STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_dump_state( + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state); +/* end of NCI */ + +/***************************************************** + * + * Device level interface (DLI). + * + *****************************************************/ +/** + * @brief Load the register value. + * Load the value of the register of the ibuf-controller. + * + * @param[in] ID The global unique ID for the ibuf-controller instance. + * @param[in] reg The offet address of the register. + * + * @return the value of the register. + */ +STORAGE_CLASS_IBUF_CTRL_H hrt_data ibuf_ctrl_reg_load( + const ibuf_ctrl_ID_t ID, + const hrt_address reg); + +/** + * @brief Store a value to the register. + * Store a value to the registe of the ibuf-controller. + * + * @param[in] ID The global unique ID for the ibuf-controller instance. + * @param[in] reg The offet address of the register. + * @param[in] value The value to be stored. + * + */ +STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_reg_store( + const ibuf_ctrl_ID_t ID, + const hrt_address reg, + const hrt_data value); +/* end of DLI */ + +#endif /* USE_INPUT_SYSTEM_VERSION_2401 */ +#endif /* __IBUF_CTRL_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h new file mode 100644 index 0000000000000..2db70893daf9c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h @@ -0,0 +1,115 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_FORMATTER_PUBLIC_H_INCLUDED__ +#define __INPUT_FORMATTER_PUBLIC_H_INCLUDED__ + +#include +#include "system_types.h" + +/*! Reset INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + + \return none, reset(INPUT_FORMATTER[ID]) + */ +extern void input_formatter_rst( + const input_formatter_ID_t ID); + +/*! Set the blocking mode of INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + \param enable[in] blocking enable flag + + \use + - In HW, the capture unit will deliver an infinite stream of frames, + the input formatter will synchronise on the first SOF. In simulation + there are only a fixed number of frames, presented only once. By + enabling blocking the inputformatter will wait on the first presented + frame, thus avoiding race in the simulation setup. + + \return none, INPUT_FORMATTER[ID].blocking_mode = enable + */ +extern void input_formatter_set_fifo_blocking_mode( + const input_formatter_ID_t ID, + const bool enable); + +/*! Return the data alignment of INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + + \return alignment(INPUT_FORMATTER[ID].data) + */ +extern unsigned int input_formatter_get_alignment( + const input_formatter_ID_t ID); + +/*! Read the source switch state into INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + \param state[out] input formatter switch state structure + + \return none, state = INPUT_FORMATTER[ID].switch_state + */ +extern void input_formatter_get_switch_state( + const input_formatter_ID_t ID, + input_formatter_switch_state_t *state); + +/*! Read the control registers of INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + \param state[out] input formatter state structure + + \return none, state = INPUT_FORMATTER[ID].state + */ +extern void input_formatter_get_state( + const input_formatter_ID_t ID, + input_formatter_state_t *state); + +/*! Read the control registers of bin copy INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + \param state[out] input formatter state structure + + \return none, state = INPUT_FORMATTER[ID].state + */ +extern void input_formatter_bin_get_state( + const input_formatter_ID_t ID, + input_formatter_bin_state_t *state); + +/*! Write to a control register of INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + \param reg_addr[in] register byte address + \param value[in] The data to be written + + \return none, INPUT_FORMATTER[ID].ctrl[reg] = value + */ +STORAGE_CLASS_INPUT_FORMATTER_H void input_formatter_reg_store( + const input_formatter_ID_t ID, + const hrt_address reg_addr, + const hrt_data value); + +/*! Read from a control register of INPUT_FORMATTER[ID] + + \param ID[in] INPUT_FORMATTER identifier + \param reg_addr[in] register byte address + \param value[in] The data to be written + + \return INPUT_FORMATTER[ID].ctrl[reg] + */ +STORAGE_CLASS_INPUT_FORMATTER_H hrt_data input_formatter_reg_load( + const input_formatter_ID_t ID, + const unsigned int reg_addr); + +#endif /* __INPUT_FORMATTER_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h new file mode 100644 index 0000000000000..6e37ff0fe0f91 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h @@ -0,0 +1,376 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __INPUT_SYSTEM_PUBLIC_H_INCLUDED__ +#define __INPUT_SYSTEM_PUBLIC_H_INCLUDED__ + +#include +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +#include "isys_public.h" +#else + +typedef struct input_system_state_s input_system_state_t; +typedef struct receiver_state_s receiver_state_t; + +/*! Read the state of INPUT_SYSTEM[ID] + + \param ID[in] INPUT_SYSTEM identifier + \param state[out] input system state structure + + \return none, state = INPUT_SYSTEM[ID].state + */ +extern void input_system_get_state( + const input_system_ID_t ID, + input_system_state_t *state); + +/*! Read the state of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param state[out] receiver state structure + + \return none, state = RECEIVER[ID].state + */ +extern void receiver_get_state( + const rx_ID_t ID, + receiver_state_t *state); + +/*! Flag whether a MIPI format is YUV420 + + \param mipi_format[in] MIPI format + + \return mipi_format == YUV420 + */ +extern bool is_mipi_format_yuv420( + const mipi_format_t mipi_format); + +/*! Set compression parameters for cfg[cfg_ID] of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param cfg_ID[in] Configuration identifier + \param comp[in] Compression method + \param pred[in] Predictor method + + \NOTE: the storage of compression configuration is + implementation specific. The config can be + carried either on MIPI ports or on MIPI channels + + \return none, RECEIVER[ID].cfg[cfg_ID] = {comp, pred} + */ +extern void receiver_set_compression( + const rx_ID_t ID, + const unsigned int cfg_ID, + const mipi_compressor_t comp, + const mipi_predictor_t pred); + +/*! Enable PORT[port_ID] of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param port_ID[in] mipi PORT identifier + \param cnd[in] irq predicate + + \return None, enable(RECEIVER[ID].PORT[port_ID]) + */ +extern void receiver_port_enable( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const bool cnd); + +/*! Flag if PORT[port_ID] of RECEIVER[ID] is enabled + + \param ID[in] RECEIVER identifier + \param port_ID[in] mipi PORT identifier + + \return enable(RECEIVER[ID].PORT[port_ID]) == true + */ +extern bool is_receiver_port_enabled( + const rx_ID_t ID, + const enum mipi_port_id port_ID); + +/*! Enable the IRQ channels of PORT[port_ID] of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param port_ID[in] mipi PORT identifier + \param irq_info[in] irq channels + + \return None, enable(RECEIVER[ID].PORT[port_ID].irq_info) + */ +extern void receiver_irq_enable( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info); + +/*! Return the IRQ status of PORT[port_ID] of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param port_ID[in] mipi PORT identifier + + \return RECEIVER[ID].PORT[port_ID].irq_info + */ +extern rx_irq_info_t receiver_get_irq_info( + const rx_ID_t ID, + const enum mipi_port_id port_ID); + +/*! Clear the IRQ status of PORT[port_ID] of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param port_ID[in] mipi PORT identifier + \param irq_info[in] irq status + + \return None, clear(RECEIVER[ID].PORT[port_ID].irq_info) + */ +extern void receiver_irq_clear( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info); + +/*! Write to a control register of INPUT_SYSTEM[ID] + + \param ID[in] INPUT_SYSTEM identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, INPUT_SYSTEM[ID].ctrl[reg] = value + */ +STORAGE_CLASS_INPUT_SYSTEM_H void input_system_reg_store( + const input_system_ID_t ID, + const hrt_address reg, + const hrt_data value); + +/*! Read from a control register of INPUT_SYSTEM[ID] + + \param ID[in] INPUT_SYSTEM identifier + \param reg[in] register index + \param value[in] The data to be written + + \return INPUT_SYSTEM[ID].ctrl[reg] + */ +STORAGE_CLASS_INPUT_SYSTEM_H hrt_data input_system_reg_load( + const input_system_ID_t ID, + const hrt_address reg); + +/*! Write to a control register of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, RECEIVER[ID].ctrl[reg] = value + */ +STORAGE_CLASS_INPUT_SYSTEM_H void receiver_reg_store( + const rx_ID_t ID, + const hrt_address reg, + const hrt_data value); + +/*! Read from a control register of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param reg[in] register index + \param value[in] The data to be written + + \return RECEIVER[ID].ctrl[reg] + */ +STORAGE_CLASS_INPUT_SYSTEM_H hrt_data receiver_reg_load( + const rx_ID_t ID, + const hrt_address reg); + +/*! Write to a control register of PORT[port_ID] of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param port_ID[in] mipi PORT identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, RECEIVER[ID].PORT[port_ID].ctrl[reg] = value + */ +STORAGE_CLASS_INPUT_SYSTEM_H void receiver_port_reg_store( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg, + const hrt_data value); + +/*! Read from a control register PORT[port_ID] of of RECEIVER[ID] + + \param ID[in] RECEIVER identifier + \param port_ID[in] mipi PORT identifier + \param reg[in] register index + \param value[in] The data to be written + + \return RECEIVER[ID].PORT[port_ID].ctrl[reg] + */ +STORAGE_CLASS_INPUT_SYSTEM_H hrt_data receiver_port_reg_load( + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg); + +/*! Write to a control register of SUB_SYSTEM[sub_ID] of INPUT_SYSTEM[ID] + + \param ID[in] INPUT_SYSTEM identifier + \param port_ID[in] sub system identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, INPUT_SYSTEM[ID].SUB_SYSTEM[sub_ID].ctrl[reg] = value + */ +STORAGE_CLASS_INPUT_SYSTEM_H void input_system_sub_system_reg_store( + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg, + const hrt_data value); + +/*! Read from a control register SUB_SYSTEM[sub_ID] of INPUT_SYSTEM[ID] + + \param ID[in] INPUT_SYSTEM identifier + \param port_ID[in] sub system identifier + \param reg[in] register index + \param value[in] The data to be written + + \return INPUT_SYSTEM[ID].SUB_SYSTEM[sub_ID].ctrl[reg] + */ +STORAGE_CLASS_INPUT_SYSTEM_H hrt_data input_system_sub_system_reg_load( + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg); + + + +/////////////////////////////////////////////////////////////////////////// +// +// Functions for configuration phase on input system. +// +/////////////////////////////////////////////////////////////////////////// + +// Function that resets current configuration. +// remove the argument since it should be private. +input_system_error_t input_system_configuration_reset(void); + +// Function that commits current configuration. +// remove the argument since it should be private. +input_system_error_t input_system_configuration_commit(void); + +/////////////////////////////////////////////////////////////////////////// +// +// User functions: +// (encoded generic function) +// - no checking +// - decoding name and agruments into the generic (channel) configuration +// function. +// +/////////////////////////////////////////////////////////////////////////// + + +// FIFO channel config function user + +input_system_error_t input_system_csi_fifo_channel_cfg( + uint32_t ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + target_cfg2400_t target +); + +input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( + uint32_t ch_id, + uint32_t nof_frame, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t mem_region_size, + uint32_t nof_mem_regions, + target_cfg2400_t target +); + + +// SRAM channel config function user + +input_system_error_t input_system_csi_sram_channel_cfg( + uint32_t ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t csi_mem_region_size, + uint32_t csi_nof_mem_regions, + target_cfg2400_t target +); + + +//XMEM channel config function user + +input_system_error_t input_system_csi_xmem_channel_cfg( + uint32_t ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t mem_region_size, + uint32_t nof_mem_regions, + uint32_t acq_mem_region_size, + uint32_t acq_nof_mem_regions, + target_cfg2400_t target, + uint32_t nof_xmem_buffers +); + +input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames, + input_system_csi_port_t port, + uint32_t csi_mem_region_size, + uint32_t csi_nof_mem_regions, + uint32_t acq_mem_region_size, + uint32_t acq_nof_mem_regions, + target_cfg2400_t target +); + +input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + uint32_t acq_mem_region_size, + uint32_t acq_nof_mem_regions, + target_cfg2400_t target +); + +// Non - CSI channel config function user + +input_system_error_t input_system_prbs_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames, + uint32_t seed, + uint32_t sync_gen_width, + uint32_t sync_gen_height, + uint32_t sync_gen_hblank_cycles, + uint32_t sync_gen_vblank_cycles, + target_cfg2400_t target +); + + +input_system_error_t input_system_tpg_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames,//not used yet + uint32_t x_mask, + uint32_t y_mask, + uint32_t x_delta, + uint32_t y_delta, + uint32_t xy_mask, + uint32_t sync_gen_width, + uint32_t sync_gen_height, + uint32_t sync_gen_hblank_cycles, + uint32_t sync_gen_vblank_cycles, + target_cfg2400_t target +); + + +input_system_error_t input_system_gpfifo_channel_cfg( + uint32_t ch_id, + uint32_t nof_frames, + target_cfg2400_t target +); +#endif /* #ifdef USE_INPUT_SYSTEM_VERSION_2401 */ + +#endif /* __INPUT_SYSTEM_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h new file mode 100644 index 0000000000000..9aeaf8f082d26 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h @@ -0,0 +1,184 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IRQ_PUBLIC_H_INCLUDED__ +#define __IRQ_PUBLIC_H_INCLUDED__ + +#include +#include "system_types.h" + +/*! Read the control registers of IRQ[ID] + + \param ID[in] IRQ identifier + \param state[out] irq controller state structure + + \return none, state = IRQ[ID].state + */ +extern void irq_controller_get_state( + const irq_ID_t ID, + irq_controller_state_t *state); + +/*! Write to a control register of IRQ[ID] + + \param ID[in] IRQ identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, IRQ[ID].ctrl[reg] = value + */ +STORAGE_CLASS_IRQ_H void irq_reg_store( + const irq_ID_t ID, + const unsigned int reg, + const hrt_data value); + +/*! Read from a control register of IRQ[ID] + + \param ID[in] IRQ identifier + \param reg[in] register index + \param value[in] The data to be written + + \return IRQ[ID].ctrl[reg] + */ +STORAGE_CLASS_IRQ_H hrt_data irq_reg_load( + const irq_ID_t ID, + const unsigned int reg); + +/*! Enable an IRQ channel of IRQ[ID] with a mode + + \param ID[in] IRQ (device) identifier + \param irq[in] IRQ (channel) identifier + + \return none, enable(IRQ[ID].channel[irq_ID]) + */ +extern void irq_enable_channel( + const irq_ID_t ID, + const unsigned int irq_ID); + +/*! Enable pulse interrupts for IRQ[ID] with a mode + + \param ID[in] IRQ (device) identifier + \param enable enable/disable pulse interrupts + + \return none + */ +extern void irq_enable_pulse( + const irq_ID_t ID, + bool pulse); + +/*! Disable an IRQ channel of IRQ[ID] + + \param ID[in] IRQ (device) identifier + \param irq[in] IRQ (channel) identifier + + \return none, disable(IRQ[ID].channel[irq_ID]) + */ +extern void irq_disable_channel( + const irq_ID_t ID, + const unsigned int irq); + +/*! Clear the state of all IRQ channels of IRQ[ID] + + \param ID[in] IRQ (device) identifier + + \return none, clear(IRQ[ID].channel[]) + */ +extern void irq_clear_all( + const irq_ID_t ID); + +/*! Return the ID of a signalling IRQ channel of IRQ[ID] + + \param ID[in] IRQ (device) identifier + \param irq_id[out] active IRQ (channel) identifier + + \Note: This function operates as strtok(), based on the return + state the user is informed if there are additional signalling + channels + + \return state(IRQ[ID]) + */ +extern enum hrt_isp_css_irq_status irq_get_channel_id( + const irq_ID_t ID, + unsigned int *irq_id); + +/*! Raise an interrupt on channel irq_id of device IRQ[ID] + + \param ID[in] IRQ (device) identifier + \param irq_id[in] IRQ (channel) identifier + + \return none, signal(IRQ[ID].channel[irq_id]) + */ +extern void irq_raise( + const irq_ID_t ID, + const irq_sw_channel_id_t irq_id); + +/*! Test if any IRQ channel of the virtual super IRQ has raised a signal + + \return any(VIRQ.channel[irq_ID] != 0) + */ +extern bool any_virq_signal(void); + +/*! Enable an IRQ channel of the virtual super IRQ + + \param irq[in] IRQ (channel) identifier + \param en[in] predicate channel enable + + \return none, VIRQ.channel[irq_ID].enable = en + */ +extern void cnd_virq_enable_channel( + const virq_id_t irq_ID, + const bool en); + +/*! Clear the state of all IRQ channels of the virtual super IRQ + + \return none, clear(VIRQ.channel[]) + */ +extern void virq_clear_all(void); + +/*! Clear the IRQ info state of the virtual super IRQ + + \param irq_info[in/out] The IRQ (channel) state + + \return none + */ +extern void virq_clear_info( + virq_info_t *irq_info); + +/*! Return the ID of a signalling IRQ channel of the virtual super IRQ + + \param irq_id[out] active IRQ (channel) identifier + + \Note: This function operates as strtok(), based on the return + state the user is informed if there are additional signalling + channels + + \return state(IRQ[...]) + */ +extern enum hrt_isp_css_irq_status virq_get_channel_id( + virq_id_t *irq_id); + +/*! Return the IDs of all signaling IRQ channels of the virtual super IRQ + + \param irq_info[out] all active IRQ (channel) identifiers + + \Note: Unlike "irq_get_channel_id()" this function returns all + channel signaling info. The new info is OR'd with the current + info state. N.B. this is the same as repeatedly calling the function + "irq_get_channel_id()" in a (non-blocked) handler routine + + \return (error(state(IRQ[...])) + */ +extern enum hrt_isp_css_irq_status virq_get_channel_signals( + virq_info_t *irq_info); + +#endif /* __IRQ_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h new file mode 100644 index 0000000000000..808ec050efc0f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h @@ -0,0 +1,186 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISP_PUBLIC_H_INCLUDED__ +#define __ISP_PUBLIC_H_INCLUDED__ + +#include +#include "system_types.h" + +/*! Enable or disable the program complete irq signal of ISP[ID] + + \param ID[in] SP identifier + \param cnd[in] predicate + + \return none, if(cnd) enable(ISP[ID].irq) else disable(ISP[ID].irq) + */ +extern void cnd_isp_irq_enable( + const isp_ID_t ID, + const bool cnd); + +/*! Read the state of cell ISP[ID] + + \param ID[in] ISP identifier + \param state[out] isp state structure + \param stall[out] isp stall conditions + + \return none, state = ISP[ID].state, stall = ISP[ID].stall + */ +extern void isp_get_state( + const isp_ID_t ID, + isp_state_t *state, + isp_stall_t *stall); + + +/*! Write to the status and control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, ISP[ID].sc[reg] = value + */ +STORAGE_CLASS_ISP_H void isp_ctrl_store( + const isp_ID_t ID, + const unsigned int reg, + const hrt_data value); + +/*! Read from the status and control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param value[in] The data to be written + + \return ISP[ID].sc[reg] + */ +STORAGE_CLASS_ISP_H hrt_data isp_ctrl_load( + const isp_ID_t ID, + const unsigned int reg); + +/*! Get the status of a bitfield in the control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param bit[in] The bit index to be checked + + \return (ISP[ID].sc[reg] & (1< +#include "system_types.h" + +typedef struct sp_state_s sp_state_t; +typedef struct sp_stall_s sp_stall_t; + +/*! Enable or disable the program complete irq signal of SP[ID] + + \param ID[in] SP identifier + \param cnd[in] predicate + + \return none, if(cnd) enable(SP[ID].irq) else disable(SP[ID].irq) + */ +extern void cnd_sp_irq_enable( + const sp_ID_t ID, + const bool cnd); + +/*! Read the state of cell SP[ID] + + \param ID[in] SP identifier + \param state[out] sp state structure + \param stall[out] isp stall conditions + + \return none, state = SP[ID].state, stall = SP[ID].stall + */ +extern void sp_get_state( + const sp_ID_t ID, + sp_state_t *state, + sp_stall_t *stall); + +/*! Write to the status and control register of SP[ID] + + \param ID[in] SP identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, SP[ID].sc[reg] = value + */ +STORAGE_CLASS_SP_H void sp_ctrl_store( + const sp_ID_t ID, + const hrt_address reg, + const hrt_data value); + +/*! Read from the status and control register of SP[ID] + + \param ID[in] SP identifier + \param reg[in] register index + \param value[in] The data to be written + + \return SP[ID].sc[reg] + */ +STORAGE_CLASS_SP_H hrt_data sp_ctrl_load( + const sp_ID_t ID, + const hrt_address reg); + +/*! Get the status of a bitfield in the control register of SP[ID] + + \param ID[in] SP identifier + \param reg[in] register index + \param bit[in] The bit index to be checked + + \return (SP[ID].sc[reg] & (1< +#include + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + +#ifndef __INLINE_ISYS2401_IRQ__ + +#define STORAGE_CLASS_ISYS2401_IRQ_H extern +#define STORAGE_CLASS_ISYS2401_IRQ_C extern +#include "isys_irq_public.h" + +#else /* __INLINE_ISYS2401_IRQ__ */ + +#define STORAGE_CLASS_ISYS2401_IRQ_H static inline +#define STORAGE_CLASS_ISYS2401_IRQ_C static inline +#include "isys_irq_private.h" + +#endif /* __INLINE_ISYS2401_IRQ__ */ + +#endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ + +#endif /* __IA_CSS_ISYS_IRQ_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h new file mode 100644 index 0000000000000..16fbf9d25eba7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h @@ -0,0 +1,48 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISYS_STREAM2MMIO_H_INCLUDED__ +#define __ISYS_STREAM2MMIO_H_INCLUDED__ + + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & + * inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "isys_stream2mmio_local.h" + +#ifndef __INLINE_STREAM2MMIO__ +#define STORAGE_CLASS_STREAM2MMIO_H extern +#define STORAGE_CLASS_STREAM2MMIO_C +#include "isys_stream2mmio_public.h" +#else /* __INLINE_STREAM2MMIO__ */ +#define STORAGE_CLASS_STREAM2MMIO_H static inline +#define STORAGE_CLASS_STREAM2MMIO_C static inline +#include "isys_stream2mmio_private.h" +#endif /* __INLINE_STREAM2MMIO__ */ + +#endif /* __ISYS_STREAM2MMIO_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h new file mode 100644 index 0000000000000..7c52ba54fcf17 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h @@ -0,0 +1,218 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __MATH_SUPPORT_H +#define __MATH_SUPPORT_H + +#include /* Override the definition of max/min from linux kernel*/ + +#if defined(_MSC_VER) +#include /* Override the definition of max/min from stdlib.h*/ +#endif /* _MSC_VER */ + +/* in case we have min/max/MIN/MAX macro's undefine them */ +#ifdef min +#undef min +#endif +#ifdef max +#undef max +#endif +#ifdef MIN /* also defined in include/hrt/numeric.h from SDK */ +#undef MIN +#endif +#ifdef MAX +#undef MAX +#endif +#ifdef ABS +#undef ABS +#endif + +#define IS_ODD(a) ((a) & 0x1) +#define IS_EVEN(a) (!IS_ODD(a)) + +/* force a value to a lower even value */ +#define EVEN_FLOOR(x) ((x) & ~1) + +#ifdef ISP2401 +/* If the number is odd, find the next even number */ +#define EVEN_CEIL(x) ((IS_ODD(x)) ? ((x) + 1) : (x)) + +#endif +/* A => B */ +#define IMPLIES(a, b) (!(a) || (b)) + +#define ABS(a) ((a) >= 0 ? (a) : -(a)) + +/* for preprocessor and array sizing use MIN and MAX + otherwise use min and max */ +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#ifdef ISP2401 +#define ROUND_DIV(a, b) (((b) != 0) ? ((a) + ((b) >> 1)) / (b) : 0) +#endif +#define CEIL_DIV(a, b) (((b) != 0) ? ((a) + (b) - 1) / (b) : 0) +#define CEIL_MUL(a, b) (CEIL_DIV(a, b) * (b)) +#define CEIL_MUL2(a, b) (((a) + (b) - 1) & ~((b) - 1)) +#define CEIL_SHIFT(a, b) (((a) + (1 << (b)) - 1)>>(b)) +#define CEIL_SHIFT_MUL(a, b) (CEIL_SHIFT(a, b) << (b)) +#ifdef ISP2401 +#define ROUND_HALF_DOWN_DIV(a, b) (((b) != 0) ? ((a) + (b / 2) - 1) / (b) : 0) +#define ROUND_HALF_DOWN_MUL(a, b) (ROUND_HALF_DOWN_DIV(a, b) * (b)) +#endif + + +/*To Find next power of 2 number from x */ +#define bit2(x) ((x) | ((x) >> 1)) +#define bit4(x) (bit2(x) | (bit2(x) >> 2)) +#define bit8(x) (bit4(x) | (bit4(x) >> 4)) +#define bit16(x) (bit8(x) | (bit8(x) >> 8)) +#define bit32(x) (bit16(x) | (bit16(x) >> 16)) +#define NEXT_POWER_OF_2(x) (bit32(x-1) + 1) + + +/* min and max should not be macros as they will evaluate their arguments twice. + if you really need a macro (e.g. for CPP or for initializing an array) + use MIN() and MAX(), otherwise use min() and max(). + + +*/ + +#if !defined(PIPE_GENERATION) + +#ifndef INLINE_MATH_SUPPORT_UTILS +/* +This macro versions are added back as we are mixing types in usage of inline. +This causes corner cases of calculations to be incorrect due to conversions +between signed and unsigned variables or overflows. +Before the addition of the inline functions, max, min and ceil_div were macros +and therefore adding them back. + +Leaving out the other math utility functions as they are newly added +*/ + +#define max(a, b) (MAX(a, b)) +#define min(a, b) (MIN(a, b)) +#define ceil_div(a, b) (CEIL_DIV(a, b)) + +#else /* !defined(INLINE_MATH_SUPPORT_UTILS) */ + +static inline int max(int a, int b) +{ + return MAX(a, b); +} + +static inline int min(int a, int b) +{ + return MIN(a, b); +} + +static inline unsigned int ceil_div(unsigned int a, unsigned int b) +{ + return CEIL_DIV(a, b); +} +#endif /* !defined(INLINE_MATH_SUPPORT_UTILS) */ + +static inline unsigned int umax(unsigned int a, unsigned int b) +{ + return MAX(a, b); +} + +static inline unsigned int umin(unsigned int a, unsigned int b) +{ + return MIN(a, b); +} + + +static inline unsigned int ceil_mul(unsigned int a, unsigned int b) +{ + return CEIL_MUL(a, b); +} + +static inline unsigned int ceil_mul2(unsigned int a, unsigned int b) +{ + return CEIL_MUL2(a, b); +} + +static inline unsigned int ceil_shift(unsigned int a, unsigned int b) +{ + return CEIL_SHIFT(a, b); +} + +static inline unsigned int ceil_shift_mul(unsigned int a, unsigned int b) +{ + return CEIL_SHIFT_MUL(a, b); +} + +#ifdef ISP2401 +static inline unsigned int round_half_down_div(unsigned int a, unsigned int b) +{ + return ROUND_HALF_DOWN_DIV(a, b); +} + +static inline unsigned int round_half_down_mul(unsigned int a, unsigned int b) +{ + return ROUND_HALF_DOWN_MUL(a, b); +} +#endif + +/* @brief Next Power of Two + * + * @param[in] unsigned number + * + * @return next power of two + * + * This function rounds input to the nearest power of 2 (2^x) + * towards infinity + * + * Input Range: 0 .. 2^(8*sizeof(int)-1) + * + * IF input is a power of 2 + * out = in + * OTHERWISE + * out = 2^(ceil(log2(in)) + * + */ + +static inline unsigned int ceil_pow2(unsigned int a) +{ + if (a == 0) { + return 1; + } + /* IF input is already a power of two*/ + else if ((!((a)&((a)-1)))) { + return a; + } + else { + unsigned int v = a; + v |= v>>1; + v |= v>>2; + v |= v>>4; + v |= v>>8; + v |= v>>16; + return (v+1); + } +} + +#endif /* !defined(PIPE_GENERATION) */ + +#if !defined(__ISP) +/* + * For SP and ISP, SDK provides the definition of OP_std_modadd. + * We need it only for host + */ +#define OP_std_modadd(base, offset, size) ((base+offset)%(size)) +#endif /* !defined(__ISP) */ + + +#endif /* __MATH_SUPPORT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h new file mode 100644 index 0000000000000..d2387812f3a6a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h @@ -0,0 +1,174 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015-2017, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __MEMORY_ACCESS_H_INCLUDED__ +#define __MEMORY_ACCESS_H_INCLUDED__ + +/*! + * \brief + * Define the public interface for virtual memory + * access functions. Access types are limited to + * those defined in + * + * The address representation is private to the system + * and represented as "hrt_vaddress" rather than a + * pointer, as the memory allocation cannot be accessed + * by dereferencing but reaquires load and store access + * functions + * + * The page table selection or virtual memory context; + * The page table base index; Is implicit. This page + * table base index must be set by the implementation + * of the access function + * + * "store" is a transfer to the system + * "load" is a transfer from the system + * + * Allocation properties can be specified by setting + * attributes (see below) in case of multiple physical + * memories the memory ID is encoded on the attribute + * + * Allocations in the same physical memory, but in a + * different (set of) page tables can be shared through + * a page table information mapping function + */ + +#include +#include "platform_support.h" /* for __func__ */ + +/* + * User provided file that defines the (sub)system address types: + * - hrt_vaddress a type that can hold the (sub)system virtual address range + */ +#include "system_types.h" + +/* + * The MMU base address is a physical address, thus the same type is used + * as for the device base address + */ +#include "device_access.h" + +#include "hmm/hmm.h" + +/*! + * \brief + * Bit masks for specialised allocation functions + * the default is "uncached", "not contiguous", + * "not page aligned" and "not cleared" + * + * Forcing alignment (usually) returns a pointer + * at an alignment boundary that is offset from + * the allocated pointer. Without storing this + * pointer/offset, we cannot free it. The memory + * manager is responsible for the bookkeeping, e.g. + * the allocation function creates a sentinel + * within the allocation referencable from the + * returned pointer/address. + */ +#define MMGR_ATTRIBUTE_MASK 0x000f +#define MMGR_ATTRIBUTE_CACHED 0x0001 +#define MMGR_ATTRIBUTE_CONTIGUOUS 0x0002 +#define MMGR_ATTRIBUTE_PAGEALIGN 0x0004 +#define MMGR_ATTRIBUTE_CLEARED 0x0008 +#define MMGR_ATTRIBUTE_UNUSED 0xfff0 + +/* #define MMGR_ATTRIBUTE_DEFAULT (MMGR_ATTRIBUTE_CACHED) */ +#define MMGR_ATTRIBUTE_DEFAULT 0 + +extern const hrt_vaddress mmgr_NULL; +extern const hrt_vaddress mmgr_EXCEPTION; + +/*! Return the address of an allocation in memory + + \param size[in] Size in bytes of the allocation + \param caller_func[in] Caller function name + \param caller_line[in] Caller function line number + + \return vaddress + */ +extern hrt_vaddress mmgr_malloc(const size_t size); + +/*! Return the address of a zero initialised allocation in memory + + \param N[in] Horizontal dimension of array + \param size[in] Vertical dimension of array Total size is N*size + + \return vaddress + */ +extern hrt_vaddress mmgr_calloc(const size_t N, const size_t size); + +/*! Return the address of an allocation in memory + + \param size[in] Size in bytes of the allocation + \param attribute[in] Bit vector specifying the properties + of the allocation including zero initialisation + + \return vaddress + */ + +extern hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attribute); + +/*! Return the address of a mapped existing allocation in memory + + \param ptr[in] Pointer to an allocation in a different + virtual memory page table, but the same + physical memory + \param size[in] Size of the memory of the pointer + \param attribute[in] Bit vector specifying the properties + of the allocation + \param context Pointer of a context provided by + client/driver for additonal parameters + needed by the implementation + \Note + This interface is tentative, limited to the desired function + the actual interface may require furhter parameters + + \return vaddress + */ +extern hrt_vaddress mmgr_mmap( + const void __user *ptr, + const size_t size, + uint16_t attribute, + void *context); + +/*! Zero initialise an allocation in memory + + \param vaddr[in] Address of an allocation + \param size[in] Size in bytes of the area to be cleared + + \return none + */ +extern void mmgr_clear(hrt_vaddress vaddr, const size_t size); + +/*! Read an array of bytes from a virtual memory address + + \param vaddr[in] Address of an allocation + \param data[out] pointer to the destination array + \param size[in] number of bytes to read + + \return none + */ +extern void mmgr_load(const hrt_vaddress vaddr, void *data, const size_t size); + +/*! Write an array of bytes to device registers or memory in the device + + \param vaddr[in] Address of an allocation + \param data[in] pointer to the source array + \param size[in] number of bytes to write + + \return none + */ +extern void mmgr_store(const hrt_vaddress vaddr, const void *data, const size_t size); + +#endif /* __MEMORY_ACCESS_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h new file mode 100644 index 0000000000000..f3b7273fed1b0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h @@ -0,0 +1,38 @@ +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#ifndef __MEMORY_REALLOC_H_INCLUDED__ +#define __MEMORY_REALLOC_H_INCLUDED__ + +/*! + * \brief + * Define the internal reallocation of private css memory + * + */ + +#include +/* + * User provided file that defines the (sub)system address types: + * - hrt_vaddress a type that can hold the (sub)system virtual address range + */ +#include "system_types.h" +#include "ia_css_err.h" + +bool reallocate_buffer( + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err); + +#endif /*__MEMORY_REALLOC_H_INCLUDED__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/misc_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/misc_support.h new file mode 100644 index 0000000000000..38db1ecef3c8d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/misc_support.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __MISC_SUPPORT_H_INCLUDED__ +#define __MISC_SUPPORT_H_INCLUDED__ + +/* suppress compiler warnings on unused variables */ +#ifndef NOT_USED +#define NOT_USED(a) ((void)(a)) +#endif + +/* Calculate the total bytes for pow(2) byte alignment */ +#define tot_bytes_for_pow2_align(pow2, cur_bytes) ((cur_bytes + (pow2 - 1)) & ~(pow2 - 1)) + +#endif /* __MISC_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h new file mode 100644 index 0000000000000..8f6f1dc40095d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __MMU_DEVICE_H_INCLUDED__ +#define __MMU_DEVICE_H_INCLUDED__ + +/* The file mmu.h already exists */ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the MMU device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "mmu_local.h" + +#include "mmu_public.h" + +#endif /* __MMU_DEVICE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h new file mode 100644 index 0000000000000..418d02382d768 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h @@ -0,0 +1,48 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __PIXELGEN_H_INCLUDED__ +#define __PIXELGEN_H_INCLUDED__ + + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & + * inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "pixelgen_local.h" + +#ifndef __INLINE_PIXELGEN__ +#define STORAGE_CLASS_PIXELGEN_H extern +#define STORAGE_CLASS_PIXELGEN_C +#include "pixelgen_public.h" +#else /* __INLINE_PIXELGEN__ */ +#define STORAGE_CLASS_PIXELGEN_H static inline +#define STORAGE_CLASS_PIXELGEN_C static inline +#include "pixelgen_private.h" +#endif /* __INLINE_PIXELGEN__ */ + +#endif /* __PIXELGEN_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h new file mode 100644 index 0000000000000..39a125ba563de --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __PLATFORM_SUPPORT_H_INCLUDED__ +#define __PLATFORM_SUPPORT_H_INCLUDED__ + +/** +* @file +* Platform specific includes and functionality. +*/ + +#include +#include +#include + +/* For definition of hrt_sleep() */ +#include "hive_isp_css_custom_host_hrt.h" + +#define UINT16_MAX USHRT_MAX +#define UINT32_MAX UINT_MAX +#define UCHAR_MAX (255) + +#define CSS_ALIGN(d, a) d __attribute__((aligned(a))) + +/* + * Put here everything __KERNEL__ specific not covered in + * "assert_support.h", "math_support.h", etc + */ + +#endif /* __PLATFORM_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h new file mode 100644 index 0000000000000..37e8116b74a4d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __PRINT_SUPPORT_H_INCLUDED__ +#define __PRINT_SUPPORT_H_INCLUDED__ + + +#include + +extern int (*sh_css_printf) (const char *fmt, va_list args); +/* depends on host supplied print function in ia_css_init() */ +static inline void ia_css_print(const char *fmt, ...) +{ + va_list ap; + if (sh_css_printf) { + va_start(ap, fmt); + sh_css_printf(fmt, ap); + va_end(ap); + } +} + +/* Start adding support for bxt tracing functions for poc. From + * bxt_sandbox/support/print_support.h. */ +/* TODO: support these macros in userspace. */ +#define PWARN(format, ...) ia_css_print("warning: ", ##__VA_ARGS__) +#define PRINT(format, ...) ia_css_print(format, ##__VA_ARGS__) +#define PERROR(format, ...) ia_css_print("error: " format, ##__VA_ARGS__) +#define PDEBUG(format, ...) ia_css_print("debug: " format, ##__VA_ARGS__) + +#endif /* __PRINT_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h new file mode 100644 index 0000000000000..aa5fadf5aadb1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __QUEUE_H_INCLUDED__ +#define __QUEUE_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and is system agnostic + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - system and cell agnostic interfaces, constants and identifiers + * - public: cell specific interfaces + * - private: cell specific inline implementations + * - global: inter cell constants and identifiers + * - local: cell specific constants and identifiers + * + */ + + +#include "queue_local.h" + +#ifndef __INLINE_QUEUE__ +#define STORAGE_CLASS_QUEUE_H extern +#define STORAGE_CLASS_QUEUE_C +/* #include "queue_public.h" */ +#include "ia_css_queue.h" +#else /* __INLINE_QUEUE__ */ +#define STORAGE_CLASS_QUEUE_H static inline +#define STORAGE_CLASS_QUEUE_C static inline +#include "queue_private.h" +#endif /* __INLINE_QUEUE__ */ + +#endif /* __QUEUE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h new file mode 100644 index 0000000000000..bd9f53e6b6800 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __RESOURCE_H_INCLUDED__ +#define __RESOURCE_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses a RESOURCE manager. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + * + */ + + +#include "system_local.h" +#include "resource_local.h" + +#ifndef __INLINE_RESOURCE__ +#define STORAGE_CLASS_RESOURCE_H extern +#define STORAGE_CLASS_RESOURCE_C +#include "resource_public.h" +#else /* __INLINE_RESOURCE__ */ +#define STORAGE_CLASS_RESOURCE_H static inline +#define STORAGE_CLASS_RESOURCE_C static inline +#include "resource_private.h" +#endif /* __INLINE_RESOURCE__ */ + +#endif /* __RESOURCE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h new file mode 100644 index 0000000000000..43cfb0cb4aa8d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SOCKET_H_INCLUDED__ +#define __SOCKET_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the DMA device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + * + */ + + +#include "system_local.h" +#include "socket_local.h" + +#ifndef __INLINE_SOCKET__ +#define STORAGE_CLASS_SOCKET_H extern +#define STORAGE_CLASS_SOCKET_C +#include "socket_public.h" +#else /* __INLINE_SOCKET__ */ +#define STORAGE_CLASS_SOCKET_H static inline +#define STORAGE_CLASS_SOCKET_C static inline +#include "socket_private.h" +#endif /* __INLINE_SOCKET__ */ + +#endif /* __SOCKET_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h new file mode 100644 index 0000000000000..8f57f2060791f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SP_H_INCLUDED__ +#define __SP_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the SP cell. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "sp_local.h" + +#ifndef __INLINE_SP__ +#define STORAGE_CLASS_SP_H extern +#define STORAGE_CLASS_SP_C +#include "sp_public.h" +#else /* __INLINE_SP__ */ +#define STORAGE_CLASS_SP_H static inline +#define STORAGE_CLASS_SP_C static inline +#include "sp_private.h" +#endif /* __INLINE_SP__ */ + +#endif /* __SP_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h new file mode 100644 index 0000000000000..f4d9674cdab64 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h @@ -0,0 +1,165 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __STRING_SUPPORT_H_INCLUDED__ +#define __STRING_SUPPORT_H_INCLUDED__ +#include +#include + +#if !defined(_MSC_VER) +/* + * For all non microsoft cases, we need the following functions + */ + + +/* @brief Copy from src_buf to dest_buf. + * + * @param[out] dest_buf. Destination buffer to copy to + * @param[in] dest_size. The size of the destination buffer in bytes + * @param[in] src_buf. The source buffer + * @param[in] src_size. The size of the source buffer in bytes + * @return 0 on success, error code on failure + * @return EINVAL on Invalid arguments + * @return ERANGE on Destination size too small + */ +static inline int memcpy_s( + void* dest_buf, + size_t dest_size, + const void* src_buf, + size_t src_size) +{ + if ((src_buf == NULL) || (dest_buf == NULL)) { + /* Invalid arguments*/ + return EINVAL; + } + + if ((dest_size < src_size) || (src_size == 0)) { + /* Destination too small*/ + return ERANGE; + } + + memcpy(dest_buf, src_buf, src_size); + return 0; +} + +/* @brief Get the length of the string, excluding the null terminator + * + * @param[in] src_str. The source string + * @param[in] max_len. Look only for max_len bytes in the string + * @return Return the string length excluding null character + * @return Return max_len if no null character in the first max_len bytes + * @return Returns 0 if src_str is NULL + */ +static size_t strnlen_s( + const char* src_str, + size_t max_len) +{ + size_t ix; + if (src_str == NULL) { + /* Invalid arguments*/ + return 0; + } + + for (ix = 0; ix < max_len && src_str[ix] != '\0'; ix++) + ; + + /* On Error, it will return src_size == max_len*/ + return ix; +} + +/* @brief Copy string from src_str to dest_str + * + * @param[out] dest_str. Destination buffer to copy to + * @param[in] dest_size. The size of the destination buffer in bytes + * @param[in] src_str. The source buffer + * @param[in] src_size. The size of the source buffer in bytes + * @return Returns 0 on success + * @return Returns EINVAL on invalid arguments + * @return Returns ERANGE on destination size too small + */ +static inline int strncpy_s( + char* dest_str, + size_t dest_size, + const char* src_str, + size_t src_size) +{ + size_t len; + if (dest_str == NULL) { + /* Invalid arguments*/ + return EINVAL; + } + + if ((src_str == NULL) || (dest_size == 0)) { + /* Invalid arguments*/ + dest_str[0] = '\0'; + return EINVAL; + } + + len = strnlen_s(src_str, src_size); + + if (len >= dest_size) { + /* Destination too small*/ + dest_str[0] = '\0'; + return ERANGE; + } + + /* dest_str is big enough for the len */ + strncpy(dest_str, src_str, len); + dest_str[len] = '\0'; + return 0; +} + +/* @brief Copy string from src_str to dest_str + * + * @param[out] dest_str. Destination buffer to copy to + * @param[in] dest_size. The size of the destination buffer in bytes + * @param[in] src_str. The source buffer + * @return Returns 0 on success + * @return Returns EINVAL on invalid arguments + * @return Returns ERANGE on destination size too small + */ +static inline int strcpy_s( + char* dest_str, + size_t dest_size, + const char* src_str) +{ + size_t len; + if (dest_str == NULL) { + /* Invalid arguments*/ + return EINVAL; + } + + if ((src_str == NULL) || (dest_size == 0)) { + /* Invalid arguments*/ + dest_str[0] = '\0'; + return EINVAL; + } + + len = strnlen_s(src_str, dest_size); + + if (len >= dest_size) { + /* Destination too small*/ + dest_str[0] = '\0'; + return ERANGE; + } + + /* dest_str is big enough for the len */ + strncpy(dest_str, src_str, len); + dest_str[len] = '\0'; + return 0; +} + +#endif /*!defined(_MSC_VER)*/ + +#endif /* __STRING_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h new file mode 100644 index 0000000000000..a8c19cee17da2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h @@ -0,0 +1,25 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#ifndef __SYSTEM_TYPES_H_INCLUDED__ +#define __SYSTEM_TYPES_H_INCLUDED__ + +/** +* @file +* Platform specific types. +*/ + + +#include "system_local.h" + +#endif /* __SYSTEM_TYPES_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h new file mode 100644 index 0000000000000..ace6956433698 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TAG_H_INCLUDED__ +#define __TAG_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and is system agnostic + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: cell specific interfaces + * - private: cell specific inline implementations + * - global: inter cell constants and identifiers + * - local: cell specific constants and identifiers + * + */ + + +#include "tag_local.h" + +#ifndef __INLINE_TAG__ +#define STORAGE_CLASS_TAG_H extern +#define STORAGE_CLASS_TAG_C +#include "tag_public.h" +#else /* __INLINE_TAG__ */ +#define STORAGE_CLASS_TAG_H static inline +#define STORAGE_CLASS_TAG_C static inline +#include "tag_private.h" +#endif /* __INLINE_TAG__ */ + +#endif /* __TAG_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h new file mode 100644 index 0000000000000..f6bc1c47553f4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TIMED_CTRL_H_INCLUDED__ +#define __TIMED_CTRL_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the input system device(s). It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "timed_ctrl_local.h" + +#ifndef __INLINE_TIMED_CTRL__ +#define STORAGE_CLASS_TIMED_CTRL_H extern +#define STORAGE_CLASS_TIMED_CTRL_C +#include "timed_ctrl_public.h" +#else /* __INLINE_TIMED_CTRL__ */ +#define STORAGE_CLASS_TIMED_CTRL_H static inline +#define STORAGE_CLASS_TIMED_CTRL_C static inline +#include "timed_ctrl_private.h" +#endif /* __INLINE_TIMED_CTRL__ */ + +#endif /* __TIMED_CTRL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/type_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/type_support.h new file mode 100644 index 0000000000000..bc77537fa73af --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/type_support.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TYPE_SUPPORT_H_INCLUDED__ +#define __TYPE_SUPPORT_H_INCLUDED__ + +/** +* @file +* Platform specific types. +* +* Per the DLI spec, types are in "type_support.h" and +* "platform_support.h" is for unclassified/to be refactored +* platform specific definitions. +*/ + +#define IA_CSS_UINT8_T_BITS 8 +#define IA_CSS_UINT16_T_BITS 16 +#define IA_CSS_UINT32_T_BITS 32 +#define IA_CSS_INT32_T_BITS 32 +#define IA_CSS_UINT64_T_BITS 64 + +#define CHAR_BIT (8) + +#include +#include +#include +#define HOST_ADDRESS(x) (unsigned long)(x) + +#endif /* __TYPE_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h new file mode 100644 index 0000000000000..82d447bf9704e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VAMEM_H_INCLUDED__ +#define __VAMEM_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the VAMEM device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "vamem_local.h" + +#ifndef __INLINE_VAMEM__ +#define STORAGE_CLASS_VAMEM_H extern +#define STORAGE_CLASS_VAMEM_C +#include "vamem_public.h" +#else /* __INLINE_VAMEM__ */ +#define STORAGE_CLASS_VAMEM_H static inline +#define STORAGE_CLASS_VAMEM_C static inline +#include "vamem_private.h" +#endif /* __INLINE_VAMEM__ */ + +#endif /* __VAMEM_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h new file mode 100644 index 0000000000000..d3375729c4415 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VMEM_H_INCLUDED__ +#define __VMEM_H_INCLUDED__ + +/* + * This file is included on every cell {SP,ISP,host} and on every system + * that uses the VMEM device. It defines the API to DLI bridge + * + * System and cell specific interfaces and inline code are included + * conditionally through Makefile path settings. + * + * - . system and cell agnostic interfaces, constants and identifiers + * - public: system agnostic, cell specific interfaces + * - private: system dependent, cell specific interfaces & inline implementations + * - global: system specific constants and identifiers + * - local: system and cell specific constants and identifiers + */ + + +#include "system_local.h" +#include "vmem_local.h" + +#ifndef __INLINE_VMEM__ +#define STORAGE_CLASS_VMEM_H extern +#define STORAGE_CLASS_VMEM_C +#include "vmem_public.h" +#else /* __INLINE_VMEM__ */ +#define STORAGE_CLASS_VMEM_H static inline +#define STORAGE_CLASS_VMEM_C static inline +#include "vmem_private.h" +#endif /* __INLINE_VMEM__ */ + +#endif /* __VMEM_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_local.h new file mode 100644 index 0000000000000..9f4060319b4b3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_local.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __QUEUE_LOCAL_H_INCLUDED__ +#define __QUEUE_LOCAL_H_INCLUDED__ + +#include "queue_global.h" + +#endif /* __QUEUE_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_private.h new file mode 100644 index 0000000000000..2b396955cdadf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_private.h @@ -0,0 +1,18 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __QUEUE_PRIVATE_H_INCLUDED__ +#define __QUEUE_PRIVATE_H_INCLUDED__ + +#endif /* __QUEUE_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c new file mode 100644 index 0000000000000..2cf1d58941bfc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c @@ -0,0 +1,95 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "tag.h" +#include /* NULL */ +#include +#include "tag_local.h" + +/* + * @brief Creates the tag description from the given parameters. + * @param[in] num_captures + * @param[in] skip + * @param[in] offset + * @param[out] tag_descr + */ +void +sh_css_create_tag_descr(int num_captures, + unsigned int skip, + int offset, + unsigned int exp_id, + struct sh_css_tag_descr *tag_descr) +{ + assert(tag_descr != NULL); + + tag_descr->num_captures = num_captures; + tag_descr->skip = skip; + tag_descr->offset = offset; + tag_descr->exp_id = exp_id; +} + +/* + * @brief Encodes the members of tag description into a 32-bit value. + * @param[in] tag Pointer to the tag description + * @return (unsigned int) Encoded 32-bit tag-info + */ +unsigned int +sh_css_encode_tag_descr(struct sh_css_tag_descr *tag) +{ + int num_captures; + unsigned int num_captures_sign; + unsigned int skip; + int offset; + unsigned int offset_sign; + unsigned int exp_id; + unsigned int encoded_tag; + + assert(tag != NULL); + + if (tag->num_captures < 0) { + num_captures = -tag->num_captures; + num_captures_sign = 1; + } else { + num_captures = tag->num_captures; + num_captures_sign = 0; + } + skip = tag->skip; + if (tag->offset < 0) { + offset = -tag->offset; + offset_sign = 1; + } else { + offset = tag->offset; + offset_sign = 0; + } + exp_id = tag->exp_id; + + if (exp_id != 0) + { + /* we encode either an exp_id or capture data */ + assert((num_captures == 0) && (skip == 0) && (offset == 0)); + + encoded_tag = TAG_EXP | (exp_id & 0xFF) << TAG_EXP_ID_SHIFT; + } + else + { + encoded_tag = TAG_CAP + | ((num_captures_sign & 0x00000001) << TAG_NUM_CAPTURES_SIGN_SHIFT) + | ((offset_sign & 0x00000001) << TAG_OFFSET_SIGN_SHIFT) + | ((num_captures & 0x000000FF) << TAG_NUM_CAPTURES_SHIFT) + | ((skip & 0x000000FF) << TAG_OFFSET_SHIFT) + | ((offset & 0x000000FF) << TAG_SKIP_SHIFT); + + } + return encoded_tag; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_local.h new file mode 100644 index 0000000000000..01a8977c189e9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_local.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TAG_LOCAL_H_INCLUDED__ +#define __TAG_LOCAL_H_INCLUDED__ + +#include "tag_global.h" + +#define SH_CSS_MINIMUM_TAG_ID (-1) + +#endif /* __TAG_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_private.h new file mode 100644 index 0000000000000..0570a95ec5bf2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_private.h @@ -0,0 +1,18 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TAG_PRIVATE_H_INCLUDED__ +#define __TAG_PRIVATE_H_INCLUDED__ + +#endif /* __TAG_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h new file mode 100644 index 0000000000000..61330daab7344 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h @@ -0,0 +1,19 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __QUEUE_GLOBAL_H_INCLUDED__ +#define __QUEUE_GLOBAL_H_INCLUDED__ + +#endif /* __QUEUE_GLOBAL_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h new file mode 100644 index 0000000000000..c0d2efadbbe3d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SW_EVENT_GLOBAL_H_INCLUDED__ +#define __SW_EVENT_GLOBAL_H_INCLUDED__ + +#define MAX_NR_OF_PAYLOADS_PER_SW_EVENT 4 + +enum ia_css_psys_sw_event { + IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, /* from host to SP */ + IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, /* from SP to host */ + IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, /* from SP to host, one way only */ + IA_CSS_PSYS_SW_EVENT_START_STREAM, + IA_CSS_PSYS_SW_EVENT_STOP_STREAM, + IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY, + IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, + IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE /* for extension state change enable/disable */ +}; + +enum ia_css_isys_sw_event { + IA_CSS_ISYS_SW_EVENT_EVENT_DEQUEUED +}; + +#endif /* __SW_EVENT_GLOBAL_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h new file mode 100644 index 0000000000000..fda457792c9ca --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h @@ -0,0 +1,56 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __TAG_GLOBAL_H_INCLUDED__ +#define __TAG_GLOBAL_H_INCLUDED__ + +/* offsets for encoding/decoding the tag into an uint32_t */ + +#define TAG_CAP 1 +#define TAG_EXP 2 + +#define TAG_NUM_CAPTURES_SIGN_SHIFT 6 +#define TAG_OFFSET_SIGN_SHIFT 7 +#define TAG_NUM_CAPTURES_SHIFT 8 +#define TAG_OFFSET_SHIFT 16 +#define TAG_SKIP_SHIFT 24 + +#define TAG_EXP_ID_SHIFT 8 + +/* Data structure containing the tagging information which is used in + * continuous mode to specify which frames should be captured. + * num_captures The number of RAW frames to be processed to + * YUV. Setting this to -1 will make continuous + * capture run until it is stopped. + * skip Skip N frames in between captures. This can be + * used to select a slower capture frame rate than + * the sensor output frame rate. + * offset Start the RAW-to-YUV processing at RAW buffer + * with this offset. This allows the user to + * process RAW frames that were captured in the + * past or future. + * exp_id Exposure id of the RAW frame to tag. + * + * NOTE: Either exp_id = 0 or all other fields are 0 + * (so yeah, this could be a union) + */ + +struct sh_css_tag_descr { + int num_captures; + unsigned int skip; + int offset; + unsigned int exp_id; +}; + +#endif /* __TAG_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css.h new file mode 100644 index 0000000000000..e44df6916d900 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css.h @@ -0,0 +1,57 @@ +/* Release Version: irci_stable_candrpv_0415_20150521_0458 */ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_H_ +#define _IA_CSS_H_ + +/* @file + * This file is the starting point of the CSS-API. It includes all CSS-API + * header files. + */ + +#include "ia_css_3a.h" +#include "ia_css_acc_types.h" +#include "ia_css_buffer.h" +#include "ia_css_control.h" +#include "ia_css_device_access.h" +#include "ia_css_dvs.h" +#include "ia_css_env.h" +#include "ia_css_err.h" +#include "ia_css_event_public.h" +#include "ia_css_firmware.h" +#include "ia_css_frame_public.h" +#include "ia_css_input_port.h" +#include "ia_css_irq.h" +#include "ia_css_metadata.h" +#include "ia_css_mipi.h" +#include "ia_css_pipe_public.h" +#include "ia_css_prbs.h" +#include "ia_css_properties.h" +#include "ia_css_stream_format.h" +#include "ia_css_stream_public.h" +#include "ia_css_tpg.h" +#include "ia_css_version.h" +#include "ia_css_mmu.h" +#include "ia_css_morph.h" +#include "ia_css_shading.h" +#include "ia_css_timer.h" + +/* + Please do not add code to this file. Public functionality is to be + exposed in a function/data type specific header file. + Please add to the appropriate header file or create a new one. + */ + +#endif /* _IA_CSS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h new file mode 100644 index 0000000000000..080198796ad0d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h @@ -0,0 +1,188 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_3A_H +#define __IA_CSS_3A_H + +/* @file + * This file contains types used for 3A statistics + */ + +#include +#include "ia_css_types.h" +#include "ia_css_err.h" +#include "system_global.h" + +enum ia_css_3a_tables { + IA_CSS_S3A_TBL_HI, + IA_CSS_S3A_TBL_LO, + IA_CSS_RGBY_TBL, + IA_CSS_NUM_3A_TABLES +}; + +/* Structure that holds 3A statistics in the ISP internal + * format. Use ia_css_get_3a_statistics() to translate + * this to the format used on the host (3A library). + * */ +struct ia_css_isp_3a_statistics { + union { + struct { + ia_css_ptr s3a_tbl; + } dmem; + struct { + ia_css_ptr s3a_tbl_hi; + ia_css_ptr s3a_tbl_lo; + } vmem; + } data; + struct { + ia_css_ptr rgby_tbl; + } data_hmem; + uint32_t exp_id; /** exposure id, to match statistics to a frame, + see ia_css_event_public.h for more detail. */ + uint32_t isp_config_id;/** Unique ID to track which config was actually applied to a particular frame */ + ia_css_ptr data_ptr; /** pointer to base of all data */ + uint32_t size; /** total size of all data */ + uint32_t dmem_size; + uint32_t vmem_size; /** both lo and hi have this size */ + uint32_t hmem_size; +}; +#define SIZE_OF_DMEM_STRUCT \ + (SIZE_OF_IA_CSS_PTR) + +#define SIZE_OF_VMEM_STRUCT \ + (2 * SIZE_OF_IA_CSS_PTR) + +#define SIZE_OF_DATA_UNION \ + (MAX(SIZE_OF_DMEM_STRUCT, SIZE_OF_VMEM_STRUCT)) + +#define SIZE_OF_DATA_HMEM_STRUCT \ + (SIZE_OF_IA_CSS_PTR) + +#define SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT \ + (SIZE_OF_DATA_UNION + \ + SIZE_OF_DATA_HMEM_STRUCT + \ + sizeof(uint32_t) + \ + sizeof(uint32_t) + \ + SIZE_OF_IA_CSS_PTR + \ + 4 * sizeof(uint32_t)) + +/* Map with host-side pointers to ISP-format statistics. + * These pointers can either be copies of ISP data or memory mapped + * ISP pointers. + * All of the data behind these pointers is allocated contiguously, the + * allocated pointer is stored in the data_ptr field. The other fields + * point into this one block of data. + */ +struct ia_css_isp_3a_statistics_map { + void *data_ptr; /** Pointer to start of memory */ + struct ia_css_3a_output *dmem_stats; + uint16_t *vmem_stats_hi; + uint16_t *vmem_stats_lo; + struct ia_css_bh_table *hmem_stats; + uint32_t size; /** total size in bytes of data_ptr */ + uint32_t data_allocated; /** indicate whether data_ptr + was allocated or not. */ +}; + +/* @brief Copy and translate 3A statistics from an ISP buffer to a host buffer + * @param[out] host_stats Host buffer. + * @param[in] isp_stats ISP buffer. + * @return error value if temporary memory cannot be allocated + * + * This copies 3a statistics from an ISP pointer to a host pointer and then + * translates some of the statistics, details depend on which ISP binary is + * used. + * Always use this function, never copy the buffer directly. + */ +enum ia_css_err +ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, + const struct ia_css_isp_3a_statistics *isp_stats); + +/* @brief Translate 3A statistics from ISP format to host format. + * @param[out] host_stats host-format statistics + * @param[in] isp_stats ISP-format statistics + * @return None + * + * This function translates statistics from the internal ISP-format to + * the host-format. This function does not include an additional copy + * step. + * */ +void +ia_css_translate_3a_statistics( + struct ia_css_3a_statistics *host_stats, + const struct ia_css_isp_3a_statistics_map *isp_stats); + +/* Convenience functions for alloc/free of certain datatypes */ + +/* @brief Allocate memory for the 3a statistics on the ISP + * @param[in] grid The grid. + * @return Pointer to the allocated 3a statistics buffer on the ISP +*/ +struct ia_css_isp_3a_statistics * +ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid); + +/* @brief Free the 3a statistics memory on the isp + * @param[in] me Pointer to the 3a statistics buffer on the ISP. + * @return None +*/ +void +ia_css_isp_3a_statistics_free(struct ia_css_isp_3a_statistics *me); + +/* @brief Allocate memory for the 3a statistics on the host + * @param[in] grid The grid. + * @return Pointer to the allocated 3a statistics buffer on the host +*/ +struct ia_css_3a_statistics * +ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid); + +/* @brief Free the 3a statistics memory on the host + * @param[in] me Pointer to the 3a statistics buffer on the host. + * @return None + */ +void +ia_css_3a_statistics_free(struct ia_css_3a_statistics *me); + +/* @brief Allocate a 3a statistics map structure + * @param[in] isp_stats pointer to ISP 3a statistis struct + * @param[in] data_ptr host-side pointer to ISP 3a statistics. + * @return Pointer to the allocated 3a statistics map + * + * This function allocates the ISP 3a statistics map structure + * and uses the data_ptr as base pointer to set the appropriate + * pointers to all relevant subsets of the 3a statistics (dmem, + * vmem, hmem). + * If the data_ptr is NULL, this function will allocate the host-side + * memory. This information is stored in the struct and used in the + * ia_css_isp_3a_statistics_map_free() function to determine whether + * the memory should be freed or not. + * Note that this function does not allocate or map any ISP + * memory. +*/ +struct ia_css_isp_3a_statistics_map * +ia_css_isp_3a_statistics_map_allocate( + const struct ia_css_isp_3a_statistics *isp_stats, + void *data_ptr); + +/* @brief Free the 3a statistics map + * @param[in] me Pointer to the 3a statistics map + * @return None + * + * This function frees the map struct. If the data_ptr inside it + * was allocated inside ia_css_isp_3a_statistics_map_allocate(), it + * will be freed in this function. Otherwise it will not be freed. + */ +void +ia_css_isp_3a_statistics_map_free(struct ia_css_isp_3a_statistics_map *me); + +#endif /* __IA_CSS_3A_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h new file mode 100644 index 0000000000000..138bc3bb4627e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h @@ -0,0 +1,468 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_ACC_TYPES_H +#define _IA_CSS_ACC_TYPES_H + +/* @file + * This file contains types used for acceleration + */ + +#include /* HAS_IRQ_MAP_VERSION_# */ +#include +#include +#include + +#include "ia_css_types.h" +#include "ia_css_frame_format.h" + +/* Should be included without the path. + However, that requires adding the path to numerous makefiles + that have nothing to do with isp parameters. + */ +#include "runtime/isp_param/interface/ia_css_isp_param_types.h" + +/* Types for the acceleration API. + * These should be moved to sh_css_internal.h once the old acceleration + * argument handling has been completed. + * After that, interpretation of these structures is no longer needed + * in the kernel and HAL. +*/ + +/* Type of acceleration. + */ +enum ia_css_acc_type { + IA_CSS_ACC_NONE, /** Normal binary */ + IA_CSS_ACC_OUTPUT, /** Accelerator stage on output frame */ + IA_CSS_ACC_VIEWFINDER, /** Accelerator stage on viewfinder frame */ + IA_CSS_ACC_STANDALONE, /** Stand-alone acceleration */ +}; + +/* Cells types + */ +enum ia_css_cell_type { + IA_CSS_SP0 = 0, + IA_CSS_SP1, + IA_CSS_ISP, + MAX_NUM_OF_CELLS +}; + +/* Firmware types. + */ +enum ia_css_fw_type { + ia_css_sp_firmware, /** Firmware for the SP */ + ia_css_isp_firmware, /** Firmware for the ISP */ + ia_css_bootloader_firmware, /** Firmware for the BootLoader */ + ia_css_acc_firmware /** Firmware for accelrations */ +}; + +struct ia_css_blob_descr; + +/* Blob descriptor. + * This structure describes an SP or ISP blob. + * It describes the test, data and bss sections as well as position in a + * firmware file. + * For convenience, it contains dynamic data after loading. + */ +struct ia_css_blob_info { + /** Static blob data */ + uint32_t offset; /** Blob offset in fw file */ + struct ia_css_isp_param_memory_offsets memory_offsets; /** offset wrt hdr in bytes */ + uint32_t prog_name_offset; /** offset wrt hdr in bytes */ + uint32_t size; /** Size of blob */ + uint32_t padding_size; /** total cummulative of bytes added due to section alignment */ + uint32_t icache_source; /** Position of icache in blob */ + uint32_t icache_size; /** Size of icache section */ + uint32_t icache_padding;/** bytes added due to icache section alignment */ + uint32_t text_source; /** Position of text in blob */ + uint32_t text_size; /** Size of text section */ + uint32_t text_padding; /** bytes added due to text section alignment */ + uint32_t data_source; /** Position of data in blob */ + uint32_t data_target; /** Start of data in SP dmem */ + uint32_t data_size; /** Size of text section */ + uint32_t data_padding; /** bytes added due to data section alignment */ + uint32_t bss_target; /** Start position of bss in SP dmem */ + uint32_t bss_size; /** Size of bss section */ + /** Dynamic data filled by loader */ + CSS_ALIGN(const void *code, 8); /** Code section absolute pointer within fw, code = icache + text */ + CSS_ALIGN(const void *data, 8); /** Data section absolute pointer within fw, data = data + bss */ +}; + +struct ia_css_binary_input_info { + uint32_t min_width; + uint32_t min_height; + uint32_t max_width; + uint32_t max_height; + uint32_t source; /* memory, sensor, variable */ +}; + +struct ia_css_binary_output_info { + uint32_t min_width; + uint32_t min_height; + uint32_t max_width; + uint32_t max_height; + uint32_t num_chunks; + uint32_t variable_format; +}; + +struct ia_css_binary_internal_info { + uint32_t max_width; + uint32_t max_height; +}; + +struct ia_css_binary_bds_info { + uint32_t supported_bds_factors; +}; + +struct ia_css_binary_dvs_info { + uint32_t max_envelope_width; + uint32_t max_envelope_height; +}; + +struct ia_css_binary_vf_dec_info { + uint32_t is_variable; + uint32_t max_log_downscale; +}; + +struct ia_css_binary_s3a_info { + uint32_t s3atbl_use_dmem; + uint32_t fixed_s3a_deci_log; +}; + +/* DPC related binary info */ +struct ia_css_binary_dpc_info { + uint32_t bnr_lite; /** bnr lite enable flag */ +}; + +struct ia_css_binary_iterator_info { + uint32_t num_stripes; + uint32_t row_stripes_height; + uint32_t row_stripes_overlap_lines; +}; + +struct ia_css_binary_address_info { + uint32_t isp_addresses; /* Address in ISP dmem */ + uint32_t main_entry; /* Address of entry fct */ + uint32_t in_frame; /* Address in ISP dmem */ + uint32_t out_frame; /* Address in ISP dmem */ + uint32_t in_data; /* Address in ISP dmem */ + uint32_t out_data; /* Address in ISP dmem */ + uint32_t sh_dma_cmd_ptr; /* In ISP dmem */ +}; + +struct ia_css_binary_uds_info { + uint16_t bpp; + uint16_t use_bci; + uint16_t use_str; + uint16_t woix; + uint16_t woiy; + uint16_t extra_out_vecs; + uint16_t vectors_per_line_in; + uint16_t vectors_per_line_out; + uint16_t vectors_c_per_line_in; + uint16_t vectors_c_per_line_out; + uint16_t vmem_gdc_in_block_height_y; + uint16_t vmem_gdc_in_block_height_c; + /* uint16_t padding; */ +}; + +struct ia_css_binary_pipeline_info { + uint32_t mode; + uint32_t isp_pipe_version; + uint32_t pipelining; + uint32_t c_subsampling; + uint32_t top_cropping; + uint32_t left_cropping; + uint32_t variable_resolution; +}; + +struct ia_css_binary_block_info { + uint32_t block_width; + uint32_t block_height; + uint32_t output_block_height; +}; + +/* Structure describing an ISP binary. + * It describes the capabilities of a binary, like the maximum resolution, + * support features, dma channels, uds features, etc. + * This part is to be used by the SP. + * Future refactoring should move binary properties to ia_css_binary_xinfo, + * thereby making the SP code more binary independent. + */ +struct ia_css_binary_info { + CSS_ALIGN(uint32_t id, 8); /* IA_CSS_BINARY_ID_* */ + struct ia_css_binary_pipeline_info pipeline; + struct ia_css_binary_input_info input; + struct ia_css_binary_output_info output; + struct ia_css_binary_internal_info internal; + struct ia_css_binary_bds_info bds; + struct ia_css_binary_dvs_info dvs; + struct ia_css_binary_vf_dec_info vf_dec; + struct ia_css_binary_s3a_info s3a; + struct ia_css_binary_dpc_info dpc_bnr; /** DPC related binary info */ + struct ia_css_binary_iterator_info iterator; + struct ia_css_binary_address_info addresses; + struct ia_css_binary_uds_info uds; + struct ia_css_binary_block_info block; + struct ia_css_isp_param_isp_segments mem_initializers; +/* MW: Packing (related) bools in an integer ?? */ + struct { +#ifdef ISP2401 + uint8_t luma_only; + uint8_t input_yuv; + uint8_t input_raw; +#endif + uint8_t reduced_pipe; + uint8_t vf_veceven; + uint8_t dis; + uint8_t dvs_envelope; + uint8_t uds; + uint8_t dvs_6axis; + uint8_t block_output; + uint8_t streaming_dma; + uint8_t ds; + uint8_t bayer_fir_6db; + uint8_t raw_binning; + uint8_t continuous; + uint8_t s3a; + uint8_t fpnr; + uint8_t sc; + uint8_t macc; + uint8_t output; + uint8_t ref_frame; + uint8_t tnr; + uint8_t xnr; + uint8_t params; + uint8_t ca_gdc; + uint8_t isp_addresses; + uint8_t in_frame; + uint8_t out_frame; + uint8_t high_speed; + uint8_t dpc; + uint8_t padding[2]; + } enable; + struct { +/* DMA channel ID: [0,...,HIVE_ISP_NUM_DMA_CHANNELS> */ + uint8_t ref_y_channel; + uint8_t ref_c_channel; + uint8_t tnr_channel; + uint8_t tnr_out_channel; + uint8_t dvs_coords_channel; + uint8_t output_channel; + uint8_t c_channel; + uint8_t vfout_channel; + uint8_t vfout_c_channel; + uint8_t vfdec_bits_per_pixel; + uint8_t claimed_by_isp; + uint8_t padding[2]; + } dma; +}; + +/* Structure describing an ISP binary. + * It describes the capabilities of a binary, like the maximum resolution, + * support features, dma channels, uds features, etc. + */ +struct ia_css_binary_xinfo { + /* Part that is of interest to the SP. */ + struct ia_css_binary_info sp; + + /* Rest of the binary info, only interesting to the host. */ + enum ia_css_acc_type type; + CSS_ALIGN(int32_t num_output_formats, 8); + enum ia_css_frame_format output_formats[IA_CSS_FRAME_FORMAT_NUM]; + CSS_ALIGN(int32_t num_vf_formats, 8); /** number of supported vf formats */ + enum ia_css_frame_format vf_formats[IA_CSS_FRAME_FORMAT_NUM]; /** types of supported vf formats */ + uint8_t num_output_pins; + ia_css_ptr xmem_addr; + CSS_ALIGN(const struct ia_css_blob_descr *blob, 8); + CSS_ALIGN(uint32_t blob_index, 8); + CSS_ALIGN(union ia_css_all_memory_offsets mem_offsets, 8); + CSS_ALIGN(struct ia_css_binary_xinfo *next, 8); +}; + +/* Structure describing the Bootloader (an ISP binary). + * It contains several address, either in ddr, isp_dmem or + * the entry function in icache. + */ +struct ia_css_bl_info { + uint32_t num_dma_cmds; /** Number of cmds sent by CSS */ + uint32_t dma_cmd_list; /** Dma command list sent by CSS */ + uint32_t sw_state; /** Polled from css */ + /* Entry functions */ + uint32_t bl_entry; /** The SP entry function */ +}; + +/* Structure describing the SP binary. + * It contains several address, either in ddr, sp_dmem or + * the entry function in pmem. + */ +struct ia_css_sp_info { + uint32_t init_dmem_data; /** data sect config, stored to dmem */ + uint32_t per_frame_data; /** Per frame data, stored to dmem */ + uint32_t group; /** Per pipeline data, loaded by dma */ + uint32_t output; /** SP output data, loaded by dmem */ + uint32_t host_sp_queue; /** Host <-> SP queues */ + uint32_t host_sp_com;/** Host <-> SP commands */ + uint32_t isp_started; /** Polled from sensor thread, csim only */ + uint32_t sw_state; /** Polled from css */ + uint32_t host_sp_queues_initialized; /** Polled from the SP */ + uint32_t sleep_mode; /** different mode to halt SP */ + uint32_t invalidate_tlb; /** inform SP to invalidate mmu TLB */ +#ifndef ISP2401 + uint32_t stop_copy_preview; /** suspend copy and preview pipe when capture */ +#endif + uint32_t debug_buffer_ddr_address; /** inform SP the address + of DDR debug queue */ + uint32_t perf_counter_input_system_error; /** input system perf + counter array */ +#ifdef HAS_WATCHDOG_SP_THREAD_DEBUG + uint32_t debug_wait; /** thread/pipe post mortem debug */ + uint32_t debug_stage; /** thread/pipe post mortem debug */ + uint32_t debug_stripe; /** thread/pipe post mortem debug */ +#endif + uint32_t threads_stack; /** sp thread's stack pointers */ + uint32_t threads_stack_size; /** sp thread's stack sizes */ + uint32_t curr_binary_id; /** current binary id */ + uint32_t raw_copy_line_count; /** raw copy line counter */ + uint32_t ddr_parameter_address; /** acc param ddrptr, sp dmem */ + uint32_t ddr_parameter_size; /** acc param size, sp dmem */ + /* Entry functions */ + uint32_t sp_entry; /** The SP entry function */ + uint32_t tagger_frames_addr; /** Base address of tagger state */ +}; + +/* The following #if is there because this header file is also included + by SP and ISP code but they do not need this data and HIVECC has alignment + issue with the firmware struct/union's. + More permanent solution will be to refactor this include. +*/ +#if !defined(__ISP) +/* Accelerator firmware information. + */ +struct ia_css_acc_info { + uint32_t per_frame_data; /** Dummy for now */ +}; + +/* Firmware information. + */ +union ia_css_fw_union { + struct ia_css_binary_xinfo isp; /** ISP info */ + struct ia_css_sp_info sp; /** SP info */ + struct ia_css_bl_info bl; /** Bootloader info */ + struct ia_css_acc_info acc; /** Accelerator info */ +}; + +/* Firmware information. + */ +struct ia_css_fw_info { + size_t header_size; /** size of fw header */ + CSS_ALIGN(uint32_t type, 8); + union ia_css_fw_union info; /** Binary info */ + struct ia_css_blob_info blob; /** Blob info */ + /* Dynamic part */ + struct ia_css_fw_info *next; + CSS_ALIGN(uint32_t loaded, 8); /** Firmware has been loaded */ + CSS_ALIGN(const uint8_t *isp_code, 8); /** ISP pointer to code */ + /** Firmware handle between user space and kernel */ + CSS_ALIGN(uint32_t handle, 8); + /** Sections to copy from/to ISP */ + struct ia_css_isp_param_css_segments mem_initializers; + /** Initializer for local ISP memories */ +}; + +struct ia_css_blob_descr { + const unsigned char *blob; + struct ia_css_fw_info header; + const char *name; + union ia_css_all_memory_offsets mem_offsets; +}; + +struct ia_css_acc_fw; + +/* Structure describing the SP binary of a stand-alone accelerator. + */ +struct ia_css_acc_sp { + void (*init)(struct ia_css_acc_fw *); /** init for crun */ + uint32_t sp_prog_name_offset; /** program name offset wrt hdr in bytes */ + uint32_t sp_blob_offset; /** blob offset wrt hdr in bytes */ + void *entry; /** Address of sp entry point */ + uint32_t *css_abort; /** SP dmem abort flag */ + void *isp_code; /** SP dmem address holding xmem + address of isp code */ + struct ia_css_fw_info fw; /** SP fw descriptor */ + const uint8_t *code; /** ISP pointer of allocated SP code */ +}; + +/* Acceleration firmware descriptor. + * This descriptor descibes either SP code (stand-alone), or + * ISP code (a separate pipeline stage). + */ +struct ia_css_acc_fw_hdr { + enum ia_css_acc_type type; /** Type of accelerator */ + uint32_t isp_prog_name_offset; /** program name offset wrt + header in bytes */ + uint32_t isp_blob_offset; /** blob offset wrt header + in bytes */ + uint32_t isp_size; /** Size of isp blob */ + const uint8_t *isp_code; /** ISP pointer to code */ + struct ia_css_acc_sp sp; /** Standalone sp code */ + /** Firmware handle between user space and kernel */ + uint32_t handle; + struct ia_css_data parameters; /** Current SP parameters */ +}; + +/* Firmware structure. + * This contains the header and actual blobs. + * For standalone, it contains SP and ISP blob. + * For a pipeline stage accelerator, it contains ISP code only. + * Since its members are variable size, their offsets are described in the + * header and computed using the access macros below. + */ +struct ia_css_acc_fw { + struct ia_css_acc_fw_hdr header; /** firmware header */ + /* + int8_t isp_progname[]; **< ISP program name + int8_t sp_progname[]; **< SP program name, stand-alone only + uint8_t sp_code[]; **< SP blob, stand-alone only + uint8_t isp_code[]; **< ISP blob + */ +}; + +/* Access macros for firmware */ +#define IA_CSS_ACC_OFFSET(t, f, n) ((t)((uint8_t *)(f)+(f->header.n))) +#define IA_CSS_ACC_SP_PROG_NAME(f) IA_CSS_ACC_OFFSET(const char *, f, \ + sp.sp_prog_name_offset) +#define IA_CSS_ACC_ISP_PROG_NAME(f) IA_CSS_ACC_OFFSET(const char *, f, \ + isp_prog_name_offset) +#define IA_CSS_ACC_SP_CODE(f) IA_CSS_ACC_OFFSET(uint8_t *, f, \ + sp.sp_blob_offset) +#define IA_CSS_ACC_SP_DATA(f) (IA_CSS_ACC_SP_CODE(f) + \ + (f)->header.sp.fw.blob.data_source) +#define IA_CSS_ACC_ISP_CODE(f) IA_CSS_ACC_OFFSET(uint8_t*, f,\ + isp_blob_offset) +#define IA_CSS_ACC_ISP_SIZE(f) ((f)->header.isp_size) + +/* Binary name follows header immediately */ +#define IA_CSS_EXT_ISP_PROG_NAME(f) ((const char *)(f)+(f)->blob.prog_name_offset) +#define IA_CSS_EXT_ISP_MEM_OFFSETS(f) \ + ((const struct ia_css_memory_offsets *)((const char *)(f)+(f)->blob.mem_offsets)) + +#endif /* !defined(__ISP) */ + +enum ia_css_sp_sleep_mode { + SP_DISABLE_SLEEP_MODE = 0, + SP_SLEEP_AFTER_FRAME = 1 << 0, + SP_SLEEP_AFTER_IRQ = 1 << 1 +}; +#endif /* _IA_CSS_ACC_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h new file mode 100644 index 0000000000000..a0058eac7d5a1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h @@ -0,0 +1,84 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BUFFER_H +#define __IA_CSS_BUFFER_H + +/* @file + * This file contains datastructures and types for buffers used in CSS + */ + +#include +#include "ia_css_types.h" +#include "ia_css_timer.h" + +/* Enumeration of buffer types. Buffers can be queued and de-queued + * to hand them over between IA and ISP. + */ +enum ia_css_buffer_type { + IA_CSS_BUFFER_TYPE_INVALID = -1, + IA_CSS_BUFFER_TYPE_3A_STATISTICS = 0, + IA_CSS_BUFFER_TYPE_DIS_STATISTICS, + IA_CSS_BUFFER_TYPE_LACE_STATISTICS, + IA_CSS_BUFFER_TYPE_INPUT_FRAME, + IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, + IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME, + IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, + IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME, + IA_CSS_BUFFER_TYPE_RAW_OUTPUT_FRAME, + IA_CSS_BUFFER_TYPE_CUSTOM_INPUT, + IA_CSS_BUFFER_TYPE_CUSTOM_OUTPUT, + IA_CSS_BUFFER_TYPE_METADATA, + IA_CSS_BUFFER_TYPE_PARAMETER_SET, + IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, + IA_CSS_NUM_DYNAMIC_BUFFER_TYPE, + IA_CSS_NUM_BUFFER_TYPE +}; + +/* Driver API is not SP/ISP visible, 64 bit types not supported on hivecc */ +#if !defined(__ISP) +/* Buffer structure. This is a container structure that enables content + * independent buffer queues and access functions. + */ +struct ia_css_buffer { + enum ia_css_buffer_type type; /** Buffer type. */ + unsigned int exp_id; + /** exposure id for this buffer; 0 = not available + see ia_css_event_public.h for more detail. */ + union { + struct ia_css_isp_3a_statistics *stats_3a; /** 3A statistics & optionally RGBY statistics. */ + struct ia_css_isp_dvs_statistics *stats_dvs; /** DVS statistics. */ + struct ia_css_isp_skc_dvs_statistics *stats_skc_dvs; /** SKC DVS statistics. */ + struct ia_css_frame *frame; /** Frame buffer. */ + struct ia_css_acc_param *custom_data; /** Custom buffer. */ + struct ia_css_metadata *metadata; /** Sensor metadata. */ + } data; /** Buffer data pointer. */ + uint64_t driver_cookie; /** cookie for the driver */ + struct ia_css_time_meas timing_data; /** timing data (readings from the timer) */ + struct ia_css_clock_tick isys_eof_clock_tick; /** ISYS's end of frame timer tick*/ +}; + +/* @brief Dequeue param buffers from sp2host_queue + * + * @return None + * + * This function must be called at every driver interrupt handler to prevent + * overflow of sp2host_queue. + */ +void +ia_css_dequeue_param_buffers(void); + +#endif /* !__ISP */ + +#endif /* __IA_CSS_BUFFER_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h new file mode 100644 index 0000000000000..021a313fab857 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h @@ -0,0 +1,157 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CONTROL_H +#define __IA_CSS_CONTROL_H + +/* @file + * This file contains functionality for starting and controlling CSS + */ + +#include +#include +#include +#include + +/* @brief Initialize the CSS API. + * @param[in] env Environment, provides functions to access the + * environment in which the CSS code runs. This is + * used for host side memory access and message + * printing. May not be NULL. + * @param[in] fw Firmware package containing the firmware for all + * predefined ISP binaries. + * if fw is NULL the firmware must be loaded before + * through a call of ia_css_load_firmware + * @param[in] l1_base Base index (isp2400) + * of the L1 page table. This is a physical + * address or index. + * @param[in] irq_type The type of interrupt to be used (edge or level) + * @return Returns IA_CSS_ERR_INTERNAL_ERROR in case of any + * errors and IA_CSS_SUCCESS otherwise. + * + * This function initializes the API which includes allocating and initializing + * internal data structures. This also interprets the firmware package. All + * contents of this firmware package are copied into local data structures, so + * the fw pointer could be freed after this function completes. + */ +enum ia_css_err ia_css_init( + const struct ia_css_env *env, + const struct ia_css_fw *fw, + uint32_t l1_base, + enum ia_css_irq_type irq_type); + +/* @brief Un-initialize the CSS API. + * @return None + * + * This function deallocates all memory that has been allocated by the CSS API + * Exception: if you explicitly loaded firmware through ia_css_load_firmware + * you need to call ia_css_unload_firmware to deallocate the memory reserved + * for the firmware. + * After this function is called, no other CSS functions should be called + * with the exception of ia_css_init which will re-initialize the CSS code, + * ia_css_unload_firmware to unload the firmware or ia_css_load_firmware + * to load new firmware + */ +void +ia_css_uninit(void); + +/* @brief Suspend CSS API for power down + * @return success or faulure code + * + * suspend shuts down the system by: + * unloading all the streams + * stopping SP + * performing uninit + * + * Currently stream memory is deallocated because of rmmgr issues. + * Need to come up with a bypass that will leave the streams intact. + */ +enum ia_css_err +ia_css_suspend(void); + +/* @brief Resume CSS API from power down + * @return success or failure code + * + * After a power cycle, this function will bring the CSS API back into + * a state where it can be started. + * This will re-initialize the hardware and all the streams. + * Call this function only after ia_css_suspend() has been called. + */ +enum ia_css_err +ia_css_resume(void); + +/* @brief Enable use of a separate queue for ISYS events. + * + * @param[in] enable: enable or disable use of separate ISYS event queues. + * @return error if called when SP is running. + * + * @deprecated{This is a temporary function that allows drivers to migrate to + * the use of the separate ISYS event queue. Once all drivers supports this, it + * will be made the default and this function will be removed. + * This function should only be called when the SP is not running, calling it + * when the SP is running will result in an error value being returned. } + */ +enum ia_css_err +ia_css_enable_isys_event_queue(bool enable); + +/* @brief Test whether the ISP has started. + * + * @return Boolean flag true if the ISP has started or false otherwise. + * + * Temporary function to poll whether the ISP has been started. Once it has, + * the sensor can also be started. */ +bool +ia_css_isp_has_started(void); + +/* @brief Test whether the SP has initialized. + * + * @return Boolean flag true if the SP has initialized or false otherwise. + * + * Temporary function to poll whether the SP has been initialized. Once it has, + * we can enqueue buffers. */ +bool +ia_css_sp_has_initialized(void); + +/* @brief Test whether the SP has terminated. + * + * @return Boolean flag true if the SP has terminated or false otherwise. + * + * Temporary function to poll whether the SP has been terminated. Once it has, + * we can switch mode. */ +bool +ia_css_sp_has_terminated(void); + +/* @brief start SP hardware + * + * @return IA_CSS_SUCCESS or error code upon error. + * + * It will boot the SP hardware and start multi-threading infrastructure. + * All threads will be started and blocked by semaphore. This function should + * be called before any ia_css_stream_start(). + */ +enum ia_css_err +ia_css_start_sp(void); + + +/* @brief stop SP hardware + * + * @return IA_CSS_SUCCESS or error code upon error. + * + * This function will terminate all threads and shut down SP. It should be + * called after all ia_css_stream_stop(). + */ +enum ia_css_err +ia_css_stop_sp(void); + +#endif /* __IA_CSS_CONTROL_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c new file mode 100644 index 0000000000000..21b842379accb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c @@ -0,0 +1,95 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_device_access.h" +#include /* for uint*, size_t */ +#include /* for hrt_address */ +#include /* for ia_css_hw_access_env */ +#include /* for assert */ + +static struct ia_css_hw_access_env my_env; + +void +ia_css_device_access_init(const struct ia_css_hw_access_env *env) +{ + assert(env != NULL); + + my_env = *env; +} + +uint8_t +ia_css_device_load_uint8(const hrt_address addr) +{ + return my_env.load_8(addr); +} + +uint16_t +ia_css_device_load_uint16(const hrt_address addr) +{ + return my_env.load_16(addr); +} + +uint32_t +ia_css_device_load_uint32(const hrt_address addr) +{ + return my_env.load_32(addr); +} + +uint64_t +ia_css_device_load_uint64(const hrt_address addr) +{ + assert(0); + + (void)addr; + return 0; +} + +void +ia_css_device_store_uint8(const hrt_address addr, const uint8_t data) +{ + my_env.store_8(addr, data); +} + +void +ia_css_device_store_uint16(const hrt_address addr, const uint16_t data) +{ + my_env.store_16(addr, data); +} + +void +ia_css_device_store_uint32(const hrt_address addr, const uint32_t data) +{ + my_env.store_32(addr, data); +} + +void +ia_css_device_store_uint64(const hrt_address addr, const uint64_t data) +{ + assert(0); + + (void)addr; + (void)data; +} + +void +ia_css_device_load(const hrt_address addr, void *data, const size_t size) +{ + my_env.load(addr, data, (uint32_t)size); +} + +void +ia_css_device_store(const hrt_address addr, const void *data, const size_t size) +{ + my_env.store(addr, data, (uint32_t)size); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h new file mode 100644 index 0000000000000..84a960b7abbc0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h @@ -0,0 +1,59 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_DEVICE_ACCESS_H +#define _IA_CSS_DEVICE_ACCESS_H + +/* @file + * File containing internal functions for the CSS-API to access the CSS device. + */ + +#include /* for uint*, size_t */ +#include /* for hrt_address */ +#include /* for ia_css_hw_access_env */ + +void +ia_css_device_access_init(const struct ia_css_hw_access_env *env); + +uint8_t +ia_css_device_load_uint8(const hrt_address addr); + +uint16_t +ia_css_device_load_uint16(const hrt_address addr); + +uint32_t +ia_css_device_load_uint32(const hrt_address addr); + +uint64_t +ia_css_device_load_uint64(const hrt_address addr); + +void +ia_css_device_store_uint8(const hrt_address addr, const uint8_t data); + +void +ia_css_device_store_uint16(const hrt_address addr, const uint16_t data); + +void +ia_css_device_store_uint32(const hrt_address addr, const uint32_t data); + +void +ia_css_device_store_uint64(const hrt_address addr, const uint64_t data); + +void +ia_css_device_load(const hrt_address addr, void *data, const size_t size); + +void +ia_css_device_store(const hrt_address addr, const void *data, const size_t size); + +#endif /* _IA_CSS_DEVICE_ACCESS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h new file mode 100644 index 0000000000000..1f01534964e3e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h @@ -0,0 +1,299 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DVS_H +#define __IA_CSS_DVS_H + +/* @file + * This file contains types for DVS statistics + */ + +#include +#include "ia_css_types.h" +#include "ia_css_err.h" +#include "ia_css_stream_public.h" + +enum dvs_statistics_type { + DVS_STATISTICS, + DVS2_STATISTICS, + SKC_DVS_STATISTICS +}; + + +/* Structure that holds DVS statistics in the ISP internal + * format. Use ia_css_get_dvs_statistics() to translate + * this to the format used on the host (DVS engine). + * */ +struct ia_css_isp_dvs_statistics { + ia_css_ptr hor_proj; + ia_css_ptr ver_proj; + uint32_t hor_size; + uint32_t ver_size; + uint32_t exp_id; /** see ia_css_event_public.h for more detail */ + ia_css_ptr data_ptr; /* base pointer containing all memory */ + uint32_t size; /* size of allocated memory in data_ptr */ +}; + +/* Structure that holds SKC DVS statistics in the ISP internal + * format. Use ia_css_dvs_statistics_get() to translate this to + * the format used on the host. + * */ +struct ia_css_isp_skc_dvs_statistics; + + +#define SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT \ + ((3 * SIZE_OF_IA_CSS_PTR) + \ + (4 * sizeof(uint32_t))) + +/* Map with host-side pointers to ISP-format statistics. + * These pointers can either be copies of ISP data or memory mapped + * ISP pointers. + * All of the data behind these pointers is allocatd contiguously, the + * allocated pointer is stored in the data_ptr field. The other fields + * point into this one block of data. + */ +struct ia_css_isp_dvs_statistics_map { + void *data_ptr; + int32_t *hor_proj; + int32_t *ver_proj; + uint32_t size; /* total size in bytes */ + uint32_t data_allocated; /* indicate whether data was allocated */ +}; + +union ia_css_dvs_statistics_isp { + struct ia_css_isp_dvs_statistics *p_dvs_statistics_isp; + struct ia_css_isp_skc_dvs_statistics *p_skc_dvs_statistics_isp; +}; + +union ia_css_dvs_statistics_host { + struct ia_css_dvs_statistics *p_dvs_statistics_host; + struct ia_css_dvs2_statistics *p_dvs2_statistics_host; + struct ia_css_skc_dvs_statistics *p_skc_dvs_statistics_host; +}; + +/* @brief Copy DVS statistics from an ISP buffer to a host buffer. + * @param[in] host_stats Host buffer + * @param[in] isp_stats ISP buffer + * @return error value if temporary memory cannot be allocated + * + * This may include a translation step as well depending + * on the ISP version. + * Always use this function, never copy the buffer directly. + * Note that this function uses the mem_load function from the CSS + * environment struct. + * In certain environments this may be slow. In those cases it is + * advised to map the ISP memory into a host-side pointer and use + * the ia_css_translate_dvs_statistics() function instead. + */ +enum ia_css_err +ia_css_get_dvs_statistics(struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats); + +/* @brief Translate DVS statistics from ISP format to host format + * @param[in] host_stats Host buffer + * @param[in] isp_stats ISP buffer + * @return None + * + * This function translates the dvs statistics from the ISP-internal + * format to the format used by the DVS library on the CPU. + * This function takes a host-side pointer as input. This can either + * point to a copy of the data or be a memory mapped pointer to the + * ISP memory pages. + */ +void +ia_css_translate_dvs_statistics( + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); + +/* @brief Copy DVS 2.0 statistics from an ISP buffer to a host buffer. + * @param[in] host_stats Host buffer + * @param[in] isp_stats ISP buffer + * @return error value if temporary memory cannot be allocated + * + * This may include a translation step as well depending + * on the ISP version. + * Always use this function, never copy the buffer directly. + * Note that this function uses the mem_load function from the CSS + * environment struct. + * In certain environments this may be slow. In those cases it is + * advised to map the ISP memory into a host-side pointer and use + * the ia_css_translate_dvs2_statistics() function instead. + */ +enum ia_css_err +ia_css_get_dvs2_statistics(struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats); + +/* @brief Translate DVS2 statistics from ISP format to host format + * @param[in] host_stats Host buffer + * @param[in] isp_stats ISP buffer + * @return None + * + * This function translates the dvs2 statistics from the ISP-internal + * format to the format used by the DVS2 library on the CPU. + * This function takes a host-side pointer as input. This can either + * point to a copy of the data or be a memory mapped pointer to the + * ISP memory pages. + */ +void +ia_css_translate_dvs2_statistics( + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); + +/* @brief Copy DVS statistics from an ISP buffer to a host buffer. + * @param[in] type - DVS statistics type + * @param[in] host_stats Host buffer + * @param[in] isp_stats ISP buffer + * @return None + */ +void +ia_css_dvs_statistics_get(enum dvs_statistics_type type, + union ia_css_dvs_statistics_host *host_stats, + const union ia_css_dvs_statistics_isp *isp_stats); + +/* @brief Allocate the DVS statistics memory on the ISP + * @param[in] grid The grid. + * @return Pointer to the allocated DVS statistics buffer on the ISP +*/ +struct ia_css_isp_dvs_statistics * +ia_css_isp_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid); + +/* @brief Free the DVS statistics memory on the ISP + * @param[in] me Pointer to the DVS statistics buffer on the ISP. + * @return None +*/ +void +ia_css_isp_dvs_statistics_free(struct ia_css_isp_dvs_statistics *me); + +/* @brief Allocate the DVS 2.0 statistics memory + * @param[in] grid The grid. + * @return Pointer to the allocated DVS statistics buffer on the ISP +*/ +struct ia_css_isp_dvs_statistics * +ia_css_isp_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid); + +/* @brief Free the DVS 2.0 statistics memory + * @param[in] me Pointer to the DVS statistics buffer on the ISP. + * @return None +*/ +void +ia_css_isp_dvs2_statistics_free(struct ia_css_isp_dvs_statistics *me); + +/* @brief Allocate the DVS statistics memory on the host + * @param[in] grid The grid. + * @return Pointer to the allocated DVS statistics buffer on the host +*/ +struct ia_css_dvs_statistics * +ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid); + +/* @brief Free the DVS statistics memory on the host + * @param[in] me Pointer to the DVS statistics buffer on the host. + * @return None +*/ +void +ia_css_dvs_statistics_free(struct ia_css_dvs_statistics *me); + +/* @brief Allocate the DVS coefficients memory + * @param[in] grid The grid. + * @return Pointer to the allocated DVS coefficients buffer +*/ +struct ia_css_dvs_coefficients * +ia_css_dvs_coefficients_allocate(const struct ia_css_dvs_grid_info *grid); + +/* @brief Free the DVS coefficients memory + * @param[in] me Pointer to the DVS coefficients buffer. + * @return None + */ +void +ia_css_dvs_coefficients_free(struct ia_css_dvs_coefficients *me); + +/* @brief Allocate the DVS 2.0 statistics memory on the host + * @param[in] grid The grid. + * @return Pointer to the allocated DVS 2.0 statistics buffer on the host + */ +struct ia_css_dvs2_statistics * +ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid); + +/* @brief Free the DVS 2.0 statistics memory + * @param[in] me Pointer to the DVS 2.0 statistics buffer on the host. + * @return None +*/ +void +ia_css_dvs2_statistics_free(struct ia_css_dvs2_statistics *me); + +/* @brief Allocate the DVS 2.0 coefficients memory + * @param[in] grid The grid. + * @return Pointer to the allocated DVS 2.0 coefficients buffer +*/ +struct ia_css_dvs2_coefficients * +ia_css_dvs2_coefficients_allocate(const struct ia_css_dvs_grid_info *grid); + +/* @brief Free the DVS 2.0 coefficients memory + * @param[in] me Pointer to the DVS 2.0 coefficients buffer. + * @return None +*/ +void +ia_css_dvs2_coefficients_free(struct ia_css_dvs2_coefficients *me); + +/* @brief Allocate the DVS 2.0 6-axis config memory + * @param[in] stream The stream. + * @return Pointer to the allocated DVS 6axis configuration buffer +*/ +struct ia_css_dvs_6axis_config * +ia_css_dvs2_6axis_config_allocate(const struct ia_css_stream *stream); + +/* @brief Free the DVS 2.0 6-axis config memory + * @param[in] dvs_6axis_config Pointer to the DVS 6axis configuration buffer + * @return None + */ +void +ia_css_dvs2_6axis_config_free(struct ia_css_dvs_6axis_config *dvs_6axis_config); + +/* @brief Allocate a dvs statistics map structure + * @param[in] isp_stats pointer to ISP dvs statistis struct + * @param[in] data_ptr host-side pointer to ISP dvs statistics. + * @return Pointer to the allocated dvs statistics map + * + * This function allocates the ISP dvs statistics map structure + * and uses the data_ptr as base pointer to set the appropriate + * pointers to all relevant subsets of the dvs statistics (dmem, + * vmem, hmem). + * If the data_ptr is NULL, this function will allocate the host-side + * memory. This information is stored in the struct and used in the + * ia_css_isp_dvs_statistics_map_free() function to determine whether + * the memory should be freed or not. + * Note that this function does not allocate or map any ISP + * memory. +*/ +struct ia_css_isp_dvs_statistics_map * +ia_css_isp_dvs_statistics_map_allocate( + const struct ia_css_isp_dvs_statistics *isp_stats, + void *data_ptr); + +/* @brief Free the dvs statistics map + * @param[in] me Pointer to the dvs statistics map + * @return None + * + * This function frees the map struct. If the data_ptr inside it + * was allocated inside ia_css_isp_dvs_statistics_map_allocate(), it + * will be freed in this function. Otherwise it will not be freed. + */ +void +ia_css_isp_dvs_statistics_map_free(struct ia_css_isp_dvs_statistics_map *me); + +/* @brief Allocate memory for the SKC DVS statistics on the ISP + * @return Pointer to the allocated ACC DVS statistics buffer on the ISP +*/ +struct ia_css_isp_skc_dvs_statistics *ia_css_skc_dvs_statistics_allocate(void); + +#endif /* __IA_CSS_DVS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_env.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_env.h new file mode 100644 index 0000000000000..8b0218ee658de --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_env.h @@ -0,0 +1,94 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ENV_H +#define __IA_CSS_ENV_H + +#include +#include /* va_list */ +#include "ia_css_types.h" +#include "ia_css_acc_types.h" + +/* @file + * This file contains prototypes for functions that need to be provided to the + * CSS-API host-code by the environment in which the CSS-API code runs. + */ + +/* Memory allocation attributes, for use in ia_css_css_mem_env. */ +enum ia_css_mem_attr { + IA_CSS_MEM_ATTR_CACHED = 1 << 0, + IA_CSS_MEM_ATTR_ZEROED = 1 << 1, + IA_CSS_MEM_ATTR_PAGEALIGN = 1 << 2, + IA_CSS_MEM_ATTR_CONTIGUOUS = 1 << 3, +}; + +/* Environment with function pointers for local IA memory allocation. + * This provides the CSS code with environment specific functionality + * for memory allocation of small local buffers such as local data structures. + * This is never expected to allocate more than one page of memory (4K bytes). + */ +struct ia_css_cpu_mem_env { + void (*flush)(struct ia_css_acc_fw *fw); + /** Flush function to flush the cache for given accelerator. */ +}; + +/* Environment with function pointers to access the CSS hardware. This includes + * registers and local memories. + */ +struct ia_css_hw_access_env { + void (*store_8)(hrt_address addr, uint8_t data); + /** Store an 8 bit value into an address in the CSS HW address space. + The address must be an 8 bit aligned address. */ + void (*store_16)(hrt_address addr, uint16_t data); + /** Store a 16 bit value into an address in the CSS HW address space. + The address must be a 16 bit aligned address. */ + void (*store_32)(hrt_address addr, uint32_t data); + /** Store a 32 bit value into an address in the CSS HW address space. + The address must be a 32 bit aligned address. */ + uint8_t (*load_8)(hrt_address addr); + /** Load an 8 bit value from an address in the CSS HW address + space. The address must be an 8 bit aligned address. */ + uint16_t (*load_16)(hrt_address addr); + /** Load a 16 bit value from an address in the CSS HW address + space. The address must be a 16 bit aligned address. */ + uint32_t (*load_32)(hrt_address addr); + /** Load a 32 bit value from an address in the CSS HW address + space. The address must be a 32 bit aligned address. */ + void (*store)(hrt_address addr, const void *data, uint32_t bytes); + /** Store a number of bytes into a byte-aligned address in the CSS HW address space. */ + void (*load)(hrt_address addr, void *data, uint32_t bytes); + /** Load a number of bytes from a byte-aligned address in the CSS HW address space. */ +}; + +/* Environment with function pointers to print error and debug messages. + */ +struct ia_css_print_env { + int (*debug_print)(const char *fmt, va_list args); + /** Print a debug message. */ + int (*error_print)(const char *fmt, va_list args); + /** Print an error message.*/ +}; + +/* Environment structure. This includes function pointers to access several + * features provided by the environment in which the CSS API is used. + * This is used to run the camera IP in multiple platforms such as Linux, + * Windows and several simulation environments. + */ +struct ia_css_env { + struct ia_css_cpu_mem_env cpu_mem_env; /** local flush. */ + struct ia_css_hw_access_env hw_access_env; /** CSS HW access functions */ + struct ia_css_print_env print_env; /** Message printing env. */ +}; + +#endif /* __IA_CSS_ENV_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h new file mode 100644 index 0000000000000..cf895815ea31e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h @@ -0,0 +1,63 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ERR_H +#define __IA_CSS_ERR_H + +/* @file + * This file contains possible return values for most + * functions in the CSS-API. + */ + +/* Errors, these values are used as the return value for most + * functions in this API. + */ +enum ia_css_err { + IA_CSS_SUCCESS, + IA_CSS_ERR_INTERNAL_ERROR, + IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY, + IA_CSS_ERR_INVALID_ARGUMENTS, + IA_CSS_ERR_SYSTEM_NOT_IDLE, + IA_CSS_ERR_MODE_HAS_NO_VIEWFINDER, + IA_CSS_ERR_QUEUE_IS_FULL, + IA_CSS_ERR_QUEUE_IS_EMPTY, + IA_CSS_ERR_RESOURCE_NOT_AVAILABLE, + IA_CSS_ERR_RESOURCE_LIST_TO_SMALL, + IA_CSS_ERR_RESOURCE_ITEMS_STILL_ALLOCATED, + IA_CSS_ERR_RESOURCE_EXHAUSTED, + IA_CSS_ERR_RESOURCE_ALREADY_ALLOCATED, + IA_CSS_ERR_VERSION_MISMATCH, + IA_CSS_ERR_NOT_SUPPORTED +}; + +/* FW warnings. This enum contains a value for each warning that + * the SP FW could indicate potential performance issue + */ +enum ia_css_fw_warning { + IA_CSS_FW_WARNING_NONE, + IA_CSS_FW_WARNING_ISYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the ISys queue. + This warning can be avoided by de-queing ISYS buffers more timely. */ + IA_CSS_FW_WARNING_PSYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the PSys queue. + This warning can be avoided by de-queing PSYS buffers more timely. */ + IA_CSS_FW_WARNING_CIRCBUF_ALL_LOCKED, /* < CSS system delayed because of insufficient available buffers. + This warning can be avoided by unlocking locked frame-buffers more timely. */ + IA_CSS_FW_WARNING_EXP_ID_LOCKED, /* < Exposure ID skipped because the frame associated to it was still locked. + This warning can be avoided by unlocking locked frame-buffers more timely. */ + IA_CSS_FW_WARNING_TAG_EXP_ID_FAILED, /* < Exposure ID cannot be found on the circular buffer. + This warning can be avoided by unlocking locked frame-buffers more timely. */ + IA_CSS_FW_WARNING_FRAME_PARAM_MISMATCH, /* < Frame and param pair mismatched in tagger. + This warning can be avoided by providing a param set for each frame. */ +}; + +#endif /* __IA_CSS_ERR_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h new file mode 100644 index 0000000000000..036a2f03d3bd4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h @@ -0,0 +1,196 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_EVENT_PUBLIC_H +#define __IA_CSS_EVENT_PUBLIC_H + +/* @file + * This file contains CSS-API events functionality + */ + +#include /* uint8_t */ +#include /* ia_css_err */ +#include /* ia_css_pipe */ +#include /* ia_css_timer */ + +/* The event type, distinguishes the kind of events that + * can are generated by the CSS system. + * + * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC: + * 1) "enum ia_css_event_type" (ia_css_event_public.h) + * 2) "enum sh_css_sp_event_type" (sh_css_internal.h) + * 3) "enum ia_css_event_type event_id_2_event_mask" (event_handler.sp.c) + * 4) "enum ia_css_event_type convert_event_sp_to_host_domain" (sh_css.c) + */ +enum ia_css_event_type { + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE = 1 << 0, + /** Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE = 1 << 1, + /** Second output frame ready. */ + IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE = 1 << 2, + /** Viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE = 1 << 3, + /** Second viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE = 1 << 4, + /** Indication that 3A statistics are available. */ + IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE = 1 << 5, + /** Indication that DIS statistics are available. */ + IA_CSS_EVENT_TYPE_PIPELINE_DONE = 1 << 6, + /** Pipeline Done event, sent after last pipeline stage. */ + IA_CSS_EVENT_TYPE_FRAME_TAGGED = 1 << 7, + /** Frame tagged. */ + IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE = 1 << 8, + /** Input frame ready. */ + IA_CSS_EVENT_TYPE_METADATA_DONE = 1 << 9, + /** Metadata ready. */ + IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE = 1 << 10, + /** Indication that LACE statistics are available. */ + IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE = 1 << 11, + /** Extension stage complete. */ + IA_CSS_EVENT_TYPE_TIMER = 1 << 12, + /** Timer event for measuring the SP side latencies. It contains the + 32-bit timer value from the SP */ + IA_CSS_EVENT_TYPE_PORT_EOF = 1 << 13, + /** End Of Frame event, sent when in buffered sensor mode. */ + IA_CSS_EVENT_TYPE_FW_WARNING = 1 << 14, + /** Performance warning encounter by FW */ + IA_CSS_EVENT_TYPE_FW_ASSERT = 1 << 15, + /** Assertion hit by FW */ +}; + +#define IA_CSS_EVENT_TYPE_NONE 0 + +/* IA_CSS_EVENT_TYPE_ALL is a mask for all pipe related events. + * The other events (such as PORT_EOF) cannot be enabled/disabled + * and are hence excluded from this macro. + */ +#define IA_CSS_EVENT_TYPE_ALL \ + (IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE | \ + IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE | \ + IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE | \ + IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE | \ + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE | \ + IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE | \ + IA_CSS_EVENT_TYPE_PIPELINE_DONE | \ + IA_CSS_EVENT_TYPE_FRAME_TAGGED | \ + IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE | \ + IA_CSS_EVENT_TYPE_METADATA_DONE | \ + IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE | \ + IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE) + +/* The event struct, container for the event type and its related values. + * Depending on the event type, either pipe or port will be filled. + * Pipeline related events (like buffer/frame events) will return a valid and filled pipe handle. + * For non pipeline related events (but i.e. stream specific, like EOF event), the port will be + * filled. + */ +struct ia_css_event { + struct ia_css_pipe *pipe; + /** Pipe handle on which event happened, NULL for non pipe related + events. */ + enum ia_css_event_type type; + /** Type of Event, always valid/filled. */ + uint8_t port; + /** Port number for EOF event (not valid for other events). */ + uint8_t exp_id; + /** Exposure id for EOF/FRAME_TAGGED/FW_WARNING event (not valid for other events) + The exposure ID is unique only within a logical stream and it is + only generated on systems that have an input system (such as 2400 + and 2401). + Most outputs produced by the CSS are tagged with an exposure ID. + This allows users of the CSS API to keep track of which buffer + was generated from which sensor output frame. This includes: + EOF event, output frames, 3A statistics, DVS statistics and + sensor metadata. + Exposure IDs start at IA_CSS_MIN_EXPOSURE_ID, increment by one + until IA_CSS_MAX_EXPOSURE_ID is reached, after that they wrap + around to IA_CSS_MIN_EXPOSURE_ID again. + Note that in case frames are dropped, this will not be reflected + in the exposure IDs. Therefor applications should not use this + to detect frame drops. */ + uint32_t fw_handle; + /** Firmware Handle for ACC_STAGE_COMPLETE event (not valid for other + events). */ + enum ia_css_fw_warning fw_warning; + /** Firmware warning code, only for WARNING events. */ + uint8_t fw_assert_module_id; + /** Firmware module id, only for ASSERT events, should be logged by driver. */ + uint16_t fw_assert_line_no; + /** Firmware line number, only for ASSERT events, should be logged by driver. */ + clock_value_t timer_data; + /** For storing the full 32-bit of the timer value. Valid only for TIMER + event */ + uint8_t timer_code; + /** For storing the code of the TIMER event. Valid only for + TIMER event */ + uint8_t timer_subcode; + /** For storing the subcode of the TIMER event. Valid only + for TIMER event */ +}; + +/* @brief Dequeue a PSYS event from the CSS system. + * + * @param[out] event Pointer to the event struct which will be filled by + * this function if an event is available. + * @return IA_CSS_ERR_QUEUE_IS_EMPTY if no events are + * available or + * IA_CSS_SUCCESS otherwise. + * + * This function dequeues an event from the PSYS event queue. The queue is + * between the Host CPU and the CSS system. This function can be + * called after an interrupt has been generated that signalled that a new event + * was available and can be used in a polling-like situation where the NO_EVENT + * return value is used to determine whether an event was available or not. + */ +enum ia_css_err +ia_css_dequeue_psys_event(struct ia_css_event *event); + +/* @brief Dequeue an event from the CSS system. + * + * @param[out] event Pointer to the event struct which will be filled by + * this function if an event is available. + * @return IA_CSS_ERR_QUEUE_IS_EMPTY if no events are + * available or + * IA_CSS_SUCCESS otherwise. + * + * deprecated{Use ia_css_dequeue_psys_event instead}. + * Unless the isys event queue is explicitly enabled, this function will + * dequeue both isys (EOF) and psys events (all others). + */ +enum ia_css_err +ia_css_dequeue_event(struct ia_css_event *event); + +/* @brief Dequeue an ISYS event from the CSS system. + * + * @param[out] event Pointer to the event struct which will be filled by + * this function if an event is available. + * @return IA_CSS_ERR_QUEUE_IS_EMPTY if no events are + * available or + * IA_CSS_SUCCESS otherwise. + * + * This function dequeues an event from the ISYS event queue. The queue is + * between host and the CSS system. + * Unlike the ia_css_dequeue_event() function, this function can be called + * directly from an interrupt service routine (ISR) and it is safe to call + * this function in parallel with other CSS API functions (but only one + * call to this function should be in flight at any point in time). + * + * The reason for having the ISYS events separate is to prevent them from + * incurring additional latency due to locks being held by other CSS API + * functions. + */ +enum ia_css_err +ia_css_dequeue_isys_event(struct ia_css_event *event); + +#endif /* __IA_CSS_EVENT_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h new file mode 100644 index 0000000000000..d7d7f0a995e5c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h @@ -0,0 +1,74 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FIRMWARE_H +#define __IA_CSS_FIRMWARE_H + +/* @file + * This file contains firmware loading/unloading support functionality + */ + +#include "ia_css_err.h" +#include "ia_css_env.h" + +/* CSS firmware package structure. + */ +struct ia_css_fw { + void *data; /** pointer to the firmware data */ + unsigned int bytes; /** length in bytes of firmware data */ +}; + +/* @brief Loads the firmware + * @param[in] env Environment, provides functions to access the + * environment in which the CSS code runs. This is + * used for host side memory access and message + * printing. + * @param[in] fw Firmware package containing the firmware for all + * predefined ISP binaries. + * @return Returns IA_CSS_ERR_INTERNAL_ERROR in case of any + * errors and IA_CSS_SUCCESS otherwise. + * + * This function interprets the firmware package. All + * contents of this firmware package are copied into local data structures, so + * the fw pointer could be freed after this function completes. + * + * Rationale for this function is that it can be called before ia_css_init, and thus + * speeds up ia_css_init (ia_css_init is called each time a stream is created but the + * firmware only needs to be loaded once). + */ +enum ia_css_err +ia_css_load_firmware(const struct ia_css_env *env, + const struct ia_css_fw *fw); + +/* @brief Unloads the firmware + * @return None + * + * This function unloads the firmware loaded by ia_css_load_firmware. + * It is pointless to call this function if no firmware is loaded, + * but it won't harm. Use this to deallocate all memory associated with the firmware. + */ +void +ia_css_unload_firmware(void); + +/* @brief Checks firmware version + * @param[in] fw Firmware package containing the firmware for all + * predefined ISP binaries. + * @return Returns true when the firmware version matches with the CSS + * host code version and returns false otherwise. + * This function checks if the firmware package version matches with the CSS host code version. + */ +bool +ia_css_check_firmware_version(const struct ia_css_fw *fw); + +#endif /* __IA_CSS_FIRMWARE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h new file mode 100644 index 0000000000000..e5ffc579aef1e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h @@ -0,0 +1,37 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_FRAC_H +#define _IA_CSS_FRAC_H + +/* @file + * This file contains typedefs used for fractional numbers + */ + +#include + +/* Fixed point types. + * NOTE: the 16 bit fixed point types actually occupy 32 bits + * to save on extension operations in the ISP code. + */ +/* Unsigned fixed point value, 0 integer bits, 16 fractional bits */ +typedef uint32_t ia_css_u0_16; +/* Unsigned fixed point value, 5 integer bits, 11 fractional bits */ +typedef uint32_t ia_css_u5_11; +/* Unsigned fixed point value, 8 integer bits, 8 fractional bits */ +typedef uint32_t ia_css_u8_8; +/* Signed fixed point value, 0 integer bits, 15 fractional bits */ +typedef int32_t ia_css_s0_15; + +#endif /* _IA_CSS_FRAC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_format.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_format.h new file mode 100644 index 0000000000000..2f177edc36ac5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_format.h @@ -0,0 +1,101 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FRAME_FORMAT_H +#define __IA_CSS_FRAME_FORMAT_H + +/* @file + * This file contains information about formats supported in the ISP + */ + +/* Frame formats, some of these come from fourcc.org, others are + better explained by video4linux2. The NV11 seems to be described only + on MSDN pages, but even those seem to be gone now. + Frames can come in many forms, the main categories are RAW, RGB and YUV + (or YCbCr). The YUV frames come in 4 flavors, determined by how the U and V + values are subsampled: + 1. YUV420: hor = 2, ver = 2 + 2. YUV411: hor = 4, ver = 1 + 3. YUV422: hor = 2, ver = 1 + 4. YUV444: hor = 1, ver = 1 + + Warning: not all frame formats are supported as input or output to/from ISP. + Some of these formats are therefore not defined in the output table module. + Modifications in below frame format enum can require modifications in the + output table module. + + Warning2: Throughout the CSS code assumptions are made on the order + of formats in this enumeration type, or some sort of copy is maintained. + The following files are identified: + - FileSupport.h + - css/isp/kernels/fc/fc_1.0/formats.isp.c + - css/isp/kernels/output/output_1.0/output_table.isp.c + - css/isp/kernels/output/sc_output_1.0/formats.hive.c + - css/isp/modes/interface/isp_formats.isp.h + - css/bxt_sandbox/psyspoc/interface/ia_css_pg_info.h + - css/bxt_sandbox/psysapi/data/interface/ia_css_program_group_data.h + - css/bxt_sandbox/isysapi/interface/ia_css_isysapi_fw_types.h +*/ +enum ia_css_frame_format { + IA_CSS_FRAME_FORMAT_NV11 = 0, /** 12 bit YUV 411, Y, UV plane */ + IA_CSS_FRAME_FORMAT_NV12, /** 12 bit YUV 420, Y, UV plane */ + IA_CSS_FRAME_FORMAT_NV12_16, /** 16 bit YUV 420, Y, UV plane */ + IA_CSS_FRAME_FORMAT_NV12_TILEY, /** 12 bit YUV 420, Intel proprietary tiled format, TileY */ + IA_CSS_FRAME_FORMAT_NV16, /** 16 bit YUV 422, Y, UV plane */ + IA_CSS_FRAME_FORMAT_NV21, /** 12 bit YUV 420, Y, VU plane */ + IA_CSS_FRAME_FORMAT_NV61, /** 16 bit YUV 422, Y, VU plane */ + IA_CSS_FRAME_FORMAT_YV12, /** 12 bit YUV 420, Y, V, U plane */ + IA_CSS_FRAME_FORMAT_YV16, /** 16 bit YUV 422, Y, V, U plane */ + IA_CSS_FRAME_FORMAT_YUV420, /** 12 bit YUV 420, Y, U, V plane */ + IA_CSS_FRAME_FORMAT_YUV420_16, /** yuv420, 16 bits per subpixel */ + IA_CSS_FRAME_FORMAT_YUV422, /** 16 bit YUV 422, Y, U, V plane */ + IA_CSS_FRAME_FORMAT_YUV422_16, /** yuv422, 16 bits per subpixel */ + IA_CSS_FRAME_FORMAT_UYVY, /** 16 bit YUV 422, UYVY interleaved */ + IA_CSS_FRAME_FORMAT_YUYV, /** 16 bit YUV 422, YUYV interleaved */ + IA_CSS_FRAME_FORMAT_YUV444, /** 24 bit YUV 444, Y, U, V plane */ + IA_CSS_FRAME_FORMAT_YUV_LINE, /** Internal format, 2 y lines followed + by a uvinterleaved line */ + IA_CSS_FRAME_FORMAT_RAW, /** RAW, 1 plane */ + IA_CSS_FRAME_FORMAT_RGB565, /** 16 bit RGB, 1 plane. Each 3 sub + pixels are packed into one 16 bit + value, 5 bits for R, 6 bits for G + and 5 bits for B. */ + IA_CSS_FRAME_FORMAT_PLANAR_RGB888, /** 24 bit RGB, 3 planes */ + IA_CSS_FRAME_FORMAT_RGBA888, /** 32 bit RGBA, 1 plane, A=Alpha + (alpha is unused) */ + IA_CSS_FRAME_FORMAT_QPLANE6, /** Internal, for advanced ISP */ + IA_CSS_FRAME_FORMAT_BINARY_8, /** byte stream, used for jpeg. For + frames of this type, we set the + height to 1 and the width to the + number of allocated bytes. */ + IA_CSS_FRAME_FORMAT_MIPI, /** MIPI frame, 1 plane */ + IA_CSS_FRAME_FORMAT_RAW_PACKED, /** RAW, 1 plane, packed */ + IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8, /** 8 bit per Y/U/V. + Y odd line; UYVY + interleaved even line */ + IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8, /** Legacy YUV420. UY odd + line; VY even line */ + IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10 /** 10 bit per Y/U/V. Y odd + line; UYVY interleaved + even line */ +}; + +/* NOTE: IA_CSS_FRAME_FORMAT_NUM was purposely defined outside of enum type ia_css_frame_format, */ +/* because of issues this would cause with the Clockwork code checking tool. */ +#define IA_CSS_FRAME_FORMAT_NUM (IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10 + 1) + +/* Number of valid output frame formats for ISP **/ +#define IA_CSS_FRAME_OUT_FORMAT_NUM (IA_CSS_FRAME_FORMAT_RGBA888 + 1) + +#endif /* __IA_CSS_FRAME_FORMAT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h new file mode 100644 index 0000000000000..89943e8bf1801 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h @@ -0,0 +1,352 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FRAME_PUBLIC_H +#define __IA_CSS_FRAME_PUBLIC_H + +/* @file + * This file contains structs to describe various frame-formats supported by the ISP. + */ + +#include +#include "ia_css_err.h" +#include "ia_css_types.h" +#include "ia_css_frame_format.h" +#include "ia_css_buffer.h" + +/* For RAW input, the bayer order needs to be specified separately. There + * are 4 possible orders. The name is constructed by taking the first two + * colors on the first line and the first two colors from the second line. + */ +enum ia_css_bayer_order { + IA_CSS_BAYER_ORDER_GRBG, /** GRGRGRGRGR .. BGBGBGBGBG */ + IA_CSS_BAYER_ORDER_RGGB, /** RGRGRGRGRG .. GBGBGBGBGB */ + IA_CSS_BAYER_ORDER_BGGR, /** BGBGBGBGBG .. GRGRGRGRGR */ + IA_CSS_BAYER_ORDER_GBRG, /** GBGBGBGBGB .. RGRGRGRGRG */ +}; +#define IA_CSS_BAYER_ORDER_NUM (IA_CSS_BAYER_ORDER_GBRG + 1) + +/* Frame plane structure. This describes one plane in an image + * frame buffer. + */ +struct ia_css_frame_plane { + unsigned int height; /** height of a plane in lines */ + unsigned int width; /** width of a line, in DMA elements, note that + for RGB565 the three subpixels are stored in + one element. For all other formats this is + the number of subpixels per line. */ + unsigned int stride; /** stride of a line in bytes */ + unsigned int offset; /** offset in bytes to start of frame data. + offset is wrt data field in ia_css_frame */ +}; + +/* Binary "plane". This is used to story binary streams such as jpeg + * images. This is not actually a real plane. + */ +struct ia_css_frame_binary_plane { + unsigned int size; /** number of bytes in the stream */ + struct ia_css_frame_plane data; /** plane */ +}; + +/* Container for planar YUV frames. This contains 3 planes. + */ +struct ia_css_frame_yuv_planes { + struct ia_css_frame_plane y; /** Y plane */ + struct ia_css_frame_plane u; /** U plane */ + struct ia_css_frame_plane v; /** V plane */ +}; + +/* Container for semi-planar YUV frames. + */ +struct ia_css_frame_nv_planes { + struct ia_css_frame_plane y; /** Y plane */ + struct ia_css_frame_plane uv; /** UV plane */ +}; + +/* Container for planar RGB frames. Each color has its own plane. + */ +struct ia_css_frame_rgb_planes { + struct ia_css_frame_plane r; /** Red plane */ + struct ia_css_frame_plane g; /** Green plane */ + struct ia_css_frame_plane b; /** Blue plane */ +}; + +/* Container for 6-plane frames. These frames are used internally + * in the advanced ISP only. + */ +struct ia_css_frame_plane6_planes { + struct ia_css_frame_plane r; /** Red plane */ + struct ia_css_frame_plane r_at_b; /** Red at blue plane */ + struct ia_css_frame_plane gr; /** Red-green plane */ + struct ia_css_frame_plane gb; /** Blue-green plane */ + struct ia_css_frame_plane b; /** Blue plane */ + struct ia_css_frame_plane b_at_r; /** Blue at red plane */ +}; + +/* Crop info struct - stores the lines to be cropped in isp */ +struct ia_css_crop_info { + /* the final start column and start line + * sum of lines to be cropped + bayer offset + */ + unsigned int start_column; + unsigned int start_line; +}; + +/* Frame info struct. This describes the contents of an image frame buffer. + */ +struct ia_css_frame_info { + struct ia_css_resolution res; /** Frame resolution (valid data) */ + unsigned int padded_width; /** stride of line in memory (in pixels) */ + enum ia_css_frame_format format; /** format of the frame data */ + unsigned int raw_bit_depth; /** number of valid bits per pixel, + only valid for RAW bayer frames */ + enum ia_css_bayer_order raw_bayer_order; /** bayer order, only valid + for RAW bayer frames */ + /* the params below are computed based on bayer_order + * we can remove the raw_bayer_order if it is redundant + * keeping it for now as bxt and fpn code seem to use it + */ + struct ia_css_crop_info crop_info; +}; + +#define IA_CSS_BINARY_DEFAULT_FRAME_INFO \ +(struct ia_css_frame_info) { \ + .format = IA_CSS_FRAME_FORMAT_NUM, \ + .raw_bayer_order = IA_CSS_BAYER_ORDER_NUM, \ +} + +/** + * Specifies the DVS loop delay in "frame periods" + */ +enum ia_css_frame_delay { + IA_CSS_FRAME_DELAY_0, /** Frame delay = 0 */ + IA_CSS_FRAME_DELAY_1, /** Frame delay = 1 */ + IA_CSS_FRAME_DELAY_2 /** Frame delay = 2 */ +}; + +enum ia_css_frame_flash_state { + IA_CSS_FRAME_FLASH_STATE_NONE, + IA_CSS_FRAME_FLASH_STATE_PARTIAL, + IA_CSS_FRAME_FLASH_STATE_FULL +}; + +/* Frame structure. This structure describes an image buffer or frame. + * This is the main structure used for all input and output images. + */ +struct ia_css_frame { + struct ia_css_frame_info info; /** info struct describing the frame */ + ia_css_ptr data; /** pointer to start of image data */ + unsigned int data_bytes; /** size of image data in bytes */ + /* LA: move this to ia_css_buffer */ + /* + * -1 if data address is static during life time of pipeline + * >=0 if data address can change per pipeline/frame iteration + * index to dynamic data: ia_css_frame_in, ia_css_frame_out + * ia_css_frame_out_vf + * index to host-sp queue id: queue_0, queue_1 etc. + */ + int dynamic_queue_id; + /* + * if it is dynamic frame, buf_type indicates which buffer type it + * should use for event generation. we have this because in vf_pp + * binary, we use output port, but we expect VF_OUTPUT_DONE event + */ + enum ia_css_buffer_type buf_type; + enum ia_css_frame_flash_state flash_state; + unsigned int exp_id; + /** exposure id, see ia_css_event_public.h for more detail */ + uint32_t isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ + bool valid; /** First video output frame is not valid */ + bool contiguous; /** memory is allocated physically contiguously */ + union { + unsigned int _initialisation_dummy; + struct ia_css_frame_plane raw; + struct ia_css_frame_plane rgb; + struct ia_css_frame_rgb_planes planar_rgb; + struct ia_css_frame_plane yuyv; + struct ia_css_frame_yuv_planes yuv; + struct ia_css_frame_nv_planes nv; + struct ia_css_frame_plane6_planes plane6; + struct ia_css_frame_binary_plane binary; + } planes; /** frame planes, select the right one based on + info.format */ +}; + +#define DEFAULT_FRAME \ +(struct ia_css_frame) { \ + .info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ + .dynamic_queue_id = SH_CSS_INVALID_QUEUE_ID, \ + .buf_type = IA_CSS_BUFFER_TYPE_INVALID, \ + .flash_state = IA_CSS_FRAME_FLASH_STATE_NONE, \ +} + +/* @brief Fill a frame with zeros + * + * @param frame The frame. + * @return None + * + * Fill a frame with pixel values of zero + */ +void ia_css_frame_zero(struct ia_css_frame *frame); + +/* @brief Allocate a CSS frame structure + * + * @param frame The allocated frame. + * @param width The width (in pixels) of the frame. + * @param height The height (in lines) of the frame. + * @param format The frame format. + * @param stride The padded stride, in pixels. + * @param raw_bit_depth The raw bit depth, in bits. + * @return The error code. + * + * Allocate a CSS frame structure. The memory for the frame data will be + * allocated in the CSS address space. + */ +enum ia_css_err +ia_css_frame_allocate(struct ia_css_frame **frame, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int stride, + unsigned int raw_bit_depth); + +/* @brief Allocate a CSS frame structure using a frame info structure. + * + * @param frame The allocated frame. + * @param[in] info The frame info structure. + * @return The error code. + * + * Allocate a frame using the resolution and format from a frame info struct. + * This is a convenience function, implemented on top of + * ia_css_frame_allocate(). + */ +enum ia_css_err +ia_css_frame_allocate_from_info(struct ia_css_frame **frame, + const struct ia_css_frame_info *info); +/* @brief Free a CSS frame structure. + * + * @param[in] frame Pointer to the frame. + * @return None + * + * Free a CSS frame structure. This will free both the frame structure + * and the pixel data pointer contained within the frame structure. + */ +void +ia_css_frame_free(struct ia_css_frame *frame); + +/* @brief Allocate a contiguous CSS frame structure + * + * @param frame The allocated frame. + * @param width The width (in pixels) of the frame. + * @param height The height (in lines) of the frame. + * @param format The frame format. + * @param stride The padded stride, in pixels. + * @param raw_bit_depth The raw bit depth, in bits. + * @return The error code. + * + * Contiguous frame allocation, only for FPGA display driver which needs + * physically contiguous memory. + * Deprecated. + */ +enum ia_css_err +ia_css_frame_allocate_contiguous(struct ia_css_frame **frame, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int stride, + unsigned int raw_bit_depth); + +/* @brief Allocate a contiguous CSS frame from a frame info structure. + * + * @param frame The allocated frame. + * @param[in] info The frame info structure. + * @return The error code. + * + * Allocate a frame using the resolution and format from a frame info struct. + * This is a convenience function, implemented on top of + * ia_css_frame_allocate_contiguous(). + * Only for FPGA display driver which needs physically contiguous memory. + * Deprecated. + */ +enum ia_css_err +ia_css_frame_allocate_contiguous_from_info(struct ia_css_frame **frame, + const struct ia_css_frame_info *info); + +/* @brief Allocate a CSS frame structure using a frame info structure. + * + * @param frame The allocated frame. + * @param[in] info The frame info structure. + * @return The error code. + * + * Allocate an empty CSS frame with no data buffer using the parameters + * in the frame info. + */ +enum ia_css_err +ia_css_frame_create_from_info(struct ia_css_frame **frame, + const struct ia_css_frame_info *info); + +/* @brief Set a mapped data buffer to a CSS frame + * + * @param[in] frame Valid CSS frame pointer + * @param[in] mapped_data Mapped data buffer to be assigned to the CSS frame + * @param[in] data_size_bytes Size of the mapped_data in bytes + * @return The error code. + * + * Sets a mapped data buffer to this frame. This function can be called multiple + * times with different buffers or NULL to reset the data pointer. This API + * would not try free the mapped_data and its the callers responsiblity to + * free the mapped_data buffer. However if ia_css_frame_free() is called and + * the frame had a valid data buffer, it would be freed along with the frame. + */ +enum ia_css_err +ia_css_frame_set_data(struct ia_css_frame *frame, + const ia_css_ptr mapped_data, + size_t data_size_bytes); + +/* @brief Map an existing frame data pointer to a CSS frame. + * + * @param frame Pointer to the frame to be initialized + * @param[in] info The frame info. + * @param[in] data Pointer to the allocated frame data. + * @param[in] attribute Attributes to be passed to mmgr_mmap. + * @param[in] context Pointer to the a context to be passed to mmgr_mmap. + * @return The allocated frame structure. + * + * This function maps a pre-allocated pointer into a CSS frame. This can be + * used when an upper software layer is responsible for allocating the frame + * data and it wants to share that frame pointer with the CSS code. + * This function will fill the CSS frame structure just like + * ia_css_frame_allocate() does, but instead of allocating the memory, it will + * map the pre-allocated memory into the CSS address space. + */ +enum ia_css_err +ia_css_frame_map(struct ia_css_frame **frame, + const struct ia_css_frame_info *info, + const void __user *data, + uint16_t attribute, + void *context); + +/* @brief Unmap a CSS frame structure. + * + * @param[in] frame Pointer to the CSS frame. + * @return None + * + * This function unmaps the frame data pointer within a CSS frame and + * then frees the CSS frame structure. Use this for frame pointers created + * using ia_css_frame_map(). + */ +void +ia_css_frame_unmap(struct ia_css_frame *frame); + +#endif /* __IA_CSS_FRAME_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h new file mode 100644 index 0000000000000..4557e66891dfb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h @@ -0,0 +1,46 @@ +/* Release Version: irci_stable_candrpv_0415_20150521_0458 */ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SH_CSS_HOST_DATA_H +#define __SH_CSS_HOST_DATA_H + +#include /* ia_css_pipe */ + +/** + * @brief Allocate structure ia_css_host_data. + * + * @param[in] size Size of the requested host data + * + * @return + * - NULL, can't allocate requested size + * - pointer to structure, field address points to host data with size bytes + */ +struct ia_css_host_data * +ia_css_host_data_allocate(size_t size); + +/** + * @brief Free structure ia_css_host_data. + * + * @param[in] me Pointer to structure, if a NULL is passed functions + * returns without error. Otherwise a valid pointer to + * structure must be passed and a related memory + * is freed. + * + * @return + */ +void ia_css_host_data_free(struct ia_css_host_data *me); + +#endif /* __SH_CSS_HOST_DATA_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_input_port.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_input_port.h new file mode 100644 index 0000000000000..ad9ca5449369c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_input_port.h @@ -0,0 +1,60 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* For MIPI_PORT0_ID to MIPI_PORT2_ID */ +#include "system_global.h" + +#ifndef __IA_CSS_INPUT_PORT_H +#define __IA_CSS_INPUT_PORT_H + +/* @file + * This file contains information about the possible input ports for CSS + */ + +/* Backward compatible for CSS API 2.0 only + * TO BE REMOVED when all drivers move to CSS API 2.1 + */ +#define IA_CSS_CSI2_PORT_4LANE MIPI_PORT0_ID +#define IA_CSS_CSI2_PORT_1LANE MIPI_PORT1_ID +#define IA_CSS_CSI2_PORT_2LANE MIPI_PORT2_ID + +/* The CSI2 interface supports 2 types of compression or can + * be run without compression. + */ +enum ia_css_csi2_compression_type { + IA_CSS_CSI2_COMPRESSION_TYPE_NONE, /** No compression */ + IA_CSS_CSI2_COMPRESSION_TYPE_1, /** Compression scheme 1 */ + IA_CSS_CSI2_COMPRESSION_TYPE_2 /** Compression scheme 2 */ +}; + +struct ia_css_csi2_compression { + enum ia_css_csi2_compression_type type; + /** Compression used */ + unsigned int compressed_bits_per_pixel; + /** Compressed bits per pixel (only when compression is enabled) */ + unsigned int uncompressed_bits_per_pixel; + /** Uncompressed bits per pixel (only when compression is enabled) */ +}; + +/* Input port structure. + */ +struct ia_css_input_port { + enum mipi_port_id port; /** Physical CSI-2 port */ + unsigned int num_lanes; /** Number of lanes used (4-lane port only) */ + unsigned int timeout; /** Timeout value */ + unsigned int rxcount; /** Register value, should include all lanes */ + struct ia_css_csi2_compression compression; /** Compression used */ +}; + +#endif /* __IA_CSS_INPUT_PORT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h new file mode 100644 index 0000000000000..c8840138899ac --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h @@ -0,0 +1,235 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_IRQ_H +#define __IA_CSS_IRQ_H + +/* @file + * This file contains information for Interrupts/IRQs from CSS + */ + +#include "ia_css_err.h" +#include "ia_css_pipe_public.h" +#include "ia_css_input_port.h" + +/* Interrupt types, these enumerate all supported interrupt types. + */ +enum ia_css_irq_type { + IA_CSS_IRQ_TYPE_EDGE, /** Edge (level) sensitive interrupt */ + IA_CSS_IRQ_TYPE_PULSE /** Pulse-shaped interrupt */ +}; + +/* Interrupt request type. + * When the CSS hardware generates an interrupt, a function in this API + * needs to be called to retrieve information about the interrupt. + * This interrupt type is part of this information and indicates what + * type of information the interrupt signals. + * + * Note that one interrupt can carry multiple interrupt types. For + * example: the online video ISP will generate only 2 interrupts, one to + * signal that the statistics (3a and DIS) are ready and one to signal + * that all output frames are done (output and viewfinder). + * + * DEPRECATED, this interface is not portable it should only define user + * (SW) interrupts + */ +enum ia_css_irq_info { + IA_CSS_IRQ_INFO_CSS_RECEIVER_ERROR = 1 << 0, + /** the css receiver has encountered an error */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_FIFO_OVERFLOW = 1 << 1, + /** the FIFO in the csi receiver has overflown */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_SOF = 1 << 2, + /** the css receiver received the start of frame */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_EOF = 1 << 3, + /** the css receiver received the end of frame */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_SOL = 1 << 4, + /** the css receiver received the start of line */ + IA_CSS_IRQ_INFO_PSYS_EVENTS_READY = 1 << 5, + /** One or more events are available in the PSYS event queue */ + IA_CSS_IRQ_INFO_EVENTS_READY = IA_CSS_IRQ_INFO_PSYS_EVENTS_READY, + /** deprecated{obsolete version of IA_CSS_IRQ_INFO_PSYS_EVENTS_READY, + * same functionality.} */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_EOL = 1 << 6, + /** the css receiver received the end of line */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_SIDEBAND_CHANGED = 1 << 7, + /** the css receiver received a change in side band signals */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_GEN_SHORT_0 = 1 << 8, + /** generic short packets (0) */ + IA_CSS_IRQ_INFO_CSS_RECEIVER_GEN_SHORT_1 = 1 << 9, + /** generic short packets (1) */ + IA_CSS_IRQ_INFO_IF_PRIM_ERROR = 1 << 10, + /** the primary input formatter (A) has encountered an error */ + IA_CSS_IRQ_INFO_IF_PRIM_B_ERROR = 1 << 11, + /** the primary input formatter (B) has encountered an error */ + IA_CSS_IRQ_INFO_IF_SEC_ERROR = 1 << 12, + /** the secondary input formatter has encountered an error */ + IA_CSS_IRQ_INFO_STREAM_TO_MEM_ERROR = 1 << 13, + /** the stream-to-memory device has encountered an error */ + IA_CSS_IRQ_INFO_SW_0 = 1 << 14, + /** software interrupt 0 */ + IA_CSS_IRQ_INFO_SW_1 = 1 << 15, + /** software interrupt 1 */ + IA_CSS_IRQ_INFO_SW_2 = 1 << 16, + /** software interrupt 2 */ + IA_CSS_IRQ_INFO_ISP_BINARY_STATISTICS_READY = 1 << 17, + /** ISP binary statistics are ready */ + IA_CSS_IRQ_INFO_INPUT_SYSTEM_ERROR = 1 << 18, + /** the input system in in error */ + IA_CSS_IRQ_INFO_IF_ERROR = 1 << 19, + /** the input formatter in in error */ + IA_CSS_IRQ_INFO_DMA_ERROR = 1 << 20, + /** the dma in in error */ + IA_CSS_IRQ_INFO_ISYS_EVENTS_READY = 1 << 21, + /** end-of-frame events are ready in the isys_event queue */ +}; + +/* CSS receiver error types. Whenever the CSS receiver has encountered + * an error, this enumeration is used to indicate which errors have occurred. + * + * Note that multiple error flags can be enabled at once and that this is in + * fact common (whenever an error occurs, it usually results in multiple + * errors). + * + * DEPRECATED: This interface is not portable, different systems have + * different receiver types, or possibly none in case of tests systems. + */ +enum ia_css_rx_irq_info { + IA_CSS_RX_IRQ_INFO_BUFFER_OVERRUN = 1U << 0, /** buffer overrun */ + IA_CSS_RX_IRQ_INFO_ENTER_SLEEP_MODE = 1U << 1, /** entering sleep mode */ + IA_CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE = 1U << 2, /** exited sleep mode */ + IA_CSS_RX_IRQ_INFO_ECC_CORRECTED = 1U << 3, /** ECC corrected */ + IA_CSS_RX_IRQ_INFO_ERR_SOT = 1U << 4, + /** Start of transmission */ + IA_CSS_RX_IRQ_INFO_ERR_SOT_SYNC = 1U << 5, /** SOT sync (??) */ + IA_CSS_RX_IRQ_INFO_ERR_CONTROL = 1U << 6, /** Control (??) */ + IA_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE = 1U << 7, /** Double ECC */ + IA_CSS_RX_IRQ_INFO_ERR_CRC = 1U << 8, /** CRC error */ + IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID = 1U << 9, /** Unknown ID */ + IA_CSS_RX_IRQ_INFO_ERR_FRAME_SYNC = 1U << 10,/** Frame sync error */ + IA_CSS_RX_IRQ_INFO_ERR_FRAME_DATA = 1U << 11,/** Frame data error */ + IA_CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT = 1U << 12,/** Timeout occurred */ + IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC = 1U << 13,/** Unknown escape seq. */ + IA_CSS_RX_IRQ_INFO_ERR_LINE_SYNC = 1U << 14,/** Line Sync error */ + IA_CSS_RX_IRQ_INFO_INIT_TIMEOUT = 1U << 15, +}; + +/* Interrupt info structure. This structure contains information about an + * interrupt. This needs to be used after an interrupt is received on the IA + * to perform the correct action. + */ +struct ia_css_irq { + enum ia_css_irq_info type; /** Interrupt type. */ + unsigned int sw_irq_0_val; /** In case of SW interrupt 0, value. */ + unsigned int sw_irq_1_val; /** In case of SW interrupt 1, value. */ + unsigned int sw_irq_2_val; /** In case of SW interrupt 2, value. */ + struct ia_css_pipe *pipe; + /** The image pipe that generated the interrupt. */ +}; + +/* @brief Obtain interrupt information. + * + * @param[out] info Pointer to the interrupt info. The interrupt + * information wil be written to this info. + * @return If an error is encountered during the interrupt info + * and no interrupt could be translated successfully, this + * will return IA_CSS_INTERNAL_ERROR. Otherwise + * IA_CSS_SUCCESS. + * + * This function is expected to be executed after an interrupt has been sent + * to the IA from the CSS. This function returns information about the interrupt + * which is needed by the IA code to properly handle the interrupt. This + * information includes the image pipe, buffer type etc. + */ +enum ia_css_err +ia_css_irq_translate(unsigned int *info); + +/* @brief Get CSI receiver error info. + * + * @param[out] irq_bits Pointer to the interrupt bits. The interrupt + * bits will be written this info. + * This will be the error bits that are enabled in the CSI + * receiver error register. + * @return None + * + * This function should be used whenever a CSI receiver error interrupt is + * generated. It provides the detailed information (bits) on the exact error + * that occurred. + * + *@deprecated {this function is DEPRECATED since it only works on CSI port 1. + * Use the function below instead and specify the appropriate port.} + */ +void +ia_css_rx_get_irq_info(unsigned int *irq_bits); + +/* @brief Get CSI receiver error info. + * + * @param[in] port Input port identifier. + * @param[out] irq_bits Pointer to the interrupt bits. The interrupt + * bits will be written this info. + * This will be the error bits that are enabled in the CSI + * receiver error register. + * @return None + * + * This function should be used whenever a CSI receiver error interrupt is + * generated. It provides the detailed information (bits) on the exact error + * that occurred. + */ +void +ia_css_rx_port_get_irq_info(enum mipi_port_id port, unsigned int *irq_bits); + +/* @brief Clear CSI receiver error info. + * + * @param[in] irq_bits The bits that should be cleared from the CSI receiver + * interrupt bits register. + * @return None + * + * This function should be called after ia_css_rx_get_irq_info has been called + * and the error bits have been interpreted. It is advised to use the return + * value of that function as the argument to this function to make sure no new + * error bits get overwritten. + * + * @deprecated{this function is DEPRECATED since it only works on CSI port 1. + * Use the function below instead and specify the appropriate port.} + */ +void +ia_css_rx_clear_irq_info(unsigned int irq_bits); + +/* @brief Clear CSI receiver error info. + * + * @param[in] port Input port identifier. + * @param[in] irq_bits The bits that should be cleared from the CSI receiver + * interrupt bits register. + * @return None + * + * This function should be called after ia_css_rx_get_irq_info has been called + * and the error bits have been interpreted. It is advised to use the return + * value of that function as the argument to this function to make sure no new + * error bits get overwritten. + */ +void +ia_css_rx_port_clear_irq_info(enum mipi_port_id port, unsigned int irq_bits); + +/* @brief Enable or disable specific interrupts. + * + * @param[in] type The interrupt type that will be enabled/disabled. + * @param[in] enable enable or disable. + * @return Returns IA_CSS_INTERNAL_ERROR if this interrupt + * type cannot be enabled/disabled which is true for + * CSS internal interrupts. Otherwise returns + * IA_CSS_SUCCESS. + */ +enum ia_css_err +ia_css_irq_enable(enum ia_css_irq_info type, bool enable); + +#endif /* __IA_CSS_IRQ_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c new file mode 100644 index 0000000000000..8222dd0a41f26 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c @@ -0,0 +1,83 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015-2017, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include + +const hrt_vaddress mmgr_NULL = (hrt_vaddress)0; +const hrt_vaddress mmgr_EXCEPTION = (hrt_vaddress)-1; + +hrt_vaddress +mmgr_malloc(const size_t size) +{ + return mmgr_alloc_attr(size, 0); +} + +hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attrs) +{ + uint16_t masked_attrs = attrs & MMGR_ATTRIBUTE_MASK; + WARN_ON(attrs & MMGR_ATTRIBUTE_CONTIGUOUS); + + if (masked_attrs & MMGR_ATTRIBUTE_CLEARED) { + if (masked_attrs & MMGR_ATTRIBUTE_CACHED) + return (ia_css_ptr) hrt_isp_css_mm_calloc_cached(size); + else + return (ia_css_ptr) hrt_isp_css_mm_calloc(size); + } else { + if (masked_attrs & MMGR_ATTRIBUTE_CACHED) + return (ia_css_ptr) hrt_isp_css_mm_alloc_cached(size); + else + return (ia_css_ptr) hrt_isp_css_mm_alloc(size); + } +} + +hrt_vaddress +mmgr_calloc(const size_t N, const size_t size) +{ + return mmgr_alloc_attr(size * N, MMGR_ATTRIBUTE_CLEARED); +} + +void mmgr_clear(hrt_vaddress vaddr, const size_t size) +{ + if (vaddr) + hmm_set(vaddr, 0, size); +} + +void mmgr_load(const hrt_vaddress vaddr, void *data, const size_t size) +{ + if (vaddr && data) + hmm_load(vaddr, data, size); +} + +void +mmgr_store(const hrt_vaddress vaddr, const void *data, const size_t size) +{ + if (vaddr && data) + hmm_store(vaddr, data, size); +} + +hrt_vaddress +mmgr_mmap(const void __user *ptr, const size_t size, + uint16_t attribute, void *context) +{ + struct hrt_userbuffer_attr *userbuffer_attr = context; + return hrt_isp_css_mm_alloc_user_ptr( + size, ptr, userbuffer_attr->pgnr, + userbuffer_attr->type, + attribute & HRT_BUF_FLAG_CACHED); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h new file mode 100644 index 0000000000000..ed0b6ab371dac --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h @@ -0,0 +1,71 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_METADATA_H +#define __IA_CSS_METADATA_H + +/* @file + * This file contains structure for processing sensor metadata. + */ + +#include +#include "ia_css_types.h" +#include "ia_css_stream_format.h" + +/* Metadata configuration. This data structure contains necessary info + * to process sensor metadata. + */ +struct ia_css_metadata_config { + enum atomisp_input_format data_type; /** Data type of CSI-2 embedded + data. The default value is ATOMISP_INPUT_FORMAT_EMBEDDED. For + certain sensors, user can choose non-default data type for embedded + data. */ + struct ia_css_resolution resolution; /** Resolution */ +}; + +struct ia_css_metadata_info { + struct ia_css_resolution resolution; /** Resolution */ + uint32_t stride; /** Stride in bytes */ + uint32_t size; /** Total size in bytes */ +}; + +struct ia_css_metadata { + struct ia_css_metadata_info info; /** Layout info */ + ia_css_ptr address; /** CSS virtual address */ + uint32_t exp_id; + /** Exposure ID, see ia_css_event_public.h for more detail */ +}; +#define SIZE_OF_IA_CSS_METADATA_STRUCT sizeof(struct ia_css_metadata) + +/* @brief Allocate a metadata buffer. + * @param[in] metadata_info Metadata info struct, contains details on metadata buffers. + * @return Pointer of metadata buffer or NULL (if error) + * + * This function allocates a metadata buffer according to the properties + * specified in the metadata_info struct. + */ +struct ia_css_metadata * +ia_css_metadata_allocate(const struct ia_css_metadata_info *metadata_info); + +/* @brief Free a metadata buffer. + * + * @param[in] metadata Pointer of metadata buffer. + * @return None + * + * This function frees a metadata buffer. + */ +void +ia_css_metadata_free(struct ia_css_metadata *metadata); + +#endif /* __IA_CSS_METADATA_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h new file mode 100644 index 0000000000000..367b2aafa5e83 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h @@ -0,0 +1,82 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MIPI_H +#define __IA_CSS_MIPI_H + +/* @file + * This file contains MIPI support functionality + */ + +#include +#include "ia_css_err.h" +#include "ia_css_stream_format.h" +#include "ia_css_input_port.h" + +/* Backward compatible for CSS API 2.0 only + * TO BE REMOVED when all drivers move to CSS API 2.1. + */ +/* @brief Specify a CSS MIPI frame buffer. + * + * @param[in] size_mem_words The frame size in memory words (32B). + * @param[in] contiguous Allocate memory physically contiguously or not. + * @return The error code. + * + * \deprecated{Use ia_css_mipi_buffer_config instead.} + * + * Specifies a CSS MIPI frame buffer: size in memory words (32B). + */ +enum ia_css_err +ia_css_mipi_frame_specify(const unsigned int size_mem_words, + const bool contiguous); + +#if !defined(HAS_NO_INPUT_SYSTEM) +/* @brief Register size of a CSS MIPI frame for check during capturing. + * + * @param[in] port CSI-2 port this check is registered. + * @param[in] size_mem_words The frame size in memory words (32B). + * @return Return the error in case of failure. E.g. MAX_NOF_ENTRIES REACHED + * + * Register size of a CSS MIPI frame to check during capturing. Up to + * IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES entries per port allowed. Entries are reset + * when stream is stopped. + * + * + */ +enum ia_css_err +ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, + const unsigned int size_mem_words); +#endif + +/* @brief Calculate the size of a mipi frame. + * + * @param[in] width The width (in pixels) of the frame. + * @param[in] height The height (in lines) of the frame. + * @param[in] format The frame (MIPI) format. + * @param[in] hasSOLandEOL Whether frame (MIPI) contains (optional) SOL and EOF packets. + * @param[in] embedded_data_size_words Embedded data size in memory words. + * @param size_mem_words The mipi frame size in memory words (32B). + * @return The error code. + * + * Calculate the size of a mipi frame, based on the resolution and format. + */ +enum ia_css_err +ia_css_mipi_frame_calculate_size(const unsigned int width, + const unsigned int height, + const enum atomisp_input_format format, + const bool hasSOLandEOL, + const unsigned int embedded_data_size_words, + unsigned int *size_mem_words); + +#endif /* __IA_CSS_MIPI_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu.h new file mode 100644 index 0000000000000..13c21056bfbf7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MMU_H +#define __IA_CSS_MMU_H + +/* @file + * This file contains one support function for invalidating the CSS MMU cache + */ + +/* @brief Invalidate the MMU internal cache. + * @return None + * + * This function triggers an invalidation of the translate-look-aside + * buffer (TLB) that's inside the CSS MMU. This function should be called + * every time the page tables used by the MMU change. + */ +void +ia_css_mmu_invalidate_cache(void); + +#endif /* __IA_CSS_MMU_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu_private.h new file mode 100644 index 0000000000000..1021e4f380a58 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu_private.h @@ -0,0 +1,29 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MMU_PRIVATE_H +#define __IA_CSS_MMU_PRIVATE_H + +#include "system_local.h" + +/* + * This function sets the L1 pagetable address. + * After power-up of the ISP the L1 pagetable can be set. + * Once being set the L1 pagetable is protected against + * further modifications. + */ +void +sh_css_mmu_set_page_table_base_index(hrt_data base_index); + +#endif /* __IA_CSS_MMU_PRIVATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_morph.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_morph.h new file mode 100644 index 0000000000000..de409638d009b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_morph.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MORPH_H +#define __IA_CSS_MORPH_H + +/* @file + * This file contains supporting for morphing table + */ + +#include + +/* @brief Morphing table + * @param[in] width Width of the morphing table. + * @param[in] height Height of the morphing table. + * @return Pointer to the morphing table +*/ +struct ia_css_morph_table * +ia_css_morph_table_allocate(unsigned int width, unsigned int height); + +/* @brief Free the morph table + * @param[in] me Pointer to the morph table. + * @return None +*/ +void +ia_css_morph_table_free(struct ia_css_morph_table *me); + +#endif /* __IA_CSS_MORPH_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h new file mode 100644 index 0000000000000..f6870fa7a18c5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h @@ -0,0 +1,195 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_PIPE_H__ +#define __IA_CSS_PIPE_H__ + +#include +#include "ia_css_stream.h" +#include "ia_css_frame.h" +#include "ia_css_pipeline.h" +#include "ia_css_binary.h" +#include "sh_css_legacy.h" + +#define PIPE_ENTRY_EMPTY_TOKEN (~0U) +#define PIPE_ENTRY_RESERVED_TOKEN (0x1) + +struct ia_css_preview_settings { + struct ia_css_binary copy_binary; + struct ia_css_binary preview_binary; + struct ia_css_binary vf_pp_binary; + + /* 2401 only for these two - do we in fact use them for anything real */ + struct ia_css_frame *delay_frames[MAX_NUM_DELAY_FRAMES]; + struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; + + struct ia_css_pipe *copy_pipe; + struct ia_css_pipe *capture_pipe; + struct ia_css_pipe *acc_pipe; +}; + +#define IA_CSS_DEFAULT_PREVIEW_SETTINGS \ +(struct ia_css_preview_settings) { \ + .copy_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .preview_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .vf_pp_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ +} + +struct ia_css_capture_settings { + struct ia_css_binary copy_binary; + /* we extend primary binary to multiple stages because in ISP2.6.1 + * the computation load is too high to fit in one single binary. */ + struct ia_css_binary primary_binary[MAX_NUM_PRIMARY_STAGES]; + unsigned int num_primary_stage; + struct ia_css_binary pre_isp_binary; + struct ia_css_binary anr_gdc_binary; + struct ia_css_binary post_isp_binary; + struct ia_css_binary capture_pp_binary; + struct ia_css_binary vf_pp_binary; + struct ia_css_binary capture_ldc_binary; + struct ia_css_binary *yuv_scaler_binary; + struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; + bool *is_output_stage; + unsigned int num_yuv_scaler; +}; + +#define IA_CSS_DEFAULT_CAPTURE_SETTINGS \ +(struct ia_css_capture_settings) { \ + .copy_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .primary_binary = {IA_CSS_BINARY_DEFAULT_SETTINGS}, \ + .pre_isp_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .anr_gdc_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .post_isp_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .capture_pp_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .vf_pp_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .capture_ldc_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ +} + +struct ia_css_video_settings { + struct ia_css_binary copy_binary; + struct ia_css_binary video_binary; + struct ia_css_binary vf_pp_binary; + struct ia_css_binary *yuv_scaler_binary; + struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; +#ifndef ISP2401 + struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; +#else + struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; +#endif + struct ia_css_frame *vf_pp_in_frame; + struct ia_css_pipe *copy_pipe; + struct ia_css_pipe *capture_pipe; + bool *is_output_stage; + unsigned int num_yuv_scaler; +}; + +#define IA_CSS_DEFAULT_VIDEO_SETTINGS \ +(struct ia_css_video_settings) { \ + .copy_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .video_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ + .vf_pp_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ +} + +struct ia_css_yuvpp_settings { + struct ia_css_binary copy_binary; + struct ia_css_binary *yuv_scaler_binary; + struct ia_css_binary *vf_pp_binary; + bool *is_output_stage; + unsigned int num_yuv_scaler; + unsigned int num_vf_pp; + unsigned int num_output; +}; + +#define IA_CSS_DEFAULT_YUVPP_SETTINGS \ +(struct ia_css_yuvpp_settings) { \ + .copy_binary = IA_CSS_BINARY_DEFAULT_SETTINGS, \ +} + +struct osys_object; + +struct ia_css_pipe { + /* TODO: Remove stop_requested and use stop_requested in the pipeline */ + bool stop_requested; + struct ia_css_pipe_config config; + struct ia_css_pipe_extra_config extra_config; + struct ia_css_pipe_info info; + enum ia_css_pipe_id mode; + struct ia_css_shading_table *shading_table; + struct ia_css_pipeline pipeline; + struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info bds_output_info; + struct ia_css_frame_info vf_output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info out_yuv_ds_input_info; + struct ia_css_frame_info vf_yuv_ds_input_info; + struct ia_css_fw_info *output_stage; /* extra output stage */ + struct ia_css_fw_info *vf_stage; /* extra vf_stage */ + unsigned int required_bds_factor; + unsigned int dvs_frame_delay; + int num_invalid_frames; + bool enable_viewfinder[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_stream *stream; + struct ia_css_frame in_frame_struct; + struct ia_css_frame out_frame_struct; + struct ia_css_frame vf_frame_struct; + struct ia_css_frame *continuous_frames[NUM_CONTINUOUS_FRAMES]; + struct ia_css_metadata *cont_md_buffers[NUM_CONTINUOUS_FRAMES]; + union { + struct ia_css_preview_settings preview; + struct ia_css_video_settings video; + struct ia_css_capture_settings capture; + struct ia_css_yuvpp_settings yuvpp; + } pipe_settings; + hrt_vaddress scaler_pp_lut; + struct osys_object *osys_obj; + + /* This number is unique per pipe each instance of css. This number is + * reused as pipeline number also. There is a 1-1 mapping between pipe_num + * and sp thread id. Current logic limits pipe_num to + * SH_CSS_MAX_SP_THREADS */ + unsigned int pipe_num; +}; + +#define IA_CSS_DEFAULT_PIPE \ +(struct ia_css_pipe) { \ + .config = DEFAULT_PIPE_CONFIG, \ + .info = DEFAULT_PIPE_INFO, \ + .mode = IA_CSS_PIPE_ID_ACC, /* (pipe_id) */ \ + .pipeline = DEFAULT_PIPELINE, \ + .output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ + .bds_output_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ + .vf_output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ + .out_yuv_ds_input_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ + .vf_yuv_ds_input_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ + .required_bds_factor = SH_CSS_BDS_FACTOR_1_00, \ + .dvs_frame_delay = 1, \ + .enable_viewfinder = {true}, \ + .in_frame_struct = DEFAULT_FRAME, \ + .out_frame_struct = DEFAULT_FRAME, \ + .vf_frame_struct = DEFAULT_FRAME, \ + .pipe_settings = { \ + .preview = IA_CSS_DEFAULT_PREVIEW_SETTINGS \ + }, \ + .pipe_num = PIPE_ENTRY_EMPTY_TOKEN, \ +} + +void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map); + +enum ia_css_err +sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, + struct ia_css_isp_parameters *params, + bool commit, struct ia_css_pipe *pipe); + + + +#endif /* __IA_CSS_PIPE_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h new file mode 100644 index 0000000000000..11225d5ac442f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h @@ -0,0 +1,579 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_PIPE_PUBLIC_H +#define __IA_CSS_PIPE_PUBLIC_H + +/* @file + * This file contains the public interface for CSS pipes. + */ + +#include +#include +#include +#include +#include +#ifdef ISP2401 +#include +#endif + +enum { + IA_CSS_PIPE_OUTPUT_STAGE_0 = 0, + IA_CSS_PIPE_OUTPUT_STAGE_1, + IA_CSS_PIPE_MAX_OUTPUT_STAGE, +}; + +/* Enumeration of pipe modes. This mode can be used to create + * an image pipe for this mode. These pipes can be combined + * to configure and run streams on the ISP. + * + * For example, one can create a preview and capture pipe to + * create a continuous capture stream. + */ +enum ia_css_pipe_mode { + IA_CSS_PIPE_MODE_PREVIEW, /** Preview pipe */ + IA_CSS_PIPE_MODE_VIDEO, /** Video pipe */ + IA_CSS_PIPE_MODE_CAPTURE, /** Still capture pipe */ + IA_CSS_PIPE_MODE_ACC, /** Accelerated pipe */ + IA_CSS_PIPE_MODE_COPY, /** Copy pipe, only used for embedded/image data copying */ + IA_CSS_PIPE_MODE_YUVPP, /** YUV post processing pipe, used for all use cases with YUV input, + for SoC sensor and external ISP */ +}; +/* Temporary define */ +#define IA_CSS_PIPE_MODE_NUM (IA_CSS_PIPE_MODE_YUVPP + 1) + +/** + * Enumeration of pipe versions. + * the order should match with definition in sh_css_defs.h + */ +enum ia_css_pipe_version { + IA_CSS_PIPE_VERSION_1 = 1, /** ISP1.0 pipe */ + IA_CSS_PIPE_VERSION_2_2 = 2, /** ISP2.2 pipe */ + IA_CSS_PIPE_VERSION_2_6_1 = 3, /** ISP2.6.1 pipe */ + IA_CSS_PIPE_VERSION_2_7 = 4 /** ISP2.7 pipe */ +}; + +/** + * Pipe configuration structure. + * Resolution properties are filled by Driver, kernel configurations are + * set by AIC + */ +struct ia_css_pipe_config { + enum ia_css_pipe_mode mode; + /** mode, indicates which mode the pipe should use. */ + enum ia_css_pipe_version isp_pipe_version; + /** pipe version, indicates which imaging pipeline the pipe should use. */ + struct ia_css_resolution input_effective_res; + /** input effective resolution */ + struct ia_css_resolution bayer_ds_out_res; + /** bayer down scaling */ + struct ia_css_resolution capt_pp_in_res; +#ifndef ISP2401 + /** bayer down scaling */ +#else + /** capture post processing input resolution */ +#endif + struct ia_css_resolution vf_pp_in_res; +#ifndef ISP2401 + /** bayer down scaling */ +#else + /** view finder post processing input resolution */ + struct ia_css_resolution output_system_in_res; + /** For IPU3 only: use output_system_in_res to specify what input resolution + will OSYS receive, this resolution is equal to the output resolution of GDC + if not determined CSS will set output_system_in_res with main osys output pin resolution + All other IPUs may ignore this property */ +#endif + struct ia_css_resolution dvs_crop_out_res; + /** dvs crop, video only, not in use yet. Use dvs_envelope below. */ + struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + /** output of YUV scaling */ + struct ia_css_frame_info vf_output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + /** output of VF YUV scaling */ + struct ia_css_fw_info *acc_extension; + /** Pipeline extension accelerator */ + struct ia_css_fw_info **acc_stages; + /** Standalone accelerator stages */ + uint32_t num_acc_stages; + /** Number of standalone accelerator stages */ + struct ia_css_capture_config default_capture_config; + /** Default capture config for initial capture pipe configuration. */ + struct ia_css_resolution dvs_envelope; /** temporary */ + enum ia_css_frame_delay dvs_frame_delay; + /** indicates the DVS loop delay in frame periods */ + int acc_num_execs; + /** For acceleration pipes only: determine how many times the pipe + should be run. Setting this to -1 means it will run until + stopped. */ + bool enable_dz; + /** Disabling digital zoom for a pipeline, if this is set to false, + then setting a zoom factor will have no effect. + In some use cases this provides better performance. */ + bool enable_dpc; + /** Disabling "Defect Pixel Correction" for a pipeline, if this is set + to false. In some use cases this provides better performance. */ + bool enable_vfpp_bci; + /** Enabling BCI mode will cause yuv_scale binary to be picked up + instead of vf_pp. This only applies to viewfinder post + processing stages. */ +#ifdef ISP2401 + bool enable_luma_only; + /** Enabling of monochrome mode for a pipeline. If enabled only luma processing + will be done. */ + bool enable_tnr; + /** Enabling of TNR (temporal noise reduction). This is only applicable to video + pipes. Non video-pipes should always set this parameter to false. */ +#endif + struct ia_css_isp_config *p_isp_config; + /** Pointer to ISP configuration */ + struct ia_css_resolution gdc_in_buffer_res; + /** GDC in buffer resolution. */ + struct ia_css_point gdc_in_buffer_offset; + /** GDC in buffer offset - indicates the pixel coordinates of the first valid pixel inside the buffer */ +#ifdef ISP2401 + struct ia_css_coordinate internal_frame_origin_bqs_on_sctbl; + /** Origin of internal frame positioned on shading table at shading correction in ISP. + NOTE: Shading table is larger than or equal to internal frame. + Shading table has shading gains and internal frame has bayer data. + The origin of internal frame is used in shading correction in ISP + to retrieve shading gains which correspond to bayer data. */ +#endif +}; + + +/** + * Default settings for newly created pipe configurations. + */ +#define DEFAULT_PIPE_CONFIG \ +(struct ia_css_pipe_config) { \ + .mode = IA_CSS_PIPE_MODE_PREVIEW, \ + .isp_pipe_version = 1, \ + .output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ + .vf_output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ + .default_capture_config = DEFAULT_CAPTURE_CONFIG, \ + .dvs_frame_delay = IA_CSS_FRAME_DELAY_1, \ + .acc_num_execs = -1, \ +} + +/* Pipe info, this struct describes properties of a pipe after it's stream has + * been created. + * ~~~** DO NOT ADD NEW FIELD **~~~ This structure will be deprecated. + * - On the Behalf of CSS-API Committee. + */ +struct ia_css_pipe_info { + struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + /** Info about output resolution. This contains the stride which + should be used for memory allocation. */ + struct ia_css_frame_info vf_output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + /** Info about viewfinder output resolution (optional). This contains + the stride that should be used for memory allocation. */ + struct ia_css_frame_info raw_output_info; + /** Raw output resolution. This indicates the resolution of the + RAW bayer output for pipes that support this. Currently, only the + still capture pipes support this feature. When this resolution is + smaller than the input resolution, cropping will be performed by + the ISP. The first cropping that will be performed is on the upper + left corner where we crop 8 lines and 8 columns to remove the + pixels normally used to initialize the ISP filters. + This is why the raw output resolution should normally be set to + the input resolution - 8x8. */ +#ifdef ISP2401 + struct ia_css_resolution output_system_in_res_info; + /** For IPU3 only. Info about output system in resolution which is considered + as gdc out resolution. */ +#endif + struct ia_css_shading_info shading_info; + /** After an image pipe is created, this field will contain the info + for the shading correction. */ + struct ia_css_grid_info grid_info; + /** After an image pipe is created, this field will contain the grid + info for 3A and DVS. */ + int num_invalid_frames; + /** The very first frames in a started stream do not contain valid data. + In this field, the CSS-firmware communicates to the host-driver how + many initial frames will contain invalid data; this allows the + host-driver to discard those initial invalid frames and start it's + output at the first valid frame. */ +}; + +/** + * Defaults for ia_css_pipe_info structs. + */ +#define DEFAULT_PIPE_INFO \ +(struct ia_css_pipe_info) { \ + .output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ + .vf_output_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ + .raw_output_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ + .shading_info = DEFAULT_SHADING_INFO, \ + .grid_info = DEFAULT_GRID_INFO, \ +} + +/* @brief Load default pipe configuration + * @param[out] pipe_config The pipe configuration. + * @return None + * + * This function will load the default pipe configuration: +@code + struct ia_css_pipe_config def_config = { + IA_CSS_PIPE_MODE_PREVIEW, // mode + 1, // isp_pipe_version + {0, 0}, // bayer_ds_out_res + {0, 0}, // capt_pp_in_res + {0, 0}, // vf_pp_in_res + {0, 0}, // dvs_crop_out_res + {{0, 0}, 0, 0, 0, 0}, // output_info + {{0, 0}, 0, 0, 0, 0}, // second_output_info + {{0, 0}, 0, 0, 0, 0}, // vf_output_info + {{0, 0}, 0, 0, 0, 0}, // second_vf_output_info + NULL, // acc_extension + NULL, // acc_stages + 0, // num_acc_stages + { + IA_CSS_CAPTURE_MODE_RAW, // mode + false, // enable_xnr + false // enable_raw_output + }, // default_capture_config + {0, 0}, // dvs_envelope + 1, // dvs_frame_delay + -1, // acc_num_execs + true, // enable_dz + NULL, // p_isp_config + }; +@endcode + */ +void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config); + +/* @brief Create a pipe + * @param[in] config The pipe configuration. + * @param[out] pipe The pipe. + * @return IA_CSS_SUCCESS or the error code. + * + * This function will create a pipe with the given + * configuration. + */ +enum ia_css_err +ia_css_pipe_create(const struct ia_css_pipe_config *config, + struct ia_css_pipe **pipe); + +/* @brief Destroy a pipe + * @param[in] pipe The pipe. + * @return IA_CSS_SUCCESS or the error code. + * + * This function will destroy a given pipe. + */ +enum ia_css_err +ia_css_pipe_destroy(struct ia_css_pipe *pipe); + +/* @brief Provides information about a pipe + * @param[in] pipe The pipe. + * @param[out] pipe_info The pipe information. + * @return IA_CSS_SUCCESS or IA_CSS_ERR_INVALID_ARGUMENTS. + * + * This function will provide information about a given pipe. + */ +enum ia_css_err +ia_css_pipe_get_info(const struct ia_css_pipe *pipe, + struct ia_css_pipe_info *pipe_info); + +/* @brief Configure a pipe with filter coefficients. + * @param[in] pipe The pipe. + * @param[in] config The pointer to ISP configuration. + * @return IA_CSS_SUCCESS or error code upon error. + * + * This function configures the filter coefficients for an image + * pipe. + */ +enum ia_css_err +ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, + struct ia_css_isp_config *config); + +/* @brief Controls when the Event generator raises an IRQ to the Host. + * + * @param[in] pipe The pipe. + * @param[in] or_mask Binary or of enum ia_css_event_irq_mask_type. Each pipe + related event that is part of this mask will directly + raise an IRQ to the Host when the event occurs in the + CSS. + * @param[in] and_mask Binary or of enum ia_css_event_irq_mask_type. An event + IRQ for the Host is only raised after all pipe related + events have occurred at least once for all the active + pipes. Events are remembered and don't need to occure + at the same moment in time. There is no control over + the order of these events. Once an IRQ has been raised + all remembered events are reset. + * @return IA_CSS_SUCCESS. + * + Controls when the Event generator in the CSS raises an IRQ to the Host. + The main purpose of this function is to reduce the amount of interrupts + between the CSS and the Host. This will help saving power as it wakes up the + Host less often. In case both or_mask and and_mask are + IA_CSS_EVENT_TYPE_NONE for all pipes, no event IRQ's will be raised. An + exception holds for IA_CSS_EVENT_TYPE_PORT_EOF, for this event an IRQ is always + raised. + Note that events are still queued and the Host can poll for them. The + or_mask and and_mask may be active at the same time\n + \n + Default values, for all pipe id's, after ia_css_init:\n + or_mask = IA_CSS_EVENT_TYPE_ALL\n + and_mask = IA_CSS_EVENT_TYPE_NONE\n + \n + Examples\n + \code + ia_css_pipe_set_irq_mask(h_pipe, + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE | + IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE , + IA_CSS_EVENT_TYPE_NONE); + \endcode + The event generator will only raise an interrupt to the Host when there are + 3A or DIS statistics available from the preview pipe. It will not generate + an interrupt for any other event of the preview pipe e.g when there is an + output frame available. + + \code + ia_css_pipe_set_irq_mask(h_pipe_preview, + IA_CSS_EVENT_TYPE_NONE, + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE | + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE ); + + ia_css_pipe_set_irq_mask(h_pipe_capture, + IA_CSS_EVENT_TYPE_NONE, + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE ); + \endcode + The event generator will only raise an interrupt to the Host when there is + both a frame done and 3A event available from the preview pipe AND when there + is a frame done available from the capture pipe. Note that these events + may occur at different moments in time. Also the order of the events is not + relevant. + + \code + ia_css_pipe_set_irq_mask(h_pipe_preview, + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, + IA_CSS_EVENT_TYPE_ALL ); + + ia_css_pipe_set_irq_mask(h_pipe_capture, + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, + IA_CSS_EVENT_TYPE_ALL ); + \endcode + The event generator will only raise an interrupt to the Host when there is an + output frame from the preview pipe OR an output frame from the capture pipe. + All other events (3A, VF output, pipeline done) will not raise an interrupt + to the Host. These events are not lost but always stored in the event queue. + */ +enum ia_css_err +ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, + unsigned int or_mask, + unsigned int and_mask); + +/* @brief Reads the current event IRQ mask from the CSS. + * + * @param[in] pipe The pipe. + * @param[out] or_mask Current or_mask. The bits in this mask are a binary or + of enum ia_css_event_irq_mask_type. Pointer may be NULL. + * @param[out] and_mask Current and_mask.The bits in this mask are a binary or + of enum ia_css_event_irq_mask_type. Pointer may be NULL. + * @return IA_CSS_SUCCESS. + * + Reads the current event IRQ mask from the CSS. Reading returns the actual + values as used by the SP and not any mirrored values stored at the Host.\n +\n +Precondition:\n +SP must be running.\n + +*/ +enum ia_css_err +ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe, + unsigned int *or_mask, + unsigned int *and_mask); + +/* @brief Queue a buffer for an image pipe. + * + * @param[in] pipe The pipe that will own the buffer. + * @param[in] buffer Pointer to the buffer. + * Note that the caller remains owner of the buffer + * structure. Only the data pointer within it will + * be passed into the internal queues. + * @return IA_CSS_INTERNAL_ERROR in case of unexpected errors, + * IA_CSS_SUCCESS otherwise. + * + * This function adds a buffer (which has a certain buffer type) to the queue + * for this type. This queue is owned by the image pipe. After this function + * completes successfully, the buffer is now owned by the image pipe and should + * no longer be accessed by any other code until it gets dequeued. The image + * pipe will dequeue buffers from this queue, use them and return them to the + * host code via an interrupt. Buffers will be consumed in the same order they + * get queued, but may be returned to the host out of order. + */ +enum ia_css_err +ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, + const struct ia_css_buffer *buffer); + +/* @brief Dequeue a buffer from an image pipe. + * + * @param[in] pipe The pipeline that the buffer queue belongs to. + * @param[in,out] buffer The buffer is used to lookup the type which determines + * which internal queue to use. + * The resulting buffer pointer is written into the dta + * field. + * @return IA_CSS_ERR_NO_BUFFER if the queue is empty or + * IA_CSS_SUCCESS otherwise. + * + * This function dequeues a buffer from a buffer queue. The queue is indicated + * by the buffer type argument. This function can be called after an interrupt + * has been generated that signalled that a new buffer was available and can + * be used in a polling-like situation where the NO_BUFFER return value is used + * to determine whether a buffer was available or not. + */ +enum ia_css_err +ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, + struct ia_css_buffer *buffer); + + +/* @brief Set the state (Enable or Disable) of the Extension stage in the + * given pipe. + * @param[in] pipe Pipe handle. + * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle) + * @param[in] enable Enable Flag (1 to enable ; 0 to disable) + * + * @return + * IA_CSS_SUCCESS : Success + * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters + * IA_CSS_ERR_RESOURCE_NOT_AVAILABLE : Inactive QOS Pipe + * (No active stream with this pipe) + * + * This function will request state change (enable or disable) for the Extension + * stage (firmware handle) in the given pipe. + * + * Note: + * 1. Extension can be enabled/disabled only on QOS Extensions + * 2. Extension can be enabled/disabled only with an active QOS Pipe + * 3. Initial(Default) state of QOS Extensions is Disabled + * 4. State change cannot be guaranteed immediately OR on frame boundary + * + */ +enum ia_css_err +ia_css_pipe_set_qos_ext_state (struct ia_css_pipe *pipe, + uint32_t fw_handle, + bool enable); + +/* @brief Get the state (Enable or Disable) of the Extension stage in the + * given pipe. + * @param[in] pipe Pipe handle. + * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle) + * @param[out] *enable Enable Flag + * + * @return + * IA_CSS_SUCCESS : Success + * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters + * IA_CSS_ERR_RESOURCE_NOT_AVAILABLE : Inactive QOS Pipe + * (No active stream with this pipe) + * + * This function will query the state of the Extension stage (firmware handle) + * in the given Pipe. + * + * Note: + * 1. Extension state can be queried only on QOS Extensions + * 2. Extension can be enabled/disabled only with an active QOS Pipe + * 3. Initial(Default) state of QOS Extensions is Disabled. + * + */ +enum ia_css_err +ia_css_pipe_get_qos_ext_state (struct ia_css_pipe *pipe, + uint32_t fw_handle, + bool * enable); + +#ifdef ISP2401 +/* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. + * @param[in] pipe Pipe handle. + * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle). + * @param[in] css_seg Parameter memory descriptors for CSS segments. + * @param[in] isp_seg Parameter memory descriptors for ISP segments. + * + * @return + * IA_CSS_SUCCESS : Success + * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters + * IA_CSS_ERR_RESOURCE_NOT_AVAILABLE : Inactive QOS Pipe + * (No active stream with this pipe) + * + * \deprecated{This interface is used to temporarily support a late-developed, + * specific use-case on a specific IPU2 platform. It will not be supported or + * maintained on IPU3 or further.} + */ +enum ia_css_err +ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, uint32_t fw_handle, + struct ia_css_isp_param_css_segments *css_seg, + struct ia_css_isp_param_isp_segments *isp_seg); + +#endif +/* @brief Get selected configuration settings + * @param[in] pipe The pipe. + * @param[out] config Configuration settings. + * @return None + */ +void +ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, + struct ia_css_isp_config *config); + +/* @brief Set the scaler lut on this pipe. A copy of lut is made in the inuit + * address space. So the LUT can be freed by caller. + * @param[in] pipe Pipe handle. + * @param[in] lut Look up tabel + * + * @return + * IA_CSS_SUCCESS : Success + * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters + * + * Note: + * 1) Note that both GDC's are programmed with the same table. + * 2) Current implementation ignores the pipe and overrides the + * global lut. This will be fixed in the future + * 3) This function must be called before stream start + * + */ +enum ia_css_err +ia_css_pipe_set_bci_scaler_lut( struct ia_css_pipe *pipe, + const void *lut); +/* @brief Checking of DVS statistics ability + * @param[in] pipe_info The pipe info. + * @return true - has DVS statistics ability + * false - otherwise + */ +bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info); + +#ifdef ISP2401 +/* @brief Override the frameformat set on the output pins. + * @param[in] pipe Pipe handle. + * @param[in] output_pin Pin index to set the format on + * 0 - main output pin + * 1 - display output pin + * @param[in] format Format to set + * + * @return + * IA_CSS_SUCCESS : Success + * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters + * IA_CSS_ERR_INTERNAL_ERROR : Pipe misses binary info + * + * Note: + * 1) This is an optional function to override the formats set in the pipe. + * 2) Only overriding with IA_CSS_FRAME_FORMAT_NV12_TILEY is currently allowed. + * 3) This function is only to be used on pipes that use the output system. + * 4) If this function is used, it MUST be called after ia_css_pipe_create. + * 5) If this function is used, this function MUST be called before ia_css_stream_start. + */ +enum ia_css_err +ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, + int output_pin, + enum ia_css_frame_format format); + +#endif +#endif /* __IA_CSS_PIPE_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h new file mode 100644 index 0000000000000..6f24656b6cb46 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_PRBS_H +#define __IA_CSS_PRBS_H + +/* @file + * This file contains support for Pseudo Random Bit Sequence (PRBS) inputs + */ + +/* Enumerate the PRBS IDs. + */ +enum ia_css_prbs_id { + IA_CSS_PRBS_ID0, + IA_CSS_PRBS_ID1, + IA_CSS_PRBS_ID2 +}; + +/** + * Maximum number of PRBS IDs. + * + * Make sure the value of this define gets changed to reflect the correct + * number of ia_css_prbs_id enum if you add/delete an item in the enum. + */ +#define N_CSS_PRBS_IDS (IA_CSS_PRBS_ID2+1) + +/** + * PRBS configuration structure. + * + * Seed the for the Pseudo Random Bit Sequence. + * + * @deprecated{This interface is deprecated, it is not portable -> move to input system API} + */ +struct ia_css_prbs_config { + enum ia_css_prbs_id id; + unsigned int h_blank; /** horizontal blank */ + unsigned int v_blank; /** vertical blank */ + int seed; /** random seed for the 1st 2-pixel-components/clock */ + int seed1; /** random seed for the 2nd 2-pixel-components/clock */ +}; + +#endif /* __IA_CSS_PRBS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_properties.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_properties.h new file mode 100644 index 0000000000000..9a167306611c9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_properties.h @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_PROPERTIES_H +#define __IA_CSS_PROPERTIES_H + +/* @file + * This file contains support for retrieving properties of some hardware the CSS system + */ + +#include /* bool */ +#include /* ia_css_vamem_type */ + +struct ia_css_properties { + int gdc_coord_one; + bool l1_base_is_index; /** Indicate whether the L1 page base + is a page index or a byte address. */ + enum ia_css_vamem_type vamem_type; +}; + +/* @brief Get hardware properties + * @param[in,out] properties The hardware properties + * @return None + * + * This function returns a number of hardware properties. + */ +void +ia_css_get_properties(struct ia_css_properties *properties); + +#endif /* __IA_CSS_PROPERTIES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_shading.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_shading.h new file mode 100644 index 0000000000000..588f53d32b723 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_shading.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SHADING_H +#define __IA_CSS_SHADING_H + +/* @file + * This file contains support for setting the shading table for CSS + */ + +#include + +/* @brief Shading table + * @param[in] width Width of the shading table. + * @param[in] height Height of the shading table. + * @return Pointer to the shading table +*/ +struct ia_css_shading_table * +ia_css_shading_table_alloc(unsigned int width, + unsigned int height); + +/* @brief Free shading table + * @param[in] table Pointer to the shading table. + * @return None +*/ +void +ia_css_shading_table_free(struct ia_css_shading_table *table); + +#endif /* __IA_CSS_SHADING_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h new file mode 100644 index 0000000000000..fb6e8c2ca8bfb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h @@ -0,0 +1,110 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_STREAM_H_ +#define _IA_CSS_STREAM_H_ + +#include +#include +#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) +#include +#endif +#include "ia_css_types.h" +#include "ia_css_stream_public.h" + +/** + * structure to hold all internal stream related information + */ +struct ia_css_stream { + struct ia_css_stream_config config; + struct ia_css_stream_info info; +#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) + rx_cfg_t csi_rx_config; +#endif + bool reconfigure_css_rx; + struct ia_css_pipe *last_pipe; + int num_pipes; + struct ia_css_pipe **pipes; + struct ia_css_pipe *continuous_pipe; + struct ia_css_isp_parameters *isp_params_configs; + struct ia_css_isp_parameters *per_frame_isp_params_configs; + + bool cont_capt; + bool disable_cont_vf; +#ifndef ISP2401 + bool stop_copy_preview; +#endif + bool started; +}; + +/* @brief Get a binary in the stream, which binary has the shading correction. + * + * @param[in] stream: The stream. + * @return The binary which has the shading correction. + * + */ +struct ia_css_binary * +ia_css_stream_get_shading_correction_binary(const struct ia_css_stream *stream); + +struct ia_css_binary * +ia_css_stream_get_dvs_binary(const struct ia_css_stream *stream); + +struct ia_css_binary * +ia_css_stream_get_3a_binary(const struct ia_css_stream *stream); + +unsigned int +ia_css_stream_input_format_bits_per_pixel(struct ia_css_stream *stream); + +bool +sh_css_params_set_binning_factor(struct ia_css_stream *stream, unsigned int sensor_binning); + +void +sh_css_invalidate_params(struct ia_css_stream *stream); + +/* The following functions are used for testing purposes only */ +const struct ia_css_fpn_table * +ia_css_get_fpn_table(struct ia_css_stream *stream); + +/* @brief Get a pointer to the shading table. + * + * @param[in] stream: The stream. + * @return The pointer to the shading table. + * + */ +struct ia_css_shading_table * +ia_css_get_shading_table(struct ia_css_stream *stream); + +void +ia_css_get_isp_dis_coefficients(struct ia_css_stream *stream, + short *horizontal_coefficients, + short *vertical_coefficients); + +void +ia_css_get_isp_dvs2_coefficients(struct ia_css_stream *stream, + short *hor_coefs_odd_real, + short *hor_coefs_odd_imag, + short *hor_coefs_even_real, + short *hor_coefs_even_imag, + short *ver_coefs_odd_real, + short *ver_coefs_odd_imag, + short *ver_coefs_even_real, + short *ver_coefs_even_imag); + +enum ia_css_err +ia_css_stream_isp_parameters_init(struct ia_css_stream *stream); + +void +ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream); + +#endif /*_IA_CSS_STREAM_H_*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h new file mode 100644 index 0000000000000..f97b9eb2b19c2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h @@ -0,0 +1,29 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_STREAM_FORMAT_H +#define __IA_CSS_STREAM_FORMAT_H + +/* @file + * This file contains formats usable for ISP streaming input + */ + +#include /* bool */ +#include "../../../include/linux/atomisp_platform.h" + +unsigned int ia_css_util_input_format_bpp( + enum atomisp_input_format format, + bool two_ppc); + +#endif /* __ATOMISP_INPUT_FORMAT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h new file mode 100644 index 0000000000000..ddefad330db7b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h @@ -0,0 +1,582 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_STREAM_PUBLIC_H +#define __IA_CSS_STREAM_PUBLIC_H + +/* @file + * This file contains support for configuring and controlling streams + */ + +#include +#include "ia_css_types.h" +#include "ia_css_pipe_public.h" +#include "ia_css_metadata.h" +#include "ia_css_tpg.h" +#include "ia_css_prbs.h" +#include "ia_css_input_port.h" + +/* Input modes, these enumerate all supported input modes. + * Note that not all ISP modes support all input modes. + */ +enum ia_css_input_mode { + IA_CSS_INPUT_MODE_SENSOR, /** data from sensor */ + IA_CSS_INPUT_MODE_FIFO, /** data from input-fifo */ + IA_CSS_INPUT_MODE_TPG, /** data from test-pattern generator */ + IA_CSS_INPUT_MODE_PRBS, /** data from pseudo-random bit stream */ + IA_CSS_INPUT_MODE_MEMORY, /** data from a frame in memory */ + IA_CSS_INPUT_MODE_BUFFERED_SENSOR /** data is sent through mipi buffer */ +}; + +/* Structure of the MIPI buffer configuration + */ +struct ia_css_mipi_buffer_config { + unsigned int size_mem_words; /** The frame size in the system memory + words (32B) */ + bool contiguous; /** Allocated memory physically + contiguously or not. \deprecated{Will be false always.}*/ + unsigned int nof_mipi_buffers; /** The number of MIPI buffers required for this + stream */ +}; + +enum { + IA_CSS_STREAM_ISYS_STREAM_0 = 0, + IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX = IA_CSS_STREAM_ISYS_STREAM_0, + IA_CSS_STREAM_ISYS_STREAM_1, + IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH +}; + +/* This is input data configuration for one MIPI data type. We can have + * multiple of this in one virtual channel. + */ +struct ia_css_stream_isys_stream_config { + struct ia_css_resolution input_res; /** Resolution of input data */ + enum atomisp_input_format format; /** Format of input stream. This data + format will be mapped to MIPI data + type internally. */ + int linked_isys_stream_id; /** default value is -1, other value means + current isys_stream shares the same buffer with + indicated isys_stream*/ + bool valid; /** indicate whether other fields have valid value */ +}; + +struct ia_css_stream_input_config { + struct ia_css_resolution input_res; /** Resolution of input data */ + struct ia_css_resolution effective_res; /** Resolution of input data. + Used for CSS 2400/1 System and deprecated for other + systems (replaced by input_effective_res in + ia_css_pipe_config) */ + enum atomisp_input_format format; /** Format of input stream. This data + format will be mapped to MIPI data + type internally. */ + enum ia_css_bayer_order bayer_order; /** Bayer order for RAW streams */ +}; + + +/* Input stream description. This describes how input will flow into the + * CSS. This is used to program the CSS hardware. + */ +struct ia_css_stream_config { + enum ia_css_input_mode mode; /** Input mode */ + union { + struct ia_css_input_port port; /** Port, for sensor only. */ + struct ia_css_tpg_config tpg; /** TPG configuration */ + struct ia_css_prbs_config prbs; /** PRBS configuration */ + } source; /** Source of input data */ + unsigned int channel_id; /** Channel on which input data + will arrive. Use this field + to specify virtual channel id. + Valid values are: 0, 1, 2, 3 */ + struct ia_css_stream_isys_stream_config isys_config[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; + struct ia_css_stream_input_config input_config; + +#ifdef ISP2401 + /* Currently, Android and Windows platforms interpret the binning_factor parameter + * differently. In Android, the binning factor is expressed in the form + * 2^N * 2^N, whereas in Windows platform, the binning factor is N*N + * To use the Windows method of specification, the caller has to define + * macro USE_WINDOWS_BINNING_FACTOR. This is for backward compatibility only + * and will be deprecated. In the future,all platforms will use the N*N method + */ +#endif + unsigned int sensor_binning_factor; /** Binning factor used by sensor + to produce image data. This is + used for shading correction. */ + unsigned int pixels_per_clock; /** Number of pixels per clock, which can be + 1, 2 or 4. */ + bool online; /** offline will activate RAW copy on SP, use this for + continuous capture. */ + /* ISYS2401 usage: ISP receives data directly from sensor, no copy. */ + unsigned init_num_cont_raw_buf; /** initial number of raw buffers to + allocate */ + unsigned target_num_cont_raw_buf; /** total number of raw buffers to + allocate */ + bool pack_raw_pixels; /** Pack pixels in the raw buffers */ + bool continuous; /** Use SP copy feature to continuously capture frames + to system memory and run pipes in offline mode */ + bool disable_cont_viewfinder; /** disable continous viewfinder for ZSL use case */ + int32_t flash_gpio_pin; /** pin on which the flash is connected, -1 for no flash */ + int left_padding; /** The number of input-formatter left-paddings, -1 for default from binary.*/ + struct ia_css_mipi_buffer_config mipi_buffer_config; /** mipi buffer configuration */ + struct ia_css_metadata_config metadata_config; /** Metadata configuration. */ + bool ia_css_enable_raw_buffer_locking; /** Enable Raw Buffer Locking for HALv3 Support */ + bool lock_all; + /** Lock all RAW buffers (true) or lock only buffers processed by + video or preview pipe (false). + This setting needs to be enabled to allow raw buffer locking + without continuous viewfinder. */ +}; + +struct ia_css_stream; + +/* Stream info, this struct describes properties of a stream after it has been + * created. + */ +struct ia_css_stream_info { + struct ia_css_metadata_info metadata_info; + /** Info about the metadata layout, this contains the stride. */ +}; + +/* @brief Load default stream configuration + * @param[in,out] stream_config The stream configuration. + * @return None + * + * This function will reset the stream configuration to the default state: +@code + memset(stream_config, 0, sizeof(*stream_config)); + stream_config->online = true; + stream_config->left_padding = -1; +@endcode + */ +void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config); + +/* + * create the internal structures and fill in the configuration data and pipes + */ + + /* @brief Creates a stream + * @param[in] stream_config The stream configuration. + * @param[in] num_pipes The number of pipes to incorporate in the stream. + * @param[in] pipes The pipes. + * @param[out] stream The stream. + * @return IA_CSS_SUCCESS or the error code. + * + * This function will create a stream with a given configuration and given pipes. + */ +enum ia_css_err +ia_css_stream_create(const struct ia_css_stream_config *stream_config, + int num_pipes, + struct ia_css_pipe *pipes[], + struct ia_css_stream **stream); + +/* @brief Destroys a stream + * @param[in] stream The stream. + * @return IA_CSS_SUCCESS or the error code. + * + * This function will destroy a given stream. + */ +enum ia_css_err +ia_css_stream_destroy(struct ia_css_stream *stream); + +/* @brief Provides information about a stream + * @param[in] stream The stream. + * @param[out] stream_info The information about the stream. + * @return IA_CSS_SUCCESS or the error code. + * + * This function will destroy a given stream. + */ +enum ia_css_err +ia_css_stream_get_info(const struct ia_css_stream *stream, + struct ia_css_stream_info *stream_info); + +/* @brief load (rebuild) a stream that was unloaded. + * @param[in] stream The stream + * @return IA_CSS_SUCCESS or the error code + * + * Rebuild a stream, including allocating structs, setting configuration and + * building the required pipes. + */ +enum ia_css_err +ia_css_stream_load(struct ia_css_stream *stream); + +/* @brief Starts the stream. + * @param[in] stream The stream. + * @return IA_CSS_SUCCESS or the error code. + * + * The dynamic data in + * the buffers are not used and need to be queued with a separate call + * to ia_css_pipe_enqueue_buffer. + * NOTE: this function will only send start event to corresponding + * thread and will not start SP any more. + */ +enum ia_css_err +ia_css_stream_start(struct ia_css_stream *stream); + +/* @brief Stop the stream. + * @param[in] stream The stream. + * @return IA_CSS_SUCCESS or the error code. + * + * NOTE: this function will send stop event to pipes belong to this + * stream but will not terminate threads. + */ +enum ia_css_err +ia_css_stream_stop(struct ia_css_stream *stream); + +/* @brief Check if a stream has stopped + * @param[in] stream The stream. + * @return boolean flag + * + * This function will check if the stream has stopped and return the correspondent boolean flag. + */ +bool +ia_css_stream_has_stopped(struct ia_css_stream *stream); + +/* @brief destroy a stream according to the stream seed previosly saved in the seed array. + * @param[in] stream The stream. + * @return IA_CSS_SUCCESS (no other errors are generated now) + * + * Destroy the stream and all the pipes related to it. + */ +enum ia_css_err +ia_css_stream_unload(struct ia_css_stream *stream); + +/* @brief Returns stream format + * @param[in] stream The stream. + * @return format of the string + * + * This function will return the stream format. + */ +enum atomisp_input_format +ia_css_stream_get_format(const struct ia_css_stream *stream); + +/* @brief Check if the stream is configured for 2 pixels per clock + * @param[in] stream The stream. + * @return boolean flag + * + * This function will check if the stream is configured for 2 pixels per clock and + * return the correspondent boolean flag. + */ +bool +ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream); + +/* @brief Sets the output frame stride (at the last pipe) + * @param[in] stream The stream + * @param[in] output_padded_width - the output buffer stride. + * @return ia_css_err + * + * This function will Set the output frame stride (at the last pipe) + */ +enum ia_css_err +ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, unsigned int output_padded_width); + +/* @brief Return max number of continuous RAW frames. + * @param[in] stream The stream. + * @param[out] buffer_depth The maximum number of continuous RAW frames. + * @return IA_CSS_SUCCESS or IA_CSS_ERR_INVALID_ARGUMENTS + * + * This function will return the maximum number of continuous RAW frames + * the system can support. + */ +enum ia_css_err +ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth); + +/* @brief Set nr of continuous RAW frames to use. + * + * @param[in] stream The stream. + * @param[in] buffer_depth Number of frames to set. + * @return IA_CSS_SUCCESS or error code upon error. + * + * Set the number of continuous frames to use during continuous modes. + */ +enum ia_css_err +ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth); + +/* @brief Get number of continuous RAW frames to use. + * @param[in] stream The stream. + * @param[out] buffer_depth The number of frames to use + * @return IA_CSS_SUCCESS or IA_CSS_ERR_INVALID_ARGUMENTS + * + * Get the currently set number of continuous frames + * to use during continuous modes. + */ +enum ia_css_err +ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth); + +/* ===== CAPTURE ===== */ + +/* @brief Configure the continuous capture + * + * @param[in] stream The stream. + * @param[in] num_captures The number of RAW frames to be processed to + * YUV. Setting this to -1 will make continuous + * capture run until it is stopped. + * This number will also be used to allocate RAW + * buffers. To allow the viewfinder to also + * keep operating, 2 extra buffers will always be + * allocated. + * If the offset is negative and the skip setting + * is greater than 0, additional buffers may be + * needed. + * @param[in] skip Skip N frames in between captures. This can be + * used to select a slower capture frame rate than + * the sensor output frame rate. + * @param[in] offset Start the RAW-to-YUV processing at RAW buffer + * with this offset. This allows the user to + * process RAW frames that were captured in the + * past or future. + * @return IA_CSS_SUCCESS or error code upon error. + * + * For example, to capture the current frame plus the 2 previous + * frames and 2 subsequent frames, you would call + * ia_css_stream_capture(5, 0, -2). + */ +enum ia_css_err +ia_css_stream_capture(struct ia_css_stream *stream, + int num_captures, + unsigned int skip, + int offset); + +/* @brief Specify which raw frame to tag based on exp_id found in frame info + * + * @param[in] stream The stream. + * @param[in] exp_id The exposure id of the raw frame to tag. + * + * @return IA_CSS_SUCCESS or error code upon error. + * + * This function allows the user to tag a raw frame based on the exposure id + * found in the viewfinder frames' frame info. + */ +enum ia_css_err +ia_css_stream_capture_frame(struct ia_css_stream *stream, + unsigned int exp_id); + +/* ===== VIDEO ===== */ + +/* @brief Send streaming data into the css input FIFO + * + * @param[in] stream The stream. + * @param[in] data Pointer to the pixels to be send. + * @param[in] width Width of the input frame. + * @param[in] height Height of the input frame. + * @return None + * + * Send streaming data into the css input FIFO. This is for testing purposes + * only. This uses the channel ID and input format as set by the user with + * the regular functions for this. + * This function blocks until the entire frame has been written into the + * input FIFO. + * + * Note: + * For higher flexibility the ia_css_stream_send_input_frame is replaced by + * three separate functions: + * 1) ia_css_stream_start_input_frame + * 2) ia_css_stream_send_input_line + * 3) ia_css_stream_end_input_frame + * In this way it is possible to stream multiple frames on different + * channel ID's on a line basis. It will be possible to simulate + * line-interleaved Stereo 3D muxed on 1 mipi port. + * These 3 functions are for testing purpose only and can be used in + * conjunction with ia_css_stream_send_input_frame + */ +void +ia_css_stream_send_input_frame(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + unsigned int height); + +/* @brief Start an input frame on the CSS input FIFO. + * + * @param[in] stream The stream. + * @return None + * + * Starts the streaming to mipi frame by sending SoF for channel channel_id. + * It will use the input_format and two_pixels_per_clock as provided by + * the user. + * For the "correct" use-case, input_format and two_pixels_per_clock must match + * with the values as set by the user with the regular functions. + * To simulate an error, the user can provide "incorrect" values for + * input_format and/or two_pixels_per_clock. + */ +void +ia_css_stream_start_input_frame(const struct ia_css_stream *stream); + +/* @brief Send a line of input data into the CSS input FIFO. + * + * @param[in] stream The stream. + * @param[in] data Array of the first line of image data. + * @param width The width (in pixels) of the first line. + * @param[in] data2 Array of the second line of image data. + * @param width2 The width (in pixels) of the second line. + * @return None + * + * Sends 1 frame line. Start with SoL followed by width bytes of data, followed + * by width2 bytes of data2 and followed by and EoL + * It will use the input_format and two_pixels_per_clock settings as provided + * with the ia_css_stream_start_input_frame function call. + * + * This function blocks until the entire line has been written into the + * input FIFO. + */ +void +ia_css_stream_send_input_line(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2); + +/* @brief Send a line of input embedded data into the CSS input FIFO. + * + * @param[in] stream Pointer of the stream. + * @param[in] format Format of the embedded data. + * @param[in] data Pointer of the embedded data line. + * @param[in] width The width (in pixels) of the line. + * @return None + * + * Sends one embedded data line to input fifo. Start with SoL followed by + * width bytes of data, and followed by and EoL. + * It will use the two_pixels_per_clock settings as provided with the + * ia_css_stream_start_input_frame function call. + * + * This function blocks until the entire line has been written into the + * input FIFO. + */ +void +ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, + enum atomisp_input_format format, + const unsigned short *data, + unsigned int width); + +/* @brief End an input frame on the CSS input FIFO. + * + * @param[in] stream The stream. + * @return None + * + * Send the end-of-frame signal into the CSS input FIFO. + */ +void +ia_css_stream_end_input_frame(const struct ia_css_stream *stream); + +/* @brief send a request flash command to SP + * + * @param[in] stream The stream. + * @return None + * + * Driver needs to call this function to send a flash request command + * to SP, SP will be responsible for switching on/off the flash at proper + * time. Due to the SP multi-threading environment, this request may have + * one-frame delay, the driver needs to check the flashed flag in frame info + * to determine which frame is being flashed. + */ +void +ia_css_stream_request_flash(struct ia_css_stream *stream); + +/* @brief Configure a stream with filter coefficients. + * @deprecated {Replaced by + * ia_css_pipe_set_isp_config_on_pipe()} + * + * @param[in] stream The stream. + * @param[in] config The set of filter coefficients. + * @param[in] pipe Pipe to be updated when set isp config, NULL means to + * update all pipes in the stream. + * @return IA_CSS_SUCCESS or error code upon error. + * + * This function configures the filter coefficients for an image + * stream. For image pipes that do not execute any ISP filters, this + * function will have no effect. + * It is safe to call this function while the image stream is running, + * in fact this is the expected behavior most of the time. Proper + * resource locking and double buffering is in place to allow for this. + */ +enum ia_css_err +ia_css_stream_set_isp_config_on_pipe(struct ia_css_stream *stream, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe); + +/* @brief Configure a stream with filter coefficients. + * @deprecated {Replaced by + * ia_css_pipe_set_isp_config()} + * @param[in] stream The stream. + * @param[in] config The set of filter coefficients. + * @return IA_CSS_SUCCESS or error code upon error. + * + * This function configures the filter coefficients for an image + * stream. For image pipes that do not execute any ISP filters, this + * function will have no effect. All pipes of a stream will be updated. + * See ::ia_css_stream_set_isp_config_on_pipe() for the per-pipe alternative. + * It is safe to call this function while the image stream is running, + * in fact this is the expected behaviour most of the time. Proper + * resource locking and double buffering is in place to allow for this. + */ +enum ia_css_err +ia_css_stream_set_isp_config( + struct ia_css_stream *stream, + const struct ia_css_isp_config *config); + +/* @brief Get selected configuration settings + * @param[in] stream The stream. + * @param[out] config Configuration settings. + * @return None + */ +void +ia_css_stream_get_isp_config(const struct ia_css_stream *stream, + struct ia_css_isp_config *config); + +/* @brief allocate continuous raw frames for continuous capture + * @param[in] stream The stream. + * @return IA_CSS_SUCCESS or error code. + * + * because this allocation takes a long time (around 120ms per frame), + * we separate the allocation part and update part to let driver call + * this function without locking. This function is the allocation part + * and next one is update part + */ +enum ia_css_err +ia_css_alloc_continuous_frame_remain(struct ia_css_stream *stream); + +/* @brief allocate continuous raw frames for continuous capture + * @param[in] stream The stream. + * @return IA_CSS_SUCCESS or error code. + * + * because this allocation takes a long time (around 120ms per frame), + * we separate the allocation part and update part to let driver call + * this function without locking. This function is the update part + */ +enum ia_css_err +ia_css_update_continuous_frames(struct ia_css_stream *stream); + +/* @brief ia_css_unlock_raw_frame . unlock a raw frame (HALv3 Support) + * @param[in] stream The stream. + * @param[in] exp_id exposure id that uniquely identifies the locked Raw Frame Buffer + * @return ia_css_err IA_CSS_SUCCESS or error code + * + * As part of HALv3 Feature requirement, SP locks raw buffer until the Application + * releases its reference to a raw buffer (which are managed by SP), this function allows + * application to explicitly unlock that buffer in SP. + */ +enum ia_css_err +ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id); + +/* @brief ia_css_en_dz_capt_pipe . Enable/Disable digital zoom for capture pipe + * @param[in] stream The stream. + * @param[in] enable - true, disable - false + * @return None + * + * Enables or disables digital zoom for capture pipe in provided stream, if capture pipe + * exists. This function sets enable_zoom flag in CAPTURE_PP stage of the capture pipe. + * In process_zoom_and_motion(), decision to enable or disable zoom for every stage depends + * on this flag. + */ +void +ia_css_en_dz_capt_pipe(struct ia_css_stream *stream, bool enable); +#endif /* __IA_CSS_STREAM_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h new file mode 100644 index 0000000000000..b256d7c88716c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h @@ -0,0 +1,84 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_TIMER_H +#define __IA_CSS_TIMER_H + +/* @file + * Timer interface definitions + */ +#include /* for uint32_t */ +#include "ia_css_err.h" + +/* @brief timer reading definition */ +typedef uint32_t clock_value_t; + +/* @brief 32 bit clock tick,(timestamp based on timer-value of CSS-internal timer)*/ +struct ia_css_clock_tick { + clock_value_t ticks; /** measured time in ticks.*/ +}; + +/* @brief TIMER event codes */ +enum ia_css_tm_event { + IA_CSS_TM_EVENT_AFTER_INIT, + /** Timer Event after Initialization */ + IA_CSS_TM_EVENT_MAIN_END, + /** Timer Event after end of Main */ + IA_CSS_TM_EVENT_THREAD_START, + /** Timer Event after thread start */ + IA_CSS_TM_EVENT_FRAME_PROC_START, + /** Timer Event after Frame Process Start */ + IA_CSS_TM_EVENT_FRAME_PROC_END + /** Timer Event after Frame Process End */ +}; + +/* @brief code measurement common struct */ +struct ia_css_time_meas { + clock_value_t start_timer_value; /** measured time in ticks */ + clock_value_t end_timer_value; /** measured time in ticks */ +}; + +/**@brief SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT checks to ensure correct alignment for struct ia_css_clock_tick. */ +#define SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT sizeof(clock_value_t) +/* @brief checks to ensure correct alignment for ia_css_time_meas. */ +#define SIZE_OF_IA_CSS_TIME_MEAS_STRUCT (sizeof(clock_value_t) \ + + sizeof(clock_value_t)) + +/* @brief API to fetch timer count directly +* +* @param curr_ts [out] measured count value +* @return IA_CSS_SUCCESS if success +* +*/ +enum ia_css_err +ia_css_timer_get_current_tick( + struct ia_css_clock_tick *curr_ts); + +#endif /* __IA_CSS_TIMER_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h new file mode 100644 index 0000000000000..81498bd7485b7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h @@ -0,0 +1,78 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TPG_H +#define __IA_CSS_TPG_H + +/* @file + * This file contains support for the test pattern generator (TPG) + */ + +/* Enumerate the TPG IDs. + */ +enum ia_css_tpg_id { + IA_CSS_TPG_ID0, + IA_CSS_TPG_ID1, + IA_CSS_TPG_ID2 +}; + +/** + * Maximum number of TPG IDs. + * + * Make sure the value of this define gets changed to reflect the correct + * number of ia_css_tpg_id enum if you add/delete an item in the enum. + */ +#define N_CSS_TPG_IDS (IA_CSS_TPG_ID2+1) + +/* Enumerate the TPG modes. + */ +enum ia_css_tpg_mode { + IA_CSS_TPG_MODE_RAMP, + IA_CSS_TPG_MODE_CHECKERBOARD, + IA_CSS_TPG_MODE_FRAME_BASED_COLOR, + IA_CSS_TPG_MODE_MONO +}; + +/* @brief Configure the test pattern generator. + * + * Configure the Test Pattern Generator, the way these values are used to + * generate the pattern can be seen in the HRT extension for the test pattern + * generator: + * devices/test_pat_gen/hrt/include/test_pat_gen.h: hrt_calc_tpg_data(). + * + * This interface is deprecated, it is not portable -> move to input system API + * +@code +unsigned int test_pattern_value(unsigned int x, unsigned int y) +{ + unsigned int x_val, y_val; + if (x_delta > 0) (x_val = (x << x_delta) & x_mask; + else (x_val = (x >> -x_delta) & x_mask; + if (y_delta > 0) (y_val = (y << y_delta) & y_mask; + else (y_val = (y >> -y_delta) & x_mask; + return (x_val + y_val) & xy_mask; +} +@endcode + */ +struct ia_css_tpg_config { + enum ia_css_tpg_id id; + enum ia_css_tpg_mode mode; + unsigned int x_mask; + int x_delta; + unsigned int y_mask; + int y_delta; + unsigned int xy_mask; +}; + +#endif /* __IA_CSS_TPG_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h new file mode 100644 index 0000000000000..259ab3f074bab --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h @@ -0,0 +1,616 @@ +/* Release Version: irci_stable_candrpv_0415_20150521_0458 */ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_TYPES_H +#define _IA_CSS_TYPES_H + +/* @file + * This file contains types used for the ia_css parameters. + * These types are in a separate file because they are expected + * to be used in software layers that do not access the CSS API + * directly but still need to forward parameters for it. + */ + +#include + +#include "ia_css_frac.h" + +#include "isp/kernels/aa/aa_2/ia_css_aa2_types.h" +#include "isp/kernels/anr/anr_1.0/ia_css_anr_types.h" +#include "isp/kernels/anr/anr_2/ia_css_anr2_types.h" +#include "isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h" +#include "isp/kernels/csc/csc_1.0/ia_css_csc_types.h" +#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h" +#include "isp/kernels/dp/dp_1.0/ia_css_dp_types.h" +#include "isp/kernels/de/de_1.0/ia_css_de_types.h" +#include "isp/kernels/de/de_2/ia_css_de2_types.h" +#include "isp/kernels/fc/fc_1.0/ia_css_formats_types.h" +#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h" +#include "isp/kernels/gc/gc_1.0/ia_css_gc_types.h" +#include "isp/kernels/gc/gc_2/ia_css_gc2_types.h" +#include "isp/kernels/macc/macc_1.0/ia_css_macc_types.h" +#include "isp/kernels/ob/ob_1.0/ia_css_ob_types.h" +#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h" +#include "isp/kernels/sc/sc_1.0/ia_css_sc_types.h" +#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h" +#include "isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h" +#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h" +#include "isp/kernels/wb/wb_1.0/ia_css_wb_types.h" +#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h" +#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h" +#ifdef ISP2401 +#include "isp/kernels/tnr/tnr3/ia_css_tnr3_types.h" +#endif +#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h" +#include "isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h" +#include "isp/kernels/output/output_1.0/ia_css_output_types.h" + +#define IA_CSS_DVS_STAT_GRID_INFO_SUPPORTED +/** Should be removed after Driver adaptation will be done */ + +#define IA_CSS_VERSION_MAJOR 2 +#define IA_CSS_VERSION_MINOR 0 +#define IA_CSS_VERSION_REVISION 2 + +#define IA_CSS_MORPH_TABLE_NUM_PLANES 6 + +/* Min and max exposure IDs. These macros are here to allow + * the drivers to get this information. Changing these macros + * constitutes a CSS API change. */ +#define IA_CSS_ISYS_MIN_EXPOSURE_ID 1 /** Minimum exposure ID */ +#define IA_CSS_ISYS_MAX_EXPOSURE_ID 250 /** Maximum exposure ID */ + +/* opaque types */ +struct ia_css_isp_parameters; +struct ia_css_pipe; +struct ia_css_memory_offsets; +struct ia_css_config_memory_offsets; +struct ia_css_state_memory_offsets; + +/* Virtual address within the CSS address space. */ +typedef uint32_t ia_css_ptr; + +/* Generic resolution structure. + */ +struct ia_css_resolution { + uint32_t width; /** Width */ + uint32_t height; /** Height */ +}; + +/* Generic coordinate structure. + */ +struct ia_css_coordinate { + int32_t x; /** Value of a coordinate on the horizontal axis */ + int32_t y; /** Value of a coordinate on the vertical axis */ +}; + +/* Vector with signed values. This is used to indicate motion for + * Digital Image Stabilization. + */ +struct ia_css_vector { + int32_t x; /** horizontal motion (in pixels) */ + int32_t y; /** vertical motion (in pixels) */ +}; + +/* Short hands */ +#define IA_CSS_ISP_DMEM IA_CSS_ISP_DMEM0 +#define IA_CSS_ISP_VMEM IA_CSS_ISP_VMEM0 + +/* CSS data descriptor */ +struct ia_css_data { + ia_css_ptr address; /** CSS virtual address */ + uint32_t size; /** Disabled if 0 */ +}; + +/* Host data descriptor */ +struct ia_css_host_data { + char *address; /** Host address */ + uint32_t size; /** Disabled if 0 */ +}; + +/* ISP data descriptor */ +struct ia_css_isp_data { + uint32_t address; /** ISP address */ + uint32_t size; /** Disabled if 0 */ +}; + +/* Shading Correction types. */ +enum ia_css_shading_correction_type { +#ifndef ISP2401 + IA_CSS_SHADING_CORRECTION_TYPE_1 /** Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400) */ +#else + IA_CSS_SHADING_CORRECTION_NONE, /** Shading Correction is not processed in the pipe. */ + IA_CSS_SHADING_CORRECTION_TYPE_1 /** Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400/2401) */ +#endif + + /** More shading correction types can be added in the future. */ +}; + +/* Shading Correction information. */ +struct ia_css_shading_info { + enum ia_css_shading_correction_type type; /** Shading Correction type. */ + + union { /* Shading Correction information of each Shading Correction types. */ + + /* Shading Correction information of IA_CSS_SHADING_CORRECTION_TYPE_1. + * + * This structure contains the information necessary to generate + * the shading table required in the isp. + * This structure is filled in the css, + * and the driver needs to get it to generate the shading table. + * + * Before the shading correction is applied, NxN-filter and/or scaling + * are applied in the isp, depending on the isp binaries. + * Then, these should be considered in generating the shading table. + * - Bad pixels on left/top sides generated by NxN-filter + * (Bad pixels are NOT considered currently, + * because they are subtle.) + * - Down-scaling/Up-scaling factor + * + * Shading correction is applied to the area + * which has real sensor data and margin. + * Then, the shading table should cover the area including margin. + * This structure has this information. + * - Origin coordinate of bayer (real sensor data) + * on the shading table + * + * ------------------------ISP 2401----------------------- + * + * the shading table directly required from ISP. + * This structure is filled in CSS, and the driver needs to get it to generate the shading table. + * + * The shading correction is applied to the bayer area which contains sensor data and padding data. + * The shading table should cover this bayer area. + * + * The shading table size directly required from ISP is expressed by these parameters. + * 1. uint32_t num_hor_grids; + * 2. uint32_t num_ver_grids; + * 3. uint32_t bqs_per_grid_cell; + * + * In some isp binaries, the bayer scaling is applied before the shading correction is applied. + * Then, this scaling factor should be considered in generating the shading table. + * The scaling factor is expressed by these parameters. + * 4. uint32_t bayer_scale_hor_ratio_in; + * 5. uint32_t bayer_scale_hor_ratio_out; + * 6. uint32_t bayer_scale_ver_ratio_in; + * 7. uint32_t bayer_scale_ver_ratio_out; + * + * The sensor data size inputted to ISP is expressed by this parameter. + * This is the size BEFORE the bayer scaling is applied. + * 8. struct ia_css_resolution isp_input_sensor_data_res_bqs; + * + * The origin of the sensor data area positioned on the shading table at the shading correction + * is expressed by this parameter. + * The size of this area assumes the size AFTER the bayer scaling is applied + * to the isp_input_sensor_data_resolution_bqs. + * 9. struct ia_css_coordinate sensor_data_origin_bqs_on_sctbl; + * + * ****** Definitions of the shading table and the sensor data at the shading correction ****** + * + * (0,0)--------------------- TW ------------------------------- + * | shading table | + * | (ox,oy)---------- W -------------------------- | + * | | sensor data | | + * | | | | + * TH H sensor data center | | + * | | (cx,cy) | | + * | | | | + * | | | | + * | | | | + * | ------------------------------------------- | + * | | + * ---------------------------------------------------------- + * + * Example of still mode for output 1080p: + * + * num_hor_grids = 66 + * num_ver_grids = 37 + * bqs_per_grid_cell = 16 + * bayer_scale_hor_ratio_in = 1 + * bayer_scale_hor_ratio_out = 1 + * bayer_scale_ver_ratio_in = 1 + * bayer_scale_ver_ratio_out = 1 + * isp_input_sensor_data_resolution_bqs = {966, 546} + * sensor_data_origin_bqs_on_sctbl = {61, 15} + * + * TW, TH [bqs]: width and height of shading table + * TW = (num_hor_grids - 1) * bqs_per_grid_cell = (66 - 1) * 16 = 1040 + * TH = (num_ver_grids - 1) * bqs_per_grid_cell = (37 - 1) * 16 = 576 + * + * W, H [bqs]: width and height of sensor data at shading correction + * W = sensor_data_res_bqs.width + * = isp_input_sensor_data_res_bqs.width + * * bayer_scale_hor_ratio_out / bayer_scale_hor_ratio_in + 0.5 = 966 + * H = sensor_data_res_bqs.height + * = isp_input_sensor_data_res_bqs.height + * * bayer_scale_ver_ratio_out / bayer_scale_ver_ratio_in + 0.5 = 546 + * + * (ox, oy) [bqs]: origin of sensor data positioned on shading table at shading correction + * ox = sensor_data_origin_bqs_on_sctbl.x = 61 + * oy = sensor_data_origin_bqs_on_sctbl.y = 15 + * + * (cx, cy) [bqs]: center of sensor data positioned on shading table at shading correction + * cx = ox + W/2 = 61 + 966/2 = 544 + * cy = oy + H/2 = 15 + 546/2 = 288 + * + * ****** Relation between the shading table and the sensor data ****** + * + * The origin of the sensor data should be on the shading table. + * 0 <= ox < TW, 0 <= oy < TH + * + * ****** How to center the shading table on the sensor data ****** + * + * To center the shading table on the sensor data, + * CSS decides the shading table size so that a certain grid point is positioned + * on the center of the sensor data at the shading correction. + * CSS expects the shading center is set on this grid point + * when the shading table data is calculated in AIC. + * + * W, H [bqs]: width and height of sensor data at shading correction + * W = sensor_data_res_bqs.width + * H = sensor_data_res_bqs.height + * + * (cx, cy) [bqs]: center of sensor data positioned on shading table at shading correction + * cx = sensor_data_origin_bqs_on_sctbl.x + W/2 + * cy = sensor_data_origin_bqs_on_sctbl.y + H/2 + * + * CSS decides the shading table size and the sensor data position + * so that the (cx, cy) satisfies this condition. + * mod(cx, bqs_per_grid_cell) = 0 + * mod(cy, bqs_per_grid_cell) = 0 + * + * ****** How to change the sensor data size by processes in the driver and ISP ****** + * + * 1. sensor data size: Physical sensor size + * (The struct ia_css_shading_info does not have this information.) + * 2. process: Driver applies the sensor cropping/binning/scaling to physical sensor size. + * 3. sensor data size: ISP input size (== shading_info.isp_input_sensor_data_res_bqs) + * (ISP assumes the ISP input sensor data is centered on the physical sensor.) + * 4. process: ISP applies the bayer scaling by the factor of shading_info.bayer_scale_*. + * 5. sensor data size: Scaling factor * ISP input size (== shading_info.sensor_data_res_bqs) + * 6. process: ISP applies the shading correction. + * + * ISP block: SC1 + * ISP1: SC1 is used. + * ISP2: SC1 is used. + */ + struct { +#ifndef ISP2401 + uint32_t enable; /** Shading correction enabled. + 0:disabled, 1:enabled */ + uint32_t num_hor_grids; /** Number of data points per line + per color on shading table. */ + uint32_t num_ver_grids; /** Number of lines of data points + per color on shading table. */ + uint32_t bqs_per_grid_cell; /** Grid cell size + in BQ(Bayer Quad) unit. + (1BQ means {Gr,R,B,Gb}(2x2 pixels).) + Valid values are 8,16,32,64. */ +#else + uint32_t num_hor_grids; /** Number of data points per line per color on shading table. */ + uint32_t num_ver_grids; /** Number of lines of data points per color on shading table. */ + uint32_t bqs_per_grid_cell; /** Grid cell size in BQ unit. + NOTE: bqs = size in BQ(Bayer Quad) unit. + 1BQ means {Gr,R,B,Gb} (2x2 pixels). + Horizontal 1 bqs corresponds to horizontal 2 pixels. + Vertical 1 bqs corresponds to vertical 2 pixels. */ +#endif + uint32_t bayer_scale_hor_ratio_in; + uint32_t bayer_scale_hor_ratio_out; +#ifndef ISP2401 + /** Horizontal ratio of bayer scaling + between input width and output width, for the scaling + which should be done before shading correction. + output_width = input_width * bayer_scale_hor_ratio_out + / bayer_scale_hor_ratio_in */ +#else + /** Horizontal ratio of bayer scaling between input width and output width, + for the scaling which should be done before shading correction. + output_width = input_width * bayer_scale_hor_ratio_out + / bayer_scale_hor_ratio_in + 0.5 */ +#endif + uint32_t bayer_scale_ver_ratio_in; + uint32_t bayer_scale_ver_ratio_out; +#ifndef ISP2401 + /** Vertical ratio of bayer scaling + between input height and output height, for the scaling + which should be done before shading correction. + output_height = input_height * bayer_scale_ver_ratio_out + / bayer_scale_ver_ratio_in */ + uint32_t sc_bayer_origin_x_bqs_on_shading_table; + /** X coordinate (in bqs) of bayer origin on shading table. + This indicates the left-most pixel of bayer + (not include margin) inputted to the shading correction. + This corresponds to the left-most pixel of bayer + inputted to isp from sensor. */ + uint32_t sc_bayer_origin_y_bqs_on_shading_table; + /** Y coordinate (in bqs) of bayer origin on shading table. + This indicates the top pixel of bayer + (not include margin) inputted to the shading correction. + This corresponds to the top pixel of bayer + inputted to isp from sensor. */ +#else + /** Vertical ratio of bayer scaling between input height and output height, + for the scaling which should be done before shading correction. + output_height = input_height * bayer_scale_ver_ratio_out + / bayer_scale_ver_ratio_in + 0.5 */ + struct ia_css_resolution isp_input_sensor_data_res_bqs; + /** Sensor data size (in bqs) inputted to ISP. This is the size BEFORE bayer scaling. + NOTE: This is NOT the size of the physical sensor size. + CSS requests the driver that ISP inputs sensor data + by the size of isp_input_sensor_data_res_bqs. + The driver sends the sensor data to ISP, + after the adequate cropping/binning/scaling + are applied to the physical sensor data area. + ISP assumes the area of isp_input_sensor_data_res_bqs + is centered on the physical sensor. */ + struct ia_css_resolution sensor_data_res_bqs; + /** Sensor data size (in bqs) at shading correction. + This is the size AFTER bayer scaling. */ + struct ia_css_coordinate sensor_data_origin_bqs_on_sctbl; + /** Origin of sensor data area positioned on shading table at shading correction. + The coordinate x,y should be positive values. */ +#endif + } type_1; + + /** More structures can be added here when more shading correction types will be added + in the future. */ + } info; +}; + +/* Default Shading Correction information of Shading Correction Type 1. */ +#define DEFAULT_SHADING_INFO_TYPE_1 \ +(struct ia_css_shading_info) { \ + .type = IA_CSS_SHADING_CORRECTION_TYPE_1, \ + .info = { \ + .type_1 = { \ + .bayer_scale_hor_ratio_in = 1, \ + .bayer_scale_hor_ratio_out = 1, \ + .bayer_scale_ver_ratio_in = 1, \ + .bayer_scale_ver_ratio_out = 1, \ + } \ + } \ +} + +/* Default Shading Correction information. */ +#define DEFAULT_SHADING_INFO DEFAULT_SHADING_INFO_TYPE_1 + +/* structure that describes the 3A and DIS grids */ +struct ia_css_grid_info { + /* \name ISP input size + * that is visible for user + * @{ + */ + uint32_t isp_in_width; + uint32_t isp_in_height; + /* @}*/ + + struct ia_css_3a_grid_info s3a_grid; /** 3A grid info */ + union ia_css_dvs_grid_u dvs_grid; + /** All types of DVS statistics grid info union */ + + enum ia_css_vamem_type vamem_type; +}; + +/* defaults for ia_css_grid_info structs */ +#define DEFAULT_GRID_INFO \ +(struct ia_css_grid_info) { \ + .dvs_grid = DEFAULT_DVS_GRID_INFO, \ + .vamem_type = IA_CSS_VAMEM_TYPE_1 \ +} + +/* Morphing table, used for geometric distortion and chromatic abberration + * correction (GDCAC, also called GDC). + * This table describes the imperfections introduced by the lens, the + * advanced ISP can correct for these imperfections using this table. + */ +struct ia_css_morph_table { + uint32_t enable; /** To disable GDC, set this field to false. The + coordinates fields can be set to NULL in this case. */ + uint32_t height; /** Table height */ + uint32_t width; /** Table width */ + uint16_t *coordinates_x[IA_CSS_MORPH_TABLE_NUM_PLANES]; + /** X coordinates that describe the sensor imperfection */ + uint16_t *coordinates_y[IA_CSS_MORPH_TABLE_NUM_PLANES]; + /** Y coordinates that describe the sensor imperfection */ +}; + +struct ia_css_dvs_6axis_config { + unsigned int exp_id; + /** Exposure ID, see ia_css_event_public.h for more detail */ + uint32_t width_y; + uint32_t height_y; + uint32_t width_uv; + uint32_t height_uv; + uint32_t *xcoords_y; + uint32_t *ycoords_y; + uint32_t *xcoords_uv; + uint32_t *ycoords_uv; +}; + +/** + * This specifies the coordinates (x,y) + */ +struct ia_css_point { + int32_t x; /** x coordinate */ + int32_t y; /** y coordinate */ +}; + +/** + * This specifies the region + */ +struct ia_css_region { + struct ia_css_point origin; /** Starting point coordinates for the region */ + struct ia_css_resolution resolution; /** Region resolution */ +}; + +/** + * Digital zoom: + * This feature is currently available only for video, but will become + * available for preview and capture as well. + * Set the digital zoom factor, this is a logarithmic scale. The actual zoom + * factor will be 64/x. + * Setting dx or dy to 0 disables digital zoom for that direction. + * New API change for Digital zoom:(added struct ia_css_region zoom_region) + * zoom_region specifies the origin of the zoom region and width and + * height of that region. + * origin : This is the coordinate (x,y) within the effective input resolution + * of the stream. where, x >= 0 and y >= 0. (0,0) maps to the upper left of the + * effective input resolution. + * resolution : This is resolution of zoom region. + * where, x + width <= effective input width + * y + height <= effective input height + */ +struct ia_css_dz_config { + uint32_t dx; /** Horizontal zoom factor */ + uint32_t dy; /** Vertical zoom factor */ + struct ia_css_region zoom_region; /** region for zoom */ +}; + +/* The still capture mode, this can be RAW (simply copy sensor input to DDR), + * Primary ISP, the Advanced ISP (GDC) or the low-light ISP (ANR). + */ +enum ia_css_capture_mode { + IA_CSS_CAPTURE_MODE_RAW, /** no processing, copy data only */ + IA_CSS_CAPTURE_MODE_BAYER, /** bayer processing, up to demosaic */ + IA_CSS_CAPTURE_MODE_PRIMARY, /** primary ISP */ + IA_CSS_CAPTURE_MODE_ADVANCED, /** advanced ISP (GDC) */ + IA_CSS_CAPTURE_MODE_LOW_LIGHT /** low light ISP (ANR) */ +}; + +struct ia_css_capture_config { + enum ia_css_capture_mode mode; /** Still capture mode */ + uint32_t enable_xnr; /** Enable/disable XNR */ + uint32_t enable_raw_output; + bool enable_capture_pp_bli; /** Enable capture_pp_bli mode */ +}; + +/* default settings for ia_css_capture_config structs */ +#define DEFAULT_CAPTURE_CONFIG \ +(struct ia_css_capture_config) { \ + .mode = IA_CSS_CAPTURE_MODE_PRIMARY, \ +} + + +/* ISP filter configuration. This is a collection of configurations + * for each of the ISP filters (modules). + * + * NOTE! The contents of all pointers is copied when get or set with the + * exception of the shading and morph tables. For these we only copy the + * pointer, so the caller must make sure the memory contents of these pointers + * remain valid as long as they are used by the CSS. This will be fixed in the + * future by copying the contents instead of just the pointer. + * + * Comment: + * ["ISP block", 1&2] : ISP block is used both for ISP1 and ISP2. + * ["ISP block", 1only] : ISP block is used only for ISP1. + * ["ISP block", 2only] : ISP block is used only for ISP2. + */ +struct ia_css_isp_config { + struct ia_css_wb_config *wb_config; /** White Balance + [WB1, 1&2] */ + struct ia_css_cc_config *cc_config; /** Color Correction + [CSC1, 1only] */ + struct ia_css_tnr_config *tnr_config; /** Temporal Noise Reduction + [TNR1, 1&2] */ + struct ia_css_ecd_config *ecd_config; /** Eigen Color Demosaicing + [DE2, 2only] */ + struct ia_css_ynr_config *ynr_config; /** Y(Luma) Noise Reduction + [YNR2&YEE2, 2only] */ + struct ia_css_fc_config *fc_config; /** Fringe Control + [FC2, 2only] */ + struct ia_css_formats_config *formats_config; /** Formats Control for main output + [FORMATS, 1&2] */ + struct ia_css_cnr_config *cnr_config; /** Chroma Noise Reduction + [CNR2, 2only] */ + struct ia_css_macc_config *macc_config; /** MACC + [MACC2, 2only] */ + struct ia_css_ctc_config *ctc_config; /** Chroma Tone Control + [CTC2, 2only] */ + struct ia_css_aa_config *aa_config; /** YUV Anti-Aliasing + [AA2, 2only] + (not used currently) */ + struct ia_css_aa_config *baa_config; /** Bayer Anti-Aliasing + [BAA2, 1&2] */ + struct ia_css_ce_config *ce_config; /** Chroma Enhancement + [CE1, 1only] */ + struct ia_css_dvs_6axis_config *dvs_6axis_config; + struct ia_css_ob_config *ob_config; /** Objective Black + [OB1, 1&2] */ + struct ia_css_dp_config *dp_config; /** Defect Pixel Correction + [DPC1/DPC2, 1&2] */ + struct ia_css_nr_config *nr_config; /** Noise Reduction + [BNR1&YNR1&CNR1, 1&2]*/ + struct ia_css_ee_config *ee_config; /** Edge Enhancement + [YEE1, 1&2] */ + struct ia_css_de_config *de_config; /** Demosaic + [DE1, 1only] */ + struct ia_css_gc_config *gc_config; /** Gamma Correction (for YUV) + [GC1, 1only] */ + struct ia_css_anr_config *anr_config; /** Advanced Noise Reduction */ + struct ia_css_3a_config *s3a_config; /** 3A Statistics config */ + struct ia_css_xnr_config *xnr_config; /** eXtra Noise Reduction */ + struct ia_css_dz_config *dz_config; /** Digital Zoom */ + struct ia_css_cc_config *yuv2rgb_cc_config; /** Color Correction + [CCM2, 2only] */ + struct ia_css_cc_config *rgb2yuv_cc_config; /** Color Correction + [CSC2, 2only] */ + struct ia_css_macc_table *macc_table; /** MACC + [MACC1/MACC2, 1&2]*/ + struct ia_css_gamma_table *gamma_table; /** Gamma Correction (for YUV) + [GC1, 1only] */ + struct ia_css_ctc_table *ctc_table; /** Chroma Tone Control + [CTC1, 1only] */ + + /* \deprecated */ + struct ia_css_xnr_table *xnr_table; /** eXtra Noise Reduction + [XNR1, 1&2] */ + struct ia_css_rgb_gamma_table *r_gamma_table;/** sRGB Gamma Correction + [GC2, 2only] */ + struct ia_css_rgb_gamma_table *g_gamma_table;/** sRGB Gamma Correction + [GC2, 2only] */ + struct ia_css_rgb_gamma_table *b_gamma_table;/** sRGB Gamma Correction + [GC2, 2only] */ + struct ia_css_vector *motion_vector; /** For 2-axis DVS */ + struct ia_css_shading_table *shading_table; + struct ia_css_morph_table *morph_table; + struct ia_css_dvs_coefficients *dvs_coefs; /** DVS 1.0 coefficients */ + struct ia_css_dvs2_coefficients *dvs2_coefs; /** DVS 2.0 coefficients */ + struct ia_css_capture_config *capture_config; + struct ia_css_anr_thres *anr_thres; + /* @deprecated{Old shading settings, see bugzilla bz675 for details} */ + struct ia_css_shading_settings *shading_settings; + struct ia_css_xnr3_config *xnr3_config; /** eXtreme Noise Reduction v3 */ + /* comment from Lasse: Be aware how this feature will affect coordinate + * normalization in different parts of the system. (e.g. face detection, + * touch focus, 3A statistics and windows of interest, shading correction, + * DVS, GDC) from IQ tool level and application level down-to ISP FW level. + * the risk for regression is not in the individual blocks, but how they + * integrate together. */ + struct ia_css_output_config *output_config; /** Main Output Mirroring, flipping */ + +#ifdef ISP2401 + struct ia_css_tnr3_kernel_config *tnr3_config; /** TNR3 config */ +#endif + struct ia_css_scaler_config *scaler_config; /** Skylake: scaler config (optional) */ + struct ia_css_formats_config *formats_config_display;/** Formats control for viewfinder/display output (optional) + [OSYS, n/a] */ + struct ia_css_output_config *output_config_display; /** Viewfinder/display output mirroring, flipping (optional) */ + + struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ + uint32_t isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ +}; + +#endif /* _IA_CSS_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version.h new file mode 100644 index 0000000000000..1e88901e0b829 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_VERSION_H +#define __IA_CSS_VERSION_H + +/* @file + * This file contains functions to retrieve CSS-API version information + */ + +#include + +/* a common size for the version arrays */ +#define MAX_VERSION_SIZE 500 + +/* @brief Retrieves the current CSS version + * @param[out] version A pointer to a buffer where to put the generated + * version string. NULL is ignored. + * @param[in] max_size Size of the version buffer. If version string + * would be larger than max_size, an error is + * returned by this function. + * + * This function generates and returns the version string. If FW is loaded, it + * attaches the FW version. + */ +enum ia_css_err +ia_css_get_version(char *version, int max_size); + +#endif /* __IA_CSS_VERSION_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h new file mode 100644 index 0000000000000..aad592cb86ef0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h @@ -0,0 +1,33 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +// +// This file contains the version data for the CSS +// +// === Do not change - automatically generated === +// + +#ifndef __IA_CSS_VERSION_DATA_H +#define __IA_CSS_VERSION_DATA_H + + +#ifndef ISP2401 +#define CSS_VERSION_STRING "REL:20150521_21.4_0539; API:2.1.15.3; GIT:irci_candrpv_0415_20150504_35b345#35b345be52ac575f8934abb3a88fea26a94e7343; SDK:/nfs/iir/disks/iir_hivepackages_003/iir_hivepkgs_disk017/Css_Mizuchi/packages/Css_Mizuchi/int_css_mizuchi_20140829_1053; USER:viedifw; " +#else +#define CSS_VERSION_STRING "REL:20150911_37.5_1652; API:2.1.20.9; GIT:irci___#ebf437d53a8951bb7ff6d13fdb7270dab393a92a; SDK:; USER:viedifw; " +#endif + + +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c new file mode 100644 index 0000000000000..f7dd256b6f7a0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif + +#include "ia_css_aa2.host.h" + +/* YUV Anti-Aliasing configuration. */ +const struct ia_css_aa_config default_aa_config = { + 8191 /* default should be 0 */ +}; + +/* Bayer Anti-Aliasing configuration. */ +const struct ia_css_aa_config default_baa_config = { + 8191 /* default should be 0 */ +}; + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.h new file mode 100644 index 0000000000000..71587d85ff2d6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.h @@ -0,0 +1,27 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_AA_HOST_H +#define __IA_CSS_AA_HOST_H + +#include "ia_css_aa2_types.h" +#include "ia_css_aa2_param.h" + +/* YUV Anti-Aliasing configuration. */ +extern const struct ia_css_aa_config default_aa_config; + +/* Bayer Anti-Aliasing configuration. */ +extern const struct ia_css_aa_config default_baa_config; + +#endif /* __IA_CSS_AA_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h new file mode 100644 index 0000000000000..dbab4d6c6cd58 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h @@ -0,0 +1,24 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_AA_PARAM_H +#define __IA_CSS_AA_PARAM_H + +#include "type_support.h" + +struct sh_css_isp_aa_params { + int32_t strength; +}; + +#endif /* __IA_CSS_AA_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h new file mode 100644 index 0000000000000..0b95bf9b9aaf8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h @@ -0,0 +1,48 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_AA2_TYPES_H +#define __IA_CSS_AA2_TYPES_H + +/* @file +* CSS-API header file for Anti-Aliasing parameters. +*/ + + +/* Anti-Aliasing configuration. + * + * This structure is used both for YUV AA and Bayer AA. + * + * 1. YUV Anti-Aliasing + * struct ia_css_aa_config *aa_config + * + * ISP block: AA2 + * (ISP1: AA2 is not used.) + * ISP2: AA2 should be used. But, AA2 is not used currently. + * + * 2. Bayer Anti-Aliasing + * struct ia_css_aa_config *baa_config + * + * ISP block: BAA2 + * ISP1: BAA2 is used. + * ISP2: BAA2 is used. + */ +struct ia_css_aa_config { + uint16_t strength; /** Strength of the filter. + u0.13, [0,8191], + default/ineffective 0 */ +}; + +#endif /* __IA_CSS_AA2_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c new file mode 100644 index 0000000000000..edc4f1ae6d5e8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c @@ -0,0 +1,60 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" + +#include "ia_css_anr.host.h" + +const struct ia_css_anr_config default_anr_config = { + 10, + { 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, + 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, + 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, + 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4}, + {10, 20, 30} +}; + +void +ia_css_anr_encode( + struct sh_css_isp_anr_params *to, + const struct ia_css_anr_config *from, + unsigned size) +{ + (void)size; + to->threshold = from->threshold; +} + +void +ia_css_anr_dump( + const struct sh_css_isp_anr_params *anr, + unsigned level) +{ + if (!anr) return; + ia_css_debug_dtrace(level, "Advance Noise Reduction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "anr_threshold", anr->threshold); +} + +void +ia_css_anr_debug_dtrace( + const struct ia_css_anr_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.threshold=%d\n", + config->threshold); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h new file mode 100644 index 0000000000000..29566c07653cd --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ANR_HOST_H +#define __IA_CSS_ANR_HOST_H + +#include "ia_css_anr_types.h" +#include "ia_css_anr_param.h" + +extern const struct ia_css_anr_config default_anr_config; + +void +ia_css_anr_encode( + struct sh_css_isp_anr_params *to, + const struct ia_css_anr_config *from, + unsigned size); + +void +ia_css_anr_dump( + const struct sh_css_isp_anr_params *anr, + unsigned level); + +void +ia_css_anr_debug_dtrace( + const struct ia_css_anr_config *config, unsigned level) +; + +#endif /* __IA_CSS_ANR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h new file mode 100644 index 0000000000000..2621b920c3dca --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h @@ -0,0 +1,25 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ANR_PARAM_H +#define __IA_CSS_ANR_PARAM_H + +#include "type_support.h" + +/* ANR (Advanced Noise Reduction) */ +struct sh_css_isp_anr_params { + int32_t threshold; +}; + +#endif /* __IA_CSS_ANR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h new file mode 100644 index 0000000000000..dc317a8573693 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ANR_TYPES_H +#define __IA_CSS_ANR_TYPES_H + +/* @file +* CSS-API header file for Advanced Noise Reduction kernel v1 +*/ + +/* Application specific DMA settings */ +#define ANR_BPP 10 +#define ANR_ELEMENT_BITS ((CEIL_DIV(ANR_BPP, 8))*8) + +/* Advanced Noise Reduction configuration. + * This is also known as Low-Light. + */ +struct ia_css_anr_config { + int32_t threshold; /** Threshold */ + int32_t thresholds[4*4*4]; + int32_t factors[3]; +}; + +#endif /* __IA_CSS_ANR_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c new file mode 100644 index 0000000000000..b338c434453e9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" + +#include "ia_css_anr2.host.h" + +void +ia_css_anr2_vmem_encode( + struct ia_css_isp_anr2_params *to, + const struct ia_css_anr_thres *from, + size_t size) +{ + unsigned i; + + (void)size; + for (i = 0; i < ANR_PARAM_SIZE; i++) { + unsigned j; + for (j = 0; j < ISP_VEC_NELEMS; j++) { + to->data[i][j] = from->data[i*ISP_VEC_NELEMS+j]; + } + } +} + +void +ia_css_anr2_debug_dtrace( + const struct ia_css_anr_thres *config, + unsigned level) +{ + (void)config; + (void)level; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h new file mode 100644 index 0000000000000..83c37e328591e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h @@ -0,0 +1,35 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ANR2_HOST_H +#define __IA_CSS_ANR2_HOST_H + +#include "sh_css_params.h" + +#include "ia_css_anr2_types.h" +#include "ia_css_anr_param.h" +#include "ia_css_anr2_table.host.h" + +void +ia_css_anr2_vmem_encode( + struct ia_css_isp_anr2_params *to, + const struct ia_css_anr_thres *from, + size_t size); + +void +ia_css_anr2_debug_dtrace( + const struct ia_css_anr_thres *config, unsigned level) +; + +#endif /* __IA_CSS_ANR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c new file mode 100644 index 0000000000000..2de51fe45623f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c @@ -0,0 +1,52 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "system_global.h" +#include "ia_css_types.h" +#include "ia_css_anr2_table.host.h" + +#if 1 +const struct ia_css_anr_thres default_anr_thres = { +{128, 384, 640, 896, 896, 640, 384, 128, 384, 1152, 1920, 2688, 2688, 1920, 1152, 384, 640, 1920, 3200, 4480, 4480, 3200, 1920, 640, 896, 2688, 4480, 6272, 6272, 4480, 2688, 896, 896, 2688, 4480, 6272, 6272, 4480, 2688, 896, 640, 1920, 3200, 4480, 4480, 3200, 1920, 640, 384, 1152, 1920, 2688, 2688, 1920, 1152, 384, 128, 384, 640, 896, 896, 640, 384, 128, +0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, +0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, +0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, +30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, +60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, +90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, +10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, +20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, +30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, +20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, +40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, +60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120} +}; +#else +const struct ia_css_anr_thres default_anr_thres = { +{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} +}; +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h new file mode 100644 index 0000000000000..534119e064c14 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ANR2_TABLE_HOST_H +#define __IA_CSS_ANR2_TABLE_HOST_H + +#include "ia_css_anr2_types.h" + +extern const struct ia_css_anr_thres default_anr_thres; + +#endif /* __IA_CSS_ANR2_TABLE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h new file mode 100644 index 0000000000000..9b611315392cc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ANR2_TYPES_H +#define __IA_CSS_ANR2_TYPES_H + +/* @file +* CSS-API header file for Advanced Noise Reduction kernel v2 +*/ + +#include "type_support.h" + +#define ANR_PARAM_SIZE 13 + +/* Advanced Noise Reduction (ANR) thresholds */ +struct ia_css_anr_thres { + int16_t data[13*64]; +}; + +#endif /* __IA_CSS_ANR2_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h new file mode 100644 index 0000000000000..312141793fd23 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h @@ -0,0 +1,27 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ANR2_PARAM_H +#define __IA_CSS_ANR2_PARAM_H + +#include "vmem.h" +#include "ia_css_anr2_types.h" + +/* Advanced Noise Reduction (ANR) thresholds */ + +struct ia_css_isp_anr2_params { + VMEM_ARRAY(data, ANR_PARAM_SIZE*ISP_VEC_NELEMS); +}; + +#endif /* __IA_CSS_ANR2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c new file mode 100644 index 0000000000000..99c80d2d8f11c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c @@ -0,0 +1,66 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#if !defined(HAS_NO_HMEM) + +#include "memory_access.h" +#include "ia_css_types.h" +#include "sh_css_internal.h" +#include "assert_support.h" +#include "sh_css_frac.h" + +#include "ia_css_bh.host.h" + +void +ia_css_bh_hmem_decode( + struct ia_css_3a_rgby_output *out_ptr, + const struct ia_css_bh_table *hmem_buf) +{ + int i; + + /* + * No weighted histogram, hence no grid definition + */ + if(!hmem_buf) + return; + assert(sizeof_hmem(HMEM0_ID) == sizeof(*hmem_buf)); + + /* Deinterleave */ + for (i = 0; i < HMEM_UNIT_SIZE; i++) { + out_ptr[i].r = hmem_buf->hmem[BH_COLOR_R][i]; + out_ptr[i].g = hmem_buf->hmem[BH_COLOR_G][i]; + out_ptr[i].b = hmem_buf->hmem[BH_COLOR_B][i]; + out_ptr[i].y = hmem_buf->hmem[BH_COLOR_Y][i]; + /* sh_css_print ("hmem[%d] = %d, %d, %d, %d\n", + i, out_ptr[i].r, out_ptr[i].g, out_ptr[i].b, out_ptr[i].y); */ + } +} + +void +ia_css_bh_encode( + struct sh_css_isp_bh_params *to, + const struct ia_css_3a_config *from, + unsigned size) +{ + (void)size; + /* coefficients to calculate Y */ + to->y_coef_r = + uDIGIT_FITTING(from->ae_y_coef_r, 16, SH_CSS_AE_YCOEF_SHIFT); + to->y_coef_g = + uDIGIT_FITTING(from->ae_y_coef_g, 16, SH_CSS_AE_YCOEF_SHIFT); + to->y_coef_b = + uDIGIT_FITTING(from->ae_y_coef_b, 16, SH_CSS_AE_YCOEF_SHIFT); +} + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h new file mode 100644 index 0000000000000..cbb09299cf21e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BH_HOST_H +#define __IA_CSS_BH_HOST_H + +#include "ia_css_bh_param.h" +#include "s3a/s3a_1.0/ia_css_s3a_types.h" + +void +ia_css_bh_hmem_decode( + struct ia_css_3a_rgby_output *out_ptr, + const struct ia_css_bh_table *hmem_buf); + +void +ia_css_bh_encode( + struct sh_css_isp_bh_params *to, + const struct ia_css_3a_config *from, + unsigned size); + +#endif /* __IA_CSS_BH_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h new file mode 100644 index 0000000000000..b0a8ef3862e09 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_HB_PARAM_H +#define __IA_CSS_HB_PARAM_H + +#include "type_support.h" + +#ifndef PIPE_GENERATION +#define __INLINE_HMEM__ +#include "hmem.h" +#endif + +#include "ia_css_bh_types.h" + +/* AE (3A Support) */ +struct sh_css_isp_bh_params { + /* coefficients to calculate Y */ + int32_t y_coef_r; + int32_t y_coef_g; + int32_t y_coef_b; +}; + +/* This should be hmem_data_t, but that breaks the pipe generator */ +struct sh_css_isp_bh_hmem_params { + uint32_t bh[ISP_HIST_COMPONENTS][IA_CSS_HMEM_BH_UNIT_SIZE]; +}; + +#endif /* __IA_CSS_HB_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h new file mode 100644 index 0000000000000..ec1688e7352d1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h @@ -0,0 +1,37 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BH_TYPES_H +#define __IA_CSS_BH_TYPES_H + +/* Number of elements in the BH table. + * Should be consistent with hmem.h + */ +#define IA_CSS_HMEM_BH_TABLE_SIZE ISP_HIST_DEPTH +#define IA_CSS_HMEM_BH_UNIT_SIZE (ISP_HIST_DEPTH/ISP_HIST_COMPONENTS) + +#define BH_COLOR_R (0) +#define BH_COLOR_G (1) +#define BH_COLOR_B (2) +#define BH_COLOR_Y (3) +#define BH_COLOR_NUM (4) + +/* BH table */ +struct ia_css_bh_table { + uint32_t hmem[ISP_HIST_COMPONENTS][IA_CSS_HMEM_BH_UNIT_SIZE]; +}; + +#endif /* __IA_CSS_BH_TYPES_H */ + + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c new file mode 100644 index 0000000000000..6d12e031e6fca --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c @@ -0,0 +1,183 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "type_support.h" +#include "ia_css_bnlm.host.h" + +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" /* ia_css_debug_dtrace() */ +#endif +#include + +#define BNLM_DIV_LUT_SIZE (12) +static const int32_t div_lut_nearests[BNLM_DIV_LUT_SIZE] = { + 0, 454, 948, 1484, 2070, 2710, 3412, 4184, 5035, 5978, 7025, 8191 +}; + +static const int32_t div_lut_slopes[BNLM_DIV_LUT_SIZE] = { + -7760, -6960, -6216, -5536, -4912, -4344, -3832, -3360, -2936, -2552, -2208, -2208 +}; + +static const int32_t div_lut_intercepts[BNLM_DIV_LUT_SIZE] = { + 8184, 7752, 7336, 6928, 6536, 6152, 5776, 5416, 5064, 4728, 4408, 4408 +}; + +/* Encodes a look-up table from BNLM public parameters to vmem parameters. + * Input: + * lut : bnlm_lut struct containing encoded vmem parameters look-up table + * lut_thr : array containing threshold values for lut + * lut_val : array containing output values related to lut_thr + * lut_size: Size of lut_val array + */ +static inline void +bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr, const int32_t *lut_val, const uint32_t lut_size) +{ + u32 blk, i; + const u32 block_size = 16; + const u32 total_blocks = ISP_VEC_NELEMS / block_size; + + /* Create VMEM LUTs from the threshold and value arrays. + * + * Min size of the LUT is 2 entries. + * + * Max size of the LUT is 16 entries, so that the LUT can fit into a + * single group of 16 elements inside a vector. + * Then these elements are copied into other groups inside the same + * vector. If the LUT size is less than 16, then remaining elements are + * set to 0. + */ + assert((lut_size >= 2) && (lut_size <= block_size)); + /* array lut_thr has (lut_size-1) entries */ + for (i = 0; i < lut_size-2; i++) { + /* Check if the lut_thr is monotonically increasing */ + assert(lut_thr[i] <= lut_thr[i+1]); + } + + /* Initialize */ + for (i = 0; i < total_blocks * block_size; i++) { + lut->thr[0][i] = 0; + lut->val[0][i] = 0; + } + + /* Copy all data */ + for (i = 0; i < lut_size - 1; i++) { + lut->thr[0][i] = lut_thr[i]; + lut->val[0][i] = lut_val[i]; + } + lut->val[0][i] = lut_val[i]; /* val has one more element than thr */ + + /* Copy data from first block to all blocks */ + for (blk = 1; blk < total_blocks; blk++) { + u32 blk_offset = blk * block_size; + for (i = 1; i < lut_size; i++) { + lut->thr[0][blk_offset + i] = lut->thr[0][i]; + lut->val[0][blk_offset + i] = lut->val[0][i]; + } + } +} + +/* + * - Encodes BNLM public parameters into VMEM parameters + * - Generates VMEM parameters which will needed internally ISP + */ +void +ia_css_bnlm_vmem_encode( + struct bnlm_vmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size) +{ + int i; + (void)size; + + /* Initialize LUTs in VMEM parameters */ + bnlm_lut_encode(&to->mu_root_lut, from->mu_root_lut_thr, from->mu_root_lut_val, 16); + bnlm_lut_encode(&to->sad_norm_lut, from->sad_norm_lut_thr, from->sad_norm_lut_val, 16); + bnlm_lut_encode(&to->sig_detail_lut, from->sig_detail_lut_thr, from->sig_detail_lut_val, 16); + bnlm_lut_encode(&to->sig_rad_lut, from->sig_rad_lut_thr, from->sig_rad_lut_val, 16); + bnlm_lut_encode(&to->rad_pow_lut, from->rad_pow_lut_thr, from->rad_pow_lut_val, 16); + bnlm_lut_encode(&to->nl_0_lut, from->nl_0_lut_thr, from->nl_0_lut_val, 16); + bnlm_lut_encode(&to->nl_1_lut, from->nl_1_lut_thr, from->nl_1_lut_val, 16); + bnlm_lut_encode(&to->nl_2_lut, from->nl_2_lut_thr, from->nl_2_lut_val, 16); + bnlm_lut_encode(&to->nl_3_lut, from->nl_3_lut_thr, from->nl_3_lut_val, 16); + + /* Initialize arrays in VMEM parameters */ + memset(to->nl_th, 0, sizeof(to->nl_th)); + to->nl_th[0][0] = from->nl_th[0]; + to->nl_th[0][1] = from->nl_th[1]; + to->nl_th[0][2] = from->nl_th[2]; + + memset(to->match_quality_max_idx, 0, sizeof(to->match_quality_max_idx)); + to->match_quality_max_idx[0][0] = from->match_quality_max_idx[0]; + to->match_quality_max_idx[0][1] = from->match_quality_max_idx[1]; + to->match_quality_max_idx[0][2] = from->match_quality_max_idx[2]; + to->match_quality_max_idx[0][3] = from->match_quality_max_idx[3]; + + bnlm_lut_encode(&to->div_lut, div_lut_nearests, div_lut_slopes, BNLM_DIV_LUT_SIZE); + memset(to->div_lut_intercepts, 0, sizeof(to->div_lut_intercepts)); + for(i = 0; i < BNLM_DIV_LUT_SIZE; i++) { + to->div_lut_intercepts[0][i] = div_lut_intercepts[i]; + } + + memset(to->power_of_2, 0, sizeof(to->power_of_2)); + for (i = 0; i < (ISP_VEC_ELEMBITS-1); i++) { + to->power_of_2[0][i] = 1 << i; + } +} + +/* - Encodes BNLM public parameters into DMEM parameters */ +void +ia_css_bnlm_encode( + struct bnlm_dmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size) +{ + (void)size; + to->rad_enable = from->rad_enable; + to->rad_x_origin = from->rad_x_origin; + to->rad_y_origin = from->rad_y_origin; + to->avg_min_th = from->avg_min_th; + to->max_min_th = from->max_min_th; + + to->exp_coeff_a = from->exp_coeff_a; + to->exp_coeff_b = from->exp_coeff_b; + to->exp_coeff_c = from->exp_coeff_c; + to->exp_exponent = from->exp_exponent; +} + +/* Prints debug traces for BNLM public parameters */ +void +ia_css_bnlm_debug_trace( + const struct ia_css_bnlm_config *config, + unsigned level) +{ + if (!config) + return; + +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(level, "BNLM:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_enable", config->rad_enable); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_x_origin", config->rad_x_origin); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_y_origin", config->rad_y_origin); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "avg_min_th", config->avg_min_th); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "max_min_th", config->max_min_th); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_a", config->exp_coeff_a); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_b", config->exp_coeff_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_c", config->exp_coeff_c); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_exponent", config->exp_exponent); + + /* ToDo: print traces for LUTs */ +#endif /* IA_CSS_NO_DEBUG */ + +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h new file mode 100644 index 0000000000000..675f6e539b3f2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BNLM_HOST_H +#define __IA_CSS_BNLM_HOST_H + +#include "ia_css_bnlm_types.h" +#include "ia_css_bnlm_param.h" + +void +ia_css_bnlm_vmem_encode( + struct bnlm_vmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size); + +void +ia_css_bnlm_encode( + struct bnlm_dmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_bnlm_debug_trace( + const struct ia_css_bnlm_config *config, + unsigned level); +#endif + +#endif /* __IA_CSS_BNLM_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h new file mode 100644 index 0000000000000..2f4be43e594ed --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h @@ -0,0 +1,63 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BNLM_PARAM_H +#define __IA_CSS_BNLM_PARAM_H + +#include "type_support.h" +#include "vmem.h" /* needed for VMEM_ARRAY */ + +struct bnlm_lut { + VMEM_ARRAY(thr, ISP_VEC_NELEMS); /* thresholds */ + VMEM_ARRAY(val, ISP_VEC_NELEMS); /* values */ +}; + +struct bnlm_vmem_params { + VMEM_ARRAY(nl_th, ISP_VEC_NELEMS); + VMEM_ARRAY(match_quality_max_idx, ISP_VEC_NELEMS); + struct bnlm_lut mu_root_lut; + struct bnlm_lut sad_norm_lut; + struct bnlm_lut sig_detail_lut; + struct bnlm_lut sig_rad_lut; + struct bnlm_lut rad_pow_lut; + struct bnlm_lut nl_0_lut; + struct bnlm_lut nl_1_lut; + struct bnlm_lut nl_2_lut; + struct bnlm_lut nl_3_lut; + + /* LUTs used for division approximiation */ + struct bnlm_lut div_lut; + VMEM_ARRAY(div_lut_intercepts, ISP_VEC_NELEMS); + + /* 240x does not have an ISP instruction to left shift each element of a + * vector by different shift value. Hence it will be simulated by multiplying + * the elements by required 2^shift. */ + VMEM_ARRAY(power_of_2, ISP_VEC_NELEMS); +}; + +/* BNLM ISP parameters */ +struct bnlm_dmem_params { + bool rad_enable; + int32_t rad_x_origin; + int32_t rad_y_origin; + int32_t avg_min_th; + int32_t max_min_th; + + int32_t exp_coeff_a; + uint32_t exp_coeff_b; + int32_t exp_coeff_c; + uint32_t exp_exponent; +}; + +#endif /* __IA_CSS_BNLM_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h new file mode 100644 index 0000000000000..87e0f19c856b2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h @@ -0,0 +1,106 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BNLM_TYPES_H +#define __IA_CSS_BNLM_TYPES_H + +/* @file +* CSS-API header file for Bayer Non-Linear Mean parameters. +*/ + +#include "type_support.h" /* int32_t */ + +/* Bayer Non-Linear Mean configuration + * + * \brief BNLM public parameters. + * \details Struct with all parameters for the BNLM kernel that can be set + * from the CSS API. + * + * ISP2.6.1: BNLM is used. + */ +struct ia_css_bnlm_config { + bool rad_enable; /** Enable a radial dependency in a weight calculation */ + int32_t rad_x_origin; /** Initial x coordinate for a radius calculation */ + int32_t rad_y_origin; /** Initial x coordinate for a radius calculation */ + /* a threshold for average of weights if this < Th, do not denoise pixel */ + int32_t avg_min_th; + /* minimum weight for denoising if max < th, do not denoise pixel */ + int32_t max_min_th; + + /**@{*/ + /* Coefficient for approximation, in the form of (1 + x / N)^N, + * that fits the first-order exp() to default exp_lut in BNLM sheet + * */ + int32_t exp_coeff_a; + uint32_t exp_coeff_b; + int32_t exp_coeff_c; + uint32_t exp_exponent; + /**@}*/ + + int32_t nl_th[3]; /** Detail thresholds */ + + /* Index for n-th maximum candidate weight for each detail group */ + int32_t match_quality_max_idx[4]; + + /**@{*/ + /* A lookup table for 1/sqrt(1+mu) approximation */ + int32_t mu_root_lut_thr[15]; + int32_t mu_root_lut_val[16]; + /**@}*/ + /**@{*/ + /* A lookup table for SAD normalization */ + int32_t sad_norm_lut_thr[15]; + int32_t sad_norm_lut_val[16]; + /**@}*/ + /**@{*/ + /* A lookup table that models a weight's dependency on textures */ + int32_t sig_detail_lut_thr[15]; + int32_t sig_detail_lut_val[16]; + /**@}*/ + /**@{*/ + /* A lookup table that models a weight's dependency on a pixel's radial distance */ + int32_t sig_rad_lut_thr[15]; + int32_t sig_rad_lut_val[16]; + /**@}*/ + /**@{*/ + /* A lookup table to control denoise power depending on a pixel's radial distance */ + int32_t rad_pow_lut_thr[15]; + int32_t rad_pow_lut_val[16]; + /**@}*/ + /**@{*/ + /* Non linear transfer functions to calculate the blending coefficient depending on detail group */ + /* detail group 0 */ + /**@{*/ + int32_t nl_0_lut_thr[15]; + int32_t nl_0_lut_val[16]; + /**@}*/ + /**@{*/ + /* detail group 1 */ + int32_t nl_1_lut_thr[15]; + int32_t nl_1_lut_val[16]; + /**@}*/ + /**@{*/ + /* detail group 2 */ + int32_t nl_2_lut_thr[15]; + int32_t nl_2_lut_val[16]; + /**@}*/ + /**@{*/ + /* detail group 3 */ + int32_t nl_3_lut_thr[15]; + int32_t nl_3_lut_val[16]; + /**@}*/ + /**@}*/ +}; + +#endif /* __IA_CSS_BNLM_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c new file mode 100644 index 0000000000000..a7de6ecb950d1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c @@ -0,0 +1,122 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "type_support.h" +#include "ia_css_bnr2_2.host.h" + +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" /* ia_css_debug_dtrace() */ +#endif + +/* Default kernel parameters. */ +const struct ia_css_bnr2_2_config default_bnr2_2_config = { + 200, + 200, + 200, + 0, + 0, + 0, + 200, + 200, + 200, + 0, + 0, + 0, + 0, + 4096, + 8191, + 128, + 1, + 0, + 0, + 0, + 8191, + 0, + 8191 +}; + +void +ia_css_bnr2_2_encode( + struct sh_css_isp_bnr2_2_params *to, + const struct ia_css_bnr2_2_config *from, + size_t size) +{ + (void)size; + to->d_var_gain_r = from->d_var_gain_r; + to->d_var_gain_g = from->d_var_gain_g; + to->d_var_gain_b = from->d_var_gain_b; + to->d_var_gain_slope_r = from->d_var_gain_slope_r; + to->d_var_gain_slope_g = from->d_var_gain_slope_g; + to->d_var_gain_slope_b = from->d_var_gain_slope_b; + + to->n_var_gain_r = from->n_var_gain_r; + to->n_var_gain_g = from->n_var_gain_g; + to->n_var_gain_b = from->n_var_gain_b; + to->n_var_gain_slope_r = from->n_var_gain_slope_r; + to->n_var_gain_slope_g = from->n_var_gain_slope_g; + to->n_var_gain_slope_b = from->n_var_gain_slope_b; + + to->dir_thres = from->dir_thres; + to->dir_thres_w = from->dir_thres_w; + to->var_offset_coef = from->var_offset_coef; + + to->dir_gain = from->dir_gain; + to->detail_gain = from->detail_gain; + to->detail_gain_divisor = from->detail_gain_divisor; + to->detail_level_offset = from->detail_level_offset; + + to->d_var_th_min = from->d_var_th_min; + to->d_var_th_max = from->d_var_th_max; + to->n_var_th_min = from->n_var_th_min; + to->n_var_th_max = from->n_var_th_max; +} + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_bnr2_2_debug_dtrace( + const struct ia_css_bnr2_2_config *bnr, + unsigned level) +{ + if (!bnr) + return; + + ia_css_debug_dtrace(level, "Bayer Noise Reduction 2.2:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_r", bnr->d_var_gain_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_g", bnr->d_var_gain_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_b", bnr->d_var_gain_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_r", bnr->d_var_gain_slope_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_g", bnr->d_var_gain_slope_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_b", bnr->d_var_gain_slope_b); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_r", bnr->n_var_gain_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_g", bnr->n_var_gain_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_b", bnr->n_var_gain_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_r", bnr->n_var_gain_slope_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_g", bnr->n_var_gain_slope_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_b", bnr->n_var_gain_slope_b); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dir_thres", bnr->dir_thres); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dir_thres_w", bnr->dir_thres_w); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "var_offset_coef", bnr->var_offset_coef); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dir_gain", bnr->dir_gain); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_gain", bnr->detail_gain); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_gain_divisor", bnr->detail_gain_divisor); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_level_offset", bnr->detail_level_offset); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_th_min", bnr->d_var_th_min); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_th_max", bnr->d_var_th_max); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_th_min", bnr->n_var_th_min); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_th_max", bnr->n_var_th_max); +} +#endif /* IA_CSS_NO_DEBUG */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h new file mode 100644 index 0000000000000..c94b366b81420 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h @@ -0,0 +1,35 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#ifndef __IA_CSS_BNR2_2_HOST_H +#define __IA_CSS_BNR2_2_HOST_H + +#include "ia_css_bnr2_2_types.h" +#include "ia_css_bnr2_2_param.h" + +extern const struct ia_css_bnr2_2_config default_bnr2_2_config; + +void +ia_css_bnr2_2_encode( + struct sh_css_isp_bnr2_2_params *to, + const struct ia_css_bnr2_2_config *from, + size_t size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_bnr2_2_debug_dtrace( + const struct ia_css_bnr2_2_config *config, + unsigned level); +#endif + +#endif /* __IA_CSS_BNR2_2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h new file mode 100644 index 0000000000000..6dec27a99d8fb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BNR2_2_PARAM_H +#define __IA_CSS_BNR2_2_PARAM_H + +#include "type_support.h" + +/* BNR (Bayer Noise Reduction) ISP parameters */ +struct sh_css_isp_bnr2_2_params { + int32_t d_var_gain_r; + int32_t d_var_gain_g; + int32_t d_var_gain_b; + int32_t d_var_gain_slope_r; + int32_t d_var_gain_slope_g; + int32_t d_var_gain_slope_b; + int32_t n_var_gain_r; + int32_t n_var_gain_g; + int32_t n_var_gain_b; + int32_t n_var_gain_slope_r; + int32_t n_var_gain_slope_g; + int32_t n_var_gain_slope_b; + int32_t dir_thres; + int32_t dir_thres_w; + int32_t var_offset_coef; + int32_t dir_gain; + int32_t detail_gain; + int32_t detail_gain_divisor; + int32_t detail_level_offset; + int32_t d_var_th_min; + int32_t d_var_th_max; + int32_t n_var_th_min; + int32_t n_var_th_max; +}; + +#endif /* __IA_CSS_BNR2_2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h new file mode 100644 index 0000000000000..551bd0ed3bacc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h @@ -0,0 +1,71 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BNR2_2_TYPES_H +#define __IA_CSS_BNR2_2_TYPES_H + +/* @file +* CSS-API header file for Bayer Noise Reduction parameters. +*/ + +#include "type_support.h" /* int32_t */ + +/* Bayer Noise Reduction 2.2 configuration + * + * \brief BNR2_2 public parameters. + * \details Struct with all parameters for the BNR2.2 kernel that can be set + * from the CSS API. + * + * ISP2.6.1: BNR2.2 is used. + */ +struct ia_css_bnr2_2_config { + /**@{*/ + /* Directional variance gain for R/G/B components in dark region */ + int32_t d_var_gain_r; + int32_t d_var_gain_g; + int32_t d_var_gain_b; + /**@}*/ + /**@{*/ + /* Slope of Directional variance gain between dark and bright region */ + int32_t d_var_gain_slope_r; + int32_t d_var_gain_slope_g; + int32_t d_var_gain_slope_b; + /**@}*/ + /**@{*/ + /* Non-Directional variance gain for R/G/B components in dark region */ + int32_t n_var_gain_r; + int32_t n_var_gain_g; + int32_t n_var_gain_b; + /**@}*/ + /**@{*/ + /* Slope of Non-Directional variance gain between dark and bright region */ + int32_t n_var_gain_slope_r; + int32_t n_var_gain_slope_g; + int32_t n_var_gain_slope_b; + /**@}*/ + + int32_t dir_thres; /** Threshold for directional filtering */ + int32_t dir_thres_w; /** Threshold width for directional filtering */ + int32_t var_offset_coef; /** Variance offset coefficient */ + int32_t dir_gain; /** Gain for directional coefficient */ + int32_t detail_gain; /** Gain for low contrast texture control */ + int32_t detail_gain_divisor; /** Gain divisor for low contrast texture control */ + int32_t detail_level_offset; /** Bias value for low contrast texture control */ + int32_t d_var_th_min; /** Minimum clipping value for directional variance*/ + int32_t d_var_th_max; /** Maximum clipping value for diretional variance*/ + int32_t n_var_th_min; /** Minimum clipping value for non-directional variance*/ + int32_t n_var_th_max; /** Maximum clipping value for non-directional variance*/ +}; + +#endif /* __IA_CSS_BNR2_2_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c new file mode 100644 index 0000000000000..d1baca54c3ad4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c @@ -0,0 +1,64 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "sh_css_frac.h" + +#include "ia_css_bnr.host.h" + +void +ia_css_bnr_encode( + struct sh_css_isp_bnr_params *to, + const struct ia_css_nr_config *from, + unsigned size) +{ + (void)size; + /* BNR (Bayer Noise Reduction) */ + to->threshold_low = + uDIGIT_FITTING(from->direction, 16, SH_CSS_BAYER_BITS); + to->threshold_width_log2 = uFRACTION_BITS_FITTING(8); + to->threshold_width = + 1 << to->threshold_width_log2; + to->gain_all = + uDIGIT_FITTING(from->bnr_gain, 16, SH_CSS_BNR_GAIN_SHIFT); + to->gain_dir = + uDIGIT_FITTING(from->bnr_gain, 16, SH_CSS_BNR_GAIN_SHIFT); + to->clip = uDIGIT_FITTING((unsigned)16384, 16, SH_CSS_BAYER_BITS); +} + +void +ia_css_bnr_dump( + const struct sh_css_isp_bnr_params *bnr, + unsigned level) +{ + if (!bnr) return; + ia_css_debug_dtrace(level, "Bayer Noise Reduction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "bnr_gain_all", bnr->gain_all); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "bnr_gain_dir", bnr->gain_dir); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "bnr_threshold_low", + bnr->threshold_low); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "bnr_threshold_width_log2", + bnr->threshold_width_log2); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "bnr_threshold_width", + bnr->threshold_width); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "bnr_clip", bnr->clip); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h new file mode 100644 index 0000000000000..ccd2abc605376 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h @@ -0,0 +1,34 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BNR_HOST_H +#define __IA_CSS_BNR_HOST_H + +#include "sh_css_params.h" + +#include "ynr/ynr_1.0/ia_css_ynr_types.h" +#include "ia_css_bnr_param.h" + +void +ia_css_bnr_encode( + struct sh_css_isp_bnr_params *to, + const struct ia_css_nr_config *from, + unsigned size); + +void +ia_css_bnr_dump( + const struct sh_css_isp_bnr_params *bnr, + unsigned level); + +#endif /* __IA_CSS_DP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h new file mode 100644 index 0000000000000..331e05885ef4d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BNR_PARAM_H +#define __IA_CSS_BNR_PARAM_H + +#include "type_support.h" + +/* BNR (Bayer Noise Reduction) */ +struct sh_css_isp_bnr_params { + int32_t gain_all; + int32_t gain_dir; + int32_t threshold_low; + int32_t threshold_width_log2; + int32_t threshold_width; + int32_t clip; +}; + +#endif /* __IA_CSS_BNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c new file mode 100644 index 0000000000000..d14fd8fc08b1e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" + +#include "ia_css_cnr.host.h" + +/* keep the interface here, it is not enabled yet because host doesn't know the size of individual state */ +void +ia_css_init_cnr_state( + void/*struct sh_css_isp_cnr_vmem_state*/ *state, + size_t size) +{ + memset(state, 0, size); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h new file mode 100644 index 0000000000000..6f00d280b7d6e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h @@ -0,0 +1,25 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CNR_HOST_H +#define __IA_CSS_CNR_HOST_H + +#include "ia_css_cnr_param.h" + +void +ia_css_init_cnr_state( + void/*struct sh_css_isp_cnr_vmem_state*/ *state, + size_t size); + +#endif /* __IA_CSS_CNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h new file mode 100644 index 0000000000000..c1af207cbf9af --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h @@ -0,0 +1,24 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CNR_PARAM_H +#define __IA_CSS_CNR_PARAM_H + +#include "type_support.h" + +/* CNR (Chroma Noise Reduction) */ +/* Reuse YNR1 param structure */ +#include "../../ynr/ynr_1.0/ia_css_ynr_param.h" + +#endif /* __IA_CSS_CNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c new file mode 100644 index 0000000000000..4b4b2b7154075 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c @@ -0,0 +1,76 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" + +#include "ia_css_cnr2.host.h" + +const struct ia_css_cnr_config default_cnr_config = { + 0, + 0, + 100, + 100, + 100, + 50, + 50, + 50 +}; + +void +ia_css_cnr_encode( + struct sh_css_isp_cnr_params *to, + const struct ia_css_cnr_config *from, + unsigned size) +{ + (void)size; + to->coring_u = from->coring_u; + to->coring_v = from->coring_v; + to->sense_gain_vy = from->sense_gain_vy; + to->sense_gain_vu = from->sense_gain_vu; + to->sense_gain_vv = from->sense_gain_vv; + to->sense_gain_hy = from->sense_gain_hy; + to->sense_gain_hu = from->sense_gain_hu; + to->sense_gain_hv = from->sense_gain_hv; +} + +void +ia_css_cnr_dump( + const struct sh_css_isp_cnr_params *cnr, + unsigned level); + +void +ia_css_cnr_debug_dtrace( + const struct ia_css_cnr_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.coring_u=%d, config.coring_v=%d, " + "config.sense_gain_vy=%d, config.sense_gain_hy=%d, " + "config.sense_gain_vu=%d, config.sense_gain_hu=%d, " + "config.sense_gain_vv=%d, config.sense_gain_hv=%d\n", + config->coring_u, config->coring_v, + config->sense_gain_vy, config->sense_gain_hy, + config->sense_gain_vu, config->sense_gain_hu, + config->sense_gain_vv, config->sense_gain_hv); +} + +void +ia_css_init_cnr2_state( + void/*struct sh_css_isp_cnr_vmem_state*/ *state, + size_t size) +{ + memset(state, 0, size); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h new file mode 100644 index 0000000000000..abcf0eba706f4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h @@ -0,0 +1,43 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CNR2_HOST_H +#define __IA_CSS_CNR2_HOST_H + +#include "ia_css_cnr2_types.h" +#include "ia_css_cnr2_param.h" + +extern const struct ia_css_cnr_config default_cnr_config; + +void +ia_css_cnr_encode( + struct sh_css_isp_cnr_params *to, + const struct ia_css_cnr_config *from, + unsigned size); + +void +ia_css_cnr_dump( + const struct sh_css_isp_cnr_params *cnr, + unsigned level); + +void +ia_css_cnr_debug_dtrace( + const struct ia_css_cnr_config *config, + unsigned level); + +void +ia_css_init_cnr2_state( + void/*struct sh_css_isp_cnr_vmem_state*/ *state, + size_t size); +#endif /* __IA_CSS_CNR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h new file mode 100644 index 0000000000000..d6f490e26c94d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CNR2_PARAM_H +#define __IA_CSS_CNR2_PARAM_H + +#include "type_support.h" + +/* CNR (Chroma Noise Reduction) */ +struct sh_css_isp_cnr_params { + int32_t coring_u; + int32_t coring_v; + int32_t sense_gain_vy; + int32_t sense_gain_vu; + int32_t sense_gain_vv; + int32_t sense_gain_hy; + int32_t sense_gain_hu; + int32_t sense_gain_hv; +}; + +#endif /* __IA_CSS_CNR2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h new file mode 100644 index 0000000000000..3ebc069d8ada9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h @@ -0,0 +1,55 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CNR2_TYPES_H +#define __IA_CSS_CNR2_TYPES_H + +/* @file +* CSS-API header file for Chroma Noise Reduction (CNR) parameters +*/ + +/* Chroma Noise Reduction configuration. + * + * Small sensitivity of edge means strong smoothness and NR performance. + * If you see blurred color on vertical edges, + * set higher values on sense_gain_h*. + * If you see blurred color on horizontal edges, + * set higher values on sense_gain_v*. + * + * ISP block: CNR2 + * (ISP1: CNR1 is used.) + * (ISP2: CNR1 is used for Preview/Video.) + * ISP2: CNR2 is used for Still. + */ +struct ia_css_cnr_config { + uint16_t coring_u; /** Coring level of U. + u0.13, [0,8191], default/ineffective 0 */ + uint16_t coring_v; /** Coring level of V. + u0.13, [0,8191], default/ineffective 0 */ + uint16_t sense_gain_vy; /** Sensitivity of horizontal edge of Y. + u13.0, [0,8191], default 100, ineffective 8191 */ + uint16_t sense_gain_vu; /** Sensitivity of horizontal edge of U. + u13.0, [0,8191], default 100, ineffective 8191 */ + uint16_t sense_gain_vv; /** Sensitivity of horizontal edge of V. + u13.0, [0,8191], default 100, ineffective 8191 */ + uint16_t sense_gain_hy; /** Sensitivity of vertical edge of Y. + u13.0, [0,8191], default 50, ineffective 8191 */ + uint16_t sense_gain_hu; /** Sensitivity of vertical edge of U. + u13.0, [0,8191], default 50, ineffective 8191 */ + uint16_t sense_gain_hv; /** Sensitivity of vertical edge of V. + u13.0, [0,8191], default 50, ineffective 8191 */ +}; + +#endif /* __IA_CSS_CNR2_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr_param.h new file mode 100644 index 0000000000000..56651ba62598e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr_param.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CNRX_PARAM_H +#define __IA_CSS_CNRX_PARAM_H + +#include "ia_css_cnr2_param.h" + +#endif /* __IA_CSS_CNRX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c new file mode 100644 index 0000000000000..8f25ee180cda6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "ia_css_conversion.host.h" + +const struct ia_css_conversion_config default_conversion_config = { + 0, + 0, + 0, + 0, +}; + +void +ia_css_conversion_encode( + struct sh_css_isp_conversion_params *to, + const struct ia_css_conversion_config *from, + unsigned size) +{ + (void)size; + to->en = from->en; + to->dummy0 = from->dummy0; + to->dummy1 = from->dummy1; + to->dummy2 = from->dummy2; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h new file mode 100644 index 0000000000000..da7a0a034a715 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h @@ -0,0 +1,33 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CONVERSION_HOST_H +#define __IA_CSS_CONVERSION_HOST_H + +#include "ia_css_conversion_types.h" +#include "ia_css_conversion_param.h" + +extern const struct ia_css_conversion_config default_conversion_config; + +void +ia_css_conversion_encode( + struct sh_css_isp_conversion_params *to, + const struct ia_css_conversion_config *from, + unsigned size); + +#ifdef ISP2401 +/* workaround until code generation in isp_kernelparameters.host.c is fixed */ +#define ia_css_conversion_par_encode(to, from, size) ia_css_conversion_encode(to, from, size) +#endif +#endif /* __IA_CSS_CONVERSION_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h new file mode 100644 index 0000000000000..301d506f447e3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CONVERSION_PARAM_H +#define __IA_CSS_CONVERSION_PARAM_H + +#include "type_support.h" + +/* CONVERSION */ +struct sh_css_isp_conversion_params { + uint32_t en; + uint32_t dummy0; + uint32_t dummy1; + uint32_t dummy2; +}; + +#endif /* __IA_CSS_CONVERSION_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h new file mode 100644 index 0000000000000..47a38fd65950b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CONVERSION_TYPES_H +#define __IA_CSS_CONVERSION_TYPES_H + +/** + * Conversion Kernel parameters. + * Deinterleave bayer quad into isys format + * + * ISP block: CONVERSION + * + */ +struct ia_css_conversion_config { + uint32_t en; /** en parameter */ + uint32_t dummy0; /** dummy0 dummy parameter 0 */ + uint32_t dummy1; /** dummy1 dummy parameter 1 */ + uint32_t dummy2; /** dummy2 dummy parameter 2 */ +}; + +#endif /* __IA_CSS_CONVERSION_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c new file mode 100644 index 0000000000000..45e1ea8b1fb0e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_copy_output.host.h" +#include "ia_css_binary.h" +#include "type_support.h" +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "isp.h" + +static const struct ia_css_copy_output_configuration default_config = { + .enable = false, +}; + +void +ia_css_copy_output_config( + struct sh_css_isp_copy_output_isp_config *to, + const struct ia_css_copy_output_configuration *from, + unsigned size) +{ + (void)size; + to->enable = from->enable; +} + +void +ia_css_copy_output_configure( + const struct ia_css_binary *binary, + bool enable) +{ + struct ia_css_copy_output_configuration config = default_config; + + config.enable = enable; + + ia_css_configure_copy_output(binary, &config); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h new file mode 100644 index 0000000000000..3eb77365f8d01 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h @@ -0,0 +1,34 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_COPY_OUTPUT_HOST_H +#define __IA_CSS_COPY_OUTPUT_HOST_H + +#include "type_support.h" +#include "ia_css_binary.h" + +#include "ia_css_copy_output_param.h" + +void +ia_css_copy_output_config( + struct sh_css_isp_copy_output_isp_config *to, + const struct ia_css_copy_output_configuration *from, + unsigned size); + +void +ia_css_copy_output_configure( + const struct ia_css_binary *binary, + bool enable); + +#endif /* __IA_CSS_COPY_OUTPUT_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h new file mode 100644 index 0000000000000..622d9181e13fb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_COPY_PARAM_H +#define __IA_CSS_COPY_PARAM_H + +struct ia_css_copy_output_configuration { + bool enable; +}; + +struct sh_css_isp_copy_output_isp_config { + uint32_t enable; +}; + +#endif /* __IA_CSS_COPY_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c new file mode 100644 index 0000000000000..92905220d862e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c @@ -0,0 +1,64 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "isp.h" +#include "ia_css_crop.host.h" + +static const struct ia_css_crop_configuration default_config = { + .info = (struct ia_css_frame_info *)NULL, +}; + +void +ia_css_crop_encode( + struct sh_css_isp_crop_isp_params *to, + const struct ia_css_crop_config *from, + unsigned size) +{ + (void)size; + to->crop_pos = from->crop_pos; +} + +void +ia_css_crop_config( + struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS; + + (void)size; + ia_css_dma_configure_from_info(&to->port_b, from->info); + to->width_a_over_b = elems_a / to->port_b.elems; + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert (elems_a % to->port_b.elems == 0); +} + +void +ia_css_crop_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) +{ + struct ia_css_crop_configuration config = default_config; + + config.info = info; + + ia_css_configure_crop(binary, &config); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h new file mode 100644 index 0000000000000..9c1a4c7cac983 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CROP_HOST_H +#define __IA_CSS_CROP_HOST_H + +#include +#include + +#include "ia_css_crop_types.h" +#include "ia_css_crop_param.h" + +void +ia_css_crop_encode( + struct sh_css_isp_crop_isp_params *to, + const struct ia_css_crop_config *from, + unsigned size); + +void +ia_css_crop_config( + struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned size); + +void +ia_css_crop_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); + +#endif /* __IA_CSS_CROP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h new file mode 100644 index 0000000000000..0f1812cdd92ab --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CROP_PARAM_H +#define __IA_CSS_CROP_PARAM_H + +#include +#include "dma.h" +#include "sh_css_internal.h" /* sh_css_crop_pos */ + +/* Crop frame */ +struct sh_css_isp_crop_isp_config { + uint32_t width_a_over_b; + struct dma_port_config port_b; +}; + +struct sh_css_isp_crop_isp_params { + struct sh_css_crop_pos crop_pos; +}; + +#endif /* __IA_CSS_CROP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h new file mode 100644 index 0000000000000..b5d454225f891 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h @@ -0,0 +1,35 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CROP_TYPES_H +#define __IA_CSS_CROP_TYPES_H + +/* Crop frame + * + * ISP block: crop frame + */ + +#include +#include "sh_css_uds.h" /* sh_css_crop_pos */ + +struct ia_css_crop_config { + struct sh_css_crop_pos crop_pos; +}; + +struct ia_css_crop_configuration { + const struct ia_css_frame_info *info; +}; + +#endif /* __IA_CSS_CROP_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c new file mode 100644 index 0000000000000..9f94ef1de5725 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c @@ -0,0 +1,132 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +#include "ia_css_debug.h" +#endif + +#include "ia_css_csc.host.h" + +const struct ia_css_cc_config default_cc_config = { + 8, + {255, 29, 120, 0, -374, -342, 0, -672, 301}, +}; + +void +ia_css_encode_cc( + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned size) +{ + (void)size; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_encode_cc() enter:\n"); +#endif + + to->m_shift = (int16_t) from->fraction_bits; + to->m00 = (int16_t) from->matrix[0]; + to->m01 = (int16_t) from->matrix[1]; + to->m02 = (int16_t) from->matrix[2]; + to->m10 = (int16_t) from->matrix[3]; + to->m11 = (int16_t) from->matrix[4]; + to->m12 = (int16_t) from->matrix[5]; + to->m20 = (int16_t) from->matrix[6]; + to->m21 = (int16_t) from->matrix[7]; + to->m22 = (int16_t) from->matrix[8]; + +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_encode_cc() leave:\n"); +#endif +} + +void +ia_css_csc_encode( + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned size) +{ + ia_css_encode_cc(to, from, size); +} + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_cc_dump( + const struct sh_css_isp_csc_params *csc, + unsigned level, + const char *name) +{ + if (!csc) return; + ia_css_debug_dtrace(level, "%s\n", name); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m_shift", + csc->m_shift); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m00", + csc->m00); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m01", + csc->m01); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m02", + csc->m02); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m10", + csc->m10); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m11", + csc->m11); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m12", + csc->m12); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m20", + csc->m20); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m21", + csc->m21); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "m22", + csc->m22); +} + +void +ia_css_csc_dump( + const struct sh_css_isp_csc_params *csc, + unsigned level) +{ + ia_css_cc_dump(csc, level, "Color Space Conversion"); +} + +void +ia_css_cc_config_debug_dtrace( + const struct ia_css_cc_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.m[0]=%d, " + "config.m[1]=%d, config.m[2]=%d, " + "config.m[3]=%d, config.m[4]=%d, " + "config.m[5]=%d, config.m[6]=%d, " + "config.m[7]=%d, config.m[8]=%d\n", + config->matrix[0], + config->matrix[1], config->matrix[2], + config->matrix[3], config->matrix[4], + config->matrix[5], config->matrix[6], + config->matrix[7], config->matrix[8]); +} +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h new file mode 100644 index 0000000000000..eb10d8a5709da --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h @@ -0,0 +1,54 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CSC_HOST_H +#define __IA_CSS_CSC_HOST_H + +#include "ia_css_csc_types.h" +#include "ia_css_csc_param.h" + +extern const struct ia_css_cc_config default_cc_config; + +void +ia_css_encode_cc( + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned size); + +void +ia_css_csc_encode( + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_cc_dump( + const struct sh_css_isp_csc_params *csc, unsigned level, + const char *name); + +void +ia_css_csc_dump( + const struct sh_css_isp_csc_params *csc, + unsigned level); + +void +ia_css_cc_config_debug_dtrace( + const struct ia_css_cc_config *config, + unsigned level); + +#define ia_css_csc_debug_dtrace ia_css_cc_config_debug_dtrace +#endif + +#endif /* __IA_CSS_CSC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h new file mode 100644 index 0000000000000..0b054a939baf8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h @@ -0,0 +1,34 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CSC_PARAM_H +#define __IA_CSS_CSC_PARAM_H + +#include "type_support.h" +/* CSC (Color Space Conversion) */ +struct sh_css_isp_csc_params { + uint16_t m_shift; + int16_t m00; + int16_t m01; + int16_t m02; + int16_t m10; + int16_t m11; + int16_t m12; + int16_t m20; + int16_t m21; + int16_t m22; +}; + + +#endif /* __IA_CSS_CSC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h new file mode 100644 index 0000000000000..10404380c6373 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h @@ -0,0 +1,78 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CSC_TYPES_H +#define __IA_CSS_CSC_TYPES_H + +/* @file +* CSS-API header file for Color Space Conversion parameters. +*/ + +/* Color Correction configuration. + * + * This structure is used for 3 cases. + * ("YCgCo" is the output format of Demosaic.) + * + * 1. Color Space Conversion (YCgCo to YUV) for ISP1. + * ISP block: CSC1 (Color Space Conversion) + * struct ia_css_cc_config *cc_config + * + * 2. Color Correction Matrix (YCgCo to RGB) for ISP2. + * ISP block: CCM2 (Color Correction Matrix) + * struct ia_css_cc_config *yuv2rgb_cc_config + * + * 3. Color Space Conversion (RGB to YUV) for ISP2. + * ISP block: CSC2 (Color Space Conversion) + * struct ia_css_cc_config *rgb2yuv_cc_config + * + * default/ineffective: + * 1. YCgCo -> YUV + * 1 0.174 0.185 + * 0 -0.66252 -0.66874 + * 0 -0.83738 0.58131 + * + * fraction_bits = 12 + * 4096 713 758 + * 0 -2714 -2739 + * 0 -3430 2381 + * + * 2. YCgCo -> RGB + * 1 -1 1 + * 1 1 0 + * 1 -1 -1 + * + * fraction_bits = 12 + * 4096 -4096 4096 + * 4096 4096 0 + * 4096 -4096 -4096 + * + * 3. RGB -> YUV + * 0.299 0.587 0.114 + * -0.16874 -0.33126 0.5 + * 0.5 -0.41869 -0.08131 + * + * fraction_bits = 13 + * 2449 4809 934 + * -1382 -2714 4096 + * 4096 -3430 -666 + */ +struct ia_css_cc_config { + uint32_t fraction_bits;/** Fractional bits of matrix. + u8.0, [0,13] */ + int32_t matrix[3 * 3]; /** Conversion matrix. + s[13-fraction_bits].[fraction_bits], + [-8192,8191] */ +}; + +#endif /* __IA_CSS_CSC_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c new file mode 100644 index 0000000000000..e27648c46a258 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c @@ -0,0 +1,120 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +#include "ctc/ctc_1.0/ia_css_ctc.host.h" +#include "ia_css_ctc1_5.host.h" + +static void ctc_gradient( + int *dydx, int *shift, + int y1, int y0, int x1, int x0) +{ + int frc_bits = max(IA_CSS_CTC_COEF_SHIFT, 16); + int dy = y1 - y0; + int dx = x1 - x0; + int dydx_int; + int dydx_frc; + int sft; + /* max_dydx = the maxinum gradient = the maximum y (gain) */ + int max_dydx = (1 << IA_CSS_CTC_COEF_SHIFT) - 1; + + if (dx == 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ctc_gradient() error, illegal division operation\n"); + return; + } else { + dydx_int = dy / dx; + dydx_frc = ((dy - dydx_int * dx) << frc_bits) / dx; + } + + assert(y0 >= 0 && y0 <= max_dydx); + assert(y1 >= 0 && y1 <= max_dydx); + assert(x0 < x1); + assert(dydx != NULL); + assert(shift != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ctc_gradient() enter:\n"); + + /* search "sft" which meets this condition: + (1 << (IA_CSS_CTC_COEF_SHIFT - 1)) + <= (((float)dy / (float)dx) * (1 << sft)) + <= ((1 << IA_CSS_CTC_COEF_SHIFT) - 1) */ + for (sft = 0; sft <= IA_CSS_CTC_COEF_SHIFT; sft++) { + int tmp_dydx = (dydx_int << sft) + + (dydx_frc >> (frc_bits - sft)); + if (tmp_dydx <= max_dydx) { + *dydx = tmp_dydx; + *shift = sft; + } + if (tmp_dydx >= max_dydx) + break; + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ctc_gradient() leave:\n"); +} + +void +ia_css_ctc_encode( + struct sh_css_isp_ctc_params *to, + const struct ia_css_ctc_config *from, + unsigned size) +{ + (void)size; + to->y0 = from->y0; + to->y1 = from->y1; + to->y2 = from->y2; + to->y3 = from->y3; + to->y4 = from->y4; + to->y5 = from->y5; + + to->ce_gain_exp = from->ce_gain_exp; + + to->x1 = from->x1; + to->x2 = from->x2; + to->x3 = from->x3; + to->x4 = from->x4; + + ctc_gradient(&(to->dydx0), + &(to->dydx0_shift), + from->y1, from->y0, + from->x1, 0); + + ctc_gradient(&(to->dydx1), + &(to->dydx1_shift), + from->y2, from->y1, + from->x2, from->x1); + + ctc_gradient(&to->dydx2, + &to->dydx2_shift, + from->y3, from->y2, + from->x3, from->x2); + + ctc_gradient(&to->dydx3, + &to->dydx3_shift, + from->y4, from->y3, + from->x4, from->x3); + + ctc_gradient(&(to->dydx4), + &(to->dydx4_shift), + from->y5, from->y4, + SH_CSS_BAYER_MAXVAL, from->x4); +} + +void +ia_css_ctc_dump( + const struct sh_css_isp_ctc_params *ctc, + unsigned level); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h new file mode 100644 index 0000000000000..d943aff281524 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h @@ -0,0 +1,33 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC1_5_HOST_H +#define __IA_CSS_CTC1_5_HOST_H + +#include "sh_css_params.h" + +#include "ia_css_ctc1_5_param.h" + +void +ia_css_ctc_encode( + struct sh_css_isp_ctc_params *to, + const struct ia_css_ctc_config *from, + unsigned size); + +void +ia_css_ctc_dump( + const struct sh_css_isp_ctc_params *ctc, + unsigned level); + +#endif /* __IA_CSS_CTC1_5_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h new file mode 100644 index 0000000000000..8d9ac2b1832c3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h @@ -0,0 +1,46 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC1_5_PARAM_H +#define __IA_CSS_CTC1_5_PARAM_H + +#include "type_support.h" +#include "ctc/ctc_1.0/ia_css_ctc_param.h" /* vamem params */ + +/* CTC (Color Tone Control) */ +struct sh_css_isp_ctc_params { + int32_t y0; + int32_t y1; + int32_t y2; + int32_t y3; + int32_t y4; + int32_t y5; + int32_t ce_gain_exp; + int32_t x1; + int32_t x2; + int32_t x3; + int32_t x4; + int32_t dydx0; + int32_t dydx0_shift; + int32_t dydx1; + int32_t dydx1_shift; + int32_t dydx2; + int32_t dydx2_shift; + int32_t dydx3; + int32_t dydx3_shift; + int32_t dydx4; + int32_t dydx4_shift; +}; + +#endif /* __IA_CSS_CTC1_5_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h new file mode 100644 index 0000000000000..dcd471f9bd665 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTCX_PARAM_H +#define __IA_CSS_CTCX_PARAM_H + +#include "ia_css_ctc1_5_param.h" + +#endif /* __IA_CSS_CTCX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c new file mode 100644 index 0000000000000..07bd24edc7bf6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c @@ -0,0 +1,156 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "assert_support.h" + +#include "ia_css_ctc2.host.h" + +#define INEFFECTIVE_VAL 4096 +#define BASIC_VAL 819 + +/*Default configuration of parameters for Ctc2*/ +const struct ia_css_ctc2_config default_ctc2_config = { + INEFFECTIVE_VAL, INEFFECTIVE_VAL, INEFFECTIVE_VAL, + INEFFECTIVE_VAL, INEFFECTIVE_VAL, INEFFECTIVE_VAL, + BASIC_VAL * 2, BASIC_VAL * 4, BASIC_VAL * 6, + BASIC_VAL * 8, INEFFECTIVE_VAL, INEFFECTIVE_VAL, + BASIC_VAL >> 1, BASIC_VAL}; + +/* (dydx) = ctc2_slope(y1, y0, x1, x0) + * ----------------------------------------------- + * Calculation of the Slope of a Line = ((y1 - y0) >> 8)/(x1 - x0) + * + * Note: y1, y0 , x1 & x0 must lie within the range 0 <-> 8191 + */ +static int ctc2_slope(int y1, int y0, int x1, int x0) +{ + const int shift_val = 8; + const int max_slope = (1 << IA_CSS_CTC_COEF_SHIFT) - 1; + int dy = y1 - y0; + int dx = x1 - x0; + int rounding = (dx + 1) >> 1; + int dy_shift = dy << shift_val; + int slope, dydx; + + /*Protection for paramater values, & avoiding zero divisions*/ + assert(y0 >= 0 && y0 <= max_slope); + assert(y1 >= 0 && y1 <= max_slope); + assert(x0 >= 0 && x0 <= max_slope); + assert(x1 > 0 && x1 <= max_slope); + assert(dx > 0); + + if (dy < 0) + rounding = -rounding; + slope = (int) (dy_shift + rounding) / dx; + + /*the slope must lie within the range + (-max_slope-1) >= (dydx) >= (max_slope) + */ + if (slope <= -max_slope-1) { + dydx = -max_slope-1; + } else if (slope >= max_slope) { + dydx = max_slope; + } else { + dydx = slope; + } + + return dydx; +} + +/* (void) = ia_css_ctc2_vmem_encode(*to, *from) + * ----------------------------------------------- + * VMEM Encode Function to translate Y parameters from userspace into ISP space + */ +void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, + const struct ia_css_ctc2_config *from, + size_t size) +{ + unsigned i, j; + const unsigned shffl_blck = 4; + const unsigned lenght_zeros = 11; + short dydx0, dydx1, dydx2, dydx3, dydx4; + + (void)size; + /* + * Calculation of slopes of lines interconnecting + * 0.0 -> y_x1 -> y_x2 -> y _x3 -> y_x4 -> 1.0 + */ + dydx0 = ctc2_slope(from->y_y1, from->y_y0, + from->y_x1, 0); + dydx1 = ctc2_slope(from->y_y2, from->y_y1, + from->y_x2, from->y_x1); + dydx2 = ctc2_slope(from->y_y3, from->y_y2, + from->y_x3, from->y_x2); + dydx3 = ctc2_slope(from->y_y4, from->y_y3, + from->y_x4, from->y_x3); + dydx4 = ctc2_slope(from->y_y5, from->y_y4, + SH_CSS_BAYER_MAXVAL, from->y_x4); + + /*Fill 3 arrays with: + * - Luma input gain values y_y0, y_y1, y_y2, y_3, y_y4 + * - Luma kneepoints 0, y_x1, y_x2, y_x3, y_x4 + * - Calculated slopes dydx0, dyxd1, dydx2, dydx3, dydx4 + * + * - Each 64-element array is divided in blocks of 16 elements: + * the 5 parameters + zeros in the remaining 11 positions + * - All blocks of the same array will contain the same data + */ + for (i = 0; i < shffl_blck; i++) { + to->y_x[0][(i << shffl_blck)] = 0; + to->y_x[0][(i << shffl_blck) + 1] = from->y_x1; + to->y_x[0][(i << shffl_blck) + 2] = from->y_x2; + to->y_x[0][(i << shffl_blck) + 3] = from->y_x3; + to->y_x[0][(i << shffl_blck) + 4] = from->y_x4; + + to->y_y[0][(i << shffl_blck)] = from->y_y0; + to->y_y[0][(i << shffl_blck) + 1] = from->y_y1; + to->y_y[0][(i << shffl_blck) + 2] = from->y_y2; + to->y_y[0][(i << shffl_blck) + 3] = from->y_y3; + to->y_y[0][(i << shffl_blck) + 4] = from->y_y4; + + to->e_y_slope[0][(i << shffl_blck)] = dydx0; + to->e_y_slope[0][(i << shffl_blck) + 1] = dydx1; + to->e_y_slope[0][(i << shffl_blck) + 2] = dydx2; + to->e_y_slope[0][(i << shffl_blck) + 3] = dydx3; + to->e_y_slope[0][(i << shffl_blck) + 4] = dydx4; + + for (j = 0; j < lenght_zeros; j++) { + to->y_x[0][(i << shffl_blck) + 5 + j] = 0; + to->y_y[0][(i << shffl_blck) + 5 + j] = 0; + to->e_y_slope[0][(i << shffl_blck)+ 5 + j] = 0; + } + } +} + +/* (void) = ia_css_ctc2_encode(*to, *from) + * ----------------------------------------------- + * DMEM Encode Function to translate UV parameters from userspace into ISP space + */ +void ia_css_ctc2_encode(struct ia_css_isp_ctc2_dmem_params *to, + struct ia_css_ctc2_config *from, + size_t size) +{ + (void)size; + + to->uv_y0 = from->uv_y0; + to->uv_y1 = from->uv_y1; + to->uv_x0 = from->uv_x0; + to->uv_x1 = from->uv_x1; + + /*Slope Calculation*/ + to->uv_dydx = ctc2_slope(from->uv_y1, from->uv_y0, + from->uv_x1, from->uv_x0); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h new file mode 100644 index 0000000000000..3733aee24dcd1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h @@ -0,0 +1,33 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC2_HOST_H +#define __IA_CSS_CTC2_HOST_H + +#include "ia_css_ctc2_param.h" +#include "ia_css_ctc2_types.h" + +extern const struct ia_css_ctc2_config default_ctc2_config; + +/*Encode Functions to translate parameters from userspace into ISP space*/ + +void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, + const struct ia_css_ctc2_config *from, + size_t size); + +void ia_css_ctc2_encode(struct ia_css_isp_ctc2_dmem_params *to, + struct ia_css_ctc2_config *from, + size_t size); + +#endif /* __IA_CSS_CTC2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h new file mode 100644 index 0000000000000..ad7040c9d7cbf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h @@ -0,0 +1,49 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC2_PARAM_H +#define __IA_CSS_CTC2_PARAM_H + +#define IA_CSS_CTC_COEF_SHIFT 13 +#include "vmem.h" /* needed for VMEM_ARRAY */ + +/* CTC (Chroma Tone Control)ISP Parameters */ + +/*VMEM Luma params*/ +struct ia_css_isp_ctc2_vmem_params { + /** Gains by Y(Luma) at Y = 0.0,Y_X1, Y_X2, Y_X3, Y_X4*/ + VMEM_ARRAY(y_x, ISP_VEC_NELEMS); + /* kneepoints by Y(Luma) 0.0, y_x1, y_x2, y _x3, y_x4*/ + VMEM_ARRAY(y_y, ISP_VEC_NELEMS); + /* Slopes of lines interconnecting + * 0.0 -> y_x1 -> y_x2 -> y _x3 -> y_x4 -> 1.0*/ + VMEM_ARRAY(e_y_slope, ISP_VEC_NELEMS); +}; + +/*DMEM Chroma params*/ +struct ia_css_isp_ctc2_dmem_params { + + /* Gains by UV(Chroma) under kneepoints uv_x0 and uv_x1*/ + int32_t uv_y0; + int32_t uv_y1; + + /* Kneepoints by UV(Chroma)- uv_x0 and uv_x1*/ + int32_t uv_x0; + int32_t uv_x1; + + /* Slope of line interconnecting uv_x0 -> uv_x1*/ + int32_t uv_dydx; + +}; +#endif /* __IA_CSS_CTC2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h new file mode 100644 index 0000000000000..1222cf33e8511 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h @@ -0,0 +1,55 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC2_TYPES_H +#define __IA_CSS_CTC2_TYPES_H + +/* Chroma Tone Control configuration. +* +* ISP block: CTC2 (CTC by polygonal approximation) +* (ISP1: CTC1 (CTC by look-up table) is used.) +* ISP2: CTC2 is used. +* ISP261: CTC2 (CTC by Fast Approximate Distance) +*/ +struct ia_css_ctc2_config { + + /** Gains by Y(Luma) at Y =0.0,Y_X1, Y_X2, Y_X3, Y_X4 and Y_X5 + * --default/ineffective value: 4096(0.5f) + */ + int32_t y_y0; + int32_t y_y1; + int32_t y_y2; + int32_t y_y3; + int32_t y_y4; + int32_t y_y5; + /* 1st-4th kneepoints by Y(Luma) --default/ineffective value:n/a + * requirement: 0.0 < y_x1 < y_x2 ctc, &from->data, sizeof(to->ctc)); +} + +void +ia_css_ctc_debug_dtrace( + const struct ia_css_ctc_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.ce_gain_exp=%d, config.y0=%d, " + "config.x1=%d, config.y1=%d, " + "config.x2=%d, config.y2=%d, " + "config.x3=%d, config.y3=%d, " + "config.x4=%d, config.y4=%d\n", + config->ce_gain_exp, config->y0, + config->x1, config->y1, + config->x2, config->y2, + config->x3, config->y3, + config->x4, config->y4); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h new file mode 100644 index 0000000000000..bec52a6519f97 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC_HOST_H +#define __IA_CSS_CTC_HOST_H + +#include "sh_css_params.h" + +#include "ia_css_ctc_param.h" +#include "ia_css_ctc_table.host.h" + +extern const struct ia_css_ctc_config default_ctc_config; + +void +ia_css_ctc_vamem_encode( + struct sh_css_isp_ctc_vamem_params *to, + const struct ia_css_ctc_table *from, + unsigned size); + +void +ia_css_ctc_debug_dtrace( + const struct ia_css_ctc_config *config, unsigned level) +; + +#endif /* __IA_CSS_CTC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h new file mode 100644 index 0000000000000..6e88ad3d24201 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h @@ -0,0 +1,44 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC_PARAM_H +#define __IA_CSS_CTC_PARAM_H + +#include "type_support.h" +#include + +#include "ia_css_ctc_types.h" + +#ifndef PIPE_GENERATION +#if defined(HAS_VAMEM_VERSION_2) +#define SH_CSS_ISP_CTC_TABLE_SIZE_LOG2 IA_CSS_VAMEM_2_CTC_TABLE_SIZE_LOG2 +#define SH_CSS_ISP_CTC_TABLE_SIZE IA_CSS_VAMEM_2_CTC_TABLE_SIZE +#elif defined(HAS_VAMEM_VERSION_1) +#define SH_CSS_ISP_CTC_TABLE_SIZE_LOG2 IA_CSS_VAMEM_1_CTC_TABLE_SIZE_LOG2 +#define SH_CSS_ISP_CTC_TABLE_SIZE IA_CSS_VAMEM_1_CTC_TABLE_SIZE +#else +#error "VAMEM should be {VERSION1, VERSION2}" +#endif + +#else +/* For pipe generation, the size is not relevant */ +#define SH_CSS_ISP_CTC_TABLE_SIZE 0 +#endif + +/* This should be vamem_data_t, but that breaks the pipe generator */ +struct sh_css_isp_ctc_vamem_params { + uint16_t ctc[SH_CSS_ISP_CTC_TABLE_SIZE]; +}; + +#endif /* __IA_CSS_CTC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c new file mode 100644 index 0000000000000..edf85aba77165 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c @@ -0,0 +1,215 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include /* memcpy */ +#include "system_global.h" +#include "vamem.h" +#include "ia_css_types.h" +#include "ia_css_ctc_table.host.h" + +struct ia_css_ctc_table default_ctc_table; + +#if defined(HAS_VAMEM_VERSION_2) + +static const uint16_t +default_ctc_table_data[IA_CSS_VAMEM_2_CTC_TABLE_SIZE] = { + 0, 384, 837, 957, 1011, 1062, 1083, 1080, +1078, 1077, 1053, 1039, 1012, 992, 969, 951, + 929, 906, 886, 866, 845, 823, 809, 790, + 772, 758, 741, 726, 711, 701, 688, 675, + 666, 656, 648, 639, 633, 626, 618, 612, + 603, 594, 582, 572, 557, 545, 529, 516, + 504, 491, 480, 467, 459, 447, 438, 429, + 419, 412, 404, 397, 389, 382, 376, 368, + 363, 357, 351, 345, 340, 336, 330, 326, + 321, 318, 312, 308, 304, 300, 297, 294, + 291, 286, 284, 281, 278, 275, 271, 268, + 261, 257, 251, 245, 240, 235, 232, 225, + 223, 218, 213, 209, 206, 204, 199, 197, + 193, 189, 186, 185, 183, 179, 177, 175, + 172, 170, 169, 167, 164, 164, 162, 160, + 158, 157, 156, 154, 154, 152, 151, 150, + 149, 148, 146, 147, 146, 144, 143, 143, + 142, 141, 140, 141, 139, 138, 138, 138, + 137, 136, 136, 135, 134, 134, 134, 133, + 132, 132, 131, 130, 131, 130, 129, 128, + 129, 127, 127, 127, 127, 125, 125, 125, + 123, 123, 122, 120, 118, 115, 114, 111, + 110, 108, 106, 105, 103, 102, 100, 99, + 97, 97, 96, 95, 94, 93, 93, 91, + 91, 91, 90, 90, 89, 89, 88, 88, + 89, 88, 88, 87, 87, 87, 87, 86, + 87, 87, 86, 87, 86, 86, 84, 84, + 82, 80, 78, 76, 74, 72, 70, 68, + 67, 65, 62, 60, 58, 56, 55, 54, + 53, 51, 49, 49, 47, 45, 45, 45, + 41, 40, 39, 39, 34, 33, 34, 32, + 25, 23, 24, 20, 13, 9, 12, 0, + 0 +}; + +#elif defined(HAS_VAMEM_VERSION_1) + +/* Default Parameters */ +static const uint16_t +default_ctc_table_data[IA_CSS_VAMEM_1_CTC_TABLE_SIZE] = { + 0, 0, 256, 384, 384, 497, 765, 806, + 837, 851, 888, 901, 957, 981, 993, 1001, + 1011, 1029, 1028, 1039, 1062, 1059, 1073, 1080, + 1083, 1085, 1085, 1098, 1080, 1084, 1085, 1093, + 1078, 1073, 1070, 1069, 1077, 1066, 1072, 1063, + 1053, 1044, 1046, 1053, 1039, 1028, 1025, 1024, + 1012, 1013, 1016, 996, 992, 990, 990, 980, + 969, 968, 961, 955, 951, 949, 933, 930, + 929, 925, 921, 916, 906, 901, 895, 893, + 886, 877, 872, 869, 866, 861, 857, 849, + 845, 838, 836, 832, 823, 821, 815, 813, + 809, 805, 796, 793, 790, 785, 784, 778, + 772, 768, 766, 763, 758, 752, 749, 745, + 741, 740, 736, 730, 726, 724, 723, 718, + 711, 709, 706, 704, 701, 698, 691, 689, + 688, 683, 683, 678, 675, 673, 671, 669, + 666, 663, 661, 660, 656, 656, 653, 650, + 648, 647, 646, 643, 639, 638, 637, 635, + 633, 632, 629, 627, 626, 625, 622, 621, + 618, 618, 614, 614, 612, 609, 606, 606, + 603, 600, 600, 597, 594, 591, 590, 586, + 582, 581, 578, 575, 572, 569, 563, 560, + 557, 554, 551, 548, 545, 539, 536, 533, + 529, 527, 524, 519, 516, 513, 510, 507, + 504, 501, 498, 493, 491, 488, 485, 484, + 480, 476, 474, 471, 467, 466, 464, 460, + 459, 455, 453, 449, 447, 446, 443, 441, + 438, 435, 432, 432, 429, 427, 426, 422, + 419, 418, 416, 414, 412, 410, 408, 406, + 404, 402, 401, 398, 397, 395, 393, 390, + 389, 388, 387, 384, 382, 380, 378, 377, + 376, 375, 372, 370, 368, 368, 366, 364, + 363, 361, 360, 358, 357, 355, 354, 352, + 351, 350, 349, 346, 345, 344, 344, 342, + 340, 339, 337, 337, 336, 335, 333, 331, + 330, 329, 328, 326, 326, 324, 324, 322, + 321, 320, 318, 318, 318, 317, 315, 313, + 312, 311, 311, 310, 308, 307, 306, 306, + 304, 304, 302, 301, 300, 300, 299, 297, + 297, 296, 296, 294, 294, 292, 291, 291, + 291, 290, 288, 287, 286, 286, 287, 285, + 284, 283, 282, 282, 281, 281, 279, 278, + 278, 278, 276, 276, 275, 274, 274, 273, + 271, 270, 269, 268, 268, 267, 265, 262, + 261, 260, 260, 259, 257, 254, 252, 252, + 251, 251, 249, 246, 245, 244, 243, 242, + 240, 239, 239, 237, 235, 235, 233, 231, + 232, 230, 229, 226, 225, 224, 225, 224, + 223, 220, 219, 219, 218, 217, 217, 214, + 213, 213, 212, 211, 209, 209, 209, 208, + 206, 205, 204, 203, 204, 203, 201, 200, + 199, 197, 198, 198, 197, 195, 194, 194, + 193, 192, 192, 191, 189, 190, 189, 188, + 186, 187, 186, 185, 185, 184, 183, 181, + 183, 182, 181, 180, 179, 178, 178, 178, + 177, 176, 175, 176, 175, 174, 174, 173, + 172, 173, 172, 171, 170, 170, 169, 169, + 169, 168, 167, 166, 167, 167, 166, 165, + 164, 164, 164, 163, 164, 163, 162, 163, + 162, 161, 160, 161, 160, 160, 160, 159, + 158, 157, 158, 158, 157, 157, 156, 156, + 156, 156, 155, 155, 154, 154, 154, 154, + 154, 153, 152, 153, 152, 152, 151, 152, + 151, 152, 151, 150, 150, 149, 149, 150, + 149, 149, 148, 148, 148, 149, 148, 147, + 146, 146, 147, 146, 147, 146, 145, 146, + 146, 145, 144, 145, 144, 145, 144, 144, + 143, 143, 143, 144, 143, 142, 142, 142, + 142, 142, 142, 141, 141, 141, 141, 140, + 140, 141, 140, 140, 141, 140, 139, 139, + 139, 140, 139, 139, 138, 138, 137, 139, + 138, 138, 138, 137, 138, 137, 137, 137, + 137, 136, 137, 136, 136, 136, 136, 135, + 136, 135, 135, 135, 135, 136, 135, 135, + 134, 134, 133, 135, 134, 134, 134, 133, + 134, 133, 134, 133, 133, 132, 133, 133, + 132, 133, 132, 132, 132, 132, 131, 131, + 131, 132, 131, 131, 130, 131, 130, 132, + 131, 130, 130, 129, 130, 129, 130, 129, + 129, 129, 130, 129, 128, 128, 128, 128, + 129, 128, 128, 127, 127, 128, 128, 127, + 127, 126, 126, 127, 127, 126, 126, 126, + 127, 126, 126, 126, 125, 125, 126, 125, + 125, 124, 124, 124, 125, 125, 124, 124, + 123, 124, 124, 123, 123, 122, 122, 122, + 122, 122, 121, 120, 120, 119, 118, 118, + 118, 117, 117, 116, 115, 115, 115, 114, + 114, 113, 113, 112, 111, 111, 111, 110, + 110, 109, 109, 108, 108, 108, 107, 107, + 106, 106, 105, 105, 105, 104, 104, 103, + 103, 102, 102, 102, 102, 101, 101, 100, + 100, 99, 99, 99, 99, 99, 99, 98, + 97, 98, 97, 97, 97, 96, 96, 95, + 96, 95, 96, 95, 95, 94, 94, 95, + 94, 94, 94, 93, 93, 92, 93, 93, + 93, 93, 92, 92, 91, 92, 92, 92, + 91, 91, 90, 90, 91, 91, 91, 90, + 90, 90, 90, 91, 90, 90, 90, 89, + 89, 89, 90, 89, 89, 89, 89, 89, + 88, 89, 89, 88, 88, 88, 88, 87, + 89, 88, 88, 88, 88, 88, 87, 88, + 88, 88, 87, 87, 87, 87, 87, 88, + 87, 87, 87, 87, 87, 87, 88, 87, + 87, 87, 87, 86, 86, 87, 87, 87, + 87, 86, 86, 86, 87, 87, 86, 87, + 86, 86, 86, 87, 87, 86, 86, 86, + 86, 86, 87, 87, 86, 85, 85, 85, + 84, 85, 85, 84, 84, 83, 83, 82, + 82, 82, 81, 81, 80, 79, 79, 79, + 78, 77, 77, 76, 76, 76, 75, 74, + 74, 74, 73, 73, 72, 71, 71, 71, + 70, 70, 69, 69, 68, 68, 67, 67, + 67, 66, 66, 65, 65, 64, 64, 63, + 62, 62, 62, 61, 60, 60, 59, 59, + 58, 58, 57, 57, 56, 56, 56, 55, + 55, 54, 55, 55, 54, 53, 53, 52, + 53, 53, 52, 51, 51, 50, 51, 50, + 49, 49, 50, 49, 49, 48, 48, 47, + 47, 48, 46, 45, 45, 45, 46, 45, + 45, 44, 45, 45, 45, 43, 42, 42, + 41, 43, 41, 40, 40, 39, 40, 41, + 39, 39, 39, 39, 39, 38, 35, 35, + 34, 37, 36, 34, 33, 33, 33, 35, + 34, 32, 32, 31, 32, 30, 29, 26, + 25, 25, 27, 26, 23, 23, 23, 25, + 24, 24, 22, 21, 20, 19, 16, 14, + 13, 13, 13, 10, 9, 7, 7, 7, + 12, 12, 12, 7, 0, 0, 0, 0 +}; + +#else +#error "VAMEM version must be one of {VAMEM_VERSION_1, VAMEM_VERSION_2}" +#endif + +void +ia_css_config_ctc_table(void) +{ +#if defined(HAS_VAMEM_VERSION_2) + memcpy(default_ctc_table.data.vamem_2, default_ctc_table_data, + sizeof(default_ctc_table_data)); + default_ctc_table.vamem_type = IA_CSS_VAMEM_TYPE_2; +#else + memcpy(default_ctc_table.data.vamem_1, default_ctc_table_data, + sizeof(default_ctc_table_data)); + default_ctc_table.vamem_type = 1IA_CSS_VAMEM_TYPE_1; +#endif +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.h new file mode 100644 index 0000000000000..a350dec8b4adb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.h @@ -0,0 +1,24 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC_TABLE_HOST_H +#define __IA_CSS_CTC_TABLE_HOST_H + +#include "ia_css_ctc_types.h" + +extern struct ia_css_ctc_table default_ctc_table; + +void ia_css_config_ctc_table(void); + +#endif /* __IA_CSS_CTC_TABLE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h new file mode 100644 index 0000000000000..4ac47ce10566f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h @@ -0,0 +1,110 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_CTC_TYPES_H +#define __IA_CSS_CTC_TYPES_H + +/* @file +* CSS-API header file for Chroma Tone Control parameters. +*/ + +/* Fractional bits for CTC gain (used only for ISP1). + * + * IA_CSS_CTC_COEF_SHIFT(=13) includes not only the fractional bits + * of gain(=8), but also the bits(=5) to convert chroma + * from 13bit precision to 8bit precision. + * + * Gain (struct ia_css_ctc_table) : u5.8 + * Input(Chorma) : s0.12 (13bit precision) + * Output(Chorma): s0.7 (8bit precision) + * Output = (Input * Gain) >> IA_CSS_CTC_COEF_SHIFT + */ +#define IA_CSS_CTC_COEF_SHIFT 13 + +/* Number of elements in the CTC table. */ +#define IA_CSS_VAMEM_1_CTC_TABLE_SIZE_LOG2 10 +/* Number of elements in the CTC table. */ +#define IA_CSS_VAMEM_1_CTC_TABLE_SIZE (1U<pixelnoise = + uDIGIT_FITTING(from->pixelnoise, 16, SH_CSS_BAYER_BITS); + to->c1_coring_threshold = + uDIGIT_FITTING(from->c1_coring_threshold, 16, + SH_CSS_BAYER_BITS); + to->c2_coring_threshold = + uDIGIT_FITTING(from->c2_coring_threshold, 16, + SH_CSS_BAYER_BITS); +} + +void +ia_css_de_dump( + const struct sh_css_isp_de_params *de, + unsigned level) +{ + if (!de) return; + ia_css_debug_dtrace(level, "Demosaic:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "de_pixelnoise", de->pixelnoise); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "de_c1_coring_threshold", + de->c1_coring_threshold); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "de_c2_coring_threshold", + de->c2_coring_threshold); +} + +void +ia_css_de_debug_dtrace( + const struct ia_css_de_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.pixelnoise=%d, " + "config.c1_coring_threshold=%d, config.c2_coring_threshold=%d\n", + config->pixelnoise, + config->c1_coring_threshold, config->c2_coring_threshold); +} + +void +ia_css_init_de_state( + void/*struct sh_css_isp_de_vmem_state*/ *state, + size_t size) +{ + memset(state, 0, size); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h new file mode 100644 index 0000000000000..5dd6f06f2bf14 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h @@ -0,0 +1,44 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE_HOST_H +#define __IA_CSS_DE_HOST_H + +#include "ia_css_de_types.h" +#include "ia_css_de_param.h" + +extern const struct ia_css_de_config default_de_config; + +void +ia_css_de_encode( + struct sh_css_isp_de_params *to, + const struct ia_css_de_config *from, + unsigned size); + +void +ia_css_de_dump( + const struct sh_css_isp_de_params *de, + unsigned level); + +void +ia_css_de_debug_dtrace( + const struct ia_css_de_config *config, + unsigned level); + +void +ia_css_init_de_state( + void/*struct sh_css_isp_de_vmem_state*/ *state, + size_t size); + +#endif /* __IA_CSS_DE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h new file mode 100644 index 0000000000000..833c80afc7a84 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h @@ -0,0 +1,27 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE_PARAM_H +#define __IA_CSS_DE_PARAM_H + +#include "type_support.h" + +/* DE (Demosaic) */ +struct sh_css_isp_de_params { + int32_t pixelnoise; + int32_t c1_coring_threshold; + int32_t c2_coring_threshold; +}; + +#endif /* __IA_CSS_DE_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h new file mode 100644 index 0000000000000..d645117634362 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE_STATE_H +#define __IA_CSS_DE_STATE_H + +#include "type_support.h" +#include "vmem.h" + +/* DE (Demosaic) */ +struct sh_css_isp_de_vmem_state { + VMEM_ARRAY(de_buf[4], MAX_VECTORS_PER_BUF_LINE*ISP_NWAY); +}; + +#endif /* __IA_CSS_DE_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h new file mode 100644 index 0000000000000..803be68abc541 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h @@ -0,0 +1,43 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE_TYPES_H +#define __IA_CSS_DE_TYPES_H + +/* @file +* CSS-API header file for Demosaic (bayer-to-YCgCo) parameters. +*/ + +/* Demosaic (bayer-to-YCgCo) configuration. + * + * ISP block: DE1 + * ISP1: DE1 is used. + * (ISP2: DE2 is used.) + */ +struct ia_css_de_config { + ia_css_u0_16 pixelnoise; /** Pixel noise used in moire elimination. + u0.16, [0,65535], + default 0, ineffective 0 */ + ia_css_u0_16 c1_coring_threshold; /** Coring threshold for C1. + This is the same as nr_config.threshold_cb. + u0.16, [0,65535], + default 128(0.001953125), ineffective 0 */ + ia_css_u0_16 c2_coring_threshold; /** Coring threshold for C2. + This is the same as nr_config.threshold_cr. + u0.16, [0,65535], + default 128(0.001953125), ineffective 0 */ +}; + +#endif /* __IA_CSS_DE_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c new file mode 100644 index 0000000000000..a5247a57bafbb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c @@ -0,0 +1,54 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" + +#include "ia_css_de2.host.h" + +const struct ia_css_ecd_config default_ecd_config = { + (1 << (ISP_VEC_ELEMBITS - 1)) * 2 / 3, /* 2/3 */ + (1 << (ISP_VEC_ELEMBITS - 1)) - 1, /* 1.0 */ + 0, /* 0.0 */ +}; + +void +ia_css_ecd_encode( + struct sh_css_isp_ecd_params *to, + const struct ia_css_ecd_config *from, + unsigned size) +{ + (void)size; + to->zip_strength = from->zip_strength; + to->fc_strength = from->fc_strength; + to->fc_debias = from->fc_debias; +} + +void +ia_css_ecd_dump( + const struct sh_css_isp_ecd_params *ecd, + unsigned level); + +void +ia_css_ecd_debug_dtrace( + const struct ia_css_ecd_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.zip_strength=%d, " + "config.fc_strength=%d, config.fc_debias=%d\n", + config->zip_strength, + config->fc_strength, config->fc_debias); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h new file mode 100644 index 0000000000000..f7cd8448cb304 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE2_HOST_H +#define __IA_CSS_DE2_HOST_H + +#include "ia_css_de2_types.h" +#include "ia_css_de2_param.h" + +extern const struct ia_css_ecd_config default_ecd_config; + +void +ia_css_ecd_encode( + struct sh_css_isp_ecd_params *to, + const struct ia_css_ecd_config *from, + unsigned size); + +void +ia_css_ecd_dump( + const struct sh_css_isp_ecd_params *ecd, + unsigned level); + +void +ia_css_ecd_debug_dtrace( + const struct ia_css_ecd_config *config, unsigned level); + +#endif /* __IA_CSS_DE2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h new file mode 100644 index 0000000000000..ea2da73a49272 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE2_PARAM_H +#define __IA_CSS_DE2_PARAM_H + +#include "type_support.h" + +/* Reuse DE1 params and extend them */ +#include "../de_1.0/ia_css_de_param.h" + +/* DE (Demosaic) */ +struct sh_css_isp_ecd_params { + int32_t zip_strength; + int32_t fc_strength; + int32_t fc_debias; +}; + +#endif /* __IA_CSS_DE2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h new file mode 100644 index 0000000000000..50bdde419bb12 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE2_TYPES_H +#define __IA_CSS_DE2_TYPES_H + +/* @file +* CSS-API header file for Demosaicing parameters. +*/ + +/* Eigen Color Demosaicing configuration. + * + * ISP block: DE2 + * (ISP1: DE1 is used.) + * ISP2: DE2 is used. + */ +struct ia_css_ecd_config { + uint16_t zip_strength; /** Strength of zipper reduction. + u0.13, [0,8191], + default 5489(0.67), ineffective 0 */ + uint16_t fc_strength; /** Strength of false color reduction. + u0.13, [0,8191], + default 8191(almost 1.0), ineffective 0 */ + uint16_t fc_debias; /** Prevent color change + on noise or Gr/Gb imbalance. + u0.13, [0,8191], + default 0, ineffective 0 */ +}; + +#endif /* __IA_CSS_DE2_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_param.h new file mode 100644 index 0000000000000..59af9523604d6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_param.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DEX_PARAM_H +#define __IA_CSS_DEX_PARAM_H + +#include "ia_css_de2_param.h" + +#endif /* __IA_CSS_DEX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_state.h new file mode 100644 index 0000000000000..f2c65ba589830 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_state.h @@ -0,0 +1,21 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DE2_STATE_H +#define __IA_CSS_DE2_STATE_H + +/* Reuse DE1 states */ +#include "../de_1.0/ia_css_de_state.h" + +#endif /* __IA_CSS_DE2_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c new file mode 100644 index 0000000000000..b1f9dc8d662d6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c @@ -0,0 +1,132 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "sh_css_frac.h" + +#include "ia_css_dp.host.h" + +#ifdef ISP2401 +/* We use a different set of DPC configuration parameters when + * DPC is used before OBC and NORM. Currently these parameters + * are used in usecases which selects both BDS and DPC. + **/ +const struct ia_css_dp_config default_dp_10bpp_config = { + 1024, + 2048, + 32768, + 32768, + 32768, + 32768 +}; +#endif +const struct ia_css_dp_config default_dp_config = { + 8192, + 2048, + 32768, + 32768, + 32768, + 32768 +}; + +void +ia_css_dp_encode( + struct sh_css_isp_dp_params *to, + const struct ia_css_dp_config *from, + unsigned size) +{ + int gain = from->gain; + int gr = from->gr; + int r = from->r; + int b = from->b; + int gb = from->gb; + + (void)size; + to->threshold_single = + SH_CSS_BAYER_MAXVAL; + to->threshold_2adjacent = + uDIGIT_FITTING(from->threshold, 16, SH_CSS_BAYER_BITS); + to->gain = + uDIGIT_FITTING(from->gain, 8, SH_CSS_DP_GAIN_SHIFT); + + to->coef_rr_gr = + uDIGIT_FITTING (gain * gr / r, 8, SH_CSS_DP_GAIN_SHIFT); + to->coef_rr_gb = + uDIGIT_FITTING (gain * gb / r, 8, SH_CSS_DP_GAIN_SHIFT); + to->coef_bb_gb = + uDIGIT_FITTING (gain * gb / b, 8, SH_CSS_DP_GAIN_SHIFT); + to->coef_bb_gr = + uDIGIT_FITTING (gain * gr / b, 8, SH_CSS_DP_GAIN_SHIFT); + to->coef_gr_rr = + uDIGIT_FITTING (gain * r / gr, 8, SH_CSS_DP_GAIN_SHIFT); + to->coef_gr_bb = + uDIGIT_FITTING (gain * b / gr, 8, SH_CSS_DP_GAIN_SHIFT); + to->coef_gb_bb = + uDIGIT_FITTING (gain * b / gb, 8, SH_CSS_DP_GAIN_SHIFT); + to->coef_gb_rr = + uDIGIT_FITTING (gain * r / gb, 8, SH_CSS_DP_GAIN_SHIFT); +} + +void +ia_css_dp_dump( + const struct sh_css_isp_dp_params *dp, + unsigned level) +{ + if (!dp) return; + ia_css_debug_dtrace(level, "Defect Pixel Correction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dp_threshold_single_w_2adj_on", + dp->threshold_single); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dp_threshold_2adj_w_2adj_on", + dp->threshold_2adjacent); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dp_gain", dp->gain); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_rr_gr", dp->coef_rr_gr); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_rr_gb", dp->coef_rr_gb); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_bb_gb", dp->coef_bb_gb); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_bb_gr", dp->coef_bb_gr); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_gr_rr", dp->coef_gr_rr); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_gr_bb", dp->coef_gr_bb); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_gb_bb", dp->coef_gb_bb); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "dpc_coef_gb_rr", dp->coef_gb_rr); +} + +void +ia_css_dp_debug_dtrace( + const struct ia_css_dp_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.threshold=%d, config.gain=%d\n", + config->threshold, config->gain); +} + +void +ia_css_init_dp_state( + void/*struct sh_css_isp_dp_vmem_state*/ *state, + size_t size) +{ + memset(state, 0, size); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h new file mode 100644 index 0000000000000..db21814ad3db8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DP_HOST_H +#define __IA_CSS_DP_HOST_H + +#include "ia_css_dp_types.h" +#include "ia_css_dp_param.h" + +extern const struct ia_css_dp_config default_dp_config; +#ifdef ISP2401 +extern const struct ia_css_dp_config default_dp_10bpp_config; +#endif + +void +ia_css_dp_encode( + struct sh_css_isp_dp_params *to, + const struct ia_css_dp_config *from, + unsigned size); + +void +ia_css_dp_dump( + const struct sh_css_isp_dp_params *dp, + unsigned level); + +void +ia_css_dp_debug_dtrace( + const struct ia_css_dp_config *config, + unsigned level); + +void +ia_css_init_dp_state( + void/*struct sh_css_isp_dp_vmem_state*/ *state, + size_t size); + +#endif /* __IA_CSS_DP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h new file mode 100644 index 0000000000000..fc9035a98d922 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DP_PARAM_H +#define __IA_CSS_DP_PARAM_H + +#include "type_support.h" +#include "bnr/bnr_1.0/ia_css_bnr_param.h" + +/* DP (Defect Pixel Correction) */ +struct sh_css_isp_dp_params { + int32_t threshold_single; + int32_t threshold_2adjacent; + int32_t gain; + int32_t coef_rr_gr; + int32_t coef_rr_gb; + int32_t coef_bb_gb; + int32_t coef_bb_gr; + int32_t coef_gr_rr; + int32_t coef_gr_bb; + int32_t coef_gb_bb; + int32_t coef_gb_rr; +}; + +#endif /* __IA_CSS_DP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h new file mode 100644 index 0000000000000..1bf6dcef7dc76 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h @@ -0,0 +1,50 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DP_TYPES_H +#define __IA_CSS_DP_TYPES_H + +/* @file +* CSS-API header file for Defect Pixel Correction (DPC) parameters. +*/ + + +/* Defect Pixel Correction configuration. + * + * ISP block: DPC1 (DPC after WB) + * DPC2 (DPC before WB) + * ISP1: DPC1 is used. + * ISP2: DPC2 is used. + */ +struct ia_css_dp_config { + ia_css_u0_16 threshold; /** The threshold of defect pixel correction, + representing the permissible difference of + intensity between one pixel and its + surrounding pixels. Smaller values result + in more frequent pixel corrections. + u0.16, [0,65535], + default 8192, ineffective 65535 */ + ia_css_u8_8 gain; /** The sensitivity of mis-correction. ISP will + miss a lot of defects if the value is set + too large. + u8.8, [0,65535], + default 4096, ineffective 65535 */ + uint32_t gr; /* unsigned .<16-integer_bits> */ + uint32_t r; /* unsigned .<16-integer_bits> */ + uint32_t b; /* unsigned .<16-integer_bits> */ + uint32_t gb; /* unsigned .<16-integer_bits> */ +}; + +#endif /* __IA_CSS_DP_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c new file mode 100644 index 0000000000000..bc14b85cf9527 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c @@ -0,0 +1,65 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_dpc2.host.h" +#include "assert_support.h" + +void +ia_css_dpc2_encode( + struct ia_css_isp_dpc2_params *to, + const struct ia_css_dpc2_config *from, + size_t size) +{ + (void)size; + + assert ((from->metric1 >= 0) && (from->metric1 <= METRIC1_ONE_FP)); + assert ((from->metric3 >= 0) && (from->metric3 <= METRIC3_ONE_FP)); + assert ((from->metric2 >= METRIC2_ONE_FP) && + (from->metric2 < 256*METRIC2_ONE_FP)); + assert ((from->wb_gain_gr > 0) && (from->wb_gain_gr < 16*WBGAIN_ONE_FP)); + assert ((from->wb_gain_r > 0) && (from->wb_gain_r < 16*WBGAIN_ONE_FP)); + assert ((from->wb_gain_b > 0) && (from->wb_gain_b < 16*WBGAIN_ONE_FP)); + assert ((from->wb_gain_gb > 0) && (from->wb_gain_gb < 16*WBGAIN_ONE_FP)); + + to->metric1 = from->metric1; + to->metric2 = from->metric2; + to->metric3 = from->metric3; + + to->wb_gain_gr = from->wb_gain_gr; + to->wb_gain_r = from->wb_gain_r; + to->wb_gain_b = from->wb_gain_b; + to->wb_gain_gb = from->wb_gain_gb; +} + +/* TODO: AM: This needs a proper implementation. */ +void +ia_css_init_dpc2_state( + void *state, + size_t size) +{ + (void)state; + (void)size; +} + +#ifndef IA_CSS_NO_DEBUG +/* TODO: AM: This needs a proper implementation. */ +void +ia_css_dpc2_debug_dtrace( + const struct ia_css_dpc2_config *config, + unsigned level) +{ + (void)config; + (void)level; +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h new file mode 100644 index 0000000000000..38d10a5237c6e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DPC2_HOST_H +#define __IA_CSS_DPC2_HOST_H + +#include "ia_css_dpc2_types.h" +#include "ia_css_dpc2_param.h" + +void +ia_css_dpc2_encode( + struct ia_css_isp_dpc2_params *to, + const struct ia_css_dpc2_config *from, + size_t size); + +void +ia_css_init_dpc2_state( + void *state, + size_t size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_dpc2_debug_dtrace( + const struct ia_css_dpc2_config *config, + unsigned level); +#endif + +#endif /* __IA_CSS_DPC2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h new file mode 100644 index 0000000000000..ef668d54fe16d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DPC2_PARAM_H +#define __IA_CSS_DPC2_PARAM_H + +#include "type_support.h" +#include "vmem.h" /* for VMEM_ARRAY*/ + + +/* 4 planes : GR, R, B, GB */ +#define NUM_PLANES 4 + +/* ToDo: Move this to testsetup */ +#define MAX_FRAME_SIMDWIDTH 30 + +/* 3 lines state per color plane input_line_state */ +#define DPC2_STATE_INPUT_BUFFER_HEIGHT (3 * NUM_PLANES) +/* Each plane has width equal to half frame line */ +#define DPC2_STATE_INPUT_BUFFER_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 1 line state per color plane for local deviation state*/ +#define DPC2_STATE_LOCAL_DEVIATION_BUFFER_HEIGHT (1 * NUM_PLANES) +/* Each plane has width equal to half frame line */ +#define DPC2_STATE_LOCAL_DEVIATION_BUFFER_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* MINMAX state buffer stores 1 full input line (GR-R color line) */ +#define DPC2_STATE_SECOND_MINMAX_BUFFER_HEIGHT 1 +#define DPC2_STATE_SECOND_MINMAX_BUFFER_WIDTH MAX_FRAME_SIMDWIDTH + + +struct ia_css_isp_dpc2_params { + int32_t metric1; + int32_t metric2; + int32_t metric3; + int32_t wb_gain_gr; + int32_t wb_gain_r; + int32_t wb_gain_b; + int32_t wb_gain_gb; +}; + +#endif /* __IA_CSS_DPC2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h new file mode 100644 index 0000000000000..6727682d287ff --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h @@ -0,0 +1,59 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DPC2_TYPES_H +#define __IA_CSS_DPC2_TYPES_H + +/* @file +* CSS-API header file for Defect Pixel Correction 2 (DPC2) parameters. +*/ + +#include "type_support.h" + +/**@{*/ +/* Floating point constants for different metrics. */ +#define METRIC1_ONE_FP (1<<12) +#define METRIC2_ONE_FP (1<<5) +#define METRIC3_ONE_FP (1<<12) +#define WBGAIN_ONE_FP (1<<9) +/**@}*/ + +/**@{*/ +/* Defect Pixel Correction 2 configuration. + * + * \brief DPC2 public parameters. + * \details Struct with all parameters for the Defect Pixel Correction 2 + * kernel that can be set from the CSS API. + * + * ISP block: DPC1 (DPC after WB) + * DPC2 (DPC before WB) + * ISP1: DPC1 is used. + * ISP2: DPC2 is used. + * + */ +struct ia_css_dpc2_config { + /**@{*/ + int32_t metric1; + int32_t metric2; + int32_t metric3; + int32_t wb_gain_gr; + int32_t wb_gain_r; + int32_t wb_gain_b; + int32_t wb_gain_gb; + /**@}*/ +}; +/**@}*/ + +#endif /* __IA_CSS_DPC2_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c new file mode 100644 index 0000000000000..955adc4d6ab09 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c @@ -0,0 +1,306 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_frame_public.h" +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" + +#include "ia_css_types.h" +#include "ia_css_host_data.h" +#include "sh_css_param_dvs.h" +#include "sh_css_params.h" +#include "ia_css_binary.h" +#include "ia_css_debug.h" +#include "memory_access.h" +#include "assert_support.h" + +#include "ia_css_dvs.host.h" + +static const struct ia_css_dvs_configuration default_config = { + .info = (struct ia_css_frame_info *)NULL, +}; + +void +ia_css_dvs_config( + struct sh_css_isp_dvs_isp_config *to, + const struct ia_css_dvs_configuration *from, + unsigned size) +{ + (void)size; + to->num_horizontal_blocks = + DVS_NUM_BLOCKS_X(from->info->res.width); + to->num_vertical_blocks = + DVS_NUM_BLOCKS_Y(from->info->res.height); +} + +void +ia_css_dvs_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) +{ + struct ia_css_dvs_configuration config = default_config; + + config.info = info; + + ia_css_configure_dvs(binary, &config); +} + +static void +convert_coords_to_ispparams( + struct ia_css_host_data *gdc_warp_table, + const struct ia_css_dvs_6axis_config *config, + unsigned int i_stride, + unsigned int o_width, + unsigned int o_height, + unsigned int uv_flag) +{ + unsigned int i, j; +#ifndef ISP2401 + /* Coverity CID 298073 - initialize */ +#endif + gdc_warp_param_mem_t s = { 0 }; + unsigned int x00, x01, x10, x11, + y00, y01, y10, y11; + + unsigned int xmin, ymin, xmax, ymax; + unsigned int topleft_x, topleft_y, bottom_x, bottom_y, + topleft_x_frac, topleft_y_frac; + unsigned int dvs_interp_envelope = (DVS_GDC_INTERP_METHOD == HRT_GDC_BLI_MODE ? + DVS_GDC_BLI_INTERP_ENVELOPE : DVS_GDC_BCI_INTERP_ENVELOPE); + + /* number of blocks per height and width */ + unsigned int num_blocks_y = (uv_flag ? DVS_NUM_BLOCKS_Y_CHROMA(o_height) : DVS_NUM_BLOCKS_Y(o_height) ); + unsigned int num_blocks_x = (uv_flag ? DVS_NUM_BLOCKS_X_CHROMA(o_width) : DVS_NUM_BLOCKS_X(o_width) ); // round num_x up to blockdim_x, if it concerns the Y0Y1 block (uv_flag==0) round up to even + + + unsigned int in_stride = i_stride * DVS_INPUT_BYTES_PER_PIXEL; + unsigned width, height; + unsigned int *xbuff = NULL; + unsigned int *ybuff = NULL; + struct gdc_warp_param_mem_s *ptr; + + assert(config != NULL); + assert(gdc_warp_table != NULL); + assert(gdc_warp_table->address != NULL); + + ptr = (struct gdc_warp_param_mem_s *)gdc_warp_table->address; + + ptr += (2 * uv_flag); /* format is Y0 Y1 UV, so UV starts at 3rd position */ + + if(uv_flag == 0) + { + xbuff = config->xcoords_y; + ybuff = config->ycoords_y; + width = config->width_y; + height = config->height_y; + } + else + { + xbuff = config->xcoords_uv; + ybuff = config->ycoords_uv; + width = config->width_uv; + height = config->height_uv; + } + + IA_CSS_LOG("blockdim_x %d blockdim_y %d", + DVS_BLOCKDIM_X, DVS_BLOCKDIM_Y_LUMA >> uv_flag); + IA_CSS_LOG("num_blocks_x %d num_blocks_y %d", num_blocks_x,num_blocks_y); + IA_CSS_LOG("width %d height %d", width, height); + + assert(width == num_blocks_x + 1); // the width and height of the provided morphing table should be 1 more than the number of blocks + assert(height == num_blocks_y + 1); + + for (j = 0; j < num_blocks_y; j++) { + for (i = 0; i < num_blocks_x; i++) { + + x00 = xbuff[j * width + i]; + x01 = xbuff[j * width + (i+1)]; + x10 = xbuff[(j+1) * width + i]; + x11 = xbuff[(j+1) * width + (i+1)]; + + y00 = ybuff[j * width + i]; + y01 = ybuff[j * width + (i+1)]; + y10 = ybuff[(j+1) * width + i]; + y11 = ybuff[(j+1) * width + (i+1)]; + + xmin = min(x00, x10); + xmax = max(x01, x11); + ymin = min(y00, y01); + ymax = max(y10, y11); + + /* Assert that right column's X is greater */ + assert ( x01 >= xmin); + assert ( x11 >= xmin); + /* Assert that bottom row's Y is greater */ + assert ( y10 >= ymin); + assert ( y11 >= ymin); + + topleft_y = ymin >> DVS_COORD_FRAC_BITS; + topleft_x = ((xmin >> DVS_COORD_FRAC_BITS) + >> XMEM_ALIGN_LOG2) + << (XMEM_ALIGN_LOG2); + s.in_addr_offset = topleft_y * in_stride + topleft_x; + + /* similar to topleft_y calculation, but round up if ymax + * has any fraction bits */ + bottom_y = CEIL_DIV(ymax, 1 << DVS_COORD_FRAC_BITS); + s.in_block_height = bottom_y - topleft_y + dvs_interp_envelope; + + bottom_x = CEIL_DIV(xmax, 1 << DVS_COORD_FRAC_BITS); + s.in_block_width = bottom_x - topleft_x + dvs_interp_envelope; + + topleft_x_frac = topleft_x << (DVS_COORD_FRAC_BITS); + topleft_y_frac = topleft_y << (DVS_COORD_FRAC_BITS); + + s.p0_x = x00 - topleft_x_frac; + s.p1_x = x01 - topleft_x_frac; + s.p2_x = x10 - topleft_x_frac; + s.p3_x = x11 - topleft_x_frac; + + s.p0_y = y00 - topleft_y_frac; + s.p1_y = y01 - topleft_y_frac; + s.p2_y = y10 - topleft_y_frac; + s.p3_y = y11 - topleft_y_frac; + + // block should fit within the boundingbox. + assert(s.p0_x < (s.in_block_width << DVS_COORD_FRAC_BITS)); + assert(s.p1_x < (s.in_block_width << DVS_COORD_FRAC_BITS)); + assert(s.p2_x < (s.in_block_width << DVS_COORD_FRAC_BITS)); + assert(s.p3_x < (s.in_block_width << DVS_COORD_FRAC_BITS)); + assert(s.p0_y < (s.in_block_height << DVS_COORD_FRAC_BITS)); + assert(s.p1_y < (s.in_block_height << DVS_COORD_FRAC_BITS)); + assert(s.p2_y < (s.in_block_height << DVS_COORD_FRAC_BITS)); + assert(s.p3_y < (s.in_block_height << DVS_COORD_FRAC_BITS)); + + // block size should be greater than zero. + assert(s.p0_x < s.p1_x); + assert(s.p2_x < s.p3_x); + assert(s.p0_y < s.p2_y); + assert(s.p1_y < s.p3_y); + +#if 0 + printf("j: %d\ti:%d\n", j, i); + printf("offset: %d\n", s.in_addr_offset); + printf("p0_x: %d\n", s.p0_x); + printf("p0_y: %d\n", s.p0_y); + printf("p1_x: %d\n", s.p1_x); + printf("p1_y: %d\n", s.p1_y); + printf("p2_x: %d\n", s.p2_x); + printf("p2_y: %d\n", s.p2_y); + printf("p3_x: %d\n", s.p3_x); + printf("p3_y: %d\n", s.p3_y); + + printf("p0_x_nofrac[0]: %d\n", s.p0_x>>DVS_COORD_FRAC_BITS); + printf("p0_y_nofrac[1]: %d\n", s.p0_y>>DVS_COORD_FRAC_BITS); + printf("p1_x_nofrac[2]: %d\n", s.p1_x>>DVS_COORD_FRAC_BITS); + printf("p1_y_nofrac[3]: %d\n", s.p1_y>>DVS_COORD_FRAC_BITS); + printf("p2_x_nofrac[0]: %d\n", s.p2_x>>DVS_COORD_FRAC_BITS); + printf("p2_y_nofrac[1]: %d\n", s.p2_y>>DVS_COORD_FRAC_BITS); + printf("p3_x_nofrac[2]: %d\n", s.p3_x>>DVS_COORD_FRAC_BITS); + printf("p3_y_nofrac[3]: %d\n", s.p3_y>>DVS_COORD_FRAC_BITS); + printf("\n"); +#endif + + *ptr = s; + + // storage format: + // Y0 Y1 UV0 Y2 Y3 UV1 + /* if uv_flag equals true increment with 2 incase x is odd, this to + skip the uv position. */ + if (uv_flag) + ptr += 3; + else + ptr += (1 + (i&1)); + } + } +} + +struct ia_css_host_data * +convert_allocate_dvs_6axis_config( + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info) +{ + unsigned int i_stride; + unsigned int o_width; + unsigned int o_height; + struct ia_css_host_data *me; + struct gdc_warp_param_mem_s *isp_data_ptr; + + assert(binary != NULL); + assert(dvs_6axis_config != NULL); + assert(dvs_in_frame_info != NULL); + + me = ia_css_host_data_allocate((size_t)((DVS_6AXIS_BYTES(binary) / 2) * 3)); + + if (!me) + return NULL; + + /*DVS only supports input frame of YUV420 or NV12. Fail for all other cases*/ + assert((dvs_in_frame_info->format == IA_CSS_FRAME_FORMAT_NV12) + || (dvs_in_frame_info->format == IA_CSS_FRAME_FORMAT_YUV420)); + + isp_data_ptr = (struct gdc_warp_param_mem_s *)me->address; + + i_stride = dvs_in_frame_info->padded_width; + + o_width = binary->out_frame_info[0].res.width; + o_height = binary->out_frame_info[0].res.height; + + /* Y plane */ + convert_coords_to_ispparams(me, dvs_6axis_config, + i_stride, o_width, o_height, 0); + + if (dvs_in_frame_info->format == IA_CSS_FRAME_FORMAT_YUV420) { + /*YUV420 has half the stride for U/V plane*/ + i_stride /=2; + } + + /* UV plane (packed inside the y plane) */ + convert_coords_to_ispparams(me, dvs_6axis_config, + i_stride, o_width/2, o_height/2, 1); + + return me; +} + +enum ia_css_err +store_dvs_6axis_config( + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info, + hrt_vaddress ddr_addr_y) +{ + + struct ia_css_host_data *me; + assert(dvs_6axis_config != NULL); + assert(ddr_addr_y != mmgr_NULL); + assert(dvs_in_frame_info != NULL); + + me = convert_allocate_dvs_6axis_config(dvs_6axis_config, + binary, + dvs_in_frame_info); + + if (!me) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + + ia_css_params_store_ia_css_host_data( + ddr_addr_y, + me); + ia_css_host_data_free(me); + + return IA_CSS_SUCCESS; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h new file mode 100644 index 0000000000000..2f513e29d88c9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h @@ -0,0 +1,60 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DVS_HOST_H +#define __IA_CSS_DVS_HOST_H + +#include "ia_css_frame_public.h" +#include "ia_css_binary.h" +#include "sh_css_params.h" + +#include "ia_css_types.h" +#include "ia_css_dvs_types.h" +#include "ia_css_dvs_param.h" + +/* For bilinear interpolation, we need to add +1 to input block height calculation. + * For bicubic interpolation, we will need to add +3 instaed */ +#define DVS_GDC_BLI_INTERP_ENVELOPE 1 +#define DVS_GDC_BCI_INTERP_ENVELOPE 3 + +void +ia_css_dvs_config( + struct sh_css_isp_dvs_isp_config *to, + const struct ia_css_dvs_configuration *from, + unsigned size); + +void +ia_css_dvs_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); + +void +convert_dvs_6axis_config( + struct ia_css_isp_parameters *params, + const struct ia_css_binary *binary); + +struct ia_css_host_data * +convert_allocate_dvs_6axis_config( + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info); + +enum ia_css_err +store_dvs_6axis_config( + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info, + hrt_vaddress ddr_addr_y); + +#endif /* __IA_CSS_DVS_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h new file mode 100644 index 0000000000000..66a7e58659c0b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DVS_PARAM_H +#define __IA_CSS_DVS_PARAM_H + +#include +#ifdef ISP2401 + +#if !defined(ENABLE_TPROXY) && !defined(ENABLE_CRUN_FOR_TD) && !defined(PARAMBIN_GENERATION) +#endif +#include "dma.h" +#ifdef ISP2401 +#endif /* !defined(ENABLE_TPROXY) && !defined(ENABLE_CRUN_FOR_TD) */ + +#endif +#include "uds/uds_1.0/ia_css_uds_param.h" + +#ifdef ISP2401 + +#endif +/* dvserence frame */ +struct sh_css_isp_dvs_isp_config { + uint32_t num_horizontal_blocks; + uint32_t num_vertical_blocks; +}; + +#endif /* __IA_CSS_DVS_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h new file mode 100644 index 0000000000000..30772d217fb27 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_DVS_TYPES_H +#define __IA_CSS_DVS_TYPES_H + +/* DVS frame + * + * ISP block: dvs frame + */ + +#include "ia_css_frame_public.h" + +struct ia_css_dvs_configuration { + const struct ia_css_frame_info *info; +}; + +#endif /* __IA_CSS_DVS_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c new file mode 100644 index 0000000000000..8f2178bf9e684 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c @@ -0,0 +1,329 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif + +#include "type_support.h" +#include "assert_support.h" +#include "math_support.h" /* for min and max */ + +#include "ia_css_eed1_8.host.h" + +/* WARNING1: Number of inv points should be less or equal to 16, + * due to implementation limitation. See kernel design document + * for more details. + * WARNING2: Do not modify the number of inv points without correcting + * the EED1_8 kernel implementation assumptions. + */ +#define NUMBER_OF_CHGRINV_POINTS 15 +#define NUMBER_OF_TCINV_POINTS 9 +#define NUMBER_OF_FCINV_POINTS 9 + +static const int16_t chgrinv_x[NUMBER_OF_CHGRINV_POINTS] = { +0, 16, 64, 144, 272, 448, 672, 976, +1376, 1888, 2528, 3312, 4256, 5376, 6688}; + +static const int16_t chgrinv_a[NUMBER_OF_CHGRINV_POINTS] = { +-7171, -256, -29, -3456, -1071, -475, -189, -102, +-48, -38, -10, -9, -7, -6, 0}; + +static const int16_t chgrinv_b[NUMBER_OF_CHGRINV_POINTS] = { +8191, 1021, 256, 114, 60, 37, 24, 17, +12, 9, 6, 5, 4, 3, 2}; + +static const int16_t chgrinv_c[NUMBER_OF_CHGRINV_POINTS] = { +1, 1, 1, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0}; + +static const int16_t tcinv_x[NUMBER_OF_TCINV_POINTS] = { +0, 4, 11, 23, 42, 68, 102, 148, 205}; + +static const int16_t tcinv_a[NUMBER_OF_TCINV_POINTS] = { +-6364, -631, -126, -34, -13, -6, -4452, -2156, 0}; + +static const int16_t tcinv_b[NUMBER_OF_TCINV_POINTS] = { +8191, 1828, 726, 352, 197, 121, 80, 55, 40}; + +static const int16_t tcinv_c[NUMBER_OF_TCINV_POINTS] = { +1, 1, 1, 1, 1, 1, 0, 0, 0}; + +static const int16_t fcinv_x[NUMBER_OF_FCINV_POINTS] = { +0, 80, 216, 456, 824, 1344, 2040, 2952, 4096}; + +static const int16_t fcinv_a[NUMBER_OF_FCINV_POINTS] = { +-5244, -486, -86, -2849, -961, -400, -180, -86, 0}; + +static const int16_t fcinv_b[NUMBER_OF_FCINV_POINTS] = { +8191, 1637, 607, 287, 159, 98, 64, 44, 32}; + +static const int16_t fcinv_c[NUMBER_OF_FCINV_POINTS] = { +1, 1, 1, 0, 0, 0, 0, 0, 0}; + + +void +ia_css_eed1_8_vmem_encode( + struct eed1_8_vmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size) +{ + unsigned i, j, base; + const unsigned total_blocks = 4; + const unsigned shuffle_block = 16; + + (void)size; + + /* Init */ + for (i = 0; i < ISP_VEC_NELEMS; i++) { + to->e_dew_enh_x[0][i] = 0; + to->e_dew_enh_y[0][i] = 0; + to->e_dew_enh_a[0][i] = 0; + to->e_dew_enh_f[0][i] = 0; + to->chgrinv_x[0][i] = 0; + to->chgrinv_a[0][i] = 0; + to->chgrinv_b[0][i] = 0; + to->chgrinv_c[0][i] = 0; + to->tcinv_x[0][i] = 0; + to->tcinv_a[0][i] = 0; + to->tcinv_b[0][i] = 0; + to->tcinv_c[0][i] = 0; + to->fcinv_x[0][i] = 0; + to->fcinv_a[0][i] = 0; + to->fcinv_b[0][i] = 0; + to->fcinv_c[0][i] = 0; + } + + /* Constraints on dew_enhance_seg_x and dew_enhance_seg_y: + * - values should be greater or equal to 0. + * - values should be ascending. + * - value of index zero is equal to 0. + */ + + /* Checking constraints: */ + /* TODO: investigate if an assert is the right way to report that + * the constraints are violated. + */ + for (j = 0; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) { + assert(from->dew_enhance_seg_x[j] > -1); + assert(from->dew_enhance_seg_y[j] > -1); + } + + for (j = 1; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) { + assert(from->dew_enhance_seg_x[j] > from->dew_enhance_seg_x[j-1]); + assert(from->dew_enhance_seg_y[j] > from->dew_enhance_seg_y[j-1]); + } + + assert(from->dew_enhance_seg_x[0] == 0); + assert(from->dew_enhance_seg_y[0] == 0); + + /* Constraints on chgrinv_x, tcinv_x and fcinv_x: + * - values should be greater or equal to 0. + * - values should be ascending. + * - value of index zero is equal to 0. + */ + assert(chgrinv_x[0] == 0); + assert(tcinv_x[0] == 0); + assert(fcinv_x[0] == 0); + + for (j = 1; j < NUMBER_OF_CHGRINV_POINTS; j++) { + assert(chgrinv_x[j] > chgrinv_x[j-1]); + } + + for (j = 1; j < NUMBER_OF_TCINV_POINTS; j++) { + assert(tcinv_x[j] > tcinv_x[j-1]); + } + + for (j = 1; j < NUMBER_OF_FCINV_POINTS; j++) { + assert(fcinv_x[j] > fcinv_x[j-1]); + } + + /* The implementation of the calulating 1/x is based on the availability + * of the OP_vec_shuffle16 operation. + * A 64 element vector is split up in 4 blocks of 16 element. Each array is copied to + * a vector 4 times, (starting at 0, 16, 32 and 48). All array elements are copied or + * initialised as described in the KFS. The remaining elements of a vector are set to 0. + */ + /* TODO: guard this code with above assumptions */ + for(i = 0; i < total_blocks; i++) { + base = shuffle_block * i; + + for (j = 0; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) { + to->e_dew_enh_x[0][base + j] = min_t(int, max_t(int, + from->dew_enhance_seg_x[j], 0), + 8191); + to->e_dew_enh_y[0][base + j] = min_t(int, max_t(int, + from->dew_enhance_seg_y[j], -8192), + 8191); + } + + for (j = 0; j < (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1); j++) { + to->e_dew_enh_a[0][base + j] = min_t(int, max_t(int, + from->dew_enhance_seg_slope[j], + -8192), 8191); + /* Convert dew_enhance_seg_exp to flag: + * 0 -> 0 + * 1...13 -> 1 + */ + to->e_dew_enh_f[0][base + j] = (min_t(int, max_t(int, + from->dew_enhance_seg_exp[j], + 0), 13) > 0); + } + + /* Hard-coded to 0, in order to be able to handle out of + * range input in the same way as the other segments. + * See KFS for more details. + */ + to->e_dew_enh_a[0][base + (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)] = 0; + to->e_dew_enh_f[0][base + (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)] = 0; + + for (j = 0; j < NUMBER_OF_CHGRINV_POINTS; j++) { + to->chgrinv_x[0][base + j] = chgrinv_x[j]; + to->chgrinv_a[0][base + j] = chgrinv_a[j]; + to->chgrinv_b[0][base + j] = chgrinv_b[j]; + to->chgrinv_c[0][base + j] = chgrinv_c[j]; + } + + for (j = 0; j < NUMBER_OF_TCINV_POINTS; j++) { + to->tcinv_x[0][base + j] = tcinv_x[j]; + to->tcinv_a[0][base + j] = tcinv_a[j]; + to->tcinv_b[0][base + j] = tcinv_b[j]; + to->tcinv_c[0][base + j] = tcinv_c[j]; + } + + for (j = 0; j < NUMBER_OF_FCINV_POINTS; j++) { + to->fcinv_x[0][base + j] = fcinv_x[j]; + to->fcinv_a[0][base + j] = fcinv_a[j]; + to->fcinv_b[0][base + j] = fcinv_b[j]; + to->fcinv_c[0][base + j] = fcinv_c[j]; + } + } +} + + +void +ia_css_eed1_8_encode( + struct eed1_8_dmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size) +{ + int i; + int min_exp = 0; + + (void)size; + + to->rbzp_strength = from->rbzp_strength; + + to->fcstrength = from->fcstrength; + to->fcthres_0 = from->fcthres_0; + to->fc_sat_coef = from->fc_sat_coef; + to->fc_coring_prm = from->fc_coring_prm; + to->fc_slope = from->fcthres_1 - from->fcthres_0; + + to->aerel_thres0 = from->aerel_thres0; + to->aerel_gain0 = from->aerel_gain0; + to->aerel_thres_diff = from->aerel_thres1 - from->aerel_thres0; + to->aerel_gain_diff = from->aerel_gain1 - from->aerel_gain0; + + to->derel_thres0 = from->derel_thres0; + to->derel_gain0 = from->derel_gain0; + to->derel_thres_diff = (from->derel_thres1 - from->derel_thres0); + to->derel_gain_diff = (from->derel_gain1 - from->derel_gain0); + + to->coring_pos0 = from->coring_pos0; + to->coring_pos_diff = (from->coring_pos1 - from->coring_pos0); + to->coring_neg0 = from->coring_neg0; + to->coring_neg_diff = (from->coring_neg1 - from->coring_neg0); + + /* Note: (ISP_VEC_ELEMBITS -1) + * TODO: currently the testbench does not support to use + * ISP_VEC_ELEMBITS. Investigate how to fix this + */ + to->gain_exp = (13 - from->gain_exp); + to->gain_pos0 = from->gain_pos0; + to->gain_pos_diff = (from->gain_pos1 - from->gain_pos0); + to->gain_neg0 = from->gain_neg0; + to->gain_neg_diff = (from->gain_neg1 - from->gain_neg0); + + to->margin_pos0 = from->pos_margin0; + to->margin_pos_diff = (from->pos_margin1 - from->pos_margin0); + to->margin_neg0 = from->neg_margin0; + to->margin_neg_diff = (from->neg_margin1 - from->neg_margin0); + + /* Encode DEWEnhance exp (e_dew_enh_asr) */ + for (i = 0; i < (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1); i++) { + min_exp = max(min_exp, from->dew_enhance_seg_exp[i]); + } + to->e_dew_enh_asr = 13 - min(max(min_exp, 0), 13); + + to->dedgew_max = from->dedgew_max; +} + + +void +ia_css_init_eed1_8_state( + void *state, + size_t size) +{ + memset(state, 0, size); +} + + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_eed1_8_debug_dtrace( + const struct ia_css_eed1_8_config *eed, + unsigned level) +{ + if (!eed) + return; + + ia_css_debug_dtrace(level, "Edge Enhancing Demosaic 1.8:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rbzp_strength", eed->rbzp_strength); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcstrength", eed->fcstrength); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcthres_0", eed->fcthres_0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcthres_1", eed->fcthres_1); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fc_sat_coef", eed->fc_sat_coef); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fc_coring_prm", eed->fc_coring_prm); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_thres0", eed->aerel_thres0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_gain0", eed->aerel_gain0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_thres1", eed->aerel_thres1); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_gain1", eed->aerel_gain1); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_thres0", eed->derel_thres0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_gain0", eed->derel_gain0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_thres1", eed->derel_thres1); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_gain1", eed->derel_gain1); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_pos0", eed->coring_pos0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_pos1", eed->coring_pos1); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_neg0", eed->coring_neg0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_neg1", eed->coring_neg1); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_exp", eed->gain_exp); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_pos0", eed->gain_pos0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_pos1", eed->gain_pos1); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_neg0", eed->gain_neg0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_neg1", eed->gain_neg1); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "pos_margin0", eed->pos_margin0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "pos_margin1", eed->pos_margin1); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "neg_margin0", eed->neg_margin0); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "neg_margin1", eed->neg_margin1); + + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dedgew_max", eed->dedgew_max); +} +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h new file mode 100644 index 0000000000000..fff932c1364e2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_EED1_8_HOST_H +#define __IA_CSS_EED1_8_HOST_H + +#include "ia_css_eed1_8_types.h" +#include "ia_css_eed1_8_param.h" + +void +ia_css_eed1_8_vmem_encode( + struct eed1_8_vmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size); + +void +ia_css_eed1_8_encode( + struct eed1_8_dmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size); + +void +ia_css_init_eed1_8_state( + void *state, + size_t size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_eed1_8_debug_dtrace( + const struct ia_css_eed1_8_config *config, + unsigned level); +#endif + +#endif /* __IA_CSS_EED1_8_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h new file mode 100644 index 0000000000000..bc3a07fd07ebb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h @@ -0,0 +1,154 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_EED1_8_PARAM_H +#define __IA_CSS_EED1_8_PARAM_H + +#include "type_support.h" +#include "vmem.h" /* needed for VMEM_ARRAY */ + +#include "ia_css_eed1_8_types.h" /* IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS */ + + +/* Configuration parameters: */ + +/* Enable median for false color correction + * 0: Do not use median + * 1: Use median + * Default: 1 + */ +#define EED1_8_FC_ENABLE_MEDIAN 1 + +/* Coring Threshold minima + * Used in Tint color suppression. + * Default: 1 + */ +#define EED1_8_CORINGTHMIN 1 + +/* Define size of the state..... TODO: check if this is the correct place */ +/* 4 planes : GR, R, B, GB */ +#define NUM_PLANES 4 + +/* 5 lines state per color plane input_line_state */ +#define EED1_8_STATE_INPUT_BUFFER_HEIGHT (5 * NUM_PLANES) + +/* Each plane has width equal to half frame line */ +#define EED1_8_STATE_INPUT_BUFFER_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 1 line state per color plane LD_H state */ +#define EED1_8_STATE_LD_H_HEIGHT (1 * NUM_PLANES) +#define EED1_8_STATE_LD_H_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 1 line state per color plane LD_V state */ +#define EED1_8_STATE_LD_V_HEIGHT (1 * NUM_PLANES) +#define EED1_8_STATE_LD_V_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 1 line (single plane) state for D_Hr state */ +#define EED1_8_STATE_D_HR_HEIGHT 1 +#define EED1_8_STATE_D_HR_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 1 line (single plane) state for D_Hb state */ +#define EED1_8_STATE_D_HB_HEIGHT 1 +#define EED1_8_STATE_D_HB_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 2 lines (single plane) state for D_Vr state */ +#define EED1_8_STATE_D_VR_HEIGHT 2 +#define EED1_8_STATE_D_VR_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 2 line (single plane) state for D_Vb state */ +#define EED1_8_STATE_D_VB_HEIGHT 2 +#define EED1_8_STATE_D_VB_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 2 lines state for R and B (= 2 planes) rb_zipped_state */ +#define EED1_8_STATE_RB_ZIPPED_HEIGHT (2 * 2) +#define EED1_8_STATE_RB_ZIPPED_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +#if EED1_8_FC_ENABLE_MEDIAN +/* 1 full input line (GR-R color line) for Yc state */ +#define EED1_8_STATE_YC_HEIGHT 1 +#define EED1_8_STATE_YC_WIDTH MAX_FRAME_SIMDWIDTH + +/* 1 line state per color plane Cg_state */ +#define EED1_8_STATE_CG_HEIGHT (1 * NUM_PLANES) +#define EED1_8_STATE_CG_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 1 line state per color plane Co_state */ +#define EED1_8_STATE_CO_HEIGHT (1 * NUM_PLANES) +#define EED1_8_STATE_CO_WIDTH CEIL_DIV(MAX_FRAME_SIMDWIDTH, 2) + +/* 1 full input line (GR-R color line) for AbsK state */ +#define EED1_8_STATE_ABSK_HEIGHT 1 +#define EED1_8_STATE_ABSK_WIDTH MAX_FRAME_SIMDWIDTH +#endif + +struct eed1_8_vmem_params { + VMEM_ARRAY(e_dew_enh_x, ISP_VEC_NELEMS); + VMEM_ARRAY(e_dew_enh_y, ISP_VEC_NELEMS); + VMEM_ARRAY(e_dew_enh_a, ISP_VEC_NELEMS); + VMEM_ARRAY(e_dew_enh_f, ISP_VEC_NELEMS); + VMEM_ARRAY(chgrinv_x, ISP_VEC_NELEMS); + VMEM_ARRAY(chgrinv_a, ISP_VEC_NELEMS); + VMEM_ARRAY(chgrinv_b, ISP_VEC_NELEMS); + VMEM_ARRAY(chgrinv_c, ISP_VEC_NELEMS); + VMEM_ARRAY(fcinv_x, ISP_VEC_NELEMS); + VMEM_ARRAY(fcinv_a, ISP_VEC_NELEMS); + VMEM_ARRAY(fcinv_b, ISP_VEC_NELEMS); + VMEM_ARRAY(fcinv_c, ISP_VEC_NELEMS); + VMEM_ARRAY(tcinv_x, ISP_VEC_NELEMS); + VMEM_ARRAY(tcinv_a, ISP_VEC_NELEMS); + VMEM_ARRAY(tcinv_b, ISP_VEC_NELEMS); + VMEM_ARRAY(tcinv_c, ISP_VEC_NELEMS); +}; + +/* EED (Edge Enhancing Demosaic) ISP parameters */ +struct eed1_8_dmem_params { + int32_t rbzp_strength; + + int32_t fcstrength; + int32_t fcthres_0; + int32_t fc_sat_coef; + int32_t fc_coring_prm; + int32_t fc_slope; + + int32_t aerel_thres0; + int32_t aerel_gain0; + int32_t aerel_thres_diff; + int32_t aerel_gain_diff; + + int32_t derel_thres0; + int32_t derel_gain0; + int32_t derel_thres_diff; + int32_t derel_gain_diff; + + int32_t coring_pos0; + int32_t coring_pos_diff; + int32_t coring_neg0; + int32_t coring_neg_diff; + + int32_t gain_exp; + int32_t gain_pos0; + int32_t gain_pos_diff; + int32_t gain_neg0; + int32_t gain_neg_diff; + + int32_t margin_pos0; + int32_t margin_pos_diff; + int32_t margin_neg0; + int32_t margin_neg_diff; + + int32_t e_dew_enh_asr; + int32_t dedgew_max; +}; + +#endif /* __IA_CSS_EED1_8_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h new file mode 100644 index 0000000000000..32e91824a5e5a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h @@ -0,0 +1,86 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_EED1_8_TYPES_H +#define __IA_CSS_EED1_8_TYPES_H + +/* @file +* CSS-API header file for Edge Enhanced Demosaic parameters. +*/ + + +#include "type_support.h" + +/** + * \brief EED1_8 public parameters. + * \details Struct with all parameters for the EED1.8 kernel that can be set + * from the CSS API. + */ + +/* parameter list is based on ISP261 CSS API public parameter list_all.xlsx from 28-01-2015 */ + +/* Number of segments + 1 segment used in edge reliability enhancement + * Ineffective: N/A + * Default: 9 + */ +#define IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS 9 + +/* Edge Enhanced Demosaic configuration + * + * ISP2.6.1: EED1_8 is used. + */ + +struct ia_css_eed1_8_config { + int32_t rbzp_strength; /** Strength of zipper reduction. */ + + int32_t fcstrength; /** Strength of false color reduction. */ + int32_t fcthres_0; /** Threshold to prevent chroma coring due to noise or green disparity in dark region. */ + int32_t fcthres_1; /** Threshold to prevent chroma coring due to noise or green disparity in bright region. */ + int32_t fc_sat_coef; /** How much color saturation to maintain in high color saturation region. */ + int32_t fc_coring_prm; /** Chroma coring coefficient for tint color suppression. */ + + int32_t aerel_thres0; /** Threshold for Non-Directional Reliability at dark region. */ + int32_t aerel_gain0; /** Gain for Non-Directional Reliability at dark region. */ + int32_t aerel_thres1; /** Threshold for Non-Directional Reliability at bright region. */ + int32_t aerel_gain1; /** Gain for Non-Directional Reliability at bright region. */ + + int32_t derel_thres0; /** Threshold for Directional Reliability at dark region. */ + int32_t derel_gain0; /** Gain for Directional Reliability at dark region. */ + int32_t derel_thres1; /** Threshold for Directional Reliability at bright region. */ + int32_t derel_gain1; /** Gain for Directional Reliability at bright region. */ + + int32_t coring_pos0; /** Positive Edge Coring Threshold in dark region. */ + int32_t coring_pos1; /** Positive Edge Coring Threshold in bright region. */ + int32_t coring_neg0; /** Negative Edge Coring Threshold in dark region. */ + int32_t coring_neg1; /** Negative Edge Coring Threshold in bright region. */ + + int32_t gain_exp; /** Common Exponent of Gain. */ + int32_t gain_pos0; /** Gain for Positive Edge in dark region. */ + int32_t gain_pos1; /** Gain for Positive Edge in bright region. */ + int32_t gain_neg0; /** Gain for Negative Edge in dark region. */ + int32_t gain_neg1; /** Gain for Negative Edge in bright region. */ + + int32_t pos_margin0; /** Margin for Positive Edge in dark region. */ + int32_t pos_margin1; /** Margin for Positive Edge in bright region. */ + int32_t neg_margin0; /** Margin for Negative Edge in dark region. */ + int32_t neg_margin1; /** Margin for Negative Edge in bright region. */ + + int32_t dew_enhance_seg_x[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: X. */ + int32_t dew_enhance_seg_y[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: Y. */ + int32_t dew_enhance_seg_slope[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Slope. */ + int32_t dew_enhance_seg_exp[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Exponent. */ + int32_t dedgew_max; /** Max Weight for Directional Edge. */ +}; + +#endif /* __IA_CSS_EED1_8_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c new file mode 100644 index 0000000000000..94631eee86142 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c @@ -0,0 +1,62 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_formats.host.h" +#include "ia_css_types.h" +#include "sh_css_defs.h" + +/*#include "sh_css_frac.h"*/ +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +#include "ia_css_debug.h" +#endif + +const struct ia_css_formats_config default_formats_config = { + 1 +}; + +void +ia_css_formats_encode( + struct sh_css_isp_formats_params *to, + const struct ia_css_formats_config *from, + unsigned size) +{ + (void)size; + to->video_full_range_flag = from->video_full_range_flag; +} +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +void +ia_css_formats_dump( + const struct sh_css_isp_formats_params *formats, + unsigned level) +{ + if (!formats) return; + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "video_full_range_flag", formats->video_full_range_flag); +} +#endif + +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +void +ia_css_formats_debug_dtrace( + const struct ia_css_formats_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.video_full_range_flag=%d\n", + config->video_full_range_flag); +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h new file mode 100644 index 0000000000000..8a90cd83b248b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FORMATS_HOST_H +#define __IA_CSS_FORMATS_HOST_H + +#include "ia_css_formats_types.h" +#include "ia_css_formats_param.h" + +extern const struct ia_css_formats_config default_formats_config; + +void +ia_css_formats_encode( + struct sh_css_isp_formats_params *to, + const struct ia_css_formats_config *from, + unsigned size); +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +void +ia_css_formats_dump( + const struct sh_css_isp_formats_params *formats, + unsigned level); +#endif + +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +void +ia_css_formats_debug_dtrace( + const struct ia_css_formats_config *formats, + unsigned level); +#endif /*IA_CSS_NO_DEBUG*/ + +#endif /* __IA_CSS_FORMATS_HOST_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h new file mode 100644 index 0000000000000..2eb6030b60812 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h @@ -0,0 +1,25 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FORMATS_PARAM_H +#define __IA_CSS_FORMATS_PARAM_H + +#include "type_support.h" + +/* FORMATS (Format conversion) */ +struct sh_css_isp_formats_params { + int32_t video_full_range_flag; +}; + +#endif /* __IA_CSS_FORMATS_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h new file mode 100644 index 0000000000000..49479572b40d2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FORMATS_TYPES_H +#define __IA_CSS_FORMATS_TYPES_H + +/* @file +* CSS-API header file for output format parameters. +*/ + +#include "type_support.h" + +/* Formats configuration. + * + * ISP block: FORMATS + * ISP1: FORMATS is used. + * ISP2: FORMATS is used. + */ +struct ia_css_formats_config { + uint32_t video_full_range_flag; /** selects the range of YUV output. + u8.0, [0,1], + default 1, ineffective n/a\n + 1 - full range, luma 0-255, chroma 0-255\n + 0 - reduced range, luma 16-235, chroma 16-240 */ +}; + +#endif /* __IA_CSS_FORMATS_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h new file mode 100644 index 0000000000000..cc8dd1a7007fe --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h @@ -0,0 +1,33 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FIXEDBDS_PARAM_H +#define __IA_CSS_FIXEDBDS_PARAM_H + +#include "type_support.h" + +#ifdef ISP2401 +#define BDS_UNIT 8 +#define FRAC_LOG 3 +#define FRAC_ACC (1< +#include +#include +#include +#include +#include +#include + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "isp.h" + +#include "ia_css_fpn.host.h" + +void +ia_css_fpn_encode( + struct sh_css_isp_fpn_params *to, + const struct ia_css_fpn_table *from, + unsigned size) +{ + (void)size; + to->shift = from->shift; + to->enabled = from->data != NULL; +} + +void +ia_css_fpn_dump( + const struct sh_css_isp_fpn_params *fpn, + unsigned level) +{ + if (!fpn) return; + ia_css_debug_dtrace(level, "Fixed Pattern Noise Reduction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "fpn_shift", fpn->shift); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "fpn_enabled", fpn->enabled); +} + +void +ia_css_fpn_config( + struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS; + + (void)size; + ia_css_dma_configure_from_info(&to->port_b, from->info); + to->width_a_over_b = elems_a / to->port_b.elems; + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert (elems_a % to->port_b.elems == 0); +} + +void +ia_css_fpn_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) +{ + struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + const struct ia_css_fpn_configuration config = { + &my_info + }; + + my_info.res.width = CEIL_DIV(info->res.width, 2); /* Packed by 2x */ + my_info.res.height = info->res.height; + my_info.padded_width = CEIL_DIV(info->padded_width, 2); /* Packed by 2x */ + my_info.format = info->format; + my_info.raw_bit_depth = FPN_BITS_PER_PIXEL; + my_info.raw_bayer_order = info->raw_bayer_order; + my_info.crop_info = info->crop_info; + + ia_css_configure_fpn(binary, &config); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h new file mode 100644 index 0000000000000..bb905c8db8c82 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h @@ -0,0 +1,44 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FPN_HOST_H +#define __IA_CSS_FPN_HOST_H + +#include "ia_css_binary.h" +#include "ia_css_fpn_types.h" +#include "ia_css_fpn_param.h" + +void +ia_css_fpn_encode( + struct sh_css_isp_fpn_params *to, + const struct ia_css_fpn_table *from, + unsigned size); + +void +ia_css_fpn_dump( + const struct sh_css_isp_fpn_params *fpn, + unsigned level); + +void +ia_css_fpn_config( + struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned size); + +void +ia_css_fpn_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); + +#endif /* __IA_CSS_FPN_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h new file mode 100644 index 0000000000000..68765c3f3bf75 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h @@ -0,0 +1,35 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FPN_PARAM_H +#define __IA_CSS_FPN_PARAM_H + +#include "type_support.h" + +#include "dma.h" + +#define FPN_BITS_PER_PIXEL 16 + +/* FPNR (Fixed Pattern Noise Reduction) */ +struct sh_css_isp_fpn_params { + int32_t shift; + int32_t enabled; +}; + +struct sh_css_isp_fpn_isp_config { + uint32_t width_a_over_b; + struct dma_port_config port_b; +}; + +#endif /* __IA_CSS_FPN_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h new file mode 100644 index 0000000000000..ef287fa3c428a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h @@ -0,0 +1,52 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_FPN_TYPES_H +#define __IA_CSS_FPN_TYPES_H + +/* @file +* CSS-API header file for Fixed Pattern Noise parameters. +*/ + +/* Fixed Pattern Noise table. + * + * This contains the fixed patterns noise values + * obtained from a black frame capture. + * + * "shift" should be set as the smallest value + * which satisfies the requirement the maximum data is less than 64. + * + * ISP block: FPN1 + * ISP1: FPN1 is used. + * ISP2: FPN1 is used. + */ + +struct ia_css_fpn_table { + int16_t *data; /** Table content (fixed patterns noise). + u0.[13-shift], [0,63] */ + uint32_t width; /** Table width (in pixels). + This is the input frame width. */ + uint32_t height; /** Table height (in pixels). + This is the input frame height. */ + uint32_t shift; /** Common exponent of table content. + u8.0, [0,13] */ + uint32_t enabled; /** Fpn is enabled. + bool */ +}; + +struct ia_css_fpn_configuration { + const struct ia_css_frame_info *info; +}; + +#endif /* __IA_CSS_FPN_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c new file mode 100644 index 0000000000000..0cfb5c94447f5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c @@ -0,0 +1,118 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +#include "ia_css_debug.h" +#endif +#include "sh_css_frac.h" +#include "vamem.h" + +#include "ia_css_gc.host.h" + +const struct ia_css_gc_config default_gc_config = { + 0, + 0 +}; + +const struct ia_css_ce_config default_ce_config = { + 0, + 255 +}; + +void +ia_css_gc_encode( + struct sh_css_isp_gc_params *to, + const struct ia_css_gc_config *from, + unsigned size) +{ + (void)size; + to->gain_k1 = + uDIGIT_FITTING((int)from->gain_k1, 16, + IA_CSS_GAMMA_GAIN_K_SHIFT); + to->gain_k2 = + uDIGIT_FITTING((int)from->gain_k2, 16, + IA_CSS_GAMMA_GAIN_K_SHIFT); +} + +void +ia_css_ce_encode( + struct sh_css_isp_ce_params *to, + const struct ia_css_ce_config *from, + unsigned size) +{ + (void)size; + to->uv_level_min = from->uv_level_min; + to->uv_level_max = from->uv_level_max; +} + +void +ia_css_gc_vamem_encode( + struct sh_css_isp_gc_vamem_params *to, + const struct ia_css_gamma_table *from, + unsigned size) +{ + (void)size; + memcpy (&to->gc, &from->data, sizeof(to->gc)); +} + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_gc_dump( + const struct sh_css_isp_gc_params *gc, + unsigned level) +{ + if (!gc) return; + ia_css_debug_dtrace(level, "Gamma Correction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "gamma_gain_k1", gc->gain_k1); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "gamma_gain_k2", gc->gain_k2); +} + +void +ia_css_ce_dump( + const struct sh_css_isp_ce_params *ce, + unsigned level) +{ + ia_css_debug_dtrace(level, "Chroma Enhancement:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ce_uv_level_min", ce->uv_level_min); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ce_uv_level_max", ce->uv_level_max); +} + +void +ia_css_gc_debug_dtrace( + const struct ia_css_gc_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.gain_k1=%d, config.gain_k2=%d\n", + config->gain_k1, config->gain_k2); +} + +void +ia_css_ce_debug_dtrace( + const struct ia_css_ce_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.uv_level_min=%d, config.uv_level_max=%d\n", + config->uv_level_min, config->uv_level_max); +} +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h new file mode 100644 index 0000000000000..06f08840563ec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h @@ -0,0 +1,65 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC_HOST_H +#define __IA_CSS_GC_HOST_H + +#include "ia_css_gc_param.h" +#include "ia_css_gc_table.host.h" + +extern const struct ia_css_gc_config default_gc_config; +extern const struct ia_css_ce_config default_ce_config; + +void +ia_css_gc_encode( + struct sh_css_isp_gc_params *to, + const struct ia_css_gc_config *from, + unsigned size); + +void +ia_css_gc_vamem_encode( + struct sh_css_isp_gc_vamem_params *to, + const struct ia_css_gamma_table *from, + unsigned size); + +void +ia_css_ce_encode( + struct sh_css_isp_ce_params *to, + const struct ia_css_ce_config *from, + unsigned size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_gc_dump( + const struct sh_css_isp_gc_params *gc, + unsigned level); + +void +ia_css_ce_dump( + const struct sh_css_isp_ce_params *ce, + unsigned level); + +void +ia_css_gc_debug_dtrace( + const struct ia_css_gc_config *config, + unsigned level); + +void +ia_css_ce_debug_dtrace( + const struct ia_css_ce_config *config, + unsigned level); + +#endif + +#endif /* __IA_CSS_GC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h new file mode 100644 index 0000000000000..52972b1a07ff8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h @@ -0,0 +1,61 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC_PARAM_H +#define __IA_CSS_GC_PARAM_H + +#include "type_support.h" +#ifndef PIPE_GENERATION +#ifdef __ISP +#define __INLINE_VAMEM__ +#endif +#include "vamem.h" +#include "ia_css_gc_types.h" + +#if defined(IS_VAMEM_VERSION_1) +#define SH_CSS_ISP_GAMMA_TABLE_SIZE_LOG2 IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE_LOG2 +#define SH_CSS_ISP_GC_TABLE_SIZE IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE +#elif defined(IS_VAMEM_VERSION_2) +#define SH_CSS_ISP_GAMMA_TABLE_SIZE_LOG2 IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE_LOG2 +#define SH_CSS_ISP_GC_TABLE_SIZE IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE +#else +#error "Undefined vamem version" +#endif + +#else +/* For pipe generation, the size is not relevant */ +#define SH_CSS_ISP_GC_TABLE_SIZE 0 +#endif + +#define GAMMA_OUTPUT_BITS 8 +#define GAMMA_OUTPUT_MAX_VAL ((1< +#include /* memcpy */ +#include "system_global.h" +#include "vamem.h" +#include "ia_css_types.h" +#include "ia_css_gc_table.host.h" + +#if defined(HAS_VAMEM_VERSION_2) + +struct ia_css_gamma_table default_gamma_table; + +static const uint16_t +default_gamma_table_data[IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE] = { + 0, 4, 8, 12, 17, 21, 27, 32, + 38, 44, 49, 55, 61, 66, 71, 76, + 80, 84, 88, 92, 95, 98, 102, 105, +108, 110, 113, 116, 118, 121, 123, 126, +128, 130, 132, 135, 137, 139, 141, 143, +145, 146, 148, 150, 152, 153, 155, 156, +158, 160, 161, 162, 164, 165, 166, 168, +169, 170, 171, 172, 174, 175, 176, 177, +178, 179, 180, 181, 182, 183, 184, 184, +185, 186, 187, 188, 189, 189, 190, 191, +192, 192, 193, 194, 195, 195, 196, 197, +197, 198, 198, 199, 200, 200, 201, 201, +202, 203, 203, 204, 204, 205, 205, 206, +206, 207, 207, 208, 208, 209, 209, 210, +210, 210, 211, 211, 212, 212, 213, 213, +214, 214, 214, 215, 215, 216, 216, 216, +217, 217, 218, 218, 218, 219, 219, 220, +220, 220, 221, 221, 222, 222, 222, 223, +223, 223, 224, 224, 225, 225, 225, 226, +226, 226, 227, 227, 227, 228, 228, 228, +229, 229, 229, 230, 230, 230, 231, 231, +231, 232, 232, 232, 233, 233, 233, 234, +234, 234, 234, 235, 235, 235, 236, 236, +236, 237, 237, 237, 237, 238, 238, 238, +239, 239, 239, 239, 240, 240, 240, 241, +241, 241, 241, 242, 242, 242, 242, 243, +243, 243, 243, 244, 244, 244, 245, 245, +245, 245, 246, 246, 246, 246, 247, 247, +247, 247, 248, 248, 248, 248, 249, 249, +249, 249, 250, 250, 250, 250, 251, 251, +251, 251, 252, 252, 252, 252, 253, 253, +253, 253, 254, 254, 254, 254, 255, 255, +255 +}; + +#elif defined(HAS_VAMEM_VERSION_1) + +static const uint16_t +default_gamma_table_data[IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE] = { + 0, 1, 2, 3, 4, 5, 6, 7, + 8, 9, 10, 11, 12, 13, 14, 16, + 17, 18, 19, 20, 21, 23, 24, 25, + 27, 28, 29, 31, 32, 33, 35, 36, + 38, 39, 41, 42, 44, 45, 47, 48, + 49, 51, 52, 54, 55, 57, 58, 60, + 61, 62, 64, 65, 66, 68, 69, 70, + 71, 72, 74, 75, 76, 77, 78, 79, + 80, 81, 82, 83, 84, 85, 86, 87, + 88, 89, 90, 91, 92, 93, 93, 94, + 95, 96, 97, 98, 98, 99, 100, 101, + 102, 102, 103, 104, 105, 105, 106, 107, + 108, 108, 109, 110, 110, 111, 112, 112, + 113, 114, 114, 115, 116, 116, 117, 118, + 118, 119, 120, 120, 121, 121, 122, 123, + 123, 124, 125, 125, 126, 126, 127, 127, /* 128 */ + 128, 129, 129, 130, 130, 131, 131, 132, + 132, 133, 134, 134, 135, 135, 136, 136, + 137, 137, 138, 138, 139, 139, 140, 140, + 141, 141, 142, 142, 143, 143, 144, 144, + 145, 145, 145, 146, 146, 147, 147, 148, + 148, 149, 149, 150, 150, 150, 151, 151, + 152, 152, 152, 153, 153, 154, 154, 155, + 155, 155, 156, 156, 156, 157, 157, 158, + 158, 158, 159, 159, 160, 160, 160, 161, + 161, 161, 162, 162, 162, 163, 163, 163, + 164, 164, 164, 165, 165, 165, 166, 166, + 166, 167, 167, 167, 168, 168, 168, 169, + 169, 169, 170, 170, 170, 170, 171, 171, + 171, 172, 172, 172, 172, 173, 173, 173, + 174, 174, 174, 174, 175, 175, 175, 176, + 176, 176, 176, 177, 177, 177, 177, 178, /* 256 */ + 178, 178, 178, 179, 179, 179, 179, 180, + 180, 180, 180, 181, 181, 181, 181, 182, + 182, 182, 182, 182, 183, 183, 183, 183, + 184, 184, 184, 184, 184, 185, 185, 185, + 185, 186, 186, 186, 186, 186, 187, 187, + 187, 187, 187, 188, 188, 188, 188, 188, + 189, 189, 189, 189, 189, 190, 190, 190, + 190, 190, 191, 191, 191, 191, 191, 192, + 192, 192, 192, 192, 192, 193, 193, 193, + 193, 193, 194, 194, 194, 194, 194, 194, + 195, 195, 195, 195, 195, 195, 196, 196, + 196, 196, 196, 196, 197, 197, 197, 197, + 197, 197, 198, 198, 198, 198, 198, 198, + 198, 199, 199, 199, 199, 199, 199, 200, + 200, 200, 200, 200, 200, 200, 201, 201, + 201, 201, 201, 201, 201, 202, 202, 202, /* 384 */ + 202, 202, 202, 202, 203, 203, 203, 203, + 203, 203, 203, 204, 204, 204, 204, 204, + 204, 204, 204, 205, 205, 205, 205, 205, + 205, 205, 205, 206, 206, 206, 206, 206, + 206, 206, 206, 207, 207, 207, 207, 207, + 207, 207, 207, 208, 208, 208, 208, 208, + 208, 208, 208, 209, 209, 209, 209, 209, + 209, 209, 209, 209, 210, 210, 210, 210, + 210, 210, 210, 210, 210, 211, 211, 211, + 211, 211, 211, 211, 211, 211, 212, 212, + 212, 212, 212, 212, 212, 212, 212, 213, + 213, 213, 213, 213, 213, 213, 213, 213, + 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 215, 215, 215, 215, 215, 215, + 215, 215, 215, 216, 216, 216, 216, 216, + 216, 216, 216, 216, 216, 217, 217, 217, /* 512 */ + 217, 217, 217, 217, 217, 217, 217, 218, + 218, 218, 218, 218, 218, 218, 218, 218, + 218, 219, 219, 219, 219, 219, 219, 219, + 219, 219, 219, 220, 220, 220, 220, 220, + 220, 220, 220, 220, 220, 221, 221, 221, + 221, 221, 221, 221, 221, 221, 221, 221, + 222, 222, 222, 222, 222, 222, 222, 222, + 222, 222, 223, 223, 223, 223, 223, 223, + 223, 223, 223, 223, 223, 224, 224, 224, + 224, 224, 224, 224, 224, 224, 224, 224, + 225, 225, 225, 225, 225, 225, 225, 225, + 225, 225, 225, 226, 226, 226, 226, 226, + 226, 226, 226, 226, 226, 226, 226, 227, + 227, 227, 227, 227, 227, 227, 227, 227, + 227, 227, 228, 228, 228, 228, 228, 228, + 228, 228, 228, 228, 228, 228, 229, 229, + 229, 229, 229, 229, 229, 229, 229, 229, + 229, 229, 230, 230, 230, 230, 230, 230, + 230, 230, 230, 230, 230, 230, 231, 231, + 231, 231, 231, 231, 231, 231, 231, 231, + 231, 231, 231, 232, 232, 232, 232, 232, + 232, 232, 232, 232, 232, 232, 232, 233, + 233, 233, 233, 233, 233, 233, 233, 233, + 233, 233, 233, 233, 234, 234, 234, 234, + 234, 234, 234, 234, 234, 234, 234, 234, + 234, 235, 235, 235, 235, 235, 235, 235, + 235, 235, 235, 235, 235, 235, 236, 236, + 236, 236, 236, 236, 236, 236, 236, 236, + 236, 236, 236, 236, 237, 237, 237, 237, + 237, 237, 237, 237, 237, 237, 237, 237, + 237, 237, 238, 238, 238, 238, 238, 238, + 238, 238, 238, 238, 238, 238, 238, 238, + 239, 239, 239, 239, 239, 239, 239, 239, + 239, 239, 239, 239, 239, 239, 240, 240, + 240, 240, 240, 240, 240, 240, 240, 240, + 240, 240, 240, 240, 241, 241, 241, 241, + 241, 241, 241, 241, 241, 241, 241, 241, + 241, 241, 241, 242, 242, 242, 242, 242, + 242, 242, 242, 242, 242, 242, 242, 242, + 242, 242, 243, 243, 243, 243, 243, 243, + 243, 243, 243, 243, 243, 243, 243, 243, + 243, 244, 244, 244, 244, 244, 244, 244, + 244, 244, 244, 244, 244, 244, 244, 244, + 245, 245, 245, 245, 245, 245, 245, 245, + 245, 245, 245, 245, 245, 245, 245, 246, + 246, 246, 246, 246, 246, 246, 246, 246, + 246, 246, 246, 246, 246, 246, 246, 247, + 247, 247, 247, 247, 247, 247, 247, 247, + 247, 247, 247, 247, 247, 247, 247, 248, + 248, 248, 248, 248, 248, 248, 248, 248, + 248, 248, 248, 248, 248, 248, 248, 249, + 249, 249, 249, 249, 249, 249, 249, 249, + 249, 249, 249, 249, 249, 249, 249, 250, + 250, 250, 250, 250, 250, 250, 250, 250, + 250, 250, 250, 250, 250, 250, 250, 251, + 251, 251, 251, 251, 251, 251, 251, 251, + 251, 251, 251, 251, 251, 251, 251, 252, + 252, 252, 252, 252, 252, 252, 252, 252, + 252, 252, 252, 252, 252, 252, 252, 253, + 253, 253, 253, 253, 253, 253, 253, 253, + 253, 253, 253, 253, 253, 253, 253, 253, + 254, 254, 254, 254, 254, 254, 254, 254, + 254, 254, 254, 254, 254, 254, 254, 254, + 255, 255, 255, 255, 255, 255, 255, 255 +}; + +#else +#error "VAMEM version must be one of {VAMEM_VERSION_1, VAMEM_VERSION_2}" +#endif + +void +ia_css_config_gamma_table(void) +{ +#if defined(HAS_VAMEM_VERSION_2) + memcpy(default_gamma_table.data.vamem_2, default_gamma_table_data, + sizeof(default_gamma_table_data)); + default_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_2; +#else + memcpy(default_gamma_table.data.vamem_1, default_gamma_table_data, + sizeof(default_gamma_table_data)); + default_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_1; +#endif +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.h new file mode 100644 index 0000000000000..9686623d9cdd4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.h @@ -0,0 +1,24 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC_TABLE_HOST_H +#define __IA_CSS_GC_TABLE_HOST_H + +#include "ia_css_gc_types.h" + +extern struct ia_css_gamma_table default_gamma_table; + +void ia_css_config_gamma_table(void); + +#endif /* __IA_CSS_GC_TABLE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_types.h new file mode 100644 index 0000000000000..594807fe2925b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_types.h @@ -0,0 +1,97 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC_TYPES_H +#define __IA_CSS_GC_TYPES_H + +/* @file +* CSS-API header file for Gamma Correction parameters. +*/ + +#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h" /* FIXME: Needed for ia_css_vamem_type */ + +/* Fractional bits for GAMMA gain */ +#define IA_CSS_GAMMA_GAIN_K_SHIFT 13 + +/* Number of elements in the gamma table. */ +#define IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE_LOG2 10 +#define IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE (1U<gc, &from->data, sizeof(to->gc)); +} + +void +ia_css_g_gamma_vamem_encode( + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned size) +{ + (void)size; + memcpy (&to->gc, &from->data, sizeof(to->gc)); +} + +void +ia_css_b_gamma_vamem_encode( + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned size) +{ + (void)size; + memcpy (&to->gc, &from->data, sizeof(to->gc)); +} + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_yuv2rgb_dump( + const struct sh_css_isp_csc_params *yuv2rgb, + unsigned level) +{ + ia_css_cc_dump(yuv2rgb, level, "YUV to RGB Conversion"); +} + +void +ia_css_rgb2yuv_dump( + const struct sh_css_isp_csc_params *rgb2yuv, + unsigned level) +{ + ia_css_cc_dump(rgb2yuv, level, "RGB to YUV Conversion"); +} + +void +ia_css_rgb_gamma_table_debug_dtrace( + const struct ia_css_rgb_gamma_table *config, + unsigned level) +{ + (void)config; + (void)level; +} +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h new file mode 100644 index 0000000000000..ba140eefd5256 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h @@ -0,0 +1,79 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC2_HOST_H +#define __IA_CSS_GC2_HOST_H + +#include "ia_css_gc2_types.h" +#include "ia_css_gc2_param.h" +#include "ia_css_gc2_table.host.h" + +extern const struct ia_css_cc_config default_yuv2rgb_cc_config; +extern const struct ia_css_cc_config default_rgb2yuv_cc_config; + +void +ia_css_yuv2rgb_encode( + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned size); + +void +ia_css_rgb2yuv_encode( + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned size); + +void +ia_css_r_gamma_vamem_encode( + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned size); + +void +ia_css_g_gamma_vamem_encode( + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned size); + +void +ia_css_b_gamma_vamem_encode( + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_yuv2rgb_dump( + const struct sh_css_isp_csc_params *yuv2rgb, + unsigned level); + +void +ia_css_rgb2yuv_dump( + const struct sh_css_isp_csc_params *rgb2yuv, + unsigned level); + +void +ia_css_rgb_gamma_table_debug_dtrace( + const struct ia_css_rgb_gamma_table *config, + unsigned level); + +#define ia_css_yuv2rgb_debug_dtrace ia_css_cc_config_debug_dtrace +#define ia_css_rgb2yuv_debug_dtrace ia_css_cc_config_debug_dtrace +#define ia_css_r_gamma_debug_dtrace ia_css_rgb_gamma_table_debug_dtrace +#define ia_css_g_gamma_debug_dtrace ia_css_rgb_gamma_table_debug_dtrace +#define ia_css_b_gamma_debug_dtrace ia_css_rgb_gamma_table_debug_dtrace + +#endif + +#endif /* __IA_CSS_GC2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h new file mode 100644 index 0000000000000..d25239f4d86f0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h @@ -0,0 +1,43 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC2_PARAM_H +#define __IA_CSS_GC2_PARAM_H + +#include "type_support.h" +/* Extend GC1 */ +#include "ia_css_gc2_types.h" +#include "gc/gc_1.0/ia_css_gc_param.h" +#include "csc/csc_1.0/ia_css_csc_param.h" + +#ifndef PIPE_GENERATION +#if defined(IS_VAMEM_VERSION_1) +#define SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE +#elif defined(IS_VAMEM_VERSION_2) +#define SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE +#else +#error "Undefined vamem version" +#endif + +#else +/* For pipe generation, the size is not relevant */ +#define SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE 0 +#endif + +/* This should be vamem_data_t, but that breaks the pipe generator */ +struct sh_css_isp_rgb_gamma_vamem_params { + uint16_t gc[SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE]; +}; + +#endif /* __IA_CSS_GC2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c new file mode 100644 index 0000000000000..f14a66b78714f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c @@ -0,0 +1,132 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include /* memcpy */ +#include "system_global.h" +#include "vamem.h" +#include "ia_css_types.h" +#include "ia_css_gc2_table.host.h" + +struct ia_css_rgb_gamma_table default_r_gamma_table; +struct ia_css_rgb_gamma_table default_g_gamma_table; +struct ia_css_rgb_gamma_table default_b_gamma_table; + +/* Identical default gamma table for R, G, and B. */ + +#if defined(HAS_VAMEM_VERSION_2) + +static const uint16_t +default_gamma_table_data[IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE] = { + 0, 72, 144, 216, 288, 360, 426, 486, + 541, 592, 641, 687, 730, 772, 812, 850, + 887, 923, 958, 991, 1024, 1055, 1086, 1117, +1146, 1175, 1203, 1230, 1257, 1284, 1310, 1335, +1360, 1385, 1409, 1433, 1457, 1480, 1502, 1525, +1547, 1569, 1590, 1612, 1632, 1653, 1674, 1694, +1714, 1734, 1753, 1772, 1792, 1811, 1829, 1848, +1866, 1884, 1902, 1920, 1938, 1955, 1973, 1990, +2007, 2024, 2040, 2057, 2074, 2090, 2106, 2122, +2138, 2154, 2170, 2185, 2201, 2216, 2231, 2247, +2262, 2277, 2291, 2306, 2321, 2335, 2350, 2364, +2378, 2393, 2407, 2421, 2435, 2449, 2462, 2476, +2490, 2503, 2517, 2530, 2543, 2557, 2570, 2583, +2596, 2609, 2622, 2634, 2647, 2660, 2673, 2685, +2698, 2710, 2722, 2735, 2747, 2759, 2771, 2783, +2795, 2807, 2819, 2831, 2843, 2855, 2867, 2878, +2890, 2901, 2913, 2924, 2936, 2947, 2958, 2970, +2981, 2992, 3003, 3014, 3025, 3036, 3047, 3058, +3069, 3080, 3091, 3102, 3112, 3123, 3134, 3144, +3155, 3165, 3176, 3186, 3197, 3207, 3217, 3228, +3238, 3248, 3258, 3268, 3279, 3289, 3299, 3309, +3319, 3329, 3339, 3349, 3358, 3368, 3378, 3388, +3398, 3407, 3417, 3427, 3436, 3446, 3455, 3465, +3474, 3484, 3493, 3503, 3512, 3521, 3531, 3540, +3549, 3559, 3568, 3577, 3586, 3595, 3605, 3614, +3623, 3632, 3641, 3650, 3659, 3668, 3677, 3686, +3694, 3703, 3712, 3721, 3730, 3739, 3747, 3756, +3765, 3773, 3782, 3791, 3799, 3808, 3816, 3825, +3833, 3842, 3850, 3859, 3867, 3876, 3884, 3893, +3901, 3909, 3918, 3926, 3934, 3942, 3951, 3959, +3967, 3975, 3984, 3992, 4000, 4008, 4016, 4024, +4032, 4040, 4048, 4056, 4064, 4072, 4080, 4088, +4095 +}; +#elif defined(HAS_VAMEM_VERSION_1) + +static const uint16_t +default_gamma_table_data[IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE] = { + 0, 72, 144, 216, 288, 360, 426, 486, + 541, 592, 641, 687, 730, 772, 812, 850, + 887, 923, 958, 991, 1024, 1055, 1086, 1117, +1146, 1175, 1203, 1230, 1257, 1284, 1310, 1335, +1360, 1385, 1409, 1433, 1457, 1480, 1502, 1525, +1547, 1569, 1590, 1612, 1632, 1653, 1674, 1694, +1714, 1734, 1753, 1772, 1792, 1811, 1829, 1848, +1866, 1884, 1902, 1920, 1938, 1955, 1973, 1990, +2007, 2024, 2040, 2057, 2074, 2090, 2106, 2122, +2138, 2154, 2170, 2185, 2201, 2216, 2231, 2247, +2262, 2277, 2291, 2306, 2321, 2335, 2350, 2364, +2378, 2393, 2407, 2421, 2435, 2449, 2462, 2476, +2490, 2503, 2517, 2530, 2543, 2557, 2570, 2583, +2596, 2609, 2622, 2634, 2647, 2660, 2673, 2685, +2698, 2710, 2722, 2735, 2747, 2759, 2771, 2783, +2795, 2807, 2819, 2831, 2843, 2855, 2867, 2878, +2890, 2901, 2913, 2924, 2936, 2947, 2958, 2970, +2981, 2992, 3003, 3014, 3025, 3036, 3047, 3058, +3069, 3080, 3091, 3102, 3112, 3123, 3134, 3144, +3155, 3165, 3176, 3186, 3197, 3207, 3217, 3228, +3238, 3248, 3258, 3268, 3279, 3289, 3299, 3309, +3319, 3329, 3339, 3349, 3358, 3368, 3378, 3388, +3398, 3407, 3417, 3427, 3436, 3446, 3455, 3465, +3474, 3484, 3493, 3503, 3512, 3521, 3531, 3540, +3549, 3559, 3568, 3577, 3586, 3595, 3605, 3614, +3623, 3632, 3641, 3650, 3659, 3668, 3677, 3686, +3694, 3703, 3712, 3721, 3730, 3739, 3747, 3756, +3765, 3773, 3782, 3791, 3799, 3808, 3816, 3825, +3833, 3842, 3850, 3859, 3867, 3876, 3884, 3893, +3901, 3909, 3918, 3926, 3934, 3942, 3951, 3959, +3967, 3975, 3984, 3992, 4000, 4008, 4016, 4024, +4032, 4040, 4048, 4056, 4064, 4072, 4080, 4088 +}; +#else +#error "VAMEM version must be one of {VAMEM_VERSION_1, VAMEM_VERSION_2}" +#endif + +void +ia_css_config_rgb_gamma_tables(void) +{ +#if defined(HAS_VAMEM_VERSION_2) + default_r_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_2; + default_g_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_2; + default_b_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_2; + memcpy(default_r_gamma_table.data.vamem_2, default_gamma_table_data, + sizeof(default_gamma_table_data)); + memcpy(default_g_gamma_table.data.vamem_2, default_gamma_table_data, + sizeof(default_gamma_table_data)); + memcpy(default_b_gamma_table.data.vamem_2, default_gamma_table_data, + sizeof(default_gamma_table_data)); +#else + memcpy(default_r_gamma_table.data.vamem_1, default_gamma_table_data, + sizeof(default_gamma_table_data)); + memcpy(default_g_gamma_table.data.vamem_1, default_gamma_table_data, + sizeof(default_gamma_table_data)); + memcpy(default_b_gamma_table.data.vamem_1, default_gamma_table_data, + sizeof(default_gamma_table_data)); + default_r_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_1; + default_g_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_1; + default_b_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_1; +#endif +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.h new file mode 100644 index 0000000000000..8686e6e3586ce --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC2_TABLE_HOST_H +#define __IA_CSS_GC2_TABLE_HOST_H + +#include "ia_css_gc2_types.h" + +extern struct ia_css_rgb_gamma_table default_r_gamma_table; +extern struct ia_css_rgb_gamma_table default_g_gamma_table; +extern struct ia_css_rgb_gamma_table default_b_gamma_table; + +void ia_css_config_rgb_gamma_tables(void); + +#endif /* __IA_CSS_GC2_TABLE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h new file mode 100644 index 0000000000000..fab7467d30a55 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h @@ -0,0 +1,54 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_GC2_TYPES_H +#define __IA_CSS_GC2_TYPES_H + +#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h" /* FIXME: needed for ia_css_vamem_type */ + +/* @file +* CSS-API header file for Gamma Correction parameters. +*/ + +/* sRGB Gamma table, used for sRGB Gamma Correction. + * + * ISP block: GC2 (sRGB Gamma Correction) + * (ISP1: GC1(YUV Gamma Correction) is used.) + * ISP2: GC2 is used. + */ + +/* Number of elements in the sRGB gamma table. */ +#define IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE_LOG2 8 +#define IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE (1U<irradiance.match_shift[i] = from->irradiance.match_shift[i]; + to->irradiance.match_mul[i] = from->irradiance.match_mul[i]; + to->irradiance.thr_low[i] = from->irradiance.thr_low[i]; + to->irradiance.thr_high[i] = from->irradiance.thr_high[i]; + to->irradiance.thr_coeff[i] = from->irradiance.thr_coeff[i]; + to->irradiance.thr_shift[i] = from->irradiance.thr_shift[i]; + } + to->irradiance.test_irr = from->irradiance.test_irr; + to->irradiance.weight_bpp = from->irradiance.weight_bpp; + + to->deghost.test_deg = from->deghost.test_deg; + to->exclusion.test_excl = from->exclusion.test_excl; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h new file mode 100644 index 0000000000000..8f89bc8f1ca2b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h @@ -0,0 +1,31 @@ +/* Release Version: irci_stable_candrpv_0415_20150521_0458 */ +/* Release Version: irci_ecr-master_20150911_0724 */ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_HDR_HOST_H +#define __IA_CSS_HDR_HOST_H + +#include "ia_css_hdr_param.h" +#include "ia_css_hdr_types.h" + +extern const struct ia_css_hdr_config default_hdr_config; + +void +ia_css_hdr_init_config( + struct sh_css_isp_hdr_params *to, + const struct ia_css_hdr_config *from, + unsigned size); + +#endif /* __IA_CSS_HDR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h new file mode 100644 index 0000000000000..1c053af7d0d35 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h @@ -0,0 +1,53 @@ +/* Release Version: irci_stable_candrpv_0415_20150521_0458 */ +/* Release Version: irci_ecr-master_20150911_0724 */ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_HDR_PARAMS_H +#define __IA_CSS_HDR_PARAMS_H + +#include "type_support.h" + +#define HDR_NUM_INPUT_FRAMES (3) + +/* HDR irradiance map parameters on ISP. */ +struct sh_css_hdr_irradiance_params { + int32_t test_irr; + int32_t match_shift[HDR_NUM_INPUT_FRAMES - 1]; /* Histogram matching shift parameter */ + int32_t match_mul[HDR_NUM_INPUT_FRAMES - 1]; /* Histogram matching multiplication parameter */ + int32_t thr_low[HDR_NUM_INPUT_FRAMES - 1]; /* Weight map soft threshold low bound parameter */ + int32_t thr_high[HDR_NUM_INPUT_FRAMES - 1]; /* Weight map soft threshold high bound parameter */ + int32_t thr_coeff[HDR_NUM_INPUT_FRAMES - 1]; /* Soft threshold linear function coefficient */ + int32_t thr_shift[HDR_NUM_INPUT_FRAMES - 1]; /* Soft threshold precision shift parameter */ + int32_t weight_bpp; /* Weight map bits per pixel */ +}; + +/* HDR deghosting parameters on ISP */ +struct sh_css_hdr_deghost_params { + int32_t test_deg; +}; + +/* HDR exclusion parameters on ISP */ +struct sh_css_hdr_exclusion_params { + int32_t test_excl; +}; + +/* HDR ISP parameters */ +struct sh_css_isp_hdr_params { + struct sh_css_hdr_irradiance_params irradiance; + struct sh_css_hdr_deghost_params deghost; + struct sh_css_hdr_exclusion_params exclusion; +}; + +#endif /* __IA_CSS_HDR_PARAMS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h new file mode 100644 index 0000000000000..26464421b077e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h @@ -0,0 +1,64 @@ +/* Release Version: irci_stable_candrpv_0415_20150521_0458 */ +/* Release Version: irci_ecr-master_20150911_0724 */ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_HDR_TYPES_H +#define __IA_CSS_HDR_TYPES_H + +#define IA_CSS_HDR_MAX_NUM_INPUT_FRAMES (3) + +/** + * \brief HDR Irradiance Parameters + * \detail Currently HDR paramters are used only for testing purposes + */ +struct ia_css_hdr_irradiance_params { + int test_irr; /** Test parameter */ + int match_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Histogram matching shift parameter */ + int match_mul[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Histogram matching multiplication parameter */ + int thr_low[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Weight map soft threshold low bound parameter */ + int thr_high[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Weight map soft threshold high bound parameter */ + int thr_coeff[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Soft threshold linear function coefficien */ + int thr_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Soft threshold precision shift parameter */ + int weight_bpp; /** Weight map bits per pixel */ +}; + +/** + * \brief HDR Deghosting Parameters + * \detail Currently HDR paramters are used only for testing purposes + */ +struct ia_css_hdr_deghost_params { + int test_deg; /** Test parameter */ +}; + +/** + * \brief HDR Exclusion Parameters + * \detail Currently HDR paramters are used only for testing purposes + */ +struct ia_css_hdr_exclusion_params { + int test_excl; /** Test parameter */ +}; + +/** + * \brief HDR public paramterers. + * \details Struct with all paramters for HDR that can be seet from + * the CSS API. Currenly, only test paramters are defined. + */ +struct ia_css_hdr_config { + struct ia_css_hdr_irradiance_params irradiance; /** HDR irradiance paramaters */ + struct ia_css_hdr_deghost_params deghost; /** HDR deghosting parameters */ + struct ia_css_hdr_exclusion_params exclusion; /** HDR exclusion parameters */ +}; + +#endif /* __IA_CSS_HDR_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c new file mode 100644 index 0000000000000..a31c9e828e225 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -0,0 +1,86 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_bayer_io.host.h" +#include "dma.h" +#include "math_support.h" +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif +#include "ia_css_isp_params.h" +#include "ia_css_frame.h" + +void +ia_css_bayer_io_config( + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) +{ + const struct ia_css_frame *in_frame = args->in_frame; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **)& args->out_frame; + const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; + + const unsigned ddr_bits_per_element = sizeof(short) * 8; + const unsigned ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + unsigned size_get = 0, size_put = 0; + unsigned offset = 0; + + if (binary->info->mem_offsets.offsets.param) { + size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; + offset = binary->info->mem_offsets.offsets.param->dmem.get.offset; + } + + if (size_get) { + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct dma_port_config config; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part enter:\n"); +#endif + + ia_css_dma_configure_from_info(&config, in_frame_info); + // The base_address of the input frame will be set in the ISP + to->width = in_frame_info->res.width; + to->height = in_frame_info->res.height; + to->stride = config.stride; + to->ddr_elems_per_word = ddr_elems_per_word; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part leave:\n"); +#endif + } + + if (binary->info->mem_offsets.offsets.param) { + size_put = binary->info->mem_offsets.offsets.param->dmem.put.size; + offset = binary->info->mem_offsets.offsets.param->dmem.put.offset; + } + + if (size_put) { + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct dma_port_config config; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part enter:\n"); +#endif + + ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + to->base_address = out_frames[0]->data; + to->width = out_frames[0]->info.res.width; + to->height = out_frames[0]->info.res.height; + to->stride = config.stride; + to->ddr_elems_per_word = ddr_elems_per_word; + +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part leave:\n"); +#endif + } +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h new file mode 100644 index 0000000000000..7e5d4cfe3454a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -0,0 +1,31 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __BAYER_IO_HOST_H +#define __BAYER_IO_HOST_H + +#include "ia_css_bayer_io_param.h" +#include "ia_css_bayer_io_types.h" +#include "ia_css_binary.h" +#include "sh_css_internal.h" + + +void +ia_css_bayer_io_config( + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); + +#endif /*__BAYER_IO_HOST_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h new file mode 100644 index 0000000000000..7b6f581c4a803 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h @@ -0,0 +1,22 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BAYER_IO_PARAM +#define __IA_CSS_BAYER_IO_PARAM + +#include "../common/ia_css_common_io_param.h" + +#endif /* __IA_CSS_BAYER_IO_PARAM */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h new file mode 100644 index 0000000000000..2291b01452f8a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h @@ -0,0 +1,22 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_BAYER_IO_TYPES_H +#define __IA_CSS_BAYER_IO_TYPES_H + +#include "../common/ia_css_common_io_types.h" + +#endif /* __IA_CSS_BAYER_IO_TYPES_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h new file mode 100644 index 0000000000000..f1ce03aa7951a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h @@ -0,0 +1,22 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_COMMON_IO_PARAM +#define __IA_CSS_COMMON_IO_PARAM + +#include "../common/ia_css_common_io_types.h" + +#endif /* __IA_CSS_COMMON_IO_PARAM */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h new file mode 100644 index 0000000000000..8a9a970632648 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h @@ -0,0 +1,31 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_COMMON_IO_TYPES +#define __IA_CSS_COMMON_IO_TYPES + +#define MAX_IO_DMA_CHANNELS 2 + +struct ia_css_common_io_config { + unsigned base_address; + unsigned width; + unsigned height; + unsigned stride; + unsigned ddr_elems_per_word; + unsigned dma_channel[MAX_IO_DMA_CHANNELS]; +}; + +#endif /* __IA_CSS_COMMON_IO_TYPES */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h new file mode 100644 index 0000000000000..91fb5168c357f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h @@ -0,0 +1,22 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YUV444_IO_PARAM +#define __IA_CSS_YUV444_IO_PARAM + +#include "../common/ia_css_common_io_param.h" + +#endif +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h new file mode 100644 index 0000000000000..dac4403093948 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h @@ -0,0 +1,22 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YUV444_IO_TYPES +#define __IA_CSS_YUV444_IO_TYPES + +#include "../common/ia_css_common_io_types.h" + +#endif +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c new file mode 100644 index 0000000000000..f80480cf9de20 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -0,0 +1,86 @@ +#ifdef ISP2401 +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#include "ia_css_bayer_io.host.h" +#include "dma.h" +#include "math_support.h" +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif +#include "ia_css_isp_params.h" +#include "ia_css_frame.h" + +void +ia_css_bayer_io_config( + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) +{ + const struct ia_css_frame *in_frame = args->in_frame; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **)& args->out_frame; + const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; + + const unsigned ddr_bits_per_element = sizeof(short) * 8; + const unsigned ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + unsigned size_get = 0, size_put = 0; + unsigned offset = 0; + + if (binary->info->mem_offsets.offsets.param) { + size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; + offset = binary->info->mem_offsets.offsets.param->dmem.get.offset; + } + + if (size_get) { + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct dma_port_config config; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part enter:\n"); +#endif + + ia_css_dma_configure_from_info(&config, in_frame_info); + // The base_address of the input frame will be set in the ISP + to->width = in_frame_info->res.width; + to->height = in_frame_info->res.height; + to->stride = config.stride; + to->ddr_elems_per_word = ddr_elems_per_word; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part leave:\n"); +#endif + } + + if (binary->info->mem_offsets.offsets.param) { + size_put = binary->info->mem_offsets.offsets.param->dmem.put.size; + offset = binary->info->mem_offsets.offsets.param->dmem.put.offset; + } + + if (size_put) { + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct dma_port_config config; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part enter:\n"); +#endif + + ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + to->base_address = out_frames[0]->data; + to->width = out_frames[0]->info.res.width; + to->height = out_frames[0]->info.res.height; + to->stride = config.stride; + to->ddr_elems_per_word = ddr_elems_per_word; + +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part leave:\n"); +#endif + } +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h new file mode 100644 index 0000000000000..ab9fa31bfc5ee --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -0,0 +1,31 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __BAYER_IO_HOST_H +#define __BAYER_IO_HOST_H + +#include "ia_css_bayer_io_param.h" +#include "ia_css_bayer_io_types.h" +#include "ia_css_binary.h" +#include "sh_css_internal.h" + + +void +ia_css_bayer_io_config( + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); + +#endif /*__BAYER_IO_HOST_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h new file mode 100644 index 0000000000000..bf5a3eccb3307 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h @@ -0,0 +1,22 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __IA_CSS_BAYER_IO_PARAM +#define __IA_CSS_BAYER_IO_PARAM + +#include "../common/ia_css_common_io_param.h" + +#endif /* __IA_CSS_BAYER_IO_PARAM */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h new file mode 100644 index 0000000000000..9e3c622db4d42 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h @@ -0,0 +1,22 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __IA_CSS_BAYER_IO_TYPES_H +#define __IA_CSS_BAYER_IO_TYPES_H + +#include "../common/ia_css_common_io_types.h" + +#endif /* __IA_CSS_BAYER_IO_TYPES_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h new file mode 100644 index 0000000000000..e5fdcfff0cf7b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h @@ -0,0 +1,22 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __IA_CSS_COMMON_IO_PARAM +#define __IA_CSS_COMMON_IO_PARAM + +#include "../common/ia_css_common_io_types.h" + +#endif /* __IA_CSS_COMMON_IO_PARAM */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h new file mode 100644 index 0000000000000..0a19e2d1aff4a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h @@ -0,0 +1,31 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __IA_CSS_COMMON_IO_TYPES +#define __IA_CSS_COMMON_IO_TYPES + +#define MAX_IO_DMA_CHANNELS 3 + +struct ia_css_common_io_config { + unsigned base_address; + unsigned width; + unsigned height; + unsigned stride; + unsigned ddr_elems_per_word; + unsigned dma_channel[MAX_IO_DMA_CHANNELS]; +}; + +#endif /* __IA_CSS_COMMON_IO_TYPES */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c new file mode 100644 index 0000000000000..eb9e9439cc218 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c @@ -0,0 +1,86 @@ +#ifdef ISP2401 +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#include "ia_css_yuv444_io.host.h" +#include "dma.h" +#include "math_support.h" +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif +#include "ia_css_isp_params.h" +#include "ia_css_frame.h" + +void +ia_css_yuv444_io_config( + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) +{ + const struct ia_css_frame *in_frame = args->in_frame; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **)& args->out_frame; + const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; + + const unsigned ddr_bits_per_element = sizeof(short) * 8; + const unsigned ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + unsigned size_get = 0, size_put = 0; + unsigned offset = 0; + + if (binary->info->mem_offsets.offsets.param) { + size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; + offset = binary->info->mem_offsets.offsets.param->dmem.get.offset; + } + + if (size_get) { + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct dma_port_config config; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() get part enter:\n"); +#endif + + ia_css_dma_configure_from_info(&config, in_frame_info); + // The base_address of the input frame will be set in the ISP + to->width = in_frame_info->res.width; + to->height = in_frame_info->res.height; + to->stride = config.stride; + to->ddr_elems_per_word = ddr_elems_per_word; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() get part leave:\n"); +#endif + } + + if (binary->info->mem_offsets.offsets.param) { + size_put = binary->info->mem_offsets.offsets.param->dmem.put.size; + offset = binary->info->mem_offsets.offsets.param->dmem.put.offset; + } + + if (size_put) { + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct dma_port_config config; +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() put part enter:\n"); +#endif + + ia_css_dma_configure_from_info(&config, &out_frames[0]->info); + to->base_address = out_frames[0]->data; + to->width = out_frames[0]->info.res.width; + to->height = out_frames[0]->info.res.height; + to->stride = config.stride; + to->ddr_elems_per_word = ddr_elems_per_word; + +#ifndef IA_CSS_NO_DEBUG + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() put part leave:\n"); +#endif + } +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h new file mode 100644 index 0000000000000..480172d39aeee --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h @@ -0,0 +1,31 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __YUV444_IO_HOST_H +#define __YUV444_IO_HOST_H + +#include "ia_css_yuv444_io_param.h" +#include "ia_css_yuv444_io_types.h" +#include "ia_css_binary.h" +#include "sh_css_internal.h" + + +void +ia_css_yuv444_io_config( + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); + +#endif /*__YUV44_IO_HOST_H */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h new file mode 100644 index 0000000000000..cc8eda19c6e84 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h @@ -0,0 +1,22 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __IA_CSS_YUV444_IO_PARAM +#define __IA_CSS_YUV444_IO_PARAM + +#include "../common/ia_css_common_io_param.h" + +#endif +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h new file mode 100644 index 0000000000000..343325a111e13 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h @@ -0,0 +1,22 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __IA_CSS_YUV444_IO_TYPES +#define __IA_CSS_YUV444_IO_TYPES + +#include "../common/ia_css_common_io_types.h" + +#endif +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c new file mode 100644 index 0000000000000..9e41cc0a307f0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c @@ -0,0 +1,80 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_iterator.host.h" +#include "ia_css_frame_public.h" +#include "ia_css_binary.h" +#include "ia_css_err.h" +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" + +static const struct ia_css_iterator_configuration default_config = { + .input_info = (struct ia_css_frame_info *)NULL, +}; + +void +ia_css_iterator_config( + struct sh_css_isp_iterator_isp_config *to, + const struct ia_css_iterator_configuration *from, + unsigned size) +{ + (void)size; + ia_css_frame_info_to_frame_sp_info(&to->input_info, from->input_info); + ia_css_frame_info_to_frame_sp_info(&to->internal_info, from->internal_info); + ia_css_frame_info_to_frame_sp_info(&to->output_info, from->output_info); + ia_css_frame_info_to_frame_sp_info(&to->vf_info, from->vf_info); + ia_css_resolution_to_sp_resolution(&to->dvs_envelope, from->dvs_envelope); +} + +enum ia_css_err +ia_css_iterator_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info) +{ + struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + struct ia_css_iterator_configuration config = default_config; + + config.input_info = &binary->in_frame_info; + config.internal_info = &binary->internal_frame_info; + config.output_info = &binary->out_frame_info[0]; + config.vf_info = &binary->vf_frame_info; + config.dvs_envelope = &binary->dvs_envelope; + + /* Use in_info iso binary->in_frame_info. + * They can differ in padded width in case of scaling, e.g. for capture_pp. + * Find out why. + */ + if (in_info) + config.input_info = in_info; + if (binary->out_frame_info[0].res.width == 0) + config.output_info = &binary->out_frame_info[1]; + my_info = *config.output_info; + config.output_info = &my_info; + /* we do this only for preview pipe because in fill_binary_info function + * we assign vf_out res to out res, but for ISP internal processing, we need + * the original out res. for video pipe, it has two output pins --- out and + * vf_out, so it can keep these two resolutions already. */ + if (binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_PREVIEW && + binary->vf_downscale_log2 > 0) { + /* TODO: Remove this after preview output decimation is fixed + * by configuring out&vf info files properly */ + my_info.padded_width <<= binary->vf_downscale_log2; + my_info.res.width <<= binary->vf_downscale_log2; + my_info.res.height <<= binary->vf_downscale_log2; + } + + ia_css_configure_iterator(binary, &config); + + return IA_CSS_SUCCESS; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h new file mode 100644 index 0000000000000..d8f249c5a53b4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h @@ -0,0 +1,34 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ITERATOR_HOST_H +#define __IA_CSS_ITERATOR_HOST_H + +#include "ia_css_frame_public.h" +#include "ia_css_binary.h" +#include "ia_css_err.h" +#include "ia_css_iterator_param.h" + +void +ia_css_iterator_config( + struct sh_css_isp_iterator_isp_config *to, + const struct ia_css_iterator_configuration *from, + unsigned size); + +enum ia_css_err +ia_css_iterator_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info); + +#endif /* __IA_CSS_ITERATOR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator_param.h new file mode 100644 index 0000000000000..d308126e41d34 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator_param.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_ITERATOR_PARAM_H +#define __IA_CSS_ITERATOR_PARAM_H + +#include "ia_css_types.h" /* ia_css_resolution */ +#include "ia_css_frame_public.h" /* ia_css_frame_info */ +#include "ia_css_frame_comm.h" /* ia_css_frame_sp_info */ + +struct ia_css_iterator_configuration { + const struct ia_css_frame_info *input_info; + const struct ia_css_frame_info *internal_info; + const struct ia_css_frame_info *output_info; + const struct ia_css_frame_info *vf_info; + const struct ia_css_resolution *dvs_envelope; +}; + +struct sh_css_isp_iterator_isp_config { + struct ia_css_frame_sp_info input_info; + struct ia_css_frame_sp_info internal_info; + struct ia_css_frame_sp_info output_info; + struct ia_css_frame_sp_info vf_info; + struct ia_css_sp_resolution dvs_envelope; +}; + +#endif /* __IA_CSS_ITERATOR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c new file mode 100644 index 0000000000000..5ddf61fc95fa2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c @@ -0,0 +1,74 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" + +#ifndef IA_CSS_NO_DEBUG +/* FIXME: See BZ 4427 */ +#include "ia_css_debug.h" +#endif + +#include "ia_css_macc1_5.host.h" + +const struct ia_css_macc1_5_config default_macc1_5_config = { + 1 +}; + +void +ia_css_macc1_5_encode( + struct sh_css_isp_macc1_5_params *to, + const struct ia_css_macc1_5_config *from, + unsigned int size) +{ + (void)size; + to->exp = from->exp; +} + +void +ia_css_macc1_5_vmem_encode( + struct sh_css_isp_macc1_5_vmem_params *params, + const struct ia_css_macc1_5_table *from, + unsigned int size) +{ + unsigned int i, j, k, idx; + unsigned int idx_map[] = { + 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8}; + + (void)size; + + for (k = 0; k < 4; k++) + for (i = 0; i < IA_CSS_MACC_NUM_AXES; i++) { + idx = idx_map[i] + (k * IA_CSS_MACC_NUM_AXES); + j = 4 * i; + + params->data[0][(idx)] = from->data[j]; + params->data[1][(idx)] = from->data[j + 1]; + params->data[2][(idx)] = from->data[j + 2]; + params->data[3][(idx)] = from->data[j + 3]; + } + +} + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_macc1_5_debug_dtrace( + const struct ia_css_macc1_5_config *config, + unsigned int level) +{ + ia_css_debug_dtrace(level, + "config.exp=%d\n", + config->exp); +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h new file mode 100644 index 0000000000000..53ef18f7e9121 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC1_5_HOST_H +#define __IA_CSS_MACC1_5_HOST_H + +#include "ia_css_macc1_5_param.h" +#include "ia_css_macc1_5_table.host.h" + +extern const struct ia_css_macc1_5_config default_macc1_5_config; + +void +ia_css_macc1_5_encode( + struct sh_css_isp_macc1_5_params *to, + const struct ia_css_macc1_5_config *from, + unsigned int size); + +void +ia_css_macc1_5_vmem_encode( + struct sh_css_isp_macc1_5_vmem_params *params, + const struct ia_css_macc1_5_table *from, + unsigned int size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_macc1_5_debug_dtrace( + const struct ia_css_macc1_5_config *config, + unsigned int level); +#endif +#endif /* __IA_CSS_MACC1_5_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h new file mode 100644 index 0000000000000..41a2da460dcf3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h @@ -0,0 +1,31 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC1_5_PARAM_H +#define __IA_CSS_MACC1_5_PARAM_H + +#include "type_support.h" +#include "vmem.h" +#include "ia_css_macc1_5_types.h" + +/* MACC */ +struct sh_css_isp_macc1_5_params { + int32_t exp; +}; + +struct sh_css_isp_macc1_5_vmem_params { + VMEM_ARRAY(data, IA_CSS_MACC_NUM_COEFS*ISP_NWAY); +}; + +#endif /* __IA_CSS_MACC1_5_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c new file mode 100644 index 0000000000000..89714bf87b529 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "system_global.h" +#include "ia_css_types.h" +#include "ia_css_macc1_5_table.host.h" + +/* Multi-Axes Color Correction table for ISP2. + * 64values = 2x2matrix for 16area, [s1.12] + * ineffective: 16 of "identity 2x2 matix" {4096,0,0,4096} + */ +const struct ia_css_macc1_5_table default_macc1_5_table = { + { 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096 } +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.h new file mode 100644 index 0000000000000..10a50aa82be80 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC1_5_TABLE_HOST_H +#define __IA_CSS_MACC1_5_TABLE_HOST_H + +#include "macc/macc1_5/ia_css_macc1_5_types.h" + +extern const struct ia_css_macc1_5_table default_macc1_5_table; + +#endif /* __IA_CSS_MACC1_5_TABLE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h new file mode 100644 index 0000000000000..9cd31c2c0253b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h @@ -0,0 +1,74 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC1_5_TYPES_H +#define __IA_CSS_MACC1_5_TYPES_H + +/* @file +* CSS-API header file for Multi-Axis Color Conversion algorithm parameters. +*/ + +/* Multi-Axis Color Conversion configuration + * + * ISP2.6.1: MACC1_5 is used. + */ + + +/* Number of axes in the MACC table. */ +#define IA_CSS_MACC_NUM_AXES 16 +/* Number of coefficients per MACC axes. */ +#define IA_CSS_MACC_NUM_COEFS 4 + +/* Multi-Axes Color Correction (MACC) table. + * + * ISP block: MACC (MACC by only matrix) + * MACC1_5 (MACC by matrix and exponent(ia_css_macc_config)) + * ISP1: MACC is used. + * ISP2: MACC1_5 is used. + * + * [MACC] + * OutU = (data00 * InU + data01 * InV) >> 13 + * OutV = (data10 * InU + data11 * InV) >> 13 + * + * default/ineffective: + * OutU = (8192 * InU + 0 * InV) >> 13 + * OutV = ( 0 * InU + 8192 * InV) >> 13 + * + * [MACC1_5] + * OutU = (data00 * InU + data01 * InV) >> (13 - exp) + * OutV = (data10 * InU + data11 * InV) >> (13 - exp) + * + * default/ineffective: (exp=1) + * OutU = (4096 * InU + 0 * InV) >> (13 - 1) + * OutV = ( 0 * InU + 4096 * InV) >> (13 - 1) + */ +struct ia_css_macc1_5_table { + int16_t data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; + /** 16 of 2x2 matix + MACC1_5: s[macc_config.exp].[13-macc_config.exp], [-8192,8191] + default/ineffective: (s1.12) + 16 of "identity 2x2 matix" {4096,0,0,4096} */ +}; + +/* Multi-Axes Color Correction (MACC) configuration. + * + * ISP block: MACC1_5 (MACC by matrix and exponent(ia_css_macc_config)) + * ISP2: MACC1_5 is used. + */ +struct ia_css_macc1_5_config { + uint8_t exp; /** Common exponent of ia_css_macc_table. + u8.0, [0,13], default 1, ineffective 1 */ +}; + +#endif /* __IA_CSS_MACC1_5_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c new file mode 100644 index 0000000000000..1f7e9e4eec3c5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c @@ -0,0 +1,49 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "sh_css_frac.h" + +#include "ia_css_macc.host.h" + +const struct ia_css_macc_config default_macc_config = { + 1, +}; + +void +ia_css_macc_encode( + struct sh_css_isp_macc_params *to, + const struct ia_css_macc_config *from, + unsigned size) +{ + (void)size; + to->exp = from->exp; +} + +void +ia_css_macc_dump( + const struct sh_css_isp_macc_params *macc, + unsigned level); + +void +ia_css_macc_debug_dtrace( + const struct ia_css_macc_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.exp=%d\n", + config->exp); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h new file mode 100644 index 0000000000000..044b01d38ad62 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC_HOST_H +#define __IA_CSS_MACC_HOST_H + +#include "sh_css_params.h" + +#include "ia_css_macc_param.h" +#include "ia_css_macc_table.host.h" + +extern const struct ia_css_macc_config default_macc_config; + +void +ia_css_macc_encode( + struct sh_css_isp_macc_params *to, + const struct ia_css_macc_config *from, + unsigned size); + + +void +ia_css_macc_dump( + const struct sh_css_isp_macc_params *macc, + unsigned level); + +void +ia_css_macc_debug_dtrace( + const struct ia_css_macc_config *config, + unsigned level); + +#endif /* __IA_CSS_MACC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h new file mode 100644 index 0000000000000..6a12b922c4858 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h @@ -0,0 +1,25 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC_PARAM_H +#define __IA_CSS_MACC_PARAM_H + +#include "type_support.h" + +/* MACC */ +struct sh_css_isp_macc_params { + int32_t exp; +}; + +#endif /* __IA_CSS_MACC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c new file mode 100644 index 0000000000000..8a6c3cafabdc8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "system_global.h" +#include "ia_css_types.h" +#include "ia_css_macc_table.host.h" + +/* Multi-Axes Color Correction table for ISP1. + * 64values = 2x2matrix for 16area, [s2.13] + * ineffective: 16 of "identity 2x2 matix" {8192,0,0,8192} + */ +const struct ia_css_macc_table default_macc_table = { + { 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192 } +}; + +/* Multi-Axes Color Correction table for ISP2. + * 64values = 2x2matrix for 16area, [s1.12] + * ineffective: 16 of "identity 2x2 matix" {4096,0,0,4096} + */ +const struct ia_css_macc_table default_macc2_table = { + { 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096 } +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.h new file mode 100644 index 0000000000000..96d62c9912b84 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.h @@ -0,0 +1,23 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC_TABLE_HOST_H +#define __IA_CSS_MACC_TABLE_HOST_H + +#include "ia_css_macc_types.h" + +extern const struct ia_css_macc_table default_macc_table; +extern const struct ia_css_macc_table default_macc2_table; + +#endif /* __IA_CSS_MACC_TABLE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h new file mode 100644 index 0000000000000..2c9e5a8ceb988 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h @@ -0,0 +1,63 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_MACC_TYPES_H +#define __IA_CSS_MACC_TYPES_H + +/* @file +* CSS-API header file for Multi-Axis Color Correction (MACC) parameters. +*/ + +/* Number of axes in the MACC table. */ +#define IA_CSS_MACC_NUM_AXES 16 +/* Number of coefficients per MACC axes. */ +#define IA_CSS_MACC_NUM_COEFS 4 +/* The number of planes in the morphing table. */ + +/* Multi-Axis Color Correction (MACC) table. + * + * ISP block: MACC1 (MACC by only matrix) + * MACC2 (MACC by matrix and exponent(ia_css_macc_config)) + * ISP1: MACC1 is used. + * ISP2: MACC2 is used. + * + * [MACC1] + * OutU = (data00 * InU + data01 * InV) >> 13 + * OutV = (data10 * InU + data11 * InV) >> 13 + * + * default/ineffective: + * OutU = (8192 * InU + 0 * InV) >> 13 + * OutV = ( 0 * InU + 8192 * InV) >> 13 + * + * [MACC2] + * OutU = (data00 * InU + data01 * InV) >> (13 - exp) + * OutV = (data10 * InU + data11 * InV) >> (13 - exp) + * + * default/ineffective: (exp=1) + * OutU = (4096 * InU + 0 * InV) >> (13 - 1) + * OutV = ( 0 * InU + 4096 * InV) >> (13 - 1) + */ + +struct ia_css_macc_table { + int16_t data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; + /** 16 of 2x2 matix + MACC1: s2.13, [-65536,65535] + default/ineffective: + 16 of "identity 2x2 matix" {8192,0,0,8192} + MACC2: s[macc_config.exp].[13-macc_config.exp], [-8192,8191] + default/ineffective: (s1.12) + 16 of "identity 2x2 matix" {4096,0,0,4096} */ +}; + +#endif /* __IA_CSS_MACC_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c new file mode 100644 index 0000000000000..2c2c5a5854a03 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c @@ -0,0 +1,16 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_norm.host.h" + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.h new file mode 100644 index 0000000000000..42b5143ef78ff --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_NORM_HOST_H +#define __IA_CSS_NORM_HOST_H + +#include "ia_css_norm_param.h" + +#endif /* __IA_CSS_NORM_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h new file mode 100644 index 0000000000000..85dc6fc0a56b3 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h @@ -0,0 +1,19 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_NORM_PARAM_H +#define __IA_CSS_NORM_PARAM_H + + +#endif /* __IA_CSS_NORM_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c new file mode 100644 index 0000000000000..f77aff13f8e3c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c @@ -0,0 +1,79 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "sh_css_frac.h" +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif +#include "isp.h" +#include "ia_css_ob2.host.h" + +const struct ia_css_ob2_config default_ob2_config = { + 0, + 0, + 0, + 0 +}; + +void +ia_css_ob2_encode( + struct sh_css_isp_ob2_params *to, + const struct ia_css_ob2_config *from, + unsigned size) +{ + (void)size; + + /* Blacklevels types are u0_16 */ + to->blacklevel_gr = uDIGIT_FITTING(from->level_gr, 16, SH_CSS_BAYER_BITS); + to->blacklevel_r = uDIGIT_FITTING(from->level_r, 16, SH_CSS_BAYER_BITS); + to->blacklevel_b = uDIGIT_FITTING(from->level_b, 16, SH_CSS_BAYER_BITS); + to->blacklevel_gb = uDIGIT_FITTING(from->level_gb, 16, SH_CSS_BAYER_BITS); +} + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_ob2_dump( + const struct sh_css_isp_ob2_params *ob2, + unsigned level) +{ + if (!ob2) + return; + + ia_css_debug_dtrace(level, "Optical Black 2:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob2_blacklevel_gr", ob2->blacklevel_gr); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob2_blacklevel_r", ob2->blacklevel_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob2_blacklevel_b", ob2->blacklevel_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob2_blacklevel_gb", ob2->blacklevel_gb); + +} + + +void +ia_css_ob2_debug_dtrace( + const struct ia_css_ob2_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.level_gr=%d, config.level_r=%d, " + "config.level_b=%d, config.level_gb=%d, ", + config->level_gr, config->level_r, + config->level_b, config->level_gb); +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h new file mode 100644 index 0000000000000..06846502eca3c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OB2_HOST_H +#define __IA_CSS_OB2_HOST_H + +#include "ia_css_ob2_types.h" +#include "ia_css_ob2_param.h" + +extern const struct ia_css_ob2_config default_ob2_config; + +void +ia_css_ob2_encode( + struct sh_css_isp_ob2_params *to, + const struct ia_css_ob2_config *from, + unsigned size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_ob2_dump( + const struct sh_css_isp_ob2_params *ob2, + unsigned level); + +void +ia_css_ob2_debug_dtrace( + const struct ia_css_ob2_config *config, unsigned level); +#endif + +#endif /* __IA_CSS_OB2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h new file mode 100644 index 0000000000000..5c21d6a3911b1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h @@ -0,0 +1,29 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OB2_PARAM_H +#define __IA_CSS_OB2_PARAM_H + +#include "type_support.h" + + +/* OB2 (Optical Black) */ +struct sh_css_isp_ob2_params { + int32_t blacklevel_gr; + int32_t blacklevel_r; + int32_t blacklevel_b; + int32_t blacklevel_gb; +}; + +#endif /* __IA_CSS_OB2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h new file mode 100644 index 0000000000000..d981394c1c114 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OB2_TYPES_H +#define __IA_CSS_OB2_TYPES_H + +/* @file +* CSS-API header file for Optical Black algorithm parameters. +*/ + +/* Optical Black configuration + * + * ISP2.6.1: OB2 is used. + */ + +#include "ia_css_frac.h" + +struct ia_css_ob2_config { + ia_css_u0_16 level_gr; /** Black level for GR pixels. + u0.16, [0,65535], + default/ineffective 0 */ + ia_css_u0_16 level_r; /** Black level for R pixels. + u0.16, [0,65535], + default/ineffective 0 */ + ia_css_u0_16 level_b; /** Black level for B pixels. + u0.16, [0,65535], + default/ineffective 0 */ + ia_css_u0_16 level_gb; /** Black level for GB pixels. + u0.16, [0,65535], + default/ineffective 0 */ +}; + +#endif /* __IA_CSS_OB2_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c new file mode 100644 index 0000000000000..fd891ac092edf --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c @@ -0,0 +1,159 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "isp.h" + +#include "ia_css_ob.host.h" + +const struct ia_css_ob_config default_ob_config = { + IA_CSS_OB_MODE_NONE, + 0, + 0, + 0, + 0, + 0, + 0 +}; + +/* TODO: include ob.isp.h to get isp knowledge and + add assert on platform restrictions */ + +void +ia_css_ob_configure( + struct sh_css_isp_ob_stream_config *config, + unsigned int isp_pipe_version, + unsigned int raw_bit_depth) +{ + config->isp_pipe_version = isp_pipe_version; + config->raw_bit_depth = raw_bit_depth; +} + +void +ia_css_ob_encode( + struct sh_css_isp_ob_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned size) +{ + unsigned int ob_bit_depth + = config->isp_pipe_version == 2 ? SH_CSS_BAYER_BITS : config->raw_bit_depth; + unsigned int scale = 16 - ob_bit_depth; + + (void)size; + switch (from->mode) { + case IA_CSS_OB_MODE_FIXED: + to->blacklevel_gr = from->level_gr >> scale; + to->blacklevel_r = from->level_r >> scale; + to->blacklevel_b = from->level_b >> scale; + to->blacklevel_gb = from->level_gb >> scale; + to->area_start_bq = 0; + to->area_length_bq = 0; + to->area_length_bq_inverse = 0; + break; + case IA_CSS_OB_MODE_RASTER: + to->blacklevel_gr = 0; + to->blacklevel_r = 0; + to->blacklevel_b = 0; + to->blacklevel_gb = 0; + to->area_start_bq = from->start_position; + to->area_length_bq = + (from->end_position - from->start_position) + 1; + to->area_length_bq_inverse = AREA_LENGTH_UNIT / to->area_length_bq; + break; + default: + to->blacklevel_gr = 0; + to->blacklevel_r = 0; + to->blacklevel_b = 0; + to->blacklevel_gb = 0; + to->area_start_bq = 0; + to->area_length_bq = 0; + to->area_length_bq_inverse = 0; + break; + } +} + +void +ia_css_ob_vmem_encode( + struct sh_css_isp_ob_vmem_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned size) +{ + struct sh_css_isp_ob_params tmp; + struct sh_css_isp_ob_params *ob = &tmp; + + (void)size; + ia_css_ob_encode(&tmp, from, config, sizeof(tmp)); + + { + unsigned i; + unsigned sp_obarea_start_bq = ob->area_start_bq; + unsigned sp_obarea_length_bq = ob->area_length_bq; + unsigned low = sp_obarea_start_bq; + unsigned high = low + sp_obarea_length_bq; + uint16_t all_ones = ~0; + + for (i = 0; i < OBAREA_MASK_SIZE; i++) { + if (i >= low && i < high) + to->vmask[i/ISP_VEC_NELEMS][i%ISP_VEC_NELEMS] = all_ones; + else + to->vmask[i/ISP_VEC_NELEMS][i%ISP_VEC_NELEMS] = 0; + } + } +} + +void +ia_css_ob_dump( + const struct sh_css_isp_ob_params *ob, + unsigned level) +{ + if (!ob) return; + ia_css_debug_dtrace(level, "Optical Black:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob_blacklevel_gr", ob->blacklevel_gr); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob_blacklevel_r", ob->blacklevel_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob_blacklevel_b", ob->blacklevel_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ob_blacklevel_gb", ob->blacklevel_gb); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "obarea_start_bq", ob->area_start_bq); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "obarea_length_bq", ob->area_length_bq); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "obarea_length_bq_inverse", + ob->area_length_bq_inverse); +} + + +void +ia_css_ob_debug_dtrace( + const struct ia_css_ob_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.mode=%d, " + "config.level_gr=%d, config.level_r=%d, " + "config.level_b=%d, config.level_gb=%d, " + "config.start_position=%d, config.end_position=%d\n", + config->mode, + config->level_gr, config->level_r, + config->level_b, config->level_gb, + config->start_position, config->end_position); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h new file mode 100644 index 0000000000000..4af181470f8d2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OB_HOST_H +#define __IA_CSS_OB_HOST_H + +#include "ia_css_ob_types.h" +#include "ia_css_ob_param.h" + +extern const struct ia_css_ob_config default_ob_config; + +void +ia_css_ob_configure( + struct sh_css_isp_ob_stream_config *config, + unsigned int isp_pipe_version, + unsigned int raw_bit_depth); + +void +ia_css_ob_encode( + struct sh_css_isp_ob_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned size); + +void +ia_css_ob_vmem_encode( + struct sh_css_isp_ob_vmem_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned size); + +void +ia_css_ob_dump( + const struct sh_css_isp_ob_params *ob, + unsigned level); + +void +ia_css_ob_debug_dtrace( + const struct ia_css_ob_config *config, unsigned level) +; + +#endif /* __IA_CSS_OB_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h new file mode 100644 index 0000000000000..a60a644bb4ff7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h @@ -0,0 +1,48 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OB_PARAM_H +#define __IA_CSS_OB_PARAM_H + +#include "type_support.h" +#include "vmem.h" + +#define OBAREA_MASK_SIZE 64 +#define OBAREA_LENGTHBQ_INVERSE_SHIFT 12 + +/* AREA_LENGTH_UNIT is dependent on NWAY, requires rewrite */ +#define AREA_LENGTH_UNIT (1<<12) + + +/* OB (Optical Black) */ +struct sh_css_isp_ob_stream_config { + unsigned isp_pipe_version; + unsigned raw_bit_depth; +}; + +struct sh_css_isp_ob_params { + int32_t blacklevel_gr; + int32_t blacklevel_r; + int32_t blacklevel_b; + int32_t blacklevel_gb; + int32_t area_start_bq; + int32_t area_length_bq; + int32_t area_length_bq_inverse; +}; + +struct sh_css_isp_ob_vmem_params { + VMEM_ARRAY(vmask, OBAREA_MASK_SIZE); +}; + +#endif /* __IA_CSS_OB_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h new file mode 100644 index 0000000000000..a9717b8f44acc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h @@ -0,0 +1,69 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OB_TYPES_H +#define __IA_CSS_OB_TYPES_H + +/* @file +* CSS-API header file for Optical Black level parameters. +*/ + +#include "ia_css_frac.h" + +/* Optical black mode. + */ +enum ia_css_ob_mode { + IA_CSS_OB_MODE_NONE, /** OB has no effect. */ + IA_CSS_OB_MODE_FIXED, /** Fixed OB */ + IA_CSS_OB_MODE_RASTER /** Raster OB */ +}; + +/* Optical Black level configuration. + * + * ISP block: OB1 + * ISP1: OB1 is used. + * ISP2: OB1 is used. + */ +struct ia_css_ob_config { + enum ia_css_ob_mode mode; /** Mode (None / Fixed / Raster). + enum, [0,2], + default 1, ineffective 0 */ + ia_css_u0_16 level_gr; /** Black level for GR pixels + (used for Fixed Mode only). + u0.16, [0,65535], + default/ineffective 0 */ + ia_css_u0_16 level_r; /** Black level for R pixels + (used for Fixed Mode only). + u0.16, [0,65535], + default/ineffective 0 */ + ia_css_u0_16 level_b; /** Black level for B pixels + (used for Fixed Mode only). + u0.16, [0,65535], + default/ineffective 0 */ + ia_css_u0_16 level_gb; /** Black level for GB pixels + (used for Fixed Mode only). + u0.16, [0,65535], + default/ineffective 0 */ + uint16_t start_position; /** Start position of OB area + (used for Raster Mode only). + u16.0, [0,63], + default/ineffective 0 */ + uint16_t end_position; /** End position of OB area + (used for Raster Mode only). + u16.0, [0,63], + default/ineffective 0 */ +}; + +#endif /* __IA_CSS_OB_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c new file mode 100644 index 0000000000000..9efe5e5e4e06b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c @@ -0,0 +1,162 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_frame.h" +#include "ia_css_debug.h" +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "ia_css_output.host.h" +#include "isp.h" + +#include "assert_support.h" + +const struct ia_css_output_config default_output_config = { + 0, + 0 +}; + +static const struct ia_css_output_configuration default_output_configuration = { + .info = (struct ia_css_frame_info *)NULL, +}; + +static const struct ia_css_output0_configuration default_output0_configuration = { + .info = (struct ia_css_frame_info *)NULL, +}; + +static const struct ia_css_output1_configuration default_output1_configuration = { + .info = (struct ia_css_frame_info *)NULL, +}; + +void +ia_css_output_encode( + struct sh_css_isp_output_params *to, + const struct ia_css_output_config *from, + unsigned size) +{ + (void)size; + to->enable_hflip = from->enable_hflip; + to->enable_vflip = from->enable_vflip; +} + +void +ia_css_output_config( + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS; + + (void)size; + ia_css_dma_configure_from_info(&to->port_b, from->info); + to->width_a_over_b = elems_a / to->port_b.elems; + to->height = from->info ? from->info->res.height : 0; + to->enable = from->info != NULL; + ia_css_frame_info_to_frame_sp_info(&to->info, from->info); + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert (elems_a % to->port_b.elems == 0); +} + +void +ia_css_output0_config( + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned size) +{ + ia_css_output_config ( + to, (const struct ia_css_output_configuration *)from, size); +} + +void +ia_css_output1_config( + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned size) +{ + ia_css_output_config ( + to, (const struct ia_css_output_configuration *)from, size); +} + +void +ia_css_output_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) +{ + if (NULL != info) { + struct ia_css_output_configuration config = + default_output_configuration; + + config.info = info; + + ia_css_configure_output(binary, &config); + } +} + +void +ia_css_output0_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) +{ + if (NULL != info) { + struct ia_css_output0_configuration config = + default_output0_configuration; + + config.info = info; + + ia_css_configure_output0(binary, &config); + } +} + +void +ia_css_output1_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) +{ + + if (NULL != info) { + struct ia_css_output1_configuration config = + default_output1_configuration; + + config.info = info; + + ia_css_configure_output1(binary, &config); + } +} + +void +ia_css_output_dump( + const struct sh_css_isp_output_params *output, + unsigned level) +{ + if (!output) return; + ia_css_debug_dtrace(level, "Horizontal Output Flip:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "enable", output->enable_hflip); + ia_css_debug_dtrace(level, "Vertical Output Flip:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "enable", output->enable_vflip); +} + +void +ia_css_output_debug_dtrace( + const struct ia_css_output_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.enable_hflip=%d", + config->enable_hflip); + ia_css_debug_dtrace(level, + "config.enable_vflip=%d", + config->enable_vflip); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h new file mode 100644 index 0000000000000..530f934ce81e7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h @@ -0,0 +1,75 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OUTPUT_HOST_H +#define __IA_CSS_OUTPUT_HOST_H + +#include "ia_css_frame_public.h" +#include "ia_css_binary.h" + +#include "ia_css_output_types.h" +#include "ia_css_output_param.h" + +extern const struct ia_css_output_config default_output_config; + +void +ia_css_output_encode( + struct sh_css_isp_output_params *to, + const struct ia_css_output_config *from, + unsigned size); + +void +ia_css_output_config( + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned size); + +void +ia_css_output0_config( + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned size); + +void +ia_css_output1_config( + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned size); + +void +ia_css_output_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); + +void +ia_css_output0_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); + +void +ia_css_output1_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); + +void +ia_css_output_dump( + const struct sh_css_isp_output_params *output, + unsigned level); + +void +ia_css_output_debug_dtrace( + const struct ia_css_output_config *config, + unsigned level); + +#endif /* __IA_CSS_OUTPUT_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h new file mode 100644 index 0000000000000..eb7defa411456 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OUTPUT_PARAM_H +#define __IA_CSS_OUTPUT_PARAM_H + +#include +#include "dma.h" +#include "ia_css_frame_comm.h" /* ia_css_frame_sp_info */ + +/* output frame */ +struct sh_css_isp_output_isp_config { + uint32_t width_a_over_b; + uint32_t height; + uint32_t enable; + struct ia_css_frame_sp_info info; + struct dma_port_config port_b; +}; + +struct sh_css_isp_output_params { + uint8_t enable_hflip; + uint8_t enable_vflip; +}; + +#endif /* __IA_CSS_OUTPUT_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h new file mode 100644 index 0000000000000..9c7342fb8145f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h @@ -0,0 +1,48 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_OUTPUT_TYPES_H +#define __IA_CSS_OUTPUT_TYPES_H + +/* @file +* CSS-API header file for parameters of output frames. +*/ + +/* Output frame + * + * ISP block: output frame + */ + +//#include "ia_css_frame_public.h" +struct ia_css_frame_info; + +struct ia_css_output_configuration { + const struct ia_css_frame_info *info; +}; + +struct ia_css_output0_configuration { + const struct ia_css_frame_info *info; +}; + +struct ia_css_output1_configuration { + const struct ia_css_frame_info *info; +}; + +struct ia_css_output_config { + uint8_t enable_hflip; /** enable horizontal output mirroring */ + uint8_t enable_vflip; /** enable vertical output mirroring */ +}; + +#endif /* __IA_CSS_OUTPUT_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c new file mode 100644 index 0000000000000..d1fb4b1160039 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c @@ -0,0 +1,61 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_frame.h" +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "assert_support.h" +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "isp.h" + +#include "ia_css_qplane.host.h" + +static const struct ia_css_qplane_configuration default_config = { + .pipe = (struct sh_css_sp_pipeline *)NULL, +}; + +void +ia_css_qplane_config( + struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS; + + (void)size; + ia_css_dma_configure_from_info(&to->port_b, from->info); + to->width_a_over_b = elems_a / to->port_b.elems; + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert (elems_a % to->port_b.elems == 0); + + to->inout_port_config = from->pipe->inout_port_config; + to->format = from->info->format; +} + +void +ia_css_qplane_configure( + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) +{ + struct ia_css_qplane_configuration config = default_config; + + config.pipe = pipe; + config.info = info; + + ia_css_configure_qplane(binary, &config); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h new file mode 100644 index 0000000000000..c41e9e5e0fd7a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h @@ -0,0 +1,43 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_QPLANE_HOST_H +#define __IA_CSS_QPLANE_HOST_H + +#include +#include + +#if 0 +/* Cannot be included, since sh_css_internal.h is too generic + * e.g. for FW generation. +*/ +#include "sh_css_internal.h" /* sh_css_sp_pipeline */ +#endif + +#include "ia_css_qplane_types.h" +#include "ia_css_qplane_param.h" + +void +ia_css_qplane_config( + struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned size); + +void +ia_css_qplane_configure( + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); + +#endif /* __IA_CSS_QPLANE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h new file mode 100644 index 0000000000000..5885f621de88a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_QPLANE_PARAM_H +#define __IA_CSS_QPLANE_PARAM_H + +#include +#include "dma.h" + +/* qplane channel */ +struct sh_css_isp_qplane_isp_config { + uint32_t width_a_over_b; + struct dma_port_config port_b; + uint32_t inout_port_config; + uint32_t input_needs_raw_binning; + uint32_t format; /* enum ia_css_frame_format */ +}; + +#endif /* __IA_CSS_QPLANE_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h new file mode 100644 index 0000000000000..62d371841619b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h @@ -0,0 +1,33 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_QPLANE_TYPES_H +#define __IA_CSS_QPLANE_TYPES_H + +#include +#include "sh_css_internal.h" + +/* qplane frame + * + * ISP block: qplane frame + */ + + +struct ia_css_qplane_configuration { + const struct sh_css_sp_pipeline *pipe; + const struct ia_css_frame_info *info; +}; + +#endif /* __IA_CSS_QPLANE_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c new file mode 100644 index 0000000000000..fa9ce0fedf234 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c @@ -0,0 +1,136 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_frame.h" +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "assert_support.h" +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "isp.h" +#include "isp/modes/interface/isp_types.h" + +#include "ia_css_raw.host.h" + + +static const struct ia_css_raw_configuration default_config = { + .pipe = (struct sh_css_sp_pipeline *)NULL, +}; + +static inline unsigned +sh_css_elems_bytes_from_info (unsigned raw_bit_depth) +{ + return CEIL_DIV(raw_bit_depth,8); +} + +/* MW: These areMIPI / ISYS properties, not camera function properties */ +static enum sh_stream_format +css2isp_stream_format(enum atomisp_input_format from) +{ + switch (from) { + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + return sh_stream_format_yuv420_legacy; + case ATOMISP_INPUT_FORMAT_YUV420_8: + case ATOMISP_INPUT_FORMAT_YUV420_10: + case ATOMISP_INPUT_FORMAT_YUV420_16: + return sh_stream_format_yuv420; + case ATOMISP_INPUT_FORMAT_YUV422_8: + case ATOMISP_INPUT_FORMAT_YUV422_10: + case ATOMISP_INPUT_FORMAT_YUV422_16: + return sh_stream_format_yuv422; + case ATOMISP_INPUT_FORMAT_RGB_444: + case ATOMISP_INPUT_FORMAT_RGB_555: + case ATOMISP_INPUT_FORMAT_RGB_565: + case ATOMISP_INPUT_FORMAT_RGB_666: + case ATOMISP_INPUT_FORMAT_RGB_888: + return sh_stream_format_rgb; + case ATOMISP_INPUT_FORMAT_RAW_6: + case ATOMISP_INPUT_FORMAT_RAW_7: + case ATOMISP_INPUT_FORMAT_RAW_8: + case ATOMISP_INPUT_FORMAT_RAW_10: + case ATOMISP_INPUT_FORMAT_RAW_12: + case ATOMISP_INPUT_FORMAT_RAW_14: + case ATOMISP_INPUT_FORMAT_RAW_16: + return sh_stream_format_raw; + case ATOMISP_INPUT_FORMAT_BINARY_8: + default: + return sh_stream_format_raw; + } +} + +void +ia_css_raw_config( + struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS; + const struct ia_css_frame_info *in_info = from->in_info; + const struct ia_css_frame_info *internal_info = from->internal_info; + + (void)size; +#if !defined(USE_INPUT_SYSTEM_VERSION_2401) + /* 2401 input system uses input width width */ + in_info = internal_info; +#else + /*in some cases, in_info is NULL*/ + if (in_info) + (void)internal_info; + else + in_info = internal_info; + +#endif + ia_css_dma_configure_from_info(&to->port_b, in_info); + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert((in_info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) || + (elems_a % to->port_b.elems == 0)); + + to->width_a_over_b = elems_a / to->port_b.elems; + to->inout_port_config = from->pipe->inout_port_config; + to->format = in_info->format; + to->required_bds_factor = from->pipe->required_bds_factor; + to->two_ppc = from->two_ppc; + to->stream_format = css2isp_stream_format(from->stream_format); + to->deinterleaved = from->deinterleaved; +#if (defined(USE_INPUT_SYSTEM_VERSION_2401) || defined(CONFIG_CSI2_PLUS)) + to->start_column = in_info->crop_info.start_column; + to->start_line = in_info->crop_info.start_line; + to->enable_left_padding = from->enable_left_padding; +#endif +} + +void +ia_css_raw_configure( + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved) +{ + uint8_t enable_left_padding = (uint8_t)((binary->left_padding) ? 1 : 0); + struct ia_css_raw_configuration config = default_config; + + config.pipe = pipe; + config.in_info = in_info; + config.internal_info = internal_info; + config.two_ppc = two_ppc; + config.stream_format = binary->input_format; + config.deinterleaved = deinterleaved; + config.enable_left_padding = enable_left_padding; + + ia_css_configure_raw(binary, &config); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h new file mode 100644 index 0000000000000..ac6b7f6b59c62 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_RAW_HOST_H +#define __IA_CSS_RAW_HOST_H + +#include "ia_css_binary.h" + +#include "ia_css_raw_types.h" +#include "ia_css_raw_param.h" + +void +ia_css_raw_config( + struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned size); + +void +ia_css_raw_configure( + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved); + +#endif /* __IA_CSS_RAW_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h new file mode 100644 index 0000000000000..12168b2dec2d0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_RAW_PARAM_H +#define __IA_CSS_RAW_PARAM_H + +#include "type_support.h" + +#include "dma.h" + +/* Raw channel */ +struct sh_css_isp_raw_isp_config { + uint32_t width_a_over_b; + struct dma_port_config port_b; + uint32_t inout_port_config; + uint32_t input_needs_raw_binning; + uint32_t format; /* enum ia_css_frame_format */ + uint32_t required_bds_factor; + uint32_t two_ppc; + uint32_t stream_format; /* enum sh_stream_format */ + uint32_t deinterleaved; + uint32_t start_column; /*left crop offset*/ + uint32_t start_line; /*top crop offset*/ + uint8_t enable_left_padding; /*need this for multiple binary case*/ +}; + +#endif /* __IA_CSS_RAW_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h new file mode 100644 index 0000000000000..ae868eb5e10f7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h @@ -0,0 +1,37 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_RAW_TYPES_H +#define __IA_CSS_RAW_TYPES_H + +#include +#include "sh_css_internal.h" + +/* Raw frame + * + * ISP block: Raw frame + */ + +struct ia_css_raw_configuration { + const struct sh_css_sp_pipeline *pipe; + const struct ia_css_frame_info *in_info; + const struct ia_css_frame_info *internal_info; + bool two_ppc; + enum atomisp_input_format stream_format; + bool deinterleaved; + uint8_t enable_left_padding; +}; + +#endif /* __IA_CSS_RAW_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c new file mode 100644 index 0000000000000..92168211683d5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c @@ -0,0 +1,35 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#if !defined(HAS_NO_HMEM) + +#include "memory_access.h" +#include "ia_css_types.h" +#include "sh_css_internal.h" +#include "sh_css_frac.h" + +#include "ia_css_raa.host.h" + +void +ia_css_raa_encode( + struct sh_css_isp_aa_params *to, + const struct ia_css_aa_config *from, + unsigned size) +{ + (void)size; + (void)to; + (void)from; +} + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h new file mode 100644 index 0000000000000..b4f245c19f18b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h @@ -0,0 +1,27 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_RAA_HOST_H +#define __IA_CSS_RAA_HOST_H + +#include "aa/aa_2/ia_css_aa2_types.h" +#include "aa/aa_2/ia_css_aa2_param.h" + +void +ia_css_raa_encode( + struct sh_css_isp_aa_params *to, + const struct ia_css_aa_config *from, + unsigned size); + +#endif /* __IA_CSS_RAA_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c new file mode 100644 index 0000000000000..4c0ed5d4d971f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c @@ -0,0 +1,74 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "isp.h" +#include "ia_css_ref.host.h" + +void +ia_css_ref_config( + struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS, i; + + (void)size; + ia_css_dma_configure_from_info(&to->port_b, &(from->ref_frames[0]->info)); + to->width_a_over_b = elems_a / to->port_b.elems; + to->dvs_frame_delay = from->dvs_frame_delay; + for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) { + if (from->ref_frames[i]) { + to->ref_frame_addr_y[i] = from->ref_frames[i]->data + from->ref_frames[i]->planes.yuv.y.offset; + to->ref_frame_addr_c[i] = from->ref_frames[i]->data + from->ref_frames[i]->planes.yuv.u.offset; + } else { + to->ref_frame_addr_y[i] = 0; + to->ref_frame_addr_c[i] = 0; + } + } + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert (elems_a % to->port_b.elems == 0); +} + +void +ia_css_ref_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame **ref_frames, + const uint32_t dvs_frame_delay) +{ + struct ia_css_ref_configuration config; + unsigned i; + + for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) + config.ref_frames[i] = ref_frames[i]; + config.dvs_frame_delay = dvs_frame_delay; + ia_css_configure_ref(binary, &config); +} + +void +ia_css_init_ref_state( + struct sh_css_isp_ref_dmem_state *state, + unsigned size) +{ + (void)size; + assert(MAX_NUM_VIDEO_DELAY_FRAMES >= 2); + state->ref_in_buf_idx = 0; + state->ref_out_buf_idx = 1; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h new file mode 100644 index 0000000000000..3c6d728d49ec6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h @@ -0,0 +1,41 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_REF_HOST_H +#define __IA_CSS_REF_HOST_H + +#include +#include + +#include "ia_css_ref_types.h" +#include "ia_css_ref_param.h" +#include "ia_css_ref_state.h" + +void +ia_css_ref_config( + struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned size); + +void +ia_css_ref_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame **ref_frames, + const uint32_t dvs_frame_delay); + +void +ia_css_init_ref_state( + struct sh_css_isp_ref_dmem_state *state, + unsigned size); +#endif /* __IA_CSS_REF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h new file mode 100644 index 0000000000000..026443b999a64 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h @@ -0,0 +1,36 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_REF_PARAM_H +#define __IA_CSS_REF_PARAM_H + +#include +#include "sh_css_defs.h" +#include "dma.h" + +/* Reference frame */ +struct ia_css_ref_configuration { + const struct ia_css_frame *ref_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; + uint32_t dvs_frame_delay; +}; + +struct sh_css_isp_ref_isp_config { + uint32_t width_a_over_b; + struct dma_port_config port_b; + hrt_vaddress ref_frame_addr_y[MAX_NUM_VIDEO_DELAY_FRAMES]; + hrt_vaddress ref_frame_addr_c[MAX_NUM_VIDEO_DELAY_FRAMES]; + uint32_t dvs_frame_delay; +}; + +#endif /* __IA_CSS_REF_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h new file mode 100644 index 0000000000000..7867be8a7958f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_REF_STATE_H +#define __IA_CSS_REF_STATE_H + +#include "type_support.h" + +/* REF (temporal noise reduction) */ +struct sh_css_isp_ref_dmem_state { + int32_t ref_in_buf_idx; + int32_t ref_out_buf_idx; +}; + +#endif /* __IA_CSS_REF_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h new file mode 100644 index 0000000000000..4750fba268b93 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h @@ -0,0 +1,28 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_REF_TYPES_H +#define __IA_CSS_REF_TYPES_H + +/* Reference frame + * + * ISP block: reference frame + */ + +#include + + + +#endif /* __IA_CSS_REF_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c new file mode 100644 index 0000000000000..aa733674f42b6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c @@ -0,0 +1,386 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif +#include "sh_css_frac.h" +#include "assert_support.h" + +#include "bh/bh_2/ia_css_bh.host.h" +#include "ia_css_s3a.host.h" + +const struct ia_css_3a_config default_3a_config = { + 25559, + 32768, + 7209, + 65535, + 0, + 65535, + {-3344, -6104, -19143, 19143, 6104, 3344, 0}, + {1027, 0, -9219, 16384, -9219, 1027, 0} +}; + +static unsigned int s3a_raw_bit_depth; + +void +ia_css_s3a_configure(unsigned int raw_bit_depth) +{ + s3a_raw_bit_depth = raw_bit_depth; +} + +static void +ia_css_ae_encode( + struct sh_css_isp_ae_params *to, + const struct ia_css_3a_config *from, + unsigned size) +{ + (void)size; + /* coefficients to calculate Y */ + to->y_coef_r = + uDIGIT_FITTING(from->ae_y_coef_r, 16, SH_CSS_AE_YCOEF_SHIFT); + to->y_coef_g = + uDIGIT_FITTING(from->ae_y_coef_g, 16, SH_CSS_AE_YCOEF_SHIFT); + to->y_coef_b = + uDIGIT_FITTING(from->ae_y_coef_b, 16, SH_CSS_AE_YCOEF_SHIFT); +} + +static void +ia_css_awb_encode( + struct sh_css_isp_awb_params *to, + const struct ia_css_3a_config *from, + unsigned size) +{ + (void)size; + /* AWB level gate */ + to->lg_high_raw = + uDIGIT_FITTING(from->awb_lg_high_raw, 16, s3a_raw_bit_depth); + to->lg_low = + uDIGIT_FITTING(from->awb_lg_low, 16, SH_CSS_BAYER_BITS); + to->lg_high = + uDIGIT_FITTING(from->awb_lg_high, 16, SH_CSS_BAYER_BITS); +} + +static void +ia_css_af_encode( + struct sh_css_isp_af_params *to, + const struct ia_css_3a_config *from, + unsigned size) +{ + unsigned int i; + (void)size; + + /* af fir coefficients */ + for (i = 0; i < 7; ++i) { + to->fir1[i] = + sDIGIT_FITTING(from->af_fir1_coef[i], 15, + SH_CSS_AF_FIR_SHIFT); + to->fir2[i] = + sDIGIT_FITTING(from->af_fir2_coef[i], 15, + SH_CSS_AF_FIR_SHIFT); + } +} + +void +ia_css_s3a_encode( + struct sh_css_isp_s3a_params *to, + const struct ia_css_3a_config *from, + unsigned size) +{ + (void)size; + + ia_css_ae_encode(&to->ae, from, sizeof(to->ae)); + ia_css_awb_encode(&to->awb, from, sizeof(to->awb)); + ia_css_af_encode(&to->af, from, sizeof(to->af)); +} + +#if 0 +void +ia_css_process_s3a( + unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) +{ + short dmem_offset = stage->binary->info->mem_offsets->dmem.s3a; + + assert(params != NULL); + + if (dmem_offset >= 0) { + ia_css_s3a_encode((struct sh_css_isp_s3a_params *) + &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], + ¶ms->s3a_config); + ia_css_bh_encode((struct sh_css_isp_bh_params *) + &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], + ¶ms->s3a_config); + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM0] = true; + } + + params->isp_params_changed = true; +} +#endif + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_ae_dump( + const struct sh_css_isp_ae_params *ae, + unsigned level) +{ + if (!ae) return; + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ae_y_coef_r", ae->y_coef_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ae_y_coef_g", ae->y_coef_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ae_y_coef_b", ae->y_coef_b); +} + +void +ia_css_awb_dump( + const struct sh_css_isp_awb_params *awb, + unsigned level) +{ + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "awb_lg_high_raw", awb->lg_high_raw); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "awb_lg_low", awb->lg_low); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "awb_lg_high", awb->lg_high); +} + +void +ia_css_af_dump( + const struct sh_css_isp_af_params *af, + unsigned level) +{ + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir1[0]", af->fir1[0]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir1[1]", af->fir1[1]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir1[2]", af->fir1[2]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir1[3]", af->fir1[3]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir1[4]", af->fir1[4]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir1[5]", af->fir1[5]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir1[6]", af->fir1[6]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir2[0]", af->fir2[0]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir2[1]", af->fir2[1]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir2[2]", af->fir2[2]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir2[3]", af->fir2[3]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir2[4]", af->fir2[4]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir2[5]", af->fir2[5]); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "af_fir2[6]", af->fir2[6]); +} + +void +ia_css_s3a_dump( + const struct sh_css_isp_s3a_params *s3a, + unsigned level) +{ + ia_css_debug_dtrace(level, "S3A Support:\n"); + ia_css_ae_dump (&s3a->ae, level); + ia_css_awb_dump (&s3a->awb, level); + ia_css_af_dump (&s3a->af, level); +} + +void +ia_css_s3a_debug_dtrace( + const struct ia_css_3a_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.ae_y_coef_r=%d, config.ae_y_coef_g=%d, " + "config.ae_y_coef_b=%d, config.awb_lg_high_raw=%d, " + "config.awb_lg_low=%d, config.awb_lg_high=%d\n", + config->ae_y_coef_r, config->ae_y_coef_g, + config->ae_y_coef_b, config->awb_lg_high_raw, + config->awb_lg_low, config->awb_lg_high); +} +#endif + +void +ia_css_s3a_hmem_decode( + struct ia_css_3a_statistics *host_stats, + const struct ia_css_bh_table *hmem_buf) +{ +#if defined(HAS_NO_HMEM) + (void)host_stats; + (void)hmem_buf; +#else + struct ia_css_3a_rgby_output *out_ptr; + int i; + + /* pixel counts(BQ) for 3A area */ + int count_for_3a; + int sum_r, diff; + + assert(host_stats != NULL); + assert(host_stats->rgby_data != NULL); + assert(hmem_buf != NULL); + + count_for_3a = host_stats->grid.width * host_stats->grid.height + * host_stats->grid.bqs_per_grid_cell + * host_stats->grid.bqs_per_grid_cell; + + out_ptr = host_stats->rgby_data; + + ia_css_bh_hmem_decode(out_ptr, hmem_buf); + + /* Calculate sum of histogram of R, + which should not be less than count_for_3a */ + sum_r = 0; + for (i = 0; i < HMEM_UNIT_SIZE; i++) { + sum_r += out_ptr[i].r; + } + if (sum_r < count_for_3a) { + /* histogram is invalid */ + return; + } + + /* Verify for sum of histogram of R/G/B/Y */ +#if 0 + { + int sum_g = 0; + int sum_b = 0; + int sum_y = 0; + for (i = 0; i < HMEM_UNIT_SIZE; i++) { + sum_g += out_ptr[i].g; + sum_b += out_ptr[i].b; + sum_y += out_ptr[i].y; + } + if (sum_g != sum_r || sum_b != sum_r || sum_y != sum_r) { + /* histogram is invalid */ + return; + } + } +#endif + + /* + * Limit the histogram area only to 3A area. + * In DSP, the histogram of 0 is incremented for pixels + * which are outside of 3A area. That amount should be subtracted here. + * hist[0] = hist[0] - ((sum of all hist[]) - (pixel count for 3A area)) + */ + diff = sum_r - count_for_3a; + out_ptr[0].r -= diff; + out_ptr[0].g -= diff; + out_ptr[0].b -= diff; + out_ptr[0].y -= diff; +#endif +} + +void +ia_css_s3a_dmem_decode( + struct ia_css_3a_statistics *host_stats, + const struct ia_css_3a_output *isp_stats) +{ + int isp_width, host_width, height, i; + struct ia_css_3a_output *host_ptr; + + assert(host_stats != NULL); + assert(host_stats->data != NULL); + assert(isp_stats != NULL); + + isp_width = host_stats->grid.aligned_width; + host_width = host_stats->grid.width; + height = host_stats->grid.height; + host_ptr = host_stats->data; + + /* Getting 3A statistics from DMEM does not involve any + * transformation (like the VMEM version), we just copy the data + * using a different output width. */ + for (i = 0; i < height; i++) { + memcpy(host_ptr, isp_stats, host_width * sizeof(*host_ptr)); + isp_stats += isp_width; + host_ptr += host_width; + } +} + +/* MW: this is an ISP function */ +static inline int +merge_hi_lo_14(unsigned short hi, unsigned short lo) +{ + int val = (int) ((((unsigned int) hi << 14) & 0xfffc000) | + ((unsigned int) lo & 0x3fff)); + return val; +} + +void +ia_css_s3a_vmem_decode( + struct ia_css_3a_statistics *host_stats, + const uint16_t *isp_stats_hi, + const uint16_t *isp_stats_lo) +{ + int out_width, out_height, chunk, rest, kmax, y, x, k, elm_start, elm, ofs; + const uint16_t *hi, *lo; + struct ia_css_3a_output *output; + + assert(host_stats!= NULL); + assert(host_stats->data != NULL); + assert(isp_stats_hi != NULL); + assert(isp_stats_lo != NULL); + + output = host_stats->data; + out_width = host_stats->grid.width; + out_height = host_stats->grid.height; + hi = isp_stats_hi; + lo = isp_stats_lo; + + chunk = ISP_VEC_NELEMS >> host_stats->grid.deci_factor_log2; + chunk = max(chunk, 1); + + for (y = 0; y < out_height; y++) { + elm_start = y * ISP_S3ATBL_HI_LO_STRIDE; + rest = out_width; + x = 0; + while (x < out_width) { + kmax = (rest > chunk) ? chunk : rest; + ofs = y * out_width + x; + elm = elm_start + x * sizeof(*output) / sizeof(int32_t); + for (k = 0; k < kmax; k++, elm++) { + output[ofs + k].ae_y = merge_hi_lo_14( + hi[elm + chunk * 0], lo[elm + chunk * 0]); + output[ofs + k].awb_cnt = merge_hi_lo_14( + hi[elm + chunk * 1], lo[elm + chunk * 1]); + output[ofs + k].awb_gr = merge_hi_lo_14( + hi[elm + chunk * 2], lo[elm + chunk * 2]); + output[ofs + k].awb_r = merge_hi_lo_14( + hi[elm + chunk * 3], lo[elm + chunk * 3]); + output[ofs + k].awb_b = merge_hi_lo_14( + hi[elm + chunk * 4], lo[elm + chunk * 4]); + output[ofs + k].awb_gb = merge_hi_lo_14( + hi[elm + chunk * 5], lo[elm + chunk * 5]); + output[ofs + k].af_hpf1 = merge_hi_lo_14( + hi[elm + chunk * 6], lo[elm + chunk * 6]); + output[ofs + k].af_hpf2 = merge_hi_lo_14( + hi[elm + chunk * 7], lo[elm + chunk * 7]); + } + x += chunk; + rest -= chunk; + } + } +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h new file mode 100644 index 0000000000000..4bc6c0bf478f8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h @@ -0,0 +1,77 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_S3A_HOST_H +#define __IA_CSS_S3A_HOST_H + +#include "ia_css_s3a_types.h" +#include "ia_css_s3a_param.h" +#include "bh/bh_2/ia_css_bh.host.h" + +extern const struct ia_css_3a_config default_3a_config; + +void +ia_css_s3a_configure( + unsigned int raw_bit_depth); + +void +ia_css_s3a_encode( + struct sh_css_isp_s3a_params *to, + const struct ia_css_3a_config *from, + unsigned size); + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_ae_dump( + const struct sh_css_isp_ae_params *ae, + unsigned level); + +void +ia_css_awb_dump( + const struct sh_css_isp_awb_params *awb, + unsigned level); + +void +ia_css_af_dump( + const struct sh_css_isp_af_params *af, + unsigned level); + +void +ia_css_s3a_dump( + const struct sh_css_isp_s3a_params *s3a, + unsigned level); + +void +ia_css_s3a_debug_dtrace( + const struct ia_css_3a_config *config, + unsigned level); +#endif + +void +ia_css_s3a_hmem_decode( + struct ia_css_3a_statistics *host_stats, + const struct ia_css_bh_table *hmem_buf); + +void +ia_css_s3a_dmem_decode( + struct ia_css_3a_statistics *host_stats, + const struct ia_css_3a_output *isp_stats); + +void +ia_css_s3a_vmem_decode( + struct ia_css_3a_statistics *host_stats, + const uint16_t *isp_stats_hi, + const uint16_t *isp_stats_lo); + +#endif /* __IA_CSS_S3A_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h new file mode 100644 index 0000000000000..35fb0a2c921a1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h @@ -0,0 +1,54 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_S3A_PARAM_H +#define __IA_CSS_S3A_PARAM_H + +#include "type_support.h" + +/* AE (3A Support) */ +struct sh_css_isp_ae_params { + /* coefficients to calculate Y */ + int32_t y_coef_r; + int32_t y_coef_g; + int32_t y_coef_b; +}; + +/* AWB (3A Support) */ +struct sh_css_isp_awb_params { + int32_t lg_high_raw; + int32_t lg_low; + int32_t lg_high; +}; + +/* AF (3A Support) */ +struct sh_css_isp_af_params { + int32_t fir1[7]; + int32_t fir2[7]; +}; + +/* S3A (3A Support) */ +struct sh_css_isp_s3a_params { + /* coefficients to calculate Y */ + struct sh_css_isp_ae_params ae; + + /* AWB level gate */ + struct sh_css_isp_awb_params awb; + + /* af fir coefficients */ + struct sh_css_isp_af_params af; +}; + + +#endif /* __IA_CSS_S3A_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h new file mode 100644 index 0000000000000..63e70669f0859 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h @@ -0,0 +1,220 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_S3A_TYPES_H +#define __IA_CSS_S3A_TYPES_H + +/* @file +* CSS-API header file for 3A statistics parameters. +*/ + +#include + +#if (defined(SYSTEM_css_skycam_c0_system)) && (! defined(PIPE_GENERATION) ) +#include "../../../../components/stats_3a/src/stats_3a_public.h" +#endif + +/* 3A configuration. This configures the 3A statistics collection + * module. + */ + +/* 3A statistics grid + * + * ISP block: S3A1 (3A Support for 3A ver.1 (Histogram is not used for AE)) + * S3A2 (3A Support for 3A ver.2 (Histogram is used for AE)) + * ISP1: S3A1 is used. + * ISP2: S3A2 is used. + */ +struct ia_css_3a_grid_info { + +#if defined(SYSTEM_css_skycam_c0_system) + uint32_t ae_enable; /** ae enabled in binary, + 0:disabled, 1:enabled */ + struct ae_public_config_grid_config ae_grd_info; /** see description in ae_public.h*/ + + uint32_t awb_enable; /** awb enabled in binary, + 0:disabled, 1:enabled */ + struct awb_public_config_grid_config awb_grd_info; /** see description in awb_public.h*/ + + uint32_t af_enable; /** af enabled in binary, + 0:disabled, 1:enabled */ + struct af_public_grid_config af_grd_info; /** see description in af_public.h*/ + + uint32_t awb_fr_enable; /** awb_fr enabled in binary, + 0:disabled, 1:enabled */ + struct awb_fr_public_grid_config awb_fr_grd_info;/** see description in awb_fr_public.h*/ + + uint32_t elem_bit_depth; /** TODO:Taken from BYT - need input from AIQ + if needed for SKC + Bit depth of element used + to calculate 3A statistics. + This is 13, which is the normalized + bayer bit depth in DSP. */ + +#else + uint32_t enable; /** 3A statistics enabled. + 0:disabled, 1:enabled */ + uint32_t use_dmem; /** DMEM or VMEM determines layout. + 0:3A statistics are stored to VMEM, + 1:3A statistics are stored to DMEM */ + uint32_t has_histogram; /** Statistics include histogram. + 0:no histogram, 1:has histogram */ + uint32_t width; /** Width of 3A grid table. + (= Horizontal number of grid cells + in table, which cells have effective + statistics.) */ + uint32_t height; /** Height of 3A grid table. + (= Vertical number of grid cells + in table, which cells have effective + statistics.) */ + uint32_t aligned_width; /** Horizontal stride (for alloc). + (= Horizontal number of grid cells + in table, which means + the allocated width.) */ + uint32_t aligned_height; /** Vertical stride (for alloc). + (= Vertical number of grid cells + in table, which means + the allocated height.) */ + uint32_t bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. + (1BQ means {Gr,R,B,Gb}(2x2 pixels).) + Valid values are 8,16,32,64. */ + uint32_t deci_factor_log2; /** log2 of bqs_per_grid_cell. */ + uint32_t elem_bit_depth; /** Bit depth of element used + to calculate 3A statistics. + This is 13, which is the normalized + bayer bit depth in DSP. */ +#endif +}; + + +/* This struct should be split into 3, for AE, AWB and AF. + * However, that will require driver/ 3A lib modifications. + */ + +/* 3A configuration. This configures the 3A statistics collection + * module. + * + * ae_y_*: Coefficients to calculate luminance from bayer. + * awb_lg_*: Thresholds to check the saturated bayer pixels for AWB. + * Condition of effective pixel for AWB level gate check: + * bayer(sensor) <= awb_lg_high_raw && + * bayer(when AWB statisitcs is calculated) >= awb_lg_low && + * bayer(when AWB statisitcs is calculated) <= awb_lg_high + * af_fir*: Coefficients of high pass filter to calculate AF statistics. + * + * ISP block: S3A1(ae_y_* for AE/AF, awb_lg_* for AWB) + * S3A2(ae_y_* for AF, awb_lg_* for AWB) + * SDVS1(ae_y_*) + * SDVS2(ae_y_*) + * ISP1: S3A1 and SDVS1 are used. + * ISP2: S3A2 and SDVS2 are used. + */ +struct ia_css_3a_config { + ia_css_u0_16 ae_y_coef_r; /** Weight of R for Y. + u0.16, [0,65535], + default/ineffective 25559 */ + ia_css_u0_16 ae_y_coef_g; /** Weight of G for Y. + u0.16, [0,65535], + default/ineffective 32768 */ + ia_css_u0_16 ae_y_coef_b; /** Weight of B for Y. + u0.16, [0,65535], + default/ineffective 7209 */ + ia_css_u0_16 awb_lg_high_raw; /** AWB level gate high for raw. + u0.16, [0,65535], + default 65472(=1023*64), + ineffective 65535 */ + ia_css_u0_16 awb_lg_low; /** AWB level gate low. + u0.16, [0,65535], + default 64(=1*64), + ineffective 0 */ + ia_css_u0_16 awb_lg_high; /** AWB level gate high. + u0.16, [0,65535], + default 65535, + ineffective 65535 */ + ia_css_s0_15 af_fir1_coef[7]; /** AF FIR coefficients of fir1. + s0.15, [-32768,32767], + default/ineffective + -6689,-12207,-32768,32767,12207,6689,0 */ + ia_css_s0_15 af_fir2_coef[7]; /** AF FIR coefficients of fir2. + s0.15, [-32768,32767], + default/ineffective + 2053,0,-18437,32767,-18437,2053,0 */ +}; + +/* 3A statistics. This structure describes the data stored + * in each 3A grid point. + * + * ISP block: S3A1 (3A Support for 3A ver.1) (Histogram is not used for AE) + * S3A2 (3A Support for 3A ver.2) (Histogram is used for AE) + * - ae_y is used only for S3A1. + * - awb_* and af_* are used both for S3A1 and S3A2. + * ISP1: S3A1 is used. + * ISP2: S3A2 is used. + */ +struct ia_css_3a_output { + int32_t ae_y; /** Sum of Y in a statistics window, for AE. + (u19.13) */ + int32_t awb_cnt; /** Number of effective pixels + in a statistics window. + Pixels passed by the AWB level gate check are + judged as "effective". (u32) */ + int32_t awb_gr; /** Sum of Gr in a statistics window, for AWB. + All Gr pixels (not only for effective pixels) + are summed. (u19.13) */ + int32_t awb_r; /** Sum of R in a statistics window, for AWB. + All R pixels (not only for effective pixels) + are summed. (u19.13) */ + int32_t awb_b; /** Sum of B in a statistics window, for AWB. + All B pixels (not only for effective pixels) + are summed. (u19.13) */ + int32_t awb_gb; /** Sum of Gb in a statistics window, for AWB. + All Gb pixels (not only for effective pixels) + are summed. (u19.13) */ + int32_t af_hpf1; /** Sum of |Y| following high pass filter af_fir1 + within a statistics window, for AF. (u19.13) */ + int32_t af_hpf2; /** Sum of |Y| following high pass filter af_fir2 + within a statistics window, for AF. (u19.13) */ +}; + + +/* 3A Statistics. This structure describes the statistics that are generated + * using the provided configuration (ia_css_3a_config). + */ +struct ia_css_3a_statistics { + struct ia_css_3a_grid_info grid; /** grid info contains the dimensions of the 3A grid */ + struct ia_css_3a_output *data; /** the pointer to 3a_output[grid.width * grid.height] + containing the 3A statistics */ + struct ia_css_3a_rgby_output *rgby_data;/** the pointer to 3a_rgby_output[256] + containing the histogram */ +}; + +/* Histogram (Statistics for AE). + * + * 4 histograms(r,g,b,y), + * 256 bins for each histogram, unsigned 24bit value for each bin. + * struct ia_css_3a_rgby_output data[256]; + + * ISP block: HIST2 + * (ISP1: HIST2 is not used.) + * ISP2: HIST2 is used. + */ +struct ia_css_3a_rgby_output { + uint32_t r; /** Number of R of one bin of the histogram R. (u24) */ + uint32_t g; /** Number of G of one bin of the histogram G. (u24) */ + uint32_t b; /** Number of B of one bin of the histogram B. (u24) */ + uint32_t y; /** Number of Y of one bin of the histogram Y. (u24) */ +}; + +#endif /* __IA_CSS_S3A_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c new file mode 100644 index 0000000000000..565ae45b75417 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c @@ -0,0 +1,130 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "assert_support.h" +#ifdef ISP2401 +#include "math_support.h" /* min() */ + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#endif + +#include "ia_css_sc.host.h" + +void +ia_css_sc_encode( + struct sh_css_isp_sc_params *to, + struct ia_css_shading_table **from, + unsigned size) +{ + (void)size; + to->gain_shift = (*from)->fraction_bits; +} + +void +ia_css_sc_dump( + const struct sh_css_isp_sc_params *sc, + unsigned level) +{ + if (!sc) return; + ia_css_debug_dtrace(level, "Shading Correction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "sc_gain_shift", sc->gain_shift); +} + +#ifdef ISP2401 +void +ia_css_sc_config( + struct sh_css_isp_sc_isp_config *to, + const struct ia_css_sc_configuration *from, + unsigned size) +{ + uint32_t internal_org_x_bqs = from->internal_frame_origin_x_bqs_on_sctbl; + uint32_t internal_org_y_bqs = from->internal_frame_origin_y_bqs_on_sctbl; + uint32_t slice, rest, i; + + (void)size; + + /* The internal_frame_origin_x_bqs_on_sctbl is separated to 8 times of slice_vec. */ + rest = internal_org_x_bqs; + for (i = 0; i < SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES; i++) { + slice = min(rest, ((uint32_t)ISP_SLICE_NELEMS)); + rest = rest - slice; + to->interped_gain_hor_slice_bqs[i] = slice; + } + + to->internal_frame_origin_y_bqs_on_sctbl = internal_org_y_bqs; +} + +void +ia_css_sc_configure( + const struct ia_css_binary *binary, + uint32_t internal_frame_origin_x_bqs_on_sctbl, + uint32_t internal_frame_origin_y_bqs_on_sctbl) +{ + const struct ia_css_sc_configuration config = { + internal_frame_origin_x_bqs_on_sctbl, + internal_frame_origin_y_bqs_on_sctbl }; + + ia_css_configure_sc(binary, &config); +} + +#endif +/* ------ deprecated(bz675) : from ------ */ +/* It looks like @parameter{} (in *.pipe) is used to generate the process/get/set functions, + for parameters which should be used in the isp kernels. + However, the ia_css_shading_settings structure has a parameter which is used only in the css, + and does not have a parameter which is used in the isp kernels. + Then, I did not use @parameter{} to generate the get/set function + for the ia_css_shading_settings structure. (michie) */ +void +sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, + struct ia_css_shading_settings *settings) +{ + if (settings == NULL) + return; + assert(params != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_get_shading_settings() enter: settings=%p\n", settings); + + *settings = params->shading_settings; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_get_shading_settings() leave: settings.enable_shading_table_conversion=%d\n", + settings->enable_shading_table_conversion); +} + +void +sh_css_set_shading_settings(struct ia_css_isp_parameters *params, + const struct ia_css_shading_settings *settings) +{ + if (settings == NULL) + return; + assert(params != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_shading_settings() enter: settings.enable_shading_table_conversion=%d\n", + settings->enable_shading_table_conversion); + + params->shading_settings = *settings; + params->shading_settings_changed = true; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_shading_settings() leave: return_void\n"); +} +/* ------ deprecated(bz675) : to ------ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h new file mode 100644 index 0000000000000..b35ac3e4009be --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h @@ -0,0 +1,77 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SC_HOST_H +#define __IA_CSS_SC_HOST_H + +#include "sh_css_params.h" + +#include "ia_css_sc_types.h" +#include "ia_css_sc_param.h" + +void +ia_css_sc_encode( + struct sh_css_isp_sc_params *to, + struct ia_css_shading_table **from, + unsigned size); + +void +ia_css_sc_dump( + const struct sh_css_isp_sc_params *sc, + unsigned level); + +#ifdef ISP2401 +/* @brief Configure the shading correction. + * @param[out] to Parameters used in the shading correction kernel in the isp. + * @param[in] from Parameters passed from the host. + * @param[in] size Size of the sh_css_isp_sc_isp_config structure. + * + * This function passes the parameters for the shading correction from the host to the isp. + */ +void +ia_css_sc_config( + struct sh_css_isp_sc_isp_config *to, + const struct ia_css_sc_configuration *from, + unsigned size); + +/* @brief Configure the shading correction. + * @param[in] binary The binary, which has the shading correction. + * @param[in] internal_frame_origin_x_bqs_on_sctbl + * X coordinate (in bqs) of the origin of the internal frame on the shading table. + * @param[in] internal_frame_origin_y_bqs_on_sctbl + * Y coordinate (in bqs) of the origin of the internal frame on the shading table. + * + * This function calls the ia_css_configure_sc() function. + * (The ia_css_configure_sc() function is automatically generated in ia_css_isp.configs.c.) + * The ia_css_configure_sc() function calls the ia_css_sc_config() function + * to pass the parameters for the shading correction from the host to the isp. + */ +void +ia_css_sc_configure( + const struct ia_css_binary *binary, + uint32_t internal_frame_origin_x_bqs_on_sctbl, + uint32_t internal_frame_origin_y_bqs_on_sctbl); + +#endif +/* ------ deprecated(bz675) : from ------ */ +void +sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, + struct ia_css_shading_settings *settings); + +void +sh_css_set_shading_settings(struct ia_css_isp_parameters *params, + const struct ia_css_shading_settings *settings); +/* ------ deprecated(bz675) : to ------ */ + +#endif /* __IA_CSS_SC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h new file mode 100644 index 0000000000000..d997d5137634c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h @@ -0,0 +1,71 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SC_PARAM_H +#define __IA_CSS_SC_PARAM_H + +#include "type_support.h" + +#ifdef ISP2401 +/* To position the shading center grid point on the center of output image, + * one more grid cell is needed as margin. */ +#define SH_CSS_SCTBL_CENTERING_MARGIN 1 + +/* The shading table width and height are the number of grids, not cells. The last grid should be counted. */ +#define SH_CSS_SCTBL_LAST_GRID_COUNT 1 + +/* Number of horizontal grids per color in the shading table. */ +#define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ + (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + \ + SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) + +/* Number of vertical grids per color in the shading table. */ +#define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ + (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + \ + SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) + +/* Legacy API: Number of horizontal grids per color in the shading table. */ +#define _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ + (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) + +/* Legacy API: Number of vertical grids per color in the shading table. */ +#define _ISP_SCTBL_LEGACY_HEIGHT(input_height, deci_factor_log2) \ + (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) + +#endif +/* SC (Shading Corrction) */ +struct sh_css_isp_sc_params { + int32_t gain_shift; +}; + +#ifdef ISP2401 +/* Number of horizontal slice times for interpolated gain: + * + * The start position of the internal frame does not match the start position of the shading table. + * To get a vector of shading gains (interpolated horizontally and vertically) + * which matches a vector on the internal frame, + * vec_slice is used for 2 adjacent vectors of shading gains. + * The number of shift times by vec_slice is 8. + * Max grid cell bqs to support the shading table centerting: N = 32 + * CEIL_DIV(N-1, ISP_SLICE_NELEMS) = CEIL_DIV(31, 4) = 8 + */ +#define SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES 8 + +struct sh_css_isp_sc_isp_config { + uint32_t interped_gain_hor_slice_bqs[SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES]; + uint32_t internal_frame_origin_y_bqs_on_sctbl; +}; + +#endif +#endif /* __IA_CSS_SC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h new file mode 100644 index 0000000000000..30ce499ac8cfc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h @@ -0,0 +1,136 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SC_TYPES_H +#define __IA_CSS_SC_TYPES_H + +/* @file +* CSS-API header file for Lens Shading Correction (SC) parameters. +*/ + + +/* Number of color planes in the shading table. */ +#define IA_CSS_SC_NUM_COLORS 4 + +/* The 4 colors that a shading table consists of. + * For each color we store a grid of values. + */ +enum ia_css_sc_color { + IA_CSS_SC_COLOR_GR, /** Green on a green-red line */ + IA_CSS_SC_COLOR_R, /** Red */ + IA_CSS_SC_COLOR_B, /** Blue */ + IA_CSS_SC_COLOR_GB /** Green on a green-blue line */ +}; + +/* Lens Shading Correction table. + * + * This describes the color shading artefacts + * introduced by lens imperfections. To correct artefacts, + * bayer values should be multiplied by gains in this table. + * + *------------ deprecated(bz675) : from --------------------------- + * When shading_settings.enable_shading_table_conversion is set as 0, + * this shading table is directly sent to the isp. This table should contain + * the data based on the ia_css_shading_info information filled in the css. + * So, the driver needs to get the ia_css_shading_info information + * from the css, prior to generating the shading table. + * + * When shading_settings.enable_shading_table_conversion is set as 1, + * this shading table is converted in the legacy way in the css + * before it is sent to the isp. + * The driver does not need to get the ia_css_shading_info information. + * + * NOTE: + * The shading table conversion will be removed from the css in the near future, + * because it does not support the bayer scaling by sensor. + * Also, we had better generate the shading table only in one place(AIC). + * At the moment, to support the old driver which assumes the conversion is done in the css, + * shading_settings.enable_shading_table_conversion is set as 1 by default. + *------------ deprecated(bz675) : to --------------------------- + * + * ISP block: SC1 + * ISP1: SC1 is used. + * ISP2: SC1 is used. + */ +struct ia_css_shading_table { + uint32_t enable; /** Set to false for no shading correction. + The data field can be NULL when enable == true */ +/* ------ deprecated(bz675) : from ------ */ + uint32_t sensor_width; /** Native sensor width in pixels. */ + uint32_t sensor_height; /** Native sensor height in lines. + When shading_settings.enable_shading_table_conversion is set + as 0, sensor_width and sensor_height are NOT used. + These are used only in the legacy shading table conversion + in the css, when shading_settings. + enable_shading_table_conversion is set as 1. */ +/* ------ deprecated(bz675) : to ------ */ + uint32_t width; /** Number of data points per line per color. + u8.0, [0,81] */ + uint32_t height; /** Number of lines of data points per color. + u8.0, [0,61] */ + uint32_t fraction_bits; /** Bits of fractional part in the data + points. + u8.0, [0,13] */ + uint16_t *data[IA_CSS_SC_NUM_COLORS]; + /** Table data, one array for each color. + Use ia_css_sc_color to index this array. + u[13-fraction_bits].[fraction_bits], [0,8191] */ +}; + +/* ------ deprecated(bz675) : from ------ */ +/* Shading Correction settings. + * + * NOTE: + * This structure should be removed when the shading table conversion is + * removed from the css. + */ +struct ia_css_shading_settings { + uint32_t enable_shading_table_conversion; /** Set to 0, + if the conversion of the shading table should be disabled + in the css. (default 1) + 0: The shading table is directly sent to the isp. + The shading table should contain the data based on the + ia_css_shading_info information filled in the css. + 1: The shading table is converted in the css, to be fitted + to the shading table definition required in the isp. + NOTE: + Previously, the shading table was always converted in the css + before it was sent to the isp, and this config was not defined. + Currently, the driver is supposed to pass the shading table + which should be directly sent to the isp. + However, some drivers may still pass the shading table which + needs the conversion without setting this config as 1. + To support such an unexpected case for the time being, + enable_shading_table_conversion is set as 1 by default + in the css. */ +}; +/* ------ deprecated(bz675) : to ------ */ + +#ifdef ISP2401 + +/* Shading Correction configuration. + * + * NOTE: The shading table size is larger than or equal to the internal frame size. + */ +struct ia_css_sc_configuration { + uint32_t internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ + uint32_t internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ + /** NOTE: bqs = size in BQ(Bayer Quad) unit. + 1BQ means {Gr,R,B,Gb}(2x2 pixels). + Horizontal 1 bqs corresponds to horizontal 2 pixels. + Vertical 1 bqs corresponds to vertical 2 pixels. */ +}; +#endif + +#endif /* __IA_CSS_SC_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h new file mode 100644 index 0000000000000..4eb4910798fab --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h @@ -0,0 +1,99 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_SDIS_COMMON_HOST_H +#define _IA_CSS_SDIS_COMMON_HOST_H + +#define ISP_MAX_SDIS_HOR_PROJ_NUM_ISP \ + __ISP_SDIS_HOR_PROJ_NUM_ISP(ISP_MAX_INTERNAL_WIDTH, ISP_MAX_INTERNAL_HEIGHT, \ + SH_CSS_DIS_DECI_FACTOR_LOG2, ISP_PIPE_VERSION) +#define ISP_MAX_SDIS_VER_PROJ_NUM_ISP \ + __ISP_SDIS_VER_PROJ_NUM_ISP(ISP_MAX_INTERNAL_WIDTH, \ + SH_CSS_DIS_DECI_FACTOR_LOG2) + +#define _ISP_SDIS_HOR_COEF_NUM_VECS \ + __ISP_SDIS_HOR_COEF_NUM_VECS(ISP_INTERNAL_WIDTH) +#define ISP_MAX_SDIS_HOR_COEF_NUM_VECS \ + __ISP_SDIS_HOR_COEF_NUM_VECS(ISP_MAX_INTERNAL_WIDTH) +#define ISP_MAX_SDIS_VER_COEF_NUM_VECS \ + __ISP_SDIS_VER_COEF_NUM_VECS(ISP_MAX_INTERNAL_HEIGHT) + +/* SDIS Coefficients: */ +/* The ISP uses vectors to store the coefficients, so we round + the number of coefficients up to vectors. */ +#define __ISP_SDIS_HOR_COEF_NUM_VECS(in_width) _ISP_VECS(_ISP_BQS(in_width)) +#define __ISP_SDIS_VER_COEF_NUM_VECS(in_height) _ISP_VECS(_ISP_BQS(in_height)) + +/* SDIS Projections: + * SDIS1: Horizontal projections are calculated for each line. + * Vertical projections are calculated for each column. + * SDIS2: Projections are calculated for each grid cell. + * Grid cells that do not fall completely within the image are not + * valid. The host needs to use the bigger one for the stride but + * should only return the valid ones to the 3A. */ +#define __ISP_SDIS_HOR_PROJ_NUM_ISP(in_width, in_height, deci_factor_log2, \ + isp_pipe_version) \ + ((isp_pipe_version == 1) ? \ + CEIL_SHIFT(_ISP_BQS(in_height), deci_factor_log2) : \ + CEIL_SHIFT(_ISP_BQS(in_width), deci_factor_log2)) + +#define __ISP_SDIS_VER_PROJ_NUM_ISP(in_width, deci_factor_log2) \ + CEIL_SHIFT(_ISP_BQS(in_width), deci_factor_log2) + +#define SH_CSS_DIS_VER_NUM_COEF_TYPES(b) \ + (((b)->info->sp.pipeline.isp_pipe_version == 2) ? \ + IA_CSS_DVS2_NUM_COEF_TYPES : \ + IA_CSS_DVS_NUM_COEF_TYPES) + +#ifndef PIPE_GENERATION +#if defined(__ISP) || defined (MK_FIRMWARE) + +/* Array cannot be 2-dimensional, since driver ddr allocation does not know stride */ +struct sh_css_isp_sdis_hori_proj_tbl { + int32_t tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_HOR_PROJ_NUM_ISP]; +#if DVS2_PROJ_MARGIN > 0 + int32_t margin[DVS2_PROJ_MARGIN]; +#endif +}; + +struct sh_css_isp_sdis_vert_proj_tbl { + int32_t tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_VER_PROJ_NUM_ISP]; +#if DVS2_PROJ_MARGIN > 0 + int32_t margin[DVS2_PROJ_MARGIN]; +#endif +}; + +struct sh_css_isp_sdis_hori_coef_tbl { + VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_HOR_COEF_NUM_VECS*ISP_NWAY); +}; + +struct sh_css_isp_sdis_vert_coef_tbl { + VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_VER_COEF_NUM_VECS*ISP_NWAY); +}; + +#endif /* defined(__ISP) || defined (MK_FIRMWARE) */ +#endif /* PIPE_GENERATION */ + +#ifndef PIPE_GENERATION +struct s_sdis_config { + unsigned horicoef_vectors; + unsigned vertcoef_vectors; + unsigned horiproj_num; + unsigned vertproj_num; +}; + +extern struct s_sdis_config sdis_config; +#endif + +#endif /* _IA_CSS_SDIS_COMMON_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h new file mode 100644 index 0000000000000..381e5730d405c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h @@ -0,0 +1,219 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SDIS_COMMON_TYPES_H +#define __IA_CSS_SDIS_COMMON_TYPES_H + +/* @file +* CSS-API header file for DVS statistics parameters. +*/ + +#include + +/* DVS statistics grid dimensions in number of cells. + */ + +struct ia_css_dvs_grid_dim { + uint32_t width; /** Width of DVS grid table in cells */ + uint32_t height; /** Height of DVS grid table in cells */ +}; + +/* DVS statistics dimensions in number of cells for + * grid, coeffieicient and projection. + */ + +struct ia_css_sdis_info { + struct { + struct ia_css_dvs_grid_dim dim; /* Dimensions */ + struct ia_css_dvs_grid_dim pad; /* Padded dimensions */ + } grid, coef, proj; + uint32_t deci_factor_log2; +}; + +/* DVS statistics grid + * + * ISP block: SDVS1 (DIS/DVS Support for DIS/DVS ver.1 (2-axes)) + * SDVS2 (DVS Support for DVS ver.2 (6-axes)) + * ISP1: SDVS1 is used. + * ISP2: SDVS2 is used. + */ +struct ia_css_dvs_grid_res { + uint32_t width; /** Width of DVS grid table. + (= Horizontal number of grid cells + in table, which cells have effective + statistics.) + For DVS1, this is equal to + the number of vertical statistics. */ + uint32_t aligned_width; /** Stride of each grid line. + (= Horizontal number of grid cells + in table, which means + the allocated width.) */ + uint32_t height; /** Height of DVS grid table. + (= Vertical number of grid cells + in table, which cells have effective + statistics.) + For DVS1, This is equal to + the number of horizontal statistics. */ + uint32_t aligned_height;/** Stride of each grid column. + (= Vertical number of grid cells + in table, which means + the allocated height.) */ +}; + +/* TODO: use ia_css_dvs_grid_res in here. + * However, that implies driver I/F changes + */ +struct ia_css_dvs_grid_info { + uint32_t enable; /** DVS statistics enabled. + 0:disabled, 1:enabled */ + uint32_t width; /** Width of DVS grid table. + (= Horizontal number of grid cells + in table, which cells have effective + statistics.) + For DVS1, this is equal to + the number of vertical statistics. */ + uint32_t aligned_width; /** Stride of each grid line. + (= Horizontal number of grid cells + in table, which means + the allocated width.) */ + uint32_t height; /** Height of DVS grid table. + (= Vertical number of grid cells + in table, which cells have effective + statistics.) + For DVS1, This is equal to + the number of horizontal statistics. */ + uint32_t aligned_height;/** Stride of each grid column. + (= Vertical number of grid cells + in table, which means + the allocated height.) */ + uint32_t bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. + (1BQ means {Gr,R,B,Gb}(2x2 pixels).) + For DVS1, valid value is 64. + For DVS2, valid value is only 64, + currently. */ + uint32_t num_hor_coefs; /** Number of horizontal coefficients. */ + uint32_t num_ver_coefs; /** Number of vertical coefficients. */ +}; + +/* Number of DVS statistics levels + */ +#define IA_CSS_DVS_STAT_NUM_OF_LEVELS 3 + +/* DVS statistics generated by accelerator global configuration + */ +struct dvs_stat_public_dvs_global_cfg { + unsigned char kappa; + /** DVS statistics global configuration - kappa */ + unsigned char match_shift; + /** DVS statistics global configuration - match_shift */ + unsigned char ybin_mode; + /** DVS statistics global configuration - y binning mode */ +}; + +/* DVS statistics generated by accelerator level grid + * configuration + */ +struct dvs_stat_public_dvs_level_grid_cfg { + unsigned char grid_width; + /** DVS statistics grid width */ + unsigned char grid_height; + /** DVS statistics grid height */ + unsigned char block_width; + /** DVS statistics block width */ + unsigned char block_height; + /** DVS statistics block height */ +}; + +/* DVS statistics generated by accelerator level grid start + * configuration + */ +struct dvs_stat_public_dvs_level_grid_start { + unsigned short x_start; + /** DVS statistics level x start */ + unsigned short y_start; + /** DVS statistics level y start */ + unsigned char enable; + /** DVS statistics level enable */ +}; + +/* DVS statistics generated by accelerator level grid end + * configuration + */ +struct dvs_stat_public_dvs_level_grid_end { + unsigned short x_end; + /** DVS statistics level x end */ + unsigned short y_end; + /** DVS statistics level y end */ +}; + +/* DVS statistics generated by accelerator Feature Extraction + * Region Of Interest (FE-ROI) configuration + */ +struct dvs_stat_public_dvs_level_fe_roi_cfg { + unsigned char x_start; + /** DVS statistics fe-roi level x start */ + unsigned char y_start; + /** DVS statistics fe-roi level y start */ + unsigned char x_end; + /** DVS statistics fe-roi level x end */ + unsigned char y_end; + /** DVS statistics fe-roi level y end */ +}; + +/* DVS statistics generated by accelerator public configuration + */ +struct dvs_stat_public_dvs_grd_cfg { + struct dvs_stat_public_dvs_level_grid_cfg grd_cfg; + /** DVS statistics level grid configuration */ + struct dvs_stat_public_dvs_level_grid_start grd_start; + /** DVS statistics level grid start configuration */ + struct dvs_stat_public_dvs_level_grid_end grd_end; + /** DVS statistics level grid end configuration */ +}; + +/* DVS statistics grid generated by accelerator + */ +struct ia_css_dvs_stat_grid_info { + struct dvs_stat_public_dvs_global_cfg dvs_gbl_cfg; + /** DVS statistics global configuration (kappa, match, binning) */ + struct dvs_stat_public_dvs_grd_cfg grd_cfg[IA_CSS_DVS_STAT_NUM_OF_LEVELS]; + /** DVS statistics grid configuration (blocks and grids) */ + struct dvs_stat_public_dvs_level_fe_roi_cfg fe_roi_cfg[IA_CSS_DVS_STAT_NUM_OF_LEVELS]; + /** DVS statistics FE ROI (region of interest) configuration */ +}; + +/* DVS statistics generated by accelerator default grid info + */ +#define DEFAULT_DVS_GRID_INFO \ +(union ia_css_dvs_grid_u) { \ + .dvs_stat_grid_info = (struct ia_css_dvs_stat_grid_info) { \ + .fe_roi_cfg = { \ + [1] = (struct dvs_stat_public_dvs_level_fe_roi_cfg) { \ + .x_start = 4 \ + } \ + } \ + } \ +} + +/* Union that holds all types of DVS statistics grid info in + * CSS format + * */ +union ia_css_dvs_grid_u { + struct ia_css_dvs_stat_grid_info dvs_stat_grid_info; + /** DVS statistics produced by accelerator grid info */ + struct ia_css_dvs_grid_info dvs_grid_info; + /** DVS (DVS1/DVS2) grid info */ +}; + +#endif /* __IA_CSS_SDIS_COMMON_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c new file mode 100644 index 0000000000000..0fdd696bf6549 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c @@ -0,0 +1,423 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "memory_access.h" +#include "assert_support.h" +#include "ia_css_debug.h" +#include "ia_css_sdis_types.h" +#include "sdis/common/ia_css_sdis_common.host.h" +#include "ia_css_sdis.host.h" + +const struct ia_css_dvs_coefficients default_sdis_config = { + .grid = { 0, 0, 0, 0, 0, 0, 0, 0 }, + .hor_coefs = NULL, + .ver_coefs = NULL +}; + +static void +fill_row(short *private, const short *public, unsigned width, unsigned padding) +{ + assert((int)width >= 0); + assert((int)padding >= 0); + memcpy (private, public, width*sizeof(short)); + memset (&private[width], 0, padding*sizeof(short)); +} + +void ia_css_sdis_horicoef_vmem_encode ( + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size) +{ + unsigned aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; + unsigned width = from->grid.num_hor_coefs; + int padding = aligned_width-width; + unsigned stride = size/IA_CSS_DVS_NUM_COEF_TYPES/sizeof(short); + unsigned total_bytes = aligned_width*IA_CSS_DVS_NUM_COEF_TYPES*sizeof(short); + short *public = from->hor_coefs; + short *private = (short*)to; + unsigned type; + + /* Copy the table, add padding */ + assert(padding >= 0); + assert(total_bytes <= size); + assert(size % (IA_CSS_DVS_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); + + for (type = 0; type < IA_CSS_DVS_NUM_COEF_TYPES; type++) { + fill_row(&private[type*stride], &public[type*width], width, padding); + } +} + +void ia_css_sdis_vertcoef_vmem_encode ( + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size) +{ + unsigned aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; + unsigned height = from->grid.num_ver_coefs; + int padding = aligned_height-height; + unsigned stride = size/IA_CSS_DVS_NUM_COEF_TYPES/sizeof(short); + unsigned total_bytes = aligned_height*IA_CSS_DVS_NUM_COEF_TYPES*sizeof(short); + short *public = from->ver_coefs; + short *private = (short*)to; + unsigned type; + + /* Copy the table, add padding */ + assert(padding >= 0); + assert(total_bytes <= size); + assert(size % (IA_CSS_DVS_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); + + for (type = 0; type < IA_CSS_DVS_NUM_COEF_TYPES; type++) { + fill_row(&private[type*stride], &public[type*height], height, padding); + } +} + +void ia_css_sdis_horiproj_encode ( + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size) +{ + (void)to; + (void)from; + (void)size; +} + +void ia_css_sdis_vertproj_encode ( + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size) +{ + (void)to; + (void)from; + (void)size; +} + +void ia_css_get_isp_dis_coefficients( + struct ia_css_stream *stream, + short *horizontal_coefficients, + short *vertical_coefficients) +{ + struct ia_css_isp_parameters *params; + unsigned int hor_num_isp, ver_num_isp; + unsigned int hor_num_3a, ver_num_3a; + int i; + struct ia_css_binary *dvs_binary; + + IA_CSS_ENTER("void"); + + assert(horizontal_coefficients != NULL); + assert(vertical_coefficients != NULL); + + params = stream->isp_params_configs; + + /* Only video pipe supports DVS */ + dvs_binary = ia_css_stream_get_dvs_binary(stream); + if (!dvs_binary) + return; + + hor_num_isp = dvs_binary->dis.coef.pad.width; + ver_num_isp = dvs_binary->dis.coef.pad.height; + hor_num_3a = dvs_binary->dis.coef.dim.width; + ver_num_3a = dvs_binary->dis.coef.dim.height; + + for (i = 0; i < IA_CSS_DVS_NUM_COEF_TYPES; i++) { + fill_row(&horizontal_coefficients[i*hor_num_isp], + ¶ms->dvs_coefs.hor_coefs[i*hor_num_3a], hor_num_3a, hor_num_isp-hor_num_3a); + } + for (i = 0; i < SH_CSS_DIS_VER_NUM_COEF_TYPES(dvs_binary); i++) { + fill_row(&vertical_coefficients[i*ver_num_isp], + ¶ms->dvs_coefs.ver_coefs[i*ver_num_3a], ver_num_3a, ver_num_isp-ver_num_3a); + } + + IA_CSS_LEAVE("void"); +} + +size_t +ia_css_sdis_hor_coef_tbl_bytes( + const struct ia_css_binary *binary) +{ + if (binary->info->sp.pipeline.isp_pipe_version == 1) + return sizeof(short) * IA_CSS_DVS_NUM_COEF_TYPES * binary->dis.coef.pad.width; + else + return sizeof(short) * IA_CSS_DVS2_NUM_COEF_TYPES * binary->dis.coef.pad.width; +} + +size_t +ia_css_sdis_ver_coef_tbl_bytes( + const struct ia_css_binary *binary) +{ + return sizeof(short) * SH_CSS_DIS_VER_NUM_COEF_TYPES(binary) * binary->dis.coef.pad.height; +} + +void +ia_css_sdis_init_info( + struct ia_css_sdis_info *dis, + unsigned sc_3a_dis_width, + unsigned sc_3a_dis_padded_width, + unsigned sc_3a_dis_height, + unsigned isp_pipe_version, + unsigned enabled) +{ + if (!enabled) { + *dis = (struct ia_css_sdis_info) { }; + return; + } + + dis->deci_factor_log2 = SH_CSS_DIS_DECI_FACTOR_LOG2; + + dis->grid.dim.width = + _ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + dis->grid.dim.height = + _ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + dis->grid.pad.width = + CEIL_SHIFT(_ISP_BQS(sc_3a_dis_padded_width), SH_CSS_DIS_DECI_FACTOR_LOG2); + dis->grid.pad.height = + CEIL_SHIFT(_ISP_BQS(sc_3a_dis_height), SH_CSS_DIS_DECI_FACTOR_LOG2); + + dis->coef.dim.width = + (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) << SH_CSS_DIS_DECI_FACTOR_LOG2; + dis->coef.dim.height = + (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2) << SH_CSS_DIS_DECI_FACTOR_LOG2; + dis->coef.pad.width = + __ISP_SDIS_HOR_COEF_NUM_VECS(sc_3a_dis_padded_width) * ISP_VEC_NELEMS; + dis->coef.pad.height = + __ISP_SDIS_VER_COEF_NUM_VECS(sc_3a_dis_height) * ISP_VEC_NELEMS; + if (isp_pipe_version == 1) { + dis->proj.dim.width = + _ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + dis->proj.dim.height = + _ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + } else { + dis->proj.dim.width = + (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) * + (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2); + dis->proj.dim.height = + (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) * + (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2); + } + dis->proj.pad.width = + __ISP_SDIS_HOR_PROJ_NUM_ISP(sc_3a_dis_padded_width, + sc_3a_dis_height, + SH_CSS_DIS_DECI_FACTOR_LOG2, + isp_pipe_version); + dis->proj.pad.height = + __ISP_SDIS_VER_PROJ_NUM_ISP(sc_3a_dis_padded_width, + SH_CSS_DIS_DECI_FACTOR_LOG2); +} + +void ia_css_sdis_clear_coefficients( + struct ia_css_dvs_coefficients *dvs_coefs) +{ + dvs_coefs->hor_coefs = NULL; + dvs_coefs->ver_coefs = NULL; +} + +enum ia_css_err +ia_css_get_dvs_statistics( + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats) +{ + struct ia_css_isp_dvs_statistics_map *map; + enum ia_css_err ret = IA_CSS_SUCCESS; + + IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); + + assert(host_stats != NULL); + assert(isp_stats != NULL); + + map = ia_css_isp_dvs_statistics_map_allocate(isp_stats, NULL); + if (map) { + mmgr_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); + ia_css_translate_dvs_statistics(host_stats, map); + ia_css_isp_dvs_statistics_map_free(map); + } else { + IA_CSS_ERROR("out of memory"); + ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + + IA_CSS_LEAVE_ERR(ret); + return ret; +} + +void +ia_css_translate_dvs_statistics( + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats) +{ + unsigned int hor_num_isp, ver_num_isp, hor_num_dvs, ver_num_dvs, i; + int32_t *hor_ptr_dvs, *ver_ptr_dvs, *hor_ptr_isp, *ver_ptr_isp; + + assert(host_stats != NULL); + assert(host_stats->hor_proj != NULL); + assert(host_stats->ver_proj != NULL); + assert(isp_stats != NULL); + assert(isp_stats->hor_proj != NULL); + assert(isp_stats->ver_proj != NULL); + + IA_CSS_ENTER("hproj=%p, vproj=%p, haddr=%p, vaddr=%p", + host_stats->hor_proj, host_stats->ver_proj, + isp_stats->hor_proj, isp_stats->ver_proj); + + hor_num_isp = host_stats->grid.aligned_height; + ver_num_isp = host_stats->grid.aligned_width; + hor_ptr_isp = isp_stats->hor_proj; + ver_ptr_isp = isp_stats->ver_proj; + hor_num_dvs = host_stats->grid.height; + ver_num_dvs = host_stats->grid.width; + hor_ptr_dvs = host_stats->hor_proj; + ver_ptr_dvs = host_stats->ver_proj; + + for (i = 0; i < IA_CSS_DVS_NUM_COEF_TYPES; i++) { + memcpy(hor_ptr_dvs, hor_ptr_isp, hor_num_dvs * sizeof(int32_t)); + hor_ptr_isp += hor_num_isp; + hor_ptr_dvs += hor_num_dvs; + + memcpy(ver_ptr_dvs, ver_ptr_isp, ver_num_dvs * sizeof(int32_t)); + ver_ptr_isp += ver_num_isp; + ver_ptr_dvs += ver_num_dvs; + } + + IA_CSS_LEAVE("void"); +} + +struct ia_css_isp_dvs_statistics * +ia_css_isp_dvs_statistics_allocate( + const struct ia_css_dvs_grid_info *grid) +{ + struct ia_css_isp_dvs_statistics *me; + int hor_size, ver_size; + + assert(grid != NULL); + + IA_CSS_ENTER("grid=%p", grid); + + if (!grid->enable) + return NULL; + + me = sh_css_calloc(1,sizeof(*me)); + if (!me) + goto err; + + hor_size = CEIL_MUL(sizeof(int) * IA_CSS_DVS_NUM_COEF_TYPES * grid->aligned_height, + HIVE_ISP_DDR_WORD_BYTES); + ver_size = CEIL_MUL(sizeof(int) * IA_CSS_DVS_NUM_COEF_TYPES * grid->aligned_width, + HIVE_ISP_DDR_WORD_BYTES); + + + me->size = hor_size + ver_size; + me->data_ptr = mmgr_malloc(me->size); + if (me->data_ptr == mmgr_NULL) + goto err; + me->hor_size = hor_size; + me->hor_proj = me->data_ptr; + me->ver_size = ver_size; + me->ver_proj = me->data_ptr + hor_size; + + IA_CSS_LEAVE("return=%p", me); + + return me; +err: + ia_css_isp_dvs_statistics_free(me); + + IA_CSS_LEAVE("return=%p", NULL); + + return NULL; +} + +struct ia_css_isp_dvs_statistics_map * +ia_css_isp_dvs_statistics_map_allocate( + const struct ia_css_isp_dvs_statistics *isp_stats, + void *data_ptr) +{ + struct ia_css_isp_dvs_statistics_map *me; + /* Windows compiler does not like adding sizes to a void * + * so we use a local char * instead. */ + char *base_ptr; + + me = sh_css_malloc(sizeof(*me)); + if (!me) { + IA_CSS_LOG("cannot allocate memory"); + goto err; + } + + me->data_ptr = data_ptr; + me->data_allocated = data_ptr == NULL; + + if (!me->data_ptr) { + me->data_ptr = sh_css_malloc(isp_stats->size); + if (!me->data_ptr) { + IA_CSS_LOG("cannot allocate memory"); + goto err; + } + } + base_ptr = me->data_ptr; + + me->size = isp_stats->size; + /* GCC complains when we assign a char * to a void *, so these + * casts are necessary unfortunately. */ + me->hor_proj = (void*)base_ptr; + me->ver_proj = (void*)(base_ptr + isp_stats->hor_size); + + return me; +err: + if (me) + sh_css_free(me); + return NULL; +} + +void +ia_css_isp_dvs_statistics_map_free(struct ia_css_isp_dvs_statistics_map *me) +{ + if (me) { + if (me->data_allocated) + sh_css_free(me->data_ptr); + sh_css_free(me); + } +} + +void +ia_css_isp_dvs_statistics_free(struct ia_css_isp_dvs_statistics *me) +{ + if (me != NULL) { + hmm_free(me->data_ptr); + sh_css_free(me); + } +} + +void ia_css_sdis_horicoef_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} + +void ia_css_sdis_vertcoef_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} + +void ia_css_sdis_horiproj_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} + +void ia_css_sdis_vertproj_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h new file mode 100644 index 0000000000000..95e2c61bbcbab --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h @@ -0,0 +1,101 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SDIS_HOST_H +#define __IA_CSS_SDIS_HOST_H + +#include "ia_css_sdis_types.h" +#include "ia_css_binary.h" +#include "ia_css_stream.h" +#include "sh_css_params.h" + +extern const struct ia_css_dvs_coefficients default_sdis_config; + +/* Opaque here, since size is binary dependent. */ +struct sh_css_isp_sdis_hori_coef_tbl; +struct sh_css_isp_sdis_vert_coef_tbl; +struct sh_css_isp_sdis_hori_proj_tbl; +struct sh_css_isp_sdis_vert_proj_tbl; + +void ia_css_sdis_horicoef_vmem_encode ( + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size); + +void ia_css_sdis_vertcoef_vmem_encode ( + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size); + +void ia_css_sdis_horiproj_encode ( + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size); + +void ia_css_sdis_vertproj_encode ( + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned size); + +void ia_css_get_isp_dis_coefficients( + struct ia_css_stream *stream, + short *horizontal_coefficients, + short *vertical_coefficients); + +enum ia_css_err +ia_css_get_dvs_statistics( + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats); + +void +ia_css_translate_dvs_statistics( + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); + +struct ia_css_isp_dvs_statistics * +ia_css_isp_dvs_statistics_allocate( + const struct ia_css_dvs_grid_info *grid); + +void +ia_css_isp_dvs_statistics_free( + struct ia_css_isp_dvs_statistics *me); + +size_t ia_css_sdis_hor_coef_tbl_bytes(const struct ia_css_binary *binary); +size_t ia_css_sdis_ver_coef_tbl_bytes(const struct ia_css_binary *binary); + +void +ia_css_sdis_init_info( + struct ia_css_sdis_info *dis, + unsigned sc_3a_dis_width, + unsigned sc_3a_dis_padded_width, + unsigned sc_3a_dis_height, + unsigned isp_pipe_version, + unsigned enabled); + +void ia_css_sdis_clear_coefficients( + struct ia_css_dvs_coefficients *dvs_coefs); + +void ia_css_sdis_horicoef_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level); + +void ia_css_sdis_vertcoef_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level); + +void ia_css_sdis_horiproj_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level); + +void ia_css_sdis_vertproj_debug_dtrace( + const struct ia_css_dvs_coefficients *config, unsigned level); + +#endif /* __IA_CSS_SDIS_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h new file mode 100644 index 0000000000000..d2ee57008fb6a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SDIS_TYPES_H +#define __IA_CSS_SDIS_TYPES_H + +/* @file +* CSS-API header file for DVS statistics parameters. +*/ + +/* Number of DVS coefficient types */ +#define IA_CSS_DVS_NUM_COEF_TYPES 6 + +#ifndef PIPE_GENERATION +#include "isp/kernels/sdis/common/ia_css_sdis_common_types.h" +#endif + +/* DVS 1.0 Coefficients. + * This structure describes the coefficients that are needed for the dvs statistics. + */ + +struct ia_css_dvs_coefficients { + struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ + int16_t *hor_coefs; /** the pointer to int16_t[grid.num_hor_coefs * IA_CSS_DVS_NUM_COEF_TYPES] + containing the horizontal coefficients */ + int16_t *ver_coefs; /** the pointer to int16_t[grid.num_ver_coefs * IA_CSS_DVS_NUM_COEF_TYPES] + containing the vertical coefficients */ +}; + +/* DVS 1.0 Statistics. + * This structure describes the statistics that are generated using the provided coefficients. + */ + +struct ia_css_dvs_statistics { + struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ + int32_t *hor_proj; /** the pointer to int16_t[grid.height * IA_CSS_DVS_NUM_COEF_TYPES] + containing the horizontal projections */ + int32_t *ver_proj; /** the pointer to int16_t[grid.width * IA_CSS_DVS_NUM_COEF_TYPES] + containing the vertical projections */ +}; + +#endif /* __IA_CSS_SDIS_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c new file mode 100644 index 0000000000000..9bccb64731546 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c @@ -0,0 +1,338 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include "memory_access.h" +#include "ia_css_debug.h" +#include "ia_css_sdis2.host.h" + +const struct ia_css_dvs2_coefficients default_sdis2_config = { + .grid = { 0, 0, 0, 0, 0, 0, 0, 0 }, + .hor_coefs = { NULL, NULL, NULL, NULL }, + .ver_coefs = { NULL, NULL, NULL, NULL }, +}; + +static void +fill_row(short *private, const short *public, unsigned width, unsigned padding) +{ + memcpy (private, public, width*sizeof(short)); + memset (&private[width], 0, padding*sizeof(short)); +} + +void ia_css_sdis2_horicoef_vmem_encode ( + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size) +{ + unsigned aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; + unsigned width = from->grid.num_hor_coefs; + int padding = aligned_width-width; + unsigned stride = size/IA_CSS_DVS2_NUM_COEF_TYPES/sizeof(short); + unsigned total_bytes = aligned_width*IA_CSS_DVS2_NUM_COEF_TYPES*sizeof(short); + short *private = (short*)to; + + + /* Copy the table, add padding */ + assert(padding >= 0); + assert(total_bytes <= size); + assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); + fill_row(&private[0*stride], from->hor_coefs.odd_real, width, padding); + fill_row(&private[1*stride], from->hor_coefs.odd_imag, width, padding); + fill_row(&private[2*stride], from->hor_coefs.even_real, width, padding); + fill_row(&private[3*stride], from->hor_coefs.even_imag, width, padding); +} + +void ia_css_sdis2_vertcoef_vmem_encode ( + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size) +{ + unsigned aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; + unsigned height = from->grid.num_ver_coefs; + int padding = aligned_height-height; + unsigned stride = size/IA_CSS_DVS2_NUM_COEF_TYPES/sizeof(short); + unsigned total_bytes = aligned_height*IA_CSS_DVS2_NUM_COEF_TYPES*sizeof(short); + short *private = (short*)to; + + /* Copy the table, add padding */ + assert(padding >= 0); + assert(total_bytes <= size); + assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); + fill_row(&private[0*stride], from->ver_coefs.odd_real, height, padding); + fill_row(&private[1*stride], from->ver_coefs.odd_imag, height, padding); + fill_row(&private[2*stride], from->ver_coefs.even_real, height, padding); + fill_row(&private[3*stride], from->ver_coefs.even_imag, height, padding); +} + +void ia_css_sdis2_horiproj_encode ( + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size) +{ + (void)to; + (void)from; + (void)size; +} + +void ia_css_sdis2_vertproj_encode ( + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size) +{ + (void)to; + (void)from; + (void)size; +} + +void ia_css_get_isp_dvs2_coefficients( + struct ia_css_stream *stream, + short *hor_coefs_odd_real, + short *hor_coefs_odd_imag, + short *hor_coefs_even_real, + short *hor_coefs_even_imag, + short *ver_coefs_odd_real, + short *ver_coefs_odd_imag, + short *ver_coefs_even_real, + short *ver_coefs_even_imag) +{ + struct ia_css_isp_parameters *params; + unsigned int hor_num_3a, ver_num_3a; + unsigned int hor_num_isp, ver_num_isp; + struct ia_css_binary *dvs_binary; + + IA_CSS_ENTER("void"); + + assert(stream != NULL); + assert(hor_coefs_odd_real != NULL); + assert(hor_coefs_odd_imag != NULL); + assert(hor_coefs_even_real != NULL); + assert(hor_coefs_even_imag != NULL); + assert(ver_coefs_odd_real != NULL); + assert(ver_coefs_odd_imag != NULL); + assert(ver_coefs_even_real != NULL); + assert(ver_coefs_even_imag != NULL); + + params = stream->isp_params_configs; + + /* Only video pipe supports DVS */ + dvs_binary = ia_css_stream_get_dvs_binary(stream); + if (!dvs_binary) + return; + + hor_num_3a = dvs_binary->dis.coef.dim.width; + ver_num_3a = dvs_binary->dis.coef.dim.height; + hor_num_isp = dvs_binary->dis.coef.pad.width; + ver_num_isp = dvs_binary->dis.coef.pad.height; + + memcpy (hor_coefs_odd_real, params->dvs2_coefs.hor_coefs.odd_real, hor_num_3a * sizeof(short)); + memcpy (hor_coefs_odd_imag, params->dvs2_coefs.hor_coefs.odd_imag, hor_num_3a * sizeof(short)); + memcpy (hor_coefs_even_real, params->dvs2_coefs.hor_coefs.even_real, hor_num_3a * sizeof(short)); + memcpy (hor_coefs_even_imag, params->dvs2_coefs.hor_coefs.even_imag, hor_num_3a * sizeof(short)); + memcpy (ver_coefs_odd_real, params->dvs2_coefs.ver_coefs.odd_real, ver_num_3a * sizeof(short)); + memcpy (ver_coefs_odd_imag, params->dvs2_coefs.ver_coefs.odd_imag, ver_num_3a * sizeof(short)); + memcpy (ver_coefs_even_real, params->dvs2_coefs.ver_coefs.even_real, ver_num_3a * sizeof(short)); + memcpy (ver_coefs_even_imag, params->dvs2_coefs.ver_coefs.even_imag, ver_num_3a * sizeof(short)); + + IA_CSS_LEAVE("void"); +} + +void ia_css_sdis2_clear_coefficients( + struct ia_css_dvs2_coefficients *dvs2_coefs) +{ + dvs2_coefs->hor_coefs.odd_real = NULL; + dvs2_coefs->hor_coefs.odd_imag = NULL; + dvs2_coefs->hor_coefs.even_real = NULL; + dvs2_coefs->hor_coefs.even_imag = NULL; + dvs2_coefs->ver_coefs.odd_real = NULL; + dvs2_coefs->ver_coefs.odd_imag = NULL; + dvs2_coefs->ver_coefs.even_real = NULL; + dvs2_coefs->ver_coefs.even_imag = NULL; +} + +enum ia_css_err +ia_css_get_dvs2_statistics( + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats) +{ + struct ia_css_isp_dvs_statistics_map *map; + enum ia_css_err ret = IA_CSS_SUCCESS; + + IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); + + assert(host_stats != NULL); + assert(isp_stats != NULL); + + map = ia_css_isp_dvs_statistics_map_allocate(isp_stats, NULL); + if (map) { + mmgr_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); + ia_css_translate_dvs2_statistics(host_stats, map); + ia_css_isp_dvs_statistics_map_free(map); + } else { + IA_CSS_ERROR("out of memory"); + ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + + IA_CSS_LEAVE_ERR(ret); + return ret; +} + +void +ia_css_translate_dvs2_statistics( + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats) +{ + unsigned int size_bytes, table_width, table_size, height; + unsigned int src_offset = 0, dst_offset = 0; + int32_t *htemp_ptr, *vtemp_ptr; + + assert(host_stats != NULL); + assert(host_stats->hor_prod.odd_real != NULL); + assert(host_stats->hor_prod.odd_imag != NULL); + assert(host_stats->hor_prod.even_real != NULL); + assert(host_stats->hor_prod.even_imag != NULL); + assert(host_stats->ver_prod.odd_real != NULL); + assert(host_stats->ver_prod.odd_imag != NULL); + assert(host_stats->ver_prod.even_real != NULL); + assert(host_stats->ver_prod.even_imag != NULL); + assert(isp_stats != NULL); + assert(isp_stats->hor_proj != NULL); + assert(isp_stats->ver_proj != NULL); + + IA_CSS_ENTER("hor_coefs.odd_real=%p, hor_coefs.odd_imag=%p, " + "hor_coefs.even_real=%p, hor_coefs.even_imag=%p, " + "ver_coefs.odd_real=%p, ver_coefs.odd_imag=%p, " + "ver_coefs.even_real=%p, ver_coefs.even_imag=%p, " + "haddr=%p, vaddr=%p", + host_stats->hor_prod.odd_real, host_stats->hor_prod.odd_imag, + host_stats->hor_prod.even_real, host_stats->hor_prod.even_imag, + host_stats->ver_prod.odd_real, host_stats->ver_prod.odd_imag, + host_stats->ver_prod.even_real, host_stats->ver_prod.even_imag, + isp_stats->hor_proj, isp_stats->ver_proj); + + /* Host side: reflecting the true width in bytes */ + size_bytes = host_stats->grid.aligned_width * sizeof(*htemp_ptr); + + /* DDR side: need to be aligned to the system bus width */ + /* statistics table width in terms of 32-bit words*/ + table_width = CEIL_MUL(size_bytes, HIVE_ISP_DDR_WORD_BYTES) / sizeof(*htemp_ptr); + table_size = table_width * host_stats->grid.aligned_height; + + htemp_ptr = isp_stats->hor_proj; /* horizontal stats */ + vtemp_ptr = isp_stats->ver_proj; /* vertical stats */ + for (height = 0; height < host_stats->grid.aligned_height; height++) { + /* hor stats */ + memcpy(host_stats->hor_prod.odd_real + dst_offset, + &htemp_ptr[0*table_size+src_offset], size_bytes); + memcpy(host_stats->hor_prod.odd_imag + dst_offset, + &htemp_ptr[1*table_size+src_offset], size_bytes); + memcpy(host_stats->hor_prod.even_real + dst_offset, + &htemp_ptr[2*table_size+src_offset], size_bytes); + memcpy(host_stats->hor_prod.even_imag + dst_offset, + &htemp_ptr[3*table_size+src_offset], size_bytes); + + /* ver stats */ + memcpy(host_stats->ver_prod.odd_real + dst_offset, + &vtemp_ptr[0*table_size+src_offset], size_bytes); + memcpy(host_stats->ver_prod.odd_imag + dst_offset, + &vtemp_ptr[1*table_size+src_offset], size_bytes); + memcpy(host_stats->ver_prod.even_real + dst_offset, + &vtemp_ptr[2*table_size+src_offset], size_bytes); + memcpy(host_stats->ver_prod.even_imag + dst_offset, + &vtemp_ptr[3*table_size+src_offset], size_bytes); + + src_offset += table_width; /* aligned table width */ + dst_offset += host_stats->grid.aligned_width; + } + + IA_CSS_LEAVE("void"); +} + +struct ia_css_isp_dvs_statistics * +ia_css_isp_dvs2_statistics_allocate( + const struct ia_css_dvs_grid_info *grid) +{ + struct ia_css_isp_dvs_statistics *me; + int size; + + assert(grid != NULL); + + IA_CSS_ENTER("grid=%p", grid); + + if (!grid->enable) + return NULL; + + me = sh_css_calloc(1,sizeof(*me)); + if (!me) + goto err; + + /* on ISP 2 SDIS DMA model, every row of projection table width must be + aligned to HIVE_ISP_DDR_WORD_BYTES + */ + size = CEIL_MUL(sizeof(int) * grid->aligned_width, HIVE_ISP_DDR_WORD_BYTES) + * grid->aligned_height * IA_CSS_DVS2_NUM_COEF_TYPES; + + me->size = 2*size; + me->data_ptr = mmgr_malloc(me->size); + if (me->data_ptr == mmgr_NULL) + goto err; + me->hor_proj = me->data_ptr; + me->hor_size = size; + me->ver_proj = me->data_ptr + size; + me->ver_size = size; + + IA_CSS_LEAVE("return=%p", me); + return me; +err: + ia_css_isp_dvs2_statistics_free(me); + IA_CSS_LEAVE("return=%p", NULL); + + return NULL; +} + +void +ia_css_isp_dvs2_statistics_free(struct ia_css_isp_dvs_statistics *me) +{ + if (me != NULL) { + hmm_free(me->data_ptr); + sh_css_free(me); + } +} + +void ia_css_sdis2_horicoef_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} + +void ia_css_sdis2_vertcoef_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} + +void ia_css_sdis2_horiproj_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} + +void ia_css_sdis2_vertproj_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level) +{ + (void)config; + (void)level; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h new file mode 100644 index 0000000000000..60198d4279b41 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h @@ -0,0 +1,95 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SDIS2_HOST_H +#define __IA_CSS_SDIS2_HOST_H + +#include "ia_css_sdis2_types.h" +#include "ia_css_binary.h" +#include "ia_css_stream.h" +#include "sh_css_params.h" + +extern const struct ia_css_dvs2_coefficients default_sdis2_config; + +/* Opaque here, since size is binary dependent. */ +struct sh_css_isp_sdis_hori_coef_tbl; +struct sh_css_isp_sdis_vert_coef_tbl; +struct sh_css_isp_sdis_hori_proj_tbl; +struct sh_css_isp_sdis_vert_proj_tbl; + +void ia_css_sdis2_horicoef_vmem_encode ( + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size); + +void ia_css_sdis2_vertcoef_vmem_encode ( + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size); + +void ia_css_sdis2_horiproj_encode ( + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size); + +void ia_css_sdis2_vertproj_encode ( + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned size); + +void ia_css_get_isp_dvs2_coefficients( + struct ia_css_stream *stream, + short *hor_coefs_odd_real, + short *hor_coefs_odd_imag, + short *hor_coefs_even_real, + short *hor_coefs_even_imag, + short *ver_coefs_odd_real, + short *ver_coefs_odd_imag, + short *ver_coefs_even_real, + short *ver_coefs_even_imag); + +void ia_css_sdis2_clear_coefficients( + struct ia_css_dvs2_coefficients *dvs2_coefs); + +enum ia_css_err +ia_css_get_dvs2_statistics( + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats); + +void +ia_css_translate_dvs2_statistics( + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); + +struct ia_css_isp_dvs_statistics * +ia_css_isp_dvs2_statistics_allocate( + const struct ia_css_dvs_grid_info *grid); + +void +ia_css_isp_dvs2_statistics_free( + struct ia_css_isp_dvs_statistics *me); + +void ia_css_sdis2_horicoef_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level); + +void ia_css_sdis2_vertcoef_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level); + +void ia_css_sdis2_horiproj_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level); + +void ia_css_sdis2_vertproj_debug_dtrace( + const struct ia_css_dvs2_coefficients *config, unsigned level); + +#endif /* __IA_CSS_SDIS2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h new file mode 100644 index 0000000000000..2a0bc40317466 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h @@ -0,0 +1,69 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_SDIS2_TYPES_H +#define __IA_CSS_SDIS2_TYPES_H + +/* @file +* CSS-API header file for DVS statistics parameters. +*/ + +/* Number of DVS coefficient types */ +#define IA_CSS_DVS2_NUM_COEF_TYPES 4 + +#ifndef PIPE_GENERATION +#include "isp/kernels/sdis/common/ia_css_sdis_common_types.h" +#endif + +/* DVS 2.0 Coefficient types. This structure contains 4 pointers to + * arrays that contain the coeffients for each type. + */ +struct ia_css_dvs2_coef_types { + int16_t *odd_real; /** real part of the odd coefficients*/ + int16_t *odd_imag; /** imaginary part of the odd coefficients*/ + int16_t *even_real;/** real part of the even coefficients*/ + int16_t *even_imag;/** imaginary part of the even coefficients*/ +}; + +/* DVS 2.0 Coefficients. This structure describes the coefficients that are needed for the dvs statistics. + * e.g. hor_coefs.odd_real is the pointer to int16_t[grid.num_hor_coefs] containing the horizontal odd real + * coefficients. + */ +struct ia_css_dvs2_coefficients { + struct ia_css_dvs_grid_info grid; /** grid info contains the dimensions of the dvs grid */ + struct ia_css_dvs2_coef_types hor_coefs; /** struct with pointers that contain the horizontal coefficients */ + struct ia_css_dvs2_coef_types ver_coefs; /** struct with pointers that contain the vertical coefficients */ +}; + +/* DVS 2.0 Statistic types. This structure contains 4 pointers to + * arrays that contain the statistics for each type. + */ +struct ia_css_dvs2_stat_types { + int32_t *odd_real; /** real part of the odd statistics*/ + int32_t *odd_imag; /** imaginary part of the odd statistics*/ + int32_t *even_real;/** real part of the even statistics*/ + int32_t *even_imag;/** imaginary part of the even statistics*/ +}; + +/* DVS 2.0 Statistics. This structure describes the statistics that are generated using the provided coefficients. + * e.g. hor_prod.odd_real is the pointer to int16_t[grid.aligned_height][grid.aligned_width] containing + * the horizontal odd real statistics. Valid statistics data area is int16_t[0..grid.height-1][0..grid.width-1] + */ +struct ia_css_dvs2_statistics { + struct ia_css_dvs_grid_info grid; /** grid info contains the dimensions of the dvs grid */ + struct ia_css_dvs2_stat_types hor_prod; /** struct with pointers that contain the horizontal statistics */ + struct ia_css_dvs2_stat_types ver_prod; /** struct with pointers that contain the vertical statistics */ +}; + +#endif /* __IA_CSS_SDIS2_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c new file mode 100644 index 0000000000000..78a113bfe8f1c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c @@ -0,0 +1,76 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_debug.h" +#include "ia_css_tdf.host.h" + +static const int16_t g_pyramid[8][8] = { +{128, 384, 640, 896, 896, 640, 384, 128}, +{384, 1152, 1920, 2688, 2688, 1920, 1152, 384}, +{640, 1920, 3200, 4480, 4480, 3200, 1920, 640}, +{896, 2688, 4480, 6272, 6272, 4480, 2688, 896}, +{896, 2688, 4480, 6272, 6272, 4480, 2688, 896}, +{640, 1920, 3200, 4480, 4480, 3200, 1920, 640}, +{384, 1152, 1920, 2688, 2688, 1920, 1152, 384}, +{128, 384, 640, 896, 896, 640, 384, 128} +}; + +void +ia_css_tdf_vmem_encode( + struct ia_css_isp_tdf_vmem_params *to, + const struct ia_css_tdf_config *from, + size_t size) +{ + unsigned i; + (void)size; + + for (i = 0; i < ISP_VEC_NELEMS; i++) { + to->pyramid[0][i] = g_pyramid[i/8][i%8]; + to->threshold_flat[0][i] = from->thres_flat_table[i]; + to->threshold_detail[0][i] = from->thres_detail_table[i]; + } + +} + +void +ia_css_tdf_encode( + struct ia_css_isp_tdf_dmem_params *to, + const struct ia_css_tdf_config *from, + size_t size) +{ + (void)size; + to->Epsilon_0 = from->epsilon_0; + to->Epsilon_1 = from->epsilon_1; + to->EpsScaleText = from->eps_scale_text; + to->EpsScaleEdge = from->eps_scale_edge; + to->Sepa_flat = from->sepa_flat; + to->Sepa_Edge = from->sepa_edge; + to->Blend_Flat = from->blend_flat; + to->Blend_Text = from->blend_text; + to->Blend_Edge = from->blend_edge; + to->Shading_Gain = from->shading_gain; + to->Shading_baseGain = from->shading_base_gain; + to->LocalY_Gain = from->local_y_gain; + to->LocalY_baseGain = from->local_y_base_gain; +} + +void +ia_css_tdf_debug_dtrace( + const struct ia_css_tdf_config *config, + unsigned level) +{ + (void)config; + (void)level; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h new file mode 100644 index 0000000000000..bd628a18e839e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h @@ -0,0 +1,38 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TDF_HOST_H +#define __IA_CSS_TDF_HOST_H + +#include "ia_css_tdf_types.h" +#include "ia_css_tdf_param.h" + +void +ia_css_tdf_vmem_encode( + struct ia_css_isp_tdf_vmem_params *to, + const struct ia_css_tdf_config *from, + size_t size); + +void +ia_css_tdf_encode( + struct ia_css_isp_tdf_dmem_params *to, + const struct ia_css_tdf_config *from, + size_t size); + +void +ia_css_tdf_debug_dtrace( + const struct ia_css_tdf_config *config, unsigned level) +; + +#endif /* __IA_CSS_TDF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h new file mode 100644 index 0000000000000..9334f2e0698b4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h @@ -0,0 +1,43 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TDF_PARAM_H +#define __IA_CSS_TDF_PARAM_H + +#include "type_support.h" +#include "vmem.h" /* needed for VMEM_ARRAY */ + +struct ia_css_isp_tdf_vmem_params { + VMEM_ARRAY(pyramid, ISP_VEC_NELEMS); + VMEM_ARRAY(threshold_flat, ISP_VEC_NELEMS); + VMEM_ARRAY(threshold_detail, ISP_VEC_NELEMS); +}; + +struct ia_css_isp_tdf_dmem_params { + int32_t Epsilon_0; + int32_t Epsilon_1; + int32_t EpsScaleText; + int32_t EpsScaleEdge; + int32_t Sepa_flat; + int32_t Sepa_Edge; + int32_t Blend_Flat; + int32_t Blend_Text; + int32_t Blend_Edge; + int32_t Shading_Gain; + int32_t Shading_baseGain; + int32_t LocalY_Gain; + int32_t LocalY_baseGain; +}; + +#endif /* __IA_CSS_TDF_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h new file mode 100644 index 0000000000000..91ea8dd4651d6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h @@ -0,0 +1,53 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TDF_TYPES_H +#define __IA_CSS_TDF_TYPES_H + +/* @file +* CSS-API header file for Transform Domain Filter parameters. +*/ + +#include "type_support.h" + +/* Transform Domain Filter configuration + * + * \brief TDF public parameters. + * \details Struct with all parameters for the TDF kernel that can be set + * from the CSS API. + * + * ISP2.6.1: TDF is used. + */ +struct ia_css_tdf_config { + int32_t thres_flat_table[64]; /** Final optimized strength table of NR for flat region. */ + int32_t thres_detail_table[64]; /** Final optimized strength table of NR for detail region. */ + int32_t epsilon_0; /** Coefficient to control variance for dark area (for flat region). */ + int32_t epsilon_1; /** Coefficient to control variance for bright area (for flat region). */ + int32_t eps_scale_text; /** Epsilon scaling coefficient for texture region. */ + int32_t eps_scale_edge; /** Epsilon scaling coefficient for edge region. */ + int32_t sepa_flat; /** Threshold to judge flat (edge < m_Flat_thre). */ + int32_t sepa_edge; /** Threshold to judge edge (edge > m_Edge_thre). */ + int32_t blend_flat; /** Blending ratio at flat region. */ + int32_t blend_text; /** Blending ratio at texture region. */ + int32_t blend_edge; /** Blending ratio at edge region. */ + int32_t shading_gain; /** Gain of Shading control. */ + int32_t shading_base_gain; /** Base Gain of Shading control. */ + int32_t local_y_gain; /** Gain of local luminance control. */ + int32_t local_y_base_gain; /** Base gain of local luminance control. */ + int32_t rad_x_origin; /** Initial x coord. for radius computation. */ + int32_t rad_y_origin; /** Initial y coord. for radius computation. */ +}; + +#endif /* __IA_CSS_TDF_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h new file mode 100644 index 0000000000000..223423f8c40b2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h @@ -0,0 +1,61 @@ +#ifdef ISP2401 +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef _IA_CSS_TNR3_TYPES_H +#define _IA_CSS_TNR3_TYPES_H + +/* @file +* CSS-API header file for Temporal Noise Reduction v3 (TNR3) kernel +*/ + +/** + * \brief Number of piecewise linear segments. + * \details The parameters to TNR3 are specified as a piecewise linear segment. + * The number of such segments is fixed at 3. + */ +#define TNR3_NUM_SEGMENTS 3 + +/* Temporal Noise Reduction v3 (TNR3) configuration. + * The parameter to this kernel is fourfold + * 1. Three piecewise linear graphs (one for each plane) with three segments + * each. Each line graph has Luma values on the x axis and sigma values for + * each plane on the y axis. The three linear segments may have a different + * slope and the point of Luma value which where the slope may change is called + * a "Knee" point. As there are three such segments, four points need to be + * specified each on the Luma axis and the per plane Sigma axis. On the Luma + * axis two points are fixed (namely 0 and maximum luma value - depending on + * ISP bit depth). The other two points are the points where the slope may + * change its value. These two points are called knee points. The four points on + * the per plane sigma axis are also specified at the interface. + * 2. One rounding adjustment parameter for each plane + * 3. One maximum feedback threshold value for each plane + * 4. Selection of the reference frame buffer to be used for noise reduction. + */ +struct ia_css_tnr3_kernel_config { + unsigned int maxfb_y; /** Maximum Feedback Gain for Y */ + unsigned int maxfb_u; /** Maximum Feedback Gain for U */ + unsigned int maxfb_v; /** Maximum Feedback Gain for V */ + unsigned int round_adj_y; /** Rounding Adjust for Y */ + unsigned int round_adj_u; /** Rounding Adjust for U */ + unsigned int round_adj_v; /** Rounding Adjust for V */ + unsigned int knee_y[TNR3_NUM_SEGMENTS - 1]; /** Knee points */ + unsigned int sigma_y[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for Y at points Y0, Y1, Y2, Y3 */ + unsigned int sigma_u[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for U at points U0, U1, U2, U3 */ + unsigned int sigma_v[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for V at points V0, V1, V2, V3 */ + unsigned int ref_buf_select; /** Selection of the reference buffer */ +}; + +#endif +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c new file mode 100644 index 0000000000000..222a7bd7f1767 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c @@ -0,0 +1,130 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "ia_css_frame.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "sh_css_frac.h" +#include "assert_support.h" +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#include "isp.h" + +#include "ia_css_tnr.host.h" +const struct ia_css_tnr_config default_tnr_config = { + 32768, + 32, + 32, +}; + +void +ia_css_tnr_encode( + struct sh_css_isp_tnr_params *to, + const struct ia_css_tnr_config *from, + unsigned size) +{ + (void)size; + to->coef = + uDIGIT_FITTING(from->gain, 16, SH_CSS_TNR_COEF_SHIFT); + to->threshold_Y = + uDIGIT_FITTING(from->threshold_y, 16, SH_CSS_ISP_YUV_BITS); + to->threshold_C = + uDIGIT_FITTING(from->threshold_uv, 16, SH_CSS_ISP_YUV_BITS); +} + +void +ia_css_tnr_dump( + const struct sh_css_isp_tnr_params *tnr, + unsigned level) +{ + if (!tnr) return; + ia_css_debug_dtrace(level, "Temporal Noise Reduction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "tnr_coef", tnr->coef); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "tnr_threshold_Y", tnr->threshold_Y); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "tnr_threshold_C", tnr->threshold_C); +} + +void +ia_css_tnr_debug_dtrace( + const struct ia_css_tnr_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.gain=%d, " + "config.threshold_y=%d, config.threshold_uv=%d\n", + config->gain, + config->threshold_y, config->threshold_uv); +} + +void +ia_css_tnr_config( + struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS; + unsigned i; + + (void)size; + ia_css_dma_configure_from_info(&to->port_b, &from->tnr_frames[0]->info); + to->width_a_over_b = elems_a / to->port_b.elems; + to->frame_height = from->tnr_frames[0]->info.res.height; +#ifndef ISP2401 + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { +#else + for (i = 0; i < NUM_TNR_FRAMES; i++) { +#endif + to->tnr_frame_addr[i] = from->tnr_frames[i]->data + from->tnr_frames[i]->planes.yuyv.offset; + } + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert (elems_a % to->port_b.elems == 0); +} + +void +ia_css_tnr_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame **frames) +{ + struct ia_css_tnr_configuration config; + unsigned i; + +#ifndef ISP2401 + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) +#else + for (i = 0; i < NUM_TNR_FRAMES; i++) +#endif + config.tnr_frames[i] = frames[i]; + + ia_css_configure_tnr(binary, &config); +} + +void +ia_css_init_tnr_state( + struct sh_css_isp_tnr_dmem_state *state, + size_t size) +{ + (void)size; + +#ifndef ISP2401 + assert(NUM_VIDEO_TNR_FRAMES >= 2); +#endif + assert(sizeof(*state) == size); + state->tnr_in_buf_idx = 0; + state->tnr_out_buf_idx = 1; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h new file mode 100644 index 0000000000000..9290dfad574eb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h @@ -0,0 +1,56 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TNR_HOST_H +#define __IA_CSS_TNR_HOST_H + +#include "ia_css_binary.h" +#include "ia_css_tnr_state.h" +#include "ia_css_tnr_types.h" +#include "ia_css_tnr_param.h" + +extern const struct ia_css_tnr_config default_tnr_config; + +void +ia_css_tnr_encode( + struct sh_css_isp_tnr_params *to, + const struct ia_css_tnr_config *from, + unsigned size); + +void +ia_css_tnr_dump( + const struct sh_css_isp_tnr_params *tnr, + unsigned level); + +void +ia_css_tnr_debug_dtrace( + const struct ia_css_tnr_config *config, + unsigned level); + +void +ia_css_tnr_config( + struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned size); + +void +ia_css_tnr_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame **frames); + +void +ia_css_init_tnr_state( + struct sh_css_isp_tnr_dmem_state *state, + size_t size); +#endif /* __IA_CSS_TNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h new file mode 100644 index 0000000000000..db4a7cced2649 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h @@ -0,0 +1,48 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TNR_PARAM_H +#define __IA_CSS_TNR_PARAM_H + +#include "type_support.h" +#include "sh_css_defs.h" +#include "dma.h" + +/* TNR (Temporal Noise Reduction) */ +struct sh_css_isp_tnr_params { + int32_t coef; + int32_t threshold_Y; + int32_t threshold_C; +}; + +struct ia_css_tnr_configuration { +#ifndef ISP2401 + const struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; +#else + const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; +#endif +}; + +struct sh_css_isp_tnr_isp_config { + uint32_t width_a_over_b; + uint32_t frame_height; + struct dma_port_config port_b; +#ifndef ISP2401 + hrt_vaddress tnr_frame_addr[NUM_VIDEO_TNR_FRAMES]; +#else + hrt_vaddress tnr_frame_addr[NUM_TNR_FRAMES]; +#endif +}; + +#endif /* __IA_CSS_TNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h new file mode 100644 index 0000000000000..8b1218f7235dc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TNR_STATE_H +#define __IA_CSS_TNR_STATE_H + +#include "type_support.h" + +/* TNR (temporal noise reduction) */ +struct sh_css_isp_tnr_dmem_state { + uint32_t tnr_in_buf_idx; + uint32_t tnr_out_buf_idx; +}; + +#endif /* __IA_CSS_TNR_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h new file mode 100644 index 0000000000000..9bbc9ab2e6c0d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h @@ -0,0 +1,60 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_TNR_TYPES_H +#define __IA_CSS_TNR_TYPES_H + +/* @file +* CSS-API header file for Temporal Noise Reduction (TNR) parameters. +*/ + +/* Temporal Noise Reduction (TNR) configuration. + * + * When difference between current frame and previous frame is less than or + * equal to threshold, TNR works and current frame is mixed + * with previous frame. + * When difference between current frame and previous frame is greater + * than threshold, we judge motion is detected. Then, TNR does not work and + * current frame is outputted as it is. + * Therefore, when threshold_y and threshold_uv are set as 0, TNR can be disabled. + * + * ISP block: TNR1 + * ISP1: TNR1 is used. + * ISP2: TNR1 is used. + */ + + +struct ia_css_tnr_config { + ia_css_u0_16 gain; /** Interpolation ratio of current frame + and previous frame. + gain=0.0 -> previous frame is outputted. + gain=1.0 -> current frame is outputted. + u0.16, [0,65535], + default 32768(0.5), ineffective 65535(almost 1.0) */ + ia_css_u0_16 threshold_y; /** Threshold to enable interpolation of Y. + If difference between current frame and + previous frame is greater than threshold_y, + TNR for Y is disabled. + u0.16, [0,65535], default/ineffective 0 */ + ia_css_u0_16 threshold_uv; /** Threshold to enable interpolation of + U/V. + If difference between current frame and + previous frame is greater than threshold_uv, + TNR for UV is disabled. + u0.16, [0,65535], default/ineffective 0 */ +}; + + +#endif /* __IA_CSS_TNR_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/uds/uds_1.0/ia_css_uds_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/uds/uds_1.0/ia_css_uds_param.h new file mode 100644 index 0000000000000..26b7b5bc93911 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/uds/uds_1.0/ia_css_uds_param.h @@ -0,0 +1,31 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_UDS_PARAM_H +#define __IA_CSS_UDS_PARAM_H + +#include "sh_css_uds.h" + +/* uds (Up and Down scaling) */ +struct ia_css_uds_config { + struct sh_css_crop_pos crop_pos; + struct sh_css_uds_info uds; +}; + +struct sh_css_sp_uds_params { + struct sh_css_crop_pos crop_pos; + struct sh_css_uds_info uds; +}; + +#endif /* __IA_CSS_UDS_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c new file mode 100644 index 0000000000000..c2076e4124101 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c @@ -0,0 +1,140 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_vf.host.h" +#include +#include +#include +#include +#include +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" + +#include "isp.h" + +void +ia_css_vf_config( + struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned size) +{ + unsigned elems_a = ISP_VEC_NELEMS; + + (void)size; + to->vf_downscale_bits = from->vf_downscale_bits; + to->enable = from->info != NULL; + + if (from->info) { + ia_css_frame_info_to_frame_sp_info(&to->info, from->info); + ia_css_dma_configure_from_info(&to->dma.port_b, from->info); + to->dma.width_a_over_b = elems_a / to->dma.port_b.elems; + + /* Assume divisiblity here, may need to generalize to fixed point. */ + assert (elems_a % to->dma.port_b.elems == 0); + } +} + +/* compute the log2 of the downscale factor needed to get closest + * to the requested viewfinder resolution on the upper side. The output cannot + * be smaller than the requested viewfinder resolution. + */ +enum ia_css_err +sh_css_vf_downscale_log2( + const struct ia_css_frame_info *out_info, + const struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2) +{ + unsigned int ds_log2 = 0; + unsigned int out_width; + + if ((out_info == NULL) | (vf_info == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + out_width = out_info->res.width; + + if (out_width == 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* downscale until width smaller than the viewfinder width. We don't + * test for the height since the vmem buffers only put restrictions on + * the width of a line, not on the number of lines in a frame. + */ + while (out_width >= vf_info->res.width) { + ds_log2++; + out_width /= 2; + } + /* now width is smaller, so we go up one step */ + if ((ds_log2 > 0) && (out_width < ia_css_binary_max_vf_width())) + ds_log2--; + /* TODO: use actual max input resolution of vf_pp binary */ + if ((out_info->res.width >> ds_log2) >= 2 * ia_css_binary_max_vf_width()) + return IA_CSS_ERR_INVALID_ARGUMENTS; + *downscale_log2 = ds_log2; + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +configure_kernel( + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *out_info, + const struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2, + struct ia_css_vf_configuration *config) +{ + enum ia_css_err err; + unsigned vf_log_ds = 0; + + /* First compute value */ + if (vf_info) { + err = sh_css_vf_downscale_log2(out_info, vf_info, &vf_log_ds); + if (err != IA_CSS_SUCCESS) + return err; + } + vf_log_ds = min(vf_log_ds, info->vf_dec.max_log_downscale); + *downscale_log2 = vf_log_ds; + + /* Then store it in isp config section */ + config->vf_downscale_bits = vf_log_ds; + return IA_CSS_SUCCESS; +} + +static void +configure_dma( + struct ia_css_vf_configuration *config, + const struct ia_css_frame_info *vf_info) +{ + config->info = vf_info; +} + +enum ia_css_err +ia_css_vf_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2) +{ + enum ia_css_err err; + struct ia_css_vf_configuration config; + const struct ia_css_binary_info *info = &binary->info->sp; + + err = configure_kernel(info, out_info, vf_info, downscale_log2, &config); + configure_dma(&config, vf_info); + + if (vf_info) + vf_info->raw_bit_depth = info->dma.vfdec_bits_per_pixel; + ia_css_configure_vf (binary, &config); + + return IA_CSS_SUCCESS; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h new file mode 100644 index 0000000000000..c7c3625a9a967 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_VF_HOST_H +#define __IA_CSS_VF_HOST_H + +#include "ia_css_frame_public.h" +#include "ia_css_binary.h" + +#include "ia_css_vf_types.h" +#include "ia_css_vf_param.h" + +/* compute the log2 of the downscale factor needed to get closest + * to the requested viewfinder resolution on the upper side. The output cannot + * be smaller than the requested viewfinder resolution. + */ +enum ia_css_err +sh_css_vf_downscale_log2( + const struct ia_css_frame_info *out_info, + const struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2); + +void +ia_css_vf_config( + struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned size); + +enum ia_css_err +ia_css_vf_configure( + const struct ia_css_binary *binary, + const struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2); + +#endif /* __IA_CSS_VF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h new file mode 100644 index 0000000000000..9df4e12f6c2c7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h @@ -0,0 +1,37 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_VF_PARAM_H +#define __IA_CSS_VF_PARAM_H + +#include "type_support.h" +#include "dma.h" +#include "gc/gc_1.0/ia_css_gc_param.h" /* GAMMA_OUTPUT_BITS */ +#include "ia_css_frame_comm.h" /* ia_css_frame_sp_info */ +#include "ia_css_vf_types.h" + +#define VFDEC_BITS_PER_PIXEL GAMMA_OUTPUT_BITS + +/* Viewfinder decimation */ +struct sh_css_isp_vf_isp_config { + uint32_t vf_downscale_bits; /** Log VF downscale value */ + uint32_t enable; + struct ia_css_frame_sp_info info; + struct { + uint32_t width_a_over_b; + struct dma_port_config port_b; + } dma; +}; + +#endif /* __IA_CSS_VF_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h new file mode 100644 index 0000000000000..e3efafa279ffc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h @@ -0,0 +1,32 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_VF_TYPES_H +#define __IA_CSS_VF_TYPES_H + +/* Viewfinder decimation + * + * ISP block: vfeven_horizontal_downscale + */ + +#include +#include + +struct ia_css_vf_configuration { + uint32_t vf_downscale_bits; /** Log VF downscale value */ + const struct ia_css_frame_info *info; +}; + +#endif /* __IA_CSS_VF_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c new file mode 100644 index 0000000000000..b43cb88c6ae45 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c @@ -0,0 +1,89 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#ifndef IA_CSS_NO_DEBUG +#include "ia_css_debug.h" +#endif +#include "sh_css_frac.h" + +#include "ia_css_wb.host.h" + +const struct ia_css_wb_config default_wb_config = { + 1, + 32768, + 32768, + 32768, + 32768 +}; + +void +ia_css_wb_encode( + struct sh_css_isp_wb_params *to, + const struct ia_css_wb_config *from, + unsigned size) +{ + (void)size; + to->gain_shift = + uISP_REG_BIT - from->integer_bits; + to->gain_gr = + uDIGIT_FITTING(from->gr, 16 - from->integer_bits, + to->gain_shift); + to->gain_r = + uDIGIT_FITTING(from->r, 16 - from->integer_bits, + to->gain_shift); + to->gain_b = + uDIGIT_FITTING(from->b, 16 - from->integer_bits, + to->gain_shift); + to->gain_gb = + uDIGIT_FITTING(from->gb, 16 - from->integer_bits, + to->gain_shift); +} + +#ifndef IA_CSS_NO_DEBUG +void +ia_css_wb_dump( + const struct sh_css_isp_wb_params *wb, + unsigned level) +{ + if (!wb) return; + ia_css_debug_dtrace(level, "White Balance:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "wb_gain_shift", wb->gain_shift); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "wb_gain_gr", wb->gain_gr); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "wb_gain_r", wb->gain_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "wb_gain_b", wb->gain_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "wb_gain_gb", wb->gain_gb); +} + +void +ia_css_wb_debug_dtrace( + const struct ia_css_wb_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.integer_bits=%d, " + "config.gr=%d, config.r=%d, " + "config.b=%d, config.gb=%d\n", + config->integer_bits, + config->gr, config->r, + config->b, config->gb); +} +#endif + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h new file mode 100644 index 0000000000000..18666baf9f76b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_WB_HOST_H +#define __IA_CSS_WB_HOST_H + +#include "ia_css_wb_types.h" +#include "ia_css_wb_param.h" + +extern const struct ia_css_wb_config default_wb_config; + +void +ia_css_wb_encode( + struct sh_css_isp_wb_params *to, + const struct ia_css_wb_config *from, + unsigned size); + +void +ia_css_wb_dump( + const struct sh_css_isp_wb_params *wb, + unsigned level); + +void +ia_css_wb_debug_dtrace( + const struct ia_css_wb_config *wb, + unsigned level); + +#endif /* __IA_CSS_WB_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h new file mode 100644 index 0000000000000..c95c53a240670 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h @@ -0,0 +1,29 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_WB_PARAM_H +#define __IA_CSS_WB_PARAM_H + +#include "type_support.h" + +/* WB (White Balance) */ +struct sh_css_isp_wb_params { + int32_t gain_shift; + int32_t gain_gr; + int32_t gain_r; + int32_t gain_b; + int32_t gain_gb; +}; + +#endif /* __IA_CSS_WB_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h new file mode 100644 index 0000000000000..bf98734d057e5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_WB_TYPES_H +#define __IA_CSS_WB_TYPES_H + +/* @file +* CSS-API header file for White Balance parameters. +*/ + + +/* White Balance configuration (Gain Adjust). + * + * ISP block: WB1 + * ISP1: WB1 is used. + * ISP2: WB1 is used. + */ +struct ia_css_wb_config { + uint32_t integer_bits; /** Common exponent of gains. + u8.0, [0,3], + default 1, ineffective 1 */ + uint32_t gr; /** Significand of Gr gain. + u[integer_bits].[16-integer_bits], [0,65535], + default/ineffective 32768(u1.15, 1.0) */ + uint32_t r; /** Significand of R gain. + u[integer_bits].[16-integer_bits], [0,65535], + default/ineffective 32768(u1.15, 1.0) */ + uint32_t b; /** Significand of B gain. + u[integer_bits].[16-integer_bits], [0,65535], + default/ineffective 32768(u1.15, 1.0) */ + uint32_t gb; /** Significand of Gb gain. + u[integer_bits].[16-integer_bits], [0,65535], + default/ineffective 32768(u1.15, 1.0) */ +}; + +#endif /* __IA_CSS_WB_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c new file mode 100644 index 0000000000000..abcb531f51ccd --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c @@ -0,0 +1,66 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "sh_css_frac.h" + +#include "ia_css_xnr.host.h" + +const struct ia_css_xnr_config default_xnr_config = { + /* default threshold 6400 translates to 25 on ISP. */ + 6400 +}; + +void +ia_css_xnr_table_vamem_encode( + struct sh_css_isp_xnr_vamem_params *to, + const struct ia_css_xnr_table *from, + unsigned size) +{ + (void)size; + memcpy (&to->xnr, &from->data, sizeof(to->xnr)); +} + +void +ia_css_xnr_encode( + struct sh_css_isp_xnr_params *to, + const struct ia_css_xnr_config *from, + unsigned size) +{ + (void)size; + + to->threshold = + (uint16_t)uDIGIT_FITTING(from->threshold, 16, SH_CSS_ISP_YUV_BITS); +} + +void +ia_css_xnr_table_debug_dtrace( + const struct ia_css_xnr_table *config, + unsigned level) +{ + (void)config; + (void)level; +} + +void +ia_css_xnr_debug_dtrace( + const struct ia_css_xnr_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.threshold=%d\n", config->threshold); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h new file mode 100644 index 0000000000000..eb3425eafbbef --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h @@ -0,0 +1,47 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_XNR_HOST_H +#define __IA_CSS_XNR_HOST_H + +#include "sh_css_params.h" + +#include "ia_css_xnr_param.h" +#include "ia_css_xnr_table.host.h" + +extern const struct ia_css_xnr_config default_xnr_config; + +void +ia_css_xnr_table_vamem_encode( + struct sh_css_isp_xnr_vamem_params *to, + const struct ia_css_xnr_table *from, + unsigned size); + +void +ia_css_xnr_encode( + struct sh_css_isp_xnr_params *to, + const struct ia_css_xnr_config *from, + unsigned size); + +void +ia_css_xnr_table_debug_dtrace( + const struct ia_css_xnr_table *s3a, + unsigned level); + +void +ia_css_xnr_debug_dtrace( + const struct ia_css_xnr_config *config, + unsigned level); + +#endif /* __IA_CSS_XNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h new file mode 100644 index 0000000000000..a5caebbe2f848 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h @@ -0,0 +1,51 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_XNR_PARAM_H +#define __IA_CSS_XNR_PARAM_H + +#include "type_support.h" +#include + +#ifndef PIPE_GENERATION +#if defined(HAS_VAMEM_VERSION_2) +#define SH_CSS_ISP_XNR_TABLE_SIZE_LOG2 IA_CSS_VAMEM_2_XNR_TABLE_SIZE_LOG2 +#define SH_CSS_ISP_XNR_TABLE_SIZE IA_CSS_VAMEM_2_XNR_TABLE_SIZE +#elif defined(HAS_VAMEM_VERSION_1) +#define SH_CSS_ISP_XNR_TABLE_SIZE_LOG2 IA_CSS_VAMEM_1_XNR_TABLE_SIZE_LOG2 +#define SH_CSS_ISP_XNR_TABLE_SIZE IA_CSS_VAMEM_1_XNR_TABLE_SIZE +#else +#error "Unknown vamem type" +#endif + + +#else +/* For pipe generation, the size is not relevant */ +#define SH_CSS_ISP_XNR_TABLE_SIZE 0 +#endif + +/* This should be vamem_data_t, but that breaks the pipe generator */ +struct sh_css_isp_xnr_vamem_params { + uint16_t xnr[SH_CSS_ISP_XNR_TABLE_SIZE]; +}; + +struct sh_css_isp_xnr_params { + /* XNR threshold. + * type:u0.16 but actual valid range is:[0,255] + * valid range is dependent on SH_CSS_ISP_YUV_BITS (currently 8bits) + * default: 25 */ + uint16_t threshold; +}; + +#endif /* __IA_CSS_XNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c new file mode 100644 index 0000000000000..cd5fb72fce3fd --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c @@ -0,0 +1,81 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include /* memcpy */ +#include "system_global.h" +#include "vamem.h" +#include "ia_css_types.h" +#include "ia_css_xnr_table.host.h" + +struct ia_css_xnr_table default_xnr_table; + +#if defined(HAS_VAMEM_VERSION_2) + +static const uint16_t +default_xnr_table_data[IA_CSS_VAMEM_2_XNR_TABLE_SIZE] = { + /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ + 8191>>1, 4096>>1, 2730>>1, 2048>>1, 1638>>1, 1365>>1, 1170>>1, 1024>>1, 910>>1, 819>>1, 744>>1, 682>>1, 630>>1, 585>>1, + 546>>1, 512>>1, + + /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ + 481>>1, 455>>1, 431>>1, 409>>1, 390>>1, 372>>1, 356>>1, 341>>1, 327>>1, 315>>1, 303>>1, 292>>1, 282>>1, 273>>1, 264>>1, + 256>>1, + + /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ + 248>>1, 240>>1, 234>>1, 227>>1, 221>>1, 215>>1, 210>>1, 204>>1, 199>>1, 195>>1, 190>>1, 186>>1, 182>>1, 178>>1, 174>>1, + 170>>1, + + /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ + 167>>1, 163>>1, 160>>1, 157>>1, 154>>1, 151>>1, 148>>1, 146>>1, 143>>1, 141>>1, 138>>1, 136>>1, 134>>1, 132>>1, 130>>1, 128>>1 +}; + +#elif defined(HAS_VAMEM_VERSION_1) + +static const uint16_t +default_xnr_table_data[IA_CSS_VAMEM_1_XNR_TABLE_SIZE] = { + /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ + 8191>>1, 4096>>1, 2730>>1, 2048>>1, 1638>>1, 1365>>1, 1170>>1, 1024>>1, 910>>1, 819>>1, 744>>1, 682>>1, 630>>1, 585>>1, + 546>>1, 512>>1, + + /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ + 481>>1, 455>>1, 431>>1, 409>>1, 390>>1, 372>>1, 356>>1, 341>>1, 327>>1, 315>>1, 303>>1, 292>>1, 282>>1, 273>>1, 264>>1, + 256>>1, + + /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ + 248>>1, 240>>1, 234>>1, 227>>1, 221>>1, 215>>1, 210>>1, 204>>1, 199>>1, 195>>1, 190>>1, 186>>1, 182>>1, 178>>1, 174>>1, + 170>>1, + + /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ + 167>>1, 163>>1, 160>>1, 157>>1, 154>>1, 151>>1, 148>>1, 146>>1, 143>>1, 141>>1, 138>>1, 136>>1, 134>>1, 132>>1, 130>>1, 128>>1 +}; + +#else +#error "sh_css_params.c: VAMEM version must \ + be one of {VAMEM_VERSION_1, VAMEM_VERSION_2}" +#endif + +void +ia_css_config_xnr_table(void) +{ +#if defined(HAS_VAMEM_VERSION_2) + memcpy(default_xnr_table.data.vamem_2, default_xnr_table_data, + sizeof(default_xnr_table_data)); + default_xnr_table.vamem_type = IA_CSS_VAMEM_TYPE_2; +#else + memcpy(default_xnr_table.data.vamem_1, default_xnr_table_data, + sizeof(default_xnr_table_data)); + default_xnr_table.vamem_type = IA_CSS_VAMEM_TYPE_1; +#endif +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h new file mode 100644 index 0000000000000..130086713a7f2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h @@ -0,0 +1,22 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_XNR_TABLE_HOST_H +#define __IA_CSS_XNR_TABLE_HOST_H + +extern struct ia_css_xnr_table default_xnr_table; + +void ia_css_config_xnr_table(void); + +#endif /* __IA_CSS_XNR_TABLE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h new file mode 100644 index 0000000000000..d2b634211a3fa --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h @@ -0,0 +1,71 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_XNR_TYPES_H +#define __IA_CSS_XNR_TYPES_H + +/* @file +* CSS-API header file for Extra Noise Reduction (XNR) parameters. +*/ + +/* XNR table. + * + * NOTE: The driver does not need to set this table, + * because the default values are set inside the css. + * + * This table contains coefficients used for division in XNR. + * + * u0.12, [0,4095], + * {4095, 2048, 1365, .........., 65, 64} + * ({1/1, 1/2, 1/3, ............., 1/63, 1/64}) + * + * ISP block: XNR1 + * ISP1: XNR1 is used. + * ISP2: XNR1 is used. + * + */ + +/* Number of elements in the xnr table. */ +#define IA_CSS_VAMEM_1_XNR_TABLE_SIZE_LOG2 6 +/* Number of elements in the xnr table. */ +#define IA_CSS_VAMEM_1_XNR_TABLE_SIZE (1U< XNR_MAX_ALPHA) + alpha = XNR_MAX_ALPHA; + } + + return alpha; +} + +/* + * Compute the scaled coring value for the ISP kernel from the value on the + * host parameter interface. + */ +static int32_t +compute_coring(int coring) +{ + int32_t isp_coring; + int32_t isp_scale = XNR_CORING_SCALE_FACTOR; + int32_t host_scale = IA_CSS_XNR3_CORING_SCALE; + int32_t offset = host_scale / 2; /* fixed-point 0.5 */ + + /* Convert from public host-side scale factor to isp-side scale + * factor. Clip to [0, isp_scale-1). + */ + isp_coring = ((coring * isp_scale) + offset) / host_scale; + return min(max(isp_coring, 0), isp_scale - 1); +} + +/* + * Compute the scaled blending strength for the ISP kernel from the value on + * the host parameter interface. + */ +static int32_t +compute_blending(int strength) +{ + int32_t isp_strength; + int32_t isp_scale = XNR_BLENDING_SCALE_FACTOR; + int32_t host_scale = IA_CSS_XNR3_BLENDING_SCALE; + int32_t offset = host_scale / 2; /* fixed-point 0.5 */ + + /* Convert from public host-side scale factor to isp-side scale + * factor. The blending factor is positive on the host side, but + * negative on the ISP side because +1.0 cannot be represented + * exactly as s0.11 fixed point, but -1.0 can. + */ + isp_strength = -(((strength * isp_scale) + offset) / host_scale); + return max(min(isp_strength, 0), -XNR_BLENDING_SCALE_FACTOR); +} + +void +ia_css_xnr3_encode( + struct sh_css_isp_xnr3_params *to, + const struct ia_css_xnr3_config *from, + unsigned size) +{ + int kernel_size = XNR_FILTER_SIZE; + /* The adjust factor is the next power of 2 + w.r.t. the kernel size*/ + int adjust_factor = ceil_pow2(kernel_size); + int32_t max_diff = (1 << (ISP_VEC_ELEMBITS - 1)) - 1; + int32_t min_diff = -(1 << (ISP_VEC_ELEMBITS - 1)); + + int32_t alpha_y0 = compute_alpha(from->sigma.y0); + int32_t alpha_y1 = compute_alpha(from->sigma.y1); + int32_t alpha_u0 = compute_alpha(from->sigma.u0); + int32_t alpha_u1 = compute_alpha(from->sigma.u1); + int32_t alpha_v0 = compute_alpha(from->sigma.v0); + int32_t alpha_v1 = compute_alpha(from->sigma.v1); + int32_t alpha_ydiff = (alpha_y1 - alpha_y0) * adjust_factor / kernel_size; + int32_t alpha_udiff = (alpha_u1 - alpha_u0) * adjust_factor / kernel_size; + int32_t alpha_vdiff = (alpha_v1 - alpha_v0) * adjust_factor / kernel_size; + + int32_t coring_u0 = compute_coring(from->coring.u0); + int32_t coring_u1 = compute_coring(from->coring.u1); + int32_t coring_v0 = compute_coring(from->coring.v0); + int32_t coring_v1 = compute_coring(from->coring.v1); + int32_t coring_udiff = (coring_u1 - coring_u0) * adjust_factor / kernel_size; + int32_t coring_vdiff = (coring_v1 - coring_v0) * adjust_factor / kernel_size; + + int32_t blending = compute_blending(from->blending.strength); + + (void)size; + + /* alpha's are represented in qN.5 format */ + to->alpha.y0 = alpha_y0; + to->alpha.u0 = alpha_u0; + to->alpha.v0 = alpha_v0; + to->alpha.ydiff = min(max(alpha_ydiff, min_diff), max_diff); + to->alpha.udiff = min(max(alpha_udiff, min_diff), max_diff); + to->alpha.vdiff = min(max(alpha_vdiff, min_diff), max_diff); + + /* coring parameters are expressed in q1.NN format */ + to->coring.u0 = coring_u0; + to->coring.v0 = coring_v0; + to->coring.udiff = min(max(coring_udiff, min_diff), max_diff); + to->coring.vdiff = min(max(coring_vdiff, min_diff), max_diff); + + /* blending strength is expressed in q1.NN format */ + to->blending.strength = blending; +} + +#ifdef ISP2401 +/* (void) = ia_css_xnr3_vmem_encode(*to, *from) + * ----------------------------------------------- + * VMEM Encode Function to translate UV parameters from userspace into ISP space +*/ +void +ia_css_xnr3_vmem_encode( + struct sh_css_isp_xnr3_vmem_params *to, + const struct ia_css_xnr3_config *from, + unsigned size) +{ + unsigned i, j, base; + const unsigned total_blocks = 4; + const unsigned shuffle_block = 16; + + (void)from; + (void)size; + + /* Init */ + for (i = 0; i < ISP_VEC_NELEMS; i++) { + to->x[0][i] = 0; + to->a[0][i] = 0; + to->b[0][i] = 0; + to->c[0][i] = 0; + } + + /* Constraints on "x": + * - values should be greater or equal to 0. + * - values should be ascending. + */ + assert(x[0] >= 0); + + for (j = 1; j < XNR3_LOOK_UP_TABLE_POINTS; j++) { + assert(x[j] >= 0); + assert(x[j] > x[j - 1]); + + } + + /* The implementation of the calulating 1/x is based on the availability + * of the OP_vec_shuffle16 operation. + * A 64 element vector is split up in 4 blocks of 16 element. Each array is copied to + * a vector 4 times, (starting at 0, 16, 32 and 48). All array elements are copied or + * initialised as described in the KFS. The remaining elements of a vector are set to 0. + */ + /* TODO: guard this code with above assumptions */ + for (i = 0; i < total_blocks; i++) { + base = shuffle_block * i; + + for (j = 0; j < XNR3_LOOK_UP_TABLE_POINTS; j++) { + to->x[0][base + j] = x[j]; + to->a[0][base + j] = a[j]; + to->b[0][base + j] = b[j]; + to->c[0][base + j] = c[j]; + } + } +} + +#endif +/* Dummy Function added as the tool expects it*/ +void +ia_css_xnr3_debug_dtrace( + const struct ia_css_xnr3_config *config, + unsigned level) +{ + (void)config; + (void)level; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h new file mode 100644 index 0000000000000..6a86924a71fe1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_XNR3_HOST_H +#define __IA_CSS_XNR3_HOST_H + +#include "ia_css_xnr3_param.h" +#include "ia_css_xnr3_types.h" + +extern const struct ia_css_xnr3_config default_xnr3_config; + +void +ia_css_xnr3_encode( + struct sh_css_isp_xnr3_params *to, + const struct ia_css_xnr3_config *from, + unsigned size); + +#ifdef ISP2401 +void +ia_css_xnr3_vmem_encode( + struct sh_css_isp_xnr3_vmem_params *to, + const struct ia_css_xnr3_config *from, + unsigned size); + +#endif +void +ia_css_xnr3_debug_dtrace( + const struct ia_css_xnr3_config *config, + unsigned level); + +#endif /* __IA_CSS_XNR3_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h new file mode 100644 index 0000000000000..06c24e8482343 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h @@ -0,0 +1,96 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_XNR3_PARAM_H +#define __IA_CSS_XNR3_PARAM_H + +#include "type_support.h" +#ifdef ISP2401 +#include "vmem.h" /* needed for VMEM_ARRAY */ + +#endif + +/* Scaling factor of the alpha values: which fixed-point value represents 1.0? + * It must be chosen such that 1/min_sigma still fits in an ISP vector + * element. */ +#define XNR_ALPHA_SCALE_LOG2 5 +#define XNR_ALPHA_SCALE_FACTOR (1 << XNR_ALPHA_SCALE_LOG2) + +/* Scaling factor of the coring values on the ISP. */ +#define XNR_CORING_SCALE_LOG2 (ISP_VEC_ELEMBITS-1) +#define XNR_CORING_SCALE_FACTOR (1 << XNR_CORING_SCALE_LOG2) + +/* Scaling factor of the blending strength on the ISP. */ +#define XNR_BLENDING_SCALE_LOG2 (ISP_VEC_ELEMBITS-1) +#define XNR_BLENDING_SCALE_FACTOR (1 << XNR_BLENDING_SCALE_LOG2) + +/* XNR3 filter size. Must be 11x11, 9x9 or 5x5. */ +#ifdef FLT_KERNEL_9x9 +#define XNR_FILTER_SIZE 9 +#else +#ifdef FLT_KERNEL_11x11 +#define XNR_FILTER_SIZE 11 +#else +#define XNR_FILTER_SIZE 5 +#endif +#endif + +/* XNR3 alpha (1/sigma) parameters on the ISP, expressed as a base (0) value + * for dark areas, and a scaled diff towards the value for bright areas. */ +struct sh_css_xnr3_alpha_params { + int32_t y0; + int32_t u0; + int32_t v0; + int32_t ydiff; + int32_t udiff; + int32_t vdiff; +}; + +/* XNR3 coring parameters on the ISP, expressed as a base (0) value + * for dark areas, and a scaled diff towards the value for bright areas. */ +struct sh_css_xnr3_coring_params { + int32_t u0; + int32_t v0; + int32_t udiff; + int32_t vdiff; +}; + +/* XNR3 blending strength on the ISP. */ +struct sh_css_xnr3_blending_params { + int32_t strength; +}; + +/* XNR3 ISP parameters */ +struct sh_css_isp_xnr3_params { + struct sh_css_xnr3_alpha_params alpha; + struct sh_css_xnr3_coring_params coring; + struct sh_css_xnr3_blending_params blending; +}; + +#ifdef ISP2401 +/* + * STRUCT sh_css_isp_xnr3_vmem_params + * ----------------------------------------------- + * ISP VMEM parameters + */ +struct sh_css_isp_xnr3_vmem_params { + VMEM_ARRAY(x, ISP_VEC_NELEMS); + VMEM_ARRAY(a, ISP_VEC_NELEMS); + VMEM_ARRAY(b, ISP_VEC_NELEMS); + VMEM_ARRAY(c, ISP_VEC_NELEMS); +}; + + +#endif +#endif /*__IA_CSS_XNR3_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h new file mode 100644 index 0000000000000..669200caf72e6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h @@ -0,0 +1,98 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_XNR3_TYPES_H +#define __IA_CSS_XNR3_TYPES_H + +/* @file +* CSS-API header file for Extra Noise Reduction (XNR) parameters. +*/ + +/** + * \brief Scale of the XNR sigma parameters. + * \details The define specifies which fixed-point value represents 1.0. + */ +#define IA_CSS_XNR3_SIGMA_SCALE (1 << 10) + +/** + * \brief Scale of the XNR coring parameters. + * \details The define specifies which fixed-point value represents 1.0. + */ +#define IA_CSS_XNR3_CORING_SCALE (1 << 15) + +/** + * \brief Scale of the XNR blending parameter. + * \details The define specifies which fixed-point value represents 1.0. + */ +#define IA_CSS_XNR3_BLENDING_SCALE (1 << 11) + + +/** + * \brief XNR3 Sigma Parameters. + * \details Sigma parameters define the strength of the XNR filter. + * A higher number means stronger filtering. There are two values for each of + * the three YUV planes: one for dark areas and one for bright areas. All + * sigma parameters are fixed-point values between 0.0 and 1.0, scaled with + * IA_CSS_XNR3_SIGMA_SCALE. + */ +struct ia_css_xnr3_sigma_params { + int y0; /** Sigma for Y range similarity in dark area */ + int y1; /** Sigma for Y range similarity in bright area */ + int u0; /** Sigma for U range similarity in dark area */ + int u1; /** Sigma for U range similarity in bright area */ + int v0; /** Sigma for V range similarity in dark area */ + int v1; /** Sigma for V range similarity in bright area */ +}; + +/** + * \brief XNR3 Coring Parameters + * \details Coring parameters define the "coring" strength, which is a soft + * thresholding technique to avoid false coloring. There are two values for + * each of the two chroma planes: one for dark areas and one for bright areas. + * All coring parameters are fixed-point values between 0.0 and 1.0, scaled + * with IA_CSS_XNR3_CORING_SCALE. The ineffective value is 0. + */ +struct ia_css_xnr3_coring_params { + int u0; /** Coring threshold of U channel in dark area */ + int u1; /** Coring threshold of U channel in bright area */ + int v0; /** Coring threshold of V channel in dark area */ + int v1; /** Coring threshold of V channel in bright area */ +}; + +/** + * \brief XNR3 Blending Parameters + * \details Blending parameters define the blending strength of filtered + * output pixels with the original chroma pixels from before xnr3. The + * blending strength is a fixed-point value between 0.0 and 1.0 (inclusive), + * scaled with IA_CSS_XNR3_BLENDING_SCALE. + * A higher number applies xnr filtering more strongly. A value of 1.0 + * disables the blending and returns the xnr3 filtered output, while a + * value of 0.0 bypasses the entire xnr3 filter. + */ +struct ia_css_xnr3_blending_params { + int strength; /** Blending strength */ +}; + +/** + * \brief XNR3 public parameters. + * \details Struct with all parameters for the XNR3 kernel that can be set + * from the CSS API. + */ +struct ia_css_xnr3_config { + struct ia_css_xnr3_sigma_params sigma; /** XNR3 sigma parameters */ + struct ia_css_xnr3_coring_params coring; /** XNR3 coring parameters */ + struct ia_css_xnr3_blending_params blending; /** XNR3 blending parameters */ +}; + +#endif /* __IA_CSS_XNR3_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c new file mode 100644 index 0000000000000..d8dccce772a94 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c @@ -0,0 +1,219 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "sh_css_frac.h" + +#include "bnr/bnr_1.0/ia_css_bnr.host.h" +#include "ia_css_ynr.host.h" + +const struct ia_css_nr_config default_nr_config = { + 16384, + 8192, + 1280, + 0, + 0 +}; + +const struct ia_css_ee_config default_ee_config = { + 8192, + 128, + 2048 +}; + +void +ia_css_nr_encode( + struct sh_css_isp_ynr_params *to, + const struct ia_css_nr_config *from, + unsigned size) +{ + (void)size; + /* YNR (Y Noise Reduction) */ + to->threshold = + uDIGIT_FITTING((unsigned)8192, 16, SH_CSS_BAYER_BITS); + to->gain_all = + uDIGIT_FITTING(from->ynr_gain, 16, SH_CSS_YNR_GAIN_SHIFT); + to->gain_dir = + uDIGIT_FITTING(from->ynr_gain, 16, SH_CSS_YNR_GAIN_SHIFT); + to->threshold_cb = + uDIGIT_FITTING(from->threshold_cb, 16, SH_CSS_BAYER_BITS); + to->threshold_cr = + uDIGIT_FITTING(from->threshold_cr, 16, SH_CSS_BAYER_BITS); +} + +void +ia_css_yee_encode( + struct sh_css_isp_yee_params *to, + const struct ia_css_yee_config *from, + unsigned size) +{ + int asiWk1 = (int) from->ee.gain; + int asiWk2 = asiWk1 / 8; + int asiWk3 = asiWk1 / 4; + + (void)size; + /* YEE (Y Edge Enhancement) */ + to->dirthreshold_s = + min((uDIGIT_FITTING(from->nr.direction, 16, SH_CSS_BAYER_BITS) + << 1), + SH_CSS_BAYER_MAXVAL); + to->dirthreshold_g = + min((uDIGIT_FITTING(from->nr.direction, 16, SH_CSS_BAYER_BITS) + << 4), + SH_CSS_BAYER_MAXVAL); + to->dirthreshold_width_log2 = + uFRACTION_BITS_FITTING(8); + to->dirthreshold_width = + 1 << to->dirthreshold_width_log2; + to->detailgain = + uDIGIT_FITTING(from->ee.detail_gain, 11, + SH_CSS_YEE_DETAIL_GAIN_SHIFT); + to->coring_s = + (uDIGIT_FITTING((unsigned)56, 16, SH_CSS_BAYER_BITS) * + from->ee.threshold) >> 8; + to->coring_g = + (uDIGIT_FITTING((unsigned)224, 16, SH_CSS_BAYER_BITS) * + from->ee.threshold) >> 8; + /* 8; // *1.125 ->[s4.8] */ + to->scale_plus_s = + (asiWk1 + asiWk2) >> (11 - SH_CSS_YEE_SCALE_SHIFT); + /* 8; // ( * -.25)->[s4.8] */ + to->scale_plus_g = + (0 - asiWk3) >> (11 - SH_CSS_YEE_SCALE_SHIFT); + /* 8; // *0.875 ->[s4.8] */ + to->scale_minus_s = + (asiWk1 - asiWk2) >> (11 - SH_CSS_YEE_SCALE_SHIFT); + /* 8; // ( *.25 ) ->[s4.8] */ + to->scale_minus_g = + (asiWk3) >> (11 - SH_CSS_YEE_SCALE_SHIFT); + to->clip_plus_s = + uDIGIT_FITTING((unsigned)32760, 16, SH_CSS_BAYER_BITS); + to->clip_plus_g = 0; + to->clip_minus_s = + uDIGIT_FITTING((unsigned)504, 16, SH_CSS_BAYER_BITS); + to->clip_minus_g = + uDIGIT_FITTING((unsigned)32256, 16, SH_CSS_BAYER_BITS); + to->Yclip = SH_CSS_BAYER_MAXVAL; +} + +void +ia_css_nr_dump( + const struct sh_css_isp_ynr_params *ynr, + unsigned level) +{ + if (!ynr) return; + ia_css_debug_dtrace(level, + "Y Noise Reduction:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynr_threshold", ynr->threshold); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynr_gain_all", ynr->gain_all); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynr_gain_dir", ynr->gain_dir); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynr_threshold_cb", ynr->threshold_cb); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynr_threshold_cr", ynr->threshold_cr); +} + +void +ia_css_yee_dump( + const struct sh_css_isp_yee_params *yee, + unsigned level) +{ + ia_css_debug_dtrace(level, + "Y Edge Enhancement:\n"); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynryee_dirthreshold_s", + yee->dirthreshold_s); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynryee_dirthreshold_g", + yee->dirthreshold_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynryee_dirthreshold_width_log2", + yee->dirthreshold_width_log2); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynryee_dirthreshold_width", + yee->dirthreshold_width); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_detailgain", + yee->detailgain); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_coring_s", + yee->coring_s); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_coring_g", + yee->coring_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_scale_plus_s", + yee->scale_plus_s); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_scale_plus_g", + yee->scale_plus_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_scale_minus_s", + yee->scale_minus_s); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_scale_minus_g", + yee->scale_minus_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_clip_plus_s", + yee->clip_plus_s); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_clip_plus_g", + yee->clip_plus_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_clip_minus_s", + yee->clip_minus_s); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "yee_clip_minus_g", + yee->clip_minus_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", + "ynryee_Yclip", + yee->Yclip); +} + +void +ia_css_nr_debug_dtrace( + const struct ia_css_nr_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.direction=%d, " + "config.bnr_gain=%d, config.ynr_gain=%d, " + "config.threshold_cb=%d, config.threshold_cr=%d\n", + config->direction, + config->bnr_gain, config->ynr_gain, + config->threshold_cb, config->threshold_cr); +} + +void +ia_css_ee_debug_dtrace( + const struct ia_css_ee_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.threshold=%d, config.gain=%d, config.detail_gain=%d\n", + config->threshold, config->gain, config->detail_gain); +} + +void +ia_css_init_ynr_state( + void/*struct sh_css_isp_ynr_vmem_state*/ *state, + size_t size) +{ + memset(state, 0, size); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h new file mode 100644 index 0000000000000..b5730df313ef5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h @@ -0,0 +1,60 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR_HOST_H +#define __IA_CSS_YNR_HOST_H + +#include "ia_css_ynr_types.h" +#include "ia_css_ynr_param.h" + +extern const struct ia_css_nr_config default_nr_config; +extern const struct ia_css_ee_config default_ee_config; + +void +ia_css_nr_encode( + struct sh_css_isp_ynr_params *to, + const struct ia_css_nr_config *from, + unsigned size); + +void +ia_css_yee_encode( + struct sh_css_isp_yee_params *to, + const struct ia_css_yee_config *from, + unsigned size); + +void +ia_css_nr_dump( + const struct sh_css_isp_ynr_params *ynr, + unsigned level); + +void +ia_css_yee_dump( + const struct sh_css_isp_yee_params *yee, + unsigned level); + +void +ia_css_nr_debug_dtrace( + const struct ia_css_nr_config *config, + unsigned level); + +void +ia_css_ee_debug_dtrace( + const struct ia_css_ee_config *config, + unsigned level); + +void +ia_css_init_ynr_state( + void/*struct sh_css_isp_ynr_vmem_state*/ *state, + size_t size); +#endif /* __IA_CSS_YNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h new file mode 100644 index 0000000000000..ad61ec1211e81 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h @@ -0,0 +1,49 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR_PARAM_H +#define __IA_CSS_YNR_PARAM_H + +#include "type_support.h" + +/* YNR (Y Noise Reduction) */ +struct sh_css_isp_ynr_params { + int32_t threshold; + int32_t gain_all; + int32_t gain_dir; + int32_t threshold_cb; + int32_t threshold_cr; +}; + +/* YEE (Y Edge Enhancement) */ +struct sh_css_isp_yee_params { + int32_t dirthreshold_s; + int32_t dirthreshold_g; + int32_t dirthreshold_width_log2; + int32_t dirthreshold_width; + int32_t detailgain; + int32_t coring_s; + int32_t coring_g; + int32_t scale_plus_s; + int32_t scale_plus_g; + int32_t scale_minus_s; + int32_t scale_minus_g; + int32_t clip_plus_s; + int32_t clip_plus_g; + int32_t clip_minus_s; + int32_t clip_minus_g; + int32_t Yclip; +}; + +#endif /* __IA_CSS_YNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h new file mode 100644 index 0000000000000..b2348b19c3cd1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h @@ -0,0 +1,26 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR_STATE_H +#define __IA_CSS_YNR_STATE_H + +#include "type_support.h" +#include "vmem.h" + +/* YNR (luminance noise reduction) */ +struct sh_css_isp_ynr_vmem_state { + VMEM_ARRAY(ynr_buf[4], MAX_VECTORS_PER_BUF_LINE*ISP_NWAY); +}; + +#endif /* __IA_CSS_YNR_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h new file mode 100644 index 0000000000000..3f8589a5a43a8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h @@ -0,0 +1,81 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR_TYPES_H +#define __IA_CSS_YNR_TYPES_H + +/* @file +* CSS-API header file for Noise Reduction (BNR) and YCC Noise Reduction (YNR,CNR). +*/ + +/* Configuration used by Bayer Noise Reduction (BNR) and + * YCC Noise Reduction (YNR,CNR). + * + * ISP block: BNR1, YNR1, CNR1 + * ISP1: BNR1,YNR1,CNR1 are used. + * ISP2: BNR1,YNR1,CNR1 are used for Preview/Video. + * BNR1,YNR2,CNR2 are used for Still. + */ +struct ia_css_nr_config { + ia_css_u0_16 bnr_gain; /** Strength of noise reduction (BNR). + u0.16, [0,65535], + default 14336(0.21875), ineffective 0 */ + ia_css_u0_16 ynr_gain; /** Strength of noise reduction (YNR). + u0.16, [0,65535], + default 14336(0.21875), ineffective 0 */ + ia_css_u0_16 direction; /** Sensitivity of edge (BNR). + u0.16, [0,65535], + default 512(0.0078125), ineffective 0 */ + ia_css_u0_16 threshold_cb; /** Coring threshold for Cb (CNR). + This is the same as + de_config.c1_coring_threshold. + u0.16, [0,65535], + default 0(0), ineffective 0 */ + ia_css_u0_16 threshold_cr; /** Coring threshold for Cr (CNR). + This is the same as + de_config.c2_coring_threshold. + u0.16, [0,65535], + default 0(0), ineffective 0 */ +}; + +/* Edge Enhancement (sharpen) configuration. + * + * ISP block: YEE1 + * ISP1: YEE1 is used. + * ISP2: YEE1 is used for Preview/Video. + * (YEE2 is used for Still.) + */ +struct ia_css_ee_config { + ia_css_u5_11 gain; /** The strength of sharpness. + u5.11, [0,65535], + default 8192(4.0), ineffective 0 */ + ia_css_u8_8 threshold; /** The threshold that divides noises from + edge. + u8.8, [0,65535], + default 256(1.0), ineffective 65535 */ + ia_css_u5_11 detail_gain; /** The strength of sharpness in pell-mell + area. + u5.11, [0,65535], + default 2048(1.0), ineffective 0 */ +}; + +/* YNR and YEE (sharpen) configuration. + */ +struct ia_css_yee_config { + struct ia_css_nr_config nr; /** The NR configuration. */ + struct ia_css_ee_config ee; /** The EE configuration. */ +}; + +#endif /* __IA_CSS_YNR_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c new file mode 100644 index 0000000000000..44b0050042389 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c @@ -0,0 +1,125 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "assert_support.h" + +#include "ia_css_ynr2.host.h" + +const struct ia_css_ynr_config default_ynr_config = { + 0, + 0, + 0, + 0, +}; + +const struct ia_css_fc_config default_fc_config = { + 1, + 0, /* 0 -> ineffective */ + 0, /* 0 -> ineffective */ + 0, /* 0 -> ineffective */ + 0, /* 0 -> ineffective */ + (1 << (ISP_VEC_ELEMBITS - 2)), /* 0.5 */ + (1 << (ISP_VEC_ELEMBITS - 2)), /* 0.5 */ + (1 << (ISP_VEC_ELEMBITS - 2)), /* 0.5 */ + (1 << (ISP_VEC_ELEMBITS - 2)), /* 0.5 */ + (1 << (ISP_VEC_ELEMBITS - 1)) - 1, /* 1 */ + (1 << (ISP_VEC_ELEMBITS - 1)) - 1, /* 1 */ + (int16_t)- (1 << (ISP_VEC_ELEMBITS - 1)), /* -1 */ + (int16_t)- (1 << (ISP_VEC_ELEMBITS - 1)), /* -1 */ +}; + +void +ia_css_ynr_encode( + struct sh_css_isp_yee2_params *to, + const struct ia_css_ynr_config *from, + unsigned size) +{ + (void)size; + to->edge_sense_gain_0 = from->edge_sense_gain_0; + to->edge_sense_gain_1 = from->edge_sense_gain_1; + to->corner_sense_gain_0 = from->corner_sense_gain_0; + to->corner_sense_gain_1 = from->corner_sense_gain_1; +} + +void +ia_css_fc_encode( + struct sh_css_isp_fc_params *to, + const struct ia_css_fc_config *from, + unsigned size) +{ + (void)size; + to->gain_exp = from->gain_exp; + + to->coring_pos_0 = from->coring_pos_0; + to->coring_pos_1 = from->coring_pos_1; + to->coring_neg_0 = from->coring_neg_0; + to->coring_neg_1 = from->coring_neg_1; + + to->gain_pos_0 = from->gain_pos_0; + to->gain_pos_1 = from->gain_pos_1; + to->gain_neg_0 = from->gain_neg_0; + to->gain_neg_1 = from->gain_neg_1; + + to->crop_pos_0 = from->crop_pos_0; + to->crop_pos_1 = from->crop_pos_1; + to->crop_neg_0 = from->crop_neg_0; + to->crop_neg_1 = from->crop_neg_1; +} + +void +ia_css_ynr_dump( + const struct sh_css_isp_yee2_params *yee2, + unsigned level); + +void +ia_css_fc_dump( + const struct sh_css_isp_fc_params *fc, + unsigned level); + +void +ia_css_fc_debug_dtrace( + const struct ia_css_fc_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.gain_exp=%d, " + "config.coring_pos_0=%d, config.coring_pos_1=%d, " + "config.coring_neg_0=%d, config.coring_neg_1=%d, " + "config.gain_pos_0=%d, config.gain_pos_1=%d, " + "config.gain_neg_0=%d, config.gain_neg_1=%d, " + "config.crop_pos_0=%d, config.crop_pos_1=%d, " + "config.crop_neg_0=%d, config.crop_neg_1=%d\n", + config->gain_exp, + config->coring_pos_0, config->coring_pos_1, + config->coring_neg_0, config->coring_neg_1, + config->gain_pos_0, config->gain_pos_1, + config->gain_neg_0, config->gain_neg_1, + config->crop_pos_0, config->crop_pos_1, + config->crop_neg_0, config->crop_neg_1); +} + +void +ia_css_ynr_debug_dtrace( + const struct ia_css_ynr_config *config, + unsigned level) +{ + ia_css_debug_dtrace(level, + "config.edge_sense_gain_0=%d, config.edge_sense_gain_1=%d, " + "config.corner_sense_gain_0=%d, config.corner_sense_gain_1=%d\n", + config->edge_sense_gain_0, config->edge_sense_gain_1, + config->corner_sense_gain_0, config->corner_sense_gain_1); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h new file mode 100644 index 0000000000000..71e89c469e4c6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h @@ -0,0 +1,56 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR2_HOST_H +#define __IA_CSS_YNR2_HOST_H + +#include "ia_css_ynr2_types.h" +#include "ia_css_ynr2_param.h" + +extern const struct ia_css_ynr_config default_ynr_config; +extern const struct ia_css_fc_config default_fc_config; + +void +ia_css_ynr_encode( + struct sh_css_isp_yee2_params *to, + const struct ia_css_ynr_config *from, + unsigned size); + +void +ia_css_fc_encode( + struct sh_css_isp_fc_params *to, + const struct ia_css_fc_config *from, + unsigned size); + +void +ia_css_ynr_dump( + const struct sh_css_isp_yee2_params *yee2, + unsigned level); + +void +ia_css_fc_dump( + const struct sh_css_isp_fc_params *fc, + unsigned level); + +void +ia_css_fc_debug_dtrace( + const struct ia_css_fc_config *config, + unsigned level); + +void +ia_css_ynr_debug_dtrace( + const struct ia_css_ynr_config *config, + unsigned level); + +#endif /* __IA_CSS_YNR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h new file mode 100644 index 0000000000000..e56b695bef278 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h @@ -0,0 +1,45 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR2_PARAM_H +#define __IA_CSS_YNR2_PARAM_H + +#include "type_support.h" + +/* YNR (Y Noise Reduction), YEE (Y Edge Enhancement) */ +struct sh_css_isp_yee2_params { + int32_t edge_sense_gain_0; + int32_t edge_sense_gain_1; + int32_t corner_sense_gain_0; + int32_t corner_sense_gain_1; +}; + +/* Fringe Control */ +struct sh_css_isp_fc_params { + int32_t gain_exp; + uint16_t coring_pos_0; + uint16_t coring_pos_1; + uint16_t coring_neg_0; + uint16_t coring_neg_1; + int32_t gain_pos_0; + int32_t gain_pos_1; + int32_t gain_neg_0; + int32_t gain_neg_1; + int32_t crop_pos_0; + int32_t crop_pos_1; + int32_t crop_neg_0; + int32_t crop_neg_1; +}; + +#endif /* __IA_CSS_YNR2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h new file mode 100644 index 0000000000000..83161a24207d9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h @@ -0,0 +1,94 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR2_TYPES_H +#define __IA_CSS_YNR2_TYPES_H + +/* @file +* CSS-API header file for Y(Luma) Noise Reduction. +*/ + +/* Y(Luma) Noise Reduction configuration. + * + * ISP block: YNR2 & YEE2 + * (ISP1: YNR1 and YEE1 are used.) + * (ISP2: YNR1 and YEE1 are used for Preview/Video.) + * ISP2: YNR2 and YEE2 are used for Still. + */ +struct ia_css_ynr_config { + uint16_t edge_sense_gain_0; /** Sensitivity of edge in dark area. + u13.0, [0,8191], + default 1000, ineffective 0 */ + uint16_t edge_sense_gain_1; /** Sensitivity of edge in bright area. + u13.0, [0,8191], + default 1000, ineffective 0 */ + uint16_t corner_sense_gain_0; /** Sensitivity of corner in dark area. + u13.0, [0,8191], + default 1000, ineffective 0 */ + uint16_t corner_sense_gain_1; /** Sensitivity of corner in bright area. + u13.0, [0,8191], + default 1000, ineffective 0 */ +}; + +/* Fringe Control configuration. + * + * ISP block: FC2 (FC2 is used with YNR2/YEE2.) + * (ISP1: FC2 is not used.) + * (ISP2: FC2 is not for Preview/Video.) + * ISP2: FC2 is used for Still. + */ +struct ia_css_fc_config { + uint8_t gain_exp; /** Common exponent of gains. + u8.0, [0,13], + default 1, ineffective 0 */ + uint16_t coring_pos_0; /** Coring threshold for positive edge in dark area. + u0.13, [0,8191], + default 0(0), ineffective 0 */ + uint16_t coring_pos_1; /** Coring threshold for positive edge in bright area. + u0.13, [0,8191], + default 0(0), ineffective 0 */ + uint16_t coring_neg_0; /** Coring threshold for negative edge in dark area. + u0.13, [0,8191], + default 0(0), ineffective 0 */ + uint16_t coring_neg_1; /** Coring threshold for negative edge in bright area. + u0.13, [0,8191], + default 0(0), ineffective 0 */ + uint16_t gain_pos_0; /** Gain for positive edge in dark area. + u0.13, [0,8191], + default 4096(0.5), ineffective 0 */ + uint16_t gain_pos_1; /** Gain for positive edge in bright area. + u0.13, [0,8191], + default 4096(0.5), ineffective 0 */ + uint16_t gain_neg_0; /** Gain for negative edge in dark area. + u0.13, [0,8191], + default 4096(0.5), ineffective 0 */ + uint16_t gain_neg_1; /** Gain for negative edge in bright area. + u0.13, [0,8191], + default 4096(0.5), ineffective 0 */ + uint16_t crop_pos_0; /** Limit for positive edge in dark area. + u0.13, [0,8191], + default/ineffective 8191(almost 1.0) */ + uint16_t crop_pos_1; /** Limit for positive edge in bright area. + u0.13, [0,8191], + default/ineffective 8191(almost 1.0) */ + int16_t crop_neg_0; /** Limit for negative edge in dark area. + s0.13, [-8192,0], + default/ineffective -8192(-1.0) */ + int16_t crop_neg_1; /** Limit for negative edge in bright area. + s0.13, [-8192,0], + default/ineffective -8192(-1.0) */ +}; + +#endif /* __IA_CSS_YNR2_TYPES_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_param.h new file mode 100644 index 0000000000000..48fb7d22d7c13 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_param.h @@ -0,0 +1,20 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNRX_PARAM_H +#define __IA_CSS_YNRX_PARAM_H + +#include "ia_css_ynr2_param.h" + +#endif /* __IA_CSS_YNRX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_state.h new file mode 100644 index 0000000000000..2516dd3dc12b7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_state.h @@ -0,0 +1,21 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __IA_CSS_YNR2_STATE_H +#define __IA_CSS_YNR2_STATE_H + +/* Reuse YNR1 states */ +#include "../ynr_1.0/ia_css_ynr_state.h" + +#endif /* __IA_CSS_YNR2_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h new file mode 100644 index 0000000000000..32714d5870cf9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h @@ -0,0 +1,73 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _INPUT_BUF_ISP_H_ +#define _INPUT_BUF_ISP_H_ + +/* Temporary include, since IA_CSS_BINARY_MODE_COPY is still needed */ +#include "sh_css_defs.h" +#include "isp_const.h" /* MAX_VECTORS_PER_INPUT_LINE */ + +#define INPUT_BUF_HEIGHT 2 /* double buffer */ +#define INPUT_BUF_LINES 2 + +#ifndef ENABLE_CONTINUOUS +#define ENABLE_CONTINUOUS 0 +#endif + +/* In continuous mode, the input buffer must be a fixed size for all binaries + * and at a fixed address since it will be used by the SP. */ +#define EXTRA_INPUT_VECTORS 2 /* For left padding */ +#define MAX_VECTORS_PER_INPUT_LINE_CONT (CEIL_DIV(SH_CSS_MAX_SENSOR_WIDTH, ISP_NWAY) + EXTRA_INPUT_VECTORS) + +/* The input buffer should be on a fixed address in vmem, for continuous capture */ +#define INPUT_BUF_ADDR 0x0 +#if (defined(__ISP) && (!defined(MODE) || MODE != IA_CSS_BINARY_MODE_COPY)) + +#if ENABLE_CONTINUOUS +typedef struct { + tmemvectoru raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ + /* Two more lines for SP raw copy efficiency */ +#ifndef ENABLE_REDUCED_INPUT_BUFFER + /* "Workaround" solution in the case that space needed vmem exceeds the size of the vmem. */ + /* Since in theory this buffer is not needed for IPU 2.2/2.3, */ + /* the workaround solution will not be needed (and the whole buffer) after the code refactoring. */ + tmemvectoru _raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ +#endif +} input_line_type; +#else /* ENABLE CONTINUOUS == 0 */ +typedef struct { + tmemvectoru raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE]; /* 2 bayer lines */ +} input_line_type; +#endif /* ENABLE_CONTINUOUS */ + +#endif /*MODE*/ + +#endif /* _INPUT_BUF_ISP_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h new file mode 100644 index 0000000000000..2f215dc2ac32c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h @@ -0,0 +1,482 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _COMMON_ISP_CONST_H_ +#define _COMMON_ISP_CONST_H_ + +/*#include "isp.h"*/ /* ISP_VEC_NELEMS */ + +/* Binary independent constants */ + +#ifndef NO_HOIST +# define NO_HOIST HIVE_ATTRIBUTE (( no_hoist )) +#endif + +#define NO_HOIST_CSE HIVE_ATTRIBUTE ((no_hoist, no_cse)) + +#define UNION struct /* Union constructors not allowed in C++ */ + +/* ISP binary identifiers. + These determine the order in which the binaries are looked up, do not change + this! + Also, the SP firmware uses this same order (isp_loader.hive.c). + Also, gen_firmware.c uses this order in its firmware_header. +*/ +/* The binary id is used in pre-processor expressions so we cannot + * use an enum here. */ + /* 24xx pipelines*/ +#define SH_CSS_BINARY_ID_COPY 0 +#define SH_CSS_BINARY_ID_BAYER_DS 1 +#define SH_CSS_BINARY_ID_VF_PP_FULL 2 +#define SH_CSS_BINARY_ID_VF_PP_OPT 3 +#define SH_CSS_BINARY_ID_YUV_SCALE 4 +#define SH_CSS_BINARY_ID_CAPTURE_PP 5 +#define SH_CSS_BINARY_ID_PRE_ISP 6 +#define SH_CSS_BINARY_ID_PRE_ISP_ISP2 7 +#define SH_CSS_BINARY_ID_GDC 8 +#define SH_CSS_BINARY_ID_POST_ISP 9 +#define SH_CSS_BINARY_ID_POST_ISP_ISP2 10 +#define SH_CSS_BINARY_ID_ANR 11 +#define SH_CSS_BINARY_ID_ANR_ISP2 12 +#define SH_CSS_BINARY_ID_PREVIEW_CONT_DS 13 +#define SH_CSS_BINARY_ID_PREVIEW_DS 14 +#define SH_CSS_BINARY_ID_PREVIEW_DEC 15 +#define SH_CSS_BINARY_ID_PREVIEW_CONT_BDS125_ISP2 16 +#define SH_CSS_BINARY_ID_PREVIEW_CONT_DPC_BDS150_ISP2 17 +#define SH_CSS_BINARY_ID_PREVIEW_CONT_BDS150_ISP2 18 +#define SH_CSS_BINARY_ID_PREVIEW_CONT_DPC_BDS200_ISP2 19 +#define SH_CSS_BINARY_ID_PREVIEW_CONT_BDS200_ISP2 20 +#define SH_CSS_BINARY_ID_PREVIEW_DZ 21 +#define SH_CSS_BINARY_ID_PREVIEW_DZ_ISP2 22 +#define SH_CSS_BINARY_ID_PRIMARY_DS 23 +#define SH_CSS_BINARY_ID_PRIMARY_VAR 24 +#define SH_CSS_BINARY_ID_PRIMARY_VAR_ISP2 25 +#define SH_CSS_BINARY_ID_PRIMARY_SMALL 26 +#define SH_CSS_BINARY_ID_PRIMARY_STRIPED 27 +#define SH_CSS_BINARY_ID_PRIMARY_STRIPED_ISP2 28 +#define SH_CSS_BINARY_ID_PRIMARY_8MP 29 +#define SH_CSS_BINARY_ID_PRIMARY_14MP 30 +#define SH_CSS_BINARY_ID_PRIMARY_16MP 31 +#define SH_CSS_BINARY_ID_PRIMARY_REF 32 +#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE0 33 +#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE1 34 +#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE2 35 +#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE3 36 +#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE4 37 +#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE5 38 +#define SH_CSS_BINARY_ID_VIDEO_OFFLINE 39 +#define SH_CSS_BINARY_ID_VIDEO_DS 40 +#define SH_CSS_BINARY_ID_VIDEO_YUV_DS 41 +#define SH_CSS_BINARY_ID_VIDEO_DZ 42 +#define SH_CSS_BINARY_ID_VIDEO_DZ_2400_ONLY 43 +#define SH_CSS_BINARY_ID_VIDEO_HIGH 44 +#define SH_CSS_BINARY_ID_VIDEO_NODZ 45 +#define SH_CSS_BINARY_ID_VIDEO_CONT_MULTIBDS_ISP2_MIN 46 +#define SH_CSS_BINARY_ID_VIDEO_CONT_BDS_300_600_ISP2_MIN 47 +#define SH_CSS_BINARY_ID_VIDEO_CONT_DPC_BDS150_ISP2_MIN 48 +#define SH_CSS_BINARY_ID_VIDEO_CONT_BDS150_ISP2_MIN 49 +#define SH_CSS_BINARY_ID_VIDEO_CONT_DPC_BDS200_ISP2_MIN 50 +#define SH_CSS_BINARY_ID_VIDEO_CONT_BDS200_ISP2_MIN 51 +#define SH_CSS_BINARY_ID_VIDEO_CONT_NOBDS_ISP2_MIN 52 +#define SH_CSS_BINARY_ID_VIDEO_DZ_ISP2_MIN 53 +#define SH_CSS_BINARY_ID_VIDEO_DZ_ISP2 54 +#define SH_CSS_BINARY_ID_VIDEO_LP_ISP2 55 +#define SH_CSS_BINARY_ID_RESERVED1 56 +#define SH_CSS_BINARY_ID_ACCELERATION 57 +#define SH_CSS_BINARY_ID_PRE_DE_ISP2 58 +#define SH_CSS_BINARY_ID_KERNEL_TEST_LOAD_STORE 59 +#define SH_CSS_BINARY_ID_CAPTURE_PP_BLI 60 +#define SH_CSS_BINARY_ID_CAPTURE_PP_LDC 61 +#ifdef ISP2401 +#define SH_CSS_BINARY_ID_PRIMARY_STRIPED_ISP2_XNR 62 +#endif + +/* skycam kerneltest pipelines */ +#ifndef ISP2401 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM 120 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM_STRIPED 121 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN 122 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN_STRIPED 123 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD 124 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD_STRIPED 125 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB 126 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A 127 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A_STRIPED 128 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AF 129 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID 130 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE 131 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE_STRIPED 132 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DEMOSAIC 133 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP1_C0 134 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2 135 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF 136 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF_STRIPED 137 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_REF 138 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS 139 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR 140 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_STRIPED 141 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_BLENDING 142 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_BLOCK 143 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AE 144 +#define SH_CSS_BINARY_ID_VIDEO_RAW 145 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB_FR 146 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP 147 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP_STRIPED 148 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR 149 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_IF 150 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_IF_STRIPED 151 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM 152 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_STRIPED 153 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS_STRIPED 154 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID_STRIPED 155 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV 156 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV_BLOCK 157 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_BLOCK 158 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_STRIPED 159 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_BLOCK_STRIPED 160 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_INPUT_YUV 161 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV 162 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV_16 163 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SPLIT 164 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM_STRIPED 165 + +#else +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM 121 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM_STRIPED 122 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID 123 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID_STRIPED 124 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN 125 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN_STRIPED 126 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD 127 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD_STRIPED 128 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AE 129 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB 130 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AF 131 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB_FR 132 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A 133 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A_STRIPED 134 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE 135 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE_STRIPED 136 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR 137 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR_STRIPED 138 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DEMOSAIC 139 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP 140 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP_STRIPED 141 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP1_C0 142 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2 143 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2_STRIPED 144 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_REF 145 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR 146 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_STRIPED 147 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_BLENDING 148 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF 149 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF_STRIPED 150 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS 151 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS_STRIPED 152 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DVS_STAT_C0 153 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_BLOCK 154 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_STRIPED 155 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM 156 +#define SH_CSS_BINARY_ID_VIDEO_RAW 157 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV 158 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV_BLOCK 159 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_BLOCK 160 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_STRIPED 161 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_BLOCK_STRIPED 162 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_INPUT_YUV 163 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV 164 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV_16 165 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SPLIT 166 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM_STRIPED 167 +#define SH_CSS_BINARY_ID_COPY_KERNELTEST_OUTPUT_SYSTEM 168 +#endif + +/* skycam partial test pipelines*/ +#ifndef ISP2401 +#define SH_CSS_BINARY_ID_IF_TO_DPC 201 +#define SH_CSS_BINARY_ID_IF_TO_BDS 202 +#else +#define SH_CSS_BINARY_ID_IF_TO_BDS 201 +#define SH_CSS_BINARY_ID_IF_TO_BDS_STRIPED 202 +#endif +#define SH_CSS_BINARY_ID_IF_TO_NORM 203 +#ifndef ISP2401 +#define SH_CSS_BINARY_ID_IF_TO_OB 204 +#define SH_CSS_BINARY_ID_IF_TO_LIN 205 +#define SH_CSS_BINARY_ID_IF_TO_SHD 206 +#define SH_CSS_BINARY_ID_IF_TO_BNR 207 +#define SH_CSS_BINARY_ID_IF_TO_RGBPP_NV12_16 208 +#define SH_CSS_BINARY_ID_IF_TO_RGBPP 210 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1 211 +#define SH_CSS_BINARY_ID_IF_TO_DM 214 +#define SH_CSS_BINARY_ID_IF_TO_YUVP2_C0 216 +#define SH_CSS_BINARY_ID_IF_TO_YUVP2_ANR_VIA_ISP 217 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_DVS 218 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_TNR 219 +#define SH_CSS_BINARY_ID_IF_TO_BDS_STRIPED 224 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR_STRIPED 225 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2_STRIPED 227 +#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0 228 +#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0_STRIPED 229 +#define SH_CSS_BINARY_ID_IF_TO_REF 236 +#define SH_CSS_BINARY_ID_IF_TO_DVS_STRIPED 237 +#define SH_CSS_BINARY_ID_IF_TO_YUVP2_STRIPED 238 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1_STRIPED 239 +#define SH_CSS_BINARY_ID_IF_TO_RGBPP_STRIPED 240 +#define SH_CSS_BINARY_ID_IF_TO_ANR_STRIPED 241 +#define SH_CSS_BINARY_ID_IF_TO_BNR_STRIPED 242 +#define SH_CSS_BINARY_ID_IF_TO_SHD_STRIPED 243 +#define SH_CSS_BINARY_ID_IF_TO_LIN_STRIPED 244 +#define SH_CSS_BINARY_ID_IF_TO_OB_STRIPED 245 +#define SH_CSS_BINARY_ID_IF_TO_NORM_STRIPED 248 +#define SH_CSS_BINARY_ID_COPY_KERNELTEST_OUTPUT_SYSTEM 253 +#define SH_CSS_BINARY_ID_IF_TO_XNR 256 +#define SH_CSS_BINARY_ID_IF_TO_XNR_STRIPED 257 +#define SH_CSS_BINARY_ID_IF_TO_REF_STRIPED 258 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS 259 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0 262 +#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY 263 +#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY_STRIPED 264 +#define SH_CSS_BINARY_ID_IF_TO_ANR 265 +#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DVS_STAT_C0 266 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS_STRIPED 270 +#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY 276 +#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY_STRIPED 277 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0_STRIPED 278 +#else +#define SH_CSS_BINARY_ID_IF_TO_NORM_STRIPED 204 +#define SH_CSS_BINARY_ID_IF_TO_OB 205 +#define SH_CSS_BINARY_ID_IF_TO_OB_STRIPED 206 +#define SH_CSS_BINARY_ID_IF_TO_LIN 207 +#define SH_CSS_BINARY_ID_IF_TO_LIN_STRIPED 208 +#define SH_CSS_BINARY_ID_IF_TO_SHD 209 +#define SH_CSS_BINARY_ID_IF_TO_SHD_STRIPED 210 +#define SH_CSS_BINARY_ID_IF_TO_BNR 211 +#define SH_CSS_BINARY_ID_IF_TO_BNR_STRIPED 212 +#define SH_CSS_BINARY_ID_IF_TO_ANR 213 +#define SH_CSS_BINARY_ID_IF_TO_ANR_STRIPED 214 +#define SH_CSS_BINARY_ID_IF_TO_DM 215 +#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0 216 +#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0_STRIPED 217 +#define SH_CSS_BINARY_ID_IF_TO_RGBPP 218 +#define SH_CSS_BINARY_ID_IF_TO_RGBPP_NV12_16 219 +#define SH_CSS_BINARY_ID_IF_TO_RGBPP_STRIPED 220 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1 221 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1_STRIPED 222 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0 223 +#define SH_CSS_BINARY_ID_IF_TO_YUVP2_C0 224 +#define SH_CSS_BINARY_ID_IF_TO_YUVP2_STRIPED 225 +#define SH_CSS_BINARY_ID_IF_TO_XNR 226 +#define SH_CSS_BINARY_ID_IF_TO_XNR_STRIPED 227 +#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY 228 +#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY_STRIPED 229 +#define SH_CSS_BINARY_ID_IF_TO_REF 230 +#define SH_CSS_BINARY_ID_IF_TO_REF_STRIPED 231 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_DVS 232 +#define SH_CSS_BINARY_ID_IF_TO_DVS_STRIPED 233 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_TNR 234 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS 235 +#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS_STRIPED 236 +#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY 237 +#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY_STRIPED 238 +#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0_STRIPED 239 +#define SH_CSS_BINARY_ID_VIDEO_YUVP1_TO_OSYS 240 +#define SH_CSS_BINARY_ID_IF_TO_OSYS_PREVIEW 241 +#define SH_CSS_BINARY_ID_IF_TO_OSYS_PREVIEW_STRIPED 242 +#endif + +/* Skycam IR camera binaries */ +#ifndef ISP2401 +#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_NO_XNR 300 +#define SH_CSS_BINARY_ID_VIDEO_IR_IF_TO_OSYS_NO_DVS_NO_TNR_NO_XNR 301 +#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_NO_XNR_NO_DVS_PRIMARY 302 +#else +#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS 300 +#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_NO_TNR3 301 +#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_PRIMARY 302 + +/* Binaries under development */ +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR3 401 +#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR3_STRIPED 402 + +#endif + +#define XMEM_WIDTH_BITS HIVE_ISP_DDR_WORD_BITS +#define XMEM_SHORTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS/16) +#define XMEM_INTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS/32) +#define XMEM_POW2_BYTES_PER_WORD HIVE_ISP_DDR_WORD_BYTES + +#define BITS8_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 8) +#define BITS16_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 16) + +#if ISP_VEC_NELEMS == 64 +#define ISP_NWAY_LOG2 6 +#elif ISP_VEC_NELEMS == 32 +#define ISP_NWAY_LOG2 5 +#elif ISP_VEC_NELEMS == 16 +#define ISP_NWAY_LOG2 4 +#elif ISP_VEC_NELEMS == 8 +#define ISP_NWAY_LOG2 3 +#else +#error "isp_const.h ISP_VEC_NELEMS must be one of {8, 16, 32, 64}" +#endif + +/* ***************************** + * ISP input/output buffer sizes + * ****************************/ +/* input image */ +#define INPUT_BUF_DMA_HEIGHT 2 +#define INPUT_BUF_HEIGHT 2 /* double buffer */ +#define OUTPUT_BUF_DMA_HEIGHT 2 +#define OUTPUT_BUF_HEIGHT 2 /* double buffer */ +#define OUTPUT_NUM_TRANSFERS 4 + +/* GDC accelerator: Up/Down Scaling */ +/* These should be moved to the gdc_defs.h in the device */ +#define UDS_SCALING_N HRT_GDC_N +/* AB: This should cover the zooming up to 16MP */ +#define UDS_MAX_OXDIM 5000 +/* We support maximally 2 planes with different parameters + - luma and chroma (YUV420) */ +#define UDS_MAX_PLANES 2 +#define UDS_BLI_BLOCK_HEIGHT 2 +#define UDS_BCI_BLOCK_HEIGHT 4 +#define UDS_BLI_INTERP_ENVELOPE 1 +#define UDS_BCI_INTERP_ENVELOPE 3 +#define UDS_MAX_ZOOM_FAC 64 +/* Make it always one FPGA vector. + Four FPGA vectors are required and + four of them fit in one ASIC vector.*/ +#define UDS_MAX_CHUNKS 16 + +#define ISP_LEFT_PADDING _ISP_LEFT_CROP_EXTRA(ISP_LEFT_CROPPING) +#define ISP_LEFT_PADDING_VECS CEIL_DIV(ISP_LEFT_PADDING, ISP_VEC_NELEMS) +/* in case of continuous the croppong of the current binary doesn't matter for the buffer calculation, but the cropping of the sp copy should be used */ +#define ISP_LEFT_PADDING_CONT _ISP_LEFT_CROP_EXTRA(SH_CSS_MAX_LEFT_CROPPING) +#define ISP_LEFT_PADDING_VECS_CONT CEIL_DIV(ISP_LEFT_PADDING_CONT, ISP_VEC_NELEMS) + +#define CEIL_ROUND_DIV_STRIPE(width, stripe, padding) \ + CEIL_MUL(padding + CEIL_DIV(width - padding, stripe), ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS)?4:2)) + +/* output (Y,U,V) image, 4:2:0 */ +#define MAX_VECTORS_PER_LINE \ + CEIL_ROUND_DIV_STRIPE(CEIL_DIV(ISP_MAX_INTERNAL_WIDTH, ISP_VEC_NELEMS), \ + ISP_NUM_STRIPES, \ + ISP_LEFT_PADDING_VECS) + +/* + * ITERATOR_VECTOR_INCREMENT' explanation: + * when striping an even number of iterations, one of the stripes is + * one iteration wider than the other to account for overlap + * so the calc for the output buffer vmem size is: + * ((width[vectors]/num_of_stripes) + 2[vectors]) + */ +#define MAX_VECTORS_PER_OUTPUT_LINE \ + CEIL_DIV(CEIL_DIV(ISP_MAX_OUTPUT_WIDTH, ISP_NUM_STRIPES) + ISP_LEFT_PADDING, ISP_VEC_NELEMS) + +/* Must be even due to interlaced bayer input */ +#define MAX_VECTORS_PER_INPUT_LINE CEIL_MUL((CEIL_DIV(ISP_MAX_INPUT_WIDTH, ISP_VEC_NELEMS) + ISP_LEFT_PADDING_VECS), 2) +#define MAX_VECTORS_PER_INPUT_STRIPE CEIL_ROUND_DIV_STRIPE(MAX_VECTORS_PER_INPUT_LINE, \ + ISP_NUM_STRIPES, \ + ISP_LEFT_PADDING_VECS) + + +/* Add 2 for left croppping */ +#define MAX_SP_RAW_COPY_VECTORS_PER_INPUT_LINE (CEIL_DIV(ISP_MAX_INPUT_WIDTH, ISP_VEC_NELEMS) + 2) + +#define MAX_VECTORS_PER_BUF_LINE \ + (MAX_VECTORS_PER_LINE + DUMMY_BUF_VECTORS) +#define MAX_VECTORS_PER_BUF_INPUT_LINE \ + (MAX_VECTORS_PER_INPUT_STRIPE + DUMMY_BUF_VECTORS) +#define MAX_OUTPUT_Y_FRAME_WIDTH \ + (MAX_VECTORS_PER_LINE * ISP_VEC_NELEMS) +#define MAX_OUTPUT_Y_FRAME_SIMDWIDTH \ + MAX_VECTORS_PER_LINE +#define MAX_OUTPUT_C_FRAME_WIDTH \ + (MAX_OUTPUT_Y_FRAME_WIDTH / 2) +#define MAX_OUTPUT_C_FRAME_SIMDWIDTH \ + CEIL_DIV(MAX_OUTPUT_C_FRAME_WIDTH, ISP_VEC_NELEMS) + +/* should be even */ +#define NO_CHUNKING (OUTPUT_NUM_CHUNKS == 1) + +#define MAX_VECTORS_PER_CHUNK \ + (NO_CHUNKING ? MAX_VECTORS_PER_LINE \ + : 2*CEIL_DIV(MAX_VECTORS_PER_LINE, \ + 2*OUTPUT_NUM_CHUNKS)) + +#define MAX_C_VECTORS_PER_CHUNK \ + (MAX_VECTORS_PER_CHUNK/2) + +/* should be even */ +#define MAX_VECTORS_PER_OUTPUT_CHUNK \ + (NO_CHUNKING ? MAX_VECTORS_PER_OUTPUT_LINE \ + : 2*CEIL_DIV(MAX_VECTORS_PER_OUTPUT_LINE, \ + 2*OUTPUT_NUM_CHUNKS)) + +#define MAX_C_VECTORS_PER_OUTPUT_CHUNK \ + (MAX_VECTORS_PER_OUTPUT_CHUNK/2) + + + +/* should be even */ +#define MAX_VECTORS_PER_INPUT_CHUNK \ + (INPUT_NUM_CHUNKS == 1 ? MAX_VECTORS_PER_INPUT_STRIPE \ + : 2*CEIL_DIV(MAX_VECTORS_PER_INPUT_STRIPE, \ + 2*OUTPUT_NUM_CHUNKS)) + +#define DEFAULT_C_SUBSAMPLING 2 + +/****** DMA buffer properties */ + +#define RAW_BUF_LINES ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS) ? 4 : 2) + +#define RAW_BUF_STRIDE \ + (BINARY_ID == SH_CSS_BINARY_ID_POST_ISP ? MAX_VECTORS_PER_INPUT_CHUNK : \ + ISP_NUM_STRIPES > 1 ? MAX_VECTORS_PER_INPUT_STRIPE+_ISP_EXTRA_PADDING_VECS : \ + !ENABLE_CONTINUOUS ? MAX_VECTORS_PER_INPUT_LINE : \ + MAX_VECTORS_PER_INPUT_CHUNK) + +/* [isp vmem] table size[vectors] per line per color (GR,R,B,GB), + multiples of NWAY */ +#define SCTBL_VECTORS_PER_LINE_PER_COLOR \ + CEIL_DIV(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) +/* [isp vmem] table size[vectors] per line for 4colors (GR,R,B,GB), + multiples of NWAY */ +#define SCTBL_VECTORS_PER_LINE \ + (SCTBL_VECTORS_PER_LINE_PER_COLOR * IA_CSS_SC_NUM_COLORS) + +/*************/ + +/* Format for fixed primaries */ + +#define ISP_FIXED_PRIMARY_FORMAT IA_CSS_FRAME_FORMAT_NV12 + +#endif /* _COMMON_ISP_CONST_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h new file mode 100644 index 0000000000000..37a7d28f6d9f1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h @@ -0,0 +1,128 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _ISP_TYPES_H_ +#define _ISP_TYPES_H_ + +/* Workaround: hivecc complains about "tag "sh_css_3a_output" already declared" + without this extra decl. */ +struct ia_css_3a_output; + +#if defined(__ISP) +struct isp_uds_config { + int hive_dx; + int hive_dy; + unsigned hive_woix; + unsigned hive_bpp; /* gdc_bits_per_pixel */ + unsigned hive_bci; +}; + +struct s_isp_gdcac_config { + unsigned nbx; + unsigned nby; +}; + +/* output.hive.c request information */ +typedef enum { + output_y_channel, + output_c_channel, + OUTPUT_NUM_CHANNELS +} output_channel_type; + +typedef struct s_output_dma_info { + unsigned cond; /* Condition for transfer */ + output_channel_type channel_type; + dma_channel channel; + unsigned width_a; + unsigned width_b; + unsigned stride; + unsigned v_delta; /* Offset for v address to do cropping */ + char *x_base; /* X base address */ +} output_dma_info_type; +#endif + +/* Input stream formats, these correspond to the MIPI formats and the way + * the CSS receiver sends these to the input formatter. + * The bit depth of each pixel element is stored in the global variable + * isp_bits_per_pixel. + * NOTE: for rgb565, we set isp_bits_per_pixel to 565, for all other rgb + * formats it's the actual depth (4, for 444, 8 for 888 etc). + */ +enum sh_stream_format { + sh_stream_format_yuv420_legacy, + sh_stream_format_yuv420, + sh_stream_format_yuv422, + sh_stream_format_rgb, + sh_stream_format_raw, + sh_stream_format_binary, /* bytestream such as jpeg */ +}; + +struct s_isp_frames { + /* global variables that are written to by either the SP or the host, + every ISP binary needs these. */ + /* output frame */ + char *xmem_base_addr_y; + char *xmem_base_addr_uv; + char *xmem_base_addr_u; + char *xmem_base_addr_v; + /* 2nd output frame */ + char *xmem_base_addr_second_out_y; + char *xmem_base_addr_second_out_u; + char *xmem_base_addr_second_out_v; + /* input yuv frame */ + char *xmem_base_addr_y_in; + char *xmem_base_addr_u_in; + char *xmem_base_addr_v_in; + /* input raw frame */ + char *xmem_base_addr_raw; + /* output raw frame */ + char *xmem_base_addr_raw_out; + /* viewfinder output (vf_veceven) */ + char *xmem_base_addr_vfout_y; + char *xmem_base_addr_vfout_u; + char *xmem_base_addr_vfout_v; + /* overlay frame (for vf_pp) */ + char *xmem_base_addr_overlay_y; + char *xmem_base_addr_overlay_u; + char *xmem_base_addr_overlay_v; + /* pre-gdc output frame (gdc input) */ + char *xmem_base_addr_qplane_r; + char *xmem_base_addr_qplane_ratb; + char *xmem_base_addr_qplane_gr; + char *xmem_base_addr_qplane_gb; + char *xmem_base_addr_qplane_b; + char *xmem_base_addr_qplane_batr; + /* YUV as input, used by postisp binary */ + char *xmem_base_addr_yuv_16_y; + char *xmem_base_addr_yuv_16_u; + char *xmem_base_addr_yuv_16_v; +}; + +#endif /* _ISP_TYPES_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c new file mode 100644 index 0000000000000..6512a1ceb9d34 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c @@ -0,0 +1,81 @@ +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#include "memory_realloc.h" +#include "ia_css_debug.h" +#include "ia_css_refcount.h" +#include "memory_access.h" + +static bool realloc_isp_css_mm_buf( + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err, + uint16_t mmgr_attribute); + + +bool reallocate_buffer( + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err) +{ + bool ret; + uint16_t mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; + + IA_CSS_ENTER_PRIVATE("void"); + + ret = realloc_isp_css_mm_buf(curr_buf, + curr_size, needed_size, force, err, mmgr_attribute); + + IA_CSS_LEAVE_PRIVATE("ret=%d", ret); + return ret; +} + +static bool realloc_isp_css_mm_buf( + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err, + uint16_t mmgr_attribute) +{ + int32_t id; + + *err = IA_CSS_SUCCESS; + /* Possible optimization: add a function sh_css_isp_css_mm_realloc() + * and implement on top of hmm. */ + + IA_CSS_ENTER_PRIVATE("void"); + + if (ia_css_refcount_is_single(*curr_buf) && !force && *curr_size >= needed_size) { + IA_CSS_LEAVE_PRIVATE("false"); + return false; + } + + id = IA_CSS_REFCOUNT_PARAM_BUFFER; + ia_css_refcount_decrement(id, *curr_buf); + *curr_buf = ia_css_refcount_increment(id, mmgr_alloc_attr(needed_size, + mmgr_attribute)); + + if (!*curr_buf) { + *err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + *curr_size = 0; + } else { + *curr_size = needed_size; + } + IA_CSS_LEAVE_PRIVATE("true"); + return true; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h new file mode 100644 index 0000000000000..b62c4d321a4ec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h @@ -0,0 +1,257 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_BINARY_H_ +#define _IA_CSS_BINARY_H_ + +#include +#include "ia_css_types.h" +#include "ia_css_err.h" +#include "ia_css_stream_format.h" +#include "ia_css_stream_public.h" +#include "ia_css_frame_public.h" +#include "sh_css_metrics.h" +#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_types.h" + +/* The binary mode is used in pre-processor expressions so we cannot + * use an enum here. */ +#define IA_CSS_BINARY_MODE_COPY 0 +#define IA_CSS_BINARY_MODE_PREVIEW 1 +#define IA_CSS_BINARY_MODE_PRIMARY 2 +#define IA_CSS_BINARY_MODE_VIDEO 3 +#define IA_CSS_BINARY_MODE_PRE_ISP 4 +#define IA_CSS_BINARY_MODE_GDC 5 +#define IA_CSS_BINARY_MODE_POST_ISP 6 +#define IA_CSS_BINARY_MODE_ANR 7 +#define IA_CSS_BINARY_MODE_CAPTURE_PP 8 +#define IA_CSS_BINARY_MODE_VF_PP 9 +#define IA_CSS_BINARY_MODE_PRE_DE 10 +#define IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE0 11 +#define IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE1 12 +#define IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE2 13 +#define IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE3 14 +#define IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE4 15 +#define IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE5 16 +#define IA_CSS_BINARY_NUM_MODES 17 + +#define MAX_NUM_PRIMARY_STAGES 6 +#define NUM_PRIMARY_HQ_STAGES 6 /* number of primary stages for ISP2.6.1 high quality pipe */ +#define NUM_PRIMARY_STAGES 1 /* number of primary satges for ISP1/ISP2.2 pipe */ + +/* Indicate where binaries can read input from */ +#define IA_CSS_BINARY_INPUT_SENSOR 0 +#define IA_CSS_BINARY_INPUT_MEMORY 1 +#define IA_CSS_BINARY_INPUT_VARIABLE 2 + +/* Should be included without the path. + However, that requires adding the path to numerous makefiles + that have nothing to do with isp parameters. + */ +#include "runtime/isp_param/interface/ia_css_isp_param_types.h" + +/* now these ports only include output ports but not vf output ports */ +enum { + IA_CSS_BINARY_OUTPUT_PORT_0 = 0, + IA_CSS_BINARY_OUTPUT_PORT_1 = 1, + IA_CSS_BINARY_MAX_OUTPUT_PORTS = 2 +}; + +struct ia_css_cas_binary_descr { + unsigned int num_stage; + unsigned int num_output_stage; + struct ia_css_frame_info *in_info; + struct ia_css_frame_info *internal_out_info; + struct ia_css_frame_info *out_info; + struct ia_css_frame_info *vf_info; + bool *is_output_stage; +}; + +struct ia_css_binary_descr { + int mode; + bool online; + bool continuous; + bool striped; + bool two_ppc; + bool enable_yuv_ds; + bool enable_high_speed; + bool enable_dvs_6axis; + bool enable_reduced_pipe; + bool enable_dz; + bool enable_xnr; + bool enable_fractional_ds; + bool enable_dpc; +#ifdef ISP2401 + bool enable_luma_only; + bool enable_tnr; +#endif + bool enable_capture_pp_bli; + struct ia_css_resolution dvs_env; + enum atomisp_input_format stream_format; + struct ia_css_frame_info *in_info; /* the info of the input-frame with the + ISP required resolution. */ + struct ia_css_frame_info *bds_out_info; + struct ia_css_frame_info *out_info[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame_info *vf_info; + unsigned int isp_pipe_version; + unsigned int required_bds_factor; + int stream_config_left_padding; +}; + +struct ia_css_binary { + const struct ia_css_binary_xinfo *info; + enum atomisp_input_format input_format; + struct ia_css_frame_info in_frame_info; + struct ia_css_frame_info internal_frame_info; + struct ia_css_frame_info out_frame_info[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_resolution effective_in_frame_res; + struct ia_css_frame_info vf_frame_info; + int input_buf_vectors; + int deci_factor_log2; + int vf_downscale_log2; + int s3atbl_width; + int s3atbl_height; + int s3atbl_isp_width; + int s3atbl_isp_height; + unsigned int morph_tbl_width; + unsigned int morph_tbl_aligned_width; + unsigned int morph_tbl_height; + int sctbl_width_per_color; + int sctbl_aligned_width_per_color; + int sctbl_height; +#ifdef ISP2401 + int sctbl_legacy_width_per_color; + int sctbl_legacy_height; +#endif + struct ia_css_sdis_info dis; + struct ia_css_resolution dvs_envelope; + bool online; + unsigned int uds_xc; + unsigned int uds_yc; + unsigned int left_padding; + struct sh_css_binary_metrics metrics; + struct ia_css_isp_param_host_segments mem_params; + struct ia_css_isp_param_css_segments css_params; +}; + +#define IA_CSS_BINARY_DEFAULT_SETTINGS \ +(struct ia_css_binary) { \ + .input_format = ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY, \ + .in_frame_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ + .internal_frame_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ + .out_frame_info = {IA_CSS_BINARY_DEFAULT_FRAME_INFO}, \ + .vf_frame_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO, \ +} + +enum ia_css_err +ia_css_binary_init_infos(void); + +enum ia_css_err +ia_css_binary_uninit(void); + +enum ia_css_err +ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, + bool online, + bool two_ppc, + enum atomisp_input_format stream_format, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *bds_out_info, + const struct ia_css_frame_info *out_info[], + const struct ia_css_frame_info *vf_info, + struct ia_css_binary *binary, + struct ia_css_resolution *dvs_env, + int stream_config_left_padding, + bool accelerator); + +enum ia_css_err +ia_css_binary_find(struct ia_css_binary_descr *descr, + struct ia_css_binary *binary); + +/* @brief Get the shading information of the specified shading correction type. + * + * @param[in] binary: The isp binary which has the shading correction. + * @param[in] type: The shading correction type. + * @param[in] required_bds_factor: The bayer downscaling factor required in the pipe. + * @param[in] stream_config: The stream configuration. +#ifndef ISP2401 + * @param[out] info: The shading information. +#else + * @param[out] shading_info: The shading information. + * The shading information necessary as API is stored in the shading_info. +#endif + * The driver needs to get this information to generate +#ifndef ISP2401 + * the shading table directly required in the isp. +#else + * the shading table directly required from ISP. + * @param[out] pipe_config: The pipe configuration. + * The shading information related to ISP (but, not necessary as API) is stored in the pipe_config. +#endif + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err +ia_css_binary_get_shading_info(const struct ia_css_binary *binary, + enum ia_css_shading_correction_type type, + unsigned int required_bds_factor, + const struct ia_css_stream_config *stream_config, +#ifndef ISP2401 + struct ia_css_shading_info *info); +#else + struct ia_css_shading_info *shading_info, + struct ia_css_pipe_config *pipe_config); +#endif + +enum ia_css_err +ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe); + +void +ia_css_binary_dvs_grid_info(const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe); + +void +ia_css_binary_dvs_stat_grid_info( + const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe); + +unsigned +ia_css_binary_max_vf_width(void); + +void +ia_css_binary_destroy_isp_parameters(struct ia_css_binary *binary); + +void +ia_css_binary_get_isp_binaries(struct ia_css_binary_xinfo **binaries, + uint32_t *num_isp_binaries); + +#endif /* _IA_CSS_BINARY_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c new file mode 100644 index 0000000000000..0cd6e1da43cfe --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c @@ -0,0 +1,1838 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include /* HR_GDC_N */ +#include "isp.h" /* ISP_VEC_NELEMS */ + +#include "ia_css_binary.h" +#include "ia_css_debug.h" +#include "ia_css_util.h" +#include "ia_css_isp_param.h" +#include "sh_css_internal.h" +#include "sh_css_sp.h" +#include "sh_css_firmware.h" +#include "sh_css_defs.h" +#include "sh_css_legacy.h" + +#include "vf/vf_1.0/ia_css_vf.host.h" +#ifdef ISP2401 +#include "sc/sc_1.0/ia_css_sc.host.h" +#endif +#include "sdis/sdis_1.0/ia_css_sdis.host.h" +#ifdef ISP2401 +#include "fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" /* FRAC_ACC */ +#endif + +#include "camera/pipe/interface/ia_css_pipe_binarydesc.h" + +#include "memory_access.h" + +#include "assert_support.h" + +#define IMPLIES(a, b) (!(a) || (b)) /* A => B */ + +static struct ia_css_binary_xinfo *all_binaries; /* ISP binaries only (no SP) */ +static struct ia_css_binary_xinfo + *binary_infos[IA_CSS_BINARY_NUM_MODES] = { NULL, }; + +static void +ia_css_binary_dvs_env(const struct ia_css_binary_info *info, + const struct ia_css_resolution *dvs_env, + struct ia_css_resolution *binary_dvs_env) +{ + if (info->enable.dvs_envelope) { + assert(dvs_env != NULL); + binary_dvs_env->width = max(dvs_env->width, SH_CSS_MIN_DVS_ENVELOPE); + binary_dvs_env->height = max(dvs_env->height, SH_CSS_MIN_DVS_ENVELOPE); + } +} + +static void +ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *bds_out_info, + const struct ia_css_frame_info *out_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_binary_info *info, + struct ia_css_resolution *internal_res) +{ + unsigned int isp_tmp_internal_width = 0, + isp_tmp_internal_height = 0; + bool binary_supports_yuv_ds = info->enable.ds & 2; + struct ia_css_resolution binary_dvs_env; + + binary_dvs_env.width = 0; + binary_dvs_env.height = 0; + ia_css_binary_dvs_env(info, dvs_env, &binary_dvs_env); + + if (binary_supports_yuv_ds) { + if (in_info != NULL) { + isp_tmp_internal_width = in_info->res.width + + info->pipeline.left_cropping + binary_dvs_env.width; + isp_tmp_internal_height = in_info->res.height + + info->pipeline.top_cropping + binary_dvs_env.height; + } + } else if ((bds_out_info != NULL) && (out_info != NULL) && + /* TODO: hack to make video_us case work. this should be reverted after + a nice solution in ISP */ + (bds_out_info->res.width >= out_info->res.width)) { + isp_tmp_internal_width = bds_out_info->padded_width; + isp_tmp_internal_height = bds_out_info->res.height; + } else { + if (out_info != NULL) { + isp_tmp_internal_width = out_info->padded_width; + isp_tmp_internal_height = out_info->res.height; + } + } + + /* We first calculate the resolutions used by the ISP. After that, + * we use those resolutions to compute sizes for tables etc. */ + internal_res->width = __ISP_INTERNAL_WIDTH(isp_tmp_internal_width, + (int)binary_dvs_env.width, + info->pipeline.left_cropping, info->pipeline.mode, + info->pipeline.c_subsampling, + info->output.num_chunks, info->pipeline.pipelining); + internal_res->height = __ISP_INTERNAL_HEIGHT(isp_tmp_internal_height, + info->pipeline.top_cropping, + binary_dvs_env.height); +} + +#ifndef ISP2401 +/* Computation results of the origin coordinate of bayer on the shading table. */ +struct sh_css_shading_table_bayer_origin_compute_results { + uint32_t bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of bayer scaling. */ + uint32_t bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of bayer scaling. */ + uint32_t bayer_scale_ver_ratio_in; /* Vertical ratio (in) of bayer scaling. */ + uint32_t bayer_scale_ver_ratio_out; /* Vertical ratio (out) of bayer scaling. */ + uint32_t sc_bayer_origin_x_bqs_on_shading_table; /* X coordinate (in bqs) of bayer origin on shading table. */ + uint32_t sc_bayer_origin_y_bqs_on_shading_table; /* Y coordinate (in bqs) of bayer origin on shading table. */ +#else +/* Requirements for the shading correction. */ +struct sh_css_binary_sc_requirements { + /* Bayer scaling factor, for the scaling which is applied before shading correction. */ + uint32_t bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of scaling applied BEFORE shading correction. */ + uint32_t bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of scaling applied BEFORE shading correction. */ + uint32_t bayer_scale_ver_ratio_in; /* Vertical ratio (in) of scaling applied BEFORE shading correction. */ + uint32_t bayer_scale_ver_ratio_out; /* Vertical ratio (out) of scaling applied BEFORE shading correction. */ + + /* ISP internal frame is composed of the real sensor data and the padding data. */ + uint32_t sensor_data_origin_x_bqs_on_internal; /* X origin (in bqs) of sensor data on internal frame + at shading correction. */ + uint32_t sensor_data_origin_y_bqs_on_internal; /* Y origin (in bqs) of sensor data on internal frame + at shading correction. */ +#endif +}; + +/* Get the requirements for the shading correction. */ +static enum ia_css_err +#ifndef ISP2401 +ia_css_binary_compute_shading_table_bayer_origin( + const struct ia_css_binary *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ + struct sh_css_shading_table_bayer_origin_compute_results *res) /* [out] */ +#else +sh_css_binary_get_sc_requirements( + const struct ia_css_binary *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ + struct sh_css_binary_sc_requirements *scr) /* [out] */ +#endif +{ + enum ia_css_err err; + +#ifndef ISP2401 + /* Numerator and denominator of the fixed bayer downscaling factor. + (numerator >= denominator) */ +#else + /* Numerator and denominator of the fixed bayer downscaling factor. (numerator >= denominator) */ +#endif + unsigned int bds_num, bds_den; + +#ifndef ISP2401 + /* Horizontal/Vertical ratio of bayer scaling + between input area and output area. */ + unsigned int bs_hor_ratio_in; + unsigned int bs_hor_ratio_out; + unsigned int bs_ver_ratio_in; + unsigned int bs_ver_ratio_out; +#else + /* Horizontal/Vertical ratio of bayer scaling between input area and output area. */ + unsigned int bs_hor_ratio_in, bs_hor_ratio_out, bs_ver_ratio_in, bs_ver_ratio_out; +#endif + + /* Left padding set by InputFormatter. */ +#ifndef ISP2401 + unsigned int left_padding_bqs; /* in bqs */ +#else + unsigned int left_padding_bqs; +#endif + +#ifndef ISP2401 + /* Flag for the NEED_BDS_FACTOR_2_00 macro defined in isp kernels. */ + unsigned int need_bds_factor_2_00; + + /* Left padding adjusted inside the isp. */ + unsigned int left_padding_adjusted_bqs; /* in bqs */ + + /* Bad pixels caused by filters. + NxN-filter (before/after bayer scaling) moves the image position + to right/bottom directions by a few pixels. + It causes bad pixels at left/top sides, + and effective bayer size decreases. */ + unsigned int bad_bqs_on_left_before_bs; /* in bqs */ + unsigned int bad_bqs_on_left_after_bs; /* in bqs */ + unsigned int bad_bqs_on_top_before_bs; /* in bqs */ + unsigned int bad_bqs_on_top_after_bs; /* in bqs */ + + /* Get the numerator and denominator of bayer downscaling factor. */ + err = sh_css_bds_factor_get_numerator_denominator + (required_bds_factor, &bds_num, &bds_den); + if (err != IA_CSS_SUCCESS) +#else + /* Flags corresponding to NEED_BDS_FACTOR_2_00/NEED_BDS_FACTOR_1_50/NEED_BDS_FACTOR_1_25 macros + * defined in isp kernels. */ + unsigned int need_bds_factor_2_00, need_bds_factor_1_50, need_bds_factor_1_25; + + /* Left padding adjusted inside the isp kernels. */ + unsigned int left_padding_adjusted_bqs; + + /* Top padding padded inside the isp kernel for bayer downscaling binaries. */ + unsigned int top_padding_bqs; + + /* Bayer downscaling factor 1.0 by fixed-point. */ + int bds_frac_acc = FRAC_ACC; /* FRAC_ACC is defined in ia_css_fixedbds_param.h. */ + + /* Right/Down shift amount caused by filters applied BEFORE shading corrertion. */ + unsigned int right_shift_bqs_before_bs; /* right shift before bayer scaling */ + unsigned int right_shift_bqs_after_bs; /* right shift after bayer scaling */ + unsigned int down_shift_bqs_before_bs; /* down shift before bayer scaling */ + unsigned int down_shift_bqs_after_bs; /* down shift after bayer scaling */ + + /* Origin of the real sensor data area on the internal frame at shading correction. */ + unsigned int sensor_data_origin_x_bqs_on_internal; + unsigned int sensor_data_origin_y_bqs_on_internal; + + IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", + binary, required_bds_factor, stream_config); + + /* Get the numerator and denominator of the required bayer downscaling factor. */ + err = sh_css_bds_factor_get_numerator_denominator(required_bds_factor, &bds_num, &bds_den); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); +#endif + return err; +#ifdef ISP2401 + } +#endif + +#ifndef ISP2401 + /* Set the horizontal/vertical ratio of bayer scaling + between input area and output area. */ +#else + IA_CSS_LOG("bds_num=%d, bds_den=%d", bds_num, bds_den); + + /* Set the horizontal/vertical ratio of bayer scaling between input area and output area. */ +#endif + bs_hor_ratio_in = bds_num; + bs_hor_ratio_out = bds_den; + bs_ver_ratio_in = bds_num; + bs_ver_ratio_out = bds_den; + +#ifndef ISP2401 + /* Set the left padding set by InputFormatter. (ifmtr.c) */ +#else + /* Set the left padding set by InputFormatter. (ia_css_ifmtr_configure() in ifmtr.c) */ +#endif + if (stream_config->left_padding == -1) + left_padding_bqs = _ISP_BQS(binary->left_padding); + else +#ifndef ISP2401 + left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS + - _ISP_BQS(stream_config->left_padding)); +#else + left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS - _ISP_BQS(stream_config->left_padding)); +#endif + +#ifndef ISP2401 + /* Set the left padding adjusted inside the isp. + When bds_factor 2.00 is needed, some padding is added to left_padding + inside the isp, before bayer downscaling. (raw.isp.c) + (Hopefully, left_crop/left_padding/top_crop should be defined in css + appropriately, depending on bds_factor.) + */ +#else + IA_CSS_LOG("stream.left_padding=%d, binary.left_padding=%d, left_padding_bqs=%d", + stream_config->left_padding, binary->left_padding, left_padding_bqs); + + /* Set the left padding adjusted inside the isp kernels. + * When the bds_factor isn't 1.00, the left padding size is adjusted inside the isp, + * before bayer downscaling. (scaled_hor_plane_index(), raw_compute_hphase() in raw.isp.c) + */ +#endif + need_bds_factor_2_00 = ((binary->info->sp.bds.supported_bds_factors & + (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_8_00))) != 0); + +#ifndef ISP2401 + if (need_bds_factor_2_00 && binary->info->sp.pipeline.left_cropping > 0) + left_padding_adjusted_bqs = left_padding_bqs + ISP_VEC_NELEMS; + else +#else + need_bds_factor_1_50 = ((binary->info->sp.bds.supported_bds_factors & + (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_25) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00))) != 0); + + need_bds_factor_1_25 = ((binary->info->sp.bds.supported_bds_factors & + (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_25) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00))) != 0); + + if (binary->info->sp.pipeline.left_cropping > 0 && + (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25)) { + /* + * downscale 2.0 -> first_vec_adjusted_bqs = 128 + * downscale 1.5 -> first_vec_adjusted_bqs = 96 + * downscale 1.25 -> first_vec_adjusted_bqs = 80 + */ + unsigned int first_vec_adjusted_bqs + = ISP_VEC_NELEMS * bs_hor_ratio_in / bs_hor_ratio_out; + left_padding_adjusted_bqs = first_vec_adjusted_bqs + - _ISP_BQS(binary->info->sp.pipeline.left_cropping); + } else +#endif + left_padding_adjusted_bqs = left_padding_bqs; + +#ifndef ISP2401 + /* Currently, the bad pixel caused by filters before bayer scaling + is NOT considered, because the bad pixel is subtle. + When some large filter is used in the future, + we need to consider the bad pixel. + + Currently, when bds_factor isn't 1.00, 3x3 anti-alias filter is applied + to each color plane(Gr/R/B/Gb) before bayer downscaling. + This filter moves each color plane to right/bottom directions + by 1 pixel at the most, depending on downscaling factor. + */ + bad_bqs_on_left_before_bs = 0; + bad_bqs_on_top_before_bs = 0; +#else + IA_CSS_LOG("supported_bds_factors=%d, need_bds_factor:2_00=%d, 1_50=%d, 1_25=%d", + binary->info->sp.bds.supported_bds_factors, + need_bds_factor_2_00, need_bds_factor_1_50, need_bds_factor_1_25); + IA_CSS_LOG("left_cropping=%d, left_padding_adjusted_bqs=%d", + binary->info->sp.pipeline.left_cropping, left_padding_adjusted_bqs); + + /* Set the top padding padded inside the isp kernel for bayer downscaling binaries. + * When the bds_factor isn't 1.00, the top padding is padded inside the isp + * before bayer downscaling, because the top cropping size (input margin) is not enough. + * (calculate_input_line(), raw_compute_vphase(), dma_read_raw() in raw.isp.c) + * NOTE: In dma_read_raw(), the factor passed to raw_compute_vphase() is got by get_bds_factor_for_dma_read(). + * This factor is BDS_FPVAL_100/BDS_FPVAL_125/BDS_FPVAL_150/BDS_FPVAL_200. + */ + top_padding_bqs = 0; + if (binary->info->sp.pipeline.top_cropping > 0 && + (required_bds_factor == SH_CSS_BDS_FACTOR_1_25 || + required_bds_factor == SH_CSS_BDS_FACTOR_1_50 || + required_bds_factor == SH_CSS_BDS_FACTOR_2_00)) { + /* Calculation from calculate_input_line() and raw_compute_vphase() in raw.isp.c. */ + int top_cropping_bqs = _ISP_BQS(binary->info->sp.pipeline.top_cropping); + /* top cropping (in bqs) */ + int factor = bds_num * bds_frac_acc / bds_den; /* downscaling factor by fixed-point */ + int top_padding_bqsxfrac_acc = (top_cropping_bqs * factor - top_cropping_bqs * bds_frac_acc) + + (2 * bds_frac_acc - factor); /* top padding by fixed-point (in bqs) */ + + top_padding_bqs = (unsigned int)((top_padding_bqsxfrac_acc + bds_frac_acc/2 - 1) / bds_frac_acc); + } + + IA_CSS_LOG("top_cropping=%d, top_padding_bqs=%d", binary->info->sp.pipeline.top_cropping, top_padding_bqs); + + /* Set the right/down shift amount caused by filters applied BEFORE bayer scaling, + * which scaling is applied BEFORE shading corrertion. + * + * When the bds_factor isn't 1.00, 3x3 anti-alias filter is applied to each color plane(Gr/R/B/Gb) + * before bayer downscaling. + * This filter shifts each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. + */ + right_shift_bqs_before_bs = 0; + down_shift_bqs_before_bs = 0; +#endif + +#ifndef ISP2401 + /* Currently, the bad pixel caused by filters after bayer scaling + is NOT considered, because the bad pixel is subtle. + When some large filter is used in the future, + we need to consider the bad pixel. + + Currently, when DPC&BNR is processed between bayer scaling and + shading correction, DPC&BNR moves each color plane to + right/bottom directions by 1 pixel. + */ + bad_bqs_on_left_after_bs = 0; + bad_bqs_on_top_after_bs = 0; +#else + if (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25) { + right_shift_bqs_before_bs = 1; + down_shift_bqs_before_bs = 1; + } + + IA_CSS_LOG("right_shift_bqs_before_bs=%d, down_shift_bqs_before_bs=%d", + right_shift_bqs_before_bs, down_shift_bqs_before_bs); + + /* Set the right/down shift amount caused by filters applied AFTER bayer scaling, + * which scaling is applied BEFORE shading corrertion. + * + * When DPC&BNR is processed between bayer scaling and shading correction, + * DPC&BNR moves each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. + */ + right_shift_bqs_after_bs = 0; + down_shift_bqs_after_bs = 0; +#endif + +#ifndef ISP2401 + /* Calculate the origin of bayer (real sensor data area) + located on the shading table during the shading correction. */ + res->sc_bayer_origin_x_bqs_on_shading_table + = ((left_padding_adjusted_bqs + bad_bqs_on_left_before_bs) + * bs_hor_ratio_out + bs_hor_ratio_in/2) / bs_hor_ratio_in + + bad_bqs_on_left_after_bs; + /* "+ bs_hor_ratio_in/2": rounding for division by bs_hor_ratio_in */ + res->sc_bayer_origin_y_bqs_on_shading_table + = (bad_bqs_on_top_before_bs + * bs_ver_ratio_out + bs_ver_ratio_in/2) / bs_ver_ratio_in + + bad_bqs_on_top_after_bs; + /* "+ bs_ver_ratio_in/2": rounding for division by bs_ver_ratio_in */ + + res->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; + res->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; + res->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; + res->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; +#else + if (binary->info->mem_offsets.offsets.param->dmem.dp.size != 0) { /* if DPC&BNR is enabled in the binary */ + right_shift_bqs_after_bs = 1; + down_shift_bqs_after_bs = 1; + } + + IA_CSS_LOG("right_shift_bqs_after_bs=%d, down_shift_bqs_after_bs=%d", + right_shift_bqs_after_bs, down_shift_bqs_after_bs); + + /* Set the origin of the sensor data area on the internal frame at shading correction. */ + { + unsigned int bs_frac = bds_frac_acc; /* scaling factor 1.0 in fixed point */ + unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ + + bs_out = bs_hor_ratio_out * bs_frac; + bs_in = bs_hor_ratio_in * bs_frac; + sensor_data_origin_x_bqs_on_internal + = ((left_padding_adjusted_bqs + right_shift_bqs_before_bs) * bs_out + bs_in/2) / bs_in + + right_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ + + bs_out = bs_ver_ratio_out * bs_frac; + bs_in = bs_ver_ratio_in * bs_frac; + sensor_data_origin_y_bqs_on_internal + = ((top_padding_bqs + down_shift_bqs_before_bs) * bs_out + bs_in/2) / bs_in + + down_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ + } + + scr->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; + scr->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; + scr->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; + scr->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; + scr->sensor_data_origin_x_bqs_on_internal = (uint32_t)sensor_data_origin_x_bqs_on_internal; + scr->sensor_data_origin_y_bqs_on_internal = (uint32_t)sensor_data_origin_y_bqs_on_internal; + + IA_CSS_LOG("sc_requirements: %d, %d, %d, %d, %d, %d", + scr->bayer_scale_hor_ratio_in, scr->bayer_scale_hor_ratio_out, + scr->bayer_scale_ver_ratio_in, scr->bayer_scale_ver_ratio_out, + scr->sensor_data_origin_x_bqs_on_internal, scr->sensor_data_origin_y_bqs_on_internal); +#endif + +#ifdef ISP2401 + IA_CSS_LEAVE_ERR_PRIVATE(err); +#endif + return err; +} + +/* Get the shading information of Shading Correction Type 1. */ +static enum ia_css_err +ia_css_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ +#ifndef ISP2401 + struct ia_css_shading_info *info) /* [out] */ +#else + struct ia_css_shading_info *shading_info, /* [out] */ + struct ia_css_pipe_config *pipe_config) /* [out] */ +#endif +{ + enum ia_css_err err; +#ifndef ISP2401 + struct sh_css_shading_table_bayer_origin_compute_results res; +#else + struct sh_css_binary_sc_requirements scr; +#endif + +#ifndef ISP2401 + assert(binary != NULL); + assert(info != NULL); +#else + uint32_t in_width_bqs, in_height_bqs, internal_width_bqs, internal_height_bqs; + uint32_t num_hor_grids, num_ver_grids, bqs_per_grid_cell, tbl_width_bqs, tbl_height_bqs; + uint32_t sensor_org_x_bqs_on_internal, sensor_org_y_bqs_on_internal, sensor_width_bqs, sensor_height_bqs; + uint32_t sensor_center_x_bqs_on_internal, sensor_center_y_bqs_on_internal; + uint32_t left, right, upper, lower; + uint32_t adjust_left, adjust_right, adjust_upper, adjust_lower, adjust_width_bqs, adjust_height_bqs; + uint32_t internal_org_x_bqs_on_tbl, internal_org_y_bqs_on_tbl; + uint32_t sensor_org_x_bqs_on_tbl, sensor_org_y_bqs_on_tbl; +#endif + +#ifndef ISP2401 + info->type = IA_CSS_SHADING_CORRECTION_TYPE_1; +#else + assert(binary != NULL); + assert(stream_config != NULL); + assert(shading_info != NULL); + assert(pipe_config != NULL); +#endif + +#ifndef ISP2401 + info->info.type_1.enable = binary->info->sp.enable.sc; + info->info.type_1.num_hor_grids = binary->sctbl_width_per_color; + info->info.type_1.num_ver_grids = binary->sctbl_height; + info->info.type_1.bqs_per_grid_cell = (1 << binary->deci_factor_log2); +#else + IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", + binary, required_bds_factor, stream_config); +#endif + + /* Initialize by default values. */ +#ifndef ISP2401 + info->info.type_1.bayer_scale_hor_ratio_in = 1; + info->info.type_1.bayer_scale_hor_ratio_out = 1; + info->info.type_1.bayer_scale_ver_ratio_in = 1; + info->info.type_1.bayer_scale_ver_ratio_out = 1; + info->info.type_1.sc_bayer_origin_x_bqs_on_shading_table = 0; + info->info.type_1.sc_bayer_origin_y_bqs_on_shading_table = 0; + + err = ia_css_binary_compute_shading_table_bayer_origin( + binary, + required_bds_factor, + stream_config, + &res); + if (err != IA_CSS_SUCCESS) +#else + *shading_info = DEFAULT_SHADING_INFO_TYPE_1; + + err = sh_css_binary_get_sc_requirements(binary, required_bds_factor, stream_config, &scr); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); +#endif + return err; +#ifdef ISP2401 + } + + IA_CSS_LOG("binary: id=%d, sctbl=%dx%d, deci=%d", + binary->info->sp.id, binary->sctbl_width_per_color, binary->sctbl_height, binary->deci_factor_log2); + IA_CSS_LOG("binary: in=%dx%d, in_padded_w=%d, int=%dx%d, int_padded_w=%d, out=%dx%d, out_padded_w=%d", + binary->in_frame_info.res.width, binary->in_frame_info.res.height, binary->in_frame_info.padded_width, + binary->internal_frame_info.res.width, binary->internal_frame_info.res.height, + binary->internal_frame_info.padded_width, + binary->out_frame_info[0].res.width, binary->out_frame_info[0].res.height, + binary->out_frame_info[0].padded_width); + + /* Set the input size from sensor, which includes left/top crop size. */ + in_width_bqs = _ISP_BQS(binary->in_frame_info.res.width); + in_height_bqs = _ISP_BQS(binary->in_frame_info.res.height); + + /* Frame size internally used in ISP, including sensor data and padding. + * This is the frame size, to which the shading correction is applied. + */ + internal_width_bqs = _ISP_BQS(binary->internal_frame_info.res.width); + internal_height_bqs = _ISP_BQS(binary->internal_frame_info.res.height); + + /* Shading table. */ + num_hor_grids = binary->sctbl_width_per_color; + num_ver_grids = binary->sctbl_height; + bqs_per_grid_cell = (1 << binary->deci_factor_log2); + tbl_width_bqs = (num_hor_grids - 1) * bqs_per_grid_cell; + tbl_height_bqs = (num_ver_grids - 1) * bqs_per_grid_cell; +#endif + +#ifndef ISP2401 + info->info.type_1.bayer_scale_hor_ratio_in = res.bayer_scale_hor_ratio_in; + info->info.type_1.bayer_scale_hor_ratio_out = res.bayer_scale_hor_ratio_out; + info->info.type_1.bayer_scale_ver_ratio_in = res.bayer_scale_ver_ratio_in; + info->info.type_1.bayer_scale_ver_ratio_out = res.bayer_scale_ver_ratio_out; + info->info.type_1.sc_bayer_origin_x_bqs_on_shading_table = res.sc_bayer_origin_x_bqs_on_shading_table; + info->info.type_1.sc_bayer_origin_y_bqs_on_shading_table = res.sc_bayer_origin_y_bqs_on_shading_table; +#else + IA_CSS_LOG("tbl_width_bqs=%d, tbl_height_bqs=%d", tbl_width_bqs, tbl_height_bqs); +#endif + +#ifdef ISP2401 + /* Real sensor data area on the internal frame at shading correction. + * Filters and scaling are applied to the internal frame before shading correction, depending on the binary. + */ + sensor_org_x_bqs_on_internal = scr.sensor_data_origin_x_bqs_on_internal; + sensor_org_y_bqs_on_internal = scr.sensor_data_origin_y_bqs_on_internal; + { + unsigned int bs_frac = 8; /* scaling factor 1.0 in fixed point (8 == FRAC_ACC macro in ISP) */ + unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ + + bs_out = scr.bayer_scale_hor_ratio_out * bs_frac; + bs_in = scr.bayer_scale_hor_ratio_in * bs_frac; + sensor_width_bqs = (in_width_bqs * bs_out + bs_in/2) / bs_in; /* "+ bs_in/2": rounding */ + + bs_out = scr.bayer_scale_ver_ratio_out * bs_frac; + bs_in = scr.bayer_scale_ver_ratio_in * bs_frac; + sensor_height_bqs = (in_height_bqs * bs_out + bs_in/2) / bs_in; /* "+ bs_in/2": rounding */ + } + + /* Center of the sensor data on the internal frame at shading correction. */ + sensor_center_x_bqs_on_internal = sensor_org_x_bqs_on_internal + sensor_width_bqs / 2; + sensor_center_y_bqs_on_internal = sensor_org_y_bqs_on_internal + sensor_height_bqs / 2; + + /* Size of left/right/upper/lower sides of the sensor center on the internal frame. */ + left = sensor_center_x_bqs_on_internal; + right = internal_width_bqs - sensor_center_x_bqs_on_internal; + upper = sensor_center_y_bqs_on_internal; + lower = internal_height_bqs - sensor_center_y_bqs_on_internal; + + /* Align the size of left/right/upper/lower sides to a multiple of the grid cell size. */ + adjust_left = CEIL_MUL(left, bqs_per_grid_cell); + adjust_right = CEIL_MUL(right, bqs_per_grid_cell); + adjust_upper = CEIL_MUL(upper, bqs_per_grid_cell); + adjust_lower = CEIL_MUL(lower, bqs_per_grid_cell); + + /* Shading table should cover the adjusted frame size. */ + adjust_width_bqs = adjust_left + adjust_right; + adjust_height_bqs = adjust_upper + adjust_lower; + + IA_CSS_LOG("adjust_width_bqs=%d, adjust_height_bqs=%d", adjust_width_bqs, adjust_height_bqs); + + if (adjust_width_bqs > tbl_width_bqs || adjust_height_bqs > tbl_height_bqs) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + /* Origin of the internal frame on the shading table. */ + internal_org_x_bqs_on_tbl = adjust_left - left; + internal_org_y_bqs_on_tbl = adjust_upper - upper; + + /* Origin of the real sensor data area on the shading table. */ + sensor_org_x_bqs_on_tbl = internal_org_x_bqs_on_tbl + sensor_org_x_bqs_on_internal; + sensor_org_y_bqs_on_tbl = internal_org_y_bqs_on_tbl + sensor_org_y_bqs_on_internal; + + /* The shading information necessary as API is stored in the shading_info. */ + shading_info->info.type_1.num_hor_grids = num_hor_grids; + shading_info->info.type_1.num_ver_grids = num_ver_grids; + shading_info->info.type_1.bqs_per_grid_cell = bqs_per_grid_cell; + + shading_info->info.type_1.bayer_scale_hor_ratio_in = scr.bayer_scale_hor_ratio_in; + shading_info->info.type_1.bayer_scale_hor_ratio_out = scr.bayer_scale_hor_ratio_out; + shading_info->info.type_1.bayer_scale_ver_ratio_in = scr.bayer_scale_ver_ratio_in; + shading_info->info.type_1.bayer_scale_ver_ratio_out = scr.bayer_scale_ver_ratio_out; + + shading_info->info.type_1.isp_input_sensor_data_res_bqs.width = in_width_bqs; + shading_info->info.type_1.isp_input_sensor_data_res_bqs.height = in_height_bqs; + + shading_info->info.type_1.sensor_data_res_bqs.width = sensor_width_bqs; + shading_info->info.type_1.sensor_data_res_bqs.height = sensor_height_bqs; + + shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x = (int32_t)sensor_org_x_bqs_on_tbl; + shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y = (int32_t)sensor_org_y_bqs_on_tbl; + + /* The shading information related to ISP (but, not necessary as API) is stored in the pipe_config. */ + pipe_config->internal_frame_origin_bqs_on_sctbl.x = (int32_t)internal_org_x_bqs_on_tbl; + pipe_config->internal_frame_origin_bqs_on_sctbl.y = (int32_t)internal_org_y_bqs_on_tbl; + + IA_CSS_LOG("shading_info: grids=%dx%d, cell=%d, scale=%d,%d,%d,%d, input=%dx%d, data=%dx%d, origin=(%d,%d)", + shading_info->info.type_1.num_hor_grids, + shading_info->info.type_1.num_ver_grids, + shading_info->info.type_1.bqs_per_grid_cell, + shading_info->info.type_1.bayer_scale_hor_ratio_in, + shading_info->info.type_1.bayer_scale_hor_ratio_out, + shading_info->info.type_1.bayer_scale_ver_ratio_in, + shading_info->info.type_1.bayer_scale_ver_ratio_out, + shading_info->info.type_1.isp_input_sensor_data_res_bqs.width, + shading_info->info.type_1.isp_input_sensor_data_res_bqs.height, + shading_info->info.type_1.sensor_data_res_bqs.width, + shading_info->info.type_1.sensor_data_res_bqs.height, + shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x, + shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y); + + IA_CSS_LOG("pipe_config: origin=(%d,%d)", + pipe_config->internal_frame_origin_bqs_on_sctbl.x, + pipe_config->internal_frame_origin_bqs_on_sctbl.y); + + IA_CSS_LEAVE_ERR_PRIVATE(err); +#endif + return err; +} + +enum ia_css_err +ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ + enum ia_css_shading_correction_type type, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ +#ifndef ISP2401 + struct ia_css_shading_info *info) /* [out] */ +#else + struct ia_css_shading_info *shading_info, /* [out] */ + struct ia_css_pipe_config *pipe_config) /* [out] */ +#endif +{ + enum ia_css_err err; + + assert(binary != NULL); +#ifndef ISP2401 + assert(info != NULL); +#else + assert(shading_info != NULL); + + IA_CSS_ENTER_PRIVATE("binary=%p, type=%d, required_bds_factor=%d, stream_config=%p", + binary, type, required_bds_factor, stream_config); +#endif + + if (type == IA_CSS_SHADING_CORRECTION_TYPE_1) +#ifndef ISP2401 + err = ia_css_binary_get_shading_info_type_1(binary, required_bds_factor, stream_config, info); +#else + err = ia_css_binary_get_shading_info_type_1(binary, required_bds_factor, stream_config, + shading_info, pipe_config); +#endif + + /* Other function calls can be added here when other shading correction types will be added in the future. */ + + else + err = IA_CSS_ERR_NOT_SUPPORTED; + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static void sh_css_binary_common_grid_info(const struct ia_css_binary *binary, + struct ia_css_grid_info *info) +{ + assert(binary != NULL); + assert(info != NULL); + + info->isp_in_width = binary->internal_frame_info.res.width; + info->isp_in_height = binary->internal_frame_info.res.height; + + info->vamem_type = IA_CSS_VAMEM_TYPE_2; +} + +void +ia_css_binary_dvs_grid_info(const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe) +{ + struct ia_css_dvs_grid_info *dvs_info; + + (void)pipe; + assert(binary != NULL); + assert(info != NULL); + + dvs_info = &info->dvs_grid.dvs_grid_info; + + /* for DIS, we use a division instead of a ceil_div. If this is smaller + * than the 3a grid size, it indicates that the outer values are not + * valid for DIS. + */ + dvs_info->enable = binary->info->sp.enable.dis; + dvs_info->width = binary->dis.grid.dim.width; + dvs_info->height = binary->dis.grid.dim.height; + dvs_info->aligned_width = binary->dis.grid.pad.width; + dvs_info->aligned_height = binary->dis.grid.pad.height; + dvs_info->bqs_per_grid_cell = 1 << binary->dis.deci_factor_log2; + dvs_info->num_hor_coefs = binary->dis.coef.dim.width; + dvs_info->num_ver_coefs = binary->dis.coef.dim.height; + + sh_css_binary_common_grid_info(binary, info); +} + +void +ia_css_binary_dvs_stat_grid_info( + const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe) +{ + (void)pipe; + sh_css_binary_common_grid_info(binary, info); + return; +} + +enum ia_css_err +ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe) +{ + struct ia_css_3a_grid_info *s3a_info; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("binary=%p, info=%p, pipe=%p", + binary, info, pipe); + + assert(binary != NULL); + assert(info != NULL); + s3a_info = &info->s3a_grid; + + + /* 3A statistics grid */ + s3a_info->enable = binary->info->sp.enable.s3a; + s3a_info->width = binary->s3atbl_width; + s3a_info->height = binary->s3atbl_height; + s3a_info->aligned_width = binary->s3atbl_isp_width; + s3a_info->aligned_height = binary->s3atbl_isp_height; + s3a_info->bqs_per_grid_cell = (1 << binary->deci_factor_log2); + s3a_info->deci_factor_log2 = binary->deci_factor_log2; + s3a_info->elem_bit_depth = SH_CSS_BAYER_BITS; + s3a_info->use_dmem = binary->info->sp.s3a.s3atbl_use_dmem; +#if defined(HAS_NO_HMEM) + s3a_info->has_histogram = 1; +#else + s3a_info->has_histogram = 0; +#endif + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static void +binary_init_pc_histogram(struct sh_css_pc_histogram *histo) +{ + assert(histo != NULL); + + histo->length = 0; + histo->run = NULL; + histo->stall = NULL; +} + +static void +binary_init_metrics(struct sh_css_binary_metrics *metrics, + const struct ia_css_binary_info *info) +{ + assert(metrics != NULL); + assert(info != NULL); + + metrics->mode = info->pipeline.mode; + metrics->id = info->id; + metrics->next = NULL; + binary_init_pc_histogram(&metrics->isp_histogram); + binary_init_pc_histogram(&metrics->sp_histogram); +} + +/* move to host part of output module */ +static bool +binary_supports_output_format(const struct ia_css_binary_xinfo *info, + enum ia_css_frame_format format) +{ + int i; + + assert(info != NULL); + + for (i = 0; i < info->num_output_formats; i++) { + if (info->output_formats[i] == format) + return true; + } + return false; +} + +#ifdef ISP2401 +static bool +binary_supports_input_format(const struct ia_css_binary_xinfo *info, + enum atomisp_input_format format) +{ + + assert(info != NULL); + (void)format; + + return true; +} +#endif + +static bool +binary_supports_vf_format(const struct ia_css_binary_xinfo *info, + enum ia_css_frame_format format) +{ + int i; + + assert(info != NULL); + + for (i = 0; i < info->num_vf_formats; i++) { + if (info->vf_formats[i] == format) + return true; + } + return false; +} + +/* move to host part of bds module */ +static bool +supports_bds_factor(uint32_t supported_factors, + uint32_t bds_factor) +{ + return ((supported_factors & PACK_BDS_FACTOR(bds_factor)) != 0); +} + +static enum ia_css_err +binary_init_info(struct ia_css_binary_xinfo *info, unsigned int i, + bool *binary_found) +{ + const unsigned char *blob = sh_css_blob_info[i].blob; + unsigned size = sh_css_blob_info[i].header.blob.size; + + if ((info == NULL) || (binary_found == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + *info = sh_css_blob_info[i].header.info.isp; + *binary_found = blob != NULL; + info->blob_index = i; + /* we don't have this binary, skip it */ + if (!size) + return IA_CSS_SUCCESS; + + info->xmem_addr = sh_css_load_blob(blob, size); + if (!info->xmem_addr) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + return IA_CSS_SUCCESS; +} + +/* When binaries are put at the beginning, they will only + * be selected if no other primary matches. + */ +enum ia_css_err +ia_css_binary_init_infos(void) +{ + unsigned int i; + unsigned int num_of_isp_binaries = sh_css_num_binaries - NUM_OF_SPS - NUM_OF_BLS; + + if (num_of_isp_binaries == 0) + return IA_CSS_SUCCESS; + + all_binaries = sh_css_malloc(num_of_isp_binaries * + sizeof(*all_binaries)); + if (all_binaries == NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + for (i = 0; i < num_of_isp_binaries; i++) { + enum ia_css_err ret; + struct ia_css_binary_xinfo *binary = &all_binaries[i]; + bool binary_found; + + ret = binary_init_info(binary, i, &binary_found); + if (ret != IA_CSS_SUCCESS) + return ret; + if (!binary_found) + continue; + /* Prepend new binary information */ + binary->next = binary_infos[binary->sp.pipeline.mode]; + binary_infos[binary->sp.pipeline.mode] = binary; + binary->blob = &sh_css_blob_info[i]; + binary->mem_offsets = sh_css_blob_info[i].mem_offsets; + } + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_binary_uninit(void) +{ + unsigned int i; + struct ia_css_binary_xinfo *b; + + for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) { + for (b = binary_infos[i]; b; b = b->next) { + if (b->xmem_addr) + hmm_free(b->xmem_addr); + b->xmem_addr = mmgr_NULL; + } + binary_infos[i] = NULL; + } + sh_css_free(all_binaries); + return IA_CSS_SUCCESS; +} + +/* @brief Compute decimation factor for 3A statistics and shading correction. + * + * @param[in] width Frame width in pixels. + * @param[in] height Frame height in pixels. + * @return Log2 of decimation factor (= grid cell size) in bayer quads. + */ +static int +binary_grid_deci_factor_log2(int width, int height) +{ +/* 3A/Shading decimation factor spcification (at August 2008) + * ------------------------------------------------------------------ + * [Image Width (BQ)] [Decimation Factor (BQ)] [Resulting grid cells] +#ifndef ISP2401 + * 1280 ?c 32 40 ?c + * 640 ?c 1279 16 40 ?c 80 + * ?c 639 8 ?c 80 +#else + * from 1280 32 from 40 + * from 640 to 1279 16 from 40 to 80 + * to 639 8 to 80 +#endif + * ------------------------------------------------------------------ + */ +/* Maximum and minimum decimation factor by the specification */ +#define MAX_SPEC_DECI_FACT_LOG2 5 +#define MIN_SPEC_DECI_FACT_LOG2 3 +/* the smallest frame width in bayer quads when decimation factor (log2) is 5 or 4, by the specification */ +#define DECI_FACT_LOG2_5_SMALLEST_FRAME_WIDTH_BQ 1280 +#define DECI_FACT_LOG2_4_SMALLEST_FRAME_WIDTH_BQ 640 + + int smallest_factor; /* the smallest factor (log2) where the number of cells does not exceed the limitation */ + int spec_factor; /* the factor (log2) which satisfies the specification */ + + /* Currently supported maximum width and height are 5120(=80*64) and 3840(=60*64). */ + assert(ISP_BQ_GRID_WIDTH(width, MAX_SPEC_DECI_FACT_LOG2) <= SH_CSS_MAX_BQ_GRID_WIDTH); + assert(ISP_BQ_GRID_HEIGHT(height, MAX_SPEC_DECI_FACT_LOG2) <= SH_CSS_MAX_BQ_GRID_HEIGHT); + + /* Compute the smallest factor. */ + smallest_factor = MAX_SPEC_DECI_FACT_LOG2; + while (ISP_BQ_GRID_WIDTH(width, smallest_factor - 1) <= SH_CSS_MAX_BQ_GRID_WIDTH && + ISP_BQ_GRID_HEIGHT(height, smallest_factor - 1) <= SH_CSS_MAX_BQ_GRID_HEIGHT + && smallest_factor > MIN_SPEC_DECI_FACT_LOG2) + smallest_factor--; + + /* Get the factor by the specification. */ + if (_ISP_BQS(width) >= DECI_FACT_LOG2_5_SMALLEST_FRAME_WIDTH_BQ) + spec_factor = 5; + else if (_ISP_BQS(width) >= DECI_FACT_LOG2_4_SMALLEST_FRAME_WIDTH_BQ) + spec_factor = 4; + else + spec_factor = 3; + + /* If smallest_factor is smaller than or equal to spec_factor, choose spec_factor to follow the specification. + If smallest_factor is larger than spec_factor, choose smallest_factor. + + ex. width=2560, height=1920 + smallest_factor=4, spec_factor=5 + smallest_factor < spec_factor -> return spec_factor + + ex. width=300, height=3000 + smallest_factor=5, spec_factor=3 + smallest_factor > spec_factor -> return smallest_factor + */ + return max(smallest_factor, spec_factor); + +#undef MAX_SPEC_DECI_FACT_LOG2 +#undef MIN_SPEC_DECI_FACT_LOG2 +#undef DECI_FACT_LOG2_5_SMALLEST_FRAME_WIDTH_BQ +#undef DECI_FACT_LOG2_4_SMALLEST_FRAME_WIDTH_BQ +} + +static int +binary_in_frame_padded_width(int in_frame_width, + int isp_internal_width, + int dvs_env_width, + int stream_config_left_padding, + int left_cropping, + bool need_scaling) +{ + int rval; + int nr_of_left_paddings; /* number of paddings pixels on the left of an image line */ + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + /* the output image line of Input System 2401 does not have the left paddings */ + nr_of_left_paddings = 0; +#else + /* in other cases, the left padding pixels are always 128 */ + nr_of_left_paddings = 2*ISP_VEC_NELEMS; +#endif + if (need_scaling) { + /* In SDV use-case, we need to match left-padding of + * primary and the video binary. */ + if (stream_config_left_padding != -1) { + /* Different than before, we do left&right padding. */ + rval = + CEIL_MUL(in_frame_width + nr_of_left_paddings, + 2*ISP_VEC_NELEMS); + } else { + /* Different than before, we do left&right padding. */ + in_frame_width += dvs_env_width; + rval = + CEIL_MUL(in_frame_width + + (left_cropping ? nr_of_left_paddings : 0), + 2*ISP_VEC_NELEMS); + } + } else { + rval = isp_internal_width; + } + + return rval; +} + + +enum ia_css_err +ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, + bool online, + bool two_ppc, + enum atomisp_input_format stream_format, + const struct ia_css_frame_info *in_info, /* can be NULL */ + const struct ia_css_frame_info *bds_out_info, /* can be NULL */ + const struct ia_css_frame_info *out_info[], /* can be NULL */ + const struct ia_css_frame_info *vf_info, /* can be NULL */ + struct ia_css_binary *binary, + struct ia_css_resolution *dvs_env, + int stream_config_left_padding, + bool accelerator) +{ + const struct ia_css_binary_info *info = &xinfo->sp; + unsigned int dvs_env_width = 0, + dvs_env_height = 0, + vf_log_ds = 0, + s3a_log_deci = 0, + bits_per_pixel = 0, + /* Resolution at SC/3A/DIS kernel. */ + sc_3a_dis_width = 0, + /* Resolution at SC/3A/DIS kernel. */ + sc_3a_dis_padded_width = 0, + /* Resolution at SC/3A/DIS kernel. */ + sc_3a_dis_height = 0, + isp_internal_width = 0, + isp_internal_height = 0, + s3a_isp_width = 0; + + bool need_scaling = false; + struct ia_css_resolution binary_dvs_env, internal_res; + enum ia_css_err err; + unsigned int i; + const struct ia_css_frame_info *bin_out_info = NULL; + + assert(info != NULL); + assert(binary != NULL); + + binary->info = xinfo; + if (!accelerator) { + /* binary->css_params has been filled by accelerator itself. */ + err = ia_css_isp_param_allocate_isp_parameters( + &binary->mem_params, &binary->css_params, + &info->mem_initializers); + if (err != IA_CSS_SUCCESS) { + return err; + } + } + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + if (out_info[i] && (out_info[i]->res.width != 0)) { + bin_out_info = out_info[i]; + break; + } + } + if (in_info != NULL && bin_out_info != NULL) { + need_scaling = (in_info->res.width != bin_out_info->res.width) || + (in_info->res.height != bin_out_info->res.height); + } + + + /* binary_dvs_env has to be equal or larger than SH_CSS_MIN_DVS_ENVELOPE */ + binary_dvs_env.width = 0; + binary_dvs_env.height = 0; + ia_css_binary_dvs_env(info, dvs_env, &binary_dvs_env); + dvs_env_width = binary_dvs_env.width; + dvs_env_height = binary_dvs_env.height; + binary->dvs_envelope.width = dvs_env_width; + binary->dvs_envelope.height = dvs_env_height; + + /* internal resolution calculation */ + internal_res.width = 0; + internal_res.height = 0; + ia_css_binary_internal_res(in_info, bds_out_info, bin_out_info, dvs_env, + info, &internal_res); + isp_internal_width = internal_res.width; + isp_internal_height = internal_res.height; + + /* internal frame info */ + if (bin_out_info != NULL) /* { */ + binary->internal_frame_info.format = bin_out_info->format; + /* } */ + binary->internal_frame_info.res.width = isp_internal_width; + binary->internal_frame_info.padded_width = CEIL_MUL(isp_internal_width, 2*ISP_VEC_NELEMS); + binary->internal_frame_info.res.height = isp_internal_height; + binary->internal_frame_info.raw_bit_depth = bits_per_pixel; + + if (in_info != NULL) { + binary->effective_in_frame_res.width = in_info->res.width; + binary->effective_in_frame_res.height = in_info->res.height; + + bits_per_pixel = in_info->raw_bit_depth; + + /* input info */ + binary->in_frame_info.res.width = in_info->res.width + info->pipeline.left_cropping; + binary->in_frame_info.res.height = in_info->res.height + info->pipeline.top_cropping; + + binary->in_frame_info.res.width += dvs_env_width; + binary->in_frame_info.res.height += dvs_env_height; + + binary->in_frame_info.padded_width = + binary_in_frame_padded_width(in_info->res.width, + isp_internal_width, + dvs_env_width, + stream_config_left_padding, + info->pipeline.left_cropping, + need_scaling); + + binary->in_frame_info.format = in_info->format; + binary->in_frame_info.raw_bayer_order = in_info->raw_bayer_order; + binary->in_frame_info.crop_info = in_info->crop_info; + } + + if (online) { + bits_per_pixel = ia_css_util_input_format_bpp( + stream_format, two_ppc); + } + binary->in_frame_info.raw_bit_depth = bits_per_pixel; + + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + if (out_info[i] != NULL) { + binary->out_frame_info[i].res.width = out_info[i]->res.width; + binary->out_frame_info[i].res.height = out_info[i]->res.height; + binary->out_frame_info[i].padded_width = out_info[i]->padded_width; + if (info->pipeline.mode == IA_CSS_BINARY_MODE_COPY) { + binary->out_frame_info[i].raw_bit_depth = bits_per_pixel; + } else { + /* Only relevant for RAW format. + * At the moment, all outputs are raw, 16 bit per pixel, except for copy. + * To do this cleanly, the binary should specify in its info + * the bit depth per output channel. + */ + binary->out_frame_info[i].raw_bit_depth = 16; + } + binary->out_frame_info[i].format = out_info[i]->format; + } + } + + if (vf_info && (vf_info->res.width != 0)) { + err = ia_css_vf_configure(binary, bin_out_info, (struct ia_css_frame_info *)vf_info, &vf_log_ds); + if (err != IA_CSS_SUCCESS) { + if (!accelerator) { + ia_css_isp_param_destroy_isp_parameters( + &binary->mem_params, + &binary->css_params); + } + return err; + } + } + binary->vf_downscale_log2 = vf_log_ds; + + binary->online = online; + binary->input_format = stream_format; + + /* viewfinder output info */ + if ((vf_info != NULL) && (vf_info->res.width != 0)) { + unsigned int vf_out_vecs, vf_out_width, vf_out_height; + binary->vf_frame_info.format = vf_info->format; + if (bin_out_info == NULL) + return IA_CSS_ERR_INTERNAL_ERROR; + vf_out_vecs = __ISP_VF_OUTPUT_WIDTH_VECS(bin_out_info->padded_width, + vf_log_ds); + vf_out_width = _ISP_VF_OUTPUT_WIDTH(vf_out_vecs); + vf_out_height = _ISP_VF_OUTPUT_HEIGHT(bin_out_info->res.height, + vf_log_ds); + + /* For preview mode, output pin is used instead of vf. */ + if (info->pipeline.mode == IA_CSS_BINARY_MODE_PREVIEW) { + binary->out_frame_info[0].res.width = + (bin_out_info->res.width >> vf_log_ds); + binary->out_frame_info[0].padded_width = vf_out_width; + binary->out_frame_info[0].res.height = vf_out_height; + + binary->vf_frame_info.res.width = 0; + binary->vf_frame_info.padded_width = 0; + binary->vf_frame_info.res.height = 0; + } else { + /* we also store the raw downscaled width. This is + * used for digital zoom in preview to zoom only on + * the width that we actually want to keep, not on + * the aligned width. */ + binary->vf_frame_info.res.width = + (bin_out_info->res.width >> vf_log_ds); + binary->vf_frame_info.padded_width = vf_out_width; + binary->vf_frame_info.res.height = vf_out_height; + } + } else { + binary->vf_frame_info.res.width = 0; + binary->vf_frame_info.padded_width = 0; + binary->vf_frame_info.res.height = 0; + } + + if (info->enable.ca_gdc) { + binary->morph_tbl_width = + _ISP_MORPH_TABLE_WIDTH(isp_internal_width); + binary->morph_tbl_aligned_width = + _ISP_MORPH_TABLE_ALIGNED_WIDTH(isp_internal_width); + binary->morph_tbl_height = + _ISP_MORPH_TABLE_HEIGHT(isp_internal_height); + } else { + binary->morph_tbl_width = 0; + binary->morph_tbl_aligned_width = 0; + binary->morph_tbl_height = 0; + } + + sc_3a_dis_width = binary->in_frame_info.res.width; + sc_3a_dis_padded_width = binary->in_frame_info.padded_width; + sc_3a_dis_height = binary->in_frame_info.res.height; + if (bds_out_info != NULL && in_info != NULL && + bds_out_info->res.width != in_info->res.width) { + /* TODO: Next, "internal_frame_info" should be derived from + * bds_out. So this part will change once it is in place! */ + sc_3a_dis_width = bds_out_info->res.width + info->pipeline.left_cropping; + sc_3a_dis_padded_width = isp_internal_width; + sc_3a_dis_height = isp_internal_height; + } + + + s3a_isp_width = _ISP_S3A_ELEMS_ISP_WIDTH(sc_3a_dis_padded_width, + info->pipeline.left_cropping); + if (info->s3a.fixed_s3a_deci_log) { + s3a_log_deci = info->s3a.fixed_s3a_deci_log; + } else { + s3a_log_deci = binary_grid_deci_factor_log2(s3a_isp_width, + sc_3a_dis_height); + } + binary->deci_factor_log2 = s3a_log_deci; + + if (info->enable.s3a) { + binary->s3atbl_width = + _ISP_S3ATBL_WIDTH(sc_3a_dis_width, + s3a_log_deci); + binary->s3atbl_height = + _ISP_S3ATBL_HEIGHT(sc_3a_dis_height, + s3a_log_deci); + binary->s3atbl_isp_width = + _ISP_S3ATBL_ISP_WIDTH(s3a_isp_width, + s3a_log_deci); + binary->s3atbl_isp_height = + _ISP_S3ATBL_ISP_HEIGHT(sc_3a_dis_height, + s3a_log_deci); + } else { + binary->s3atbl_width = 0; + binary->s3atbl_height = 0; + binary->s3atbl_isp_width = 0; + binary->s3atbl_isp_height = 0; + } + + if (info->enable.sc) { + binary->sctbl_width_per_color = +#ifndef ISP2401 + _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, + s3a_log_deci); +#else + _ISP_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); +#endif + binary->sctbl_aligned_width_per_color = + SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; + binary->sctbl_height = +#ifndef ISP2401 + _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); +#else + _ISP_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); + binary->sctbl_legacy_width_per_color = + _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); + binary->sctbl_legacy_height = + _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); +#endif + } else { + binary->sctbl_width_per_color = 0; + binary->sctbl_aligned_width_per_color = 0; + binary->sctbl_height = 0; +#ifdef ISP2401 + binary->sctbl_legacy_width_per_color = 0; + binary->sctbl_legacy_height = 0; +#endif + } + ia_css_sdis_init_info(&binary->dis, + sc_3a_dis_width, + sc_3a_dis_padded_width, + sc_3a_dis_height, + info->pipeline.isp_pipe_version, + info->enable.dis); + if (info->pipeline.left_cropping) + binary->left_padding = 2 * ISP_VEC_NELEMS - info->pipeline.left_cropping; + else + binary->left_padding = 0; + + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_binary_find(struct ia_css_binary_descr *descr, + struct ia_css_binary *binary) +{ + int mode; + bool online; + bool two_ppc; + enum atomisp_input_format stream_format; + const struct ia_css_frame_info *req_in_info, + *req_bds_out_info, + *req_out_info[IA_CSS_BINARY_MAX_OUTPUT_PORTS], + *req_bin_out_info = NULL, + *req_vf_info; + + struct ia_css_binary_xinfo *xcandidate; +#ifndef ISP2401 + bool need_ds, need_dz, need_dvs, need_xnr, need_dpc; +#else + bool need_ds, need_dz, need_dvs, need_xnr, need_dpc, need_tnr; +#endif + bool striped; + bool enable_yuv_ds; + bool enable_high_speed; + bool enable_dvs_6axis; + bool enable_reduced_pipe; + bool enable_capture_pp_bli; +#ifdef ISP2401 + bool enable_luma_only; +#endif + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + bool continuous; + unsigned int isp_pipe_version; + struct ia_css_resolution dvs_env, internal_res; + unsigned int i; + + assert(descr != NULL); + /* MW: used after an error check, may accept NULL, but doubtfull */ + assert(binary != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() enter: descr=%p, (mode=%d), binary=%p\n", + descr, descr->mode, + binary); + + mode = descr->mode; + online = descr->online; + two_ppc = descr->two_ppc; + stream_format = descr->stream_format; + req_in_info = descr->in_info; + req_bds_out_info = descr->bds_out_info; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + req_out_info[i] = descr->out_info[i]; + if (req_out_info[i] && (req_out_info[i]->res.width != 0)) + req_bin_out_info = req_out_info[i]; + } + if (req_bin_out_info == NULL) + return IA_CSS_ERR_INTERNAL_ERROR; +#ifndef ISP2401 + req_vf_info = descr->vf_info; +#else + + if ((descr->vf_info != NULL) && (descr->vf_info->res.width == 0)) + /* width==0 means that there is no vf pin (e.g. in SkyCam preview case) */ + req_vf_info = NULL; + else + req_vf_info = descr->vf_info; +#endif + + need_xnr = descr->enable_xnr; + need_ds = descr->enable_fractional_ds; + need_dz = false; + need_dvs = false; + need_dpc = descr->enable_dpc; +#ifdef ISP2401 + need_tnr = descr->enable_tnr; +#endif + enable_yuv_ds = descr->enable_yuv_ds; + enable_high_speed = descr->enable_high_speed; + enable_dvs_6axis = descr->enable_dvs_6axis; + enable_reduced_pipe = descr->enable_reduced_pipe; + enable_capture_pp_bli = descr->enable_capture_pp_bli; +#ifdef ISP2401 + enable_luma_only = descr->enable_luma_only; +#endif + continuous = descr->continuous; + striped = descr->striped; + isp_pipe_version = descr->isp_pipe_version; + + dvs_env.width = 0; + dvs_env.height = 0; + internal_res.width = 0; + internal_res.height = 0; + + + if (mode == IA_CSS_BINARY_MODE_VIDEO) { + dvs_env = descr->dvs_env; + need_dz = descr->enable_dz; + /* Video is the only mode that has a nodz variant. */ + need_dvs = dvs_env.width || dvs_env.height; + } + + /* print a map of the binary file */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "BINARY INFO:\n"); + for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) { + xcandidate = binary_infos[i]; + if (xcandidate) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%d:\n", i); + while (xcandidate) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " Name:%s Type:%d Cont:%d\n", + xcandidate->blob->name, xcandidate->type, + xcandidate->sp.enable.continuous); + xcandidate = xcandidate->next; + } + } + } + + /* printf("sh_css_binary_find: pipe version %d\n", isp_pipe_version); */ + for (xcandidate = binary_infos[mode]; xcandidate; + xcandidate = xcandidate->next) { + struct ia_css_binary_info *candidate = &xcandidate->sp; + /* printf("sh_css_binary_find: evaluating candidate: + * %d\n",candidate->id); */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() candidate = %p, mode = %d ID = %d\n", + candidate, candidate->pipeline.mode, candidate->id); + + /* + * MW: Only a limited set of jointly configured binaries can + * be used in a continuous preview/video mode unless it is + * the copy mode and runs on SP. + */ + if (!candidate->enable.continuous && + continuous && (mode != IA_CSS_BINARY_MODE_COPY)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && %d && (%d != %d)\n", + __LINE__, candidate->enable.continuous, + continuous, mode, + IA_CSS_BINARY_MODE_COPY); + continue; + } + if (striped && candidate->iterator.num_stripes == 1) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: binary is not striped\n", + __LINE__); + continue; + } + + if (candidate->pipeline.isp_pipe_version != isp_pipe_version && + (mode != IA_CSS_BINARY_MODE_COPY) && + (mode != IA_CSS_BINARY_MODE_CAPTURE_PP) && + (mode != IA_CSS_BINARY_MODE_VF_PP)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d != %d)\n", + __LINE__, + candidate->pipeline.isp_pipe_version, isp_pipe_version); + continue; + } + if (!candidate->enable.reduced_pipe && enable_reduced_pipe) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + candidate->enable.reduced_pipe, + enable_reduced_pipe); + continue; + } + if (!candidate->enable.dvs_6axis && enable_dvs_6axis) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + candidate->enable.dvs_6axis, + enable_dvs_6axis); + continue; + } + if (candidate->enable.high_speed && !enable_high_speed) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: %d && !%d\n", + __LINE__, + candidate->enable.high_speed, + enable_high_speed); + continue; + } + if (!candidate->enable.xnr && need_xnr) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: %d && !%d\n", + __LINE__, + candidate->enable.xnr, + need_xnr); + continue; + } + if (!(candidate->enable.ds & 2) && enable_yuv_ds) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + ((candidate->enable.ds & 2) != 0), + enable_yuv_ds); + continue; + } + if ((candidate->enable.ds & 2) && !enable_yuv_ds) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: %d && !%d\n", + __LINE__, + ((candidate->enable.ds & 2) != 0), + enable_yuv_ds); + continue; + } + + if (mode == IA_CSS_BINARY_MODE_VIDEO && + candidate->enable.ds && need_ds) + need_dz = false; + + /* when we require vf output, we need to have vf_veceven */ + if ((req_vf_info != NULL) && !(candidate->enable.vf_veceven || + /* or variable vf vec even */ + candidate->vf_dec.is_variable || + /* or more than one output pin. */ + xcandidate->num_output_pins > 1)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%p != NULL) && !(%d || %d || (%d >%d))\n", + __LINE__, req_vf_info, + candidate->enable.vf_veceven, + candidate->vf_dec.is_variable, + xcandidate->num_output_pins, 1); + continue; + } + if (!candidate->enable.dvs_envelope && need_dvs) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + candidate->enable.dvs_envelope, (int)need_dvs); + continue; + } + /* internal_res check considers input, output, and dvs envelope sizes */ + ia_css_binary_internal_res(req_in_info, req_bds_out_info, + req_bin_out_info, &dvs_env, candidate, &internal_res); + if (internal_res.width > candidate->internal.max_width) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d > %d)\n", + __LINE__, internal_res.width, + candidate->internal.max_width); + continue; + } + if (internal_res.height > candidate->internal.max_height) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d > %d)\n", + __LINE__, internal_res.height, + candidate->internal.max_height); + continue; + } + if (!candidate->enable.ds && need_ds && !(xcandidate->num_output_pins > 1)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, candidate->enable.ds, (int)need_ds); + continue; + } + if (!candidate->enable.uds && !candidate->enable.dvs_6axis && need_dz) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && !%d && %d\n", + __LINE__, candidate->enable.uds, + candidate->enable.dvs_6axis, (int)need_dz); + continue; + } + if (online && candidate->input.source == IA_CSS_BINARY_INPUT_MEMORY) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: %d && (%d == %d)\n", + __LINE__, online, candidate->input.source, + IA_CSS_BINARY_INPUT_MEMORY); + continue; + } + if (!online && candidate->input.source == IA_CSS_BINARY_INPUT_SENSOR) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && (%d == %d)\n", + __LINE__, online, candidate->input.source, + IA_CSS_BINARY_INPUT_SENSOR); + continue; + } + if (req_bin_out_info->res.width < candidate->output.min_width || + req_bin_out_info->res.width > candidate->output.max_width) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d > %d) || (%d < %d)\n", + __LINE__, + req_bin_out_info->padded_width, + candidate->output.min_width, + req_bin_out_info->padded_width, + candidate->output.max_width); + continue; + } + if (xcandidate->num_output_pins > 1 && /* in case we have a second output pin, */ + req_vf_info) { /* and we need vf output. */ + if (req_vf_info->res.width > candidate->output.max_width) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d < %d)\n", + __LINE__, + req_vf_info->res.width, + candidate->output.max_width); + continue; + } + } + if (req_in_info->padded_width > candidate->input.max_width) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d > %d)\n", + __LINE__, req_in_info->padded_width, + candidate->input.max_width); + continue; + } + if (!binary_supports_output_format(xcandidate, req_bin_out_info->format)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d\n", + __LINE__, + binary_supports_output_format(xcandidate, req_bin_out_info->format)); + continue; + } +#ifdef ISP2401 + if (!binary_supports_input_format(xcandidate, descr->stream_format)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d\n", + __LINE__, + binary_supports_input_format(xcandidate, req_in_info->format)); + continue; + } +#endif + if (xcandidate->num_output_pins > 1 && /* in case we have a second output pin, */ + req_vf_info && /* and we need vf output. */ + /* check if the required vf format + is supported. */ + !binary_supports_output_format(xcandidate, req_vf_info->format)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d > %d) && (%p != NULL) && !%d\n", + __LINE__, xcandidate->num_output_pins, 1, + req_vf_info, + binary_supports_output_format(xcandidate, req_vf_info->format)); + continue; + } + + /* Check if vf_veceven supports the requested vf format */ + if (xcandidate->num_output_pins == 1 && + req_vf_info && candidate->enable.vf_veceven && + !binary_supports_vf_format(xcandidate, req_vf_info->format)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d == %d) && (%p != NULL) && %d && !%d\n", + __LINE__, xcandidate->num_output_pins, 1, + req_vf_info, candidate->enable.vf_veceven, + binary_supports_vf_format(xcandidate, req_vf_info->format)); + continue; + } + + /* Check if vf_veceven supports the requested vf width */ + if (xcandidate->num_output_pins == 1 && + req_vf_info && candidate->enable.vf_veceven) { /* and we need vf output. */ + if (req_vf_info->res.width > candidate->output.max_width) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: (%d < %d)\n", + __LINE__, + req_vf_info->res.width, + candidate->output.max_width); + continue; + } + } + + if (!supports_bds_factor(candidate->bds.supported_bds_factors, + descr->required_bds_factor)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", + __LINE__, candidate->bds.supported_bds_factors, + descr->required_bds_factor); + continue; + } + + if (!candidate->enable.dpc && need_dpc) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", + __LINE__, candidate->enable.dpc, + descr->enable_dpc); + continue; + } + + if (candidate->uds.use_bci && enable_capture_pp_bli) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", + __LINE__, candidate->uds.use_bci, + descr->enable_capture_pp_bli); + continue; + } + +#ifdef ISP2401 + if (candidate->enable.luma_only != enable_luma_only) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: %d != %d\n", + __LINE__, candidate->enable.luma_only, + descr->enable_luma_only); + continue; + } + + if(!candidate->enable.tnr && need_tnr) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, candidate->enable.tnr, + descr->enable_tnr); + continue; + } + +#endif + /* reconfigure any variable properties of the binary */ + err = ia_css_binary_fill_info(xcandidate, online, two_ppc, + stream_format, req_in_info, + req_bds_out_info, + req_out_info, req_vf_info, + binary, &dvs_env, + descr->stream_config_left_padding, + false); + + if (err != IA_CSS_SUCCESS) + break; + binary_init_metrics(&binary->metrics, &binary->info->sp); + break; + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() selected = %p, mode = %d ID = %d\n", + xcandidate, xcandidate ? xcandidate->sp.pipeline.mode : 0, xcandidate ? xcandidate->sp.id : 0); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_binary_find() leave: return_err=%d\n", err); + + return err; +} + +unsigned +ia_css_binary_max_vf_width(void) +{ + /* This is (should be) true for IPU1 and IPU2 */ + /* For IPU3 (SkyCam) this pointer is guarenteed to be NULL simply because such a binary does not exist */ + if (binary_infos[IA_CSS_BINARY_MODE_VF_PP]) + return binary_infos[IA_CSS_BINARY_MODE_VF_PP]->sp.output.max_width; + return 0; +} + +void +ia_css_binary_destroy_isp_parameters(struct ia_css_binary *binary) +{ + if (binary) { + ia_css_isp_param_destroy_isp_parameters(&binary->mem_params, + &binary->css_params); + } +} + +void +ia_css_binary_get_isp_binaries(struct ia_css_binary_xinfo **binaries, + uint32_t *num_isp_binaries) +{ + assert(binaries != NULL); + + if (num_isp_binaries) + *num_isp_binaries = 0; + + *binaries = all_binaries; + if (all_binaries && num_isp_binaries) { + /* -1 to account for sp binary which is not stored in all_binaries */ + if (sh_css_num_binaries > 0) + *num_isp_binaries = sh_css_num_binaries - 1; + } +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h new file mode 100644 index 0000000000000..034ec15ec4a15 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h @@ -0,0 +1,197 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_BUFQ_H +#define _IA_CSS_BUFQ_H + +#include +#include "ia_css_bufq_comm.h" +#include "ia_css_buffer.h" +#include "ia_css_err.h" +#define BUFQ_EVENT_SIZE 4 + + +/** + * @brief Query the internal frame ID. + * + * @param[in] key The query key. + * @param[out] val The query value. + * + * @return + * true, if the query succeeds; + * false, if the query fails. + */ +bool ia_css_query_internal_queue_id( + enum ia_css_buffer_type buf_type, + unsigned int thread_id, + enum sh_css_queue_id *val + ); + + +/** + * @brief Map buffer type to a internal queue id. + * + * @param[in] thread id Thread in which the buffer type has to be mapped or unmapped + * @param[in] buf_type buffer type. + * @param[in] map boolean flag to specify map or unmap + * @return none + */ +void ia_css_queue_map( + unsigned int thread_id, + enum ia_css_buffer_type buf_type, + bool map + ); + + +/** + * @brief Initilize buffer type to a queue id mapping + * @return none + */ +void ia_css_queue_map_init(void); + + +/** + * @brief initializes bufq module + * It create instances of + * -host to SP buffer queue which is a list with predefined size, + * MxN queues where M is the number threads and N is the number queues per thread + *-SP to host buffer queue , is a list with N queues + *-host to SP event communication queue + * -SP to host event communication queue + * -queue for tagger commands + * @return none + */ +void ia_css_bufq_init(void); + + +/** +* @brief Enqueues an item into host to SP buffer queue + * + * @param thread_index[in] Thread in which the item to be enqueued + * + * @param queue_id[in] Index of the queue in the specified thread + * @param item[in] Object to enqueue. + * @return IA_CSS_SUCCESS or error code upon error. + * +*/ +enum ia_css_err ia_css_bufq_enqueue_buffer( + int thread_index, + int queue_id, + uint32_t item); + +/** +* @brief Dequeues an item from SP to host buffer queue. + * + * @param queue_id[in] Specifies the index of the queue in the list where + * the item has to be read. + * @paramitem [out] Object to be dequeued into this item. + * @return IA_CSS_SUCCESS or error code upon error. + * +*/ +enum ia_css_err ia_css_bufq_dequeue_buffer( + int queue_id, + uint32_t *item); + +/** +* @brief Enqueue an event item into host to SP communication event queue. + * + * @param[in] evt_id The event ID. + * @param[in] evt_payload_0 The event payload. + * @param[in] evt_payload_1 The event payload. + * @param[in] evt_payload_2 The event payload. + * @return IA_CSS_SUCCESS or error code upon error. + * +*/ +enum ia_css_err ia_css_bufq_enqueue_psys_event( + uint8_t evt_id, + uint8_t evt_payload_0, + uint8_t evt_payload_1, + uint8_t evt_payload_2 + ); + +/** + * @brief Dequeue an item from SP to host communication event queue. + * + * @param item Object to be dequeued into this item. + * @return IA_CSS_SUCCESS or error code upon error. + * +*/ +enum ia_css_err ia_css_bufq_dequeue_psys_event( + uint8_t item[BUFQ_EVENT_SIZE] + ); + +/** + * @brief Enqueue an event item into host to SP EOF event queue. + * + * @param[in] evt_id The event ID. + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err ia_css_bufq_enqueue_isys_event( + uint8_t evt_id); + +/** +* @brief Dequeue an item from SP to host communication EOF event queue. + + * + * @param item Object to be dequeued into this item. + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err ia_css_bufq_dequeue_isys_event( + uint8_t item[BUFQ_EVENT_SIZE]); + +/** +* @brief Enqueue a tagger command item into tagger command queue.. + * + * @param item Object to be enqueue. + * @return IA_CSS_SUCCESS or error code upon error. + * +*/ +enum ia_css_err ia_css_bufq_enqueue_tag_cmd( + uint32_t item); + +/** +* @brief Uninitializes bufq module. + * + * @return IA_CSS_SUCCESS or error code upon error. + * +*/ +enum ia_css_err ia_css_bufq_deinit(void); + +/** +* @brief Dump queue states + * + * @return None + * +*/ +void ia_css_bufq_dump_queue_info(void); + +#endif /* _IA_CSS_BUFQ_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h new file mode 100644 index 0000000000000..bb77080591b90 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h @@ -0,0 +1,66 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_BUFQ_COMM_H +#define _IA_CSS_BUFQ_COMM_H + +#include "system_global.h" + +enum sh_css_queue_id { + SH_CSS_INVALID_QUEUE_ID = -1, + SH_CSS_QUEUE_A_ID = 0, + SH_CSS_QUEUE_B_ID, + SH_CSS_QUEUE_C_ID, + SH_CSS_QUEUE_D_ID, + SH_CSS_QUEUE_E_ID, + SH_CSS_QUEUE_F_ID, + SH_CSS_QUEUE_G_ID, +#if defined(HAS_NO_INPUT_SYSTEM) + /* input frame queue for skycam */ + SH_CSS_QUEUE_H_ID, +#endif +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + SH_CSS_QUEUE_H_ID, /* for metadata */ +#endif + +#if defined(HAS_NO_INPUT_SYSTEM) || defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +#define SH_CSS_MAX_NUM_QUEUES (SH_CSS_QUEUE_H_ID+1) +#else +#define SH_CSS_MAX_NUM_QUEUES (SH_CSS_QUEUE_G_ID+1) +#endif + +}; + +#define SH_CSS_MAX_DYNAMIC_BUFFERS_PER_THREAD SH_CSS_MAX_NUM_QUEUES +/* for now we staticaly assign queue 0 & 1 to parameter sets */ +#define IA_CSS_PARAMETER_SET_QUEUE_ID SH_CSS_QUEUE_A_ID +#define IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID SH_CSS_QUEUE_B_ID + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c new file mode 100644 index 0000000000000..ffbcdd80d9343 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c @@ -0,0 +1,589 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "assert_support.h" /* assert */ +#include "ia_css_buffer.h" +#include "sp.h" +#include "ia_css_bufq.h" /* Bufq API's */ +#include "ia_css_queue.h" /* ia_css_queue_t */ +#include "sw_event_global.h" /* Event IDs.*/ +#include "ia_css_eventq.h" /* ia_css_eventq_recv()*/ +#include "ia_css_debug.h" /* ia_css_debug_dtrace*/ +#include "sh_css_internal.h" /* sh_css_queue_type */ +#include "sp_local.h" /* sp_address_of */ +#include "ia_css_util.h" /* ia_css_convert_errno()*/ +#include "sh_css_firmware.h" /* sh_css_sp_fw*/ + +#define BUFQ_DUMP_FILE_NAME_PREFIX_SIZE 256 + +static char prefix[BUFQ_DUMP_FILE_NAME_PREFIX_SIZE] = {0}; + +/*********************************************************/ +/* Global Queue objects used by CSS */ +/*********************************************************/ + +#ifndef ISP2401 + +struct sh_css_queues { + /* Host2SP buffer queue */ + ia_css_queue_t host2sp_buffer_queue_handles + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; + /* SP2Host buffer queue */ + ia_css_queue_t sp2host_buffer_queue_handles + [SH_CSS_MAX_NUM_QUEUES]; + + /* Host2SP event queue */ + ia_css_queue_t host2sp_psys_event_queue_handle; + + /* SP2Host event queue */ + ia_css_queue_t sp2host_psys_event_queue_handle; + +#if !defined(HAS_NO_INPUT_SYSTEM) + /* Host2SP ISYS event queue */ + ia_css_queue_t host2sp_isys_event_queue_handle; + + /* SP2Host ISYS event queue */ + ia_css_queue_t sp2host_isys_event_queue_handle; +#endif + /* Tagger command queue */ + ia_css_queue_t host2sp_tag_cmd_queue_handle; +}; + +#else + +struct sh_css_queues { + /* Host2SP buffer queue */ + ia_css_queue_t host2sp_buffer_queue_handles + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; + /* SP2Host buffer queue */ + ia_css_queue_t sp2host_buffer_queue_handles + [SH_CSS_MAX_NUM_QUEUES]; + + /* Host2SP event queue */ + ia_css_queue_t host2sp_psys_event_queue_handle; + + /* SP2Host event queue */ + ia_css_queue_t sp2host_psys_event_queue_handle; + +#if !defined(HAS_NO_INPUT_SYSTEM) + /* Host2SP ISYS event queue */ + ia_css_queue_t host2sp_isys_event_queue_handle; + + /* SP2Host ISYS event queue */ + ia_css_queue_t sp2host_isys_event_queue_handle; + + /* Tagger command queue */ + ia_css_queue_t host2sp_tag_cmd_queue_handle; +#endif +}; + +#endif + +/******************************************************* +*** Static variables +********************************************************/ +static struct sh_css_queues css_queues; + +static int buffer_type_to_queue_id_map[SH_CSS_MAX_SP_THREADS][IA_CSS_NUM_DYNAMIC_BUFFER_TYPE]; +static bool queue_availability[SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; + +/******************************************************* +*** Static functions +********************************************************/ +static void map_buffer_type_to_queue_id( + unsigned int thread_id, + enum ia_css_buffer_type buf_type + ); +static void unmap_buffer_type_to_queue_id( + unsigned int thread_id, + enum ia_css_buffer_type buf_type + ); + +static ia_css_queue_t *bufq_get_qhandle( + enum sh_css_queue_type type, + enum sh_css_queue_id id, + int thread + ); + +/******************************************************* +*** Public functions +********************************************************/ +void ia_css_queue_map_init(void) +{ + unsigned int i, j; + + for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) { + for (j = 0; j < SH_CSS_MAX_NUM_QUEUES; j++) + queue_availability[i][j] = true; + } + + for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) { + for (j = 0; j < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE; j++) + buffer_type_to_queue_id_map[i][j] = SH_CSS_INVALID_QUEUE_ID; + } +} + +void ia_css_queue_map( + unsigned int thread_id, + enum ia_css_buffer_type buf_type, + bool map) +{ + assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); + assert(thread_id < SH_CSS_MAX_SP_THREADS); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_queue_map() enter: buf_type=%d, thread_id=%d\n", buf_type, thread_id); + + if (map) + map_buffer_type_to_queue_id(thread_id, buf_type); + else + unmap_buffer_type_to_queue_id(thread_id, buf_type); +} + +/* + * @brief Query the internal queue ID. + */ +bool ia_css_query_internal_queue_id( + enum ia_css_buffer_type buf_type, + unsigned int thread_id, + enum sh_css_queue_id *val) +{ + IA_CSS_ENTER("buf_type=%d, thread_id=%d, val = %p", buf_type, thread_id, val); + + if ((val == NULL) || (thread_id >= SH_CSS_MAX_SP_THREADS) || (buf_type >= IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)) { + IA_CSS_LEAVE("return_val = false"); + return false; + } + + *val = buffer_type_to_queue_id_map[thread_id][buf_type]; + if ((*val == SH_CSS_INVALID_QUEUE_ID) || (*val >= SH_CSS_MAX_NUM_QUEUES)) { + IA_CSS_LOG("INVALID queue ID MAP = %d\n", *val); + IA_CSS_LEAVE("return_val = false"); + return false; + } + IA_CSS_LEAVE("return_val = true"); + return true; +} + +/******************************************************* +*** Static functions +********************************************************/ +static void map_buffer_type_to_queue_id( + unsigned int thread_id, + enum ia_css_buffer_type buf_type) +{ + unsigned int i; + + assert(thread_id < SH_CSS_MAX_SP_THREADS); + assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); + assert(buffer_type_to_queue_id_map[thread_id][buf_type] == SH_CSS_INVALID_QUEUE_ID); + + /* queue 0 is reserved for parameters because it doesn't depend on events */ + if (buf_type == IA_CSS_BUFFER_TYPE_PARAMETER_SET) { + assert(queue_availability[thread_id][IA_CSS_PARAMETER_SET_QUEUE_ID]); + queue_availability[thread_id][IA_CSS_PARAMETER_SET_QUEUE_ID] = false; + buffer_type_to_queue_id_map[thread_id][buf_type] = IA_CSS_PARAMETER_SET_QUEUE_ID; + return; + } + + /* queue 1 is reserved for per frame parameters because it doesn't depend on events */ + if (buf_type == IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET) { + assert(queue_availability[thread_id][IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID]); + queue_availability[thread_id][IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID] = false; + buffer_type_to_queue_id_map[thread_id][buf_type] = IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID; + return; + } + + for (i = SH_CSS_QUEUE_C_ID; i < SH_CSS_MAX_NUM_QUEUES; i++) { + if (queue_availability[thread_id][i]) { + queue_availability[thread_id][i] = false; + buffer_type_to_queue_id_map[thread_id][buf_type] = i; + break; + } + } + + assert(i != SH_CSS_MAX_NUM_QUEUES); + return; +} + +static void unmap_buffer_type_to_queue_id( + unsigned int thread_id, + enum ia_css_buffer_type buf_type) +{ + int queue_id; + + assert(thread_id < SH_CSS_MAX_SP_THREADS); + assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); + assert(buffer_type_to_queue_id_map[thread_id][buf_type] != SH_CSS_INVALID_QUEUE_ID); + + queue_id = buffer_type_to_queue_id_map[thread_id][buf_type]; + buffer_type_to_queue_id_map[thread_id][buf_type] = SH_CSS_INVALID_QUEUE_ID; + queue_availability[thread_id][queue_id] = true; +} + + +static ia_css_queue_t *bufq_get_qhandle( + enum sh_css_queue_type type, + enum sh_css_queue_id id, + int thread) +{ + ia_css_queue_t *q = NULL; + + switch (type) { + case sh_css_host2sp_buffer_queue: + if ((thread >= SH_CSS_MAX_SP_THREADS) || (thread < 0) || + (id == SH_CSS_INVALID_QUEUE_ID)) + break; + q = &css_queues.host2sp_buffer_queue_handles[thread][id]; + break; + case sh_css_sp2host_buffer_queue: + if (id == SH_CSS_INVALID_QUEUE_ID) + break; + q = &css_queues.sp2host_buffer_queue_handles[id]; + break; + case sh_css_host2sp_psys_event_queue: + q = &css_queues.host2sp_psys_event_queue_handle; + break; + case sh_css_sp2host_psys_event_queue: + q = &css_queues.sp2host_psys_event_queue_handle; + break; +#if !defined(HAS_NO_INPUT_SYSTEM) + case sh_css_host2sp_isys_event_queue: + q = &css_queues.host2sp_isys_event_queue_handle; + break; + case sh_css_sp2host_isys_event_queue: + q = &css_queues.sp2host_isys_event_queue_handle; + break; +#endif + case sh_css_host2sp_tag_cmd_queue: + q = &css_queues.host2sp_tag_cmd_queue_handle; + break; + default: + break; + } + + return q; +} + +/* Local function to initialize a buffer queue. This reduces + * the chances of copy-paste errors or typos. + */ +static inline void +init_bufq(unsigned int desc_offset, + unsigned int elems_offset, + ia_css_queue_t *handle) +{ + const struct ia_css_fw_info *fw; + unsigned int q_base_addr; + ia_css_queue_remote_t remoteq; + + fw = &sh_css_sp_fw; + q_base_addr = fw->info.sp.host_sp_queue; + + /* Setup queue location as SP and proc id as SP0_ID */ + remoteq.location = IA_CSS_QUEUE_LOC_SP; + remoteq.proc_id = SP0_ID; + remoteq.cb_desc_addr = q_base_addr + desc_offset; + remoteq.cb_elems_addr = q_base_addr + elems_offset; + /* Initialize the queue instance and obtain handle */ + ia_css_queue_remote_init(handle, &remoteq); +} + +void ia_css_bufq_init(void) +{ + int i, j; + + IA_CSS_ENTER_PRIVATE(""); + + /* Setup all the local queue descriptors for Host2SP Buffer Queues */ + for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) + for (j = 0; j < SH_CSS_MAX_NUM_QUEUES; j++) { + init_bufq((uint32_t)offsetof(struct host_sp_queues, host2sp_buffer_queues_desc[i][j]), + (uint32_t)offsetof(struct host_sp_queues, host2sp_buffer_queues_elems[i][j]), + &css_queues.host2sp_buffer_queue_handles[i][j]); + } + + /* Setup all the local queue descriptors for SP2Host Buffer Queues */ + for (i = 0; i < SH_CSS_MAX_NUM_QUEUES; i++) { + init_bufq(offsetof(struct host_sp_queues, sp2host_buffer_queues_desc[i]), + offsetof(struct host_sp_queues, sp2host_buffer_queues_elems[i]), + &css_queues.sp2host_buffer_queue_handles[i]); + } + + /* Host2SP event queue*/ + init_bufq((uint32_t)offsetof(struct host_sp_queues, host2sp_psys_event_queue_desc), + (uint32_t)offsetof(struct host_sp_queues, host2sp_psys_event_queue_elems), + &css_queues.host2sp_psys_event_queue_handle); + + /* SP2Host event queue */ + init_bufq((uint32_t)offsetof(struct host_sp_queues, sp2host_psys_event_queue_desc), + (uint32_t)offsetof(struct host_sp_queues, sp2host_psys_event_queue_elems), + &css_queues.sp2host_psys_event_queue_handle); + +#if !defined(HAS_NO_INPUT_SYSTEM) + /* Host2SP ISYS event queue */ + init_bufq((uint32_t)offsetof(struct host_sp_queues, host2sp_isys_event_queue_desc), + (uint32_t)offsetof(struct host_sp_queues, host2sp_isys_event_queue_elems), + &css_queues.host2sp_isys_event_queue_handle); + + /* SP2Host ISYS event queue*/ + init_bufq((uint32_t)offsetof(struct host_sp_queues, sp2host_isys_event_queue_desc), + (uint32_t)offsetof(struct host_sp_queues, sp2host_isys_event_queue_elems), + &css_queues.sp2host_isys_event_queue_handle); + + /* Host2SP tagger command queue */ + init_bufq((uint32_t)offsetof(struct host_sp_queues, host2sp_tag_cmd_queue_desc), + (uint32_t)offsetof(struct host_sp_queues, host2sp_tag_cmd_queue_elems), + &css_queues.host2sp_tag_cmd_queue_handle); +#endif + + IA_CSS_LEAVE_PRIVATE(""); +} + +enum ia_css_err ia_css_bufq_enqueue_buffer( + int thread_index, + int queue_id, + uint32_t item) +{ + enum ia_css_err return_err = IA_CSS_SUCCESS; + ia_css_queue_t *q; + int error; + + IA_CSS_ENTER_PRIVATE("queue_id=%d", queue_id); + if ((thread_index >= SH_CSS_MAX_SP_THREADS) || (thread_index < 0) || + (queue_id == SH_CSS_INVALID_QUEUE_ID)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* Get the queue for communication */ + q = bufq_get_qhandle(sh_css_host2sp_buffer_queue, + queue_id, + thread_index); + if (q != NULL) { + error = ia_css_queue_enqueue(q, item); + return_err = ia_css_convert_errno(error); + } else { + IA_CSS_ERROR("queue is not initialized"); + return_err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + IA_CSS_LEAVE_ERR_PRIVATE(return_err); + return return_err; +} + +enum ia_css_err ia_css_bufq_dequeue_buffer( + int queue_id, + uint32_t *item) +{ + enum ia_css_err return_err; + int error = 0; + ia_css_queue_t *q; + + IA_CSS_ENTER_PRIVATE("queue_id=%d", queue_id); + if ((item == NULL) || + (queue_id <= SH_CSS_INVALID_QUEUE_ID) || + (queue_id >= SH_CSS_MAX_NUM_QUEUES) + ) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + q = bufq_get_qhandle(sh_css_sp2host_buffer_queue, + queue_id, + -1); + if (q != NULL) { + error = ia_css_queue_dequeue(q, item); + return_err = ia_css_convert_errno(error); + } else { + IA_CSS_ERROR("queue is not initialized"); + return_err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + IA_CSS_LEAVE_ERR_PRIVATE(return_err); + return return_err; +} + +enum ia_css_err ia_css_bufq_enqueue_psys_event( + uint8_t evt_id, + uint8_t evt_payload_0, + uint8_t evt_payload_1, + uint8_t evt_payload_2) +{ + enum ia_css_err return_err; + int error = 0; + ia_css_queue_t *q; + + IA_CSS_ENTER_PRIVATE("evt_id=%d", evt_id); + q = bufq_get_qhandle(sh_css_host2sp_psys_event_queue, -1, -1); + if (NULL == q) { + IA_CSS_ERROR("queue is not initialized"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + error = ia_css_eventq_send(q, + evt_id, evt_payload_0, evt_payload_1, evt_payload_2); + + return_err = ia_css_convert_errno(error); + IA_CSS_LEAVE_ERR_PRIVATE(return_err); + return return_err; +} + +enum ia_css_err ia_css_bufq_dequeue_psys_event( + uint8_t item[BUFQ_EVENT_SIZE]) +{ + enum ia_css_err; + int error = 0; + ia_css_queue_t *q; + + /* No ENTER/LEAVE in this function since this is polled + * by some test apps. Enablign logging here floods the log + * files which may cause timeouts. */ + if (item == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + q = bufq_get_qhandle(sh_css_sp2host_psys_event_queue, -1, -1); + if (NULL == q) { + IA_CSS_ERROR("queue is not initialized"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + error = ia_css_eventq_recv(q, item); + + return ia_css_convert_errno(error); + +} + +enum ia_css_err ia_css_bufq_dequeue_isys_event( + uint8_t item[BUFQ_EVENT_SIZE]) +{ +#if !defined(HAS_NO_INPUT_SYSTEM) + enum ia_css_err; + int error = 0; + ia_css_queue_t *q; + + /* No ENTER/LEAVE in this function since this is polled + * by some test apps. Enablign logging here floods the log + * files which may cause timeouts. */ + if (item == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + q = bufq_get_qhandle(sh_css_sp2host_isys_event_queue, -1, -1); + if (q == NULL) { + IA_CSS_ERROR("queue is not initialized"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + error = ia_css_eventq_recv(q, item); + return ia_css_convert_errno(error); +#else + (void)item; + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; +#endif +} + +enum ia_css_err ia_css_bufq_enqueue_isys_event(uint8_t evt_id) +{ +#if !defined(HAS_NO_INPUT_SYSTEM) + enum ia_css_err return_err; + int error = 0; + ia_css_queue_t *q; + + IA_CSS_ENTER_PRIVATE("event_id=%d", evt_id); + q = bufq_get_qhandle(sh_css_host2sp_isys_event_queue, -1, -1); + if (q == NULL) { + IA_CSS_ERROR("queue is not initialized"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + error = ia_css_eventq_send(q, evt_id, 0, 0, 0); + return_err = ia_css_convert_errno(error); + IA_CSS_LEAVE_ERR_PRIVATE(return_err); + return return_err; +#else + (void)evt_id; + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; +#endif +} + +enum ia_css_err ia_css_bufq_enqueue_tag_cmd( + uint32_t item) +{ +#if !defined(HAS_NO_INPUT_SYSTEM) + enum ia_css_err return_err; + int error = 0; + ia_css_queue_t *q; + + IA_CSS_ENTER_PRIVATE("item=%d", item); + q = bufq_get_qhandle(sh_css_host2sp_tag_cmd_queue, -1, -1); + if (NULL == q) { + IA_CSS_ERROR("queue is not initialized"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + error = ia_css_queue_enqueue(q, item); + + return_err = ia_css_convert_errno(error); + IA_CSS_LEAVE_ERR_PRIVATE(return_err); + return return_err; +#else + (void)item; + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; +#endif +} + +enum ia_css_err ia_css_bufq_deinit(void) +{ + return IA_CSS_SUCCESS; +} + +static void bufq_dump_queue_info(const char *prefix, ia_css_queue_t *qhandle) +{ + uint32_t free = 0, used = 0; + assert(prefix != NULL && qhandle != NULL); + ia_css_queue_get_used_space(qhandle, &used); + ia_css_queue_get_free_space(qhandle, &free); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s: used=%u free=%u\n", + prefix, used, free); + +} + +void ia_css_bufq_dump_queue_info(void) +{ + int i, j; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Queue Information:\n"); + + for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) { + for (j = 0; j < SH_CSS_MAX_NUM_QUEUES; j++) { + snprintf(prefix, BUFQ_DUMP_FILE_NAME_PREFIX_SIZE, + "host2sp_buffer_queue[%u][%u]", i, j); + bufq_dump_queue_info(prefix, + &css_queues.host2sp_buffer_queue_handles[i][j]); + } + } + + for (i = 0; i < SH_CSS_MAX_NUM_QUEUES; i++) { + snprintf(prefix, BUFQ_DUMP_FILE_NAME_PREFIX_SIZE, + "sp2host_buffer_queue[%u]", i); + bufq_dump_queue_info(prefix, + &css_queues.sp2host_buffer_queue_handles[i]); + } + bufq_dump_queue_info("host2sp_psys_event", + &css_queues.host2sp_psys_event_queue_handle); + bufq_dump_queue_info("sp2host_psys_event", + &css_queues.sp2host_psys_event_queue_handle); + +#if !defined(HAS_NO_INPUT_SYSTEM) + bufq_dump_queue_info("host2sp_isys_event", + &css_queues.host2sp_isys_event_queue_handle); + bufq_dump_queue_info("sp2host_isys_event", + &css_queues.sp2host_isys_event_queue_handle); + bufq_dump_queue_info("host2sp_tag_cmd", + &css_queues.host2sp_tag_cmd_queue_handle); +#endif +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h new file mode 100644 index 0000000000000..4b28b2a0863a7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h @@ -0,0 +1,509 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _IA_CSS_DEBUG_H_ +#define _IA_CSS_DEBUG_H_ + +/*! \file */ + +#include +#include +#include "ia_css_types.h" +#include "ia_css_binary.h" +#include "ia_css_frame_public.h" +#include "ia_css_pipe_public.h" +#include "ia_css_stream_public.h" +#include "ia_css_metadata.h" +#include "sh_css_internal.h" +#ifdef ISP2401 +#if defined(IS_ISP_2500_SYSTEM) +#include "ia_css_pipe.h" +#endif +#endif + +/* available levels */ +/*! Level for tracing errors */ +#define IA_CSS_DEBUG_ERROR 1 +/*! Level for tracing warnings */ +#define IA_CSS_DEBUG_WARNING 3 +/*! Level for tracing debug messages */ +#define IA_CSS_DEBUG_VERBOSE 5 +/*! Level for tracing trace messages a.o. ia_css public function calls */ +#define IA_CSS_DEBUG_TRACE 6 +/*! Level for tracing trace messages a.o. ia_css private function calls */ +#define IA_CSS_DEBUG_TRACE_PRIVATE 7 +/*! Level for tracing parameter messages e.g. in and out params of functions */ +#define IA_CSS_DEBUG_PARAM 8 +/*! Level for tracing info messages */ +#define IA_CSS_DEBUG_INFO 9 +/* Global variable which controls the verbosity levels of the debug tracing */ +extern unsigned int ia_css_debug_trace_level; + +/*! @brief Enum defining the different isp parameters to dump. + * Values can be combined to dump a combination of sets. + */ +enum ia_css_debug_enable_param_dump { + IA_CSS_DEBUG_DUMP_FPN = 1 << 0, /** FPN table */ + IA_CSS_DEBUG_DUMP_OB = 1 << 1, /** OB table */ + IA_CSS_DEBUG_DUMP_SC = 1 << 2, /** Shading table */ + IA_CSS_DEBUG_DUMP_WB = 1 << 3, /** White balance */ + IA_CSS_DEBUG_DUMP_DP = 1 << 4, /** Defect Pixel */ + IA_CSS_DEBUG_DUMP_BNR = 1 << 5, /** Bayer Noise Reductions */ + IA_CSS_DEBUG_DUMP_S3A = 1 << 6, /** 3A Statistics */ + IA_CSS_DEBUG_DUMP_DE = 1 << 7, /** De Mosaicing */ + IA_CSS_DEBUG_DUMP_YNR = 1 << 8, /** Luma Noise Reduction */ + IA_CSS_DEBUG_DUMP_CSC = 1 << 9, /** Color Space Conversion */ + IA_CSS_DEBUG_DUMP_GC = 1 << 10, /** Gamma Correction */ + IA_CSS_DEBUG_DUMP_TNR = 1 << 11, /** Temporal Noise Reduction */ + IA_CSS_DEBUG_DUMP_ANR = 1 << 12, /** Advanced Noise Reduction */ + IA_CSS_DEBUG_DUMP_CE = 1 << 13, /** Chroma Enhancement */ + IA_CSS_DEBUG_DUMP_ALL = 1 << 14 /** Dump all device parameters */ +}; + +#define IA_CSS_ERROR(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, \ + "%s() %d: error: " fmt "\n", __func__, __LINE__, ##__VA_ARGS__) + +#define IA_CSS_WARNING(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_WARNING, \ + "%s() %d: warning: " fmt "\n", __func__, __LINE__, ##__VA_ARGS__) + +/* Logging macros for public functions (API functions) */ +#define IA_CSS_ENTER(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, \ + "%s(): enter: " fmt "\n", __func__, ##__VA_ARGS__) + +/* Use this macro for small functions that do not call other functions. */ +#define IA_CSS_ENTER_LEAVE(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, \ + "%s(): enter: leave: " fmt "\n", __func__, ##__VA_ARGS__) + +#define IA_CSS_LEAVE(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, \ + "%s(): leave: " fmt "\n", __func__, ##__VA_ARGS__) + +/* Shorthand for returning an enum ia_css_err return value */ +#define IA_CSS_LEAVE_ERR(__err) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, \ + "%s() %d: leave: return_err=%d\n", __func__, __LINE__, __err) + +/* Use this macro for logging other than enter/leave. + * Note that this macro always uses the PRIVATE logging level. + */ +#define IA_CSS_LOG(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, \ + "%s(): " fmt "\n", __func__, ##__VA_ARGS__) + +/* Logging macros for non-API functions. These have a lower trace level */ +#define IA_CSS_ENTER_PRIVATE(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, \ + "%s(): enter: " fmt "\n", __func__, ##__VA_ARGS__) + +#define IA_CSS_LEAVE_PRIVATE(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, \ + "%s(): leave: " fmt "\n", __func__, ##__VA_ARGS__) + +/* Shorthand for returning an enum ia_css_err return value */ +#define IA_CSS_LEAVE_ERR_PRIVATE(__err) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, \ + "%s() %d: leave: return_err=%d\n", __func__, __LINE__, __err) + +/* Use this macro for small functions that do not call other functions. */ +#define IA_CSS_ENTER_LEAVE_PRIVATE(fmt, ...) \ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, \ + "%s(): enter: leave: " fmt "\n", __func__, ##__VA_ARGS__) + +/*! @brief Function for tracing to the provided printf function in the + * environment. + * @param[in] level Level of the message. + * @param[in] fmt printf like format string + * @param[in] args arguments for the format string + */ +static inline void +ia_css_debug_vdtrace(unsigned int level, const char *fmt, va_list args) +{ + if (ia_css_debug_trace_level >= level) + sh_css_vprint(fmt, args); +} + +__printf(2, 3) +extern void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...); + +/*! @brief Dump sp thread's stack contents + * SP thread's stack contents are set to 0xcafecafe. This function dumps the + * stack to inspect if the stack's boundaries are compromised. + * @return None + */ +void ia_css_debug_dump_sp_stack_info(void); + +/*! @brief Function to set the global dtrace verbosity level. + * @param[in] trace_level Maximum level of the messages to be traced. + * @return None + */ +void ia_css_debug_set_dtrace_level( + const unsigned int trace_level); + +/*! @brief Function to get the global dtrace verbosity level. + * @return global dtrace verbosity level + */ +unsigned int ia_css_debug_get_dtrace_level(void); + +/*! @brief Dump input formatter state. + * Dumps the input formatter state to tracing output. + * @return None + */ +void ia_css_debug_dump_if_state(void); + +/*! @brief Dump isp hardware state. + * Dumps the isp hardware state to tracing output. + * @return None + */ +void ia_css_debug_dump_isp_state(void); + +/*! @brief Dump sp hardware state. + * Dumps the sp hardware state to tracing output. + * @return None + */ +void ia_css_debug_dump_sp_state(void); + +#ifdef ISP2401 +/*! @brief Dump GAC hardware state. + * Dumps the GAC ACB hardware registers. may be useful for + * detecting a GAC which got hang. + * @return None + */ +void ia_css_debug_dump_gac_state(void); + +#endif +/*! @brief Dump dma controller state. + * Dumps the dma controller state to tracing output. + * @return None + */ +void ia_css_debug_dump_dma_state(void); + +/*! @brief Dump internal sp software state. + * Dumps the sp software state to tracing output. + * @return None + */ +void ia_css_debug_dump_sp_sw_debug_info(void); + +/*! @brief Dump all related hardware state to the trace output + * @param[in] context String to identify context in output. + * @return None + */ +void ia_css_debug_dump_debug_info( + const char *context); + +#if SP_DEBUG != SP_DEBUG_NONE +void ia_css_debug_print_sp_debug_state( + const struct sh_css_sp_debug_state *state); +#endif + +/*! @brief Dump all related binary info data + * @param[in] bi Binary info struct. + * @return None + */ +void ia_css_debug_binary_print( + const struct ia_css_binary *bi); + +void ia_css_debug_sp_dump_mipi_fifo_high_water(void); + +/*! @brief Dump isp gdc fifo state to the trace output + * Dumps the isp gdc fifo state to tracing output. + * @return None + */ +void ia_css_debug_dump_isp_gdc_fifo_state(void); + +/*! @brief Dump dma isp fifo state + * Dumps the dma isp fifo state to tracing output. + * @return None + */ +void ia_css_debug_dump_dma_isp_fifo_state(void); + +/*! @brief Dump dma sp fifo state + * Dumps the dma sp fifo state to tracing output. + * @return None + */ +void ia_css_debug_dump_dma_sp_fifo_state(void); + +/*! \brief Dump pif A isp fifo state + * Dumps the primary input formatter state to tracing output. + * @return None + */ +void ia_css_debug_dump_pif_a_isp_fifo_state(void); + +/*! \brief Dump pif B isp fifo state + * Dumps the primary input formatter state to tracing output. + * \return None + */ +void ia_css_debug_dump_pif_b_isp_fifo_state(void); + +/*! @brief Dump stream-to-memory sp fifo state + * Dumps the stream-to-memory block state to tracing output. + * @return None + */ +void ia_css_debug_dump_str2mem_sp_fifo_state(void); + +/*! @brief Dump isp sp fifo state + * Dumps the isp sp fifo state to tracing output. + * @return None + */ +void ia_css_debug_dump_isp_sp_fifo_state(void); + +/*! @brief Dump all fifo state info to the output + * Dumps all fifo state to tracing output. + * @return None + */ +void ia_css_debug_dump_all_fifo_state(void); + +/*! @brief Dump the rx state to the output + * Dumps the rx state to tracing output. + * @return None + */ +void ia_css_debug_dump_rx_state(void); + +/*! @brief Dump the input system state to the output + * Dumps the input system state to tracing output. + * @return None + */ +void ia_css_debug_dump_isys_state(void); + +/*! @brief Dump the frame info to the trace output + * Dumps the frame info to tracing output. + * @param[in] frame pointer to struct ia_css_frame + * @param[in] descr description output along with the frame info + * @return None + */ +void ia_css_debug_frame_print( + const struct ia_css_frame *frame, + const char *descr); + +/*! @brief Function to enable sp sleep mode. + * Function that enables sp sleep mode + * @param[in] mode indicates when to put sp to sleep + * @return None + */ +void ia_css_debug_enable_sp_sleep_mode(enum ia_css_sp_sleep_mode mode); + +/*! @brief Function to wake up sp when in sleep mode. + * After sp has been put to sleep, use this function to let it continue + * to run again. + * @return None + */ +void ia_css_debug_wake_up_sp(void); + +/*! @brief Function to dump isp parameters. + * Dump isp parameters to tracing output + * @param[in] stream pointer to ia_css_stream struct + * @param[in] enable flag indicating which parameters to dump. + * @return None + */ +void ia_css_debug_dump_isp_params(struct ia_css_stream *stream, unsigned int enable); + +/*! @brief Function to dump some sp performance counters. + * Dump sp performance counters, currently input system errors. + * @return None + */ +void ia_css_debug_dump_perf_counters(void); + +#ifdef HAS_WATCHDOG_SP_THREAD_DEBUG +void sh_css_dump_thread_wait_info(void); +void sh_css_dump_pipe_stage_info(void); +void sh_css_dump_pipe_stripe_info(void); +#endif + +void ia_css_debug_dump_isp_binary(void); + +void sh_css_dump_sp_raw_copy_linecount(bool reduced); + +/*! @brief Dump the resolution info to the trace output + * Dumps the resolution info to the trace output. + * @param[in] res pointer to struct ia_css_resolution + * @param[in] label description of resolution output + * @return None + */ +void ia_css_debug_dump_resolution( + const struct ia_css_resolution *res, + const char *label); + +/*! @brief Dump the frame info to the trace output + * Dumps the frame info to the trace output. + * @param[in] info pointer to struct ia_css_frame_info + * @param[in] label description of frame_info output + * @return None + */ +void ia_css_debug_dump_frame_info( + const struct ia_css_frame_info *info, + const char *label); + +/*! @brief Dump the capture config info to the trace output + * Dumps the capture config info to the trace output. + * @param[in] config pointer to struct ia_css_capture_config + * @return None + */ +void ia_css_debug_dump_capture_config( + const struct ia_css_capture_config *config); + +/*! @brief Dump the pipe extra config info to the trace output + * Dumps the pipe extra config info to the trace output. + * @param[in] extra_config pointer to struct ia_css_pipe_extra_config + * @return None + */ +void ia_css_debug_dump_pipe_extra_config( + const struct ia_css_pipe_extra_config *extra_config); + +/*! @brief Dump the pipe config info to the trace output + * Dumps the pipe config info to the trace output. + * @param[in] config pointer to struct ia_css_pipe_config + * @return None + */ +void ia_css_debug_dump_pipe_config( + const struct ia_css_pipe_config *config); + + +/*! @brief Dump the stream config source info to the trace output + * Dumps the stream config source info to the trace output. + * @param[in] config pointer to struct ia_css_stream_config + * @return None + */ +void ia_css_debug_dump_stream_config_source( + const struct ia_css_stream_config *config); + +/*! @brief Dump the mipi buffer config info to the trace output + * Dumps the mipi buffer config info to the trace output. + * @param[in] config pointer to struct ia_css_mipi_buffer_config + * @return None + */ +void ia_css_debug_dump_mipi_buffer_config( + const struct ia_css_mipi_buffer_config *config); + +/*! @brief Dump the metadata config info to the trace output + * Dumps the metadata config info to the trace output. + * @param[in] config pointer to struct ia_css_metadata_config + * @return None + */ +void ia_css_debug_dump_metadata_config( + const struct ia_css_metadata_config *config); + +/*! @brief Dump the stream config info to the trace output + * Dumps the stream config info to the trace output. + * @param[in] config pointer to struct ia_css_stream_config + * @param[in] num_pipes number of pipes for the stream + * @return None + */ +void ia_css_debug_dump_stream_config( + const struct ia_css_stream_config *config, + int num_pipes); + +/*! @brief Dump the state of the SP tagger + * Dumps the internal state of the SP tagger + * @return None + */ +void ia_css_debug_tagger_state(void); + +/** + * @brief Initialize the debug mode. + * + * WARNING: + * This API should be called ONLY once in the debug mode. + * + * @return + * - true, if it is successful. + * - false, otherwise. + */ +bool ia_css_debug_mode_init(void); + +/** + * @brief Disable the DMA channel. + * + * @param[in] dma_ID The ID of the target DMA. + * @param[in] channel_id The ID of the target DMA channel. + * @param[in] request_type The type of the DMA request. + * For example: + * - "0" indicates the writing request. + * - "1" indicates the reading request. + * + * This is part of the DMA API -> dma.h + * + * @return + * - true, if it is successful. + * - false, otherwise. + */ +bool ia_css_debug_mode_disable_dma_channel( + int dma_ID, + int channel_id, + int request_type); +/** + * @brief Enable the DMA channel. + * + * @param[in] dma_ID The ID of the target DMA. + * @param[in] channel_id The ID of the target DMA channel. + * @param[in] request_type The type of the DMA request. + * For example: + * - "0" indicates the writing request. + * - "1" indicates the reading request. + * + * @return + * - true, if it is successful. + * - false, otherwise. + */ +bool ia_css_debug_mode_enable_dma_channel( + int dma_ID, + int channel_id, + int request_type); + +/** + * @brief Dump tracer data. + * [Currently support is only for SKC] + * + * @return + * - none. + */ +void ia_css_debug_dump_trace(void); + +#ifdef ISP2401 +/** + * @brief Program counter dumping (in loop) + * + * @param[in] id The ID of the SP + * @param[in] num_of_dumps The number of dumps + * + * @return + * - none + */ +void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps); + +#if defined(IS_ISP_2500_SYSTEM) +/*! @brief Dump all states for ISP hang case. + * Dumps the ISP previous and current configurations + * GACs status, SP0/1 statuses. + * + * @param[in] pipe The current pipe + * + * @return None + */ +void ia_css_debug_dump_hang_status( + struct ia_css_pipe *pipe); + +/*! @brief External command handler + * External command handler + * + * @return None + */ +void ia_css_debug_ext_command_handler(void); + +#endif +#endif + +#endif /* _IA_CSS_DEBUG_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h new file mode 100644 index 0000000000000..88d0258072011 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h @@ -0,0 +1,31 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +/* TO DO: Move debug related code from ia_css_internal.h in */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h new file mode 100644 index 0000000000000..72ac0e32ebf74 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h @@ -0,0 +1,84 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_DEBUG_PIPE_H_ +#define _IA_CSS_DEBUG_PIPE_H_ + +/*! \file */ + +#include +#include +#include "ia_css_pipeline.h" + +/** + * @brief Internal debug support for constructing a pipe graph. + * + * @return None + */ +extern void ia_css_debug_pipe_graph_dump_prologue(void); + +/** + * @brief Internal debug support for constructing a pipe graph. + * + * @return None + */ +extern void ia_css_debug_pipe_graph_dump_epilogue(void); + +/** + * @brief Internal debug support for constructing a pipe graph. + * @param[in] stage Pipeline stage. + * @param[in] id Pipe id. + * + * @return None + */ +extern void ia_css_debug_pipe_graph_dump_stage( + struct ia_css_pipeline_stage *stage, + enum ia_css_pipe_id id); + +/** + * @brief Internal debug support for constructing a pipe graph. + * @param[in] out_frame Output frame of SP raw copy. + * + * @return None + */ +extern void ia_css_debug_pipe_graph_dump_sp_raw_copy( + struct ia_css_frame *out_frame); + + +/** + * @brief Internal debug support for constructing a pipe graph. + * @param[in] stream_config info about sensor and input formatter. + * + * @return None + */ +extern void ia_css_debug_pipe_graph_dump_stream_config( + const struct ia_css_stream_config *stream_config); + +#endif /* _IA_CSS_DEBUG_PIPE_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c new file mode 100644 index 0000000000000..4607a76dc78af --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c @@ -0,0 +1,3596 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "debug.h" +#include "memory_access.h" + +#ifndef __INLINE_INPUT_SYSTEM__ +#define __INLINE_INPUT_SYSTEM__ +#endif +#ifndef __INLINE_IBUF_CTRL__ +#define __INLINE_IBUF_CTRL__ +#endif +#ifndef __INLINE_CSI_RX__ +#define __INLINE_CSI_RX__ +#endif +#ifndef __INLINE_PIXELGEN__ +#define __INLINE_PIXELGEN__ +#endif +#ifndef __INLINE_STREAM2MMIO__ +#define __INLINE_STREAM2MMIO__ +#endif + +#include "ia_css_debug.h" +#include "ia_css_debug_pipe.h" +#include "ia_css_irq.h" +#include "ia_css_stream.h" +#include "ia_css_pipeline.h" +#include "ia_css_isp_param.h" +#include "sh_css_params.h" +#include "ia_css_bufq.h" +#ifdef ISP2401 +#include "ia_css_queue.h" +#endif + +#include "ia_css_isp_params.h" + +#include "system_local.h" +#include "assert_support.h" +#include "print_support.h" +#include "string_support.h" +#ifdef ISP2401 +#include "ia_css_system_ctrl.h" +#endif + +#include "fifo_monitor.h" + +#if !defined(HAS_NO_INPUT_FORMATTER) +#include "input_formatter.h" +#endif +#include "dma.h" +#include "irq.h" +#include "gp_device.h" +#include "sp.h" +#include "isp.h" +#include "type_support.h" +#include "math_support.h" /* CEIL_DIV */ +#if defined(HAS_INPUT_FORMATTER_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +#include "input_system.h" /* input_formatter_reg_load */ +#endif +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +#include "ia_css_tagger_common.h" +#endif + +#include "sh_css_internal.h" +#if !defined(HAS_NO_INPUT_SYSTEM) +#include "ia_css_isys.h" +#endif +#include "sh_css_sp.h" /* sh_css_sp_get_debug_state() */ + +#include "css_trace.h" /* tracer */ + +#include "device_access.h" /* for ia_css_device_load_uint32 */ + +/* Include all kernel host interfaces for ISP1 */ +#include "anr/anr_1.0/ia_css_anr.host.h" +#include "cnr/cnr_1.0/ia_css_cnr.host.h" +#include "csc/csc_1.0/ia_css_csc.host.h" +#include "de/de_1.0/ia_css_de.host.h" +#include "dp/dp_1.0/ia_css_dp.host.h" +#include "bnr/bnr_1.0/ia_css_bnr.host.h" +#include "fpn/fpn_1.0/ia_css_fpn.host.h" +#include "gc/gc_1.0/ia_css_gc.host.h" +#include "ob/ob_1.0/ia_css_ob.host.h" +#include "s3a/s3a_1.0/ia_css_s3a.host.h" +#include "sc/sc_1.0/ia_css_sc.host.h" +#include "tnr/tnr_1.0/ia_css_tnr.host.h" +#include "uds/uds_1.0/ia_css_uds_param.h" +#include "wb/wb_1.0/ia_css_wb.host.h" +#include "ynr/ynr_1.0/ia_css_ynr.host.h" + +/* Include additional kernel host interfaces for ISP2 */ +#include "aa/aa_2/ia_css_aa2.host.h" +#include "anr/anr_2/ia_css_anr2.host.h" +#include "cnr/cnr_2/ia_css_cnr2.host.h" +#include "de/de_2/ia_css_de2.host.h" +#include "gc/gc_2/ia_css_gc2.host.h" +#include "ynr/ynr_2/ia_css_ynr2.host.h" + +/* Global variable to store the dtrace verbosity level */ +unsigned int ia_css_debug_trace_level = IA_CSS_DEBUG_WARNING; + +#define DPG_START "ia_css_debug_pipe_graph_dump_start " +#define DPG_END " ia_css_debug_pipe_graph_dump_end\n" + +#define ENABLE_LINE_MAX_LENGTH (25) + +#ifdef ISP2401 +#define DBG_EXT_CMD_TRACE_PNTS_DUMP (1 << 8) +#define DBG_EXT_CMD_PUB_CFG_DUMP (1 << 9) +#define DBG_EXT_CMD_GAC_REG_DUMP (1 << 10) +#define DBG_EXT_CMD_GAC_ACB_REG_DUMP (1 << 11) +#define DBG_EXT_CMD_FIFO_DUMP (1 << 12) +#define DBG_EXT_CMD_QUEUE_DUMP (1 << 13) +#define DBG_EXT_CMD_DMA_DUMP (1 << 14) +#define DBG_EXT_CMD_MASK 0xAB0000CD + +#endif +/* + * TODO:SH_CSS_MAX_SP_THREADS is not the max number of sp threads + * future rework should fix this and remove the define MAX_THREAD_NUM + */ +#define MAX_THREAD_NUM (SH_CSS_MAX_SP_THREADS + SH_CSS_MAX_SP_INTERNAL_THREADS) + +static struct pipe_graph_class { + bool do_init; + int height; + int width; + int eff_height; + int eff_width; + enum atomisp_input_format stream_format; +} pg_inst = {true, 0, 0, 0, 0, N_ATOMISP_INPUT_FORMAT}; + +static const char * const queue_id_to_str[] = { + /* [SH_CSS_QUEUE_A_ID] =*/ "queue_A", + /* [SH_CSS_QUEUE_B_ID] =*/ "queue_B", + /* [SH_CSS_QUEUE_C_ID] =*/ "queue_C", + /* [SH_CSS_QUEUE_D_ID] =*/ "queue_D", + /* [SH_CSS_QUEUE_E_ID] =*/ "queue_E", + /* [SH_CSS_QUEUE_F_ID] =*/ "queue_F", + /* [SH_CSS_QUEUE_G_ID] =*/ "queue_G", + /* [SH_CSS_QUEUE_H_ID] =*/ "queue_H" +}; + +static const char * const pipe_id_to_str[] = { + /* [IA_CSS_PIPE_ID_PREVIEW] =*/ "preview", + /* [IA_CSS_PIPE_ID_COPY] =*/ "copy", + /* [IA_CSS_PIPE_ID_VIDEO] =*/ "video", + /* [IA_CSS_PIPE_ID_CAPTURE] =*/ "capture", + /* [IA_CSS_PIPE_ID_YUVPP] =*/ "yuvpp", + /* [IA_CSS_PIPE_ID_ACC] =*/ "accelerator" +}; + +static char dot_id_input_bin[SH_CSS_MAX_BINARY_NAME+10]; +static char ring_buffer[200]; + +void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + ia_css_debug_vdtrace(level, fmt, ap); + va_end(ap); +} + +static void debug_dump_long_array_formatted( + const sp_ID_t sp_id, + hrt_address stack_sp_addr, + unsigned stack_size) +{ + unsigned int i; + uint32_t val; + uint32_t addr = (uint32_t) stack_sp_addr; + uint32_t stack_size_words = CEIL_DIV(stack_size, sizeof(uint32_t)); + + /* When size is not multiple of four, last word is only relevant for + * remaining bytes */ + for (i = 0; i < stack_size_words; i++) { + val = sp_dmem_load_uint32(sp_id, (hrt_address)addr); + if ((i%8) == 0) + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "\n"); + + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "0x%08x ", val); + addr += sizeof(uint32_t); + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "\n"); +} + +static void debug_dump_sp_stack_info( + const sp_ID_t sp_id) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_sp_threads_stack; + unsigned int HIVE_ADDR_sp_threads_stack_size; + uint32_t stack_sizes[MAX_THREAD_NUM]; + uint32_t stack_sp_addr[MAX_THREAD_NUM]; + unsigned int i; + + fw = &sh_css_sp_fw; + + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "sp_id(%u) stack info\n", sp_id); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "from objects stack_addr_offset:0x%x stack_size_offset:0x%x\n", + fw->info.sp.threads_stack, + fw->info.sp.threads_stack_size); + + HIVE_ADDR_sp_threads_stack = fw->info.sp.threads_stack; + HIVE_ADDR_sp_threads_stack_size = fw->info.sp.threads_stack_size; + + if (fw->info.sp.threads_stack == 0 || + fw->info.sp.threads_stack_size == 0) + return; + + (void) HIVE_ADDR_sp_threads_stack; + (void) HIVE_ADDR_sp_threads_stack_size; + + sp_dmem_load(sp_id, + (unsigned int)sp_address_of(sp_threads_stack), + &stack_sp_addr, sizeof(stack_sp_addr)); + sp_dmem_load(sp_id, + (unsigned int)sp_address_of(sp_threads_stack_size), + &stack_sizes, sizeof(stack_sizes)); + + for (i = 0 ; i < MAX_THREAD_NUM; i++) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "thread: %u stack_addr: 0x%08x stack_size: %u\n", + i, stack_sp_addr[i], stack_sizes[i]); + debug_dump_long_array_formatted(sp_id, (hrt_address)stack_sp_addr[i], + stack_sizes[i]); + } +} + +void ia_css_debug_dump_sp_stack_info(void) +{ + debug_dump_sp_stack_info(SP0_ID); +} + + +void ia_css_debug_set_dtrace_level(const unsigned int trace_level) +{ + ia_css_debug_trace_level = trace_level; + return; +} + +unsigned int ia_css_debug_get_dtrace_level(void) +{ + return ia_css_debug_trace_level; +} + +static const char *debug_stream_format2str(const enum atomisp_input_format stream_format) +{ + switch (stream_format) { + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + return "yuv420-8-legacy"; + case ATOMISP_INPUT_FORMAT_YUV420_8: + return "yuv420-8"; + case ATOMISP_INPUT_FORMAT_YUV420_10: + return "yuv420-10"; + case ATOMISP_INPUT_FORMAT_YUV420_16: + return "yuv420-16"; + case ATOMISP_INPUT_FORMAT_YUV422_8: + return "yuv422-8"; + case ATOMISP_INPUT_FORMAT_YUV422_10: + return "yuv422-10"; + case ATOMISP_INPUT_FORMAT_YUV422_16: + return "yuv422-16"; + case ATOMISP_INPUT_FORMAT_RGB_444: + return "rgb444"; + case ATOMISP_INPUT_FORMAT_RGB_555: + return "rgb555"; + case ATOMISP_INPUT_FORMAT_RGB_565: + return "rgb565"; + case ATOMISP_INPUT_FORMAT_RGB_666: + return "rgb666"; + case ATOMISP_INPUT_FORMAT_RGB_888: + return "rgb888"; + case ATOMISP_INPUT_FORMAT_RAW_6: + return "raw6"; + case ATOMISP_INPUT_FORMAT_RAW_7: + return "raw7"; + case ATOMISP_INPUT_FORMAT_RAW_8: + return "raw8"; + case ATOMISP_INPUT_FORMAT_RAW_10: + return "raw10"; + case ATOMISP_INPUT_FORMAT_RAW_12: + return "raw12"; + case ATOMISP_INPUT_FORMAT_RAW_14: + return "raw14"; + case ATOMISP_INPUT_FORMAT_RAW_16: + return "raw16"; + case ATOMISP_INPUT_FORMAT_BINARY_8: + return "binary8"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT1: + return "generic-short1"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT2: + return "generic-short2"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT3: + return "generic-short3"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT4: + return "generic-short4"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT5: + return "generic-short5"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT6: + return "generic-short6"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT7: + return "generic-short7"; + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT8: + return "generic-short8"; + case ATOMISP_INPUT_FORMAT_YUV420_8_SHIFT: + return "yuv420-8-shift"; + case ATOMISP_INPUT_FORMAT_YUV420_10_SHIFT: + return "yuv420-10-shift"; + case ATOMISP_INPUT_FORMAT_EMBEDDED: + return "embedded-8"; + case ATOMISP_INPUT_FORMAT_USER_DEF1: + return "user-def-8-type-1"; + case ATOMISP_INPUT_FORMAT_USER_DEF2: + return "user-def-8-type-2"; + case ATOMISP_INPUT_FORMAT_USER_DEF3: + return "user-def-8-type-3"; + case ATOMISP_INPUT_FORMAT_USER_DEF4: + return "user-def-8-type-4"; + case ATOMISP_INPUT_FORMAT_USER_DEF5: + return "user-def-8-type-5"; + case ATOMISP_INPUT_FORMAT_USER_DEF6: + return "user-def-8-type-6"; + case ATOMISP_INPUT_FORMAT_USER_DEF7: + return "user-def-8-type-7"; + case ATOMISP_INPUT_FORMAT_USER_DEF8: + return "user-def-8-type-8"; + + default: + assert(!"Unknown stream format"); + return "unknown-stream-format"; + } +}; + +static const char *debug_frame_format2str(const enum ia_css_frame_format frame_format) +{ + switch (frame_format) { + + case IA_CSS_FRAME_FORMAT_NV11: + return "NV11"; + case IA_CSS_FRAME_FORMAT_NV12: + return "NV12"; + case IA_CSS_FRAME_FORMAT_NV12_16: + return "NV12_16"; + case IA_CSS_FRAME_FORMAT_NV12_TILEY: + return "NV12_TILEY"; + case IA_CSS_FRAME_FORMAT_NV16: + return "NV16"; + case IA_CSS_FRAME_FORMAT_NV21: + return "NV21"; + case IA_CSS_FRAME_FORMAT_NV61: + return "NV61"; + case IA_CSS_FRAME_FORMAT_YV12: + return "YV12"; + case IA_CSS_FRAME_FORMAT_YV16: + return "YV16"; + case IA_CSS_FRAME_FORMAT_YUV420: + return "YUV420"; + case IA_CSS_FRAME_FORMAT_YUV420_16: + return "YUV420_16"; + case IA_CSS_FRAME_FORMAT_YUV422: + return "YUV422"; + case IA_CSS_FRAME_FORMAT_YUV422_16: + return "YUV422_16"; + case IA_CSS_FRAME_FORMAT_UYVY: + return "UYVY"; + case IA_CSS_FRAME_FORMAT_YUYV: + return "YUYV"; + case IA_CSS_FRAME_FORMAT_YUV444: + return "YUV444"; + case IA_CSS_FRAME_FORMAT_YUV_LINE: + return "YUV_LINE"; + case IA_CSS_FRAME_FORMAT_RAW: + return "RAW"; + case IA_CSS_FRAME_FORMAT_RGB565: + return "RGB565"; + case IA_CSS_FRAME_FORMAT_PLANAR_RGB888: + return "PLANAR_RGB888"; + case IA_CSS_FRAME_FORMAT_RGBA888: + return "RGBA888"; + case IA_CSS_FRAME_FORMAT_QPLANE6: + return "QPLANE6"; + case IA_CSS_FRAME_FORMAT_BINARY_8: + return "BINARY_8"; + case IA_CSS_FRAME_FORMAT_MIPI: + return "MIPI"; + case IA_CSS_FRAME_FORMAT_RAW_PACKED: + return "RAW_PACKED"; + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: + return "CSI_MIPI_YUV420_8"; + case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: + return "CSI_MIPI_LEGACY_YUV420_8"; + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10: + return "CSI_MIPI_YUV420_10"; + + default: + assert(!"Unknown frame format"); + return "unknown-frame-format"; + } +} + +static void debug_print_sp_state(const sp_state_t *state, const char *cell) +{ + assert(cell != NULL); + assert(state != NULL); + + ia_css_debug_dtrace(2, "%s state:\n", cell); + ia_css_debug_dtrace(2, "\t%-32s: 0x%X\n", "PC", state->pc); + ia_css_debug_dtrace(2, "\t%-32s: 0x%X\n", "Status register", + state->status_register); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is broken", state->is_broken); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is idle", state->is_idle); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is sleeping", + state->is_sleeping); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is stalling", + state->is_stalling); + return; +} + +static void debug_print_isp_state(const isp_state_t *state, const char *cell) +{ + assert(state != NULL); + assert(cell != NULL); + + ia_css_debug_dtrace(2, "%s state:\n", cell); + ia_css_debug_dtrace(2, "\t%-32s: 0x%X\n", "PC", state->pc); + ia_css_debug_dtrace(2, "\t%-32s: 0x%X\n", "Status register", + state->status_register); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is broken", state->is_broken); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is idle", state->is_idle); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is sleeping", + state->is_sleeping); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "Is stalling", + state->is_stalling); + return; +} + +void ia_css_debug_dump_isp_state(void) +{ + isp_state_t state; + isp_stall_t stall; + + isp_get_state(ISP0_ID, &state, &stall); + + debug_print_isp_state(&state, "ISP"); + + if (state.is_stalling) { +#if !defined(HAS_NO_INPUT_FORMATTER) + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "[0] if_prim_a_FIFO stalled", stall.fifo0); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "[1] if_prim_b_FIFO stalled", stall.fifo1); +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "[2] dma_FIFO stalled", + stall.fifo2); +#if defined(HAS_ISP_2400_MAMOIADA) || defined(HAS_ISP_2401_MAMOIADA) || defined(IS_ISP_2500_SYSTEM) + + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "[3] gdc0_FIFO stalled", + stall.fifo3); +#if !defined(IS_ISP_2500_SYSTEM) + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "[4] gdc1_FIFO stalled", + stall.fifo4); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "[5] gpio_FIFO stalled", + stall.fifo5); +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "[6] sp_FIFO stalled", + stall.fifo6); +#else +#error "ia_css_debug: ISP cell must be one of {2400_MAMOIADA,, 2401_MAMOIADA, 2500_SKYCAM}" +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "status & control stalled", + stall.stat_ctrl); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "dmem stalled", + stall.dmem); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "vmem stalled", + stall.vmem); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "vamem1 stalled", + stall.vamem1); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "vamem2 stalled", + stall.vamem2); +#if defined(HAS_ISP_2400_MAMOIADA) || defined(HAS_ISP_2401_MAMOIADA) + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "vamem3 stalled", + stall.vamem3); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "hmem stalled", + stall.hmem); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "pmem stalled", + stall.pmem); +#endif + } + return; +} + +void ia_css_debug_dump_sp_state(void) +{ + sp_state_t state; + sp_stall_t stall; + sp_get_state(SP0_ID, &state, &stall); + debug_print_sp_state(&state, "SP"); + if (state.is_stalling) { +#if defined(HAS_SP_2400) || defined(IS_ISP_2500_SYSTEM) +#if !defined(HAS_NO_INPUT_SYSTEM) + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "isys_FIFO stalled", + stall.fifo0); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "if_sec_FIFO stalled", + stall.fifo1); +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "str_to_mem_FIFO stalled", stall.fifo2); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "dma_FIFO stalled", + stall.fifo3); +#if !defined(HAS_NO_INPUT_FORMATTER) + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "if_prim_a_FIFO stalled", stall.fifo4); +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "isp_FIFO stalled", + stall.fifo5); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "gp_FIFO stalled", + stall.fifo6); +#if !defined(HAS_NO_INPUT_FORMATTER) + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "if_prim_b_FIFO stalled", stall.fifo7); +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "gdc0_FIFO stalled", + stall.fifo8); +#if !defined(IS_ISP_2500_SYSTEM) + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "gdc1_FIFO stalled", + stall.fifo9); +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "irq FIFO stalled", + stall.fifoa); +#else +#error "ia_css_debug: SP cell must be one of {SP2400, SP2500}" +#endif + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "dmem stalled", + stall.dmem); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "control master stalled", + stall.control_master); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", + "i-cache master stalled", + stall.icache_master); + } + ia_css_debug_dump_trace(); + return; +} + +static void debug_print_fifo_channel_state(const fifo_channel_state_t *state, + const char *descr) +{ + assert(state != NULL); + assert(descr != NULL); + + ia_css_debug_dtrace(2, "FIFO channel: %s\n", descr); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "source valid", + state->src_valid); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "fifo accept", + state->fifo_accept); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "fifo valid", + state->fifo_valid); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "sink accept", + state->sink_accept); + return; +} + +#if !defined(HAS_NO_INPUT_FORMATTER) && defined(USE_INPUT_SYSTEM_VERSION_2) +void ia_css_debug_dump_pif_a_isp_fifo_state(void) +{ + fifo_channel_state_t pif_to_isp, isp_to_pif; + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_IF0_TO_ISP0, &pif_to_isp); + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_ISP0_TO_IF0, &isp_to_pif); + debug_print_fifo_channel_state(&pif_to_isp, "Primary IF A to ISP"); + debug_print_fifo_channel_state(&isp_to_pif, "ISP to Primary IF A"); +} + +void ia_css_debug_dump_pif_b_isp_fifo_state(void) +{ + fifo_channel_state_t pif_to_isp, isp_to_pif; + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_IF1_TO_ISP0, &pif_to_isp); + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_ISP0_TO_IF1, &isp_to_pif); + debug_print_fifo_channel_state(&pif_to_isp, "Primary IF B to ISP"); + debug_print_fifo_channel_state(&isp_to_pif, "ISP to Primary IF B"); +} + +void ia_css_debug_dump_str2mem_sp_fifo_state(void) +{ + fifo_channel_state_t s2m_to_sp, sp_to_s2m; + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_STREAM2MEM0_TO_SP0, &s2m_to_sp); + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_SP0_TO_STREAM2MEM0, &sp_to_s2m); + debug_print_fifo_channel_state(&s2m_to_sp, "Stream-to-memory to SP"); + debug_print_fifo_channel_state(&sp_to_s2m, "SP to stream-to-memory"); +} + +static void debug_print_if_state(input_formatter_state_t *state, const char *id) +{ + unsigned int val; + +#if defined(HAS_INPUT_FORMATTER_VERSION_1) + const char *st_reset = (state->reset ? "Active" : "Not active"); +#endif + const char *st_vsync_active_low = + (state->vsync_active_low ? "low" : "high"); + const char *st_hsync_active_low = + (state->hsync_active_low ? "low" : "high"); + + const char *fsm_sync_status_str = "unknown"; + const char *fsm_crop_status_str = "unknown"; + const char *fsm_padding_status_str = "unknown"; + + int st_stline = state->start_line; + int st_stcol = state->start_column; + int st_crpht = state->cropped_height; + int st_crpwd = state->cropped_width; + int st_verdcm = state->ver_decimation; + int st_hordcm = state->hor_decimation; + int st_ver_deinterleaving = state->ver_deinterleaving; + int st_hor_deinterleaving = state->hor_deinterleaving; + int st_leftpd = state->left_padding; + int st_eoloff = state->eol_offset; + int st_vmstartaddr = state->vmem_start_address; + int st_vmendaddr = state->vmem_end_address; + int st_vmincr = state->vmem_increment; + int st_yuv420 = state->is_yuv420; + int st_allow_fifo_overflow = state->allow_fifo_overflow; + int st_block_fifo_when_no_req = state->block_fifo_when_no_req; + + assert(state != NULL); + ia_css_debug_dtrace(2, "InputFormatter State (%s):\n", id); + + ia_css_debug_dtrace(2, "\tConfiguration:\n"); + +#if defined(HAS_INPUT_FORMATTER_VERSION_1) + ia_css_debug_dtrace(2, "\t\t%-32s: %s\n", "Software reset", st_reset); +#endif + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Start line", st_stline); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Start column", st_stcol); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Cropped height", st_crpht); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Cropped width", st_crpwd); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Ver decimation", st_verdcm); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Hor decimation", st_hordcm); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Ver deinterleaving", st_ver_deinterleaving); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Hor deinterleaving", st_hor_deinterleaving); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Left padding", st_leftpd); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "EOL offset (bytes)", st_eoloff); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%06X\n", + "VMEM start address", st_vmstartaddr); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%06X\n", + "VMEM end address", st_vmendaddr); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%06X\n", + "VMEM increment", st_vmincr); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "YUV 420 format", st_yuv420); + ia_css_debug_dtrace(2, "\t\t%-32s: Active %s\n", + "Vsync", st_vsync_active_low); + ia_css_debug_dtrace(2, "\t\t%-32s: Active %s\n", + "Hsync", st_hsync_active_low); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Allow FIFO overflow", st_allow_fifo_overflow); +/* Flag that tells whether the IF gives backpressure on frames */ +/* + * FYI, this is only on the frame request (indicate), when the IF has + * synch'd on a frame it will always give back pressure + */ + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Block when no request", st_block_fifo_when_no_req); + +#if defined(HAS_INPUT_FORMATTER_VERSION_2) + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "IF_BLOCKED_FIFO_NO_REQ_ADDRESS", + input_formatter_reg_load(INPUT_FORMATTER0_ID, + HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS) + ); + + ia_css_debug_dtrace(2, "\t%-32s:\n", "InputSwitch State"); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg0", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg0)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg1", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg1)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg2", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg2)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg3", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg3)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg4", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg4)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg5", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg5)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg6", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg6)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_lut_reg7", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg7)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_input_switch_fsync_lut", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_fsync_lut)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_srst", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_srst)); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "_REG_GP_IFMT_slv_reg_srst", + gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_slv_reg_srst)); +#endif + + ia_css_debug_dtrace(2, "\tFSM Status:\n"); + + val = state->fsm_sync_status; + + if (val > 7) + fsm_sync_status_str = "ERROR"; + + switch (val & 0x7) { + case 0: + fsm_sync_status_str = "idle"; + break; + case 1: + fsm_sync_status_str = "request frame"; + break; + case 2: + fsm_sync_status_str = "request lines"; + break; + case 3: + fsm_sync_status_str = "request vectors"; + break; + case 4: + fsm_sync_status_str = "send acknowledge"; + break; + default: + fsm_sync_status_str = "unknown"; + break; + } + + ia_css_debug_dtrace(2, "\t\t%-32s: (0x%X: %s)\n", + "FSM Synchronization Status", val, + fsm_sync_status_str); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM Synchronization Counter", + state->fsm_sync_counter); + + val = state->fsm_crop_status; + + if (val > 7) + fsm_crop_status_str = "ERROR"; + + switch (val & 0x7) { + case 0: + fsm_crop_status_str = "idle"; + break; + case 1: + fsm_crop_status_str = "wait line"; + break; + case 2: + fsm_crop_status_str = "crop line"; + break; + case 3: + fsm_crop_status_str = "crop pixel"; + break; + case 4: + fsm_crop_status_str = "pass pixel"; + break; + case 5: + fsm_crop_status_str = "pass line"; + break; + case 6: + fsm_crop_status_str = "lost line"; + break; + default: + fsm_crop_status_str = "unknown"; + break; + } + ia_css_debug_dtrace(2, "\t\t%-32s: (0x%X: %s)\n", + "FSM Crop Status", val, fsm_crop_status_str); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM Crop Line Counter", + state->fsm_crop_line_counter); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM Crop Pixel Counter", + state->fsm_crop_pixel_counter); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM Deinterleaving idx buffer", + state->fsm_deinterleaving_index); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM H decimation counter", + state->fsm_dec_h_counter); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM V decimation counter", + state->fsm_dec_v_counter); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM block V decimation counter", + state->fsm_dec_block_v_counter); + + val = state->fsm_padding_status; + + if (val > 7) + fsm_padding_status_str = "ERROR"; + + switch (val & 0x7) { + case 0: + fsm_padding_status_str = "idle"; + break; + case 1: + fsm_padding_status_str = "left pad"; + break; + case 2: + fsm_padding_status_str = "write"; + break; + case 3: + fsm_padding_status_str = "right pad"; + break; + case 4: + fsm_padding_status_str = "send end of line"; + break; + default: + fsm_padding_status_str = "unknown"; + break; + } + + ia_css_debug_dtrace(2, "\t\t%-32s: (0x%X: %s)\n", "FSM Padding Status", + val, fsm_padding_status_str); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM Padding element idx counter", + state->fsm_padding_elem_counter); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Vector support error", + state->fsm_vector_support_error); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Vector support buf full", + state->fsm_vector_buffer_full); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Vector support", + state->vector_support); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Fifo sensor data lost", + state->sensor_data_lost); + return; +} + +static void debug_print_if_bin_state(input_formatter_bin_state_t *state) +{ + ia_css_debug_dtrace(2, "Stream-to-memory state:\n"); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "reset", state->reset); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "input endianness", + state->input_endianness); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "output endianness", + state->output_endianness); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "bitswap", state->bitswap); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "block_synch", + state->block_synch); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "packet_synch", + state->packet_synch); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "readpostwrite_sync", + state->readpostwrite_synch); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "is_2ppc", state->is_2ppc); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "en_status_update", + state->en_status_update); +} + +void ia_css_debug_dump_if_state(void) +{ + input_formatter_state_t if_state; + input_formatter_bin_state_t if_bin_state; + + input_formatter_get_state(INPUT_FORMATTER0_ID, &if_state); + debug_print_if_state(&if_state, "Primary IF A"); + ia_css_debug_dump_pif_a_isp_fifo_state(); + + input_formatter_get_state(INPUT_FORMATTER1_ID, &if_state); + debug_print_if_state(&if_state, "Primary IF B"); + ia_css_debug_dump_pif_b_isp_fifo_state(); + + input_formatter_bin_get_state(INPUT_FORMATTER3_ID, &if_bin_state); + debug_print_if_bin_state(&if_bin_state); + ia_css_debug_dump_str2mem_sp_fifo_state(); +} +#endif + +void ia_css_debug_dump_dma_state(void) +{ + /* note: the var below is made static as it is quite large; + if it is not static it ends up on the stack which could + cause issues for drivers + */ + static dma_state_t state; + int i, ch_id; + + const char *fsm_cmd_st_lbl = "FSM Command flag state"; + const char *fsm_ctl_st_lbl = "FSM Control flag state"; + const char *fsm_ctl_state = NULL; + const char *fsm_ctl_flag = NULL; + const char *fsm_pack_st = NULL; + const char *fsm_read_st = NULL; + const char *fsm_write_st = NULL; + char last_cmd_str[64]; + + dma_get_state(DMA0_ID, &state); + /* Print header for DMA dump status */ + ia_css_debug_dtrace(2, "DMA dump status:\n"); + + /* Print FSM command flag state */ + if (state.fsm_command_idle) + ia_css_debug_dtrace(2, "\t%-32s: %s\n", fsm_cmd_st_lbl, "IDLE"); + if (state.fsm_command_run) + ia_css_debug_dtrace(2, "\t%-32s: %s\n", fsm_cmd_st_lbl, "RUN"); + if (state.fsm_command_stalling) + ia_css_debug_dtrace(2, "\t%-32s: %s\n", fsm_cmd_st_lbl, + "STALL"); + if (state.fsm_command_error) + ia_css_debug_dtrace(2, "\t%-32s: %s\n", fsm_cmd_st_lbl, + "ERROR"); + + /* Print last command along with the channel */ + ch_id = state.last_command_channel; + + switch (state.last_command) { + case DMA_COMMAND_READ: + snprintf(last_cmd_str, 64, + "Read 2D Block [Channel: %d]", ch_id); + break; + case DMA_COMMAND_WRITE: + snprintf(last_cmd_str, 64, + "Write 2D Block [Channel: %d]", ch_id); + break; + case DMA_COMMAND_SET_CHANNEL: + snprintf(last_cmd_str, 64, "Set Channel [Channel: %d]", ch_id); + break; + case DMA_COMMAND_SET_PARAM: + snprintf(last_cmd_str, 64, + "Set Param: %d [Channel: %d]", + state.last_command_param, ch_id); + break; + case DMA_COMMAND_READ_SPECIFIC: + snprintf(last_cmd_str, 64, + "Read Specific 2D Block [Channel: %d]", ch_id); + break; + case DMA_COMMAND_WRITE_SPECIFIC: + snprintf(last_cmd_str, 64, + "Write Specific 2D Block [Channel: %d]", ch_id); + break; + case DMA_COMMAND_INIT: + snprintf(last_cmd_str, 64, + "Init 2D Block on Device A [Channel: %d]", ch_id); + break; + case DMA_COMMAND_INIT_SPECIFIC: + snprintf(last_cmd_str, 64, + "Init Specific 2D Block [Channel: %d]", ch_id); + break; + case DMA_COMMAND_RST: + snprintf(last_cmd_str, 64, "DMA SW Reset"); + break; + case N_DMA_COMMANDS: + snprintf(last_cmd_str, 64, "UNKNOWN"); + break; + default: + snprintf(last_cmd_str, 64, + "unknown [Channel: %d]", ch_id); + break; + } + ia_css_debug_dtrace(2, "\t%-32s: (0x%X : %s)\n", + "last command received", state.last_command, + last_cmd_str); + + /* Print DMA registers */ + ia_css_debug_dtrace(2, "\t%-32s\n", + "DMA registers, connection group 0"); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "Cmd Fifo Command", + state.current_command); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "Cmd Fifo Address A", + state.current_addr_a); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "Cmd Fifo Address B", + state.current_addr_b); + + if (state.fsm_ctrl_idle) + fsm_ctl_flag = "IDLE"; + else if (state.fsm_ctrl_run) + fsm_ctl_flag = "RUN"; + else if (state.fsm_ctrl_stalling) + fsm_ctl_flag = "STAL"; + else if (state.fsm_ctrl_error) + fsm_ctl_flag = "ERROR"; + else + fsm_ctl_flag = "UNKNOWN"; + + switch (state.fsm_ctrl_state) { + case DMA_CTRL_STATE_IDLE: + fsm_ctl_state = "Idle state"; + break; + case DMA_CTRL_STATE_REQ_RCV: + fsm_ctl_state = "Req Rcv state"; + break; + case DMA_CTRL_STATE_RCV: + fsm_ctl_state = "Rcv state"; + break; + case DMA_CTRL_STATE_RCV_REQ: + fsm_ctl_state = "Rcv Req state"; + break; + case DMA_CTRL_STATE_INIT: + fsm_ctl_state = "Init state"; + break; + case N_DMA_CTRL_STATES: + fsm_ctl_state = "Unknown"; + break; + } + + ia_css_debug_dtrace(2, "\t\t%-32s: %s -> %s\n", fsm_ctl_st_lbl, + fsm_ctl_flag, fsm_ctl_state); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl source dev", + state.fsm_ctrl_source_dev); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "FSM Ctrl source addr", + state.fsm_ctrl_source_addr); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "FSM Ctrl source stride", + state.fsm_ctrl_source_stride); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl source width", + state.fsm_ctrl_source_width); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl source height", + state.fsm_ctrl_source_height); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack source dev", + state.fsm_ctrl_pack_source_dev); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack dest dev", + state.fsm_ctrl_pack_dest_dev); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "FSM Ctrl dest addr", + state.fsm_ctrl_dest_addr); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "FSM Ctrl dest stride", + state.fsm_ctrl_dest_stride); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack source width", + state.fsm_ctrl_pack_source_width); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack dest height", + state.fsm_ctrl_pack_dest_height); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack dest width", + state.fsm_ctrl_pack_dest_width); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack source elems", + state.fsm_ctrl_pack_source_elems); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack dest elems", + state.fsm_ctrl_pack_dest_elems); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Ctrl pack extension", + state.fsm_ctrl_pack_extension); + + if (state.pack_idle) + fsm_pack_st = "IDLE"; + if (state.pack_run) + fsm_pack_st = "RUN"; + if (state.pack_stalling) + fsm_pack_st = "STALL"; + if (state.pack_error) + fsm_pack_st = "ERROR"; + + ia_css_debug_dtrace(2, "\t\t%-32s: %s\n", "FSM Pack flag state", + fsm_pack_st); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Pack cnt height", + state.pack_cnt_height); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Pack src cnt width", + state.pack_src_cnt_width); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Pack dest cnt width", + state.pack_dest_cnt_width); + + if (state.read_state == DMA_RW_STATE_IDLE) + fsm_read_st = "Idle state"; + if (state.read_state == DMA_RW_STATE_REQ) + fsm_read_st = "Req state"; + if (state.read_state == DMA_RW_STATE_NEXT_LINE) + fsm_read_st = "Next line"; + if (state.read_state == DMA_RW_STATE_UNLOCK_CHANNEL) + fsm_read_st = "Unlock channel"; + + ia_css_debug_dtrace(2, "\t\t%-32s: %s\n", "FSM Read state", + fsm_read_st); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Read cnt height", + state.read_cnt_height); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Read cnt width", + state.read_cnt_width); + + if (state.write_state == DMA_RW_STATE_IDLE) + fsm_write_st = "Idle state"; + if (state.write_state == DMA_RW_STATE_REQ) + fsm_write_st = "Req state"; + if (state.write_state == DMA_RW_STATE_NEXT_LINE) + fsm_write_st = "Next line"; + if (state.write_state == DMA_RW_STATE_UNLOCK_CHANNEL) + fsm_write_st = "Unlock channel"; + + ia_css_debug_dtrace(2, "\t\t%-32s: %s\n", "FSM Write state", + fsm_write_st); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Write height", + state.write_height); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "FSM Write width", + state.write_width); + + for (i = 0; i < HIVE_ISP_NUM_DMA_CONNS; i++) { + dma_port_state_t *port = &(state.port_states[i]); + ia_css_debug_dtrace(2, "\tDMA device interface %d\n", i); + ia_css_debug_dtrace(2, "\t\tDMA internal side state\n"); + ia_css_debug_dtrace(2, + "\t\t\tCS:%d - We_n:%d - Run:%d - Ack:%d\n", + port->req_cs, port->req_we_n, port->req_run, + port->req_ack); + ia_css_debug_dtrace(2, "\t\tMaster Output side state\n"); + ia_css_debug_dtrace(2, + "\t\t\tCS:%d - We_n:%d - Run:%d - Ack:%d\n", + port->send_cs, port->send_we_n, + port->send_run, port->send_ack); + ia_css_debug_dtrace(2, "\t\tFifo state\n"); + if (port->fifo_state == DMA_FIFO_STATE_WILL_BE_FULL) + ia_css_debug_dtrace(2, "\t\t\tFiFo will be full\n"); + else if (port->fifo_state == DMA_FIFO_STATE_FULL) + ia_css_debug_dtrace(2, "\t\t\tFifo Full\n"); + else if (port->fifo_state == DMA_FIFO_STATE_EMPTY) + ia_css_debug_dtrace(2, "\t\t\tFifo Empty\n"); + else + ia_css_debug_dtrace(2, "\t\t\tFifo state unknown\n"); + + ia_css_debug_dtrace(2, "\t\tFifo counter %d\n\n", + port->fifo_counter); + } + + for (i = 0; i < HIVE_DMA_NUM_CHANNELS; i++) { + dma_channel_state_t *ch = &(state.channel_states[i]); + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "DMA channel register", + i); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Connection", + ch->connection); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Sign extend", + ch->sign_extend); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "Stride Dev A", + ch->stride_a); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Elems Dev A", + ch->elems_a); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Cropping Dev A", + ch->cropping_a); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Width Dev A", + ch->width_a); + ia_css_debug_dtrace(2, "\t\t%-32s: 0x%X\n", "Stride Dev B", + ch->stride_b); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Elems Dev B", + ch->elems_b); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Cropping Dev B", + ch->cropping_b); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Width Dev B", + ch->width_b); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Height", ch->height); + } + ia_css_debug_dtrace(2, "\n"); + return; +} + +void ia_css_debug_dump_dma_sp_fifo_state(void) +{ + fifo_channel_state_t dma_to_sp, sp_to_dma; + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_DMA0_TO_SP0, &dma_to_sp); + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_SP0_TO_DMA0, &sp_to_dma); + debug_print_fifo_channel_state(&dma_to_sp, "DMA to SP"); + debug_print_fifo_channel_state(&sp_to_dma, "SP to DMA"); + return; +} + +void ia_css_debug_dump_dma_isp_fifo_state(void) +{ + fifo_channel_state_t dma_to_isp, isp_to_dma; + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_DMA0_TO_ISP0, &dma_to_isp); + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_ISP0_TO_DMA0, &isp_to_dma); + debug_print_fifo_channel_state(&dma_to_isp, "DMA to ISP"); + debug_print_fifo_channel_state(&isp_to_dma, "ISP to DMA"); + return; +} + +void ia_css_debug_dump_isp_sp_fifo_state(void) +{ + fifo_channel_state_t sp_to_isp, isp_to_sp; + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_SP0_TO_ISP0, &sp_to_isp); + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_ISP0_TO_SP0, &isp_to_sp); + debug_print_fifo_channel_state(&sp_to_isp, "SP to ISP"); + debug_print_fifo_channel_state(&isp_to_sp, "ISP to SP"); + return; +} + +void ia_css_debug_dump_isp_gdc_fifo_state(void) +{ + fifo_channel_state_t gdc_to_isp, isp_to_gdc; + + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_GDC0_TO_ISP0, &gdc_to_isp); + fifo_channel_get_state(FIFO_MONITOR0_ID, + FIFO_CHANNEL_ISP0_TO_GDC0, &isp_to_gdc); + debug_print_fifo_channel_state(&gdc_to_isp, "GDC to ISP"); + debug_print_fifo_channel_state(&isp_to_gdc, "ISP to GDC"); + return; +} + +void ia_css_debug_dump_all_fifo_state(void) +{ + int i; + fifo_monitor_state_t state; + fifo_monitor_get_state(FIFO_MONITOR0_ID, &state); + + for (i = 0; i < N_FIFO_CHANNEL; i++) + debug_print_fifo_channel_state(&(state.fifo_channels[i]), + "squepfstqkt"); + return; +} + +static void debug_binary_info_print(const struct ia_css_binary_xinfo *info) +{ + assert(info != NULL); + ia_css_debug_dtrace(2, "id = %d\n", info->sp.id); + ia_css_debug_dtrace(2, "mode = %d\n", info->sp.pipeline.mode); + ia_css_debug_dtrace(2, "max_input_width = %d\n", info->sp.input.max_width); + ia_css_debug_dtrace(2, "min_output_width = %d\n", + info->sp.output.min_width); + ia_css_debug_dtrace(2, "max_output_width = %d\n", + info->sp.output.max_width); + ia_css_debug_dtrace(2, "top_cropping = %d\n", info->sp.pipeline.top_cropping); + ia_css_debug_dtrace(2, "left_cropping = %d\n", info->sp.pipeline.left_cropping); + ia_css_debug_dtrace(2, "xmem_addr = %d\n", info->xmem_addr); + ia_css_debug_dtrace(2, "enable_vf_veceven = %d\n", + info->sp.enable.vf_veceven); + ia_css_debug_dtrace(2, "enable_dis = %d\n", info->sp.enable.dis); + ia_css_debug_dtrace(2, "enable_uds = %d\n", info->sp.enable.uds); + ia_css_debug_dtrace(2, "enable ds = %d\n", info->sp.enable.ds); + ia_css_debug_dtrace(2, "s3atbl_use_dmem = %d\n", info->sp.s3a.s3atbl_use_dmem); + return; +} + +void ia_css_debug_binary_print(const struct ia_css_binary *bi) +{ + unsigned int i; + debug_binary_info_print(bi->info); + ia_css_debug_dtrace(2, + "input: %dx%d, format = %d, padded width = %d\n", + bi->in_frame_info.res.width, + bi->in_frame_info.res.height, + bi->in_frame_info.format, + bi->in_frame_info.padded_width); + ia_css_debug_dtrace(2, + "internal :%dx%d, format = %d, padded width = %d\n", + bi->internal_frame_info.res.width, + bi->internal_frame_info.res.height, + bi->internal_frame_info.format, + bi->internal_frame_info.padded_width); + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + if (bi->out_frame_info[i].res.width != 0) { + ia_css_debug_dtrace(2, + "out%d: %dx%d, format = %d, padded width = %d\n", + i, + bi->out_frame_info[i].res.width, + bi->out_frame_info[i].res.height, + bi->out_frame_info[i].format, + bi->out_frame_info[i].padded_width); + } + } + ia_css_debug_dtrace(2, + "vf out: %dx%d, format = %d, padded width = %d\n", + bi->vf_frame_info.res.width, + bi->vf_frame_info.res.height, + bi->vf_frame_info.format, + bi->vf_frame_info.padded_width); + ia_css_debug_dtrace(2, "online = %d\n", bi->online); + ia_css_debug_dtrace(2, "input_buf_vectors = %d\n", + bi->input_buf_vectors); + ia_css_debug_dtrace(2, "deci_factor_log2 = %d\n", bi->deci_factor_log2); + ia_css_debug_dtrace(2, "vf_downscale_log2 = %d\n", + bi->vf_downscale_log2); + ia_css_debug_dtrace(2, "dis_deci_factor_log2 = %d\n", + bi->dis.deci_factor_log2); + ia_css_debug_dtrace(2, "dis hor coef num = %d\n", + bi->dis.coef.pad.width); + ia_css_debug_dtrace(2, "dis ver coef num = %d\n", + bi->dis.coef.pad.height); + ia_css_debug_dtrace(2, "dis hor proj num = %d\n", + bi->dis.proj.pad.height); + ia_css_debug_dtrace(2, "sctbl_width_per_color = %d\n", + bi->sctbl_width_per_color); + ia_css_debug_dtrace(2, "s3atbl_width = %d\n", bi->s3atbl_width); + ia_css_debug_dtrace(2, "s3atbl_height = %d\n", bi->s3atbl_height); + return; +} + +void ia_css_debug_frame_print(const struct ia_css_frame *frame, + const char *descr) +{ + char *data = NULL; + + assert(frame != NULL); + assert(descr != NULL); + + data = (char *)HOST_ADDRESS(frame->data); + ia_css_debug_dtrace(2, "frame %s (%p):\n", descr, frame); + ia_css_debug_dtrace(2, " resolution = %dx%d\n", + frame->info.res.width, frame->info.res.height); + ia_css_debug_dtrace(2, " padded width = %d\n", + frame->info.padded_width); + ia_css_debug_dtrace(2, " format = %d\n", frame->info.format); + ia_css_debug_dtrace(2, " is contiguous = %s\n", + frame->contiguous ? "yes" : "no"); + switch (frame->info.format) { + case IA_CSS_FRAME_FORMAT_NV12: + case IA_CSS_FRAME_FORMAT_NV16: + case IA_CSS_FRAME_FORMAT_NV21: + case IA_CSS_FRAME_FORMAT_NV61: + ia_css_debug_dtrace(2, " Y = %p\n", + data + frame->planes.nv.y.offset); + ia_css_debug_dtrace(2, " UV = %p\n", + data + frame->planes.nv.uv.offset); + break; + case IA_CSS_FRAME_FORMAT_YUYV: + case IA_CSS_FRAME_FORMAT_UYVY: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: + case IA_CSS_FRAME_FORMAT_YUV_LINE: + ia_css_debug_dtrace(2, " YUYV = %p\n", + data + frame->planes.yuyv.offset); + break; + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_YUV422: + case IA_CSS_FRAME_FORMAT_YUV444: + case IA_CSS_FRAME_FORMAT_YV12: + case IA_CSS_FRAME_FORMAT_YV16: + case IA_CSS_FRAME_FORMAT_YUV420_16: + case IA_CSS_FRAME_FORMAT_YUV422_16: + ia_css_debug_dtrace(2, " Y = %p\n", + data + frame->planes.yuv.y.offset); + ia_css_debug_dtrace(2, " U = %p\n", + data + frame->planes.yuv.u.offset); + ia_css_debug_dtrace(2, " V = %p\n", + data + frame->planes.yuv.v.offset); + break; + case IA_CSS_FRAME_FORMAT_RAW_PACKED: + ia_css_debug_dtrace(2, " RAW PACKED = %p\n", + data + frame->planes.raw.offset); + break; + case IA_CSS_FRAME_FORMAT_RAW: + ia_css_debug_dtrace(2, " RAW = %p\n", + data + frame->planes.raw.offset); + break; + case IA_CSS_FRAME_FORMAT_RGBA888: + case IA_CSS_FRAME_FORMAT_RGB565: + ia_css_debug_dtrace(2, " RGB = %p\n", + data + frame->planes.rgb.offset); + break; + case IA_CSS_FRAME_FORMAT_QPLANE6: + ia_css_debug_dtrace(2, " R = %p\n", + data + frame->planes.plane6.r.offset); + ia_css_debug_dtrace(2, " RatB = %p\n", + data + frame->planes.plane6.r_at_b.offset); + ia_css_debug_dtrace(2, " Gr = %p\n", + data + frame->planes.plane6.gr.offset); + ia_css_debug_dtrace(2, " Gb = %p\n", + data + frame->planes.plane6.gb.offset); + ia_css_debug_dtrace(2, " B = %p\n", + data + frame->planes.plane6.b.offset); + ia_css_debug_dtrace(2, " BatR = %p\n", + data + frame->planes.plane6.b_at_r.offset); + break; + case IA_CSS_FRAME_FORMAT_BINARY_8: + ia_css_debug_dtrace(2, " Binary data = %p\n", + data + frame->planes.binary.data.offset); + break; + default: + ia_css_debug_dtrace(2, " unknown frame type\n"); + break; + } + return; +} + +#if SP_DEBUG != SP_DEBUG_NONE + +void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state + *state) +{ + +#endif + +#if SP_DEBUG == SP_DEBUG_DUMP + + assert(state != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "current SP software counter: %d\n", + state->debug[0]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty output buffer queue head: 0x%x\n", + state->debug[1]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty output buffer queue tail: 0x%x\n", + state->debug[2]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty s3a buffer queue head: 0x%x\n", + state->debug[3]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty s3a buffer queue tail: 0x%x\n", + state->debug[4]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "full output buffer queue head: 0x%x\n", + state->debug[5]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "full output buffer queue tail: 0x%x\n", + state->debug[6]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "full s3a buffer queue head: 0x%x\n", + state->debug[7]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "full s3a buffer queue tail: 0x%x\n", + state->debug[8]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "event queue head: 0x%x\n", + state->debug[9]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "event queue tail: 0x%x\n", + state->debug[10]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "num of stages of current pipeline: 0x%x\n", + state->debug[11]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "DDR address of stage 1: 0x%x\n", + state->debug[12]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "DDR address of stage 2: 0x%x\n", + state->debug[13]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "current stage out_vf buffer idx: 0x%x\n", + state->debug[14]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "current stage output buffer idx: 0x%x\n", + state->debug[15]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "current stage s3a buffer idx: 0x%x\n", + state->debug[16]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first char of current stage name: 0x%x\n", + state->debug[17]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "current SP thread id: 0x%x\n", + state->debug[18]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty output buffer address 1: 0x%x\n", + state->debug[19]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty output buffer address 2: 0x%x\n", + state->debug[20]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty out_vf buffer address 1: 0x%x\n", + state->debug[21]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty out_vf buffer address 2: 0x%x\n", + state->debug[22]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty s3a_hi buffer address 1: 0x%x\n", + state->debug[23]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty s3a_hi buffer address 2: 0x%x\n", + state->debug[24]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty s3a_lo buffer address 1: 0x%x\n", + state->debug[25]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty s3a_lo buffer address 2: 0x%x\n", + state->debug[26]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty dis_hor buffer address 1: 0x%x\n", + state->debug[27]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty dis_hor buffer address 2: 0x%x\n", + state->debug[28]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty dis_ver buffer address 1: 0x%x\n", + state->debug[29]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty dis_ver buffer address 2: 0x%x\n", + state->debug[30]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "empty param buffer address: 0x%x\n", + state->debug[31]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect frame address: 0x%x\n", + state->debug[32]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect frame container address: 0x%x\n", + state->debug[33]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect frame container payload: 0x%x\n", + state->debug[34]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect s3a_hi address: 0x%x\n", + state->debug[35]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect s3a_hi container address: 0x%x\n", + state->debug[36]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect s3a_hi container payload: 0x%x\n", + state->debug[37]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect s3a_lo address: 0x%x\n", + state->debug[38]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect s3a_lo container address: 0x%x\n", + state->debug[39]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "first incorrect s3a_lo container payload: 0x%x\n", + state->debug[40]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "number of calling flash start function: 0x%x\n", + state->debug[41]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "number of calling flash close function: 0x%x\n", + state->debug[42]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "number of flashed frame: 0x%x\n", + state->debug[43]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "flash in use flag: 0x%x\n", + state->debug[44]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "number of update frame flashed flag: 0x%x\n", + state->debug[46]); + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "number of active threads: 0x%x\n", + state->debug[45]); + +#elif SP_DEBUG == SP_DEBUG_COPY + + /* Remember last_index because we only want to print new entries */ + static int last_index; + int sp_index = state->index; + int n; + + assert(state != NULL); + if (sp_index < last_index) { + /* SP has been reset */ + last_index = 0; + } + + if (last_index == 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "copy-trace init: sp_dbg_if_start_line=%d, " + "sp_dbg_if_start_column=%d, " + "sp_dbg_if_cropped_height=%d, " + "sp_debg_if_cropped_width=%d\n", + state->if_start_line, + state->if_start_column, + state->if_cropped_height, + state->if_cropped_width); + } + + if ((last_index + SH_CSS_SP_DBG_TRACE_DEPTH) < sp_index) { + /* last index can be multiple rounds behind */ + /* while trace size is only SH_CSS_SP_DBG_TRACE_DEPTH */ + last_index = sp_index - SH_CSS_SP_DBG_TRACE_DEPTH; + } + + for (n = last_index; n < sp_index; n++) { + int i = n % SH_CSS_SP_DBG_TRACE_DEPTH; + if (state->trace[i].frame != 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "copy-trace: frame=%d, line=%d, " + "pixel_distance=%d, " + "mipi_used_dword=%d, " + "sp_index=%d\n", + state->trace[i].frame, + state->trace[i].line, + state->trace[i].pixel_distance, + state->trace[i].mipi_used_dword, + state->trace[i].sp_index); + } + } + + last_index = sp_index; + +#elif SP_DEBUG == SP_DEBUG_TRACE + +/* + * This is just an example how TRACE_FILE_ID (see ia_css_debug.sp.h) will + * me mapped on the file name string. + * + * Adjust this to your trace case! + */ + static char const * const id2filename[8] = { + "param_buffer.sp.c | tagger.sp.c | pipe_data.sp.c", + "isp_init.sp.c", + "sp_raw_copy.hive.c", + "dma_configure.sp.c", + "sp.hive.c", + "event_proxy_sp.hive.c", + "circular_buffer.sp.c", + "frame_buffer.sp.c" + }; + +#if 1 + /* Example SH_CSS_SP_DBG_NR_OF_TRACES==1 */ + /* Adjust this to your trace case */ + static char const *trace_name[SH_CSS_SP_DBG_NR_OF_TRACES] = { + "default" + }; +#else + /* Example SH_CSS_SP_DBG_NR_OF_TRACES==4 */ + /* Adjust this to your trace case */ + static char const *trace_name[SH_CSS_SP_DBG_NR_OF_TRACES] = { + "copy", "preview/video", "capture", "acceleration" + }; +#endif + + /* Remember host_index_last because we only want to print new entries */ + static int host_index_last[SH_CSS_SP_DBG_NR_OF_TRACES] = { 0 }; + int t, n; + + assert(state != NULL); + + for (t = 0; t < SH_CSS_SP_DBG_NR_OF_TRACES; t++) { + int sp_index_last = state->index_last[t]; + + if (sp_index_last < host_index_last[t]) { + /* SP has been reset */ + host_index_last[t] = 0; + } + + if ((host_index_last[t] + SH_CSS_SP_DBG_TRACE_DEPTH) < + sp_index_last) { + /* last index can be multiple rounds behind */ + /* while trace size is only SH_CSS_SP_DBG_TRACE_DEPTH */ + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "Warning: trace %s has gap of %d " + "traces\n", + trace_name[t], + (sp_index_last - + (host_index_last[t] + + SH_CSS_SP_DBG_TRACE_DEPTH))); + + host_index_last[t] = + sp_index_last - SH_CSS_SP_DBG_TRACE_DEPTH; + } + + for (n = host_index_last[t]; n < sp_index_last; n++) { + int i = n % SH_CSS_SP_DBG_TRACE_DEPTH; + int l = state->trace[t][i].location & + ((1 << SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS) - 1); + int fid = state->trace[t][i].location >> + SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS; + int ts = state->trace[t][i].time_stamp; + + if (ts) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "%05d trace=%s, file=%s:%d, " + "data=0x%08x\n", + ts, + trace_name[t], + id2filename[fid], l, + state->trace[t][i].data); + } + } + host_index_last[t] = sp_index_last; + } + +#elif SP_DEBUG == SP_DEBUG_MINIMAL + int i; + int base = 0; + int limit = SH_CSS_NUM_SP_DEBUG; + int step = 1; + + assert(state != NULL); + + for (i = base; i < limit; i += step) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "sp_dbg_trace[%d] = %d\n", + i, state->debug[i]); + } +#endif + +#if SP_DEBUG != SP_DEBUG_NONE + + return; +} +#endif + +#if defined(HAS_INPUT_FORMATTER_VERSION_2) && !defined(HAS_NO_INPUT_FORMATTER) +static void debug_print_rx_mipi_port_state(mipi_port_state_t *state) +{ + int i; + unsigned int bits, infos; + + assert(state != NULL); + + bits = state->irq_status; + infos = ia_css_isys_rx_translate_irq_infos(bits); + + ia_css_debug_dtrace(2, "\t\t%-32s: (irq reg = 0x%X)\n", + "receiver errors", bits); + + if (infos & IA_CSS_RX_IRQ_INFO_BUFFER_OVERRUN) + ia_css_debug_dtrace(2, "\t\t\tbuffer overrun\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_SOT) + ia_css_debug_dtrace(2, "\t\t\tstart-of-transmission error\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_SOT_SYNC) + ia_css_debug_dtrace(2, "\t\t\tstart-of-transmission sync error\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_CONTROL) + ia_css_debug_dtrace(2, "\t\t\tcontrol error\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE) + ia_css_debug_dtrace(2, "\t\t\t2 or more ECC errors\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_CRC) + ia_css_debug_dtrace(2, "\t\t\tCRC mismatch\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID) + ia_css_debug_dtrace(2, "\t\t\tunknown error\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_FRAME_SYNC) + ia_css_debug_dtrace(2, "\t\t\tframe sync error\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_FRAME_DATA) + ia_css_debug_dtrace(2, "\t\t\tframe data error\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT) + ia_css_debug_dtrace(2, "\t\t\tdata timeout\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC) + ia_css_debug_dtrace(2, "\t\t\tunknown escape command entry\n"); + if (infos & IA_CSS_RX_IRQ_INFO_ERR_LINE_SYNC) + ia_css_debug_dtrace(2, "\t\t\tline sync error\n"); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "device_ready", state->device_ready); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "irq_status", state->irq_status); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "irq_enable", state->irq_enable); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "timeout_count", state->timeout_count); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "init_count", state->init_count); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "raw16_18", state->raw16_18); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "sync_count", state->sync_count); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "rx_count", state->rx_count); + + for (i = 0; i < MIPI_4LANE_CFG; i++) { + ia_css_debug_dtrace(2, "\t\t%-32s%d%-32s: %d\n", + "lane_sync_count[", i, "]", + state->lane_sync_count[i]); + } + + for (i = 0; i < MIPI_4LANE_CFG; i++) { + ia_css_debug_dtrace(2, "\t\t%-32s%d%-32s: %d\n", + "lane_rx_count[", i, "]", + state->lane_rx_count[i]); + } + + return; +} + +static void debug_print_rx_channel_state(rx_channel_state_t *state) +{ + int i; + + assert(state != NULL); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "compression_scheme0", state->comp_scheme0); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "compression_scheme1", state->comp_scheme1); + + for (i = 0; i < N_MIPI_FORMAT_CUSTOM; i++) { + ia_css_debug_dtrace(2, "\t\t%-32s%d: %d\n", + "MIPI Predictor ", i, state->pred[i]); + } + + for (i = 0; i < N_MIPI_FORMAT_CUSTOM; i++) { + ia_css_debug_dtrace(2, "\t\t%-32s%d: %d\n", + "MIPI Compressor ", i, state->comp[i]); + } + + return; +} + +static void debug_print_rx_state(receiver_state_t *state) +{ + int i; + + assert(state != NULL); + ia_css_debug_dtrace(2, "CSI Receiver State:\n"); + + ia_css_debug_dtrace(2, "\tConfiguration:\n"); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "fs_to_ls_delay", state->fs_to_ls_delay); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "ls_to_data_delay", state->ls_to_data_delay); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "data_to_le_delay", state->data_to_le_delay); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "le_to_fe_delay", state->le_to_fe_delay); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "fe_to_fs_delay", state->fe_to_fs_delay); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "le_to_fs_delay", state->le_to_fs_delay); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "is_two_ppc", state->is_two_ppc); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "backend_rst", state->backend_rst); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "raw18", state->raw18); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "force_raw8", state->force_raw8); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "raw16", state->raw16); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_gsp_acc_ovl", state->be_gsp_acc_ovl); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "be_srst", state->be_srst); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_is_two_ppc", state->be_is_two_ppc); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_comp_format0", state->be_comp_format0); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_comp_format1", state->be_comp_format1); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_comp_format2", state->be_comp_format2); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_comp_format3", state->be_comp_format3); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "be_sel", state->be_sel); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_raw16_config", state->be_raw16_config); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_raw18_config", state->be_raw18_config); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_force_raw8", state->be_force_raw8); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_irq_status", state->be_irq_status); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "be_irq_clear", state->be_irq_clear); + + /* mipi port state */ + for (i = 0; i < N_MIPI_PORT_ID; i++) { + ia_css_debug_dtrace(2, "\tMIPI Port %d State:\n", i); + + debug_print_rx_mipi_port_state(&state->mipi_port_state[i]); + } + /* end of mipi port state */ + + /* rx channel state */ + for (i = 0; i < N_RX_CHANNEL_ID; i++) { + ia_css_debug_dtrace(2, "\tRX Channel %d State:\n", i); + + debug_print_rx_channel_state(&state->rx_channel_state[i]); + } + /* end of rx channel state */ + + return; +} +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) +void ia_css_debug_dump_rx_state(void) +{ +#if defined(HAS_INPUT_FORMATTER_VERSION_2) && !defined(HAS_NO_INPUT_FORMATTER) + receiver_state_t state; + + receiver_get_state(RX0_ID, &state); + debug_print_rx_state(&state); +#endif +} +#endif + +void ia_css_debug_dump_sp_sw_debug_info(void) +{ +#if SP_DEBUG != SP_DEBUG_NONE + struct sh_css_sp_debug_state state; + + sh_css_sp_get_debug_state(&state); + ia_css_debug_print_sp_debug_state(&state); +#endif + ia_css_bufq_dump_queue_info(); + ia_css_pipeline_dump_thread_map_info(); + return; +} + +#if defined(USE_INPUT_SYSTEM_VERSION_2) +static void debug_print_isys_capture_unit_state(capture_unit_state_t *state) +{ + assert(state != NULL); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Packet_Length", state->Packet_Length); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Received_Length", state->Received_Length); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Received_Short_Packets", + state->Received_Short_Packets); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Received_Long_Packets", + state->Received_Long_Packets); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Last_Command", state->Last_Command); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Next_Command", state->Next_Command); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Last_Acknowledge", state->Last_Acknowledge); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Next_Acknowledge", state->Next_Acknowledge); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM_State_Info", state->FSM_State_Info); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "StartMode", state->StartMode); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Start_Addr", state->Start_Addr); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Mem_Region_Size", state->Mem_Region_Size); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Num_Mem_Regions", state->Num_Mem_Regions); + return; +} + +static void debug_print_isys_acquisition_unit_state( + acquisition_unit_state_t *state) +{ + assert(state != NULL); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Received_Short_Packets", + state->Received_Short_Packets); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Received_Long_Packets", + state->Received_Long_Packets); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Last_Command", state->Last_Command); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Next_Command", state->Next_Command); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Last_Acknowledge", state->Last_Acknowledge); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Next_Acknowledge", state->Next_Acknowledge); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "FSM_State_Info", state->FSM_State_Info); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Int_Cntr_Info", state->Int_Cntr_Info); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Start_Addr", state->Start_Addr); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Mem_Region_Size", state->Mem_Region_Size); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "Num_Mem_Regions", state->Num_Mem_Regions); +} + +static void debug_print_isys_ctrl_unit_state(ctrl_unit_state_t *state) +{ + assert(state != NULL); + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "last_cmd", state->last_cmd); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "next_cmd", state->next_cmd); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "last_ack", state->last_ack); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "next_ack", state->next_ack); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "top_fsm_state", state->top_fsm_state); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captA_fsm_state", state->captA_fsm_state); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captB_fsm_state", state->captB_fsm_state); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captC_fsm_state", state->captC_fsm_state); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "acq_fsm_state", state->acq_fsm_state); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captA_start_addr", state->captA_start_addr); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captB_start_addr", state->captB_start_addr); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captC_start_addr", state->captC_start_addr); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captA_mem_region_size", + state->captA_mem_region_size); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captB_mem_region_size", + state->captB_mem_region_size); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captC_mem_region_size", + state->captC_mem_region_size); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captA_num_mem_regions", + state->captA_num_mem_regions); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captB_num_mem_regions", + state->captB_num_mem_regions); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "captC_num_mem_regions", + state->captC_num_mem_regions); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "acq_start_addr", state->acq_start_addr); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "acq_mem_region_size", state->acq_mem_region_size); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "acq_num_mem_regions", state->acq_num_mem_regions); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "capt_reserve_one_mem_region", + state->capt_reserve_one_mem_region); + + return; +} + +static void debug_print_isys_state(input_system_state_t *state) +{ + int i; + + assert(state != NULL); + ia_css_debug_dtrace(2, "InputSystem State:\n"); + + /* configuration */ + ia_css_debug_dtrace(2, "\tConfiguration:\n"); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_multiCastA_sel", state->str_multicastA_sel); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_multicastB_sel", state->str_multicastB_sel); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_multicastC_sel", state->str_multicastC_sel); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_mux_sel", state->str_mux_sel); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_mon_status", state->str_mon_status); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_mon_irq_cond", state->str_mon_irq_cond); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_mon_irq_en", state->str_mon_irq_en); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "isys_srst", state->isys_srst); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "isys_slv_reg_srst", state->isys_slv_reg_srst); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_deint_portA_cnt", state->str_deint_portA_cnt); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "str_deint_portB_cnd", state->str_deint_portB_cnt); + /* end of configuration */ + + /* capture unit state */ + for (i = 0; i < N_CAPTURE_UNIT_ID; i++) { + capture_unit_state_t *capture_unit_state; + + ia_css_debug_dtrace(2, "\tCaptureUnit %d State:\n", i); + + capture_unit_state = &state->capture_unit[i]; + debug_print_isys_capture_unit_state(capture_unit_state); + } + /* end of capture unit state */ + + /* acquisition unit state */ + for (i = 0; i < N_ACQUISITION_UNIT_ID; i++) { + acquisition_unit_state_t *acquisition_unit_state; + + ia_css_debug_dtrace(2, "\tAcquisitionUnit %d State:\n", i); + + acquisition_unit_state = &state->acquisition_unit[i]; + debug_print_isys_acquisition_unit_state(acquisition_unit_state); + } + /* end of acquisition unit state */ + + /* control unit state */ + for (i = 0; i < N_CTRL_UNIT_ID; i++) { + ia_css_debug_dtrace(2, "\tControlUnit %d State:\n", i); + + debug_print_isys_ctrl_unit_state(&state->ctrl_unit_state[i]); + } + /* end of control unit state */ +} + +void ia_css_debug_dump_isys_state(void) +{ + input_system_state_t state; + + input_system_get_state(INPUT_SYSTEM0_ID, &state); + debug_print_isys_state(&state); + + return; +} +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) +void ia_css_debug_dump_isys_state(void) +{ + /* Android compilation fails if made a local variable + stack size on android is limited to 2k and this structure + is around 3.5K, in place of static malloc can be done but + if this call is made too often it will lead to fragment memory + versus a fixed allocation */ + static input_system_state_t state; + + input_system_get_state(INPUT_SYSTEM0_ID, &state); + input_system_dump_state(INPUT_SYSTEM0_ID, &state); +} +#endif + +void ia_css_debug_dump_debug_info(const char *context) +{ + if (context == NULL) + context = "No Context provided"; + + ia_css_debug_dtrace(2, "CSS Debug Info dump [Context = %s]\n", context); +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + ia_css_debug_dump_rx_state(); +#endif +#if !defined(HAS_NO_INPUT_FORMATTER) && defined(USE_INPUT_SYSTEM_VERSION_2) + ia_css_debug_dump_if_state(); +#endif + ia_css_debug_dump_isp_state(); + ia_css_debug_dump_isp_sp_fifo_state(); + ia_css_debug_dump_isp_gdc_fifo_state(); + ia_css_debug_dump_sp_state(); + ia_css_debug_dump_perf_counters(); + +#ifdef HAS_WATCHDOG_SP_THREAD_DEBUG + sh_css_dump_thread_wait_info(); + sh_css_dump_pipe_stage_info(); + sh_css_dump_pipe_stripe_info(); +#endif + ia_css_debug_dump_dma_isp_fifo_state(); + ia_css_debug_dump_dma_sp_fifo_state(); + ia_css_debug_dump_dma_state(); +#if defined(USE_INPUT_SYSTEM_VERSION_2) + ia_css_debug_dump_isys_state(); + + { + irq_controller_state_t state; + irq_controller_get_state(IRQ2_ID, &state); + + ia_css_debug_dtrace(2, "\t%-32s:\n", + "Input System IRQ Controller State"); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "irq_edge", state.irq_edge); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "irq_mask", state.irq_mask); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "irq_status", state.irq_status); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "irq_enable", state.irq_enable); + + ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", + "irq_level_not_pulse", + state.irq_level_not_pulse); + } +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) + ia_css_debug_dump_isys_state(); +#endif +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + ia_css_debug_tagger_state(); +#endif + return; +} + +/* this function is for debug use, it can make SP go to sleep + state after each frame, then user can dump the stable SP dmem. + this function can be called after ia_css_start_sp() + and before sh_css_init_buffer_queues() +*/ +void ia_css_debug_enable_sp_sleep_mode(enum ia_css_sp_sleep_mode mode) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_sp_sleep_mode; + + fw = &sh_css_sp_fw; + HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; + + (void)HIVE_ADDR_sp_sleep_mode; /* Suppres warnings in CRUN */ + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_sleep_mode), + (uint32_t) mode); +} + +void ia_css_debug_wake_up_sp(void) +{ + /*hrt_ctl_start(SP); */ + sp_ctrl_setbit(SP0_ID, SP_SC_REG, SP_START_BIT); +} + +#if !defined(IS_ISP_2500_SYSTEM) +#define FIND_DMEM_PARAMS_TYPE(stream, kernel, type) \ + (struct HRTCAT(HRTCAT(sh_css_isp_, type), _params) *) \ + findf_dmem_params(stream, offsetof(struct ia_css_memory_offsets, dmem.kernel)) + +#define FIND_DMEM_PARAMS(stream, kernel) FIND_DMEM_PARAMS_TYPE(stream, kernel, kernel) + +/* Find a stage that support the kernel and return the parameters for that kernel */ +static char * +findf_dmem_params(struct ia_css_stream *stream, short idx) +{ + int i; + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *pipe = stream->pipes[i]; + struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); + struct ia_css_pipeline_stage *stage; + for (stage = pipeline->stages; stage; stage = stage->next) { + struct ia_css_binary *binary = stage->binary; + short *offsets = (short *)&binary->info->mem_offsets.offsets.param->dmem; + short dmem_offset = offsets[idx]; + const struct ia_css_host_data *isp_data = + ia_css_isp_param_get_mem_init(&binary->mem_params, + IA_CSS_PARAM_CLASS_PARAM, IA_CSS_ISP_DMEM0); + if (dmem_offset < 0) + continue; + return &isp_data->address[dmem_offset]; + } + } + return NULL; +} +#endif + +void ia_css_debug_dump_isp_params(struct ia_css_stream *stream, + unsigned int enable) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "ISP PARAMETERS:\n"); +#if defined(IS_ISP_2500_SYSTEM) + (void)enable; + (void)stream; +#else + + assert(stream != NULL); + if ((enable & IA_CSS_DEBUG_DUMP_FPN) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_fpn_dump(FIND_DMEM_PARAMS(stream, fpn), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_OB) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_ob_dump(FIND_DMEM_PARAMS(stream, ob), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_SC) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_sc_dump(FIND_DMEM_PARAMS(stream, sc), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_WB) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_wb_dump(FIND_DMEM_PARAMS(stream, wb), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_DP) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_dp_dump(FIND_DMEM_PARAMS(stream, dp), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_BNR) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_bnr_dump(FIND_DMEM_PARAMS(stream, bnr), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_S3A) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_s3a_dump(FIND_DMEM_PARAMS(stream, s3a), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_DE) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_de_dump(FIND_DMEM_PARAMS(stream, de), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_YNR) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_nr_dump(FIND_DMEM_PARAMS_TYPE(stream, nr, ynr), IA_CSS_DEBUG_VERBOSE); + ia_css_yee_dump(FIND_DMEM_PARAMS(stream, yee), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_CSC) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_csc_dump(FIND_DMEM_PARAMS(stream, csc), IA_CSS_DEBUG_VERBOSE); + ia_css_yuv2rgb_dump(FIND_DMEM_PARAMS_TYPE(stream, yuv2rgb, csc), IA_CSS_DEBUG_VERBOSE); + ia_css_rgb2yuv_dump(FIND_DMEM_PARAMS_TYPE(stream, rgb2yuv, csc), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_GC) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_gc_dump(FIND_DMEM_PARAMS(stream, gc), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_TNR) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_tnr_dump(FIND_DMEM_PARAMS(stream, tnr), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_ANR) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_anr_dump(FIND_DMEM_PARAMS(stream, anr), IA_CSS_DEBUG_VERBOSE); + } + if ((enable & IA_CSS_DEBUG_DUMP_CE) + || (enable & IA_CSS_DEBUG_DUMP_ALL)) { + ia_css_ce_dump(FIND_DMEM_PARAMS(stream, ce), IA_CSS_DEBUG_VERBOSE); + } +#endif +} + +void sh_css_dump_sp_raw_copy_linecount(bool reduced) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_raw_copy_line_count; + int32_t raw_copy_line_count; + static int32_t prev_raw_copy_line_count = -1; + + fw = &sh_css_sp_fw; + HIVE_ADDR_raw_copy_line_count = + fw->info.sp.raw_copy_line_count; + + (void)HIVE_ADDR_raw_copy_line_count; + + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(raw_copy_line_count), + &raw_copy_line_count, + sizeof(raw_copy_line_count)); + + /* only indicate if copy loop is active */ + if (reduced) + raw_copy_line_count = (raw_copy_line_count < 0)?raw_copy_line_count:1; + /* do the handling */ + if (prev_raw_copy_line_count != raw_copy_line_count) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "sh_css_dump_sp_raw_copy_linecount() " + "line_count=%d\n", + raw_copy_line_count); + prev_raw_copy_line_count = raw_copy_line_count; + } +} + +void ia_css_debug_dump_isp_binary(void) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_pipeline_sp_curr_binary_id; + uint32_t curr_binary_id; + static uint32_t prev_binary_id = 0xFFFFFFFF; + static uint32_t sample_count; + + fw = &sh_css_sp_fw; + HIVE_ADDR_pipeline_sp_curr_binary_id = fw->info.sp.curr_binary_id; + + (void)HIVE_ADDR_pipeline_sp_curr_binary_id; + + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(pipeline_sp_curr_binary_id), + &curr_binary_id, + sizeof(curr_binary_id)); + + /* do the handling */ + sample_count++; + if (prev_binary_id != curr_binary_id) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "sh_css_dump_isp_binary() " + "pipe_id=%d, binary_id=%d, sample_count=%d\n", + (curr_binary_id >> 16), + (curr_binary_id & 0x0ffff), + sample_count); + sample_count = 0; + prev_binary_id = curr_binary_id; + } +} + +void ia_css_debug_dump_perf_counters(void) +{ +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + const struct ia_css_fw_info *fw; + int i; + unsigned int HIVE_ADDR_ia_css_isys_sp_error_cnt; + int32_t ia_css_sp_input_system_error_cnt[N_MIPI_PORT_ID + 1]; /* 3 Capture Units and 1 Acquire Unit. */ + + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "Input System Error Counters:\n"); + + fw = &sh_css_sp_fw; + HIVE_ADDR_ia_css_isys_sp_error_cnt = fw->info.sp.perf_counter_input_system_error; + + (void)HIVE_ADDR_ia_css_isys_sp_error_cnt; + + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(ia_css_isys_sp_error_cnt), + &ia_css_sp_input_system_error_cnt, + sizeof(ia_css_sp_input_system_error_cnt)); + + for (i = 0; i < N_MIPI_PORT_ID + 1; i++) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "\tport[%d] = %d\n", + i, ia_css_sp_input_system_error_cnt[i]); + } +#endif +} + +/* + +void sh_css_init_ddr_debug_queue(void) +{ + hrt_vaddress ddr_debug_queue_addr = + mmgr_malloc(sizeof(debug_data_ddr_t)); + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_debug_buffer_ddr_address; + + fw = &sh_css_sp_fw; + HIVE_ADDR_debug_buffer_ddr_address = + fw->info.sp.debug_buffer_ddr_address; + + (void)HIVE_ADDR_debug_buffer_ddr_address; + + debug_buffer_ddr_init(ddr_debug_queue_addr); + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(debug_buffer_ddr_address), + (uint32_t)(ddr_debug_queue_addr)); +} + +void sh_css_load_ddr_debug_queue(void) +{ + debug_synch_queue_ddr(); +} + +void ia_css_debug_dump_ddr_debug_queue(void) +{ + int i; + sh_css_load_ddr_debug_queue(); + for (i = 0; i < DEBUG_BUF_SIZE; i++) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "ddr_debug_queue[%d] = 0x%x\n", + i, debug_data_ptr->buf[i]); + } +} +*/ + +/* + * @brief Initialize the debug mode. + * Refer to "ia_css_debug.h" for more details. + */ +bool ia_css_debug_mode_init(void) +{ + bool rc; + rc = sh_css_sp_init_dma_sw_reg(0); + return rc; +} + +/* + * @brief Disable the DMA channel. + * Refer to "ia_css_debug.h" for more details. + */ +bool +ia_css_debug_mode_disable_dma_channel(int dma_id, + int channel_id, int request_type) +{ + bool rc; + + rc = sh_css_sp_set_dma_sw_reg(dma_id, channel_id, request_type, false); + + return rc; +} + +/* + * @brief Enable the DMA channel. + * Refer to "ia_css_debug.h" for more details. + */ +bool +ia_css_debug_mode_enable_dma_channel(int dma_id, + int channel_id, int request_type) +{ + bool rc; + + rc = sh_css_sp_set_dma_sw_reg(dma_id, channel_id, request_type, true); + + return rc; +} + +static +void dtrace_dot(const char *fmt, ...) +{ + va_list ap; + + assert(fmt != NULL); + va_start(ap, fmt); + + ia_css_debug_dtrace(IA_CSS_DEBUG_INFO, "%s", DPG_START); + ia_css_debug_vdtrace(IA_CSS_DEBUG_INFO, fmt, ap); + ia_css_debug_dtrace(IA_CSS_DEBUG_INFO, "%s", DPG_END); + va_end(ap); +} +#ifdef HAS_WATCHDOG_SP_THREAD_DEBUG +void sh_css_dump_thread_wait_info(void) +{ + const struct ia_css_fw_info *fw; + int i; + unsigned int HIVE_ADDR_sp_thread_wait; + int32_t sp_thread_wait[MAX_THREAD_NUM]; + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "SEM WAITS:\n"); + + fw = &sh_css_sp_fw; + HIVE_ADDR_sp_thread_wait = + fw->info.sp.debug_wait; + + (void)HIVE_ADDR_sp_thread_wait; + + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(sp_thread_wait), + &sp_thread_wait, + sizeof(sp_thread_wait)); + for (i = 0; i < MAX_THREAD_NUM; i++) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "\twait[%d] = 0x%X\n", + i, sp_thread_wait[i]); + } + +} + +void sh_css_dump_pipe_stage_info(void) +{ + const struct ia_css_fw_info *fw; + int i; + unsigned int HIVE_ADDR_sp_pipe_stage; + int32_t sp_pipe_stage[MAX_THREAD_NUM]; + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "PIPE STAGE:\n"); + + fw = &sh_css_sp_fw; + HIVE_ADDR_sp_pipe_stage = + fw->info.sp.debug_stage; + + (void)HIVE_ADDR_sp_pipe_stage; + + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(sp_pipe_stage), + &sp_pipe_stage, + sizeof(sp_pipe_stage)); + for (i = 0; i < MAX_THREAD_NUM; i++) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "\tstage[%d] = %d\n", + i, sp_pipe_stage[i]); + } + +} + +void sh_css_dump_pipe_stripe_info(void) +{ + const struct ia_css_fw_info *fw; + int i; + unsigned int HIVE_ADDR_sp_pipe_stripe; + int32_t sp_pipe_stripe[MAX_THREAD_NUM]; + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "PIPE STRIPE:\n"); + + fw = &sh_css_sp_fw; + HIVE_ADDR_sp_pipe_stripe = + fw->info.sp.debug_stripe; + + (void)HIVE_ADDR_sp_pipe_stripe; + + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(sp_pipe_stripe), + &sp_pipe_stripe, + sizeof(sp_pipe_stripe)); + for (i = 0; i < MAX_THREAD_NUM; i++) { + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, + "\tstripe[%d] = %d\n", + i, sp_pipe_stripe[i]); + } + +} +#endif + +static void +ia_css_debug_pipe_graph_dump_frame( + struct ia_css_frame *frame, + enum ia_css_pipe_id id, + char const *blob_name, + char const *frame_name, + bool in_frame) +{ + char bufinfo[100]; + + if (frame->dynamic_queue_id == SH_CSS_INVALID_QUEUE_ID) { + snprintf(bufinfo, sizeof(bufinfo), "Internal"); + } else { + snprintf(bufinfo, sizeof(bufinfo), "Queue: %s %s", + pipe_id_to_str[id], + queue_id_to_str[frame->dynamic_queue_id]); + } + dtrace_dot( + "node [shape = box, " + "fixedsize=true, width=2, height=0.7]; \"%p\" " + "[label = \"%s\\n%d(%d) x %d, %dbpp\\n%s\"];", + frame, + debug_frame_format2str(frame->info.format), + frame->info.res.width, + frame->info.padded_width, + frame->info.res.height, + frame->info.raw_bit_depth, + bufinfo); + + if (in_frame) { + dtrace_dot( + "\"%p\"->\"%s(pipe%d)\" " + "[label = %s_frame];", + frame, + blob_name, id, frame_name); + } else { + dtrace_dot( + "\"%s(pipe%d)\"->\"%p\" " + "[label = %s_frame];", + blob_name, id, + frame, + frame_name); + } +} + +void +ia_css_debug_pipe_graph_dump_prologue(void) +{ + dtrace_dot("digraph sh_css_pipe_graph {"); + dtrace_dot("rankdir=LR;"); + + dtrace_dot("fontsize=9;"); + dtrace_dot("label = \"\\nEnable options: rp=reduced pipe, vfve=vf_veceven, " + "dvse=dvs_envelope, dvs6=dvs_6axis, bo=block_out, " + "fbds=fixed_bayer_ds, bf6=bayer_fir_6db, " + "rawb=raw_binning, cont=continuous, disc=dis_crop\\n" + "dp2a=dp_2adjacent, outp=output, outt=out_table, " + "reff=ref_frame, par=params, gam=gamma, " + "cagdc=ca_gdc, ispa=isp_addresses, inf=in_frame, " + "outf=out_frame, hs=high_speed, inpc=input_chunking\""); +} + +void ia_css_debug_pipe_graph_dump_epilogue(void) +{ + + if (strlen(ring_buffer) > 0) { + dtrace_dot(ring_buffer); + } + + + if (pg_inst.stream_format != N_ATOMISP_INPUT_FORMAT) { + /* An input stream format has been set so assume we have + * an input system and sensor + */ + + + dtrace_dot( + "node [shape = doublecircle, " + "fixedsize=true, width=2.5]; \"input_system\" " + "[label = \"Input system\"];"); + + dtrace_dot( + "\"input_system\"->\"%s\" " + "[label = \"%s\"];", + dot_id_input_bin, debug_stream_format2str(pg_inst.stream_format)); + + dtrace_dot( + "node [shape = doublecircle, " + "fixedsize=true, width=2.5]; \"sensor\" " + "[label = \"Sensor\"];"); + + dtrace_dot( + "\"sensor\"->\"input_system\" " + "[label = \"%s\\n%d x %d\\n(%d x %d)\"];", + debug_stream_format2str(pg_inst.stream_format), + pg_inst.width, pg_inst.height, + pg_inst.eff_width, pg_inst.eff_height); + } + + dtrace_dot("}"); + + /* Reset temp strings */ + memset(dot_id_input_bin, 0, sizeof(dot_id_input_bin)); + memset(ring_buffer, 0, sizeof(ring_buffer)); + + pg_inst.do_init = true; + pg_inst.width = 0; + pg_inst.height = 0; + pg_inst.eff_width = 0; + pg_inst.eff_height = 0; + pg_inst.stream_format = N_ATOMISP_INPUT_FORMAT; +} + +void +ia_css_debug_pipe_graph_dump_stage( + struct ia_css_pipeline_stage *stage, + enum ia_css_pipe_id id) +{ + char blob_name[SH_CSS_MAX_BINARY_NAME+10] = ""; + char const *bin_type = ""; + int i; + + assert(stage != NULL); + if (stage->sp_func != IA_CSS_PIPELINE_NO_FUNC) + return; + + if (pg_inst.do_init) { + ia_css_debug_pipe_graph_dump_prologue(); + pg_inst.do_init = false; + } + + if (stage->binary) { + bin_type = "binary"; + if (stage->binary->info->blob) + snprintf(blob_name, sizeof(blob_name), "%s_stage%d", + stage->binary->info->blob->name, stage->stage_num); + } else if (stage->firmware) { + bin_type = "firmware"; + strncpy_s(blob_name, sizeof(blob_name), IA_CSS_EXT_ISP_PROG_NAME(stage->firmware), sizeof(blob_name)); + } + + /* Guard in case of binaries that don't have any binary_info */ + if (stage->binary_info != NULL) { + char enable_info1[100]; + char enable_info2[100]; + char enable_info3[100]; + char enable_info[200]; + struct ia_css_binary_info *bi = stage->binary_info; + + /* Split it in 2 function-calls to keep the amount of + * parameters per call "reasonable" + */ + snprintf(enable_info1, sizeof(enable_info1), + "%s%s%s%s%s%s%s%s%s%s%s%s%s%s", + bi->enable.reduced_pipe ? "rp," : "", + bi->enable.vf_veceven ? "vfve," : "", + bi->enable.dis ? "dis," : "", + bi->enable.dvs_envelope ? "dvse," : "", + bi->enable.uds ? "uds," : "", + bi->enable.dvs_6axis ? "dvs6," : "", + bi->enable.block_output ? "bo," : "", + bi->enable.ds ? "ds," : "", + bi->enable.bayer_fir_6db ? "bf6," : "", + bi->enable.raw_binning ? "rawb," : "", + bi->enable.continuous ? "cont," : "", + bi->enable.s3a ? "s3a," : "", + bi->enable.fpnr ? "fpnr," : "", + bi->enable.sc ? "sc," : "" + ); + + snprintf(enable_info2, sizeof(enable_info2), + "%s%s%s%s%s%s%s%s%s%s%s", + bi->enable.macc ? "macc," : "", + bi->enable.output ? "outp," : "", + bi->enable.ref_frame ? "reff," : "", + bi->enable.tnr ? "tnr," : "", + bi->enable.xnr ? "xnr," : "", + bi->enable.params ? "par," : "", + bi->enable.ca_gdc ? "cagdc," : "", + bi->enable.isp_addresses ? "ispa," : "", + bi->enable.in_frame ? "inf," : "", + bi->enable.out_frame ? "outf," : "", + bi->enable.high_speed ? "hs," : "" + ); + + /* And merge them into one string */ + snprintf(enable_info, sizeof(enable_info), "%s%s", + enable_info1, enable_info2); + { + int l, p; + char *ei = enable_info; + + l = strlen(ei); + + /* Replace last ',' with \0 if present */ + if (l && enable_info[l-1] == ',') + enable_info[--l] = '\0'; + + if (l > ENABLE_LINE_MAX_LENGTH) { + /* Too big for one line, find last comma */ + p = ENABLE_LINE_MAX_LENGTH; + while (ei[p] != ',') + p--; + /* Last comma found, copy till that comma */ + strncpy_s(enable_info1, + sizeof(enable_info1), + ei, p); + enable_info1[p] = '\0'; + + ei += p+1; + l = strlen(ei); + + if (l <= ENABLE_LINE_MAX_LENGTH) { + /* The 2nd line fits */ + /* we cannot use ei as argument because + * it is not guarenteed dword aligned + */ + strncpy_s(enable_info2, + sizeof(enable_info2), + ei, l); + enable_info2[l] = '\0'; + snprintf(enable_info, sizeof(enable_info), "%s\\n%s", + enable_info1, enable_info2); + + } else { + /* 2nd line is still too long */ + p = ENABLE_LINE_MAX_LENGTH; + while (ei[p] != ',') + p--; + strncpy_s(enable_info2, + sizeof(enable_info2), + ei, p); + enable_info2[p] = '\0'; + ei += p+1; + l = strlen(ei); + + if (l <= ENABLE_LINE_MAX_LENGTH) { + /* The 3rd line fits */ + /* we cannot use ei as argument because + * it is not guarenteed dword aligned + */ + strcpy_s(enable_info3, + sizeof(enable_info3), ei); + enable_info3[l] = '\0'; + snprintf(enable_info, sizeof(enable_info), + "%s\\n%s\\n%s", + enable_info1, enable_info2, + enable_info3); + } else { + /* 3rd line is still too long */ + p = ENABLE_LINE_MAX_LENGTH; + while (ei[p] != ',') + p--; + strncpy_s(enable_info3, + sizeof(enable_info3), + ei, p); + enable_info3[p] = '\0'; + ei += p+1; + strcpy_s(enable_info3, + sizeof(enable_info3), ei); + snprintf(enable_info, sizeof(enable_info), + "%s\\n%s\\n%s", + enable_info1, enable_info2, + enable_info3); + } + } + } + } + + dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, " + "label=\"%s\\n%s\\n\\n%s\"]; \"%s(pipe%d)\"", + bin_type, blob_name, enable_info, blob_name, id); + + } + else { + dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, " + "label=\"%s\\n%s\\n\"]; \"%s(pipe%d)\"", + bin_type, blob_name, blob_name, id); + } + + if (stage->stage_num == 0) { + /* + * There are some implicite assumptions about which bin is the + * input binary e.g. which one is connected to the input system + * Priority: + * 1) sp_raw_copy bin has highest priority + * 2) First stage==0 binary of preview, video or capture + */ + if (strlen(dot_id_input_bin) == 0) { + snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), + "%s(pipe%d)", blob_name, id); + } + } + + if (stage->args.in_frame) { + ia_css_debug_pipe_graph_dump_frame( + stage->args.in_frame, id, blob_name, + "in", true); + } + +#ifndef ISP2401 + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { +#else + for (i = 0; i < NUM_TNR_FRAMES; i++) { +#endif + if (stage->args.tnr_frames[i]) { + ia_css_debug_pipe_graph_dump_frame( + stage->args.tnr_frames[i], id, + blob_name, "tnr_frame", true); + } + } + + for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) { + if (stage->args.delay_frames[i]) { + ia_css_debug_pipe_graph_dump_frame( + stage->args.delay_frames[i], id, + blob_name, "delay_frame", true); + } + } + + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + if (stage->args.out_frame[i]) { + ia_css_debug_pipe_graph_dump_frame( + stage->args.out_frame[i], id, blob_name, + "out", false); + } + } + + if (stage->args.out_vf_frame) { + ia_css_debug_pipe_graph_dump_frame( + stage->args.out_vf_frame, id, blob_name, + "out_vf", false); + } +} + +void +ia_css_debug_pipe_graph_dump_sp_raw_copy( + struct ia_css_frame *out_frame) +{ + assert(out_frame != NULL); + if (pg_inst.do_init) { + ia_css_debug_pipe_graph_dump_prologue(); + pg_inst.do_init = false; + } + + dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, " + "label=\"%s\\n%s\"]; \"%s(pipe%d)\"", + "sp-binary", "sp_raw_copy", "sp_raw_copy", 1); + + snprintf(ring_buffer, sizeof(ring_buffer), + "node [shape = box, " + "fixedsize=true, width=2, height=0.7]; \"%p\" " + "[label = \"%s\\n%d(%d) x %d\\nRingbuffer\"];", + out_frame, + debug_frame_format2str(out_frame->info.format), + out_frame->info.res.width, + out_frame->info.padded_width, + out_frame->info.res.height); + + dtrace_dot(ring_buffer); + + dtrace_dot( + "\"%s(pipe%d)\"->\"%p\" " + "[label = out_frame];", + "sp_raw_copy", 1, out_frame); + + snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), "%s(pipe%d)", "sp_raw_copy", 1); +} + +void +ia_css_debug_pipe_graph_dump_stream_config( + const struct ia_css_stream_config *stream_config) +{ + pg_inst.width = stream_config->input_config.input_res.width; + pg_inst.height = stream_config->input_config.input_res.height; + pg_inst.eff_width = stream_config->input_config.effective_res.width; + pg_inst.eff_height = stream_config->input_config.effective_res.height; + pg_inst.stream_format = stream_config->input_config.format; +} + +void +ia_css_debug_dump_resolution( + const struct ia_css_resolution *res, + const char *label) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s: =%d x =%d\n", + label, res->width, res->height); +} + +void +ia_css_debug_dump_frame_info( + const struct ia_css_frame_info *info, + const char *label) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", label); + ia_css_debug_dump_resolution(&info->res, "res"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "padded_width: %d\n", + info->padded_width); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "format: %d\n", info->format); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "raw_bit_depth: %d\n", + info->raw_bit_depth); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "raw_bayer_order: %d\n", + info->raw_bayer_order); +} + +void +ia_css_debug_dump_capture_config( + const struct ia_css_capture_config *config) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", __func__); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_xnr: %d\n", + config->enable_xnr); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_raw_output: %d\n", + config->enable_raw_output); +} + +void +ia_css_debug_dump_pipe_extra_config( + const struct ia_css_pipe_extra_config *extra_config) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", __func__); + if (extra_config) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "enable_raw_binning: %d\n", + extra_config->enable_raw_binning); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_yuv_ds: %d\n", + extra_config->enable_yuv_ds); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "enable_high_speed: %d\n", + extra_config->enable_high_speed); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "enable_dvs_6axis: %d\n", + extra_config->enable_dvs_6axis); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "enable_reduced_pipe: %d\n", + extra_config->enable_reduced_pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "enable_fractional_ds: %d\n", + extra_config->enable_fractional_ds); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "disable_vf_pp: %d\n", + extra_config->disable_vf_pp); + } +} + +void +ia_css_debug_dump_pipe_config( + const struct ia_css_pipe_config *config) +{ + unsigned int i; + + IA_CSS_ENTER_PRIVATE("config = %p", config); + if (!config) { + IA_CSS_ERROR("NULL input parameter"); + IA_CSS_LEAVE_PRIVATE(""); + return; + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "isp_pipe_version: %d\n", + config->isp_pipe_version); + ia_css_debug_dump_resolution(&config->bayer_ds_out_res, + "bayer_ds_out_res"); + ia_css_debug_dump_resolution(&config->capt_pp_in_res, + "capt_pp_in_res"); + ia_css_debug_dump_resolution(&config->vf_pp_in_res, "vf_pp_in_res"); +#ifdef ISP2401 + ia_css_debug_dump_resolution(&config->output_system_in_res, + "output_system_in_res"); +#endif + ia_css_debug_dump_resolution(&config->dvs_crop_out_res, + "dvs_crop_out_res"); + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + ia_css_debug_dump_frame_info(&config->output_info[i], "output_info"); + ia_css_debug_dump_frame_info(&config->vf_output_info[i], + "vf_output_info"); + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "acc_extension: %p\n", + config->acc_extension); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_acc_stages: %d\n", + config->num_acc_stages); + ia_css_debug_dump_capture_config(&config->default_capture_config); + ia_css_debug_dump_resolution(&config->dvs_envelope, "dvs_envelope"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "dvs_frame_delay: %d\n", + config->dvs_frame_delay); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "acc_num_execs: %d\n", + config->acc_num_execs); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_dz: %d\n", + config->enable_dz); + IA_CSS_LEAVE_PRIVATE(""); +} + +void +ia_css_debug_dump_stream_config_source( + const struct ia_css_stream_config *config) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); + switch (config->mode) { + case IA_CSS_INPUT_MODE_SENSOR: + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.port\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "port: %d\n", + config->source.port.port); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_lanes: %d\n", + config->source.port.num_lanes); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "timeout: %d\n", + config->source.port.timeout); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "compression: %d\n", + config->source.port.compression.type); + break; + case IA_CSS_INPUT_MODE_TPG: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.tpg\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "id: %d\n", + config->source.tpg.id); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", + config->source.tpg.mode); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x_mask: 0x%x\n", + config->source.tpg.x_mask); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x_delta: %d\n", + config->source.tpg.x_delta); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "y_mask: 0x%x\n", + config->source.tpg.y_mask); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "y_delta: %d\n", + config->source.tpg.y_delta); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "xy_mask: 0x%x\n", + config->source.tpg.xy_mask); + break; + case IA_CSS_INPUT_MODE_PRBS: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.prbs\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "id: %d\n", + config->source.prbs.id); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "h_blank: %d\n", + config->source.prbs.h_blank); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "v_blank: %d\n", + config->source.prbs.v_blank); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "seed: 0x%x\n", + config->source.prbs.seed); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "seed1: 0x%x\n", + config->source.prbs.seed1); + break; + default: + case IA_CSS_INPUT_MODE_FIFO: + case IA_CSS_INPUT_MODE_MEMORY: + break; + } +} + +void +ia_css_debug_dump_mipi_buffer_config( + const struct ia_css_mipi_buffer_config *config) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "size_mem_words: %d\n", + config->size_mem_words); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "nof_mipi_buffers: %d\n", + config->nof_mipi_buffers); +} + +void +ia_css_debug_dump_metadata_config( + const struct ia_css_metadata_config *config) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "data_type: %d\n", + config->data_type); + ia_css_debug_dump_resolution(&config->resolution, "resolution"); +} + +void +ia_css_debug_dump_stream_config( + const struct ia_css_stream_config *config, + int num_pipes) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_pipes: %d\n", num_pipes); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); + ia_css_debug_dump_stream_config_source(config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "channel_id: %d\n", + config->channel_id); + ia_css_debug_dump_resolution(&config->input_config.input_res, "input_res"); + ia_css_debug_dump_resolution(&config->input_config.effective_res, "effective_res"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "format: %d\n", + config->input_config.format); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "bayer_order: %d\n", + config->input_config.bayer_order); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sensor_binning_factor: %d\n", + config->sensor_binning_factor); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "pixels_per_clock: %d\n", + config->pixels_per_clock); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "online: %d\n", + config->online); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "init_num_cont_raw_buf: %d\n", + config->init_num_cont_raw_buf); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "target_num_cont_raw_buf: %d\n", + config->target_num_cont_raw_buf); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "pack_raw_pixels: %d\n", + config->pack_raw_pixels); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "continuous: %d\n", + config->continuous); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "flash_gpio_pin: %d\n", + config->flash_gpio_pin); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "left_padding: %d\n", + config->left_padding); + ia_css_debug_dump_mipi_buffer_config(&config->mipi_buffer_config); + ia_css_debug_dump_metadata_config(&config->metadata_config); +} + +/* + Trace support. + + This tracer is using a buffer to trace the flow of the FW and dump misc values (see below for details). + Currently, support is only for SKC. + To enable support for other platforms: + - Allocate a buffer for tracing in DMEM. The longer the better. + - Use the DBG_init routine in sp.hive.c to initiatilize the tracer with the address and size selected. + - Add trace points in the SP code wherever needed. + - Enable the dump below with the required address and required adjustments. + Dump is called at the end of ia_css_debug_dump_sp_state(). +*/ + +/* + dump_trace() : dump the trace points from DMEM2. + for every trace point, the following are printed: index, major:minor and the 16-bit attached value. + The routine looks for the first 0, and then prints from it cyclically. + Data forma in DMEM2: + first 4 DWORDS: header + DWORD 0: data description + byte 0: version + byte 1: number of threads (for future use) + byte 2+3: number ot TPs + DWORD 1: command byte + data (for future use) + byte 0: command + byte 1-3: command signature + DWORD 2-3: additional data (for future use) + Following data is 4-byte oriented: + byte 0: major + byte 1: minor + byte 2-3: data +*/ +#if TRACE_ENABLE_SP0 || TRACE_ENABLE_SP1 || TRACE_ENABLE_ISP +#ifndef ISP2401 +static void debug_dump_one_trace(TRACE_CORE_ID proc_id) +#else +static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) +#endif +{ +#if defined(HAS_TRACER_V2) + uint32_t start_addr; + uint32_t start_addr_data; + uint32_t item_size; +#ifndef ISP2401 + uint32_t tmp; +#else + uint8_t tid_val; + enum TRACE_DUMP_FORMAT dump_format; +#endif + int i, j, max_trace_points, point_num, limit = -1; + /* using a static buffer here as the driver has issues allocating memory */ + static uint32_t trace_read_buf[TRACE_BUFF_SIZE] = {0}; +#ifdef ISP2401 + static struct trace_header_t header; + uint8_t *header_arr; +#endif + + /* read the header and parse it */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "~~~ Tracer "); + switch (proc_id) + { + case TRACE_SP0_ID: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP0"); + start_addr = TRACE_SP0_ADDR; + start_addr_data = TRACE_SP0_DATA_ADDR; + item_size = TRACE_SP0_ITEM_SIZE; + max_trace_points = TRACE_SP0_MAX_POINTS; + break; + case TRACE_SP1_ID: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP1"); + start_addr = TRACE_SP1_ADDR; + start_addr_data = TRACE_SP1_DATA_ADDR; + item_size = TRACE_SP1_ITEM_SIZE; + max_trace_points = TRACE_SP1_MAX_POINTS; + break; + case TRACE_ISP_ID: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ISP"); + start_addr = TRACE_ISP_ADDR; + start_addr_data = TRACE_ISP_DATA_ADDR; + item_size = TRACE_ISP_ITEM_SIZE; + max_trace_points = TRACE_ISP_MAX_POINTS; + break; + default: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\ttraces are not supported for this processor ID - exiting\n"); + return; + } +#ifndef ISP2401 + tmp = ia_css_device_load_uint32(start_addr); + point_num = (tmp >> 16) & 0xFFFF; +#endif + +#ifndef ISP2401 + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", tmp & 0xFF, point_num); + if ((tmp & 0xFF) != TRACER_VER) { +#else + /* Loading byte-by-byte as using the master routine had issues */ + header_arr = (uint8_t *)&header; + for (i = 0; i < (int)sizeof(struct trace_header_t); i++) + header_arr[i] = ia_css_device_load_uint8(start_addr + (i)); + + point_num = header.max_tracer_points; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", header.version, point_num); + if ((header.version & 0xFF) != TRACER_VER) { +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tUnknown version - exiting\n"); + return; + } + if (point_num > max_trace_points) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tToo many points - exiting\n"); + return; + } + /* copy the TPs and find the first 0 */ + for (i = 0; i < point_num; i++) { + trace_read_buf[i] = ia_css_device_load_uint32(start_addr_data + (i * item_size)); + if ((limit == (-1)) && (trace_read_buf[i] == 0)) + limit = i; + } +#ifdef ISP2401 + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Status:\n"); + for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\tT%d: %3d (%02x) %6d (%04x) %10d (%08x)\n", i, + header.thr_status_byte[i], header.thr_status_byte[i], + header.thr_status_word[i], header.thr_status_word[i], + header.thr_status_dword[i], header.thr_status_dword[i]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Scratch:\n"); + for (i = 0; i < MAX_SCRATCH_DATA; i++) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%10d (%08x) ", + header.scratch_debug[i], header.scratch_debug[i]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\n"); + +#endif + /* two 0s in the beginning: empty buffer */ + if ((trace_read_buf[0] == 0) && (trace_read_buf[1] == 0)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tEmpty tracer - exiting\n"); + return; + } + /* no overrun: start from 0 */ + if ((limit == point_num-1) || /* first 0 is at the end - border case */ + (trace_read_buf[limit+1] == 0)) /* did not make a full cycle after the memset */ + limit = 0; + /* overrun: limit is the first non-zero after the first zero */ + else + limit++; + + /* print the TPs */ + for (i = 0; i < point_num; i++) { + j = (limit + i) % point_num; + if (trace_read_buf[j]) + { +#ifndef ISP2401 + TRACE_DUMP_FORMAT dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); +#else + + tid_val = FIELD_TID_UNPACK(trace_read_buf[j]); + dump_format = TRACE_DUMP_FORMAT_POINT; + + /* + * When tid value is 111b, the data will be interpreted differently: + * tid val is ignored, major field contains 2 bits (msb) for format type + */ + if (tid_val == FIELD_TID_SEL_FORMAT_PAT) { + dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); + } +#endif + switch (dump_format) + { + case TRACE_DUMP_FORMAT_POINT: + ia_css_debug_dtrace( +#ifndef ISP2401 + IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %d\n", + j, FIELD_MAJOR_UNPACK(trace_read_buf[j]), +#else + IA_CSS_DEBUG_TRACE, "\t\t%d T%d %d:%d value - %x (%d)\n", + j, + tid_val, + FIELD_MAJOR_UNPACK(trace_read_buf[j]), +#endif + FIELD_MINOR_UNPACK(trace_read_buf[j]), +#ifdef ISP2401 + FIELD_VALUE_UNPACK(trace_read_buf[j]), +#endif + FIELD_VALUE_UNPACK(trace_read_buf[j])); + break; +#ifndef ISP2401 + case TRACE_DUMP_FORMAT_VALUE24_HEX: +#else + case TRACE_DUMP_FORMAT_POINT_NO_TID: +#endif + ia_css_debug_dtrace( +#ifndef ISP2401 + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x H\n", +#else + IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %x (%d)\n", +#endif + j, +#ifndef ISP2401 + FIELD_MAJOR_UNPACK(trace_read_buf[j]), + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); +#else + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), + FIELD_MINOR_UNPACK(trace_read_buf[j]), + FIELD_VALUE_UNPACK(trace_read_buf[j]), + FIELD_VALUE_UNPACK(trace_read_buf[j])); +#endif + break; +#ifndef ISP2401 + case TRACE_DUMP_FORMAT_VALUE24_DEC: +#else + case TRACE_DUMP_FORMAT_VALUE24: +#endif + ia_css_debug_dtrace( +#ifndef ISP2401 + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %d D\n", +#else + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x (%d)\n", +#endif + j, + FIELD_MAJOR_UNPACK(trace_read_buf[j]), +#ifdef ISP2401 + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), + FIELD_VALUE_24_UNPACK(trace_read_buf[j]), +#endif + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + break; +#ifdef ISP2401 + +#endif + case TRACE_DUMP_FORMAT_VALUE24_TIMING: + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing %x\n", + j, +#ifndef ISP2401 + FIELD_MAJOR_UNPACK(trace_read_buf[j]), +#else + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), +#endif + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + break; + case TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA: + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing delta %x\n", + j, +#ifndef ISP2401 + FIELD_MAJOR_UNPACK(trace_read_buf[j]), +#else + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), +#endif + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + break; + default: + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "no such trace dump format %d", +#ifndef ISP2401 + FIELD_FORMAT_UNPACK(trace_read_buf[j])); +#else + dump_format); +#endif + break; + } + } + } +#else + (void)proc_id; +#endif /* HAS_TRACER_V2 */ +} +#endif /* TRACE_ENABLE_SP0 || TRACE_ENABLE_SP1 || TRACE_ENABLE_ISP */ + +void ia_css_debug_dump_trace(void) +{ +#if TRACE_ENABLE_SP0 + debug_dump_one_trace(TRACE_SP0_ID); +#endif +#if TRACE_ENABLE_SP1 + debug_dump_one_trace(TRACE_SP1_ID); +#endif +#if TRACE_ENABLE_ISP + debug_dump_one_trace(TRACE_ISP_ID); +#endif +} + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +/* Tagger state dump function. The tagger is only available when the CSS + * contains an input system (2400 or 2401). */ +void ia_css_debug_tagger_state(void) +{ + unsigned int i; + unsigned int HIVE_ADDR_tagger_frames; + ia_css_tagger_buf_sp_elem_t tbuf_frames[MAX_CB_ELEMS_FOR_TAGGER]; + + HIVE_ADDR_tagger_frames = sh_css_sp_fw.info.sp.tagger_frames_addr; + + /* This variable is not used in crun */ + (void)HIVE_ADDR_tagger_frames; + + /* 2400 and 2401 only have 1 SP, so the tagger lives on SP0 */ + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(tagger_frames), + tbuf_frames, + sizeof(tbuf_frames)); + + ia_css_debug_dtrace(2, "Tagger Info:\n"); + for (i = 0; i < MAX_CB_ELEMS_FOR_TAGGER; i++) { + ia_css_debug_dtrace(2, "\t tagger frame[%d]: exp_id=%d, marked=%d, locked=%d\n", + i, tbuf_frames[i].exp_id, tbuf_frames[i].mark, tbuf_frames[i].lock); + } + +} +#endif /* defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) */ + +#ifdef ISP2401 +void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps) +{ + unsigned int pc; + unsigned int i; + hrt_data sc = sp_ctrl_load(id, SP_SC_REG); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d Status reg: 0x%X\n", id, sc); + sc = sp_ctrl_load(id, SP_CTRL_SINK_REG); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d Stall reg: 0x%X\n", id, sc); + for (i = 0; i < num_of_dumps; i++) { + pc = sp_ctrl_load(id, SP_PC_REG); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d PC: 0x%X\n", id, pc); + } +} +#endif + +#if defined(HRT_SCHED) || defined(SH_CSS_DEBUG_SPMEM_DUMP_SUPPORT) +#include "spmem_dump.c" +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h new file mode 100644 index 0000000000000..ab1d9bed9fd88 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h @@ -0,0 +1,46 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_EVENT_H +#define _IA_CSS_EVENT_H + +#include +#include "sw_event_global.h" /*event macros.TODO : Change File Name..???*/ + +bool ia_css_event_encode( + uint8_t *in, + uint8_t nr, + uint32_t *out); + +void ia_css_event_decode( + uint32_t event, + uint8_t *payload); + +#endif /*_IA_CSS_EVENT_H*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c new file mode 100644 index 0000000000000..239c06730bf4f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c @@ -0,0 +1,126 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "sh_css_sp.h" + +#include "dma.h" /* N_DMA_CHANNEL_ID */ + +#include +#include "ia_css_binary.h" +#include "sh_css_hrt.h" +#include "sh_css_defs.h" +#include "sh_css_internal.h" +#include "ia_css_debug.h" +#include "ia_css_debug_internal.h" +#include "sh_css_legacy.h" + +#include "gdc_device.h" /* HRT_GDC_N */ + +/*#include "sp.h"*/ /* host2sp_enqueue_frame_data() */ + +#include "memory_access.h" + +#include "assert_support.h" +#include "platform_support.h" /* hrt_sleep() */ + +#include "ia_css_queue.h" /* host_sp_enqueue_XXX */ +#include "ia_css_event.h" /* ia_css_event_encode */ +/* + * @brief Encode the information into the software-event. + * Refer to "sw_event_public.h" for details. + */ +bool ia_css_event_encode( + uint8_t *in, + uint8_t nr, + uint32_t *out) +{ + bool ret; + uint32_t nr_of_bits; + uint32_t i; + assert(in != NULL); + assert(out != NULL); + OP___assert(nr > 0 && nr <= MAX_NR_OF_PAYLOADS_PER_SW_EVENT); + + /* initialize the output */ + *out = 0; + + /* get the number of bits per information */ + nr_of_bits = sizeof(uint32_t) * 8 / nr; + + /* compress the all inputs into a signle output */ + for (i = 0; i < nr; i++) { + *out <<= nr_of_bits; + *out |= in[i]; + } + + /* get the return value */ + ret = (nr > 0 && nr <= MAX_NR_OF_PAYLOADS_PER_SW_EVENT); + + return ret; +} + +void ia_css_event_decode( + uint32_t event, + uint8_t *payload) +{ + assert(payload[1] == 0); + assert(payload[2] == 0); + assert(payload[3] == 0); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_event_decode() enter:\n"); + + /* First decode according to the common case + * In case of a PORT_EOF event we overwrite with + * the specific values + * This is somewhat ugly but probably somewhat efficient + * (and it avoids some code duplication) + */ + payload[0] = event & 0xff; /*event_code */ + payload[1] = (event >> 8) & 0xff; + payload[2] = (event >> 16) & 0xff; + payload[3] = 0; + + switch (payload[0]) { + case SH_CSS_SP_EVENT_PORT_EOF: + payload[2] = 0; + payload[3] = (event >> 24) & 0xff; + break; + + case SH_CSS_SP_EVENT_ACC_STAGE_COMPLETE: + case SH_CSS_SP_EVENT_TIMER: + case SH_CSS_SP_EVENT_FRAME_TAGGED: + case SH_CSS_SP_EVENT_FW_WARNING: + case SH_CSS_SP_EVENT_FW_ASSERT: + payload[3] = (event >> 24) & 0xff; + break; + default: + break; + } +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h new file mode 100644 index 0000000000000..67eb8fdb33c51 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h @@ -0,0 +1,69 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_EVENTQ_H +#define _IA_CSS_EVENTQ_H + +#include "ia_css_queue.h" /* queue APIs */ + +/** + * @brief HOST receives event from SP. + * + * @param[in] eventq_handle eventq_handle. + * @param[in] payload The event payload. + * @return 0 - Successfully dequeue. + * @return EINVAL - Invalid argument. + * @return ENODATA - Queue is empty. + */ +int ia_css_eventq_recv( + ia_css_queue_t *eventq_handle, + uint8_t *payload); + +/** + * @brief The Host sends the event to SP. + * The caller of this API will be blocked until the event + * is sent. + * + * @param[in] eventq_handle eventq_handle. + * @param[in] evt_id The event ID. + * @param[in] evt_payload_0 The event payload. + * @param[in] evt_payload_1 The event payload. + * @param[in] evt_payload_2 The event payload. + * @return 0 - Successfully enqueue. + * @return EINVAL - Invalid argument. + * @return ENOBUFS - Queue is full. + */ +int ia_css_eventq_send( + ia_css_queue_t *eventq_handle, + uint8_t evt_id, + uint8_t evt_payload_0, + uint8_t evt_payload_1, + uint8_t evt_payload_2); +#endif /* _IA_CSS_EVENTQ_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c new file mode 100644 index 0000000000000..913a4bf7a34fc --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c @@ -0,0 +1,77 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_types.h" +#include "assert_support.h" +#include "ia_css_queue.h" /* sp2host_dequeue_irq_event() */ +#include "ia_css_eventq.h" +#include "ia_css_event.h" /* ia_css_event_encode() + ia_css_event_decode() + */ +#include "platform_support.h" /* hrt_sleep() */ + +int ia_css_eventq_recv( + ia_css_queue_t *eventq_handle, + uint8_t *payload) +{ + uint32_t sp_event; + int error; + + /* dequeue the IRQ event */ + error = ia_css_queue_dequeue(eventq_handle, &sp_event); + + /* check whether the IRQ event is available or not */ + if (!error) + ia_css_event_decode(sp_event, payload); + return error; +} + +/* + * @brief The Host sends the event to the SP. + * Refer to "sh_css_sp.h" for details. + */ +int ia_css_eventq_send( + ia_css_queue_t *eventq_handle, + uint8_t evt_id, + uint8_t evt_payload_0, + uint8_t evt_payload_1, + uint8_t evt_payload_2) +{ + uint8_t tmp[4]; + uint32_t sw_event; + int error = ENOSYS; + + /* + * Encode the queue type, the thread ID and + * the queue ID into the event. + */ + tmp[0] = evt_id; + tmp[1] = evt_payload_0; + tmp[2] = evt_payload_1; + tmp[3] = evt_payload_2; + ia_css_event_encode(tmp, 4, &sw_event); + + /* queue the software event (busy-waiting) */ + for ( ; ; ) { + error = ia_css_queue_enqueue(eventq_handle, sw_event); + if (ENOBUFS != error) { + /* We were able to successfully send the event + or had a real failure. return the status*/ + break; + } + /* Wait for the queue to be not full and try again*/ + hrt_sleep(); + } + return error; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h new file mode 100644 index 0000000000000..89ad8080ceb12 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h @@ -0,0 +1,180 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_FRAME_H__ +#define __IA_CSS_FRAME_H__ + +#ifdef ISP2401 +#include +#endif +#include +#include +#include "dma.h" + +/********************************************************************* +**** Frame INFO APIs +**********************************************************************/ +/* @brief Sets the given width and alignment to the frame info + * + * @param + * @param[in] info The info to which parameters would set + * @param[in] width The width to be set to info + * @param[in] aligned The aligned to be set to info + * @return + */ +void ia_css_frame_info_set_width(struct ia_css_frame_info *info, + unsigned int width, + unsigned int min_padded_width); + +/* @brief Sets the given format to the frame info + * + * @param + * @param[in] info The info to which parameters would set + * @param[in] format The format to be set to info + * @return + */ +void ia_css_frame_info_set_format(struct ia_css_frame_info *info, + enum ia_css_frame_format format); + +/* @brief Sets the frame info with the given parameters + * + * @param + * @param[in] info The info to which parameters would set + * @param[in] width The width to be set to info + * @param[in] height The height to be set to info + * @param[in] format The format to be set to info + * @param[in] aligned The aligned to be set to info + * @return + */ +void ia_css_frame_info_init(struct ia_css_frame_info *info, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int aligned); + +/* @brief Checks whether 2 frame infos has the same resolution + * + * @param + * @param[in] frame_a The first frame to be compared + * @param[in] frame_b The second frame to be compared + * @return Returns true if the frames are equal + */ +bool ia_css_frame_info_is_same_resolution( + const struct ia_css_frame_info *info_a, + const struct ia_css_frame_info *info_b); + +/* @brief Check the frame info is valid + * + * @param + * @param[in] info The frame attributes to be initialized + * @return The error code. + */ +enum ia_css_err ia_css_frame_check_info(const struct ia_css_frame_info *info); + +/********************************************************************* +**** Frame APIs +**********************************************************************/ + +/* @brief Initialize the plane depending on the frame type + * + * @param + * @param[in] frame The frame attributes to be initialized + * @return The error code. + */ +enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame); + +/* @brief Free an array of frames + * + * @param + * @param[in] num_frames The number of frames to be freed in the array + * @param[in] **frames_array The array of frames to be removed + * @return + */ +void ia_css_frame_free_multiple(unsigned int num_frames, + struct ia_css_frame **frames_array); + +/* @brief Allocate a CSS frame structure of given size in bytes.. + * + * @param frame The allocated frame. + * @param[in] size_bytes The frame size in bytes. + * @param[in] contiguous Allocate memory physically contiguously or not. + * @return The error code. + * + * Allocate a frame using the given size in bytes. + * The frame structure is partially null initialized. + */ +enum ia_css_err ia_css_frame_allocate_with_buffer_size( + struct ia_css_frame **frame, + const unsigned int size_bytes, + const bool contiguous); + +/* @brief Check whether 2 frames are same type + * + * @param + * @param[in] frame_a The first frame to be compared + * @param[in] frame_b The second frame to be compared + * @return Returns true if the frames are equal + */ +bool ia_css_frame_is_same_type( + const struct ia_css_frame *frame_a, + const struct ia_css_frame *frame_b); + +/* @brief Configure a dma port from frame info + * + * @param + * @param[in] config The DAM port configuration + * @param[in] info The frame info + * @return + */ +void ia_css_dma_configure_from_info( + struct dma_port_config *config, + const struct ia_css_frame_info *info); + +#ifdef ISP2401 +/* @brief Finds the cropping resolution + * This function finds the maximum cropping resolution in an input image keeping + * the aspect ratio for the given output resolution.Calculates the coordinates + * for cropping from the center and returns the starting pixel location of the + * region in the input image. Also returns the dimension of the cropping + * resolution. + * + * @param + * @param[in] in_res Resolution of input image + * @param[in] out_res Resolution of output image + * @param[out] crop_res Crop resolution of input image + * @return Returns IA_CSS_SUCCESS or IA_CSS_ERR_INVALID_ARGUMENTS on error + */ +enum ia_css_err +ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, + const struct ia_css_resolution *out_res, + struct ia_css_resolution *crop_res); + +#endif +#endif /* __IA_CSS_FRAME_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h new file mode 100644 index 0000000000000..a469e0afb2b5b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h @@ -0,0 +1,132 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_FRAME_COMM_H__ +#define __IA_CSS_FRAME_COMM_H__ + +#include "type_support.h" +#include "platform_support.h" +#include "runtime/bufq/interface/ia_css_bufq_comm.h" +#include /* hrt_vaddress */ + +/* + * These structs are derived from structs defined in ia_css_types.h + * (just take out the "_sp" from the struct name to get the "original") + * All the fields that are not needed by the SP are removed. + */ +struct ia_css_frame_sp_plane { + unsigned int offset; /* offset in bytes to start of frame data */ + /* offset is wrt data in sh_css_sp_sp_frame */ +}; + +struct ia_css_frame_sp_binary_plane { + unsigned int size; + struct ia_css_frame_sp_plane data; +}; + +struct ia_css_frame_sp_yuv_planes { + struct ia_css_frame_sp_plane y; + struct ia_css_frame_sp_plane u; + struct ia_css_frame_sp_plane v; +}; + +struct ia_css_frame_sp_nv_planes { + struct ia_css_frame_sp_plane y; + struct ia_css_frame_sp_plane uv; +}; + +struct ia_css_frame_sp_rgb_planes { + struct ia_css_frame_sp_plane r; + struct ia_css_frame_sp_plane g; + struct ia_css_frame_sp_plane b; +}; + +struct ia_css_frame_sp_plane6 { + struct ia_css_frame_sp_plane r; + struct ia_css_frame_sp_plane r_at_b; + struct ia_css_frame_sp_plane gr; + struct ia_css_frame_sp_plane gb; + struct ia_css_frame_sp_plane b; + struct ia_css_frame_sp_plane b_at_r; +}; + +struct ia_css_sp_resolution { + uint16_t width; /* width of valid data in pixels */ + uint16_t height; /* Height of valid data in lines */ +}; + +/* + * Frame info struct. This describes the contents of an image frame buffer. + */ +struct ia_css_frame_sp_info { + struct ia_css_sp_resolution res; + uint16_t padded_width; /* stride of line in memory + (in pixels) */ + unsigned char format; /* format of the frame data */ + unsigned char raw_bit_depth; /* number of valid bits per pixel, + only valid for RAW bayer frames */ + unsigned char raw_bayer_order; /* bayer order, only valid + for RAW bayer frames */ + unsigned char padding[3]; /* Extend to 32 bit multiple */ +}; + +struct ia_css_buffer_sp { + union { + hrt_vaddress xmem_addr; + enum sh_css_queue_id queue_id; + } buf_src; + enum ia_css_buffer_type buf_type; +}; + +struct ia_css_frame_sp { + struct ia_css_frame_sp_info info; + struct ia_css_buffer_sp buf_attr; + union { + struct ia_css_frame_sp_plane raw; + struct ia_css_frame_sp_plane rgb; + struct ia_css_frame_sp_rgb_planes planar_rgb; + struct ia_css_frame_sp_plane yuyv; + struct ia_css_frame_sp_yuv_planes yuv; + struct ia_css_frame_sp_nv_planes nv; + struct ia_css_frame_sp_plane6 plane6; + struct ia_css_frame_sp_binary_plane binary; + } planes; +}; + +void ia_css_frame_info_to_frame_sp_info( + struct ia_css_frame_sp_info *sp_info, + const struct ia_css_frame_info *info); + +void ia_css_resolution_to_sp_resolution( + struct ia_css_sp_resolution *sp_info, + const struct ia_css_resolution *info); + +#endif /*__IA_CSS_FRAME_COMM_H__*/ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c new file mode 100644 index 0000000000000..fd8e6fda5db41 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c @@ -0,0 +1,1026 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "ia_css_frame.h" +#include +#include "assert_support.h" +#include "ia_css_debug.h" +#include "isp.h" +#include "sh_css_internal.h" +#include "memory_access.h" + + +#define NV12_TILEY_TILE_WIDTH 128 +#define NV12_TILEY_TILE_HEIGHT 32 + +/************************************************************************** +** Static functions declarations +**************************************************************************/ +static void frame_init_plane(struct ia_css_frame_plane *plane, + unsigned int width, + unsigned int stride, + unsigned int height, + unsigned int offset); + +static void frame_init_single_plane(struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel); + +static void frame_init_raw_single_plane( + struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bits_per_pixel); + +static void frame_init_mipi_plane(struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel); + +static void frame_init_nv_planes(struct ia_css_frame *frame, + unsigned int horizontal_decimation, + unsigned int vertical_decimation, + unsigned int bytes_per_element); + +static void frame_init_yuv_planes(struct ia_css_frame *frame, + unsigned int horizontal_decimation, + unsigned int vertical_decimation, + bool swap_uv, + unsigned int bytes_per_element); + +static void frame_init_rgb_planes(struct ia_css_frame *frame, + unsigned int bytes_per_element); + +static void frame_init_qplane6_planes(struct ia_css_frame *frame); + +static enum ia_css_err frame_allocate_buffer_data(struct ia_css_frame *frame); + +static enum ia_css_err frame_allocate_with_data(struct ia_css_frame **frame, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth, + bool contiguous); + +static struct ia_css_frame *frame_create(unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth, + bool contiguous, + bool valid); + +static unsigned +ia_css_elems_bytes_from_info( + const struct ia_css_frame_info *info); + +/************************************************************************** +** CSS API functions, exposed by ia_css.h +**************************************************************************/ + +void ia_css_frame_zero(struct ia_css_frame *frame) +{ + assert(frame != NULL); + mmgr_clear(frame->data, frame->data_bytes); +} + +enum ia_css_err ia_css_frame_allocate_from_info(struct ia_css_frame **frame, + const struct ia_css_frame_info *info) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + if (frame == NULL || info == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate_from_info() enter:\n"); + err = + ia_css_frame_allocate(frame, info->res.width, info->res.height, + info->format, info->padded_width, + info->raw_bit_depth); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate_from_info() leave:\n"); + return err; +} + +enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + if (frame == NULL || width == 0 || height == 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, +#ifndef ISP2401 + "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d\n", + width, height, format); +#else + "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", + width, height, format, padded_width, raw_bit_depth); +#endif + + err = frame_allocate_with_data(frame, width, height, format, + padded_width, raw_bit_depth, false); + +#ifndef ISP2401 + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate() leave: frame=%p\n", *frame); +#else + if ((*frame != NULL) && err == IA_CSS_SUCCESS) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", *frame, (*frame)->data); + else + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", + (void *)-1, (unsigned int)-1); +#endif + + return err; +} + +enum ia_css_err ia_css_frame_map(struct ia_css_frame **frame, + const struct ia_css_frame_info *info, + const void __user *data, + uint16_t attribute, + void *context) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame *me; + assert(frame != NULL); + + /* Create the frame structure */ + err = ia_css_frame_create_from_info(&me, info); + + if (err != IA_CSS_SUCCESS) + return err; + + if (err == IA_CSS_SUCCESS) { + /* use mmgr_mmap to map */ + me->data = (ia_css_ptr) mmgr_mmap(data, + me->data_bytes, + attribute, context); + if (me->data == mmgr_NULL) + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if (err != IA_CSS_SUCCESS) { + sh_css_free(me); +#ifndef ISP2401 + return err; +#else + me = NULL; +#endif + } + + *frame = me; + + return err; +} + +enum ia_css_err ia_css_frame_create_from_info(struct ia_css_frame **frame, + const struct ia_css_frame_info *info) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame *me; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_create_from_info() enter:\n"); + if (frame == NULL || info == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_create_from_info() leave:" + " invalid arguments\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + me = frame_create(info->res.width, + info->res.height, + info->format, + info->padded_width, + info->raw_bit_depth, + false, + false); + if (me == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_create_from_info() leave:" + " frame create failed\n"); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + + err = ia_css_frame_init_planes(me); + +#ifndef ISP2401 + if (err == IA_CSS_SUCCESS) + *frame = me; + else +#else + if (err != IA_CSS_SUCCESS) { +#endif + sh_css_free(me); +#ifdef ISP2401 + me = NULL; + } + + *frame = me; +#endif + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_create_from_info() leave:\n"); + + return err; +} + +enum ia_css_err ia_css_frame_set_data(struct ia_css_frame *frame, + const ia_css_ptr mapped_data, + size_t data_bytes) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_set_data() enter:\n"); + if (frame == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_set_data() leave: NULL frame\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + /* If we are setting a valid data. + * Make sure that there is enough + * room for the expected frame format + */ + if ((mapped_data != mmgr_NULL) && (frame->data_bytes > data_bytes)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_set_data() leave: invalid arguments\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + frame->data = mapped_data; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_set_data() leave:\n"); + + return err; +} + +enum ia_css_err ia_css_frame_allocate_contiguous(struct ia_css_frame **frame, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate_contiguous() " +#ifndef ISP2401 + "enter: width=%d, height=%d, format=%d\n", + width, height, format); +#else + "enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", + width, height, format, padded_width, raw_bit_depth); +#endif + + err = frame_allocate_with_data(frame, width, height, format, + padded_width, raw_bit_depth, true); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate_contiguous() leave: frame=%p\n", + frame ? *frame : (void *)-1); + + return err; +} + +enum ia_css_err ia_css_frame_allocate_contiguous_from_info( + struct ia_css_frame **frame, + const struct ia_css_frame_info *info) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + assert(frame != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate_contiguous_from_info() enter:\n"); + err = ia_css_frame_allocate_contiguous(frame, + info->res.width, + info->res.height, + info->format, + info->padded_width, + info->raw_bit_depth); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_allocate_contiguous_from_info() leave:\n"); + return err; +} + +void ia_css_frame_free(struct ia_css_frame *frame) +{ + IA_CSS_ENTER_PRIVATE("frame = %p", frame); + + if (frame != NULL) { + hmm_free(frame->data); + sh_css_free(frame); + } + + IA_CSS_LEAVE_PRIVATE("void"); +} + +/************************************************************************** +** Module public functions +**************************************************************************/ + +enum ia_css_err ia_css_frame_check_info(const struct ia_css_frame_info *info) +{ + assert(info != NULL); + if (info->res.width == 0 || info->res.height == 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_SUCCESS; +} + +enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame) +{ + assert(frame != NULL); + + switch (frame->info.format) { + case IA_CSS_FRAME_FORMAT_MIPI: + frame_init_mipi_plane(frame, &frame->planes.raw, + frame->info.res.height, + frame->info.padded_width, + frame->info.raw_bit_depth <= 8 ? 1 : 2); + break; + case IA_CSS_FRAME_FORMAT_RAW_PACKED: + frame_init_raw_single_plane(frame, &frame->planes.raw, + frame->info.res.height, + frame->info.padded_width, + frame->info.raw_bit_depth); + break; + case IA_CSS_FRAME_FORMAT_RAW: + frame_init_single_plane(frame, &frame->planes.raw, + frame->info.res.height, + frame->info.padded_width, + frame->info.raw_bit_depth <= 8 ? 1 : 2); + break; + case IA_CSS_FRAME_FORMAT_RGB565: + frame_init_single_plane(frame, &frame->planes.rgb, + frame->info.res.height, + frame->info.padded_width, 2); + break; + case IA_CSS_FRAME_FORMAT_RGBA888: + frame_init_single_plane(frame, &frame->planes.rgb, + frame->info.res.height, + frame->info.padded_width * 4, 1); + break; + case IA_CSS_FRAME_FORMAT_PLANAR_RGB888: + frame_init_rgb_planes(frame, 1); + break; + /* yuyv and uyvu have the same frame layout, only the data + * positioning differs. + */ + case IA_CSS_FRAME_FORMAT_YUYV: + case IA_CSS_FRAME_FORMAT_UYVY: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: + frame_init_single_plane(frame, &frame->planes.yuyv, + frame->info.res.height, + frame->info.padded_width * 2, 1); + break; + case IA_CSS_FRAME_FORMAT_YUV_LINE: + /* Needs 3 extra lines to allow vf_pp prefetching */ + frame_init_single_plane(frame, &frame->planes.yuyv, + frame->info.res.height * 3 / 2 + 3, + frame->info.padded_width, 1); + break; + case IA_CSS_FRAME_FORMAT_NV11: + frame_init_nv_planes(frame, 4, 1, 1); + break; + /* nv12 and nv21 have the same frame layout, only the data + * positioning differs. + */ + case IA_CSS_FRAME_FORMAT_NV12: + case IA_CSS_FRAME_FORMAT_NV21: + case IA_CSS_FRAME_FORMAT_NV12_TILEY: + frame_init_nv_planes(frame, 2, 2, 1); + break; + case IA_CSS_FRAME_FORMAT_NV12_16: + frame_init_nv_planes(frame, 2, 2, 2); + break; + /* nv16 and nv61 have the same frame layout, only the data + * positioning differs. + */ + case IA_CSS_FRAME_FORMAT_NV16: + case IA_CSS_FRAME_FORMAT_NV61: + frame_init_nv_planes(frame, 2, 1, 1); + break; + case IA_CSS_FRAME_FORMAT_YUV420: + frame_init_yuv_planes(frame, 2, 2, false, 1); + break; + case IA_CSS_FRAME_FORMAT_YUV422: + frame_init_yuv_planes(frame, 2, 1, false, 1); + break; + case IA_CSS_FRAME_FORMAT_YUV444: + frame_init_yuv_planes(frame, 1, 1, false, 1); + break; + case IA_CSS_FRAME_FORMAT_YUV420_16: + frame_init_yuv_planes(frame, 2, 2, false, 2); + break; + case IA_CSS_FRAME_FORMAT_YUV422_16: + frame_init_yuv_planes(frame, 2, 1, false, 2); + break; + case IA_CSS_FRAME_FORMAT_YV12: + frame_init_yuv_planes(frame, 2, 2, true, 1); + break; + case IA_CSS_FRAME_FORMAT_YV16: + frame_init_yuv_planes(frame, 2, 1, true, 1); + break; + case IA_CSS_FRAME_FORMAT_QPLANE6: + frame_init_qplane6_planes(frame); + break; + case IA_CSS_FRAME_FORMAT_BINARY_8: + frame_init_single_plane(frame, &frame->planes.binary.data, + frame->info.res.height, + frame->info.padded_width, 1); + frame->planes.binary.size = 0; + break; + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + return IA_CSS_SUCCESS; +} + +void ia_css_frame_info_set_width(struct ia_css_frame_info *info, + unsigned int width, + unsigned int min_padded_width) +{ + unsigned int align; + + IA_CSS_ENTER_PRIVATE("info = %p,width = %d, minimum padded width = %d", + info, width, min_padded_width); + if (info == NULL) { + IA_CSS_ERROR("NULL input parameter"); + IA_CSS_LEAVE_PRIVATE(""); + return; + } + if (min_padded_width > width) + align = min_padded_width; + else + align = width; + + info->res.width = width; + /* frames with a U and V plane of 8 bits per pixel need to have + all planes aligned, this means double the alignment for the + Y plane if the horizontal decimation is 2. */ + if (info->format == IA_CSS_FRAME_FORMAT_YUV420 || + info->format == IA_CSS_FRAME_FORMAT_YV12 || + info->format == IA_CSS_FRAME_FORMAT_NV12 || + info->format == IA_CSS_FRAME_FORMAT_NV21 || + info->format == IA_CSS_FRAME_FORMAT_BINARY_8 || + info->format == IA_CSS_FRAME_FORMAT_YUV_LINE) + info->padded_width = + CEIL_MUL(align, 2 * HIVE_ISP_DDR_WORD_BYTES); + else if (info->format == IA_CSS_FRAME_FORMAT_NV12_TILEY) + info->padded_width = CEIL_MUL(align, NV12_TILEY_TILE_WIDTH); + else if (info->format == IA_CSS_FRAME_FORMAT_RAW || + info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) + info->padded_width = CEIL_MUL(align, 2 * ISP_VEC_NELEMS); + else { + info->padded_width = CEIL_MUL(align, HIVE_ISP_DDR_WORD_BYTES); + } + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_frame_info_set_format(struct ia_css_frame_info *info, + enum ia_css_frame_format format) +{ + assert(info != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_info_set_format() enter:\n"); + info->format = format; +} + +void ia_css_frame_info_init(struct ia_css_frame_info *info, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int aligned) +{ + IA_CSS_ENTER_PRIVATE("info = %p, width = %d, height = %d, format = %d, aligned = %d", + info, width, height, format, aligned); + if (info == NULL) { + IA_CSS_ERROR("NULL input parameter"); + IA_CSS_LEAVE_PRIVATE(""); + return; + } + info->res.height = height; + info->format = format; + ia_css_frame_info_set_width(info, width, aligned); + IA_CSS_LEAVE_PRIVATE(""); +} + +void ia_css_frame_free_multiple(unsigned int num_frames, + struct ia_css_frame **frames_array) +{ + unsigned int i; + for (i = 0; i < num_frames; i++) { + if (frames_array[i]) { + ia_css_frame_free(frames_array[i]); + frames_array[i] = NULL; + } + } +} + +enum ia_css_err ia_css_frame_allocate_with_buffer_size( + struct ia_css_frame **frame, + const unsigned int buffer_size_bytes, + const bool contiguous) +{ + /* AM: Body coppied from frame_allocate_with_data(). */ + enum ia_css_err err; + struct ia_css_frame *me = frame_create(0, 0, + IA_CSS_FRAME_FORMAT_NUM,/* Not valid format yet */ + 0, 0, contiguous, false); + + if (me == NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + /* Get the data size */ + me->data_bytes = buffer_size_bytes; + + err = frame_allocate_buffer_data(me); + + if (err != IA_CSS_SUCCESS) { + sh_css_free(me); +#ifndef ISP2401 + return err; +#else + me = NULL; +#endif + } + + *frame = me; + + return err; +} + +bool ia_css_frame_info_is_same_resolution( + const struct ia_css_frame_info *info_a, + const struct ia_css_frame_info *info_b) +{ + if (!info_a || !info_b) + return false; + return (info_a->res.width == info_b->res.width) && + (info_a->res.height == info_b->res.height); +} + +bool ia_css_frame_is_same_type(const struct ia_css_frame *frame_a, + const struct ia_css_frame *frame_b) +{ + bool is_equal = false; + const struct ia_css_frame_info *info_a = &frame_a->info, + *info_b = &frame_b->info; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_is_same_type() enter:\n"); + + if (!info_a || !info_b) + return false; + if (info_a->format != info_b->format) + return false; + if (info_a->padded_width != info_b->padded_width) + return false; + is_equal = ia_css_frame_info_is_same_resolution(info_a, info_b); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_is_same_type() leave:\n"); + + return is_equal; +} + +void +ia_css_dma_configure_from_info( + struct dma_port_config *config, + const struct ia_css_frame_info *info) +{ + unsigned is_raw_packed = info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED; + unsigned bits_per_pixel = is_raw_packed ? info->raw_bit_depth : ia_css_elems_bytes_from_info(info)*8; + unsigned pix_per_ddrword = HIVE_ISP_DDR_WORD_BITS / bits_per_pixel; + unsigned words_per_line = CEIL_DIV(info->padded_width, pix_per_ddrword); + unsigned elems_b = pix_per_ddrword; + + config->stride = HIVE_ISP_DDR_WORD_BYTES * words_per_line; + config->elems = (uint8_t)elems_b; + config->width = (uint16_t)info->res.width; + config->crop = 0; + assert(config->width <= info->padded_width); +} + +/************************************************************************** +** Static functions +**************************************************************************/ + +static void frame_init_plane(struct ia_css_frame_plane *plane, + unsigned int width, + unsigned int stride, + unsigned int height, + unsigned int offset) +{ + plane->height = height; + plane->width = width; + plane->stride = stride; + plane->offset = offset; +} + +static void frame_init_single_plane(struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel) +{ + unsigned int stride; + + stride = subpixels_per_line * bytes_per_pixel; + /* Frame height needs to be even number - needed by hw ISYS2401 + In case of odd number, round up to even. + Images won't be impacted by this round up, + only needed by jpeg/embedded data. + As long as buffer allocation and release are using data_bytes, + there won't be memory leak. */ + frame->data_bytes = stride * CEIL_MUL2(height, 2); + frame_init_plane(plane, subpixels_per_line, stride, height, 0); + return; +} + +static void frame_init_raw_single_plane( + struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bits_per_pixel) +{ + unsigned int stride; + assert(frame != NULL); + + stride = HIVE_ISP_DDR_WORD_BYTES * + CEIL_DIV(subpixels_per_line, + HIVE_ISP_DDR_WORD_BITS / bits_per_pixel); + frame->data_bytes = stride * height; + frame_init_plane(plane, subpixels_per_line, stride, height, 0); + return; +} + +static void frame_init_mipi_plane(struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel) +{ + unsigned int stride; + + stride = subpixels_per_line * bytes_per_pixel; + frame->data_bytes = 8388608; /* 8*1024*1024 */ + frame->valid = false; + frame->contiguous = true; + frame_init_plane(plane, subpixels_per_line, stride, height, 0); + return; +} + +static void frame_init_nv_planes(struct ia_css_frame *frame, + unsigned int horizontal_decimation, + unsigned int vertical_decimation, + unsigned int bytes_per_element) +{ + unsigned int y_width = frame->info.padded_width; + unsigned int y_height = frame->info.res.height; + unsigned int uv_width; + unsigned int uv_height; + unsigned int y_bytes; + unsigned int uv_bytes; + unsigned int y_stride; + unsigned int uv_stride; + + assert(horizontal_decimation != 0 && vertical_decimation != 0); + + uv_width = 2 * (y_width / horizontal_decimation); + uv_height = y_height / vertical_decimation; + + if (IA_CSS_FRAME_FORMAT_NV12_TILEY == frame->info.format) { + y_width = CEIL_MUL(y_width, NV12_TILEY_TILE_WIDTH); + uv_width = CEIL_MUL(uv_width, NV12_TILEY_TILE_WIDTH); + y_height = CEIL_MUL(y_height, NV12_TILEY_TILE_HEIGHT); + uv_height = CEIL_MUL(uv_height, NV12_TILEY_TILE_HEIGHT); + } + + y_stride = y_width * bytes_per_element; + uv_stride = uv_width * bytes_per_element; + y_bytes = y_stride * y_height; + uv_bytes = uv_stride * uv_height; + + frame->data_bytes = y_bytes + uv_bytes; + frame_init_plane(&frame->planes.nv.y, y_width, y_stride, y_height, 0); + frame_init_plane(&frame->planes.nv.uv, uv_width, + uv_stride, uv_height, y_bytes); + return; +} + +static void frame_init_yuv_planes(struct ia_css_frame *frame, + unsigned int horizontal_decimation, + unsigned int vertical_decimation, + bool swap_uv, + unsigned int bytes_per_element) +{ + unsigned int y_width = frame->info.padded_width, + y_height = frame->info.res.height, + uv_width = y_width / horizontal_decimation, + uv_height = y_height / vertical_decimation, + y_stride, y_bytes, uv_bytes, uv_stride; + + y_stride = y_width * bytes_per_element; + uv_stride = uv_width * bytes_per_element; + y_bytes = y_stride * y_height; + uv_bytes = uv_stride * uv_height; + + frame->data_bytes = y_bytes + 2 * uv_bytes; + frame_init_plane(&frame->planes.yuv.y, y_width, y_stride, y_height, 0); + if (swap_uv) { + frame_init_plane(&frame->planes.yuv.v, uv_width, uv_stride, + uv_height, y_bytes); + frame_init_plane(&frame->planes.yuv.u, uv_width, uv_stride, + uv_height, y_bytes + uv_bytes); + } else { + frame_init_plane(&frame->planes.yuv.u, uv_width, uv_stride, + uv_height, y_bytes); + frame_init_plane(&frame->planes.yuv.v, uv_width, uv_stride, + uv_height, y_bytes + uv_bytes); + } + return; +} + +static void frame_init_rgb_planes(struct ia_css_frame *frame, + unsigned int bytes_per_element) +{ + unsigned int width = frame->info.res.width, + height = frame->info.res.height, stride, bytes; + + stride = width * bytes_per_element; + bytes = stride * height; + frame->data_bytes = 3 * bytes; + frame_init_plane(&frame->planes.planar_rgb.r, width, stride, height, 0); + frame_init_plane(&frame->planes.planar_rgb.g, + width, stride, height, 1 * bytes); + frame_init_plane(&frame->planes.planar_rgb.b, + width, stride, height, 2 * bytes); + return; +} + +static void frame_init_qplane6_planes(struct ia_css_frame *frame) +{ + unsigned int width = frame->info.padded_width / 2, + height = frame->info.res.height / 2, bytes, stride; + + stride = width * 2; + bytes = stride * height; + + frame->data_bytes = 6 * bytes; + frame_init_plane(&frame->planes.plane6.r, + width, stride, height, 0 * bytes); + frame_init_plane(&frame->planes.plane6.r_at_b, + width, stride, height, 1 * bytes); + frame_init_plane(&frame->planes.plane6.gr, + width, stride, height, 2 * bytes); + frame_init_plane(&frame->planes.plane6.gb, + width, stride, height, 3 * bytes); + frame_init_plane(&frame->planes.plane6.b, + width, stride, height, 4 * bytes); + frame_init_plane(&frame->planes.plane6.b_at_r, + width, stride, height, 5 * bytes); + return; +} + +static enum ia_css_err frame_allocate_buffer_data(struct ia_css_frame *frame) +{ +#ifdef ISP2401 + IA_CSS_ENTER_LEAVE_PRIVATE("frame->data_bytes=%d\n", frame->data_bytes); +#endif + frame->data = mmgr_alloc_attr(frame->data_bytes, + frame->contiguous ? + MMGR_ATTRIBUTE_CONTIGUOUS : + MMGR_ATTRIBUTE_DEFAULT); + + if (frame->data == mmgr_NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + return IA_CSS_SUCCESS; +} + +static enum ia_css_err frame_allocate_with_data(struct ia_css_frame **frame, + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth, + bool contiguous) +{ + enum ia_css_err err; + struct ia_css_frame *me = frame_create(width, + height, + format, + padded_width, + raw_bit_depth, + contiguous, + true); + + if (me == NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + err = ia_css_frame_init_planes(me); + + if (err == IA_CSS_SUCCESS) + err = frame_allocate_buffer_data(me); + + if (err != IA_CSS_SUCCESS) { + sh_css_free(me); +#ifndef ISP2401 + return err; +#else + me = NULL; +#endif + } + + *frame = me; + + return err; +} + +static struct ia_css_frame *frame_create(unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth, + bool contiguous, + bool valid) +{ + struct ia_css_frame *me = sh_css_malloc(sizeof(*me)); + + if (me == NULL) + return NULL; + + memset(me, 0, sizeof(*me)); + me->info.res.width = width; + me->info.res.height = height; + me->info.format = format; + me->info.padded_width = padded_width; + me->info.raw_bit_depth = raw_bit_depth; + me->contiguous = contiguous; + me->valid = valid; + me->data_bytes = 0; + me->data = mmgr_NULL; + /* To indicate it is not valid frame. */ + me->dynamic_queue_id = (int)SH_CSS_INVALID_QUEUE_ID; + me->buf_type = IA_CSS_BUFFER_TYPE_INVALID; + + return me; +} + +static unsigned +ia_css_elems_bytes_from_info(const struct ia_css_frame_info *info) +{ + if (info->format == IA_CSS_FRAME_FORMAT_RGB565) + return 2; /* bytes per pixel */ + if (info->format == IA_CSS_FRAME_FORMAT_YUV420_16) + return 2; /* bytes per pixel */ + if (info->format == IA_CSS_FRAME_FORMAT_YUV422_16) + return 2; /* bytes per pixel */ + /* Note: Essentially NV12_16 is a 2 bytes per pixel format, this return value is used + * to configure DMA for the output buffer, + * At least in SKC this data is overwriten by isp_output_init.sp.c except for elements(elems), + * which is configured from this return value, + * NV12_16 is implemented by a double buffer of 8 bit elements hence elems should be configured as 8 */ + if (info->format == IA_CSS_FRAME_FORMAT_NV12_16) + return 1; /* bytes per pixel */ + + if (info->format == IA_CSS_FRAME_FORMAT_RAW + || (info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED)) { + if (info->raw_bit_depth) + return CEIL_DIV(info->raw_bit_depth,8); + else + return 2; /* bytes per pixel */ + } + if (info->format == IA_CSS_FRAME_FORMAT_PLANAR_RGB888) + return 3; /* bytes per pixel */ + if (info->format == IA_CSS_FRAME_FORMAT_RGBA888) + return 4; /* bytes per pixel */ + if (info->format == IA_CSS_FRAME_FORMAT_QPLANE6) + return 2; /* bytes per pixel */ + return 1; /* Default is 1 byte per pixel */ +} + +void ia_css_frame_info_to_frame_sp_info( + struct ia_css_frame_sp_info *to, + const struct ia_css_frame_info *from) +{ + ia_css_resolution_to_sp_resolution(&to->res, &from->res); + to->padded_width = (uint16_t)from->padded_width; + to->format = (uint8_t)from->format; + to->raw_bit_depth = (uint8_t)from->raw_bit_depth; + to->raw_bayer_order = from->raw_bayer_order; +} + +void ia_css_resolution_to_sp_resolution( + struct ia_css_sp_resolution *to, + const struct ia_css_resolution *from) +{ + to->width = (uint16_t)from->width; + to->height = (uint16_t)from->height; +} +#ifdef ISP2401 + +enum ia_css_err +ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, + const struct ia_css_resolution *out_res, + struct ia_css_resolution *crop_res) +{ + uint32_t wd_even_ceil, ht_even_ceil; + uint32_t in_ratio, out_ratio; + + if ((in_res == NULL) || (out_res == NULL) || (crop_res == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + IA_CSS_ENTER_PRIVATE("in(%ux%u) -> out(%ux%u)", in_res->width, + in_res->height, out_res->width, out_res->height); + + if ((in_res->width == 0) + || (in_res->height == 0) + || (out_res->width == 0) + || (out_res->height == 0)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + if ((out_res->width > in_res->width) || + (out_res->height > in_res->height)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* If aspect ratio (width/height) of out_res is higher than the aspect + * ratio of the in_res, then we crop vertically, otherwise we crop + * horizontally. + */ + in_ratio = in_res->width * out_res->height; + out_ratio = out_res->width * in_res->height; + + if (in_ratio == out_ratio) { + crop_res->width = in_res->width; + crop_res->height = in_res->height; + } else if (out_ratio > in_ratio) { + crop_res->width = in_res->width; + crop_res->height = ROUND_DIV(out_res->height * crop_res->width, + out_res->width); + } else { + crop_res->height = in_res->height; + crop_res->width = ROUND_DIV(out_res->width * crop_res->height, + out_res->height); + } + + /* Round new (cropped) width and height to an even number. + * binarydesc_calculate_bds_factor is such that we should consider as + * much of the input as possible. This is different only when we end up + * with an odd number in the last step. So, we take the next even number + * if it falls within the input, otherwise take the previous even no. + */ + wd_even_ceil = EVEN_CEIL(crop_res->width); + ht_even_ceil = EVEN_CEIL(crop_res->height); + if ((wd_even_ceil > in_res->width) || (ht_even_ceil > in_res->height)) { + crop_res->width = EVEN_FLOOR(crop_res->width); + crop_res->height = EVEN_FLOOR(crop_res->height); + } else { + crop_res->width = wd_even_ceil; + crop_res->height = ht_even_ceil; + } + + IA_CSS_LEAVE_PRIVATE("in(%ux%u) -> out(%ux%u)", crop_res->width, + crop_res->height, out_res->width, out_res->height); + return IA_CSS_SUCCESS; +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h new file mode 100644 index 0000000000000..d02bff1bbf46e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h @@ -0,0 +1,49 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_IFMTR_H__ +#define __IA_CSS_IFMTR_H__ + +#include +#include +#include + +extern bool ifmtr_set_if_blocking_mode_reset; + +unsigned int ia_css_ifmtr_lines_needed_for_bayer_order( + const struct ia_css_stream_config *config); + +unsigned int ia_css_ifmtr_columns_needed_for_bayer_order( + const struct ia_css_stream_config *config); + +enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, + struct ia_css_binary *binary); + +#endif /* __IA_CSS_IFMTR_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c new file mode 100644 index 0000000000000..1bed027435fd0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c @@ -0,0 +1,569 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "system_global.h" +#include + +#ifdef USE_INPUT_SYSTEM_VERSION_2 + +#include "ia_css_ifmtr.h" +#include +#include "sh_css_internal.h" +#include "input_formatter.h" +#include "assert_support.h" +#include "sh_css_sp.h" +#include "isp/modes/interface/input_buf.isp.h" + +/************************************************************ + * Static functions declarations + ************************************************************/ +static enum ia_css_err ifmtr_start_column( + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_column); + +static enum ia_css_err ifmtr_input_start_line( + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_line); + +static void ifmtr_set_if_blocking_mode( + const input_formatter_cfg_t * const config_a, + const input_formatter_cfg_t * const config_b); + +/************************************************************ + * Public functions + ************************************************************/ + +/* ISP expects GRBG bayer order, we skip one line and/or one row + * to correct in case the input bayer order is different. + */ +unsigned int ia_css_ifmtr_lines_needed_for_bayer_order( + const struct ia_css_stream_config *config) +{ + assert(config != NULL); + if ((IA_CSS_BAYER_ORDER_BGGR == config->input_config.bayer_order) + || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + return 1; + + return 0; +} + +unsigned int ia_css_ifmtr_columns_needed_for_bayer_order( + const struct ia_css_stream_config *config) +{ + assert(config != NULL); + if ((IA_CSS_BAYER_ORDER_RGGB == config->input_config.bayer_order) + || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + return 1; + + return 0; +} + +enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, + struct ia_css_binary *binary) +{ + unsigned int start_line, start_column = 0, + cropped_height, + cropped_width, + num_vectors, + buffer_height = 2, + buffer_width, + two_ppc, + vmem_increment = 0, + deinterleaving = 0, + deinterleaving_b = 0, + width_a = 0, + width_b = 0, + bits_per_pixel, + vectors_per_buffer, + vectors_per_line = 0, + buffers_per_line = 0, + buf_offset_a = 0, + buf_offset_b = 0, + line_width = 0, + width_b_factor = 1, start_column_b, + left_padding = 0; + input_formatter_cfg_t if_a_config, if_b_config; + enum atomisp_input_format input_format; + enum ia_css_err err = IA_CSS_SUCCESS; + uint8_t if_config_index; + + /* Determine which input formatter config set is targeted. */ + /* Index is equal to the CSI-2 port used. */ + enum mipi_port_id port; + + if (binary) { + cropped_height = binary->in_frame_info.res.height; + cropped_width = binary->in_frame_info.res.width; + /* This should correspond to the input buffer definition for + ISP binaries in input_buf.isp.h */ + if (binary->info->sp.enable.continuous && binary->info->sp.pipeline.mode != IA_CSS_BINARY_MODE_COPY) + buffer_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; + else + buffer_width = binary->info->sp.input.max_width; + input_format = binary->input_format; + } else { + /* sp raw copy pipe (IA_CSS_PIPE_MODE_COPY): binary is NULL */ + cropped_height = config->input_config.input_res.height; + cropped_width = config->input_config.input_res.width; + buffer_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; + input_format = config->input_config.format; + } + two_ppc = config->pixels_per_clock == 2; + if (config->mode == IA_CSS_INPUT_MODE_SENSOR + || config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + port = config->source.port.port; + if_config_index = (uint8_t) (port - MIPI_PORT0_ID); + } else if (config->mode == IA_CSS_INPUT_MODE_MEMORY) { + if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; + } else { + if_config_index = 0; + } + + assert(if_config_index <= SH_CSS_MAX_IF_CONFIGS + || if_config_index == SH_CSS_IF_CONFIG_NOT_NEEDED); + + /* TODO: check to see if input is RAW and if current mode interprets + * RAW data in any particular bayer order. copy binary with output + * format other than raw should not result in dropping lines and/or + * columns. + */ + err = ifmtr_input_start_line(config, cropped_height, &start_line); + if (err != IA_CSS_SUCCESS) + return err; + err = ifmtr_start_column(config, cropped_width, &start_column); + if (err != IA_CSS_SUCCESS) + return err; + + if (config->left_padding == -1) + if (!binary) + /* sp raw copy pipe: set left_padding value */ + left_padding = 0; + else + left_padding = binary->left_padding; + else + left_padding = 2*ISP_VEC_NELEMS - config->left_padding; + + + if (left_padding) { + num_vectors = CEIL_DIV(cropped_width + left_padding, + ISP_VEC_NELEMS); + } else { + num_vectors = CEIL_DIV(cropped_width, ISP_VEC_NELEMS); + num_vectors *= buffer_height; + /* todo: in case of left padding, + num_vectors is vectors per line, + otherwise vectors per line * buffer_height. */ + } + + start_column_b = start_column; + + bits_per_pixel = input_formatter_get_alignment(INPUT_FORMATTER0_ID) + * 8 / ISP_VEC_NELEMS; + switch (input_format) { + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + if (two_ppc) { + vmem_increment = 1; + deinterleaving = 1; + deinterleaving_b = 1; + /* half lines */ + width_a = cropped_width * deinterleaving / 2; + width_b_factor = 2; + /* full lines */ + width_b = width_a * width_b_factor; + buffer_width *= deinterleaving * 2; + /* Patch from bayer to yuv */ + num_vectors *= deinterleaving; + buf_offset_b = buffer_width / 2 / ISP_VEC_NELEMS; + vectors_per_line = num_vectors / buffer_height; + /* Even lines are half size */ + line_width = vectors_per_line * + input_formatter_get_alignment(INPUT_FORMATTER0_ID) / + 2; + start_column /= 2; + } else { + vmem_increment = 1; + deinterleaving = 3; + width_a = cropped_width * deinterleaving / 2; + buffer_width = buffer_width * deinterleaving / 2; + /* Patch from bayer to yuv */ + num_vectors = num_vectors / 2 * deinterleaving; + start_column = start_column * deinterleaving / 2; + } + break; + case ATOMISP_INPUT_FORMAT_YUV420_8: + case ATOMISP_INPUT_FORMAT_YUV420_10: + case ATOMISP_INPUT_FORMAT_YUV420_16: + if (two_ppc) { + vmem_increment = 1; + deinterleaving = 1; + width_a = width_b = cropped_width * deinterleaving / 2; + buffer_width *= deinterleaving * 2; + num_vectors *= deinterleaving; + buf_offset_b = buffer_width / 2 / ISP_VEC_NELEMS; + vectors_per_line = num_vectors / buffer_height; + /* Even lines are half size */ + line_width = vectors_per_line * + input_formatter_get_alignment(INPUT_FORMATTER0_ID) / + 2; + start_column *= deinterleaving; + start_column /= 2; + start_column_b = start_column; + } else { + vmem_increment = 1; + deinterleaving = 1; + width_a = cropped_width * deinterleaving; + buffer_width *= deinterleaving * 2; + num_vectors *= deinterleaving; + start_column *= deinterleaving; + } + break; + case ATOMISP_INPUT_FORMAT_YUV422_8: + case ATOMISP_INPUT_FORMAT_YUV422_10: + case ATOMISP_INPUT_FORMAT_YUV422_16: + if (two_ppc) { + vmem_increment = 1; + deinterleaving = 1; + width_a = width_b = cropped_width * deinterleaving; + buffer_width *= deinterleaving * 2; + num_vectors *= deinterleaving; + start_column *= deinterleaving; + buf_offset_b = buffer_width / 2 / ISP_VEC_NELEMS; + start_column_b = start_column; + } else { + vmem_increment = 1; + deinterleaving = 2; + width_a = cropped_width * deinterleaving; + buffer_width *= deinterleaving; + num_vectors *= deinterleaving; + start_column *= deinterleaving; + } + break; + case ATOMISP_INPUT_FORMAT_RGB_444: + case ATOMISP_INPUT_FORMAT_RGB_555: + case ATOMISP_INPUT_FORMAT_RGB_565: + case ATOMISP_INPUT_FORMAT_RGB_666: + case ATOMISP_INPUT_FORMAT_RGB_888: + num_vectors *= 2; + if (two_ppc) { + deinterleaving = 2; /* BR in if_a, G in if_b */ + deinterleaving_b = 1; /* BR in if_a, G in if_b */ + buffers_per_line = 4; + start_column_b = start_column; + start_column *= deinterleaving; + start_column_b *= deinterleaving_b; + } else { + deinterleaving = 3; /* BGR */ + buffers_per_line = 3; + start_column *= deinterleaving; + } + vmem_increment = 1; + width_a = cropped_width * deinterleaving; + width_b = cropped_width * deinterleaving_b; + buffer_width *= buffers_per_line; + /* Patch from bayer to rgb */ + num_vectors = num_vectors / 2 * deinterleaving; + buf_offset_b = buffer_width / 2 / ISP_VEC_NELEMS; + break; + case ATOMISP_INPUT_FORMAT_RAW_6: + case ATOMISP_INPUT_FORMAT_RAW_7: + case ATOMISP_INPUT_FORMAT_RAW_8: + case ATOMISP_INPUT_FORMAT_RAW_10: + case ATOMISP_INPUT_FORMAT_RAW_12: + if (two_ppc) { + int crop_col = (start_column % 2) == 1; + vmem_increment = 2; + deinterleaving = 1; + width_a = width_b = cropped_width / 2; + + /* When two_ppc is enabled AND we need to crop one extra + * column, if_a crops by one extra and we swap the + * output offsets to interleave the bayer pattern in + * the correct order. + */ + buf_offset_a = crop_col ? 1 : 0; + buf_offset_b = crop_col ? 0 : 1; + start_column_b = start_column / 2; + start_column = start_column / 2 + crop_col; + } else { + vmem_increment = 1; + deinterleaving = 2; + if ((!binary) || (config->continuous && binary + && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY)) { + /* !binary -> sp raw copy pipe, no deinterleaving */ + deinterleaving = 1; + } + width_a = cropped_width; + /* Must be multiple of deinterleaving */ + num_vectors = CEIL_MUL(num_vectors, deinterleaving); + } + buffer_height *= 2; + if ((!binary) || config->continuous) + /* !binary -> sp raw copy pipe */ + buffer_height *= 2; + vectors_per_line = CEIL_DIV(cropped_width, ISP_VEC_NELEMS); + vectors_per_line = CEIL_MUL(vectors_per_line, deinterleaving); + break; + case ATOMISP_INPUT_FORMAT_RAW_14: + case ATOMISP_INPUT_FORMAT_RAW_16: + if (two_ppc) { + num_vectors *= 2; + vmem_increment = 1; + deinterleaving = 2; + width_a = width_b = cropped_width; + /* B buffer is one line further */ + buf_offset_b = buffer_width / ISP_VEC_NELEMS; + bits_per_pixel *= 2; + } else { + vmem_increment = 1; + deinterleaving = 2; + width_a = cropped_width; + start_column /= deinterleaving; + } + buffer_height *= 2; + break; + case ATOMISP_INPUT_FORMAT_BINARY_8: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT1: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT2: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT3: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT4: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT5: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT6: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT7: + case ATOMISP_INPUT_FORMAT_GENERIC_SHORT8: + case ATOMISP_INPUT_FORMAT_YUV420_8_SHIFT: + case ATOMISP_INPUT_FORMAT_YUV420_10_SHIFT: + case ATOMISP_INPUT_FORMAT_EMBEDDED: + case ATOMISP_INPUT_FORMAT_USER_DEF1: + case ATOMISP_INPUT_FORMAT_USER_DEF2: + case ATOMISP_INPUT_FORMAT_USER_DEF3: + case ATOMISP_INPUT_FORMAT_USER_DEF4: + case ATOMISP_INPUT_FORMAT_USER_DEF5: + case ATOMISP_INPUT_FORMAT_USER_DEF6: + case ATOMISP_INPUT_FORMAT_USER_DEF7: + case ATOMISP_INPUT_FORMAT_USER_DEF8: + break; + } + if (width_a == 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + if (two_ppc) + left_padding /= 2; + + /* Default values */ + if (left_padding) + vectors_per_line = num_vectors; + if (!vectors_per_line) { + vectors_per_line = CEIL_MUL(num_vectors / buffer_height, + deinterleaving); + line_width = 0; + } + if (!line_width) + line_width = vectors_per_line * + input_formatter_get_alignment(INPUT_FORMATTER0_ID); + if (!buffers_per_line) + buffers_per_line = deinterleaving; + line_width = CEIL_MUL(line_width, + input_formatter_get_alignment(INPUT_FORMATTER0_ID) + * vmem_increment); + + vectors_per_buffer = buffer_height * buffer_width / ISP_VEC_NELEMS; + + if (config->mode == IA_CSS_INPUT_MODE_TPG && + ((binary && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_VIDEO) || + (!binary))) { + /* !binary -> sp raw copy pipe */ + /* workaround for TPG in video mode */ + start_line = 0; + start_column = 0; + cropped_height -= start_line; + width_a -= start_column; + } + + if_a_config.start_line = start_line; + if_a_config.start_column = start_column; + if_a_config.left_padding = left_padding / deinterleaving; + if_a_config.cropped_height = cropped_height; + if_a_config.cropped_width = width_a; + if_a_config.deinterleaving = deinterleaving; + if_a_config.buf_vecs = vectors_per_buffer; + if_a_config.buf_start_index = buf_offset_a; + if_a_config.buf_increment = vmem_increment; + if_a_config.buf_eol_offset = + buffer_width * bits_per_pixel / 8 - line_width; + if_a_config.is_yuv420_format = + (input_format == ATOMISP_INPUT_FORMAT_YUV420_8) + || (input_format == ATOMISP_INPUT_FORMAT_YUV420_10) + || (input_format == ATOMISP_INPUT_FORMAT_YUV420_16); + if_a_config.block_no_reqs = (config->mode != IA_CSS_INPUT_MODE_SENSOR); + + if (two_ppc) { + if (deinterleaving_b) { + deinterleaving = deinterleaving_b; + width_b = cropped_width * deinterleaving; + buffer_width *= deinterleaving; + /* Patch from bayer to rgb */ + num_vectors = num_vectors / 2 * + deinterleaving * width_b_factor; + vectors_per_line = num_vectors / buffer_height; + line_width = vectors_per_line * + input_formatter_get_alignment(INPUT_FORMATTER0_ID); + } + if_b_config.start_line = start_line; + if_b_config.start_column = start_column_b; + if_b_config.left_padding = left_padding / deinterleaving; + if_b_config.cropped_height = cropped_height; + if_b_config.cropped_width = width_b; + if_b_config.deinterleaving = deinterleaving; + if_b_config.buf_vecs = vectors_per_buffer; + if_b_config.buf_start_index = buf_offset_b; + if_b_config.buf_increment = vmem_increment; + if_b_config.buf_eol_offset = + buffer_width * bits_per_pixel / 8 - line_width; + if_b_config.is_yuv420_format = + input_format == ATOMISP_INPUT_FORMAT_YUV420_8 + || input_format == ATOMISP_INPUT_FORMAT_YUV420_10 + || input_format == ATOMISP_INPUT_FORMAT_YUV420_16; + if_b_config.block_no_reqs = + (config->mode != IA_CSS_INPUT_MODE_SENSOR); + + if (SH_CSS_IF_CONFIG_NOT_NEEDED != if_config_index) { + assert(if_config_index <= SH_CSS_MAX_IF_CONFIGS); + + ifmtr_set_if_blocking_mode(&if_a_config, &if_b_config); + /* Set the ifconfigs to SP group */ + sh_css_sp_set_if_configs(&if_a_config, &if_b_config, + if_config_index); + } + } else { + if (SH_CSS_IF_CONFIG_NOT_NEEDED != if_config_index) { + assert(if_config_index <= SH_CSS_MAX_IF_CONFIGS); + + ifmtr_set_if_blocking_mode(&if_a_config, NULL); + /* Set the ifconfigs to SP group */ + sh_css_sp_set_if_configs(&if_a_config, NULL, + if_config_index); + } + } + + return IA_CSS_SUCCESS; +} + +bool ifmtr_set_if_blocking_mode_reset = true; + +/************************************************************ + * Static functions + ************************************************************/ +static void ifmtr_set_if_blocking_mode( + const input_formatter_cfg_t * const config_a, + const input_formatter_cfg_t * const config_b) +{ + int i; + bool block[] = { false, false, false, false }; + assert(N_INPUT_FORMATTER_ID <= (ARRAY_SIZE(block))); + +#if !defined(IS_ISP_2400_SYSTEM) +#error "ifmtr_set_if_blocking_mode: ISP_SYSTEM must be one of {IS_ISP_2400_SYSTEM}" +#endif + + block[INPUT_FORMATTER0_ID] = (bool)config_a->block_no_reqs; + if (NULL != config_b) + block[INPUT_FORMATTER1_ID] = (bool)config_b->block_no_reqs; + + /* TODO: next could cause issues when streams are started after + * eachother. */ + /*IF should not be reconfigured/reset from host */ + if (ifmtr_set_if_blocking_mode_reset) { + ifmtr_set_if_blocking_mode_reset = false; + for (i = 0; i < N_INPUT_FORMATTER_ID; i++) { + input_formatter_ID_t id = (input_formatter_ID_t) i; + input_formatter_rst(id); + input_formatter_set_fifo_blocking_mode(id, block[id]); + } + } + + return; +} + +static enum ia_css_err ifmtr_start_column( + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_column) +{ + unsigned int in = config->input_config.input_res.width, start, + for_bayer = ia_css_ifmtr_columns_needed_for_bayer_order(config); + + if (bin_in + 2 * for_bayer > in) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* On the hardware, we want to use the middle of the input, so we + * divide the start column by 2. */ + start = (in - bin_in) / 2; + /* in case the number of extra columns is 2 or odd, we round the start + * column down */ + start &= ~0x1; + + /* now we add the one column (if needed) to correct for the bayer + * order). + */ + start += for_bayer; + *start_column = start; + return IA_CSS_SUCCESS; +} + +static enum ia_css_err ifmtr_input_start_line( + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_line) +{ + unsigned int in = config->input_config.input_res.height, start, + for_bayer = ia_css_ifmtr_lines_needed_for_bayer_order(config); + + if (bin_in + 2 * for_bayer > in) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* On the hardware, we want to use the middle of the input, so we + * divide the start line by 2. On the simulator, we cannot handle extra + * lines at the end of the frame. + */ + start = (in - bin_in) / 2; + /* in case the number of extra lines is 2 or odd, we round the start + * line down. + */ + start &= ~0x1; + + /* now we add the one line (if needed) to correct for the bayer order */ + start += for_bayer; + *start_line = start; + return IA_CSS_SUCCESS; +} + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h new file mode 100644 index 0000000000000..545f9e2da59e9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h @@ -0,0 +1,69 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_INPUTFIFO_H +#define _IA_CSS_INPUTFIFO_H + +#include +#include + +#include "ia_css_stream_format.h" + +/* SP access */ +void ia_css_inputfifo_send_input_frame( + const unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc); + +void ia_css_inputfifo_start_frame( + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc); + +void ia_css_inputfifo_send_line( + unsigned int ch_id, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2); + +void ia_css_inputfifo_send_embedded_line( + unsigned int ch_id, + enum atomisp_input_format data_type, + const unsigned short *data, + unsigned int width); + +void ia_css_inputfifo_end_frame( + unsigned int ch_id); + +#endif /* _IA_CSS_INPUTFIFO_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c new file mode 100644 index 0000000000000..24ca4aaf8df14 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c @@ -0,0 +1,613 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "platform_support.h" + +#include "ia_css_inputfifo.h" + +#include "device_access.h" + +#define __INLINE_SP__ +#include "sp.h" +#define __INLINE_ISP__ +#include "isp.h" +#define __INLINE_IRQ__ +#include "irq.h" +#define __INLINE_FIFO_MONITOR__ +#include "fifo_monitor.h" + +#define __INLINE_EVENT__ +#include "event_fifo.h" +#define __INLINE_SP__ + +#if !defined(HAS_NO_INPUT_SYSTEM) +#include "input_system.h" /* MIPI_PREDICTOR_NONE,... */ +#endif + +#include "assert_support.h" + +/* System independent */ +#include "sh_css_internal.h" +#if !defined(HAS_NO_INPUT_SYSTEM) +#include "ia_css_isys.h" +#endif + +#define HBLANK_CYCLES (187) +#define MARKER_CYCLES (6) + +#if !defined(HAS_NO_INPUT_SYSTEM) +#include +#endif + +/* The data type is used to send special cases: + * yuv420: odd lines (1, 3 etc) are twice as wide as even + * lines (0, 2, 4 etc). + * rgb: for two pixels per clock, the R and B values are sent + * to output_0 while only G is sent to output_1. This means + * that output_1 only gets half the number of values of output_0. + * WARNING: This type should also be used for Legacy YUV420. + * regular: used for all other data types (RAW, YUV422, etc) + */ +enum inputfifo_mipi_data_type { + inputfifo_mipi_data_type_regular, + inputfifo_mipi_data_type_yuv420, + inputfifo_mipi_data_type_yuv420_legacy, + inputfifo_mipi_data_type_rgb, +}; +#if !defined(HAS_NO_INPUT_SYSTEM) +static unsigned int inputfifo_curr_ch_id, inputfifo_curr_fmt_type; +#endif +struct inputfifo_instance { + unsigned int ch_id; + enum atomisp_input_format input_format; + bool two_ppc; + bool streaming; + unsigned int hblank_cycles; + unsigned int marker_cycles; + unsigned int fmt_type; + enum inputfifo_mipi_data_type type; +}; +#if !defined(HAS_NO_INPUT_SYSTEM) +/* + * Maintain a basic streaming to Mipi administration with ch_id as index + * ch_id maps on the "Mipi virtual channel ID" and can have value 0..3 + */ +#define INPUTFIFO_NR_OF_S2M_CHANNELS (4) +static struct inputfifo_instance + inputfifo_inst_admin[INPUTFIFO_NR_OF_S2M_CHANNELS]; + +/* Streaming to MIPI */ +static unsigned inputfifo_wrap_marker( +/* static inline unsigned inputfifo_wrap_marker( */ + unsigned marker) +{ + return marker | + (inputfifo_curr_ch_id << HIVE_STR_TO_MIPI_CH_ID_LSB) | + (inputfifo_curr_fmt_type << _HIVE_STR_TO_MIPI_FMT_TYPE_LSB); +} + +static inline void +_sh_css_fifo_snd(unsigned token) +{ + while (!can_event_send_token(STR2MIPI_EVENT_ID)) + hrt_sleep(); + event_send_token(STR2MIPI_EVENT_ID, token); + return; +} + +static void inputfifo_send_data_a( +/* static inline void inputfifo_send_data_a( */ +unsigned int data) +{ + unsigned int token = (1 << HIVE_STR_TO_MIPI_VALID_A_BIT) | + (data << HIVE_STR_TO_MIPI_DATA_A_LSB); + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_send_data_b( +/* static inline void inputfifo_send_data_b( */ + unsigned int data) +{ + unsigned int token = (1 << HIVE_STR_TO_MIPI_VALID_B_BIT) | + (data << _HIVE_STR_TO_MIPI_DATA_B_LSB); + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_send_data( +/* static inline void inputfifo_send_data( */ + unsigned int a, + unsigned int b) +{ + unsigned int token = ((1 << HIVE_STR_TO_MIPI_VALID_A_BIT) | + (1 << HIVE_STR_TO_MIPI_VALID_B_BIT) | + (a << HIVE_STR_TO_MIPI_DATA_A_LSB) | + (b << _HIVE_STR_TO_MIPI_DATA_B_LSB)); + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_send_sol(void) +/* static inline void inputfifo_send_sol(void) */ +{ + hrt_data token = inputfifo_wrap_marker( + 1 << HIVE_STR_TO_MIPI_SOL_BIT); + + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_send_eol(void) +/* static inline void inputfifo_send_eol(void) */ +{ + hrt_data token = inputfifo_wrap_marker( + 1 << HIVE_STR_TO_MIPI_EOL_BIT); + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_send_sof(void) +/* static inline void inputfifo_send_sof(void) */ +{ + hrt_data token = inputfifo_wrap_marker( + 1 << HIVE_STR_TO_MIPI_SOF_BIT); + + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_send_eof(void) +/* static inline void inputfifo_send_eof(void) */ +{ + hrt_data token = inputfifo_wrap_marker( + 1 << HIVE_STR_TO_MIPI_EOF_BIT); + _sh_css_fifo_snd(token); + return; +} + + + +#ifdef __ON__ +static void inputfifo_send_ch_id( +/* static inline void inputfifo_send_ch_id( */ + unsigned int ch_id) +{ + hrt_data token; + inputfifo_curr_ch_id = ch_id & _HIVE_ISP_CH_ID_MASK; + /* we send an zero marker, this will wrap the ch_id and + * fmt_type automatically. + */ + token = inputfifo_wrap_marker(0); + _sh_css_fifo_snd(token); + return; +} + +static void inputfifo_send_fmt_type( +/* static inline void inputfifo_send_fmt_type( */ + unsigned int fmt_type) +{ + hrt_data token; + inputfifo_curr_fmt_type = fmt_type & _HIVE_ISP_FMT_TYPE_MASK; + /* we send an zero marker, this will wrap the ch_id and + * fmt_type automatically. + */ + token = inputfifo_wrap_marker(0); + _sh_css_fifo_snd(token); + return; +} +#endif /* __ON__ */ + + + +static void inputfifo_send_ch_id_and_fmt_type( +/* static inline +void inputfifo_send_ch_id_and_fmt_type( */ + unsigned int ch_id, + unsigned int fmt_type) +{ + hrt_data token; + inputfifo_curr_ch_id = ch_id & _HIVE_ISP_CH_ID_MASK; + inputfifo_curr_fmt_type = fmt_type & _HIVE_ISP_FMT_TYPE_MASK; + /* we send an zero marker, this will wrap the ch_id and + * fmt_type automatically. + */ + token = inputfifo_wrap_marker(0); + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_send_empty_token(void) +/* static inline void inputfifo_send_empty_token(void) */ +{ + hrt_data token = inputfifo_wrap_marker(0); + _sh_css_fifo_snd(token); + return; +} + + + +static void inputfifo_start_frame( +/* static inline void inputfifo_start_frame( */ + unsigned int ch_id, + unsigned int fmt_type) +{ + inputfifo_send_ch_id_and_fmt_type(ch_id, fmt_type); + inputfifo_send_sof(); + return; +} + + + +static void inputfifo_end_frame( + unsigned int marker_cycles) +{ + unsigned int i; + for (i = 0; i < marker_cycles; i++) + inputfifo_send_empty_token(); + inputfifo_send_eof(); + return; +} + + + +static void inputfifo_send_line2( + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2, + unsigned int hblank_cycles, + unsigned int marker_cycles, + unsigned int two_ppc, + enum inputfifo_mipi_data_type type) +{ + unsigned int i, is_rgb = 0, is_legacy = 0; + + assert(data != NULL); + assert((data2 != NULL) || (width2 == 0)); + if (type == inputfifo_mipi_data_type_rgb) + is_rgb = 1; + + if (type == inputfifo_mipi_data_type_yuv420_legacy) + is_legacy = 1; + + for (i = 0; i < hblank_cycles; i++) + inputfifo_send_empty_token(); + inputfifo_send_sol(); + for (i = 0; i < marker_cycles; i++) + inputfifo_send_empty_token(); + for (i = 0; i < width; i++, data++) { + /* for RGB in two_ppc, we only actually send 2 pixels per + * clock in the even pixels (0, 2 etc). In the other cycles, + * we only send 1 pixel, to data[0]. + */ + unsigned int send_two_pixels = two_ppc; + if ((is_rgb || is_legacy) && (i % 3 == 2)) + send_two_pixels = 0; + if (send_two_pixels) { + if (i + 1 == width) { + /* for jpg (binary) copy, this can occur + * if the file contains an odd number of bytes. + */ + inputfifo_send_data( + data[0], 0); + } else { + inputfifo_send_data( + data[0], data[1]); + } + /* Additional increment because we send 2 pixels */ + data++; + i++; + } else if (two_ppc && is_legacy) { + inputfifo_send_data_b(data[0]); + } else { + inputfifo_send_data_a(data[0]); + } + } + + for (i = 0; i < width2; i++, data2++) { + /* for RGB in two_ppc, we only actually send 2 pixels per + * clock in the even pixels (0, 2 etc). In the other cycles, + * we only send 1 pixel, to data2[0]. + */ + unsigned int send_two_pixels = two_ppc; + if ((is_rgb || is_legacy) && (i % 3 == 2)) + send_two_pixels = 0; + if (send_two_pixels) { + if (i + 1 == width2) { + /* for jpg (binary) copy, this can occur + * if the file contains an odd number of bytes. + */ + inputfifo_send_data( + data2[0], 0); + } else { + inputfifo_send_data( + data2[0], data2[1]); + } + /* Additional increment because we send 2 pixels */ + data2++; + i++; + } else if (two_ppc && is_legacy) { + inputfifo_send_data_b(data2[0]); + } else { + inputfifo_send_data_a(data2[0]); + } + } + for (i = 0; i < hblank_cycles; i++) + inputfifo_send_empty_token(); + inputfifo_send_eol(); + return; +} + + + +static void +inputfifo_send_line(const unsigned short *data, + unsigned int width, + unsigned int hblank_cycles, + unsigned int marker_cycles, + unsigned int two_ppc, + enum inputfifo_mipi_data_type type) +{ + assert(data != NULL); + inputfifo_send_line2(data, width, NULL, 0, + hblank_cycles, + marker_cycles, + two_ppc, + type); +} + + +/* Send a frame of data into the input network via the GP FIFO. + * Parameters: + * - data: array of 16 bit values that contains all data for the frame. + * - width: width of a line in number of subpixels, for yuv420 it is the + * number of Y components per line. + * - height: height of the frame in number of lines. + * - ch_id: channel ID. + * - fmt_type: format type. + * - hblank_cycles: length of horizontal blanking in cycles. + * - marker_cycles: number of empty cycles after start-of-line and before + * end-of-frame. + * - two_ppc: boolean, describes whether to send one or two pixels per clock + * cycle. In this mode, we sent pixels N and N+1 in the same cycle, + * to IF_PRIM_A and IF_PRIM_B respectively. The caller must make + * sure the input data has been formatted correctly for this. + * For example, for RGB formats this means that unused values + * must be inserted. + * - yuv420: boolean, describes whether (non-legacy) yuv420 data is used. In + * this mode, the odd lines (1,3,5 etc) are half as long as the + * even lines (2,4,6 etc). + * Note that the first line is odd (1) and the second line is even + * (2). + * + * This function does not do any reordering of pixels, the caller must make + * sure the data is in the righ format. Please refer to the CSS receiver + * documentation for details on the data formats. + */ + +static void inputfifo_send_frame( + const unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int ch_id, + unsigned int fmt_type, + unsigned int hblank_cycles, + unsigned int marker_cycles, + unsigned int two_ppc, + enum inputfifo_mipi_data_type type) +{ + unsigned int i; + + assert(data != NULL); + inputfifo_start_frame(ch_id, fmt_type); + + for (i = 0; i < height; i++) { + if ((type == inputfifo_mipi_data_type_yuv420) && + (i & 1) == 1) { + inputfifo_send_line(data, 2 * width, + hblank_cycles, + marker_cycles, + two_ppc, type); + data += 2 * width; + } else { + inputfifo_send_line(data, width, + hblank_cycles, + marker_cycles, + two_ppc, type); + data += width; + } + } + inputfifo_end_frame(marker_cycles); + return; +} + + + +static enum inputfifo_mipi_data_type inputfifo_determine_type( + enum atomisp_input_format input_format) +{ + enum inputfifo_mipi_data_type type; + + type = inputfifo_mipi_data_type_regular; + if (input_format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { + type = + inputfifo_mipi_data_type_yuv420_legacy; + } else if (input_format == ATOMISP_INPUT_FORMAT_YUV420_8 || + input_format == ATOMISP_INPUT_FORMAT_YUV420_10 || + input_format == ATOMISP_INPUT_FORMAT_YUV420_16) { + type = + inputfifo_mipi_data_type_yuv420; + } else if (input_format >= ATOMISP_INPUT_FORMAT_RGB_444 && + input_format <= ATOMISP_INPUT_FORMAT_RGB_888) { + type = + inputfifo_mipi_data_type_rgb; + } + return type; +} + + + +static struct inputfifo_instance *inputfifo_get_inst( + unsigned int ch_id) +{ + return &inputfifo_inst_admin[ch_id]; +} + +void ia_css_inputfifo_send_input_frame( + const unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc) +{ + unsigned int fmt_type, hblank_cycles, marker_cycles; + enum inputfifo_mipi_data_type type; + + assert(data != NULL); + hblank_cycles = HBLANK_CYCLES; + marker_cycles = MARKER_CYCLES; + ia_css_isys_convert_stream_format_to_mipi_format(input_format, + MIPI_PREDICTOR_NONE, + &fmt_type); + + type = inputfifo_determine_type(input_format); + + inputfifo_send_frame(data, width, height, + ch_id, fmt_type, hblank_cycles, marker_cycles, + two_ppc, type); +} + + + +void ia_css_inputfifo_start_frame( + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc) +{ + struct inputfifo_instance *s2mi; + s2mi = inputfifo_get_inst(ch_id); + + s2mi->ch_id = ch_id; + ia_css_isys_convert_stream_format_to_mipi_format(input_format, + MIPI_PREDICTOR_NONE, + &s2mi->fmt_type); + s2mi->two_ppc = two_ppc; + s2mi->type = inputfifo_determine_type(input_format); + s2mi->hblank_cycles = HBLANK_CYCLES; + s2mi->marker_cycles = MARKER_CYCLES; + s2mi->streaming = true; + + inputfifo_start_frame(ch_id, s2mi->fmt_type); + return; +} + + + +void ia_css_inputfifo_send_line( + unsigned int ch_id, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2) +{ + struct inputfifo_instance *s2mi; + + assert(data != NULL); + assert((data2 != NULL) || (width2 == 0)); + s2mi = inputfifo_get_inst(ch_id); + + + /* Set global variables that indicate channel_id and format_type */ + inputfifo_curr_ch_id = (s2mi->ch_id) & _HIVE_ISP_CH_ID_MASK; + inputfifo_curr_fmt_type = (s2mi->fmt_type) & _HIVE_ISP_FMT_TYPE_MASK; + + inputfifo_send_line2(data, width, data2, width2, + s2mi->hblank_cycles, + s2mi->marker_cycles, + s2mi->two_ppc, + s2mi->type); +} + + +void ia_css_inputfifo_send_embedded_line( + unsigned int ch_id, + enum atomisp_input_format data_type, + const unsigned short *data, + unsigned int width) +{ + struct inputfifo_instance *s2mi; + unsigned int fmt_type; + + assert(data != NULL); + s2mi = inputfifo_get_inst(ch_id); + ia_css_isys_convert_stream_format_to_mipi_format(data_type, + MIPI_PREDICTOR_NONE, &fmt_type); + + /* Set format_type for metadata line. */ + inputfifo_curr_fmt_type = fmt_type & _HIVE_ISP_FMT_TYPE_MASK; + + inputfifo_send_line(data, width, s2mi->hblank_cycles, s2mi->marker_cycles, + s2mi->two_ppc, inputfifo_mipi_data_type_regular); +} + + +void ia_css_inputfifo_end_frame( + unsigned int ch_id) +{ + struct inputfifo_instance *s2mi; + s2mi = inputfifo_get_inst(ch_id); + + /* Set global variables that indicate channel_id and format_type */ + inputfifo_curr_ch_id = (s2mi->ch_id) & _HIVE_ISP_CH_ID_MASK; + inputfifo_curr_fmt_type = (s2mi->fmt_type) & _HIVE_ISP_FMT_TYPE_MASK; + + /* Call existing HRT function */ + inputfifo_end_frame(s2mi->marker_cycles); + + s2mi->streaming = false; + return; +} +#endif /* #if !defined(HAS_NO_INPUT_SYSTEM) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h new file mode 100644 index 0000000000000..285749885105c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h @@ -0,0 +1,118 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_ISP_PARAM_H_ +#define _IA_CSS_ISP_PARAM_H_ + +#include +#include "ia_css_isp_param_types.h" + +/* Set functions for parameter memory descriptors */ +void +ia_css_isp_param_set_mem_init( + struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + char *address, size_t size); + +void +ia_css_isp_param_set_css_mem_init( + struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + hrt_vaddress address, size_t size); + +void +ia_css_isp_param_set_isp_mem_init( + struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + uint32_t address, size_t size); + +/* Get functions for parameter memory descriptors */ +const struct ia_css_host_data* +ia_css_isp_param_get_mem_init( + const struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem); + +const struct ia_css_data* +ia_css_isp_param_get_css_mem_init( + const struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem); + +const struct ia_css_isp_data* +ia_css_isp_param_get_isp_mem_init( + const struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem); + +/* Initialize the memory interface sizes and addresses */ +void +ia_css_init_memory_interface( + struct ia_css_isp_param_css_segments *isp_mem_if, + const struct ia_css_isp_param_host_segments *mem_params, + const struct ia_css_isp_param_css_segments *css_params); + +/* Allocate memory parameters */ +enum ia_css_err +ia_css_isp_param_allocate_isp_parameters( + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params, + const struct ia_css_isp_param_isp_segments *mem_initializers); + +/* Destroy memory parameters */ +void +ia_css_isp_param_destroy_isp_parameters( + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params); + +/* Load fw parameters */ +void +ia_css_isp_param_load_fw_params( + const char *fw, + union ia_css_all_memory_offsets *mem_offsets, + const struct ia_css_isp_param_memory_offsets *memory_offsets, + bool init); + +/* Copy host parameter images to ddr */ +enum ia_css_err +ia_css_isp_param_copy_isp_mem_if_to_ddr( + struct ia_css_isp_param_css_segments *ddr, + const struct ia_css_isp_param_host_segments *host, + enum ia_css_param_class pclass); + +/* Enable a pipeline by setting the control field in the isp dmem parameters */ +void +ia_css_isp_param_enable_pipeline( + const struct ia_css_isp_param_host_segments *mem_params); + +#endif /* _IA_CSS_ISP_PARAM_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h new file mode 100644 index 0000000000000..9d111793bb65b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h @@ -0,0 +1,98 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_ISP_PARAM_TYPES_H_ +#define _IA_CSS_ISP_PARAM_TYPES_H_ + +#include "ia_css_types.h" +#include +#include + +/* Short hands */ +#define IA_CSS_ISP_DMEM IA_CSS_ISP_DMEM0 +#define IA_CSS_ISP_VMEM IA_CSS_ISP_VMEM0 + +/* The driver depends on this, to be removed later. */ +#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES + +/* Explicit member numbering to avoid fish type checker bug */ +enum ia_css_param_class { + IA_CSS_PARAM_CLASS_PARAM = 0, /* Late binding parameters, like 3A */ + IA_CSS_PARAM_CLASS_CONFIG = 1, /* Pipe config time parameters, like resolution */ + IA_CSS_PARAM_CLASS_STATE = 2, /* State parameters, like tnr buffer index */ +#if 0 /* Not yet implemented */ + IA_CSS_PARAM_CLASS_FRAME = 3, /* Frame time parameters, like output buffer */ +#endif +}; +#define IA_CSS_NUM_PARAM_CLASSES (IA_CSS_PARAM_CLASS_STATE + 1) + +/* ISP parameter descriptor */ +struct ia_css_isp_parameter { + uint32_t offset; /* Offset in isp_)parameters, etc. */ + uint32_t size; /* Disabled if 0 */ +}; + + +/* Address/size of each parameter class in each isp memory, host memory pointers */ +struct ia_css_isp_param_host_segments { + struct ia_css_host_data params[IA_CSS_NUM_PARAM_CLASSES][IA_CSS_NUM_MEMORIES]; +}; + +/* Address/size of each parameter class in each isp memory, css memory pointers */ +struct ia_css_isp_param_css_segments { + struct ia_css_data params[IA_CSS_NUM_PARAM_CLASSES][IA_CSS_NUM_MEMORIES]; +}; + +/* Address/size of each parameter class in each isp memory, isp memory pointers */ +struct ia_css_isp_param_isp_segments { + struct ia_css_isp_data params[IA_CSS_NUM_PARAM_CLASSES][IA_CSS_NUM_MEMORIES]; +}; + +/* Memory offsets in binary info */ +struct ia_css_isp_param_memory_offsets { + uint32_t offsets[IA_CSS_NUM_PARAM_CLASSES]; /** offset wrt hdr in bytes */ +}; + +/* Offsets for ISP kernel parameters per isp memory. + * Only relevant for standard ISP binaries, not ACC or SP. + */ +union ia_css_all_memory_offsets { + struct { + CSS_ALIGN(struct ia_css_memory_offsets *param, 8); + CSS_ALIGN(struct ia_css_config_memory_offsets *config, 8); + CSS_ALIGN(struct ia_css_state_memory_offsets *state, 8); + } offsets; + struct { + CSS_ALIGN(void *ptr, 8); + } array[IA_CSS_NUM_PARAM_CLASSES]; +}; + +#endif /* _IA_CSS_ISP_PARAM_TYPES_H_ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c new file mode 100644 index 0000000000000..f793ce125f02a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c @@ -0,0 +1,227 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "memory_access.h" +#include "ia_css_pipeline.h" +#include "ia_css_isp_param.h" + +/* Set functions for parameter memory descriptors */ + +void +ia_css_isp_param_set_mem_init( + struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + char *address, size_t size) +{ + mem_init->params[pclass][mem].address = address; + mem_init->params[pclass][mem].size = (uint32_t)size; +} + +void +ia_css_isp_param_set_css_mem_init( + struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + hrt_vaddress address, size_t size) +{ + mem_init->params[pclass][mem].address = address; + mem_init->params[pclass][mem].size = (uint32_t)size; +} + +void +ia_css_isp_param_set_isp_mem_init( + struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + uint32_t address, size_t size) +{ + mem_init->params[pclass][mem].address = address; + mem_init->params[pclass][mem].size = (uint32_t)size; +} + +/* Get functions for parameter memory descriptors */ +const struct ia_css_host_data* +ia_css_isp_param_get_mem_init( + const struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem) +{ + return &mem_init->params[pclass][mem]; +} + +const struct ia_css_data* +ia_css_isp_param_get_css_mem_init( + const struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem) +{ + return &mem_init->params[pclass][mem]; +} + +const struct ia_css_isp_data* +ia_css_isp_param_get_isp_mem_init( + const struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem) +{ + return &mem_init->params[pclass][mem]; +} + +void +ia_css_init_memory_interface( + struct ia_css_isp_param_css_segments *isp_mem_if, + const struct ia_css_isp_param_host_segments *mem_params, + const struct ia_css_isp_param_css_segments *css_params) +{ + unsigned pclass, mem; + for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { + memset(isp_mem_if->params[pclass], 0, sizeof(isp_mem_if->params[pclass])); + for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { + if (!mem_params->params[pclass][mem].address) + continue; + isp_mem_if->params[pclass][mem].size = mem_params->params[pclass][mem].size; + if (pclass != IA_CSS_PARAM_CLASS_PARAM) + isp_mem_if->params[pclass][mem].address = css_params->params[pclass][mem].address; + } + } +} + +enum ia_css_err +ia_css_isp_param_allocate_isp_parameters( + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params, + const struct ia_css_isp_param_isp_segments *mem_initializers) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned mem, pclass; + + pclass = IA_CSS_PARAM_CLASS_PARAM; + for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { + for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { + uint32_t size = 0; + if (mem_initializers) + size = mem_initializers->params[pclass][mem].size; + mem_params->params[pclass][mem].size = size; + mem_params->params[pclass][mem].address = NULL; + css_params->params[pclass][mem].size = size; + css_params->params[pclass][mem].address = 0x0; + if (size) { + mem_params->params[pclass][mem].address = sh_css_calloc(1, size); + if (!mem_params->params[pclass][mem].address) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto cleanup; + } + if (pclass != IA_CSS_PARAM_CLASS_PARAM) { + css_params->params[pclass][mem].address = mmgr_malloc(size); + if (!css_params->params[pclass][mem].address) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto cleanup; + } + } + } + } + } + return err; +cleanup: + ia_css_isp_param_destroy_isp_parameters(mem_params, css_params); + return err; +} + +void +ia_css_isp_param_destroy_isp_parameters( + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params) +{ + unsigned mem, pclass; + + for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { + for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { + if (mem_params->params[pclass][mem].address) + sh_css_free(mem_params->params[pclass][mem].address); + if (css_params->params[pclass][mem].address) + hmm_free(css_params->params[pclass][mem].address); + mem_params->params[pclass][mem].address = NULL; + css_params->params[pclass][mem].address = 0x0; + } + } +} + +void +ia_css_isp_param_load_fw_params( + const char *fw, + union ia_css_all_memory_offsets *mem_offsets, + const struct ia_css_isp_param_memory_offsets *memory_offsets, + bool init) +{ + unsigned pclass; + for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { + mem_offsets->array[pclass].ptr = NULL; + if (init) + mem_offsets->array[pclass].ptr = (void *)(fw + memory_offsets->offsets[pclass]); + } +} + +enum ia_css_err +ia_css_isp_param_copy_isp_mem_if_to_ddr( + struct ia_css_isp_param_css_segments *ddr, + const struct ia_css_isp_param_host_segments *host, + enum ia_css_param_class pclass) +{ + unsigned mem; + + for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { + size_t size = host->params[pclass][mem].size; + hrt_vaddress ddr_mem_ptr = ddr->params[pclass][mem].address; + char *host_mem_ptr = host->params[pclass][mem].address; + if (size != ddr->params[pclass][mem].size) + return IA_CSS_ERR_INTERNAL_ERROR; + if (!size) + continue; + mmgr_store(ddr_mem_ptr, host_mem_ptr, size); + } + return IA_CSS_SUCCESS; +} + +void +ia_css_isp_param_enable_pipeline( + const struct ia_css_isp_param_host_segments *mem_params) +{ + /* By protocol b0 of the mandatory uint32_t first field of the + input parameter is a disable bit*/ + short dmem_offset = 0; + + if (mem_params->params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM0].size == 0) + return; + + *(uint32_t *)&mem_params->params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM0].address[dmem_offset] = 0x0; +} + + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h new file mode 100644 index 0000000000000..8c005db9766e2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h @@ -0,0 +1,201 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_ISYS_H__ +#define __IA_CSS_ISYS_H__ + +#include +#include +#include +#include +#include +#include +#include "ia_css_isys_comm.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +/** + * Virtual Input System. (Input System 2401) + */ +typedef input_system_cfg_t ia_css_isys_descr_t; +/* end of Virtual Input System */ +#endif + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +input_system_error_t ia_css_isys_init(void); +void ia_css_isys_uninit(void); +enum mipi_port_id ia_css_isys_port_to_mipi_port( + enum mipi_port_id api_port); +#endif + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + +/** + * @brief Register one (virtual) stream. This is used to track when all + * virtual streams are configured inside the input system. The CSI RX is + * only started when all registered streams are configured. + * + * @param[in] port CSI port + * @param[in] isys_stream_id Stream handle generated with ia_css_isys_generate_stream_id() + * Must be lower than SH_CSS_MAX_ISYS_CHANNEL_NODES + * @return IA_CSS_SUCCESS if successful, IA_CSS_ERR_INTERNAL_ERROR if + * there is already a stream registered with the same handle + */ +enum ia_css_err ia_css_isys_csi_rx_register_stream( + enum mipi_port_id port, + uint32_t isys_stream_id); + +/** + * @brief Unregister one (virtual) stream. This is used to track when all + * virtual streams are configured inside the input system. The CSI RX is + * only started when all registered streams are configured. + * + * @param[in] port CSI port + * @param[in] isys_stream_id Stream handle generated with ia_css_isys_generate_stream_id() + * Must be lower than SH_CSS_MAX_ISYS_CHANNEL_NODES + * @return IA_CSS_SUCCESS if successful, IA_CSS_ERR_INTERNAL_ERROR if + * there is no stream registered with that handle + */ +enum ia_css_err ia_css_isys_csi_rx_unregister_stream( + enum mipi_port_id port, + uint32_t isys_stream_id); + +enum ia_css_err ia_css_isys_convert_compressed_format( + struct ia_css_csi2_compression *comp, + struct input_system_cfg_s *cfg); +unsigned int ia_css_csi2_calculate_input_system_alignment( + enum atomisp_input_format fmt_type); +#endif + +#if !defined(USE_INPUT_SYSTEM_VERSION_2401) +/* CSS Receiver */ +void ia_css_isys_rx_configure( + const rx_cfg_t *config, + const enum ia_css_input_mode input_mode); + +void ia_css_isys_rx_disable(void); + +void ia_css_isys_rx_enable_all_interrupts(enum mipi_port_id port); + +unsigned int ia_css_isys_rx_get_interrupt_reg(enum mipi_port_id port); +void ia_css_isys_rx_get_irq_info(enum mipi_port_id port, + unsigned int *irq_infos); +void ia_css_isys_rx_clear_irq_info(enum mipi_port_id port, + unsigned int irq_infos); +unsigned int ia_css_isys_rx_translate_irq_infos(unsigned int bits); + +#endif /* #if !defined(USE_INPUT_SYSTEM_VERSION_2401) */ + +/* @brief Translate format and compression to format type. + * + * @param[in] input_format The input format. + * @param[in] compression The compression scheme. + * @param[out] fmt_type Pointer to the resulting format type. + * @return Error code. + * + * Translate an input format and mipi compression pair to the fmt_type. + * This is normally done by the sensor, but when using the input fifo, this + * format type must be sumitted correctly by the application. + */ +enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( + enum atomisp_input_format input_format, + mipi_predictor_t compression, + unsigned int *fmt_type); + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +/** + * Virtual Input System. (Input System 2401) + */ +extern ia_css_isys_error_t ia_css_isys_stream_create( + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_h isys_stream, + uint32_t isys_stream_id); + +extern void ia_css_isys_stream_destroy( + ia_css_isys_stream_h isys_stream); + +extern ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( + ia_css_isys_stream_h isys_stream, + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_cfg_t *isys_stream_cfg); + +extern void ia_css_isys_csi_rx_lut_rmgr_init(void); + +extern void ia_css_isys_csi_rx_lut_rmgr_uninit(void); + +extern bool ia_css_isys_csi_rx_lut_rmgr_acquire( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); + +extern void ia_css_isys_csi_rx_lut_rmgr_release( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); + + +extern void ia_css_isys_ibuf_rmgr_init(void); + +extern void ia_css_isys_ibuf_rmgr_uninit(void); + +extern bool ia_css_isys_ibuf_rmgr_acquire( + uint32_t size, + uint32_t *start_addr); + +extern void ia_css_isys_ibuf_rmgr_release( + uint32_t *start_addr); + +extern void ia_css_isys_dma_channel_rmgr_init(void); + +extern void ia_css_isys_dma_channel_rmgr_uninit(void); + +extern bool ia_css_isys_dma_channel_rmgr_acquire( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); + +extern void ia_css_isys_dma_channel_rmgr_release( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); + +extern void ia_css_isys_stream2mmio_sid_rmgr_init(void); + +extern void ia_css_isys_stream2mmio_sid_rmgr_uninit(void); + +extern bool ia_css_isys_stream2mmio_sid_rmgr_acquire( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); + +extern void ia_css_isys_stream2mmio_sid_rmgr_release( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); + +/* end of Virtual Input System */ +#endif + +#endif /* __IA_CSS_ISYS_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h new file mode 100644 index 0000000000000..0c3434ad06139 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h @@ -0,0 +1,69 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_ISYS_COMM_H +#define __IA_CSS_ISYS_COMM_H + +#include +#include + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +#include /* inline */ +#include +#include /* IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH */ + +#define SH_CSS_NODES_PER_THREAD 2 +#define SH_CSS_MAX_ISYS_CHANNEL_NODES (SH_CSS_MAX_SP_THREADS * SH_CSS_NODES_PER_THREAD) + +/* + * a) ia_css_isys_stream_h & ia_css_isys_stream_cfg_t come from host. + * + * b) Here it is better to use actual structures for stream handle + * instead of opaque handles. Otherwise, we need to have another + * communication channel to interpret that opaque handle(this handle is + * maintained by host and needs to be populated to sp for every stream open) + * */ +typedef virtual_input_system_stream_t *ia_css_isys_stream_h; +typedef virtual_input_system_stream_cfg_t ia_css_isys_stream_cfg_t; + +/* + * error check for ISYS APIs. + * */ +typedef bool ia_css_isys_error_t; + +static inline uint32_t ia_css_isys_generate_stream_id( + uint32_t sp_thread_id, + uint32_t stream_id) +{ + return sp_thread_id * IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH + stream_id; +} + +#endif /* USE_INPUT_SYSTEM_VERSION_2401*/ +#endif /*_IA_CSS_ISYS_COMM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c new file mode 100644 index 0000000000000..a914ce5532ec9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c @@ -0,0 +1,179 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "system_global.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + +#include "assert_support.h" +#include "platform_support.h" +#include "ia_css_isys.h" +#include "bitop_support.h" +#include "ia_css_pipeline.h" /* ia_css_pipeline_get_pipe_io_status() */ +#include "sh_css_internal.h" /* sh_css_sp_pipeline_io_status + * SH_CSS_MAX_SP_THREADS + */ +#include "csi_rx_rmgr.h" + +static isys_csi_rx_rsrc_t isys_csi_rx_rsrc[N_CSI_RX_BACKEND_ID]; + +void ia_css_isys_csi_rx_lut_rmgr_init(void) +{ + memset(isys_csi_rx_rsrc, 0, sizeof(isys_csi_rx_rsrc)); +} + +void ia_css_isys_csi_rx_lut_rmgr_uninit(void) +{ + memset(isys_csi_rx_rsrc, 0, sizeof(isys_csi_rx_rsrc)); +} + +bool ia_css_isys_csi_rx_lut_rmgr_acquire( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) +{ + bool retval = false; + uint32_t max_num_packets_of_type; + uint32_t num_active_of_type; + isys_csi_rx_rsrc_t *cur_rsrc = NULL; + uint16_t i; + + assert(backend < N_CSI_RX_BACKEND_ID); + assert((packet_type == CSI_MIPI_PACKET_TYPE_LONG) || (packet_type == CSI_MIPI_PACKET_TYPE_SHORT)); + assert(entry != NULL); + + if ((backend < N_CSI_RX_BACKEND_ID) && (entry != NULL)) { + cur_rsrc = &isys_csi_rx_rsrc[backend]; + if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { + max_num_packets_of_type = N_LONG_PACKET_LUT_ENTRIES[backend]; + num_active_of_type = cur_rsrc->num_long_packets; + } else { + max_num_packets_of_type = N_SHORT_PACKET_LUT_ENTRIES[backend]; + num_active_of_type = cur_rsrc->num_short_packets; + } + + if (num_active_of_type < max_num_packets_of_type) { + for (i = 0; i < max_num_packets_of_type; i++) { + if (bitop_getbit(cur_rsrc->active_table, i) == 0) { + bitop_setbit(cur_rsrc->active_table, i); + + if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { + entry->long_packet_entry = i; + entry->short_packet_entry = 0; + cur_rsrc->num_long_packets++; + } else { + entry->long_packet_entry = 0; + entry->short_packet_entry = i; + cur_rsrc->num_short_packets++; + } + cur_rsrc->num_active++; + retval = true; + break; + } + } + } + } + return retval; +} + +void ia_css_isys_csi_rx_lut_rmgr_release( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) +{ + uint32_t max_num_packets; + isys_csi_rx_rsrc_t *cur_rsrc = NULL; + uint32_t packet_entry = 0; + + assert(backend < N_CSI_RX_BACKEND_ID); + assert(entry != NULL); + assert((packet_type >= CSI_MIPI_PACKET_TYPE_LONG) || (packet_type <= CSI_MIPI_PACKET_TYPE_SHORT)); + + if ((backend < N_CSI_RX_BACKEND_ID) && (entry != NULL)) { + if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { + max_num_packets = N_LONG_PACKET_LUT_ENTRIES[backend]; + packet_entry = entry->long_packet_entry; + } else { + max_num_packets = N_SHORT_PACKET_LUT_ENTRIES[backend]; + packet_entry = entry->short_packet_entry; + } + + cur_rsrc = &isys_csi_rx_rsrc[backend]; + if ((packet_entry < max_num_packets) && (cur_rsrc->num_active > 0)) { + if (bitop_getbit(cur_rsrc->active_table, packet_entry) == 1) { + bitop_clearbit(cur_rsrc->active_table, packet_entry); + + if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) + cur_rsrc->num_long_packets--; + else + cur_rsrc->num_short_packets--; + cur_rsrc->num_active--; + } + } + } +} + +enum ia_css_err ia_css_isys_csi_rx_register_stream( + enum mipi_port_id port, + uint32_t isys_stream_id) +{ + enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; + + if ((port < N_INPUT_SYSTEM_CSI_PORT) && + (isys_stream_id < SH_CSS_MAX_ISYS_CHANNEL_NODES)) { + struct sh_css_sp_pipeline_io_status *pipe_io_status; + pipe_io_status = ia_css_pipeline_get_pipe_io_status(); + if (bitop_getbit(pipe_io_status->active[port], isys_stream_id) == 0) { + bitop_setbit(pipe_io_status->active[port], isys_stream_id); + pipe_io_status->running[port] = 0; + retval = IA_CSS_SUCCESS; + } + } + return retval; +} + +enum ia_css_err ia_css_isys_csi_rx_unregister_stream( + enum mipi_port_id port, + uint32_t isys_stream_id) +{ + enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; + + if ((port < N_INPUT_SYSTEM_CSI_PORT) && + (isys_stream_id < SH_CSS_MAX_ISYS_CHANNEL_NODES)) { + struct sh_css_sp_pipeline_io_status *pipe_io_status; + pipe_io_status = ia_css_pipeline_get_pipe_io_status(); + if (bitop_getbit(pipe_io_status->active[port], isys_stream_id) == 1) { + bitop_clearbit(pipe_io_status->active[port], isys_stream_id); + retval = IA_CSS_SUCCESS; + } + } + return retval; +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h new file mode 100644 index 0000000000000..c27b0ab83c938 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h @@ -0,0 +1,43 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __CSI_RX_RMGR_H_INCLUDED__ +#define __CSI_RX_RMGR_H_INCLUDED__ + +typedef struct isys_csi_rx_rsrc_s isys_csi_rx_rsrc_t; +struct isys_csi_rx_rsrc_s { + uint32_t active_table; + uint32_t num_active; + uint16_t num_long_packets; + uint16_t num_short_packets; +}; + +#endif /* __CSI_RX_RMGR_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c new file mode 100644 index 0000000000000..d8c3b75d7faca --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c @@ -0,0 +1,140 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010 - 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#endif + +#include "system_global.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + +#include "assert_support.h" +#include "platform_support.h" +#include "ia_css_isys.h" +#include "ibuf_ctrl_rmgr.h" + +static ibuf_rsrc_t ibuf_rsrc; + +static ibuf_handle_t *getHandle(uint16_t index) +{ + ibuf_handle_t *handle = NULL; + + if (index < MAX_IBUF_HANDLES) + handle = &ibuf_rsrc.handles[index]; + return handle; +} + +void ia_css_isys_ibuf_rmgr_init(void) +{ + memset(&ibuf_rsrc, 0, sizeof(ibuf_rsrc)); + ibuf_rsrc.free_size = MAX_INPUT_BUFFER_SIZE; +} + +void ia_css_isys_ibuf_rmgr_uninit(void) +{ + memset(&ibuf_rsrc, 0, sizeof(ibuf_rsrc)); + ibuf_rsrc.free_size = MAX_INPUT_BUFFER_SIZE; +} + +bool ia_css_isys_ibuf_rmgr_acquire( + uint32_t size, + uint32_t *start_addr) +{ + bool retval = false; + bool input_buffer_found = false; + uint32_t aligned_size; + ibuf_handle_t *handle = NULL; + uint16_t i; + + assert(start_addr != NULL); + assert(size > 0); + + aligned_size = (size + (IBUF_ALIGN - 1)) & ~(IBUF_ALIGN - 1); + + /* Check if there is an available un-used handle with the size + * that will fulfill the request. + */ + if (ibuf_rsrc.num_active < ibuf_rsrc.num_allocated) { + for (i = 0; i < ibuf_rsrc.num_allocated; i++) { + handle = getHandle(i); + if (!handle->active) { + if (handle->size >= aligned_size) { + handle->active = true; + input_buffer_found = true; + ibuf_rsrc.num_active++; + break; + } + } + } + } + + if (!input_buffer_found) { + /* There were no available handles that fulfilled the + * request. Allocate a new handle with the requested size. + */ + if ((ibuf_rsrc.num_allocated < MAX_IBUF_HANDLES) && + (ibuf_rsrc.free_size >= aligned_size)) { + handle = getHandle(ibuf_rsrc.num_allocated); + handle->start_addr = ibuf_rsrc.free_start_addr; + handle->size = aligned_size; + handle->active = true; + + ibuf_rsrc.free_start_addr += aligned_size; + ibuf_rsrc.free_size -= aligned_size; + ibuf_rsrc.num_active++; + ibuf_rsrc.num_allocated++; + + input_buffer_found = true; + } + } + + if (input_buffer_found && handle) { + *start_addr = handle->start_addr; + retval = true; + } + + return retval; +} + +void ia_css_isys_ibuf_rmgr_release( + uint32_t *start_addr) +{ + uint16_t i; + ibuf_handle_t *handle = NULL; + + assert(start_addr != NULL); + + for (i = 0; i < ibuf_rsrc.num_allocated; i++) { + handle = getHandle(i); + if (handle->active && handle->start_addr == *start_addr) { + handle->active = false; + ibuf_rsrc.num_active--; + break; + } + } +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h new file mode 100644 index 0000000000000..424cfe9f3b2a2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h @@ -0,0 +1,55 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IBUF_CTRL_RMGR_H_INCLUDED__ +#define __IBUF_CTRL_RMGR_H_INCLUDED__ + +#define MAX_IBUF_HANDLES 24 +#define MAX_INPUT_BUFFER_SIZE (64 * 1024) +#define IBUF_ALIGN 8 + +typedef struct ibuf_handle_s ibuf_handle_t; +struct ibuf_handle_s { + uint32_t start_addr; + uint32_t size; + bool active; +}; + +typedef struct ibuf_rsrc_s ibuf_rsrc_t; +struct ibuf_rsrc_s { + uint32_t free_start_addr; + uint32_t free_size; + uint16_t num_active; + uint16_t num_allocated; + ibuf_handle_t handles[MAX_IBUF_HANDLES]; +}; + +#endif /* __IBUF_CTRL_RMGR_H_INCLUDED */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c new file mode 100644 index 0000000000000..4def4a542b7db --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c @@ -0,0 +1,103 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "system_global.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + +#include "assert_support.h" +#include "platform_support.h" +#include "ia_css_isys.h" +#include "bitop_support.h" +#include "isys_dma_rmgr.h" + +static isys_dma_rsrc_t isys_dma_rsrc[N_ISYS2401_DMA_ID]; + +void ia_css_isys_dma_channel_rmgr_init(void) +{ + memset(&isys_dma_rsrc, 0, sizeof(isys_dma_rsrc_t)); +} + +void ia_css_isys_dma_channel_rmgr_uninit(void) +{ + memset(&isys_dma_rsrc, 0, sizeof(isys_dma_rsrc_t)); +} + +bool ia_css_isys_dma_channel_rmgr_acquire( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) +{ + bool retval = false; + isys2401_dma_channel i; + isys2401_dma_channel max_dma_channel; + isys_dma_rsrc_t *cur_rsrc = NULL; + + assert(dma_id < N_ISYS2401_DMA_ID); + assert(channel != NULL); + + max_dma_channel = N_ISYS2401_DMA_CHANNEL_PROCS[dma_id]; + cur_rsrc = &isys_dma_rsrc[dma_id]; + + if (cur_rsrc->num_active < max_dma_channel) { + for (i = ISYS2401_DMA_CHANNEL_0; i < N_ISYS2401_DMA_CHANNEL; i++) { + if (bitop_getbit(cur_rsrc->active_table, i) == 0) { + bitop_setbit(cur_rsrc->active_table, i); + *channel = i; + cur_rsrc->num_active++; + retval = true; + break; + } + } + } + + return retval; +} + +void ia_css_isys_dma_channel_rmgr_release( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) +{ + isys2401_dma_channel max_dma_channel; + isys_dma_rsrc_t *cur_rsrc = NULL; + + assert(dma_id < N_ISYS2401_DMA_ID); + assert(channel != NULL); + + max_dma_channel = N_ISYS2401_DMA_CHANNEL_PROCS[dma_id]; + cur_rsrc = &isys_dma_rsrc[dma_id]; + + if ((*channel < max_dma_channel) && (cur_rsrc->num_active > 0)) { + if (bitop_getbit(cur_rsrc->active_table, *channel) == 1) { + bitop_clearbit(cur_rsrc->active_table, *channel); + cur_rsrc->num_active--; + } + } +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h new file mode 100644 index 0000000000000..b2c286537774f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h @@ -0,0 +1,41 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __ISYS_DMA_RMGR_H_INCLUDED__ +#define __ISYS_DMA_RMGR_H_INCLUDED__ + +typedef struct isys_dma_rsrc_s isys_dma_rsrc_t; +struct isys_dma_rsrc_s { + uint32_t active_table; + uint16_t num_active; +}; + +#endif /* __ISYS_DMA_RMGR_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c new file mode 100644 index 0000000000000..2ae5e59d5e31f --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c @@ -0,0 +1,139 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "input_system.h" + +#ifdef HAS_INPUT_SYSTEM_VERSION_2 +#include "ia_css_isys.h" +#include "platform_support.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +#include "isys_dma.h" /* isys2401_dma_set_max_burst_size() */ +#include "isys_irq.h" +#endif + +#if defined(USE_INPUT_SYSTEM_VERSION_2) +input_system_error_t ia_css_isys_init(void) +{ + backend_channel_cfg_t backend_ch0; + backend_channel_cfg_t backend_ch1; + target_cfg2400_t targetB; + target_cfg2400_t targetC; + uint32_t acq_mem_region_size = 24; + uint32_t acq_nof_mem_regions = 2; + input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR; + + memset(&backend_ch0, 0, sizeof(backend_channel_cfg_t)); + memset(&backend_ch1, 0, sizeof(backend_channel_cfg_t)); + memset(&targetB, 0, sizeof(targetB)); + memset(&targetC, 0, sizeof(targetC)); + + error = input_system_configuration_reset(); + if (error != INPUT_SYSTEM_ERR_NO_ERROR) + return error; + + error = input_system_csi_xmem_channel_cfg( + 0, /*ch_id */ + INPUT_SYSTEM_PORT_A, /*port */ + backend_ch0, /*backend_ch */ + 32, /*mem_region_size */ + 6, /*nof_mem_regions */ + acq_mem_region_size, /*acq_mem_region_size */ + acq_nof_mem_regions, /*acq_nof_mem_regions */ + targetB, /*target */ + 3); /*nof_xmem_buffers */ + if (error != INPUT_SYSTEM_ERR_NO_ERROR) + return error; + + error = input_system_csi_xmem_channel_cfg( + 1, /*ch_id */ + INPUT_SYSTEM_PORT_B, /*port */ + backend_ch0, /*backend_ch */ + 16, /*mem_region_size */ + 3, /*nof_mem_regions */ + acq_mem_region_size, /*acq_mem_region_size */ + acq_nof_mem_regions, /*acq_nof_mem_regions */ + targetB, /*target */ + 3); /*nof_xmem_buffers */ + if (error != INPUT_SYSTEM_ERR_NO_ERROR) + return error; + + error = input_system_csi_xmem_channel_cfg( + 2, /*ch_id */ + INPUT_SYSTEM_PORT_C, /*port */ + backend_ch1, /*backend_ch */ + 32, /*mem_region_size */ + 3, /*nof_mem_regions */ + acq_mem_region_size, /*acq_mem_region_size */ + acq_nof_mem_regions, /*acq_nof_mem_regions */ + targetC, /*target */ + 2); /*nof_xmem_buffers */ + if (error != INPUT_SYSTEM_ERR_NO_ERROR) + return error; + + error = input_system_configuration_commit(); + + return error; +} +#elif defined(USE_INPUT_SYSTEM_VERSION_2401) +input_system_error_t ia_css_isys_init(void) +{ + ia_css_isys_csi_rx_lut_rmgr_init(); + ia_css_isys_ibuf_rmgr_init(); + ia_css_isys_dma_channel_rmgr_init(); + ia_css_isys_stream2mmio_sid_rmgr_init(); + + isys2401_dma_set_max_burst_size(ISYS2401_DMA0_ID, + 1 /* Non Burst DMA transactions */); + + /* Enable 2401 input system IRQ status for driver to retrieve */ + isys_irqc_status_enable(ISYS_IRQ0_ID); + isys_irqc_status_enable(ISYS_IRQ1_ID); + isys_irqc_status_enable(ISYS_IRQ2_ID); + + return INPUT_SYSTEM_ERR_NO_ERROR; +} +#endif + +#if defined(USE_INPUT_SYSTEM_VERSION_2) +void ia_css_isys_uninit(void) +{ +} +#elif defined(USE_INPUT_SYSTEM_VERSION_2401) +void ia_css_isys_uninit(void) +{ + ia_css_isys_csi_rx_lut_rmgr_uninit(); + ia_css_isys_ibuf_rmgr_uninit(); + ia_css_isys_dma_channel_rmgr_uninit(); + ia_css_isys_stream2mmio_sid_rmgr_uninit(); +} +#endif + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c new file mode 100644 index 0000000000000..222b294c0ab00 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c @@ -0,0 +1,105 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "system_global.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + +#include "assert_support.h" +#include "platform_support.h" +#include "ia_css_isys.h" +#include "bitop_support.h" +#include "isys_stream2mmio_rmgr.h" + +static isys_stream2mmio_rsrc_t isys_stream2mmio_rsrc[N_STREAM2MMIO_ID]; + +void ia_css_isys_stream2mmio_sid_rmgr_init(void) +{ + memset(isys_stream2mmio_rsrc, 0, sizeof(isys_stream2mmio_rsrc)); +} + +void ia_css_isys_stream2mmio_sid_rmgr_uninit(void) +{ + memset(isys_stream2mmio_rsrc, 0, sizeof(isys_stream2mmio_rsrc)); +} + +bool ia_css_isys_stream2mmio_sid_rmgr_acquire( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) +{ + bool retval = false; + stream2mmio_sid_ID_t max_sid; + isys_stream2mmio_rsrc_t *cur_rsrc = NULL; + stream2mmio_sid_ID_t i; + + assert(stream2mmio < N_STREAM2MMIO_ID); + assert(sid != NULL); + + if ((stream2mmio < N_STREAM2MMIO_ID) && (sid != NULL)) { + max_sid = N_STREAM2MMIO_SID_PROCS[stream2mmio]; + cur_rsrc = &isys_stream2mmio_rsrc[stream2mmio]; + + if (cur_rsrc->num_active < max_sid) { + for (i = STREAM2MMIO_SID0_ID; i < max_sid; i++) { + if (bitop_getbit(cur_rsrc->active_table, i) == 0) { + bitop_setbit(cur_rsrc->active_table, i); + *sid = i; + cur_rsrc->num_active++; + retval = true; + break; + } + } + } + } + return retval; +} + +void ia_css_isys_stream2mmio_sid_rmgr_release( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) +{ + stream2mmio_sid_ID_t max_sid; + isys_stream2mmio_rsrc_t *cur_rsrc = NULL; + + assert(stream2mmio < N_STREAM2MMIO_ID); + assert(sid != NULL); + + if ((stream2mmio < N_STREAM2MMIO_ID) && (sid != NULL)) { + max_sid = N_STREAM2MMIO_SID_PROCS[stream2mmio]; + cur_rsrc = &isys_stream2mmio_rsrc[stream2mmio]; + if ((*sid < max_sid) && (cur_rsrc->num_active > 0)) { + if (bitop_getbit(cur_rsrc->active_table, *sid) == 1) { + bitop_clearbit(cur_rsrc->active_table, *sid); + cur_rsrc->num_active--; + } + } + } +} +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h new file mode 100644 index 0000000000000..4f63005b1071b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h @@ -0,0 +1,41 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __ISYS_STREAM2MMIO_RMGR_H_INCLUDED__ +#define __ISYS_STREAM2MMIO_RMGR_H_INCLUDED__ + +typedef struct isys_stream2mmio_rsrc_s isys_stream2mmio_rsrc_t; +struct isys_stream2mmio_rsrc_s { + uint32_t active_table; + uint16_t num_active; +}; + +#endif /* __ISYS_STREAM2MMIO_RMGR_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c new file mode 100644 index 0000000000000..425bd3cc3f343 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c @@ -0,0 +1,607 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#define __INLINE_INPUT_SYSTEM__ +#include "input_system.h" +#include "assert_support.h" +#include "ia_css_isys.h" +#include "ia_css_irq.h" +#include "sh_css_internal.h" + +#if !defined(USE_INPUT_SYSTEM_VERSION_2401) +void ia_css_isys_rx_enable_all_interrupts(enum mipi_port_id port) +{ + hrt_data bits = receiver_port_reg_load(RX0_ID, + port, + _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); + + bits |= (1U << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT) | +#if defined(HAS_RX_VERSION_2) + (1U << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT) | +#endif + (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT) | + /*(1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT) | */ + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT); + /*(1U << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT); */ + + receiver_port_reg_store(RX0_ID, + port, + _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, bits); + + /* + * The CSI is nested into the Iunit IRQ's + */ + ia_css_irq_enable(IA_CSS_IRQ_INFO_CSS_RECEIVER_ERROR, true); + + return; +} + +/* This function converts between the enum used on the CSS API and the + * internal DLI enum type. + * We do not use an array for this since we cannot use named array + * initializers in Windows. Without that there is no easy way to guarantee + * that the array values would be in the correct order. + * */ +enum mipi_port_id ia_css_isys_port_to_mipi_port(enum mipi_port_id api_port) +{ + /* In this module the validity of the inptu variable should + * have been checked already, so we do not check for erroneous + * values. */ + enum mipi_port_id port = MIPI_PORT0_ID; + + if (api_port == MIPI_PORT1_ID) + port = MIPI_PORT1_ID; + else if (api_port == MIPI_PORT2_ID) + port = MIPI_PORT2_ID; + + return port; +} + +unsigned int ia_css_isys_rx_get_interrupt_reg(enum mipi_port_id port) +{ + return receiver_port_reg_load(RX0_ID, + port, + _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); +} + +void ia_css_rx_get_irq_info(unsigned int *irq_infos) +{ + ia_css_rx_port_get_irq_info(MIPI_PORT1_ID, irq_infos); +} + +void ia_css_rx_port_get_irq_info(enum mipi_port_id api_port, + unsigned int *irq_infos) +{ + enum mipi_port_id port = ia_css_isys_port_to_mipi_port(api_port); + ia_css_isys_rx_get_irq_info(port, irq_infos); +} + +void ia_css_isys_rx_get_irq_info(enum mipi_port_id port, + unsigned int *irq_infos) +{ + unsigned int bits; + + assert(irq_infos != NULL); + bits = ia_css_isys_rx_get_interrupt_reg(port); + *irq_infos = ia_css_isys_rx_translate_irq_infos(bits); +} + +/* Translate register bits to CSS API enum mask */ +unsigned int ia_css_isys_rx_translate_irq_infos(unsigned int bits) +{ + unsigned int infos = 0; + + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_BUFFER_OVERRUN; +#if defined(HAS_RX_VERSION_2) + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_INIT_TIMEOUT; +#endif + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ENTER_SLEEP_MODE; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ECC_CORRECTED; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_SOT; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_SOT_SYNC; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_CONTROL; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_CRC; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_FRAME_SYNC; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_FRAME_DATA; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC; + if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT)) + infos |= IA_CSS_RX_IRQ_INFO_ERR_LINE_SYNC; + + return infos; +} + +void ia_css_rx_clear_irq_info(unsigned int irq_infos) +{ + ia_css_rx_port_clear_irq_info(MIPI_PORT1_ID, irq_infos); +} + +void ia_css_rx_port_clear_irq_info(enum mipi_port_id api_port, unsigned int irq_infos) +{ + enum mipi_port_id port = ia_css_isys_port_to_mipi_port(api_port); + ia_css_isys_rx_clear_irq_info(port, irq_infos); +} + +void ia_css_isys_rx_clear_irq_info(enum mipi_port_id port, unsigned int irq_infos) +{ + hrt_data bits = receiver_port_reg_load(RX0_ID, + port, + _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); + + /* MW: Why do we remap the receiver bitmap */ + if (irq_infos & IA_CSS_RX_IRQ_INFO_BUFFER_OVERRUN) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT; +#if defined(HAS_RX_VERSION_2) + if (irq_infos & IA_CSS_RX_IRQ_INFO_INIT_TIMEOUT) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT; +#endif + if (irq_infos & IA_CSS_RX_IRQ_INFO_ENTER_SLEEP_MODE) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ECC_CORRECTED) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_SOT) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_SOT_SYNC) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_CONTROL) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_CRC) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ID) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_FRAME_SYNC) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_FRAME_DATA) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_DATA_TIMEOUT) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_UNKNOWN_ESC) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT; + if (irq_infos & IA_CSS_RX_IRQ_INFO_ERR_LINE_SYNC) + bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT; + + receiver_port_reg_store(RX0_ID, + port, + _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, bits); + + return; +} +#endif /* #if !defined(USE_INPUT_SYSTEM_VERSION_2401) */ + +enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( + enum atomisp_input_format input_format, + mipi_predictor_t compression, + unsigned int *fmt_type) +{ + assert(fmt_type != NULL); + /* + * Custom (user defined) modes. Used for compressed + * MIPI transfers + * + * Checkpatch thinks the indent before "if" is suspect + * I think the only suspect part is the missing "else" + * because of the return. + */ + if (compression != MIPI_PREDICTOR_NONE) { + switch (input_format) { + case ATOMISP_INPUT_FORMAT_RAW_6: + *fmt_type = 6; + break; + case ATOMISP_INPUT_FORMAT_RAW_7: + *fmt_type = 7; + break; + case ATOMISP_INPUT_FORMAT_RAW_8: + *fmt_type = 8; + break; + case ATOMISP_INPUT_FORMAT_RAW_10: + *fmt_type = 10; + break; + case ATOMISP_INPUT_FORMAT_RAW_12: + *fmt_type = 12; + break; + case ATOMISP_INPUT_FORMAT_RAW_14: + *fmt_type = 14; + break; + case ATOMISP_INPUT_FORMAT_RAW_16: + *fmt_type = 16; + break; + default: + return IA_CSS_ERR_INTERNAL_ERROR; + } + return IA_CSS_SUCCESS; + } + /* + * This mapping comes from the Arasan CSS function spec + * (CSS_func_spec1.08_ahb_sep29_08.pdf). + * + * MW: For some reason the mapping is not 1-to-1 + */ + switch (input_format) { + case ATOMISP_INPUT_FORMAT_RGB_888: + *fmt_type = MIPI_FORMAT_RGB888; + break; + case ATOMISP_INPUT_FORMAT_RGB_555: + *fmt_type = MIPI_FORMAT_RGB555; + break; + case ATOMISP_INPUT_FORMAT_RGB_444: + *fmt_type = MIPI_FORMAT_RGB444; + break; + case ATOMISP_INPUT_FORMAT_RGB_565: + *fmt_type = MIPI_FORMAT_RGB565; + break; + case ATOMISP_INPUT_FORMAT_RGB_666: + *fmt_type = MIPI_FORMAT_RGB666; + break; + case ATOMISP_INPUT_FORMAT_RAW_8: + *fmt_type = MIPI_FORMAT_RAW8; + break; + case ATOMISP_INPUT_FORMAT_RAW_10: + *fmt_type = MIPI_FORMAT_RAW10; + break; + case ATOMISP_INPUT_FORMAT_RAW_6: + *fmt_type = MIPI_FORMAT_RAW6; + break; + case ATOMISP_INPUT_FORMAT_RAW_7: + *fmt_type = MIPI_FORMAT_RAW7; + break; + case ATOMISP_INPUT_FORMAT_RAW_12: + *fmt_type = MIPI_FORMAT_RAW12; + break; + case ATOMISP_INPUT_FORMAT_RAW_14: + *fmt_type = MIPI_FORMAT_RAW14; + break; + case ATOMISP_INPUT_FORMAT_YUV420_8: + *fmt_type = MIPI_FORMAT_YUV420_8; + break; + case ATOMISP_INPUT_FORMAT_YUV420_10: + *fmt_type = MIPI_FORMAT_YUV420_10; + break; + case ATOMISP_INPUT_FORMAT_YUV422_8: + *fmt_type = MIPI_FORMAT_YUV422_8; + break; + case ATOMISP_INPUT_FORMAT_YUV422_10: + *fmt_type = MIPI_FORMAT_YUV422_10; + break; + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + *fmt_type = MIPI_FORMAT_YUV420_8_LEGACY; + break; + case ATOMISP_INPUT_FORMAT_EMBEDDED: + *fmt_type = MIPI_FORMAT_EMBEDDED; + break; +#ifndef USE_INPUT_SYSTEM_VERSION_2401 + case ATOMISP_INPUT_FORMAT_RAW_16: + /* This is not specified by Arasan, so we use + * 17 for now. + */ + *fmt_type = MIPI_FORMAT_RAW16; + break; + case ATOMISP_INPUT_FORMAT_BINARY_8: + *fmt_type = MIPI_FORMAT_BINARY_8; + break; +#else + case ATOMISP_INPUT_FORMAT_USER_DEF1: + *fmt_type = MIPI_FORMAT_CUSTOM0; + break; + case ATOMISP_INPUT_FORMAT_USER_DEF2: + *fmt_type = MIPI_FORMAT_CUSTOM1; + break; + case ATOMISP_INPUT_FORMAT_USER_DEF3: + *fmt_type = MIPI_FORMAT_CUSTOM2; + break; + case ATOMISP_INPUT_FORMAT_USER_DEF4: + *fmt_type = MIPI_FORMAT_CUSTOM3; + break; + case ATOMISP_INPUT_FORMAT_USER_DEF5: + *fmt_type = MIPI_FORMAT_CUSTOM4; + break; + case ATOMISP_INPUT_FORMAT_USER_DEF6: + *fmt_type = MIPI_FORMAT_CUSTOM5; + break; + case ATOMISP_INPUT_FORMAT_USER_DEF7: + *fmt_type = MIPI_FORMAT_CUSTOM6; + break; + case ATOMISP_INPUT_FORMAT_USER_DEF8: + *fmt_type = MIPI_FORMAT_CUSTOM7; + break; +#endif + + case ATOMISP_INPUT_FORMAT_YUV420_16: + case ATOMISP_INPUT_FORMAT_YUV422_16: + default: + return IA_CSS_ERR_INTERNAL_ERROR; + } + return IA_CSS_SUCCESS; +} +#if defined(USE_INPUT_SYSTEM_VERSION_2401) +static mipi_predictor_t sh_css_csi2_compression_type_2_mipi_predictor(enum ia_css_csi2_compression_type type) +{ + mipi_predictor_t predictor = MIPI_PREDICTOR_NONE; + + switch (type) { + case IA_CSS_CSI2_COMPRESSION_TYPE_1: + predictor = MIPI_PREDICTOR_TYPE1-1; + break; + case IA_CSS_CSI2_COMPRESSION_TYPE_2: + predictor = MIPI_PREDICTOR_TYPE2-1; + default: + break; + } + return predictor; +} +enum ia_css_err ia_css_isys_convert_compressed_format( + struct ia_css_csi2_compression *comp, + struct input_system_cfg_s *cfg) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + assert(comp != NULL); + assert(cfg != NULL); + + if (comp->type != IA_CSS_CSI2_COMPRESSION_TYPE_NONE) { + /* compression register bit slicing + 4 bit for each user defined data type + 3 bit indicate compression scheme + 000 No compression + 001 10-6-10 + 010 10-7-10 + 011 10-8-10 + 100 12-6-12 + 101 12-6-12 + 100 12-7-12 + 110 12-8-12 + 1 bit indicate predictor + */ + if (comp->uncompressed_bits_per_pixel == UNCOMPRESSED_BITS_PER_PIXEL_10) { + switch (comp->compressed_bits_per_pixel) { + case COMPRESSED_BITS_PER_PIXEL_6: + cfg->csi_port_attr.comp_scheme = MIPI_COMPRESSOR_10_6_10; + break; + case COMPRESSED_BITS_PER_PIXEL_7: + cfg->csi_port_attr.comp_scheme = MIPI_COMPRESSOR_10_7_10; + break; + case COMPRESSED_BITS_PER_PIXEL_8: + cfg->csi_port_attr.comp_scheme = MIPI_COMPRESSOR_10_8_10; + break; + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + } else if (comp->uncompressed_bits_per_pixel == UNCOMPRESSED_BITS_PER_PIXEL_12) { + switch (comp->compressed_bits_per_pixel) { + case COMPRESSED_BITS_PER_PIXEL_6: + cfg->csi_port_attr.comp_scheme = MIPI_COMPRESSOR_12_6_12; + break; + case COMPRESSED_BITS_PER_PIXEL_7: + cfg->csi_port_attr.comp_scheme = MIPI_COMPRESSOR_12_7_12; + break; + case COMPRESSED_BITS_PER_PIXEL_8: + cfg->csi_port_attr.comp_scheme = MIPI_COMPRESSOR_12_8_12; + break; + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + } else + err = IA_CSS_ERR_INVALID_ARGUMENTS; + cfg->csi_port_attr.comp_predictor = sh_css_csi2_compression_type_2_mipi_predictor(comp->type); + cfg->csi_port_attr.comp_enable = true; + } else /* No compression */ + cfg->csi_port_attr.comp_enable = false; + return err; +} + +unsigned int ia_css_csi2_calculate_input_system_alignment( + enum atomisp_input_format fmt_type) +{ + unsigned int memory_alignment_in_bytes = HIVE_ISP_DDR_WORD_BYTES; + + switch (fmt_type) { + case ATOMISP_INPUT_FORMAT_RAW_6: + case ATOMISP_INPUT_FORMAT_RAW_7: + case ATOMISP_INPUT_FORMAT_RAW_8: + case ATOMISP_INPUT_FORMAT_RAW_10: + case ATOMISP_INPUT_FORMAT_RAW_12: + case ATOMISP_INPUT_FORMAT_RAW_14: + memory_alignment_in_bytes = 2 * ISP_VEC_NELEMS; + break; + case ATOMISP_INPUT_FORMAT_YUV420_8: + case ATOMISP_INPUT_FORMAT_YUV422_8: + case ATOMISP_INPUT_FORMAT_USER_DEF1: + case ATOMISP_INPUT_FORMAT_USER_DEF2: + case ATOMISP_INPUT_FORMAT_USER_DEF3: + case ATOMISP_INPUT_FORMAT_USER_DEF4: + case ATOMISP_INPUT_FORMAT_USER_DEF5: + case ATOMISP_INPUT_FORMAT_USER_DEF6: + case ATOMISP_INPUT_FORMAT_USER_DEF7: + case ATOMISP_INPUT_FORMAT_USER_DEF8: + /* Planar YUV formats need to have all planes aligned, this means + * double the alignment for the Y plane if the horizontal decimation is 2. */ + memory_alignment_in_bytes = 2 * HIVE_ISP_DDR_WORD_BYTES; + break; + case ATOMISP_INPUT_FORMAT_EMBEDDED: + default: + memory_alignment_in_bytes = HIVE_ISP_DDR_WORD_BYTES; + break; + } + return memory_alignment_in_bytes; +} + +#endif + +#if !defined(USE_INPUT_SYSTEM_VERSION_2401) +void ia_css_isys_rx_configure(const rx_cfg_t *config, + const enum ia_css_input_mode input_mode) +{ +#if defined(HAS_RX_VERSION_2) + bool port_enabled[N_MIPI_PORT_ID]; + bool any_port_enabled = false; + enum mipi_port_id port; + + if ((config == NULL) + || (config->mode >= N_RX_MODE) + || (config->port >= N_MIPI_PORT_ID)) { + assert(0); + return; + } + for (port = (enum mipi_port_id) 0; port < N_MIPI_PORT_ID; port++) { + if (is_receiver_port_enabled(RX0_ID, port)) + any_port_enabled = true; + } + /* AM: Check whether this is a problem with multiple + * streams. MS: This is the case. */ + + port = config->port; + receiver_port_enable(RX0_ID, port, false); + + port = config->port; + + /* AM: Check whether this is a problem with multiple streams. */ + if (MIPI_PORT_LANES[config->mode][port] != MIPI_0LANE_CFG) { + receiver_port_reg_store(RX0_ID, port, + _HRT_CSS_RECEIVER_FUNC_PROG_REG_IDX, + config->timeout); + receiver_port_reg_store(RX0_ID, port, + _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX, + config->initcount); + receiver_port_reg_store(RX0_ID, port, + _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX, + config->synccount); + receiver_port_reg_store(RX0_ID, port, + _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX, + config->rxcount); + + port_enabled[port] = true; + + if (input_mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + + /* MW: A bit of a hack, straight wiring of the capture + * units,assuming they are linearly enumerated. */ + input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX + + (unsigned int)port, + INPUT_SYSTEM_CSI_BACKEND); + /* MW: Like the integration test example we overwite, + * the GPREG_MUX register */ + input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + (input_system_multiplex_t) port); + } else { + /* + * AM: A bit of a hack, wiring the input system. + */ + input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX + + (unsigned int)port, + INPUT_SYSTEM_INPUT_BUFFER); + input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + INPUT_SYSTEM_ACQUISITION_UNIT); + } + } + /* + * The 2ppc is shared for all ports, so we cannot + * disable->configure->enable individual ports + */ + /* AM: Check whether this is a problem with multiple streams. */ + /* MS: 2ppc should be a property per binary and should be + * enabled/disabled per binary. + * Currently it is implemented as a system wide setting due + * to effort and risks. */ + if (!any_port_enabled) { + receiver_reg_store(RX0_ID, + _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX, + config->is_two_ppc); + receiver_reg_store(RX0_ID, _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX, + config->is_two_ppc); + } + receiver_port_enable(RX0_ID, port, true); + /* TODO: JB: need to add the beneath used define to mizuchi */ + /* sh_css_sw_hive_isp_css_2400_system_20121224_0125\css + * \hrt\input_system_defs.h + * #define INPUT_SYSTEM_CSI_RECEIVER_SELECT_BACKENG 0X207 + */ + /* TODO: need better name for define + * input_system_reg_store(INPUT_SYSTEM0_ID, + * INPUT_SYSTEM_CSI_RECEIVER_SELECT_BACKENG, 1); + */ + input_system_reg_store(INPUT_SYSTEM0_ID, 0x207, 1); +#else +#error "rx.c: RX version must be one of {RX_VERSION_2}" +#endif + + return; +} + +void ia_css_isys_rx_disable(void) +{ + enum mipi_port_id port; + for (port = (enum mipi_port_id) 0; port < N_MIPI_PORT_ID; port++) { + receiver_port_reg_store(RX0_ID, port, + _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, + false); + } + return; +} +#endif /* if !defined(USE_INPUT_SYSTEM_VERSION_2401) */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c new file mode 100644 index 0000000000000..2484949453b7c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c @@ -0,0 +1,898 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "system_global.h" + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + +#include "ia_css_isys.h" +#include "ia_css_debug.h" +#include "math_support.h" +#include "string_support.h" +#include "virtual_isys.h" +#include "isp.h" +#include "sh_css_defs.h" + +/************************************************* + * + * Forwarded Declaration + * + *************************************************/ +#ifndef ISP2401 + +#endif +static bool create_input_system_channel( + input_system_cfg_t *cfg, + bool metadata, + input_system_channel_t *channel); + +static void destroy_input_system_channel( + input_system_channel_t *channel); + +static bool create_input_system_input_port( + input_system_cfg_t *cfg, + input_system_input_port_t *input_port); + +static void destroy_input_system_input_port( + input_system_input_port_t *input_port); + +static bool calculate_input_system_channel_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_channel_cfg_t *channel_cfg, + bool metadata); + +static bool calculate_input_system_input_port_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_input_port_cfg_t *input_port_cfg); + +static bool acquire_sid( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); + +static void release_sid( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); + +static bool acquire_ib_buffer( + int32_t bits_per_pixel, + int32_t pixels_per_line, + int32_t lines_per_frame, + int32_t align_in_bytes, + bool online, + ib_buffer_t *buf); + +static void release_ib_buffer( + ib_buffer_t *buf); + +static bool acquire_dma_channel( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); + +static void release_dma_channel( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); + +static bool acquire_be_lut_entry( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); + +static void release_be_lut_entry( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); + +static bool calculate_tpg_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_tpg_cfg_t *cfg); + +static bool calculate_prbs_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_prbs_cfg_t *cfg); + +static bool calculate_fe_cfg( + const input_system_cfg_t *isys_cfg, + csi_rx_frontend_cfg_t *cfg); + +static bool calculate_be_cfg( + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + bool metadata, + csi_rx_backend_cfg_t *cfg); + +static bool calculate_stream2mmio_cfg( + const input_system_cfg_t *isys_cfg, + bool metadata, + stream2mmio_cfg_t *cfg); + +static bool calculate_ibuf_ctrl_cfg( + const input_system_channel_t *channel, + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + ibuf_ctrl_cfg_t *cfg); + +static bool calculate_isys2401_dma_cfg( + const input_system_channel_t *channel, + const input_system_cfg_t *isys_cfg, + isys2401_dma_cfg_t *cfg); + +static bool calculate_isys2401_dma_port_cfg( + const input_system_cfg_t *isys_cfg, + bool raw_packed, + bool metadata, + isys2401_dma_port_cfg_t *cfg); + +static csi_mipi_packet_type_t get_csi_mipi_packet_type( + int32_t data_type); + +static int32_t calculate_stride( + int32_t bits_per_pixel, + int32_t pixels_per_line, + bool raw_packed, + int32_t align_in_bytes); + +/* end of Forwarded Declaration */ + +/************************************************** + * + * Public Methods + * + **************************************************/ +ia_css_isys_error_t ia_css_isys_stream_create( + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_h isys_stream, + uint32_t isys_stream_id) +{ + ia_css_isys_error_t rc; + + if (isys_stream_descr == NULL || isys_stream == NULL || + isys_stream_id >= SH_CSS_MAX_ISYS_CHANNEL_NODES) + return false; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_isys_stream_create() enter:\n"); + + /*Reset isys_stream to 0*/ + memset(isys_stream, 0, sizeof(*isys_stream)); + isys_stream->enable_metadata = isys_stream_descr->metadata.enable; + isys_stream->id = isys_stream_id; + + isys_stream->linked_isys_stream_id = isys_stream_descr->linked_isys_stream_id; + rc = create_input_system_input_port(isys_stream_descr, &(isys_stream->input_port)); + if (rc == false) + return false; + + rc = create_input_system_channel(isys_stream_descr, false, &(isys_stream->channel)); + if (rc == false) { + destroy_input_system_input_port(&isys_stream->input_port); + return false; + } + +#ifdef ISP2401 + /* + * Early polling is required for timestamp accuracy in certain cause. + * The ISYS HW polling is started on + * ia_css_isys_stream_capture_indication() instead of + * ia_css_pipeline_sp_wait_for_isys_stream_N() as isp processing of + * capture takes longer than getting an ISYS frame + */ + isys_stream->polling_mode = isys_stream_descr->polling_mode; + +#endif + /* create metadata channel */ + if (isys_stream_descr->metadata.enable) { + rc = create_input_system_channel(isys_stream_descr, true, &isys_stream->md_channel); + if (rc == false) { + destroy_input_system_input_port(&isys_stream->input_port); + destroy_input_system_channel(&isys_stream->channel); + return false; + } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_isys_stream_create() leave:\n"); + + return true; +} + +void ia_css_isys_stream_destroy( + ia_css_isys_stream_h isys_stream) +{ + destroy_input_system_input_port(&isys_stream->input_port); + destroy_input_system_channel(&(isys_stream->channel)); + if (isys_stream->enable_metadata) { + /* Destroy metadata channel only if its allocated*/ + destroy_input_system_channel(&isys_stream->md_channel); + } +} + +ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( + ia_css_isys_stream_h isys_stream, + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_cfg_t *isys_stream_cfg) +{ + ia_css_isys_error_t rc; + + if (isys_stream_cfg == NULL || + isys_stream_descr == NULL || + isys_stream == NULL) + return false; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_isys_stream_calculate_cfg() enter:\n"); + + rc = calculate_input_system_channel_cfg( + &(isys_stream->channel), + &(isys_stream->input_port), + isys_stream_descr, + &(isys_stream_cfg->channel_cfg), + false); + if (rc == false) + return false; + + /* configure metadata channel */ + if (isys_stream_descr->metadata.enable) { + isys_stream_cfg->enable_metadata = true; + rc = calculate_input_system_channel_cfg( + &isys_stream->md_channel, + &isys_stream->input_port, + isys_stream_descr, + &isys_stream_cfg->md_channel_cfg, + true); + if (rc == false) + return false; + } + + rc = calculate_input_system_input_port_cfg( + &(isys_stream->channel), + &(isys_stream->input_port), + isys_stream_descr, + &(isys_stream_cfg->input_port_cfg)); + if (rc == false) + return false; + + isys_stream->valid = 1; + isys_stream_cfg->valid = 1; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_isys_stream_calculate_cfg() leave:\n"); + return rc; +} + +/* end of Public Methods */ + +/************************************************** + * + * Private Methods + * + **************************************************/ +static bool create_input_system_channel( + input_system_cfg_t *cfg, + bool metadata, + input_system_channel_t *me) +{ + bool rc = true; + + me->dma_id = ISYS2401_DMA0_ID; + + switch (cfg->input_port_id) { + case INPUT_SYSTEM_CSI_PORT0_ID: + case INPUT_SYSTEM_PIXELGEN_PORT0_ID: + me->stream2mmio_id = STREAM2MMIO0_ID; + me->ibuf_ctrl_id = IBUF_CTRL0_ID; + break; + + case INPUT_SYSTEM_CSI_PORT1_ID: + case INPUT_SYSTEM_PIXELGEN_PORT1_ID: + me->stream2mmio_id = STREAM2MMIO1_ID; + me->ibuf_ctrl_id = IBUF_CTRL1_ID; + break; + + case INPUT_SYSTEM_CSI_PORT2_ID: + case INPUT_SYSTEM_PIXELGEN_PORT2_ID: + me->stream2mmio_id = STREAM2MMIO2_ID; + me->ibuf_ctrl_id = IBUF_CTRL2_ID; + break; + default: + rc = false; + break; + } + + if (!rc) + return false; + + if (!acquire_sid(me->stream2mmio_id, &(me->stream2mmio_sid_id))) { + return false; + } + + if (!acquire_ib_buffer( + metadata ? cfg->metadata.bits_per_pixel : cfg->input_port_resolution.bits_per_pixel, + metadata ? cfg->metadata.pixels_per_line : cfg->input_port_resolution.pixels_per_line, + metadata ? cfg->metadata.lines_per_frame : cfg->input_port_resolution.lines_per_frame, + metadata ? cfg->metadata.align_req_in_bytes : cfg->input_port_resolution.align_req_in_bytes, + cfg->online, + &(me->ib_buffer))) { + release_sid(me->stream2mmio_id, &(me->stream2mmio_sid_id)); + return false; + } + + if (!acquire_dma_channel(me->dma_id, &(me->dma_channel))) { + release_sid(me->stream2mmio_id, &(me->stream2mmio_sid_id)); + release_ib_buffer(&(me->ib_buffer)); + return false; + } + + return true; +} + +static void destroy_input_system_channel( + input_system_channel_t *me) +{ + release_sid(me->stream2mmio_id, + &(me->stream2mmio_sid_id)); + + release_ib_buffer(&(me->ib_buffer)); + + release_dma_channel(me->dma_id, &(me->dma_channel)); +} + +static bool create_input_system_input_port( + input_system_cfg_t *cfg, + input_system_input_port_t *me) +{ + csi_mipi_packet_type_t packet_type; + bool rc = true; + + switch (cfg->input_port_id) { + case INPUT_SYSTEM_CSI_PORT0_ID: + me->csi_rx.frontend_id = CSI_RX_FRONTEND0_ID; + me->csi_rx.backend_id = CSI_RX_BACKEND0_ID; + + packet_type = get_csi_mipi_packet_type(cfg->csi_port_attr.fmt_type); + me->csi_rx.packet_type = packet_type; + + rc = acquire_be_lut_entry( + me->csi_rx.backend_id, + packet_type, + &(me->csi_rx.backend_lut_entry)); + break; + case INPUT_SYSTEM_PIXELGEN_PORT0_ID: + me->pixelgen.pixelgen_id = PIXELGEN0_ID; + break; + case INPUT_SYSTEM_CSI_PORT1_ID: + me->csi_rx.frontend_id = CSI_RX_FRONTEND1_ID; + me->csi_rx.backend_id = CSI_RX_BACKEND1_ID; + + packet_type = get_csi_mipi_packet_type(cfg->csi_port_attr.fmt_type); + me->csi_rx.packet_type = packet_type; + + rc = acquire_be_lut_entry( + me->csi_rx.backend_id, + packet_type, + &(me->csi_rx.backend_lut_entry)); + break; + case INPUT_SYSTEM_PIXELGEN_PORT1_ID: + me->pixelgen.pixelgen_id = PIXELGEN1_ID; + + break; + case INPUT_SYSTEM_CSI_PORT2_ID: + me->csi_rx.frontend_id = CSI_RX_FRONTEND2_ID; + me->csi_rx.backend_id = CSI_RX_BACKEND2_ID; + + packet_type = get_csi_mipi_packet_type(cfg->csi_port_attr.fmt_type); + me->csi_rx.packet_type = packet_type; + + rc = acquire_be_lut_entry( + me->csi_rx.backend_id, + packet_type, + &(me->csi_rx.backend_lut_entry)); + break; + case INPUT_SYSTEM_PIXELGEN_PORT2_ID: + me->pixelgen.pixelgen_id = PIXELGEN2_ID; + break; + default: + rc = false; + break; + } + + me->source_type = cfg->mode; + + /* for metadata */ + me->metadata.packet_type = CSI_MIPI_PACKET_TYPE_UNDEFINED; + if (rc && cfg->metadata.enable) { + me->metadata.packet_type = get_csi_mipi_packet_type( + cfg->metadata.fmt_type); + rc = acquire_be_lut_entry( + me->csi_rx.backend_id, + me->metadata.packet_type, + &me->metadata.backend_lut_entry); + } + + return rc; +} + +static void destroy_input_system_input_port( + input_system_input_port_t *me) +{ + if (me->source_type == INPUT_SYSTEM_SOURCE_TYPE_SENSOR) { + release_be_lut_entry( + me->csi_rx.backend_id, + me->csi_rx.packet_type, + &me->csi_rx.backend_lut_entry); + } + + if (me->metadata.packet_type != CSI_MIPI_PACKET_TYPE_UNDEFINED) { + /*Free the backend lut allocated for metadata*/ + release_be_lut_entry( + me->csi_rx.backend_id, + me->metadata.packet_type, + &me->metadata.backend_lut_entry); + } +} + +static bool calculate_input_system_channel_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_channel_cfg_t *channel_cfg, + bool metadata) +{ + bool rc; + + rc = calculate_stream2mmio_cfg(isys_cfg, metadata, + &(channel_cfg->stream2mmio_cfg)); + if (!rc) + return false; + + rc = calculate_ibuf_ctrl_cfg( + channel, + input_port, + isys_cfg, + &(channel_cfg->ibuf_ctrl_cfg)); + if (!rc) + return false; + if (metadata) + channel_cfg->ibuf_ctrl_cfg.stores_per_frame = isys_cfg->metadata.lines_per_frame; + + rc = calculate_isys2401_dma_cfg( + channel, + isys_cfg, + &(channel_cfg->dma_cfg)); + if (!rc) + return false; + + rc = calculate_isys2401_dma_port_cfg( + isys_cfg, + false, + metadata, + &(channel_cfg->dma_src_port_cfg)); + if (!rc) + return false; + + rc = calculate_isys2401_dma_port_cfg( + isys_cfg, + isys_cfg->raw_packed, + metadata, + &(channel_cfg->dma_dest_port_cfg)); + if (!rc) + return false; + + return true; +} + +static bool calculate_input_system_input_port_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_input_port_cfg_t *input_port_cfg) +{ + bool rc; + + switch (input_port->source_type) { + case INPUT_SYSTEM_SOURCE_TYPE_SENSOR: + rc = calculate_fe_cfg( + isys_cfg, + &(input_port_cfg->csi_rx_cfg.frontend_cfg)); + + rc &= calculate_be_cfg( + input_port, + isys_cfg, + false, + &(input_port_cfg->csi_rx_cfg.backend_cfg)); + + if (rc && isys_cfg->metadata.enable) + rc &= calculate_be_cfg(input_port, isys_cfg, true, + &input_port_cfg->csi_rx_cfg.md_backend_cfg); + break; + case INPUT_SYSTEM_SOURCE_TYPE_TPG: + rc = calculate_tpg_cfg( + channel, + input_port, + isys_cfg, + &(input_port_cfg->pixelgen_cfg.tpg_cfg)); + break; + case INPUT_SYSTEM_SOURCE_TYPE_PRBS: + rc = calculate_prbs_cfg( + channel, + input_port, + isys_cfg, + &(input_port_cfg->pixelgen_cfg.prbs_cfg)); + break; + default: + rc = false; + break; + } + + return rc; +} + +static bool acquire_sid( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) +{ + return ia_css_isys_stream2mmio_sid_rmgr_acquire(stream2mmio, sid); +} + +static void release_sid( + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) +{ + ia_css_isys_stream2mmio_sid_rmgr_release(stream2mmio, sid); +} + +/* See also: ia_css_dma_configure_from_info() */ +static int32_t calculate_stride( + int32_t bits_per_pixel, + int32_t pixels_per_line, + bool raw_packed, + int32_t align_in_bytes) +{ + int32_t bytes_per_line; + int32_t pixels_per_word; + int32_t words_per_line; + int32_t pixels_per_line_padded; + + pixels_per_line_padded = CEIL_MUL(pixels_per_line, align_in_bytes); + + if (!raw_packed) + bits_per_pixel = CEIL_MUL(bits_per_pixel, 8); + + pixels_per_word = HIVE_ISP_DDR_WORD_BITS / bits_per_pixel; + words_per_line = ceil_div(pixels_per_line_padded, pixels_per_word); + bytes_per_line = HIVE_ISP_DDR_WORD_BYTES * words_per_line; + + return bytes_per_line; +} + +static bool acquire_ib_buffer( + int32_t bits_per_pixel, + int32_t pixels_per_line, + int32_t lines_per_frame, + int32_t align_in_bytes, + bool online, + ib_buffer_t *buf) +{ + buf->stride = calculate_stride(bits_per_pixel, pixels_per_line, false, align_in_bytes); + if (online) + buf->lines = 4; /* use double buffering for online usecases */ + else + buf->lines = 2; + + (void)(lines_per_frame); + return ia_css_isys_ibuf_rmgr_acquire(buf->stride * buf->lines, &buf->start_addr); +} + +static void release_ib_buffer( + ib_buffer_t *buf) +{ + ia_css_isys_ibuf_rmgr_release(&buf->start_addr); +} + +static bool acquire_dma_channel( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) +{ + return ia_css_isys_dma_channel_rmgr_acquire(dma_id, channel); +} + +static void release_dma_channel( + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) +{ + ia_css_isys_dma_channel_rmgr_release(dma_id, channel); +} + +static bool acquire_be_lut_entry( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) +{ + return ia_css_isys_csi_rx_lut_rmgr_acquire(backend, packet_type, entry); +} + +static void release_be_lut_entry( + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) +{ + ia_css_isys_csi_rx_lut_rmgr_release(backend, packet_type, entry); +} + +static bool calculate_tpg_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_tpg_cfg_t *cfg) +{ + (void)channel; + (void)input_port; + + memcpy_s( + (void *)cfg, + sizeof(pixelgen_tpg_cfg_t), + (void *)(&(isys_cfg->tpg_port_attr)), + sizeof(pixelgen_tpg_cfg_t)); + return true; +} + +static bool calculate_prbs_cfg( + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_prbs_cfg_t *cfg) +{ + (void)channel; + (void)input_port; + + memcpy_s( + (void *)cfg, + sizeof(pixelgen_prbs_cfg_t), + (void *)(&(isys_cfg->prbs_port_attr)), + sizeof(pixelgen_prbs_cfg_t)); + return true; +} + +static bool calculate_fe_cfg( + const input_system_cfg_t *isys_cfg, + csi_rx_frontend_cfg_t *cfg) +{ + cfg->active_lanes = isys_cfg->csi_port_attr.active_lanes; + return true; +} + +static bool calculate_be_cfg( + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + bool metadata, + csi_rx_backend_cfg_t *cfg) +{ + + memcpy_s( + (void *)(&cfg->lut_entry), + sizeof(csi_rx_backend_lut_entry_t), + metadata ? (void *)(&input_port->metadata.backend_lut_entry) : + (void *)(&input_port->csi_rx.backend_lut_entry), + sizeof(csi_rx_backend_lut_entry_t)); + + cfg->csi_mipi_cfg.virtual_channel = isys_cfg->csi_port_attr.ch_id; + if (metadata) { + cfg->csi_mipi_packet_type = get_csi_mipi_packet_type(isys_cfg->metadata.fmt_type); + cfg->csi_mipi_cfg.comp_enable = false; + cfg->csi_mipi_cfg.data_type = isys_cfg->metadata.fmt_type; + } + else { + cfg->csi_mipi_packet_type = get_csi_mipi_packet_type(isys_cfg->csi_port_attr.fmt_type); + cfg->csi_mipi_cfg.data_type = isys_cfg->csi_port_attr.fmt_type; + cfg->csi_mipi_cfg.comp_enable = isys_cfg->csi_port_attr.comp_enable; + cfg->csi_mipi_cfg.comp_scheme = isys_cfg->csi_port_attr.comp_scheme; + cfg->csi_mipi_cfg.comp_predictor = isys_cfg->csi_port_attr.comp_predictor; + cfg->csi_mipi_cfg.comp_bit_idx = cfg->csi_mipi_cfg.data_type - MIPI_FORMAT_CUSTOM0; + } + + return true; +} + +static bool calculate_stream2mmio_cfg( + const input_system_cfg_t *isys_cfg, + bool metadata, + stream2mmio_cfg_t *cfg +) +{ + cfg->bits_per_pixel = metadata ? isys_cfg->metadata.bits_per_pixel : + isys_cfg->input_port_resolution.bits_per_pixel; + + cfg->enable_blocking = + ((isys_cfg->mode == INPUT_SYSTEM_SOURCE_TYPE_TPG) || + (isys_cfg->mode == INPUT_SYSTEM_SOURCE_TYPE_PRBS)); + + return true; +} + +static bool calculate_ibuf_ctrl_cfg( + const input_system_channel_t *channel, + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + ibuf_ctrl_cfg_t *cfg) +{ + const int32_t bits_per_byte = 8; + int32_t bits_per_pixel; + int32_t bytes_per_pixel; + int32_t left_padding; + + (void)input_port; + + bits_per_pixel = isys_cfg->input_port_resolution.bits_per_pixel; + bytes_per_pixel = ceil_div(bits_per_pixel, bits_per_byte); + + left_padding = CEIL_MUL(isys_cfg->output_port_attr.left_padding, ISP_VEC_NELEMS) + * bytes_per_pixel; + + cfg->online = isys_cfg->online; + + cfg->dma_cfg.channel = channel->dma_channel; + cfg->dma_cfg.cmd = _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND; + + cfg->dma_cfg.shift_returned_items = 0; + cfg->dma_cfg.elems_per_word_in_ibuf = 0; + cfg->dma_cfg.elems_per_word_in_dest = 0; + + cfg->ib_buffer.start_addr = channel->ib_buffer.start_addr; + cfg->ib_buffer.stride = channel->ib_buffer.stride; + cfg->ib_buffer.lines = channel->ib_buffer.lines; + + /* +#ifndef ISP2401 + * zhengjie.lu@intel.com: +#endif + * "dest_buf_cfg" should be part of the input system output + * port configuration. + * + * TODO: move "dest_buf_cfg" to the input system output + * port configuration. + */ + + /* input_buf addr only available in sched mode; + this buffer is allocated in isp, crun mode addr + can be passed by after ISP allocation */ + if (cfg->online) { + cfg->dest_buf_cfg.start_addr = ISP_INPUT_BUF_START_ADDR + left_padding; + cfg->dest_buf_cfg.stride = bytes_per_pixel + * isys_cfg->output_port_attr.max_isp_input_width; + cfg->dest_buf_cfg.lines = LINES_OF_ISP_INPUT_BUF; + } else if (isys_cfg->raw_packed) { + cfg->dest_buf_cfg.stride = calculate_stride(bits_per_pixel, + isys_cfg->input_port_resolution.pixels_per_line, + isys_cfg->raw_packed, + isys_cfg->input_port_resolution.align_req_in_bytes); + } else { + cfg->dest_buf_cfg.stride = channel->ib_buffer.stride; + } + + /* +#ifndef ISP2401 + * zhengjie.lu@intel.com: +#endif + * "items_per_store" is hard coded as "1", which is ONLY valid + * when the CSI-MIPI long packet is transferred. + * + * TODO: After the 1st stage of MERR+, make the proper solution to + * configure "items_per_store" so that it can also handle the CSI-MIPI + * short packet. + */ + cfg->items_per_store = 1; + + cfg->stores_per_frame = isys_cfg->input_port_resolution.lines_per_frame; + + + cfg->stream2mmio_cfg.sync_cmd = _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME; + + /* TODO: Define conditions as when to use store words vs store packets */ + cfg->stream2mmio_cfg.store_cmd = _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS; + + return true; +} + +static bool calculate_isys2401_dma_cfg( + const input_system_channel_t *channel, + const input_system_cfg_t *isys_cfg, + isys2401_dma_cfg_t *cfg) +{ + cfg->channel = channel->dma_channel; + + /* only online/sensor mode goto vmem + offline/buffered_sensor, tpg and prbs will go to ddr */ + if (isys_cfg->online) + cfg->connection = isys2401_dma_ibuf_to_vmem_connection; + else + cfg->connection = isys2401_dma_ibuf_to_ddr_connection; + + cfg->extension = isys2401_dma_zero_extension; + cfg->height = 1; + + return true; +} + +/* See also: ia_css_dma_configure_from_info() */ +static bool calculate_isys2401_dma_port_cfg( + const input_system_cfg_t *isys_cfg, + bool raw_packed, + bool metadata, + isys2401_dma_port_cfg_t *cfg) +{ + int32_t bits_per_pixel; + int32_t pixels_per_line; + int32_t align_req_in_bytes; + + /* TODO: Move metadata away from isys_cfg to application layer */ + if (metadata) { + bits_per_pixel = isys_cfg->metadata.bits_per_pixel; + pixels_per_line = isys_cfg->metadata.pixels_per_line; + align_req_in_bytes = isys_cfg->metadata.align_req_in_bytes; + } else { + bits_per_pixel = isys_cfg->input_port_resolution.bits_per_pixel; + pixels_per_line = isys_cfg->input_port_resolution.pixels_per_line; + align_req_in_bytes = isys_cfg->input_port_resolution.align_req_in_bytes; + } + + cfg->stride = calculate_stride(bits_per_pixel, pixels_per_line, raw_packed, align_req_in_bytes); + + if (!raw_packed) + bits_per_pixel = CEIL_MUL(bits_per_pixel, 8); + + cfg->elements = HIVE_ISP_DDR_WORD_BITS / bits_per_pixel; + cfg->cropping = 0; + cfg->width = CEIL_DIV(cfg->stride, HIVE_ISP_DDR_WORD_BYTES); + + return true; +} + +static csi_mipi_packet_type_t get_csi_mipi_packet_type( + int32_t data_type) +{ + csi_mipi_packet_type_t packet_type; + + packet_type = CSI_MIPI_PACKET_TYPE_RESERVED; + + if (data_type >= 0 && data_type <= MIPI_FORMAT_SHORT8) + packet_type = CSI_MIPI_PACKET_TYPE_SHORT; + + if (data_type > MIPI_FORMAT_SHORT8 && data_type <= N_MIPI_FORMAT) + packet_type = CSI_MIPI_PACKET_TYPE_LONG; + + return packet_type; +} +/* end of Private Methods */ +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h new file mode 100644 index 0000000000000..66c7293c0a93e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h @@ -0,0 +1,41 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __VIRTUAL_ISYS_H_INCLUDED__ +#define __VIRTUAL_ISYS_H_INCLUDED__ + +/* cmd for storing a number of packets indicated by reg _STREAM2MMIO_NUM_ITEMS*/ +#define _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS 1 + +/* command for waiting for a frame start */ +#define _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME 2 + +#endif /* __VIRTUAL_ISYS_H_INCLUDED__ */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h new file mode 100644 index 0000000000000..85ed7db0af556 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h @@ -0,0 +1,302 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_PIPELINE_H__ +#define __IA_CSS_PIPELINE_H__ + +#include "sh_css_internal.h" +#include "ia_css_pipe_public.h" +#include "ia_css_pipeline_common.h" + +#define IA_CSS_PIPELINE_NUM_MAX (20) + + +/* Pipeline stage to be executed on SP/ISP */ +struct ia_css_pipeline_stage { + unsigned int stage_num; + struct ia_css_binary *binary; /* built-in binary */ + struct ia_css_binary_info *binary_info; + const struct ia_css_fw_info *firmware; /* acceleration binary */ + /* SP function for SP stage */ + enum ia_css_pipeline_stage_sp_func sp_func; + unsigned max_input_width; /* For SP raw copy */ + struct sh_css_binary_args args; + int mode; + bool out_frame_allocated[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + bool vf_frame_allocated; + struct ia_css_pipeline_stage *next; + bool enable_zoom; +}; + +/* Pipeline of n stages to be executed on SP/ISP per stage */ +struct ia_css_pipeline { + enum ia_css_pipe_id pipe_id; + uint8_t pipe_num; + bool stop_requested; + struct ia_css_pipeline_stage *stages; + struct ia_css_pipeline_stage *current_stage; + unsigned num_stages; + struct ia_css_frame in_frame; + struct ia_css_frame out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + unsigned int dvs_frame_delay; + unsigned inout_port_config; + int num_execs; + bool acquire_isp_each_stage; + uint32_t pipe_qos_config; +}; + +#define DEFAULT_PIPELINE \ +(struct ia_css_pipeline) { \ + .pipe_id = IA_CSS_PIPE_ID_PREVIEW, \ + .in_frame = DEFAULT_FRAME, \ + .out_frame = {DEFAULT_FRAME}, \ + .vf_frame = {DEFAULT_FRAME}, \ + .dvs_frame_delay = IA_CSS_FRAME_DELAY_1, \ + .num_execs = -1, \ + .acquire_isp_each_stage = true, \ + .pipe_qos_config = QOS_INVALID \ +} + +/* Stage descriptor used to create a new stage in the pipeline */ +struct ia_css_pipeline_stage_desc { + struct ia_css_binary *binary; + const struct ia_css_fw_info *firmware; + enum ia_css_pipeline_stage_sp_func sp_func; + unsigned max_input_width; + unsigned int mode; + struct ia_css_frame *in_frame; + struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame; +}; + +/* @brief initialize the pipeline module + * + * @return None + * + * Initializes the pipeline module. This API has to be called + * before any operation on the pipeline module is done + */ +void ia_css_pipeline_init(void); + +/* @brief initialize the pipeline structure with default values + * + * @param[out] pipeline structure to be initialized with defaults + * @param[in] pipe_id + * @param[in] pipe_num Number that uniquely identifies a pipeline. + * @return IA_CSS_SUCCESS or error code upon error. + * + * Initializes the pipeline structure with a set of default values. + * This API is expected to be used when a pipeline structure is allocated + * externally and needs sane defaults + */ +enum ia_css_err ia_css_pipeline_create( + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay); + +/* @brief destroy a pipeline + * + * @param[in] pipeline + * @return None + * + */ +void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline); + + +/* @brief Starts a pipeline + * + * @param[in] pipe_id + * @param[in] pipeline + * @return None + * + */ +void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, + struct ia_css_pipeline *pipeline); + +/* @brief Request to stop a pipeline + * + * @param[in] pipeline + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err ia_css_pipeline_request_stop(struct ia_css_pipeline *pipeline); + +/* @brief Check whether pipeline has stopped + * + * @param[in] pipeline + * @return true if the pipeline has stopped + * + */ +bool ia_css_pipeline_has_stopped(struct ia_css_pipeline *pipe); + +/* @brief clean all the stages pipeline and make it as new + * + * @param[in] pipeline + * @return None + * + */ +void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline); + +/* @brief Add a stage to pipeline. + * + * @param pipeline Pointer to the pipeline to be added to. + * @param[in] stage_desc The description of the stage + * @param[out] stage The successor of the stage. + * @return IA_CSS_SUCCESS or error code upon error. + * + * Add a new stage to a non-NULL pipeline. + * The stage consists of an ISP binary or firmware and input and output + * arguments. +*/ +enum ia_css_err ia_css_pipeline_create_and_add_stage( + struct ia_css_pipeline *pipeline, + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **stage); + +/* @brief Finalize the stages in a pipeline + * + * @param pipeline Pointer to the pipeline to be added to. + * @return None + * + * This API is expected to be called after adding all stages +*/ +void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, + bool continuous); + +/* @brief gets a stage from the pipeline + * + * @param[in] pipeline + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, + int mode, + struct ia_css_pipeline_stage **stage); + +/* @brief Gets a pipeline stage corresponding Firmware handle from the pipeline + * + * @param[in] pipeline + * @param[in] fw_handle + * @param[out] stage Pointer to Stage + * + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeline, + uint32_t fw_handle, + struct ia_css_pipeline_stage **stage); + +/* @brief Gets the Firmware handle correponding the stage num from the pipeline + * + * @param[in] pipeline + * @param[in] stage_num + * @param[out] fw_handle + * + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeline, + uint32_t stage_num, + uint32_t *fw_handle); + +/* @brief gets the output stage from the pipeline + * + * @param[in] pipeline + * @return IA_CSS_SUCCESS or error code upon error. + * + */ +enum ia_css_err ia_css_pipeline_get_output_stage( + struct ia_css_pipeline *pipeline, + int mode, + struct ia_css_pipeline_stage **stage); + +/* @brief Checks whether the pipeline uses params + * + * @param[in] pipeline + * @return true if the pipeline uses params + * + */ +bool ia_css_pipeline_uses_params(struct ia_css_pipeline *pipeline); + +/** + * @brief get the SP thread ID. + * + * @param[in] key The query key, typical use is pipe_num. + * @param[out] val The query value. + * + * @return + * true, if the query succeeds; + * false, if the query fails. + */ +bool ia_css_pipeline_get_sp_thread_id(unsigned int key, unsigned int *val); + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) +/** + * @brief Get the pipeline io status + * + * @param[in] None + * @return + * Pointer to pipe_io_status + */ +struct sh_css_sp_pipeline_io_status *ia_css_pipeline_get_pipe_io_status(void); +#endif + +/** + * @brief Map an SP thread to this pipeline + * + * @param[in] pipe_num + * @param[in] map true for mapping and false for unmapping sp threads. + * + */ +void ia_css_pipeline_map(unsigned int pipe_num, bool map); + +/** + * @brief Checks whether the pipeline is mapped to SP threads + * + * @param[in] Query key, typical use is pipe_num + * + * return + * true, pipeline is mapped to SP threads + * false, pipeline is not mapped to SP threads + */ +bool ia_css_pipeline_is_mapped(unsigned int key); + +/** + * @brief Print pipeline thread mapping + * + * @param[in] none + * + * return none + */ +void ia_css_pipeline_dump_thread_map_info(void); + +#endif /*__IA_CSS_PIPELINE_H__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h new file mode 100644 index 0000000000000..a7e6edf41cdbd --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h @@ -0,0 +1,42 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_PIPELINE_COMMON_H__ +#define __IA_CSS_PIPELINE_COMMON_H__ + +enum ia_css_pipeline_stage_sp_func { + IA_CSS_PIPELINE_RAW_COPY = 0, + IA_CSS_PIPELINE_BIN_COPY = 1, + IA_CSS_PIPELINE_ISYS_COPY = 2, + IA_CSS_PIPELINE_NO_FUNC = 3, +}; +#define IA_CSS_PIPELINE_NUM_STAGE_FUNCS 3 + +#endif /*__IA_CSS_PIPELINE_COMMON_H__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c new file mode 100644 index 0000000000000..4746620ca2129 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c @@ -0,0 +1,805 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "ia_css_debug.h" +#include "sw_event_global.h" /* encode_sw_event */ +#include "sp.h" /* cnd_sp_irq_enable() */ +#include "assert_support.h" +#include "memory_access.h" +#include "sh_css_sp.h" +#include "ia_css_pipeline.h" +#include "ia_css_isp_param.h" +#include "ia_css_bufq.h" + +#define PIPELINE_NUM_UNMAPPED (~0U) +#define PIPELINE_SP_THREAD_EMPTY_TOKEN (0x0) +#define PIPELINE_SP_THREAD_RESERVED_TOKEN (0x1) + + +/******************************************************* +*** Static variables +********************************************************/ +static unsigned int pipeline_num_to_sp_thread_map[IA_CSS_PIPELINE_NUM_MAX]; +static unsigned int pipeline_sp_thread_list[SH_CSS_MAX_SP_THREADS]; + +/******************************************************* +*** Static functions +********************************************************/ +static void pipeline_init_sp_thread_map(void); +static void pipeline_map_num_to_sp_thread(unsigned int pipe_num); +static void pipeline_unmap_num_to_sp_thread(unsigned int pipe_num); +static void pipeline_init_defaults( + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay); + +static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage); +static enum ia_css_err pipeline_stage_create( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **new_stage); +static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline); +static void ia_css_pipeline_configure_inout_port(struct ia_css_pipeline *me, + bool continuous); + +/******************************************************* +*** Public functions +********************************************************/ +void ia_css_pipeline_init(void) +{ + pipeline_init_sp_thread_map(); +} + +enum ia_css_err ia_css_pipeline_create( + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay) +{ + assert(pipeline != NULL); + IA_CSS_ENTER_PRIVATE("pipeline = %p, pipe_id = %d, pipe_num = %d, dvs_frame_delay = %d", + pipeline, pipe_id, pipe_num, dvs_frame_delay); + if (pipeline == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipeline_init_defaults(pipeline, pipe_id, pipe_num, dvs_frame_delay); + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +void ia_css_pipeline_map(unsigned int pipe_num, bool map) +{ + assert(pipe_num < IA_CSS_PIPELINE_NUM_MAX); + IA_CSS_ENTER_PRIVATE("pipe_num = %d, map = %d", pipe_num, map); + + if (pipe_num >= IA_CSS_PIPELINE_NUM_MAX) { + IA_CSS_ERROR("Invalid pipe number"); + IA_CSS_LEAVE_PRIVATE("void"); + return; + } + if (map) + pipeline_map_num_to_sp_thread(pipe_num); + else + pipeline_unmap_num_to_sp_thread(pipe_num); + IA_CSS_LEAVE_PRIVATE("void"); +} + +/* @brief destroy a pipeline + * + * @param[in] pipeline + * @return None + * + */ +void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline) +{ + assert(pipeline != NULL); + IA_CSS_ENTER_PRIVATE("pipeline = %p", pipeline); + + if (pipeline == NULL) { + IA_CSS_ERROR("NULL input parameter"); + IA_CSS_LEAVE_PRIVATE("void"); + return; + } + + IA_CSS_LOG("pipe_num = %d", pipeline->pipe_num); + + /* Free the pipeline number */ + ia_css_pipeline_clean(pipeline); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +/* Run a pipeline and wait till it completes. */ +void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, + struct ia_css_pipeline *pipeline) +{ + uint8_t pipe_num = 0; + unsigned int thread_id; + + assert(pipeline != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_start() enter: pipe_id=%d, pipeline=%p\n", + pipe_id, pipeline); + pipeline->pipe_id = pipe_id; + sh_css_sp_init_pipeline(pipeline, pipe_id, pipe_num, + false, false, false, true, SH_CSS_BDS_FACTOR_1_00, + SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD, +#ifndef ISP2401 + IA_CSS_INPUT_MODE_MEMORY, NULL, NULL +#else + IA_CSS_INPUT_MODE_MEMORY, NULL, NULL, +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#ifndef ISP2401 + , (enum mipi_port_id) 0 +#else + (enum mipi_port_id) 0, +#endif +#endif +#ifndef ISP2401 + ); +#else + NULL, NULL); +#endif + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + if (!sh_css_sp_is_running()) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_start() error,leaving\n"); + /* queues are invalid*/ + return; + } + ia_css_bufq_enqueue_psys_event(IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, + 0, + 0); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_start() leave: return_void\n"); +} + +/* + * @brief Query the SP thread ID. + * Refer to "sh_css_internal.h" for details. + */ +bool ia_css_pipeline_get_sp_thread_id(unsigned int key, unsigned int *val) +{ + + IA_CSS_ENTER("key=%d, val=%p", key, val); + + if ((val == NULL) || (key >= IA_CSS_PIPELINE_NUM_MAX) || (key >= IA_CSS_PIPE_ID_NUM)) { + IA_CSS_LEAVE("return value = false"); + return false; + } + + *val = pipeline_num_to_sp_thread_map[key]; + + if (*val == (unsigned)PIPELINE_NUM_UNMAPPED) { + IA_CSS_LOG("unmapped pipeline number"); + IA_CSS_LEAVE("return value = false"); + return false; + } + IA_CSS_LEAVE("return value = true"); + return true; +} + +void ia_css_pipeline_dump_thread_map_info(void) +{ + unsigned int i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "pipeline_num_to_sp_thread_map:\n"); + for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "pipe_num: %u, tid: 0x%x\n", i, pipeline_num_to_sp_thread_map[i]); + } +} + +enum ia_css_err ia_css_pipeline_request_stop(struct ia_css_pipeline *pipeline) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned int thread_id; + + assert(pipeline != NULL); + + if (pipeline == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_request_stop() enter: pipeline=%p\n", + pipeline); + pipeline->stop_requested = true; + + /* Send stop event to the sp*/ + /* This needs improvement, stop on all the pipes available + * in the stream*/ + ia_css_pipeline_get_sp_thread_id(pipeline->pipe_num, &thread_id); + if (!sh_css_sp_is_running()) + { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_request_stop() leaving\n"); + /* queues are invalid */ + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + ia_css_bufq_enqueue_psys_event(IA_CSS_PSYS_SW_EVENT_STOP_STREAM, + (uint8_t)thread_id, + 0, + 0); + sh_css_sp_uninit_pipeline(pipeline->pipe_num); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_request_stop() leave: return_err=%d\n", + err); + return err; +} + +void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline) +{ + struct ia_css_pipeline_stage *s; + + assert(pipeline != NULL); + IA_CSS_ENTER_PRIVATE("pipeline = %p", pipeline); + + if (pipeline == NULL) { + IA_CSS_ERROR("NULL input parameter"); + IA_CSS_LEAVE_PRIVATE("void"); + return; + } + s = pipeline->stages; + + while (s) { + struct ia_css_pipeline_stage *next = s->next; + pipeline_stage_destroy(s); + s = next; + } + pipeline_init_defaults(pipeline, pipeline->pipe_id, pipeline->pipe_num, pipeline->dvs_frame_delay); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +/* @brief Add a stage to pipeline. + * + * @param pipeline Pointer to the pipeline to be added to. + * @param[in] stage_desc The description of the stage + * @param[out] stage The successor of the stage. + * @return IA_CSS_SUCCESS or error code upon error. + * + * Add a new stage to a non-NULL pipeline. + * The stage consists of an ISP binary or firmware and input and + * output arguments. +*/ +enum ia_css_err ia_css_pipeline_create_and_add_stage( + struct ia_css_pipeline *pipeline, + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **stage) +{ + struct ia_css_pipeline_stage *last, *new_stage = NULL; + enum ia_css_err err; + + /* other arguments can be NULL */ + assert(pipeline != NULL); + assert(stage_desc != NULL); + last = pipeline->stages; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_create_and_add_stage() enter:\n"); + if (!stage_desc->binary && !stage_desc->firmware + && (stage_desc->sp_func == IA_CSS_PIPELINE_NO_FUNC)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_create_and_add_stage() done:" + " Invalid args\n"); + + return IA_CSS_ERR_INTERNAL_ERROR; + } + + /* Find the last stage */ + while (last && last->next) + last = last->next; + + /* if in_frame is not set, we use the out_frame from the previous + * stage, if no previous stage, it's an error. + */ + if ((stage_desc->sp_func == IA_CSS_PIPELINE_NO_FUNC) + && (!stage_desc->in_frame) + && (!stage_desc->firmware) + && (!stage_desc->binary->online)) { + + /* Do this only for ISP stages*/ + if (last && last->args.out_frame[0]) + stage_desc->in_frame = last->args.out_frame[0]; + + if (!stage_desc->in_frame) + return IA_CSS_ERR_INTERNAL_ERROR; + } + + /* Create the new stage */ + err = pipeline_stage_create(stage_desc, &new_stage); + if (err != IA_CSS_SUCCESS) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_create_and_add_stage() done:" + " stage_create_failed\n"); + return err; + } + + if (last) + last->next = new_stage; + else + pipeline->stages = new_stage; + + /* Output the new stage */ + if (stage) + *stage = new_stage; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_create_and_add_stage() done:\n"); + return IA_CSS_SUCCESS; +} + +void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, + bool continuous) +{ + unsigned i = 0; + struct ia_css_pipeline_stage *stage; + + assert(pipeline != NULL); + for (stage = pipeline->stages; stage; stage = stage->next) { + stage->stage_num = i; + i++; + } + pipeline->num_stages = i; + + ia_css_pipeline_set_zoom_stage(pipeline); + ia_css_pipeline_configure_inout_port(pipeline, continuous); +} + +enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, + int mode, + struct ia_css_pipeline_stage **stage) +{ + struct ia_css_pipeline_stage *s; + assert(pipeline != NULL); + assert(stage != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_get_stage() enter:\n"); + for (s = pipeline->stages; s; s = s->next) { + if (s->mode == mode) { + *stage = s; + return IA_CSS_SUCCESS; + } + } + return IA_CSS_ERR_INTERNAL_ERROR; +} + +enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeline, + uint32_t fw_handle, + struct ia_css_pipeline_stage **stage) +{ + struct ia_css_pipeline_stage *s; + assert(pipeline != NULL); + assert(stage != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,"%s() \n",__func__); + for (s = pipeline->stages; s; s = s->next) { + if ((s->firmware) && (s->firmware->handle == fw_handle)) { + *stage = s; + return IA_CSS_SUCCESS; + } + } + return IA_CSS_ERR_INTERNAL_ERROR; +} + +enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeline, + uint32_t stage_num, + uint32_t *fw_handle) +{ + struct ia_css_pipeline_stage *s; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,"%s() \n",__func__); + if ((pipeline == NULL) || (fw_handle == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + for (s = pipeline->stages; s; s = s->next) { + if((s->stage_num == stage_num) && (s->firmware)) { + *fw_handle = s->firmware->handle; + return IA_CSS_SUCCESS; + } + } + return IA_CSS_ERR_INTERNAL_ERROR; +} + +enum ia_css_err ia_css_pipeline_get_output_stage( + struct ia_css_pipeline *pipeline, + int mode, + struct ia_css_pipeline_stage **stage) +{ + struct ia_css_pipeline_stage *s; + assert(pipeline != NULL); + assert(stage != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_get_output_stage() enter:\n"); + + *stage = NULL; + /* First find acceleration firmware at end of pipe */ + for (s = pipeline->stages; s; s = s->next) { + if (s->firmware && s->mode == mode && + s->firmware->info.isp.sp.enable.output) + *stage = s; + } + if (*stage) + return IA_CSS_SUCCESS; + /* If no firmware, find binary in pipe */ + return ia_css_pipeline_get_stage(pipeline, mode, stage); +} + +bool ia_css_pipeline_has_stopped(struct ia_css_pipeline *pipeline) +{ + /* Android compilation files if made an local variable + stack size on android is limited to 2k and this structure + is around 2.5K, in place of static malloc can be done but + if this call is made too often it will lead to fragment memory + versus a fixed allocation */ + static struct sh_css_sp_group sp_group; + unsigned int thread_id; + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_sp_group; + + fw = &sh_css_sp_fw; + HIVE_ADDR_sp_group = fw->info.sp.group; + + ia_css_pipeline_get_sp_thread_id(pipeline->pipe_num, &thread_id); + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(sp_group), + &sp_group, sizeof(struct sh_css_sp_group)); + return sp_group.pipe[thread_id].num_stages == 0; +} + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) +struct sh_css_sp_pipeline_io_status *ia_css_pipeline_get_pipe_io_status(void) +{ + return(&sh_css_sp_group.pipe_io_status); +} +#endif + +bool ia_css_pipeline_is_mapped(unsigned int key) +{ + bool ret = false; + + IA_CSS_ENTER_PRIVATE("key = %d", key); + + if ((key >= IA_CSS_PIPELINE_NUM_MAX) || (key >= IA_CSS_PIPE_ID_NUM)) { + IA_CSS_ERROR("Invalid key!!"); + IA_CSS_LEAVE_PRIVATE("return = %d", false); + return false; + } + + ret = (bool)(pipeline_num_to_sp_thread_map[key] != (unsigned)PIPELINE_NUM_UNMAPPED); + + IA_CSS_LEAVE_PRIVATE("return = %d", ret); + return ret; +} + +/******************************************************* +*** Static functions +********************************************************/ + +/* Pipeline: + * To organize the several different binaries for each type of mode, + * we use a pipeline. A pipeline contains a number of stages, each with + * their own binary and frame pointers. + * When stages are added to a pipeline, output frames that are not passed + * from outside are automatically allocated. + * When input frames are not passed from outside, each stage will use the + * output frame of the previous stage as input (the full resolution output, + * not the viewfinder output). + * Pipelines must be cleaned and re-created when settings of the binaries + * change. + */ +static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage) +{ + unsigned int i; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + if (stage->out_frame_allocated[i]) { + ia_css_frame_free(stage->args.out_frame[i]); + stage->args.out_frame[i] = NULL; + } + } + if (stage->vf_frame_allocated) { + ia_css_frame_free(stage->args.out_vf_frame); + stage->args.out_vf_frame = NULL; + } + sh_css_free(stage); +} + +static void pipeline_init_sp_thread_map(void) +{ + unsigned int i; + + for (i = 1; i < SH_CSS_MAX_SP_THREADS; i++) + pipeline_sp_thread_list[i] = PIPELINE_SP_THREAD_EMPTY_TOKEN; + + for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) + pipeline_num_to_sp_thread_map[i] = PIPELINE_NUM_UNMAPPED; +} + +static void pipeline_map_num_to_sp_thread(unsigned int pipe_num) +{ + unsigned int i; + bool found_sp_thread = false; + + /* pipe is not mapped to any thread */ + assert(pipeline_num_to_sp_thread_map[pipe_num] + == (unsigned)PIPELINE_NUM_UNMAPPED); + + for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) { + if (pipeline_sp_thread_list[i] == + PIPELINE_SP_THREAD_EMPTY_TOKEN) { + pipeline_sp_thread_list[i] = + PIPELINE_SP_THREAD_RESERVED_TOKEN; + pipeline_num_to_sp_thread_map[pipe_num] = i; + found_sp_thread = true; + break; + } + } + + /* Make sure a mapping is found */ + /* I could do: + assert(i < SH_CSS_MAX_SP_THREADS); + + But the below is more descriptive. + */ + assert(found_sp_thread); +} + +static void pipeline_unmap_num_to_sp_thread(unsigned int pipe_num) +{ + unsigned int thread_id; + assert(pipeline_num_to_sp_thread_map[pipe_num] + != (unsigned)PIPELINE_NUM_UNMAPPED); + + thread_id = pipeline_num_to_sp_thread_map[pipe_num]; + pipeline_num_to_sp_thread_map[pipe_num] = PIPELINE_NUM_UNMAPPED; + pipeline_sp_thread_list[thread_id] = PIPELINE_SP_THREAD_EMPTY_TOKEN; +} + +static enum ia_css_err pipeline_stage_create( + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **new_stage) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage *stage = NULL; + struct ia_css_binary *binary; + struct ia_css_frame *vf_frame; + struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + const struct ia_css_fw_info *firmware; + unsigned int i; + + /* Verify input parameters*/ + if (!(stage_desc->in_frame) && !(stage_desc->firmware) + && (stage_desc->binary) && !(stage_desc->binary->online)) { + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } + + binary = stage_desc->binary; + firmware = stage_desc->firmware; + vf_frame = stage_desc->vf_frame; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + out_frame[i] = stage_desc->out_frame[i]; + } + + stage = sh_css_malloc(sizeof(*stage)); + if (stage == NULL) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + memset(stage, 0, sizeof(*stage)); + + if (firmware) { + stage->binary = NULL; + stage->binary_info = + (struct ia_css_binary_info *)&firmware->info.isp; + } else { + stage->binary = binary; + if (binary) + stage->binary_info = + (struct ia_css_binary_info *)binary->info; + else + stage->binary_info = NULL; + } + + stage->firmware = firmware; + stage->sp_func = stage_desc->sp_func; + stage->max_input_width = stage_desc->max_input_width; + stage->mode = stage_desc->mode; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + stage->out_frame_allocated[i] = false; + stage->vf_frame_allocated = false; + stage->next = NULL; + sh_css_binary_args_reset(&stage->args); + + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + if (!(out_frame[i]) && (binary) + && (binary->out_frame_info[i].res.width)) { + err = ia_css_frame_allocate_from_info(&out_frame[i], + &binary->out_frame_info[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + stage->out_frame_allocated[i] = true; + } + } + /* VF frame is not needed in case of need_pp + However, the capture binary needs a vf frame to write to. + */ + if (!vf_frame) { + if ((binary && binary->vf_frame_info.res.width) || + (firmware && firmware->info.isp.sp.enable.vf_veceven) + ) { + err = ia_css_frame_allocate_from_info(&vf_frame, + &binary->vf_frame_info); + if (err != IA_CSS_SUCCESS) + goto ERR; + stage->vf_frame_allocated = true; + } + } else if (vf_frame && binary && binary->vf_frame_info.res.width + && !firmware) { + /* only mark as allocated if buffer pointer available */ + if (vf_frame->data != mmgr_NULL) + stage->vf_frame_allocated = true; + } + + stage->args.in_frame = stage_desc->in_frame; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + stage->args.out_frame[i] = out_frame[i]; + stage->args.out_vf_frame = vf_frame; + *new_stage = stage; + return err; +ERR: + if (stage != NULL) + pipeline_stage_destroy(stage); + return err; +} + +static void pipeline_init_defaults( + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay) +{ + unsigned int i; + + pipeline->pipe_id = pipe_id; + pipeline->stages = NULL; + pipeline->stop_requested = false; + pipeline->current_stage = NULL; + pipeline->in_frame = DEFAULT_FRAME; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + pipeline->out_frame[i] = DEFAULT_FRAME; + pipeline->vf_frame[i] = DEFAULT_FRAME; + } + pipeline->num_execs = -1; + pipeline->acquire_isp_each_stage = true; + pipeline->pipe_num = (uint8_t)pipe_num; + pipeline->dvs_frame_delay = dvs_frame_delay; +} + +static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline) +{ + struct ia_css_pipeline_stage *stage = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + + assert(pipeline != NULL); + if (pipeline->pipe_id == IA_CSS_PIPE_ID_PREVIEW) { + /* in preview pipeline, vf_pp stage should do zoom */ + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_VF_PP, &stage); + if (err == IA_CSS_SUCCESS) + stage->enable_zoom = true; + } else if (pipeline->pipe_id == IA_CSS_PIPE_ID_CAPTURE) { + /* in capture pipeline, capture_pp stage should do zoom */ + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, &stage); + if (err == IA_CSS_SUCCESS) + stage->enable_zoom = true; + } else if (pipeline->pipe_id == IA_CSS_PIPE_ID_VIDEO) { + /* in video pipeline, video stage should do zoom */ + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_VIDEO, &stage); + if (err == IA_CSS_SUCCESS) + stage->enable_zoom = true; + } else if (pipeline->pipe_id == IA_CSS_PIPE_ID_YUVPP) { + /* in yuvpp pipeline, first yuv_scaler stage should do zoom */ + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, &stage); + if (err == IA_CSS_SUCCESS) + stage->enable_zoom = true; + } +} + +static void +ia_css_pipeline_configure_inout_port(struct ia_css_pipeline *me, bool continuous) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipeline_configure_inout_port() enter: pipe_id(%d) continuous(%d)\n", + me->pipe_id, continuous); + switch (me->pipe_id) { + case IA_CSS_PIPE_ID_PREVIEW: + case IA_CSS_PIPE_ID_VIDEO: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)(continuous ? SH_CSS_COPYSINK_TYPE : SH_CSS_HOST_TYPE), 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + case IA_CSS_PIPE_ID_COPY: /*Copy pipe ports configured to "offline" mode*/ + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + if (continuous) { + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_COPYSINK_TYPE, 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_TAGGERSINK_TYPE, 1); + } else { + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + } + break; + case IA_CSS_PIPE_ID_CAPTURE: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)(continuous ? SH_CSS_TAGGERSINK_TYPE : SH_CSS_HOST_TYPE), + 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + case IA_CSS_PIPE_ID_YUVPP: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)(SH_CSS_HOST_TYPE), 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + case IA_CSS_PIPE_ID_ACC: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + default: + break; + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipeline_configure_inout_port() leave: inout_port_config(%x)\n", + me->inout_port_config); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h new file mode 100644 index 0000000000000..aaf2e247cafbe --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h @@ -0,0 +1,192 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_QUEUE_H +#define __IA_CSS_QUEUE_H + +#include +#include + +#include "ia_css_queue_comm.h" +#include "../src/queue_access.h" + +/* Local Queue object descriptor */ +struct ia_css_queue_local { + ia_css_circbuf_desc_t *cb_desc; /*Circbuf desc for local queues*/ + ia_css_circbuf_elem_t *cb_elems; /*Circbuf elements*/ +}; +typedef struct ia_css_queue_local ia_css_queue_local_t; + +/* Handle for queue object*/ +typedef struct ia_css_queue ia_css_queue_t; + + +/***************************************************************************** + * Queue Public APIs + *****************************************************************************/ +/* @brief Initialize a local queue instance. + * + * @param[out] qhandle. Handle to queue instance for use with API + * @param[in] desc. Descriptor with queue properties filled-in + * @return 0 - Successful init of local queue instance. + * @return EINVAL - Invalid argument. + * + */ +extern int ia_css_queue_local_init( + ia_css_queue_t *qhandle, + ia_css_queue_local_t *desc); + +/* @brief Initialize a remote queue instance + * + * @param[out] qhandle. Handle to queue instance for use with API + * @param[in] desc. Descriptor with queue properties filled-in + * @return 0 - Successful init of remote queue instance. + * @return EINVAL - Invalid argument. + */ +extern int ia_css_queue_remote_init( + ia_css_queue_t *qhandle, + ia_css_queue_remote_t *desc); + +/* @brief Uninitialize a queue instance + * + * @param[in] qhandle. Handle to queue instance + * @return 0 - Successful uninit. + * + */ +extern int ia_css_queue_uninit( + ia_css_queue_t *qhandle); + +/* @brief Enqueue an item in the queue instance + * + * @param[in] qhandle. Handle to queue instance + * @param[in] item. Object to be enqueued. + * @return 0 - Successful enqueue. + * @return EINVAL - Invalid argument. + * @return ENOBUFS - Queue is full. + * + */ +extern int ia_css_queue_enqueue( + ia_css_queue_t *qhandle, + uint32_t item); + +/* @brief Dequeue an item from the queue instance + * + * @param[in] qhandle. Handle to queue instance + * @param[out] item. Object to be dequeued into this item. + + * @return 0 - Successful dequeue. + * @return EINVAL - Invalid argument. + * @return ENODATA - Queue is empty. + * + */ +extern int ia_css_queue_dequeue( + ia_css_queue_t *qhandle, + uint32_t *item); + +/* @brief Check if the queue is empty + * + * @param[in] qhandle. Handle to queue instance + * @param[in] is_empty True if empty, False if not. + * @return 0 - Successful access state. + * @return EINVAL - Invalid argument. + * @return ENOSYS - Function not implemented. + * + */ +extern int ia_css_queue_is_empty( + ia_css_queue_t *qhandle, + bool *is_empty); + +/* @brief Check if the queue is full + * + * @param[in] qhandle. Handle to queue instance + * @param[in] is_full True if Full, False if not. + * @return 0 - Successfully access state. + * @return EINVAL - Invalid argument. + * @return ENOSYS - Function not implemented. + * + */ +extern int ia_css_queue_is_full( + ia_css_queue_t *qhandle, + bool *is_full); + +/* @brief Get used space in the queue + * + * @param[in] qhandle. Handle to queue instance + * @param[in] size Number of available elements in the queue + * @return 0 - Successfully access state. + * @return EINVAL - Invalid argument. + * + */ +extern int ia_css_queue_get_used_space( + ia_css_queue_t *qhandle, + uint32_t *size); + +/* @brief Get free space in the queue + * + * @param[in] qhandle. Handle to queue instance + * @param[in] size Number of free elements in the queue + * @return 0 - Successfully access state. + * @return EINVAL - Invalid argument. + * + */ +extern int ia_css_queue_get_free_space( + ia_css_queue_t *qhandle, + uint32_t *size); + +/* @brief Peek at an element in the queue + * + * @param[in] qhandle. Handle to queue instance + * @param[in] offset Offset of element to peek, + * starting from head of queue + * @param[in] element Value of element returned + * @return 0 - Successfully access state. + * @return EINVAL - Invalid argument. + * + */ +extern int ia_css_queue_peek( + ia_css_queue_t *qhandle, + uint32_t offset, + uint32_t *element); + +/* @brief Get the usable size for the queue + * + * @param[in] qhandle. Handle to queue instance + * @param[out] size Size value to be returned here. + * @return 0 - Successful get size. + * @return EINVAL - Invalid argument. + * @return ENOSYS - Function not implemented. + * + */ +extern int ia_css_queue_get_size( + ia_css_queue_t *qhandle, + uint32_t *size); + +#endif /* __IA_CSS_QUEUE_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h new file mode 100644 index 0000000000000..4ebaeb0c18470 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h @@ -0,0 +1,69 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_QUEUE_COMM_H +#define __IA_CSS_QUEUE_COMM_H + +#include "type_support.h" +#include "ia_css_circbuf.h" +/***************************************************************************** + * Queue Public Data Structures + *****************************************************************************/ + +/* Queue location specifier */ +/* Avoiding enums to save space */ +#define IA_CSS_QUEUE_LOC_HOST 0 +#define IA_CSS_QUEUE_LOC_SP 1 +#define IA_CSS_QUEUE_LOC_ISP 2 + +/* Queue type specifier */ +/* Avoiding enums to save space */ +#define IA_CSS_QUEUE_TYPE_LOCAL 0 +#define IA_CSS_QUEUE_TYPE_REMOTE 1 + +/* for DDR Allocated queues, +allocate minimum these many elements. +DDR->SP' DMEM DMA transfer needs 32byte aligned address. +Since each element size is 4 bytes, 8 elements need to be +DMAed to access single element.*/ +#define IA_CSS_MIN_ELEM_COUNT 8 +#define IA_CSS_DMA_XFER_MASK (IA_CSS_MIN_ELEM_COUNT - 1) + +/* Remote Queue object descriptor */ +struct ia_css_queue_remote { + uint32_t cb_desc_addr; /*Circbuf desc address for remote queues*/ + uint32_t cb_elems_addr; /*Circbuf elements addr for remote queue*/ + uint8_t location; /* Cell location for queue */ + uint8_t proc_id; /* Processor id for queue access */ +}; +typedef struct ia_css_queue_remote ia_css_queue_remote_t; + + +#endif /* __IA_CSS_QUEUE_COMM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c new file mode 100644 index 0000000000000..606376fdf0ba1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c @@ -0,0 +1,412 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_queue.h" +#include +#include +#include +#include "queue_access.h" + +/***************************************************************************** + * Queue Public APIs + *****************************************************************************/ +int ia_css_queue_local_init( + ia_css_queue_t *qhandle, + ia_css_queue_local_t *desc) +{ + if (NULL == qhandle || NULL == desc + || NULL == desc->cb_elems || NULL == desc->cb_desc) { + /* Invalid parameters, return error*/ + return EINVAL; + } + + /* Mark the queue as Local */ + qhandle->type = IA_CSS_QUEUE_TYPE_LOCAL; + + /* Create a local circular buffer queue*/ + ia_css_circbuf_create(&qhandle->desc.cb_local, + desc->cb_elems, + desc->cb_desc); + + return 0; +} + +int ia_css_queue_remote_init( + ia_css_queue_t *qhandle, + ia_css_queue_remote_t *desc) +{ + if (NULL == qhandle || NULL == desc) { + /* Invalid parameters, return error*/ + return EINVAL; + } + + /* Mark the queue as remote*/ + qhandle->type = IA_CSS_QUEUE_TYPE_REMOTE; + + /* Copy over the local queue descriptor*/ + qhandle->location = desc->location; + qhandle->proc_id = desc->proc_id; + qhandle->desc.remote.cb_desc_addr = desc->cb_desc_addr; + qhandle->desc.remote.cb_elems_addr = desc->cb_elems_addr; + + /* If queue is remote, we let the local processor + * do its init, before using it. This is just to get us + * started, we can remove this restriction as we go ahead + */ + + return 0; +} + +int ia_css_queue_uninit( + ia_css_queue_t *qhandle) +{ + if (!qhandle) + return EINVAL; + + /* Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Local queues are created. Destroy it*/ + ia_css_circbuf_destroy(&qhandle->desc.cb_local); + } + + return 0; +} + +int ia_css_queue_enqueue( + ia_css_queue_t *qhandle, + uint32_t item) +{ + int error = 0; + if (NULL == qhandle) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + if (ia_css_circbuf_is_full(&qhandle->desc.cb_local)) { + /* Cannot push the element. Return*/ + return ENOBUFS; + } + + /* Push the element*/ + ia_css_circbuf_push(&qhandle->desc.cb_local, item); + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + ia_css_circbuf_desc_t cb_desc; + ia_css_circbuf_elem_t cb_elem; + uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + + /* a. Load the queue cb_desc from remote */ + QUEUE_CB_DESC_INIT(&cb_desc); + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* b. Operate on the queue */ + if (ia_css_circbuf_desc_is_full(&cb_desc)) + return ENOBUFS; + + cb_elem.val = item; + + error = ia_css_queue_item_store(qhandle, cb_desc.end, &cb_elem); + if (error != 0) + return error; + + cb_desc.end = (cb_desc.end + 1) % cb_desc.size; + + /* c. Store the queue object */ + /* Set only fields requiring update with + * valid value. Avoids uncessary calls + * to load/store functions + */ + ignore_desc_flags = QUEUE_IGNORE_SIZE_START_STEP_FLAGS; + + error = ia_css_queue_store(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + } + + return 0; +} + +int ia_css_queue_dequeue( + ia_css_queue_t *qhandle, + uint32_t *item) +{ + int error = 0; + if (qhandle == NULL || NULL == item) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + if (ia_css_circbuf_is_empty(&qhandle->desc.cb_local)) { + /* Nothing to pop. Return empty queue*/ + return ENODATA; + } + + *item = ia_css_circbuf_pop(&qhandle->desc.cb_local); + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + /* a. Load the queue from remote */ + ia_css_circbuf_desc_t cb_desc; + ia_css_circbuf_elem_t cb_elem; + uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + + QUEUE_CB_DESC_INIT(&cb_desc); + + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* b. Operate on the queue */ + if (ia_css_circbuf_desc_is_empty(&cb_desc)) + return ENODATA; + + error = ia_css_queue_item_load(qhandle, cb_desc.start, &cb_elem); + if (error != 0) + return error; + + *item = cb_elem.val; + + cb_desc.start = OP_std_modadd(cb_desc.start, 1, cb_desc.size); + + /* c. Store the queue object */ + /* Set only fields requiring update with + * valid value. Avoids uncessary calls + * to load/store functions + */ + ignore_desc_flags = QUEUE_IGNORE_SIZE_END_STEP_FLAGS; + error = ia_css_queue_store(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + } + return 0; +} + +int ia_css_queue_is_full( + ia_css_queue_t *qhandle, + bool *is_full) +{ + int error = 0; + if ((qhandle == NULL) || (is_full == NULL)) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + *is_full = ia_css_circbuf_is_full(&qhandle->desc.cb_local); + return 0; + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + /* a. Load the queue from remote */ + ia_css_circbuf_desc_t cb_desc; + uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + QUEUE_CB_DESC_INIT(&cb_desc); + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* b. Operate on the queue */ + *is_full = ia_css_circbuf_desc_is_full(&cb_desc); + return 0; + } + + return EINVAL; +} + +int ia_css_queue_get_free_space( + ia_css_queue_t *qhandle, + uint32_t *size) +{ + int error = 0; + if ((qhandle == NULL) || (size == NULL)) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + *size = ia_css_circbuf_get_free_elems(&qhandle->desc.cb_local); + return 0; + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + /* a. Load the queue from remote */ + ia_css_circbuf_desc_t cb_desc; + uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + QUEUE_CB_DESC_INIT(&cb_desc); + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* b. Operate on the queue */ + *size = ia_css_circbuf_desc_get_free_elems(&cb_desc); + return 0; + } + + return EINVAL; +} + +int ia_css_queue_get_used_space( + ia_css_queue_t *qhandle, + uint32_t *size) +{ + int error = 0; + if ((qhandle == NULL) || (size == NULL)) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + *size = ia_css_circbuf_get_num_elems(&qhandle->desc.cb_local); + return 0; + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + /* a. Load the queue from remote */ + ia_css_circbuf_desc_t cb_desc; + uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + QUEUE_CB_DESC_INIT(&cb_desc); + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* b. Operate on the queue */ + *size = ia_css_circbuf_desc_get_num_elems(&cb_desc); + return 0; + } + + return EINVAL; +} + +int ia_css_queue_peek( + ia_css_queue_t *qhandle, + uint32_t offset, + uint32_t *element) +{ + uint32_t num_elems = 0; + int error = 0; + + if ((qhandle == NULL) || (element == NULL)) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + /* Check if offset is valid */ + num_elems = ia_css_circbuf_get_num_elems(&qhandle->desc.cb_local); + if (offset > num_elems) + return EINVAL; + + *element = ia_css_circbuf_peek_from_start(&qhandle->desc.cb_local, (int) offset); + return 0; + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + /* a. Load the queue from remote */ + ia_css_circbuf_desc_t cb_desc; + ia_css_circbuf_elem_t cb_elem; + uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + + QUEUE_CB_DESC_INIT(&cb_desc); + + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* Check if offset is valid */ + num_elems = ia_css_circbuf_desc_get_num_elems(&cb_desc); + if (offset > num_elems) + return EINVAL; + + offset = OP_std_modadd(cb_desc.start, offset, cb_desc.size); + error = ia_css_queue_item_load(qhandle, (uint8_t)offset, &cb_elem); + if (error != 0) + return error; + + *element = cb_elem.val; + return 0; + } + + return EINVAL; +} + +int ia_css_queue_is_empty( + ia_css_queue_t *qhandle, + bool *is_empty) +{ + int error = 0; + if ((qhandle == NULL) || (is_empty == NULL)) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + *is_empty = ia_css_circbuf_is_empty(&qhandle->desc.cb_local); + return 0; + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + /* a. Load the queue from remote */ + ia_css_circbuf_desc_t cb_desc; + uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + + QUEUE_CB_DESC_INIT(&cb_desc); + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* b. Operate on the queue */ + *is_empty = ia_css_circbuf_desc_is_empty(&cb_desc); + return 0; + } + + return EINVAL; +} + +int ia_css_queue_get_size( + ia_css_queue_t *qhandle, + uint32_t *size) +{ + int error = 0; + if ((qhandle == NULL) || (size == NULL)) + return EINVAL; + + /* 1. Load the required queue object */ + if (qhandle->type == IA_CSS_QUEUE_TYPE_LOCAL) { + /* Directly de-ref the object and + * operate on the queue + */ + /* Return maximum usable capacity */ + *size = ia_css_circbuf_get_size(&qhandle->desc.cb_local); + } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { + /* a. Load the queue from remote */ + ia_css_circbuf_desc_t cb_desc; + uint32_t ignore_desc_flags = QUEUE_IGNORE_START_END_STEP_FLAGS; + + QUEUE_CB_DESC_INIT(&cb_desc); + + error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); + if (error != 0) + return error; + + /* Return maximum usable capacity */ + *size = cb_desc.size; + } + + return 0; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c new file mode 100644 index 0000000000000..7bb2b494836e8 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c @@ -0,0 +1,192 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "type_support.h" +#include "queue_access.h" +#include "ia_css_circbuf.h" +#include "sp.h" +#include "memory_access.h" +#include "assert_support.h" + +int ia_css_queue_load( + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags) +{ + if (rdesc == NULL || cb_desc == NULL) + return EINVAL; + + if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { + assert(ignore_desc_flags <= QUEUE_IGNORE_DESC_FLAGS_MAX); + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_SIZE_FLAG)) { + cb_desc->size = sp_dmem_load_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, size)); + + if (0 == cb_desc->size) { + /* Adding back the workaround which was removed + while refactoring queues. When reading size + through sp_dmem_load_*, sometimes we get back + the value as zero. This causes division by 0 + exception as the size is used in a modular + division operation. */ + return EDOM; + } + } + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_START_FLAG)) + cb_desc->start = sp_dmem_load_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, start)); + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_END_FLAG)) + cb_desc->end = sp_dmem_load_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, end)); + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_STEP_FLAG)) + cb_desc->step = sp_dmem_load_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, step)); + + } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { + /* doing DMA transfer of entire structure */ + mmgr_load(rdesc->desc.remote.cb_desc_addr, + (void *)cb_desc, + sizeof(ia_css_circbuf_desc_t)); + } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { + /* Not supported yet */ + return ENOTSUP; + } + + return 0; +} + +int ia_css_queue_store( + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags) +{ + if (rdesc == NULL || cb_desc == NULL) + return EINVAL; + + if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { + assert(ignore_desc_flags <= QUEUE_IGNORE_DESC_FLAGS_MAX); + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_SIZE_FLAG)) + sp_dmem_store_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, size), + cb_desc->size); + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_START_FLAG)) + sp_dmem_store_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, start), + cb_desc->start); + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_END_FLAG)) + sp_dmem_store_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, end), + cb_desc->end); + + if (0 == (ignore_desc_flags & QUEUE_IGNORE_STEP_FLAG)) + sp_dmem_store_uint8(rdesc->proc_id, + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, step), + cb_desc->step); + } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { + /* doing DMA transfer of entire structure */ + mmgr_store(rdesc->desc.remote.cb_desc_addr, + (void *)cb_desc, + sizeof(ia_css_circbuf_desc_t)); + } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { + /* Not supported yet */ + return ENOTSUP; + } + + return 0; +} + +int ia_css_queue_item_load( + struct ia_css_queue *rdesc, + uint8_t position, + ia_css_circbuf_elem_t *item) +{ + if (rdesc == NULL || item == NULL) + return EINVAL; + + if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { + sp_dmem_load(rdesc->proc_id, + rdesc->desc.remote.cb_elems_addr + + position * sizeof(ia_css_circbuf_elem_t), + item, + sizeof(ia_css_circbuf_elem_t)); + } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { + mmgr_load(rdesc->desc.remote.cb_elems_addr + + position * sizeof(ia_css_circbuf_elem_t), + (void *)item, + sizeof(ia_css_circbuf_elem_t)); + } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { + /* Not supported yet */ + return ENOTSUP; + } + + return 0; +} + +int ia_css_queue_item_store( + struct ia_css_queue *rdesc, + uint8_t position, + ia_css_circbuf_elem_t *item) +{ + if (rdesc == NULL || item == NULL) + return EINVAL; + + if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { + sp_dmem_store(rdesc->proc_id, + rdesc->desc.remote.cb_elems_addr + + position * sizeof(ia_css_circbuf_elem_t), + item, + sizeof(ia_css_circbuf_elem_t)); + } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { + mmgr_store(rdesc->desc.remote.cb_elems_addr + + position * sizeof(ia_css_circbuf_elem_t), + (void *)item, + sizeof(ia_css_circbuf_elem_t)); + } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { + /* Not supported yet */ + return ENOTSUP; + } + + return 0; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h new file mode 100644 index 0000000000000..4775513f54cf1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h @@ -0,0 +1,101 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __QUEUE_ACCESS_H +#define __QUEUE_ACCESS_H + +#include +#include +#include +#include + +#define QUEUE_IGNORE_START_FLAG 0x0001 +#define QUEUE_IGNORE_END_FLAG 0x0002 +#define QUEUE_IGNORE_SIZE_FLAG 0x0004 +#define QUEUE_IGNORE_STEP_FLAG 0x0008 +#define QUEUE_IGNORE_DESC_FLAGS_MAX 0x000f + +#define QUEUE_IGNORE_SIZE_START_STEP_FLAGS \ + (QUEUE_IGNORE_SIZE_FLAG | \ + QUEUE_IGNORE_START_FLAG | \ + QUEUE_IGNORE_STEP_FLAG) + +#define QUEUE_IGNORE_SIZE_END_STEP_FLAGS \ + (QUEUE_IGNORE_SIZE_FLAG | \ + QUEUE_IGNORE_END_FLAG | \ + QUEUE_IGNORE_STEP_FLAG) + +#define QUEUE_IGNORE_START_END_STEP_FLAGS \ + (QUEUE_IGNORE_START_FLAG | \ + QUEUE_IGNORE_END_FLAG | \ + QUEUE_IGNORE_STEP_FLAG) + +#define QUEUE_CB_DESC_INIT(cb_desc) \ + do { \ + (cb_desc)->size = 0; \ + (cb_desc)->step = 0; \ + (cb_desc)->start = 0; \ + (cb_desc)->end = 0; \ + } while(0) + +struct ia_css_queue { + uint8_t type; /* Specify remote/local type of access */ + uint8_t location; /* Cell location for queue */ + uint8_t proc_id; /* Processor id for queue access */ + union { + ia_css_circbuf_t cb_local; + struct { + uint32_t cb_desc_addr; /*Circbuf desc address for remote queues*/ + uint32_t cb_elems_addr; /*Circbuf elements addr for remote queue*/ + } remote; + } desc; +}; + +extern int ia_css_queue_load( + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags); + +extern int ia_css_queue_store( + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags); + +extern int ia_css_queue_item_load( + struct ia_css_queue *rdesc, + uint8_t position, + ia_css_circbuf_elem_t *item); + +extern int ia_css_queue_item_store( + struct ia_css_queue *rdesc, + uint8_t position, + ia_css_circbuf_elem_t *item); + +#endif /* __QUEUE_ACCESS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h new file mode 100644 index 0000000000000..9f78e709b3d0e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h @@ -0,0 +1,88 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_RMGR_H +#define _IA_CSS_RMGR_H + +#include + +#ifndef __INLINE_RMGR__ +#define STORAGE_CLASS_RMGR_H extern +#define STORAGE_CLASS_RMGR_C +#else /* __INLINE_RMGR__ */ +#define STORAGE_CLASS_RMGR_H static inline +#define STORAGE_CLASS_RMGR_C static inline +#endif /* __INLINE_RMGR__ */ + +/** + * @brief Initialize resource manager (host/common) + */ +enum ia_css_err ia_css_rmgr_init(void); + +/** + * @brief Uninitialize resource manager (host/common) + */ +void ia_css_rmgr_uninit(void); + +/***************************************************************** + * Interface definition - resource type (host/common) + ***************************************************************** + * + * struct ia_css_rmgr__pool; + * struct ia_css_rmgr__handle; + * + * STORAGE_CLASS_RMGR_H void ia_css_rmgr_init_( + * struct ia_css_rmgr__pool *pool); + * + * STORAGE_CLASS_RMGR_H void ia_css_rmgr_uninit_( + * struct ia_css_rmgr__pool *pool); + * + * STORAGE_CLASS_RMGR_H void ia_css_rmgr_acq_( + * struct ia_css_rmgr__pool *pool, + * struct ia_css_rmgr__handle **handle); + * + * STORAGE_CLASS_RMGR_H void ia_css_rmgr_rel_( + * struct ia_css_rmgr__pool *pool, + * struct ia_css_rmgr__handle **handle); + * + ***************************************************************** + * Interface definition - refcounting (host/common) + ***************************************************************** + * + * void ia_css_rmgr_refcount_retain_( + * struct ia_css_rmgr__handle **handle); + * + * void ia_css_rmgr_refcount_release_( + * struct ia_css_rmgr__handle **handle); + */ + +#include "ia_css_rmgr_vbuf.h" + +#endif /* _IA_CSS_RMGR_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h new file mode 100644 index 0000000000000..90ac27cf02cff --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h @@ -0,0 +1,115 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef _IA_CSS_RMGR_VBUF_H +#define _IA_CSS_RMGR_VBUF_H + +#include "ia_css_rmgr.h" +#include +#include + +/** + * @brief Data structure for the resource handle (host, vbuf) + */ +struct ia_css_rmgr_vbuf_handle { + hrt_vaddress vptr; + uint8_t count; + uint32_t size; +}; + +/** + * @brief Data structure for the resource pool (host, vbuf) + */ +struct ia_css_rmgr_vbuf_pool { + uint8_t copy_on_write; + uint8_t recycle; + uint32_t size; + uint32_t index; + struct ia_css_rmgr_vbuf_handle **handles; +}; + +/** + * @brief VBUF resource pools + */ +extern struct ia_css_rmgr_vbuf_pool *vbuf_ref; +extern struct ia_css_rmgr_vbuf_pool *vbuf_write; +extern struct ia_css_rmgr_vbuf_pool *hmm_buffer_pool; + +/** + * @brief Initialize the resource pool (host, vbuf) + * + * @param pool The pointer to the pool + */ +STORAGE_CLASS_RMGR_H enum ia_css_err ia_css_rmgr_init_vbuf( + struct ia_css_rmgr_vbuf_pool *pool); + +/** + * @brief Uninitialize the resource pool (host, vbuf) + * + * @param pool The pointer to the pool + */ +STORAGE_CLASS_RMGR_H void ia_css_rmgr_uninit_vbuf( + struct ia_css_rmgr_vbuf_pool *pool); + +/** + * @brief Acquire a handle from the pool (host, vbuf) + * + * @param pool The pointer to the pool + * @param handle The pointer to the handle + */ +STORAGE_CLASS_RMGR_H void ia_css_rmgr_acq_vbuf( + struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle); + +/** + * @brief Release a handle to the pool (host, vbuf) + * + * @param pool The pointer to the pool + * @param handle The pointer to the handle + */ +STORAGE_CLASS_RMGR_H void ia_css_rmgr_rel_vbuf( + struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle); + +/** + * @brief Retain the reference count for a handle (host, vbuf) + * + * @param handle The pointer to the handle + */ +void ia_css_rmgr_refcount_retain_vbuf(struct ia_css_rmgr_vbuf_handle **handle); + +/** + * @brief Release the reference count for a handle (host, vbuf) + * + * @param handle The pointer to the handle + */ +void ia_css_rmgr_refcount_release_vbuf(struct ia_css_rmgr_vbuf_handle **handle); + +#endif /* _IA_CSS_RMGR_VBUF_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr.c new file mode 100644 index 0000000000000..370ff3816dbe0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr.c @@ -0,0 +1,55 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include "ia_css_rmgr.h" + +enum ia_css_err ia_css_rmgr_init(void) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + err = ia_css_rmgr_init_vbuf(vbuf_ref); + if (err == IA_CSS_SUCCESS) + err = ia_css_rmgr_init_vbuf(vbuf_write); + if (err == IA_CSS_SUCCESS) + err = ia_css_rmgr_init_vbuf(hmm_buffer_pool); + if (err != IA_CSS_SUCCESS) + ia_css_rmgr_uninit(); + return err; +} + +/* + * @brief Uninitialize resource pool (host) + */ +void ia_css_rmgr_uninit(void) +{ + ia_css_rmgr_uninit_vbuf(hmm_buffer_pool); + ia_css_rmgr_uninit_vbuf(vbuf_write); + ia_css_rmgr_uninit_vbuf(vbuf_ref); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c new file mode 100644 index 0000000000000..a4d8a48f95ba9 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c @@ -0,0 +1,330 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010-2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_rmgr.h" + +#include +#include +#include /* memset */ +#include /* mmmgr_malloc, mhmm_free */ +#include + +/* + * @brief VBUF resource handles + */ +#define NUM_HANDLES 1000 +static struct ia_css_rmgr_vbuf_handle handle_table[NUM_HANDLES]; + +/* + * @brief VBUF resource pool - refpool + */ +static struct ia_css_rmgr_vbuf_pool refpool = { + false, /* copy_on_write */ + false, /* recycle */ + 0, /* size */ + 0, /* index */ + NULL, /* handles */ +}; + +/* + * @brief VBUF resource pool - writepool + */ +static struct ia_css_rmgr_vbuf_pool writepool = { + true, /* copy_on_write */ + false, /* recycle */ + 0, /* size */ + 0, /* index */ + NULL, /* handles */ +}; + +/* + * @brief VBUF resource pool - hmmbufferpool + */ +static struct ia_css_rmgr_vbuf_pool hmmbufferpool = { + true, /* copy_on_write */ + true, /* recycle */ + 32, /* size */ + 0, /* index */ + NULL, /* handles */ +}; + +struct ia_css_rmgr_vbuf_pool *vbuf_ref = &refpool; +struct ia_css_rmgr_vbuf_pool *vbuf_write = &writepool; +struct ia_css_rmgr_vbuf_pool *hmm_buffer_pool = &hmmbufferpool; + +/* + * @brief Initialize the reference count (host, vbuf) + */ +static void rmgr_refcount_init_vbuf(void) +{ + /* initialize the refcount table */ + memset(&handle_table, 0, sizeof(handle_table)); +} + +/* + * @brief Retain the reference count for a handle (host, vbuf) + * + * @param handle The pointer to the handle + */ +void ia_css_rmgr_refcount_retain_vbuf(struct ia_css_rmgr_vbuf_handle **handle) +{ + int i; + struct ia_css_rmgr_vbuf_handle *h; + if ((handle == NULL) || (*handle == NULL)) { + IA_CSS_LOG("Invalid inputs"); + return; + } + /* new vbuf to count on */ + if ((*handle)->count == 0) { + h = *handle; + *handle = NULL; + for (i = 0; i < NUM_HANDLES; i++) { + if (handle_table[i].count == 0) { + *handle = &handle_table[i]; + break; + } + } + /* if the loop dus not break and *handle == NULL + this is an error handle and report it. + */ + if (*handle == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_i_host_refcount_retain_vbuf() failed to find empty slot!\n"); + return; + } + (*handle)->vptr = h->vptr; + (*handle)->size = h->size; + } + (*handle)->count++; +} + +/* + * @brief Release the reference count for a handle (host, vbuf) + * + * @param handle The pointer to the handle + */ +void ia_css_rmgr_refcount_release_vbuf(struct ia_css_rmgr_vbuf_handle **handle) +{ + if ((handle == NULL) || ((*handle) == NULL) || (((*handle)->count) == 0)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_rmgr_refcount_release_vbuf() invalid arguments!\n"); + return; + } + /* decrease reference count */ + (*handle)->count--; + /* remove from admin */ + if ((*handle)->count == 0) { + (*handle)->vptr = 0x0; + (*handle)->size = 0; + *handle = NULL; + } +} + +/* + * @brief Initialize the resource pool (host, vbuf) + * + * @param pool The pointer to the pool + */ +enum ia_css_err ia_css_rmgr_init_vbuf(struct ia_css_rmgr_vbuf_pool *pool) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + size_t bytes_needed; + rmgr_refcount_init_vbuf(); + assert(pool != NULL); + if (pool == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + /* initialize the recycle pool if used */ + if (pool->recycle && pool->size) { + /* allocate memory for storing the handles */ + bytes_needed = + sizeof(void *) * + pool->size; + pool->handles = sh_css_malloc(bytes_needed); + if (pool->handles != NULL) + memset(pool->handles, 0, bytes_needed); + else + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } else { + /* just in case, set the size to 0 */ + pool->size = 0; + pool->handles = NULL; + } + return err; +} + +/* + * @brief Uninitialize the resource pool (host, vbuf) + * + * @param pool The pointer to the pool + */ +void ia_css_rmgr_uninit_vbuf(struct ia_css_rmgr_vbuf_pool *pool) +{ + uint32_t i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_rmgr_uninit_vbuf()\n"); + if (pool == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "ia_css_rmgr_uninit_vbuf(): NULL argument\n"); + return; + } + if (pool->handles != NULL) { + /* free the hmm buffers */ + for (i = 0; i < pool->size; i++) { + if (pool->handles[i] != NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + " freeing/releasing %x (count=%d)\n", + pool->handles[i]->vptr, + pool->handles[i]->count); + /* free memory */ + hmm_free(pool->handles[i]->vptr); + /* remove from refcount admin */ + ia_css_rmgr_refcount_release_vbuf( + &pool->handles[i]); + } + } + /* now free the pool handles list */ + sh_css_free(pool->handles); + pool->handles = NULL; + } +} + +/* + * @brief Push a handle to the pool + * + * @param pool The pointer to the pool + * @param handle The pointer to the handle + */ +static +void rmgr_push_handle(struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle) +{ + uint32_t i; + bool succes = false; + assert(pool != NULL); + assert(pool->recycle); + assert(pool->handles != NULL); + assert(handle != NULL); + for (i = 0; i < pool->size; i++) { + if (pool->handles[i] == NULL) { + ia_css_rmgr_refcount_retain_vbuf(handle); + pool->handles[i] = *handle; + succes = true; + break; + } + } + assert(succes); +} + +/* + * @brief Pop a handle from the pool + * + * @param pool The pointer to the pool + * @param handle The pointer to the handle + */ +static +void rmgr_pop_handle(struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle) +{ + uint32_t i; + bool succes = false; + assert(pool != NULL); + assert(pool->recycle); + assert(pool->handles != NULL); + assert(handle != NULL); + assert(*handle != NULL); + for (i = 0; i < pool->size; i++) { + if ((pool->handles[i] != NULL) && + (pool->handles[i]->size == (*handle)->size)) { + *handle = pool->handles[i]; + pool->handles[i] = NULL; + /* dont release, we are returning it... + ia_css_rmgr_refcount_release_vbuf(handle); */ + succes = true; + break; + } + } +} + +/* + * @brief Acquire a handle from the pool (host, vbuf) + * + * @param pool The pointer to the pool + * @param handle The pointer to the handle + */ +void ia_css_rmgr_acq_vbuf(struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle) +{ + struct ia_css_rmgr_vbuf_handle h; + + if ((pool == NULL) || (handle == NULL) || (*handle == NULL)) { + IA_CSS_LOG("Invalid inputs"); + return; + } + + if (pool->copy_on_write) { + /* only one reference, reuse (no new retain) */ + if ((*handle)->count == 1) + return; + /* more than one reference, release current buffer */ + if ((*handle)->count > 1) { + /* store current values */ + h.vptr = 0x0; + h.size = (*handle)->size; + /* release ref to current buffer */ + ia_css_rmgr_refcount_release_vbuf(handle); + *handle = &h; + } + /* get new buffer for needed size */ + if ((*handle)->vptr == 0x0) { + if (pool->recycle) { + /* try and pop from pool */ + rmgr_pop_handle(pool, handle); + } + if ((*handle)->vptr == 0x0) { + /* we need to allocate */ + (*handle)->vptr = mmgr_malloc((*handle)->size); + } else { + /* we popped a buffer */ + return; + } + } + } + /* Note that handle will change to an internally maintained one */ + ia_css_rmgr_refcount_retain_vbuf(handle); +} + +/* + * @brief Release a handle to the pool (host, vbuf) + * + * @param pool The pointer to the pool + * @param handle The pointer to the handle + */ +void ia_css_rmgr_rel_vbuf(struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle) +{ + if ((pool == NULL) || (handle == NULL) || (*handle == NULL)) { + IA_CSS_LOG("Invalid inputs"); + return; + } + /* release the handle */ + if ((*handle)->count == 1) { + if (!pool->recycle) { + /* non recycling pool, free mem */ + hmm_free((*handle)->vptr); + } else { + /* recycle to pool */ + rmgr_push_handle(pool, handle); + } + } + ia_css_rmgr_refcount_release_vbuf(handle); + *handle = NULL; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h new file mode 100644 index 0000000000000..bc4b1723369ec --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h @@ -0,0 +1,87 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_SPCTRL_H__ +#define __IA_CSS_SPCTRL_H__ + +#include +#include +#include "ia_css_spctrl_comm.h" + + +typedef struct { + uint32_t ddr_data_offset; /** posistion of data in DDR */ + uint32_t dmem_data_addr; /** data segment address in dmem */ + uint32_t dmem_bss_addr; /** bss segment address in dmem */ + uint32_t data_size; /** data segment size */ + uint32_t bss_size; /** bss segment size */ + uint32_t spctrl_config_dmem_addr; /* + +/* state of SP */ +typedef enum { + IA_CSS_SP_SW_TERMINATED = 0, + IA_CSS_SP_SW_INITIALIZED, + IA_CSS_SP_SW_CONNECTED, + IA_CSS_SP_SW_RUNNING +} ia_css_spctrl_sp_sw_state; + +/* Structure to encapsulate required arguments for + * initialization of SP DMEM using the SP itself + */ +struct ia_css_sp_init_dmem_cfg { + ia_css_ptr ddr_data_addr; /** data segment address in ddr */ + uint32_t dmem_data_addr; /** data segment address in dmem */ + uint32_t dmem_bss_addr; /** bss segment address in dmem */ + uint32_t data_size; /** data segment size */ + uint32_t bss_size; /** bss segment size */ + sp_ID_t sp_id; /* = N_SP_ID) || (spctrl_cfg == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + spctrl_cofig_info[sp_id].code_addr = mmgr_NULL; + + init_dmem_cfg = &spctrl_cofig_info[sp_id].dmem_config; + init_dmem_cfg->dmem_data_addr = spctrl_cfg->dmem_data_addr; + init_dmem_cfg->dmem_bss_addr = spctrl_cfg->dmem_bss_addr; + init_dmem_cfg->data_size = spctrl_cfg->data_size; + init_dmem_cfg->bss_size = spctrl_cfg->bss_size; + init_dmem_cfg->sp_id = sp_id; + + spctrl_cofig_info[sp_id].spctrl_config_dmem_addr = spctrl_cfg->spctrl_config_dmem_addr; + spctrl_cofig_info[sp_id].spctrl_state_dmem_addr = spctrl_cfg->spctrl_state_dmem_addr; + + /* store code (text + icache) and data to DDR + * + * Data used to be stored separately, because of access alignment constraints, + * fix the FW generation instead + */ + code_addr = mmgr_malloc(spctrl_cfg->code_size); + if (code_addr == mmgr_NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + mmgr_store(code_addr, spctrl_cfg->code, spctrl_cfg->code_size); + + if (sizeof(hrt_vaddress) > sizeof(hrt_data)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "size of hrt_vaddress can not be greater than hrt_data\n"); + hmm_free(code_addr); + code_addr = mmgr_NULL; + return IA_CSS_ERR_INTERNAL_ERROR; + } + + init_dmem_cfg->ddr_data_addr = code_addr + spctrl_cfg->ddr_data_offset; + if ((init_dmem_cfg->ddr_data_addr % HIVE_ISP_DDR_WORD_BYTES) != 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "DDR address pointer is not properly aligned for DMA transfer\n"); + hmm_free(code_addr); + code_addr = mmgr_NULL; + return IA_CSS_ERR_INTERNAL_ERROR; + } + + spctrl_cofig_info[sp_id].sp_entry = spctrl_cfg->sp_entry; + spctrl_cofig_info[sp_id].code_addr = code_addr; + spctrl_cofig_info[sp_id].program_name = spctrl_cfg->program_name; + + /* now we program the base address into the icache and + * invalidate the cache. + */ + sp_ctrl_store(sp_id, SP_ICACHE_ADDR_REG, (hrt_data)spctrl_cofig_info[sp_id].code_addr); + sp_ctrl_setbit(sp_id, SP_ICACHE_INV_REG, SP_ICACHE_INV_BIT); + spctrl_loaded[sp_id] = true; + return IA_CSS_SUCCESS; +} + +#ifdef ISP2401 +/* reload pre-loaded FW */ +void sh_css_spctrl_reload_fw(sp_ID_t sp_id) +{ + /* now we program the base address into the icache and + * invalidate the cache. + */ + sp_ctrl_store(sp_id, SP_ICACHE_ADDR_REG, (hrt_data)spctrl_cofig_info[sp_id].code_addr); + sp_ctrl_setbit(sp_id, SP_ICACHE_INV_REG, SP_ICACHE_INV_BIT); + spctrl_loaded[sp_id] = true; +} +#endif + +hrt_vaddress get_sp_code_addr(sp_ID_t sp_id) +{ + return spctrl_cofig_info[sp_id].code_addr; +} + +enum ia_css_err ia_css_spctrl_unload_fw(sp_ID_t sp_id) +{ + if ((sp_id >= N_SP_ID) || ((sp_id < N_SP_ID) && (!spctrl_loaded[sp_id]))) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* freeup the resource */ + if (spctrl_cofig_info[sp_id].code_addr) + hmm_free(spctrl_cofig_info[sp_id].code_addr); + spctrl_loaded[sp_id] = false; + return IA_CSS_SUCCESS; +} + +/* Initialize dmem_cfg in SP dmem and start SP program*/ +enum ia_css_err ia_css_spctrl_start(sp_ID_t sp_id) +{ + if ((sp_id >= N_SP_ID) || ((sp_id < N_SP_ID) && (!spctrl_loaded[sp_id]))) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* Set descr in the SP to initialize the SP DMEM */ + /* + * The FW stores user-space pointers to the FW, the ISP pointer + * is only available here + * + */ + assert(sizeof(unsigned int) <= sizeof(hrt_data)); + + sp_dmem_store(sp_id, + spctrl_cofig_info[sp_id].spctrl_config_dmem_addr, + &spctrl_cofig_info[sp_id].dmem_config, + sizeof(spctrl_cofig_info[sp_id].dmem_config)); + /* set the start address */ + sp_ctrl_store(sp_id, SP_START_ADDR_REG, (hrt_data)spctrl_cofig_info[sp_id].sp_entry); + sp_ctrl_setbit(sp_id, SP_SC_REG, SP_RUN_BIT); + sp_ctrl_setbit(sp_id, SP_SC_REG, SP_START_BIT); + return IA_CSS_SUCCESS; +} + +/* Query the state of SP1 */ +ia_css_spctrl_sp_sw_state ia_css_spctrl_get_state(sp_ID_t sp_id) +{ + ia_css_spctrl_sp_sw_state state = 0; + unsigned int HIVE_ADDR_sp_sw_state; + if (sp_id >= N_SP_ID) + return IA_CSS_SP_SW_TERMINATED; + + HIVE_ADDR_sp_sw_state = spctrl_cofig_info[sp_id].spctrl_state_dmem_addr; + (void)HIVE_ADDR_sp_sw_state; /* Suppres warnings in CRUN */ + if (sp_id == SP0_ID) + state = sp_dmem_load_uint32(sp_id, (unsigned)sp_address_of(sp_sw_state)); + return state; +} + +int ia_css_spctrl_is_idle(sp_ID_t sp_id) +{ + int state = 0; + assert (sp_id < N_SP_ID); + + state = sp_ctrl_getbit(sp_id, SP_SC_REG, SP_IDLE_BIT); + return state; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h new file mode 100644 index 0000000000000..d0d74957358be --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h @@ -0,0 +1,59 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#ifndef __IA_CSS_TAGGER_COMMON_H__ +#define __IA_CSS_TAGGER_COMMON_H__ + +#include +#include + +/** + * @brief The tagger's circular buffer. + * + * Should be one less than NUM_CONTINUOUS_FRAMES in sh_css_internal.h + */ +#if defined(HAS_SP_2400) +#define MAX_CB_ELEMS_FOR_TAGGER 14 +#else +#define MAX_CB_ELEMS_FOR_TAGGER 9 +#endif + +/** + * @brief Data structure for the tagger buffer element. + */ +typedef struct { + uint32_t frame; /* the frame value stored in the element */ + uint32_t param; /* the param value stored in the element */ + uint8_t mark; /* the mark on the element */ + uint8_t lock; /* the lock on the element */ + uint8_t exp_id; /* exp_id of frame, for debugging only */ +} ia_css_tagger_buf_sp_elem_t; + +#endif /* __IA_CSS_TAGGER_COMMON_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c new file mode 100644 index 0000000000000..b7dd18492a91b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c @@ -0,0 +1,48 @@ +#ifndef ISP2401 +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#else +/* +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ +#endif + +#include /* for uint32_t */ +#include "ia_css_timer.h" /*struct ia_css_clock_tick */ +#include "sh_css_legacy.h" /* IA_CSS_PIPE_ID_NUM*/ +#include "gp_timer.h" /*gp_timer_read()*/ +#include "assert_support.h" + +enum ia_css_err +ia_css_timer_get_current_tick( + struct ia_css_clock_tick *curr_ts) { + + assert(curr_ts != NULL); + if (curr_ts == NULL) { + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + curr_ts->ticks = (clock_value_t)gp_timer_read(GP_TIMER_SEL); + return IA_CSS_SUCCESS; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c new file mode 100644 index 0000000000000..4bcc835880cff --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -0,0 +1,11094 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/*! \file */ +#include +#include +#include + +#include "ia_css.h" +#include "sh_css_hrt.h" /* only for file 2 MIPI */ +#include "ia_css_buffer.h" +#include "ia_css_binary.h" +#include "sh_css_internal.h" +#include "sh_css_mipi.h" +#include "sh_css_sp.h" /* sh_css_sp_group */ +#if !defined(HAS_NO_INPUT_SYSTEM) +#include "ia_css_isys.h" +#endif +#include "ia_css_frame.h" +#include "sh_css_defs.h" +#include "sh_css_firmware.h" +#include "sh_css_params.h" +#include "sh_css_params_internal.h" +#include "sh_css_param_shading.h" +#include "ia_css_refcount.h" +#include "ia_css_rmgr.h" +#include "ia_css_debug.h" +#include "ia_css_debug_pipe.h" +#include "ia_css_device_access.h" +#include "device_access.h" +#include "sh_css_legacy.h" +#include "ia_css_pipeline.h" +#include "ia_css_stream.h" +#include "sh_css_stream_format.h" +#include "ia_css_pipe.h" +#include "ia_css_util.h" +#include "ia_css_pipe_util.h" +#include "ia_css_pipe_binarydesc.h" +#include "ia_css_pipe_stagedesc.h" +#ifdef USE_INPUT_SYSTEM_VERSION_2 +#include "ia_css_isys.h" +#endif + +#include "memory_access.h" +#include "tag.h" +#include "assert_support.h" +#include "math_support.h" +#include "sw_event_global.h" /* Event IDs.*/ +#if !defined(HAS_NO_INPUT_FORMATTER) +#include "ia_css_ifmtr.h" +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#include "input_system.h" +#endif +#include "mmu_device.h" /* mmu_set_page_table_base_index(), ... */ +#include "ia_css_mmu_private.h" /* sh_css_mmu_set_page_table_base_index() */ +#include "gdc_device.h" /* HRT_GDC_N */ +#include "dma.h" /* dma_set_max_burst_size() */ +#include "irq.h" /* virq */ +#include "sp.h" /* cnd_sp_irq_enable() */ +#include "isp.h" /* cnd_isp_irq_enable, ISP_VEC_NELEMS */ +#include "gp_device.h" /* gp_device_reg_store() */ +#define __INLINE_GPIO__ +#include "gpio.h" +#include "timed_ctrl.h" +#include "platform_support.h" /* hrt_sleep(), inline */ +#include "ia_css_inputfifo.h" +#define WITH_PC_MONITORING 0 + +#define SH_CSS_VIDEO_BUFFER_ALIGNMENT 0 + +#if WITH_PC_MONITORING +#define MULTIPLE_SAMPLES 1 +#define NOF_SAMPLES 60 +#include "linux/kthread.h" +#include "linux/sched.h" +#include "linux/delay.h" +#include "sh_css_metrics.h" +static int thread_alive; +#endif /* WITH_PC_MONITORING */ + +#include "ia_css_spctrl.h" +#include "ia_css_version_data.h" +#include "sh_css_struct.h" +#include "ia_css_bufq.h" +#include "ia_css_timer.h" /* clock_value_t */ + +#include "isp/modes/interface/input_buf.isp.h" + +/* Name of the sp program: should not be built-in */ +#define SP_PROG_NAME "sp" +/* Size of Refcount List */ +#define REFCOUNT_SIZE 1000 + +/* for JPEG, we don't know the length of the image upfront, + * but since we support sensor upto 16MP, we take this as + * upper limit. + */ +#define JPEG_BYTES (16 * 1024 * 1024) + +#define STATS_ENABLED(stage) (stage && stage->binary && stage->binary->info && \ + (stage->binary->info->sp.enable.s3a || stage->binary->info->sp.enable.dis)) + +struct sh_css my_css; + +int (*sh_css_printf) (const char *fmt, va_list args) = NULL; + +/* modes of work: stream_create and stream_destroy will update the save/restore data + only when in working mode, not suspend/resume +*/ +enum ia_sh_css_modes { + sh_css_mode_none = 0, + sh_css_mode_working, + sh_css_mode_suspend, + sh_css_mode_resume +}; + +/* a stream seed, to save and restore the stream data. + the stream seed contains all the data required to "grow" the seed again after it was closed. +*/ +struct sh_css_stream_seed { + struct ia_css_stream **orig_stream; /* pointer to restore the original handle */ + struct ia_css_stream *stream; /* handle, used as ID too.*/ + struct ia_css_stream_config stream_config; /* stream config struct */ + int num_pipes; + struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; /* pipe handles */ + struct ia_css_pipe **orig_pipes[IA_CSS_PIPE_ID_NUM]; /* pointer to restore original handle */ + struct ia_css_pipe_config pipe_config[IA_CSS_PIPE_ID_NUM]; /* pipe config structs */ +}; + +#define MAX_ACTIVE_STREAMS 5 +/* A global struct for save/restore to hold all the data that should sustain power-down: + MMU base, IRQ type, env for routines, binary loaded FW and the stream seeds. +*/ +struct sh_css_save { + enum ia_sh_css_modes mode; + uint32_t mmu_base; /* the last mmu_base */ + enum ia_css_irq_type irq_type; + struct sh_css_stream_seed stream_seeds[MAX_ACTIVE_STREAMS]; + struct ia_css_fw *loaded_fw; /* fw struct previously loaded */ + struct ia_css_env driver_env; /* driver-supplied env copy */ +}; + +static bool my_css_save_initialized; /* if my_css_save was initialized */ +static struct sh_css_save my_css_save; + +/* pqiao NOTICE: this is for css internal buffer recycling when stopping pipeline, + this array is temporary and will be replaced by resource manager*/ +/* Taking the biggest Size for number of Elements */ +#define MAX_HMM_BUFFER_NUM \ + (SH_CSS_MAX_NUM_QUEUES * (IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE + 2)) + +struct sh_css_hmm_buffer_record { + bool in_use; + enum ia_css_buffer_type type; + struct ia_css_rmgr_vbuf_handle *h_vbuf; + hrt_address kernel_ptr; +}; + +static struct sh_css_hmm_buffer_record hmm_buffer_record[MAX_HMM_BUFFER_NUM]; + +#define GPIO_FLASH_PIN_MASK (1 << HIVE_GPIO_STROBE_TRIGGER_PIN) + +static bool fw_explicitly_loaded = false; + +/* + * Local prototypes + */ + +static enum ia_css_err +allocate_delay_frames(struct ia_css_pipe *pipe); + +static enum ia_css_err +sh_css_pipe_start(struct ia_css_stream *stream); + +#ifdef ISP2401 +/* + * @brief Stop all "ia_css_pipe" instances in the target + * "ia_css_stream" instance. + * + * @param[in] stream Point to the target "ia_css_stream" instance. + * + * @return + * - IA_CSS_SUCCESS, if the "stop" requests have been successfully sent out. + * - CSS error code, otherwise. + * + * + * NOTE + * This API sends the "stop" requests to the "ia_css_pipe" + * instances in the same "ia_css_stream" instance. It will + * return without waiting for all "ia_css_pipe" instatnces + * being stopped. + */ +static enum ia_css_err +sh_css_pipes_stop(struct ia_css_stream *stream); + +/* + * @brief Check if all "ia_css_pipe" instances in the target + * "ia_css_stream" instance have stopped. + * + * @param[in] stream Point to the target "ia_css_stream" instance. + * + * @return + * - true, if all "ia_css_pipe" instances in the target "ia_css_stream" + * instance have ben stopped. + * - false, otherwise. + */ +static bool +sh_css_pipes_have_stopped(struct ia_css_stream *stream); + +static enum ia_css_err +ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format format); + +static enum ia_css_err +check_pipe_resolutions(const struct ia_css_pipe *pipe); + +#endif + +static enum ia_css_err +ia_css_pipe_load_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware); + +static void +ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware); +static void +ia_css_reset_defaults(struct sh_css* css); + +static void +sh_css_init_host_sp_control_vars(void); + +static enum ia_css_err set_num_primary_stages(unsigned int *num, enum ia_css_pipe_version version); + +static bool +need_capture_pp(const struct ia_css_pipe *pipe); + +static bool +need_yuv_scaler_stage(const struct ia_css_pipe *pipe); + +static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( + struct ia_css_frame_info *cas_scaler_in_info, + struct ia_css_frame_info *cas_scaler_out_info, + struct ia_css_frame_info *cas_scaler_vf_info, + struct ia_css_cas_binary_descr *descr); + +static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr *descr); + +static bool +need_downscaling(const struct ia_css_resolution in_res, + const struct ia_css_resolution out_res); + +static bool need_capt_ldc(const struct ia_css_pipe *pipe); + +static enum ia_css_err +sh_css_pipe_load_binaries(struct ia_css_pipe *pipe); + +static +enum ia_css_err sh_css_pipe_get_viewfinder_frame_info( + struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx); + +static enum ia_css_err +sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx); + +static enum ia_css_err +capture_start(struct ia_css_pipe *pipe); + +static enum ia_css_err +video_start(struct ia_css_pipe *pipe); + +static enum ia_css_err +preview_start(struct ia_css_pipe *pipe); + +static enum ia_css_err +yuvpp_start(struct ia_css_pipe *pipe); + +static bool copy_on_sp(struct ia_css_pipe *pipe); + +static enum ia_css_err +init_vf_frameinfo_defaults(struct ia_css_pipe *pipe, + struct ia_css_frame *vf_frame, unsigned int idx); + +static enum ia_css_err +init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, + struct ia_css_frame *frame, enum ia_css_frame_format format); + +static enum ia_css_err +init_out_frameinfo_defaults(struct ia_css_pipe *pipe, + struct ia_css_frame *out_frame, unsigned int idx); + +static enum ia_css_err +sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, + const void *acc_fw); + +static enum ia_css_err +alloc_continuous_frames( + struct ia_css_pipe *pipe, bool init_time); + +static void +pipe_global_init(void); + +static enum ia_css_err +pipe_generate_pipe_num(const struct ia_css_pipe *pipe, unsigned int *pipe_number); + +static void +pipe_release_pipe_num(unsigned int pipe_num); + +static enum ia_css_err +create_host_pipeline_structure(struct ia_css_stream *stream); + +static enum ia_css_err +create_host_pipeline(struct ia_css_stream *stream); + +static enum ia_css_err +create_host_preview_pipeline(struct ia_css_pipe *pipe); + +static enum ia_css_err +create_host_video_pipeline(struct ia_css_pipe *pipe); + +static enum ia_css_err +create_host_copy_pipeline(struct ia_css_pipe *pipe, + unsigned max_input_width, + struct ia_css_frame *out_frame); + +static enum ia_css_err +create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe); + +static enum ia_css_err +create_host_capture_pipeline(struct ia_css_pipe *pipe); + +static enum ia_css_err +create_host_yuvpp_pipeline(struct ia_css_pipe *pipe); + +static enum ia_css_err +create_host_acc_pipeline(struct ia_css_pipe *pipe); + +static unsigned int +sh_css_get_sw_interrupt_value(unsigned int irq); + +static struct ia_css_binary *ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe); + +static struct ia_css_binary * +ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe); + +static struct ia_css_binary * +ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe); + +static void +sh_css_hmm_buffer_record_init(void); + +static void +sh_css_hmm_buffer_record_uninit(void); + +static void +sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record); + +static struct sh_css_hmm_buffer_record +*sh_css_hmm_buffer_record_acquire(struct ia_css_rmgr_vbuf_handle *h_vbuf, + enum ia_css_buffer_type type, + hrt_address kernel_ptr); + +static struct sh_css_hmm_buffer_record +*sh_css_hmm_buffer_record_validate(hrt_vaddress ddr_buffer_addr, + enum ia_css_buffer_type type); + +void +ia_css_get_acc_configs( + struct ia_css_pipe *pipe, + struct ia_css_isp_config *config); + + +#if CONFIG_ON_FRAME_ENQUEUE() +static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info *info, struct frame_data_wrapper *frame); +#endif + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +static unsigned int get_crop_lines_for_bayer_order(const struct ia_css_stream_config *config); +static unsigned int get_crop_columns_for_bayer_order(const struct ia_css_stream_config *config); +static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, + unsigned int *extra_row, unsigned int *extra_column); +#endif + +#ifdef ISP2401 +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +static enum ia_css_err +aspect_ratio_crop_init(struct ia_css_stream *curr_stream, + struct ia_css_pipe *pipes[], + bool *do_crop_status); + +static bool +aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe); + +static enum ia_css_err +aspect_ratio_crop(struct ia_css_pipe *curr_pipe, + struct ia_css_resolution *effective_res); +#endif + +#endif +static void +sh_css_pipe_free_shading_table(struct ia_css_pipe *pipe) +{ + assert(pipe != NULL); + if (pipe == NULL) { + IA_CSS_ERROR("NULL input parameter"); + return; + } + + if (pipe->shading_table) + ia_css_shading_table_free(pipe->shading_table); + pipe->shading_table = NULL; +} + +static enum ia_css_frame_format yuv420_copy_formats[] = { + IA_CSS_FRAME_FORMAT_NV12, + IA_CSS_FRAME_FORMAT_NV21, + IA_CSS_FRAME_FORMAT_YV12, + IA_CSS_FRAME_FORMAT_YUV420, + IA_CSS_FRAME_FORMAT_YUV420_16, + IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8, + IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8 +}; + +static enum ia_css_frame_format yuv422_copy_formats[] = { + IA_CSS_FRAME_FORMAT_NV12, + IA_CSS_FRAME_FORMAT_NV16, + IA_CSS_FRAME_FORMAT_NV21, + IA_CSS_FRAME_FORMAT_NV61, + IA_CSS_FRAME_FORMAT_YV12, + IA_CSS_FRAME_FORMAT_YV16, + IA_CSS_FRAME_FORMAT_YUV420, + IA_CSS_FRAME_FORMAT_YUV420_16, + IA_CSS_FRAME_FORMAT_YUV422, + IA_CSS_FRAME_FORMAT_YUV422_16, + IA_CSS_FRAME_FORMAT_UYVY, + IA_CSS_FRAME_FORMAT_YUYV +}; + +/* Verify whether the selected output format is can be produced + * by the copy binary given the stream format. + * */ +static enum ia_css_err +verify_copy_out_frame_format(struct ia_css_pipe *pipe) +{ + enum ia_css_frame_format out_fmt = pipe->output_info[0].format; + unsigned int i, found = 0; + + assert(pipe != NULL); + assert(pipe->stream != NULL); + + switch (pipe->stream->config.input_config.format) { + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + case ATOMISP_INPUT_FORMAT_YUV420_8: + for (i=0; iconfig.input_config.format, + stream->config.pixels_per_clock == 2); + + return bpp; +} + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) +static enum ia_css_err +sh_css_config_input_network(struct ia_css_stream *stream) +{ + unsigned int fmt_type; + struct ia_css_pipe *pipe = stream->last_pipe; + struct ia_css_binary *binary = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + + assert(stream != NULL); + assert(pipe != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_config_input_network() enter:\n"); + + if (pipe->pipeline.stages) + binary = pipe->pipeline.stages->binary; + + err = ia_css_isys_convert_stream_format_to_mipi_format( + stream->config.input_config.format, + stream->csi_rx_config.comp, + &fmt_type); + if (err != IA_CSS_SUCCESS) + return err; + sh_css_sp_program_input_circuit(fmt_type, + stream->config.channel_id, + stream->config.mode); + + if ((binary && (binary->online || stream->config.continuous)) || + pipe->config.mode == IA_CSS_PIPE_MODE_COPY) { + err = ia_css_ifmtr_configure(&stream->config, + binary); + if (err != IA_CSS_SUCCESS) + return err; + } + + if (stream->config.mode == IA_CSS_INPUT_MODE_TPG || + stream->config.mode == IA_CSS_INPUT_MODE_PRBS) { + unsigned int hblank_cycles = 100, + vblank_lines = 6, + width, + height, + vblank_cycles; + width = (stream->config.input_config.input_res.width) / (1 + (stream->config.pixels_per_clock == 2)); + height = stream->config.input_config.input_res.height; + vblank_cycles = vblank_lines * (width + hblank_cycles); + sh_css_sp_configure_sync_gen(width, height, hblank_cycles, + vblank_cycles); +#if defined(IS_ISP_2400_SYSTEM) + if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) { + /* TODO: move define to proper file in tools */ + #define GP_ISEL_TPG_MODE 0x90058 + ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); + } +#endif + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_config_input_network() leave:\n"); + return IA_CSS_SUCCESS; +} +#elif !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) +static unsigned int csi2_protocol_calculate_max_subpixels_per_line( + enum atomisp_input_format format, + unsigned int pixels_per_line) +{ + unsigned int rval; + + switch (format) { + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + /* + * The frame format layout is shown below. + * + * Line 0: UYY0 UYY0 ... UYY0 + * Line 1: VYY0 VYY0 ... VYY0 + * Line 2: UYY0 UYY0 ... UYY0 + * Line 3: VYY0 VYY0 ... VYY0 + * ... + * Line (n-2): UYY0 UYY0 ... UYY0 + * Line (n-1): VYY0 VYY0 ... VYY0 + * + * In this frame format, the even-line is + * as wide as the odd-line. + * The 0 is introduced by the input system + * (mipi backend). + */ + rval = pixels_per_line * 2; + break; + case ATOMISP_INPUT_FORMAT_YUV420_8: + case ATOMISP_INPUT_FORMAT_YUV420_10: + case ATOMISP_INPUT_FORMAT_YUV420_16: + /* + * The frame format layout is shown below. + * + * Line 0: YYYY YYYY ... YYYY + * Line 1: UYVY UYVY ... UYVY UYVY + * Line 2: YYYY YYYY ... YYYY + * Line 3: UYVY UYVY ... UYVY UYVY + * ... + * Line (n-2): YYYY YYYY ... YYYY + * Line (n-1): UYVY UYVY ... UYVY UYVY + * + * In this frame format, the odd-line is twice + * wider than the even-line. + */ + rval = pixels_per_line * 2; + break; + case ATOMISP_INPUT_FORMAT_YUV422_8: + case ATOMISP_INPUT_FORMAT_YUV422_10: + case ATOMISP_INPUT_FORMAT_YUV422_16: + /* + * The frame format layout is shown below. + * + * Line 0: UYVY UYVY ... UYVY + * Line 1: UYVY UYVY ... UYVY + * Line 2: UYVY UYVY ... UYVY + * Line 3: UYVY UYVY ... UYVY + * ... + * Line (n-2): UYVY UYVY ... UYVY + * Line (n-1): UYVY UYVY ... UYVY + * + * In this frame format, the even-line is + * as wide as the odd-line. + */ + rval = pixels_per_line * 2; + break; + case ATOMISP_INPUT_FORMAT_RGB_444: + case ATOMISP_INPUT_FORMAT_RGB_555: + case ATOMISP_INPUT_FORMAT_RGB_565: + case ATOMISP_INPUT_FORMAT_RGB_666: + case ATOMISP_INPUT_FORMAT_RGB_888: + /* + * The frame format layout is shown below. + * + * Line 0: ABGR ABGR ... ABGR + * Line 1: ABGR ABGR ... ABGR + * Line 2: ABGR ABGR ... ABGR + * Line 3: ABGR ABGR ... ABGR + * ... + * Line (n-2): ABGR ABGR ... ABGR + * Line (n-1): ABGR ABGR ... ABGR + * + * In this frame format, the even-line is + * as wide as the odd-line. + */ + rval = pixels_per_line * 4; + break; + case ATOMISP_INPUT_FORMAT_RAW_6: + case ATOMISP_INPUT_FORMAT_RAW_7: + case ATOMISP_INPUT_FORMAT_RAW_8: + case ATOMISP_INPUT_FORMAT_RAW_10: + case ATOMISP_INPUT_FORMAT_RAW_12: + case ATOMISP_INPUT_FORMAT_RAW_14: + case ATOMISP_INPUT_FORMAT_RAW_16: + case ATOMISP_INPUT_FORMAT_BINARY_8: + case ATOMISP_INPUT_FORMAT_USER_DEF1: + case ATOMISP_INPUT_FORMAT_USER_DEF2: + case ATOMISP_INPUT_FORMAT_USER_DEF3: + case ATOMISP_INPUT_FORMAT_USER_DEF4: + case ATOMISP_INPUT_FORMAT_USER_DEF5: + case ATOMISP_INPUT_FORMAT_USER_DEF6: + case ATOMISP_INPUT_FORMAT_USER_DEF7: + case ATOMISP_INPUT_FORMAT_USER_DEF8: + /* + * The frame format layout is shown below. + * + * Line 0: Pixel Pixel ... Pixel + * Line 1: Pixel Pixel ... Pixel + * Line 2: Pixel Pixel ... Pixel + * Line 3: Pixel Pixel ... Pixel + * ... + * Line (n-2): Pixel Pixel ... Pixel + * Line (n-1): Pixel Pixel ... Pixel + * + * In this frame format, the even-line is + * as wide as the odd-line. + */ + rval = pixels_per_line; + break; + default: + rval = 0; + break; + } + + return rval; +} + +static bool sh_css_translate_stream_cfg_to_input_system_input_port_id( + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr) +{ + bool rc; + + rc = true; + switch (stream_cfg->mode) { + case IA_CSS_INPUT_MODE_TPG: + + if (stream_cfg->source.tpg.id == IA_CSS_TPG_ID0) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_PIXELGEN_PORT0_ID; + } else if (stream_cfg->source.tpg.id == IA_CSS_TPG_ID1) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_PIXELGEN_PORT1_ID; + } else if (stream_cfg->source.tpg.id == IA_CSS_TPG_ID2) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_PIXELGEN_PORT2_ID; + } + + break; + case IA_CSS_INPUT_MODE_PRBS: + + if (stream_cfg->source.prbs.id == IA_CSS_PRBS_ID0) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_PIXELGEN_PORT0_ID; + } else if (stream_cfg->source.prbs.id == IA_CSS_PRBS_ID1) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_PIXELGEN_PORT1_ID; + } else if (stream_cfg->source.prbs.id == IA_CSS_PRBS_ID2) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_PIXELGEN_PORT2_ID; + } + + break; + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: + + if (stream_cfg->source.port.port == MIPI_PORT0_ID) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_CSI_PORT0_ID; + } else if (stream_cfg->source.port.port == MIPI_PORT1_ID) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_CSI_PORT1_ID; + } else if (stream_cfg->source.port.port == MIPI_PORT2_ID) { + isys_stream_descr->input_port_id = INPUT_SYSTEM_CSI_PORT2_ID; + } + + break; + default: + rc = false; + break; + } + + return rc; +} + +static bool sh_css_translate_stream_cfg_to_input_system_input_port_type( + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr) +{ + bool rc; + + rc = true; + switch (stream_cfg->mode) { + case IA_CSS_INPUT_MODE_TPG: + + isys_stream_descr->mode = INPUT_SYSTEM_SOURCE_TYPE_TPG; + + break; + case IA_CSS_INPUT_MODE_PRBS: + + isys_stream_descr->mode = INPUT_SYSTEM_SOURCE_TYPE_PRBS; + + break; + case IA_CSS_INPUT_MODE_SENSOR: + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: + + isys_stream_descr->mode = INPUT_SYSTEM_SOURCE_TYPE_SENSOR; + break; + + default: + rc = false; + break; + } + + return rc; +} + +static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr, + int isys_stream_idx) +{ + bool rc; + + rc = true; + switch (stream_cfg->mode) { + case IA_CSS_INPUT_MODE_TPG: + if (stream_cfg->source.tpg.mode == IA_CSS_TPG_MODE_RAMP) { + isys_stream_descr->tpg_port_attr.mode = PIXELGEN_TPG_MODE_RAMP; + } else if (stream_cfg->source.tpg.mode == IA_CSS_TPG_MODE_CHECKERBOARD) { + isys_stream_descr->tpg_port_attr.mode = PIXELGEN_TPG_MODE_CHBO; + } else if (stream_cfg->source.tpg.mode == IA_CSS_TPG_MODE_MONO) { + isys_stream_descr->tpg_port_attr.mode = PIXELGEN_TPG_MODE_MONO; + } else { + rc = false; + } + + /* + * TODO + * - Make "color_cfg" as part of "ia_css_tpg_config". + */ + isys_stream_descr->tpg_port_attr.color_cfg.R1 = 51; + isys_stream_descr->tpg_port_attr.color_cfg.G1 = 102; + isys_stream_descr->tpg_port_attr.color_cfg.B1 = 255; + isys_stream_descr->tpg_port_attr.color_cfg.R2 = 0; + isys_stream_descr->tpg_port_attr.color_cfg.G2 = 100; + isys_stream_descr->tpg_port_attr.color_cfg.B2 = 160; + + isys_stream_descr->tpg_port_attr.mask_cfg.h_mask = stream_cfg->source.tpg.x_mask; + isys_stream_descr->tpg_port_attr.mask_cfg.v_mask = stream_cfg->source.tpg.y_mask; + isys_stream_descr->tpg_port_attr.mask_cfg.hv_mask = stream_cfg->source.tpg.xy_mask; + + isys_stream_descr->tpg_port_attr.delta_cfg.h_delta = stream_cfg->source.tpg.x_delta; + isys_stream_descr->tpg_port_attr.delta_cfg.v_delta = stream_cfg->source.tpg.y_delta; + + /* + * TODO + * - Make "sync_gen_cfg" as part of "ia_css_tpg_config". + */ + isys_stream_descr->tpg_port_attr.sync_gen_cfg.hblank_cycles = 100; + isys_stream_descr->tpg_port_attr.sync_gen_cfg.vblank_cycles = 100; + isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_clock = stream_cfg->pixels_per_clock; + isys_stream_descr->tpg_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t) ~(0x0); + isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_line = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; + isys_stream_descr->tpg_port_attr.sync_gen_cfg.lines_per_frame = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; + + break; + case IA_CSS_INPUT_MODE_PRBS: + + isys_stream_descr->prbs_port_attr.seed0 = stream_cfg->source.prbs.seed; + isys_stream_descr->prbs_port_attr.seed1 = stream_cfg->source.prbs.seed1; + + /* + * TODO + * - Make "sync_gen_cfg" as part of "ia_css_prbs_config". + */ + isys_stream_descr->prbs_port_attr.sync_gen_cfg.hblank_cycles = 100; + isys_stream_descr->prbs_port_attr.sync_gen_cfg.vblank_cycles = 100; + isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_clock = stream_cfg->pixels_per_clock; + isys_stream_descr->prbs_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t) ~(0x0); + isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_line = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; + isys_stream_descr->prbs_port_attr.sync_gen_cfg.lines_per_frame = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; + + break; + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: + { + enum ia_css_err err; + unsigned int fmt_type; + + err = ia_css_isys_convert_stream_format_to_mipi_format( + stream_cfg->isys_config[isys_stream_idx].format, + MIPI_PREDICTOR_NONE, + &fmt_type); + if (err != IA_CSS_SUCCESS) + rc = false; + + isys_stream_descr->csi_port_attr.active_lanes = stream_cfg->source.port.num_lanes; + isys_stream_descr->csi_port_attr.fmt_type = fmt_type; + isys_stream_descr->csi_port_attr.ch_id = stream_cfg->channel_id; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + isys_stream_descr->online = stream_cfg->online; +#endif + err |= ia_css_isys_convert_compressed_format( + &stream_cfg->source.port.compression, + isys_stream_descr); + if (err != IA_CSS_SUCCESS) + rc = false; + + /* metadata */ + isys_stream_descr->metadata.enable = false; + if (stream_cfg->metadata_config.resolution.height > 0) { + err = ia_css_isys_convert_stream_format_to_mipi_format( + stream_cfg->metadata_config.data_type, + MIPI_PREDICTOR_NONE, + &fmt_type); + if (err != IA_CSS_SUCCESS) + rc = false; + isys_stream_descr->metadata.fmt_type = fmt_type; + isys_stream_descr->metadata.bits_per_pixel = + ia_css_util_input_format_bpp(stream_cfg->metadata_config.data_type, true); + isys_stream_descr->metadata.pixels_per_line = stream_cfg->metadata_config.resolution.width; + isys_stream_descr->metadata.lines_per_frame = stream_cfg->metadata_config.resolution.height; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* For new input system, number of str2mmio requests must be even. + * So we round up number of metadata lines to be even. */ + if (isys_stream_descr->metadata.lines_per_frame > 0) + isys_stream_descr->metadata.lines_per_frame += + (isys_stream_descr->metadata.lines_per_frame & 1); +#endif + isys_stream_descr->metadata.align_req_in_bytes = + ia_css_csi2_calculate_input_system_alignment(stream_cfg->metadata_config.data_type); + isys_stream_descr->metadata.enable = true; + } + + break; + } + default: + rc = false; + break; + } + + return rc; +} + +static bool sh_css_translate_stream_cfg_to_input_system_input_port_resolution( + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr, + int isys_stream_idx) +{ + unsigned int bits_per_subpixel; + unsigned int max_subpixels_per_line; + unsigned int lines_per_frame; + unsigned int align_req_in_bytes; + enum atomisp_input_format fmt_type; + + fmt_type = stream_cfg->isys_config[isys_stream_idx].format; + if ((stream_cfg->mode == IA_CSS_INPUT_MODE_SENSOR || + stream_cfg->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) && + stream_cfg->source.port.compression.type != IA_CSS_CSI2_COMPRESSION_TYPE_NONE) { + + if (stream_cfg->source.port.compression.uncompressed_bits_per_pixel == + UNCOMPRESSED_BITS_PER_PIXEL_10) { + fmt_type = ATOMISP_INPUT_FORMAT_RAW_10; + } + else if (stream_cfg->source.port.compression.uncompressed_bits_per_pixel == + UNCOMPRESSED_BITS_PER_PIXEL_12) { + fmt_type = ATOMISP_INPUT_FORMAT_RAW_12; + } + else + return false; + } + + bits_per_subpixel = + sh_css_stream_format_2_bits_per_subpixel(fmt_type); + if (bits_per_subpixel == 0) + return false; + + max_subpixels_per_line = + csi2_protocol_calculate_max_subpixels_per_line(fmt_type, + stream_cfg->isys_config[isys_stream_idx].input_res.width); + if (max_subpixels_per_line == 0) + return false; + + lines_per_frame = stream_cfg->isys_config[isys_stream_idx].input_res.height; + if (lines_per_frame == 0) + return false; + + align_req_in_bytes = ia_css_csi2_calculate_input_system_alignment(fmt_type); + + /* HW needs subpixel info for their settings */ + isys_stream_descr->input_port_resolution.bits_per_pixel = bits_per_subpixel; + isys_stream_descr->input_port_resolution.pixels_per_line = max_subpixels_per_line; + isys_stream_descr->input_port_resolution.lines_per_frame = lines_per_frame; + isys_stream_descr->input_port_resolution.align_req_in_bytes = align_req_in_bytes; + + return true; +} + +static bool sh_css_translate_stream_cfg_to_isys_stream_descr( + struct ia_css_stream_config *stream_cfg, + bool early_polling, + ia_css_isys_descr_t *isys_stream_descr, + int isys_stream_idx) +{ + bool rc; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_translate_stream_cfg_to_isys_stream_descr() enter:\n"); + rc = sh_css_translate_stream_cfg_to_input_system_input_port_id(stream_cfg, isys_stream_descr); + rc &= sh_css_translate_stream_cfg_to_input_system_input_port_type(stream_cfg, isys_stream_descr); + rc &= sh_css_translate_stream_cfg_to_input_system_input_port_attr(stream_cfg, isys_stream_descr, isys_stream_idx); + rc &= sh_css_translate_stream_cfg_to_input_system_input_port_resolution(stream_cfg, isys_stream_descr, isys_stream_idx); + + isys_stream_descr->raw_packed = stream_cfg->pack_raw_pixels; + isys_stream_descr->linked_isys_stream_id = (int8_t) stream_cfg->isys_config[isys_stream_idx].linked_isys_stream_id; + /* + * Early polling is required for timestamp accuracy in certain case. + * The ISYS HW polling is started on + * ia_css_isys_stream_capture_indication() instead of + * ia_css_pipeline_sp_wait_for_isys_stream_N() as isp processing of + * capture takes longer than getting an ISYS frame + * + * Only 2401 relevant ?? + */ + isys_stream_descr->polling_mode + = early_polling ? INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST + : INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); + + return rc; +} + +static bool sh_css_translate_binary_info_to_input_system_output_port_attr( + struct ia_css_binary *binary, + ia_css_isys_descr_t *isys_stream_descr) +{ + if (!binary) + return false; + + isys_stream_descr->output_port_attr.left_padding = binary->left_padding; + isys_stream_descr->output_port_attr.max_isp_input_width = binary->info->sp.input.max_width; + + return true; +} + +static enum ia_css_err +sh_css_config_input_network(struct ia_css_stream *stream) +{ + bool rc; + ia_css_isys_descr_t isys_stream_descr; + unsigned int sp_thread_id; + struct sh_css_sp_pipeline_terminal *sp_pipeline_input_terminal; + struct ia_css_pipe *pipe = NULL; + struct ia_css_binary *binary = NULL; + int i; + uint32_t isys_stream_id; + bool early_polling = false; + + assert(stream != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_config_input_network() enter 0x%p:\n", stream); + + if (stream->config.continuous == true) { + if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { + pipe = stream->last_pipe; + } else if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_YUVPP) { + pipe = stream->last_pipe; + } else if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) { + pipe = stream->last_pipe->pipe_settings.preview.copy_pipe; + } else if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { + pipe = stream->last_pipe->pipe_settings.video.copy_pipe; + } + } else { + pipe = stream->last_pipe; + if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { + /* + * We need to poll the ISYS HW in capture_indication itself + * for "non-continuous" capture usecase for getting accurate + * isys frame capture timestamps. + * This is because the capturepipe propcessing takes longer + * to execute than the input system frame capture. + * 2401 specific + */ + early_polling = true; + } + } + + assert(pipe != NULL); + if (pipe == NULL) + return IA_CSS_ERR_INTERNAL_ERROR; + + if (pipe->pipeline.stages != NULL) + if (pipe->pipeline.stages->binary != NULL) + binary = pipe->pipeline.stages->binary; + + + + if (binary) { + /* this was being done in ifmtr in 2400. + * online and cont bypass the init_in_frameinfo_memory_defaults + * so need to do it here + */ + ia_css_get_crop_offsets(pipe, &binary->in_frame_info); + } + + /* get the SP thread id */ + rc = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &sp_thread_id); + if (!rc) + return IA_CSS_ERR_INTERNAL_ERROR; + /* get the target input terminal */ + sp_pipeline_input_terminal = &(sh_css_sp_group.pipe_io[sp_thread_id].input); + + for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { + /* initialization */ + memset((void*)(&isys_stream_descr), 0, sizeof(ia_css_isys_descr_t)); + sp_pipeline_input_terminal->context.virtual_input_system_stream[i].valid = 0; + sp_pipeline_input_terminal->ctrl.virtual_input_system_stream_cfg[i].valid = 0; + + if (!stream->config.isys_config[i].valid) + continue; + + /* translate the stream configuration to the Input System (2401) configuration */ + rc = sh_css_translate_stream_cfg_to_isys_stream_descr( + &(stream->config), + early_polling, + &(isys_stream_descr), i); + + if (stream->config.online) { + rc &= sh_css_translate_binary_info_to_input_system_output_port_attr( + binary, + &(isys_stream_descr)); + } + + if (!rc) + return IA_CSS_ERR_INTERNAL_ERROR; + + isys_stream_id = ia_css_isys_generate_stream_id(sp_thread_id, i); + + /* create the virtual Input System (2401) */ + rc = ia_css_isys_stream_create( + &(isys_stream_descr), + &(sp_pipeline_input_terminal->context.virtual_input_system_stream[i]), + isys_stream_id); + if (!rc) + return IA_CSS_ERR_INTERNAL_ERROR; + + /* calculate the configuration of the virtual Input System (2401) */ + rc = ia_css_isys_stream_calculate_cfg( + &(sp_pipeline_input_terminal->context.virtual_input_system_stream[i]), + &(isys_stream_descr), + &(sp_pipeline_input_terminal->ctrl.virtual_input_system_stream_cfg[i])); + if (!rc) { + ia_css_isys_stream_destroy(&(sp_pipeline_input_terminal->context.virtual_input_system_stream[i])); + return IA_CSS_ERR_INTERNAL_ERROR; + } + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_config_input_network() leave:\n"); + + return IA_CSS_SUCCESS; +} + +static inline struct ia_css_pipe *stream_get_last_pipe( + struct ia_css_stream *stream) +{ + struct ia_css_pipe *last_pipe = NULL; + if (stream != NULL) + last_pipe = stream->last_pipe; + + return last_pipe; +} + +static inline struct ia_css_pipe *stream_get_copy_pipe( + struct ia_css_stream *stream) +{ + struct ia_css_pipe *copy_pipe = NULL; + struct ia_css_pipe *last_pipe = NULL; + enum ia_css_pipe_id pipe_id; + + last_pipe = stream_get_last_pipe(stream); + + if ((stream != NULL) && + (last_pipe != NULL) && + (stream->config.continuous)) { + + pipe_id = last_pipe->mode; + switch (pipe_id) { + case IA_CSS_PIPE_ID_PREVIEW: + copy_pipe = last_pipe->pipe_settings.preview.copy_pipe; + break; + case IA_CSS_PIPE_ID_VIDEO: + copy_pipe = last_pipe->pipe_settings.video.copy_pipe; + break; + default: + copy_pipe = NULL; + break; + } + } + + return copy_pipe; +} + +static inline struct ia_css_pipe *stream_get_target_pipe( + struct ia_css_stream *stream) +{ + struct ia_css_pipe *target_pipe; + + /* get the pipe that consumes the stream */ + if (stream->config.continuous) { + target_pipe = stream_get_copy_pipe(stream); + } else { + target_pipe = stream_get_last_pipe(stream); + } + + return target_pipe; +} + +static enum ia_css_err stream_csi_rx_helper( + struct ia_css_stream *stream, + enum ia_css_err (*func)(enum mipi_port_id, uint32_t)) +{ + enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; + uint32_t sp_thread_id, stream_id; + bool rc; + struct ia_css_pipe *target_pipe = NULL; + + if ((stream == NULL) || (stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) + goto exit; + + target_pipe = stream_get_target_pipe(stream); + + if (target_pipe == NULL) + goto exit; + + rc = ia_css_pipeline_get_sp_thread_id( + ia_css_pipe_get_pipe_num(target_pipe), + &sp_thread_id); + + if (!rc) + goto exit; + + /* (un)register all valid "virtual isys streams" within the ia_css_stream */ + stream_id = 0; + do { + if (stream->config.isys_config[stream_id].valid) { + uint32_t isys_stream_id = ia_css_isys_generate_stream_id(sp_thread_id, stream_id); + retval = func(stream->config.source.port.port, isys_stream_id); + } + stream_id++; + } while ((retval == IA_CSS_SUCCESS) && + (stream_id < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH)); + +exit: + return retval; +} + +static inline enum ia_css_err stream_register_with_csi_rx( + struct ia_css_stream *stream) +{ + return stream_csi_rx_helper(stream, ia_css_isys_csi_rx_register_stream); +} + +static inline enum ia_css_err stream_unregister_with_csi_rx( + struct ia_css_stream *stream) +{ + return stream_csi_rx_helper(stream, ia_css_isys_csi_rx_unregister_stream); +} +#endif + +#if WITH_PC_MONITORING +static struct task_struct *my_kthread; /* Handle for the monitoring thread */ +static int sh_binary_running; /* Enable sampling in the thread */ + +static void print_pc_histo(char *core_name, struct sh_css_pc_histogram *hist) +{ + unsigned i; + unsigned cnt_run = 0; + unsigned cnt_stall = 0; + + if (hist == NULL) + return; + + sh_css_print("%s histogram length = %d\n", core_name, hist->length); + sh_css_print("%s PC\trun\tstall\n", core_name); + + for (i = 0; i < hist->length; i++) { + if ((hist->run[i] == 0) && (hist->run[i] == hist->stall[i])) + continue; + sh_css_print("%s %d\t%d\t%d\n", + core_name, i, hist->run[i], hist->stall[i]); + cnt_run += hist->run[i]; + cnt_stall += hist->stall[i]; + } + + sh_css_print(" Statistics for %s, cnt_run = %d, cnt_stall = %d, " + "hist->length = %d\n", + core_name, cnt_run, cnt_stall, hist->length); +} + +static void print_pc_histogram(void) +{ + struct ia_css_binary_metrics *metrics; + + for (metrics = sh_css_metrics.binary_metrics; + metrics; + metrics = metrics->next) { + if (metrics->mode == IA_CSS_BINARY_MODE_PREVIEW || + metrics->mode == IA_CSS_BINARY_MODE_VF_PP) { + sh_css_print("pc_histogram for binary %d is SKIPPED\n", + metrics->id); + continue; + } + + sh_css_print(" pc_histogram for binary %d\n", metrics->id); + print_pc_histo(" ISP", &metrics->isp_histogram); + print_pc_histo(" SP", &metrics->sp_histogram); + sh_css_print("print_pc_histogram() done for binay->id = %d, " + "done.\n", metrics->id); + } + + sh_css_print("PC_MONITORING:print_pc_histogram() -- DONE\n"); +} + +static int pc_monitoring(void *data) +{ + int i = 0; + + (void)data; + while (true) { + if (sh_binary_running) { + sh_css_metrics_sample_pcs(); +#if MULTIPLE_SAMPLES + for (i = 0; i < NOF_SAMPLES; i++) + sh_css_metrics_sample_pcs(); +#endif + } + usleep_range(10, 50); + } + return 0; +} + +static void spying_thread_create(void) +{ + my_kthread = kthread_run(pc_monitoring, NULL, "sh_pc_monitor"); + sh_css_metrics_enable_pc_histogram(1); +} + +static void input_frame_info(struct ia_css_frame_info frame_info) +{ + sh_css_print("SH_CSS:input_frame_info() -- frame->info.res.width = %d, " + "frame->info.res.height = %d, format = %d\n", + frame_info.res.width, frame_info.res.height, frame_info.format); +} +#endif /* WITH_PC_MONITORING */ + +static void +start_binary(struct ia_css_pipe *pipe, + struct ia_css_binary *binary) +{ + struct ia_css_stream *stream; + + assert(pipe != NULL); + /* Acceleration uses firmware, the binary thus can be NULL */ + /* assert(binary != NULL); */ + + (void)binary; + +#if !defined(HAS_NO_INPUT_SYSTEM) + stream = pipe->stream; +#else + (void)pipe; + (void)stream; +#endif + + if (binary) + sh_css_metrics_start_binary(&binary->metrics); + +#if WITH_PC_MONITORING + sh_css_print("PC_MONITORING: %s() -- binary id = %d , " + "enable_dvs_envelope = %d\n", + __func__, binary->info->sp.id, + binary->info->sp.enable.dvs_envelope); + input_frame_info(binary->in_frame_info); + + if (binary && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_VIDEO) + sh_binary_running = true; +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) + if (stream->reconfigure_css_rx) { + ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, + pipe->stream->config.mode); + stream->reconfigure_css_rx = false; + } +#endif +} + +/* start the copy function on the SP */ +static enum ia_css_err +start_copy_on_sp(struct ia_css_pipe *pipe, + struct ia_css_frame *out_frame) +{ + + (void)out_frame; + assert(pipe != NULL); + assert(pipe->stream != NULL); + + if ((pipe == NULL) || (pipe->stream == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + +#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) + if (pipe->stream->reconfigure_css_rx) + ia_css_isys_rx_disable(); +#endif + + if (pipe->stream->config.input_config.format != ATOMISP_INPUT_FORMAT_BINARY_8) + return IA_CSS_ERR_INTERNAL_ERROR; + sh_css_sp_start_binary_copy(ia_css_pipe_get_pipe_num(pipe), out_frame, pipe->stream->config.pixels_per_clock == 2); + +#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) + if (pipe->stream->reconfigure_css_rx) { + ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, pipe->stream->config.mode); + pipe->stream->reconfigure_css_rx = false; + } +#endif + + return IA_CSS_SUCCESS; +} + +void sh_css_binary_args_reset(struct sh_css_binary_args *args) +{ + unsigned int i; + +#ifndef ISP2401 + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) +#else + for (i = 0; i < NUM_TNR_FRAMES; i++) +#endif + args->tnr_frames[i] = NULL; + for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) + args->delay_frames[i] = NULL; + args->in_frame = NULL; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + args->out_frame[i] = NULL; + args->out_vf_frame = NULL; + args->copy_vf = false; + args->copy_output = true; + args->vf_downscale_log2 = 0; +} + +static void start_pipe( + struct ia_css_pipe *me, + enum sh_css_pipe_config_override copy_ovrd, + enum ia_css_input_mode input_mode) +{ +#if defined(HAS_NO_INPUT_SYSTEM) + (void)input_mode; +#endif + + IA_CSS_ENTER_PRIVATE("me = %p, copy_ovrd = %d, input_mode = %d", + me, copy_ovrd, input_mode); + + assert(me != NULL); /* all callers are in this file and call with non null argument */ + + sh_css_sp_init_pipeline(&me->pipeline, + me->mode, + (uint8_t)ia_css_pipe_get_pipe_num(me), + me->config.default_capture_config.enable_xnr != 0, + me->stream->config.pixels_per_clock == 2, + me->stream->config.continuous, + false, + me->required_bds_factor, + copy_ovrd, + input_mode, + &me->stream->config.metadata_config, + &me->stream->info.metadata_info +#if !defined(HAS_NO_INPUT_SYSTEM) + ,(input_mode==IA_CSS_INPUT_MODE_MEMORY) ? + (enum mipi_port_id)0 : + me->stream->config.source.port.port +#endif +#ifdef ISP2401 + ,&me->config.internal_frame_origin_bqs_on_sctbl, + me->stream->isp_params_configs +#endif + ); + + if (me->config.mode != IA_CSS_PIPE_MODE_COPY) { + struct ia_css_pipeline_stage *stage; + stage = me->pipeline.stages; + if (stage) { + me->pipeline.current_stage = stage; + start_binary(me, stage->binary); + } + } + IA_CSS_LEAVE_PRIVATE("void"); +} + +void +sh_css_invalidate_shading_tables(struct ia_css_stream *stream) +{ + int i; + assert(stream != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_invalidate_shading_tables() enter:\n"); + + for (i=0; inum_pipes; i++) { + assert(stream->pipes[i] != NULL); + sh_css_pipe_free_shading_table(stream->pipes[i]); + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_invalidate_shading_tables() leave: return_void\n"); +} + +#ifndef ISP2401 +static void +enable_interrupts(enum ia_css_irq_type irq_type) +{ +#ifdef USE_INPUT_SYSTEM_VERSION_2 + enum mipi_port_id port; +#endif + bool enable_pulse = irq_type != IA_CSS_IRQ_TYPE_EDGE; + IA_CSS_ENTER_PRIVATE(""); + /* Enable IRQ on the SP which signals that SP goes to idle + * (aka ready state) */ + cnd_sp_irq_enable(SP0_ID, true); + /* Set the IRQ device 0 to either level or pulse */ + irq_enable_pulse(IRQ0_ID, enable_pulse); + + cnd_virq_enable_channel(virq_sp, true); + + /* Enable SW interrupt 0, this is used to signal ISYS events */ + cnd_virq_enable_channel( + (virq_id_t)(IRQ_SW_CHANNEL0_ID + IRQ_SW_CHANNEL_OFFSET), + true); + /* Enable SW interrupt 1, this is used to signal PSYS events */ + cnd_virq_enable_channel( + (virq_id_t)(IRQ_SW_CHANNEL1_ID + IRQ_SW_CHANNEL_OFFSET), + true); +#if !defined(HAS_IRQ_MAP_VERSION_2) + /* IRQ_SW_CHANNEL2_ID does not exist on 240x systems */ + cnd_virq_enable_channel( + (virq_id_t)(IRQ_SW_CHANNEL2_ID + IRQ_SW_CHANNEL_OFFSET), + true); + virq_clear_all(); +#endif + +#ifdef USE_INPUT_SYSTEM_VERSION_2 + for (port = 0; port < N_MIPI_PORT_ID; port++) + ia_css_isys_rx_enable_all_interrupts(port); +#endif + + IA_CSS_LEAVE_PRIVATE(""); +} + +#endif + +static bool sh_css_setup_spctrl_config(const struct ia_css_fw_info *fw, + const char * program, + ia_css_spctrl_cfg *spctrl_cfg) +{ + if((fw == NULL)||(spctrl_cfg == NULL)) + return false; + spctrl_cfg->sp_entry = 0; + spctrl_cfg->program_name = (char *)(program); + + spctrl_cfg->ddr_data_offset = fw->blob.data_source; + spctrl_cfg->dmem_data_addr = fw->blob.data_target; + spctrl_cfg->dmem_bss_addr = fw->blob.bss_target; + spctrl_cfg->data_size = fw->blob.data_size ; + spctrl_cfg->bss_size = fw->blob.bss_size; + + spctrl_cfg->spctrl_config_dmem_addr = fw->info.sp.init_dmem_data; + spctrl_cfg->spctrl_state_dmem_addr = fw->info.sp.sw_state; + + spctrl_cfg->code_size = fw->blob.size; + spctrl_cfg->code = fw->blob.code; + spctrl_cfg->sp_entry = fw->info.sp.sp_entry; /* entry function ptr on SP */ + + return true; +} +void +ia_css_unload_firmware(void) +{ + if (sh_css_num_binaries) + { + /* we have already loaded before so get rid of the old stuff */ + ia_css_binary_uninit(); + sh_css_unload_firmware(); + } + fw_explicitly_loaded = false; +} + +static void +ia_css_reset_defaults(struct sh_css* css) +{ + struct sh_css default_css; + + /* Reset everything to zero */ + memset(&default_css, 0, sizeof(default_css)); + + /* Initialize the non zero values*/ + default_css.check_system_idle = true; + default_css.num_cont_raw_frames = NUM_CONTINUOUS_FRAMES; + + /* All should be 0: but memset does it already. + * default_css.num_mipi_frames[N_CSI_PORTS] = 0; + */ + + default_css.irq_type = IA_CSS_IRQ_TYPE_EDGE; + + /*Set the defaults to the output */ + *css = default_css; +} + +bool +ia_css_check_firmware_version(const struct ia_css_fw *fw) +{ + bool retval = false; + + if (fw != NULL) { + retval = sh_css_check_firmware_version(fw->data); + } + return retval; +} + +enum ia_css_err +ia_css_load_firmware(const struct ia_css_env *env, + const struct ia_css_fw *fw) +{ + enum ia_css_err err; + + if (env == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + if (fw == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_load_firmware() enter\n"); + + /* make sure we initialize my_css */ + if (my_css.flush != env->cpu_mem_env.flush) { + ia_css_reset_defaults(&my_css); + my_css.flush = env->cpu_mem_env.flush; + } + + ia_css_unload_firmware(); /* in case we are called twice */ + err = sh_css_load_firmware(fw->data, fw->bytes); + if (err == IA_CSS_SUCCESS) { + err = ia_css_binary_init_infos(); + if (err == IA_CSS_SUCCESS) + fw_explicitly_loaded = true; + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_load_firmware() leave \n"); + return err; +} + +enum ia_css_err +ia_css_init(const struct ia_css_env *env, + const struct ia_css_fw *fw, + uint32_t mmu_l1_base, + enum ia_css_irq_type irq_type) +{ + enum ia_css_err err; + ia_css_spctrl_cfg spctrl_cfg; + + void (*flush_func)(struct ia_css_acc_fw *fw); + hrt_data select, enable; + + /* + * The C99 standard does not specify the exact object representation of structs; + * the representation is compiler dependent. + * + * The structs that are communicated between host and SP/ISP should have the + * exact same object representation. The compiler that is used to compile the + * firmware is hivecc. + * + * To check if a different compiler, used to compile a host application, uses + * another object representation, macros are defined specifying the size of + * the structs as expected by the firmware. + * + * A host application shall verify that a sizeof( ) of the struct is equal to + * the SIZE_OF_XXX macro of the corresponding struct. If they are not + * equal, functionality will break. + */ + /* Check struct sh_css_ddr_address_map */ + COMPILATION_ERROR_IF( sizeof(struct sh_css_ddr_address_map) != SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT ); + /* Check struct host_sp_queues */ + COMPILATION_ERROR_IF( sizeof(struct host_sp_queues) != SIZE_OF_HOST_SP_QUEUES_STRUCT ); + COMPILATION_ERROR_IF( sizeof(struct ia_css_circbuf_desc_s) != SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT ); + COMPILATION_ERROR_IF( sizeof(struct ia_css_circbuf_elem_s) != SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT ); + + /* Check struct host_sp_communication */ + COMPILATION_ERROR_IF( sizeof(struct host_sp_communication) != SIZE_OF_HOST_SP_COMMUNICATION_STRUCT ); + COMPILATION_ERROR_IF( sizeof(struct sh_css_event_irq_mask) != SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT ); + + /* Check struct sh_css_hmm_buffer */ + COMPILATION_ERROR_IF( sizeof(struct sh_css_hmm_buffer) != SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT ); + COMPILATION_ERROR_IF( sizeof(struct ia_css_isp_3a_statistics) != SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT ); + COMPILATION_ERROR_IF( sizeof(struct ia_css_isp_dvs_statistics) != SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT ); + COMPILATION_ERROR_IF( sizeof(struct ia_css_metadata) != SIZE_OF_IA_CSS_METADATA_STRUCT ); + + /* Check struct ia_css_init_dmem_cfg */ + COMPILATION_ERROR_IF( sizeof(struct ia_css_sp_init_dmem_cfg) != SIZE_OF_IA_CSS_SP_INIT_DMEM_CFG_STRUCT ); + + if (fw == NULL && !fw_explicitly_loaded) + return IA_CSS_ERR_INVALID_ARGUMENTS; + if (env == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + sh_css_printf = env->print_env.debug_print; + + IA_CSS_ENTER("void"); + + flush_func = env->cpu_mem_env.flush; + + pipe_global_init(); + ia_css_pipeline_init(); + ia_css_queue_map_init(); + + ia_css_device_access_init(&env->hw_access_env); + + select = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_select) + & (~GPIO_FLASH_PIN_MASK); + enable = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_e) + | GPIO_FLASH_PIN_MASK; + sh_css_mmu_set_page_table_base_index(mmu_l1_base); +#ifndef ISP2401 + my_css_save.mmu_base = mmu_l1_base; +#else + ia_css_save_mmu_base_addr(mmu_l1_base); +#endif + + ia_css_reset_defaults(&my_css); + + my_css_save.driver_env = *env; + my_css.flush = flush_func; + + err = ia_css_rmgr_init(); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + +#ifndef ISP2401 + IA_CSS_LOG("init: %d", my_css_save_initialized); +#else + ia_css_save_restore_data_init(); +#endif + +#ifndef ISP2401 + if (!my_css_save_initialized) + { + my_css_save_initialized = true; + my_css_save.mode = sh_css_mode_working; + memset(my_css_save.stream_seeds, 0, sizeof(struct sh_css_stream_seed) * MAX_ACTIVE_STREAMS); + IA_CSS_LOG("init: %d mode=%d", my_css_save_initialized, my_css_save.mode); + } +#endif + mipi_init(); + +#ifndef ISP2401 + /* In case this has been programmed already, update internal + data structure ... DEPRECATED */ + my_css.page_table_base_index = mmu_get_page_table_base_index(MMU0_ID); + +#endif + my_css.irq_type = irq_type; +#ifndef ISP2401 + my_css_save.irq_type = irq_type; +#else + ia_css_save_irq_type(irq_type); +#endif + enable_interrupts(my_css.irq_type); + + /* configure GPIO to output mode */ + gpio_reg_store(GPIO0_ID, _gpio_block_reg_do_select, select); + gpio_reg_store(GPIO0_ID, _gpio_block_reg_do_e, enable); + gpio_reg_store(GPIO0_ID, _gpio_block_reg_do_0, 0); + + err = ia_css_refcount_init(REFCOUNT_SIZE); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + err = sh_css_params_init(); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + if (fw) + { + ia_css_unload_firmware(); /* in case we already had firmware loaded */ + err = sh_css_load_firmware(fw->data, fw->bytes); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + err = ia_css_binary_init_infos(); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + fw_explicitly_loaded = false; +#ifndef ISP2401 + my_css_save.loaded_fw = (struct ia_css_fw *)fw; +#endif + } + if(!sh_css_setup_spctrl_config(&sh_css_sp_fw,SP_PROG_NAME,&spctrl_cfg)) + return IA_CSS_ERR_INTERNAL_ERROR; + + err = ia_css_spctrl_load_fw(SP0_ID, &spctrl_cfg); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + +#if WITH_PC_MONITORING + if (!thread_alive) { + thread_alive++; + sh_css_print("PC_MONITORING: %s() -- create thread DISABLED\n", + __func__); + spying_thread_create(); + } +#endif + if (!sh_css_hrt_system_is_idle()) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_SYSTEM_NOT_IDLE); + return IA_CSS_ERR_SYSTEM_NOT_IDLE; + } + /* can be called here, queuing works, but: + - when sp is started later, it will wipe queued items + so for now we leave it for later and make sure + updates are not called to frequently. + sh_css_init_buffer_queues(); + */ + +#if defined(HAS_INPUT_SYSTEM_VERSION_2) && defined(HAS_INPUT_SYSTEM_VERSION_2401) +#if defined(USE_INPUT_SYSTEM_VERSION_2) + gp_device_reg_store(GP_DEVICE0_ID, _REG_GP_SWITCH_ISYS2401_ADDR, 0); +#elif defined (USE_INPUT_SYSTEM_VERSION_2401) + gp_device_reg_store(GP_DEVICE0_ID, _REG_GP_SWITCH_ISYS2401_ADDR, 1); +#endif +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) + dma_set_max_burst_size(DMA0_ID, HIVE_DMA_BUS_DDR_CONN, + ISP_DMA_MAX_BURST_LENGTH); + + if(ia_css_isys_init() != INPUT_SYSTEM_ERR_NO_ERROR) + err = IA_CSS_ERR_INVALID_ARGUMENTS; +#endif + + sh_css_params_map_and_store_default_gdc_lut(); + + IA_CSS_LEAVE_ERR(err); + return err; +} + +enum ia_css_err ia_css_suspend(void) +{ + int i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() enter\n"); + my_css_save.mode = sh_css_mode_suspend; + for(i=0;i unloading seed %d (%p)\n", i, my_css_save.stream_seeds[i].stream); + ia_css_stream_unload(my_css_save.stream_seeds[i].stream); + } + my_css_save.mode = sh_css_mode_working; + ia_css_stop_sp(); + ia_css_uninit(); + for(i=0;i after 1: seed %d (%p)\n", i, my_css_save.stream_seeds[i].stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() leave\n"); + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_resume(void) +{ + int i, j; + enum ia_css_err err; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_resume() enter: void\n"); + + err = ia_css_init(&(my_css_save.driver_env), my_css_save.loaded_fw, my_css_save.mmu_base, my_css_save.irq_type); + if (err != IA_CSS_SUCCESS) + return err; + err = ia_css_start_sp(); + if (err != IA_CSS_SUCCESS) + return err; + my_css_save.mode = sh_css_mode_resume; + for(i=0;i seed stream %p\n", my_css_save.stream_seeds[i].stream); + if (my_css_save.stream_seeds[i].stream != NULL) + { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> loading seed %d\n", i); + err = ia_css_stream_load(my_css_save.stream_seeds[i].stream); + if (err != IA_CSS_SUCCESS) + { + if (i) + for(j=0;j PAGE_SIZE) + return vmalloc(size); + return kmalloc(size, GFP_KERNEL); +} + +void *sh_css_calloc(size_t N, size_t size) +{ + void *p; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_calloc() enter: N=%zu, size=%zu\n",N,size); + + /* FIXME: this test can probably go away */ + if (size > 0) { + p = sh_css_malloc(N*size); + if (p) + memset(p, 0, size); + return p; + } + return NULL; +} + +void sh_css_free(void *ptr) +{ + if (is_vmalloc_addr(ptr)) + vfree(ptr); + else + kfree(ptr); +} + +/* For Acceleration API: Flush FW (shared buffer pointer) arguments */ +void +sh_css_flush(struct ia_css_acc_fw *fw) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_flush() enter:\n"); + if ((fw != NULL) && (my_css.flush != NULL)) + my_css.flush(fw); +} + +/* Mapping sp threads. Currently, this is done when a stream is created and + * pipelines are ready to be converted to sp pipelines. Be careful if you are + * doing it from stream_create since we could run out of sp threads due to + * allocation on inactive pipelines. */ +static enum ia_css_err +map_sp_threads(struct ia_css_stream *stream, bool map) +{ + struct ia_css_pipe *main_pipe = NULL; + struct ia_css_pipe *copy_pipe = NULL; + struct ia_css_pipe *capture_pipe = NULL; + struct ia_css_pipe *acc_pipe = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_pipe_id pipe_id; + + assert(stream != NULL); + IA_CSS_ENTER_PRIVATE("stream = %p, map = %s", + stream, map ? "true" : "false"); + + if (stream == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + main_pipe = stream->last_pipe; + pipe_id = main_pipe->mode; + + ia_css_pipeline_map(main_pipe->pipe_num, map); + + switch (pipe_id) { + case IA_CSS_PIPE_ID_PREVIEW: + copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; + capture_pipe = main_pipe->pipe_settings.preview.capture_pipe; + acc_pipe = main_pipe->pipe_settings.preview.acc_pipe; + break; + + case IA_CSS_PIPE_ID_VIDEO: + copy_pipe = main_pipe->pipe_settings.video.copy_pipe; + capture_pipe = main_pipe->pipe_settings.video.capture_pipe; + break; + + case IA_CSS_PIPE_ID_CAPTURE: + case IA_CSS_PIPE_ID_ACC: + default: + break; + } + + if (acc_pipe) { + ia_css_pipeline_map(acc_pipe->pipe_num, map); + } + + if(capture_pipe) { + ia_css_pipeline_map(capture_pipe->pipe_num, map); + } + + /* Firmware expects copy pipe to be the last pipe mapped. (if needed) */ + if(copy_pipe) { + ia_css_pipeline_map(copy_pipe->pipe_num, map); + } + /* DH regular multi pipe - not continuous mode: map the next pipes too */ + if (!stream->config.continuous) { + int i; + for (i = 1; i < stream->num_pipes; i++) + ia_css_pipeline_map(stream->pipes[i]->pipe_num, map); + } + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +/* creates a host pipeline skeleton for all pipes in a stream. Called during + * stream_create. */ +static enum ia_css_err +create_host_pipeline_structure(struct ia_css_stream *stream) +{ + struct ia_css_pipe *copy_pipe = NULL, *capture_pipe = NULL; + struct ia_css_pipe *acc_pipe = NULL; + enum ia_css_pipe_id pipe_id; + struct ia_css_pipe *main_pipe = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned int copy_pipe_delay = 0, + capture_pipe_delay = 0; + + assert(stream != NULL); + IA_CSS_ENTER_PRIVATE("stream = %p", stream); + + if (stream == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + main_pipe = stream->last_pipe; + assert(main_pipe != NULL); + if (main_pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe_id = main_pipe->mode; + + switch (pipe_id) { + case IA_CSS_PIPE_ID_PREVIEW: + copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; + copy_pipe_delay = main_pipe->dvs_frame_delay; + capture_pipe = main_pipe->pipe_settings.preview.capture_pipe; + capture_pipe_delay = IA_CSS_FRAME_DELAY_0; + acc_pipe = main_pipe->pipe_settings.preview.acc_pipe; + err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, main_pipe->pipe_num, main_pipe->dvs_frame_delay); + break; + + case IA_CSS_PIPE_ID_VIDEO: + copy_pipe = main_pipe->pipe_settings.video.copy_pipe; + copy_pipe_delay = main_pipe->dvs_frame_delay; + capture_pipe = main_pipe->pipe_settings.video.capture_pipe; + capture_pipe_delay = IA_CSS_FRAME_DELAY_0; + err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, main_pipe->pipe_num, main_pipe->dvs_frame_delay); + break; + + case IA_CSS_PIPE_ID_CAPTURE: + capture_pipe = main_pipe; + capture_pipe_delay = main_pipe->dvs_frame_delay; + break; + + case IA_CSS_PIPE_ID_YUVPP: + err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, + main_pipe->pipe_num, main_pipe->dvs_frame_delay); + break; + + case IA_CSS_PIPE_ID_ACC: + err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, main_pipe->pipe_num, main_pipe->dvs_frame_delay); + break; + + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if ((IA_CSS_SUCCESS == err) && copy_pipe) { + err = ia_css_pipeline_create(©_pipe->pipeline, + copy_pipe->mode, + copy_pipe->pipe_num, + copy_pipe_delay); + } + + if ((IA_CSS_SUCCESS == err) && capture_pipe) { + err = ia_css_pipeline_create(&capture_pipe->pipeline, + capture_pipe->mode, + capture_pipe->pipe_num, + capture_pipe_delay); + } + + if ((IA_CSS_SUCCESS == err) && acc_pipe) { + err = ia_css_pipeline_create(&acc_pipe->pipeline, acc_pipe->mode, acc_pipe->pipe_num, main_pipe->dvs_frame_delay); + } + + /* DH regular multi pipe - not continuous mode: create the next pipelines too */ + if (!stream->config.continuous) { + int i; + for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err; i++) { + main_pipe = stream->pipes[i]; + err = ia_css_pipeline_create(&main_pipe->pipeline, + main_pipe->mode, + main_pipe->pipe_num, + main_pipe->dvs_frame_delay); + } + } + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +/* creates a host pipeline for all pipes in a stream. Called during + * stream_start. */ +static enum ia_css_err +create_host_pipeline(struct ia_css_stream *stream) +{ + struct ia_css_pipe *copy_pipe = NULL, *capture_pipe = NULL; + struct ia_css_pipe *acc_pipe = NULL; + enum ia_css_pipe_id pipe_id; + struct ia_css_pipe *main_pipe = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned max_input_width = 0; + + IA_CSS_ENTER_PRIVATE("stream = %p", stream); + if (stream == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + main_pipe = stream->last_pipe; + pipe_id = main_pipe->mode; + + /* No continuous frame allocation for capture pipe. It uses the + * "main" pipe's frames. */ + if ((pipe_id == IA_CSS_PIPE_ID_PREVIEW) || + (pipe_id == IA_CSS_PIPE_ID_VIDEO)) { + /* About pipe_id == IA_CSS_PIPE_ID_PREVIEW && stream->config.mode != IA_CSS_INPUT_MODE_MEMORY: + * The original condition pipe_id == IA_CSS_PIPE_ID_PREVIEW is too strong. E.g. in SkyCam (with memory + * based input frames) there is no continuous mode and thus no need for allocated continuous frames + * This is not only for SkyCam but for all preview cases that use DDR based input frames. For this + * reason the stream->config.mode != IA_CSS_INPUT_MODE_MEMORY has beed added. + */ + if (stream->config.continuous || + (pipe_id == IA_CSS_PIPE_ID_PREVIEW && stream->config.mode != IA_CSS_INPUT_MODE_MEMORY)) { + err = alloc_continuous_frames(main_pipe, true); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + } + +#if defined(USE_INPUT_SYSTEM_VERSION_2) + /* old isys: need to allocate_mipi_frames() even in IA_CSS_PIPE_MODE_COPY */ + if (pipe_id != IA_CSS_PIPE_ID_ACC) { + err = allocate_mipi_frames(main_pipe, &stream->info); + if (err != IA_CSS_SUCCESS) + goto ERR; + } +#elif defined(USE_INPUT_SYSTEM_VERSION_2401) + if ((pipe_id != IA_CSS_PIPE_ID_ACC) && + (main_pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { + err = allocate_mipi_frames(main_pipe, &stream->info); + if (err != IA_CSS_SUCCESS) + goto ERR; + } +#endif + + switch (pipe_id) { + case IA_CSS_PIPE_ID_PREVIEW: + copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; + capture_pipe = main_pipe->pipe_settings.preview.capture_pipe; + acc_pipe = main_pipe->pipe_settings.preview.acc_pipe; + max_input_width = + main_pipe->pipe_settings.preview.preview_binary.info->sp.input.max_width; + + err = create_host_preview_pipeline(main_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + + break; + + case IA_CSS_PIPE_ID_VIDEO: + copy_pipe = main_pipe->pipe_settings.video.copy_pipe; + capture_pipe = main_pipe->pipe_settings.video.capture_pipe; + max_input_width = + main_pipe->pipe_settings.video.video_binary.info->sp.input.max_width; + + err = create_host_video_pipeline(main_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + + break; + + case IA_CSS_PIPE_ID_CAPTURE: + capture_pipe = main_pipe; + + break; + + case IA_CSS_PIPE_ID_YUVPP: + err = create_host_yuvpp_pipeline(main_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + + break; + + case IA_CSS_PIPE_ID_ACC: + err = create_host_acc_pipeline(main_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + + break; + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + if (err != IA_CSS_SUCCESS) + goto ERR; + + if(copy_pipe) { + err = create_host_copy_pipeline(copy_pipe, max_input_width, + main_pipe->continuous_frames[0]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + if(capture_pipe) { + err = create_host_capture_pipeline(capture_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + if (acc_pipe) { + err = create_host_acc_pipeline(acc_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + /* DH regular multi pipe - not continuous mode: create the next pipelines too */ + if (!stream->config.continuous) { + int i; + for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err; i++) { + switch (stream->pipes[i]->mode) { + case IA_CSS_PIPE_ID_PREVIEW: + err = create_host_preview_pipeline(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = create_host_video_pipeline(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = create_host_capture_pipeline(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = create_host_yuvpp_pipeline(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_ACC: + err = create_host_acc_pipeline(stream->pipes[i]); + break; + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + if (err != IA_CSS_SUCCESS) + goto ERR; + } + } + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +init_pipe_defaults(enum ia_css_pipe_mode mode, + struct ia_css_pipe *pipe, + bool copy_pipe) +{ + if (pipe == NULL) { + IA_CSS_ERROR("NULL pipe parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + /* Initialize pipe to pre-defined defaults */ + *pipe = IA_CSS_DEFAULT_PIPE; + + /* TODO: JB should not be needed, but temporary backward reference */ + switch (mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + pipe->mode = IA_CSS_PIPE_ID_PREVIEW; + pipe->pipe_settings.preview = IA_CSS_DEFAULT_PREVIEW_SETTINGS; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (copy_pipe) { + pipe->mode = IA_CSS_PIPE_ID_COPY; + } else { + pipe->mode = IA_CSS_PIPE_ID_CAPTURE; + } + pipe->pipe_settings.capture = IA_CSS_DEFAULT_CAPTURE_SETTINGS; + break; + case IA_CSS_PIPE_MODE_VIDEO: + pipe->mode = IA_CSS_PIPE_ID_VIDEO; + pipe->pipe_settings.video = IA_CSS_DEFAULT_VIDEO_SETTINGS; + break; + case IA_CSS_PIPE_MODE_ACC: + pipe->mode = IA_CSS_PIPE_ID_ACC; + break; + case IA_CSS_PIPE_MODE_COPY: + pipe->mode = IA_CSS_PIPE_ID_CAPTURE; + break; + case IA_CSS_PIPE_MODE_YUVPP: + pipe->mode = IA_CSS_PIPE_ID_YUVPP; + pipe->pipe_settings.yuvpp = IA_CSS_DEFAULT_YUVPP_SETTINGS; + break; + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + return IA_CSS_SUCCESS; +} + +static void +pipe_global_init(void) +{ + uint8_t i; + + my_css.pipe_counter = 0; + for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { + my_css.all_pipes[i] = NULL; + } +} + +static enum ia_css_err +pipe_generate_pipe_num(const struct ia_css_pipe *pipe, unsigned int *pipe_number) +{ + const uint8_t INVALID_PIPE_NUM = (uint8_t)~(0); + uint8_t pipe_num = INVALID_PIPE_NUM; + uint8_t i; + + if (pipe == NULL) { + IA_CSS_ERROR("NULL pipe parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + /* Assign a new pipe_num .... search for empty place */ + for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { + if (my_css.all_pipes[i] == NULL) { + /*position is reserved */ + my_css.all_pipes[i] = (struct ia_css_pipe *)pipe; + pipe_num = i; + break; + } + } + if (pipe_num == INVALID_PIPE_NUM) { + /* Max number of pipes already allocated */ + IA_CSS_ERROR("Max number of pipes already created"); + return IA_CSS_ERR_RESOURCE_EXHAUSTED; + } + + my_css.pipe_counter++; + + IA_CSS_LOG("pipe_num (%d)", pipe_num); + + *pipe_number = pipe_num; + return IA_CSS_SUCCESS; +} + +static void +pipe_release_pipe_num(unsigned int pipe_num) +{ + my_css.all_pipes[pipe_num] = NULL; + my_css.pipe_counter--; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "pipe_release_pipe_num (%d)\n", pipe_num); +} + +static enum ia_css_err +create_pipe(enum ia_css_pipe_mode mode, + struct ia_css_pipe **pipe, + bool copy_pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipe *me; + + if (pipe == NULL) { + IA_CSS_ERROR("NULL pipe parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + me = kmalloc(sizeof(*me), GFP_KERNEL); + if (!me) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + err = init_pipe_defaults(mode, me, copy_pipe); + if (err != IA_CSS_SUCCESS) { + kfree(me); + return err; + } + + err = pipe_generate_pipe_num(me, &(me->pipe_num)); + if (err != IA_CSS_SUCCESS) { + kfree(me); + return err; + } + + *pipe = me; + return IA_CSS_SUCCESS; +} + +struct ia_css_pipe * +find_pipe_by_num(uint32_t pipe_num) +{ + unsigned int i; + for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++){ + if (my_css.all_pipes[i] && + ia_css_pipe_get_pipe_num(my_css.all_pipes[i]) == pipe_num) { + return my_css.all_pipes[i]; + } + } + return NULL; +} + +static void sh_css_pipe_free_acc_binaries ( + struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline *pipeline; + struct ia_css_pipeline_stage *stage; + + assert(pipe != NULL); + if (pipe == NULL) { + IA_CSS_ERROR("NULL input pointer"); + return; + } + pipeline = &pipe->pipeline; + + /* loop through the stages and unload them */ + for (stage = pipeline->stages; stage; stage = stage->next) { + struct ia_css_fw_info *firmware = (struct ia_css_fw_info *) + stage->firmware; + if (firmware) + ia_css_pipe_unload_extension(pipe, firmware); + } +} + +enum ia_css_err +ia_css_pipe_destroy(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER("pipe = %p", pipe); + + if (pipe == NULL) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if (pipe->stream != NULL) { + IA_CSS_LOG("ia_css_stream_destroy not called!"); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + /* need to take into account that this function is also called + on the internal copy pipe */ + if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { + ia_css_frame_free_multiple(NUM_CONTINUOUS_FRAMES, + pipe->continuous_frames); + ia_css_metadata_free_multiple(NUM_CONTINUOUS_FRAMES, + pipe->cont_md_buffers); + if (pipe->pipe_settings.preview.copy_pipe) { + err = ia_css_pipe_destroy(pipe->pipe_settings.preview.copy_pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): " + "destroyed internal copy pipe err=%d\n", err); + } + } + break; + case IA_CSS_PIPE_MODE_VIDEO: + if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) { + ia_css_frame_free_multiple(NUM_CONTINUOUS_FRAMES, + pipe->continuous_frames); + ia_css_metadata_free_multiple(NUM_CONTINUOUS_FRAMES, + pipe->cont_md_buffers); + if (pipe->pipe_settings.video.copy_pipe) { + err = ia_css_pipe_destroy(pipe->pipe_settings.video.copy_pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): " + "destroyed internal copy pipe err=%d\n", err); + } + } +#ifndef ISP2401 + ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); +#else + ia_css_frame_free_multiple(NUM_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); +#endif + ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, pipe->pipe_settings.video.delay_frames); + break; + case IA_CSS_PIPE_MODE_CAPTURE: + ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, pipe->pipe_settings.capture.delay_frames); + break; + case IA_CSS_PIPE_MODE_ACC: + sh_css_pipe_free_acc_binaries(pipe); + break; + case IA_CSS_PIPE_MODE_COPY: + break; + case IA_CSS_PIPE_MODE_YUVPP: + break; + } + + sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); + pipe->scaler_pp_lut = mmgr_NULL; + + my_css.active_pipes[ia_css_pipe_get_pipe_num(pipe)] = NULL; + sh_css_pipe_free_shading_table(pipe); + + ia_css_pipeline_destroy(&pipe->pipeline); + pipe_release_pipe_num(ia_css_pipe_get_pipe_num(pipe)); + + /* Temporarily, not every sh_css_pipe has an acc_extension. */ + if (pipe->config.acc_extension) { + ia_css_pipe_unload_extension(pipe, pipe->config.acc_extension); + } + kfree(pipe); + IA_CSS_LEAVE("err = %d", err); + return err; +} + +void +ia_css_uninit(void) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_uninit() enter: void\n"); +#if WITH_PC_MONITORING + sh_css_print("PC_MONITORING: %s() -- started\n", __func__); + print_pc_histogram(); +#endif + + sh_css_params_free_default_gdc_lut(); + + + /* TODO: JB: implement decent check and handling of freeing mipi frames */ + //assert(ref_count_mipi_allocation == 0); //mipi frames are not freed + /* cleanup generic data */ + sh_css_params_uninit(); + ia_css_refcount_uninit(); + + ia_css_rmgr_uninit(); + +#if !defined(HAS_NO_INPUT_FORMATTER) + /* needed for reprogramming the inputformatter after power cycle of css */ + ifmtr_set_if_blocking_mode_reset = true; +#endif + + if (!fw_explicitly_loaded) { + ia_css_unload_firmware(); + } + ia_css_spctrl_unload_fw(SP0_ID); + sh_css_sp_set_sp_running(false); +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + /* check and free any remaining mipi frames */ + free_mipi_frames(NULL); +#endif + + sh_css_sp_reset_global_vars(); + +#if !defined(HAS_NO_INPUT_SYSTEM) + ia_css_isys_uninit(); +#endif + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_uninit() leave: return_void\n"); +} + +#if defined(HAS_IRQ_MAP_VERSION_2) +enum ia_css_err ia_css_irq_translate( + unsigned int *irq_infos) +{ + virq_id_t irq; + enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_more_irqs; + unsigned int infos = 0; + +/* irq_infos can be NULL, but that would make the function useless */ +/* assert(irq_infos != NULL); */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() enter: irq_infos=%p\n",irq_infos); + + while (status == hrt_isp_css_irq_status_more_irqs) { + status = virq_get_channel_id(&irq); + if (status == hrt_isp_css_irq_status_error) + return IA_CSS_ERR_INTERNAL_ERROR; + +#if WITH_PC_MONITORING + sh_css_print("PC_MONITORING: %s() irq = %d, " + "sh_binary_running set to 0\n", __func__, irq); + sh_binary_running = 0 ; +#endif + + switch (irq) { + case virq_sp: + /* When SP goes to idle, info is available in the + * event queue. */ + infos |= IA_CSS_IRQ_INFO_EVENTS_READY; + break; + case virq_isp: + break; +#if !defined(HAS_NO_INPUT_SYSTEM) + case virq_isys_sof: + infos |= IA_CSS_IRQ_INFO_CSS_RECEIVER_SOF; + break; + case virq_isys_eof: + infos |= IA_CSS_IRQ_INFO_CSS_RECEIVER_EOF; + break; + case virq_isys_csi: + infos |= IA_CSS_IRQ_INFO_INPUT_SYSTEM_ERROR; + break; +#endif +#if !defined(HAS_NO_INPUT_FORMATTER) + case virq_ifmt0_id: + infos |= IA_CSS_IRQ_INFO_IF_ERROR; + break; +#endif + case virq_dma: + infos |= IA_CSS_IRQ_INFO_DMA_ERROR; + break; + case virq_sw_pin_0: + infos |= sh_css_get_sw_interrupt_value(0); + break; + case virq_sw_pin_1: + infos |= sh_css_get_sw_interrupt_value(1); + /* pqiao TODO: also assumption here */ + break; + default: + break; + } + } + + if (irq_infos) + *irq_infos = infos; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() " + "leave: irq_infos=%u\n", infos); + + return IA_CSS_SUCCESS; +} + +enum ia_css_err ia_css_irq_enable( + enum ia_css_irq_info info, + bool enable) +{ + virq_id_t irq = N_virq_id; + IA_CSS_ENTER("info=%d, enable=%d", info, enable); + + switch (info) { +#if !defined(HAS_NO_INPUT_FORMATTER) + case IA_CSS_IRQ_INFO_CSS_RECEIVER_SOF: + irq = virq_isys_sof; + break; + case IA_CSS_IRQ_INFO_CSS_RECEIVER_EOF: + irq = virq_isys_eof; + break; + case IA_CSS_IRQ_INFO_INPUT_SYSTEM_ERROR: + irq = virq_isys_csi; + break; +#endif +#if !defined(HAS_NO_INPUT_FORMATTER) + case IA_CSS_IRQ_INFO_IF_ERROR: + irq = virq_ifmt0_id; + break; +#endif + case IA_CSS_IRQ_INFO_DMA_ERROR: + irq = virq_dma; + break; + case IA_CSS_IRQ_INFO_SW_0: + irq = virq_sw_pin_0; + break; + case IA_CSS_IRQ_INFO_SW_1: + irq = virq_sw_pin_1; + break; + default: + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + cnd_virq_enable_channel(irq, enable); + + IA_CSS_LEAVE_ERR(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +#else +#error "sh_css.c: IRQ MAP must be one of \ + {IRQ_MAP_VERSION_2}" +#endif + +static unsigned int +sh_css_get_sw_interrupt_value(unsigned int irq) +{ + unsigned int irq_value; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() enter: irq=%d\n",irq); + irq_value = sh_css_sp_get_sw_interrupt_value(irq); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() leave: irq_value=%d\n",irq_value); + return irq_value; +} + +/* configure and load the copy binary, the next binary is used to + determine whether the copy binary needs to do left padding. */ +static enum ia_css_err load_copy_binary( + struct ia_css_pipe *pipe, + struct ia_css_binary *copy_binary, + struct ia_css_binary *next_binary) +{ + struct ia_css_frame_info copy_out_info, copy_in_info, copy_vf_info; + unsigned int left_padding; + enum ia_css_err err; + struct ia_css_binary_descr copy_descr; + + /* next_binary can be NULL */ + assert(pipe != NULL); + assert(copy_binary != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "load_copy_binary() enter:\n"); + + if (next_binary != NULL) { + copy_out_info = next_binary->in_frame_info; + left_padding = next_binary->left_padding; + } else { + copy_out_info = pipe->output_info[0]; + copy_vf_info = pipe->vf_output_info[0]; + ia_css_frame_info_set_format(©_vf_info, IA_CSS_FRAME_FORMAT_YUV_LINE); + left_padding = 0; + } + + ia_css_pipe_get_copy_binarydesc(pipe, ©_descr, + ©_in_info, ©_out_info, (next_binary != NULL) ? NULL : NULL/*TODO: ©_vf_info*/); + err = ia_css_binary_find(©_descr, copy_binary); + if (err != IA_CSS_SUCCESS) + return err; + copy_binary->left_padding = left_padding; + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +alloc_continuous_frames( + struct ia_css_pipe *pipe, bool init_time) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame_info ref_info; + enum ia_css_pipe_id pipe_id; + bool continuous; + unsigned int i, idx; + unsigned int num_frames; + struct ia_css_pipe *capture_pipe = NULL; + + IA_CSS_ENTER_PRIVATE("pipe = %p, init_time = %d", pipe, init_time); + + if ((pipe == NULL) || (pipe->stream == NULL)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe_id = pipe->mode; + continuous = pipe->stream->config.continuous; + + if (continuous) { + if (init_time) { + num_frames = pipe->stream->config.init_num_cont_raw_buf; + pipe->stream->continuous_pipe = pipe; + } else + num_frames = pipe->stream->config.target_num_cont_raw_buf; + } else { + num_frames = NUM_ONLINE_INIT_CONTINUOUS_FRAMES; + } + + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) { + ref_info = pipe->pipe_settings.preview.preview_binary.in_frame_info; + } else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) { + ref_info = pipe->pipe_settings.video.video_binary.in_frame_info; + } + else { + /* should not happen */ + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + /* For CSI2+, the continuous frame will hold the full input frame */ + ref_info.res.width = pipe->stream->config.input_config.input_res.width; + ref_info.res.height = pipe->stream->config.input_config.input_res.height; + + /* Ensure padded width is aligned for 2401 */ + ref_info.padded_width = CEIL_MUL(ref_info.res.width, 2 * ISP_VEC_NELEMS); +#endif + +#if !defined(HAS_NO_PACKED_RAW_PIXELS) + if (pipe->stream->config.pack_raw_pixels) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW_PACKED\n"); + ref_info.format = IA_CSS_FRAME_FORMAT_RAW_PACKED; + } else +#endif + { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW\n"); + ref_info.format = IA_CSS_FRAME_FORMAT_RAW; + } + + /* Write format back to binary */ + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) { + pipe->pipe_settings.preview.preview_binary.in_frame_info.format = ref_info.format; + capture_pipe = pipe->pipe_settings.preview.capture_pipe; + } else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) { + pipe->pipe_settings.video.video_binary.in_frame_info.format = ref_info.format; + capture_pipe = pipe->pipe_settings.video.capture_pipe; + } else { + /* should not happen */ + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + if (init_time) + idx = 0; + else + idx = pipe->stream->config.init_num_cont_raw_buf; + + for (i = idx; i < NUM_CONTINUOUS_FRAMES; i++) { + /* free previous frame */ + if (pipe->continuous_frames[i]) { + ia_css_frame_free(pipe->continuous_frames[i]); + pipe->continuous_frames[i] = NULL; + } + /* free previous metadata buffer */ + ia_css_metadata_free(pipe->cont_md_buffers[i]); + pipe->cont_md_buffers[i] = NULL; + + /* check if new frame needed */ + if (i < num_frames) { + /* allocate new frame */ + err = ia_css_frame_allocate_from_info( + &pipe->continuous_frames[i], + &ref_info); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* allocate metadata buffer */ + pipe->cont_md_buffers[i] = ia_css_metadata_allocate( + &pipe->stream->info.metadata_info); + } + } + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_alloc_continuous_frame_remain(struct ia_css_stream *stream) +{ + if (stream == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + return alloc_continuous_frames(stream->continuous_pipe, false); +} + +static enum ia_css_err +load_preview_binaries(struct ia_css_pipe *pipe) +{ + struct ia_css_frame_info prev_in_info, + prev_bds_out_info, + prev_out_info, + prev_vf_info; + struct ia_css_binary_descr preview_descr; + bool online; + enum ia_css_err err = IA_CSS_SUCCESS; + bool continuous, need_vf_pp = false; + bool need_isp_copy_binary = false; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + bool sensor = false; +#endif + /* preview only have 1 output pin now */ + struct ia_css_frame_info *pipe_out_info = &pipe->output_info[0]; + struct ia_css_preview_settings *mycs = &pipe->pipe_settings.preview; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->stream != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_PREVIEW); + + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; +#endif + + if (mycs->preview_binary.info) + return IA_CSS_SUCCESS; + + err = ia_css_util_check_input(&pipe->stream->config, false, false); + if (err != IA_CSS_SUCCESS) + return err; + err = ia_css_frame_check_info(pipe_out_info); + if (err != IA_CSS_SUCCESS) + return err; + + /* Note: the current selection of vf_pp binary and + * parameterization of the preview binary contains a few pieces + * of hardcoded knowledge. This needs to be cleaned up such that + * the binary selection becomes more generic. + * The vf_pp binary is needed if one or more of the following features + * are required: + * 1. YUV downscaling. + * 2. Digital zoom. + * 3. An output format that is not supported by the preview binary. + * In practice this means something other than yuv_line or nv12. + * The decision if the vf_pp binary is needed for YUV downscaling is + * made after the preview binary selection, since some preview binaries + * can perform the requested YUV downscaling. + * */ + need_vf_pp = pipe->config.enable_dz; + need_vf_pp |= pipe_out_info->format != IA_CSS_FRAME_FORMAT_YUV_LINE && + !(pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12 || + pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12_16 || + pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12_TILEY); + + /* Preview step 1 */ + if (pipe->vf_yuv_ds_input_info.res.width) + prev_vf_info = pipe->vf_yuv_ds_input_info; + else + prev_vf_info = *pipe_out_info; + /* If vf_pp is needed, then preview must output yuv_line. + * The exception is when vf_pp is manually disabled, that is only + * used in combination with a pipeline extension that requires + * yuv_line as input. + * */ + if (need_vf_pp) + ia_css_frame_info_set_format(&prev_vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); + + err = ia_css_pipe_get_preview_binarydesc( + pipe, + &preview_descr, + &prev_in_info, + &prev_bds_out_info, + &prev_out_info, + &prev_vf_info); + if (err != IA_CSS_SUCCESS) + return err; + err = ia_css_binary_find(&preview_descr, &mycs->preview_binary); + if (err != IA_CSS_SUCCESS) + return err; + +#ifdef ISP2401 + /* The delay latency determines the number of invalid frames after + * a stream is started. */ + pipe->num_invalid_frames = pipe->dvs_frame_delay; + pipe->info.num_invalid_frames = pipe->num_invalid_frames; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "load_preview_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", + pipe->num_invalid_frames, pipe->dvs_frame_delay); + +#endif + /* The vf_pp binary is needed when (further) YUV downscaling is required */ + need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.width != pipe_out_info->res.width; + need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.height != pipe_out_info->res.height; + + /* When vf_pp is needed, then the output format of the selected + * preview binary must be yuv_line. If this is not the case, + * then the preview binary selection is done again. + */ + if (need_vf_pp && + (mycs->preview_binary.out_frame_info[0].format != IA_CSS_FRAME_FORMAT_YUV_LINE)) { + + /* Preview step 2 */ + if (pipe->vf_yuv_ds_input_info.res.width) + prev_vf_info = pipe->vf_yuv_ds_input_info; + else + prev_vf_info = *pipe_out_info; + + ia_css_frame_info_set_format(&prev_vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); + + err = ia_css_pipe_get_preview_binarydesc( + pipe, + &preview_descr, + &prev_in_info, + &prev_bds_out_info, + &prev_out_info, + &prev_vf_info); + if (err != IA_CSS_SUCCESS) + return err; + err = ia_css_binary_find(&preview_descr, + &mycs->preview_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + + if (need_vf_pp) { + struct ia_css_binary_descr vf_pp_descr; + + /* Viewfinder post-processing */ + ia_css_pipe_get_vfpp_binarydesc(pipe, &vf_pp_descr, + &mycs->preview_binary.out_frame_info[0], + pipe_out_info); + err = ia_css_binary_find(&vf_pp_descr, + &mycs->vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When the input system is 2401, only the Direct Sensor Mode + * Offline Preview uses the ISP copy binary. + */ + need_isp_copy_binary = !online && sensor; +#else +#ifndef ISP2401 + need_isp_copy_binary = !online && !continuous; +#else + /* About pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY: + * This is typical the case with SkyCam (which has no input system) but it also applies to all cases + * where the driver chooses for memory based input frames. In these cases, a copy binary (which typical + * copies sensor data to DDR) does not have much use. + */ + need_isp_copy_binary = !online && !continuous && !(pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY); +#endif +#endif + + /* Copy */ + if (need_isp_copy_binary) { + err = load_copy_binary(pipe, + &mycs->copy_binary, + &mycs->preview_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + + if (pipe->shading_table) { + ia_css_shading_table_free(pipe->shading_table); + pipe->shading_table = NULL; + } + + return IA_CSS_SUCCESS; +} + +static void +ia_css_binary_unload(struct ia_css_binary *binary) +{ + ia_css_binary_destroy_isp_parameters(binary); +} + +static enum ia_css_err +unload_preview_binaries(struct ia_css_pipe *pipe) +{ + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + + if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.preview.copy_binary); + ia_css_binary_unload(&pipe->pipe_settings.preview.preview_binary); + ia_css_binary_unload(&pipe->pipe_settings.preview.vf_pp_binary); + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +static const struct ia_css_fw_info *last_output_firmware( + const struct ia_css_fw_info *fw) +{ + const struct ia_css_fw_info *last_fw = NULL; +/* fw can be NULL */ + IA_CSS_ENTER_LEAVE_PRIVATE(""); + + for (; fw; fw = fw->next) { + const struct ia_css_fw_info *info = fw; + if (info->info.isp.sp.enable.output) + last_fw = fw; + } + return last_fw; +} + +static enum ia_css_err add_firmwares( + struct ia_css_pipeline *me, + struct ia_css_binary *binary, + const struct ia_css_fw_info *fw, + const struct ia_css_fw_info *last_fw, + unsigned int binary_mode, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_frame *vf_frame, + struct ia_css_pipeline_stage **my_stage, + struct ia_css_pipeline_stage **vf_stage) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage *extra_stage = NULL; + struct ia_css_pipeline_stage_desc stage_desc; + +/* all args can be NULL ??? */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "add_firmwares() enter:\n"); + + for (; fw; fw = fw->next) { + struct ia_css_frame *out[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; + struct ia_css_frame *in = NULL; + struct ia_css_frame *vf = NULL; + if ((fw == last_fw) && (fw->info.isp.sp.enable.out_frame != 0)) { + out[0] = out_frame; + } + if (fw->info.isp.sp.enable.in_frame != 0) { + in = in_frame; + } + if (fw->info.isp.sp.enable.out_frame != 0) { + vf = vf_frame; + } + ia_css_pipe_get_firmwares_stage_desc(&stage_desc, binary, + out, in, vf, fw, binary_mode); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + &extra_stage); + if (err != IA_CSS_SUCCESS) + return err; + if (fw->info.isp.sp.enable.output != 0) + in_frame = extra_stage->args.out_frame[0]; + if (my_stage && !*my_stage && extra_stage) + *my_stage = extra_stage; + if (vf_stage && !*vf_stage && extra_stage && + fw->info.isp.sp.enable.vf_veceven) + *vf_stage = extra_stage; + } + return err; +} + +static enum ia_css_err add_vf_pp_stage( + struct ia_css_pipe *pipe, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_binary *vf_pp_binary, + struct ia_css_pipeline_stage **vf_pp_stage) +{ + + struct ia_css_pipeline *me = NULL; + const struct ia_css_fw_info *last_fw = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_pipeline_stage_desc stage_desc; + +/* out_frame can be NULL ??? */ + + if (pipe == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + if (in_frame == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + if (vf_pp_binary == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + if (vf_pp_stage == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + ia_css_pipe_util_create_output_frames(out_frames); + me = &pipe->pipeline; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "add_vf_pp_stage() enter:\n"); + + *vf_pp_stage = NULL; + + last_fw = last_output_firmware(pipe->vf_stage); + if (!pipe->extra_config.disable_vf_pp) { + if (last_fw) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, vf_pp_binary, + out_frames, in_frame, NULL); + } else{ + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, vf_pp_binary, + out_frames, in_frame, NULL); + } + err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, vf_pp_stage); + if (err != IA_CSS_SUCCESS) + return err; + in_frame = (*vf_pp_stage)->args.out_frame[0]; + } + err = add_firmwares(me, vf_pp_binary, pipe->vf_stage, last_fw, + IA_CSS_BINARY_MODE_VF_PP, + in_frame, out_frame, NULL, + vf_pp_stage, NULL); + return err; +} + +static enum ia_css_err add_yuv_scaler_stage( + struct ia_css_pipe *pipe, + struct ia_css_pipeline *me, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_frame *internal_out_frame, + struct ia_css_binary *yuv_scaler_binary, + struct ia_css_pipeline_stage **pre_vf_pp_stage) +{ + const struct ia_css_fw_info *last_fw; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame *vf_frame = NULL; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_pipeline_stage_desc stage_desc; + + /* out_frame can be NULL ??? */ + assert(in_frame != NULL); + assert(pipe != NULL); + assert(me != NULL); + assert(yuv_scaler_binary != NULL); + assert(pre_vf_pp_stage != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "add_yuv_scaler_stage() enter:\n"); + + *pre_vf_pp_stage = NULL; + ia_css_pipe_util_create_output_frames(out_frames); + + last_fw = last_output_firmware(pipe->output_stage); + + if(last_fw) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, + yuv_scaler_binary, out_frames, in_frame, vf_frame); + } else { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_util_set_output_frames(out_frames, 1, internal_out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, + yuv_scaler_binary, out_frames, in_frame, vf_frame); + } + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + pre_vf_pp_stage); + if (err != IA_CSS_SUCCESS) + return err; + in_frame = (*pre_vf_pp_stage)->args.out_frame[0]; + + err = add_firmwares(me, yuv_scaler_binary, pipe->output_stage, last_fw, + IA_CSS_BINARY_MODE_CAPTURE_PP, + in_frame, out_frame, vf_frame, + NULL, pre_vf_pp_stage); + /* If a firmware produce vf_pp output, we set that as vf_pp input */ + (*pre_vf_pp_stage)->args.vf_downscale_log2 = yuv_scaler_binary->vf_downscale_log2; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "add_yuv_scaler_stage() leave:\n"); + return err; +} + +static enum ia_css_err add_capture_pp_stage( + struct ia_css_pipe *pipe, + struct ia_css_pipeline *me, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_binary *capture_pp_binary, + struct ia_css_pipeline_stage **capture_pp_stage) +{ + const struct ia_css_fw_info *last_fw = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame *vf_frame = NULL; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_pipeline_stage_desc stage_desc; + + /* out_frame can be NULL ??? */ + assert(in_frame != NULL); + assert(pipe != NULL); + assert(me != NULL); + assert(capture_pp_binary != NULL); + assert(capture_pp_stage != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "add_capture_pp_stage() enter:\n"); + + *capture_pp_stage = NULL; + ia_css_pipe_util_create_output_frames(out_frames); + + last_fw = last_output_firmware(pipe->output_stage); + err = ia_css_frame_allocate_from_info(&vf_frame, + &capture_pp_binary->vf_frame_info); + if (err != IA_CSS_SUCCESS) + return err; + if(last_fw) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, + capture_pp_binary, out_frames, NULL, vf_frame); + } else { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, + capture_pp_binary, out_frames, NULL, vf_frame); + } + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + capture_pp_stage); + if (err != IA_CSS_SUCCESS) + return err; + err = add_firmwares(me, capture_pp_binary, pipe->output_stage, last_fw, + IA_CSS_BINARY_MODE_CAPTURE_PP, + in_frame, out_frame, vf_frame, + NULL, capture_pp_stage); + /* If a firmware produce vf_pp output, we set that as vf_pp input */ + if (*capture_pp_stage) { + (*capture_pp_stage)->args.vf_downscale_log2 = + capture_pp_binary->vf_downscale_log2; + } + return err; +} + +static void sh_css_setup_queues(void) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_host_sp_queues_initialized; + + sh_css_hmm_buffer_record_init(); + + sh_css_event_init_irq_mask(); + + fw = &sh_css_sp_fw; + HIVE_ADDR_host_sp_queues_initialized = + fw->info.sp.host_sp_queues_initialized; + + ia_css_bufq_init(); + + /* set "host_sp_queues_initialized" to "true" */ + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(host_sp_queues_initialized), + (uint32_t)(1)); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_setup_queues() leave:\n"); +} + +static enum ia_css_err +init_vf_frameinfo_defaults(struct ia_css_pipe *pipe, + struct ia_css_frame *vf_frame, unsigned int idx) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + + assert(vf_frame != NULL); + + sh_css_pipe_get_viewfinder_frame_info(pipe, &vf_frame->info, idx); + vf_frame->contiguous = false; + vf_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME + idx, thread_id, &queue_id); + vf_frame->dynamic_queue_id = queue_id; + vf_frame->buf_type = IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME + idx; + + err = ia_css_frame_init_planes(vf_frame); + return err; +} + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +static unsigned int +get_crop_lines_for_bayer_order ( + const struct ia_css_stream_config *config) +{ + assert(config != NULL); + if ((IA_CSS_BAYER_ORDER_BGGR == config->input_config.bayer_order) + || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + return 1; + + return 0; +} + +static unsigned int +get_crop_columns_for_bayer_order ( + const struct ia_css_stream_config *config) +{ + assert(config != NULL); + if ((IA_CSS_BAYER_ORDER_RGGB == config->input_config.bayer_order) + || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + return 1; + + return 0; +} + +/* This function is to get the sum of all extra pixels in addition to the effective + * input, it includes dvs envelop and filter run-in */ +static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, + unsigned int *extra_row, unsigned int *extra_column) +{ + enum ia_css_pipe_id pipe_id = pipe->mode; + unsigned int left_cropping = 0, top_cropping = 0; + unsigned int i; + struct ia_css_resolution dvs_env = pipe->config.dvs_envelope; + + /* The dvs envelope info may not be correctly sent down via pipe config + * The check is made and the correct value is populated in the binary info + * Use this value when computing crop, else excess lines may get trimmed + */ + switch (pipe_id) { + case IA_CSS_PIPE_ID_PREVIEW: + if (pipe->pipe_settings.preview.preview_binary.info) { + left_cropping = pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.left_cropping; + top_cropping = pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.top_cropping; + } + dvs_env = pipe->pipe_settings.preview.preview_binary.dvs_envelope; + break; + case IA_CSS_PIPE_ID_VIDEO: + if (pipe->pipe_settings.video.video_binary.info) { + left_cropping = pipe->pipe_settings.video.video_binary.info->sp.pipeline.left_cropping; + top_cropping = pipe->pipe_settings.video.video_binary.info->sp.pipeline.top_cropping; + } + dvs_env = pipe->pipe_settings.video.video_binary.dvs_envelope; + break; + case IA_CSS_PIPE_ID_CAPTURE: + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info) { + left_cropping += pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.left_cropping; + top_cropping += pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.top_cropping; + } + dvs_env.width += pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.width; + dvs_env.height += pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.height; + } + break; + default: + break; + } + + *extra_row = top_cropping + dvs_env.height; + *extra_column = left_cropping + dvs_env.width; +} + +void +ia_css_get_crop_offsets ( + struct ia_css_pipe *pipe, + struct ia_css_frame_info *in_frame) +{ + unsigned int row = 0; + unsigned int column = 0; + struct ia_css_resolution *input_res; + struct ia_css_resolution *effective_res; + unsigned int extra_row = 0, extra_col = 0; + unsigned int min_reqd_height, min_reqd_width; + + assert(pipe != NULL); + assert(pipe->stream != NULL); + assert(in_frame != NULL); + + IA_CSS_ENTER_PRIVATE("pipe = %p effective_wd = %u effective_ht = %u", + pipe, pipe->config.input_effective_res.width, + pipe->config.input_effective_res.height); + + input_res = &pipe->stream->config.input_config.input_res; +#ifndef ISP2401 + effective_res = &pipe->stream->config.input_config.effective_res; +#else + effective_res = &pipe->config.input_effective_res; +#endif + + get_pipe_extra_pixel(pipe, &extra_row, &extra_col); + + in_frame->raw_bayer_order = pipe->stream->config.input_config.bayer_order; + + min_reqd_height = effective_res->height + extra_row; + min_reqd_width = effective_res->width + extra_col; + + if (input_res->height > min_reqd_height) { + row = (input_res->height - min_reqd_height) / 2; + row &= ~0x1; + } + if (input_res->width > min_reqd_width) { + column = (input_res->width - min_reqd_width) / 2; + column &= ~0x1; + } + + /* + * TODO: + * 1. Require the special support for RAW10 packed mode. + * 2. Require the special support for the online use cases. + */ + + /* ISP expects GRBG bayer order, we skip one line and/or one row + * to correct in case the input bayer order is different. + */ + column += get_crop_columns_for_bayer_order(&pipe->stream->config); + row += get_crop_lines_for_bayer_order(&pipe->stream->config); + + in_frame->crop_info.start_column = column; + in_frame->crop_info.start_line = row; + + IA_CSS_LEAVE_PRIVATE("void start_col: %u start_row: %u", column, row); + + return; +} +#endif + +static enum ia_css_err +init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, + struct ia_css_frame *frame, enum ia_css_frame_format format) +{ + struct ia_css_frame *in_frame; + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + + assert(frame != NULL); + in_frame = frame; + + in_frame->info.format = format; + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + if (format == IA_CSS_FRAME_FORMAT_RAW) + in_frame->info.format = (pipe->stream->config.pack_raw_pixels) ? + IA_CSS_FRAME_FORMAT_RAW_PACKED : IA_CSS_FRAME_FORMAT_RAW; +#endif + + + in_frame->info.res.width = pipe->stream->config.input_config.input_res.width; + in_frame->info.res.height = pipe->stream->config.input_config.input_res.height; + in_frame->info.raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); + ia_css_frame_info_set_width(&in_frame->info, pipe->stream->config.input_config.input_res.width, 0); + in_frame->contiguous = false; + in_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_INPUT_FRAME, thread_id, &queue_id); + in_frame->dynamic_queue_id = queue_id; + in_frame->buf_type = IA_CSS_BUFFER_TYPE_INPUT_FRAME; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + ia_css_get_crop_offsets(pipe, &in_frame->info); +#endif + err = ia_css_frame_init_planes(in_frame); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "init_in_frameinfo_memory_defaults() bayer_order = %d:\n", in_frame->info.raw_bayer_order); + + return err; +} + +static enum ia_css_err +init_out_frameinfo_defaults(struct ia_css_pipe *pipe, + struct ia_css_frame *out_frame, unsigned int idx) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + + assert(out_frame != NULL); + + sh_css_pipe_get_output_frame_info(pipe, &out_frame->info, idx); + out_frame->contiguous = false; + out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx, thread_id, &queue_id); + out_frame->dynamic_queue_id = queue_id; + out_frame->buf_type = IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx; + err = ia_css_frame_init_planes(out_frame); + + return err; +} + +/* Create stages for video pipe */ +static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline_stage_desc stage_desc; + struct ia_css_binary *copy_binary, *video_binary, + *yuv_scaler_binary, *vf_pp_binary; + struct ia_css_pipeline_stage *copy_stage = NULL; + struct ia_css_pipeline_stage *video_stage = NULL; + struct ia_css_pipeline_stage *yuv_scaler_stage = NULL; + struct ia_css_pipeline_stage *vf_pp_stage = NULL; + struct ia_css_pipeline *me; + struct ia_css_frame *in_frame = NULL; + struct ia_css_frame *out_frame; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + bool need_copy = false; + bool need_vf_pp = false; + bool need_yuv_pp = false; + unsigned num_output_pins; + bool need_in_frameinfo_memory = false; + + unsigned int i, num_yuv_scaler; + bool *is_output_stage = NULL; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_pipe_util_create_output_frames(out_frames); + out_frame = &pipe->out_frame_struct; + + /* pipeline already created as part of create_host_pipeline_structure */ + me = &pipe->pipeline; + ia_css_pipeline_clean(me); + + me->dvs_frame_delay = pipe->dvs_frame_delay; + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: online or continuous + */ + need_in_frameinfo_memory = !(pipe->stream->config.online || pipe->stream->config.continuous); +#else + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; +#endif + + /* Construct in_frame info (only in case we have dynamic input */ + if (need_in_frameinfo_memory) { + in_frame = &pipe->in_frame_struct; + err = init_in_frameinfo_memory_defaults(pipe, in_frame, IA_CSS_FRAME_FORMAT_RAW); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + out_frame->data = 0; + err = init_out_frameinfo_defaults(pipe, out_frame, 0); + if (err != IA_CSS_SUCCESS) + goto ERR; + + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { + vf_frame = &pipe->vf_frame_struct; + vf_frame->data = 0; + err = init_vf_frameinfo_defaults(pipe, vf_frame, 0); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + copy_binary = &pipe->pipe_settings.video.copy_binary; + video_binary = &pipe->pipe_settings.video.video_binary; + vf_pp_binary = &pipe->pipe_settings.video.vf_pp_binary; + num_output_pins = video_binary->info->num_output_pins; + + yuv_scaler_binary = pipe->pipe_settings.video.yuv_scaler_binary; + num_yuv_scaler = pipe->pipe_settings.video.num_yuv_scaler; + is_output_stage = pipe->pipe_settings.video.is_output_stage; + + need_copy = (copy_binary != NULL && copy_binary->info != NULL); + need_vf_pp = (vf_pp_binary != NULL && vf_pp_binary->info != NULL); + need_yuv_pp = (yuv_scaler_binary != NULL && yuv_scaler_binary->info != NULL); + + if (need_copy) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, NULL, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ©_stage); + if (err != IA_CSS_SUCCESS) + goto ERR; + in_frame = me->stages->args.out_frame[0]; + } else if (pipe->stream->config.continuous) { +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When continuous is enabled, configure in_frame with the + * last pipe, which is the copy pipe. + */ + in_frame = pipe->stream->last_pipe->continuous_frames[0]; +#else + in_frame = pipe->continuous_frames[0]; +#endif + } + + ia_css_pipe_util_set_output_frames(out_frames, 0, need_yuv_pp ? NULL : out_frame); + + /* when the video binary supports a second output pin, + it can directly produce the vf_frame. */ + if(need_vf_pp) { + ia_css_pipe_get_generic_stage_desc(&stage_desc, video_binary, + out_frames, in_frame, NULL); + } else { + ia_css_pipe_get_generic_stage_desc(&stage_desc, video_binary, + out_frames, in_frame, vf_frame); + } + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + &video_stage); + if (err != IA_CSS_SUCCESS) + goto ERR; + + /* If we use copy iso video, the input must be yuv iso raw */ + if(video_stage) { + video_stage->args.copy_vf = + video_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; + video_stage->args.copy_output = video_stage->args.copy_vf; + } + + /* when the video binary supports only 1 output pin, vf_pp is needed to + produce the vf_frame.*/ + if (need_vf_pp && video_stage) { + in_frame = video_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary, + &vf_pp_stage); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + if (video_stage) { + int frm; +#ifndef ISP2401 + for (frm = 0; frm < NUM_VIDEO_TNR_FRAMES; frm++) { +#else + for (frm = 0; frm < NUM_TNR_FRAMES; frm++) { +#endif + video_stage->args.tnr_frames[frm] = + pipe->pipe_settings.video.tnr_frames[frm]; + } + for (frm = 0; frm < MAX_NUM_VIDEO_DELAY_FRAMES; frm++) { + video_stage->args.delay_frames[frm] = + pipe->pipe_settings.video.delay_frames[frm]; + } + } + + /* Append Extension on Video out, if enabled */ + if (!need_vf_pp && video_stage && pipe->config.acc_extension && + (pipe->config.acc_extension->info.isp.type == IA_CSS_ACC_OUTPUT)) + { + struct ia_css_frame *out = NULL; + struct ia_css_frame *in = NULL; + + if ((pipe->config.acc_extension->info.isp.sp.enable.output) && + (pipe->config.acc_extension->info.isp.sp.enable.in_frame) && + (pipe->config.acc_extension->info.isp.sp.enable.out_frame)) { + + /* In/Out Frame mapping to support output frame extension.*/ + out = video_stage->args.out_frame[0]; + err = ia_css_frame_allocate_from_info(&in, &(pipe->output_info[0])); + if (err != IA_CSS_SUCCESS) + goto ERR; + video_stage->args.out_frame[0] = in; + } + + err = add_firmwares( me, video_binary, pipe->output_stage, + last_output_firmware(pipe->output_stage), + IA_CSS_BINARY_MODE_VIDEO, + in, out, NULL, &video_stage, NULL); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + if (need_yuv_pp && video_stage) { + struct ia_css_frame *tmp_in_frame = video_stage->args.out_frame[0]; + struct ia_css_frame *tmp_out_frame = NULL; + + for (i = 0; i < num_yuv_scaler; i++) { + if (is_output_stage[i] == true) { + tmp_out_frame = out_frame; + } else { + tmp_out_frame = NULL; + } + err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, + NULL, + &yuv_scaler_binary[i], + &yuv_scaler_stage); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* we use output port 1 as internal output port */ + if (yuv_scaler_stage) + tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; + } + } + + pipe->pipeline.acquire_isp_each_stage = false; + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +create_host_acc_pipeline(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + const struct ia_css_fw_info *fw; + unsigned int i; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((pipe == NULL) || (pipe->stream == NULL)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe->pipeline.num_execs = pipe->config.acc_num_execs; + /* Reset pipe_qos_config to default disable all QOS extension stages */ + if (pipe->config.acc_extension) + pipe->pipeline.pipe_qos_config = 0; + + fw = pipe->vf_stage; + for (i = 0; fw; fw = fw->next){ + err = sh_css_pipeline_add_acc_stage(&pipe->pipeline, fw); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + for (i=0; iconfig.num_acc_stages; i++) { + struct ia_css_fw_info *fw = pipe->config.acc_stages[i]; + err = sh_css_pipeline_add_acc_stage(&pipe->pipeline, fw); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +/* Create stages for preview */ +static enum ia_css_err +create_host_preview_pipeline(struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline_stage *copy_stage = NULL; + struct ia_css_pipeline_stage *preview_stage = NULL; + struct ia_css_pipeline_stage *vf_pp_stage = NULL; + struct ia_css_pipeline_stage_desc stage_desc; + struct ia_css_pipeline *me = NULL; + struct ia_css_binary *copy_binary, *preview_binary, *vf_pp_binary = NULL; + struct ia_css_frame *in_frame = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame *out_frame; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + bool need_in_frameinfo_memory = false; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + bool sensor = false; + bool buffered_sensor = false; + bool online = false; + bool continuous = false; +#endif + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + + ia_css_pipe_util_create_output_frames(out_frames); + /* pipeline already created as part of create_host_pipeline_structure */ + me = &pipe->pipeline; + ia_css_pipeline_clean(me); + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Preview + * - Buffered Sensor Mode Online Preview + * - Direct Sensor Mode Continuous Preview + * - Buffered Sensor Mode Continuous Preview + */ + sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); + buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; + need_in_frameinfo_memory = + !((sensor && (online || continuous)) || (buffered_sensor && (online || continuous))); +#else + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; +#endif + if (need_in_frameinfo_memory) { + err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, IA_CSS_FRAME_FORMAT_RAW); + if (err != IA_CSS_SUCCESS) + goto ERR; + + in_frame = &me->in_frame; + } else { + in_frame = NULL; + } + + err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0); + if (err != IA_CSS_SUCCESS) + goto ERR; + out_frame = &me->out_frame[0]; + + copy_binary = &pipe->pipe_settings.preview.copy_binary; + preview_binary = &pipe->pipe_settings.preview.preview_binary; + if (pipe->pipe_settings.preview.vf_pp_binary.info) + vf_pp_binary = &pipe->pipe_settings.preview.vf_pp_binary; + + if (pipe->pipe_settings.preview.copy_binary.info) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, NULL, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ©_stage); + if (err != IA_CSS_SUCCESS) + goto ERR; + in_frame = me->stages->args.out_frame[0]; +#ifndef ISP2401 + } else { +#else + } else if (pipe->stream->config.continuous) { +#endif +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When continuous is enabled, configure in_frame with the + * last pipe, which is the copy pipe. + */ + if (continuous || !online){ + in_frame = pipe->stream->last_pipe->continuous_frames[0]; + } +#else + in_frame = pipe->continuous_frames[0]; +#endif + } + + if (vf_pp_binary) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, preview_binary, + out_frames, in_frame, NULL); + } else { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, preview_binary, + out_frames, in_frame, NULL); + } + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + &preview_stage); + if (err != IA_CSS_SUCCESS) + goto ERR; + /* If we use copy iso preview, the input must be yuv iso raw */ + preview_stage->args.copy_vf = + preview_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; + preview_stage->args.copy_output = !preview_stage->args.copy_vf; + if (preview_stage->args.copy_vf && !preview_stage->args.out_vf_frame) { + /* in case of copy, use the vf frame as output frame */ + preview_stage->args.out_vf_frame = + preview_stage->args.out_frame[0]; + } + if (vf_pp_binary) { + if (preview_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY) + in_frame = preview_stage->args.out_vf_frame; + else + in_frame = preview_stage->args.out_frame[0]; + err = add_vf_pp_stage(pipe, in_frame, out_frame, vf_pp_binary, + &vf_pp_stage); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + + pipe->pipeline.acquire_isp_each_stage = false; + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static void send_raw_frames(struct ia_css_pipe *pipe) +{ + if (pipe->stream->config.continuous) { + unsigned int i; + + sh_css_update_host2sp_cont_num_raw_frames + (pipe->stream->config.init_num_cont_raw_buf, true); + sh_css_update_host2sp_cont_num_raw_frames + (pipe->stream->config.target_num_cont_raw_buf, false); + + /* Hand-over all the SP-internal buffers */ + for (i = 0; i < pipe->stream->config.init_num_cont_raw_buf; i++) { + sh_css_update_host2sp_offline_frame(i, + pipe->continuous_frames[i], pipe->cont_md_buffers[i]); + } + } + + return; +} + +static enum ia_css_err +preview_start(struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline *me ; + struct ia_css_binary *copy_binary, *preview_binary, *vf_pp_binary = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipe *copy_pipe, *capture_pipe; + struct ia_css_pipe *acc_pipe; + enum sh_css_pipe_config_override copy_ovrd; + enum ia_css_input_mode preview_pipe_input_mode; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + me = &pipe->pipeline; + + preview_pipe_input_mode = pipe->stream->config.mode; + + copy_pipe = pipe->pipe_settings.preview.copy_pipe; + capture_pipe = pipe->pipe_settings.preview.capture_pipe; + acc_pipe = pipe->pipe_settings.preview.acc_pipe; + + copy_binary = &pipe->pipe_settings.preview.copy_binary; + preview_binary = &pipe->pipe_settings.preview.preview_binary; + if (pipe->pipe_settings.preview.vf_pp_binary.info) + vf_pp_binary = &pipe->pipe_settings.preview.vf_pp_binary; + + sh_css_metrics_start_frame(); + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + /* multi stream video needs mipi buffers */ + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; +#endif + send_raw_frames(pipe); + + { + unsigned int thread_id; + + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + + if (pipe->stream->cont_capt) { + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), &thread_id); + copy_ovrd |= 1 << thread_id; + } + } + + /* Construct and load the copy pipe */ + if (pipe->stream->config.continuous) { + sh_css_sp_init_pipeline(©_pipe->pipeline, + IA_CSS_PIPE_ID_COPY, + (uint8_t)ia_css_pipe_get_pipe_num(copy_pipe), + false, + pipe->stream->config.pixels_per_clock == 2, false, + false, pipe->required_bds_factor, + copy_ovrd, + pipe->stream->config.mode, + &pipe->stream->config.metadata_config, +#ifndef ISP2401 + &pipe->stream->info.metadata_info +#else + &pipe->stream->info.metadata_info, +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#ifndef ISP2401 + , pipe->stream->config.source.port.port +#else + pipe->stream->config.source.port.port, +#endif +#endif +#ifndef ISP2401 + ); +#else + &pipe->config.internal_frame_origin_bqs_on_sctbl, + pipe->stream->isp_params_configs); +#endif + + /* make the preview pipe start with mem mode input, copy handles + the actual mode */ + preview_pipe_input_mode = IA_CSS_INPUT_MODE_MEMORY; + } + + /* Construct and load the capture pipe */ + if (pipe->stream->cont_capt) { + sh_css_sp_init_pipeline(&capture_pipe->pipeline, + IA_CSS_PIPE_ID_CAPTURE, + (uint8_t)ia_css_pipe_get_pipe_num(capture_pipe), + capture_pipe->config.default_capture_config.enable_xnr != 0, + capture_pipe->stream->config.pixels_per_clock == 2, + true, /* continuous */ + false, /* offline */ + capture_pipe->required_bds_factor, + 0, + IA_CSS_INPUT_MODE_MEMORY, + &pipe->stream->config.metadata_config, +#ifndef ISP2401 + &pipe->stream->info.metadata_info +#else + &pipe->stream->info.metadata_info, +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#ifndef ISP2401 + , (enum mipi_port_id)0 +#else + (enum mipi_port_id)0, +#endif +#endif +#ifndef ISP2401 + ); +#else + &capture_pipe->config.internal_frame_origin_bqs_on_sctbl, + capture_pipe->stream->isp_params_configs); +#endif + } + + if (acc_pipe) { + sh_css_sp_init_pipeline(&acc_pipe->pipeline, + IA_CSS_PIPE_ID_ACC, + (uint8_t) ia_css_pipe_get_pipe_num(acc_pipe), + false, + pipe->stream->config.pixels_per_clock == 2, + false, /* continuous */ + false, /* offline */ + pipe->required_bds_factor, + 0, + IA_CSS_INPUT_MODE_MEMORY, + NULL, +#ifndef ISP2401 + NULL +#else + NULL, +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#ifndef ISP2401 + , (enum mipi_port_id) 0 +#else + (enum mipi_port_id) 0, +#endif +#endif +#ifndef ISP2401 + ); +#else + &pipe->config.internal_frame_origin_bqs_on_sctbl, + pipe->stream->isp_params_configs); +#endif + } + + start_pipe(pipe, copy_ovrd, preview_pipe_input_mode); + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +ERR: +#endif + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +enum ia_css_err +ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, + const struct ia_css_buffer *buffer) +{ + enum ia_css_err return_err = IA_CSS_SUCCESS; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + struct ia_css_pipeline *pipeline; + struct ia_css_pipeline_stage *stage; + struct ia_css_rmgr_vbuf_handle p_vbuf; + struct ia_css_rmgr_vbuf_handle *h_vbuf; + struct sh_css_hmm_buffer ddr_buffer; + enum ia_css_buffer_type buf_type; + enum ia_css_pipe_id pipe_id; + bool ret_err; + + IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer); + + if ((pipe == NULL) || (buffer == NULL)) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + buf_type = buffer->type; + /* following code will be enabled when IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME + is removed */ +#if 0 + if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { + bool found_pipe = false; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if ((buffer->data.frame->info.res.width == pipe->output_info[i].res.width) && + (buffer->data.frame->info.res.height == pipe->output_info[i].res.height)) { + buf_type += i; + found_pipe = true; + break; + } + } + if (!found_pipe) + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + if (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) { + bool found_pipe = false; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if ((buffer->data.frame->info.res.width == pipe->vf_output_info[i].res.width) && + (buffer->data.frame->info.res.height == pipe->vf_output_info[i].res.height)) { + buf_type += i; + found_pipe = true; + break; + } + } + if (!found_pipe) + return IA_CSS_ERR_INVALID_ARGUMENTS; + } +#endif + pipe_id = pipe->mode; + + IA_CSS_LOG("pipe_id=%d, buf_type=%d", pipe_id, buf_type); + + + assert(pipe_id < IA_CSS_PIPE_ID_NUM); + assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); + if ((buf_type == IA_CSS_BUFFER_TYPE_INVALID) || + (buf_type >= IA_CSS_NUM_DYNAMIC_BUFFER_TYPE) || + (pipe_id >= IA_CSS_PIPE_ID_NUM)) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + ret_err = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + if (!ret_err) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + ret_err = ia_css_query_internal_queue_id(buf_type, thread_id, &queue_id); + if (!ret_err) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if ((queue_id <= SH_CSS_INVALID_QUEUE_ID) || (queue_id >= SH_CSS_MAX_NUM_QUEUES)) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if (!sh_css_sp_is_running()) { + IA_CSS_LOG("SP is not running!"); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + /* SP is not running. The queues are not valid */ + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + + pipeline = &pipe->pipeline; + + assert(pipeline != NULL || + pipe_id == IA_CSS_PIPE_ID_COPY || + pipe_id == IA_CSS_PIPE_ID_ACC); + + assert(sizeof(NULL) <= sizeof(ddr_buffer.kernel_ptr)); + ddr_buffer.kernel_ptr = HOST_ADDRESS(NULL); + ddr_buffer.cookie_ptr = buffer->driver_cookie; + ddr_buffer.timing_data = buffer->timing_data; + + if (buf_type == IA_CSS_BUFFER_TYPE_3A_STATISTICS) { + if (buffer->data.stats_3a == NULL) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.stats_3a); + ddr_buffer.payload.s3a = *buffer->data.stats_3a; + } else if (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) { + if (buffer->data.stats_dvs == NULL) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.stats_dvs); + ddr_buffer.payload.dis = *buffer->data.stats_dvs; + } else if (buf_type == IA_CSS_BUFFER_TYPE_METADATA) { + if (buffer->data.metadata == NULL) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.metadata); + ddr_buffer.payload.metadata = *buffer->data.metadata; + } else if ((buf_type == IA_CSS_BUFFER_TYPE_INPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME)) { + if (buffer->data.frame == NULL) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.frame); + ddr_buffer.payload.frame.frame_data = buffer->data.frame->data; + ddr_buffer.payload.frame.flashed = 0; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipe_enqueue_buffer() buf_type=%d, data(DDR address)=0x%x\n", + buf_type, buffer->data.frame->data); + + +#if CONFIG_ON_FRAME_ENQUEUE() + return_err = set_config_on_frame_enqueue( + &buffer->data.frame->info, + &ddr_buffer.payload.frame); + if (IA_CSS_SUCCESS != return_err) { + IA_CSS_LEAVE_ERR(return_err); + return return_err; + } +#endif + } + + /* start of test for using rmgr for acq/rel memory */ + p_vbuf.vptr = 0; + p_vbuf.count = 0; + p_vbuf.size = sizeof(struct sh_css_hmm_buffer); + h_vbuf = &p_vbuf; + /* TODO: change next to correct pool for optimization */ + ia_css_rmgr_acq_vbuf(hmm_buffer_pool, &h_vbuf); + + assert(h_vbuf != NULL); + assert(h_vbuf->vptr != 0x0); + + if ((h_vbuf == NULL) || (h_vbuf->vptr == 0x0)) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + mmgr_store(h_vbuf->vptr, + (void *)(&ddr_buffer), + sizeof(struct sh_css_hmm_buffer)); + if ((buf_type == IA_CSS_BUFFER_TYPE_3A_STATISTICS) + || (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) + || (buf_type == IA_CSS_BUFFER_TYPE_LACE_STATISTICS)) { + if (pipeline == NULL) { + ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &h_vbuf); + IA_CSS_LOG("pipeline is empty!"); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + for (stage = pipeline->stages; stage; stage = stage->next) { + /* The SP will read the params + after it got empty 3a and dis */ + if (STATS_ENABLED(stage)) { + /* there is a stage that needs it */ + return_err = ia_css_bufq_enqueue_buffer(thread_id, + queue_id, + (uint32_t)h_vbuf->vptr); + } + } + } else if ((buf_type == IA_CSS_BUFFER_TYPE_INPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_METADATA)) { + + return_err = ia_css_bufq_enqueue_buffer(thread_id, + queue_id, + (uint32_t)h_vbuf->vptr); +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + if ((return_err == IA_CSS_SUCCESS) && (IA_CSS_BUFFER_TYPE_OUTPUT_FRAME == buf_type)) { + IA_CSS_LOG("pfp: enqueued OF %d to q %d thread %d", + ddr_buffer.payload.frame.frame_data, + queue_id, thread_id); + } +#endif + + } + + if (return_err == IA_CSS_SUCCESS) { + if (sh_css_hmm_buffer_record_acquire( + h_vbuf, buf_type, + HOST_ADDRESS(ddr_buffer.kernel_ptr))) { + IA_CSS_LOG("send vbuf=%p", h_vbuf); + } else { + return_err = IA_CSS_ERR_INTERNAL_ERROR; + IA_CSS_ERROR("hmm_buffer_record[]: no available slots\n"); + } + } + + /* + * Tell the SP which queues are not empty, + * by sending the software event. + */ + if (return_err == IA_CSS_SUCCESS) { + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + IA_CSS_LOG("SP is not running!"); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + return_err = ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, + (uint8_t)thread_id, + queue_id, + 0); + } else { + ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &h_vbuf); + IA_CSS_ERROR("buffer not enqueued"); + } + + IA_CSS_LEAVE("return value = %d", return_err); + + return return_err; +} + +/* + * TODO: Free up the hmm memory space. + */ +enum ia_css_err +ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, + struct ia_css_buffer *buffer) +{ + enum ia_css_err return_err; + enum sh_css_queue_id queue_id; + hrt_vaddress ddr_buffer_addr = (hrt_vaddress)0; + struct sh_css_hmm_buffer ddr_buffer; + enum ia_css_buffer_type buf_type; + enum ia_css_pipe_id pipe_id; + unsigned int thread_id; + hrt_address kernel_ptr = 0; + bool ret_err; + + IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer); + + if ((pipe == NULL) || (buffer == NULL)) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe_id = pipe->mode; + + buf_type = buffer->type; + + IA_CSS_LOG("pipe_id=%d, buf_type=%d", pipe_id, buf_type); + + ddr_buffer.kernel_ptr = 0; + + ret_err = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + if (!ret_err) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + ret_err = ia_css_query_internal_queue_id(buf_type, thread_id, &queue_id); + if (!ret_err) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if ((queue_id <= SH_CSS_INVALID_QUEUE_ID) || (queue_id >= SH_CSS_MAX_NUM_QUEUES)) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if (!sh_css_sp_is_running()) { + IA_CSS_LOG("SP is not running!"); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + /* SP is not running. The queues are not valid */ + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + return_err = ia_css_bufq_dequeue_buffer(queue_id, + (uint32_t *)&ddr_buffer_addr); + + if (return_err == IA_CSS_SUCCESS) { + struct ia_css_frame *frame; + struct sh_css_hmm_buffer_record *hmm_buffer_record = NULL; + + IA_CSS_LOG("receive vbuf=%x", (int)ddr_buffer_addr); + + /* Validate the ddr_buffer_addr and buf_type */ + hmm_buffer_record = sh_css_hmm_buffer_record_validate( + ddr_buffer_addr, buf_type); + if (hmm_buffer_record != NULL) { + /* valid hmm_buffer_record found. Save the kernel_ptr + * for validation after performing mmgr_load. The + * vbuf handle and buffer_record can be released. + */ + kernel_ptr = hmm_buffer_record->kernel_ptr; + ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &hmm_buffer_record->h_vbuf); + sh_css_hmm_buffer_record_reset(hmm_buffer_record); + } else { + IA_CSS_ERROR("hmm_buffer_record not found (0x%x) buf_type(%d)", + ddr_buffer_addr, buf_type); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + mmgr_load(ddr_buffer_addr, + &ddr_buffer, + sizeof(struct sh_css_hmm_buffer)); + + /* if the kernel_ptr is 0 or an invalid, return an error. + * do not access the buffer via the kernal_ptr. + */ + if ((ddr_buffer.kernel_ptr == 0) || + (kernel_ptr != HOST_ADDRESS(ddr_buffer.kernel_ptr))) { + IA_CSS_ERROR("kernel_ptr invalid"); + IA_CSS_ERROR("expected: (0x%llx)", (u64)kernel_ptr); + IA_CSS_ERROR("actual: (0x%llx)", (u64)HOST_ADDRESS(ddr_buffer.kernel_ptr)); + IA_CSS_ERROR("buf_type: %d\n", buf_type); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + if (ddr_buffer.kernel_ptr != 0) { + /* buffer->exp_id : all instances to be removed later once the driver change + * is completed. See patch #5758 for reference */ + buffer->exp_id = 0; + buffer->driver_cookie = ddr_buffer.cookie_ptr; + buffer->timing_data = ddr_buffer.timing_data; + + if ((buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) || + (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME)) { + buffer->isys_eof_clock_tick.ticks = ddr_buffer.isys_eof_clock_tick; + } + + switch (buf_type) { + case IA_CSS_BUFFER_TYPE_INPUT_FRAME: + case IA_CSS_BUFFER_TYPE_OUTPUT_FRAME: + case IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: + if ((pipe) && (pipe->stop_requested == true)) + { + +#if defined(USE_INPUT_SYSTEM_VERSION_2) + /* free mipi frames only for old input system + * for 2401 it is done in ia_css_stream_destroy call + */ + return_err = free_mipi_frames(pipe); + if (return_err != IA_CSS_SUCCESS) { + IA_CSS_LOG("free_mipi_frames() failed"); + IA_CSS_LEAVE_ERR(return_err); + return return_err; + } +#endif + pipe->stop_requested = false; + } + case IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME: + case IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME: + frame = (struct ia_css_frame*)HOST_ADDRESS(ddr_buffer.kernel_ptr); + buffer->data.frame = frame; + buffer->exp_id = ddr_buffer.payload.frame.exp_id; + frame->exp_id = ddr_buffer.payload.frame.exp_id; + frame->isp_config_id = ddr_buffer.payload.frame.isp_parameters_id; + if (ddr_buffer.payload.frame.flashed == 1) + frame->flash_state = + IA_CSS_FRAME_FLASH_STATE_PARTIAL; + if (ddr_buffer.payload.frame.flashed == 2) + frame->flash_state = + IA_CSS_FRAME_FLASH_STATE_FULL; + frame->valid = pipe->num_invalid_frames == 0; + if (!frame->valid) + pipe->num_invalid_frames--; + + if (frame->info.format == IA_CSS_FRAME_FORMAT_BINARY_8) { +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + frame->planes.binary.size = frame->data_bytes; +#else + frame->planes.binary.size = + sh_css_sp_get_binary_copy_size(); +#endif + } +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + if (IA_CSS_BUFFER_TYPE_OUTPUT_FRAME == buf_type) { + IA_CSS_LOG("pfp: dequeued OF %d with config id %d thread %d", + frame->data, frame->isp_config_id, thread_id); + } +#endif + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipe_dequeue_buffer() buf_type=%d, data(DDR address)=0x%x\n", + buf_type, buffer->data.frame->data); + + break; + case IA_CSS_BUFFER_TYPE_3A_STATISTICS: + buffer->data.stats_3a = + (struct ia_css_isp_3a_statistics*)HOST_ADDRESS(ddr_buffer.kernel_ptr); + buffer->exp_id = ddr_buffer.payload.s3a.exp_id; + buffer->data.stats_3a->exp_id = ddr_buffer.payload.s3a.exp_id; + buffer->data.stats_3a->isp_config_id = ddr_buffer.payload.s3a.isp_config_id; + break; + case IA_CSS_BUFFER_TYPE_DIS_STATISTICS: + buffer->data.stats_dvs = + (struct ia_css_isp_dvs_statistics*) + HOST_ADDRESS(ddr_buffer.kernel_ptr); + buffer->exp_id = ddr_buffer.payload.dis.exp_id; + buffer->data.stats_dvs->exp_id = ddr_buffer.payload.dis.exp_id; + break; + case IA_CSS_BUFFER_TYPE_LACE_STATISTICS: + break; + case IA_CSS_BUFFER_TYPE_METADATA: + buffer->data.metadata = + (struct ia_css_metadata*)HOST_ADDRESS(ddr_buffer.kernel_ptr); + buffer->exp_id = ddr_buffer.payload.metadata.exp_id; + buffer->data.metadata->exp_id = ddr_buffer.payload.metadata.exp_id; + break; + default: + return_err = IA_CSS_ERR_INTERNAL_ERROR; + break; + } + } + } + + /* + * Tell the SP which queues are not full, + * by sending the software event. + */ + if (return_err == IA_CSS_SUCCESS){ + if (!sh_css_sp_is_running()) { + IA_CSS_LOG("SP is not running!"); + IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + /* SP is not running. The queues are not valid */ + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, + 0, + queue_id, + 0); + } + IA_CSS_LEAVE("buffer=%p", buffer); + + return return_err; +} + +/* + * Cannot Move this to event module as it is of ia_css_event_type which is declared in ia_css.h + * TODO: modify and move it if possible. + * + * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC: + * 1) "enum ia_css_event_type" (ia_css_event_public.h) + * 2) "enum sh_css_sp_event_type" (sh_css_internal.h) + * 3) "enum ia_css_event_type event_id_2_event_mask" (event_handler.sp.c) + * 4) "enum ia_css_event_type convert_event_sp_to_host_domain" (sh_css.c) + */ +static enum ia_css_event_type convert_event_sp_to_host_domain[] = { + IA_CSS_EVENT_TYPE_OUTPUT_FRAME_DONE, /** Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_OUTPUT_FRAME_DONE, /** Second output frame ready. */ + IA_CSS_EVENT_TYPE_VF_OUTPUT_FRAME_DONE, /** Viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_SECOND_VF_OUTPUT_FRAME_DONE, /** Second viewfinder Output frame ready. */ + IA_CSS_EVENT_TYPE_3A_STATISTICS_DONE, /** Indication that 3A statistics are available. */ + IA_CSS_EVENT_TYPE_DIS_STATISTICS_DONE, /** Indication that DIS statistics are available. */ + IA_CSS_EVENT_TYPE_PIPELINE_DONE, /** Pipeline Done event, sent after last pipeline stage. */ + IA_CSS_EVENT_TYPE_FRAME_TAGGED, /** Frame tagged. */ + IA_CSS_EVENT_TYPE_INPUT_FRAME_DONE, /** Input frame ready. */ + IA_CSS_EVENT_TYPE_METADATA_DONE, /** Metadata ready. */ + IA_CSS_EVENT_TYPE_LACE_STATISTICS_DONE, /** Indication that LACE statistics are available. */ + IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE, /** Extension stage executed. */ + IA_CSS_EVENT_TYPE_TIMER, /** Timing measurement data. */ + IA_CSS_EVENT_TYPE_PORT_EOF, /** End Of Frame event, sent when in buffered sensor mode. */ + IA_CSS_EVENT_TYPE_FW_WARNING, /** Performance warning encountered by FW */ + IA_CSS_EVENT_TYPE_FW_ASSERT, /** Assertion hit by FW */ + 0, /* error if sp passes SH_CSS_SP_EVENT_NR_OF_TYPES as a valid event. */ +}; + +enum ia_css_err +ia_css_dequeue_event(struct ia_css_event *event) +{ + return ia_css_dequeue_psys_event(event); +} + +enum ia_css_err +ia_css_dequeue_psys_event(struct ia_css_event *event) +{ + enum ia_css_pipe_id pipe_id = 0; + uint8_t payload[4] = {0,0,0,0}; + enum ia_css_err ret_err; + + /*TODO: + * a) use generic decoding function , same as the one used by sp. + * b) group decode and dequeue into eventQueue module + * + * We skip the IA_CSS_ENTER logging call + * to avoid flooding the logs when the host application + * uses polling. */ + if (event == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + /* dequeue the event (if any) from the psys event queue */ + ret_err = ia_css_bufq_dequeue_psys_event(payload); + if (ret_err != IA_CSS_SUCCESS) + return ret_err; + + IA_CSS_LOG("event dequeued from psys event queue"); + + /* Tell the SP that we dequeued an event from the event queue. */ + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); + + /* Events are decoded into 4 bytes of payload, the first byte + * contains the sp event type. This is converted to a host enum. + * TODO: can this enum conversion be eliminated */ + event->type = convert_event_sp_to_host_domain[payload[0]]; + /* Some sane default values since not all events use all fields. */ + event->pipe = NULL; + event->port = MIPI_PORT0_ID; + event->exp_id = 0; + event->fw_warning = IA_CSS_FW_WARNING_NONE; + event->fw_handle = 0; + event->timer_data = 0; + event->timer_code = 0; + event->timer_subcode = 0; + + if (event->type == IA_CSS_EVENT_TYPE_TIMER) { + /* timer event ??? get the 2nd event and decode the data into the event struct */ + uint32_t tmp_data; + /* 1st event: LSB 16-bit timer data and code */ + event->timer_data = ((payload[1] & 0xFF) | ((payload[3] & 0xFF) << 8)); + event->timer_code = payload[2]; + payload[0] = payload[1] = payload[2] = payload[3] = 0; + ret_err = ia_css_bufq_dequeue_psys_event(payload); + if (ret_err != IA_CSS_SUCCESS) { + /* no 2nd event ??? an error */ + /* Putting IA_CSS_ERROR is resulting in failures in + * Merrifield smoke testing */ + IA_CSS_WARNING("Timer: Error de-queuing the 2nd TIMER event!!!\n"); + return ret_err; + } + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); + event->type = convert_event_sp_to_host_domain[payload[0]]; + /* It's a timer */ + if (event->type == IA_CSS_EVENT_TYPE_TIMER) { + /* 2nd event data: MSB 16-bit timer and subcode */ + tmp_data = ((payload[1] & 0xFF) | ((payload[3] & 0xFF) << 8)); + event->timer_data |= (tmp_data << 16); + event->timer_subcode = payload[2]; + } + /* It's a non timer event. So clear first half of the timer event data. + * If the second part of the TIMER event is not received, we discard + * the first half of the timer data and process the non timer event without + * affecting the flow. So the non timer event falls through + * the code. */ + else { + event->timer_data = 0; + event->timer_code = 0; + event->timer_subcode = 0; + IA_CSS_ERROR("Missing 2nd timer event. Timer event discarded"); + } + } + if (event->type == IA_CSS_EVENT_TYPE_PORT_EOF) { + event->port = (enum mipi_port_id)payload[1]; + event->exp_id = payload[3]; + } else if (event->type == IA_CSS_EVENT_TYPE_FW_WARNING) { + event->fw_warning = (enum ia_css_fw_warning)payload[1]; + /* exp_id is only available in these warning types */ + if (event->fw_warning == IA_CSS_FW_WARNING_EXP_ID_LOCKED || + event->fw_warning == IA_CSS_FW_WARNING_TAG_EXP_ID_FAILED) + event->exp_id = payload[3]; + } else if (event->type == IA_CSS_EVENT_TYPE_FW_ASSERT) { + event->fw_assert_module_id = payload[1]; /* module */ + event->fw_assert_line_no = (payload[2] << 8) + payload[3]; + /* payload[2] is line_no>>8, payload[3] is line_no&0xff */ + } else if (event->type != IA_CSS_EVENT_TYPE_TIMER) { + /* pipe related events. + * payload[1] contains the pipe_num, + * payload[2] contains the pipe_id. These are different. */ + event->pipe = find_pipe_by_num(payload[1]); + pipe_id = (enum ia_css_pipe_id)payload[2]; + /* Check to see if pipe still exists */ + if (!event->pipe) + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + + if (event->type == IA_CSS_EVENT_TYPE_FRAME_TAGGED) { + /* find the capture pipe that goes with this */ + int i, n; + n = event->pipe->stream->num_pipes; + for (i = 0; i < n; i++) { + struct ia_css_pipe *p = + event->pipe->stream->pipes[i]; + if (p->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { + event->pipe = p; + break; + } + } + event->exp_id = payload[3]; + } + if (event->type == IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE) { + /* payload[3] contains the acc fw handle. */ + uint32_t stage_num = (uint32_t)payload[3]; + ret_err = ia_css_pipeline_get_fw_from_stage( + &(event->pipe->pipeline), + stage_num, + &(event->fw_handle)); + if (ret_err != IA_CSS_SUCCESS) { + IA_CSS_ERROR("Invalid stage num received for ACC event. stage_num:%u", + stage_num); + return ret_err; + } + } + } + + if (event->pipe) + IA_CSS_LEAVE("event_id=%d, pipe_id=%d", event->type, pipe_id); + else + IA_CSS_LEAVE("event_id=%d", event->type); + + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_dequeue_isys_event(struct ia_css_event *event) +{ + uint8_t payload[4] = {0, 0, 0, 0}; + enum ia_css_err err = IA_CSS_SUCCESS; + + /* We skip the IA_CSS_ENTER logging call + * to avoid flooding the logs when the host application + * uses polling. */ + if (event == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + err = ia_css_bufq_dequeue_isys_event(payload); + if (err != IA_CSS_SUCCESS) + return err; + + IA_CSS_LOG("event dequeued from isys event queue"); + + /* Update SP state to indicate that element was dequeued. */ + ia_css_bufq_enqueue_isys_event(IA_CSS_ISYS_SW_EVENT_EVENT_DEQUEUED); + + /* Fill return struct with appropriate info */ + event->type = IA_CSS_EVENT_TYPE_PORT_EOF; + /* EOF events are associated with a CSI port, not with a pipe */ + event->pipe = NULL; + event->port = payload[1]; + event->exp_id = payload[3]; + + IA_CSS_LEAVE_ERR(err); + return err; +} + +static void +acc_start(struct ia_css_pipe *pipe) +{ + assert(pipe != NULL); + assert(pipe->stream != NULL); + + start_pipe(pipe, SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD, + pipe->stream->config.mode); +} + +static enum ia_css_err +sh_css_pipe_start(struct ia_css_stream *stream) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + struct ia_css_pipe *pipe; + enum ia_css_pipe_id pipe_id; + unsigned int thread_id; + + IA_CSS_ENTER_PRIVATE("stream = %p", stream); + + if (stream == NULL) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + pipe = stream->last_pipe; + if (pipe == NULL) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe_id = pipe->mode; + + if(stream->started == true) { + IA_CSS_WARNING("Cannot start stream that is already started"); + IA_CSS_LEAVE_ERR(err); + return err; + } + + pipe->stop_requested = false; + + switch (pipe_id) { + case IA_CSS_PIPE_ID_PREVIEW: + err = preview_start(pipe); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = video_start(pipe); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = capture_start(pipe); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = yuvpp_start(pipe); + break; + case IA_CSS_PIPE_ID_ACC: + acc_start(pipe); + break; + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* DH regular multi pipe - not continuous mode: start the next pipes too */ + if (!stream->config.continuous) { + int i; + for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err ; i++) { + switch (stream->pipes[i]->mode) { + case IA_CSS_PIPE_ID_PREVIEW: + stream->pipes[i]->stop_requested = false; + err = preview_start(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_VIDEO: + stream->pipes[i]->stop_requested = false; + err = video_start(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_CAPTURE: + stream->pipes[i]->stop_requested = false; + err = capture_start(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_YUVPP: + stream->pipes[i]->stop_requested = false; + err = yuvpp_start(stream->pipes[i]); + break; + case IA_CSS_PIPE_ID_ACC: + stream->pipes[i]->stop_requested = false; + acc_start(stream->pipes[i]); + break; + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + } + } + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + /* Force ISP parameter calculation after a mode change + * Acceleration API examples pass NULL for stream but they + * don't use ISP parameters anyway. So this should be okay. + * The SP binary (jpeg) copy does not use any parameters. + */ + if (!copy_on_sp(pipe)) { + sh_css_invalidate_params(stream); + err = sh_css_param_update_isp_params(pipe, + stream->isp_params_configs, true, NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + + ia_css_debug_pipe_graph_dump_epilogue(); + + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + + if (!sh_css_sp_is_running()) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + /* SP is not running. The queues are not valid */ + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + ia_css_bufq_enqueue_psys_event(IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); + + /* DH regular multi pipe - not continuous mode: enqueue event to the next pipes too */ + if (!stream->config.continuous) { + int i; + for (i = 1; i < stream->num_pipes; i++) { + ia_css_pipeline_get_sp_thread_id( + ia_css_pipe_get_pipe_num(stream->pipes[i]), + &thread_id); + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); + } + } + + /* in case of continuous capture mode, we also start capture thread and copy thread*/ + if (pipe->stream->config.continuous) { + struct ia_css_pipe *copy_pipe = NULL; + + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) + copy_pipe = pipe->pipe_settings.preview.copy_pipe; + else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) + copy_pipe = pipe->pipe_settings.video.copy_pipe; + + if (copy_pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(copy_pipe), &thread_id); + /* by the time we reach here q is initialized and handle is available.*/ + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); + } + if (pipe->stream->cont_capt) { + struct ia_css_pipe *capture_pipe = NULL; + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) + capture_pipe = pipe->pipe_settings.preview.capture_pipe; + else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) + capture_pipe = pipe->pipe_settings.video.capture_pipe; + + if (capture_pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), &thread_id); + /* by the time we reach here q is initialized and handle is available.*/ + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); + } + + /* in case of PREVIEW mode, check whether QOS acc_pipe is available, then start the qos pipe */ + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) { + struct ia_css_pipe *acc_pipe = NULL; + acc_pipe = pipe->pipe_settings.preview.acc_pipe; + + if (acc_pipe){ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(acc_pipe), &thread_id); + /* by the time we reach here q is initialized and handle is available.*/ + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t) thread_id, 0, 0); + } + } + + stream->started = true; + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +#ifndef ISP2401 +void +sh_css_enable_cont_capt(bool enable, bool stop_copy_preview) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_enable_cont_capt() enter: enable=%d\n", enable); +//my_css.cont_capt = enable; + my_css.stop_copy_preview = stop_copy_preview; +} + +bool +sh_css_continuous_is_enabled(uint8_t pipe_num) +#else +/* + * @brief Stop all "ia_css_pipe" instances in the target + * "ia_css_stream" instance. + * + * Refer to "Local prototypes" for more info. + */ +static enum ia_css_err +sh_css_pipes_stop(struct ia_css_stream *stream) +#endif +{ +#ifndef ISP2401 + struct ia_css_pipe *pipe; + bool continuous; +#else + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipe *main_pipe; + enum ia_css_pipe_id main_pipe_id; + int i; +#endif + +#ifndef ISP2401 + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); +#else + assert(stream != NULL); + if (stream == NULL) { + IA_CSS_LOG("stream does NOT exist!"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } +#endif + +#ifndef ISP2401 + pipe = find_pipe_by_num(pipe_num); + continuous = pipe && pipe->stream->config.continuous; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_continuous_is_enabled() leave: enable=%d\n", + continuous); + return continuous; +} +#else + main_pipe = stream->last_pipe; + assert(main_pipe != NULL); + if (main_pipe == NULL) { + IA_CSS_LOG("main_pipe does NOT exist!"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } +#endif + +#ifndef ISP2401 +enum ia_css_err +ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) +{ + if (buffer_depth == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_max_buffer_depth() enter: void\n"); + (void)stream; + *buffer_depth = NUM_CONTINUOUS_FRAMES; + return IA_CSS_SUCCESS; +} +#else + main_pipe_id = main_pipe->mode; + IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); +#endif + +#ifndef ISP2401 +enum ia_css_err +ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n",buffer_depth); + (void)stream; + if (buffer_depth > NUM_CONTINUOUS_FRAMES || buffer_depth < 1) + return IA_CSS_ERR_INVALID_ARGUMENTS; + /* ok, value allowed */ + stream->config.target_num_cont_raw_buf = buffer_depth; + /* TODO: check what to regarding initialization */ + return IA_CSS_SUCCESS; +} +#else + /* + * Stop all "ia_css_pipe" instances in this target + * "ia_css_stream" instance. + */ + for (i = 0; i < stream->num_pipes; i++) { + /* send the "stop" request to the "ia_css_pipe" instance */ + IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", + stream->pipes[i]->pipeline.pipe_id); + err = ia_css_pipeline_request_stop(&stream->pipes[i]->pipeline); +#endif + +#ifndef ISP2401 +enum ia_css_err +ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) +{ + if (buffer_depth == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); +#else + /* + * Exit this loop if "ia_css_pipeline_request_stop()" + * returns the error code. + * + * The error code would be generated in the following + * two cases: + * (1) The Scalar Processor has already been stopped. + * (2) The "Host->SP" event queue is full. + * + * As the convention of using CSS API 2.0/2.1, such CSS + * error code would be propogated from the CSS-internal + * API returned value to the CSS API returned value. Then + * the CSS driver should capture these error code and + * handle it in the driver exception handling mechanism. + */ + if (err != IA_CSS_SUCCESS) { + goto ERR; + } + } + + /* + * In the CSS firmware use scenario "Continuous Preview" + * as well as "Continuous Video", the "ia_css_pipe" instance + * "Copy Pipe" is activated. This "Copy Pipe" is private to + * the CSS firmware so that it is not listed in the target + * "ia_css_stream" instance. + * + * We need to stop this "Copy Pipe", as well. + */ + if (main_pipe->stream->config.continuous) { + struct ia_css_pipe *copy_pipe = NULL; + + /* get the reference to "Copy Pipe" */ + if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) + copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; + else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) + copy_pipe = main_pipe->pipe_settings.video.copy_pipe; + + /* return the error code if "Copy Pipe" does NOT exist */ + assert(copy_pipe != NULL); + if (copy_pipe == NULL) { + IA_CSS_LOG("Copy Pipe does NOT exist!"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } + + /* send the "stop" request to "Copy Pipe" */ + IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", + copy_pipe->pipeline.pipe_id); + err = ia_css_pipeline_request_stop(©_pipe->pipeline); + } + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +/* + * @brief Check if all "ia_css_pipe" instances in the target + * "ia_css_stream" instance have stopped. + * + * Refer to "Local prototypes" for more info. + */ +static bool +sh_css_pipes_have_stopped(struct ia_css_stream *stream) +{ + bool rval = true; + + struct ia_css_pipe *main_pipe; + enum ia_css_pipe_id main_pipe_id; + + int i; + + assert(stream != NULL); + if (stream == NULL) { + IA_CSS_LOG("stream does NOT exist!"); + rval = false; + goto RET; + } + + main_pipe = stream->last_pipe; + assert(main_pipe != NULL); + + if (main_pipe == NULL) { + IA_CSS_LOG("main_pipe does NOT exist!"); + rval = false; + goto RET; + } + + main_pipe_id = main_pipe->mode; + IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); + + /* + * Check if every "ia_css_pipe" instance in this target + * "ia_css_stream" instance has stopped. + */ + for (i = 0; i < stream->num_pipes; i++) { + rval = rval && ia_css_pipeline_has_stopped(&stream->pipes[i]->pipeline); + IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", + stream->pipes[i]->pipeline.pipe_id, + rval); + } + + /* + * In the CSS firmware use scenario "Continuous Preview" + * as well as "Continuous Video", the "ia_css_pipe" instance + * "Copy Pipe" is activated. This "Copy Pipe" is private to + * the CSS firmware so that it is not listed in the target + * "ia_css_stream" instance. + * + * We need to check if this "Copy Pipe" has stopped, as well. + */ + if (main_pipe->stream->config.continuous) { + struct ia_css_pipe *copy_pipe = NULL; + + /* get the reference to "Copy Pipe" */ + if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) + copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; + else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) + copy_pipe = main_pipe->pipe_settings.video.copy_pipe; + + /* return if "Copy Pipe" does NOT exist */ + assert(copy_pipe != NULL); + if (copy_pipe == NULL) { + IA_CSS_LOG("Copy Pipe does NOT exist!"); + + rval = false; + goto RET; + } + + /* check if "Copy Pipe" has stopped or not */ + rval = rval && ia_css_pipeline_has_stopped(©_pipe->pipeline); + IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", + copy_pipe->pipeline.pipe_id, + rval); + } + +RET: + IA_CSS_LEAVE_PRIVATE("rval=%d", rval); + return rval; +} + +bool +sh_css_continuous_is_enabled(uint8_t pipe_num) +{ + struct ia_css_pipe *pipe; + bool continuous; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); + + pipe = find_pipe_by_num(pipe_num); + continuous = pipe && pipe->stream->config.continuous; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_continuous_is_enabled() leave: enable=%d\n", + continuous); + return continuous; +} + +enum ia_css_err +ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) +{ + if (buffer_depth == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_max_buffer_depth() enter: void\n"); + (void)stream; + *buffer_depth = NUM_CONTINUOUS_FRAMES; + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n",buffer_depth); + (void)stream; + if (buffer_depth > NUM_CONTINUOUS_FRAMES || buffer_depth < 1) + return IA_CSS_ERR_INVALID_ARGUMENTS; + /* ok, value allowed */ + stream->config.target_num_cont_raw_buf = buffer_depth; + /* TODO: check what to regarding initialization */ + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) +{ + if (buffer_depth == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); +#endif + (void)stream; + *buffer_depth = stream->config.target_num_cont_raw_buf; + return IA_CSS_SUCCESS; +} + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) +unsigned int +sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx) +{ + OP___assert(port < N_CSI_PORTS); + OP___assert(idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_get_mipi_sizes_for_check(port %d, idx %d): %d\n", + port, idx, my_css.mipi_sizes_for_check[port][idx]); + return my_css.mipi_sizes_for_check[port][idx]; +} +#endif + +static enum ia_css_err sh_css_pipe_configure_output( + struct ia_css_pipe *pipe, + unsigned int width, + unsigned int height, + unsigned int padded_width, + enum ia_css_frame_format format, + unsigned int idx) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("pipe = %p, width = %d, height = %d, paddaed width = %d, format = %d, idx = %d", + pipe, width, height, padded_width, format, idx); + if (pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + err = ia_css_util_check_res(width, height); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (pipe->output_info[idx].res.width != width || + pipe->output_info[idx].res.height != height || + pipe->output_info[idx].format != format) + { + ia_css_frame_info_init( + &pipe->output_info[idx], + width, + height, + format, + padded_width); + } + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, +#ifndef ISP2401 + struct ia_css_shading_info *info) +#else + struct ia_css_shading_info *shading_info, + struct ia_css_pipe_config *pipe_config) +#endif +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_binary *binary = NULL; + + assert(pipe != NULL); +#ifndef ISP2401 + assert(info != NULL); +#else + assert(shading_info != NULL); + assert(pipe_config != NULL); +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_shading_info() enter:\n"); + + binary = ia_css_pipe_get_shading_correction_binary(pipe); + + if (binary) { + err = ia_css_binary_get_shading_info(binary, + IA_CSS_SHADING_CORRECTION_TYPE_1, + pipe->required_bds_factor, + (const struct ia_css_stream_config *)&pipe->stream->config, +#ifndef ISP2401 + info); +#else + shading_info, pipe_config); +#endif + /* Other function calls can be added here when other shading correction types will be added + * in the future. + */ + } else { + /* When the pipe does not have a binary which has the shading + * correction, this function does not need to fill the shading + * information. It is not a error case, and then + * this function should return IA_CSS_SUCCESS. + */ +#ifndef ISP2401 + memset(info, 0, sizeof(*info)); +#else + memset(shading_info, 0, sizeof(*shading_info)); +#endif + } + return err; +} + +static enum ia_css_err +sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, + struct ia_css_grid_info *info) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_binary *binary = NULL; + + assert(pipe != NULL); + assert(info != NULL); + + IA_CSS_ENTER_PRIVATE(""); + + binary = ia_css_pipe_get_s3a_binary(pipe); + + if (binary) { + err = ia_css_binary_3a_grid_info(binary, info, pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + } else + memset(&info->s3a_grid, 0, sizeof(info->s3a_grid)); + + binary = ia_css_pipe_get_sdis_binary(pipe); + + if (binary) { + ia_css_binary_dvs_grid_info(binary, info, pipe); + ia_css_binary_dvs_stat_grid_info(binary, info, pipe); + } else { + memset(&info->dvs_grid.dvs_grid_info, 0, + sizeof(info->dvs_grid.dvs_grid_info)); + memset(&info->dvs_grid.dvs_stat_grid_info, 0, + sizeof(info->dvs_grid.dvs_stat_grid_info)); + } + + if (binary != NULL) { + /* copy pipe does not have ISP binary*/ + info->isp_in_width = binary->internal_frame_info.res.width; + info->isp_in_height = binary->internal_frame_info.res.height; + } + +#if defined(HAS_VAMEM_VERSION_2) + info->vamem_type = IA_CSS_VAMEM_TYPE_2; +#elif defined(HAS_VAMEM_VERSION_1) + info->vamem_type = IA_CSS_VAMEM_TYPE_1; +#else +#error "Unknown VAMEM version" +#endif + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +#ifdef ISP2401 +/* + * @brief Check if a format is supported by the pipe. + * + */ +static enum ia_css_err +ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format format) +{ + const enum ia_css_frame_format *supported_formats; + int number_of_formats; + int found = 0; + int i; + + IA_CSS_ENTER_PRIVATE(""); + + if (NULL == pipe || NULL == pipe->pipe_settings.video.video_binary.info) { + IA_CSS_ERROR("Pipe or binary info is not set"); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + supported_formats = pipe->pipe_settings.video.video_binary.info->output_formats; + number_of_formats = sizeof(pipe->pipe_settings.video.video_binary.info->output_formats)/sizeof(enum ia_css_frame_format); + + for (i = 0; i < number_of_formats && !found; i++) { + if (supported_formats[i] == format) { + found = 1; + break; + } + } + if (!found) { + IA_CSS_ERROR("Requested format is not supported by binary"); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } else { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } +} +#endif + +static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) +{ + struct ia_css_frame_info video_in_info, tnr_info, + *video_vf_info, video_bds_out_info, *pipe_out_info, *pipe_vf_out_info; + bool online; + enum ia_css_err err = IA_CSS_SUCCESS; + bool continuous = pipe->stream->config.continuous; + unsigned int i; + unsigned num_output_pins; + struct ia_css_frame_info video_bin_out_info; + bool need_scaler = false; + bool vf_res_different_than_output = false; + bool need_vf_pp = false; + int vf_ds_log2; + struct ia_css_video_settings *mycs = &pipe->pipe_settings.video; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_VIDEO); + /* we only test the video_binary because offline video doesn't need a + * vf_pp binary and online does not (always use) the copy_binary. + * All are always reset at the same time anyway. + */ + if (mycs->video_binary.info) + return IA_CSS_SUCCESS; + + online = pipe->stream->config.online; + pipe_out_info = &pipe->output_info[0]; + pipe_vf_out_info = &pipe->vf_output_info[0]; + + assert(pipe_out_info != NULL); + + /* + * There is no explicit input format requirement for raw or yuv + * What matters is that there is a binary that supports the stream format. + * This is checked in the binary_find(), so no need to check it here + */ + err = ia_css_util_check_input(&pipe->stream->config, false, false); + if (err != IA_CSS_SUCCESS) + return err; + /* cannot have online video and input_mode memory */ + if (online && pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY) + return IA_CSS_ERR_INVALID_ARGUMENTS; + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { + err = ia_css_util_check_vf_out_info(pipe_out_info, + pipe_vf_out_info); + if (err != IA_CSS_SUCCESS) + return err; + } else { + err = ia_css_frame_check_info(pipe_out_info); + if (err != IA_CSS_SUCCESS) + return err; + } + + if (pipe->out_yuv_ds_input_info.res.width) + video_bin_out_info = pipe->out_yuv_ds_input_info; + else + video_bin_out_info = *pipe_out_info; + + /* Video */ + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]){ + video_vf_info = pipe_vf_out_info; + vf_res_different_than_output = (video_vf_info->res.width != video_bin_out_info.res.width) || + (video_vf_info->res.height != video_bin_out_info.res.height); + } + else { + video_vf_info = NULL; + } + + need_scaler = need_downscaling(video_bin_out_info.res, pipe_out_info->res); + + /* we build up the pipeline starting at the end */ + /* YUV post-processing if needed */ + if (need_scaler) { + struct ia_css_cas_binary_descr cas_scaler_descr = { }; + + /* NV12 is the common format that is supported by both */ + /* yuv_scaler and the video_xx_isp2_min binaries. */ + video_bin_out_info.format = IA_CSS_FRAME_FORMAT_NV12; + + err = ia_css_pipe_create_cas_scaler_desc_single_output( + &video_bin_out_info, + pipe_out_info, + NULL, + &cas_scaler_descr); + if (err != IA_CSS_SUCCESS) + return err; + mycs->num_yuv_scaler = cas_scaler_descr.num_stage; + mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * + sizeof(struct ia_css_binary), GFP_KERNEL); + if (!mycs->yuv_scaler_binary) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + return err; + } + mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage + * sizeof(bool), GFP_KERNEL); + if (!mycs->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + return err; + } + for (i = 0; i < cas_scaler_descr.num_stage; i++) { + struct ia_css_binary_descr yuv_scaler_descr; + mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; + ia_css_pipe_get_yuvscaler_binarydesc(pipe, + &yuv_scaler_descr, &cas_scaler_descr.in_info[i], + &cas_scaler_descr.out_info[i], + &cas_scaler_descr.internal_out_info[i], + &cas_scaler_descr.vf_info[i]); + err = ia_css_binary_find(&yuv_scaler_descr, + &mycs->yuv_scaler_binary[i]); + if (err != IA_CSS_SUCCESS) { + kfree(mycs->is_output_stage); + mycs->is_output_stage = NULL; + return err; + } + } + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + } + + + { + struct ia_css_binary_descr video_descr; + enum ia_css_frame_format vf_info_format; + + err = ia_css_pipe_get_video_binarydesc(pipe, + &video_descr, &video_in_info, &video_bds_out_info, &video_bin_out_info, video_vf_info, + pipe->stream->config.left_padding); + if (err != IA_CSS_SUCCESS) + return err; + + /* In the case where video_vf_info is not NULL, this allows + * us to find a potential video library with desired vf format. + * If success, no vf_pp binary is needed. + * If failed, we will look up video binary with YUV_LINE vf format + */ + err = ia_css_binary_find(&video_descr, + &mycs->video_binary); + + if (err != IA_CSS_SUCCESS) { + if (video_vf_info) { + /* This will do another video binary lookup later for YUV_LINE format*/ + need_vf_pp = true; + } else + return err; + } else if (video_vf_info) { + /* The first video binary lookup is successful, but we may + * still need vf_pp binary based on additiona check */ + num_output_pins = mycs->video_binary.info->num_output_pins; + vf_ds_log2 = mycs->video_binary.vf_downscale_log2; + + /* If the binary has dual output pins, we need vf_pp if the resolution + * is different. */ + need_vf_pp |= ((num_output_pins == 2) && vf_res_different_than_output); + + /* If the binary has single output pin, we need vf_pp if additional + * scaling is needed for vf */ + need_vf_pp |= ((num_output_pins == 1) && + ((video_vf_info->res.width << vf_ds_log2 != pipe_out_info->res.width) || + (video_vf_info->res.height << vf_ds_log2 != pipe_out_info->res.height))); + } + + if (need_vf_pp) { + /* save the current vf_info format for restoration later */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "load_video_binaries() need_vf_pp; find video binary with YUV_LINE again\n"); + + vf_info_format = video_vf_info->format; + + if (!pipe->config.enable_vfpp_bci) + ia_css_frame_info_set_format(video_vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); + + ia_css_binary_destroy_isp_parameters(&mycs->video_binary); + + err = ia_css_binary_find(&video_descr, + &mycs->video_binary); + + /* restore original vf_info format */ + ia_css_frame_info_set_format(video_vf_info, + vf_info_format); + if (err != IA_CSS_SUCCESS) + return err; + } + } + + /* If a video binary does not use a ref_frame, we set the frame delay + * to 0. This is the case for the 1-stage low-power video binary. */ + if (!mycs->video_binary.info->sp.enable.ref_frame) + pipe->dvs_frame_delay = 0; + + /* The delay latency determines the number of invalid frames after + * a stream is started. */ + pipe->num_invalid_frames = pipe->dvs_frame_delay; + pipe->info.num_invalid_frames = pipe->num_invalid_frames; + + /* Viewfinder frames also decrement num_invalid_frames. If the pipe + * outputs a viewfinder output, then we need double the number of + * invalid frames */ + if (video_vf_info) + pipe->num_invalid_frames *= 2; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "load_video_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", + pipe->num_invalid_frames, pipe->dvs_frame_delay); + +/* pqiao TODO: temp hack for PO, should be removed after offline YUVPP is enabled */ +#if !defined(USE_INPUT_SYSTEM_VERSION_2401) + /* Copy */ + if (!online && !continuous) { + /* TODO: what exactly needs doing, prepend the copy binary to + * video base this only on !online? + */ + err = load_copy_binary(pipe, + &mycs->copy_binary, + &mycs->video_binary); + if (err != IA_CSS_SUCCESS) + return err; + } +#else + (void)continuous; +#endif + +#if !defined(HAS_OUTPUT_SYSTEM) + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && need_vf_pp) { + struct ia_css_binary_descr vf_pp_descr; + + if (mycs->video_binary.vf_frame_info.format + == IA_CSS_FRAME_FORMAT_YUV_LINE) { + ia_css_pipe_get_vfpp_binarydesc(pipe, &vf_pp_descr, + &mycs->video_binary.vf_frame_info, + pipe_vf_out_info); + } else { + /* output from main binary is not yuv line. currently this is + * possible only when bci is enabled on vfpp output */ + assert(pipe->config.enable_vfpp_bci == true); + ia_css_pipe_get_yuvscaler_binarydesc(pipe, &vf_pp_descr, + &mycs->video_binary.vf_frame_info, + pipe_vf_out_info, NULL, NULL); + } + + err = ia_css_binary_find(&vf_pp_descr, + &mycs->vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } +#endif + + err = allocate_delay_frames(pipe); + + if (err != IA_CSS_SUCCESS) + return err; + + if (mycs->video_binary.info->sp.enable.block_output) { +#ifdef ISP2401 + unsigned int tnr_width; + unsigned int tnr_height; +#endif + tnr_info = mycs->video_binary.out_frame_info[0]; +#ifdef ISP2401 + + /* Select resolution for TNR. If + * output_system_in_resolution(GDC_out_resolution) is + * being used, then select that as it will also be in resolution for + * TNR. At present, it only make sense for Skycam */ + if (pipe->config.output_system_in_res.width && pipe->config.output_system_in_res.height) { + tnr_width = pipe->config.output_system_in_res.width; + tnr_height = pipe->config.output_system_in_res.height; + } else { + tnr_width = tnr_info.res.width; + tnr_height = tnr_info.res.height; + } + + /* Make tnr reference buffers output block width(in pix) align */ + tnr_info.res.width = + CEIL_MUL(tnr_width, + (mycs->video_binary.info->sp.block.block_width * ISP_NWAY)); + tnr_info.padded_width = tnr_info.res.width; + +#endif + /* Make tnr reference buffers output block height align */ +#ifndef ISP2401 + tnr_info.res.height = + CEIL_MUL(tnr_info.res.height, + mycs->video_binary.info->sp.block.output_block_height); +#else + tnr_info.res.height = + CEIL_MUL(tnr_height, + mycs->video_binary.info->sp.block.output_block_height); +#endif + } else { + tnr_info = mycs->video_binary.internal_frame_info; + } + tnr_info.format = IA_CSS_FRAME_FORMAT_YUV_LINE; + tnr_info.raw_bit_depth = SH_CSS_TNR_BIT_DEPTH; + +#ifndef ISP2401 + for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { +#else + for (i = 0; i < NUM_TNR_FRAMES; i++) { +#endif + if (mycs->tnr_frames[i]) { + ia_css_frame_free(mycs->tnr_frames[i]); + mycs->tnr_frames[i] = NULL; + } + err = ia_css_frame_allocate_from_info( + &mycs->tnr_frames[i], + &tnr_info); + if (err != IA_CSS_SUCCESS) + return err; + } + IA_CSS_LEAVE_PRIVATE(""); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +unload_video_binaries(struct ia_css_pipe *pipe) +{ + unsigned int i; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + + if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.video.copy_binary); + ia_css_binary_unload(&pipe->pipe_settings.video.video_binary); + ia_css_binary_unload(&pipe->pipe_settings.video.vf_pp_binary); +#ifndef ISP2401 + ia_css_binary_unload(&pipe->pipe_settings.video.vf_pp_binary); +#endif + + for (i = 0; i < pipe->pipe_settings.video.num_yuv_scaler; i++) + ia_css_binary_unload(&pipe->pipe_settings.video.yuv_scaler_binary[i]); + + kfree(pipe->pipe_settings.video.is_output_stage); + pipe->pipe_settings.video.is_output_stage = NULL; + kfree(pipe->pipe_settings.video.yuv_scaler_binary); + pipe->pipe_settings.video.yuv_scaler_binary = NULL; + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err video_start(struct ia_css_pipe *pipe) +{ + struct ia_css_binary *copy_binary; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipe *copy_pipe, *capture_pipe; + enum sh_css_pipe_config_override copy_ovrd; + enum ia_css_input_mode video_pipe_input_mode; + + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + video_pipe_input_mode = pipe->stream->config.mode; + + copy_pipe = pipe->pipe_settings.video.copy_pipe; + capture_pipe = pipe->pipe_settings.video.capture_pipe; + + copy_binary = &pipe->pipe_settings.video.copy_binary; + + sh_css_metrics_start_frame(); + + /* multi stream video needs mipi buffers */ + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) + return err; +#endif + + send_raw_frames(pipe); + { + unsigned int thread_id; + + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + + if (pipe->stream->cont_capt) { + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), &thread_id); + copy_ovrd |= 1 << thread_id; + } + } + + /* Construct and load the copy pipe */ + if (pipe->stream->config.continuous) { + sh_css_sp_init_pipeline(©_pipe->pipeline, + IA_CSS_PIPE_ID_COPY, + (uint8_t)ia_css_pipe_get_pipe_num(copy_pipe), + false, + pipe->stream->config.pixels_per_clock == 2, false, + false, pipe->required_bds_factor, + copy_ovrd, + pipe->stream->config.mode, + &pipe->stream->config.metadata_config, +#ifndef ISP2401 + &pipe->stream->info.metadata_info +#else + &pipe->stream->info.metadata_info, +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#ifndef ISP2401 + , pipe->stream->config.source.port.port +#else + pipe->stream->config.source.port.port, +#endif +#endif +#ifndef ISP2401 + ); +#else + ©_pipe->config.internal_frame_origin_bqs_on_sctbl, + copy_pipe->stream->isp_params_configs); +#endif + + /* make the video pipe start with mem mode input, copy handles + the actual mode */ + video_pipe_input_mode = IA_CSS_INPUT_MODE_MEMORY; + } + + /* Construct and load the capture pipe */ + if (pipe->stream->cont_capt) { + sh_css_sp_init_pipeline(&capture_pipe->pipeline, + IA_CSS_PIPE_ID_CAPTURE, + (uint8_t)ia_css_pipe_get_pipe_num(capture_pipe), + capture_pipe->config.default_capture_config.enable_xnr != 0, + capture_pipe->stream->config.pixels_per_clock == 2, + true, /* continuous */ + false, /* offline */ + capture_pipe->required_bds_factor, + 0, + IA_CSS_INPUT_MODE_MEMORY, + &pipe->stream->config.metadata_config, +#ifndef ISP2401 + &pipe->stream->info.metadata_info +#else + &pipe->stream->info.metadata_info, +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#ifndef ISP2401 + , (enum mipi_port_id)0 +#else + (enum mipi_port_id)0, +#endif +#endif +#ifndef ISP2401 + ); +#else + &capture_pipe->config.internal_frame_origin_bqs_on_sctbl, + capture_pipe->stream->isp_params_configs); +#endif + } + + start_pipe(pipe, copy_ovrd, video_pipe_input_mode); + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static +enum ia_css_err sh_css_pipe_get_viewfinder_frame_info( + struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx) +{ + assert(pipe != NULL); + assert(info != NULL); + +/* We could print the pointer as input arg, and the values as output */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_get_viewfinder_frame_info() enter: void\n"); + + if ( pipe->mode == IA_CSS_PIPE_ID_CAPTURE && + (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER)) + return IA_CSS_ERR_MODE_HAS_NO_VIEWFINDER; + /* offline video does not generate viewfinder output */ + *info = pipe->vf_output_info[idx]; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_viewfinder_frame_info() leave: \ + info.res.width=%d, info.res.height=%d, \ + info.padded_width=%d, info.format=%d, \ + info.raw_bit_depth=%d, info.raw_bayer_order=%d\n", + info->res.width,info->res.height, + info->padded_width,info->format, + info->raw_bit_depth,info->raw_bayer_order); + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +sh_css_pipe_configure_viewfinder(struct ia_css_pipe *pipe, unsigned int width, + unsigned int height, unsigned int min_width, + enum ia_css_frame_format format, + unsigned int idx) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("pipe = %p, width = %d, height = %d, min_width = %d, format = %d, idx = %d\n", + pipe, width, height, min_width, format, idx); + + if (pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + + err = ia_css_util_check_res(width, height); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (pipe->vf_output_info[idx].res.width != width || + pipe->vf_output_info[idx].res.height != height || + pipe->vf_output_info[idx].format != format) { + ia_css_frame_info_init(&pipe->vf_output_info[idx], width, height, + format, min_width); + } + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err load_copy_binaries(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + assert(pipe != NULL); + IA_CSS_ENTER_PRIVATE(""); + + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + if (pipe->pipe_settings.capture.copy_binary.info) + return IA_CSS_SUCCESS; + + err = ia_css_frame_check_info(&pipe->output_info[0]); + if (err != IA_CSS_SUCCESS) + goto ERR; + + err = verify_copy_out_frame_format(pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + + err = load_copy_binary(pipe, + &pipe->pipe_settings.capture.copy_binary, + NULL); + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static bool need_capture_pp( + const struct ia_css_pipe *pipe) +{ + const struct ia_css_frame_info *out_info = &pipe->output_info[0]; + IA_CSS_ENTER_LEAVE_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE); +#ifdef ISP2401 + + /* ldc and capture_pp are not supported in the same pipeline */ + if (need_capt_ldc(pipe) == true) + return false; +#endif + /* determine whether we need to use the capture_pp binary. + * This is needed for: + * 1. XNR or + * 2. Digital Zoom or + * 3. YUV downscaling + */ + if (pipe->out_yuv_ds_input_info.res.width && + ((pipe->out_yuv_ds_input_info.res.width != out_info->res.width) || + (pipe->out_yuv_ds_input_info.res.height != out_info->res.height))) + return true; + + if (pipe->config.default_capture_config.enable_xnr != 0) + return true; + + if ((pipe->stream->isp_params_configs->dz_config.dx < HRT_GDC_N) || + (pipe->stream->isp_params_configs->dz_config.dy < HRT_GDC_N) || + pipe->config.enable_dz) + return true; + + return false; +} + +static bool need_capt_ldc( + const struct ia_css_pipe *pipe) +{ + IA_CSS_ENTER_LEAVE_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE); + return (pipe->extra_config.enable_dvs_6axis) ? true:false; +} + +static enum ia_css_err set_num_primary_stages(unsigned int *num, enum ia_css_pipe_version version) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + if (num == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + switch (version) { + case IA_CSS_PIPE_VERSION_2_6_1: + *num = NUM_PRIMARY_HQ_STAGES; + break; + case IA_CSS_PIPE_VERSION_2_2: + case IA_CSS_PIPE_VERSION_1: + *num = NUM_PRIMARY_STAGES; + break; + default: + err = IA_CSS_ERR_INVALID_ARGUMENTS; + break; + } + + return err; +} + +static enum ia_css_err load_primary_binaries( + struct ia_css_pipe *pipe) +{ + bool online = false; + bool memory = false; + bool continuous = false; + bool need_pp = false; + bool need_isp_copy_binary = false; + bool need_ldc = false; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + bool sensor = false; +#endif + struct ia_css_frame_info prim_in_info, + prim_out_info, + capt_pp_out_info, vf_info, + *vf_pp_in_info, *pipe_out_info, +#ifndef ISP2401 + *pipe_vf_out_info, *capt_pp_in_info, + capt_ldc_out_info; +#else + *pipe_vf_out_info; +#endif + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_capture_settings *mycs; + unsigned int i; + bool need_extra_yuv_scaler = false; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->stream != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + + online = pipe->stream->config.online; + memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + continuous = pipe->stream->config.continuous; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); +#endif + + mycs = &pipe->pipe_settings.capture; + pipe_out_info = &pipe->output_info[0]; + pipe_vf_out_info = &pipe->vf_output_info[0]; + + if (mycs->primary_binary[0].info) + return IA_CSS_SUCCESS; + + err = set_num_primary_stages(&mycs->num_primary_stage, pipe->config.isp_pipe_version); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { + err = ia_css_util_check_vf_out_info(pipe_out_info, pipe_vf_out_info); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + else{ + err = ia_css_frame_check_info(pipe_out_info); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + need_pp = need_capture_pp(pipe); + + /* we use the vf output info to get the primary/capture_pp binary + configured for vf_veceven. It will select the closest downscaling + factor. */ + vf_info = *pipe_vf_out_info; + +/* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + * */ + ia_css_frame_info_set_format(&vf_info, IA_CSS_FRAME_FORMAT_YUV_LINE); + + /* TODO: All this yuv_scaler and capturepp calculation logic + * can be shared later. Capture_pp is also a yuv_scale binary + * with extra XNR funcionality. Therefore, it can be made as the + * first step of the cascade. */ + capt_pp_out_info = pipe->out_yuv_ds_input_info; + capt_pp_out_info.format = IA_CSS_FRAME_FORMAT_YUV420; + capt_pp_out_info.res.width /= MAX_PREFERRED_YUV_DS_PER_STEP; + capt_pp_out_info.res.height /= MAX_PREFERRED_YUV_DS_PER_STEP; + ia_css_frame_info_set_width(&capt_pp_out_info, capt_pp_out_info.res.width, 0); + +/* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + * */ + need_extra_yuv_scaler = need_downscaling(capt_pp_out_info.res, + pipe_out_info->res); + + if (need_extra_yuv_scaler) { + struct ia_css_cas_binary_descr cas_scaler_descr = { }; + + err = ia_css_pipe_create_cas_scaler_desc_single_output( + &capt_pp_out_info, + pipe_out_info, + NULL, + &cas_scaler_descr); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + mycs->num_yuv_scaler = cas_scaler_descr.num_stage; + mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * + sizeof(struct ia_css_binary), GFP_KERNEL); + if (!mycs->yuv_scaler_binary) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage * + sizeof(bool), GFP_KERNEL); + if (!mycs->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + for (i = 0; i < cas_scaler_descr.num_stage; i++) { + struct ia_css_binary_descr yuv_scaler_descr; + mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; + ia_css_pipe_get_yuvscaler_binarydesc(pipe, + &yuv_scaler_descr, &cas_scaler_descr.in_info[i], + &cas_scaler_descr.out_info[i], + &cas_scaler_descr.internal_out_info[i], + &cas_scaler_descr.vf_info[i]); + err = ia_css_binary_find(&yuv_scaler_descr, + &mycs->yuv_scaler_binary[i]); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + + } else { + capt_pp_out_info = pipe->output_info[0]; + } + + /* TODO Do we disable ldc for skycam */ + need_ldc = need_capt_ldc(pipe); +#ifdef ISP2401 + /* ldc and capt_pp are not supported in the same pipeline */ + if (need_ldc) { + struct ia_css_binary_descr capt_ldc_descr; + ia_css_pipe_get_ldc_binarydesc(pipe, + &capt_ldc_descr, &prim_out_info, + &capt_pp_out_info); +#endif + +#ifdef ISP2401 + err = ia_css_binary_find(&capt_ldc_descr, + &mycs->capture_ldc_binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } else if (need_pp) { +#endif + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ +#ifndef ISP2401 + if (need_pp) { +#endif + struct ia_css_binary_descr capture_pp_descr; +#ifndef ISP2401 + capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; +#endif + + ia_css_pipe_get_capturepp_binarydesc(pipe, +#ifndef ISP2401 + &capture_pp_descr, capt_pp_in_info, +#else + &capture_pp_descr, &prim_out_info, +#endif + &capt_pp_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &mycs->capture_pp_binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } +#ifndef ISP2401 + + if(need_ldc) { + struct ia_css_binary_descr capt_ldc_descr; + ia_css_pipe_get_ldc_binarydesc(pipe, + &capt_ldc_descr, &prim_out_info, + &capt_ldc_out_info); + + err = ia_css_binary_find(&capt_ldc_descr, + &mycs->capture_ldc_binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } +#endif + } else { + prim_out_info = *pipe_out_info; + } + + /* Primary */ + { + struct ia_css_binary_descr prim_descr[MAX_NUM_PRIMARY_STAGES]; + + for (i = 0; i < mycs->num_primary_stage; i++) { + struct ia_css_frame_info *local_vf_info = NULL; + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && (i == mycs->num_primary_stage - 1)) + local_vf_info = &vf_info; + ia_css_pipe_get_primary_binarydesc(pipe, &prim_descr[i], &prim_in_info, &prim_out_info, local_vf_info, i); + err = ia_css_binary_find(&prim_descr[i], &mycs->primary_binary[i]); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + } + + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &mycs->capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &mycs->primary_binary[mycs->num_primary_stage - 1].vf_frame_info; + } + +/* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. Thisshould not be considered as a clean solution. + * Proper * investigation should be done to come up with the clean + * solution. + * */ + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) + { + struct ia_css_binary_descr vf_pp_descr; + + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + err = allocate_delay_frames(pipe); + + if (err != IA_CSS_SUCCESS) + return err; + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When the input system is 2401, only the Direct Sensor Mode + * Offline Capture uses the ISP copy binary. + */ + need_isp_copy_binary = !online && sensor; +#else + need_isp_copy_binary = !online && !continuous && !memory; +#endif + + /* ISP Copy */ + if (need_isp_copy_binary) { + err = load_copy_binary(pipe, + &mycs->copy_binary, + &mycs->primary_binary[0]); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +allocate_delay_frames(struct ia_css_pipe *pipe) +{ + unsigned int num_delay_frames = 0, i = 0; + unsigned int dvs_frame_delay = 0; + struct ia_css_frame_info ref_info; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_pipe_id mode = IA_CSS_PIPE_ID_VIDEO; + struct ia_css_frame **delay_frames = NULL; + + IA_CSS_ENTER_PRIVATE(""); + + if (pipe == NULL) { + IA_CSS_ERROR("Invalid args - pipe %p", pipe); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + mode = pipe->mode; + dvs_frame_delay = pipe->dvs_frame_delay; + + if (dvs_frame_delay > 0) + num_delay_frames = dvs_frame_delay + 1; + + switch (mode) { + case IA_CSS_PIPE_ID_CAPTURE: + { + struct ia_css_capture_settings *mycs_capture = &pipe->pipe_settings.capture; + (void)mycs_capture; + return err; + } + break; + case IA_CSS_PIPE_ID_VIDEO: + { + struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video; + ref_info = mycs_video->video_binary.internal_frame_info; + /*The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ + ref_info.format = IA_CSS_FRAME_FORMAT_NV12; + delay_frames = mycs_video->delay_frames; + } + break; + case IA_CSS_PIPE_ID_PREVIEW: + { + struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview; + ref_info = mycs_preview->preview_binary.internal_frame_info; + /*The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ + ref_info.format = IA_CSS_FRAME_FORMAT_NV12; + delay_frames = mycs_preview->delay_frames; + } + break; + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + + } + + ref_info.raw_bit_depth = SH_CSS_REF_BIT_DEPTH; + + assert(num_delay_frames <= MAX_NUM_VIDEO_DELAY_FRAMES); + for (i = 0; i < num_delay_frames; i++) { + err = ia_css_frame_allocate_from_info(&delay_frames[i], &ref_info); + if (err != IA_CSS_SUCCESS) + return err; + } + IA_CSS_LEAVE_PRIVATE(""); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err load_advanced_binaries( + struct ia_css_pipe *pipe) +{ + struct ia_css_frame_info pre_in_info, gdc_in_info, + post_in_info, post_out_info, + vf_info, *vf_pp_in_info, *pipe_out_info, + *pipe_vf_out_info; + bool need_pp; + bool need_isp_copy = true; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE(""); + + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + pipe_out_info = &pipe->output_info[0]; + pipe_vf_out_info = &pipe->vf_output_info[0]; + + vf_info = *pipe_vf_out_info; + err = ia_css_util_check_vf_out_info(pipe_out_info, &vf_info); + if (err != IA_CSS_SUCCESS) + return err; + need_pp = need_capture_pp(pipe); + + ia_css_frame_info_set_format(&vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); + + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_pp) { + struct ia_css_binary_descr capture_pp_descr; + + ia_css_pipe_get_capturepp_binarydesc(pipe, + &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &pipe->pipe_settings.capture.capture_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } else { + post_out_info = *pipe_out_info; + } + + /* Post-gdc */ + { + struct ia_css_binary_descr post_gdc_descr; + + ia_css_pipe_get_post_gdc_binarydesc(pipe, + &post_gdc_descr, &post_in_info, &post_out_info, &vf_info); + err = ia_css_binary_find(&post_gdc_descr, + &pipe->pipe_settings.capture.post_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + + /* Gdc */ + { + struct ia_css_binary_descr gdc_descr; + + ia_css_pipe_get_gdc_binarydesc(pipe, &gdc_descr, &gdc_in_info, + &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); + err = ia_css_binary_find(&gdc_descr, + &pipe->pipe_settings.capture.anr_gdc_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.anr_gdc_binary.left_padding = + pipe->pipe_settings.capture.post_isp_binary.left_padding; + + /* Pre-gdc */ + { + struct ia_css_binary_descr pre_gdc_descr; + + ia_css_pipe_get_pre_gdc_binarydesc(pipe, &pre_gdc_descr, &pre_in_info, + &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); + err = ia_css_binary_find(&pre_gdc_descr, + &pipe->pipe_settings.capture.pre_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.pre_isp_binary.left_padding = + pipe->pipe_settings.capture.anr_gdc_binary.left_padding; + + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; + } + + { + struct ia_css_binary_descr vf_pp_descr; + + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, + &pipe->pipe_settings.capture.vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + + /* Copy */ +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* For CSI2+, only the direct sensor mode/online requires ISP copy */ + need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; +#endif + if (need_isp_copy) + load_copy_binary(pipe, + &pipe->pipe_settings.capture.copy_binary, + &pipe->pipe_settings.capture.pre_isp_binary); + + return err; +} + +static enum ia_css_err load_bayer_isp_binaries( + struct ia_css_pipe *pipe) +{ + struct ia_css_frame_info pre_isp_in_info, *pipe_out_info; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_binary_descr pre_de_descr; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + pipe_out_info = &pipe->output_info[0]; + + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + + err = ia_css_frame_check_info(pipe_out_info); + if (err != IA_CSS_SUCCESS) + return err; + + ia_css_pipe_get_pre_de_binarydesc(pipe, &pre_de_descr, + &pre_isp_in_info, + pipe_out_info); + + err = ia_css_binary_find(&pre_de_descr, + &pipe->pipe_settings.capture.pre_isp_binary); + + return err; +} + +static enum ia_css_err load_low_light_binaries( + struct ia_css_pipe *pipe) +{ + struct ia_css_frame_info pre_in_info, anr_in_info, + post_in_info, post_out_info, + vf_info, *pipe_vf_out_info, *pipe_out_info, + *vf_pp_in_info; + bool need_pp; + bool need_isp_copy = true; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + pipe_vf_out_info = &pipe->vf_output_info[0]; + pipe_out_info = &pipe->output_info[0]; + + vf_info = *pipe_vf_out_info; + err = ia_css_util_check_vf_out_info(pipe_out_info, + &vf_info); + if (err != IA_CSS_SUCCESS) + return err; + need_pp = need_capture_pp(pipe); + + ia_css_frame_info_set_format(&vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); + + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_pp) { + struct ia_css_binary_descr capture_pp_descr; + + ia_css_pipe_get_capturepp_binarydesc(pipe, + &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &pipe->pipe_settings.capture.capture_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } else { + post_out_info = *pipe_out_info; + } + + /* Post-anr */ + { + struct ia_css_binary_descr post_anr_descr; + + ia_css_pipe_get_post_anr_binarydesc(pipe, + &post_anr_descr, &post_in_info, &post_out_info, &vf_info); + err = ia_css_binary_find(&post_anr_descr, + &pipe->pipe_settings.capture.post_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + + /* Anr */ + { + struct ia_css_binary_descr anr_descr; + + ia_css_pipe_get_anr_binarydesc(pipe, &anr_descr, &anr_in_info, + &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); + err = ia_css_binary_find(&anr_descr, + &pipe->pipe_settings.capture.anr_gdc_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.anr_gdc_binary.left_padding = + pipe->pipe_settings.capture.post_isp_binary.left_padding; + + /* Pre-anr */ + { + struct ia_css_binary_descr pre_anr_descr; + + ia_css_pipe_get_pre_anr_binarydesc(pipe, &pre_anr_descr, &pre_in_info, + &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); + err = ia_css_binary_find(&pre_anr_descr, + &pipe->pipe_settings.capture.pre_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.pre_isp_binary.left_padding = + pipe->pipe_settings.capture.anr_gdc_binary.left_padding; + + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; + } + + { + struct ia_css_binary_descr vf_pp_descr; + + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, + &pipe->pipe_settings.capture.vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + + /* Copy */ +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* For CSI2+, only the direct sensor mode/online requires ISP copy */ + need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; +#endif + if (need_isp_copy) + err = load_copy_binary(pipe, + &pipe->pipe_settings.capture.copy_binary, + &pipe->pipe_settings.capture.pre_isp_binary); + + return err; +} + +static bool copy_on_sp(struct ia_css_pipe *pipe) +{ + bool rval; + + assert(pipe != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "copy_on_sp() enter:\n"); + + rval = true; + + rval &= (pipe->mode == IA_CSS_PIPE_ID_CAPTURE); + + rval &= (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW); + + rval &= ((pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) || + (pipe->config.mode == IA_CSS_PIPE_MODE_COPY)); + + return rval; +} + +static enum ia_css_err load_capture_binaries( + struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + bool must_be_raw; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + + if (pipe->pipe_settings.capture.primary_binary[0].info) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } + + /* in primary, advanced,low light or bayer, + the input format must be raw */ + must_be_raw = + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT; + err = ia_css_util_check_input(&pipe->stream->config, must_be_raw, false); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { + ia_css_frame_info_init( + &pipe->output_info[0], + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } + + switch (pipe->config.default_capture_config.mode) { + case IA_CSS_CAPTURE_MODE_RAW: + err = load_copy_binaries(pipe); +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) + if (err == IA_CSS_SUCCESS) + pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; +#endif + break; + case IA_CSS_CAPTURE_MODE_BAYER: + err = load_bayer_isp_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_PRIMARY: + err = load_primary_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_ADVANCED: + err = load_advanced_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_LOW_LIGHT: + err = load_low_light_binaries(pipe); + break; + } + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +unload_capture_binaries(struct ia_css_pipe *pipe) +{ + unsigned int i; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + + if ((pipe == NULL) || ((pipe->mode != IA_CSS_PIPE_ID_CAPTURE) && (pipe->mode != IA_CSS_PIPE_ID_COPY))) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.capture.copy_binary); + for (i = 0; i < MAX_NUM_PRIMARY_STAGES; i++) + ia_css_binary_unload(&pipe->pipe_settings.capture.primary_binary[i]); + ia_css_binary_unload(&pipe->pipe_settings.capture.pre_isp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.anr_gdc_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.post_isp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.capture_pp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.capture_ldc_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.vf_pp_binary); + + for (i = 0; i < pipe->pipe_settings.capture.num_yuv_scaler; i++) + ia_css_binary_unload(&pipe->pipe_settings.capture.yuv_scaler_binary[i]); + + kfree(pipe->pipe_settings.capture.is_output_stage); + pipe->pipe_settings.capture.is_output_stage = NULL; + kfree(pipe->pipe_settings.capture.yuv_scaler_binary); + pipe->pipe_settings.capture.yuv_scaler_binary = NULL; + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +static bool +need_downscaling(const struct ia_css_resolution in_res, + const struct ia_css_resolution out_res) +{ + + if (in_res.width > out_res.width || in_res.height > out_res.height) + return true; + + return false; +} + +static bool +need_yuv_scaler_stage(const struct ia_css_pipe *pipe) +{ + unsigned int i; + struct ia_css_resolution in_res, out_res; + + bool need_format_conversion = false; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); + + /* TODO: make generic function */ + need_format_conversion = + ((pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) && + (pipe->output_info[0].format != IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8)); + + in_res = pipe->config.input_effective_res; + + if (pipe->config.enable_dz) + return true; + + if ((pipe->output_info[0].res.width != 0) && need_format_conversion) + return true; + + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + out_res = pipe->output_info[i].res; + + /* A non-zero width means it is a valid output port */ + if ((out_res.width != 0) && need_downscaling(in_res, out_res)) + return true; + } + + return false; +} + +/* TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc */ +/* which has some hard-coded knowledge which prevents reuse of the function. */ +/* Later, merge this with ia_css_pipe_create_cas_scaler_desc */ +static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( + struct ia_css_frame_info *cas_scaler_in_info, + struct ia_css_frame_info *cas_scaler_out_info, + struct ia_css_frame_info *cas_scaler_vf_info, + struct ia_css_cas_binary_descr *descr) +{ + unsigned int i; + unsigned int hor_ds_factor = 0, ver_ds_factor = 0; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame_info tmp_in_info; + + unsigned max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; + + assert(cas_scaler_in_info != NULL); + assert(cas_scaler_out_info != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() enter:\n"); + + /* We assume that this function is used only for single output port case. */ + descr->num_output_stage = 1; + + hor_ds_factor = CEIL_DIV(cas_scaler_in_info->res.width , cas_scaler_out_info->res.width); + ver_ds_factor = CEIL_DIV(cas_scaler_in_info->res.height, cas_scaler_out_info->res.height); + /* use the same horizontal and vertical downscaling factor for simplicity */ + assert(hor_ds_factor == ver_ds_factor); + + i = 1; + while (i < hor_ds_factor) { + descr->num_stage++; + i *= max_scale_factor_per_stage; + } + + descr->in_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->in_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->internal_out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->internal_out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->vf_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); + if (!descr->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + + tmp_in_info = *cas_scaler_in_info; + for (i = 0; i < descr->num_stage; i++) { + + descr->in_info[i] = tmp_in_info; + if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= cas_scaler_out_info->res.width) { + descr->is_output_stage[i] = true; + if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { + descr->internal_out_info[i].res.width = cas_scaler_out_info->res.width; + descr->internal_out_info[i].res.height = cas_scaler_out_info->res.height; + descr->internal_out_info[i].padded_width = cas_scaler_out_info->padded_width; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + } else { + assert(i == (descr->num_stage - 1)); + descr->internal_out_info[i].res.width = 0; + descr->internal_out_info[i].res.height = 0; + } + descr->out_info[i].res.width = cas_scaler_out_info->res.width; + descr->out_info[i].res.height = cas_scaler_out_info->res.height; + descr->out_info[i].padded_width = cas_scaler_out_info->padded_width; + descr->out_info[i].format = cas_scaler_out_info->format; + if (cas_scaler_vf_info != NULL) { + descr->vf_info[i].res.width = cas_scaler_vf_info->res.width; + descr->vf_info[i].res.height = cas_scaler_vf_info->res.height; + descr->vf_info[i].padded_width = cas_scaler_vf_info->padded_width; + ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + } else { + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + descr->vf_info[i].padded_width = 0; + } + } else { + descr->is_output_stage[i] = false; + descr->internal_out_info[i].res.width = tmp_in_info.res.width / max_scale_factor_per_stage; + descr->internal_out_info[i].res.height = tmp_in_info.res.height / max_scale_factor_per_stage; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init(&descr->internal_out_info[i], + tmp_in_info.res.width / max_scale_factor_per_stage, + tmp_in_info.res.height / max_scale_factor_per_stage, + IA_CSS_FRAME_FORMAT_YUV420, 0); + descr->out_info[i].res.width = 0; + descr->out_info[i].res.height = 0; + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + } + tmp_in_info = descr->internal_out_info[i]; + } +ERR: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", + err); + return err; +} + +/* FIXME: merge most of this and single output version */ +static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pipe, + struct ia_css_cas_binary_descr *descr) +{ + struct ia_css_frame_info in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + struct ia_css_frame_info *out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info *vf_out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info tmp_in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + unsigned int i, j; + unsigned int hor_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], + ver_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], + scale_factor = 0; + unsigned int num_stages = 0; + enum ia_css_err err = IA_CSS_SUCCESS; + + unsigned max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() enter:\n"); + + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + out_info[i] = NULL; + vf_out_info[i] = NULL; + hor_scale_factor[i] = 0; + ver_scale_factor[i] = 0; + } + + in_info.res = pipe->config.input_effective_res; + in_info.padded_width = in_info.res.width; + descr->num_output_stage = 0; + /* Find out how much scaling we need for each output */ + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (pipe->output_info[i].res.width != 0) { + out_info[i] = &pipe->output_info[i]; + if (pipe->vf_output_info[i].res.width != 0) + vf_out_info[i] = &pipe->vf_output_info[i]; + descr->num_output_stage += 1; + } + + if (out_info[i] != NULL) { + hor_scale_factor[i] = CEIL_DIV(in_info.res.width, out_info[i]->res.width); + ver_scale_factor[i] = CEIL_DIV(in_info.res.height, out_info[i]->res.height); + /* use the same horizontal and vertical scaling factor for simplicity */ + assert(hor_scale_factor[i] == ver_scale_factor[i]); + scale_factor = 1; + do { + num_stages++; + scale_factor *= max_scale_factor_per_stage; + } while (scale_factor < hor_scale_factor[i]); + + in_info.res = out_info[i]->res; + } + } + + if (need_yuv_scaler_stage(pipe) && (num_stages == 0)) + num_stages = 1; + + descr->num_stage = num_stages; + + descr->in_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->in_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->internal_out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->internal_out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->vf_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); + if (descr->is_output_stage == NULL) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (out_info[i]) { + if (i > 0) { + assert((out_info[i-1]->res.width >= out_info[i]->res.width) && + (out_info[i-1]->res.height >= out_info[i]->res.height)); + } + } + } + + tmp_in_info.res = pipe->config.input_effective_res; + tmp_in_info.format = IA_CSS_FRAME_FORMAT_YUV420; + for (i = 0, j = 0; i < descr->num_stage; i++) { + assert(j < 2); + assert(out_info[j] != NULL); + + descr->in_info[i] = tmp_in_info; + if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= out_info[j]->res.width) { + descr->is_output_stage[i] = true; + if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { + descr->internal_out_info[i].res.width = out_info[j]->res.width; + descr->internal_out_info[i].res.height = out_info[j]->res.height; + descr->internal_out_info[i].padded_width = out_info[j]->padded_width; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + } else { + assert(i == (descr->num_stage - 1)); + descr->internal_out_info[i].res.width = 0; + descr->internal_out_info[i].res.height = 0; + } + descr->out_info[i].res.width = out_info[j]->res.width; + descr->out_info[i].res.height = out_info[j]->res.height; + descr->out_info[i].padded_width = out_info[j]->padded_width; + descr->out_info[i].format = out_info[j]->format; + if (vf_out_info[j] != NULL) { + descr->vf_info[i].res.width = vf_out_info[j]->res.width; + descr->vf_info[i].res.height = vf_out_info[j]->res.height; + descr->vf_info[i].padded_width = vf_out_info[j]->padded_width; + ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + } else { + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + descr->vf_info[i].padded_width = 0; + } + j++; + } else { + descr->is_output_stage[i] = false; + descr->internal_out_info[i].res.width = tmp_in_info.res.width / max_scale_factor_per_stage; + descr->internal_out_info[i].res.height = tmp_in_info.res.height / max_scale_factor_per_stage; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init(&descr->internal_out_info[i], + tmp_in_info.res.width / max_scale_factor_per_stage, + tmp_in_info.res.height / max_scale_factor_per_stage, + IA_CSS_FRAME_FORMAT_YUV420, 0); + descr->out_info[i].res.width = 0; + descr->out_info[i].res.height = 0; + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + } + tmp_in_info = descr->internal_out_info[i]; + } +ERR: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", + err); + return err; +} + +static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr *descr) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_destroy_cas_scaler_desc() enter:\n"); + kfree(descr->in_info); + descr->in_info = NULL; + kfree(descr->internal_out_info); + descr->internal_out_info = NULL; + kfree(descr->out_info); + descr->out_info = NULL; + kfree(descr->vf_info); + descr->vf_info = NULL; + kfree(descr->is_output_stage); + descr->is_output_stage = NULL; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_destroy_cas_scaler_desc() leave\n"); +} + +static enum ia_css_err +load_yuvpp_binaries(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + bool need_scaler = false; + struct ia_css_frame_info *vf_pp_in_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_yuvpp_settings *mycs; + struct ia_css_binary *next_binary; + struct ia_css_cas_binary_descr cas_scaler_descr = { }; + unsigned int i, j; + bool need_isp_copy_binary = false; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->stream != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); + + if (pipe->pipe_settings.yuvpp.copy_binary.info) + goto ERR; + + /* Set both must_be_raw and must_be_yuv to false then yuvpp can take rgb inputs */ + err = ia_css_util_check_input(&pipe->stream->config, false, false); + if (err != IA_CSS_SUCCESS) + goto ERR; + + mycs = &pipe->pipe_settings.yuvpp; + + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (pipe->vf_output_info[i].res.width != 0) { + err = ia_css_util_check_vf_out_info(&pipe->output_info[i], + &pipe->vf_output_info[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + vf_pp_in_info[i] = NULL; + } + + need_scaler = need_yuv_scaler_stage(pipe); + + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_scaler) { + struct ia_css_binary_descr yuv_scaler_descr; + + err = ia_css_pipe_create_cas_scaler_desc(pipe, + &cas_scaler_descr); + if (err != IA_CSS_SUCCESS) + goto ERR; + mycs->num_output = cas_scaler_descr.num_output_stage; + mycs->num_yuv_scaler = cas_scaler_descr.num_stage; + mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * + sizeof(struct ia_css_binary), GFP_KERNEL); + if (!mycs->yuv_scaler_binary) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage * + sizeof(bool), GFP_KERNEL); + if (!mycs->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + for (i = 0; i < cas_scaler_descr.num_stage; i++) { + mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; + ia_css_pipe_get_yuvscaler_binarydesc(pipe, + &yuv_scaler_descr, &cas_scaler_descr.in_info[i], + &cas_scaler_descr.out_info[i], + &cas_scaler_descr.internal_out_info[i], + &cas_scaler_descr.vf_info[i]); + err = ia_css_binary_find(&yuv_scaler_descr, + &mycs->yuv_scaler_binary[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + } else { + mycs->num_output = 1; + } + + if (need_scaler) { + next_binary = &mycs->yuv_scaler_binary[0]; + } else { + next_binary = NULL; + } + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + /* + * NOTES + * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when + * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? + * + * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ + * binary". However, the "yuv_scale_binary" does NOT support the input-frame + * format as "IA_CSS_STREAM _FORMAT_YUV422_8". + * + * Hence, the "isp_copy_binary" is required to be present in front of the "yuv + * _scale_binary". It would translate the input-frame to the frame formats that + * are supported by the "yuv_scale_binary". + * + * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ + * pp_defs.h" for the list of input-frame formats that are supported by the + * "yuv_scale_binary". + */ + need_isp_copy_binary = + (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8); +#else /* !USE_INPUT_SYSTEM_VERSION_2401 */ + need_isp_copy_binary = true; +#endif /* USE_INPUT_SYSTEM_VERSION_2401 */ + + if (need_isp_copy_binary) { + err = load_copy_binary(pipe, + &mycs->copy_binary, + next_binary); + + if (err != IA_CSS_SUCCESS) + goto ERR; + + /* + * NOTES + * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? + * + * In some use cases, the first stage in the "yuvpp" pipe is the + * "isp_copy_binary". The "isp_copy_binary" is designed to process + * the input from either the system DDR or from the IPU internal VMEM. + * So it provides the flag "online" to specify where its input is from, + * i.e.: + * + * (1) "online <= true", the input is from the IPU internal VMEM. + * (2) "online <= false", the input is from the system DDR. + * + * In other use cases, the first stage in the "yuvpp" pipe is the + * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the + * input ONLY from the system DDR. So it does not provide the flag "online" + * to specify where its input is from. + */ + pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; + } + + /* Viewfinder post-processing */ + if (need_scaler) { + for (i = 0, j = 0; i < mycs->num_yuv_scaler; i++) { + if (mycs->is_output_stage[i]) { + assert(j < 2); + vf_pp_in_info[j] = + &mycs->yuv_scaler_binary[i].vf_frame_info; + j++; + } + } + mycs->num_vf_pp = j; + } else { + vf_pp_in_info[0] = + &mycs->copy_binary.vf_frame_info; + for (i = 1; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + vf_pp_in_info[i] = NULL; + } + mycs->num_vf_pp = 1; + } + mycs->vf_pp_binary = kzalloc(mycs->num_vf_pp * sizeof(struct ia_css_binary), + GFP_KERNEL); + if (!mycs->vf_pp_binary) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + + { + struct ia_css_binary_descr vf_pp_descr; + + for (i = 0; i < mycs->num_vf_pp; i++) { + if (pipe->vf_output_info[i].res.width != 0) { + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info[i], &pipe->vf_output_info[i]); + err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + } + } + + if (err != IA_CSS_SUCCESS) + goto ERR; + +ERR: + if (need_scaler) { + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "load_yuvpp_binaries() leave, err=%d\n", + err); + return err; +} + +static enum ia_css_err +unload_yuvpp_binaries(struct ia_css_pipe *pipe) +{ + unsigned int i; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + + if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.copy_binary); + for (i = 0; i < pipe->pipe_settings.yuvpp.num_yuv_scaler; i++) { + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.yuv_scaler_binary[i]); + } + for (i = 0; i < pipe->pipe_settings.yuvpp.num_vf_pp; i++) { + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.vf_pp_binary[i]); + } + kfree(pipe->pipe_settings.yuvpp.is_output_stage); + pipe->pipe_settings.yuvpp.is_output_stage = NULL; + kfree(pipe->pipe_settings.yuvpp.yuv_scaler_binary); + pipe->pipe_settings.yuvpp.yuv_scaler_binary = NULL; + kfree(pipe->pipe_settings.yuvpp.vf_pp_binary); + pipe->pipe_settings.yuvpp.vf_pp_binary = NULL; + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) +{ + struct ia_css_binary *copy_binary; + enum ia_css_err err = IA_CSS_SUCCESS; + enum sh_css_pipe_config_override copy_ovrd; + enum ia_css_input_mode yuvpp_pipe_input_mode; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + yuvpp_pipe_input_mode = pipe->stream->config.mode; + + copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; + + sh_css_metrics_start_frame(); + + /* multi stream video needs mipi buffers */ + +#if !defined(HAS_NO_INPUT_SYSTEM) && ( defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) ) + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } +#endif + + { + unsigned int thread_id; + + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + } + + start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode); + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +sh_css_pipe_unload_binaries(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + + if (pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } + + switch (pipe->mode) { + case IA_CSS_PIPE_ID_PREVIEW: + err = unload_preview_binaries(pipe); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = unload_video_binaries(pipe); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = unload_capture_binaries(pipe); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = unload_yuvpp_binaries(pipe); + break; + default: + break; + } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + assert(pipe != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_load_binaries() enter:\n"); + + /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + return err; + + switch (pipe->mode) { + case IA_CSS_PIPE_ID_PREVIEW: + err = load_preview_binaries(pipe); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = load_video_binaries(pipe); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = load_capture_binaries(pipe); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = load_yuvpp_binaries(pipe); + break; + case IA_CSS_PIPE_ID_ACC: + break; + default: + err = IA_CSS_ERR_INTERNAL_ERROR; + break; + } + if (err != IA_CSS_SUCCESS) { + if (sh_css_pipe_unload_binaries(pipe) != IA_CSS_SUCCESS) { + /* currently css does not support multiple error returns in a single function, + * using IA_CSS_ERR_INTERNAL_ERROR in this case */ + err = IA_CSS_ERR_INTERNAL_ERROR; + } + } + return err; +} + +static enum ia_css_err +create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage *vf_pp_stage = NULL, + *copy_stage = NULL, + *yuv_scaler_stage = NULL; + struct ia_css_binary *copy_binary, + *vf_pp_binary, + *yuv_scaler_binary; + bool need_scaler = false; + unsigned int num_stage, num_vf_pp_stage, num_output_stage; + unsigned int i, j; + + struct ia_css_frame *in_frame = NULL; + struct ia_css_frame *out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame *bin_out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_pipeline_stage_desc stage_desc; + bool need_in_frameinfo_memory = false; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + bool sensor = false; + bool buffered_sensor = false; + bool online = false; + bool continuous = false; +#endif + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + me = &pipe->pipeline; + ia_css_pipeline_clean(me); + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + out_frame[i] = NULL; + vf_frame[i] = NULL; + } + ia_css_pipe_util_create_output_frames(bin_out_frame); + num_stage = pipe->pipe_settings.yuvpp.num_yuv_scaler; + num_vf_pp_stage = pipe->pipe_settings.yuvpp.num_vf_pp; + num_output_stage = pipe->pipe_settings.yuvpp.num_output; + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ + sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; + buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; + need_in_frameinfo_memory = + !((sensor && (online || continuous)) || (buffered_sensor && continuous)); +#else + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; +#endif + /* the input frame can come from: + * a) memory: connect yuvscaler to me->in_frame + * b) sensor, via copy binary: connect yuvscaler to copy binary later on */ + if (need_in_frameinfo_memory) { + /* TODO: improve for different input formats. */ + + /* + * "pipe->stream->config.input_config.format" represents the sensor output + * frame format, e.g. YUV422 8-bit. + * + * "in_frame_format" represents the imaging pipe's input frame format, e.g. + * Bayer-Quad RAW. + */ + int in_frame_format; + if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { + in_frame_format = IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8; + } else if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8) { + /* + * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", + * the "isp_copy_var" binary is selected as the first stage in the yuvpp + * pipe. + * + * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from + * the frame buffer (at DDR) to the frame-line buffer (at VMEM). + * + * By now, the "isp_copy_var" binary does NOT provide a separated + * frame-line buffer to store the YUV422-8 pixels. Instead, it stores + * the YUV422-8 pixels in the frame-line buffer which is designed to + * store the Bayer-Quad RAW pixels. + * + * To direct the "isp_copy_var" binary reading from the RAW frame-line + * buffer, its input frame format must be specified as "IA_CSS_FRAME_ + * FORMAT_RAW". + */ + in_frame_format = IA_CSS_FRAME_FORMAT_RAW; + } else { + in_frame_format = IA_CSS_FRAME_FORMAT_NV12; + } + + err = init_in_frameinfo_memory_defaults(pipe, + &me->in_frame, + in_frame_format); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + in_frame = &me->in_frame; + } else { + in_frame = NULL; + } + + for (i = 0; i < num_output_stage; i++) { + assert(i < IA_CSS_PIPE_MAX_OUTPUT_STAGE); + if (pipe->output_info[i].res.width != 0) { + err = init_out_frameinfo_defaults(pipe, &me->out_frame[i], i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + out_frame[i] = &me->out_frame[i]; + } + + /* Construct vf_frame info (only in case we have VF) */ + if (pipe->vf_output_info[i].res.width != 0) { + err = init_vf_frameinfo_defaults(pipe, &me->vf_frame[i], i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + vf_frame[i] = &me->vf_frame[i]; + } + } + + copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; + vf_pp_binary = pipe->pipe_settings.yuvpp.vf_pp_binary; + yuv_scaler_binary = pipe->pipe_settings.yuvpp.yuv_scaler_binary; + need_scaler = need_yuv_scaler_stage(pipe); + + if (pipe->pipe_settings.yuvpp.copy_binary.info) { + + struct ia_css_frame *in_frame_local = NULL; + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* After isp copy is enabled in_frame needs to be passed. */ + if (!online) + in_frame_local = in_frame; +#endif + + if (need_scaler) { + ia_css_pipe_util_set_output_frames(bin_out_frame, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + bin_out_frame, in_frame_local, NULL); + } else { + ia_css_pipe_util_set_output_frames(bin_out_frame, 0, out_frame[0]); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + bin_out_frame, in_frame_local, NULL); + } + + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ©_stage); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + if (copy_stage) { + /* if we use yuv scaler binary, vf output should be from there */ + copy_stage->args.copy_vf = !need_scaler; + /* for yuvpp pipe, it should always be enabled */ + copy_stage->args.copy_output = true; + /* connect output of copy binary to input of yuv scaler */ + in_frame = copy_stage->args.out_frame[0]; + } + } + + if (need_scaler) { + struct ia_css_frame *tmp_out_frame = NULL; + struct ia_css_frame *tmp_vf_frame = NULL; + struct ia_css_frame *tmp_in_frame = in_frame; + + for (i = 0, j = 0; i < num_stage; i++) { + assert(j < num_output_stage); + if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { + tmp_out_frame = out_frame[j]; + tmp_vf_frame = vf_frame[j]; + } else { + tmp_out_frame = NULL; + tmp_vf_frame = NULL; + } + + err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, + NULL, + &yuv_scaler_binary[i], + &yuv_scaler_stage); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* we use output port 1 as internal output port */ + tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; + if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { + if (tmp_vf_frame && (tmp_vf_frame->info.res.width != 0)) { + in_frame = yuv_scaler_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, tmp_vf_frame, &vf_pp_binary[j], + &vf_pp_stage); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + j++; + } + } + } else if (copy_stage != NULL) { + if (vf_frame[0] != NULL && vf_frame[0]->info.res.width != 0) { + in_frame = copy_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, vf_frame[0], &vf_pp_binary[0], + &vf_pp_stage); + } + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +create_host_copy_pipeline(struct ia_css_pipe *pipe, + unsigned max_input_width, + struct ia_css_frame *out_frame) +{ + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage_desc stage_desc; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_copy_pipeline() enter:\n"); + + /* pipeline already created as part of create_host_pipeline_structure */ + me = &pipe->pipeline; + ia_css_pipeline_clean(me); + + /* Construct out_frame info */ + out_frame->contiguous = false; + out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { + ia_css_frame_info_init( + &out_frame->info, + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + } else if (out_frame->info.format == IA_CSS_FRAME_FORMAT_RAW) { + out_frame->info.raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); + } + + me->num_stages = 1; + me->pipe_id = IA_CSS_PIPE_ID_COPY; + pipe->mode = IA_CSS_PIPE_ID_COPY; + + ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, + IA_CSS_PIPELINE_RAW_COPY, max_input_width); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); + + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_copy_pipeline() leave:\n"); + + return err; +} + +static enum ia_css_err +create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline *me = &pipe->pipeline; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage_desc stage_desc; + struct ia_css_frame *out_frame = &me->out_frame[0]; + struct ia_css_pipeline_stage *out_stage = NULL; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + unsigned int max_input_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_isyscopy_capture_pipeline() enter:\n"); + ia_css_pipeline_clean(me); + + /* Construct out_frame info */ + err = sh_css_pipe_get_output_frame_info(pipe, &out_frame->info, 0); + if (err != IA_CSS_SUCCESS) + return err; + out_frame->contiguous = false; + out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, &queue_id); + out_frame->dynamic_queue_id = queue_id; + out_frame->buf_type = IA_CSS_BUFFER_TYPE_OUTPUT_FRAME; + + me->num_stages = 1; + me->pipe_id = IA_CSS_PIPE_ID_CAPTURE; + pipe->mode = IA_CSS_PIPE_ID_CAPTURE; + ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, + IA_CSS_PIPELINE_ISYS_COPY, max_input_width); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, &out_stage); + if(err != IA_CSS_SUCCESS) + return err; + + ia_css_pipeline_finalize_stages(me, pipe->stream->config.continuous); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_isyscopy_capture_pipeline() leave:\n"); + + return err; +} + +static enum ia_css_err +create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_capture_mode mode; + struct ia_css_pipeline_stage *current_stage = NULL; + struct ia_css_pipeline_stage *yuv_scaler_stage = NULL; + struct ia_css_binary *copy_binary, + *primary_binary[MAX_NUM_PRIMARY_STAGES], + *vf_pp_binary, + *pre_isp_binary, + *anr_gdc_binary, + *post_isp_binary, + *yuv_scaler_binary, + *capture_pp_binary, + *capture_ldc_binary; + bool need_pp = false; + bool raw; + + struct ia_css_frame *in_frame; + struct ia_css_frame *out_frame; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame; + struct ia_css_pipeline_stage_desc stage_desc; + bool need_in_frameinfo_memory = false; +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + bool sensor = false; + bool buffered_sensor = false; + bool online = false; + bool continuous = false; +#endif + unsigned int i, num_yuv_scaler, num_primary_stage; + bool need_yuv_pp = false; + bool *is_output_stage = NULL; + bool need_ldc = false; + + IA_CSS_ENTER_PRIVATE(""); + assert(pipe != NULL); + assert(pipe->stream != NULL); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + + me = &pipe->pipeline; + mode = pipe->config.default_capture_config.mode; + raw = (mode == IA_CSS_CAPTURE_MODE_RAW); + ia_css_pipeline_clean(me); + ia_css_pipe_util_create_output_frames(out_frames); + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ + sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); + buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; + need_in_frameinfo_memory = + !((sensor && (online || continuous)) || (buffered_sensor && (online || continuous))); +#else + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; +#endif + if (need_in_frameinfo_memory) { + err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, IA_CSS_FRAME_FORMAT_RAW); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + in_frame = &me->in_frame; + } else { + in_frame = NULL; + } + + err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + out_frame = &me->out_frame[0]; + + /* Construct vf_frame info (only in case we have VF) */ + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { + if (mode == IA_CSS_CAPTURE_MODE_RAW || mode == IA_CSS_CAPTURE_MODE_BAYER) { + /* These modes don't support viewfinder output */ + vf_frame = NULL; + } else { + init_vf_frameinfo_defaults(pipe, &me->vf_frame[0], 0); + vf_frame = &me->vf_frame[0]; + } + } else { + vf_frame = NULL; + } + + copy_binary = &pipe->pipe_settings.capture.copy_binary; + num_primary_stage = pipe->pipe_settings.capture.num_primary_stage; + if ((num_primary_stage == 0) && (mode == IA_CSS_CAPTURE_MODE_PRIMARY)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + for (i = 0; i < num_primary_stage; i++) { + primary_binary[i] = &pipe->pipe_settings.capture.primary_binary[i]; + } + vf_pp_binary = &pipe->pipe_settings.capture.vf_pp_binary; + pre_isp_binary = &pipe->pipe_settings.capture.pre_isp_binary; + anr_gdc_binary = &pipe->pipe_settings.capture.anr_gdc_binary; + post_isp_binary = &pipe->pipe_settings.capture.post_isp_binary; + capture_pp_binary = &pipe->pipe_settings.capture.capture_pp_binary; + yuv_scaler_binary = pipe->pipe_settings.capture.yuv_scaler_binary; + num_yuv_scaler = pipe->pipe_settings.capture.num_yuv_scaler; + is_output_stage = pipe->pipe_settings.capture.is_output_stage; + capture_ldc_binary = &pipe->pipe_settings.capture.capture_ldc_binary; + + need_pp = (need_capture_pp(pipe) || pipe->output_stage) && + mode != IA_CSS_CAPTURE_MODE_RAW && + mode != IA_CSS_CAPTURE_MODE_BAYER; + need_yuv_pp = (yuv_scaler_binary != NULL && yuv_scaler_binary->info != NULL); + need_ldc = (capture_ldc_binary != NULL && capture_ldc_binary->info != NULL); + + if (pipe->pipe_settings.capture.copy_binary.info) { + if (raw) { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) + if (!continuous) { + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, in_frame, NULL); + } else { + in_frame = pipe->stream->last_pipe->continuous_frames[0]; + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, in_frame, NULL); + } +#else + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, NULL, NULL); +#endif + } else { + ia_css_pipe_util_set_output_frames(out_frames, 0, in_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, NULL, NULL); + } + + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } else if (pipe->stream->config.continuous) { + in_frame = pipe->stream->last_pipe->continuous_frames[0]; + } + + if (mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + struct ia_css_frame *local_in_frame = NULL; + struct ia_css_frame *local_out_frame = NULL; + + for (i = 0; i < num_primary_stage; i++) { + if (i == 0) + local_in_frame = in_frame; + else + local_in_frame = NULL; +#ifndef ISP2401 + if (!need_pp && (i == num_primary_stage - 1)) +#else + if (!need_pp && (i == num_primary_stage - 1) && !need_ldc) +#endif + local_out_frame = out_frame; + else + local_out_frame = NULL; + ia_css_pipe_util_set_output_frames(out_frames, 0, local_out_frame); +/* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed from Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This * should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + * */ + ia_css_pipe_get_generic_stage_desc(&stage_desc, primary_binary[i], + out_frames, local_in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + /* If we use copy iso primary, + the input must be yuv iso raw */ + current_stage->args.copy_vf = + primary_binary[0]->info->sp.pipeline.mode == + IA_CSS_BINARY_MODE_COPY; + current_stage->args.copy_output = current_stage->args.copy_vf; + } else if (mode == IA_CSS_CAPTURE_MODE_ADVANCED || + mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, + out_frames, in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, anr_gdc_binary, + out_frames, NULL, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + if(need_pp) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, + out_frames, NULL, NULL); + } else { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, + out_frames, NULL, NULL); + } + + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } else if (mode == IA_CSS_CAPTURE_MODE_BAYER) { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, + out_frames, in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + +#ifndef ISP2401 + if (need_pp && current_stage) { + struct ia_css_frame *local_in_frame = NULL; + local_in_frame = current_stage->args.out_frame[0]; + + if(need_ldc) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, + out_frames, local_in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ¤t_stage); + local_in_frame = current_stage->args.out_frame[0]; + } + err = add_capture_pp_stage(pipe, me, local_in_frame, need_yuv_pp ? NULL : out_frame, +#else + /* ldc and capture_pp not supported in same pipeline */ + if (need_ldc && current_stage) { + in_frame = current_stage->args.out_frame[0]; + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, + out_frames, in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); + } else if (need_pp && current_stage) { + in_frame = current_stage->args.out_frame[0]; + err = add_capture_pp_stage(pipe, me, in_frame, need_yuv_pp ? NULL : out_frame, +#endif + capture_pp_binary, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + + if (need_yuv_pp && current_stage) { + struct ia_css_frame *tmp_in_frame = current_stage->args.out_frame[0]; + struct ia_css_frame *tmp_out_frame = NULL; + + for (i = 0; i < num_yuv_scaler; i++) { + if (is_output_stage[i] == true) + tmp_out_frame = out_frame; + else + tmp_out_frame = NULL; + + err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, + NULL, + &yuv_scaler_binary[i], + &yuv_scaler_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* we use output port 1 as internal output port */ + tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; + } + } + +/* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The vf-pp + * stage has been removed from Skycam in the solution provided. + * The vf-pp stage should be re-introduced when required. This + * should not be considered as a clean solution. Proper + * investigation should be done to come up with the clean solution. + * */ + if (mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER && current_stage && vf_frame) { + in_frame = current_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_regular_capture_pipeline() leave:\n"); + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +create_host_capture_pipeline(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + err = create_host_isyscopy_capture_pipeline(pipe); + else + err = create_host_regular_capture_pipeline(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + IA_CSS_LEAVE_ERR_PRIVATE(err); + + return err; +} + +static enum ia_css_err capture_start( + struct ia_css_pipe *pipe) +{ + struct ia_css_pipeline *me; + + enum ia_css_err err = IA_CSS_SUCCESS; + enum sh_css_pipe_config_override copy_ovrd; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if (pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + me = &pipe->pipeline; + + if ((pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER ) && + (pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { + if (copy_on_sp(pipe)) { + err = start_copy_on_sp(pipe, &me->out_frame[0]); + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + +#if defined(USE_INPUT_SYSTEM_VERSION_2) + /* old isys: need to send_mipi_frames() in all pipe modes */ + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } +#elif defined(USE_INPUT_SYSTEM_VERSION_2401) + if (pipe->config.mode != IA_CSS_PIPE_MODE_COPY) { + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + +#endif + + { + unsigned int thread_id; + + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + + } + start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); + +#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) + /* + * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, + * which is currently done in start_binary(); but COPY pipe contains no binary, + * and does not call start_binary(); so we need to configure the rx here. + */ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY && pipe->stream->reconfigure_css_rx) { + ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, pipe->stream->config.mode); + pipe->stream->reconfigure_css_rx = false; + } +#endif + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + +} + +static enum ia_css_err +sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx) +{ + assert(pipe != NULL); + assert(info != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_output_frame_info() enter:\n"); + + *info = pipe->output_info[idx]; + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { + ia_css_frame_info_init( + info, + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + } else if (info->format == IA_CSS_FRAME_FORMAT_RAW || + info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) { + info->raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); + + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_output_frame_info() leave:\n"); + return IA_CSS_SUCCESS; +} + +#if !defined(HAS_NO_INPUT_SYSTEM) +void +ia_css_stream_send_input_frame(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + unsigned int height) +{ + assert(stream != NULL); + + ia_css_inputfifo_send_input_frame( + data, width, height, + stream->config.channel_id, + stream->config.input_config.format, + stream->config.pixels_per_clock == 2); +} + +void +ia_css_stream_start_input_frame(const struct ia_css_stream *stream) +{ + assert(stream != NULL); + + ia_css_inputfifo_start_frame( + stream->config.channel_id, + stream->config.input_config.format, + stream->config.pixels_per_clock == 2); +} + +void +ia_css_stream_send_input_line(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2) +{ + assert(stream != NULL); + + ia_css_inputfifo_send_line(stream->config.channel_id, + data, width, data2, width2); +} + +void +ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, + enum atomisp_input_format format, + const unsigned short *data, + unsigned int width) +{ + assert(stream != NULL); + if (data == NULL || width == 0) + return; + ia_css_inputfifo_send_embedded_line(stream->config.channel_id, + format, data, width); +} + +void +ia_css_stream_end_input_frame(const struct ia_css_stream *stream) +{ + assert(stream != NULL); + + ia_css_inputfifo_end_frame(stream->config.channel_id); +} +#endif + +static void +append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) +{ + IA_CSS_ENTER_PRIVATE("l = %p, firmware = %p", l , firmware); + if (l == NULL) { + IA_CSS_ERROR("NULL fw_info"); + IA_CSS_LEAVE_PRIVATE(""); + return; + } + while (*l) + l = &(*l)->next; + *l = firmware; + /*firmware->next = NULL;*/ /* when multiple acc extensions are loaded, 'next' can be not NULL */ + IA_CSS_LEAVE_PRIVATE(""); +} + +static void +remove_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) +{ + assert(*l); + assert(firmware); + (void)l; + (void)firmware; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() enter:\n"); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() leave:\n"); + return; /* removing single and multiple firmware is handled in acc_unload_extension() */ +} + +static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware) +{ + hrt_vaddress binary; + + if (firmware == NULL) { + IA_CSS_ERROR("NULL input parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + binary = firmware->info.isp.xmem_addr; + + if (!binary) { + unsigned size = firmware->blob.size; + const unsigned char *blob; + const unsigned char *binary_name; + binary_name = + (const unsigned char *)(IA_CSS_EXT_ISP_PROG_NAME( + firmware)); + blob = binary_name + + strlen((const char *)binary_name) + + 1; + binary = sh_css_load_blob(blob, size); + firmware->info.isp.xmem_addr = binary; + } + + if (!binary) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +acc_load_extension(struct ia_css_fw_info *firmware) +{ + enum ia_css_err err; + struct ia_css_fw_info *hd = firmware; + while (hd){ + err = upload_isp_code(hd); + if (err != IA_CSS_SUCCESS) + return err; + hd = hd->next; + } + + if (firmware == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + firmware->loaded = true; + return IA_CSS_SUCCESS; +} + +static void +acc_unload_extension(struct ia_css_fw_info *firmware) +{ + struct ia_css_fw_info *hd = firmware; + struct ia_css_fw_info *hdn = NULL; + + if (firmware == NULL) /* should not happen */ + return; + /* unload and remove multiple firmwares */ + while (hd){ + hdn = (hd->next) ? &(*hd->next) : NULL; + if (hd->info.isp.xmem_addr) { + hmm_free(hd->info.isp.xmem_addr); + hd->info.isp.xmem_addr = mmgr_NULL; + } + hd->isp_code = NULL; + hd->next = NULL; + hd = hdn; + } + + firmware->loaded = false; +} +/* Load firmware for extension */ +static enum ia_css_err +ia_css_pipe_load_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); + + if ((firmware == NULL) || (pipe == NULL)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) { + if (&pipe->output_stage != NULL) + append_firmware(&pipe->output_stage, firmware); + else { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + } + else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) { + if (&pipe->vf_stage != NULL) + append_firmware(&pipe->vf_stage, firmware); + else { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + } + err = acc_load_extension(firmware); + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +/* Unload firmware for extension */ +static void +ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware) +{ + IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); + + if ((firmware == NULL) || (pipe == NULL)) { + IA_CSS_ERROR("NULL input parameters"); + IA_CSS_LEAVE_PRIVATE(""); + return; + } + + if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) + remove_firmware(&pipe->output_stage, firmware); + else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) + remove_firmware(&pipe->vf_stage, firmware); + acc_unload_extension(firmware); + + IA_CSS_LEAVE_PRIVATE(""); +} + +bool +ia_css_pipeline_uses_params(struct ia_css_pipeline *me) +{ + struct ia_css_pipeline_stage *stage; + + assert(me != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() enter: me=%p\n", me); + + for (stage = me->stages; stage; stage = stage->next) + if (stage->binary_info && stage->binary_info->enable.params) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() leave: " + "return_bool=true\n"); + return true; + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() leave: return_bool=false\n"); + return false; +} + +static enum ia_css_err +sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, + const void *acc_fw) +{ + struct ia_css_fw_info *fw = (struct ia_css_fw_info *)acc_fw; + /* In QoS case, load_extension already called, so skipping */ + enum ia_css_err err = IA_CSS_SUCCESS; + if (fw->loaded == false) + err = acc_load_extension(fw); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_pipeline_add_acc_stage() enter: pipeline=%p," + " acc_fw=%p\n", pipeline, acc_fw); + + if (err == IA_CSS_SUCCESS) { + struct ia_css_pipeline_stage_desc stage_desc; + ia_css_pipe_get_acc_stage_desc(&stage_desc, NULL, fw); + err = ia_css_pipeline_create_and_add_stage(pipeline, + &stage_desc, + NULL); + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_pipeline_add_acc_stage() leave: return_err=%d\n",err); + return err; +} + +/* + * @brief Tag a specific frame in continuous capture. + * Refer to "sh_css_internal.h" for details. + */ +enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, + unsigned int exp_id) +{ + struct sh_css_tag_descr tag_descr; + uint32_t encoded_tag_descr; + enum ia_css_err err; + + assert(stream != NULL); + IA_CSS_ENTER("exp_id=%d", exp_id); + + /* Only continuous streams have a tagger */ + if (exp_id == 0 || !stream->config.continuous) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + /* Create the tag descriptor from the parameters */ + sh_css_create_tag_descr(0, 0, 0, exp_id, &tag_descr); + /* Encode the tag descriptor into a 32-bit value */ + encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); + /* Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue */ + err= ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); + + IA_CSS_LEAVE_ERR(err); + return err; +} + +/* + * @brief Configure the continuous capture. + * Refer to "sh_css_internal.h" for details. + */ +enum ia_css_err ia_css_stream_capture( + struct ia_css_stream *stream, + int num_captures, + unsigned int skip, + int offset) +{ + struct sh_css_tag_descr tag_descr; + unsigned int encoded_tag_descr; + enum ia_css_err return_err; + + if (stream == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() enter: num_captures=%d," + " skip=%d, offset=%d\n", num_captures, skip,offset); + + /* Check if the tag descriptor is valid */ + if (num_captures < SH_CSS_MINIMUM_TAG_ID) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() leave: return_err=%d\n", + IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + /* Create the tag descriptor from the parameters */ + sh_css_create_tag_descr(num_captures, skip, offset, 0, &tag_descr); + + + /* Encode the tag descriptor into a 32-bit value */ + encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); + + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() leaving:" + "queues unavailable\n"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + /* Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue */ + return_err = ia_css_bufq_enqueue_tag_cmd((uint32_t)encoded_tag_descr); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() leave: return_err=%d\n", + return_err); + + return return_err; +} + +void ia_css_stream_request_flash(struct ia_css_stream *stream) +{ + (void)stream; + + assert(stream != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_request_flash() enter: void\n"); + +#ifndef ISP2401 + sh_css_write_host2sp_command(host2sp_cmd_start_flash); +#else + if (sh_css_sp_is_running()) { + if (!sh_css_write_host2sp_command(host2sp_cmd_start_flash)) { + IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); + ia_css_debug_dump_sp_sw_debug_info(); + ia_css_debug_dump_debug_info(NULL); + } + } else + IA_CSS_LOG("SP is not running!"); + +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_request_flash() leave: return_void\n"); +} + +static void +sh_css_init_host_sp_control_vars(void) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_ia_css_ispctrl_sp_isp_started; + + unsigned int HIVE_ADDR_host_sp_queues_initialized; + unsigned int HIVE_ADDR_sp_sleep_mode; + unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; +#ifndef ISP2401 + unsigned int HIVE_ADDR_sp_stop_copy_preview; +#endif + unsigned int HIVE_ADDR_host_sp_com; + unsigned int o = offsetof(struct host_sp_communication, host2sp_command) + / sizeof(int); + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + unsigned int i; +#endif + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_init_host_sp_control_vars() enter: void\n"); + + fw = &sh_css_sp_fw; + HIVE_ADDR_ia_css_ispctrl_sp_isp_started = fw->info.sp.isp_started; + + HIVE_ADDR_host_sp_queues_initialized = + fw->info.sp.host_sp_queues_initialized; + HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; + HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; +#ifndef ISP2401 + HIVE_ADDR_sp_stop_copy_preview = fw->info.sp.stop_copy_preview; +#endif + HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; + + (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ + + (void)HIVE_ADDR_sp_sleep_mode; + (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; +#ifndef ISP2401 + (void)HIVE_ADDR_sp_stop_copy_preview; +#endif + (void)HIVE_ADDR_host_sp_com; + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_ispctrl_sp_isp_started), + (uint32_t)(0)); + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(host_sp_queues_initialized), + (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_sleep_mode), + (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), + (uint32_t)(false)); +#ifndef ISP2401 + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_stop_copy_preview), + my_css.stop_copy_preview?(uint32_t)(1):(uint32_t)(0)); +#endif + store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); + +#if !defined(HAS_NO_INPUT_SYSTEM) + for (i = 0; i < N_CSI_PORTS; i++) { + sh_css_update_host2sp_num_mipi_frames + (my_css.num_mipi_frames[i]); + } +#endif + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_init_host_sp_control_vars() leave: return_void\n"); +} + +/* + * create the internal structures and fill in the configuration data + */ +void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_config_defaults()\n"); + *pipe_config = DEFAULT_PIPE_CONFIG; +} + +void +ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config *extra_config) +{ + if (extra_config == NULL) { + IA_CSS_ERROR("NULL input parameter"); + return; + } + + extra_config->enable_raw_binning = false; + extra_config->enable_yuv_ds = false; + extra_config->enable_high_speed = false; + extra_config->enable_dvs_6axis = false; + extra_config->enable_reduced_pipe = false; + extra_config->disable_vf_pp = false; + extra_config->enable_fractional_ds = false; +} + +void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_config_defaults()\n"); + assert(stream_config != NULL); + memset(stream_config, 0, sizeof(*stream_config)); + stream_config->online = true; + stream_config->left_padding = -1; + stream_config->pixels_per_clock = 1; + /* temporary default value for backwards compatibility. + * This field used to be hardcoded within CSS but this has now + * been moved to the stream_config struct. */ + stream_config->source.port.rxcount = 0x04040404; +} + +static enum ia_css_err +ia_css_acc_pipe_create(struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + if (pipe == NULL) { + IA_CSS_ERROR("NULL input parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + /* There is not meaning for num_execs = 0 semantically. Run atleast once. */ + if (pipe->config.acc_num_execs == 0) + pipe->config.acc_num_execs = 1; + + if (pipe->config.acc_extension) { + err = ia_css_pipe_load_extension(pipe, pipe->config.acc_extension); + } + + return err; +} + +enum ia_css_err +ia_css_pipe_create(const struct ia_css_pipe_config *config, + struct ia_css_pipe **pipe) +{ +#ifndef ISP2401 + if (config == NULL) +#else + enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER_PRIVATE("config = %p, pipe = %p", config, pipe); + + if (config == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); +#endif + return IA_CSS_ERR_INVALID_ARGUMENTS; +#ifndef ISP2401 + if (pipe == NULL) +#else + } + if (pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); +#endif + return IA_CSS_ERR_INVALID_ARGUMENTS; +#ifndef ISP2401 + return ia_css_pipe_create_extra(config, NULL, pipe); +#else + } + + err = ia_css_pipe_create_extra(config, NULL, pipe); + + if(err == IA_CSS_SUCCESS) { + IA_CSS_LOG("pipe created successfully = %p", *pipe); + } + + IA_CSS_LEAVE_ERR_PRIVATE(err); + + return err; +#endif +} + +enum ia_css_err +ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, + const struct ia_css_pipe_extra_config *extra_config, + struct ia_css_pipe **pipe) +{ + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + struct ia_css_pipe *internal_pipe = NULL; + unsigned int i; + + IA_CSS_ENTER_PRIVATE("config = %p, extra_config = %p and pipe = %p", config, extra_config, pipe); + + /* do not allow to create more than the maximum limit */ + if (my_css.pipe_counter >= IA_CSS_PIPELINE_NUM_MAX) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_EXHAUSTED); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if ((pipe == NULL) || (config == NULL)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + ia_css_debug_dump_pipe_config(config); + ia_css_debug_dump_pipe_extra_config(extra_config); + + err = create_pipe(config->mode, &internal_pipe, false); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + /* now we have a pipe structure to fill */ + internal_pipe->config = *config; + if (extra_config) + internal_pipe->extra_config = *extra_config; + else + ia_css_pipe_extra_config_defaults(&internal_pipe->extra_config); + + if (config->mode == IA_CSS_PIPE_MODE_ACC) { + /* Temporary hack to migrate acceleration to CSS 2.0. + * In the future the code for all pipe types should be + * unified. */ + *pipe = internal_pipe; + if (!internal_pipe->config.acc_extension && + internal_pipe->config.num_acc_stages == 0){ /* if no acc binary and no standalone stage */ + *pipe = NULL; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } + return ia_css_acc_pipe_create(internal_pipe); + } + + /* Use config value when dvs_frame_delay setting equal to 2, otherwise always 1 by default */ + if (internal_pipe->config.dvs_frame_delay == IA_CSS_FRAME_DELAY_2) + internal_pipe->dvs_frame_delay = 2; + else + internal_pipe->dvs_frame_delay = 1; + + + /* we still keep enable_raw_binning for backward compatibility, for any new + fractional bayer downscaling, we should use bayer_ds_out_res. if both are + specified, bayer_ds_out_res will take precedence.if none is specified, we + set bayer_ds_out_res equal to IF output resolution(IF may do cropping on + sensor output) or use default decimation factor 1. */ + if (internal_pipe->extra_config.enable_raw_binning && + internal_pipe->config.bayer_ds_out_res.width) { + /* fill some code here, if no code is needed, please remove it during integration */ + } + + /* YUV downscaling */ + if ((internal_pipe->config.vf_pp_in_res.width || + internal_pipe->config.capt_pp_in_res.width)) { + enum ia_css_frame_format format; + if (internal_pipe->config.vf_pp_in_res.width) { + format = IA_CSS_FRAME_FORMAT_YUV_LINE; + ia_css_frame_info_init( + &internal_pipe->vf_yuv_ds_input_info, + internal_pipe->config.vf_pp_in_res.width, + internal_pipe->config.vf_pp_in_res.height, + format, 0); + } + if (internal_pipe->config.capt_pp_in_res.width) { + format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init( + &internal_pipe->out_yuv_ds_input_info, + internal_pipe->config.capt_pp_in_res.width, + internal_pipe->config.capt_pp_in_res.height, + format, 0); + } + } + if (internal_pipe->config.vf_pp_in_res.width && + internal_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) { + ia_css_frame_info_init( + &internal_pipe->vf_yuv_ds_input_info, + internal_pipe->config.vf_pp_in_res.width, + internal_pipe->config.vf_pp_in_res.height, + IA_CSS_FRAME_FORMAT_YUV_LINE, 0); + } + /* handle bayer downscaling output info */ + if (internal_pipe->config.bayer_ds_out_res.width) { + ia_css_frame_info_init( + &internal_pipe->bds_output_info, + internal_pipe->config.bayer_ds_out_res.width, + internal_pipe->config.bayer_ds_out_res.height, + IA_CSS_FRAME_FORMAT_RAW, 0); + } + + /* handle output info, assume always needed */ + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (internal_pipe->config.output_info[i].res.width) { + err = sh_css_pipe_configure_output( + internal_pipe, + internal_pipe->config.output_info[i].res.width, + internal_pipe->config.output_info[i].res.height, + internal_pipe->config.output_info[i].padded_width, + internal_pipe->config.output_info[i].format, + i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + sh_css_free(internal_pipe); + internal_pipe = NULL; + return err; + } + } + + /* handle vf output info, when configured */ + internal_pipe->enable_viewfinder[i] = (internal_pipe->config.vf_output_info[i].res.width != 0); + if (internal_pipe->config.vf_output_info[i].res.width) { + err = sh_css_pipe_configure_viewfinder( + internal_pipe, + internal_pipe->config.vf_output_info[i].res.width, + internal_pipe->config.vf_output_info[i].res.height, + internal_pipe->config.vf_output_info[i].padded_width, + internal_pipe->config.vf_output_info[i].format, + i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + sh_css_free(internal_pipe); + internal_pipe = NULL; + return err; + } + } + } + if (internal_pipe->config.acc_extension) { + err = ia_css_pipe_load_extension(internal_pipe, + internal_pipe->config.acc_extension); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + sh_css_free(internal_pipe); + return err; + } + } + /* set all info to zeroes first */ + memset(&internal_pipe->info, 0, sizeof(internal_pipe->info)); + + /* all went well, return the pipe */ + *pipe = internal_pipe; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + + +enum ia_css_err +ia_css_pipe_get_info(const struct ia_css_pipe *pipe, + struct ia_css_pipe_info *pipe_info) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipe_get_info()\n"); + assert(pipe_info != NULL); + if (pipe_info == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_pipe_get_info: pipe_info cannot be NULL\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + if (pipe == NULL || pipe->stream == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_pipe_get_info: ia_css_stream_create needs to" + " be called before ia_css_[stream/pipe]_get_info\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* we succeeded return the info */ + *pipe_info = pipe->info; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_get_info() leave\n"); + return IA_CSS_SUCCESS; +} + +bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info) +{ + unsigned int i; + + if (pipe_info != NULL) { + for (i = 0; i < IA_CSS_DVS_STAT_NUM_OF_LEVELS; i++) { + if (pipe_info->grid_info.dvs_grid.dvs_stat_grid_info.grd_cfg[i].grd_start.enable) + return true; + } + } + + return false; +} + +#ifdef ISP2401 +enum ia_css_err +ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, + int pin_index, + enum ia_css_frame_format new_format) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("pipe = %p, pin_index = %d, new_formats = %d", pipe, pin_index, new_format); + + if (NULL == pipe) { + IA_CSS_ERROR("pipe is not set"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (0 != pin_index && 1 != pin_index) { + IA_CSS_ERROR("pin index is not valid"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (IA_CSS_FRAME_FORMAT_NV12_TILEY != new_format) { + IA_CSS_ERROR("new format is not valid"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } else { + err = ia_css_pipe_check_format(pipe, new_format); + if (IA_CSS_SUCCESS == err) { + if (pin_index == 0) { + pipe->output_info[0].format = new_format; + } else { + pipe->vf_output_info[0].format = new_format; + } + } + } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +#endif +#if defined(USE_INPUT_SYSTEM_VERSION_2) +/* Configuration of INPUT_SYSTEM_VERSION_2401 is done on SP */ +static enum ia_css_err +ia_css_stream_configure_rx(struct ia_css_stream *stream) +{ + struct ia_css_input_port *config; + assert(stream != NULL); + + config = &stream->config.source.port; +/* AM: this code is not reliable, especially for 2400 */ + if (config->num_lanes == 1) + stream->csi_rx_config.mode = MONO_1L_1L_0L; + else if (config->num_lanes == 2) + stream->csi_rx_config.mode = MONO_2L_1L_0L; + else if (config->num_lanes == 3) + stream->csi_rx_config.mode = MONO_3L_1L_0L; + else if (config->num_lanes == 4) + stream->csi_rx_config.mode = MONO_4L_1L_0L; + else if (config->num_lanes != 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + if (config->port > MIPI_PORT2_ID) + return IA_CSS_ERR_INVALID_ARGUMENTS; + stream->csi_rx_config.port = + ia_css_isys_port_to_mipi_port(config->port); + stream->csi_rx_config.timeout = config->timeout; + stream->csi_rx_config.initcount = 0; + stream->csi_rx_config.synccount = 0x28282828; + stream->csi_rx_config.rxcount = config->rxcount; + if (config->compression.type == IA_CSS_CSI2_COMPRESSION_TYPE_NONE) + stream->csi_rx_config.comp = MIPI_PREDICTOR_NONE; + else { + /* not implemented yet, requires extension of the rx_cfg_t + * struct */ + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + stream->csi_rx_config.is_two_ppc = (stream->config.pixels_per_clock == 2); + stream->reconfigure_css_rx = true; + return IA_CSS_SUCCESS; +} +#endif + +static struct ia_css_pipe * +find_pipe(struct ia_css_pipe *pipes[], + unsigned int num_pipes, + enum ia_css_pipe_mode mode, + bool copy_pipe) +{ + unsigned i; + assert(pipes != NULL); + for (i = 0; i < num_pipes; i++) { + assert(pipes[i] != NULL); + if (pipes[i]->config.mode != mode) + continue; + if (copy_pipe && pipes[i]->mode != IA_CSS_PIPE_ID_COPY) + continue; + return pipes[i]; + } + return NULL; +} + +static enum ia_css_err +ia_css_acc_stream_create(struct ia_css_stream *stream) +{ + int i; + enum ia_css_err err = IA_CSS_SUCCESS; + + assert(stream != NULL); + IA_CSS_ENTER_PRIVATE("stream = %p", stream); + + if (stream == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *pipe = stream->pipes[i]; + assert(pipe != NULL); + if (pipe == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe->stream = stream; + } + + /* Map SP threads before doing anything. */ + err = map_sp_threads(stream, true); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *pipe = stream->pipes[i]; + assert(pipe != NULL); + ia_css_pipe_map_queue(pipe, true); + } + + err = create_host_pipeline_structure(stream); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + stream->started = false; + + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +metadata_info_init(const struct ia_css_metadata_config *mdc, + struct ia_css_metadata_info *md) +{ + /* Either both width and height should be set or neither */ + if ((mdc->resolution.height > 0) ^ (mdc->resolution.width > 0)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + md->resolution = mdc->resolution; + /* We round up the stride to a multiple of the width + * of the port going to DDR, this is a HW requirements (DMA). */ + md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); + md->size = mdc->resolution.height * md->stride; + return IA_CSS_SUCCESS; +} + +#ifdef ISP2401 +static enum ia_css_err check_pipe_resolutions(const struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE(""); + + if (!pipe || !pipe->stream) { + IA_CSS_ERROR("null arguments"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto EXIT; + } + + if (ia_css_util_check_res(pipe->config.input_effective_res.width, + pipe->config.input_effective_res.height) != IA_CSS_SUCCESS) { + IA_CSS_ERROR("effective resolution not supported"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + if (!ia_css_util_resolution_is_zero(pipe->stream->config.input_config.input_res)) { + if (!ia_css_util_res_leq(pipe->config.input_effective_res, + pipe->stream->config.input_config.input_res)) { + IA_CSS_ERROR("effective resolution is larger than input resolution"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + } + if (!ia_css_util_resolution_is_even(pipe->config.output_info[0].res)) { + IA_CSS_ERROR("output resolution must be even"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + if (!ia_css_util_resolution_is_even(pipe->config.vf_output_info[0].res)) { + IA_CSS_ERROR("VF resolution must be even"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } +EXIT: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +#endif + +enum ia_css_err +ia_css_stream_create(const struct ia_css_stream_config *stream_config, + int num_pipes, + struct ia_css_pipe *pipes[], + struct ia_css_stream **stream) +{ + struct ia_css_pipe *curr_pipe; + struct ia_css_stream *curr_stream = NULL; + bool spcopyonly; + bool sensor_binning_changed; + int i, j; + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + struct ia_css_metadata_info md_info; +#ifndef ISP2401 + struct ia_css_resolution effective_res; +#else +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + bool aspect_ratio_crop_enabled = false; +#endif +#endif + + IA_CSS_ENTER("num_pipes=%d", num_pipes); + ia_css_debug_dump_stream_config(stream_config, num_pipes); + + /* some checks */ + if (num_pipes == 0 || + stream == NULL || + pipes == NULL) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } + +#if defined(USE_INPUT_SYSTEM_VERSION_2) + /* We don't support metadata for JPEG stream, since they both use str2mem */ + if (stream_config->input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8 && + stream_config->metadata_config.resolution.height > 0) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } +#endif + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + if (stream_config->online && stream_config->pack_raw_pixels) { + IA_CSS_LOG("online and pack raw is invalid on input system 2401"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) + ia_css_debug_pipe_graph_dump_stream_config(stream_config); + + /* check if mipi size specified */ + if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + if (!stream_config->online) +#endif + { + unsigned int port = (unsigned int) stream_config->source.port.port; + if (port >= N_MIPI_PORT_ID) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } + + if (my_css.size_mem_words != 0){ + my_css.mipi_frame_size[port] = my_css.size_mem_words; + } else if (stream_config->mipi_buffer_config.size_mem_words != 0) { + my_css.mipi_frame_size[port] = stream_config->mipi_buffer_config.size_mem_words; + } else { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_create() exit: error, need to set mipi frame size.\n"); + assert(stream_config->mipi_buffer_config.size_mem_words != 0); + err = IA_CSS_ERR_INTERNAL_ERROR; + IA_CSS_LEAVE_ERR(err); + return err; + } + + if (my_css.size_mem_words != 0) { + my_css.num_mipi_frames[port] = 2; /* Temp change: Default for backwards compatibility. */ + } else if (stream_config->mipi_buffer_config.nof_mipi_buffers != 0) { + my_css.num_mipi_frames[port] = stream_config->mipi_buffer_config.nof_mipi_buffers; + } else { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_create() exit: error, need to set number of mipi frames.\n"); + assert(stream_config->mipi_buffer_config.nof_mipi_buffers != 0); + err = IA_CSS_ERR_INTERNAL_ERROR; + IA_CSS_LEAVE_ERR(err); + return err; + } + + } +#endif + + /* Currently we only supported metadata up to a certain size. */ + err = metadata_info_init(&stream_config->metadata_config, &md_info); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + + /* allocate the stream instance */ + curr_stream = kmalloc(sizeof(struct ia_css_stream), GFP_KERNEL); + if (!curr_stream) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + IA_CSS_LEAVE_ERR(err); + return err; + } + /* default all to 0 */ + memset(curr_stream, 0, sizeof(struct ia_css_stream)); + curr_stream->info.metadata_info = md_info; + + /* allocate pipes */ + curr_stream->num_pipes = num_pipes; + curr_stream->pipes = kzalloc(num_pipes * sizeof(struct ia_css_pipe *), GFP_KERNEL); + if (!curr_stream->pipes) { + curr_stream->num_pipes = 0; + kfree(curr_stream); + curr_stream = NULL; + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + IA_CSS_LEAVE_ERR(err); + return err; + } + /* store pipes */ + spcopyonly = (num_pipes == 1) && (pipes[0]->config.mode == IA_CSS_PIPE_MODE_COPY); + for (i = 0; i < num_pipes; i++) + curr_stream->pipes [i] = pipes[i]; + curr_stream->last_pipe = curr_stream->pipes[0]; + /* take over stream config */ + curr_stream->config = *stream_config; + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) && defined(CSI2P_DISABLE_ISYS2401_ONLINE_MODE) + if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR && + stream_config->online) + curr_stream->config.online = false; +#endif + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + if (curr_stream->config.online) { + curr_stream->config.source.port.num_lanes = stream_config->source.port.num_lanes; + curr_stream->config.mode = IA_CSS_INPUT_MODE_BUFFERED_SENSOR; + } +#endif + /* in case driver doesn't configure init number of raw buffers, configure it here */ + if (curr_stream->config.target_num_cont_raw_buf == 0) + curr_stream->config.target_num_cont_raw_buf = NUM_CONTINUOUS_FRAMES; + if (curr_stream->config.init_num_cont_raw_buf == 0) + curr_stream->config.init_num_cont_raw_buf = curr_stream->config.target_num_cont_raw_buf; + + /* Enable locking & unlocking of buffers in RAW buffer pool */ + if (curr_stream->config.ia_css_enable_raw_buffer_locking) + sh_css_sp_configure_enable_raw_pool_locking( + curr_stream->config.lock_all); + + /* copy mode specific stuff */ + switch (curr_stream->config.mode) { + case IA_CSS_INPUT_MODE_SENSOR: + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: +#if defined(USE_INPUT_SYSTEM_VERSION_2) + ia_css_stream_configure_rx(curr_stream); +#endif + break; + case IA_CSS_INPUT_MODE_TPG: +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + IA_CSS_LOG("tpg_configuration: x_mask=%d, y_mask=%d, x_delta=%d, y_delta=%d, xy_mask=%d", + curr_stream->config.source.tpg.x_mask, + curr_stream->config.source.tpg.y_mask, + curr_stream->config.source.tpg.x_delta, + curr_stream->config.source.tpg.y_delta, + curr_stream->config.source.tpg.xy_mask); + + sh_css_sp_configure_tpg( + curr_stream->config.source.tpg.x_mask, + curr_stream->config.source.tpg.y_mask, + curr_stream->config.source.tpg.x_delta, + curr_stream->config.source.tpg.y_delta, + curr_stream->config.source.tpg.xy_mask); +#endif + break; + case IA_CSS_INPUT_MODE_PRBS: +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + IA_CSS_LOG("mode prbs"); + sh_css_sp_configure_prbs(curr_stream->config.source.prbs.seed); +#endif + break; + case IA_CSS_INPUT_MODE_MEMORY: + IA_CSS_LOG("mode memory"); + curr_stream->reconfigure_css_rx = false; + break; + default: + IA_CSS_LOG("mode sensor/default"); + } + +#ifdef ISP2401 +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + err = aspect_ratio_crop_init(curr_stream, + pipes, + &aspect_ratio_crop_enabled); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } +#endif + +#endif + for (i = 0; i < num_pipes; i++) { +#ifdef ISP2401 + struct ia_css_resolution effective_res; +#endif + curr_pipe = pipes[i]; + /* set current stream */ + curr_pipe->stream = curr_stream; + /* take over effective info */ + + effective_res = curr_pipe->config.input_effective_res; + if (effective_res.height == 0 || effective_res.width == 0) { + effective_res = curr_pipe->stream->config.input_config.effective_res; +#ifdef ISP2401 + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + /* The aspect ratio cropping is currently only + * supported on the new input system. */ + if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { + + struct ia_css_resolution crop_res; + + err = aspect_ratio_crop(curr_pipe, &crop_res); + if (err == IA_CSS_SUCCESS) { + effective_res = crop_res; + } else { + /* in case of error fallback to default + * effective resolution from driver. */ + IA_CSS_LOG("aspect_ratio_crop() failed with err(%d)", err); + } + } +#endif +#endif + curr_pipe->config.input_effective_res = effective_res; + } + IA_CSS_LOG("effective_res=%dx%d", + effective_res.width, + effective_res.height); + } + +#ifdef ISP2401 + for (i = 0; i < num_pipes; i++) { + if (pipes[i]->config.mode != IA_CSS_PIPE_MODE_ACC && + pipes[i]->config.mode != IA_CSS_PIPE_MODE_COPY) { + err = check_pipe_resolutions(pipes[i]); + if (err != IA_CSS_SUCCESS) { + goto ERR; + } + } + } + +#endif + err = ia_css_stream_isp_parameters_init(curr_stream); + if (err != IA_CSS_SUCCESS) + goto ERR; + IA_CSS_LOG("isp_params_configs: %p", curr_stream->isp_params_configs); + + if (num_pipes == 1 && pipes[0]->config.mode == IA_CSS_PIPE_MODE_ACC) { + *stream = curr_stream; + err = ia_css_acc_stream_create(curr_stream); + goto ERR; + } + /* sensor binning */ + if (!spcopyonly){ + sensor_binning_changed = + sh_css_params_set_binning_factor(curr_stream, curr_stream->config.sensor_binning_factor); + } else { + sensor_binning_changed = false; + } + + IA_CSS_LOG("sensor_binning=%d, changed=%d", + curr_stream->config.sensor_binning_factor, sensor_binning_changed); + /* loop over pipes */ + IA_CSS_LOG("num_pipes=%d", num_pipes); + curr_stream->cont_capt = false; + /* Temporary hack: we give the preview pipe a reference to the capture + * pipe in continuous capture mode. */ + if (curr_stream->config.continuous) { + /* Search for the preview pipe and create the copy pipe */ + struct ia_css_pipe *preview_pipe; + struct ia_css_pipe *video_pipe; + struct ia_css_pipe *acc_pipe; + struct ia_css_pipe *capture_pipe = NULL; + struct ia_css_pipe *copy_pipe = NULL; + + if (num_pipes >= 2) { + curr_stream->cont_capt = true; + curr_stream->disable_cont_vf = curr_stream->config.disable_cont_viewfinder; +#ifndef ISP2401 + curr_stream->stop_copy_preview = my_css.stop_copy_preview; +#endif + } + + /* Create copy pipe here, since it may not be exposed to the driver */ + preview_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_PREVIEW, false); + video_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_VIDEO, false); + acc_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_ACC, false); + if (acc_pipe && num_pipes == 2 && curr_stream->cont_capt == true) + curr_stream->cont_capt = false; /* preview + QoS case will not need cont_capt switch */ + if (curr_stream->cont_capt == true) { + capture_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_CAPTURE, false); + if (capture_pipe == NULL) { + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } + } + /* We do not support preview and video pipe at the same time */ + if (preview_pipe && video_pipe) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto ERR; + } + + if (preview_pipe && !preview_pipe->pipe_settings.preview.copy_pipe) { + err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); + if (err != IA_CSS_SUCCESS) + goto ERR; + ia_css_pipe_config_defaults(©_pipe->config); + preview_pipe->pipe_settings.preview.copy_pipe = copy_pipe; + copy_pipe->stream = curr_stream; + } + if (preview_pipe && (curr_stream->cont_capt == true)) { + preview_pipe->pipe_settings.preview.capture_pipe = capture_pipe; + } + if (video_pipe && !video_pipe->pipe_settings.video.copy_pipe) { + err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); + if (err != IA_CSS_SUCCESS) + goto ERR; + ia_css_pipe_config_defaults(©_pipe->config); + video_pipe->pipe_settings.video.copy_pipe = copy_pipe; + copy_pipe->stream = curr_stream; + } + if (video_pipe && (curr_stream->cont_capt == true)) { + video_pipe->pipe_settings.video.capture_pipe = capture_pipe; + } + if (preview_pipe && acc_pipe) { + preview_pipe->pipe_settings.preview.acc_pipe = acc_pipe; + } + } + for (i = 0; i < num_pipes; i++) { + curr_pipe = pipes[i]; + /* set current stream */ + curr_pipe->stream = curr_stream; +#ifndef ISP2401 + /* take over effective info */ + + effective_res = curr_pipe->config.input_effective_res; + err = ia_css_util_check_res( + effective_res.width, + effective_res.height); + if (err != IA_CSS_SUCCESS) + goto ERR; +#endif + /* sensor binning per pipe */ + if (sensor_binning_changed) + sh_css_pipe_free_shading_table(curr_pipe); + } + + /* now pipes have been configured, info should be available */ + for (i = 0; i < num_pipes; i++) { + struct ia_css_pipe_info *pipe_info = NULL; + curr_pipe = pipes[i]; + + err = sh_css_pipe_load_binaries(curr_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; + + /* handle each pipe */ + pipe_info = &curr_pipe->info; + for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { + err = sh_css_pipe_get_output_frame_info(curr_pipe, + &pipe_info->output_info[j], j); + if (err != IA_CSS_SUCCESS) + goto ERR; + } +#ifdef ISP2401 + pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; +#endif + if (!spcopyonly){ + err = sh_css_pipe_get_shading_info(curr_pipe, +#ifndef ISP2401 + &pipe_info->shading_info); +#else + &pipe_info->shading_info, &curr_pipe->config); +#endif + if (err != IA_CSS_SUCCESS) + goto ERR; + err = sh_css_pipe_get_grid_info(curr_pipe, + &pipe_info->grid_info); + if (err != IA_CSS_SUCCESS) + goto ERR; + for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { + sh_css_pipe_get_viewfinder_frame_info(curr_pipe, + &pipe_info->vf_output_info[j], j); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + } + + my_css.active_pipes[ia_css_pipe_get_pipe_num(curr_pipe)] = curr_pipe; + } + + curr_stream->started = false; + + /* Map SP threads before doing anything. */ + err = map_sp_threads(curr_stream, true); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LOG("map_sp_threads: return_err=%d", err); + goto ERR; + } + + for (i = 0; i < num_pipes; i++) { + curr_pipe = pipes[i]; + ia_css_pipe_map_queue(curr_pipe, true); + } + + /* Create host side pipeline objects without stages */ + err = create_host_pipeline_structure(curr_stream); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LOG("create_host_pipeline_structure: return_err=%d", err); + goto ERR; + } + + /* assign curr_stream */ + *stream = curr_stream; + +ERR: +#ifndef ISP2401 + if (err == IA_CSS_SUCCESS) + { + /* working mode: enter into the seed list */ + if (my_css_save.mode == sh_css_mode_working) { + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) + if (!my_css_save.stream_seeds[i].stream) { + IA_CSS_LOG("entered stream into loc=%d", i); + my_css_save.stream_seeds[i].orig_stream = stream; + my_css_save.stream_seeds[i].stream = curr_stream; + my_css_save.stream_seeds[i].num_pipes = num_pipes; + my_css_save.stream_seeds[i].stream_config = *stream_config; + for (j = 0; j < num_pipes; j++) { + my_css_save.stream_seeds[i].pipe_config[j] = pipes[j]->config; + my_css_save.stream_seeds[i].pipes[j] = pipes[j]; + my_css_save.stream_seeds[i].orig_pipes[j] = &pipes[j]; + } + break; + } + } +#else + if (err == IA_CSS_SUCCESS) { + err = ia_css_save_stream(curr_stream); +#endif + } else { + ia_css_stream_destroy(curr_stream); + } +#ifndef ISP2401 + IA_CSS_LEAVE("return_err=%d mode=%d", err, my_css_save.mode); +#else + IA_CSS_LEAVE("return_err=%d", err); +#endif + return err; +} + +enum ia_css_err +ia_css_stream_destroy(struct ia_css_stream *stream) +{ + int i; + enum ia_css_err err = IA_CSS_SUCCESS; +#ifdef ISP2401 + enum ia_css_err err1 = IA_CSS_SUCCESS; + enum ia_css_err err2 = IA_CSS_SUCCESS; +#endif + + IA_CSS_ENTER_PRIVATE("stream = %p", stream); + if (stream == NULL) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + ia_css_stream_isp_parameters_uninit(stream); + + if ((stream->last_pipe != NULL) && + ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) { +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *entry = stream->pipes[i]; + unsigned int sp_thread_id; + struct sh_css_sp_pipeline_terminal *sp_pipeline_input_terminal; + + assert(entry != NULL); + if (entry != NULL) { + /* get the SP thread id */ + if (ia_css_pipeline_get_sp_thread_id( + ia_css_pipe_get_pipe_num(entry), &sp_thread_id) != true) + return IA_CSS_ERR_INTERNAL_ERROR; + /* get the target input terminal */ + sp_pipeline_input_terminal = + &(sh_css_sp_group.pipe_io[sp_thread_id].input); + + for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { + ia_css_isys_stream_h isys_stream = + &(sp_pipeline_input_terminal->context.virtual_input_system_stream[i]); + if (stream->config.isys_config[i].valid && isys_stream->valid) + ia_css_isys_stream_destroy(isys_stream); + } + } + } +#ifndef ISP2401 + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { +#else + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || + stream->config.mode == IA_CSS_INPUT_MODE_TPG || + stream->config.mode == IA_CSS_INPUT_MODE_PRBS) { +#endif + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *entry = stream->pipes[i]; + /* free any mipi frames that are remaining: + * some test stream create-destroy cycles do not generate output frames + * and the mipi buffer is not freed in the deque function + */ + if (entry != NULL) + free_mipi_frames(entry); + } + } + stream_unregister_with_csi_rx(stream); +#endif + + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *curr_pipe = stream->pipes[i]; + assert(curr_pipe != NULL); + ia_css_pipe_map_queue(curr_pipe, false); + } + + err = map_sp_threads(stream, false); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + + /* remove references from pipes to stream */ + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *entry = stream->pipes[i]; + assert(entry != NULL); + if (entry != NULL) { + /* clear reference to stream */ + entry->stream = NULL; + /* check internal copy pipe */ + if (entry->mode == IA_CSS_PIPE_ID_PREVIEW && + entry->pipe_settings.preview.copy_pipe) { + IA_CSS_LOG("clearing stream on internal preview copy pipe"); + entry->pipe_settings.preview.copy_pipe->stream = NULL; + } + if (entry->mode == IA_CSS_PIPE_ID_VIDEO && + entry->pipe_settings.video.copy_pipe) { + IA_CSS_LOG("clearing stream on internal video copy pipe"); + entry->pipe_settings.video.copy_pipe->stream = NULL; + } + err = sh_css_pipe_unload_binaries(entry); + } + } + /* free associated memory of stream struct */ + kfree(stream->pipes); + stream->pipes = NULL; + stream->num_pipes = 0; +#ifndef ISP2401 + /* working mode: take out of the seed list */ + if (my_css_save.mode == sh_css_mode_working) + for(i=0;iinfo; + return IA_CSS_SUCCESS; +} + +/* + * Rebuild a stream, including allocating structs, setting configuration and + * building the required pipes. + * The data is taken from the css_save struct updated upon stream creation. + * The stream handle is used to identify the correct entry in the css_save struct + */ +enum ia_css_err +ia_css_stream_load(struct ia_css_stream *stream) +{ +#ifndef ISP2401 + int i; + enum ia_css_err err; + assert(stream != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() enter, \n"); + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { + if (my_css_save.stream_seeds[i].stream == stream) { + int j; + for ( j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { + if ((err = ia_css_pipe_create(&(my_css_save.stream_seeds[i].pipe_config[j]), &my_css_save.stream_seeds[i].pipes[j])) != IA_CSS_SUCCESS) { + if (j) { + int k; + for(k=0;klast_pipe == NULL)) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + IA_CSS_LOG("starting %d", stream->last_pipe->mode); + + sh_css_sp_set_disable_continuous_viewfinder(stream->disable_cont_vf); + + /* Create host side pipeline. */ + err = create_host_pipeline(stream); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR(err); + return err; + } + +#if !defined(HAS_NO_INPUT_SYSTEM) +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + if((stream->config.mode == IA_CSS_INPUT_MODE_SENSOR) || + (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) + stream_register_with_csi_rx(stream); +#endif +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + /* Initialize mipi size checks */ + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { + unsigned int idx; + unsigned int port = (unsigned int) (stream->config.source.port.port) ; + + for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { + sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = sh_css_get_mipi_sizes_for_check(port, idx); + } + } +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) + if (stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) { + err = sh_css_config_input_network(stream); + if (err != IA_CSS_SUCCESS) + return err; + } +#endif /* !HAS_NO_INPUT_SYSTEM */ + + err = sh_css_pipe_start(stream); + IA_CSS_LEAVE_ERR(err); + return err; +} + +enum ia_css_err +ia_css_stream_stop(struct ia_css_stream *stream) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop() enter/exit\n"); + assert(stream != NULL); + assert(stream->last_pipe != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop: stopping %d\n", + stream->last_pipe->mode); + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + /* De-initialize mipi size checks */ + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { + unsigned int idx; + unsigned int port = (unsigned int) (stream->config.source.port.port) ; + + for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { + sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = 0; + } + } +#endif +#ifndef ISP2401 + err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); +#else + + err = sh_css_pipes_stop(stream); +#endif + if (err != IA_CSS_SUCCESS) + return err; + + /* Ideally, unmapping should happen after pipeline_stop, but current + * semantics do not allow that. */ + /* err = map_sp_threads(stream, false); */ + + return err; +} + +bool +ia_css_stream_has_stopped(struct ia_css_stream *stream) +{ + bool stopped; + assert(stream != NULL); + +#ifndef ISP2401 + stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); +#else + stopped = sh_css_pipes_have_stopped(stream); +#endif + + return stopped; +} + +#ifndef ISP2401 +/* + * Destroy the stream and all the pipes related to it. + * The stream handle is used to identify the correct entry in the css_save struct + */ +enum ia_css_err +ia_css_stream_unload(struct ia_css_stream *stream) +{ + int i; + assert(stream != NULL); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() enter, \n"); + /* some checks */ + assert (stream != NULL); + for(i=0;imode; + else + *pipe_id = IA_CSS_PIPE_ID_COPY; + + return IA_CSS_SUCCESS; +} + +enum atomisp_input_format +ia_css_stream_get_format(const struct ia_css_stream *stream) +{ + return stream->config.input_config.format; +} + +bool +ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream) +{ + return (stream->config.pixels_per_clock == 2); +} + +struct ia_css_binary * +ia_css_stream_get_shading_correction_binary(const struct ia_css_stream *stream) +{ + struct ia_css_pipe *pipe; + + assert(stream != NULL); + + pipe = stream->pipes[0]; + + if (stream->num_pipes == 2) { + assert(stream->pipes[1] != NULL); + if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || + stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + pipe = stream->pipes[1]; + } + + return ia_css_pipe_get_shading_correction_binary(pipe); +} + +struct ia_css_binary * +ia_css_stream_get_dvs_binary(const struct ia_css_stream *stream) +{ + int i; + struct ia_css_pipe *video_pipe = NULL; + + /* First we find the video pipe */ + for (i=0; inum_pipes; i++) { + struct ia_css_pipe *pipe = stream->pipes[i]; + if (pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { + video_pipe = pipe; + break; + } + } + if (video_pipe) + return &video_pipe->pipe_settings.video.video_binary; + return NULL; +} + +struct ia_css_binary * +ia_css_stream_get_3a_binary(const struct ia_css_stream *stream) +{ + struct ia_css_pipe *pipe; + struct ia_css_binary *s3a_binary = NULL; + + assert(stream != NULL); + + pipe = stream->pipes[0]; + + if (stream->num_pipes == 2) { + assert(stream->pipes[1] != NULL); + if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || + stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + pipe = stream->pipes[1]; + } + + s3a_binary = ia_css_pipe_get_s3a_binary(pipe); + + return s3a_binary; +} + + +enum ia_css_err +ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, unsigned int output_padded_width) +{ + struct ia_css_pipe *pipe; + + assert(stream != NULL); + + pipe = stream->last_pipe; + + assert(pipe != NULL); + + /* set the config also just in case (redundant info? why do we save config in pipe?) */ + pipe->config.output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; + pipe->output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; + + return IA_CSS_SUCCESS; +} + +static struct ia_css_binary * +ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe) +{ + struct ia_css_binary *binary = NULL; + + assert(pipe != NULL); + + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; + break; + case IA_CSS_PIPE_MODE_VIDEO: + binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + unsigned int i; + + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.sc) { + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; + break; + } + } + } + else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { + if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; + } + break; + default: + break; + } + + if (binary && binary->info->sp.enable.sc) + return binary; + + return NULL; +} + +static struct ia_css_binary * +ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) +{ + struct ia_css_binary *binary = NULL; + + assert(pipe != NULL); + + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + binary = (struct ia_css_binary*)&pipe->pipe_settings.preview.preview_binary; + break; + case IA_CSS_PIPE_MODE_VIDEO: + binary = (struct ia_css_binary*)&pipe->pipe_settings.video.video_binary; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + unsigned int i; + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; + break; + } + } + } + else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { + if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; + else + assert(0); + } + break; + default: + break; + } + + if (binary && !binary->info->sp.enable.s3a) + binary = NULL; + + return binary; +} + +static struct ia_css_binary * +ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe) +{ + struct ia_css_binary *binary = NULL; + + assert(pipe != NULL); + + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_VIDEO: + binary = (struct ia_css_binary*)&pipe->pipe_settings.video.video_binary; + break; + default: + break; + } + + if (binary && !binary->info->sp.enable.dis) + binary = NULL; + + return binary; +} + +struct ia_css_pipeline * +ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe) +{ + assert(pipe != NULL); + + return (struct ia_css_pipeline*)&pipe->pipeline; +} + +unsigned int +ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) +{ + assert(pipe != NULL); + + /* KW was not sure this function was not returning a value + that was out of range; so added an assert, and, for the + case when asserts are not enabled, clip to the largest + value; pipe_num is unsigned so the value cannot be too small + */ + assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX); + + if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX) + return (IA_CSS_PIPELINE_NUM_MAX - 1); + + return pipe->pipe_num; +} + + +unsigned int +ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe) +{ + assert(pipe != NULL); + + return (unsigned int)pipe->config.isp_pipe_version; +} + +#define SP_START_TIMEOUT_US 30000000 + +enum ia_css_err +ia_css_start_sp(void) +{ + unsigned long timeout; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER(""); + sh_css_sp_start_isp(); + + /* waiting for the SP is completely started */ + timeout = SP_START_TIMEOUT_US; + while((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout) { + timeout--; + hrt_sleep(); + } + if (timeout == 0) { + IA_CSS_ERROR("timeout during SP initialization"); + return IA_CSS_ERR_INTERNAL_ERROR; + } + + /* Workaround, in order to run two streams in parallel. See TASK 4271*/ + /* TODO: Fix this. */ + + sh_css_init_host_sp_control_vars(); + + /* buffers should be initialized only when sp is started */ + /* AM: At the moment it will be done only when there is no stream active. */ + + sh_css_setup_queues(); + ia_css_bufq_dump_queue_info(); + +#ifdef ISP2401 + if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ + ia_css_set_system_mode(IA_CSS_SYS_MODE_WORKING); + } +#endif + IA_CSS_LEAVE_ERR(err); + return err; +} + +/* + * Time to wait SP for termincate. Only condition when this can happen + * is a fatal hw failure, but we must be able to detect this and emit + * a proper error trace. + */ +#define SP_SHUTDOWN_TIMEOUT_US 200000 + +enum ia_css_err +ia_css_stop_sp(void) +{ + unsigned long timeout; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER("void"); + + if (!sh_css_sp_is_running()) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE("SP already stopped : return_err=%d", err); + + /* Return an error - stop SP should not have been called by driver */ + return err; + } + + /* For now, stop whole SP */ +#ifndef ISP2401 + sh_css_write_host2sp_command(host2sp_cmd_terminate); +#else + if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) { + IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); + ia_css_debug_dump_sp_sw_debug_info(); + ia_css_debug_dump_debug_info(NULL); + } +#endif + sh_css_sp_set_sp_running(false); + + timeout = SP_SHUTDOWN_TIMEOUT_US; + while (!ia_css_spctrl_is_idle(SP0_ID) && timeout) { + timeout--; + hrt_sleep(); + } + if ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_TERMINATED)) + IA_CSS_WARNING("SP has not terminated (SW)"); + + if (timeout == 0) { + IA_CSS_WARNING("SP is not idle"); + ia_css_debug_dump_sp_sw_debug_info(); + } + timeout = SP_SHUTDOWN_TIMEOUT_US; + while (!isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT) && timeout) { + timeout--; + hrt_sleep(); + } + if (timeout == 0) { + IA_CSS_WARNING("ISP is not idle"); + ia_css_debug_dump_sp_sw_debug_info(); + } + + sh_css_hmm_buffer_record_uninit(); + +#ifndef ISP2401 + /* clear pending param sets from refcount */ + sh_css_param_clear_param_sets(); +#else + if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ + /* clear pending param sets from refcount */ + sh_css_param_clear_param_sets(); + ia_css_set_system_mode(IA_CSS_SYS_MODE_INIT); /* System is initialized but not 'running' */ + } +#endif + + IA_CSS_LEAVE_ERR(err); + return err; +} + +enum ia_css_err +ia_css_update_continuous_frames(struct ia_css_stream *stream) +{ + struct ia_css_pipe *pipe; + unsigned int i; + + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() enter:\n"); + + if (stream == NULL) { + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() leave: invalid stream, return_void\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe = stream->continuous_pipe; + + for (i = stream->config.init_num_cont_raw_buf; + i < stream->config.target_num_cont_raw_buf; i++) { + sh_css_update_host2sp_offline_frame(i, + pipe->continuous_frames[i], pipe->cont_md_buffers[i]); + } + sh_css_update_host2sp_cont_num_raw_frames + (stream->config.target_num_cont_raw_buf, true); + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() leave: return_void\n"); + + return IA_CSS_SUCCESS; +} + +void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) +{ + unsigned int thread_id; + enum ia_css_pipe_id pipe_id; + unsigned int pipe_num; + bool need_input_queue; + + IA_CSS_ENTER(""); + assert(pipe != NULL); + + pipe_id = pipe->mode; + pipe_num = pipe->pipe_num; + + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + +#if defined(HAS_NO_INPUT_SYSTEM) || defined(USE_INPUT_SYSTEM_VERSION_2401) + need_input_queue = true; +#else + need_input_queue = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; +#endif + + /* map required buffer queues to resources */ + /* TODO: to be improved */ + if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + if (pipe->pipe_settings.preview.preview_binary.info && + pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + } else if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE) { + unsigned int i; + + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info && + pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + break; + } + } + } else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) { + if (pipe->pipe_settings.capture.pre_isp_binary.info && + pipe->pipe_settings.capture.pre_isp_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + } + } else if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + if (pipe->pipe_settings.video.video_binary.info && + pipe->pipe_settings.video.video_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + if (pipe->pipe_settings.video.video_binary.info && + (pipe->pipe_settings.video.video_binary.info->sp.enable.dis + )) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_DIS_STATISTICS, map); + } else if (pipe->mode == IA_CSS_PIPE_ID_COPY) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + if (!pipe->stream->config.continuous) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + } else if (pipe->mode == IA_CSS_PIPE_ID_ACC) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { + unsigned int idx; + for (idx = 0; idx < IA_CSS_PIPE_MAX_OUTPUT_STAGE; idx++) { + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx, map); + if (pipe->enable_viewfinder[idx]) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME + idx, map); + } + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + } + IA_CSS_LEAVE(""); +} + +#if CONFIG_ON_FRAME_ENQUEUE() +static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info *info, struct frame_data_wrapper *frame) +{ + frame->config_on_frame_enqueue.padded_width = 0; + + /* currently we support configuration on frame enqueue only on YUV formats */ + /* on other formats the padded_width is zeroed for no configuration override */ + switch (info->format) { + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_NV12: + if (info->padded_width > info->res.width) + { + frame->config_on_frame_enqueue.padded_width = info->padded_width; + } + else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) + { + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* nothing to do if width == padded width or padded width is zeroed (the same) */ + break; + default: + break; + } + + return IA_CSS_SUCCESS; +} +#endif + +enum ia_css_err +ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) +{ + enum ia_css_err ret; + + IA_CSS_ENTER(""); + + /* Only continuous streams have a tagger to which we can send the + * unlock message. */ + if (stream == NULL || !stream->config.continuous) { + IA_CSS_ERROR("invalid stream pointer"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if (exp_id > IA_CSS_ISYS_MAX_EXPOSURE_ID || + exp_id < IA_CSS_ISYS_MIN_EXPOSURE_ID) { + IA_CSS_ERROR("invalid expsure ID: %d\n", exp_id); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + /* Send the event. Since we verified that the exp_id is valid, + * we can safely assign it to an 8-bit argument here. */ + ret = ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, exp_id, 0, 0); + + IA_CSS_LEAVE_ERR(ret); + return ret; +} + +/* @brief Set the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ +enum ia_css_err +ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool enable) +{ + unsigned int thread_id; + struct ia_css_pipeline_stage *stage; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER(""); + + /* Parameter Check */ + if (pipe == NULL || pipe->stream == NULL) { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) { + IA_CSS_ERROR("Invalid Pipe(No Extension Firmware)"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else { + /* Query the threadid and stage_num for the Extension firmware*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&(pipe->pipeline), fw_handle, &stage); + if (err == IA_CSS_SUCCESS) { + /* Set the Extension State;. TODO: Add check for stage firmware.type (QOS)*/ + err = ia_css_bufq_enqueue_psys_event( + (uint8_t) IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE, + (uint8_t) thread_id, + (uint8_t) stage->stage_num, + enable ? 1 : 0); + if (err == IA_CSS_SUCCESS) { + if(enable) + SH_CSS_QOS_STAGE_ENABLE(&(sh_css_sp_group.pipe[thread_id]),stage->stage_num); + else + SH_CSS_QOS_STAGE_DISABLE(&(sh_css_sp_group.pipe[thread_id]),stage->stage_num); + } + } + } + IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, enable); + return err; +} + +/* @brief Get the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ +enum ia_css_err +ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool *enable) +{ + struct ia_css_pipeline_stage *stage; + unsigned int thread_id; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER(""); + + /* Parameter Check */ + if (pipe == NULL || pipe->stream == NULL) { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) { + IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else { + /* Query the threadid and stage_num corresponding to the Extension firmware*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); + + if (err == IA_CSS_SUCCESS) { + /* Get the Extension State */ + *enable = (SH_CSS_QOS_STAGE_IS_ENABLED(&(sh_css_sp_group.pipe[thread_id]),stage->stage_num)) ? true : false; + } + } + IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, *enable); + return err; +} + +#ifdef ISP2401 +enum ia_css_err +ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, uint32_t fw_handle, + struct ia_css_isp_param_css_segments *css_seg, struct ia_css_isp_param_isp_segments *isp_seg) +{ + unsigned int HIVE_ADDR_sp_group; + static struct sh_css_sp_group sp_group; + static struct sh_css_sp_stage sp_stage; + static struct sh_css_isp_stage isp_stage; + const struct ia_css_fw_info *fw; + unsigned int thread_id; + struct ia_css_pipeline_stage *stage; + enum ia_css_err err = IA_CSS_SUCCESS; + int stage_num = 0; + enum ia_css_isp_memories mem; + bool enabled; + + IA_CSS_ENTER(""); + + fw = &sh_css_sp_fw; + + /* Parameter Check */ + if (pipe == NULL || pipe->stream == NULL) { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) { + IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else { + /* Query the thread_id and stage_num corresponding to the Extension firmware */ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&(pipe->pipeline), fw_handle, &stage); + if (err == IA_CSS_SUCCESS) { + /* Get the Extension State */ + enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&(sh_css_sp_group.pipe[thread_id]), stage->stage_num)) ? true : false; + /* Update mapped arg only when extension stage is not enabled */ + if (enabled) { + IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else { + stage_num = stage->stage_num; + + HIVE_ADDR_sp_group = fw->info.sp.group; + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(sp_group), + &sp_group, sizeof(struct sh_css_sp_group)); + mmgr_load(sp_group.pipe[thread_id].sp_stage_addr[stage_num], + &sp_stage, sizeof(struct sh_css_sp_stage)); + + mmgr_load(sp_stage.isp_stage_addr, + &isp_stage, sizeof(struct sh_css_isp_stage)); + + for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { + isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = + css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; + isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = + css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; + isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = + isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; + isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = + isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; + } + + mmgr_store(sp_stage.isp_stage_addr, + &isp_stage, sizeof(struct sh_css_isp_stage)); + } + } + } + IA_CSS_LEAVE("err:%d handle:%u", err, fw_handle); + return err; +} + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +static enum ia_css_err +aspect_ratio_crop_init(struct ia_css_stream *curr_stream, + struct ia_css_pipe *pipes[], + bool *do_crop_status) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + int i; + struct ia_css_pipe *curr_pipe; + uint32_t pipe_mask = 0; + + if ((curr_stream == NULL) || + (curr_stream->num_pipes == 0) || + (pipes == NULL) || + (do_crop_status == NULL)) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } + + for (i = 0; i < curr_stream->num_pipes; i++) { + curr_pipe = pipes[i]; + pipe_mask |= (1 << curr_pipe->config.mode); + } + + *do_crop_status = + (((pipe_mask & (1 << IA_CSS_PIPE_MODE_PREVIEW)) || + (pipe_mask & (1 << IA_CSS_PIPE_MODE_VIDEO))) && + (pipe_mask & (1 << IA_CSS_PIPE_MODE_CAPTURE)) && + curr_stream->config.continuous); + return IA_CSS_SUCCESS; +} + +static bool +aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) +{ + bool status = false; + + if ((curr_pipe != NULL) && enabled) { + if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || + (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || + (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) + status = true; + } + + return status; +} + +static enum ia_css_err +aspect_ratio_crop(struct ia_css_pipe *curr_pipe, + struct ia_css_resolution *effective_res) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_resolution crop_res; + struct ia_css_resolution *in_res = NULL; + struct ia_css_resolution *out_res = NULL; + bool use_bds_output_info = false; + bool use_vf_pp_in_res = false; + bool use_capt_pp_in_res = false; + + if ((curr_pipe == NULL) || + (effective_res == NULL)) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } + + if ((curr_pipe->config.mode != IA_CSS_PIPE_MODE_PREVIEW) && + (curr_pipe->config.mode != IA_CSS_PIPE_MODE_VIDEO) && + (curr_pipe->config.mode != IA_CSS_PIPE_MODE_CAPTURE)) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } + + use_bds_output_info = + ((curr_pipe->bds_output_info.res.width != 0) && + (curr_pipe->bds_output_info.res.height != 0)); + + use_vf_pp_in_res = + ((curr_pipe->config.vf_pp_in_res.width != 0) && + (curr_pipe->config.vf_pp_in_res.height != 0)); + + use_capt_pp_in_res = + ((curr_pipe->config.capt_pp_in_res.width != 0) && + (curr_pipe->config.capt_pp_in_res.height != 0)); + + in_res = &curr_pipe->stream->config.input_config.effective_res; + out_res = &curr_pipe->output_info[0].res; + + switch (curr_pipe->config.mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + if (use_bds_output_info) + out_res = &curr_pipe->bds_output_info.res; + else if (use_vf_pp_in_res) + out_res = &curr_pipe->config.vf_pp_in_res; + break; + case IA_CSS_PIPE_MODE_VIDEO: + if (use_bds_output_info) + out_res = &curr_pipe->bds_output_info.res; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (use_capt_pp_in_res) + out_res = &curr_pipe->config.capt_pp_in_res; + break; + case IA_CSS_PIPE_MODE_ACC: + case IA_CSS_PIPE_MODE_COPY: + case IA_CSS_PIPE_MODE_YUVPP: + default: + IA_CSS_ERROR("aspect ratio cropping invalid args: mode[%d]\n", + curr_pipe->config.mode); + assert(0); + break; + } + + err = ia_css_frame_find_crop_resolution(in_res, out_res, &crop_res); + if (err == IA_CSS_SUCCESS) { + *effective_res = crop_res; + } else { + /* in case of error fallback to default + * effective resolution from driver. */ + IA_CSS_LOG("ia_css_frame_find_crop_resolution() failed with err(%d)", err); + } + return err; +} +#endif + +#endif +static void +sh_css_hmm_buffer_record_init(void) +{ + int i; + +#ifndef ISP2401 + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); +#else + if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); + } +#endif + } +} + +static void +sh_css_hmm_buffer_record_uninit(void) +{ + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + +#ifndef ISP2401 + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if (buffer_record->in_use) { + if (buffer_record->h_vbuf != NULL) + ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); + sh_css_hmm_buffer_record_reset(buffer_record); +#else + if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if (buffer_record->in_use) { + if (buffer_record->h_vbuf != NULL) + ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); + sh_css_hmm_buffer_record_reset(buffer_record); + } + buffer_record++; +#endif + } +#ifndef ISP2401 + buffer_record++; +#endif + } +} + +static void +sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record) +{ + assert(buffer_record != NULL); + buffer_record->in_use = false; + buffer_record->type = IA_CSS_BUFFER_TYPE_INVALID; + buffer_record->h_vbuf = NULL; + buffer_record->kernel_ptr = 0; +} + +static struct sh_css_hmm_buffer_record +*sh_css_hmm_buffer_record_acquire(struct ia_css_rmgr_vbuf_handle *h_vbuf, + enum ia_css_buffer_type type, + hrt_address kernel_ptr) +{ + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + struct sh_css_hmm_buffer_record *out_buffer_record = NULL; + + assert(h_vbuf != NULL); + assert((type > IA_CSS_BUFFER_TYPE_INVALID) && (type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)); + assert(kernel_ptr != 0); + + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if (!buffer_record->in_use) { + buffer_record->in_use = true; + buffer_record->type = type; + buffer_record->h_vbuf = h_vbuf; + buffer_record->kernel_ptr = kernel_ptr; + out_buffer_record = buffer_record; + break; + } + buffer_record++; + } + + return out_buffer_record; +} + +static struct sh_css_hmm_buffer_record +*sh_css_hmm_buffer_record_validate(hrt_vaddress ddr_buffer_addr, + enum ia_css_buffer_type type) +{ + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + bool found_record = false; + + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if ((buffer_record->in_use) && + (buffer_record->type == type) && + (buffer_record->h_vbuf != NULL) && + (buffer_record->h_vbuf->vptr == ddr_buffer_addr)) { + found_record = true; + break; + } + buffer_record++; + } + + if (found_record) + return buffer_record; + else + return NULL; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h new file mode 100644 index 0000000000000..4072c564f911b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h @@ -0,0 +1,410 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_DEFS_H_ +#define _SH_CSS_DEFS_H_ + +#include "isp.h" + +/*#include "vamem.h"*/ /* Cannot include for VAMEM properties this file is visible on ISP -> pipeline generator */ + +#include "math_support.h" /* max(), min, etc etc */ + +/* ID's for refcount */ +#define IA_CSS_REFCOUNT_PARAM_SET_POOL 0xCAFE0001 +#define IA_CSS_REFCOUNT_PARAM_BUFFER 0xCAFE0002 + +/* Digital Image Stabilization */ +#define SH_CSS_DIS_DECI_FACTOR_LOG2 6 + +/* UV offset: 1:uv=-128...127, 0:uv=0...255 */ +#define SH_CSS_UV_OFFSET_IS_0 0 + +/* Bits of bayer is adjusted as 13 in ISP */ +#define SH_CSS_BAYER_BITS 13 + +/* Max value of bayer data (unsigned 13bit in ISP) */ +#define SH_CSS_BAYER_MAXVAL ((1U << SH_CSS_BAYER_BITS) - 1) + +/* Bits of yuv in ISP */ +#define SH_CSS_ISP_YUV_BITS 8 + +#define SH_CSS_DP_GAIN_SHIFT 5 +#define SH_CSS_BNR_GAIN_SHIFT 13 +#define SH_CSS_YNR_GAIN_SHIFT 13 +#define SH_CSS_AE_YCOEF_SHIFT 13 +#define SH_CSS_AF_FIR_SHIFT 13 +#define SH_CSS_YEE_DETAIL_GAIN_SHIFT 8 /* [u5.8] */ +#define SH_CSS_YEE_SCALE_SHIFT 8 +#define SH_CSS_TNR_COEF_SHIFT 13 +#define SH_CSS_MACC_COEF_SHIFT 11 /* [s2.11] for ISP1 */ +#define SH_CSS_MACC2_COEF_SHIFT 13 /* [s[exp].[13-exp]] for ISP2 */ +#define SH_CSS_DIS_COEF_SHIFT 13 + +/* enumeration of the bayer downscale factors. When a binary supports multiple + * factors, the OR of these defines is used to build the mask of supported + * factors. The BDS factor is used in pre-processor expressions so we cannot + * use an enum here. */ +#define SH_CSS_BDS_FACTOR_1_00 (0) +#define SH_CSS_BDS_FACTOR_1_25 (1) +#define SH_CSS_BDS_FACTOR_1_50 (2) +#define SH_CSS_BDS_FACTOR_2_00 (3) +#define SH_CSS_BDS_FACTOR_2_25 (4) +#define SH_CSS_BDS_FACTOR_2_50 (5) +#define SH_CSS_BDS_FACTOR_3_00 (6) +#define SH_CSS_BDS_FACTOR_4_00 (7) +#define SH_CSS_BDS_FACTOR_4_50 (8) +#define SH_CSS_BDS_FACTOR_5_00 (9) +#define SH_CSS_BDS_FACTOR_6_00 (10) +#define SH_CSS_BDS_FACTOR_8_00 (11) +#define NUM_BDS_FACTORS (12) + +#define PACK_BDS_FACTOR(factor) (1<<(factor)) + +/* Following macros should match with the type enum ia_css_pipe_version in + * ia_css_pipe_public.h. The reason to add these macros is that enum type + * will be evaluted to 0 in preprocessing time. */ +#define SH_CSS_ISP_PIPE_VERSION_1 1 +#define SH_CSS_ISP_PIPE_VERSION_2_2 2 +#define SH_CSS_ISP_PIPE_VERSION_2_6_1 3 +#define SH_CSS_ISP_PIPE_VERSION_2_7 4 + +/*--------------- sRGB Gamma ----------------- +CCM : YCgCo[0,8191] -> RGB[0,4095] +sRGB Gamma : RGB [0,4095] -> RGB[0,8191] +CSC : RGB [0,8191] -> YUV[0,8191] + +CCM: +Y[0,8191],CgCo[-4096,4095],coef[-8192,8191] -> RGB[0,4095] + +sRGB Gamma: +RGB[0,4095] -(interpolation step16)-> RGB[0,255] -(LUT 12bit)-> RGB[0,4095] -> RGB[0,8191] + +CSC: +RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] +--------------------------------------------*/ +/* Bits of input/output of sRGB Gamma */ +#define SH_CSS_RGB_GAMMA_INPUT_BITS 12 /* [0,4095] */ +#define SH_CSS_RGB_GAMMA_OUTPUT_BITS 13 /* [0,8191] */ + +/* Bits of fractional part of interpolation in vamem, [0,4095]->[0,255] */ +#define SH_CSS_RGB_GAMMA_FRAC_BITS \ + (SH_CSS_RGB_GAMMA_INPUT_BITS - SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE_LOG2) +#define SH_CSS_RGB_GAMMA_ONE (1 << SH_CSS_RGB_GAMMA_FRAC_BITS) + +/* Bits of input of CCM, = 13, Y[0,8191],CgCo[-4096,4095] */ +#define SH_CSS_YUV2RGB_CCM_INPUT_BITS SH_CSS_BAYER_BITS + +/* Bits of output of CCM, = 12, RGB[0,4095] */ +#define SH_CSS_YUV2RGB_CCM_OUTPUT_BITS SH_CSS_RGB_GAMMA_INPUT_BITS + +/* Maximum value of output of CCM */ +#define SH_CSS_YUV2RGB_CCM_MAX_OUTPUT \ + ((1 << SH_CSS_YUV2RGB_CCM_OUTPUT_BITS) - 1) + +#define SH_CSS_NUM_INPUT_BUF_LINES 4 + +/* Left cropping only applicable for sufficiently large nway */ +#if ISP_VEC_NELEMS == 16 +#define SH_CSS_MAX_LEFT_CROPPING 0 +#define SH_CSS_MAX_TOP_CROPPING 0 +#else +#define SH_CSS_MAX_LEFT_CROPPING 12 +#define SH_CSS_MAX_TOP_CROPPING 12 +#endif + +#define SH_CSS_SP_MAX_WIDTH 1280 + +/* This is the maximum grid we can handle in the ISP binaries. + * The host code makes sure no bigger grid is ever selected. */ +#define SH_CSS_MAX_BQ_GRID_WIDTH 80 +#define SH_CSS_MAX_BQ_GRID_HEIGHT 60 + +/* The minimum dvs envelope is 12x12(for IPU2) to make sure the + * invalid rows/columns that result from filter initialization are skipped. */ +#define SH_CSS_MIN_DVS_ENVELOPE 12U + +/* The FPGA system (vec_nelems == 16) only supports upto 5MP */ +#if ISP_VEC_NELEMS == 16 +#define SH_CSS_MAX_SENSOR_WIDTH 2560 +#define SH_CSS_MAX_SENSOR_HEIGHT 1920 +#else +#define SH_CSS_MAX_SENSOR_WIDTH 4608 +#define SH_CSS_MAX_SENSOR_HEIGHT 3450 +#endif + +/* Limited to reduce vmem pressure */ +#if ISP_VMEM_DEPTH >= 3072 +#define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH SH_CSS_MAX_SENSOR_WIDTH +#define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT SH_CSS_MAX_SENSOR_HEIGHT +#else +#define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH 3264 +#define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT 2448 +#endif +/* When using bayer decimation */ +/* +#define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC 4224 +#define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC 3168 +*/ +#define SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC SH_CSS_MAX_SENSOR_WIDTH +#define SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC SH_CSS_MAX_SENSOR_HEIGHT + +#define SH_CSS_MIN_SENSOR_WIDTH 2 +#define SH_CSS_MIN_SENSOR_HEIGHT 2 + +#if defined(IS_ISP_2400_SYSTEM) +/* MAX width and height set to the same to allow for rotated + * resolutions. */ +#define SH_CSS_MAX_VF_WIDTH 1920 +#define SH_CSS_MAX_VF_HEIGHT 1920 +#else +#define SH_CSS_MAX_VF_WIDTH 1280 +#define SH_CSS_MAX_VF_HEIGHT 960 +#endif +/* +#define SH_CSS_MAX_VF_WIDTH_DEC 1920 +#define SH_CSS_MAX_VF_HEIGHT_DEC 1080 +*/ +#define SH_CSS_MAX_VF_WIDTH_DEC SH_CSS_MAX_VF_WIDTH +#define SH_CSS_MAX_VF_HEIGHT_DEC SH_CSS_MAX_VF_HEIGHT + +/* We use 16 bits per coordinate component, including integer + and fractional bits */ +#define SH_CSS_MORPH_TABLE_GRID ISP_VEC_NELEMS +#define SH_CSS_MORPH_TABLE_ELEM_BYTES 2 +#define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \ + (HIVE_ISP_DDR_WORD_BYTES/SH_CSS_MORPH_TABLE_ELEM_BYTES) + +#ifndef ISP2401 +#define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) +#define SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) +#else +/* TODO: I will move macros of "*_SCTBL_*" to SC kernel. + "+ 2" should be "+ SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT". (michie, Sep/23/2014) */ +#define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 2) +#define SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 2) +#endif +#define SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ + CEIL_MUL(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) + +/* Each line of this table is aligned to the maximum line width. */ +#define SH_CSS_MAX_S3ATBL_WIDTH SH_CSS_MAX_BQ_GRID_WIDTH + +#ifndef ISP2401 +/* The video binary supports a delay of 1 or 2 */ +#define MAX_DVS_FRAME_DELAY 2 +/* We always need one additional frame because the video binary + * reads the previous and writes the current frame concurrently */ +#define MAX_NUM_VIDEO_DELAY_FRAMES (MAX_DVS_FRAME_DELAY + 1) +#define NUM_VIDEO_TNR_FRAMES 2 + +#define NUM_TNR_FRAMES 2 /* FIXME */ + + +#define MAX_NUM_DELAY_FRAMES MAX_NUM_VIDEO_DELAY_FRAMES + +#else +/* Video mode specific DVS define */ +/* The video binary supports a delay of 1 or 2 frames */ +#define VIDEO_FRAME_DELAY 2 +/* +1 because DVS reads the previous and writes the current frame concurrently */ +#define MAX_NUM_VIDEO_DELAY_FRAMES (VIDEO_FRAME_DELAY + 1) + +/* Preview mode specific DVS define. */ +/* In preview we only need GDC functionality (and not the DVS functionality) */ +/* The minimum number of DVS frames you need is 2, one were GDC reads from and another where GDC writes into */ +#define NUM_PREVIEW_DVS_FRAMES (2) + +/* TNR is no longer exclusive to video, SkyCam preview has TNR too (same kernel as video). + * All uses the generic define NUM_TNR_FRAMES. The define NUM_VIDEO_TNR_FRAMES has been deprecated. + * + * Notes + * 1) The value depends on the used TNR kernel and is not something that depends on the mode + * and it is not something you just could choice. + * 2) For the luma only pipeline a version that supports two different sets of TNR reference frames + * is being used. + *. + */ +#define NUM_VALID_TNR_REF_FRAMES (1) /* At least one valid TNR reference frame is required */ +#define NUM_TNR_FRAMES_PER_REF_BUF_SET (2) + +/* In luma-only mode alternate illuminated frames are supported, that requires two double buffers */ +#ifdef ENABLE_LUMA_ONLY +#define NUM_TNR_REF_BUF_SETS (2) +#else +#define NUM_TNR_REF_BUF_SETS (1) +#endif + +#define NUM_TNR_FRAMES (NUM_TNR_FRAMES_PER_REF_BUF_SET * NUM_TNR_REF_BUF_SETS) + +#define MAX_NUM_DELAY_FRAMES MAX(MAX_NUM_VIDEO_DELAY_FRAMES, NUM_PREVIEW_DVS_FRAMES) + +#endif + +/* Note that this is the define used to configure all data structures common for all modes */ +/* It should be equal or bigger to the max number of DVS frames for all possible modes */ +/* Rules: these implement logic shared between the host code and ISP firmware. + The ISP firmware needs these rules to be applied at pre-processor time, + that's why these are macros, not functions. */ +#define _ISP_BQS(num) ((num)/2) +#define _ISP_VECS(width) CEIL_DIV(width, ISP_VEC_NELEMS) + +#define ISP_BQ_GRID_WIDTH(elements_per_line, deci_factor_log2) \ + CEIL_SHIFT(elements_per_line/2, deci_factor_log2) +#define ISP_BQ_GRID_HEIGHT(lines_per_frame, deci_factor_log2) \ + CEIL_SHIFT(lines_per_frame/2, deci_factor_log2) +#define ISP_C_VECTORS_PER_LINE(elements_per_line) \ + _ISP_VECS(elements_per_line/2) + +/* The morphing table is similar to the shading table in the sense that we + have 1 more value than we have cells in the grid. */ +#define _ISP_MORPH_TABLE_WIDTH(int_width) \ + (CEIL_DIV(int_width, SH_CSS_MORPH_TABLE_GRID) + 1) +#define _ISP_MORPH_TABLE_HEIGHT(int_height) \ + (CEIL_DIV(int_height, SH_CSS_MORPH_TABLE_GRID) + 1) +#define _ISP_MORPH_TABLE_ALIGNED_WIDTH(width) \ + CEIL_MUL(_ISP_MORPH_TABLE_WIDTH(width), \ + SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD) + +#ifndef ISP2401 +#define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ + (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + 1) +#define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ + (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + 1) +#define _ISP_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ + CEIL_MUL(_ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2), \ + ISP_VEC_NELEMS) + +#endif +/* ***************************************************************** + * Statistics for 3A (Auto Focus, Auto White Balance, Auto Exposure) + * *****************************************************************/ +/* if left cropping is used, 3A statistics are also cropped by 2 vectors. */ +#define _ISP_S3ATBL_WIDTH(in_width, deci_factor_log2) \ + (_ISP_BQS(in_width) >> deci_factor_log2) +#define _ISP_S3ATBL_HEIGHT(in_height, deci_factor_log2) \ + (_ISP_BQS(in_height) >> deci_factor_log2) +#define _ISP_S3A_ELEMS_ISP_WIDTH(width, left_crop) \ + (width - ((left_crop) ? 2 * ISP_VEC_NELEMS : 0)) + +#define _ISP_S3ATBL_ISP_WIDTH(in_width, deci_factor_log2) \ + CEIL_SHIFT(_ISP_BQS(in_width), deci_factor_log2) +#define _ISP_S3ATBL_ISP_HEIGHT(in_height, deci_factor_log2) \ + CEIL_SHIFT(_ISP_BQS(in_height), deci_factor_log2) +#define ISP_S3ATBL_VECTORS \ + _ISP_VECS(SH_CSS_MAX_S3ATBL_WIDTH * \ + (sizeof(struct ia_css_3a_output)/sizeof(int32_t))) +#define ISP_S3ATBL_HI_LO_STRIDE \ + (ISP_S3ATBL_VECTORS * ISP_VEC_NELEMS) +#define ISP_S3ATBL_HI_LO_STRIDE_BYTES \ + (sizeof(unsigned short) * ISP_S3ATBL_HI_LO_STRIDE) + +/* Viewfinder support */ +#define __ISP_MAX_VF_OUTPUT_WIDTH(width, left_crop) \ + (width - 2*ISP_VEC_NELEMS + ((left_crop) ? 2 * ISP_VEC_NELEMS : 0)) + +#define __ISP_VF_OUTPUT_WIDTH_VECS(out_width, vf_log_downscale) \ + (_ISP_VECS((out_width) >> (vf_log_downscale))) + +#define _ISP_VF_OUTPUT_WIDTH(vf_out_vecs) ((vf_out_vecs) * ISP_VEC_NELEMS) +#define _ISP_VF_OUTPUT_HEIGHT(out_height, vf_log_ds) \ + ((out_height) >> (vf_log_ds)) + +#define _ISP_LOG_VECTOR_STEP(mode) \ + ((mode) == IA_CSS_BINARY_MODE_CAPTURE_PP ? 2 : 1) + +/* It is preferred to have not more than 2x scaling at one step + * in GDC (assumption is for capture_pp and yuv_scale stages) */ +#define MAX_PREFERRED_YUV_DS_PER_STEP 2 + +/* Rules for computing the internal width. This is extremely complicated + * and definitely needs to be commented and explained. */ +#define _ISP_LEFT_CROP_EXTRA(left_crop) ((left_crop) > 0 ? 2*ISP_VEC_NELEMS : 0) + +#define __ISP_MIN_INTERNAL_WIDTH(num_chunks, pipelining, mode) \ + ((num_chunks) * (pipelining) * (1<<_ISP_LOG_VECTOR_STEP(mode)) * \ + ISP_VEC_NELEMS) + +#define __ISP_PADDED_OUTPUT_WIDTH(out_width, dvs_env_width, left_crop) \ + ((out_width) + MAX(dvs_env_width, _ISP_LEFT_CROP_EXTRA(left_crop))) + +#define __ISP_CHUNK_STRIDE_ISP(mode) \ + ((1<<_ISP_LOG_VECTOR_STEP(mode)) * ISP_VEC_NELEMS) + +#define __ISP_CHUNK_STRIDE_DDR(c_subsampling, num_chunks) \ + ((c_subsampling) * (num_chunks) * HIVE_ISP_DDR_WORD_BYTES) +#define __ISP_INTERNAL_WIDTH(out_width, \ + dvs_env_width, \ + left_crop, \ + mode, \ + c_subsampling, \ + num_chunks, \ + pipelining) \ + CEIL_MUL2(CEIL_MUL2(MAX(__ISP_PADDED_OUTPUT_WIDTH(out_width, \ + dvs_env_width, \ + left_crop), \ + __ISP_MIN_INTERNAL_WIDTH(num_chunks, \ + pipelining, \ + mode) \ + ), \ + __ISP_CHUNK_STRIDE_ISP(mode) \ + ), \ + __ISP_CHUNK_STRIDE_DDR(c_subsampling, num_chunks) \ + ) + +#define __ISP_INTERNAL_HEIGHT(out_height, dvs_env_height, top_crop) \ + ((out_height) + (dvs_env_height) + top_crop) + +/* @GC: Input can be up to sensor resolution when either bayer downscaling + * or raw binning is enabled. + * Also, during continuous mode, we need to align to 4*NWAY since input + * should support binning */ +#define _ISP_MAX_INPUT_WIDTH(max_internal_width, enable_ds, enable_fixed_bayer_ds, enable_raw_bin, \ + enable_continuous) \ + ((enable_ds) ? \ + SH_CSS_MAX_SENSOR_WIDTH :\ + (enable_fixed_bayer_ds) ? \ + CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC, 4*ISP_VEC_NELEMS) : \ + (enable_raw_bin) ? \ + CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH, 4*ISP_VEC_NELEMS) : \ + (enable_continuous) ? \ + SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH \ + : max_internal_width) + +#define _ISP_INPUT_WIDTH(internal_width, ds_input_width, enable_ds) \ + ((enable_ds) ? (ds_input_width) : (internal_width)) + +#define _ISP_MAX_INPUT_HEIGHT(max_internal_height, enable_ds, enable_fixed_bayer_ds, enable_raw_bin, \ + enable_continuous) \ + ((enable_ds) ? \ + SH_CSS_MAX_SENSOR_HEIGHT :\ + (enable_fixed_bayer_ds) ? \ + SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT_DEC : \ + (enable_raw_bin || enable_continuous) ? \ + SH_CSS_MAX_CONTINUOUS_SENSOR_HEIGHT \ + : max_internal_height) + +#define _ISP_INPUT_HEIGHT(internal_height, ds_input_height, enable_ds) \ + ((enable_ds) ? (ds_input_height) : (internal_height)) + +#define SH_CSS_MAX_STAGES 8 /* primary_stage[1-6], capture_pp, vf_pp */ + +/* For CSI2+ input system, it requires extra paddinga from vmem */ +#ifdef CONFIG_CSI2_PLUS +#define _ISP_EXTRA_PADDING_VECS 2 +#else +#define _ISP_EXTRA_PADDING_VECS 0 +#endif /* CONFIG_CSI2_PLUS */ + +#endif /* _SH_CSS_DEFS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_dvs_info.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_dvs_info.h new file mode 100644 index 0000000000000..23044aad654fe --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_dvs_info.h @@ -0,0 +1,36 @@ +/** +Support for Intel Camera Imaging ISP subsystem. +Copyright (c) 2010 - 2015, Intel Corporation. + +This program is free software; you can redistribute it and/or modify it +under the terms and conditions of the GNU General Public License, +version 2, as published by the Free Software Foundation. + +This program is distributed in the hope it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. +*/ + +#ifndef __SH_CSS_DVS_INFO_H__ +#define __SH_CSS_DVS_INFO_H__ + +#include + +/* horizontal 64x64 blocks round up to DVS_BLOCKDIM_X, make even */ +#define DVS_NUM_BLOCKS_X(X) (CEIL_MUL(CEIL_DIV((X), DVS_BLOCKDIM_X), 2)) + +/* vertical 64x64 blocks round up to DVS_BLOCKDIM_Y */ +#define DVS_NUM_BLOCKS_Y(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_LUMA)) + +/* Bilinear interpolation (HRT_GDC_BLI_MODE) is the supported method currently. + * Bicubic interpolation (HRT_GDC_BCI_MODE) is not supported yet */ +#define DVS_GDC_INTERP_METHOD HRT_GDC_BLI_MODE + +#define DVS_INPUT_BYTES_PER_PIXEL (1) + +#define DVS_NUM_BLOCKS_X_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_X)) + +#define DVS_NUM_BLOCKS_Y_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_CHROMA)) + +#endif /* __SH_CSS_DVS_INFO_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c new file mode 100644 index 0000000000000..8158ea40d0695 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c @@ -0,0 +1,315 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include + +#include +#include "platform_support.h" +#include "sh_css_firmware.h" + +#include "sh_css_defs.h" +#include "ia_css_debug.h" +#include "sh_css_internal.h" +#include "ia_css_isp_param.h" + +#include "memory_access.h" +#include "assert_support.h" +#include "string_support.h" + +#include "isp.h" /* PMEM_WIDTH_LOG2 */ + +#include "ia_css_isp_params.h" +#include "ia_css_isp_configs.h" +#include "ia_css_isp_states.h" + +#define _STR(x) #x +#define STR(x) _STR(x) + +struct firmware_header { + struct sh_css_fw_bi_file_h file_header; + struct ia_css_fw_info binary_header; +}; + +struct fw_param { + const char *name; + const void *buffer; +}; + +/* Warning: same order as SH_CSS_BINARY_ID_* */ +static struct firmware_header *firmware_header; + +/* The string STR is a place holder + * which will be replaced with the actual RELEASE_VERSION + * during package generation. Please do not modify */ +#ifndef ISP2401 +static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); +#else +static const char *release_version = STR(irci_ecr-master_20150911_0724); +#endif + +#define MAX_FW_REL_VER_NAME 300 +static char FW_rel_ver_name[MAX_FW_REL_VER_NAME] = "---"; + +struct ia_css_fw_info sh_css_sp_fw; +struct ia_css_blob_descr *sh_css_blob_info; /* Only ISP blob info (no SP) */ +unsigned sh_css_num_binaries; /* This includes 1 SP binary */ + +static struct fw_param *fw_minibuffer; + + +char *sh_css_get_fw_version(void) +{ + return FW_rel_ver_name; +} + + +/* + * Split the loaded firmware into blobs + */ + +/* Setup sp/sp1 binary */ +static enum ia_css_err +setup_binary(struct ia_css_fw_info *fw, const char *fw_data, struct ia_css_fw_info *sh_css_fw, unsigned binary_id) +{ + const char *blob_data; + + if ((fw == NULL) || (fw_data == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + blob_data = fw_data + fw->blob.offset; + + *sh_css_fw = *fw; + + sh_css_fw->blob.code = vmalloc(fw->blob.size); + if (sh_css_fw->blob.code == NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + memcpy((void *)sh_css_fw->blob.code, blob_data, fw->blob.size); + sh_css_fw->blob.data = (char *)sh_css_fw->blob.code + fw->blob.data_source; + fw_minibuffer[binary_id].buffer = sh_css_fw->blob.code; + + return IA_CSS_SUCCESS; +} +enum ia_css_err +sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia_css_blob_descr *bd, unsigned index) +{ + const char *name; + const unsigned char *blob; + + if ((fw == NULL) || (bd == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + /* Special case: only one binary in fw */ + if (bi == NULL) bi = (const struct ia_css_fw_info *)fw; + + name = fw + bi->blob.prog_name_offset; + blob = (const unsigned char *)fw + bi->blob.offset; + + /* sanity check */ + if (bi->blob.size != bi->blob.text_size + bi->blob.icache_size + bi->blob.data_size + bi->blob.padding_size) { + /* sanity check, note the padding bytes added for section to DDR alignment */ + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + if ((bi->blob.offset % (1UL<<(ISP_PMEM_WIDTH_LOG2-3))) != 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + bd->blob = blob; + bd->header = *bi; + + if (bi->type == ia_css_isp_firmware || bi->type == ia_css_sp_firmware) { + char *namebuffer; + + namebuffer = kstrdup(name, GFP_KERNEL); + if (!namebuffer) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + bd->name = fw_minibuffer[index].name = namebuffer; + } else { + bd->name = name; + } + + if (bi->type == ia_css_isp_firmware) { + size_t paramstruct_size = sizeof(struct ia_css_memory_offsets); + size_t configstruct_size = sizeof(struct ia_css_config_memory_offsets); + size_t statestruct_size = sizeof(struct ia_css_state_memory_offsets); + + char *parambuf = kmalloc(paramstruct_size + configstruct_size + statestruct_size, + GFP_KERNEL); + if (!parambuf) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_PARAM].ptr = NULL; + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_CONFIG].ptr = NULL; + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_STATE].ptr = NULL; + + fw_minibuffer[index].buffer = parambuf; + + /* copy ia_css_memory_offsets */ + memcpy(parambuf, (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_PARAM]), + paramstruct_size); + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_PARAM].ptr = parambuf; + + /* copy ia_css_config_memory_offsets */ + memcpy(parambuf + paramstruct_size, + (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_CONFIG]), + configstruct_size); + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_CONFIG].ptr = parambuf + paramstruct_size; + + /* copy ia_css_state_memory_offsets */ + memcpy(parambuf + paramstruct_size + configstruct_size, + (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_STATE]), + statestruct_size); + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_STATE].ptr = parambuf + paramstruct_size + configstruct_size; + } + return IA_CSS_SUCCESS; +} + +bool +sh_css_check_firmware_version(const char *fw_data) +{ + struct sh_css_fw_bi_file_h *file_header; + + firmware_header = (struct firmware_header *)fw_data; + file_header = &firmware_header->file_header; + + if (strcmp(file_header->version, release_version) != 0) { + return false; + } else { + /* firmware version matches */ + return true; + } +} + +enum ia_css_err +sh_css_load_firmware(const char *fw_data, + unsigned int fw_size) +{ + unsigned i; + struct ia_css_fw_info *binaries; + struct sh_css_fw_bi_file_h *file_header; + bool valid_firmware = false; + + firmware_header = (struct firmware_header *)fw_data; + file_header = &firmware_header->file_header; + binaries = &firmware_header->binary_header; + strncpy(FW_rel_ver_name, file_header->version, min(sizeof(FW_rel_ver_name), sizeof(file_header->version)) - 1); + valid_firmware = sh_css_check_firmware_version(fw_data); + if (!valid_firmware) { +#if !defined(HRT_RTL) + IA_CSS_ERROR("CSS code version (%s) and firmware version (%s) mismatch!", + file_header->version, release_version); + return IA_CSS_ERR_VERSION_MISMATCH; +#endif + } else { + IA_CSS_LOG("successfully load firmware version %s", release_version); + } + + /* some sanity checks */ + if (!fw_data || fw_size < sizeof(struct sh_css_fw_bi_file_h)) + return IA_CSS_ERR_INTERNAL_ERROR; + + if (file_header->h_size != sizeof(struct sh_css_fw_bi_file_h)) + return IA_CSS_ERR_INTERNAL_ERROR; + + sh_css_num_binaries = file_header->binary_nr; + /* Only allocate memory for ISP blob info */ + if (sh_css_num_binaries > NUM_OF_SPS) { + sh_css_blob_info = kmalloc( + (sh_css_num_binaries - NUM_OF_SPS) * + sizeof(*sh_css_blob_info), GFP_KERNEL); + if (!sh_css_blob_info) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } else { + sh_css_blob_info = NULL; + } + + fw_minibuffer = kcalloc(sh_css_num_binaries, sizeof(struct fw_param), + GFP_KERNEL); + if (!fw_minibuffer) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + for (i = 0; i < sh_css_num_binaries; i++) { + struct ia_css_fw_info *bi = &binaries[i]; + /* note: the var below is made static as it is quite large; + if it is not static it ends up on the stack which could + cause issues for drivers + */ + static struct ia_css_blob_descr bd; + enum ia_css_err err; + + err = sh_css_load_blob_info(fw_data, bi, &bd, i); + + if (err != IA_CSS_SUCCESS) + return IA_CSS_ERR_INTERNAL_ERROR; + + if (bi->blob.offset + bi->blob.size > fw_size) + return IA_CSS_ERR_INTERNAL_ERROR; + + if (bi->type == ia_css_sp_firmware) { + if (i != SP_FIRMWARE) + return IA_CSS_ERR_INTERNAL_ERROR; + err = setup_binary(bi, fw_data, &sh_css_sp_fw, i); + if (err != IA_CSS_SUCCESS) + return err; + } else { + /* All subsequent binaries (including bootloaders) (i>NUM_OF_SPS) are ISP firmware */ + if (i < NUM_OF_SPS) + return IA_CSS_ERR_INTERNAL_ERROR; + + if (bi->type != ia_css_isp_firmware) + return IA_CSS_ERR_INTERNAL_ERROR; + if (sh_css_blob_info == NULL) /* cannot happen but KW does not see this */ + return IA_CSS_ERR_INTERNAL_ERROR; + sh_css_blob_info[i - NUM_OF_SPS] = bd; + } + } + + return IA_CSS_SUCCESS; +} + +void sh_css_unload_firmware(void) +{ + + /* release firmware minibuffer */ + if (fw_minibuffer) { + unsigned int i = 0; + for (i = 0; i < sh_css_num_binaries; i++) { + if (fw_minibuffer[i].name) + kfree((void *)fw_minibuffer[i].name); + if (fw_minibuffer[i].buffer) + vfree((void *)fw_minibuffer[i].buffer); + } + kfree(fw_minibuffer); + fw_minibuffer = NULL; + } + + memset(&sh_css_sp_fw, 0, sizeof(sh_css_sp_fw)); + kfree(sh_css_blob_info); + sh_css_blob_info = NULL; + sh_css_num_binaries = 0; +} + +hrt_vaddress +sh_css_load_blob(const unsigned char *blob, unsigned size) +{ + hrt_vaddress target_addr = mmgr_malloc(size); + /* this will allocate memory aligned to a DDR word boundary which + is required for the CSS DMA to read the instructions. */ + + assert(blob != NULL); + if (target_addr) + mmgr_store(target_addr, blob, size); + return target_addr; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h new file mode 100644 index 0000000000000..588aabde8a86d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h @@ -0,0 +1,54 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_FIRMWARE_H_ +#define _SH_CSS_FIRMWARE_H_ + +#include + +#include +#include + +/* This is for the firmware loaded from user space */ +struct sh_css_fw_bi_file_h { + char version[64]; /* branch tag + week day + time */ + int binary_nr; /* Number of binaries */ + unsigned int h_size; /* sizeof(struct sh_css_fw_bi_file_h) */ +}; + +extern struct ia_css_fw_info sh_css_sp_fw; +#if defined(HAS_BL) +extern struct ia_css_fw_info sh_css_bl_fw; +#endif /* HAS_BL */ +extern struct ia_css_blob_descr *sh_css_blob_info; +extern unsigned sh_css_num_binaries; + +char +*sh_css_get_fw_version(void); + +bool +sh_css_check_firmware_version(const char *fw_data); + +enum ia_css_err +sh_css_load_firmware(const char *fw_data, + unsigned int fw_size); + +void sh_css_unload_firmware(void); + +hrt_vaddress sh_css_load_blob(const unsigned char *blob, unsigned size); + +enum ia_css_err +sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia_css_blob_descr *bd, unsigned int i); + +#endif /* _SH_CSS_FIRMWARE_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h new file mode 100644 index 0000000000000..90a63b3921e6c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h @@ -0,0 +1,40 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SH_CSS_FRAC_H +#define __SH_CSS_FRAC_H + +#include + +#define sISP_REG_BIT ISP_VEC_ELEMBITS +#define uISP_REG_BIT ((unsigned)(sISP_REG_BIT-1)) +#define sSHIFT (16-sISP_REG_BIT) +#define uSHIFT ((unsigned)(16-uISP_REG_BIT)) +#define sFRACTION_BITS_FITTING(a) (a-sSHIFT) +#define uFRACTION_BITS_FITTING(a) ((unsigned)(a-uSHIFT)) +#define sISP_VAL_MIN (-(1<>sSHIFT) >> max(sFRACTION_BITS_FITTING(a)-(b), 0)), \ + sISP_VAL_MIN), sISP_VAL_MAX) +#define uDIGIT_FITTING(v, a, b) \ + min((unsigned)max((unsigned)(((v)>>uSHIFT) \ + >> max((int)(uFRACTION_BITS_FITTING(a)-(b)), 0)), \ + uISP_VAL_MIN), uISP_VAL_MAX) + +#endif /* __SH_CSS_FRAC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_host_data.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_host_data.c new file mode 100644 index 0000000000000..348183a221a8d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_host_data.c @@ -0,0 +1,42 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include + +struct ia_css_host_data *ia_css_host_data_allocate(size_t size) +{ + struct ia_css_host_data *me; + + me = kmalloc(sizeof(struct ia_css_host_data), GFP_KERNEL); + if (!me) + return NULL; + me->size = (uint32_t)size; + me->address = sh_css_malloc(size); + if (!me->address) { + kfree(me); + return NULL; + } + return me; +} + +void ia_css_host_data_free(struct ia_css_host_data *me) +{ + if (me) { + sh_css_free(me->address); + me->address = NULL; + kfree(me); + } +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c new file mode 100644 index 0000000000000..716d808d56db6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c @@ -0,0 +1,84 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "platform_support.h" + +#include "sh_css_hrt.h" +#include "ia_css_debug.h" + +#include "device_access.h" + +#define __INLINE_EVENT__ +#include "event_fifo.h" +#define __INLINE_SP__ +#include "sp.h" +#define __INLINE_ISP__ +#include "isp.h" +#define __INLINE_IRQ__ +#include "irq.h" +#define __INLINE_FIFO_MONITOR__ +#include "fifo_monitor.h" + +/* System independent */ +#include "sh_css_internal.h" + +bool sh_css_hrt_system_is_idle(void) +{ + bool not_idle = false, idle; + fifo_channel_t ch; + + idle = sp_ctrl_getbit(SP0_ID, SP_SC_REG, SP_IDLE_BIT); + not_idle |= !idle; + if (!idle) + IA_CSS_WARNING("SP not idle"); + + idle = isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT); + not_idle |= !idle; + if (!idle) + IA_CSS_WARNING("ISP not idle"); + + for (ch=0; ch +#include + +#include + +/* SP access */ +void sh_css_hrt_sp_start_si(void); + +void sh_css_hrt_sp_start_copy_frame(void); + +void sh_css_hrt_sp_start_isp(void); + +enum ia_css_err sh_css_hrt_sp_wait(void); + +bool sh_css_hrt_system_is_idle(void); + +#endif /* _SH_CSS_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h new file mode 100644 index 0000000000000..161122e1bcbc6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h @@ -0,0 +1,1089 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_INTERNAL_H_ +#define _SH_CSS_INTERNAL_H_ + +#include +#include +#include +#include +#include + +#if !defined(HAS_NO_INPUT_FORMATTER) +#include "input_formatter.h" +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) +#include "input_system.h" +#endif + +#include "ia_css_types.h" +#include "ia_css_acc_types.h" +#include "ia_css_buffer.h" + +#include "ia_css_binary.h" +#if !defined(__ISP) +#include "sh_css_firmware.h" /* not needed/desired on SP/ISP */ +#endif +#include "sh_css_legacy.h" +#include "sh_css_defs.h" +#include "sh_css_uds.h" +#include "dma.h" /* N_DMA_CHANNEL_ID */ +#include "ia_css_circbuf_comm.h" /* Circular buffer */ +#include "ia_css_frame_comm.h" +#include "ia_css_3a.h" +#include "ia_css_dvs.h" +#include "ia_css_metadata.h" +#include "runtime/bufq/interface/ia_css_bufq.h" +#include "ia_css_timer.h" + +/* TODO: Move to a more suitable place when sp pipeline design is done. */ +#define IA_CSS_NUM_CB_SEM_READ_RESOURCE 2 +#define IA_CSS_NUM_CB_SEM_WRITE_RESOURCE 1 +#define IA_CSS_NUM_CBS 2 +#define IA_CSS_CB_MAX_ELEMS 2 + +/* Use case specific. index limited to IA_CSS_NUM_CB_SEM_READ_RESOURCE or + * IA_CSS_NUM_CB_SEM_WRITE_RESOURCE for read and write respectively. + * TODO: Enforce the limitation above. +*/ +#define IA_CSS_COPYSINK_SEM_INDEX 0 +#define IA_CSS_TAGGER_SEM_INDEX 1 + +/* Force generation of output event. Used by acceleration pipe. */ +#define IA_CSS_POST_OUT_EVENT_FORCE 2 + +#define SH_CSS_MAX_BINARY_NAME 64 + +#define SP_DEBUG_NONE (0) +#define SP_DEBUG_DUMP (1) +#define SP_DEBUG_COPY (2) +#define SP_DEBUG_TRACE (3) +#define SP_DEBUG_MINIMAL (4) + +#define SP_DEBUG SP_DEBUG_NONE +#define SP_DEBUG_MINIMAL_OVERWRITE 1 + +#define SH_CSS_TNR_BIT_DEPTH 8 +#define SH_CSS_REF_BIT_DEPTH 8 + +/* keep next up to date with the definition for MAX_CB_ELEMS_FOR_TAGGER in tagger.sp.c */ +#if defined(HAS_SP_2400) +#define NUM_CONTINUOUS_FRAMES 15 +#else +#define NUM_CONTINUOUS_FRAMES 10 +#endif +#define NUM_MIPI_FRAMES_PER_STREAM 2 + +#define NUM_ONLINE_INIT_CONTINUOUS_FRAMES 2 + +#define NR_OF_PIPELINES IA_CSS_PIPE_ID_NUM /* Must match with IA_CSS_PIPE_ID_NUM */ + +#define SH_CSS_MAX_IF_CONFIGS 3 /* Must match with IA_CSS_NR_OF_CONFIGS (not defined yet).*/ +#define SH_CSS_IF_CONFIG_NOT_NEEDED 0xFF + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +#define SH_CSS_ENABLE_METADATA +#endif + +#if defined(SH_CSS_ENABLE_METADATA) && !defined(USE_INPUT_SYSTEM_VERSION_2401) +#define SH_CSS_ENABLE_METADATA_THREAD +#endif + + + /* + * SH_CSS_MAX_SP_THREADS: + * sp threads visible to host with connected communication queues + * these threads are capable of running an image pipe + * SH_CSS_MAX_SP_INTERNAL_THREADS: + * internal sp service threads, no communication queues to host + * these threads can't be used as image pipe + */ + +#if defined(SH_CSS_ENABLE_METADATA_THREAD) +#define SH_CSS_SP_INTERNAL_METADATA_THREAD 1 +#else +#define SH_CSS_SP_INTERNAL_METADATA_THREAD 0 +#endif + +#define SH_CSS_SP_INTERNAL_SERVICE_THREAD 1 + +#ifdef __DISABLE_UNUSED_THREAD__ + #define SH_CSS_MAX_SP_THREADS 0 +#else + #define SH_CSS_MAX_SP_THREADS 5 +#endif + +#define SH_CSS_MAX_SP_INTERNAL_THREADS (\ + SH_CSS_SP_INTERNAL_SERVICE_THREAD +\ + SH_CSS_SP_INTERNAL_METADATA_THREAD) + +#define SH_CSS_MAX_PIPELINES SH_CSS_MAX_SP_THREADS + +/** + * The C99 standard does not specify the exact object representation of structs; + * the representation is compiler dependent. + * + * The structs that are communicated between host and SP/ISP should have the + * exact same object representation. The compiler that is used to compile the + * firmware is hivecc. + * + * To check if a different compiler, used to compile a host application, uses + * another object representation, macros are defined specifying the size of + * the structs as expected by the firmware. + * + * A host application shall verify that a sizeof( ) of the struct is equal to + * the SIZE_OF_XXX macro of the corresponding struct. If they are not + * equal, functionality will break. + */ +#define CALC_ALIGNMENT_MEMBER(x, y) (CEIL_MUL(x, y) - x) +#define SIZE_OF_HRT_VADDRESS sizeof(hive_uint32) +#define SIZE_OF_IA_CSS_PTR sizeof(uint32_t) + +/* Number of SP's */ +#define NUM_OF_SPS 1 + +#define NUM_OF_BLS 0 + +/* Enum for order of Binaries */ +enum sh_css_order_binaries { + SP_FIRMWARE = 0, + ISP_FIRMWARE +}; + + /* + * JB: keep next enum in sync with thread id's + * and pipe id's + */ +enum sh_css_pipe_config_override { + SH_CSS_PIPE_CONFIG_OVRD_NONE = 0, + SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD = 0xffff +}; + +enum host2sp_commands { + host2sp_cmd_error = 0, + /* + * The host2sp_cmd_ready command is the only command written by the SP + * It acknowledges that is previous command has been received. + * (this does not mean that the command has been executed) + * It also indicates that a new command can be send (it is a queue + * with depth 1). + */ + host2sp_cmd_ready = 1, + /* Command written by the Host */ + host2sp_cmd_dummy, /* No action, can be used as watchdog */ + host2sp_cmd_start_flash, /* Request SP to start the flash */ + host2sp_cmd_terminate, /* SP should terminate itself */ + N_host2sp_cmd +}; + +/* Enumeration used to indicate the events that are produced by + * the SP and consumed by the Host. + * + * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC: + * 1) "enum ia_css_event_type" (ia_css_event_public.h) + * 2) "enum sh_css_sp_event_type" (sh_css_internal.h) + * 3) "enum ia_css_event_type event_id_2_event_mask" (event_handler.sp.c) + * 4) "enum ia_css_event_type convert_event_sp_to_host_domain" (sh_css.c) + */ +enum sh_css_sp_event_type { + SH_CSS_SP_EVENT_OUTPUT_FRAME_DONE, + SH_CSS_SP_EVENT_SECOND_OUTPUT_FRAME_DONE, + SH_CSS_SP_EVENT_VF_OUTPUT_FRAME_DONE, + SH_CSS_SP_EVENT_SECOND_VF_OUTPUT_FRAME_DONE, + SH_CSS_SP_EVENT_3A_STATISTICS_DONE, + SH_CSS_SP_EVENT_DIS_STATISTICS_DONE, + SH_CSS_SP_EVENT_PIPELINE_DONE, + SH_CSS_SP_EVENT_FRAME_TAGGED, + SH_CSS_SP_EVENT_INPUT_FRAME_DONE, + SH_CSS_SP_EVENT_METADATA_DONE, + SH_CSS_SP_EVENT_LACE_STATISTICS_DONE, + SH_CSS_SP_EVENT_ACC_STAGE_COMPLETE, + SH_CSS_SP_EVENT_TIMER, + SH_CSS_SP_EVENT_PORT_EOF, + SH_CSS_SP_EVENT_FW_WARNING, + SH_CSS_SP_EVENT_FW_ASSERT, + SH_CSS_SP_EVENT_NR_OF_TYPES /* must be last */ +}; + +/* xmem address map allocation per pipeline, css pointers */ +/* Note that the struct below should only consist of hrt_vaddress-es + Otherwise this will cause a fail in the function ref_sh_css_ddr_address_map + */ +struct sh_css_ddr_address_map { + hrt_vaddress isp_param; + hrt_vaddress isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; + hrt_vaddress macc_tbl; + hrt_vaddress fpn_tbl; + hrt_vaddress sc_tbl; + hrt_vaddress tetra_r_x; + hrt_vaddress tetra_r_y; + hrt_vaddress tetra_gr_x; + hrt_vaddress tetra_gr_y; + hrt_vaddress tetra_gb_x; + hrt_vaddress tetra_gb_y; + hrt_vaddress tetra_b_x; + hrt_vaddress tetra_b_y; + hrt_vaddress tetra_ratb_x; + hrt_vaddress tetra_ratb_y; + hrt_vaddress tetra_batr_x; + hrt_vaddress tetra_batr_y; + hrt_vaddress dvs_6axis_params_y; +}; +#define SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT \ + (SIZE_OF_HRT_VADDRESS + \ + (SH_CSS_MAX_STAGES * IA_CSS_NUM_MEMORIES * SIZE_OF_HRT_VADDRESS) + \ + (16 * SIZE_OF_HRT_VADDRESS)) + +/* xmem address map allocation per pipeline */ +struct sh_css_ddr_address_map_size { + size_t isp_param; + size_t isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; + size_t macc_tbl; + size_t fpn_tbl; + size_t sc_tbl; + size_t tetra_r_x; + size_t tetra_r_y; + size_t tetra_gr_x; + size_t tetra_gr_y; + size_t tetra_gb_x; + size_t tetra_gb_y; + size_t tetra_b_x; + size_t tetra_b_y; + size_t tetra_ratb_x; + size_t tetra_ratb_y; + size_t tetra_batr_x; + size_t tetra_batr_y; + size_t dvs_6axis_params_y; +}; + +struct sh_css_ddr_address_map_compound { + struct sh_css_ddr_address_map map; + struct sh_css_ddr_address_map_size size; +}; + +struct ia_css_isp_parameter_set_info { + struct sh_css_ddr_address_map mem_map;/** pointers to Parameters in ISP format IMPT: + This should be first member of this struct */ + uint32_t isp_parameters_id;/** Unique ID to track which config was actually applied to a particular frame */ + ia_css_ptr output_frame_ptr;/** Output frame to which this config has to be applied (optional) */ +}; + +/* this struct contains all arguments that can be passed to + a binary. It depends on the binary which ones are used. */ +struct sh_css_binary_args { + struct ia_css_frame *in_frame; /* input frame */ + struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ +#ifndef ISP2401 + struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; /* tnr frames */ +#else + struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ +#endif + struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ + struct ia_css_frame *out_vf_frame; /* viewfinder output frame */ + bool copy_vf; + bool copy_output; + unsigned vf_downscale_log2; +}; + +#if SP_DEBUG == SP_DEBUG_DUMP + +#define SH_CSS_NUM_SP_DEBUG 48 + +struct sh_css_sp_debug_state { + unsigned int error; + unsigned int debug[SH_CSS_NUM_SP_DEBUG]; +}; + +#elif SP_DEBUG == SP_DEBUG_COPY + +#define SH_CSS_SP_DBG_TRACE_DEPTH (40) + +struct sh_css_sp_debug_trace { + uint16_t frame; + uint16_t line; + uint16_t pixel_distance; + uint16_t mipi_used_dword; + uint16_t sp_index; +}; + +struct sh_css_sp_debug_state { + uint16_t if_start_line; + uint16_t if_start_column; + uint16_t if_cropped_height; + uint16_t if_cropped_width; + unsigned int index; + struct sh_css_sp_debug_trace + trace[SH_CSS_SP_DBG_TRACE_DEPTH]; +}; + +#elif SP_DEBUG == SP_DEBUG_TRACE + +#if 1 +/* Example of just one global trace */ +#define SH_CSS_SP_DBG_NR_OF_TRACES (1) +#define SH_CSS_SP_DBG_TRACE_DEPTH (40) +#else +/* E.g. if you like seperate traces for 4 threads */ +#define SH_CSS_SP_DBG_NR_OF_TRACES (4) +#define SH_CSS_SP_DBG_TRACE_DEPTH (10) +#endif + +#define SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS (13) + +struct sh_css_sp_debug_trace { + uint16_t time_stamp; + uint16_t location; /* bit 15..13 = file_id, 12..0 = line nr. */ + uint32_t data; +}; + +struct sh_css_sp_debug_state { + struct sh_css_sp_debug_trace + trace[SH_CSS_SP_DBG_NR_OF_TRACES][SH_CSS_SP_DBG_TRACE_DEPTH]; + uint16_t index_last[SH_CSS_SP_DBG_NR_OF_TRACES]; + uint8_t index[SH_CSS_SP_DBG_NR_OF_TRACES]; +}; + +#elif SP_DEBUG == SP_DEBUG_MINIMAL + +#define SH_CSS_NUM_SP_DEBUG 128 + +struct sh_css_sp_debug_state { + unsigned int error; + unsigned int debug[SH_CSS_NUM_SP_DEBUG]; +}; + +#endif + + +struct sh_css_sp_debug_command { + /* + * The DMA software-mask, + * Bit 31...24: unused. + * Bit 23...16: unused. + * Bit 15...08: reading-request enabling bits for DMA channel 7..0 + * Bit 07...00: writing-reqeust enabling bits for DMA channel 7..0 + * + * For example, "0...0 0...0 11111011 11111101" indicates that the + * writing request through DMA Channel 1 and the reading request + * through DMA channel 2 are both disabled. The others are enabled. + */ + uint32_t dma_sw_reg; +}; + +#if !defined(HAS_NO_INPUT_FORMATTER) +/* SP input formatter configuration.*/ +struct sh_css_sp_input_formatter_set { + uint32_t stream_format; + input_formatter_cfg_t config_a; + input_formatter_cfg_t config_b; +}; +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) +#define IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT (3) +#endif + +/* SP configuration information */ +struct sh_css_sp_config { + uint8_t no_isp_sync; /* Signal host immediately after start */ + uint8_t enable_raw_pool_locking; /** Enable Raw Buffer Locking for HALv3 Support */ + uint8_t lock_all; + /** If raw buffer locking is enabled, this flag indicates whether raw + frames are locked when their EOF event is successfully sent to the + host (true) or when they are passed to the preview/video pipe + (false). */ +#if !defined(HAS_NO_INPUT_FORMATTER) + struct { + uint8_t a_changed; + uint8_t b_changed; + uint8_t isp_2ppc; + struct sh_css_sp_input_formatter_set set[SH_CSS_MAX_IF_CONFIGS]; /* CSI-2 port is used as index. */ + } input_formatter; +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + sync_generator_cfg_t sync_gen; + tpg_cfg_t tpg; + prbs_cfg_t prbs; + input_system_cfg_t input_circuit; + uint8_t input_circuit_cfg_changed; + uint32_t mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT]; +#endif +#if !defined(HAS_NO_INPUT_SYSTEM) + uint8_t enable_isys_event_queue; +#endif + uint8_t disable_cont_vf; +}; + +enum sh_css_stage_type { + SH_CSS_SP_STAGE_TYPE = 0, + SH_CSS_ISP_STAGE_TYPE = 1 +}; +#define SH_CSS_NUM_STAGE_TYPES 2 + +#define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS (1 << 0) +#define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS_MASK \ + ((SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << SH_CSS_MAX_SP_THREADS)-1) + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) +struct sh_css_sp_pipeline_terminal { + union { + /* Input System 2401 */ + virtual_input_system_stream_t virtual_input_system_stream[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; + } context; + /* + * TODO + * - Remove "virtual_input_system_cfg" when the ISYS2401 DLI is ready. + */ + union { + /* Input System 2401 */ + virtual_input_system_stream_cfg_t virtual_input_system_stream_cfg[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; + } ctrl; +}; + +struct sh_css_sp_pipeline_io { + struct sh_css_sp_pipeline_terminal input; + /* pqiao: comment out temporarily to save dmem */ + /*struct sh_css_sp_pipeline_terminal output;*/ +}; + +/* This struct tracks how many streams are registered per CSI port. + * This is used to track which streams have already been configured. + * Only when all streams are configured, the CSI RX is started for that port. + */ +struct sh_css_sp_pipeline_io_status { + uint32_t active[N_INPUT_SYSTEM_CSI_PORT]; /** registered streams */ + uint32_t running[N_INPUT_SYSTEM_CSI_PORT]; /** configured streams */ +}; + +#endif +enum sh_css_port_dir { + SH_CSS_PORT_INPUT = 0, + SH_CSS_PORT_OUTPUT = 1 +}; + +enum sh_css_port_type { + SH_CSS_HOST_TYPE = 0, + SH_CSS_COPYSINK_TYPE = 1, + SH_CSS_TAGGERSINK_TYPE = 2 +}; + +/* Pipe inout settings: output port on 7-4bits, input port on 3-0bits */ +#define SH_CSS_PORT_FLD_WIDTH_IN_BITS (4) +#define SH_CSS_PORT_TYPE_BIT_FLD(pt) (0x1 << (pt)) +#define SH_CSS_PORT_FLD(pd) ((pd) ? SH_CSS_PORT_FLD_WIDTH_IN_BITS : 0) +#define SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) ((p) |= (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd))) +#define SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt) ((p) &= ~(SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd))) +#define SH_CSS_PIPE_PORT_CONFIG_SET(p, pd, pt, val) ((val) ? \ + SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) : SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt)) +#define SH_CSS_PIPE_PORT_CONFIG_GET(p, pd, pt) ((p) & (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd))) +#define SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(p) \ + (!(SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_INPUT, SH_CSS_HOST_TYPE) && \ + SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_OUTPUT, SH_CSS_HOST_TYPE))) + +#define IA_CSS_ACQUIRE_ISP_POS 31 + +/* Flags for metadata processing */ +#define SH_CSS_METADATA_ENABLED 0x01 +#define SH_CSS_METADATA_PROCESSED 0x02 +#define SH_CSS_METADATA_OFFLINE_MODE 0x04 +#define SH_CSS_METADATA_WAIT_INPUT 0x08 + +/* @brief Free an array of metadata buffers. + * + * @param[in] num_bufs Number of metadata buffers to be freed. + * @param[in] bufs Pointer of array of metadata buffers. + * + * This function frees an array of metadata buffers. + */ +void +ia_css_metadata_free_multiple(unsigned int num_bufs, struct ia_css_metadata **bufs); + +/* Macro for handling pipe_qos_config */ +#define QOS_INVALID (~0U) +#define QOS_ALL_STAGES_DISABLED (0U) +#define QOS_STAGE_MASK(num) (0x00000001 << num) +#define SH_CSS_IS_QOS_PIPE(pipe) ((pipe)->pipe_qos_config != QOS_INVALID) +#define SH_CSS_QOS_STAGE_ENABLE(pipe, num) ((pipe)->pipe_qos_config |= QOS_STAGE_MASK(num)) +#define SH_CSS_QOS_STAGE_DISABLE(pipe, num) ((pipe)->pipe_qos_config &= ~QOS_STAGE_MASK(num)) +#define SH_CSS_QOS_STAGE_IS_ENABLED(pipe, num) ((pipe)->pipe_qos_config & QOS_STAGE_MASK(num)) +#define SH_CSS_QOS_STAGE_IS_ALL_DISABLED(pipe) ((pipe)->pipe_qos_config == QOS_ALL_STAGES_DISABLED) +#define SH_CSS_QOS_MODE_PIPE_ADD(mode, pipe) ((mode) |= (0x1 << (pipe)->pipe_id)) +#define SH_CSS_QOS_MODE_PIPE_REMOVE(mode, pipe) ((mode) &= ~(0x1 << (pipe)->pipe_id)) +#define SH_CSS_IS_QOS_ONLY_MODE(mode) ((mode) == (0x1 << IA_CSS_PIPE_ID_ACC)) + +/* Information for a pipeline */ +struct sh_css_sp_pipeline { + uint32_t pipe_id; /* the pipe ID */ + uint32_t pipe_num; /* the dynamic pipe number */ + uint32_t thread_id; /* the sp thread ID */ + uint32_t pipe_config; /* the pipe config */ + uint32_t pipe_qos_config; /* Bitmap of multiple QOS extension fw state. + (0xFFFFFFFF) indicates non QOS pipe.*/ + uint32_t inout_port_config; + uint32_t required_bds_factor; + uint32_t dvs_frame_delay; +#if !defined(HAS_NO_INPUT_SYSTEM) + uint32_t input_system_mode; /* enum ia_css_input_mode */ + uint32_t port_id; /* port_id for input system */ +#endif + uint32_t num_stages; /* the pipe config */ + uint32_t running; /* needed for pipe termination */ + hrt_vaddress sp_stage_addr[SH_CSS_MAX_STAGES]; + hrt_vaddress scaler_pp_lut; /* Early bound LUT */ + uint32_t dummy; /* stage ptr is only used on sp but lives in + this struct; needs cleanup */ + int32_t num_execs; /* number of times to run if this is + an acceleration pipe. */ +#if defined(SH_CSS_ENABLE_METADATA) + struct { + uint32_t format; /* Metadata format in hrt format */ + uint32_t width; /* Width of a line */ + uint32_t height; /* Number of lines */ + uint32_t stride; /* Stride (in bytes) per line */ + uint32_t size; /* Total size (in bytes) */ + hrt_vaddress cont_buf; /* Address of continuous buffer */ + } metadata; +#endif +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + uint32_t output_frame_queue_id; +#endif + union { + struct { + uint32_t bytes_available; + } bin; + struct { + uint32_t height; + uint32_t width; + uint32_t padded_width; + uint32_t max_input_width; + uint32_t raw_bit_depth; + } raw; + } copy; +#ifdef ISP2401 + + /* Parameters passed to Shading Correction kernel. */ + struct { + uint32_t internal_frame_origin_x_bqs_on_sctbl; /* Origin X (bqs) of internal frame on shading table */ + uint32_t internal_frame_origin_y_bqs_on_sctbl; /* Origin Y (bqs) of internal frame on shading table */ + } shading; +#endif +}; + +/* + * The first frames (with comment Dynamic) can be dynamic or static + * The other frames (ref_in and below) can only be static + * Static means that the data addres will not change during the life time + * of the associated pipe. Dynamic means that the data address can + * change with every (frame) iteration of the associated pipe + * + * s3a and dis are now also dynamic but (stil) handled seperately + */ +#define SH_CSS_NUM_DYNAMIC_FRAME_IDS (3) + +struct ia_css_frames_sp { + struct ia_css_frame_sp in; + struct ia_css_frame_sp out[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_resolution effective_in_res; + struct ia_css_frame_sp out_vf; + struct ia_css_frame_sp_info internal_frame_info; + struct ia_css_buffer_sp s3a_buf; + struct ia_css_buffer_sp dvs_buf; +#if defined SH_CSS_ENABLE_METADATA + struct ia_css_buffer_sp metadata_buf; +#endif +}; + +/* Information for a single pipeline stage for an ISP */ +struct sh_css_isp_stage { + /* + * For compatability and portabilty, only types + * from "stdint.h" are allowed + * + * Use of "enum" and "bool" is prohibited + * Multiple boolean flags can be stored in an + * integer + */ + struct ia_css_blob_info blob_info; + struct ia_css_binary_info binary_info; + char binary_name[SH_CSS_MAX_BINARY_NAME]; + struct ia_css_isp_param_css_segments mem_initializers; +}; + +/* Information for a single pipeline stage */ +struct sh_css_sp_stage { + /* + * For compatability and portabilty, only types + * from "stdint.h" are allowed + * + * Use of "enum" and "bool" is prohibited + * Multiple boolean flags can be stored in an + * integer + */ + uint8_t num; /* Stage number */ + uint8_t isp_online; + uint8_t isp_copy_vf; + uint8_t isp_copy_output; + uint8_t sp_enable_xnr; + uint8_t isp_deci_log_factor; + uint8_t isp_vf_downscale_bits; + uint8_t deinterleaved; +/* + * NOTE: Programming the input circuit can only be done at the + * start of a session. It is illegal to program it during execution + * The input circuit defines the connectivity + */ + uint8_t program_input_circuit; +/* enum ia_css_pipeline_stage_sp_func func; */ + uint8_t func; + /* The type of the pipe-stage */ + /* enum sh_css_stage_type stage_type; */ + uint8_t stage_type; + uint8_t num_stripes; + uint8_t isp_pipe_version; + struct { + uint8_t vf_output; + uint8_t s3a; + uint8_t sdis; + uint8_t dvs_stats; + uint8_t lace_stats; + } enable; + /* Add padding to come to a word boundary */ + /* unsigned char padding[0]; */ + + struct sh_css_crop_pos sp_out_crop_pos; + struct ia_css_frames_sp frames; + struct ia_css_resolution dvs_envelope; + struct sh_css_uds_info uds; + hrt_vaddress isp_stage_addr; + hrt_vaddress xmem_bin_addr; + hrt_vaddress xmem_map_addr; + + uint16_t top_cropping; + uint16_t row_stripes_height; + uint16_t row_stripes_overlap_lines; + uint8_t if_config_index; /* Which should be applied by this stage. */ +}; + +/* + * Time: 2012-07-19, 17:40. + * Note: Add a new data memeber "debug" in "sh_css_sp_group". This + * data member is used to pass the debugging command from the + * Host to the SP. + * + * Time: Before 2012-07-19. + * Note: + * Group all host initialized SP variables into this struct. + * This is initialized every stage through dma. + * The stage part itself is transfered through sh_css_sp_stage. +*/ +struct sh_css_sp_group { + struct sh_css_sp_config config; + struct sh_css_sp_pipeline pipe[SH_CSS_MAX_SP_THREADS]; +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) + struct sh_css_sp_pipeline_io pipe_io[SH_CSS_MAX_SP_THREADS]; + struct sh_css_sp_pipeline_io_status pipe_io_status; +#endif + struct sh_css_sp_debug_command debug; +}; + +/* Data in SP dmem that is set from the host every stage. */ +struct sh_css_sp_per_frame_data { + /* ddr address of sp_group and sp_stage */ + hrt_vaddress sp_group_addr; +}; + +#define SH_CSS_NUM_SDW_IRQS 3 + +/* Output data from SP to css */ +struct sh_css_sp_output { + unsigned int bin_copy_bytes_copied; +#if SP_DEBUG != SP_DEBUG_NONE + struct sh_css_sp_debug_state debug; +#endif + unsigned int sw_interrupt_value[SH_CSS_NUM_SDW_IRQS]; +}; + +#define CONFIG_ON_FRAME_ENQUEUE() 0 + +/** + * @brief Data structure for the circular buffer. + * The circular buffer is empty if "start == end". The + * circular buffer is full if "(end + 1) % size == start". + */ +/* Variable Sized Buffer Queue Elements */ + +#define IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE 6 +#define IA_CSS_NUM_ELEMS_HOST2SP_PARAM_QUEUE 3 +#define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 6 + +#if !defined(HAS_NO_INPUT_SYSTEM) +/* sp-to-host queue is expected to be emptied in ISR since + * it is used instead of HW interrupts (due to HW design issue). + * We need one queue element per CSI port. */ +#define IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS) +/* The host-to-sp queue needs to allow for some delay + * in the emptying of this queue in the SP since there is no + * separate SP thread for this. */ +#define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS) +#else +#define IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE 0 +#define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE 0 +#define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 0 +#endif + +#if defined(HAS_SP_2400) +#define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 13 +#define IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE 19 +#define IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE 26 /* holds events for all type of buffers, hence deeper */ +#else +#define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 6 +#define IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE 6 +#define IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE 6 +#endif + +struct sh_css_hmm_buffer { + union { + struct ia_css_isp_3a_statistics s3a; + struct ia_css_isp_dvs_statistics dis; + hrt_vaddress skc_dvs_statistics; + hrt_vaddress lace_stat; + struct ia_css_metadata metadata; + struct frame_data_wrapper { + hrt_vaddress frame_data; + uint32_t flashed; + uint32_t exp_id; + uint32_t isp_parameters_id; /** Unique ID to track which config was + actually applied to a particular frame */ +#if CONFIG_ON_FRAME_ENQUEUE() + struct sh_css_config_on_frame_enqueue config_on_frame_enqueue; +#endif + } frame; + hrt_vaddress ddr_ptrs; + } payload; + /* + * kernel_ptr is present for host administration purposes only. + * type is uint64_t in order to be 64-bit host compatible. + * uint64_t does not exist on SP/ISP. + * Size of the struct is checked by sp.hive.c. + */ +#if !defined(__ISP) + CSS_ALIGN(uint64_t cookie_ptr, 8); /* TODO: check if this alignment is needed */ + uint64_t kernel_ptr; +#else + CSS_ALIGN(struct { uint32_t a[2]; } cookie_ptr, 8); /* TODO: check if this alignment is needed */ + struct { uint32_t a[2]; } kernel_ptr; +#endif + struct ia_css_time_meas timing_data; + clock_value_t isys_eof_clock_tick; +}; +#if CONFIG_ON_FRAME_ENQUEUE() +#define SIZE_OF_FRAME_STRUCT \ + (SIZE_OF_HRT_VADDRESS + \ + (3 * sizeof(uint32_t)) + \ + sizeof(uint32_t)) +#else +#define SIZE_OF_FRAME_STRUCT \ + (SIZE_OF_HRT_VADDRESS + \ + (3 * sizeof(uint32_t))) +#endif + +#define SIZE_OF_PAYLOAD_UNION \ + (MAX(MAX(MAX(MAX( \ + SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT, \ + SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT), \ + SIZE_OF_IA_CSS_METADATA_STRUCT), \ + SIZE_OF_FRAME_STRUCT), \ + SIZE_OF_HRT_VADDRESS)) + +/* Do not use sizeof(uint64_t) since that does not exist of SP */ +#define SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT \ + (SIZE_OF_PAYLOAD_UNION + \ + CALC_ALIGNMENT_MEMBER(SIZE_OF_PAYLOAD_UNION, 8) + \ + 8 + \ + 8 + \ + SIZE_OF_IA_CSS_TIME_MEAS_STRUCT + \ + SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT + \ + CALC_ALIGNMENT_MEMBER(SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT, 8)) + +enum sh_css_queue_type { + sh_css_invalid_queue_type = -1, + sh_css_host2sp_buffer_queue, + sh_css_sp2host_buffer_queue, + sh_css_host2sp_psys_event_queue, + sh_css_sp2host_psys_event_queue, +#if !defined(HAS_NO_INPUT_SYSTEM) + sh_css_sp2host_isys_event_queue, + sh_css_host2sp_isys_event_queue, + sh_css_host2sp_tag_cmd_queue, +#endif +}; + +struct sh_css_event_irq_mask { + uint16_t or_mask; + uint16_t and_mask; +}; +#define SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT \ + (2 * sizeof(uint16_t)) + +struct host_sp_communication { + /* + * Don't use enum host2sp_commands, because the sizeof an enum is + * compiler dependant and thus non-portable + */ + uint32_t host2sp_command; + + /* + * The frame buffers that are reused by the + * copy pipe in the offline preview mode. + * + * host2sp_offline_frames[0]: the input frame of the preview pipe. + * host2sp_offline_frames[1]: the output frame of the copy pipe. + * + * TODO: + * Remove it when the Host and the SP is decoupled. + */ + hrt_vaddress host2sp_offline_frames[NUM_CONTINUOUS_FRAMES]; + hrt_vaddress host2sp_offline_metadata[NUM_CONTINUOUS_FRAMES]; + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + hrt_vaddress host2sp_mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + hrt_vaddress host2sp_mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + uint32_t host2sp_num_mipi_frames[N_CSI_PORTS]; +#endif + uint32_t host2sp_cont_avail_num_raw_frames; + uint32_t host2sp_cont_extra_num_raw_frames; + uint32_t host2sp_cont_target_num_raw_frames; + struct sh_css_event_irq_mask host2sp_event_irq_mask[NR_OF_PIPELINES]; + +}; + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +#define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT \ + (sizeof(uint32_t) + \ + (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) + \ + (N_CSI_PORTS * NUM_MIPI_FRAMES_PER_STREAM * SIZE_OF_HRT_VADDRESS * 2) + \ + ((3 + N_CSI_PORTS) * sizeof(uint32_t)) + \ + (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT)) +#else +#define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT \ + (sizeof(uint32_t) + \ + (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) + \ + (3 * sizeof(uint32_t)) + \ + (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT)) +#endif + +struct host_sp_queues { + /* + * Queues for the dynamic frame information, + * i.e. the "in_frame" buffer, the "out_frame" + * buffer and the "vf_out_frame" buffer. + */ + ia_css_circbuf_desc_t host2sp_buffer_queues_desc + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; + ia_css_circbuf_elem_t host2sp_buffer_queues_elems + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES] + [IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE]; + ia_css_circbuf_desc_t sp2host_buffer_queues_desc + [SH_CSS_MAX_NUM_QUEUES]; + ia_css_circbuf_elem_t sp2host_buffer_queues_elems + [SH_CSS_MAX_NUM_QUEUES][IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE]; + + /* + * The queues for the events. + */ + ia_css_circbuf_desc_t host2sp_psys_event_queue_desc; + ia_css_circbuf_elem_t host2sp_psys_event_queue_elems + [IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE]; + ia_css_circbuf_desc_t sp2host_psys_event_queue_desc; + ia_css_circbuf_elem_t sp2host_psys_event_queue_elems + [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE]; + +#if !defined(HAS_NO_INPUT_SYSTEM) + /* + * The queues for the ISYS events. + */ + ia_css_circbuf_desc_t host2sp_isys_event_queue_desc; + ia_css_circbuf_elem_t host2sp_isys_event_queue_elems + [IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE]; + ia_css_circbuf_desc_t sp2host_isys_event_queue_desc; + ia_css_circbuf_elem_t sp2host_isys_event_queue_elems + [IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE]; + /* + * The queue for the tagger commands. + * CHECK: are these last two present on the 2401 ? + */ + ia_css_circbuf_desc_t host2sp_tag_cmd_queue_desc; + ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems + [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE]; +#endif +}; + +#define SIZE_OF_QUEUES_ELEMS \ + (SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT * \ + ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE) + \ + (SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE) + \ + (IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE) + \ + (IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE) + \ + (IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE) + \ + (IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE) + \ + (IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE))) + +#if !defined(HAS_NO_INPUT_SYSTEM) +#define IA_CSS_NUM_CIRCBUF_DESCS 5 +#else +#ifndef ISP2401 +#define IA_CSS_NUM_CIRCBUF_DESCS 3 +#else +#define IA_CSS_NUM_CIRCBUF_DESCS 2 +#endif +#endif + +#define SIZE_OF_QUEUES_DESC \ + ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * \ + SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \ + (SH_CSS_MAX_NUM_QUEUES * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \ + (IA_CSS_NUM_CIRCBUF_DESCS * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT)) + +#define SIZE_OF_HOST_SP_QUEUES_STRUCT \ + (SIZE_OF_QUEUES_ELEMS + SIZE_OF_QUEUES_DESC) + +extern int (*sh_css_printf)(const char *fmt, va_list args); + +static inline void +sh_css_print(const char *fmt, ...) +{ + va_list ap; + + if (sh_css_printf) { + va_start(ap, fmt); + sh_css_printf(fmt, ap); + va_end(ap); + } +} + +static inline void +sh_css_vprint(const char *fmt, va_list args) +{ + if (sh_css_printf) + sh_css_printf(fmt, args); +} + +/* The following #if is there because this header file is also included + by SP and ISP code but they do not need this data and HIVECC has alignment + issue with the firmware struct/union's. + More permanent solution will be to refactor this include. +*/ +#if !defined(__ISP) +hrt_vaddress +sh_css_params_ddr_address_map(void); + +enum ia_css_err +sh_css_params_init(void); + +void +sh_css_params_uninit(void); + +void *sh_css_malloc(size_t size); + +void *sh_css_calloc(size_t N, size_t size); + +void sh_css_free(void *ptr); + +/* For Acceleration API: Flush FW (shared buffer pointer) arguments */ +void sh_css_flush(struct ia_css_acc_fw *fw); + + +void +sh_css_binary_args_reset(struct sh_css_binary_args *args); + +/* Check two frames for equality (format, resolution, bits per element) */ +bool +sh_css_frame_equal_types(const struct ia_css_frame *frame_a, + const struct ia_css_frame *frame_b); + +bool +sh_css_frame_info_equal_resolution(const struct ia_css_frame_info *info_a, + const struct ia_css_frame_info *info_b); + +void +sh_css_capture_enable_bayer_downscaling(bool enable); + +void +sh_css_binary_print(const struct ia_css_binary *binary); + +/* aligned argument of sh_css_frame_info_set_width can be used for an extra alignment requirement. + When 0, no extra alignment is done. */ +void +sh_css_frame_info_set_width(struct ia_css_frame_info *info, + unsigned int width, + unsigned int aligned); + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) + +unsigned int +sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx); + +#endif + +hrt_vaddress +sh_css_store_sp_group_to_ddr(void); + +hrt_vaddress +sh_css_store_sp_stage_to_ddr(unsigned pipe, unsigned stage); + +hrt_vaddress +sh_css_store_isp_stage_to_ddr(unsigned pipe, unsigned stage); + + +void +sh_css_update_uds_and_crop_info( + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + bool enable_zoom + ); + +void +sh_css_invalidate_shading_tables(struct ia_css_stream *stream); + +struct ia_css_pipeline * +ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe); + +unsigned int +ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe); + +unsigned int +ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe); + +bool +sh_css_continuous_is_enabled(uint8_t pipe_num); + +struct ia_css_pipe * +find_pipe_by_num(uint32_t pipe_num); + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +void +ia_css_get_crop_offsets( + struct ia_css_pipe *pipe, + struct ia_css_frame_info *in_frame); +#endif +#endif /* !defined(__ISP) */ + +#endif /* _SH_CSS_INTERNAL_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h new file mode 100644 index 0000000000000..4fd25ba2cd0da --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h @@ -0,0 +1,77 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_LEGACY_H_ +#define _SH_CSS_LEGACY_H_ + +#include +#include +#include +#include +#include +#include + +/* The pipe id type, distinguishes the kind of pipes that + * can be run in parallel. + */ +enum ia_css_pipe_id { + IA_CSS_PIPE_ID_PREVIEW, + IA_CSS_PIPE_ID_COPY, + IA_CSS_PIPE_ID_VIDEO, + IA_CSS_PIPE_ID_CAPTURE, + IA_CSS_PIPE_ID_YUVPP, +#ifndef ISP2401 + IA_CSS_PIPE_ID_ACC, + IA_CSS_PIPE_ID_NUM +#else + IA_CSS_PIPE_ID_ACC +#endif +}; +#ifdef ISP2401 +#define IA_CSS_PIPE_ID_NUM (IA_CSS_PIPE_ID_ACC+1) +#endif + +struct ia_css_pipe_extra_config { + bool enable_raw_binning; + bool enable_yuv_ds; + bool enable_high_speed; + bool enable_dvs_6axis; + bool enable_reduced_pipe; + bool enable_fractional_ds; + bool disable_vf_pp; +}; + +enum ia_css_err +ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, + const struct ia_css_pipe_extra_config *extra_config, + struct ia_css_pipe **pipe); + +void +ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config *extra_config); + +enum ia_css_err +ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe, + enum ia_css_pipe_id *pipe_id); + +/* DEPRECATED. FPN is not supported. */ +enum ia_css_err +sh_css_set_black_frame(struct ia_css_stream *stream, + const struct ia_css_frame *raw_black_frame); + +#ifndef ISP2401 +void +sh_css_enable_cont_capt(bool enable, bool stop_copy_preview); + +#endif +#endif /* _SH_CSS_LEGACY_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metadata.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metadata.c new file mode 100644 index 0000000000000..ebdf84d4a1380 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metadata.c @@ -0,0 +1,16 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* This file will contain the code to implement the functions declared in ia_css_metadata.h + and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c new file mode 100644 index 0000000000000..48e5542b3a43e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c @@ -0,0 +1,176 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "assert_support.h" +#include "sh_css_metrics.h" + +#include "sp.h" +#include "isp.h" + +#include "sh_css_internal.h" + +#define MULTIPLE_PCS 0 +#define SUSPEND 0 +#define NOF_PCS 1 +#define RESUME_MASK 0x8 +#define STOP_MASK 0x0 + +static bool pc_histogram_enabled; +static struct sh_css_pc_histogram *isp_histogram; +static struct sh_css_pc_histogram *sp_histogram; + +struct sh_css_metrics sh_css_metrics; + +void +sh_css_metrics_start_frame(void) +{ + sh_css_metrics.frame_metrics.num_frames++; +} + +static void +clear_histogram(struct sh_css_pc_histogram *histogram) +{ + unsigned i; + + assert(histogram != NULL); + + for (i = 0; i < histogram->length; i++) { + histogram->run[i] = 0; + histogram->stall[i] = 0; + histogram->msink[i] = 0xFFFF; + } +} + +void +sh_css_metrics_enable_pc_histogram(bool enable) +{ + pc_histogram_enabled = enable; +} + +static void +make_histogram(struct sh_css_pc_histogram *histogram, unsigned length) +{ + assert(histogram != NULL); + + if (histogram->length) + return; + if (histogram->run) + return; + histogram->run = sh_css_malloc(length * sizeof(*histogram->run)); + if (!histogram->run) + return; + histogram->stall = sh_css_malloc(length * sizeof(*histogram->stall)); + if (!histogram->stall) + return; + histogram->msink = sh_css_malloc(length * sizeof(*histogram->msink)); + if (!histogram->msink) + return; + + histogram->length = length; + clear_histogram(histogram); +} + +static void +insert_binary_metrics(struct sh_css_binary_metrics **l, + struct sh_css_binary_metrics *metrics) +{ + assert(l != NULL); + assert(*l != NULL); + assert(metrics != NULL); + + for (; *l; l = &(*l)->next) + if (*l == metrics) + return; + + *l = metrics; + metrics->next = NULL; +} + +void +sh_css_metrics_start_binary(struct sh_css_binary_metrics *metrics) +{ + assert(metrics != NULL); + + if (!pc_histogram_enabled) + return; + + isp_histogram = &metrics->isp_histogram; + sp_histogram = &metrics->sp_histogram; + make_histogram(isp_histogram, ISP_PMEM_DEPTH); + make_histogram(sp_histogram, SP_PMEM_DEPTH); + insert_binary_metrics(&sh_css_metrics.binary_metrics, metrics); +} + +void +sh_css_metrics_sample_pcs(void) +{ + bool stall; + unsigned int pc; + unsigned int msink; + +#if SUSPEND + unsigned int sc = 0; + unsigned int stopped_sc = 0; + unsigned int resume_sc = 0; +#endif + + +#if MULTIPLE_PCS + int i; + unsigned int pc_tab[NOF_PCS]; + + for (i = 0; i < NOF_PCS; i++) + pc_tab[i] = 0; +#endif + + if (!pc_histogram_enabled) + return; + + if (isp_histogram) { +#if SUSPEND + /* STOP the ISP */ + isp_ctrl_store(ISP0_ID, ISP_SC_REG, STOP_MASK); +#endif + msink = isp_ctrl_load(ISP0_ID, ISP_CTRL_SINK_REG); +#if MULTIPLE_PCS + for (i = 0; i < NOF_PCS; i++) + pc_tab[i] = isp_ctrl_load(ISP0_ID, ISP_PC_REG); +#else + pc = isp_ctrl_load(ISP0_ID, ISP_PC_REG); +#endif + +#if SUSPEND + /* RESUME the ISP */ + isp_ctrl_store(ISP0_ID, ISP_SC_REG, RESUME_MASK); +#endif + isp_histogram->msink[pc] &= msink; + stall = (msink != 0x7FF); + + if (stall) + isp_histogram->stall[pc]++; + else + isp_histogram->run[pc]++; + } + + if (sp_histogram && 0) { + msink = sp_ctrl_load(SP0_ID, SP_CTRL_SINK_REG); + pc = sp_ctrl_load(SP0_ID, SP_PC_REG); + sp_histogram->msink[pc] &= msink; + stall = (msink != 0x7FF); + if (stall) + sp_histogram->stall[pc]++; + else + sp_histogram->run[pc]++; + } +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h new file mode 100644 index 0000000000000..2ef9238d95ad5 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h @@ -0,0 +1,55 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_METRICS_H_ +#define _SH_CSS_METRICS_H_ + +#include + +struct sh_css_pc_histogram { + unsigned length; + unsigned *run; + unsigned *stall; + unsigned *msink; +}; + +struct sh_css_binary_metrics { + unsigned mode; + unsigned id; + struct sh_css_pc_histogram isp_histogram; + struct sh_css_pc_histogram sp_histogram; + struct sh_css_binary_metrics *next; +}; + +struct ia_css_frame_metrics { + unsigned num_frames; +}; + +struct sh_css_metrics { + struct sh_css_binary_metrics *binary_metrics; + struct ia_css_frame_metrics frame_metrics; +}; + +extern struct sh_css_metrics sh_css_metrics; + +/* includes ia_css_binary.h, which depends on sh_css_metrics.h */ +#include "ia_css_types.h" + +/* Sample ISP and SP pc and add to histogram */ +void sh_css_metrics_enable_pc_histogram(bool enable); +void sh_css_metrics_start_frame(void); +void sh_css_metrics_start_binary(struct sh_css_binary_metrics *metrics); +void sh_css_metrics_sample_pcs(void); + +#endif /* _SH_CSS_METRICS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c new file mode 100644 index 0000000000000..a6a00024bae84 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c @@ -0,0 +1,749 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_mipi.h" +#include "sh_css_mipi.h" +#include +#include "system_global.h" +#include "ia_css_err.h" +#include "ia_css_pipe.h" +#include "ia_css_stream_format.h" +#include "sh_css_stream_format.h" +#include "ia_css_stream_public.h" +#include "ia_css_frame_public.h" +#include "ia_css_input_port.h" +#include "ia_css_debug.h" +#include "sh_css_struct.h" +#include "sh_css_defs.h" +#include "sh_css_sp.h" /* sh_css_update_host2sp_mipi_frame sh_css_update_host2sp_num_mipi_frames ... */ +#include "sw_event_global.h" /* IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY */ + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +static uint32_t ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */ +#endif + +enum ia_css_err +ia_css_mipi_frame_specify(const unsigned int size_mem_words, + const bool contiguous) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + my_css.size_mem_words = size_mem_words; + (void)contiguous; + + return err; +} + +#ifdef ISP2401 +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +/* + * Check if a source port or TPG/PRBS ID is valid + */ +static bool ia_css_mipi_is_source_port_valid(struct ia_css_pipe *pipe, + unsigned int *pport) +{ + bool ret = true; + unsigned int port = 0; + unsigned int max_ports = 0; + + switch (pipe->stream->config.mode) { + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: + port = (unsigned int) pipe->stream->config.source.port.port; + max_ports = N_CSI_PORTS; + break; + case IA_CSS_INPUT_MODE_TPG: + port = (unsigned int) pipe->stream->config.source.tpg.id; + max_ports = N_CSS_TPG_IDS; + break; + case IA_CSS_INPUT_MODE_PRBS: + port = (unsigned int) pipe->stream->config.source.prbs.id; + max_ports = N_CSS_PRBS_IDS; + break; + default: + assert(false); + ret = false; + break; + } + + if (ret) { + assert(port < max_ports); + + if (port >= max_ports) + ret = false; + } + + *pport = port; + + return ret; +} +#endif + +#endif +/* Assumptions: + * - A line is multiple of 4 bytes = 1 word. + * - Each frame has SOF and EOF (each 1 word). + * - Each line has format header and optionally SOL and EOL (each 1 word). + * - Odd and even lines of YUV420 format are different in bites per pixel size. + * - Custom size of embedded data. + * -- Interleaved frames are not taken into account. + * -- Lines are multiples of 8B, and not necessary of (custom 3B, or 7B + * etc.). + * Result is given in DDR mem words, 32B or 256 bits + */ +enum ia_css_err +ia_css_mipi_frame_calculate_size(const unsigned int width, + const unsigned int height, + const enum atomisp_input_format format, + const bool hasSOLandEOL, + const unsigned int embedded_data_size_words, + unsigned int *size_mem_words) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + unsigned int bits_per_pixel = 0; + unsigned int even_line_bytes = 0; + unsigned int odd_line_bytes = 0; + unsigned int words_per_odd_line = 0; + unsigned int words_for_first_line = 0; + unsigned int words_per_even_line = 0; + unsigned int mem_words_per_even_line = 0; + unsigned int mem_words_per_odd_line = 0; + unsigned int mem_words_for_first_line = 0; + unsigned int mem_words_for_EOF = 0; + unsigned int mem_words = 0; + unsigned int width_padded = width; + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + /* The changes will be reverted as soon as RAW + * Buffers are deployed by the 2401 Input System + * in the non-continuous use scenario. + */ + width_padded += (2 * ISP_VEC_NELEMS); +#endif + + IA_CSS_ENTER("padded_width=%d, height=%d, format=%d, hasSOLandEOL=%d, embedded_data_size_words=%d\n", + width_padded, height, format, hasSOLandEOL, embedded_data_size_words); + + switch (format) { + case ATOMISP_INPUT_FORMAT_RAW_6: /* 4p, 3B, 24bits */ + bits_per_pixel = 6; break; + case ATOMISP_INPUT_FORMAT_RAW_7: /* 8p, 7B, 56bits */ + bits_per_pixel = 7; break; + case ATOMISP_INPUT_FORMAT_RAW_8: /* 1p, 1B, 8bits */ + case ATOMISP_INPUT_FORMAT_BINARY_8: /* 8bits, TODO: check. */ + case ATOMISP_INPUT_FORMAT_YUV420_8: /* odd 2p, 2B, 16bits, even 2p, 4B, 32bits */ + bits_per_pixel = 8; break; + case ATOMISP_INPUT_FORMAT_YUV420_10: /* odd 4p, 5B, 40bits, even 4p, 10B, 80bits */ + case ATOMISP_INPUT_FORMAT_RAW_10: /* 4p, 5B, 40bits */ +#if !defined(HAS_NO_PACKED_RAW_PIXELS) + /* The changes will be reverted as soon as RAW + * Buffers are deployed by the 2401 Input System + * in the non-continuous use scenario. + */ + bits_per_pixel = 10; +#else + bits_per_pixel = 16; +#endif + break; + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: /* 2p, 3B, 24bits */ + case ATOMISP_INPUT_FORMAT_RAW_12: /* 2p, 3B, 24bits */ + bits_per_pixel = 12; break; + case ATOMISP_INPUT_FORMAT_RAW_14: /* 4p, 7B, 56bits */ + bits_per_pixel = 14; break; + case ATOMISP_INPUT_FORMAT_RGB_444: /* 1p, 2B, 16bits */ + case ATOMISP_INPUT_FORMAT_RGB_555: /* 1p, 2B, 16bits */ + case ATOMISP_INPUT_FORMAT_RGB_565: /* 1p, 2B, 16bits */ + case ATOMISP_INPUT_FORMAT_YUV422_8: /* 2p, 4B, 32bits */ + bits_per_pixel = 16; break; + case ATOMISP_INPUT_FORMAT_RGB_666: /* 4p, 9B, 72bits */ + bits_per_pixel = 18; break; + case ATOMISP_INPUT_FORMAT_YUV422_10: /* 2p, 5B, 40bits */ + bits_per_pixel = 20; break; + case ATOMISP_INPUT_FORMAT_RGB_888: /* 1p, 3B, 24bits */ + bits_per_pixel = 24; break; + + case ATOMISP_INPUT_FORMAT_YUV420_16: /* Not supported */ + case ATOMISP_INPUT_FORMAT_YUV422_16: /* Not supported */ + case ATOMISP_INPUT_FORMAT_RAW_16: /* TODO: not specified in MIPI SPEC, check */ + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + odd_line_bytes = (width_padded * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */ + + /* Even lines for YUV420 formats are double in bits_per_pixel. */ + if (format == ATOMISP_INPUT_FORMAT_YUV420_8 + || format == ATOMISP_INPUT_FORMAT_YUV420_10 + || format == ATOMISP_INPUT_FORMAT_YUV420_16) { + even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */ + } else { + even_line_bytes = odd_line_bytes; + } + + /* a frame represented in memory: ()- optional; data - payload words. + * addr 0 1 2 3 4 5 6 7: + * first SOF (SOL) PACK_H data data data data data + * data data data data data data data data + * ... + * data data 0 0 0 0 0 0 + * second (EOL) (SOL) PACK_H data data data data data + * data data data data data data data data + * ... + * data data 0 0 0 0 0 0 + * ... + * last (EOL) EOF 0 0 0 0 0 0 + * + * Embedded lines are regular lines stored before the first and after + * payload lines. + */ + + words_per_odd_line = (odd_line_bytes + 3) >> 2; + /* ceil(odd_line_bytes/4); word = 4 bytes */ + words_per_even_line = (even_line_bytes + 3) >> 2; + words_for_first_line = words_per_odd_line + 2 + (hasSOLandEOL ? 1 : 0); + /* + SOF +packet header + optionally (SOL), but (EOL) is not in the first line */ + words_per_odd_line += (1 + (hasSOLandEOL ? 2 : 0)); + /* each non-first line has format header, and optionally (SOL) and (EOL). */ + words_per_even_line += (1 + (hasSOLandEOL ? 2 : 0)); + + mem_words_per_odd_line = (words_per_odd_line + 7) >> 3; + /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */ + mem_words_for_first_line = (words_for_first_line + 7) >> 3; + mem_words_per_even_line = (words_per_even_line + 7) >> 3; + mem_words_for_EOF = 1; /* last line consisit of the optional (EOL) and EOF */ + + mem_words = ((embedded_data_size_words + 7) >> 3) + + mem_words_for_first_line + + (((height + 1) >> 1) - 1) * mem_words_per_odd_line + + /* ceil (height/2) - 1 (first line is calculated separatelly) */ + (height >> 1) * mem_words_per_even_line + /* floor(height/2) */ + mem_words_for_EOF; + + *size_mem_words = mem_words; /* ceil(words/8); mem word is 32B = 8words. */ + /* Check if the above is still needed. */ + + IA_CSS_LEAVE_ERR(err); + return err; +} + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) +enum ia_css_err +ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, + const unsigned int size_mem_words) +{ + uint32_t idx; + + enum ia_css_err err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + + OP___assert(port < N_CSI_PORTS); + OP___assert(size_mem_words != 0); + + for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT && + my_css.mipi_sizes_for_check[port][idx] != 0; + idx++) { /* do nothing */ + } + if (idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT) { + my_css.mipi_sizes_for_check[port][idx] = size_mem_words; + err = IA_CSS_SUCCESS; + } + + return err; +} +#endif + +void +mipi_init(void) +{ +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + unsigned int i; + + for (i = 0; i < N_CSI_PORTS; i++) + ref_count_mipi_allocation[i] = 0; +#endif +} + +enum ia_css_err +calculate_mipi_buff_size( + struct ia_css_stream_config *stream_cfg, + unsigned int *size_mem_words) +{ +#if !defined(USE_INPUT_SYSTEM_VERSION_2401) + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + (void)stream_cfg; + (void)size_mem_words; +#else + unsigned int width; + unsigned int height; + enum atomisp_input_format format; + bool pack_raw_pixels; + + unsigned int width_padded; + unsigned int bits_per_pixel = 0; + + unsigned int even_line_bytes = 0; + unsigned int odd_line_bytes = 0; + + unsigned int words_per_odd_line = 0; + unsigned int words_per_even_line = 0; + + unsigned int mem_words_per_even_line = 0; + unsigned int mem_words_per_odd_line = 0; + + unsigned int mem_words_per_buff_line = 0; + unsigned int mem_words_per_buff = 0; + enum ia_css_err err = IA_CSS_SUCCESS; + + /** +#ifndef ISP2401 + * zhengjie.lu@intel.com + * +#endif + * NOTE + * - In the struct "ia_css_stream_config", there + * are two members: "input_config" and "isys_config". + * Both of them provide the same information, e.g. + * input_res and format. + * + * Question here is that: which one shall be used? + */ + width = stream_cfg->input_config.input_res.width; + height = stream_cfg->input_config.input_res.height; + format = stream_cfg->input_config.format; + pack_raw_pixels = stream_cfg->pack_raw_pixels; + /* end of NOTE */ + + /** +#ifndef ISP2401 + * zhengjie.lu@intel.com + * +#endif + * NOTE + * - The following code is derived from the + * existing code "ia_css_mipi_frame_calculate_size()". + * + * Question here is: why adding "2 * ISP_VEC_NELEMS" + * to "width_padded", but not making "width_padded" + * aligned with "2 * ISP_VEC_NELEMS"? + */ + /* The changes will be reverted as soon as RAW + * Buffers are deployed by the 2401 Input System + * in the non-continuous use scenario. + */ + width_padded = width + (2 * ISP_VEC_NELEMS); + /* end of NOTE */ + + IA_CSS_ENTER("padded_width=%d, height=%d, format=%d\n", + width_padded, height, format); + + bits_per_pixel = sh_css_stream_format_2_bits_per_subpixel(format); + bits_per_pixel = + (format == ATOMISP_INPUT_FORMAT_RAW_10 && pack_raw_pixels) ? bits_per_pixel : 16; + if (bits_per_pixel == 0) + return IA_CSS_ERR_INTERNAL_ERROR; + + odd_line_bytes = (width_padded * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */ + + /* Even lines for YUV420 formats are double in bits_per_pixel. */ + if (format == ATOMISP_INPUT_FORMAT_YUV420_8 + || format == ATOMISP_INPUT_FORMAT_YUV420_10) { + even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */ + } else { + even_line_bytes = odd_line_bytes; + } + + words_per_odd_line = (odd_line_bytes + 3) >> 2; + /* ceil(odd_line_bytes/4); word = 4 bytes */ + words_per_even_line = (even_line_bytes + 3) >> 2; + + mem_words_per_odd_line = (words_per_odd_line + 7) >> 3; + /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */ + mem_words_per_even_line = (words_per_even_line + 7) >> 3; + + mem_words_per_buff_line = + (mem_words_per_odd_line > mem_words_per_even_line) ? mem_words_per_odd_line : mem_words_per_even_line; + mem_words_per_buff = mem_words_per_buff_line * height; + + *size_mem_words = mem_words_per_buff; + + IA_CSS_LEAVE_ERR(err); +#endif + return err; +} + +enum ia_css_err +allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) +{ +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; +#ifndef ISP2401 + unsigned int port; +#else + unsigned int port = 0; +#endif + struct ia_css_frame_info mipi_intermediate_info; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) enter:\n", pipe); + + assert(pipe != NULL); + assert(pipe->stream != NULL); + if ((pipe == NULL) || (pipe->stream == NULL)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit: pipe or stream is null.\n", + pipe); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + if (pipe->stream->config.online) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit: no buffers needed for 2401 pipe mode.\n", + pipe); + return IA_CSS_SUCCESS; + } + +#endif +#ifndef ISP2401 + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { +#else + if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit: no buffers needed for pipe mode.\n", + pipe); + return IA_CSS_SUCCESS; /* AM TODO: Check */ + } + +#ifndef ISP2401 + port = (unsigned int) pipe->stream->config.source.port.port; + assert(port < N_CSI_PORTS); + if (port >= N_CSI_PORTS) { +#else + if (!ia_css_mipi_is_source_port_valid(pipe, &port)) { +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit: error: port is not correct (port=%d).\n", + pipe, port); + return IA_CSS_ERR_INTERNAL_ERROR; + } + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + err = calculate_mipi_buff_size( + &(pipe->stream->config), + &(my_css.mipi_frame_size[port])); +#endif + +#if defined(USE_INPUT_SYSTEM_VERSION_2) + if (ref_count_mipi_allocation[port] != 0) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit: already allocated for this port (port=%d).\n", + pipe, port); + return IA_CSS_SUCCESS; + } +#else + /* 2401 system allows multiple streams to use same physical port. This is not + * true for 2400 system. Currently 2401 uses MIPI buffers as a temporary solution. + * TODO AM: Once that is changed (removed) this code should be removed as well. + * In that case only 2400 related code should remain. + */ + if (ref_count_mipi_allocation[port] != 0) { + ref_count_mipi_allocation[port]++; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) leave: nothing to do, already allocated for this port (port=%d).\n", + pipe, port); + return IA_CSS_SUCCESS; + } +#endif + + ref_count_mipi_allocation[port]++; + + /* TODO: Cleaning needed. */ + /* This code needs to modified to allocate the MIPI frames in the correct normal way + with an allocate from info, by justin */ + mipi_intermediate_info = pipe->pipe_settings.video.video_binary.internal_frame_info; + mipi_intermediate_info.res.width = 0; + mipi_intermediate_info.res.height = 0; + /* To indicate it is not (yet) valid format. */ + mipi_intermediate_info.format = IA_CSS_FRAME_FORMAT_NUM; + mipi_intermediate_info.padded_width = 0; + mipi_intermediate_info.raw_bit_depth = 0; + + /* AM TODO: mipi frames number should come from stream struct. */ + my_css.num_mipi_frames[port] = NUM_MIPI_FRAMES_PER_STREAM; + + /* Incremental allocation (per stream), not for all streams at once. */ + { /* limit the scope of i,j */ + unsigned i, j; + for (i = 0; i < my_css.num_mipi_frames[port]; i++) { + /* free previous frame */ + if (my_css.mipi_frames[port][i]) { + ia_css_frame_free(my_css.mipi_frames[port][i]); + my_css.mipi_frames[port][i] = NULL; + } + /* check if new frame is needed */ + if (i < my_css.num_mipi_frames[port]) { + /* allocate new frame */ + err = ia_css_frame_allocate_with_buffer_size( + &my_css.mipi_frames[port][i], + my_css.mipi_frame_size[port] * HIVE_ISP_DDR_WORD_BYTES, + false); + if (err != IA_CSS_SUCCESS) { + for (j = 0; j < i; j++) { + if (my_css.mipi_frames[port][j]) { + ia_css_frame_free(my_css.mipi_frames[port][j]); + my_css.mipi_frames[port][j] = NULL; + } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p, %d) exit: error: allocation failed.\n", + pipe, port); + return err; + } + } + if (info->metadata_info.size > 0) { + /* free previous metadata buffer */ + if (my_css.mipi_metadata[port][i] != NULL) { + ia_css_metadata_free(my_css.mipi_metadata[port][i]); + my_css.mipi_metadata[port][i] = NULL; + } + /* check if need to allocate a new metadata buffer */ + if (i < my_css.num_mipi_frames[port]) { + /* allocate new metadata buffer */ + my_css.mipi_metadata[port][i] = ia_css_metadata_allocate(&info->metadata_info); + if (my_css.mipi_metadata[port][i] == NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_metadata(%p, %d) failed.\n", + pipe, port); + return err; + } + } + } + } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "allocate_mipi_frames(%p) exit:\n", pipe); + + return err; +#else + (void)pipe; + (void)info; + return IA_CSS_SUCCESS; +#endif +} + +enum ia_css_err +free_mipi_frames(struct ia_css_pipe *pipe) +{ +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; +#ifndef ISP2401 + unsigned int port; +#else + unsigned int port = 0; +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(%p) enter:\n", pipe); + + /* assert(pipe != NULL); TEMP: TODO: Should be assert only. */ + if (pipe != NULL) { + assert(pipe->stream != NULL); + if ((pipe == NULL) || (pipe->stream == NULL)) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(%p) exit: error: pipe or stream is null.\n", + pipe); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + +#ifndef ISP2401 + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { +#else + if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(%p) exit: error: wrong mode.\n", + pipe); + return err; + } + +#ifndef ISP2401 + port = (unsigned int) pipe->stream->config.source.port.port; + assert(port < N_CSI_PORTS); + if (port >= N_CSI_PORTS) { +#else + if (!ia_css_mipi_is_source_port_valid(pipe, &port)) { +#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, +#ifndef ISP2401 + "free_mipi_frames(%p, %d) exit: error: pipe port is not correct.\n", +#else + "free_mipi_frames(%p) exit: error: pipe port is not correct (port=%d).\n", +#endif + pipe, port); + return err; + } +#ifdef ISP2401 + +#endif + if (ref_count_mipi_allocation[port] > 0) { +#if defined(USE_INPUT_SYSTEM_VERSION_2) + assert(ref_count_mipi_allocation[port] == 1); + if (ref_count_mipi_allocation[port] != 1) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(%p) exit: error: wrong ref_count (ref_count=%d).\n", + pipe, ref_count_mipi_allocation[port]); + return err; + } +#endif + + ref_count_mipi_allocation[port]--; + + if (ref_count_mipi_allocation[port] == 0) { + /* no streams are using this buffer, so free it */ + unsigned int i; + for (i = 0; i < my_css.num_mipi_frames[port]; i++) { + if (my_css.mipi_frames[port][i] != NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(port=%d, num=%d).\n", port, i); + ia_css_frame_free(my_css.mipi_frames[port][i]); + my_css.mipi_frames[port][i] = NULL; + } + if (my_css.mipi_metadata[port][i] != NULL) { + ia_css_metadata_free(my_css.mipi_metadata[port][i]); + my_css.mipi_metadata[port][i] = NULL; + } + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(%p) exit (deallocated).\n", pipe); + } +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + else { + /* 2401 system allows multiple streams to use same physical port. This is not + * true for 2400 system. Currently 2401 uses MIPI buffers as a temporary solution. + * TODO AM: Once that is changed (removed) this code should be removed as well. + * In that case only 2400 related code should remain. + */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(%p) leave: nothing to do, other streams still use this port (port=%d).\n", + pipe, port); + } +#endif + } + } else { /* pipe ==NULL */ + /* AM TEMP: free-ing all mipi buffers just like a legacy code. */ + for (port = CSI_PORT0_ID; port < N_CSI_PORTS; port++) { + unsigned int i; + for (i = 0; i < my_css.num_mipi_frames[port]; i++) { + if (my_css.mipi_frames[port][i] != NULL) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "free_mipi_frames(port=%d, num=%d).\n", port, i); + ia_css_frame_free(my_css.mipi_frames[port][i]); + my_css.mipi_frames[port][i] = NULL; + } + if (my_css.mipi_metadata[port][i] != NULL) { + ia_css_metadata_free(my_css.mipi_metadata[port][i]); + my_css.mipi_metadata[port][i] = NULL; + } + } + ref_count_mipi_allocation[port] = 0; + } + } +#else + (void)pipe; +#endif + return IA_CSS_SUCCESS; +} + +enum ia_css_err +send_mipi_frames(struct ia_css_pipe *pipe) +{ +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + unsigned int i; +#ifndef ISP2401 + unsigned int port; +#else + unsigned int port = 0; +#endif + + IA_CSS_ENTER_PRIVATE("pipe=%p", pipe); + + assert(pipe != NULL); + assert(pipe->stream != NULL); + if (pipe == NULL || pipe->stream == NULL) { + IA_CSS_ERROR("pipe or stream is null"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + /* multi stream video needs mipi buffers */ + /* nothing to be done in other cases. */ +#ifndef ISP2401 + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { +#else + if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { +#endif + IA_CSS_LOG("nothing to be done for this mode"); + return IA_CSS_SUCCESS; + /* TODO: AM: maybe this should be returning an error. */ + } + +#ifndef ISP2401 + port = (unsigned int) pipe->stream->config.source.port.port; + assert(port < N_CSI_PORTS); + if (port >= N_CSI_PORTS) { + IA_CSS_ERROR("invalid port specified (%d)", port); +#else + if (!ia_css_mipi_is_source_port_valid(pipe, &port)) { + IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).\n", pipe, port); +#endif + return err; + } + + /* Hand-over the SP-internal mipi buffers */ + for (i = 0; i < my_css.num_mipi_frames[port]; i++) { + /* Need to include the ofset for port. */ + sh_css_update_host2sp_mipi_frame(port * NUM_MIPI_FRAMES_PER_STREAM + i, + my_css.mipi_frames[port][i]); + sh_css_update_host2sp_mipi_metadata(port * NUM_MIPI_FRAMES_PER_STREAM + i, + my_css.mipi_metadata[port][i]); + } + sh_css_update_host2sp_num_mipi_frames(my_css.num_mipi_frames[port]); + + /********************************** + * Send an event to inform the SP + * that all MIPI frames are passed. + **********************************/ + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + IA_CSS_ERROR("sp is not running"); + return err; + } + + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY, + (uint8_t)port, + (uint8_t)my_css.num_mipi_frames[port], + 0 /* not used */); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); +#else + (void)pipe; +#endif + return IA_CSS_SUCCESS; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h new file mode 100644 index 0000000000000..990f678422fd2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h @@ -0,0 +1,49 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SH_CSS_MIPI_H +#define __SH_CSS_MIPI_H + +#include /* ia_css_err */ +#include /* ia_css_pipe */ +#include /* ia_css_stream_config */ + +void +mipi_init(void); + +enum ia_css_err +allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info); + +enum ia_css_err +free_mipi_frames(struct ia_css_pipe *pipe); + +enum ia_css_err +send_mipi_frames(struct ia_css_pipe *pipe); + +/** + * @brief Calculate the required MIPI buffer sizes. + * Based on the stream configuration, calculate the + * required MIPI buffer sizes (in DDR words). + * + * @param[in] stream_cfg Point to the target stream configuration + * @param[out] size_mem_words MIPI buffer size in DDR words. + * + * @return + */ +enum ia_css_err +calculate_mipi_buff_size( + struct ia_css_stream_config *stream_cfg, + unsigned int *size_mem_words); + +#endif /* __SH_CSS_MIPI_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c new file mode 100644 index 0000000000000..237e38b2f0c19 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c @@ -0,0 +1,56 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_mmu.h" +#include "ia_css_mmu_private.h" +#include +#include "sh_css_sp.h" +#include "sh_css_firmware.h" +#include "sp.h" +#include "mmu_device.h" + +void +ia_css_mmu_invalidate_cache(void) +{ + const struct ia_css_fw_info *fw = &sh_css_sp_fw; + unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_mmu_invalidate_cache() enter\n"); + + /* if the SP is not running we should not access its dmem */ + if (sh_css_sp_is_running()) { + HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; + + (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; /* Suppres warnings in CRUN */ + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), + true); + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_mmu_invalidate_cache() leave\n"); +} + +/* Deprecated, this is an HRT backend function (memory_access.h) */ +void +sh_css_mmu_set_page_table_base_index(hrt_data base_index) +{ + int i; + IA_CSS_ENTER_PRIVATE("base_index=0x%08x\n", base_index); + for (i = 0; i < N_MMU_ID; i++) { + mmu_ID_t mmu_id = i; + mmu_set_page_table_base_index(mmu_id, base_index); + mmu_invalidate_cache(mmu_id); + } + IA_CSS_LEAVE_PRIVATE(""); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_morph.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_morph.c new file mode 100644 index 0000000000000..1f4fa25b1e79c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_morph.c @@ -0,0 +1,16 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* This file will contain the code to implement the functions declared in ia_css_morph.h + and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c new file mode 100644 index 0000000000000..57dd5e7988c98 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c @@ -0,0 +1,267 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "sh_css_param_dvs.h" +#include +#include +#include +#include +#include "ia_css_debug.h" +#include "memory_access.h" + +static struct ia_css_dvs_6axis_config * +alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_dvs_6axis_config *dvs_config_src) +{ + unsigned int width_y = 0; + unsigned int height_y = 0; + unsigned int width_uv = 0; + unsigned int height_uv = 0; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_dvs_6axis_config *dvs_config = NULL; + + dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_malloc(sizeof(struct ia_css_dvs_6axis_config)); + if (dvs_config == NULL) { + IA_CSS_ERROR("out of memory"); + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + else + { /*Initialize new struct with latest config settings*/ + if (NULL != dvs_config_src) { + dvs_config->width_y = width_y = dvs_config_src->width_y; + dvs_config->height_y = height_y = dvs_config_src->height_y; + dvs_config->width_uv = width_uv = dvs_config_src->width_uv; + dvs_config->height_uv = height_uv = dvs_config_src->height_uv; + IA_CSS_LOG("alloc_dvs_6axis_table Y: W %d H %d", width_y, height_y); + } + else if (NULL != frame_res) { + dvs_config->width_y = width_y = DVS_TABLE_IN_BLOCKDIM_X_LUMA(frame_res->width); + dvs_config->height_y = height_y = DVS_TABLE_IN_BLOCKDIM_Y_LUMA(frame_res->height); + dvs_config->width_uv = width_uv = DVS_TABLE_IN_BLOCKDIM_X_CHROMA(frame_res->width / 2); /* UV = Y/2, depens on colour format YUV 4.2.0*/ + dvs_config->height_uv = height_uv = DVS_TABLE_IN_BLOCKDIM_Y_CHROMA(frame_res->height / 2);/* UV = Y/2, depens on colour format YUV 4.2.0*/ + IA_CSS_LOG("alloc_dvs_6axis_table Y: W %d H %d", width_y, height_y); + } + + /* Generate Y buffers */ + dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + if (dvs_config->xcoords_y == NULL) { + IA_CSS_ERROR("out of memory"); + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto exit; + } + + dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + if (dvs_config->ycoords_y == NULL) { + IA_CSS_ERROR("out of memory"); + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto exit; + } + + /* Generate UV buffers */ + IA_CSS_LOG("UV W %d H %d", width_uv, height_uv); + + dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + if (dvs_config->xcoords_uv == NULL) { + IA_CSS_ERROR("out of memory"); + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto exit; + } + + dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + if (dvs_config->ycoords_uv == NULL) { + IA_CSS_ERROR("out of memory"); + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } +exit: + if (err != IA_CSS_SUCCESS) { + free_dvs_6axis_table(&dvs_config); /* we might have allocated some memory, release this */ + dvs_config = NULL; + } + } + + IA_CSS_LEAVE("dvs_config=%p", dvs_config); + return dvs_config; +} + +static void +init_dvs_6axis_table_from_default(struct ia_css_dvs_6axis_config *dvs_config, const struct ia_css_resolution *dvs_offset) +{ + unsigned int x, y; + unsigned int width_y = dvs_config->width_y; + unsigned int height_y = dvs_config->height_y; + unsigned int width_uv = dvs_config->width_uv; + unsigned int height_uv = dvs_config->height_uv; + + IA_CSS_LOG("Env_X=%d, Env_Y=%d, width_y=%d, height_y=%d", + dvs_offset->width, dvs_offset->height, width_y, height_y); + for (y = 0; y < height_y; y++) { + for (x = 0; x < width_y; x++) { + dvs_config->xcoords_y[y*width_y + x] = (dvs_offset->width + x*DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; + } + } + + for (y = 0; y < height_y; y++) { + for (x = 0; x < width_y; x++) { + dvs_config->ycoords_y[y*width_y + x] = (dvs_offset->height + y*DVS_BLOCKDIM_Y_LUMA) << DVS_COORD_FRAC_BITS; + } + } + + for (y = 0; y < height_uv; y++) { + for (x = 0; x < width_uv; x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ + dvs_config->xcoords_uv[y*width_uv + x] = ((dvs_offset->width / 2) + x*DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; + } + } + + for (y = 0; y < height_uv; y++) { + for (x = 0; x < width_uv; x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ + dvs_config->ycoords_uv[y*width_uv + x] = ((dvs_offset->height / 2) + y*DVS_BLOCKDIM_Y_CHROMA) << DVS_COORD_FRAC_BITS; + } + } + +} + +static void +init_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config, struct ia_css_dvs_6axis_config *dvs_config_src) +{ + unsigned int width_y = dvs_config->width_y; + unsigned int height_y = dvs_config->height_y; + unsigned int width_uv = dvs_config->width_uv; + unsigned int height_uv = dvs_config->height_uv; + + memcpy(dvs_config->xcoords_y, dvs_config_src->xcoords_y, (width_y * height_y * sizeof(uint32_t))); + memcpy(dvs_config->ycoords_y, dvs_config_src->ycoords_y, (width_y * height_y * sizeof(uint32_t))); + memcpy(dvs_config->xcoords_uv, dvs_config_src->xcoords_uv, (width_uv * height_uv * sizeof(uint32_t))); + memcpy(dvs_config->ycoords_uv, dvs_config_src->ycoords_uv, (width_uv * height_uv * sizeof(uint32_t))); +} + +struct ia_css_dvs_6axis_config * +generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, const struct ia_css_resolution *dvs_offset) +{ + struct ia_css_dvs_6axis_config *dvs_6axis_table; + + assert(frame_res != NULL); + assert(dvs_offset != NULL); + + dvs_6axis_table = alloc_dvs_6axis_table(frame_res, NULL); + if (dvs_6axis_table) { + init_dvs_6axis_table_from_default(dvs_6axis_table, dvs_offset); + return dvs_6axis_table; + } + return NULL; +} + +struct ia_css_dvs_6axis_config * +generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config_src) +{ + struct ia_css_dvs_6axis_config *dvs_6axis_table; + + assert(NULL != dvs_config_src); + + dvs_6axis_table = alloc_dvs_6axis_table(NULL, dvs_config_src); + if (dvs_6axis_table) { + init_dvs_6axis_table_from_config(dvs_6axis_table, dvs_config_src); + return dvs_6axis_table; + } + return NULL; +} + +void +free_dvs_6axis_table(struct ia_css_dvs_6axis_config **dvs_6axis_config) +{ + assert(dvs_6axis_config != NULL); + assert(*dvs_6axis_config != NULL); + + if ((dvs_6axis_config != NULL) && (*dvs_6axis_config != NULL)) + { + IA_CSS_ENTER_PRIVATE("dvs_6axis_config %p", (*dvs_6axis_config)); + if ((*dvs_6axis_config)->xcoords_y != NULL) + { + sh_css_free((*dvs_6axis_config)->xcoords_y); + (*dvs_6axis_config)->xcoords_y = NULL; + } + + if ((*dvs_6axis_config)->ycoords_y != NULL) + { + sh_css_free((*dvs_6axis_config)->ycoords_y); + (*dvs_6axis_config)->ycoords_y = NULL; + } + + /* Free up UV buffers */ + if ((*dvs_6axis_config)->xcoords_uv != NULL) + { + sh_css_free((*dvs_6axis_config)->xcoords_uv); + (*dvs_6axis_config)->xcoords_uv = NULL; + } + + if ((*dvs_6axis_config)->ycoords_uv != NULL) + { + sh_css_free((*dvs_6axis_config)->ycoords_uv); + (*dvs_6axis_config)->ycoords_uv = NULL; + } + + IA_CSS_LEAVE_PRIVATE("dvs_6axis_config %p", (*dvs_6axis_config)); + sh_css_free(*dvs_6axis_config); + *dvs_6axis_config = NULL; + } +} + +void copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, + const struct ia_css_dvs_6axis_config *dvs_config_src) +{ + unsigned int width_y; + unsigned int height_y; + unsigned int width_uv; + unsigned int height_uv; + + assert(dvs_config_src != NULL); + assert(dvs_config_dst != NULL); + assert(dvs_config_src->xcoords_y != NULL); + assert(dvs_config_src->xcoords_uv != NULL); + assert(dvs_config_src->ycoords_y != NULL); + assert(dvs_config_src->ycoords_uv != NULL); + assert(dvs_config_src->width_y == dvs_config_dst->width_y); + assert(dvs_config_src->width_uv == dvs_config_dst->width_uv); + assert(dvs_config_src->height_y == dvs_config_dst->height_y); + assert(dvs_config_src->height_uv == dvs_config_dst->height_uv); + + width_y = dvs_config_src->width_y; + height_y = dvs_config_src->height_y; + width_uv = dvs_config_src->width_uv; /* = Y/2, depens on colour format YUV 4.2.0*/ + height_uv = dvs_config_src->height_uv; + + memcpy(dvs_config_dst->xcoords_y, dvs_config_src->xcoords_y, (width_y * height_y * sizeof(uint32_t))); + memcpy(dvs_config_dst->ycoords_y, dvs_config_src->ycoords_y, (width_y * height_y * sizeof(uint32_t))); + + memcpy(dvs_config_dst->xcoords_uv, dvs_config_src->xcoords_uv, (width_uv * height_uv * sizeof(uint32_t))); + memcpy(dvs_config_dst->ycoords_uv, dvs_config_src->ycoords_uv, (width_uv * height_uv * sizeof(uint32_t))); + +} + +void +ia_css_dvs_statistics_get(enum dvs_statistics_type type, + union ia_css_dvs_statistics_host *host_stats, + const union ia_css_dvs_statistics_isp *isp_stats) +{ + + if (DVS_STATISTICS == type) + { + ia_css_get_dvs_statistics(host_stats->p_dvs_statistics_host, + isp_stats->p_dvs_statistics_isp); + } else if (DVS2_STATISTICS == type) + { + ia_css_get_dvs2_statistics(host_stats->p_dvs2_statistics_host, + isp_stats->p_dvs_statistics_isp); + } + return; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h new file mode 100644 index 0000000000000..79b563dc78eea --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h @@ -0,0 +1,86 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_PARAMS_DVS_H_ +#define _SH_CSS_PARAMS_DVS_H_ + +#include +#include +#ifdef ISP2401 +#include +#endif +#include "gdc_global.h" /* gdc_warp_param_mem_t */ + +#define DVS_ENV_MIN_X (12) +#define DVS_ENV_MIN_Y (12) + +#define DVS_BLOCKDIM_X (64) /* X block height*/ +#define DVS_BLOCKDIM_Y_LUMA (64) /* Y block height*/ +#define DVS_BLOCKDIM_Y_CHROMA (32) /* UV height block size is half the Y block height*/ + +#ifndef ISP2401 +/* horizontal 64x64 blocks round up to DVS_BLOCKDIM_X, make even */ +#define DVS_NUM_BLOCKS_X(X) (CEIL_MUL(CEIL_DIV((X), DVS_BLOCKDIM_X), 2)) + +/* vertical 64x64 blocks round up to DVS_BLOCKDIM_Y */ +#define DVS_NUM_BLOCKS_Y(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_LUMA)) +#define DVS_NUM_BLOCKS_X_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_X)) +#define DVS_NUM_BLOCKS_Y_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_CHROMA)) + + +#endif +#define DVS_TABLE_IN_BLOCKDIM_X_LUMA(X) (DVS_NUM_BLOCKS_X(X) + 1) /* N blocks have N + 1 set of coords */ +#define DVS_TABLE_IN_BLOCKDIM_X_CHROMA(X) (DVS_NUM_BLOCKS_X_CHROMA(X) + 1) +#define DVS_TABLE_IN_BLOCKDIM_Y_LUMA(X) (DVS_NUM_BLOCKS_Y(X) + 1) +#define DVS_TABLE_IN_BLOCKDIM_Y_CHROMA(X) (DVS_NUM_BLOCKS_Y_CHROMA(X) + 1) + +#define DVS_ENVELOPE_X(X) (((X) == 0) ? (DVS_ENV_MIN_X) : (X)) +#define DVS_ENVELOPE_Y(X) (((X) == 0) ? (DVS_ENV_MIN_Y) : (X)) + +#define DVS_COORD_FRAC_BITS (10) +#ifndef ISP2401 +#define DVS_INPUT_BYTES_PER_PIXEL (1) +#endif +#define XMEM_ALIGN_LOG2 (5) + +#define DVS_6AXIS_COORDS_ELEMS CEIL_MUL(sizeof(gdc_warp_param_mem_t) \ + , HIVE_ISP_DDR_WORD_BYTES) + +/* currently we only support two output with the same resolution, output 0 is th default one. */ +#define DVS_6AXIS_BYTES(binary) \ + (DVS_6AXIS_COORDS_ELEMS \ + * DVS_NUM_BLOCKS_X((binary)->out_frame_info[0].res.width) \ + * DVS_NUM_BLOCKS_Y((binary)->out_frame_info[0].res.height)) + +#ifndef ISP2401 +/* Bilinear interpolation (HRT_GDC_BLI_MODE) is the supported method currently. + * Bicubic interpolation (HRT_GDC_BCI_MODE) is not supported yet */ +#define DVS_GDC_INTERP_METHOD HRT_GDC_BLI_MODE + +#endif +struct ia_css_dvs_6axis_config * +generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, const struct ia_css_resolution *dvs_offset); + +struct ia_css_dvs_6axis_config * +generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config_src); + +void +free_dvs_6axis_table(struct ia_css_dvs_6axis_config **dvs_6axis_config); + +void +copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, + const struct ia_css_dvs_6axis_config *dvs_config_src); + + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c new file mode 100644 index 0000000000000..e6ebd1b08f0d6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c @@ -0,0 +1,417 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include + +#include +#include "sh_css_param_shading.h" +#include "ia_css_shading.h" +#include "assert_support.h" +#include "sh_css_defs.h" +#include "sh_css_internal.h" +#include "ia_css_debug.h" +#include "ia_css_pipe_binarydesc.h" + +#include "sh_css_hrt.h" + +#include "platform_support.h" + +/* Bilinear interpolation on shading tables: + * For each target point T, we calculate the 4 surrounding source points: + * ul (upper left), ur (upper right), ll (lower left) and lr (lower right). + * We then calculate the distances from the T to the source points: x0, x1, + * y0 and y1. + * We then calculate the value of T: + * dx0*dy0*Slr + dx0*dy1*Sur + dx1*dy0*Sll + dx1*dy1*Sul. + * We choose a grid size of 1x1 which means: + * dx1 = 1-dx0 + * dy1 = 1-dy0 + * + * Sul dx0 dx1 Sur + * .<----->|<------------->. + * ^ + * dy0| + * v T + * - . + * ^ + * | + * dy1| + * v + * . . + * Sll Slr + * + * Padding: + * The area that the ISP operates on can include padding both on the left + * and the right. We need to padd the shading table such that the shading + * values end up on the correct pixel values. This means we must padd the + * shading table to match the ISP padding. + * We can have 5 cases: + * 1. All 4 points fall in the left padding. + * 2. The left 2 points fall in the left padding. + * 3. All 4 points fall in the cropped (target) region. + * 4. The right 2 points fall in the right padding. + * 5. All 4 points fall in the right padding. + * Cases 1 and 5 are easy to handle: we simply use the + * value 1 in the shading table. + * Cases 2 and 4 require interpolation that takes into + * account how far into the padding area the pixels + * fall. We extrapolate the shading table into the + * padded area and then interpolate. + */ +static void +crop_and_interpolate(unsigned int cropped_width, + unsigned int cropped_height, + unsigned int left_padding, + int right_padding, + int top_padding, + const struct ia_css_shading_table *in_table, + struct ia_css_shading_table *out_table, + enum ia_css_sc_color color) +{ + unsigned int i, j, + sensor_width, + sensor_height, + table_width, + table_height, + table_cell_h, + out_cell_size, + in_cell_size, + out_start_row, + padded_width; + int out_start_col, /* can be negative to indicate padded space */ + table_cell_w; + unsigned short *in_ptr, + *out_ptr; + + assert(in_table != NULL); + assert(out_table != NULL); + + sensor_width = in_table->sensor_width; + sensor_height = in_table->sensor_height; + table_width = in_table->width; + table_height = in_table->height; + in_ptr = in_table->data[color]; + out_ptr = out_table->data[color]; + + padded_width = cropped_width + left_padding + right_padding; + out_cell_size = CEIL_DIV(padded_width, out_table->width - 1); + in_cell_size = CEIL_DIV(sensor_width, table_width - 1); + + out_start_col = ((int)sensor_width - (int)cropped_width)/2 - left_padding; + out_start_row = ((int)sensor_height - (int)cropped_height)/2 - top_padding; + table_cell_w = (int)((table_width-1) * in_cell_size); + table_cell_h = (table_height-1) * in_cell_size; + + for (i = 0; i < out_table->height; i++) { + int ty, src_y0, src_y1; + unsigned int sy0, sy1, dy0, dy1, divy; + + /* calculate target point and make sure it falls within + the table */ + ty = out_start_row + i * out_cell_size; + + /* calculate closest source points in shading table and + make sure they fall within the table */ + src_y0 = ty / (int)in_cell_size; + if (in_cell_size < out_cell_size) + src_y1 = (ty + out_cell_size) / in_cell_size; + else + src_y1 = src_y0 + 1; + src_y0 = clamp(src_y0, 0, (int)table_height-1); + src_y1 = clamp(src_y1, 0, (int)table_height-1); + ty = min(clamp(ty, 0, (int)sensor_height-1), + (int)table_cell_h); + + /* calculate closest source points for distance computation */ + sy0 = min(src_y0 * in_cell_size, sensor_height-1); + sy1 = min(src_y1 * in_cell_size, sensor_height-1); + /* calculate distance between source and target pixels */ + dy0 = ty - sy0; + dy1 = sy1 - ty; + divy = sy1 - sy0; + if (divy == 0) { + dy0 = 1; + divy = 1; + } + + for (j = 0; j < out_table->width; j++, out_ptr++) { + int tx, src_x0, src_x1; + unsigned int sx0, sx1, dx0, dx1, divx; + unsigned short s_ul, s_ur, s_ll, s_lr; + + /* calculate target point */ + tx = out_start_col + j * out_cell_size; + /* calculate closest source points. */ + src_x0 = tx / (int)in_cell_size; + if (in_cell_size < out_cell_size) { + src_x1 = (tx + out_cell_size) / + (int)in_cell_size; + } else { + src_x1 = src_x0 + 1; + } + /* if src points fall in padding, select closest ones.*/ + src_x0 = clamp(src_x0, 0, (int)table_width-1); + src_x1 = clamp(src_x1, 0, (int)table_width-1); + tx = min(clamp(tx, 0, (int)sensor_width-1), + (int)table_cell_w); + /* calculate closest source points for distance + computation */ + sx0 = min(src_x0 * in_cell_size, sensor_width-1); + sx1 = min(src_x1 * in_cell_size, sensor_width-1); + /* calculate distances between source and target + pixels */ + dx0 = tx - sx0; + dx1 = sx1 - tx; + divx = sx1 - sx0; + /* if we're at the edge, we just use the closest + point still in the grid. We make up for the divider + in this case by setting the distance to + out_cell_size, since it's actually 0. */ + if (divx == 0) { + dx0 = 1; + divx = 1; + } + + /* get source pixel values */ + s_ul = in_ptr[(table_width*src_y0)+src_x0]; + s_ur = in_ptr[(table_width*src_y0)+src_x1]; + s_ll = in_ptr[(table_width*src_y1)+src_x0]; + s_lr = in_ptr[(table_width*src_y1)+src_x1]; + + *out_ptr = (unsigned short) ((dx0*dy0*s_lr + dx0*dy1*s_ur + dx1*dy0*s_ll + dx1*dy1*s_ul) / + (divx*divy)); + } + } +} + +void +sh_css_params_shading_id_table_generate( + struct ia_css_shading_table **target_table, +#ifndef ISP2401 + const struct ia_css_binary *binary) +#else + unsigned int table_width, + unsigned int table_height) +#endif +{ + /* initialize table with ones, shift becomes zero */ +#ifndef ISP2401 + unsigned int i, j, table_width, table_height; +#else + unsigned int i, j; +#endif + struct ia_css_shading_table *result; + + assert(target_table != NULL); +#ifndef ISP2401 + assert(binary != NULL); +#endif + +#ifndef ISP2401 + table_width = binary->sctbl_width_per_color; + table_height = binary->sctbl_height; +#endif + result = ia_css_shading_table_alloc(table_width, table_height); + if (result == NULL) { + *target_table = NULL; + return; + } + + for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { + for (j = 0; j < table_height * table_width; j++) + result->data[i][j] = 1; + } + result->fraction_bits = 0; + *target_table = result; +} + +void +prepare_shading_table(const struct ia_css_shading_table *in_table, + unsigned int sensor_binning, + struct ia_css_shading_table **target_table, + const struct ia_css_binary *binary, + unsigned int bds_factor) +{ + unsigned int input_width, + input_height, + table_width, + table_height, + left_padding, + top_padding, + padded_width, + left_cropping, + i; + unsigned int bds_numerator, bds_denominator; + int right_padding; + + struct ia_css_shading_table *result; + + assert(target_table != NULL); + assert(binary != NULL); + + if (!in_table) { +#ifndef ISP2401 + sh_css_params_shading_id_table_generate(target_table, binary); +#else + sh_css_params_shading_id_table_generate(target_table, + binary->sctbl_legacy_width_per_color, binary->sctbl_legacy_height); +#endif + return; + } + + padded_width = binary->in_frame_info.padded_width; + /* We use the ISP input resolution for the shading table because + shading correction is performed in the bayer domain (before bayer + down scaling). */ +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + padded_width = CEIL_MUL(binary->effective_in_frame_res.width + 2*ISP_VEC_NELEMS, + 2*ISP_VEC_NELEMS); +#endif + input_height = binary->in_frame_info.res.height; + input_width = binary->in_frame_info.res.width; + left_padding = binary->left_padding; + left_cropping = (binary->info->sp.pipeline.left_cropping == 0) ? + binary->dvs_envelope.width : 2*ISP_VEC_NELEMS; + + sh_css_bds_factor_get_numerator_denominator + (bds_factor, &bds_numerator, &bds_denominator); + + left_padding = (left_padding + binary->info->sp.pipeline.left_cropping) * bds_numerator / bds_denominator - binary->info->sp.pipeline.left_cropping; + right_padding = (binary->internal_frame_info.res.width - binary->effective_in_frame_res.width * bds_denominator / bds_numerator - left_cropping) * bds_numerator / bds_denominator; + top_padding = binary->info->sp.pipeline.top_cropping * bds_numerator / bds_denominator - binary->info->sp.pipeline.top_cropping; + +#if !defined(USE_WINDOWS_BINNING_FACTOR) + /* @deprecated{This part of the code will be replaced by the code + * in the #else section below to make the calculation same across + * all platforms. + * Android and Windows platforms interpret the binning_factor parameter + * differently. In Android, the binning factor is expressed in the form + * 2^N * 2^N, whereas in Windows platform, the binning factor is N*N} + */ + + /* We take into account the binning done by the sensor. We do this + by cropping the non-binned part of the shading table and then + increasing the size of a grid cell with this same binning factor. */ + input_width <<= sensor_binning; + input_height <<= sensor_binning; + /* We also scale the padding by the same binning factor. This will + make it much easier later on to calculate the padding of the + shading table. */ + left_padding <<= sensor_binning; + right_padding <<= sensor_binning; + top_padding <<= sensor_binning; +#else + input_width *= sensor_binning; + input_height *= sensor_binning; + left_padding *= sensor_binning; + right_padding *= sensor_binning; + top_padding *= sensor_binning; +#endif /*USE_WINDOWS_BINNING_FACTOR*/ + + /* during simulation, the used resolution can exceed the sensor + resolution, so we clip it. */ + input_width = min(input_width, in_table->sensor_width); + input_height = min(input_height, in_table->sensor_height); + +#ifndef ISP2401 + table_width = binary->sctbl_width_per_color; + table_height = binary->sctbl_height; +#else + /* This prepare_shading_table() function is called only in legacy API (not in new API). + Then, the legacy shading table width and height should be used. */ + table_width = binary->sctbl_legacy_width_per_color; + table_height = binary->sctbl_legacy_height; +#endif + + result = ia_css_shading_table_alloc(table_width, table_height); + if (result == NULL) { + *target_table = NULL; + return; + } + result->sensor_width = in_table->sensor_width; + result->sensor_height = in_table->sensor_height; + result->fraction_bits = in_table->fraction_bits; + + /* now we crop the original shading table and then interpolate to the + requested resolution and decimation factor. */ + for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { + crop_and_interpolate(input_width, input_height, + left_padding, right_padding, top_padding, + in_table, + result, i); + } + *target_table = result; +} + +struct ia_css_shading_table * +ia_css_shading_table_alloc( + unsigned int width, + unsigned int height) +{ + unsigned int i; + struct ia_css_shading_table *me; + + IA_CSS_ENTER(""); + + me = kmalloc(sizeof(*me), GFP_KERNEL); + if (!me) + return me; + + me->width = width; + me->height = height; + me->sensor_width = 0; + me->sensor_height = 0; + me->fraction_bits = 0; + for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { + me->data[i] = + sh_css_malloc(width * height * sizeof(*me->data[0])); + if (me->data[i] == NULL) { + unsigned int j; + for (j = 0; j < i; j++) { + sh_css_free(me->data[j]); + me->data[j] = NULL; + } + kfree(me); + return NULL; + } + } + + IA_CSS_LEAVE(""); + return me; +} + +void +ia_css_shading_table_free(struct ia_css_shading_table *table) +{ + unsigned int i; + + if (table == NULL) + return; + + /* We only output logging when the table is not NULL, otherwise + * logs will give the impression that a table was freed. + * */ + IA_CSS_ENTER(""); + + for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { + if (table->data[i]) { + sh_css_free(table->data[i]); + table->data[i] = NULL; + } + } + kfree(table); + + IA_CSS_LEAVE(""); +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h new file mode 100644 index 0000000000000..e87863b7c8cce --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h @@ -0,0 +1,39 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SH_CSS_PARAMS_SHADING_H +#define __SH_CSS_PARAMS_SHADING_H + +#include +#include + +void +sh_css_params_shading_id_table_generate( + struct ia_css_shading_table **target_table, +#ifndef ISP2401 + const struct ia_css_binary *binary); +#else + unsigned int table_width, + unsigned int table_height); +#endif + +void +prepare_shading_table(const struct ia_css_shading_table *in_table, + unsigned int sensor_binning, + struct ia_css_shading_table **target_table, + const struct ia_css_binary *binary, + unsigned int bds_factor); + +#endif /* __SH_CSS_PARAMS_SHADING_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c new file mode 100644 index 0000000000000..43529b1605c3a --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c @@ -0,0 +1,5253 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "gdc_device.h" /* gdc_lut_store(), ... */ +#include "isp.h" /* ISP_VEC_ELEMBITS */ +#include "vamem.h" +#if !defined(HAS_NO_HMEM) +#ifndef __INLINE_HMEM__ +#define __INLINE_HMEM__ +#endif +#include "hmem.h" +#endif /* !defined(HAS_NO_HMEM) */ +#define IA_CSS_INCLUDE_PARAMETERS +#define IA_CSS_INCLUDE_ACC_PARAMETERS + +#include "sh_css_params.h" +#include "ia_css_queue.h" +#include "sw_event_global.h" /* Event IDs */ + +#include "platform_support.h" +#include "assert_support.h" +#include "misc_support.h" /* NOT_USED */ +#include "math_support.h" /* max(), min() EVEN_FLOOR()*/ + +#include "ia_css_stream.h" +#include "sh_css_params_internal.h" +#include "sh_css_param_shading.h" +#include "sh_css_param_dvs.h" +#include "ia_css_refcount.h" +#include "sh_css_internal.h" +#include "ia_css_control.h" +#include "ia_css_shading.h" +#include "sh_css_defs.h" +#include "sh_css_sp.h" +#include "ia_css_pipeline.h" +#include "ia_css_debug.h" +#include "memory_access.h" +#if 0 /* FIXME */ +#include "memory_realloc.h" +#endif +#include "ia_css_isp_param.h" +#include "ia_css_isp_params.h" +#include "ia_css_mipi.h" +#include "ia_css_morph.h" +#include "ia_css_host_data.h" +#include "ia_css_pipe.h" +#include "ia_css_pipe_binarydesc.h" +#if 0 +#include "ia_css_system_ctrl.h" +#endif + +/* Include all kernel host interfaces for ISP1 */ + +#include "anr/anr_1.0/ia_css_anr.host.h" +#include "cnr/cnr_1.0/ia_css_cnr.host.h" +#include "csc/csc_1.0/ia_css_csc.host.h" +#include "de/de_1.0/ia_css_de.host.h" +#include "dp/dp_1.0/ia_css_dp.host.h" +#include "bnr/bnr_1.0/ia_css_bnr.host.h" +#include "dvs/dvs_1.0/ia_css_dvs.host.h" +#include "fpn/fpn_1.0/ia_css_fpn.host.h" +#include "gc/gc_1.0/ia_css_gc.host.h" +#include "macc/macc_1.0/ia_css_macc.host.h" +#include "ctc/ctc_1.0/ia_css_ctc.host.h" +#include "ob/ob_1.0/ia_css_ob.host.h" +#include "raw/raw_1.0/ia_css_raw.host.h" +#include "fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" +#include "s3a/s3a_1.0/ia_css_s3a.host.h" +#include "sc/sc_1.0/ia_css_sc.host.h" +#include "sdis/sdis_1.0/ia_css_sdis.host.h" +#include "tnr/tnr_1.0/ia_css_tnr.host.h" +#include "uds/uds_1.0/ia_css_uds_param.h" +#include "wb/wb_1.0/ia_css_wb.host.h" +#include "ynr/ynr_1.0/ia_css_ynr.host.h" +#include "xnr/xnr_1.0/ia_css_xnr.host.h" + +/* Include additional kernel host interfaces for ISP2 */ + +#include "aa/aa_2/ia_css_aa2.host.h" +#include "anr/anr_2/ia_css_anr2.host.h" +#include "bh/bh_2/ia_css_bh.host.h" +#include "cnr/cnr_2/ia_css_cnr2.host.h" +#include "ctc/ctc1_5/ia_css_ctc1_5.host.h" +#include "de/de_2/ia_css_de2.host.h" +#include "gc/gc_2/ia_css_gc2.host.h" +#include "sdis/sdis_2/ia_css_sdis2.host.h" +#include "ynr/ynr_2/ia_css_ynr2.host.h" +#include "fc/fc_1.0/ia_css_formats.host.h" + +#include "xnr/xnr_3.0/ia_css_xnr3.host.h" + +#if defined(HAS_OUTPUT_SYSTEM) +#include +#endif + +#include "sh_css_frac.h" +#include "ia_css_bufq.h" + +#define FPNTBL_BYTES(binary) \ + (sizeof(char) * (binary)->in_frame_info.res.height * \ + (binary)->in_frame_info.padded_width) + +#ifndef ISP2401 + +#define SCTBL_BYTES(binary) \ + (sizeof(unsigned short) * (binary)->sctbl_height * \ + (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) + +#else + +#define SCTBL_BYTES(binary) \ + (sizeof(unsigned short) * max((binary)->sctbl_height, (binary)->sctbl_legacy_height) * \ + /* height should be the larger height between new api and legacy api */ \ + (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) + +#endif + +#define MORPH_PLANE_BYTES(binary) \ + (SH_CSS_MORPH_TABLE_ELEM_BYTES * (binary)->morph_tbl_aligned_width * \ + (binary)->morph_tbl_height) + +/* We keep a second copy of the ptr struct for the SP to access. + Again, this would not be necessary on the chip. */ +static hrt_vaddress sp_ddr_ptrs; + +/* sp group address on DDR */ +static hrt_vaddress xmem_sp_group_ptrs; + +static hrt_vaddress xmem_sp_stage_ptrs[IA_CSS_PIPE_ID_NUM] + [SH_CSS_MAX_STAGES]; +static hrt_vaddress xmem_isp_stage_ptrs[IA_CSS_PIPE_ID_NUM] + [SH_CSS_MAX_STAGES]; + +static hrt_vaddress default_gdc_lut; +static int interleaved_lut_temp[4][HRT_GDC_N]; + +/* END DO NOT MOVE INTO VIMALS_WORLD */ + +/* Digital Zoom lookup table. See documentation for more details about the + * contents of this table. + */ +#if defined(HAS_GDC_VERSION_2) +#if defined(CONFIG_CSI2_PLUS) +/* + * Coefficients from + * Css_Mizuchi/regressions/20140424_0930/all/applications/common/gdc_v2_common/lut.h + */ + +static const int zoom_table[4][HRT_GDC_N] = { + { 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -2, -2, -2, -2, -2, -2, -2, + -3, -3, -3, -3, -3, -3, -3, -4, + -4, -4, -4, -4, -5, -5, -5, -5, + -5, -5, -6, -6, -6, -6, -7, -7, + -7, -7, -7, -8, -8, -8, -8, -9, + -9, -9, -9, -10, -10, -10, -10, -11, + -11, -11, -12, -12, -12, -12, -13, -13, + -13, -14, -14, -14, -15, -15, -15, -15, + -16, -16, -16, -17, -17, -17, -18, -18, + -18, -19, -19, -20, -20, -20, -21, -21, + -21, -22, -22, -22, -23, -23, -24, -24, + -24, -25, -25, -25, -26, -26, -27, -27, + -28, -28, -28, -29, -29, -30, -30, -30, + -31, -31, -32, -32, -33, -33, -33, -34, + -34, -35, -35, -36, -36, -37, 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-19, -18, -18, -17, -18, -17, -16, -17, + -16, -15, -15, -15, -14, -14, -15, -13, + -13, -13, -13, -12, -12, -11, -12, -11, + -12, -10, -10, -10, -10, -10, -9, -10, + -9, -9, -9, -8, -8, -7, -8, -7, + -7, -7, -6, -6, -6, -7, -6, -6, + -5, -5, -5, -5, -5, -4, -4, -5, + -4, -4, -3, -3, -3, -3, -3, -2, + -3, -2, -2, -2, -1, -2, -1, -2, + -1, -1, -1, -1, -1, 0, -1, 0, + -1, -1, 0, 0, -1, 0, 0, -1, + 1, 1, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 + } +}; +#else /* defined(CONFIG_CSI2_PLUS) */ +static const int zoom_table[4][HRT_GDC_N] = { + { 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, + -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, + -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, + -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, + -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, + -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, + -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, + -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, + -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, + -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, -5<<4, + -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, + -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, + -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, + -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, -6<<4, + -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, + -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, + -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, + -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, -7<<4, + -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, + -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, -8<<4, + -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, + -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, + -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, + -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, -9<<4, + -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, + -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, -10<<4, + -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, + -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, + -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, + -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, -11<<4, + -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, + -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, -12<<4, + -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, + -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, + -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, + -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, -13<<4, + -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, + -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, + -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, + -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, -14<<4, + -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, + -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, -18<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, -17<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, -16<<4, + -15<<4, -15<<4, -15<<4, -15<<4, -15<<4, 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-3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, + -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, + -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, -4<<4, + -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, + -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, -3<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, -2<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, -1<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, + 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, 1<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, + 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4 + } +}; +#endif +#else +#error "sh_css_params.c: GDC version must be \ + one of {GDC_VERSION_2}" +#endif + +static const struct ia_css_dz_config default_dz_config = { + HRT_GDC_N, + HRT_GDC_N, + { \ + {0, 0}, \ + {0, 0}, \ + } +}; + +static const struct ia_css_vector default_motion_config = { + 0, + 0 +}; + +/* ------ deprecated(bz675) : from ------ */ +static const struct ia_css_shading_settings default_shading_settings = { + 1 /* enable shading table conversion in the css + (This matches the legacy way.) */ +}; +/* ------ deprecated(bz675) : to ------ */ + +struct ia_css_isp_skc_dvs_statistics { + ia_css_ptr p_data; +}; + +static enum ia_css_err +ref_sh_css_ddr_address_map( + struct sh_css_ddr_address_map *map, + struct sh_css_ddr_address_map *out); + +static enum ia_css_err +write_ia_css_isp_parameter_set_info_to_ddr( + struct ia_css_isp_parameter_set_info *me, + hrt_vaddress *out); + +static enum ia_css_err +free_ia_css_isp_parameter_set_info(hrt_vaddress ptr); + +static enum ia_css_err +sh_css_params_write_to_ddr_internal( + struct ia_css_pipe *pipe, + unsigned pipe_id, + struct ia_css_isp_parameters *params, + const struct ia_css_pipeline_stage *stage, + struct sh_css_ddr_address_map *ddr_map, + struct sh_css_ddr_address_map_size *ddr_map_size); + +static enum ia_css_err +sh_css_create_isp_params(struct ia_css_stream *stream, + struct ia_css_isp_parameters **isp_params_out); + +static bool +sh_css_init_isp_params_from_global(struct ia_css_stream *stream, + struct ia_css_isp_parameters *params, + bool use_default_config, + struct ia_css_pipe *pipe_in); + +static enum ia_css_err +sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, + struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe_in); + +static enum ia_css_err +sh_css_set_global_isp_config_on_pipe( + struct ia_css_pipe *curr_pipe, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe); + +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) +static enum ia_css_err +sh_css_set_per_frame_isp_config_on_pipe( + struct ia_css_stream *stream, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe); +#endif + +static enum ia_css_err +sh_css_update_uds_and_crop_info_based_on_zoom_region( + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + struct ia_css_resolution pipe_in_res, + bool enable_zoom); + +hrt_vaddress +sh_css_params_ddr_address_map(void) +{ + return sp_ddr_ptrs; +} + +/* **************************************************** + * Each coefficient is stored as 7bits to fit 2 of them into one + * ISP vector element, so we will store 4 coefficents on every + * memory word (32bits) + * + * 0: Coefficient 0 used bits + * 1: Coefficient 1 used bits + * 2: Coefficient 2 used bits + * 3: Coefficient 3 used bits + * x: not used + * + * xx33333332222222 | xx11111110000000 + * + * *************************************************** + */ +static struct ia_css_host_data * +convert_allocate_fpntbl(struct ia_css_isp_parameters *params) +{ + unsigned int i, j; + short *data_ptr; + struct ia_css_host_data *me; + unsigned int isp_format_data_size; + uint32_t *isp_format_data_ptr; + + assert(params != NULL); + + data_ptr = params->fpn_config.data; + isp_format_data_size = params->fpn_config.height * params->fpn_config.width * sizeof(uint32_t); + + me = ia_css_host_data_allocate(isp_format_data_size); + + if (!me) + return NULL; + + isp_format_data_ptr = (uint32_t *)me->address; + + for (i = 0; i < params->fpn_config.height; i++) { + for (j = 0; + j < params->fpn_config.width; + j += 4, data_ptr += 4, isp_format_data_ptr++) { + int data = data_ptr[0] << 0 | + data_ptr[1] << 7 | + data_ptr[2] << 16 | + data_ptr[3] << 23; + *isp_format_data_ptr = data; + } + } + return me; +} + +static enum ia_css_err +store_fpntbl(struct ia_css_isp_parameters *params, hrt_vaddress ptr) +{ + struct ia_css_host_data *isp_data; + + assert(params != NULL); + assert(ptr != mmgr_NULL); + + isp_data = convert_allocate_fpntbl(params); + if (!isp_data) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + ia_css_params_store_ia_css_host_data(ptr, isp_data); + + ia_css_host_data_free(isp_data); + return IA_CSS_SUCCESS; +} + +static void +convert_raw_to_fpn(struct ia_css_isp_parameters *params) +{ + int maxval = 0; + unsigned int i; + + assert(params != NULL); + + /* Find the maximum value in the table */ + for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) { + int val = params->fpn_config.data[i]; + /* Make sure FPN value can be represented in 13-bit unsigned + * number (ISP precision - 1), but note that actual input range + * depends on precision of input frame data. + */ + if (val < 0) { +/* Checkpatch patch */ + val = 0; + } else if (val >= (1 << 13)) { +/* Checkpatch patch */ +/* MW: BUG, is "13" a system or application property */ + val = (1 << 13) - 1; + } + maxval = max(maxval, val); + } + /* Find the lowest shift value to remap the values in the range + * 0..maxval to 0..2^shiftval*63. + */ + params->fpn_config.shift = 0; + while (maxval > 63) { +/* MW: BUG, is "63" a system or application property */ + maxval >>= 1; + params->fpn_config.shift++; + } + /* Adjust the values in the table for the shift value */ + for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) + ((unsigned short *) params->fpn_config.data)[i] >>= params->fpn_config.shift; +} + +static void +ia_css_process_kernel(struct ia_css_stream *stream, + struct ia_css_isp_parameters *params, + void (*process)(unsigned pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params)) +{ + int i; + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *pipe = stream->pipes[i]; + struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); + struct ia_css_pipeline_stage *stage; + + /* update the other buffers to the pipe specific copies */ + for (stage = pipeline->stages; stage; stage = stage->next) { + if (!stage || !stage->binary) continue; + process(pipeline->pipe_id, stage, params); + } + } +} + +static enum ia_css_err +sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) { + + enum ia_css_err err = IA_CSS_SUCCESS; + /* Currently we check if 10bpp DPC configuration is required based + * on the use case,i.e. if BDS and DPC is both enabled. The more cleaner + * design choice would be to expose the type of DPC (either 10bpp or 13bpp) + * using the binary info, but the current control flow does not allow this + * implementation. (This is because the configuration is set before a + * binary is selected, and the binary info is not available) + */ + if((pipe == NULL) || (is_dp_10bpp == NULL)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + err = IA_CSS_ERR_INTERNAL_ERROR; + } else { + *is_dp_10bpp = false; + + /* check if DPC is enabled from the host */ + if (pipe->config.enable_dpc) { + /*check if BDS is enabled*/ + unsigned int required_bds_factor = SH_CSS_BDS_FACTOR_1_00; + if ((pipe->config.bayer_ds_out_res.width != 0) && + (pipe->config.bayer_ds_out_res.height != 0)) { + if (IA_CSS_SUCCESS == binarydesc_calculate_bds_factor( + pipe->config.input_effective_res, + pipe->config.bayer_ds_out_res, + &required_bds_factor)) { + if (SH_CSS_BDS_FACTOR_1_00 != required_bds_factor) { + /*we use 10bpp BDS configuration*/ + *is_dp_10bpp = true; + } + } + } + } + } + + return err; +} + +enum ia_css_err +sh_css_set_black_frame(struct ia_css_stream *stream, + const struct ia_css_frame *raw_black_frame) +{ + struct ia_css_isp_parameters *params; + /* this function desperately needs to be moved to the ISP or SP such + * that it can use the DMA. + */ + unsigned int height, width, y, x, k, data; + hrt_vaddress ptr; + + assert(stream != NULL); + assert(raw_black_frame != NULL); + + params = stream->isp_params_configs; + height = raw_black_frame->info.res.height; + width = raw_black_frame->info.padded_width, + + ptr = raw_black_frame->data + + raw_black_frame->planes.raw.offset; + + IA_CSS_ENTER_PRIVATE("black_frame=%p", raw_black_frame); + + if (params->fpn_config.data && + (params->fpn_config.width != width || params->fpn_config.height != height)) { + sh_css_free(params->fpn_config.data); + params->fpn_config.data = NULL; + } + if (params->fpn_config.data == NULL) { + params->fpn_config.data = sh_css_malloc(height * width * sizeof(short)); + if (!params->fpn_config.data) { + IA_CSS_ERROR("out of memory"); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + params->fpn_config.width = width; + params->fpn_config.height = height; + params->fpn_config.shift = 0; + } + + /* store raw to fpntbl */ + for (y = 0; y < height; y++) { + for (x = 0; x < width; x += (ISP_VEC_NELEMS * 2)) { + int ofs = y * width + x; + for (k = 0; k < ISP_VEC_NELEMS; k += 2) { + mmgr_load(ptr, (void *)(&data), sizeof(int)); + params->fpn_config.data[ofs + 2 * k] = + (short) (data & 0xFFFF); + params->fpn_config.data[ofs + 2 * k + 2] = + (short) ((data >> 16) & 0xFFFF); + ptr += sizeof(int); /* byte system address */ + } + for (k = 0; k < ISP_VEC_NELEMS; k += 2) { + mmgr_load(ptr, (void *)(&data), sizeof(int)); + params->fpn_config.data[ofs + 2 * k + 1] = + (short) (data & 0xFFFF); + params->fpn_config.data[ofs + 2 * k + 3] = + (short) ((data >> 16) & 0xFFFF); + ptr += sizeof(int); /* byte system address */ + } + } + } + + /* raw -> fpn */ + convert_raw_to_fpn(params); + + /* overwrite isp parameter */ + ia_css_process_kernel(stream, params, ia_css_kernel_process_param[IA_CSS_FPN_ID]); + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + + return IA_CSS_SUCCESS; +} + +bool +sh_css_params_set_binning_factor(struct ia_css_stream *stream, unsigned int binning_fact) +{ + struct ia_css_isp_parameters *params; + + IA_CSS_ENTER_PRIVATE("void"); + assert(stream != NULL); + + params = stream->isp_params_configs; + + if (params->sensor_binning != binning_fact) { + params->sensor_binning = binning_fact; + params->sc_table_changed = true; + } + + IA_CSS_LEAVE_PRIVATE("void"); + + return params->sc_table_changed; +} + +static void +sh_css_update_shading_table_status(struct ia_css_pipe *pipe, + struct ia_css_isp_parameters *params) +{ + if (params && pipe && (pipe->pipe_num != params->sc_table_last_pipe_num)) { + params->sc_table_dirty = true; + params->sc_table_last_pipe_num = pipe->pipe_num; + } +} + +static void +sh_css_set_shading_table(struct ia_css_stream *stream, + struct ia_css_isp_parameters *params, + const struct ia_css_shading_table *table) +{ + IA_CSS_ENTER_PRIVATE(""); + if (table == NULL) + return; + assert(stream != NULL); + + if (!table->enable) + table = NULL; + + if ((table != params->sc_table) || params->sc_table_dirty) { + params->sc_table = table; + params->sc_table_changed = true; + params->sc_table_dirty = false; + /* Not very clean, this goes to sh_css.c to invalidate the + * shading table for all pipes. Should replaced by a loop + * and a pipe-specific call. + */ + if (!params->output_frame) + sh_css_invalidate_shading_tables(stream); + } + + IA_CSS_LEAVE_PRIVATE("void"); +} + +void +ia_css_params_store_ia_css_host_data( + hrt_vaddress ddr_addr, + struct ia_css_host_data *data) +{ + assert(data != NULL); + assert(data->address != NULL); + assert(ddr_addr != mmgr_NULL); + + IA_CSS_ENTER_PRIVATE(""); + + mmgr_store(ddr_addr, + (void *)(data->address), + (size_t)data->size); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +struct ia_css_host_data * +ia_css_params_alloc_convert_sctbl( + const struct ia_css_pipeline_stage *stage, + const struct ia_css_shading_table *shading_table) +{ + const struct ia_css_binary *binary = stage->binary; + struct ia_css_host_data *sctbl; + unsigned int i, j, aligned_width, row_padding; + unsigned int sctbl_size; + short int *ptr; + + assert(binary != NULL); + assert(shading_table != NULL); + + IA_CSS_ENTER_PRIVATE(""); + + if (shading_table == NULL) { + IA_CSS_LEAVE_PRIVATE("void"); + return NULL; + } + + aligned_width = binary->sctbl_aligned_width_per_color; + row_padding = aligned_width - shading_table->width; + sctbl_size = shading_table->height * IA_CSS_SC_NUM_COLORS * aligned_width * sizeof(short); + + sctbl = ia_css_host_data_allocate((size_t)sctbl_size); + + if (!sctbl) + return NULL; + ptr = (short int*)sctbl->address; + memset(ptr, + 0, + sctbl_size); + + for (i = 0; i < shading_table->height; i++) { + for (j = 0; j < IA_CSS_SC_NUM_COLORS; j++) { + memcpy(ptr, + &shading_table->data[j] + [i*shading_table->width], + shading_table->width * sizeof(short)); + ptr += aligned_width; + } + } + + IA_CSS_LEAVE_PRIVATE("void"); + return sctbl; +} + +enum ia_css_err ia_css_params_store_sctbl( + const struct ia_css_pipeline_stage *stage, + hrt_vaddress sc_tbl, + const struct ia_css_shading_table *sc_config) +{ + struct ia_css_host_data *isp_sc_tbl; + + IA_CSS_ENTER_PRIVATE(""); + + if (sc_config == NULL) { + IA_CSS_LEAVE_PRIVATE("void"); + return IA_CSS_SUCCESS; + } + + isp_sc_tbl = ia_css_params_alloc_convert_sctbl(stage, sc_config); + if (!isp_sc_tbl) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + /* store the shading table to ddr */ + ia_css_params_store_ia_css_host_data(sc_tbl, isp_sc_tbl); + ia_css_host_data_free(isp_sc_tbl); + + IA_CSS_LEAVE_PRIVATE("void"); + + return IA_CSS_SUCCESS; +} + +static void +sh_css_enable_pipeline(const struct ia_css_binary *binary) +{ + if (!binary) + return; + + IA_CSS_ENTER_PRIVATE(""); + + ia_css_isp_param_enable_pipeline(&binary->mem_params); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static enum ia_css_err +ia_css_process_zoom_and_motion( + struct ia_css_isp_parameters *params, + const struct ia_css_pipeline_stage *first_stage) +{ + /* first_stage can be NULL */ + const struct ia_css_pipeline_stage *stage; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_resolution pipe_in_res; + pipe_in_res.width = 0; + pipe_in_res.height = 0; + + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE(""); + + /* Go through all stages to udate uds and cropping */ + for (stage = first_stage; stage; stage = stage->next) { + + struct ia_css_binary *binary; + /* note: the var below is made static as it is quite large; + if it is not static it ends up on the stack which could + cause issues for drivers + */ + static struct ia_css_binary tmp_binary; + + const struct ia_css_binary_xinfo *info = NULL; + + binary = stage->binary; + if (binary) { + info = binary->info; + } else { + const struct sh_css_binary_args *args = &stage->args; + const struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; + if (args->out_frame[0]) + out_infos[0] = &args->out_frame[0]->info; + info = &stage->firmware->info.isp; + ia_css_binary_fill_info(info, false, false, + ATOMISP_INPUT_FORMAT_RAW_10, + args->in_frame ? &args->in_frame->info : NULL, + NULL, + out_infos, + args->out_vf_frame ? &args->out_vf_frame->info + : NULL, + &tmp_binary, + NULL, + -1, true); + binary = &tmp_binary; + binary->info = info; + } + + if (stage == first_stage) { + /* we will use pipe_in_res to scale the zoom crop region if needed */ + pipe_in_res = binary->effective_in_frame_res; + } + + assert(stage->stage_num < SH_CSS_MAX_STAGES); + if (params->dz_config.zoom_region.resolution.width == 0 && + params->dz_config.zoom_region.resolution.height == 0) { + sh_css_update_uds_and_crop_info( + &info->sp, + &binary->in_frame_info, + &binary->out_frame_info[0], + &binary->dvs_envelope, + ¶ms->dz_config, + ¶ms->motion_config, + ¶ms->uds[stage->stage_num].uds, + ¶ms->uds[stage->stage_num].crop_pos, + stage->enable_zoom); + } else { + err = sh_css_update_uds_and_crop_info_based_on_zoom_region( + &info->sp, + &binary->in_frame_info, + &binary->out_frame_info[0], + &binary->dvs_envelope, + ¶ms->dz_config, + ¶ms->motion_config, + ¶ms->uds[stage->stage_num].uds, + ¶ms->uds[stage->stage_num].crop_pos, + pipe_in_res, + stage->enable_zoom); + if (err != IA_CSS_SUCCESS) + return err; + } + } + params->isp_params_changed = true; + + IA_CSS_LEAVE_PRIVATE("void"); + return err; +} + +static void +sh_css_set_gamma_table(struct ia_css_isp_parameters *params, + const struct ia_css_gamma_table *table) +{ + if (table == NULL) + return; + IA_CSS_ENTER_PRIVATE("table=%p", table); + + assert(params != NULL); + params->gc_table = *table; + params->config_changed[IA_CSS_GC_ID] = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_gamma_table(const struct ia_css_isp_parameters *params, + struct ia_css_gamma_table *table) +{ + if (table == NULL) + return; + IA_CSS_ENTER_PRIVATE("table=%p", table); + + assert(params != NULL); + *table = params->gc_table; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_set_ctc_table(struct ia_css_isp_parameters *params, + const struct ia_css_ctc_table *table) +{ + if (table == NULL) + return; + + IA_CSS_ENTER_PRIVATE("table=%p", table); + + assert(params != NULL); + params->ctc_table = *table; + params->config_changed[IA_CSS_CTC_ID] = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_ctc_table(const struct ia_css_isp_parameters *params, + struct ia_css_ctc_table *table) +{ + if (table == NULL) + return; + + IA_CSS_ENTER_PRIVATE("table=%p", table); + + assert(params != NULL); + *table = params->ctc_table; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_set_macc_table(struct ia_css_isp_parameters *params, + const struct ia_css_macc_table *table) +{ + if (table == NULL) + return; + + IA_CSS_ENTER_PRIVATE("table=%p", table); + + assert(params != NULL); + params->macc_table = *table; + params->config_changed[IA_CSS_MACC_ID] = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_macc_table(const struct ia_css_isp_parameters *params, + struct ia_css_macc_table *table) +{ + if (table == NULL) + return; + + IA_CSS_ENTER_PRIVATE("table=%p", table); + + assert(params != NULL); + *table = params->macc_table; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +void ia_css_morph_table_free( + struct ia_css_morph_table *me) +{ + + unsigned int i; + + if (me == NULL) + return; + + IA_CSS_ENTER(""); + + + + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + if (me->coordinates_x[i]) { + sh_css_free(me->coordinates_x[i]); + me->coordinates_x[i] = NULL; + } + if (me->coordinates_y[i]) { + sh_css_free(me->coordinates_y[i]); + me->coordinates_y[i] = NULL; + } + } + + sh_css_free(me); + IA_CSS_LEAVE("void"); + +} + + +struct ia_css_morph_table *ia_css_morph_table_allocate( + unsigned int width, + unsigned int height) +{ + + unsigned int i; + struct ia_css_morph_table *me; + + IA_CSS_ENTER(""); + + me = sh_css_malloc(sizeof(*me)); + if (me == NULL) { + IA_CSS_ERROR("out of memory"); + return me; + } + + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + me->coordinates_x[i] = NULL; + me->coordinates_y[i] = NULL; + } + + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + me->coordinates_x[i] = + sh_css_malloc(height * width * + sizeof(*me->coordinates_x[i])); + me->coordinates_y[i] = + sh_css_malloc(height * width * + sizeof(*me->coordinates_y[i])); + + if ((me->coordinates_x[i] == NULL) || + (me->coordinates_y[i] == NULL)) { + ia_css_morph_table_free(me); + me = NULL; + return me; + } + } + me->width = width; + me->height = height; + IA_CSS_LEAVE(""); + return me; + +} + + +static enum ia_css_err sh_css_params_default_morph_table( + struct ia_css_morph_table **table, + const struct ia_css_binary *binary) +{ + /* MW 2400 advanced requires different scaling */ + unsigned int i, j, k, step, width, height; + short start_x[IA_CSS_MORPH_TABLE_NUM_PLANES] = { -8, 0, -8, 0, 0, -8 }, + start_y[IA_CSS_MORPH_TABLE_NUM_PLANES] = { 0, 0, -8, -8, -8, 0 }; + struct ia_css_morph_table *tab; + + assert(table != NULL); + assert(binary != NULL); + + IA_CSS_ENTER_PRIVATE(""); + + step = (ISP_VEC_NELEMS / 16) * 128, + width = binary->morph_tbl_width, + height = binary->morph_tbl_height; + + tab = ia_css_morph_table_allocate(width, height); + if (tab == NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + short val_y = start_y[i]; + for (j = 0; j < height; j++) { + short val_x = start_x[i]; + unsigned short *x_ptr, *y_ptr; + + x_ptr = &tab->coordinates_x[i][j * width]; + y_ptr = &tab->coordinates_y[i][j * width]; + for (k = 0; k < width; + k++, x_ptr++, y_ptr++, val_x += (short)step) { + if (k == 0) + *x_ptr = 0; + else if (k == width - 1) + *x_ptr = val_x + 2 * start_x[i]; + else + *x_ptr = val_x; + if (j == 0) + *y_ptr = 0; + else + *y_ptr = val_y; + } + val_y += (short)step; + } + } + *table = tab; + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + + return IA_CSS_SUCCESS; +} + +static void +sh_css_set_morph_table(struct ia_css_isp_parameters *params, + const struct ia_css_morph_table *table) +{ + if (table == NULL) + return; + + IA_CSS_ENTER_PRIVATE("table=%p", table); + + assert(params != NULL); + if (table->enable == false) + table = NULL; + params->morph_table = table; + params->morph_table_changed = true; + IA_CSS_LEAVE_PRIVATE("void"); +} + +void +ia_css_translate_3a_statistics( + struct ia_css_3a_statistics *host_stats, + const struct ia_css_isp_3a_statistics_map *isp_stats) +{ + IA_CSS_ENTER(""); + if (host_stats->grid.use_dmem) { + IA_CSS_LOG("3A: DMEM"); + ia_css_s3a_dmem_decode(host_stats, isp_stats->dmem_stats); + } else { + IA_CSS_LOG("3A: VMEM"); + ia_css_s3a_vmem_decode(host_stats, isp_stats->vmem_stats_hi, + isp_stats->vmem_stats_lo); + } +#if !defined(HAS_NO_HMEM) + IA_CSS_LOG("3A: HMEM"); + ia_css_s3a_hmem_decode(host_stats, isp_stats->hmem_stats); +#endif + + IA_CSS_LEAVE("void"); +} + +void +ia_css_isp_3a_statistics_map_free(struct ia_css_isp_3a_statistics_map *me) +{ + if (me) { + if (me->data_allocated) { + sh_css_free(me->data_ptr); + me->data_ptr = NULL; + me->data_allocated = false; + } + sh_css_free(me); + } +} + +struct ia_css_isp_3a_statistics_map * +ia_css_isp_3a_statistics_map_allocate( + const struct ia_css_isp_3a_statistics *isp_stats, + void *data_ptr) +{ + struct ia_css_isp_3a_statistics_map *me; + /* Windows compiler does not like adding sizes to a void * + * so we use a local char * instead. */ + char *base_ptr; + + me = sh_css_malloc(sizeof(*me)); + if (!me) { + IA_CSS_LEAVE("cannot allocate memory"); + goto err; + } + + me->data_ptr = data_ptr; + me->data_allocated = data_ptr == NULL; + if (!data_ptr) { + me->data_ptr = sh_css_malloc(isp_stats->size); + if (!me->data_ptr) { + IA_CSS_LEAVE("cannot allocate memory"); + goto err; + } + } + base_ptr = me->data_ptr; + + me->size = isp_stats->size; + /* GCC complains when we assign a char * to a void *, so these + * casts are necessary unfortunately. */ + me->dmem_stats = (void *)base_ptr; + me->vmem_stats_hi = (void *)(base_ptr + isp_stats->dmem_size); + me->vmem_stats_lo = (void *)(base_ptr + isp_stats->dmem_size + + isp_stats->vmem_size); + me->hmem_stats = (void *)(base_ptr + isp_stats->dmem_size + + 2 * isp_stats->vmem_size); + + IA_CSS_LEAVE("map=%p", me); + return me; + +err: + if (me) + sh_css_free(me); + return NULL; + +} + +enum ia_css_err +ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, + const struct ia_css_isp_3a_statistics *isp_stats) +{ + struct ia_css_isp_3a_statistics_map *map; + enum ia_css_err ret = IA_CSS_SUCCESS; + + IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); + + assert(host_stats != NULL); + assert(isp_stats != NULL); + + map = ia_css_isp_3a_statistics_map_allocate(isp_stats, NULL); + if (map) { + mmgr_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); + ia_css_translate_3a_statistics(host_stats, map); + ia_css_isp_3a_statistics_map_free(map); + } else { + IA_CSS_ERROR("out of memory"); + ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + + IA_CSS_LEAVE_ERR(ret); + return ret; +} + +/* Parameter encoding is not yet orthogonal. + This function hnadles some of the exceptions. +*/ +static void +ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, + struct ia_css_isp_parameters *params) +{ + assert(params != NULL); + + /* Copy also to DP. Should be done by the driver. */ + params->dp_config.gr = params->wb_config.gr; + params->dp_config.r = params->wb_config.r; + params->dp_config.b = params->wb_config.b; + params->dp_config.gb = params->wb_config.gb; +#ifdef ISP2401 + assert(pipe != NULL); + assert(pipe->mode < IA_CSS_PIPE_ID_NUM); + + if (pipe->mode < IA_CSS_PIPE_ID_NUM) { + params->pipe_dp_config[pipe->mode].gr = params->wb_config.gr; + params->pipe_dp_config[pipe->mode].r = params->wb_config.r; + params->pipe_dp_config[pipe->mode].b = params->wb_config.b; + params->pipe_dp_config[pipe->mode].gb = params->wb_config.gb; + } +#endif +} + +#ifdef ISP2401 +static void +sh_css_set_dp_config(const struct ia_css_pipe *pipe, + struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + assert(pipe != NULL); + assert(pipe->mode < IA_CSS_PIPE_ID_NUM); + + IA_CSS_ENTER_PRIVATE("config=%p", config); + ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); + if (pipe->mode < IA_CSS_PIPE_ID_NUM) { + params->pipe_dp_config[pipe->mode] = *config; + params->pipe_dpc_config_changed[pipe->mode] = true; + } + IA_CSS_LEAVE_PRIVATE("void"); +} +#endif + +static void +sh_css_get_dp_config(const struct ia_css_pipe *pipe, + const struct ia_css_isp_parameters *params, + struct ia_css_dp_config *config) +{ + if (config == NULL) + return; + + assert(params != NULL); + assert(pipe != NULL); + IA_CSS_ENTER_PRIVATE("config=%p", config); + + *config = params->pipe_dp_config[pipe->mode]; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_set_nr_config(struct ia_css_isp_parameters *params, + const struct ia_css_nr_config *config) +{ + if (config == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("config=%p", config); + + ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); + params->nr_config = *config; + params->yee_config.nr = *config; + params->config_changed[IA_CSS_NR_ID] = true; + params->config_changed[IA_CSS_YEE_ID] = true; + params->config_changed[IA_CSS_BNR_ID] = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_set_ee_config(struct ia_css_isp_parameters *params, + const struct ia_css_ee_config *config) +{ + if (config == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("config=%p", config); + ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); + + params->ee_config = *config; + params->yee_config.ee = *config; + params->config_changed[IA_CSS_YEE_ID] = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_ee_config(const struct ia_css_isp_parameters *params, + struct ia_css_ee_config *config) +{ + if (config == NULL) + return; + + IA_CSS_ENTER_PRIVATE("config=%p", config); + + assert(params != NULL); + *config = params->ee_config; + + ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, + struct ia_css_isp_parameters *params, + const struct ia_css_dvs_6axis_config *dvs_config) +{ + if (dvs_config == NULL) + return; + assert(params != NULL); + assert(pipe != NULL); + assert(dvs_config->height_y == dvs_config->height_uv); + assert((dvs_config->width_y - 1) == 2 * (dvs_config->width_uv - 1)); + assert(pipe->mode < IA_CSS_PIPE_ID_NUM); + + IA_CSS_ENTER_PRIVATE("dvs_config=%p", dvs_config); + + copy_dvs_6axis_table(params->pipe_dvs_6axis_config[pipe->mode], dvs_config); + +#if !defined(HAS_NO_DVS_6AXIS_CONFIG_UPDATE) + params->pipe_dvs_6axis_config_changed[pipe->mode] = true; +#endif + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, + const struct ia_css_isp_parameters *params, + struct ia_css_dvs_6axis_config *dvs_config) +{ + if (dvs_config == NULL) + return; + assert(params != NULL); + assert(pipe != NULL); + assert(dvs_config->height_y == dvs_config->height_uv); + assert((dvs_config->width_y - 1) == 2 * dvs_config->width_uv - 1); + + IA_CSS_ENTER_PRIVATE("dvs_config=%p", dvs_config); + + if ((pipe->mode < IA_CSS_PIPE_ID_NUM) && + (dvs_config->width_y == params->pipe_dvs_6axis_config[pipe->mode]->width_y) && + (dvs_config->height_y == params->pipe_dvs_6axis_config[pipe->mode]->height_y) && + (dvs_config->width_uv == params->pipe_dvs_6axis_config[pipe->mode]->width_uv) && + (dvs_config->height_uv == params->pipe_dvs_6axis_config[pipe->mode]->height_uv) && + dvs_config->xcoords_y && + dvs_config->ycoords_y && + dvs_config->xcoords_uv && + dvs_config->ycoords_uv) + { + copy_dvs_6axis_table(dvs_config, params->pipe_dvs_6axis_config[pipe->mode]); + } + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_set_baa_config(struct ia_css_isp_parameters *params, + const struct ia_css_aa_config *config) +{ + if (config == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("config=%p", config); + + params->bds_config = *config; + params->config_changed[IA_CSS_BDS_ID] = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_baa_config(const struct ia_css_isp_parameters *params, + struct ia_css_aa_config *config) +{ + if (config == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("config=%p", config); + + *config = params->bds_config; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_set_dz_config(struct ia_css_isp_parameters *params, + const struct ia_css_dz_config *config) +{ + if (config == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("dx=%d, dy=%d", config->dx, config->dy); + + assert(config->dx <= HRT_GDC_N); + assert(config->dy <= HRT_GDC_N); + + params->dz_config = *config; + params->dz_config_changed = true; + /* JK: Why isp params changed?? */ + params->isp_params_changed = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_dz_config(const struct ia_css_isp_parameters *params, + struct ia_css_dz_config *config) +{ + if (config == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("config=%p", config); + + *config = params->dz_config; + + IA_CSS_LEAVE_PRIVATE("dx=%d, dy=%d", config->dx, config->dy); +} + +static void +sh_css_set_motion_vector(struct ia_css_isp_parameters *params, + const struct ia_css_vector *motion) +{ + if (motion == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("x=%d, y=%d", motion->x, motion->y); + + params->motion_config = *motion; + /* JK: Why do isp params change? */ + params->motion_config_changed = true; + params->isp_params_changed = true; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +sh_css_get_motion_vector(const struct ia_css_isp_parameters *params, + struct ia_css_vector *motion) +{ + if (motion == NULL) + return; + assert(params != NULL); + + IA_CSS_ENTER_PRIVATE("motion=%p", motion); + + *motion = params->motion_config; + + IA_CSS_LEAVE_PRIVATE("x=%d, y=%d", motion->x, motion->y); +} + +struct ia_css_isp_config * +sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe) +{ + if (pipe == NULL) + { + IA_CSS_ERROR("pipe=%p", NULL); + return NULL; + } + return pipe->config.p_isp_config; +} + +enum ia_css_err +ia_css_stream_set_isp_config( + struct ia_css_stream *stream, + const struct ia_css_isp_config *config) +{ + return ia_css_stream_set_isp_config_on_pipe(stream, config, NULL); +} + +enum ia_css_err +ia_css_stream_set_isp_config_on_pipe( + struct ia_css_stream *stream, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + if ((stream == NULL) || (config == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + IA_CSS_ENTER("stream=%p, config=%p, pipe=%p", stream, config, pipe); + +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + if (config->output_frame) + err = sh_css_set_per_frame_isp_config_on_pipe(stream, config, pipe); + else +#endif + err = sh_css_set_global_isp_config_on_pipe(stream->pipes[0], config, pipe); + + IA_CSS_LEAVE_ERR(err); + return err; +} + +enum ia_css_err +ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, + struct ia_css_isp_config *config) +{ + struct ia_css_pipe *pipe_in = pipe; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER("pipe=%p", pipe); + + if ((pipe == NULL) || (pipe->stream == NULL)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "config=%p\n", config); + +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + if (config->output_frame) + err = sh_css_set_per_frame_isp_config_on_pipe(pipe->stream, config, pipe); + else +#endif + err = sh_css_set_global_isp_config_on_pipe(pipe, config, pipe_in); + IA_CSS_LEAVE_ERR(err); + return err; +} + +static enum ia_css_err +sh_css_set_global_isp_config_on_pipe( + struct ia_css_pipe *curr_pipe, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err err1 = IA_CSS_SUCCESS; + enum ia_css_err err2 = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", curr_pipe, config, pipe); + + err1 = sh_css_init_isp_params_from_config(curr_pipe, curr_pipe->stream->isp_params_configs, config, pipe); + + /* Now commit all changes to the SP */ + err2 = sh_css_param_update_isp_params(curr_pipe, curr_pipe->stream->isp_params_configs, sh_css_sp_is_running(), pipe); + + /* The following code is intentional. The sh_css_init_isp_params_from_config interface + * throws an error when both DPC and BDS is enabled. The CSS API must pass this error + * information to the caller, ie. the host. We do not return this error immediately, + * but instead continue with updating the ISP params to enable testing of features + * which are currently in TR phase. */ + + err = (err1 != IA_CSS_SUCCESS ) ? err1 : ((err2 != IA_CSS_SUCCESS) ? err2 : err); + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) +static enum ia_css_err +sh_css_set_per_frame_isp_config_on_pipe( + struct ia_css_stream *stream, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe) +{ + unsigned i; + bool per_frame_config_created = false; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err err1 = IA_CSS_SUCCESS; + enum ia_css_err err2 = IA_CSS_SUCCESS; + enum ia_css_err err3 = IA_CSS_SUCCESS; + + struct sh_css_ddr_address_map *ddr_ptrs; + struct sh_css_ddr_address_map_size *ddr_ptrs_size; + struct ia_css_isp_parameters *params; + + IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", stream, config, pipe); + + if (!pipe) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto exit; + } + + /* create per-frame ISP params object with default values + * from stream->isp_params_configs if one doesn't already exist + */ + if (!stream->per_frame_isp_params_configs) + { + err = sh_css_create_isp_params(stream, + &stream->per_frame_isp_params_configs); + if(err != IA_CSS_SUCCESS) + goto exit; + per_frame_config_created = true; + } + + params = stream->per_frame_isp_params_configs; + + /* update new ISP params object with the new config */ + if (!sh_css_init_isp_params_from_global(stream, params, false, pipe)) { + err1 = IA_CSS_ERR_INVALID_ARGUMENTS; + } + + err2 = sh_css_init_isp_params_from_config(stream->pipes[0], params, config, pipe); + + if (per_frame_config_created) + { + ddr_ptrs = ¶ms->ddr_ptrs; + ddr_ptrs_size = ¶ms->ddr_ptrs_size; + /* create per pipe reference to general ddr_ptrs */ + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + ref_sh_css_ddr_address_map(ddr_ptrs, ¶ms->pipe_ddr_ptrs[i]); + params->pipe_ddr_ptrs_size[i] = *ddr_ptrs_size; + } + } + + /* now commit to ddr */ + err3 = sh_css_param_update_isp_params(stream->pipes[0], params, sh_css_sp_is_running(), pipe); + + /* The following code is intentional. The sh_css_init_sp_params_from_config and + * sh_css_init_isp_params_from_config throws an error when both DPC and BDS is enabled. + * The CSS API must pass this error information to the caller, ie. the host. + * We do not return this error immediately, but instead continue with updating the ISP params + * to enable testing of features which are currently in TR phase. */ + err = (err1 != IA_CSS_SUCCESS) ? err1 : + (err2 != IA_CSS_SUCCESS) ? err2 : + (err3 != IA_CSS_SUCCESS) ? err3 : err; +exit: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} +#endif + +static enum ia_css_err +sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, + struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe_in) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + bool is_dp_10bpp = true; + assert(pipe != NULL); + + IA_CSS_ENTER_PRIVATE("pipe=%p, config=%p, params=%p", pipe, config, params); + + ia_css_set_configs(params, config); + + + sh_css_set_nr_config(params, config->nr_config); + sh_css_set_ee_config(params, config->ee_config); + sh_css_set_baa_config(params, config->baa_config); + if ((pipe->mode < IA_CSS_PIPE_ID_NUM) && + (params->pipe_dvs_6axis_config[pipe->mode])) + sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); + sh_css_set_dz_config(params, config->dz_config); + sh_css_set_motion_vector(params, config->motion_vector); + sh_css_update_shading_table_status(pipe_in, params); + sh_css_set_shading_table(pipe->stream, params, config->shading_table); + sh_css_set_morph_table(params, config->morph_table); + sh_css_set_macc_table(params, config->macc_table); + sh_css_set_gamma_table(params, config->gamma_table); + sh_css_set_ctc_table(params, config->ctc_table); +/* ------ deprecated(bz675) : from ------ */ + sh_css_set_shading_settings(params, config->shading_settings); +/* ------ deprecated(bz675) : to ------ */ + + params->dis_coef_table_changed = (config->dvs_coefs != NULL); + params->dvs2_coef_table_changed = (config->dvs2_coefs != NULL); + + params->output_frame = config->output_frame; + params->isp_parameters_id = config->isp_config_id; +#ifdef ISP2401 + /* Currently we do not offer CSS interface to set different + * configurations for DPC, i.e. depending on DPC being enabled + * before (NORM+OBC) or after. The folllowing code to set the + * DPC configuration should be updated when this interface is made + * available */ + sh_css_set_dp_config(pipe, params, config->dp_config); + ia_css_set_param_exceptions(pipe, params); +#endif + + if (IA_CSS_SUCCESS == + sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) { + /* return an error when both DPC and BDS is enabled by the + * user. */ + /* we do not exit from this point immediately to allow internal + * firmware feature testing. */ + if(is_dp_10bpp) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + } else { + err = IA_CSS_ERR_INTERNAL_ERROR; + goto exit; + } + +#ifndef ISP2401 + ia_css_set_param_exceptions(pipe, params); +#endif +exit: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +void +ia_css_stream_get_isp_config( + const struct ia_css_stream *stream, + struct ia_css_isp_config *config) +{ + IA_CSS_ENTER("void"); + ia_css_pipe_get_isp_config(stream->pipes[0], config); + IA_CSS_LEAVE("void"); +} + +void +ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, + struct ia_css_isp_config *config) +{ + struct ia_css_isp_parameters *params = NULL; + + assert(config != NULL); + + IA_CSS_ENTER("config=%p", config); + + params = pipe->stream->isp_params_configs; + assert(params != NULL); + + ia_css_get_configs(params, config); + + sh_css_get_ee_config(params, config->ee_config); + sh_css_get_baa_config(params, config->baa_config); + sh_css_get_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); + sh_css_get_dp_config(pipe, params, config->dp_config); + sh_css_get_macc_table(params, config->macc_table); + sh_css_get_gamma_table(params, config->gamma_table); + sh_css_get_ctc_table(params, config->ctc_table); + sh_css_get_dz_config(params, config->dz_config); + sh_css_get_motion_vector(params, config->motion_vector); +/* ------ deprecated(bz675) : from ------ */ + sh_css_get_shading_settings(params, config->shading_settings); +/* ------ deprecated(bz675) : to ------ */ + + config->output_frame = params->output_frame; + config->isp_config_id = params->isp_parameters_id; + + IA_CSS_LEAVE("void"); +} + +#ifndef ISP2401 +/* + * coding style says the return of "mmgr_NULL" is the error signal + * + * Deprecated: Implement mmgr_realloc() + */ +static bool realloc_isp_css_mm_buf( + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err, + uint16_t mmgr_attribute) +{ + int32_t id; + + *err = IA_CSS_SUCCESS; + /* Possible optimization: add a function sh_css_isp_css_mm_realloc() + * and implement on top of hmm. */ + + IA_CSS_ENTER_PRIVATE("void"); + + if (!force && *curr_size >= needed_size) { + IA_CSS_LEAVE_PRIVATE("false"); + return false; + } + /* don't reallocate if single ref to buffer and same size */ + if (*curr_size == needed_size && ia_css_refcount_is_single(*curr_buf)) { + IA_CSS_LEAVE_PRIVATE("false"); + return false; + } + + id = IA_CSS_REFCOUNT_PARAM_BUFFER; + ia_css_refcount_decrement(id, *curr_buf); + *curr_buf = ia_css_refcount_increment(id, mmgr_alloc_attr(needed_size, + mmgr_attribute)); + + if (!*curr_buf) { + *err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + *curr_size = 0; + } else { + *curr_size = needed_size; + } + IA_CSS_LEAVE_PRIVATE("true"); + return true; +} + +static bool reallocate_buffer( + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err) +{ + bool ret; + uint16_t mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; + + IA_CSS_ENTER_PRIVATE("void"); + + ret = realloc_isp_css_mm_buf(curr_buf, + curr_size, needed_size, force, err, mmgr_attribute); + + IA_CSS_LEAVE_PRIVATE("ret=%d", ret); + return ret; +} + +#endif + +struct ia_css_isp_3a_statistics * +ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) +{ + struct ia_css_isp_3a_statistics *me; + + IA_CSS_ENTER("grid=%p", grid); + + assert(grid != NULL); + + /* MW: Does "grid->enable" also control the histogram output ?? */ + if (!grid->enable) + return NULL; + + me = sh_css_calloc(1, sizeof(*me)); + if (!me) + goto err; + + if (grid->use_dmem) { + me->dmem_size = sizeof(struct ia_css_3a_output) * + grid->aligned_width * + grid->aligned_height; + } else { + me->vmem_size = ISP_S3ATBL_HI_LO_STRIDE_BYTES * + grid->aligned_height; + } +#if !defined(HAS_NO_HMEM) + me->hmem_size = sizeof_hmem(HMEM0_ID); +#endif + + /* All subsections need to be aligned to the system bus width */ + me->dmem_size = CEIL_MUL(me->dmem_size, HIVE_ISP_DDR_WORD_BYTES); + me->vmem_size = CEIL_MUL(me->vmem_size, HIVE_ISP_DDR_WORD_BYTES); + me->hmem_size = CEIL_MUL(me->hmem_size, HIVE_ISP_DDR_WORD_BYTES); + + me->size = me->dmem_size + me->vmem_size * 2 + me->hmem_size; + me->data_ptr = mmgr_malloc(me->size); + if (me->data_ptr == mmgr_NULL) { + sh_css_free(me); + me = NULL; + goto err; + } + if (me->dmem_size) + me->data.dmem.s3a_tbl = me->data_ptr; + if (me->vmem_size) { + me->data.vmem.s3a_tbl_hi = me->data_ptr + me->dmem_size; + me->data.vmem.s3a_tbl_lo = me->data_ptr + me->dmem_size + me->vmem_size; + } + if (me->hmem_size) + me->data_hmem.rgby_tbl = me->data_ptr + me->dmem_size + 2 * me->vmem_size; + + +err: + IA_CSS_LEAVE("return=%p", me); + return me; +} + +void +ia_css_isp_3a_statistics_free(struct ia_css_isp_3a_statistics *me) +{ + if (me != NULL) { + hmm_free(me->data_ptr); + sh_css_free(me); + } +} + +struct ia_css_isp_skc_dvs_statistics *ia_css_skc_dvs_statistics_allocate(void) +{ + return NULL; +} + +struct ia_css_metadata * +ia_css_metadata_allocate(const struct ia_css_metadata_info *metadata_info) +{ + struct ia_css_metadata *md = NULL; + + IA_CSS_ENTER(""); + + if (metadata_info->size == 0) + return NULL; + + md = sh_css_malloc(sizeof(*md)); + if (md == NULL) + goto error; + + md->info = *metadata_info; + md->exp_id = 0; + md->address = mmgr_malloc(metadata_info->size); + if (md->address == mmgr_NULL) + goto error; + + IA_CSS_LEAVE("return=%p", md); + return md; + +error: + ia_css_metadata_free(md); + IA_CSS_LEAVE("return=%p", NULL); + return NULL; +} + +void +ia_css_metadata_free(struct ia_css_metadata *me) +{ + if (me != NULL) { + /* The enter and leave macros are placed inside + * the condition to avoid false logging of metadata + * free events when metadata is disabled. + * We found this to be confusing during development + * and debugging. */ + IA_CSS_ENTER("me=%p", me); + hmm_free(me->address); + sh_css_free(me); + IA_CSS_LEAVE("void"); + } +} + +void +ia_css_metadata_free_multiple(unsigned int num_bufs, struct ia_css_metadata **bufs) +{ + unsigned int i; + + if (bufs != NULL) { + for (i = 0; i < num_bufs; i++) + ia_css_metadata_free(bufs[i]); + } +} + +static unsigned g_param_buffer_dequeue_count = 0; +static unsigned g_param_buffer_enqueue_count = 0; + +enum ia_css_err +ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned i; + struct sh_css_ddr_address_map *ddr_ptrs; + struct sh_css_ddr_address_map_size *ddr_ptrs_size; + struct ia_css_isp_parameters *params; + + assert(stream != NULL); + IA_CSS_ENTER_PRIVATE("void"); + + if (stream == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* TMP: tracking of paramsets */ + g_param_buffer_dequeue_count = 0; + g_param_buffer_enqueue_count = 0; + + stream->per_frame_isp_params_configs = NULL; + err = sh_css_create_isp_params(stream, + &stream->isp_params_configs); + if(err != IA_CSS_SUCCESS) + goto ERR; + + params = stream->isp_params_configs; + if (!sh_css_init_isp_params_from_global(stream, params, true, NULL)) { + /* we do not return the error immediately to enable internal + * firmware feature testing */ + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } + + ddr_ptrs = ¶ms->ddr_ptrs; + ddr_ptrs_size = ¶ms->ddr_ptrs_size; + + /* create per pipe reference to general ddr_ptrs */ + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + ref_sh_css_ddr_address_map(ddr_ptrs, ¶ms->pipe_ddr_ptrs[i]); + params->pipe_ddr_ptrs_size[i] = *ddr_ptrs_size; + } + +ERR: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static void +ia_css_set_sdis_config( + struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *dvs_coefs) +{ + ia_css_set_sdis_horicoef_config(params, dvs_coefs); + ia_css_set_sdis_vertcoef_config(params, dvs_coefs); + ia_css_set_sdis_horiproj_config(params, dvs_coefs); + ia_css_set_sdis_vertproj_config(params, dvs_coefs); +} + +static void +ia_css_set_sdis2_config( + struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *dvs2_coefs) +{ + ia_css_set_sdis2_horicoef_config(params, dvs2_coefs); + ia_css_set_sdis2_vertcoef_config(params, dvs2_coefs); + ia_css_set_sdis2_horiproj_config(params, dvs2_coefs); + ia_css_set_sdis2_vertproj_config(params, dvs2_coefs); +} + +static enum ia_css_err +sh_css_create_isp_params(struct ia_css_stream *stream, + struct ia_css_isp_parameters **isp_params_out) +{ + bool succ = true; + unsigned i; + struct sh_css_ddr_address_map *ddr_ptrs; + struct sh_css_ddr_address_map_size *ddr_ptrs_size; + enum ia_css_err err = IA_CSS_SUCCESS; + size_t params_size; + struct ia_css_isp_parameters *params = + sh_css_malloc(sizeof(struct ia_css_isp_parameters)); + + if (!params) + { + *isp_params_out = NULL; + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + IA_CSS_ERROR("%s:%d error: cannot allocate memory", __FILE__, __LINE__); + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } else { + memset(params, 0, sizeof(struct ia_css_isp_parameters)); + } + + ddr_ptrs = ¶ms->ddr_ptrs; + ddr_ptrs_size = ¶ms->ddr_ptrs_size; + + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + memset(¶ms->pipe_ddr_ptrs[i], 0, + sizeof(params->pipe_ddr_ptrs[i])); + memset(¶ms->pipe_ddr_ptrs_size[i], 0, + sizeof(params->pipe_ddr_ptrs_size[i])); + } + + memset(ddr_ptrs, 0, sizeof(*ddr_ptrs)); + memset(ddr_ptrs_size, 0, sizeof(*ddr_ptrs_size)); + + params_size = sizeof(params->uds); + ddr_ptrs_size->isp_param = params_size; + ddr_ptrs->isp_param = + ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, + mmgr_malloc(params_size)); + succ &= (ddr_ptrs->isp_param != mmgr_NULL); + + ddr_ptrs_size->macc_tbl = sizeof(struct ia_css_macc_table); + ddr_ptrs->macc_tbl = + ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, + mmgr_malloc(sizeof(struct ia_css_macc_table))); + succ &= (ddr_ptrs->macc_tbl != mmgr_NULL); + + *isp_params_out = params; + return err; +} + +static bool +sh_css_init_isp_params_from_global(struct ia_css_stream *stream, + struct ia_css_isp_parameters *params, + bool use_default_config, + struct ia_css_pipe *pipe_in) +{ + bool retval = true; + int i = 0; + bool is_dp_10bpp = true; + unsigned isp_pipe_version = ia_css_pipe_get_isp_pipe_version(stream->pipes[0]); + struct ia_css_isp_parameters *stream_params = stream->isp_params_configs; + + if (!use_default_config && !stream_params) { + retval = false; + goto exit; + } + + params->output_frame = NULL; + params->isp_parameters_id = 0; + + if (use_default_config) + { + ia_css_set_xnr3_config(params, &default_xnr3_config); + + sh_css_set_nr_config(params, &default_nr_config); + sh_css_set_ee_config(params, &default_ee_config); + if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) + sh_css_set_macc_table(params, &default_macc_table); + else if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) + sh_css_set_macc_table(params, &default_macc2_table); + sh_css_set_gamma_table(params, &default_gamma_table); + sh_css_set_ctc_table(params, &default_ctc_table); + sh_css_set_baa_config(params, &default_baa_config); + sh_css_set_dz_config(params, &default_dz_config); +/* ------ deprecated(bz675) : from ------ */ + sh_css_set_shading_settings(params, &default_shading_settings); +/* ------ deprecated(bz675) : to ------ */ + + ia_css_set_s3a_config(params, &default_3a_config); + ia_css_set_wb_config(params, &default_wb_config); + ia_css_set_csc_config(params, &default_cc_config); + ia_css_set_tnr_config(params, &default_tnr_config); + ia_css_set_ob_config(params, &default_ob_config); + ia_css_set_dp_config(params, &default_dp_config); +#ifndef ISP2401 + ia_css_set_param_exceptions(pipe_in, params); +#else + + for (i = 0; i < stream->num_pipes; i++) { + if (IA_CSS_SUCCESS == sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) { + /* set the return value as false if both DPC and + * BDS is enabled by the user. But we do not return + * the value immediately to enable internal firmware + * feature testing. */ + if(is_dp_10bpp) { + sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); + } else { + sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); + } + } else { + retval = false; + goto exit; + } + + ia_css_set_param_exceptions(stream->pipes[i], params); + } + +#endif + ia_css_set_de_config(params, &default_de_config); + ia_css_set_gc_config(params, &default_gc_config); + ia_css_set_anr_config(params, &default_anr_config); + ia_css_set_anr2_config(params, &default_anr_thres); + ia_css_set_ce_config(params, &default_ce_config); + ia_css_set_xnr_table_config(params, &default_xnr_table); + ia_css_set_ecd_config(params, &default_ecd_config); + ia_css_set_ynr_config(params, &default_ynr_config); + ia_css_set_fc_config(params, &default_fc_config); + ia_css_set_cnr_config(params, &default_cnr_config); + ia_css_set_macc_config(params, &default_macc_config); + ia_css_set_ctc_config(params, &default_ctc_config); + ia_css_set_aa_config(params, &default_aa_config); + ia_css_set_r_gamma_config(params, &default_r_gamma_table); + ia_css_set_g_gamma_config(params, &default_g_gamma_table); + ia_css_set_b_gamma_config(params, &default_b_gamma_table); + ia_css_set_yuv2rgb_config(params, &default_yuv2rgb_cc_config); + ia_css_set_rgb2yuv_config(params, &default_rgb2yuv_cc_config); + ia_css_set_xnr_config(params, &default_xnr_config); + ia_css_set_sdis_config(params, &default_sdis_config); + ia_css_set_sdis2_config(params, &default_sdis2_config); + ia_css_set_formats_config(params, &default_formats_config); + + params->fpn_config.data = NULL; + params->config_changed[IA_CSS_FPN_ID] = true; + params->fpn_config.enabled = 0; + + params->motion_config = default_motion_config; + params->motion_config_changed = true; + + params->morph_table = NULL; + params->morph_table_changed = true; + + params->sc_table = NULL; + params->sc_table_changed = true; + params->sc_table_dirty = false; + params->sc_table_last_pipe_num = 0; + + ia_css_sdis2_clear_coefficients(¶ms->dvs2_coefs); + params->dvs2_coef_table_changed = true; + + ia_css_sdis_clear_coefficients(¶ms->dvs_coefs); + params->dis_coef_table_changed = true; +#ifdef ISP2401 + ia_css_tnr3_set_default_config(¶ms->tnr3_config); +#endif + } + else + { + ia_css_set_xnr3_config(params, &stream_params->xnr3_config); + + sh_css_set_nr_config(params, &stream_params->nr_config); + sh_css_set_ee_config(params, &stream_params->ee_config); + if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) + sh_css_set_macc_table(params, &stream_params->macc_table); + else if (isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) + sh_css_set_macc_table(params, &stream_params->macc_table); + sh_css_set_gamma_table(params, &stream_params->gc_table); + sh_css_set_ctc_table(params, &stream_params->ctc_table); + sh_css_set_baa_config(params, &stream_params->bds_config); + sh_css_set_dz_config(params, &stream_params->dz_config); +/* ------ deprecated(bz675) : from ------ */ + sh_css_set_shading_settings(params, &stream_params->shading_settings); +/* ------ deprecated(bz675) : to ------ */ + + ia_css_set_s3a_config(params, &stream_params->s3a_config); + ia_css_set_wb_config(params, &stream_params->wb_config); + ia_css_set_csc_config(params, &stream_params->cc_config); + ia_css_set_tnr_config(params, &stream_params->tnr_config); + ia_css_set_ob_config(params, &stream_params->ob_config); + ia_css_set_dp_config(params, &stream_params->dp_config); + ia_css_set_de_config(params, &stream_params->de_config); + ia_css_set_gc_config(params, &stream_params->gc_config); + ia_css_set_anr_config(params, &stream_params->anr_config); + ia_css_set_anr2_config(params, &stream_params->anr_thres); + ia_css_set_ce_config(params, &stream_params->ce_config); + ia_css_set_xnr_table_config(params, &stream_params->xnr_table); + ia_css_set_ecd_config(params, &stream_params->ecd_config); + ia_css_set_ynr_config(params, &stream_params->ynr_config); + ia_css_set_fc_config(params, &stream_params->fc_config); + ia_css_set_cnr_config(params, &stream_params->cnr_config); + ia_css_set_macc_config(params, &stream_params->macc_config); + ia_css_set_ctc_config(params, &stream_params->ctc_config); + ia_css_set_aa_config(params, &stream_params->aa_config); + ia_css_set_r_gamma_config(params, &stream_params->r_gamma_table); + ia_css_set_g_gamma_config(params, &stream_params->g_gamma_table); + ia_css_set_b_gamma_config(params, &stream_params->b_gamma_table); + ia_css_set_yuv2rgb_config(params, &stream_params->yuv2rgb_cc_config); + ia_css_set_rgb2yuv_config(params, &stream_params->rgb2yuv_cc_config); + ia_css_set_xnr_config(params, &stream_params->xnr_config); + ia_css_set_formats_config(params, &stream_params->formats_config); + + for (i = 0; i < stream->num_pipes; i++) { + if (IA_CSS_SUCCESS == + sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) { + /* set the return value as false if both DPC and + * BDS is enabled by the user. But we do not return + * the value immediately to enable internal firmware + * feature testing. */ +#ifndef ISP2401 + retval = !is_dp_10bpp; +#else + if (is_dp_10bpp) { + retval = false; + } + } else { + retval = false; + goto exit; + } + if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { + sh_css_set_dp_config(stream->pipes[i], params, + &stream_params->pipe_dp_config[stream->pipes[i]->mode]); + ia_css_set_param_exceptions(stream->pipes[i], params); +#endif + } else { + retval = false; + goto exit; + } + } + +#ifndef ISP2401 + ia_css_set_param_exceptions(pipe_in, params); + +#endif + params->fpn_config.data = stream_params->fpn_config.data; + params->config_changed[IA_CSS_FPN_ID] = stream_params->config_changed[IA_CSS_FPN_ID]; + params->fpn_config.enabled = stream_params->fpn_config.enabled; + + sh_css_set_motion_vector(params, &stream_params->motion_config); + sh_css_set_morph_table(params, stream_params->morph_table); + + if (stream_params->sc_table) { + sh_css_update_shading_table_status(pipe_in, params); + sh_css_set_shading_table(stream, params, stream_params->sc_table); + } + else { + params->sc_table = NULL; + params->sc_table_changed = true; + params->sc_table_dirty = false; + params->sc_table_last_pipe_num = 0; + } + + /* Only IA_CSS_PIPE_ID_VIDEO & IA_CSS_PIPE_ID_CAPTURE will support dvs_6axis_config*/ + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + if (stream_params->pipe_dvs_6axis_config[i]) { + if (params->pipe_dvs_6axis_config[i]) { + copy_dvs_6axis_table(params->pipe_dvs_6axis_config[i], + stream_params->pipe_dvs_6axis_config[i]); + } else { + params->pipe_dvs_6axis_config[i] = + generate_dvs_6axis_table_from_config(stream_params->pipe_dvs_6axis_config[i]); + } + } + } + ia_css_set_sdis_config(params, &stream_params->dvs_coefs); + params->dis_coef_table_changed = stream_params->dis_coef_table_changed; + + ia_css_set_sdis2_config(params, &stream_params->dvs2_coefs); + params->dvs2_coef_table_changed = stream_params->dvs2_coef_table_changed; + params->sensor_binning = stream_params->sensor_binning; + } + +exit: + return retval; +} + +enum ia_css_err +sh_css_params_init(void) +{ + int i, p; + + IA_CSS_ENTER_PRIVATE("void"); + + /* TMP: tracking of paramsets */ + g_param_buffer_dequeue_count = 0; + g_param_buffer_enqueue_count = 0; + + for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) { + for (i = 0; i < SH_CSS_MAX_STAGES; i++) { + xmem_sp_stage_ptrs[p][i] = + ia_css_refcount_increment(-1, + mmgr_calloc(1, + sizeof(struct sh_css_sp_stage))); + xmem_isp_stage_ptrs[p][i] = + ia_css_refcount_increment(-1, + mmgr_calloc(1, + sizeof(struct sh_css_isp_stage))); + + if ((xmem_sp_stage_ptrs[p][i] == mmgr_NULL) || + (xmem_isp_stage_ptrs[p][i] == mmgr_NULL)) { + sh_css_params_uninit(); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + } + } + + ia_css_config_gamma_table(); + ia_css_config_ctc_table(); + ia_css_config_rgb_gamma_tables(); + ia_css_config_xnr_table(); + + sp_ddr_ptrs = ia_css_refcount_increment(-1, mmgr_calloc(1, + CEIL_MUL(sizeof(struct sh_css_ddr_address_map), + HIVE_ISP_DDR_WORD_BYTES))); + xmem_sp_group_ptrs = ia_css_refcount_increment(-1, mmgr_calloc(1, + sizeof(struct sh_css_sp_group))); + + if ((sp_ddr_ptrs == mmgr_NULL) || + (xmem_sp_group_ptrs == mmgr_NULL)) { + ia_css_uninit(); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +static void host_lut_store(const void *lut) +{ + unsigned i; + + for (i = 0; i < N_GDC_ID; i++) + gdc_lut_store((gdc_ID_t)i, (const int (*)[HRT_GDC_N]) lut); +} + +/* Note that allocation is in ipu address space. */ +inline hrt_vaddress sh_css_params_alloc_gdc_lut(void) +{ + return mmgr_malloc(sizeof(zoom_table)); +} + +inline void sh_css_params_free_gdc_lut(hrt_vaddress addr) +{ + if (addr != mmgr_NULL) + hmm_free(addr); +} + +enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, + const void *lut) +{ + enum ia_css_err err = IA_CSS_SUCCESS; +#ifndef ISP2401 + bool store = true; +#else + bool stream_started = false; +#endif + IA_CSS_ENTER("pipe=%p lut=%p", pipe, lut); + + if (lut == NULL || pipe == NULL) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE("err=%d", err); + return err; + } + + /* If the pipe belongs to a stream and the stream has started, it is not + * safe to store lut to gdc HW. If pipe->stream is NULL, then no stream is + * created with this pipe, so it is safe to do this operation as long as + * ia_css_init() has been called. */ + if (pipe->stream && pipe->stream->started) { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "unable to set scaler lut since stream has started\n"); +#ifndef ISP2401 + store = false; +#else + stream_started = true; +#endif + err = IA_CSS_ERR_NOT_SUPPORTED; + } + + /* Free any existing tables. */ + sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); + pipe->scaler_pp_lut = mmgr_NULL; + +#ifndef ISP2401 + if (store) { + pipe->scaler_pp_lut = mmgr_malloc(sizeof(zoom_table)); +#else + if (!stream_started) { + pipe->scaler_pp_lut = sh_css_params_alloc_gdc_lut(); +#endif + if (pipe->scaler_pp_lut == mmgr_NULL) { +#ifndef ISP2401 + IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; +#else + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "unable to allocate scaler_pp_lut\n"); + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } else { + gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, + interleaved_lut_temp); + mmgr_store(pipe->scaler_pp_lut, + (int *)interleaved_lut_temp, + sizeof(zoom_table)); +#endif + } +#ifndef ISP2401 + + gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, interleaved_lut_temp); + mmgr_store(pipe->scaler_pp_lut, (int *)interleaved_lut_temp, + sizeof(zoom_table)); +#endif + } + + IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err); + return err; +} + +/* if pipe is NULL, returns default lut addr. */ +hrt_vaddress sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe) +{ + assert(pipe != NULL); + + if (pipe->scaler_pp_lut != mmgr_NULL) + return pipe->scaler_pp_lut; + else + return sh_css_params_get_default_gdc_lut(); +} + +enum ia_css_err sh_css_params_map_and_store_default_gdc_lut(void) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("void"); + + /* Is table already mapped? Nothing to do if it is mapped. */ + if (default_gdc_lut != mmgr_NULL) + return err; + + host_lut_store((void *)zoom_table); + +#ifndef ISP2401 + default_gdc_lut = mmgr_malloc(sizeof(zoom_table)); +#else + default_gdc_lut = sh_css_params_alloc_gdc_lut(); +#endif + if (default_gdc_lut == mmgr_NULL) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])zoom_table, + interleaved_lut_temp); + mmgr_store(default_gdc_lut, (int *)interleaved_lut_temp, + sizeof(zoom_table)); + + IA_CSS_LEAVE_PRIVATE("lut(%u) err=%d", default_gdc_lut, err); + return err; +} + +void sh_css_params_free_default_gdc_lut(void) +{ + IA_CSS_ENTER_PRIVATE("void"); + + sh_css_params_free_gdc_lut(default_gdc_lut); + default_gdc_lut = mmgr_NULL; + + IA_CSS_LEAVE_PRIVATE("void"); + +} + +hrt_vaddress sh_css_params_get_default_gdc_lut(void) +{ + return default_gdc_lut; +} + +static void free_param_set_callback( + hrt_vaddress ptr) +{ + IA_CSS_ENTER_PRIVATE("void"); + + free_ia_css_isp_parameter_set_info(ptr); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void free_buffer_callback( + hrt_vaddress ptr) +{ + IA_CSS_ENTER_PRIVATE("void"); + + hmm_free(ptr); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +void +sh_css_param_clear_param_sets(void) +{ + IA_CSS_ENTER_PRIVATE("void"); + + ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_SET_POOL, &free_param_set_callback); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +/* + * MW: we can define hmm_free() to return a NULL + * then you can write ptr = hmm_free(ptr); + */ +#define safe_free(id, x) \ + do { \ + ia_css_refcount_decrement(id, x); \ + (x) = mmgr_NULL; \ + } while(0) + +static void free_map(struct sh_css_ddr_address_map *map) +{ + unsigned int i; + + hrt_vaddress *addrs = (hrt_vaddress *)map; + + IA_CSS_ENTER_PRIVATE("void"); + + /* free buffers */ + for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size)/ + sizeof(size_t)); i++) { + if (addrs[i] == mmgr_NULL) + continue; + safe_free(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); + } + + IA_CSS_LEAVE_PRIVATE("void"); +} + +void +ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) +{ + int i; + struct ia_css_isp_parameters *params = stream->isp_params_configs; + struct ia_css_isp_parameters *per_frame_params = + stream->per_frame_isp_params_configs; + + IA_CSS_ENTER_PRIVATE("void"); + if (params == NULL) { + IA_CSS_LEAVE_PRIVATE("isp_param_configs is NULL"); + return; + } + + /* free existing ddr_ptr maps */ + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + { + free_map(¶ms->pipe_ddr_ptrs[i]); + if (per_frame_params) + free_map(&per_frame_params->pipe_ddr_ptrs[i]); + /* Free up theDVS table memory blocks before recomputing new table */ + if (params->pipe_dvs_6axis_config[i]) + free_dvs_6axis_table(&(params->pipe_dvs_6axis_config[i])); + if (per_frame_params && per_frame_params->pipe_dvs_6axis_config[i]) + free_dvs_6axis_table(&(per_frame_params->pipe_dvs_6axis_config[i])); + } + free_map(¶ms->ddr_ptrs); + if (per_frame_params) + free_map(&per_frame_params->ddr_ptrs); + + if (params->fpn_config.data) { + sh_css_free(params->fpn_config.data); + params->fpn_config.data = NULL; + } + + /* Free up sc_config (temporal shading table) if it is allocated. */ + if (params->sc_config) { + ia_css_shading_table_free(params->sc_config); + params->sc_config = NULL; + } + if (per_frame_params) { + if (per_frame_params->sc_config) { + ia_css_shading_table_free(per_frame_params->sc_config); + per_frame_params->sc_config = NULL; + } + } + + sh_css_free(params); + if (per_frame_params) + sh_css_free(per_frame_params); + stream->isp_params_configs = NULL; + stream->per_frame_isp_params_configs = NULL; + + IA_CSS_LEAVE_PRIVATE("void"); +} + +void +sh_css_params_uninit(void) +{ + unsigned p, i; + + IA_CSS_ENTER_PRIVATE("void"); + + ia_css_refcount_decrement(-1, sp_ddr_ptrs); + sp_ddr_ptrs = mmgr_NULL; + ia_css_refcount_decrement(-1, xmem_sp_group_ptrs); + xmem_sp_group_ptrs = mmgr_NULL; + + for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) + for (i = 0; i < SH_CSS_MAX_STAGES; i++) { + ia_css_refcount_decrement(-1, xmem_sp_stage_ptrs[p][i]); + xmem_sp_stage_ptrs[p][i] = mmgr_NULL; + ia_css_refcount_decrement(-1, xmem_isp_stage_ptrs[p][i]); + xmem_isp_stage_ptrs[p][i] = mmgr_NULL; + } + + /* go through the pools to clear references */ + ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_SET_POOL, &free_param_set_callback); + ia_css_refcount_clear(IA_CSS_REFCOUNT_PARAM_BUFFER, &free_buffer_callback); + ia_css_refcount_clear(-1, &free_buffer_callback); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static struct ia_css_host_data * +convert_allocate_morph_plane( + unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int aligned_width) +{ + unsigned int i, j, padding, w; + struct ia_css_host_data *me; + unsigned int isp_data_size; + uint16_t *isp_data_ptr; + + IA_CSS_ENTER_PRIVATE("void"); + + /* currently we don't have morph table interpolation yet, + * so we allow a wider table to be used. This will be removed + * in the future. */ + if (width > aligned_width) { + padding = 0; + w = aligned_width; + } else { + padding = aligned_width - width; + w = width; + } + isp_data_size = height * (w + padding) * sizeof(uint16_t); + + me = ia_css_host_data_allocate((size_t) isp_data_size); + + if (!me) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return NULL; + } + + isp_data_ptr = (uint16_t *)me->address; + + memset(isp_data_ptr, 0, (size_t)isp_data_size); + + for (i = 0; i < height; i++) { + for (j = 0; j < w; j++) + *isp_data_ptr++ = (uint16_t)data[j]; + isp_data_ptr += padding; + data += width; + } + + IA_CSS_LEAVE_PRIVATE("void"); + return me; +} + +static enum ia_css_err +store_morph_plane( + unsigned short *data, + unsigned int width, + unsigned int height, + hrt_vaddress dest, + unsigned int aligned_width) +{ + struct ia_css_host_data *isp_data; + + assert(dest != mmgr_NULL); + + isp_data = convert_allocate_morph_plane(data, width, height, aligned_width); + if (!isp_data) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + ia_css_params_store_ia_css_host_data(dest, isp_data); + + ia_css_host_data_free(isp_data); + return IA_CSS_SUCCESS; +} + +static void sh_css_update_isp_params_to_ddr( + struct ia_css_isp_parameters *params, + hrt_vaddress ddr_ptr) +{ + size_t size = sizeof(params->uds); + + IA_CSS_ENTER_PRIVATE("void"); + + assert(params != NULL); + + mmgr_store(ddr_ptr, &(params->uds), size); + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void sh_css_update_isp_mem_params_to_ddr( + const struct ia_css_binary *binary, + hrt_vaddress ddr_mem_ptr, + size_t size, + enum ia_css_isp_memories mem) +{ + const struct ia_css_host_data *params; + + IA_CSS_ENTER_PRIVATE("void"); + + params = ia_css_isp_param_get_mem_init(&binary->mem_params, IA_CSS_PARAM_CLASS_PARAM, mem); + mmgr_store(ddr_mem_ptr, params->address, size); + + IA_CSS_LEAVE_PRIVATE("void"); +} + +void ia_css_dequeue_param_buffers(/*unsigned int pipe_num*/ void) +{ + unsigned int i; + hrt_vaddress cpy; + enum sh_css_queue_id param_queue_ids[3] = { IA_CSS_PARAMETER_SET_QUEUE_ID, + IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID, + SH_CSS_INVALID_QUEUE_ID}; + + IA_CSS_ENTER_PRIVATE("void"); + + if (!sh_css_sp_is_running()) { + IA_CSS_LEAVE_PRIVATE("sp is not running"); + /* SP is not running. The queues are not valid */ + return; + } + + for (i = 0; SH_CSS_INVALID_QUEUE_ID != param_queue_ids[i]; i++) { + cpy = (hrt_vaddress)0; + /* clean-up old copy */ + while (IA_CSS_SUCCESS == ia_css_bufq_dequeue_buffer(param_queue_ids[i], (uint32_t *)&cpy)) { + /* TMP: keep track of dequeued param set count + */ + g_param_buffer_dequeue_count++; + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, + 0, + param_queue_ids[i], + 0); + + IA_CSS_LOG("dequeued param set %x from %d, release ref", cpy, 0); + free_ia_css_isp_parameter_set_info(cpy); + cpy = (hrt_vaddress)0; + } + } + + IA_CSS_LEAVE_PRIVATE("void"); +} + +static void +process_kernel_parameters(unsigned int pipe_id, + struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params, + unsigned int isp_pipe_version, + unsigned int raw_bit_depth) +{ + unsigned param_id; + + (void)isp_pipe_version; + (void)raw_bit_depth; + + sh_css_enable_pipeline(stage->binary); + + if (params->config_changed[IA_CSS_OB_ID]) { + ia_css_ob_configure(¶ms->stream_configs.ob, + isp_pipe_version, raw_bit_depth); + } + if (params->config_changed[IA_CSS_S3A_ID]) { + ia_css_s3a_configure(raw_bit_depth); + } + /* Copy stage uds parameters to config, since they can differ per stage. + */ + params->crop_config.crop_pos = params->uds[stage->stage_num].crop_pos; + params->uds_config.crop_pos = params->uds[stage->stage_num].crop_pos; + params->uds_config.uds = params->uds[stage->stage_num].uds; + /* Call parameter process functions for all kernels */ + /* Skip SC, since that is called on a temp sc table */ + for (param_id = 0; param_id < IA_CSS_NUM_PARAMETER_IDS; param_id++) { + if (param_id == IA_CSS_SC_ID) continue; + if (params->config_changed[param_id]) + ia_css_kernel_process_param[param_id](pipe_id, stage, params); + } +} + +enum ia_css_err +sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, + struct ia_css_isp_parameters *params, + bool commit, + struct ia_css_pipe *pipe_in) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + hrt_vaddress cpy; + int i; + unsigned int raw_bit_depth = 10; + unsigned int isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_1; + bool acc_cluster_params_changed = false; + unsigned int thread_id, pipe_num; + + (void)acc_cluster_params_changed; + + assert(curr_pipe != NULL); + + IA_CSS_ENTER_PRIVATE("pipe=%p, isp_parameters_id=%d", pipe_in, params->isp_parameters_id); + raw_bit_depth = ia_css_stream_input_format_bits_per_pixel(curr_pipe->stream); + + /* now make the map available to the sp */ + if (!commit) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* enqueue a copies of the mem_map to + the designated pipelines */ + for (i = 0; i < curr_pipe->stream->num_pipes; i++) { + struct ia_css_pipe *pipe; + struct sh_css_ddr_address_map *cur_map; + struct sh_css_ddr_address_map_size *cur_map_size; + struct ia_css_isp_parameter_set_info isp_params_info; + struct ia_css_pipeline *pipeline; + struct ia_css_pipeline_stage *stage; + + enum sh_css_queue_id queue_id; + + pipe = curr_pipe->stream->pipes[i]; + pipeline = ia_css_pipe_get_pipeline(pipe); + pipe_num = ia_css_pipe_get_pipe_num(pipe); + isp_pipe_version = ia_css_pipe_get_isp_pipe_version(pipe); + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + ia_css_query_internal_queue_id(params->output_frame + ? IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET + : IA_CSS_BUFFER_TYPE_PARAMETER_SET, + thread_id, &queue_id); +#else + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, &queue_id); +#endif + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + break; + } + cur_map = ¶ms->pipe_ddr_ptrs[pipeline->pipe_id]; + cur_map_size = ¶ms->pipe_ddr_ptrs_size[pipeline->pipe_id]; + + /* TODO: Normally, zoom and motion parameters shouldn't + * be part of "isp_params" as it is resolution/pipe dependant + * Therefore, move the zoom config elsewhere (e.g. shading + * table can be taken as an example! @GC + * */ + { + /* we have to do this per pipeline because */ + /* the processing is a.o. resolution dependent */ + err = ia_css_process_zoom_and_motion(params, + pipeline->stages); + if (err != IA_CSS_SUCCESS) + return err; + } + /* check if to actually update the parameters for this pipe */ + /* When API change is implemented making good distinction between + * stream config and pipe config this skipping code can be moved out of the #ifdef */ + if (pipe_in && (pipe != pipe_in)) { + IA_CSS_LOG("skipping pipe %p", pipe); + continue; + } + + /* BZ 125915, should be moved till after "update other buff" */ + /* update the other buffers to the pipe specific copies */ + for (stage = pipeline->stages; stage; stage = stage->next) { + unsigned mem; + + if (!stage || !stage->binary) + continue; + + process_kernel_parameters(pipeline->pipe_id, + stage, params, + isp_pipe_version, raw_bit_depth); + + err = sh_css_params_write_to_ddr_internal( + pipe, + pipeline->pipe_id, + params, + stage, + cur_map, + cur_map_size); + + if (err != IA_CSS_SUCCESS) + break; + for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { + params->isp_mem_params_changed + [pipeline->pipe_id][stage->stage_num][mem] = false; + } + } /* for */ + if (err != IA_CSS_SUCCESS) + break; + /* update isp_params to pipe specific copies */ + if (params->isp_params_changed) { + reallocate_buffer(&cur_map->isp_param, + &cur_map_size->isp_param, + cur_map_size->isp_param, + true, + &err); + if (err != IA_CSS_SUCCESS) + break; + sh_css_update_isp_params_to_ddr(params, cur_map->isp_param); + } + + /* last make referenced copy */ + err = ref_sh_css_ddr_address_map( + cur_map, + &isp_params_info.mem_map); + if (err != IA_CSS_SUCCESS) + break; + + /* Update Parameters ID */ + isp_params_info.isp_parameters_id = params->isp_parameters_id; + + /* Update output frame pointer */ + isp_params_info.output_frame_ptr = + (params->output_frame) ? params->output_frame->data : mmgr_NULL; + + /* now write the copy to ddr */ + err = write_ia_css_isp_parameter_set_info_to_ddr(&isp_params_info, &cpy); + if (err != IA_CSS_SUCCESS) + break; + + /* enqueue the set to sp */ + IA_CSS_LOG("queue param set %x to %d", cpy, thread_id); + + err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)cpy); + if (IA_CSS_SUCCESS != err) { + free_ia_css_isp_parameter_set_info(cpy); +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + IA_CSS_LOG("pfp: FAILED to add config id %d for OF %d to q %d on thread %d", + isp_params_info.isp_parameters_id, + isp_params_info.output_frame_ptr, + queue_id, thread_id); +#endif + break; + } + else { + /* TMP: check discrepancy between nr of enqueued + * parameter sets and dequeued sets + */ + g_param_buffer_enqueue_count++; + assert(g_param_buffer_enqueue_count < g_param_buffer_dequeue_count+50); +#ifdef ISP2401 + ia_css_save_latest_paramset_ptr(pipe, cpy); +#endif + /* + * Tell the SP which queues are not empty, + * by sending the software event. + */ + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, + (uint8_t)thread_id, + (uint8_t)queue_id, + 0); +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + IA_CSS_LOG("pfp: added config id %d for OF %d to q %d on thread %d", + isp_params_info.isp_parameters_id, + isp_params_info.output_frame_ptr, + queue_id, thread_id); +#endif + } + /* clean-up old copy */ + ia_css_dequeue_param_buffers(/*pipe_num*/); + params->pipe_dvs_6axis_config_changed[pipeline->pipe_id] = false; + } /* end for each 'active' pipeline */ + /* clear the changed flags after all params + for all pipelines have been updated */ + params->isp_params_changed = false; + params->sc_table_changed = false; + params->dis_coef_table_changed = false; + params->dvs2_coef_table_changed = false; + params->morph_table_changed = false; + params->dz_config_changed = false; + params->motion_config_changed = false; +/* ------ deprecated(bz675) : from ------ */ + params->shading_settings_changed = false; +/* ------ deprecated(bz675) : to ------ */ + + memset(¶ms->config_changed[0], 0, sizeof(params->config_changed)); + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +sh_css_params_write_to_ddr_internal( + struct ia_css_pipe *pipe, + unsigned pipe_id, + struct ia_css_isp_parameters *params, + const struct ia_css_pipeline_stage *stage, + struct sh_css_ddr_address_map *ddr_map, + struct sh_css_ddr_address_map_size *ddr_map_size) +{ + enum ia_css_err err; + const struct ia_css_binary *binary; + + unsigned stage_num; + unsigned mem; + bool buff_realloced; + + /* struct is > 128 bytes so it should not be on stack (see checkpatch) */ + static struct ia_css_macc_table converted_macc_table; + + IA_CSS_ENTER_PRIVATE("void"); + assert(params != NULL); + assert(ddr_map != NULL); + assert(ddr_map_size != NULL); + assert(stage != NULL); + + binary = stage->binary; + assert(binary != NULL); + + + stage_num = stage->stage_num; + + if (binary->info->sp.enable.fpnr) { + buff_realloced = reallocate_buffer(&ddr_map->fpn_tbl, + &ddr_map_size->fpn_tbl, + (size_t)(FPNTBL_BYTES(binary)), + params->config_changed[IA_CSS_FPN_ID], + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (params->config_changed[IA_CSS_FPN_ID] || buff_realloced) { + if (params->fpn_config.enabled) { + err = store_fpntbl(params, ddr_map->fpn_tbl); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + } + } + + if (binary->info->sp.enable.sc) { + uint32_t enable_conv = params-> + shading_settings.enable_shading_table_conversion; + + buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, + &ddr_map_size->sc_tbl, + (size_t)(SCTBL_BYTES(binary)), + params->sc_table_changed, + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + if (params->shading_settings_changed || + params->sc_table_changed || buff_realloced) { + if (enable_conv == 0) { + if (params->sc_table) { + /* store the shading table to ddr */ + err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_table); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* set sc_config to isp */ + params->sc_config = (struct ia_css_shading_table *)params->sc_table; + ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); + params->sc_config = NULL; + } else { + /* generate the identical shading table */ + if (params->sc_config) { + ia_css_shading_table_free(params->sc_config); + params->sc_config = NULL; + } +#ifndef ISP2401 + sh_css_params_shading_id_table_generate(¶ms->sc_config, binary); +#else + sh_css_params_shading_id_table_generate(¶ms->sc_config, + binary->sctbl_width_per_color, binary->sctbl_height); +#endif + if (params->sc_config == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + + /* store the shading table to ddr */ + err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_config); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + /* set sc_config to isp */ + ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); + + /* free the shading table */ + ia_css_shading_table_free(params->sc_config); + params->sc_config = NULL; + } + } else { /* legacy */ +/* ------ deprecated(bz675) : from ------ */ + /* shading table is full resolution, reduce */ + if (params->sc_config) { + ia_css_shading_table_free(params->sc_config); + params->sc_config = NULL; + } + prepare_shading_table( + (const struct ia_css_shading_table *)params->sc_table, + params->sensor_binning, + ¶ms->sc_config, + binary, pipe->required_bds_factor); + if (params->sc_config == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + + /* store the shading table to ddr */ + err = ia_css_params_store_sctbl(stage, ddr_map->sc_tbl, params->sc_config); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + /* set sc_config to isp */ + ia_css_kernel_process_param[IA_CSS_SC_ID](pipe_id, stage, params); + + /* free the shading table */ + ia_css_shading_table_free(params->sc_config); + params->sc_config = NULL; +/* ------ deprecated(bz675) : to ------ */ + } + } + } +#ifdef ISP2401 + /* DPC configuration is made pipe specific to allow flexibility in positioning of the + * DPC kernel. The code below sets the pipe specific configuration to + * individual binaries. */ + if (params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) { + unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + + unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + if (size) { + ia_css_dp_encode((struct sh_css_isp_dp_params *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->pipe_dp_config[pipe_id], size); +#endif + +#ifdef ISP2401 + params->isp_params_changed = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + } + } +#endif + if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) { + unsigned int i, j, idx; + unsigned int idx_map[] = { + 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8}; + + for (i = 0; i < IA_CSS_MACC_NUM_AXES; i++) { + idx = 4*idx_map[i]; + j = 4*i; + + if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) { + converted_macc_table.data[idx] = + (int16_t)sDIGIT_FITTING(params->macc_table.data[j], + 13, SH_CSS_MACC_COEF_SHIFT); + converted_macc_table.data[idx+1] = + (int16_t)sDIGIT_FITTING(params->macc_table.data[j+1], + 13, SH_CSS_MACC_COEF_SHIFT); + converted_macc_table.data[idx+2] = + (int16_t)sDIGIT_FITTING(params->macc_table.data[j+2], + 13, SH_CSS_MACC_COEF_SHIFT); + converted_macc_table.data[idx+3] = + (int16_t)sDIGIT_FITTING(params->macc_table.data[j+3], + 13, SH_CSS_MACC_COEF_SHIFT); + } else if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) { + converted_macc_table.data[idx] = + params->macc_table.data[j]; + converted_macc_table.data[idx+1] = + params->macc_table.data[j+1]; + converted_macc_table.data[idx+2] = + params->macc_table.data[j+2]; + converted_macc_table.data[idx+3] = + params->macc_table.data[j+3]; + } + } + reallocate_buffer(&ddr_map->macc_tbl, + &ddr_map_size->macc_tbl, + ddr_map_size->macc_tbl, + true, + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + mmgr_store(ddr_map->macc_tbl, + converted_macc_table.data, + sizeof(converted_macc_table.data)); + } + + if (binary->info->sp.enable.dvs_6axis) { + /* because UV is packed into the Y plane, calc total + * YYU size = /2 gives size of UV-only, + * total YYU size = UV-only * 3. + */ + buff_realloced = reallocate_buffer( + &ddr_map->dvs_6axis_params_y, + &ddr_map_size->dvs_6axis_params_y, + (size_t)((DVS_6AXIS_BYTES(binary) / 2) * 3), + params->pipe_dvs_6axis_config_changed[pipe_id], + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + if (params->pipe_dvs_6axis_config_changed[pipe_id] || buff_realloced) { + const struct ia_css_frame_info *dvs_in_frame_info; + + if ( stage->args.delay_frames[0] ) { + /*When delay frames are present(as in case of video), + they are used for dvs. Configure DVS using those params*/ + dvs_in_frame_info = &stage->args.delay_frames[0]->info; + } else { + /*Otherwise, use input frame to configure DVS*/ + dvs_in_frame_info = &stage->args.in_frame->info; + } + + /* Generate default DVS unity table on start up*/ + if (params->pipe_dvs_6axis_config[pipe_id] == NULL) { + +#ifndef ISP2401 + struct ia_css_resolution dvs_offset; + dvs_offset.width = +#else + struct ia_css_resolution dvs_offset = {0, 0}; + if (binary->dvs_envelope.width || binary->dvs_envelope.height) { + dvs_offset.width = +#endif + (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; +#ifndef ISP2401 + dvs_offset.height = +#else + dvs_offset.height = +#endif + (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; +#ifdef ISP2401 + } +#endif + + params->pipe_dvs_6axis_config[pipe_id] = + generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); + if (params->pipe_dvs_6axis_config[pipe_id] == NULL) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + params->pipe_dvs_6axis_config_changed[pipe_id] = true; + } + + store_dvs_6axis_config(params->pipe_dvs_6axis_config[pipe_id], + binary, + dvs_in_frame_info, + ddr_map->dvs_6axis_params_y); + params->isp_params_changed = true; + } + } + + if (binary->info->sp.enable.ca_gdc) { + unsigned int i; + hrt_vaddress *virt_addr_tetra_x[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + size_t *virt_size_tetra_x[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + hrt_vaddress *virt_addr_tetra_y[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + size_t *virt_size_tetra_y[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + + virt_addr_tetra_x[0] = &ddr_map->tetra_r_x; + virt_addr_tetra_x[1] = &ddr_map->tetra_gr_x; + virt_addr_tetra_x[2] = &ddr_map->tetra_gb_x; + virt_addr_tetra_x[3] = &ddr_map->tetra_b_x; + virt_addr_tetra_x[4] = &ddr_map->tetra_ratb_x; + virt_addr_tetra_x[5] = &ddr_map->tetra_batr_x; + + virt_size_tetra_x[0] = &ddr_map_size->tetra_r_x; + virt_size_tetra_x[1] = &ddr_map_size->tetra_gr_x; + virt_size_tetra_x[2] = &ddr_map_size->tetra_gb_x; + virt_size_tetra_x[3] = &ddr_map_size->tetra_b_x; + virt_size_tetra_x[4] = &ddr_map_size->tetra_ratb_x; + virt_size_tetra_x[5] = &ddr_map_size->tetra_batr_x; + + virt_addr_tetra_y[0] = &ddr_map->tetra_r_y; + virt_addr_tetra_y[1] = &ddr_map->tetra_gr_y; + virt_addr_tetra_y[2] = &ddr_map->tetra_gb_y; + virt_addr_tetra_y[3] = &ddr_map->tetra_b_y; + virt_addr_tetra_y[4] = &ddr_map->tetra_ratb_y; + virt_addr_tetra_y[5] = &ddr_map->tetra_batr_y; + + virt_size_tetra_y[0] = &ddr_map_size->tetra_r_y; + virt_size_tetra_y[1] = &ddr_map_size->tetra_gr_y; + virt_size_tetra_y[2] = &ddr_map_size->tetra_gb_y; + virt_size_tetra_y[3] = &ddr_map_size->tetra_b_y; + virt_size_tetra_y[4] = &ddr_map_size->tetra_ratb_y; + virt_size_tetra_y[5] = &ddr_map_size->tetra_batr_y; + + buff_realloced = false; + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + buff_realloced |= + reallocate_buffer(virt_addr_tetra_x[i], + virt_size_tetra_x[i], + (size_t) + (MORPH_PLANE_BYTES(binary)), + params->morph_table_changed, + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + buff_realloced |= + reallocate_buffer(virt_addr_tetra_y[i], + virt_size_tetra_y[i], + (size_t) + (MORPH_PLANE_BYTES(binary)), + params->morph_table_changed, + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + if (params->morph_table_changed || buff_realloced) { + const struct ia_css_morph_table *table = params->morph_table; + struct ia_css_morph_table *id_table = NULL; + + if ((table != NULL) && + (table->width < binary->morph_tbl_width || + table->height < binary->morph_tbl_height)) { + table = NULL; + } + if (table == NULL) { + err = sh_css_params_default_morph_table(&id_table, + binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + table = id_table; + } + + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + store_morph_plane(table->coordinates_x[i], + table->width, + table->height, + *virt_addr_tetra_x[i], + binary->morph_tbl_aligned_width); + store_morph_plane(table->coordinates_y[i], + table->width, + table->height, + *virt_addr_tetra_y[i], + binary->morph_tbl_aligned_width); + } + if (id_table != NULL) + ia_css_morph_table_free(id_table); + } + } + + /* After special cases like SC, FPN since they may change parameters */ + for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) { + const struct ia_css_isp_data *isp_data = + ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, IA_CSS_PARAM_CLASS_PARAM, mem); + size_t size = isp_data->size; + if (!size) continue; + buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], + &ddr_map_size->isp_mem_param[stage_num][mem], + size, + params->isp_mem_params_changed[pipe_id][stage_num][mem], + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (params->isp_mem_params_changed[pipe_id][stage_num][mem] || buff_realloced) { + sh_css_update_isp_mem_params_to_ddr(binary, + ddr_map->isp_mem_param[stage_num][mem], + ddr_map_size->isp_mem_param[stage_num][mem], mem); + } + } + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} + +const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream *stream) +{ + struct ia_css_isp_parameters *params; + + IA_CSS_ENTER_LEAVE("void"); + assert(stream != NULL); + + params = stream->isp_params_configs; + + return &(params->fpn_config); +} + +struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stream) +{ + struct ia_css_shading_table *table = NULL; + struct ia_css_isp_parameters *params; + + IA_CSS_ENTER("void"); + + assert(stream != NULL); + + params = stream->isp_params_configs; + if (!params) + return NULL; + + if (params->shading_settings.enable_shading_table_conversion == 0) { + if (params->sc_table) { + table = (struct ia_css_shading_table *)params->sc_table; + } else { + const struct ia_css_binary *binary + = ia_css_stream_get_shading_correction_binary(stream); + if (binary) { + /* generate the identical shading table */ + if (params->sc_config) { + ia_css_shading_table_free(params->sc_config); + params->sc_config = NULL; + } +#ifndef ISP2401 + sh_css_params_shading_id_table_generate(¶ms->sc_config, binary); + +#else + sh_css_params_shading_id_table_generate(¶ms->sc_config, + binary->sctbl_width_per_color, binary->sctbl_height); +#endif + table = params->sc_config; + /* The sc_config will be freed in the + * ia_css_stream_isp_parameters_uninit function. */ + } + } + } else { +/* ------ deprecated(bz675) : from ------ */ + const struct ia_css_binary *binary + = ia_css_stream_get_shading_correction_binary(stream); + struct ia_css_pipe *pipe; + + /**********************************************************************/ + /* following code is copied from function ia_css_stream_get_shading_correction_binary() + * to match with the binary */ + pipe = stream->pipes[0]; + + if (stream->num_pipes == 2) { + assert(stream->pipes[1] != NULL); + if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || + stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + pipe = stream->pipes[1]; + } + /**********************************************************************/ + if (binary) { + if (params->sc_config) { + ia_css_shading_table_free(params->sc_config); + params->sc_config = NULL; + } + prepare_shading_table( + (const struct ia_css_shading_table *)params->sc_table, + params->sensor_binning, + ¶ms->sc_config, + binary, pipe->required_bds_factor); + + table = params->sc_config; + /* The sc_config will be freed in the + * ia_css_stream_isp_parameters_uninit function. */ + } +/* ------ deprecated(bz675) : to ------ */ + } + + IA_CSS_LEAVE("table=%p", table); + + return table; +} + + +hrt_vaddress sh_css_store_sp_group_to_ddr(void) +{ + IA_CSS_ENTER_LEAVE_PRIVATE("void"); + mmgr_store(xmem_sp_group_ptrs, + &sh_css_sp_group, + sizeof(struct sh_css_sp_group)); + return xmem_sp_group_ptrs; +} + +hrt_vaddress sh_css_store_sp_stage_to_ddr( + unsigned pipe, + unsigned stage) +{ + IA_CSS_ENTER_LEAVE_PRIVATE("void"); + mmgr_store(xmem_sp_stage_ptrs[pipe][stage], + &sh_css_sp_stage, + sizeof(struct sh_css_sp_stage)); + return xmem_sp_stage_ptrs[pipe][stage]; +} + +hrt_vaddress sh_css_store_isp_stage_to_ddr( + unsigned pipe, + unsigned stage) +{ + IA_CSS_ENTER_LEAVE_PRIVATE("void"); + mmgr_store(xmem_isp_stage_ptrs[pipe][stage], + &sh_css_isp_stage, + sizeof(struct sh_css_isp_stage)); + return xmem_isp_stage_ptrs[pipe][stage]; +} + +static enum ia_css_err ref_sh_css_ddr_address_map( + struct sh_css_ddr_address_map *map, + struct sh_css_ddr_address_map *out) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + unsigned int i; + + /* we will use a union to copy things; overlaying an array + with the struct; that way adding fields in the struct + will keep things working, and we will not get type errors. + */ + union { + struct sh_css_ddr_address_map *map; + hrt_vaddress *addrs; + } in_addrs, to_addrs; + + IA_CSS_ENTER_PRIVATE("void"); + assert(map != NULL); + assert(out != NULL); + + in_addrs.map = map; + to_addrs.map = out; + + assert(sizeof(struct sh_css_ddr_address_map_size)/sizeof(size_t) == + sizeof(struct sh_css_ddr_address_map)/sizeof(hrt_vaddress)); + + /* copy map using size info */ + for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size)/ + sizeof(size_t)); i++) { + if (in_addrs.addrs[i] == mmgr_NULL) + to_addrs.addrs[i] = mmgr_NULL; + else + to_addrs.addrs[i] = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, in_addrs.addrs[i]); + } + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( + struct ia_css_isp_parameter_set_info *me, + hrt_vaddress *out) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + bool succ; + + IA_CSS_ENTER_PRIVATE("void"); + + assert(me != NULL); + assert(out != NULL); + + *out = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_SET_POOL, mmgr_malloc( + sizeof(struct ia_css_isp_parameter_set_info))); + succ = (*out != mmgr_NULL); + if (succ) + mmgr_store(*out, + me, sizeof(struct ia_css_isp_parameter_set_info)); + else + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +free_ia_css_isp_parameter_set_info( + hrt_vaddress ptr) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_isp_parameter_set_info isp_params_info; + unsigned int i; + hrt_vaddress *addrs = (hrt_vaddress *)&isp_params_info.mem_map; + + IA_CSS_ENTER_PRIVATE("ptr = %u", ptr); + + /* sanity check - ptr must be valid */ + if (!ia_css_refcount_is_valid(ptr)) { + IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_SET_POOL(0x%x) invalid arg", __func__, ptr); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + mmgr_load(ptr, &isp_params_info.mem_map, sizeof(struct sh_css_ddr_address_map)); + /* copy map using size info */ + for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size)/ + sizeof(size_t)); i++) { + if (addrs[i] == mmgr_NULL) + continue; + + /* sanity check - ptr must be valid */ +#ifndef ISP2401 + if (!ia_css_refcount_is_valid(addrs[i])) { +#else + if (ia_css_refcount_is_valid(addrs[i])) { + ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); + } else { +#endif + IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_BUFFER(0x%x) invalid arg", __func__, ptr); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + continue; + } +#ifndef ISP2401 + + ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); +#endif + } + ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_SET_POOL, ptr); + + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +/* Mark all parameters as changed to force recomputing the derived ISP parameters */ +void +sh_css_invalidate_params(struct ia_css_stream *stream) +{ + struct ia_css_isp_parameters *params; + unsigned i, j, mem; + + IA_CSS_ENTER_PRIVATE("void"); + assert(stream != NULL); + + params = stream->isp_params_configs; + params->isp_params_changed = true; + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + for (j = 0; j < SH_CSS_MAX_STAGES; j++) { + for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) { + params->isp_mem_params_changed[i][j][mem] = true; + } + } + } + + memset(¶ms->config_changed[0], 1, sizeof(params->config_changed)); + params->dis_coef_table_changed = true; + params->dvs2_coef_table_changed = true; + params->morph_table_changed = true; + params->sc_table_changed = true; + params->dz_config_changed = true; + params->motion_config_changed = true; + + /*Free up theDVS table memory blocks before recomputing new table */ + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + if (params->pipe_dvs_6axis_config[i]) { + free_dvs_6axis_table(&(params->pipe_dvs_6axis_config[i])); + params->pipe_dvs_6axis_config_changed[i] = true; + } + } + + IA_CSS_LEAVE_PRIVATE("void"); +} + +void +sh_css_update_uds_and_crop_info( + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + bool enable_zoom) +{ + IA_CSS_ENTER_PRIVATE("void"); + + assert(info != NULL); + assert(in_frame_info != NULL); + assert(out_frame_info != NULL); + assert(dvs_env != NULL); + assert(zoom != NULL); + assert(motion_vector != NULL); + assert(uds != NULL); + assert(sp_out_crop_pos != NULL); + + uds->curr_dx = enable_zoom ? (uint16_t)zoom->dx : HRT_GDC_N; + uds->curr_dy = enable_zoom ? (uint16_t)zoom->dy : HRT_GDC_N; + + if (info->enable.dvs_envelope) { + unsigned int crop_x = 0, + crop_y = 0, + uds_xc = 0, + uds_yc = 0, + env_width, env_height; + int half_env_x, half_env_y; + int motion_x = motion_vector->x; + int motion_y = motion_vector->y; + bool upscale_x = in_frame_info->res.width < out_frame_info->res.width; + bool upscale_y = in_frame_info->res.height < out_frame_info->res.height; + + if (info->enable.uds && !info->enable.ds) { + /** + * we calculate with the envelope that we can actually + * use, the min dvs envelope is for the filter + * initialization. + */ + env_width = dvs_env->width - + SH_CSS_MIN_DVS_ENVELOPE; + env_height = dvs_env->height - + SH_CSS_MIN_DVS_ENVELOPE; + half_env_x = env_width / 2; + half_env_y = env_height / 2; + /** + * for digital zoom, we use the dvs envelope and make + * sure that we don't include the 8 leftmost pixels or + * 8 topmost rows. + */ + if (upscale_x) { + uds_xc = (in_frame_info->res.width + + env_width + + SH_CSS_MIN_DVS_ENVELOPE) / 2; + } else { + uds_xc = (out_frame_info->res.width + + env_width) / 2 + + SH_CSS_MIN_DVS_ENVELOPE; + } + if (upscale_y) { + uds_yc = (in_frame_info->res.height + + env_height + + SH_CSS_MIN_DVS_ENVELOPE) / 2; + } else { + uds_yc = (out_frame_info->res.height + + env_height) / 2 + + SH_CSS_MIN_DVS_ENVELOPE; + } + /* clip the motion vector to +/- half the envelope */ + motion_x = clamp(motion_x, -half_env_x, half_env_x); + motion_y = clamp(motion_y, -half_env_y, half_env_y); + uds_xc += motion_x; + uds_yc += motion_y; + /* uds can be pipelined, remove top lines */ + crop_y = 2; + } else if (info->enable.ds) { + env_width = dvs_env->width; + env_height = dvs_env->height; + half_env_x = env_width / 2; + half_env_y = env_height / 2; + /* clip the motion vector to +/- half the envelope */ + motion_x = clamp(motion_x, -half_env_x, half_env_x); + motion_y = clamp(motion_y, -half_env_y, half_env_y); + /* for video with downscaling, the envelope is included + in the input resolution. */ + uds_xc = in_frame_info->res.width/2 + motion_x; + uds_yc = in_frame_info->res.height/2 + motion_y; + crop_x = info->pipeline.left_cropping; + /* ds == 2 (yuv_ds) can be pipelined, remove top + lines */ + if (info->enable.ds & 1) + crop_y = info->pipeline.top_cropping; + else + crop_y = 2; + } else { + /* video nodz: here we can only crop. We make sure we + crop at least the first 8x8 pixels away. */ + env_width = dvs_env->width - + SH_CSS_MIN_DVS_ENVELOPE; + env_height = dvs_env->height - + SH_CSS_MIN_DVS_ENVELOPE; + half_env_x = env_width / 2; + half_env_y = env_height / 2; + motion_x = clamp(motion_x, -half_env_x, half_env_x); + motion_y = clamp(motion_y, -half_env_y, half_env_y); + crop_x = SH_CSS_MIN_DVS_ENVELOPE + + half_env_x + motion_x; + crop_y = SH_CSS_MIN_DVS_ENVELOPE + + half_env_y + motion_y; + } + + /* Must enforce that the crop position is even */ + crop_x = EVEN_FLOOR(crop_x); + crop_y = EVEN_FLOOR(crop_y); + uds_xc = EVEN_FLOOR(uds_xc); + uds_yc = EVEN_FLOOR(uds_yc); + + uds->xc = (uint16_t)uds_xc; + uds->yc = (uint16_t)uds_yc; + sp_out_crop_pos->x = (uint16_t)crop_x; + sp_out_crop_pos->y = (uint16_t)crop_y; + } + else { + /* for down scaling, we always use the center of the image */ + uds->xc = (uint16_t)in_frame_info->res.width / 2; + uds->yc = (uint16_t)in_frame_info->res.height / 2; + sp_out_crop_pos->x = (uint16_t)info->pipeline.left_cropping; + sp_out_crop_pos->y = (uint16_t)info->pipeline.top_cropping; + } + IA_CSS_LEAVE_PRIVATE("void"); +} + +static enum ia_css_err +sh_css_update_uds_and_crop_info_based_on_zoom_region( + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + struct ia_css_resolution pipe_in_res, + bool enable_zoom) +{ + unsigned int x0 = 0, y0 = 0, x1 = 0, y1 = 0; + enum ia_css_err err = IA_CSS_SUCCESS; + /* Note: + * Filter_Envelope = 0 for NND/LUT + * Filter_Envelope = 1 for BCI + * Filter_Envelope = 3 for BLI + * Currently, not considering this filter envelope because, In uds.sp.c is recalculating + * the dx/dy based on filter envelope and other information (ia_css_uds_sp_scale_params) + * Ideally, That should be done on host side not on sp side. + */ + unsigned int filter_envelope = 0; + IA_CSS_ENTER_PRIVATE("void"); + + assert(info != NULL); + assert(in_frame_info != NULL); + assert(out_frame_info != NULL); + assert(dvs_env != NULL); + assert(zoom != NULL); + assert(motion_vector != NULL); + assert(uds != NULL); + assert(sp_out_crop_pos != NULL); + x0 = zoom->zoom_region.origin.x; + y0 = zoom->zoom_region.origin.y; + x1 = zoom->zoom_region.resolution.width + x0; + y1 = zoom->zoom_region.resolution.height + y0; + + if ((x0 > x1) || (y0 > y1) || (x1 > pipe_in_res.width) || (y1 > pipe_in_res.height)) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + if (!enable_zoom) { + uds->curr_dx = HRT_GDC_N; + uds->curr_dy = HRT_GDC_N; + } + + if (info->enable.dvs_envelope) { + /* Zoom region is only supported by the UDS module on ISP + * 2 and higher. It is not supported in video mode on ISP 1 */ + return IA_CSS_ERR_INVALID_ARGUMENTS; + } else { + if (enable_zoom) { + /* A. Calculate dx/dy based on crop region using in_frame_info + * Scale the crop region if in_frame_info to the stage is not same as + * actual effective input of the pipeline + */ + if (in_frame_info->res.width != pipe_in_res.width || + in_frame_info->res.height != pipe_in_res.height) { + x0 = (x0 * in_frame_info->res.width) / (pipe_in_res.width); + y0 = (y0 * in_frame_info->res.height) / (pipe_in_res.height); + x1 = (x1 * in_frame_info->res.width) / (pipe_in_res.width); + y1 = (y1 * in_frame_info->res.height) / (pipe_in_res.height); + } + uds->curr_dx = + ((x1 - x0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.width; + uds->curr_dy = + ((y1 - y0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.height; + + /* B. Calculate xc/yc based on crop region */ + uds->xc = (uint16_t) x0 + (((x1)-(x0)) / 2); + uds->yc = (uint16_t) y0 + (((y1)-(y0)) / 2); + } else { + uds->xc = (uint16_t)in_frame_info->res.width / 2; + uds->yc = (uint16_t)in_frame_info->res.height / 2; + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "uds->curr_dx=%d, uds->xc=%d, uds->yc=%d\n", + uds->curr_dx, uds->xc, uds->yc); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x0=%d, y0=%d, x1=%d, y1=%d\n", + x0, y0, x1, y1); + sp_out_crop_pos->x = (uint16_t)info->pipeline.left_cropping; + sp_out_crop_pos->y = (uint16_t)info->pipeline.top_cropping; + } + IA_CSS_LEAVE_PRIVATE("void"); + return err; +} + +struct ia_css_3a_statistics * +ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) +{ + struct ia_css_3a_statistics *me; + int grid_size; + + IA_CSS_ENTER("grid=%p", grid); + + assert(grid != NULL); + + me = sh_css_calloc(1, sizeof(*me)); + if (!me) + goto err; + + me->grid = *grid; + grid_size = grid->width * grid->height; + me->data = sh_css_malloc(grid_size * sizeof(*me->data)); + if (!me->data) + goto err; +#if !defined(HAS_NO_HMEM) + /* No weighted histogram, no structure, treat the histogram data as a byte dump in a byte array */ + me->rgby_data = (struct ia_css_3a_rgby_output *)sh_css_malloc(sizeof_hmem(HMEM0_ID)); +#else + me->rgby_data = NULL; +#endif + + IA_CSS_LEAVE("return=%p", me); + return me; +err: + ia_css_3a_statistics_free(me); + + IA_CSS_LEAVE("return=%p", NULL); + return NULL; +} + +void +ia_css_3a_statistics_free(struct ia_css_3a_statistics *me) +{ + if (me) { + sh_css_free(me->rgby_data); + sh_css_free(me->data); + memset(me, 0, sizeof(struct ia_css_3a_statistics)); + sh_css_free(me); + } +} + +struct ia_css_dvs_statistics * +ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid) +{ + struct ia_css_dvs_statistics *me; + + assert(grid != NULL); + + me = sh_css_calloc(1, sizeof(*me)); + if (!me) + goto err; + + me->grid = *grid; + me->hor_proj = sh_css_malloc(grid->height * IA_CSS_DVS_NUM_COEF_TYPES * + sizeof(*me->hor_proj)); + if (!me->hor_proj) + goto err; + + me->ver_proj = sh_css_malloc(grid->width * IA_CSS_DVS_NUM_COEF_TYPES * + sizeof(*me->ver_proj)); + if (!me->ver_proj) + goto err; + + return me; +err: + ia_css_dvs_statistics_free(me); + return NULL; + +} + +void +ia_css_dvs_statistics_free(struct ia_css_dvs_statistics *me) +{ + if (me) { + sh_css_free(me->hor_proj); + sh_css_free(me->ver_proj); + memset(me, 0, sizeof(struct ia_css_dvs_statistics)); + sh_css_free(me); + } +} + +struct ia_css_dvs_coefficients * +ia_css_dvs_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) +{ + struct ia_css_dvs_coefficients *me; + + assert(grid != NULL); + + me = sh_css_calloc(1, sizeof(*me)); + if (!me) + goto err; + + me->grid = *grid; + + me->hor_coefs = sh_css_malloc(grid->num_hor_coefs * + IA_CSS_DVS_NUM_COEF_TYPES * + sizeof(*me->hor_coefs)); + if (!me->hor_coefs) + goto err; + + me->ver_coefs = sh_css_malloc(grid->num_ver_coefs * + IA_CSS_DVS_NUM_COEF_TYPES * + sizeof(*me->ver_coefs)); + if (!me->ver_coefs) + goto err; + + return me; +err: + ia_css_dvs_coefficients_free(me); + return NULL; +} + +void +ia_css_dvs_coefficients_free(struct ia_css_dvs_coefficients *me) +{ + if (me) { + sh_css_free(me->hor_coefs); + sh_css_free(me->ver_coefs); + memset(me, 0, sizeof(struct ia_css_dvs_coefficients)); + sh_css_free(me); + } +} + +struct ia_css_dvs2_statistics * +ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid) +{ + struct ia_css_dvs2_statistics *me; + + assert(grid != NULL); + + me = sh_css_calloc(1, sizeof(*me)); + if (!me) + goto err; + + me->grid = *grid; + + me->hor_prod.odd_real = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->hor_prod.odd_real)); + if (!me->hor_prod.odd_real) + goto err; + + me->hor_prod.odd_imag = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->hor_prod.odd_imag)); + if (!me->hor_prod.odd_imag) + goto err; + + me->hor_prod.even_real = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->hor_prod.even_real)); + if (!me->hor_prod.even_real) + goto err; + + me->hor_prod.even_imag = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->hor_prod.even_imag)); + if (!me->hor_prod.even_imag) + goto err; + + me->ver_prod.odd_real = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->ver_prod.odd_real)); + if (!me->ver_prod.odd_real) + goto err; + + me->ver_prod.odd_imag = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->ver_prod.odd_imag)); + if (!me->ver_prod.odd_imag) + goto err; + + me->ver_prod.even_real = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->ver_prod.even_real)); + if (!me->ver_prod.even_real) + goto err; + + me->ver_prod.even_imag = sh_css_malloc(grid->aligned_width * + grid->aligned_height * sizeof(*me->ver_prod.even_imag)); + if (!me->ver_prod.even_imag) + goto err; + + return me; +err: + ia_css_dvs2_statistics_free(me); + return NULL; + +} + +void +ia_css_dvs2_statistics_free(struct ia_css_dvs2_statistics *me) +{ + if (me) { + sh_css_free(me->hor_prod.odd_real); + sh_css_free(me->hor_prod.odd_imag); + sh_css_free(me->hor_prod.even_real); + sh_css_free(me->hor_prod.even_imag); + sh_css_free(me->ver_prod.odd_real); + sh_css_free(me->ver_prod.odd_imag); + sh_css_free(me->ver_prod.even_real); + sh_css_free(me->ver_prod.even_imag); + memset(me, 0, sizeof(struct ia_css_dvs2_statistics)); + sh_css_free(me); + } +} + + +struct ia_css_dvs2_coefficients * +ia_css_dvs2_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) +{ + struct ia_css_dvs2_coefficients *me; + + assert(grid != NULL); + + me = sh_css_calloc(1, sizeof(*me)); + if (!me) + goto err; + + me->grid = *grid; + + me->hor_coefs.odd_real = sh_css_malloc(grid->num_hor_coefs * + sizeof(*me->hor_coefs.odd_real)); + if (!me->hor_coefs.odd_real) + goto err; + + me->hor_coefs.odd_imag = sh_css_malloc(grid->num_hor_coefs * + sizeof(*me->hor_coefs.odd_imag)); + if (!me->hor_coefs.odd_imag) + goto err; + + me->hor_coefs.even_real = sh_css_malloc(grid->num_hor_coefs * + sizeof(*me->hor_coefs.even_real)); + if (!me->hor_coefs.even_real) + goto err; + + me->hor_coefs.even_imag = sh_css_malloc(grid->num_hor_coefs * + sizeof(*me->hor_coefs.even_imag)); + if (!me->hor_coefs.even_imag) + goto err; + + me->ver_coefs.odd_real = sh_css_malloc(grid->num_ver_coefs * + sizeof(*me->ver_coefs.odd_real)); + if (!me->ver_coefs.odd_real) + goto err; + + me->ver_coefs.odd_imag = sh_css_malloc(grid->num_ver_coefs * + sizeof(*me->ver_coefs.odd_imag)); + if (!me->ver_coefs.odd_imag) + goto err; + + me->ver_coefs.even_real = sh_css_malloc(grid->num_ver_coefs * + sizeof(*me->ver_coefs.even_real)); + if (!me->ver_coefs.even_real) + goto err; + + me->ver_coefs.even_imag = sh_css_malloc(grid->num_ver_coefs * + sizeof(*me->ver_coefs.even_imag)); + if (!me->ver_coefs.even_imag) + goto err; + + return me; +err: + ia_css_dvs2_coefficients_free(me); + return NULL; +} + +void +ia_css_dvs2_coefficients_free(struct ia_css_dvs2_coefficients *me) +{ + if (me) { + sh_css_free(me->hor_coefs.odd_real); + sh_css_free(me->hor_coefs.odd_imag); + sh_css_free(me->hor_coefs.even_real); + sh_css_free(me->hor_coefs.even_imag); + sh_css_free(me->ver_coefs.odd_real); + sh_css_free(me->ver_coefs.odd_imag); + sh_css_free(me->ver_coefs.even_real); + sh_css_free(me->ver_coefs.even_imag); + memset(me, 0, sizeof(struct ia_css_dvs2_coefficients)); + sh_css_free(me); + } +} + +struct ia_css_dvs_6axis_config * +ia_css_dvs2_6axis_config_allocate(const struct ia_css_stream *stream) +{ + struct ia_css_dvs_6axis_config *dvs_config = NULL; + struct ia_css_isp_parameters *params = NULL; + unsigned int width_y; + unsigned int height_y; + unsigned int width_uv; + unsigned int height_uv; + + assert(stream != NULL); + params = stream->isp_params_configs; + + /* Backward compatibility by default consider pipe as Video*/ + if (!params || (params && !params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO])) { + goto err; + } + + dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_calloc(1, sizeof(struct ia_css_dvs_6axis_config)); + if (!dvs_config) + goto err; + + dvs_config->width_y = width_y = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_y; + dvs_config->height_y = height_y = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_y; + dvs_config->width_uv = width_uv = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_uv; + dvs_config->height_uv = height_uv = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_uv; + IA_CSS_LOG("table Y: W %d H %d", width_y, height_y); + IA_CSS_LOG("table UV: W %d H %d", width_uv, height_uv); + dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + if (!dvs_config->xcoords_y) + goto err; + + dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + if (!dvs_config->ycoords_y) + goto err; + + dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + if (!dvs_config->xcoords_uv) + goto err; + + dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + if (!dvs_config->ycoords_uv) + goto err; + + return dvs_config; +err: + ia_css_dvs2_6axis_config_free(dvs_config); + return NULL; +} + +void +ia_css_dvs2_6axis_config_free(struct ia_css_dvs_6axis_config *dvs_6axis_config) +{ + if (dvs_6axis_config) { + sh_css_free(dvs_6axis_config->xcoords_y); + sh_css_free(dvs_6axis_config->ycoords_y); + sh_css_free(dvs_6axis_config->xcoords_uv); + sh_css_free(dvs_6axis_config->ycoords_uv); + memset(dvs_6axis_config, 0, sizeof(struct ia_css_dvs_6axis_config)); + sh_css_free(dvs_6axis_config); + } +} + +void +ia_css_en_dz_capt_pipe(struct ia_css_stream *stream, bool enable) +{ + struct ia_css_pipe *pipe; + struct ia_css_pipeline *pipeline; + struct ia_css_pipeline_stage *stage; + enum ia_css_pipe_id pipe_id; + enum ia_css_err err; + int i; + + if (stream == NULL) + return; + + for (i = 0; i < stream->num_pipes; i++) { + pipe = stream->pipes[i]; + pipeline = ia_css_pipe_get_pipeline(pipe); + pipe_id = pipeline->pipe_id; + + if (pipe_id == IA_CSS_PIPE_ID_CAPTURE) { + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, &stage); + if (err == IA_CSS_SUCCESS) + stage->enable_zoom = enable; + break; + } + } +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h new file mode 100644 index 0000000000000..270ec2b60a3ed --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h @@ -0,0 +1,188 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_PARAMS_H_ +#define _SH_CSS_PARAMS_H_ + +/*! \file */ + +/* Forward declaration to break mutual dependency */ +struct ia_css_isp_parameters; + +#include +#include "ia_css_types.h" +#include "ia_css_binary.h" +#include "sh_css_legacy.h" + +#include "sh_css_defs.h" /* SH_CSS_MAX_STAGES */ +#include "ia_css_pipeline.h" +#include "ia_css_isp_params.h" +#include "uds/uds_1.0/ia_css_uds_param.h" +#include "crop/crop_1.0/ia_css_crop_types.h" + + +#define PIX_SHIFT_FILTER_RUN_IN_X 12 +#define PIX_SHIFT_FILTER_RUN_IN_Y 12 + +#include "ob/ob_1.0/ia_css_ob_param.h" +/* Isp configurations per stream */ +struct sh_css_isp_param_configs { + /* OB (Optical Black) */ + struct sh_css_isp_ob_stream_config ob; +}; + + +/* Isp parameters per stream */ +struct ia_css_isp_parameters { + /* UDS */ + struct sh_css_sp_uds_params uds[SH_CSS_MAX_STAGES]; + struct sh_css_isp_param_configs stream_configs; + struct ia_css_fpn_table fpn_config; + struct ia_css_vector motion_config; + const struct ia_css_morph_table *morph_table; + const struct ia_css_shading_table *sc_table; + struct ia_css_shading_table *sc_config; + struct ia_css_macc_table macc_table; + struct ia_css_gamma_table gc_table; + struct ia_css_ctc_table ctc_table; + struct ia_css_xnr_table xnr_table; + + struct ia_css_dz_config dz_config; + struct ia_css_3a_config s3a_config; + struct ia_css_wb_config wb_config; + struct ia_css_cc_config cc_config; + struct ia_css_cc_config yuv2rgb_cc_config; + struct ia_css_cc_config rgb2yuv_cc_config; + struct ia_css_tnr_config tnr_config; + struct ia_css_ob_config ob_config; + /*----- DPC configuration -----*/ + /* The default DPC configuration is retained and currently set + * using the stream configuration. The code generated from genparams + * uses this configuration to set the DPC parameters per stage but this + * will be overwritten by the per pipe configuration */ + struct ia_css_dp_config dp_config; + /* ------ pipe specific DPC configuration ------ */ + /* Please note that this implementation is a temporary solution and + * should be replaced by CSS per pipe configuration when the support + * is ready (HSD 1303967698)*/ + struct ia_css_dp_config pipe_dp_config[IA_CSS_PIPE_ID_NUM]; + struct ia_css_nr_config nr_config; + struct ia_css_ee_config ee_config; + struct ia_css_de_config de_config; + struct ia_css_gc_config gc_config; + struct ia_css_anr_config anr_config; + struct ia_css_ce_config ce_config; + struct ia_css_formats_config formats_config; +/* ---- deprecated: replaced with pipe_dvs_6axis_config---- */ + struct ia_css_dvs_6axis_config *dvs_6axis_config; + struct ia_css_ecd_config ecd_config; + struct ia_css_ynr_config ynr_config; + struct ia_css_yee_config yee_config; + struct ia_css_fc_config fc_config; + struct ia_css_cnr_config cnr_config; + struct ia_css_macc_config macc_config; + struct ia_css_ctc_config ctc_config; + struct ia_css_aa_config aa_config; + struct ia_css_aa_config bds_config; + struct ia_css_aa_config raa_config; + struct ia_css_rgb_gamma_table r_gamma_table; + struct ia_css_rgb_gamma_table g_gamma_table; + struct ia_css_rgb_gamma_table b_gamma_table; + struct ia_css_anr_thres anr_thres; + struct ia_css_xnr_config xnr_config; + struct ia_css_xnr3_config xnr3_config; + struct ia_css_uds_config uds_config; + struct ia_css_crop_config crop_config; + struct ia_css_output_config output_config; + struct ia_css_dvs_6axis_config *pipe_dvs_6axis_config[IA_CSS_PIPE_ID_NUM]; +/* ------ deprecated(bz675) : from ------ */ + struct ia_css_shading_settings shading_settings; +/* ------ deprecated(bz675) : to ------ */ + struct ia_css_dvs_coefficients dvs_coefs; + struct ia_css_dvs2_coefficients dvs2_coefs; + + bool isp_params_changed; + bool isp_mem_params_changed + [IA_CSS_PIPE_ID_NUM][SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; + bool dz_config_changed; + bool motion_config_changed; + bool dis_coef_table_changed; + bool dvs2_coef_table_changed; + bool morph_table_changed; + bool sc_table_changed; + bool sc_table_dirty; + unsigned int sc_table_last_pipe_num; + bool anr_thres_changed; +/* ---- deprecated: replaced with pipe_dvs_6axis_config_changed ---- */ + bool dvs_6axis_config_changed; + /* ------ pipe specific DPC configuration ------ */ + /* Please note that this implementation is a temporary solution and + * should be replaced by CSS per pipe configuration when the support + * is ready (HSD 1303967698) */ + bool pipe_dpc_config_changed[IA_CSS_PIPE_ID_NUM]; +/* ------ deprecated(bz675) : from ------ */ + bool shading_settings_changed; +/* ------ deprecated(bz675) : to ------ */ + bool pipe_dvs_6axis_config_changed[IA_CSS_PIPE_ID_NUM]; + + bool config_changed[IA_CSS_NUM_PARAMETER_IDS]; + + unsigned int sensor_binning; + /* local buffers, used to re-order the 3a statistics in vmem-format */ + struct sh_css_ddr_address_map pipe_ddr_ptrs[IA_CSS_PIPE_ID_NUM]; + struct sh_css_ddr_address_map_size pipe_ddr_ptrs_size[IA_CSS_PIPE_ID_NUM]; + struct sh_css_ddr_address_map ddr_ptrs; + struct sh_css_ddr_address_map_size ddr_ptrs_size; + struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ + uint32_t isp_parameters_id; /** Unique ID to track which config was actually applied to a particular frame */ +}; + +void +ia_css_params_store_ia_css_host_data( + hrt_vaddress ddr_addr, + struct ia_css_host_data *data); + +enum ia_css_err +ia_css_params_store_sctbl( + const struct ia_css_pipeline_stage *stage, + hrt_vaddress ddr_addr, + const struct ia_css_shading_table *shading_table); + +struct ia_css_host_data * +ia_css_params_alloc_convert_sctbl( + const struct ia_css_pipeline_stage *stage, + const struct ia_css_shading_table *shading_table); + +struct ia_css_isp_config * +sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe); + +/* ipu address allocation/free for gdc lut */ +hrt_vaddress +sh_css_params_alloc_gdc_lut(void); +void +sh_css_params_free_gdc_lut(hrt_vaddress addr); + +enum ia_css_err +sh_css_params_map_and_store_default_gdc_lut(void); + +void +sh_css_params_free_default_gdc_lut(void); + +hrt_vaddress +sh_css_params_get_default_gdc_lut(void); + +hrt_vaddress +sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe); + +#endif /* _SH_CSS_PARAMS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params_internal.h new file mode 100644 index 0000000000000..baca24532f9ff --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params_internal.h @@ -0,0 +1,21 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_PARAMS_INTERNAL_H_ +#define _SH_CSS_PARAMS_INTERNAL_H_ + +void +sh_css_param_clear_param_sets(void); + +#endif /* _SH_CSS_PARAMS_INTERNAL_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_pipe.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_pipe.c new file mode 100644 index 0000000000000..1f57ffad89214 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_pipe.c @@ -0,0 +1,16 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* This file will contain the code to implement the functions declared in ia_css_pipe.h and ia_css_pipe_public.h + and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c new file mode 100644 index 0000000000000..ad46996cfbd34 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c @@ -0,0 +1,43 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_properties.h" +#include +#include "ia_css_types.h" +#include "gdc_device.h" + +void +ia_css_get_properties(struct ia_css_properties *properties) +{ + assert(properties != NULL); +#if defined(HAS_GDC_VERSION_2) || defined(HAS_GDC_VERSION_3) +/* + * MW: We don't want to store the coordinates + * full range in memory: Truncate + */ + properties->gdc_coord_one = gdc_get_unity(GDC0_ID)/HRT_GDC_COORD_SCALE; +#else +#error "Unknown GDC version" +#endif + + properties->l1_base_is_index = true; + +#if defined(HAS_VAMEM_VERSION_1) + properties->vamem_type = IA_CSS_VAMEM_TYPE_1; +#elif defined(HAS_VAMEM_VERSION_2) + properties->vamem_type = IA_CSS_VAMEM_TYPE_2; +#else +#error "Unknown VAMEM version" +#endif +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_shading.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_shading.c new file mode 100644 index 0000000000000..2a2d0f4db44b0 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_shading.c @@ -0,0 +1,16 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* This file will contain the code to implement the functions declared in ia_css_shading.h + and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c new file mode 100644 index 0000000000000..cdbe914787c88 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c @@ -0,0 +1,1799 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "sh_css_sp.h" + +#if !defined(HAS_NO_INPUT_FORMATTER) +#include "input_formatter.h" +#endif + +#include "dma.h" /* N_DMA_CHANNEL_ID */ + +#include "ia_css_buffer.h" +#include "ia_css_binary.h" +#include "sh_css_hrt.h" +#include "sh_css_defs.h" +#include "sh_css_internal.h" +#include "ia_css_control.h" +#include "ia_css_debug.h" +#include "ia_css_debug_pipe.h" +#include "ia_css_event_public.h" +#include "ia_css_mmu.h" +#include "ia_css_stream.h" +#include "ia_css_isp_param.h" +#include "sh_css_params.h" +#include "sh_css_legacy.h" +#include "ia_css_frame_comm.h" +#if !defined(HAS_NO_INPUT_SYSTEM) +#include "ia_css_isys.h" +#endif + +#include "gdc_device.h" /* HRT_GDC_N */ + +/*#include "sp.h"*/ /* host2sp_enqueue_frame_data() */ + +#include "memory_access.h" + +#include "assert_support.h" +#include "platform_support.h" /* hrt_sleep() */ + +#include "sw_event_global.h" /* Event IDs.*/ +#include "ia_css_event.h" +#include "mmu_device.h" +#include "ia_css_spctrl.h" + +#ifndef offsetof +#define offsetof(T, x) ((unsigned)&(((T *)0)->x)) +#endif + +#define IA_CSS_INCLUDE_CONFIGURATIONS +#include "ia_css_isp_configs.h" +#define IA_CSS_INCLUDE_STATES +#include "ia_css_isp_states.h" + +#ifndef ISP2401 +#include "isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h" +#else +#include "isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h" +#endif + +struct sh_css_sp_group sh_css_sp_group; +struct sh_css_sp_stage sh_css_sp_stage; +struct sh_css_isp_stage sh_css_isp_stage; +static struct sh_css_sp_output sh_css_sp_output; +static struct sh_css_sp_per_frame_data per_frame_data; + +/* true if SP supports frame loop and host2sp_commands */ +/* For the moment there is only code that sets this bool to true */ +/* TODO: add code that sets this bool to false */ +static bool sp_running; + +static enum ia_css_err +set_output_frame_buffer(const struct ia_css_frame *frame, + unsigned idx); + +static void +sh_css_copy_buffer_attr_to_spbuffer(struct ia_css_buffer_sp *dest_buf, + const enum sh_css_queue_id queue_id, + const hrt_vaddress xmem_addr, + const enum ia_css_buffer_type buf_type); + +static void +initialize_frame_buffer_attribute(struct ia_css_buffer_sp *buf_attr); + +static void +initialize_stage_frames(struct ia_css_frames_sp *frames); + +/* This data is stored every frame */ +void +store_sp_group_data(void) +{ + per_frame_data.sp_group_addr = sh_css_store_sp_group_to_ddr(); +} + +static void +copy_isp_stage_to_sp_stage(void) +{ + /* [WW07.5]type casting will cause potential issues */ + sh_css_sp_stage.num_stripes = (uint8_t) sh_css_isp_stage.binary_info.iterator.num_stripes; + sh_css_sp_stage.row_stripes_height = (uint16_t) sh_css_isp_stage.binary_info.iterator.row_stripes_height; + sh_css_sp_stage.row_stripes_overlap_lines = (uint16_t) sh_css_isp_stage.binary_info.iterator.row_stripes_overlap_lines; + sh_css_sp_stage.top_cropping = (uint16_t) sh_css_isp_stage.binary_info.pipeline.top_cropping; + /* moved to sh_css_sp_init_stage + sh_css_sp_stage.enable.vf_output = + sh_css_isp_stage.binary_info.enable.vf_veceven || + sh_css_isp_stage.binary_info.num_output_pins > 1; + */ + sh_css_sp_stage.enable.sdis = sh_css_isp_stage.binary_info.enable.dis; + sh_css_sp_stage.enable.s3a = sh_css_isp_stage.binary_info.enable.s3a; +#ifdef ISP2401 + sh_css_sp_stage.enable.lace_stats = sh_css_isp_stage.binary_info.enable.lace_stats; +#endif +} + +void +store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned stage) +{ + unsigned int thread_id; + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + copy_isp_stage_to_sp_stage(); + if (id != IA_CSS_PIPE_ID_COPY) + sh_css_sp_stage.isp_stage_addr = + sh_css_store_isp_stage_to_ddr(pipe_num, stage); + sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = + sh_css_store_sp_stage_to_ddr(pipe_num, stage); + + /* Clear for next frame */ + sh_css_sp_stage.program_input_circuit = false; +} + +static void +store_sp_per_frame_data(const struct ia_css_fw_info *fw) +{ + unsigned int HIVE_ADDR_sp_per_frame_data = 0; + + assert(fw != NULL); + + switch (fw->type) { + case ia_css_sp_firmware: + HIVE_ADDR_sp_per_frame_data = fw->info.sp.per_frame_data; + break; + case ia_css_acc_firmware: + HIVE_ADDR_sp_per_frame_data = fw->info.acc.per_frame_data; + break; + case ia_css_isp_firmware: + return; + } + + sp_dmem_store(SP0_ID, + (unsigned int)sp_address_of(sp_per_frame_data), + &per_frame_data, + sizeof(per_frame_data)); +} + +static void +sh_css_store_sp_per_frame_data(enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + const struct ia_css_fw_info *sp_fw) +{ + if (!sp_fw) + sp_fw = &sh_css_sp_fw; + + store_sp_stage_data(pipe_id, pipe_num, 0); + store_sp_group_data(); + store_sp_per_frame_data(sp_fw); +} + +#if SP_DEBUG != SP_DEBUG_NONE + +void +sh_css_sp_get_debug_state(struct sh_css_sp_debug_state *state) +{ + const struct ia_css_fw_info *fw = &sh_css_sp_fw; + unsigned int HIVE_ADDR_sp_output = fw->info.sp.output; + unsigned i; + unsigned offset = (unsigned int)offsetof(struct sh_css_sp_output, debug)/sizeof(int); + + assert(state != NULL); + + (void)HIVE_ADDR_sp_output; /* To get rid of warning in CRUN */ + for (i = 0; i < sizeof(*state)/sizeof(int); i++) + ((unsigned *)state)[i] = load_sp_array_uint(sp_output, i+offset); +} + +#endif + +void +sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_frame, + unsigned two_ppc) +{ + enum ia_css_pipe_id pipe_id; + unsigned int thread_id; + struct sh_css_sp_pipeline *pipe; + uint8_t stage_num = 0; + + assert(out_frame != NULL); + pipe_id = IA_CSS_PIPE_ID_CAPTURE; + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + pipe = &sh_css_sp_group.pipe[thread_id]; + + pipe->copy.bin.bytes_available = out_frame->data_bytes; + pipe->num_stages = 1; + pipe->pipe_id = pipe_id; + pipe->pipe_num = pipe_num; + pipe->thread_id = thread_id; + pipe->pipe_config = 0x0; /* No parameters */ + pipe->pipe_qos_config = QOS_INVALID; + + if (pipe->inout_port_config == 0) { + SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + } + IA_CSS_LOG("pipe_id %d port_config %08x", + pipe->pipe_id, pipe->inout_port_config); + +#if !defined(HAS_NO_INPUT_FORMATTER) + sh_css_sp_group.config.input_formatter.isp_2ppc = (uint8_t)two_ppc; +#else + (void)two_ppc; +#endif + + sh_css_sp_stage.num = stage_num; + sh_css_sp_stage.stage_type = SH_CSS_SP_STAGE_TYPE; + sh_css_sp_stage.func = + (unsigned int)IA_CSS_PIPELINE_BIN_COPY; + + set_output_frame_buffer(out_frame, 0); + + /* sp_bin_copy_init on the SP does not deal with dynamica/static yet */ + /* For now always update the dynamic data from out frames. */ + sh_css_store_sp_per_frame_data(pipe_id, pipe_num, &sh_css_sp_fw); +} + +static void +sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, + unsigned pipe_num, + unsigned two_ppc, + unsigned max_input_width, + enum sh_css_pipe_config_override pipe_conf_override, + unsigned int if_config_index) +{ + enum ia_css_pipe_id pipe_id; + unsigned int thread_id; + uint8_t stage_num = 0; + struct sh_css_sp_pipeline *pipe; + + assert(out_frame != NULL); + + { + /* + * Clear sh_css_sp_stage for easy debugging. + * program_input_circuit must be saved as it is set outside + * this function. + */ + uint8_t program_input_circuit; + program_input_circuit = sh_css_sp_stage.program_input_circuit; + memset(&sh_css_sp_stage, 0, sizeof(sh_css_sp_stage)); + sh_css_sp_stage.program_input_circuit = program_input_circuit; + } + + pipe_id = IA_CSS_PIPE_ID_COPY; + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + pipe = &sh_css_sp_group.pipe[thread_id]; + + pipe->copy.raw.height = out_frame->info.res.height; + pipe->copy.raw.width = out_frame->info.res.width; + pipe->copy.raw.padded_width = out_frame->info.padded_width; + pipe->copy.raw.raw_bit_depth = out_frame->info.raw_bit_depth; + pipe->copy.raw.max_input_width = max_input_width; + pipe->num_stages = 1; + pipe->pipe_id = pipe_id; + /* TODO: next indicates from which queues parameters need to be + sampled, needs checking/improvement */ + if (pipe_conf_override == SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD) + pipe->pipe_config = + (SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id); + else + pipe->pipe_config = pipe_conf_override; + + pipe->pipe_qos_config = QOS_INVALID; + + if (pipe->inout_port_config == 0) { + SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + } + IA_CSS_LOG("pipe_id %d port_config %08x", + pipe->pipe_id, pipe->inout_port_config); + +#if !defined(HAS_NO_INPUT_FORMATTER) + sh_css_sp_group.config.input_formatter.isp_2ppc = (uint8_t)two_ppc; +#else + (void)two_ppc; +#endif + + sh_css_sp_stage.num = stage_num; + sh_css_sp_stage.xmem_bin_addr = 0x0; + sh_css_sp_stage.stage_type = SH_CSS_SP_STAGE_TYPE; + sh_css_sp_stage.func = (unsigned int)IA_CSS_PIPELINE_RAW_COPY; + sh_css_sp_stage.if_config_index = (uint8_t) if_config_index; + set_output_frame_buffer(out_frame, 0); + + ia_css_debug_pipe_graph_dump_sp_raw_copy(out_frame); +} + +static void +sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, + unsigned pipe_num, unsigned max_input_width, unsigned int if_config_index) +{ + enum ia_css_pipe_id pipe_id; + unsigned int thread_id; + uint8_t stage_num = 0; + struct sh_css_sp_pipeline *pipe; +#if defined SH_CSS_ENABLE_METADATA + enum sh_css_queue_id queue_id; +#endif + + assert(out_frame != NULL); + + { + /* + * Clear sh_css_sp_stage for easy debugging. + * program_input_circuit must be saved as it is set outside + * this function. + */ + uint8_t program_input_circuit; + program_input_circuit = sh_css_sp_stage.program_input_circuit; + memset(&sh_css_sp_stage, 0, sizeof(sh_css_sp_stage)); + sh_css_sp_stage.program_input_circuit = program_input_circuit; + } + + pipe_id = IA_CSS_PIPE_ID_COPY; + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + pipe = &sh_css_sp_group.pipe[thread_id]; + + pipe->copy.raw.height = out_frame->info.res.height; + pipe->copy.raw.width = out_frame->info.res.width; + pipe->copy.raw.padded_width = out_frame->info.padded_width; + pipe->copy.raw.raw_bit_depth = out_frame->info.raw_bit_depth; + pipe->copy.raw.max_input_width = max_input_width; + pipe->num_stages = 1; + pipe->pipe_id = pipe_id; + pipe->pipe_config = 0x0; /* No parameters */ + pipe->pipe_qos_config = QOS_INVALID; + + initialize_stage_frames(&sh_css_sp_stage.frames); + sh_css_sp_stage.num = stage_num; + sh_css_sp_stage.xmem_bin_addr = 0x0; + sh_css_sp_stage.stage_type = SH_CSS_SP_STAGE_TYPE; + sh_css_sp_stage.func = (unsigned int)IA_CSS_PIPELINE_ISYS_COPY; + sh_css_sp_stage.if_config_index = (uint8_t) if_config_index; + + set_output_frame_buffer(out_frame, 0); + +#if defined SH_CSS_ENABLE_METADATA + if (pipe->metadata.height > 0) { + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); + sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.metadata_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_METADATA); + } +#endif + + ia_css_debug_pipe_graph_dump_sp_raw_copy(out_frame); +} + +unsigned int +sh_css_sp_get_binary_copy_size(void) +{ + const struct ia_css_fw_info *fw = &sh_css_sp_fw; + unsigned int HIVE_ADDR_sp_output = fw->info.sp.output; + unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, + bin_copy_bytes_copied) / sizeof(int); + (void)HIVE_ADDR_sp_output; /* To get rid of warning in CRUN */ + return load_sp_array_uint(sp_output, offset); +} + +unsigned int +sh_css_sp_get_sw_interrupt_value(unsigned int irq) +{ + const struct ia_css_fw_info *fw = &sh_css_sp_fw; + unsigned int HIVE_ADDR_sp_output = fw->info.sp.output; + unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, sw_interrupt_value) + / sizeof(int); + (void)HIVE_ADDR_sp_output; /* To get rid of warning in CRUN */ + return load_sp_array_uint(sp_output, offset+irq); +} + +static void +sh_css_copy_buffer_attr_to_spbuffer(struct ia_css_buffer_sp *dest_buf, + const enum sh_css_queue_id queue_id, + const hrt_vaddress xmem_addr, + const enum ia_css_buffer_type buf_type) +{ + assert(buf_type < IA_CSS_NUM_BUFFER_TYPE); + if (queue_id > SH_CSS_INVALID_QUEUE_ID) { + /* + * value >=0 indicates that function init_frame_pointers() + * should use the dynamic data address + */ + assert(queue_id < SH_CSS_MAX_NUM_QUEUES); + + /* Klocwork assumes assert can be disabled; + Since we can get there with any type, and it does not + know that frame_in->dynamic_data_index can only be set + for one of the types in the assert) it has to assume we + can get here for any type. however this could lead to an + out of bounds reference when indexing buf_type about 10 + lines below. In order to satisfy KW an additional if + has been added. This one will always yield true. + */ + if ((queue_id < SH_CSS_MAX_NUM_QUEUES)) + { + dest_buf->buf_src.queue_id = queue_id; + } + } else { + assert(xmem_addr != mmgr_EXCEPTION); + dest_buf->buf_src.xmem_addr = xmem_addr; + } + dest_buf->buf_type = buf_type; +} + +static void +sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, + const struct ia_css_frame *frame_in) +{ + assert(frame_in != NULL); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_copy_frame_to_spframe():\n"); + + + sh_css_copy_buffer_attr_to_spbuffer(&sp_frame_out->buf_attr, + frame_in->dynamic_queue_id, + frame_in->data, + frame_in->buf_type); + + ia_css_frame_info_to_frame_sp_info(&sp_frame_out->info, &frame_in->info); + + switch (frame_in->info.format) { + case IA_CSS_FRAME_FORMAT_RAW_PACKED: + case IA_CSS_FRAME_FORMAT_RAW: + sp_frame_out->planes.raw.offset = frame_in->planes.raw.offset; + break; + case IA_CSS_FRAME_FORMAT_RGB565: + case IA_CSS_FRAME_FORMAT_RGBA888: + sp_frame_out->planes.rgb.offset = frame_in->planes.rgb.offset; + break; + case IA_CSS_FRAME_FORMAT_PLANAR_RGB888: + sp_frame_out->planes.planar_rgb.r.offset = + frame_in->planes.planar_rgb.r.offset; + sp_frame_out->planes.planar_rgb.g.offset = + frame_in->planes.planar_rgb.g.offset; + sp_frame_out->planes.planar_rgb.b.offset = + frame_in->planes.planar_rgb.b.offset; + break; + case IA_CSS_FRAME_FORMAT_YUYV: + case IA_CSS_FRAME_FORMAT_UYVY: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: + case IA_CSS_FRAME_FORMAT_YUV_LINE: + sp_frame_out->planes.yuyv.offset = frame_in->planes.yuyv.offset; + break; + case IA_CSS_FRAME_FORMAT_NV11: + case IA_CSS_FRAME_FORMAT_NV12: + case IA_CSS_FRAME_FORMAT_NV12_16: + case IA_CSS_FRAME_FORMAT_NV12_TILEY: + case IA_CSS_FRAME_FORMAT_NV21: + case IA_CSS_FRAME_FORMAT_NV16: + case IA_CSS_FRAME_FORMAT_NV61: + sp_frame_out->planes.nv.y.offset = + frame_in->planes.nv.y.offset; + sp_frame_out->planes.nv.uv.offset = + frame_in->planes.nv.uv.offset; + break; + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_YUV422: + case IA_CSS_FRAME_FORMAT_YUV444: + case IA_CSS_FRAME_FORMAT_YUV420_16: + case IA_CSS_FRAME_FORMAT_YUV422_16: + case IA_CSS_FRAME_FORMAT_YV12: + case IA_CSS_FRAME_FORMAT_YV16: + sp_frame_out->planes.yuv.y.offset = + frame_in->planes.yuv.y.offset; + sp_frame_out->planes.yuv.u.offset = + frame_in->planes.yuv.u.offset; + sp_frame_out->planes.yuv.v.offset = + frame_in->planes.yuv.v.offset; + break; + case IA_CSS_FRAME_FORMAT_QPLANE6: + sp_frame_out->planes.plane6.r.offset = + frame_in->planes.plane6.r.offset; + sp_frame_out->planes.plane6.r_at_b.offset = + frame_in->planes.plane6.r_at_b.offset; + sp_frame_out->planes.plane6.gr.offset = + frame_in->planes.plane6.gr.offset; + sp_frame_out->planes.plane6.gb.offset = + frame_in->planes.plane6.gb.offset; + sp_frame_out->planes.plane6.b.offset = + frame_in->planes.plane6.b.offset; + sp_frame_out->planes.plane6.b_at_r.offset = + frame_in->planes.plane6.b_at_r.offset; + break; + case IA_CSS_FRAME_FORMAT_BINARY_8: + sp_frame_out->planes.binary.data.offset = + frame_in->planes.binary.data.offset; + break; + default: + /* This should not happen, but in case it does, + * nullify the planes + */ + memset(&sp_frame_out->planes, 0, sizeof(sp_frame_out->planes)); + break; + } + +} + +static enum ia_css_err +set_input_frame_buffer(const struct ia_css_frame *frame) +{ + if (frame == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + switch (frame->info.format) { + case IA_CSS_FRAME_FORMAT_QPLANE6: + case IA_CSS_FRAME_FORMAT_YUV420_16: + case IA_CSS_FRAME_FORMAT_RAW_PACKED: + case IA_CSS_FRAME_FORMAT_RAW: + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_YUYV: + case IA_CSS_FRAME_FORMAT_YUV_LINE: + case IA_CSS_FRAME_FORMAT_NV12: + case IA_CSS_FRAME_FORMAT_NV12_16: + case IA_CSS_FRAME_FORMAT_NV12_TILEY: + case IA_CSS_FRAME_FORMAT_NV21: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10: + break; + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + sh_css_copy_frame_to_spframe(&sh_css_sp_stage.frames.in, frame); + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +set_output_frame_buffer(const struct ia_css_frame *frame, + unsigned idx) +{ + if (frame == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + switch (frame->info.format) { + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_YUV422: + case IA_CSS_FRAME_FORMAT_YUV444: + case IA_CSS_FRAME_FORMAT_YV12: + case IA_CSS_FRAME_FORMAT_YV16: + case IA_CSS_FRAME_FORMAT_YUV420_16: + case IA_CSS_FRAME_FORMAT_YUV422_16: + case IA_CSS_FRAME_FORMAT_NV11: + case IA_CSS_FRAME_FORMAT_NV12: + case IA_CSS_FRAME_FORMAT_NV12_16: + case IA_CSS_FRAME_FORMAT_NV12_TILEY: + case IA_CSS_FRAME_FORMAT_NV16: + case IA_CSS_FRAME_FORMAT_NV21: + case IA_CSS_FRAME_FORMAT_NV61: + case IA_CSS_FRAME_FORMAT_YUYV: + case IA_CSS_FRAME_FORMAT_UYVY: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: + case IA_CSS_FRAME_FORMAT_YUV_LINE: + case IA_CSS_FRAME_FORMAT_RGB565: + case IA_CSS_FRAME_FORMAT_RGBA888: + case IA_CSS_FRAME_FORMAT_PLANAR_RGB888: + case IA_CSS_FRAME_FORMAT_RAW: + case IA_CSS_FRAME_FORMAT_RAW_PACKED: + case IA_CSS_FRAME_FORMAT_QPLANE6: + case IA_CSS_FRAME_FORMAT_BINARY_8: + break; + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + sh_css_copy_frame_to_spframe(&sh_css_sp_stage.frames.out[idx], frame); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +set_view_finder_buffer(const struct ia_css_frame *frame) +{ + if (frame == NULL) + return IA_CSS_ERR_INVALID_ARGUMENTS; + + switch (frame->info.format) { + /* the dual output pin */ + case IA_CSS_FRAME_FORMAT_NV12: + case IA_CSS_FRAME_FORMAT_NV12_16: + case IA_CSS_FRAME_FORMAT_NV21: + case IA_CSS_FRAME_FORMAT_YUYV: + case IA_CSS_FRAME_FORMAT_UYVY: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: + case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_YV12: + case IA_CSS_FRAME_FORMAT_NV12_TILEY: + + /* for vf_veceven */ + case IA_CSS_FRAME_FORMAT_YUV_LINE: + break; + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + sh_css_copy_frame_to_spframe(&sh_css_sp_stage.frames.out_vf, frame); + return IA_CSS_SUCCESS; +} + +#if !defined(HAS_NO_INPUT_FORMATTER) +void sh_css_sp_set_if_configs( + const input_formatter_cfg_t *config_a, + const input_formatter_cfg_t *config_b, + const uint8_t if_config_index + ) +{ + assert(if_config_index < SH_CSS_MAX_IF_CONFIGS); + assert(config_a != NULL); + + sh_css_sp_group.config.input_formatter.set[if_config_index].config_a = *config_a; + sh_css_sp_group.config.input_formatter.a_changed = true; + + if (config_b != NULL) { + sh_css_sp_group.config.input_formatter.set[if_config_index].config_b = *config_b; + sh_css_sp_group.config.input_formatter.b_changed = true; + } + + return; +} +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) +void +sh_css_sp_program_input_circuit(int fmt_type, + int ch_id, + enum ia_css_input_mode input_mode) +{ + sh_css_sp_group.config.input_circuit.no_side_band = false; + sh_css_sp_group.config.input_circuit.fmt_type = fmt_type; + sh_css_sp_group.config.input_circuit.ch_id = ch_id; + sh_css_sp_group.config.input_circuit.input_mode = input_mode; +/* + * The SP group is only loaded at SP boot time and is read once + * change flags as "input_circuit_cfg_changed" must be reset on the SP + */ + sh_css_sp_group.config.input_circuit_cfg_changed = true; + sh_css_sp_stage.program_input_circuit = true; +} +#endif + +#if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) +void +sh_css_sp_configure_sync_gen(int width, int height, + int hblank_cycles, + int vblank_cycles) +{ + sh_css_sp_group.config.sync_gen.width = width; + sh_css_sp_group.config.sync_gen.height = height; + sh_css_sp_group.config.sync_gen.hblank_cycles = hblank_cycles; + sh_css_sp_group.config.sync_gen.vblank_cycles = vblank_cycles; +} + +void +sh_css_sp_configure_tpg(int x_mask, + int y_mask, + int x_delta, + int y_delta, + int xy_mask) +{ + sh_css_sp_group.config.tpg.x_mask = x_mask; + sh_css_sp_group.config.tpg.y_mask = y_mask; + sh_css_sp_group.config.tpg.x_delta = x_delta; + sh_css_sp_group.config.tpg.y_delta = y_delta; + sh_css_sp_group.config.tpg.xy_mask = xy_mask; +} + +void +sh_css_sp_configure_prbs(int seed) +{ + sh_css_sp_group.config.prbs.seed = seed; +} +#endif + +void +sh_css_sp_configure_enable_raw_pool_locking(bool lock_all) +{ + sh_css_sp_group.config.enable_raw_pool_locking = true; + sh_css_sp_group.config.lock_all = lock_all; +} + +void +sh_css_sp_enable_isys_event_queue(bool enable) +{ +#if !defined(HAS_NO_INPUT_SYSTEM) + sh_css_sp_group.config.enable_isys_event_queue = enable; +#else + (void)enable; +#endif +} + +void +sh_css_sp_set_disable_continuous_viewfinder(bool flag) +{ + sh_css_sp_group.config.disable_cont_vf = flag; +} + +static enum ia_css_err +sh_css_sp_write_frame_pointers(const struct sh_css_binary_args *args) +{ + enum ia_css_err err = IA_CSS_SUCCESS; + int i; + + assert(args != NULL); + + if (args->in_frame) + err = set_input_frame_buffer(args->in_frame); + if (err == IA_CSS_SUCCESS && args->out_vf_frame) + err = set_view_finder_buffer(args->out_vf_frame); + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + if (err == IA_CSS_SUCCESS && args->out_frame[i]) + err = set_output_frame_buffer(args->out_frame[i], i); + } + + /* we don't pass this error back to the upper layer, so we add a assert here + because we actually hit the error here but it still works by accident... */ + if (err != IA_CSS_SUCCESS) assert(false); + return err; +} + +static void +sh_css_sp_init_group(bool two_ppc, + enum atomisp_input_format input_format, + bool no_isp_sync, + uint8_t if_config_index) +{ +#if !defined(HAS_NO_INPUT_FORMATTER) + sh_css_sp_group.config.input_formatter.isp_2ppc = two_ppc; +#else + (void)two_ppc; +#endif + + sh_css_sp_group.config.no_isp_sync = (uint8_t)no_isp_sync; + /* decide whether the frame is processed online or offline */ + if (if_config_index == SH_CSS_IF_CONFIG_NOT_NEEDED) return; +#if !defined(HAS_NO_INPUT_FORMATTER) + assert(if_config_index < SH_CSS_MAX_IF_CONFIGS); + sh_css_sp_group.config.input_formatter.set[if_config_index].stream_format = input_format; +#else + (void)input_format; +#endif +} + +void +sh_css_stage_write_binary_info(struct ia_css_binary_info *info) +{ + assert(info != NULL); + sh_css_isp_stage.binary_info = *info; +} + +static enum ia_css_err +copy_isp_mem_if_to_ddr(struct ia_css_binary *binary) +{ + enum ia_css_err err; + + err = ia_css_isp_param_copy_isp_mem_if_to_ddr( + &binary->css_params, + &binary->mem_params, + IA_CSS_PARAM_CLASS_CONFIG); + if (err != IA_CSS_SUCCESS) + return err; + err = ia_css_isp_param_copy_isp_mem_if_to_ddr( + &binary->css_params, + &binary->mem_params, + IA_CSS_PARAM_CLASS_STATE); + if (err != IA_CSS_SUCCESS) + return err; + return IA_CSS_SUCCESS; +} + +static bool +is_sp_stage(struct ia_css_pipeline_stage *stage) +{ + assert(stage != NULL); + return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; +} + +static enum ia_css_err +configure_isp_from_args( + const struct sh_css_sp_pipeline *pipeline, + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args, + bool two_ppc, + bool deinterleaved) +{ +#ifdef ISP2401 + struct ia_css_pipe *pipe = find_pipe_by_num(pipeline->pipe_num); + const struct ia_css_resolution *res; + +#endif + ia_css_fpn_configure(binary, &binary->in_frame_info); + ia_css_crop_configure(binary, &args->delay_frames[0]->info); + ia_css_qplane_configure(pipeline, binary, &binary->in_frame_info); + ia_css_output0_configure(binary, &args->out_frame[0]->info); + ia_css_output1_configure(binary, &args->out_vf_frame->info); + ia_css_copy_output_configure(binary, args->copy_output); + ia_css_output0_configure(binary, &args->out_frame[0]->info); +#ifdef ISP2401 + ia_css_sc_configure(binary, pipeline->shading.internal_frame_origin_x_bqs_on_sctbl, + pipeline->shading.internal_frame_origin_y_bqs_on_sctbl); +#endif + ia_css_iterator_configure(binary, &args->in_frame->info); + ia_css_dvs_configure(binary, &args->out_frame[0]->info); + ia_css_output_configure(binary, &args->out_frame[0]->info); + ia_css_raw_configure(pipeline, binary, &args->in_frame->info, &binary->in_frame_info, two_ppc, deinterleaved); + ia_css_ref_configure(binary, (const struct ia_css_frame **)args->delay_frames, pipeline->dvs_frame_delay); + ia_css_tnr_configure(binary, (const struct ia_css_frame **)args->tnr_frames); + ia_css_bayer_io_config(binary, args); + return IA_CSS_SUCCESS; +} + +static void +initialize_isp_states(const struct ia_css_binary *binary) +{ + unsigned int i; + + if (!binary->info->mem_offsets.offsets.state) + return; + for (i = 0; i < IA_CSS_NUM_STATE_IDS; i++) { + ia_css_kernel_init_state[i](binary); + } +} + +static void +initialize_frame_buffer_attribute(struct ia_css_buffer_sp *buf_attr) +{ + buf_attr->buf_src.queue_id = SH_CSS_INVALID_QUEUE_ID; + buf_attr->buf_type = IA_CSS_BUFFER_TYPE_INVALID; +} + +static void +initialize_stage_frames(struct ia_css_frames_sp *frames) +{ + unsigned int i; + + initialize_frame_buffer_attribute(&frames->in.buf_attr); + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + initialize_frame_buffer_attribute(&frames->out[i].buf_attr); + } + initialize_frame_buffer_attribute(&frames->out_vf.buf_attr); + initialize_frame_buffer_attribute(&frames->s3a_buf); + initialize_frame_buffer_attribute(&frames->dvs_buf); +#if defined SH_CSS_ENABLE_METADATA + initialize_frame_buffer_attribute(&frames->metadata_buf); +#endif +} + +static enum ia_css_err +sh_css_sp_init_stage(struct ia_css_binary *binary, + const char *binary_name, + const struct ia_css_blob_info *blob_info, + const struct sh_css_binary_args *args, + unsigned int pipe_num, + unsigned stage, + bool xnr, + const struct ia_css_isp_param_css_segments *isp_mem_if, + unsigned int if_config_index, + bool two_ppc) +{ + const struct ia_css_binary_xinfo *xinfo; + const struct ia_css_binary_info *info; + enum ia_css_err err = IA_CSS_SUCCESS; + int i; + struct ia_css_pipe *pipe = NULL; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + bool continuous = sh_css_continuous_is_enabled((uint8_t)pipe_num); + + assert(binary != NULL); + assert(blob_info != NULL); + assert(args != NULL); + assert(isp_mem_if != NULL); + + xinfo = binary->info; + info = &xinfo->sp; + { + /* + * Clear sh_css_sp_stage for easy debugging. + * program_input_circuit must be saved as it is set outside + * this function. + */ + uint8_t program_input_circuit; + program_input_circuit = sh_css_sp_stage.program_input_circuit; + memset(&sh_css_sp_stage, 0, sizeof(sh_css_sp_stage)); + sh_css_sp_stage.program_input_circuit = (uint8_t)program_input_circuit; + } + + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + + if (info == NULL) { + sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL; + return IA_CSS_SUCCESS; + } + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + (void)continuous; + sh_css_sp_stage.deinterleaved = 0; +#else + sh_css_sp_stage.deinterleaved = ((stage == 0) && continuous); +#endif + + initialize_stage_frames(&sh_css_sp_stage.frames); + /* + * TODO: Make the Host dynamically determine + * the stage type. + */ + sh_css_sp_stage.stage_type = SH_CSS_ISP_STAGE_TYPE; + sh_css_sp_stage.num = (uint8_t)stage; + sh_css_sp_stage.isp_online = (uint8_t)binary->online; + sh_css_sp_stage.isp_copy_vf = (uint8_t)args->copy_vf; + sh_css_sp_stage.isp_copy_output = (uint8_t)args->copy_output; + sh_css_sp_stage.enable.vf_output = (args->out_vf_frame != NULL); + + /* Copy the frame infos first, to be overwritten by the frames, + if these are present. + */ + sh_css_sp_stage.frames.effective_in_res.width = binary->effective_in_frame_res.width; + sh_css_sp_stage.frames.effective_in_res.height = binary->effective_in_frame_res.height; + + ia_css_frame_info_to_frame_sp_info(&sh_css_sp_stage.frames.in.info, + &binary->in_frame_info); + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + ia_css_frame_info_to_frame_sp_info(&sh_css_sp_stage.frames.out[i].info, + &binary->out_frame_info[i]); + } + ia_css_frame_info_to_frame_sp_info(&sh_css_sp_stage.frames.internal_frame_info, + &binary->internal_frame_info); + sh_css_sp_stage.dvs_envelope.width = binary->dvs_envelope.width; + sh_css_sp_stage.dvs_envelope.height = binary->dvs_envelope.height; + sh_css_sp_stage.isp_pipe_version = (uint8_t)info->pipeline.isp_pipe_version; + sh_css_sp_stage.isp_deci_log_factor = (uint8_t)binary->deci_factor_log2; + sh_css_sp_stage.isp_vf_downscale_bits = (uint8_t)binary->vf_downscale_log2; + + sh_css_sp_stage.if_config_index = (uint8_t) if_config_index; + + sh_css_sp_stage.sp_enable_xnr = (uint8_t)xnr; + sh_css_sp_stage.xmem_bin_addr = xinfo->xmem_addr; + sh_css_sp_stage.xmem_map_addr = sh_css_params_ddr_address_map(); + sh_css_isp_stage.blob_info = *blob_info; + sh_css_stage_write_binary_info((struct ia_css_binary_info *)info); + + /* Make sure binary name is smaller than allowed string size */ + assert(strlen(binary_name) < SH_CSS_MAX_BINARY_NAME-1); + strncpy(sh_css_isp_stage.binary_name, binary_name, SH_CSS_MAX_BINARY_NAME-1); + sh_css_isp_stage.binary_name[SH_CSS_MAX_BINARY_NAME - 1] = 0; + sh_css_isp_stage.mem_initializers = *isp_mem_if; + + /* + * Even when a stage does not need uds and does not params, + * ia_css_uds_sp_scale_params() seems to be called (needs + * further investigation). This function can not deal with + * dx, dy = {0, 0} + */ + + err = sh_css_sp_write_frame_pointers(args); + /* TODO: move it to a better place */ + if (binary->info->sp.enable.s3a) { + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_3A_STATISTICS, thread_id, &queue_id); + sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.s3a_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_3A_STATISTICS); + } + if (binary->info->sp.enable.dis) { + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_DIS_STATISTICS, thread_id, &queue_id); + sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.dvs_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_DIS_STATISTICS); + } +#if defined SH_CSS_ENABLE_METADATA + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); + sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.metadata_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_METADATA); +#endif + if (err != IA_CSS_SUCCESS) + return err; + +#ifdef USE_INPUT_SYSTEM_VERSION_2401 +#ifndef ISP2401 + if (args->in_frame) { + pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); + if (pipe == NULL) + return IA_CSS_ERR_INTERNAL_ERROR; + ia_css_get_crop_offsets(pipe, &args->in_frame->info); + } else if (&binary->in_frame_info) { + pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); + if (pipe == NULL) + return IA_CSS_ERR_INTERNAL_ERROR; + ia_css_get_crop_offsets(pipe, &binary->in_frame_info); +#else + if (stage == 0) { + if (args->in_frame) { + pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); + if (pipe == NULL) + return IA_CSS_ERR_INTERNAL_ERROR; + ia_css_get_crop_offsets(pipe, &args->in_frame->info); + } else if (&binary->in_frame_info) { + pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); + if (pipe == NULL) + return IA_CSS_ERR_INTERNAL_ERROR; + ia_css_get_crop_offsets(pipe, &binary->in_frame_info); + } +#endif + } +#else + (void)pipe; /*avoid build warning*/ +#endif + + err = configure_isp_from_args(&sh_css_sp_group.pipe[thread_id], + binary, args, two_ppc, sh_css_sp_stage.deinterleaved); + if (err != IA_CSS_SUCCESS) + return err; + + initialize_isp_states(binary); + + /* we do this only for preview pipe because in fill_binary_info function + * we assign vf_out res to out res, but for ISP internal processing, we need + * the original out res. for video pipe, it has two output pins --- out and + * vf_out, so it can keep these two resolutions already. */ + if (binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_PREVIEW && + (binary->vf_downscale_log2 > 0)) { + /* TODO: Remove this after preview output decimation is fixed + * by configuring out&vf info fiels properly */ + sh_css_sp_stage.frames.out[0].info.padded_width + <<= binary->vf_downscale_log2; + sh_css_sp_stage.frames.out[0].info.res.width + <<= binary->vf_downscale_log2; + sh_css_sp_stage.frames.out[0].info.res.height + <<= binary->vf_downscale_log2; + } + err = copy_isp_mem_if_to_ddr(binary); + if (err != IA_CSS_SUCCESS) + return err; + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +sp_init_stage(struct ia_css_pipeline_stage *stage, + unsigned int pipe_num, + bool xnr, + unsigned int if_config_index, + bool two_ppc) +{ + struct ia_css_binary *binary; + const struct ia_css_fw_info *firmware; + const struct sh_css_binary_args *args; + unsigned stage_num; +/* + * Initialiser required because of the "else" path below. + * Is this a valid path ? + */ + const char *binary_name = ""; + const struct ia_css_binary_xinfo *info = NULL; + /* note: the var below is made static as it is quite large; + if it is not static it ends up on the stack which could + cause issues for drivers + */ + static struct ia_css_binary tmp_binary; + const struct ia_css_blob_info *blob_info = NULL; + struct ia_css_isp_param_css_segments isp_mem_if; + /* LA: should be ia_css_data, should not contain host pointer. + However, CSS/DDR pointer is not available yet. + Hack is to store it in params->ddr_ptrs and then copy it late in the SP just before vmem init. + TODO: Call this after CSS/DDR allocation and store that pointer. + Best is to allocate it at stage creation time together with host pointer. + Remove vmem from params. + */ + struct ia_css_isp_param_css_segments *mem_if = &isp_mem_if; + + enum ia_css_err err = IA_CSS_SUCCESS; + + assert(stage != NULL); + + binary = stage->binary; + firmware = stage->firmware; + args = &stage->args; + stage_num = stage->stage_num; + + + if (binary) { + info = binary->info; + binary_name = (const char *)(info->blob->name); + blob_info = &info->blob->header.blob; + ia_css_init_memory_interface(mem_if, &binary->mem_params, &binary->css_params); + } else if (firmware) { + const struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; + if (args->out_frame[0]) + out_infos[0] = &args->out_frame[0]->info; + info = &firmware->info.isp; + ia_css_binary_fill_info(info, false, false, + ATOMISP_INPUT_FORMAT_RAW_10, + args->in_frame ? &args->in_frame->info : NULL, + NULL, + out_infos, + args->out_vf_frame ? &args->out_vf_frame->info + : NULL, + &tmp_binary, + NULL, + -1, true); + binary = &tmp_binary; + binary->info = info; + binary_name = IA_CSS_EXT_ISP_PROG_NAME(firmware); + blob_info = &firmware->blob; + mem_if = (struct ia_css_isp_param_css_segments *)&firmware->mem_initializers; + } else { + /* SP stage */ + assert(stage->sp_func != IA_CSS_PIPELINE_NO_FUNC); + /* binary and blob_info are now NULL. + These will be passed to sh_css_sp_init_stage + and dereferenced there, so passing a NULL + pointer is no good. return an error */ + return IA_CSS_ERR_INTERNAL_ERROR; + } + + err = sh_css_sp_init_stage(binary, + (const char *)binary_name, + blob_info, + args, + pipe_num, + stage_num, + xnr, + mem_if, + if_config_index, + two_ppc); + return err; +} + +static void +sp_init_sp_stage(struct ia_css_pipeline_stage *stage, + unsigned pipe_num, + bool two_ppc, + enum sh_css_pipe_config_override copy_ovrd, + unsigned int if_config_index) +{ + const struct sh_css_binary_args *args = &stage->args; + + assert(stage != NULL); + switch (stage->sp_func) { + case IA_CSS_PIPELINE_RAW_COPY: + sh_css_sp_start_raw_copy(args->out_frame[0], + pipe_num, two_ppc, + stage->max_input_width, + copy_ovrd, if_config_index); + break; + case IA_CSS_PIPELINE_BIN_COPY: + assert(false); /* TBI */ + case IA_CSS_PIPELINE_ISYS_COPY: + sh_css_sp_start_isys_copy(args->out_frame[0], + pipe_num, stage->max_input_width, if_config_index); + break; + case IA_CSS_PIPELINE_NO_FUNC: + assert(false); + } +} + +void +sh_css_sp_init_pipeline(struct ia_css_pipeline *me, + enum ia_css_pipe_id id, + uint8_t pipe_num, + bool xnr, + bool two_ppc, + bool continuous, + bool offline, + unsigned int required_bds_factor, + enum sh_css_pipe_config_override copy_ovrd, + enum ia_css_input_mode input_mode, + const struct ia_css_metadata_config *md_config, + const struct ia_css_metadata_info *md_info, +#if !defined(HAS_NO_INPUT_SYSTEM) + const enum mipi_port_id port_id +#endif +#ifdef ISP2401 + , + const struct ia_css_coordinate *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame + positioned on shading table at shading correction in ISP. */ + const struct ia_css_isp_parameters *params +#endif + ) +{ + /* Get first stage */ + struct ia_css_pipeline_stage *stage = NULL; + struct ia_css_binary *first_binary = NULL; + struct ia_css_pipe *pipe = NULL; + unsigned num; + + enum ia_css_pipe_id pipe_id = id; + unsigned int thread_id; + uint8_t if_config_index, tmp_if_config_index; + + assert(me != NULL); + +#if !defined(HAS_NO_INPUT_SYSTEM) + assert(me->stages != NULL); + + first_binary = me->stages->binary; + + if (input_mode == IA_CSS_INPUT_MODE_SENSOR || + input_mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + assert(port_id < N_MIPI_PORT_ID); + if (port_id >= N_MIPI_PORT_ID) /* should not happen but KW does not know */ + return; /* we should be able to return an error */ + if_config_index = (uint8_t) (port_id - MIPI_PORT0_ID); + } else if (input_mode == IA_CSS_INPUT_MODE_MEMORY) { + if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; + } else { + if_config_index = 0x0; + } +#else + (void)input_mode; + if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; +#endif + + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + memset(&sh_css_sp_group.pipe[thread_id], 0, sizeof(struct sh_css_sp_pipeline)); + + /* Count stages */ + for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { + stage->stage_num = num; + ia_css_debug_pipe_graph_dump_stage(stage, id); + } + me->num_stages = num; + + if (first_binary != NULL) { + /* Init pipeline data */ + sh_css_sp_init_group(two_ppc, first_binary->input_format, + offline, if_config_index); + } /* if (first_binary != NULL) */ + +#if defined(USE_INPUT_SYSTEM_VERSION_2401) || defined(USE_INPUT_SYSTEM_VERSION_2) + /* Signal the host immediately after start for SP_ISYS_COPY only */ + if ((me->num_stages == 1) && me->stages && + (me->stages->sp_func == IA_CSS_PIPELINE_ISYS_COPY)) + sh_css_sp_group.config.no_isp_sync = true; +#endif + + /* Init stage data */ + sh_css_init_host2sp_frame_data(); + + sh_css_sp_group.pipe[thread_id].num_stages = 0; + sh_css_sp_group.pipe[thread_id].pipe_id = pipe_id; + sh_css_sp_group.pipe[thread_id].thread_id = thread_id; + sh_css_sp_group.pipe[thread_id].pipe_num = pipe_num; + sh_css_sp_group.pipe[thread_id].num_execs = me->num_execs; + sh_css_sp_group.pipe[thread_id].pipe_qos_config = me->pipe_qos_config; + sh_css_sp_group.pipe[thread_id].required_bds_factor = required_bds_factor; +#if !defined(HAS_NO_INPUT_SYSTEM) + sh_css_sp_group.pipe[thread_id].input_system_mode + = (uint32_t)input_mode; + sh_css_sp_group.pipe[thread_id].port_id = port_id; +#endif + sh_css_sp_group.pipe[thread_id].dvs_frame_delay = (uint32_t)me->dvs_frame_delay; + + /* TODO: next indicates from which queues parameters need to be + sampled, needs checking/improvement */ + if (ia_css_pipeline_uses_params(me)) { + sh_css_sp_group.pipe[thread_id].pipe_config = + SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id; + } + + /* For continuous use-cases, SP copy is responsible for sampling the + * parameters */ + if (continuous) + sh_css_sp_group.pipe[thread_id].pipe_config = 0; + + sh_css_sp_group.pipe[thread_id].inout_port_config = me->inout_port_config; + + pipe = find_pipe_by_num(pipe_num); + assert(pipe != NULL); + if (pipe == NULL) { + return; + } + sh_css_sp_group.pipe[thread_id].scaler_pp_lut = sh_css_pipe_get_pp_gdc_lut(pipe); + +#if defined(SH_CSS_ENABLE_METADATA) + if (md_info != NULL && md_info->size > 0) { + sh_css_sp_group.pipe[thread_id].metadata.width = md_info->resolution.width; + sh_css_sp_group.pipe[thread_id].metadata.height = md_info->resolution.height; + sh_css_sp_group.pipe[thread_id].metadata.stride = md_info->stride; + sh_css_sp_group.pipe[thread_id].metadata.size = md_info->size; + ia_css_isys_convert_stream_format_to_mipi_format( + md_config->data_type, MIPI_PREDICTOR_NONE, + &sh_css_sp_group.pipe[thread_id].metadata.format); + } +#else + (void)md_config; + (void)md_info; +#endif + +#if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) + sh_css_sp_group.pipe[thread_id].output_frame_queue_id = (uint32_t)SH_CSS_INVALID_QUEUE_ID; + if (IA_CSS_PIPE_ID_COPY != pipe_id) { + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, (enum sh_css_queue_id *)(&sh_css_sp_group.pipe[thread_id].output_frame_queue_id)); + } +#endif + +#ifdef ISP2401 + /* For the shading correction type 1 (the legacy shading table conversion in css is not used), + * the parameters are passed to the isp for the shading table centering. + */ + if (internal_frame_origin_bqs_on_sctbl != NULL && + params != NULL && params->shading_settings.enable_shading_table_conversion == 0) { + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl + = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl + = (uint32_t)internal_frame_origin_bqs_on_sctbl->y; + } else { + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = 0; + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl = 0; + } + +#endif + IA_CSS_LOG("pipe_id %d port_config %08x", + pipe_id, sh_css_sp_group.pipe[thread_id].inout_port_config); + + for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { + sh_css_sp_group.pipe[thread_id].num_stages++; + if (is_sp_stage(stage)) { + sp_init_sp_stage(stage, pipe_num, two_ppc, + copy_ovrd, if_config_index); + } else { + if ((stage->stage_num != 0) || SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(me->inout_port_config)) + tmp_if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; + else + tmp_if_config_index = if_config_index; + sp_init_stage(stage, pipe_num, + xnr, tmp_if_config_index, two_ppc); + } + + store_sp_stage_data(pipe_id, pipe_num, num); + } + sh_css_sp_group.pipe[thread_id].pipe_config |= (uint32_t) + (me->acquire_isp_each_stage << IA_CSS_ACQUIRE_ISP_POS); + store_sp_group_data(); + +} + +void +sh_css_sp_uninit_pipeline(unsigned int pipe_num) +{ + unsigned int thread_id; + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + /*memset(&sh_css_sp_group.pipe[thread_id], 0, sizeof(struct sh_css_sp_pipeline));*/ + sh_css_sp_group.pipe[thread_id].num_stages = 0; +} + +bool sh_css_write_host2sp_command(enum host2sp_commands host2sp_command) +{ + unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + unsigned int offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_command) + / sizeof(int); + enum host2sp_commands last_cmd = host2sp_cmd_error; + (void)HIVE_ADDR_host_sp_com; /* Suppres warnings in CRUN */ + + /* Previous command must be handled by SP (by design) */ + last_cmd = load_sp_array_uint(host_sp_com, offset); + if (last_cmd != host2sp_cmd_ready) + IA_CSS_ERROR("last host command not handled by SP(%d)", last_cmd); + + store_sp_array_uint(host_sp_com, offset, host2sp_command); + + return (last_cmd == host2sp_cmd_ready); +} + +enum host2sp_commands +sh_css_read_host2sp_command(void) +{ + unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + unsigned int offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_command) + / sizeof(int); + (void)HIVE_ADDR_host_sp_com; /* Suppres warnings in CRUN */ + return (enum host2sp_commands)load_sp_array_uint(host_sp_com, offset); +} + + +/* + * Frame data is no longer part of the sp_stage structure but part of a + * seperate structure. The aim is to make the sp_data struct static + * (it defines a pipeline) and that the dynamic (per frame) data is stored + * separetly. + * + * This function must be called first every where were you start constructing + * a new pipeline by defining one or more stages with use of variable + * sh_css_sp_stage. Even the special cases like accelerator and copy_frame + * These have a pipeline of just 1 stage. + */ +void +sh_css_init_host2sp_frame_data(void) +{ + /* Clean table */ + unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + + (void)HIVE_ADDR_host_sp_com; /* Suppres warnings in CRUN */ + /* + * rvanimme: don't clean it to save static frame info line ref_in + * ref_out, and tnr_frames. Once this static data is in a + * seperate data struct, this may be enable (but still, there is + * no need for it) + */ +} + + +/* + * @brief Update the offline frame information in host_sp_communication. + * Refer to "sh_css_sp.h" for more details. + */ +void +sh_css_update_host2sp_offline_frame( + unsigned frame_num, + struct ia_css_frame *frame, + struct ia_css_metadata *metadata) +{ + unsigned int HIVE_ADDR_host_sp_com; + unsigned int offset; + + assert(frame_num < NUM_CONTINUOUS_FRAMES); + + /* Write new frame data into SP DMEM */ + HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_offline_frames) + / sizeof(int); + offset += frame_num; + store_sp_array_uint(host_sp_com, offset, frame ? frame->data : 0); + + /* Write metadata buffer into SP DMEM */ + offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_offline_metadata) + / sizeof(int); + offset += frame_num; + store_sp_array_uint(host_sp_com, offset, metadata ? metadata->address : 0); +} + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +/* + * @brief Update the mipi frame information in host_sp_communication. + * Refer to "sh_css_sp.h" for more details. + */ +void +sh_css_update_host2sp_mipi_frame( + unsigned frame_num, + struct ia_css_frame *frame) +{ + unsigned int HIVE_ADDR_host_sp_com; + unsigned int offset; + + /* MIPI buffers are dedicated to port, so now there are more of them. */ + assert(frame_num < (N_CSI_PORTS * NUM_MIPI_FRAMES_PER_STREAM)); + + /* Write new frame data into SP DMEM */ + HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_mipi_frames) + / sizeof(int); + offset += frame_num; + + store_sp_array_uint(host_sp_com, offset, + frame ? frame->data : 0); +} + +/* + * @brief Update the mipi metadata information in host_sp_communication. + * Refer to "sh_css_sp.h" for more details. + */ +void +sh_css_update_host2sp_mipi_metadata( + unsigned frame_num, + struct ia_css_metadata *metadata) +{ + unsigned int HIVE_ADDR_host_sp_com; + unsigned int o; + + /* MIPI buffers are dedicated to port, so now there are more of them. */ + assert(frame_num < (N_CSI_PORTS * NUM_MIPI_FRAMES_PER_STREAM)); + + /* Write new frame data into SP DMEM */ + HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + o = offsetof(struct host_sp_communication, host2sp_mipi_metadata) + / sizeof(int); + o += frame_num; + store_sp_array_uint(host_sp_com, o, + metadata ? metadata->address : 0); +} + +void +sh_css_update_host2sp_num_mipi_frames(unsigned num_frames) +{ + unsigned int HIVE_ADDR_host_sp_com; + unsigned int offset; + + /* Write new frame data into SP DMEM */ + HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_num_mipi_frames) + / sizeof(int); + + store_sp_array_uint(host_sp_com, offset, num_frames); +} +#endif + +void +sh_css_update_host2sp_cont_num_raw_frames(unsigned num_frames, bool set_avail) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_host_sp_com; + unsigned int extra_num_frames, avail_num_frames; + unsigned int offset, offset_extra; + + /* Write new frame data into SP DMEM */ + fw = &sh_css_sp_fw; + HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; + if (set_avail) { + offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_cont_avail_num_raw_frames) + / sizeof(int); + avail_num_frames = load_sp_array_uint(host_sp_com, offset); + extra_num_frames = num_frames - avail_num_frames; + offset_extra = (unsigned int)offsetof(struct host_sp_communication, host2sp_cont_extra_num_raw_frames) + / sizeof(int); + store_sp_array_uint(host_sp_com, offset_extra, extra_num_frames); + } else + offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_cont_target_num_raw_frames) + / sizeof(int); + + store_sp_array_uint(host_sp_com, offset, num_frames); +} + +void +sh_css_event_init_irq_mask(void) +{ + int i; + unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + unsigned int offset; + struct sh_css_event_irq_mask event_irq_mask_init; + + event_irq_mask_init.or_mask = IA_CSS_EVENT_TYPE_ALL; + event_irq_mask_init.and_mask = IA_CSS_EVENT_TYPE_NONE; + (void)HIVE_ADDR_host_sp_com; /* Suppress warnings in CRUN */ + + assert(sizeof(event_irq_mask_init) % HRT_BUS_BYTES == 0); + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_event_irq_mask[i]); + assert(offset % HRT_BUS_BYTES == 0); + sp_dmem_store(SP0_ID, + (unsigned int)sp_address_of(host_sp_com) + offset, + &event_irq_mask_init, sizeof(event_irq_mask_init)); + } + +} + +enum ia_css_err +ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, + unsigned int or_mask, + unsigned int and_mask) +{ + unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + unsigned int offset; + struct sh_css_event_irq_mask event_irq_mask; + unsigned int pipe_num; + + assert(pipe != NULL); + + assert(IA_CSS_PIPE_ID_NUM == NR_OF_PIPELINES); + /* Linux kernel does not have UINT16_MAX + * Therefore decided to comment out these 2 asserts for Linux + * Alternatives that were not chosen: + * - add a conditional #define for UINT16_MAX + * - compare with (uint16_t)~0 or 0xffff + * - different assert for Linux and Windows + */ + + (void)HIVE_ADDR_host_sp_com; /* Suppres warnings in CRUN */ + + IA_CSS_LOG("or_mask=%x, and_mask=%x", or_mask, and_mask); + event_irq_mask.or_mask = (uint16_t)or_mask; + event_irq_mask.and_mask = (uint16_t)and_mask; + + pipe_num = ia_css_pipe_get_pipe_num(pipe); + if (pipe_num >= IA_CSS_PIPE_ID_NUM) + return IA_CSS_ERR_INTERNAL_ERROR; + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_event_irq_mask[pipe_num]); + assert(offset % HRT_BUS_BYTES == 0); + sp_dmem_store(SP0_ID, + (unsigned int)sp_address_of(host_sp_com) + offset, + &event_irq_mask, sizeof(event_irq_mask)); + + return IA_CSS_SUCCESS; +} + +enum ia_css_err +ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe, + unsigned int *or_mask, + unsigned int *and_mask) +{ + unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; + unsigned int offset; + struct sh_css_event_irq_mask event_irq_mask; + unsigned int pipe_num; + + (void)HIVE_ADDR_host_sp_com; /* Suppres warnings in CRUN */ + + IA_CSS_ENTER_LEAVE(""); + + assert(pipe != NULL); + assert(IA_CSS_PIPE_ID_NUM == NR_OF_PIPELINES); + + pipe_num = ia_css_pipe_get_pipe_num(pipe); + if (pipe_num >= IA_CSS_PIPE_ID_NUM) + return IA_CSS_ERR_INTERNAL_ERROR; + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_event_irq_mask[pipe_num]); + assert(offset % HRT_BUS_BYTES == 0); + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(host_sp_com) + offset, + &event_irq_mask, sizeof(event_irq_mask)); + + if (or_mask) + *or_mask = event_irq_mask.or_mask; + + if (and_mask) + *and_mask = event_irq_mask.and_mask; + + return IA_CSS_SUCCESS; +} + +void +sh_css_sp_set_sp_running(bool flag) +{ + sp_running = flag; +} + +bool +sh_css_sp_is_running(void) +{ + return sp_running; +} + +void +sh_css_sp_start_isp(void) +{ + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_sp_sw_state; + + fw = &sh_css_sp_fw; + HIVE_ADDR_sp_sw_state = fw->info.sp.sw_state; + + + if (sp_running) + return; + + (void)HIVE_ADDR_sp_sw_state; /* Suppres warnings in CRUN */ + + /* no longer here, sp started immediately */ + /*ia_css_debug_pipe_graph_dump_epilogue();*/ + + store_sp_group_data(); + store_sp_per_frame_data(fw); + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_sw_state), + (uint32_t)(IA_CSS_SP_SW_TERMINATED)); + + + /* Note 1: The sp_start_isp function contains a wait till + * the input network is configured by the SP. + * Note 2: Not all SP binaries supports host2sp_commands. + * In case a binary does support it, the host2sp_command + * will have status cmd_ready after return of the function + * sh_css_hrt_sp_start_isp. There is no race-condition here + * because only after the process_frame command has been + * received, the SP starts configuring the input network. + */ + + /* we need to set sp_running before we call ia_css_mmu_invalidate_cache + * as ia_css_mmu_invalidate_cache checks on sp_running to + * avoid that it accesses dmem while the SP is not powered + */ + sp_running = true; + ia_css_mmu_invalidate_cache(); + /* Invalidate all MMU caches */ + mmu_invalidate_cache_all(); + + ia_css_spctrl_start(SP0_ID); + +} + +bool +ia_css_isp_has_started(void) +{ + const struct ia_css_fw_info *fw = &sh_css_sp_fw; + unsigned int HIVE_ADDR_ia_css_ispctrl_sp_isp_started = fw->info.sp.isp_started; + (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ + + return (bool)load_sp_uint(ia_css_ispctrl_sp_isp_started); +} + + +/* + * @brief Initialize the DMA software-mask in the debug mode. + * Refer to "sh_css_sp.h" for more details. + */ +bool +sh_css_sp_init_dma_sw_reg(int dma_id) +{ + int i; + + /* enable all the DMA channels */ + for (i = 0; i < N_DMA_CHANNEL_ID; i++) { + /* enable the writing request */ + sh_css_sp_set_dma_sw_reg(dma_id, + i, + 0, + true); + /* enable the reading request */ + sh_css_sp_set_dma_sw_reg(dma_id, + i, + 1, + true); + } + + return true; +} + +/* + * @brief Set the DMA software-mask in the debug mode. + * Refer to "sh_css_sp.h" for more details. + */ +bool +sh_css_sp_set_dma_sw_reg(int dma_id, + int channel_id, + int request_type, + bool enable) +{ + uint32_t sw_reg; + uint32_t bit_val; + uint32_t bit_offset; + uint32_t bit_mask; + + (void)dma_id; + + assert(channel_id >= 0 && channel_id < N_DMA_CHANNEL_ID); + assert(request_type >= 0); + + /* get the software-mask */ + sw_reg = + sh_css_sp_group.debug.dma_sw_reg; + + /* get the offest of the target bit */ + bit_offset = (8 * request_type) + channel_id; + + /* clear the value of the target bit */ + bit_mask = ~(1 << bit_offset); + sw_reg &= bit_mask; + + /* set the value of the bit for the DMA channel */ + bit_val = enable ? 1 : 0; + bit_val <<= bit_offset; + sw_reg |= bit_val; + + /* update the software status of DMA channels */ + sh_css_sp_group.debug.dma_sw_reg = sw_reg; + + return true; +} + +void +sh_css_sp_reset_global_vars(void) +{ + memset(&sh_css_sp_group, 0, sizeof(struct sh_css_sp_group)); + memset(&sh_css_sp_stage, 0, sizeof(struct sh_css_sp_stage)); + memset(&sh_css_isp_stage, 0, sizeof(struct sh_css_isp_stage)); + memset(&sh_css_sp_output, 0, sizeof(struct sh_css_sp_output)); + memset(&per_frame_data, 0, sizeof(struct sh_css_sp_per_frame_data)); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h new file mode 100644 index 0000000000000..3c41e997de791 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h @@ -0,0 +1,248 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_SP_H_ +#define _SH_CSS_SP_H_ + +#include +#include +#if !defined(HAS_NO_INPUT_FORMATTER) +#include "input_formatter.h" +#endif + +#include "ia_css_binary.h" +#include "ia_css_types.h" +#include "ia_css_pipeline.h" + +/* Function to initialize the data and bss section descr of the binary */ +void +sh_css_sp_store_init_dmem(const struct ia_css_fw_info *fw); + +void +store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned stage); + +void +sh_css_stage_write_binary_info(struct ia_css_binary_info *info); + +void +store_sp_group_data(void); + +/* Start binary (jpeg) copy on the SP */ +void +sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_frame, + unsigned two_ppc); + +unsigned int +sh_css_sp_get_binary_copy_size(void); + +/* Return the value of a SW interrupt */ +unsigned int +sh_css_sp_get_sw_interrupt_value(unsigned int irq); + +void +sh_css_sp_init_pipeline(struct ia_css_pipeline *me, + enum ia_css_pipe_id id, + uint8_t pipe_num, + bool xnr, + bool two_ppc, + bool continuous, + bool offline, + unsigned int required_bds_factor, + enum sh_css_pipe_config_override copy_ovrd, + enum ia_css_input_mode input_mode, + const struct ia_css_metadata_config *md_config, + const struct ia_css_metadata_info *md_info, +#if !defined(HAS_NO_INPUT_SYSTEM) + const enum mipi_port_id port_id +#endif +#ifdef ISP2401 + , + const struct ia_css_coordinate *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame + positioned on shading table at shading correction in ISP. */ + const struct ia_css_isp_parameters *params +#endif + ); + +void +sh_css_sp_uninit_pipeline(unsigned int pipe_num); + +bool sh_css_write_host2sp_command(enum host2sp_commands host2sp_command); + +enum host2sp_commands +sh_css_read_host2sp_command(void); + +void +sh_css_init_host2sp_frame_data(void); + +/** + * @brief Update the offline frame information in host_sp_communication. + * + * @param[in] frame_num The offline frame number. + * @param[in] frame The pointer to the offline frame. + */ +void +sh_css_update_host2sp_offline_frame( + unsigned frame_num, + struct ia_css_frame *frame, + struct ia_css_metadata *metadata); + +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) +/** + * @brief Update the mipi frame information in host_sp_communication. + * + * @param[in] frame_num The mipi frame number. + * @param[in] frame The pointer to the mipi frame. + */ +void +sh_css_update_host2sp_mipi_frame( + unsigned frame_num, + struct ia_css_frame *frame); + +/** + * @brief Update the mipi metadata information in host_sp_communication. + * + * @param[in] frame_num The mipi frame number. + * @param[in] metadata The pointer to the mipi metadata. + */ +void +sh_css_update_host2sp_mipi_metadata( + unsigned frame_num, + struct ia_css_metadata *metadata); + +/** + * @brief Update the nr of mipi frames to use in host_sp_communication. + * + * @param[in] num_frames The number of mipi frames to use. + */ +void +sh_css_update_host2sp_num_mipi_frames(unsigned num_frames); +#endif + +/** + * @brief Update the nr of offline frames to use in host_sp_communication. + * + * @param[in] num_frames The number of raw frames to use. + */ +void +sh_css_update_host2sp_cont_num_raw_frames(unsigned num_frames, bool set_avail); + +void +sh_css_event_init_irq_mask(void); + +void +sh_css_sp_start_isp(void); + +void +sh_css_sp_set_sp_running(bool flag); + +bool +sh_css_sp_is_running(void); + +#if SP_DEBUG != SP_DEBUG_NONE + +void +sh_css_sp_get_debug_state(struct sh_css_sp_debug_state *state); + +#endif + +#if !defined(HAS_NO_INPUT_FORMATTER) +void +sh_css_sp_set_if_configs( + const input_formatter_cfg_t *config_a, + const input_formatter_cfg_t *config_b, + const uint8_t if_config_index); +#endif + +void +sh_css_sp_program_input_circuit(int fmt_type, + int ch_id, + enum ia_css_input_mode input_mode); + +void +sh_css_sp_configure_sync_gen(int width, + int height, + int hblank_cycles, + int vblank_cycles); + +void +sh_css_sp_configure_tpg(int x_mask, + int y_mask, + int x_delta, + int y_delta, + int xy_mask); + +void +sh_css_sp_configure_prbs(int seed); + +void +sh_css_sp_configure_enable_raw_pool_locking(bool lock_all); + +void +sh_css_sp_enable_isys_event_queue(bool enable); + +void +sh_css_sp_set_disable_continuous_viewfinder(bool flag); + +void +sh_css_sp_reset_global_vars(void); + +/** + * @brief Initialize the DMA software-mask in the debug mode. + * This API should be ONLY called in the debugging mode. + * And it should be always called before the first call of + * "sh_css_set_dma_sw_reg(...)". + * + * @param[in] dma_id The ID of the target DMA. + * + * @return + * - true, if it is successful. + * - false, otherwise. + */ +bool +sh_css_sp_init_dma_sw_reg(int dma_id); + +/** + * @brief Set the DMA software-mask in the debug mode. + * This API should be ONLYL called in the debugging mode. Must + * call "sh_css_set_dma_sw_reg(...)" before this + * API is called for the first time. + * + * @param[in] dma_id The ID of the target DMA. + * @param[in] channel_id The ID of the target DMA channel. + * @param[in] request_type The type of the DMA request. + * For example: + * - "0" indicates the writing request. + * - "1" indicates the reading request. + * + * @param[in] enable If it is "true", the target DMA + * channel is enabled in the software. + * Otherwise, the target DMA channel + * is disabled in the software. + * + * @return + * - true, if it is successful. + * - false, otherwise. + */ +bool +sh_css_sp_set_dma_sw_reg(int dma_id, + int channel_id, + int request_type, + bool enable); + + +extern struct sh_css_sp_group sh_css_sp_group; +extern struct sh_css_sp_stage sh_css_sp_stage; +extern struct sh_css_isp_stage sh_css_isp_stage; + +#endif /* _SH_CSS_SP_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream.c new file mode 100644 index 0000000000000..60bddbb3d4c6c --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream.c @@ -0,0 +1,16 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* This file will contain the code to implement the functions declared in ia_css_stream.h + and associated helper functions */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c new file mode 100644 index 0000000000000..77f135e7dc3c2 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c @@ -0,0 +1,76 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "sh_css_stream_format.h" +#include + +unsigned int sh_css_stream_format_2_bits_per_subpixel( + enum atomisp_input_format format) +{ + unsigned int rval; + + switch (format) { + case ATOMISP_INPUT_FORMAT_RGB_444: + rval = 4; + break; + case ATOMISP_INPUT_FORMAT_RGB_555: + rval = 5; + break; + case ATOMISP_INPUT_FORMAT_RGB_565: + case ATOMISP_INPUT_FORMAT_RGB_666: + case ATOMISP_INPUT_FORMAT_RAW_6: + rval = 6; + break; + case ATOMISP_INPUT_FORMAT_RAW_7: + rval = 7; + break; + case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: + case ATOMISP_INPUT_FORMAT_YUV420_8: + case ATOMISP_INPUT_FORMAT_YUV422_8: + case ATOMISP_INPUT_FORMAT_RGB_888: + case ATOMISP_INPUT_FORMAT_RAW_8: + case ATOMISP_INPUT_FORMAT_BINARY_8: + case ATOMISP_INPUT_FORMAT_USER_DEF1: + case ATOMISP_INPUT_FORMAT_USER_DEF2: + case ATOMISP_INPUT_FORMAT_USER_DEF3: + case ATOMISP_INPUT_FORMAT_USER_DEF4: + case ATOMISP_INPUT_FORMAT_USER_DEF5: + case ATOMISP_INPUT_FORMAT_USER_DEF6: + case ATOMISP_INPUT_FORMAT_USER_DEF7: + case ATOMISP_INPUT_FORMAT_USER_DEF8: + rval = 8; + break; + case ATOMISP_INPUT_FORMAT_YUV420_10: + case ATOMISP_INPUT_FORMAT_YUV422_10: + case ATOMISP_INPUT_FORMAT_RAW_10: + rval = 10; + break; + case ATOMISP_INPUT_FORMAT_RAW_12: + rval = 12; + break; + case ATOMISP_INPUT_FORMAT_RAW_14: + rval = 14; + break; + case ATOMISP_INPUT_FORMAT_RAW_16: + case ATOMISP_INPUT_FORMAT_YUV420_16: + case ATOMISP_INPUT_FORMAT_YUV422_16: + rval = 16; + break; + default: + rval = 0; + break; + } + + return rval; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h new file mode 100644 index 0000000000000..b699f538e0ddb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h @@ -0,0 +1,23 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SH_CSS_STREAM_FORMAT_H +#define __SH_CSS_STREAM_FORMAT_H + +#include + +unsigned int sh_css_stream_format_2_bits_per_subpixel( + enum atomisp_input_format format); + +#endif /* __SH_CSS_STREAM_FORMAT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h new file mode 100644 index 0000000000000..0b8e3d8720691 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h @@ -0,0 +1,80 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __SH_CSS_STRUCT_H +#define __SH_CSS_STRUCT_H + +/* This header files contains the definition of the + sh_css struct and friends; locigally the file would + probably be called sh_css.h after the pattern + .h but sh_css.h is the predecesssor of ia_css.h + so this could cause confusion; hence the _struct + in the filename +*/ + +#include +#include +#include "ia_css_pipeline.h" +#include "ia_css_pipe_public.h" +#include "ia_css_frame_public.h" +#include "ia_css_queue.h" +#include "ia_css_irq.h" + +struct sh_css { + struct ia_css_pipe *active_pipes[IA_CSS_PIPELINE_NUM_MAX]; + /* All of the pipes created at any point of time. At this moment there can + * be no more than MAX_SP_THREADS of them because pipe_num is reused as SP + * thread_id to which a pipe's pipeline is associated. At a later point, if + * we support more pipe objects, we should add test code to test that + * possibility. Also, active_pipes[] should be able to hold only + * SH_CSS_MAX_SP_THREADS objects. Anything else is misleading. */ + struct ia_css_pipe *all_pipes[IA_CSS_PIPELINE_NUM_MAX]; + void * (*malloc)(size_t bytes, bool zero_mem); + void (*free)(void *ptr); +#ifdef ISP2401 + void * (*malloc_ex)(size_t bytes, bool zero_mem, const char *caller_func, int caller_line); + void (*free_ex)(void *ptr, const char *caller_func, int caller_line); +#endif + void (*flush)(struct ia_css_acc_fw *fw); + bool check_system_idle; +#ifndef ISP2401 + bool stop_copy_preview; +#endif + unsigned int num_cont_raw_frames; +#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) + unsigned int num_mipi_frames[N_CSI_PORTS]; + struct ia_css_frame *mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + struct ia_css_metadata *mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + unsigned int mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT]; + unsigned int mipi_frame_size[N_CSI_PORTS]; +#endif + hrt_vaddress sp_bin_addr; + hrt_data page_table_base_index; + unsigned int size_mem_words; /* \deprecated{Use ia_css_mipi_buffer_config instead.}*/ + enum ia_css_irq_type irq_type; + unsigned int pipe_counter; + + unsigned int type; /* 2400 or 2401 for now */ +}; + +#define IPU_2400 1 +#define IPU_2401 2 + +#define IS_2400() (my_css.type == IPU_2400) +#define IS_2401() (my_css.type == IPU_2401) + +extern struct sh_css my_css; + +#endif /* __SH_CSS_STRUCT_H */ + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h new file mode 100644 index 0000000000000..5ded3a1437bf7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h @@ -0,0 +1,37 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _SH_CSS_UDS_H_ +#define _SH_CSS_UDS_H_ + +#include + +#define SIZE_OF_SH_CSS_UDS_INFO_IN_BITS (4 * 16) +#define SIZE_OF_SH_CSS_CROP_POS_IN_BITS (2 * 16) + +/* Uds types, used in pipeline_global.h and sh_css_internal.h */ + +struct sh_css_uds_info { + uint16_t curr_dx; + uint16_t curr_dy; + uint16_t xc; + uint16_t yc; +}; + +struct sh_css_crop_pos { + uint16_t x; + uint16_t y; +}; + +#endif /* _SH_CSS_UDS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c new file mode 100644 index 0000000000000..6e0c5e7f8620d --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c @@ -0,0 +1,30 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "ia_css_version.h" +#include "ia_css_version_data.h" +#include "ia_css_err.h" +#include "sh_css_firmware.h" + +enum ia_css_err +ia_css_get_version(char *version, int max_size) +{ + if (max_size <= (int)strlen(CSS_VERSION_STRING) + (int)strlen(sh_css_get_fw_version()) + 5) + return IA_CSS_ERR_INVALID_ARGUMENTS; + strcpy(version, CSS_VERSION_STRING); + strcat(version, "FW:"); + strcat(version, sh_css_get_fw_version()); + strcat(version, "; "); + return IA_CSS_SUCCESS; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c new file mode 100644 index 0000000000000..15bc10b5e9b1b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c @@ -0,0 +1,727 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +/* + * This file contains entry functions for memory management of ISP driver + */ +#include +#include +#include +#include /* for kmap */ +#include /* for page_to_phys */ +#include + +#include "hmm/hmm.h" +#include "hmm/hmm_pool.h" +#include "hmm/hmm_bo.h" + +#include "atomisp_internal.h" +#include "asm/cacheflush.h" +#include "mmu/isp_mmu.h" +#include "mmu/sh_mmu_mrfld.h" + +struct hmm_bo_device bo_device; +struct hmm_pool dynamic_pool; +struct hmm_pool reserved_pool; +static ia_css_ptr dummy_ptr; +static bool hmm_initialized; +struct _hmm_mem_stat hmm_mem_stat; + +/* + * p: private + * s: shared + * u: user + * i: ion + */ +static const char hmm_bo_type_string[] = "psui"; + +static ssize_t bo_show(struct device *dev, struct device_attribute *attr, + char *buf, struct list_head *bo_list, bool active) +{ + ssize_t ret = 0; + struct hmm_buffer_object *bo; + unsigned long flags; + int i; + long total[HMM_BO_LAST] = { 0 }; + long count[HMM_BO_LAST] = { 0 }; + int index1 = 0; + int index2 = 0; + + ret = scnprintf(buf, PAGE_SIZE, "type pgnr\n"); + if (ret <= 0) + return 0; + + index1 += ret; + + spin_lock_irqsave(&bo_device.list_lock, flags); + list_for_each_entry(bo, bo_list, list) { + if ((active && (bo->status & HMM_BO_ALLOCED)) || + (!active && !(bo->status & HMM_BO_ALLOCED))) { + ret = scnprintf(buf + index1, PAGE_SIZE - index1, + "%c %d\n", + hmm_bo_type_string[bo->type], bo->pgnr); + + total[bo->type] += bo->pgnr; + count[bo->type]++; + if (ret > 0) + index1 += ret; + } + } + spin_unlock_irqrestore(&bo_device.list_lock, flags); + + for (i = 0; i < HMM_BO_LAST; i++) { + if (count[i]) { + ret = scnprintf(buf + index1 + index2, + PAGE_SIZE - index1 - index2, + "%ld %c buffer objects: %ld KB\n", + count[i], hmm_bo_type_string[i], + total[i] * 4); + if (ret > 0) + index2 += ret; + } + } + + /* Add trailing zero, not included by scnprintf */ + return index1 + index2 + 1; +} + +static ssize_t active_bo_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return bo_show(dev, attr, buf, &bo_device.entire_bo_list, true); +} + +static ssize_t free_bo_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return bo_show(dev, attr, buf, &bo_device.entire_bo_list, false); +} + +static ssize_t reserved_pool_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + ssize_t ret = 0; + + struct hmm_reserved_pool_info *pinfo = reserved_pool.pool_info; + unsigned long flags; + + if (!pinfo || !pinfo->initialized) + return 0; + + spin_lock_irqsave(&pinfo->list_lock, flags); + ret = scnprintf(buf, PAGE_SIZE, "%d out of %d pages available\n", + pinfo->index, pinfo->pgnr); + spin_unlock_irqrestore(&pinfo->list_lock, flags); + + if (ret > 0) + ret++; /* Add trailing zero, not included by scnprintf */ + + return ret; +}; + +static ssize_t dynamic_pool_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + ssize_t ret = 0; + + struct hmm_dynamic_pool_info *pinfo = dynamic_pool.pool_info; + unsigned long flags; + + if (!pinfo || !pinfo->initialized) + return 0; + + spin_lock_irqsave(&pinfo->list_lock, flags); + ret = scnprintf(buf, PAGE_SIZE, "%d (max %d) pages available\n", + pinfo->pgnr, pinfo->pool_size); + spin_unlock_irqrestore(&pinfo->list_lock, flags); + + if (ret > 0) + ret++; /* Add trailing zero, not included by scnprintf */ + + return ret; +}; + +static DEVICE_ATTR_RO(active_bo); +static DEVICE_ATTR_RO(free_bo); +static DEVICE_ATTR_RO(reserved_pool); +static DEVICE_ATTR_RO(dynamic_pool); + +static struct attribute *sysfs_attrs_ctrl[] = { + &dev_attr_active_bo.attr, + &dev_attr_free_bo.attr, + &dev_attr_reserved_pool.attr, + &dev_attr_dynamic_pool.attr, + NULL +}; + +static struct attribute_group atomisp_attribute_group[] = { + {.attrs = sysfs_attrs_ctrl }, +}; + +int hmm_init(void) +{ + int ret; + + ret = hmm_bo_device_init(&bo_device, &sh_mmu_mrfld, + ISP_VM_START, ISP_VM_SIZE); + if (ret) + dev_err(atomisp_dev, "hmm_bo_device_init failed.\n"); + + hmm_initialized = true; + + /* + * As hmm use NULL to indicate invalid ISP virtual address, + * and ISP_VM_START is defined to 0 too, so we allocate + * one piece of dummy memory, which should return value 0, + * at the beginning, to avoid hmm_alloc return 0 in the + * further allocation. + */ + dummy_ptr = hmm_alloc(1, HMM_BO_PRIVATE, 0, NULL, HMM_UNCACHED); + + if (!ret) { + ret = sysfs_create_group(&atomisp_dev->kobj, + atomisp_attribute_group); + if (ret) + dev_err(atomisp_dev, + "%s Failed to create sysfs\n", __func__); + } + + return ret; +} + +void hmm_cleanup(void) +{ + sysfs_remove_group(&atomisp_dev->kobj, atomisp_attribute_group); + + /* free dummy memory first */ + hmm_free(dummy_ptr); + dummy_ptr = 0; + + hmm_bo_device_exit(&bo_device); + hmm_initialized = false; +} + +ia_css_ptr hmm_alloc(size_t bytes, enum hmm_bo_type type, + int from_highmem, const void __user *userptr, bool cached) +{ + unsigned int pgnr; + struct hmm_buffer_object *bo; + int ret; + + /* + * Check if we are initialized. In the ideal world we wouldn't need + * this but we can tackle it once the driver is a lot cleaner + */ + + if (!hmm_initialized) + hmm_init(); + /* Get page number from size */ + pgnr = size_to_pgnr_ceil(bytes); + + /* Buffer object structure init */ + bo = hmm_bo_alloc(&bo_device, pgnr); + if (!bo) { + dev_err(atomisp_dev, "hmm_bo_create failed.\n"); + goto create_bo_err; + } + + /* Allocate pages for memory */ + ret = hmm_bo_alloc_pages(bo, type, from_highmem, userptr, cached); + if (ret) { + dev_err(atomisp_dev, "hmm_bo_alloc_pages failed.\n"); + goto alloc_page_err; + } + + /* Combind the virtual address and pages togather */ + ret = hmm_bo_bind(bo); + if (ret) { + dev_err(atomisp_dev, "hmm_bo_bind failed.\n"); + goto bind_err; + } + + hmm_mem_stat.tol_cnt += pgnr; + + return bo->start; + +bind_err: + hmm_bo_free_pages(bo); +alloc_page_err: + hmm_bo_unref(bo); +create_bo_err: + return 0; +} + +void hmm_free(ia_css_ptr virt) +{ + struct hmm_buffer_object *bo; + + WARN_ON(!virt); + + bo = hmm_bo_device_search_start(&bo_device, (unsigned int)virt); + + if (!bo) { + dev_err(atomisp_dev, + "can not find buffer object start with address 0x%x\n", + (unsigned int)virt); + return; + } + + hmm_mem_stat.tol_cnt -= bo->pgnr; + + hmm_bo_unbind(bo); + hmm_bo_free_pages(bo); + hmm_bo_unref(bo); +} + +static inline int hmm_check_bo(struct hmm_buffer_object *bo, unsigned int ptr) +{ + if (!bo) { + dev_err(atomisp_dev, + "can not find buffer object contains address 0x%x\n", + ptr); + return -EINVAL; + } + + if (!hmm_bo_page_allocated(bo)) { + dev_err(atomisp_dev, + "buffer object has no page allocated.\n"); + return -EINVAL; + } + + if (!hmm_bo_allocated(bo)) { + dev_err(atomisp_dev, + "buffer object has no virtual address space allocated.\n"); + return -EINVAL; + } + + return 0; +} + +/* Read function in ISP memory management */ +static int load_and_flush_by_kmap(ia_css_ptr virt, void *data, + unsigned int bytes) +{ + struct hmm_buffer_object *bo; + unsigned int idx, offset, len; + char *src, *des; + int ret; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + ret = hmm_check_bo(bo, virt); + if (ret) + return ret; + + des = (char *)data; + while (bytes) { + idx = (virt - bo->start) >> PAGE_SHIFT; + offset = (virt - bo->start) - (idx << PAGE_SHIFT); + + src = (char *)kmap(bo->page_obj[idx].page) + offset; + + if ((bytes + offset) >= PAGE_SIZE) { + len = PAGE_SIZE - offset; + bytes -= len; + } else { + len = bytes; + bytes = 0; + } + + virt += len; /* update virt for next loop */ + + if (des) { + memcpy(des, src, len); + des += len; + } + + clflush_cache_range(src, len); + + kunmap(bo->page_obj[idx].page); + } + + return 0; +} + +/* Read function in ISP memory management */ +static int load_and_flush(ia_css_ptr virt, void *data, unsigned int bytes) +{ + struct hmm_buffer_object *bo; + int ret; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + ret = hmm_check_bo(bo, virt); + if (ret) + return ret; + + if (bo->status & HMM_BO_VMAPED || bo->status & HMM_BO_VMAPED_CACHED) { + void *src = bo->vmap_addr; + + src += (virt - bo->start); + memcpy(data, src, bytes); + if (bo->status & HMM_BO_VMAPED_CACHED) + clflush_cache_range(src, bytes); + } else { + void *vptr; + + vptr = hmm_bo_vmap(bo, true); + if (!vptr) + return load_and_flush_by_kmap(virt, data, bytes); + else + vptr = vptr + (virt - bo->start); + + memcpy(data, vptr, bytes); + clflush_cache_range(vptr, bytes); + hmm_bo_vunmap(bo); + } + + return 0; +} + +/* Read function in ISP memory management */ +int hmm_load(ia_css_ptr virt, void *data, unsigned int bytes) +{ + if (!data) { + dev_err(atomisp_dev, + "hmm_load NULL argument\n"); + return -EINVAL; + } + return load_and_flush(virt, data, bytes); +} + +/* Flush hmm data from the data cache */ +int hmm_flush(ia_css_ptr virt, unsigned int bytes) +{ + return load_and_flush(virt, NULL, bytes); +} + +/* Write function in ISP memory management */ +int hmm_store(ia_css_ptr virt, const void *data, unsigned int bytes) +{ + struct hmm_buffer_object *bo; + unsigned int idx, offset, len; + char *src, *des; + int ret; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + ret = hmm_check_bo(bo, virt); + if (ret) + return ret; + + if (bo->status & HMM_BO_VMAPED || bo->status & HMM_BO_VMAPED_CACHED) { + void *dst = bo->vmap_addr; + + dst += (virt - bo->start); + memcpy(dst, data, bytes); + if (bo->status & HMM_BO_VMAPED_CACHED) + clflush_cache_range(dst, bytes); + } else { + void *vptr; + + vptr = hmm_bo_vmap(bo, true); + if (vptr) { + vptr = vptr + (virt - bo->start); + + memcpy(vptr, data, bytes); + clflush_cache_range(vptr, bytes); + hmm_bo_vunmap(bo); + return 0; + } + } + + src = (char *)data; + while (bytes) { + idx = (virt - bo->start) >> PAGE_SHIFT; + offset = (virt - bo->start) - (idx << PAGE_SHIFT); + + if (in_atomic()) + des = (char *)kmap_atomic(bo->page_obj[idx].page); + else + des = (char *)kmap(bo->page_obj[idx].page); + + if (!des) { + dev_err(atomisp_dev, + "kmap buffer object page failed: pg_idx = %d\n", + idx); + return -EINVAL; + } + + des += offset; + + if ((bytes + offset) >= PAGE_SIZE) { + len = PAGE_SIZE - offset; + bytes -= len; + } else { + len = bytes; + bytes = 0; + } + + virt += len; + + memcpy(des, src, len); + + src += len; + + clflush_cache_range(des, len); + + if (in_atomic()) + /* + * Note: kunmap_atomic requires return addr from + * kmap_atomic, not the page. See linux/highmem.h + */ + kunmap_atomic(des - offset); + else + kunmap(bo->page_obj[idx].page); + } + + return 0; +} + +/* memset function in ISP memory management */ +int hmm_set(ia_css_ptr virt, int c, unsigned int bytes) +{ + struct hmm_buffer_object *bo; + unsigned int idx, offset, len; + char *des; + int ret; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + ret = hmm_check_bo(bo, virt); + if (ret) + return ret; + + if (bo->status & HMM_BO_VMAPED || bo->status & HMM_BO_VMAPED_CACHED) { + void *dst = bo->vmap_addr; + + dst += (virt - bo->start); + memset(dst, c, bytes); + + if (bo->status & HMM_BO_VMAPED_CACHED) + clflush_cache_range(dst, bytes); + } else { + void *vptr; + + vptr = hmm_bo_vmap(bo, true); + if (vptr) { + vptr = vptr + (virt - bo->start); + memset(vptr, c, bytes); + clflush_cache_range(vptr, bytes); + hmm_bo_vunmap(bo); + return 0; + } + } + + while (bytes) { + idx = (virt - bo->start) >> PAGE_SHIFT; + offset = (virt - bo->start) - (idx << PAGE_SHIFT); + + des = (char *)kmap(bo->page_obj[idx].page) + offset; + + if ((bytes + offset) >= PAGE_SIZE) { + len = PAGE_SIZE - offset; + bytes -= len; + } else { + len = bytes; + bytes = 0; + } + + virt += len; + + memset(des, c, len); + + clflush_cache_range(des, len); + + kunmap(bo->page_obj[idx].page); + } + + return 0; +} + +/* Virtual address to physical address convert */ +phys_addr_t hmm_virt_to_phys(ia_css_ptr virt) +{ + unsigned int idx, offset; + struct hmm_buffer_object *bo; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + if (!bo) { + dev_err(atomisp_dev, + "can not find buffer object contains address 0x%x\n", + virt); + return -1; + } + + idx = (virt - bo->start) >> PAGE_SHIFT; + offset = (virt - bo->start) - (idx << PAGE_SHIFT); + + return page_to_phys(bo->page_obj[idx].page) + offset; +} + +int hmm_mmap(struct vm_area_struct *vma, ia_css_ptr virt) +{ + struct hmm_buffer_object *bo; + + bo = hmm_bo_device_search_start(&bo_device, virt); + if (!bo) { + dev_err(atomisp_dev, + "can not find buffer object start with address 0x%x\n", + virt); + return -EINVAL; + } + + return hmm_bo_mmap(vma, bo); +} + +/* Map ISP virtual address into IA virtual address */ +void *hmm_vmap(ia_css_ptr virt, bool cached) +{ + struct hmm_buffer_object *bo; + void *ptr; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + if (!bo) { + dev_err(atomisp_dev, + "can not find buffer object contains address 0x%x\n", + virt); + return NULL; + } + + ptr = hmm_bo_vmap(bo, cached); + if (ptr) + return ptr + (virt - bo->start); + else + return NULL; +} + +/* Flush the memory which is mapped as cached memory through hmm_vmap */ +void hmm_flush_vmap(ia_css_ptr virt) +{ + struct hmm_buffer_object *bo; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + if (!bo) { + dev_warn(atomisp_dev, + "can not find buffer object contains address 0x%x\n", + virt); + return; + } + + hmm_bo_flush_vmap(bo); +} + +void hmm_vunmap(ia_css_ptr virt) +{ + struct hmm_buffer_object *bo; + + bo = hmm_bo_device_search_in_range(&bo_device, virt); + if (!bo) { + dev_warn(atomisp_dev, + "can not find buffer object contains address 0x%x\n", + virt); + return; + } + + hmm_bo_vunmap(bo); +} + +int hmm_pool_register(unsigned int pool_size, enum hmm_pool_type pool_type) +{ + switch (pool_type) { + case HMM_POOL_TYPE_RESERVED: + reserved_pool.pops = &reserved_pops; + return reserved_pool.pops->pool_init(&reserved_pool.pool_info, + pool_size); + case HMM_POOL_TYPE_DYNAMIC: + dynamic_pool.pops = &dynamic_pops; + return dynamic_pool.pops->pool_init(&dynamic_pool.pool_info, + pool_size); + default: + dev_err(atomisp_dev, "invalid pool type.\n"); + return -EINVAL; + } +} + +void hmm_pool_unregister(enum hmm_pool_type pool_type) +{ + switch (pool_type) { + case HMM_POOL_TYPE_RESERVED: + if (reserved_pool.pops && reserved_pool.pops->pool_exit) + reserved_pool.pops->pool_exit(&reserved_pool.pool_info); + break; + case HMM_POOL_TYPE_DYNAMIC: + if (dynamic_pool.pops && dynamic_pool.pops->pool_exit) + dynamic_pool.pops->pool_exit(&dynamic_pool.pool_info); + break; + default: + dev_err(atomisp_dev, "invalid pool type.\n"); + break; + } + + return; +} + +void *hmm_isp_vaddr_to_host_vaddr(ia_css_ptr ptr, bool cached) +{ + return hmm_vmap(ptr, cached); + /* vmunmap will be done in hmm_bo_release() */ +} + +ia_css_ptr hmm_host_vaddr_to_hrt_vaddr(const void *ptr) +{ + struct hmm_buffer_object *bo; + + bo = hmm_bo_device_search_vmap_start(&bo_device, ptr); + if (bo) + return bo->start; + + dev_err(atomisp_dev, + "can not find buffer object whose kernel virtual address is %p\n", + ptr); + return 0; +} + +void hmm_show_mem_stat(const char *func, const int line) +{ + trace_printk("tol_cnt=%d usr_size=%d res_size=%d res_cnt=%d sys_size=%d dyc_thr=%d dyc_size=%d.\n", + hmm_mem_stat.tol_cnt, + hmm_mem_stat.usr_size, hmm_mem_stat.res_size, + hmm_mem_stat.res_cnt, hmm_mem_stat.sys_size, + hmm_mem_stat.dyc_thr, hmm_mem_stat.dyc_size); +} + +void hmm_init_mem_stat(int res_pgnr, int dyc_en, int dyc_pgnr) +{ + hmm_mem_stat.res_size = res_pgnr; + /* If reserved mem pool is not enabled, set its "mem stat" values as -1. */ + if (0 == hmm_mem_stat.res_size) { + hmm_mem_stat.res_size = -1; + hmm_mem_stat.res_cnt = -1; + } + + /* If dynamic memory pool is not enabled, set its "mem stat" values as -1. */ + if (!dyc_en) { + hmm_mem_stat.dyc_size = -1; + hmm_mem_stat.dyc_thr = -1; + } else { + hmm_mem_stat.dyc_size = 0; + hmm_mem_stat.dyc_thr = dyc_pgnr; + } + hmm_mem_stat.usr_size = 0; + hmm_mem_stat.sys_size = 0; + hmm_mem_stat.tol_cnt = 0; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c new file mode 100644 index 0000000000000..a6620d2c9f507 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c @@ -0,0 +1,1528 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +/* + * This file contains functions for buffer object structure management + */ +#include +#include +#include /* for GFP_ATOMIC */ +#include +#include +#include +#include +#include /* for kmalloc */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "atomisp_internal.h" +#include "hmm/hmm_common.h" +#include "hmm/hmm_pool.h" +#include "hmm/hmm_bo.h" + +static unsigned int order_to_nr(unsigned int order) +{ + return 1U << order; +} + +static unsigned int nr_to_order_bottom(unsigned int nr) +{ + return fls(nr) - 1; +} + +static struct hmm_buffer_object *__bo_alloc(struct kmem_cache *bo_cache) +{ + struct hmm_buffer_object *bo; + + bo = kmem_cache_alloc(bo_cache, GFP_KERNEL); + if (!bo) + dev_err(atomisp_dev, "%s: failed!\n", __func__); + + return bo; +} + +static int __bo_init(struct hmm_bo_device *bdev, struct hmm_buffer_object *bo, + unsigned int pgnr) +{ + check_bodev_null_return(bdev, -EINVAL); + var_equal_return(hmm_bo_device_inited(bdev), 0, -EINVAL, + "hmm_bo_device not inited yet.\n"); + /* prevent zero size buffer object */ + if (pgnr == 0) { + dev_err(atomisp_dev, "0 size buffer is not allowed.\n"); + return -EINVAL; + } + + memset(bo, 0, sizeof(*bo)); + mutex_init(&bo->mutex); + + /* init the bo->list HEAD as an element of entire_bo_list */ + INIT_LIST_HEAD(&bo->list); + + bo->bdev = bdev; + bo->vmap_addr = NULL; + bo->status = HMM_BO_FREE; + bo->start = bdev->start; + bo->pgnr = pgnr; + bo->end = bo->start + pgnr_to_size(pgnr); + bo->prev = NULL; + bo->next = NULL; + + return 0; +} + +static struct hmm_buffer_object *__bo_search_and_remove_from_free_rbtree( + struct rb_node *node, unsigned int pgnr) +{ + struct hmm_buffer_object *this, *ret_bo, *temp_bo; + + this = rb_entry(node, struct hmm_buffer_object, node); + if (this->pgnr == pgnr || + (this->pgnr > pgnr && this->node.rb_left == NULL)) { + goto remove_bo_and_return; + } else { + if (this->pgnr < pgnr) { + if (!this->node.rb_right) + return NULL; + ret_bo = __bo_search_and_remove_from_free_rbtree( + this->node.rb_right, pgnr); + } else { + ret_bo = __bo_search_and_remove_from_free_rbtree( + this->node.rb_left, pgnr); + } + if (!ret_bo) { + if (this->pgnr > pgnr) + goto remove_bo_and_return; + else + return NULL; + } + return ret_bo; + } + +remove_bo_and_return: + /* NOTE: All nodes on free rbtree have a 'prev' that points to NULL. + * 1. check if 'this->next' is NULL: + * yes: erase 'this' node and rebalance rbtree, return 'this'. + */ + if (this->next == NULL) { + rb_erase(&this->node, &this->bdev->free_rbtree); + return this; + } + /* NOTE: if 'this->next' is not NULL, always return 'this->next' bo. + * 2. check if 'this->next->next' is NULL: + * yes: change the related 'next/prev' pointer, + * return 'this->next' but the rbtree stays unchanged. + */ + temp_bo = this->next; + this->next = temp_bo->next; + if (temp_bo->next) + temp_bo->next->prev = this; + temp_bo->next = NULL; + temp_bo->prev = NULL; + return temp_bo; +} + +static struct hmm_buffer_object *__bo_search_by_addr(struct rb_root *root, + ia_css_ptr start) +{ + struct rb_node *n = root->rb_node; + struct hmm_buffer_object *bo; + + do { + bo = rb_entry(n, struct hmm_buffer_object, node); + + if (bo->start > start) { + if (n->rb_left == NULL) + return NULL; + n = n->rb_left; + } else if (bo->start < start) { + if (n->rb_right == NULL) + return NULL; + n = n->rb_right; + } else { + return bo; + } + } while (n); + + return NULL; +} + +static struct hmm_buffer_object *__bo_search_by_addr_in_range( + struct rb_root *root, unsigned int start) +{ + struct rb_node *n = root->rb_node; + struct hmm_buffer_object *bo; + + do { + bo = rb_entry(n, struct hmm_buffer_object, node); + + if (bo->start > start) { + if (n->rb_left == NULL) + return NULL; + n = n->rb_left; + } else { + if (bo->end > start) + return bo; + if (n->rb_right == NULL) + return NULL; + n = n->rb_right; + } + } while (n); + + return NULL; +} + +static void __bo_insert_to_free_rbtree(struct rb_root *root, + struct hmm_buffer_object *bo) +{ + struct rb_node **new = &(root->rb_node); + struct rb_node *parent = NULL; + struct hmm_buffer_object *this; + unsigned int pgnr = bo->pgnr; + + while (*new) { + parent = *new; + this = container_of(*new, struct hmm_buffer_object, node); + + if (pgnr < this->pgnr) { + new = &((*new)->rb_left); + } else if (pgnr > this->pgnr) { + new = &((*new)->rb_right); + } else { + bo->prev = this; + bo->next = this->next; + if (this->next) + this->next->prev = bo; + this->next = bo; + bo->status = (bo->status & ~HMM_BO_MASK) | HMM_BO_FREE; + return; + } + } + + bo->status = (bo->status & ~HMM_BO_MASK) | HMM_BO_FREE; + + rb_link_node(&bo->node, parent, new); + rb_insert_color(&bo->node, root); +} + +static void __bo_insert_to_alloc_rbtree(struct rb_root *root, + struct hmm_buffer_object *bo) +{ + struct rb_node **new = &(root->rb_node); + struct rb_node *parent = NULL; + struct hmm_buffer_object *this; + unsigned int start = bo->start; + + while (*new) { + parent = *new; + this = container_of(*new, struct hmm_buffer_object, node); + + if (start < this->start) + new = &((*new)->rb_left); + else + new = &((*new)->rb_right); + } + + kref_init(&bo->kref); + bo->status = (bo->status & ~HMM_BO_MASK) | HMM_BO_ALLOCED; + + rb_link_node(&bo->node, parent, new); + rb_insert_color(&bo->node, root); +} + +static struct hmm_buffer_object *__bo_break_up(struct hmm_bo_device *bdev, + struct hmm_buffer_object *bo, + unsigned int pgnr) +{ + struct hmm_buffer_object *new_bo; + unsigned long flags; + int ret; + + new_bo = __bo_alloc(bdev->bo_cache); + if (!new_bo) { + dev_err(atomisp_dev, "%s: __bo_alloc failed!\n", __func__); + return NULL; + } + ret = __bo_init(bdev, new_bo, pgnr); + if (ret) { + dev_err(atomisp_dev, "%s: __bo_init failed!\n", __func__); + kmem_cache_free(bdev->bo_cache, new_bo); + return NULL; + } + + new_bo->start = bo->start; + new_bo->end = new_bo->start + pgnr_to_size(pgnr); + bo->start = new_bo->end; + bo->pgnr = bo->pgnr - pgnr; + + spin_lock_irqsave(&bdev->list_lock, flags); + list_add_tail(&new_bo->list, &bo->list); + spin_unlock_irqrestore(&bdev->list_lock, flags); + + return new_bo; +} + +static void __bo_take_off_handling(struct hmm_buffer_object *bo) +{ + struct hmm_bo_device *bdev = bo->bdev; + /* There are 4 situations when we take off a known bo from free rbtree: + * 1. if bo->next && bo->prev == NULL, bo is a rbtree node + * and does not have a linked list after bo, to take off this bo, + * we just need erase bo directly and rebalance the free rbtree + */ + if (bo->prev == NULL && bo->next == NULL) { + rb_erase(&bo->node, &bdev->free_rbtree); + /* 2. when bo->next != NULL && bo->prev == NULL, bo is a rbtree node, + * and has a linked list,to take off this bo we need erase bo + * first, then, insert bo->next into free rbtree and rebalance + * the free rbtree + */ + } else if (bo->prev == NULL && bo->next != NULL) { + bo->next->prev = NULL; + rb_erase(&bo->node, &bdev->free_rbtree); + __bo_insert_to_free_rbtree(&bdev->free_rbtree, bo->next); + bo->next = NULL; + /* 3. when bo->prev != NULL && bo->next == NULL, bo is not a rbtree + * node, bo is the last element of the linked list after rbtree + * node, to take off this bo, we just need set the "prev/next" + * pointers to NULL, the free rbtree stays unchaged + */ + } else if (bo->prev != NULL && bo->next == NULL) { + bo->prev->next = NULL; + bo->prev = NULL; + /* 4. when bo->prev != NULL && bo->next != NULL ,bo is not a rbtree + * node, bo is in the middle of the linked list after rbtree node, + * to take off this bo, we just set take the "prev/next" pointers + * to NULL, the free rbtree stays unchaged + */ + } else if (bo->prev != NULL && bo->next != NULL) { + bo->next->prev = bo->prev; + bo->prev->next = bo->next; + bo->next = NULL; + bo->prev = NULL; + } +} + +static struct hmm_buffer_object *__bo_merge(struct hmm_buffer_object *bo, + struct hmm_buffer_object *next_bo) +{ + struct hmm_bo_device *bdev; + unsigned long flags; + + bdev = bo->bdev; + next_bo->start = bo->start; + next_bo->pgnr = next_bo->pgnr + bo->pgnr; + + spin_lock_irqsave(&bdev->list_lock, flags); + list_del(&bo->list); + spin_unlock_irqrestore(&bdev->list_lock, flags); + + kmem_cache_free(bo->bdev->bo_cache, bo); + + return next_bo; +} + +/* + * hmm_bo_device functions. + */ +int hmm_bo_device_init(struct hmm_bo_device *bdev, + struct isp_mmu_client *mmu_driver, + unsigned int vaddr_start, + unsigned int size) +{ + struct hmm_buffer_object *bo; + unsigned long flags; + int ret; + + check_bodev_null_return(bdev, -EINVAL); + + ret = isp_mmu_init(&bdev->mmu, mmu_driver); + if (ret) { + dev_err(atomisp_dev, "isp_mmu_init failed.\n"); + return ret; + } + + bdev->start = vaddr_start; + bdev->pgnr = size_to_pgnr_ceil(size); + bdev->size = pgnr_to_size(bdev->pgnr); + + spin_lock_init(&bdev->list_lock); + mutex_init(&bdev->rbtree_mutex); + + bdev->flag = HMM_BO_DEVICE_INITED; + + INIT_LIST_HEAD(&bdev->entire_bo_list); + bdev->allocated_rbtree = RB_ROOT; + bdev->free_rbtree = RB_ROOT; + + bdev->bo_cache = kmem_cache_create("bo_cache", + sizeof(struct hmm_buffer_object), 0, 0, NULL); + if (!bdev->bo_cache) { + dev_err(atomisp_dev, "%s: create cache failed!\n", __func__); + isp_mmu_exit(&bdev->mmu); + return -ENOMEM; + } + + bo = __bo_alloc(bdev->bo_cache); + if (!bo) { + dev_err(atomisp_dev, "%s: __bo_alloc failed!\n", __func__); + isp_mmu_exit(&bdev->mmu); + return -ENOMEM; + } + + ret = __bo_init(bdev, bo, bdev->pgnr); + if (ret) { + dev_err(atomisp_dev, "%s: __bo_init failed!\n", __func__); + kmem_cache_free(bdev->bo_cache, bo); + isp_mmu_exit(&bdev->mmu); + return -EINVAL; + } + + spin_lock_irqsave(&bdev->list_lock, flags); + list_add_tail(&bo->list, &bdev->entire_bo_list); + spin_unlock_irqrestore(&bdev->list_lock, flags); + + __bo_insert_to_free_rbtree(&bdev->free_rbtree, bo); + + return 0; +} + +struct hmm_buffer_object *hmm_bo_alloc(struct hmm_bo_device *bdev, + unsigned int pgnr) +{ + struct hmm_buffer_object *bo, *new_bo; + struct rb_root *root = &bdev->free_rbtree; + + check_bodev_null_return(bdev, NULL); + var_equal_return(hmm_bo_device_inited(bdev), 0, NULL, + "hmm_bo_device not inited yet.\n"); + + if (pgnr == 0) { + dev_err(atomisp_dev, "0 size buffer is not allowed.\n"); + return NULL; + } + + mutex_lock(&bdev->rbtree_mutex); + bo = __bo_search_and_remove_from_free_rbtree(root->rb_node, pgnr); + if (!bo) { + mutex_unlock(&bdev->rbtree_mutex); + dev_err(atomisp_dev, "%s: Out of Memory! hmm_bo_alloc failed", + __func__); + return NULL; + } + + if (bo->pgnr > pgnr) { + new_bo = __bo_break_up(bdev, bo, pgnr); + if (!new_bo) { + mutex_unlock(&bdev->rbtree_mutex); + dev_err(atomisp_dev, "%s: __bo_break_up failed!\n", + __func__); + return NULL; + } + + __bo_insert_to_alloc_rbtree(&bdev->allocated_rbtree, new_bo); + __bo_insert_to_free_rbtree(&bdev->free_rbtree, bo); + + mutex_unlock(&bdev->rbtree_mutex); + return new_bo; + } + + __bo_insert_to_alloc_rbtree(&bdev->allocated_rbtree, bo); + + mutex_unlock(&bdev->rbtree_mutex); + return bo; +} + +void hmm_bo_release(struct hmm_buffer_object *bo) +{ + struct hmm_bo_device *bdev = bo->bdev; + struct hmm_buffer_object *next_bo, *prev_bo; + + mutex_lock(&bdev->rbtree_mutex); + + /* + * FIX ME: + * + * how to destroy the bo when it is stilled MMAPED? + * + * ideally, this will not happened as hmm_bo_release + * will only be called when kref reaches 0, and in mmap + * operation the hmm_bo_ref will eventually be called. + * so, if this happened, something goes wrong. + */ + if (bo->status & HMM_BO_MMAPED) { + mutex_unlock(&bdev->rbtree_mutex); + dev_dbg(atomisp_dev, "destroy bo which is MMAPED, do nothing\n"); + return; + } + + if (bo->status & HMM_BO_BINDED) { + dev_warn(atomisp_dev, "the bo is still binded, unbind it first...\n"); + hmm_bo_unbind(bo); + } + + if (bo->status & HMM_BO_PAGE_ALLOCED) { + dev_warn(atomisp_dev, "the pages is not freed, free pages first\n"); + hmm_bo_free_pages(bo); + } + if (bo->status & HMM_BO_VMAPED || bo->status & HMM_BO_VMAPED_CACHED) { + dev_warn(atomisp_dev, "the vunmap is not done, do it...\n"); + hmm_bo_vunmap(bo); + } + + rb_erase(&bo->node, &bdev->allocated_rbtree); + + prev_bo = list_entry(bo->list.prev, struct hmm_buffer_object, list); + next_bo = list_entry(bo->list.next, struct hmm_buffer_object, list); + + if (bo->list.prev != &bdev->entire_bo_list && + prev_bo->end == bo->start && + (prev_bo->status & HMM_BO_MASK) == HMM_BO_FREE) { + __bo_take_off_handling(prev_bo); + bo = __bo_merge(prev_bo, bo); + } + + if (bo->list.next != &bdev->entire_bo_list && + next_bo->start == bo->end && + (next_bo->status & HMM_BO_MASK) == HMM_BO_FREE) { + __bo_take_off_handling(next_bo); + bo = __bo_merge(bo, next_bo); + } + + __bo_insert_to_free_rbtree(&bdev->free_rbtree, bo); + + mutex_unlock(&bdev->rbtree_mutex); + return; +} + +void hmm_bo_device_exit(struct hmm_bo_device *bdev) +{ + struct hmm_buffer_object *bo; + unsigned long flags; + + dev_dbg(atomisp_dev, "%s: entering!\n", __func__); + + check_bodev_null_return_void(bdev); + + /* + * release all allocated bos even they a in use + * and all bos will be merged into a big bo + */ + while (!RB_EMPTY_ROOT(&bdev->allocated_rbtree)) + hmm_bo_release( + rbtree_node_to_hmm_bo(bdev->allocated_rbtree.rb_node)); + + dev_dbg(atomisp_dev, "%s: finished releasing all allocated bos!\n", + __func__); + + /* free all bos to release all ISP virtual memory */ + while (!list_empty(&bdev->entire_bo_list)) { + bo = list_to_hmm_bo(bdev->entire_bo_list.next); + + spin_lock_irqsave(&bdev->list_lock, flags); + list_del(&bo->list); + spin_unlock_irqrestore(&bdev->list_lock, flags); + + kmem_cache_free(bdev->bo_cache, bo); + } + + dev_dbg(atomisp_dev, "%s: finished to free all bos!\n", __func__); + + kmem_cache_destroy(bdev->bo_cache); + + isp_mmu_exit(&bdev->mmu); +} + +int hmm_bo_device_inited(struct hmm_bo_device *bdev) +{ + check_bodev_null_return(bdev, -EINVAL); + + return bdev->flag == HMM_BO_DEVICE_INITED; +} + +int hmm_bo_allocated(struct hmm_buffer_object *bo) +{ + check_bo_null_return(bo, 0); + + return bo->status & HMM_BO_ALLOCED; +} + +struct hmm_buffer_object *hmm_bo_device_search_start( + struct hmm_bo_device *bdev, ia_css_ptr vaddr) +{ + struct hmm_buffer_object *bo; + + check_bodev_null_return(bdev, NULL); + + mutex_lock(&bdev->rbtree_mutex); + bo = __bo_search_by_addr(&bdev->allocated_rbtree, vaddr); + if (!bo) { + mutex_unlock(&bdev->rbtree_mutex); + dev_err(atomisp_dev, "%s can not find bo with addr: 0x%x\n", + __func__, vaddr); + return NULL; + } + mutex_unlock(&bdev->rbtree_mutex); + + return bo; +} + +struct hmm_buffer_object *hmm_bo_device_search_in_range( + struct hmm_bo_device *bdev, unsigned int vaddr) +{ + struct hmm_buffer_object *bo; + + check_bodev_null_return(bdev, NULL); + + mutex_lock(&bdev->rbtree_mutex); + bo = __bo_search_by_addr_in_range(&bdev->allocated_rbtree, vaddr); + if (!bo) { + mutex_unlock(&bdev->rbtree_mutex); + dev_err(atomisp_dev, "%s can not find bo contain addr: 0x%x\n", + __func__, vaddr); + return NULL; + } + mutex_unlock(&bdev->rbtree_mutex); + + return bo; +} + +struct hmm_buffer_object *hmm_bo_device_search_vmap_start( + struct hmm_bo_device *bdev, const void *vaddr) +{ + struct list_head *pos; + struct hmm_buffer_object *bo; + unsigned long flags; + + check_bodev_null_return(bdev, NULL); + + spin_lock_irqsave(&bdev->list_lock, flags); + list_for_each(pos, &bdev->entire_bo_list) { + bo = list_to_hmm_bo(pos); + /* pass bo which has no vm_node allocated */ + if ((bo->status & HMM_BO_MASK) == HMM_BO_FREE) + continue; + if (bo->vmap_addr == vaddr) + goto found; + } + spin_unlock_irqrestore(&bdev->list_lock, flags); + return NULL; +found: + spin_unlock_irqrestore(&bdev->list_lock, flags); + return bo; + +} + + +static void free_private_bo_pages(struct hmm_buffer_object *bo, + struct hmm_pool *dypool, + struct hmm_pool *repool, + int free_pgnr) +{ + int i, ret; + + for (i = 0; i < free_pgnr; i++) { + switch (bo->page_obj[i].type) { + case HMM_PAGE_TYPE_RESERVED: + if (repool->pops + && repool->pops->pool_free_pages) { + repool->pops->pool_free_pages(repool->pool_info, + &bo->page_obj[i]); + hmm_mem_stat.res_cnt--; + } + break; + /* + * HMM_PAGE_TYPE_GENERAL indicates that pages are from system + * memory, so when free them, they should be put into dynamic + * pool. + */ + case HMM_PAGE_TYPE_DYNAMIC: + case HMM_PAGE_TYPE_GENERAL: + if (dypool->pops + && dypool->pops->pool_inited + && dypool->pops->pool_inited(dypool->pool_info)) { + if (dypool->pops->pool_free_pages) + dypool->pops->pool_free_pages( + dypool->pool_info, + &bo->page_obj[i]); + break; + } + + /* + * if dynamic memory pool doesn't exist, need to free + * pages to system directly. + */ + default: + ret = set_pages_wb(bo->page_obj[i].page, 1); + if (ret) + dev_err(atomisp_dev, + "set page to WB err ...ret = %d\n", + ret); + /* + W/A: set_pages_wb seldom return value = -EFAULT + indicate that address of page is not in valid + range(0xffff880000000000~0xffffc7ffffffffff) + then, _free_pages would panic; Do not know why page + address be valid,it maybe memory corruption by lowmemory + */ + if (!ret) { + __free_pages(bo->page_obj[i].page, 0); + hmm_mem_stat.sys_size--; + } + break; + } + } + + return; +} + +/*Allocate pages which will be used only by ISP*/ +static int alloc_private_pages(struct hmm_buffer_object *bo, + int from_highmem, + bool cached, + struct hmm_pool *dypool, + struct hmm_pool *repool) +{ + int ret; + unsigned int pgnr, order, blk_pgnr, alloc_pgnr; + struct page *pages; + gfp_t gfp = GFP_NOWAIT | __GFP_NOWARN; /* REVISIT: need __GFP_FS too? */ + int i, j; + int failure_number = 0; + bool reduce_order = false; + bool lack_mem = true; + + if (from_highmem) + gfp |= __GFP_HIGHMEM; + + pgnr = bo->pgnr; + + bo->page_obj = kmalloc_array(pgnr, sizeof(struct hmm_page_object), + GFP_KERNEL); + if (unlikely(!bo->page_obj)) + return -ENOMEM; + + i = 0; + alloc_pgnr = 0; + + /* + * get physical pages from dynamic pages pool. + */ + if (dypool->pops && dypool->pops->pool_alloc_pages) { + alloc_pgnr = dypool->pops->pool_alloc_pages(dypool->pool_info, + bo->page_obj, pgnr, + cached); + hmm_mem_stat.dyc_size -= alloc_pgnr; + + if (alloc_pgnr == pgnr) + return 0; + } + + pgnr -= alloc_pgnr; + i += alloc_pgnr; + + /* + * get physical pages from reserved pages pool for atomisp. + */ + if (repool->pops && repool->pops->pool_alloc_pages) { + alloc_pgnr = repool->pops->pool_alloc_pages(repool->pool_info, + &bo->page_obj[i], pgnr, + cached); + hmm_mem_stat.res_cnt += alloc_pgnr; + if (alloc_pgnr == pgnr) + return 0; + } + + pgnr -= alloc_pgnr; + i += alloc_pgnr; + + while (pgnr) { + order = nr_to_order_bottom(pgnr); + /* + * if be short of memory, we will set order to 0 + * everytime. + */ + if (lack_mem) + order = HMM_MIN_ORDER; + else if (order > HMM_MAX_ORDER) + order = HMM_MAX_ORDER; +retry: + /* + * When order > HMM_MIN_ORDER, for performance reasons we don't + * want alloc_pages() to sleep. In case it fails and fallbacks + * to HMM_MIN_ORDER or in case the requested order is originally + * the minimum value, we can allow alloc_pages() to sleep for + * robustness purpose. + * + * REVISIT: why __GFP_FS is necessary? + */ + if (order == HMM_MIN_ORDER) { + gfp &= ~GFP_NOWAIT; + gfp |= __GFP_RECLAIM | __GFP_FS; + } + + pages = alloc_pages(gfp, order); + if (unlikely(!pages)) { + /* + * in low memory case, if allocation page fails, + * we turn to try if order=0 allocation could + * succeed. if order=0 fails too, that means there is + * no memory left. + */ + if (order == HMM_MIN_ORDER) { + dev_err(atomisp_dev, + "%s: cannot allocate pages\n", + __func__); + goto cleanup; + } + order = HMM_MIN_ORDER; + failure_number++; + reduce_order = true; + /* + * if fail two times continuously, we think be short + * of memory now. + */ + if (failure_number == 2) { + lack_mem = true; + failure_number = 0; + } + goto retry; + } else { + blk_pgnr = order_to_nr(order); + + if (!cached) { + /* + * set memory to uncacheable -- UC_MINUS + */ + ret = set_pages_uc(pages, blk_pgnr); + if (ret) { + dev_err(atomisp_dev, + "set page uncacheable" + "failed.\n"); + + __free_pages(pages, order); + + goto cleanup; + } + } + + for (j = 0; j < blk_pgnr; j++) { + bo->page_obj[i].page = pages + j; + bo->page_obj[i++].type = HMM_PAGE_TYPE_GENERAL; + } + + pgnr -= blk_pgnr; + hmm_mem_stat.sys_size += blk_pgnr; + + /* + * if order is not reduced this time, clear + * failure_number. + */ + if (reduce_order) + reduce_order = false; + else + failure_number = 0; + } + } + + return 0; +cleanup: + alloc_pgnr = i; + free_private_bo_pages(bo, dypool, repool, alloc_pgnr); + + kfree(bo->page_obj); + + return -ENOMEM; +} + +static void free_private_pages(struct hmm_buffer_object *bo, + struct hmm_pool *dypool, + struct hmm_pool *repool) +{ + free_private_bo_pages(bo, dypool, repool, bo->pgnr); + + kfree(bo->page_obj); +} + +/* + * Hacked from kernel function __get_user_pages in mm/memory.c + * + * Handle buffers allocated by other kernel space driver and mmaped into user + * space, function Ignore the VM_PFNMAP and VM_IO flag in VMA structure + * + * Get physical pages from user space virtual address and update into page list + */ +static int __get_pfnmap_pages(struct task_struct *tsk, struct mm_struct *mm, + unsigned long start, int nr_pages, + unsigned int gup_flags, struct page **pages, + struct vm_area_struct **vmas) +{ + int i, ret; + unsigned long vm_flags; + + if (nr_pages <= 0) + return 0; + + VM_BUG_ON(!!pages != !!(gup_flags & FOLL_GET)); + + /* + * Require read or write permissions. + * If FOLL_FORCE is set, we only require the "MAY" flags. + */ + vm_flags = (gup_flags & FOLL_WRITE) ? + (VM_WRITE | VM_MAYWRITE) : (VM_READ | VM_MAYREAD); + vm_flags &= (gup_flags & FOLL_FORCE) ? + (VM_MAYREAD | VM_MAYWRITE) : (VM_READ | VM_WRITE); + i = 0; + + do { + struct vm_area_struct *vma; + + vma = find_vma(mm, start); + if (!vma) { + dev_err(atomisp_dev, "find_vma failed\n"); + return i ? : -EFAULT; + } + + if (is_vm_hugetlb_page(vma)) { + /* + i = follow_hugetlb_page(mm, vma, pages, vmas, + &start, &nr_pages, i, gup_flags); + */ + continue; + } + + do { + struct page *page; + unsigned long pfn; + + /* + * If we have a pending SIGKILL, don't keep faulting + * pages and potentially allocating memory. + */ + if (unlikely(fatal_signal_pending(current))) { + dev_err(atomisp_dev, + "fatal_signal_pending in %s\n", + __func__); + return i ? i : -ERESTARTSYS; + } + + ret = follow_pfn(vma, start, &pfn); + if (ret) { + dev_err(atomisp_dev, "follow_pfn() failed\n"); + return i ? : -EFAULT; + } + + page = pfn_to_page(pfn); + if (IS_ERR(page)) + return i ? i : PTR_ERR(page); + if (pages) { + pages[i] = page; + get_page(page); + flush_anon_page(vma, page, start); + flush_dcache_page(page); + } + if (vmas) + vmas[i] = vma; + i++; + start += PAGE_SIZE; + nr_pages--; + } while (nr_pages && start < vma->vm_end); + } while (nr_pages); + + return i; +} + +static int get_pfnmap_pages(struct task_struct *tsk, struct mm_struct *mm, + unsigned long start, int nr_pages, int write, int force, + struct page **pages, struct vm_area_struct **vmas) +{ + int flags = FOLL_TOUCH; + + if (pages) + flags |= FOLL_GET; + if (write) + flags |= FOLL_WRITE; + if (force) + flags |= FOLL_FORCE; + + return __get_pfnmap_pages(tsk, mm, start, nr_pages, flags, pages, vmas); +} + +/* + * Convert user space virtual address into pages list + */ +static int alloc_user_pages(struct hmm_buffer_object *bo, + const void __user *userptr, bool cached) +{ + int page_nr; + int i; + struct vm_area_struct *vma; + struct page **pages; + + pages = kmalloc_array(bo->pgnr, sizeof(struct page *), GFP_KERNEL); + if (unlikely(!pages)) + return -ENOMEM; + + bo->page_obj = kmalloc_array(bo->pgnr, sizeof(struct hmm_page_object), + GFP_KERNEL); + if (unlikely(!bo->page_obj)) { + kfree(pages); + return -ENOMEM; + } + + mutex_unlock(&bo->mutex); + down_read(¤t->mm->mmap_sem); + vma = find_vma(current->mm, (unsigned long)userptr); + up_read(¤t->mm->mmap_sem); + if (vma == NULL) { + dev_err(atomisp_dev, "find_vma failed\n"); + kfree(bo->page_obj); + kfree(pages); + mutex_lock(&bo->mutex); + return -EFAULT; + } + mutex_lock(&bo->mutex); + /* + * Handle frame buffer allocated in other kerenl space driver + * and map to user space + */ + if (vma->vm_flags & (VM_IO | VM_PFNMAP)) { + page_nr = get_pfnmap_pages(current, current->mm, + (unsigned long)userptr, + (int)(bo->pgnr), 1, 0, + pages, NULL); + bo->mem_type = HMM_BO_MEM_TYPE_PFN; + } else { + /*Handle frame buffer allocated in user space*/ + mutex_unlock(&bo->mutex); + page_nr = get_user_pages_fast((unsigned long)userptr, + (int)(bo->pgnr), 1, pages); + mutex_lock(&bo->mutex); + bo->mem_type = HMM_BO_MEM_TYPE_USER; + } + + /* can be written by caller, not forced */ + if (page_nr != bo->pgnr) { + dev_err(atomisp_dev, + "get_user_pages err: bo->pgnr = %d, " + "pgnr actually pinned = %d.\n", + bo->pgnr, page_nr); + goto out_of_mem; + } + + for (i = 0; i < bo->pgnr; i++) { + bo->page_obj[i].page = pages[i]; + bo->page_obj[i].type = HMM_PAGE_TYPE_GENERAL; + } + hmm_mem_stat.usr_size += bo->pgnr; + kfree(pages); + + return 0; + +out_of_mem: + for (i = 0; i < page_nr; i++) + put_page(pages[i]); + kfree(pages); + kfree(bo->page_obj); + + return -ENOMEM; +} + +static void free_user_pages(struct hmm_buffer_object *bo) +{ + int i; + + for (i = 0; i < bo->pgnr; i++) + put_page(bo->page_obj[i].page); + hmm_mem_stat.usr_size -= bo->pgnr; + + kfree(bo->page_obj); +} + +/* + * allocate/free physical pages for the bo. + * + * type indicate where are the pages from. currently we have 3 types + * of memory: HMM_BO_PRIVATE, HMM_BO_USER, HMM_BO_SHARE. + * + * from_highmem is only valid when type is HMM_BO_PRIVATE, it will + * try to alloc memory from highmem if from_highmem is set. + * + * userptr is only valid when type is HMM_BO_USER, it indicates + * the start address from user space task. + * + * from_highmem and userptr will both be ignored when type is + * HMM_BO_SHARE. + */ +int hmm_bo_alloc_pages(struct hmm_buffer_object *bo, + enum hmm_bo_type type, int from_highmem, + const void __user *userptr, bool cached) +{ + int ret = -EINVAL; + + check_bo_null_return(bo, -EINVAL); + + mutex_lock(&bo->mutex); + check_bo_status_no_goto(bo, HMM_BO_PAGE_ALLOCED, status_err); + + /* + * TO DO: + * add HMM_BO_USER type + */ + if (type == HMM_BO_PRIVATE) { + ret = alloc_private_pages(bo, from_highmem, + cached, &dynamic_pool, &reserved_pool); + } else if (type == HMM_BO_USER) { + ret = alloc_user_pages(bo, userptr, cached); + } else { + dev_err(atomisp_dev, "invalid buffer type.\n"); + ret = -EINVAL; + } + if (ret) + goto alloc_err; + + bo->type = type; + + bo->status |= HMM_BO_PAGE_ALLOCED; + + mutex_unlock(&bo->mutex); + + return 0; + +alloc_err: + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, "alloc pages err...\n"); + return ret; +status_err: + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, + "buffer object has already page allocated.\n"); + return -EINVAL; +} + +/* + * free physical pages of the bo. + */ +void hmm_bo_free_pages(struct hmm_buffer_object *bo) +{ + check_bo_null_return_void(bo); + + mutex_lock(&bo->mutex); + + check_bo_status_yes_goto(bo, HMM_BO_PAGE_ALLOCED, status_err2); + + /* clear the flag anyway. */ + bo->status &= (~HMM_BO_PAGE_ALLOCED); + + if (bo->type == HMM_BO_PRIVATE) + free_private_pages(bo, &dynamic_pool, &reserved_pool); + else if (bo->type == HMM_BO_USER) + free_user_pages(bo); + else + dev_err(atomisp_dev, "invalid buffer type.\n"); + mutex_unlock(&bo->mutex); + + return; + +status_err2: + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, + "buffer object not page allocated yet.\n"); +} + +int hmm_bo_page_allocated(struct hmm_buffer_object *bo) +{ + check_bo_null_return(bo, 0); + + return bo->status & HMM_BO_PAGE_ALLOCED; +} + +/* + * get physical page info of the bo. + */ +int hmm_bo_get_page_info(struct hmm_buffer_object *bo, + struct hmm_page_object **page_obj, int *pgnr) +{ + check_bo_null_return(bo, -EINVAL); + + mutex_lock(&bo->mutex); + + check_bo_status_yes_goto(bo, HMM_BO_PAGE_ALLOCED, status_err); + + *page_obj = bo->page_obj; + *pgnr = bo->pgnr; + + mutex_unlock(&bo->mutex); + + return 0; + +status_err: + dev_err(atomisp_dev, + "buffer object not page allocated yet.\n"); + mutex_unlock(&bo->mutex); + return -EINVAL; +} + +/* + * bind the physical pages to a virtual address space. + */ +int hmm_bo_bind(struct hmm_buffer_object *bo) +{ + int ret; + unsigned int virt; + struct hmm_bo_device *bdev; + unsigned int i; + + check_bo_null_return(bo, -EINVAL); + + mutex_lock(&bo->mutex); + + check_bo_status_yes_goto(bo, + HMM_BO_PAGE_ALLOCED | HMM_BO_ALLOCED, + status_err1); + + check_bo_status_no_goto(bo, HMM_BO_BINDED, status_err2); + + bdev = bo->bdev; + + virt = bo->start; + + for (i = 0; i < bo->pgnr; i++) { + ret = + isp_mmu_map(&bdev->mmu, virt, + page_to_phys(bo->page_obj[i].page), 1); + if (ret) + goto map_err; + virt += (1 << PAGE_SHIFT); + } + + /* + * flush TBL here. + * + * theoretically, we donot need to flush TLB as we didnot change + * any existed address mappings, but for Silicon Hive's MMU, its + * really a bug here. I guess when fetching PTEs (page table entity) + * to TLB, its MMU will fetch additional INVALID PTEs automatically + * for performance issue. EX, we only set up 1 page address mapping, + * meaning updating 1 PTE, but the MMU fetches 4 PTE at one time, + * so the additional 3 PTEs are invalid. + */ + if (bo->start != 0x0) + isp_mmu_flush_tlb_range(&bdev->mmu, bo->start, + (bo->pgnr << PAGE_SHIFT)); + + bo->status |= HMM_BO_BINDED; + + mutex_unlock(&bo->mutex); + + return 0; + +map_err: + /* unbind the physical pages with related virtual address space */ + virt = bo->start; + for ( ; i > 0; i--) { + isp_mmu_unmap(&bdev->mmu, virt, 1); + virt += pgnr_to_size(1); + } + + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, + "setup MMU address mapping failed.\n"); + return ret; + +status_err2: + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, "buffer object already binded.\n"); + return -EINVAL; +status_err1: + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, + "buffer object vm_node or page not allocated.\n"); + return -EINVAL; +} + +/* + * unbind the physical pages with related virtual address space. + */ +void hmm_bo_unbind(struct hmm_buffer_object *bo) +{ + unsigned int virt; + struct hmm_bo_device *bdev; + unsigned int i; + + check_bo_null_return_void(bo); + + mutex_lock(&bo->mutex); + + check_bo_status_yes_goto(bo, + HMM_BO_PAGE_ALLOCED | + HMM_BO_ALLOCED | + HMM_BO_BINDED, status_err); + + bdev = bo->bdev; + + virt = bo->start; + + for (i = 0; i < bo->pgnr; i++) { + isp_mmu_unmap(&bdev->mmu, virt, 1); + virt += pgnr_to_size(1); + } + + /* + * flush TLB as the address mapping has been removed and + * related TLBs should be invalidated. + */ + isp_mmu_flush_tlb_range(&bdev->mmu, bo->start, + (bo->pgnr << PAGE_SHIFT)); + + bo->status &= (~HMM_BO_BINDED); + + mutex_unlock(&bo->mutex); + + return; + +status_err: + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, + "buffer vm or page not allocated or not binded yet.\n"); +} + +int hmm_bo_binded(struct hmm_buffer_object *bo) +{ + int ret; + + check_bo_null_return(bo, 0); + + mutex_lock(&bo->mutex); + + ret = bo->status & HMM_BO_BINDED; + + mutex_unlock(&bo->mutex); + + return ret; +} + +void *hmm_bo_vmap(struct hmm_buffer_object *bo, bool cached) +{ + struct page **pages; + int i; + + check_bo_null_return(bo, NULL); + + mutex_lock(&bo->mutex); + if (((bo->status & HMM_BO_VMAPED) && !cached) || + ((bo->status & HMM_BO_VMAPED_CACHED) && cached)) { + mutex_unlock(&bo->mutex); + return bo->vmap_addr; + } + + /* cached status need to be changed, so vunmap first */ + if (bo->status & HMM_BO_VMAPED || bo->status & HMM_BO_VMAPED_CACHED) { + vunmap(bo->vmap_addr); + bo->vmap_addr = NULL; + bo->status &= ~(HMM_BO_VMAPED | HMM_BO_VMAPED_CACHED); + } + + pages = kmalloc_array(bo->pgnr, sizeof(*pages), GFP_KERNEL); + if (unlikely(!pages)) { + mutex_unlock(&bo->mutex); + return NULL; + } + + for (i = 0; i < bo->pgnr; i++) + pages[i] = bo->page_obj[i].page; + + bo->vmap_addr = vmap(pages, bo->pgnr, VM_MAP, + cached ? PAGE_KERNEL : PAGE_KERNEL_NOCACHE); + if (unlikely(!bo->vmap_addr)) { + kfree(pages); + mutex_unlock(&bo->mutex); + dev_err(atomisp_dev, "vmap failed...\n"); + return NULL; + } + bo->status |= (cached ? HMM_BO_VMAPED_CACHED : HMM_BO_VMAPED); + + kfree(pages); + + mutex_unlock(&bo->mutex); + return bo->vmap_addr; +} + +void hmm_bo_flush_vmap(struct hmm_buffer_object *bo) +{ + check_bo_null_return_void(bo); + + mutex_lock(&bo->mutex); + if (!(bo->status & HMM_BO_VMAPED_CACHED) || !bo->vmap_addr) { + mutex_unlock(&bo->mutex); + return; + } + + clflush_cache_range(bo->vmap_addr, bo->pgnr * PAGE_SIZE); + mutex_unlock(&bo->mutex); +} + +void hmm_bo_vunmap(struct hmm_buffer_object *bo) +{ + check_bo_null_return_void(bo); + + mutex_lock(&bo->mutex); + if (bo->status & HMM_BO_VMAPED || bo->status & HMM_BO_VMAPED_CACHED) { + vunmap(bo->vmap_addr); + bo->vmap_addr = NULL; + bo->status &= ~(HMM_BO_VMAPED | HMM_BO_VMAPED_CACHED); + } + + mutex_unlock(&bo->mutex); + return; +} + +void hmm_bo_ref(struct hmm_buffer_object *bo) +{ + check_bo_null_return_void(bo); + + kref_get(&bo->kref); +} + +static void kref_hmm_bo_release(struct kref *kref) +{ + if (!kref) + return; + + hmm_bo_release(kref_to_hmm_bo(kref)); +} + +void hmm_bo_unref(struct hmm_buffer_object *bo) +{ + check_bo_null_return_void(bo); + + kref_put(&bo->kref, kref_hmm_bo_release); +} + +static void hmm_bo_vm_open(struct vm_area_struct *vma) +{ + struct hmm_buffer_object *bo = + (struct hmm_buffer_object *)vma->vm_private_data; + + check_bo_null_return_void(bo); + + hmm_bo_ref(bo); + + mutex_lock(&bo->mutex); + + bo->status |= HMM_BO_MMAPED; + + bo->mmap_count++; + + mutex_unlock(&bo->mutex); +} + +static void hmm_bo_vm_close(struct vm_area_struct *vma) +{ + struct hmm_buffer_object *bo = + (struct hmm_buffer_object *)vma->vm_private_data; + + check_bo_null_return_void(bo); + + hmm_bo_unref(bo); + + mutex_lock(&bo->mutex); + + bo->mmap_count--; + + if (!bo->mmap_count) { + bo->status &= (~HMM_BO_MMAPED); + vma->vm_private_data = NULL; + } + + mutex_unlock(&bo->mutex); +} + +static const struct vm_operations_struct hmm_bo_vm_ops = { + .open = hmm_bo_vm_open, + .close = hmm_bo_vm_close, +}; + +/* + * mmap the bo to user space. + */ +int hmm_bo_mmap(struct vm_area_struct *vma, struct hmm_buffer_object *bo) +{ + unsigned int start, end; + unsigned int virt; + unsigned int pgnr, i; + unsigned int pfn; + + check_bo_null_return(bo, -EINVAL); + + check_bo_status_yes_goto(bo, HMM_BO_PAGE_ALLOCED, status_err); + + pgnr = bo->pgnr; + start = vma->vm_start; + end = vma->vm_end; + + /* + * check vma's virtual address space size and buffer object's size. + * must be the same. + */ + if ((start + pgnr_to_size(pgnr)) != end) { + dev_warn(atomisp_dev, + "vma's address space size not equal" + " to buffer object's size"); + return -EINVAL; + } + + virt = vma->vm_start; + for (i = 0; i < pgnr; i++) { + pfn = page_to_pfn(bo->page_obj[i].page); + if (remap_pfn_range(vma, virt, pfn, PAGE_SIZE, PAGE_SHARED)) { + dev_warn(atomisp_dev, + "remap_pfn_range failed:" + " virt = 0x%x, pfn = 0x%x," + " mapped_pgnr = %d\n", virt, pfn, 1); + return -EINVAL; + } + virt += PAGE_SIZE; + } + + vma->vm_private_data = bo; + + vma->vm_ops = &hmm_bo_vm_ops; + vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP; + + /* + * call hmm_bo_vm_open explictly. + */ + hmm_bo_vm_open(vma); + + return 0; + +status_err: + dev_err(atomisp_dev, "buffer page not allocated yet.\n"); + return -EINVAL; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c new file mode 100644 index 0000000000000..f59fd99082570 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c @@ -0,0 +1,233 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +/* + * This file contains functions for dynamic memory pool management + */ +#include +#include +#include + +#include + +#include "atomisp_internal.h" + +#include "hmm/hmm_pool.h" + +/* + * dynamic memory pool ops. + */ +static unsigned int get_pages_from_dynamic_pool(void *pool, + struct hmm_page_object *page_obj, + unsigned int size, bool cached) +{ + struct hmm_page *hmm_page; + unsigned long flags; + unsigned int i = 0; + struct hmm_dynamic_pool_info *dypool_info = pool; + + if (!dypool_info) + return 0; + + spin_lock_irqsave(&dypool_info->list_lock, flags); + if (dypool_info->initialized) { + while (!list_empty(&dypool_info->pages_list)) { + hmm_page = list_entry(dypool_info->pages_list.next, + struct hmm_page, list); + + list_del(&hmm_page->list); + dypool_info->pgnr--; + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + + page_obj[i].page = hmm_page->page; + page_obj[i++].type = HMM_PAGE_TYPE_DYNAMIC; + kmem_cache_free(dypool_info->pgptr_cache, hmm_page); + + if (i == size) + return i; + + spin_lock_irqsave(&dypool_info->list_lock, flags); + } + } + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + + return i; +} + +static void free_pages_to_dynamic_pool(void *pool, + struct hmm_page_object *page_obj) +{ + struct hmm_page *hmm_page; + unsigned long flags; + int ret; + struct hmm_dynamic_pool_info *dypool_info = pool; + + if (!dypool_info) + return; + + spin_lock_irqsave(&dypool_info->list_lock, flags); + if (!dypool_info->initialized) { + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + return; + } + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + + if (page_obj->type == HMM_PAGE_TYPE_RESERVED) + return; + + if (dypool_info->pgnr >= dypool_info->pool_size) { + /* free page directly back to system */ + ret = set_pages_wb(page_obj->page, 1); + if (ret) + dev_err(atomisp_dev, + "set page to WB err ...ret=%d\n", ret); + /* + W/A: set_pages_wb seldom return value = -EFAULT + indicate that address of page is not in valid + range(0xffff880000000000~0xffffc7ffffffffff) + then, _free_pages would panic; Do not know why page + address be valid, it maybe memory corruption by lowmemory + */ + if (!ret) { + __free_pages(page_obj->page, 0); + hmm_mem_stat.sys_size--; + } + return; + } + hmm_page = kmem_cache_zalloc(dypool_info->pgptr_cache, + GFP_KERNEL); + if (!hmm_page) { + /* free page directly */ + ret = set_pages_wb(page_obj->page, 1); + if (ret) + dev_err(atomisp_dev, + "set page to WB err ...ret=%d\n", ret); + if (!ret) { + __free_pages(page_obj->page, 0); + hmm_mem_stat.sys_size--; + } + return; + } + + hmm_page->page = page_obj->page; + + /* + * add to pages_list of pages_pool + */ + spin_lock_irqsave(&dypool_info->list_lock, flags); + list_add_tail(&hmm_page->list, &dypool_info->pages_list); + dypool_info->pgnr++; + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + hmm_mem_stat.dyc_size++; +} + +static int hmm_dynamic_pool_init(void **pool, unsigned int pool_size) +{ + struct hmm_dynamic_pool_info *dypool_info; + + if (pool_size == 0) + return 0; + + dypool_info = kmalloc(sizeof(struct hmm_dynamic_pool_info), + GFP_KERNEL); + if (unlikely(!dypool_info)) + return -ENOMEM; + + dypool_info->pgptr_cache = kmem_cache_create("pgptr_cache", + sizeof(struct hmm_page), 0, + SLAB_HWCACHE_ALIGN, NULL); + if (!dypool_info->pgptr_cache) { + kfree(dypool_info); + return -ENOMEM; + } + + INIT_LIST_HEAD(&dypool_info->pages_list); + spin_lock_init(&dypool_info->list_lock); + dypool_info->initialized = true; + dypool_info->pool_size = pool_size; + dypool_info->pgnr = 0; + + *pool = dypool_info; + + return 0; +} + +static void hmm_dynamic_pool_exit(void **pool) +{ + struct hmm_dynamic_pool_info *dypool_info = *pool; + struct hmm_page *hmm_page; + unsigned long flags; + int ret; + + if (!dypool_info) + return; + + spin_lock_irqsave(&dypool_info->list_lock, flags); + if (!dypool_info->initialized) { + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + return; + } + dypool_info->initialized = false; + + while (!list_empty(&dypool_info->pages_list)) { + hmm_page = list_entry(dypool_info->pages_list.next, + struct hmm_page, list); + + list_del(&hmm_page->list); + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + + /* can cause thread sleep, so cannot be put into spin_lock */ + ret = set_pages_wb(hmm_page->page, 1); + if (ret) + dev_err(atomisp_dev, + "set page to WB err...ret=%d\n", ret); + if (!ret) { + __free_pages(hmm_page->page, 0); + hmm_mem_stat.dyc_size--; + hmm_mem_stat.sys_size--; + } + kmem_cache_free(dypool_info->pgptr_cache, hmm_page); + spin_lock_irqsave(&dypool_info->list_lock, flags); + } + + spin_unlock_irqrestore(&dypool_info->list_lock, flags); + + kmem_cache_destroy(dypool_info->pgptr_cache); + + kfree(dypool_info); + + *pool = NULL; +} + +static int hmm_dynamic_pool_inited(void *pool) +{ + struct hmm_dynamic_pool_info *dypool_info = pool; + + if (!dypool_info) + return 0; + + return dypool_info->initialized; +} + +struct hmm_pool_ops dynamic_pops = { + .pool_init = hmm_dynamic_pool_init, + .pool_exit = hmm_dynamic_pool_exit, + .pool_alloc_pages = get_pages_from_dynamic_pool, + .pool_free_pages = free_pages_to_dynamic_pool, + .pool_inited = hmm_dynamic_pool_inited, +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c new file mode 100644 index 0000000000000..f300e75479979 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c @@ -0,0 +1,252 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +/* + * This file contains functions for reserved memory pool management + */ +#include +#include +#include + +#include + +#include "atomisp_internal.h" +#include "hmm/hmm_pool.h" + +/* + * reserved memory pool ops. + */ +static unsigned int get_pages_from_reserved_pool(void *pool, + struct hmm_page_object *page_obj, + unsigned int size, bool cached) +{ + unsigned long flags; + unsigned int i = 0; + unsigned int repool_pgnr; + int j; + struct hmm_reserved_pool_info *repool_info = pool; + + if (!repool_info) + return 0; + + spin_lock_irqsave(&repool_info->list_lock, flags); + if (repool_info->initialized) { + repool_pgnr = repool_info->index; + + for (j = repool_pgnr-1; j >= 0; j--) { + page_obj[i].page = repool_info->pages[j]; + page_obj[i].type = HMM_PAGE_TYPE_RESERVED; + i++; + repool_info->index--; + if (i == size) + break; + } + } + spin_unlock_irqrestore(&repool_info->list_lock, flags); + return i; +} + +static void free_pages_to_reserved_pool(void *pool, + struct hmm_page_object *page_obj) +{ + unsigned long flags; + struct hmm_reserved_pool_info *repool_info = pool; + + if (!repool_info) + return; + + spin_lock_irqsave(&repool_info->list_lock, flags); + + if (repool_info->initialized && + repool_info->index < repool_info->pgnr && + page_obj->type == HMM_PAGE_TYPE_RESERVED) { + repool_info->pages[repool_info->index++] = page_obj->page; + } + + spin_unlock_irqrestore(&repool_info->list_lock, flags); +} + +static int hmm_reserved_pool_setup(struct hmm_reserved_pool_info **repool_info, + unsigned int pool_size) +{ + struct hmm_reserved_pool_info *pool_info; + + pool_info = kmalloc(sizeof(struct hmm_reserved_pool_info), + GFP_KERNEL); + if (unlikely(!pool_info)) + return -ENOMEM; + + pool_info->pages = kmalloc(sizeof(struct page *) * pool_size, + GFP_KERNEL); + if (unlikely(!pool_info->pages)) { + kfree(pool_info); + return -ENOMEM; + } + + pool_info->index = 0; + pool_info->pgnr = 0; + spin_lock_init(&pool_info->list_lock); + pool_info->initialized = true; + + *repool_info = pool_info; + + return 0; +} + +static int hmm_reserved_pool_init(void **pool, unsigned int pool_size) +{ + int ret; + unsigned int blk_pgnr; + unsigned int pgnr = pool_size; + unsigned int order = 0; + unsigned int i = 0; + int fail_number = 0; + struct page *pages; + int j; + struct hmm_reserved_pool_info *repool_info; + if (pool_size == 0) + return 0; + + ret = hmm_reserved_pool_setup(&repool_info, pool_size); + if (ret) { + dev_err(atomisp_dev, "hmm_reserved_pool_setup failed.\n"); + return ret; + } + + pgnr = pool_size; + + i = 0; + order = MAX_ORDER; + + while (pgnr) { + blk_pgnr = 1U << order; + while (blk_pgnr > pgnr) { + order--; + blk_pgnr >>= 1U; + } + BUG_ON(order > MAX_ORDER); + + pages = alloc_pages(GFP_KERNEL | __GFP_NOWARN, order); + if (unlikely(!pages)) { + if (order == 0) { + fail_number++; + dev_err(atomisp_dev, "%s: alloc_pages failed: %d\n", + __func__, fail_number); + /* if fail five times, will goto end */ + + /* FIXME: whether is the mechanism is ok? */ + if (fail_number == ALLOC_PAGE_FAIL_NUM) + goto end; + } else { + order--; + } + } else { + blk_pgnr = 1U << order; + + ret = set_pages_uc(pages, blk_pgnr); + if (ret) { + dev_err(atomisp_dev, + "set pages uncached failed\n"); + __free_pages(pages, order); + goto end; + } + + for (j = 0; j < blk_pgnr; j++) + repool_info->pages[i++] = pages + j; + + repool_info->index += blk_pgnr; + repool_info->pgnr += blk_pgnr; + + pgnr -= blk_pgnr; + + fail_number = 0; + } + } + +end: + repool_info->initialized = true; + + *pool = repool_info; + + dev_info(atomisp_dev, + "hmm_reserved_pool init successfully," + "hmm_reserved_pool is with %d pages.\n", + repool_info->pgnr); + return 0; +} + +static void hmm_reserved_pool_exit(void **pool) +{ + unsigned long flags; + int i, ret; + unsigned int pgnr; + struct hmm_reserved_pool_info *repool_info = *pool; + + if (!repool_info) + return; + + spin_lock_irqsave(&repool_info->list_lock, flags); + if (!repool_info->initialized) { + spin_unlock_irqrestore(&repool_info->list_lock, flags); + return; + } + pgnr = repool_info->pgnr; + repool_info->index = 0; + repool_info->pgnr = 0; + repool_info->initialized = false; + spin_unlock_irqrestore(&repool_info->list_lock, flags); + + for (i = 0; i < pgnr; i++) { + ret = set_pages_wb(repool_info->pages[i], 1); + if (ret) + dev_err(atomisp_dev, + "set page to WB err...ret=%d\n", ret); + /* + W/A: set_pages_wb seldom return value = -EFAULT + indicate that address of page is not in valid + range(0xffff880000000000~0xffffc7ffffffffff) + then, _free_pages would panic; Do not know why + page address be valid, it maybe memory corruption by lowmemory + */ + if (!ret) + __free_pages(repool_info->pages[i], 0); + } + + kfree(repool_info->pages); + kfree(repool_info); + + *pool = NULL; +} + +static int hmm_reserved_pool_inited(void *pool) +{ + struct hmm_reserved_pool_info *repool_info = pool; + + if (!repool_info) + return 0; + + return repool_info->initialized; +} + +struct hmm_pool_ops reserved_pops = { + .pool_init = hmm_reserved_pool_init, + .pool_exit = hmm_reserved_pool_exit, + .pool_alloc_pages = get_pages_from_reserved_pool, + .pool_free_pages = free_pages_to_reserved_pool, + .pool_inited = hmm_reserved_pool_inited, +}; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c new file mode 100644 index 0000000000000..0df96e6619835 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c @@ -0,0 +1,212 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +/* + * This file contains function for ISP virtual address management in ISP driver + */ +#include +#include +#include +#include +#include + +#include "atomisp_internal.h" +#include "mmu/isp_mmu.h" +#include "hmm/hmm_vm.h" +#include "hmm/hmm_common.h" + +static unsigned int vm_node_end(unsigned int start, unsigned int pgnr) +{ + return start + pgnr_to_size(pgnr); +} + +static int addr_in_vm_node(unsigned int addr, + struct hmm_vm_node *node) +{ + return (addr >= node->start) && (addr < (node->start + node->size)); +} + +int hmm_vm_init(struct hmm_vm *vm, unsigned int start, + unsigned int size) +{ + if (!vm) + return -1; + + vm->start = start; + vm->pgnr = size_to_pgnr_ceil(size); + vm->size = pgnr_to_size(vm->pgnr); + + INIT_LIST_HEAD(&vm->vm_node_list); + spin_lock_init(&vm->lock); + vm->cache = kmem_cache_create("atomisp_vm", sizeof(struct hmm_vm_node), + 0, 0, NULL); + + return vm->cache != NULL ? 0 : -ENOMEM; +} + +void hmm_vm_clean(struct hmm_vm *vm) +{ + struct hmm_vm_node *node, *tmp; + struct list_head new_head; + + if (!vm) + return; + + spin_lock(&vm->lock); + list_replace_init(&vm->vm_node_list, &new_head); + spin_unlock(&vm->lock); + + list_for_each_entry_safe(node, tmp, &new_head, list) { + list_del(&node->list); + kmem_cache_free(vm->cache, node); + } + + kmem_cache_destroy(vm->cache); +} + +static struct hmm_vm_node *alloc_hmm_vm_node(unsigned int pgnr, + struct hmm_vm *vm) +{ + struct hmm_vm_node *node; + + node = kmem_cache_alloc(vm->cache, GFP_KERNEL); + if (!node) + return NULL; + + INIT_LIST_HEAD(&node->list); + node->pgnr = pgnr; + node->size = pgnr_to_size(pgnr); + node->vm = vm; + + return node; +} + +struct hmm_vm_node *hmm_vm_alloc_node(struct hmm_vm *vm, unsigned int pgnr) +{ + struct list_head *head; + struct hmm_vm_node *node, *cur, *next; + unsigned int vm_start, vm_end; + unsigned int addr; + unsigned int size; + + if (!vm) + return NULL; + + vm_start = vm->start; + vm_end = vm_node_end(vm->start, vm->pgnr); + size = pgnr_to_size(pgnr); + + addr = vm_start; + head = &vm->vm_node_list; + + node = alloc_hmm_vm_node(pgnr, vm); + if (!node) { + dev_err(atomisp_dev, "no memory to allocate hmm vm node.\n"); + return NULL; + } + + spin_lock(&vm->lock); + /* + * if list is empty, the loop code will not be executed. + */ + list_for_each_entry(cur, head, list) { + /* Add gap between vm areas as helper to not hide overflow */ + addr = PAGE_ALIGN(vm_node_end(cur->start, cur->pgnr) + 1); + + if (list_is_last(&cur->list, head)) { + if (addr + size > vm_end) { + /* vm area does not have space anymore */ + spin_unlock(&vm->lock); + kmem_cache_free(vm->cache, node); + dev_err(atomisp_dev, + "no enough virtual address space.\n"); + return NULL; + } + + /* We still have vm space to add new node to tail */ + break; + } + + next = list_entry(cur->list.next, struct hmm_vm_node, list); + if ((next->start - addr) > size) + break; + } + node->start = addr; + node->vm = vm; + list_add(&node->list, &cur->list); + spin_unlock(&vm->lock); + + return node; +} + +void hmm_vm_free_node(struct hmm_vm_node *node) +{ + struct hmm_vm *vm; + + if (!node) + return; + + vm = node->vm; + + spin_lock(&vm->lock); + list_del(&node->list); + spin_unlock(&vm->lock); + + kmem_cache_free(vm->cache, node); +} + +struct hmm_vm_node *hmm_vm_find_node_start(struct hmm_vm *vm, unsigned int addr) +{ + struct hmm_vm_node *node; + + if (!vm) + return NULL; + + spin_lock(&vm->lock); + + list_for_each_entry(node, &vm->vm_node_list, list) { + if (node->start == addr) { + spin_unlock(&vm->lock); + return node; + } + } + + spin_unlock(&vm->lock); + return NULL; +} + +struct hmm_vm_node *hmm_vm_find_node_in_range(struct hmm_vm *vm, + unsigned int addr) +{ + struct hmm_vm_node *node; + + if (!vm) + return NULL; + + spin_lock(&vm->lock); + + list_for_each_entry(node, &vm->vm_node_list, list) { + if (addr_in_vm_node(addr, node)) { + spin_unlock(&vm->lock); + return node; + } + } + + spin_unlock(&vm->lock); + return NULL; +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h new file mode 100644 index 0000000000000..fb38fc540b812 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h @@ -0,0 +1,103 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef _hive_isp_css_custom_host_hrt_h_ +#define _hive_isp_css_custom_host_hrt_h_ + +#include +#include "atomisp_helper.h" + +/* + * _hrt_master_port_store/load/uload -macros using __force attributed + * cast to intentional dereferencing __iomem attributed (noderef) + * pointer from atomisp_get_io_virt_addr + */ +#define _hrt_master_port_store_8(a, d) \ + (*((s8 __force *)atomisp_get_io_virt_addr(a)) = (d)) + +#define _hrt_master_port_store_16(a, d) \ + (*((s16 __force *)atomisp_get_io_virt_addr(a)) = (d)) + +#define _hrt_master_port_store_32(a, d) \ + (*((s32 __force *)atomisp_get_io_virt_addr(a)) = (d)) + +#define _hrt_master_port_load_8(a) \ + (*(s8 __force *)atomisp_get_io_virt_addr(a)) + +#define _hrt_master_port_load_16(a) \ + (*(s16 __force *)atomisp_get_io_virt_addr(a)) + +#define _hrt_master_port_load_32(a) \ + (*(s32 __force *)atomisp_get_io_virt_addr(a)) + +#define _hrt_master_port_uload_8(a) \ + (*(u8 __force *)atomisp_get_io_virt_addr(a)) + +#define _hrt_master_port_uload_16(a) \ + (*(u16 __force *)atomisp_get_io_virt_addr(a)) + +#define _hrt_master_port_uload_32(a) \ + (*(u32 __force *)atomisp_get_io_virt_addr(a)) + +#define _hrt_master_port_store_8_volatile(a, d) _hrt_master_port_store_8(a, d) +#define _hrt_master_port_store_16_volatile(a, d) _hrt_master_port_store_16(a, d) +#define _hrt_master_port_store_32_volatile(a, d) _hrt_master_port_store_32(a, d) + +#define _hrt_master_port_load_8_volatile(a) _hrt_master_port_load_8(a) +#define _hrt_master_port_load_16_volatile(a) _hrt_master_port_load_16(a) +#define _hrt_master_port_load_32_volatile(a) _hrt_master_port_load_32(a) + +#define _hrt_master_port_uload_8_volatile(a) _hrt_master_port_uload_8(a) +#define _hrt_master_port_uload_16_volatile(a) _hrt_master_port_uload_16(a) +#define _hrt_master_port_uload_32_volatile(a) _hrt_master_port_uload_32(a) + +static inline void hrt_sleep(void) +{ + udelay(1); +} + +static inline uint32_t _hrt_mem_store(uint32_t to, const void *from, size_t n) +{ + unsigned i; + uint32_t _to = to; + const char *_from = (const char *)from; + for (i = 0; i < n; i++, _to++, _from++) + _hrt_master_port_store_8(_to, *_from); + return _to; +} + +static inline void *_hrt_mem_load(uint32_t from, void *to, size_t n) +{ + unsigned i; + char *_to = (char *)to; + uint32_t _from = from; + for (i = 0; i < n; i++, _to++, _from++) + *_to = _hrt_master_port_load_8(_from); + return _to; +} + +static inline uint32_t _hrt_mem_set(uint32_t to, int c, size_t n) +{ + unsigned i; + uint32_t _to = to; + for (i = 0; i < n; i++, _to++) + _hrt_master_port_store_8(_to, c); + return _to; +} + +#endif /* _hive_isp_css_custom_host_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c new file mode 100644 index 0000000000000..9b186517f20a6 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c @@ -0,0 +1,127 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include "atomisp_internal.h" + +#include "hive_isp_css_mm_hrt.h" +#include "hmm/hmm.h" + +#define __page_align(size) (((size) + (PAGE_SIZE-1)) & (~(PAGE_SIZE-1))) + +static void __user *my_userptr; +static unsigned my_num_pages; +static enum hrt_userptr_type my_usr_type; + +void hrt_isp_css_mm_set_user_ptr(void __user *userptr, + unsigned int num_pages, + enum hrt_userptr_type type) +{ + my_userptr = userptr; + my_num_pages = num_pages; + my_usr_type = type; +} + +static ia_css_ptr __hrt_isp_css_mm_alloc(size_t bytes, + const void __user *userptr, + unsigned int num_pages, + enum hrt_userptr_type type, + bool cached) +{ +#ifdef CONFIG_ION + if (type == HRT_USR_ION) + return hmm_alloc(bytes, HMM_BO_ION, 0, + userptr, cached); + +#endif + if (type == HRT_USR_PTR) { + if (userptr == NULL) + return hmm_alloc(bytes, HMM_BO_PRIVATE, 0, + NULL, cached); + else { + if (num_pages < ((__page_align(bytes)) >> PAGE_SHIFT)) + dev_err(atomisp_dev, + "user space memory size is less" + " than the expected size..\n"); + else if (num_pages > ((__page_align(bytes)) + >> PAGE_SHIFT)) + dev_err(atomisp_dev, + "user space memory size is" + " large than the expected size..\n"); + + return hmm_alloc(bytes, HMM_BO_USER, 0, + userptr, cached); + } + } else { + dev_err(atomisp_dev, "user ptr type is incorrect.\n"); + return 0; + } +} + +ia_css_ptr hrt_isp_css_mm_alloc(size_t bytes) +{ + return __hrt_isp_css_mm_alloc(bytes, my_userptr, + my_num_pages, my_usr_type, false); +} + +ia_css_ptr hrt_isp_css_mm_alloc_user_ptr(size_t bytes, + const void __user *userptr, + unsigned int num_pages, + enum hrt_userptr_type type, + bool cached) +{ + return __hrt_isp_css_mm_alloc(bytes, userptr, num_pages, + type, cached); +} + +ia_css_ptr hrt_isp_css_mm_alloc_cached(size_t bytes) +{ + if (my_userptr == NULL) + return hmm_alloc(bytes, HMM_BO_PRIVATE, 0, NULL, + HMM_CACHED); + else { + if (my_num_pages < ((__page_align(bytes)) >> PAGE_SHIFT)) + dev_err(atomisp_dev, + "user space memory size is less" + " than the expected size..\n"); + else if (my_num_pages > ((__page_align(bytes)) >> PAGE_SHIFT)) + dev_err(atomisp_dev, + "user space memory size is" + " large than the expected size..\n"); + + return hmm_alloc(bytes, HMM_BO_USER, 0, + my_userptr, HMM_CACHED); + } +} + +ia_css_ptr hrt_isp_css_mm_calloc(size_t bytes) +{ + ia_css_ptr ptr = hrt_isp_css_mm_alloc(bytes); + if (ptr) + hmm_set(ptr, 0, bytes); + return ptr; +} + +ia_css_ptr hrt_isp_css_mm_calloc_cached(size_t bytes) +{ + ia_css_ptr ptr = hrt_isp_css_mm_alloc_cached(bytes); + if (ptr) + hmm_set(ptr, 0, bytes); + return ptr; +} + diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h new file mode 100644 index 0000000000000..93762e71b4cab --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h @@ -0,0 +1,57 @@ +/* + * Support for Medfield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef _hive_isp_css_mm_hrt_h_ +#define _hive_isp_css_mm_hrt_h_ + +#include +#include + +#define HRT_BUF_FLAG_CACHED (1 << 0) + +enum hrt_userptr_type { + HRT_USR_PTR = 0, +#ifdef CONFIG_ION + HRT_USR_ION, +#endif +}; + +struct hrt_userbuffer_attr { + enum hrt_userptr_type type; + unsigned int pgnr; +}; + +void hrt_isp_css_mm_set_user_ptr(void __user *userptr, + unsigned int num_pages, enum hrt_userptr_type); + +/* Allocate memory, returns a virtual address */ +ia_css_ptr hrt_isp_css_mm_alloc(size_t bytes); +ia_css_ptr hrt_isp_css_mm_alloc_user_ptr(size_t bytes, + const void __user *userptr, + unsigned int num_pages, + enum hrt_userptr_type, + bool cached); +ia_css_ptr hrt_isp_css_mm_alloc_cached(size_t bytes); + +/* allocate memory and initialize with zeros, + returns a virtual address */ +ia_css_ptr hrt_isp_css_mm_calloc(size_t bytes); +ia_css_ptr hrt_isp_css_mm_calloc_cached(size_t bytes); + +#endif /* _hive_isp_css_mm_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h new file mode 100644 index 0000000000000..7dcc73c9f49d4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h @@ -0,0 +1,102 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __HMM_H__ +#define __HMM_H__ + +#include +#include +#include +#include + +#include "hmm/hmm_pool.h" +#include "ia_css_types.h" + +#define HMM_CACHED true +#define HMM_UNCACHED false + +int hmm_pool_register(unsigned int pool_size, enum hmm_pool_type pool_type); +void hmm_pool_unregister(enum hmm_pool_type pool_type); + +int hmm_init(void); +void hmm_cleanup(void); + +ia_css_ptr hmm_alloc(size_t bytes, enum hmm_bo_type type, + int from_highmem, const void __user *userptr, bool cached); +void hmm_free(ia_css_ptr ptr); +int hmm_load(ia_css_ptr virt, void *data, unsigned int bytes); +int hmm_store(ia_css_ptr virt, const void *data, unsigned int bytes); +int hmm_set(ia_css_ptr virt, int c, unsigned int bytes); +int hmm_flush(ia_css_ptr virt, unsigned int bytes); + +/* + * get kernel memory physical address from ISP virtual address. + */ +phys_addr_t hmm_virt_to_phys(ia_css_ptr virt); + +/* + * map ISP memory starts with virt to kernel virtual address + * by using vmap. return NULL if failed. + * + * virt must be the start address of ISP memory (return by hmm_alloc), + * do not pass any other address. + */ +void *hmm_vmap(ia_css_ptr virt, bool cached); +void hmm_vunmap(ia_css_ptr virt); + +/* + * flush the cache for the vmapped buffer. + * if the buffer has not been vmapped, return directly. + */ +void hmm_flush_vmap(ia_css_ptr virt); + +/* + * Address translation from ISP shared memory address to kernel virtual address + * if the memory is not vmmaped, then do it. + */ +void *hmm_isp_vaddr_to_host_vaddr(ia_css_ptr ptr, bool cached); + +/* + * Address translation from kernel virtual address to ISP shared memory address + */ +ia_css_ptr hmm_host_vaddr_to_hrt_vaddr(const void *ptr); + +/* + * map ISP memory starts with virt to specific vma. + * + * used for mmap operation. + * + * virt must be the start address of ISP memory (return by hmm_alloc), + * do not pass any other address. + */ +int hmm_mmap(struct vm_area_struct *vma, ia_css_ptr virt); + +/* show memory statistic + */ +void hmm_show_mem_stat(const char *func, const int line); + +/* init memory statistic + */ +void hmm_init_mem_stat(int res_pgnr, int dyc_en, int dyc_pgnr); + +extern bool dypool_enable; +extern unsigned int dypool_pgnr; +extern struct hmm_bo_device bo_device; + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h new file mode 100644 index 0000000000000..508d6fd68f93b --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h @@ -0,0 +1,319 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __HMM_BO_H__ +#define __HMM_BO_H__ + +#include +#include +#include +#include +#include +#include "mmu/isp_mmu.h" +#include "hmm/hmm_common.h" +#include "ia_css_types.h" + +#define check_bodev_null_return(bdev, exp) \ + check_null_return(bdev, exp, \ + "NULL hmm_bo_device.\n") + +#define check_bodev_null_return_void(bdev) \ + check_null_return_void(bdev, \ + "NULL hmm_bo_device.\n") + +#define check_bo_status_yes_goto(bo, _status, label) \ + var_not_equal_goto((bo->status & (_status)), (_status), \ + label, \ + "HMM buffer status not contain %s.\n", \ + #_status) + +#define check_bo_status_no_goto(bo, _status, label) \ + var_equal_goto((bo->status & (_status)), (_status), \ + label, \ + "HMM buffer status contains %s.\n", \ + #_status) + +#define rbtree_node_to_hmm_bo(root_node) \ + container_of((root_node), struct hmm_buffer_object, node) + +#define list_to_hmm_bo(list_ptr) \ + list_entry((list_ptr), struct hmm_buffer_object, list) + +#define kref_to_hmm_bo(kref_ptr) \ + list_entry((kref_ptr), struct hmm_buffer_object, kref) + +#define check_bo_null_return(bo, exp) \ + check_null_return(bo, exp, "NULL hmm buffer object.\n") + +#define check_bo_null_return_void(bo) \ + check_null_return_void(bo, "NULL hmm buffer object.\n") + +#define HMM_MAX_ORDER 3 +#define HMM_MIN_ORDER 0 + +#define ISP_VM_START 0x0 +#define ISP_VM_SIZE (0x7FFFFFFF) /* 2G address space */ +#define ISP_PTR_NULL NULL + +#define HMM_BO_DEVICE_INITED 0x1 + +enum hmm_bo_type { + HMM_BO_PRIVATE, + HMM_BO_SHARE, + HMM_BO_USER, +#ifdef CONFIG_ION + HMM_BO_ION, +#endif + HMM_BO_LAST, +}; + +enum hmm_page_type { + HMM_PAGE_TYPE_RESERVED, + HMM_PAGE_TYPE_DYNAMIC, + HMM_PAGE_TYPE_GENERAL, +}; + +#define HMM_BO_MASK 0x1 +#define HMM_BO_FREE 0x0 +#define HMM_BO_ALLOCED 0x1 +#define HMM_BO_PAGE_ALLOCED 0x2 +#define HMM_BO_BINDED 0x4 +#define HMM_BO_MMAPED 0x8 +#define HMM_BO_VMAPED 0x10 +#define HMM_BO_VMAPED_CACHED 0x20 +#define HMM_BO_ACTIVE 0x1000 +#define HMM_BO_MEM_TYPE_USER 0x1 +#define HMM_BO_MEM_TYPE_PFN 0x2 + +struct hmm_bo_device { + struct isp_mmu mmu; + + /* start/pgnr/size is used to record the virtual memory of this bo */ + unsigned int start; + unsigned int pgnr; + unsigned int size; + + /* list lock is used to protect the entire_bo_list */ + spinlock_t list_lock; +#ifdef CONFIG_ION + struct ion_client *iclient; +#endif + int flag; + + /* linked list for entire buffer object */ + struct list_head entire_bo_list; + /* rbtree for maintain entire allocated vm */ + struct rb_root allocated_rbtree; + /* rbtree for maintain entire free vm */ + struct rb_root free_rbtree; + struct mutex rbtree_mutex; + struct kmem_cache *bo_cache; +}; + +struct hmm_page_object { + struct page *page; + enum hmm_page_type type; +}; + +struct hmm_buffer_object { + struct hmm_bo_device *bdev; + struct list_head list; + struct kref kref; + + /* mutex protecting this BO */ + struct mutex mutex; + enum hmm_bo_type type; + struct hmm_page_object *page_obj; /* physical pages */ + int from_highmem; + int mmap_count; +#ifdef CONFIG_ION + struct ion_handle *ihandle; +#endif + int status; + int mem_type; + void *vmap_addr; /* kernel virtual address by vmap */ + + struct rb_node node; + unsigned int start; + unsigned int end; + unsigned int pgnr; + /* + * When insert a bo which has the same pgnr with an existed + * bo node in the free_rbtree, using "prev & next" pointer + * to maintain a bo linked list instead of insert this bo + * into free_rbtree directly, it will make sure each node + * in free_rbtree has different pgnr. + * "prev & next" default is NULL. + */ + struct hmm_buffer_object *prev; + struct hmm_buffer_object *next; +}; + +struct hmm_buffer_object *hmm_bo_alloc(struct hmm_bo_device *bdev, + unsigned int pgnr); + +void hmm_bo_release(struct hmm_buffer_object *bo); + +int hmm_bo_device_init(struct hmm_bo_device *bdev, + struct isp_mmu_client *mmu_driver, + unsigned int vaddr_start, unsigned int size); + +/* + * clean up all hmm_bo_device related things. + */ +void hmm_bo_device_exit(struct hmm_bo_device *bdev); + +/* + * whether the bo device is inited or not. + */ +int hmm_bo_device_inited(struct hmm_bo_device *bdev); + +/* + * increse buffer object reference. + */ +void hmm_bo_ref(struct hmm_buffer_object *bo); + +/* + * decrese buffer object reference. if reference reaches 0, + * release function of the buffer object will be called. + * + * this call is also used to release hmm_buffer_object or its + * upper level object with it embedded in. you need to call + * this function when it is no longer used. + * + * Note: + * + * user dont need to care about internal resource release of + * the buffer object in the release callback, it will be + * handled internally. + * + * this call will only release internal resource of the buffer + * object but will not free the buffer object itself, as the + * buffer object can be both pre-allocated statically or + * dynamically allocated. so user need to deal with the release + * of the buffer object itself manually. below example shows + * the normal case of using the buffer object. + * + * struct hmm_buffer_object *bo = hmm_bo_create(bdev, pgnr); + * ...... + * hmm_bo_unref(bo); + * + * or: + * + * struct hmm_buffer_object bo; + * + * hmm_bo_init(bdev, &bo, pgnr, NULL); + * ... + * hmm_bo_unref(&bo); + */ +void hmm_bo_unref(struct hmm_buffer_object *bo); + + +/* + * allocate/free physical pages for the bo. will try to alloc mem + * from highmem if from_highmem is set, and type indicate that the + * pages will be allocated by using video driver (for share buffer) + * or by ISP driver itself. + */ + + +int hmm_bo_allocated(struct hmm_buffer_object *bo); + + +/* + * allocate/free physical pages for the bo. will try to alloc mem + * from highmem if from_highmem is set, and type indicate that the + * pages will be allocated by using video driver (for share buffer) + * or by ISP driver itself. + */ +int hmm_bo_alloc_pages(struct hmm_buffer_object *bo, + enum hmm_bo_type type, int from_highmem, + const void __user *userptr, bool cached); +void hmm_bo_free_pages(struct hmm_buffer_object *bo); +int hmm_bo_page_allocated(struct hmm_buffer_object *bo); + +/* + * get physical page info of the bo. + */ +int hmm_bo_get_page_info(struct hmm_buffer_object *bo, + struct hmm_page_object **page_obj, int *pgnr); + +/* + * bind/unbind the physical pages to a virtual address space. + */ +int hmm_bo_bind(struct hmm_buffer_object *bo); +void hmm_bo_unbind(struct hmm_buffer_object *bo); +int hmm_bo_binded(struct hmm_buffer_object *bo); + +/* + * vmap buffer object's pages to contiguous kernel virtual address. + * if the buffer has been vmaped, return the virtual address directly. + */ +void *hmm_bo_vmap(struct hmm_buffer_object *bo, bool cached); + +/* + * flush the cache for the vmapped buffer object's pages, + * if the buffer has not been vmapped, return directly. + */ +void hmm_bo_flush_vmap(struct hmm_buffer_object *bo); + +/* + * vunmap buffer object's kernel virtual address. + */ +void hmm_bo_vunmap(struct hmm_buffer_object *bo); + +/* + * mmap the bo's physical pages to specific vma. + * + * vma's address space size must be the same as bo's size, + * otherwise it will return -EINVAL. + * + * vma->vm_flags will be set to (VM_RESERVED | VM_IO). + */ +int hmm_bo_mmap(struct vm_area_struct *vma, + struct hmm_buffer_object *bo); + +extern struct hmm_pool dynamic_pool; +extern struct hmm_pool reserved_pool; + +/* + * find the buffer object by its virtual address vaddr. + * return NULL if no such buffer object found. + */ +struct hmm_buffer_object *hmm_bo_device_search_start( + struct hmm_bo_device *bdev, ia_css_ptr vaddr); + +/* + * find the buffer object by its virtual address. + * it does not need to be the start address of one bo, + * it can be an address within the range of one bo. + * return NULL if no such buffer object found. + */ +struct hmm_buffer_object *hmm_bo_device_search_in_range( + struct hmm_bo_device *bdev, ia_css_ptr vaddr); + +/* + * find the buffer object with kernel virtual address vaddr. + * return NULL if no such buffer object found. + */ +struct hmm_buffer_object *hmm_bo_device_search_vmap_start( + struct hmm_bo_device *bdev, const void *vaddr); + + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_common.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_common.h new file mode 100644 index 0000000000000..00885203fb147 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_common.h @@ -0,0 +1,96 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __HMM_BO_COMMON_H__ +#define __HMM_BO_COMMON_H__ + +#define HMM_BO_NAME "HMM" + +/* + * some common use micros + */ +#define var_equal_return(var1, var2, exp, fmt, arg ...) \ + do { \ + if ((var1) == (var2)) { \ + dev_err(atomisp_dev, \ + fmt, ## arg); \ + return exp;\ + } \ + } while (0) + +#define var_equal_return_void(var1, var2, fmt, arg ...) \ + do { \ + if ((var1) == (var2)) { \ + dev_err(atomisp_dev, \ + fmt, ## arg); \ + return;\ + } \ + } while (0) + +#define var_equal_goto(var1, var2, label, fmt, arg ...) \ + do { \ + if ((var1) == (var2)) { \ + dev_err(atomisp_dev, \ + fmt, ## arg); \ + goto label;\ + } \ + } while (0) + +#define var_not_equal_goto(var1, var2, label, fmt, arg ...) \ + do { \ + if ((var1) != (var2)) { \ + dev_err(atomisp_dev, \ + fmt, ## arg); \ + goto label;\ + } \ + } while (0) + +#define check_null_return(ptr, exp, fmt, arg ...) \ + var_equal_return(ptr, NULL, exp, fmt, ## arg) + +#define check_null_return_void(ptr, fmt, arg ...) \ + var_equal_return_void(ptr, NULL, fmt, ## arg) + +/* hmm_mem_stat is used to trace the hmm mem used by ISP pipe. The unit is page + * number. + * + * res_size: reserved mem pool size, being allocated from system at system boot time. + * res_size >= res_cnt. + * sys_size: system mem pool size, being allocated from system at camera running time. + * dyc_size: dynamic mem pool size. + * dyc_thr: dynamic mem pool high watermark. + * dyc_size <= dyc_thr. + * usr_size: user ptr mem size. + * + * res_cnt: track the mem allocated from reserved pool at camera running time. + * tol_cnt: track the total mem used by ISP pipe at camera running time. + */ +struct _hmm_mem_stat { + int res_size; + int sys_size; + int dyc_size; + int dyc_thr; + int usr_size; + int res_cnt; + int tol_cnt; +}; + +extern struct _hmm_mem_stat hmm_mem_stat; + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h new file mode 100644 index 0000000000000..bf24e44462bca --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h @@ -0,0 +1,115 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#ifndef __HMM_POOL_H__ +#define __HMM_POOL_H__ + +#include +#include +#include +#include +#include +#include +#include "hmm_common.h" +#include "hmm/hmm_bo.h" + +#define ALLOC_PAGE_FAIL_NUM 5 + +enum hmm_pool_type { + HMM_POOL_TYPE_RESERVED, + HMM_POOL_TYPE_DYNAMIC, +}; + +/** + * struct hmm_pool_ops - memory pool callbacks. + * + * @pool_init: initialize the memory pool. + * @pool_exit: uninitialize the memory pool. + * @pool_alloc_pages: allocate pages from memory pool. + * @pool_free_pages: free pages to memory pool. + * @pool_inited: check whether memory pool is initialized. + */ +struct hmm_pool_ops { + int (*pool_init)(void **pool, unsigned int pool_size); + void (*pool_exit)(void **pool); + unsigned int (*pool_alloc_pages)(void *pool, + struct hmm_page_object *page_obj, + unsigned int size, bool cached); + void (*pool_free_pages)(void *pool, + struct hmm_page_object *page_obj); + int (*pool_inited)(void *pool); +}; + +struct hmm_pool { + struct hmm_pool_ops *pops; + + void *pool_info; +}; + +/** + * struct hmm_reserved_pool_info - represents reserved pool private data. + * @pages: a array that store physical pages. + * The array is as reserved memory pool. + * @index: to indicate the first blank page number + * in reserved memory pool(pages array). + * @pgnr: the valid page amount in reserved memory + * pool. + * @list_lock: list lock is used to protect the operation + * to reserved memory pool. + * @flag: reserved memory pool state flag. + */ +struct hmm_reserved_pool_info { + struct page **pages; + + unsigned int index; + unsigned int pgnr; + spinlock_t list_lock; + bool initialized; +}; + +/** + * struct hmm_dynamic_pool_info - represents dynamic pool private data. + * @pages_list: a list that store physical pages. + * The pages list is as dynamic memory pool. + * @list_lock: list lock is used to protect the operation + * to dynamic memory pool. + * @flag: dynamic memory pool state flag. + * @pgptr_cache: struct kmem_cache, manages a cache. + */ +struct hmm_dynamic_pool_info { + struct list_head pages_list; + + /* list lock is used to protect the free pages block lists */ + spinlock_t list_lock; + + struct kmem_cache *pgptr_cache; + bool initialized; + + unsigned int pool_size; + unsigned int pgnr; +}; + +struct hmm_page { + struct page *page; + struct list_head list; +}; + +extern struct hmm_pool_ops reserved_pops; +extern struct hmm_pool_ops dynamic_pops; + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h new file mode 100644 index 0000000000000..52098161082d4 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h @@ -0,0 +1,64 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __HMM_VM_H__ +#define __HMM_VM_H__ + +#include +#include +#include +#include + +struct hmm_vm { + unsigned int start; + unsigned int pgnr; + unsigned int size; + struct list_head vm_node_list; + spinlock_t lock; + struct kmem_cache *cache; +}; + +struct hmm_vm_node { + struct list_head list; + unsigned int start; + unsigned int pgnr; + unsigned int size; + struct hmm_vm *vm; +}; +#define ISP_VM_START 0x0 +#define ISP_VM_SIZE (0x7FFFFFFF) /* 2G address space */ +#define ISP_PTR_NULL NULL + +int hmm_vm_init(struct hmm_vm *vm, unsigned int start, + unsigned int size); + +void hmm_vm_clean(struct hmm_vm *vm); + +struct hmm_vm_node *hmm_vm_alloc_node(struct hmm_vm *vm, + unsigned int pgnr); + +void hmm_vm_free_node(struct hmm_vm_node *node); + +struct hmm_vm_node *hmm_vm_find_node_start(struct hmm_vm *vm, + unsigned int addr); + +struct hmm_vm_node *hmm_vm_find_node_in_range(struct hmm_vm *vm, + unsigned int addr); + +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h new file mode 100644 index 0000000000000..4b2d94a37ea19 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h @@ -0,0 +1,169 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +/* + * ISP MMU driver for classic two-level page tables + */ +#ifndef __ISP_MMU_H__ +#define __ISP_MMU_H__ + +#include +#include +#include + +/* + * do not change these values, the page size for ISP must be the + * same as kernel's page size. + */ +#define ISP_PAGE_OFFSET 12 +#define ISP_PAGE_SIZE (1U << ISP_PAGE_OFFSET) +#define ISP_PAGE_MASK (~(phys_addr_t)(ISP_PAGE_SIZE - 1)) + +#define ISP_L1PT_OFFSET 22 +#define ISP_L1PT_MASK (~((1U << ISP_L1PT_OFFSET) - 1)) + +#define ISP_L2PT_OFFSET 12 +#define ISP_L2PT_MASK (~(ISP_L1PT_MASK|(~(ISP_PAGE_MASK)))) + +#define ISP_L1PT_PTES 1024 +#define ISP_L2PT_PTES 1024 + +#define ISP_PTR_TO_L1_IDX(x) ((((x) & ISP_L1PT_MASK)) \ + >> ISP_L1PT_OFFSET) + +#define ISP_PTR_TO_L2_IDX(x) ((((x) & ISP_L2PT_MASK)) \ + >> ISP_L2PT_OFFSET) + +#define ISP_PAGE_ALIGN(x) (((x) + (ISP_PAGE_SIZE-1)) \ + & ISP_PAGE_MASK) + +#define ISP_PT_TO_VIRT(l1_idx, l2_idx, offset) do {\ + ((l1_idx) << ISP_L1PT_OFFSET) | \ + ((l2_idx) << ISP_L2PT_OFFSET) | \ + (offset)\ +} while (0) + +#define pgnr_to_size(pgnr) ((pgnr) << ISP_PAGE_OFFSET) +#define size_to_pgnr_ceil(size) (((size) + (1 << ISP_PAGE_OFFSET) - 1)\ + >> ISP_PAGE_OFFSET) +#define size_to_pgnr_bottom(size) ((size) >> ISP_PAGE_OFFSET) + +struct isp_mmu; + +struct isp_mmu_client { + /* + * const value + * + * @name: + * driver name + * @pte_valid_mask: + * should be 1 bit valid data, meaning the value should + * be power of 2. + */ + char *name; + unsigned int pte_valid_mask; + unsigned int null_pte; + + /* + * get page directory base address (physical address). + * + * must be provided. + */ + unsigned int (*get_pd_base) (struct isp_mmu *mmu, phys_addr_t pd_base); + /* + * callback to flush tlb. + * + * tlb_flush_range will at least flush TLBs containing + * address mapping from addr to addr + size. + * + * tlb_flush_all will flush all TLBs. + * + * tlb_flush_all is must be provided. if tlb_flush_range is + * not valid, it will set to tlb_flush_all by default. + */ + void (*tlb_flush_range) (struct isp_mmu *mmu, + unsigned int addr, unsigned int size); + void (*tlb_flush_all) (struct isp_mmu *mmu); + unsigned int (*phys_to_pte) (struct isp_mmu *mmu, + phys_addr_t phys); + phys_addr_t (*pte_to_phys) (struct isp_mmu *mmu, + unsigned int pte); + +}; + +struct isp_mmu { + struct isp_mmu_client *driver; + unsigned int l1_pte; + int l2_pgt_refcount[ISP_L1PT_PTES]; + phys_addr_t base_address; + + struct mutex pt_mutex; + struct kmem_cache *tbl_cache; +}; + +/* flags for PDE and PTE */ +#define ISP_PTE_VALID_MASK(mmu) \ + ((mmu)->driver->pte_valid_mask) + +#define ISP_PTE_VALID(mmu, pte) \ + ((pte) & ISP_PTE_VALID_MASK(mmu)) + +#define NULL_PAGE ((phys_addr_t)(-1) & ISP_PAGE_MASK) +#define PAGE_VALID(page) ((page) != NULL_PAGE) + +/* + * init mmu with specific mmu driver. + */ +int isp_mmu_init(struct isp_mmu *mmu, struct isp_mmu_client *driver); +/* + * cleanup all mmu related things. + */ +void isp_mmu_exit(struct isp_mmu *mmu); + +/* + * setup/remove address mapping for pgnr continous physical pages + * and isp_virt. + * + * map/unmap is mutex lock protected, and caller does not have + * to do lock/unlock operation. + * + * map/unmap will not flush tlb, and caller needs to deal with + * this itself. + */ +int isp_mmu_map(struct isp_mmu *mmu, unsigned int isp_virt, + phys_addr_t phys, unsigned int pgnr); + +void isp_mmu_unmap(struct isp_mmu *mmu, unsigned int isp_virt, + unsigned int pgnr); + +static inline void isp_mmu_flush_tlb_all(struct isp_mmu *mmu) +{ + if (mmu->driver && mmu->driver->tlb_flush_all) + mmu->driver->tlb_flush_all(mmu); +} + +#define isp_mmu_flush_tlb isp_mmu_flush_tlb_all + +static inline void isp_mmu_flush_tlb_range(struct isp_mmu *mmu, + unsigned int start, unsigned int size) +{ + if (mmu->driver && mmu->driver->tlb_flush_range) + mmu->driver->tlb_flush_range(mmu, start, size); +} + +#endif /* ISP_MMU_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/sh_mmu_mrfld.h b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/sh_mmu_mrfld.h new file mode 100644 index 0000000000000..662e98f41da29 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/sh_mmu_mrfld.h @@ -0,0 +1,24 @@ +/* + * Support for Merrifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#ifndef __SH_MMU_MRFLD_H__ +#define __SH_MMU_MRFLD_H__ + +extern struct isp_mmu_client sh_mmu_mrfld; +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c new file mode 100644 index 0000000000000..198f29f4a3246 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c @@ -0,0 +1,584 @@ +/* + * Support for Medifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2010 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2010 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +/* + * ISP MMU management wrap code + */ +#include +#include +#include +#include /* for GFP_ATOMIC */ +#include /* for kmalloc */ +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_X86 +#include +#endif + +#include "atomisp_internal.h" +#include "mmu/isp_mmu.h" + +/* + * 64-bit x86 processor physical address layout: + * 0 - 0x7fffffff DDR RAM (2GB) + * 0x80000000 - 0xffffffff MMIO (2GB) + * 0x100000000 - 0x3fffffffffff DDR RAM (64TB) + * So if the system has more than 2GB DDR memory, the lower 2GB occupies the + * physical address 0 - 0x7fffffff and the rest will start from 0x100000000. + * We have to make sure memory is allocated from the lower 2GB for devices + * that are only 32-bit capable(e.g. the ISP MMU). + * + * For any confusion, contact bin.gao@intel.com. + */ +#define NR_PAGES_2GB (SZ_2G / PAGE_SIZE) + +static void free_mmu_map(struct isp_mmu *mmu, unsigned int start_isp_virt, + unsigned int end_isp_virt); + +static unsigned int atomisp_get_pte(phys_addr_t pt, unsigned int idx) +{ + unsigned int *pt_virt = phys_to_virt(pt); + return *(pt_virt + idx); +} + +static void atomisp_set_pte(phys_addr_t pt, + unsigned int idx, unsigned int pte) +{ + unsigned int *pt_virt = phys_to_virt(pt); + *(pt_virt + idx) = pte; +} + +static void *isp_pt_phys_to_virt(phys_addr_t phys) +{ + return phys_to_virt(phys); +} + +static phys_addr_t isp_pte_to_pgaddr(struct isp_mmu *mmu, + unsigned int pte) +{ + return mmu->driver->pte_to_phys(mmu, pte); +} + +static unsigned int isp_pgaddr_to_pte_valid(struct isp_mmu *mmu, + phys_addr_t phys) +{ + unsigned int pte = mmu->driver->phys_to_pte(mmu, phys); + return (unsigned int) (pte | ISP_PTE_VALID_MASK(mmu)); +} + +/* + * allocate a uncacheable page table. + * return physical address. + */ +static phys_addr_t alloc_page_table(struct isp_mmu *mmu) +{ + int i; + phys_addr_t page; + void *virt; + + /*page table lock may needed here*/ + /* + * The slab allocator(kmem_cache and kmalloc family) doesn't handle + * GFP_DMA32 flag, so we have to use buddy allocator. + */ + if (totalram_pages > (unsigned long)NR_PAGES_2GB) + virt = (void *)__get_free_page(GFP_KERNEL | GFP_DMA32); + else + virt = kmem_cache_zalloc(mmu->tbl_cache, GFP_KERNEL); + if (!virt) + return (phys_addr_t)NULL_PAGE; + + /* + * we need a uncacheable page table. + */ +#ifdef CONFIG_X86 + set_memory_uc((unsigned long)virt, 1); +#endif + + page = virt_to_phys(virt); + + for (i = 0; i < 1024; i++) { + /* NEED CHECK */ + atomisp_set_pte(page, i, mmu->driver->null_pte); + } + + return page; +} + +static void free_page_table(struct isp_mmu *mmu, phys_addr_t page) +{ + void *virt; + page &= ISP_PAGE_MASK; + /* + * reset the page to write back before free + */ + virt = phys_to_virt(page); + +#ifdef CONFIG_X86 + set_memory_wb((unsigned long)virt, 1); +#endif + + kmem_cache_free(mmu->tbl_cache, virt); +} + +static void mmu_remap_error(struct isp_mmu *mmu, + phys_addr_t l1_pt, unsigned int l1_idx, + phys_addr_t l2_pt, unsigned int l2_idx, + unsigned int isp_virt, phys_addr_t old_phys, + phys_addr_t new_phys) +{ + dev_err(atomisp_dev, "address remap:\n\n" + "\tL1 PT: virt = %p, phys = 0x%llx, " + "idx = %d\n" + "\tL2 PT: virt = %p, phys = 0x%llx, " + "idx = %d\n" + "\told: isp_virt = 0x%x, phys = 0x%llx\n" + "\tnew: isp_virt = 0x%x, phys = 0x%llx\n", + isp_pt_phys_to_virt(l1_pt), + (u64)l1_pt, l1_idx, + isp_pt_phys_to_virt(l2_pt), + (u64)l2_pt, l2_idx, isp_virt, + (u64)old_phys, isp_virt, + (u64)new_phys); +} + +static void mmu_unmap_l2_pte_error(struct isp_mmu *mmu, + phys_addr_t l1_pt, unsigned int l1_idx, + phys_addr_t l2_pt, unsigned int l2_idx, + unsigned int isp_virt, unsigned int pte) +{ + dev_err(atomisp_dev, "unmap unvalid L2 pte:\n\n" + "\tL1 PT: virt = %p, phys = 0x%llx, " + "idx = %d\n" + "\tL2 PT: virt = %p, phys = 0x%llx, " + "idx = %d\n" + "\tisp_virt = 0x%x, pte(page phys) = 0x%x\n", + isp_pt_phys_to_virt(l1_pt), + (u64)l1_pt, l1_idx, + isp_pt_phys_to_virt(l2_pt), + (u64)l2_pt, l2_idx, isp_virt, + pte); +} + +static void mmu_unmap_l1_pte_error(struct isp_mmu *mmu, + phys_addr_t l1_pt, unsigned int l1_idx, + unsigned int isp_virt, unsigned int pte) +{ + dev_err(atomisp_dev, "unmap unvalid L1 pte (L2 PT):\n\n" + "\tL1 PT: virt = %p, phys = 0x%llx, " + "idx = %d\n" + "\tisp_virt = 0x%x, l1_pte(L2 PT) = 0x%x\n", + isp_pt_phys_to_virt(l1_pt), + (u64)l1_pt, l1_idx, (unsigned int)isp_virt, + pte); +} + +static void mmu_unmap_l1_pt_error(struct isp_mmu *mmu, unsigned int pte) +{ + dev_err(atomisp_dev, "unmap unvalid L1PT:\n\n" + "L1PT = 0x%x\n", (unsigned int)pte); +} + +/* + * Update L2 page table according to isp virtual address and page physical + * address + */ +static int mmu_l2_map(struct isp_mmu *mmu, phys_addr_t l1_pt, + unsigned int l1_idx, phys_addr_t l2_pt, + unsigned int start, unsigned int end, phys_addr_t phys) +{ + unsigned int ptr; + unsigned int idx; + unsigned int pte; + + l2_pt &= ISP_PAGE_MASK; + + start = start & ISP_PAGE_MASK; + end = ISP_PAGE_ALIGN(end); + phys &= ISP_PAGE_MASK; + + ptr = start; + do { + idx = ISP_PTR_TO_L2_IDX(ptr); + + pte = atomisp_get_pte(l2_pt, idx); + + if (ISP_PTE_VALID(mmu, pte)) { + mmu_remap_error(mmu, l1_pt, l1_idx, + l2_pt, idx, ptr, pte, phys); + + /* free all mapped pages */ + free_mmu_map(mmu, start, ptr); + + return -EINVAL; + } + + pte = isp_pgaddr_to_pte_valid(mmu, phys); + + atomisp_set_pte(l2_pt, idx, pte); + mmu->l2_pgt_refcount[l1_idx]++; + ptr += (1U << ISP_L2PT_OFFSET); + phys += (1U << ISP_L2PT_OFFSET); + } while (ptr < end && idx < ISP_L2PT_PTES - 1); + + return 0; +} + +/* + * Update L1 page table according to isp virtual address and page physical + * address + */ +static int mmu_l1_map(struct isp_mmu *mmu, phys_addr_t l1_pt, + unsigned int start, unsigned int end, + phys_addr_t phys) +{ + phys_addr_t l2_pt; + unsigned int ptr, l1_aligned; + unsigned int idx; + unsigned int l2_pte; + int ret; + + l1_pt &= ISP_PAGE_MASK; + + start = start & ISP_PAGE_MASK; + end = ISP_PAGE_ALIGN(end); + phys &= ISP_PAGE_MASK; + + ptr = start; + do { + idx = ISP_PTR_TO_L1_IDX(ptr); + + l2_pte = atomisp_get_pte(l1_pt, idx); + + if (!ISP_PTE_VALID(mmu, l2_pte)) { + l2_pt = alloc_page_table(mmu); + if (l2_pt == NULL_PAGE) { + dev_err(atomisp_dev, + "alloc page table fail.\n"); + + /* free all mapped pages */ + free_mmu_map(mmu, start, ptr); + + return -ENOMEM; + } + + l2_pte = isp_pgaddr_to_pte_valid(mmu, l2_pt); + + atomisp_set_pte(l1_pt, idx, l2_pte); + mmu->l2_pgt_refcount[idx] = 0; + } + + l2_pt = isp_pte_to_pgaddr(mmu, l2_pte); + + l1_aligned = (ptr & ISP_PAGE_MASK) + (1U << ISP_L1PT_OFFSET); + + if (l1_aligned < end) { + ret = mmu_l2_map(mmu, l1_pt, idx, + l2_pt, ptr, l1_aligned, phys); + phys += (l1_aligned - ptr); + ptr = l1_aligned; + } else { + ret = mmu_l2_map(mmu, l1_pt, idx, + l2_pt, ptr, end, phys); + phys += (end - ptr); + ptr = end; + } + + if (ret) { + dev_err(atomisp_dev, "setup mapping in L2PT fail.\n"); + + /* free all mapped pages */ + free_mmu_map(mmu, start, ptr); + + return -EINVAL; + } + } while (ptr < end && idx < ISP_L1PT_PTES); + + return 0; +} + +/* + * Update page table according to isp virtual address and page physical + * address + */ +static int mmu_map(struct isp_mmu *mmu, unsigned int isp_virt, + phys_addr_t phys, unsigned int pgnr) +{ + unsigned int start, end; + phys_addr_t l1_pt; + int ret; + + mutex_lock(&mmu->pt_mutex); + if (!ISP_PTE_VALID(mmu, mmu->l1_pte)) { + /* + * allocate 1 new page for L1 page table + */ + l1_pt = alloc_page_table(mmu); + if (l1_pt == NULL_PAGE) { + dev_err(atomisp_dev, "alloc page table fail.\n"); + mutex_unlock(&mmu->pt_mutex); + return -ENOMEM; + } + + /* + * setup L1 page table physical addr to MMU + */ + mmu->base_address = l1_pt; + mmu->l1_pte = isp_pgaddr_to_pte_valid(mmu, l1_pt); + memset(mmu->l2_pgt_refcount, 0, sizeof(int) * ISP_L1PT_PTES); + } + + l1_pt = isp_pte_to_pgaddr(mmu, mmu->l1_pte); + + start = (isp_virt) & ISP_PAGE_MASK; + end = start + (pgnr << ISP_PAGE_OFFSET); + phys &= ISP_PAGE_MASK; + + ret = mmu_l1_map(mmu, l1_pt, start, end, phys); + + if (ret) + dev_err(atomisp_dev, "setup mapping in L1PT fail.\n"); + + mutex_unlock(&mmu->pt_mutex); + return ret; +} + +/* + * Free L2 page table according to isp virtual address and page physical + * address + */ +static void mmu_l2_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, + unsigned int l1_idx, phys_addr_t l2_pt, + unsigned int start, unsigned int end) +{ + + unsigned int ptr; + unsigned int idx; + unsigned int pte; + + l2_pt &= ISP_PAGE_MASK; + + start = start & ISP_PAGE_MASK; + end = ISP_PAGE_ALIGN(end); + + ptr = start; + do { + idx = ISP_PTR_TO_L2_IDX(ptr); + + pte = atomisp_get_pte(l2_pt, idx); + + if (!ISP_PTE_VALID(mmu, pte)) + mmu_unmap_l2_pte_error(mmu, l1_pt, l1_idx, + l2_pt, idx, ptr, pte); + + atomisp_set_pte(l2_pt, idx, mmu->driver->null_pte); + mmu->l2_pgt_refcount[l1_idx]--; + ptr += (1U << ISP_L2PT_OFFSET); + } while (ptr < end && idx < ISP_L2PT_PTES - 1); + + if (mmu->l2_pgt_refcount[l1_idx] == 0) { + free_page_table(mmu, l2_pt); + atomisp_set_pte(l1_pt, l1_idx, mmu->driver->null_pte); + } +} + +/* + * Free L1 page table according to isp virtual address and page physical + * address + */ +static void mmu_l1_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, + unsigned int start, unsigned int end) +{ + phys_addr_t l2_pt; + unsigned int ptr, l1_aligned; + unsigned int idx; + unsigned int l2_pte; + + l1_pt &= ISP_PAGE_MASK; + + start = start & ISP_PAGE_MASK; + end = ISP_PAGE_ALIGN(end); + + ptr = start; + do { + idx = ISP_PTR_TO_L1_IDX(ptr); + + l2_pte = atomisp_get_pte(l1_pt, idx); + + if (!ISP_PTE_VALID(mmu, l2_pte)) { + mmu_unmap_l1_pte_error(mmu, l1_pt, idx, ptr, l2_pte); + continue; + } + + l2_pt = isp_pte_to_pgaddr(mmu, l2_pte); + + l1_aligned = (ptr & ISP_PAGE_MASK) + (1U << ISP_L1PT_OFFSET); + + if (l1_aligned < end) { + mmu_l2_unmap(mmu, l1_pt, idx, l2_pt, ptr, l1_aligned); + ptr = l1_aligned; + } else { + mmu_l2_unmap(mmu, l1_pt, idx, l2_pt, ptr, end); + ptr = end; + } + /* + * use the same L2 page next time, so we don't + * need to invalidate and free this PT. + */ + /* atomisp_set_pte(l1_pt, idx, NULL_PTE); */ + } while (ptr < end && idx < ISP_L1PT_PTES); +} + +/* + * Free page table according to isp virtual address and page physical + * address + */ +static void mmu_unmap(struct isp_mmu *mmu, unsigned int isp_virt, + unsigned int pgnr) +{ + unsigned int start, end; + phys_addr_t l1_pt; + + mutex_lock(&mmu->pt_mutex); + if (!ISP_PTE_VALID(mmu, mmu->l1_pte)) { + mmu_unmap_l1_pt_error(mmu, mmu->l1_pte); + mutex_unlock(&mmu->pt_mutex); + return; + } + + l1_pt = isp_pte_to_pgaddr(mmu, mmu->l1_pte); + + start = (isp_virt) & ISP_PAGE_MASK; + end = start + (pgnr << ISP_PAGE_OFFSET); + + mmu_l1_unmap(mmu, l1_pt, start, end); + mutex_unlock(&mmu->pt_mutex); +} + +/* + * Free page tables according to isp start virtual address and end virtual + * address. + */ +static void free_mmu_map(struct isp_mmu *mmu, unsigned int start_isp_virt, + unsigned int end_isp_virt) +{ + unsigned int pgnr; + unsigned int start, end; + + start = (start_isp_virt) & ISP_PAGE_MASK; + end = (end_isp_virt) & ISP_PAGE_MASK; + pgnr = (end - start) >> ISP_PAGE_OFFSET; + mmu_unmap(mmu, start, pgnr); +} + +int isp_mmu_map(struct isp_mmu *mmu, unsigned int isp_virt, + phys_addr_t phys, unsigned int pgnr) +{ + return mmu_map(mmu, isp_virt, phys, pgnr); +} + +void isp_mmu_unmap(struct isp_mmu *mmu, unsigned int isp_virt, + unsigned int pgnr) +{ + mmu_unmap(mmu, isp_virt, pgnr); +} + +static void isp_mmu_flush_tlb_range_default(struct isp_mmu *mmu, + unsigned int start, + unsigned int size) +{ + isp_mmu_flush_tlb(mmu); +} + +/*MMU init for internal structure*/ +int isp_mmu_init(struct isp_mmu *mmu, struct isp_mmu_client *driver) +{ + if (!mmu) /* error */ + return -EINVAL; + if (!driver) /* error */ + return -EINVAL; + + if (!driver->name) + dev_warn(atomisp_dev, "NULL name for MMU driver...\n"); + + mmu->driver = driver; + + if (!driver->tlb_flush_all) { + dev_err(atomisp_dev, "tlb_flush_all operation not provided.\n"); + return -EINVAL; + } + + if (!driver->tlb_flush_range) + driver->tlb_flush_range = isp_mmu_flush_tlb_range_default; + + if (!driver->pte_valid_mask) { + dev_err(atomisp_dev, "PTE_MASK is missing from mmu driver\n"); + return -EINVAL; + } + + mmu->l1_pte = driver->null_pte; + + mutex_init(&mmu->pt_mutex); + + mmu->tbl_cache = kmem_cache_create("iopte_cache", ISP_PAGE_SIZE, + ISP_PAGE_SIZE, SLAB_HWCACHE_ALIGN, + NULL); + if (!mmu->tbl_cache) + return -ENOMEM; + + return 0; +} + +/*Free L1 and L2 page table*/ +void isp_mmu_exit(struct isp_mmu *mmu) +{ + unsigned int idx; + unsigned int pte; + phys_addr_t l1_pt, l2_pt; + + if (!mmu) + return; + + if (!ISP_PTE_VALID(mmu, mmu->l1_pte)) { + dev_warn(atomisp_dev, "invalid L1PT: pte = 0x%x\n", + (unsigned int)mmu->l1_pte); + return; + } + + l1_pt = isp_pte_to_pgaddr(mmu, mmu->l1_pte); + + for (idx = 0; idx < ISP_L1PT_PTES; idx++) { + pte = atomisp_get_pte(l1_pt, idx); + + if (ISP_PTE_VALID(mmu, pte)) { + l2_pt = isp_pte_to_pgaddr(mmu, pte); + + free_page_table(mmu, l2_pt); + } + } + + free_page_table(mmu, l1_pt); + + kmem_cache_destroy(mmu->tbl_cache); +} diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c b/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c new file mode 100644 index 0000000000000..c0212564b7c82 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c @@ -0,0 +1,75 @@ +/* + * Support for Merrifield PNW Camera Imaging ISP subsystem. + * + * Copyright (c) 2012 Intel Corporation. All Rights Reserved. + * + * Copyright (c) 2012 Silicon Hive www.siliconhive.com. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ +#include "type_support.h" +#include "mmu/isp_mmu.h" +#include "mmu/sh_mmu_mrfld.h" +#include "memory_access/memory_access.h" +#include "atomisp_compat.h" + +#define MERR_VALID_PTE_MASK 0x80000000 + +/* + * include SH header file here + */ + +static unsigned int sh_phys_to_pte(struct isp_mmu *mmu, + phys_addr_t phys) +{ + return phys >> ISP_PAGE_OFFSET; +} + +static phys_addr_t sh_pte_to_phys(struct isp_mmu *mmu, + unsigned int pte) +{ + unsigned int mask = mmu->driver->pte_valid_mask; + return (phys_addr_t)((pte & ~mask) << ISP_PAGE_OFFSET); +} + +static unsigned int sh_get_pd_base(struct isp_mmu *mmu, + phys_addr_t phys) +{ + unsigned int pte = sh_phys_to_pte(mmu, phys); + return HOST_ADDRESS(pte); +} + +/* + * callback to flush tlb. + * + * tlb_flush_range will at least flush TLBs containing + * address mapping from addr to addr + size. + * + * tlb_flush_all will flush all TLBs. + * + * tlb_flush_all is must be provided. if tlb_flush_range is + * not valid, it will set to tlb_flush_all by default. + */ +static void sh_tlb_flush(struct isp_mmu *mmu) +{ + atomisp_css_mmu_invalidate_cache(); +} + +struct isp_mmu_client sh_mmu_mrfld = { + .name = "Silicon Hive ISP3000 MMU", + .pte_valid_mask = MERR_VALID_PTE_MASK, + .null_pte = ~MERR_VALID_PTE_MASK, + .get_pd_base = sh_get_pd_base, + .tlb_flush_all = sh_tlb_flush, + .phys_to_pte = sh_phys_to_pte, + .pte_to_phys = sh_pte_to_phys, +}; diff --git a/drivers/staging/media/atomisp/platform/Makefile b/drivers/staging/media/atomisp/platform/Makefile new file mode 100644 index 0000000000000..0e3b7e1c81c68 --- /dev/null +++ b/drivers/staging/media/atomisp/platform/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for camera drivers. +# + +obj-$(CONFIG_INTEL_ATOMISP) += intel-mid/ diff --git a/drivers/staging/media/atomisp/platform/intel-mid/Makefile b/drivers/staging/media/atomisp/platform/intel-mid/Makefile new file mode 100644 index 0000000000000..c53db1364e217 --- /dev/null +++ b/drivers/staging/media/atomisp/platform/intel-mid/Makefile @@ -0,0 +1,4 @@ +# +# Makefile for intel-mid devices. +# +obj-$(CONFIG_INTEL_ATOMISP) += atomisp_gmin_platform.o diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c new file mode 100644 index 0000000000000..70c34de987079 --- /dev/null +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -0,0 +1,779 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../include/linux/atomisp_platform.h" +#include "../../include/linux/atomisp_gmin_platform.h" + +#define MAX_SUBDEVS 8 + +#define VLV2_CLK_PLL_19P2MHZ 1 /* XTAL on CHT */ +#define ELDO1_SEL_REG 0x19 +#define ELDO1_1P8V 0x16 +#define ELDO1_CTRL_SHIFT 0x00 +#define ELDO2_SEL_REG 0x1a +#define ELDO2_1P8V 0x16 +#define ELDO2_CTRL_SHIFT 0x01 + +struct gmin_subdev { + struct v4l2_subdev *subdev; + int clock_num; + int clock_src; + bool clock_on; + struct clk *pmc_clk; + struct gpio_desc *gpio0; + struct gpio_desc *gpio1; + struct regulator *v1p8_reg; + struct regulator *v2p8_reg; + struct regulator *v1p2_reg; + struct regulator *v2p8_vcm_reg; + enum atomisp_camera_port csi_port; + unsigned int csi_lanes; + enum atomisp_input_format csi_fmt; + enum atomisp_bayer_order csi_bayer; + bool v1p8_on; + bool v2p8_on; + bool v1p2_on; + bool v2p8_vcm_on; +}; + +static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS]; + +static enum { PMIC_UNSET = 0, PMIC_REGULATOR, PMIC_AXP, PMIC_TI, + PMIC_CRYSTALCOVE } pmic_id; + +/* The atomisp uses type==0 for the end-of-list marker, so leave space. */ +static struct intel_v4l2_subdev_table pdata_subdevs[MAX_SUBDEVS + 1]; + +static const struct atomisp_platform_data pdata = { + .subdevs = pdata_subdevs, +}; + +/* + * Something of a hack. The ECS E7 board drives camera 2.8v from an + * external regulator instead of the PMIC. There's a gmin_CamV2P8 + * config variable that specifies the GPIO to handle this particular + * case, but this needs a broader architecture for handling camera + * power. + */ +enum { V2P8_GPIO_UNSET = -2, V2P8_GPIO_NONE = -1 }; +static int v2p8_gpio = V2P8_GPIO_UNSET; + +/* + * Something of a hack. The CHT RVP board drives camera 1.8v from an + * external regulator instead of the PMIC just like ECS E7 board, see the + * comments above. + */ +enum { V1P8_GPIO_UNSET = -2, V1P8_GPIO_NONE = -1 }; +static int v1p8_gpio = V1P8_GPIO_UNSET; + +static LIST_HEAD(vcm_devices); +static DEFINE_MUTEX(vcm_lock); + +static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev); + +/* + * Legacy/stub behavior copied from upstream platform_camera.c. The + * atomisp driver relies on these values being non-NULL in a few + * places, even though they are hard-coded in all current + * implementations. + */ +const struct atomisp_camera_caps *atomisp_get_default_camera_caps(void) +{ + static const struct atomisp_camera_caps caps = { + .sensor_num = 1, + .sensor = { + { .stream_num = 1, }, + }, + }; + return ∩︀ +} +EXPORT_SYMBOL_GPL(atomisp_get_default_camera_caps); + +const struct atomisp_platform_data *atomisp_get_platform_data(void) +{ + return &pdata; +} +EXPORT_SYMBOL_GPL(atomisp_get_platform_data); + +int atomisp_register_i2c_module(struct v4l2_subdev *subdev, + struct camera_sensor_platform_data *plat_data, + enum intel_v4l2_subdev_type type) +{ + int i; + struct i2c_board_info *bi; + struct gmin_subdev *gs; + struct i2c_client *client = v4l2_get_subdevdata(subdev); + struct acpi_device *adev = ACPI_COMPANION(&client->dev); + + dev_info(&client->dev, "register atomisp i2c module type %d\n", type); + + /* The windows driver model (and thus most BIOSes by default) + * uses ACPI runtime power management for camera devices, but + * we don't. Disable it, or else the rails will be needlessly + * tickled during suspend/resume. This has caused power and + * performance issues on multiple devices. + */ + adev->power.flags.power_resources = 0; + + for (i = 0; i < MAX_SUBDEVS; i++) + if (!pdata.subdevs[i].type) + break; + + if (pdata.subdevs[i].type) + return -ENOMEM; + + /* Note subtlety of initialization order: at the point where + * this registration API gets called, the platform data + * callbacks have probably already been invoked, so the + * gmin_subdev struct is already initialized for us. + */ + gs = find_gmin_subdev(subdev); + + pdata.subdevs[i].type = type; + pdata.subdevs[i].port = gs->csi_port; + pdata.subdevs[i].subdev = subdev; + pdata.subdevs[i].v4l2_subdev.i2c_adapter_id = client->adapter->nr; + + /* Convert i2c_client to i2c_board_info */ + bi = &pdata.subdevs[i].v4l2_subdev.board_info; + memcpy(bi->type, client->name, I2C_NAME_SIZE); + bi->flags = client->flags; + bi->addr = client->addr; + bi->irq = client->irq; + bi->platform_data = plat_data; + + return 0; +} +EXPORT_SYMBOL_GPL(atomisp_register_i2c_module); + +struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter, + struct i2c_board_info *board_info) +{ + int i; + + for (i = 0; i < MAX_SUBDEVS && pdata.subdevs[i].type; i++) { + struct intel_v4l2_subdev_table *sd = &pdata.subdevs[i]; + + if (sd->v4l2_subdev.i2c_adapter_id == adapter->nr && + sd->v4l2_subdev.board_info.addr == board_info->addr) + return sd->subdev; + } + return NULL; +} +EXPORT_SYMBOL_GPL(atomisp_gmin_find_subdev); + +int atomisp_gmin_remove_subdev(struct v4l2_subdev *sd) +{ + int i, j; + + if (!sd) + return 0; + + for (i = 0; i < MAX_SUBDEVS; i++) { + if (pdata.subdevs[i].subdev == sd) { + for (j = i + 1; j <= MAX_SUBDEVS; j++) + pdata.subdevs[j - 1] = pdata.subdevs[j]; + } + if (gmin_subdevs[i].subdev == sd) { + if (gmin_subdevs[i].gpio0) + gpiod_put(gmin_subdevs[i].gpio0); + gmin_subdevs[i].gpio0 = NULL; + if (gmin_subdevs[i].gpio1) + gpiod_put(gmin_subdevs[i].gpio1); + gmin_subdevs[i].gpio1 = NULL; + if (pmic_id == PMIC_REGULATOR) { + regulator_put(gmin_subdevs[i].v1p8_reg); + regulator_put(gmin_subdevs[i].v2p8_reg); + regulator_put(gmin_subdevs[i].v1p2_reg); + regulator_put(gmin_subdevs[i].v2p8_vcm_reg); + } + gmin_subdevs[i].subdev = NULL; + } + } + return 0; +} +EXPORT_SYMBOL_GPL(atomisp_gmin_remove_subdev); + +struct gmin_cfg_var { + const char *name, *val; +}; + +static struct gmin_cfg_var ffrd8_vars[] = { + { "INTCF1B:00_ImxId", "0x134" }, + { "INTCF1B:00_CsiPort", "1" }, + { "INTCF1B:00_CsiLanes", "4" }, + { "INTCF1B:00_CamClk", "0" }, + {}, +}; + +/* Cribbed from MCG defaults in the mt9m114 driver, not actually verified + * vs. T100 hardware + */ +static struct gmin_cfg_var t100_vars[] = { + { "INT33F0:00_CsiPort", "0" }, + { "INT33F0:00_CsiLanes", "1" }, + { "INT33F0:00_CamClk", "1" }, + {}, +}; + +static struct gmin_cfg_var mrd7_vars[] = { + {"INT33F8:00_CamType", "1"}, + {"INT33F8:00_CsiPort", "1"}, + {"INT33F8:00_CsiLanes", "2"}, + {"INT33F8:00_CsiFmt", "13"}, + {"INT33F8:00_CsiBayer", "0"}, + {"INT33F8:00_CamClk", "0"}, + {"INT33F9:00_CamType", "1"}, + {"INT33F9:00_CsiPort", "0"}, + {"INT33F9:00_CsiLanes", "1"}, + {"INT33F9:00_CsiFmt", "13"}, + {"INT33F9:00_CsiBayer", "0"}, + {"INT33F9:00_CamClk", "1"}, + {}, +}; + +static struct gmin_cfg_var ecs7_vars[] = { + {"INT33BE:00_CsiPort", "1"}, + {"INT33BE:00_CsiLanes", "2"}, + {"INT33BE:00_CsiFmt", "13"}, + {"INT33BE:00_CsiBayer", "2"}, + {"INT33BE:00_CamClk", "0"}, + {"INT33F0:00_CsiPort", "0"}, + {"INT33F0:00_CsiLanes", "1"}, + {"INT33F0:00_CsiFmt", "13"}, + {"INT33F0:00_CsiBayer", "0"}, + {"INT33F0:00_CamClk", "1"}, + {"gmin_V2P8GPIO", "402"}, + {}, +}; + +static struct gmin_cfg_var i8880_vars[] = { + {"XXOV2680:00_CsiPort", "1"}, + {"XXOV2680:00_CsiLanes", "1"}, + {"XXOV2680:00_CamClk", "0"}, + {"XXGC0310:00_CsiPort", "0"}, + {"XXGC0310:00_CsiLanes", "1"}, + {"XXGC0310:00_CamClk", "1"}, + {}, +}; + +static const struct dmi_system_id gmin_vars[] = { + { + .ident = "BYT-T FFD8", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "BYT-T FFD8"), + }, + .driver_data = ffrd8_vars, + }, + { + .ident = "T100TA", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "T100TA"), + }, + .driver_data = t100_vars, + }, + { + .ident = "MRD7", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "TABLET"), + DMI_MATCH(DMI_BOARD_VERSION, "MRD 7"), + }, + .driver_data = mrd7_vars, + }, + { + .ident = "ST70408", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "ST70408"), + }, + .driver_data = ecs7_vars, + }, + { + .ident = "VTA0803", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "VTA0803"), + }, + .driver_data = i8880_vars, + }, + {} +}; + +#define GMIN_CFG_VAR_EFI_GUID EFI_GUID(0xecb54cd9, 0xe5ae, 0x4fdc, \ + 0xa9, 0x71, 0xe8, 0x77, \ + 0x75, 0x60, 0x68, 0xf7) + +#define CFG_VAR_NAME_MAX 64 + +#define GMIN_PMC_CLK_NAME 14 /* "pmc_plt_clk_[0..5]" */ +static char gmin_pmc_clk_name[GMIN_PMC_CLK_NAME]; + +static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) +{ + int i, ret; + struct device *dev; + struct i2c_client *client = v4l2_get_subdevdata(subdev); + + if (!pmic_id) + pmic_id = PMIC_REGULATOR; + + if (!client) + return NULL; + + dev = &client->dev; + + for (i = 0; i < MAX_SUBDEVS && gmin_subdevs[i].subdev; i++) + ; + if (i >= MAX_SUBDEVS) + return NULL; + + dev_info(dev, + "gmin: initializing atomisp module subdev data.PMIC ID %d\n", + pmic_id); + + gmin_subdevs[i].subdev = subdev; + gmin_subdevs[i].clock_num = gmin_get_var_int(dev, "CamClk", 0); + /*WA:CHT requires XTAL clock as PLL is not stable.*/ + gmin_subdevs[i].clock_src = gmin_get_var_int(dev, "ClkSrc", + VLV2_CLK_PLL_19P2MHZ); + gmin_subdevs[i].csi_port = gmin_get_var_int(dev, "CsiPort", 0); + gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, "CsiLanes", 1); + + /* get PMC clock with clock framework */ + snprintf(gmin_pmc_clk_name, + sizeof(gmin_pmc_clk_name), + "%s_%d", "pmc_plt_clk", gmin_subdevs[i].clock_num); + + gmin_subdevs[i].pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name); + if (IS_ERR(gmin_subdevs[i].pmc_clk)) { + ret = PTR_ERR(gmin_subdevs[i].pmc_clk); + + dev_err(dev, + "Failed to get clk from %s : %d\n", + gmin_pmc_clk_name, + ret); + + return NULL; + } + + /* + * The firmware might enable the clock at + * boot (this information may or may not + * be reflected in the enable clock register). + * To change the rate we must disable the clock + * first to cover these cases. Due to common + * clock framework restrictions that do not allow + * to disable a clock that has not been enabled, + * we need to enable the clock first. + */ + ret = clk_prepare_enable(gmin_subdevs[i].pmc_clk); + if (!ret) + clk_disable_unprepare(gmin_subdevs[i].pmc_clk); + + gmin_subdevs[i].gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW); + if (IS_ERR(gmin_subdevs[i].gpio0)) + gmin_subdevs[i].gpio0 = NULL; + + gmin_subdevs[i].gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW); + if (IS_ERR(gmin_subdevs[i].gpio1)) + gmin_subdevs[i].gpio1 = NULL; + + if (pmic_id == PMIC_REGULATOR) { + gmin_subdevs[i].v1p8_reg = regulator_get(dev, "V1P8SX"); + gmin_subdevs[i].v2p8_reg = regulator_get(dev, "V2P8SX"); + gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A"); + gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B"); + + /* Note: ideally we would initialize v[12]p8_on to the + * output of regulator_is_enabled(), but sadly that + * API is broken with the current drivers, returning + * "1" for a regulator that will then emit a + * "unbalanced disable" WARNing if we try to disable + * it. + */ + } + + return &gmin_subdevs[i]; +} + +static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev) +{ + int i; + + for (i = 0; i < MAX_SUBDEVS; i++) + if (gmin_subdevs[i].subdev == subdev) + return &gmin_subdevs[i]; + return gmin_subdev_add(subdev); +} + +static int gmin_gpio0_ctrl(struct v4l2_subdev *subdev, int on) +{ + struct gmin_subdev *gs = find_gmin_subdev(subdev); + + if (gs) { + gpiod_set_value(gs->gpio0, on); + return 0; + } + return -EINVAL; +} + +static int gmin_gpio1_ctrl(struct v4l2_subdev *subdev, int on) +{ + struct gmin_subdev *gs = find_gmin_subdev(subdev); + + if (gs) { + gpiod_set_value(gs->gpio1, on); + return 0; + } + return -EINVAL; +} + +static int gmin_v1p2_ctrl(struct v4l2_subdev *subdev, int on) +{ + struct gmin_subdev *gs = find_gmin_subdev(subdev); + + if (!gs || gs->v1p2_on == on) + return 0; + gs->v1p2_on = on; + + if (gs->v1p2_reg) { + if (on) + return regulator_enable(gs->v1p2_reg); + else + return regulator_disable(gs->v1p2_reg); + } + + /*TODO:v1p2 needs to extend to other PMICs*/ + + return -EINVAL; +} + +static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on) +{ + struct gmin_subdev *gs = find_gmin_subdev(subdev); + int ret; + + if (v1p8_gpio == V1P8_GPIO_UNSET) { + v1p8_gpio = gmin_get_var_int(NULL, "V1P8GPIO", V1P8_GPIO_NONE); + if (v1p8_gpio != V1P8_GPIO_NONE) { + pr_info("atomisp_gmin_platform: 1.8v power on GPIO %d\n", + v1p8_gpio); + ret = gpio_request(v1p8_gpio, "camera_v1p8_en"); + if (!ret) + ret = gpio_direction_output(v1p8_gpio, 0); + if (ret) + pr_err("V1P8 GPIO initialization failed\n"); + } + } + + if (!gs || gs->v1p8_on == on) + return 0; + gs->v1p8_on = on; + + if (v1p8_gpio >= 0) + gpio_set_value(v1p8_gpio, on); + + if (gs->v1p8_reg) { + regulator_set_voltage(gs->v1p8_reg, 1800000, 1800000); + if (on) + return regulator_enable(gs->v1p8_reg); + else + return regulator_disable(gs->v1p8_reg); + } + + return -EINVAL; +} + +static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) +{ + struct gmin_subdev *gs = find_gmin_subdev(subdev); + int ret; + + if (v2p8_gpio == V2P8_GPIO_UNSET) { + v2p8_gpio = gmin_get_var_int(NULL, "V2P8GPIO", V2P8_GPIO_NONE); + if (v2p8_gpio != V2P8_GPIO_NONE) { + pr_info("atomisp_gmin_platform: 2.8v power on GPIO %d\n", + v2p8_gpio); + ret = gpio_request(v2p8_gpio, "camera_v2p8"); + if (!ret) + ret = gpio_direction_output(v2p8_gpio, 0); + if (ret) + pr_err("V2P8 GPIO initialization failed\n"); + } + } + + if (!gs || gs->v2p8_on == on) + return 0; + gs->v2p8_on = on; + + if (v2p8_gpio >= 0) + gpio_set_value(v2p8_gpio, on); + + if (gs->v2p8_reg) { + regulator_set_voltage(gs->v2p8_reg, 2900000, 2900000); + if (on) + return regulator_enable(gs->v2p8_reg); + else + return regulator_disable(gs->v2p8_reg); + } + + return -EINVAL; +} + +static int gmin_flisclk_ctrl(struct v4l2_subdev *subdev, int on) +{ + int ret = 0; + struct gmin_subdev *gs = find_gmin_subdev(subdev); + struct i2c_client *client = v4l2_get_subdevdata(subdev); + + if (gs->clock_on == !!on) + return 0; + + if (on) { + ret = clk_set_rate(gs->pmc_clk, gs->clock_src); + + if (ret) + dev_err(&client->dev, "unable to set PMC rate %d\n", + gs->clock_src); + + ret = clk_prepare_enable(gs->pmc_clk); + if (ret == 0) + gs->clock_on = true; + } else { + clk_disable_unprepare(gs->pmc_clk); + gs->clock_on = false; + } + + return ret; +} + +static int gmin_csi_cfg(struct v4l2_subdev *sd, int flag) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct gmin_subdev *gs = find_gmin_subdev(sd); + + if (!client || !gs) + return -ENODEV; + + return camera_sensor_csi(sd, gs->csi_port, gs->csi_lanes, + gs->csi_fmt, gs->csi_bayer, flag); +} + +static struct camera_vcm_control *gmin_get_vcm_ctrl(struct v4l2_subdev *subdev, + char *camera_module) +{ + struct i2c_client *client = v4l2_get_subdevdata(subdev); + struct gmin_subdev *gs = find_gmin_subdev(subdev); + struct camera_vcm_control *vcm; + + if (client == NULL || gs == NULL) + return NULL; + + if (!camera_module) + return NULL; + + mutex_lock(&vcm_lock); + list_for_each_entry(vcm, &vcm_devices, list) { + if (!strcmp(camera_module, vcm->camera_module)) { + mutex_unlock(&vcm_lock); + return vcm; + } + } + + mutex_unlock(&vcm_lock); + return NULL; +} + +static struct camera_sensor_platform_data gmin_plat = { + .gpio0_ctrl = gmin_gpio0_ctrl, + .gpio1_ctrl = gmin_gpio1_ctrl, + .v1p8_ctrl = gmin_v1p8_ctrl, + .v2p8_ctrl = gmin_v2p8_ctrl, + .v1p2_ctrl = gmin_v1p2_ctrl, + .flisclk_ctrl = gmin_flisclk_ctrl, + .csi_cfg = gmin_csi_cfg, + .get_vcm_ctrl = gmin_get_vcm_ctrl, +}; + +struct camera_sensor_platform_data *gmin_camera_platform_data( + struct v4l2_subdev *subdev, + enum atomisp_input_format csi_format, + enum atomisp_bayer_order csi_bayer) +{ + struct gmin_subdev *gs = find_gmin_subdev(subdev); + + gs->csi_fmt = csi_format; + gs->csi_bayer = csi_bayer; + + return &gmin_plat; +} +EXPORT_SYMBOL_GPL(gmin_camera_platform_data); + +int atomisp_gmin_register_vcm_control(struct camera_vcm_control *vcmCtrl) +{ + if (!vcmCtrl) + return -EINVAL; + + mutex_lock(&vcm_lock); + list_add_tail(&vcmCtrl->list, &vcm_devices); + mutex_unlock(&vcm_lock); + + return 0; +} +EXPORT_SYMBOL_GPL(atomisp_gmin_register_vcm_control); + +static int gmin_get_hardcoded_var(struct gmin_cfg_var *varlist, + const char *var8, char *out, size_t *out_len) +{ + struct gmin_cfg_var *gv; + + for (gv = varlist; gv->name; gv++) { + size_t vl; + + if (strcmp(var8, gv->name)) + continue; + + vl = strlen(gv->val); + if (vl > *out_len - 1) + return -ENOSPC; + + strcpy(out, gv->val); + *out_len = vl; + return 0; + } + + return -EINVAL; +} + +/* Retrieves a device-specific configuration variable. The dev + * argument should be a device with an ACPI companion, as all + * configuration is based on firmware ID. + */ +static int gmin_get_config_var(struct device *dev, const char *var, + char *out, size_t *out_len) +{ + char var8[CFG_VAR_NAME_MAX]; + efi_char16_t var16[CFG_VAR_NAME_MAX]; + struct efivar_entry *ev; + const struct dmi_system_id *id; + int i, ret; + + if (dev && ACPI_COMPANION(dev)) + dev = &ACPI_COMPANION(dev)->dev; + + if (dev) + ret = snprintf(var8, sizeof(var8), "%s_%s", dev_name(dev), var); + else + ret = snprintf(var8, sizeof(var8), "gmin_%s", var); + + if (ret < 0 || ret >= sizeof(var8) - 1) + return -EINVAL; + + /* First check a hard-coded list of board-specific variables. + * Some device firmwares lack the ability to set EFI variables at + * runtime. + */ + id = dmi_first_match(gmin_vars); + if (id) + return gmin_get_hardcoded_var(id->driver_data, var8, out, out_len); + + /* Our variable names are ASCII by construction, but EFI names + * are wide chars. Convert and zero-pad. + */ + memset(var16, 0, sizeof(var16)); + for (i = 0; i < sizeof(var8) && var8[i]; i++) + var16[i] = var8[i]; + + /* Not sure this API usage is kosher; efivar_entry_get()'s + * implementation simply uses VariableName and VendorGuid from + * the struct and ignores the rest, but it seems like there + * ought to be an "official" efivar_entry registered + * somewhere? + */ + ev = kzalloc(sizeof(*ev), GFP_KERNEL); + if (!ev) + return -ENOMEM; + memcpy(&ev->var.VariableName, var16, sizeof(var16)); + ev->var.VendorGuid = GMIN_CFG_VAR_EFI_GUID; + ev->var.DataSize = *out_len; + + ret = efivar_entry_get(ev, &ev->var.Attributes, + &ev->var.DataSize, ev->var.Data); + if (ret == 0) { + memcpy(out, ev->var.Data, ev->var.DataSize); + *out_len = ev->var.DataSize; + } else if (dev) { + dev_warn(dev, "Failed to find gmin variable %s\n", var8); + } + + kfree(ev); + + return ret; +} + +int gmin_get_var_int(struct device *dev, const char *var, int def) +{ + char val[CFG_VAR_NAME_MAX]; + size_t len = sizeof(val); + long result; + int ret; + + ret = gmin_get_config_var(dev, var, val, &len); + if (!ret) { + val[len] = 0; + ret = kstrtol(val, 0, &result); + } + + return ret ? def : result; +} +EXPORT_SYMBOL_GPL(gmin_get_var_int); + +int camera_sensor_csi(struct v4l2_subdev *sd, u32 port, + u32 lanes, u32 format, u32 bayer_order, int flag) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct camera_mipi_info *csi = NULL; + + if (flag) { + csi = kzalloc(sizeof(*csi), GFP_KERNEL); + if (!csi) + return -ENOMEM; + csi->port = port; + csi->num_lanes = lanes; + csi->input_format = format; + csi->raw_bayer_order = bayer_order; + v4l2_set_subdev_hostdata(sd, (void *)csi); + csi->metadata_format = ATOMISP_INPUT_FORMAT_EMBEDDED; + csi->metadata_effective_width = NULL; + dev_info(&client->dev, + "camera pdata: port: %d lanes: %d order: %8.8x\n", + port, lanes, bayer_order); + } else { + csi = v4l2_get_subdev_hostdata(sd); + kfree(csi); + } + + return 0; +} +EXPORT_SYMBOL_GPL(camera_sensor_csi); + +/* PCI quirk: The BYT ISP advertises PCI runtime PM but it doesn't + * work. Disable so the kernel framework doesn't hang the device + * trying. The driver itself does direct calls to the PUNIT to manage + * ISP power. + */ +static void isp_pm_cap_fixup(struct pci_dev *dev) +{ + dev_info(&dev->dev, "Disabling PCI power management on camera ISP\n"); + dev->pm_cap = 0; +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0f38, isp_pm_cap_fixup); -- GitLab From 99da46648a3000fd246b8a81f4b754495358dbe9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 11:26:17 +0200 Subject: [PATCH 379/503] MAINTAINERS: adjust atomisp maintainership From now on, I'll be maintaining the atomisp driver, and Sakari will be reviewing it. Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index e24af3b1a3374..552e82f9adc0c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15950,8 +15950,8 @@ S: Supported F: Documentation/process/stable-kernel-rules.rst STAGING - ATOMISP DRIVER -M: Alan Cox -M: Sakari Ailus +M: Mauro Carvalho Chehab +R: Sakari Ailus L: linux-media@vger.kernel.org S: Maintained F: drivers/staging/media/atomisp/ -- GitLab From 60e5c189453f8dde622cf2b8f6da5a4bb7bad6ce Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 12:43:55 +0200 Subject: [PATCH 380/503] media: atomisp: fix usage of access_ok() kAPI This macro had its first parameter lost. Remove it. While on it, fix the alignments where this macro is used. Fixes: 96d4f267e40f ("Remove 'type' argument from access_ok() function") Signed-off-by: Mauro Carvalho Chehab --- .../pci/atomisp2/atomisp_compat_ioctl32.c | 558 ++++++++---------- 1 file changed, 255 insertions(+), 303 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c index b86ab107a9e5f..4032331807a77 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c @@ -29,10 +29,10 @@ static int get_atomisp_histogram32(struct atomisp_histogram *kp, { compat_uptr_t tmp; - if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_histogram32)) || - get_user(kp->num_elements, &up->num_elements) || - get_user(tmp, &up->data)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_histogram32)) || + get_user(kp->num_elements, &up->num_elements) || + get_user(tmp, &up->data)) + return -EFAULT; kp->data = compat_ptr(tmp); return 0; @@ -43,10 +43,10 @@ static int put_atomisp_histogram32(struct atomisp_histogram *kp, { compat_uptr_t tmp = (compat_uptr_t)((uintptr_t)kp->data); - if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_histogram32)) || - put_user(kp->num_elements, &up->num_elements) || - put_user(tmp, &up->data)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_histogram32)) || + put_user(kp->num_elements, &up->num_elements) || + put_user(tmp, &up->data)) + return -EFAULT; return 0; } @@ -72,11 +72,11 @@ static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp, { compat_uptr_t tmp; - if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_framebuffer32)) || - get_user(tmp, &up->base) || - get_user(kp->capability, &up->capability) || - get_user(kp->flags, &up->flags)) - return -EFAULT; + if (!access_ok(up, sizeof(struct v4l2_framebuffer32)) || + get_user(tmp, &up->base) || + get_user(kp->capability, &up->capability) || + get_user(kp->flags, &up->flags)) + return -EFAULT; kp->base = (void __force *)compat_ptr(tmp); get_v4l2_pix_format((struct v4l2_pix_format *)&kp->fmt, &up->fmt); @@ -95,27 +95,18 @@ static int get_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, compat_uptr_t ver_prod_even_real; compat_uptr_t ver_prod_even_imag; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_dis_statistics32)) || - copy_from_user(kp, up, sizeof(struct atomisp_dvs_grid_info)) || - get_user(hor_prod_odd_real, - &up->dvs2_stat.hor_prod.odd_real) || - get_user(hor_prod_odd_imag, - &up->dvs2_stat.hor_prod.odd_imag) || - get_user(hor_prod_even_real, - &up->dvs2_stat.hor_prod.even_real) || - get_user(hor_prod_even_imag, - &up->dvs2_stat.hor_prod.even_imag) || - get_user(ver_prod_odd_real, - &up->dvs2_stat.ver_prod.odd_real) || - get_user(ver_prod_odd_imag, - &up->dvs2_stat.ver_prod.odd_imag) || - get_user(ver_prod_even_real, - &up->dvs2_stat.ver_prod.even_real) || - get_user(ver_prod_even_imag, - &up->dvs2_stat.ver_prod.even_imag) || - get_user(kp->exp_id, &up->exp_id)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_dis_statistics32)) || + copy_from_user(kp, up, sizeof(struct atomisp_dvs_grid_info)) || + get_user(hor_prod_odd_real, &up->dvs2_stat.hor_prod.odd_real) || + get_user(hor_prod_odd_imag, &up->dvs2_stat.hor_prod.odd_imag) || + get_user(hor_prod_even_real, &up->dvs2_stat.hor_prod.even_real) || + get_user(hor_prod_even_imag, &up->dvs2_stat.hor_prod.even_imag) || + get_user(ver_prod_odd_real, &up->dvs2_stat.ver_prod.odd_real) || + get_user(ver_prod_odd_imag, &up->dvs2_stat.ver_prod.odd_imag) || + get_user(ver_prod_even_real, up->dvs2_stat.ver_prod.even_real) || + get_user(ver_prod_even_imag, &up->dvs2_stat.ver_prod.even_imag) || + get_user(kp->exp_id, &up->exp_id)) + return -EFAULT; kp->dvs2_stat.hor_prod.odd_real = compat_ptr(hor_prod_odd_real); kp->dvs2_stat.hor_prod.odd_imag = compat_ptr(hor_prod_odd_imag); @@ -148,27 +139,18 @@ static int put_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, compat_uptr_t ver_prod_even_imag = (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_imag); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_dis_statistics32)) || - copy_to_user(up, kp, sizeof(struct atomisp_dvs_grid_info)) || - put_user(hor_prod_odd_real, - &up->dvs2_stat.hor_prod.odd_real) || - put_user(hor_prod_odd_imag, - &up->dvs2_stat.hor_prod.odd_imag) || - put_user(hor_prod_even_real, - &up->dvs2_stat.hor_prod.even_real) || - put_user(hor_prod_even_imag, - &up->dvs2_stat.hor_prod.even_imag) || - put_user(ver_prod_odd_real, - &up->dvs2_stat.ver_prod.odd_real) || - put_user(ver_prod_odd_imag, - &up->dvs2_stat.ver_prod.odd_imag) || - put_user(ver_prod_even_real, - &up->dvs2_stat.ver_prod.even_real) || - put_user(ver_prod_even_imag, - &up->dvs2_stat.ver_prod.even_imag) || - put_user(kp->exp_id, &up->exp_id)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_dis_statistics32)) || + copy_to_user(up, kp, sizeof(struct atomisp_dvs_grid_info)) || + put_user(hor_prod_odd_real, &up->dvs2_stat.hor_prod.odd_real) || + put_user(hor_prod_odd_imag, &up->dvs2_stat.hor_prod.odd_imag) || + put_user(hor_prod_even_real, &up->dvs2_stat.hor_prod.even_real) || + put_user(hor_prod_even_imag, &up->dvs2_stat.hor_prod.even_imag) || + put_user(ver_prod_odd_real, &up->dvs2_stat.ver_prod.odd_real) || + put_user(ver_prod_odd_imag, &up->dvs2_stat.ver_prod.odd_imag) || + put_user(ver_prod_even_real, &up->dvs2_stat.ver_prod.even_real) || + put_user(ver_prod_even_imag, &up->dvs2_stat.ver_prod.even_imag) || + put_user(kp->exp_id, &up->exp_id)) + return -EFAULT; return 0; } @@ -185,18 +167,17 @@ static int get_atomisp_dis_coefficients32(struct atomisp_dis_coefficients *kp, compat_uptr_t ver_coefs_even_real; compat_uptr_t ver_coefs_even_imag; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_dis_coefficients32)) || - copy_from_user(kp, up, sizeof(struct atomisp_dvs_grid_info)) || - get_user(hor_coefs_odd_real, &up->hor_coefs.odd_real) || - get_user(hor_coefs_odd_imag, &up->hor_coefs.odd_imag) || - get_user(hor_coefs_even_real, &up->hor_coefs.even_real) || - get_user(hor_coefs_even_imag, &up->hor_coefs.even_imag) || - get_user(ver_coefs_odd_real, &up->ver_coefs.odd_real) || - get_user(ver_coefs_odd_imag, &up->ver_coefs.odd_imag) || - get_user(ver_coefs_even_real, &up->ver_coefs.even_real) || - get_user(ver_coefs_even_imag, &up->ver_coefs.even_imag)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_dis_coefficients32)) || + copy_from_user(kp, up, sizeof(struct atomisp_dvs_grid_info)) || + get_user(hor_coefs_odd_real, &up->hor_coefs.odd_real) || + get_user(hor_coefs_odd_imag, &up->hor_coefs.odd_imag) || + get_user(hor_coefs_even_real, &up->hor_coefs.even_real) || + get_user(hor_coefs_even_imag, &up->hor_coefs.even_imag) || + get_user(ver_coefs_odd_real, &up->ver_coefs.odd_real) || + get_user(ver_coefs_odd_imag, &up->ver_coefs.odd_imag) || + get_user(ver_coefs_even_real, &up->ver_coefs.even_real) || + get_user(ver_coefs_even_imag, &up->ver_coefs.even_imag)) + return -EFAULT; kp->hor_coefs.odd_real = compat_ptr(hor_coefs_odd_real); kp->hor_coefs.odd_imag = compat_ptr(hor_coefs_odd_imag); @@ -216,18 +197,17 @@ static int get_atomisp_dvs_6axis_config32(struct atomisp_dvs_6axis_config *kp, compat_uptr_t xcoords_uv; compat_uptr_t ycoords_uv; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_dvs_6axis_config32)) || - get_user(kp->exp_id, &up->exp_id) || - get_user(kp->width_y, &up->width_y) || - get_user(kp->height_y, &up->height_y) || - get_user(kp->width_uv, &up->width_uv) || - get_user(kp->height_uv, &up->height_uv) || - get_user(xcoords_y, &up->xcoords_y) || - get_user(ycoords_y, &up->ycoords_y) || - get_user(xcoords_uv, &up->xcoords_uv) || - get_user(ycoords_uv, &up->ycoords_uv)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_dvs_6axis_config32)) || + get_user(kp->exp_id, &up->exp_id) || + get_user(kp->width_y, &up->width_y) || + get_user(kp->height_y, &up->height_y) || + get_user(kp->width_uv, &up->width_uv) || + get_user(kp->height_uv, &up->height_uv) || + get_user(xcoords_y, &up->xcoords_y) || + get_user(ycoords_y, &up->ycoords_y) || + get_user(xcoords_uv, &up->xcoords_uv) || + get_user(ycoords_uv, &up->ycoords_uv)) + return -EFAULT; kp->xcoords_y = (void __force *)compat_ptr(xcoords_y); kp->ycoords_y = (void __force *)compat_ptr(ycoords_y); @@ -242,14 +222,13 @@ static int get_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, compat_uptr_t data; compat_uptr_t rgby_data; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_3a_statistics32)) || - copy_from_user(kp, up, sizeof(struct atomisp_grid_info)) || - get_user(rgby_data, &up->rgby_data) || - get_user(data, &up->data) || - get_user(kp->exp_id, &up->exp_id) || - get_user(kp->isp_config_id, &up->isp_config_id)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_3a_statistics32)) || + copy_from_user(kp, up, sizeof(struct atomisp_grid_info)) || + get_user(rgby_data, &up->rgby_data) || + get_user(data, &up->data) || + get_user(kp->exp_id, &up->exp_id) || + get_user(kp->isp_config_id, &up->isp_config_id)) + return -EFAULT; kp->data = compat_ptr(data); kp->rgby_data = compat_ptr(rgby_data); @@ -263,14 +242,13 @@ static int put_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); compat_uptr_t rgby_data = (compat_uptr_t)((uintptr_t)kp->rgby_data); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_3a_statistics32)) || - copy_to_user(up, kp, sizeof(struct atomisp_grid_info)) || - put_user(rgby_data, &up->rgby_data) || - put_user(data, &up->data) || - put_user(kp->exp_id, &up->exp_id) || - put_user(kp->isp_config_id, &up->isp_config_id)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_3a_statistics32)) || + copy_to_user(up, kp, sizeof(struct atomisp_grid_info)) || + put_user(rgby_data, &up->rgby_data) || + put_user(data, &up->data) || + put_user(kp->exp_id, &up->exp_id) || + put_user(kp->isp_config_id, &up->isp_config_id)) + return -EFAULT; return 0; } @@ -282,15 +260,14 @@ static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp, compat_uptr_t data; compat_uptr_t effective_width; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_metadata32)) || - get_user(data, &up->data) || - get_user(kp->width, &up->width) || - get_user(kp->height, &up->height) || - get_user(kp->stride, &up->stride) || - get_user(kp->exp_id, &up->exp_id) || - get_user(effective_width, &up->effective_width)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_metadata32)) || + get_user(data, &up->data) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height) || + get_user(kp->stride, &up->stride) || + get_user(kp->exp_id, &up->exp_id) || + get_user(effective_width, &up->effective_width)) + return -EFAULT; kp->data = compat_ptr(data); kp->effective_width = (void __force *)compat_ptr(effective_width); @@ -304,15 +281,14 @@ static int put_atomisp_metadata_stat32(struct atomisp_metadata *kp, compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); compat_uptr_t effective_width = (compat_uptr_t)((uintptr_t)kp->effective_width); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_metadata32)) || - put_user(data, &up->data) || - put_user(kp->width, &up->width) || - put_user(kp->height, &up->height) || - put_user(kp->stride, &up->stride) || - put_user(kp->exp_id, &up->exp_id) || - put_user(effective_width, &up->effective_width)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_metadata32)) || + put_user(data, &up->data) || + put_user(kp->width, &up->width) || + put_user(kp->height, &up->height) || + put_user(kp->stride, &up->stride) || + put_user(kp->exp_id, &up->exp_id) || + put_user(effective_width, &up->effective_width)) + return -EFAULT; return 0; } @@ -324,16 +300,15 @@ static int put_atomisp_metadata_by_type_stat32( compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); compat_uptr_t effective_width = (compat_uptr_t)((uintptr_t)kp->effective_width); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_metadata_with_type32)) || - put_user(data, &up->data) || - put_user(kp->width, &up->width) || - put_user(kp->height, &up->height) || - put_user(kp->stride, &up->stride) || - put_user(kp->exp_id, &up->exp_id) || - put_user(effective_width, &up->effective_width) || - put_user(kp->type, &up->type)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_metadata_with_type32)) || + put_user(data, &up->data) || + put_user(kp->width, &up->width) || + put_user(kp->height, &up->height) || + put_user(kp->stride, &up->stride) || + put_user(kp->exp_id, &up->exp_id) || + put_user(effective_width, &up->effective_width) || + put_user(kp->type, &up->type)) + return -EFAULT; return 0; } @@ -345,16 +320,15 @@ static int get_atomisp_metadata_by_type_stat32( compat_uptr_t data; compat_uptr_t effective_width; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_metadata_with_type32)) || - get_user(data, &up->data) || - get_user(kp->width, &up->width) || - get_user(kp->height, &up->height) || - get_user(kp->stride, &up->stride) || - get_user(kp->exp_id, &up->exp_id) || - get_user(effective_width, &up->effective_width) || - get_user(kp->type, &up->type)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_metadata_with_type32)) || + get_user(data, &up->data) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height) || + get_user(kp->stride, &up->stride) || + get_user(kp->exp_id, &up->exp_id) || + get_user(effective_width, &up->effective_width) || + get_user(kp->type, &up->type)) + return -EFAULT; kp->data = compat_ptr(data); kp->effective_width = (void __force *)compat_ptr(effective_width); @@ -366,12 +340,11 @@ static int get_atomisp_morph_table32(struct atomisp_morph_table *kp, { unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_morph_table32)) || - get_user(kp->enabled, &up->enabled) || - get_user(kp->width, &up->width) || - get_user(kp->height, &up->height)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_morph_table32)) || + get_user(kp->enabled, &up->enabled) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height)) + return -EFAULT; while (n-- > 0) { uintptr_t *coord_kp = (uintptr_t *)&kp->coordinates_x[n]; @@ -391,12 +364,11 @@ static int put_atomisp_morph_table32(struct atomisp_morph_table *kp, { unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES; - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_morph_table32)) || - put_user(kp->enabled, &up->enabled) || - put_user(kp->width, &up->width) || - put_user(kp->height, &up->height)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_morph_table32)) || + put_user(kp->enabled, &up->enabled) || + put_user(kp->width, &up->width) || + put_user(kp->height, &up->height)) + return -EFAULT; while (n-- > 0) { uintptr_t *coord_kp = (uintptr_t *)&kp->coordinates_x[n]; @@ -415,24 +387,20 @@ static int get_atomisp_overlay32(struct atomisp_overlay *kp, struct atomisp_overlay32 __user *up) { compat_uptr_t frame; - if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_overlay32)) || - get_user(frame, &up->frame) || - get_user(kp->bg_y, &up->bg_y) || - get_user(kp->bg_u, &up->bg_u) || - get_user(kp->bg_v, &up->bg_v) || - get_user(kp->blend_input_perc_y, &up->blend_input_perc_y) || - get_user(kp->blend_input_perc_u, &up->blend_input_perc_u) || - get_user(kp->blend_input_perc_v, &up->blend_input_perc_v) || - get_user(kp->blend_overlay_perc_y, - &up->blend_overlay_perc_y) || - get_user(kp->blend_overlay_perc_u, - &up->blend_overlay_perc_u) || - get_user(kp->blend_overlay_perc_v, - &up->blend_overlay_perc_v) || - get_user(kp->blend_overlay_perc_u, - &up->blend_overlay_perc_u) || - get_user(kp->overlay_start_x, &up->overlay_start_y)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_overlay32)) || + get_user(frame, &up->frame) || + get_user(kp->bg_y, &up->bg_y) || + get_user(kp->bg_u, &up->bg_u) || + get_user(kp->bg_v, &up->bg_v) || + get_user(kp->blend_input_perc_y, &up->blend_input_perc_y) || + get_user(kp->blend_input_perc_u, &up->blend_input_perc_u) || + get_user(kp->blend_input_perc_v, &up->blend_input_perc_v) || + get_user(kp->blend_overlay_perc_y, &up->blend_overlay_perc_y) || + get_user(kp->blend_overlay_perc_u, &up->blend_overlay_perc_u) || + get_user(kp->blend_overlay_perc_v, &up->blend_overlay_perc_v) || + get_user(kp->blend_overlay_perc_u, &up->blend_overlay_perc_u) || + get_user(kp->overlay_start_x, &up->overlay_start_y)) + return -EFAULT; kp->frame = (void __force *)compat_ptr(frame); return 0; @@ -443,24 +411,20 @@ static int put_atomisp_overlay32(struct atomisp_overlay *kp, { compat_uptr_t frame = (compat_uptr_t)((uintptr_t)kp->frame); - if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_overlay32)) || - put_user(frame, &up->frame) || - put_user(kp->bg_y, &up->bg_y) || - put_user(kp->bg_u, &up->bg_u) || - put_user(kp->bg_v, &up->bg_v) || - put_user(kp->blend_input_perc_y, &up->blend_input_perc_y) || - put_user(kp->blend_input_perc_u, &up->blend_input_perc_u) || - put_user(kp->blend_input_perc_v, &up->blend_input_perc_v) || - put_user(kp->blend_overlay_perc_y, - &up->blend_overlay_perc_y) || - put_user(kp->blend_overlay_perc_u, - &up->blend_overlay_perc_u) || - put_user(kp->blend_overlay_perc_v, - &up->blend_overlay_perc_v) || - put_user(kp->blend_overlay_perc_u, - &up->blend_overlay_perc_u) || - put_user(kp->overlay_start_x, &up->overlay_start_y)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_overlay32)) || + put_user(frame, &up->frame) || + put_user(kp->bg_y, &up->bg_y) || + put_user(kp->bg_u, &up->bg_u) || + put_user(kp->bg_v, &up->bg_v) || + put_user(kp->blend_input_perc_y, &up->blend_input_perc_y) || + put_user(kp->blend_input_perc_u, &up->blend_input_perc_u) || + put_user(kp->blend_input_perc_v, &up->blend_input_perc_v) || + put_user(kp->blend_overlay_perc_y, &up->blend_overlay_perc_y) || + put_user(kp->blend_overlay_perc_u, &up->blend_overlay_perc_u) || + put_user(kp->blend_overlay_perc_v, &up->blend_overlay_perc_v) || + put_user(kp->blend_overlay_perc_u, &up->blend_overlay_perc_u) || + put_user(kp->overlay_start_x, &up->overlay_start_y)) + return -EFAULT; return 0; } @@ -471,12 +435,11 @@ static int get_atomisp_calibration_group32( { compat_uptr_t calb_grp_values; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_calibration_group32)) || - get_user(kp->size, &up->size) || - get_user(kp->type, &up->type) || - get_user(calb_grp_values, &up->calb_grp_values)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_calibration_group32)) || + get_user(kp->size, &up->size) || + get_user(kp->type, &up->type) || + get_user(calb_grp_values, &up->calb_grp_values)) + return -EFAULT; kp->calb_grp_values = (void __force *)compat_ptr(calb_grp_values); return 0; @@ -489,12 +452,11 @@ static int put_atomisp_calibration_group32( compat_uptr_t calb_grp_values = (compat_uptr_t)((uintptr_t)kp->calb_grp_values); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_calibration_group32)) || - put_user(kp->size, &up->size) || - put_user(kp->type, &up->type) || - put_user(calb_grp_values, &up->calb_grp_values)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_calibration_group32)) || + put_user(kp->size, &up->size) || + put_user(kp->type, &up->type) || + put_user(calb_grp_values, &up->calb_grp_values)) + return -EFAULT; return 0; } @@ -504,12 +466,11 @@ static int get_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, { compat_uptr_t data; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_acc_fw_load32)) || - get_user(kp->size, &up->size) || - get_user(kp->fw_handle, &up->fw_handle) || - get_user(data, &up->data)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_fw_load32)) || + get_user(kp->size, &up->size) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(data, &up->data)) + return -EFAULT; kp->data = compat_ptr(data); return 0; @@ -520,12 +481,11 @@ static int put_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_acc_fw_load32)) || - put_user(kp->size, &up->size) || - put_user(kp->fw_handle, &up->fw_handle) || - put_user(data, &up->data)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_fw_load32)) || + put_user(kp->size, &up->size) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(data, &up->data)) + return -EFAULT; return 0; } @@ -535,12 +495,12 @@ static int get_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, { compat_uptr_t value; - if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_acc_fw_arg32)) || - get_user(kp->fw_handle, &up->fw_handle) || - get_user(kp->index, &up->index) || - get_user(value, &up->value) || - get_user(kp->size, &up->size)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_fw_arg32)) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(kp->index, &up->index) || + get_user(value, &up->value) || + get_user(kp->size, &up->size)) + return -EFAULT; kp->value = compat_ptr(value); return 0; @@ -551,12 +511,12 @@ static int put_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, { compat_uptr_t value = (compat_uptr_t)((uintptr_t)kp->value); - if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_acc_fw_arg32)) || - put_user(kp->fw_handle, &up->fw_handle) || - put_user(kp->index, &up->index) || - put_user(value, &up->value) || - put_user(kp->size, &up->size)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_fw_arg32)) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(kp->index, &up->index) || + put_user(value, &up->value) || + put_user(kp->size, &up->size)) + return -EFAULT; return 0; } @@ -566,13 +526,12 @@ static int get_v4l2_private_int_data32(struct v4l2_private_int_data *kp, { compat_uptr_t data; - if (!access_ok(VERIFY_READ, up, - sizeof(struct v4l2_private_int_data32)) || - get_user(kp->size, &up->size) || - get_user(data, &up->data) || - get_user(kp->reserved[0], &up->reserved[0]) || - get_user(kp->reserved[1], &up->reserved[1])) - return -EFAULT; + if (!access_ok(up, sizeof(struct v4l2_private_int_data32)) || + get_user(kp->size, &up->size) || + get_user(data, &up->data) || + get_user(kp->reserved[0], &up->reserved[0]) || + get_user(kp->reserved[1], &up->reserved[1])) + return -EFAULT; kp->data = compat_ptr(data); return 0; @@ -583,13 +542,12 @@ static int put_v4l2_private_int_data32(struct v4l2_private_int_data *kp, { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct v4l2_private_int_data32)) || - put_user(kp->size, &up->size) || - put_user(data, &up->data) || - put_user(kp->reserved[0], &up->reserved[0]) || - put_user(kp->reserved[1], &up->reserved[1])) - return -EFAULT; + if (!access_ok(up, sizeof(struct v4l2_private_int_data32)) || + put_user(kp->size, &up->size) || + put_user(data, &up->data) || + put_user(kp->reserved[0], &up->reserved[0]) || + put_user(kp->reserved[1], &up->reserved[1])) + return -EFAULT; return 0; } @@ -599,15 +557,14 @@ static int get_atomisp_shading_table32(struct atomisp_shading_table *kp, { unsigned int n = ATOMISP_NUM_SC_COLORS; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_shading_table32)) || - get_user(kp->enable, &up->enable) || - get_user(kp->sensor_width, &up->sensor_width) || - get_user(kp->sensor_height, &up->sensor_height) || - get_user(kp->width, &up->width) || - get_user(kp->height, &up->height) || - get_user(kp->fraction_bits, &up->fraction_bits)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_shading_table32)) || + get_user(kp->enable, &up->enable) || + get_user(kp->sensor_width, &up->sensor_width) || + get_user(kp->sensor_height, &up->sensor_height) || + get_user(kp->width, &up->width) || + get_user(kp->height, &up->height) || + get_user(kp->fraction_bits, &up->fraction_bits)) + return -EFAULT; while (n-- > 0) { uintptr_t *data_p = (uintptr_t *)&kp->data[n]; @@ -623,16 +580,16 @@ static int get_atomisp_acc_map32(struct atomisp_acc_map *kp, { compat_uptr_t user_ptr; - if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_acc_map32)) || - get_user(kp->flags, &up->flags) || - get_user(kp->length, &up->length) || - get_user(user_ptr, &up->user_ptr) || - get_user(kp->css_ptr, &up->css_ptr) || - get_user(kp->reserved[0], &up->reserved[0]) || - get_user(kp->reserved[1], &up->reserved[1]) || - get_user(kp->reserved[2], &up->reserved[2]) || - get_user(kp->reserved[3], &up->reserved[3])) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_map32)) || + get_user(kp->flags, &up->flags) || + get_user(kp->length, &up->length) || + get_user(user_ptr, &up->user_ptr) || + get_user(kp->css_ptr, &up->css_ptr) || + get_user(kp->reserved[0], &up->reserved[0]) || + get_user(kp->reserved[1], &up->reserved[1]) || + get_user(kp->reserved[2], &up->reserved[2]) || + get_user(kp->reserved[3], &up->reserved[3])) + return -EFAULT; kp->user_ptr = compat_ptr(user_ptr); return 0; @@ -643,16 +600,16 @@ static int put_atomisp_acc_map32(struct atomisp_acc_map *kp, { compat_uptr_t user_ptr = (compat_uptr_t)((uintptr_t)kp->user_ptr); - if (!access_ok(VERIFY_WRITE, up, sizeof(struct atomisp_acc_map32)) || - put_user(kp->flags, &up->flags) || - put_user(kp->length, &up->length) || - put_user(user_ptr, &up->user_ptr) || - put_user(kp->css_ptr, &up->css_ptr) || - put_user(kp->reserved[0], &up->reserved[0]) || - put_user(kp->reserved[1], &up->reserved[1]) || - put_user(kp->reserved[2], &up->reserved[2]) || - put_user(kp->reserved[3], &up->reserved[3])) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_map32)) || + put_user(kp->flags, &up->flags) || + put_user(kp->length, &up->length) || + put_user(user_ptr, &up->user_ptr) || + put_user(kp->css_ptr, &up->css_ptr) || + put_user(kp->reserved[0], &up->reserved[0]) || + put_user(kp->reserved[1], &up->reserved[1]) || + put_user(kp->reserved[2], &up->reserved[2]) || + put_user(kp->reserved[3], &up->reserved[3])) + return -EFAULT; return 0; } @@ -660,13 +617,12 @@ static int put_atomisp_acc_map32(struct atomisp_acc_map *kp, static int get_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, struct atomisp_acc_s_mapped_arg32 __user *up) { - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_acc_s_mapped_arg32)) || - get_user(kp->fw_handle, &up->fw_handle) || - get_user(kp->memory, &up->memory) || - get_user(kp->length, &up->length) || - get_user(kp->css_ptr, &up->css_ptr)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_s_mapped_arg32)) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(kp->memory, &up->memory) || + get_user(kp->length, &up->length) || + get_user(kp->css_ptr, &up->css_ptr)) + return -EFAULT; return 0; } @@ -674,13 +630,12 @@ static int get_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, static int put_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, struct atomisp_acc_s_mapped_arg32 __user *up) { - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_acc_s_mapped_arg32)) || - put_user(kp->fw_handle, &up->fw_handle) || - put_user(kp->memory, &up->memory) || - put_user(kp->length, &up->length) || - put_user(kp->css_ptr, &up->css_ptr)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_s_mapped_arg32)) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(kp->memory, &up->memory) || + put_user(kp->length, &up->length) || + put_user(kp->css_ptr, &up->css_ptr)) + return -EFAULT; return 0; } @@ -694,8 +649,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp, void __user *user_ptr; unsigned int stp, mtp, dcp, dscp = 0; - if (!access_ok(VERIFY_READ, up, sizeof(struct atomisp_parameters32))) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_parameters32))) + return -EFAULT; while (n >= 0) { compat_uptr_t __user *src = ((compat_uptr_t __user *)up) + n; @@ -806,17 +761,16 @@ static int get_atomisp_acc_fw_load_to_pipe32( struct atomisp_acc_fw_load_to_pipe32 __user *up) { compat_uptr_t data; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_acc_fw_load_to_pipe32)) || - get_user(kp->flags, &up->flags) || - get_user(kp->fw_handle, &up->fw_handle) || - get_user(kp->size, &up->size) || - get_user(kp->type, &up->type) || - get_user(kp->reserved[0], &up->reserved[0]) || - get_user(kp->reserved[1], &up->reserved[1]) || - get_user(kp->reserved[2], &up->reserved[2]) || - get_user(data, &up->data)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_fw_load_to_pipe32)) || + get_user(kp->flags, &up->flags) || + get_user(kp->fw_handle, &up->fw_handle) || + get_user(kp->size, &up->size) || + get_user(kp->type, &up->type) || + get_user(kp->reserved[0], &up->reserved[0]) || + get_user(kp->reserved[1], &up->reserved[1]) || + get_user(kp->reserved[2], &up->reserved[2]) || + get_user(data, &up->data)) + return -EFAULT; kp->data = compat_ptr(data); return 0; @@ -827,17 +781,16 @@ static int put_atomisp_acc_fw_load_to_pipe32( struct atomisp_acc_fw_load_to_pipe32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); - if (!access_ok(VERIFY_WRITE, up, - sizeof(struct atomisp_acc_fw_load_to_pipe32)) || - put_user(kp->flags, &up->flags) || - put_user(kp->fw_handle, &up->fw_handle) || - put_user(kp->size, &up->size) || - put_user(kp->type, &up->type) || - put_user(kp->reserved[0], &up->reserved[0]) || - put_user(kp->reserved[1], &up->reserved[1]) || - put_user(kp->reserved[2], &up->reserved[2]) || - put_user(data, &up->data)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_acc_fw_load_to_pipe32)) || + put_user(kp->flags, &up->flags) || + put_user(kp->fw_handle, &up->fw_handle) || + put_user(kp->size, &up->size) || + put_user(kp->type, &up->type) || + put_user(kp->reserved[0], &up->reserved[0]) || + put_user(kp->reserved[1], &up->reserved[1]) || + put_user(kp->reserved[2], &up->reserved[2]) || + put_user(data, &up->data)) + return -EFAULT; return 0; } @@ -847,11 +800,10 @@ static int get_atomisp_sensor_ae_bracketing_lut( struct atomisp_sensor_ae_bracketing_lut32 __user *up) { compat_uptr_t lut; - if (!access_ok(VERIFY_READ, up, - sizeof(struct atomisp_sensor_ae_bracketing_lut32)) || - get_user(kp->lut_size, &up->lut_size) || - get_user(lut, &up->lut)) - return -EFAULT; + if (!access_ok(up, sizeof(struct atomisp_sensor_ae_bracketing_lut32)) || + get_user(kp->lut_size, &up->lut_size) || + get_user(lut, &up->lut)) + return -EFAULT; kp->lut = (void __force *)compat_ptr(lut); return 0; -- GitLab From 1aeb9583d3babf59d3240e6182453bcd4c47f258 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 12:46:57 +0200 Subject: [PATCH 381/503] media: atomisp: totalram_pages is now a function Fix the usage of totalram_pages, as this is now a function. Fixes: ca79b0c211af ("mm: convert totalram_pages and totalhigh_pages variables to atomic") Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c index 198f29f4a3246..f4b975a18fa3a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c @@ -102,7 +102,7 @@ static phys_addr_t alloc_page_table(struct isp_mmu *mmu) * The slab allocator(kmem_cache and kmalloc family) doesn't handle * GFP_DMA32 flag, so we have to use buddy allocator. */ - if (totalram_pages > (unsigned long)NR_PAGES_2GB) + if (totalram_pages() > (unsigned long)NR_PAGES_2GB) virt = (void *)__get_free_page(GFP_KERNEL | GFP_DMA32); else virt = kmem_cache_zalloc(mmu->tbl_cache, GFP_KERNEL); -- GitLab From e58eeb5a7335218498218cde8e96bcf3b7ae4a4a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 12:49:32 +0200 Subject: [PATCH 382/503] media: atomisp: replace VFL_TYPE_GRABBER by VFL_TYPE_VIDEO This type was renamed in the past by a more meaningul name. Change it on atomisp too. Fixes: 238e4a5baa36 ("media: rename VFL_TYPE_GRABBER to _VIDEO") Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index aaae663cc218e..9e4f5cc153a24 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -163,7 +163,7 @@ int atomisp_video_register(struct atomisp_video_pipe *video, video->vdev.v4l2_dev = vdev; - ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1); + ret = video_register_device(&video->vdev, VFL_TYPE_VIDEO, -1); if (ret < 0) dev_err(vdev->dev, "%s: could not register video device (%d)\n", __func__, ret); @@ -178,7 +178,7 @@ int atomisp_acc_register(struct atomisp_acc_pipe *video, video->vdev.v4l2_dev = vdev; - ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1); + ret = video_register_device(&video->vdev, VFL_TYPE_VIDEO, -1); if (ret < 0) dev_err(vdev->dev, "%s: could not register video device (%d)\n", __func__, ret); -- GitLab From a9d7bbcc6bb8358a8e2e7f3e8db918baf221c2bf Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 13:05:47 +0200 Subject: [PATCH 383/503] media: atomisp: Fix support for time 64 API The time 64 API patchset changed the ts stamp to u64. Update this driver accordingly. Fixes: 15a40b27beb0 ("media: videobuf: use u64 for the timestamp internally") Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp2/atomisp_cmd.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index 8741656548506..8aa5a3019e451 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -686,14 +686,6 @@ static struct videobuf_buffer *atomisp_css_frame_to_vbuf( return NULL; } -static void get_buf_timestamp(struct timeval *tv) -{ - struct timespec ts; - ktime_get_ts(&ts); - tv->tv_sec = ts.tv_sec; - tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC; -} - static void atomisp_flush_video_pipe(struct atomisp_sub_device *asd, struct atomisp_video_pipe *pipe) { @@ -707,7 +699,7 @@ static void atomisp_flush_video_pipe(struct atomisp_sub_device *asd, spin_lock_irqsave(&pipe->irq_lock, irqflags); if (pipe->capq.bufs[i]->state == VIDEOBUF_ACTIVE || pipe->capq.bufs[i]->state == VIDEOBUF_QUEUED) { - get_buf_timestamp(&pipe->capq.bufs[i]->ts); + pipe->capq.bufs[i]->ts = ktime_get_ns(); pipe->capq.bufs[i]->field_count = atomic_read(&asd->sequence) << 1; dev_dbg(asd->isp->dev, "release buffers on device %s\n", @@ -1206,7 +1198,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, break; } if (vb) { - get_buf_timestamp(&vb->ts); + vb->ts = ktime_get_ns(); vb->field_count = atomic_read(&asd->sequence) << 1; /*mark videobuffer done for dequeue*/ spin_lock_irqsave(&pipe->irq_lock, irqflags); -- GitLab From 8d564cd28cfcbea636b44a96a1edfe0e3395ef60 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 13:17:14 +0200 Subject: [PATCH 384/503] media: atomisp: use cpu_latency_qos_*() instead of pm_qos_update*() Those functions got renamed. Update them on atomisp driver. Fixes: 67b06ba01857 ("PM: QoS: Drop PM_QOS_CPU_DMA_LATENCY and rename related functions") Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index 9e4f5cc153a24..9156e253d5bf2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -508,7 +508,7 @@ int atomisp_runtime_suspend(struct device *dev) ret = atomisp_ospm_dphy_down(isp); if (ret) return ret; - pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); + cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); return atomisp_mrfld_power_down(isp); } @@ -522,7 +522,7 @@ int atomisp_runtime_resume(struct device *dev) if (ret) return ret; - pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency); + cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency); if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) { /*Turn on ISP d-phy */ ret = atomisp_ospm_dphy_up(isp); @@ -574,7 +574,7 @@ static int __maybe_unused atomisp_suspend(struct device *dev) dev_err(isp->dev, "fail to power off ISP\n"); return ret; } - pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); + cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); return atomisp_mrfld_power_down(isp); } @@ -588,7 +588,7 @@ static int __maybe_unused atomisp_resume(struct device *dev) if (ret) return ret; - pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency); + cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency); /*Turn on ISP d-phy */ ret = atomisp_ospm_dphy_up(isp); @@ -1347,8 +1347,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, atomisp_msi_irq_init(isp, dev); - pm_qos_add_request(&isp->pm_qos, PM_QOS_CPU_DMA_LATENCY, - PM_QOS_DEFAULT_VALUE); + cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); /* * for MRFLD, Software/firmware needs to write a 1 to bit 0 of @@ -1460,7 +1459,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, register_entities_fail: atomisp_uninitialize_modules(isp); initialize_modules_fail: - pm_qos_remove_request(&isp->pm_qos); + cpu_latency_qos_remove_request(&isp->pm_qos); atomisp_msi_irq_uninit(isp, dev); enable_msi_fail: fw_validation_fail: @@ -1505,7 +1504,7 @@ static void atomisp_pci_remove(struct pci_dev *dev) pm_runtime_forbid(&dev->dev); pm_runtime_get_noresume(&dev->dev); - pm_qos_remove_request(&isp->pm_qos); + cpu_latency_qos_remove_request(&isp->pm_qos); atomisp_msi_irq_uninit(isp, dev); atomisp_unregister_entities(isp); -- GitLab From c1b70ae094d37e379e0c4e14db513e50a8e5bb6f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 14:28:10 +0200 Subject: [PATCH 385/503] media: atomisp: use new ida API The old ida API got replaced by a new one, with avoids locking issues. As the old API was removed, start using the new one, as defined by changeset b03f8e43c926 ("ida: Remove old API"). Fixes: b03f8e43c926 ("ida: Remove old API") Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c index 7ebcebd80b772..33187ea625bf7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c @@ -125,7 +125,7 @@ void atomisp_acc_release(struct atomisp_sub_device *asd) /* Unload all loaded acceleration binaries */ list_for_each_entry_safe(acc_fw, ta, &asd->acc.fw, list) { list_del(&acc_fw->list); - ida_remove(&asd->acc.ida, acc_fw->handle); + ida_free(&asd->acc.ida, acc_fw->handle); acc_free_fw(acc_fw); } @@ -175,8 +175,8 @@ int atomisp_acc_load_to_pipe(struct atomisp_sub_device *asd, return -EFAULT; } - if (!ida_pre_get(&asd->acc.ida, GFP_KERNEL) || - ida_get_new_above(&asd->acc.ida, 1, &handle)) { + handle = ida_alloc(&asd->acc.ida, GFP_KERNEL); + if (handle < 0) { acc_free_fw(acc_fw); return -ENOSPC; } @@ -234,7 +234,7 @@ int atomisp_acc_unload(struct atomisp_sub_device *asd, unsigned int *handle) return -EINVAL; list_del(&acc_fw->list); - ida_remove(&asd->acc.ida, acc_fw->handle); + ida_free(&asd->acc.ida, acc_fw->handle); acc_free_fw(acc_fw); return 0; -- GitLab From e7b955f8e0184c54aae27e91ce3c385ff95377b8 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 14:02:03 +0200 Subject: [PATCH 386/503] media: atomisp: fix a broken compat32 code There's a typo at the compat32 code, with forgot to get the pointer address, causing the driver to not build. Not sure why this didn't produce an error back when the driver got removed. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c index 4032331807a77..fd535502ddaed 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c @@ -103,7 +103,7 @@ static int get_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, get_user(hor_prod_even_imag, &up->dvs2_stat.hor_prod.even_imag) || get_user(ver_prod_odd_real, &up->dvs2_stat.ver_prod.odd_real) || get_user(ver_prod_odd_imag, &up->dvs2_stat.ver_prod.odd_imag) || - get_user(ver_prod_even_real, up->dvs2_stat.ver_prod.even_real) || + get_user(ver_prod_even_real, &up->dvs2_stat.ver_prod.even_real) || get_user(ver_prod_even_imag, &up->dvs2_stat.ver_prod.even_imag) || get_user(kp->exp_id, &up->exp_id)) return -EFAULT; -- GitLab From aa31f6514047da6460e3db8247c2cefe3e08f6d9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 14:33:52 +0200 Subject: [PATCH 387/503] media: atomisp: allow building the driver again The atomisp driver builds again. So, remove depends on BROKEN. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/media/atomisp/Kconfig b/drivers/staging/media/atomisp/Kconfig index fbaba41ba7db8..4c3a1ca5338e9 100644 --- a/drivers/staging/media/atomisp/Kconfig +++ b/drivers/staging/media/atomisp/Kconfig @@ -1,7 +1,6 @@ menuconfig INTEL_ATOMISP bool "Enable support to Intel MIPI camera drivers" depends on X86 && EFI && PCI && ACPI - depends on BROKEN select MEDIA_CONTROLLER select COMMON_CLK help -- GitLab From fd3218f513eba27ce68dc5e1198238dc0bb59cef Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 12:30:23 +0200 Subject: [PATCH 388/503] media: atomisp: select IOSF_MBI dependency This driver needs IOSF_MBI in order to talk with some PM registers. Select it at compile time. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/atomisp/Kconfig b/drivers/staging/media/atomisp/Kconfig index 4c3a1ca5338e9..397745ebcd568 100644 --- a/drivers/staging/media/atomisp/Kconfig +++ b/drivers/staging/media/atomisp/Kconfig @@ -1,6 +1,7 @@ menuconfig INTEL_ATOMISP bool "Enable support to Intel MIPI camera drivers" depends on X86 && EFI && PCI && ACPI + select IOSF_MBI select MEDIA_CONTROLLER select COMMON_CLK help -- GitLab From 4636a85cff86b2c014752c6b8fece018558b0d08 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 14:38:57 +0200 Subject: [PATCH 389/503] media: atomisp: fix several typos Running checkpatch.pl codespell logic found several typos at atomisp driver. Fix them using --fix-inline. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/i2c/atomisp-gc0310.c | 2 +- drivers/staging/media/atomisp/i2c/gc0310.h | 2 +- drivers/staging/media/atomisp/i2c/mt9m114.h | 4 ++-- .../media/atomisp/pci/atomisp2/atomisp_cmd.c | 2 +- .../atomisp/pci/atomisp2/atomisp_compat_css20.c | 2 +- .../media/atomisp/pci/atomisp2/atomisp_csi2.c | 2 +- .../media/atomisp/pci/atomisp2/atomisp_fops.c | 2 +- .../atomisp/pci/atomisp2/atomisp_internal.h | 2 +- .../media/atomisp/pci/atomisp2/atomisp_ioctl.c | 4 ++-- .../media/atomisp/pci/atomisp2/atomisp_subdev.c | 2 +- .../base/circbuf/interface/ia_css_circbuf.h | 2 +- .../hrt/css_receiver_2400_common_defs.h | 2 +- .../hrt/PixelGen_SysBlock_defs.h | 2 +- .../hrt/css_receiver_2400_common_defs.h | 2 +- .../hrt/mipi_backend_common_defs.h | 2 +- .../css_2401_csi2p_system/isys_dma_global.h | 8 ++++---- .../css_2401_csi2p_system/system_global.h | 2 +- .../hrt/css_receiver_2400_common_defs.h | 2 +- .../css2400/hive_isp_css_common/system_global.h | 2 +- .../hive_isp_css_include/assert_support.h | 2 +- .../hive_isp_css_include/host/csi_rx_public.h | 8 ++++---- .../hive_isp_css_include/host/ibuf_ctrl_public.h | 4 ++-- .../host/isys_stream2mmio_public.h | 4 ++-- .../hive_isp_css_include/host/pixelgen_public.h | 4 ++-- .../memory_access/memory_access.h | 2 +- .../atomisp/pci/atomisp2/css2400/ia_css_err.h | 4 ++-- .../pci/atomisp2/css2400/ia_css_pipe_public.h | 2 +- .../pci/atomisp2/css2400/ia_css_stream_public.h | 2 +- .../isp/kernels/ctc/ctc2/ia_css_ctc2.host.c | 6 +++--- .../css2400/isp/kernels/hdr/ia_css_hdr_types.h | 12 ++++++------ .../atomisp2/css2400/runtime/binary/src/binary.c | 2 +- .../css2400/runtime/bufq/interface/ia_css_bufq.h | 2 +- .../css2400/runtime/debug/src/ia_css_debug.c | 4 ++-- .../atomisp2/css2400/runtime/frame/src/frame.c | 2 +- .../runtime/pipeline/interface/ia_css_pipeline.h | 2 +- .../media/atomisp/pci/atomisp2/css2400/sh_css.c | 2 +- .../pci/atomisp2/css2400/sh_css_internal.h | 16 ++++++++-------- .../atomisp/pci/atomisp2/css2400/sh_css_params.c | 2 +- .../atomisp/pci/atomisp2/css2400/sh_css_sp.c | 4 ++-- .../media/atomisp/pci/atomisp2/hmm/hmm_bo.c | 2 +- .../atomisp/pci/atomisp2/include/mmu/isp_mmu.h | 2 +- .../media/atomisp/pci/atomisp2/mmu/isp_mmu.c | 6 +++--- 42 files changed, 72 insertions(+), 72 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c index 3b38cbccf294a..f2991fbcb1d60 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -717,7 +717,7 @@ static int gc0310_init(struct v4l2_subdev *sd) pr_info("%s S\n", __func__); mutex_lock(&dev->input_lock); - /* set inital registers */ + /* set initial registers */ ret = gc0310_write_reg_array(client, gc0310_reset_register); /* restore settings */ diff --git a/drivers/staging/media/atomisp/i2c/gc0310.h b/drivers/staging/media/atomisp/i2c/gc0310.h index 70c252c5163c6..0743b3b2ea665 100644 --- a/drivers/staging/media/atomisp/i2c/gc0310.h +++ b/drivers/staging/media/atomisp/i2c/gc0310.h @@ -343,7 +343,7 @@ static const struct gc0310_reg gc0310_reset_register[] = { ///////////////////////////////////////////////// {GC0310_8BIT, 0xfe, 0x01}, {GC0310_8BIT, 0x45, 0xa4}, // 0xf7 - {GC0310_8BIT, 0x46, 0xf0}, // 0xff //f0//sun vaule th + {GC0310_8BIT, 0x46, 0xf0}, // 0xff //f0//sun value th {GC0310_8BIT, 0x48, 0x03}, //sun mode {GC0310_8BIT, 0x4f, 0x60}, //sun_clamp {GC0310_8BIT, 0xfe, 0x00}, diff --git a/drivers/staging/media/atomisp/i2c/mt9m114.h b/drivers/staging/media/atomisp/i2c/mt9m114.h index de39cc1413086..c317214122dcc 100644 --- a/drivers/staging/media/atomisp/i2c/mt9m114.h +++ b/drivers/staging/media/atomisp/i2c/mt9m114.h @@ -275,10 +275,10 @@ struct mt9m114_device { unsigned int agc; unsigned int awb; unsigned int aec; - /* extention SENSOR version 2 */ + /* extension SENSOR version 2 */ unsigned int cie_profile; - /* extention SENSOR version 3 */ + /* extension SENSOR version 3 */ unsigned int flicker_freq; /* extension SENSOR version 4 */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index 8aa5a3019e451..275b8dba5bdb0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -4261,7 +4261,7 @@ int atomisp_set_parameters(struct video_device *vdev, #endif if (arg->per_frame_setting && !atomisp_is_vf_pipe(pipe)) { /* - * Per-frame setting enabled, we allocate a new paramter + * Per-frame setting enabled, we allocate a new parameter * buffer to cache the parameters and only when frame buffers * are ready, the parameters will be set to CSS. * per-frame setting only works for the main output frame. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c index df88d9df20274..7d202db04808a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c @@ -2574,7 +2574,7 @@ static void __configure_preview_pp_input(struct atomisp_sub_device *asd, * * Rule for Bayer Downscaling: support factor 2, 1.5 and 1.25 * Rule for YUV Decimation: support factor 2, 4 - * Rule for YUV Downscaling: arbitary value below 2 + * Rule for YUV Downscaling: arbitrary value below 2 * * General rule of factor distribution among these stages: * 1: try to do Bayer downscaling first if not in online mode. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c index fa03b78c3580d..760b29ec546c0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c @@ -67,7 +67,7 @@ static int csi2_enum_mbus_code(struct v4l2_subdev *sd, * @fh : V4L2 subdev file handle * @pad: pad num * @fmt: pointer to v4l2 format structure - * return -EINVAL or zero on sucess + * return -EINVAL or zero on success */ static int csi2_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c index 693b905547e43..09b47edc690b7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c @@ -270,7 +270,7 @@ int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd, * Because the camera halv3 can't ensure to set zoom * region to per_frame setting and global setting at * same time and only set zoom region to pre_frame - * setting now.so when the pre_frame setting inculde + * setting now.so when the pre_frame setting include * zoom region,I will set it to global setting. */ if (param->params.update_flag.dz_config && diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h index dc476a3dd271e..a2a15725cd488 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h @@ -239,7 +239,7 @@ struct atomisp_device { */ struct atomisp_sub_device *asd; /* - * this will be assiged dyanamically. + * this will be assigned dyanamically. * For Merr/BTY(ISP2400), 2 streams are supported. */ unsigned int num_of_streams; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c index 8c67aea67b6b4..712408eee3e66 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c @@ -2492,7 +2492,7 @@ static int atomisp_g_ext_ctrls(struct file *file, void *fh, struct v4l2_control ctrl; int i, ret = 0; - /* input_lock is not need for the Camera releated IOCTLs + /* input_lock is not need for the Camera related IOCTLs * The input_lock downgrade the FPS of 3A*/ ret = atomisp_camera_g_ext_ctrls(file, fh, c); if (ret != -EINVAL) @@ -2618,7 +2618,7 @@ static int atomisp_s_ext_ctrls(struct file *file, void *fh, struct v4l2_control ctrl; int i, ret = 0; - /* input_lock is not need for the Camera releated IOCTLs + /* input_lock is not need for the Camera related IOCTLs * The input_lock downgrade the FPS of 3A*/ ret = atomisp_camera_s_ext_ctrls(file, fh, c); if (ret != -EINVAL) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c index 49a9973b4289a..673b9a25f6013 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c @@ -1002,7 +1002,7 @@ static const struct v4l2_ctrl_config ctrl_enable_raw_buffer_lock = { /* * Control to disable digital zoom of the whole stream * - * When it is true, pipe configuation enable_dz will be set to false. + * When it is true, pipe configuration enable_dz will be set to false. * This can help get a better performance by disabling pp binary. * * Note: Make sure set this configuration before creating stream. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h index 914aa7f987000..564be8ea751d6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h @@ -365,7 +365,7 @@ extern uint32_t ia_css_circbuf_peek_from_start( * but new elements should be added at the end to existing * cb element array which if of max_size >= new size * - * @return true on succesfully increasing the size + * @return true on successfully increasing the size * false on failure */ extern bool ia_css_circbuf_increase_size( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_common_defs.h index f3054fe04d037..89ff5313065fc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_common_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_common_defs.h @@ -63,7 +63,7 @@ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -/* used reseved mipi positions for these */ +/* used reserved mipi positions for these */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h index 1b3391c242a3d..b5be610c50596 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h @@ -68,7 +68,7 @@ /* */ #define _PXG_SYNG_PAUSE_CYCLES 0 /* Subblock ID's */ -#define _PXG_DISBALE_IDX 0 +#define _PXG_DISABLE_IDX 0 #define _PXG_PRBS_IDX 0 #define _PXG_TPG_IDX 1 #define _PXG_SYNG_IDX 2 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h index f3054fe04d037..89ff5313065fc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h @@ -63,7 +63,7 @@ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -/* used reseved mipi positions for these */ +/* used reserved mipi positions for these */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h index 76705d7a2b44a..67f68f1a65d79 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h @@ -63,7 +63,7 @@ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -/* used reseved mipi positions for these */ +/* used reserved mipi positions for these */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h index 1be5c6956d65b..e0be59ccb821d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h @@ -32,8 +32,8 @@ * The DMA port definition for the input system * 2401 DMA is the duplication of the DMA port * definition for the CSS system DMA. It is duplicated - * here just as the temporal step before the device libary - * is available. The device libary is suppose to provide + * here just as the temporal step before the device library + * is available. The device library is suppose to provide * the capability of reusing the control interface of the * same device prototypes. The refactor team will work on * this, right? @@ -55,8 +55,8 @@ struct isys2401_dma_port_cfg_s { * The DMA device definition for the input system * 2401 DMA is the duplicattion of the DMA device * definition for the CSS system DMA. It is duplicated - * here just as the temporal step before the device libary - * is available. The device libary is suppose to provide + * here just as the temporal step before the device library + * is available. The device library is suppose to provide * the capability of reusing the control interface of the * same device prototypes. The refactor team will work on * this, right? diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h index 7907f0ff6d6c3..8d65927289330 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h @@ -451,7 +451,7 @@ enum ia_css_isp_memories { N_IA_CSS_MEMORIES }; #define IA_CSS_NUM_MEMORIES 9 -/* For driver compatability */ +/* For driver compatibility */ #define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES #define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h index f3054fe04d037..89ff5313065fc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h @@ -63,7 +63,7 @@ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -/* used reseved mipi positions for these */ +/* used reserved mipi positions for these */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h index 6f63962a54e8f..9f1c2beefc854 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h @@ -317,7 +317,7 @@ enum ia_css_isp_memories { N_IA_CSS_MEMORIES }; #define IA_CSS_NUM_MEMORIES 9 -/* For driver compatability */ +/* For driver compatibility */ #define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES #define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h index fd0d92e87c366..7dac8dd93f000 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h @@ -88,7 +88,7 @@ #ifndef PIPE_GENERATION /* Deprecated OP___assert, this is still used in ~1000 places * in the code. This will be removed over time. - * The implemenation for the pipe generation tool is in see support.isp.h */ + * The implementation for the pipe generation tool is in see support.isp.h */ #define OP___assert(cnd) assert(cnd) static inline void compile_time_assert (unsigned cond) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h index 426d022d3a260..45b316abb6749 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h @@ -85,7 +85,7 @@ extern void csi_rx_be_ctrl_dump_state( * Load the value of the register of the csi rx fe. * * @param[in] ID The global unique ID for the ibuf-controller instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * * @return the value of the register. */ @@ -97,7 +97,7 @@ extern hrt_data csi_rx_fe_ctrl_reg_load( * Store a value to the registe of the csi rx fe. * * @param[in] ID The global unique ID for the ibuf-controller instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * @param[in] value The value to be stored. * */ @@ -110,7 +110,7 @@ extern void csi_rx_fe_ctrl_reg_store( * Load the value of the register of the csirx be. * * @param[in] ID The global unique ID for the ibuf-controller instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * * @return the value of the register. */ @@ -122,7 +122,7 @@ extern hrt_data csi_rx_be_ctrl_reg_load( * Store a value to the registe of the csi rx be. * * @param[in] ID The global unique ID for the ibuf-controller instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * @param[in] value The value to be stored. * */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h index 98ee9947fb8ef..274ceaf4b050f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h @@ -66,7 +66,7 @@ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_dump_state( * Load the value of the register of the ibuf-controller. * * @param[in] ID The global unique ID for the ibuf-controller instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * * @return the value of the register. */ @@ -79,7 +79,7 @@ STORAGE_CLASS_IBUF_CTRL_H hrt_data ibuf_ctrl_reg_load( * Store a value to the registe of the ibuf-controller. * * @param[in] ID The global unique ID for the ibuf-controller instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * @param[in] value The value to be stored. * */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_stream2mmio_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_stream2mmio_public.h index 6c53ca9df96c3..f7982e8078cc6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_stream2mmio_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_stream2mmio_public.h @@ -56,7 +56,7 @@ STORAGE_CLASS_STREAM2MMIO_H void stream2mmio_get_sid_state( * * @param[in] ID The global unique ID for the stream2mmio-controller instance. * @param[in] sid_id The SID in question. - * @param[in] reg_idx The offet address of the register. + * @param[in] reg_idx The offset address of the register. * * @return the value of the register. */ @@ -88,7 +88,7 @@ STORAGE_CLASS_STREAM2MMIO_H void stream2mmio_dump_state( * Store a value to the registe of the stream2mmio-controller. * * @param[in] ID The global unique ID for the stream2mmio-controller instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * @param[in] value The value to be stored. * */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/pixelgen_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/pixelgen_public.h index f597e07d7c4f9..411ae2272557a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/pixelgen_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/pixelgen_public.h @@ -53,7 +53,7 @@ STORAGE_CLASS_PIXELGEN_H void pixelgen_ctrl_dump_state( * Load the value of the register of the pixelgen * * @param[in] ID The global unique ID for the pixelgen instance. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * * @return the value of the register. */ @@ -65,7 +65,7 @@ STORAGE_CLASS_PIXELGEN_H hrt_data pixelgen_ctrl_reg_load( * Store a value to the registe of the pixelgen * * @param[in] ID The global unique ID for the pixelgen. - * @param[in] reg The offet address of the register. + * @param[in] reg The offset address of the register. * @param[in] value The value to be stored. * */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h index d2387812f3a6a..f06d52533531e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h @@ -128,7 +128,7 @@ extern hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attribute) \param attribute[in] Bit vector specifying the properties of the allocation \param context Pointer of a context provided by - client/driver for additonal parameters + client/driver for additional parameters needed by the implementation \Note This interface is tentative, limited to the desired function diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h index cf895815ea31e..375952a7782ea 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h @@ -47,9 +47,9 @@ enum ia_css_err { enum ia_css_fw_warning { IA_CSS_FW_WARNING_NONE, IA_CSS_FW_WARNING_ISYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the ISys queue. - This warning can be avoided by de-queing ISYS buffers more timely. */ + This warning can be avoided by de-queuing ISYS buffers more timely. */ IA_CSS_FW_WARNING_PSYS_QUEUE_FULL, /* < CSS system delayed because of insufficient space in the PSys queue. - This warning can be avoided by de-queing PSYS buffers more timely. */ + This warning can be avoided by de-queuing PSYS buffers more timely. */ IA_CSS_FW_WARNING_CIRCBUF_ALL_LOCKED, /* < CSS system delayed because of insufficient available buffers. This warning can be avoided by unlocking locked frame-buffers more timely. */ IA_CSS_FW_WARNING_EXP_ID_LOCKED, /* < Exposure ID skipped because the frame associated to it was still locked. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h index 11225d5ac442f..29bb7c01da385 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h @@ -308,7 +308,7 @@ ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, * @param[in] and_mask Binary or of enum ia_css_event_irq_mask_type. An event IRQ for the Host is only raised after all pipe related events have occurred at least once for all the active - pipes. Events are remembered and don't need to occure + pipes. Events are remembered and don't need to occurred at the same moment in time. There is no control over the order of these events. Once an IRQ has been raised all remembered events are reset. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h index ddefad330db7b..3d1c5a8f879bc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h @@ -125,7 +125,7 @@ struct ia_css_stream_config { bool pack_raw_pixels; /** Pack pixels in the raw buffers */ bool continuous; /** Use SP copy feature to continuously capture frames to system memory and run pipes in offline mode */ - bool disable_cont_viewfinder; /** disable continous viewfinder for ZSL use case */ + bool disable_cont_viewfinder; /** disable continuous viewfinder for ZSL use case */ int32_t flash_gpio_pin; /** pin on which the flash is connected, -1 for no flash */ int left_padding; /** The number of input-formatter left-paddings, -1 for default from binary.*/ struct ia_css_mipi_buffer_config mipi_buffer_config; /** mipi buffer configuration */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c index 07bd24edc7bf6..74fc102a8192a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c @@ -45,7 +45,7 @@ static int ctc2_slope(int y1, int y0, int x1, int x0) int dy_shift = dy << shift_val; int slope, dydx; - /*Protection for paramater values, & avoiding zero divisions*/ + /*Protection for parameter values, & avoiding zero divisions*/ assert(y0 >= 0 && y0 <= max_slope); assert(y1 >= 0 && y1 <= max_slope); assert(x0 >= 0 && x0 <= max_slope); @@ -80,7 +80,7 @@ void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, { unsigned i, j; const unsigned shffl_blck = 4; - const unsigned lenght_zeros = 11; + const unsigned length_zeros = 11; short dydx0, dydx1, dydx2, dydx3, dydx4; (void)size; @@ -127,7 +127,7 @@ void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, to->e_y_slope[0][(i << shffl_blck) + 3] = dydx3; to->e_y_slope[0][(i << shffl_blck) + 4] = dydx4; - for (j = 0; j < lenght_zeros; j++) { + for (j = 0; j < length_zeros; j++) { to->y_x[0][(i << shffl_blck) + 5 + j] = 0; to->y_y[0][(i << shffl_blck) + 5 + j] = 0; to->e_y_slope[0][(i << shffl_blck)+ 5 + j] = 0; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h index 26464421b077e..9b4b32bc67530 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h @@ -21,7 +21,7 @@ /** * \brief HDR Irradiance Parameters - * \detail Currently HDR paramters are used only for testing purposes + * \detail Currently HDR parameters are used only for testing purposes */ struct ia_css_hdr_irradiance_params { int test_irr; /** Test parameter */ @@ -36,7 +36,7 @@ struct ia_css_hdr_irradiance_params { /** * \brief HDR Deghosting Parameters - * \detail Currently HDR paramters are used only for testing purposes + * \detail Currently HDR parameters are used only for testing purposes */ struct ia_css_hdr_deghost_params { int test_deg; /** Test parameter */ @@ -44,7 +44,7 @@ struct ia_css_hdr_deghost_params { /** * \brief HDR Exclusion Parameters - * \detail Currently HDR paramters are used only for testing purposes + * \detail Currently HDR parameters are used only for testing purposes */ struct ia_css_hdr_exclusion_params { int test_excl; /** Test parameter */ @@ -52,11 +52,11 @@ struct ia_css_hdr_exclusion_params { /** * \brief HDR public paramterers. - * \details Struct with all paramters for HDR that can be seet from - * the CSS API. Currenly, only test paramters are defined. + * \details Struct with all parameters for HDR that can be seet from + * the CSS API. Currenly, only test parameters are defined. */ struct ia_css_hdr_config { - struct ia_css_hdr_irradiance_params irradiance; /** HDR irradiance paramaters */ + struct ia_css_hdr_irradiance_params irradiance; /** HDR irradiance parameters */ struct ia_css_hdr_deghost_params deghost; /** HDR deghosting parameters */ struct ia_css_hdr_exclusion_params exclusion; /** HDR exclusion parameters */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c index 0cd6e1da43cfe..e16ab458cf523 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c @@ -1805,7 +1805,7 @@ unsigned ia_css_binary_max_vf_width(void) { /* This is (should be) true for IPU1 and IPU2 */ - /* For IPU3 (SkyCam) this pointer is guarenteed to be NULL simply because such a binary does not exist */ + /* For IPU3 (SkyCam) this pointer is guaranteed to be NULL simply because such a binary does not exist */ if (binary_infos[IA_CSS_BINARY_MODE_VF_PP]) return binary_infos[IA_CSS_BINARY_MODE_VF_PP]->sp.output.max_width; return 0; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h index 034ec15ec4a15..4d17d3c697d6a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h @@ -71,7 +71,7 @@ void ia_css_queue_map( /** - * @brief Initilize buffer type to a queue id mapping + * @brief Initialize buffer type to a queue id mapping * @return none */ void ia_css_queue_map_init(void); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c index 4607a76dc78af..66556a4e574ee 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c @@ -2872,7 +2872,7 @@ ia_css_debug_pipe_graph_dump_stage( if (l <= ENABLE_LINE_MAX_LENGTH) { /* The 2nd line fits */ /* we cannot use ei as argument because - * it is not guarenteed dword aligned + * it is not guaranteed dword aligned */ strncpy_s(enable_info2, sizeof(enable_info2), @@ -2896,7 +2896,7 @@ ia_css_debug_pipe_graph_dump_stage( if (l <= ENABLE_LINE_MAX_LENGTH) { /* The 3rd line fits */ /* we cannot use ei as argument because - * it is not guarenteed dword aligned + * it is not guaranteed dword aligned */ strcpy_s(enable_info3, sizeof(enable_info3), ei); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c index fd8e6fda5db41..5a7df5ab4e3e3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c @@ -917,7 +917,7 @@ ia_css_elems_bytes_from_info(const struct ia_css_frame_info *info) return 2; /* bytes per pixel */ /* Note: Essentially NV12_16 is a 2 bytes per pixel format, this return value is used * to configure DMA for the output buffer, - * At least in SKC this data is overwriten by isp_output_init.sp.c except for elements(elems), + * At least in SKC this data is overwritten by isp_output_init.sp.c except for elements(elems), * which is configured from this return value, * NV12_16 is implemented by a double buffer of 8 bit elements hence elems should be configured as 8 */ if (info->format == IA_CSS_FRAME_FORMAT_NV12_16) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h index 85ed7db0af556..45a47c202e2f7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h @@ -215,7 +215,7 @@ enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeli uint32_t fw_handle, struct ia_css_pipeline_stage **stage); -/* @brief Gets the Firmware handle correponding the stage num from the pipeline +/* @brief Gets the Firmware handle corresponding the stage num from the pipeline * * @param[in] pipeline * @param[in] stage_num diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index 4bcc835880cff..230b4cc60767c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -1259,7 +1259,7 @@ static void print_pc_histo(char *core_name, struct sh_css_pc_histogram *hist) return; sh_css_print("%s histogram length = %d\n", core_name, hist->length); - sh_css_print("%s PC\trun\tstall\n", core_name); + sh_css_print("%s PC\turn\tstall\n", core_name); for (i = 0; i < hist->length; i++) { if ((hist->run[i] == 0) && (hist->run[i] == hist->stall[i])) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h index 161122e1bcbc6..d559f9d303cc8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h @@ -335,7 +335,7 @@ struct sh_css_sp_debug_state { #define SH_CSS_SP_DBG_NR_OF_TRACES (1) #define SH_CSS_SP_DBG_TRACE_DEPTH (40) #else -/* E.g. if you like seperate traces for 4 threads */ +/* E.g. if you like separate traces for 4 threads */ #define SH_CSS_SP_DBG_NR_OF_TRACES (4) #define SH_CSS_SP_DBG_TRACE_DEPTH (10) #endif @@ -373,7 +373,7 @@ struct sh_css_sp_debug_command { * Bit 31...24: unused. * Bit 23...16: unused. * Bit 15...08: reading-request enabling bits for DMA channel 7..0 - * Bit 07...00: writing-reqeust enabling bits for DMA channel 7..0 + * Bit 07...00: writing-request enabling bits for DMA channel 7..0 * * For example, "0...0 0...0 11111011 11111101" indicates that the * writing request through DMA Channel 1 and the reading request @@ -584,11 +584,11 @@ struct sh_css_sp_pipeline { /* * The first frames (with comment Dynamic) can be dynamic or static * The other frames (ref_in and below) can only be static - * Static means that the data addres will not change during the life time + * Static means that the data address will not change during the life time * of the associated pipe. Dynamic means that the data address can * change with every (frame) iteration of the associated pipe * - * s3a and dis are now also dynamic but (stil) handled seperately + * s3a and dis are now also dynamic but (stil) handled separately */ #define SH_CSS_NUM_DYNAMIC_FRAME_IDS (3) @@ -608,7 +608,7 @@ struct ia_css_frames_sp { /* Information for a single pipeline stage for an ISP */ struct sh_css_isp_stage { /* - * For compatability and portabilty, only types + * For compatibility and portabilty, only types * from "stdint.h" are allowed * * Use of "enum" and "bool" is prohibited @@ -624,7 +624,7 @@ struct sh_css_isp_stage { /* Information for a single pipeline stage */ struct sh_css_sp_stage { /* - * For compatability and portabilty, only types + * For compatibility and portabilty, only types * from "stdint.h" are allowed * * Use of "enum" and "bool" is prohibited @@ -686,7 +686,7 @@ struct sh_css_sp_stage { * Note: * Group all host initialized SP variables into this struct. * This is initialized every stage through dma. - * The stage part itself is transfered through sh_css_sp_stage. + * The stage part itself is transferred through sh_css_sp_stage. */ struct sh_css_sp_group { struct sh_css_sp_config config; @@ -840,7 +840,7 @@ struct sh_css_event_irq_mask { struct host_sp_communication { /* * Don't use enum host2sp_commands, because the sizeof an enum is - * compiler dependant and thus non-portable + * compiler dependent and thus non-portable */ uint32_t host2sp_command; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c index 43529b1605c3a..9084bf751d633 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c @@ -3828,7 +3828,7 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, cur_map_size = ¶ms->pipe_ddr_ptrs_size[pipeline->pipe_id]; /* TODO: Normally, zoom and motion parameters shouldn't - * be part of "isp_params" as it is resolution/pipe dependant + * be part of "isp_params" as it is resolution/pipe dependent * Therefore, move the zoom config elsewhere (e.g. shading * table can be taken as an example! @GC * */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c index cdbe914787c88..254d5797d8f88 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c @@ -1403,7 +1403,7 @@ sh_css_read_host2sp_command(void) /* * Frame data is no longer part of the sp_stage structure but part of a - * seperate structure. The aim is to make the sp_data struct static + * separate structure. The aim is to make the sp_data struct static * (it defines a pipeline) and that the dynamic (per frame) data is stored * separetly. * @@ -1422,7 +1422,7 @@ sh_css_init_host2sp_frame_data(void) /* * rvanimme: don't clean it to save static frame info line ref_in * ref_out, and tnr_frames. Once this static data is in a - * seperate data struct, this may be enable (but still, there is + * separate data struct, this may be enable (but still, there is * no need for it) */ } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c index a6620d2c9f507..ef35ac0b3a27c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c @@ -1516,7 +1516,7 @@ int hmm_bo_mmap(struct vm_area_struct *vma, struct hmm_buffer_object *bo) vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP; /* - * call hmm_bo_vm_open explictly. + * call hmm_bo_vm_open explicitly. */ hmm_bo_vm_open(vma); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h index 4b2d94a37ea19..0fa8e02a8655f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h @@ -136,7 +136,7 @@ int isp_mmu_init(struct isp_mmu *mmu, struct isp_mmu_client *driver); void isp_mmu_exit(struct isp_mmu *mmu); /* - * setup/remove address mapping for pgnr continous physical pages + * setup/remove address mapping for pgnr continuous physical pages * and isp_virt. * * map/unmap is mutex lock protected, and caller does not have diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c index f4b975a18fa3a..d7f25fe890aeb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c @@ -168,7 +168,7 @@ static void mmu_unmap_l2_pte_error(struct isp_mmu *mmu, phys_addr_t l2_pt, unsigned int l2_idx, unsigned int isp_virt, unsigned int pte) { - dev_err(atomisp_dev, "unmap unvalid L2 pte:\n\n" + dev_err(atomisp_dev, "unmap invalid L2 pte:\n\n" "\tL1 PT: virt = %p, phys = 0x%llx, " "idx = %d\n" "\tL2 PT: virt = %p, phys = 0x%llx, " @@ -185,7 +185,7 @@ static void mmu_unmap_l1_pte_error(struct isp_mmu *mmu, phys_addr_t l1_pt, unsigned int l1_idx, unsigned int isp_virt, unsigned int pte) { - dev_err(atomisp_dev, "unmap unvalid L1 pte (L2 PT):\n\n" + dev_err(atomisp_dev, "unmap invalid L1 pte (L2 PT):\n\n" "\tL1 PT: virt = %p, phys = 0x%llx, " "idx = %d\n" "\tisp_virt = 0x%x, l1_pte(L2 PT) = 0x%x\n", @@ -196,7 +196,7 @@ static void mmu_unmap_l1_pte_error(struct isp_mmu *mmu, static void mmu_unmap_l1_pt_error(struct isp_mmu *mmu, unsigned int pte) { - dev_err(atomisp_dev, "unmap unvalid L1PT:\n\n" + dev_err(atomisp_dev, "unmap invalid L1PT:\n\n" "L1PT = 0x%x\n", (unsigned int)pte); } -- GitLab From bdfe0beb95eebc864f341fd0c5e903672b90b1a2 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 16:06:45 +0200 Subject: [PATCH 390/503] media: atomisp: fix several coding style issues Use checkpatch.pl --fix-inplace --strict to solve several coding style issues, manually reviewing the produced code and fixing some troubles caused by checkpatch. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-gc0310.c | 22 +- .../media/atomisp/i2c/atomisp-gc2235.c | 16 +- .../atomisp/i2c/atomisp-libmsrlisthelper.c | 34 +- .../media/atomisp/i2c/atomisp-lm3554.c | 17 +- .../media/atomisp/i2c/atomisp-mt9m114.c | 29 +- .../media/atomisp/i2c/atomisp-ov2680.c | 64 +- .../media/atomisp/i2c/atomisp-ov2722.c | 20 +- drivers/staging/media/atomisp/i2c/gc0310.h | 2 +- drivers/staging/media/atomisp/i2c/gc2235.h | 5 +- drivers/staging/media/atomisp/i2c/mt9m114.h | 17 +- drivers/staging/media/atomisp/i2c/ov2680.h | 15 +- drivers/staging/media/atomisp/i2c/ov2722.h | 4 + .../staging/media/atomisp/i2c/ov5693/ad5823.h | 1 - .../media/atomisp/i2c/ov5693/atomisp-ov5693.c | 27 +- .../staging/media/atomisp/i2c/ov5693/ov5693.h | 9 +- .../media/atomisp/include/linux/atomisp.h | 144 +- .../include/linux/atomisp_gmin_platform.h | 6 +- .../atomisp/include/linux/atomisp_platform.h | 12 +- .../atomisp/include/linux/libmsrlisthelper.h | 7 +- .../media/atomisp/include/media/lm3554.h | 7 +- .../media/atomisp/pci/atomisp2/atomisp_acc.h | 1 - .../media/atomisp/pci/atomisp2/atomisp_cmd.c | 169 +- .../media/atomisp/pci/atomisp2/atomisp_cmd.h | 1 - .../atomisp/pci/atomisp2/atomisp_compat.h | 4 +- .../pci/atomisp2/atomisp_compat_css20.c | 86 +- .../pci/atomisp2/atomisp_compat_ioctl32.c | 7 +- .../pci/atomisp2/atomisp_compat_ioctl32.h | 36 +- .../media/atomisp/pci/atomisp2/atomisp_csi2.c | 9 +- .../media/atomisp/pci/atomisp2/atomisp_csi2.h | 4 +- .../atomisp/pci/atomisp2/atomisp_dfs_tables.h | 1 - .../atomisp/pci/atomisp2/atomisp_drvfs.c | 6 +- .../media/atomisp/pci/atomisp2/atomisp_file.c | 4 +- .../media/atomisp/pci/atomisp2/atomisp_fops.c | 23 +- .../atomisp/pci/atomisp2/atomisp_helper.h | 1 - .../atomisp/pci/atomisp2/atomisp_internal.h | 15 +- .../atomisp/pci/atomisp2/atomisp_ioctl.c | 30 +- .../atomisp/pci/atomisp2/atomisp_subdev.c | 21 +- .../atomisp/pci/atomisp2/atomisp_subdev.h | 24 +- .../media/atomisp/pci/atomisp2/atomisp_tpg.c | 1 - .../pci/atomisp2/atomisp_trace_event.h | 4 +- .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 20 +- .../base/circbuf/interface/ia_css_circbuf.h | 68 +- .../circbuf/interface/ia_css_circbuf_comm.h | 12 +- .../circbuf/interface/ia_css_circbuf_desc.h | 26 +- .../css2400/base/circbuf/src/circbuf.c | 23 +- .../base/refcount/interface/ia_css_refcount.h | 14 +- .../css2400/base/refcount/src/refcount.c | 43 +- .../pipe/interface/ia_css_pipe_binarydesc.h | 30 +- .../pipe/interface/ia_css_pipe_stagedesc.h | 11 +- .../camera/pipe/interface/ia_css_pipe_util.h | 6 +- .../css2400/camera/pipe/src/pipe_binarydesc.c | 102 +- .../css2400/camera/pipe/src/pipe_stagedesc.c | 8 +- .../css2400/camera/pipe/src/pipe_util.c | 7 +- .../camera/util/interface/ia_css_util.h | 21 +- .../atomisp2/css2400/camera/util/src/util.c | 17 +- .../ia_css_isp_configs.c | 71 +- .../ia_css_isp_params.c | 996 +++++------ .../ia_css_isp_params.h | 4 +- .../ia_css_isp_states.c | 41 +- .../css2400/css_2400_system/hrt/bits.h | 2 +- .../css2400/css_2400_system/hrt/cell_params.h | 6 +- .../hrt/css_receiver_2400_common_defs.h | 40 +- .../hrt/css_receiver_2400_defs.h | 6 +- .../css2400/css_2400_system/hrt/dma_v2_defs.h | 80 +- .../css2400/css_2400_system/hrt/gdc_v2_defs.h | 63 +- .../css_2400_system/hrt/gp_timer_defs.h | 14 +- .../css_2400_system/hrt/gpio_block_defs.h | 1 - .../css_2400_system/hrt/hive_isp_css_defs.h | 41 +- .../hrt/hive_isp_css_host_ids_hrt.h | 2 +- .../hrt/hive_isp_css_irq_types_hrt.h | 66 +- ...hive_isp_css_streaming_to_mipi_types_hrt.h | 6 +- .../css2400/css_2400_system/hrt/hive_types.h | 30 +- .../hrt/input_formatter_subsystem_defs.h | 2 +- .../css_2400_system/hrt/input_selector_defs.h | 43 +- .../hrt/input_switch_2400_defs.h | 4 +- .../hrt/input_system_ctrl_defs.h | 159 +- .../css_2400_system/hrt/irq_controller_defs.h | 2 +- .../hrt/isp2400_mamoiada_params.h | 6 +- .../hrt/isp_acquisition_defs.h | 129 +- .../css_2400_system/hrt/isp_capture_defs.h | 146 +- .../hrt/timed_controller_defs.h | 2 +- .../css2400/css_2400_system/hrt/var.h | 28 +- .../css2400/css_2400_system/spmem_dump.c | 1 - .../css_2401_csi2p_system/csi_rx_global.h | 24 +- .../ia_css_isp_configs.c | 71 +- .../ia_css_isp_params.c | 996 +++++------ .../ia_css_isp_params.h | 4 +- .../ia_css_isp_states.c | 41 +- .../css_2401_csi2p_system/host/csi_rx.c | 9 +- .../css_2401_csi2p_system/host/csi_rx_local.h | 51 +- .../host/csi_rx_private.h | 87 +- .../css_2401_csi2p_system/host/ibuf_ctrl.c | 2 +- .../host/ibuf_ctrl_private.h | 19 +- .../host/input_system_private.h | 29 +- .../host/isys_dma_private.h | 5 +- .../host/isys_irq_private.h | 4 +- .../host/isys_stream2mmio_local.h | 2 +- .../host/isys_stream2mmio_private.h | 13 +- .../host/pixelgen_private.h | 66 +- .../css_2401_csi2p_system/host/system_local.h | 8 +- .../hrt/PixelGen_SysBlock_defs.h | 2 - .../css2400/css_2401_csi2p_system/hrt/bits.h | 2 +- .../css_2401_csi2p_system/hrt/cell_params.h | 6 +- .../hrt/css_receiver_2400_common_defs.h | 40 +- .../hrt/css_receiver_2400_defs.h | 6 +- .../css_2401_csi2p_system/hrt/dma_v2_defs.h | 80 +- .../css_2401_csi2p_system/hrt/gdc_v2_defs.h | 63 +- .../css_2401_csi2p_system/hrt/gp_timer_defs.h | 14 +- .../hrt/gpio_block_defs.h | 1 - .../hrt/hive_isp_css_2401_irq_types_hrt.h | 64 +- .../hrt/hive_isp_css_defs.h | 49 +- .../hrt/hive_isp_css_host_ids_hrt.h | 3 +- ...hive_isp_css_streaming_to_mipi_types_hrt.h | 6 +- .../css_2401_csi2p_system/hrt/hive_types.h | 30 +- .../hrt/ibuf_cntrl_defs.h | 30 +- .../hrt/input_formatter_subsystem_defs.h | 2 +- .../hrt/input_selector_defs.h | 43 +- .../hrt/input_switch_2400_defs.h | 4 +- .../hrt/input_system_ctrl_defs.h | 159 +- .../hrt/irq_controller_defs.h | 2 +- .../hrt/isp2401_mamoiada_params.h | 8 +- .../hrt/isp_acquisition_defs.h | 129 +- .../hrt/isp_capture_defs.h | 146 +- .../hrt/mipi_backend_common_defs.h | 71 +- .../hrt/mipi_backend_defs.h | 83 +- .../css_2401_csi2p_system/hrt/rx_csi_defs.h | 36 +- .../hrt/stream2mmio_defs.h | 19 +- .../hrt/timed_controller_defs.h | 2 +- .../css2400/css_2401_csi2p_system/hrt/var.h | 46 +- .../css_2401_csi2p_system/ibuf_ctrl_global.h | 35 +- .../input_system_global.h | 52 +- .../css_2401_csi2p_system/isys_dma_global.h | 11 +- .../isys_stream2mmio_global.h | 4 +- .../css_2401_csi2p_system/pixelgen_global.h | 39 +- .../css_2401_csi2p_system/spmem_dump.c | 1 - .../css_2401_csi2p_system/system_global.h | 10 +- .../ia_css_isp_configs.c | 71 +- .../ia_css_isp_params.c | 996 +++++------ .../ia_css_isp_params.h | 4 +- .../ia_css_isp_states.c | 41 +- .../css2400/css_2401_system/hrt/bits.h | 2 +- .../css2400/css_2401_system/hrt/cell_params.h | 6 +- .../hrt/css_receiver_2400_common_defs.h | 40 +- .../hrt/css_receiver_2400_defs.h | 6 +- .../css2400/css_2401_system/hrt/dma_v2_defs.h | 80 +- .../css2400/css_2401_system/hrt/gdc_v2_defs.h | 63 +- .../css_2401_system/hrt/gp_timer_defs.h | 14 +- .../css_2401_system/hrt/gpio_block_defs.h | 1 - .../hrt/hive_isp_css_2401_irq_types_hrt.h | 64 +- .../css_2401_system/hrt/hive_isp_css_defs.h | 49 +- .../hrt/hive_isp_css_host_ids_hrt.h | 3 +- ...hive_isp_css_streaming_to_mipi_types_hrt.h | 6 +- .../css2400/css_2401_system/hrt/hive_types.h | 30 +- .../hrt/input_formatter_subsystem_defs.h | 2 +- .../css_2401_system/hrt/input_selector_defs.h | 43 +- .../hrt/input_switch_2400_defs.h | 4 +- .../hrt/input_system_ctrl_defs.h | 159 +- .../css_2401_system/hrt/irq_controller_defs.h | 2 +- .../hrt/isp2401_mamoiada_params.h | 8 +- .../hrt/isp_acquisition_defs.h | 129 +- .../css_2401_system/hrt/isp_capture_defs.h | 146 +- .../hrt/timed_controller_defs.h | 2 +- .../css2400/css_2401_system/hrt/var.h | 46 +- .../css2400/css_2401_system/spmem_dump.c | 1 - .../atomisp/pci/atomisp2/css2400/css_trace.h | 102 +- .../hive_isp_css_common/debug_global.h | 30 +- .../css2400/hive_isp_css_common/dma_global.h | 29 +- .../css2400/hive_isp_css_common/gdc_global.h | 39 +- .../hive_isp_css_common/gp_device_global.h | 1 - .../css2400/hive_isp_css_common/hmem_global.h | 8 +- .../css2400/hive_isp_css_common/host/debug.c | 9 +- .../hive_isp_css_common/host/debug_local.h | 1 - .../hive_isp_css_common/host/debug_private.h | 33 +- .../css2400/hive_isp_css_common/host/dma.c | 12 +- .../hive_isp_css_common/host/dma_local.h | 2 +- .../hive_isp_css_common/host/dma_private.h | 8 +- .../host/event_fifo_private.h | 12 +- .../hive_isp_css_common/host/fifo_monitor.c | 19 +- .../host/fifo_monitor_private.h | 13 +- .../css2400/hive_isp_css_common/host/gdc.c | 8 +- .../hive_isp_css_common/host/gp_device.c | 2 +- .../host/gp_device_private.h | 2 +- .../hive_isp_css_common/host/gp_timer.c | 4 +- .../hive_isp_css_common/host/gp_timer_local.h | 4 +- .../hive_isp_css_common/host/gpio_private.h | 8 +- .../hive_isp_css_common/host/hmem_private.h | 2 +- .../host/input_formatter.c | 8 +- .../host/input_formatter_local.h | 18 +- .../hive_isp_css_common/host/input_system.c | 439 +++-- .../host/input_system_local.h | 90 +- .../host/input_system_private.h | 16 +- .../css2400/hive_isp_css_common/host/irq.c | 29 +- .../hive_isp_css_common/host/irq_local.h | 16 +- .../hive_isp_css_common/host/irq_private.h | 8 +- .../css2400/hive_isp_css_common/host/isp.c | 17 +- .../hive_isp_css_common/host/isp_local.h | 2 +- .../hive_isp_css_common/host/isp_private.h | 27 +- .../css2400/hive_isp_css_common/host/mmu.c | 4 +- .../css2400/hive_isp_css_common/host/sp.c | 4 +- .../hive_isp_css_common/host/sp_local.h | 38 +- .../hive_isp_css_common/host/sp_private.h | 7 +- .../hive_isp_css_common/host/system_local.h | 10 +- .../hive_isp_css_common/host/timed_ctrl.c | 4 +- .../host/timed_ctrl_private.h | 4 +- .../hive_isp_css_common/host/vamem_private.h | 6 +- .../css2400/hive_isp_css_common/host/vmem.c | 118 +- .../hive_isp_css_common/host/vmem_local.h | 26 +- .../input_formatter_global.h | 32 +- .../hive_isp_css_common/input_system_global.h | 44 +- .../css2400/hive_isp_css_common/isp_global.h | 8 +- .../hive_isp_css_common/system_global.h | 11 +- .../hive_isp_css_common/timed_ctrl_global.h | 2 - .../hive_isp_css_common/vamem_global.h | 10 +- .../css2400/hive_isp_css_common/vmem_global.h | 2 +- .../hive_isp_css_include/assert_support.h | 9 +- .../hive_isp_css_include/bitop_support.h | 1 - .../css2400/hive_isp_css_include/csi_rx.h | 1 - .../css2400/hive_isp_css_include/debug.h | 3 +- .../device_access/device_access.h | 25 +- .../css2400/hive_isp_css_include/dma.h | 3 +- .../hive_isp_css_include/error_support.h | 11 +- .../css2400/hive_isp_css_include/event_fifo.h | 3 +- .../hive_isp_css_include/fifo_monitor.h | 3 +- .../css2400/hive_isp_css_include/gdc_device.h | 3 +- .../css2400/hive_isp_css_include/gp_device.h | 3 +- .../css2400/hive_isp_css_include/gp_timer.h | 1 - .../css2400/hive_isp_css_include/gpio.h | 3 +- .../css2400/hive_isp_css_include/hmem.h | 3 +- .../hive_isp_css_include/host/csi_rx_public.h | 20 +- .../hive_isp_css_include/host/debug_public.h | 23 +- .../hive_isp_css_include/host/dma_public.h | 3 +- .../host/event_fifo_public.h | 12 +- .../host/fifo_monitor_public.h | 20 +- .../hive_isp_css_include/host/gdc_public.h | 8 +- .../host/gp_device_public.h | 6 +- .../host/gp_timer_public.h | 1 - .../hive_isp_css_include/host/gpio_public.h | 2 +- .../host/ibuf_ctrl_public.h | 2 +- .../host/input_formatter_public.h | 28 +- .../host/input_system_public.h | 125 +- .../hive_isp_css_include/host/irq_public.h | 28 +- .../hive_isp_css_include/host/isp_public.h | 11 +- .../host/isys_dma_public.h | 2 +- .../hive_isp_css_include/host/mmu_public.h | 18 +- .../hive_isp_css_include/host/sp_public.h | 8 +- .../hive_isp_css_include/host/tag_public.h | 1 - .../host/timed_ctrl_public.h | 6 +- .../hive_isp_css_include/host/vamem_public.h | 2 - .../css2400/hive_isp_css_include/ibuf_ctrl.h | 2 - .../hive_isp_css_include/input_formatter.h | 3 +- .../hive_isp_css_include/input_system.h | 3 +- .../css2400/hive_isp_css_include/irq.h | 3 +- .../css2400/hive_isp_css_include/isp.h | 3 +- .../css2400/hive_isp_css_include/isys_dma.h | 2 - .../hive_isp_css_include/isys_stream2mmio.h | 2 - .../hive_isp_css_include/math_support.h | 29 +- .../memory_access/memory_access.h | 16 +- .../hive_isp_css_include/memory_realloc.h | 2 +- .../css2400/hive_isp_css_include/mmu_device.h | 1 - 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.../kernels/norm/norm_1.0/ia_css_norm_param.h | 1 - .../isp/kernels/ob/ob2/ia_css_ob2.host.c | 11 +- .../isp/kernels/ob/ob2/ia_css_ob2.host.h | 6 +- .../isp/kernels/ob/ob2/ia_css_ob2_param.h | 9 +- .../isp/kernels/ob/ob2/ia_css_ob2_types.h | 1 - .../isp/kernels/ob/ob_1.0/ia_css_ob.host.c | 31 +- .../isp/kernels/ob/ob_1.0/ia_css_ob.host.h | 8 +- .../isp/kernels/ob/ob_1.0/ia_css_ob_param.h | 21 +- .../isp/kernels/ob/ob_1.0/ia_css_ob_types.h | 5 +- .../output/output_1.0/ia_css_output.host.c | 27 +- .../output/output_1.0/ia_css_output.host.h | 12 +- .../output/output_1.0/ia_css_output_param.h | 10 +- .../output/output_1.0/ia_css_output_types.h | 5 +- .../qplane/qplane_2/ia_css_qplane.host.c | 6 +- .../qplane/qplane_2/ia_css_qplane.host.h | 2 +- .../qplane/qplane_2/ia_css_qplane_param.h | 8 +- .../qplane/qplane_2/ia_css_qplane_types.h | 2 - .../isp/kernels/raw/raw_1.0/ia_css_raw.host.c | 11 +- .../isp/kernels/raw/raw_1.0/ia_css_raw.host.h | 2 +- .../kernels/raw/raw_1.0/ia_css_raw_param.h | 22 +- .../kernels/raw/raw_1.0/ia_css_raw_types.h | 3 +- .../raw_aa_binning_1.0/ia_css_raa.host.c | 2 +- .../raw_aa_binning_1.0/ia_css_raa.host.h | 2 +- .../isp/kernels/ref/ref_1.0/ia_css_ref.host.c | 12 +- .../isp/kernels/ref/ref_1.0/ia_css_ref.host.h | 4 +- .../kernels/ref/ref_1.0/ia_css_ref_param.h | 6 +- .../kernels/ref/ref_1.0/ia_css_ref_state.h | 4 +- .../kernels/ref/ref_1.0/ia_css_ref_types.h | 3 - .../isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c | 61 +- .../isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h | 14 +- .../kernels/s3a/s3a_1.0/ia_css_s3a_param.h | 19 +- .../kernels/s3a/s3a_1.0/ia_css_s3a_types.h | 60 +- .../isp/kernels/sc/sc_1.0/ia_css_sc.host.c | 23 +- .../isp/kernels/sc/sc_1.0/ia_css_sc.host.h | 8 +- .../isp/kernels/sc/sc_1.0/ia_css_sc_param.h | 6 +- .../isp/kernels/sc/sc_1.0/ia_css_sc_types.h | 24 +- .../sdis/common/ia_css_sdis_common.host.h | 22 +- .../sdis/common/ia_css_sdis_common_types.h | 30 +- .../kernels/sdis/sdis_1.0/ia_css_sdis.host.c | 119 +- .../kernels/sdis/sdis_1.0/ia_css_sdis.host.h | 34 +- .../kernels/sdis/sdis_1.0/ia_css_sdis_types.h | 8 +- .../kernels/sdis/sdis_2/ia_css_sdis2.host.c | 173 +- .../kernels/sdis/sdis_2/ia_css_sdis2.host.h | 24 +- .../kernels/sdis/sdis_2/ia_css_sdis2_types.h | 20 +- .../isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c | 10 +- .../isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h | 2 +- .../kernels/tdf/tdf_1.0/ia_css_tdf_param.h | 26 +- .../kernels/tdf/tdf_1.0/ia_css_tdf_types.h | 35 +- .../isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c | 19 +- .../isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h | 8 +- .../kernels/tnr/tnr_1.0/ia_css_tnr_param.h | 10 +- .../kernels/tnr/tnr_1.0/ia_css_tnr_state.h | 4 +- .../kernels/tnr/tnr_1.0/ia_css_tnr_types.h | 5 +- .../isp/kernels/vf/vf_1.0/ia_css_vf.host.c | 23 +- .../isp/kernels/vf/vf_1.0/ia_css_vf.host.h | 2 +- .../isp/kernels/vf/vf_1.0/ia_css_vf_param.h | 6 +- .../isp/kernels/vf/vf_1.0/ia_css_vf_types.h | 3 +- .../isp/kernels/wb/wb_1.0/ia_css_wb.host.c | 11 +- .../isp/kernels/wb/wb_1.0/ia_css_wb.host.h | 6 +- .../isp/kernels/wb/wb_1.0/ia_css_wb_param.h | 10 +- .../isp/kernels/wb/wb_1.0/ia_css_wb_types.h | 11 +- .../isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c | 11 +- .../isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h | 8 +- .../kernels/xnr/xnr_1.0/ia_css_xnr_param.h | 5 +- .../xnr/xnr_1.0/ia_css_xnr_table.host.c | 28 +- .../kernels/xnr/xnr_1.0/ia_css_xnr_types.h | 13 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3.host.c | 85 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3.host.h | 6 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3_param.h | 33 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3_types.h | 7 +- .../isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c | 32 +- .../isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h | 14 +- .../kernels/ynr/ynr_1.0/ia_css_ynr_param.h | 42 +- .../kernels/ynr/ynr_1.0/ia_css_ynr_state.h | 2 +- .../kernels/ynr/ynr_1.0/ia_css_ynr_types.h | 1 - .../isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c | 27 +- .../isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h | 12 +- .../isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h | 34 +- .../isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h | 35 +- .../css2400/isp/modes/interface/isp_const.h | 31 +- .../css2400/isp/modes/interface/isp_types.h | 20 +- .../pci/atomisp2/css2400/memory_realloc.c | 11 +- .../css2400/runtime/binary/src/binary.c | 161 +- .../runtime/bufq/interface/ia_css_bufq.h | 16 +- .../runtime/bufq/interface/ia_css_bufq_comm.h | 4 +- .../atomisp2/css2400/runtime/bufq/src/bufq.c | 40 +- .../runtime/debug/interface/ia_css_debug.h | 3 +- .../debug/interface/ia_css_debug_pipe.h | 11 +- .../css2400/runtime/debug/src/ia_css_debug.c | 251 ++- .../runtime/event/interface/ia_css_event.h | 6 +- .../css2400/runtime/event/src/event.c | 15 +- .../runtime/eventq/interface/ia_css_eventq.h | 6 +- .../css2400/runtime/eventq/src/eventq.c | 14 +- .../frame/interface/ia_css_frame_comm.h | 7 +- .../css2400/runtime/frame/src/frame.c | 75 +- .../css2400/runtime/ifmtr/src/ifmtr.c | 30 +- .../css2400/runtime/inputfifo/src/inputfifo.c | 71 +- .../isp_param/interface/ia_css_isp_param.h | 2 +- .../interface/ia_css_isp_param_types.h | 9 +- .../css2400/runtime/isp_param/src/isp_param.c | 20 +- .../runtime/isys/interface/ia_css_isys.h | 41 +- .../runtime/isys/interface/ia_css_isys_comm.h | 2 +- .../css2400/runtime/isys/src/csi_rx_rmgr.c | 20 +- .../css2400/runtime/isys/src/csi_rx_rmgr.h | 9 +- .../css2400/runtime/isys/src/ibuf_ctrl_rmgr.c | 12 +- .../css2400/runtime/isys/src/ibuf_ctrl_rmgr.h | 13 +- .../css2400/runtime/isys/src/isys_dma_rmgr.c | 4 +- .../css2400/runtime/isys/src/isys_dma_rmgr.h | 5 +- .../css2400/runtime/isys/src/isys_init.c | 4 +- .../runtime/isys/src/isys_stream2mmio_rmgr.c | 8 +- .../runtime/isys/src/isys_stream2mmio_rmgr.h | 5 +- .../atomisp2/css2400/runtime/isys/src/rx.c | 28 +- .../css2400/runtime/isys/src/virtual_isys.c | 124 +- .../css2400/runtime/isys/src/virtual_isys.h | 1 - .../pipeline/interface/ia_css_pipeline.h | 18 +- .../interface/ia_css_pipeline_common.h | 1 + .../css2400/runtime/pipeline/src/pipeline.c | 88 +- .../runtime/queue/interface/ia_css_queue.h | 29 +- .../queue/interface/ia_css_queue_comm.h | 10 +- .../css2400/runtime/queue/src/queue.c | 48 +- .../css2400/runtime/queue/src/queue_access.c | 14 +- .../css2400/runtime/queue/src/queue_access.h | 24 +- .../runtime/rmgr/interface/ia_css_rmgr_vbuf.h | 12 +- .../css2400/runtime/rmgr/src/rmgr_vbuf.c | 51 +- .../runtime/spctrl/interface/ia_css_spctrl.h | 18 +- .../spctrl/interface/ia_css_spctrl_comm.h | 8 +- .../css2400/runtime/spctrl/src/spctrl.c | 15 +- .../tagger/interface/ia_css_tagger_common.h | 10 +- .../css2400/runtime/timer/src/timer.c | 6 +- .../atomisp/pci/atomisp2/css2400/sh_css.c | 1129 +++++++------ .../pci/atomisp2/css2400/sh_css_defs.h | 31 +- .../pci/atomisp2/css2400/sh_css_firmware.c | 33 +- .../pci/atomisp2/css2400/sh_css_firmware.h | 4 +- .../pci/atomisp2/css2400/sh_css_frac.h | 24 +- .../atomisp/pci/atomisp2/css2400/sh_css_hrt.c | 5 +- .../pci/atomisp2/css2400/sh_css_internal.h | 210 +-- .../pci/atomisp2/css2400/sh_css_legacy.h | 3 +- .../pci/atomisp2/css2400/sh_css_metrics.c | 17 +- .../pci/atomisp2/css2400/sh_css_metrics.h | 14 +- .../pci/atomisp2/css2400/sh_css_mipi.c | 55 +- .../atomisp/pci/atomisp2/css2400/sh_css_mmu.c | 2 + .../pci/atomisp2/css2400/sh_css_param_dvs.c | 66 +- .../pci/atomisp2/css2400/sh_css_param_dvs.h | 2 - .../atomisp2/css2400/sh_css_param_shading.c | 68 +- .../atomisp2/css2400/sh_css_param_shading.h | 1 - .../pci/atomisp2/css2400/sh_css_params.c | 1501 ++++++++--------- .../pci/atomisp2/css2400/sh_css_params.h | 5 +- .../pci/atomisp2/css2400/sh_css_properties.c | 4 +- .../atomisp/pci/atomisp2/css2400/sh_css_sp.c | 179 +- .../atomisp/pci/atomisp2/css2400/sh_css_sp.h | 17 +- .../pci/atomisp2/css2400/sh_css_struct.h | 3 +- .../atomisp/pci/atomisp2/css2400/sh_css_uds.h | 12 +- .../media/atomisp/pci/atomisp2/hmm/hmm.c | 2 +- .../media/atomisp/pci/atomisp2/hmm/hmm_bo.c | 44 +- .../pci/atomisp2/hmm/hmm_reserved_pool.c | 6 +- .../media/atomisp/pci/atomisp2/hmm/hmm_vm.c | 2 +- .../hrt/hive_isp_css_custom_host_hrt.h | 21 +- .../pci/atomisp2/hrt/hive_isp_css_mm_hrt.c | 23 +- .../pci/atomisp2/hrt/hive_isp_css_mm_hrt.h | 2 +- .../atomisp/pci/atomisp2/include/hmm/hmm_bo.h | 4 - .../atomisp/pci/atomisp2/include/hmm/hmm_vm.h | 1 + .../pci/atomisp2/include/mmu/isp_mmu.h | 16 +- .../media/atomisp/pci/atomisp2/mmu/isp_mmu.c | 21 +- .../atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c | 2 + .../intel-mid/atomisp_gmin_platform.c | 2 +- 586 files changed, 8850 insertions(+), 9545 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c index f2991fbcb1d60..404dc5187749c 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -239,6 +239,7 @@ static int gc0310_write_reg_array(struct i2c_client *client, return __gc0310_flush_reg_array(client, &ctrl); } + static int gc0310_g_focal(struct v4l2_subdev *sd, s32 *val) { *val = (GC0310_FOCAL_LENGTH_NUM << 16) | GC0310_FOCAL_LENGTH_DEM; @@ -499,6 +500,7 @@ static long gc0310_s_exposure(struct v4l2_subdev *sd, /* we should not accept the invalid value below. */ if (gain == 0) { struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); return -EINVAL; } @@ -520,7 +522,6 @@ static int gc0310_h_flip(struct v4l2_subdev *sd, s32 value) static long gc0310_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { - switch (cmd) { case ATOMISP_IOC_S_EXPOSURE: return gc0310_s_exposure(sd, arg); @@ -734,6 +735,7 @@ static int power_ctrl(struct v4l2_subdev *sd, bool flag) { int ret = 0; struct gc0310_device *dev = to_gc0310_sensor(sd); + if (!dev || !dev->platform_data) return -ENODEV; @@ -783,7 +785,6 @@ static int gpio_ctrl(struct v4l2_subdev *sd, bool flag) return ret; } - static int power_down(struct v4l2_subdev *sd); static int power_up(struct v4l2_subdev *sd) @@ -867,6 +868,7 @@ static int power_down(struct v4l2_subdev *sd) static int gc0310_s_power(struct v4l2_subdev *sd, int on) { int ret; + if (on == 0) return power_down(sd); else { @@ -899,9 +901,9 @@ static int distance(struct gc0310_resolution *res, u32 w, u32 h) h_ratio = (res->height << 13) / h; if (h_ratio == 0) return -1; - match = abs(((w_ratio << 13) / h_ratio) - ((int)8192)); + match = abs(((w_ratio << 13) / h_ratio) - 8192); - if ((w_ratio < (int)8192) || (h_ratio < (int)8192) || + if ((w_ratio < 8192) || (h_ratio < 8192) || (match > LARGEST_ALLOWED_RATIO_MISMATCH)) return -1; @@ -947,7 +949,6 @@ static int get_resolution_index(int w, int h) return -1; } - /* TODO: remove it. */ static int startup(struct v4l2_subdev *sd) { @@ -977,6 +978,7 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, struct camera_mipi_info *gc0310_info = NULL; int ret = 0; int idx = 0; + pr_info("%s S\n", __func__); if (format->pad) @@ -1015,7 +1017,7 @@ static int gc0310_set_fmt(struct v4l2_subdev *sd, return -EINVAL; } - printk("%s: before gc0310_write_reg_array %s\n", __FUNCTION__, + printk("%s: before gc0310_write_reg_array %s\n", __func__, gc0310_res[dev->fmt_idx].desc); ret = startup(sd); if (ret) { @@ -1079,7 +1081,7 @@ static int gc0310_detect(struct i2c_client *client) dev_err(&client->dev, "read sensor_id_low failed\n"); return -ENODEV; } - id = ((((u16) high) << 8) | (u16) low); + id = ((((u16)high) << 8) | (u16)low); pr_info("sensor ID = 0x%x\n", id); if (id != GC0310_ID) { @@ -1140,7 +1142,6 @@ static int gc0310_s_stream(struct v4l2_subdev *sd, int enable) return ret; } - static int gc0310_s_config(struct v4l2_subdev *sd, int irq, void *platform_data) { @@ -1241,10 +1242,8 @@ static int gc0310_enum_frame_size(struct v4l2_subdev *sd, fse->max_height = gc0310_res[index].height; return 0; - } - static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) { struct gc0310_device *dev = to_gc0310_sensor(sd); @@ -1288,6 +1287,7 @@ static int gc0310_remove(struct i2c_client *client) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct gc0310_device *dev = to_gc0310_sensor(sd); + dev_dbg(&client->dev, "gc0310_remove...\n"); dev->platform_data->csi_cfg(sd, 0); @@ -1315,7 +1315,7 @@ static int gc0310_probe(struct i2c_client *client) mutex_init(&dev->input_lock); dev->fmt_idx = 0; - v4l2_i2c_subdev_init(&(dev->sd), client, &gc0310_ops); + v4l2_i2c_subdev_init(&dev->sd, client, &gc0310_ops); pdata = gmin_camera_platform_data(&dev->sd, ATOMISP_INPUT_FORMAT_RAW_8, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c index 4b6b6568b3cf3..b7f2e7b494bbd 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -168,6 +168,7 @@ static int __gc2235_buf_reg_array(struct i2c_client *client, return 0; } + static int __gc2235_write_reg_is_consecutive(struct i2c_client *client, struct gc2235_write_ctrl *ctrl, const struct gc2235_reg *next) @@ -177,6 +178,7 @@ static int __gc2235_write_reg_is_consecutive(struct i2c_client *client, return ctrl->buffer.addr + ctrl->index == next->reg; } + static int gc2235_write_reg_array(struct i2c_client *client, const struct gc2235_reg *reglist) { @@ -238,7 +240,6 @@ static int gc2235_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) return 0; } - static int gc2235_get_intg_factor(struct i2c_client *client, struct camera_mipi_info *info, const struct gc2235_resolution *res) @@ -355,6 +356,7 @@ static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg, u16 coarse_integration = (u16)coarse_itg; int ret = 0; u16 expo_coarse_h, expo_coarse_l, gain_val = 0xF0, gain_val2 = 0xF0; + expo_coarse_h = coarse_integration >> 8; expo_coarse_l = coarse_integration & 0xff; @@ -382,7 +384,6 @@ static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg, return ret; } - static int gc2235_set_exposure(struct v4l2_subdev *sd, int exposure, int gain, int digitgain) { @@ -406,12 +407,14 @@ static long gc2235_s_exposure(struct v4l2_subdev *sd, /* we should not accept the invalid value below. */ if (gain == 0) { struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); return -EINVAL; } return gc2235_set_exposure(sd, exp, gain, digitgain); } + static long gc2235_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { switch (cmd) { @@ -422,6 +425,7 @@ static long gc2235_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) } return 0; } + /* This returns the exposure time being used. This should only be used * for filling in EXIF data, not for actual image processing. */ @@ -739,6 +743,7 @@ static int startup(struct v4l2_subdev *sd) struct gc2235_device *dev = to_gc2235_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); int ret = 0; + if (is_init == 0) { /* force gc2235 to do a reset in res change, otherwise it * can not output normal after switching res. and it is not @@ -764,7 +769,6 @@ static int gc2235_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *format) { - struct v4l2_mbus_framefmt *fmt = &format->format; struct gc2235_device *dev = to_gc2235_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); @@ -873,6 +877,7 @@ static int gc2235_s_stream(struct v4l2_subdev *sd, int enable) struct gc2235_device *dev = to_gc2235_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; + mutex_lock(&dev->input_lock); if (enable) @@ -884,7 +889,6 @@ static int gc2235_s_stream(struct v4l2_subdev *sd, int enable) return ret; } - static int gc2235_s_config(struct v4l2_subdev *sd, int irq, void *platform_data) { @@ -983,7 +987,6 @@ static int gc2235_enum_frame_size(struct v4l2_subdev *sd, fse->max_height = gc2235_res[index].height; return 0; - } static int gc2235_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) @@ -1029,6 +1032,7 @@ static int gc2235_remove(struct i2c_client *client) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct gc2235_device *dev = to_gc2235_sensor(sd); + dev_dbg(&client->dev, "gc2235_remove...\n"); dev->platform_data->csi_cfg(sd, 0); @@ -1055,7 +1059,7 @@ static int gc2235_probe(struct i2c_client *client) mutex_init(&dev->input_lock); dev->fmt_idx = 0; - v4l2_i2c_subdev_init(&(dev->sd), client, &gc2235_ops); + v4l2_i2c_subdev_init(&dev->sd, client, &gc2235_ops); gcpdev = gmin_camera_platform_data(&dev->sd, ATOMISP_INPUT_FORMAT_RAW_10, diff --git a/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c index 81e5ec0c2b64c..1d8db57812ace 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c @@ -22,26 +22,26 @@ /* Tagged binary data container structure definitions. */ struct tbd_header { - uint32_t tag; /*!< Tag identifier, also checks endianness */ - uint32_t size; /*!< Container size including this header */ - uint32_t version; /*!< Version, format 0xYYMMDDVV */ - uint32_t revision; /*!< Revision, format 0xYYMMDDVV */ - uint32_t config_bits; /*!< Configuration flag bits set */ - uint32_t checksum; /*!< Global checksum, header included */ + u32 tag; /*!< Tag identifier, also checks endianness */ + u32 size; /*!< Container size including this header */ + u32 version; /*!< Version, format 0xYYMMDDVV */ + u32 revision; /*!< Revision, format 0xYYMMDDVV */ + u32 config_bits; /*!< Configuration flag bits set */ + u32 checksum; /*!< Global checksum, header included */ } __packed; struct tbd_record_header { - uint32_t size; /*!< Size of record including header */ - uint8_t format_id; /*!< tbd_format_t enumeration values used */ - uint8_t packing_key; /*!< Packing method; 0 = no packing */ - uint16_t class_id; /*!< tbd_class_t enumeration values used */ + u32 size; /*!< Size of record including header */ + u8 format_id; /*!< tbd_format_t enumeration values used */ + u8 packing_key; /*!< Packing method; 0 = no packing */ + u16 class_id; /*!< tbd_class_t enumeration values used */ } __packed; struct tbd_data_record_header { - uint16_t next_offset; - uint16_t flags; - uint16_t data_offset; - uint16_t data_size; + u16 next_offset; + u16 flags; + u16 data_offset; + u16 data_size; } __packed; #define TBD_CLASS_DRV_ID 2 @@ -58,7 +58,8 @@ static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr, * followed by lobyte) where the remaining data in the sequence * will be written. */ - uint8_t *ptr = bufptr; + u8 *ptr = bufptr; + while (ptr < bufptr + size) { struct i2c_msg msg = { .addr = client->addr, @@ -88,7 +89,7 @@ static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr, static int parse_and_apply(struct i2c_client *client, uint8_t *buffer, unsigned int size) { - uint8_t *endptr8 = buffer + size; + u8 *endptr8 = buffer + size; struct tbd_data_record_header *header = (struct tbd_data_record_header *)buffer; @@ -170,6 +171,7 @@ int load_msr_list(struct i2c_client *client, char *name, const struct firmware **fw) { int ret = request_firmware(fw, name, &client->dev); + if (ret) { dev_err(&client->dev, "Error %d while requesting firmware %s\n", diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c index 7098bf317f164..7edaf50a6febd 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c @@ -46,14 +46,14 @@ #define LM3554_CURRENT_LIMIT_SHIFT 5 #define LM3554_FLAGS_REG 0xD0 -#define LM3554_FLAG_TIMEOUT (1 << 0) -#define LM3554_FLAG_THERMAL_SHUTDOWN (1 << 1) -#define LM3554_FLAG_LED_FAULT (1 << 2) -#define LM3554_FLAG_TX1_INTERRUPT (1 << 3) -#define LM3554_FLAG_TX2_INTERRUPT (1 << 4) -#define LM3554_FLAG_LED_THERMAL_FAULT (1 << 5) -#define LM3554_FLAG_UNUSED (1 << 6) -#define LM3554_FLAG_INPUT_VOLTAGE_LOW (1 << 7) +#define LM3554_FLAG_TIMEOUT BIT(0) +#define LM3554_FLAG_THERMAL_SHUTDOWN BIT(1) +#define LM3554_FLAG_LED_FAULT BIT(2) +#define LM3554_FLAG_TX1_INTERRUPT BIT(3) +#define LM3554_FLAG_TX2_INTERRUPT BIT(4) +#define LM3554_FLAG_LED_THERMAL_FAULT BIT(5) +#define LM3554_FLAG_UNUSED BIT(6) +#define LM3554_FLAG_INPUT_VOLTAGE_LOW BIT(7) #define LM3554_CONFIG_REG_1 0xE0 #define LM3554_ENVM_TX2_SHIFT 5 @@ -881,7 +881,6 @@ static int lm3554_probe(struct i2c_client *client) NULL); if (flash->ctrl_handler.error) { - dev_err(&client->dev, "ctrl_handler error.\n"); goto fail2; } diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c index 8e180f9033359..56e5ac0c5fa8f 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -73,8 +73,8 @@ mt9m114_read_reg(struct i2c_client *client, u16 data_length, u32 reg, u32 *val) msg[0].buf = data; /* high byte goes out first */ - data[0] = (u16) (reg >> 8); - data[1] = (u16) (reg & 0xff); + data[0] = (u16)(reg >> 8); + data[1] = (u16)(reg & 0xff); msg[1].addr = client->addr; msg[1].len = data_length; @@ -239,7 +239,6 @@ misensor_rmw_reg(struct i2c_client *client, u16 data_length, u16 reg, return 0; } - static int __mt9m114_flush_reg_array(struct i2c_client *client, struct mt9m114_write_ctrl *ctrl) { @@ -428,12 +427,12 @@ static int mt9m114_wait_state(struct i2c_client *client, int timeout) } return -EINVAL; - } static int mt9m114_set_suspend(struct v4l2_subdev *sd) { struct i2c_client *client = v4l2_get_subdevdata(sd); + return mt9m114_write_reg_array(client, mt9m114_standby_reg, POST_POLLING); } @@ -499,7 +498,7 @@ static int power_up(struct v4l2_subdev *sd) struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - if (NULL == dev->platform_data) { + if (!dev->platform_data) { dev_err(&client->dev, "no camera_sensor_platform_data"); return -ENODEV; } @@ -541,7 +540,7 @@ static int power_down(struct v4l2_subdev *sd) struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - if (NULL == dev->platform_data) { + if (!dev->platform_data) { dev_err(&client->dev, "no camera_sensor_platform_data"); return -ENODEV; } @@ -704,9 +703,9 @@ static int mt9m114_res2size(struct v4l2_subdev *sd, int *h_size, int *v_size) return -EINVAL; } - if (h_size != NULL) + if (h_size) *h_size = hsize; - if (v_size != NULL) + if (v_size) *v_size = vsize; return 0; @@ -720,7 +719,7 @@ static int mt9m114_get_intg_factor(struct i2c_client *client, u32 reg_val; int ret; - if (info == NULL) + if (!info) return -EINVAL; ret = mt9m114_read_reg(client, MISENSOR_32BIT, @@ -807,6 +806,7 @@ static int mt9m114_get_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt = &format->format; int width, height; int ret; + if (format->pad) return -EINVAL; fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; @@ -833,13 +833,14 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, struct camera_mipi_info *mt9m114_info = NULL; int ret; + if (format->pad) return -EINVAL; dev->streamon = 0; dev->first_exp = MT9M114_DEFAULT_FIRST_EXP; mt9m114_info = v4l2_get_subdev_hostdata(sd); - if (mt9m114_info == NULL) + if (!mt9m114_info) return -EINVAL; mt9m114_try_res(&width, &height); @@ -964,6 +965,7 @@ static int mt9m114_g_hflip(struct v4l2_subdev *sd, s32 *val) struct i2c_client *c = v4l2_get_subdevdata(sd); int ret; u32 data; + ret = mt9m114_read_reg(c, MISENSOR_16BIT, (u32)MISENSOR_READ_MODE, &data); if (ret) @@ -1082,7 +1084,6 @@ static long mt9m114_s_exposure(struct v4l2_subdev *sd, static long mt9m114_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { - switch (cmd) { case ATOMISP_IOC_S_EXPOSURE: return mt9m114_s_exposure(sd, arg); @@ -1110,6 +1111,7 @@ static int mt9m114_g_exposure(struct v4l2_subdev *sd, s32 *value) *value = coarse; return 0; } + #ifndef CSS15 /* * This function will return the sensor supported max exposure zone number. @@ -1563,7 +1565,7 @@ mt9m114_s_config(struct v4l2_subdev *sd, int irq, void *platform_data) struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - if (NULL == platform_data) + if (!platform_data) return -ENODEV; dev->platform_data = @@ -1738,7 +1740,6 @@ static int mt9m114_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_frame_size_enum *fse) { - unsigned int index = fse->index; if (index >= N_RES) @@ -1757,7 +1758,7 @@ static int mt9m114_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) int index; struct mt9m114_device *snr = to_mt9m114_sensor(sd); - if (frames == NULL) + if (!frames) return -EINVAL; for (index = 0; index < N_RES; index++) { diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index bba3d17459084..89169da512346 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -34,8 +34,8 @@ #include "ov2680.h" -static int h_flag = 0; -static int v_flag = 0; +static int h_flag; +static int v_flag; static enum atomisp_bayer_order ov2680_bayer_order_mapping[] = { atomisp_bayer_order_bggr, atomisp_bayer_order_grbg, @@ -64,7 +64,7 @@ static int ov2680_read_reg(struct i2c_client *client, return -EINVAL; } - memset(msg, 0 , sizeof(msg)); + memset(msg, 0, sizeof(msg)); msg[0].addr = client->addr; msg[0].flags = 0; @@ -235,6 +235,7 @@ static int ov2680_write_reg_array(struct i2c_client *client, const struct ov2680_reg *next = reglist; struct ov2680_write_ctrl ctrl; int err; + dev_dbg(&client->dev, "++++write reg array\n"); ctrl.index = 0; for (; next->type != OV2680_TOK_TERM; next++) { @@ -250,7 +251,7 @@ static int ov2680_write_reg_array(struct i2c_client *client, * If next address is not consecutive, data needs to be * flushed before proceed. */ - dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg,next->val); + dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg, next->val); if (!__ov2680_write_reg_is_consecutive(client, &ctrl, next)) { err = __ov2680_flush_reg_array(client, &ctrl); @@ -269,9 +270,9 @@ static int ov2680_write_reg_array(struct i2c_client *client, return __ov2680_flush_reg_array(client, &ctrl); } + static int ov2680_g_focal(struct v4l2_subdev *sd, s32 *val) { - *val = (OV2680_FOCAL_LENGTH_NUM << 16) | OV2680_FOCAL_LENGTH_DEM; return 0; } @@ -296,6 +297,7 @@ static int ov2680_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) { struct ov2680_device *dev = to_ov2680_sensor(sd); struct i2c_client *client = v4l2_get_subdevdata(sd); + dev_dbg(&client->dev, "++++ov2680_g_bin_factor_x\n"); *val = ov2680_res[dev->fmt_idx].bin_factor_x; @@ -312,7 +314,6 @@ static int ov2680_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) return 0; } - static int ov2680_get_intg_factor(struct i2c_client *client, struct camera_mipi_info *info, const struct ov2680_resolution *res) @@ -323,6 +324,7 @@ static int ov2680_get_intg_factor(struct i2c_client *client, unsigned int pix_clk_freq_hz; u16 reg_val; int ret; + dev_dbg(&client->dev, "++++ov2680_get_intg_factor\n"); if (!info) return -EINVAL; @@ -398,7 +400,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, struct i2c_client *client = v4l2_get_subdevdata(sd); struct ov2680_device *dev = to_ov2680_sensor(sd); u16 vts; - int ret,exp_val; + int ret, exp_val; dev_dbg(&client->dev, "+++++++__ov2680_set_exposure coarse_itg %d, gain %d, digitgain %d++\n", @@ -408,7 +410,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* group hold */ ret = ov2680_write_reg(client, OV2680_8BIT, - OV2680_GROUP_ACCESS, 0x00); + OV2680_GROUP_ACCESS, 0x00); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV2680_GROUP_ACCESS); @@ -417,7 +419,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* Increase the VTS to match exposure + MARGIN */ if (coarse_itg > vts - OV2680_INTEGRATION_TIME_MARGIN) - vts = (u16) coarse_itg + OV2680_INTEGRATION_TIME_MARGIN; + vts = (u16)coarse_itg + OV2680_INTEGRATION_TIME_MARGIN; ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_TIMING_VTS_H, vts); if (ret) { @@ -525,6 +527,7 @@ static long ov2680_s_exposure(struct v4l2_subdev *sd, /* we should not accept the invalid value below */ if (analog_gain == 0) { struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); return -EINVAL; } @@ -533,13 +536,8 @@ static long ov2680_s_exposure(struct v4l2_subdev *sd, return ov2680_set_exposure(sd, coarse_itg, analog_gain, digital_gain); } - - - - static long ov2680_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { - switch (cmd) { case ATOMISP_IOC_S_EXPOSURE: return ov2680_s_exposure(sd, arg); @@ -607,6 +605,7 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) int ret; u16 val; u8 index; + dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_FLIP_REG, &val); if (ret) @@ -620,7 +619,7 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) OV2680_FLIP_REG, val); if (ret) return ret; - index = (v_flag>0?OV2680_FLIP_BIT:0) | (h_flag>0?OV2680_MIRROR_BIT:0); + index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : 0); ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; @@ -638,6 +637,7 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) int ret; u16 val; u8 index; + dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_MIRROR_REG, &val); @@ -652,7 +652,7 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) OV2680_MIRROR_REG, val); if (ret) return ret; - index = (v_flag>0?OV2680_FLIP_BIT:0) | (h_flag>0?OV2680_MIRROR_BIT:0); + index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : 0); ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; @@ -846,6 +846,7 @@ static int power_ctrl(struct v4l2_subdev *sd, bool flag) { int ret = 0; struct ov2680_device *dev = to_ov2680_sensor(sd); + if (!dev || !dev->platform_data) return -ENODEV; @@ -973,7 +974,7 @@ static int ov2680_s_power(struct v4l2_subdev *sd, int on) { int ret; - if (on == 0){ + if (on == 0) { ret = power_down(sd); } else { ret = power_up(sd); @@ -1005,10 +1006,9 @@ static int distance(struct ov2680_resolution *res, u32 w, u32 h) h_ratio = (res->height << 13) / h; if (h_ratio == 0) return -1; - match = abs(((w_ratio << 13) / h_ratio) - ((int)8192)); - + match = abs(((w_ratio << 13) / h_ratio) - 8192); - if ((w_ratio < (int)8192) || (h_ratio < (int)8192) || + if ((w_ratio < 8192) || (h_ratio < 8192) || (match > LARGEST_ALLOWED_RATIO_MISMATCH)) return -1; @@ -1064,6 +1064,7 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, struct camera_mipi_info *ov2680_info = NULL; int ret = 0; int idx = 0; + dev_dbg(&client->dev, "+++++ov2680_s_mbus_fmt+++++l\n"); if (format->pad) return -EINVAL; @@ -1123,7 +1124,7 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, if (v_flag) ov2680_v_flip(sd, v_flag); - v4l2_info(client, "\n%s idx %d \n", __func__, dev->fmt_idx); + v4l2_info(client, "\n%s idx %d\n", __func__, dev->fmt_idx); /*ret = startup(sd); * if (ret) @@ -1173,7 +1174,7 @@ static int ov2680_detect(struct i2c_client *client) } ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_SC_CMMN_CHIP_ID_L, &low); - id = ((((u16) high) << 8) | (u16) low); + id = ((((u16)high) << 8) | (u16)low); if (id != OV2680_ID) { dev_err(&client->dev, "sensor ID error 0x%x\n", id); @@ -1182,7 +1183,7 @@ static int ov2680_detect(struct i2c_client *client) ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_SC_CMMN_SUB_ID, &high); - revision = (u8) high & 0x0f; + revision = (u8)high & 0x0f; dev_info(&client->dev, "sensor_revision id = 0x%x, rev= %d\n", id, revision); @@ -1197,10 +1198,10 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) int ret; mutex_lock(&dev->input_lock); - if(enable ) - dev_dbg(&client->dev, "ov2680_s_stream one \n"); + if (enable) + dev_dbg(&client->dev, "ov2680_s_stream one\n"); else - dev_dbg(&client->dev, "ov2680_s_stream off \n"); + dev_dbg(&client->dev, "ov2680_s_stream off\n"); ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_SW_STREAM, enable ? OV2680_START_STREAMING : @@ -1220,7 +1221,6 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) return ret; } - static int ov2680_s_config(struct v4l2_subdev *sd, int irq, void *platform_data) { @@ -1319,7 +1319,6 @@ static int ov2680_enum_frame_size(struct v4l2_subdev *sd, fse->max_height = ov2680_res[index].height; return 0; - } static int ov2680_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) @@ -1365,6 +1364,7 @@ static int ov2680_remove(struct i2c_client *client) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct ov2680_device *dev = to_ov2680_sensor(sd); + dev_dbg(&client->dev, "ov2680_remove...\n"); dev->platform_data->csi_cfg(sd, 0); @@ -1391,7 +1391,7 @@ static int ov2680_probe(struct i2c_client *client) mutex_init(&dev->input_lock); dev->fmt_idx = 0; - v4l2_i2c_subdev_init(&(dev->sd), client, &ov2680_ops); + v4l2_i2c_subdev_init(&dev->sd, client, &ov2680_ops); pdata = gmin_camera_platform_data(&dev->sd, ATOMISP_INPUT_FORMAT_RAW_10, @@ -1399,7 +1399,7 @@ static int ov2680_probe(struct i2c_client *client) if (!pdata) { ret = -EINVAL; goto out_free; - } + } ret = ov2680_s_config(&dev->sd, client->irq, pdata); if (ret) @@ -1438,11 +1438,11 @@ static int ov2680_probe(struct i2c_client *client) if (ret) { ov2680_remove(client); - dev_dbg(&client->dev, "+++ remove ov2680 \n"); + dev_dbg(&client->dev, "+++ remove ov2680\n"); } return ret; out_free: - dev_dbg(&client->dev, "+++ out free \n"); + dev_dbg(&client->dev, "+++ out free\n"); v4l2_device_unregister_subdev(&dev->sd); kfree(dev); return ret; diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c index a362eebd882f7..a85bbd02331de 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -55,7 +55,7 @@ static int ov2722_read_reg(struct i2c_client *client, return -EINVAL; } - memset(msg, 0 , sizeof(msg)); + memset(msg, 0, sizeof(msg)); msg[0].addr = client->addr; msg[0].flags = 0; @@ -259,6 +259,7 @@ static int ov2722_write_reg_array(struct i2c_client *client, return __ov2722_flush_reg_array(client, &ctrl); } + static int ov2722_g_focal(struct v4l2_subdev *sd, s32 *val) { *val = (OV2722_FOCAL_LENGTH_NUM << 16) | OV2722_FOCAL_LENGTH_DEM; @@ -318,7 +319,7 @@ static int ov2722_get_intg_factor(struct i2c_client *client, return ret; pre_pll_clk_div = (pre_pll_clk_div & 0x70) >> 4; - if (0 == pre_pll_clk_div) + if (!pre_pll_clk_div) return -EINVAL; pll_multiplier = pll_multiplier & 0x7f; @@ -481,6 +482,7 @@ static long ov2722_s_exposure(struct v4l2_subdev *sd, /* we should not accept the invalid value below. */ if (gain == 0) { struct i2c_client *client = v4l2_get_subdevdata(sd); + v4l2_err(client, "%s: invalid value\n", __func__); return -EINVAL; } @@ -490,7 +492,6 @@ static long ov2722_s_exposure(struct v4l2_subdev *sd, static long ov2722_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { - switch (cmd) { case ATOMISP_IOC_S_EXPOSURE: return ov2722_s_exposure(sd, arg); @@ -540,6 +541,7 @@ static int ov2722_g_volatile_ctrl(struct v4l2_ctrl *ctrl) container_of(ctrl->handler, struct ov2722_device, ctrl_handler); int ret = 0; unsigned int val; + switch (ctrl->id) { case V4L2_CID_EXPOSURE_ABSOLUTE: ret = ov2722_q_exposure(&dev->sd, &ctrl->val); @@ -768,6 +770,7 @@ static int power_down(struct v4l2_subdev *sd) static int ov2722_s_power(struct v4l2_subdev *sd, int on) { int ret; + if (on == 0) return power_down(sd); else { @@ -881,6 +884,7 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, struct camera_mipi_info *ov2722_info = NULL; int ret = 0; int idx; + if (format->pad) return -EINVAL; if (!fmt) @@ -919,6 +923,7 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, ret = startup(sd); if (ret) { int i = 0; + dev_err(&client->dev, "ov2722 startup err, retry to power up\n"); for (i = 0; i < OV2722_POWER_UP_RETRY_NUM; i++) { dev_err(&client->dev, @@ -953,6 +958,7 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, mutex_unlock(&dev->input_lock); return ret; } + static int ov2722_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *format) @@ -1000,7 +1006,7 @@ static int ov2722_detect(struct i2c_client *client) ret = ov2722_read_reg(client, OV2722_8BIT, OV2722_SC_CMMN_SUB_ID, &high); - revision = (u8) high & 0x0f; + revision = (u8)high & 0x0f; dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); dev_dbg(&client->dev, "detect ov2722 success\n"); @@ -1122,10 +1128,8 @@ static int ov2722_enum_frame_size(struct v4l2_subdev *sd, fse->max_height = ov2722_res[index].height; return 0; - } - static int ov2722_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) { struct ov2722_device *dev = to_ov2722_sensor(sd); @@ -1169,6 +1173,7 @@ static int ov2722_remove(struct i2c_client *client) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct ov2722_device *dev = to_ov2722_sensor(sd); + dev_dbg(&client->dev, "ov2722_remove...\n"); dev->platform_data->csi_cfg(sd, 0); @@ -1187,6 +1192,7 @@ static int __ov2722_init_ctrl_handler(struct ov2722_device *dev) { struct v4l2_ctrl_handler *hdl; unsigned int i; + hdl = &dev->ctrl_handler; v4l2_ctrl_handler_init(&dev->ctrl_handler, ARRAY_SIZE(ov2722_controls)); for (i = 0; i < ARRAY_SIZE(ov2722_controls); i++) @@ -1216,7 +1222,7 @@ static int ov2722_probe(struct i2c_client *client) mutex_init(&dev->input_lock); dev->fmt_idx = 0; - v4l2_i2c_subdev_init(&(dev->sd), client, &ov2722_ops); + v4l2_i2c_subdev_init(&dev->sd, client, &ov2722_ops); ovpdev = gmin_camera_platform_data(&dev->sd, ATOMISP_INPUT_FORMAT_RAW_10, diff --git a/drivers/staging/media/atomisp/i2c/gc0310.h b/drivers/staging/media/atomisp/i2c/gc0310.h index 0743b3b2ea665..12f746e7828bb 100644 --- a/drivers/staging/media/atomisp/i2c/gc0310.h +++ b/drivers/staging/media/atomisp/i2c/gc0310.h @@ -396,9 +396,9 @@ static struct gc0310_resolution gc0310_res_preview[] = { .regs = gc0310_VGA_30fps, }, }; + #define N_RES_PREVIEW (ARRAY_SIZE(gc0310_res_preview)) static struct gc0310_resolution *gc0310_res = gc0310_res_preview; static unsigned long N_RES = N_RES_PREVIEW; #endif - diff --git a/drivers/staging/media/atomisp/i2c/gc2235.h b/drivers/staging/media/atomisp/i2c/gc2235.h index 54bf7812b27a0..bb104de61af99 100644 --- a/drivers/staging/media/atomisp/i2c/gc2235.h +++ b/drivers/staging/media/atomisp/i2c/gc2235.h @@ -286,6 +286,7 @@ static struct gc2235_reg const gc2235_init_settings[] = { { GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */ { GC2235_TOK_TERM, 0, 0 } }; + /* * Register settings for various resolution */ @@ -530,7 +531,6 @@ static struct gc2235_reg const gc2235_1616_1216_30fps[] = { }; static struct gc2235_resolution gc2235_res_preview[] = { - { .desc = "gc2235_1600_900_30fps", .width = 1600, @@ -579,6 +579,7 @@ static struct gc2235_resolution gc2235_res_preview[] = { }, }; + #define N_RES_PREVIEW (ARRAY_SIZE(gc2235_res_preview)) /* @@ -634,6 +635,7 @@ static struct gc2235_resolution gc2235_res_still[] = { }, }; + #define N_RES_STILL (ARRAY_SIZE(gc2235_res_still)) static struct gc2235_resolution gc2235_res_video[] = { @@ -669,6 +671,7 @@ static struct gc2235_resolution gc2235_res_video[] = { }, }; + #define N_RES_VIDEO (ARRAY_SIZE(gc2235_res_video)) #endif diff --git a/drivers/staging/media/atomisp/i2c/mt9m114.h b/drivers/staging/media/atomisp/i2c/mt9m114.h index c317214122dcc..4283447fd76f1 100644 --- a/drivers/staging/media/atomisp/i2c/mt9m114.h +++ b/drivers/staging/media/atomisp/i2c/mt9m114.h @@ -53,8 +53,8 @@ #define MISENSOR_TOK_POLL 0xfc00 /* token indicating poll instruction */ #define MISENSOR_TOK_RMW 0x0010 /* RMW operation */ #define MISENSOR_TOK_MASK 0xfff0 -#define MISENSOR_AWB_STEADY (1<<0) /* awb steady */ -#define MISENSOR_AE_READY (1<<3) /* ae status ready */ +#define MISENSOR_AWB_STEADY BIT(0) /* awb steady */ +#define MISENSOR_AE_READY BIT(3) /* ae status ready */ /* mask to set sensor read_mode via misensor_rmw_reg */ #define MISENSOR_R_MODE_MASK 0x0330 @@ -127,13 +127,12 @@ #define MT9M114_COARSE_INTG_TIME_MIN 1 #define MT9M114_COARSE_INTG_TIME_MAX_MARGIN 6 - /* ulBPat; */ -#define MT9M114_BPAT_RGRGGBGB (1 << 0) -#define MT9M114_BPAT_GRGRBGBG (1 << 1) -#define MT9M114_BPAT_GBGBRGRG (1 << 2) -#define MT9M114_BPAT_BGBGGRGR (1 << 3) +#define MT9M114_BPAT_RGRGGBGB BIT(0) +#define MT9M114_BPAT_GRGRBGBG BIT(1) +#define MT9M114_BPAT_GBGBRGRG BIT(2) +#define MT9M114_BPAT_BGBGGRGR BIT(3) #define MT9M114_FOCAL_LENGTH_NUM 208 /*2.08mm*/ #define MT9M114_FOCAL_LENGTH_DEM 100 @@ -169,6 +168,7 @@ enum { MT9M114_RES_864P, MT9M114_RES_960P, }; + #define MT9M114_RES_960P_SIZE_H 1296 #define MT9M114_RES_960P_SIZE_V 976 #define MT9M114_RES_720P_SIZE_H 1280 @@ -204,6 +204,7 @@ enum poll_reg { PRE_POLLING, POST_POLLING, }; + /* * struct misensor_reg - MI sensor register format * @length: length of the register @@ -388,6 +389,7 @@ static struct mt9m114_res_struct mt9m114_res[] = { .bin_mode = 0, }, }; + #define N_RES (ARRAY_SIZE(mt9m114_res)) #if 0 /* Currently unused */ @@ -795,6 +797,7 @@ static struct misensor_reg const mt9m114_common[] = { {MISENSOR_TOK_TERM, 0, 0}, }; + #if 0 /* Currently unused */ static struct misensor_reg const mt9m114_antiflicker_50hz[] = { {MISENSOR_16BIT, 0x098E, 0xC88B}, diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h index bde2f148184dc..d216d827e573c 100644 --- a/drivers/staging/media/atomisp/i2c/ov2680.h +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -132,10 +132,8 @@ #define OV2680_START_STREAMING 0x01 #define OV2680_STOP_STREAMING 0x00 - #define OV2680_INVALID_CONFIG 0xffffffff - struct regval_list { u16 reg_num; u8 value; @@ -294,7 +292,6 @@ struct ov2680_format { {OV2680_TOK_TERM, 0, 0} }; - #if 0 /* None of the definitions below are used currently */ /* * 176x144 30fps VBlanking 1lane 10Bit (binning) @@ -427,7 +424,6 @@ struct ov2680_format { {OV2680_TOK_TERM, 0, 0} }; - /* * 656x496 30fps VBlanking 1lane 10Bit (binning) */ @@ -641,12 +637,12 @@ struct ov2680_format { {OV2680_8BIT, 0x3821, 0x00}, //miror/flip // {OV2680_8BIT, 0x5090, 0x0c}, {OV2680_TOK_TERM, 0, 0} - }; + }; /* * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling) */ - static struct ov2680_reg const ov2680_1456x1096_30fps[]= { + static struct ov2680_reg const ov2680_1456x1096_30fps[] = { {OV2680_8BIT, 0x3086, 0x00}, {OV2680_8BIT, 0x3501, 0x48}, {OV2680_8BIT, 0x3502, 0xe0}, @@ -773,7 +769,7 @@ struct ov2680_format { {OV2680_8BIT, 0x4009, 0x09}, {OV2680_8BIT, 0x5081, 0x41}, {OV2680_TOK_TERM, 0, 0} - }; + }; #endif /* * 1616x1216 30fps VBlanking 1lane 10Bit @@ -821,7 +817,7 @@ struct ov2680_format { static struct ov2680_resolution ov2680_res_preview[] = { { .desc = "ov2680_1616x1216_30fps", - .width = 1616, + .width = 1616, .height = 1216, .pix_clk_freq = 66, .fps = 30, @@ -834,7 +830,7 @@ struct ov2680_format { .skip_frames = 3, .regs = ov2680_1616x1216_30fps, }, - { + { .desc = "ov2680_1616x916_30fps", .width = 1616, .height = 916, @@ -850,6 +846,7 @@ struct ov2680_format { .regs = ov2680_1616x916_30fps, }, }; + #define N_RES_PREVIEW (ARRAY_SIZE(ov2680_res_preview)) static struct ov2680_resolution *ov2680_res = ov2680_res_preview; diff --git a/drivers/staging/media/atomisp/i2c/ov2722.h b/drivers/staging/media/atomisp/i2c/ov2722.h index d99188a5c9d07..1110d723968e8 100644 --- a/drivers/staging/media/atomisp/i2c/ov2722.h +++ b/drivers/staging/media/atomisp/i2c/ov2722.h @@ -786,6 +786,7 @@ static struct ov2722_reg const ov2722_1452_1092_30fps[] = { {OV2722_8BIT, 0x3509, 0x00}, {OV2722_TOK_TERM, 0, 0} }; + #if 0 static struct ov2722_reg const ov2722_1M3_30fps[] = { {OV2722_8BIT, 0x3718, 0x10}, @@ -1152,6 +1153,7 @@ static struct ov2722_resolution ov2722_res_preview[] = { .mipi_freq = 345600, }, }; + #define N_RES_PREVIEW (ARRAY_SIZE(ov2722_res_preview)) /* @@ -1209,6 +1211,7 @@ struct ov2722_resolution ov2722_res_still[] = { .mipi_freq = 345600, }, }; + #define N_RES_STILL (ARRAY_SIZE(ov2722_res_still)) struct ov2722_resolution ov2722_res_video[] = { @@ -1260,6 +1263,7 @@ struct ov2722_resolution ov2722_res_video[] = { .mipi_freq = 345600, }, }; + #define N_RES_VIDEO (ARRAY_SIZE(ov2722_res_video)) #endif diff --git a/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h b/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h index 4de44569fe542..c97ab24c5d2bd 100644 --- a/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h +++ b/drivers/staging/media/atomisp/i2c/ov5693/ad5823.h @@ -20,7 +20,6 @@ #include - #define AD5823_VCM_ADDR 0x0c #define AD5823_REG_RESET 0x01 diff --git a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c index 714297c36b3e9..4a184400c7d7b 100644 --- a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c +++ b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c @@ -119,8 +119,7 @@ static int ad5823_i2c_read(struct i2c_client *client, u8 reg, u8 *val) return 0; } - -static const uint32_t ov5693_embedded_effective_size = 28; +static const u32 ov5693_embedded_effective_size = 28; /* i2c read/write stuff */ static int ov5693_read_reg(struct i2c_client *client, @@ -413,6 +412,7 @@ static int ov5693_write_reg_array(struct i2c_client *client, return __ov5693_flush_reg_array(client, &ctrl); } + static int ov5693_g_focal(struct v4l2_subdev *sd, s32 *val) { *val = (OV5693_FOCAL_LENGTH_NUM << 16) | OV5693_FOCAL_LENGTH_DEM; @@ -463,7 +463,7 @@ static int ov5693_get_intg_factor(struct i2c_client *client, u16 reg_val; int ret; - if (info == NULL) + if (!info) return -EINVAL; /* pixel clock */ @@ -576,7 +576,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } /* Increase the VTS to match exposure + MARGIN */ if (coarse_itg > vts - OV5693_INTEGRATION_TIME_MARGIN) - vts = (u16) coarse_itg + OV5693_INTEGRATION_TIME_MARGIN; + vts = (u16)coarse_itg + OV5693_INTEGRATION_TIME_MARGIN; ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_TIMING_VTS_H, (vts >> 8) & 0xFF); @@ -718,7 +718,7 @@ static int ov5693_read_otp_reg_array(struct i2c_client *client, u16 size, u16 *pVal = NULL; for (index = 0; index <= size; index++) { - pVal = (u16 *) (buf + index); + pVal = (u16 *)(buf + index); ret = ov5693_read_reg(client, OV5693_8BIT, addr + index, pVal); @@ -873,12 +873,10 @@ static int ov5693_g_priv_int_data(struct v4l2_subdev *sd, priv->size = dev->otp_size; return 0; - } static long ov5693_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { - switch (cmd) { case ATOMISP_IOC_S_EXPOSURE: return ov5693_s_exposure(sd, arg); @@ -1588,7 +1586,7 @@ static int ov5693_set_fmt(struct v4l2_subdev *sd, if (!fmt) return -EINVAL; ov5693_info = v4l2_get_subdev_hostdata(sd); - if (ov5693_info == NULL) + if (!ov5693_info) return -EINVAL; mutex_lock(&dev->input_lock); @@ -1624,7 +1622,7 @@ static int ov5693_set_fmt(struct v4l2_subdev *sd, for (i = 0; i < OV5693_POWER_UP_RETRY_NUM; i++) { dev_err(&client->dev, "ov5693 retry to power up %d/%d times, result: ", - i+1, OV5693_POWER_UP_RETRY_NUM); + i + 1, OV5693_POWER_UP_RETRY_NUM); power_down(sd); ret = power_up(sd); if (!ret) { @@ -1670,6 +1668,7 @@ static int ov5693_set_fmt(struct v4l2_subdev *sd, mutex_unlock(&dev->input_lock); return ret; } + static int ov5693_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *format) @@ -1709,7 +1708,7 @@ static int ov5693_detect(struct i2c_client *client) } ret = ov5693_read_reg(client, OV5693_8BIT, OV5693_SC_CMMN_CHIP_ID_L, &low); - id = ((((u16) high) << 8) | (u16) low); + id = ((((u16)high) << 8) | (u16)low); if (id != OV5693_ID) { dev_err(&client->dev, "sensor ID error 0x%x\n", id); @@ -1718,7 +1717,7 @@ static int ov5693_detect(struct i2c_client *client) ret = ov5693_read_reg(client, OV5693_8BIT, OV5693_SC_CMMN_SUB_ID, &high); - revision = (u8) high & 0x0f; + revision = (u8)high & 0x0f; dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); dev_dbg(&client->dev, "detect ov5693 success\n"); @@ -1742,7 +1741,6 @@ static int ov5693_s_stream(struct v4l2_subdev *sd, int enable) return ret; } - static int ov5693_s_config(struct v4l2_subdev *sd, int irq, void *platform_data) { @@ -1750,7 +1748,7 @@ static int ov5693_s_config(struct v4l2_subdev *sd, struct i2c_client *client = v4l2_get_subdevdata(sd); int ret = 0; - if (platform_data == NULL) + if (!platform_data) return -ENODEV; dev->platform_data = @@ -1846,7 +1844,6 @@ static int ov5693_enum_frame_size(struct v4l2_subdev *sd, fse->max_height = ov5693_res[index].height; return 0; - } static const struct v4l2_subdev_video_ops ov5693_video_ops = { @@ -1921,7 +1918,7 @@ static int ov5693_probe(struct i2c_client *client) mutex_init(&dev->input_lock); dev->fmt_idx = 0; - v4l2_i2c_subdev_init(&(dev->sd), client, &ov5693_ops); + v4l2_i2c_subdev_init(&dev->sd, client, &ov5693_ops); pdata = gmin_camera_platform_data(&dev->sd, ATOMISP_INPUT_FORMAT_RAW_10, diff --git a/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h b/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h index bba99406785e3..0189907969c6d 100644 --- a/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h +++ b/drivers/staging/media/atomisp/i2c/ov5693/ov5693.h @@ -36,7 +36,6 @@ */ #define ENABLE_NON_PREVIEW 0 - #define OV5693_POWER_UP_RETRY_NUM 5 /* Defines for register writes and register array processing */ @@ -174,7 +173,7 @@ #define OV5693_OTP_START_ADDR 0x3D00 #define OV5693_OTP_END_ADDR 0x3D0F #define OV5693_OTP_DATA_SIZE 320 -#define OV5693_OTP_PROGRAM_REG 0x3D80 +#define OV5693_OTP_PROGRAM_REG 0x3D80 #define OV5693_OTP_READ_REG 0x3D81 // 1:Enable 0:disable #define OV5693_OTP_BANK_REG 0x3D84 //otp bank and mode #define OV5693_OTP_READY_REG_DONE 1 @@ -586,7 +585,6 @@ static struct ov5693_reg const ov5693_1296x976[] = { }; - /* * 336x256 30fps 17ms VBlanking 2lane 10Bit (Scaling) DS from 2564x1956 @@ -675,7 +673,6 @@ static struct ov5693_reg const ov5693_192x160[] = { {OV5693_TOK_TERM, 0, 0} }; - static struct ov5693_reg const ov5693_736x496[] = { {OV5693_8BIT, 0x3501, 0x3d}, {OV5693_8BIT, 0x3502, 0x00}, @@ -865,7 +862,6 @@ static struct ov5693_reg const ov5693_1616x1216_30fps[] = { {OV5693_TOK_TERM, 0, 0} }; - /* * 1940x1096 30fps 8.8ms VBlanking 2lane 10bit (Scaling) */ @@ -1161,6 +1157,7 @@ static struct ov5693_resolution ov5693_res_preview[] = { .regs = ov5693_2576x1936_30fps, }, }; + #define N_RES_PREVIEW (ARRAY_SIZE(ov5693_res_preview)) /* @@ -1240,6 +1237,7 @@ struct ov5693_resolution ov5693_res_still[] = { .regs = ov5693_2592x1944_30fps, }, }; + #define N_RES_STILL (ARRAY_SIZE(ov5693_res_still)) struct ov5693_resolution ov5693_res_video[] = { @@ -1384,6 +1382,7 @@ struct ov5693_resolution ov5693_res_video[] = { .regs = ov5693_2592x1944_30fps, }, }; + #define N_RES_VIDEO (ARRAY_SIZE(ov5693_res_video)) #endif diff --git a/drivers/staging/media/atomisp/include/linux/atomisp.h b/drivers/staging/media/atomisp/include/linux/atomisp.h index ebe193ba3871c..e78e8a5cfb868 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp.h @@ -176,14 +176,14 @@ struct atomisp_3a_config { }; struct atomisp_dvs_grid_info { - uint32_t enable; - uint32_t width; - uint32_t aligned_width; - uint32_t height; - uint32_t aligned_height; - uint32_t bqs_per_grid_cell; - uint32_t num_hor_coefs; - uint32_t num_ver_coefs; + u32 enable; + u32 width; + u32 aligned_width; + u32 height; + u32 aligned_height; + u32 bqs_per_grid_cell; + u32 num_hor_coefs; + u32 num_ver_coefs; }; struct atomisp_dvs_envelop { @@ -192,16 +192,16 @@ struct atomisp_dvs_envelop { }; struct atomisp_grid_info { - uint32_t enable; - uint32_t use_dmem; - uint32_t has_histogram; - uint32_t s3a_width; - uint32_t s3a_height; - uint32_t aligned_width; - uint32_t aligned_height; - uint32_t s3a_bqs_per_grid_cell; - uint32_t deci_factor_log2; - uint32_t elem_bit_depth; + u32 enable; + u32 use_dmem; + u32 has_histogram; + u32 s3a_width; + u32 s3a_height; + u32 aligned_width; + u32 aligned_height; + u32 s3a_bqs_per_grid_cell; + u32 deci_factor_log2; + u32 elem_bit_depth; }; struct atomisp_dis_vector { @@ -209,7 +209,6 @@ struct atomisp_dis_vector { int y; }; - /* DVS 2.0 Coefficient types. This structure contains 4 pointers to * arrays that contain the coeffients for each type. */ @@ -245,14 +244,14 @@ struct atomisp_dvs2_statistics { struct atomisp_dis_statistics { struct atomisp_dvs2_statistics dvs2_stat; - uint32_t exp_id; + u32 exp_id; }; struct atomisp_3a_rgby_output { - uint32_t r; - uint32_t g; - uint32_t b; - uint32_t y; + u32 r; + u32 g; + u32 b; + u32 y; }; /* @@ -273,33 +272,33 @@ struct atomisp_metadata_with_type { /* to specify which type of metadata to get */ enum atomisp_metadata_type type; void __user *data; - uint32_t width; - uint32_t height; - uint32_t stride; /* in bytes */ - uint32_t exp_id; /* exposure ID */ - uint32_t *effective_width; /* mipi packets valid data size */ + u32 width; + u32 height; + u32 stride; /* in bytes */ + u32 exp_id; /* exposure ID */ + u32 *effective_width; /* mipi packets valid data size */ }; struct atomisp_metadata { void __user *data; - uint32_t width; - uint32_t height; - uint32_t stride; /* in bytes */ - uint32_t exp_id; /* exposure ID */ - uint32_t *effective_width; /* mipi packets valid data size */ + u32 width; + u32 height; + u32 stride; /* in bytes */ + u32 exp_id; /* exposure ID */ + u32 *effective_width; /* mipi packets valid data size */ }; struct atomisp_ext_isp_ctrl { - uint32_t id; - uint32_t data; + u32 id; + u32 data; }; struct atomisp_3a_statistics { struct atomisp_grid_info grid_info; struct atomisp_3a_output __user *data; struct atomisp_3a_rgby_output __user *rgby_data; - uint32_t exp_id; /* exposure ID */ - uint32_t isp_config_id; /* isp config ID */ + u32 exp_id; /* exposure ID */ + u32 isp_config_id; /* isp config ID */ }; /** @@ -384,24 +383,24 @@ struct atomisp_xnr_config { /* metadata config */ struct atomisp_metadata_config { - uint32_t metadata_height; - uint32_t metadata_stride; + u32 metadata_height; + u32 metadata_stride; }; /* * Generic resolution structure. */ struct atomisp_resolution { - uint32_t width; /** Width */ - uint32_t height; /** Height */ + u32 width; /** Width */ + u32 height; /** Height */ }; /* * This specifies the coordinates (x,y) */ struct atomisp_zoom_point { - int32_t x; /** x coordinate */ - int32_t y; /** y coordinate */ + s32 x; /** x coordinate */ + s32 y; /** y coordinate */ }; /* @@ -413,8 +412,8 @@ struct atomisp_zoom_region { }; struct atomisp_dz_config { - uint32_t dx; /** Horizontal zoom factor */ - uint32_t dy; /** Vertical zoom factor */ + u32 dx; /** Horizontal zoom factor */ + u32 dy; /** Vertical zoom factor */ struct atomisp_zoom_region zoom_region; /** region for zoom */ }; @@ -454,19 +453,19 @@ struct atomisp_dvs2_bq_resolutions { }; struct atomisp_dvs_6axis_config { - uint32_t exp_id; - uint32_t width_y; - uint32_t height_y; - uint32_t width_uv; - uint32_t height_uv; - uint32_t *xcoords_y; - uint32_t *ycoords_y; - uint32_t *xcoords_uv; - uint32_t *ycoords_uv; + u32 exp_id; + u32 width_y; + u32 height_y; + u32 width_uv; + u32 height_uv; + u32 *xcoords_y; + u32 *ycoords_y; + u32 *xcoords_uv; + u32 *ycoords_uv; }; struct atomisp_formats_config { - uint32_t video_full_range_flag; + u32 video_full_range_flag; }; struct atomisp_parameters { @@ -543,7 +542,7 @@ struct atomisp_parameters { * Unique ID to track which config was actually applied to a particular * frame, driver will send this id back with output frame together. */ - uint32_t isp_config_id; + u32 isp_config_id; /* * Switch to control per_frame setting: @@ -551,7 +550,7 @@ struct atomisp_parameters { * 1: this is a per_frame setting * PLEASE KEEP THIS AT THE END OF THE STRUCTURE!! */ - uint32_t per_frame_setting; + u32 per_frame_setting; }; #define ATOMISP_GAMMA_TABLE_SIZE 1024 @@ -574,7 +573,7 @@ struct atomisp_morph_table { }; #define ATOMISP_NUM_SC_COLORS 4 -#define ATOMISP_SC_FLAG_QUERY (1 << 0) +#define ATOMISP_SC_FLAG_QUERY BIT(0) struct atomisp_shading_table { __u32 enable; @@ -669,9 +668,9 @@ struct atomisp_sensor_mode_data { unsigned int crop_vertical_end; unsigned int output_width; /* input size to ISP after binning/scaling */ unsigned int output_height; - uint8_t binning_factor_x; /* horizontal binning factor used */ - uint8_t binning_factor_y; /* vertical binning factor used */ - uint16_t hts; + u8 binning_factor_x; /* horizontal binning factor used */ + u8 binning_factor_y; /* vertical binning factor used */ + u16 hts; }; struct atomisp_exposure { @@ -696,8 +695,8 @@ enum atomisp_focus_hp { }; /* Masks */ -#define ATOMISP_FOCUS_STATUS_MOVING (1U << 0) -#define ATOMISP_FOCUS_STATUS_ACCEPTS_NEW_MOVE (1U << 1) +#define ATOMISP_FOCUS_STATUS_MOVING BIT(0) +#define ATOMISP_FOCUS_STATUS_ACCEPTS_NEW_MOVE BIT(1) #define ATOMISP_FOCUS_STATUS_HOME_POSITION (3U << 2) enum atomisp_camera_port { @@ -887,6 +886,7 @@ struct atomisp_acc_fw_load_to_pipe { __u32 type; /* Binary type */ __u32 reserved[3]; /* Set to zero */ }; + /* * Set Senor run mode */ @@ -894,12 +894,12 @@ struct atomisp_s_runmode { __u32 mode; }; -#define ATOMISP_ACC_FW_LOAD_FL_PREVIEW (1 << 0) -#define ATOMISP_ACC_FW_LOAD_FL_COPY (1 << 1) -#define ATOMISP_ACC_FW_LOAD_FL_VIDEO (1 << 2) -#define ATOMISP_ACC_FW_LOAD_FL_CAPTURE (1 << 3) -#define ATOMISP_ACC_FW_LOAD_FL_ACC (1 << 4) -#define ATOMISP_ACC_FW_LOAD_FL_ENABLE (1 << 16) +#define ATOMISP_ACC_FW_LOAD_FL_PREVIEW BIT(0) +#define ATOMISP_ACC_FW_LOAD_FL_COPY BIT(1) +#define ATOMISP_ACC_FW_LOAD_FL_VIDEO BIT(2) +#define ATOMISP_ACC_FW_LOAD_FL_CAPTURE BIT(3) +#define ATOMISP_ACC_FW_LOAD_FL_ACC BIT(4) +#define ATOMISP_ACC_FW_LOAD_FL_ENABLE BIT(16) #define ATOMISP_ACC_FW_LOAD_TYPE_NONE 0 /* Normal binary: don't use */ #define ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT 1 /* Stage on output */ @@ -1285,8 +1285,8 @@ struct atomisp_sensor_ae_bracketing_lut { /* Query sensor's 2A status */ #define V4L2_CID_2A_STATUS (V4L2_CID_CAMERA_LASTP1 + 18) -#define V4L2_2A_STATUS_AE_READY (1 << 0) -#define V4L2_2A_STATUS_AWB_READY (1 << 1) +#define V4L2_2A_STATUS_AE_READY BIT(0) +#define V4L2_2A_STATUS_AWB_READY BIT(1) #define V4L2_CID_FMT_AUTO (V4L2_CID_CAMERA_LASTP1 + 19) diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h index c52c56a17e17e..e701eac26e3cf 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h @@ -18,14 +18,14 @@ #include "atomisp_platform.h" int atomisp_register_i2c_module(struct v4l2_subdev *subdev, - struct camera_sensor_platform_data *plat_data, - enum intel_v4l2_subdev_type type); + struct camera_sensor_platform_data *plat_data, + enum intel_v4l2_subdev_type type); struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter, struct i2c_board_info *board_info); int atomisp_gmin_remove_subdev(struct v4l2_subdev *sd); int gmin_get_var_int(struct device *dev, const char *var, int def); int camera_sensor_csi(struct v4l2_subdev *sd, u32 port, - u32 lanes, u32 format, u32 bayer_order, int flag); + u32 lanes, u32 format, u32 bayer_order, int flag); struct camera_sensor_platform_data *gmin_camera_platform_data( struct v4l2_subdev *subdev, enum atomisp_input_format csi_format, diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h index aa5e294e7b7dc..f363a7e2968d3 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h @@ -106,8 +106,6 @@ enum atomisp_input_format { #define N_ATOMISP_INPUT_FORMAT (ATOMISP_INPUT_FORMAT_USER_DEF8 + 1) - - enum intel_v4l2_subdev_type { RAW_CAMERA = 1, SOC_CAMERA = 2, @@ -228,13 +226,13 @@ struct camera_mipi_info { enum atomisp_bayer_order raw_bayer_order; struct atomisp_sensor_mode_data data; enum atomisp_input_format metadata_format; - uint32_t metadata_width; - uint32_t metadata_height; - const uint32_t *metadata_effective_width; + u32 metadata_width; + u32 metadata_height; + const u32 *metadata_effective_width; }; -extern const struct atomisp_platform_data *atomisp_get_platform_data(void); -extern const struct atomisp_camera_caps *atomisp_get_default_camera_caps(void); +const struct atomisp_platform_data *atomisp_get_platform_data(void); +const struct atomisp_camera_caps *atomisp_get_default_camera_caps(void); /* API from old platform_camera.h, new CPUID implementation */ #define __IS_SOC(x) (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && \ diff --git a/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h b/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h index 8988b37943b3a..431b059e65f43 100644 --- a/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h +++ b/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h @@ -18,11 +18,10 @@ struct i2c_client; struct firmware; -extern int load_msr_list(struct i2c_client *client, char *path, +int load_msr_list(struct i2c_client *client, char *path, const struct firmware **fw); -extern int apply_msr_data(struct i2c_client *client, const struct firmware *fw); -extern void release_msr_list(struct i2c_client *client, +int apply_msr_data(struct i2c_client *client, const struct firmware *fw); +void release_msr_list(struct i2c_client *client, const struct firmware *fw); - #endif /* ifndef __LIBMSRLISTHELPER_H__ */ diff --git a/drivers/staging/media/atomisp/include/media/lm3554.h b/drivers/staging/media/atomisp/include/media/lm3554.h index 9276ce44d9070..03a916ade531e 100644 --- a/drivers/staging/media/atomisp/include/media/lm3554.h +++ b/drivers/staging/media/atomisp/include/media/lm3554.h @@ -91,8 +91,8 @@ #define LM3554_CLAMP_PERCENTAGE(val) \ clamp(val, LM3554_MIN_PERCENT, LM3554_MAX_PERCENT) -#define LM3554_VALUE_TO_PERCENT(v, step) (((((unsigned long)(v))*(step))+50)/100) -#define LM3554_PERCENT_TO_VALUE(p, step) (((((unsigned long)(p))*100)+(step>>1))/(step)) +#define LM3554_VALUE_TO_PERCENT(v, step) (((((unsigned long)(v)) * (step)) + 50) / 100) +#define LM3554_PERCENT_TO_VALUE(p, step) (((((unsigned long)(p)) * 100) + (step >> 1)) / (step)) /* Product specific limits * TODO: get these from platform data */ @@ -100,7 +100,7 @@ /* Flash brightness, input is percentage, output is [0..15] */ #define LM3554_FLASH_STEP \ - ((100ul*(LM3554_MAX_PERCENT)+((LM3554_FLASH_MAX_LVL)>>1))/((LM3554_FLASH_MAX_LVL))) + ((100ul * (LM3554_MAX_PERCENT) + ((LM3554_FLASH_MAX_LVL) >> 1)) / ((LM3554_FLASH_MAX_LVL))) #define LM3554_FLASH_DEFAULT_BRIGHTNESS \ LM3554_VALUE_TO_PERCENT(13, LM3554_FLASH_STEP) @@ -128,4 +128,3 @@ struct lm3554_platform_data { }; #endif /* _LM3554_H_ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h index 56386154643b2..ba14181962f85 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h @@ -70,7 +70,6 @@ int atomisp_acc_unmap(struct atomisp_sub_device *asd, int atomisp_acc_s_mapped_arg(struct atomisp_sub_device *asd, struct atomisp_acc_s_mapped_arg *arg); - /* * Start acceleration. * Return immediately, acceleration is left running in background. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index 275b8dba5bdb0..2aba72bce260f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -60,7 +60,6 @@ #include "error_support.h" #include "hrt/bits.h" - /* We should never need to run the flash for more than 2 frames. * At 15fps this means 133ms. We set the timeout a bit longer. * Each flash driver is supposed to set its own timeout, but @@ -200,6 +199,7 @@ static int write_target_freq_to_hw(struct atomisp_device *isp, return 0; } + int atomisp_freq_scaling(struct atomisp_device *isp, enum atomisp_dfs_mode mode, bool force) @@ -436,7 +436,6 @@ static void atomisp_reset_event(struct atomisp_sub_device *asd) v4l2_event_queue(asd->subdev.devnode, &event); } - static void print_csi_rx_errors(enum mipi_port_id port, struct atomisp_device *isp) { @@ -475,6 +474,7 @@ static void print_csi_rx_errors(enum mipi_port_id port, static void clear_irq_reg(struct atomisp_device *isp) { u32 msg_ret; + pci_read_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, &msg_ret); msg_ret |= 1 << INTR_IIR; pci_write_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, msg_ret); @@ -581,7 +581,7 @@ irqreturn_t atomisp_isr(int irq, void *dev) } if (irq_infos & IA_CSS_IRQ_INFO_ISYS_EVENTS_READY) { - while (ia_css_dequeue_isys_event(&(eof_event.event)) == + while (ia_css_dequeue_isys_event(&eof_event.event) == IA_CSS_SUCCESS) { /* EOF Event does not have the css_pipe returned */ asd = __get_asd_from_port(isp, eof_event.event.port); @@ -614,6 +614,7 @@ irqreturn_t atomisp_isr(int irq, void *dev) void atomisp_clear_css_buffer_counters(struct atomisp_sub_device *asd) { int i; + memset(asd->s3a_bufs_in_css, 0, sizeof(asd->s3a_bufs_in_css)); for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) memset(asd->metadata_bufs_in_css[i], 0, @@ -915,7 +916,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, /* need to know the atomisp pipe for frame buffers */ pipe = __atomisp_get_pipe(asd, stream_id, css_pipe_id, buf_type); - if (pipe == NULL) { + if (!pipe) { dev_err(isp->dev, "error getting atomisp pipe\n"); return; } @@ -1296,13 +1297,15 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) * HAL will be unblocked. */ acc_pipe = asd->stream_env[i].pipes[CSS_PIPE_ID_ACC]; - if (acc_pipe != NULL) { + if (acc_pipe) { acc_pipeline = ia_css_pipe_get_pipeline(acc_pipe); if (acc_pipeline) { struct ia_css_pipeline_stage *stage; + for (stage = acc_pipeline->stages; stage; stage = stage->next) { const struct ia_css_fw_info *fw; + fw = stage->firmware; atomisp_acc_done(asd, fw->handle); } @@ -1435,7 +1438,6 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) if (ret) dev_warn(isp->dev, "can't start streaming on sensor!\n"); - } if (depth_mode) { @@ -1469,6 +1471,7 @@ void atomisp_wdt_work(struct work_struct *work) #else for (i = 0; i < isp->num_of_streams; i++) { struct atomisp_sub_device *asd = &isp->asd[i]; + pipe_wdt_cnt[i][0] += atomic_read(&asd->video_out_capture.wdt_count); pipe_wdt_cnt[i][1] += @@ -1497,6 +1500,7 @@ void atomisp_wdt_work(struct work_struct *work) if (css_recover) { #endif unsigned int old_dbglevel = dbg_level; + atomisp_css_debug_dump_sp_sw_debug_info(); atomisp_css_debug_dump_debug_info(__func__); dbg_level = old_dbglevel; @@ -1566,7 +1570,7 @@ void atomisp_wdt_work(struct work_struct *work) dev_err(isp->dev, "%s, raw_buffer_locked_count %d\n", __func__, asd->raw_buffer_locked_count); - for (j = 0; j <= ATOMISP_MAX_EXP_ID/32; j++) + for (j = 0; j <= ATOMISP_MAX_EXP_ID / 32; j++) dev_err(isp->dev, "%s, raw_buffer_bitmap[%d]: 0x%x\n", __func__, j, asd->raw_buffer_bitmap[j]); @@ -1578,6 +1582,7 @@ void atomisp_wdt_work(struct work_struct *work) } else { for (i = 0; i < isp->num_of_streams; i++) { struct atomisp_sub_device *asd = &isp->asd[i]; + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED) { atomisp_clear_css_buffer_counters(asd); @@ -1603,6 +1608,7 @@ void atomisp_wdt_work(struct work_struct *work) #ifdef ISP2401 for (i = 0; i < isp->num_of_streams; i++) { struct atomisp_sub_device *asd = &isp->asd[i]; + if (asd->streaming == ATOMISP_DEVICE_STREAMING_ENABLED) { atomisp_wdt_refresh(asd, @@ -1628,6 +1634,7 @@ void atomisp_css_flush(struct atomisp_device *isp) /* Disable wdt */ for (i = 0; i < isp->num_of_streams; i++) { struct atomisp_sub_device *asd = &isp->asd[i]; + atomisp_wdt_stop(asd, true); } @@ -1753,7 +1760,6 @@ void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) atomisp_wdt_refresh_pipe(&asd->video_out_video_capture, delay); } - void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync) #endif { @@ -1811,7 +1817,7 @@ void atomisp_setup_flash(struct atomisp_sub_device *asd) struct atomisp_device *isp = asd->isp; struct v4l2_control ctrl; - if (isp->flash == NULL) + if (!isp->flash) return; if (asd->params.flash_state != ATOMISP_FLASH_REQUESTED && @@ -1889,7 +1895,6 @@ irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr) if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) continue; atomisp_setup_flash(asd); - } out: rt_mutex_unlock(&isp->mutex); @@ -1979,6 +1984,7 @@ v4l2_fmt_to_sh_fmt(u32 fmt) return -EINVAL; } } + /* * raw format match between SH format and V4L2 format */ @@ -2343,7 +2349,7 @@ static void atomisp_update_grid_info(struct atomisp_sub_device *asd, { struct atomisp_device *isp = asd->isp; int err; - uint16_t stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + u16 stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); if (atomisp_css_get_grid_info(asd, pipe_id, source_pad)) return; @@ -2415,6 +2421,7 @@ int atomisp_gdc_cac_table(struct atomisp_sub_device *asd, int flag, if (flag == 0) { /* Get gdc table from current setup */ struct atomisp_css_morph_table tab = {0}; + atomisp_css_get_morph_table(asd, &tab); config->width = tab.width; @@ -2643,7 +2650,6 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, pipe_cfg->bayer_ds_out_res.height / input_config->effective_res.height + 1) / 2; - if (!asd->params.video_dis_en) { /* * We adjust the ispfilter_bq to: @@ -2681,7 +2687,7 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, w_padding = w_padding * pipe_cfg->bayer_ds_out_res.width / input_config->effective_res.width + 1; - w_padding = roundup(w_padding/2, 1); + w_padding = roundup(w_padding / 2, 1); bq_res->gdc_shift_bq.width_bq = bq_res->ispfilter_bq.width_bq / 2 + w_padding; @@ -2842,10 +2848,10 @@ int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag, mipi_info = atomisp_to_sensor_mipi_info( isp->inputs[asd->input_curr].camera); - if (mipi_info == NULL) + if (!mipi_info) return -EINVAL; - if (mipi_info->metadata_effective_width != NULL) { + if (mipi_info->metadata_effective_width) { for (i = 0; i < md->height; i++) md->effective_width[i] = mipi_info->metadata_effective_width[i]; @@ -2925,10 +2931,10 @@ int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag, mipi_info = atomisp_to_sensor_mipi_info( isp->inputs[asd->input_curr].camera); - if (mipi_info == NULL) + if (!mipi_info) return -EINVAL; - if (mipi_info->metadata_effective_width != NULL) { + if (mipi_info->metadata_effective_width) { for (i = 0; i < md->height; i++) md->effective_width[i] = mipi_info->metadata_effective_width[i]; @@ -3127,7 +3133,6 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, asd->sensor_array_res.height, out_res.width, out_res.height); - if ((dz_config->zoom_region.origin.x + dz_config->zoom_region.resolution.width > eff_res.width) || @@ -3139,7 +3144,6 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, return 0; } - /* * Function to check the zoom region whether is effective */ @@ -3149,7 +3153,7 @@ static bool atomisp_check_zoom_region( { struct atomisp_resolution config; bool flag = false; - unsigned int w , h; + unsigned int w, h; memset(&config, 0, sizeof(struct atomisp_resolution)); @@ -3313,7 +3317,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.wb_config = - (struct atomisp_wb_config *) &css_param->wb_config; + (struct atomisp_wb_config *)&css_param->wb_config; } if (arg->ob_config && (from_user || !cur_config->ob_config)) { @@ -3322,7 +3326,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.ob_config = - (struct atomisp_ob_config *) &css_param->ob_config; + (struct atomisp_ob_config *)&css_param->ob_config; } if (arg->dp_config && (from_user || !cur_config->dp_config)) { @@ -3331,7 +3335,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.dp_config = - (struct atomisp_dp_config *) &css_param->dp_config; + (struct atomisp_dp_config *)&css_param->dp_config; } if (asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { @@ -3358,7 +3362,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.nr_config = - (struct atomisp_nr_config *) &css_param->nr_config; + (struct atomisp_nr_config *)&css_param->nr_config; } if (arg->ee_config && (from_user || !cur_config->ee_config)) { @@ -3367,7 +3371,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.ee_config = - (struct atomisp_ee_config *) &css_param->ee_config; + (struct atomisp_ee_config *)&css_param->ee_config; } if (arg->tnr_config && (from_user || !cur_config->tnr_config)) { @@ -3388,7 +3392,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.a3a_config = - (struct atomisp_3a_config *) &css_param->s3a_config; + (struct atomisp_3a_config *)&css_param->s3a_config; } if (arg->ctc_config && (from_user || !cur_config->ctc_config)) { @@ -3442,7 +3446,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.fc_config = - (struct atomisp_fc_config *) &css_param->fc_config; + (struct atomisp_fc_config *)&css_param->fc_config; } if (arg->macc_config && (from_user || !cur_config->macc_config)) { @@ -3462,7 +3466,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.aa_config = - (struct atomisp_aa_config *) &css_param->aa_config; + (struct atomisp_aa_config *)&css_param->aa_config; } if (arg->anr_config && (from_user || !cur_config->anr_config)) { @@ -3529,7 +3533,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.xnr_table = - (struct atomisp_xnr_table *) &css_param->xnr_table; + (struct atomisp_xnr_table *)&css_param->xnr_table; } if (arg->r_gamma_table && (from_user || !cur_config->r_gamma_table)) { @@ -3571,7 +3575,7 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, from_user)) return -EFAULT; css_param->update_flag.anr_thres = - (struct atomisp_anr_thres *) &css_param->anr_thres; + (struct atomisp_anr_thres *)&css_param->anr_thres; } if (from_user) @@ -3697,7 +3701,6 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, atomisp_css_shading_table_free(shading_table); return -EFAULT; } - } #ifndef ISP2401 shading_table->sensor_width = source_st->sensor_width; @@ -3712,7 +3715,7 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, #endif /* No need to update shading table if it is the same */ - if (old_table != NULL && + if (old_table && old_table->sensor_width == shading_table->sensor_width && old_table->sensor_height == shading_table->sensor_height && old_table->width == shading_table->width && @@ -3739,8 +3742,8 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, /* set LSC to CSS */ css_param->shading_table = shading_table; css_param->update_flag.shading_table = - (struct atomisp_shading_table *) shading_table; - asd->params.sc_en = shading_table != NULL; + (struct atomisp_shading_table *)shading_table; + asd->params.sc_en = shading_table; if (old_table) atomisp_css_shading_table_free(old_table); @@ -3788,23 +3791,23 @@ int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, } #ifndef ISP2401 - if (coefs->hor_coefs.odd_real == NULL || - coefs->hor_coefs.odd_imag == NULL || - coefs->hor_coefs.even_real == NULL || - coefs->hor_coefs.even_imag == NULL || - coefs->ver_coefs.odd_real == NULL || - coefs->ver_coefs.odd_imag == NULL || - coefs->ver_coefs.even_real == NULL || - coefs->ver_coefs.even_imag == NULL) + if (!coefs->hor_coefs.odd_real || + !coefs->hor_coefs.odd_imag || + !coefs->hor_coefs.even_real || + !coefs->hor_coefs.even_imag || + !coefs->ver_coefs.odd_real || + !coefs->ver_coefs.odd_imag || + !coefs->ver_coefs.even_real || + !coefs->ver_coefs.even_imag) #else - if (dvs2_coefs.hor_coefs.odd_real == NULL || - dvs2_coefs.hor_coefs.odd_imag == NULL || - dvs2_coefs.hor_coefs.even_real == NULL || - dvs2_coefs.hor_coefs.even_imag == NULL || - dvs2_coefs.ver_coefs.odd_real == NULL || - dvs2_coefs.ver_coefs.odd_imag == NULL || - dvs2_coefs.ver_coefs.even_real == NULL || - dvs2_coefs.ver_coefs.even_imag == NULL) + if (!dvs2_coefs.hor_coefs.odd_real || + !dvs2_coefs.hor_coefs.odd_imag || + !dvs2_coefs.hor_coefs.even_real || + !dvs2_coefs.hor_coefs.even_imag || + !dvs2_coefs.ver_coefs.odd_real || + !dvs2_coefs.ver_coefs.odd_imag || + !dvs2_coefs.ver_coefs.even_real || + !dvs2_coefs.ver_coefs.even_imag) #endif return -EINVAL; @@ -3891,7 +3894,7 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); int ret = -EFAULT; - if (stream == NULL) { + if (!stream) { dev_err(asd->isp->dev, "%s: internal error!", __func__); return -EINVAL; } @@ -4007,7 +4010,7 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, css_param->dvs_6axis = dvs_6axis_config; css_param->update_flag.dvs_6axis_config = - (struct atomisp_dvs_6axis_config *) dvs_6axis_config; + (struct atomisp_dvs_6axis_config *)dvs_6axis_config; return 0; error: @@ -4087,7 +4090,7 @@ int atomisp_cp_morph_table(struct atomisp_sub_device *asd, if (old_morph_table) atomisp_css_morph_table_free(old_morph_table); css_param->update_flag.morph_table = - (struct atomisp_morph_table *) morph_table; + (struct atomisp_morph_table *)morph_table; return 0; error: @@ -4112,7 +4115,7 @@ int atomisp_makeup_css_parameters(struct atomisp_sub_device *asd, if (ret) return ret; ret = atomisp_css_cp_dvs2_coefs(asd, - (struct ia_css_dvs2_coefficients *) arg->dvs2_coefs, + (struct ia_css_dvs2_coefficients *)arg->dvs2_coefs, css_param, false); if (ret) return ret; @@ -4242,7 +4245,7 @@ int atomisp_set_parameters(struct video_device *vdev, struct atomisp_css_params *css_param = &asd->params.css_param; int ret; - if (asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream == NULL) { + if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { dev_err(asd->isp->dev, "%s: internal error!\n", __func__); return -EINVAL; } @@ -4288,7 +4291,7 @@ int atomisp_set_parameters(struct video_device *vdev, goto apply_parameter_failed; ret = atomisp_css_cp_dvs2_coefs(asd, - (struct ia_css_dvs2_coefficients *) arg->dvs2_coefs, + (struct ia_css_dvs2_coefficients *)arg->dvs2_coefs, css_param, true); if (ret) goto apply_parameter_failed; @@ -4334,7 +4337,7 @@ int atomisp_param(struct atomisp_sub_device *asd, int flag, atomisp_css_get_dvs_grid_info( &asd->params.curr_grid_info); - if (&config->info == NULL) { + if (!&config->info) { dev_err(isp->dev, "ERROR: NULL pointer in grid_info\n"); return -EINVAL; } @@ -4455,7 +4458,6 @@ int atomisp_color_effect(struct atomisp_sub_device *asd, int flag, return 0; } - control.id = V4L2_CID_COLORFX; control.value = *effect; ret = @@ -4537,7 +4539,6 @@ int atomisp_color_effect(struct atomisp_sub_device *asd, int flag, int atomisp_bad_pixel(struct atomisp_sub_device *asd, int flag, __s32 *value) { - if (flag == 0) { *value = asd->params.bad_pixel_en; return 0; @@ -4588,7 +4589,6 @@ int atomisp_video_stable(struct atomisp_sub_device *asd, int flag, int atomisp_fixed_pattern(struct atomisp_sub_device *asd, int flag, __s32 *value) { - if (flag == 0) { *value = asd->params.fpn_en; return 0; @@ -4612,9 +4612,9 @@ atomisp_bytesperline_to_padded_width(unsigned int bytesperline, case CSS_FRAME_FORMAT_YUYV: case CSS_FRAME_FORMAT_RAW: case CSS_FRAME_FORMAT_RGB565: - return bytesperline/2; + return bytesperline / 2; case CSS_FRAME_FORMAT_RGBA888: - return bytesperline/4; + return bytesperline / 4; /* The following cases could be removed, but we leave them in to document the formats that are included. */ case CSS_FRAME_FORMAT_NV11: @@ -4696,7 +4696,7 @@ int atomisp_fixed_pattern_table(struct atomisp_sub_device *asd, struct atomisp_css_frame *raw_black_frame = NULL; int ret; - if (arg == NULL) + if (!arg) return -EINVAL; ret = atomisp_v4l2_framebuffer_to_css_frame(arg, &raw_black_frame); @@ -4838,7 +4838,7 @@ int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, mipi_info = atomisp_to_sensor_mipi_info( isp->inputs[asd->input_curr].camera); - if (mipi_info == NULL) + if (!mipi_info) return -EINVAL; memcpy(config, &mipi_info->data, sizeof(*config)); @@ -4855,7 +4855,7 @@ int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f) } static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, - uint16_t stream_index, struct atomisp_input_stream_info *stream_info) + u16 stream_index, struct atomisp_input_stream_info *stream_info) { int i; @@ -4874,7 +4874,7 @@ static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, } } -static void __atomisp_init_stream_info(uint16_t stream_index, +static void __atomisp_init_stream_info(u16 stream_index, struct atomisp_input_stream_info *stream_info) { int i; @@ -4905,16 +4905,16 @@ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, const struct atomisp_format_bridge *fmt; struct atomisp_input_stream_info *stream_info = (struct atomisp_input_stream_info *)snr_mbus_fmt->reserved; - uint16_t stream_index; + u16 stream_index; int source_pad = atomisp_subdev_source_pad(vdev); int ret; - if (isp->inputs[asd->input_curr].camera == NULL) + if (!isp->inputs[asd->input_curr].camera) return -EINVAL; stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); fmt = atomisp_get_format_bridge(f->fmt.pix.pixelformat); - if (fmt == NULL) { + if (!fmt) { dev_err(isp->dev, "unsupported pixelformat!\n"); fmt = atomisp_output_fmts; } @@ -4942,7 +4942,7 @@ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, snr_mbus_fmt->width, snr_mbus_fmt->height); fmt = atomisp_get_format_bridge_from_mbus(snr_mbus_fmt->code); - if (fmt == NULL) { + if (!fmt) { dev_err(isp->dev, "unknown sensor format 0x%8.8x\n", snr_mbus_fmt->code); return -EINVAL; @@ -4970,7 +4970,7 @@ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, /* Set the flag when resolution requested is * beyond the max value supported by sensor */ - if (res_overflow != NULL) + if (res_overflow) *res_overflow = true; } @@ -5087,6 +5087,7 @@ static inline int atomisp_set_sensor_mipi_to_isp( input_format = fc->css_stream_fmt; } else { struct v4l2_mbus_framefmt *sink; + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK); @@ -5251,7 +5252,7 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, int (*configure_pp_input)(struct atomisp_sub_device *asd, unsigned int width, unsigned int height) = configure_pp_input_nop; - uint16_t stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); + u16 stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); const struct atomisp_in_fmt_conv *fc; int ret; @@ -5262,7 +5263,7 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, ATOMISP_SUBDEV_PAD_SINK, V4L2_SEL_TGT_CROP); format = atomisp_get_format_bridge(pix->pixelformat); - if (format == NULL) + if (!format) return -EINVAL; if (isp->inputs[asd->input_curr].type != TEST_PATTERN && @@ -5557,7 +5558,6 @@ static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, asd->copy_mode = false; dev_dbg(asd->isp->dev, "copy_mode: %d\n", asd->copy_mode); - } static int atomisp_set_fmt_to_snr(struct video_device *vdev, @@ -5576,7 +5576,7 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, struct atomisp_device *isp = asd->isp; struct atomisp_input_stream_info *stream_info = (struct atomisp_input_stream_info *)ffmt->reserved; - uint16_t stream_index = ATOMISP_INPUT_STREAM_GENERAL; + u16 stream_index = ATOMISP_INPUT_STREAM_GENERAL; int source_pad = atomisp_subdev_source_pad(vdev); struct v4l2_subdev_fh fh; int ret; @@ -5586,7 +5586,7 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); format = atomisp_get_format_bridge(pixelformat); - if (format == NULL) + if (!format) return -EINVAL; v4l2_fill_mbus_format(ffmt, &f->fmt.pix, format->mbus_code); @@ -5667,7 +5667,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) struct v4l2_mbus_framefmt isp_sink_fmt; struct v4l2_mbus_framefmt isp_source_fmt = {0}; struct v4l2_rect isp_sink_crop; - uint16_t source_pad = atomisp_subdev_source_pad(vdev); + u16 source_pad = atomisp_subdev_source_pad(vdev); struct v4l2_subdev_fh fh; int ret; @@ -5687,7 +5687,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) v4l2_fh_init(&fh.vfh, vdev); format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); - if (format_bridge == NULL) + if (!format_bridge) return -EINVAL; pipe->sh_fmt = format_bridge->sh_fmt; @@ -5736,7 +5736,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) (asd->isp->inputs[asd->input_curr].camera_caps-> sensor[asd->sensor_curr].stream_num > 1)) { /* For M10MO outputing YUV preview images. */ - uint16_t video_index = + u16 video_index = atomisp_source_pad_to_stream_id(asd, ATOMISP_SUBDEV_PAD_SOURCE_VIDEO); @@ -6064,7 +6064,6 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) output_info.padded_width, 8); pipe->pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * pipe->pix.bytesperline); - } if (f->fmt.pix.field == V4L2_FIELD_ANY) f->fmt.pix.field = V4L2_FIELD_NONE; @@ -6109,7 +6108,7 @@ int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f) } format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); - if (format_bridge == NULL) { + if (!format_bridge) { dev_dbg(isp->dev, "atomisp_get_format_bridge err! fmt:0x%x\n", f->fmt.pix.pixelformat); return -EINVAL; @@ -6186,7 +6185,7 @@ int atomisp_set_shading_table(struct atomisp_sub_device *asd, asd->params.sc_en = true; out: - if (free_table != NULL) + if (free_table) atomisp_css_shading_table_free(free_table); return ret; @@ -6226,6 +6225,7 @@ int atomisp_ospm_dphy_down(struct atomisp_device *isp) int atomisp_ospm_dphy_up(struct atomisp_device *isp) { unsigned long flags; + dev_dbg(isp->dev, "%s\n", __func__); spin_lock_irqsave(&isp->lock, flags); @@ -6235,7 +6235,6 @@ int atomisp_ospm_dphy_up(struct atomisp_device *isp) return 0; } - int atomisp_exif_makernote(struct atomisp_sub_device *asd, struct atomisp_makernote_info *config) { @@ -6286,6 +6285,7 @@ int atomisp_offline_capture_configure(struct atomisp_sub_device *asd, V4L2_CID_START_ZSL_CAPTURE); if (c) { int ret; + dev_dbg(asd->isp->dev, "%s trigger ZSL capture request\n", __func__); /* TODO: use the cvf_config */ @@ -6447,6 +6447,7 @@ static int __checking_exp_id(struct atomisp_sub_device *asd, int exp_id) void atomisp_init_raw_buffer_bitmap(struct atomisp_sub_device *asd) { unsigned long flags; + spin_lock_irqsave(&asd->raw_buffer_bitmap_lock, flags); memset(asd->raw_buffer_bitmap, 0, sizeof(asd->raw_buffer_bitmap)); asd->raw_buffer_locked_count = 0; @@ -6582,7 +6583,7 @@ int atomisp_enable_dz_capt_pipe(struct atomisp_sub_device *asd, { bool value; - if (enable == NULL) + if (!enable) return -EINVAL; value = *enable > 0 ? true : false; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h index 79d493dba4037..a403ff95a2a99 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h @@ -344,7 +344,6 @@ int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f); - /* This function looks up the closest available resolution. */ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, bool *res_overflow); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h index aac0eccee7983..e74b205a9537e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h @@ -202,7 +202,7 @@ int atomisp_css_dequeue_buffer(struct atomisp_sub_device *asd, struct atomisp_css_buffer *isp_css_buffer); int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, - uint16_t stream_id, + u16 stream_id, struct atomisp_s3a_buf *s3a_buf, struct atomisp_dis_buf *dis_buf, struct atomisp_metadata_buf *md_buf); @@ -422,7 +422,7 @@ int atomisp_css_video_configure_output(struct atomisp_sub_device *asd, enum atomisp_css_frame_format format); int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, - uint16_t source_pad, + u16 source_pad, struct atomisp_css_frame_info *frame_info); int atomisp_css_video_configure_viewfinder(struct atomisp_sub_device *asd, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c index 7d202db04808a..56c69b4738987 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c @@ -118,7 +118,7 @@ static void atomisp_css2_hw_store_32(hrt_address addr, uint32_t data) static uint8_t atomisp_css2_hw_load_8(hrt_address addr) { unsigned long flags; - uint8_t ret; + u8 ret; spin_lock_irqsave(&mmio_lock, flags); ret = _hrt_master_port_load_8(addr); @@ -129,7 +129,7 @@ static uint8_t atomisp_css2_hw_load_8(hrt_address addr) static uint16_t atomisp_css2_hw_load_16(hrt_address addr) { unsigned long flags; - uint16_t ret; + u16 ret; spin_lock_irqsave(&mmio_lock, flags); ret = _hrt_master_port_load_16(addr); @@ -140,7 +140,7 @@ static uint16_t atomisp_css2_hw_load_16(hrt_address addr) static uint32_t atomisp_css2_hw_load_32(hrt_address addr) { unsigned long flags; - uint32_t ret; + u32 ret; spin_lock_irqsave(&mmio_lock, flags); ret = _hrt_master_port_load_32(addr); @@ -158,7 +158,7 @@ static void atomisp_css2_hw_store(hrt_address addr, spin_lock_irqsave(&mmio_lock, flags); for (i = 0; i < n; i++, _to++, _from++) - _hrt_master_port_store_8(_to , *_from); + _hrt_master_port_store_8(_to, *_from); spin_unlock_irqrestore(&mmio_lock, flags); } @@ -202,9 +202,10 @@ void atomisp_load_uint32(hrt_address addr, uint32_t *data) { *data = atomisp_css2_hw_load_32(addr); } + static int hmm_get_mmu_base_addr(unsigned int *mmu_base_addr) { - if (sh_mmu_mrfld.get_pd_base == NULL) { + if (!sh_mmu_mrfld.get_pd_base) { dev_err(atomisp_dev, "get mmu base address failed.\n"); return -EINVAL; } @@ -515,6 +516,7 @@ static int __destroy_streams(struct atomisp_sub_device *asd, bool force) asd->stream_prepared = false; return 0; } + static int __create_stream(struct atomisp_sub_device *asd, struct atomisp_stream_env *stream_env) { @@ -598,7 +600,6 @@ static int __destroy_pipes(struct atomisp_sub_device *asd, bool force) for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { if (asd->stream_env[i].stream) { - dev_err(isp->dev, "cannot destroy css pipes for stream[%d].\n", i); @@ -1286,7 +1287,6 @@ void atomisp_css_update_isp_params(struct atomisp_sub_device *asd) atomisp_isp_parameters_clean_up(&asd->params.config); } - void atomisp_css_update_isp_params_on_pipe(struct atomisp_sub_device *asd, struct ia_css_pipe *pipe) { @@ -1347,7 +1347,7 @@ int atomisp_css_dequeue_buffer(struct atomisp_sub_device *asd, } int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, - uint16_t stream_id, + u16 stream_id, struct atomisp_s3a_buf *s3a_buf, struct atomisp_dis_buf *dis_buf, struct atomisp_metadata_buf *md_buf) @@ -1566,8 +1566,7 @@ int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, || asd->params.curr_grid_info.s3a_grid.height == 0) && asd->params.metadata_width_size == md_width) { dev_dbg(isp->dev, - "grid info change escape. memcmp=%d, s3a_user_stat=%d," - "dvs_stat=%d, s3a.width=%d, s3a.height=%d, metadata width =%d\n", + "grid info change escape. memcmp=%d, s3a_user_stat=%d,dvs_stat=%d, s3a.width=%d, s3a.height=%d, metadata width =%d\n", !memcmp(&old_info, &asd->params.curr_grid_info, sizeof(old_info)), !!asd->params.s3a_user_stat, !!asd->params.dvs_stat, @@ -1687,7 +1686,6 @@ void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, else ia_css_get_dvs2_statistics(asd->params.dvs_stat, isp_css_buffer->css_buffer.data.stats_dvs); - } } @@ -1787,7 +1785,6 @@ void atomisp_css_isys_set_format(struct atomisp_sub_device *asd, enum atomisp_input_format format, int isys_stream) { - struct ia_css_stream_config *s_config = &asd->stream_env[stream_id].stream_config; @@ -1798,7 +1795,6 @@ void atomisp_css_input_set_format(struct atomisp_sub_device *asd, enum atomisp_input_stream_id stream_id, enum atomisp_input_format format) { - struct ia_css_stream_config *s_config = &asd->stream_env[stream_id].stream_config; @@ -2026,8 +2022,7 @@ void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, else size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_1; dev_warn(asd->isp->dev, - "ia_css_mipi_frame_calculate_size failed," - "applying pre-defined MIPI buffer size %u.\n", + "ia_css_mipi_frame_calculate_size failed,applying pre-defined MIPI buffer size %u.\n", size_mem_words); } s_config->mipi_buffer_config.size_mem_words = size_mem_words; @@ -2390,7 +2385,6 @@ static enum ia_css_pipe_mode __pipe_id_to_pipe_mode( WARN_ON(1); return IA_CSS_PIPE_MODE_PREVIEW; } - } static void __configure_output(struct atomisp_sub_device *asd, @@ -2912,7 +2906,7 @@ static unsigned int atomisp_get_pipe_index(struct atomisp_sub_device *asd, } int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, - uint16_t source_pad, + u16 source_pad, struct atomisp_css_frame_info *frame_info) { struct ia_css_pipe_info info; @@ -3555,7 +3549,7 @@ void atomisp_css_set_ctc_table(struct atomisp_sub_device *asd, struct atomisp_css_ctc_table *ctc_table) { int i; - uint16_t *vamem_ptr = ctc_table->data.vamem_1; + u16 *vamem_ptr = ctc_table->data.vamem_1; int data_size = IA_CSS_VAMEM_1_CTC_TABLE_SIZE; bool valid = false; @@ -3653,22 +3647,22 @@ int atomisp_css_set_dis_coefs(struct atomisp_sub_device *asd, try again. */ return -EAGAIN; - if (coefs->hor_coefs.odd_real == NULL || - coefs->hor_coefs.odd_imag == NULL || - coefs->hor_coefs.even_real == NULL || - coefs->hor_coefs.even_imag == NULL || - coefs->ver_coefs.odd_real == NULL || - coefs->ver_coefs.odd_imag == NULL || - coefs->ver_coefs.even_real == NULL || - coefs->ver_coefs.even_imag == NULL || - asd->params.css_param.dvs2_coeff->hor_coefs.odd_real == NULL || - asd->params.css_param.dvs2_coeff->hor_coefs.odd_imag == NULL || - asd->params.css_param.dvs2_coeff->hor_coefs.even_real == NULL || - asd->params.css_param.dvs2_coeff->hor_coefs.even_imag == NULL || - asd->params.css_param.dvs2_coeff->ver_coefs.odd_real == NULL || - asd->params.css_param.dvs2_coeff->ver_coefs.odd_imag == NULL || - asd->params.css_param.dvs2_coeff->ver_coefs.even_real == NULL || - asd->params.css_param.dvs2_coeff->ver_coefs.even_imag == NULL) + if (!coefs->hor_coefs.odd_real || + !coefs->hor_coefs.odd_imag || + !coefs->hor_coefs.even_real || + !coefs->hor_coefs.even_imag || + !coefs->ver_coefs.odd_real || + !coefs->ver_coefs.odd_imag || + !coefs->ver_coefs.even_real || + !coefs->ver_coefs.even_imag || + !asd->params.css_param.dvs2_coeff->hor_coefs.odd_real || + !asd->params.css_param.dvs2_coeff->hor_coefs.odd_imag || + !asd->params.css_param.dvs2_coeff->hor_coefs.even_real || + !asd->params.css_param.dvs2_coeff->hor_coefs.even_imag || + !asd->params.css_param.dvs2_coeff->ver_coefs.odd_real || + !asd->params.css_param.dvs2_coeff->ver_coefs.odd_imag || + !asd->params.css_param.dvs2_coeff->ver_coefs.even_real || + !asd->params.css_param.dvs2_coeff->ver_coefs.even_imag) return -EINVAL; if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.odd_real, @@ -3724,7 +3718,7 @@ void atomisp_css_set_zoom_factor(struct atomisp_sub_device *asd, asd->params.css_param.dz_config.dy = zoom; asd->params.css_param.update_flag.dz_config = - (struct atomisp_dz_config *) &asd->params.css_param.dz_config; + (struct atomisp_dz_config *)&asd->params.css_param.dz_config; asd->params.css_update_params_needed = true; } @@ -4047,7 +4041,6 @@ int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, return 0; } - /* * Function to set/get image stablization statistics */ @@ -4058,14 +4051,14 @@ int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd, struct atomisp_dis_buf *dis_buf; unsigned long flags; - if (asd->params.dvs_stat->hor_prod.odd_real == NULL || - asd->params.dvs_stat->hor_prod.odd_imag == NULL || - asd->params.dvs_stat->hor_prod.even_real == NULL || - asd->params.dvs_stat->hor_prod.even_imag == NULL || - asd->params.dvs_stat->ver_prod.odd_real == NULL || - asd->params.dvs_stat->ver_prod.odd_imag == NULL || - asd->params.dvs_stat->ver_prod.even_real == NULL || - asd->params.dvs_stat->ver_prod.even_imag == NULL) + if (!asd->params.dvs_stat->hor_prod.odd_real || + !asd->params.dvs_stat->hor_prod.odd_imag || + !asd->params.dvs_stat->hor_prod.even_real || + !asd->params.dvs_stat->hor_prod.even_imag || + !asd->params.dvs_stat->ver_prod.odd_real || + !asd->params.dvs_stat->ver_prod.odd_imag || + !asd->params.dvs_stat->ver_prod.even_real || + !asd->params.dvs_stat->ver_prod.even_imag) return -EINVAL; /* isp needs to be streaming to get DIS statistics */ @@ -4646,12 +4639,12 @@ int atomisp_css_dump_blob_infor(void) if (nm == 0) return -EPERM; - if (bd == NULL) + if (!bd) return -EPERM; for (i = 1; i < sh_css_num_binaries; i++) dev_dbg(atomisp_dev, "Num%d binary id is %d, name is %s\n", i, - bd[i-1].header.info.isp.sp.id, bd[i-1].name); + bd[i - 1].header.info.isp.sp.id, bd[i - 1].name); return 0; } @@ -4683,6 +4676,7 @@ int atomisp_set_css_dbgfunc(struct atomisp_device *isp, int opt) return ret; } + void atomisp_en_dz_capt_pipe(struct atomisp_sub_device *asd, bool enable) { ia_css_en_dz_capt_pipe( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c index fd535502ddaed..fb06dcbc96ed5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c @@ -253,7 +253,6 @@ static int put_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, return 0; } - static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp, struct atomisp_metadata32 __user *up) { @@ -274,7 +273,6 @@ static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp, return 0; } - static int put_atomisp_metadata_stat32(struct atomisp_metadata *kp, struct atomisp_metadata32 __user *up) { @@ -387,6 +385,7 @@ static int get_atomisp_overlay32(struct atomisp_overlay *kp, struct atomisp_overlay32 __user *up) { compat_uptr_t frame; + if (!access_ok(up, sizeof(struct atomisp_overlay32)) || get_user(frame, &up->frame) || get_user(kp->bg_y, &up->bg_y) || @@ -761,6 +760,7 @@ static int get_atomisp_acc_fw_load_to_pipe32( struct atomisp_acc_fw_load_to_pipe32 __user *up) { compat_uptr_t data; + if (!access_ok(up, sizeof(struct atomisp_acc_fw_load_to_pipe32)) || get_user(kp->flags, &up->flags) || get_user(kp->fw_handle, &up->fw_handle) || @@ -781,6 +781,7 @@ static int put_atomisp_acc_fw_load_to_pipe32( struct atomisp_acc_fw_load_to_pipe32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); + if (!access_ok(up, sizeof(struct atomisp_acc_fw_load_to_pipe32)) || put_user(kp->flags, &up->flags) || put_user(kp->fw_handle, &up->fw_handle) || @@ -800,6 +801,7 @@ static int get_atomisp_sensor_ae_bracketing_lut( struct atomisp_sensor_ae_bracketing_lut32 __user *up) { compat_uptr_t lut; + if (!access_ok(up, sizeof(struct atomisp_sensor_ae_bracketing_lut32)) || get_user(kp->lut_size, &up->lut_size) || get_user(lut, &up->lut)) @@ -1066,7 +1068,6 @@ static long atomisp_do_compat_ioctl(struct file *file, long atomisp_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg) { - struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); long ret = -ENOIOCTLCMD; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h index 95669eedaad11..6091ac58b0063 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h @@ -49,7 +49,7 @@ struct atomisp_dvs2_statistics32 { struct atomisp_dis_statistics32 { struct atomisp_dvs2_statistics32 dvs2_stat; - uint32_t exp_id; + u32 exp_id; }; struct atomisp_dis_coefficients32 { @@ -62,27 +62,27 @@ struct atomisp_3a_statistics32 { struct atomisp_grid_info grid_info; compat_uptr_t data; compat_uptr_t rgby_data; - uint32_t exp_id; - uint32_t isp_config_id; + u32 exp_id; + u32 isp_config_id; }; struct atomisp_metadata_with_type32 { /* to specify which type of metadata to get */ enum atomisp_metadata_type type; compat_uptr_t data; - uint32_t width; - uint32_t height; - uint32_t stride; /* in bytes */ - uint32_t exp_id; /* exposure ID */ + u32 width; + u32 height; + u32 stride; /* in bytes */ + u32 exp_id; /* exposure ID */ compat_uptr_t effective_width; }; struct atomisp_metadata32 { compat_uptr_t data; - uint32_t width; - uint32_t height; - uint32_t stride; - uint32_t exp_id; + u32 width; + u32 height; + u32 stride; + u32 exp_id; compat_uptr_t effective_width; }; @@ -258,8 +258,8 @@ struct atomisp_parameters32 { * Unique ID to track which config was actually applied to a particular * frame, driver will send this id back with output frame together. */ - uint32_t isp_config_id; - uint32_t per_frame_setting; + u32 isp_config_id; + u32 per_frame_setting; }; struct atomisp_acc_fw_load_to_pipe32 { @@ -272,11 +272,11 @@ struct atomisp_acc_fw_load_to_pipe32 { }; struct atomisp_dvs_6axis_config32 { - uint32_t exp_id; - uint32_t width_y; - uint32_t height_y; - uint32_t width_uv; - uint32_t height_uv; + u32 exp_id; + u32 width_y; + u32 height_y; + u32 width_uv; + u32 height_uv; compat_uptr_t xcoords_y; compat_uptr_t ycoords_y; compat_uptr_t xcoords_uv; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c index 760b29ec546c0..0fce3d6bfdd36 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c @@ -23,9 +23,9 @@ static struct v4l2_mbus_framefmt *__csi2_get_format(struct atomisp_mipi_csi2_device - *csi2, + * csi2, struct - v4l2_subdev_pad_config *cfg, + v4l2_subdev_pad_config * cfg, enum v4l2_subdev_format_whence which, unsigned int pad) @@ -155,7 +155,7 @@ static int csi2_set_format(struct v4l2_subdev *sd, */ static int csi2_set_stream(struct v4l2_subdev *sd, int enable) { - return 0; + return 0; } /* subdev core operations */ @@ -345,6 +345,7 @@ static void atomisp_csi2_configure_isp2401(struct atomisp_sub_device *asd) static const short int coeff_dat_settle[] = { 85, -2 }; static const int TERMEN_DEFAULT = 0 * 0; static const int SETTLE_DEFAULT = 0x480; + static const hrt_address csi2_port_base[] = { [ATOMISP_CAMERA_PORT_PRIMARY] = CSI2_PORT_A_BASE, [ATOMISP_CAMERA_PORT_SECONDARY] = CSI2_PORT_B_BASE, @@ -396,6 +397,7 @@ static void atomisp_csi2_configure_isp2401(struct atomisp_sub_device *asd) mipi_freq, SETTLE_DEFAULT); for (n = 0; n < csi2_port_lanes[port] + 1; n++) { hrt_address base = csi2_port_base[port] + csi2_lane_base[n]; + atomisp_store_uint32(base + CSI2_REG_RX_CSI_DLY_CNT_TERMEN, n == 0 ? clk_termen : dat_termen); atomisp_store_uint32(base + CSI2_REG_RX_CSI_DLY_CNT_SETTLE, @@ -439,4 +441,3 @@ int atomisp_mipi_csi2_init(struct atomisp_device *isp) atomisp_mipi_csi2_cleanup(isp); return ret; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h index 0191d28a55bca..ccd5f08f7575f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h @@ -24,8 +24,8 @@ #define CSI2_PAD_SOURCE 1 #define CSI2_PADS_NUM 2 -#define CSI2_OUTPUT_ISP_SUBDEV (1 << 0) -#define CSI2_OUTPUT_MEMORY (1 << 1) +#define CSI2_OUTPUT_ISP_SUBDEV BIT(0) +#define CSI2_OUTPUT_MEMORY BIT(1) struct atomisp_device; struct v4l2_device; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h index 54e28605b5de7..e3acf78816275 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h @@ -27,7 +27,6 @@ struct atomisp_freq_scaling_rule { unsigned int run_mode; }; - struct atomisp_dfs_config { unsigned int lowest_freq; unsigned int max_freq_at_vmin; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c index a815c768bda94..a431cc472bdfa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c @@ -41,9 +41,9 @@ struct _iunit_debug { unsigned int dbgopt; }; -#define OPTION_BIN_LIST (1<<0) -#define OPTION_BIN_RUN (1<<1) -#define OPTION_MEM_STAT (1<<2) +#define OPTION_BIN_LIST BIT(0) +#define OPTION_BIN_RUN BIT(1) +#define OPTION_MEM_STAT BIT(2) #define OPTION_VALID (OPTION_BIN_LIST \ | OPTION_BIN_RUN \ | OPTION_MEM_STAT) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c index c6d96987561db..354a28ef129ae 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c @@ -87,6 +87,7 @@ static int file_input_get_fmt(struct v4l2_subdev *sd, /* only support file injection on subdev0 */ struct atomisp_sub_device *asd = &isp->asd[0]; struct v4l2_mbus_framefmt *isp_sink_fmt; + if (format->pad) return -EINVAL; isp_sink_fmt = atomisp_subdev_get_ffmt(&asd->subdev, NULL, @@ -105,6 +106,7 @@ static int file_input_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_format *format) { struct v4l2_mbus_framefmt *fmt = &format->format; + if (format->pad) return -EINVAL; file_input_get_fmt(sd, cfg, format); @@ -206,7 +208,7 @@ int atomisp_file_input_init(struct atomisp_device *isp) file_dev->isp = isp; file_dev->work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1); - if (file_dev->work_queue == NULL) { + if (!file_dev->work_queue) { dev_err(isp->dev, "Failed to initialize file inject workq\n"); return -ENOMEM; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c index 09b47edc690b7..4271a5cc8f662 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c @@ -410,7 +410,6 @@ static int atomisp_qbuffers_to_css_for_all_pipes(struct atomisp_sub_device *asd) return 0; } - /* queue all available buffers to css */ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) { @@ -737,6 +736,7 @@ static void atomisp_subdev_init_struct(struct atomisp_sub_device *asd) asd->sensor_array_res.width = 0; atomisp_css_init_struct(asd); } + /* * file operation functions */ @@ -753,6 +753,7 @@ static unsigned int atomisp_subdev_users(struct atomisp_sub_device *asd) unsigned int atomisp_dev_users(struct atomisp_device *isp) { unsigned int i, sum; + for (i = 0, sum = 0; i < isp->num_of_streams; i++) sum += atomisp_subdev_users(&isp->asd[i]); @@ -902,7 +903,7 @@ static int atomisp_release(struct file *file) v4l2_fh_init(&fh.vfh, vdev); req.count = 0; - if (isp == NULL) + if (!isp) return -EBADF; mutex_lock(&isp->streamoff_mutex); @@ -960,6 +961,7 @@ static int atomisp_release(struct file *file) */ if (!isp->sw_contex.file_input && asd->fmt_auto->val) { struct v4l2_mbus_framefmt isp_sink_fmt = { 0 }; + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK, &isp_sink_fmt); @@ -971,6 +973,7 @@ static int atomisp_release(struct file *file) /* clear the sink pad for file input */ if (isp->sw_contex.file_input && asd->fmt_auto->val) { struct v4l2_mbus_framefmt isp_sink_fmt = { 0 }; + atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK, &isp_sink_fmt); @@ -1090,7 +1093,8 @@ int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q, mutex_lock(&q->vb_lock); for (i = 0; i < VIDEO_MAX_FRAME; i++) { struct videobuf_buffer *buf = q->bufs[i]; - if (buf == NULL) + + if (!buf) continue; map = kzalloc(sizeof(struct videobuf_mapping), GFP_KERNEL); @@ -1108,7 +1112,7 @@ int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q, buf->boff == offset) { vm_mem = buf->priv; ret = frame_mmap(isp, vm_mem->vaddr, vma); - vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP; + vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP; break; } } @@ -1130,17 +1134,17 @@ static int remove_pad_from_frame(struct atomisp_device *isp, ia_css_ptr load = in_frame->data; ia_css_ptr store = load; - buffer = kmalloc(width*sizeof(load), GFP_KERNEL); + buffer = kmalloc_array(width, sizeof(load), GFP_KERNEL); if (!buffer) return -ENOMEM; load += ISP_LEFT_PAD; for (i = 0; i < height; i++) { - ret = hmm_load(load, buffer, width*sizeof(load)); + ret = hmm_load(load, buffer, width * sizeof(load)); if (ret < 0) goto remove_pad_error; - ret = hmm_store(store, buffer, width*sizeof(store)); + ret = hmm_store(store, buffer, width * sizeof(store)); if (ret < 0) goto remove_pad_error; @@ -1194,7 +1198,7 @@ static int atomisp_mmap(struct file *file, struct vm_area_struct *vma) goto error; } raw_virt_addr = asd->raw_output_frame; - if (raw_virt_addr == NULL) { + if (!raw_virt_addr) { dev_err(isp->dev, "Failed to request RAW frame\n"); ret = -EINVAL; goto error; @@ -1222,7 +1226,7 @@ static int atomisp_mmap(struct file *file, struct vm_area_struct *vma) goto error; } raw_virt_addr->data_bytes = origin_size; - vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP; + vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP; rt_mutex_unlock(&isp->mutex); return 0; } @@ -1299,4 +1303,3 @@ const struct v4l2_file_operations atomisp_file_fops = { #endif .poll = atomisp_poll, }; - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h index 55ba185b43a08..56035063f81d7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h @@ -26,4 +26,3 @@ static inline void __iomem *atomisp_get_io_virt_addr(unsigned int address) return ret; } #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h index a2a15725cd488..a5412433835dd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h @@ -156,7 +156,7 @@ #endif #define DIV_NEAREST_STEP(n, d, step) \ - round_down((2 * (n) + (d) * (step))/(2 * (d)), (step)) + round_down((2 * (n) + (d) * (step)) / (2 * (d)), (step)) struct atomisp_input_subdev { unsigned int type; @@ -212,7 +212,6 @@ struct atomisp_sw_contex { int running_freq; }; - #define ATOMISP_DEVICE_STREAMING_DISABLED 0 #define ATOMISP_DEVICE_STREAMING_ENABLED 1 #define ATOMISP_DEVICE_STREAMING_STOPPING 2 @@ -295,16 +294,16 @@ extern struct device *atomisp_dev; #define atomisp_is_wdt_running(a) timer_pending(&(a)->wdt) #ifdef ISP2401 -extern void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, +void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, unsigned int delay); #endif -extern void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay); +void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay); #ifndef ISP2401 -extern void atomisp_wdt_start(struct atomisp_sub_device *asd); +void atomisp_wdt_start(struct atomisp_sub_device *asd); #else -extern void atomisp_wdt_start(struct atomisp_video_pipe *pipe); -extern void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync); +void atomisp_wdt_start(struct atomisp_video_pipe *pipe); +void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync); #endif -extern void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync); +void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync); #endif /* __ATOMISP_INTERNAL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c index 712408eee3e66..d4eef9f76e6aa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c @@ -20,7 +20,6 @@ #include #include - #include #include #include @@ -333,6 +332,7 @@ static struct v4l2_queryctrl ci_v4l2_controls[] = { .default_value = 0, }, }; + static const u32 ctrls_num = ARRAY_SIZE(ci_v4l2_controls); /* @@ -651,6 +651,7 @@ unsigned int atomisp_is_acc_enabled(struct atomisp_device *isp) return 0; } + /* * get input are used to get current primary/secondary camera */ @@ -666,6 +667,7 @@ static int atomisp_g_input(struct file *file, void *fh, unsigned int *input) return 0; } + /* * set input are used to set current primary/secondary camera */ @@ -689,7 +691,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) * 1: already in use * 2: if in use, whether it is used by other streams */ - if (isp->inputs[input].asd != NULL && isp->inputs[input].asd != asd) { + if (isp->inputs[input].asd && isp->inputs[input].asd != asd) { dev_err(isp->dev, "%s, camera is already used by stream: %d\n", __func__, isp->inputs[input].asd->index); @@ -898,7 +900,7 @@ void atomisp_videobuf_free_buf(struct videobuf_buffer *vb) { struct videobuf_vmalloc_memory *vm_mem; - if (vb == NULL) + if (!vb) return; vm_mem = vb->priv; @@ -1037,8 +1039,8 @@ int __atomisp_reqbufs(struct file *file, void *fh, struct atomisp_css_frame_info frame_info; struct atomisp_css_frame *frame; struct videobuf_vmalloc_memory *vm_mem; - uint16_t source_pad = atomisp_subdev_source_pad(vdev); - uint16_t stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); + u16 source_pad = atomisp_subdev_source_pad(vdev); + u16 stream_id = atomisp_source_pad_to_stream_id(asd, source_pad); int ret = 0, i = 0; if (req->count == 0) { @@ -1194,6 +1196,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) */ if (buf->memory == V4L2_MEMORY_USERPTR) { struct hrt_userbuffer_attr attributes; + vb = pipe->capq.bufs[buf->index]; vm_mem = vb->priv; if (!vm_mem) { @@ -1338,7 +1341,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) asd->pending_capture_request++; dev_dbg(isp->dev, "Add one pending capture request.\n"); #else - if (asd->re_trigger_capture) { + if (asd->re_trigger_capture) { ret = atomisp_css_offline_capture_configure(asd, asd->params.offline_parm.num_captures, asd->params.offline_parm.skip_frames, @@ -1347,11 +1350,11 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n", __func__, ret); - } else { + } else { asd->pending_capture_request++; asd->re_trigger_capture = false; dev_dbg(isp->dev, "Add one pending capture request.\n"); - } + } #endif } rt_mutex_unlock(&isp->mutex); @@ -1557,6 +1560,7 @@ int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, */ for (i = 0; i < isp->num_of_streams; i++) { int sensor_index = isp->asd[i].input_curr; + if (isp->inputs[sensor_index].camera_caps-> sensor[isp->asd[i].sensor_curr].is_slave) slave = sensor_index; @@ -1643,6 +1647,7 @@ static void atomisp_pause_buffer_event(struct atomisp_device *isp) for (i = 0; i < isp->num_of_streams; i++) { int sensor_index = isp->asd[i].input_curr; + if (isp->inputs[sensor_index].camera_caps-> sensor[isp->asd[i].sensor_curr].is_slave) { v4l2_event_queue(isp->asd[i].subdev.devnode, &event); @@ -1657,13 +1662,13 @@ static void atomisp_pause_buffer_event(struct atomisp_device *isp) /* manually to 128 in case of 13MPx snapshot and to 1 otherwise. */ static void atomisp_dma_burst_len_cfg(struct atomisp_sub_device *asd) { - struct v4l2_mbus_framefmt *sink; + sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK); - if (sink->width * sink->height >= 4096*3072) + if (sink->width * sink->height >= 4096 * 3072) atomisp_store_uint32(DMA_BURST_SIZE_REG, 0x7F); else atomisp_store_uint32(DMA_BURST_SIZE_REG, 0x00); @@ -1717,7 +1722,7 @@ static int atomisp_streamon(struct file *file, void *fh, sensor_start_stream = atomisp_sensor_start_stream(asd); spin_lock_irqsave(&pipe->irq_lock, irqflags); - if (list_empty(&(pipe->capq.stream))) { + if (list_empty(&pipe->capq.stream)) { spin_unlock_irqrestore(&pipe->irq_lock, irqflags); dev_dbg(isp->dev, "no buffer in the queue\n"); ret = -EINVAL; @@ -1971,7 +1976,6 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && atomisp_subdev_source_pad(vdev) != ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { - if (isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) { v4l2_subdev_call(isp->inputs[asd->input_curr].camera, video, s_stream, 0); @@ -2138,6 +2142,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) if (isp->sw_contex.power_state == ATOM_ISP_POWER_UP) { unsigned int i; bool recreate_streams[MAX_STREAM_NUM] = {0}; + if (isp->isp_timeout) dev_err(isp->dev, "%s: Resetting with WA activated", __func__); @@ -2345,6 +2350,7 @@ static int atomisp_s_ctrl(struct file *file, void *fh, rt_mutex_unlock(&isp->mutex); return ret; } + /* * To query the attributes of a control. * applications set the id field of a struct v4l2_queryctrl and call the diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c index 673b9a25f6013..b92d3bf593a00 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c @@ -127,10 +127,11 @@ bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd, && !atomisp_is_mbuscode_raw(src->code); } -uint16_t atomisp_subdev_source_pad(struct video_device * vdev) +uint16_t atomisp_subdev_source_pad(struct video_device *vdev) { struct media_link *link; - uint16_t ret = 0; + u16 ret = 0; + list_for_each_entry(link, &vdev->entity.links, list) { if (link->source) { ret = link->source->index; @@ -243,7 +244,7 @@ static int isp_subdev_validate_rect(struct v4l2_subdev *sd, uint32_t pad, struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, - uint32_t which, uint32_t pad, + u32 which, uint32_t pad, uint32_t target) { struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); @@ -299,7 +300,7 @@ static void isp_get_fmt_rect(struct v4l2_subdev *sd, static void isp_subdev_propagate(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, - uint32_t which, uint32_t pad, uint32_t target, + u32 which, uint32_t pad, uint32_t target, uint32_t flags) { struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM]; @@ -353,13 +354,13 @@ static char *atomisp_pad_str[] = { "ATOMISP_SUBDEV_PAD_SINK", int atomisp_subdev_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, - uint32_t which, uint32_t pad, uint32_t target, - uint32_t flags, struct v4l2_rect *r) + u32 which, uint32_t pad, uint32_t target, + u32 flags, struct v4l2_rect *r) { struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); struct atomisp_device *isp = isp_sd->isp; struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM]; - uint16_t vdev_pad = atomisp_subdev_source_pad(sd->devnode); + u16 vdev_pad = atomisp_subdev_source_pad(sd->devnode); struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM], *comp[ATOMISP_SUBDEV_PADS_NUM]; enum atomisp_input_stream_id stream_id; @@ -551,6 +552,7 @@ static int isp_subdev_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_selection *sel) { int rval = isp_subdev_validate_rect(sd, sel->pad, sel->target); + if (rval) return rval; @@ -594,13 +596,13 @@ static int atomisp_get_sensor_bin_factor(struct atomisp_sub_device *asd) void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, uint32_t which, - uint32_t pad, struct v4l2_mbus_framefmt *ffmt) + u32 pad, struct v4l2_mbus_framefmt *ffmt) { struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); struct atomisp_device *isp = isp_sd->isp; struct v4l2_mbus_framefmt *__ffmt = atomisp_subdev_get_ffmt(sd, cfg, which, pad); - uint16_t vdev_pad = atomisp_subdev_source_pad(sd->devnode); + u16 vdev_pad = atomisp_subdev_source_pad(sd->devnode); enum atomisp_input_stream_id stream_id; dev_dbg(isp->dev, "ffmt: pad %s w %d h %d code 0x%8.8x which %s\n", @@ -1240,6 +1242,7 @@ int atomisp_create_pads_links(struct atomisp_device *isp) { struct atomisp_sub_device *asd; int i, j, ret = 0; + isp->num_of_streams = 2; for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) { for (j = 0; j < isp->num_of_streams; j++) { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h index 59ff8723c1827..6eb2661c3dece 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h @@ -56,8 +56,8 @@ enum atomisp_subdev_input_entity { struct atomisp_in_fmt_conv { u32 code; - uint8_t bpp; /* bits per pixel */ - uint8_t depth; /* uncompressed */ + u8 bpp; /* bits per pixel */ + u8 depth; /* uncompressed */ enum atomisp_input_format atomisp_in_fmt; enum atomisp_css_bayer_order bayer_order; enum atomisp_input_format css_stream_fmt; @@ -91,7 +91,7 @@ struct atomisp_video_pipe { struct atomisp_device *isp; struct v4l2_pix_format pix; - uint32_t sh_fmt; + u32 sh_fmt; struct atomisp_sub_device *asd; @@ -192,7 +192,7 @@ struct atomisp_css_params { * translate to ia_css_frame * and then set to CSS. */ void *output_frame; - uint32_t isp_config_id; + u32 isp_config_id; /* Indicates which parameters need to be updated. */ struct atomisp_parameters update_flag; @@ -238,11 +238,11 @@ struct atomisp_subdev_params { struct ia_css_3a_statistics *s3a_user_stat; void *metadata_user[ATOMISP_METADATA_TYPE_NUM]; - uint32_t metadata_width_size; + u32 metadata_width_size; struct ia_css_dvs2_statistics *dvs_stat; struct atomisp_css_dvs_6axis *dvs_6axis; - uint32_t exp_id; + u32 exp_id; int dvs_hor_coef_bytes; int dvs_ver_coef_bytes; int dvs_ver_proj_bytes; @@ -291,7 +291,7 @@ struct atomisp_sub_device { struct v4l2_subdev subdev; struct media_pad pads[ATOMISP_SUBDEV_PADS_NUM]; struct atomisp_pad_format fmt[ATOMISP_SUBDEV_PADS_NUM]; - uint16_t capture_pad; /* main capture pad; defines much of isp config */ + u16 capture_pad; /* main capture pad; defines much of isp config */ enum atomisp_subdev_input_entity input; unsigned int output; @@ -395,7 +395,7 @@ struct atomisp_sub_device { bool copy_mode; /* CSI2+ use copy mode */ bool yuvpp_mode; /* CSI2+ yuvpp pipe */ - int raw_buffer_bitmap[ATOMISP_MAX_EXP_ID/32 + 1]; /* Record each Raw Buffer lock status */ + int raw_buffer_bitmap[ATOMISP_MAX_EXP_ID / 32 + 1]; /* Record each Raw Buffer lock status */ int raw_buffer_locked_count; spinlock_t raw_buffer_bitmap_lock; @@ -442,16 +442,16 @@ struct v4l2_mbus_framefmt uint32_t pad); struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, - uint32_t which, uint32_t pad, + u32 which, uint32_t pad, uint32_t target); int atomisp_subdev_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, - uint32_t which, uint32_t pad, uint32_t target, - uint32_t flags, struct v4l2_rect *r); + u32 which, uint32_t pad, uint32_t target, + u32 flags, struct v4l2_rect *r); /* Actually set the format */ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, uint32_t which, - uint32_t pad, struct v4l2_mbus_framefmt *ffmt); + u32 pad, struct v4l2_mbus_framefmt *ffmt); int atomisp_update_run_mode(struct atomisp_sub_device *asd); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c index adc900272f6fb..1d233f2a69fdd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c @@ -134,7 +134,6 @@ int atomisp_tpg_register_entities(struct atomisp_tpg_device *tpg, void atomisp_tpg_cleanup(struct atomisp_device *isp) { - } int atomisp_tpg_init(struct atomisp_device *isp) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h index 462b296554c7b..13cdfc4f0976b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h @@ -54,9 +54,7 @@ TRACE_EVENT(camera_meminfo, ), TP_printk( - "<%s> User ptr memory:%d pages,\tISP private memory used:%d" - " pages:\tsysFP system size:%d,\treserved size:%d" - "\tcamFP sysUse:%d,\tdycUse:%d,\tresUse:%d.\n", + "<%s> User ptr memory:%d pages,\tISP private memory used:%d pages:\tsysFP system size:%d,\treserved size:%d\tcamFP sysUse:%d,\tdycUse:%d,\tresUse:%d.\n", __entry->name, __entry->uptr_size, __entry->counter, __entry->sys_size, __entry->sys_res_size, __entry->cam_sys_use, __entry->cam_dyc_use, __entry->cam_res_use) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index 9156e253d5bf2..5a68967d15c4a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -376,7 +376,6 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) return 0; } - /* * WA for DDR DVFS enable/disable * By default, ISP will force DDR DVFS 1600MHz before disable DVFS @@ -448,7 +447,6 @@ int atomisp_mrfld_power_down(struct atomisp_device *isp) } } - /* Workaround for pmu_nc_set_power_state not ready in MRFLD */ int atomisp_mrfld_power_up(struct atomisp_device *isp) { @@ -735,7 +733,7 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) int ret, raw_index = -1; pdata = atomisp_get_platform_data(); - if (pdata == NULL) { + if (!pdata) { dev_err(isp->dev, "no platform data available\n"); return 0; } @@ -748,7 +746,7 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id); int sensor_num, i; - if (adapter == NULL) { + if (!adapter) { dev_err(isp->dev, "Failed to find i2c adapter for subdev %s\n", board_info->type); @@ -766,7 +764,7 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) continue; } - if (subdev == NULL) { + if (!subdev) { dev_warn(isp->dev, "Subdev %s detection fail\n", board_info->type); continue; @@ -825,7 +823,6 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) dev_dbg(isp->dev, "unknown subdev probed\n"); break; } - } /* @@ -937,7 +934,7 @@ static int atomisp_register_entities(struct atomisp_device *isp) asd->delayed_init_workq = alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE, 1); - if (asd->delayed_init_workq == NULL) { + if (!asd->delayed_init_workq) { dev_err(isp->dev, "Failed to initialize delayed init workq\n"); ret = -ENOMEM; @@ -1037,7 +1034,6 @@ static int atomisp_initialize_modules(struct atomisp_device *isp) goto error_isp_subdev; } - return 0; error_isp_subdev: @@ -1128,7 +1124,7 @@ static int init_atomisp_wdts(struct atomisp_device *isp) atomic_set(&isp->wdt_work_queued, 0); isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1); - if (isp->wdt_work_queue == NULL) { + if (!isp->wdt_work_queue) { dev_err(isp->dev, "Failed to initialize wdt work queue\n"); err = -ENOMEM; goto alloc_fail; @@ -1174,7 +1170,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, atomisp_dev = &dev->dev; pdata = atomisp_get_platform_data(); - if (pdata == NULL) + if (!pdata) dev_warn(&dev->dev, "no platform data available\n"); err = pcim_enable_device(dev); @@ -1243,13 +1239,13 @@ static int atomisp_pci_probe(struct pci_dev *dev, (ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0; -#ifdef FIXME +#ifdef FIXME if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) || INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) { isp->dfs = &dfs_config_byt_cr; isp->hpll_freq = HPLL_FREQ_2000MHZ; } else -#endif +#endif { isp->dfs = &dfs_config_byt; isp->hpll_freq = HPLL_FREQ_1600MHZ; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h index 564be8ea751d6..55fe4b7011c27 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h @@ -44,7 +44,7 @@ struct ia_css_circbuf_s { * @param elems An array of elements. * @param desc The descriptor set to the size using ia_css_circbuf_desc_init(). */ -extern void ia_css_circbuf_create( +void ia_css_circbuf_create( ia_css_circbuf_t *cb, ia_css_circbuf_elem_t *elems, ia_css_circbuf_desc_t *desc); @@ -54,7 +54,7 @@ extern void ia_css_circbuf_create( * * @param cb The pointer to the circular buffer. */ -extern void ia_css_circbuf_destroy( +void ia_css_circbuf_destroy( ia_css_circbuf_t *cb); /** @@ -67,7 +67,7 @@ extern void ia_css_circbuf_destroy( * * @return the pop-out value. */ -extern uint32_t ia_css_circbuf_pop( +uint32_t ia_css_circbuf_pop( ia_css_circbuf_t *cb); /** @@ -81,7 +81,7 @@ extern uint32_t ia_css_circbuf_pop( * * @return the extracted value. */ -extern uint32_t ia_css_circbuf_extract( +uint32_t ia_css_circbuf_extract( ia_css_circbuf_t *cb, int offset); @@ -100,7 +100,7 @@ static inline void ia_css_circbuf_elem_set_val( ia_css_circbuf_elem_t *elem, uint32_t val) { - OP___assert(elem != NULL); + OP___assert(elem); elem->val = val; } @@ -113,7 +113,7 @@ static inline void ia_css_circbuf_elem_set_val( static inline void ia_css_circbuf_elem_init( ia_css_circbuf_elem_t *elem) { - OP___assert(elem != NULL); + OP___assert(elem); ia_css_circbuf_elem_set_val(elem, 0); } @@ -127,8 +127,8 @@ static inline void ia_css_circbuf_elem_cpy( ia_css_circbuf_elem_t *src, ia_css_circbuf_elem_t *dest) { - OP___assert(src != NULL); - OP___assert(dest != NULL); + OP___assert(src); + OP___assert(dest); ia_css_circbuf_elem_set_val(dest, src->val); } @@ -144,13 +144,13 @@ static inline void ia_css_circbuf_elem_cpy( */ static inline uint8_t ia_css_circbuf_get_pos_at_offset( ia_css_circbuf_t *cb, - uint32_t base, + u32 base, int offset) { - uint8_t dest; + u8 dest; - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); OP___assert(cb->desc->size > 0); /* step 1: adjudst the offset */ @@ -177,13 +177,13 @@ static inline uint8_t ia_css_circbuf_get_pos_at_offset( */ static inline int ia_css_circbuf_get_offset( ia_css_circbuf_t *cb, - uint32_t src_pos, + u32 src_pos, uint32_t dest_pos) { int offset; - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); offset = (int)(dest_pos - src_pos); offset += (offset < 0) ? cb->desc->size : 0; @@ -203,8 +203,8 @@ static inline int ia_css_circbuf_get_offset( static inline uint32_t ia_css_circbuf_get_size( ia_css_circbuf_t *cb) { - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); return cb->desc->size; } @@ -221,8 +221,8 @@ static inline uint32_t ia_css_circbuf_get_num_elems( { int num; - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); num = ia_css_circbuf_get_offset(cb, cb->desc->start, cb->desc->end); @@ -241,8 +241,8 @@ static inline uint32_t ia_css_circbuf_get_num_elems( static inline bool ia_css_circbuf_is_empty( ia_css_circbuf_t *cb) { - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); return ia_css_circbuf_desc_is_empty(cb->desc); } @@ -258,8 +258,8 @@ static inline bool ia_css_circbuf_is_empty( */ static inline bool ia_css_circbuf_is_full(ia_css_circbuf_t *cb) { - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); return ia_css_circbuf_desc_is_full(cb->desc); } @@ -277,8 +277,8 @@ static inline void ia_css_circbuf_write( ia_css_circbuf_t *cb, ia_css_circbuf_elem_t elem) { - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); /* Cannot continue as the queue is full*/ assert(!ia_css_circbuf_is_full(cb)); @@ -303,7 +303,7 @@ static inline void ia_css_circbuf_push( { ia_css_circbuf_elem_t elem; - OP___assert(cb != NULL); + OP___assert(cb); /* set up an element */ ia_css_circbuf_elem_init(&elem); @@ -323,8 +323,8 @@ static inline void ia_css_circbuf_push( static inline uint32_t ia_css_circbuf_get_free_elems( ia_css_circbuf_t *cb) { - OP___assert(cb != NULL); - OP___assert(cb->desc != NULL); + OP___assert(cb); + OP___assert(cb->desc); return ia_css_circbuf_desc_get_free_elems(cb->desc); } @@ -337,7 +337,7 @@ static inline uint32_t ia_css_circbuf_get_free_elems( * * @return the elements value. */ -extern uint32_t ia_css_circbuf_peek( +uint32_t ia_css_circbuf_peek( ia_css_circbuf_t *cb, int offset); @@ -349,7 +349,7 @@ extern uint32_t ia_css_circbuf_peek( * * @return the elements value. */ -extern uint32_t ia_css_circbuf_peek_from_start( +uint32_t ia_css_circbuf_peek_from_start( ia_css_circbuf_t *cb, int offset); @@ -362,13 +362,13 @@ extern uint32_t ia_css_circbuf_peek_from_start( * @param sz_delta delta increase for new size * @param elems (optional) pointers to new additional elements * cb element array size will not be increased dynamically, - * but new elements should be added at the end to existing - * cb element array which if of max_size >= new size + * but new elements should be added at the end to existing + * cb element array which if of max_size >= new size * * @return true on successfully increasing the size - * false on failure + * false on failure */ -extern bool ia_css_circbuf_increase_size( +bool ia_css_circbuf_increase_size( ia_css_circbuf_t *cb, unsigned int sz_delta, ia_css_circbuf_elem_t *elems); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h index 3fc0330b9526d..09b049b3bd15a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h @@ -35,11 +35,12 @@ */ typedef struct ia_css_circbuf_desc_s ia_css_circbuf_desc_t; struct ia_css_circbuf_desc_s { - uint8_t size; /* the maximum number of elements*/ - uint8_t step; /* number of bytes per element */ - uint8_t start; /* index of the oldest element */ - uint8_t end; /* index at which to write the new element */ + u8 size; /* the maximum number of elements*/ + u8 step; /* number of bytes per element */ + u8 start; /* index of the oldest element */ + u8 end; /* index at which to write the new element */ }; + #define SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT \ (4 * sizeof(uint8_t)) @@ -48,8 +49,9 @@ struct ia_css_circbuf_desc_s { */ typedef struct ia_css_circbuf_elem_s ia_css_circbuf_elem_t; struct ia_css_circbuf_elem_s { - uint32_t val; /* the value stored in the element */ + u32 val; /* the value stored in the element */ }; + #define SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT \ (sizeof(uint32_t)) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h index 8dd7cd6cd3d83..8724e60982879 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h @@ -37,7 +37,7 @@ static inline bool ia_css_circbuf_desc_is_empty( ia_css_circbuf_desc_t *cb_desc) { - OP___assert(cb_desc != NULL); + OP___assert(cb_desc); return (cb_desc->end == cb_desc->start); } @@ -54,7 +54,7 @@ static inline bool ia_css_circbuf_desc_is_empty( static inline bool ia_css_circbuf_desc_is_full( ia_css_circbuf_desc_t *cb_desc) { - OP___assert(cb_desc != NULL); + OP___assert(cb_desc); return (OP_std_modadd(cb_desc->end, 1, cb_desc->size) == cb_desc->start); } @@ -68,7 +68,7 @@ static inline void ia_css_circbuf_desc_init( ia_css_circbuf_desc_t *cb_desc, int8_t size) { - OP___assert(cb_desc != NULL); + OP___assert(cb_desc); cb_desc->size = size; } @@ -83,11 +83,12 @@ static inline void ia_css_circbuf_desc_init( */ static inline uint8_t ia_css_circbuf_desc_get_pos_at_offset( ia_css_circbuf_desc_t *cb_desc, - uint32_t base, + u32 base, int offset) { - uint8_t dest; - OP___assert(cb_desc != NULL); + u8 dest; + + OP___assert(cb_desc); OP___assert(cb_desc->size > 0); /* step 1: adjust the offset */ @@ -115,11 +116,12 @@ static inline uint8_t ia_css_circbuf_desc_get_pos_at_offset( */ static inline int ia_css_circbuf_desc_get_offset( ia_css_circbuf_desc_t *cb_desc, - uint32_t src_pos, + u32 src_pos, uint32_t dest_pos) { int offset; - OP___assert(cb_desc != NULL); + + OP___assert(cb_desc); offset = (int)(dest_pos - src_pos); offset += (offset < 0) ? cb_desc->size : 0; @@ -138,7 +140,8 @@ static inline uint32_t ia_css_circbuf_desc_get_num_elems( ia_css_circbuf_desc_t *cb_desc) { int num; - OP___assert(cb_desc != NULL); + + OP___assert(cb_desc); num = ia_css_circbuf_desc_get_offset(cb_desc, cb_desc->start, @@ -157,8 +160,9 @@ static inline uint32_t ia_css_circbuf_desc_get_num_elems( static inline uint32_t ia_css_circbuf_desc_get_free_elems( ia_css_circbuf_desc_t *cb_desc) { - uint32_t num; - OP___assert(cb_desc != NULL); + u32 num; + + OP___assert(cb_desc); num = ia_css_circbuf_desc_get_offset(cb_desc, cb_desc->start, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c index 050d60f0894f7..1c48ceea72061 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c @@ -45,7 +45,7 @@ ia_css_circbuf_read(ia_css_circbuf_t *cb); * @param chunk_dest The position to which the first element in the chunk would be shift. */ static inline void ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, - uint32_t chunk_src, + u32 chunk_src, uint32_t chunk_dest); /* @@ -72,7 +72,7 @@ ia_css_circbuf_create(ia_css_circbuf_t *cb, ia_css_circbuf_elem_t *elems, ia_css_circbuf_desc_t *desc) { - uint32_t i; + u32 i; OP___assert(desc); @@ -105,7 +105,7 @@ void ia_css_circbuf_destroy(ia_css_circbuf_t *cb) */ uint32_t ia_css_circbuf_pop(ia_css_circbuf_t *cb) { - uint32_t ret; + u32 ret; ia_css_circbuf_elem_t elem; assert(!ia_css_circbuf_is_empty(cb)); @@ -123,10 +123,10 @@ uint32_t ia_css_circbuf_pop(ia_css_circbuf_t *cb) uint32_t ia_css_circbuf_extract(ia_css_circbuf_t *cb, int offset) { int max_offset; - uint32_t val; - uint32_t pos; - uint32_t src_pos; - uint32_t dest_pos; + u32 val; + u32 pos; + u32 src_pos; + u32 dest_pos; /* get the maximum offest */ max_offset = ia_css_circbuf_get_offset(cb, cb->desc->start, cb->desc->end); @@ -204,8 +204,8 @@ bool ia_css_circbuf_increase_size( unsigned int sz_delta, ia_css_circbuf_elem_t *elems) { - uint8_t curr_size; - uint8_t curr_end; + u8 curr_size; + u8 curr_end; unsigned int i = 0; if (!cb || sz_delta == 0) @@ -288,7 +288,7 @@ ia_css_circbuf_read(ia_css_circbuf_t *cb) */ static inline void ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, - uint32_t chunk_src, uint32_t chunk_dest) + u32 chunk_src, uint32_t chunk_dest) { int chunk_offset; int chunk_sz; @@ -301,7 +301,6 @@ ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, /* shift each element to its terminal position */ for (i = 0; i < chunk_sz; i++) { - /* copy the element from the source to the destination */ ia_css_circbuf_elem_cpy(&cb->elems[chunk_src], &cb->elems[chunk_dest]); @@ -312,10 +311,8 @@ ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, /* adjust the source/terminal positions */ chunk_src = ia_css_circbuf_get_pos_at_offset(cb, chunk_src, -1); chunk_dest = ia_css_circbuf_get_pos_at_offset(cb, chunk_dest, -1); - } /* adjust the index "start" */ cb->desc->start = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, chunk_offset); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h index 20db4de6beeb6..7a0a03e7b9886 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h @@ -26,13 +26,13 @@ typedef void (*clear_func)(hrt_vaddress ptr); * \param[in] size Size of the refcount list. * \return ia_css_err */ -extern enum ia_css_err ia_css_refcount_init(uint32_t size); +enum ia_css_err ia_css_refcount_init(uint32_t size); /*! \brief Function for de-initializing refcount list * * \return None */ -extern void ia_css_refcount_uninit(void); +void ia_css_refcount_uninit(void); /*! \brief Function for increasing reference by 1. * @@ -40,7 +40,7 @@ extern void ia_css_refcount_uninit(void); * \param[in] ptr Data of the object (ptr). * \return hrt_vaddress (saved address) */ -extern hrt_vaddress ia_css_refcount_increment(int32_t id, hrt_vaddress ptr); +hrt_vaddress ia_css_refcount_increment(s32 id, hrt_vaddress ptr); /*! \brief Function for decrease reference by 1. * @@ -50,7 +50,7 @@ extern hrt_vaddress ia_css_refcount_increment(int32_t id, hrt_vaddress ptr); * - true, if it is successful. * - false, otherwise. */ -extern bool ia_css_refcount_decrement(int32_t id, hrt_vaddress ptr); +bool ia_css_refcount_decrement(s32 id, hrt_vaddress ptr); /*! \brief Function to check if reference count is 1. * @@ -59,7 +59,7 @@ extern bool ia_css_refcount_decrement(int32_t id, hrt_vaddress ptr); * - true, if it is successful. * - false, otherwise. */ -extern bool ia_css_refcount_is_single(hrt_vaddress ptr); +bool ia_css_refcount_is_single(hrt_vaddress ptr); /*! \brief Function to clear reference list objects. * @@ -68,7 +68,7 @@ extern bool ia_css_refcount_is_single(hrt_vaddress ptr); * * return None */ -extern void ia_css_refcount_clear(int32_t id, +void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr); /*! \brief Function to verify if object is valid @@ -78,6 +78,6 @@ extern void ia_css_refcount_clear(int32_t id, * - true, if valid * - false, if invalid */ -extern bool ia_css_refcount_is_valid(hrt_vaddress ptr); +bool ia_css_refcount_is_valid(hrt_vaddress ptr); #endif /* _IA_CSS_REFCOUNT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c index 6e3bd773ee4c1..6fca1554dd020 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c @@ -25,13 +25,13 @@ /* TODO: enable for other memory aswell now only for hrt_vaddress */ struct ia_css_refcount_entry { - uint32_t count; + u32 count; hrt_vaddress data; - int32_t id; + s32 id; }; struct ia_css_refcount_list { - uint32_t size; + u32 size; struct ia_css_refcount_entry *items; }; @@ -40,18 +40,17 @@ static struct ia_css_refcount_list myrefcount; static struct ia_css_refcount_entry *refcount_find_entry(hrt_vaddress ptr, bool firstfree) { - uint32_t i; + u32 i; if (ptr == 0) return NULL; - if (myrefcount.items == NULL) { + if (!myrefcount.items) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "refcount_find_entry(): Ref count not initiliazed!\n"); return NULL; } for (i = 0; i < myrefcount.size; i++) { - if ((&myrefcount.items[i])->data == 0) { if (firstfree) { /* for new entry */ @@ -75,7 +74,7 @@ enum ia_css_err ia_css_refcount_init(uint32_t size) "ia_css_refcount_init(): Size of 0 for Ref count init!\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if (myrefcount.items != NULL) { + if (myrefcount.items) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_refcount_init(): Ref count is already initialized\n"); return IA_CSS_ERR_INTERNAL_ERROR; @@ -95,7 +94,8 @@ enum ia_css_err ia_css_refcount_init(uint32_t size) void ia_css_refcount_uninit(void) { struct ia_css_refcount_entry *entry; - uint32_t i; + u32 i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_refcount_uninit() entry\n"); for (i = 0; i < myrefcount.size; i++) { @@ -121,7 +121,7 @@ void ia_css_refcount_uninit(void) "ia_css_refcount_uninit() leave\n"); } -hrt_vaddress ia_css_refcount_increment(int32_t id, hrt_vaddress ptr) +hrt_vaddress ia_css_refcount_increment(s32 id, hrt_vaddress ptr) { struct ia_css_refcount_entry *entry; @@ -135,8 +135,8 @@ hrt_vaddress ia_css_refcount_increment(int32_t id, hrt_vaddress ptr) if (!entry) { entry = refcount_find_entry(ptr, true); - assert(entry != NULL); - if (entry == NULL) + assert(entry); + if (!entry) return mmgr_NULL; entry->id = id; } @@ -158,7 +158,7 @@ hrt_vaddress ia_css_refcount_increment(int32_t id, hrt_vaddress ptr) return ptr; } -bool ia_css_refcount_decrement(int32_t id, hrt_vaddress ptr) +bool ia_css_refcount_decrement(s32 id, hrt_vaddress ptr) { struct ia_css_refcount_entry *entry; @@ -218,13 +218,13 @@ bool ia_css_refcount_is_single(hrt_vaddress ptr) return true; } -void ia_css_refcount_clear(int32_t id, clear_func clear_func_ptr) +void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) { struct ia_css_refcount_entry *entry; - uint32_t i; - uint32_t count = 0; + u32 i; + u32 count = 0; - assert(clear_func_ptr != NULL); + assert(clear_func_ptr); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_refcount_clear(%x)\n", id); @@ -236,16 +236,14 @@ void ia_css_refcount_clear(int32_t id, clear_func clear_func_ptr) entry = myrefcount.items + i; if ((entry->data != mmgr_NULL) && (entry->id == id)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_refcount_clear:" - " %x: 0x%x\n", id, entry->data); + "ia_css_refcount_clear: %x: 0x%x\n", + id, entry->data); if (clear_func_ptr) { /* clear using provided function */ clear_func_ptr(entry->data); } else { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_refcount_clear: " - "using hmm_free: " - "no clear_func\n"); + "ia_css_refcount_clear: using hmm_free: no clear_func\n"); hmm_free(entry->data); } #ifndef ISP2401 @@ -276,6 +274,5 @@ bool ia_css_refcount_is_valid(hrt_vaddress ptr) entry = refcount_find_entry(ptr, false); - return entry != NULL; + return entry; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h index a6d650a9a1f42..ba152c1e08124 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h @@ -29,7 +29,7 @@ * @return None * */ -extern void ia_css_pipe_get_copy_binarydesc( +void ia_css_pipe_get_copy_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *copy_descr, struct ia_css_frame_info *in_info, @@ -45,7 +45,7 @@ extern void ia_css_pipe_get_copy_binarydesc( * @return None * */ -extern void ia_css_pipe_get_vfpp_binarydesc( +void ia_css_pipe_get_vfpp_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *vf_pp_descr, struct ia_css_frame_info *in_info, @@ -62,7 +62,7 @@ extern void ia_css_pipe_get_vfpp_binarydesc( * @return IA_CSS_SUCCESS or error code upon error. * */ -extern enum ia_css_err sh_css_bds_factor_get_numerator_denominator( +enum ia_css_err sh_css_bds_factor_get_numerator_denominator( unsigned int bds_factor, unsigned int *bds_factor_numerator, unsigned int *bds_factor_denominator); @@ -78,7 +78,7 @@ extern enum ia_css_err sh_css_bds_factor_get_numerator_denominator( * @return IA_CSS_SUCCESS or error code upon error. * */ -extern enum ia_css_err ia_css_pipe_get_preview_binarydesc( +enum ia_css_err ia_css_pipe_get_preview_binarydesc( struct ia_css_pipe * const pipe, struct ia_css_binary_descr *preview_descr, struct ia_css_frame_info *in_info, @@ -96,7 +96,7 @@ extern enum ia_css_err ia_css_pipe_get_preview_binarydesc( * @return IA_CSS_SUCCESS or error code upon error. * */ -extern enum ia_css_err ia_css_pipe_get_video_binarydesc( +enum ia_css_err ia_css_pipe_get_video_binarydesc( struct ia_css_pipe * const pipe, struct ia_css_binary_descr *video_descr, struct ia_css_frame_info *in_info, @@ -133,7 +133,7 @@ void ia_css_pipe_get_yuvscaler_binarydesc( * @return None * */ -extern void ia_css_pipe_get_capturepp_binarydesc( +void ia_css_pipe_get_capturepp_binarydesc( struct ia_css_pipe * const pipe, struct ia_css_binary_descr *capture_pp_descr, struct ia_css_frame_info *in_info, @@ -150,7 +150,7 @@ extern void ia_css_pipe_get_capturepp_binarydesc( * @return None * */ -extern void ia_css_pipe_get_primary_binarydesc( +void ia_css_pipe_get_primary_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *prim_descr, struct ia_css_frame_info *in_info, @@ -167,7 +167,7 @@ extern void ia_css_pipe_get_primary_binarydesc( * @return None * */ -extern void ia_css_pipe_get_pre_gdc_binarydesc( +void ia_css_pipe_get_pre_gdc_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *gdc_descr, struct ia_css_frame_info *in_info, @@ -182,7 +182,7 @@ extern void ia_css_pipe_get_pre_gdc_binarydesc( * @return None * */ -extern void ia_css_pipe_get_gdc_binarydesc( +void ia_css_pipe_get_gdc_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *gdc_descr, struct ia_css_frame_info *in_info, @@ -198,7 +198,7 @@ extern void ia_css_pipe_get_gdc_binarydesc( * @return None * */ -extern void ia_css_pipe_get_post_gdc_binarydesc( +void ia_css_pipe_get_post_gdc_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *post_gdc_descr, struct ia_css_frame_info *in_info, @@ -214,7 +214,7 @@ extern void ia_css_pipe_get_post_gdc_binarydesc( * @return None * */ -extern void ia_css_pipe_get_pre_de_binarydesc( +void ia_css_pipe_get_pre_de_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *pre_de_descr, struct ia_css_frame_info *in_info, @@ -229,7 +229,7 @@ extern void ia_css_pipe_get_pre_de_binarydesc( * @return None * */ -extern void ia_css_pipe_get_pre_anr_binarydesc( +void ia_css_pipe_get_pre_anr_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *pre_anr_descr, struct ia_css_frame_info *in_info, @@ -244,7 +244,7 @@ extern void ia_css_pipe_get_pre_anr_binarydesc( * @return None * */ -extern void ia_css_pipe_get_anr_binarydesc( +void ia_css_pipe_get_anr_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *anr_descr, struct ia_css_frame_info *in_info, @@ -260,7 +260,7 @@ extern void ia_css_pipe_get_anr_binarydesc( * @return None * */ -extern void ia_css_pipe_get_post_anr_binarydesc( +void ia_css_pipe_get_post_anr_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *post_anr_descr, struct ia_css_frame_info *in_info, @@ -276,7 +276,7 @@ extern void ia_css_pipe_get_post_anr_binarydesc( * @return None * */ -extern void ia_css_pipe_get_ldc_binarydesc( +void ia_css_pipe_get_ldc_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *ldc_descr, struct ia_css_frame_info *in_info, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h index 38690ea093c28..92008ece64baf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h @@ -21,14 +21,14 @@ #include "ia_css_pipeline.h" #include "ia_css_pipeline_common.h" -extern void ia_css_pipe_get_generic_stage_desc( +void ia_css_pipe_get_generic_stage_desc( struct ia_css_pipeline_stage_desc *stage_desc, struct ia_css_binary *binary, struct ia_css_frame *out_frame[], struct ia_css_frame *in_frame, struct ia_css_frame *vf_frame); -extern void ia_css_pipe_get_firmwares_stage_desc( +void ia_css_pipe_get_firmwares_stage_desc( struct ia_css_pipeline_stage_desc *stage_desc, struct ia_css_binary *binary, struct ia_css_frame *out_frame[], @@ -37,16 +37,15 @@ extern void ia_css_pipe_get_firmwares_stage_desc( const struct ia_css_fw_info *fw, unsigned int mode); -extern void ia_css_pipe_get_acc_stage_desc( +void ia_css_pipe_get_acc_stage_desc( struct ia_css_pipeline_stage_desc *stage_desc, struct ia_css_binary *binary, struct ia_css_fw_info *fw); -extern void ia_css_pipe_get_sp_func_stage_desc( +void ia_css_pipe_get_sp_func_stage_desc( struct ia_css_pipeline_stage_desc *stage_desc, struct ia_css_frame *out_frame, enum ia_css_pipeline_stage_sp_func sp_func, - unsigned max_input_width); + unsigned int max_input_width); #endif /*__IA_CSS_PIPE_STAGEDESC__H__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h index 155b6fb4722ba..d5035824f64fa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h @@ -25,13 +25,13 @@ * @return bits per pixel for the underlying stream * */ -extern unsigned int ia_css_pipe_util_pipe_input_format_bpp( +unsigned int ia_css_pipe_util_pipe_input_format_bpp( const struct ia_css_pipe * const pipe); -extern void ia_css_pipe_util_create_output_frames( +void ia_css_pipe_util_create_output_frames( struct ia_css_frame *frames[]); -extern void ia_css_pipe_util_set_output_frames( +void ia_css_pipe_util_set_output_frames( struct ia_css_frame *frames[], unsigned int idx, struct ia_css_frame *frame); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c index 98a2a3e9b3e67..46c23caea40f9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c @@ -40,8 +40,8 @@ static void pipe_binarydesc_get_offline( { unsigned int i; /* in_info, out_info, vf_info can be NULL */ - assert(pipe != NULL); - assert(descr != NULL); + assert(pipe); + assert(descr); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "pipe_binarydesc_get_offline() enter:\n"); @@ -86,8 +86,8 @@ void ia_css_pipe_get_copy_binarydesc( struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; unsigned int i; /* out_info can be NULL */ - assert(pipe != NULL); - assert(in_info != NULL); + assert(pipe); + assert(in_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -103,6 +103,7 @@ void ia_css_pipe_get_copy_binarydesc( copy_descr->isp_pipe_version = IA_CSS_PIPE_VERSION_1; IA_CSS_LEAVE_PRIVATE(""); } + void ia_css_pipe_get_vfpp_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *vf_pp_descr, @@ -112,8 +113,8 @@ void ia_css_pipe_get_vfpp_binarydesc( struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; unsigned int i; /* out_info can be NULL ??? */ - assert(pipe != NULL); - assert(in_info != NULL); + assert(pipe); + assert(in_info); IA_CSS_ENTER_PRIVATE(""); in_info->raw_bit_depth = 0; @@ -184,8 +185,8 @@ enum ia_css_err binarydesc_calculate_bds_factor( /* Loop over all bds factors until a match is found */ for (i = 0; i < ARRAY_SIZE(bds_factors_list); i++) { - unsigned num = bds_factors_list[i].numerator; - unsigned den = bds_factors_list[i].denominator; + unsigned int num = bds_factors_list[i].numerator; + unsigned int den = bds_factors_list[i].denominator; /* See width-wise and height-wise if this bds_factor * satisfies the condition */ @@ -217,10 +218,10 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc( int mode = IA_CSS_BINARY_MODE_PREVIEW; unsigned int i; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); - assert(vf_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); + assert(vf_info); IA_CSS_ENTER_PRIVATE(""); /* @@ -339,8 +340,8 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( bool stream_dz_config = false; /* vf_info can be NULL */ - assert(pipe != NULL); - assert(in_info != NULL); + assert(pipe); + assert(in_info); /* assert(vf_info != NULL); */ IA_CSS_ENTER_PRIVATE(""); @@ -459,8 +460,8 @@ void ia_css_pipe_get_yuvscaler_binarydesc( struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; struct ia_css_frame_info *this_vf_info = NULL; - assert(pipe != NULL); - assert(in_info != NULL); + assert(pipe); + assert(in_info); /* Note: if the following assert fails, the number of ports has been * changed; in that case an additional initializer must be added * a few lines below after which this assert can be updated. @@ -502,12 +503,11 @@ void ia_css_pipe_get_capturepp_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(vf_info != NULL); + assert(pipe); + assert(in_info); + assert(vf_info); IA_CSS_ENTER_PRIVATE(""); - /* the in_info is only used for resolution to enable bayer down scaling. */ if (pipe->out_yuv_ds_input_info.res.width) @@ -536,8 +536,7 @@ void ia_css_pipe_get_capturepp_binarydesc( } /* lookup table for high quality primary binaries */ -static unsigned int primary_hq_binary_modes[NUM_PRIMARY_HQ_STAGES] = -{ +static unsigned int primary_hq_binary_modes[NUM_PRIMARY_HQ_STAGES] = { IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE0, IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE1, IA_CSS_BINARY_MODE_PRIMARY_HQ_STAGE2, @@ -559,9 +558,9 @@ void ia_css_pipe_get_primary_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); assert(stage_idx < NUM_PRIMARY_HQ_STAGES); /* vf_info can be NULL - example video_binarydescr */ /*assert(vf_info != NULL);*/ @@ -637,9 +636,9 @@ void ia_css_pipe_get_pre_gdc_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -664,9 +663,9 @@ void ia_css_pipe_get_gdc_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -690,10 +689,10 @@ void ia_css_pipe_get_post_gdc_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); - assert(vf_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); + assert(vf_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -719,9 +718,9 @@ void ia_css_pipe_get_pre_de_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -758,9 +757,9 @@ void ia_css_pipe_get_pre_anr_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -792,9 +791,9 @@ void ia_css_pipe_get_anr_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -811,7 +810,6 @@ void ia_css_pipe_get_anr_binarydesc( IA_CSS_LEAVE_PRIVATE(""); } - void ia_css_pipe_get_post_anr_binarydesc( struct ia_css_pipe const * const pipe, struct ia_css_binary_descr *post_anr_descr, @@ -822,10 +820,10 @@ void ia_css_pipe_get_post_anr_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); - assert(vf_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); + assert(vf_info); IA_CSS_ENTER_PRIVATE(""); *in_info = *out_info; @@ -851,9 +849,9 @@ void ia_css_pipe_get_ldc_binarydesc( unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - assert(pipe != NULL); - assert(in_info != NULL); - assert(out_info != NULL); + assert(pipe); + assert(in_info); + assert(out_info); IA_CSS_ENTER_PRIVATE(""); #ifndef ISP2401 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c index 40af8daf5ad96..8b42e86dd9a2b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c @@ -24,11 +24,12 @@ void ia_css_pipe_get_generic_stage_desc( struct ia_css_frame *vf_frame) { unsigned int i; + IA_CSS_ENTER_PRIVATE("stage_desc = %p, binary = %p, out_frame = %p, in_frame = %p, vf_frame = %p", stage_desc, binary, out_frame, in_frame, vf_frame); - assert(stage_desc != NULL && binary != NULL && binary->info != NULL); - if (stage_desc == NULL || binary == NULL || binary->info == NULL) { + assert(stage_desc && binary && binary->info); + if (!stage_desc || !binary || !binary->info) { IA_CSS_ERROR("invalid arguments"); goto ERR; } @@ -95,7 +96,7 @@ void ia_css_pipe_get_sp_func_stage_desc( struct ia_css_pipeline_stage_desc *stage_desc, struct ia_css_frame *out_frame, enum ia_css_pipeline_stage_sp_func sp_func, - unsigned max_input_width) + unsigned int max_input_width) { unsigned int i; @@ -112,4 +113,3 @@ void ia_css_pipe_get_sp_func_stage_desc( } stage_desc->vf_frame = NULL; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c index 5fc1718cb2bd0..32bddb326ab83 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c @@ -21,8 +21,8 @@ unsigned int ia_css_pipe_util_pipe_input_format_bpp( const struct ia_css_pipe * const pipe) { - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); return ia_css_util_input_format_bpp(pipe->stream->config.input_config.format, pipe->stream->config.pixels_per_clock == 2); @@ -33,7 +33,7 @@ void ia_css_pipe_util_create_output_frames( { unsigned int i; - assert(frames != NULL); + assert(frames); for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { frames[i] = NULL; } @@ -48,4 +48,3 @@ void ia_css_pipe_util_set_output_frames( frames[idx] = frame; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h index 5ab48f346790b..f7cebf085dca5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h @@ -37,7 +37,7 @@ enum ia_css_err ia_css_convert_errno( * @return IA_CSS_SUCCESS or error code upon error. * */ -extern enum ia_css_err ia_css_util_check_vf_info( +enum ia_css_err ia_css_util_check_vf_info( const struct ia_css_frame_info * const info); /* @brief check input configuration. @@ -47,7 +47,7 @@ extern enum ia_css_err ia_css_util_check_vf_info( * @return IA_CSS_SUCCESS or error code upon error. * */ -extern enum ia_css_err ia_css_util_check_input( +enum ia_css_err ia_css_util_check_input( const struct ia_css_stream_config * const stream_config, bool must_be_raw, bool must_be_yuv); @@ -59,7 +59,7 @@ extern enum ia_css_err ia_css_util_check_input( * @return IA_CSS_SUCCESS or error code upon error. * */ -extern enum ia_css_err ia_css_util_check_vf_out_info( +enum ia_css_err ia_css_util_check_vf_out_info( const struct ia_css_frame_info * const out_info, const struct ia_css_frame_info * const vf_info); @@ -70,7 +70,7 @@ extern enum ia_css_err ia_css_util_check_vf_out_info( * @return IA_CSS_SUCCESS or error code upon error. * */ -extern enum ia_css_err ia_css_util_check_res( +enum ia_css_err ia_css_util_check_res( unsigned int width, unsigned int height); @@ -83,7 +83,7 @@ extern enum ia_css_err ia_css_util_check_res( * equal than those of b, false otherwise * */ -extern bool ia_css_util_res_leq( +bool ia_css_util_res_leq( struct ia_css_resolution a, struct ia_css_resolution b); @@ -94,7 +94,7 @@ extern bool ia_css_util_res_leq( * * @returns true if resolution is zero */ -extern bool ia_css_util_resolution_is_zero( +bool ia_css_util_resolution_is_zero( const struct ia_css_resolution resolution); /** @@ -104,7 +104,7 @@ extern bool ia_css_util_resolution_is_zero( * * @returns true if resolution is even */ -extern bool ia_css_util_resolution_is_even( +bool ia_css_util_resolution_is_even( const struct ia_css_resolution resolution); #endif @@ -115,7 +115,7 @@ extern bool ia_css_util_resolution_is_even( * @return bits per pixel based on given parameters. * */ -extern unsigned int ia_css_util_input_format_bpp( +unsigned int ia_css_util_input_format_bpp( enum atomisp_input_format stream_format, bool two_ppc); @@ -125,7 +125,7 @@ extern unsigned int ia_css_util_input_format_bpp( * @return true if the input format is raw or false otherwise * */ -extern bool ia_css_util_is_input_format_raw( +bool ia_css_util_is_input_format_raw( enum atomisp_input_format stream_format); /* @brief check if input format it yuv @@ -134,8 +134,7 @@ extern bool ia_css_util_is_input_format_raw( * @return true if the input format is yuv or false otherwise * */ -extern bool ia_css_util_is_input_format_yuv( +bool ia_css_util_is_input_format_yuv( enum atomisp_input_format stream_format); #endif /* __IA_CSS_UTIL_H__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c index 91e5861123329..f50198b32888f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c @@ -20,7 +20,6 @@ /* for ia_css_binary_max_vf_width() */ #include "ia_css_binary.h" - enum ia_css_err ia_css_convert_errno( int in_err) { @@ -56,6 +55,7 @@ unsigned int ia_css_util_input_format_bpp( bool two_ppc) { unsigned int rval = 0; + switch (format) { case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: case ATOMISP_INPUT_FORMAT_YUV420_8: @@ -109,7 +109,6 @@ unsigned int ia_css_util_input_format_bpp( default: rval = 0; break; - } return rval; } @@ -119,12 +118,13 @@ enum ia_css_err ia_css_util_check_vf_info( { enum ia_css_err err; unsigned int max_vf_width; - assert(info != NULL); + + assert(info); err = ia_css_frame_check_info(info); if (err != IA_CSS_SUCCESS) return err; max_vf_width = ia_css_binary_max_vf_width(); - if (max_vf_width != 0 && info->res.width > max_vf_width*2) + if (max_vf_width != 0 && info->res.width > max_vf_width * 2) return IA_CSS_ERR_INVALID_ARGUMENTS; return IA_CSS_SUCCESS; } @@ -135,8 +135,8 @@ enum ia_css_err ia_css_util_check_vf_out_info( { enum ia_css_err err; - assert(out_info != NULL); - assert(vf_info != NULL); + assert(out_info); + assert(vf_info); err = ia_css_frame_check_info(out_info); if (err != IA_CSS_SUCCESS) @@ -204,9 +204,9 @@ enum ia_css_err ia_css_util_check_input( bool must_be_raw, bool must_be_yuv) { - assert(stream_config != NULL); + assert(stream_config); - if (stream_config == NULL) + if (!stream_config) return IA_CSS_ERR_INVALID_ARGUMENTS; #ifdef IS_ISP_2400_SYSTEM @@ -224,4 +224,3 @@ enum ia_css_err ia_css_util_check_input( return IA_CSS_SUCCESS; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c index 325b821f276cf..de99359a0fbcb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c @@ -30,8 +30,9 @@ ia_css_configure_iterator( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; @@ -54,8 +55,9 @@ ia_css_configure_copy_output( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; @@ -78,8 +80,9 @@ ia_css_configure_crop( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.crop.size; offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; @@ -102,8 +105,9 @@ ia_css_configure_fpn( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; @@ -126,8 +130,9 @@ ia_css_configure_dvs( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; @@ -150,8 +155,9 @@ ia_css_configure_qplane( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; @@ -174,8 +180,9 @@ ia_css_configure_output0( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output0.size; offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; @@ -198,8 +205,9 @@ ia_css_configure_output1( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output1.size; offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; @@ -222,8 +230,9 @@ ia_css_configure_output( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output.size; offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; @@ -247,8 +256,9 @@ ia_css_configure_sc( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.sc.size; offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; @@ -272,8 +282,9 @@ ia_css_configure_raw( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.raw.size; offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; @@ -296,8 +307,9 @@ ia_css_configure_tnr( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; @@ -320,8 +332,9 @@ ia_css_configure_ref( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.ref.size; offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; @@ -344,8 +357,9 @@ ia_css_configure_vf( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.vf.size; offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; @@ -357,4 +371,3 @@ ia_css_configure_vf( } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c index d418e763b7552..ebf69c43e645c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c @@ -66,12 +66,12 @@ static void ia_css_process_aa( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; if (size) { struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) @@ -86,16 +86,16 @@ ia_css_process_aa( static void ia_css_process_anr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); @@ -109,7 +109,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); } - } } @@ -117,16 +116,16 @@ size); static void ia_css_process_anr2( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); @@ -140,7 +139,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); } - } } @@ -148,16 +146,16 @@ size); static void ia_css_process_bh( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); @@ -171,10 +169,9 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); @@ -184,7 +181,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } - } } @@ -192,16 +188,16 @@ size); static void ia_css_process_cnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); @@ -215,7 +211,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); } - } } @@ -223,16 +218,16 @@ size); static void ia_css_process_crop( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); @@ -246,7 +241,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); } - } } @@ -254,16 +248,16 @@ size); static void ia_css_process_csc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); @@ -277,7 +271,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); } - } } @@ -285,16 +278,16 @@ size); static void ia_css_process_dp( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); @@ -308,7 +301,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); } - } } @@ -316,16 +308,16 @@ size); static void ia_css_process_bnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); @@ -339,7 +331,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); } - } } @@ -347,16 +338,16 @@ size); static void ia_css_process_de( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); @@ -370,7 +361,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); } - } } @@ -378,16 +368,16 @@ size); static void ia_css_process_ecd( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); @@ -401,7 +391,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); } - } } @@ -409,16 +398,16 @@ size); static void ia_css_process_formats( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); @@ -432,7 +421,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); } - } } @@ -440,16 +428,16 @@ size); static void ia_css_process_fpn( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); @@ -463,7 +451,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); } - } } @@ -471,16 +458,16 @@ size); static void ia_css_process_gc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); @@ -494,12 +481,11 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); @@ -513,7 +499,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } - } } @@ -521,16 +506,16 @@ size); static void ia_css_process_ce( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); @@ -544,7 +529,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); } - } } @@ -552,16 +536,16 @@ size); static void ia_css_process_yuv2rgb( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); @@ -575,7 +559,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); } - } } @@ -583,16 +566,16 @@ size); static void ia_css_process_rgb2yuv( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); @@ -606,7 +589,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); } - } } @@ -614,16 +596,16 @@ size); static void ia_css_process_r_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); @@ -637,7 +619,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); } - } } @@ -645,16 +626,16 @@ size); static void ia_css_process_g_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); @@ -668,7 +649,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); } - } } @@ -676,16 +656,16 @@ size); static void ia_css_process_b_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); @@ -699,7 +679,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); } - } } @@ -707,19 +686,20 @@ size); static void ia_css_process_uds( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; if (size) { struct sh_css_sp_uds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); p = (struct sh_css_sp_uds_params *) @@ -732,7 +712,6 @@ ia_css_process_uds( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); } - } } @@ -740,16 +719,16 @@ ia_css_process_uds( static void ia_css_process_raa( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); @@ -763,7 +742,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); } - } } @@ -771,16 +749,16 @@ size); static void ia_css_process_s3a( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); @@ -794,7 +772,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); } - } } @@ -802,16 +779,16 @@ size); static void ia_css_process_ob( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); @@ -825,12 +802,11 @@ ia_css_process_ob( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); @@ -844,7 +820,6 @@ ia_css_process_ob( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } - } } @@ -852,16 +827,16 @@ ia_css_process_ob( static void ia_css_process_output( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); @@ -875,7 +850,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); } - } } @@ -883,16 +857,16 @@ size); static void ia_css_process_sc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); @@ -906,7 +880,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); } - } } @@ -914,19 +887,20 @@ size); static void ia_css_process_bds( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; if (size) { struct sh_css_isp_bds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); p = (struct sh_css_isp_bds_params *) @@ -938,7 +912,6 @@ ia_css_process_bds( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); } - } } @@ -946,16 +919,16 @@ ia_css_process_bds( static void ia_css_process_tnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); @@ -969,7 +942,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); } - } } @@ -977,16 +949,16 @@ size); static void ia_css_process_macc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); @@ -1000,7 +972,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); } - } } @@ -1008,16 +979,16 @@ size); static void ia_css_process_sdis_horicoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); @@ -1031,7 +1002,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); } - } } @@ -1039,16 +1009,16 @@ size); static void ia_css_process_sdis_vertcoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); @@ -1062,7 +1032,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); } - } } @@ -1070,16 +1039,16 @@ size); static void ia_css_process_sdis_horiproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); @@ -1093,7 +1062,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); } - } } @@ -1101,16 +1069,16 @@ size); static void ia_css_process_sdis_vertproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); @@ -1124,7 +1092,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); } - } } @@ -1132,16 +1099,16 @@ size); static void ia_css_process_sdis2_horicoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); @@ -1155,7 +1122,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); } - } } @@ -1163,16 +1129,16 @@ size); static void ia_css_process_sdis2_vertcoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); @@ -1186,7 +1152,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); } - } } @@ -1194,16 +1159,16 @@ size); static void ia_css_process_sdis2_horiproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); @@ -1217,7 +1182,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); } - } } @@ -1225,16 +1189,16 @@ size); static void ia_css_process_sdis2_vertproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); @@ -1248,7 +1212,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); } - } } @@ -1256,16 +1219,16 @@ size); static void ia_css_process_wb( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); @@ -1279,7 +1242,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); } - } } @@ -1287,16 +1249,16 @@ size); static void ia_css_process_nr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); @@ -1310,7 +1272,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); } - } } @@ -1318,16 +1279,16 @@ size); static void ia_css_process_yee( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); @@ -1341,7 +1302,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); } - } } @@ -1349,16 +1309,16 @@ size); static void ia_css_process_ynr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); @@ -1372,7 +1332,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); } - } } @@ -1380,16 +1339,16 @@ size); static void ia_css_process_fc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); @@ -1403,7 +1362,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); } - } } @@ -1411,16 +1369,16 @@ size); static void ia_css_process_ctc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); @@ -1434,12 +1392,11 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); @@ -1453,7 +1410,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); } - } } @@ -1461,16 +1417,16 @@ size); static void ia_css_process_xnr_table( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); @@ -1484,7 +1440,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); } - } } @@ -1492,16 +1447,16 @@ size); static void ia_css_process_xnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); @@ -1515,7 +1470,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); } - } } @@ -1523,16 +1477,16 @@ size); static void ia_css_process_xnr3( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); @@ -1546,13 +1500,12 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); } - } #ifdef ISP2401 { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); @@ -1566,15 +1519,14 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); } - } #endif } /* Code generated by genparam/gencode.c:gen_param_process_table() */ -void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned pipe_id, +void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) = { ia_css_process_aa, @@ -1630,12 +1582,12 @@ void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( static void ia_css_get_dp_config(const struct ia_css_isp_parameters *params, struct ia_css_dp_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: config=%p\n", + config); *config = params->dp_config; @@ -1649,10 +1601,10 @@ void ia_css_set_dp_config(struct ia_css_isp_parameters *params, const struct ia_css_dp_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dp_config = *config; @@ -1661,8 +1613,7 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DP_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1670,12 +1621,12 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, static void ia_css_get_wb_config(const struct ia_css_isp_parameters *params, struct ia_css_wb_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: config=%p\n", + config); *config = params->wb_config; @@ -1689,10 +1640,10 @@ void ia_css_set_wb_config(struct ia_css_isp_parameters *params, const struct ia_css_wb_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->wb_config = *config; @@ -1701,8 +1652,7 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_WB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1710,12 +1660,12 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, static void ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, struct ia_css_tnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: config=%p\n", + config); *config = params->tnr_config; @@ -1729,10 +1679,10 @@ void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, const struct ia_css_tnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->tnr_config = *config; @@ -1741,8 +1691,7 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_TNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1750,12 +1699,12 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_ob_config(const struct ia_css_isp_parameters *params, struct ia_css_ob_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: config=%p\n", + config); *config = params->ob_config; @@ -1769,10 +1718,10 @@ void ia_css_set_ob_config(struct ia_css_isp_parameters *params, const struct ia_css_ob_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ob_config = *config; @@ -1781,8 +1730,7 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1790,12 +1738,12 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, static void ia_css_get_de_config(const struct ia_css_isp_parameters *params, struct ia_css_de_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: config=%p\n", + config); *config = params->de_config; @@ -1809,10 +1757,10 @@ void ia_css_set_de_config(struct ia_css_isp_parameters *params, const struct ia_css_de_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->de_config = *config; @@ -1821,8 +1769,7 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1830,12 +1777,12 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, static void ia_css_get_anr_config(const struct ia_css_isp_parameters *params, struct ia_css_anr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: config=%p\n", + config); *config = params->anr_config; @@ -1849,10 +1796,10 @@ void ia_css_set_anr_config(struct ia_css_isp_parameters *params, const struct ia_css_anr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_config = *config; @@ -1861,8 +1808,7 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1870,12 +1816,12 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, static void ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, struct ia_css_anr_thres *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: config=%p\n", + config); *config = params->anr_thres; @@ -1889,10 +1835,10 @@ void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, const struct ia_css_anr_thres *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_thres = *config; @@ -1901,8 +1847,7 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR2_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1910,12 +1855,12 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, static void ia_css_get_ce_config(const struct ia_css_isp_parameters *params, struct ia_css_ce_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: config=%p\n", + config); *config = params->ce_config; @@ -1929,10 +1874,10 @@ void ia_css_set_ce_config(struct ia_css_isp_parameters *params, const struct ia_css_ce_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ce_config = *config; @@ -1941,8 +1886,7 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1950,12 +1894,12 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, static void ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, struct ia_css_ecd_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: config=%p\n", + config); *config = params->ecd_config; @@ -1969,10 +1913,10 @@ void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, const struct ia_css_ecd_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ecd_config = *config; @@ -1981,8 +1925,7 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ECD_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1990,12 +1933,12 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, static void ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, struct ia_css_ynr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: config=%p\n", + config); *config = params->ynr_config; @@ -2009,10 +1952,10 @@ void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, const struct ia_css_ynr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ynr_config = *config; @@ -2021,8 +1964,7 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2030,12 +1972,12 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, static void ia_css_get_fc_config(const struct ia_css_isp_parameters *params, struct ia_css_fc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: config=%p\n", + config); *config = params->fc_config; @@ -2049,10 +1991,10 @@ void ia_css_set_fc_config(struct ia_css_isp_parameters *params, const struct ia_css_fc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->fc_config = *config; @@ -2061,8 +2003,7 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2070,12 +2011,12 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, static void ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, struct ia_css_cnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: config=%p\n", + config); *config = params->cnr_config; @@ -2089,10 +2030,10 @@ void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, const struct ia_css_cnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cnr_config = *config; @@ -2101,8 +2042,7 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2110,12 +2050,12 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_macc_config(const struct ia_css_isp_parameters *params, struct ia_css_macc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: config=%p\n", + config); *config = params->macc_config; @@ -2129,10 +2069,10 @@ void ia_css_set_macc_config(struct ia_css_isp_parameters *params, const struct ia_css_macc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->macc_config = *config; @@ -2141,8 +2081,7 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_MACC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2150,12 +2089,12 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, static void ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, struct ia_css_ctc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: config=%p\n", + config); *config = params->ctc_config; @@ -2169,10 +2108,10 @@ void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, const struct ia_css_ctc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ctc_config = *config; @@ -2181,8 +2120,7 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CTC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2190,12 +2128,12 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, static void ia_css_get_aa_config(const struct ia_css_isp_parameters *params, struct ia_css_aa_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: config=%p\n", + config); *config = params->aa_config; @@ -2208,10 +2146,10 @@ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, const struct ia_css_aa_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); params->aa_config = *config; params->config_changed[IA_CSS_AA_ID] = true; @@ -2219,8 +2157,7 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_AA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2228,12 +2165,12 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, static void ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: config=%p\n", + config); *config = params->yuv2rgb_cc_config; @@ -2247,10 +2184,10 @@ void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->yuv2rgb_cc_config = *config; @@ -2259,8 +2196,7 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YUV2RGB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2268,12 +2204,12 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, static void ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: config=%p\n", + config); *config = params->rgb2yuv_cc_config; @@ -2287,10 +2223,10 @@ void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->rgb2yuv_cc_config = *config; @@ -2299,8 +2235,7 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_RGB2YUV_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2308,12 +2243,12 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, static void ia_css_get_csc_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: config=%p\n", + config); *config = params->cc_config; @@ -2327,10 +2262,10 @@ void ia_css_set_csc_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cc_config = *config; @@ -2339,8 +2274,7 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CSC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2348,12 +2282,12 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, static void ia_css_get_nr_config(const struct ia_css_isp_parameters *params, struct ia_css_nr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: config=%p\n", + config); *config = params->nr_config; @@ -2367,10 +2301,10 @@ void ia_css_set_nr_config(struct ia_css_isp_parameters *params, const struct ia_css_nr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->nr_config = *config; @@ -2380,8 +2314,7 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_NR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2389,12 +2322,12 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, static void ia_css_get_gc_config(const struct ia_css_isp_parameters *params, struct ia_css_gc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: config=%p\n", + config); *config = params->gc_config; @@ -2408,10 +2341,10 @@ void ia_css_set_gc_config(struct ia_css_isp_parameters *params, const struct ia_css_gc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->gc_config = *config; @@ -2420,8 +2353,7 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_GC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2429,12 +2361,12 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2448,10 +2380,10 @@ void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2463,8 +2395,7 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2472,12 +2403,12 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2491,10 +2422,10 @@ void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2506,8 +2437,7 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2515,12 +2445,12 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2534,10 +2464,10 @@ void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2549,8 +2479,7 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2558,12 +2487,12 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2577,10 +2506,10 @@ void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2592,8 +2521,7 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2601,12 +2529,12 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2620,10 +2548,10 @@ void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2635,8 +2563,7 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2644,12 +2571,12 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2663,10 +2590,10 @@ void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2678,8 +2605,7 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2687,12 +2613,12 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2706,10 +2632,10 @@ void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2721,8 +2647,7 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2730,12 +2655,12 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2749,10 +2674,10 @@ void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2764,8 +2689,7 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2773,12 +2697,12 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: config=%p\n", + config); *config = params->r_gamma_table; @@ -2792,10 +2716,10 @@ void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->r_gamma_table = *config; @@ -2804,8 +2728,7 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_R_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2813,12 +2736,12 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: config=%p\n", + config); *config = params->g_gamma_table; @@ -2832,10 +2755,10 @@ void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->g_gamma_table = *config; @@ -2844,8 +2767,7 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_G_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2853,12 +2775,12 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: config=%p\n", + config); *config = params->b_gamma_table; @@ -2872,10 +2794,10 @@ void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->b_gamma_table = *config; @@ -2884,8 +2806,7 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_B_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2893,12 +2814,12 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: config=%p\n", + config); *config = params->xnr_table; @@ -2912,10 +2833,10 @@ void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; @@ -2924,8 +2845,7 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_TABLE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2933,12 +2853,12 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, static void ia_css_get_formats_config(const struct ia_css_isp_parameters *params, struct ia_css_formats_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: config=%p\n", + config); *config = params->formats_config; @@ -2952,10 +2872,10 @@ void ia_css_set_formats_config(struct ia_css_isp_parameters *params, const struct ia_css_formats_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->formats_config = *config; @@ -2964,8 +2884,7 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FORMATS_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2973,12 +2892,12 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: config=%p\n", + config); *config = params->xnr_config; @@ -2992,10 +2911,10 @@ void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_config = *config; @@ -3004,8 +2923,7 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3013,12 +2931,12 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr3_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: config=%p\n", + config); *config = params->xnr3_config; @@ -3032,10 +2950,10 @@ void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr3_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr3_config = *config; @@ -3044,8 +2962,7 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR3_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3053,12 +2970,12 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, static void ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, struct ia_css_3a_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: config=%p\n", + config); *config = params->s3a_config; @@ -3072,10 +2989,10 @@ void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, const struct ia_css_3a_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->s3a_config = *config; @@ -3085,8 +3002,7 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_S3A_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3094,12 +3010,12 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, static void ia_css_get_output_config(const struct ia_css_isp_parameters *params, struct ia_css_output_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: config=%p\n", + config); *config = params->output_config; @@ -3113,10 +3029,10 @@ void ia_css_set_output_config(struct ia_css_isp_parameters *params, const struct ia_css_output_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->output_config = *config; @@ -3125,8 +3041,7 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OUTPUT_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_global_access_function() */ @@ -3218,4 +3133,3 @@ ia_css_set_configs(struct ia_css_isp_parameters *params, ia_css_set_s3a_config(params, config->s3a_config); ia_css_set_output_config(params, config->output_config); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h index 5b3deb7f74aec..b5175c253c61d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h @@ -149,8 +149,8 @@ struct ia_css_memory_offsets { struct ia_css_pipeline_stage; /* forward declaration */ -extern void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned pipe_id, +extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c index fb3ba08f69c1e..c14323224d126 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c @@ -27,13 +27,12 @@ ia_css_initialize_aa_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.aa.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; if (size) memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); } @@ -47,16 +46,15 @@ ia_css_initialize_cnr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; if (size) { ia_css_init_cnr_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); } @@ -70,16 +68,15 @@ ia_css_initialize_cnr2_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; if (size) { ia_css_init_cnr2_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); } @@ -93,16 +90,15 @@ ia_css_initialize_dp_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.dp.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; if (size) { ia_css_init_dp_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); } @@ -116,16 +112,15 @@ ia_css_initialize_de_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.de.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; if (size) { ia_css_init_de_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); } @@ -139,16 +134,15 @@ ia_css_initialize_tnr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; if (size) { ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); } @@ -162,16 +156,15 @@ ia_css_initialize_ref_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->dmem.ref.size; + unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; - unsigned offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; if (size) { ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); } @@ -185,16 +178,15 @@ ia_css_initialize_ynr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; if (size) { ia_css_init_ynr_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); } @@ -211,4 +203,3 @@ void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_bina ia_css_initialize_ref_state, ia_css_initialize_ynr_state, }; - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h index e71e33d9d1434..c6d2a5cba2134 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h @@ -95,7 +95,7 @@ #define _hrt_get_bit(w, b) \ (((w) >> (b)) & 1) #define _hrt_set_bit(w, b, v) \ - (((w) & (~(1 << (b)))) | (((v)&1) << (b))) + (((w) & (~(1 << (b)))) | (((v) & 1) << (b))) #define _hrt_set_lower_half(w, v) \ _hrt_set_bits(w, 0, 16, v) #define _hrt_set_upper_half(w, v) \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h index b5756bfe8eb6b..0eabc59ff5afb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h @@ -22,9 +22,9 @@ #define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ #define SP_ICACHE_ADDRESS_BITS \ - (SP_ICACHE_TAG_BITS+SP_ICACHE_BLOCK_ADDRESS_BITS) + (SP_ICACHE_TAG_BITS + SP_ICACHE_BLOCK_ADDRESS_BITS) -#define SP_PMEM_DEPTH (1<_defs.h */ typedef enum hrt_isp_css_irq { - hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID , - hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID , - hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID , - hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID , - hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID , - hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID , - hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID , - hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID , - hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID , - hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID , - hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID , - hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID , - hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID , - hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID , - hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID , - hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID , - hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID , - hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID , - hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID , - hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID , + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, #ifdef _HIVE_ISP_CSS_2401_SYSTEM - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID , + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, #else - hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID , + hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, #endif - hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID , - hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID , - hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID , - hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID , - hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID , - hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID , - hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID , - hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID , - hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID , - hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID , - hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID , + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, /* this must (obviously) be the last on in the enum */ hrt_isp_css_irq_num_irqs } hrt_isp_css_irq_t; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h index b4211a0c631a2..a22b771f61f2e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h @@ -17,10 +17,10 @@ #include -#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS)-1) -#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS)-1) +#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS) - 1) +#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS) - 1) #define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) #define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) - + #endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h index 58b0e6effbd06..9715893c8a360 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h @@ -12,28 +12,28 @@ * more details. */ -#ifndef _HRT_HIVE_TYPES_H -#define _HRT_HIVE_TYPES_H +#ifndef _HRT_HIVE_TYPES_H +#define _HRT_HIVE_TYPES_H #include "version.h" #include "defs.h" #ifndef HRTCAT3 -#define _HRTCAT3(m,n,o) m##n##o -#define HRTCAT3(m,n,o) _HRTCAT3(m,n,o) +#define _HRTCAT3(m, n, o) m##n##o +#define HRTCAT3(m, n, o) _HRTCAT3(m, n, o) #endif #ifndef HRTCAT4 -#define _HRTCAT4(m,n,o,p) m##n##o##p -#define HRTCAT4(m,n,o,p) _HRTCAT4(m,n,o,p) +#define _HRTCAT4(m, n, o, p) m##n##o##p +#define HRTCAT4(m, n, o, p) _HRTCAT4(m, n, o, p) #endif #ifndef HRTMIN -#define HRTMIN(a,b) (((a)<(b))?(a):(b)) +#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) #endif - + #ifndef HRTMAX -#define HRTMAX(a,b) (((a)>(b))?(a):(b)) +#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) #endif /* boolean data type */ @@ -59,8 +59,8 @@ typedef unsigned long long hive_uint64; #define HRT_ADDRESS_WIDTH 32 #endif -#define HRT_DATA_BYTES (HRT_DATA_WIDTH/8) -#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH/8) +#define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8) +#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8) #if HRT_DATA_WIDTH == 64 typedef hive_uint64 hrt_data; @@ -71,7 +71,7 @@ typedef hive_uint32 hrt_data; #endif #if HRT_ADDRESS_WIDTH == 64 -typedef hive_uint64 hrt_address; +typedef hive_uint64 hrt_address; #elif HRT_ADDRESS_WIDTH == 32 typedef hive_uint32 hrt_address; #else @@ -95,7 +95,7 @@ typedef hive_address hive_mem_address; typedef hive_uint hive_mmio_id; typedef hive_mmio_id hive_slave_id; typedef hive_mmio_id hive_port_id; -typedef hive_mmio_id hive_master_id; +typedef hive_mmio_id hive_master_id; typedef hive_mmio_id hive_mem_id; typedef hive_mmio_id hive_dev_id; typedef hive_mmio_id hive_fifo_id; @@ -122,7 +122,7 @@ typedef hive_uint hive_inport_id; typedef hive_uint hive_msink_id; /* HRT specific */ -typedef char* hive_program; -typedef char* hive_function; +typedef char *hive_program; +typedef char *hive_function; #endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h index 7766f78cd1230..176456da961f7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h @@ -22,7 +22,7 @@ #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 #define HIVE_IFMT_GP_REGS_SRST_IDX 9 #define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h index 87fbf82edb5bc..1dd8ea3cd6d47 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h @@ -31,37 +31,36 @@ #define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 #define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 #define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 -#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 -#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 +#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 -#define HIVE_ISEL_GP_REGS_SOF_IDX 8 -#define HIVE_ISEL_GP_REGS_EOF_IDX 9 -#define HIVE_ISEL_GP_REGS_SOL_IDX 10 -#define HIVE_ISEL_GP_REGS_EOL_IDX 11 +#define HIVE_ISEL_GP_REGS_SOF_IDX 8 +#define HIVE_ISEL_GP_REGS_EOF_IDX 9 +#define HIVE_ISEL_GP_REGS_SOL_IDX 10 +#define HIVE_ISEL_GP_REGS_EOL_IDX 11 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 -#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 +#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 -#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 -#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 -#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 +#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 +#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 +#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 #define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 #define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 #define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 #define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 #define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 - #define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 #define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 #define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h index 20a13c4cdb562..2d5baae305220 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h @@ -15,8 +15,8 @@ #ifndef _input_switch_2400_defs_h #define _input_switch_2400_defs_h -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id)*2) + ((fmt_type)>=16)) -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type)%16) * 2) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id) * 2) + ((fmt_type) >= 16)) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type) % 16) * 2) #define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 #define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h index a7f0ca80bc9be..fcfa8c4971bef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h @@ -50,7 +50,6 @@ #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 - /* register reset value */ #define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 @@ -59,38 +58,38 @@ #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 #define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 #define ISYS_CTRL_INIT_REG_RSTVAL 0 -#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 /* register width value */ -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ISYS_CTRL_INIT_REG_WIDTH 3 +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ISYS_CTRL_INIT_REG_WIDTH 3 #define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ #define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 @@ -111,99 +110,89 @@ /* InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 [7:4] - CaptPortId, - CaptA-'b0000 - CaptB-'b0001 - CaptC-'b0010 + CaptA-'b0000 + CaptB-'b0001 + CaptC-'b0010 [31:16] - NOF_frames InpSysCaptFrameExt 2/0 [3:0] - 'b0001' [7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC 2/1 [31:0] - external capture address -InpSysAcqFrame 2/0 [3:0] - 'b0010, +InpSysAcqFrame 2/0 [3:0] - 'b0010, [31:4] - NOF_ext_mem_words 2/1 [31:0] - external memory read start address -InpSysOverruleON 1/0 [3:0] - 'b0011, +InpSysOverruleON 1/0 [3:0] - 'b0011, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA - -InpSysOverruleOFF 1/0 [3:0] - 'b0100, +InpSysOverruleOFF 1/0 [3:0] - 'b0100, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA -InpSysOverruleCmd 2/0 [3:0] - 'b0101, +InpSysOverruleCmd 2/0 [3:0] - 'b0101, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA 2/1 [31:0] - command token value for port opid - acknowledge tokens: InpSysAckCFA 1/0 [3:0] - 'b0000 [7:4] - CaptPortId, - CaptA-'b0000 - CaptB- 'b0001 - CaptC-'b0010 + CaptA-'b0000 + CaptB- 'b0001 + CaptC-'b0010 [31:16] - NOF_frames InpSysAckCFE 1/0 [3:0] - 'b0001' [7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC InpSysAckAF 1/0 [3:0] - 'b0010 -InpSysAckOverruleON 1/0 [3:0] - 'b0011, +InpSysAckOverruleON 1/0 [3:0] - 'b0011, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA -InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, +InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA - -InpSysAckOverrule 2/0 [3:0] - 'b0101, +InpSysAckOverrule 2/0 [3:0] - 'b0101, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA 2/1 [31:0] - acknowledge token value from port opid - - */ - /* Command and acknowledge tokens IDs */ #define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ #define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ @@ -232,10 +221,10 @@ InpSysAckOverrule 2/0 [3:0] - 'b0101, #define ISYS_CTRL_TOKEN_ID_IDX 0 #define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) #define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) -#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB +1) -#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB +#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB + 1) +#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB #define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) -#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB +#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB #define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) #define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ @@ -248,7 +237,7 @@ InpSysAckOverrule 2/0 [3:0] - 'b0101, #define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ #define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ -#define ISYS_CTRL_NO_DMA_ACK 0 +#define ISYS_CTRL_NO_DMA_ACK 0 #define ISYS_CTRL_NO_CAPT_ACK 16 -#endif /* _input_system_ctrl_defs_h */ +#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h index ec6dd4487158e..efb3d7e135bdd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h @@ -25,4 +25,4 @@ #define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 -#endif /* _irq_controller_defs_h */ +#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h index 669060d17c4fc..ebebb38624cb0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h @@ -111,8 +111,8 @@ #define ISP_SRU_GUARDING 1 #define ISP_VLSU_GUARDING 1 -#define ISP_VRF_RAM 1 -#define ISP_SRF_RAM 1 +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 #define ISP_SPLIT_VMUL_VADD_IS 0 #define ISP_RFSPLIT_FPGA 0 @@ -175,7 +175,7 @@ #define ISP_NWAY ISP_VEC_NELEMS #define NBITS ISP_VEC_ELEMBITS -#define _isp_ceil_div(a,b) (((a)+(b)-1)/(b)) +#define _isp_ceil_div(a, b) (((a) + (b) - 1) / (b)) #define ISP_VEC_ALIGN ISP_VMEM_ALIGN diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h index 5936207216271..5bdc16c71e82c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h @@ -16,7 +16,7 @@ #define _isp_acquisition_defs_h #define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 +#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 /* --------------------------------------------------*/ @@ -32,13 +32,13 @@ /* REGISTER INFO */ /* --------------------------------------------------*/ -#define NOF_ACQ_REGS 12 +#define NOF_ACQ_REGS 12 // Register id's of MMIO slave accesible registers -#define ACQ_START_ADDR_REG_ID 0 +#define ACQ_START_ADDR_REG_ID 0 #define ACQ_MEM_REGION_SIZE_REG_ID 1 #define ACQ_NUM_MEM_REGIONS_REG_ID 2 -#define ACQ_INIT_REG_ID 3 +#define ACQ_INIT_REG_ID 3 #define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 #define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 #define ACQ_LAST_COMMAND_REG_ID 6 @@ -47,34 +47,34 @@ #define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 #define ACQ_FSM_STATE_INFO_REG_ID 10 #define ACQ_INT_CNTR_INFO_REG_ID 11 - + // Register width -#define ACQ_START_ADDR_REG_WIDTH 9 -#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ACQ_INIT_REG_WIDTH 3 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 -#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 -#define ACQ_LAST_COMMAND_REG_WIDTH 32 -#define ACQ_NEXT_COMMAND_REG_WIDTH 32 -#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS *3)) +#define ACQ_START_ADDR_REG_WIDTH 9 +#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ACQ_INIT_REG_WIDTH 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define ACQ_LAST_COMMAND_REG_WIDTH 32 +#define ACQ_NEXT_COMMAND_REG_WIDTH 32 +#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS * 3)) #define ACQ_INT_CNTR_INFO_REG_WIDTH 32 /* register reset value */ -#define ACQ_START_ADDR_REG_RSTVAL 0 +#define ACQ_START_ADDR_REG_RSTVAL 0 #define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 #define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define ACQ_INIT_REG_RSTVAL 0 +#define ACQ_INIT_REG_RSTVAL 0 #define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 #define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 #define ACQ_LAST_COMMAND_REG_RSTVAL 0 #define ACQ_NEXT_COMMAND_REG_RSTVAL 0 #define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 -#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 #define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 -#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 +#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 /* bit definitions */ #define ACQ_INIT_RST_REG_BIT 0 @@ -88,7 +88,7 @@ /* TOKEN INFO */ /* --------------------------------------------------*/ #define ACQ_TOKEN_ID_LSB 0 -#define ACQ_TOKEN_ID_MSB 3 +#define ACQ_TOKEN_ID_MSB 3 #define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 #define ACQ_TOKEN_ID_IDX 0 #define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH @@ -97,9 +97,9 @@ #define ACQ_CMD_START_ADDR_IDX 4 #define ACQ_CMD_START_ADDR_BITS 9 #define ACQ_CMD_NOFWORDS_IDX 13 -#define ACQ_CMD_NOFWORDS_BITS 9 +#define ACQ_CMD_NOFWORDS_BITS 9 #define ACQ_MEM_REGION_ID_IDX 22 -#define ACQ_MEM_REGION_ID_BITS 9 +#define ACQ_MEM_REGION_ID_BITS 9 #define ACQ_PACKET_LENGTH_TOKEN_MSB 21 #define ACQ_PACKET_LENGTH_TOKEN_LSB 13 #define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 @@ -109,11 +109,10 @@ #define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ #define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ - /* Command tokens IDs */ #define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b #define ACQ_READ_REGION_TOKEN_ID 1 //0001b -#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b +#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b #define ACQ_INIT_TOKEN_ID 8 //1000b /* Acknowledge token IDs */ @@ -128,18 +127,17 @@ #define ACQ_TOKEN_NOFWORDS_MSB 21 #define ACQ_TOKEN_NOFWORDS_LSB 13 #define ACQ_TOKEN_STARTADDR_MSB 12 -#define ACQ_TOKEN_STARTADDR_LSB 4 - +#define ACQ_TOKEN_STARTADDR_LSB 4 /* --------------------------------------------------*/ /* MIPI */ /* --------------------------------------------------*/ #define WORD_COUNT_WIDTH 16 -#define PKT_CODE_WIDTH 6 -#define CHN_NO_WIDTH 2 +#define PKT_CODE_WIDTH 6 +#define CHN_NO_WIDTH 2 #define ERROR_INFO_WIDTH 8 - + #define LONG_PKTCODE_MAX 63 #define LONG_PKTCODE_MIN 16 #define SHORT_PKTCODE_MAX 15 @@ -156,7 +154,6 @@ #define ACQ_LINE_PAYLOAD 4 #define ACQ_GEN_SH_PKT 5 - /* bit definition */ #define ACQ_PKT_TYPE_IDX 16 #define ACQ_PKT_TYPE_BITS 6 @@ -174,51 +171,49 @@ #define ACQ_ACK_PKT_LEN_IDX 4 #define ACQ_ACK_PKT_LEN_BITS 16 - /* --------------------------------------------------*/ /* Packet Data Type */ /* --------------------------------------------------*/ - #define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ #define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ #define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ #define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ #define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ #define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ -#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ -#define ACQ_SOL_DATA 2 /* 00 0010 line start */ -#define ACQ_EOL_DATA 3 /* 00 0011 line end */ -#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ +#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ +#define ACQ_SOL_DATA 2 /* 00 0010 line start */ +#define ACQ_EOL_DATA 3 /* 00 0011 line end */ +#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ #define ACQ_RESERVED_DATA_TYPE_MIN 56 #define ACQ_RESERVED_DATA_TYPE_MAX 63 #define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 @@ -231,4 +226,4 @@ /* --------------------------------------------------*/ -#endif /* _isp_acquisition_defs_h */ +#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h index 0a249ce3e5897..8ac2060452220 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h @@ -16,14 +16,14 @@ #define _isp_capture_defs_h #define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ -#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM/8 ) -#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ -#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM +#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ +#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM / 8) +#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ +#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM //#define CAPT_RCV_ACK 1 -//#define CAPT_WRT_ACK 2 -//#define CAPT_IRQ_ACK 3 +//#define CAPT_WRT_ACK 2 +//#define CAPT_IRQ_ACK 3 /* --------------------------------------------------*/ @@ -38,25 +38,25 @@ // Register id's of MMIO slave accesible registers #define CAPT_START_MODE_REG_ID 0 -#define CAPT_START_ADDR_REG_ID 1 -#define CAPT_MEM_REGION_SIZE_REG_ID 2 -#define CAPT_NUM_MEM_REGIONS_REG_ID 3 -#define CAPT_INIT_REG_ID 4 +#define CAPT_START_ADDR_REG_ID 1 +#define CAPT_MEM_REGION_SIZE_REG_ID 2 +#define CAPT_NUM_MEM_REGIONS_REG_ID 3 +#define CAPT_INIT_REG_ID 4 #define CAPT_START_REG_ID 5 -#define CAPT_STOP_REG_ID 6 +#define CAPT_STOP_REG_ID 6 #define CAPT_PACKET_LENGTH_REG_ID 7 -#define CAPT_RECEIVED_LENGTH_REG_ID 8 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 -#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 -#define CAPT_LAST_COMMAND_REG_ID 11 +#define CAPT_RECEIVED_LENGTH_REG_ID 8 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 +#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 +#define CAPT_LAST_COMMAND_REG_ID 11 #define CAPT_NEXT_COMMAND_REG_ID 12 #define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 #define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 #define CAPT_FSM_STATE_INFO_REG_ID 15 // Register width -#define CAPT_START_MODE_REG_WIDTH 1 +#define CAPT_START_MODE_REG_WIDTH 1 #define CAPT_START_ADDR_REG_WIDTH 9 #define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 #define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 @@ -71,25 +71,24 @@ #define CAPT_WRITE2MEM_FSM_STATE_BITS 2 #define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 - #define CAPT_PACKET_LENGTH_REG_WIDTH 17 -#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 #define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 #define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 #define CAPT_LAST_COMMAND_REG_WIDTH 32 -/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ +/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ #define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) -#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 -#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 +#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 +#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 /* register reset value */ -#define CAPT_START_MODE_REG_RSTVAL 0 +#define CAPT_START_MODE_REG_RSTVAL 0 #define CAPT_START_ADDR_REG_RSTVAL 0 #define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 -#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 #define CAPT_INIT_REG_RSTVAL 0 #define CAPT_START_REG_RSTVAL 0 @@ -115,7 +114,6 @@ #define CAPT_INIT_RESTART_MEM_REGION_LSB 13 #define CAPT_INIT_RESTART_MEM_REGION_MSB 21 - #define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT #define CAPT_INIT_RST_REG_BITS 1 #define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT @@ -123,29 +121,27 @@ #define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT #define CAPT_INIT_RESYNC_BITS 1 #define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT -#define CAPT_INIT_RESTART_BITS 1 +#define CAPT_INIT_RESTART_BITS 1 #define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB #define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) #define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB #define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) - - /* --------------------------------------------------*/ /* TOKEN INFO */ /* --------------------------------------------------*/ #define CAPT_TOKEN_ID_LSB 0 -#define CAPT_TOKEN_ID_MSB 3 +#define CAPT_TOKEN_ID_MSB 3 #define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ /* Command tokens IDs */ #define CAPT_START_TOKEN_ID 0 /* 0000b */ #define CAPT_STOP_TOKEN_ID 1 /* 0001b */ -#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ +#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ #define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ #define CAPT_INIT_TOKEN_ID 8 /* 1000b */ -#define CAPT_START_TOKEN_BIT 0 +#define CAPT_START_TOKEN_BIT 0 #define CAPT_STOP_TOKEN_BIT 0 #define CAPT_FREEZE_TOKEN_BIT 0 #define CAPT_RESUME_TOKEN_BIT 0 @@ -169,8 +165,8 @@ #define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 #define CAPT_PACKET_CH_ID_TOKEN_MSB 27 #define CAPT_PACKET_CH_ID_TOKEN_LSB 26 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 /* bit definition */ #define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB @@ -208,21 +204,19 @@ #define CAPT_INIT_TOKEN_INIT_IDX 4 #define CAPT_INIT_TOKEN_INIT_BITS 22 - /* --------------------------------------------------*/ /* MIPI */ /* --------------------------------------------------*/ -#define CAPT_WORD_COUNT_WIDTH 16 -#define CAPT_PKT_CODE_WIDTH 6 -#define CAPT_CHN_NO_WIDTH 2 -#define CAPT_ERROR_INFO_WIDTH 8 +#define CAPT_WORD_COUNT_WIDTH 16 +#define CAPT_PKT_CODE_WIDTH 6 +#define CAPT_CHN_NO_WIDTH 2 +#define CAPT_ERROR_INFO_WIDTH 8 #define LONG_PKTCODE_MAX 63 #define LONG_PKTCODE_MIN 16 #define SHORT_PKTCODE_MAX 15 - /* --------------------------------------------------*/ /* Packet Info */ /* --------------------------------------------------*/ @@ -233,7 +227,6 @@ #define CAPT_LINE_PAYLOAD 4 #define CAPT_GEN_SH_PKT 5 - /* --------------------------------------------------*/ /* Packet Data Type */ /* --------------------------------------------------*/ @@ -244,39 +237,39 @@ #define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ #define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ #define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ -#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ -#define CAPT_SOL_DATA 2 /* 00 0010 line start */ -#define CAPT_EOL_DATA 3 /* 00 0011 line end */ -#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ +#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ +#define CAPT_SOL_DATA 2 /* 00 0010 line start */ +#define CAPT_EOL_DATA 3 /* 00 0011 line end */ +#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ #define CAPT_RESERVED_DATA_TYPE_MIN 56 #define CAPT_RESERVED_DATA_TYPE_MAX 63 #define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 @@ -287,7 +280,6 @@ #define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 #define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 - /* --------------------------------------------------*/ /* Capture Unit State */ /* --------------------------------------------------*/ @@ -299,12 +291,6 @@ #define CAPT_FREEZE 5 #define CAPT_RUN 6 - /* --------------------------------------------------*/ -#endif /* _isp_capture_defs_h */ - - - - - +#endif /* _isp_capture_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h index d2b8972b0d9ec..75451e090f4ff 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h @@ -19,4 +19,4 @@ #define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 -#endif /* _timed_controller_defs_h */ +#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h index 5bc0ad34616e6..0446916d21f61 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h @@ -40,35 +40,35 @@ #define hrt_host_type_of_ulong unsigned long #define hrt_host_type_of_ptr void* -#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type)/8) +#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) #define hrt_scalar_store(cell, type, var, data) \ - HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ cell, \ - HRTCAT(HIVE_MEM_,var), \ - HRTCAT(HIVE_ADDR_,var), \ + HRTCAT(HIVE_MEM_, var), \ + HRTCAT(HIVE_ADDR_, var), \ (HRT_INT_TYPE(type))(data)) #define hrt_scalar_load(cell, type, var) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ cell, \ - HRTCAT(HIVE_MEM_,var), \ - HRTCAT(HIVE_ADDR_,var))) + HRTCAT(HIVE_MEM_, var), \ + HRTCAT(HIVE_ADDR_, var))) #define hrt_indexed_store(cell, type, array, index, data) \ - HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ cell, \ - HRTCAT(HIVE_MEM_,array), \ - (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)), \ + HRTCAT(HIVE_MEM_, array), \ + (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)), \ (HRT_INT_TYPE(type))(data)) #define hrt_indexed_load(cell, type, array, index) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ - cell, \ - HRTCAT(HIVE_MEM_,array), \ - (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)))) + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ + cell, \ + HRTCAT(HIVE_MEM_, array), \ + (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) #endif /* _HRT_VAR_H */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c index ddc7a8f051536..a7bbb31b46077 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c @@ -15,7 +15,6 @@ #ifndef _sp_map_h_ #define _sp_map_h_ - #ifndef _hrt_dummy_use_blob_sp #define _hrt_dummy_use_blob_sp() #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h index 146a578b7c74c..4de5bb81bd238 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h @@ -27,8 +27,8 @@ typedef enum { typedef struct csi_rx_backend_lut_entry_s csi_rx_backend_lut_entry_t; struct csi_rx_backend_lut_entry_s { - uint32_t long_packet_entry; - uint32_t short_packet_entry; + u32 long_packet_entry; + u32 short_packet_entry; }; typedef struct csi_rx_backend_cfg_s csi_rx_backend_cfg_t; @@ -41,23 +41,23 @@ struct csi_rx_backend_cfg_s { struct { bool comp_enable; - uint32_t virtual_channel; - uint32_t data_type; - uint32_t comp_scheme; - uint32_t comp_predictor; - uint32_t comp_bit_idx; + u32 virtual_channel; + u32 data_type; + u32 comp_scheme; + u32 comp_predictor; + u32 comp_bit_idx; } csi_mipi_cfg; }; typedef struct csi_rx_frontend_cfg_s csi_rx_frontend_cfg_t; struct csi_rx_frontend_cfg_s { - uint32_t active_lanes; + u32 active_lanes; }; -extern const uint32_t N_SHORT_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID]; -extern const uint32_t N_LONG_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID]; -extern const uint32_t N_CSI_RX_FE_CTRL_DLANES[N_CSI_RX_FRONTEND_ID]; +extern const u32 N_SHORT_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID]; +extern const u32 N_LONG_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID]; +extern const u32 N_CSI_RX_FE_CTRL_DLANES[N_CSI_RX_FRONTEND_ID]; /* sid_width for CSI_RX_BACKEND_ID */ -extern const uint32_t N_CSI_RX_BE_SID_WIDTH[N_CSI_RX_BACKEND_ID]; +extern const u32 N_CSI_RX_BE_SID_WIDTH[N_CSI_RX_BACKEND_ID]; #endif /* __CSI_RX_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c index 325b821f276cf..de99359a0fbcb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c @@ -30,8 +30,9 @@ ia_css_configure_iterator( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; @@ -54,8 +55,9 @@ ia_css_configure_copy_output( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; @@ -78,8 +80,9 @@ ia_css_configure_crop( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.crop.size; offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; @@ -102,8 +105,9 @@ ia_css_configure_fpn( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; @@ -126,8 +130,9 @@ ia_css_configure_dvs( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; @@ -150,8 +155,9 @@ ia_css_configure_qplane( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; @@ -174,8 +180,9 @@ ia_css_configure_output0( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output0.size; offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; @@ -198,8 +205,9 @@ ia_css_configure_output1( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output1.size; offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; @@ -222,8 +230,9 @@ ia_css_configure_output( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output.size; offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; @@ -247,8 +256,9 @@ ia_css_configure_sc( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.sc.size; offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; @@ -272,8 +282,9 @@ ia_css_configure_raw( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.raw.size; offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; @@ -296,8 +307,9 @@ ia_css_configure_tnr( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; @@ -320,8 +332,9 @@ ia_css_configure_ref( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.ref.size; offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; @@ -344,8 +357,9 @@ ia_css_configure_vf( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.vf.size; offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; @@ -357,4 +371,3 @@ ia_css_configure_vf( } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c index 11e4463ebb506..3afe861b709ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c @@ -67,12 +67,12 @@ static void ia_css_process_aa( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; if (size) { struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) @@ -85,16 +85,16 @@ ia_css_process_aa( static void ia_css_process_anr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); @@ -108,7 +108,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); } - } } @@ -116,16 +115,16 @@ size); static void ia_css_process_anr2( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); @@ -139,7 +138,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); } - } } @@ -147,16 +145,16 @@ size); static void ia_css_process_bh( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); @@ -170,10 +168,9 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); @@ -183,7 +180,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } - } } @@ -191,16 +187,16 @@ size); static void ia_css_process_cnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); @@ -214,7 +210,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); } - } } @@ -222,16 +217,16 @@ size); static void ia_css_process_crop( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); @@ -245,7 +240,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); } - } } @@ -253,16 +247,16 @@ size); static void ia_css_process_csc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); @@ -276,7 +270,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); } - } } @@ -284,16 +277,16 @@ size); static void ia_css_process_dp( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); @@ -307,7 +300,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); } - } } @@ -315,16 +307,16 @@ size); static void ia_css_process_bnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); @@ -338,7 +330,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); } - } } @@ -346,16 +337,16 @@ size); static void ia_css_process_de( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); @@ -369,7 +360,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); } - } } @@ -377,16 +367,16 @@ size); static void ia_css_process_ecd( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); @@ -400,7 +390,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); } - } } @@ -408,16 +397,16 @@ size); static void ia_css_process_formats( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); @@ -431,7 +420,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); } - } } @@ -439,16 +427,16 @@ size); static void ia_css_process_fpn( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); @@ -462,7 +450,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); } - } } @@ -470,16 +457,16 @@ size); static void ia_css_process_gc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); @@ -493,12 +480,11 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); @@ -512,7 +498,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } - } } @@ -520,16 +505,16 @@ size); static void ia_css_process_ce( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); @@ -543,7 +528,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); } - } } @@ -551,16 +535,16 @@ size); static void ia_css_process_yuv2rgb( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); @@ -574,7 +558,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); } - } } @@ -582,16 +565,16 @@ size); static void ia_css_process_rgb2yuv( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); @@ -605,7 +588,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); } - } } @@ -613,16 +595,16 @@ size); static void ia_css_process_r_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); @@ -636,7 +618,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); } - } } @@ -644,16 +625,16 @@ size); static void ia_css_process_g_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); @@ -667,7 +648,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); } - } } @@ -675,16 +655,16 @@ size); static void ia_css_process_b_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); @@ -698,7 +678,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); } - } } @@ -706,19 +685,20 @@ size); static void ia_css_process_uds( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; if (size) { struct sh_css_sp_uds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); p = (struct sh_css_sp_uds_params *) @@ -731,7 +711,6 @@ ia_css_process_uds( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); } - } } @@ -739,16 +718,16 @@ ia_css_process_uds( static void ia_css_process_raa( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); @@ -762,7 +741,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); } - } } @@ -770,16 +748,16 @@ size); static void ia_css_process_s3a( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); @@ -793,7 +771,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); } - } } @@ -801,16 +778,16 @@ size); static void ia_css_process_ob( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); @@ -824,12 +801,11 @@ ia_css_process_ob( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); @@ -843,7 +819,6 @@ ia_css_process_ob( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } - } } @@ -851,16 +826,16 @@ ia_css_process_ob( static void ia_css_process_output( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); @@ -874,7 +849,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); } - } } @@ -882,16 +856,16 @@ size); static void ia_css_process_sc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); @@ -905,7 +879,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); } - } } @@ -913,19 +886,20 @@ size); static void ia_css_process_bds( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; if (size) { struct sh_css_isp_bds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); p = (struct sh_css_isp_bds_params *) @@ -937,7 +911,6 @@ ia_css_process_bds( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); } - } } @@ -945,16 +918,16 @@ ia_css_process_bds( static void ia_css_process_tnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); @@ -968,7 +941,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); } - } } @@ -976,16 +948,16 @@ size); static void ia_css_process_macc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); @@ -999,7 +971,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); } - } } @@ -1007,16 +978,16 @@ size); static void ia_css_process_sdis_horicoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); @@ -1030,7 +1001,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); } - } } @@ -1038,16 +1008,16 @@ size); static void ia_css_process_sdis_vertcoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); @@ -1061,7 +1031,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); } - } } @@ -1069,16 +1038,16 @@ size); static void ia_css_process_sdis_horiproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); @@ -1092,7 +1061,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); } - } } @@ -1100,16 +1068,16 @@ size); static void ia_css_process_sdis_vertproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); @@ -1123,7 +1091,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); } - } } @@ -1131,16 +1098,16 @@ size); static void ia_css_process_sdis2_horicoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); @@ -1154,7 +1121,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); } - } } @@ -1162,16 +1128,16 @@ size); static void ia_css_process_sdis2_vertcoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); @@ -1185,7 +1151,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); } - } } @@ -1193,16 +1158,16 @@ size); static void ia_css_process_sdis2_horiproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); @@ -1216,7 +1181,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); } - } } @@ -1224,16 +1188,16 @@ size); static void ia_css_process_sdis2_vertproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); @@ -1247,7 +1211,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); } - } } @@ -1255,16 +1218,16 @@ size); static void ia_css_process_wb( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); @@ -1278,7 +1241,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); } - } } @@ -1286,16 +1248,16 @@ size); static void ia_css_process_nr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); @@ -1309,7 +1271,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); } - } } @@ -1317,16 +1278,16 @@ size); static void ia_css_process_yee( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); @@ -1340,7 +1301,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); } - } } @@ -1348,16 +1308,16 @@ size); static void ia_css_process_ynr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); @@ -1371,7 +1331,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); } - } } @@ -1379,16 +1338,16 @@ size); static void ia_css_process_fc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); @@ -1402,7 +1361,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); } - } } @@ -1410,16 +1368,16 @@ size); static void ia_css_process_ctc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); @@ -1433,12 +1391,11 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); @@ -1452,7 +1409,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); } - } } @@ -1460,16 +1416,16 @@ size); static void ia_css_process_xnr_table( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); @@ -1483,7 +1439,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); } - } } @@ -1491,16 +1446,16 @@ size); static void ia_css_process_xnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); @@ -1514,7 +1469,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); } - } } @@ -1522,16 +1476,16 @@ size); static void ia_css_process_xnr3( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); @@ -1545,13 +1499,12 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); } - } #ifdef ISP2401 { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); @@ -1565,15 +1518,14 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); } - } #endif } /* Code generated by genparam/gencode.c:gen_param_process_table() */ -void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned pipe_id, +void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) = { ia_css_process_aa, @@ -1629,12 +1581,12 @@ void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( static void ia_css_get_dp_config(const struct ia_css_isp_parameters *params, struct ia_css_dp_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: config=%p\n", + config); *config = params->dp_config; @@ -1648,10 +1600,10 @@ void ia_css_set_dp_config(struct ia_css_isp_parameters *params, const struct ia_css_dp_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dp_config = *config; @@ -1660,8 +1612,7 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DP_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1669,12 +1620,12 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, static void ia_css_get_wb_config(const struct ia_css_isp_parameters *params, struct ia_css_wb_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: config=%p\n", + config); *config = params->wb_config; @@ -1688,10 +1639,10 @@ void ia_css_set_wb_config(struct ia_css_isp_parameters *params, const struct ia_css_wb_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->wb_config = *config; @@ -1700,8 +1651,7 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_WB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1709,12 +1659,12 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, static void ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, struct ia_css_tnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: config=%p\n", + config); *config = params->tnr_config; @@ -1728,10 +1678,10 @@ void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, const struct ia_css_tnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->tnr_config = *config; @@ -1740,8 +1690,7 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_TNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1749,12 +1698,12 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_ob_config(const struct ia_css_isp_parameters *params, struct ia_css_ob_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: config=%p\n", + config); *config = params->ob_config; @@ -1768,10 +1717,10 @@ void ia_css_set_ob_config(struct ia_css_isp_parameters *params, const struct ia_css_ob_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ob_config = *config; @@ -1780,8 +1729,7 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1789,12 +1737,12 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, static void ia_css_get_de_config(const struct ia_css_isp_parameters *params, struct ia_css_de_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: config=%p\n", + config); *config = params->de_config; @@ -1808,10 +1756,10 @@ void ia_css_set_de_config(struct ia_css_isp_parameters *params, const struct ia_css_de_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->de_config = *config; @@ -1820,8 +1768,7 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1829,12 +1776,12 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, static void ia_css_get_anr_config(const struct ia_css_isp_parameters *params, struct ia_css_anr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: config=%p\n", + config); *config = params->anr_config; @@ -1848,10 +1795,10 @@ void ia_css_set_anr_config(struct ia_css_isp_parameters *params, const struct ia_css_anr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_config = *config; @@ -1860,8 +1807,7 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1869,12 +1815,12 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, static void ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, struct ia_css_anr_thres *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: config=%p\n", + config); *config = params->anr_thres; @@ -1888,10 +1834,10 @@ void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, const struct ia_css_anr_thres *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_thres = *config; @@ -1900,8 +1846,7 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR2_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1909,12 +1854,12 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, static void ia_css_get_ce_config(const struct ia_css_isp_parameters *params, struct ia_css_ce_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: config=%p\n", + config); *config = params->ce_config; @@ -1928,10 +1873,10 @@ void ia_css_set_ce_config(struct ia_css_isp_parameters *params, const struct ia_css_ce_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ce_config = *config; @@ -1940,8 +1885,7 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1949,12 +1893,12 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, static void ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, struct ia_css_ecd_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: config=%p\n", + config); *config = params->ecd_config; @@ -1968,10 +1912,10 @@ void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, const struct ia_css_ecd_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ecd_config = *config; @@ -1980,8 +1924,7 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ECD_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1989,12 +1932,12 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, static void ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, struct ia_css_ynr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: config=%p\n", + config); *config = params->ynr_config; @@ -2008,10 +1951,10 @@ void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, const struct ia_css_ynr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ynr_config = *config; @@ -2020,8 +1963,7 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2029,12 +1971,12 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, static void ia_css_get_fc_config(const struct ia_css_isp_parameters *params, struct ia_css_fc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: config=%p\n", + config); *config = params->fc_config; @@ -2048,10 +1990,10 @@ void ia_css_set_fc_config(struct ia_css_isp_parameters *params, const struct ia_css_fc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->fc_config = *config; @@ -2060,8 +2002,7 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2069,12 +2010,12 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, static void ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, struct ia_css_cnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: config=%p\n", + config); *config = params->cnr_config; @@ -2088,10 +2029,10 @@ void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, const struct ia_css_cnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cnr_config = *config; @@ -2100,8 +2041,7 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2109,12 +2049,12 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_macc_config(const struct ia_css_isp_parameters *params, struct ia_css_macc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: config=%p\n", + config); *config = params->macc_config; @@ -2128,10 +2068,10 @@ void ia_css_set_macc_config(struct ia_css_isp_parameters *params, const struct ia_css_macc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->macc_config = *config; @@ -2140,8 +2080,7 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_MACC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2149,12 +2088,12 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, static void ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, struct ia_css_ctc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: config=%p\n", + config); *config = params->ctc_config; @@ -2168,10 +2107,10 @@ void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, const struct ia_css_ctc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ctc_config = *config; @@ -2180,8 +2119,7 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CTC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2189,12 +2127,12 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, static void ia_css_get_aa_config(const struct ia_css_isp_parameters *params, struct ia_css_aa_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: config=%p\n", + config); *config = params->aa_config; @@ -2207,10 +2145,10 @@ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, const struct ia_css_aa_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); params->aa_config = *config; params->config_changed[IA_CSS_AA_ID] = true; @@ -2218,8 +2156,7 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_AA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2227,12 +2164,12 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, static void ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: config=%p\n", + config); *config = params->yuv2rgb_cc_config; @@ -2246,10 +2183,10 @@ void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->yuv2rgb_cc_config = *config; @@ -2258,8 +2195,7 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YUV2RGB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2267,12 +2203,12 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, static void ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: config=%p\n", + config); *config = params->rgb2yuv_cc_config; @@ -2286,10 +2222,10 @@ void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->rgb2yuv_cc_config = *config; @@ -2298,8 +2234,7 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_RGB2YUV_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2307,12 +2242,12 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, static void ia_css_get_csc_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: config=%p\n", + config); *config = params->cc_config; @@ -2326,10 +2261,10 @@ void ia_css_set_csc_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cc_config = *config; @@ -2338,8 +2273,7 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CSC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2347,12 +2281,12 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, static void ia_css_get_nr_config(const struct ia_css_isp_parameters *params, struct ia_css_nr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: config=%p\n", + config); *config = params->nr_config; @@ -2366,10 +2300,10 @@ void ia_css_set_nr_config(struct ia_css_isp_parameters *params, const struct ia_css_nr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->nr_config = *config; @@ -2379,8 +2313,7 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_NR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2388,12 +2321,12 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, static void ia_css_get_gc_config(const struct ia_css_isp_parameters *params, struct ia_css_gc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: config=%p\n", + config); *config = params->gc_config; @@ -2407,10 +2340,10 @@ void ia_css_set_gc_config(struct ia_css_isp_parameters *params, const struct ia_css_gc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->gc_config = *config; @@ -2419,8 +2352,7 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_GC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2428,12 +2360,12 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2447,10 +2379,10 @@ void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2462,8 +2394,7 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2471,12 +2402,12 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2490,10 +2421,10 @@ void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2505,8 +2436,7 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2514,12 +2444,12 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2533,10 +2463,10 @@ void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2548,8 +2478,7 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2557,12 +2486,12 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2576,10 +2505,10 @@ void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2591,8 +2520,7 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2600,12 +2528,12 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2619,10 +2547,10 @@ void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2634,8 +2562,7 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2643,12 +2570,12 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2662,10 +2589,10 @@ void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2677,8 +2604,7 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2686,12 +2612,12 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2705,10 +2631,10 @@ void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2720,8 +2646,7 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2729,12 +2654,12 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2748,10 +2673,10 @@ void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2763,8 +2688,7 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2772,12 +2696,12 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: config=%p\n", + config); *config = params->r_gamma_table; @@ -2791,10 +2715,10 @@ void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->r_gamma_table = *config; @@ -2803,8 +2727,7 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_R_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2812,12 +2735,12 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: config=%p\n", + config); *config = params->g_gamma_table; @@ -2831,10 +2754,10 @@ void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->g_gamma_table = *config; @@ -2843,8 +2766,7 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_G_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2852,12 +2774,12 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: config=%p\n", + config); *config = params->b_gamma_table; @@ -2871,10 +2793,10 @@ void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->b_gamma_table = *config; @@ -2883,8 +2805,7 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_B_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2892,12 +2813,12 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: config=%p\n", + config); *config = params->xnr_table; @@ -2911,10 +2832,10 @@ void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; @@ -2923,8 +2844,7 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_TABLE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2932,12 +2852,12 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, static void ia_css_get_formats_config(const struct ia_css_isp_parameters *params, struct ia_css_formats_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: config=%p\n", + config); *config = params->formats_config; @@ -2951,10 +2871,10 @@ void ia_css_set_formats_config(struct ia_css_isp_parameters *params, const struct ia_css_formats_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->formats_config = *config; @@ -2963,8 +2883,7 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FORMATS_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2972,12 +2891,12 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: config=%p\n", + config); *config = params->xnr_config; @@ -2991,10 +2910,10 @@ void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_config = *config; @@ -3003,8 +2922,7 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3012,12 +2930,12 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr3_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: config=%p\n", + config); *config = params->xnr3_config; @@ -3031,10 +2949,10 @@ void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr3_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr3_config = *config; @@ -3043,8 +2961,7 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR3_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3052,12 +2969,12 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, static void ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, struct ia_css_3a_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: config=%p\n", + config); *config = params->s3a_config; @@ -3071,10 +2988,10 @@ void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, const struct ia_css_3a_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->s3a_config = *config; @@ -3084,8 +3001,7 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_S3A_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3093,12 +3009,12 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, static void ia_css_get_output_config(const struct ia_css_isp_parameters *params, struct ia_css_output_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: config=%p\n", + config); *config = params->output_config; @@ -3112,10 +3028,10 @@ void ia_css_set_output_config(struct ia_css_isp_parameters *params, const struct ia_css_output_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->output_config = *config; @@ -3124,8 +3040,7 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OUTPUT_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_global_access_function() */ @@ -3217,4 +3132,3 @@ ia_css_set_configs(struct ia_css_isp_parameters *params, ia_css_set_s3a_config(params, config->s3a_config); ia_css_set_output_config(params, config->output_config); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h index 5b3deb7f74aec..b5175c253c61d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h @@ -149,8 +149,8 @@ struct ia_css_memory_offsets { struct ia_css_pipeline_stage; /* forward declaration */ -extern void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned pipe_id, +extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c index e87d05bc73ae8..dcc42c1ce94ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c @@ -28,12 +28,11 @@ ia_css_initialize_aa_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.aa.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; if (size) memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); } @@ -47,16 +46,15 @@ ia_css_initialize_cnr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; if (size) { ia_css_init_cnr_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); } @@ -70,16 +68,15 @@ ia_css_initialize_cnr2_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; if (size) { ia_css_init_cnr2_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); } @@ -93,16 +90,15 @@ ia_css_initialize_dp_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.dp.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; if (size) { ia_css_init_dp_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); } @@ -116,16 +112,15 @@ ia_css_initialize_de_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.de.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; if (size) { ia_css_init_de_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); } @@ -139,16 +134,15 @@ ia_css_initialize_tnr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; if (size) { ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); } @@ -162,16 +156,15 @@ ia_css_initialize_ref_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->dmem.ref.size; + unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; - unsigned offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; if (size) { ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); } @@ -185,16 +178,15 @@ ia_css_initialize_ynr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; if (size) { ia_css_init_ynr_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); } @@ -211,4 +203,3 @@ void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_bina ia_css_initialize_ref_state, ia_css_initialize_ynr_state, }; - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c index 505e2b600beb9..50080565d0d6d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c @@ -12,29 +12,28 @@ * more details. */ - #include "system_global.h" -const uint32_t N_SHORT_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { +const u32 N_SHORT_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { 4, /* 4 entries at CSI_RX_BACKEND0_ID*/ 4, /* 4 entries at CSI_RX_BACKEND1_ID*/ 4 /* 4 entries at CSI_RX_BACKEND2_ID*/ }; -const uint32_t N_LONG_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { +const u32 N_LONG_PACKET_LUT_ENTRIES[N_CSI_RX_BACKEND_ID] = { 8, /* 8 entries at CSI_RX_BACKEND0_ID*/ 4, /* 4 entries at CSI_RX_BACKEND1_ID*/ 4 /* 4 entries at CSI_RX_BACKEND2_ID*/ }; -const uint32_t N_CSI_RX_FE_CTRL_DLANES[N_CSI_RX_FRONTEND_ID] = { +const u32 N_CSI_RX_FE_CTRL_DLANES[N_CSI_RX_FRONTEND_ID] = { N_CSI_RX_DLANE_ID, /* 4 dlanes for CSI_RX_FR0NTEND0_ID */ N_CSI_RX_DLANE_ID, /* 4 dlanes for CSI_RX_FR0NTEND1_ID */ N_CSI_RX_DLANE_ID /* 4 dlanes for CSI_RX_FR0NTEND2_ID */ }; /* sid_width for CSI_RX_BACKEND_ID */ -const uint32_t N_CSI_RX_BE_SID_WIDTH[N_CSI_RX_BACKEND_ID] = { +const u32 N_CSI_RX_BE_SID_WIDTH[N_CSI_RX_BACKEND_ID] = { 3, 2, 2 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h index a2e9d54a4a376..a86de89b2cfc4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h @@ -16,7 +16,7 @@ #define __CSI_RX_LOCAL_H_INCLUDED__ #include "csi_rx_global.h" -#define N_CSI_RX_BE_MIPI_COMP_FMT_REG 4 +#define N_CSI_RX_BE_MIPI_COMP_FMT_REG 4 #define N_CSI_RX_BE_MIPI_CUSTOM_PEC 12 #define N_CSI_RX_BE_SHORT_PKT_LUT 4 #define N_CSI_RX_BE_LONG_PKT_LUT 8 @@ -26,36 +26,37 @@ typedef struct csi_rx_be_ctrl_state_s csi_rx_be_ctrl_state_t; /*mipi_backend_custom_mode_pixel_extraction_config*/ typedef struct csi_rx_be_ctrl_pec_s csi_rx_be_ctrl_pec_t; - struct csi_rx_fe_ctrl_lane_s { hrt_data termen; hrt_data settle; }; + struct csi_rx_fe_ctrl_state_s { - hrt_data enable; - hrt_data nof_enable_lanes; - hrt_data error_handling; - hrt_data status; - hrt_data status_dlane_hs; - hrt_data status_dlane_lp; - csi_rx_fe_ctrl_lane_t clane; - csi_rx_fe_ctrl_lane_t dlane[N_CSI_RX_DLANE_ID]; + hrt_data enable; + hrt_data nof_enable_lanes; + hrt_data error_handling; + hrt_data status; + hrt_data status_dlane_hs; + hrt_data status_dlane_lp; + csi_rx_fe_ctrl_lane_t clane; + csi_rx_fe_ctrl_lane_t dlane[N_CSI_RX_DLANE_ID]; }; + struct csi_rx_be_ctrl_state_s { - hrt_data enable; - hrt_data status; - hrt_data comp_format_reg[N_CSI_RX_BE_MIPI_COMP_FMT_REG]; - hrt_data raw16; - hrt_data raw18; - hrt_data force_raw8; - hrt_data irq_status; - hrt_data custom_mode_enable; - hrt_data custom_mode_data_state; - hrt_data pec[N_CSI_RX_BE_MIPI_CUSTOM_PEC]; - hrt_data custom_mode_valid_eop_config; - hrt_data global_lut_disregard_reg; - hrt_data packet_status_stall; - hrt_data short_packet_lut_entry[N_CSI_RX_BE_SHORT_PKT_LUT]; - hrt_data long_packet_lut_entry[N_CSI_RX_BE_LONG_PKT_LUT]; + hrt_data enable; + hrt_data status; + hrt_data comp_format_reg[N_CSI_RX_BE_MIPI_COMP_FMT_REG]; + hrt_data raw16; + hrt_data raw18; + hrt_data force_raw8; + hrt_data irq_status; + hrt_data custom_mode_enable; + hrt_data custom_mode_data_state; + hrt_data pec[N_CSI_RX_BE_MIPI_CUSTOM_PEC]; + hrt_data custom_mode_valid_eop_config; + hrt_data global_lut_disregard_reg; + hrt_data packet_status_stall; + hrt_data short_packet_lut_entry[N_CSI_RX_BE_SHORT_PKT_LUT]; + hrt_data long_packet_lut_entry[N_CSI_RX_BE_LONG_PKT_LUT]; }; #endif /* __CSI_RX_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h index 4fa74e7a96e62..c8bcef24d7c28 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h @@ -24,7 +24,6 @@ #include "assert_support.h" /* assert */ #include "print_support.h" /* print */ - /***************************************************** * * Native command interface (NCI). @@ -38,7 +37,7 @@ static inline void csi_rx_fe_ctrl_get_state( const csi_rx_frontend_ID_t ID, csi_rx_fe_ctrl_state_t *state) { - uint32_t i; + u32 i; state->enable = csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ENABLE_REG_IDX); @@ -65,7 +64,7 @@ static inline void csi_rx_fe_ctrl_get_state( csi_rx_fe_ctrl_get_dlane_state( ID, i, - &(state->dlane[i])); + &state->dlane[i]); } } @@ -75,16 +74,15 @@ static inline void csi_rx_fe_ctrl_get_state( */ static inline void csi_rx_fe_ctrl_get_dlane_state( const csi_rx_frontend_ID_t ID, - const uint32_t lane, + const u32 lane, csi_rx_fe_ctrl_lane_t *dlane_state) { - dlane_state->termen = csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane)); dlane_state->settle = csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane)); - } + /** * @brief dump the csi rx fe state. * Refer to "csi_rx_public.h" for details. @@ -93,24 +91,24 @@ static inline void csi_rx_fe_ctrl_dump_state( const csi_rx_frontend_ID_t ID, csi_rx_fe_ctrl_state_t *state) { - uint32_t i; + u32 i; - ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x \n", ID, state->enable); - ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x \n", ID, state->nof_enable_lanes); - ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x \n", ID, state->error_handling); - ia_css_print("CSI RX FE STATE Controller %d Status 0x%x \n", ID, state->status); - ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x \n", ID, state->status_dlane_hs); - ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x \n", ID, state->status_dlane_lp); - ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x \n", ID, state->clane.termen); - ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x \n", ID, state->clane.settle); + ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x\n", ID, state->enable); + ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x\n", ID, state->nof_enable_lanes); + ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x\n", ID, state->error_handling); + ia_css_print("CSI RX FE STATE Controller %d Status 0x%x\n", ID, state->status); + ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x\n", ID, state->status_dlane_hs); + ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x\n", ID, state->status_dlane_lp); + ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x\n", ID, state->clane.termen); + ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x\n", ID, state->clane.settle); /* * Get the values of the register-set per * dlane. */ for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) { - ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x \n", ID, i, state->dlane[i].termen); - ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x \n", ID, i, state->dlane[i].settle); + ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x\n", ID, i, state->dlane[i].termen); + ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x\n", ID, i, state->dlane[i].settle); } } @@ -122,7 +120,7 @@ static inline void csi_rx_be_ctrl_get_state( const csi_rx_backend_ID_t ID, csi_rx_be_ctrl_state_t *state) { - uint32_t i; + u32 i; state->enable = csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_ENABLE_REG_IDX); @@ -130,10 +128,10 @@ static inline void csi_rx_be_ctrl_get_state( state->status = csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_STATUS_REG_IDX); - for(i = 0; i comp_format_reg[i] = - csi_rx_be_ctrl_reg_load(ID, - _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX+i); + csi_rx_be_ctrl_reg_load(ID, + _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX + i); } state->raw16 = @@ -152,8 +150,8 @@ static inline void csi_rx_be_ctrl_get_state( state->custom_mode_data_state = csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX); - for(i = 0; i pec[i] = + for (i = 0; i < N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) { + state->pec[i] = csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX + i); } state->custom_mode_valid_eop_config = @@ -185,36 +183,37 @@ static inline void csi_rx_be_ctrl_dump_state( const csi_rx_backend_ID_t ID, csi_rx_be_ctrl_state_t *state) { - uint32_t i; + u32 i; - ia_css_print("CSI RX BE STATE Controller %d Enable 0x%x \n", ID, state->enable); - ia_css_print("CSI RX BE STATE Controller %d Status 0x%x \n", ID, state->status); + ia_css_print("CSI RX BE STATE Controller %d Enable 0x%x\n", ID, state->enable); + ia_css_print("CSI RX BE STATE Controller %d Status 0x%x\n", ID, state->status); - for(i = 0; i status); + for (i = 0; i < N_CSI_RX_BE_MIPI_COMP_FMT_REG ; i++) { + ia_css_print("CSI RX BE STATE Controller %d comp format reg vc%d value 0x%x\n", ID, i, state->status); } - ia_css_print("CSI RX BE STATE Controller %d RAW16 0x%x \n", ID, state->raw16); - ia_css_print("CSI RX BE STATE Controller %d RAW18 0x%x \n", ID, state->raw18); - ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x \n", ID, state->force_raw8); - ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x \n", ID, state->irq_status); + ia_css_print("CSI RX BE STATE Controller %d RAW16 0x%x\n", ID, state->raw16); + ia_css_print("CSI RX BE STATE Controller %d RAW18 0x%x\n", ID, state->raw18); + ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x\n", ID, state->force_raw8); + ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x\n", ID, state->irq_status); #if 0 /* ToDo:Getting device access error for this register */ - for(i = 0; i pec[i]); + for (i = 0; i < N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) { + ia_css_print("CSI RX BE STATE Controller %d PEC ID %d custom pec 0x%x\n", ID, i, state->pec[i]); } #endif - ia_css_print("CSI RX BE STATE Controller %d Global LUT disregard reg 0x%x \n", ID, state->global_lut_disregard_reg); - ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x \n", ID, state->packet_status_stall); + ia_css_print("CSI RX BE STATE Controller %d Global LUT disregard reg 0x%x\n", ID, state->global_lut_disregard_reg); + ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x\n", ID, state->packet_status_stall); /* * Get the values of the register-set per * lut. */ for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) { - ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x \n", ID, i, state->short_packet_lut_entry[i]); + ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x\n", ID, i, state->short_packet_lut_entry[i]); } for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) { - ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x \n", ID, i, state->long_packet_lut_entry[i]); + ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x\n", ID, i, state->long_packet_lut_entry[i]); } } + /* end of NCI */ /***************************************************** * @@ -231,10 +230,9 @@ static inline hrt_data csi_rx_fe_ctrl_reg_load( { assert(ID < N_CSI_RX_FRONTEND_ID); assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data)); } - /** * @brief Store a value to the register. * Refer to "ibuf_ctrl_public.h" for details. @@ -247,8 +245,9 @@ static inline void csi_rx_fe_ctrl_reg_store( assert(ID < N_CSI_RX_FRONTEND_ID); assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); } + /** * @brief Load the register value. * Refer to "csi_rx_public.h" for details. @@ -259,10 +258,9 @@ static inline hrt_data csi_rx_be_ctrl_reg_load( { assert(ID < N_CSI_RX_BACKEND_ID); assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data)); } - /** * @brief Store a value to the register. * Refer to "ibuf_ctrl_public.h" for details. @@ -275,8 +273,9 @@ static inline void csi_rx_be_ctrl_reg_store( assert(ID < N_CSI_RX_BACKEND_ID); assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); } + /* end of DLI */ #endif /* __CSI_RX_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c index 14973d1c27560..8b06b2410d1d2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c @@ -15,7 +15,7 @@ #include #include "system_global.h" -const uint32_t N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID] = { +const u32 N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID] = { 8, /* IBUF_CTRL0_ID supports at most 8 processes */ 4, /* IBUF_CTRL1_ID supports at most 4 processes */ 4 /* IBUF_CTRL2_ID supports at most 4 processes */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h index 4d07c2fe14696..5fda64313935d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h @@ -22,7 +22,6 @@ #include "assert_support.h" /* assert */ #include "print_support.h" /* print */ - /***************************************************** * * Native command interface (NCI). @@ -36,7 +35,7 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( const ibuf_ctrl_ID_t ID, ibuf_ctrl_state_t *state) { - uint32_t i; + u32 i; state->recalc_words = ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS); @@ -51,7 +50,7 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( ibuf_ctrl_get_proc_state( ID, i, - &(state->proc_state[i])); + &state->proc_state[i]); } } @@ -61,7 +60,7 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( */ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state( const ibuf_ctrl_ID_t ID, - const uint32_t proc_id, + const u32 proc_id, ibuf_ctrl_proc_state_t *state) { hrt_address reg_bank_offset; @@ -147,6 +146,7 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state( state->isp_sync_state = ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE); } + /** * @brief Dump the ibuf-controller state. * Refer to "ibuf_ctrl_public.h" for details. @@ -155,7 +155,8 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state( const ibuf_ctrl_ID_t ID, ibuf_ctrl_state_t *state) { - uint32_t i; + u32 i; + ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID, state->recalc_words); ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters); @@ -192,6 +193,7 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state( ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, state->proc_state[i].isp_sync_state); } } + /* end of NCI */ /***************************************************** @@ -209,10 +211,9 @@ STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load( { assert(ID < N_IBUF_CTRL_ID); assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data)); } - /** * @brief Store a value to the register. * Refer to "ibuf_ctrl_public.h" for details. @@ -225,9 +226,9 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_reg_store( assert(ID < N_IBUF_CTRL_ID); assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(IBUF_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); } -/* end of DLI */ +/* end of DLI */ #endif /* __IBUF_CTRL_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h index 97505e436047f..361f6fb25395e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h @@ -21,7 +21,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( const input_system_ID_t ID, input_system_state_t *state) { - uint32_t i; + u32 i; (void)(ID); @@ -29,40 +29,40 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { csi_rx_fe_ctrl_get_state( (csi_rx_frontend_ID_t)i, - &(state->csi_rx_fe_ctrl_state[i])); + &state->csi_rx_fe_ctrl_state[i]); } /* get the states of all CIS RX backend devices */ for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { csi_rx_be_ctrl_get_state( (csi_rx_backend_ID_t)i, - &(state->csi_rx_be_ctrl_state[i])); + &state->csi_rx_be_ctrl_state[i]); } /* get the states of all pixelgen devices */ for (i = 0; i < N_PIXELGEN_ID; i++) { pixelgen_ctrl_get_state( (pixelgen_ID_t)i, - &(state->pixelgen_ctrl_state[i])); + &state->pixelgen_ctrl_state[i]); } /* get the states of all stream2mmio devices */ for (i = 0; i < N_STREAM2MMIO_ID; i++) { stream2mmio_get_state( (stream2mmio_ID_t)i, - &(state->stream2mmio_state[i])); + &state->stream2mmio_state[i]); } /* get the states of all ibuf-controller devices */ for (i = 0; i < N_IBUF_CTRL_ID; i++) { ibuf_ctrl_get_state( (ibuf_ctrl_ID_t)i, - &(state->ibuf_ctrl_state[i])); + &state->ibuf_ctrl_state[i]); } /* get the states of all isys irq controllers */ for (i = 0; i < N_ISYS_IRQ_ID; i++) { - isys_irqc_state_get((isys_irq_ID_t)i, &(state->isys_irqc_state[i])); + isys_irqc_state_get((isys_irq_ID_t)i, &state->isys_irqc_state[i]); } /* TODO: get the states of all ISYS2401 DMA devices */ @@ -71,11 +71,12 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( return INPUT_SYSTEM_ERR_NO_ERROR; } + STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state( const input_system_ID_t ID, input_system_state_t *state) { - uint32_t i; + u32 i; (void)(ID); @@ -83,40 +84,40 @@ STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state( for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { csi_rx_fe_ctrl_dump_state( (csi_rx_frontend_ID_t)i, - &(state->csi_rx_fe_ctrl_state[i])); + &state->csi_rx_fe_ctrl_state[i]); } /* dump the states of all CIS RX backend devices */ for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { csi_rx_be_ctrl_dump_state( (csi_rx_backend_ID_t)i, - &(state->csi_rx_be_ctrl_state[i])); + &state->csi_rx_be_ctrl_state[i]); } /* dump the states of all pixelgen devices */ for (i = 0; i < N_PIXELGEN_ID; i++) { pixelgen_ctrl_dump_state( (pixelgen_ID_t)i, - &(state->pixelgen_ctrl_state[i])); + &state->pixelgen_ctrl_state[i]); } /* dump the states of all st2mmio devices */ for (i = 0; i < N_STREAM2MMIO_ID; i++) { stream2mmio_dump_state( (stream2mmio_ID_t)i, - &(state->stream2mmio_state[i])); + &state->stream2mmio_state[i]); } /* dump the states of all ibuf-controller devices */ for (i = 0; i < N_IBUF_CTRL_ID; i++) { ibuf_ctrl_dump_state( (ibuf_ctrl_ID_t)i, - &(state->ibuf_ctrl_state[i])); + &state->ibuf_ctrl_state[i]); } /* dump the states of all isys irq controllers */ for (i = 0; i < N_ISYS_IRQ_ID; i++) { - isys_irqc_state_dump((isys_irq_ID_t)i, &(state->isys_irqc_state[i])); + isys_irqc_state_dump((isys_irq_ID_t)i, &state->isys_irqc_state[i]); } /* TODO: dump the states of all ISYS2401 DMA devices */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h index 2cd1aeecf617b..6cb9dd69e96f9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h @@ -22,7 +22,6 @@ #include "dma_v2_defs.h" #include "print_support.h" - STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store( const isys2401_dma_ID_t dma_id, const unsigned int reg, @@ -31,7 +30,7 @@ STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store( unsigned int reg_loc; assert(dma_id < N_ISYS2401_DMA_ID); - assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address)-1); + assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address) - 1); reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); @@ -47,7 +46,7 @@ STORAGE_CLASS_ISYS2401_DMA_C hrt_data isys2401_dma_reg_load( hrt_data value; assert(dma_id < N_ISYS2401_DMA_ID); - assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address)-1); + assert(ISYS2401_DMA_BASE[dma_id] != (hrt_address) - 1); reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h index e69f39893bd2e..c2f34e45d84be 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h @@ -52,9 +52,7 @@ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_dump( const isys_irqc_state_t *state) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "isys irq controller id %d" - "\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x" - "\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n", + "isys irq controller id %d\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n", isys_irqc_id, state->status, state->edge, state->mask, state->enable, state->level_no); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h index 801523977e1d4..1449c19abc862 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h @@ -31,6 +31,6 @@ struct stream2mmio_sid_state_s { }; struct stream2mmio_state_s { - stream2mmio_sid_state_t sid_state[N_STREAM2MMIO_SID_ID]; + stream2mmio_sid_state_t sid_state[N_STREAM2MMIO_SID_ID]; }; #endif /* __ISYS_STREAM2MMIO_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h index f946105ddf43a..71743a8b940e6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h @@ -50,7 +50,7 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state( * stream2mmio-controller sids. */ for (i = STREAM2MMIO_SID0_ID; i < N_STREAM2MMIO_SID_PROCS[ID]; i++) { - stream2mmio_get_sid_state(ID, i, &(state->sid_state[i])); + stream2mmio_get_sid_state(ID, i, &state->sid_state[i]); } } @@ -63,7 +63,6 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state( const stream2mmio_sid_ID_t sid_id, stream2mmio_sid_state_t *state) { - state->rcv_ack = stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID); @@ -84,7 +83,6 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state( state->block_when_no_cmd = stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID); - } /** @@ -101,8 +99,8 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state( ia_css_print("\t \t Strides 0x%x\n", state->strides); ia_css_print("\t \t Num Items 0x%x\n", state->num_items); ia_css_print("\t \t block when no cmd 0x%x\n", state->block_when_no_cmd); - } + /** * @brief Dump the ibuf-controller state. * Refer to "stream2mmio_public.h" for details. @@ -119,9 +117,10 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_dump_state( */ for (i = STREAM2MMIO_SID0_ID; i < N_STREAM2MMIO_SID_PROCS[ID]; i++) { ia_css_print("StREAM2MMIO ID %d SID %d\n", ID, i); - stream2mmio_print_sid_state(&(state->sid_state[i])); + stream2mmio_print_sid_state(&state->sid_state[i]); } } + /* end of NCI */ /***************************************************** @@ -138,7 +137,7 @@ STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load( const stream2mmio_sid_ID_t sid_id, const uint32_t reg_idx) { - uint32_t reg_bank_offset; + u32 reg_bank_offset; assert(ID < N_STREAM2MMIO_ID); @@ -147,7 +146,6 @@ STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load( (reg_bank_offset + reg_idx) * sizeof(hrt_data)); } - /** * @brief Store a value to the register. * Refer to "stream2mmio_public.h" for details. @@ -163,6 +161,7 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_reg_store( ia_css_device_store_uint32(STREAM2MMIO_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); } + /* end of DLI */ #endif /* __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h index c5bf540eadf11..3aa7e29d0e7d9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h @@ -20,7 +20,6 @@ #include "device_access.h" /* ia_css_device_load_uint32 */ #include "assert_support.h" /* assert */ - /***************************************************** * * Native command interface (NCI). @@ -34,7 +33,6 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state( const pixelgen_ID_t ID, pixelgen_ctrl_state_t *state) { - state->com_enable = pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX); state->prbs_rstval0 = @@ -90,6 +88,7 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state( state->tpg_b2 = pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX); } + /** * @brief Dump the pixelgen state. * Refer to "pixelgen_public.h" for details. @@ -98,34 +97,35 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state( const pixelgen_ID_t ID, pixelgen_ctrl_state_t *state) { - ia_css_print("Pixel Generator ID %d Enable 0x%x \n", ID, state->com_enable); - ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x \n", ID, state->prbs_rstval0); - ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x \n", ID, state->prbs_rstval1); - ia_css_print("Pixel Generator ID %d SYNC SID 0x%x \n", ID, state->syng_sid); - ia_css_print("Pixel Generator ID %d syng free run 0x%x \n", ID, state->syng_free_run); - ia_css_print("Pixel Generator ID %d syng pause 0x%x \n", ID, state->syng_pause); - ia_css_print("Pixel Generator ID %d syng no of frames 0x%x \n", ID, state->syng_nof_frames); - ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x \n", ID, state->syng_nof_pixels); - ia_css_print("Pixel Generator ID %d syng no of line 0x%x \n", ID, state->syng_nof_line); - ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x \n", ID, state->syng_hblank_cyc); - ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x \n", ID, state->syng_vblank_cyc); - ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x \n", ID, state->syng_stat_hcnt); - ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x \n", ID, state->syng_stat_vcnt); - ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x \n", ID, state->syng_stat_fcnt); - ia_css_print("Pixel Generator ID %d syng stat done 0x%x \n", ID, state->syng_stat_done); - ia_css_print("Pixel Generator ID %d tpg modee 0x%x \n", ID, state->tpg_mode); - ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x \n", ID, state->tpg_hcnt_mask); - ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x \n", ID, state->tpg_hcnt_mask); - ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x \n", ID, state->tpg_xycnt_mask); - ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x \n", ID, state->tpg_hcnt_delta); - ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x \n", ID, state->tpg_vcnt_delta); - ia_css_print("Pixel Generator ID %d tpg r1 0x%x \n", ID, state->tpg_r1); - ia_css_print("Pixel Generator ID %d tpg g1 0x%x \n", ID, state->tpg_g1); - ia_css_print("Pixel Generator ID %d tpg b1 0x%x \n", ID, state->tpg_b1); - ia_css_print("Pixel Generator ID %d tpg r2 0x%x \n", ID, state->tpg_r2); - ia_css_print("Pixel Generator ID %d tpg g2 0x%x \n", ID, state->tpg_g2); - ia_css_print("Pixel Generator ID %d tpg b2 0x%x \n", ID, state->tpg_b2); + ia_css_print("Pixel Generator ID %d Enable 0x%x\n", ID, state->com_enable); + ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x\n", ID, state->prbs_rstval0); + ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x\n", ID, state->prbs_rstval1); + ia_css_print("Pixel Generator ID %d SYNC SID 0x%x\n", ID, state->syng_sid); + ia_css_print("Pixel Generator ID %d syng free run 0x%x\n", ID, state->syng_free_run); + ia_css_print("Pixel Generator ID %d syng pause 0x%x\n", ID, state->syng_pause); + ia_css_print("Pixel Generator ID %d syng no of frames 0x%x\n", ID, state->syng_nof_frames); + ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x\n", ID, state->syng_nof_pixels); + ia_css_print("Pixel Generator ID %d syng no of line 0x%x\n", ID, state->syng_nof_line); + ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x\n", ID, state->syng_hblank_cyc); + ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x\n", ID, state->syng_vblank_cyc); + ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x\n", ID, state->syng_stat_hcnt); + ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x\n", ID, state->syng_stat_vcnt); + ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x\n", ID, state->syng_stat_fcnt); + ia_css_print("Pixel Generator ID %d syng stat done 0x%x\n", ID, state->syng_stat_done); + ia_css_print("Pixel Generator ID %d tpg modee 0x%x\n", ID, state->tpg_mode); + ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, state->tpg_hcnt_mask); + ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, state->tpg_hcnt_mask); + ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x\n", ID, state->tpg_xycnt_mask); + ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x\n", ID, state->tpg_hcnt_delta); + ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x\n", ID, state->tpg_vcnt_delta); + ia_css_print("Pixel Generator ID %d tpg r1 0x%x\n", ID, state->tpg_r1); + ia_css_print("Pixel Generator ID %d tpg g1 0x%x\n", ID, state->tpg_g1); + ia_css_print("Pixel Generator ID %d tpg b1 0x%x\n", ID, state->tpg_b1); + ia_css_print("Pixel Generator ID %d tpg r2 0x%x\n", ID, state->tpg_r2); + ia_css_print("Pixel Generator ID %d tpg g2 0x%x\n", ID, state->tpg_g2); + ia_css_print("Pixel Generator ID %d tpg b2 0x%x\n", ID, state->tpg_b2); } + /* end of NCI */ /***************************************************** * @@ -141,11 +141,10 @@ STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load( const hrt_address reg) { assert(ID < N_PIXELGEN_ID); - assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg*sizeof(hrt_data)); + assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1); + return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data)); } - /** * @brief Store a value to the register. * Refer to "pixelgen_ctrl_public.h" for details. @@ -158,7 +157,8 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_reg_store( assert(ID < N_PIXELGEN_ID); assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); } + /* end of DLI */ #endif /* __PIXELGEN_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h index 5600b32e29f4e..3d394b623731d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h @@ -135,7 +135,6 @@ static const hrt_address GPIO_BASE[N_GPIO_ID] = { static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { 0x0000000000000100ULL}; - /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { 0x0000000000030000ULL, @@ -180,18 +179,21 @@ static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = { 0x00000000000C2400ULL, /* csi fe controller B */ 0x00000000000C4400ULL /* csi fe controller C */ }; + /* CSI BE, part of the Input System 2401 */ static const hrt_address CSI_RX_BE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = { 0x00000000000C0800ULL, /* csi be controller A */ 0x00000000000C2800ULL, /* csi be controller B */ 0x00000000000C4800ULL /* csi be controller C */ }; + /* PIXEL Generator, part of the Input System 2401 */ static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = { 0x00000000000C1000ULL, /* pixel gen controller A */ 0x00000000000C3000ULL, /* pixel gen controller B */ 0x00000000000C5000ULL /* pixel gen controller C */ }; + /* Stream2MMIO, part of the Input System 2401 */ static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = { 0x00000000000C0C00ULL, /* stream2mmio controller A */ @@ -295,7 +297,6 @@ static const hrt_address GPIO_BASE[N_GPIO_ID] = { static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { 0x00000100UL}; - /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { 0x00030000UL, @@ -340,18 +341,21 @@ static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = { 0x000C2400UL, /* csi fe controller B */ 0x000C4400UL /* csi fe controller C */ }; + /* CSI BE, part of the Input System 2401 */ static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = { 0x000C0800UL, /* csi be controller A */ 0x000C2800UL, /* csi be controller B */ 0x000C4800UL /* csi be controller C */ }; + /* PIXEL Generator, part of the Input System 2401 */ static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = { 0x000C1000UL, /* pixel gen controller A */ 0x000C3000UL, /* pixel gen controller B */ 0x000C5000UL /* pixel gen controller C */ }; + /* Stream2MMIO, part of the Input System 2401 */ static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = { 0x000C0C00UL, /* stream2mmio controller A */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h index b5be610c50596..bbc692363009d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h @@ -121,6 +121,4 @@ #define _PXG_INVALID_FLAG 0xDEADBEEF #define _PXG_CAFE_FLAG 0xCAFEBABE - #endif /* _PixelGen_SysBlock_defs_h */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h index e71e33d9d1434..c6d2a5cba2134 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h @@ -95,7 +95,7 @@ #define _hrt_get_bit(w, b) \ (((w) >> (b)) & 1) #define _hrt_set_bit(w, b, v) \ - (((w) & (~(1 << (b)))) | (((v)&1) << (b))) + (((w) & (~(1 << (b)))) | (((v) & 1) << (b))) #define _hrt_set_lower_half(w, v) \ _hrt_set_bits(w, 0, 16, v) #define _hrt_set_upper_half(w, v) \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h index b5756bfe8eb6b..0eabc59ff5afb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h @@ -22,9 +22,9 @@ #define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ #define SP_ICACHE_ADDRESS_BITS \ - (SP_ICACHE_TAG_BITS+SP_ICACHE_BLOCK_ADDRESS_BITS) + (SP_ICACHE_TAG_BITS + SP_ICACHE_BLOCK_ADDRESS_BITS) -#define SP_PMEM_DEPTH (1<_defs.h */ typedef enum hrt_isp_css_irq { - hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID , - hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID , - hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID , - hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID , - hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID , - hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID , - hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID , - hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID , - hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID , - hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID , - hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID , - hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID , - hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID , - hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID , - hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID , - hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID , - hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID , - hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID , - hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID , - hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID , - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID , - hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID , - hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID , - hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID , - hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID , - hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID , - hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID , - hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID , - hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID , - hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID , - hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID , - hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID , + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, /* this must (obviously) be the last on in the enum */ hrt_isp_css_irq_num_irqs } hrt_isp_css_irq_t; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h index 5a2ce9108ae49..be492eb9353da 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h @@ -28,12 +28,12 @@ and in the DMA parameter list */ #define HIVE_ISP_DDR_DMA_SPECS {{32, 8}, {16, 16}, {18, 14}, {25, 10}, {21, 12}} #define HIVE_ISP_DDR_WORD_BITS 256 -#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS/8) +#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS / 8) #define HIVE_ISP_DDR_BYTES (512 * 1024 * 1024) #define HIVE_ISP_DDR_BYTES_RTL (127 * 1024 * 1024) #define HIVE_ISP_DDR_SMALL_BYTES (128 * 256 / 8) #define HIVE_ISP_PAGE_SHIFT 12 -#define HIVE_ISP_PAGE_SIZE (1< -#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS)-1) -#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS)-1) +#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS) - 1) +#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS) - 1) #define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) #define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) - + #endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h index 58b0e6effbd06..9715893c8a360 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h @@ -12,28 +12,28 @@ * more details. */ -#ifndef _HRT_HIVE_TYPES_H -#define _HRT_HIVE_TYPES_H +#ifndef _HRT_HIVE_TYPES_H +#define _HRT_HIVE_TYPES_H #include "version.h" #include "defs.h" #ifndef HRTCAT3 -#define _HRTCAT3(m,n,o) m##n##o -#define HRTCAT3(m,n,o) _HRTCAT3(m,n,o) +#define _HRTCAT3(m, n, o) m##n##o +#define HRTCAT3(m, n, o) _HRTCAT3(m, n, o) #endif #ifndef HRTCAT4 -#define _HRTCAT4(m,n,o,p) m##n##o##p -#define HRTCAT4(m,n,o,p) _HRTCAT4(m,n,o,p) +#define _HRTCAT4(m, n, o, p) m##n##o##p +#define HRTCAT4(m, n, o, p) _HRTCAT4(m, n, o, p) #endif #ifndef HRTMIN -#define HRTMIN(a,b) (((a)<(b))?(a):(b)) +#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) #endif - + #ifndef HRTMAX -#define HRTMAX(a,b) (((a)>(b))?(a):(b)) +#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) #endif /* boolean data type */ @@ -59,8 +59,8 @@ typedef unsigned long long hive_uint64; #define HRT_ADDRESS_WIDTH 32 #endif -#define HRT_DATA_BYTES (HRT_DATA_WIDTH/8) -#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH/8) +#define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8) +#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8) #if HRT_DATA_WIDTH == 64 typedef hive_uint64 hrt_data; @@ -71,7 +71,7 @@ typedef hive_uint32 hrt_data; #endif #if HRT_ADDRESS_WIDTH == 64 -typedef hive_uint64 hrt_address; +typedef hive_uint64 hrt_address; #elif HRT_ADDRESS_WIDTH == 32 typedef hive_uint32 hrt_address; #else @@ -95,7 +95,7 @@ typedef hive_address hive_mem_address; typedef hive_uint hive_mmio_id; typedef hive_mmio_id hive_slave_id; typedef hive_mmio_id hive_port_id; -typedef hive_mmio_id hive_master_id; +typedef hive_mmio_id hive_master_id; typedef hive_mmio_id hive_mem_id; typedef hive_mmio_id hive_dev_id; typedef hive_mmio_id hive_fifo_id; @@ -122,7 +122,7 @@ typedef hive_uint hive_inport_id; typedef hive_uint hive_msink_id; /* HRT specific */ -typedef char* hive_program; -typedef char* hive_function; +typedef char *hive_program; +typedef char *hive_function; #endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h index f82bb79785cfc..0d1b65db83cde 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h @@ -53,60 +53,57 @@ #define _IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS _STREAM2MMIO_PACK_NUM_ITEMS_BITS #define _IBUF_CNTRL_ACK_TOKEN_LSB _IBUF_CNTRL_ACK_TOKEN_STORES_IDX #define _IBUF_CNTRL_ACK_TOKEN_MSB (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX - 1) - /* bit 31 indicates a valid ack: */ + /* bit 31 indicates a valid ack: */ #define _IBUF_CNTRL_ACK_TOKEN_VALID_BIT (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX) - /*shared registers:*/ #define _IBUF_CNTRL_RECALC_WORDS_STATUS 0 #define _IBUF_CNTRL_ARBITERS_STATUS 1 #define _IBUF_CNTRL_SET_CRUN 2 /* NO PHYSICAL REGISTER!! Only used in HSS model */ - /*register addresses for each proc: */ #define _IBUF_CNTRL_CMD 0 #define _IBUF_CNTRL_ACK 1 - /* number of items (packets or words) per frame: */ + /* number of items (packets or words) per frame: */ #define _IBUF_CNTRL_NUM_ITEMS_PER_STORE 2 - /* number of stores (packets or words) per store/buffer: */ + /* number of stores (packets or words) per store/buffer: */ #define _IBUF_CNTRL_NUM_STORES_PER_FRAME 3 - /* the channel and command in the DMA */ + /* the channel and command in the DMA */ #define _IBUF_CNTRL_DMA_CHANNEL 4 #define _IBUF_CNTRL_DMA_CMD 5 - /* the start address and stride of the buffers */ + /* the start address and stride of the buffers */ #define _IBUF_CNTRL_BUFFER_START_ADDRESS 6 #define _IBUF_CNTRL_BUFFER_STRIDE 7 #define _IBUF_CNTRL_BUFFER_END_ADDRESS 8 - /* destination start address, stride and end address; should be the same as in the DMA */ + /* destination start address, stride and end address; should be the same as in the DMA */ #define _IBUF_CNTRL_DEST_START_ADDRESS 9 #define _IBUF_CNTRL_DEST_STRIDE 10 #define _IBUF_CNTRL_DEST_END_ADDRESS 11 - /* send a frame sync or not, default 1 */ + /* send a frame sync or not, default 1 */ #define _IBUF_CNTRL_SYNC_FRAME 12 - /* str2mmio cmds */ + /* str2mmio cmds */ #define _IBUF_CNTRL_STR2MMIO_SYNC_CMD 13 #define _IBUF_CNTRL_STR2MMIO_STORE_CMD 14 - /* num elems p word*/ + /* num elems p word*/ #define _IBUF_CNTRL_SHIFT_ITEMS 15 #define _IBUF_CNTRL_ELEMS_P_WORD_IBUF 16 #define _IBUF_CNTRL_ELEMS_P_WORD_DEST 17 - /* STATUS */ - /* current frame and stores in buffer */ + /* current frame and stores in buffer */ #define _IBUF_CNTRL_CUR_STORES 18 #define _IBUF_CNTRL_CUR_ACKS 19 - /* current buffer and destination address for DMA cmd's */ + /* current buffer and destination address for DMA cmd's */ #define _IBUF_CNTRL_CUR_S2M_IBUF_ADDR 20 #define _IBUF_CNTRL_CUR_DMA_IBUF_ADDR 21 #define _IBUF_CNTRL_CUR_DMA_DEST_ADDR 22 @@ -118,7 +115,6 @@ #define _IBUF_CNTRL_DMA_SYNC_STATE 26 #define _IBUF_CNTRL_ISP_SYNC_STATE 27 - /*Commands: */ #define _IBUF_CNTRL_CMD_STORE_FRAME_IDX 0 #define _IBUF_CNTRL_CMD_ONLINE_IDX 1 @@ -127,10 +123,10 @@ #define _IBUF_CNTRL_CMD_INITIALIZE 0 /* store an online frame (sync with ISP, use end cfg start, stride and end address: */ -#define _IBUF_CNTRL_CMD_STORE_ONLINE_FRAME ((1<<_IBUF_CNTRL_CMD_STORE_FRAME_IDX) | (1<<_IBUF_CNTRL_CMD_ONLINE_IDX)) +#define _IBUF_CNTRL_CMD_STORE_ONLINE_FRAME ((1 << _IBUF_CNTRL_CMD_STORE_FRAME_IDX) | (1 << _IBUF_CNTRL_CMD_ONLINE_IDX)) /* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */ -#define _IBUF_CNTRL_CMD_STORE_OFFLINE_FRAME (1<<_IBUF_CNTRL_CMD_STORE_FRAME_IDX) +#define _IBUF_CNTRL_CMD_STORE_OFFLINE_FRAME BIT(_IBUF_CNTRL_CMD_STORE_FRAME_IDX) /* false command token, should be different then commands. Use online bit, not store frame: */ #define _IBUF_CNTRL_FALSE_ACK 2 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h index 7766f78cd1230..176456da961f7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h @@ -22,7 +22,7 @@ #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 #define HIVE_IFMT_GP_REGS_SRST_IDX 9 #define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h index 87fbf82edb5bc..1dd8ea3cd6d47 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h @@ -31,37 +31,36 @@ #define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 #define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 #define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 -#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 -#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 +#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 -#define HIVE_ISEL_GP_REGS_SOF_IDX 8 -#define HIVE_ISEL_GP_REGS_EOF_IDX 9 -#define HIVE_ISEL_GP_REGS_SOL_IDX 10 -#define HIVE_ISEL_GP_REGS_EOL_IDX 11 +#define HIVE_ISEL_GP_REGS_SOF_IDX 8 +#define HIVE_ISEL_GP_REGS_EOF_IDX 9 +#define HIVE_ISEL_GP_REGS_SOL_IDX 10 +#define HIVE_ISEL_GP_REGS_EOL_IDX 11 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 -#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 +#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 -#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 -#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 -#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 +#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 +#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 +#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 #define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 #define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 #define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 #define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 #define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 - #define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 #define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 #define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h index 20a13c4cdb562..2d5baae305220 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h @@ -15,8 +15,8 @@ #ifndef _input_switch_2400_defs_h #define _input_switch_2400_defs_h -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id)*2) + ((fmt_type)>=16)) -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type)%16) * 2) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id) * 2) + ((fmt_type) >= 16)) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type) % 16) * 2) #define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 #define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h index a7f0ca80bc9be..fcfa8c4971bef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h @@ -50,7 +50,6 @@ #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 - /* register reset value */ #define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 @@ -59,38 +58,38 @@ #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 #define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 #define ISYS_CTRL_INIT_REG_RSTVAL 0 -#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 /* register width value */ -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ISYS_CTRL_INIT_REG_WIDTH 3 +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ISYS_CTRL_INIT_REG_WIDTH 3 #define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ #define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 @@ -111,99 +110,89 @@ /* InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 [7:4] - CaptPortId, - CaptA-'b0000 - CaptB-'b0001 - CaptC-'b0010 + CaptA-'b0000 + CaptB-'b0001 + CaptC-'b0010 [31:16] - NOF_frames InpSysCaptFrameExt 2/0 [3:0] - 'b0001' [7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC 2/1 [31:0] - external capture address -InpSysAcqFrame 2/0 [3:0] - 'b0010, +InpSysAcqFrame 2/0 [3:0] - 'b0010, [31:4] - NOF_ext_mem_words 2/1 [31:0] - external memory read start address -InpSysOverruleON 1/0 [3:0] - 'b0011, +InpSysOverruleON 1/0 [3:0] - 'b0011, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA - -InpSysOverruleOFF 1/0 [3:0] - 'b0100, +InpSysOverruleOFF 1/0 [3:0] - 'b0100, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA -InpSysOverruleCmd 2/0 [3:0] - 'b0101, +InpSysOverruleCmd 2/0 [3:0] - 'b0101, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA 2/1 [31:0] - command token value for port opid - acknowledge tokens: InpSysAckCFA 1/0 [3:0] - 'b0000 [7:4] - CaptPortId, - CaptA-'b0000 - CaptB- 'b0001 - CaptC-'b0010 + CaptA-'b0000 + CaptB- 'b0001 + CaptC-'b0010 [31:16] - NOF_frames InpSysAckCFE 1/0 [3:0] - 'b0001' [7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC InpSysAckAF 1/0 [3:0] - 'b0010 -InpSysAckOverruleON 1/0 [3:0] - 'b0011, +InpSysAckOverruleON 1/0 [3:0] - 'b0011, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA -InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, +InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA - -InpSysAckOverrule 2/0 [3:0] - 'b0101, +InpSysAckOverrule 2/0 [3:0] - 'b0101, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA 2/1 [31:0] - acknowledge token value from port opid - - */ - /* Command and acknowledge tokens IDs */ #define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ #define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ @@ -232,10 +221,10 @@ InpSysAckOverrule 2/0 [3:0] - 'b0101, #define ISYS_CTRL_TOKEN_ID_IDX 0 #define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) #define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) -#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB +1) -#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB +#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB + 1) +#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB #define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) -#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB +#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB #define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) #define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ @@ -248,7 +237,7 @@ InpSysAckOverrule 2/0 [3:0] - 'b0101, #define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ #define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ -#define ISYS_CTRL_NO_DMA_ACK 0 +#define ISYS_CTRL_NO_DMA_ACK 0 #define ISYS_CTRL_NO_CAPT_ACK 16 -#endif /* _input_system_ctrl_defs_h */ +#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h index ec6dd4487158e..efb3d7e135bdd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h @@ -25,4 +25,4 @@ #define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 -#endif /* _irq_controller_defs_h */ +#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h index 033e23bcf672a..7e79e3c611ee4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h @@ -111,8 +111,8 @@ #define ISP_SRU_GUARDING 1 #define ISP_VLSU_GUARDING 1 -#define ISP_VRF_RAM 1 -#define ISP_SRF_RAM 1 +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 #define ISP_SPLIT_VMUL_VADD_IS 0 #define ISP_RFSPLIT_FPGA 0 @@ -175,10 +175,10 @@ #define ISP_NWAY ISP_VEC_NELEMS #define NBITS ISP_VEC_ELEMBITS -#define _isp_ceil_div(a,b) (((a)+(b)-1)/(b)) +#define _isp_ceil_div(a, b) (((a) + (b) - 1) / (b)) #ifdef C_RUN -#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64)*8) +#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64) * 8) #else #define ISP_VEC_ALIGN ISP_VMEM_ALIGN #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h index 5936207216271..5bdc16c71e82c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h @@ -16,7 +16,7 @@ #define _isp_acquisition_defs_h #define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 +#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 /* --------------------------------------------------*/ @@ -32,13 +32,13 @@ /* REGISTER INFO */ /* --------------------------------------------------*/ -#define NOF_ACQ_REGS 12 +#define NOF_ACQ_REGS 12 // Register id's of MMIO slave accesible registers -#define ACQ_START_ADDR_REG_ID 0 +#define ACQ_START_ADDR_REG_ID 0 #define ACQ_MEM_REGION_SIZE_REG_ID 1 #define ACQ_NUM_MEM_REGIONS_REG_ID 2 -#define ACQ_INIT_REG_ID 3 +#define ACQ_INIT_REG_ID 3 #define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 #define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 #define ACQ_LAST_COMMAND_REG_ID 6 @@ -47,34 +47,34 @@ #define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 #define ACQ_FSM_STATE_INFO_REG_ID 10 #define ACQ_INT_CNTR_INFO_REG_ID 11 - + // Register width -#define ACQ_START_ADDR_REG_WIDTH 9 -#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ACQ_INIT_REG_WIDTH 3 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 -#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 -#define ACQ_LAST_COMMAND_REG_WIDTH 32 -#define ACQ_NEXT_COMMAND_REG_WIDTH 32 -#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS *3)) +#define ACQ_START_ADDR_REG_WIDTH 9 +#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ACQ_INIT_REG_WIDTH 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define ACQ_LAST_COMMAND_REG_WIDTH 32 +#define ACQ_NEXT_COMMAND_REG_WIDTH 32 +#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS * 3)) #define ACQ_INT_CNTR_INFO_REG_WIDTH 32 /* register reset value */ -#define ACQ_START_ADDR_REG_RSTVAL 0 +#define ACQ_START_ADDR_REG_RSTVAL 0 #define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 #define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define ACQ_INIT_REG_RSTVAL 0 +#define ACQ_INIT_REG_RSTVAL 0 #define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 #define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 #define ACQ_LAST_COMMAND_REG_RSTVAL 0 #define ACQ_NEXT_COMMAND_REG_RSTVAL 0 #define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 -#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 #define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 -#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 +#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 /* bit definitions */ #define ACQ_INIT_RST_REG_BIT 0 @@ -88,7 +88,7 @@ /* TOKEN INFO */ /* --------------------------------------------------*/ #define ACQ_TOKEN_ID_LSB 0 -#define ACQ_TOKEN_ID_MSB 3 +#define ACQ_TOKEN_ID_MSB 3 #define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 #define ACQ_TOKEN_ID_IDX 0 #define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH @@ -97,9 +97,9 @@ #define ACQ_CMD_START_ADDR_IDX 4 #define ACQ_CMD_START_ADDR_BITS 9 #define ACQ_CMD_NOFWORDS_IDX 13 -#define ACQ_CMD_NOFWORDS_BITS 9 +#define ACQ_CMD_NOFWORDS_BITS 9 #define ACQ_MEM_REGION_ID_IDX 22 -#define ACQ_MEM_REGION_ID_BITS 9 +#define ACQ_MEM_REGION_ID_BITS 9 #define ACQ_PACKET_LENGTH_TOKEN_MSB 21 #define ACQ_PACKET_LENGTH_TOKEN_LSB 13 #define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 @@ -109,11 +109,10 @@ #define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ #define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ - /* Command tokens IDs */ #define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b #define ACQ_READ_REGION_TOKEN_ID 1 //0001b -#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b +#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b #define ACQ_INIT_TOKEN_ID 8 //1000b /* Acknowledge token IDs */ @@ -128,18 +127,17 @@ #define ACQ_TOKEN_NOFWORDS_MSB 21 #define ACQ_TOKEN_NOFWORDS_LSB 13 #define ACQ_TOKEN_STARTADDR_MSB 12 -#define ACQ_TOKEN_STARTADDR_LSB 4 - +#define ACQ_TOKEN_STARTADDR_LSB 4 /* --------------------------------------------------*/ /* MIPI */ /* --------------------------------------------------*/ #define WORD_COUNT_WIDTH 16 -#define PKT_CODE_WIDTH 6 -#define CHN_NO_WIDTH 2 +#define PKT_CODE_WIDTH 6 +#define CHN_NO_WIDTH 2 #define ERROR_INFO_WIDTH 8 - + #define LONG_PKTCODE_MAX 63 #define LONG_PKTCODE_MIN 16 #define SHORT_PKTCODE_MAX 15 @@ -156,7 +154,6 @@ #define ACQ_LINE_PAYLOAD 4 #define ACQ_GEN_SH_PKT 5 - /* bit definition */ #define ACQ_PKT_TYPE_IDX 16 #define ACQ_PKT_TYPE_BITS 6 @@ -174,51 +171,49 @@ #define ACQ_ACK_PKT_LEN_IDX 4 #define ACQ_ACK_PKT_LEN_BITS 16 - /* --------------------------------------------------*/ /* Packet Data Type */ /* --------------------------------------------------*/ - #define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ #define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ #define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ #define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ #define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ #define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ -#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ -#define ACQ_SOL_DATA 2 /* 00 0010 line start */ -#define ACQ_EOL_DATA 3 /* 00 0011 line end */ -#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ +#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ +#define ACQ_SOL_DATA 2 /* 00 0010 line start */ +#define ACQ_EOL_DATA 3 /* 00 0011 line end */ +#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ #define ACQ_RESERVED_DATA_TYPE_MIN 56 #define ACQ_RESERVED_DATA_TYPE_MAX 63 #define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 @@ -231,4 +226,4 @@ /* --------------------------------------------------*/ -#endif /* _isp_acquisition_defs_h */ +#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h index aa413df022f2e..6c36d3b6f6810 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h @@ -16,14 +16,14 @@ #define _isp_capture_defs_h #define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ -#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM/8 ) -#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ -#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM +#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ +#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM / 8) +#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ +#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM //#define CAPT_RCV_ACK 1 -//#define CAPT_WRT_ACK 2 -//#define CAPT_IRQ_ACK 3 +//#define CAPT_WRT_ACK 2 +//#define CAPT_IRQ_ACK 3 /* --------------------------------------------------*/ @@ -38,25 +38,25 @@ // Register id's of MMIO slave accesible registers #define CAPT_START_MODE_REG_ID 0 -#define CAPT_START_ADDR_REG_ID 1 -#define CAPT_MEM_REGION_SIZE_REG_ID 2 -#define CAPT_NUM_MEM_REGIONS_REG_ID 3 -#define CAPT_INIT_REG_ID 4 +#define CAPT_START_ADDR_REG_ID 1 +#define CAPT_MEM_REGION_SIZE_REG_ID 2 +#define CAPT_NUM_MEM_REGIONS_REG_ID 3 +#define CAPT_INIT_REG_ID 4 #define CAPT_START_REG_ID 5 -#define CAPT_STOP_REG_ID 6 +#define CAPT_STOP_REG_ID 6 #define CAPT_PACKET_LENGTH_REG_ID 7 -#define CAPT_RECEIVED_LENGTH_REG_ID 8 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 -#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 -#define CAPT_LAST_COMMAND_REG_ID 11 +#define CAPT_RECEIVED_LENGTH_REG_ID 8 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 +#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 +#define CAPT_LAST_COMMAND_REG_ID 11 #define CAPT_NEXT_COMMAND_REG_ID 12 #define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 #define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 #define CAPT_FSM_STATE_INFO_REG_ID 15 // Register width -#define CAPT_START_MODE_REG_WIDTH 1 +#define CAPT_START_MODE_REG_WIDTH 1 //#define CAPT_START_ADDR_REG_WIDTH 9 //#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 //#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 @@ -71,25 +71,24 @@ #define CAPT_WRITE2MEM_FSM_STATE_BITS 2 #define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 - #define CAPT_PACKET_LENGTH_REG_WIDTH 17 -#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 #define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 #define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 #define CAPT_LAST_COMMAND_REG_WIDTH 32 -/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ +/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ #define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) -//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 -//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 +//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 +//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 /* register reset value */ -#define CAPT_START_MODE_REG_RSTVAL 0 +#define CAPT_START_MODE_REG_RSTVAL 0 #define CAPT_START_ADDR_REG_RSTVAL 0 #define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 -#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 #define CAPT_INIT_REG_RSTVAL 0 #define CAPT_START_REG_RSTVAL 0 @@ -115,7 +114,6 @@ #define CAPT_INIT_RESTART_MEM_REGION_LSB 15 #define CAPT_INIT_RESTART_MEM_REGION_MSB 25 - #define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT #define CAPT_INIT_RST_REG_BITS 1 #define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT @@ -123,29 +121,27 @@ #define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT #define CAPT_INIT_RESYNC_BITS 1 #define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT -#define CAPT_INIT_RESTART_BITS 1 +#define CAPT_INIT_RESTART_BITS 1 #define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB #define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) #define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB #define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) - - /* --------------------------------------------------*/ /* TOKEN INFO */ /* --------------------------------------------------*/ #define CAPT_TOKEN_ID_LSB 0 -#define CAPT_TOKEN_ID_MSB 3 +#define CAPT_TOKEN_ID_MSB 3 #define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ /* Command tokens IDs */ #define CAPT_START_TOKEN_ID 0 /* 0000b */ #define CAPT_STOP_TOKEN_ID 1 /* 0001b */ -#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ +#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ #define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ #define CAPT_INIT_TOKEN_ID 8 /* 1000b */ -#define CAPT_START_TOKEN_BIT 0 +#define CAPT_START_TOKEN_BIT 0 #define CAPT_STOP_TOKEN_BIT 0 #define CAPT_FREEZE_TOKEN_BIT 0 #define CAPT_RESUME_TOKEN_BIT 0 @@ -169,8 +165,8 @@ #define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 #define CAPT_PACKET_CH_ID_TOKEN_MSB 27 #define CAPT_PACKET_CH_ID_TOKEN_LSB 26 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 /* bit definition */ #define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB @@ -208,21 +204,19 @@ #define CAPT_INIT_TOKEN_INIT_IDX 4 #define CAPT_INIT_TOKEN_INIT_BITS 22 - /* --------------------------------------------------*/ /* MIPI */ /* --------------------------------------------------*/ -#define CAPT_WORD_COUNT_WIDTH 16 -#define CAPT_PKT_CODE_WIDTH 6 -#define CAPT_CHN_NO_WIDTH 2 -#define CAPT_ERROR_INFO_WIDTH 8 +#define CAPT_WORD_COUNT_WIDTH 16 +#define CAPT_PKT_CODE_WIDTH 6 +#define CAPT_CHN_NO_WIDTH 2 +#define CAPT_ERROR_INFO_WIDTH 8 #define LONG_PKTCODE_MAX 63 #define LONG_PKTCODE_MIN 16 #define SHORT_PKTCODE_MAX 15 - /* --------------------------------------------------*/ /* Packet Info */ /* --------------------------------------------------*/ @@ -233,7 +227,6 @@ #define CAPT_LINE_PAYLOAD 4 #define CAPT_GEN_SH_PKT 5 - /* --------------------------------------------------*/ /* Packet Data Type */ /* --------------------------------------------------*/ @@ -244,39 +237,39 @@ #define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ #define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ #define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ -#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ -#define CAPT_SOL_DATA 2 /* 00 0010 line start */ -#define CAPT_EOL_DATA 3 /* 00 0011 line end */ -#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ +#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ +#define CAPT_SOL_DATA 2 /* 00 0010 line start */ +#define CAPT_EOL_DATA 3 /* 00 0011 line end */ +#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ #define CAPT_RESERVED_DATA_TYPE_MIN 56 #define CAPT_RESERVED_DATA_TYPE_MAX 63 #define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 @@ -287,7 +280,6 @@ #define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 #define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 - /* --------------------------------------------------*/ /* Capture Unit State */ /* --------------------------------------------------*/ @@ -299,12 +291,6 @@ #define CAPT_FREEZE 5 #define CAPT_RUN 6 - /* --------------------------------------------------*/ -#endif /* _isp_capture_defs_h */ - - - - - +#endif /* _isp_capture_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h index 67f68f1a65d79..84fe95c164041 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h @@ -21,7 +21,7 @@ #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH 2 #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH 3 #define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH (_HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_WIDTH 32 /* use 32 to be compatibel with streaming monitor !, MSB's of interface are tied to '0' */ +#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_WIDTH 32 /* use 32 to be compatibel with streaming monitor !, MSB's of interface are tied to '0' */ /* Definition of data format ID at the interface CSS_receiver capture/acquisition units */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit */ @@ -64,10 +64,10 @@ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ #define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ /* used reserved mipi positions for these */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_3 38 +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 +#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_3 38 //_HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 63 #define _HRT_MIPI_BACKEND_FMT_TYPE_CUSTOM 63 @@ -81,7 +81,7 @@ #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB444 2 // 32 #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB565 3 // 34 #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB666 4 // 35 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW10 6 // 43 #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW6 7 // 40 #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW7 8 // 41 @@ -107,24 +107,24 @@ #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18 28 // ? #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_2 29 // ? Option 2 for depacketiser #define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_3 30 // ? Option 3 for depacketiser -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding +#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding /* definition for state machine of data FIFO for decode different type of data */ -#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 +#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 #define _HRT_CSS_RECEIVER_2400_YUV420_10_REPEAT_PTN 5 #define _HRT_CSS_RECEIVER_2400_YUV420_8L_REPEAT_PTN 1 #define _HRT_CSS_RECEIVER_2400_YUV422_8_REPEAT_PTN 1 #define _HRT_CSS_RECEIVER_2400_YUV422_10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 +#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 #define _HRT_CSS_RECEIVER_2400_RGB555_REPEAT_PTN 2 #define _HRT_CSS_RECEIVER_2400_RGB565_REPEAT_PTN 2 -#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 +#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 #define _HRT_CSS_RECEIVER_2400_RGB888_REPEAT_PTN 3 #define _HRT_CSS_RECEIVER_2400_RAW6_REPEAT_PTN 3 #define _HRT_CSS_RECEIVER_2400_RAW7_REPEAT_PTN 7 #define _HRT_CSS_RECEIVER_2400_RAW8_REPEAT_PTN 1 #define _HRT_CSS_RECEIVER_2400_RAW10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 +#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 #define _HRT_CSS_RECEIVER_2400_RAW14_REPEAT_PTN 7 #define _HRT_CSS_RECEIVER_2400_MAX_REPEAT_PTN _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN @@ -149,7 +149,6 @@ #define _HRT_CSS_RECEIVER_2400_BE_COMP_12_7_12 5 #define _HRT_CSS_RECEIVER_2400_BE_COMP_12_8_12 6 - /* packet bit definition */ #define _HRT_CSS_RECEIVER_2400_PKT_SOP_IDX 32 #define _HRT_CSS_RECEIVER_2400_PKT_SOP_BITS 1 @@ -162,49 +161,45 @@ #define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_IDX 0 #define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_BITS 32 - /*************************************************************************************************/ /* Custom Decoding */ /* These Custom Defs are defined based on design-time config in "mipi_backend_pixel_formatter.chdl" !! */ /*************************************************************************************************/ /* -#define BE_CUST_EN_IDX 0 // 2bits -#define BE_CUST_EN_DATAID_IDX 2 // 6bits MIPI DATA ID -#define BE_CUST_EN_WIDTH 8 -#define BE_CUST_MODE_ALL 1 // Enable Custom Decoding for all DATA IDs -#define BE_CUST_MODE_ONE 3 // Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID +#define BE_CUST_EN_IDX 0 // 2bits +#define BE_CUST_EN_DATAID_IDX 2 // 6bits MIPI DATA ID +#define BE_CUST_EN_WIDTH 8 +#define BE_CUST_MODE_ALL 1 // Enable Custom Decoding for all DATA IDs +#define BE_CUST_MODE_ONE 3 // Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID // Data State config = {get_bits(6bits), valid(1bit)} // #define BE_CUST_DATA_STATE_S0_IDX 0 // 7bits -#define BE_CUST_DATA_STATE_S1_IDX 8 //7 // 7bits +#define BE_CUST_DATA_STATE_S1_IDX 8 //7 // 7bits #define BE_CUST_DATA_STATE_S2_IDX 16//14 // 7bits / -#define BE_CUST_DATA_STATE_WIDTH 24//21 -#define BE_CUST_DATA_STATE_VALID_IDX 0 // 1bits -#define BE_CUST_DATA_STATE_GETBITS_IDX 1 // 6bits - - - +#define BE_CUST_DATA_STATE_WIDTH 24//21 +#define BE_CUST_DATA_STATE_VALID_IDX 0 // 1bits +#define BE_CUST_DATA_STATE_GETBITS_IDX 1 // 6bits -// Pixel Extractor config -#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 // 6bits -#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 6//5 // 5bits +// Pixel Extractor config +#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 // 6bits +#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 6//5 // 5bits #define BE_CUST_PIX_EXT_PIX_MASK_IDX 11//10 // 18bits #define BE_CUST_PIX_EXT_PIX_EN_IDX 29 //28 // 1bits -#define BE_CUST_PIX_EXT_WIDTH 30//29 +#define BE_CUST_PIX_EXT_WIDTH 30//29 -// Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} -#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 // 4bits -#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 // 4bits -#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 // 4bits -#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 // 4bits -#define BE_CUST_PIX_VALID_EOP_WIDTH 16 +// Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} +#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 // 4bits +#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 // 4bits +#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 // 4bits +#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 // 4bits +#define BE_CUST_PIX_VALID_EOP_WIDTH 16 #define BE_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 // Normal (NO less get_bits case) Valid - 1bits -#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 // Normal (NO less get_bits case) EoP - 1bits -#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 // Especial (less get_bits case) Valid - 1bits +#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 // Normal (NO less get_bits case) EoP - 1bits +#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 // Especial (less get_bits case) Valid - 1bits #define BE_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 // Especial (less get_bits case) EoP - 1bits */ #endif /* _mipi_backend_common_defs_h_ */ -#endif /* _css_receiver_2400_common_defs_h_ */ +#endif /* _css_receiver_2400_common_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h index db5a1d2caba0b..45f20b5243683 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h @@ -17,13 +17,13 @@ #include "mipi_backend_common_defs.h" -#define MIPI_BACKEND_REG_ALIGN 4 // assuming 32 bit control bus width +#define MIPI_BACKEND_REG_ALIGN 4 // assuming 32 bit control bus width -#define _HRT_MIPI_BACKEND_NOF_IRQS 3 // sid_lut +#define _HRT_MIPI_BACKEND_NOF_IRQS 3 // sid_lut // SH Backend Register IDs -#define _HRT_MIPI_BACKEND_ENABLE_REG_IDX 0 -#define _HRT_MIPI_BACKEND_STATUS_REG_IDX 1 +#define _HRT_MIPI_BACKEND_ENABLE_REG_IDX 0 +#define _HRT_MIPI_BACKEND_STATUS_REG_IDX 1 //#define _HRT_MIPI_BACKEND_HIGH_PREC_REG_IDX 2 #define _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX 2 #define _HRT_MIPI_BACKEND_COMP_FORMAT_REG1_IDX 3 @@ -35,7 +35,7 @@ #define _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX 9 #define _HRT_MIPI_BACKEND_IRQ_CLEAR_REG_IDX 10 //// -#define _HRT_MIPI_BACKEND_CUST_EN_REG_IDX 11 +#define _HRT_MIPI_BACKEND_CUST_EN_REG_IDX 11 #define _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX 12 #define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX 13 #define _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P1_REG_IDX 14 @@ -54,40 +54,38 @@ #define _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX 26 #define _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX 27 //#define _HRT_MIPI_BACKEND_SP_LUT_ENABLE_REG_IDX 28 -#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX 28 -#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_1_REG_IDX 29 -#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_2_REG_IDX 30 -#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_3_REG_IDX 31 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX 28 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_1_REG_IDX 29 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_2_REG_IDX 30 +#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_3_REG_IDX 31 #define _HRT_MIPI_BACKEND_NOF_REGISTERS 32 // excluding the LP LUT entries #define _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX 32 - ///////////////////////////////////////////////////////////////////////////////////////////////////// -#define _HRT_MIPI_BACKEND_ENABLE_REG_WIDTH 1 -#define _HRT_MIPI_BACKEND_STATUS_REG_WIDTH 1 +#define _HRT_MIPI_BACKEND_ENABLE_REG_WIDTH 1 +#define _HRT_MIPI_BACKEND_STATUS_REG_WIDTH 1 //#define _HRT_MIPI_BACKEND_HIGH_PREC_REG_WIDTH 1 #define _HRT_MIPI_BACKEND_COMP_FORMAT_REG_WIDTH 32 -#define _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_WIDTH 7 +#define _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_WIDTH 7 #define _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_WIDTH 9 #define _HRT_MIPI_BACKEND_FORCE_RAW8_REG_WIDTH 8 #define _HRT_MIPI_BACKEND_IRQ_STATUS_REG_WIDTH _HRT_MIPI_BACKEND_NOF_IRQS -#define _HRT_MIPI_BACKEND_IRQ_CLEAR_REG_WIDTH 0 +#define _HRT_MIPI_BACKEND_IRQ_CLEAR_REG_WIDTH 0 #define _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_WIDTH 1 -#define _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_WIDTH 1+2+6 +#define _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_WIDTH 1 + 2 + 6 //#define _HRT_MIPI_BACKEND_SP_LUT_ENABLE_REG_WIDTH 1 -//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_WIDTH 7 -//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_1_REG_WIDTH 7 -//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_2_REG_WIDTH 7 -//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_3_REG_WIDTH 7 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_WIDTH 7 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_1_REG_WIDTH 7 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_2_REG_WIDTH 7 +//#define _HRT_MIPI_BACKEND_SP_LUT_ENTRY_3_REG_WIDTH 7 ///////////////////////////////////////////////////////////////////////////////////////////////////// #define _HRT_MIPI_BACKEND_NOF_SP_LUT_ENTRIES 4 //#define _HRT_MIPI_BACKEND_MAX_NOF_LP_LUT_ENTRIES 16 // to satisfy hss model static array declaration - #define _HRT_MIPI_BACKEND_CHANNEL_ID_WIDTH 2 #define _HRT_MIPI_BACKEND_FORMAT_TYPE_WIDTH 6 @@ -108,17 +106,17 @@ /* These Custom Defs are defined based on design-time config in "mipi_backend_pixel_formatter.chdl" !! */ /*************************************************************************************************/ #define _HRT_MIPI_BACKEND_CUST_EN_IDX 0 /* 2bits */ -#define _HRT_MIPI_BACKEND_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ +#define _HRT_MIPI_BACKEND_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ #define _HRT_MIPI_BACKEND_CUST_EN_HIGH_PREC_IDX 8 // 1 bit -#define _HRT_MIPI_BACKEND_CUST_EN_WIDTH 9 +#define _HRT_MIPI_BACKEND_CUST_EN_WIDTH 9 #define _HRT_MIPI_BACKEND_CUST_MODE_ALL 1 /* Enable Custom Decoding for all DATA IDs */ #define _HRT_MIPI_BACKEND_CUST_MODE_ONE 3 /* Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID */ -#define _HRT_MIPI_BACKEND_CUST_EN_OPTION_IDX 1 +#define _HRT_MIPI_BACKEND_CUST_EN_OPTION_IDX 1 /* Data State config = {get_bits(6bits), valid(1bit)} */ -#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ -#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S1_IDX 8 /* 7bits */ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ +#define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S1_IDX 8 /* 7bits */ #define _HRT_MIPI_BACKEND_CUST_DATA_STATE_S2_IDX 16 /* was 14 7bits */ #define _HRT_MIPI_BACKEND_CUST_DATA_STATE_WIDTH 24 /* was 21*/ #define _HRT_MIPI_BACKEND_CUST_DATA_STATE_VALID_IDX 0 /* 1bits */ @@ -137,7 +135,7 @@ #define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_P1_IDX 4 /* 4bits */ #define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_P2_IDX 8 /* 4bits */ #define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_P3_IDX 12 /* 4bits */ -#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_WIDTH 16 +#define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_WIDTH 16 #define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 /* Normal (NO less get_bits case) Valid - 1bits */ #define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 /* Normal (NO less get_bits case) EoP - 1bits */ #define _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 /* Especial (less get_bits case) Valid - 1bits */ @@ -161,11 +159,11 @@ #define HRT_MIPI_BACKEND_STREAM_EOF_BIT 2 #define HRT_MIPI_BACKEND_STREAM_SOF_BIT 3 #define HRT_MIPI_BACKEND_STREAM_CHID_LS_BIT 4 -#define HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT(sid_width) (HRT_MIPI_BACKEND_STREAM_CHID_LS_BIT+(sid_width)-1) -#define HRT_MIPI_BACKEND_STREAM_PIX_VAL_BIT(sid_width,p) (HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT(sid_width)+1+p) +#define HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT(sid_width) (HRT_MIPI_BACKEND_STREAM_CHID_LS_BIT + (sid_width) - 1) +#define HRT_MIPI_BACKEND_STREAM_PIX_VAL_BIT(sid_width, p) (HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT(sid_width) + 1 + p) -#define HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width,ppc,pix_width,p) (HRT_MIPI_BACKEND_STREAM_PIX_VAL_BIT(sid_width,ppc)+ ((pix_width)*p)) -#define HRT_MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_width,ppc,pix_width,p) (HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width,ppc,pix_width,p) + (pix_width) - 1) +#define HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width, ppc, pix_width, p) (HRT_MIPI_BACKEND_STREAM_PIX_VAL_BIT(sid_width, ppc) + ((pix_width) * p)) +#define HRT_MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_width, ppc, pix_width, p) (HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width, ppc, pix_width, p) + (pix_width) - 1) #if 0 //#define HRT_MIPI_BACKEND_STREAM_PIX_BITS 14 @@ -173,26 +171,24 @@ //#define HRT_MIPI_BACKEND_STREAM_PPC 4 #endif -#define HRT_MIPI_BACKEND_STREAM_BITS(sid_width,ppc,pix_width) (HRT_MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_width,ppc,pix_width,(ppc-1))+1) - +#define HRT_MIPI_BACKEND_STREAM_BITS(sid_width, ppc, pix_width) (HRT_MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_width, ppc, pix_width, (ppc - 1)) + 1) /* SP and LP LUT BIT POSITIONS */ -#define HRT_MIPI_BACKEND_LUT_PKT_DISREGARD_BIT 0 // 0 -#define HRT_MIPI_BACKEND_LUT_SID_LS_BIT HRT_MIPI_BACKEND_LUT_PKT_DISREGARD_BIT + 1 // 1 -#define HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) (HRT_MIPI_BACKEND_LUT_SID_LS_BIT+(sid_width)-1) // 1 + (4) - 1 = 4 +#define HRT_MIPI_BACKEND_LUT_PKT_DISREGARD_BIT 0 // 0 +#define HRT_MIPI_BACKEND_LUT_SID_LS_BIT HRT_MIPI_BACKEND_LUT_PKT_DISREGARD_BIT + 1 // 1 +#define HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) (HRT_MIPI_BACKEND_LUT_SID_LS_BIT + (sid_width) - 1) // 1 + (4) - 1 = 4 #define HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_LS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) + 1 // 5 #define HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_MS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_LS_BIT(sid_width) + _HRT_MIPI_BACKEND_CHANNEL_ID_WIDTH - 1 // 6 #define HRT_MIPI_BACKEND_LUT_MIPI_FMT_LS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_MS_BIT(sid_width) + 1 // 7 -#define HRT_MIPI_BACKEND_LUT_MIPI_FMT_MS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_FMT_LS_BIT(sid_width) + _HRT_MIPI_BACKEND_FORMAT_TYPE_WIDTH - 1 // 12 +#define HRT_MIPI_BACKEND_LUT_MIPI_FMT_MS_BIT(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_FMT_LS_BIT(sid_width) + _HRT_MIPI_BACKEND_FORMAT_TYPE_WIDTH - 1 // 12 /* #define HRT_MIPI_BACKEND_SP_LUT_BITS(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_CH_ID_MS_BIT(sid_width) + 1 // 7 */ -#define HRT_MIPI_BACKEND_SP_LUT_BITS(sid_width) HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) + 1 +#define HRT_MIPI_BACKEND_SP_LUT_BITS(sid_width) HRT_MIPI_BACKEND_LUT_SID_MS_BIT(sid_width) + 1 #define HRT_MIPI_BACKEND_LP_LUT_BITS(sid_width) HRT_MIPI_BACKEND_LUT_MIPI_FMT_MS_BIT(sid_width) + 1 // 13 - // temp solution -//#define HRT_MIPI_BACKEND_STREAM_PIXA_VAL_BIT HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT + 1 // 8 +//#define HRT_MIPI_BACKEND_STREAM_PIXA_VAL_BIT HRT_MIPI_BACKEND_STREAM_CHID_MS_BIT + 1 // 8 //#define HRT_MIPI_BACKEND_STREAM_PIXB_VAL_BIT HRT_MIPI_BACKEND_STREAM_PIXA_VAL_BIT + 1 // 9 //#define HRT_MIPI_BACKEND_STREAM_PIXC_VAL_BIT HRT_MIPI_BACKEND_STREAM_PIXB_VAL_BIT + 1 // 10 //#define HRT_MIPI_BACKEND_STREAM_PIXD_VAL_BIT HRT_MIPI_BACKEND_STREAM_PIXC_VAL_BIT + 1 // 11 @@ -204,12 +200,9 @@ //#define HRT_MIPI_BACKEND_STREAM_PIXC_MS_BIT HRT_MIPI_BACKEND_STREAM_PIXC_LS_BIT + HRT_MIPI_BACKEND_STREAM_PIX_BITS - 1 // 53 //#define HRT_MIPI_BACKEND_STREAM_PIXD_LS_BIT HRT_MIPI_BACKEND_STREAM_PIXC_MS_BIT + 1 // 54 //#define HRT_MIPI_BACKEND_STREAM_PIXD_MS_BIT HRT_MIPI_BACKEND_STREAM_PIXD_LS_BIT + HRT_MIPI_BACKEND_STREAM_PIX_BITS - 1 // 67 - -// vc hidden in pixb data (passed as raw12 the pipe) -#define HRT_MIPI_BACKEND_STREAM_VC_LS_BIT(sid_width,ppc,pix_width) HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width,ppc,pix_width,1) + 10 //HRT_MIPI_BACKEND_STREAM_PIXB_LS_BIT + 10 // 36 -#define HRT_MIPI_BACKEND_STREAM_VC_MS_BIT(sid_width,ppc,pix_width) HRT_MIPI_BACKEND_STREAM_VC_LS_BIT(sid_width,ppc,pix_width) + 1 // 37 - - +// vc hidden in pixb data (passed as raw12 the pipe) +#define HRT_MIPI_BACKEND_STREAM_VC_LS_BIT(sid_width, ppc, pix_width) HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid_width, ppc, pix_width, 1) + 10 //HRT_MIPI_BACKEND_STREAM_PIXB_LS_BIT + 10 // 36 +#define HRT_MIPI_BACKEND_STREAM_VC_MS_BIT(sid_width, ppc, pix_width) HRT_MIPI_BACKEND_STREAM_VC_LS_BIT(sid_width, ppc, pix_width) + 1 // 37 #endif /* _mipi_backend_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h index 0aad86e2e9145..a8d0dbd7f6d72 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h @@ -17,8 +17,6 @@ //#include "rx_csi_common_defs.h" - - #define MIPI_PKT_DATA_WIDTH 32 //#define CLK_CROSSING_FIFO_DEPTH 16 #define _CSI_RX_REG_ALIGN 4 @@ -30,36 +28,34 @@ // REGISTER DESCRIPTION //#define _HRT_CSI_RX_SOFTRESET_REG_IDX 0 #define _HRT_CSI_RX_ENABLE_REG_IDX 0 -#define _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX 1 +#define _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX 1 #define _HRT_CSI_RX_ERROR_HANDLING_REG_IDX 2 -#define _HRT_CSI_RX_STATUS_REG_IDX 3 -#define _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX 4 -#define _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX 5 -//#define _HRT_CSI_RX_IRQ_CONFIG_REG_IDX 6 +#define _HRT_CSI_RX_STATUS_REG_IDX 3 +#define _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX 4 +#define _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX 5 +//#define _HRT_CSI_RX_IRQ_CONFIG_REG_IDX 6 #define _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX 6 #define _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX 7 -#define _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane_idx) (8+(2*lane_idx)) -#define _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane_idx) (8+(2*lane_idx)+1) - -#define _HRT_CSI_RX_NOF_REGISTERS(nof_dlanes) (8+2*(nof_dlanes)) +#define _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane_idx) (8 + (2 * lane_idx)) +#define _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane_idx) (8 + (2 * lane_idx) + 1) +#define _HRT_CSI_RX_NOF_REGISTERS(nof_dlanes) (8 + 2 * (nof_dlanes)) //#define _HRT_CSI_RX_SOFTRESET_REG_WIDTH 1 #define _HRT_CSI_RX_ENABLE_REG_WIDTH 1 #define _HRT_CSI_RX_NOF_ENABLED_LANES_REG_WIDTH 3 -#define _HRT_CSI_RX_ERROR_HANDLING_REG_WIDTH 4 -#define _HRT_CSI_RX_STATUS_REG_WIDTH 1 -#define _HRT_CSI_RX_STATUS_DLANE_HS_REG_WIDTH 8 +#define _HRT_CSI_RX_ERROR_HANDLING_REG_WIDTH 4 +#define _HRT_CSI_RX_STATUS_REG_WIDTH 1 +#define _HRT_CSI_RX_STATUS_DLANE_HS_REG_WIDTH 8 #define _HRT_CSI_RX_STATUS_DLANE_LP_REG_WIDTH 24 #define _HRT_CSI_RX_IRQ_CONFIG_REG_WIDTH (CSI_RX_NOF_IRQS_ISP_DOMAIN) #define _HRT_CSI_RX_DLY_CNT_REG_WIDTH 24 -//#define _HRT_CSI_RX_IRQ_STATUS_REG_WIDTH NOF_IRQS +//#define _HRT_CSI_RX_IRQ_STATUS_REG_WIDTH NOF_IRQS //#define _HRT_CSI_RX_IRQ_CLEAR_REG_WIDTH 0 - #define ONE_LANE_ENABLED 0 #define TWO_LANES_ENABLED 1 -#define THREE_LANES_ENABLED 2 +#define THREE_LANES_ENABLED 2 #define FOUR_LANES_ENABLED 3 // Error handling reg bit positions @@ -71,7 +67,7 @@ #define _HRT_CSI_RX_IRQ_CONFIG_REG_VAL_POSEDGE 0 #define _HRT_CSI_RX_IRQ_CONFIG_REG_VAL_ORIGINAL 1 -// Interrupt bits +// Interrupt bits #define _HRT_RX_CSI_IRQ_SINGLE_PH_ERROR_CORRECTED 0 #define _HRT_RX_CSI_IRQ_MULTIPLE_PH_ERROR_DETECTED 1 #define _HRT_RX_CSI_IRQ_PAYLOAD_CHECKSUM_ERROR 2 @@ -110,7 +106,6 @@ #define _HRT_RX_CSI_IRQ_ERR_LINE_SYNC_BIT 16 */ - ////Bit Description for reg _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX #define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_ERR_LANE0 0 #define _HRT_CSI_RX_STATUS_DLANE_HS_SOT_ERR_LANE1 1 @@ -171,5 +166,4 @@ #define _HRT_RX_CSI_DATA_FORMAT_ID_SOL 2 /* 00 0010 line start */ #define _HRT_RX_CSI_DATA_FORMAT_ID_EOL 3 /* 00 0011 line end */ - -#endif /* _csi_rx_defs_h */ +#endif /* _csi_rx_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h index 46b52fe5ae995..988b3ebc953da 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h @@ -25,7 +25,7 @@ #define _STREAM2MMIO_START_ADDR_REG_ID 3 /* master port address,NOT Byte */ #define _STREAM2MMIO_END_ADDR_REG_ID 4 /* master port address,NOT Byte */ #define _STREAM2MMIO_STRIDE_REG_ID 5 /* stride in master port words, increment is per packet for long sids, stride is not used for short sid's*/ -#define _STREAM2MMIO_NUM_ITEMS_REG_ID 6 /* number of packets for store packets cmd, number of words for store_words cmd */ +#define _STREAM2MMIO_NUM_ITEMS_REG_ID 6 /* number of packets for store packets cmd, number of words for store_words cmd */ #define _STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID 7 /* if this register is 1, input will be stalled if there is no pending command for this sid */ #define _STREAM2MMIO_REGS_PER_SID 8 @@ -36,7 +36,7 @@ #define _STREAM2MMIO_CMD_TOKEN_CMD_LSB 0 /* bits 1-0 is for the command field */ #define _STREAM2MMIO_CMD_TOKEN_CMD_MSB 1 -#define _STREAM2MMIO_CMD_TOKEN_WIDTH (_STREAM2MMIO_CMD_TOKEN_CMD_MSB+1-_STREAM2MMIO_CMD_TOKEN_CMD_LSB) +#define _STREAM2MMIO_CMD_TOKEN_WIDTH (_STREAM2MMIO_CMD_TOKEN_CMD_MSB + 1 - _STREAM2MMIO_CMD_TOKEN_CMD_LSB) #define _STREAM2MMIO_CMD_TOKEN_STORE_WORDS 0 /* command for storing a number of output words indicated by reg _STREAM2MMIO_NUM_ITEMS */ #define _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS 1 /* command for storing a number of packets indicated by reg _STREAM2MMIO_NUM_ITEMS */ @@ -48,24 +48,21 @@ /* count - indicates number of words stored */ #define _STREAM2MMIO_PACK_NUM_ITEMS_BITS 16 #define _STREAM2MMIO_PACK_ACK_EOP_BIT _STREAM2MMIO_PACK_NUM_ITEMS_BITS -#define _STREAM2MMIO_PACK_ACK_EOF_BIT (_STREAM2MMIO_PACK_ACK_EOP_BIT+1) +#define _STREAM2MMIO_PACK_ACK_EOF_BIT (_STREAM2MMIO_PACK_ACK_EOP_BIT + 1) /* acknowledge token definition */ #define _STREAM2MMIO_ACK_TOKEN_NUM_ITEMS_LSB 0 /* bits 3-0 is for the command field */ -#define _STREAM2MMIO_ACK_TOKEN_NUM_ITEMS_MSB (_STREAM2MMIO_PACK_NUM_ITEMS_BITS-1) +#define _STREAM2MMIO_ACK_TOKEN_NUM_ITEMS_MSB (_STREAM2MMIO_PACK_NUM_ITEMS_BITS - 1) #define _STREAM2MMIO_ACK_TOKEN_EOP_BIT _STREAM2MMIO_PACK_ACK_EOP_BIT #define _STREAM2MMIO_ACK_TOKEN_EOF_BIT _STREAM2MMIO_PACK_ACK_EOF_BIT -#define _STREAM2MMIO_ACK_TOKEN_VALID_BIT (_STREAM2MMIO_ACK_TOKEN_EOF_BIT+1) /* this bit indicates a valid ack */ - /* if there is no valid ack, a read */ - /* on the ack register returns 0 */ -#define _STREAM2MMIO_ACK_TOKEN_WIDTH (_STREAM2MMIO_ACK_TOKEN_VALID_BIT+1) +#define _STREAM2MMIO_ACK_TOKEN_VALID_BIT (_STREAM2MMIO_ACK_TOKEN_EOF_BIT + 1) /* this bit indicates a valid ack */ + /* if there is no valid ack, a read */ + /* on the ack register returns 0 */ +#define _STREAM2MMIO_ACK_TOKEN_WIDTH (_STREAM2MMIO_ACK_TOKEN_VALID_BIT + 1) /* commands for packer module */ #define _STREAM2MMIO_PACK_CMD_STORE_WORDS 0 #define _STREAM2MMIO_PACK_CMD_STORE_LONG_PACKET 1 #define _STREAM2MMIO_PACK_CMD_STORE_SHORT_PACKET 2 - - - #endif /* _STREAM2MMIO_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h index d2b8972b0d9ec..75451e090f4ff 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h @@ -19,4 +19,4 @@ #define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 -#endif /* _timed_controller_defs_h */ +#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h index 19b19ef484f95..d3df4e1649c97 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h @@ -40,58 +40,58 @@ #define hrt_host_type_of_ulong unsigned long #define hrt_host_type_of_ptr void* -#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type)/8) +#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) #ifdef C_RUN #ifdef C_RUN_DYNAMIC_LINK_PROGRAMS -extern void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); -#define _hrt_cell_get_crun_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) -#define _hrt_cell_get_crun_indexed_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) +void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); +#define _hrt_cell_get_crun_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) +#define _hrt_cell_get_crun_indexed_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) #else -#define _hrt_cell_get_crun_symbol(cell,sym) (&sym) -#define _hrt_cell_get_crun_indexed_symbol(cell,sym) (sym) +#define _hrt_cell_get_crun_symbol(cell, sym) (&sym) +#define _hrt_cell_get_crun_indexed_symbol(cell, sym) (sym) #endif // C_RUN_DYNAMIC_LINK_PROGRAMS #define hrt_scalar_store(cell, type, var, data) \ - ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var)) = (data)) + ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var)) = (data)) #define hrt_scalar_load(cell, type, var) \ - ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var))) + ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var))) #define hrt_indexed_store(cell, type, array, index, data) \ - ((((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) = (data)) + ((((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) = (data)) #define hrt_indexed_load(cell, type, array, index) \ - (((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) + (((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) #else /* C_RUN */ #define hrt_scalar_store(cell, type, var, data) \ - HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ cell, \ - HRTCAT(HIVE_MEM_,var), \ - HRTCAT(HIVE_ADDR_,var), \ + HRTCAT(HIVE_MEM_, var), \ + HRTCAT(HIVE_ADDR_, var), \ (HRT_INT_TYPE(type))(data)) #define hrt_scalar_load(cell, type, var) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ cell, \ - HRTCAT(HIVE_MEM_,var), \ - HRTCAT(HIVE_ADDR_,var))) + HRTCAT(HIVE_MEM_, var), \ + HRTCAT(HIVE_ADDR_, var))) #define hrt_indexed_store(cell, type, array, index, data) \ - HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ cell, \ - HRTCAT(HIVE_MEM_,array), \ - (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)), \ + HRTCAT(HIVE_MEM_, array), \ + (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)), \ (HRT_INT_TYPE(type))(data)) #define hrt_indexed_load(cell, type, array, index) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ - cell, \ - HRTCAT(HIVE_MEM_,array), \ - (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)))) + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ + cell, \ + HRTCAT(HIVE_MEM_, array), \ + (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) #endif /* C_RUN */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h index edb23252c48ea..dc8d091c67690 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h @@ -28,53 +28,52 @@ */ #define _IBUF_CNTRL_MAIN_CNTRL_FSM_MASK 0xf #define _IBUF_CNTRL_MAIN_CNTRL_FSM_NEXT_COMMAND_CHECK 0x9 -#define _IBUF_CNTRL_MAIN_CNTRL_MEM_INP_BUF_ALLOC (1 << 8) +#define _IBUF_CNTRL_MAIN_CNTRL_MEM_INP_BUF_ALLOC BIT(8) #define _IBUF_CNTRL_DMA_SYNC_WAIT_FOR_SYNC 1 #define _IBUF_CNTRL_DMA_SYNC_FSM_WAIT_FOR_ACK (0x3 << 1) typedef struct ib_buffer_s ib_buffer_t; struct ib_buffer_s { - uint32_t start_addr; /* start address of the buffer in the + u32 start_addr; /* start address of the buffer in the * "input-buffer hardware block" */ - uint32_t stride; /* stride per buffer line (in bytes) */ - uint32_t lines; /* lines in the buffer */ + u32 stride; /* stride per buffer line (in bytes) */ + u32 lines; /* lines in the buffer */ }; typedef struct ibuf_ctrl_cfg_s ibuf_ctrl_cfg_t; struct ibuf_ctrl_cfg_s { - bool online; struct { /* DMA configuration */ - uint32_t channel; - uint32_t cmd; /* must be _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND */ + u32 channel; + u32 cmd; /* must be _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND */ /* DMA reconfiguration */ - uint32_t shift_returned_items; - uint32_t elems_per_word_in_ibuf; - uint32_t elems_per_word_in_dest; + u32 shift_returned_items; + u32 elems_per_word_in_ibuf; + u32 elems_per_word_in_dest; } dma_cfg; ib_buffer_t ib_buffer; struct { - uint32_t stride; - uint32_t start_addr; - uint32_t lines; + u32 stride; + u32 start_addr; + u32 lines; } dest_buf_cfg; - uint32_t items_per_store; - uint32_t stores_per_frame; + u32 items_per_store; + u32 stores_per_frame; struct { - uint32_t sync_cmd; /* must be _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME */ - uint32_t store_cmd; /* must be _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS */ + u32 sync_cmd; /* must be _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME */ + u32 store_cmd; /* must be _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS */ } stream2mmio_cfg; }; -extern const uint32_t N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID]; +extern const u32 N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID]; #endif /* __IBUF_CTRL_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h index 25e3f04f374ba..7a68f03c6c5c0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h @@ -36,7 +36,6 @@ */ #include "pixelgen.h" - #define INPUT_SYSTEM_N_STREAM_ID 6 /* maximum number of simultaneous virtual channels supported*/ @@ -132,15 +131,15 @@ struct input_system_cfg_s { bool online; bool raw_packed; - int8_t linked_isys_stream_id; + s8 linked_isys_stream_id; struct { bool comp_enable; - int32_t active_lanes; - int32_t fmt_type; - int32_t ch_id; - int32_t comp_predictor; - int32_t comp_scheme; + s32 active_lanes; + s32 fmt_type; + s32 ch_id; + s32 comp_predictor; + s32 comp_scheme; } csi_port_attr; pixelgen_tpg_cfg_t tpg_port_attr; @@ -148,52 +147,52 @@ struct input_system_cfg_s { pixelgen_prbs_cfg_t prbs_port_attr; struct { - int32_t align_req_in_bytes; - int32_t bits_per_pixel; - int32_t pixels_per_line; - int32_t lines_per_frame; + s32 align_req_in_bytes; + s32 bits_per_pixel; + s32 pixels_per_line; + s32 lines_per_frame; } input_port_resolution; struct { - int32_t left_padding; - int32_t max_isp_input_width; + s32 left_padding; + s32 max_isp_input_width; } output_port_attr; struct { bool enable; - int32_t fmt_type; - int32_t align_req_in_bytes; - int32_t bits_per_pixel; - int32_t pixels_per_line; - int32_t lines_per_frame; + s32 fmt_type; + s32 align_req_in_bytes; + s32 bits_per_pixel; + s32 pixels_per_line; + s32 lines_per_frame; } metadata; }; typedef struct virtual_input_system_stream_s virtual_input_system_stream_t; struct virtual_input_system_stream_s { - uint32_t id; /*Used when multiple MIPI data types and/or virtual channels are used. + u32 id; /*Used when multiple MIPI data types and/or virtual channels are used. Must be unique within one CSI RX and lower than SH_CSS_MAX_ISYS_CHANNEL_NODES */ - uint8_t enable_metadata; + u8 enable_metadata; input_system_input_port_t input_port; input_system_channel_t channel; input_system_channel_t md_channel; /* metadata channel */ - uint8_t online; - int8_t linked_isys_stream_id; - uint8_t valid; + u8 online; + s8 linked_isys_stream_id; + u8 valid; #ifdef ISP2401 input_system_polling_mode_t polling_mode; - int32_t subscr_index; + s32 subscr_index; #endif }; typedef struct virtual_input_system_stream_cfg_s virtual_input_system_stream_cfg_t; struct virtual_input_system_stream_cfg_s { - uint8_t enable_metadata; + u8 enable_metadata; input_system_input_port_cfg_t input_port_cfg; input_system_channel_cfg_t channel_cfg; input_system_channel_cfg_t md_channel_cfg; - uint8_t valid; + u8 valid; }; #define ISP_INPUT_BUF_START_ADDR 0 @@ -202,5 +201,4 @@ struct virtual_input_system_stream_cfg_s { #define LINES_OF_ISP_INPUT_BUF (NUM_OF_INPUT_BUF * NUM_OF_LINES_PER_BUF) #define ISP_INPUT_BUF_STRIDE SH_CSS_MAX_SENSOR_WIDTH - #endif /* __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h index e0be59ccb821d..cc057d8b93cf9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h @@ -41,10 +41,10 @@ ********************************************************/ typedef struct isys2401_dma_port_cfg_s isys2401_dma_port_cfg_t; struct isys2401_dma_port_cfg_s { - uint32_t stride; - uint32_t elements; - uint32_t cropping; - uint32_t width; + u32 stride; + u32 elements; + u32 cropping; + u32 width; }; /* end of DMA Port */ @@ -77,8 +77,9 @@ struct isys2401_dma_cfg_s { isys2401_dma_channel channel; isys2401_dma_connection connection; isys2401_dma_extension extension; - uint32_t height; + u32 height; }; + /* end of DMA Device */ /* isys2401_dma_channel limits per DMA ID */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h index 649f44fd24086..bcb46b293b6a5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h @@ -19,8 +19,8 @@ typedef struct stream2mmio_cfg_s stream2mmio_cfg_t; struct stream2mmio_cfg_s { - uint32_t bits_per_pixel; - uint32_t enable_blocking; + u32 bits_per_pixel; + u32 enable_blocking; }; /* Stream2MMIO limits per ID*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h index 0bf2feb8bbfb4..cde599c5d0d2d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h @@ -25,12 +25,12 @@ */ typedef struct sync_generator_cfg_s sync_generator_cfg_t; struct sync_generator_cfg_s { - uint32_t hblank_cycles; - uint32_t vblank_cycles; - uint32_t pixels_per_clock; - uint32_t nr_of_frames; - uint32_t pixels_per_line; - uint32_t lines_per_frame; + u32 hblank_cycles; + u32 vblank_cycles; + u32 pixels_per_clock; + u32 nr_of_frames; + u32 pixels_per_line; + u32 lines_per_frame; }; typedef enum { @@ -50,25 +50,25 @@ struct pixelgen_tpg_cfg_s { struct { /* be used by CHBO and MON */ - uint32_t R1; - uint32_t G1; - uint32_t B1; + u32 R1; + u32 G1; + u32 B1; /* be used by CHBO only */ - uint32_t R2; - uint32_t G2; - uint32_t B2; + u32 R2; + u32 G2; + u32 B2; } color_cfg; struct { - uint32_t h_mask; /* horizontal mask */ - uint32_t v_mask; /* vertical mask */ - uint32_t hv_mask; /* horizontal+vertical mask? */ + u32 h_mask; /* horizontal mask */ + u32 v_mask; /* vertical mask */ + u32 hv_mask; /* horizontal+vertical mask? */ } mask_cfg; struct { - int32_t h_delta; /* horizontal delta? */ - int32_t v_delta; /* vertical delta? */ + s32 h_delta; /* horizontal delta? */ + s32 v_delta; /* vertical delta? */ } delta_cfg; sync_generator_cfg_t sync_gen_cfg; @@ -80,12 +80,11 @@ struct pixelgen_tpg_cfg_s { */ typedef struct pixelgen_prbs_cfg_s pixelgen_prbs_cfg_t; struct pixelgen_prbs_cfg_s { - int32_t seed0; - int32_t seed1; + s32 seed0; + s32 seed1; sync_generator_cfg_t sync_gen_cfg; }; /* end of Pixel-generator: TPG. ("pixelgen_global.h") */ #endif /* __PIXELGEN_GLOBAL_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c index d733a3503a209..895d4f171caf3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c @@ -15,7 +15,6 @@ #ifndef _sp_map_h_ #define _sp_map_h_ - #ifndef _hrt_dummy_use_blob_sp #define _hrt_dummy_use_blob_sp() #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h index 8d65927289330..9c948cc175be5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h @@ -101,7 +101,6 @@ #define DMA_DDR_TO_VAMEM_WORKAROUND #define DMA_DDR_TO_HMEM_WORKAROUND - /* * Semi global. "HRT" is accessible from SP, but * the HRT types do not fully apply @@ -111,8 +110,8 @@ /*#define HRT_ADDRESS_WIDTH 64 */ #define HRT_DATA_WIDTH 32 -#define SIZEOF_HRT_REG (HRT_DATA_WIDTH>>3) -#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH/8) +#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3) +#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH / 8) /* The main bus connecting all devices */ #define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH @@ -123,7 +122,7 @@ /* per-frame parameter handling support */ #define SH_CSS_ENABLE_PER_FRAME_PARAMS -typedef uint32_t hrt_bus_align_t; +typedef u32 hrt_bus_align_t; /* * Enumerate the devices, device access through the API is by ID, @@ -380,7 +379,7 @@ typedef enum { CSI_RX_FRONTEND0_ID = 0, /* map to ISYS2401_CSI_RX_A */ CSI_RX_FRONTEND1_ID, /* map to ISYS2401_CSI_RX_B */ CSI_RX_FRONTEND2_ID, /* map to ISYS2401_CSI_RX_C */ -#define N_CSI_RX_FRONTEND_ID (CSI_RX_FRONTEND2_ID+1) +#define N_CSI_RX_FRONTEND_ID (CSI_RX_FRONTEND2_ID + 1) } csi_rx_frontend_ID_t; typedef enum { @@ -450,6 +449,7 @@ enum ia_css_isp_memories { IA_CSS_DDR, N_IA_CSS_MEMORIES }; + #define IA_CSS_NUM_MEMORIES 9 /* For driver compatibility */ #define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c index 325b821f276cf..de99359a0fbcb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c @@ -30,8 +30,9 @@ ia_css_configure_iterator( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; @@ -54,8 +55,9 @@ ia_css_configure_copy_output( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; @@ -78,8 +80,9 @@ ia_css_configure_crop( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.crop.size; offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; @@ -102,8 +105,9 @@ ia_css_configure_fpn( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; @@ -126,8 +130,9 @@ ia_css_configure_dvs( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; @@ -150,8 +155,9 @@ ia_css_configure_qplane( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; @@ -174,8 +180,9 @@ ia_css_configure_output0( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output0.size; offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; @@ -198,8 +205,9 @@ ia_css_configure_output1( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output1.size; offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; @@ -222,8 +230,9 @@ ia_css_configure_output( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.output.size; offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; @@ -247,8 +256,9 @@ ia_css_configure_sc( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.sc.size; offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; @@ -272,8 +282,9 @@ ia_css_configure_raw( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.raw.size; offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; @@ -296,8 +307,9 @@ ia_css_configure_tnr( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; @@ -320,8 +332,9 @@ ia_css_configure_ref( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.ref.size; offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; @@ -344,8 +357,9 @@ ia_css_configure_vf( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); { - unsigned offset = 0; - unsigned size = 0; + unsigned int offset = 0; + unsigned int size = 0; + if (binary->info->mem_offsets.offsets.config) { size = binary->info->mem_offsets.offsets.config->dmem.vf.size; offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; @@ -357,4 +371,3 @@ ia_css_configure_vf( } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c index 11e4463ebb506..3afe861b709ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c @@ -67,12 +67,12 @@ static void ia_css_process_aa( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; if (size) { struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) @@ -85,16 +85,16 @@ ia_css_process_aa( static void ia_css_process_anr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); @@ -108,7 +108,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); } - } } @@ -116,16 +115,16 @@ size); static void ia_css_process_anr2( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); @@ -139,7 +138,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); } - } } @@ -147,16 +145,16 @@ size); static void ia_css_process_bh( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); @@ -170,10 +168,9 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); @@ -183,7 +180,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } - } } @@ -191,16 +187,16 @@ size); static void ia_css_process_cnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); @@ -214,7 +210,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); } - } } @@ -222,16 +217,16 @@ size); static void ia_css_process_crop( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); @@ -245,7 +240,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); } - } } @@ -253,16 +247,16 @@ size); static void ia_css_process_csc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); @@ -276,7 +270,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); } - } } @@ -284,16 +277,16 @@ size); static void ia_css_process_dp( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); @@ -307,7 +300,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); } - } } @@ -315,16 +307,16 @@ size); static void ia_css_process_bnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); @@ -338,7 +330,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); } - } } @@ -346,16 +337,16 @@ size); static void ia_css_process_de( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); @@ -369,7 +360,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); } - } } @@ -377,16 +367,16 @@ size); static void ia_css_process_ecd( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); @@ -400,7 +390,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); } - } } @@ -408,16 +397,16 @@ size); static void ia_css_process_formats( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); @@ -431,7 +420,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); } - } } @@ -439,16 +427,16 @@ size); static void ia_css_process_fpn( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); @@ -462,7 +450,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); } - } } @@ -470,16 +457,16 @@ size); static void ia_css_process_gc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); @@ -493,12 +480,11 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); @@ -512,7 +498,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } - } } @@ -520,16 +505,16 @@ size); static void ia_css_process_ce( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); @@ -543,7 +528,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); } - } } @@ -551,16 +535,16 @@ size); static void ia_css_process_yuv2rgb( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); @@ -574,7 +558,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); } - } } @@ -582,16 +565,16 @@ size); static void ia_css_process_rgb2yuv( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); @@ -605,7 +588,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); } - } } @@ -613,16 +595,16 @@ size); static void ia_css_process_r_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); @@ -636,7 +618,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); } - } } @@ -644,16 +625,16 @@ size); static void ia_css_process_g_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); @@ -667,7 +648,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); } - } } @@ -675,16 +655,16 @@ size); static void ia_css_process_b_gamma( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); @@ -698,7 +678,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); } - } } @@ -706,19 +685,20 @@ size); static void ia_css_process_uds( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; if (size) { struct sh_css_sp_uds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); p = (struct sh_css_sp_uds_params *) @@ -731,7 +711,6 @@ ia_css_process_uds( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); } - } } @@ -739,16 +718,16 @@ ia_css_process_uds( static void ia_css_process_raa( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); @@ -762,7 +741,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); } - } } @@ -770,16 +748,16 @@ size); static void ia_css_process_s3a( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); @@ -793,7 +771,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); } - } } @@ -801,16 +778,16 @@ size); static void ia_css_process_ob( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); @@ -824,12 +801,11 @@ ia_css_process_ob( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); @@ -843,7 +819,6 @@ ia_css_process_ob( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } - } } @@ -851,16 +826,16 @@ ia_css_process_ob( static void ia_css_process_output( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); @@ -874,7 +849,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); } - } } @@ -882,16 +856,16 @@ size); static void ia_css_process_sc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); @@ -905,7 +879,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); } - } } @@ -913,19 +886,20 @@ size); static void ia_css_process_bds( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; if (size) { struct sh_css_isp_bds_params *p; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); p = (struct sh_css_isp_bds_params *) @@ -937,7 +911,6 @@ ia_css_process_bds( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); } - } } @@ -945,16 +918,16 @@ ia_css_process_bds( static void ia_css_process_tnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); @@ -968,7 +941,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); } - } } @@ -976,16 +948,16 @@ size); static void ia_css_process_macc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); @@ -999,7 +971,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); } - } } @@ -1007,16 +978,16 @@ size); static void ia_css_process_sdis_horicoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); @@ -1030,7 +1001,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); } - } } @@ -1038,16 +1008,16 @@ size); static void ia_css_process_sdis_vertcoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); @@ -1061,7 +1031,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); } - } } @@ -1069,16 +1038,16 @@ size); static void ia_css_process_sdis_horiproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); @@ -1092,7 +1061,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); } - } } @@ -1100,16 +1068,16 @@ size); static void ia_css_process_sdis_vertproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); @@ -1123,7 +1091,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); } - } } @@ -1131,16 +1098,16 @@ size); static void ia_css_process_sdis2_horicoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); @@ -1154,7 +1121,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); } - } } @@ -1162,16 +1128,16 @@ size); static void ia_css_process_sdis2_vertcoef( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); @@ -1185,7 +1151,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); } - } } @@ -1193,16 +1158,16 @@ size); static void ia_css_process_sdis2_horiproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); @@ -1216,7 +1181,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); } - } } @@ -1224,16 +1188,16 @@ size); static void ia_css_process_sdis2_vertproj( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); @@ -1247,7 +1211,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); } - } } @@ -1255,16 +1218,16 @@ size); static void ia_css_process_wb( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); @@ -1278,7 +1241,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); } - } } @@ -1286,16 +1248,16 @@ size); static void ia_css_process_nr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); @@ -1309,7 +1271,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); } - } } @@ -1317,16 +1278,16 @@ size); static void ia_css_process_yee( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); @@ -1340,7 +1301,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); } - } } @@ -1348,16 +1308,16 @@ size); static void ia_css_process_ynr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); @@ -1371,7 +1331,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); } - } } @@ -1379,16 +1338,16 @@ size); static void ia_css_process_fc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); @@ -1402,7 +1361,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); } - } } @@ -1410,16 +1368,16 @@ size); static void ia_css_process_ctc( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); @@ -1433,12 +1391,11 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); } - } { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); @@ -1452,7 +1409,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); } - } } @@ -1460,16 +1416,16 @@ size); static void ia_css_process_xnr_table( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); @@ -1483,7 +1439,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); } - } } @@ -1491,16 +1446,16 @@ size); static void ia_css_process_xnr( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); @@ -1514,7 +1469,6 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); } - } } @@ -1522,16 +1476,16 @@ size); static void ia_css_process_xnr3( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); @@ -1545,13 +1499,12 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); } - } #ifdef ISP2401 { - unsigned size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); @@ -1565,15 +1518,14 @@ size); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); } - } #endif } /* Code generated by genparam/gencode.c:gen_param_process_table() */ -void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned pipe_id, +void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) = { ia_css_process_aa, @@ -1629,12 +1581,12 @@ void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( static void ia_css_get_dp_config(const struct ia_css_isp_parameters *params, struct ia_css_dp_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: config=%p\n", + config); *config = params->dp_config; @@ -1648,10 +1600,10 @@ void ia_css_set_dp_config(struct ia_css_isp_parameters *params, const struct ia_css_dp_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dp_config = *config; @@ -1660,8 +1612,7 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DP_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1669,12 +1620,12 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, static void ia_css_get_wb_config(const struct ia_css_isp_parameters *params, struct ia_css_wb_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: config=%p\n", + config); *config = params->wb_config; @@ -1688,10 +1639,10 @@ void ia_css_set_wb_config(struct ia_css_isp_parameters *params, const struct ia_css_wb_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->wb_config = *config; @@ -1700,8 +1651,7 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_WB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1709,12 +1659,12 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, static void ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, struct ia_css_tnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: config=%p\n", + config); *config = params->tnr_config; @@ -1728,10 +1678,10 @@ void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, const struct ia_css_tnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->tnr_config = *config; @@ -1740,8 +1690,7 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_TNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1749,12 +1698,12 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_ob_config(const struct ia_css_isp_parameters *params, struct ia_css_ob_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: config=%p\n", + config); *config = params->ob_config; @@ -1768,10 +1717,10 @@ void ia_css_set_ob_config(struct ia_css_isp_parameters *params, const struct ia_css_ob_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ob_config = *config; @@ -1780,8 +1729,7 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1789,12 +1737,12 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, static void ia_css_get_de_config(const struct ia_css_isp_parameters *params, struct ia_css_de_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: config=%p\n", + config); *config = params->de_config; @@ -1808,10 +1756,10 @@ void ia_css_set_de_config(struct ia_css_isp_parameters *params, const struct ia_css_de_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->de_config = *config; @@ -1820,8 +1768,7 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1829,12 +1776,12 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, static void ia_css_get_anr_config(const struct ia_css_isp_parameters *params, struct ia_css_anr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: config=%p\n", + config); *config = params->anr_config; @@ -1848,10 +1795,10 @@ void ia_css_set_anr_config(struct ia_css_isp_parameters *params, const struct ia_css_anr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_config = *config; @@ -1860,8 +1807,7 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1869,12 +1815,12 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, static void ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, struct ia_css_anr_thres *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: config=%p\n", + config); *config = params->anr_thres; @@ -1888,10 +1834,10 @@ void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, const struct ia_css_anr_thres *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_thres = *config; @@ -1900,8 +1846,7 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR2_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1909,12 +1854,12 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, static void ia_css_get_ce_config(const struct ia_css_isp_parameters *params, struct ia_css_ce_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: config=%p\n", + config); *config = params->ce_config; @@ -1928,10 +1873,10 @@ void ia_css_set_ce_config(struct ia_css_isp_parameters *params, const struct ia_css_ce_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ce_config = *config; @@ -1940,8 +1885,7 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1949,12 +1893,12 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, static void ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, struct ia_css_ecd_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: config=%p\n", + config); *config = params->ecd_config; @@ -1968,10 +1912,10 @@ void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, const struct ia_css_ecd_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ecd_config = *config; @@ -1980,8 +1924,7 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ECD_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -1989,12 +1932,12 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, static void ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, struct ia_css_ynr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: config=%p\n", + config); *config = params->ynr_config; @@ -2008,10 +1951,10 @@ void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, const struct ia_css_ynr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ynr_config = *config; @@ -2020,8 +1963,7 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2029,12 +1971,12 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, static void ia_css_get_fc_config(const struct ia_css_isp_parameters *params, struct ia_css_fc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: config=%p\n", + config); *config = params->fc_config; @@ -2048,10 +1990,10 @@ void ia_css_set_fc_config(struct ia_css_isp_parameters *params, const struct ia_css_fc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->fc_config = *config; @@ -2060,8 +2002,7 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2069,12 +2010,12 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, static void ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, struct ia_css_cnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: config=%p\n", + config); *config = params->cnr_config; @@ -2088,10 +2029,10 @@ void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, const struct ia_css_cnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cnr_config = *config; @@ -2100,8 +2041,7 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2109,12 +2049,12 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_macc_config(const struct ia_css_isp_parameters *params, struct ia_css_macc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: config=%p\n", + config); *config = params->macc_config; @@ -2128,10 +2068,10 @@ void ia_css_set_macc_config(struct ia_css_isp_parameters *params, const struct ia_css_macc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->macc_config = *config; @@ -2140,8 +2080,7 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_MACC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2149,12 +2088,12 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, static void ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, struct ia_css_ctc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: config=%p\n", + config); *config = params->ctc_config; @@ -2168,10 +2107,10 @@ void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, const struct ia_css_ctc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ctc_config = *config; @@ -2180,8 +2119,7 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CTC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2189,12 +2127,12 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, static void ia_css_get_aa_config(const struct ia_css_isp_parameters *params, struct ia_css_aa_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: config=%p\n", + config); *config = params->aa_config; @@ -2207,10 +2145,10 @@ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, const struct ia_css_aa_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); params->aa_config = *config; params->config_changed[IA_CSS_AA_ID] = true; @@ -2218,8 +2156,7 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_AA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2227,12 +2164,12 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, static void ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: config=%p\n", + config); *config = params->yuv2rgb_cc_config; @@ -2246,10 +2183,10 @@ void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->yuv2rgb_cc_config = *config; @@ -2258,8 +2195,7 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YUV2RGB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2267,12 +2203,12 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, static void ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: config=%p\n", + config); *config = params->rgb2yuv_cc_config; @@ -2286,10 +2222,10 @@ void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->rgb2yuv_cc_config = *config; @@ -2298,8 +2234,7 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_RGB2YUV_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2307,12 +2242,12 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, static void ia_css_get_csc_config(const struct ia_css_isp_parameters *params, struct ia_css_cc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: config=%p\n", + config); *config = params->cc_config; @@ -2326,10 +2261,10 @@ void ia_css_set_csc_config(struct ia_css_isp_parameters *params, const struct ia_css_cc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cc_config = *config; @@ -2338,8 +2273,7 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CSC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2347,12 +2281,12 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, static void ia_css_get_nr_config(const struct ia_css_isp_parameters *params, struct ia_css_nr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: config=%p\n", + config); *config = params->nr_config; @@ -2366,10 +2300,10 @@ void ia_css_set_nr_config(struct ia_css_isp_parameters *params, const struct ia_css_nr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->nr_config = *config; @@ -2379,8 +2313,7 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_NR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2388,12 +2321,12 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, static void ia_css_get_gc_config(const struct ia_css_isp_parameters *params, struct ia_css_gc_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: config=%p\n", + config); *config = params->gc_config; @@ -2407,10 +2340,10 @@ void ia_css_set_gc_config(struct ia_css_isp_parameters *params, const struct ia_css_gc_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->gc_config = *config; @@ -2419,8 +2352,7 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_GC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2428,12 +2360,12 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2447,10 +2379,10 @@ void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2462,8 +2394,7 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2471,12 +2402,12 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2490,10 +2421,10 @@ void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2505,8 +2436,7 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2514,12 +2444,12 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2533,10 +2463,10 @@ void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2548,8 +2478,7 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2557,12 +2486,12 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; @@ -2576,10 +2505,10 @@ void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; @@ -2591,8 +2520,7 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2600,12 +2528,12 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2619,10 +2547,10 @@ void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2634,8 +2562,7 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2643,12 +2570,12 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2662,10 +2589,10 @@ void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2677,8 +2604,7 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2686,12 +2612,12 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2705,10 +2631,10 @@ void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2720,8 +2646,7 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2729,12 +2654,12 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, struct ia_css_dvs2_coefficients *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; @@ -2748,10 +2673,10 @@ void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, const struct ia_css_dvs2_coefficients *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; @@ -2763,8 +2688,7 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2772,12 +2696,12 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, static void ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: config=%p\n", + config); *config = params->r_gamma_table; @@ -2791,10 +2715,10 @@ void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->r_gamma_table = *config; @@ -2803,8 +2727,7 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_R_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2812,12 +2735,12 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: config=%p\n", + config); *config = params->g_gamma_table; @@ -2831,10 +2754,10 @@ void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->g_gamma_table = *config; @@ -2843,8 +2766,7 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_G_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2852,12 +2774,12 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, struct ia_css_rgb_gamma_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: config=%p\n", + config); *config = params->b_gamma_table; @@ -2871,10 +2793,10 @@ void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, const struct ia_css_rgb_gamma_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->b_gamma_table = *config; @@ -2883,8 +2805,7 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_B_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2892,12 +2813,12 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr_table *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: config=%p\n", + config); *config = params->xnr_table; @@ -2911,10 +2832,10 @@ void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr_table *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; @@ -2923,8 +2844,7 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_TABLE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2932,12 +2852,12 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, static void ia_css_get_formats_config(const struct ia_css_isp_parameters *params, struct ia_css_formats_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: config=%p\n", + config); *config = params->formats_config; @@ -2951,10 +2871,10 @@ void ia_css_set_formats_config(struct ia_css_isp_parameters *params, const struct ia_css_formats_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->formats_config = *config; @@ -2963,8 +2883,7 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FORMATS_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -2972,12 +2891,12 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: config=%p\n", + config); *config = params->xnr_config; @@ -2991,10 +2910,10 @@ void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_config = *config; @@ -3003,8 +2922,7 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3012,12 +2930,12 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, static void ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, struct ia_css_xnr3_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: config=%p\n", + config); *config = params->xnr3_config; @@ -3031,10 +2949,10 @@ void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, const struct ia_css_xnr3_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr3_config = *config; @@ -3043,8 +2961,7 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR3_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3052,12 +2969,12 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, static void ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, struct ia_css_3a_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: config=%p\n", + config); *config = params->s3a_config; @@ -3071,10 +2988,10 @@ void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, const struct ia_css_3a_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->s3a_config = *config; @@ -3084,8 +3001,7 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_S3A_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ @@ -3093,12 +3009,12 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, static void ia_css_get_output_config(const struct ia_css_isp_parameters *params, struct ia_css_output_config *config){ - if (config == NULL) + if (!config) return; - assert(params != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: " - "config=%p\n",config); + assert(params); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: config=%p\n", + config); *config = params->output_config; @@ -3112,10 +3028,10 @@ void ia_css_set_output_config(struct ia_css_isp_parameters *params, const struct ia_css_output_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->output_config = *config; @@ -3124,8 +3040,7 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OUTPUT_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: " - "return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_global_access_function() */ @@ -3217,4 +3132,3 @@ ia_css_set_configs(struct ia_css_isp_parameters *params, ia_css_set_s3a_config(params, config->s3a_config); ia_css_set_output_config(params, config->output_config); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h index 5b3deb7f74aec..b5175c253c61d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h @@ -149,8 +149,8 @@ struct ia_css_memory_offsets { struct ia_css_pipeline_stage; /* forward declaration */ -extern void (* ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned pipe_id, +extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c index e87d05bc73ae8..dcc42c1ce94ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c @@ -28,12 +28,11 @@ ia_css_initialize_aa_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.aa.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; if (size) memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); } @@ -47,16 +46,15 @@ ia_css_initialize_cnr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; if (size) { ia_css_init_cnr_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); } @@ -70,16 +68,15 @@ ia_css_initialize_cnr2_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; if (size) { ia_css_init_cnr2_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); } @@ -93,16 +90,15 @@ ia_css_initialize_dp_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.dp.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; if (size) { ia_css_init_dp_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); } @@ -116,16 +112,15 @@ ia_css_initialize_de_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.de.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; if (size) { ia_css_init_de_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); } @@ -139,16 +134,15 @@ ia_css_initialize_tnr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; if (size) { ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); } @@ -162,16 +156,15 @@ ia_css_initialize_ref_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->dmem.ref.size; + unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; - unsigned offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; if (size) { ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); } @@ -185,16 +178,15 @@ ia_css_initialize_ynr_state( ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); { - unsigned size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; + unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; - unsigned offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; + unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; if (size) { ia_css_init_ynr_state( &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], size); } - } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); } @@ -211,4 +203,3 @@ void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_bina ia_css_initialize_ref_state, ia_css_initialize_ynr_state, }; - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h index e71e33d9d1434..c6d2a5cba2134 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h @@ -95,7 +95,7 @@ #define _hrt_get_bit(w, b) \ (((w) >> (b)) & 1) #define _hrt_set_bit(w, b, v) \ - (((w) & (~(1 << (b)))) | (((v)&1) << (b))) + (((w) & (~(1 << (b)))) | (((v) & 1) << (b))) #define _hrt_set_lower_half(w, v) \ _hrt_set_bits(w, 0, 16, v) #define _hrt_set_upper_half(w, v) \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h index b5756bfe8eb6b..0eabc59ff5afb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h @@ -22,9 +22,9 @@ #define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ #define SP_ICACHE_ADDRESS_BITS \ - (SP_ICACHE_TAG_BITS+SP_ICACHE_BLOCK_ADDRESS_BITS) + (SP_ICACHE_TAG_BITS + SP_ICACHE_BLOCK_ADDRESS_BITS) -#define SP_PMEM_DEPTH (1<_defs.h */ typedef enum hrt_isp_css_irq { - hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID , - hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID , - hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID , - hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID , - hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID , - hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID , - hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID , - hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID , - hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID , - hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID , - hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID , - hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID , - hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID , - hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID , - hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID , - hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID , - hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID , - hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID , - hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID , - hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID , - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID , - hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID , - hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID , - hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID , - hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID , - hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID , - hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID , - hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID , - hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID , - hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID , - hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID , - hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID , + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, /* this must (obviously) be the last on in the enum */ hrt_isp_css_irq_num_irqs } hrt_isp_css_irq_t; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h index 5a2ce9108ae49..be492eb9353da 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h @@ -28,12 +28,12 @@ and in the DMA parameter list */ #define HIVE_ISP_DDR_DMA_SPECS {{32, 8}, {16, 16}, {18, 14}, {25, 10}, {21, 12}} #define HIVE_ISP_DDR_WORD_BITS 256 -#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS/8) +#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS / 8) #define HIVE_ISP_DDR_BYTES (512 * 1024 * 1024) #define HIVE_ISP_DDR_BYTES_RTL (127 * 1024 * 1024) #define HIVE_ISP_DDR_SMALL_BYTES (128 * 256 / 8) #define HIVE_ISP_PAGE_SHIFT 12 -#define HIVE_ISP_PAGE_SIZE (1< -#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS)-1) -#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS)-1) +#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS) - 1) +#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS) - 1) #define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) #define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) - + #endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h index 58b0e6effbd06..9715893c8a360 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h @@ -12,28 +12,28 @@ * more details. */ -#ifndef _HRT_HIVE_TYPES_H -#define _HRT_HIVE_TYPES_H +#ifndef _HRT_HIVE_TYPES_H +#define _HRT_HIVE_TYPES_H #include "version.h" #include "defs.h" #ifndef HRTCAT3 -#define _HRTCAT3(m,n,o) m##n##o -#define HRTCAT3(m,n,o) _HRTCAT3(m,n,o) +#define _HRTCAT3(m, n, o) m##n##o +#define HRTCAT3(m, n, o) _HRTCAT3(m, n, o) #endif #ifndef HRTCAT4 -#define _HRTCAT4(m,n,o,p) m##n##o##p -#define HRTCAT4(m,n,o,p) _HRTCAT4(m,n,o,p) +#define _HRTCAT4(m, n, o, p) m##n##o##p +#define HRTCAT4(m, n, o, p) _HRTCAT4(m, n, o, p) #endif #ifndef HRTMIN -#define HRTMIN(a,b) (((a)<(b))?(a):(b)) +#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) #endif - + #ifndef HRTMAX -#define HRTMAX(a,b) (((a)>(b))?(a):(b)) +#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) #endif /* boolean data type */ @@ -59,8 +59,8 @@ typedef unsigned long long hive_uint64; #define HRT_ADDRESS_WIDTH 32 #endif -#define HRT_DATA_BYTES (HRT_DATA_WIDTH/8) -#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH/8) +#define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8) +#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8) #if HRT_DATA_WIDTH == 64 typedef hive_uint64 hrt_data; @@ -71,7 +71,7 @@ typedef hive_uint32 hrt_data; #endif #if HRT_ADDRESS_WIDTH == 64 -typedef hive_uint64 hrt_address; +typedef hive_uint64 hrt_address; #elif HRT_ADDRESS_WIDTH == 32 typedef hive_uint32 hrt_address; #else @@ -95,7 +95,7 @@ typedef hive_address hive_mem_address; typedef hive_uint hive_mmio_id; typedef hive_mmio_id hive_slave_id; typedef hive_mmio_id hive_port_id; -typedef hive_mmio_id hive_master_id; +typedef hive_mmio_id hive_master_id; typedef hive_mmio_id hive_mem_id; typedef hive_mmio_id hive_dev_id; typedef hive_mmio_id hive_fifo_id; @@ -122,7 +122,7 @@ typedef hive_uint hive_inport_id; typedef hive_uint hive_msink_id; /* HRT specific */ -typedef char* hive_program; -typedef char* hive_function; +typedef char *hive_program; +typedef char *hive_function; #endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h index 7766f78cd1230..176456da961f7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h @@ -22,7 +22,7 @@ #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 +#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 #define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 #define HIVE_IFMT_GP_REGS_SRST_IDX 9 #define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h index 87fbf82edb5bc..1dd8ea3cd6d47 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h @@ -31,37 +31,36 @@ #define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 #define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 #define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 -#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 -#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 +#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 +#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 +#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 -#define HIVE_ISEL_GP_REGS_SOF_IDX 8 -#define HIVE_ISEL_GP_REGS_EOF_IDX 9 -#define HIVE_ISEL_GP_REGS_SOL_IDX 10 -#define HIVE_ISEL_GP_REGS_EOL_IDX 11 +#define HIVE_ISEL_GP_REGS_SOF_IDX 8 +#define HIVE_ISEL_GP_REGS_EOF_IDX 9 +#define HIVE_ISEL_GP_REGS_SOL_IDX 10 +#define HIVE_ISEL_GP_REGS_EOL_IDX 11 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 -#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 +#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 +#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 -#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 -#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 -#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 +#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 +#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 +#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 +#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 +#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 +#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 #define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 #define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 #define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 #define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 #define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 - #define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 #define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 #define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h index 20a13c4cdb562..2d5baae305220 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h @@ -15,8 +15,8 @@ #ifndef _input_switch_2400_defs_h #define _input_switch_2400_defs_h -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id)*2) + ((fmt_type)>=16)) -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type)%16) * 2) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id) * 2) + ((fmt_type) >= 16)) +#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type) % 16) * 2) #define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 #define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h index a7f0ca80bc9be..fcfa8c4971bef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h @@ -50,7 +50,6 @@ #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 - /* register reset value */ #define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 @@ -59,38 +58,38 @@ #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 #define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 #define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 #define ISYS_CTRL_INIT_REG_RSTVAL 0 -#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) +#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) #define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 +#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 #define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 /* register width value */ -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ISYS_CTRL_INIT_REG_WIDTH 3 +#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 +#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ISYS_CTRL_INIT_REG_WIDTH 3 #define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ #define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 #define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 @@ -111,99 +110,89 @@ /* InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 [7:4] - CaptPortId, - CaptA-'b0000 - CaptB-'b0001 - CaptC-'b0010 + CaptA-'b0000 + CaptB-'b0001 + CaptC-'b0010 [31:16] - NOF_frames InpSysCaptFrameExt 2/0 [3:0] - 'b0001' [7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC 2/1 [31:0] - external capture address -InpSysAcqFrame 2/0 [3:0] - 'b0010, +InpSysAcqFrame 2/0 [3:0] - 'b0010, [31:4] - NOF_ext_mem_words 2/1 [31:0] - external memory read start address -InpSysOverruleON 1/0 [3:0] - 'b0011, +InpSysOverruleON 1/0 [3:0] - 'b0011, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA - -InpSysOverruleOFF 1/0 [3:0] - 'b0100, +InpSysOverruleOFF 1/0 [3:0] - 'b0100, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA -InpSysOverruleCmd 2/0 [3:0] - 'b0101, +InpSysOverruleCmd 2/0 [3:0] - 'b0101, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA 2/1 [31:0] - command token value for port opid - acknowledge tokens: InpSysAckCFA 1/0 [3:0] - 'b0000 [7:4] - CaptPortId, - CaptA-'b0000 - CaptB- 'b0001 - CaptC-'b0010 + CaptA-'b0000 + CaptB- 'b0001 + CaptC-'b0010 [31:16] - NOF_frames InpSysAckCFE 1/0 [3:0] - 'b0001' [7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC InpSysAckAF 1/0 [3:0] - 'b0010 -InpSysAckOverruleON 1/0 [3:0] - 'b0011, +InpSysAckOverruleON 1/0 [3:0] - 'b0011, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA -InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, +InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA - -InpSysAckOverrule 2/0 [3:0] - 'b0101, +InpSysAckOverrule 2/0 [3:0] - 'b0101, [7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - + 'b0000 - CaptA + 'b0001 - CaptB + 'b0010 - CaptC + 'b0011 - Acq + 'b0100 - DMA 2/1 [31:0] - acknowledge token value from port opid - - */ - /* Command and acknowledge tokens IDs */ #define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ #define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ @@ -232,10 +221,10 @@ InpSysAckOverrule 2/0 [3:0] - 'b0101, #define ISYS_CTRL_TOKEN_ID_IDX 0 #define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) #define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) -#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB +1) -#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB +#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB + 1) +#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB #define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) -#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB +#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB #define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) #define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ @@ -248,7 +237,7 @@ InpSysAckOverrule 2/0 [3:0] - 'b0101, #define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ #define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ -#define ISYS_CTRL_NO_DMA_ACK 0 +#define ISYS_CTRL_NO_DMA_ACK 0 #define ISYS_CTRL_NO_CAPT_ACK 16 -#endif /* _input_system_ctrl_defs_h */ +#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h index ec6dd4487158e..efb3d7e135bdd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h @@ -25,4 +25,4 @@ #define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 -#endif /* _irq_controller_defs_h */ +#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h index 033e23bcf672a..7e79e3c611ee4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h @@ -111,8 +111,8 @@ #define ISP_SRU_GUARDING 1 #define ISP_VLSU_GUARDING 1 -#define ISP_VRF_RAM 1 -#define ISP_SRF_RAM 1 +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 #define ISP_SPLIT_VMUL_VADD_IS 0 #define ISP_RFSPLIT_FPGA 0 @@ -175,10 +175,10 @@ #define ISP_NWAY ISP_VEC_NELEMS #define NBITS ISP_VEC_ELEMBITS -#define _isp_ceil_div(a,b) (((a)+(b)-1)/(b)) +#define _isp_ceil_div(a, b) (((a) + (b) - 1) / (b)) #ifdef C_RUN -#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64)*8) +#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64) * 8) #else #define ISP_VEC_ALIGN ISP_VMEM_ALIGN #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h index 5936207216271..5bdc16c71e82c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h @@ -16,7 +16,7 @@ #define _isp_acquisition_defs_h #define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 +#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 /* --------------------------------------------------*/ @@ -32,13 +32,13 @@ /* REGISTER INFO */ /* --------------------------------------------------*/ -#define NOF_ACQ_REGS 12 +#define NOF_ACQ_REGS 12 // Register id's of MMIO slave accesible registers -#define ACQ_START_ADDR_REG_ID 0 +#define ACQ_START_ADDR_REG_ID 0 #define ACQ_MEM_REGION_SIZE_REG_ID 1 #define ACQ_NUM_MEM_REGIONS_REG_ID 2 -#define ACQ_INIT_REG_ID 3 +#define ACQ_INIT_REG_ID 3 #define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 #define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 #define ACQ_LAST_COMMAND_REG_ID 6 @@ -47,34 +47,34 @@ #define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 #define ACQ_FSM_STATE_INFO_REG_ID 10 #define ACQ_INT_CNTR_INFO_REG_ID 11 - + // Register width -#define ACQ_START_ADDR_REG_WIDTH 9 -#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ACQ_INIT_REG_WIDTH 3 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 -#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 -#define ACQ_LAST_COMMAND_REG_WIDTH 32 -#define ACQ_NEXT_COMMAND_REG_WIDTH 32 -#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS *3)) +#define ACQ_START_ADDR_REG_WIDTH 9 +#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 +#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 +#define ACQ_INIT_REG_WIDTH 3 +#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 +#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 +#define ACQ_LAST_COMMAND_REG_WIDTH 32 +#define ACQ_NEXT_COMMAND_REG_WIDTH 32 +#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 +#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS * 3)) #define ACQ_INT_CNTR_INFO_REG_WIDTH 32 /* register reset value */ -#define ACQ_START_ADDR_REG_RSTVAL 0 +#define ACQ_START_ADDR_REG_RSTVAL 0 #define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 #define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define ACQ_INIT_REG_RSTVAL 0 +#define ACQ_INIT_REG_RSTVAL 0 #define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 #define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 #define ACQ_LAST_COMMAND_REG_RSTVAL 0 #define ACQ_NEXT_COMMAND_REG_RSTVAL 0 #define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 -#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 +#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 #define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 -#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 +#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 /* bit definitions */ #define ACQ_INIT_RST_REG_BIT 0 @@ -88,7 +88,7 @@ /* TOKEN INFO */ /* --------------------------------------------------*/ #define ACQ_TOKEN_ID_LSB 0 -#define ACQ_TOKEN_ID_MSB 3 +#define ACQ_TOKEN_ID_MSB 3 #define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 #define ACQ_TOKEN_ID_IDX 0 #define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH @@ -97,9 +97,9 @@ #define ACQ_CMD_START_ADDR_IDX 4 #define ACQ_CMD_START_ADDR_BITS 9 #define ACQ_CMD_NOFWORDS_IDX 13 -#define ACQ_CMD_NOFWORDS_BITS 9 +#define ACQ_CMD_NOFWORDS_BITS 9 #define ACQ_MEM_REGION_ID_IDX 22 -#define ACQ_MEM_REGION_ID_BITS 9 +#define ACQ_MEM_REGION_ID_BITS 9 #define ACQ_PACKET_LENGTH_TOKEN_MSB 21 #define ACQ_PACKET_LENGTH_TOKEN_LSB 13 #define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 @@ -109,11 +109,10 @@ #define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ #define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ - /* Command tokens IDs */ #define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b #define ACQ_READ_REGION_TOKEN_ID 1 //0001b -#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b +#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b #define ACQ_INIT_TOKEN_ID 8 //1000b /* Acknowledge token IDs */ @@ -128,18 +127,17 @@ #define ACQ_TOKEN_NOFWORDS_MSB 21 #define ACQ_TOKEN_NOFWORDS_LSB 13 #define ACQ_TOKEN_STARTADDR_MSB 12 -#define ACQ_TOKEN_STARTADDR_LSB 4 - +#define ACQ_TOKEN_STARTADDR_LSB 4 /* --------------------------------------------------*/ /* MIPI */ /* --------------------------------------------------*/ #define WORD_COUNT_WIDTH 16 -#define PKT_CODE_WIDTH 6 -#define CHN_NO_WIDTH 2 +#define PKT_CODE_WIDTH 6 +#define CHN_NO_WIDTH 2 #define ERROR_INFO_WIDTH 8 - + #define LONG_PKTCODE_MAX 63 #define LONG_PKTCODE_MIN 16 #define SHORT_PKTCODE_MAX 15 @@ -156,7 +154,6 @@ #define ACQ_LINE_PAYLOAD 4 #define ACQ_GEN_SH_PKT 5 - /* bit definition */ #define ACQ_PKT_TYPE_IDX 16 #define ACQ_PKT_TYPE_BITS 6 @@ -174,51 +171,49 @@ #define ACQ_ACK_PKT_LEN_IDX 4 #define ACQ_ACK_PKT_LEN_BITS 16 - /* --------------------------------------------------*/ /* Packet Data Type */ /* --------------------------------------------------*/ - #define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ #define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ #define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ #define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ #define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ #define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ -#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ -#define ACQ_SOL_DATA 2 /* 00 0010 line start */ -#define ACQ_EOL_DATA 3 /* 00 0011 line end */ -#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ +#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ +#define ACQ_SOL_DATA 2 /* 00 0010 line start */ +#define ACQ_EOL_DATA 3 /* 00 0011 line end */ +#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ #define ACQ_RESERVED_DATA_TYPE_MIN 56 #define ACQ_RESERVED_DATA_TYPE_MAX 63 #define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 @@ -231,4 +226,4 @@ /* --------------------------------------------------*/ -#endif /* _isp_acquisition_defs_h */ +#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h index aa413df022f2e..6c36d3b6f6810 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h @@ -16,14 +16,14 @@ #define _isp_capture_defs_h #define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ -#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM/8 ) -#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ -#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM +#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ +#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM / 8) +#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ +#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM //#define CAPT_RCV_ACK 1 -//#define CAPT_WRT_ACK 2 -//#define CAPT_IRQ_ACK 3 +//#define CAPT_WRT_ACK 2 +//#define CAPT_IRQ_ACK 3 /* --------------------------------------------------*/ @@ -38,25 +38,25 @@ // Register id's of MMIO slave accesible registers #define CAPT_START_MODE_REG_ID 0 -#define CAPT_START_ADDR_REG_ID 1 -#define CAPT_MEM_REGION_SIZE_REG_ID 2 -#define CAPT_NUM_MEM_REGIONS_REG_ID 3 -#define CAPT_INIT_REG_ID 4 +#define CAPT_START_ADDR_REG_ID 1 +#define CAPT_MEM_REGION_SIZE_REG_ID 2 +#define CAPT_NUM_MEM_REGIONS_REG_ID 3 +#define CAPT_INIT_REG_ID 4 #define CAPT_START_REG_ID 5 -#define CAPT_STOP_REG_ID 6 +#define CAPT_STOP_REG_ID 6 #define CAPT_PACKET_LENGTH_REG_ID 7 -#define CAPT_RECEIVED_LENGTH_REG_ID 8 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 -#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 -#define CAPT_LAST_COMMAND_REG_ID 11 +#define CAPT_RECEIVED_LENGTH_REG_ID 8 +#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 +#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 +#define CAPT_LAST_COMMAND_REG_ID 11 #define CAPT_NEXT_COMMAND_REG_ID 12 #define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 #define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 #define CAPT_FSM_STATE_INFO_REG_ID 15 // Register width -#define CAPT_START_MODE_REG_WIDTH 1 +#define CAPT_START_MODE_REG_WIDTH 1 //#define CAPT_START_ADDR_REG_WIDTH 9 //#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 //#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 @@ -71,25 +71,24 @@ #define CAPT_WRITE2MEM_FSM_STATE_BITS 2 #define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 - #define CAPT_PACKET_LENGTH_REG_WIDTH 17 -#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 +#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 #define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 #define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 #define CAPT_LAST_COMMAND_REG_WIDTH 32 -/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ +/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ #define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) -//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 -//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 +//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 +//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 /* register reset value */ -#define CAPT_START_MODE_REG_RSTVAL 0 +#define CAPT_START_MODE_REG_RSTVAL 0 #define CAPT_START_ADDR_REG_RSTVAL 0 #define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 -#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 +#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 #define CAPT_INIT_REG_RSTVAL 0 #define CAPT_START_REG_RSTVAL 0 @@ -115,7 +114,6 @@ #define CAPT_INIT_RESTART_MEM_REGION_LSB 15 #define CAPT_INIT_RESTART_MEM_REGION_MSB 25 - #define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT #define CAPT_INIT_RST_REG_BITS 1 #define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT @@ -123,29 +121,27 @@ #define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT #define CAPT_INIT_RESYNC_BITS 1 #define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT -#define CAPT_INIT_RESTART_BITS 1 +#define CAPT_INIT_RESTART_BITS 1 #define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB #define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) #define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB #define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) - - /* --------------------------------------------------*/ /* TOKEN INFO */ /* --------------------------------------------------*/ #define CAPT_TOKEN_ID_LSB 0 -#define CAPT_TOKEN_ID_MSB 3 +#define CAPT_TOKEN_ID_MSB 3 #define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ /* Command tokens IDs */ #define CAPT_START_TOKEN_ID 0 /* 0000b */ #define CAPT_STOP_TOKEN_ID 1 /* 0001b */ -#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ +#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ #define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ #define CAPT_INIT_TOKEN_ID 8 /* 1000b */ -#define CAPT_START_TOKEN_BIT 0 +#define CAPT_START_TOKEN_BIT 0 #define CAPT_STOP_TOKEN_BIT 0 #define CAPT_FREEZE_TOKEN_BIT 0 #define CAPT_RESUME_TOKEN_BIT 0 @@ -169,8 +165,8 @@ #define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 #define CAPT_PACKET_CH_ID_TOKEN_MSB 27 #define CAPT_PACKET_CH_ID_TOKEN_LSB 26 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 +#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 /* bit definition */ #define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB @@ -208,21 +204,19 @@ #define CAPT_INIT_TOKEN_INIT_IDX 4 #define CAPT_INIT_TOKEN_INIT_BITS 22 - /* --------------------------------------------------*/ /* MIPI */ /* --------------------------------------------------*/ -#define CAPT_WORD_COUNT_WIDTH 16 -#define CAPT_PKT_CODE_WIDTH 6 -#define CAPT_CHN_NO_WIDTH 2 -#define CAPT_ERROR_INFO_WIDTH 8 +#define CAPT_WORD_COUNT_WIDTH 16 +#define CAPT_PKT_CODE_WIDTH 6 +#define CAPT_CHN_NO_WIDTH 2 +#define CAPT_ERROR_INFO_WIDTH 8 #define LONG_PKTCODE_MAX 63 #define LONG_PKTCODE_MIN 16 #define SHORT_PKTCODE_MAX 15 - /* --------------------------------------------------*/ /* Packet Info */ /* --------------------------------------------------*/ @@ -233,7 +227,6 @@ #define CAPT_LINE_PAYLOAD 4 #define CAPT_GEN_SH_PKT 5 - /* --------------------------------------------------*/ /* Packet Data Type */ /* --------------------------------------------------*/ @@ -244,39 +237,39 @@ #define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ #define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ #define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ -#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ -#define CAPT_SOL_DATA 2 /* 00 0010 line start */ -#define CAPT_EOL_DATA 3 /* 00 0011 line end */ -#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ +#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ +#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ +#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ +#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ +#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ +#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ +#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ +#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ +#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ +#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ +#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ +#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ +#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ +#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ +#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ +#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ +#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ +#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ +#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ +#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ +#define CAPT_SOL_DATA 2 /* 00 0010 line start */ +#define CAPT_EOL_DATA 3 /* 00 0011 line end */ +#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ +#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ +#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ +#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ +#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ +#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ +#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ +#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ +#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ +#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ #define CAPT_RESERVED_DATA_TYPE_MIN 56 #define CAPT_RESERVED_DATA_TYPE_MAX 63 #define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 @@ -287,7 +280,6 @@ #define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 #define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 - /* --------------------------------------------------*/ /* Capture Unit State */ /* --------------------------------------------------*/ @@ -299,12 +291,6 @@ #define CAPT_FREEZE 5 #define CAPT_RUN 6 - /* --------------------------------------------------*/ -#endif /* _isp_capture_defs_h */ - - - - - +#endif /* _isp_capture_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h index d2b8972b0d9ec..75451e090f4ff 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h @@ -19,4 +19,4 @@ #define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 -#endif /* _timed_controller_defs_h */ +#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h index 19b19ef484f95..d3df4e1649c97 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h @@ -40,58 +40,58 @@ #define hrt_host_type_of_ulong unsigned long #define hrt_host_type_of_ptr void* -#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type)/8) +#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) #ifdef C_RUN #ifdef C_RUN_DYNAMIC_LINK_PROGRAMS -extern void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); -#define _hrt_cell_get_crun_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) -#define _hrt_cell_get_crun_indexed_symbol(cell,sym) csim_processor_get_crun_symbol(cell,HRTSTR(sym)) +void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); +#define _hrt_cell_get_crun_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) +#define _hrt_cell_get_crun_indexed_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) #else -#define _hrt_cell_get_crun_symbol(cell,sym) (&sym) -#define _hrt_cell_get_crun_indexed_symbol(cell,sym) (sym) +#define _hrt_cell_get_crun_symbol(cell, sym) (&sym) +#define _hrt_cell_get_crun_indexed_symbol(cell, sym) (sym) #endif // C_RUN_DYNAMIC_LINK_PROGRAMS #define hrt_scalar_store(cell, type, var, data) \ - ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var)) = (data)) + ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var)) = (data)) #define hrt_scalar_load(cell, type, var) \ - ((*(HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_symbol(cell,var))) + ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var))) #define hrt_indexed_store(cell, type, array, index, data) \ - ((((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) = (data)) + ((((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) = (data)) #define hrt_indexed_load(cell, type, array, index) \ - (((HRT_HOST_TYPE(type)*)_hrt_cell_get_crun_indexed_symbol(cell,array))[index]) + (((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) #else /* C_RUN */ #define hrt_scalar_store(cell, type, var, data) \ - HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ cell, \ - HRTCAT(HIVE_MEM_,var), \ - HRTCAT(HIVE_ADDR_,var), \ + HRTCAT(HIVE_MEM_, var), \ + HRTCAT(HIVE_ADDR_, var), \ (HRT_INT_TYPE(type))(data)) #define hrt_scalar_load(cell, type, var) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ cell, \ - HRTCAT(HIVE_MEM_,var), \ - HRTCAT(HIVE_ADDR_,var))) + HRTCAT(HIVE_MEM_, var), \ + HRTCAT(HIVE_ADDR_, var))) #define hrt_indexed_store(cell, type, array, index, data) \ - HRTCAT(hrt_mem_store_,HRT_TYPE_BITS(cell, type))(\ + HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ cell, \ - HRTCAT(HIVE_MEM_,array), \ - (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)), \ + HRTCAT(HIVE_MEM_, array), \ + (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)), \ (HRT_INT_TYPE(type))(data)) #define hrt_indexed_load(cell, type, array, index) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_,HRT_PROC_TYPE(cell),_,type) ( \ - cell, \ - HRTCAT(HIVE_MEM_,array), \ - (HRTCAT(HIVE_ADDR_,array))+((index)*HRT_TYPE_BYTES(cell, type)))) + (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ + cell, \ + HRTCAT(HIVE_MEM_, array), \ + (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) #endif /* C_RUN */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c index 09f0780f0c800..4c44b89e47e95 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c @@ -15,7 +15,6 @@ #ifndef _sp_map_h_ #define _sp_map_h_ - #ifndef _hrt_dummy_use_blob_sp #define _hrt_dummy_use_blob_sp() #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h index 01f7c33b5b407..1b0854c1f77de 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h @@ -26,9 +26,9 @@ /* one tracer item: major, minor and counter. The counter value can be used for GP data */ struct trace_item_t { - uint8_t major; - uint8_t minor; - uint16_t counter; + u8 major; + u8 minor; + u16 counter; }; #ifdef ISP2401 @@ -43,30 +43,30 @@ struct trace_header_t { #else /* 1st dword: descriptor */ #endif - uint8_t version; - uint8_t max_threads; - uint16_t max_tracer_points; + u8 version; + u8 max_threads; + u16 max_tracer_points; #ifdef ISP2401 /* 2nd field: command + data */ #endif /* 2nd dword */ - uint32_t command; + u32 command; /* 3rd & 4th dword */ #ifndef ISP2401 - uint32_t data[2]; + u32 data[2]; #else - uint32_t data[MAX_CMD_DATA]; + u32 data[MAX_CMD_DATA]; /* 3rd field: debug pointer */ #endif /* 5th & 6th dword: debug pointer mechanism */ - uint32_t debug_ptr_signature; - uint32_t debug_ptr_value; + u32 debug_ptr_signature; + u32 debug_ptr_value; #ifdef ISP2401 /* Rest of the header: status & scratch data */ - uint8_t thr_status_byte[SH_CSS_MAX_SP_THREADS]; - uint16_t thr_status_word[SH_CSS_MAX_SP_THREADS]; - uint32_t thr_status_dword[SH_CSS_MAX_SP_THREADS]; - uint32_t scratch_debug[MAX_SCRATCH_DATA]; + u8 thr_status_byte[SH_CSS_MAX_SP_THREADS]; + u16 thr_status_word[SH_CSS_MAX_SP_THREADS]; + u32 thr_status_dword[SH_CSS_MAX_SP_THREADS]; + u32 scratch_debug[MAX_SCRATCH_DATA]; #endif }; @@ -137,26 +137,25 @@ enum TRACE_DUMP_FORMAT { }; #endif - /* currently divided as follows:*/ #if (TRACE_ENABLE_SP0 + TRACE_ENABLE_SP1 + TRACE_ENABLE_ISP == 3) /* can be divided as needed */ -#define TRACE_SP0_SIZE (TRACE_BUFF_SIZE/4) -#define TRACE_SP1_SIZE (TRACE_BUFF_SIZE/4) -#define TRACE_ISP_SIZE (TRACE_BUFF_SIZE/2) +#define TRACE_SP0_SIZE (TRACE_BUFF_SIZE / 4) +#define TRACE_SP1_SIZE (TRACE_BUFF_SIZE / 4) +#define TRACE_ISP_SIZE (TRACE_BUFF_SIZE / 2) #elif (TRACE_ENABLE_SP0 + TRACE_ENABLE_SP1 + TRACE_ENABLE_ISP == 2) #if TRACE_ENABLE_SP0 -#define TRACE_SP0_SIZE (TRACE_BUFF_SIZE/2) +#define TRACE_SP0_SIZE (TRACE_BUFF_SIZE / 2) #else #define TRACE_SP0_SIZE (0) #endif #if TRACE_ENABLE_SP1 -#define TRACE_SP1_SIZE (TRACE_BUFF_SIZE/2) +#define TRACE_SP1_SIZE (TRACE_BUFF_SIZE / 2) #else #define TRACE_SP1_SIZE (0) #endif #if TRACE_ENABLE_ISP -#define TRACE_ISP_SIZE (TRACE_BUFF_SIZE/2) +#define TRACE_ISP_SIZE (TRACE_BUFF_SIZE / 2) #else #define TRACE_ISP_SIZE (0) #endif @@ -278,55 +277,54 @@ typedef enum { /* shared macros in traces infrastructure */ /* increment the pointer cyclicly */ -#define DBG_NEXT_ITEM(x, max_items) (((x+1) >= max_items) ? 0 : x+1) -#define DBG_PREV_ITEM(x, max_items) ((x) ? x-1 : max_items-1) +#define DBG_NEXT_ITEM(x, max_items) (((x + 1) >= max_items) ? 0 : x + 1) +#define DBG_PREV_ITEM(x, max_items) ((x) ? x - 1 : max_items - 1) #define FIELD_MASK(width) (((1 << (width)) - 1)) -#define FIELD_PACK(value,mask,offset) (((value) & (mask)) << (offset)) -#define FIELD_UNPACK(value,mask,offset) (((value) >> (offset)) & (mask)) - +#define FIELD_PACK(value, mask, offset) (((value) & (mask)) << (offset)) +#define FIELD_UNPACK(value, mask, offset) (((value) >> (offset)) & (mask)) #define FIELD_VALUE_OFFSET (0) #define FIELD_VALUE_WIDTH (16) #define FIELD_VALUE_MASK FIELD_MASK(FIELD_VALUE_WIDTH) -#define FIELD_VALUE_PACK(f) FIELD_PACK(f,FIELD_VALUE_MASK,FIELD_VALUE_OFFSET) +#define FIELD_VALUE_PACK(f) FIELD_PACK(f, FIELD_VALUE_MASK, FIELD_VALUE_OFFSET) #ifndef ISP2401 -#define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f,FIELD_VALUE_MASK,FIELD_VALUE_OFFSET) +#define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f, FIELD_VALUE_MASK, FIELD_VALUE_OFFSET) #else -#define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f,FIELD_VALUE_MASK,FIELD_VALUE_OFFSET) +#define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f, FIELD_VALUE_MASK, FIELD_VALUE_OFFSET) #endif #define FIELD_MINOR_OFFSET (FIELD_VALUE_OFFSET + FIELD_VALUE_WIDTH) #define FIELD_MINOR_WIDTH (8) #define FIELD_MINOR_MASK FIELD_MASK(FIELD_MINOR_WIDTH) -#define FIELD_MINOR_PACK(f) FIELD_PACK(f,FIELD_MINOR_MASK,FIELD_MINOR_OFFSET) +#define FIELD_MINOR_PACK(f) FIELD_PACK(f, FIELD_MINOR_MASK, FIELD_MINOR_OFFSET) #ifndef ISP2401 -#define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MINOR_MASK,FIELD_MINOR_OFFSET) +#define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MINOR_MASK, FIELD_MINOR_OFFSET) #else -#define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MINOR_MASK,FIELD_MINOR_OFFSET) +#define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MINOR_MASK, FIELD_MINOR_OFFSET) #endif #define FIELD_MAJOR_OFFSET (FIELD_MINOR_OFFSET + FIELD_MINOR_WIDTH) #define FIELD_MAJOR_WIDTH (5) #define FIELD_MAJOR_MASK FIELD_MASK(FIELD_MAJOR_WIDTH) -#define FIELD_MAJOR_PACK(f) FIELD_PACK(f,FIELD_MAJOR_MASK,FIELD_MAJOR_OFFSET) +#define FIELD_MAJOR_PACK(f) FIELD_PACK(f, FIELD_MAJOR_MASK, FIELD_MAJOR_OFFSET) #ifndef ISP2401 -#define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MAJOR_MASK,FIELD_MAJOR_OFFSET) +#define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MAJOR_MASK, FIELD_MAJOR_OFFSET) #else -#define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f,FIELD_MAJOR_MASK,FIELD_MAJOR_OFFSET) +#define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MAJOR_MASK, FIELD_MAJOR_OFFSET) #endif #ifndef ISP2401 #define FIELD_FORMAT_OFFSET (FIELD_MAJOR_OFFSET + FIELD_MAJOR_WIDTH) -#define FIELD_FORMAT_WIDTH (3) -#define FIELD_FORMAT_MASK FIELD_MASK(FIELD_FORMAT_WIDTH) -#define FIELD_FORMAT_PACK(f) FIELD_PACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) -#define FIELD_FORMAT_UNPACK(f) FIELD_UNPACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) +#define FIELD_FORMAT_WIDTH (3) +#define FIELD_FORMAT_MASK FIELD_MASK(FIELD_FORMAT_WIDTH) +#define FIELD_FORMAT_PACK(f) FIELD_PACK(f, FIELD_FORMAT_MASK, FIELD_FORMAT_OFFSET) +#define FIELD_FORMAT_UNPACK(f) FIELD_UNPACK(f, FIELD_FORMAT_MASK, FIELD_FORMAT_OFFSET) #else /* for quick traces - only insertion, compatible with the regular point */ #define FIELD_FULL_MAJOR_WIDTH (8) #define FIELD_FULL_MAJOR_MASK FIELD_MASK(FIELD_FULL_MAJOR_WIDTH) -#define FIELD_FULL_MAJOR_PACK(f) FIELD_PACK(f,FIELD_FULL_MAJOR_MASK,FIELD_MAJOR_OFFSET) +#define FIELD_FULL_MAJOR_PACK(f) FIELD_PACK(f, FIELD_FULL_MAJOR_MASK, FIELD_MAJOR_OFFSET) /* The following 2 fields are used only when FIELD_TID value is 111b. * it means we don't want to use thread id, but format. In this case, @@ -335,22 +333,22 @@ typedef enum { #define FIELD_MAJOR_W_FMT_OFFSET FIELD_MAJOR_OFFSET #define FIELD_MAJOR_W_FMT_WIDTH (3) #define FIELD_MAJOR_W_FMT_MASK FIELD_MASK(FIELD_MAJOR_W_FMT_WIDTH) -#define FIELD_MAJOR_W_FMT_PACK(f) FIELD_PACK(f,FIELD_MAJOR_W_FMT_MASK,FIELD_MAJOR_W_FMT_OFFSET) -#define FIELD_MAJOR_W_FMT_UNPACK(f) FIELD_UNPACK(f,FIELD_MAJOR_W_FMT_MASK,FIELD_MAJOR_W_FMT_OFFSET) +#define FIELD_MAJOR_W_FMT_PACK(f) FIELD_PACK(f, FIELD_MAJOR_W_FMT_MASK, FIELD_MAJOR_W_FMT_OFFSET) +#define FIELD_MAJOR_W_FMT_UNPACK(f) FIELD_UNPACK(f, FIELD_MAJOR_W_FMT_MASK, FIELD_MAJOR_W_FMT_OFFSET) #define FIELD_FORMAT_OFFSET (FIELD_MAJOR_OFFSET + FIELD_MAJOR_W_FMT_WIDTH) -#define FIELD_FORMAT_WIDTH (2) -#define FIELD_FORMAT_MASK FIELD_MASK(FIELD_MAJOR_W_FMT_WIDTH) -#define FIELD_FORMAT_PACK(f) FIELD_PACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) -#define FIELD_FORMAT_UNPACK(f) FIELD_UNPACK(f,FIELD_FORMAT_MASK,FIELD_FORMAT_OFFSET) +#define FIELD_FORMAT_WIDTH (2) +#define FIELD_FORMAT_MASK FIELD_MASK(FIELD_MAJOR_W_FMT_WIDTH) +#define FIELD_FORMAT_PACK(f) FIELD_PACK(f, FIELD_FORMAT_MASK, FIELD_FORMAT_OFFSET) +#define FIELD_FORMAT_UNPACK(f) FIELD_UNPACK(f, FIELD_FORMAT_MASK, FIELD_FORMAT_OFFSET) #define FIELD_TID_SEL_FORMAT_PAT (7) #define FIELD_TID_OFFSET (FIELD_MAJOR_OFFSET + FIELD_MAJOR_WIDTH) #define FIELD_TID_WIDTH (3) #define FIELD_TID_MASK FIELD_MASK(FIELD_TID_WIDTH) -#define FIELD_TID_PACK(f) FIELD_PACK(f,FIELD_TID_MASK,FIELD_TID_OFFSET) -#define FIELD_TID_UNPACK(f) FIELD_UNPACK(f,FIELD_TID_MASK,FIELD_TID_OFFSET) +#define FIELD_TID_PACK(f) FIELD_PACK(f, FIELD_TID_MASK, FIELD_TID_OFFSET) +#define FIELD_TID_UNPACK(f) FIELD_UNPACK(f, FIELD_TID_MASK, FIELD_TID_OFFSET) #endif #define FIELD_VALUE_24_OFFSET (0) @@ -360,11 +358,11 @@ typedef enum { #else #define FIELD_VALUE_24_MASK FIELD_MASK(FIELD_VALUE_24_WIDTH) #endif -#define FIELD_VALUE_24_PACK(f) FIELD_PACK(f,FIELD_VALUE_24_MASK,FIELD_VALUE_24_OFFSET) -#define FIELD_VALUE_24_UNPACK(f) FIELD_UNPACK(f,FIELD_VALUE_24_MASK,FIELD_VALUE_24_OFFSET) +#define FIELD_VALUE_24_PACK(f) FIELD_PACK(f, FIELD_VALUE_24_MASK, FIELD_VALUE_24_OFFSET) +#define FIELD_VALUE_24_UNPACK(f) FIELD_UNPACK(f, FIELD_VALUE_24_MASK, FIELD_VALUE_24_OFFSET) #ifndef ISP2401 -#define PACK_TRACEPOINT(format,major, minor, value) \ +#define PACK_TRACEPOINT(format, major, minor, value) \ (FIELD_FORMAT_PACK(format) | FIELD_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor) | FIELD_VALUE_PACK(value)) #else #define PACK_TRACEPOINT(tid, major, minor, value) \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h index 076c4ba761753..7580cf5c96242 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h @@ -41,7 +41,6 @@ * #define HAS_WATCHDOG_SP_THREAD_DEBUG */ - /* * The linear buffer mode will accept data until the first * overflow and then stop accepting new data @@ -55,11 +54,11 @@ typedef enum { } debug_buf_mode_t; struct debug_data_s { - uint32_t enable; - uint32_t bufmode; - uint32_t head; - uint32_t tail; - uint32_t buf[DEBUG_BUF_SIZE]; + u32 enable; + u32 bufmode; + u32 head; + u32 tail; + u32 buf[DEBUG_BUF_SIZE]; }; /* thread.sp.c doesn't have a notion of HIVE_ISP_DDR_WORD_BYTES @@ -67,17 +66,16 @@ struct debug_data_s { #ifdef HIVE_ISP_DDR_WORD_BYTES struct debug_data_ddr_s { - uint32_t enable; - int8_t padding1[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; - uint32_t bufmode; - int8_t padding2[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; - uint32_t head; - int8_t padding3[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; - uint32_t tail; - int8_t padding4[HIVE_ISP_DDR_WORD_BYTES-sizeof(uint32_t)]; - uint32_t buf[DEBUG_BUF_SIZE]; + u32 enable; + s8 padding1[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)]; + u32 bufmode; + s8 padding2[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)]; + u32 head; + s8 padding3[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)]; + u32 tail; + s8 padding4[HIVE_ISP_DDR_WORD_BYTES - sizeof(uint32_t)]; + u32 buf[DEBUG_BUF_SIZE]; }; #endif #endif /* __DEBUG_GLOBAL_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h index 60d6de1332cd6..d897fc943da4f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h @@ -52,7 +52,6 @@ #define _DMA_ZERO_EXTEND _DMA_V2_ZERO_EXTEND #define _DMA_SIGN_EXTEND _DMA_V2_SIGN_EXTEND - typedef unsigned int dma_channel; typedef enum { @@ -66,9 +65,8 @@ typedef enum { dma_sign_extension = _DMA_SIGN_EXTEND } dma_extension; - #define DMA_PROP_SHIFT(val, param) ((val) << _DMA_V2_ ## param ## _IDX) -#define DMA_PROP_MASK(param) ((1U << _DMA_V2_ ## param ## _BITS)-1) +#define DMA_PROP_MASK(param) ((1U << _DMA_V2_ ## param ## _BITS) - 1) #define DMA_PACK(val, param) DMA_PROP_SHIFT((val) & DMA_PROP_MASK(param), param) #define DMA_PACK_COMMAND(cmd) DMA_PACK(cmd, CMD) @@ -96,18 +94,19 @@ typedef enum { #define hive_dma_move_data(dma_id, read, channel, addr_a, addr_b, to_is_var, from_is_var) \ { \ hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ - hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(read?_DMA_V2_MOVE_B2A_COMMAND:_DMA_V2_MOVE_A2B_COMMAND, channel)); \ - hive_dma_snd(dma_id, read?(unsigned)(addr_b):(unsigned)(addr_a)); \ - hive_dma_snd(dma_id, read?(unsigned)(addr_a):(unsigned)(addr_b)); \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(read ? _DMA_V2_MOVE_B2A_COMMAND : _DMA_V2_MOVE_A2B_COMMAND, channel)); \ + hive_dma_snd(dma_id, read ? (unsigned int)(addr_b) : (unsigned int)(addr_a)); \ + hive_dma_snd(dma_id, read ? (unsigned int)(addr_a) : (unsigned int)(addr_b)); \ hive_dma_snd(dma_id, to_is_var); \ hive_dma_snd(dma_id, from_is_var); \ } + #define hive_dma_move_data_no_ack(dma_id, read, channel, addr_a, addr_b, to_is_var, from_is_var) \ { \ hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ - hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(read?_DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND:_DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND, channel)); \ - hive_dma_snd(dma_id, read?(unsigned)(addr_b):(unsigned)(addr_a)); \ - hive_dma_snd(dma_id, read?(unsigned)(addr_a):(unsigned)(addr_b)); \ + hive_dma_snd(dma_id, DMA_PACK_CMD_CHANNEL(read ? _DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND : _DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND, channel)); \ + hive_dma_snd(dma_id, read ? (unsigned int)(addr_b) : (unsigned int)(addr_a)); \ + hive_dma_snd(dma_id, read ? (unsigned int)(addr_a) : (unsigned int)(addr_b)); \ hive_dma_snd(dma_id, to_is_var); \ hive_dma_snd(dma_id, from_is_var); \ } @@ -239,16 +238,16 @@ typedef enum { } dma_config_type_t; struct dma_port_config { - uint8_t crop, elems; - uint16_t width; - uint32_t stride; + u8 crop, elems; + u16 width; + u32 stride; }; /* Descriptor for dma configuration */ struct dma_channel_config { - uint8_t connection; - uint8_t extension; - uint8_t height; + u8 connection; + u8 extension; + u8 height; struct dma_port_config a, b; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h index 4505775b224c9..f3ce9e9f1ad44 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h @@ -48,7 +48,7 @@ /* The GDC is capable of higher internal precision than the parameter data structures */ #define HRT_GDC_COORD_SCALE_BITS 6 -#define HRT_GDC_COORD_SCALE (1 << HRT_GDC_COORD_SCALE_BITS) +#define HRT_GDC_COORD_SCALE BIT(HRT_GDC_COORD_SCALE_BITS) typedef enum { GDC_CH0_ID = 0, @@ -63,28 +63,27 @@ typedef enum { } gdc_bits_per_pixel_t; typedef struct gdc_scale_param_mem_s { - uint16_t params[N_GDC_PARAM]; - uint16_t ipx_start_array[N_GDC_PARAM]; - uint16_t ibuf_offset[N_GDC_PARAM]; - uint16_t obuf_offset[N_GDC_PARAM]; + u16 params[N_GDC_PARAM]; + u16 ipx_start_array[N_GDC_PARAM]; + u16 ibuf_offset[N_GDC_PARAM]; + u16 obuf_offset[N_GDC_PARAM]; } gdc_scale_param_mem_t; typedef struct gdc_warp_param_mem_s { - uint32_t origin_x; - uint32_t origin_y; - uint32_t in_addr_offset; - uint32_t in_block_width; - uint32_t in_block_height; - uint32_t p0_x; - uint32_t p0_y; - uint32_t p1_x; - uint32_t p1_y; - uint32_t p2_x; - uint32_t p2_y; - uint32_t p3_x; - uint32_t p3_y; - uint32_t padding[3]; + u32 origin_x; + u32 origin_y; + u32 in_addr_offset; + u32 in_block_width; + u32 in_block_height; + u32 p0_x; + u32 p0_y; + u32 p1_x; + u32 p1_y; + u32 p2_x; + u32 p2_y; + u32 p3_x; + u32 p3_y; + u32 padding[3]; } gdc_warp_param_mem_t; - #endif /* __GDC_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h index 30ad77059d93c..1c1b0667a53bf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h @@ -81,5 +81,4 @@ #define _REG_GP_SYNCGEN_FRAME_CNT_ADDR 0x00090090 #define _REG_GP_SOFT_RESET_ADDR 0x00090094 - #endif /* __GP_DEVICE_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h index 7e05d7d880d15..e4b9daa2d062a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h @@ -31,15 +31,15 @@ */ #define ISP_HIST_ALIGNMENT_LOG2 2 -#define HMEM_SIZE_LOG2 (ISP_HIST_ADDRESS_BITS-ISP_HIST_ALIGNMENT_LOG2) +#define HMEM_SIZE_LOG2 (ISP_HIST_ADDRESS_BITS - ISP_HIST_ALIGNMENT_LOG2) #define HMEM_SIZE ISP_HIST_DEPTH -#define HMEM_UNIT_SIZE (HMEM_SIZE/ISP_HIST_COMPONENTS) +#define HMEM_UNIT_SIZE (HMEM_SIZE / ISP_HIST_COMPONENTS) #define HMEM_UNIT_COUNT ISP_HIST_COMPONENTS #define HMEM_RANGE_LOG2 ISP_HIST_WIDTH -#define HMEM_RANGE (1UL< debug_data_ptr->tail) { size_t delta = remote_tail - debug_data_ptr->tail; - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); } else if (remote_tail < debug_data_ptr->tail) { size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); + + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR, (void *)&debug_data_ptr->buf[0], remote_tail * sizeof(uint32_t)); } /* else we are up to date */ debug_data_ptr->tail = remote_tail; } STORAGE_CLASS_DEBUG_C void debug_synch_queue_isp(void) { - uint32_t remote_tail = isp_dmem_load_uint32(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_TAIL_ADDR); + u32 remote_tail = isp_dmem_load_uint32(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_TAIL_ADDR); /* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ if (remote_tail > debug_data_ptr->tail) { size_t delta = remote_tail - debug_data_ptr->tail; - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); } else if (remote_tail < debug_data_ptr->tail) { size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); + + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR, (void *)&debug_data_ptr->buf[0], remote_tail * sizeof(uint32_t)); } /* else we are up to date */ debug_data_ptr->tail = remote_tail; } STORAGE_CLASS_DEBUG_C void debug_synch_queue_ddr(void) { - uint32_t remote_tail; + u32 remote_tail; mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_TAIL_DDR_ADDR, &remote_tail, sizeof(uint32_t)); /* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ if (remote_tail > debug_data_ptr->tail) { size_t delta = remote_tail - debug_data_ptr->tail; - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); + + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); } else if (remote_tail < debug_data_ptr->tail) { size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail*sizeof(uint32_t), (void *)&(debug_data_ptr->buf[debug_data_ptr->tail]), delta*sizeof(uint32_t)); - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR, (void *)&(debug_data_ptr->buf[0]), remote_tail*sizeof(uint32_t)); + + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR, (void *)&debug_data_ptr->buf[0], remote_tail * sizeof(uint32_t)); } /* else we are up to date */ debug_data_ptr->tail = remote_tail; } #endif /* __DEBUG_PRIVATE_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c index 770db7dff5d3b..265dfdd653c6f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c @@ -28,7 +28,7 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) hrt_data tmp; assert(ID < N_DMA_ID); - assert(state != NULL); + assert(state); tmp = dma_reg_load(ID, DMA_COMMAND_FSM_REG_IDX); //reg [3:0] : flags error [3], stall, run, idle [0] @@ -39,9 +39,9 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) state->fsm_command_run = tmp & 0x2; state->fsm_command_stalling = tmp & 0x4; state->fsm_command_error = tmp & 0x8; - state->last_command_channel = (tmp>>10 & 0x1F); - state->last_command_param = (tmp>>15 & 0x0F); - tmp = (tmp>>4) & 0x3F; + state->last_command_channel = (tmp >> 10 & 0x1F); + state->last_command_param = (tmp >> 15 & 0x0F); + tmp = (tmp >> 4) & 0x3F; /* state->last_command = (dma_commands_t)tmp; */ /* if the enumerator is made non-linear */ /* AM: the list below does not cover all the cases*/ @@ -225,7 +225,7 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) _DMA_FSM_GROUP_FSM_WR_IDX)); for (i = 0; i < HIVE_ISP_NUM_DMA_CONNS; i++) { - dma_port_state_t *port = &(state->port_states[i]); + dma_port_state_t *port = &state->port_states[i]; tmp = dma_reg_load(ID, DMA_DEV_INFO_REG_IDX(0, i)); port->req_cs = ((tmp & 0x1) != 0); @@ -250,7 +250,7 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) } for (i = 0; i < HIVE_DMA_NUM_CHANNELS; i++) { - dma_channel_state_t *ch = &(state->channel_states[i]); + dma_channel_state_t *ch = &state->channel_states[i]; ch->connection = DMA_GET_CONNECTION(dma_reg_load(ID, DMA_CHANNEL_PARAM_REG_IDX(i, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h index ab631e6f64b50..2c30925c8f514 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h @@ -189,7 +189,7 @@ struct dma_state_s { int fsm_ctrl_pack_extension; int pack_idle; int pack_run; - int pack_stalling; + int pack_stalling; int pack_error; int pack_cnt_height; int pack_src_cnt_width; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h index ba54b1f0467b7..5b4d7c02f1bae 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h @@ -26,16 +26,16 @@ STORAGE_CLASS_DMA_C void dma_reg_store(const dma_ID_t ID, const hrt_data value) { assert(ID < N_DMA_ID); - assert(DMA_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(DMA_BASE[ID] + reg*sizeof(hrt_data), value); + assert(DMA_BASE[ID] != (hrt_address) - 1); + ia_css_device_store_uint32(DMA_BASE[ID] + reg * sizeof(hrt_data), value); } STORAGE_CLASS_DMA_C hrt_data dma_reg_load(const dma_ID_t ID, const unsigned int reg) { assert(ID < N_DMA_ID); - assert(DMA_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(DMA_BASE[ID] + reg*sizeof(hrt_data)); + assert(DMA_BASE[ID] != (hrt_address) - 1); + return ia_css_device_load_uint32(DMA_BASE[ID] + reg * sizeof(hrt_data)); } #endif /* __DMA_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h index bcfb734c2ed34..9af2d46b55970 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h @@ -26,7 +26,7 @@ STORAGE_CLASS_EVENT_C void event_wait_for(const event_ID_t ID) { assert(ID < N_EVENT_ID); - assert(event_source_addr[ID] != ((hrt_address)-1)); + assert(event_source_addr[ID] != ((hrt_address) - 1)); (void)ia_css_device_load_uint32(event_source_addr[ID]); return; } @@ -42,7 +42,7 @@ STORAGE_CLASS_EVENT_C void cnd_event_wait_for(const event_ID_t ID, STORAGE_CLASS_EVENT_C hrt_data event_receive_token(const event_ID_t ID) { assert(ID < N_EVENT_ID); - assert(event_source_addr[ID] != ((hrt_address)-1)); + assert(event_source_addr[ID] != ((hrt_address) - 1)); return ia_css_device_load_uint32(event_source_addr[ID]); } @@ -50,15 +50,16 @@ STORAGE_CLASS_EVENT_C void event_send_token(const event_ID_t ID, const hrt_data token) { assert(ID < N_EVENT_ID); - assert(event_sink_addr[ID] != ((hrt_address)-1)); + assert(event_sink_addr[ID] != ((hrt_address) - 1)); ia_css_device_store_uint32(event_sink_addr[ID], token); } STORAGE_CLASS_EVENT_C bool is_event_pending(const event_ID_t ID) { hrt_data value; + assert(ID < N_EVENT_ID); - assert(event_source_query_addr[ID] != ((hrt_address)-1)); + assert(event_source_query_addr[ID] != ((hrt_address) - 1)); value = ia_css_device_load_uint32(event_source_query_addr[ID]); return !_hrt_get_bit(value, EVENT_QUERY_BIT); } @@ -66,8 +67,9 @@ STORAGE_CLASS_EVENT_C bool is_event_pending(const event_ID_t ID) STORAGE_CLASS_EVENT_C bool can_event_send_token(const event_ID_t ID) { hrt_data value; + assert(ID < N_EVENT_ID); - assert(event_sink_query_addr[ID] != ((hrt_address)-1)); + assert(event_sink_query_addr[ID] != ((hrt_address) - 1)); value = ia_css_device_load_uint32(event_sink_query_addr[ID]); return !_hrt_get_bit(value, EVENT_QUERY_BIT); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c index 1bf292401adc1..bc84a4b298499 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c @@ -38,7 +38,7 @@ STORAGE_CLASS_FIFO_MONITOR_DATA unsigned int FIFO_SWITCH_ADDR[N_FIFO_SWITCH] = { #include "fifo_monitor_private.h" #endif /* __INLINE_FIFO_MONITOR__ */ -static inline bool fifo_monitor_status_valid ( +static inline bool fifo_monitor_status_valid( const fifo_monitor_ID_t ID, const unsigned int reg, const unsigned int port_id); @@ -48,14 +48,13 @@ static inline bool fifo_monitor_status_accept( const unsigned int reg, const unsigned int port_id); - void fifo_channel_get_state( const fifo_monitor_ID_t ID, const fifo_channel_t channel_id, fifo_channel_state_t *state) { assert(channel_id < N_FIFO_CHANNEL); - assert(state != NULL); + assert(state); switch (channel_id) { case FIFO_CHANNEL_ISP0_TO_SP0: @@ -235,6 +234,7 @@ void fifo_channel_get_state( ISP_STR_MON_PORT_SND_GPD); { hrt_data value = ia_css_device_load_uint32(0x0000000000380014ULL); + state->fifo_valid = !_hrt_get_bit(value, 0); state->sink_accept = false; /* no monitor connected */ } @@ -242,6 +242,7 @@ void fifo_channel_get_state( case FIFO_CHANNEL_HOST0_TO_ISP0: { hrt_data value = ia_css_device_load_uint32(0x000000000038001CULL); + state->fifo_valid = false; /* no monitor connected */ state->sink_accept = !_hrt_get_bit(value, 0); } @@ -429,6 +430,7 @@ void fifo_channel_get_state( SP_STR_MON_PORT_SND_GPD); { hrt_data value = ia_css_device_load_uint32(0x0000000000380010ULL); + state->fifo_valid = !_hrt_get_bit(value, 0); state->sink_accept = false; /* no monitor connected */ } @@ -436,6 +438,7 @@ void fifo_channel_get_state( case FIFO_CHANNEL_HOST0_TO_SP0: { hrt_data value = ia_css_device_load_uint32(0x0000000000380018ULL); + state->fifo_valid = false; /* no monitor connected */ state->sink_accept = !_hrt_get_bit(value, 0); } @@ -511,7 +514,7 @@ void fifo_switch_get_state( assert(ID == FIFO_MONITOR0_ID); assert(switch_id < N_FIFO_SWITCH); - assert(state != NULL); + assert(state); (void)ID; @@ -532,21 +535,21 @@ void fifo_monitor_get_state( fifo_switch_t sw_id; assert(ID < N_FIFO_MONITOR_ID); - assert(state != NULL); + assert(state); for (ch_id = 0; ch_id < N_FIFO_CHANNEL; ch_id++) { fifo_channel_get_state(ID, ch_id, - &(state->fifo_channels[ch_id])); + &state->fifo_channels[ch_id]); } for (sw_id = 0; sw_id < N_FIFO_SWITCH; sw_id++) { fifo_switch_get_state(ID, sw_id, - &(state->fifo_switches[sw_id])); + &state->fifo_switches[sw_id]); } return; } -static inline bool fifo_monitor_status_valid ( +static inline bool fifo_monitor_status_valid( const fifo_monitor_ID_t ID, const unsigned int reg, const unsigned int port_id) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h index d58cd7d1828d2..a85da30e476ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h @@ -34,7 +34,7 @@ STORAGE_CLASS_FIFO_MONITOR_C void fifo_switch_set( const hrt_data sel) { assert(ID == FIFO_MONITOR0_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); assert(switch_id < N_FIFO_SWITCH); (void)ID; @@ -48,22 +48,21 @@ STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_switch_get( const fifo_switch_t switch_id) { assert(ID == FIFO_MONITOR0_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); assert(switch_id < N_FIFO_SWITCH); (void)ID; return gp_device_reg_load(GP_DEVICE0_ID, FIFO_SWITCH_ADDR[switch_id]); } - STORAGE_CLASS_FIFO_MONITOR_C void fifo_monitor_reg_store( const fifo_monitor_ID_t ID, const unsigned int reg, const hrt_data value) { assert(ID < N_FIFO_MONITOR_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(FIFO_MONITOR_BASE[ID] + reg*sizeof(hrt_data), value); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); + ia_css_device_store_uint32(FIFO_MONITOR_BASE[ID] + reg * sizeof(hrt_data), value); return; } @@ -72,8 +71,8 @@ STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_monitor_reg_load( const unsigned int reg) { assert(ID < N_FIFO_MONITOR_ID); - assert(FIFO_MONITOR_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(FIFO_MONITOR_BASE[ID] + reg*sizeof(hrt_data)); + assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); + return ia_css_device_load_uint32(FIFO_MONITOR_BASE[ID] + reg * sizeof(hrt_data)); } #endif /* __FIFO_MONITOR_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c index 1966b147f8ab3..83df4ac25c4ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c @@ -31,7 +31,6 @@ static inline hrt_data gdc_reg_load( const gdc_ID_t ID, const unsigned int reg); - #ifndef __INLINE_GDC__ #include "gdc_private.h" #endif /* __INLINE_GDC__ */ @@ -46,7 +45,7 @@ void gdc_lut_store( unsigned int i, lut_offset = HRT_GDC_LUT_IDX; assert(ID < N_GDC_ID); - assert(HRT_GDC_LUT_COEFF_OFFSET <= (4*sizeof(hrt_data))); + assert(HRT_GDC_LUT_COEFF_OFFSET <= (4 * sizeof(hrt_data))); for (i = 0; i < HRT_GDC_N; i++) { hrt_data entry_0 = data[0][i] & HRT_GDC_BCI_COEF_MASK; @@ -106,7 +105,6 @@ int gdc_get_unity( return (int)(1UL << HRT_GDC_FRAC_BITS); } - /* * Local function implementations */ @@ -115,7 +113,7 @@ static inline void gdc_reg_store( const unsigned int reg, const hrt_data value) { - ia_css_device_store_uint32(GDC_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data), value); return; } @@ -123,5 +121,5 @@ static inline hrt_data gdc_reg_load( const gdc_ID_t ID, const unsigned int reg) { - return ia_css_device_load_uint32(GDC_BASE[ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data)); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c index da88aa3af6644..118839b348320 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c @@ -24,7 +24,7 @@ void gp_device_get_state( gp_device_state_t *state) { assert(ID < N_GP_DEVICE_ID); - assert(state != NULL); + assert(state); state->syncgen_enable = gp_device_reg_load(ID, _REG_GP_SYNCGEN_ENABLE_ADDR); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h index 7c0362c29411a..0a5b15ec35106 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h @@ -27,7 +27,7 @@ STORAGE_CLASS_GP_DEVICE_C void gp_device_reg_store( const hrt_data value) { assert(ID < N_GP_DEVICE_ID); - assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); + assert(GP_DEVICE_BASE[ID] != (hrt_address) - 1); assert((reg_addr % sizeof(hrt_data)) == 0); ia_css_device_store_uint32(GP_DEVICE_BASE[ID] + reg_addr, value); return; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c index b6b1344786b15..2e205b168c17d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c @@ -27,7 +27,7 @@ static uint32_t gp_timer_reg_load(uint32_t reg); static void -gp_timer_reg_store(uint32_t reg, uint32_t value); +gp_timer_reg_store(u32 reg, uint32_t value); static uint32_t gp_timer_reg_load(uint32_t reg) @@ -38,7 +38,7 @@ gp_timer_reg_load(uint32_t reg) } static void -gp_timer_reg_store(uint32_t reg, uint32_t value) +gp_timer_reg_store(u32 reg, uint32_t value) { ia_css_device_store_uint32((GP_TIMER_BASE + (reg * sizeof(uint32_t))), diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h index 19ce35d87291e..4d5961c78c168 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h @@ -28,11 +28,10 @@ /*Register offsets for timers [1,7] can be obtained * by adding (GP_TIMERx_ID * sizeof(uint32_t))*/ #define _REG_GP_TIMER_ENABLE_ID(timer_id) HIVE_GP_TIMER_ENABLE_REG_IDX(timer_id) -#define _REG_GP_TIMER_VALUE_ID(timer_id) HIVE_GP_TIMER_VALUE_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) +#define _REG_GP_TIMER_VALUE_ID(timer_id) HIVE_GP_TIMER_VALUE_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) #define _REG_GP_TIMER_COUNT_TYPE_ID(timer_id) HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) #define _REG_GP_TIMER_SIGNAL_SELECT_ID(timer_id) HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer_id, HIVE_GP_TIMER_NUM_COUNTERS) - #define _REG_GP_TIMER_IRQ_TRIGGER_VALUE_ID(irq_id) HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS) #define _REG_GP_TIMER_IRQ_TIMER_SELECT_ID(irq_id) \ @@ -41,5 +40,4 @@ #define _REG_GP_TIMER_IRQ_ENABLE_ID(irq_id) \ HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq_id, HIVE_GP_TIMER_NUM_COUNTERS, HIVE_GP_TIMER_NUM_IRQS) - #endif /*__GP_TIMER_LOCAL_H_INCLUDED__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h index b6ebf34eaa9df..f01d5833d1249 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h @@ -27,8 +27,8 @@ STORAGE_CLASS_GPIO_C void gpio_reg_store( const hrt_data value) { OP___assert(ID < N_GPIO_ID); -OP___assert(GPIO_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(GPIO_BASE[ID] + reg*sizeof(hrt_data), value); +OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); + ia_css_device_store_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data), value); return; } @@ -37,8 +37,8 @@ STORAGE_CLASS_GPIO_C hrt_data gpio_reg_load( const unsigned int reg) { OP___assert(ID < N_GPIO_ID); -OP___assert(GPIO_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(GPIO_BASE[ID] + reg*sizeof(hrt_data)); +OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); + return ia_css_device_load_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data)); } #endif /* __GPIO_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h index 32a780380e117..a4ffa5a8fed35 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h @@ -24,7 +24,7 @@ STORAGE_CLASS_HMEM_C size_t sizeof_hmem( { assert(ID < N_HMEM_ID); (void)ID; - return HMEM_SIZE*sizeof(hmem_data_t); + return HMEM_SIZE * sizeof(hmem_data_t); } #endif /* __HMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c index 0e1ca995fb06f..8efbc3afff731 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c @@ -38,7 +38,7 @@ const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID] = { INPUT_FORMATTER2_SRST_MASK, INPUT_FORMATTER3_SRST_MASK}; -const uint8_t HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID] = { +const u8 HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID] = { HIVE_INPUT_SWITCH_SELECT_IF_PRIM, HIVE_INPUT_SWITCH_SELECT_IF_PRIM, HIVE_INPUT_SWITCH_SELECT_IF_SEC, @@ -98,7 +98,7 @@ void input_formatter_get_switch_state( input_formatter_switch_state_t *state) { assert(ID < N_INPUT_FORMATTER_ID); - assert(state != NULL); + assert(state); /* We'll change this into an intelligent function to get switch info per IF */ (void)ID; @@ -122,7 +122,7 @@ void input_formatter_get_state( input_formatter_state_t *state) { assert(ID < N_INPUT_FORMATTER_ID); - assert(state != NULL); + assert(state); /* state->reset = input_formatter_reg_load(ID, HIVE_IF_RESET_ADDRESS); @@ -203,7 +203,7 @@ void input_formatter_bin_get_state( input_formatter_bin_state_t *state) { assert(ID < N_INPUT_FORMATTER_ID); - assert(state != NULL); + assert(state); state->reset = input_formatter_reg_load(ID, HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h index 3e00b5e6bad7b..0fc9f759c44e0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h @@ -103,15 +103,15 @@ struct input_formatter_state_s { }; struct input_formatter_bin_state_s { - uint32_t reset; - uint32_t input_endianness; - uint32_t output_endianness; - uint32_t bitswap; - uint32_t block_synch; - uint32_t packet_synch; - uint32_t readpostwrite_synch; - uint32_t is_2ppc; - uint32_t en_status_update; + u32 reset; + u32 input_endianness; + u32 output_endianness; + u32 bitswap; + u32 block_synch; + u32 packet_synch; + u32 readpostwrite_synch; + u32 is_2ppc; + u32 en_status_update; }; static const unsigned int input_formatter_alignment[N_INPUT_FORMATTER_ID] = { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c index 2515e162828fe..9202cfedd94fd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c @@ -29,7 +29,7 @@ #define ZERO (0x0) #define ONE (1U) -static const ib_buffer_t IB_BUFFER_NULL = {0 ,0, 0 }; +static const ib_buffer_t IB_BUFFER_NULL = {0, 0, 0 }; static input_system_error_t input_system_configure_channel( const channel_cfg_t channel); @@ -47,39 +47,37 @@ static void input_system_network_rst(const input_system_ID_t ID); static void capture_unit_configure( const input_system_ID_t ID, const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg); + const ib_buffer_t * const cfg); static void acquisition_unit_configure( const input_system_ID_t ID, const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg); + const ib_buffer_t * const cfg); static void ctrl_unit_configure( const input_system_ID_t ID, const sub_system_ID_t sub_id, - const ctrl_unit_cfg_t* const cfg); + const ctrl_unit_cfg_t * const cfg); static void input_system_network_configure( const input_system_ID_t ID, - const input_system_network_cfg_t * const cfg); + const input_system_network_cfg_t * const cfg); // MW: CSI is previously named as "rx" short for "receiver" static input_system_error_t set_csi_cfg( - csi_cfg_t* const lhs, - const csi_cfg_t* const rhs, - input_system_config_flags_t* const flags); + csi_cfg_t * const lhs, + const csi_cfg_t * const rhs, + input_system_config_flags_t * const flags); static input_system_error_t set_source_type( - input_system_source_t* const lhs, - const input_system_source_t rhs, - input_system_config_flags_t* const flags); + input_system_source_t * const lhs, + const input_system_source_t rhs, + input_system_config_flags_t * const flags); static input_system_error_t input_system_multiplexer_cfg( - input_system_multiplex_t* const lhs, + input_system_multiplex_t * const lhs, const input_system_multiplex_t rhs, - input_system_config_flags_t* const flags); - - + input_system_config_flags_t * const flags); static inline void capture_unit_get_state( const input_system_ID_t ID, @@ -114,7 +112,7 @@ static void input_switch_rst(const gp_device_ID_t ID); static void input_switch_cfg( const gp_device_ID_t ID, - const input_switch_cfg_t * const cfg + const input_switch_cfg_t * const cfg ); void input_system_get_state( @@ -124,7 +122,7 @@ void input_system_get_state( sub_system_ID_t sub_id; assert(ID < N_INPUT_SYSTEM_ID); - assert(state != NULL); + assert(state); state->str_multicastA_sel = input_system_sub_system_reg_load(ID, GPREGS_UNIT0_ID, @@ -162,15 +160,15 @@ void input_system_get_state( for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { capture_unit_get_state(ID, sub_id, - &(state->capture_unit[sub_id - CAPTURE_UNIT0_ID])); + &state->capture_unit[sub_id - CAPTURE_UNIT0_ID]); } for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { acquisition_unit_get_state(ID, sub_id, - &(state->acquisition_unit[sub_id - ACQUISITION_UNIT0_ID])); + &state->acquisition_unit[sub_id - ACQUISITION_UNIT0_ID]); } for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { ctrl_unit_get_state(ID, sub_id, - &(state->ctrl_unit_state[sub_id - CTRL_UNIT0_ID])); + &state->ctrl_unit_state[sub_id - CTRL_UNIT0_ID]); } return; @@ -184,7 +182,7 @@ void receiver_get_state( unsigned int ch_id; assert(ID < N_RX_ID); - assert(state != NULL); + assert(state); state->fs_to_ls_delay = (uint8_t)receiver_reg_load(ID, _HRT_CSS_RECEIVER_FS_TO_LS_DELAY_REG_IDX); @@ -211,11 +209,11 @@ void receiver_get_state( for (port_id = (enum mipi_port_id)0; port_id < N_MIPI_PORT_ID; port_id++) { mipi_port_get_state(ID, port_id, - &(state->mipi_port_state[port_id])); + &state->mipi_port_state[port_id]); } - for (ch_id = (unsigned int)0; ch_id < N_RX_CHANNEL_ID; ch_id++) { + for (ch_id = 0U; ch_id < N_RX_CHANNEL_ID; ch_id++) { rx_channel_get_state(ID, ch_id, - &(state->rx_channel_state[ch_id])); + &state->rx_channel_state[ch_id]); } state->be_gsp_acc_ovl = receiver_reg_load(ID, @@ -283,13 +281,13 @@ void receiver_set_compression( val = (((uint8_t)pred) << 3) | comp; switch (ch_id) { - case 0: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); + case 0: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); break; - case 1: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); + case 1: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); break; - case 2: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); + case 2: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); break; - case 3: addr = ((field_id<6)?_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX:_HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); + case 3: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); break; default: /* should not happen */ @@ -297,7 +295,7 @@ void receiver_set_compression( return; } - reg = ((field_id < 6)?(val << (field_id * 5)):(val << ((field_id - 6) * 5))); + reg = ((field_id < 6) ? (val << (field_id * 5)) : (val << ((field_id - 6) * 5))); receiver_reg_store(ID, addr, reg); return; @@ -365,7 +363,7 @@ static inline void capture_unit_get_state( capture_unit_state_t *state) { assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); - assert(state != NULL); + assert(state); state->StartMode = input_system_sub_system_reg_load(ID, sub_id, @@ -427,7 +425,7 @@ static inline void acquisition_unit_get_state( acquisition_unit_state_t *state) { assert(sub_id == ACQUISITION_UNIT0_ID); - assert(state != NULL); + assert(state); state->Start_Addr = input_system_sub_system_reg_load(ID, sub_id, @@ -477,7 +475,7 @@ static inline void ctrl_unit_get_state( ctrl_unit_state_t *state) { assert(sub_id == CTRL_UNIT0_ID); - assert(state != NULL); + assert(state); state->captA_start_addr = input_system_sub_system_reg_load(ID, sub_id, @@ -563,7 +561,7 @@ static inline void mipi_port_get_state( assert(ID < N_RX_ID); assert(port_ID < N_MIPI_PORT_ID); - assert(state != NULL); + assert(state); state->device_ready = receiver_port_reg_load(ID, port_ID, _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); @@ -583,8 +581,8 @@ static inline void mipi_port_get_state( port_ID, _HRT_CSS_RECEIVER_RX_COUNT_REG_IDX); for (i = 0; i < MIPI_4LANE_CFG ; i++) { - state->lane_sync_count[i] = (uint8_t)((state->sync_count)>>(i*8)); - state->lane_rx_count[i] = (uint8_t)((state->rx_count)>>(i*8)); + state->lane_sync_count[i] = (uint8_t)((state->sync_count) >> (i * 8)); + state->lane_rx_count[i] = (uint8_t)((state->rx_count) >> (i * 8)); } return; @@ -599,7 +597,7 @@ static inline void rx_channel_get_state( assert(ID < N_RX_ID); assert(ch_id < N_RX_CHANNEL_ID); - assert(state != NULL); + assert(state); switch (ch_id) { case 0: @@ -630,12 +628,14 @@ static inline void rx_channel_get_state( /* See Table 7.1.17,..., 7.1.24 */ for (i = 0; i < 6; i++) { - uint8_t val = (uint8_t)((state->comp_scheme0)>>(i*5)) & 0x1f; + u8 val = (uint8_t)((state->comp_scheme0) >> (i * 5)) & 0x1f; + state->comp[i] = (mipi_compressor_t)(val & 0x07); state->pred[i] = (mipi_predictor_t)((val & 0x18) >> 3); } for (i = 6; i < N_MIPI_FORMAT_CUSTOM; i++) { - uint8_t val = (uint8_t)((state->comp_scheme0)>>((i-6)*5)) & 0x1f; + u8 val = (uint8_t)((state->comp_scheme0) >> ((i - 6) * 5)) & 0x1f; + state->comp[i] = (mipi_compressor_t)(val & 0x07); state->pred[i] = (mipi_predictor_t)((val & 0x18) >> 3); } @@ -739,7 +739,6 @@ static void input_switch_rst(const gp_device_ID_t ID) // Initialize the data&hsync LUT. for (addr = _REG_GP_IFMT_input_switch_lut_reg0; addr <= _REG_GP_IFMT_input_switch_lut_reg7; addr += SIZEOF_HRT_REG) { - gp_device_reg_store(ID, addr, ZERO); } @@ -753,12 +752,12 @@ static void input_switch_rst(const gp_device_ID_t ID) static void input_switch_cfg( const gp_device_ID_t ID, - const input_switch_cfg_t * const cfg) + const input_switch_cfg_t * const cfg) { int addr_offset; assert(ID < N_GP_DEVICE_ID); - assert(cfg != NULL); + assert(cfg); // Initialize the data&hsync LUT. for (addr_offset = 0; addr_offset < N_RX_CHANNEL_ID * 2; addr_offset++) { @@ -776,7 +775,6 @@ static void input_switch_cfg( return; } - static void input_system_network_rst(const input_system_ID_t ID) { unsigned int sub_id; @@ -849,14 +847,14 @@ input_system_error_t input_system_configuration_reset(void) // Reset IRQ_CTRLs. // Reset configuration data structures. - for (i = 0; i < N_CHANNELS; i++ ) { + for (i = 0; i < N_CHANNELS; i++) { config.ch_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; config.target_isp_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; config.target_sp_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; config.target_strm2mem_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; } - for (i = 0; i < N_CSI_PORTS; i++ ) { + for (i = 0; i < N_CSI_PORTS; i++) { config.csi_buffer_flags[i] = INPUT_SYSTEM_CFG_FLAG_RESET; config.multicast[i] = INPUT_SYSTEM_CFG_FLAG_RESET; } @@ -879,23 +877,23 @@ static input_system_error_t input_system_configure_channel( { input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR; // Check if channel is not already configured. - if (config.ch_flags[channel.ch_id] & INPUT_SYSTEM_CFG_FLAG_SET){ + if (config.ch_flags[channel.ch_id] & INPUT_SYSTEM_CFG_FLAG_SET) { return INPUT_SYSTEM_ERR_CHANNEL_ALREADY_SET; } else { - switch (channel.source_type){ - case INPUT_SYSTEM_SOURCE_SENSOR : + switch (channel.source_type) { + case INPUT_SYSTEM_SOURCE_SENSOR: error = input_system_configure_channel_sensor(channel); break; - case INPUT_SYSTEM_SOURCE_TPG : + case INPUT_SYSTEM_SOURCE_TPG: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; - case INPUT_SYSTEM_SOURCE_PRBS : + case INPUT_SYSTEM_SOURCE_PRBS: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; - case INPUT_SYSTEM_SOURCE_FIFO : + case INPUT_SYSTEM_SOURCE_FIFO: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; - default : + default: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; } @@ -925,40 +923,39 @@ static input_system_error_t input_system_configure_channel( // Function that partitions input buffer space with determining addresses. static input_system_error_t input_buffer_configuration(void) { - uint32_t current_address = 0; - uint32_t unallocated_memory = IB_CAPACITY_IN_WORDS; + u32 current_address = 0; + u32 unallocated_memory = IB_CAPACITY_IN_WORDS; - ib_buffer_t candidate_buffer_acq = IB_BUFFER_NULL; - uint32_t size_requested; - input_system_config_flags_t acq_already_specified = INPUT_SYSTEM_CFG_FLAG_RESET; + ib_buffer_t candidate_buffer_acq = IB_BUFFER_NULL; + u32 size_requested; + input_system_config_flags_t acq_already_specified = INPUT_SYSTEM_CFG_FLAG_RESET; input_system_csi_port_t port; - for (port = INPUT_SYSTEM_PORT_A; port < N_INPUT_SYSTEM_PORTS; port++) { + for (port = INPUT_SYSTEM_PORT_A; port < N_INPUT_SYSTEM_PORTS; port++) { csi_cfg_t source = config.csi_value[port];//.csi_cfg; - if ( config.csi_flags[port] & INPUT_SYSTEM_CFG_FLAG_SET) { - + if (config.csi_flags[port] & INPUT_SYSTEM_CFG_FLAG_SET) { // Check and set csi buffer in input buffer. switch (source.buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE : - case INPUT_SYSTEM_XMEM_ACQUIRE : + case INPUT_SYSTEM_FIFO_CAPTURE: + case INPUT_SYSTEM_XMEM_ACQUIRE: config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_BLOCKED; // Well, not used. break; - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : - case INPUT_SYSTEM_SRAM_BUFFERING : - case INPUT_SYSTEM_XMEM_BUFFERING : - case INPUT_SYSTEM_XMEM_CAPTURE : + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: + case INPUT_SYSTEM_SRAM_BUFFERING: + case INPUT_SYSTEM_XMEM_BUFFERING: + case INPUT_SYSTEM_XMEM_CAPTURE: size_requested = source.csi_buffer.mem_reg_size * source.csi_buffer.nof_mem_regs; if (source.csi_buffer.mem_reg_size > 0 - && source.csi_buffer.nof_mem_regs >0 + && source.csi_buffer.nof_mem_regs > 0 && size_requested <= unallocated_memory ) { config.csi_buffer[port].mem_reg_addr = current_address; config.csi_buffer[port].mem_reg_size = source.csi_buffer.mem_reg_size; config.csi_buffer[port].nof_mem_regs = source.csi_buffer.nof_mem_regs; current_address += size_requested; - unallocated_memory -= size_requested; + unallocated_memory -= size_requested; config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_SET; } else { config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; @@ -966,7 +963,7 @@ static input_system_error_t input_buffer_configuration(void) } break; - default : + default: config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; @@ -974,20 +971,20 @@ static input_system_error_t input_buffer_configuration(void) // Check acquisition buffer specified but set it later since it has to be unique. switch (source.buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE : - case INPUT_SYSTEM_SRAM_BUFFERING : - case INPUT_SYSTEM_XMEM_CAPTURE : + case INPUT_SYSTEM_FIFO_CAPTURE: + case INPUT_SYSTEM_SRAM_BUFFERING: + case INPUT_SYSTEM_XMEM_CAPTURE: // Nothing to do. break; - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : - case INPUT_SYSTEM_XMEM_BUFFERING : - case INPUT_SYSTEM_XMEM_ACQUIRE : + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: + case INPUT_SYSTEM_XMEM_BUFFERING: + case INPUT_SYSTEM_XMEM_ACQUIRE: if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_RESET) { size_requested = source.acquisition_buffer.mem_reg_size * source.acquisition_buffer.nof_mem_regs; if (source.acquisition_buffer.mem_reg_size > 0 - && source.acquisition_buffer.nof_mem_regs >0 + && source.acquisition_buffer.nof_mem_regs > 0 && size_requested <= unallocated_memory ) { candidate_buffer_acq = source.acquisition_buffer; @@ -1004,7 +1001,7 @@ static input_system_error_t input_buffer_configuration(void) } break; - default : + default: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; } @@ -1021,7 +1018,7 @@ static input_system_error_t input_buffer_configuration(void) config.acquisition_buffer_unique.mem_reg_size = candidate_buffer_acq.mem_reg_size; config.acquisition_buffer_unique.nof_mem_regs = candidate_buffer_acq.nof_mem_regs; current_address += size_requested; - unallocated_memory -= size_requested; + unallocated_memory -= size_requested; config.acquisition_buffer_unique_flags = INPUT_SYSTEM_CFG_FLAG_SET; assert(current_address <= IB_CAPACITY_IN_WORDS); @@ -1033,11 +1030,11 @@ static input_system_error_t input_buffer_configuration(void) static void capture_unit_configure( const input_system_ID_t ID, const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg) + const ib_buffer_t * const cfg) { assert(ID < N_INPUT_SYSTEM_ID); assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); // Commented part is always true. - assert(cfg != NULL); + assert(cfg); input_system_sub_system_reg_store(ID, sub_id, @@ -1055,15 +1052,14 @@ static void capture_unit_configure( return; } - static void acquisition_unit_configure( const input_system_ID_t ID, const sub_system_ID_t sub_id, - const ib_buffer_t* const cfg) + const ib_buffer_t * const cfg) { assert(ID < N_INPUT_SYSTEM_ID); assert(sub_id == ACQUISITION_UNIT0_ID); - assert(cfg != NULL); + assert(cfg); input_system_sub_system_reg_store(ID, sub_id, @@ -1081,15 +1077,14 @@ static void acquisition_unit_configure( return; } - static void ctrl_unit_configure( const input_system_ID_t ID, const sub_system_ID_t sub_id, - const ctrl_unit_cfg_t* const cfg) + const ctrl_unit_cfg_t * const cfg) { assert(ID < N_INPUT_SYSTEM_ID); assert(sub_id == CTRL_UNIT0_ID); - assert(cfg != NULL); + assert(cfg); input_system_sub_system_reg_store(ID, sub_id, @@ -1143,20 +1138,20 @@ static void ctrl_unit_configure( ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID, cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].nof_mem_regs); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID, + sub_id, + ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID, 0); return; } static void input_system_network_configure( const input_system_ID_t ID, - const input_system_network_cfg_t * const cfg) + const input_system_network_cfg_t * const cfg) { - uint32_t sub_id; + u32 sub_id; assert(ID < N_INPUT_SYSTEM_ID); - assert(cfg != NULL); + assert(cfg); // Set all 3 multicasts. input_system_sub_system_reg_store(ID, @@ -1182,14 +1177,14 @@ static void input_system_network_configure( for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { capture_unit_configure(ID, sub_id, - &(cfg->ctrl_unit_cfg[ID].buffer_mipi[sub_id - CAPTURE_UNIT0_ID])); + &cfg->ctrl_unit_cfg[ID].buffer_mipi[sub_id - CAPTURE_UNIT0_ID]); } // Set acquisition units. for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { acquisition_unit_configure(ID, sub_id, - &(cfg->ctrl_unit_cfg[sub_id - ACQUISITION_UNIT0_ID].buffer_acquire[sub_id - ACQUISITION_UNIT0_ID])); + &cfg->ctrl_unit_cfg[sub_id - ACQUISITION_UNIT0_ID].buffer_acquire[sub_id - ACQUISITION_UNIT0_ID]); } // No DMA configuration needed. Ctrl_unit will fully control it. @@ -1198,7 +1193,7 @@ static void input_system_network_configure( for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { ctrl_unit_configure(ID, sub_id, - &(cfg->ctrl_unit_cfg[sub_id - CTRL_UNIT0_ID])); + &cfg->ctrl_unit_cfg[sub_id - CTRL_UNIT0_ID]); } return; @@ -1212,16 +1207,14 @@ static input_system_error_t configuration_to_registers(void) assert(config.source_type_flags & INPUT_SYSTEM_CFG_FLAG_SET); switch (config.source_type) { - case INPUT_SYSTEM_SOURCE_SENSOR : + case INPUT_SYSTEM_SOURCE_SENSOR: // Determine stream multicasts setting based on the mode of csi_cfg_t. // AM: This should be moved towards earlier function call, e.g. in // the commit function. for (i = MIPI_PORT0_ID; i < N_MIPI_PORT_ID; i++) { if (config.csi_flags[i] & INPUT_SYSTEM_CFG_FLAG_SET) { - switch (config.csi_value[i].buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE: config.multicast[i] = INPUT_SYSTEM_CSI_BACKEND; break; @@ -1246,7 +1239,7 @@ static input_system_error_t configuration_to_registers(void) //break; } } else { - config.multicast[i]= INPUT_SYSTEM_DISCARD_ALL; + config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; } input_system_network_cfg.multicast_cfg[i] = config.multicast[i]; @@ -1268,18 +1261,18 @@ static input_system_error_t configuration_to_registers(void) //... break; - case INPUT_SYSTEM_SOURCE_TPG : + case INPUT_SYSTEM_SOURCE_TPG: break; - case INPUT_SYSTEM_SOURCE_PRBS : + case INPUT_SYSTEM_SOURCE_PRBS: break; - case INPUT_SYSTEM_SOURCE_FIFO : + case INPUT_SYSTEM_SOURCE_FIFO: break; - default : + default: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; @@ -1296,12 +1289,12 @@ static input_system_error_t configuration_to_registers(void) return INPUT_SYSTEM_ERR_NO_ERROR; } - // Function that applies the whole configuration. input_system_error_t input_system_configuration_commit(void) { // The last configuration step is to configure the input buffer. input_system_error_t error = input_buffer_configuration(); + if (error != INPUT_SYSTEM_ERR_NO_ERROR) { return error; } @@ -1317,12 +1310,10 @@ input_system_error_t input_system_configuration_commit(void) return INPUT_SYSTEM_ERR_NO_ERROR; } - - // FIFO input_system_error_t input_system_csi_fifo_channel_cfg( - uint32_t ch_id, + u32 ch_id, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, target_cfg2400_t target @@ -1330,13 +1321,13 @@ input_system_error_t input_system_csi_fifo_channel_cfg( { channel_cfg_t channel; - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; //channel.source channel.source_cfg.csi_cfg.csi_port = port; channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_FIFO_CAPTURE; - channel.source_cfg.csi_cfg.csi_buffer = IB_BUFFER_NULL; + channel.source_cfg.csi_cfg.csi_buffer = IB_BUFFER_NULL; channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; channel.source_cfg.csi_cfg.nof_xmem_buffers = 0; @@ -1344,27 +1335,26 @@ input_system_error_t input_system_csi_fifo_channel_cfg( return input_system_configure_channel(channel); } - input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( - uint32_t ch_id, - uint32_t nof_frames, + u32 ch_id, + u32 nof_frames, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, target_cfg2400_t target ) { channel_cfg_t channel; - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; //channel.source channel.source_cfg.csi_cfg.csi_port = port; channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; @@ -1373,30 +1363,29 @@ input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( return input_system_configure_channel(channel); } - // SRAM input_system_error_t input_system_csi_sram_channel_cfg( - uint32_t ch_id, + u32 ch_id, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, // uint32_t acq_mem_reg_size, // uint32_t acq_nof_mem_regs, - target_cfg2400_t target + target_cfg2400_t target ) { channel_cfg_t channel; - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; //channel.source channel.source_cfg.csi_cfg.csi_port = port; channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_SRAM_BUFFERING; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; channel.source_cfg.csi_cfg.acquisition_buffer = IB_BUFFER_NULL; channel.source_cfg.csi_cfg.nof_xmem_buffers = 0; @@ -1405,35 +1394,34 @@ input_system_error_t input_system_csi_sram_channel_cfg( return input_system_configure_channel(channel); } - //XMEM // Collects all parameters and puts them in channel_cfg_t. input_system_error_t input_system_csi_xmem_channel_cfg( - uint32_t ch_id, + u32 ch_id, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, - uint32_t acq_mem_reg_size, - uint32_t acq_nof_mem_regs, - target_cfg2400_t target, - uint32_t nof_xmem_buffers + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, + u32 acq_mem_reg_size, + u32 acq_nof_mem_regs, + target_cfg2400_t target, + uint32_t nof_xmem_buffers ) { channel_cfg_t channel; - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; //channel.source channel.source_cfg.csi_cfg.csi_port = port; channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_BUFFERING; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; - channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; + channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_xmem_buffers; @@ -1441,29 +1429,26 @@ input_system_error_t input_system_csi_xmem_channel_cfg( return input_system_configure_channel(channel); } - - - input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, + u32 ch_id, + u32 nof_frames, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t acq_mem_reg_size, - uint32_t acq_nof_mem_regs, - target_cfg2400_t target) + u32 acq_mem_reg_size, + u32 acq_nof_mem_regs, + target_cfg2400_t target) { channel_cfg_t channel; - channel.ch_id = ch_id; - channel.backend_ch = backend_ch; + channel.ch_id = ch_id; + channel.backend_ch = backend_ch; channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; //channel.source channel.source_cfg.csi_cfg.csi_port = port; channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_ACQUIRE; channel.source_cfg.csi_cfg.csi_buffer = IB_BUFFER_NULL; channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; - channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; + channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; @@ -1471,31 +1456,30 @@ input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( return input_system_configure_channel(channel); } - input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, + u32 ch_id, + u32 nof_frames, input_system_csi_port_t port, - uint32_t csi_mem_reg_size, - uint32_t csi_nof_mem_regs, - uint32_t acq_mem_reg_size, - uint32_t acq_nof_mem_regs, - target_cfg2400_t target) + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, + u32 acq_mem_reg_size, + u32 acq_nof_mem_regs, + target_cfg2400_t target) { channel_cfg_t channel; - channel.ch_id = ch_id; - //channel.backend_ch = backend_ch; + channel.ch_id = ch_id; + //channel.backend_ch = backend_ch; channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; //channel.source channel.source_cfg.csi_cfg.csi_port = port; - //channel.source_cfg.csi_cfg.backend_ch = backend_ch; + //channel.source_cfg.csi_cfg.backend_ch = backend_ch; channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_XMEM_CAPTURE; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; - channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; + channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_size = acq_mem_reg_size; - channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; + channel.source_cfg.csi_cfg.acquisition_buffer.nof_mem_regs = acq_nof_mem_regs; channel.source_cfg.csi_cfg.acquisition_buffer.mem_reg_addr = 0; channel.source_cfg.csi_cfg.nof_xmem_buffers = nof_frames; @@ -1503,18 +1487,16 @@ input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( return input_system_configure_channel(channel); } - - // Non - CSI input_system_error_t input_system_prbs_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames,//not used yet - uint32_t seed, - uint32_t sync_gen_width, - uint32_t sync_gen_height, - uint32_t sync_gen_hblank_cycles, - uint32_t sync_gen_vblank_cycles, + u32 ch_id, + u32 nof_frames,//not used yet + u32 seed, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, target_cfg2400_t target ) { @@ -1522,34 +1504,32 @@ input_system_error_t input_system_prbs_channel_cfg( (void)nof_frames; - channel.ch_id = ch_id; - channel.source_type= INPUT_SYSTEM_SOURCE_PRBS; + channel.ch_id = ch_id; + channel.source_type = INPUT_SYSTEM_SOURCE_PRBS; channel.source_cfg.prbs_cfg.seed = seed; - channel.source_cfg.prbs_cfg.sync_gen_cfg.width = sync_gen_width; - channel.source_cfg.prbs_cfg.sync_gen_cfg.height = sync_gen_height; + channel.source_cfg.prbs_cfg.sync_gen_cfg.width = sync_gen_width; + channel.source_cfg.prbs_cfg.sync_gen_cfg.height = sync_gen_height; channel.source_cfg.prbs_cfg.sync_gen_cfg.hblank_cycles = sync_gen_hblank_cycles; - channel.source_cfg.prbs_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; + channel.source_cfg.prbs_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; channel.target_cfg = target; return input_system_configure_channel(channel); } - - input_system_error_t input_system_tpg_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames,//not used yet - uint32_t x_mask, - uint32_t y_mask, - uint32_t x_delta, - uint32_t y_delta, - uint32_t xy_mask, - uint32_t sync_gen_width, - uint32_t sync_gen_height, - uint32_t sync_gen_hblank_cycles, - uint32_t sync_gen_vblank_cycles, + u32 ch_id, + u32 nof_frames,//not used yet + u32 x_mask, + u32 y_mask, + u32 x_delta, + u32 y_delta, + u32 xy_mask, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, target_cfg2400_t target ) { @@ -1557,7 +1537,7 @@ input_system_error_t input_system_tpg_channel_cfg( (void)nof_frames; - channel.ch_id = ch_id; + channel.ch_id = ch_id; channel.source_type = INPUT_SYSTEM_SOURCE_TPG; channel.source_cfg.tpg_cfg.x_mask = x_mask; @@ -1565,10 +1545,10 @@ input_system_error_t input_system_tpg_channel_cfg( channel.source_cfg.tpg_cfg.x_delta = x_delta; channel.source_cfg.tpg_cfg.y_delta = y_delta; channel.source_cfg.tpg_cfg.xy_mask = xy_mask; - channel.source_cfg.tpg_cfg.sync_gen_cfg.width = sync_gen_width; - channel.source_cfg.tpg_cfg.sync_gen_cfg.height = sync_gen_height; + channel.source_cfg.tpg_cfg.sync_gen_cfg.width = sync_gen_width; + channel.source_cfg.tpg_cfg.sync_gen_cfg.height = sync_gen_height; channel.source_cfg.tpg_cfg.sync_gen_cfg.hblank_cycles = sync_gen_hblank_cycles; - channel.source_cfg.tpg_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; + channel.source_cfg.tpg_cfg.sync_gen_cfg.vblank_cycles = sync_gen_vblank_cycles; channel.target_cfg = target; return input_system_configure_channel(channel); @@ -1576,15 +1556,16 @@ input_system_error_t input_system_tpg_channel_cfg( // MW: Don't use system specific names, (even in system specific files) "cfg2400" -> cfg input_system_error_t input_system_gpfifo_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, //not used yet + u32 ch_id, + u32 nof_frames, //not used yet + target_cfg2400_t target) { channel_cfg_t channel; (void)nof_frames; - channel.ch_id = ch_id; + channel.ch_id = ch_id; channel.source_type = INPUT_SYSTEM_SOURCE_FIFO; channel.target_cfg = target; @@ -1601,7 +1582,7 @@ input_system_error_t input_system_gpfifo_channel_cfg( static input_system_error_t input_system_configure_channel_sensor( const channel_cfg_t channel) { - const uint32_t port = channel.source_cfg.csi_cfg.csi_port; + const u32 port = channel.source_cfg.csi_cfg.csi_port; input_system_error_t status = INPUT_SYSTEM_ERR_NO_ERROR; input_system_multiplex_t mux; @@ -1611,16 +1592,15 @@ static input_system_error_t input_system_configure_channel_sensor( //check if port > N_INPUT_SYSTEM_MULTIPLEX - status = set_source_type(&(config.source_type), channel.source_type, &config.source_type_flags); + status = set_source_type(&config.source_type, channel.source_type, &config.source_type_flags); if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; // Check for conflicts on source (implicitly on multicast, capture unit and input buffer). - status = set_csi_cfg(&(config.csi_value[port]), &channel.source_cfg.csi_cfg, &(config.csi_flags[port])); + status = set_csi_cfg(&config.csi_value[port], &channel.source_cfg.csi_cfg, &config.csi_flags[port]); if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - - switch (channel.source_cfg.csi_cfg.buffering_mode){ + switch (channel.source_cfg.csi_cfg.buffering_mode) { case INPUT_SYSTEM_FIFO_CAPTURE: // Check for conflicts on mux. @@ -1635,7 +1615,7 @@ static input_system_error_t input_system_configure_channel_sensor( //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; break; - case INPUT_SYSTEM_SRAM_BUFFERING : + case INPUT_SYSTEM_SRAM_BUFFERING: // Check for conflicts on mux. mux = INPUT_SYSTEM_ACQUISITION_UNIT; @@ -1649,7 +1629,7 @@ static input_system_error_t input_system_configure_channel_sensor( //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; break; - case INPUT_SYSTEM_XMEM_BUFFERING : + case INPUT_SYSTEM_XMEM_BUFFERING: // Check for conflicts on mux. mux = INPUT_SYSTEM_ACQUISITION_UNIT; @@ -1663,16 +1643,16 @@ static input_system_error_t input_system_configure_channel_sensor( //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; break; - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING : + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; - case INPUT_SYSTEM_XMEM_CAPTURE : + case INPUT_SYSTEM_XMEM_CAPTURE: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; - case INPUT_SYSTEM_XMEM_ACQUIRE : + case INPUT_SYSTEM_XMEM_ACQUIRE: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; - default : + default: return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; break; } @@ -1681,13 +1661,13 @@ static input_system_error_t input_system_configure_channel_sensor( // Test flags and set structure. static input_system_error_t set_source_type( - input_system_source_t * const lhs, - const input_system_source_t rhs, - input_system_config_flags_t * const flags) + input_system_source_t * const lhs, + const input_system_source_t rhs, + input_system_config_flags_t * const flags) { // MW: Not enough asserts - assert(lhs != NULL); - assert(flags != NULL); + assert(lhs); + assert(flags); if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; @@ -1698,8 +1678,7 @@ static input_system_error_t set_source_type( // Check for consistency with already set value. if ((*lhs) == (rhs)) { return INPUT_SYSTEM_ERR_NO_ERROR; - } - else { + } else { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; } @@ -1716,18 +1695,17 @@ static input_system_error_t set_source_type( return INPUT_SYSTEM_ERR_NO_ERROR; } - // Test flags and set structure. static input_system_error_t set_csi_cfg( - csi_cfg_t* const lhs, - const csi_cfg_t* const rhs, - input_system_config_flags_t * const flags) + csi_cfg_t * const lhs, + const csi_cfg_t * const rhs, + input_system_config_flags_t * const flags) { - uint32_t memory_required; - uint32_t acq_memory_required; + u32 memory_required; + u32 acq_memory_required; - assert(lhs != NULL); - assert(flags != NULL); + assert(lhs); + assert(flags); if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; @@ -1745,8 +1723,7 @@ static input_system_error_t set_csi_cfg( && lhs->nof_xmem_buffers == rhs->nof_xmem_buffers ) { return INPUT_SYSTEM_ERR_NO_ERROR; - } - else { + } else { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; } @@ -1759,15 +1736,15 @@ static input_system_error_t set_csi_cfg( if (rhs->buffering_mode >= N_INPUT_SYSTEM_BUFFERING_MODE || // Check if required memory is available in input buffer (SRAM). - (memory_required + acq_memory_required )> config.unallocated_ib_mem_words + (memory_required + acq_memory_required) > config.unallocated_ib_mem_words ) { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; } // Set the value. - //lhs[port]->backend_ch = rhs.backend_ch; - lhs->buffering_mode = rhs->buffering_mode; + //lhs[port]->backend_ch = rhs.backend_ch; + lhs->buffering_mode = rhs->buffering_mode; lhs->nof_xmem_buffers = rhs->nof_xmem_buffers; lhs->csi_buffer.mem_reg_size = rhs->csi_buffer.mem_reg_size; @@ -1784,15 +1761,14 @@ static input_system_error_t set_csi_cfg( return INPUT_SYSTEM_ERR_NO_ERROR; } - // Test flags and set structure. static input_system_error_t input_system_multiplexer_cfg( - input_system_multiplex_t* const lhs, + input_system_multiplex_t * const lhs, const input_system_multiplex_t rhs, - input_system_config_flags_t* const flags) + input_system_config_flags_t * const flags) { - assert(lhs != NULL); - assert(flags != NULL); + assert(lhs); + assert(flags); if ((*flags) & INPUT_SYSTEM_CFG_FLAG_BLOCKED) { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; @@ -1803,8 +1779,7 @@ static input_system_error_t input_system_multiplexer_cfg( // Check for consistency with already set value. if ((*lhs) == (rhs)) { return INPUT_SYSTEM_ERR_NO_ERROR; - } - else { + } else { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h index bf9230fd08f23..7813cf79fef14 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h @@ -32,7 +32,6 @@ #include "isp_acquisition_defs.h" #include "input_system_ctrl_defs.h" - typedef enum { INPUT_SYSTEM_ERR_NO_ERROR = 0, INPUT_SYSTEM_ERR_GENERIC, @@ -51,14 +50,14 @@ typedef enum { typedef struct ctrl_unit_cfg_s ctrl_unit_cfg_t; typedef struct input_system_network_cfg_s input_system_network_cfg_t; -typedef struct target_cfg2400_s target_cfg2400_t; -typedef struct channel_cfg_s channel_cfg_t; -typedef struct backend_channel_cfg_s backend_channel_cfg_t; -typedef struct input_system_cfg2400_s input_system_cfg2400_t; +typedef struct target_cfg2400_s target_cfg2400_t; +typedef struct channel_cfg_s channel_cfg_t; +typedef struct backend_channel_cfg_s backend_channel_cfg_t; +typedef struct input_system_cfg2400_s input_system_cfg2400_t; typedef struct mipi_port_state_s mipi_port_state_t; typedef struct rx_channel_state_s rx_channel_state_t; -typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; -typedef struct input_switch_cfg_s input_switch_cfg_t; +typedef struct input_switch_cfg_channel_s input_switch_cfg_channel_t; +typedef struct input_switch_cfg_s input_switch_cfg_t; struct ctrl_unit_cfg_s { ib_buffer_t buffer_mipi[N_CAPTURE_UNIT_ID]; @@ -73,37 +72,35 @@ struct input_system_network_cfg_s { typedef struct { // TBD. - uint32_t dummy_parameter; + u32 dummy_parameter; } target_isp_cfg_t; - typedef struct { // TBD. - uint32_t dummy_parameter; + u32 dummy_parameter; } target_sp_cfg_t; - typedef struct { // TBD. - uint32_t dummy_parameter; + u32 dummy_parameter; } target_strm2mem_cfg_t; struct input_switch_cfg_channel_s { - uint32_t hsync_data_reg[2]; - uint32_t vsync_data_reg; + u32 hsync_data_reg[2]; + u32 vsync_data_reg; }; struct target_cfg2400_s { - input_switch_cfg_channel_t input_switch_channel_cfg; + input_switch_cfg_channel_t input_switch_channel_cfg; target_isp_cfg_t target_isp_cfg; target_sp_cfg_t target_sp_cfg; target_strm2mem_cfg_t target_strm2mem_cfg; }; struct backend_channel_cfg_s { - uint32_t fmt_control_word_1; // Format config. - uint32_t fmt_control_word_2; - uint32_t no_side_band; + u32 fmt_control_word_1; // Format config. + u32 fmt_control_word_2; + u32 no_side_band; }; typedef union { @@ -113,25 +110,22 @@ typedef union { gpfifo_cfg_t gpfifo_cfg; } source_cfg_t; - struct input_switch_cfg_s { - uint32_t hsync_data_reg[N_RX_CHANNEL_ID * 2]; - uint32_t vsync_data_reg; + u32 hsync_data_reg[N_RX_CHANNEL_ID * 2]; + u32 vsync_data_reg; }; // Configuration of a channel. struct channel_cfg_s { - uint32_t ch_id; + u32 ch_id; backend_channel_cfg_t backend_ch; input_system_source_t source_type; source_cfg_t source_cfg; target_cfg2400_t target_cfg; }; - // Complete configuration for input system. struct input_system_cfg2400_s { - input_system_source_t source_type; input_system_config_flags_t source_type_flags; //channel_cfg_t channel[N_CHANNELS]; input_system_config_flags_t ch_flags[N_CHANNELS]; @@ -142,24 +136,21 @@ struct input_system_cfg2400_s { // This buffers set at the end, based on the all configurations. ib_buffer_t csi_buffer[N_CSI_PORTS]; input_system_config_flags_t csi_buffer_flags[N_CSI_PORTS]; ib_buffer_t acquisition_buffer_unique; input_system_config_flags_t acquisition_buffer_unique_flags; - uint32_t unallocated_ib_mem_words; // Used for check.DEFAULT = IB_CAPACITY_IN_WORDS. + u32 unallocated_ib_mem_words; // Used for check.DEFAULT = IB_CAPACITY_IN_WORDS. //uint32_t acq_allocated_ib_mem_words; input_system_connection_t multicast[N_CSI_PORTS]; - input_system_multiplex_t multiplexer; input_system_config_flags_t multiplexer_flags; - + input_system_multiplex_t multiplexer; input_system_config_flags_t multiplexer_flags; tpg_cfg_t tpg_value; input_system_config_flags_t tpg_flags; prbs_cfg_t prbs_value; input_system_config_flags_t prbs_flags; gpfifo_cfg_t gpfifo_value; input_system_config_flags_t gpfifo_flags; - input_switch_cfg_t input_switch_cfg; - - target_isp_cfg_t target_isp [N_CHANNELS]; input_system_config_flags_t target_isp_flags [N_CHANNELS]; - target_sp_cfg_t target_sp [N_CHANNELS]; input_system_config_flags_t target_sp_flags [N_CHANNELS]; - target_strm2mem_cfg_t target_strm2mem [N_CHANNELS]; input_system_config_flags_t target_strm2mem_flags [N_CHANNELS]; + target_isp_cfg_t target_isp[N_CHANNELS]; input_system_config_flags_t target_isp_flags[N_CHANNELS]; + target_sp_cfg_t target_sp[N_CHANNELS]; input_system_config_flags_t target_sp_flags[N_CHANNELS]; + target_strm2mem_cfg_t target_strm2mem[N_CHANNELS]; input_system_config_flags_t target_strm2mem_flags[N_CHANNELS]; input_system_config_flags_t session_flags; @@ -218,7 +209,6 @@ struct input_system_cfg2400_s { #define _HRT_CSS_RECEIVER_BE_IRQ_STATUS_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX + _HRT_CSS_BE_OFFSET) #define _HRT_CSS_RECEIVER_BE_IRQ_CLEAR_REG_IDX (_HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX + _HRT_CSS_BE_OFFSET) - #define _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT #define _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT #define _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT @@ -485,34 +475,34 @@ struct mipi_port_state_s { int device_ready; int irq_status; int irq_enable; - uint32_t timeout_count; - uint16_t init_count; - uint16_t raw16_18; - uint32_t sync_count; /*4 x uint8_t */ - uint32_t rx_count; /*4 x uint8_t */ - uint8_t lane_sync_count[MIPI_4LANE_CFG]; - uint8_t lane_rx_count[MIPI_4LANE_CFG]; + u32 timeout_count; + u16 init_count; + u16 raw16_18; + u32 sync_count; /*4 x uint8_t */ + u32 rx_count; /*4 x uint8_t */ + u8 lane_sync_count[MIPI_4LANE_CFG]; + u8 lane_rx_count[MIPI_4LANE_CFG]; }; struct rx_channel_state_s { - uint32_t comp_scheme0; - uint32_t comp_scheme1; + u32 comp_scheme0; + u32 comp_scheme1; mipi_predictor_t pred[N_MIPI_FORMAT_CUSTOM]; mipi_compressor_t comp[N_MIPI_FORMAT_CUSTOM]; }; struct receiver_state_s { - uint8_t fs_to_ls_delay; - uint8_t ls_to_data_delay; - uint8_t data_to_le_delay; - uint8_t le_to_fe_delay; - uint8_t fe_to_fs_delay; - uint8_t le_to_fs_delay; + u8 fs_to_ls_delay; + u8 ls_to_data_delay; + u8 data_to_le_delay; + u8 le_to_fe_delay; + u8 fe_to_fs_delay; + u8 le_to_fs_delay; bool is_two_ppc; int backend_rst; - uint16_t raw18; + u16 raw18; bool force_raw8; - uint16_t raw16; + u16 raw16; struct mipi_port_state_s mipi_port_state[N_MIPI_PORT_ID]; struct rx_channel_state_s rx_channel_state[N_RX_CHANNEL_ID]; int be_gsp_acc_ovl; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h index 48876bb08b708..288b94fdf4cae 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h @@ -28,7 +28,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C void input_system_reg_store( { assert(ID < N_INPUT_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data), value); return; } @@ -38,7 +38,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_reg_load( { assert(ID < N_INPUT_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data)); } STORAGE_CLASS_INPUT_SYSTEM_C void receiver_reg_store( @@ -48,7 +48,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C void receiver_reg_store( { assert(ID < N_RX_ID); assert(RX_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(RX_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(RX_BASE[ID] + reg * sizeof(hrt_data), value); return; } @@ -58,7 +58,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_reg_load( { assert(ID < N_RX_ID); assert(RX_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(RX_BASE[ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(RX_BASE[ID] + reg * sizeof(hrt_data)); } STORAGE_CLASS_INPUT_SYSTEM_C void receiver_port_reg_store( @@ -71,7 +71,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C void receiver_port_reg_store( assert(port_ID < N_MIPI_PORT_ID); assert(RX_BASE[ID] != (hrt_address)-1); assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); - ia_css_device_store_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg * sizeof(hrt_data), value); return; } @@ -84,7 +84,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_port_reg_load( assert(port_ID < N_MIPI_PORT_ID); assert(RX_BASE[ID] != (hrt_address)-1); assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); - return ia_css_device_load_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg * sizeof(hrt_data)); } STORAGE_CLASS_INPUT_SYSTEM_C void input_system_sub_system_reg_store( @@ -97,7 +97,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C void input_system_sub_system_reg_store( assert(sub_ID < N_SUB_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); - ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg * sizeof(hrt_data), value); return; } @@ -110,7 +110,7 @@ STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_sub_system_reg_load( assert(sub_ID < N_SUB_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); - return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg * sizeof(hrt_data)); } #endif /* __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c index 51daf76c2aea3..12efe29893f44 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c @@ -64,7 +64,7 @@ void irq_clear_all( assert(IRQ_N_CHANNEL[ID] <= HRT_DATA_WIDTH); if (IRQ_N_CHANNEL[ID] < HRT_DATA_WIDTH) { - mask = ~((~(hrt_data)0)>>IRQ_N_CHANNEL[ID]); + mask = ~((~(hrt_data)0) >> IRQ_N_CHANNEL[ID]); } irq_reg_store(ID, @@ -119,7 +119,7 @@ void irq_enable_channel( void irq_enable_pulse( const irq_ID_t ID, - bool pulse) + bool pulse) { unsigned int edge_out = 0x0; @@ -173,7 +173,7 @@ enum hrt_isp_css_irq_status irq_get_channel_id( enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; assert(ID < N_IRQ_ID); - assert(irq_id != NULL); + assert(irq_id); /* find the first irq bit */ for (idx = 0; idx < IRQ_N_CHANNEL[ID]; idx++) { @@ -192,7 +192,7 @@ enum hrt_isp_css_irq_status irq_get_channel_id( irq_wait_for_write_complete(ID); - if (irq_id != NULL) + if (irq_id) *irq_id = (unsigned int)idx; return status; @@ -228,7 +228,7 @@ void irq_controller_get_state( irq_controller_state_t *state) { assert(ID < N_IRQ_ID); - assert(state != NULL); + assert(state); state->irq_edge = irq_reg_load(ID, _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); @@ -258,10 +258,10 @@ void cnd_virq_enable_channel( irq_ID_t i; unsigned int channel_ID; irq_ID_t ID = virq_get_irq_id(irq_ID, &channel_ID); - + assert(ID < N_IRQ_ID); - for (i=IRQ1_ID;iirq_status_reg[ID] = 0; @@ -345,7 +344,7 @@ enum hrt_isp_css_irq_status virq_get_channel_id( enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; irq_ID_t ID; - assert(irq_id != NULL); + assert(irq_id); /* find the first irq bit on device 0 */ for (idx = 0; idx < IRQ_N_CHANNEL[IRQ0_ID]; idx++) { @@ -363,7 +362,7 @@ enum hrt_isp_css_irq_status virq_get_channel_id( } /* Check whether we have an IRQ on one of the nested devices */ - for (ID = N_IRQ_ID-1 ; ID > (irq_ID_t)0; ID--) { + for (ID = N_IRQ_ID - 1 ; ID > (irq_ID_t)0; ID--) { if (IRQ_NESTING_ID[ID] == (virq_id_t)idx) { break; } @@ -400,7 +399,7 @@ enum hrt_isp_css_irq_status virq_get_channel_id( irq_wait_for_write_complete(ID); idx += IRQ_N_ID_OFFSET[ID]; - if (irq_id != NULL) + if (irq_id) *irq_id = (virq_id_t)idx; return status; @@ -412,7 +411,7 @@ static inline void irq_wait_for_write_complete( assert(ID < N_IRQ_ID); assert(IRQ_BASE[ID] != (hrt_address)-1); (void)ia_css_device_load_uint32(IRQ_BASE[ID] + - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX*sizeof(hrt_data)); + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX * sizeof(hrt_data)); } static inline bool any_irq_channel_enabled( @@ -434,7 +433,7 @@ static inline irq_ID_t virq_get_irq_id( { irq_ID_t ID; - assert(channel_ID != NULL); + assert(channel_ID); for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { if (irq_ID < IRQ_N_ID_OFFSET[ID + 1]) { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h index f522dfd1a9f1a..81cdaf2450bc4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h @@ -30,13 +30,12 @@ /* IRQ3_ID */ #include "input_selector_defs.h" - #define IRQ_ID_OFFSET 32 #define IRQ0_ID_OFFSET 0 #define IRQ1_ID_OFFSET IRQ_ID_OFFSET -#define IRQ2_ID_OFFSET (2*IRQ_ID_OFFSET) -#define IRQ3_ID_OFFSET (3*IRQ_ID_OFFSET) -#define IRQ_END_OFFSET (4*IRQ_ID_OFFSET) +#define IRQ2_ID_OFFSET (2 * IRQ_ID_OFFSET) +#define IRQ3_ID_OFFSET (3 * IRQ_ID_OFFSET) +#define IRQ_END_OFFSET (4 * IRQ_ID_OFFSET) #define IRQ0_ID_N_CHANNEL HIVE_GP_DEV_IRQ_NUM_IRQS #define IRQ1_ID_N_CHANNEL HIVE_IFMT_IRQ_NUM_IRQS @@ -46,7 +45,6 @@ typedef struct virq_info_s virq_info_t; typedef struct irq_controller_state_s irq_controller_state_t; - typedef enum { virq_gpio_pin_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, virq_gpio_pin_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, @@ -81,7 +79,7 @@ typedef enum { virq_sp_dmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, virq_mmu_cache_mem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, virq_gp_timer_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, - virq_gp_timer_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + virq_gp_timer_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, virq_sw_pin_0 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, virq_sw_pin_1 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, virq_dma = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_DMA_BIT_ID, @@ -100,11 +98,11 @@ typedef enum { virq_isys_csi = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID, virq_isys_csi_be = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID, virq_isys_capt0_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP, - virq_isys_capt0_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP, + virq_isys_capt0_id_late_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP, virq_isys_capt1_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP, - virq_isys_capt1_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP, + virq_isys_capt1_id_late_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP, virq_isys_capt2_id_no_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP, - virq_isys_capt2_id_late_sop= IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP, + virq_isys_capt2_id_late_sop = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP, virq_isys_acq_sop_mismatch = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH, virq_isys_ctrl_capt0 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPA, virq_isys_ctrl_capt1 = IRQ2_ID_OFFSET + HIVE_ISYS_IRQ_INP_CTRL_CAPB, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h index 23a13ac696c20..db3cfcba5b817 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h @@ -27,8 +27,8 @@ STORAGE_CLASS_IRQ_C void irq_reg_store( const hrt_data value) { assert(ID < N_IRQ_ID); - assert(IRQ_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(IRQ_BASE[ID] + reg*sizeof(hrt_data), value); + assert(IRQ_BASE[ID] != (hrt_address) - 1); + ia_css_device_store_uint32(IRQ_BASE[ID] + reg * sizeof(hrt_data), value); return; } @@ -37,8 +37,8 @@ STORAGE_CLASS_IRQ_C hrt_data irq_reg_load( const unsigned int reg) { assert(ID < N_IRQ_ID); - assert(IRQ_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(IRQ_BASE[ID] + reg*sizeof(hrt_data)); + assert(IRQ_BASE[ID] != (hrt_address) - 1); + return ia_css_device_load_uint32(IRQ_BASE[ID] + reg * sizeof(hrt_data)); } #endif /* __IRQ_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c index 531c932a48f5d..c8ef87d7c07ad 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c @@ -44,8 +44,8 @@ void isp_get_state( { hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); - assert(state != NULL); - assert(stall != NULL); + assert(state); + assert(stall); #if defined(_hrt_sysmem_ident_address) /* Patch to avoid compiler unused symbol warning in C_RUN build */ @@ -100,30 +100,29 @@ void isp_get_state( /* ISP functions to control the ISP state from the host, even in crun. */ /* Inspect readiness of an ISP indexed by ID */ -unsigned isp_is_ready(isp_ID_t ID) +unsigned int isp_is_ready(isp_ID_t ID) { - assert (ID < N_ISP_ID); + assert(ID < N_ISP_ID); return isp_ctrl_getbit(ID, ISP_SC_REG, ISP_IDLE_BIT); } /* Inspect sleeping of an ISP indexed by ID */ -unsigned isp_is_sleeping(isp_ID_t ID) +unsigned int isp_is_sleeping(isp_ID_t ID) { - assert (ID < N_ISP_ID); + assert(ID < N_ISP_ID); return isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); } /* To be called by the host immediately before starting ISP ID. */ void isp_start(isp_ID_t ID) { - assert (ID < N_ISP_ID); + assert(ID < N_ISP_ID); } /* Wake up ISP ID. */ void isp_wake(isp_ID_t ID) { - assert (ID < N_ISP_ID); + assert(ID < N_ISP_ID); isp_ctrl_setbit(ID, ISP_SC_REG, ISP_START_BIT); hrt_sleep(); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h index 5dcc52dff3dd4..b04da7f1f98cd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h @@ -21,7 +21,7 @@ #include -#define HIVE_ISP_VMEM_MASK ((1U<pc = sp_ctrl_load(ID, SP_PC_REG); state->status_register = sc; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h index 3c70b8fdb5324..0e477b497c988 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h @@ -50,52 +50,52 @@ struct sp_stall_s { * deprecated */ #define store_sp_int(var, value) \ - sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(var), \ + sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(var), \ (uint32_t)(value)) #define store_sp_ptr(var, value) \ - sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(var), \ + sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(var), \ (uint32_t)(value)) #define load_sp_uint(var) \ - sp_dmem_load_uint32(SP0_ID, (unsigned)sp_address_of(var)) + sp_dmem_load_uint32(SP0_ID, (unsigned int)sp_address_of(var)) #define load_sp_array_uint8(array_name, index) \ - sp_dmem_load_uint8(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint8_t)) + sp_dmem_load_uint8(SP0_ID, (unsigned int)sp_address_of(array_name) + \ + (index) * sizeof(uint8_t)) #define load_sp_array_uint16(array_name, index) \ - sp_dmem_load_uint16(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint16_t)) + sp_dmem_load_uint16(SP0_ID, (unsigned int)sp_address_of(array_name) + \ + (index) * sizeof(uint16_t)) #define load_sp_array_uint(array_name, index) \ - sp_dmem_load_uint32(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint32_t)) + sp_dmem_load_uint32(SP0_ID, (unsigned int)sp_address_of(array_name) + \ + (index) * sizeof(uint32_t)) #define store_sp_var(var, data, bytes) \ - sp_dmem_store(SP0_ID, (unsigned)sp_address_of(var), data, bytes) + sp_dmem_store(SP0_ID, (unsigned int)sp_address_of(var), data, bytes) #define store_sp_array_uint8(array_name, index, value) \ - sp_dmem_store_uint8(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint8_t), value) + sp_dmem_store_uint8(SP0_ID, (unsigned int)sp_address_of(array_name) + \ + (index) * sizeof(uint8_t), value) #define store_sp_array_uint16(array_name, index, value) \ - sp_dmem_store_uint16(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint16_t), value) + sp_dmem_store_uint16(SP0_ID, (unsigned int)sp_address_of(array_name) + \ + (index) * sizeof(uint16_t), value) #define store_sp_array_uint(array_name, index, value) \ - sp_dmem_store_uint32(SP0_ID, (unsigned)sp_address_of(array_name) + \ - (index)*sizeof(uint32_t), value) + sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(array_name) + \ + (index) * sizeof(uint32_t), value) #define store_sp_var_with_offset(var, offset, data, bytes) \ - sp_dmem_store(SP0_ID, (unsigned)sp_address_of(var) + \ + sp_dmem_store(SP0_ID, (unsigned int)sp_address_of(var) + \ offset, data, bytes) #define load_sp_var(var, data, bytes) \ - sp_dmem_load(SP0_ID, (unsigned)sp_address_of(var), data, bytes) + sp_dmem_load(SP0_ID, (unsigned int)sp_address_of(var), data, bytes) #define load_sp_var_with_offset(var, offset, data, bytes) \ - sp_dmem_load(SP0_ID, (unsigned)sp_address_of(var) + offset, \ + sp_dmem_load(SP0_ID, (unsigned int)sp_address_of(var) + offset, \ data, bytes) #endif /* __SP_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h index 5ea81c0e82d18..230cfcc5bfc9e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h @@ -28,7 +28,7 @@ STORAGE_CLASS_SP_C void sp_ctrl_store( { assert(ID < N_SP_ID); assert(SP_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); + ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); return; } @@ -38,7 +38,7 @@ STORAGE_CLASS_SP_C hrt_data sp_ctrl_load( { assert(ID < N_SP_ID); assert(SP_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg*sizeof(hrt_data)); + return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data)); } STORAGE_CLASS_SP_C bool sp_ctrl_getbit( @@ -47,6 +47,7 @@ STORAGE_CLASS_SP_C bool sp_ctrl_getbit( const unsigned int bit) { hrt_data val = sp_ctrl_load(ID, reg); + return (val & (1UL << bit)) != 0; } @@ -56,6 +57,7 @@ STORAGE_CLASS_SP_C void sp_ctrl_setbit( const unsigned int bit) { hrt_data data = sp_ctrl_load(ID, reg); + sp_ctrl_store(ID, reg, (data | (1UL << bit))); return; } @@ -66,6 +68,7 @@ STORAGE_CLASS_SP_C void sp_ctrl_clearbit( const unsigned int bit) { hrt_data data = sp_ctrl_load(ID, reg); + sp_ctrl_store(ID, reg, (data & ~(1UL << bit))); return; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h index 8be1cd020bf45..f1430c3df3010 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h @@ -39,7 +39,7 @@ /* * Cell specific address maps */ -#if HRT_ADDRESS_WIDTH==64 +#if HRT_ADDRESS_WIDTH == 64 #define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */ @@ -76,7 +76,7 @@ static const hrt_address SP_PMEM_BASE[N_SP_ID] = { (hrt_address)0x00000000000B0000ULL}; /* MMU */ -#if defined (IS_ISP_2400_MAMOIADA_SYSTEM) || defined (IS_ISP_2401_MAMOIADA_SYSTEM) +#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) /* * MMU0_ID: The data MMU * MMU1_ID: The icache MMU @@ -136,7 +136,6 @@ static const hrt_address GPIO_BASE[N_GPIO_ID] = { static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { (hrt_address)0x0000000000000100ULL}; - /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { (hrt_address)0x0000000000030000ULL, @@ -161,7 +160,7 @@ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { static const hrt_address RX_BASE[N_RX_ID] = { (hrt_address)0x0000000000080100ULL}; -#elif HRT_ADDRESS_WIDTH==32 +#elif HRT_ADDRESS_WIDTH == 32 #define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */ @@ -198,7 +197,7 @@ static const hrt_address SP_PMEM_BASE[N_SP_ID] = { (hrt_address)0x000B0000UL}; /* MMU */ -#if defined (IS_ISP_2400_MAMOIADA_SYSTEM) || defined (IS_ISP_2401_MAMOIADA_SYSTEM) +#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) /* * MMU0_ID: The data MMU * MMU1_ID: The icache MMU @@ -259,7 +258,6 @@ static const hrt_address GPIO_BASE[N_GPIO_ID] = { static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { (hrt_address)0x00000100UL}; - /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { (hrt_address)0x00030000UL, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c index cd12d74024f75..204ea6c0925d2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c @@ -54,7 +54,7 @@ void timed_ctrl_snd_sp_commnd( OP___assert(SP_DMEM_BASE[SP_ID] != (hrt_address)-1); timed_ctrl_snd_commnd(ID, mask, condition, counter, - SP_DMEM_BASE[SP_ID]+offset, value); + SP_DMEM_BASE[SP_ID] + offset, value); } void timed_ctrl_snd_gpio_commnd( @@ -70,5 +70,5 @@ void timed_ctrl_snd_gpio_commnd( OP___assert(GPIO_BASE[GPIO_ID] != (hrt_address)-1); timed_ctrl_snd_commnd(ID, mask, condition, counter, - GPIO_BASE[GPIO_ID]+offset, value); + GPIO_BASE[GPIO_ID] + offset, value); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h index fb0fdbb884352..ffa295c14f8f0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h @@ -27,8 +27,8 @@ STORAGE_CLASS_TIMED_CTRL_C void timed_ctrl_reg_store( const hrt_data value) { OP___assert(ID < N_TIMED_CTRL_ID); -OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(TIMED_CTRL_BASE[ID] + reg*sizeof(hrt_data), value); +OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address) - 1); + ia_css_device_store_uint32(TIMED_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); } #endif /* __GP_DEVICE_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h index 5e05258673d55..1536cfbabd392 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h @@ -21,7 +21,6 @@ #include "assert_support.h" - STORAGE_CLASS_ISP_C void isp_vamem_store( const vamem_ID_t ID, vamem_data_t *addr, @@ -29,9 +28,8 @@ STORAGE_CLASS_ISP_C void isp_vamem_store( const size_t size) /* in vamem_data_t */ { assert(ID < N_VAMEM_ID); - assert(ISP_VAMEM_BASE[ID] != (hrt_address)-1); - hrt_master_port_store(ISP_VAMEM_BASE[ID] + (unsigned)addr, data, size * sizeof(vamem_data_t)); + assert(ISP_VAMEM_BASE[ID] != (hrt_address) - 1); + hrt_master_port_store(ISP_VAMEM_BASE[ID] + (unsigned int)addr, data, size * sizeof(vamem_data_t)); } - #endif /* __VAMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c index ea22c23fc7a49..728f9d6072a63 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c @@ -23,43 +23,45 @@ #include "platform_support.h" /* hrt_sleep() */ typedef unsigned long long hive_uedge; -typedef hive_uedge *hive_wide; +typedef hive_uedge * hive_wide; /* Copied from SDK: sim_semantics.c */ /* subword bits move like this: MSB[____xxxx____]LSB -> MSB[00000000xxxx]LSB */ -#define SUBWORD(w, start, end) (((w) & (((1ULL << ((end)-1))-1) << 1 | 1)) >> (start)) +#define SUBWORD(w, start, end) (((w) & (((1ULL << ((end) - 1)) - 1) << 1 | 1)) >> (start)) /* inverse subword bits move like this: MSB[xxxx____xxxx]LSB -> MSB[xxxx0000xxxx]LSB */ -#define INV_SUBWORD(w, start, end) ((w) & (~(((1ULL << ((end)-1))-1) << 1 | 1) | ((1ULL << (start))-1)) ) +#define INV_SUBWORD(w, start, end) ((w) & (~(((1ULL << ((end) - 1)) - 1) << 1 | 1) | ((1ULL << (start)) - 1))) -#define uedge_bits (8*sizeof(hive_uedge)) +#define uedge_bits (8 * sizeof(hive_uedge)) #define move_lower_bits(target, target_bit, src, src_bit) move_subword(target, target_bit, src, 0, src_bit) #define move_upper_bits(target, target_bit, src, src_bit) move_subword(target, target_bit, src, src_bit, uedge_bits) #define move_word(target, target_bit, src) move_subword(target, target_bit, src, 0, uedge_bits) static void -move_subword ( +move_subword( hive_uedge *target, - unsigned target_bit, + unsigned int target_bit, hive_uedge src, - unsigned src_start, - unsigned src_end) + unsigned int src_start, + unsigned int src_end) { unsigned int start_elem = target_bit / uedge_bits; unsigned int start_bit = target_bit % uedge_bits; - unsigned subword_width = src_end - src_start; + unsigned int subword_width = src_end - src_start; hive_uedge src_subword = SUBWORD(src, src_start, src_end); if (subword_width + start_bit > uedge_bits) { /* overlap */ hive_uedge old_val1; hive_uedge old_val0 = INV_SUBWORD(target[start_elem], start_bit, uedge_bits); + target[start_elem] = old_val0 | (src_subword << start_bit); - old_val1 = INV_SUBWORD(target[start_elem+1], 0, subword_width + start_bit - uedge_bits); - target[start_elem+1] = old_val1 | (src_subword >> ( uedge_bits - start_bit)); + old_val1 = INV_SUBWORD(target[start_elem + 1], 0, subword_width + start_bit - uedge_bits); + target[start_elem + 1] = old_val1 | (src_subword >> (uedge_bits - start_bit)); } else { hive_uedge old_val = INV_SUBWORD(target[start_elem], start_bit, start_bit + subword_width); + target[start_elem] = old_val | (src_subword << start_bit); } } @@ -87,13 +89,14 @@ hive_sim_wide_unpack( /* general case: handles edge spanning cases (includes >64bit elements) */ unsigned int bits_written = 0; unsigned int i; + move_upper_bits(elem, bits_written, vector[start_elem], start_bit); bits_written += (64 - start_bit); - for(i = start_elem+1; i < end_elem; i++) { + for (i = start_elem + 1; i < end_elem; i++) { move_word(elem, bits_written, vector[i]); bits_written += uedge_bits; } - move_lower_bits(elem, bits_written , vector[end_elem], end_bit); + move_lower_bits(elem, bits_written, vector[end_elem], end_bit); } } @@ -111,10 +114,11 @@ hive_sim_wide_pack( if (elem_bits == uedge_bits) { vector[start_elem] = elem[0]; } else if (elem_bits > uedge_bits) { - unsigned bits_to_write = elem_bits; - unsigned start_bit = elem_bits * index; - unsigned i = 0; - for(; bits_to_write > uedge_bits; bits_to_write -= uedge_bits, i++, start_bit += uedge_bits) { + unsigned int bits_to_write = elem_bits; + unsigned int start_bit = elem_bits * index; + unsigned int i = 0; + + for (; bits_to_write > uedge_bits; bits_to_write -= uedge_bits, i++, start_bit += uedge_bits) { move_word(vector, start_bit, elem[i]); } move_lower_bits(vector, start_bit, elem[i], bits_to_write); @@ -124,16 +128,17 @@ hive_sim_wide_pack( } } -static void load_vector ( +static void load_vector( const isp_ID_t ID, t_vmem_elem *to, const t_vmem_elem *from) { - unsigned i; + unsigned int i; hive_uedge *data; - unsigned size = sizeof(short)*ISP_NWAY; - VMEM_ARRAY(v, 2*ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ - assert(ISP_BAMEM_BASE[ID] != (hrt_address)-1); + unsigned int size = sizeof(short) * ISP_NWAY; + + VMEM_ARRAY(v, 2 * ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ + assert(ISP_BAMEM_BASE[ID] != (hrt_address) - 1); #if !defined(HRT_MEMORY_ACCESS) ia_css_device_load(ISP_BAMEM_BASE[ID] + (unsigned long)from, &v[0][0], size); #else @@ -142,26 +147,29 @@ static void load_vector ( data = (hive_uedge *)v; for (i = 0; i < ISP_NWAY; i++) { hive_uedge elem = 0; + hive_sim_wide_unpack(data, &elem, ISP_VEC_ELEMBITS, i); to[i] = elem; } hrt_sleep(); /* Spend at least 1 cycles per vector */ } -static void store_vector ( +static void store_vector( const isp_ID_t ID, t_vmem_elem *to, const t_vmem_elem *from) { - unsigned i; - unsigned size = sizeof(short)*ISP_NWAY; - VMEM_ARRAY(v, 2*ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ + unsigned int i; + unsigned int size = sizeof(short) * ISP_NWAY; + + VMEM_ARRAY(v, 2 * ISP_NWAY); /* Need 2 vectors to work around vmem hss bug */ //load_vector (&v[1][0], &to[ISP_NWAY]); /* Fetch the next vector, since it will be overwritten. */ hive_uedge *data = (hive_uedge *)v; + for (i = 0; i < ISP_NWAY; i++) { hive_sim_wide_pack(data, (hive_wide)&from[i], ISP_VEC_ELEMBITS, i); } - assert(ISP_BAMEM_BASE[ID] != (hrt_address)-1); + assert(ISP_BAMEM_BASE[ID] != (hrt_address) - 1); #if !defined(HRT_MEMORY_ACCESS) ia_css_device_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size); #else @@ -175,16 +183,17 @@ void isp_vmem_load( const isp_ID_t ID, const t_vmem_elem *from, t_vmem_elem *to, - unsigned elems) /* In t_vmem_elem */ + unsigned int elems) /* In t_vmem_elem */ { - unsigned c; + unsigned int c; const t_vmem_elem *vp = from; + assert(ID < N_ISP_ID); assert((unsigned long)from % ISP_VEC_ALIGN == 0); assert(elems % ISP_NWAY == 0); for (c = 0; c < elems; c += ISP_NWAY) { load_vector(ID, &to[c], vp); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + vp = (t_vmem_elem *)((char *)vp + ISP_VEC_ALIGN); } } @@ -192,67 +201,72 @@ void isp_vmem_store( const isp_ID_t ID, t_vmem_elem *to, const t_vmem_elem *from, - unsigned elems) /* In t_vmem_elem */ + unsigned int elems) /* In t_vmem_elem */ { - unsigned c; + unsigned int c; t_vmem_elem *vp = to; + assert(ID < N_ISP_ID); assert((unsigned long)to % ISP_VEC_ALIGN == 0); assert(elems % ISP_NWAY == 0); for (c = 0; c < elems; c += ISP_NWAY) { - store_vector (ID, vp, &from[c]); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + store_vector(ID, vp, &from[c]); + vp = (t_vmem_elem *)((char *)vp + ISP_VEC_ALIGN); } } -void isp_vmem_2d_load ( +void isp_vmem_2d_load( const isp_ID_t ID, const t_vmem_elem *from, t_vmem_elem *to, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */) { - unsigned h; + unsigned int h; assert(ID < N_ISP_ID); assert((unsigned long)from % ISP_VEC_ALIGN == 0); assert(width % ISP_NWAY == 0); assert(stride_from % ISP_NWAY == 0); for (h = 0; h < height; h++) { - unsigned c; + unsigned int c; const t_vmem_elem *vp = from; + for (c = 0; c < width; c += ISP_NWAY) { - load_vector(ID, &to[stride_to*h + c], vp); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + load_vector(ID, &to[stride_to * h + c], vp); + vp = (t_vmem_elem *)((char *)vp + ISP_VEC_ALIGN); } - from = (const t_vmem_elem *)((const char *)from + stride_from/ISP_NWAY*ISP_VEC_ALIGN); + from = (const t_vmem_elem *)((const char *)from + stride_from / ISP_NWAY * ISP_VEC_ALIGN); } } -void isp_vmem_2d_store ( +void isp_vmem_2d_store( const isp_ID_t ID, t_vmem_elem *to, const t_vmem_elem *from, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */) { - unsigned h; + unsigned int h; assert(ID < N_ISP_ID); assert((unsigned long)to % ISP_VEC_ALIGN == 0); assert(width % ISP_NWAY == 0); assert(stride_to % ISP_NWAY == 0); for (h = 0; h < height; h++) { - unsigned c; + unsigned int c; t_vmem_elem *vp = to; + for (c = 0; c < width; c += ISP_NWAY) { - store_vector (ID, vp, &from[stride_from*h + c]); - vp = (t_vmem_elem *)((char*)vp + ISP_VEC_ALIGN); + store_vector(ID, vp, &from[stride_from * h + c]); + vp = (t_vmem_elem *)((char *)vp + ISP_VEC_ALIGN); } - to = (t_vmem_elem *)((char *)to + stride_to/ISP_NWAY*ISP_VEC_ALIGN); + to = (t_vmem_elem *)((char *)to + stride_to / ISP_NWAY * ISP_VEC_ALIGN); } } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h index de85644b885e1..25043677448dc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h @@ -18,38 +18,40 @@ #include "type_support.h" #include "vmem_global.h" -typedef uint16_t t_vmem_elem; +typedef u16 t_vmem_elem; -#define VMEM_ARRAY(x,s) t_vmem_elem x[s/ISP_NWAY][ISP_NWAY] +#define VMEM_ARRAY(x, s) t_vmem_elem x[s / ISP_NWAY][ISP_NWAY] void isp_vmem_load( const isp_ID_t ID, const t_vmem_elem *from, t_vmem_elem *to, - unsigned elems); /* In t_vmem_elem */ + unsigned int elems); /* In t_vmem_elem */ void isp_vmem_store( const isp_ID_t ID, t_vmem_elem *to, const t_vmem_elem *from, - unsigned elems); /* In t_vmem_elem */ + unsigned int elems); /* In t_vmem_elem */ -void isp_vmem_2d_load ( +void isp_vmem_2d_load( const isp_ID_t ID, const t_vmem_elem *from, t_vmem_elem *to, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */); -void isp_vmem_2d_store ( +void isp_vmem_2d_store( const isp_ID_t ID, t_vmem_elem *to, const t_vmem_elem *from, - unsigned height, - unsigned width, - unsigned stride_to, /* In t_vmem_elem */ + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ + unsigned stride_from /* In t_vmem_elem */); #endif /* __VMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h index 7558f49643135..163521c53d4b4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h @@ -35,16 +35,16 @@ #define HIVE_SWITCH_M_FSYNC 0x00000007 #define HIVE_SWITCH_ENCODE_FSYNC(x) \ - (1U<<(((x)-1)&HIVE_SWITCH_M_CHANNELS)) + (1U << (((x) - 1) & HIVE_SWITCH_M_CHANNELS)) #define _HIVE_INPUT_SWITCH_GET_LUT_FIELD(reg, bit_index) \ (((reg) >> (bit_index)) & HIVE_SWITCH_M_SWITCH_CODE) #define _HIVE_INPUT_SWITCH_SET_LUT_FIELD(reg, bit_index, val) \ - (((reg) & ~(HIVE_SWITCH_M_SWITCH_CODE<<(bit_index))) | (((hrt_data)(val)&HIVE_SWITCH_M_SWITCH_CODE)<<(bit_index))) + (((reg) & ~(HIVE_SWITCH_M_SWITCH_CODE << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_SWITCH_CODE) << (bit_index))) #define _HIVE_INPUT_SWITCH_GET_FSYNC_FIELD(reg, bit_index) \ (((reg) >> (bit_index)) & HIVE_SWITCH_M_FSYNC) #define _HIVE_INPUT_SWITCH_SET_FSYNC_FIELD(reg, bit_index, val) \ - (((reg) & ~(HIVE_SWITCH_M_FSYNC<<(bit_index))) | (((hrt_data)(val)&HIVE_SWITCH_M_FSYNC)<<(bit_index))) + (((reg) & ~(HIVE_SWITCH_M_FSYNC << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_FSYNC) << (bit_index))) typedef struct input_formatter_cfg_s input_formatter_cfg_t; @@ -93,22 +93,22 @@ typedef struct input_formatter_cfg_s input_formatter_cfg_t; * This data structure is shared between host and SP */ struct input_formatter_cfg_s { - uint32_t start_line; - uint32_t start_column; - uint32_t left_padding; - uint32_t cropped_height; - uint32_t cropped_width; - uint32_t deinterleaving; - uint32_t buf_vecs; - uint32_t buf_start_index; - uint32_t buf_increment; - uint32_t buf_eol_offset; - uint32_t is_yuv420_format; - uint32_t block_no_reqs; + u32 start_line; + u32 start_column; + u32 left_padding; + u32 cropped_height; + u32 cropped_width; + u32 deinterleaving; + u32 buf_vecs; + u32 buf_start_index; + u32 buf_increment; + u32 buf_eol_offset; + u32 is_yuv420_format; + u32 block_no_reqs; }; extern const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID]; extern const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID]; -extern const uint8_t HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID]; +extern const u8 HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID]; #endif /* __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h index 9ba36525e8d32..b443b58f96089 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h @@ -24,7 +24,7 @@ //AM: Use previous define for this. //MIPI allows upto 4 channels. -#define N_CHANNELS (4) +#define N_CHANNELS (4) // 12KB = 256bit x 384 words #define IB_CAPACITY_IN_WORDS (384) @@ -49,7 +49,7 @@ typedef enum { typedef enum { INPUT_SYSTEM_DISCARD_ALL = 0, INPUT_SYSTEM_CSI_BACKEND = 1, - INPUT_SYSTEM_INPUT_BUFFER = 2, + INPUT_SYSTEM_INPUT_BUFFER = 2, INPUT_SYSTEM_MULTICAST = 3, N_INPUT_SYSTEM_CONNECTION } input_system_connection_t; @@ -86,31 +86,31 @@ typedef struct prbs_cfg_s prbs_cfg_t; /* MW: uint16_t should be sufficient */ struct input_system_cfg_s { - uint32_t no_side_band; - uint32_t fmt_type; - uint32_t ch_id; - uint32_t input_mode; + u32 no_side_band; + u32 fmt_type; + u32 ch_id; + u32 input_mode; }; struct sync_generator_cfg_s { - uint32_t width; - uint32_t height; - uint32_t hblank_cycles; - uint32_t vblank_cycles; + u32 width; + u32 height; + u32 hblank_cycles; + u32 vblank_cycles; }; /* MW: tpg & prbs are exclusive */ struct tpg_cfg_s { - uint32_t x_mask; - uint32_t y_mask; - uint32_t x_delta; - uint32_t y_delta; - uint32_t xy_mask; + u32 x_mask; + u32 y_mask; + u32 x_delta; + u32 y_delta; + u32 xy_mask; sync_generator_cfg_t sync_gen_cfg; }; struct prbs_cfg_s { - uint32_t seed; + u32 seed; sync_generator_cfg_t sync_gen_cfg; }; @@ -125,19 +125,19 @@ typedef struct gpfifo_cfg_s gpfifo_cfg_t; //typedef struct input_system_cfg_s input_system_cfg_t; struct ib_buffer_s { - uint32_t mem_reg_size; - uint32_t nof_mem_regs; - uint32_t mem_reg_addr; + u32 mem_reg_size; + u32 nof_mem_regs; + u32 mem_reg_addr; }; typedef struct ib_buffer_s ib_buffer_t; struct csi_cfg_s { - uint32_t csi_port; + u32 csi_port; buffering_mode_t buffering_mode; ib_buffer_t csi_buffer; ib_buffer_t acquisition_buffer; - uint32_t nof_xmem_buffers; + u32 nof_xmem_buffers; }; typedef struct csi_cfg_s csi_cfg_t; @@ -150,6 +150,6 @@ typedef enum { INPUT_SYSTEM_CFG_FLAG_CONFLICT = 1U << 3 // To mark a conflicting configuration. } input_system_cfg_flag_t; -typedef uint32_t input_system_config_flags_t; +typedef u32 input_system_config_flags_t; #endif /* __INPUT_SYSTEM_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h index 14d574849a5b1..b5e4dc3a4ed35 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h @@ -17,11 +17,11 @@ #include -#if defined (HAS_ISP_2401_MAMOIADA) +#if defined(HAS_ISP_2401_MAMOIADA) #define IS_ISP_2401_MAMOIADA #include "isp2401_mamoiada_params.h" -#elif defined (HAS_ISP_2400_MAMOIADA) +#elif defined(HAS_ISP_2400_MAMOIADA) #define IS_ISP_2400_MAMOIADA #include "isp2400_mamoiada_params.h" @@ -38,14 +38,14 @@ #ifdef ISP2401 #ifdef PIPE_GENERATION #define PIPEMEM(x) MEM(x) -#define ISP_NWAY (1<>3) -#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH/8) +#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3) +#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH / 8) /* The main bus connecting all devices */ #define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH @@ -109,7 +109,7 @@ /* per-frame parameter handling support */ #define SH_CSS_ENABLE_PER_FRAME_PARAMS -typedef uint32_t hrt_bus_align_t; +typedef u32 hrt_bus_align_t; /* * Enumerate the devices, device access through the API is by ID, through the DLI by address @@ -130,13 +130,13 @@ typedef enum { N_SP_ID } sp_ID_t; -#if defined (IS_ISP_2401_MAMOIADA_SYSTEM) +#if defined(IS_ISP_2401_MAMOIADA_SYSTEM) typedef enum { MMU0_ID = 0, MMU1_ID, N_MMU_ID } mmu_ID_t; -#elif defined (IS_ISP_2400_MAMOIADA_SYSTEM) +#elif defined(IS_ISP_2400_MAMOIADA_SYSTEM) typedef enum { MMU0_ID = 0, MMU1_ID, @@ -316,6 +316,7 @@ enum ia_css_isp_memories { IA_CSS_DDR, N_IA_CSS_MEMORIES }; + #define IA_CSS_NUM_MEMORIES 9 /* For driver compatibility */ #define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h index c3e8a01040924..539d941eb9feb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h @@ -51,6 +51,4 @@ #define HIVE_TIMED_CTRL_CSI_EOF_BIT_ID 22 #define HIVE_TIMED_CTRL_IRQ_IS_STREAMING_MONITOR_BIT_ID 23 - - #endif /* __TIMED_CTRL_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h index 58713c6583b96..92b783fed82cd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h @@ -21,14 +21,14 @@ /* (log) stepsize of linear interpolation */ #define VAMEM_INTERP_STEP_LOG2 4 -#define VAMEM_INTERP_STEP (1< /* @@ -53,18 +52,18 @@ #endif -#define verifexit(cond,error_tag) \ +#define verifexit(cond, error_tag) \ do { \ - if (!(cond)){ \ + if (!(cond)) { \ goto EXIT; \ } \ -} while(0) +} while (0) #define verifjmpexit(cond) \ do { \ - if (!(cond)){ \ + if (!(cond)) { \ goto EXIT; \ } \ -} while(0) +} while (0) #endif /* __ERROR_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h index df579e9027969..8bfe348772f4e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "event_fifo_local.h" #ifndef __INLINE_EVENT__ #define STORAGE_CLASS_EVENT_H extern -#define STORAGE_CLASS_EVENT_C +#define STORAGE_CLASS_EVENT_C #include "event_fifo_public.h" #else /* __INLINE_EVENT__ */ #define STORAGE_CLASS_EVENT_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h index f10c4fa2e32b7..1743caa006d0f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "fifo_monitor_local.h" #ifndef __INLINE_FIFO_MONITOR__ #define STORAGE_CLASS_FIFO_MONITOR_H extern -#define STORAGE_CLASS_FIFO_MONITOR_C +#define STORAGE_CLASS_FIFO_MONITOR_C #include "fifo_monitor_public.h" #else /* __INLINE_FIFO_MONITOR__ */ #define STORAGE_CLASS_FIFO_MONITOR_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h index 75c6854c8e7b6..4f8d7fbc8e7f0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h @@ -31,13 +31,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "gdc_local.h" #ifndef __INLINE_GDC__ #define STORAGE_CLASS_GDC_H extern -#define STORAGE_CLASS_GDC_C +#define STORAGE_CLASS_GDC_C #include "gdc_public.h" #else /* __INLINE_GDC__ */ #define STORAGE_CLASS_GDC_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h index aba94e623043e..665557bae7a19 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "gp_device_local.h" #ifndef __INLINE_GP_DEVICE__ #define STORAGE_CLASS_GP_DEVICE_H extern -#define STORAGE_CLASS_GP_DEVICE_C +#define STORAGE_CLASS_GP_DEVICE_C #include "gp_device_public.h" #else /* __INLINE_GP_DEVICE__ */ #define STORAGE_CLASS_GP_DEVICE_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h index d5d2df24e11aa..cd26c9d16a351 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h @@ -29,7 +29,6 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" /*GP_TIMER_BASE address */ #include "gp_timer_local.h" /*GP_TIMER register offsets */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h index d37f7166aa4ac..ad79c03e59f46 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "gpio_local.h" #ifndef __INLINE_GPIO__ #define STORAGE_CLASS_GPIO_H extern -#define STORAGE_CLASS_GPIO_C +#define STORAGE_CLASS_GPIO_C #include "gpio_public.h" #else /* __INLINE_GPIO__ */ #define STORAGE_CLASS_GPIO_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h index a82fd3a21e98a..f87fd6b2ba231 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "hmem_local.h" #ifndef __INLINE_HMEM__ #define STORAGE_CLASS_HMEM_H extern -#define STORAGE_CLASS_HMEM_C +#define STORAGE_CLASS_HMEM_C #include "hmem_public.h" #else /* __INLINE_HMEM__ */ #define STORAGE_CLASS_HMEM_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h index 45b316abb6749..63b3c2acc6879 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h @@ -28,7 +28,7 @@ * @param[in] id The global unique ID of the csi rx fe controller. * @param[out] state Point to the register-state. */ -extern void csi_rx_fe_ctrl_get_state( +void csi_rx_fe_ctrl_get_state( const csi_rx_frontend_ID_t ID, csi_rx_fe_ctrl_state_t *state); /** @@ -38,7 +38,7 @@ extern void csi_rx_fe_ctrl_get_state( * @param[in] id The global unique ID of the csi rx fe controller. * @param[in] state Point to the register-state. */ -extern void csi_rx_fe_ctrl_dump_state( +void csi_rx_fe_ctrl_dump_state( const csi_rx_frontend_ID_t ID, csi_rx_fe_ctrl_state_t *state); /** @@ -49,9 +49,9 @@ extern void csi_rx_fe_ctrl_dump_state( * @param[in] lane The lane ID. * @param[out] state Point to the dlane state. */ -extern void csi_rx_fe_ctrl_get_dlane_state( +void csi_rx_fe_ctrl_get_dlane_state( const csi_rx_frontend_ID_t ID, - const uint32_t lane, + const u32 lane, csi_rx_fe_ctrl_lane_t *dlane_state); /** * @brief Get the csi rx backend state. @@ -60,7 +60,7 @@ extern void csi_rx_fe_ctrl_get_dlane_state( * @param[in] id The global unique ID of the csi rx be controller. * @param[out] state Point to the register-state. */ -extern void csi_rx_be_ctrl_get_state( +void csi_rx_be_ctrl_get_state( const csi_rx_backend_ID_t ID, csi_rx_be_ctrl_state_t *state); /** @@ -70,7 +70,7 @@ extern void csi_rx_be_ctrl_get_state( * @param[in] id The global unique ID of the csi rx be controller. * @param[in] state Point to the register-state. */ -extern void csi_rx_be_ctrl_dump_state( +void csi_rx_be_ctrl_dump_state( const csi_rx_backend_ID_t ID, csi_rx_be_ctrl_state_t *state); /* end of NCI */ @@ -89,7 +89,7 @@ extern void csi_rx_be_ctrl_dump_state( * * @return the value of the register. */ -extern hrt_data csi_rx_fe_ctrl_reg_load( +hrt_data csi_rx_fe_ctrl_reg_load( const csi_rx_frontend_ID_t ID, const hrt_address reg); /** @@ -101,7 +101,7 @@ extern hrt_data csi_rx_fe_ctrl_reg_load( * @param[in] value The value to be stored. * */ -extern void csi_rx_fe_ctrl_reg_store( +void csi_rx_fe_ctrl_reg_store( const csi_rx_frontend_ID_t ID, const hrt_address reg, const hrt_data value); @@ -114,7 +114,7 @@ extern void csi_rx_fe_ctrl_reg_store( * * @return the value of the register. */ -extern hrt_data csi_rx_be_ctrl_reg_load( +hrt_data csi_rx_be_ctrl_reg_load( const csi_rx_backend_ID_t ID, const hrt_address reg); /** @@ -126,7 +126,7 @@ extern hrt_data csi_rx_be_ctrl_reg_load( * @param[in] value The value to be stored. * */ -extern void csi_rx_be_ctrl_reg_store( +void csi_rx_be_ctrl_reg_store( const csi_rx_backend_ID_t ID, const hrt_address reg, const hrt_data value); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h index 90b4ba7e023fe..450f4400fd493 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h @@ -45,55 +45,54 @@ extern hrt_address debug_buffer_address; extern hrt_vaddress debug_buffer_ddr_address; /*! Check the empty state of the local debug data buffer - + \return isEmpty(buffer) */ STORAGE_CLASS_DEBUG_H bool is_debug_buffer_empty(void); /*! Dequeue a token from the debug data buffer - + \return isEmpty(buffer)?0:buffer[head] */ STORAGE_CLASS_DEBUG_H hrt_data debug_dequeue(void); /*! Synchronise the remote buffer to the local buffer - + \return none */ STORAGE_CLASS_DEBUG_H void debug_synch_queue(void); /*! Synchronise the remote buffer to the local buffer - + \return none */ STORAGE_CLASS_DEBUG_H void debug_synch_queue_isp(void); - /*! Synchronise the remote buffer to the local buffer - + \return none */ STORAGE_CLASS_DEBUG_H void debug_synch_queue_ddr(void); /*! Set the offset/address of the (remote) debug buffer - + \return none */ -extern void debug_buffer_init( +void debug_buffer_init( const hrt_address addr); /*! Set the offset/address of the (remote) debug buffer - + \return none */ -extern void debug_buffer_ddr_init( +void debug_buffer_ddr_init( const hrt_vaddress addr); /*! Set the (remote) operating mode of the debug buffer - + \return none */ -extern void debug_buffer_setmode( +void debug_buffer_setmode( const debug_buf_mode_t mode); #endif /* __DEBUG_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h index 1d5e38ffe9389..834e5dfc5ce07 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h @@ -26,7 +26,7 @@ typedef struct dma_state_s dma_state_t; \return none, state = DMA[ID].state */ -extern void dma_get_state( +void dma_get_state( const dma_ID_t ID, dma_state_t *state); @@ -55,7 +55,6 @@ STORAGE_CLASS_DMA_H hrt_data dma_reg_load( const dma_ID_t ID, const unsigned int reg); - /*! Set maximum burst size of DMA[ID] \param ID[in] DMA identifier diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h index d95bc7070f4c2..6e84fc775f259 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h @@ -19,7 +19,7 @@ #include "system_types.h" /*! Blocking read from an event source EVENT[ID] - + \param ID[in] EVENT identifier \return none, dequeue(event_queue[ID]) @@ -28,7 +28,7 @@ STORAGE_CLASS_EVENT_H void event_wait_for( const event_ID_t ID); /*! Conditional blocking wait for an event source EVENT[ID] - + \param ID[in] EVENT identifier \param cnd[in] predicate @@ -39,7 +39,7 @@ STORAGE_CLASS_EVENT_H void cnd_event_wait_for( const bool cnd); /*! Blocking read from an event source EVENT[ID] - + \param ID[in] EVENT identifier \return dequeue(event_queue[ID]) @@ -48,7 +48,7 @@ STORAGE_CLASS_EVENT_H hrt_data event_receive_token( const event_ID_t ID); /*! Blocking write to an event sink EVENT[ID] - + \param ID[in] EVENT identifier \param token[in] token to be written on the event @@ -59,7 +59,7 @@ STORAGE_CLASS_EVENT_H void event_send_token( const hrt_data token); /*! Query an event source EVENT[ID] - + \param ID[in] EVENT identifier \return !isempty(event_queue[ID]) @@ -68,7 +68,7 @@ STORAGE_CLASS_EVENT_H bool is_event_pending( const event_ID_t ID); /*! Query an event sink EVENT[ID] - + \param ID[in] EVENT identifier \return !isfull(event_queue[ID]) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h index 329f5d5049f29..93b4f9b441ae0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h @@ -22,7 +22,7 @@ typedef struct fifo_switch_state_s fifo_switch_state_t; typedef struct fifo_monitor_state_s fifo_monitor_state_t; /*! Set a fifo switch multiplex - + \param ID[in] FIFO_MONITOR identifier \param switch_id[in] fifo switch identifier \param sel[in] fifo switch selector @@ -35,7 +35,7 @@ STORAGE_CLASS_FIFO_MONITOR_H void fifo_switch_set( const hrt_data sel); /*! Get a fifo switch multiplex - + \param ID[in] FIFO_MONITOR identifier \param switch_id[in] fifo switch identifier @@ -46,44 +46,44 @@ STORAGE_CLASS_FIFO_MONITOR_H hrt_data fifo_switch_get( const fifo_switch_t switch_id); /*! Read the state of FIFO_MONITOR[ID] - + \param ID[in] FIFO_MONITOR identifier \param state[out] fifo monitor state structure \return none, state = FIFO_MONITOR[ID].state */ -extern void fifo_monitor_get_state( +void fifo_monitor_get_state( const fifo_monitor_ID_t ID, fifo_monitor_state_t *state); /*! Read the state of a fifo channel - + \param ID[in] FIFO_MONITOR identifier \param channel_id[in] fifo channel identifier \param state[out] fifo channel state structure \return none, state = fifo_channel[channel_id].state */ -extern void fifo_channel_get_state( +void fifo_channel_get_state( const fifo_monitor_ID_t ID, const fifo_channel_t channel_id, fifo_channel_state_t *state); /*! Read the state of a fifo switch - + \param ID[in] FIFO_MONITOR identifier \param switch_id[in] fifo switch identifier \param state[out] fifo switch state structure \return none, state = fifo_switch[switch_id].state */ -extern void fifo_switch_get_state( +void fifo_switch_get_state( const fifo_monitor_ID_t ID, const fifo_switch_t switch_id, fifo_switch_state_t *state); /*! Write to a control register of FIFO_MONITOR[ID] - + \param ID[in] FIFO_MONITOR identifier \param reg[in] register index \param value[in] The data to be written @@ -96,7 +96,7 @@ STORAGE_CLASS_FIFO_MONITOR_H void fifo_monitor_reg_store( const hrt_data value); /*! Read from a control register of FIFO_MONITOR[ID] - + \param ID[in] FIFO_MONITOR identifier \param reg[in] register index \param value[in] The data to be written diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h index d09d1e3203066..736a3ca67d793 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h @@ -33,7 +33,7 @@ \return none, GDC[ID].lut[0...3][0...HRT_GDC_N-1] = data */ -extern void gdc_lut_store( +void gdc_lut_store( const gdc_ID_t ID, const int data[4][HRT_GDC_N]); @@ -43,17 +43,17 @@ extern void gdc_lut_store( \param in_lut[in] The data matrix to be converted \param out_lut[out] The data matrix as the output of conversion */ -extern void gdc_lut_convert_to_isp_format( +void gdc_lut_convert_to_isp_format( const int in_lut[4][HRT_GDC_N], int out_lut[4][HRT_GDC_N]); /*! Return the integer representation of 1.0 of GDC[ID] - + \param ID[in] GDC identifier \return unity */ -extern int gdc_get_unity( +int gdc_get_unity( const gdc_ID_t ID); #endif /* __GDC_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h index acbce0fd658fe..fa5ff8c4cd28a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h @@ -20,13 +20,13 @@ typedef struct gp_device_state_s gp_device_state_t; /*! Read the state of GP_DEVICE[ID] - + \param ID[in] GP_DEVICE identifier \param state[out] gp device state structure \return none, state = GP_DEVICE[ID].state */ -extern void gp_device_get_state( +void gp_device_get_state( const gp_device_ID_t ID, gp_device_state_t *state); @@ -44,7 +44,7 @@ STORAGE_CLASS_GP_DEVICE_H void gp_device_reg_store( const hrt_data value); /*! Read from a control register of GP_DEVICE[ID] - + \param ID[in] GP_DEVICE identifier \param reg_addr[in] register byte address \param value[in] The data to be written diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h index 276e2fa9b1e78..2ddb8c40a5b25 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h @@ -23,7 +23,6 @@ param ID timer_id extern void gp_timer_init(gp_timer_ID_t ID); - /*! read timer value for (platform selected)selected timer. param ID timer_id \return uint32_t 32 bit timer value diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h index 82eaa0d48bee5..275e8e4d853da 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h @@ -31,7 +31,7 @@ STORAGE_CLASS_GPIO_H void gpio_reg_store( const hrt_data value); /*! Read from a control register of GPIO[ID] - + \param ID[in] GPIO identifier \param reg_addr[in] register byte address \param value[in] The data to be written diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h index 274ceaf4b050f..5bd6cebe85b31 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h @@ -42,7 +42,7 @@ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_state( */ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_proc_state( const ibuf_ctrl_ID_t ID, - const uint32_t proc_id, + const u32 proc_id, ibuf_ctrl_proc_state_t *state); /** * @brief Dump the ibuf-controller state. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h index 2db70893daf9c..87f6d5031fdfe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h @@ -19,16 +19,16 @@ #include "system_types.h" /*! Reset INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \return none, reset(INPUT_FORMATTER[ID]) */ -extern void input_formatter_rst( +void input_formatter_rst( const input_formatter_ID_t ID); /*! Set the blocking mode of INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \param enable[in] blocking enable flag @@ -41,54 +41,54 @@ extern void input_formatter_rst( \return none, INPUT_FORMATTER[ID].blocking_mode = enable */ -extern void input_formatter_set_fifo_blocking_mode( +void input_formatter_set_fifo_blocking_mode( const input_formatter_ID_t ID, const bool enable); /*! Return the data alignment of INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \return alignment(INPUT_FORMATTER[ID].data) */ -extern unsigned int input_formatter_get_alignment( +unsigned int input_formatter_get_alignment( const input_formatter_ID_t ID); /*! Read the source switch state into INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \param state[out] input formatter switch state structure \return none, state = INPUT_FORMATTER[ID].switch_state */ -extern void input_formatter_get_switch_state( +void input_formatter_get_switch_state( const input_formatter_ID_t ID, input_formatter_switch_state_t *state); /*! Read the control registers of INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \param state[out] input formatter state structure \return none, state = INPUT_FORMATTER[ID].state */ -extern void input_formatter_get_state( +void input_formatter_get_state( const input_formatter_ID_t ID, input_formatter_state_t *state); /*! Read the control registers of bin copy INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \param state[out] input formatter state structure \return none, state = INPUT_FORMATTER[ID].state */ -extern void input_formatter_bin_get_state( +void input_formatter_bin_get_state( const input_formatter_ID_t ID, input_formatter_bin_state_t *state); /*! Write to a control register of INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \param reg_addr[in] register byte address \param value[in] The data to be written @@ -101,7 +101,7 @@ STORAGE_CLASS_INPUT_FORMATTER_H void input_formatter_reg_store( const hrt_data value); /*! Read from a control register of INPUT_FORMATTER[ID] - + \param ID[in] INPUT_FORMATTER identifier \param reg_addr[in] register byte address \param value[in] The data to be written diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h index 6e37ff0fe0f91..786b3585fde38 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h @@ -30,7 +30,7 @@ typedef struct receiver_state_s receiver_state_t; \return none, state = INPUT_SYSTEM[ID].state */ -extern void input_system_get_state( +void input_system_get_state( const input_system_ID_t ID, input_system_state_t *state); @@ -41,7 +41,7 @@ extern void input_system_get_state( \return none, state = RECEIVER[ID].state */ -extern void receiver_get_state( +void receiver_get_state( const rx_ID_t ID, receiver_state_t *state); @@ -51,7 +51,7 @@ extern void receiver_get_state( \return mipi_format == YUV420 */ -extern bool is_mipi_format_yuv420( +bool is_mipi_format_yuv420( const mipi_format_t mipi_format); /*! Set compression parameters for cfg[cfg_ID] of RECEIVER[ID] @@ -62,12 +62,12 @@ extern bool is_mipi_format_yuv420( \param pred[in] Predictor method \NOTE: the storage of compression configuration is - implementation specific. The config can be - carried either on MIPI ports or on MIPI channels + implementation specific. The config can be + carried either on MIPI ports or on MIPI channels \return none, RECEIVER[ID].cfg[cfg_ID] = {comp, pred} */ -extern void receiver_set_compression( +void receiver_set_compression( const rx_ID_t ID, const unsigned int cfg_ID, const mipi_compressor_t comp, @@ -81,7 +81,7 @@ extern void receiver_set_compression( \return None, enable(RECEIVER[ID].PORT[port_ID]) */ -extern void receiver_port_enable( +void receiver_port_enable( const rx_ID_t ID, const enum mipi_port_id port_ID, const bool cnd); @@ -93,7 +93,7 @@ extern void receiver_port_enable( \return enable(RECEIVER[ID].PORT[port_ID]) == true */ -extern bool is_receiver_port_enabled( +bool is_receiver_port_enabled( const rx_ID_t ID, const enum mipi_port_id port_ID); @@ -105,7 +105,7 @@ extern bool is_receiver_port_enabled( \return None, enable(RECEIVER[ID].PORT[port_ID].irq_info) */ -extern void receiver_irq_enable( +void receiver_irq_enable( const rx_ID_t ID, const enum mipi_port_id port_ID, const rx_irq_info_t irq_info); @@ -117,7 +117,7 @@ extern void receiver_irq_enable( \return RECEIVER[ID].PORT[port_ID].irq_info */ -extern rx_irq_info_t receiver_get_irq_info( +rx_irq_info_t receiver_get_irq_info( const rx_ID_t ID, const enum mipi_port_id port_ID); @@ -129,7 +129,7 @@ extern rx_irq_info_t receiver_get_irq_info( \return None, clear(RECEIVER[ID].PORT[port_ID].irq_info) */ -extern void receiver_irq_clear( +void receiver_irq_clear( const rx_ID_t ID, const enum mipi_port_id port_ID, const rx_irq_info_t irq_info); @@ -242,8 +242,6 @@ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data input_system_sub_system_reg_load( const sub_system_ID_t sub_ID, const hrt_address reg); - - /////////////////////////////////////////////////////////////////////////// // // Functions for configuration phase on input system. @@ -268,107 +266,102 @@ input_system_error_t input_system_configuration_commit(void); // /////////////////////////////////////////////////////////////////////////// - // FIFO channel config function user input_system_error_t input_system_csi_fifo_channel_cfg( - uint32_t ch_id, + u32 ch_id, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, target_cfg2400_t target ); input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( - uint32_t ch_id, - uint32_t nof_frame, + u32 ch_id, + u32 nof_frame, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t mem_region_size, - uint32_t nof_mem_regions, + u32 mem_region_size, + u32 nof_mem_regions, target_cfg2400_t target ); - // SRAM channel config function user input_system_error_t input_system_csi_sram_channel_cfg( - uint32_t ch_id, + u32 ch_id, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t csi_mem_region_size, - uint32_t csi_nof_mem_regions, - target_cfg2400_t target + u32 csi_mem_region_size, + u32 csi_nof_mem_regions, + target_cfg2400_t target ); - //XMEM channel config function user input_system_error_t input_system_csi_xmem_channel_cfg( - uint32_t ch_id, + u32 ch_id, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t mem_region_size, - uint32_t nof_mem_regions, - uint32_t acq_mem_region_size, - uint32_t acq_nof_mem_regions, - target_cfg2400_t target, - uint32_t nof_xmem_buffers + u32 mem_region_size, + u32 nof_mem_regions, + u32 acq_mem_region_size, + u32 acq_nof_mem_regions, + target_cfg2400_t target, + uint32_t nof_xmem_buffers ); input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, + u32 ch_id, + u32 nof_frames, input_system_csi_port_t port, - uint32_t csi_mem_region_size, - uint32_t csi_nof_mem_regions, - uint32_t acq_mem_region_size, - uint32_t acq_nof_mem_regions, - target_cfg2400_t target + u32 csi_mem_region_size, + u32 csi_nof_mem_regions, + u32 acq_mem_region_size, + u32 acq_nof_mem_regions, + target_cfg2400_t target ); input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, + u32 ch_id, + u32 nof_frames, input_system_csi_port_t port, backend_channel_cfg_t backend_ch, - uint32_t acq_mem_region_size, - uint32_t acq_nof_mem_regions, - target_cfg2400_t target + u32 acq_mem_region_size, + u32 acq_nof_mem_regions, + target_cfg2400_t target ); // Non - CSI channel config function user input_system_error_t input_system_prbs_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, - uint32_t seed, - uint32_t sync_gen_width, - uint32_t sync_gen_height, - uint32_t sync_gen_hblank_cycles, - uint32_t sync_gen_vblank_cycles, + u32 ch_id, + u32 nof_frames, + u32 seed, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, target_cfg2400_t target ); - input_system_error_t input_system_tpg_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames,//not used yet - uint32_t x_mask, - uint32_t y_mask, - uint32_t x_delta, - uint32_t y_delta, - uint32_t xy_mask, - uint32_t sync_gen_width, - uint32_t sync_gen_height, - uint32_t sync_gen_hblank_cycles, - uint32_t sync_gen_vblank_cycles, + u32 ch_id, + u32 nof_frames,//not used yet + u32 x_mask, + u32 y_mask, + u32 x_delta, + u32 y_delta, + u32 xy_mask, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, target_cfg2400_t target ); - input_system_error_t input_system_gpfifo_channel_cfg( - uint32_t ch_id, - uint32_t nof_frames, + u32 ch_id, + u32 nof_frames, target_cfg2400_t target ); #endif /* #ifdef USE_INPUT_SYSTEM_VERSION_2401 */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h index 9aeaf8f082d26..79d16c0550f04 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h @@ -25,7 +25,7 @@ \return none, state = IRQ[ID].state */ -extern void irq_controller_get_state( +void irq_controller_get_state( const irq_ID_t ID, irq_controller_state_t *state); @@ -61,7 +61,7 @@ STORAGE_CLASS_IRQ_H hrt_data irq_reg_load( \return none, enable(IRQ[ID].channel[irq_ID]) */ -extern void irq_enable_channel( +void irq_enable_channel( const irq_ID_t ID, const unsigned int irq_ID); @@ -72,9 +72,9 @@ extern void irq_enable_channel( \return none */ -extern void irq_enable_pulse( +void irq_enable_pulse( const irq_ID_t ID, - bool pulse); + bool pulse); /*! Disable an IRQ channel of IRQ[ID] @@ -83,7 +83,7 @@ extern void irq_enable_pulse( \return none, disable(IRQ[ID].channel[irq_ID]) */ -extern void irq_disable_channel( +void irq_disable_channel( const irq_ID_t ID, const unsigned int irq); @@ -93,7 +93,7 @@ extern void irq_disable_channel( \return none, clear(IRQ[ID].channel[]) */ -extern void irq_clear_all( +void irq_clear_all( const irq_ID_t ID); /*! Return the ID of a signalling IRQ channel of IRQ[ID] @@ -107,7 +107,7 @@ extern void irq_clear_all( \return state(IRQ[ID]) */ -extern enum hrt_isp_css_irq_status irq_get_channel_id( +enum hrt_isp_css_irq_status irq_get_channel_id( const irq_ID_t ID, unsigned int *irq_id); @@ -118,7 +118,7 @@ extern enum hrt_isp_css_irq_status irq_get_channel_id( \return none, signal(IRQ[ID].channel[irq_id]) */ -extern void irq_raise( +void irq_raise( const irq_ID_t ID, const irq_sw_channel_id_t irq_id); @@ -126,7 +126,7 @@ extern void irq_raise( \return any(VIRQ.channel[irq_ID] != 0) */ -extern bool any_virq_signal(void); +bool any_virq_signal(void); /*! Enable an IRQ channel of the virtual super IRQ @@ -135,7 +135,7 @@ extern bool any_virq_signal(void); \return none, VIRQ.channel[irq_ID].enable = en */ -extern void cnd_virq_enable_channel( +void cnd_virq_enable_channel( const virq_id_t irq_ID, const bool en); @@ -143,7 +143,7 @@ extern void cnd_virq_enable_channel( \return none, clear(VIRQ.channel[]) */ -extern void virq_clear_all(void); +void virq_clear_all(void); /*! Clear the IRQ info state of the virtual super IRQ @@ -151,7 +151,7 @@ extern void virq_clear_all(void); \return none */ -extern void virq_clear_info( +void virq_clear_info( virq_info_t *irq_info); /*! Return the ID of a signalling IRQ channel of the virtual super IRQ @@ -164,7 +164,7 @@ extern void virq_clear_info( \return state(IRQ[...]) */ -extern enum hrt_isp_css_irq_status virq_get_channel_id( +enum hrt_isp_css_irq_status virq_get_channel_id( virq_id_t *irq_id); /*! Return the IDs of all signaling IRQ channels of the virtual super IRQ @@ -178,7 +178,7 @@ extern enum hrt_isp_css_irq_status virq_get_channel_id( \return (error(state(IRQ[...])) */ -extern enum hrt_isp_css_irq_status virq_get_channel_signals( +enum hrt_isp_css_irq_status virq_get_channel_signals( virq_info_t *irq_info); #endif /* __IRQ_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h index 808ec050efc0f..e0bbc6499c732 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h @@ -25,7 +25,7 @@ \return none, if(cnd) enable(ISP[ID].irq) else disable(ISP[ID].irq) */ -extern void cnd_isp_irq_enable( +void cnd_isp_irq_enable( const isp_ID_t ID, const bool cnd); @@ -37,12 +37,11 @@ extern void cnd_isp_irq_enable( \return none, state = ISP[ID].state, stall = ISP[ID].stall */ -extern void isp_get_state( +void isp_get_state( const isp_ID_t ID, isp_state_t *state, isp_stall_t *stall); - /*! Write to the status and control register of ISP[ID] \param ID[in] ISP identifier @@ -172,12 +171,12 @@ STORAGE_CLASS_ISP_H uint32_t isp_dmem_load_uint32( \return x0 | (x1 << bits_per_vector_element) */ STORAGE_CLASS_ISP_H uint32_t isp_2w_cat_1w( - const uint16_t x0, + const u16 x0, const uint16_t x1); -unsigned isp_is_ready(isp_ID_t ID); +unsigned int isp_is_ready(isp_ID_t ID); -unsigned isp_is_sleeping(isp_ID_t ID); +unsigned int isp_is_sleeping(isp_ID_t ID); void isp_start(isp_ID_t ID); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_dma_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_dma_public.h index 4b1603895f061..962555a84f034 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_dma_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_dma_public.h @@ -29,7 +29,7 @@ STORAGE_CLASS_ISYS2401_DMA_H hrt_data isys2401_dma_reg_load( const isys2401_dma_ID_t dma_id, const unsigned int reg); -extern void isys2401_dma_set_max_burst_size( +void isys2401_dma_set_max_burst_size( const isys2401_dma_ID_t dma_id, uint32_t max_burst_size); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/mmu_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/mmu_public.h index bbff4128603b0..db3eb31bc8652 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/mmu_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/mmu_public.h @@ -26,7 +26,7 @@ \return none, MMU[ID].page_table_base_index = base_index */ -extern void mmu_set_page_table_base_index( +void mmu_set_page_table_base_index( const mmu_ID_t ID, const hrt_data base_index); @@ -37,7 +37,7 @@ extern void mmu_set_page_table_base_index( \return MMU[ID].page_table_base_index */ -extern hrt_data mmu_get_page_table_base_index( +hrt_data mmu_get_page_table_base_index( const mmu_ID_t ID); /*! Invalidate the page table cache of MMU[ID] @@ -46,15 +46,14 @@ extern hrt_data mmu_get_page_table_base_index( \return none */ -extern void mmu_invalidate_cache( +void mmu_invalidate_cache( const mmu_ID_t ID); - /*! Invalidate the page table cache of all MMUs \return none */ -extern void mmu_invalidate_cache_all(void); +void mmu_invalidate_cache_all(void); /*! Write to a control register of MMU[ID] @@ -70,12 +69,11 @@ static inline void mmu_reg_store( const hrt_data value) { assert(ID < N_MMU_ID); - assert(MMU_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(MMU_BASE[ID] + reg*sizeof(hrt_data), value); + assert(MMU_BASE[ID] != (hrt_address) - 1); + ia_css_device_store_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data), value); return; } - /*! Read from a control register of MMU[ID] \param ID[in] MMU identifier @@ -89,8 +87,8 @@ static inline hrt_data mmu_reg_load( const unsigned int reg) { assert(ID < N_MMU_ID); - assert(MMU_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(MMU_BASE[ID] + reg*sizeof(hrt_data)); + assert(MMU_BASE[ID] != (hrt_address) - 1); + return ia_css_device_load_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data)); } #endif /* __MMU_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/sp_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/sp_public.h index 974ce6a33b4bc..ce3f2404e057d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/sp_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/sp_public.h @@ -22,25 +22,25 @@ typedef struct sp_state_s sp_state_t; typedef struct sp_stall_s sp_stall_t; /*! Enable or disable the program complete irq signal of SP[ID] - + \param ID[in] SP identifier \param cnd[in] predicate \return none, if(cnd) enable(SP[ID].irq) else disable(SP[ID].irq) */ -extern void cnd_sp_irq_enable( +void cnd_sp_irq_enable( const sp_ID_t ID, const bool cnd); /*! Read the state of cell SP[ID] - + \param ID[in] SP identifier \param state[out] sp state structure \param stall[out] isp stall conditions \return none, state = SP[ID].state, stall = SP[ID].stall */ -extern void sp_get_state( +void sp_get_state( const sp_ID_t ID, sp_state_t *state, sp_stall_t *stall); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/tag_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/tag_public.h index 22ef747f3d4a9..afd5a59489ccf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/tag_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/tag_public.h @@ -38,4 +38,3 @@ unsigned int sh_css_encode_tag_descr(struct sh_css_tag_descr *tag); #endif /* __TAG_PUBLIC_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/timed_ctrl_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/timed_ctrl_public.h index b3becac16f497..6472ac5f11977 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/timed_ctrl_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/timed_ctrl_public.h @@ -30,7 +30,7 @@ STORAGE_CLASS_TIMED_CTRL_H void timed_ctrl_reg_store( const unsigned int reg_addr, const hrt_data value); -extern void timed_ctrl_snd_commnd( +void timed_ctrl_snd_commnd( const timed_ctrl_ID_t ID, hrt_data mask, hrt_data condition, @@ -38,7 +38,7 @@ extern void timed_ctrl_snd_commnd( hrt_address addr, hrt_data value); -extern void timed_ctrl_snd_sp_commnd( +void timed_ctrl_snd_sp_commnd( const timed_ctrl_ID_t ID, hrt_data mask, hrt_data condition, @@ -47,7 +47,7 @@ extern void timed_ctrl_snd_sp_commnd( hrt_address offset, hrt_data value); -extern void timed_ctrl_snd_gpio_commnd( +void timed_ctrl_snd_gpio_commnd( const timed_ctrl_ID_t ID, hrt_data mask, hrt_data condition, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vamem_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vamem_public.h index cee15d0ab2d86..577b9b8449e8c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vamem_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vamem_public.h @@ -15,6 +15,4 @@ #ifndef __VAMEM_PUBLIC_H_INCLUDED__ #define __VAMEM_PUBLIC_H_INCLUDED__ - - #endif /* __VAMEM_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/ibuf_ctrl.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/ibuf_ctrl.h index c7d9095472b1a..f9cf7b5860457 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/ibuf_ctrl.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/ibuf_ctrl.h @@ -15,7 +15,6 @@ #ifndef __IBUF_CTRL_H_INCLUDED__ #define __IBUF_CTRL_H_INCLUDED__ - /* * This file is included on every cell {SP,ISP,host} and on every system * that uses the input system device(s). It defines the API to DLI bridge @@ -31,7 +30,6 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "ibuf_ctrl_local.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_formatter.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_formatter.h index eeaaecdd57ba1..377996e0536d5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_formatter.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_formatter.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "input_formatter_local.h" #ifndef __INLINE_INPUT_FORMATTER__ #define STORAGE_CLASS_INPUT_FORMATTER_H extern -#define STORAGE_CLASS_INPUT_FORMATTER_C +#define STORAGE_CLASS_INPUT_FORMATTER_C #include "input_formatter_public.h" #else /* __INLINE_INPUT_FORMATTER__ */ #define STORAGE_CLASS_INPUT_FORMATTER_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_system.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_system.h index 3f02d9ec9588f..33ab8a85909e6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_system.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_system.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "input_system_local.h" #ifndef __INLINE_INPUT_SYSTEM__ #define STORAGE_CLASS_INPUT_SYSTEM_H extern -#define STORAGE_CLASS_INPUT_SYSTEM_C +#define STORAGE_CLASS_INPUT_SYSTEM_C #include "input_system_public.h" #else /* __INLINE_INPUT_SYSTEM__ */ #define STORAGE_CLASS_INPUT_SYSTEM_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/irq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/irq.h index e1446388dee5d..133dd9014fef5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/irq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/irq.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "irq_local.h" #ifndef __INLINE_IRQ__ #define STORAGE_CLASS_IRQ_H extern -#define STORAGE_CLASS_IRQ_C +#define STORAGE_CLASS_IRQ_C #include "irq_public.h" #else /* __INLINE_IRQ__ */ #define STORAGE_CLASS_IRQ_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isp.h index b916953e7f47d..749610b8a8313 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isp.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "isp_local.h" #ifndef __INLINE_ISP__ #define STORAGE_CLASS_ISP_H extern -#define STORAGE_CLASS_ISP_C +#define STORAGE_CLASS_ISP_C #include "isp_public.h" #else /* __INLINE_iSP__ */ #define STORAGE_CLASS_ISP_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_dma.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_dma.h index 76aba114a5c1b..dbdd17115018b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_dma.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_dma.h @@ -15,7 +15,6 @@ #ifndef __ISYS_DMA_H_INCLUDED__ #define __ISYS_DMA_H_INCLUDED__ - /* * This file is included on every cell {SP,ISP,host} and on every system * that uses the input system device(s). It defines the API to DLI bridge @@ -31,7 +30,6 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "isys_dma_local.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h index 16fbf9d25eba7..e2ebeb14e7c22 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h @@ -15,7 +15,6 @@ #ifndef __ISYS_STREAM2MMIO_H_INCLUDED__ #define __ISYS_STREAM2MMIO_H_INCLUDED__ - /* * This file is included on every cell {SP,ISP,host} and on every system * that uses the input system device(s). It defines the API to DLI bridge @@ -31,7 +30,6 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "isys_stream2mmio_local.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h index 7c52ba54fcf17..b633cfaac1da3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h @@ -64,28 +64,25 @@ #define CEIL_DIV(a, b) (((b) != 0) ? ((a) + (b) - 1) / (b) : 0) #define CEIL_MUL(a, b) (CEIL_DIV(a, b) * (b)) #define CEIL_MUL2(a, b) (((a) + (b) - 1) & ~((b) - 1)) -#define CEIL_SHIFT(a, b) (((a) + (1 << (b)) - 1)>>(b)) +#define CEIL_SHIFT(a, b) (((a) + (1 << (b)) - 1) >> (b)) #define CEIL_SHIFT_MUL(a, b) (CEIL_SHIFT(a, b) << (b)) #ifdef ISP2401 #define ROUND_HALF_DOWN_DIV(a, b) (((b) != 0) ? ((a) + (b / 2) - 1) / (b) : 0) #define ROUND_HALF_DOWN_MUL(a, b) (ROUND_HALF_DOWN_DIV(a, b) * (b)) #endif - /*To Find next power of 2 number from x */ #define bit2(x) ((x) | ((x) >> 1)) #define bit4(x) (bit2(x) | (bit2(x) >> 2)) #define bit8(x) (bit4(x) | (bit4(x) >> 4)) #define bit16(x) (bit8(x) | (bit8(x) >> 8)) #define bit32(x) (bit16(x) | (bit16(x) >> 16)) -#define NEXT_POWER_OF_2(x) (bit32(x-1) + 1) - +#define NEXT_POWER_OF_2(x) (bit32(x - 1) + 1) /* min and max should not be macros as they will evaluate their arguments twice. if you really need a macro (e.g. for CPP or for initializing an array) use MIN() and MAX(), otherwise use min() and max(). - */ #if !defined(PIPE_GENERATION) @@ -133,7 +130,6 @@ static inline unsigned int umin(unsigned int a, unsigned int b) return MIN(a, b); } - static inline unsigned int ceil_mul(unsigned int a, unsigned int b) { return CEIL_MUL(a, b); @@ -190,17 +186,17 @@ static inline unsigned int ceil_pow2(unsigned int a) return 1; } /* IF input is already a power of two*/ - else if ((!((a)&((a)-1)))) { + else if ((!((a) & ((a) - 1)))) { return a; - } - else { + } else { unsigned int v = a; - v |= v>>1; - v |= v>>2; - v |= v>>4; - v |= v>>8; - v |= v>>16; - return (v+1); + + v |= v >> 1; + v |= v >> 2; + v |= v >> 4; + v |= v >> 8; + v |= v >> 16; + return (v + 1); } } @@ -211,8 +207,7 @@ static inline unsigned int ceil_pow2(unsigned int a) * For SP and ISP, SDK provides the definition of OP_std_modadd. * We need it only for host */ -#define OP_std_modadd(base, offset, size) ((base+offset)%(size)) +#define OP_std_modadd(base, offset, size) ((base + offset) % (size)) #endif /* !defined(__ISP) */ - #endif /* __MATH_SUPPORT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h index f06d52533531e..32fd13efe8020 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h @@ -97,7 +97,7 @@ extern const hrt_vaddress mmgr_EXCEPTION; \return vaddress */ -extern hrt_vaddress mmgr_malloc(const size_t size); +hrt_vaddress mmgr_malloc(const size_t size); /*! Return the address of a zero initialised allocation in memory @@ -106,7 +106,7 @@ extern hrt_vaddress mmgr_malloc(const size_t size); \return vaddress */ -extern hrt_vaddress mmgr_calloc(const size_t N, const size_t size); +hrt_vaddress mmgr_calloc(const size_t N, const size_t size); /*! Return the address of an allocation in memory @@ -117,7 +117,7 @@ extern hrt_vaddress mmgr_calloc(const size_t N, const size_t size); \return vaddress */ -extern hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attribute); +hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attribute); /*! Return the address of a mapped existing allocation in memory @@ -136,10 +136,10 @@ extern hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attribute) \return vaddress */ -extern hrt_vaddress mmgr_mmap( +hrt_vaddress mmgr_mmap( const void __user *ptr, const size_t size, - uint16_t attribute, + u16 attribute, void *context); /*! Zero initialise an allocation in memory @@ -149,7 +149,7 @@ extern hrt_vaddress mmgr_mmap( \return none */ -extern void mmgr_clear(hrt_vaddress vaddr, const size_t size); +void mmgr_clear(hrt_vaddress vaddr, const size_t size); /*! Read an array of bytes from a virtual memory address @@ -159,7 +159,7 @@ extern void mmgr_clear(hrt_vaddress vaddr, const size_t size); \return none */ -extern void mmgr_load(const hrt_vaddress vaddr, void *data, const size_t size); +void mmgr_load(const hrt_vaddress vaddr, void *data, const size_t size); /*! Write an array of bytes to device registers or memory in the device @@ -169,6 +169,6 @@ extern void mmgr_load(const hrt_vaddress vaddr, void *data, const size_t size); \return none */ -extern void mmgr_store(const hrt_vaddress vaddr, const void *data, const size_t size); +void mmgr_store(const hrt_vaddress vaddr, const void *data, const size_t size); #endif /* __MEMORY_ACCESS_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h index f3b7273fed1b0..53937aa69dd24 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h @@ -29,7 +29,7 @@ more details. #include "ia_css_err.h" bool reallocate_buffer( - hrt_vaddress *curr_buf, + hrt_vaddress * curr_buf, size_t *curr_size, size_t needed_size, bool force, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h index 8f6f1dc40095d..1a36cb493fd8e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h @@ -31,7 +31,6 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "mmu_local.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h index 418d02382d768..74335fdeff7d5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h @@ -15,7 +15,6 @@ #ifndef __PIXELGEN_H_INCLUDED__ #define __PIXELGEN_H_INCLUDED__ - /* * This file is included on every cell {SP,ISP,host} and on every system * that uses the input system device(s). It defines the API to DLI bridge @@ -31,7 +30,6 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "pixelgen_local.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h index 37e8116b74a4d..f5fcf6b1d667d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h @@ -15,14 +15,14 @@ #ifndef __PRINT_SUPPORT_H_INCLUDED__ #define __PRINT_SUPPORT_H_INCLUDED__ - #include -extern int (*sh_css_printf) (const char *fmt, va_list args); +extern int (*sh_css_printf)(const char *fmt, va_list args); /* depends on host supplied print function in ia_css_init() */ static inline void ia_css_print(const char *fmt, ...) { va_list ap; + if (sh_css_printf) { va_start(ap, fmt); sh_css_printf(fmt, ap); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h index aa5fadf5aadb1..1bcadd838161b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h @@ -29,12 +29,11 @@ * */ - #include "queue_local.h" #ifndef __INLINE_QUEUE__ #define STORAGE_CLASS_QUEUE_H extern -#define STORAGE_CLASS_QUEUE_C +#define STORAGE_CLASS_QUEUE_C /* #include "queue_public.h" */ #include "ia_css_queue.h" #else /* __INLINE_QUEUE__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h index bd9f53e6b6800..129446600067b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h @@ -30,13 +30,12 @@ * */ - #include "system_local.h" #include "resource_local.h" #ifndef __INLINE_RESOURCE__ #define STORAGE_CLASS_RESOURCE_H extern -#define STORAGE_CLASS_RESOURCE_C +#define STORAGE_CLASS_RESOURCE_C #include "resource_public.h" #else /* __INLINE_RESOURCE__ */ #define STORAGE_CLASS_RESOURCE_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h index 43cfb0cb4aa8d..81942a5d9fa41 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h @@ -30,7 +30,6 @@ * */ - #include "system_local.h" #include "socket_local.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h index 8f57f2060791f..194cd64a7da8e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "sp_local.h" #ifndef __INLINE_SP__ #define STORAGE_CLASS_SP_H extern -#define STORAGE_CLASS_SP_C +#define STORAGE_CLASS_SP_C #include "sp_public.h" #else /* __INLINE_SP__ */ #define STORAGE_CLASS_SP_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h index f4d9674cdab64..5fbabf4d37220 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h @@ -22,7 +22,6 @@ * For all non microsoft cases, we need the following functions */ - /* @brief Copy from src_buf to dest_buf. * * @param[out] dest_buf. Destination buffer to copy to @@ -34,12 +33,12 @@ * @return ERANGE on Destination size too small */ static inline int memcpy_s( - void* dest_buf, + void *dest_buf, size_t dest_size, - const void* src_buf, + const void *src_buf, size_t src_size) { - if ((src_buf == NULL) || (dest_buf == NULL)) { + if ((!src_buf) || (!dest_buf)) { /* Invalid arguments*/ return EINVAL; } @@ -62,11 +61,12 @@ static inline int memcpy_s( * @return Returns 0 if src_str is NULL */ static size_t strnlen_s( - const char* src_str, + const char *src_str, size_t max_len) { size_t ix; - if (src_str == NULL) { + + if (!src_str) { /* Invalid arguments*/ return 0; } @@ -89,18 +89,19 @@ static size_t strnlen_s( * @return Returns ERANGE on destination size too small */ static inline int strncpy_s( - char* dest_str, + char *dest_str, size_t dest_size, - const char* src_str, + const char *src_str, size_t src_size) { size_t len; - if (dest_str == NULL) { + + if (!dest_str) { /* Invalid arguments*/ return EINVAL; } - if ((src_str == NULL) || (dest_size == 0)) { + if ((!src_str) || (dest_size == 0)) { /* Invalid arguments*/ dest_str[0] = '\0'; return EINVAL; @@ -130,17 +131,18 @@ static inline int strncpy_s( * @return Returns ERANGE on destination size too small */ static inline int strcpy_s( - char* dest_str, + char *dest_str, size_t dest_size, - const char* src_str) + const char *src_str) { size_t len; - if (dest_str == NULL) { + + if (!dest_str) { /* Invalid arguments*/ return EINVAL; } - if ((src_str == NULL) || (dest_size == 0)) { + if ((!src_str) || (dest_size == 0)) { /* Invalid arguments*/ dest_str[0] = '\0'; return EINVAL; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h index a8c19cee17da2..764fda8dd214a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h @@ -19,7 +19,6 @@ * Platform specific types. */ - #include "system_local.h" #endif /* __SYSTEM_TYPES_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h index ace6956433698..1f0a5d9483169 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h @@ -29,12 +29,11 @@ * */ - #include "tag_local.h" #ifndef __INLINE_TAG__ #define STORAGE_CLASS_TAG_H extern -#define STORAGE_CLASS_TAG_C +#define STORAGE_CLASS_TAG_C #include "tag_public.h" #else /* __INLINE_TAG__ */ #define STORAGE_CLASS_TAG_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h index f6bc1c47553f4..403abcb828bf4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "timed_ctrl_local.h" #ifndef __INLINE_TIMED_CTRL__ #define STORAGE_CLASS_TIMED_CTRL_H extern -#define STORAGE_CLASS_TIMED_CTRL_C +#define STORAGE_CLASS_TIMED_CTRL_C #include "timed_ctrl_public.h" #else /* __INLINE_TIMED_CTRL__ */ #define STORAGE_CLASS_TIMED_CTRL_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h index 82d447bf9704e..032f371a72c40 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "vamem_local.h" #ifndef __INLINE_VAMEM__ #define STORAGE_CLASS_VAMEM_H extern -#define STORAGE_CLASS_VAMEM_C +#define STORAGE_CLASS_VAMEM_C #include "vamem_public.h" #else /* __INLINE_VAMEM__ */ #define STORAGE_CLASS_VAMEM_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h index d3375729c4415..873e01e6d0544 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h @@ -29,13 +29,12 @@ * - local: system and cell specific constants and identifiers */ - #include "system_local.h" #include "vmem_local.h" #ifndef __INLINE_VMEM__ #define STORAGE_CLASS_VMEM_H extern -#define STORAGE_CLASS_VMEM_C +#define STORAGE_CLASS_VMEM_C #include "vmem_public.h" #else /* __INLINE_VMEM__ */ #define STORAGE_CLASS_VMEM_H static inline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c index 2cf1d58941bfc..0fe1ce1d122e1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c @@ -31,7 +31,7 @@ sh_css_create_tag_descr(int num_captures, unsigned int exp_id, struct sh_css_tag_descr *tag_descr) { - assert(tag_descr != NULL); + assert(tag_descr); tag_descr->num_captures = num_captures; tag_descr->skip = skip; @@ -55,7 +55,7 @@ sh_css_encode_tag_descr(struct sh_css_tag_descr *tag) unsigned int exp_id; unsigned int encoded_tag; - assert(tag != NULL); + assert(tag); if (tag->num_captures < 0) { num_captures = -tag->num_captures; @@ -80,16 +80,14 @@ sh_css_encode_tag_descr(struct sh_css_tag_descr *tag) assert((num_captures == 0) && (skip == 0) && (offset == 0)); encoded_tag = TAG_EXP | (exp_id & 0xFF) << TAG_EXP_ID_SHIFT; - } - else + } else { - encoded_tag = TAG_CAP + encoded_tag = TAG_CAP | ((num_captures_sign & 0x00000001) << TAG_NUM_CAPTURES_SIGN_SHIFT) | ((offset_sign & 0x00000001) << TAG_OFFSET_SIGN_SHIFT) | ((num_captures & 0x000000FF) << TAG_NUM_CAPTURES_SHIFT) | ((skip & 0x000000FF) << TAG_OFFSET_SHIFT) | ((offset & 0x000000FF) << TAG_SKIP_SHIFT); - } return encoded_tag; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h index 61330daab7344..ce0d994185387 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h @@ -16,4 +16,3 @@ #define __QUEUE_GLOBAL_H_INCLUDED__ #endif /* __QUEUE_GLOBAL_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h index c0d2efadbbe3d..549c0d2b79708 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h @@ -33,4 +33,3 @@ enum ia_css_isys_sw_event { }; #endif /* __SW_EVENT_GLOBAL_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h index fda457792c9ca..9db8766b3a7be 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h @@ -21,12 +21,12 @@ #define TAG_EXP 2 #define TAG_NUM_CAPTURES_SIGN_SHIFT 6 -#define TAG_OFFSET_SIGN_SHIFT 7 -#define TAG_NUM_CAPTURES_SHIFT 8 -#define TAG_OFFSET_SHIFT 16 -#define TAG_SKIP_SHIFT 24 +#define TAG_OFFSET_SIGN_SHIFT 7 +#define TAG_NUM_CAPTURES_SHIFT 8 +#define TAG_OFFSET_SHIFT 16 +#define TAG_SKIP_SHIFT 24 -#define TAG_EXP_ID_SHIFT 8 +#define TAG_EXP_ID_SHIFT 8 /* Data structure containing the tagging information which is used in * continuous mode to specify which frames should be captured. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h index 080198796ad0d..919574a203917 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h @@ -48,15 +48,16 @@ struct ia_css_isp_3a_statistics { struct { ia_css_ptr rgby_tbl; } data_hmem; - uint32_t exp_id; /** exposure id, to match statistics to a frame, - see ia_css_event_public.h for more detail. */ - uint32_t isp_config_id;/** Unique ID to track which config was actually applied to a particular frame */ + u32 exp_id; /** exposure id, to match statistics to a frame, + see ia_css_event_public.h for more detail. */ + u32 isp_config_id;/** Unique ID to track which config was actually applied to a particular frame */ ia_css_ptr data_ptr; /** pointer to base of all data */ - uint32_t size; /** total size of all data */ - uint32_t dmem_size; - uint32_t vmem_size; /** both lo and hi have this size */ - uint32_t hmem_size; + u32 size; /** total size of all data */ + u32 dmem_size; + u32 vmem_size; /** both lo and hi have this size */ + u32 hmem_size; }; + #define SIZE_OF_DMEM_STRUCT \ (SIZE_OF_IA_CSS_PTR) @@ -87,11 +88,11 @@ struct ia_css_isp_3a_statistics { struct ia_css_isp_3a_statistics_map { void *data_ptr; /** Pointer to start of memory */ struct ia_css_3a_output *dmem_stats; - uint16_t *vmem_stats_hi; - uint16_t *vmem_stats_lo; + u16 *vmem_stats_hi; + u16 *vmem_stats_lo; struct ia_css_bh_table *hmem_stats; - uint32_t size; /** total size in bytes of data_ptr */ - uint32_t data_allocated; /** indicate whether data_ptr + u32 size; /** total size in bytes of data_ptr */ + u32 data_allocated; /** indicate whether data_ptr was allocated or not. */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h index 138bc3bb4627e..3aac8d8f60231 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h @@ -77,120 +77,120 @@ struct ia_css_blob_descr; */ struct ia_css_blob_info { /** Static blob data */ - uint32_t offset; /** Blob offset in fw file */ + u32 offset; /** Blob offset in fw file */ struct ia_css_isp_param_memory_offsets memory_offsets; /** offset wrt hdr in bytes */ - uint32_t prog_name_offset; /** offset wrt hdr in bytes */ - uint32_t size; /** Size of blob */ - uint32_t padding_size; /** total cummulative of bytes added due to section alignment */ - uint32_t icache_source; /** Position of icache in blob */ - uint32_t icache_size; /** Size of icache section */ - uint32_t icache_padding;/** bytes added due to icache section alignment */ - uint32_t text_source; /** Position of text in blob */ - uint32_t text_size; /** Size of text section */ - uint32_t text_padding; /** bytes added due to text section alignment */ - uint32_t data_source; /** Position of data in blob */ - uint32_t data_target; /** Start of data in SP dmem */ - uint32_t data_size; /** Size of text section */ - uint32_t data_padding; /** bytes added due to data section alignment */ - uint32_t bss_target; /** Start position of bss in SP dmem */ - uint32_t bss_size; /** Size of bss section */ + u32 prog_name_offset; /** offset wrt hdr in bytes */ + u32 size; /** Size of blob */ + u32 padding_size; /** total cummulative of bytes added due to section alignment */ + u32 icache_source; /** Position of icache in blob */ + u32 icache_size; /** Size of icache section */ + u32 icache_padding;/** bytes added due to icache section alignment */ + u32 text_source; /** Position of text in blob */ + u32 text_size; /** Size of text section */ + u32 text_padding; /** bytes added due to text section alignment */ + u32 data_source; /** Position of data in blob */ + u32 data_target; /** Start of data in SP dmem */ + u32 data_size; /** Size of text section */ + u32 data_padding; /** bytes added due to data section alignment */ + u32 bss_target; /** Start position of bss in SP dmem */ + u32 bss_size; /** Size of bss section */ /** Dynamic data filled by loader */ CSS_ALIGN(const void *code, 8); /** Code section absolute pointer within fw, code = icache + text */ CSS_ALIGN(const void *data, 8); /** Data section absolute pointer within fw, data = data + bss */ }; struct ia_css_binary_input_info { - uint32_t min_width; - uint32_t min_height; - uint32_t max_width; - uint32_t max_height; - uint32_t source; /* memory, sensor, variable */ + u32 min_width; + u32 min_height; + u32 max_width; + u32 max_height; + u32 source; /* memory, sensor, variable */ }; struct ia_css_binary_output_info { - uint32_t min_width; - uint32_t min_height; - uint32_t max_width; - uint32_t max_height; - uint32_t num_chunks; - uint32_t variable_format; + u32 min_width; + u32 min_height; + u32 max_width; + u32 max_height; + u32 num_chunks; + u32 variable_format; }; struct ia_css_binary_internal_info { - uint32_t max_width; - uint32_t max_height; + u32 max_width; + u32 max_height; }; struct ia_css_binary_bds_info { - uint32_t supported_bds_factors; + u32 supported_bds_factors; }; struct ia_css_binary_dvs_info { - uint32_t max_envelope_width; - uint32_t max_envelope_height; + u32 max_envelope_width; + u32 max_envelope_height; }; struct ia_css_binary_vf_dec_info { - uint32_t is_variable; - uint32_t max_log_downscale; + u32 is_variable; + u32 max_log_downscale; }; struct ia_css_binary_s3a_info { - uint32_t s3atbl_use_dmem; - uint32_t fixed_s3a_deci_log; + u32 s3atbl_use_dmem; + u32 fixed_s3a_deci_log; }; /* DPC related binary info */ struct ia_css_binary_dpc_info { - uint32_t bnr_lite; /** bnr lite enable flag */ + u32 bnr_lite; /** bnr lite enable flag */ }; struct ia_css_binary_iterator_info { - uint32_t num_stripes; - uint32_t row_stripes_height; - uint32_t row_stripes_overlap_lines; + u32 num_stripes; + u32 row_stripes_height; + u32 row_stripes_overlap_lines; }; struct ia_css_binary_address_info { - uint32_t isp_addresses; /* Address in ISP dmem */ - uint32_t main_entry; /* Address of entry fct */ - uint32_t in_frame; /* Address in ISP dmem */ - uint32_t out_frame; /* Address in ISP dmem */ - uint32_t in_data; /* Address in ISP dmem */ - uint32_t out_data; /* Address in ISP dmem */ - uint32_t sh_dma_cmd_ptr; /* In ISP dmem */ + u32 isp_addresses; /* Address in ISP dmem */ + u32 main_entry; /* Address of entry fct */ + u32 in_frame; /* Address in ISP dmem */ + u32 out_frame; /* Address in ISP dmem */ + u32 in_data; /* Address in ISP dmem */ + u32 out_data; /* Address in ISP dmem */ + u32 sh_dma_cmd_ptr; /* In ISP dmem */ }; struct ia_css_binary_uds_info { - uint16_t bpp; - uint16_t use_bci; - uint16_t use_str; - uint16_t woix; - uint16_t woiy; - uint16_t extra_out_vecs; - uint16_t vectors_per_line_in; - uint16_t vectors_per_line_out; - uint16_t vectors_c_per_line_in; - uint16_t vectors_c_per_line_out; - uint16_t vmem_gdc_in_block_height_y; - uint16_t vmem_gdc_in_block_height_c; + u16 bpp; + u16 use_bci; + u16 use_str; + u16 woix; + u16 woiy; + u16 extra_out_vecs; + u16 vectors_per_line_in; + u16 vectors_per_line_out; + u16 vectors_c_per_line_in; + u16 vectors_c_per_line_out; + u16 vmem_gdc_in_block_height_y; + u16 vmem_gdc_in_block_height_c; /* uint16_t padding; */ }; struct ia_css_binary_pipeline_info { - uint32_t mode; - uint32_t isp_pipe_version; - uint32_t pipelining; - uint32_t c_subsampling; - uint32_t top_cropping; - uint32_t left_cropping; - uint32_t variable_resolution; + u32 mode; + u32 isp_pipe_version; + u32 pipelining; + u32 c_subsampling; + u32 top_cropping; + u32 left_cropping; + u32 variable_resolution; }; struct ia_css_binary_block_info { - uint32_t block_width; - uint32_t block_height; - uint32_t output_block_height; + u32 block_width; + u32 block_height; + u32 output_block_height; }; /* Structure describing an ISP binary. @@ -201,7 +201,7 @@ struct ia_css_binary_block_info { * thereby making the SP code more binary independent. */ struct ia_css_binary_info { - CSS_ALIGN(uint32_t id, 8); /* IA_CSS_BINARY_ID_* */ + CSS_ALIGN(u32 id, 8); /* IA_CSS_BINARY_ID_* */ struct ia_css_binary_pipeline_info pipeline; struct ia_css_binary_input_info input; struct ia_css_binary_output_info output; @@ -219,53 +219,53 @@ struct ia_css_binary_info { /* MW: Packing (related) bools in an integer ?? */ struct { #ifdef ISP2401 - uint8_t luma_only; - uint8_t input_yuv; - uint8_t input_raw; + u8 luma_only; + u8 input_yuv; + u8 input_raw; #endif - uint8_t reduced_pipe; - uint8_t vf_veceven; - uint8_t dis; - uint8_t dvs_envelope; - uint8_t uds; - uint8_t dvs_6axis; - uint8_t block_output; - uint8_t streaming_dma; - uint8_t ds; - uint8_t bayer_fir_6db; - uint8_t raw_binning; - uint8_t continuous; - uint8_t s3a; - uint8_t fpnr; - uint8_t sc; - uint8_t macc; - uint8_t output; - uint8_t ref_frame; - uint8_t tnr; - uint8_t xnr; - uint8_t params; - uint8_t ca_gdc; - uint8_t isp_addresses; - uint8_t in_frame; - uint8_t out_frame; - uint8_t high_speed; - uint8_t dpc; - uint8_t padding[2]; + u8 reduced_pipe; + u8 vf_veceven; + u8 dis; + u8 dvs_envelope; + u8 uds; + u8 dvs_6axis; + u8 block_output; + u8 streaming_dma; + u8 ds; + u8 bayer_fir_6db; + u8 raw_binning; + u8 continuous; + u8 s3a; + u8 fpnr; + u8 sc; + u8 macc; + u8 output; + u8 ref_frame; + u8 tnr; + u8 xnr; + u8 params; + u8 ca_gdc; + u8 isp_addresses; + u8 in_frame; + u8 out_frame; + u8 high_speed; + u8 dpc; + u8 padding[2]; } enable; struct { /* DMA channel ID: [0,...,HIVE_ISP_NUM_DMA_CHANNELS> */ - uint8_t ref_y_channel; - uint8_t ref_c_channel; - uint8_t tnr_channel; - uint8_t tnr_out_channel; - uint8_t dvs_coords_channel; - uint8_t output_channel; - uint8_t c_channel; - uint8_t vfout_channel; - uint8_t vfout_c_channel; - uint8_t vfdec_bits_per_pixel; - uint8_t claimed_by_isp; - uint8_t padding[2]; + u8 ref_y_channel; + u8 ref_c_channel; + u8 tnr_channel; + u8 tnr_out_channel; + u8 dvs_coords_channel; + u8 output_channel; + u8 c_channel; + u8 vfout_channel; + u8 vfout_c_channel; + u8 vfdec_bits_per_pixel; + u8 claimed_by_isp; + u8 padding[2]; } dma; }; @@ -279,14 +279,17 @@ struct ia_css_binary_xinfo { /* Rest of the binary info, only interesting to the host. */ enum ia_css_acc_type type; - CSS_ALIGN(int32_t num_output_formats, 8); + + CSS_ALIGN(s32 num_output_formats, 8); enum ia_css_frame_format output_formats[IA_CSS_FRAME_FORMAT_NUM]; - CSS_ALIGN(int32_t num_vf_formats, 8); /** number of supported vf formats */ + + CSS_ALIGN(s32 num_vf_formats, 8); /** number of supported vf formats */ enum ia_css_frame_format vf_formats[IA_CSS_FRAME_FORMAT_NUM]; /** types of supported vf formats */ - uint8_t num_output_pins; + u8 num_output_pins; ia_css_ptr xmem_addr; + CSS_ALIGN(const struct ia_css_blob_descr *blob, 8); - CSS_ALIGN(uint32_t blob_index, 8); + CSS_ALIGN(u32 blob_index, 8); CSS_ALIGN(union ia_css_all_memory_offsets mem_offsets, 8); CSS_ALIGN(struct ia_css_binary_xinfo *next, 8); }; @@ -296,11 +299,11 @@ struct ia_css_binary_xinfo { * the entry function in icache. */ struct ia_css_bl_info { - uint32_t num_dma_cmds; /** Number of cmds sent by CSS */ - uint32_t dma_cmd_list; /** Dma command list sent by CSS */ - uint32_t sw_state; /** Polled from css */ + u32 num_dma_cmds; /** Number of cmds sent by CSS */ + u32 dma_cmd_list; /** Dma command list sent by CSS */ + u32 sw_state; /** Polled from css */ /* Entry functions */ - uint32_t bl_entry; /** The SP entry function */ + u32 bl_entry; /** The SP entry function */ }; /* Structure describing the SP binary. @@ -308,38 +311,38 @@ struct ia_css_bl_info { * the entry function in pmem. */ struct ia_css_sp_info { - uint32_t init_dmem_data; /** data sect config, stored to dmem */ - uint32_t per_frame_data; /** Per frame data, stored to dmem */ - uint32_t group; /** Per pipeline data, loaded by dma */ - uint32_t output; /** SP output data, loaded by dmem */ - uint32_t host_sp_queue; /** Host <-> SP queues */ - uint32_t host_sp_com;/** Host <-> SP commands */ - uint32_t isp_started; /** Polled from sensor thread, csim only */ - uint32_t sw_state; /** Polled from css */ - uint32_t host_sp_queues_initialized; /** Polled from the SP */ - uint32_t sleep_mode; /** different mode to halt SP */ - uint32_t invalidate_tlb; /** inform SP to invalidate mmu TLB */ + u32 init_dmem_data; /** data sect config, stored to dmem */ + u32 per_frame_data; /** Per frame data, stored to dmem */ + u32 group; /** Per pipeline data, loaded by dma */ + u32 output; /** SP output data, loaded by dmem */ + u32 host_sp_queue; /** Host <-> SP queues */ + u32 host_sp_com;/** Host <-> SP commands */ + u32 isp_started; /** Polled from sensor thread, csim only */ + u32 sw_state; /** Polled from css */ + u32 host_sp_queues_initialized; /** Polled from the SP */ + u32 sleep_mode; /** different mode to halt SP */ + u32 invalidate_tlb; /** inform SP to invalidate mmu TLB */ #ifndef ISP2401 - uint32_t stop_copy_preview; /** suspend copy and preview pipe when capture */ + u32 stop_copy_preview; /** suspend copy and preview pipe when capture */ #endif - uint32_t debug_buffer_ddr_address; /** inform SP the address + u32 debug_buffer_ddr_address; /** inform SP the address of DDR debug queue */ - uint32_t perf_counter_input_system_error; /** input system perf + u32 perf_counter_input_system_error; /** input system perf counter array */ #ifdef HAS_WATCHDOG_SP_THREAD_DEBUG - uint32_t debug_wait; /** thread/pipe post mortem debug */ - uint32_t debug_stage; /** thread/pipe post mortem debug */ - uint32_t debug_stripe; /** thread/pipe post mortem debug */ + u32 debug_wait; /** thread/pipe post mortem debug */ + u32 debug_stage; /** thread/pipe post mortem debug */ + u32 debug_stripe; /** thread/pipe post mortem debug */ #endif - uint32_t threads_stack; /** sp thread's stack pointers */ - uint32_t threads_stack_size; /** sp thread's stack sizes */ - uint32_t curr_binary_id; /** current binary id */ - uint32_t raw_copy_line_count; /** raw copy line counter */ - uint32_t ddr_parameter_address; /** acc param ddrptr, sp dmem */ - uint32_t ddr_parameter_size; /** acc param size, sp dmem */ + u32 threads_stack; /** sp thread's stack pointers */ + u32 threads_stack_size; /** sp thread's stack sizes */ + u32 curr_binary_id; /** current binary id */ + u32 raw_copy_line_count; /** raw copy line counter */ + u32 ddr_parameter_address; /** acc param ddrptr, sp dmem */ + u32 ddr_parameter_size; /** acc param size, sp dmem */ /* Entry functions */ - uint32_t sp_entry; /** The SP entry function */ - uint32_t tagger_frames_addr; /** Base address of tagger state */ + u32 sp_entry; /** The SP entry function */ + u32 tagger_frames_addr; /** Base address of tagger state */ }; /* The following #if is there because this header file is also included @@ -351,7 +354,7 @@ struct ia_css_sp_info { /* Accelerator firmware information. */ struct ia_css_acc_info { - uint32_t per_frame_data; /** Dummy for now */ + u32 per_frame_data; /** Dummy for now */ }; /* Firmware information. @@ -367,15 +370,17 @@ union ia_css_fw_union { */ struct ia_css_fw_info { size_t header_size; /** size of fw header */ - CSS_ALIGN(uint32_t type, 8); + + CSS_ALIGN(u32 type, 8); union ia_css_fw_union info; /** Binary info */ struct ia_css_blob_info blob; /** Blob info */ /* Dynamic part */ struct ia_css_fw_info *next; - CSS_ALIGN(uint32_t loaded, 8); /** Firmware has been loaded */ - CSS_ALIGN(const uint8_t *isp_code, 8); /** ISP pointer to code */ + + CSS_ALIGN(u32 loaded, 8); /** Firmware has been loaded */ + CSS_ALIGN(const u8 *isp_code, 8); /** ISP pointer to code */ /** Firmware handle between user space and kernel */ - CSS_ALIGN(uint32_t handle, 8); + CSS_ALIGN(u32 handle, 8); /** Sections to copy from/to ISP */ struct ia_css_isp_param_css_segments mem_initializers; /** Initializer for local ISP memories */ @@ -394,14 +399,14 @@ struct ia_css_acc_fw; */ struct ia_css_acc_sp { void (*init)(struct ia_css_acc_fw *); /** init for crun */ - uint32_t sp_prog_name_offset; /** program name offset wrt hdr in bytes */ - uint32_t sp_blob_offset; /** blob offset wrt hdr in bytes */ + u32 sp_prog_name_offset; /** program name offset wrt hdr in bytes */ + u32 sp_blob_offset; /** blob offset wrt hdr in bytes */ void *entry; /** Address of sp entry point */ - uint32_t *css_abort; /** SP dmem abort flag */ + u32 *css_abort; /** SP dmem abort flag */ void *isp_code; /** SP dmem address holding xmem address of isp code */ struct ia_css_fw_info fw; /** SP fw descriptor */ - const uint8_t *code; /** ISP pointer of allocated SP code */ + const u8 *code; /** ISP pointer of allocated SP code */ }; /* Acceleration firmware descriptor. @@ -410,15 +415,15 @@ struct ia_css_acc_sp { */ struct ia_css_acc_fw_hdr { enum ia_css_acc_type type; /** Type of accelerator */ - uint32_t isp_prog_name_offset; /** program name offset wrt + u32 isp_prog_name_offset; /** program name offset wrt header in bytes */ - uint32_t isp_blob_offset; /** blob offset wrt header + u32 isp_blob_offset; /** blob offset wrt header in bytes */ - uint32_t isp_size; /** Size of isp blob */ - const uint8_t *isp_code; /** ISP pointer to code */ + u32 isp_size; /** Size of isp blob */ + const u8 *isp_code; /** ISP pointer to code */ struct ia_css_acc_sp sp; /** Standalone sp code */ /** Firmware handle between user space and kernel */ - uint32_t handle; + u32 handle; struct ia_css_data parameters; /** Current SP parameters */ }; @@ -440,7 +445,7 @@ struct ia_css_acc_fw { }; /* Access macros for firmware */ -#define IA_CSS_ACC_OFFSET(t, f, n) ((t)((uint8_t *)(f)+(f->header.n))) +#define IA_CSS_ACC_OFFSET(t, f, n) ((t)((uint8_t *)(f) + (f->header.n))) #define IA_CSS_ACC_SP_PROG_NAME(f) IA_CSS_ACC_OFFSET(const char *, f, \ sp.sp_prog_name_offset) #define IA_CSS_ACC_ISP_PROG_NAME(f) IA_CSS_ACC_OFFSET(const char *, f, \ @@ -454,9 +459,9 @@ struct ia_css_acc_fw { #define IA_CSS_ACC_ISP_SIZE(f) ((f)->header.isp_size) /* Binary name follows header immediately */ -#define IA_CSS_EXT_ISP_PROG_NAME(f) ((const char *)(f)+(f)->blob.prog_name_offset) +#define IA_CSS_EXT_ISP_PROG_NAME(f) ((const char *)(f) + (f)->blob.prog_name_offset) #define IA_CSS_EXT_ISP_MEM_OFFSETS(f) \ - ((const struct ia_css_memory_offsets *)((const char *)(f)+(f)->blob.mem_offsets)) + ((const struct ia_css_memory_offsets *)((const char *)(f) + (f)->blob.mem_offsets)) #endif /* !defined(__ISP) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h index a0058eac7d5a1..3bb641d8bb57a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h @@ -64,7 +64,7 @@ struct ia_css_buffer { struct ia_css_acc_param *custom_data; /** Custom buffer. */ struct ia_css_metadata *metadata; /** Sensor metadata. */ } data; /** Buffer data pointer. */ - uint64_t driver_cookie; /** cookie for the driver */ + u64 driver_cookie; /** cookie for the driver */ struct ia_css_time_meas timing_data; /** timing data (readings from the timer) */ struct ia_css_clock_tick isys_eof_clock_tick; /** ISYS's end of frame timer tick*/ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h index 021a313fab857..9e01ed2c1bbeb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h @@ -48,7 +48,7 @@ enum ia_css_err ia_css_init( const struct ia_css_env *env, const struct ia_css_fw *fw, - uint32_t l1_base, + u32 l1_base, enum ia_css_irq_type irq_type); /* @brief Un-initialize the CSS API. @@ -143,7 +143,6 @@ ia_css_sp_has_terminated(void); enum ia_css_err ia_css_start_sp(void); - /* @brief stop SP hardware * * @return IA_CSS_SUCCESS or error code upon error. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c index 21b842379accb..6ad8687cf08b2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c @@ -23,7 +23,7 @@ static struct ia_css_hw_access_env my_env; void ia_css_device_access_init(const struct ia_css_hw_access_env *env) { - assert(env != NULL); + assert(env); my_env = *env; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h index 1f01534964e3e..d635a747f13db 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h @@ -30,7 +30,6 @@ enum dvs_statistics_type { SKC_DVS_STATISTICS }; - /* Structure that holds DVS statistics in the ISP internal * format. Use ia_css_get_dvs_statistics() to translate * this to the format used on the host (DVS engine). @@ -38,11 +37,11 @@ enum dvs_statistics_type { struct ia_css_isp_dvs_statistics { ia_css_ptr hor_proj; ia_css_ptr ver_proj; - uint32_t hor_size; - uint32_t ver_size; - uint32_t exp_id; /** see ia_css_event_public.h for more detail */ + u32 hor_size; + u32 ver_size; + u32 exp_id; /** see ia_css_event_public.h for more detail */ ia_css_ptr data_ptr; /* base pointer containing all memory */ - uint32_t size; /* size of allocated memory in data_ptr */ + u32 size; /* size of allocated memory in data_ptr */ }; /* Structure that holds SKC DVS statistics in the ISP internal @@ -51,7 +50,6 @@ struct ia_css_isp_dvs_statistics { * */ struct ia_css_isp_skc_dvs_statistics; - #define SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT \ ((3 * SIZE_OF_IA_CSS_PTR) + \ (4 * sizeof(uint32_t))) @@ -65,10 +63,10 @@ struct ia_css_isp_skc_dvs_statistics; */ struct ia_css_isp_dvs_statistics_map { void *data_ptr; - int32_t *hor_proj; - int32_t *ver_proj; - uint32_t size; /* total size in bytes */ - uint32_t data_allocated; /* indicate whether data was allocated */ + s32 *hor_proj; + s32 *ver_proj; + u32 size; /* total size in bytes */ + u32 data_allocated; /* indicate whether data was allocated */ }; union ia_css_dvs_statistics_isp { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h index 036a2f03d3bd4..5c0470fa4a74c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h @@ -60,7 +60,7 @@ enum ia_css_event_type { /** Extension stage complete. */ IA_CSS_EVENT_TYPE_TIMER = 1 << 12, /** Timer event for measuring the SP side latencies. It contains the - 32-bit timer value from the SP */ + 32-bit timer value from the SP */ IA_CSS_EVENT_TYPE_PORT_EOF = 1 << 13, /** End Of Frame event, sent when in buffered sensor mode. */ IA_CSS_EVENT_TYPE_FW_WARNING = 1 << 14, @@ -101,9 +101,9 @@ struct ia_css_event { events. */ enum ia_css_event_type type; /** Type of Event, always valid/filled. */ - uint8_t port; + u8 port; /** Port number for EOF event (not valid for other events). */ - uint8_t exp_id; + u8 exp_id; /** Exposure id for EOF/FRAME_TAGGED/FW_WARNING event (not valid for other events) The exposure ID is unique only within a logical stream and it is only generated on systems that have an input system (such as 2400 @@ -119,22 +119,22 @@ struct ia_css_event { Note that in case frames are dropped, this will not be reflected in the exposure IDs. Therefor applications should not use this to detect frame drops. */ - uint32_t fw_handle; + u32 fw_handle; /** Firmware Handle for ACC_STAGE_COMPLETE event (not valid for other events). */ enum ia_css_fw_warning fw_warning; /** Firmware warning code, only for WARNING events. */ - uint8_t fw_assert_module_id; + u8 fw_assert_module_id; /** Firmware module id, only for ASSERT events, should be logged by driver. */ - uint16_t fw_assert_line_no; + u16 fw_assert_line_no; /** Firmware line number, only for ASSERT events, should be logged by driver. */ clock_value_t timer_data; /** For storing the full 32-bit of the timer value. Valid only for TIMER event */ - uint8_t timer_code; + u8 timer_code; /** For storing the code of the TIMER event. Valid only for TIMER event */ - uint8_t timer_subcode; + u8 timer_subcode; /** For storing the subcode of the TIMER event. Valid only for TIMER event */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h index e5ffc579aef1e..59720370cb8ec 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h @@ -26,12 +26,12 @@ * to save on extension operations in the ISP code. */ /* Unsigned fixed point value, 0 integer bits, 16 fractional bits */ -typedef uint32_t ia_css_u0_16; +typedef u32 ia_css_u0_16; /* Unsigned fixed point value, 5 integer bits, 11 fractional bits */ -typedef uint32_t ia_css_u5_11; +typedef u32 ia_css_u5_11; /* Unsigned fixed point value, 8 integer bits, 8 fractional bits */ -typedef uint32_t ia_css_u8_8; +typedef u32 ia_css_u8_8; /* Signed fixed point value, 0 integer bits, 15 fractional bits */ -typedef int32_t ia_css_s0_15; +typedef s32 ia_css_s0_15; #endif /* _IA_CSS_FRAC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h index 89943e8bf1801..a32fb299fa628 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h @@ -35,6 +35,7 @@ enum ia_css_bayer_order { IA_CSS_BAYER_ORDER_BGGR, /** BGBGBGBGBG .. GRGRGRGRGR */ IA_CSS_BAYER_ORDER_GBRG, /** GBGBGBGBGB .. RGRGRGRGRG */ }; + #define IA_CSS_BAYER_ORDER_NUM (IA_CSS_BAYER_ORDER_GBRG + 1) /* Frame plane structure. This describes one plane in an image @@ -166,7 +167,7 @@ struct ia_css_frame { enum ia_css_frame_flash_state flash_state; unsigned int exp_id; /** exposure id, see ia_css_event_public.h for more detail */ - uint32_t isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ + u32 isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ bool valid; /** First video output frame is not valid */ bool contiguous; /** memory is allocated physically contiguously */ union { @@ -334,7 +335,7 @@ enum ia_css_err ia_css_frame_map(struct ia_css_frame **frame, const struct ia_css_frame_info *info, const void __user *data, - uint16_t attribute, + u16 attribute, void *context); /* @brief Unmap a CSS frame structure. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h index 4557e66891dfb..bc82e97d24cba 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h @@ -43,4 +43,3 @@ ia_css_host_data_allocate(size_t size); void ia_css_host_data_free(struct ia_css_host_data *me); #endif /* __SH_CSS_HOST_DATA_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c index 8222dd0a41f26..269392d4d5d4e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c @@ -30,7 +30,8 @@ mmgr_malloc(const size_t size) hrt_vaddress mmgr_alloc_attr(const size_t size, const uint16_t attrs) { - uint16_t masked_attrs = attrs & MMGR_ATTRIBUTE_MASK; + u16 masked_attrs = attrs & MMGR_ATTRIBUTE_MASK; + WARN_ON(attrs & MMGR_ATTRIBUTE_CONTIGUOUS); if (masked_attrs & MMGR_ATTRIBUTE_CLEARED) { @@ -73,9 +74,10 @@ mmgr_store(const hrt_vaddress vaddr, const void *data, const size_t size) hrt_vaddress mmgr_mmap(const void __user *ptr, const size_t size, - uint16_t attribute, void *context) + u16 attribute, void *context) { struct hrt_userbuffer_attr *userbuffer_attr = context; + return hrt_isp_css_mm_alloc_user_ptr( size, ptr, userbuffer_attr->pgnr, userbuffer_attr->type, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h index ed0b6ab371dac..38305aa26b9b3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h @@ -36,16 +36,17 @@ struct ia_css_metadata_config { struct ia_css_metadata_info { struct ia_css_resolution resolution; /** Resolution */ - uint32_t stride; /** Stride in bytes */ - uint32_t size; /** Total size in bytes */ + u32 stride; /** Stride in bytes */ + u32 size; /** Total size in bytes */ }; struct ia_css_metadata { struct ia_css_metadata_info info; /** Layout info */ ia_css_ptr address; /** CSS virtual address */ - uint32_t exp_id; + u32 exp_id; /** Exposure ID, see ia_css_event_public.h for more detail */ }; + #define SIZE_OF_IA_CSS_METADATA_STRUCT sizeof(struct ia_css_metadata) /* @brief Allocate a metadata buffer. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h index f6870fa7a18c5..f0963968f22ce 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h @@ -190,6 +190,4 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, struct ia_css_isp_parameters *params, bool commit, struct ia_css_pipe *pipe); - - #endif /* __IA_CSS_PIPE_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h index 29bb7c01da385..57542d451ec0a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h @@ -50,6 +50,7 @@ enum ia_css_pipe_mode { IA_CSS_PIPE_MODE_YUVPP, /** YUV post processing pipe, used for all use cases with YUV input, for SoC sensor and external ISP */ }; + /* Temporary define */ #define IA_CSS_PIPE_MODE_NUM (IA_CSS_PIPE_MODE_YUVPP + 1) @@ -105,7 +106,7 @@ struct ia_css_pipe_config { /** Pipeline extension accelerator */ struct ia_css_fw_info **acc_stages; /** Standalone accelerator stages */ - uint32_t num_acc_stages; + u32 num_acc_stages; /** Number of standalone accelerator stages */ struct ia_css_capture_config default_capture_config; /** Default capture config for initial capture pipe configuration. */ @@ -151,7 +152,6 @@ struct ia_css_pipe_config { #endif }; - /** * Default settings for newly created pipe configurations. */ @@ -438,7 +438,6 @@ enum ia_css_err ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, struct ia_css_buffer *buffer); - /* @brief Set the state (Enable or Disable) of the Extension stage in the * given pipe. * @param[in] pipe Pipe handle. @@ -446,25 +445,25 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, * @param[in] enable Enable Flag (1 to enable ; 0 to disable) * * @return - * IA_CSS_SUCCESS : Success + * IA_CSS_SUCCESS : Success * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters * IA_CSS_ERR_RESOURCE_NOT_AVAILABLE : Inactive QOS Pipe - * (No active stream with this pipe) + * (No active stream with this pipe) * * This function will request state change (enable or disable) for the Extension * stage (firmware handle) in the given pipe. * * Note: - * 1. Extension can be enabled/disabled only on QOS Extensions - * 2. Extension can be enabled/disabled only with an active QOS Pipe - * 3. Initial(Default) state of QOS Extensions is Disabled - * 4. State change cannot be guaranteed immediately OR on frame boundary + * 1. Extension can be enabled/disabled only on QOS Extensions + * 2. Extension can be enabled/disabled only with an active QOS Pipe + * 3. Initial(Default) state of QOS Extensions is Disabled + * 4. State change cannot be guaranteed immediately OR on frame boundary * */ enum ia_css_err -ia_css_pipe_set_qos_ext_state (struct ia_css_pipe *pipe, - uint32_t fw_handle, - bool enable); +ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, + u32 fw_handle, + bool enable); /* @brief Get the state (Enable or Disable) of the Extension stage in the * given pipe. @@ -473,37 +472,37 @@ ia_css_pipe_set_qos_ext_state (struct ia_css_pipe *pipe, * @param[out] *enable Enable Flag * * @return - * IA_CSS_SUCCESS : Success + * IA_CSS_SUCCESS : Success * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters * IA_CSS_ERR_RESOURCE_NOT_AVAILABLE : Inactive QOS Pipe - * (No active stream with this pipe) + * (No active stream with this pipe) * * This function will query the state of the Extension stage (firmware handle) * in the given Pipe. * * Note: - * 1. Extension state can be queried only on QOS Extensions - * 2. Extension can be enabled/disabled only with an active QOS Pipe - * 3. Initial(Default) state of QOS Extensions is Disabled. + * 1. Extension state can be queried only on QOS Extensions + * 2. Extension can be enabled/disabled only with an active QOS Pipe + * 3. Initial(Default) state of QOS Extensions is Disabled. * */ enum ia_css_err -ia_css_pipe_get_qos_ext_state (struct ia_css_pipe *pipe, - uint32_t fw_handle, - bool * enable); +ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, + u32 fw_handle, + bool *enable); #ifdef ISP2401 /* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. - * @param[in] pipe Pipe handle. + * @param[in] pipe Pipe handle. * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle). - * @param[in] css_seg Parameter memory descriptors for CSS segments. - * @param[in] isp_seg Parameter memory descriptors for ISP segments. + * @param[in] css_seg Parameter memory descriptors for CSS segments. + * @param[in] isp_seg Parameter memory descriptors for ISP segments. * * @return - * IA_CSS_SUCCESS : Success + * IA_CSS_SUCCESS : Success * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters * IA_CSS_ERR_RESOURCE_NOT_AVAILABLE : Inactive QOS Pipe - * (No active stream with this pipe) + * (No active stream with this pipe) * * \deprecated{This interface is used to temporarily support a late-developed, * specific use-case on a specific IPU2 platform. It will not be supported or @@ -530,7 +529,7 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, * @param[in] lut Look up tabel * * @return - * IA_CSS_SUCCESS : Success + * IA_CSS_SUCCESS : Success * IA_CSS_ERR_INVALID_ARGUMENTS : Invalid Parameters * * Note: @@ -541,12 +540,12 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, * */ enum ia_css_err -ia_css_pipe_set_bci_scaler_lut( struct ia_css_pipe *pipe, +ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, const void *lut); /* @brief Checking of DVS statistics ability * @param[in] pipe_info The pipe info. * @return true - has DVS statistics ability - * false - otherwise + * false - otherwise */ bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h index 6f24656b6cb46..037fc4f77c777 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h @@ -33,7 +33,7 @@ enum ia_css_prbs_id { * Make sure the value of this define gets changed to reflect the correct * number of ia_css_prbs_id enum if you add/delete an item in the enum. */ -#define N_CSS_PRBS_IDS (IA_CSS_PRBS_ID2+1) +#define N_CSS_PRBS_IDS (IA_CSS_PRBS_ID2 + 1) /** * PRBS configuration structure. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h index 3d1c5a8f879bc..a5ec4e100cec0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h @@ -83,7 +83,6 @@ struct ia_css_stream_input_config { enum ia_css_bayer_order bayer_order; /** Bayer order for RAW streams */ }; - /* Input stream description. This describes how input will flow into the * CSS. This is used to program the CSS hardware. */ @@ -118,15 +117,15 @@ struct ia_css_stream_config { bool online; /** offline will activate RAW copy on SP, use this for continuous capture. */ /* ISYS2401 usage: ISP receives data directly from sensor, no copy. */ - unsigned init_num_cont_raw_buf; /** initial number of raw buffers to + unsigned int init_num_cont_raw_buf; /** initial number of raw buffers to allocate */ - unsigned target_num_cont_raw_buf; /** total number of raw buffers to + unsigned int target_num_cont_raw_buf; /** total number of raw buffers to allocate */ bool pack_raw_pixels; /** Pack pixels in the raw buffers */ bool continuous; /** Use SP copy feature to continuously capture frames to system memory and run pipes in offline mode */ bool disable_cont_viewfinder; /** disable continuous viewfinder for ZSL use case */ - int32_t flash_gpio_pin; /** pin on which the flash is connected, -1 for no flash */ + s32 flash_gpio_pin; /** pin on which the flash is connected, -1 for no flash */ int left_padding; /** The number of input-formatter left-paddings, -1 for default from binary.*/ struct ia_css_mipi_buffer_config mipi_buffer_config; /** mipi buffer configuration */ struct ia_css_metadata_config metadata_config; /** Metadata configuration. */ @@ -482,8 +481,8 @@ void ia_css_stream_request_flash(struct ia_css_stream *stream); /* @brief Configure a stream with filter coefficients. - * @deprecated {Replaced by - * ia_css_pipe_set_isp_config_on_pipe()} + * @deprecated {Replaced by + * ia_css_pipe_set_isp_config_on_pipe()} * * @param[in] stream The stream. * @param[in] config The set of filter coefficients. @@ -504,8 +503,8 @@ ia_css_stream_set_isp_config_on_pipe(struct ia_css_stream *stream, struct ia_css_pipe *pipe); /* @brief Configure a stream with filter coefficients. - * @deprecated {Replaced by - * ia_css_pipe_set_isp_config()} + * @deprecated {Replaced by + * ia_css_pipe_set_isp_config()} * @param[in] stream The stream. * @param[in] config The set of filter coefficients. * @return IA_CSS_SUCCESS or error code upon error. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h index b256d7c88716c..4ec8614216006 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h @@ -38,7 +38,7 @@ more details. #include "ia_css_err.h" /* @brief timer reading definition */ -typedef uint32_t clock_value_t; +typedef u32 clock_value_t; /* @brief 32 bit clock tick,(timestamp based on timer-value of CSS-internal timer)*/ struct ia_css_clock_tick { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h index 81498bd7485b7..79c4e1b3b48f2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h @@ -33,7 +33,7 @@ enum ia_css_tpg_id { * Make sure the value of this define gets changed to reflect the correct * number of ia_css_tpg_id enum if you add/delete an item in the enum. */ -#define N_CSS_TPG_IDS (IA_CSS_TPG_ID2+1) +#define N_CSS_TPG_IDS (IA_CSS_TPG_ID2 + 1) /* Enumerate the TPG modes. */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h index 259ab3f074bab..add400b910544 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h @@ -80,28 +80,28 @@ struct ia_css_config_memory_offsets; struct ia_css_state_memory_offsets; /* Virtual address within the CSS address space. */ -typedef uint32_t ia_css_ptr; +typedef u32 ia_css_ptr; /* Generic resolution structure. */ struct ia_css_resolution { - uint32_t width; /** Width */ - uint32_t height; /** Height */ + u32 width; /** Width */ + u32 height; /** Height */ }; /* Generic coordinate structure. */ struct ia_css_coordinate { - int32_t x; /** Value of a coordinate on the horizontal axis */ - int32_t y; /** Value of a coordinate on the vertical axis */ + s32 x; /** Value of a coordinate on the horizontal axis */ + s32 y; /** Value of a coordinate on the vertical axis */ }; /* Vector with signed values. This is used to indicate motion for * Digital Image Stabilization. */ struct ia_css_vector { - int32_t x; /** horizontal motion (in pixels) */ - int32_t y; /** vertical motion (in pixels) */ + s32 x; /** horizontal motion (in pixels) */ + s32 y; /** vertical motion (in pixels) */ }; /* Short hands */ @@ -111,19 +111,19 @@ struct ia_css_vector { /* CSS data descriptor */ struct ia_css_data { ia_css_ptr address; /** CSS virtual address */ - uint32_t size; /** Disabled if 0 */ + u32 size; /** Disabled if 0 */ }; /* Host data descriptor */ struct ia_css_host_data { char *address; /** Host address */ - uint32_t size; /** Disabled if 0 */ + u32 size; /** Disabled if 0 */ }; /* ISP data descriptor */ struct ia_css_isp_data { - uint32_t address; /** ISP address */ - uint32_t size; /** Disabled if 0 */ + u32 address; /** ISP address */ + u32 size; /** Disabled if 0 */ }; /* Shading Correction types. */ @@ -288,27 +288,27 @@ struct ia_css_shading_info { */ struct { #ifndef ISP2401 - uint32_t enable; /** Shading correction enabled. + u32 enable; /** Shading correction enabled. 0:disabled, 1:enabled */ - uint32_t num_hor_grids; /** Number of data points per line + u32 num_hor_grids; /** Number of data points per line per color on shading table. */ - uint32_t num_ver_grids; /** Number of lines of data points + u32 num_ver_grids; /** Number of lines of data points per color on shading table. */ - uint32_t bqs_per_grid_cell; /** Grid cell size + u32 bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. (1BQ means {Gr,R,B,Gb}(2x2 pixels).) Valid values are 8,16,32,64. */ #else - uint32_t num_hor_grids; /** Number of data points per line per color on shading table. */ - uint32_t num_ver_grids; /** Number of lines of data points per color on shading table. */ - uint32_t bqs_per_grid_cell; /** Grid cell size in BQ unit. + u32 num_hor_grids; /** Number of data points per line per color on shading table. */ + u32 num_ver_grids; /** Number of lines of data points per color on shading table. */ + u32 bqs_per_grid_cell; /** Grid cell size in BQ unit. NOTE: bqs = size in BQ(Bayer Quad) unit. 1BQ means {Gr,R,B,Gb} (2x2 pixels). Horizontal 1 bqs corresponds to horizontal 2 pixels. Vertical 1 bqs corresponds to vertical 2 pixels. */ #endif - uint32_t bayer_scale_hor_ratio_in; - uint32_t bayer_scale_hor_ratio_out; + u32 bayer_scale_hor_ratio_in; + u32 bayer_scale_hor_ratio_out; #ifndef ISP2401 /** Horizontal ratio of bayer scaling between input width and output width, for the scaling @@ -321,21 +321,21 @@ struct ia_css_shading_info { output_width = input_width * bayer_scale_hor_ratio_out / bayer_scale_hor_ratio_in + 0.5 */ #endif - uint32_t bayer_scale_ver_ratio_in; - uint32_t bayer_scale_ver_ratio_out; + u32 bayer_scale_ver_ratio_in; + u32 bayer_scale_ver_ratio_out; #ifndef ISP2401 /** Vertical ratio of bayer scaling between input height and output height, for the scaling which should be done before shading correction. output_height = input_height * bayer_scale_ver_ratio_out / bayer_scale_ver_ratio_in */ - uint32_t sc_bayer_origin_x_bqs_on_shading_table; + u32 sc_bayer_origin_x_bqs_on_shading_table; /** X coordinate (in bqs) of bayer origin on shading table. This indicates the left-most pixel of bayer (not include margin) inputted to the shading correction. This corresponds to the left-most pixel of bayer inputted to isp from sensor. */ - uint32_t sc_bayer_origin_y_bqs_on_shading_table; + u32 sc_bayer_origin_y_bqs_on_shading_table; /** Y coordinate (in bqs) of bayer origin on shading table. This indicates the top pixel of bayer (not include margin) inputted to the shading correction. @@ -393,8 +393,8 @@ struct ia_css_grid_info { * that is visible for user * @{ */ - uint32_t isp_in_width; - uint32_t isp_in_height; + u32 isp_in_width; + u32 isp_in_height; /* @}*/ struct ia_css_3a_grid_info s3a_grid; /** 3A grid info */ @@ -417,35 +417,35 @@ struct ia_css_grid_info { * advanced ISP can correct for these imperfections using this table. */ struct ia_css_morph_table { - uint32_t enable; /** To disable GDC, set this field to false. The + u32 enable; /** To disable GDC, set this field to false. The coordinates fields can be set to NULL in this case. */ - uint32_t height; /** Table height */ - uint32_t width; /** Table width */ - uint16_t *coordinates_x[IA_CSS_MORPH_TABLE_NUM_PLANES]; + u32 height; /** Table height */ + u32 width; /** Table width */ + u16 *coordinates_x[IA_CSS_MORPH_TABLE_NUM_PLANES]; /** X coordinates that describe the sensor imperfection */ - uint16_t *coordinates_y[IA_CSS_MORPH_TABLE_NUM_PLANES]; + u16 *coordinates_y[IA_CSS_MORPH_TABLE_NUM_PLANES]; /** Y coordinates that describe the sensor imperfection */ }; struct ia_css_dvs_6axis_config { unsigned int exp_id; /** Exposure ID, see ia_css_event_public.h for more detail */ - uint32_t width_y; - uint32_t height_y; - uint32_t width_uv; - uint32_t height_uv; - uint32_t *xcoords_y; - uint32_t *ycoords_y; - uint32_t *xcoords_uv; - uint32_t *ycoords_uv; + u32 width_y; + u32 height_y; + u32 width_uv; + u32 height_uv; + u32 *xcoords_y; + u32 *ycoords_y; + u32 *xcoords_uv; + u32 *ycoords_uv; }; /** * This specifies the coordinates (x,y) */ struct ia_css_point { - int32_t x; /** x coordinate */ - int32_t y; /** y coordinate */ + s32 x; /** x coordinate */ + s32 y; /** y coordinate */ }; /** @@ -474,8 +474,8 @@ struct ia_css_region { * y + height <= effective input height */ struct ia_css_dz_config { - uint32_t dx; /** Horizontal zoom factor */ - uint32_t dy; /** Vertical zoom factor */ + u32 dx; /** Horizontal zoom factor */ + u32 dy; /** Vertical zoom factor */ struct ia_css_region zoom_region; /** region for zoom */ }; @@ -492,8 +492,8 @@ enum ia_css_capture_mode { struct ia_css_capture_config { enum ia_css_capture_mode mode; /** Still capture mode */ - uint32_t enable_xnr; /** Enable/disable XNR */ - uint32_t enable_raw_output; + u32 enable_xnr; /** Enable/disable XNR */ + u32 enable_raw_output; bool enable_capture_pp_bli; /** Enable capture_pp_bli mode */ }; @@ -503,7 +503,6 @@ struct ia_css_capture_config { .mode = IA_CSS_CAPTURE_MODE_PRIMARY, \ } - /* ISP filter configuration. This is a collection of configurations * for each of the ISP filters (modules). * @@ -610,7 +609,7 @@ struct ia_css_isp_config { struct ia_css_output_config *output_config_display; /** Viewfinder/display output mirroring, flipping (optional) */ struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ - uint32_t isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ + u32 isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ }; #endif /* _IA_CSS_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h index aad592cb86ef0..8fb8c045f2927 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h @@ -21,13 +21,10 @@ #ifndef __IA_CSS_VERSION_DATA_H #define __IA_CSS_VERSION_DATA_H - #ifndef ISP2401 #define CSS_VERSION_STRING "REL:20150521_21.4_0539; API:2.1.15.3; GIT:irci_candrpv_0415_20150504_35b345#35b345be52ac575f8934abb3a88fea26a94e7343; SDK:/nfs/iir/disks/iir_hivepackages_003/iir_hivepkgs_disk017/Css_Mizuchi/packages/Css_Mizuchi/int_css_mizuchi_20140829_1053; USER:viedifw; " #else #define CSS_VERSION_STRING "REL:20150911_37.5_1652; API:2.1.20.9; GIT:irci___#ebf437d53a8951bb7ff6d13fdb7270dab393a92a; SDK:; USER:viedifw; " #endif - #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c index f7dd256b6f7a0..9cdfe50b2835c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c @@ -29,4 +29,3 @@ const struct ia_css_aa_config default_aa_config = { const struct ia_css_aa_config default_baa_config = { 8191 /* default should be 0 */ }; - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h index dbab4d6c6cd58..3c699bae2f554 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h @@ -18,7 +18,7 @@ #include "type_support.h" struct sh_css_isp_aa_params { - int32_t strength; + s32 strength; }; #endif /* __IA_CSS_AA_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h index 0b95bf9b9aaf8..cc6a444ac716d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h @@ -19,7 +19,6 @@ * CSS-API header file for Anti-Aliasing parameters. */ - /* Anti-Aliasing configuration. * * This structure is used both for YUV AA and Bayer AA. @@ -39,10 +38,9 @@ * ISP2: BAA2 is used. */ struct ia_css_aa_config { - uint16_t strength; /** Strength of the filter. + u16 strength; /** Strength of the filter. u0.13, [0,8191], default/ineffective 0 */ }; #endif /* __IA_CSS_AA2_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c index edc4f1ae6d5e8..c5fb1e08f3b4e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c @@ -31,7 +31,7 @@ void ia_css_anr_encode( struct sh_css_isp_anr_params *to, const struct ia_css_anr_config *from, - unsigned size) + unsigned int size) { (void)size; to->threshold = from->threshold; @@ -40,7 +40,7 @@ ia_css_anr_encode( void ia_css_anr_dump( const struct sh_css_isp_anr_params *anr, - unsigned level) + unsigned int level) { if (!anr) return; ia_css_debug_dtrace(level, "Advance Noise Reduction:\n"); @@ -51,10 +51,9 @@ ia_css_anr_dump( void ia_css_anr_debug_dtrace( const struct ia_css_anr_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.threshold=%d\n", config->threshold); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h index 29566c07653cd..1f045a0ca8df9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h @@ -24,16 +24,16 @@ void ia_css_anr_encode( struct sh_css_isp_anr_params *to, const struct ia_css_anr_config *from, - unsigned size); + unsigned int size); void ia_css_anr_dump( const struct sh_css_isp_anr_params *anr, - unsigned level); + unsigned int level); void ia_css_anr_debug_dtrace( - const struct ia_css_anr_config *config, unsigned level) + const struct ia_css_anr_config *config, unsigned int level) ; #endif /* __IA_CSS_ANR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h index 2621b920c3dca..6bf834cb47d92 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h @@ -19,7 +19,7 @@ /* ANR (Advanced Noise Reduction) */ struct sh_css_isp_anr_params { - int32_t threshold; + s32 threshold; }; #endif /* __IA_CSS_ANR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h index dc317a8573693..d3fa0193ae07d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h @@ -21,16 +21,15 @@ /* Application specific DMA settings */ #define ANR_BPP 10 -#define ANR_ELEMENT_BITS ((CEIL_DIV(ANR_BPP, 8))*8) +#define ANR_ELEMENT_BITS ((CEIL_DIV(ANR_BPP, 8)) * 8) /* Advanced Noise Reduction configuration. * This is also known as Low-Light. */ struct ia_css_anr_config { - int32_t threshold; /** Threshold */ - int32_t thresholds[4*4*4]; - int32_t factors[3]; + s32 threshold; /** Threshold */ + s32 thresholds[4 * 4 * 4]; + s32 factors[3]; }; #endif /* __IA_CSS_ANR_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c index b338c434453e9..5db6f1afff68e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c @@ -24,13 +24,14 @@ ia_css_anr2_vmem_encode( const struct ia_css_anr_thres *from, size_t size) { - unsigned i; + unsigned int i; (void)size; for (i = 0; i < ANR_PARAM_SIZE; i++) { - unsigned j; + unsigned int j; + for (j = 0; j < ISP_VEC_NELEMS; j++) { - to->data[i][j] = from->data[i*ISP_VEC_NELEMS+j]; + to->data[i][j] = from->data[i * ISP_VEC_NELEMS + j]; } } } @@ -38,9 +39,8 @@ ia_css_anr2_vmem_encode( void ia_css_anr2_debug_dtrace( const struct ia_css_anr_thres *config, - unsigned level) + unsigned int level) { (void)config; (void)level; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h index 83c37e328591e..96a063ffdc16e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h @@ -29,7 +29,7 @@ ia_css_anr2_vmem_encode( void ia_css_anr2_debug_dtrace( - const struct ia_css_anr_thres *config, unsigned level) + const struct ia_css_anr_thres *config, unsigned int level) ; #endif /* __IA_CSS_ANR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c index 2de51fe45623f..9cbeeef7417b8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c @@ -49,4 +49,3 @@ const struct ia_css_anr_thres default_anr_thres = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} }; #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h index 9b611315392cc..200df3829fc7f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h @@ -25,8 +25,7 @@ /* Advanced Noise Reduction (ANR) thresholds */ struct ia_css_anr_thres { - int16_t data[13*64]; + s16 data[13 * 64]; }; #endif /* __IA_CSS_ANR2_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h index 312141793fd23..629c9ae6ad234 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h @@ -21,7 +21,7 @@ /* Advanced Noise Reduction (ANR) thresholds */ struct ia_css_isp_anr2_params { - VMEM_ARRAY(data, ANR_PARAM_SIZE*ISP_VEC_NELEMS); + VMEM_ARRAY(data, ANR_PARAM_SIZE * ISP_VEC_NELEMS); }; #endif /* __IA_CSS_ANR2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c index 99c80d2d8f11c..0e8dd4eebc3b8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c @@ -32,7 +32,7 @@ ia_css_bh_hmem_decode( /* * No weighted histogram, hence no grid definition */ - if(!hmem_buf) + if (!hmem_buf) return; assert(sizeof_hmem(HMEM0_ID) == sizeof(*hmem_buf)); @@ -51,7 +51,7 @@ void ia_css_bh_encode( struct sh_css_isp_bh_params *to, const struct ia_css_3a_config *from, - unsigned size) + unsigned int size) { (void)size; /* coefficients to calculate Y */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h index cbb09299cf21e..2a4c6c4a75463 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h @@ -27,6 +27,6 @@ void ia_css_bh_encode( struct sh_css_isp_bh_params *to, const struct ia_css_3a_config *from, - unsigned size); + unsigned int size); #endif /* __IA_CSS_BH_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h index b0a8ef3862e09..692a855ba012c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h @@ -27,14 +27,14 @@ /* AE (3A Support) */ struct sh_css_isp_bh_params { /* coefficients to calculate Y */ - int32_t y_coef_r; - int32_t y_coef_g; - int32_t y_coef_b; + s32 y_coef_r; + s32 y_coef_g; + s32 y_coef_b; }; /* This should be hmem_data_t, but that breaks the pipe generator */ struct sh_css_isp_bh_hmem_params { - uint32_t bh[ISP_HIST_COMPONENTS][IA_CSS_HMEM_BH_UNIT_SIZE]; + u32 bh[ISP_HIST_COMPONENTS][IA_CSS_HMEM_BH_UNIT_SIZE]; }; #endif /* __IA_CSS_HB_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h index ec1688e7352d1..8b2a53a26b753 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h @@ -19,7 +19,7 @@ * Should be consistent with hmem.h */ #define IA_CSS_HMEM_BH_TABLE_SIZE ISP_HIST_DEPTH -#define IA_CSS_HMEM_BH_UNIT_SIZE (ISP_HIST_DEPTH/ISP_HIST_COMPONENTS) +#define IA_CSS_HMEM_BH_UNIT_SIZE (ISP_HIST_DEPTH / ISP_HIST_COMPONENTS) #define BH_COLOR_R (0) #define BH_COLOR_G (1) @@ -29,9 +29,7 @@ /* BH table */ struct ia_css_bh_table { - uint32_t hmem[ISP_HIST_COMPONENTS][IA_CSS_HMEM_BH_UNIT_SIZE]; + u32 hmem[ISP_HIST_COMPONENTS][IA_CSS_HMEM_BH_UNIT_SIZE]; }; #endif /* __IA_CSS_BH_TYPES_H */ - - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c index 6d12e031e6fca..03da019346fc1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c @@ -21,15 +21,15 @@ #include #define BNLM_DIV_LUT_SIZE (12) -static const int32_t div_lut_nearests[BNLM_DIV_LUT_SIZE] = { +static const s32 div_lut_nearests[BNLM_DIV_LUT_SIZE] = { 0, 454, 948, 1484, 2070, 2710, 3412, 4184, 5035, 5978, 7025, 8191 }; -static const int32_t div_lut_slopes[BNLM_DIV_LUT_SIZE] = { +static const s32 div_lut_slopes[BNLM_DIV_LUT_SIZE] = { -7760, -6960, -6216, -5536, -4912, -4344, -3832, -3360, -2936, -2552, -2208, -2208 }; -static const int32_t div_lut_intercepts[BNLM_DIV_LUT_SIZE] = { +static const s32 div_lut_intercepts[BNLM_DIV_LUT_SIZE] = { 8184, 7752, 7336, 6928, 6536, 6152, 5776, 5416, 5064, 4728, 4408, 4408 }; @@ -59,9 +59,9 @@ bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr, const int32_t *lut */ assert((lut_size >= 2) && (lut_size <= block_size)); /* array lut_thr has (lut_size-1) entries */ - for (i = 0; i < lut_size-2; i++) { + for (i = 0; i < lut_size - 2; i++) { /* Check if the lut_thr is monotonically increasing */ - assert(lut_thr[i] <= lut_thr[i+1]); + assert(lut_thr[i] <= lut_thr[i + 1]); } /* Initialize */ @@ -80,6 +80,7 @@ bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr, const int32_t *lut /* Copy data from first block to all blocks */ for (blk = 1; blk < total_blocks; blk++) { u32 blk_offset = blk * block_size; + for (i = 1; i < lut_size; i++) { lut->thr[0][blk_offset + i] = lut->thr[0][i]; lut->val[0][blk_offset + i] = lut->val[0][i]; @@ -125,12 +126,12 @@ ia_css_bnlm_vmem_encode( bnlm_lut_encode(&to->div_lut, div_lut_nearests, div_lut_slopes, BNLM_DIV_LUT_SIZE); memset(to->div_lut_intercepts, 0, sizeof(to->div_lut_intercepts)); - for(i = 0; i < BNLM_DIV_LUT_SIZE; i++) { + for (i = 0; i < BNLM_DIV_LUT_SIZE; i++) { to->div_lut_intercepts[0][i] = div_lut_intercepts[i]; } memset(to->power_of_2, 0, sizeof(to->power_of_2)); - for (i = 0; i < (ISP_VEC_ELEMBITS-1); i++) { + for (i = 0; i < (ISP_VEC_ELEMBITS - 1); i++) { to->power_of_2[0][i] = 1 << i; } } @@ -159,7 +160,7 @@ ia_css_bnlm_encode( void ia_css_bnlm_debug_trace( const struct ia_css_bnlm_config *config, - unsigned level) + unsigned int level) { if (!config) return; @@ -179,5 +180,4 @@ ia_css_bnlm_debug_trace( /* ToDo: print traces for LUTs */ #endif /* IA_CSS_NO_DEBUG */ - } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h index 675f6e539b3f2..7f888afeb65ac 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h @@ -34,7 +34,7 @@ ia_css_bnlm_encode( void ia_css_bnlm_debug_trace( const struct ia_css_bnlm_config *config, - unsigned level); + unsigned int level); #endif #endif /* __IA_CSS_BNLM_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h index 2f4be43e594ed..c7d5cadf5fd4a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h @@ -38,6 +38,7 @@ struct bnlm_vmem_params { /* LUTs used for division approximiation */ struct bnlm_lut div_lut; + VMEM_ARRAY(div_lut_intercepts, ISP_VEC_NELEMS); /* 240x does not have an ISP instruction to left shift each element of a @@ -49,15 +50,15 @@ struct bnlm_vmem_params { /* BNLM ISP parameters */ struct bnlm_dmem_params { bool rad_enable; - int32_t rad_x_origin; - int32_t rad_y_origin; - int32_t avg_min_th; - int32_t max_min_th; - - int32_t exp_coeff_a; - uint32_t exp_coeff_b; - int32_t exp_coeff_c; - uint32_t exp_exponent; + s32 rad_x_origin; + s32 rad_y_origin; + s32 avg_min_th; + s32 max_min_th; + + s32 exp_coeff_a; + u32 exp_coeff_b; + s32 exp_coeff_c; + u32 exp_exponent; }; #endif /* __IA_CSS_BNLM_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h index 87e0f19c856b2..8dd1b1766c647 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h @@ -31,74 +31,74 @@ */ struct ia_css_bnlm_config { bool rad_enable; /** Enable a radial dependency in a weight calculation */ - int32_t rad_x_origin; /** Initial x coordinate for a radius calculation */ - int32_t rad_y_origin; /** Initial x coordinate for a radius calculation */ + s32 rad_x_origin; /** Initial x coordinate for a radius calculation */ + s32 rad_y_origin; /** Initial x coordinate for a radius calculation */ /* a threshold for average of weights if this < Th, do not denoise pixel */ - int32_t avg_min_th; + s32 avg_min_th; /* minimum weight for denoising if max < th, do not denoise pixel */ - int32_t max_min_th; + s32 max_min_th; /**@{*/ /* Coefficient for approximation, in the form of (1 + x / N)^N, * that fits the first-order exp() to default exp_lut in BNLM sheet * */ - int32_t exp_coeff_a; - uint32_t exp_coeff_b; - int32_t exp_coeff_c; - uint32_t exp_exponent; + s32 exp_coeff_a; + u32 exp_coeff_b; + s32 exp_coeff_c; + u32 exp_exponent; /**@}*/ - int32_t nl_th[3]; /** Detail thresholds */ + s32 nl_th[3]; /** Detail thresholds */ /* Index for n-th maximum candidate weight for each detail group */ - int32_t match_quality_max_idx[4]; + s32 match_quality_max_idx[4]; /**@{*/ /* A lookup table for 1/sqrt(1+mu) approximation */ - int32_t mu_root_lut_thr[15]; - int32_t mu_root_lut_val[16]; + s32 mu_root_lut_thr[15]; + s32 mu_root_lut_val[16]; /**@}*/ /**@{*/ /* A lookup table for SAD normalization */ - int32_t sad_norm_lut_thr[15]; - int32_t sad_norm_lut_val[16]; + s32 sad_norm_lut_thr[15]; + s32 sad_norm_lut_val[16]; /**@}*/ /**@{*/ /* A lookup table that models a weight's dependency on textures */ - int32_t sig_detail_lut_thr[15]; - int32_t sig_detail_lut_val[16]; + s32 sig_detail_lut_thr[15]; + s32 sig_detail_lut_val[16]; /**@}*/ /**@{*/ /* A lookup table that models a weight's dependency on a pixel's radial distance */ - int32_t sig_rad_lut_thr[15]; - int32_t sig_rad_lut_val[16]; + s32 sig_rad_lut_thr[15]; + s32 sig_rad_lut_val[16]; /**@}*/ /**@{*/ /* A lookup table to control denoise power depending on a pixel's radial distance */ - int32_t rad_pow_lut_thr[15]; - int32_t rad_pow_lut_val[16]; + s32 rad_pow_lut_thr[15]; + s32 rad_pow_lut_val[16]; /**@}*/ /**@{*/ /* Non linear transfer functions to calculate the blending coefficient depending on detail group */ /* detail group 0 */ /**@{*/ - int32_t nl_0_lut_thr[15]; - int32_t nl_0_lut_val[16]; + s32 nl_0_lut_thr[15]; + s32 nl_0_lut_val[16]; /**@}*/ /**@{*/ /* detail group 1 */ - int32_t nl_1_lut_thr[15]; - int32_t nl_1_lut_val[16]; + s32 nl_1_lut_thr[15]; + s32 nl_1_lut_val[16]; /**@}*/ /**@{*/ /* detail group 2 */ - int32_t nl_2_lut_thr[15]; - int32_t nl_2_lut_val[16]; + s32 nl_2_lut_thr[15]; + s32 nl_2_lut_val[16]; /**@}*/ /**@{*/ /* detail group 3 */ - int32_t nl_3_lut_thr[15]; - int32_t nl_3_lut_val[16]; + s32 nl_3_lut_thr[15]; + s32 nl_3_lut_val[16]; /**@}*/ /**@}*/ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c index a7de6ecb950d1..42c6e5fa5a1eb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c @@ -86,7 +86,7 @@ ia_css_bnr2_2_encode( void ia_css_bnr2_2_debug_dtrace( const struct ia_css_bnr2_2_config *bnr, - unsigned level) + unsigned int level) { if (!bnr) return; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h index c94b366b81420..ab1106fd24d6c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h @@ -29,7 +29,7 @@ ia_css_bnr2_2_encode( void ia_css_bnr2_2_debug_dtrace( const struct ia_css_bnr2_2_config *config, - unsigned level); + unsigned int level); #endif #endif /* __IA_CSS_BNR2_2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h index 6dec27a99d8fb..698fdc0b13fa3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h @@ -19,29 +19,29 @@ /* BNR (Bayer Noise Reduction) ISP parameters */ struct sh_css_isp_bnr2_2_params { - int32_t d_var_gain_r; - int32_t d_var_gain_g; - int32_t d_var_gain_b; - int32_t d_var_gain_slope_r; - int32_t d_var_gain_slope_g; - int32_t d_var_gain_slope_b; - int32_t n_var_gain_r; - int32_t n_var_gain_g; - int32_t n_var_gain_b; - int32_t n_var_gain_slope_r; - int32_t n_var_gain_slope_g; - int32_t n_var_gain_slope_b; - int32_t dir_thres; - int32_t dir_thres_w; - int32_t var_offset_coef; - int32_t dir_gain; - int32_t detail_gain; - int32_t detail_gain_divisor; - int32_t detail_level_offset; - int32_t d_var_th_min; - int32_t d_var_th_max; - int32_t n_var_th_min; - int32_t n_var_th_max; + s32 d_var_gain_r; + s32 d_var_gain_g; + s32 d_var_gain_b; + s32 d_var_gain_slope_r; + s32 d_var_gain_slope_g; + s32 d_var_gain_slope_b; + s32 n_var_gain_r; + s32 n_var_gain_g; + s32 n_var_gain_b; + s32 n_var_gain_slope_r; + s32 n_var_gain_slope_g; + s32 n_var_gain_slope_b; + s32 dir_thres; + s32 dir_thres_w; + s32 var_offset_coef; + s32 dir_gain; + s32 detail_gain; + s32 detail_gain_divisor; + s32 detail_level_offset; + s32 d_var_th_min; + s32 d_var_th_max; + s32 n_var_th_min; + s32 n_var_th_max; }; #endif /* __IA_CSS_BNR2_2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h index 551bd0ed3bacc..ee9569891747a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h @@ -32,40 +32,40 @@ struct ia_css_bnr2_2_config { /**@{*/ /* Directional variance gain for R/G/B components in dark region */ - int32_t d_var_gain_r; - int32_t d_var_gain_g; - int32_t d_var_gain_b; + s32 d_var_gain_r; + s32 d_var_gain_g; + s32 d_var_gain_b; /**@}*/ /**@{*/ /* Slope of Directional variance gain between dark and bright region */ - int32_t d_var_gain_slope_r; - int32_t d_var_gain_slope_g; - int32_t d_var_gain_slope_b; + s32 d_var_gain_slope_r; + s32 d_var_gain_slope_g; + s32 d_var_gain_slope_b; /**@}*/ /**@{*/ /* Non-Directional variance gain for R/G/B components in dark region */ - int32_t n_var_gain_r; - int32_t n_var_gain_g; - int32_t n_var_gain_b; + s32 n_var_gain_r; + s32 n_var_gain_g; + s32 n_var_gain_b; /**@}*/ /**@{*/ /* Slope of Non-Directional variance gain between dark and bright region */ - int32_t n_var_gain_slope_r; - int32_t n_var_gain_slope_g; - int32_t n_var_gain_slope_b; + s32 n_var_gain_slope_r; + s32 n_var_gain_slope_g; + s32 n_var_gain_slope_b; /**@}*/ - int32_t dir_thres; /** Threshold for directional filtering */ - int32_t dir_thres_w; /** Threshold width for directional filtering */ - int32_t var_offset_coef; /** Variance offset coefficient */ - int32_t dir_gain; /** Gain for directional coefficient */ - int32_t detail_gain; /** Gain for low contrast texture control */ - int32_t detail_gain_divisor; /** Gain divisor for low contrast texture control */ - int32_t detail_level_offset; /** Bias value for low contrast texture control */ - int32_t d_var_th_min; /** Minimum clipping value for directional variance*/ - int32_t d_var_th_max; /** Maximum clipping value for diretional variance*/ - int32_t n_var_th_min; /** Minimum clipping value for non-directional variance*/ - int32_t n_var_th_max; /** Maximum clipping value for non-directional variance*/ + s32 dir_thres; /** Threshold for directional filtering */ + s32 dir_thres_w; /** Threshold width for directional filtering */ + s32 var_offset_coef; /** Variance offset coefficient */ + s32 dir_gain; /** Gain for directional coefficient */ + s32 detail_gain; /** Gain for low contrast texture control */ + s32 detail_gain_divisor; /** Gain divisor for low contrast texture control */ + s32 detail_level_offset; /** Bias value for low contrast texture control */ + s32 d_var_th_min; /** Minimum clipping value for directional variance*/ + s32 d_var_th_max; /** Maximum clipping value for diretional variance*/ + s32 n_var_th_min; /** Minimum clipping value for non-directional variance*/ + s32 n_var_th_max; /** Maximum clipping value for non-directional variance*/ }; #endif /* __IA_CSS_BNR2_2_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c index d1baca54c3ad4..62489df37701d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c @@ -23,7 +23,7 @@ void ia_css_bnr_encode( struct sh_css_isp_bnr_params *to, const struct ia_css_nr_config *from, - unsigned size) + unsigned int size) { (void)size; /* BNR (Bayer Noise Reduction) */ @@ -36,13 +36,13 @@ ia_css_bnr_encode( uDIGIT_FITTING(from->bnr_gain, 16, SH_CSS_BNR_GAIN_SHIFT); to->gain_dir = uDIGIT_FITTING(from->bnr_gain, 16, SH_CSS_BNR_GAIN_SHIFT); - to->clip = uDIGIT_FITTING((unsigned)16384, 16, SH_CSS_BAYER_BITS); + to->clip = uDIGIT_FITTING(16384U, 16, SH_CSS_BAYER_BITS); } void ia_css_bnr_dump( const struct sh_css_isp_bnr_params *bnr, - unsigned level) + unsigned int level) { if (!bnr) return; ia_css_debug_dtrace(level, "Bayer Noise Reduction:\n"); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h index ccd2abc605376..aa3493c39b749 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h @@ -24,11 +24,11 @@ void ia_css_bnr_encode( struct sh_css_isp_bnr_params *to, const struct ia_css_nr_config *from, - unsigned size); + unsigned int size); void ia_css_bnr_dump( const struct sh_css_isp_bnr_params *bnr, - unsigned level); + unsigned int level); #endif /* __IA_CSS_DP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h index 331e05885ef4d..52f21ce8f4d2d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h @@ -19,12 +19,12 @@ /* BNR (Bayer Noise Reduction) */ struct sh_css_isp_bnr_params { - int32_t gain_all; - int32_t gain_dir; - int32_t threshold_low; - int32_t threshold_width_log2; - int32_t threshold_width; - int32_t clip; + s32 gain_all; + s32 gain_dir; + s32 threshold_low; + s32 threshold_width_log2; + s32 threshold_width; + s32 clip; }; #endif /* __IA_CSS_BNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c index d14fd8fc08b1e..a07b68c92cd34 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c @@ -21,7 +21,7 @@ /* keep the interface here, it is not enabled yet because host doesn't know the size of individual state */ void ia_css_init_cnr_state( - void/*struct sh_css_isp_cnr_vmem_state*/ *state, + void/*struct sh_css_isp_cnr_vmem_state*/ * state, size_t size) { memset(state, 0, size); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h index 6f00d280b7d6e..8430f1b640545 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h @@ -19,7 +19,7 @@ void ia_css_init_cnr_state( - void/*struct sh_css_isp_cnr_vmem_state*/ *state, + void/*struct sh_css_isp_cnr_vmem_state*/ * state, size_t size); #endif /* __IA_CSS_CNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c index 4b4b2b7154075..899f6b2749943 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c @@ -33,7 +33,7 @@ void ia_css_cnr_encode( struct sh_css_isp_cnr_params *to, const struct ia_css_cnr_config *from, - unsigned size) + unsigned int size) { (void)size; to->coring_u = from->coring_u; @@ -49,18 +49,15 @@ ia_css_cnr_encode( void ia_css_cnr_dump( const struct sh_css_isp_cnr_params *cnr, - unsigned level); + unsigned int level); void ia_css_cnr_debug_dtrace( const struct ia_css_cnr_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.coring_u=%d, config.coring_v=%d, " - "config.sense_gain_vy=%d, config.sense_gain_hy=%d, " - "config.sense_gain_vu=%d, config.sense_gain_hu=%d, " - "config.sense_gain_vv=%d, config.sense_gain_hv=%d\n", + "config.coring_u=%d, config.coring_v=%d, config.sense_gain_vy=%d, config.sense_gain_hy=%d, config.sense_gain_vu=%d, config.sense_gain_hu=%d, config.sense_gain_vv=%d, config.sense_gain_hv=%d\n", config->coring_u, config->coring_v, config->sense_gain_vy, config->sense_gain_hy, config->sense_gain_vu, config->sense_gain_hu, @@ -69,7 +66,7 @@ ia_css_cnr_debug_dtrace( void ia_css_init_cnr2_state( - void/*struct sh_css_isp_cnr_vmem_state*/ *state, + void/*struct sh_css_isp_cnr_vmem_state*/ * state, size_t size) { memset(state, 0, size); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h index abcf0eba706f4..902b850cebf50 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h @@ -24,20 +24,20 @@ void ia_css_cnr_encode( struct sh_css_isp_cnr_params *to, const struct ia_css_cnr_config *from, - unsigned size); + unsigned int size); void ia_css_cnr_dump( const struct sh_css_isp_cnr_params *cnr, - unsigned level); + unsigned int level); void ia_css_cnr_debug_dtrace( const struct ia_css_cnr_config *config, - unsigned level); + unsigned int level); void ia_css_init_cnr2_state( - void/*struct sh_css_isp_cnr_vmem_state*/ *state, + void/*struct sh_css_isp_cnr_vmem_state*/ * state, size_t size); #endif /* __IA_CSS_CNR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h index d6f490e26c94d..0d2fb28977200 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h @@ -19,14 +19,14 @@ /* CNR (Chroma Noise Reduction) */ struct sh_css_isp_cnr_params { - int32_t coring_u; - int32_t coring_v; - int32_t sense_gain_vy; - int32_t sense_gain_vu; - int32_t sense_gain_vv; - int32_t sense_gain_hy; - int32_t sense_gain_hu; - int32_t sense_gain_hv; + s32 coring_u; + s32 coring_v; + s32 sense_gain_vy; + s32 sense_gain_vu; + s32 sense_gain_vv; + s32 sense_gain_hy; + s32 sense_gain_hu; + s32 sense_gain_hv; }; #endif /* __IA_CSS_CNR2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h index 3ebc069d8ada9..35fc2e77eb3d0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h @@ -33,23 +33,22 @@ * ISP2: CNR2 is used for Still. */ struct ia_css_cnr_config { - uint16_t coring_u; /** Coring level of U. + u16 coring_u; /** Coring level of U. u0.13, [0,8191], default/ineffective 0 */ - uint16_t coring_v; /** Coring level of V. + u16 coring_v; /** Coring level of V. u0.13, [0,8191], default/ineffective 0 */ - uint16_t sense_gain_vy; /** Sensitivity of horizontal edge of Y. + u16 sense_gain_vy; /** Sensitivity of horizontal edge of Y. u13.0, [0,8191], default 100, ineffective 8191 */ - uint16_t sense_gain_vu; /** Sensitivity of horizontal edge of U. + u16 sense_gain_vu; /** Sensitivity of horizontal edge of U. u13.0, [0,8191], default 100, ineffective 8191 */ - uint16_t sense_gain_vv; /** Sensitivity of horizontal edge of V. + u16 sense_gain_vv; /** Sensitivity of horizontal edge of V. u13.0, [0,8191], default 100, ineffective 8191 */ - uint16_t sense_gain_hy; /** Sensitivity of vertical edge of Y. + u16 sense_gain_hy; /** Sensitivity of vertical edge of Y. u13.0, [0,8191], default 50, ineffective 8191 */ - uint16_t sense_gain_hu; /** Sensitivity of vertical edge of U. + u16 sense_gain_hu; /** Sensitivity of vertical edge of U. u13.0, [0,8191], default 50, ineffective 8191 */ - uint16_t sense_gain_hv; /** Sensitivity of vertical edge of V. + u16 sense_gain_hv; /** Sensitivity of vertical edge of V. u13.0, [0,8191], default 50, ineffective 8191 */ }; #endif /* __IA_CSS_CNR2_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c index 8f25ee180cda6..d7c814d3c4102 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c @@ -26,7 +26,7 @@ void ia_css_conversion_encode( struct sh_css_isp_conversion_params *to, const struct ia_css_conversion_config *from, - unsigned size) + unsigned int size) { (void)size; to->en = from->en; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h index da7a0a034a715..6f798811c9ab8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h @@ -24,7 +24,7 @@ void ia_css_conversion_encode( struct sh_css_isp_conversion_params *to, const struct ia_css_conversion_config *from, - unsigned size); + unsigned int size); #ifdef ISP2401 /* workaround until code generation in isp_kernelparameters.host.c is fixed */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h index 301d506f447e3..3a6ede394bdcb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h @@ -19,10 +19,10 @@ /* CONVERSION */ struct sh_css_isp_conversion_params { - uint32_t en; - uint32_t dummy0; - uint32_t dummy1; - uint32_t dummy2; + u32 en; + u32 dummy0; + u32 dummy1; + u32 dummy2; }; #endif /* __IA_CSS_CONVERSION_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h index 47a38fd65950b..79a626fe3a296 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h @@ -23,10 +23,10 @@ * */ struct ia_css_conversion_config { - uint32_t en; /** en parameter */ - uint32_t dummy0; /** dummy0 dummy parameter 0 */ - uint32_t dummy1; /** dummy1 dummy parameter 1 */ - uint32_t dummy2; /** dummy2 dummy parameter 2 */ + u32 en; /** en parameter */ + u32 dummy0; /** dummy0 dummy parameter 0 */ + u32 dummy1; /** dummy1 dummy parameter 1 */ + u32 dummy2; /** dummy2 dummy parameter 2 */ }; #endif /* __IA_CSS_CONVERSION_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c index 45e1ea8b1fb0e..18e40c37510b3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c @@ -27,7 +27,7 @@ void ia_css_copy_output_config( struct sh_css_isp_copy_output_isp_config *to, const struct ia_css_copy_output_configuration *from, - unsigned size) + unsigned int size) { (void)size; to->enable = from->enable; @@ -44,4 +44,3 @@ ia_css_copy_output_configure( ia_css_configure_copy_output(binary, &config); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h index 3eb77365f8d01..0e12d80df9d76 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h @@ -24,7 +24,7 @@ void ia_css_copy_output_config( struct sh_css_isp_copy_output_isp_config *to, const struct ia_css_copy_output_configuration *from, - unsigned size); + unsigned int size); void ia_css_copy_output_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h index 622d9181e13fb..587d0c62c9364 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h @@ -20,7 +20,7 @@ struct ia_css_copy_output_configuration { }; struct sh_css_isp_copy_output_isp_config { - uint32_t enable; + u32 enable; }; #endif /* __IA_CSS_COPY_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c index 92905220d862e..4f541971a1fdb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c @@ -29,7 +29,7 @@ void ia_css_crop_encode( struct sh_css_isp_crop_isp_params *to, const struct ia_css_crop_config *from, - unsigned size) + unsigned int size) { (void)size; to->crop_pos = from->crop_pos; @@ -39,16 +39,16 @@ void ia_css_crop_config( struct sh_css_isp_crop_isp_config *to, const struct ia_css_crop_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS; + unsigned int elems_a = ISP_VEC_NELEMS; (void)size; ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert (elems_a % to->port_b.elems == 0); + assert(elems_a % to->port_b.elems == 0); } void diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h index 9c1a4c7cac983..5d2bf405946c5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h @@ -25,13 +25,13 @@ void ia_css_crop_encode( struct sh_css_isp_crop_isp_params *to, const struct ia_css_crop_config *from, - unsigned size); + unsigned int size); void ia_css_crop_config( struct sh_css_isp_crop_isp_config *to, const struct ia_css_crop_configuration *from, - unsigned size); + unsigned int size); void ia_css_crop_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h index 0f1812cdd92ab..35835929d2524 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h @@ -21,7 +21,7 @@ /* Crop frame */ struct sh_css_isp_crop_isp_config { - uint32_t width_a_over_b; + u32 width_a_over_b; struct dma_port_config port_b; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h index b5d454225f891..5c166be6c5e80 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h @@ -32,4 +32,3 @@ struct ia_css_crop_configuration { }; #endif /* __IA_CSS_CROP_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c index 9f94ef1de5725..732ca773722c1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c @@ -30,23 +30,23 @@ void ia_css_encode_cc( struct sh_css_isp_csc_params *to, const struct ia_css_cc_config *from, - unsigned size) + unsigned int size) { (void)size; #ifndef IA_CSS_NO_DEBUG ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_encode_cc() enter:\n"); #endif - to->m_shift = (int16_t) from->fraction_bits; - to->m00 = (int16_t) from->matrix[0]; - to->m01 = (int16_t) from->matrix[1]; - to->m02 = (int16_t) from->matrix[2]; - to->m10 = (int16_t) from->matrix[3]; - to->m11 = (int16_t) from->matrix[4]; - to->m12 = (int16_t) from->matrix[5]; - to->m20 = (int16_t) from->matrix[6]; - to->m21 = (int16_t) from->matrix[7]; - to->m22 = (int16_t) from->matrix[8]; + to->m_shift = (int16_t)from->fraction_bits; + to->m00 = (int16_t)from->matrix[0]; + to->m01 = (int16_t)from->matrix[1]; + to->m02 = (int16_t)from->matrix[2]; + to->m10 = (int16_t)from->matrix[3]; + to->m11 = (int16_t)from->matrix[4]; + to->m12 = (int16_t)from->matrix[5]; + to->m20 = (int16_t)from->matrix[6]; + to->m21 = (int16_t)from->matrix[7]; + to->m22 = (int16_t)from->matrix[8]; #ifndef IA_CSS_NO_DEBUG ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_encode_cc() leave:\n"); @@ -57,7 +57,7 @@ void ia_css_csc_encode( struct sh_css_isp_csc_params *to, const struct ia_css_cc_config *from, - unsigned size) + unsigned int size) { ia_css_encode_cc(to, from, size); } @@ -66,7 +66,7 @@ ia_css_csc_encode( void ia_css_cc_dump( const struct sh_css_isp_csc_params *csc, - unsigned level, + unsigned int level, const char *name) { if (!csc) return; @@ -106,7 +106,7 @@ ia_css_cc_dump( void ia_css_csc_dump( const struct sh_css_isp_csc_params *csc, - unsigned level) + unsigned int level) { ia_css_cc_dump(csc, level, "Color Space Conversion"); } @@ -114,14 +114,10 @@ ia_css_csc_dump( void ia_css_cc_config_debug_dtrace( const struct ia_css_cc_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.m[0]=%d, " - "config.m[1]=%d, config.m[2]=%d, " - "config.m[3]=%d, config.m[4]=%d, " - "config.m[5]=%d, config.m[6]=%d, " - "config.m[7]=%d, config.m[8]=%d\n", + "config.m[0]=%d, config.m[1]=%d, config.m[2]=%d, config.m[3]=%d, config.m[4]=%d, config.m[5]=%d, config.m[6]=%d, config.m[7]=%d, config.m[8]=%d\n", config->matrix[0], config->matrix[1], config->matrix[2], config->matrix[3], config->matrix[4], @@ -129,4 +125,3 @@ ia_css_cc_config_debug_dtrace( config->matrix[7], config->matrix[8]); } #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h index eb10d8a5709da..2c9fec710d12b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h @@ -24,29 +24,29 @@ void ia_css_encode_cc( struct sh_css_isp_csc_params *to, const struct ia_css_cc_config *from, - unsigned size); + unsigned int size); void ia_css_csc_encode( struct sh_css_isp_csc_params *to, const struct ia_css_cc_config *from, - unsigned size); + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_cc_dump( - const struct sh_css_isp_csc_params *csc, unsigned level, + const struct sh_css_isp_csc_params *csc, unsigned int level, const char *name); void ia_css_csc_dump( const struct sh_css_isp_csc_params *csc, - unsigned level); + unsigned int level); void ia_css_cc_config_debug_dtrace( const struct ia_css_cc_config *config, - unsigned level); + unsigned int level); #define ia_css_csc_debug_dtrace ia_css_cc_config_debug_dtrace #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h index 0b054a939baf8..53e270df2db7e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h @@ -18,17 +18,16 @@ #include "type_support.h" /* CSC (Color Space Conversion) */ struct sh_css_isp_csc_params { - uint16_t m_shift; - int16_t m00; - int16_t m01; - int16_t m02; - int16_t m10; - int16_t m11; - int16_t m12; - int16_t m20; - int16_t m21; - int16_t m22; + u16 m_shift; + s16 m00; + s16 m01; + s16 m02; + s16 m10; + s16 m11; + s16 m12; + s16 m20; + s16 m21; + s16 m22; }; - #endif /* __IA_CSS_CSC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h index 10404380c6373..d49203d322bd1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h @@ -38,39 +38,39 @@ * * default/ineffective: * 1. YCgCo -> YUV - * 1 0.174 0.185 - * 0 -0.66252 -0.66874 - * 0 -0.83738 0.58131 + * 1 0.174 0.185 + * 0 -0.66252 -0.66874 + * 0 -0.83738 0.58131 * * fraction_bits = 12 - * 4096 713 758 - * 0 -2714 -2739 - * 0 -3430 2381 + * 4096 713 758 + * 0 -2714 -2739 + * 0 -3430 2381 * * 2. YCgCo -> RGB - * 1 -1 1 - * 1 1 0 - * 1 -1 -1 + * 1 -1 1 + * 1 1 0 + * 1 -1 -1 * * fraction_bits = 12 - * 4096 -4096 4096 - * 4096 4096 0 - * 4096 -4096 -4096 + * 4096 -4096 4096 + * 4096 4096 0 + * 4096 -4096 -4096 * * 3. RGB -> YUV * 0.299 0.587 0.114 - * -0.16874 -0.33126 0.5 - * 0.5 -0.41869 -0.08131 + * -0.16874 -0.33126 0.5 + * 0.5 -0.41869 -0.08131 * * fraction_bits = 13 - * 2449 4809 934 - * -1382 -2714 4096 - * 4096 -3430 -666 + * 2449 4809 934 + * -1382 -2714 4096 + * 4096 -3430 -666 */ struct ia_css_cc_config { - uint32_t fraction_bits;/** Fractional bits of matrix. + u32 fraction_bits;/** Fractional bits of matrix. u8.0, [0,13] */ - int32_t matrix[3 * 3]; /** Conversion matrix. + s32 matrix[3 * 3]; /** Conversion matrix. s[13-fraction_bits].[fraction_bits], [-8192,8191] */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c index e27648c46a258..7558d80c0ff4b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c @@ -44,8 +44,8 @@ static void ctc_gradient( assert(y0 >= 0 && y0 <= max_dydx); assert(y1 >= 0 && y1 <= max_dydx); assert(x0 < x1); - assert(dydx != NULL); - assert(shift != NULL); + assert(dydx); + assert(shift); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ctc_gradient() enter:\n"); @@ -71,7 +71,7 @@ void ia_css_ctc_encode( struct sh_css_isp_ctc_params *to, const struct ia_css_ctc_config *from, - unsigned size) + unsigned int size) { (void)size; to->y0 = from->y0; @@ -88,13 +88,13 @@ ia_css_ctc_encode( to->x3 = from->x3; to->x4 = from->x4; - ctc_gradient(&(to->dydx0), - &(to->dydx0_shift), + ctc_gradient(&to->dydx0, + &to->dydx0_shift, from->y1, from->y0, from->x1, 0); - ctc_gradient(&(to->dydx1), - &(to->dydx1_shift), + ctc_gradient(&to->dydx1, + &to->dydx1_shift, from->y2, from->y1, from->x2, from->x1); @@ -108,8 +108,8 @@ ia_css_ctc_encode( from->y4, from->y3, from->x4, from->x3); - ctc_gradient(&(to->dydx4), - &(to->dydx4_shift), + ctc_gradient(&to->dydx4, + &to->dydx4_shift, from->y5, from->y4, SH_CSS_BAYER_MAXVAL, from->x4); } @@ -117,4 +117,4 @@ ia_css_ctc_encode( void ia_css_ctc_dump( const struct sh_css_isp_ctc_params *ctc, - unsigned level); + unsigned int level); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h index d943aff281524..c5b28151529f6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h @@ -23,11 +23,11 @@ void ia_css_ctc_encode( struct sh_css_isp_ctc_params *to, const struct ia_css_ctc_config *from, - unsigned size); + unsigned int size); void ia_css_ctc_dump( const struct sh_css_isp_ctc_params *ctc, - unsigned level); + unsigned int level); #endif /* __IA_CSS_CTC1_5_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h index 8d9ac2b1832c3..95cf34ef4ed23 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h @@ -20,27 +20,27 @@ /* CTC (Color Tone Control) */ struct sh_css_isp_ctc_params { - int32_t y0; - int32_t y1; - int32_t y2; - int32_t y3; - int32_t y4; - int32_t y5; - int32_t ce_gain_exp; - int32_t x1; - int32_t x2; - int32_t x3; - int32_t x4; - int32_t dydx0; - int32_t dydx0_shift; - int32_t dydx1; - int32_t dydx1_shift; - int32_t dydx2; - int32_t dydx2_shift; - int32_t dydx3; - int32_t dydx3_shift; - int32_t dydx4; - int32_t dydx4_shift; + s32 y0; + s32 y1; + s32 y2; + s32 y3; + s32 y4; + s32 y5; + s32 ce_gain_exp; + s32 x1; + s32 x2; + s32 x3; + s32 x4; + s32 dydx0; + s32 dydx0_shift; + s32 dydx1; + s32 dydx1_shift; + s32 dydx2; + s32 dydx2_shift; + s32 dydx3; + s32 dydx3_shift; + s32 dydx4; + s32 dydx4_shift; }; #endif /* __IA_CSS_CTC1_5_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c index 74fc102a8192a..9a447f14b869a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c @@ -54,13 +54,13 @@ static int ctc2_slope(int y1, int y0, int x1, int x0) if (dy < 0) rounding = -rounding; - slope = (int) (dy_shift + rounding) / dx; + slope = (int)(dy_shift + rounding) / dx; /*the slope must lie within the range (-max_slope-1) >= (dydx) >= (max_slope) */ - if (slope <= -max_slope-1) { - dydx = -max_slope-1; + if (slope <= -max_slope - 1) { + dydx = -max_slope - 1; } else if (slope >= max_slope) { dydx = max_slope; } else { @@ -78,9 +78,9 @@ void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, const struct ia_css_ctc2_config *from, size_t size) { - unsigned i, j; - const unsigned shffl_blck = 4; - const unsigned length_zeros = 11; + unsigned int i, j; + const unsigned int shffl_blck = 4; + const unsigned int length_zeros = 11; short dydx0, dydx1, dydx2, dydx3, dydx4; (void)size; @@ -130,7 +130,7 @@ void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, for (j = 0; j < length_zeros; j++) { to->y_x[0][(i << shffl_blck) + 5 + j] = 0; to->y_y[0][(i << shffl_blck) + 5 + j] = 0; - to->e_y_slope[0][(i << shffl_blck)+ 5 + j] = 0; + to->e_y_slope[0][(i << shffl_blck) + 5 + j] = 0; } } } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h index ad7040c9d7cbf..224bdb199942c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h @@ -33,17 +33,16 @@ struct ia_css_isp_ctc2_vmem_params { /*DMEM Chroma params*/ struct ia_css_isp_ctc2_dmem_params { - /* Gains by UV(Chroma) under kneepoints uv_x0 and uv_x1*/ - int32_t uv_y0; - int32_t uv_y1; + s32 uv_y0; + s32 uv_y1; /* Kneepoints by UV(Chroma)- uv_x0 and uv_x1*/ - int32_t uv_x0; - int32_t uv_x1; + s32 uv_x0; + s32 uv_x1; /* Slope of line interconnecting uv_x0 -> uv_x1*/ - int32_t uv_dydx; + s32 uv_dydx; }; #endif /* __IA_CSS_CTC2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h index 1222cf33e8511..be9cd8c9c4705 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h @@ -23,33 +23,32 @@ * ISP261: CTC2 (CTC by Fast Approximate Distance) */ struct ia_css_ctc2_config { - /** Gains by Y(Luma) at Y =0.0,Y_X1, Y_X2, Y_X3, Y_X4 and Y_X5 * --default/ineffective value: 4096(0.5f) */ - int32_t y_y0; - int32_t y_y1; - int32_t y_y2; - int32_t y_y3; - int32_t y_y4; - int32_t y_y5; + s32 y_y0; + s32 y_y1; + s32 y_y2; + s32 y_y3; + s32 y_y4; + s32 y_y5; /* 1st-4th kneepoints by Y(Luma) --default/ineffective value:n/a * requirement: 0.0 < y_x1 < y_x2 ctc, &from->data, sizeof(to->ctc)); + memcpy(&to->ctc, &from->data, sizeof(to->ctc)); } void ia_css_ctc_debug_dtrace( const struct ia_css_ctc_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.ce_gain_exp=%d, config.y0=%d, " - "config.x1=%d, config.y1=%d, " - "config.x2=%d, config.y2=%d, " - "config.x3=%d, config.y3=%d, " - "config.x4=%d, config.y4=%d\n", + "config.ce_gain_exp=%d, config.y0=%d, config.x1=%d, config.y1=%d, config.x2=%d, config.y2=%d, config.x3=%d, config.y3=%d, config.x4=%d, config.y4=%d\n", config->ce_gain_exp, config->y0, config->x1, config->y1, config->x2, config->y2, config->x3, config->y3, config->x4, config->y4); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h index bec52a6519f97..d044071b690d3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h @@ -26,11 +26,11 @@ void ia_css_ctc_vamem_encode( struct sh_css_isp_ctc_vamem_params *to, const struct ia_css_ctc_table *from, - unsigned size); + unsigned int size); void ia_css_ctc_debug_dtrace( - const struct ia_css_ctc_config *config, unsigned level) + const struct ia_css_ctc_config *config, unsigned int level) ; #endif /* __IA_CSS_CTC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h index 6e88ad3d24201..6e541a0ebaa90 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h @@ -28,7 +28,7 @@ #define SH_CSS_ISP_CTC_TABLE_SIZE_LOG2 IA_CSS_VAMEM_1_CTC_TABLE_SIZE_LOG2 #define SH_CSS_ISP_CTC_TABLE_SIZE IA_CSS_VAMEM_1_CTC_TABLE_SIZE #else -#error "VAMEM should be {VERSION1, VERSION2}" +#error "VAMEM should be {VERSION1, VERSION2}" #endif #else @@ -38,7 +38,7 @@ /* This should be vamem_data_t, but that breaks the pipe generator */ struct sh_css_isp_ctc_vamem_params { - uint16_t ctc[SH_CSS_ISP_CTC_TABLE_SIZE]; + u16 ctc[SH_CSS_ISP_CTC_TABLE_SIZE]; }; #endif /* __IA_CSS_CTC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c index edf85aba77165..bf140d8149345 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c @@ -212,4 +212,3 @@ ia_css_config_ctc_table(void) default_ctc_table.vamem_type = 1IA_CSS_VAMEM_TYPE_1; #endif } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h index 4ac47ce10566f..f6f5ec28827fe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h @@ -15,6 +15,8 @@ #ifndef __IA_CSS_CTC_TYPES_H #define __IA_CSS_CTC_TYPES_H +#include + /* @file * CSS-API header file for Chroma Tone Control parameters. */ @@ -35,12 +37,12 @@ /* Number of elements in the CTC table. */ #define IA_CSS_VAMEM_1_CTC_TABLE_SIZE_LOG2 10 /* Number of elements in the CTC table. */ -#define IA_CSS_VAMEM_1_CTC_TABLE_SIZE (1U<pixelnoise = @@ -44,7 +44,7 @@ ia_css_de_encode( void ia_css_de_dump( const struct sh_css_isp_de_params *de, - unsigned level) + unsigned int level) { if (!de) return; ia_css_debug_dtrace(level, "Demosaic:\n"); @@ -61,18 +61,17 @@ ia_css_de_dump( void ia_css_de_debug_dtrace( const struct ia_css_de_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.pixelnoise=%d, " - "config.c1_coring_threshold=%d, config.c2_coring_threshold=%d\n", + "config.pixelnoise=%d, config.c1_coring_threshold=%d, config.c2_coring_threshold=%d\n", config->pixelnoise, config->c1_coring_threshold, config->c2_coring_threshold); } void ia_css_init_de_state( - void/*struct sh_css_isp_de_vmem_state*/ *state, + void/*struct sh_css_isp_de_vmem_state*/ * state, size_t size) { memset(state, 0, size); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h index 5dd6f06f2bf14..b7b28af365c55 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h @@ -24,21 +24,21 @@ void ia_css_de_encode( struct sh_css_isp_de_params *to, const struct ia_css_de_config *from, - unsigned size); + unsigned int size); void ia_css_de_dump( const struct sh_css_isp_de_params *de, - unsigned level); + unsigned int level); void ia_css_de_debug_dtrace( const struct ia_css_de_config *config, - unsigned level); + unsigned int level); void ia_css_init_de_state( - void/*struct sh_css_isp_de_vmem_state*/ *state, + void/*struct sh_css_isp_de_vmem_state*/ * state, size_t size); #endif /* __IA_CSS_DE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h index 833c80afc7a84..c85a57e194cc3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h @@ -19,9 +19,9 @@ /* DE (Demosaic) */ struct sh_css_isp_de_params { - int32_t pixelnoise; - int32_t c1_coring_threshold; - int32_t c2_coring_threshold; + s32 pixelnoise; + s32 c1_coring_threshold; + s32 c2_coring_threshold; }; #endif /* __IA_CSS_DE_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h index d645117634362..eddd9ae7d05f2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h @@ -20,7 +20,7 @@ /* DE (Demosaic) */ struct sh_css_isp_de_vmem_state { - VMEM_ARRAY(de_buf[4], MAX_VECTORS_PER_BUF_LINE*ISP_NWAY); + VMEM_ARRAY(de_buf[4], MAX_VECTORS_PER_BUF_LINE * ISP_NWAY); }; #endif /* __IA_CSS_DE_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h index 803be68abc541..a4b4469045703 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h @@ -40,4 +40,3 @@ struct ia_css_de_config { }; #endif /* __IA_CSS_DE_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c index a5247a57bafbb..d459ec9a973bc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c @@ -28,7 +28,7 @@ void ia_css_ecd_encode( struct sh_css_isp_ecd_params *to, const struct ia_css_ecd_config *from, - unsigned size) + unsigned int size) { (void)size; to->zip_strength = from->zip_strength; @@ -39,16 +39,15 @@ ia_css_ecd_encode( void ia_css_ecd_dump( const struct sh_css_isp_ecd_params *ecd, - unsigned level); + unsigned int level); void ia_css_ecd_debug_dtrace( const struct ia_css_ecd_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.zip_strength=%d, " - "config.fc_strength=%d, config.fc_debias=%d\n", + "config.zip_strength=%d, config.fc_strength=%d, config.fc_debias=%d\n", config->zip_strength, config->fc_strength, config->fc_debias); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h index f7cd8448cb304..69c5d2533ef7e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h @@ -24,15 +24,15 @@ void ia_css_ecd_encode( struct sh_css_isp_ecd_params *to, const struct ia_css_ecd_config *from, - unsigned size); + unsigned int size); void ia_css_ecd_dump( const struct sh_css_isp_ecd_params *ecd, - unsigned level); + unsigned int level); void ia_css_ecd_debug_dtrace( - const struct ia_css_ecd_config *config, unsigned level); + const struct ia_css_ecd_config *config, unsigned int level); #endif /* __IA_CSS_DE2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h index ea2da73a49272..868dfaaf78c78 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h @@ -22,9 +22,9 @@ /* DE (Demosaic) */ struct sh_css_isp_ecd_params { - int32_t zip_strength; - int32_t fc_strength; - int32_t fc_debias; + s32 zip_strength; + s32 fc_strength; + s32 fc_debias; }; #endif /* __IA_CSS_DE2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h index 50bdde419bb12..24700d256bfdd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h @@ -26,17 +26,16 @@ * ISP2: DE2 is used. */ struct ia_css_ecd_config { - uint16_t zip_strength; /** Strength of zipper reduction. + u16 zip_strength; /** Strength of zipper reduction. u0.13, [0,8191], default 5489(0.67), ineffective 0 */ - uint16_t fc_strength; /** Strength of false color reduction. + u16 fc_strength; /** Strength of false color reduction. u0.13, [0,8191], default 8191(almost 1.0), ineffective 0 */ - uint16_t fc_debias; /** Prevent color change + u16 fc_debias; /** Prevent color change on noise or Gr/Gb imbalance. u0.13, [0,8191], default 0, ineffective 0 */ }; #endif /* __IA_CSS_DE2_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c index b1f9dc8d662d6..039865b6a4463 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c @@ -46,7 +46,7 @@ void ia_css_dp_encode( struct sh_css_isp_dp_params *to, const struct ia_css_dp_config *from, - unsigned size) + unsigned int size) { int gain = from->gain; int gr = from->gr; @@ -63,27 +63,27 @@ ia_css_dp_encode( uDIGIT_FITTING(from->gain, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_rr_gr = - uDIGIT_FITTING (gain * gr / r, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * gr / r, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_rr_gb = - uDIGIT_FITTING (gain * gb / r, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * gb / r, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_bb_gb = - uDIGIT_FITTING (gain * gb / b, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * gb / b, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_bb_gr = - uDIGIT_FITTING (gain * gr / b, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * gr / b, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_gr_rr = - uDIGIT_FITTING (gain * r / gr, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * r / gr, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_gr_bb = - uDIGIT_FITTING (gain * b / gr, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * b / gr, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_gb_bb = - uDIGIT_FITTING (gain * b / gb, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * b / gb, 8, SH_CSS_DP_GAIN_SHIFT); to->coef_gb_rr = - uDIGIT_FITTING (gain * r / gb, 8, SH_CSS_DP_GAIN_SHIFT); + uDIGIT_FITTING(gain * r / gb, 8, SH_CSS_DP_GAIN_SHIFT); } void ia_css_dp_dump( const struct sh_css_isp_dp_params *dp, - unsigned level) + unsigned int level) { if (!dp) return; ia_css_debug_dtrace(level, "Defect Pixel Correction:\n"); @@ -116,7 +116,7 @@ ia_css_dp_dump( void ia_css_dp_debug_dtrace( const struct ia_css_dp_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.threshold=%d, config.gain=%d\n", @@ -125,7 +125,7 @@ ia_css_dp_debug_dtrace( void ia_css_init_dp_state( - void/*struct sh_css_isp_dp_vmem_state*/ *state, + void/*struct sh_css_isp_dp_vmem_state*/ * state, size_t size) { memset(state, 0, size); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h index db21814ad3db8..c8359ecc3a898 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h @@ -27,21 +27,21 @@ void ia_css_dp_encode( struct sh_css_isp_dp_params *to, const struct ia_css_dp_config *from, - unsigned size); + unsigned int size); void ia_css_dp_dump( const struct sh_css_isp_dp_params *dp, - unsigned level); + unsigned int level); void ia_css_dp_debug_dtrace( const struct ia_css_dp_config *config, - unsigned level); + unsigned int level); void ia_css_init_dp_state( - void/*struct sh_css_isp_dp_vmem_state*/ *state, + void/*struct sh_css_isp_dp_vmem_state*/ * state, size_t size); #endif /* __IA_CSS_DP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h index fc9035a98d922..8567a620696af 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h @@ -20,17 +20,17 @@ /* DP (Defect Pixel Correction) */ struct sh_css_isp_dp_params { - int32_t threshold_single; - int32_t threshold_2adjacent; - int32_t gain; - int32_t coef_rr_gr; - int32_t coef_rr_gb; - int32_t coef_bb_gb; - int32_t coef_bb_gr; - int32_t coef_gr_rr; - int32_t coef_gr_bb; - int32_t coef_gb_bb; - int32_t coef_gb_rr; + s32 threshold_single; + s32 threshold_2adjacent; + s32 gain; + s32 coef_rr_gr; + s32 coef_rr_gb; + s32 coef_bb_gb; + s32 coef_bb_gr; + s32 coef_gr_rr; + s32 coef_gr_bb; + s32 coef_gb_bb; + s32 coef_gb_rr; }; #endif /* __IA_CSS_DP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h index 1bf6dcef7dc76..e96f83e5d47cb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h @@ -19,7 +19,6 @@ * CSS-API header file for Defect Pixel Correction (DPC) parameters. */ - /* Defect Pixel Correction configuration. * * ISP block: DPC1 (DPC after WB) @@ -40,11 +39,10 @@ struct ia_css_dp_config { too large. u8.8, [0,65535], default 4096, ineffective 65535 */ - uint32_t gr; /* unsigned .<16-integer_bits> */ - uint32_t r; /* unsigned .<16-integer_bits> */ - uint32_t b; /* unsigned .<16-integer_bits> */ - uint32_t gb; /* unsigned .<16-integer_bits> */ + u32 gr; /* unsigned .<16-integer_bits> */ + u32 r; /* unsigned .<16-integer_bits> */ + u32 b; /* unsigned .<16-integer_bits> */ + u32 gb; /* unsigned .<16-integer_bits> */ }; #endif /* __IA_CSS_DP_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c index bc14b85cf9527..1217a2a7b2f55 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c @@ -23,14 +23,14 @@ ia_css_dpc2_encode( { (void)size; - assert ((from->metric1 >= 0) && (from->metric1 <= METRIC1_ONE_FP)); - assert ((from->metric3 >= 0) && (from->metric3 <= METRIC3_ONE_FP)); - assert ((from->metric2 >= METRIC2_ONE_FP) && - (from->metric2 < 256*METRIC2_ONE_FP)); - assert ((from->wb_gain_gr > 0) && (from->wb_gain_gr < 16*WBGAIN_ONE_FP)); - assert ((from->wb_gain_r > 0) && (from->wb_gain_r < 16*WBGAIN_ONE_FP)); - assert ((from->wb_gain_b > 0) && (from->wb_gain_b < 16*WBGAIN_ONE_FP)); - assert ((from->wb_gain_gb > 0) && (from->wb_gain_gb < 16*WBGAIN_ONE_FP)); + assert((from->metric1 >= 0) && (from->metric1 <= METRIC1_ONE_FP)); + assert((from->metric3 >= 0) && (from->metric3 <= METRIC3_ONE_FP)); + assert((from->metric2 >= METRIC2_ONE_FP) && + (from->metric2 < 256 * METRIC2_ONE_FP)); + assert((from->wb_gain_gr > 0) && (from->wb_gain_gr < 16 * WBGAIN_ONE_FP)); + assert((from->wb_gain_r > 0) && (from->wb_gain_r < 16 * WBGAIN_ONE_FP)); + assert((from->wb_gain_b > 0) && (from->wb_gain_b < 16 * WBGAIN_ONE_FP)); + assert((from->wb_gain_gb > 0) && (from->wb_gain_gb < 16 * WBGAIN_ONE_FP)); to->metric1 = from->metric1; to->metric2 = from->metric2; @@ -57,7 +57,7 @@ ia_css_init_dpc2_state( void ia_css_dpc2_debug_dtrace( const struct ia_css_dpc2_config *config, - unsigned level) + unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h index 38d10a5237c6e..7d4619f2bfb2e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h @@ -33,7 +33,7 @@ ia_css_init_dpc2_state( void ia_css_dpc2_debug_dtrace( const struct ia_css_dpc2_config *config, - unsigned level); + unsigned int level); #endif #endif /* __IA_CSS_DPC2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h index ef668d54fe16d..6df06fb249aa7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h @@ -18,7 +18,6 @@ #include "type_support.h" #include "vmem.h" /* for VMEM_ARRAY*/ - /* 4 planes : GR, R, B, GB */ #define NUM_PLANES 4 @@ -39,15 +38,14 @@ #define DPC2_STATE_SECOND_MINMAX_BUFFER_HEIGHT 1 #define DPC2_STATE_SECOND_MINMAX_BUFFER_WIDTH MAX_FRAME_SIMDWIDTH - struct ia_css_isp_dpc2_params { - int32_t metric1; - int32_t metric2; - int32_t metric3; - int32_t wb_gain_gr; - int32_t wb_gain_r; - int32_t wb_gain_b; - int32_t wb_gain_gb; + s32 metric1; + s32 metric2; + s32 metric3; + s32 wb_gain_gr; + s32 wb_gain_r; + s32 wb_gain_b; + s32 wb_gain_gb; }; #endif /* __IA_CSS_DPC2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h index 6727682d287ff..f78451be8d6aa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h @@ -23,10 +23,10 @@ /**@{*/ /* Floating point constants for different metrics. */ -#define METRIC1_ONE_FP (1<<12) -#define METRIC2_ONE_FP (1<<5) -#define METRIC3_ONE_FP (1<<12) -#define WBGAIN_ONE_FP (1<<9) +#define METRIC1_ONE_FP BIT(12) +#define METRIC2_ONE_FP BIT(5) +#define METRIC3_ONE_FP BIT(12) +#define WBGAIN_ONE_FP BIT(9) /**@}*/ /**@{*/ @@ -44,16 +44,16 @@ */ struct ia_css_dpc2_config { /**@{*/ - int32_t metric1; - int32_t metric2; - int32_t metric3; - int32_t wb_gain_gr; - int32_t wb_gain_r; - int32_t wb_gain_b; - int32_t wb_gain_gb; + s32 metric1; + s32 metric2; + s32 metric3; + s32 wb_gain_gr; + s32 wb_gain_r; + s32 wb_gain_b; + s32 wb_gain_gb; /**@}*/ }; + /**@}*/ #endif /* __IA_CSS_DPC2_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c index 955adc4d6ab09..0c21b41774c38 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c @@ -35,7 +35,7 @@ void ia_css_dvs_config( struct sh_css_isp_dvs_isp_config *to, const struct ia_css_dvs_configuration *from, - unsigned size) + unsigned int size) { (void)size; to->num_horizontal_blocks = @@ -80,32 +80,30 @@ convert_coords_to_ispparams( DVS_GDC_BLI_INTERP_ENVELOPE : DVS_GDC_BCI_INTERP_ENVELOPE); /* number of blocks per height and width */ - unsigned int num_blocks_y = (uv_flag ? DVS_NUM_BLOCKS_Y_CHROMA(o_height) : DVS_NUM_BLOCKS_Y(o_height) ); - unsigned int num_blocks_x = (uv_flag ? DVS_NUM_BLOCKS_X_CHROMA(o_width) : DVS_NUM_BLOCKS_X(o_width) ); // round num_x up to blockdim_x, if it concerns the Y0Y1 block (uv_flag==0) round up to even - + unsigned int num_blocks_y = (uv_flag ? DVS_NUM_BLOCKS_Y_CHROMA(o_height) : DVS_NUM_BLOCKS_Y(o_height)); + unsigned int num_blocks_x = (uv_flag ? DVS_NUM_BLOCKS_X_CHROMA(o_width) : DVS_NUM_BLOCKS_X(o_width)); // round num_x up to blockdim_x, if it concerns the Y0Y1 block (uv_flag==0) round up to even unsigned int in_stride = i_stride * DVS_INPUT_BYTES_PER_PIXEL; - unsigned width, height; + unsigned int width, height; unsigned int *xbuff = NULL; unsigned int *ybuff = NULL; struct gdc_warp_param_mem_s *ptr; - assert(config != NULL); - assert(gdc_warp_table != NULL); - assert(gdc_warp_table->address != NULL); + assert(config); + assert(gdc_warp_table); + assert(gdc_warp_table->address); ptr = (struct gdc_warp_param_mem_s *)gdc_warp_table->address; ptr += (2 * uv_flag); /* format is Y0 Y1 UV, so UV starts at 3rd position */ - if(uv_flag == 0) + if (uv_flag == 0) { xbuff = config->xcoords_y; ybuff = config->ycoords_y; width = config->width_y; height = config->height_y; - } - else + } else { xbuff = config->xcoords_uv; ybuff = config->ycoords_uv; @@ -115,7 +113,7 @@ convert_coords_to_ispparams( IA_CSS_LOG("blockdim_x %d blockdim_y %d", DVS_BLOCKDIM_X, DVS_BLOCKDIM_Y_LUMA >> uv_flag); - IA_CSS_LOG("num_blocks_x %d num_blocks_y %d", num_blocks_x,num_blocks_y); + IA_CSS_LOG("num_blocks_x %d num_blocks_y %d", num_blocks_x, num_blocks_y); IA_CSS_LOG("width %d height %d", width, height); assert(width == num_blocks_x + 1); // the width and height of the provided morphing table should be 1 more than the number of blocks @@ -123,16 +121,15 @@ convert_coords_to_ispparams( for (j = 0; j < num_blocks_y; j++) { for (i = 0; i < num_blocks_x; i++) { - x00 = xbuff[j * width + i]; - x01 = xbuff[j * width + (i+1)]; - x10 = xbuff[(j+1) * width + i]; - x11 = xbuff[(j+1) * width + (i+1)]; + x01 = xbuff[j * width + (i + 1)]; + x10 = xbuff[(j + 1) * width + i]; + x11 = xbuff[(j + 1) * width + (i + 1)]; y00 = ybuff[j * width + i]; - y01 = ybuff[j * width + (i+1)]; - y10 = ybuff[(j+1) * width + i]; - y11 = ybuff[(j+1) * width + (i+1)]; + y01 = ybuff[j * width + (i + 1)]; + y10 = ybuff[(j + 1) * width + i]; + y11 = ybuff[(j + 1) * width + (i + 1)]; xmin = min(x00, x10); xmax = max(x01, x11); @@ -140,11 +137,11 @@ convert_coords_to_ispparams( ymax = max(y10, y11); /* Assert that right column's X is greater */ - assert ( x01 >= xmin); - assert ( x11 >= xmin); + assert(x01 >= xmin); + assert(x11 >= xmin); /* Assert that bottom row's Y is greater */ - assert ( y10 >= ymin); - assert ( y11 >= ymin); + assert(y10 >= ymin); + assert(y11 >= ymin); topleft_y = ymin >> DVS_COORD_FRAC_BITS; topleft_x = ((xmin >> DVS_COORD_FRAC_BITS) @@ -201,14 +198,14 @@ convert_coords_to_ispparams( printf("p3_x: %d\n", s.p3_x); printf("p3_y: %d\n", s.p3_y); - printf("p0_x_nofrac[0]: %d\n", s.p0_x>>DVS_COORD_FRAC_BITS); - printf("p0_y_nofrac[1]: %d\n", s.p0_y>>DVS_COORD_FRAC_BITS); - printf("p1_x_nofrac[2]: %d\n", s.p1_x>>DVS_COORD_FRAC_BITS); - printf("p1_y_nofrac[3]: %d\n", s.p1_y>>DVS_COORD_FRAC_BITS); - printf("p2_x_nofrac[0]: %d\n", s.p2_x>>DVS_COORD_FRAC_BITS); - printf("p2_y_nofrac[1]: %d\n", s.p2_y>>DVS_COORD_FRAC_BITS); - printf("p3_x_nofrac[2]: %d\n", s.p3_x>>DVS_COORD_FRAC_BITS); - printf("p3_y_nofrac[3]: %d\n", s.p3_y>>DVS_COORD_FRAC_BITS); + printf("p0_x_nofrac[0]: %d\n", s.p0_x >> DVS_COORD_FRAC_BITS); + printf("p0_y_nofrac[1]: %d\n", s.p0_y >> DVS_COORD_FRAC_BITS); + printf("p1_x_nofrac[2]: %d\n", s.p1_x >> DVS_COORD_FRAC_BITS); + printf("p1_y_nofrac[3]: %d\n", s.p1_y >> DVS_COORD_FRAC_BITS); + printf("p2_x_nofrac[0]: %d\n", s.p2_x >> DVS_COORD_FRAC_BITS); + printf("p2_y_nofrac[1]: %d\n", s.p2_y >> DVS_COORD_FRAC_BITS); + printf("p3_x_nofrac[2]: %d\n", s.p3_x >> DVS_COORD_FRAC_BITS); + printf("p3_y_nofrac[3]: %d\n", s.p3_y >> DVS_COORD_FRAC_BITS); printf("\n"); #endif @@ -221,7 +218,7 @@ convert_coords_to_ispparams( if (uv_flag) ptr += 3; else - ptr += (1 + (i&1)); + ptr += (1 + (i & 1)); } } } @@ -238,9 +235,9 @@ convert_allocate_dvs_6axis_config( struct ia_css_host_data *me; struct gdc_warp_param_mem_s *isp_data_ptr; - assert(binary != NULL); - assert(dvs_6axis_config != NULL); - assert(dvs_in_frame_info != NULL); + assert(binary); + assert(dvs_6axis_config); + assert(dvs_in_frame_info); me = ia_css_host_data_allocate((size_t)((DVS_6AXIS_BYTES(binary) / 2) * 3)); @@ -264,12 +261,12 @@ convert_allocate_dvs_6axis_config( if (dvs_in_frame_info->format == IA_CSS_FRAME_FORMAT_YUV420) { /*YUV420 has half the stride for U/V plane*/ - i_stride /=2; + i_stride /= 2; } /* UV plane (packed inside the y plane) */ convert_coords_to_ispparams(me, dvs_6axis_config, - i_stride, o_width/2, o_height/2, 1); + i_stride, o_width / 2, o_height / 2, 1); return me; } @@ -281,11 +278,11 @@ store_dvs_6axis_config( const struct ia_css_frame_info *dvs_in_frame_info, hrt_vaddress ddr_addr_y) { - struct ia_css_host_data *me; - assert(dvs_6axis_config != NULL); + + assert(dvs_6axis_config); assert(ddr_addr_y != mmgr_NULL); - assert(dvs_in_frame_info != NULL); + assert(dvs_in_frame_info); me = convert_allocate_dvs_6axis_config(dvs_6axis_config, binary, @@ -303,4 +300,3 @@ store_dvs_6axis_config( return IA_CSS_SUCCESS; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h index 2f513e29d88c9..4402ca76d6271 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h @@ -32,7 +32,7 @@ void ia_css_dvs_config( struct sh_css_isp_dvs_isp_config *to, const struct ia_css_dvs_configuration *from, - unsigned size); + unsigned int size); void ia_css_dvs_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h index 66a7e58659c0b..a47f7d438ad59 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h @@ -32,8 +32,8 @@ #endif /* dvserence frame */ struct sh_css_isp_dvs_isp_config { - uint32_t num_horizontal_blocks; - uint32_t num_vertical_blocks; + u32 num_horizontal_blocks; + u32 num_vertical_blocks; }; #endif /* __IA_CSS_DVS_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h index 30772d217fb27..a1a14d93ef292 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h @@ -27,4 +27,3 @@ struct ia_css_dvs_configuration { }; #endif /* __IA_CSS_DVS_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c index 8f2178bf9e684..5a79f10a62948 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c @@ -32,56 +32,55 @@ #define NUMBER_OF_TCINV_POINTS 9 #define NUMBER_OF_FCINV_POINTS 9 -static const int16_t chgrinv_x[NUMBER_OF_CHGRINV_POINTS] = { +static const s16 chgrinv_x[NUMBER_OF_CHGRINV_POINTS] = { 0, 16, 64, 144, 272, 448, 672, 976, 1376, 1888, 2528, 3312, 4256, 5376, 6688}; -static const int16_t chgrinv_a[NUMBER_OF_CHGRINV_POINTS] = { +static const s16 chgrinv_a[NUMBER_OF_CHGRINV_POINTS] = { -7171, -256, -29, -3456, -1071, -475, -189, -102, -48, -38, -10, -9, -7, -6, 0}; -static const int16_t chgrinv_b[NUMBER_OF_CHGRINV_POINTS] = { +static const s16 chgrinv_b[NUMBER_OF_CHGRINV_POINTS] = { 8191, 1021, 256, 114, 60, 37, 24, 17, 12, 9, 6, 5, 4, 3, 2}; -static const int16_t chgrinv_c[NUMBER_OF_CHGRINV_POINTS] = { +static const s16 chgrinv_c[NUMBER_OF_CHGRINV_POINTS] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; -static const int16_t tcinv_x[NUMBER_OF_TCINV_POINTS] = { +static const s16 tcinv_x[NUMBER_OF_TCINV_POINTS] = { 0, 4, 11, 23, 42, 68, 102, 148, 205}; -static const int16_t tcinv_a[NUMBER_OF_TCINV_POINTS] = { +static const s16 tcinv_a[NUMBER_OF_TCINV_POINTS] = { -6364, -631, -126, -34, -13, -6, -4452, -2156, 0}; -static const int16_t tcinv_b[NUMBER_OF_TCINV_POINTS] = { +static const s16 tcinv_b[NUMBER_OF_TCINV_POINTS] = { 8191, 1828, 726, 352, 197, 121, 80, 55, 40}; -static const int16_t tcinv_c[NUMBER_OF_TCINV_POINTS] = { +static const s16 tcinv_c[NUMBER_OF_TCINV_POINTS] = { 1, 1, 1, 1, 1, 1, 0, 0, 0}; -static const int16_t fcinv_x[NUMBER_OF_FCINV_POINTS] = { +static const s16 fcinv_x[NUMBER_OF_FCINV_POINTS] = { 0, 80, 216, 456, 824, 1344, 2040, 2952, 4096}; -static const int16_t fcinv_a[NUMBER_OF_FCINV_POINTS] = { +static const s16 fcinv_a[NUMBER_OF_FCINV_POINTS] = { -5244, -486, -86, -2849, -961, -400, -180, -86, 0}; -static const int16_t fcinv_b[NUMBER_OF_FCINV_POINTS] = { +static const s16 fcinv_b[NUMBER_OF_FCINV_POINTS] = { 8191, 1637, 607, 287, 159, 98, 64, 44, 32}; -static const int16_t fcinv_c[NUMBER_OF_FCINV_POINTS] = { +static const s16 fcinv_c[NUMBER_OF_FCINV_POINTS] = { 1, 1, 1, 0, 0, 0, 0, 0, 0}; - void ia_css_eed1_8_vmem_encode( struct eed1_8_vmem_params *to, const struct ia_css_eed1_8_config *from, size_t size) { - unsigned i, j, base; - const unsigned total_blocks = 4; - const unsigned shuffle_block = 16; + unsigned int i, j, base; + const unsigned int total_blocks = 4; + const unsigned int shuffle_block = 16; (void)size; @@ -121,8 +120,8 @@ ia_css_eed1_8_vmem_encode( } for (j = 1; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) { - assert(from->dew_enhance_seg_x[j] > from->dew_enhance_seg_x[j-1]); - assert(from->dew_enhance_seg_y[j] > from->dew_enhance_seg_y[j-1]); + assert(from->dew_enhance_seg_x[j] > from->dew_enhance_seg_x[j - 1]); + assert(from->dew_enhance_seg_y[j] > from->dew_enhance_seg_y[j - 1]); } assert(from->dew_enhance_seg_x[0] == 0); @@ -138,15 +137,15 @@ ia_css_eed1_8_vmem_encode( assert(fcinv_x[0] == 0); for (j = 1; j < NUMBER_OF_CHGRINV_POINTS; j++) { - assert(chgrinv_x[j] > chgrinv_x[j-1]); + assert(chgrinv_x[j] > chgrinv_x[j - 1]); } for (j = 1; j < NUMBER_OF_TCINV_POINTS; j++) { - assert(tcinv_x[j] > tcinv_x[j-1]); + assert(tcinv_x[j] > tcinv_x[j - 1]); } for (j = 1; j < NUMBER_OF_FCINV_POINTS; j++) { - assert(fcinv_x[j] > fcinv_x[j-1]); + assert(fcinv_x[j] > fcinv_x[j - 1]); } /* The implementation of the calulating 1/x is based on the availability @@ -156,7 +155,7 @@ ia_css_eed1_8_vmem_encode( * initialised as described in the KFS. The remaining elements of a vector are set to 0. */ /* TODO: guard this code with above assumptions */ - for(i = 0; i < total_blocks; i++) { + for (i = 0; i < total_blocks; i++) { base = shuffle_block * i; for (j = 0; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) { @@ -171,7 +170,7 @@ ia_css_eed1_8_vmem_encode( for (j = 0; j < (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1); j++) { to->e_dew_enh_a[0][base + j] = min_t(int, max_t(int, from->dew_enhance_seg_slope[j], - -8192), 8191); + -8192), 8191); /* Convert dew_enhance_seg_exp to flag: * 0 -> 0 * 1...13 -> 1 @@ -211,7 +210,6 @@ ia_css_eed1_8_vmem_encode( } } - void ia_css_eed1_8_encode( struct eed1_8_dmem_params *to, @@ -270,7 +268,6 @@ ia_css_eed1_8_encode( to->dedgew_max = from->dedgew_max; } - void ia_css_init_eed1_8_state( void *state, @@ -279,12 +276,11 @@ ia_css_init_eed1_8_state( memset(state, 0, size); } - #ifndef IA_CSS_NO_DEBUG void ia_css_eed1_8_debug_dtrace( const struct ia_css_eed1_8_config *eed, - unsigned level) + unsigned int level) { if (!eed) return; @@ -326,4 +322,3 @@ ia_css_eed1_8_debug_dtrace( ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dedgew_max", eed->dedgew_max); } #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h index fff932c1364e2..aa38a35f75dea 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h @@ -39,7 +39,7 @@ ia_css_init_eed1_8_state( void ia_css_eed1_8_debug_dtrace( const struct ia_css_eed1_8_config *config, - unsigned level); + unsigned int level); #endif #endif /* __IA_CSS_EED1_8_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h index bc3a07fd07ebb..880454d4dcf54 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h @@ -20,7 +20,6 @@ #include "ia_css_eed1_8_types.h" /* IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS */ - /* Configuration parameters: */ /* Enable median for false color correction @@ -113,42 +112,42 @@ struct eed1_8_vmem_params { /* EED (Edge Enhancing Demosaic) ISP parameters */ struct eed1_8_dmem_params { - int32_t rbzp_strength; - - int32_t fcstrength; - int32_t fcthres_0; - int32_t fc_sat_coef; - int32_t fc_coring_prm; - int32_t fc_slope; - - int32_t aerel_thres0; - int32_t aerel_gain0; - int32_t aerel_thres_diff; - int32_t aerel_gain_diff; - - int32_t derel_thres0; - int32_t derel_gain0; - int32_t derel_thres_diff; - int32_t derel_gain_diff; - - int32_t coring_pos0; - int32_t coring_pos_diff; - int32_t coring_neg0; - int32_t coring_neg_diff; - - int32_t gain_exp; - int32_t gain_pos0; - int32_t gain_pos_diff; - int32_t gain_neg0; - int32_t gain_neg_diff; - - int32_t margin_pos0; - int32_t margin_pos_diff; - int32_t margin_neg0; - int32_t margin_neg_diff; - - int32_t e_dew_enh_asr; - int32_t dedgew_max; + s32 rbzp_strength; + + s32 fcstrength; + s32 fcthres_0; + s32 fc_sat_coef; + s32 fc_coring_prm; + s32 fc_slope; + + s32 aerel_thres0; + s32 aerel_gain0; + s32 aerel_thres_diff; + s32 aerel_gain_diff; + + s32 derel_thres0; + s32 derel_gain0; + s32 derel_thres_diff; + s32 derel_gain_diff; + + s32 coring_pos0; + s32 coring_pos_diff; + s32 coring_neg0; + s32 coring_neg_diff; + + s32 gain_exp; + s32 gain_pos0; + s32 gain_pos_diff; + s32 gain_neg0; + s32 gain_neg_diff; + + s32 margin_pos0; + s32 margin_pos_diff; + s32 margin_neg0; + s32 margin_neg_diff; + + s32 e_dew_enh_asr; + s32 dedgew_max; }; #endif /* __IA_CSS_EED1_8_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h index 32e91824a5e5a..303ec5193ffcf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h @@ -19,7 +19,6 @@ * CSS-API header file for Edge Enhanced Demosaic parameters. */ - #include "type_support.h" /** @@ -42,45 +41,45 @@ */ struct ia_css_eed1_8_config { - int32_t rbzp_strength; /** Strength of zipper reduction. */ - - int32_t fcstrength; /** Strength of false color reduction. */ - int32_t fcthres_0; /** Threshold to prevent chroma coring due to noise or green disparity in dark region. */ - int32_t fcthres_1; /** Threshold to prevent chroma coring due to noise or green disparity in bright region. */ - int32_t fc_sat_coef; /** How much color saturation to maintain in high color saturation region. */ - int32_t fc_coring_prm; /** Chroma coring coefficient for tint color suppression. */ - - int32_t aerel_thres0; /** Threshold for Non-Directional Reliability at dark region. */ - int32_t aerel_gain0; /** Gain for Non-Directional Reliability at dark region. */ - int32_t aerel_thres1; /** Threshold for Non-Directional Reliability at bright region. */ - int32_t aerel_gain1; /** Gain for Non-Directional Reliability at bright region. */ - - int32_t derel_thres0; /** Threshold for Directional Reliability at dark region. */ - int32_t derel_gain0; /** Gain for Directional Reliability at dark region. */ - int32_t derel_thres1; /** Threshold for Directional Reliability at bright region. */ - int32_t derel_gain1; /** Gain for Directional Reliability at bright region. */ - - int32_t coring_pos0; /** Positive Edge Coring Threshold in dark region. */ - int32_t coring_pos1; /** Positive Edge Coring Threshold in bright region. */ - int32_t coring_neg0; /** Negative Edge Coring Threshold in dark region. */ - int32_t coring_neg1; /** Negative Edge Coring Threshold in bright region. */ - - int32_t gain_exp; /** Common Exponent of Gain. */ - int32_t gain_pos0; /** Gain for Positive Edge in dark region. */ - int32_t gain_pos1; /** Gain for Positive Edge in bright region. */ - int32_t gain_neg0; /** Gain for Negative Edge in dark region. */ - int32_t gain_neg1; /** Gain for Negative Edge in bright region. */ - - int32_t pos_margin0; /** Margin for Positive Edge in dark region. */ - int32_t pos_margin1; /** Margin for Positive Edge in bright region. */ - int32_t neg_margin0; /** Margin for Negative Edge in dark region. */ - int32_t neg_margin1; /** Margin for Negative Edge in bright region. */ - - int32_t dew_enhance_seg_x[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: X. */ - int32_t dew_enhance_seg_y[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: Y. */ - int32_t dew_enhance_seg_slope[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Slope. */ - int32_t dew_enhance_seg_exp[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Exponent. */ - int32_t dedgew_max; /** Max Weight for Directional Edge. */ + s32 rbzp_strength; /** Strength of zipper reduction. */ + + s32 fcstrength; /** Strength of false color reduction. */ + s32 fcthres_0; /** Threshold to prevent chroma coring due to noise or green disparity in dark region. */ + s32 fcthres_1; /** Threshold to prevent chroma coring due to noise or green disparity in bright region. */ + s32 fc_sat_coef; /** How much color saturation to maintain in high color saturation region. */ + s32 fc_coring_prm; /** Chroma coring coefficient for tint color suppression. */ + + s32 aerel_thres0; /** Threshold for Non-Directional Reliability at dark region. */ + s32 aerel_gain0; /** Gain for Non-Directional Reliability at dark region. */ + s32 aerel_thres1; /** Threshold for Non-Directional Reliability at bright region. */ + s32 aerel_gain1; /** Gain for Non-Directional Reliability at bright region. */ + + s32 derel_thres0; /** Threshold for Directional Reliability at dark region. */ + s32 derel_gain0; /** Gain for Directional Reliability at dark region. */ + s32 derel_thres1; /** Threshold for Directional Reliability at bright region. */ + s32 derel_gain1; /** Gain for Directional Reliability at bright region. */ + + s32 coring_pos0; /** Positive Edge Coring Threshold in dark region. */ + s32 coring_pos1; /** Positive Edge Coring Threshold in bright region. */ + s32 coring_neg0; /** Negative Edge Coring Threshold in dark region. */ + s32 coring_neg1; /** Negative Edge Coring Threshold in bright region. */ + + s32 gain_exp; /** Common Exponent of Gain. */ + s32 gain_pos0; /** Gain for Positive Edge in dark region. */ + s32 gain_pos1; /** Gain for Positive Edge in bright region. */ + s32 gain_neg0; /** Gain for Negative Edge in dark region. */ + s32 gain_neg1; /** Gain for Negative Edge in bright region. */ + + s32 pos_margin0; /** Margin for Positive Edge in dark region. */ + s32 pos_margin1; /** Margin for Positive Edge in bright region. */ + s32 neg_margin0; /** Margin for Negative Edge in dark region. */ + s32 neg_margin1; /** Margin for Negative Edge in bright region. */ + + s32 dew_enhance_seg_x[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: X. */ + s32 dew_enhance_seg_y[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: Y. */ + s32 dew_enhance_seg_slope[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Slope. */ + s32 dew_enhance_seg_exp[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Exponent. */ + s32 dedgew_max; /** Max Weight for Directional Edge. */ }; #endif /* __IA_CSS_EED1_8_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c index 94631eee86142..de08cc2f41f8f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c @@ -30,17 +30,18 @@ void ia_css_formats_encode( struct sh_css_isp_formats_params *to, const struct ia_css_formats_config *from, - unsigned size) + unsigned int size) { (void)size; to->video_full_range_flag = from->video_full_range_flag; } + #ifndef IA_CSS_NO_DEBUG /* FIXME: See BZ 4427 */ void ia_css_formats_dump( const struct sh_css_isp_formats_params *formats, - unsigned level) + unsigned int level) { if (!formats) return; ia_css_debug_dtrace(level, "\t%-32s = %d\n", @@ -53,7 +54,7 @@ ia_css_formats_dump( void ia_css_formats_debug_dtrace( const struct ia_css_formats_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.video_full_range_flag=%d\n", diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h index 8a90cd83b248b..a6a4a2e41b21e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h @@ -24,13 +24,13 @@ void ia_css_formats_encode( struct sh_css_isp_formats_params *to, const struct ia_css_formats_config *from, - unsigned size); + unsigned int size); #ifndef IA_CSS_NO_DEBUG /* FIXME: See BZ 4427 */ void ia_css_formats_dump( const struct sh_css_isp_formats_params *formats, - unsigned level); + unsigned int level); #endif #ifndef IA_CSS_NO_DEBUG @@ -38,8 +38,7 @@ ia_css_formats_dump( void ia_css_formats_debug_dtrace( const struct ia_css_formats_config *formats, - unsigned level); + unsigned int level); #endif /*IA_CSS_NO_DEBUG*/ #endif /* __IA_CSS_FORMATS_HOST_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h index 2eb6030b60812..8f36af1a5ae62 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h @@ -19,7 +19,7 @@ /* FORMATS (Format conversion) */ struct sh_css_isp_formats_params { - int32_t video_full_range_flag; + s32 video_full_range_flag; }; #endif /* __IA_CSS_FORMATS_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h index 49479572b40d2..7cfebaf05dc2a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h @@ -28,7 +28,7 @@ * ISP2: FORMATS is used. */ struct ia_css_formats_config { - uint32_t video_full_range_flag; /** selects the range of YUV output. + u32 video_full_range_flag; /** selects the range of YUV output. u8.0, [0,1], default 1, ineffective n/a\n 1 - full range, luma 0-255, chroma 0-255\n diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h index cc8dd1a7007fe..82cb1f2c7dd79 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h @@ -20,7 +20,7 @@ #ifdef ISP2401 #define BDS_UNIT 8 #define FRAC_LOG 3 -#define FRAC_ACC (1<shift = from->shift; @@ -40,7 +40,7 @@ ia_css_fpn_encode( void ia_css_fpn_dump( const struct sh_css_isp_fpn_params *fpn, - unsigned level) + unsigned int level) { if (!fpn) return; ia_css_debug_dtrace(level, "Fixed Pattern Noise Reduction:\n"); @@ -54,16 +54,16 @@ void ia_css_fpn_config( struct sh_css_isp_fpn_isp_config *to, const struct ia_css_fpn_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS; + unsigned int elems_a = ISP_VEC_NELEMS; (void)size; ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert (elems_a % to->port_b.elems == 0); + assert(elems_a % to->port_b.elems == 0); } void @@ -86,4 +86,3 @@ ia_css_fpn_configure( ia_css_configure_fpn(binary, &config); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h index bb905c8db8c82..0aeea3752e65f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h @@ -23,18 +23,18 @@ void ia_css_fpn_encode( struct sh_css_isp_fpn_params *to, const struct ia_css_fpn_table *from, - unsigned size); + unsigned int size); void ia_css_fpn_dump( const struct sh_css_isp_fpn_params *fpn, - unsigned level); + unsigned int level); void ia_css_fpn_config( struct sh_css_isp_fpn_isp_config *to, const struct ia_css_fpn_configuration *from, - unsigned size); + unsigned int size); void ia_css_fpn_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h index 68765c3f3bf75..f103ddd882fdf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h @@ -23,12 +23,12 @@ /* FPNR (Fixed Pattern Noise Reduction) */ struct sh_css_isp_fpn_params { - int32_t shift; - int32_t enabled; + s32 shift; + s32 enabled; }; struct sh_css_isp_fpn_isp_config { - uint32_t width_a_over_b; + u32 width_a_over_b; struct dma_port_config port_b; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h index ef287fa3c428a..95552a0e3c456 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h @@ -33,15 +33,15 @@ */ struct ia_css_fpn_table { - int16_t *data; /** Table content (fixed patterns noise). + s16 *data; /** Table content (fixed patterns noise). u0.[13-shift], [0,63] */ - uint32_t width; /** Table width (in pixels). + u32 width; /** Table width (in pixels). This is the input frame width. */ - uint32_t height; /** Table height (in pixels). + u32 height; /** Table height (in pixels). This is the input frame height. */ - uint32_t shift; /** Common exponent of table content. + u32 shift; /** Common exponent of table content. u8.0, [0,13] */ - uint32_t enabled; /** Fpn is enabled. + u32 enabled; /** Fpn is enabled. bool */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c index 0cfb5c94447f5..0635190d3b716 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c @@ -37,7 +37,7 @@ void ia_css_gc_encode( struct sh_css_isp_gc_params *to, const struct ia_css_gc_config *from, - unsigned size) + unsigned int size) { (void)size; to->gain_k1 = @@ -52,7 +52,7 @@ void ia_css_ce_encode( struct sh_css_isp_ce_params *to, const struct ia_css_ce_config *from, - unsigned size) + unsigned int size) { (void)size; to->uv_level_min = from->uv_level_min; @@ -63,17 +63,17 @@ void ia_css_gc_vamem_encode( struct sh_css_isp_gc_vamem_params *to, const struct ia_css_gamma_table *from, - unsigned size) + unsigned int size) { (void)size; - memcpy (&to->gc, &from->data, sizeof(to->gc)); + memcpy(&to->gc, &from->data, sizeof(to->gc)); } #ifndef IA_CSS_NO_DEBUG void ia_css_gc_dump( const struct sh_css_isp_gc_params *gc, - unsigned level) + unsigned int level) { if (!gc) return; ia_css_debug_dtrace(level, "Gamma Correction:\n"); @@ -86,7 +86,7 @@ ia_css_gc_dump( void ia_css_ce_dump( const struct sh_css_isp_ce_params *ce, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "Chroma Enhancement:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", @@ -98,7 +98,7 @@ ia_css_ce_dump( void ia_css_gc_debug_dtrace( const struct ia_css_gc_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.gain_k1=%d, config.gain_k2=%d\n", @@ -108,11 +108,10 @@ ia_css_gc_debug_dtrace( void ia_css_ce_debug_dtrace( const struct ia_css_ce_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.uv_level_min=%d, config.uv_level_max=%d\n", config->uv_level_min, config->uv_level_max); } #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h index 06f08840563ec..4f470780002c9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h @@ -25,40 +25,40 @@ void ia_css_gc_encode( struct sh_css_isp_gc_params *to, const struct ia_css_gc_config *from, - unsigned size); + unsigned int size); void ia_css_gc_vamem_encode( struct sh_css_isp_gc_vamem_params *to, const struct ia_css_gamma_table *from, - unsigned size); + unsigned int size); void ia_css_ce_encode( struct sh_css_isp_ce_params *to, const struct ia_css_ce_config *from, - unsigned size); + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_gc_dump( const struct sh_css_isp_gc_params *gc, - unsigned level); + unsigned int level); void ia_css_ce_dump( const struct sh_css_isp_ce_params *ce, - unsigned level); + unsigned int level); void ia_css_gc_debug_dtrace( const struct ia_css_gc_config *config, - unsigned level); + unsigned int level); void ia_css_ce_debug_dtrace( const struct ia_css_ce_config *config, - unsigned level); + unsigned int level); #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h index 52972b1a07ff8..beeba6c9be6ad 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h @@ -39,23 +39,23 @@ #endif #define GAMMA_OUTPUT_BITS 8 -#define GAMMA_OUTPUT_MAX_VAL ((1<gc, &from->data, sizeof(to->gc)); + memcpy(&to->gc, &from->data, sizeof(to->gc)); } void ia_css_g_gamma_vamem_encode( struct sh_css_isp_rgb_gamma_vamem_params *to, const struct ia_css_rgb_gamma_table *from, - unsigned size) + unsigned int size) { (void)size; - memcpy (&to->gc, &from->data, sizeof(to->gc)); + memcpy(&to->gc, &from->data, sizeof(to->gc)); } void ia_css_b_gamma_vamem_encode( struct sh_css_isp_rgb_gamma_vamem_params *to, const struct ia_css_rgb_gamma_table *from, - unsigned size) + unsigned int size) { (void)size; - memcpy (&to->gc, &from->data, sizeof(to->gc)); + memcpy(&to->gc, &from->data, sizeof(to->gc)); } #ifndef IA_CSS_NO_DEBUG void ia_css_yuv2rgb_dump( const struct sh_css_isp_csc_params *yuv2rgb, - unsigned level) + unsigned int level) { ia_css_cc_dump(yuv2rgb, level, "YUV to RGB Conversion"); } @@ -93,7 +93,7 @@ ia_css_yuv2rgb_dump( void ia_css_rgb2yuv_dump( const struct sh_css_isp_csc_params *rgb2yuv, - unsigned level) + unsigned int level) { ia_css_cc_dump(rgb2yuv, level, "RGB to YUV Conversion"); } @@ -101,10 +101,9 @@ ia_css_rgb2yuv_dump( void ia_css_rgb_gamma_table_debug_dtrace( const struct ia_css_rgb_gamma_table *config, - unsigned level) + unsigned int level) { (void)config; (void)level; } #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h index ba140eefd5256..146bb1d76e403 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h @@ -26,47 +26,47 @@ void ia_css_yuv2rgb_encode( struct sh_css_isp_csc_params *to, const struct ia_css_cc_config *from, - unsigned size); + unsigned int size); void ia_css_rgb2yuv_encode( struct sh_css_isp_csc_params *to, const struct ia_css_cc_config *from, - unsigned size); + unsigned int size); void ia_css_r_gamma_vamem_encode( struct sh_css_isp_rgb_gamma_vamem_params *to, const struct ia_css_rgb_gamma_table *from, - unsigned size); + unsigned int size); void ia_css_g_gamma_vamem_encode( struct sh_css_isp_rgb_gamma_vamem_params *to, const struct ia_css_rgb_gamma_table *from, - unsigned size); + unsigned int size); void ia_css_b_gamma_vamem_encode( struct sh_css_isp_rgb_gamma_vamem_params *to, const struct ia_css_rgb_gamma_table *from, - unsigned size); + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_yuv2rgb_dump( const struct sh_css_isp_csc_params *yuv2rgb, - unsigned level); + unsigned int level); void ia_css_rgb2yuv_dump( const struct sh_css_isp_csc_params *rgb2yuv, - unsigned level); + unsigned int level); void ia_css_rgb_gamma_table_debug_dtrace( const struct ia_css_rgb_gamma_table *config, - unsigned level); + unsigned int level); #define ia_css_yuv2rgb_debug_dtrace ia_css_cc_config_debug_dtrace #define ia_css_rgb2yuv_debug_dtrace ia_css_cc_config_debug_dtrace diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h index d25239f4d86f0..458c72a45eef1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h @@ -37,7 +37,7 @@ /* This should be vamem_data_t, but that breaks the pipe generator */ struct sh_css_isp_rgb_gamma_vamem_params { - uint16_t gc[SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE]; + u16 gc[SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE]; }; #endif /* __IA_CSS_GC2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c index f14a66b78714f..a90d9d0a18547 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c @@ -129,4 +129,3 @@ ia_css_config_rgb_gamma_tables(void) default_b_gamma_table.vamem_type = IA_CSS_VAMEM_TYPE_1; #endif } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h index fab7467d30a55..7df75918ce4c7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h @@ -30,19 +30,19 @@ /* Number of elements in the sRGB gamma table. */ #define IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE_LOG2 8 -#define IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE (1U<in_frame; - const struct ia_css_frame **out_frames = (const struct ia_css_frame **)& args->out_frame; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **)&args->out_frame; const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; - const unsigned ddr_bits_per_element = sizeof(short) * 8; - const unsigned ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); - unsigned size_get = 0, size_put = 0; - unsigned offset = 0; + const unsigned int ddr_bits_per_element = sizeof(short) * 8; + const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + unsigned int size_get = 0, size_put = 0; + unsigned int offset = 0; if (binary->info->mem_offsets.offsets.param) { size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h index 7e5d4cfe3454a..3decbf1a188d1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -21,7 +21,6 @@ #include "ia_css_binary.h" #include "sh_css_internal.h" - void ia_css_bayer_io_config( const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h index 8a9a970632648..aedf2d88f87cd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h @@ -19,12 +19,12 @@ #define MAX_IO_DMA_CHANNELS 2 struct ia_css_common_io_config { - unsigned base_address; - unsigned width; - unsigned height; - unsigned stride; - unsigned ddr_elems_per_word; - unsigned dma_channel[MAX_IO_DMA_CHANNELS]; + unsigned int base_address; + unsigned int width; + unsigned int height; + unsigned int stride; + unsigned int ddr_elems_per_word; + unsigned int dma_channel[MAX_IO_DMA_CHANNELS]; }; #endif /* __IA_CSS_COMMON_IO_TYPES */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c index f80480cf9de20..5e511edb05e2d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -28,13 +28,13 @@ ia_css_bayer_io_config( const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; - const struct ia_css_frame **out_frames = (const struct ia_css_frame **)& args->out_frame; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **)&args->out_frame; const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; - const unsigned ddr_bits_per_element = sizeof(short) * 8; - const unsigned ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); - unsigned size_get = 0, size_put = 0; - unsigned offset = 0; + const unsigned int ddr_bits_per_element = sizeof(short) * 8; + const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + unsigned int size_get = 0, size_put = 0; + unsigned int offset = 0; if (binary->info->mem_offsets.offsets.param) { size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h index ab9fa31bfc5ee..eaf54524245a0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -21,7 +21,6 @@ more details. #include "ia_css_binary.h" #include "sh_css_internal.h" - void ia_css_bayer_io_config( const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h index 0a19e2d1aff4a..1a505049aa43c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h @@ -19,12 +19,12 @@ more details. #define MAX_IO_DMA_CHANNELS 3 struct ia_css_common_io_config { - unsigned base_address; - unsigned width; - unsigned height; - unsigned stride; - unsigned ddr_elems_per_word; - unsigned dma_channel[MAX_IO_DMA_CHANNELS]; + unsigned int base_address; + unsigned int width; + unsigned int height; + unsigned int stride; + unsigned int ddr_elems_per_word; + unsigned int dma_channel[MAX_IO_DMA_CHANNELS]; }; #endif /* __IA_CSS_COMMON_IO_TYPES */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c index eb9e9439cc218..bc8a695b89692 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c @@ -28,13 +28,13 @@ ia_css_yuv444_io_config( const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; - const struct ia_css_frame **out_frames = (const struct ia_css_frame **)& args->out_frame; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **)&args->out_frame; const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; - const unsigned ddr_bits_per_element = sizeof(short) * 8; - const unsigned ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); - unsigned size_get = 0, size_put = 0; - unsigned offset = 0; + const unsigned int ddr_bits_per_element = sizeof(short) * 8; + const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + unsigned int size_get = 0, size_put = 0; + unsigned int offset = 0; if (binary->info->mem_offsets.offsets.param) { size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h index 480172d39aeee..e5b2aa76ceaef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h @@ -21,7 +21,6 @@ more details. #include "ia_css_binary.h" #include "sh_css_internal.h" - void ia_css_yuv444_io_config( const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c index 9e41cc0a307f0..cc39a35b999b6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c @@ -27,7 +27,7 @@ void ia_css_iterator_config( struct sh_css_isp_iterator_isp_config *to, const struct ia_css_iterator_configuration *from, - unsigned size) + unsigned int size) { (void)size; ia_css_frame_info_to_frame_sp_info(&to->input_info, from->input_info); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h index d8f249c5a53b4..279909cf66a49 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h @@ -24,7 +24,7 @@ void ia_css_iterator_config( struct sh_css_isp_iterator_isp_config *to, const struct ia_css_iterator_configuration *from, - unsigned size); + unsigned int size); enum ia_css_err ia_css_iterator_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c index 5ddf61fc95fa2..7cef616e7d07f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c @@ -58,7 +58,6 @@ ia_css_macc1_5_vmem_encode( params->data[2][(idx)] = from->data[j + 2]; params->data[3][(idx)] = from->data[j + 3]; } - } #ifndef IA_CSS_NO_DEBUG diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h index 41a2da460dcf3..1ac2c9c50a71a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h @@ -21,11 +21,11 @@ /* MACC */ struct sh_css_isp_macc1_5_params { - int32_t exp; + s32 exp; }; struct sh_css_isp_macc1_5_vmem_params { - VMEM_ARRAY(data, IA_CSS_MACC_NUM_COEFS*ISP_NWAY); + VMEM_ARRAY(data, IA_CSS_MACC_NUM_COEFS * ISP_NWAY); }; #endif /* __IA_CSS_MACC1_5_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h index 9cd31c2c0253b..9aa352cbcffcc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h @@ -24,7 +24,6 @@ * ISP2.6.1: MACC1_5 is used. */ - /* Number of axes in the MACC table. */ #define IA_CSS_MACC_NUM_AXES 16 /* Number of coefficients per MACC axes. */ @@ -54,7 +53,7 @@ * OutV = ( 0 * InU + 4096 * InV) >> (13 - 1) */ struct ia_css_macc1_5_table { - int16_t data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; + s16 data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; /** 16 of 2x2 matix MACC1_5: s[macc_config.exp].[13-macc_config.exp], [-8192,8191] default/ineffective: (s1.12) @@ -67,7 +66,7 @@ struct ia_css_macc1_5_table { * ISP2: MACC1_5 is used. */ struct ia_css_macc1_5_config { - uint8_t exp; /** Common exponent of ia_css_macc_table. + u8 exp; /** Common exponent of ia_css_macc_table. u8.0, [0,13], default 1, ineffective 1 */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c index 1f7e9e4eec3c5..f931f631d2bcb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c @@ -27,7 +27,7 @@ void ia_css_macc_encode( struct sh_css_isp_macc_params *to, const struct ia_css_macc_config *from, - unsigned size) + unsigned int size) { (void)size; to->exp = from->exp; @@ -36,12 +36,12 @@ ia_css_macc_encode( void ia_css_macc_dump( const struct sh_css_isp_macc_params *macc, - unsigned level); + unsigned int level); void ia_css_macc_debug_dtrace( const struct ia_css_macc_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.exp=%d\n", diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h index 044b01d38ad62..843892de45a52 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h @@ -26,17 +26,16 @@ void ia_css_macc_encode( struct sh_css_isp_macc_params *to, const struct ia_css_macc_config *from, - unsigned size); - + unsigned int size); void ia_css_macc_dump( const struct sh_css_isp_macc_params *macc, - unsigned level); + unsigned int level); void ia_css_macc_debug_dtrace( const struct ia_css_macc_config *config, - unsigned level); + unsigned int level); #endif /* __IA_CSS_MACC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h index 6a12b922c4858..3b4e440c3c30a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h @@ -19,7 +19,7 @@ /* MACC */ struct sh_css_isp_macc_params { - int32_t exp; + s32 exp; }; #endif /* __IA_CSS_MACC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c index 8a6c3cafabdc8..56c2114fe54c1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c @@ -17,8 +17,8 @@ #include "ia_css_macc_table.host.h" /* Multi-Axes Color Correction table for ISP1. - * 64values = 2x2matrix for 16area, [s2.13] - * ineffective: 16 of "identity 2x2 matix" {8192,0,0,8192} + * 64values = 2x2matrix for 16area, [s2.13] + * ineffective: 16 of "identity 2x2 matix" {8192,0,0,8192} */ const struct ia_css_macc_table default_macc_table = { { 8192, 0, 0, 8192, 8192, 0, 0, 8192, @@ -32,8 +32,8 @@ const struct ia_css_macc_table default_macc_table = { }; /* Multi-Axes Color Correction table for ISP2. - * 64values = 2x2matrix for 16area, [s1.12] - * ineffective: 16 of "identity 2x2 matix" {4096,0,0,4096} + * 64values = 2x2matrix for 16area, [s1.12] + * ineffective: 16 of "identity 2x2 matix" {4096,0,0,4096} */ const struct ia_css_macc_table default_macc2_table = { { 4096, 0, 0, 4096, 4096, 0, 0, 4096, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h index 2c9e5a8ceb988..093302f08bcaf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h @@ -50,7 +50,7 @@ */ struct ia_css_macc_table { - int16_t data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; + s16 data[IA_CSS_MACC_NUM_COEFS * IA_CSS_MACC_NUM_AXES]; /** 16 of 2x2 matix MACC1: s2.13, [-65536,65535] default/ineffective: diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c index 2c2c5a5854a03..102dc6feb6d1d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c @@ -13,4 +13,3 @@ */ #include "ia_css_norm.host.h" - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h index 85dc6fc0a56b3..d432e2e39df60 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h @@ -15,5 +15,4 @@ #ifndef __IA_CSS_NORM_PARAM_H #define __IA_CSS_NORM_PARAM_H - #endif /* __IA_CSS_NORM_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c index f77aff13f8e3c..81f5a36e7b178 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c @@ -32,7 +32,7 @@ void ia_css_ob2_encode( struct sh_css_isp_ob2_params *to, const struct ia_css_ob2_config *from, - unsigned size) + unsigned int size) { (void)size; @@ -47,7 +47,7 @@ ia_css_ob2_encode( void ia_css_ob2_dump( const struct sh_css_isp_ob2_params *ob2, - unsigned level) + unsigned int level) { if (!ob2) return; @@ -61,18 +61,15 @@ ia_css_ob2_dump( "ob2_blacklevel_b", ob2->blacklevel_b); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "ob2_blacklevel_gb", ob2->blacklevel_gb); - } - void ia_css_ob2_debug_dtrace( const struct ia_css_ob2_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.level_gr=%d, config.level_r=%d, " - "config.level_b=%d, config.level_gb=%d, ", + "config.level_gr=%d, config.level_r=%d, config.level_b=%d, config.level_gb=%d, ", config->level_gr, config->level_r, config->level_b, config->level_gb); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h index 06846502eca3c..5350ec3ac6421 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h @@ -24,17 +24,17 @@ void ia_css_ob2_encode( struct sh_css_isp_ob2_params *to, const struct ia_css_ob2_config *from, - unsigned size); + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_ob2_dump( const struct sh_css_isp_ob2_params *ob2, - unsigned level); + unsigned int level); void ia_css_ob2_debug_dtrace( - const struct ia_css_ob2_config *config, unsigned level); + const struct ia_css_ob2_config *config, unsigned int level); #endif #endif /* __IA_CSS_OB2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h index 5c21d6a3911b1..c728f8791ef4d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h @@ -17,13 +17,12 @@ #include "type_support.h" - /* OB2 (Optical Black) */ struct sh_css_isp_ob2_params { - int32_t blacklevel_gr; - int32_t blacklevel_r; - int32_t blacklevel_b; - int32_t blacklevel_gb; + s32 blacklevel_gr; + s32 blacklevel_r; + s32 blacklevel_b; + s32 blacklevel_gb; }; #endif /* __IA_CSS_OB2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h index d981394c1c114..0ccc09f6eb0fe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h @@ -42,4 +42,3 @@ struct ia_css_ob2_config { }; #endif /* __IA_CSS_OB2_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c index fd891ac092edf..fce5e65ff6bce 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c @@ -47,7 +47,7 @@ ia_css_ob_encode( struct sh_css_isp_ob_params *to, const struct ia_css_ob_config *from, const struct sh_css_isp_ob_stream_config *config, - unsigned size) + unsigned int size) { unsigned int ob_bit_depth = config->isp_pipe_version == 2 ? SH_CSS_BAYER_BITS : config->raw_bit_depth; @@ -91,7 +91,7 @@ ia_css_ob_vmem_encode( struct sh_css_isp_ob_vmem_params *to, const struct ia_css_ob_config *from, const struct sh_css_isp_ob_stream_config *config, - unsigned size) + unsigned int size) { struct sh_css_isp_ob_params tmp; struct sh_css_isp_ob_params *ob = &tmp; @@ -100,18 +100,18 @@ ia_css_ob_vmem_encode( ia_css_ob_encode(&tmp, from, config, sizeof(tmp)); { - unsigned i; - unsigned sp_obarea_start_bq = ob->area_start_bq; - unsigned sp_obarea_length_bq = ob->area_length_bq; - unsigned low = sp_obarea_start_bq; - unsigned high = low + sp_obarea_length_bq; - uint16_t all_ones = ~0; + unsigned int i; + unsigned int sp_obarea_start_bq = ob->area_start_bq; + unsigned int sp_obarea_length_bq = ob->area_length_bq; + unsigned int low = sp_obarea_start_bq; + unsigned int high = low + sp_obarea_length_bq; + u16 all_ones = ~0; for (i = 0; i < OBAREA_MASK_SIZE; i++) { if (i >= low && i < high) - to->vmask[i/ISP_VEC_NELEMS][i%ISP_VEC_NELEMS] = all_ones; + to->vmask[i / ISP_VEC_NELEMS][i % ISP_VEC_NELEMS] = all_ones; else - to->vmask[i/ISP_VEC_NELEMS][i%ISP_VEC_NELEMS] = 0; + to->vmask[i / ISP_VEC_NELEMS][i % ISP_VEC_NELEMS] = 0; } } } @@ -119,7 +119,7 @@ ia_css_ob_vmem_encode( void ia_css_ob_dump( const struct sh_css_isp_ob_params *ob, - unsigned level) + unsigned int level) { if (!ob) return; ia_css_debug_dtrace(level, "Optical Black:\n"); @@ -140,20 +140,15 @@ ia_css_ob_dump( ob->area_length_bq_inverse); } - void ia_css_ob_debug_dtrace( const struct ia_css_ob_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.mode=%d, " - "config.level_gr=%d, config.level_r=%d, " - "config.level_b=%d, config.level_gb=%d, " - "config.start_position=%d, config.end_position=%d\n", + "config.mode=%d, config.level_gr=%d, config.level_r=%d, config.level_b=%d, config.level_gb=%d, config.start_position=%d, config.end_position=%d\n", config->mode, config->level_gr, config->level_r, config->level_b, config->level_gb, config->start_position, config->end_position); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h index 4af181470f8d2..64cbaf15ceba0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h @@ -31,23 +31,23 @@ ia_css_ob_encode( struct sh_css_isp_ob_params *to, const struct ia_css_ob_config *from, const struct sh_css_isp_ob_stream_config *config, - unsigned size); + unsigned int size); void ia_css_ob_vmem_encode( struct sh_css_isp_ob_vmem_params *to, const struct ia_css_ob_config *from, const struct sh_css_isp_ob_stream_config *config, - unsigned size); + unsigned int size); void ia_css_ob_dump( const struct sh_css_isp_ob_params *ob, - unsigned level); + unsigned int level); void ia_css_ob_debug_dtrace( - const struct ia_css_ob_config *config, unsigned level) + const struct ia_css_ob_config *config, unsigned int level) ; #endif /* __IA_CSS_OB_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h index a60a644bb4ff7..f5c3e14a1a8ad 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h @@ -22,23 +22,22 @@ #define OBAREA_LENGTHBQ_INVERSE_SHIFT 12 /* AREA_LENGTH_UNIT is dependent on NWAY, requires rewrite */ -#define AREA_LENGTH_UNIT (1<<12) - +#define AREA_LENGTH_UNIT BIT(12) /* OB (Optical Black) */ struct sh_css_isp_ob_stream_config { - unsigned isp_pipe_version; - unsigned raw_bit_depth; + unsigned int isp_pipe_version; + unsigned int raw_bit_depth; }; struct sh_css_isp_ob_params { - int32_t blacklevel_gr; - int32_t blacklevel_r; - int32_t blacklevel_b; - int32_t blacklevel_gb; - int32_t area_start_bq; - int32_t area_length_bq; - int32_t area_length_bq_inverse; + s32 blacklevel_gr; + s32 blacklevel_r; + s32 blacklevel_b; + s32 blacklevel_gb; + s32 area_start_bq; + s32 area_length_bq; + s32 area_length_bq_inverse; }; struct sh_css_isp_ob_vmem_params { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h index a9717b8f44acc..317b24e240d8f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h @@ -55,15 +55,14 @@ struct ia_css_ob_config { (used for Fixed Mode only). u0.16, [0,65535], default/ineffective 0 */ - uint16_t start_position; /** Start position of OB area + u16 start_position; /** Start position of OB area (used for Raster Mode only). u16.0, [0,63], default/ineffective 0 */ - uint16_t end_position; /** End position of OB area + u16 end_position; /** End position of OB area (used for Raster Mode only). u16.0, [0,63], default/ineffective 0 */ }; #endif /* __IA_CSS_OB_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c index 9efe5e5e4e06b..0446faae159f6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c @@ -42,7 +42,7 @@ void ia_css_output_encode( struct sh_css_isp_output_params *to, const struct ia_css_output_config *from, - unsigned size) + unsigned int size) { (void)size; to->enable_hflip = from->enable_hflip; @@ -53,9 +53,9 @@ void ia_css_output_config( struct sh_css_isp_output_isp_config *to, const struct ia_css_output_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS; + unsigned int elems_a = ISP_VEC_NELEMS; (void)size; ia_css_dma_configure_from_info(&to->port_b, from->info); @@ -65,16 +65,16 @@ ia_css_output_config( ia_css_frame_info_to_frame_sp_info(&to->info, from->info); /* Assume divisiblity here, may need to generalize to fixed point. */ - assert (elems_a % to->port_b.elems == 0); + assert(elems_a % to->port_b.elems == 0); } void ia_css_output0_config( struct sh_css_isp_output_isp_config *to, const struct ia_css_output0_configuration *from, - unsigned size) + unsigned int size) { - ia_css_output_config ( + ia_css_output_config( to, (const struct ia_css_output_configuration *)from, size); } @@ -82,9 +82,9 @@ void ia_css_output1_config( struct sh_css_isp_output_isp_config *to, const struct ia_css_output1_configuration *from, - unsigned size) + unsigned int size) { - ia_css_output_config ( + ia_css_output_config( to, (const struct ia_css_output_configuration *)from, size); } @@ -93,7 +93,7 @@ ia_css_output_configure( const struct ia_css_binary *binary, const struct ia_css_frame_info *info) { - if (NULL != info) { + if (info) { struct ia_css_output_configuration config = default_output_configuration; @@ -108,7 +108,7 @@ ia_css_output0_configure( const struct ia_css_binary *binary, const struct ia_css_frame_info *info) { - if (NULL != info) { + if (info) { struct ia_css_output0_configuration config = default_output0_configuration; @@ -123,8 +123,7 @@ ia_css_output1_configure( const struct ia_css_binary *binary, const struct ia_css_frame_info *info) { - - if (NULL != info) { + if (info) { struct ia_css_output1_configuration config = default_output1_configuration; @@ -137,7 +136,7 @@ ia_css_output1_configure( void ia_css_output_dump( const struct sh_css_isp_output_params *output, - unsigned level) + unsigned int level) { if (!output) return; ia_css_debug_dtrace(level, "Horizontal Output Flip:\n"); @@ -151,7 +150,7 @@ ia_css_output_dump( void ia_css_output_debug_dtrace( const struct ia_css_output_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.enable_hflip=%d", diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h index 530f934ce81e7..4fe2c54dae5e7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h @@ -27,25 +27,25 @@ void ia_css_output_encode( struct sh_css_isp_output_params *to, const struct ia_css_output_config *from, - unsigned size); + unsigned int size); void ia_css_output_config( struct sh_css_isp_output_isp_config *to, const struct ia_css_output_configuration *from, - unsigned size); + unsigned int size); void ia_css_output0_config( struct sh_css_isp_output_isp_config *to, const struct ia_css_output0_configuration *from, - unsigned size); + unsigned int size); void ia_css_output1_config( struct sh_css_isp_output_isp_config *to, const struct ia_css_output1_configuration *from, - unsigned size); + unsigned int size); void ia_css_output_configure( @@ -65,11 +65,11 @@ ia_css_output1_configure( void ia_css_output_dump( const struct sh_css_isp_output_params *output, - unsigned level); + unsigned int level); void ia_css_output_debug_dtrace( const struct ia_css_output_config *config, - unsigned level); + unsigned int level); #endif /* __IA_CSS_OUTPUT_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h index eb7defa411456..3a63eee58cb60 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h @@ -21,16 +21,16 @@ /* output frame */ struct sh_css_isp_output_isp_config { - uint32_t width_a_over_b; - uint32_t height; - uint32_t enable; + u32 width_a_over_b; + u32 height; + u32 enable; struct ia_css_frame_sp_info info; struct dma_port_config port_b; }; struct sh_css_isp_output_params { - uint8_t enable_hflip; - uint8_t enable_vflip; + u8 enable_hflip; + u8 enable_vflip; }; #endif /* __IA_CSS_OUTPUT_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h index 9c7342fb8145f..3248bc3fd6c32 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h @@ -40,9 +40,8 @@ struct ia_css_output1_configuration { }; struct ia_css_output_config { - uint8_t enable_hflip; /** enable horizontal output mirroring */ - uint8_t enable_vflip; /** enable vertical output mirroring */ + u8 enable_hflip; /** enable horizontal output mirroring */ + u8 enable_vflip; /** enable vertical output mirroring */ }; #endif /* __IA_CSS_OUTPUT_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c index d1fb4b1160039..f6e452e1d70af 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c @@ -31,16 +31,16 @@ void ia_css_qplane_config( struct sh_css_isp_qplane_isp_config *to, const struct ia_css_qplane_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS; + unsigned int elems_a = ISP_VEC_NELEMS; (void)size; ia_css_dma_configure_from_info(&to->port_b, from->info); to->width_a_over_b = elems_a / to->port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert (elems_a % to->port_b.elems == 0); + assert(elems_a % to->port_b.elems == 0); to->inout_port_config = from->pipe->inout_port_config; to->format = from->info->format; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h index c41e9e5e0fd7a..7448ec706893b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h @@ -32,7 +32,7 @@ void ia_css_qplane_config( struct sh_css_isp_qplane_isp_config *to, const struct ia_css_qplane_configuration *from, - unsigned size); + unsigned int size); void ia_css_qplane_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h index 5885f621de88a..87898d2df2de1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h @@ -20,11 +20,11 @@ /* qplane channel */ struct sh_css_isp_qplane_isp_config { - uint32_t width_a_over_b; + u32 width_a_over_b; struct dma_port_config port_b; - uint32_t inout_port_config; - uint32_t input_needs_raw_binning; - uint32_t format; /* enum ia_css_frame_format */ + u32 inout_port_config; + u32 input_needs_raw_binning; + u32 format; /* enum ia_css_frame_format */ }; #endif /* __IA_CSS_QPLANE_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h index 62d371841619b..b7ecd8f40c1c0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h @@ -23,11 +23,9 @@ * ISP block: qplane frame */ - struct ia_css_qplane_configuration { const struct sh_css_sp_pipeline *pipe; const struct ia_css_frame_info *info; }; #endif /* __IA_CSS_QPLANE_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c index fa9ce0fedf234..3d8d2683fb5df 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c @@ -24,15 +24,14 @@ #include "ia_css_raw.host.h" - static const struct ia_css_raw_configuration default_config = { .pipe = (struct sh_css_sp_pipeline *)NULL, }; static inline unsigned -sh_css_elems_bytes_from_info (unsigned raw_bit_depth) +sh_css_elems_bytes_from_info(unsigned int raw_bit_depth) { - return CEIL_DIV(raw_bit_depth,8); + return CEIL_DIV(raw_bit_depth, 8); } /* MW: These areMIPI / ISYS properties, not camera function properties */ @@ -74,9 +73,9 @@ void ia_css_raw_config( struct sh_css_isp_raw_isp_config *to, const struct ia_css_raw_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS; + unsigned int elems_a = ISP_VEC_NELEMS; const struct ia_css_frame_info *in_info = from->in_info; const struct ia_css_frame_info *internal_info = from->internal_info; @@ -121,7 +120,7 @@ ia_css_raw_configure( bool two_ppc, bool deinterleaved) { - uint8_t enable_left_padding = (uint8_t)((binary->left_padding) ? 1 : 0); + u8 enable_left_padding = (uint8_t)((binary->left_padding) ? 1 : 0); struct ia_css_raw_configuration config = default_config; config.pipe = pipe; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h index ac6b7f6b59c62..189c0839ee01d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h @@ -24,7 +24,7 @@ void ia_css_raw_config( struct sh_css_isp_raw_isp_config *to, const struct ia_css_raw_configuration *from, - unsigned size); + unsigned int size); void ia_css_raw_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h index 12168b2dec2d0..a1a314272a77c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h @@ -21,18 +21,18 @@ /* Raw channel */ struct sh_css_isp_raw_isp_config { - uint32_t width_a_over_b; + u32 width_a_over_b; struct dma_port_config port_b; - uint32_t inout_port_config; - uint32_t input_needs_raw_binning; - uint32_t format; /* enum ia_css_frame_format */ - uint32_t required_bds_factor; - uint32_t two_ppc; - uint32_t stream_format; /* enum sh_stream_format */ - uint32_t deinterleaved; - uint32_t start_column; /*left crop offset*/ - uint32_t start_line; /*top crop offset*/ - uint8_t enable_left_padding; /*need this for multiple binary case*/ + u32 inout_port_config; + u32 input_needs_raw_binning; + u32 format; /* enum ia_css_frame_format */ + u32 required_bds_factor; + u32 two_ppc; + u32 stream_format; /* enum sh_stream_format */ + u32 deinterleaved; + u32 start_column; /*left crop offset*/ + u32 start_line; /*top crop offset*/ + u8 enable_left_padding; /*need this for multiple binary case*/ }; #endif /* __IA_CSS_RAW_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h index ae868eb5e10f7..7838f59a29861 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h @@ -30,8 +30,7 @@ struct ia_css_raw_configuration { bool two_ppc; enum atomisp_input_format stream_format; bool deinterleaved; - uint8_t enable_left_padding; + u8 enable_left_padding; }; #endif /* __IA_CSS_RAW_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c index 92168211683d5..50ab19ad8b1e3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c @@ -25,7 +25,7 @@ void ia_css_raa_encode( struct sh_css_isp_aa_params *to, const struct ia_css_aa_config *from, - unsigned size) + unsigned int size) { (void)size; (void)to; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h index b4f245c19f18b..9435781ac99ee 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h @@ -22,6 +22,6 @@ void ia_css_raa_encode( struct sh_css_isp_aa_params *to, const struct ia_css_aa_config *from, - unsigned size); + unsigned int size); #endif /* __IA_CSS_RAA_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c index 4c0ed5d4d971f..692727ed01007 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c @@ -25,12 +25,12 @@ void ia_css_ref_config( struct sh_css_isp_ref_isp_config *to, const struct ia_css_ref_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS, i; + unsigned int elems_a = ISP_VEC_NELEMS, i; (void)size; - ia_css_dma_configure_from_info(&to->port_b, &(from->ref_frames[0]->info)); + ia_css_dma_configure_from_info(&to->port_b, &from->ref_frames[0]->info); to->width_a_over_b = elems_a / to->port_b.elems; to->dvs_frame_delay = from->dvs_frame_delay; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) { @@ -44,7 +44,7 @@ ia_css_ref_config( } /* Assume divisiblity here, may need to generalize to fixed point. */ - assert (elems_a % to->port_b.elems == 0); + assert(elems_a % to->port_b.elems == 0); } void @@ -54,7 +54,7 @@ ia_css_ref_configure( const uint32_t dvs_frame_delay) { struct ia_css_ref_configuration config; - unsigned i; + unsigned int i; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) config.ref_frames[i] = ref_frames[i]; @@ -65,7 +65,7 @@ ia_css_ref_configure( void ia_css_init_ref_state( struct sh_css_isp_ref_dmem_state *state, - unsigned size) + unsigned int size) { (void)size; assert(MAX_NUM_VIDEO_DELAY_FRAMES >= 2); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h index 3c6d728d49ec6..29cca48b21930 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h @@ -26,7 +26,7 @@ void ia_css_ref_config( struct sh_css_isp_ref_isp_config *to, const struct ia_css_ref_configuration *from, - unsigned size); + unsigned int size); void ia_css_ref_configure( @@ -37,5 +37,5 @@ ia_css_ref_configure( void ia_css_init_ref_state( struct sh_css_isp_ref_dmem_state *state, - unsigned size); + unsigned int size); #endif /* __IA_CSS_REF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h index 026443b999a64..0a0498c17fbac 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h @@ -22,15 +22,15 @@ /* Reference frame */ struct ia_css_ref_configuration { const struct ia_css_frame *ref_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; - uint32_t dvs_frame_delay; + u32 dvs_frame_delay; }; struct sh_css_isp_ref_isp_config { - uint32_t width_a_over_b; + u32 width_a_over_b; struct dma_port_config port_b; hrt_vaddress ref_frame_addr_y[MAX_NUM_VIDEO_DELAY_FRAMES]; hrt_vaddress ref_frame_addr_c[MAX_NUM_VIDEO_DELAY_FRAMES]; - uint32_t dvs_frame_delay; + u32 dvs_frame_delay; }; #endif /* __IA_CSS_REF_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h index 7867be8a7958f..1d30ccc2c6384 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h @@ -19,8 +19,8 @@ /* REF (temporal noise reduction) */ struct sh_css_isp_ref_dmem_state { - int32_t ref_in_buf_idx; - int32_t ref_out_buf_idx; + s32 ref_in_buf_idx; + s32 ref_out_buf_idx; }; #endif /* __IA_CSS_REF_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h index 4750fba268b93..156d6cd8cf3ad 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h @@ -22,7 +22,4 @@ #include - - #endif /* __IA_CSS_REF_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c index aa733674f42b6..254835184fe49 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c @@ -46,7 +46,7 @@ static void ia_css_ae_encode( struct sh_css_isp_ae_params *to, const struct ia_css_3a_config *from, - unsigned size) + unsigned int size) { (void)size; /* coefficients to calculate Y */ @@ -62,7 +62,7 @@ static void ia_css_awb_encode( struct sh_css_isp_awb_params *to, const struct ia_css_3a_config *from, - unsigned size) + unsigned int size) { (void)size; /* AWB level gate */ @@ -78,7 +78,7 @@ static void ia_css_af_encode( struct sh_css_isp_af_params *to, const struct ia_css_3a_config *from, - unsigned size) + unsigned int size) { unsigned int i; (void)size; @@ -98,7 +98,7 @@ void ia_css_s3a_encode( struct sh_css_isp_s3a_params *to, const struct ia_css_3a_config *from, - unsigned size) + unsigned int size) { (void)size; @@ -110,13 +110,13 @@ ia_css_s3a_encode( #if 0 void ia_css_process_s3a( - unsigned pipe_id, + unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params) { short dmem_offset = stage->binary->info->mem_offsets->dmem.s3a; - assert(params != NULL); + assert(params); if (dmem_offset >= 0) { ia_css_s3a_encode((struct sh_css_isp_s3a_params *) @@ -137,7 +137,7 @@ ia_css_process_s3a( void ia_css_ae_dump( const struct sh_css_isp_ae_params *ae, - unsigned level) + unsigned int level) { if (!ae) return; ia_css_debug_dtrace(level, "\t%-32s = %d\n", @@ -151,7 +151,7 @@ ia_css_ae_dump( void ia_css_awb_dump( const struct sh_css_isp_awb_params *awb, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "\t%-32s = %d\n", "awb_lg_high_raw", awb->lg_high_raw); @@ -164,7 +164,7 @@ ia_css_awb_dump( void ia_css_af_dump( const struct sh_css_isp_af_params *af, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "\t%-32s = %d\n", "af_fir1[0]", af->fir1[0]); @@ -199,23 +199,21 @@ ia_css_af_dump( void ia_css_s3a_dump( const struct sh_css_isp_s3a_params *s3a, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "S3A Support:\n"); - ia_css_ae_dump (&s3a->ae, level); - ia_css_awb_dump (&s3a->awb, level); - ia_css_af_dump (&s3a->af, level); + ia_css_ae_dump(&s3a->ae, level); + ia_css_awb_dump(&s3a->awb, level); + ia_css_af_dump(&s3a->af, level); } void ia_css_s3a_debug_dtrace( const struct ia_css_3a_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.ae_y_coef_r=%d, config.ae_y_coef_g=%d, " - "config.ae_y_coef_b=%d, config.awb_lg_high_raw=%d, " - "config.awb_lg_low=%d, config.awb_lg_high=%d\n", + "config.ae_y_coef_r=%d, config.ae_y_coef_g=%d, config.ae_y_coef_b=%d, config.awb_lg_high_raw=%d, config.awb_lg_low=%d, config.awb_lg_high=%d\n", config->ae_y_coef_r, config->ae_y_coef_g, config->ae_y_coef_b, config->awb_lg_high_raw, config->awb_lg_low, config->awb_lg_high); @@ -238,9 +236,9 @@ ia_css_s3a_hmem_decode( int count_for_3a; int sum_r, diff; - assert(host_stats != NULL); - assert(host_stats->rgby_data != NULL); - assert(hmem_buf != NULL); + assert(host_stats); + assert(host_stats->rgby_data); + assert(hmem_buf); count_for_3a = host_stats->grid.width * host_stats->grid.height * host_stats->grid.bqs_per_grid_cell @@ -267,6 +265,7 @@ ia_css_s3a_hmem_decode( int sum_g = 0; int sum_b = 0; int sum_y = 0; + for (i = 0; i < HMEM_UNIT_SIZE; i++) { sum_g += out_ptr[i].g; sum_b += out_ptr[i].b; @@ -301,9 +300,9 @@ ia_css_s3a_dmem_decode( int isp_width, host_width, height, i; struct ia_css_3a_output *host_ptr; - assert(host_stats != NULL); - assert(host_stats->data != NULL); - assert(isp_stats != NULL); + assert(host_stats); + assert(host_stats->data); + assert(isp_stats); isp_width = host_stats->grid.aligned_width; host_width = host_stats->grid.width; @@ -324,25 +323,25 @@ ia_css_s3a_dmem_decode( static inline int merge_hi_lo_14(unsigned short hi, unsigned short lo) { - int val = (int) ((((unsigned int) hi << 14) & 0xfffc000) | - ((unsigned int) lo & 0x3fff)); + int val = (int)((((unsigned int)hi << 14) & 0xfffc000) | + ((unsigned int)lo & 0x3fff)); return val; } void ia_css_s3a_vmem_decode( struct ia_css_3a_statistics *host_stats, - const uint16_t *isp_stats_hi, + const u16 *isp_stats_hi, const uint16_t *isp_stats_lo) { int out_width, out_height, chunk, rest, kmax, y, x, k, elm_start, elm, ofs; - const uint16_t *hi, *lo; + const u16 *hi, *lo; struct ia_css_3a_output *output; - assert(host_stats!= NULL); - assert(host_stats->data != NULL); - assert(isp_stats_hi != NULL); - assert(isp_stats_lo != NULL); + assert(host_stats); + assert(host_stats->data); + assert(isp_stats_hi); + assert(isp_stats_lo); output = host_stats->data; out_width = host_stats->grid.width; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h index 4bc6c0bf478f8..1dfe326263183 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h @@ -29,33 +29,33 @@ void ia_css_s3a_encode( struct sh_css_isp_s3a_params *to, const struct ia_css_3a_config *from, - unsigned size); + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_ae_dump( const struct sh_css_isp_ae_params *ae, - unsigned level); + unsigned int level); void ia_css_awb_dump( const struct sh_css_isp_awb_params *awb, - unsigned level); + unsigned int level); void ia_css_af_dump( const struct sh_css_isp_af_params *af, - unsigned level); + unsigned int level); void ia_css_s3a_dump( const struct sh_css_isp_s3a_params *s3a, - unsigned level); + unsigned int level); void ia_css_s3a_debug_dtrace( const struct ia_css_3a_config *config, - unsigned level); + unsigned int level); #endif void @@ -71,7 +71,7 @@ ia_css_s3a_dmem_decode( void ia_css_s3a_vmem_decode( struct ia_css_3a_statistics *host_stats, - const uint16_t *isp_stats_hi, + const u16 *isp_stats_hi, const uint16_t *isp_stats_lo); #endif /* __IA_CSS_S3A_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h index 35fb0a2c921a1..041101767ff2f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h @@ -20,29 +20,29 @@ /* AE (3A Support) */ struct sh_css_isp_ae_params { /* coefficients to calculate Y */ - int32_t y_coef_r; - int32_t y_coef_g; - int32_t y_coef_b; + s32 y_coef_r; + s32 y_coef_g; + s32 y_coef_b; }; /* AWB (3A Support) */ struct sh_css_isp_awb_params { - int32_t lg_high_raw; - int32_t lg_low; - int32_t lg_high; + s32 lg_high_raw; + s32 lg_low; + s32 lg_high; }; /* AF (3A Support) */ struct sh_css_isp_af_params { - int32_t fir1[7]; - int32_t fir2[7]; + s32 fir1[7]; + s32 fir2[7]; }; /* S3A (3A Support) */ struct sh_css_isp_s3a_params { /* coefficients to calculate Y */ struct sh_css_isp_ae_params ae; - + /* AWB level gate */ struct sh_css_isp_awb_params awb; @@ -50,5 +50,4 @@ struct sh_css_isp_s3a_params { struct sh_css_isp_af_params af; }; - #endif /* __IA_CSS_S3A_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h index 63e70669f0859..be8e83ec215c3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h @@ -21,7 +21,7 @@ #include -#if (defined(SYSTEM_css_skycam_c0_system)) && (! defined(PIPE_GENERATION) ) +#if (defined(SYSTEM_css_skycam_c0_system)) && (!defined(PIPE_GENERATION)) #include "../../../../components/stats_3a/src/stats_3a_public.h" #endif @@ -37,25 +37,24 @@ * ISP2: S3A2 is used. */ struct ia_css_3a_grid_info { - #if defined(SYSTEM_css_skycam_c0_system) - uint32_t ae_enable; /** ae enabled in binary, + u32 ae_enable; /** ae enabled in binary, 0:disabled, 1:enabled */ struct ae_public_config_grid_config ae_grd_info; /** see description in ae_public.h*/ - uint32_t awb_enable; /** awb enabled in binary, + u32 awb_enable; /** awb enabled in binary, 0:disabled, 1:enabled */ struct awb_public_config_grid_config awb_grd_info; /** see description in awb_public.h*/ - uint32_t af_enable; /** af enabled in binary, + u32 af_enable; /** af enabled in binary, 0:disabled, 1:enabled */ struct af_public_grid_config af_grd_info; /** see description in af_public.h*/ - uint32_t awb_fr_enable; /** awb_fr enabled in binary, + u32 awb_fr_enable; /** awb_fr enabled in binary, 0:disabled, 1:enabled */ struct awb_fr_public_grid_config awb_fr_grd_info;/** see description in awb_fr_public.h*/ - uint32_t elem_bit_depth; /** TODO:Taken from BYT - need input from AIQ + u32 elem_bit_depth; /** TODO:Taken from BYT - need input from AIQ if needed for SKC Bit depth of element used to calculate 3A statistics. @@ -63,41 +62,40 @@ struct ia_css_3a_grid_info { bayer bit depth in DSP. */ #else - uint32_t enable; /** 3A statistics enabled. + u32 enable; /** 3A statistics enabled. 0:disabled, 1:enabled */ - uint32_t use_dmem; /** DMEM or VMEM determines layout. + u32 use_dmem; /** DMEM or VMEM determines layout. 0:3A statistics are stored to VMEM, 1:3A statistics are stored to DMEM */ - uint32_t has_histogram; /** Statistics include histogram. + u32 has_histogram; /** Statistics include histogram. 0:no histogram, 1:has histogram */ - uint32_t width; /** Width of 3A grid table. + u32 width; /** Width of 3A grid table. (= Horizontal number of grid cells in table, which cells have effective statistics.) */ - uint32_t height; /** Height of 3A grid table. + u32 height; /** Height of 3A grid table. (= Vertical number of grid cells in table, which cells have effective statistics.) */ - uint32_t aligned_width; /** Horizontal stride (for alloc). + u32 aligned_width; /** Horizontal stride (for alloc). (= Horizontal number of grid cells in table, which means the allocated width.) */ - uint32_t aligned_height; /** Vertical stride (for alloc). + u32 aligned_height; /** Vertical stride (for alloc). (= Vertical number of grid cells in table, which means the allocated height.) */ - uint32_t bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. + u32 bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. (1BQ means {Gr,R,B,Gb}(2x2 pixels).) Valid values are 8,16,32,64. */ - uint32_t deci_factor_log2; /** log2 of bqs_per_grid_cell. */ - uint32_t elem_bit_depth; /** Bit depth of element used + u32 deci_factor_log2; /** log2 of bqs_per_grid_cell. */ + u32 elem_bit_depth; /** Bit depth of element used to calculate 3A statistics. This is 13, which is the normalized bayer bit depth in DSP. */ #endif }; - /* This struct should be split into 3, for AE, AWB and AF. * However, that will require driver/ 3A lib modifications. */ @@ -163,31 +161,30 @@ struct ia_css_3a_config { * ISP2: S3A2 is used. */ struct ia_css_3a_output { - int32_t ae_y; /** Sum of Y in a statistics window, for AE. + s32 ae_y; /** Sum of Y in a statistics window, for AE. (u19.13) */ - int32_t awb_cnt; /** Number of effective pixels + s32 awb_cnt; /** Number of effective pixels in a statistics window. Pixels passed by the AWB level gate check are judged as "effective". (u32) */ - int32_t awb_gr; /** Sum of Gr in a statistics window, for AWB. + s32 awb_gr; /** Sum of Gr in a statistics window, for AWB. All Gr pixels (not only for effective pixels) are summed. (u19.13) */ - int32_t awb_r; /** Sum of R in a statistics window, for AWB. + s32 awb_r; /** Sum of R in a statistics window, for AWB. All R pixels (not only for effective pixels) are summed. (u19.13) */ - int32_t awb_b; /** Sum of B in a statistics window, for AWB. + s32 awb_b; /** Sum of B in a statistics window, for AWB. All B pixels (not only for effective pixels) are summed. (u19.13) */ - int32_t awb_gb; /** Sum of Gb in a statistics window, for AWB. + s32 awb_gb; /** Sum of Gb in a statistics window, for AWB. All Gb pixels (not only for effective pixels) are summed. (u19.13) */ - int32_t af_hpf1; /** Sum of |Y| following high pass filter af_fir1 + s32 af_hpf1; /** Sum of |Y| following high pass filter af_fir1 within a statistics window, for AF. (u19.13) */ - int32_t af_hpf2; /** Sum of |Y| following high pass filter af_fir2 + s32 af_hpf2; /** Sum of |Y| following high pass filter af_fir2 within a statistics window, for AF. (u19.13) */ }; - /* 3A Statistics. This structure describes the statistics that are generated * using the provided configuration (ia_css_3a_config). */ @@ -210,11 +207,10 @@ struct ia_css_3a_statistics { * ISP2: HIST2 is used. */ struct ia_css_3a_rgby_output { - uint32_t r; /** Number of R of one bin of the histogram R. (u24) */ - uint32_t g; /** Number of G of one bin of the histogram G. (u24) */ - uint32_t b; /** Number of B of one bin of the histogram B. (u24) */ - uint32_t y; /** Number of Y of one bin of the histogram Y. (u24) */ + u32 r; /** Number of R of one bin of the histogram R. (u24) */ + u32 g; /** Number of G of one bin of the histogram G. (u24) */ + u32 b; /** Number of B of one bin of the histogram B. (u24) */ + u32 y; /** Number of Y of one bin of the histogram Y. (u24) */ }; #endif /* __IA_CSS_S3A_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c index 565ae45b75417..8ec9296300ca0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c @@ -29,7 +29,7 @@ void ia_css_sc_encode( struct sh_css_isp_sc_params *to, struct ia_css_shading_table **from, - unsigned size) + unsigned int size) { (void)size; to->gain_shift = (*from)->fraction_bits; @@ -38,7 +38,7 @@ ia_css_sc_encode( void ia_css_sc_dump( const struct sh_css_isp_sc_params *sc, - unsigned level) + unsigned int level) { if (!sc) return; ia_css_debug_dtrace(level, "Shading Correction:\n"); @@ -51,11 +51,11 @@ void ia_css_sc_config( struct sh_css_isp_sc_isp_config *to, const struct ia_css_sc_configuration *from, - unsigned size) + unsigned int size) { - uint32_t internal_org_x_bqs = from->internal_frame_origin_x_bqs_on_sctbl; - uint32_t internal_org_y_bqs = from->internal_frame_origin_y_bqs_on_sctbl; - uint32_t slice, rest, i; + u32 internal_org_x_bqs = from->internal_frame_origin_x_bqs_on_sctbl; + u32 internal_org_y_bqs = from->internal_frame_origin_y_bqs_on_sctbl; + u32 slice, rest, i; (void)size; @@ -73,7 +73,7 @@ ia_css_sc_config( void ia_css_sc_configure( const struct ia_css_binary *binary, - uint32_t internal_frame_origin_x_bqs_on_sctbl, + u32 internal_frame_origin_x_bqs_on_sctbl, uint32_t internal_frame_origin_y_bqs_on_sctbl) { const struct ia_css_sc_configuration config = { @@ -95,9 +95,9 @@ void sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, struct ia_css_shading_settings *settings) { - if (settings == NULL) + if (!settings) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_get_shading_settings() enter: settings=%p\n", settings); @@ -113,9 +113,9 @@ void sh_css_set_shading_settings(struct ia_css_isp_parameters *params, const struct ia_css_shading_settings *settings) { - if (settings == NULL) + if (!settings) return; - assert(params != NULL); + assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_shading_settings() enter: settings.enable_shading_table_conversion=%d\n", @@ -127,4 +127,5 @@ sh_css_set_shading_settings(struct ia_css_isp_parameters *params, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_shading_settings() leave: return_void\n"); } + /* ------ deprecated(bz675) : to ------ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h index b35ac3e4009be..6f25401c173f8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h @@ -24,12 +24,12 @@ void ia_css_sc_encode( struct sh_css_isp_sc_params *to, struct ia_css_shading_table **from, - unsigned size); + unsigned int size); void ia_css_sc_dump( const struct sh_css_isp_sc_params *sc, - unsigned level); + unsigned int level); #ifdef ISP2401 /* @brief Configure the shading correction. @@ -43,7 +43,7 @@ void ia_css_sc_config( struct sh_css_isp_sc_isp_config *to, const struct ia_css_sc_configuration *from, - unsigned size); + unsigned int size); /* @brief Configure the shading correction. * @param[in] binary The binary, which has the shading correction. @@ -60,7 +60,7 @@ ia_css_sc_config( void ia_css_sc_configure( const struct ia_css_binary *binary, - uint32_t internal_frame_origin_x_bqs_on_sctbl, + u32 internal_frame_origin_x_bqs_on_sctbl, uint32_t internal_frame_origin_y_bqs_on_sctbl); #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h index d997d5137634c..85bc4f2c8d06f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h @@ -46,7 +46,7 @@ #endif /* SC (Shading Corrction) */ struct sh_css_isp_sc_params { - int32_t gain_shift; + s32 gain_shift; }; #ifdef ISP2401 @@ -63,8 +63,8 @@ struct sh_css_isp_sc_params { #define SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES 8 struct sh_css_isp_sc_isp_config { - uint32_t interped_gain_hor_slice_bqs[SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES]; - uint32_t internal_frame_origin_y_bqs_on_sctbl; + u32 interped_gain_hor_slice_bqs[SH_CSS_SC_INTERPED_GAIN_HOR_SLICE_TIMES]; + u32 internal_frame_origin_y_bqs_on_sctbl; }; #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h index 30ce499ac8cfc..8cd4f4eccfbc3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h @@ -19,7 +19,6 @@ * CSS-API header file for Lens Shading Correction (SC) parameters. */ - /* Number of color planes in the shading table. */ #define IA_CSS_SC_NUM_COLORS 4 @@ -64,25 +63,25 @@ enum ia_css_sc_color { * ISP2: SC1 is used. */ struct ia_css_shading_table { - uint32_t enable; /** Set to false for no shading correction. - The data field can be NULL when enable == true */ + u32 enable; /** Set to false for no shading correction. + The data field can be NULL when enable == true */ /* ------ deprecated(bz675) : from ------ */ - uint32_t sensor_width; /** Native sensor width in pixels. */ - uint32_t sensor_height; /** Native sensor height in lines. + u32 sensor_width; /** Native sensor width in pixels. */ + u32 sensor_height; /** Native sensor height in lines. When shading_settings.enable_shading_table_conversion is set as 0, sensor_width and sensor_height are NOT used. These are used only in the legacy shading table conversion in the css, when shading_settings. enable_shading_table_conversion is set as 1. */ /* ------ deprecated(bz675) : to ------ */ - uint32_t width; /** Number of data points per line per color. + u32 width; /** Number of data points per line per color. u8.0, [0,81] */ - uint32_t height; /** Number of lines of data points per color. + u32 height; /** Number of lines of data points per color. u8.0, [0,61] */ - uint32_t fraction_bits; /** Bits of fractional part in the data + u32 fraction_bits; /** Bits of fractional part in the data points. u8.0, [0,13] */ - uint16_t *data[IA_CSS_SC_NUM_COLORS]; + u16 *data[IA_CSS_SC_NUM_COLORS]; /** Table data, one array for each color. Use ia_css_sc_color to index this array. u[13-fraction_bits].[fraction_bits], [0,8191] */ @@ -96,7 +95,7 @@ struct ia_css_shading_table { * removed from the css. */ struct ia_css_shading_settings { - uint32_t enable_shading_table_conversion; /** Set to 0, + u32 enable_shading_table_conversion; /** Set to 0, if the conversion of the shading table should be disabled in the css. (default 1) 0: The shading table is directly sent to the isp. @@ -115,6 +114,7 @@ struct ia_css_shading_settings { enable_shading_table_conversion is set as 1 by default in the css. */ }; + /* ------ deprecated(bz675) : to ------ */ #ifdef ISP2401 @@ -124,8 +124,8 @@ struct ia_css_shading_settings { * NOTE: The shading table size is larger than or equal to the internal frame size. */ struct ia_css_sc_configuration { - uint32_t internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ - uint32_t internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ + u32 internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ + u32 internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ /** NOTE: bqs = size in BQ(Bayer Quad) unit. 1BQ means {Gr,R,B,Gb}(2x2 pixels). Horizontal 1 bqs corresponds to horizontal 2 pixels. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h index 4eb4910798fab..d5be09e851d2c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h @@ -57,29 +57,29 @@ IA_CSS_DVS_NUM_COEF_TYPES) #ifndef PIPE_GENERATION -#if defined(__ISP) || defined (MK_FIRMWARE) +#if defined(__ISP) || defined(MK_FIRMWARE) /* Array cannot be 2-dimensional, since driver ddr allocation does not know stride */ struct sh_css_isp_sdis_hori_proj_tbl { - int32_t tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_HOR_PROJ_NUM_ISP]; + s32 tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_HOR_PROJ_NUM_ISP]; #if DVS2_PROJ_MARGIN > 0 - int32_t margin[DVS2_PROJ_MARGIN]; + s32 margin[DVS2_PROJ_MARGIN]; #endif }; struct sh_css_isp_sdis_vert_proj_tbl { - int32_t tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_VER_PROJ_NUM_ISP]; + s32 tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_VER_PROJ_NUM_ISP]; #if DVS2_PROJ_MARGIN > 0 - int32_t margin[DVS2_PROJ_MARGIN]; + s32 margin[DVS2_PROJ_MARGIN]; #endif }; struct sh_css_isp_sdis_hori_coef_tbl { - VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_HOR_COEF_NUM_VECS*ISP_NWAY); + VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_HOR_COEF_NUM_VECS * ISP_NWAY); }; struct sh_css_isp_sdis_vert_coef_tbl { - VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_VER_COEF_NUM_VECS*ISP_NWAY); + VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_VER_COEF_NUM_VECS * ISP_NWAY); }; #endif /* defined(__ISP) || defined (MK_FIRMWARE) */ @@ -87,10 +87,10 @@ struct sh_css_isp_sdis_vert_coef_tbl { #ifndef PIPE_GENERATION struct s_sdis_config { - unsigned horicoef_vectors; - unsigned vertcoef_vectors; - unsigned horiproj_num; - unsigned vertproj_num; + unsigned int horicoef_vectors; + unsigned int vertcoef_vectors; + unsigned int horiproj_num; + unsigned int vertproj_num; }; extern struct s_sdis_config sdis_config; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h index 381e5730d405c..c72b36a0ca18c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h @@ -25,8 +25,8 @@ */ struct ia_css_dvs_grid_dim { - uint32_t width; /** Width of DVS grid table in cells */ - uint32_t height; /** Height of DVS grid table in cells */ + u32 width; /** Width of DVS grid table in cells */ + u32 height; /** Height of DVS grid table in cells */ }; /* DVS statistics dimensions in number of cells for @@ -38,7 +38,7 @@ struct ia_css_sdis_info { struct ia_css_dvs_grid_dim dim; /* Dimensions */ struct ia_css_dvs_grid_dim pad; /* Padded dimensions */ } grid, coef, proj; - uint32_t deci_factor_log2; + u32 deci_factor_log2; }; /* DVS statistics grid @@ -49,23 +49,23 @@ struct ia_css_sdis_info { * ISP2: SDVS2 is used. */ struct ia_css_dvs_grid_res { - uint32_t width; /** Width of DVS grid table. + u32 width; /** Width of DVS grid table. (= Horizontal number of grid cells in table, which cells have effective statistics.) For DVS1, this is equal to the number of vertical statistics. */ - uint32_t aligned_width; /** Stride of each grid line. + u32 aligned_width; /** Stride of each grid line. (= Horizontal number of grid cells in table, which means the allocated width.) */ - uint32_t height; /** Height of DVS grid table. + u32 height; /** Height of DVS grid table. (= Vertical number of grid cells in table, which cells have effective statistics.) For DVS1, This is equal to the number of horizontal statistics. */ - uint32_t aligned_height;/** Stride of each grid column. + u32 aligned_height;/** Stride of each grid column. (= Vertical number of grid cells in table, which means the allocated height.) */ @@ -75,35 +75,35 @@ struct ia_css_dvs_grid_res { * However, that implies driver I/F changes */ struct ia_css_dvs_grid_info { - uint32_t enable; /** DVS statistics enabled. + u32 enable; /** DVS statistics enabled. 0:disabled, 1:enabled */ - uint32_t width; /** Width of DVS grid table. + u32 width; /** Width of DVS grid table. (= Horizontal number of grid cells in table, which cells have effective statistics.) For DVS1, this is equal to the number of vertical statistics. */ - uint32_t aligned_width; /** Stride of each grid line. + u32 aligned_width; /** Stride of each grid line. (= Horizontal number of grid cells in table, which means the allocated width.) */ - uint32_t height; /** Height of DVS grid table. + u32 height; /** Height of DVS grid table. (= Vertical number of grid cells in table, which cells have effective statistics.) For DVS1, This is equal to the number of horizontal statistics. */ - uint32_t aligned_height;/** Stride of each grid column. + u32 aligned_height;/** Stride of each grid column. (= Vertical number of grid cells in table, which means the allocated height.) */ - uint32_t bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. + u32 bqs_per_grid_cell; /** Grid cell size in BQ(Bayer Quad) unit. (1BQ means {Gr,R,B,Gb}(2x2 pixels).) For DVS1, valid value is 64. For DVS2, valid value is only 64, currently. */ - uint32_t num_hor_coefs; /** Number of horizontal coefficients. */ - uint32_t num_ver_coefs; /** Number of vertical coefficients. */ + u32 num_hor_coefs; /** Number of horizontal coefficients. */ + u32 num_ver_coefs; /** Number of vertical coefficients. */ }; /* Number of DVS statistics levels diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c index 0fdd696bf6549..22293829ad9bf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c @@ -26,76 +26,76 @@ const struct ia_css_dvs_coefficients default_sdis_config = { }; static void -fill_row(short *private, const short *public, unsigned width, unsigned padding) +fill_row(short *private, const short *public, unsigned int width, unsigned int padding) { assert((int)width >= 0); assert((int)padding >= 0); - memcpy (private, public, width*sizeof(short)); - memset (&private[width], 0, padding*sizeof(short)); + memcpy(private, public, width * sizeof(short)); + memset(&private[width], 0, padding * sizeof(short)); } -void ia_css_sdis_horicoef_vmem_encode ( +void ia_css_sdis_horicoef_vmem_encode( struct sh_css_isp_sdis_hori_coef_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size) + unsigned int size) { - unsigned aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; - unsigned width = from->grid.num_hor_coefs; - int padding = aligned_width-width; - unsigned stride = size/IA_CSS_DVS_NUM_COEF_TYPES/sizeof(short); - unsigned total_bytes = aligned_width*IA_CSS_DVS_NUM_COEF_TYPES*sizeof(short); + unsigned int aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; + unsigned int width = from->grid.num_hor_coefs; + int padding = aligned_width - width; + unsigned int stride = size / IA_CSS_DVS_NUM_COEF_TYPES / sizeof(short); + unsigned int total_bytes = aligned_width * IA_CSS_DVS_NUM_COEF_TYPES * sizeof(short); short *public = from->hor_coefs; - short *private = (short*)to; - unsigned type; + short *private = (short *)to; + unsigned int type; /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); + assert(size % (IA_CSS_DVS_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); for (type = 0; type < IA_CSS_DVS_NUM_COEF_TYPES; type++) { - fill_row(&private[type*stride], &public[type*width], width, padding); + fill_row(&private[type * stride], &public[type * width], width, padding); } } -void ia_css_sdis_vertcoef_vmem_encode ( +void ia_css_sdis_vertcoef_vmem_encode( struct sh_css_isp_sdis_vert_coef_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size) + unsigned int size) { - unsigned aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; - unsigned height = from->grid.num_ver_coefs; - int padding = aligned_height-height; - unsigned stride = size/IA_CSS_DVS_NUM_COEF_TYPES/sizeof(short); - unsigned total_bytes = aligned_height*IA_CSS_DVS_NUM_COEF_TYPES*sizeof(short); + unsigned int aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; + unsigned int height = from->grid.num_ver_coefs; + int padding = aligned_height - height; + unsigned int stride = size / IA_CSS_DVS_NUM_COEF_TYPES / sizeof(short); + unsigned int total_bytes = aligned_height * IA_CSS_DVS_NUM_COEF_TYPES * sizeof(short); short *public = from->ver_coefs; - short *private = (short*)to; - unsigned type; + short *private = (short *)to; + unsigned int type; /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); + assert(size % (IA_CSS_DVS_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); for (type = 0; type < IA_CSS_DVS_NUM_COEF_TYPES; type++) { - fill_row(&private[type*stride], &public[type*height], height, padding); + fill_row(&private[type * stride], &public[type * height], height, padding); } } -void ia_css_sdis_horiproj_encode ( +void ia_css_sdis_horiproj_encode( struct sh_css_isp_sdis_hori_proj_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size) + unsigned int size) { (void)to; (void)from; (void)size; } -void ia_css_sdis_vertproj_encode ( +void ia_css_sdis_vertproj_encode( struct sh_css_isp_sdis_vert_proj_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size) + unsigned int size) { (void)to; (void)from; @@ -115,8 +115,8 @@ void ia_css_get_isp_dis_coefficients( IA_CSS_ENTER("void"); - assert(horizontal_coefficients != NULL); - assert(vertical_coefficients != NULL); + assert(horizontal_coefficients); + assert(vertical_coefficients); params = stream->isp_params_configs; @@ -131,12 +131,12 @@ void ia_css_get_isp_dis_coefficients( ver_num_3a = dvs_binary->dis.coef.dim.height; for (i = 0; i < IA_CSS_DVS_NUM_COEF_TYPES; i++) { - fill_row(&horizontal_coefficients[i*hor_num_isp], - ¶ms->dvs_coefs.hor_coefs[i*hor_num_3a], hor_num_3a, hor_num_isp-hor_num_3a); + fill_row(&horizontal_coefficients[i * hor_num_isp], + ¶ms->dvs_coefs.hor_coefs[i * hor_num_3a], hor_num_3a, hor_num_isp - hor_num_3a); } for (i = 0; i < SH_CSS_DIS_VER_NUM_COEF_TYPES(dvs_binary); i++) { - fill_row(&vertical_coefficients[i*ver_num_isp], - ¶ms->dvs_coefs.ver_coefs[i*ver_num_3a], ver_num_3a, ver_num_isp-ver_num_3a); + fill_row(&vertical_coefficients[i * ver_num_isp], + ¶ms->dvs_coefs.ver_coefs[i * ver_num_3a], ver_num_3a, ver_num_isp - ver_num_3a); } IA_CSS_LEAVE("void"); @@ -162,11 +162,11 @@ ia_css_sdis_ver_coef_tbl_bytes( void ia_css_sdis_init_info( struct ia_css_sdis_info *dis, - unsigned sc_3a_dis_width, - unsigned sc_3a_dis_padded_width, - unsigned sc_3a_dis_height, - unsigned isp_pipe_version, - unsigned enabled) + unsigned int sc_3a_dis_width, + unsigned int sc_3a_dis_padded_width, + unsigned int sc_3a_dis_height, + unsigned int isp_pipe_version, + unsigned int enabled) { if (!enabled) { *dis = (struct ia_css_sdis_info) { }; @@ -232,8 +232,8 @@ ia_css_get_dvs_statistics( IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); - assert(host_stats != NULL); - assert(isp_stats != NULL); + assert(host_stats); + assert(isp_stats); map = ia_css_isp_dvs_statistics_map_allocate(isp_stats, NULL); if (map) { @@ -255,14 +255,14 @@ ia_css_translate_dvs_statistics( const struct ia_css_isp_dvs_statistics_map *isp_stats) { unsigned int hor_num_isp, ver_num_isp, hor_num_dvs, ver_num_dvs, i; - int32_t *hor_ptr_dvs, *ver_ptr_dvs, *hor_ptr_isp, *ver_ptr_isp; + s32 *hor_ptr_dvs, *ver_ptr_dvs, *hor_ptr_isp, *ver_ptr_isp; - assert(host_stats != NULL); - assert(host_stats->hor_proj != NULL); - assert(host_stats->ver_proj != NULL); - assert(isp_stats != NULL); - assert(isp_stats->hor_proj != NULL); - assert(isp_stats->ver_proj != NULL); + assert(host_stats); + assert(host_stats->hor_proj); + assert(host_stats->ver_proj); + assert(isp_stats); + assert(isp_stats->hor_proj); + assert(isp_stats->ver_proj); IA_CSS_ENTER("hproj=%p, vproj=%p, haddr=%p, vaddr=%p", host_stats->hor_proj, host_stats->ver_proj, @@ -297,14 +297,14 @@ ia_css_isp_dvs_statistics_allocate( struct ia_css_isp_dvs_statistics *me; int hor_size, ver_size; - assert(grid != NULL); + assert(grid); IA_CSS_ENTER("grid=%p", grid); if (!grid->enable) return NULL; - me = sh_css_calloc(1,sizeof(*me)); + me = sh_css_calloc(1, sizeof(*me)); if (!me) goto err; @@ -313,7 +313,6 @@ ia_css_isp_dvs_statistics_allocate( ver_size = CEIL_MUL(sizeof(int) * IA_CSS_DVS_NUM_COEF_TYPES * grid->aligned_width, HIVE_ISP_DDR_WORD_BYTES); - me->size = hor_size + ver_size; me->data_ptr = mmgr_malloc(me->size); if (me->data_ptr == mmgr_NULL) @@ -351,7 +350,7 @@ ia_css_isp_dvs_statistics_map_allocate( } me->data_ptr = data_ptr; - me->data_allocated = data_ptr == NULL; + me->data_allocated = !data_ptr; if (!me->data_ptr) { me->data_ptr = sh_css_malloc(isp_stats->size); @@ -365,8 +364,8 @@ ia_css_isp_dvs_statistics_map_allocate( me->size = isp_stats->size; /* GCC complains when we assign a char * to a void *, so these * casts are necessary unfortunately. */ - me->hor_proj = (void*)base_ptr; - me->ver_proj = (void*)(base_ptr + isp_stats->hor_size); + me->hor_proj = (void *)base_ptr; + me->ver_proj = (void *)(base_ptr + isp_stats->hor_size); return me; err: @@ -388,35 +387,35 @@ ia_css_isp_dvs_statistics_map_free(struct ia_css_isp_dvs_statistics_map *me) void ia_css_isp_dvs_statistics_free(struct ia_css_isp_dvs_statistics *me) { - if (me != NULL) { + if (me) { hmm_free(me->data_ptr); sh_css_free(me); } } void ia_css_sdis_horicoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis_vertcoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis_horiproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis_vertproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h index 95e2c61bbcbab..1f9bcacdecbbb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h @@ -28,25 +28,25 @@ struct sh_css_isp_sdis_vert_coef_tbl; struct sh_css_isp_sdis_hori_proj_tbl; struct sh_css_isp_sdis_vert_proj_tbl; -void ia_css_sdis_horicoef_vmem_encode ( +void ia_css_sdis_horicoef_vmem_encode( struct sh_css_isp_sdis_hori_coef_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size); + unsigned int size); -void ia_css_sdis_vertcoef_vmem_encode ( +void ia_css_sdis_vertcoef_vmem_encode( struct sh_css_isp_sdis_vert_coef_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size); + unsigned int size); -void ia_css_sdis_horiproj_encode ( +void ia_css_sdis_horiproj_encode( struct sh_css_isp_sdis_hori_proj_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size); + unsigned int size); -void ia_css_sdis_vertproj_encode ( +void ia_css_sdis_vertproj_encode( struct sh_css_isp_sdis_vert_proj_tbl *to, const struct ia_css_dvs_coefficients *from, - unsigned size); + unsigned int size); void ia_css_get_isp_dis_coefficients( struct ia_css_stream *stream, @@ -77,25 +77,25 @@ size_t ia_css_sdis_ver_coef_tbl_bytes(const struct ia_css_binary *binary); void ia_css_sdis_init_info( struct ia_css_sdis_info *dis, - unsigned sc_3a_dis_width, - unsigned sc_3a_dis_padded_width, - unsigned sc_3a_dis_height, - unsigned isp_pipe_version, - unsigned enabled); + unsigned int sc_3a_dis_width, + unsigned int sc_3a_dis_padded_width, + unsigned int sc_3a_dis_height, + unsigned int isp_pipe_version, + unsigned int enabled); void ia_css_sdis_clear_coefficients( struct ia_css_dvs_coefficients *dvs_coefs); void ia_css_sdis_horicoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level); + const struct ia_css_dvs_coefficients *config, unsigned int level); void ia_css_sdis_vertcoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level); + const struct ia_css_dvs_coefficients *config, unsigned int level); void ia_css_sdis_horiproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level); + const struct ia_css_dvs_coefficients *config, unsigned int level); void ia_css_sdis_vertproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned level); + const struct ia_css_dvs_coefficients *config, unsigned int level); #endif /* __IA_CSS_SDIS_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h index d2ee57008fb6a..766dfd9a4f751 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h @@ -32,9 +32,9 @@ struct ia_css_dvs_coefficients { struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ - int16_t *hor_coefs; /** the pointer to int16_t[grid.num_hor_coefs * IA_CSS_DVS_NUM_COEF_TYPES] + s16 *hor_coefs; /** the pointer to int16_t[grid.num_hor_coefs * IA_CSS_DVS_NUM_COEF_TYPES] containing the horizontal coefficients */ - int16_t *ver_coefs; /** the pointer to int16_t[grid.num_ver_coefs * IA_CSS_DVS_NUM_COEF_TYPES] + s16 *ver_coefs; /** the pointer to int16_t[grid.num_ver_coefs * IA_CSS_DVS_NUM_COEF_TYPES] containing the vertical coefficients */ }; @@ -44,9 +44,9 @@ struct ia_css_dvs_coefficients { struct ia_css_dvs_statistics { struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ - int32_t *hor_proj; /** the pointer to int16_t[grid.height * IA_CSS_DVS_NUM_COEF_TYPES] + s32 *hor_proj; /** the pointer to int16_t[grid.height * IA_CSS_DVS_NUM_COEF_TYPES] containing the horizontal projections */ - int32_t *ver_proj; /** the pointer to int16_t[grid.width * IA_CSS_DVS_NUM_COEF_TYPES] + s32 *ver_proj; /** the pointer to int16_t[grid.width * IA_CSS_DVS_NUM_COEF_TYPES] containing the vertical projections */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c index 9bccb64731546..fea03777f81cc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c @@ -24,71 +24,70 @@ const struct ia_css_dvs2_coefficients default_sdis2_config = { }; static void -fill_row(short *private, const short *public, unsigned width, unsigned padding) +fill_row(short *private, const short *public, unsigned int width, unsigned int padding) { - memcpy (private, public, width*sizeof(short)); - memset (&private[width], 0, padding*sizeof(short)); + memcpy(private, public, width * sizeof(short)); + memset(&private[width], 0, padding * sizeof(short)); } -void ia_css_sdis2_horicoef_vmem_encode ( +void ia_css_sdis2_horicoef_vmem_encode( struct sh_css_isp_sdis_hori_coef_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size) + unsigned int size) { - unsigned aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; - unsigned width = from->grid.num_hor_coefs; - int padding = aligned_width-width; - unsigned stride = size/IA_CSS_DVS2_NUM_COEF_TYPES/sizeof(short); - unsigned total_bytes = aligned_width*IA_CSS_DVS2_NUM_COEF_TYPES*sizeof(short); - short *private = (short*)to; - + unsigned int aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; + unsigned int width = from->grid.num_hor_coefs; + int padding = aligned_width - width; + unsigned int stride = size / IA_CSS_DVS2_NUM_COEF_TYPES / sizeof(short); + unsigned int total_bytes = aligned_width * IA_CSS_DVS2_NUM_COEF_TYPES * sizeof(short); + short *private = (short *)to; /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); - fill_row(&private[0*stride], from->hor_coefs.odd_real, width, padding); - fill_row(&private[1*stride], from->hor_coefs.odd_imag, width, padding); - fill_row(&private[2*stride], from->hor_coefs.even_real, width, padding); - fill_row(&private[3*stride], from->hor_coefs.even_imag, width, padding); + assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); + fill_row(&private[0 * stride], from->hor_coefs.odd_real, width, padding); + fill_row(&private[1 * stride], from->hor_coefs.odd_imag, width, padding); + fill_row(&private[2 * stride], from->hor_coefs.even_real, width, padding); + fill_row(&private[3 * stride], from->hor_coefs.even_imag, width, padding); } -void ia_css_sdis2_vertcoef_vmem_encode ( +void ia_css_sdis2_vertcoef_vmem_encode( struct sh_css_isp_sdis_vert_coef_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size) + unsigned int size) { - unsigned aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; - unsigned height = from->grid.num_ver_coefs; - int padding = aligned_height-height; - unsigned stride = size/IA_CSS_DVS2_NUM_COEF_TYPES/sizeof(short); - unsigned total_bytes = aligned_height*IA_CSS_DVS2_NUM_COEF_TYPES*sizeof(short); - short *private = (short*)to; + unsigned int aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; + unsigned int height = from->grid.num_ver_coefs; + int padding = aligned_height - height; + unsigned int stride = size / IA_CSS_DVS2_NUM_COEF_TYPES / sizeof(short); + unsigned int total_bytes = aligned_height * IA_CSS_DVS2_NUM_COEF_TYPES * sizeof(short); + short *private = (short *)to; /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES*ISP_VEC_NELEMS*sizeof(short)) == 0); - fill_row(&private[0*stride], from->ver_coefs.odd_real, height, padding); - fill_row(&private[1*stride], from->ver_coefs.odd_imag, height, padding); - fill_row(&private[2*stride], from->ver_coefs.even_real, height, padding); - fill_row(&private[3*stride], from->ver_coefs.even_imag, height, padding); + assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); + fill_row(&private[0 * stride], from->ver_coefs.odd_real, height, padding); + fill_row(&private[1 * stride], from->ver_coefs.odd_imag, height, padding); + fill_row(&private[2 * stride], from->ver_coefs.even_real, height, padding); + fill_row(&private[3 * stride], from->ver_coefs.even_imag, height, padding); } -void ia_css_sdis2_horiproj_encode ( +void ia_css_sdis2_horiproj_encode( struct sh_css_isp_sdis_hori_proj_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size) + unsigned int size) { (void)to; (void)from; (void)size; } -void ia_css_sdis2_vertproj_encode ( +void ia_css_sdis2_vertproj_encode( struct sh_css_isp_sdis_vert_proj_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size) + unsigned int size) { (void)to; (void)from; @@ -113,15 +112,15 @@ void ia_css_get_isp_dvs2_coefficients( IA_CSS_ENTER("void"); - assert(stream != NULL); - assert(hor_coefs_odd_real != NULL); - assert(hor_coefs_odd_imag != NULL); - assert(hor_coefs_even_real != NULL); - assert(hor_coefs_even_imag != NULL); - assert(ver_coefs_odd_real != NULL); - assert(ver_coefs_odd_imag != NULL); - assert(ver_coefs_even_real != NULL); - assert(ver_coefs_even_imag != NULL); + assert(stream); + assert(hor_coefs_odd_real); + assert(hor_coefs_odd_imag); + assert(hor_coefs_even_real); + assert(hor_coefs_even_imag); + assert(ver_coefs_odd_real); + assert(ver_coefs_odd_imag); + assert(ver_coefs_even_real); + assert(ver_coefs_even_imag); params = stream->isp_params_configs; @@ -135,14 +134,14 @@ void ia_css_get_isp_dvs2_coefficients( hor_num_isp = dvs_binary->dis.coef.pad.width; ver_num_isp = dvs_binary->dis.coef.pad.height; - memcpy (hor_coefs_odd_real, params->dvs2_coefs.hor_coefs.odd_real, hor_num_3a * sizeof(short)); - memcpy (hor_coefs_odd_imag, params->dvs2_coefs.hor_coefs.odd_imag, hor_num_3a * sizeof(short)); - memcpy (hor_coefs_even_real, params->dvs2_coefs.hor_coefs.even_real, hor_num_3a * sizeof(short)); - memcpy (hor_coefs_even_imag, params->dvs2_coefs.hor_coefs.even_imag, hor_num_3a * sizeof(short)); - memcpy (ver_coefs_odd_real, params->dvs2_coefs.ver_coefs.odd_real, ver_num_3a * sizeof(short)); - memcpy (ver_coefs_odd_imag, params->dvs2_coefs.ver_coefs.odd_imag, ver_num_3a * sizeof(short)); - memcpy (ver_coefs_even_real, params->dvs2_coefs.ver_coefs.even_real, ver_num_3a * sizeof(short)); - memcpy (ver_coefs_even_imag, params->dvs2_coefs.ver_coefs.even_imag, ver_num_3a * sizeof(short)); + memcpy(hor_coefs_odd_real, params->dvs2_coefs.hor_coefs.odd_real, hor_num_3a * sizeof(short)); + memcpy(hor_coefs_odd_imag, params->dvs2_coefs.hor_coefs.odd_imag, hor_num_3a * sizeof(short)); + memcpy(hor_coefs_even_real, params->dvs2_coefs.hor_coefs.even_real, hor_num_3a * sizeof(short)); + memcpy(hor_coefs_even_imag, params->dvs2_coefs.hor_coefs.even_imag, hor_num_3a * sizeof(short)); + memcpy(ver_coefs_odd_real, params->dvs2_coefs.ver_coefs.odd_real, ver_num_3a * sizeof(short)); + memcpy(ver_coefs_odd_imag, params->dvs2_coefs.ver_coefs.odd_imag, ver_num_3a * sizeof(short)); + memcpy(ver_coefs_even_real, params->dvs2_coefs.ver_coefs.even_real, ver_num_3a * sizeof(short)); + memcpy(ver_coefs_even_imag, params->dvs2_coefs.ver_coefs.even_imag, ver_num_3a * sizeof(short)); IA_CSS_LEAVE("void"); } @@ -170,8 +169,8 @@ ia_css_get_dvs2_statistics( IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); - assert(host_stats != NULL); - assert(isp_stats != NULL); + assert(host_stats); + assert(isp_stats); map = ia_css_isp_dvs_statistics_map_allocate(isp_stats, NULL); if (map) { @@ -194,26 +193,22 @@ ia_css_translate_dvs2_statistics( { unsigned int size_bytes, table_width, table_size, height; unsigned int src_offset = 0, dst_offset = 0; - int32_t *htemp_ptr, *vtemp_ptr; - - assert(host_stats != NULL); - assert(host_stats->hor_prod.odd_real != NULL); - assert(host_stats->hor_prod.odd_imag != NULL); - assert(host_stats->hor_prod.even_real != NULL); - assert(host_stats->hor_prod.even_imag != NULL); - assert(host_stats->ver_prod.odd_real != NULL); - assert(host_stats->ver_prod.odd_imag != NULL); - assert(host_stats->ver_prod.even_real != NULL); - assert(host_stats->ver_prod.even_imag != NULL); - assert(isp_stats != NULL); - assert(isp_stats->hor_proj != NULL); - assert(isp_stats->ver_proj != NULL); - - IA_CSS_ENTER("hor_coefs.odd_real=%p, hor_coefs.odd_imag=%p, " - "hor_coefs.even_real=%p, hor_coefs.even_imag=%p, " - "ver_coefs.odd_real=%p, ver_coefs.odd_imag=%p, " - "ver_coefs.even_real=%p, ver_coefs.even_imag=%p, " - "haddr=%p, vaddr=%p", + s32 *htemp_ptr, *vtemp_ptr; + + assert(host_stats); + assert(host_stats->hor_prod.odd_real); + assert(host_stats->hor_prod.odd_imag); + assert(host_stats->hor_prod.even_real); + assert(host_stats->hor_prod.even_imag); + assert(host_stats->ver_prod.odd_real); + assert(host_stats->ver_prod.odd_imag); + assert(host_stats->ver_prod.even_real); + assert(host_stats->ver_prod.even_imag); + assert(isp_stats); + assert(isp_stats->hor_proj); + assert(isp_stats->ver_proj); + + IA_CSS_ENTER("hor_coefs.odd_real=%p, hor_coefs.odd_imag=%p, hor_coefs.even_real=%p, hor_coefs.even_imag=%p, ver_coefs.odd_real=%p, ver_coefs.odd_imag=%p, ver_coefs.even_real=%p, ver_coefs.even_imag=%p, haddr=%p, vaddr=%p", host_stats->hor_prod.odd_real, host_stats->hor_prod.odd_imag, host_stats->hor_prod.even_real, host_stats->hor_prod.even_imag, host_stats->ver_prod.odd_real, host_stats->ver_prod.odd_imag, @@ -233,23 +228,23 @@ ia_css_translate_dvs2_statistics( for (height = 0; height < host_stats->grid.aligned_height; height++) { /* hor stats */ memcpy(host_stats->hor_prod.odd_real + dst_offset, - &htemp_ptr[0*table_size+src_offset], size_bytes); + &htemp_ptr[0 * table_size + src_offset], size_bytes); memcpy(host_stats->hor_prod.odd_imag + dst_offset, - &htemp_ptr[1*table_size+src_offset], size_bytes); + &htemp_ptr[1 * table_size + src_offset], size_bytes); memcpy(host_stats->hor_prod.even_real + dst_offset, - &htemp_ptr[2*table_size+src_offset], size_bytes); + &htemp_ptr[2 * table_size + src_offset], size_bytes); memcpy(host_stats->hor_prod.even_imag + dst_offset, - &htemp_ptr[3*table_size+src_offset], size_bytes); + &htemp_ptr[3 * table_size + src_offset], size_bytes); /* ver stats */ memcpy(host_stats->ver_prod.odd_real + dst_offset, - &vtemp_ptr[0*table_size+src_offset], size_bytes); + &vtemp_ptr[0 * table_size + src_offset], size_bytes); memcpy(host_stats->ver_prod.odd_imag + dst_offset, - &vtemp_ptr[1*table_size+src_offset], size_bytes); + &vtemp_ptr[1 * table_size + src_offset], size_bytes); memcpy(host_stats->ver_prod.even_real + dst_offset, - &vtemp_ptr[2*table_size+src_offset], size_bytes); + &vtemp_ptr[2 * table_size + src_offset], size_bytes); memcpy(host_stats->ver_prod.even_imag + dst_offset, - &vtemp_ptr[3*table_size+src_offset], size_bytes); + &vtemp_ptr[3 * table_size + src_offset], size_bytes); src_offset += table_width; /* aligned table width */ dst_offset += host_stats->grid.aligned_width; @@ -265,14 +260,14 @@ ia_css_isp_dvs2_statistics_allocate( struct ia_css_isp_dvs_statistics *me; int size; - assert(grid != NULL); + assert(grid); IA_CSS_ENTER("grid=%p", grid); if (!grid->enable) return NULL; - me = sh_css_calloc(1,sizeof(*me)); + me = sh_css_calloc(1, sizeof(*me)); if (!me) goto err; @@ -282,7 +277,7 @@ ia_css_isp_dvs2_statistics_allocate( size = CEIL_MUL(sizeof(int) * grid->aligned_width, HIVE_ISP_DDR_WORD_BYTES) * grid->aligned_height * IA_CSS_DVS2_NUM_COEF_TYPES; - me->size = 2*size; + me->size = 2 * size; me->data_ptr = mmgr_malloc(me->size); if (me->data_ptr == mmgr_NULL) goto err; @@ -303,35 +298,35 @@ ia_css_isp_dvs2_statistics_allocate( void ia_css_isp_dvs2_statistics_free(struct ia_css_isp_dvs_statistics *me) { - if (me != NULL) { + if (me) { hmm_free(me->data_ptr); sh_css_free(me); } } void ia_css_sdis2_horicoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis2_vertcoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis2_horiproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis2_vertproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h index 60198d4279b41..d723b63b150ed 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h @@ -28,25 +28,25 @@ struct sh_css_isp_sdis_vert_coef_tbl; struct sh_css_isp_sdis_hori_proj_tbl; struct sh_css_isp_sdis_vert_proj_tbl; -void ia_css_sdis2_horicoef_vmem_encode ( +void ia_css_sdis2_horicoef_vmem_encode( struct sh_css_isp_sdis_hori_coef_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size); + unsigned int size); -void ia_css_sdis2_vertcoef_vmem_encode ( +void ia_css_sdis2_vertcoef_vmem_encode( struct sh_css_isp_sdis_vert_coef_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size); + unsigned int size); -void ia_css_sdis2_horiproj_encode ( +void ia_css_sdis2_horiproj_encode( struct sh_css_isp_sdis_hori_proj_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size); + unsigned int size); -void ia_css_sdis2_vertproj_encode ( +void ia_css_sdis2_vertproj_encode( struct sh_css_isp_sdis_vert_proj_tbl *to, const struct ia_css_dvs2_coefficients *from, - unsigned size); + unsigned int size); void ia_css_get_isp_dvs2_coefficients( struct ia_css_stream *stream, @@ -81,15 +81,15 @@ ia_css_isp_dvs2_statistics_free( struct ia_css_isp_dvs_statistics *me); void ia_css_sdis2_horicoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); void ia_css_sdis2_vertcoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); void ia_css_sdis2_horiproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); void ia_css_sdis2_vertproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); #endif /* __IA_CSS_SDIS2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h index 2a0bc40317466..7a6fb266d5c85 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h @@ -30,14 +30,14 @@ * arrays that contain the coeffients for each type. */ struct ia_css_dvs2_coef_types { - int16_t *odd_real; /** real part of the odd coefficients*/ - int16_t *odd_imag; /** imaginary part of the odd coefficients*/ - int16_t *even_real;/** real part of the even coefficients*/ - int16_t *even_imag;/** imaginary part of the even coefficients*/ + s16 *odd_real; /** real part of the odd coefficients*/ + s16 *odd_imag; /** imaginary part of the odd coefficients*/ + s16 *even_real;/** real part of the even coefficients*/ + s16 *even_imag;/** imaginary part of the even coefficients*/ }; /* DVS 2.0 Coefficients. This structure describes the coefficients that are needed for the dvs statistics. - * e.g. hor_coefs.odd_real is the pointer to int16_t[grid.num_hor_coefs] containing the horizontal odd real + * e.g. hor_coefs.odd_real is the pointer to int16_t[grid.num_hor_coefs] containing the horizontal odd real * coefficients. */ struct ia_css_dvs2_coefficients { @@ -50,14 +50,14 @@ struct ia_css_dvs2_coefficients { * arrays that contain the statistics for each type. */ struct ia_css_dvs2_stat_types { - int32_t *odd_real; /** real part of the odd statistics*/ - int32_t *odd_imag; /** imaginary part of the odd statistics*/ - int32_t *even_real;/** real part of the even statistics*/ - int32_t *even_imag;/** imaginary part of the even statistics*/ + s32 *odd_real; /** real part of the odd statistics*/ + s32 *odd_imag; /** imaginary part of the odd statistics*/ + s32 *even_real;/** real part of the even statistics*/ + s32 *even_imag;/** imaginary part of the even statistics*/ }; /* DVS 2.0 Statistics. This structure describes the statistics that are generated using the provided coefficients. - * e.g. hor_prod.odd_real is the pointer to int16_t[grid.aligned_height][grid.aligned_width] containing + * e.g. hor_prod.odd_real is the pointer to int16_t[grid.aligned_height][grid.aligned_width] containing * the horizontal odd real statistics. Valid statistics data area is int16_t[0..grid.height-1][0..grid.width-1] */ struct ia_css_dvs2_statistics { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c index 78a113bfe8f1c..2ee8d78c6a268 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c @@ -15,7 +15,7 @@ #include "ia_css_debug.h" #include "ia_css_tdf.host.h" -static const int16_t g_pyramid[8][8] = { +static const s16 g_pyramid[8][8] = { {128, 384, 640, 896, 896, 640, 384, 128}, {384, 1152, 1920, 2688, 2688, 1920, 1152, 384}, {640, 1920, 3200, 4480, 4480, 3200, 1920, 640}, @@ -32,15 +32,14 @@ ia_css_tdf_vmem_encode( const struct ia_css_tdf_config *from, size_t size) { - unsigned i; + unsigned int i; (void)size; for (i = 0; i < ISP_VEC_NELEMS; i++) { - to->pyramid[0][i] = g_pyramid[i/8][i%8]; + to->pyramid[0][i] = g_pyramid[i / 8][i % 8]; to->threshold_flat[0][i] = from->thres_flat_table[i]; to->threshold_detail[0][i] = from->thres_detail_table[i]; } - } void @@ -68,9 +67,8 @@ ia_css_tdf_encode( void ia_css_tdf_debug_dtrace( const struct ia_css_tdf_config *config, - unsigned level) + unsigned int level) { (void)config; (void)level; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h index bd628a18e839e..468e0177ed8a8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h @@ -32,7 +32,7 @@ ia_css_tdf_encode( void ia_css_tdf_debug_dtrace( - const struct ia_css_tdf_config *config, unsigned level) + const struct ia_css_tdf_config *config, unsigned int level) ; #endif /* __IA_CSS_TDF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h index 9334f2e0698b4..a93891448cdeb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h @@ -25,19 +25,19 @@ struct ia_css_isp_tdf_vmem_params { }; struct ia_css_isp_tdf_dmem_params { - int32_t Epsilon_0; - int32_t Epsilon_1; - int32_t EpsScaleText; - int32_t EpsScaleEdge; - int32_t Sepa_flat; - int32_t Sepa_Edge; - int32_t Blend_Flat; - int32_t Blend_Text; - int32_t Blend_Edge; - int32_t Shading_Gain; - int32_t Shading_baseGain; - int32_t LocalY_Gain; - int32_t LocalY_baseGain; + s32 Epsilon_0; + s32 Epsilon_1; + s32 EpsScaleText; + s32 EpsScaleEdge; + s32 Sepa_flat; + s32 Sepa_Edge; + s32 Blend_Flat; + s32 Blend_Text; + s32 Blend_Edge; + s32 Shading_Gain; + s32 Shading_baseGain; + s32 LocalY_Gain; + s32 LocalY_baseGain; }; #endif /* __IA_CSS_TDF_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h index 91ea8dd4651d6..e4263afee7da5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h @@ -30,24 +30,23 @@ * ISP2.6.1: TDF is used. */ struct ia_css_tdf_config { - int32_t thres_flat_table[64]; /** Final optimized strength table of NR for flat region. */ - int32_t thres_detail_table[64]; /** Final optimized strength table of NR for detail region. */ - int32_t epsilon_0; /** Coefficient to control variance for dark area (for flat region). */ - int32_t epsilon_1; /** Coefficient to control variance for bright area (for flat region). */ - int32_t eps_scale_text; /** Epsilon scaling coefficient for texture region. */ - int32_t eps_scale_edge; /** Epsilon scaling coefficient for edge region. */ - int32_t sepa_flat; /** Threshold to judge flat (edge < m_Flat_thre). */ - int32_t sepa_edge; /** Threshold to judge edge (edge > m_Edge_thre). */ - int32_t blend_flat; /** Blending ratio at flat region. */ - int32_t blend_text; /** Blending ratio at texture region. */ - int32_t blend_edge; /** Blending ratio at edge region. */ - int32_t shading_gain; /** Gain of Shading control. */ - int32_t shading_base_gain; /** Base Gain of Shading control. */ - int32_t local_y_gain; /** Gain of local luminance control. */ - int32_t local_y_base_gain; /** Base gain of local luminance control. */ - int32_t rad_x_origin; /** Initial x coord. for radius computation. */ - int32_t rad_y_origin; /** Initial y coord. for radius computation. */ + s32 thres_flat_table[64]; /** Final optimized strength table of NR for flat region. */ + s32 thres_detail_table[64]; /** Final optimized strength table of NR for detail region. */ + s32 epsilon_0; /** Coefficient to control variance for dark area (for flat region). */ + s32 epsilon_1; /** Coefficient to control variance for bright area (for flat region). */ + s32 eps_scale_text; /** Epsilon scaling coefficient for texture region. */ + s32 eps_scale_edge; /** Epsilon scaling coefficient for edge region. */ + s32 sepa_flat; /** Threshold to judge flat (edge < m_Flat_thre). */ + s32 sepa_edge; /** Threshold to judge edge (edge > m_Edge_thre). */ + s32 blend_flat; /** Blending ratio at flat region. */ + s32 blend_text; /** Blending ratio at texture region. */ + s32 blend_edge; /** Blending ratio at edge region. */ + s32 shading_gain; /** Gain of Shading control. */ + s32 shading_base_gain; /** Base Gain of Shading control. */ + s32 local_y_gain; /** Gain of local luminance control. */ + s32 local_y_base_gain; /** Base gain of local luminance control. */ + s32 rad_x_origin; /** Initial x coord. for radius computation. */ + s32 rad_y_origin; /** Initial y coord. for radius computation. */ }; #endif /* __IA_CSS_TDF_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c index 222a7bd7f1767..d2f9887ffddb5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c @@ -33,7 +33,7 @@ void ia_css_tnr_encode( struct sh_css_isp_tnr_params *to, const struct ia_css_tnr_config *from, - unsigned size) + unsigned int size) { (void)size; to->coef = @@ -47,7 +47,7 @@ ia_css_tnr_encode( void ia_css_tnr_dump( const struct sh_css_isp_tnr_params *tnr, - unsigned level) + unsigned int level) { if (!tnr) return; ia_css_debug_dtrace(level, "Temporal Noise Reduction:\n"); @@ -62,11 +62,10 @@ ia_css_tnr_dump( void ia_css_tnr_debug_dtrace( const struct ia_css_tnr_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.gain=%d, " - "config.threshold_y=%d, config.threshold_uv=%d\n", + "config.gain=%d, config.threshold_y=%d, config.threshold_uv=%d\n", config->gain, config->threshold_y, config->threshold_uv); } @@ -75,10 +74,10 @@ void ia_css_tnr_config( struct sh_css_isp_tnr_isp_config *to, const struct ia_css_tnr_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS; - unsigned i; + unsigned int elems_a = ISP_VEC_NELEMS; + unsigned int i; (void)size; ia_css_dma_configure_from_info(&to->port_b, &from->tnr_frames[0]->info); @@ -93,7 +92,7 @@ ia_css_tnr_config( } /* Assume divisiblity here, may need to generalize to fixed point. */ - assert (elems_a % to->port_b.elems == 0); + assert(elems_a % to->port_b.elems == 0); } void @@ -102,7 +101,7 @@ ia_css_tnr_configure( const struct ia_css_frame **frames) { struct ia_css_tnr_configuration config; - unsigned i; + unsigned int i; #ifndef ISP2401 for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h index 9290dfad574eb..50aabec5d3ac6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h @@ -26,23 +26,23 @@ void ia_css_tnr_encode( struct sh_css_isp_tnr_params *to, const struct ia_css_tnr_config *from, - unsigned size); + unsigned int size); void ia_css_tnr_dump( const struct sh_css_isp_tnr_params *tnr, - unsigned level); + unsigned int level); void ia_css_tnr_debug_dtrace( const struct ia_css_tnr_config *config, - unsigned level); + unsigned int level); void ia_css_tnr_config( struct sh_css_isp_tnr_isp_config *to, const struct ia_css_tnr_configuration *from, - unsigned size); + unsigned int size); void ia_css_tnr_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h index db4a7cced2649..64eab3c8e5464 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h @@ -21,9 +21,9 @@ /* TNR (Temporal Noise Reduction) */ struct sh_css_isp_tnr_params { - int32_t coef; - int32_t threshold_Y; - int32_t threshold_C; + s32 coef; + s32 threshold_Y; + s32 threshold_C; }; struct ia_css_tnr_configuration { @@ -35,8 +35,8 @@ struct ia_css_tnr_configuration { }; struct sh_css_isp_tnr_isp_config { - uint32_t width_a_over_b; - uint32_t frame_height; + u32 width_a_over_b; + u32 frame_height; struct dma_port_config port_b; #ifndef ISP2401 hrt_vaddress tnr_frame_addr[NUM_VIDEO_TNR_FRAMES]; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h index 8b1218f7235dc..901aa1e298e06 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h @@ -19,8 +19,8 @@ /* TNR (temporal noise reduction) */ struct sh_css_isp_tnr_dmem_state { - uint32_t tnr_in_buf_idx; - uint32_t tnr_out_buf_idx; + u32 tnr_in_buf_idx; + u32 tnr_out_buf_idx; }; #endif /* __IA_CSS_TNR_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h index 9bbc9ab2e6c0d..98b0daeeab396 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h @@ -34,10 +34,9 @@ * ISP2: TNR1 is used. */ - struct ia_css_tnr_config { ia_css_u0_16 gain; /** Interpolation ratio of current frame - and previous frame. + and previous frame. gain=0.0 -> previous frame is outputted. gain=1.0 -> current frame is outputted. u0.16, [0,65535], @@ -55,6 +54,4 @@ struct ia_css_tnr_config { u0.16, [0,65535], default/ineffective 0 */ }; - #endif /* __IA_CSS_TNR_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c index c2076e4124101..0aa0231b03481 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c @@ -27,9 +27,9 @@ void ia_css_vf_config( struct sh_css_isp_vf_isp_config *to, const struct ia_css_vf_configuration *from, - unsigned size) + unsigned int size) { - unsigned elems_a = ISP_VEC_NELEMS; + unsigned int elems_a = ISP_VEC_NELEMS; (void)size; to->vf_downscale_bits = from->vf_downscale_bits; @@ -41,7 +41,7 @@ ia_css_vf_config( to->dma.width_a_over_b = elems_a / to->dma.port_b.elems; /* Assume divisiblity here, may need to generalize to fixed point. */ - assert (elems_a % to->dma.port_b.elems == 0); + assert(elems_a % to->dma.port_b.elems == 0); } } @@ -58,13 +58,13 @@ sh_css_vf_downscale_log2( unsigned int ds_log2 = 0; unsigned int out_width; - if ((out_info == NULL) | (vf_info == NULL)) - return IA_CSS_ERR_INVALID_ARGUMENTS; + if ((!out_info) | (!vf_info)) + return IA_CSS_ERR_INVALID_ARGUMENTS; out_width = out_info->res.width; if (out_width == 0) - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; /* downscale until width smaller than the viewfinder width. We don't * test for the height since the vmem buffers only put restrictions on @@ -79,7 +79,7 @@ sh_css_vf_downscale_log2( ds_log2--; /* TODO: use actual max input resolution of vf_pp binary */ if ((out_info->res.width >> ds_log2) >= 2 * ia_css_binary_max_vf_width()) - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; *downscale_log2 = ds_log2; return IA_CSS_SUCCESS; } @@ -93,13 +93,13 @@ configure_kernel( struct ia_css_vf_configuration *config) { enum ia_css_err err; - unsigned vf_log_ds = 0; + unsigned int vf_log_ds = 0; /* First compute value */ if (vf_info) { err = sh_css_vf_downscale_log2(out_info, vf_info, &vf_log_ds); - if (err != IA_CSS_SUCCESS) - return err; + if (err != IA_CSS_SUCCESS) + return err; } vf_log_ds = min(vf_log_ds, info->vf_dec.max_log_downscale); *downscale_log2 = vf_log_ds; @@ -133,8 +133,7 @@ ia_css_vf_configure( if (vf_info) vf_info->raw_bit_depth = info->dma.vfdec_bits_per_pixel; - ia_css_configure_vf (binary, &config); + ia_css_configure_vf(binary, &config); return IA_CSS_SUCCESS; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h index c7c3625a9a967..247ad0a39b9bd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h @@ -35,7 +35,7 @@ void ia_css_vf_config( struct sh_css_isp_vf_isp_config *to, const struct ia_css_vf_configuration *from, - unsigned size); + unsigned int size); enum ia_css_err ia_css_vf_configure( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h index 9df4e12f6c2c7..171a98508a888 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h @@ -25,11 +25,11 @@ /* Viewfinder decimation */ struct sh_css_isp_vf_isp_config { - uint32_t vf_downscale_bits; /** Log VF downscale value */ - uint32_t enable; + u32 vf_downscale_bits; /** Log VF downscale value */ + u32 enable; struct ia_css_frame_sp_info info; struct { - uint32_t width_a_over_b; + u32 width_a_over_b; struct dma_port_config port_b; } dma; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h index e3efafa279ffc..a4d39e2e9d8ea 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h @@ -24,9 +24,8 @@ #include struct ia_css_vf_configuration { - uint32_t vf_downscale_bits; /** Log VF downscale value */ + u32 vf_downscale_bits; /** Log VF downscale value */ const struct ia_css_frame_info *info; }; #endif /* __IA_CSS_VF_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c index b43cb88c6ae45..5affd3875f268 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c @@ -33,7 +33,7 @@ void ia_css_wb_encode( struct sh_css_isp_wb_params *to, const struct ia_css_wb_config *from, - unsigned size) + unsigned int size) { (void)size; to->gain_shift = @@ -56,7 +56,7 @@ ia_css_wb_encode( void ia_css_wb_dump( const struct sh_css_isp_wb_params *wb, - unsigned level) + unsigned int level) { if (!wb) return; ia_css_debug_dtrace(level, "White Balance:\n"); @@ -75,15 +75,12 @@ ia_css_wb_dump( void ia_css_wb_debug_dtrace( const struct ia_css_wb_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.integer_bits=%d, " - "config.gr=%d, config.r=%d, " - "config.b=%d, config.gb=%d\n", + "config.integer_bits=%d, config.gr=%d, config.r=%d, config.b=%d, config.gb=%d\n", config->integer_bits, config->gr, config->r, config->b, config->gb); } #endif - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h index 18666baf9f76b..7d983f3f20c7a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h @@ -24,16 +24,16 @@ void ia_css_wb_encode( struct sh_css_isp_wb_params *to, const struct ia_css_wb_config *from, - unsigned size); + unsigned int size); void ia_css_wb_dump( const struct sh_css_isp_wb_params *wb, - unsigned level); + unsigned int level); void ia_css_wb_debug_dtrace( const struct ia_css_wb_config *wb, - unsigned level); + unsigned int level); #endif /* __IA_CSS_WB_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h index c95c53a240670..dcf548da55cc8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h @@ -19,11 +19,11 @@ /* WB (White Balance) */ struct sh_css_isp_wb_params { - int32_t gain_shift; - int32_t gain_gr; - int32_t gain_r; - int32_t gain_b; - int32_t gain_gb; + s32 gain_shift; + s32 gain_gr; + s32 gain_r; + s32 gain_b; + s32 gain_gb; }; #endif /* __IA_CSS_WB_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h index bf98734d057e5..59cbd71ef3321 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h @@ -19,7 +19,6 @@ * CSS-API header file for White Balance parameters. */ - /* White Balance configuration (Gain Adjust). * * ISP block: WB1 @@ -27,19 +26,19 @@ * ISP2: WB1 is used. */ struct ia_css_wb_config { - uint32_t integer_bits; /** Common exponent of gains. + u32 integer_bits; /** Common exponent of gains. u8.0, [0,3], default 1, ineffective 1 */ - uint32_t gr; /** Significand of Gr gain. + u32 gr; /** Significand of Gr gain. u[integer_bits].[16-integer_bits], [0,65535], default/ineffective 32768(u1.15, 1.0) */ - uint32_t r; /** Significand of R gain. + u32 r; /** Significand of R gain. u[integer_bits].[16-integer_bits], [0,65535], default/ineffective 32768(u1.15, 1.0) */ - uint32_t b; /** Significand of B gain. + u32 b; /** Significand of B gain. u[integer_bits].[16-integer_bits], [0,65535], default/ineffective 32768(u1.15, 1.0) */ - uint32_t gb; /** Significand of Gb gain. + u32 gb; /** Significand of Gb gain. u[integer_bits].[16-integer_bits], [0,65535], default/ineffective 32768(u1.15, 1.0) */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c index abcb531f51ccd..50f42348ed192 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c @@ -12,7 +12,6 @@ * more details. */ - #include "ia_css_types.h" #include "sh_css_defs.h" #include "ia_css_debug.h" @@ -29,17 +28,17 @@ void ia_css_xnr_table_vamem_encode( struct sh_css_isp_xnr_vamem_params *to, const struct ia_css_xnr_table *from, - unsigned size) + unsigned int size) { (void)size; - memcpy (&to->xnr, &from->data, sizeof(to->xnr)); + memcpy(&to->xnr, &from->data, sizeof(to->xnr)); } void ia_css_xnr_encode( struct sh_css_isp_xnr_params *to, const struct ia_css_xnr_config *from, - unsigned size) + unsigned int size) { (void)size; @@ -50,7 +49,7 @@ ia_css_xnr_encode( void ia_css_xnr_table_debug_dtrace( const struct ia_css_xnr_table *config, - unsigned level) + unsigned int level) { (void)config; (void)level; @@ -59,7 +58,7 @@ ia_css_xnr_table_debug_dtrace( void ia_css_xnr_debug_dtrace( const struct ia_css_xnr_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.threshold=%d\n", config->threshold); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h index eb3425eafbbef..eae4aa78ce58d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h @@ -26,22 +26,22 @@ void ia_css_xnr_table_vamem_encode( struct sh_css_isp_xnr_vamem_params *to, const struct ia_css_xnr_table *from, - unsigned size); + unsigned int size); void ia_css_xnr_encode( struct sh_css_isp_xnr_params *to, const struct ia_css_xnr_config *from, - unsigned size); + unsigned int size); void ia_css_xnr_table_debug_dtrace( const struct ia_css_xnr_table *s3a, - unsigned level); + unsigned int level); void ia_css_xnr_debug_dtrace( const struct ia_css_xnr_config *config, - unsigned level); + unsigned int level); #endif /* __IA_CSS_XNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h index a5caebbe2f848..72a5c5fd10e75 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h @@ -29,7 +29,6 @@ #error "Unknown vamem type" #endif - #else /* For pipe generation, the size is not relevant */ #define SH_CSS_ISP_XNR_TABLE_SIZE 0 @@ -37,7 +36,7 @@ /* This should be vamem_data_t, but that breaks the pipe generator */ struct sh_css_isp_xnr_vamem_params { - uint16_t xnr[SH_CSS_ISP_XNR_TABLE_SIZE]; + u16 xnr[SH_CSS_ISP_XNR_TABLE_SIZE]; }; struct sh_css_isp_xnr_params { @@ -45,7 +44,7 @@ struct sh_css_isp_xnr_params { * type:u0.16 but actual valid range is:[0,255] * valid range is dependent on SH_CSS_ISP_YUV_BITS (currently 8bits) * default: 25 */ - uint16_t threshold; + u16 threshold; }; #endif /* __IA_CSS_XNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c index cd5fb72fce3fd..0119e20292ce6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c @@ -26,19 +26,19 @@ struct ia_css_xnr_table default_xnr_table; static const uint16_t default_xnr_table_data[IA_CSS_VAMEM_2_XNR_TABLE_SIZE] = { /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ - 8191>>1, 4096>>1, 2730>>1, 2048>>1, 1638>>1, 1365>>1, 1170>>1, 1024>>1, 910>>1, 819>>1, 744>>1, 682>>1, 630>>1, 585>>1, - 546>>1, 512>>1, + 8191 >> 1, 4096 >> 1, 2730 >> 1, 2048 >> 1, 1638 >> 1, 1365 >> 1, 1170 >> 1, 1024 >> 1, 910 >> 1, 819 >> 1, 744 >> 1, 682 >> 1, 630 >> 1, 585 >> 1, + 546 >> 1, 512 >> 1, /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ - 481>>1, 455>>1, 431>>1, 409>>1, 390>>1, 372>>1, 356>>1, 341>>1, 327>>1, 315>>1, 303>>1, 292>>1, 282>>1, 273>>1, 264>>1, - 256>>1, + 481 >> 1, 455 >> 1, 431 >> 1, 409 >> 1, 390 >> 1, 372 >> 1, 356 >> 1, 341 >> 1, 327 >> 1, 315 >> 1, 303 >> 1, 292 >> 1, 282 >> 1, 273 >> 1, 264 >> 1, + 256 >> 1, /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ - 248>>1, 240>>1, 234>>1, 227>>1, 221>>1, 215>>1, 210>>1, 204>>1, 199>>1, 195>>1, 190>>1, 186>>1, 182>>1, 178>>1, 174>>1, - 170>>1, + 248 >> 1, 240 >> 1, 234 >> 1, 227 >> 1, 221 >> 1, 215 >> 1, 210 >> 1, 204 >> 1, 199 >> 1, 195 >> 1, 190 >> 1, 186 >> 1, 182 >> 1, 178 >> 1, 174 >> 1, + 170 >> 1, /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ - 167>>1, 163>>1, 160>>1, 157>>1, 154>>1, 151>>1, 148>>1, 146>>1, 143>>1, 141>>1, 138>>1, 136>>1, 134>>1, 132>>1, 130>>1, 128>>1 + 167 >> 1, 163 >> 1, 160 >> 1, 157 >> 1, 154 >> 1, 151 >> 1, 148 >> 1, 146 >> 1, 143 >> 1, 141 >> 1, 138 >> 1, 136 >> 1, 134 >> 1, 132 >> 1, 130 >> 1, 128 >> 1 }; #elif defined(HAS_VAMEM_VERSION_1) @@ -46,19 +46,19 @@ default_xnr_table_data[IA_CSS_VAMEM_2_XNR_TABLE_SIZE] = { static const uint16_t default_xnr_table_data[IA_CSS_VAMEM_1_XNR_TABLE_SIZE] = { /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ - 8191>>1, 4096>>1, 2730>>1, 2048>>1, 1638>>1, 1365>>1, 1170>>1, 1024>>1, 910>>1, 819>>1, 744>>1, 682>>1, 630>>1, 585>>1, - 546>>1, 512>>1, + 8191 >> 1, 4096 >> 1, 2730 >> 1, 2048 >> 1, 1638 >> 1, 1365 >> 1, 1170 >> 1, 1024 >> 1, 910 >> 1, 819 >> 1, 744 >> 1, 682 >> 1, 630 >> 1, 585 >> 1, + 546 >> 1, 512 >> 1, /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ - 481>>1, 455>>1, 431>>1, 409>>1, 390>>1, 372>>1, 356>>1, 341>>1, 327>>1, 315>>1, 303>>1, 292>>1, 282>>1, 273>>1, 264>>1, - 256>>1, + 481 >> 1, 455 >> 1, 431 >> 1, 409 >> 1, 390 >> 1, 372 >> 1, 356 >> 1, 341 >> 1, 327 >> 1, 315 >> 1, 303 >> 1, 292 >> 1, 282 >> 1, 273 >> 1, 264 >> 1, + 256 >> 1, /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ - 248>>1, 240>>1, 234>>1, 227>>1, 221>>1, 215>>1, 210>>1, 204>>1, 199>>1, 195>>1, 190>>1, 186>>1, 182>>1, 178>>1, 174>>1, - 170>>1, + 248 >> 1, 240 >> 1, 234 >> 1, 227 >> 1, 221 >> 1, 215 >> 1, 210 >> 1, 204 >> 1, 199 >> 1, 195 >> 1, 190 >> 1, 186 >> 1, 182 >> 1, 178 >> 1, 174 >> 1, + 170 >> 1, /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ - 167>>1, 163>>1, 160>>1, 157>>1, 154>>1, 151>>1, 148>>1, 146>>1, 143>>1, 141>>1, 138>>1, 136>>1, 134>>1, 132>>1, 130>>1, 128>>1 + 167 >> 1, 163 >> 1, 160 >> 1, 157 >> 1, 154 >> 1, 151 >> 1, 148 >> 1, 146 >> 1, 143 >> 1, 141 >> 1, 138 >> 1, 136 >> 1, 134 >> 1, 132 >> 1, 130 >> 1, 128 >> 1 }; #else diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h index d2b634211a3fa..d26df92aa2b60 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h @@ -26,7 +26,7 @@ * * This table contains coefficients used for division in XNR. * - * u0.12, [0,4095], + * u0.12, [0,4095], * {4095, 2048, 1365, .........., 65, 64} * ({1/1, 1/2, 1/3, ............., 1/63, 1/64}) * @@ -39,19 +39,19 @@ /* Number of elements in the xnr table. */ #define IA_CSS_VAMEM_1_XNR_TABLE_SIZE_LOG2 6 /* Number of elements in the xnr table. */ -#define IA_CSS_VAMEM_1_XNR_TABLE_SIZE (1U< XNR_MAX_ALPHA) @@ -111,10 +111,10 @@ compute_alpha(int sigma) static int32_t compute_coring(int coring) { - int32_t isp_coring; - int32_t isp_scale = XNR_CORING_SCALE_FACTOR; - int32_t host_scale = IA_CSS_XNR3_CORING_SCALE; - int32_t offset = host_scale / 2; /* fixed-point 0.5 */ + s32 isp_coring; + s32 isp_scale = XNR_CORING_SCALE_FACTOR; + s32 host_scale = IA_CSS_XNR3_CORING_SCALE; + s32 offset = host_scale / 2; /* fixed-point 0.5 */ /* Convert from public host-side scale factor to isp-side scale * factor. Clip to [0, isp_scale-1). @@ -130,10 +130,10 @@ compute_coring(int coring) static int32_t compute_blending(int strength) { - int32_t isp_strength; - int32_t isp_scale = XNR_BLENDING_SCALE_FACTOR; - int32_t host_scale = IA_CSS_XNR3_BLENDING_SCALE; - int32_t offset = host_scale / 2; /* fixed-point 0.5 */ + s32 isp_strength; + s32 isp_scale = XNR_BLENDING_SCALE_FACTOR; + s32 host_scale = IA_CSS_XNR3_BLENDING_SCALE; + s32 offset = host_scale / 2; /* fixed-point 0.5 */ /* Convert from public host-side scale factor to isp-side scale * factor. The blending factor is positive on the host side, but @@ -148,33 +148,33 @@ void ia_css_xnr3_encode( struct sh_css_isp_xnr3_params *to, const struct ia_css_xnr3_config *from, - unsigned size) + unsigned int size) { int kernel_size = XNR_FILTER_SIZE; /* The adjust factor is the next power of 2 w.r.t. the kernel size*/ int adjust_factor = ceil_pow2(kernel_size); - int32_t max_diff = (1 << (ISP_VEC_ELEMBITS - 1)) - 1; - int32_t min_diff = -(1 << (ISP_VEC_ELEMBITS - 1)); - - int32_t alpha_y0 = compute_alpha(from->sigma.y0); - int32_t alpha_y1 = compute_alpha(from->sigma.y1); - int32_t alpha_u0 = compute_alpha(from->sigma.u0); - int32_t alpha_u1 = compute_alpha(from->sigma.u1); - int32_t alpha_v0 = compute_alpha(from->sigma.v0); - int32_t alpha_v1 = compute_alpha(from->sigma.v1); - int32_t alpha_ydiff = (alpha_y1 - alpha_y0) * adjust_factor / kernel_size; - int32_t alpha_udiff = (alpha_u1 - alpha_u0) * adjust_factor / kernel_size; - int32_t alpha_vdiff = (alpha_v1 - alpha_v0) * adjust_factor / kernel_size; - - int32_t coring_u0 = compute_coring(from->coring.u0); - int32_t coring_u1 = compute_coring(from->coring.u1); - int32_t coring_v0 = compute_coring(from->coring.v0); - int32_t coring_v1 = compute_coring(from->coring.v1); - int32_t coring_udiff = (coring_u1 - coring_u0) * adjust_factor / kernel_size; - int32_t coring_vdiff = (coring_v1 - coring_v0) * adjust_factor / kernel_size; - - int32_t blending = compute_blending(from->blending.strength); + s32 max_diff = (1 << (ISP_VEC_ELEMBITS - 1)) - 1; + s32 min_diff = -(1 << (ISP_VEC_ELEMBITS - 1)); + + s32 alpha_y0 = compute_alpha(from->sigma.y0); + s32 alpha_y1 = compute_alpha(from->sigma.y1); + s32 alpha_u0 = compute_alpha(from->sigma.u0); + s32 alpha_u1 = compute_alpha(from->sigma.u1); + s32 alpha_v0 = compute_alpha(from->sigma.v0); + s32 alpha_v1 = compute_alpha(from->sigma.v1); + s32 alpha_ydiff = (alpha_y1 - alpha_y0) * adjust_factor / kernel_size; + s32 alpha_udiff = (alpha_u1 - alpha_u0) * adjust_factor / kernel_size; + s32 alpha_vdiff = (alpha_v1 - alpha_v0) * adjust_factor / kernel_size; + + s32 coring_u0 = compute_coring(from->coring.u0); + s32 coring_u1 = compute_coring(from->coring.u1); + s32 coring_v0 = compute_coring(from->coring.v0); + s32 coring_v1 = compute_coring(from->coring.v1); + s32 coring_udiff = (coring_u1 - coring_u0) * adjust_factor / kernel_size; + s32 coring_vdiff = (coring_v1 - coring_v0) * adjust_factor / kernel_size; + + s32 blending = compute_blending(from->blending.strength); (void)size; @@ -205,11 +205,11 @@ void ia_css_xnr3_vmem_encode( struct sh_css_isp_xnr3_vmem_params *to, const struct ia_css_xnr3_config *from, - unsigned size) + unsigned int size) { - unsigned i, j, base; - const unsigned total_blocks = 4; - const unsigned shuffle_block = 16; + unsigned int i, j, base; + const unsigned int total_blocks = 4; + const unsigned int shuffle_block = 16; (void)from; (void)size; @@ -231,7 +231,6 @@ ia_css_xnr3_vmem_encode( for (j = 1; j < XNR3_LOOK_UP_TABLE_POINTS; j++) { assert(x[j] >= 0); assert(x[j] > x[j - 1]); - } /* The implementation of the calulating 1/x is based on the availability @@ -258,7 +257,7 @@ ia_css_xnr3_vmem_encode( void ia_css_xnr3_debug_dtrace( const struct ia_css_xnr3_config *config, - unsigned level) + unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h index 6a86924a71fe1..27f969f3a201d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h @@ -24,19 +24,19 @@ void ia_css_xnr3_encode( struct sh_css_isp_xnr3_params *to, const struct ia_css_xnr3_config *from, - unsigned size); + unsigned int size); #ifdef ISP2401 void ia_css_xnr3_vmem_encode( struct sh_css_isp_xnr3_vmem_params *to, const struct ia_css_xnr3_config *from, - unsigned size); + unsigned int size); #endif void ia_css_xnr3_debug_dtrace( const struct ia_css_xnr3_config *config, - unsigned level); + unsigned int level); #endif /* __IA_CSS_XNR3_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h index 06c24e8482343..e917537004429 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h @@ -25,15 +25,15 @@ * It must be chosen such that 1/min_sigma still fits in an ISP vector * element. */ #define XNR_ALPHA_SCALE_LOG2 5 -#define XNR_ALPHA_SCALE_FACTOR (1 << XNR_ALPHA_SCALE_LOG2) +#define XNR_ALPHA_SCALE_FACTOR BIT(XNR_ALPHA_SCALE_LOG2) /* Scaling factor of the coring values on the ISP. */ -#define XNR_CORING_SCALE_LOG2 (ISP_VEC_ELEMBITS-1) -#define XNR_CORING_SCALE_FACTOR (1 << XNR_CORING_SCALE_LOG2) +#define XNR_CORING_SCALE_LOG2 (ISP_VEC_ELEMBITS - 1) +#define XNR_CORING_SCALE_FACTOR BIT(XNR_CORING_SCALE_LOG2) /* Scaling factor of the blending strength on the ISP. */ -#define XNR_BLENDING_SCALE_LOG2 (ISP_VEC_ELEMBITS-1) -#define XNR_BLENDING_SCALE_FACTOR (1 << XNR_BLENDING_SCALE_LOG2) +#define XNR_BLENDING_SCALE_LOG2 (ISP_VEC_ELEMBITS - 1) +#define XNR_BLENDING_SCALE_FACTOR BIT(XNR_BLENDING_SCALE_LOG2) /* XNR3 filter size. Must be 11x11, 9x9 or 5x5. */ #ifdef FLT_KERNEL_9x9 @@ -49,26 +49,26 @@ /* XNR3 alpha (1/sigma) parameters on the ISP, expressed as a base (0) value * for dark areas, and a scaled diff towards the value for bright areas. */ struct sh_css_xnr3_alpha_params { - int32_t y0; - int32_t u0; - int32_t v0; - int32_t ydiff; - int32_t udiff; - int32_t vdiff; + s32 y0; + s32 u0; + s32 v0; + s32 ydiff; + s32 udiff; + s32 vdiff; }; /* XNR3 coring parameters on the ISP, expressed as a base (0) value * for dark areas, and a scaled diff towards the value for bright areas. */ struct sh_css_xnr3_coring_params { - int32_t u0; - int32_t v0; - int32_t udiff; - int32_t vdiff; + s32 u0; + s32 v0; + s32 udiff; + s32 vdiff; }; /* XNR3 blending strength on the ISP. */ struct sh_css_xnr3_blending_params { - int32_t strength; + s32 strength; }; /* XNR3 ISP parameters */ @@ -91,6 +91,5 @@ struct sh_css_isp_xnr3_vmem_params { VMEM_ARRAY(c, ISP_VEC_NELEMS); }; - #endif #endif /*__IA_CSS_XNR3_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h index 669200caf72e6..6963bef3c07dc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h @@ -23,20 +23,19 @@ * \brief Scale of the XNR sigma parameters. * \details The define specifies which fixed-point value represents 1.0. */ -#define IA_CSS_XNR3_SIGMA_SCALE (1 << 10) +#define IA_CSS_XNR3_SIGMA_SCALE BIT(10) /** * \brief Scale of the XNR coring parameters. * \details The define specifies which fixed-point value represents 1.0. */ -#define IA_CSS_XNR3_CORING_SCALE (1 << 15) +#define IA_CSS_XNR3_CORING_SCALE BIT(15) /** * \brief Scale of the XNR blending parameter. * \details The define specifies which fixed-point value represents 1.0. */ -#define IA_CSS_XNR3_BLENDING_SCALE (1 << 11) - +#define IA_CSS_XNR3_BLENDING_SCALE BIT(11) /** * \brief XNR3 Sigma Parameters. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c index d8dccce772a94..a23d876147ada 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c @@ -38,12 +38,12 @@ void ia_css_nr_encode( struct sh_css_isp_ynr_params *to, const struct ia_css_nr_config *from, - unsigned size) + unsigned int size) { (void)size; /* YNR (Y Noise Reduction) */ to->threshold = - uDIGIT_FITTING((unsigned)8192, 16, SH_CSS_BAYER_BITS); + uDIGIT_FITTING(8192U, 16, SH_CSS_BAYER_BITS); to->gain_all = uDIGIT_FITTING(from->ynr_gain, 16, SH_CSS_YNR_GAIN_SHIFT); to->gain_dir = @@ -58,9 +58,9 @@ void ia_css_yee_encode( struct sh_css_isp_yee_params *to, const struct ia_css_yee_config *from, - unsigned size) + unsigned int size) { - int asiWk1 = (int) from->ee.gain; + int asiWk1 = (int)from->ee.gain; int asiWk2 = asiWk1 / 8; int asiWk3 = asiWk1 / 4; @@ -82,10 +82,10 @@ ia_css_yee_encode( uDIGIT_FITTING(from->ee.detail_gain, 11, SH_CSS_YEE_DETAIL_GAIN_SHIFT); to->coring_s = - (uDIGIT_FITTING((unsigned)56, 16, SH_CSS_BAYER_BITS) * + (uDIGIT_FITTING(56U, 16, SH_CSS_BAYER_BITS) * from->ee.threshold) >> 8; to->coring_g = - (uDIGIT_FITTING((unsigned)224, 16, SH_CSS_BAYER_BITS) * + (uDIGIT_FITTING(224U, 16, SH_CSS_BAYER_BITS) * from->ee.threshold) >> 8; /* 8; // *1.125 ->[s4.8] */ to->scale_plus_s = @@ -100,19 +100,19 @@ ia_css_yee_encode( to->scale_minus_g = (asiWk3) >> (11 - SH_CSS_YEE_SCALE_SHIFT); to->clip_plus_s = - uDIGIT_FITTING((unsigned)32760, 16, SH_CSS_BAYER_BITS); + uDIGIT_FITTING(32760U, 16, SH_CSS_BAYER_BITS); to->clip_plus_g = 0; to->clip_minus_s = - uDIGIT_FITTING((unsigned)504, 16, SH_CSS_BAYER_BITS); + uDIGIT_FITTING(504U, 16, SH_CSS_BAYER_BITS); to->clip_minus_g = - uDIGIT_FITTING((unsigned)32256, 16, SH_CSS_BAYER_BITS); + uDIGIT_FITTING(32256U, 16, SH_CSS_BAYER_BITS); to->Yclip = SH_CSS_BAYER_MAXVAL; } void ia_css_nr_dump( const struct sh_css_isp_ynr_params *ynr, - unsigned level) + unsigned int level) { if (!ynr) return; ia_css_debug_dtrace(level, @@ -132,7 +132,7 @@ ia_css_nr_dump( void ia_css_yee_dump( const struct sh_css_isp_yee_params *yee, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "Y Edge Enhancement:\n"); @@ -189,12 +189,10 @@ ia_css_yee_dump( void ia_css_nr_debug_dtrace( const struct ia_css_nr_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.direction=%d, " - "config.bnr_gain=%d, config.ynr_gain=%d, " - "config.threshold_cb=%d, config.threshold_cr=%d\n", + "config.direction=%d, config.bnr_gain=%d, config.ynr_gain=%d, config.threshold_cb=%d, config.threshold_cr=%d\n", config->direction, config->bnr_gain, config->ynr_gain, config->threshold_cb, config->threshold_cr); @@ -203,7 +201,7 @@ ia_css_nr_debug_dtrace( void ia_css_ee_debug_dtrace( const struct ia_css_ee_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, "config.threshold=%d, config.gain=%d, config.detail_gain=%d\n", @@ -212,7 +210,7 @@ ia_css_ee_debug_dtrace( void ia_css_init_ynr_state( - void/*struct sh_css_isp_ynr_vmem_state*/ *state, + void/*struct sh_css_isp_ynr_vmem_state*/ * state, size_t size) { memset(state, 0, size); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h index b5730df313ef5..63a26538b7bd1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h @@ -25,36 +25,36 @@ void ia_css_nr_encode( struct sh_css_isp_ynr_params *to, const struct ia_css_nr_config *from, - unsigned size); + unsigned int size); void ia_css_yee_encode( struct sh_css_isp_yee_params *to, const struct ia_css_yee_config *from, - unsigned size); + unsigned int size); void ia_css_nr_dump( const struct sh_css_isp_ynr_params *ynr, - unsigned level); + unsigned int level); void ia_css_yee_dump( const struct sh_css_isp_yee_params *yee, - unsigned level); + unsigned int level); void ia_css_nr_debug_dtrace( const struct ia_css_nr_config *config, - unsigned level); + unsigned int level); void ia_css_ee_debug_dtrace( const struct ia_css_ee_config *config, - unsigned level); + unsigned int level); void ia_css_init_ynr_state( - void/*struct sh_css_isp_ynr_vmem_state*/ *state, + void/*struct sh_css_isp_ynr_vmem_state*/ * state, size_t size); #endif /* __IA_CSS_YNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h index ad61ec1211e81..8f104bcb4d0f5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h @@ -19,31 +19,31 @@ /* YNR (Y Noise Reduction) */ struct sh_css_isp_ynr_params { - int32_t threshold; - int32_t gain_all; - int32_t gain_dir; - int32_t threshold_cb; - int32_t threshold_cr; + s32 threshold; + s32 gain_all; + s32 gain_dir; + s32 threshold_cb; + s32 threshold_cr; }; /* YEE (Y Edge Enhancement) */ struct sh_css_isp_yee_params { - int32_t dirthreshold_s; - int32_t dirthreshold_g; - int32_t dirthreshold_width_log2; - int32_t dirthreshold_width; - int32_t detailgain; - int32_t coring_s; - int32_t coring_g; - int32_t scale_plus_s; - int32_t scale_plus_g; - int32_t scale_minus_s; - int32_t scale_minus_g; - int32_t clip_plus_s; - int32_t clip_plus_g; - int32_t clip_minus_s; - int32_t clip_minus_g; - int32_t Yclip; + s32 dirthreshold_s; + s32 dirthreshold_g; + s32 dirthreshold_width_log2; + s32 dirthreshold_width; + s32 detailgain; + s32 coring_s; + s32 coring_g; + s32 scale_plus_s; + s32 scale_plus_g; + s32 scale_minus_s; + s32 scale_minus_g; + s32 clip_plus_s; + s32 clip_plus_g; + s32 clip_minus_s; + s32 clip_minus_g; + s32 Yclip; }; #endif /* __IA_CSS_YNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h index b2348b19c3cd1..4c5c2f0010d26 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h @@ -20,7 +20,7 @@ /* YNR (luminance noise reduction) */ struct sh_css_isp_ynr_vmem_state { - VMEM_ARRAY(ynr_buf[4], MAX_VECTORS_PER_BUF_LINE*ISP_NWAY); + VMEM_ARRAY(ynr_buf[4], MAX_VECTORS_PER_BUF_LINE * ISP_NWAY); }; #endif /* __IA_CSS_YNR_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h index 3f8589a5a43a8..1a62e1dbfc6fb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h @@ -78,4 +78,3 @@ struct ia_css_yee_config { }; #endif /* __IA_CSS_YNR_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c index 44b0050042389..d162fc08b4ddd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c @@ -38,15 +38,15 @@ const struct ia_css_fc_config default_fc_config = { (1 << (ISP_VEC_ELEMBITS - 2)), /* 0.5 */ (1 << (ISP_VEC_ELEMBITS - 1)) - 1, /* 1 */ (1 << (ISP_VEC_ELEMBITS - 1)) - 1, /* 1 */ - (int16_t)- (1 << (ISP_VEC_ELEMBITS - 1)), /* -1 */ - (int16_t)- (1 << (ISP_VEC_ELEMBITS - 1)), /* -1 */ + (int16_t)-(1 << (ISP_VEC_ELEMBITS - 1)), /* -1 */ + (int16_t)-(1 << (ISP_VEC_ELEMBITS - 1)), /* -1 */ }; void ia_css_ynr_encode( struct sh_css_isp_yee2_params *to, const struct ia_css_ynr_config *from, - unsigned size) + unsigned int size) { (void)size; to->edge_sense_gain_0 = from->edge_sense_gain_0; @@ -59,7 +59,7 @@ void ia_css_fc_encode( struct sh_css_isp_fc_params *to, const struct ia_css_fc_config *from, - unsigned size) + unsigned int size) { (void)size; to->gain_exp = from->gain_exp; @@ -83,26 +83,20 @@ ia_css_fc_encode( void ia_css_ynr_dump( const struct sh_css_isp_yee2_params *yee2, - unsigned level); + unsigned int level); void ia_css_fc_dump( const struct sh_css_isp_fc_params *fc, - unsigned level); + unsigned int level); void ia_css_fc_debug_dtrace( const struct ia_css_fc_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.gain_exp=%d, " - "config.coring_pos_0=%d, config.coring_pos_1=%d, " - "config.coring_neg_0=%d, config.coring_neg_1=%d, " - "config.gain_pos_0=%d, config.gain_pos_1=%d, " - "config.gain_neg_0=%d, config.gain_neg_1=%d, " - "config.crop_pos_0=%d, config.crop_pos_1=%d, " - "config.crop_neg_0=%d, config.crop_neg_1=%d\n", + "config.gain_exp=%d, config.coring_pos_0=%d, config.coring_pos_1=%d, config.coring_neg_0=%d, config.coring_neg_1=%d, config.gain_pos_0=%d, config.gain_pos_1=%d, config.gain_neg_0=%d, config.gain_neg_1=%d, config.crop_pos_0=%d, config.crop_pos_1=%d, config.crop_neg_0=%d, config.crop_neg_1=%d\n", config->gain_exp, config->coring_pos_0, config->coring_pos_1, config->coring_neg_0, config->coring_neg_1, @@ -115,11 +109,10 @@ ia_css_fc_debug_dtrace( void ia_css_ynr_debug_dtrace( const struct ia_css_ynr_config *config, - unsigned level) + unsigned int level) { ia_css_debug_dtrace(level, - "config.edge_sense_gain_0=%d, config.edge_sense_gain_1=%d, " - "config.corner_sense_gain_0=%d, config.corner_sense_gain_1=%d\n", + "config.edge_sense_gain_0=%d, config.edge_sense_gain_1=%d, config.corner_sense_gain_0=%d, config.corner_sense_gain_1=%d\n", config->edge_sense_gain_0, config->edge_sense_gain_1, config->corner_sense_gain_0, config->corner_sense_gain_1); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h index 71e89c469e4c6..8ee483a91d08e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h @@ -25,32 +25,32 @@ void ia_css_ynr_encode( struct sh_css_isp_yee2_params *to, const struct ia_css_ynr_config *from, - unsigned size); + unsigned int size); void ia_css_fc_encode( struct sh_css_isp_fc_params *to, const struct ia_css_fc_config *from, - unsigned size); + unsigned int size); void ia_css_ynr_dump( const struct sh_css_isp_yee2_params *yee2, - unsigned level); + unsigned int level); void ia_css_fc_dump( const struct sh_css_isp_fc_params *fc, - unsigned level); + unsigned int level); void ia_css_fc_debug_dtrace( const struct ia_css_fc_config *config, - unsigned level); + unsigned int level); void ia_css_ynr_debug_dtrace( const struct ia_css_ynr_config *config, - unsigned level); + unsigned int level); #endif /* __IA_CSS_YNR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h index e56b695bef278..7479bce598d51 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h @@ -19,27 +19,27 @@ /* YNR (Y Noise Reduction), YEE (Y Edge Enhancement) */ struct sh_css_isp_yee2_params { - int32_t edge_sense_gain_0; - int32_t edge_sense_gain_1; - int32_t corner_sense_gain_0; - int32_t corner_sense_gain_1; + s32 edge_sense_gain_0; + s32 edge_sense_gain_1; + s32 corner_sense_gain_0; + s32 corner_sense_gain_1; }; /* Fringe Control */ struct sh_css_isp_fc_params { - int32_t gain_exp; - uint16_t coring_pos_0; - uint16_t coring_pos_1; - uint16_t coring_neg_0; - uint16_t coring_neg_1; - int32_t gain_pos_0; - int32_t gain_pos_1; - int32_t gain_neg_0; - int32_t gain_neg_1; - int32_t crop_pos_0; - int32_t crop_pos_1; - int32_t crop_neg_0; - int32_t crop_neg_1; + s32 gain_exp; + u16 coring_pos_0; + u16 coring_pos_1; + u16 coring_neg_0; + u16 coring_neg_1; + s32 gain_pos_0; + s32 gain_pos_1; + s32 gain_neg_0; + s32 gain_neg_1; + s32 crop_pos_0; + s32 crop_pos_1; + s32 crop_neg_0; + s32 crop_neg_1; }; #endif /* __IA_CSS_YNR2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h index 83161a24207d9..36e4bb61b38c8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h @@ -27,16 +27,16 @@ * ISP2: YNR2 and YEE2 are used for Still. */ struct ia_css_ynr_config { - uint16_t edge_sense_gain_0; /** Sensitivity of edge in dark area. + u16 edge_sense_gain_0; /** Sensitivity of edge in dark area. u13.0, [0,8191], default 1000, ineffective 0 */ - uint16_t edge_sense_gain_1; /** Sensitivity of edge in bright area. + u16 edge_sense_gain_1; /** Sensitivity of edge in bright area. u13.0, [0,8191], default 1000, ineffective 0 */ - uint16_t corner_sense_gain_0; /** Sensitivity of corner in dark area. + u16 corner_sense_gain_0; /** Sensitivity of corner in dark area. u13.0, [0,8191], default 1000, ineffective 0 */ - uint16_t corner_sense_gain_1; /** Sensitivity of corner in bright area. + u16 corner_sense_gain_1; /** Sensitivity of corner in bright area. u13.0, [0,8191], default 1000, ineffective 0 */ }; @@ -49,46 +49,45 @@ struct ia_css_ynr_config { * ISP2: FC2 is used for Still. */ struct ia_css_fc_config { - uint8_t gain_exp; /** Common exponent of gains. + u8 gain_exp; /** Common exponent of gains. u8.0, [0,13], default 1, ineffective 0 */ - uint16_t coring_pos_0; /** Coring threshold for positive edge in dark area. + u16 coring_pos_0; /** Coring threshold for positive edge in dark area. u0.13, [0,8191], default 0(0), ineffective 0 */ - uint16_t coring_pos_1; /** Coring threshold for positive edge in bright area. + u16 coring_pos_1; /** Coring threshold for positive edge in bright area. u0.13, [0,8191], default 0(0), ineffective 0 */ - uint16_t coring_neg_0; /** Coring threshold for negative edge in dark area. + u16 coring_neg_0; /** Coring threshold for negative edge in dark area. u0.13, [0,8191], default 0(0), ineffective 0 */ - uint16_t coring_neg_1; /** Coring threshold for negative edge in bright area. + u16 coring_neg_1; /** Coring threshold for negative edge in bright area. u0.13, [0,8191], default 0(0), ineffective 0 */ - uint16_t gain_pos_0; /** Gain for positive edge in dark area. + u16 gain_pos_0; /** Gain for positive edge in dark area. u0.13, [0,8191], default 4096(0.5), ineffective 0 */ - uint16_t gain_pos_1; /** Gain for positive edge in bright area. + u16 gain_pos_1; /** Gain for positive edge in bright area. u0.13, [0,8191], default 4096(0.5), ineffective 0 */ - uint16_t gain_neg_0; /** Gain for negative edge in dark area. + u16 gain_neg_0; /** Gain for negative edge in dark area. u0.13, [0,8191], default 4096(0.5), ineffective 0 */ - uint16_t gain_neg_1; /** Gain for negative edge in bright area. + u16 gain_neg_1; /** Gain for negative edge in bright area. u0.13, [0,8191], default 4096(0.5), ineffective 0 */ - uint16_t crop_pos_0; /** Limit for positive edge in dark area. + u16 crop_pos_0; /** Limit for positive edge in dark area. u0.13, [0,8191], default/ineffective 8191(almost 1.0) */ - uint16_t crop_pos_1; /** Limit for positive edge in bright area. + u16 crop_pos_1; /** Limit for positive edge in bright area. u0.13, [0,8191], default/ineffective 8191(almost 1.0) */ - int16_t crop_neg_0; /** Limit for negative edge in dark area. + s16 crop_neg_0; /** Limit for negative edge in dark area. s0.13, [-8192,0], default/ineffective -8192(-1.0) */ - int16_t crop_neg_1; /** Limit for negative edge in bright area. + s16 crop_neg_1; /** Limit for negative edge in bright area. s0.13, [-8192,0], default/ineffective -8192(-1.0) */ }; #endif /* __IA_CSS_YNR2_TYPES_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h index 2f215dc2ac32c..392b5dd334fb3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h @@ -36,10 +36,10 @@ more details. /* Binary independent constants */ #ifndef NO_HOIST -# define NO_HOIST HIVE_ATTRIBUTE (( no_hoist )) +# define NO_HOIST HIVE_ATTRIBUTE((no_hoist)) #endif -#define NO_HOIST_CSE HIVE_ATTRIBUTE ((no_hoist, no_cse)) +#define NO_HOIST_CSE HIVE_ATTRIBUTE((no_hoist, no_cse)) #define UNION struct /* Union constructors not allowed in C++ */ @@ -329,8 +329,8 @@ more details. #endif #define XMEM_WIDTH_BITS HIVE_ISP_DDR_WORD_BITS -#define XMEM_SHORTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS/16) -#define XMEM_INTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS/32) +#define XMEM_SHORTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 16) +#define XMEM_INTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 32) #define XMEM_POW2_BYTES_PER_WORD HIVE_ISP_DDR_WORD_BYTES #define BITS8_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 8) @@ -383,7 +383,7 @@ more details. #define ISP_LEFT_PADDING_VECS_CONT CEIL_DIV(ISP_LEFT_PADDING_CONT, ISP_VEC_NELEMS) #define CEIL_ROUND_DIV_STRIPE(width, stripe, padding) \ - CEIL_MUL(padding + CEIL_DIV(width - padding, stripe), ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS)?4:2)) + CEIL_MUL(padding + CEIL_DIV(width - padding, stripe), ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS) ? 4 : 2)) /* output (Y,U,V) image, 4:2:0 */ #define MAX_VECTORS_PER_LINE \ @@ -407,7 +407,6 @@ more details. ISP_NUM_STRIPES, \ ISP_LEFT_PADDING_VECS) - /* Add 2 for left croppping */ #define MAX_SP_RAW_COPY_VECTORS_PER_INPUT_LINE (CEIL_DIV(ISP_MAX_INPUT_WIDTH, ISP_VEC_NELEMS) + 2) @@ -429,28 +428,26 @@ more details. #define MAX_VECTORS_PER_CHUNK \ (NO_CHUNKING ? MAX_VECTORS_PER_LINE \ - : 2*CEIL_DIV(MAX_VECTORS_PER_LINE, \ - 2*OUTPUT_NUM_CHUNKS)) + : 2 * CEIL_DIV(MAX_VECTORS_PER_LINE, \ + 2 * OUTPUT_NUM_CHUNKS)) #define MAX_C_VECTORS_PER_CHUNK \ - (MAX_VECTORS_PER_CHUNK/2) + (MAX_VECTORS_PER_CHUNK / 2) /* should be even */ #define MAX_VECTORS_PER_OUTPUT_CHUNK \ (NO_CHUNKING ? MAX_VECTORS_PER_OUTPUT_LINE \ - : 2*CEIL_DIV(MAX_VECTORS_PER_OUTPUT_LINE, \ - 2*OUTPUT_NUM_CHUNKS)) + : 2 * CEIL_DIV(MAX_VECTORS_PER_OUTPUT_LINE, \ + 2 * OUTPUT_NUM_CHUNKS)) #define MAX_C_VECTORS_PER_OUTPUT_CHUNK \ - (MAX_VECTORS_PER_OUTPUT_CHUNK/2) - - + (MAX_VECTORS_PER_OUTPUT_CHUNK / 2) /* should be even */ #define MAX_VECTORS_PER_INPUT_CHUNK \ (INPUT_NUM_CHUNKS == 1 ? MAX_VECTORS_PER_INPUT_STRIPE \ - : 2*CEIL_DIV(MAX_VECTORS_PER_INPUT_STRIPE, \ - 2*OUTPUT_NUM_CHUNKS)) + : 2 * CEIL_DIV(MAX_VECTORS_PER_INPUT_STRIPE, \ + 2 * OUTPUT_NUM_CHUNKS)) #define DEFAULT_C_SUBSAMPLING 2 @@ -460,7 +457,7 @@ more details. #define RAW_BUF_STRIDE \ (BINARY_ID == SH_CSS_BINARY_ID_POST_ISP ? MAX_VECTORS_PER_INPUT_CHUNK : \ - ISP_NUM_STRIPES > 1 ? MAX_VECTORS_PER_INPUT_STRIPE+_ISP_EXTRA_PADDING_VECS : \ + ISP_NUM_STRIPES > 1 ? MAX_VECTORS_PER_INPUT_STRIPE + _ISP_EXTRA_PADDING_VECS : \ !ENABLE_CONTINUOUS ? MAX_VECTORS_PER_INPUT_LINE : \ MAX_VECTORS_PER_INPUT_CHUNK) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h index 37a7d28f6d9f1..2c6d1f8dcbb91 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h @@ -39,14 +39,14 @@ struct ia_css_3a_output; struct isp_uds_config { int hive_dx; int hive_dy; - unsigned hive_woix; - unsigned hive_bpp; /* gdc_bits_per_pixel */ - unsigned hive_bci; + unsigned int hive_woix; + unsigned int hive_bpp; /* gdc_bits_per_pixel */ + unsigned int hive_bci; }; struct s_isp_gdcac_config { - unsigned nbx; - unsigned nby; + unsigned int nbx; + unsigned int nby; }; /* output.hive.c request information */ @@ -57,13 +57,13 @@ typedef enum { } output_channel_type; typedef struct s_output_dma_info { - unsigned cond; /* Condition for transfer */ + unsigned int cond; /* Condition for transfer */ output_channel_type channel_type; dma_channel channel; - unsigned width_a; - unsigned width_b; - unsigned stride; - unsigned v_delta; /* Offset for v address to do cropping */ + unsigned int width_a; + unsigned int width_b; + unsigned int stride; + unsigned int v_delta; /* Offset for v address to do cropping */ char *x_base; /* X base address */ } output_dma_info_type; #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c index 6512a1ceb9d34..8246ae402075d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c @@ -17,23 +17,22 @@ more details. #include "memory_access.h" static bool realloc_isp_css_mm_buf( - hrt_vaddress *curr_buf, + hrt_vaddress * curr_buf, size_t *curr_size, size_t needed_size, bool force, enum ia_css_err *err, uint16_t mmgr_attribute); - bool reallocate_buffer( - hrt_vaddress *curr_buf, + hrt_vaddress * curr_buf, size_t *curr_size, size_t needed_size, bool force, enum ia_css_err *err) { bool ret; - uint16_t mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; + u16 mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; IA_CSS_ENTER_PRIVATE("void"); @@ -45,14 +44,14 @@ bool reallocate_buffer( } static bool realloc_isp_css_mm_buf( - hrt_vaddress *curr_buf, + hrt_vaddress * curr_buf, size_t *curr_size, size_t needed_size, bool force, enum ia_css_err *err, uint16_t mmgr_attribute) { - int32_t id; + s32 id; *err = IA_CSS_SUCCESS; /* Possible optimization: add a function sh_css_isp_css_mm_realloc() diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c index e16ab458cf523..d07a4b0132a14 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c @@ -53,7 +53,7 @@ ia_css_binary_dvs_env(const struct ia_css_binary_info *info, struct ia_css_resolution *binary_dvs_env) { if (info->enable.dvs_envelope) { - assert(dvs_env != NULL); + assert(dvs_env); binary_dvs_env->width = max(dvs_env->width, SH_CSS_MIN_DVS_ENVELOPE); binary_dvs_env->height = max(dvs_env->height, SH_CSS_MIN_DVS_ENVELOPE); } @@ -77,20 +77,20 @@ ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, ia_css_binary_dvs_env(info, dvs_env, &binary_dvs_env); if (binary_supports_yuv_ds) { - if (in_info != NULL) { + if (in_info) { isp_tmp_internal_width = in_info->res.width + info->pipeline.left_cropping + binary_dvs_env.width; isp_tmp_internal_height = in_info->res.height + info->pipeline.top_cropping + binary_dvs_env.height; } - } else if ((bds_out_info != NULL) && (out_info != NULL) && + } else if ((bds_out_info) && (out_info) && /* TODO: hack to make video_us case work. this should be reverted after a nice solution in ISP */ (bds_out_info->res.width >= out_info->res.width)) { isp_tmp_internal_width = bds_out_info->padded_width; isp_tmp_internal_height = bds_out_info->res.height; } else { - if (out_info != NULL) { + if (out_info) { isp_tmp_internal_width = out_info->padded_width; isp_tmp_internal_height = out_info->res.height; } @@ -111,25 +111,25 @@ ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, #ifndef ISP2401 /* Computation results of the origin coordinate of bayer on the shading table. */ struct sh_css_shading_table_bayer_origin_compute_results { - uint32_t bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of bayer scaling. */ - uint32_t bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of bayer scaling. */ - uint32_t bayer_scale_ver_ratio_in; /* Vertical ratio (in) of bayer scaling. */ - uint32_t bayer_scale_ver_ratio_out; /* Vertical ratio (out) of bayer scaling. */ - uint32_t sc_bayer_origin_x_bqs_on_shading_table; /* X coordinate (in bqs) of bayer origin on shading table. */ - uint32_t sc_bayer_origin_y_bqs_on_shading_table; /* Y coordinate (in bqs) of bayer origin on shading table. */ + u32 bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of bayer scaling. */ + u32 bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of bayer scaling. */ + u32 bayer_scale_ver_ratio_in; /* Vertical ratio (in) of bayer scaling. */ + u32 bayer_scale_ver_ratio_out; /* Vertical ratio (out) of bayer scaling. */ + u32 sc_bayer_origin_x_bqs_on_shading_table; /* X coordinate (in bqs) of bayer origin on shading table. */ + u32 sc_bayer_origin_y_bqs_on_shading_table; /* Y coordinate (in bqs) of bayer origin on shading table. */ #else /* Requirements for the shading correction. */ struct sh_css_binary_sc_requirements { /* Bayer scaling factor, for the scaling which is applied before shading correction. */ - uint32_t bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of scaling applied BEFORE shading correction. */ - uint32_t bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of scaling applied BEFORE shading correction. */ - uint32_t bayer_scale_ver_ratio_in; /* Vertical ratio (in) of scaling applied BEFORE shading correction. */ - uint32_t bayer_scale_ver_ratio_out; /* Vertical ratio (out) of scaling applied BEFORE shading correction. */ + u32 bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of scaling applied BEFORE shading correction. */ + u32 bayer_scale_hor_ratio_out; /* Horizontal ratio (out) of scaling applied BEFORE shading correction. */ + u32 bayer_scale_ver_ratio_in; /* Vertical ratio (in) of scaling applied BEFORE shading correction. */ + u32 bayer_scale_ver_ratio_out; /* Vertical ratio (out) of scaling applied BEFORE shading correction. */ /* ISP internal frame is composed of the real sensor data and the padding data. */ - uint32_t sensor_data_origin_x_bqs_on_internal; /* X origin (in bqs) of sensor data on internal frame + u32 sensor_data_origin_x_bqs_on_internal; /* X origin (in bqs) of sensor data on internal frame at shading correction. */ - uint32_t sensor_data_origin_y_bqs_on_internal; /* Y origin (in bqs) of sensor data on internal frame + u32 sensor_data_origin_y_bqs_on_internal; /* Y origin (in bqs) of sensor data on internal frame at shading correction. */ #endif }; @@ -362,7 +362,7 @@ sh_css_binary_get_sc_requirements( int top_padding_bqsxfrac_acc = (top_cropping_bqs * factor - top_cropping_bqs * bds_frac_acc) + (2 * bds_frac_acc - factor); /* top padding by fixed-point (in bqs) */ - top_padding_bqs = (unsigned int)((top_padding_bqsxfrac_acc + bds_frac_acc/2 - 1) / bds_frac_acc); + top_padding_bqs = (unsigned int)((top_padding_bqsxfrac_acc + bds_frac_acc / 2 - 1) / bds_frac_acc); } IA_CSS_LOG("top_cropping=%d, top_padding_bqs=%d", binary->info->sp.pipeline.top_cropping, top_padding_bqs); @@ -414,12 +414,12 @@ sh_css_binary_get_sc_requirements( located on the shading table during the shading correction. */ res->sc_bayer_origin_x_bqs_on_shading_table = ((left_padding_adjusted_bqs + bad_bqs_on_left_before_bs) - * bs_hor_ratio_out + bs_hor_ratio_in/2) / bs_hor_ratio_in + * bs_hor_ratio_out + bs_hor_ratio_in / 2) / bs_hor_ratio_in + bad_bqs_on_left_after_bs; /* "+ bs_hor_ratio_in/2": rounding for division by bs_hor_ratio_in */ res->sc_bayer_origin_y_bqs_on_shading_table = (bad_bqs_on_top_before_bs - * bs_ver_ratio_out + bs_ver_ratio_in/2) / bs_ver_ratio_in + * bs_ver_ratio_out + bs_ver_ratio_in / 2) / bs_ver_ratio_in + bad_bqs_on_top_after_bs; /* "+ bs_ver_ratio_in/2": rounding for division by bs_ver_ratio_in */ @@ -444,13 +444,13 @@ sh_css_binary_get_sc_requirements( bs_out = bs_hor_ratio_out * bs_frac; bs_in = bs_hor_ratio_in * bs_frac; sensor_data_origin_x_bqs_on_internal - = ((left_padding_adjusted_bqs + right_shift_bqs_before_bs) * bs_out + bs_in/2) / bs_in + = ((left_padding_adjusted_bqs + right_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in + right_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ bs_out = bs_ver_ratio_out * bs_frac; bs_in = bs_ver_ratio_in * bs_frac; sensor_data_origin_y_bqs_on_internal - = ((top_padding_bqs + down_shift_bqs_before_bs) * bs_out + bs_in/2) / bs_in + = ((top_padding_bqs + down_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in + down_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ } @@ -493,26 +493,26 @@ ia_css_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in #endif #ifndef ISP2401 - assert(binary != NULL); - assert(info != NULL); + assert(binary); + assert(info); #else - uint32_t in_width_bqs, in_height_bqs, internal_width_bqs, internal_height_bqs; - uint32_t num_hor_grids, num_ver_grids, bqs_per_grid_cell, tbl_width_bqs, tbl_height_bqs; - uint32_t sensor_org_x_bqs_on_internal, sensor_org_y_bqs_on_internal, sensor_width_bqs, sensor_height_bqs; - uint32_t sensor_center_x_bqs_on_internal, sensor_center_y_bqs_on_internal; - uint32_t left, right, upper, lower; - uint32_t adjust_left, adjust_right, adjust_upper, adjust_lower, adjust_width_bqs, adjust_height_bqs; - uint32_t internal_org_x_bqs_on_tbl, internal_org_y_bqs_on_tbl; - uint32_t sensor_org_x_bqs_on_tbl, sensor_org_y_bqs_on_tbl; + u32 in_width_bqs, in_height_bqs, internal_width_bqs, internal_height_bqs; + u32 num_hor_grids, num_ver_grids, bqs_per_grid_cell, tbl_width_bqs, tbl_height_bqs; + u32 sensor_org_x_bqs_on_internal, sensor_org_y_bqs_on_internal, sensor_width_bqs, sensor_height_bqs; + u32 sensor_center_x_bqs_on_internal, sensor_center_y_bqs_on_internal; + u32 left, right, upper, lower; + u32 adjust_left, adjust_right, adjust_upper, adjust_lower, adjust_width_bqs, adjust_height_bqs; + u32 internal_org_x_bqs_on_tbl, internal_org_y_bqs_on_tbl; + u32 sensor_org_x_bqs_on_tbl, sensor_org_y_bqs_on_tbl; #endif #ifndef ISP2401 info->type = IA_CSS_SHADING_CORRECTION_TYPE_1; #else - assert(binary != NULL); - assert(stream_config != NULL); - assert(shading_info != NULL); - assert(pipe_config != NULL); + assert(binary); + assert(stream_config); + assert(shading_info); + assert(pipe_config); #endif #ifndef ISP2401 @@ -601,11 +601,11 @@ ia_css_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in bs_out = scr.bayer_scale_hor_ratio_out * bs_frac; bs_in = scr.bayer_scale_hor_ratio_in * bs_frac; - sensor_width_bqs = (in_width_bqs * bs_out + bs_in/2) / bs_in; /* "+ bs_in/2": rounding */ + sensor_width_bqs = (in_width_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ bs_out = scr.bayer_scale_ver_ratio_out * bs_frac; bs_in = scr.bayer_scale_ver_ratio_in * bs_frac; - sensor_height_bqs = (in_height_bqs * bs_out + bs_in/2) / bs_in; /* "+ bs_in/2": rounding */ + sensor_height_bqs = (in_height_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ } /* Center of the sensor data on the internal frame at shading correction. */ @@ -704,11 +704,11 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ { enum ia_css_err err; - assert(binary != NULL); + assert(binary); #ifndef ISP2401 - assert(info != NULL); + assert(info); #else - assert(shading_info != NULL); + assert(shading_info); IA_CSS_ENTER_PRIVATE("binary=%p, type=%d, required_bds_factor=%d, stream_config=%p", binary, type, required_bds_factor, stream_config); @@ -734,8 +734,8 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ static void sh_css_binary_common_grid_info(const struct ia_css_binary *binary, struct ia_css_grid_info *info) { - assert(binary != NULL); - assert(info != NULL); + assert(binary); + assert(info); info->isp_in_width = binary->internal_frame_info.res.width; info->isp_in_height = binary->internal_frame_info.res.height; @@ -751,8 +751,8 @@ ia_css_binary_dvs_grid_info(const struct ia_css_binary *binary, struct ia_css_dvs_grid_info *dvs_info; (void)pipe; - assert(binary != NULL); - assert(info != NULL); + assert(binary); + assert(info); dvs_info = &info->dvs_grid.dvs_grid_info; @@ -794,11 +794,10 @@ ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, IA_CSS_ENTER_PRIVATE("binary=%p, info=%p, pipe=%p", binary, info, pipe); - assert(binary != NULL); - assert(info != NULL); + assert(binary); + assert(info); s3a_info = &info->s3a_grid; - /* 3A statistics grid */ s3a_info->enable = binary->info->sp.enable.s3a; s3a_info->width = binary->s3atbl_width; @@ -821,7 +820,7 @@ ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, static void binary_init_pc_histogram(struct sh_css_pc_histogram *histo) { - assert(histo != NULL); + assert(histo); histo->length = 0; histo->run = NULL; @@ -832,8 +831,8 @@ static void binary_init_metrics(struct sh_css_binary_metrics *metrics, const struct ia_css_binary_info *info) { - assert(metrics != NULL); - assert(info != NULL); + assert(metrics); + assert(info); metrics->mode = info->pipeline.mode; metrics->id = info->id; @@ -849,7 +848,7 @@ binary_supports_output_format(const struct ia_css_binary_xinfo *info, { int i; - assert(info != NULL); + assert(info); for (i = 0; i < info->num_output_formats; i++) { if (info->output_formats[i] == format) @@ -863,8 +862,7 @@ static bool binary_supports_input_format(const struct ia_css_binary_xinfo *info, enum atomisp_input_format format) { - - assert(info != NULL); + assert(info); (void)format; return true; @@ -877,7 +875,7 @@ binary_supports_vf_format(const struct ia_css_binary_xinfo *info, { int i; - assert(info != NULL); + assert(info); for (i = 0; i < info->num_vf_formats; i++) { if (info->vf_formats[i] == format) @@ -888,7 +886,7 @@ binary_supports_vf_format(const struct ia_css_binary_xinfo *info, /* move to host part of bds module */ static bool -supports_bds_factor(uint32_t supported_factors, +supports_bds_factor(u32 supported_factors, uint32_t bds_factor) { return ((supported_factors & PACK_BDS_FACTOR(bds_factor)) != 0); @@ -899,13 +897,13 @@ binary_init_info(struct ia_css_binary_xinfo *info, unsigned int i, bool *binary_found) { const unsigned char *blob = sh_css_blob_info[i].blob; - unsigned size = sh_css_blob_info[i].header.blob.size; + unsigned int size = sh_css_blob_info[i].header.blob.size; - if ((info == NULL) || (binary_found == NULL)) + if ((!info) || (!binary_found)) return IA_CSS_ERR_INVALID_ARGUMENTS; *info = sh_css_blob_info[i].header.info.isp; - *binary_found = blob != NULL; + *binary_found = blob; info->blob_index = i; /* we don't have this binary, skip it */ if (!size) @@ -931,7 +929,7 @@ ia_css_binary_init_infos(void) all_binaries = sh_css_malloc(num_of_isp_binaries * sizeof(*all_binaries)); - if (all_binaries == NULL) + if (!all_binaries) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; for (i = 0; i < num_of_isp_binaries; i++) { @@ -1058,7 +1056,7 @@ binary_in_frame_padded_width(int in_frame_width, nr_of_left_paddings = 0; #else /* in other cases, the left padding pixels are always 128 */ - nr_of_left_paddings = 2*ISP_VEC_NELEMS; + nr_of_left_paddings = 2 * ISP_VEC_NELEMS; #endif if (need_scaling) { /* In SDV use-case, we need to match left-padding of @@ -1067,14 +1065,14 @@ binary_in_frame_padded_width(int in_frame_width, /* Different than before, we do left&right padding. */ rval = CEIL_MUL(in_frame_width + nr_of_left_paddings, - 2*ISP_VEC_NELEMS); + 2 * ISP_VEC_NELEMS); } else { /* Different than before, we do left&right padding. */ in_frame_width += dvs_env_width; rval = CEIL_MUL(in_frame_width + (left_cropping ? nr_of_left_paddings : 0), - 2*ISP_VEC_NELEMS); + 2 * ISP_VEC_NELEMS); } } else { rval = isp_internal_width; @@ -1083,7 +1081,6 @@ binary_in_frame_padded_width(int in_frame_width, return rval; } - enum ia_css_err ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, bool online, @@ -1120,8 +1117,8 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, unsigned int i; const struct ia_css_frame_info *bin_out_info = NULL; - assert(info != NULL); - assert(binary != NULL); + assert(info); + assert(binary); binary->info = xinfo; if (!accelerator) { @@ -1139,12 +1136,11 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, break; } } - if (in_info != NULL && bin_out_info != NULL) { + if (in_info && bin_out_info) { need_scaling = (in_info->res.width != bin_out_info->res.width) || (in_info->res.height != bin_out_info->res.height); } - /* binary_dvs_env has to be equal or larger than SH_CSS_MIN_DVS_ENVELOPE */ binary_dvs_env.width = 0; binary_dvs_env.height = 0; @@ -1163,15 +1159,15 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, isp_internal_height = internal_res.height; /* internal frame info */ - if (bin_out_info != NULL) /* { */ + if (bin_out_info) /* { */ binary->internal_frame_info.format = bin_out_info->format; /* } */ binary->internal_frame_info.res.width = isp_internal_width; - binary->internal_frame_info.padded_width = CEIL_MUL(isp_internal_width, 2*ISP_VEC_NELEMS); + binary->internal_frame_info.padded_width = CEIL_MUL(isp_internal_width, 2 * ISP_VEC_NELEMS); binary->internal_frame_info.res.height = isp_internal_height; binary->internal_frame_info.raw_bit_depth = bits_per_pixel; - if (in_info != NULL) { + if (in_info) { binary->effective_in_frame_res.width = in_info->res.width; binary->effective_in_frame_res.height = in_info->res.height; @@ -1204,7 +1200,7 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, binary->in_frame_info.raw_bit_depth = bits_per_pixel; for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { - if (out_info[i] != NULL) { + if (out_info[i]) { binary->out_frame_info[i].res.width = out_info[i]->res.width; binary->out_frame_info[i].res.height = out_info[i]->res.height; binary->out_frame_info[i].padded_width = out_info[i]->padded_width; @@ -1239,10 +1235,11 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, binary->input_format = stream_format; /* viewfinder output info */ - if ((vf_info != NULL) && (vf_info->res.width != 0)) { + if ((vf_info) && (vf_info->res.width != 0)) { unsigned int vf_out_vecs, vf_out_width, vf_out_height; + binary->vf_frame_info.format = vf_info->format; - if (bin_out_info == NULL) + if (!bin_out_info) return IA_CSS_ERR_INTERNAL_ERROR; vf_out_vecs = __ISP_VF_OUTPUT_WIDTH_VECS(bin_out_info->padded_width, vf_log_ds); @@ -1292,7 +1289,7 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, sc_3a_dis_width = binary->in_frame_info.res.width; sc_3a_dis_padded_width = binary->in_frame_info.padded_width; sc_3a_dis_height = binary->in_frame_info.res.height; - if (bds_out_info != NULL && in_info != NULL && + if (bds_out_info && in_info && bds_out_info->res.width != in_info->res.width) { /* TODO: Next, "internal_frame_info" should be derived from * bds_out. So this part will change once it is in place! */ @@ -1301,7 +1298,6 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, sc_3a_dis_height = isp_internal_height; } - s3a_isp_width = _ISP_S3A_ELEMS_ISP_WIDTH(sc_3a_dis_padded_width, info->pipeline.left_cropping); if (info->s3a.fixed_s3a_deci_log) { @@ -1410,9 +1406,9 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, struct ia_css_resolution dvs_env, internal_res; unsigned int i; - assert(descr != NULL); + assert(descr); /* MW: used after an error check, may accept NULL, but doubtfull */ - assert(binary != NULL); + assert(binary); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_binary_find() enter: descr=%p, (mode=%d), binary=%p\n", @@ -1430,13 +1426,13 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, if (req_out_info[i] && (req_out_info[i]->res.width != 0)) req_bin_out_info = req_out_info[i]; } - if (req_bin_out_info == NULL) + if (!req_bin_out_info) return IA_CSS_ERR_INTERNAL_ERROR; #ifndef ISP2401 req_vf_info = descr->vf_info; #else - if ((descr->vf_info != NULL) && (descr->vf_info->res.width == 0)) + if ((descr->vf_info) && (descr->vf_info->res.width == 0)) /* width==0 means that there is no vf pin (e.g. in SkyCam preview case) */ req_vf_info = NULL; else @@ -1468,7 +1464,6 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, internal_res.width = 0; internal_res.height = 0; - if (mode == IA_CSS_BINARY_MODE_VIDEO) { dvs_env = descr->dvs_env; need_dz = descr->enable_dz; @@ -1586,7 +1581,7 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, need_dz = false; /* when we require vf output, we need to have vf_veceven */ - if ((req_vf_info != NULL) && !(candidate->enable.vf_veceven || + if ((req_vf_info) && !(candidate->enable.vf_veceven || /* or variable vf vec even */ candidate->vf_dec.is_variable || /* or more than one output pin. */ @@ -1767,7 +1762,7 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, continue; } - if(!candidate->enable.tnr && need_tnr) { + if (!candidate->enable.tnr && need_tnr) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_binary_find() [%d] continue: !%d && %d\n", __LINE__, candidate->enable.tnr, @@ -1824,7 +1819,7 @@ void ia_css_binary_get_isp_binaries(struct ia_css_binary_xinfo **binaries, uint32_t *num_isp_binaries) { - assert(binaries != NULL); + assert(binaries); if (num_isp_binaries) *num_isp_binaries = 0; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h index 4d17d3c697d6a..fffe3b8461625 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h @@ -37,7 +37,6 @@ more details. #include "ia_css_err.h" #define BUFQ_EVENT_SIZE 4 - /** * @brief Query the internal frame ID. * @@ -54,7 +53,6 @@ bool ia_css_query_internal_queue_id( enum sh_css_queue_id *val ); - /** * @brief Map buffer type to a internal queue id. * @@ -69,14 +67,12 @@ void ia_css_queue_map( bool map ); - /** * @brief Initialize buffer type to a queue id mapping * @return none */ void ia_css_queue_map_init(void); - /** * @brief initializes bufq module * It create instances of @@ -90,7 +86,6 @@ void ia_css_queue_map_init(void); */ void ia_css_bufq_init(void); - /** * @brief Enqueues an item into host to SP buffer queue * @@ -130,9 +125,9 @@ enum ia_css_err ia_css_bufq_dequeue_buffer( * */ enum ia_css_err ia_css_bufq_enqueue_psys_event( - uint8_t evt_id, - uint8_t evt_payload_0, - uint8_t evt_payload_1, + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, uint8_t evt_payload_2 ); @@ -144,7 +139,8 @@ enum ia_css_err ia_css_bufq_enqueue_psys_event( * */ enum ia_css_err ia_css_bufq_dequeue_psys_event( - uint8_t item[BUFQ_EVENT_SIZE] + u8 item[BUFQ_EVENT_SIZE] + ); /** @@ -166,7 +162,7 @@ enum ia_css_err ia_css_bufq_enqueue_isys_event( * */ enum ia_css_err ia_css_bufq_dequeue_isys_event( - uint8_t item[BUFQ_EVENT_SIZE]); + u8 item[BUFQ_EVENT_SIZE]); /** * @brief Enqueue a tagger command item into tagger command queue.. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h index bb77080591b90..20951f6bb0af5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h @@ -51,9 +51,9 @@ enum sh_css_queue_id { #endif #if defined(HAS_NO_INPUT_SYSTEM) || defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) -#define SH_CSS_MAX_NUM_QUEUES (SH_CSS_QUEUE_H_ID+1) +#define SH_CSS_MAX_NUM_QUEUES (SH_CSS_QUEUE_H_ID + 1) #else -#define SH_CSS_MAX_NUM_QUEUES (SH_CSS_QUEUE_G_ID+1) +#define SH_CSS_MAX_NUM_QUEUES (SH_CSS_QUEUE_G_ID + 1) #endif }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c index ffbcdd80d9343..dff5bb8211b1c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c @@ -161,7 +161,7 @@ bool ia_css_query_internal_queue_id( { IA_CSS_ENTER("buf_type=%d, thread_id=%d, val = %p", buf_type, thread_id, val); - if ((val == NULL) || (thread_id >= SH_CSS_MAX_SP_THREADS) || (buf_type >= IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)) { + if ((!val) || (thread_id >= SH_CSS_MAX_SP_THREADS) || (buf_type >= IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)) { IA_CSS_LEAVE("return_val = false"); return false; } @@ -232,7 +232,6 @@ static void unmap_buffer_type_to_queue_id( queue_availability[thread_id][queue_id] = true; } - static ia_css_queue_t *bufq_get_qhandle( enum sh_css_queue_type type, enum sh_css_queue_id id, @@ -369,7 +368,7 @@ enum ia_css_err ia_css_bufq_enqueue_buffer( q = bufq_get_qhandle(sh_css_host2sp_buffer_queue, queue_id, thread_index); - if (q != NULL) { + if (q) { error = ia_css_queue_enqueue(q, item); return_err = ia_css_convert_errno(error); } else { @@ -390,7 +389,7 @@ enum ia_css_err ia_css_bufq_dequeue_buffer( ia_css_queue_t *q; IA_CSS_ENTER_PRIVATE("queue_id=%d", queue_id); - if ((item == NULL) || + if ((!item) || (queue_id <= SH_CSS_INVALID_QUEUE_ID) || (queue_id >= SH_CSS_MAX_NUM_QUEUES) ) @@ -399,7 +398,7 @@ enum ia_css_err ia_css_bufq_dequeue_buffer( q = bufq_get_qhandle(sh_css_sp2host_buffer_queue, queue_id, -1); - if (q != NULL) { + if (q) { error = ia_css_queue_dequeue(q, item); return_err = ia_css_convert_errno(error); } else { @@ -412,9 +411,9 @@ enum ia_css_err ia_css_bufq_dequeue_buffer( } enum ia_css_err ia_css_bufq_enqueue_psys_event( - uint8_t evt_id, - uint8_t evt_payload_0, - uint8_t evt_payload_1, + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, uint8_t evt_payload_2) { enum ia_css_err return_err; @@ -423,7 +422,7 @@ enum ia_css_err ia_css_bufq_enqueue_psys_event( IA_CSS_ENTER_PRIVATE("evt_id=%d", evt_id); q = bufq_get_qhandle(sh_css_host2sp_psys_event_queue, -1, -1); - if (NULL == q) { + if (!q) { IA_CSS_ERROR("queue is not initialized"); return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -437,7 +436,7 @@ enum ia_css_err ia_css_bufq_enqueue_psys_event( } enum ia_css_err ia_css_bufq_dequeue_psys_event( - uint8_t item[BUFQ_EVENT_SIZE]) + u8 item[BUFQ_EVENT_SIZE]) { enum ia_css_err; int error = 0; @@ -446,22 +445,21 @@ enum ia_css_err ia_css_bufq_dequeue_psys_event( /* No ENTER/LEAVE in this function since this is polled * by some test apps. Enablign logging here floods the log * files which may cause timeouts. */ - if (item == NULL) + if (!item) return IA_CSS_ERR_INVALID_ARGUMENTS; q = bufq_get_qhandle(sh_css_sp2host_psys_event_queue, -1, -1); - if (NULL == q) { + if (!q) { IA_CSS_ERROR("queue is not initialized"); return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } error = ia_css_eventq_recv(q, item); return ia_css_convert_errno(error); - } enum ia_css_err ia_css_bufq_dequeue_isys_event( - uint8_t item[BUFQ_EVENT_SIZE]) + u8 item[BUFQ_EVENT_SIZE]) { #if !defined(HAS_NO_INPUT_SYSTEM) enum ia_css_err; @@ -471,11 +469,11 @@ enum ia_css_err ia_css_bufq_dequeue_isys_event( /* No ENTER/LEAVE in this function since this is polled * by some test apps. Enablign logging here floods the log * files which may cause timeouts. */ - if (item == NULL) + if (!item) return IA_CSS_ERR_INVALID_ARGUMENTS; q = bufq_get_qhandle(sh_css_sp2host_isys_event_queue, -1, -1); - if (q == NULL) { + if (!q) { IA_CSS_ERROR("queue is not initialized"); return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -496,7 +494,7 @@ enum ia_css_err ia_css_bufq_enqueue_isys_event(uint8_t evt_id) IA_CSS_ENTER_PRIVATE("event_id=%d", evt_id); q = bufq_get_qhandle(sh_css_host2sp_isys_event_queue, -1, -1); - if (q == NULL) { + if (!q) { IA_CSS_ERROR("queue is not initialized"); return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -521,7 +519,7 @@ enum ia_css_err ia_css_bufq_enqueue_tag_cmd( IA_CSS_ENTER_PRIVATE("item=%d", item); q = bufq_get_qhandle(sh_css_host2sp_tag_cmd_queue, -1, -1); - if (NULL == q) { + if (!q) { IA_CSS_ERROR("queue is not initialized"); return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -543,13 +541,13 @@ enum ia_css_err ia_css_bufq_deinit(void) static void bufq_dump_queue_info(const char *prefix, ia_css_queue_t *qhandle) { - uint32_t free = 0, used = 0; - assert(prefix != NULL && qhandle != NULL); + u32 free = 0, used = 0; + + assert(prefix && qhandle); ia_css_queue_get_used_space(qhandle, &used); ia_css_queue_get_free_space(qhandle, &free); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s: used=%u free=%u\n", prefix, used, free); - } void ia_css_bufq_dump_queue_info(void) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h index 4b28b2a0863a7..a330575bb1522 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h @@ -138,7 +138,7 @@ ia_css_debug_vdtrace(unsigned int level, const char *fmt, va_list args) } __printf(2, 3) -extern void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...); +void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...); /*! @brief Dump sp thread's stack contents * SP thread's stack contents are set to 0xcafecafe. This function dumps the @@ -371,7 +371,6 @@ void ia_css_debug_dump_pipe_extra_config( void ia_css_debug_dump_pipe_config( const struct ia_css_pipe_config *config); - /*! @brief Dump the stream config source info to the trace output * Dumps the stream config source info to the trace output. * @param[in] config pointer to struct ia_css_stream_config diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h index 72ac0e32ebf74..fcb923d9c4c6c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h @@ -42,14 +42,14 @@ more details. * * @return None */ -extern void ia_css_debug_pipe_graph_dump_prologue(void); +void ia_css_debug_pipe_graph_dump_prologue(void); /** * @brief Internal debug support for constructing a pipe graph. * * @return None */ -extern void ia_css_debug_pipe_graph_dump_epilogue(void); +void ia_css_debug_pipe_graph_dump_epilogue(void); /** * @brief Internal debug support for constructing a pipe graph. @@ -58,7 +58,7 @@ extern void ia_css_debug_pipe_graph_dump_epilogue(void); * * @return None */ -extern void ia_css_debug_pipe_graph_dump_stage( +void ia_css_debug_pipe_graph_dump_stage( struct ia_css_pipeline_stage *stage, enum ia_css_pipe_id id); @@ -68,17 +68,16 @@ extern void ia_css_debug_pipe_graph_dump_stage( * * @return None */ -extern void ia_css_debug_pipe_graph_dump_sp_raw_copy( +void ia_css_debug_pipe_graph_dump_sp_raw_copy( struct ia_css_frame *out_frame); - /** * @brief Internal debug support for constructing a pipe graph. * @param[in] stream_config info about sensor and input formatter. * * @return None */ -extern void ia_css_debug_pipe_graph_dump_stream_config( +void ia_css_debug_pipe_graph_dump_stream_config( const struct ia_css_stream_config *stream_config); #endif /* _IA_CSS_DEBUG_PIPE_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c index 66556a4e574ee..05969686b8c24 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c @@ -116,13 +116,13 @@ unsigned int ia_css_debug_trace_level = IA_CSS_DEBUG_WARNING; #define ENABLE_LINE_MAX_LENGTH (25) #ifdef ISP2401 -#define DBG_EXT_CMD_TRACE_PNTS_DUMP (1 << 8) -#define DBG_EXT_CMD_PUB_CFG_DUMP (1 << 9) -#define DBG_EXT_CMD_GAC_REG_DUMP (1 << 10) -#define DBG_EXT_CMD_GAC_ACB_REG_DUMP (1 << 11) -#define DBG_EXT_CMD_FIFO_DUMP (1 << 12) -#define DBG_EXT_CMD_QUEUE_DUMP (1 << 13) -#define DBG_EXT_CMD_DMA_DUMP (1 << 14) +#define DBG_EXT_CMD_TRACE_PNTS_DUMP BIT(8) +#define DBG_EXT_CMD_PUB_CFG_DUMP BIT(9) +#define DBG_EXT_CMD_GAC_REG_DUMP BIT(10) +#define DBG_EXT_CMD_GAC_ACB_REG_DUMP BIT(11) +#define DBG_EXT_CMD_FIFO_DUMP BIT(12) +#define DBG_EXT_CMD_QUEUE_DUMP BIT(13) +#define DBG_EXT_CMD_DMA_DUMP BIT(14) #define DBG_EXT_CMD_MASK 0xAB0000CD #endif @@ -161,7 +161,7 @@ static const char * const pipe_id_to_str[] = { /* [IA_CSS_PIPE_ID_ACC] =*/ "accelerator" }; -static char dot_id_input_bin[SH_CSS_MAX_BINARY_NAME+10]; +static char dot_id_input_bin[SH_CSS_MAX_BINARY_NAME + 10]; static char ring_buffer[200]; void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...) @@ -176,18 +176,18 @@ void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...) static void debug_dump_long_array_formatted( const sp_ID_t sp_id, hrt_address stack_sp_addr, - unsigned stack_size) + unsigned int stack_size) { unsigned int i; - uint32_t val; - uint32_t addr = (uint32_t) stack_sp_addr; - uint32_t stack_size_words = CEIL_DIV(stack_size, sizeof(uint32_t)); + u32 val; + u32 addr = (uint32_t)stack_sp_addr; + u32 stack_size_words = CEIL_DIV(stack_size, sizeof(uint32_t)); /* When size is not multiple of four, last word is only relevant for * remaining bytes */ for (i = 0; i < stack_size_words; i++) { val = sp_dmem_load_uint32(sp_id, (hrt_address)addr); - if ((i%8) == 0) + if ((i % 8) == 0) ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "\n"); ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "0x%08x ", val); @@ -203,8 +203,8 @@ static void debug_dump_sp_stack_info( const struct ia_css_fw_info *fw; unsigned int HIVE_ADDR_sp_threads_stack; unsigned int HIVE_ADDR_sp_threads_stack_size; - uint32_t stack_sizes[MAX_THREAD_NUM]; - uint32_t stack_sp_addr[MAX_THREAD_NUM]; + u32 stack_sizes[MAX_THREAD_NUM]; + u32 stack_sp_addr[MAX_THREAD_NUM]; unsigned int i; fw = &sh_css_sp_fw; @@ -222,8 +222,8 @@ static void debug_dump_sp_stack_info( fw->info.sp.threads_stack_size == 0) return; - (void) HIVE_ADDR_sp_threads_stack; - (void) HIVE_ADDR_sp_threads_stack_size; + (void)HIVE_ADDR_sp_threads_stack; + (void)HIVE_ADDR_sp_threads_stack_size; sp_dmem_load(sp_id, (unsigned int)sp_address_of(sp_threads_stack), @@ -246,7 +246,6 @@ void ia_css_debug_dump_sp_stack_info(void) debug_dump_sp_stack_info(SP0_ID); } - void ia_css_debug_set_dtrace_level(const unsigned int trace_level) { ia_css_debug_trace_level = trace_level; @@ -349,7 +348,6 @@ static const char *debug_stream_format2str(const enum atomisp_input_format strea static const char *debug_frame_format2str(const enum ia_css_frame_format frame_format) { switch (frame_format) { - case IA_CSS_FRAME_FORMAT_NV11: return "NV11"; case IA_CSS_FRAME_FORMAT_NV12: @@ -415,8 +413,8 @@ static const char *debug_frame_format2str(const enum ia_css_frame_format frame_f static void debug_print_sp_state(const sp_state_t *state, const char *cell) { - assert(cell != NULL); - assert(state != NULL); + assert(cell); + assert(state); ia_css_debug_dtrace(2, "%s state:\n", cell); ia_css_debug_dtrace(2, "\t%-32s: 0x%X\n", "PC", state->pc); @@ -433,8 +431,8 @@ static void debug_print_sp_state(const sp_state_t *state, const char *cell) static void debug_print_isp_state(const isp_state_t *state, const char *cell) { - assert(state != NULL); - assert(cell != NULL); + assert(state); + assert(cell); ia_css_debug_dtrace(2, "%s state:\n", cell); ia_css_debug_dtrace(2, "\t%-32s: 0x%X\n", "PC", state->pc); @@ -509,6 +507,7 @@ void ia_css_debug_dump_sp_state(void) { sp_state_t state; sp_stall_t stall; + sp_get_state(SP0_ID, &state, &stall); debug_print_sp_state(&state, "SP"); if (state.is_stalling) { @@ -562,8 +561,8 @@ void ia_css_debug_dump_sp_state(void) static void debug_print_fifo_channel_state(const fifo_channel_state_t *state, const char *descr) { - assert(state != NULL); - assert(descr != NULL); + assert(state); + assert(descr); ia_css_debug_dtrace(2, "FIFO channel: %s\n", descr); ia_css_debug_dtrace(2, "\t%-32s: %d\n", "source valid", @@ -581,6 +580,7 @@ static void debug_print_fifo_channel_state(const fifo_channel_state_t *state, void ia_css_debug_dump_pif_a_isp_fifo_state(void) { fifo_channel_state_t pif_to_isp, isp_to_pif; + fifo_channel_get_state(FIFO_MONITOR0_ID, FIFO_CHANNEL_IF0_TO_ISP0, &pif_to_isp); fifo_channel_get_state(FIFO_MONITOR0_ID, @@ -592,6 +592,7 @@ void ia_css_debug_dump_pif_a_isp_fifo_state(void) void ia_css_debug_dump_pif_b_isp_fifo_state(void) { fifo_channel_state_t pif_to_isp, isp_to_pif; + fifo_channel_get_state(FIFO_MONITOR0_ID, FIFO_CHANNEL_IF1_TO_ISP0, &pif_to_isp); fifo_channel_get_state(FIFO_MONITOR0_ID, @@ -603,6 +604,7 @@ void ia_css_debug_dump_pif_b_isp_fifo_state(void) void ia_css_debug_dump_str2mem_sp_fifo_state(void) { fifo_channel_state_t s2m_to_sp, sp_to_s2m; + fifo_channel_get_state(FIFO_MONITOR0_ID, FIFO_CHANNEL_STREAM2MEM0_TO_SP0, &s2m_to_sp); fifo_channel_get_state(FIFO_MONITOR0_ID, @@ -644,7 +646,7 @@ static void debug_print_if_state(input_formatter_state_t *state, const char *id) int st_allow_fifo_overflow = state->allow_fifo_overflow; int st_block_fifo_when_no_req = state->block_fifo_when_no_req; - assert(state != NULL); + assert(state); ia_css_debug_dtrace(2, "InputFormatter State (%s):\n", id); ia_css_debug_dtrace(2, "\tConfiguration:\n"); @@ -1137,7 +1139,8 @@ void ia_css_debug_dump_dma_state(void) state.write_width); for (i = 0; i < HIVE_ISP_NUM_DMA_CONNS; i++) { - dma_port_state_t *port = &(state.port_states[i]); + dma_port_state_t *port = &state.port_states[i]; + ia_css_debug_dtrace(2, "\tDMA device interface %d\n", i); ia_css_debug_dtrace(2, "\t\tDMA internal side state\n"); ia_css_debug_dtrace(2, @@ -1164,7 +1167,8 @@ void ia_css_debug_dump_dma_state(void) } for (i = 0; i < HIVE_DMA_NUM_CHANNELS; i++) { - dma_channel_state_t *ch = &(state.channel_states[i]); + dma_channel_state_t *ch = &state.channel_states[i]; + ia_css_debug_dtrace(2, "\t%-32s: %d\n", "DMA channel register", i); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Connection", @@ -1196,6 +1200,7 @@ void ia_css_debug_dump_dma_state(void) void ia_css_debug_dump_dma_sp_fifo_state(void) { fifo_channel_state_t dma_to_sp, sp_to_dma; + fifo_channel_get_state(FIFO_MONITOR0_ID, FIFO_CHANNEL_DMA0_TO_SP0, &dma_to_sp); fifo_channel_get_state(FIFO_MONITOR0_ID, @@ -1208,6 +1213,7 @@ void ia_css_debug_dump_dma_sp_fifo_state(void) void ia_css_debug_dump_dma_isp_fifo_state(void) { fifo_channel_state_t dma_to_isp, isp_to_dma; + fifo_channel_get_state(FIFO_MONITOR0_ID, FIFO_CHANNEL_DMA0_TO_ISP0, &dma_to_isp); fifo_channel_get_state(FIFO_MONITOR0_ID, @@ -1220,6 +1226,7 @@ void ia_css_debug_dump_dma_isp_fifo_state(void) void ia_css_debug_dump_isp_sp_fifo_state(void) { fifo_channel_state_t sp_to_isp, isp_to_sp; + fifo_channel_get_state(FIFO_MONITOR0_ID, FIFO_CHANNEL_SP0_TO_ISP0, &sp_to_isp); fifo_channel_get_state(FIFO_MONITOR0_ID, @@ -1246,17 +1253,18 @@ void ia_css_debug_dump_all_fifo_state(void) { int i; fifo_monitor_state_t state; + fifo_monitor_get_state(FIFO_MONITOR0_ID, &state); for (i = 0; i < N_FIFO_CHANNEL; i++) - debug_print_fifo_channel_state(&(state.fifo_channels[i]), + debug_print_fifo_channel_state(&state.fifo_channels[i], "squepfstqkt"); return; } static void debug_binary_info_print(const struct ia_css_binary_xinfo *info) { - assert(info != NULL); + assert(info); ia_css_debug_dtrace(2, "id = %d\n", info->sp.id); ia_css_debug_dtrace(2, "mode = %d\n", info->sp.pipeline.mode); ia_css_debug_dtrace(2, "max_input_width = %d\n", info->sp.input.max_width); @@ -1279,6 +1287,7 @@ static void debug_binary_info_print(const struct ia_css_binary_xinfo *info) void ia_css_debug_binary_print(const struct ia_css_binary *bi) { unsigned int i; + debug_binary_info_print(bi->info); ia_css_debug_dtrace(2, "input: %dx%d, format = %d, padded width = %d\n", @@ -1335,8 +1344,8 @@ void ia_css_debug_frame_print(const struct ia_css_frame *frame, { char *data = NULL; - assert(frame != NULL); - assert(descr != NULL); + assert(frame); + assert(descr); data = (char *)HOST_ADDRESS(frame->data); ia_css_debug_dtrace(2, "frame %s (%p):\n", descr, frame); @@ -1422,12 +1431,11 @@ void ia_css_debug_frame_print(const struct ia_css_frame *frame, void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state *state) { - #endif #if SP_DEBUG == SP_DEBUG_DUMP - assert(state != NULL); + assert(state); ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "current SP software counter: %d\n", state->debug[0]); @@ -1570,7 +1578,7 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state int sp_index = state->index; int n; - assert(state != NULL); + assert(state); if (sp_index < last_index) { /* SP has been reset */ last_index = 0; @@ -1578,10 +1586,7 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state if (last_index == 0) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "copy-trace init: sp_dbg_if_start_line=%d, " - "sp_dbg_if_start_column=%d, " - "sp_dbg_if_cropped_height=%d, " - "sp_debg_if_cropped_width=%d\n", + "copy-trace init: sp_dbg_if_start_line=%d, sp_dbg_if_start_column=%d, sp_dbg_if_cropped_height=%d, sp_debg_if_cropped_width=%d\n", state->if_start_line, state->if_start_column, state->if_cropped_height, @@ -1596,12 +1601,10 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state for (n = last_index; n < sp_index; n++) { int i = n % SH_CSS_SP_DBG_TRACE_DEPTH; + if (state->trace[i].frame != 0) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "copy-trace: frame=%d, line=%d, " - "pixel_distance=%d, " - "mipi_used_dword=%d, " - "sp_index=%d\n", + "copy-trace: frame=%d, line=%d, pixel_distance=%d, mipi_used_dword=%d, sp_index=%d\n", state->trace[i].frame, state->trace[i].line, state->trace[i].pixel_distance, @@ -1649,7 +1652,7 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state static int host_index_last[SH_CSS_SP_DBG_NR_OF_TRACES] = { 0 }; int t, n; - assert(state != NULL); + assert(state); for (t = 0; t < SH_CSS_SP_DBG_NR_OF_TRACES; t++) { int sp_index_last = state->index_last[t]; @@ -1664,8 +1667,7 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state /* last index can be multiple rounds behind */ /* while trace size is only SH_CSS_SP_DBG_TRACE_DEPTH */ ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "Warning: trace %s has gap of %d " - "traces\n", + "Warning: trace %s has gap of %d traces\n", trace_name[t], (sp_index_last - (host_index_last[t] + @@ -1685,8 +1687,7 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state if (ts) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "%05d trace=%s, file=%s:%d, " - "data=0x%08x\n", + "%05d trace=%s, file=%s:%d, data=0x%08x\n", ts, trace_name[t], id2filename[fid], l, @@ -1702,7 +1703,7 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state int limit = SH_CSS_NUM_SP_DEBUG; int step = 1; - assert(state != NULL); + assert(state); for (i = base; i < limit; i += step) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, @@ -1723,7 +1724,7 @@ static void debug_print_rx_mipi_port_state(mipi_port_state_t *state) int i; unsigned int bits, infos; - assert(state != NULL); + assert(state); bits = state->irq_status; infos = ia_css_isys_rx_translate_irq_infos(bits); @@ -1797,7 +1798,7 @@ static void debug_print_rx_channel_state(rx_channel_state_t *state) { int i; - assert(state != NULL); + assert(state); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "compression_scheme0", state->comp_scheme0); @@ -1821,7 +1822,7 @@ static void debug_print_rx_state(receiver_state_t *state) { int i; - assert(state != NULL); + assert(state); ia_css_debug_dtrace(2, "CSI Receiver State:\n"); ia_css_debug_dtrace(2, "\tConfiguration:\n"); @@ -1942,7 +1943,7 @@ void ia_css_debug_dump_sp_sw_debug_info(void) #if defined(USE_INPUT_SYSTEM_VERSION_2) static void debug_print_isys_capture_unit_state(capture_unit_state_t *state) { - assert(state != NULL); + assert(state); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Packet_Length", state->Packet_Length); @@ -1989,7 +1990,7 @@ static void debug_print_isys_capture_unit_state(capture_unit_state_t *state) static void debug_print_isys_acquisition_unit_state( acquisition_unit_state_t *state) { - assert(state != NULL); + assert(state); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Received_Short_Packets", @@ -2029,7 +2030,7 @@ static void debug_print_isys_acquisition_unit_state( static void debug_print_isys_ctrl_unit_state(ctrl_unit_state_t *state) { - assert(state != NULL); + assert(state); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "last_cmd", state->last_cmd); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "next_cmd", state->next_cmd); @@ -2106,7 +2107,7 @@ static void debug_print_isys_state(input_system_state_t *state) { int i; - assert(state != NULL); + assert(state); ia_css_debug_dtrace(2, "InputSystem State:\n"); /* configuration */ @@ -2204,7 +2205,7 @@ void ia_css_debug_dump_isys_state(void) void ia_css_debug_dump_debug_info(const char *context) { - if (context == NULL) + if (!context) context = "No Context provided"; ia_css_debug_dtrace(2, "CSS Debug Info dump [Context = %s]\n", context); @@ -2233,6 +2234,7 @@ void ia_css_debug_dump_debug_info(const char *context) { irq_controller_state_t state; + irq_controller_get_state(IRQ2_ID, &state); ia_css_debug_dtrace(2, "\t%-32s:\n", @@ -2281,7 +2283,7 @@ void ia_css_debug_enable_sp_sleep_mode(enum ia_css_sp_sleep_mode mode) sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(sp_sleep_mode), - (uint32_t) mode); + (uint32_t)mode); } void ia_css_debug_wake_up_sp(void) @@ -2302,10 +2304,12 @@ static char * findf_dmem_params(struct ia_css_stream *stream, short idx) { int i; + for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *pipe = stream->pipes[i]; struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); struct ia_css_pipeline_stage *stage; + for (stage = pipeline->stages; stage; stage = stage->next) { struct ia_css_binary *binary = stage->binary; short *offsets = (short *)&binary->info->mem_offsets.offsets.param->dmem; @@ -2331,7 +2335,7 @@ void ia_css_debug_dump_isp_params(struct ia_css_stream *stream, (void)stream; #else - assert(stream != NULL); + assert(stream); if ((enable & IA_CSS_DEBUG_DUMP_FPN) || (enable & IA_CSS_DEBUG_DUMP_ALL)) { ia_css_fpn_dump(FIND_DMEM_PARAMS(stream, fpn), IA_CSS_DEBUG_VERBOSE); @@ -2398,8 +2402,8 @@ void sh_css_dump_sp_raw_copy_linecount(bool reduced) { const struct ia_css_fw_info *fw; unsigned int HIVE_ADDR_raw_copy_line_count; - int32_t raw_copy_line_count; - static int32_t prev_raw_copy_line_count = -1; + s32 raw_copy_line_count; + static s32 prev_raw_copy_line_count = -1; fw = &sh_css_sp_fw; HIVE_ADDR_raw_copy_line_count = @@ -2414,12 +2418,11 @@ void sh_css_dump_sp_raw_copy_linecount(bool reduced) /* only indicate if copy loop is active */ if (reduced) - raw_copy_line_count = (raw_copy_line_count < 0)?raw_copy_line_count:1; + raw_copy_line_count = (raw_copy_line_count < 0) ? raw_copy_line_count : 1; /* do the handling */ if (prev_raw_copy_line_count != raw_copy_line_count) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "sh_css_dump_sp_raw_copy_linecount() " - "line_count=%d\n", + "sh_css_dump_sp_raw_copy_linecount() line_count=%d\n", raw_copy_line_count); prev_raw_copy_line_count = raw_copy_line_count; } @@ -2429,9 +2432,9 @@ void ia_css_debug_dump_isp_binary(void) { const struct ia_css_fw_info *fw; unsigned int HIVE_ADDR_pipeline_sp_curr_binary_id; - uint32_t curr_binary_id; - static uint32_t prev_binary_id = 0xFFFFFFFF; - static uint32_t sample_count; + u32 curr_binary_id; + static u32 prev_binary_id = 0xFFFFFFFF; + static u32 sample_count; fw = &sh_css_sp_fw; HIVE_ADDR_pipeline_sp_curr_binary_id = fw->info.sp.curr_binary_id; @@ -2447,8 +2450,7 @@ void ia_css_debug_dump_isp_binary(void) sample_count++; if (prev_binary_id != curr_binary_id) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "sh_css_dump_isp_binary() " - "pipe_id=%d, binary_id=%d, sample_count=%d\n", + "sh_css_dump_isp_binary() pipe_id=%d, binary_id=%d, sample_count=%d\n", (curr_binary_id >> 16), (curr_binary_id & 0x0ffff), sample_count); @@ -2463,7 +2465,7 @@ void ia_css_debug_dump_perf_counters(void) const struct ia_css_fw_info *fw; int i; unsigned int HIVE_ADDR_ia_css_isys_sp_error_cnt; - int32_t ia_css_sp_input_system_error_cnt[N_MIPI_PORT_ID + 1]; /* 3 Capture Units and 1 Acquire Unit. */ + s32 ia_css_sp_input_system_error_cnt[N_MIPI_PORT_ID + 1]; /* 3 Capture Units and 1 Acquire Unit. */ ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "Input System Error Counters:\n"); @@ -2530,6 +2532,7 @@ void ia_css_debug_dump_ddr_debug_queue(void) bool ia_css_debug_mode_init(void) { bool rc; + rc = sh_css_sp_init_dma_sw_reg(0); return rc; } @@ -2569,7 +2572,7 @@ void dtrace_dot(const char *fmt, ...) { va_list ap; - assert(fmt != NULL); + assert(fmt); va_start(ap, fmt); ia_css_debug_dtrace(IA_CSS_DEBUG_INFO, "%s", DPG_START); @@ -2577,13 +2580,15 @@ void dtrace_dot(const char *fmt, ...) ia_css_debug_dtrace(IA_CSS_DEBUG_INFO, "%s", DPG_END); va_end(ap); } + #ifdef HAS_WATCHDOG_SP_THREAD_DEBUG void sh_css_dump_thread_wait_info(void) { const struct ia_css_fw_info *fw; int i; unsigned int HIVE_ADDR_sp_thread_wait; - int32_t sp_thread_wait[MAX_THREAD_NUM]; + s32 sp_thread_wait[MAX_THREAD_NUM]; + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "SEM WAITS:\n"); fw = &sh_css_sp_fw; @@ -2601,7 +2606,6 @@ void sh_css_dump_thread_wait_info(void) "\twait[%d] = 0x%X\n", i, sp_thread_wait[i]); } - } void sh_css_dump_pipe_stage_info(void) @@ -2609,7 +2613,8 @@ void sh_css_dump_pipe_stage_info(void) const struct ia_css_fw_info *fw; int i; unsigned int HIVE_ADDR_sp_pipe_stage; - int32_t sp_pipe_stage[MAX_THREAD_NUM]; + s32 sp_pipe_stage[MAX_THREAD_NUM]; + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "PIPE STAGE:\n"); fw = &sh_css_sp_fw; @@ -2627,7 +2632,6 @@ void sh_css_dump_pipe_stage_info(void) "\tstage[%d] = %d\n", i, sp_pipe_stage[i]); } - } void sh_css_dump_pipe_stripe_info(void) @@ -2635,7 +2639,8 @@ void sh_css_dump_pipe_stripe_info(void) const struct ia_css_fw_info *fw; int i; unsigned int HIVE_ADDR_sp_pipe_stripe; - int32_t sp_pipe_stripe[MAX_THREAD_NUM]; + s32 sp_pipe_stripe[MAX_THREAD_NUM]; + ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "PIPE STRIPE:\n"); fw = &sh_css_sp_fw; @@ -2653,7 +2658,6 @@ void sh_css_dump_pipe_stripe_info(void) "\tstripe[%d] = %d\n", i, sp_pipe_stripe[i]); } - } #endif @@ -2675,9 +2679,7 @@ ia_css_debug_pipe_graph_dump_frame( queue_id_to_str[frame->dynamic_queue_id]); } dtrace_dot( - "node [shape = box, " - "fixedsize=true, width=2, height=0.7]; \"%p\" " - "[label = \"%s\\n%d(%d) x %d, %dbpp\\n%s\"];", + "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d, %dbpp\\n%s\"];", frame, debug_frame_format2str(frame->info.format), frame->info.res.width, @@ -2688,14 +2690,12 @@ ia_css_debug_pipe_graph_dump_frame( if (in_frame) { dtrace_dot( - "\"%p\"->\"%s(pipe%d)\" " - "[label = %s_frame];", + "\"%p\"->\"%s(pipe%d)\" [label = %s_frame];", frame, blob_name, id, frame_name); } else { dtrace_dot( - "\"%s(pipe%d)\"->\"%p\" " - "[label = %s_frame];", + "\"%s(pipe%d)\"->\"%p\" [label = %s_frame];", blob_name, id, frame, frame_name); @@ -2709,48 +2709,33 @@ ia_css_debug_pipe_graph_dump_prologue(void) dtrace_dot("rankdir=LR;"); dtrace_dot("fontsize=9;"); - dtrace_dot("label = \"\\nEnable options: rp=reduced pipe, vfve=vf_veceven, " - "dvse=dvs_envelope, dvs6=dvs_6axis, bo=block_out, " - "fbds=fixed_bayer_ds, bf6=bayer_fir_6db, " - "rawb=raw_binning, cont=continuous, disc=dis_crop\\n" - "dp2a=dp_2adjacent, outp=output, outt=out_table, " - "reff=ref_frame, par=params, gam=gamma, " - "cagdc=ca_gdc, ispa=isp_addresses, inf=in_frame, " - "outf=out_frame, hs=high_speed, inpc=input_chunking\""); + dtrace_dot("label = \"\\nEnable options: rp=reduced pipe, vfve=vf_veceven, dvse=dvs_envelope, dvs6=dvs_6axis, bo=block_out, fbds=fixed_bayer_ds, bf6=bayer_fir_6db, rawb=raw_binning, cont=continuous, disc=dis_crop\\n" + "dp2a=dp_2adjacent, outp=output, outt=out_table, reff=ref_frame, par=params, gam=gamma, cagdc=ca_gdc, ispa=isp_addresses, inf=in_frame, outf=out_frame, hs=high_speed, inpc=input_chunking\""); } void ia_css_debug_pipe_graph_dump_epilogue(void) { - if (strlen(ring_buffer) > 0) { dtrace_dot(ring_buffer); } - if (pg_inst.stream_format != N_ATOMISP_INPUT_FORMAT) { /* An input stream format has been set so assume we have * an input system and sensor */ - dtrace_dot( - "node [shape = doublecircle, " - "fixedsize=true, width=2.5]; \"input_system\" " - "[label = \"Input system\"];"); + "node [shape = doublecircle, fixedsize=true, width=2.5]; \"input_system\" [label = \"Input system\"];"); dtrace_dot( - "\"input_system\"->\"%s\" " - "[label = \"%s\"];", + "\"input_system\"->\"%s\" [label = \"%s\"];", dot_id_input_bin, debug_stream_format2str(pg_inst.stream_format)); dtrace_dot( - "node [shape = doublecircle, " - "fixedsize=true, width=2.5]; \"sensor\" " - "[label = \"Sensor\"];"); + "node [shape = doublecircle, fixedsize=true, width=2.5]; \"sensor\" [label = \"Sensor\"];"); dtrace_dot( - "\"sensor\"->\"input_system\" " - "[label = \"%s\\n%d x %d\\n(%d x %d)\"];", + "\"sensor\"->\"input_system\" [label = \"%s\\n%d x %d\\n(%d x %d)\"];", debug_stream_format2str(pg_inst.stream_format), pg_inst.width, pg_inst.height, pg_inst.eff_width, pg_inst.eff_height); @@ -2775,11 +2760,11 @@ ia_css_debug_pipe_graph_dump_stage( struct ia_css_pipeline_stage *stage, enum ia_css_pipe_id id) { - char blob_name[SH_CSS_MAX_BINARY_NAME+10] = ""; + char blob_name[SH_CSS_MAX_BINARY_NAME + 10] = ""; char const *bin_type = ""; int i; - assert(stage != NULL); + assert(stage); if (stage->sp_func != IA_CSS_PIPELINE_NO_FUNC) return; @@ -2799,7 +2784,7 @@ ia_css_debug_pipe_graph_dump_stage( } /* Guard in case of binaries that don't have any binary_info */ - if (stage->binary_info != NULL) { + if (stage->binary_info) { char enable_info1[100]; char enable_info2[100]; char enable_info3[100]; @@ -2852,7 +2837,7 @@ ia_css_debug_pipe_graph_dump_stage( l = strlen(ei); /* Replace last ',' with \0 if present */ - if (l && enable_info[l-1] == ',') + if (l && enable_info[l - 1] == ',') enable_info[--l] = '\0'; if (l > ENABLE_LINE_MAX_LENGTH) { @@ -2866,7 +2851,7 @@ ia_css_debug_pipe_graph_dump_stage( ei, p); enable_info1[p] = '\0'; - ei += p+1; + ei += p + 1; l = strlen(ei); if (l <= ENABLE_LINE_MAX_LENGTH) { @@ -2890,7 +2875,7 @@ ia_css_debug_pipe_graph_dump_stage( sizeof(enable_info2), ei, p); enable_info2[p] = '\0'; - ei += p+1; + ei += p + 1; l = strlen(ei); if (l <= ENABLE_LINE_MAX_LENGTH) { @@ -2914,7 +2899,7 @@ ia_css_debug_pipe_graph_dump_stage( sizeof(enable_info3), ei, p); enable_info3[p] = '\0'; - ei += p+1; + ei += p + 1; strcpy_s(enable_info3, sizeof(enable_info3), ei); snprintf(enable_info, sizeof(enable_info), @@ -2926,14 +2911,10 @@ ia_css_debug_pipe_graph_dump_stage( } } - dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, " - "label=\"%s\\n%s\\n\\n%s\"]; \"%s(pipe%d)\"", + dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\\n\\n%s\"]; \"%s(pipe%d)\"", bin_type, blob_name, enable_info, blob_name, id); - - } - else { - dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, " - "label=\"%s\\n%s\\n\"]; \"%s(pipe%d)\"", + } else { + dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\\n\"]; \"%s(pipe%d)\"", bin_type, blob_name, blob_name, id); } @@ -2996,20 +2977,17 @@ void ia_css_debug_pipe_graph_dump_sp_raw_copy( struct ia_css_frame *out_frame) { - assert(out_frame != NULL); + assert(out_frame); if (pg_inst.do_init) { ia_css_debug_pipe_graph_dump_prologue(); pg_inst.do_init = false; } - dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, " - "label=\"%s\\n%s\"]; \"%s(pipe%d)\"", + dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\"]; \"%s(pipe%d)\"", "sp-binary", "sp_raw_copy", "sp_raw_copy", 1); snprintf(ring_buffer, sizeof(ring_buffer), - "node [shape = box, " - "fixedsize=true, width=2, height=0.7]; \"%p\" " - "[label = \"%s\\n%d(%d) x %d\\nRingbuffer\"];", + "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d\\nRingbuffer\"];", out_frame, debug_frame_format2str(out_frame->info.format), out_frame->info.res.width, @@ -3019,8 +2997,7 @@ ia_css_debug_pipe_graph_dump_sp_raw_copy( dtrace_dot(ring_buffer); dtrace_dot( - "\"%s(pipe%d)\"->\"%p\" " - "[label = out_frame];", + "\"%s(pipe%d)\"->\"%p\" [label = out_frame];", "sp_raw_copy", 1, out_frame); snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), "%s(pipe%d)", "sp_raw_copy", 1); @@ -3304,21 +3281,21 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) #endif { #if defined(HAS_TRACER_V2) - uint32_t start_addr; - uint32_t start_addr_data; - uint32_t item_size; + u32 start_addr; + u32 start_addr_data; + u32 item_size; #ifndef ISP2401 - uint32_t tmp; + u32 tmp; #else - uint8_t tid_val; + u8 tid_val; enum TRACE_DUMP_FORMAT dump_format; #endif int i, j, max_trace_points, point_num, limit = -1; /* using a static buffer here as the driver has issues allocating memory */ - static uint32_t trace_read_buf[TRACE_BUFF_SIZE] = {0}; + static u32 trace_read_buf[TRACE_BUFF_SIZE] = {0}; #ifdef ISP2401 static struct trace_header_t header; - uint8_t *header_arr; + u8 *header_arr; #endif /* read the header and parse it */ @@ -3402,8 +3379,8 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) return; } /* no overrun: start from 0 */ - if ((limit == point_num-1) || /* first 0 is at the end - border case */ - (trace_read_buf[limit+1] == 0)) /* did not make a full cycle after the memset */ + if ((limit == point_num - 1) || /* first 0 is at the end - border case */ + (trace_read_buf[limit + 1] == 0)) /* did not make a full cycle after the memset */ limit = 0; /* overrun: limit is the first non-zero after the first zero */ else @@ -3571,7 +3548,6 @@ void ia_css_debug_tagger_state(void) ia_css_debug_dtrace(2, "\t tagger frame[%d]: exp_id=%d, marked=%d, locked=%d\n", i, tbuf_frames[i].exp_id, tbuf_frames[i].mark, tbuf_frames[i].lock); } - } #endif /* defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) */ @@ -3581,6 +3557,7 @@ void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps) unsigned int pc; unsigned int i; hrt_data sc = sp_ctrl_load(id, SP_SC_REG); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d Status reg: 0x%X\n", id, sc); sc = sp_ctrl_load(id, SP_CTRL_SINK_REG); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d Stall reg: 0x%X\n", id, sc); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h index ab1d9bed9fd88..295b2960320c6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h @@ -35,12 +35,12 @@ more details. #include "sw_event_global.h" /*event macros.TODO : Change File Name..???*/ bool ia_css_event_encode( - uint8_t *in, - uint8_t nr, + u8 *in, + u8 nr, uint32_t *out); void ia_css_event_decode( - uint32_t event, + u32 event, uint8_t *payload); #endif /*_IA_CSS_EVENT_H*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c index 239c06730bf4f..5902d550350bd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c @@ -57,15 +57,16 @@ more details. * Refer to "sw_event_public.h" for details. */ bool ia_css_event_encode( - uint8_t *in, - uint8_t nr, + u8 *in, + u8 nr, uint32_t *out) { bool ret; - uint32_t nr_of_bits; - uint32_t i; - assert(in != NULL); - assert(out != NULL); + u32 nr_of_bits; + u32 i; + + assert(in); + assert(out); OP___assert(nr > 0 && nr <= MAX_NR_OF_PAYLOADS_PER_SW_EVENT); /* initialize the output */ @@ -87,7 +88,7 @@ bool ia_css_event_encode( } void ia_css_event_decode( - uint32_t event, + u32 event, uint8_t *payload) { assert(payload[1] == 0); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h index 67eb8fdb33c51..62aaf0e3d7721 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h @@ -62,8 +62,8 @@ int ia_css_eventq_recv( */ int ia_css_eventq_send( ia_css_queue_t *eventq_handle, - uint8_t evt_id, - uint8_t evt_payload_0, - uint8_t evt_payload_1, + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, uint8_t evt_payload_2); #endif /* _IA_CSS_EVENTQ_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c index 913a4bf7a34fc..b49039b05c69a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c @@ -25,7 +25,7 @@ int ia_css_eventq_recv( ia_css_queue_t *eventq_handle, uint8_t *payload) { - uint32_t sp_event; + u32 sp_event; int error; /* dequeue the IRQ event */ @@ -43,13 +43,13 @@ int ia_css_eventq_recv( */ int ia_css_eventq_send( ia_css_queue_t *eventq_handle, - uint8_t evt_id, - uint8_t evt_payload_0, - uint8_t evt_payload_1, + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, uint8_t evt_payload_2) { - uint8_t tmp[4]; - uint32_t sw_event; + u8 tmp[4]; + u32 sw_event; int error = ENOSYS; /* @@ -65,7 +65,7 @@ int ia_css_eventq_send( /* queue the software event (busy-waiting) */ for ( ; ; ) { error = ia_css_queue_enqueue(eventq_handle, sw_event); - if (ENOBUFS != error) { + if (error != ENOBUFS) { /* We were able to successfully send the event or had a real failure. return the status*/ break; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h index a469e0afb2b5b..5f995efae39d1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h @@ -78,8 +78,8 @@ struct ia_css_frame_sp_plane6 { }; struct ia_css_sp_resolution { - uint16_t width; /* width of valid data in pixels */ - uint16_t height; /* Height of valid data in lines */ + u16 width; /* width of valid data in pixels */ + u16 height; /* Height of valid data in lines */ }; /* @@ -87,7 +87,7 @@ struct ia_css_sp_resolution { */ struct ia_css_frame_sp_info { struct ia_css_sp_resolution res; - uint16_t padded_width; /* stride of line in memory + u16 padded_width; /* stride of line in memory (in pixels) */ unsigned char format; /* format of the frame data */ unsigned char raw_bit_depth; /* number of valid bits per pixel, @@ -129,4 +129,3 @@ void ia_css_resolution_to_sp_resolution( const struct ia_css_resolution *info); #endif /*__IA_CSS_FRAME_COMM_H__*/ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c index 5a7df5ab4e3e3..05740a3a54099 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c @@ -36,7 +36,6 @@ more details. #include "sh_css_internal.h" #include "memory_access.h" - #define NV12_TILEY_TILE_WIDTH 128 #define NV12_TILEY_TILE_HEIGHT 32 @@ -112,7 +111,7 @@ ia_css_elems_bytes_from_info( void ia_css_frame_zero(struct ia_css_frame *frame) { - assert(frame != NULL); + assert(frame); mmgr_clear(frame->data, frame->data_bytes); } @@ -120,7 +119,8 @@ enum ia_css_err ia_css_frame_allocate_from_info(struct ia_css_frame **frame, const struct ia_css_frame_info *info) { enum ia_css_err err = IA_CSS_SUCCESS; - if (frame == NULL || info == NULL) + + if (!frame || !info) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_allocate_from_info() enter:\n"); @@ -142,7 +142,7 @@ enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, { enum ia_css_err err = IA_CSS_SUCCESS; - if (frame == NULL || width == 0 || height == 0) + if (!frame || width == 0 || height == 0) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, @@ -161,7 +161,7 @@ enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_allocate() leave: frame=%p\n", *frame); #else - if ((*frame != NULL) && err == IA_CSS_SUCCESS) + if ((*frame) && err == IA_CSS_SUCCESS) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", *frame, (*frame)->data); else @@ -176,12 +176,13 @@ enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, enum ia_css_err ia_css_frame_map(struct ia_css_frame **frame, const struct ia_css_frame_info *info, const void __user *data, - uint16_t attribute, + u16 attribute, void *context) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_frame *me; - assert(frame != NULL); + + assert(frame); /* Create the frame structure */ err = ia_css_frame_create_from_info(&me, info); @@ -217,12 +218,12 @@ enum ia_css_err ia_css_frame_create_from_info(struct ia_css_frame **frame, { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_frame *me; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_create_from_info() enter:\n"); - if (frame == NULL || info == NULL) { + if (!frame || !info) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_create_from_info() leave:" - " invalid arguments\n"); + "ia_css_frame_create_from_info() leave: invalid arguments\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -233,10 +234,9 @@ enum ia_css_err ia_css_frame_create_from_info(struct ia_css_frame **frame, info->raw_bit_depth, false, false); - if (me == NULL) { + if (!me) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_create_from_info() leave:" - " frame create failed\n"); + "ia_css_frame_create_from_info() leave: frame create failed\n"); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -267,9 +267,10 @@ enum ia_css_err ia_css_frame_set_data(struct ia_css_frame *frame, size_t data_bytes) { enum ia_css_err err = IA_CSS_SUCCESS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_set_data() enter:\n"); - if (frame == NULL) { + if (!frame) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_set_data() leave: NULL frame\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -326,7 +327,8 @@ enum ia_css_err ia_css_frame_allocate_contiguous_from_info( const struct ia_css_frame_info *info) { enum ia_css_err err = IA_CSS_SUCCESS; - assert(frame != NULL); + + assert(frame); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_allocate_contiguous_from_info() enter:\n"); err = ia_css_frame_allocate_contiguous(frame, @@ -344,7 +346,7 @@ void ia_css_frame_free(struct ia_css_frame *frame) { IA_CSS_ENTER_PRIVATE("frame = %p", frame); - if (frame != NULL) { + if (frame) { hmm_free(frame->data); sh_css_free(frame); } @@ -358,7 +360,7 @@ void ia_css_frame_free(struct ia_css_frame *frame) enum ia_css_err ia_css_frame_check_info(const struct ia_css_frame_info *info) { - assert(info != NULL); + assert(info); if (info->res.width == 0 || info->res.height == 0) return IA_CSS_ERR_INVALID_ARGUMENTS; return IA_CSS_SUCCESS; @@ -366,7 +368,7 @@ enum ia_css_err ia_css_frame_check_info(const struct ia_css_frame_info *info) enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame) { - assert(frame != NULL); + assert(frame); switch (frame->info.format) { case IA_CSS_FRAME_FORMAT_MIPI: @@ -482,7 +484,7 @@ void ia_css_frame_info_set_width(struct ia_css_frame_info *info, IA_CSS_ENTER_PRIVATE("info = %p,width = %d, minimum padded width = %d", info, width, min_padded_width); - if (info == NULL) { + if (!info) { IA_CSS_ERROR("NULL input parameter"); IA_CSS_LEAVE_PRIVATE(""); return; @@ -518,7 +520,7 @@ void ia_css_frame_info_set_width(struct ia_css_frame_info *info, void ia_css_frame_info_set_format(struct ia_css_frame_info *info, enum ia_css_frame_format format) { - assert(info != NULL); + assert(info); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_info_set_format() enter:\n"); info->format = format; @@ -532,7 +534,7 @@ void ia_css_frame_info_init(struct ia_css_frame_info *info, { IA_CSS_ENTER_PRIVATE("info = %p, width = %d, height = %d, format = %d, aligned = %d", info, width, height, format, aligned); - if (info == NULL) { + if (!info) { IA_CSS_ERROR("NULL input parameter"); IA_CSS_LEAVE_PRIVATE(""); return; @@ -547,6 +549,7 @@ void ia_css_frame_free_multiple(unsigned int num_frames, struct ia_css_frame **frames_array) { unsigned int i; + for (i = 0; i < num_frames; i++) { if (frames_array[i]) { ia_css_frame_free(frames_array[i]); @@ -566,7 +569,7 @@ enum ia_css_err ia_css_frame_allocate_with_buffer_size( IA_CSS_FRAME_FORMAT_NUM,/* Not valid format yet */ 0, 0, contiguous, false); - if (me == NULL) + if (!me) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; /* Get the data size */ @@ -627,11 +630,11 @@ ia_css_dma_configure_from_info( struct dma_port_config *config, const struct ia_css_frame_info *info) { - unsigned is_raw_packed = info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED; - unsigned bits_per_pixel = is_raw_packed ? info->raw_bit_depth : ia_css_elems_bytes_from_info(info)*8; - unsigned pix_per_ddrword = HIVE_ISP_DDR_WORD_BITS / bits_per_pixel; - unsigned words_per_line = CEIL_DIV(info->padded_width, pix_per_ddrword); - unsigned elems_b = pix_per_ddrword; + unsigned int is_raw_packed = info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED; + unsigned int bits_per_pixel = is_raw_packed ? info->raw_bit_depth : ia_css_elems_bytes_from_info(info) * 8; + unsigned int pix_per_ddrword = HIVE_ISP_DDR_WORD_BITS / bits_per_pixel; + unsigned int words_per_line = CEIL_DIV(info->padded_width, pix_per_ddrword); + unsigned int elems_b = pix_per_ddrword; config->stride = HIVE_ISP_DDR_WORD_BYTES * words_per_line; config->elems = (uint8_t)elems_b; @@ -684,7 +687,8 @@ static void frame_init_raw_single_plane( unsigned int bits_per_pixel) { unsigned int stride; - assert(frame != NULL); + + assert(frame); stride = HIVE_ISP_DDR_WORD_BYTES * CEIL_DIV(subpixels_per_line, @@ -729,7 +733,7 @@ static void frame_init_nv_planes(struct ia_css_frame *frame, uv_width = 2 * (y_width / horizontal_decimation); uv_height = y_height / vertical_decimation; - if (IA_CSS_FRAME_FORMAT_NV12_TILEY == frame->info.format) { + if (frame->info.format == IA_CSS_FRAME_FORMAT_NV12_TILEY) { y_width = CEIL_MUL(y_width, NV12_TILEY_TILE_WIDTH); uv_width = CEIL_MUL(uv_width, NV12_TILEY_TILE_WIDTH); y_height = CEIL_MUL(y_height, NV12_TILEY_TILE_HEIGHT); @@ -854,7 +858,7 @@ static enum ia_css_err frame_allocate_with_data(struct ia_css_frame **frame, contiguous, true); - if (me == NULL) + if (!me) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; err = ia_css_frame_init_planes(me); @@ -886,7 +890,7 @@ static struct ia_css_frame *frame_create(unsigned int width, { struct ia_css_frame *me = sh_css_malloc(sizeof(*me)); - if (me == NULL) + if (!me) return NULL; memset(me, 0, sizeof(*me)); @@ -926,7 +930,7 @@ ia_css_elems_bytes_from_info(const struct ia_css_frame_info *info) if (info->format == IA_CSS_FRAME_FORMAT_RAW || (info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED)) { if (info->raw_bit_depth) - return CEIL_DIV(info->raw_bit_depth,8); + return CEIL_DIV(info->raw_bit_depth, 8); else return 2; /* bytes per pixel */ } @@ -957,6 +961,7 @@ void ia_css_resolution_to_sp_resolution( to->width = (uint16_t)from->width; to->height = (uint16_t)from->height; } + #ifdef ISP2401 enum ia_css_err @@ -964,10 +969,10 @@ ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, const struct ia_css_resolution *out_res, struct ia_css_resolution *crop_res) { - uint32_t wd_even_ceil, ht_even_ceil; - uint32_t in_ratio, out_ratio; + u32 wd_even_ceil, ht_even_ceil; + u32 in_ratio, out_ratio; - if ((in_res == NULL) || (out_res == NULL) || (crop_res == NULL)) + if ((!in_res) || (!out_res) || (!crop_res)) return IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_ENTER_PRIVATE("in(%ux%u) -> out(%ux%u)", in_res->width, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c index 1bed027435fd0..bccbddd35d28d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c @@ -68,9 +68,9 @@ static void ifmtr_set_if_blocking_mode( unsigned int ia_css_ifmtr_lines_needed_for_bayer_order( const struct ia_css_stream_config *config) { - assert(config != NULL); - if ((IA_CSS_BAYER_ORDER_BGGR == config->input_config.bayer_order) - || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + assert(config); + if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_BGGR) + || (config->input_config.bayer_order == IA_CSS_BAYER_ORDER_GBRG)) return 1; return 0; @@ -79,9 +79,9 @@ unsigned int ia_css_ifmtr_lines_needed_for_bayer_order( unsigned int ia_css_ifmtr_columns_needed_for_bayer_order( const struct ia_css_stream_config *config) { - assert(config != NULL); - if ((IA_CSS_BAYER_ORDER_RGGB == config->input_config.bayer_order) - || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + assert(config); + if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_RGGB) + || (config->input_config.bayer_order == IA_CSS_BAYER_ORDER_GBRG)) return 1; return 0; @@ -114,7 +114,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, input_formatter_cfg_t if_a_config, if_b_config; enum atomisp_input_format input_format; enum ia_css_err err = IA_CSS_SUCCESS; - uint8_t if_config_index; + u8 if_config_index; /* Determine which input formatter config set is targeted. */ /* Index is equal to the CSI-2 port used. */ @@ -141,7 +141,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, if (config->mode == IA_CSS_INPUT_MODE_SENSOR || config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { port = config->source.port.port; - if_config_index = (uint8_t) (port - MIPI_PORT0_ID); + if_config_index = (uint8_t)(port - MIPI_PORT0_ID); } else if (config->mode == IA_CSS_INPUT_MODE_MEMORY) { if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; } else { @@ -170,8 +170,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, else left_padding = binary->left_padding; else - left_padding = 2*ISP_VEC_NELEMS - config->left_padding; - + left_padding = 2 * ISP_VEC_NELEMS - config->left_padding; if (left_padding) { num_vectors = CEIL_DIV(cropped_width + left_padding, @@ -300,6 +299,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, case ATOMISP_INPUT_FORMAT_RAW_12: if (two_ppc) { int crop_col = (start_column % 2) == 1; + vmem_increment = 2; deinterleaving = 1; width_a = width_b = cropped_width / 2; @@ -455,7 +455,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, if_b_config.block_no_reqs = (config->mode != IA_CSS_INPUT_MODE_SENSOR); - if (SH_CSS_IF_CONFIG_NOT_NEEDED != if_config_index) { + if (if_config_index != SH_CSS_IF_CONFIG_NOT_NEEDED) { assert(if_config_index <= SH_CSS_MAX_IF_CONFIGS); ifmtr_set_if_blocking_mode(&if_a_config, &if_b_config); @@ -464,7 +464,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, if_config_index); } } else { - if (SH_CSS_IF_CONFIG_NOT_NEEDED != if_config_index) { + if (if_config_index != SH_CSS_IF_CONFIG_NOT_NEEDED) { assert(if_config_index <= SH_CSS_MAX_IF_CONFIGS); ifmtr_set_if_blocking_mode(&if_a_config, NULL); @@ -488,6 +488,7 @@ static void ifmtr_set_if_blocking_mode( { int i; bool block[] = { false, false, false, false }; + assert(N_INPUT_FORMATTER_ID <= (ARRAY_SIZE(block))); #if !defined(IS_ISP_2400_SYSTEM) @@ -495,7 +496,7 @@ static void ifmtr_set_if_blocking_mode( #endif block[INPUT_FORMATTER0_ID] = (bool)config_a->block_no_reqs; - if (NULL != config_b) + if (config_b) block[INPUT_FORMATTER1_ID] = (bool)config_b->block_no_reqs; /* TODO: next could cause issues when streams are started after @@ -504,7 +505,8 @@ static void ifmtr_set_if_blocking_mode( if (ifmtr_set_if_blocking_mode_reset) { ifmtr_set_if_blocking_mode_reset = false; for (i = 0; i < N_INPUT_FORMATTER_ID; i++) { - input_formatter_ID_t id = (input_formatter_ID_t) i; + input_formatter_ID_t id = (input_formatter_ID_t)i; + input_formatter_rst(id); input_formatter_set_fifo_blocking_mode(id, block[id]); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c index 24ca4aaf8df14..029db01a94411 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c @@ -81,6 +81,7 @@ enum inputfifo_mipi_data_type { inputfifo_mipi_data_type_yuv420_legacy, inputfifo_mipi_data_type_rgb, }; + #if !defined(HAS_NO_INPUT_SYSTEM) static unsigned int inputfifo_curr_ch_id, inputfifo_curr_fmt_type; #endif @@ -94,6 +95,7 @@ struct inputfifo_instance { unsigned int fmt_type; enum inputfifo_mipi_data_type type; }; + #if !defined(HAS_NO_INPUT_SYSTEM) /* * Maintain a basic streaming to Mipi administration with ch_id as index @@ -104,9 +106,9 @@ static struct inputfifo_instance inputfifo_inst_admin[INPUTFIFO_NR_OF_S2M_CHANNELS]; /* Streaming to MIPI */ -static unsigned inputfifo_wrap_marker( +static unsigned int inputfifo_wrap_marker( /* static inline unsigned inputfifo_wrap_marker( */ - unsigned marker) + unsigned int marker) { return marker | (inputfifo_curr_ch_id << HIVE_STR_TO_MIPI_CH_ID_LSB) | @@ -114,7 +116,7 @@ static unsigned inputfifo_wrap_marker( } static inline void -_sh_css_fifo_snd(unsigned token) +_sh_css_fifo_snd(unsigned int token) { while (!can_event_send_token(STR2MIPI_EVENT_ID)) hrt_sleep(); @@ -132,8 +134,6 @@ unsigned int data) return; } - - static void inputfifo_send_data_b( /* static inline void inputfifo_send_data_b( */ unsigned int data) @@ -144,8 +144,6 @@ static void inputfifo_send_data_b( return; } - - static void inputfifo_send_data( /* static inline void inputfifo_send_data( */ unsigned int a, @@ -159,8 +157,6 @@ static void inputfifo_send_data( return; } - - static void inputfifo_send_sol(void) /* static inline void inputfifo_send_sol(void) */ { @@ -171,8 +167,6 @@ static void inputfifo_send_sol(void) return; } - - static void inputfifo_send_eol(void) /* static inline void inputfifo_send_eol(void) */ { @@ -182,8 +176,6 @@ static void inputfifo_send_eol(void) return; } - - static void inputfifo_send_sof(void) /* static inline void inputfifo_send_sof(void) */ { @@ -194,8 +186,6 @@ static void inputfifo_send_sof(void) return; } - - static void inputfifo_send_eof(void) /* static inline void inputfifo_send_eof(void) */ { @@ -205,14 +195,13 @@ static void inputfifo_send_eof(void) return; } - - #ifdef __ON__ static void inputfifo_send_ch_id( /* static inline void inputfifo_send_ch_id( */ unsigned int ch_id) { hrt_data token; + inputfifo_curr_ch_id = ch_id & _HIVE_ISP_CH_ID_MASK; /* we send an zero marker, this will wrap the ch_id and * fmt_type automatically. @@ -227,6 +216,7 @@ static void inputfifo_send_fmt_type( unsigned int fmt_type) { hrt_data token; + inputfifo_curr_fmt_type = fmt_type & _HIVE_ISP_FMT_TYPE_MASK; /* we send an zero marker, this will wrap the ch_id and * fmt_type automatically. @@ -237,8 +227,6 @@ static void inputfifo_send_fmt_type( } #endif /* __ON__ */ - - static void inputfifo_send_ch_id_and_fmt_type( /* static inline void inputfifo_send_ch_id_and_fmt_type( */ @@ -246,6 +234,7 @@ void inputfifo_send_ch_id_and_fmt_type( */ unsigned int fmt_type) { hrt_data token; + inputfifo_curr_ch_id = ch_id & _HIVE_ISP_CH_ID_MASK; inputfifo_curr_fmt_type = fmt_type & _HIVE_ISP_FMT_TYPE_MASK; /* we send an zero marker, this will wrap the ch_id and @@ -256,18 +245,15 @@ void inputfifo_send_ch_id_and_fmt_type( */ return; } - - static void inputfifo_send_empty_token(void) /* static inline void inputfifo_send_empty_token(void) */ { hrt_data token = inputfifo_wrap_marker(0); + _sh_css_fifo_snd(token); return; } - - static void inputfifo_start_frame( /* static inline void inputfifo_start_frame( */ unsigned int ch_id, @@ -278,20 +264,17 @@ static void inputfifo_start_frame( return; } - - static void inputfifo_end_frame( unsigned int marker_cycles) { unsigned int i; + for (i = 0; i < marker_cycles; i++) inputfifo_send_empty_token(); inputfifo_send_eof(); return; } - - static void inputfifo_send_line2( const unsigned short *data, unsigned int width, @@ -304,8 +287,8 @@ static void inputfifo_send_line2( { unsigned int i, is_rgb = 0, is_legacy = 0; - assert(data != NULL); - assert((data2 != NULL) || (width2 == 0)); + assert(data); + assert((data2) || (width2 == 0)); if (type == inputfifo_mipi_data_type_rgb) is_rgb = 1; @@ -323,6 +306,7 @@ static void inputfifo_send_line2( * we only send 1 pixel, to data[0]. */ unsigned int send_two_pixels = two_ppc; + if ((is_rgb || is_legacy) && (i % 3 == 2)) send_two_pixels = 0; if (send_two_pixels) { @@ -352,6 +336,7 @@ static void inputfifo_send_line2( * we only send 1 pixel, to data2[0]. */ unsigned int send_two_pixels = two_ppc; + if ((is_rgb || is_legacy) && (i % 3 == 2)) send_two_pixels = 0; if (send_two_pixels) { @@ -380,8 +365,6 @@ static void inputfifo_send_line2( return; } - - static void inputfifo_send_line(const unsigned short *data, unsigned int width, @@ -390,7 +373,7 @@ inputfifo_send_line(const unsigned short *data, unsigned int two_ppc, enum inputfifo_mipi_data_type type) { - assert(data != NULL); + assert(data); inputfifo_send_line2(data, width, NULL, 0, hblank_cycles, marker_cycles, @@ -398,7 +381,6 @@ inputfifo_send_line(const unsigned short *data, type); } - /* Send a frame of data into the input network via the GP FIFO. * Parameters: * - data: array of 16 bit values that contains all data for the frame. @@ -440,7 +422,7 @@ static void inputfifo_send_frame( { unsigned int i; - assert(data != NULL); + assert(data); inputfifo_start_frame(ch_id, fmt_type); for (i = 0; i < height; i++) { @@ -463,8 +445,6 @@ static void inputfifo_send_frame( return; } - - static enum inputfifo_mipi_data_type inputfifo_determine_type( enum atomisp_input_format input_format) { @@ -487,8 +467,6 @@ static enum inputfifo_mipi_data_type inputfifo_determine_type( return type; } - - static struct inputfifo_instance *inputfifo_get_inst( unsigned int ch_id) { @@ -506,7 +484,7 @@ void ia_css_inputfifo_send_input_frame( unsigned int fmt_type, hblank_cycles, marker_cycles; enum inputfifo_mipi_data_type type; - assert(data != NULL); + assert(data); hblank_cycles = HBLANK_CYCLES; marker_cycles = MARKER_CYCLES; ia_css_isys_convert_stream_format_to_mipi_format(input_format, @@ -520,14 +498,13 @@ void ia_css_inputfifo_send_input_frame( two_ppc, type); } - - void ia_css_inputfifo_start_frame( unsigned int ch_id, enum atomisp_input_format input_format, bool two_ppc) { struct inputfifo_instance *s2mi; + s2mi = inputfifo_get_inst(ch_id); s2mi->ch_id = ch_id; @@ -544,8 +521,6 @@ void ia_css_inputfifo_start_frame( return; } - - void ia_css_inputfifo_send_line( unsigned int ch_id, const unsigned short *data, @@ -555,11 +530,10 @@ void ia_css_inputfifo_send_line( { struct inputfifo_instance *s2mi; - assert(data != NULL); - assert((data2 != NULL) || (width2 == 0)); + assert(data); + assert((data2) || (width2 == 0)); s2mi = inputfifo_get_inst(ch_id); - /* Set global variables that indicate channel_id and format_type */ inputfifo_curr_ch_id = (s2mi->ch_id) & _HIVE_ISP_CH_ID_MASK; inputfifo_curr_fmt_type = (s2mi->fmt_type) & _HIVE_ISP_FMT_TYPE_MASK; @@ -571,7 +545,6 @@ void ia_css_inputfifo_send_line( s2mi->type); } - void ia_css_inputfifo_send_embedded_line( unsigned int ch_id, enum atomisp_input_format data_type, @@ -581,7 +554,7 @@ void ia_css_inputfifo_send_embedded_line( struct inputfifo_instance *s2mi; unsigned int fmt_type; - assert(data != NULL); + assert(data); s2mi = inputfifo_get_inst(ch_id); ia_css_isys_convert_stream_format_to_mipi_format(data_type, MIPI_PREDICTOR_NONE, &fmt_type); @@ -593,11 +566,11 @@ void ia_css_inputfifo_send_embedded_line( s2mi->two_ppc, inputfifo_mipi_data_type_regular); } - void ia_css_inputfifo_end_frame( unsigned int ch_id) { struct inputfifo_instance *s2mi; + s2mi = inputfifo_get_inst(ch_id); /* Set global variables that indicate channel_id and format_type */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h index 285749885105c..15e4b3bff6d33 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h @@ -54,7 +54,7 @@ ia_css_isp_param_set_isp_mem_init( struct ia_css_isp_param_isp_segments *mem_init, enum ia_css_param_class pclass, enum ia_css_isp_memories mem, - uint32_t address, size_t size); + u32 address, size_t size); /* Get functions for parameter memory descriptors */ const struct ia_css_host_data* diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h index 9d111793bb65b..ee933302bbb83 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h @@ -51,15 +51,15 @@ enum ia_css_param_class { IA_CSS_PARAM_CLASS_FRAME = 3, /* Frame time parameters, like output buffer */ #endif }; + #define IA_CSS_NUM_PARAM_CLASSES (IA_CSS_PARAM_CLASS_STATE + 1) /* ISP parameter descriptor */ struct ia_css_isp_parameter { - uint32_t offset; /* Offset in isp_)parameters, etc. */ - uint32_t size; /* Disabled if 0 */ + u32 offset; /* Offset in isp_)parameters, etc. */ + u32 size; /* Disabled if 0 */ }; - /* Address/size of each parameter class in each isp memory, host memory pointers */ struct ia_css_isp_param_host_segments { struct ia_css_host_data params[IA_CSS_NUM_PARAM_CLASSES][IA_CSS_NUM_MEMORIES]; @@ -77,7 +77,7 @@ struct ia_css_isp_param_isp_segments { /* Memory offsets in binary info */ struct ia_css_isp_param_memory_offsets { - uint32_t offsets[IA_CSS_NUM_PARAM_CLASSES]; /** offset wrt hdr in bytes */ + u32 offsets[IA_CSS_NUM_PARAM_CLASSES]; /** offset wrt hdr in bytes */ }; /* Offsets for ISP kernel parameters per isp memory. @@ -95,4 +95,3 @@ union ia_css_all_memory_offsets { }; #endif /* _IA_CSS_ISP_PARAM_TYPES_H_ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c index f793ce125f02a..a0b4387582980 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c @@ -61,7 +61,7 @@ ia_css_isp_param_set_isp_mem_init( struct ia_css_isp_param_isp_segments *mem_init, enum ia_css_param_class pclass, enum ia_css_isp_memories mem, - uint32_t address, size_t size) + u32 address, size_t size) { mem_init->params[pclass][mem].address = address; mem_init->params[pclass][mem].size = (uint32_t)size; @@ -101,7 +101,8 @@ ia_css_init_memory_interface( const struct ia_css_isp_param_host_segments *mem_params, const struct ia_css_isp_param_css_segments *css_params) { - unsigned pclass, mem; + unsigned int pclass, mem; + for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { memset(isp_mem_if->params[pclass], 0, sizeof(isp_mem_if->params[pclass])); for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { @@ -121,12 +122,13 @@ ia_css_isp_param_allocate_isp_parameters( const struct ia_css_isp_param_isp_segments *mem_initializers) { enum ia_css_err err = IA_CSS_SUCCESS; - unsigned mem, pclass; + unsigned int mem, pclass; pclass = IA_CSS_PARAM_CLASS_PARAM; for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { - uint32_t size = 0; + u32 size = 0; + if (mem_initializers) size = mem_initializers->params[pclass][mem].size; mem_params->params[pclass][mem].size = size; @@ -160,7 +162,7 @@ ia_css_isp_param_destroy_isp_parameters( struct ia_css_isp_param_host_segments *mem_params, struct ia_css_isp_param_css_segments *css_params) { - unsigned mem, pclass; + unsigned int mem, pclass; for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { @@ -181,7 +183,8 @@ ia_css_isp_param_load_fw_params( const struct ia_css_isp_param_memory_offsets *memory_offsets, bool init) { - unsigned pclass; + unsigned int pclass; + for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { mem_offsets->array[pclass].ptr = NULL; if (init) @@ -195,12 +198,13 @@ ia_css_isp_param_copy_isp_mem_if_to_ddr( const struct ia_css_isp_param_host_segments *host, enum ia_css_param_class pclass) { - unsigned mem; + unsigned int mem; for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { size_t size = host->params[pclass][mem].size; hrt_vaddress ddr_mem_ptr = ddr->params[pclass][mem].address; char *host_mem_ptr = host->params[pclass][mem].address; + if (size != ddr->params[pclass][mem].size) return IA_CSS_ERR_INTERNAL_ERROR; if (!size) @@ -223,5 +227,3 @@ ia_css_isp_param_enable_pipeline( *(uint32_t *)&mem_params->params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM0].address[dmem_offset] = 0x0; } - - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h index 8c005db9766e2..9207a48856dff 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h @@ -132,66 +132,65 @@ enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( /** * Virtual Input System. (Input System 2401) */ -extern ia_css_isys_error_t ia_css_isys_stream_create( +ia_css_isys_error_t ia_css_isys_stream_create( ia_css_isys_descr_t *isys_stream_descr, ia_css_isys_stream_h isys_stream, uint32_t isys_stream_id); -extern void ia_css_isys_stream_destroy( +void ia_css_isys_stream_destroy( ia_css_isys_stream_h isys_stream); -extern ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( +ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( ia_css_isys_stream_h isys_stream, ia_css_isys_descr_t *isys_stream_descr, ia_css_isys_stream_cfg_t *isys_stream_cfg); -extern void ia_css_isys_csi_rx_lut_rmgr_init(void); +void ia_css_isys_csi_rx_lut_rmgr_init(void); -extern void ia_css_isys_csi_rx_lut_rmgr_uninit(void); +void ia_css_isys_csi_rx_lut_rmgr_uninit(void); -extern bool ia_css_isys_csi_rx_lut_rmgr_acquire( +bool ia_css_isys_csi_rx_lut_rmgr_acquire( csi_rx_backend_ID_t backend, csi_mipi_packet_type_t packet_type, csi_rx_backend_lut_entry_t *entry); -extern void ia_css_isys_csi_rx_lut_rmgr_release( +void ia_css_isys_csi_rx_lut_rmgr_release( csi_rx_backend_ID_t backend, csi_mipi_packet_type_t packet_type, csi_rx_backend_lut_entry_t *entry); +void ia_css_isys_ibuf_rmgr_init(void); -extern void ia_css_isys_ibuf_rmgr_init(void); +void ia_css_isys_ibuf_rmgr_uninit(void); -extern void ia_css_isys_ibuf_rmgr_uninit(void); - -extern bool ia_css_isys_ibuf_rmgr_acquire( - uint32_t size, +bool ia_css_isys_ibuf_rmgr_acquire( + u32 size, uint32_t *start_addr); -extern void ia_css_isys_ibuf_rmgr_release( +void ia_css_isys_ibuf_rmgr_release( uint32_t *start_addr); -extern void ia_css_isys_dma_channel_rmgr_init(void); +void ia_css_isys_dma_channel_rmgr_init(void); -extern void ia_css_isys_dma_channel_rmgr_uninit(void); +void ia_css_isys_dma_channel_rmgr_uninit(void); -extern bool ia_css_isys_dma_channel_rmgr_acquire( +bool ia_css_isys_dma_channel_rmgr_acquire( isys2401_dma_ID_t dma_id, isys2401_dma_channel *channel); -extern void ia_css_isys_dma_channel_rmgr_release( +void ia_css_isys_dma_channel_rmgr_release( isys2401_dma_ID_t dma_id, isys2401_dma_channel *channel); -extern void ia_css_isys_stream2mmio_sid_rmgr_init(void); +void ia_css_isys_stream2mmio_sid_rmgr_init(void); -extern void ia_css_isys_stream2mmio_sid_rmgr_uninit(void); +void ia_css_isys_stream2mmio_sid_rmgr_uninit(void); -extern bool ia_css_isys_stream2mmio_sid_rmgr_acquire( +bool ia_css_isys_stream2mmio_sid_rmgr_acquire( stream2mmio_ID_t stream2mmio, stream2mmio_sid_ID_t *sid); -extern void ia_css_isys_stream2mmio_sid_rmgr_release( +void ia_css_isys_stream2mmio_sid_rmgr_release( stream2mmio_ID_t stream2mmio, stream2mmio_sid_ID_t *sid); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h index 0c3434ad06139..71d1b66e954bd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h @@ -59,7 +59,7 @@ typedef virtual_input_system_stream_cfg_t ia_css_isys_stream_cfg_t; typedef bool ia_css_isys_error_t; static inline uint32_t ia_css_isys_generate_stream_id( - uint32_t sp_thread_id, + u32 sp_thread_id, uint32_t stream_id) { return sp_thread_id * IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH + stream_id; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c index a914ce5532ec9..f15c805a51930 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c @@ -60,16 +60,16 @@ bool ia_css_isys_csi_rx_lut_rmgr_acquire( csi_rx_backend_lut_entry_t *entry) { bool retval = false; - uint32_t max_num_packets_of_type; - uint32_t num_active_of_type; + u32 max_num_packets_of_type; + u32 num_active_of_type; isys_csi_rx_rsrc_t *cur_rsrc = NULL; - uint16_t i; + u16 i; assert(backend < N_CSI_RX_BACKEND_ID); assert((packet_type == CSI_MIPI_PACKET_TYPE_LONG) || (packet_type == CSI_MIPI_PACKET_TYPE_SHORT)); - assert(entry != NULL); + assert(entry); - if ((backend < N_CSI_RX_BACKEND_ID) && (entry != NULL)) { + if ((backend < N_CSI_RX_BACKEND_ID) && (entry)) { cur_rsrc = &isys_csi_rx_rsrc[backend]; if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { max_num_packets_of_type = N_LONG_PACKET_LUT_ENTRIES[backend]; @@ -108,15 +108,15 @@ void ia_css_isys_csi_rx_lut_rmgr_release( csi_mipi_packet_type_t packet_type, csi_rx_backend_lut_entry_t *entry) { - uint32_t max_num_packets; + u32 max_num_packets; isys_csi_rx_rsrc_t *cur_rsrc = NULL; - uint32_t packet_entry = 0; + u32 packet_entry = 0; assert(backend < N_CSI_RX_BACKEND_ID); - assert(entry != NULL); + assert(entry); assert((packet_type >= CSI_MIPI_PACKET_TYPE_LONG) || (packet_type <= CSI_MIPI_PACKET_TYPE_SHORT)); - if ((backend < N_CSI_RX_BACKEND_ID) && (entry != NULL)) { + if ((backend < N_CSI_RX_BACKEND_ID) && (entry)) { if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { max_num_packets = N_LONG_PACKET_LUT_ENTRIES[backend]; packet_entry = entry->long_packet_entry; @@ -149,6 +149,7 @@ enum ia_css_err ia_css_isys_csi_rx_register_stream( if ((port < N_INPUT_SYSTEM_CSI_PORT) && (isys_stream_id < SH_CSS_MAX_ISYS_CHANNEL_NODES)) { struct sh_css_sp_pipeline_io_status *pipe_io_status; + pipe_io_status = ia_css_pipeline_get_pipe_io_status(); if (bitop_getbit(pipe_io_status->active[port], isys_stream_id) == 0) { bitop_setbit(pipe_io_status->active[port], isys_stream_id); @@ -168,6 +169,7 @@ enum ia_css_err ia_css_isys_csi_rx_unregister_stream( if ((port < N_INPUT_SYSTEM_CSI_PORT) && (isys_stream_id < SH_CSS_MAX_ISYS_CHANNEL_NODES)) { struct sh_css_sp_pipeline_io_status *pipe_io_status; + pipe_io_status = ia_css_pipeline_get_pipe_io_status(); if (bitop_getbit(pipe_io_status->active[port], isys_stream_id) == 1) { bitop_clearbit(pipe_io_status->active[port], isys_stream_id); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h index c27b0ab83c938..c9a75d8e74387 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h @@ -33,11 +33,10 @@ more details. typedef struct isys_csi_rx_rsrc_s isys_csi_rx_rsrc_t; struct isys_csi_rx_rsrc_s { - uint32_t active_table; - uint32_t num_active; - uint16_t num_long_packets; - uint16_t num_short_packets; + u32 active_table; + u32 num_active; + u16 num_long_packets; + u16 num_short_packets; }; #endif /* __CSI_RX_RMGR_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c index d8c3b75d7faca..faa14ed630808 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c @@ -61,16 +61,16 @@ void ia_css_isys_ibuf_rmgr_uninit(void) } bool ia_css_isys_ibuf_rmgr_acquire( - uint32_t size, + u32 size, uint32_t *start_addr) { bool retval = false; bool input_buffer_found = false; - uint32_t aligned_size; + u32 aligned_size; ibuf_handle_t *handle = NULL; - uint16_t i; + u16 i; - assert(start_addr != NULL); + assert(start_addr); assert(size > 0); aligned_size = (size + (IBUF_ALIGN - 1)) & ~(IBUF_ALIGN - 1); @@ -123,10 +123,10 @@ bool ia_css_isys_ibuf_rmgr_acquire( void ia_css_isys_ibuf_rmgr_release( uint32_t *start_addr) { - uint16_t i; + u16 i; ibuf_handle_t *handle = NULL; - assert(start_addr != NULL); + assert(start_addr); for (i = 0; i < ibuf_rsrc.num_allocated; i++) { handle = getHandle(i); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h index 424cfe9f3b2a2..a04034a8763c4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h @@ -37,19 +37,18 @@ more details. typedef struct ibuf_handle_s ibuf_handle_t; struct ibuf_handle_s { - uint32_t start_addr; - uint32_t size; + u32 start_addr; + u32 size; bool active; }; typedef struct ibuf_rsrc_s ibuf_rsrc_t; struct ibuf_rsrc_s { - uint32_t free_start_addr; - uint32_t free_size; - uint16_t num_active; - uint16_t num_allocated; + u32 free_start_addr; + u32 free_size; + u16 num_active; + u16 num_allocated; ibuf_handle_t handles[MAX_IBUF_HANDLES]; }; #endif /* __IBUF_CTRL_RMGR_H_INCLUDED */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c index 4def4a542b7db..425b317699f39 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c @@ -60,7 +60,7 @@ bool ia_css_isys_dma_channel_rmgr_acquire( isys_dma_rsrc_t *cur_rsrc = NULL; assert(dma_id < N_ISYS2401_DMA_ID); - assert(channel != NULL); + assert(channel); max_dma_channel = N_ISYS2401_DMA_CHANNEL_PROCS[dma_id]; cur_rsrc = &isys_dma_rsrc[dma_id]; @@ -88,7 +88,7 @@ void ia_css_isys_dma_channel_rmgr_release( isys_dma_rsrc_t *cur_rsrc = NULL; assert(dma_id < N_ISYS2401_DMA_ID); - assert(channel != NULL); + assert(channel); max_dma_channel = N_ISYS2401_DMA_CHANNEL_PROCS[dma_id]; cur_rsrc = &isys_dma_rsrc[dma_id]; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h index b2c286537774f..08913240d7270 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h @@ -33,9 +33,8 @@ more details. typedef struct isys_dma_rsrc_s isys_dma_rsrc_t; struct isys_dma_rsrc_s { - uint32_t active_table; - uint16_t num_active; + u32 active_table; + u16 num_active; }; #endif /* __ISYS_DMA_RMGR_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c index 2ae5e59d5e31f..0397f79edfef5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c @@ -46,8 +46,8 @@ input_system_error_t ia_css_isys_init(void) backend_channel_cfg_t backend_ch1; target_cfg2400_t targetB; target_cfg2400_t targetC; - uint32_t acq_mem_region_size = 24; - uint32_t acq_nof_mem_regions = 2; + u32 acq_mem_region_size = 24; + u32 acq_nof_mem_regions = 2; input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR; memset(&backend_ch0, 0, sizeof(backend_channel_cfg_t)); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c index 222b294c0ab00..3c2345f1156e4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c @@ -60,9 +60,9 @@ bool ia_css_isys_stream2mmio_sid_rmgr_acquire( stream2mmio_sid_ID_t i; assert(stream2mmio < N_STREAM2MMIO_ID); - assert(sid != NULL); + assert(sid); - if ((stream2mmio < N_STREAM2MMIO_ID) && (sid != NULL)) { + if ((stream2mmio < N_STREAM2MMIO_ID) && (sid)) { max_sid = N_STREAM2MMIO_SID_PROCS[stream2mmio]; cur_rsrc = &isys_stream2mmio_rsrc[stream2mmio]; @@ -89,9 +89,9 @@ void ia_css_isys_stream2mmio_sid_rmgr_release( isys_stream2mmio_rsrc_t *cur_rsrc = NULL; assert(stream2mmio < N_STREAM2MMIO_ID); - assert(sid != NULL); + assert(sid); - if ((stream2mmio < N_STREAM2MMIO_ID) && (sid != NULL)) { + if ((stream2mmio < N_STREAM2MMIO_ID) && (sid)) { max_sid = N_STREAM2MMIO_SID_PROCS[stream2mmio]; cur_rsrc = &isys_stream2mmio_rsrc[stream2mmio]; if ((*sid < max_sid) && (cur_rsrc->num_active > 0)) { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h index 4f63005b1071b..6427a999848a9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h @@ -33,9 +33,8 @@ more details. typedef struct isys_stream2mmio_rsrc_s isys_stream2mmio_rsrc_t; struct isys_stream2mmio_rsrc_s { - uint32_t active_table; - uint16_t num_active; + u32 active_table; + u16 num_active; }; #endif /* __ISYS_STREAM2MMIO_RMGR_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c index 425bd3cc3f343..12682d3f907c3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c @@ -111,6 +111,7 @@ void ia_css_rx_port_get_irq_info(enum mipi_port_id api_port, unsigned int *irq_infos) { enum mipi_port_id port = ia_css_isys_port_to_mipi_port(api_port); + ia_css_isys_rx_get_irq_info(port, irq_infos); } @@ -119,7 +120,7 @@ void ia_css_isys_rx_get_irq_info(enum mipi_port_id port, { unsigned int bits; - assert(irq_infos != NULL); + assert(irq_infos); bits = ia_css_isys_rx_get_interrupt_reg(port); *irq_infos = ia_css_isys_rx_translate_irq_infos(bits); } @@ -175,6 +176,7 @@ void ia_css_rx_clear_irq_info(unsigned int irq_infos) void ia_css_rx_port_clear_irq_info(enum mipi_port_id api_port, unsigned int irq_infos) { enum mipi_port_id port = ia_css_isys_port_to_mipi_port(api_port); + ia_css_isys_rx_clear_irq_info(port, irq_infos); } @@ -233,7 +235,7 @@ enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( mipi_predictor_t compression, unsigned int *fmt_type) { - assert(fmt_type != NULL); + assert(fmt_type); /* * Custom (user defined) modes. Used for compressed * MIPI transfers @@ -372,6 +374,7 @@ enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( } return IA_CSS_SUCCESS; } + #if defined(USE_INPUT_SYSTEM_VERSION_2401) static mipi_predictor_t sh_css_csi2_compression_type_2_mipi_predictor(enum ia_css_csi2_compression_type type) { @@ -379,22 +382,24 @@ static mipi_predictor_t sh_css_csi2_compression_type_2_mipi_predictor(enum ia_cs switch (type) { case IA_CSS_CSI2_COMPRESSION_TYPE_1: - predictor = MIPI_PREDICTOR_TYPE1-1; + predictor = MIPI_PREDICTOR_TYPE1 - 1; break; case IA_CSS_CSI2_COMPRESSION_TYPE_2: - predictor = MIPI_PREDICTOR_TYPE2-1; + predictor = MIPI_PREDICTOR_TYPE2 - 1; default: break; } return predictor; } + enum ia_css_err ia_css_isys_convert_compressed_format( struct ia_css_csi2_compression *comp, struct input_system_cfg_s *cfg) { enum ia_css_err err = IA_CSS_SUCCESS; - assert(comp != NULL); - assert(cfg != NULL); + + assert(comp); + assert(cfg); if (comp->type != IA_CSS_CSI2_COMPRESSION_TYPE_NONE) { /* compression register bit slicing @@ -494,13 +499,13 @@ void ia_css_isys_rx_configure(const rx_cfg_t *config, bool any_port_enabled = false; enum mipi_port_id port; - if ((config == NULL) + if ((!config) || (config->mode >= N_RX_MODE) || (config->port >= N_MIPI_PORT_ID)) { assert(0); return; } - for (port = (enum mipi_port_id) 0; port < N_MIPI_PORT_ID; port++) { + for (port = (enum mipi_port_id)0; port < N_MIPI_PORT_ID; port++) { if (is_receiver_port_enabled(RX0_ID, port)) any_port_enabled = true; } @@ -530,7 +535,6 @@ void ia_css_isys_rx_configure(const rx_cfg_t *config, port_enabled[port] = true; if (input_mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { - /* MW: A bit of a hack, straight wiring of the capture * units,assuming they are linearly enumerated. */ input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, @@ -543,7 +547,7 @@ void ia_css_isys_rx_configure(const rx_cfg_t *config, input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, GPREGS_UNIT0_ID, HIVE_ISYS_GPREG_MUX_IDX, - (input_system_multiplex_t) port); + (input_system_multiplex_t)port); } else { /* * AM: A bit of a hack, wiring the input system. @@ -596,7 +600,8 @@ void ia_css_isys_rx_configure(const rx_cfg_t *config, void ia_css_isys_rx_disable(void) { enum mipi_port_id port; - for (port = (enum mipi_port_id) 0; port < N_MIPI_PORT_ID; port++) { + + for (port = (enum mipi_port_id)0; port < N_MIPI_PORT_ID; port++) { receiver_port_reg_store(RX0_ID, port, _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, false); @@ -604,4 +609,3 @@ void ia_css_isys_rx_disable(void) return; } #endif /* if !defined(USE_INPUT_SYSTEM_VERSION_2401) */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c index 2484949453b7c..c47e14d8bcad0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c @@ -85,10 +85,10 @@ static void release_sid( stream2mmio_sid_ID_t *sid); static bool acquire_ib_buffer( - int32_t bits_per_pixel, - int32_t pixels_per_line, - int32_t lines_per_frame, - int32_t align_in_bytes, + s32 bits_per_pixel, + s32 pixels_per_line, + s32 lines_per_frame, + s32 align_in_bytes, bool online, ib_buffer_t *buf); @@ -161,8 +161,8 @@ static csi_mipi_packet_type_t get_csi_mipi_packet_type( int32_t data_type); static int32_t calculate_stride( - int32_t bits_per_pixel, - int32_t pixels_per_line, + s32 bits_per_pixel, + s32 pixels_per_line, bool raw_packed, int32_t align_in_bytes); @@ -180,7 +180,7 @@ ia_css_isys_error_t ia_css_isys_stream_create( { ia_css_isys_error_t rc; - if (isys_stream_descr == NULL || isys_stream == NULL || + if (!isys_stream_descr || !isys_stream || isys_stream_id >= SH_CSS_MAX_ISYS_CHANNEL_NODES) return false; @@ -193,11 +193,11 @@ ia_css_isys_error_t ia_css_isys_stream_create( isys_stream->id = isys_stream_id; isys_stream->linked_isys_stream_id = isys_stream_descr->linked_isys_stream_id; - rc = create_input_system_input_port(isys_stream_descr, &(isys_stream->input_port)); + rc = create_input_system_input_port(isys_stream_descr, &isys_stream->input_port); if (rc == false) return false; - rc = create_input_system_channel(isys_stream_descr, false, &(isys_stream->channel)); + rc = create_input_system_channel(isys_stream_descr, false, &isys_stream->channel); if (rc == false) { destroy_input_system_input_port(&isys_stream->input_port); return false; @@ -233,7 +233,7 @@ void ia_css_isys_stream_destroy( ia_css_isys_stream_h isys_stream) { destroy_input_system_input_port(&isys_stream->input_port); - destroy_input_system_channel(&(isys_stream->channel)); + destroy_input_system_channel(&isys_stream->channel); if (isys_stream->enable_metadata) { /* Destroy metadata channel only if its allocated*/ destroy_input_system_channel(&isys_stream->md_channel); @@ -247,19 +247,19 @@ ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( { ia_css_isys_error_t rc; - if (isys_stream_cfg == NULL || - isys_stream_descr == NULL || - isys_stream == NULL) + if (!isys_stream_cfg || + !isys_stream_descr || + !isys_stream) return false; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_isys_stream_calculate_cfg() enter:\n"); rc = calculate_input_system_channel_cfg( - &(isys_stream->channel), - &(isys_stream->input_port), + &isys_stream->channel, + &isys_stream->input_port, isys_stream_descr, - &(isys_stream_cfg->channel_cfg), + &isys_stream_cfg->channel_cfg, false); if (rc == false) return false; @@ -278,10 +278,10 @@ ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( } rc = calculate_input_system_input_port_cfg( - &(isys_stream->channel), - &(isys_stream->input_port), + &isys_stream->channel, + &isys_stream->input_port, isys_stream_descr, - &(isys_stream_cfg->input_port_cfg)); + &isys_stream_cfg->input_port_cfg); if (rc == false) return false; @@ -334,7 +334,7 @@ static bool create_input_system_channel( if (!rc) return false; - if (!acquire_sid(me->stream2mmio_id, &(me->stream2mmio_sid_id))) { + if (!acquire_sid(me->stream2mmio_id, &me->stream2mmio_sid_id)) { return false; } @@ -344,14 +344,14 @@ static bool create_input_system_channel( metadata ? cfg->metadata.lines_per_frame : cfg->input_port_resolution.lines_per_frame, metadata ? cfg->metadata.align_req_in_bytes : cfg->input_port_resolution.align_req_in_bytes, cfg->online, - &(me->ib_buffer))) { - release_sid(me->stream2mmio_id, &(me->stream2mmio_sid_id)); + &me->ib_buffer)) { + release_sid(me->stream2mmio_id, &me->stream2mmio_sid_id); return false; } - if (!acquire_dma_channel(me->dma_id, &(me->dma_channel))) { - release_sid(me->stream2mmio_id, &(me->stream2mmio_sid_id)); - release_ib_buffer(&(me->ib_buffer)); + if (!acquire_dma_channel(me->dma_id, &me->dma_channel)) { + release_sid(me->stream2mmio_id, &me->stream2mmio_sid_id); + release_ib_buffer(&me->ib_buffer); return false; } @@ -362,11 +362,11 @@ static void destroy_input_system_channel( input_system_channel_t *me) { release_sid(me->stream2mmio_id, - &(me->stream2mmio_sid_id)); + &me->stream2mmio_sid_id); - release_ib_buffer(&(me->ib_buffer)); + release_ib_buffer(&me->ib_buffer); - release_dma_channel(me->dma_id, &(me->dma_channel)); + release_dma_channel(me->dma_id, &me->dma_channel); } static bool create_input_system_input_port( @@ -387,7 +387,7 @@ static bool create_input_system_input_port( rc = acquire_be_lut_entry( me->csi_rx.backend_id, packet_type, - &(me->csi_rx.backend_lut_entry)); + &me->csi_rx.backend_lut_entry); break; case INPUT_SYSTEM_PIXELGEN_PORT0_ID: me->pixelgen.pixelgen_id = PIXELGEN0_ID; @@ -402,7 +402,7 @@ static bool create_input_system_input_port( rc = acquire_be_lut_entry( me->csi_rx.backend_id, packet_type, - &(me->csi_rx.backend_lut_entry)); + &me->csi_rx.backend_lut_entry); break; case INPUT_SYSTEM_PIXELGEN_PORT1_ID: me->pixelgen.pixelgen_id = PIXELGEN1_ID; @@ -418,7 +418,7 @@ static bool create_input_system_input_port( rc = acquire_be_lut_entry( me->csi_rx.backend_id, packet_type, - &(me->csi_rx.backend_lut_entry)); + &me->csi_rx.backend_lut_entry); break; case INPUT_SYSTEM_PIXELGEN_PORT2_ID: me->pixelgen.pixelgen_id = PIXELGEN2_ID; @@ -473,7 +473,7 @@ static bool calculate_input_system_channel_cfg( bool rc; rc = calculate_stream2mmio_cfg(isys_cfg, metadata, - &(channel_cfg->stream2mmio_cfg)); + &channel_cfg->stream2mmio_cfg); if (!rc) return false; @@ -481,7 +481,7 @@ static bool calculate_input_system_channel_cfg( channel, input_port, isys_cfg, - &(channel_cfg->ibuf_ctrl_cfg)); + &channel_cfg->ibuf_ctrl_cfg); if (!rc) return false; if (metadata) @@ -490,7 +490,7 @@ static bool calculate_input_system_channel_cfg( rc = calculate_isys2401_dma_cfg( channel, isys_cfg, - &(channel_cfg->dma_cfg)); + &channel_cfg->dma_cfg); if (!rc) return false; @@ -498,7 +498,7 @@ static bool calculate_input_system_channel_cfg( isys_cfg, false, metadata, - &(channel_cfg->dma_src_port_cfg)); + &channel_cfg->dma_src_port_cfg); if (!rc) return false; @@ -506,7 +506,7 @@ static bool calculate_input_system_channel_cfg( isys_cfg, isys_cfg->raw_packed, metadata, - &(channel_cfg->dma_dest_port_cfg)); + &channel_cfg->dma_dest_port_cfg); if (!rc) return false; @@ -525,13 +525,13 @@ static bool calculate_input_system_input_port_cfg( case INPUT_SYSTEM_SOURCE_TYPE_SENSOR: rc = calculate_fe_cfg( isys_cfg, - &(input_port_cfg->csi_rx_cfg.frontend_cfg)); + &input_port_cfg->csi_rx_cfg.frontend_cfg); rc &= calculate_be_cfg( input_port, isys_cfg, false, - &(input_port_cfg->csi_rx_cfg.backend_cfg)); + &input_port_cfg->csi_rx_cfg.backend_cfg); if (rc && isys_cfg->metadata.enable) rc &= calculate_be_cfg(input_port, isys_cfg, true, @@ -542,14 +542,14 @@ static bool calculate_input_system_input_port_cfg( channel, input_port, isys_cfg, - &(input_port_cfg->pixelgen_cfg.tpg_cfg)); + &input_port_cfg->pixelgen_cfg.tpg_cfg); break; case INPUT_SYSTEM_SOURCE_TYPE_PRBS: rc = calculate_prbs_cfg( channel, input_port, isys_cfg, - &(input_port_cfg->pixelgen_cfg.prbs_cfg)); + &input_port_cfg->pixelgen_cfg.prbs_cfg); break; default: rc = false; @@ -575,15 +575,15 @@ static void release_sid( /* See also: ia_css_dma_configure_from_info() */ static int32_t calculate_stride( - int32_t bits_per_pixel, - int32_t pixels_per_line, + s32 bits_per_pixel, + s32 pixels_per_line, bool raw_packed, int32_t align_in_bytes) { - int32_t bytes_per_line; - int32_t pixels_per_word; - int32_t words_per_line; - int32_t pixels_per_line_padded; + s32 bytes_per_line; + s32 pixels_per_word; + s32 words_per_line; + s32 pixels_per_line_padded; pixels_per_line_padded = CEIL_MUL(pixels_per_line, align_in_bytes); @@ -598,10 +598,10 @@ static int32_t calculate_stride( } static bool acquire_ib_buffer( - int32_t bits_per_pixel, - int32_t pixels_per_line, - int32_t lines_per_frame, - int32_t align_in_bytes, + s32 bits_per_pixel, + s32 pixels_per_line, + s32 lines_per_frame, + s32 align_in_bytes, bool online, ib_buffer_t *buf) { @@ -663,7 +663,7 @@ static bool calculate_tpg_cfg( memcpy_s( (void *)cfg, sizeof(pixelgen_tpg_cfg_t), - (void *)(&(isys_cfg->tpg_port_attr)), + (void *)(&isys_cfg->tpg_port_attr), sizeof(pixelgen_tpg_cfg_t)); return true; } @@ -680,7 +680,7 @@ static bool calculate_prbs_cfg( memcpy_s( (void *)cfg, sizeof(pixelgen_prbs_cfg_t), - (void *)(&(isys_cfg->prbs_port_attr)), + (void *)(&isys_cfg->prbs_port_attr), sizeof(pixelgen_prbs_cfg_t)); return true; } @@ -699,7 +699,6 @@ static bool calculate_be_cfg( bool metadata, csi_rx_backend_cfg_t *cfg) { - memcpy_s( (void *)(&cfg->lut_entry), sizeof(csi_rx_backend_lut_entry_t), @@ -712,8 +711,7 @@ static bool calculate_be_cfg( cfg->csi_mipi_packet_type = get_csi_mipi_packet_type(isys_cfg->metadata.fmt_type); cfg->csi_mipi_cfg.comp_enable = false; cfg->csi_mipi_cfg.data_type = isys_cfg->metadata.fmt_type; - } - else { + } else { cfg->csi_mipi_packet_type = get_csi_mipi_packet_type(isys_cfg->csi_port_attr.fmt_type); cfg->csi_mipi_cfg.data_type = isys_cfg->csi_port_attr.fmt_type; cfg->csi_mipi_cfg.comp_enable = isys_cfg->csi_port_attr.comp_enable; @@ -747,10 +745,10 @@ static bool calculate_ibuf_ctrl_cfg( const input_system_cfg_t *isys_cfg, ibuf_ctrl_cfg_t *cfg) { - const int32_t bits_per_byte = 8; - int32_t bits_per_pixel; - int32_t bytes_per_pixel; - int32_t left_padding; + const s32 bits_per_byte = 8; + s32 bits_per_pixel; + s32 bytes_per_pixel; + s32 left_padding; (void)input_port; @@ -816,7 +814,6 @@ static bool calculate_ibuf_ctrl_cfg( cfg->stores_per_frame = isys_cfg->input_port_resolution.lines_per_frame; - cfg->stream2mmio_cfg.sync_cmd = _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME; /* TODO: Define conditions as when to use store words vs store packets */ @@ -852,9 +849,9 @@ static bool calculate_isys2401_dma_port_cfg( bool metadata, isys2401_dma_port_cfg_t *cfg) { - int32_t bits_per_pixel; - int32_t pixels_per_line; - int32_t align_req_in_bytes; + s32 bits_per_pixel; + s32 pixels_per_line; + s32 align_req_in_bytes; /* TODO: Move metadata away from isys_cfg to application layer */ if (metadata) { @@ -894,5 +891,6 @@ static csi_mipi_packet_type_t get_csi_mipi_packet_type( return packet_type; } + /* end of Private Methods */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h index 66c7293c0a93e..91614beb9b896 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h @@ -38,4 +38,3 @@ more details. #define _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME 2 #endif /* __VIRTUAL_ISYS_H_INCLUDED__ */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h index 45a47c202e2f7..1f10eaedc0515 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h @@ -37,7 +37,6 @@ more details. #define IA_CSS_PIPELINE_NUM_MAX (20) - /* Pipeline stage to be executed on SP/ISP */ struct ia_css_pipeline_stage { unsigned int stage_num; @@ -46,7 +45,7 @@ struct ia_css_pipeline_stage { const struct ia_css_fw_info *firmware; /* acceleration binary */ /* SP function for SP stage */ enum ia_css_pipeline_stage_sp_func sp_func; - unsigned max_input_width; /* For SP raw copy */ + unsigned int max_input_width; /* For SP raw copy */ struct sh_css_binary_args args; int mode; bool out_frame_allocated[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -58,19 +57,19 @@ struct ia_css_pipeline_stage { /* Pipeline of n stages to be executed on SP/ISP per stage */ struct ia_css_pipeline { enum ia_css_pipe_id pipe_id; - uint8_t pipe_num; + u8 pipe_num; bool stop_requested; struct ia_css_pipeline_stage *stages; struct ia_css_pipeline_stage *current_stage; - unsigned num_stages; + unsigned int num_stages; struct ia_css_frame in_frame; struct ia_css_frame out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; struct ia_css_frame vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; unsigned int dvs_frame_delay; - unsigned inout_port_config; + unsigned int inout_port_config; int num_execs; bool acquire_isp_each_stage; - uint32_t pipe_qos_config; + u32 pipe_qos_config; }; #define DEFAULT_PIPELINE \ @@ -90,7 +89,7 @@ struct ia_css_pipeline_stage_desc { struct ia_css_binary *binary; const struct ia_css_fw_info *firmware; enum ia_css_pipeline_stage_sp_func sp_func; - unsigned max_input_width; + unsigned int max_input_width; unsigned int mode; struct ia_css_frame *in_frame; struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -131,7 +130,6 @@ enum ia_css_err ia_css_pipeline_create( */ void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline); - /* @brief Starts a pipeline * * @param[in] pipe_id @@ -212,7 +210,7 @@ enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, * */ enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeline, - uint32_t fw_handle, + u32 fw_handle, struct ia_css_pipeline_stage **stage); /* @brief Gets the Firmware handle corresponding the stage num from the pipeline @@ -225,7 +223,7 @@ enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeli * */ enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeline, - uint32_t stage_num, + u32 stage_num, uint32_t *fw_handle); /* @brief gets the output stage from the pipeline diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h index a7e6edf41cdbd..30dec75bda0c4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h @@ -37,6 +37,7 @@ enum ia_css_pipeline_stage_sp_func { IA_CSS_PIPELINE_ISYS_COPY = 2, IA_CSS_PIPELINE_NO_FUNC = 3, }; + #define IA_CSS_PIPELINE_NUM_STAGE_FUNCS 3 #endif /*__IA_CSS_PIPELINE_COMMON_H__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c index 4746620ca2129..3d36be4795e73 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c @@ -42,7 +42,6 @@ more details. #define PIPELINE_SP_THREAD_EMPTY_TOKEN (0x0) #define PIPELINE_SP_THREAD_RESERVED_TOKEN (0x1) - /******************************************************* *** Static variables ********************************************************/ @@ -83,10 +82,10 @@ enum ia_css_err ia_css_pipeline_create( unsigned int pipe_num, unsigned int dvs_frame_delay) { - assert(pipeline != NULL); + assert(pipeline); IA_CSS_ENTER_PRIVATE("pipeline = %p, pipe_id = %d, pipe_num = %d, dvs_frame_delay = %d", pipeline, pipe_id, pipe_num, dvs_frame_delay); - if (pipeline == NULL) { + if (!pipeline) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -122,10 +121,10 @@ void ia_css_pipeline_map(unsigned int pipe_num, bool map) */ void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline) { - assert(pipeline != NULL); + assert(pipeline); IA_CSS_ENTER_PRIVATE("pipeline = %p", pipeline); - if (pipeline == NULL) { + if (!pipeline) { IA_CSS_ERROR("NULL input parameter"); IA_CSS_LEAVE_PRIVATE("void"); return; @@ -143,10 +142,10 @@ void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline) void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, struct ia_css_pipeline *pipeline) { - uint8_t pipe_num = 0; + u8 pipe_num = 0; unsigned int thread_id; - assert(pipeline != NULL); + assert(pipeline); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipeline_start() enter: pipe_id=%d, pipeline=%p\n", pipe_id, pipeline); @@ -161,9 +160,9 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, #endif #if !defined(HAS_NO_INPUT_SYSTEM) #ifndef ISP2401 - , (enum mipi_port_id) 0 + , (enum mipi_port_id)0 #else - (enum mipi_port_id) 0, + (enum mipi_port_id)0, #endif #endif #ifndef ISP2401 @@ -193,17 +192,16 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, */ bool ia_css_pipeline_get_sp_thread_id(unsigned int key, unsigned int *val) { - IA_CSS_ENTER("key=%d, val=%p", key, val); - if ((val == NULL) || (key >= IA_CSS_PIPELINE_NUM_MAX) || (key >= IA_CSS_PIPE_ID_NUM)) { + if ((!val) || (key >= IA_CSS_PIPELINE_NUM_MAX) || (key >= IA_CSS_PIPE_ID_NUM)) { IA_CSS_LEAVE("return value = false"); return false; } *val = pipeline_num_to_sp_thread_map[key]; - if (*val == (unsigned)PIPELINE_NUM_UNMAPPED) { + if (*val == (unsigned int)PIPELINE_NUM_UNMAPPED) { IA_CSS_LOG("unmapped pipeline number"); IA_CSS_LEAVE("return value = false"); return false; @@ -215,6 +213,7 @@ bool ia_css_pipeline_get_sp_thread_id(unsigned int key, unsigned int *val) void ia_css_pipeline_dump_thread_map_info(void) { unsigned int i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "pipeline_num_to_sp_thread_map:\n"); for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { @@ -228,9 +227,9 @@ enum ia_css_err ia_css_pipeline_request_stop(struct ia_css_pipeline *pipeline) enum ia_css_err err = IA_CSS_SUCCESS; unsigned int thread_id; - assert(pipeline != NULL); + assert(pipeline); - if (pipeline == NULL) + if (!pipeline) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, @@ -265,10 +264,10 @@ void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline) { struct ia_css_pipeline_stage *s; - assert(pipeline != NULL); + assert(pipeline); IA_CSS_ENTER_PRIVATE("pipeline = %p", pipeline); - if (pipeline == NULL) { + if (!pipeline) { IA_CSS_ERROR("NULL input parameter"); IA_CSS_LEAVE_PRIVATE("void"); return; @@ -277,6 +276,7 @@ void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline) while (s) { struct ia_css_pipeline_stage *next = s->next; + pipeline_stage_destroy(s); s = next; } @@ -305,8 +305,8 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( enum ia_css_err err; /* other arguments can be NULL */ - assert(pipeline != NULL); - assert(stage_desc != NULL); + assert(pipeline); + assert(stage_desc); last = pipeline->stages; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, @@ -314,8 +314,7 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( if (!stage_desc->binary && !stage_desc->firmware && (stage_desc->sp_func == IA_CSS_PIPELINE_NO_FUNC)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_create_and_add_stage() done:" - " Invalid args\n"); + "ia_css_pipeline_create_and_add_stage() done: Invalid args\n"); return IA_CSS_ERR_INTERNAL_ERROR; } @@ -331,7 +330,6 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( && (!stage_desc->in_frame) && (!stage_desc->firmware) && (!stage_desc->binary->online)) { - /* Do this only for ISP stages*/ if (last && last->args.out_frame[0]) stage_desc->in_frame = last->args.out_frame[0]; @@ -344,8 +342,7 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( err = pipeline_stage_create(stage_desc, &new_stage); if (err != IA_CSS_SUCCESS) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_create_and_add_stage() done:" - " stage_create_failed\n"); + "ia_css_pipeline_create_and_add_stage() done: stage_create_failed\n"); return err; } @@ -366,10 +363,10 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, bool continuous) { - unsigned i = 0; + unsigned int i = 0; struct ia_css_pipeline_stage *stage; - assert(pipeline != NULL); + assert(pipeline); for (stage = pipeline->stages; stage; stage = stage->next) { stage->stage_num = i; i++; @@ -385,8 +382,9 @@ enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, struct ia_css_pipeline_stage **stage) { struct ia_css_pipeline_stage *s; - assert(pipeline != NULL); - assert(stage != NULL); + + assert(pipeline); + assert(stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipeline_get_stage() enter:\n"); for (s = pipeline->stages; s; s = s->next) { @@ -399,13 +397,14 @@ enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, } enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeline, - uint32_t fw_handle, + u32 fw_handle, struct ia_css_pipeline_stage **stage) { struct ia_css_pipeline_stage *s; - assert(pipeline != NULL); - assert(stage != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,"%s() \n",__func__); + + assert(pipeline); + assert(stage); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); for (s = pipeline->stages; s; s = s->next) { if ((s->firmware) && (s->firmware->handle == fw_handle)) { *stage = s; @@ -416,17 +415,17 @@ enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeli } enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeline, - uint32_t stage_num, + u32 stage_num, uint32_t *fw_handle) { struct ia_css_pipeline_stage *s; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,"%s() \n",__func__); - if ((pipeline == NULL) || (fw_handle == NULL)) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); + if ((!pipeline) || (!fw_handle)) return IA_CSS_ERR_INVALID_ARGUMENTS; for (s = pipeline->stages; s; s = s->next) { - if((s->stage_num == stage_num) && (s->firmware)) { + if ((s->stage_num == stage_num) && (s->firmware)) { *fw_handle = s->firmware->handle; return IA_CSS_SUCCESS; } @@ -440,8 +439,9 @@ enum ia_css_err ia_css_pipeline_get_output_stage( struct ia_css_pipeline_stage **stage) { struct ia_css_pipeline_stage *s; - assert(pipeline != NULL); - assert(stage != NULL); + + assert(pipeline); + assert(stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipeline_get_output_stage() enter:\n"); @@ -499,7 +499,7 @@ bool ia_css_pipeline_is_mapped(unsigned int key) return false; } - ret = (bool)(pipeline_num_to_sp_thread_map[key] != (unsigned)PIPELINE_NUM_UNMAPPED); + ret = (bool)(pipeline_num_to_sp_thread_map[key] != (unsigned int)PIPELINE_NUM_UNMAPPED); IA_CSS_LEAVE_PRIVATE("return = %d", ret); return ret; @@ -524,6 +524,7 @@ bool ia_css_pipeline_is_mapped(unsigned int key) static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage) { unsigned int i; + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { if (stage->out_frame_allocated[i]) { ia_css_frame_free(stage->args.out_frame[i]); @@ -555,7 +556,7 @@ static void pipeline_map_num_to_sp_thread(unsigned int pipe_num) /* pipe is not mapped to any thread */ assert(pipeline_num_to_sp_thread_map[pipe_num] - == (unsigned)PIPELINE_NUM_UNMAPPED); + == (unsigned int)PIPELINE_NUM_UNMAPPED); for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) { if (pipeline_sp_thread_list[i] == @@ -580,8 +581,9 @@ static void pipeline_map_num_to_sp_thread(unsigned int pipe_num) static void pipeline_unmap_num_to_sp_thread(unsigned int pipe_num) { unsigned int thread_id; + assert(pipeline_num_to_sp_thread_map[pipe_num] - != (unsigned)PIPELINE_NUM_UNMAPPED); + != (unsigned int)PIPELINE_NUM_UNMAPPED); thread_id = pipeline_num_to_sp_thread_map[pipe_num]; pipeline_num_to_sp_thread_map[pipe_num] = PIPELINE_NUM_UNMAPPED; @@ -615,7 +617,7 @@ static enum ia_css_err pipeline_stage_create( } stage = sh_css_malloc(sizeof(*stage)); - if (stage == NULL) { + if (!stage) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto ERR; } @@ -681,7 +683,7 @@ static enum ia_css_err pipeline_stage_create( *new_stage = stage; return err; ERR: - if (stage != NULL) + if (stage) pipeline_stage_destroy(stage); return err; } @@ -714,7 +716,7 @@ static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline) struct ia_css_pipeline_stage *stage = NULL; enum ia_css_err err = IA_CSS_SUCCESS; - assert(pipeline != NULL); + assert(pipeline); if (pipeline->pipe_id == IA_CSS_PIPE_ID_PREVIEW) { /* in preview pipeline, vf_pp stage should do zoom */ err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_VF_PP, &stage); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h index aaf2e247cafbe..9eb46411ac8b9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h @@ -42,12 +42,12 @@ struct ia_css_queue_local { ia_css_circbuf_desc_t *cb_desc; /*Circbuf desc for local queues*/ ia_css_circbuf_elem_t *cb_elems; /*Circbuf elements*/ }; + typedef struct ia_css_queue_local ia_css_queue_local_t; /* Handle for queue object*/ typedef struct ia_css_queue ia_css_queue_t; - /***************************************************************************** * Queue Public APIs *****************************************************************************/ @@ -59,7 +59,7 @@ typedef struct ia_css_queue ia_css_queue_t; * @return EINVAL - Invalid argument. * */ -extern int ia_css_queue_local_init( +int ia_css_queue_local_init( ia_css_queue_t *qhandle, ia_css_queue_local_t *desc); @@ -70,7 +70,7 @@ extern int ia_css_queue_local_init( * @return 0 - Successful init of remote queue instance. * @return EINVAL - Invalid argument. */ -extern int ia_css_queue_remote_init( +int ia_css_queue_remote_init( ia_css_queue_t *qhandle, ia_css_queue_remote_t *desc); @@ -80,7 +80,7 @@ extern int ia_css_queue_remote_init( * @return 0 - Successful uninit. * */ -extern int ia_css_queue_uninit( +int ia_css_queue_uninit( ia_css_queue_t *qhandle); /* @brief Enqueue an item in the queue instance @@ -92,7 +92,7 @@ extern int ia_css_queue_uninit( * @return ENOBUFS - Queue is full. * */ -extern int ia_css_queue_enqueue( +int ia_css_queue_enqueue( ia_css_queue_t *qhandle, uint32_t item); @@ -106,7 +106,7 @@ extern int ia_css_queue_enqueue( * @return ENODATA - Queue is empty. * */ -extern int ia_css_queue_dequeue( +int ia_css_queue_dequeue( ia_css_queue_t *qhandle, uint32_t *item); @@ -119,7 +119,7 @@ extern int ia_css_queue_dequeue( * @return ENOSYS - Function not implemented. * */ -extern int ia_css_queue_is_empty( +int ia_css_queue_is_empty( ia_css_queue_t *qhandle, bool *is_empty); @@ -132,7 +132,7 @@ extern int ia_css_queue_is_empty( * @return ENOSYS - Function not implemented. * */ -extern int ia_css_queue_is_full( +int ia_css_queue_is_full( ia_css_queue_t *qhandle, bool *is_full); @@ -144,7 +144,7 @@ extern int ia_css_queue_is_full( * @return EINVAL - Invalid argument. * */ -extern int ia_css_queue_get_used_space( +int ia_css_queue_get_used_space( ia_css_queue_t *qhandle, uint32_t *size); @@ -156,7 +156,7 @@ extern int ia_css_queue_get_used_space( * @return EINVAL - Invalid argument. * */ -extern int ia_css_queue_get_free_space( +int ia_css_queue_get_free_space( ia_css_queue_t *qhandle, uint32_t *size); @@ -164,15 +164,15 @@ extern int ia_css_queue_get_free_space( * * @param[in] qhandle. Handle to queue instance * @param[in] offset Offset of element to peek, - * starting from head of queue + * starting from head of queue * @param[in] element Value of element returned * @return 0 - Successfully access state. * @return EINVAL - Invalid argument. * */ -extern int ia_css_queue_peek( +int ia_css_queue_peek( ia_css_queue_t *qhandle, - uint32_t offset, + u32 offset, uint32_t *element); /* @brief Get the usable size for the queue @@ -184,9 +184,8 @@ extern int ia_css_queue_peek( * @return ENOSYS - Function not implemented. * */ -extern int ia_css_queue_get_size( +int ia_css_queue_get_size( ia_css_queue_t *qhandle, uint32_t *size); #endif /* __IA_CSS_QUEUE_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h index 4ebaeb0c18470..04c9c1c84e860 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h @@ -58,12 +58,12 @@ DMAed to access single element.*/ /* Remote Queue object descriptor */ struct ia_css_queue_remote { - uint32_t cb_desc_addr; /*Circbuf desc address for remote queues*/ - uint32_t cb_elems_addr; /*Circbuf elements addr for remote queue*/ - uint8_t location; /* Cell location for queue */ - uint8_t proc_id; /* Processor id for queue access */ + u32 cb_desc_addr; /*Circbuf desc address for remote queues*/ + u32 cb_elems_addr; /*Circbuf elements addr for remote queue*/ + u8 location; /* Cell location for queue */ + u8 proc_id; /* Processor id for queue access */ }; -typedef struct ia_css_queue_remote ia_css_queue_remote_t; +typedef struct ia_css_queue_remote ia_css_queue_remote_t; #endif /* __IA_CSS_QUEUE_COMM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c index 606376fdf0ba1..d8746e7f6a686 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c @@ -88,7 +88,8 @@ int ia_css_queue_enqueue( uint32_t item) { int error = 0; - if (NULL == qhandle) + + if (!qhandle) return EINVAL; /* 1. Load the required queue object */ @@ -106,7 +107,7 @@ int ia_css_queue_enqueue( } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { ia_css_circbuf_desc_t cb_desc; ia_css_circbuf_elem_t cb_elem; - uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + u32 ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; /* a. Load the queue cb_desc from remote */ QUEUE_CB_DESC_INIT(&cb_desc); @@ -146,7 +147,8 @@ int ia_css_queue_dequeue( uint32_t *item) { int error = 0; - if (qhandle == NULL || NULL == item) + + if (!qhandle || NULL == item) return EINVAL; /* 1. Load the required queue object */ @@ -164,7 +166,7 @@ int ia_css_queue_dequeue( /* a. Load the queue from remote */ ia_css_circbuf_desc_t cb_desc; ia_css_circbuf_elem_t cb_elem; - uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + u32 ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; QUEUE_CB_DESC_INIT(&cb_desc); @@ -202,7 +204,8 @@ int ia_css_queue_is_full( bool *is_full) { int error = 0; - if ((qhandle == NULL) || (is_full == NULL)) + + if ((!qhandle) || (!is_full)) return EINVAL; /* 1. Load the required queue object */ @@ -215,7 +218,8 @@ int ia_css_queue_is_full( } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { /* a. Load the queue from remote */ ia_css_circbuf_desc_t cb_desc; - uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + u32 ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + QUEUE_CB_DESC_INIT(&cb_desc); error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); if (error != 0) @@ -234,7 +238,8 @@ int ia_css_queue_get_free_space( uint32_t *size) { int error = 0; - if ((qhandle == NULL) || (size == NULL)) + + if ((!qhandle) || (!size)) return EINVAL; /* 1. Load the required queue object */ @@ -247,7 +252,8 @@ int ia_css_queue_get_free_space( } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { /* a. Load the queue from remote */ ia_css_circbuf_desc_t cb_desc; - uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + u32 ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + QUEUE_CB_DESC_INIT(&cb_desc); error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); if (error != 0) @@ -266,7 +272,8 @@ int ia_css_queue_get_used_space( uint32_t *size) { int error = 0; - if ((qhandle == NULL) || (size == NULL)) + + if ((!qhandle) || (!size)) return EINVAL; /* 1. Load the required queue object */ @@ -279,7 +286,8 @@ int ia_css_queue_get_used_space( } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { /* a. Load the queue from remote */ ia_css_circbuf_desc_t cb_desc; - uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + u32 ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + QUEUE_CB_DESC_INIT(&cb_desc); error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); if (error != 0) @@ -295,13 +303,13 @@ int ia_css_queue_get_used_space( int ia_css_queue_peek( ia_css_queue_t *qhandle, - uint32_t offset, + u32 offset, uint32_t *element) { - uint32_t num_elems = 0; + u32 num_elems = 0; int error = 0; - if ((qhandle == NULL) || (element == NULL)) + if ((!qhandle) || (!element)) return EINVAL; /* 1. Load the required queue object */ @@ -314,13 +322,13 @@ int ia_css_queue_peek( if (offset > num_elems) return EINVAL; - *element = ia_css_circbuf_peek_from_start(&qhandle->desc.cb_local, (int) offset); + *element = ia_css_circbuf_peek_from_start(&qhandle->desc.cb_local, (int)offset); return 0; } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { /* a. Load the queue from remote */ ia_css_circbuf_desc_t cb_desc; ia_css_circbuf_elem_t cb_elem; - uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + u32 ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; QUEUE_CB_DESC_INIT(&cb_desc); @@ -350,7 +358,8 @@ int ia_css_queue_is_empty( bool *is_empty) { int error = 0; - if ((qhandle == NULL) || (is_empty == NULL)) + + if ((!qhandle) || (!is_empty)) return EINVAL; /* 1. Load the required queue object */ @@ -363,7 +372,7 @@ int ia_css_queue_is_empty( } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { /* a. Load the queue from remote */ ia_css_circbuf_desc_t cb_desc; - uint32_t ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; + u32 ignore_desc_flags = QUEUE_IGNORE_STEP_FLAG; QUEUE_CB_DESC_INIT(&cb_desc); error = ia_css_queue_load(qhandle, &cb_desc, ignore_desc_flags); @@ -383,7 +392,8 @@ int ia_css_queue_get_size( uint32_t *size) { int error = 0; - if ((qhandle == NULL) || (size == NULL)) + + if ((!qhandle) || (!size)) return EINVAL; /* 1. Load the required queue object */ @@ -396,7 +406,7 @@ int ia_css_queue_get_size( } else if (qhandle->type == IA_CSS_QUEUE_TYPE_REMOTE) { /* a. Load the queue from remote */ ia_css_circbuf_desc_t cb_desc; - uint32_t ignore_desc_flags = QUEUE_IGNORE_START_END_STEP_FLAGS; + u32 ignore_desc_flags = QUEUE_IGNORE_START_END_STEP_FLAGS; QUEUE_CB_DESC_INIT(&cb_desc); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c index 7bb2b494836e8..d9243184c112b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c @@ -40,7 +40,7 @@ int ia_css_queue_load( ia_css_circbuf_desc_t *cb_desc, uint32_t ignore_desc_flags) { - if (rdesc == NULL || cb_desc == NULL) + if (!rdesc || !cb_desc) return EINVAL; if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { @@ -51,7 +51,7 @@ int ia_css_queue_load( rdesc->desc.remote.cb_desc_addr + offsetof(ia_css_circbuf_desc_t, size)); - if (0 == cb_desc->size) { + if (cb_desc->size == 0) { /* Adding back the workaround which was removed while refactoring queues. When reading size through sp_dmem_load_*, sometimes we get back @@ -95,7 +95,7 @@ int ia_css_queue_store( ia_css_circbuf_desc_t *cb_desc, uint32_t ignore_desc_flags) { - if (rdesc == NULL || cb_desc == NULL) + if (!rdesc || !cb_desc) return EINVAL; if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { @@ -139,10 +139,10 @@ int ia_css_queue_store( int ia_css_queue_item_load( struct ia_css_queue *rdesc, - uint8_t position, + u8 position, ia_css_circbuf_elem_t *item) { - if (rdesc == NULL || item == NULL) + if (!rdesc || !item) return EINVAL; if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { @@ -166,10 +166,10 @@ int ia_css_queue_item_load( int ia_css_queue_item_store( struct ia_css_queue *rdesc, - uint8_t position, + u8 position, ia_css_circbuf_elem_t *item) { - if (rdesc == NULL || item == NULL) + if (!rdesc || !item) return EINVAL; if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h index 4775513f54cf1..3438288474bdc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h @@ -63,39 +63,39 @@ more details. (cb_desc)->step = 0; \ (cb_desc)->start = 0; \ (cb_desc)->end = 0; \ - } while(0) + } while (0) struct ia_css_queue { - uint8_t type; /* Specify remote/local type of access */ - uint8_t location; /* Cell location for queue */ - uint8_t proc_id; /* Processor id for queue access */ + u8 type; /* Specify remote/local type of access */ + u8 location; /* Cell location for queue */ + u8 proc_id; /* Processor id for queue access */ union { ia_css_circbuf_t cb_local; struct { - uint32_t cb_desc_addr; /*Circbuf desc address for remote queues*/ - uint32_t cb_elems_addr; /*Circbuf elements addr for remote queue*/ + u32 cb_desc_addr; /*Circbuf desc address for remote queues*/ + u32 cb_elems_addr; /*Circbuf elements addr for remote queue*/ } remote; } desc; }; -extern int ia_css_queue_load( +int ia_css_queue_load( struct ia_css_queue *rdesc, ia_css_circbuf_desc_t *cb_desc, uint32_t ignore_desc_flags); -extern int ia_css_queue_store( +int ia_css_queue_store( struct ia_css_queue *rdesc, ia_css_circbuf_desc_t *cb_desc, uint32_t ignore_desc_flags); -extern int ia_css_queue_item_load( +int ia_css_queue_item_load( struct ia_css_queue *rdesc, - uint8_t position, + u8 position, ia_css_circbuf_elem_t *item); -extern int ia_css_queue_item_store( +int ia_css_queue_item_store( struct ia_css_queue *rdesc, - uint8_t position, + u8 position, ia_css_circbuf_elem_t *item); #endif /* __QUEUE_ACCESS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h index 90ac27cf02cff..b81acc80d861e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h @@ -40,18 +40,18 @@ more details. */ struct ia_css_rmgr_vbuf_handle { hrt_vaddress vptr; - uint8_t count; - uint32_t size; + u8 count; + u32 size; }; /** * @brief Data structure for the resource pool (host, vbuf) */ struct ia_css_rmgr_vbuf_pool { - uint8_t copy_on_write; - uint8_t recycle; - uint32_t size; - uint32_t index; + u8 copy_on_write; + u8 recycle; + u32 size; + u32 index; struct ia_css_rmgr_vbuf_handle **handles; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c index a4d8a48f95ba9..d49f50b619312 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c @@ -81,7 +81,8 @@ void ia_css_rmgr_refcount_retain_vbuf(struct ia_css_rmgr_vbuf_handle **handle) { int i; struct ia_css_rmgr_vbuf_handle *h; - if ((handle == NULL) || (*handle == NULL)) { + + if ((!handle) || (!*handle)) { IA_CSS_LOG("Invalid inputs"); return; } @@ -98,7 +99,7 @@ void ia_css_rmgr_refcount_retain_vbuf(struct ia_css_rmgr_vbuf_handle **handle) /* if the loop dus not break and *handle == NULL this is an error handle and report it. */ - if (*handle == NULL) { + if (!*handle) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "ia_css_i_host_refcount_retain_vbuf() failed to find empty slot!\n"); return; @@ -116,7 +117,7 @@ void ia_css_rmgr_refcount_retain_vbuf(struct ia_css_rmgr_vbuf_handle **handle) */ void ia_css_rmgr_refcount_release_vbuf(struct ia_css_rmgr_vbuf_handle **handle) { - if ((handle == NULL) || ((*handle) == NULL) || (((*handle)->count) == 0)) { + if ((!handle) || ((*handle) == NULL) || (((*handle)->count) == 0)) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "ia_css_rmgr_refcount_release_vbuf() invalid arguments!\n"); return; @@ -140,9 +141,10 @@ enum ia_css_err ia_css_rmgr_init_vbuf(struct ia_css_rmgr_vbuf_pool *pool) { enum ia_css_err err = IA_CSS_SUCCESS; size_t bytes_needed; + rmgr_refcount_init_vbuf(); - assert(pool != NULL); - if (pool == NULL) + assert(pool); + if (!pool) return IA_CSS_ERR_INVALID_ARGUMENTS; /* initialize the recycle pool if used */ if (pool->recycle && pool->size) { @@ -151,7 +153,7 @@ enum ia_css_err ia_css_rmgr_init_vbuf(struct ia_css_rmgr_vbuf_pool *pool) sizeof(void *) * pool->size; pool->handles = sh_css_malloc(bytes_needed); - if (pool->handles != NULL) + if (pool->handles) memset(pool->handles, 0, bytes_needed); else err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -170,16 +172,17 @@ enum ia_css_err ia_css_rmgr_init_vbuf(struct ia_css_rmgr_vbuf_pool *pool) */ void ia_css_rmgr_uninit_vbuf(struct ia_css_rmgr_vbuf_pool *pool) { - uint32_t i; + u32 i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_rmgr_uninit_vbuf()\n"); - if (pool == NULL) { + if (!pool) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "ia_css_rmgr_uninit_vbuf(): NULL argument\n"); return; } - if (pool->handles != NULL) { + if (pool->handles) { /* free the hmm buffers */ for (i = 0; i < pool->size; i++) { - if (pool->handles[i] != NULL) { + if (pool->handles[i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " freeing/releasing %x (count=%d)\n", pool->handles[i]->vptr, @@ -207,14 +210,15 @@ static void rmgr_push_handle(struct ia_css_rmgr_vbuf_pool *pool, struct ia_css_rmgr_vbuf_handle **handle) { - uint32_t i; + u32 i; bool succes = false; - assert(pool != NULL); + + assert(pool); assert(pool->recycle); - assert(pool->handles != NULL); - assert(handle != NULL); + assert(pool->handles); + assert(handle); for (i = 0; i < pool->size; i++) { - if (pool->handles[i] == NULL) { + if (!pool->handles[i]) { ia_css_rmgr_refcount_retain_vbuf(handle); pool->handles[i] = *handle; succes = true; @@ -234,15 +238,16 @@ static void rmgr_pop_handle(struct ia_css_rmgr_vbuf_pool *pool, struct ia_css_rmgr_vbuf_handle **handle) { - uint32_t i; + u32 i; bool succes = false; - assert(pool != NULL); + + assert(pool); assert(pool->recycle); - assert(pool->handles != NULL); - assert(handle != NULL); - assert(*handle != NULL); + assert(pool->handles); + assert(handle); + assert(*handle); for (i = 0; i < pool->size; i++) { - if ((pool->handles[i] != NULL) && + if ((pool->handles[i]) && (pool->handles[i]->size == (*handle)->size)) { *handle = pool->handles[i]; pool->handles[i] = NULL; @@ -265,7 +270,7 @@ void ia_css_rmgr_acq_vbuf(struct ia_css_rmgr_vbuf_pool *pool, { struct ia_css_rmgr_vbuf_handle h; - if ((pool == NULL) || (handle == NULL) || (*handle == NULL)) { + if ((!pool) || (!handle) || (!*handle)) { IA_CSS_LOG("Invalid inputs"); return; } @@ -311,7 +316,7 @@ void ia_css_rmgr_acq_vbuf(struct ia_css_rmgr_vbuf_pool *pool, void ia_css_rmgr_rel_vbuf(struct ia_css_rmgr_vbuf_pool *pool, struct ia_css_rmgr_vbuf_handle **handle) { - if ((pool == NULL) || (handle == NULL) || (*handle == NULL)) { + if ((!pool) || (!handle) || (!*handle)) { IA_CSS_LOG("Invalid inputs"); return; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h index bc4b1723369ec..39b82c4685e72 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h @@ -35,18 +35,17 @@ more details. #include #include "ia_css_spctrl_comm.h" - typedef struct { - uint32_t ddr_data_offset; /** posistion of data in DDR */ - uint32_t dmem_data_addr; /** data segment address in dmem */ - uint32_t dmem_bss_addr; /** bss segment address in dmem */ - uint32_t data_size; /** data segment size */ - uint32_t bss_size; /** bss segment size */ - uint32_t spctrl_config_dmem_addr; /* = N_SP_ID) || (spctrl_cfg == NULL)) + if ((sp_id >= N_SP_ID) || (!spctrl_cfg)) return IA_CSS_ERR_INVALID_ARGUMENTS; spctrl_cofig_info[sp_id].code_addr = mmgr_NULL; @@ -172,22 +172,23 @@ ia_css_spctrl_sp_sw_state ia_css_spctrl_get_state(sp_ID_t sp_id) { ia_css_spctrl_sp_sw_state state = 0; unsigned int HIVE_ADDR_sp_sw_state; + if (sp_id >= N_SP_ID) return IA_CSS_SP_SW_TERMINATED; HIVE_ADDR_sp_sw_state = spctrl_cofig_info[sp_id].spctrl_state_dmem_addr; (void)HIVE_ADDR_sp_sw_state; /* Suppres warnings in CRUN */ if (sp_id == SP0_ID) - state = sp_dmem_load_uint32(sp_id, (unsigned)sp_address_of(sp_sw_state)); + state = sp_dmem_load_uint32(sp_id, (unsigned int)sp_address_of(sp_sw_state)); return state; } int ia_css_spctrl_is_idle(sp_ID_t sp_id) { int state = 0; - assert (sp_id < N_SP_ID); + + assert(sp_id < N_SP_ID); state = sp_ctrl_getbit(sp_id, SP_SC_REG, SP_IDLE_BIT); return state; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h index d0d74957358be..0a8bc1da06f6a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h @@ -49,11 +49,11 @@ more details. * @brief Data structure for the tagger buffer element. */ typedef struct { - uint32_t frame; /* the frame value stored in the element */ - uint32_t param; /* the param value stored in the element */ - uint8_t mark; /* the mark on the element */ - uint8_t lock; /* the lock on the element */ - uint8_t exp_id; /* exp_id of frame, for debugging only */ + u32 frame; /* the frame value stored in the element */ + u32 param; /* the param value stored in the element */ + u8 mark; /* the mark on the element */ + u8 lock; /* the lock on the element */ + u8 exp_id; /* exp_id of frame, for debugging only */ } ia_css_tagger_buf_sp_elem_t; #endif /* __IA_CSS_TAGGER_COMMON_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c index b7dd18492a91b..c1d63e5a26566 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c @@ -37,12 +37,10 @@ more details. enum ia_css_err ia_css_timer_get_current_tick( struct ia_css_clock_tick *curr_ts) { - - assert(curr_ts != NULL); - if (curr_ts == NULL) { + assert(curr_ts); + if (!curr_ts) { return IA_CSS_ERR_INVALID_ARGUMENTS; } curr_ts->ticks = (clock_value_t)gp_timer_read(GP_TIMER_SEL); return IA_CSS_SUCCESS; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index 230b4cc60767c..e094d1c3ea4dc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -110,11 +110,11 @@ static int thread_alive; #define JPEG_BYTES (16 * 1024 * 1024) #define STATS_ENABLED(stage) (stage && stage->binary && stage->binary->info && \ - (stage->binary->info->sp.enable.s3a || stage->binary->info->sp.enable.dis)) + (stage->binary->info->sp.enable.s3a || stage->binary->info->sp.enable.dis)) struct sh_css my_css; -int (*sh_css_printf) (const char *fmt, va_list args) = NULL; +int (*sh_css_printf)(const char *fmt, va_list args) = NULL; /* modes of work: stream_create and stream_destroy will update the save/restore data only when in working mode, not suspend/resume @@ -145,7 +145,7 @@ struct sh_css_stream_seed { */ struct sh_css_save { enum ia_sh_css_modes mode; - uint32_t mmu_base; /* the last mmu_base */ + u32 mmu_base; /* the last mmu_base */ enum ia_css_irq_type irq_type; struct sh_css_stream_seed stream_seeds[MAX_ACTIVE_STREAMS]; struct ia_css_fw *loaded_fw; /* fw struct previously loaded */ @@ -170,9 +170,9 @@ struct sh_css_hmm_buffer_record { static struct sh_css_hmm_buffer_record hmm_buffer_record[MAX_HMM_BUFFER_NUM]; -#define GPIO_FLASH_PIN_MASK (1 << HIVE_GPIO_STROBE_TRIGGER_PIN) +#define GPIO_FLASH_PIN_MASK BIT(HIVE_GPIO_STROBE_TRIGGER_PIN) -static bool fw_explicitly_loaded = false; +static bool fw_explicitly_loaded; /* * Local prototypes @@ -235,7 +235,7 @@ static void ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, struct ia_css_fw_info *firmware); static void -ia_css_reset_defaults(struct sh_css* css); +ia_css_reset_defaults(struct sh_css *css); static void sh_css_init_host_sp_control_vars(void); @@ -333,7 +333,7 @@ create_host_video_pipeline(struct ia_css_pipe *pipe); static enum ia_css_err create_host_copy_pipeline(struct ia_css_pipe *pipe, - unsigned max_input_width, + unsigned int max_input_width, struct ia_css_frame *out_frame); static enum ia_css_err @@ -382,7 +382,6 @@ ia_css_get_acc_configs( struct ia_css_pipe *pipe, struct ia_css_isp_config *config); - #if CONFIG_ON_FRAME_ENQUEUE() static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info *info, struct frame_data_wrapper *frame); #endif @@ -413,8 +412,8 @@ aspect_ratio_crop(struct ia_css_pipe *curr_pipe, static void sh_css_pipe_free_shading_table(struct ia_css_pipe *pipe) { - assert(pipe != NULL); - if (pipe == NULL) { + assert(pipe); + if (!pipe) { IA_CSS_ERROR("NULL input parameter"); return; } @@ -458,13 +457,13 @@ verify_copy_out_frame_format(struct ia_css_pipe *pipe) enum ia_css_frame_format out_fmt = pipe->output_info[0].format; unsigned int i, found = 0; - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); switch (pipe->stream->config.input_config.format) { case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: case ATOMISP_INPUT_FORMAT_YUV420_8: - for (i=0; iconfig.input_config.format, stream->config.pixels_per_clock == 2); @@ -533,8 +532,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) struct ia_css_binary *binary = NULL; enum ia_css_err err = IA_CSS_SUCCESS; - assert(stream != NULL); - assert(pipe != NULL); + assert(stream); + assert(pipe); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_config_input_network() enter:\n"); @@ -836,7 +835,7 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( isys_stream_descr->tpg_port_attr.sync_gen_cfg.hblank_cycles = 100; isys_stream_descr->tpg_port_attr.sync_gen_cfg.vblank_cycles = 100; isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_clock = stream_cfg->pixels_per_clock; - isys_stream_descr->tpg_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t) ~(0x0); + isys_stream_descr->tpg_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t)~(0x0); isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_line = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; isys_stream_descr->tpg_port_attr.sync_gen_cfg.lines_per_frame = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; @@ -853,7 +852,7 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( isys_stream_descr->prbs_port_attr.sync_gen_cfg.hblank_cycles = 100; isys_stream_descr->prbs_port_attr.sync_gen_cfg.vblank_cycles = 100; isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_clock = stream_cfg->pixels_per_clock; - isys_stream_descr->prbs_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t) ~(0x0); + isys_stream_descr->prbs_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t)~(0x0); isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_line = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; isys_stream_descr->prbs_port_attr.sync_gen_cfg.lines_per_frame = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; @@ -933,16 +932,13 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_resolution( if ((stream_cfg->mode == IA_CSS_INPUT_MODE_SENSOR || stream_cfg->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) && stream_cfg->source.port.compression.type != IA_CSS_CSI2_COMPRESSION_TYPE_NONE) { - if (stream_cfg->source.port.compression.uncompressed_bits_per_pixel == UNCOMPRESSED_BITS_PER_PIXEL_10) { fmt_type = ATOMISP_INPUT_FORMAT_RAW_10; - } - else if (stream_cfg->source.port.compression.uncompressed_bits_per_pixel == + } else if (stream_cfg->source.port.compression.uncompressed_bits_per_pixel == UNCOMPRESSED_BITS_PER_PIXEL_12) { fmt_type = ATOMISP_INPUT_FORMAT_RAW_12; - } - else + } else return false; } @@ -988,7 +984,7 @@ static bool sh_css_translate_stream_cfg_to_isys_stream_descr( rc &= sh_css_translate_stream_cfg_to_input_system_input_port_resolution(stream_cfg, isys_stream_descr, isys_stream_idx); isys_stream_descr->raw_packed = stream_cfg->pack_raw_pixels; - isys_stream_descr->linked_isys_stream_id = (int8_t) stream_cfg->isys_config[isys_stream_idx].linked_isys_stream_id; + isys_stream_descr->linked_isys_stream_id = (int8_t)stream_cfg->isys_config[isys_stream_idx].linked_isys_stream_id; /* * Early polling is required for timestamp accuracy in certain case. * The ISYS HW polling is started on @@ -1009,7 +1005,7 @@ static bool sh_css_translate_stream_cfg_to_isys_stream_descr( static bool sh_css_translate_binary_info_to_input_system_output_port_attr( struct ia_css_binary *binary, - ia_css_isys_descr_t *isys_stream_descr) + ia_css_isys_descr_t *isys_stream_descr) { if (!binary) return false; @@ -1030,10 +1026,10 @@ sh_css_config_input_network(struct ia_css_stream *stream) struct ia_css_pipe *pipe = NULL; struct ia_css_binary *binary = NULL; int i; - uint32_t isys_stream_id; + u32 isys_stream_id; bool early_polling = false; - assert(stream != NULL); + assert(stream); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_config_input_network() enter 0x%p:\n", stream); @@ -1062,16 +1058,14 @@ sh_css_config_input_network(struct ia_css_stream *stream) } } - assert(pipe != NULL); - if (pipe == NULL) + assert(pipe); + if (!pipe) return IA_CSS_ERR_INTERNAL_ERROR; - if (pipe->pipeline.stages != NULL) - if (pipe->pipeline.stages->binary != NULL) + if (pipe->pipeline.stages) + if (pipe->pipeline.stages->binary) binary = pipe->pipeline.stages->binary; - - if (binary) { /* this was being done in ifmtr in 2400. * online and cont bypass the init_in_frameinfo_memory_defaults @@ -1085,11 +1079,11 @@ sh_css_config_input_network(struct ia_css_stream *stream) if (!rc) return IA_CSS_ERR_INTERNAL_ERROR; /* get the target input terminal */ - sp_pipeline_input_terminal = &(sh_css_sp_group.pipe_io[sp_thread_id].input); + sp_pipeline_input_terminal = &sh_css_sp_group.pipe_io[sp_thread_id].input; for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { /* initialization */ - memset((void*)(&isys_stream_descr), 0, sizeof(ia_css_isys_descr_t)); + memset((void *)(&isys_stream_descr), 0, sizeof(ia_css_isys_descr_t)); sp_pipeline_input_terminal->context.virtual_input_system_stream[i].valid = 0; sp_pipeline_input_terminal->ctrl.virtual_input_system_stream_cfg[i].valid = 0; @@ -1098,7 +1092,7 @@ sh_css_config_input_network(struct ia_css_stream *stream) /* translate the stream configuration to the Input System (2401) configuration */ rc = sh_css_translate_stream_cfg_to_isys_stream_descr( - &(stream->config), + &stream->config, early_polling, &(isys_stream_descr), i); @@ -1116,18 +1110,18 @@ sh_css_config_input_network(struct ia_css_stream *stream) /* create the virtual Input System (2401) */ rc = ia_css_isys_stream_create( &(isys_stream_descr), - &(sp_pipeline_input_terminal->context.virtual_input_system_stream[i]), + &sp_pipeline_input_terminal->context.virtual_input_system_stream[i], isys_stream_id); if (!rc) return IA_CSS_ERR_INTERNAL_ERROR; /* calculate the configuration of the virtual Input System (2401) */ rc = ia_css_isys_stream_calculate_cfg( - &(sp_pipeline_input_terminal->context.virtual_input_system_stream[i]), + &sp_pipeline_input_terminal->context.virtual_input_system_stream[i], &(isys_stream_descr), - &(sp_pipeline_input_terminal->ctrl.virtual_input_system_stream_cfg[i])); + &sp_pipeline_input_terminal->ctrl.virtual_input_system_stream_cfg[i]); if (!rc) { - ia_css_isys_stream_destroy(&(sp_pipeline_input_terminal->context.virtual_input_system_stream[i])); + ia_css_isys_stream_destroy(&sp_pipeline_input_terminal->context.virtual_input_system_stream[i]); return IA_CSS_ERR_INTERNAL_ERROR; } } @@ -1142,7 +1136,8 @@ static inline struct ia_css_pipe *stream_get_last_pipe( struct ia_css_stream *stream) { struct ia_css_pipe *last_pipe = NULL; - if (stream != NULL) + + if (stream) last_pipe = stream->last_pipe; return last_pipe; @@ -1157,10 +1152,9 @@ static inline struct ia_css_pipe *stream_get_copy_pipe( last_pipe = stream_get_last_pipe(stream); - if ((stream != NULL) && - (last_pipe != NULL) && + if ((stream) && + (last_pipe) && (stream->config.continuous)) { - pipe_id = last_pipe->mode; switch (pipe_id) { case IA_CSS_PIPE_ID_PREVIEW: @@ -1198,16 +1192,16 @@ static enum ia_css_err stream_csi_rx_helper( enum ia_css_err (*func)(enum mipi_port_id, uint32_t)) { enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; - uint32_t sp_thread_id, stream_id; + u32 sp_thread_id, stream_id; bool rc; struct ia_css_pipe *target_pipe = NULL; - if ((stream == NULL) || (stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) + if ((!stream) || (stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) goto exit; target_pipe = stream_get_target_pipe(stream); - if (target_pipe == NULL) + if (!target_pipe) goto exit; rc = ia_css_pipeline_get_sp_thread_id( @@ -1221,7 +1215,8 @@ static enum ia_css_err stream_csi_rx_helper( stream_id = 0; do { if (stream->config.isys_config[stream_id].valid) { - uint32_t isys_stream_id = ia_css_isys_generate_stream_id(sp_thread_id, stream_id); + u32 isys_stream_id = ia_css_isys_generate_stream_id(sp_thread_id, stream_id); + retval = func(stream->config.source.port.port, isys_stream_id); } stream_id++; @@ -1251,11 +1246,11 @@ static int sh_binary_running; /* Enable sampling in the thread */ static void print_pc_histo(char *core_name, struct sh_css_pc_histogram *hist) { - unsigned i; - unsigned cnt_run = 0; - unsigned cnt_stall = 0; + unsigned int i; + unsigned int cnt_run = 0; + unsigned int cnt_stall = 0; - if (hist == NULL) + if (!hist) return; sh_css_print("%s histogram length = %d\n", core_name, hist->length); @@ -1270,8 +1265,7 @@ static void print_pc_histo(char *core_name, struct sh_css_pc_histogram *hist) cnt_stall += hist->stall[i]; } - sh_css_print(" Statistics for %s, cnt_run = %d, cnt_stall = %d, " - "hist->length = %d\n", + sh_css_print(" Statistics for %s, cnt_run = %d, cnt_stall = %d, hist->length = %d\n", core_name, cnt_run, cnt_stall, hist->length); } @@ -1292,8 +1286,8 @@ static void print_pc_histogram(void) sh_css_print(" pc_histogram for binary %d\n", metrics->id); print_pc_histo(" ISP", &metrics->isp_histogram); print_pc_histo(" SP", &metrics->sp_histogram); - sh_css_print("print_pc_histogram() done for binay->id = %d, " - "done.\n", metrics->id); + sh_css_print("print_pc_histogram() done for binay->id = %d, done.\n", + metrics->id); } sh_css_print("PC_MONITORING:print_pc_histogram() -- DONE\n"); @@ -1325,8 +1319,7 @@ static void spying_thread_create(void) static void input_frame_info(struct ia_css_frame_info frame_info) { - sh_css_print("SH_CSS:input_frame_info() -- frame->info.res.width = %d, " - "frame->info.res.height = %d, format = %d\n", + sh_css_print("SH_CSS:input_frame_info() -- frame->info.res.width = %d, frame->info.res.height = %d, format = %d\n", frame_info.res.width, frame_info.res.height, frame_info.format); } #endif /* WITH_PC_MONITORING */ @@ -1337,7 +1330,7 @@ start_binary(struct ia_css_pipe *pipe, { struct ia_css_stream *stream; - assert(pipe != NULL); + assert(pipe); /* Acceleration uses firmware, the binary thus can be NULL */ /* assert(binary != NULL); */ @@ -1354,8 +1347,7 @@ start_binary(struct ia_css_pipe *pipe, sh_css_metrics_start_binary(&binary->metrics); #if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() -- binary id = %d , " - "enable_dvs_envelope = %d\n", + sh_css_print("PC_MONITORING: %s() -- binary id = %d , enable_dvs_envelope = %d\n", __func__, binary->info->sp.id, binary->info->sp.enable.dvs_envelope); input_frame_info(binary->in_frame_info); @@ -1378,12 +1370,11 @@ static enum ia_css_err start_copy_on_sp(struct ia_css_pipe *pipe, struct ia_css_frame *out_frame) { - (void)out_frame; - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); - if ((pipe == NULL) || (pipe->stream == NULL)) + if ((!pipe) || (!pipe->stream)) return IA_CSS_ERR_INVALID_ARGUMENTS; #if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) @@ -1438,7 +1429,7 @@ static void start_pipe( IA_CSS_ENTER_PRIVATE("me = %p, copy_ovrd = %d, input_mode = %d", me, copy_ovrd, input_mode); - assert(me != NULL); /* all callers are in this file and call with non null argument */ + assert(me); /* all callers are in this file and call with non null argument */ sh_css_sp_init_pipeline(&me->pipeline, me->mode, @@ -1453,18 +1444,19 @@ static void start_pipe( &me->stream->config.metadata_config, &me->stream->info.metadata_info #if !defined(HAS_NO_INPUT_SYSTEM) - ,(input_mode==IA_CSS_INPUT_MODE_MEMORY) ? + , (input_mode == IA_CSS_INPUT_MODE_MEMORY) ? (enum mipi_port_id)0 : me->stream->config.source.port.port #endif #ifdef ISP2401 - ,&me->config.internal_frame_origin_bqs_on_sctbl, + , &me->config.internal_frame_origin_bqs_on_sctbl, me->stream->isp_params_configs #endif ); if (me->config.mode != IA_CSS_PIPE_MODE_COPY) { struct ia_css_pipeline_stage *stage; + stage = me->pipeline.stages; if (stage) { me->pipeline.current_stage = stage; @@ -1478,13 +1470,14 @@ void sh_css_invalidate_shading_tables(struct ia_css_stream *stream) { int i; - assert(stream != NULL); + + assert(stream); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_invalidate_shading_tables() enter:\n"); - for (i=0; inum_pipes; i++) { - assert(stream->pipes[i] != NULL); + for (i = 0; i < stream->num_pipes; i++) { + assert(stream->pipes[i]); sh_css_pipe_free_shading_table(stream->pipes[i]); } @@ -1500,6 +1493,7 @@ enable_interrupts(enum ia_css_irq_type irq_type) enum mipi_port_id port; #endif bool enable_pulse = irq_type != IA_CSS_IRQ_TYPE_EDGE; + IA_CSS_ENTER_PRIVATE(""); /* Enable IRQ on the SP which signals that SP goes to idle * (aka ready state) */ @@ -1536,10 +1530,10 @@ enable_interrupts(enum ia_css_irq_type irq_type) #endif static bool sh_css_setup_spctrl_config(const struct ia_css_fw_info *fw, - const char * program, + const char *program, ia_css_spctrl_cfg *spctrl_cfg) { - if((fw == NULL)||(spctrl_cfg == NULL)) + if ((!fw) || (!spctrl_cfg)) return false; spctrl_cfg->sp_entry = 0; spctrl_cfg->program_name = (char *)(program); @@ -1547,7 +1541,7 @@ static bool sh_css_setup_spctrl_config(const struct ia_css_fw_info *fw, spctrl_cfg->ddr_data_offset = fw->blob.data_source; spctrl_cfg->dmem_data_addr = fw->blob.data_target; spctrl_cfg->dmem_bss_addr = fw->blob.bss_target; - spctrl_cfg->data_size = fw->blob.data_size ; + spctrl_cfg->data_size = fw->blob.data_size; spctrl_cfg->bss_size = fw->blob.bss_size; spctrl_cfg->spctrl_config_dmem_addr = fw->info.sp.init_dmem_data; @@ -1559,6 +1553,7 @@ static bool sh_css_setup_spctrl_config(const struct ia_css_fw_info *fw, return true; } + void ia_css_unload_firmware(void) { @@ -1572,7 +1567,7 @@ ia_css_unload_firmware(void) } static void -ia_css_reset_defaults(struct sh_css* css) +ia_css_reset_defaults(struct sh_css *css) { struct sh_css default_css; @@ -1598,7 +1593,7 @@ ia_css_check_firmware_version(const struct ia_css_fw *fw) { bool retval = false; - if (fw != NULL) { + if (fw) { retval = sh_css_check_firmware_version(fw->data); } return retval; @@ -1610,9 +1605,9 @@ ia_css_load_firmware(const struct ia_css_env *env, { enum ia_css_err err; - if (env == NULL) + if (!env) return IA_CSS_ERR_INVALID_ARGUMENTS; - if (fw == NULL) + if (!fw) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_load_firmware() enter\n"); @@ -1631,14 +1626,14 @@ ia_css_load_firmware(const struct ia_css_env *env, fw_explicitly_loaded = true; } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_load_firmware() leave \n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_load_firmware() leave\n"); return err; } enum ia_css_err ia_css_init(const struct ia_css_env *env, const struct ia_css_fw *fw, - uint32_t mmu_l1_base, + u32 mmu_l1_base, enum ia_css_irq_type irq_type) { enum ia_css_err err; @@ -1664,29 +1659,29 @@ ia_css_init(const struct ia_css_env *env, * equal, functionality will break. */ /* Check struct sh_css_ddr_address_map */ - COMPILATION_ERROR_IF( sizeof(struct sh_css_ddr_address_map) != SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT ); + COMPILATION_ERROR_IF(sizeof(struct sh_css_ddr_address_map) != SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT); /* Check struct host_sp_queues */ - COMPILATION_ERROR_IF( sizeof(struct host_sp_queues) != SIZE_OF_HOST_SP_QUEUES_STRUCT ); - COMPILATION_ERROR_IF( sizeof(struct ia_css_circbuf_desc_s) != SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT ); - COMPILATION_ERROR_IF( sizeof(struct ia_css_circbuf_elem_s) != SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT ); + COMPILATION_ERROR_IF(sizeof(struct host_sp_queues) != SIZE_OF_HOST_SP_QUEUES_STRUCT); + COMPILATION_ERROR_IF(sizeof(struct ia_css_circbuf_desc_s) != SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT); + COMPILATION_ERROR_IF(sizeof(struct ia_css_circbuf_elem_s) != SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT); /* Check struct host_sp_communication */ - COMPILATION_ERROR_IF( sizeof(struct host_sp_communication) != SIZE_OF_HOST_SP_COMMUNICATION_STRUCT ); - COMPILATION_ERROR_IF( sizeof(struct sh_css_event_irq_mask) != SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT ); + COMPILATION_ERROR_IF(sizeof(struct host_sp_communication) != SIZE_OF_HOST_SP_COMMUNICATION_STRUCT); + COMPILATION_ERROR_IF(sizeof(struct sh_css_event_irq_mask) != SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT); /* Check struct sh_css_hmm_buffer */ - COMPILATION_ERROR_IF( sizeof(struct sh_css_hmm_buffer) != SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT ); - COMPILATION_ERROR_IF( sizeof(struct ia_css_isp_3a_statistics) != SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT ); - COMPILATION_ERROR_IF( sizeof(struct ia_css_isp_dvs_statistics) != SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT ); - COMPILATION_ERROR_IF( sizeof(struct ia_css_metadata) != SIZE_OF_IA_CSS_METADATA_STRUCT ); + COMPILATION_ERROR_IF(sizeof(struct sh_css_hmm_buffer) != SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT); + COMPILATION_ERROR_IF(sizeof(struct ia_css_isp_3a_statistics) != SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT); + COMPILATION_ERROR_IF(sizeof(struct ia_css_isp_dvs_statistics) != SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT); + COMPILATION_ERROR_IF(sizeof(struct ia_css_metadata) != SIZE_OF_IA_CSS_METADATA_STRUCT); /* Check struct ia_css_init_dmem_cfg */ - COMPILATION_ERROR_IF( sizeof(struct ia_css_sp_init_dmem_cfg) != SIZE_OF_IA_CSS_SP_INIT_DMEM_CFG_STRUCT ); + COMPILATION_ERROR_IF(sizeof(struct ia_css_sp_init_dmem_cfg) != SIZE_OF_IA_CSS_SP_INIT_DMEM_CFG_STRUCT); - if (fw == NULL && !fw_explicitly_loaded) + if (!fw && !fw_explicitly_loaded) return IA_CSS_ERR_INVALID_ARGUMENTS; - if (env == NULL) - return IA_CSS_ERR_INVALID_ARGUMENTS; + if (!env) + return IA_CSS_ERR_INVALID_ARGUMENTS; sh_css_printf = env->print_env.debug_print; @@ -1786,7 +1781,7 @@ ia_css_init(const struct ia_css_env *env, my_css_save.loaded_fw = (struct ia_css_fw *)fw; #endif } - if(!sh_css_setup_spctrl_config(&sh_css_sp_fw,SP_PROG_NAME,&spctrl_cfg)) + if (!sh_css_setup_spctrl_config(&sh_css_sp_fw, SP_PROG_NAME, &spctrl_cfg)) return IA_CSS_ERR_INTERNAL_ERROR; err = ia_css_spctrl_load_fw(SP0_ID, &spctrl_cfg); @@ -1817,7 +1812,7 @@ ia_css_init(const struct ia_css_env *env, #if defined(HAS_INPUT_SYSTEM_VERSION_2) && defined(HAS_INPUT_SYSTEM_VERSION_2401) #if defined(USE_INPUT_SYSTEM_VERSION_2) gp_device_reg_store(GP_DEVICE0_ID, _REG_GP_SWITCH_ISYS2401_ADDR, 0); -#elif defined (USE_INPUT_SYSTEM_VERSION_2401) +#elif defined(USE_INPUT_SYSTEM_VERSION_2401) gp_device_reg_store(GP_DEVICE0_ID, _REG_GP_SWITCH_ISYS2401_ADDR, 1); #endif #endif @@ -1826,7 +1821,7 @@ ia_css_init(const struct ia_css_env *env, dma_set_max_burst_size(DMA0_ID, HIVE_DMA_BUS_DDR_CONN, ISP_DMA_MAX_BURST_LENGTH); - if(ia_css_isys_init() != INPUT_SYSTEM_ERR_NO_ERROR) + if (ia_css_isys_init() != INPUT_SYSTEM_ERR_NO_ERROR) err = IA_CSS_ERR_INVALID_ARGUMENTS; #endif @@ -1839,10 +1834,11 @@ ia_css_init(const struct ia_css_env *env, enum ia_css_err ia_css_suspend(void) { int i; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() enter\n"); my_css_save.mode = sh_css_mode_suspend; - for(i=0;i unloading seed %d (%p)\n", i, my_css_save.stream_seeds[i].stream); ia_css_stream_unload(my_css_save.stream_seeds[i].stream); @@ -1850,7 +1846,7 @@ enum ia_css_err ia_css_suspend(void) my_css_save.mode = sh_css_mode_working; ia_css_stop_sp(); ia_css_uninit(); - for(i=0;i after 1: seed %d (%p)\n", i, my_css_save.stream_seeds[i].stream); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() leave\n"); return IA_CSS_SUCCESS; @@ -1861,33 +1857,34 @@ ia_css_resume(void) { int i, j; enum ia_css_err err; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_resume() enter: void\n"); - err = ia_css_init(&(my_css_save.driver_env), my_css_save.loaded_fw, my_css_save.mmu_base, my_css_save.irq_type); + err = ia_css_init(&my_css_save.driver_env, my_css_save.loaded_fw, my_css_save.mmu_base, my_css_save.irq_type); if (err != IA_CSS_SUCCESS) return err; err = ia_css_start_sp(); if (err != IA_CSS_SUCCESS) return err; my_css_save.mode = sh_css_mode_resume; - for(i=0;i seed stream %p\n", my_css_save.stream_seeds[i].stream); - if (my_css_save.stream_seeds[i].stream != NULL) + if (my_css_save.stream_seeds[i].stream) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> loading seed %d\n", i); err = ia_css_stream_load(my_css_save.stream_seeds[i].stream); if (err != IA_CSS_SUCCESS) { if (i) - for(j=0;j 0) { - p = sh_css_malloc(N*size); + p = sh_css_malloc(N * size); if (p) memset(p, 0, size); return p; @@ -1953,7 +1950,7 @@ void sh_css_flush(struct ia_css_acc_fw *fw) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_flush() enter:\n"); - if ((fw != NULL) && (my_css.flush != NULL)) + if ((fw) && (my_css.flush)) my_css.flush(fw); } @@ -1971,11 +1968,11 @@ map_sp_threads(struct ia_css_stream *stream, bool map) enum ia_css_err err = IA_CSS_SUCCESS; enum ia_css_pipe_id pipe_id; - assert(stream != NULL); + assert(stream); IA_CSS_ENTER_PRIVATE("stream = %p, map = %s", stream, map ? "true" : "false"); - if (stream == NULL) { + if (!stream) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2007,17 +2004,18 @@ map_sp_threads(struct ia_css_stream *stream, bool map) ia_css_pipeline_map(acc_pipe->pipe_num, map); } - if(capture_pipe) { + if (capture_pipe) { ia_css_pipeline_map(capture_pipe->pipe_num, map); } /* Firmware expects copy pipe to be the last pipe mapped. (if needed) */ - if(copy_pipe) { + if (copy_pipe) { ia_css_pipeline_map(copy_pipe->pipe_num, map); } /* DH regular multi pipe - not continuous mode: map the next pipes too */ if (!stream->config.continuous) { int i; + for (i = 1; i < stream->num_pipes; i++) ia_css_pipeline_map(stream->pipes[i]->pipe_num, map); } @@ -2039,17 +2037,17 @@ create_host_pipeline_structure(struct ia_css_stream *stream) unsigned int copy_pipe_delay = 0, capture_pipe_delay = 0; - assert(stream != NULL); + assert(stream); IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (stream == NULL) { + if (!stream) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } main_pipe = stream->last_pipe; - assert(main_pipe != NULL); - if (main_pipe == NULL) { + assert(main_pipe); + if (!main_pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2092,27 +2090,28 @@ create_host_pipeline_structure(struct ia_css_stream *stream) err = IA_CSS_ERR_INVALID_ARGUMENTS; } - if ((IA_CSS_SUCCESS == err) && copy_pipe) { + if ((err == IA_CSS_SUCCESS) && copy_pipe) { err = ia_css_pipeline_create(©_pipe->pipeline, copy_pipe->mode, copy_pipe->pipe_num, copy_pipe_delay); } - if ((IA_CSS_SUCCESS == err) && capture_pipe) { + if ((err == IA_CSS_SUCCESS) && capture_pipe) { err = ia_css_pipeline_create(&capture_pipe->pipeline, capture_pipe->mode, capture_pipe->pipe_num, capture_pipe_delay); } - if ((IA_CSS_SUCCESS == err) && acc_pipe) { + if ((err == IA_CSS_SUCCESS) && acc_pipe) { err = ia_css_pipeline_create(&acc_pipe->pipeline, acc_pipe->mode, acc_pipe->pipe_num, main_pipe->dvs_frame_delay); } /* DH regular multi pipe - not continuous mode: create the next pipelines too */ - if (!stream->config.continuous) { + if (!stream->config.continuous) { int i; + for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err; i++) { main_pipe = stream->pipes[i]; err = ia_css_pipeline_create(&main_pipe->pipeline, @@ -2136,10 +2135,10 @@ create_host_pipeline(struct ia_css_stream *stream) enum ia_css_pipe_id pipe_id; struct ia_css_pipe *main_pipe = NULL; enum ia_css_err err = IA_CSS_SUCCESS; - unsigned max_input_width = 0; + unsigned int max_input_width = 0; IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (stream == NULL) { + if (!stream) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2163,7 +2162,6 @@ create_host_pipeline(struct ia_css_stream *stream) if (err != IA_CSS_SUCCESS) goto ERR; } - } #if defined(USE_INPUT_SYSTEM_VERSION_2) @@ -2232,14 +2230,14 @@ create_host_pipeline(struct ia_css_stream *stream) if (err != IA_CSS_SUCCESS) goto ERR; - if(copy_pipe) { + if (copy_pipe) { err = create_host_copy_pipeline(copy_pipe, max_input_width, main_pipe->continuous_frames[0]); if (err != IA_CSS_SUCCESS) goto ERR; } - if(capture_pipe) { + if (capture_pipe) { err = create_host_capture_pipeline(capture_pipe); if (err != IA_CSS_SUCCESS) goto ERR; @@ -2254,6 +2252,7 @@ create_host_pipeline(struct ia_css_stream *stream) /* DH regular multi pipe - not continuous mode: create the next pipelines too */ if (!stream->config.continuous) { int i; + for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err; i++) { switch (stream->pipes[i]->mode) { case IA_CSS_PIPE_ID_PREVIEW: @@ -2289,7 +2288,7 @@ init_pipe_defaults(enum ia_css_pipe_mode mode, struct ia_css_pipe *pipe, bool copy_pipe) { - if (pipe == NULL) { + if (!pipe) { IA_CSS_ERROR("NULL pipe parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2335,7 +2334,7 @@ init_pipe_defaults(enum ia_css_pipe_mode mode, static void pipe_global_init(void) { - uint8_t i; + u8 i; my_css.pipe_counter = 0; for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { @@ -2346,18 +2345,18 @@ pipe_global_init(void) static enum ia_css_err pipe_generate_pipe_num(const struct ia_css_pipe *pipe, unsigned int *pipe_number) { - const uint8_t INVALID_PIPE_NUM = (uint8_t)~(0); - uint8_t pipe_num = INVALID_PIPE_NUM; - uint8_t i; + const u8 INVALID_PIPE_NUM = (uint8_t)~(0); + u8 pipe_num = INVALID_PIPE_NUM; + u8 i; - if (pipe == NULL) { + if (!pipe) { IA_CSS_ERROR("NULL pipe parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } /* Assign a new pipe_num .... search for empty place */ for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { - if (my_css.all_pipes[i] == NULL) { + if (!my_css.all_pipes[i]) { /*position is reserved */ my_css.all_pipes[i] = (struct ia_css_pipe *)pipe; pipe_num = i; @@ -2395,7 +2394,7 @@ create_pipe(enum ia_css_pipe_mode mode, enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_pipe *me; - if (pipe == NULL) { + if (!pipe) { IA_CSS_ERROR("NULL pipe parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2410,7 +2409,7 @@ create_pipe(enum ia_css_pipe_mode mode, return err; } - err = pipe_generate_pipe_num(me, &(me->pipe_num)); + err = pipe_generate_pipe_num(me, &me->pipe_num); if (err != IA_CSS_SUCCESS) { kfree(me); return err; @@ -2424,7 +2423,8 @@ struct ia_css_pipe * find_pipe_by_num(uint32_t pipe_num) { unsigned int i; - for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++){ + + for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { if (my_css.all_pipes[i] && ia_css_pipe_get_pipe_num(my_css.all_pipes[i]) == pipe_num) { return my_css.all_pipes[i]; @@ -2433,14 +2433,14 @@ find_pipe_by_num(uint32_t pipe_num) return NULL; } -static void sh_css_pipe_free_acc_binaries ( +static void sh_css_pipe_free_acc_binaries( struct ia_css_pipe *pipe) { struct ia_css_pipeline *pipeline; struct ia_css_pipeline_stage *stage; - assert(pipe != NULL); - if (pipe == NULL) { + assert(pipe); + if (!pipe) { IA_CSS_ERROR("NULL input pointer"); return; } @@ -2459,14 +2459,15 @@ enum ia_css_err ia_css_pipe_destroy(struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER("pipe = %p", pipe); - if (pipe == NULL) { + if (!pipe) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if (pipe->stream != NULL) { + if (pipe->stream) { IA_CSS_LOG("ia_css_stream_destroy not called!"); IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -2483,8 +2484,8 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) pipe->cont_md_buffers); if (pipe->pipe_settings.preview.copy_pipe) { err = ia_css_pipe_destroy(pipe->pipe_settings.preview.copy_pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): " - "destroyed internal copy pipe err=%d\n", err); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): destroyed internal copy pipe err=%d\n", + err); } } break; @@ -2496,8 +2497,8 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) pipe->cont_md_buffers); if (pipe->pipe_settings.video.copy_pipe) { err = ia_css_pipe_destroy(pipe->pipe_settings.video.copy_pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): " - "destroyed internal copy pipe err=%d\n", err); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): destroyed internal copy pipe err=%d\n", + err); } } #ifndef ISP2401 @@ -2548,7 +2549,6 @@ ia_css_uninit(void) sh_css_params_free_default_gdc_lut(); - /* TODO: JB: implement decent check and handling of freeing mipi frames */ //assert(ref_count_mipi_allocation == 0); //mipi frames are not freed /* cleanup generic data */ @@ -2591,7 +2591,7 @@ enum ia_css_err ia_css_irq_translate( /* irq_infos can be NULL, but that would make the function useless */ /* assert(irq_infos != NULL); */ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() enter: irq_infos=%p\n",irq_infos); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() enter: irq_infos=%p\n", irq_infos); while (status == hrt_isp_css_irq_status_more_irqs) { status = virq_get_channel_id(&irq); @@ -2599,9 +2599,9 @@ enum ia_css_err ia_css_irq_translate( return IA_CSS_ERR_INTERNAL_ERROR; #if WITH_PC_MONITORING - sh_css_print("PC_MONITORING: %s() irq = %d, " - "sh_binary_running set to 0\n", __func__, irq); - sh_binary_running = 0 ; + sh_css_print("PC_MONITORING: %s() irq = %d, sh_binary_running set to 0\n", + __func__, irq); + sh_binary_running = 0; #endif switch (irq) { @@ -2646,8 +2646,8 @@ enum ia_css_err ia_css_irq_translate( if (irq_infos) *irq_infos = infos; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() " - "leave: irq_infos=%u\n", infos); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() leave: irq_infos=%u\n", + infos); return IA_CSS_SUCCESS; } @@ -2657,6 +2657,7 @@ enum ia_css_err ia_css_irq_enable( bool enable) { virq_id_t irq = N_virq_id; + IA_CSS_ENTER("info=%d, enable=%d", info, enable); switch (info) { @@ -2705,9 +2706,10 @@ static unsigned int sh_css_get_sw_interrupt_value(unsigned int irq) { unsigned int irq_value; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() enter: irq=%d\n",irq); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() enter: irq=%d\n", irq); irq_value = sh_css_sp_get_sw_interrupt_value(irq); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() leave: irq_value=%d\n",irq_value); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() leave: irq_value=%d\n", irq_value); return irq_value; } @@ -2724,12 +2726,12 @@ static enum ia_css_err load_copy_binary( struct ia_css_binary_descr copy_descr; /* next_binary can be NULL */ - assert(pipe != NULL); - assert(copy_binary != NULL); + assert(pipe); + assert(copy_binary); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "load_copy_binary() enter:\n"); - if (next_binary != NULL) { + if (next_binary) { copy_out_info = next_binary->in_frame_info; left_padding = next_binary->left_padding; } else { @@ -2740,7 +2742,7 @@ static enum ia_css_err load_copy_binary( } ia_css_pipe_get_copy_binarydesc(pipe, ©_descr, - ©_in_info, ©_out_info, (next_binary != NULL) ? NULL : NULL/*TODO: ©_vf_info*/); + ©_in_info, ©_out_info, (next_binary) ? NULL : NULL/*TODO: ©_vf_info*/); err = ia_css_binary_find(©_descr, copy_binary); if (err != IA_CSS_SUCCESS) return err; @@ -2762,7 +2764,7 @@ alloc_continuous_frames( IA_CSS_ENTER_PRIVATE("pipe = %p, init_time = %d", pipe, init_time); - if ((pipe == NULL) || (pipe->stream == NULL)) { + if ((!pipe) || (!pipe->stream)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2784,8 +2786,7 @@ alloc_continuous_frames( ref_info = pipe->pipe_settings.preview.preview_binary.in_frame_info; } else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) { ref_info = pipe->pipe_settings.video.video_binary.in_frame_info; - } - else { + } else { /* should not happen */ IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; @@ -2863,7 +2864,7 @@ alloc_continuous_frames( enum ia_css_err ia_css_alloc_continuous_frame_remain(struct ia_css_stream *stream) { - if (stream == NULL) + if (!stream) return IA_CSS_ERR_INVALID_ARGUMENTS; return alloc_continuous_frames(stream->continuous_pipe, false); } @@ -2888,8 +2889,8 @@ load_preview_binaries(struct ia_css_pipe *pipe) struct ia_css_preview_settings *mycs = &pipe->pipe_settings.preview; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); assert(pipe->mode == IA_CSS_PIPE_ID_PREVIEW); online = pipe->stream->config.online; @@ -2976,7 +2977,6 @@ load_preview_binaries(struct ia_css_pipe *pipe) */ if (need_vf_pp && (mycs->preview_binary.out_frame_info[0].format != IA_CSS_FRAME_FORMAT_YUV_LINE)) { - /* Preview step 2 */ if (pipe->vf_yuv_ds_input_info.res.width) prev_vf_info = pipe->vf_yuv_ds_input_info; @@ -3060,7 +3060,7 @@ unload_preview_binaries(struct ia_css_pipe *pipe) { IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -3081,6 +3081,7 @@ static const struct ia_css_fw_info *last_output_firmware( for (; fw; fw = fw->next) { const struct ia_css_fw_info *info = fw; + if (info->info.isp.sp.enable.output) last_fw = fw; } @@ -3111,6 +3112,7 @@ static enum ia_css_err add_firmwares( struct ia_css_frame *out[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; struct ia_css_frame *in = NULL; struct ia_css_frame *vf = NULL; + if ((fw == last_fw) && (fw->info.isp.sp.enable.out_frame != 0)) { out[0] = out_frame; } @@ -3145,7 +3147,6 @@ static enum ia_css_err add_vf_pp_stage( struct ia_css_binary *vf_pp_binary, struct ia_css_pipeline_stage **vf_pp_stage) { - struct ia_css_pipeline *me = NULL; const struct ia_css_fw_info *last_fw = NULL; enum ia_css_err err = IA_CSS_SUCCESS; @@ -3154,13 +3155,13 @@ static enum ia_css_err add_vf_pp_stage( /* out_frame can be NULL ??? */ - if (pipe == NULL) + if (!pipe) return IA_CSS_ERR_INVALID_ARGUMENTS; - if (in_frame == NULL) + if (!in_frame) return IA_CSS_ERR_INVALID_ARGUMENTS; - if (vf_pp_binary == NULL) + if (!vf_pp_binary) return IA_CSS_ERR_INVALID_ARGUMENTS; - if (vf_pp_stage == NULL) + if (!vf_pp_stage) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_pipe_util_create_output_frames(out_frames); @@ -3177,7 +3178,7 @@ static enum ia_css_err add_vf_pp_stage( ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, vf_pp_binary, out_frames, in_frame, NULL); - } else{ + } else { ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); ia_css_pipe_get_generic_stage_desc(&stage_desc, vf_pp_binary, out_frames, in_frame, NULL); @@ -3210,11 +3211,11 @@ static enum ia_css_err add_yuv_scaler_stage( struct ia_css_pipeline_stage_desc stage_desc; /* out_frame can be NULL ??? */ - assert(in_frame != NULL); - assert(pipe != NULL); - assert(me != NULL); - assert(yuv_scaler_binary != NULL); - assert(pre_vf_pp_stage != NULL); + assert(in_frame); + assert(pipe); + assert(me); + assert(yuv_scaler_binary); + assert(pre_vf_pp_stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "add_yuv_scaler_stage() enter:\n"); @@ -3223,7 +3224,7 @@ static enum ia_css_err add_yuv_scaler_stage( last_fw = last_output_firmware(pipe->output_stage); - if(last_fw) { + if (last_fw) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, yuv_scaler_binary, out_frames, in_frame, vf_frame); @@ -3267,11 +3268,11 @@ static enum ia_css_err add_capture_pp_stage( struct ia_css_pipeline_stage_desc stage_desc; /* out_frame can be NULL ??? */ - assert(in_frame != NULL); - assert(pipe != NULL); - assert(me != NULL); - assert(capture_pp_binary != NULL); - assert(capture_pp_stage != NULL); + assert(in_frame); + assert(pipe); + assert(me); + assert(capture_pp_binary); + assert(capture_pp_stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "add_capture_pp_stage() enter:\n"); @@ -3283,7 +3284,7 @@ static enum ia_css_err add_capture_pp_stage( &capture_pp_binary->vf_frame_info); if (err != IA_CSS_SUCCESS) return err; - if(last_fw) { + if (last_fw) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_pp_binary, out_frames, NULL, vf_frame); @@ -3339,7 +3340,7 @@ init_vf_frameinfo_defaults(struct ia_css_pipe *pipe, unsigned int thread_id; enum sh_css_queue_id queue_id; - assert(vf_frame != NULL); + assert(vf_frame); sh_css_pipe_get_viewfinder_frame_info(pipe, &vf_frame->info, idx); vf_frame->contiguous = false; @@ -3355,24 +3356,24 @@ init_vf_frameinfo_defaults(struct ia_css_pipe *pipe, #ifdef USE_INPUT_SYSTEM_VERSION_2401 static unsigned int -get_crop_lines_for_bayer_order ( +get_crop_lines_for_bayer_order( const struct ia_css_stream_config *config) { - assert(config != NULL); - if ((IA_CSS_BAYER_ORDER_BGGR == config->input_config.bayer_order) - || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + assert(config); + if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_BGGR) + || (config->input_config.bayer_order == IA_CSS_BAYER_ORDER_GBRG)) return 1; return 0; } static unsigned int -get_crop_columns_for_bayer_order ( +get_crop_columns_for_bayer_order( const struct ia_css_stream_config *config) { - assert(config != NULL); - if ((IA_CSS_BAYER_ORDER_RGGB == config->input_config.bayer_order) - || (IA_CSS_BAYER_ORDER_GBRG == config->input_config.bayer_order)) + assert(config); + if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_RGGB) + || (config->input_config.bayer_order == IA_CSS_BAYER_ORDER_GBRG)) return 1; return 0; @@ -3426,7 +3427,7 @@ static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, } void -ia_css_get_crop_offsets ( +ia_css_get_crop_offsets( struct ia_css_pipe *pipe, struct ia_css_frame_info *in_frame) { @@ -3437,9 +3438,9 @@ ia_css_get_crop_offsets ( unsigned int extra_row = 0, extra_col = 0; unsigned int min_reqd_height, min_reqd_width; - assert(pipe != NULL); - assert(pipe->stream != NULL); - assert(in_frame != NULL); + assert(pipe); + assert(pipe->stream); + assert(in_frame); IA_CSS_ENTER_PRIVATE("pipe = %p effective_wd = %u effective_ht = %u", pipe, pipe->config.input_effective_res.width, @@ -3498,7 +3499,7 @@ init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, unsigned int thread_id; enum sh_css_queue_id queue_id; - assert(frame != NULL); + assert(frame); in_frame = frame; in_frame->info.format = format; @@ -3509,7 +3510,6 @@ init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, IA_CSS_FRAME_FORMAT_RAW_PACKED : IA_CSS_FRAME_FORMAT_RAW; #endif - in_frame->info.res.width = pipe->stream->config.input_config.input_res.width; in_frame->info.res.height = pipe->stream->config.input_config.input_res.height; in_frame->info.raw_bit_depth = @@ -3540,7 +3540,7 @@ init_out_frameinfo_defaults(struct ia_css_pipe *pipe, unsigned int thread_id; enum sh_css_queue_id queue_id; - assert(out_frame != NULL); + assert(out_frame); sh_css_pipe_get_output_frame_info(pipe, &out_frame->info, idx); out_frame->contiguous = false; @@ -3573,14 +3573,14 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) bool need_copy = false; bool need_vf_pp = false; bool need_yuv_pp = false; - unsigned num_output_pins; + unsigned int num_output_pins; bool need_in_frameinfo_memory = false; unsigned int i, num_yuv_scaler; bool *is_output_stage = NULL; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -3633,9 +3633,9 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) num_yuv_scaler = pipe->pipe_settings.video.num_yuv_scaler; is_output_stage = pipe->pipe_settings.video.is_output_stage; - need_copy = (copy_binary != NULL && copy_binary->info != NULL); - need_vf_pp = (vf_pp_binary != NULL && vf_pp_binary->info != NULL); - need_yuv_pp = (yuv_scaler_binary != NULL && yuv_scaler_binary->info != NULL); + need_copy = (copy_binary && copy_binary->info); + need_vf_pp = (vf_pp_binary && vf_pp_binary->info); + need_yuv_pp = (yuv_scaler_binary && yuv_scaler_binary->info); if (need_copy) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); @@ -3662,7 +3662,7 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) /* when the video binary supports a second output pin, it can directly produce the vf_frame. */ - if(need_vf_pp) { + if (need_vf_pp) { ia_css_pipe_get_generic_stage_desc(&stage_desc, video_binary, out_frames, in_frame, NULL); } else { @@ -3676,7 +3676,7 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) goto ERR; /* If we use copy iso video, the input must be yuv iso raw */ - if(video_stage) { + if (video_stage) { video_stage->args.copy_vf = video_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; video_stage->args.copy_output = video_stage->args.copy_vf; @@ -3717,16 +3717,15 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) if ((pipe->config.acc_extension->info.isp.sp.enable.output) && (pipe->config.acc_extension->info.isp.sp.enable.in_frame) && (pipe->config.acc_extension->info.isp.sp.enable.out_frame)) { - /* In/Out Frame mapping to support output frame extension.*/ out = video_stage->args.out_frame[0]; - err = ia_css_frame_allocate_from_info(&in, &(pipe->output_info[0])); + err = ia_css_frame_allocate_from_info(&in, &pipe->output_info[0]); if (err != IA_CSS_SUCCESS) goto ERR; video_stage->args.out_frame[0] = in; } - err = add_firmwares( me, video_binary, pipe->output_stage, + err = add_firmwares(me, video_binary, pipe->output_stage, last_output_firmware(pipe->output_stage), IA_CSS_BINARY_MODE_VIDEO, in, out, NULL, &video_stage, NULL); @@ -3775,7 +3774,7 @@ create_host_acc_pipeline(struct ia_css_pipe *pipe) unsigned int i; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->stream == NULL)) { + if ((!pipe) || (!pipe->stream)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -3786,14 +3785,15 @@ create_host_acc_pipeline(struct ia_css_pipe *pipe) pipe->pipeline.pipe_qos_config = 0; fw = pipe->vf_stage; - for (i = 0; fw; fw = fw->next){ + for (i = 0; fw; fw = fw->next) { err = sh_css_pipeline_add_acc_stage(&pipe->pipeline, fw); if (err != IA_CSS_SUCCESS) goto ERR; } - for (i=0; iconfig.num_acc_stages; i++) { + for (i = 0; i < pipe->config.num_acc_stages; i++) { struct ia_css_fw_info *fw = pipe->config.acc_stages[i]; + err = sh_css_pipeline_add_acc_stage(&pipe->pipeline, fw); if (err != IA_CSS_SUCCESS) goto ERR; @@ -3829,12 +3829,11 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) #endif IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - ia_css_pipe_util_create_output_frames(out_frames); /* pipeline already created as part of create_host_pipeline_structure */ me = &pipe->pipeline; @@ -3897,7 +3896,7 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) /* When continuous is enabled, configure in_frame with the * last pipe, which is the copy pipe. */ - if (continuous || !online){ + if (continuous || !online) { in_frame = pipe->stream->last_pipe->continuous_frames[0]; } #else @@ -3970,7 +3969,7 @@ static void send_raw_frames(struct ia_css_pipe *pipe) static enum ia_css_err preview_start(struct ia_css_pipe *pipe) { - struct ia_css_pipeline *me ; + struct ia_css_pipeline *me; struct ia_css_binary *copy_binary, *preview_binary, *vf_pp_binary = NULL; enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_pipe *copy_pipe, *capture_pipe; @@ -3979,7 +3978,7 @@ preview_start(struct ia_css_pipe *pipe) enum ia_css_input_mode preview_pipe_input_mode; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4045,7 +4044,7 @@ preview_start(struct ia_css_pipe *pipe) #ifndef ISP2401 ); #else - &pipe->config.internal_frame_origin_bqs_on_sctbl, + & pipe->config.internal_frame_origin_bqs_on_sctbl, pipe->stream->isp_params_configs); #endif @@ -4082,7 +4081,7 @@ preview_start(struct ia_css_pipe *pipe) #ifndef ISP2401 ); #else - &capture_pipe->config.internal_frame_origin_bqs_on_sctbl, + & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, capture_pipe->stream->isp_params_configs); #endif } @@ -4090,7 +4089,7 @@ preview_start(struct ia_css_pipe *pipe) if (acc_pipe) { sh_css_sp_init_pipeline(&acc_pipe->pipeline, IA_CSS_PIPE_ID_ACC, - (uint8_t) ia_css_pipe_get_pipe_num(acc_pipe), + (uint8_t)ia_css_pipe_get_pipe_num(acc_pipe), false, pipe->stream->config.pixels_per_clock == 2, false, /* continuous */ @@ -4106,15 +4105,15 @@ preview_start(struct ia_css_pipe *pipe) #endif #if !defined(HAS_NO_INPUT_SYSTEM) #ifndef ISP2401 - , (enum mipi_port_id) 0 + , (enum mipi_port_id)0 #else - (enum mipi_port_id) 0, + (enum mipi_port_id)0, #endif #endif #ifndef ISP2401 ); #else - &pipe->config.internal_frame_origin_bqs_on_sctbl, + & pipe->config.internal_frame_origin_bqs_on_sctbl, pipe->stream->isp_params_configs); #endif } @@ -4146,7 +4145,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer); - if ((pipe == NULL) || (buffer == NULL)) { + if ((!pipe) || (!buffer)) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4157,6 +4156,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, #if 0 if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { bool found_pipe = false; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { if ((buffer->data.frame->info.res.width == pipe->output_info[i].res.width) && (buffer->data.frame->info.res.height == pipe->output_info[i].res.height)) { @@ -4170,6 +4170,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, } if (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) { bool found_pipe = false; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { if ((buffer->data.frame->info.res.width == pipe->vf_output_info[i].res.width) && (buffer->data.frame->info.res.height == pipe->vf_output_info[i].res.height)) { @@ -4186,7 +4187,6 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, IA_CSS_LOG("pipe_id=%d, buf_type=%d", pipe_id, buf_type); - assert(pipe_id < IA_CSS_PIPE_ID_NUM); assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); if ((buf_type == IA_CSS_BUFFER_TYPE_INVALID) || @@ -4220,10 +4220,9 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } - pipeline = &pipe->pipeline; - assert(pipeline != NULL || + assert(pipeline || pipe_id == IA_CSS_PIPE_ID_COPY || pipe_id == IA_CSS_PIPE_ID_ACC); @@ -4233,21 +4232,21 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, ddr_buffer.timing_data = buffer->timing_data; if (buf_type == IA_CSS_BUFFER_TYPE_3A_STATISTICS) { - if (buffer->data.stats_3a == NULL) { + if (!buffer->data.stats_3a) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.stats_3a); ddr_buffer.payload.s3a = *buffer->data.stats_3a; } else if (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) { - if (buffer->data.stats_dvs == NULL) { + if (!buffer->data.stats_dvs) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.stats_dvs); ddr_buffer.payload.dis = *buffer->data.stats_dvs; } else if (buf_type == IA_CSS_BUFFER_TYPE_METADATA) { - if (buffer->data.metadata == NULL) { + if (!buffer->data.metadata) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4258,7 +4257,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, || (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) || (buf_type == IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) || (buf_type == IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME)) { - if (buffer->data.frame == NULL) { + if (!buffer->data.frame) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4270,12 +4269,11 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, "ia_css_pipe_enqueue_buffer() buf_type=%d, data(DDR address)=0x%x\n", buf_type, buffer->data.frame->data); - #if CONFIG_ON_FRAME_ENQUEUE() return_err = set_config_on_frame_enqueue( &buffer->data.frame->info, &ddr_buffer.payload.frame); - if (IA_CSS_SUCCESS != return_err) { + if (return_err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR(return_err); return return_err; } @@ -4290,10 +4288,10 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, /* TODO: change next to correct pool for optimization */ ia_css_rmgr_acq_vbuf(hmm_buffer_pool, &h_vbuf); - assert(h_vbuf != NULL); + assert(h_vbuf); assert(h_vbuf->vptr != 0x0); - if ((h_vbuf == NULL) || (h_vbuf->vptr == 0x0)) { + if ((!h_vbuf) || (h_vbuf->vptr == 0x0)) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } @@ -4304,7 +4302,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, if ((buf_type == IA_CSS_BUFFER_TYPE_3A_STATISTICS) || (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) || (buf_type == IA_CSS_BUFFER_TYPE_LACE_STATISTICS)) { - if (pipeline == NULL) { + if (!pipeline) { ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &h_vbuf); IA_CSS_LOG("pipeline is empty!"); IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); @@ -4327,18 +4325,16 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, || (buf_type == IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) || (buf_type == IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME) || (buf_type == IA_CSS_BUFFER_TYPE_METADATA)) { - return_err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)h_vbuf->vptr); #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) - if ((return_err == IA_CSS_SUCCESS) && (IA_CSS_BUFFER_TYPE_OUTPUT_FRAME == buf_type)) { + if ((return_err == IA_CSS_SUCCESS) && (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME)) { IA_CSS_LOG("pfp: enqueued OF %d to q %d thread %d", ddr_buffer.payload.frame.frame_data, queue_id, thread_id); } #endif - } if (return_err == IA_CSS_SUCCESS) { @@ -4397,7 +4393,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer); - if ((pipe == NULL) || (buffer == NULL)) { + if ((!pipe) || (!buffer)) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4446,7 +4442,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, /* Validate the ddr_buffer_addr and buf_type */ hmm_buffer_record = sh_css_hmm_buffer_record_validate( ddr_buffer_addr, buf_type); - if (hmm_buffer_record != NULL) { + if (hmm_buffer_record) { /* valid hmm_buffer_record found. Save the kernel_ptr * for validation after performing mmgr_load. The * vbuf handle and buffer_record can be released. @@ -4496,7 +4492,6 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, case IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: if ((pipe) && (pipe->stop_requested == true)) { - #if defined(USE_INPUT_SYSTEM_VERSION_2) /* free mipi frames only for old input system * for 2401 it is done in ia_css_stream_destroy call @@ -4512,7 +4507,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, } case IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME: case IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME: - frame = (struct ia_css_frame*)HOST_ADDRESS(ddr_buffer.kernel_ptr); + frame = (struct ia_css_frame *)HOST_ADDRESS(ddr_buffer.kernel_ptr); buffer->data.frame = frame; buffer->exp_id = ddr_buffer.payload.frame.exp_id; frame->exp_id = ddr_buffer.payload.frame.exp_id; @@ -4536,7 +4531,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, #endif } #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) - if (IA_CSS_BUFFER_TYPE_OUTPUT_FRAME == buf_type) { + if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { IA_CSS_LOG("pfp: dequeued OF %d with config id %d thread %d", frame->data, frame->isp_config_id, thread_id); } @@ -4549,14 +4544,14 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, break; case IA_CSS_BUFFER_TYPE_3A_STATISTICS: buffer->data.stats_3a = - (struct ia_css_isp_3a_statistics*)HOST_ADDRESS(ddr_buffer.kernel_ptr); + (struct ia_css_isp_3a_statistics *)HOST_ADDRESS(ddr_buffer.kernel_ptr); buffer->exp_id = ddr_buffer.payload.s3a.exp_id; buffer->data.stats_3a->exp_id = ddr_buffer.payload.s3a.exp_id; buffer->data.stats_3a->isp_config_id = ddr_buffer.payload.s3a.isp_config_id; break; case IA_CSS_BUFFER_TYPE_DIS_STATISTICS: buffer->data.stats_dvs = - (struct ia_css_isp_dvs_statistics*) + (struct ia_css_isp_dvs_statistics *) HOST_ADDRESS(ddr_buffer.kernel_ptr); buffer->exp_id = ddr_buffer.payload.dis.exp_id; buffer->data.stats_dvs->exp_id = ddr_buffer.payload.dis.exp_id; @@ -4565,7 +4560,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, break; case IA_CSS_BUFFER_TYPE_METADATA: buffer->data.metadata = - (struct ia_css_metadata*)HOST_ADDRESS(ddr_buffer.kernel_ptr); + (struct ia_css_metadata *)HOST_ADDRESS(ddr_buffer.kernel_ptr); buffer->exp_id = ddr_buffer.payload.metadata.exp_id; buffer->data.metadata->exp_id = ddr_buffer.payload.metadata.exp_id; break; @@ -4580,7 +4575,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, * Tell the SP which queues are not full, * by sending the software event. */ - if (return_err == IA_CSS_SUCCESS){ + if (return_err == IA_CSS_SUCCESS) { if (!sh_css_sp_is_running()) { IA_CSS_LOG("SP is not running!"); IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); @@ -4638,7 +4633,7 @@ enum ia_css_err ia_css_dequeue_psys_event(struct ia_css_event *event) { enum ia_css_pipe_id pipe_id = 0; - uint8_t payload[4] = {0,0,0,0}; + u8 payload[4] = {0, 0, 0, 0}; enum ia_css_err ret_err; /*TODO: @@ -4648,7 +4643,7 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) * We skip the IA_CSS_ENTER logging call * to avoid flooding the logs when the host application * uses polling. */ - if (event == NULL) + if (!event) return IA_CSS_ERR_INVALID_ARGUMENTS; if (!sh_css_sp_is_running()) { @@ -4683,7 +4678,7 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) if (event->type == IA_CSS_EVENT_TYPE_TIMER) { /* timer event ??? get the 2nd event and decode the data into the event struct */ - uint32_t tmp_data; + u32 tmp_data; /* 1st event: LSB 16-bit timer data and code */ event->timer_data = ((payload[1] & 0xFF) | ((payload[3] & 0xFF) << 8)); event->timer_code = payload[2]; @@ -4744,6 +4739,7 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) if (event->type == IA_CSS_EVENT_TYPE_FRAME_TAGGED) { /* find the capture pipe that goes with this */ int i, n; + n = event->pipe->stream->num_pipes; for (i = 0; i < n; i++) { struct ia_css_pipe *p = @@ -4757,11 +4753,12 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) } if (event->type == IA_CSS_EVENT_TYPE_ACC_STAGE_COMPLETE) { /* payload[3] contains the acc fw handle. */ - uint32_t stage_num = (uint32_t)payload[3]; + u32 stage_num = (uint32_t)payload[3]; + ret_err = ia_css_pipeline_get_fw_from_stage( - &(event->pipe->pipeline), + &event->pipe->pipeline, stage_num, - &(event->fw_handle)); + &event->fw_handle); if (ret_err != IA_CSS_SUCCESS) { IA_CSS_ERROR("Invalid stage num received for ACC event. stage_num:%u", stage_num); @@ -4781,13 +4778,13 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) enum ia_css_err ia_css_dequeue_isys_event(struct ia_css_event *event) { - uint8_t payload[4] = {0, 0, 0, 0}; + u8 payload[4] = {0, 0, 0, 0}; enum ia_css_err err = IA_CSS_SUCCESS; /* We skip the IA_CSS_ENTER logging call * to avoid flooding the logs when the host application * uses polling. */ - if (event == NULL) + if (!event) return IA_CSS_ERR_INVALID_ARGUMENTS; if (!sh_css_sp_is_running()) { @@ -4818,8 +4815,8 @@ ia_css_dequeue_isys_event(struct ia_css_event *event) static void acc_start(struct ia_css_pipe *pipe) { - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); start_pipe(pipe, SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD, pipe->stream->config.mode); @@ -4836,19 +4833,19 @@ sh_css_pipe_start(struct ia_css_stream *stream) IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (stream == NULL) { + if (!stream) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } pipe = stream->last_pipe; - if (pipe == NULL) { + if (!pipe) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } pipe_id = pipe->mode; - if(stream->started == true) { + if (stream->started == true) { IA_CSS_WARNING("Cannot start stream that is already started"); IA_CSS_LEAVE_ERR(err); return err; @@ -4878,6 +4875,7 @@ sh_css_pipe_start(struct ia_css_stream *stream) /* DH regular multi pipe - not continuous mode: start the next pipes too */ if (!stream->config.continuous) { int i; + for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err ; i++) { switch (stream->pipes[i]->mode) { case IA_CSS_PIPE_ID_PREVIEW: @@ -4940,6 +4938,7 @@ sh_css_pipe_start(struct ia_css_stream *stream) /* DH regular multi pipe - not continuous mode: enqueue event to the next pipes too */ if (!stream->config.continuous) { int i; + for (i = 1; i < stream->num_pipes; i++) { ia_css_pipeline_get_sp_thread_id( ia_css_pipe_get_pipe_num(stream->pipes[i]), @@ -4959,7 +4958,7 @@ sh_css_pipe_start(struct ia_css_stream *stream) else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) copy_pipe = pipe->pipe_settings.video.copy_pipe; - if (copy_pipe == NULL) { + if (!copy_pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } @@ -4971,12 +4970,13 @@ sh_css_pipe_start(struct ia_css_stream *stream) } if (pipe->stream->cont_capt) { struct ia_css_pipe *capture_pipe = NULL; + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) capture_pipe = pipe->pipe_settings.preview.capture_pipe; else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) capture_pipe = pipe->pipe_settings.video.capture_pipe; - if (capture_pipe == NULL) { + if (!capture_pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } @@ -4990,14 +4990,15 @@ sh_css_pipe_start(struct ia_css_stream *stream) /* in case of PREVIEW mode, check whether QOS acc_pipe is available, then start the qos pipe */ if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) { struct ia_css_pipe *acc_pipe = NULL; + acc_pipe = pipe->pipe_settings.preview.acc_pipe; - if (acc_pipe){ + if (acc_pipe) { ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(acc_pipe), &thread_id); /* by the time we reach here q is initialized and handle is available.*/ ia_css_bufq_enqueue_psys_event( IA_CSS_PSYS_SW_EVENT_START_STREAM, - (uint8_t) thread_id, 0, 0); + (uint8_t)thread_id, 0, 0); } } @@ -5012,7 +5013,7 @@ void sh_css_enable_cont_capt(bool enable, bool stop_copy_preview) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_enable_cont_capt() enter: enable=%d\n", enable); + "sh_css_enable_cont_capt() enter: enable=%d\n", enable); //my_css.cont_capt = enable; my_css.stop_copy_preview = stop_copy_preview; } @@ -5043,8 +5044,8 @@ sh_css_pipes_stop(struct ia_css_stream *stream) #ifndef ISP2401 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); #else - assert(stream != NULL); - if (stream == NULL) { + assert(stream); + if (!stream) { IA_CSS_LOG("stream does NOT exist!"); err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; @@ -5061,8 +5062,8 @@ sh_css_pipes_stop(struct ia_css_stream *stream) } #else main_pipe = stream->last_pipe; - assert(main_pipe != NULL); - if (main_pipe == NULL) { + assert(main_pipe); + if (!main_pipe) { IA_CSS_LOG("main_pipe does NOT exist!"); err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; @@ -5073,7 +5074,7 @@ sh_css_pipes_stop(struct ia_css_stream *stream) enum ia_css_err ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) { - if (buffer_depth == NULL) + if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_max_buffer_depth() enter: void\n"); (void)stream; @@ -5089,7 +5090,7 @@ ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_dep enum ia_css_err ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n",buffer_depth); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n", buffer_depth); (void)stream; if (buffer_depth > NUM_CONTINUOUS_FRAMES || buffer_depth < 1) return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -5114,7 +5115,7 @@ ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) enum ia_css_err ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) { - if (buffer_depth == NULL) + if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); #else @@ -5157,8 +5158,8 @@ ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) copy_pipe = main_pipe->pipe_settings.video.copy_pipe; /* return the error code if "Copy Pipe" does NOT exist */ - assert(copy_pipe != NULL); - if (copy_pipe == NULL) { + assert(copy_pipe); + if (!copy_pipe) { IA_CSS_LOG("Copy Pipe does NOT exist!"); err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; @@ -5191,17 +5192,17 @@ sh_css_pipes_have_stopped(struct ia_css_stream *stream) int i; - assert(stream != NULL); - if (stream == NULL) { + assert(stream); + if (!stream) { IA_CSS_LOG("stream does NOT exist!"); rval = false; goto RET; } main_pipe = stream->last_pipe; - assert(main_pipe != NULL); + assert(main_pipe); - if (main_pipe == NULL) { + if (!main_pipe) { IA_CSS_LOG("main_pipe does NOT exist!"); rval = false; goto RET; @@ -5240,8 +5241,8 @@ sh_css_pipes_have_stopped(struct ia_css_stream *stream) copy_pipe = main_pipe->pipe_settings.video.copy_pipe; /* return if "Copy Pipe" does NOT exist */ - assert(copy_pipe != NULL); - if (copy_pipe == NULL) { + assert(copy_pipe); + if (!copy_pipe) { IA_CSS_LOG("Copy Pipe does NOT exist!"); rval = false; @@ -5279,7 +5280,7 @@ sh_css_continuous_is_enabled(uint8_t pipe_num) enum ia_css_err ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) { - if (buffer_depth == NULL) + if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_max_buffer_depth() enter: void\n"); (void)stream; @@ -5290,7 +5291,7 @@ ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_dep enum ia_css_err ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n",buffer_depth); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n", buffer_depth); (void)stream; if (buffer_depth > NUM_CONTINUOUS_FRAMES || buffer_depth < 1) return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -5303,7 +5304,7 @@ ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) enum ia_css_err ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) { - if (buffer_depth == NULL) + if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); #endif @@ -5336,7 +5337,7 @@ static enum ia_css_err sh_css_pipe_configure_output( IA_CSS_ENTER_PRIVATE("pipe = %p, width = %d, height = %d, paddaed width = %d, format = %d, idx = %d", pipe, width, height, padded_width, format, idx); - if (pipe == NULL) { + if (!pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -5373,12 +5374,12 @@ sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_binary *binary = NULL; - assert(pipe != NULL); + assert(pipe); #ifndef ISP2401 - assert(info != NULL); + assert(info); #else - assert(shading_info != NULL); - assert(pipe_config != NULL); + assert(shading_info); + assert(pipe_config); #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_get_shading_info() enter:\n"); @@ -5420,8 +5421,8 @@ sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_binary *binary = NULL; - assert(pipe != NULL); - assert(info != NULL); + assert(pipe); + assert(info); IA_CSS_ENTER_PRIVATE(""); @@ -5446,7 +5447,7 @@ sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, sizeof(info->dvs_grid.dvs_stat_grid_info)); } - if (binary != NULL) { + if (binary) { /* copy pipe does not have ISP binary*/ info->isp_in_width = binary->internal_frame_info.res.width; info->isp_in_height = binary->internal_frame_info.res.height; @@ -5460,7 +5461,7 @@ sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, #error "Unknown VAMEM version" #endif -ERR: +ERR : IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } @@ -5487,7 +5488,7 @@ ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format form } supported_formats = pipe->pipe_settings.video.video_binary.info->output_formats; - number_of_formats = sizeof(pipe->pipe_settings.video.video_binary.info->output_formats)/sizeof(enum ia_css_frame_format); + number_of_formats = sizeof(pipe->pipe_settings.video.video_binary.info->output_formats) / sizeof(enum ia_css_frame_format); for (i = 0; i < number_of_formats && !found; i++) { if (supported_formats[i] == format) { @@ -5514,7 +5515,7 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) enum ia_css_err err = IA_CSS_SUCCESS; bool continuous = pipe->stream->config.continuous; unsigned int i; - unsigned num_output_pins; + unsigned int num_output_pins; struct ia_css_frame_info video_bin_out_info; bool need_scaler = false; bool vf_res_different_than_output = false; @@ -5523,7 +5524,7 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) struct ia_css_video_settings *mycs = &pipe->pipe_settings.video; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_VIDEO); /* we only test the video_binary because offline video doesn't need a * vf_pp binary and online does not (always use) the copy_binary. @@ -5536,7 +5537,7 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) pipe_out_info = &pipe->output_info[0]; pipe_vf_out_info = &pipe->vf_output_info[0]; - assert(pipe_out_info != NULL); + assert(pipe_out_info); /* * There is no explicit input format requirement for raw or yuv @@ -5566,12 +5567,11 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) video_bin_out_info = *pipe_out_info; /* Video */ - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]){ + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { video_vf_info = pipe_vf_out_info; vf_res_different_than_output = (video_vf_info->res.width != video_bin_out_info.res.width) || (video_vf_info->res.height != video_bin_out_info.res.height); - } - else { + } else { video_vf_info = NULL; } @@ -5608,6 +5608,7 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) } for (i = 0; i < cas_scaler_descr.num_stage; i++) { struct ia_css_binary_descr yuv_scaler_descr; + mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; ia_css_pipe_get_yuvscaler_binarydesc(pipe, &yuv_scaler_descr, &cas_scaler_descr.in_info[i], @@ -5625,7 +5626,6 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); } - { struct ia_css_binary_descr video_descr; enum ia_css_frame_format vf_info_format; @@ -5824,9 +5824,10 @@ static enum ia_css_err unload_video_binaries(struct ia_css_pipe *pipe) { unsigned int i; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -5857,9 +5858,8 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode video_pipe_input_mode; - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -5920,7 +5920,7 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) #ifndef ISP2401 ); #else - ©_pipe->config.internal_frame_origin_bqs_on_sctbl, + & copy_pipe->config.internal_frame_origin_bqs_on_sctbl, copy_pipe->stream->isp_params_configs); #endif @@ -5957,7 +5957,7 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) #ifndef ISP2401 ); #else - &capture_pipe->config.internal_frame_origin_bqs_on_sctbl, + & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, capture_pipe->stream->isp_params_configs); #endif } @@ -5974,13 +5974,13 @@ enum ia_css_err sh_css_pipe_get_viewfinder_frame_info( struct ia_css_frame_info *info, unsigned int idx) { - assert(pipe != NULL); - assert(info != NULL); + assert(pipe); + assert(info); /* We could print the pointer as input arg, and the values as output */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_get_viewfinder_frame_info() enter: void\n"); - if ( pipe->mode == IA_CSS_PIPE_ID_CAPTURE && + if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE && (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER)) return IA_CSS_ERR_MODE_HAS_NO_VIEWFINDER; @@ -5992,9 +5992,9 @@ enum ia_css_err sh_css_pipe_get_viewfinder_frame_info( info.res.width=%d, info.res.height=%d, \ info.padded_width=%d, info.format=%d, \ info.raw_bit_depth=%d, info.raw_bayer_order=%d\n", - info->res.width,info->res.height, - info->padded_width,info->format, - info->raw_bit_depth,info->raw_bayer_order); + info->res.width, info->res.height, + info->padded_width, info->format, + info->raw_bit_depth, info->raw_bayer_order); return IA_CSS_SUCCESS; } @@ -6010,12 +6010,11 @@ sh_css_pipe_configure_viewfinder(struct ia_css_pipe *pipe, unsigned int width, IA_CSS_ENTER_PRIVATE("pipe = %p, width = %d, height = %d, min_width = %d, format = %d, idx = %d\n", pipe, width, height, min_width, format, idx); - if (pipe == NULL) { + if (!pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - err = ia_css_util_check_res(width, height); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -6035,7 +6034,7 @@ static enum ia_css_err load_copy_binaries(struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; - assert(pipe != NULL); + assert(pipe); IA_CSS_ENTER_PRIVATE(""); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); @@ -6063,8 +6062,9 @@ static bool need_capture_pp( const struct ia_css_pipe *pipe) { const struct ia_css_frame_info *out_info = &pipe->output_info[0]; + IA_CSS_ENTER_LEAVE_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE); #ifdef ISP2401 @@ -6098,16 +6098,16 @@ static bool need_capt_ldc( const struct ia_css_pipe *pipe) { IA_CSS_ENTER_LEAVE_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE); - return (pipe->extra_config.enable_dvs_6axis) ? true:false; + return (pipe->extra_config.enable_dvs_6axis) ? true : false; } static enum ia_css_err set_num_primary_stages(unsigned int *num, enum ia_css_pipe_version version) { enum ia_css_err err = IA_CSS_SUCCESS; - if (num == NULL) + if (!num) return IA_CSS_ERR_INVALID_ARGUMENTS; switch (version) { @@ -6154,8 +6154,8 @@ static enum ia_css_err load_primary_binaries( bool need_extra_yuv_scaler = false; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); online = pipe->stream->config.online; @@ -6184,8 +6184,7 @@ static enum ia_css_err load_primary_binaries( IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - } - else{ + } else { err = ia_css_frame_check_info(pipe_out_info); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -6263,6 +6262,7 @@ static enum ia_css_err load_primary_binaries( } for (i = 0; i < cas_scaler_descr.num_stage; i++) { struct ia_css_binary_descr yuv_scaler_descr; + mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; ia_css_pipe_get_yuvscaler_binarydesc(pipe, &yuv_scaler_descr, &cas_scaler_descr.in_info[i], @@ -6288,6 +6288,7 @@ static enum ia_css_err load_primary_binaries( /* ldc and capt_pp are not supported in the same pipeline */ if (need_ldc) { struct ia_css_binary_descr capt_ldc_descr; + ia_css_pipe_get_ldc_binarydesc(pipe, &capt_ldc_descr, &prim_out_info, &capt_pp_out_info); @@ -6327,8 +6328,9 @@ static enum ia_css_err load_primary_binaries( } #ifndef ISP2401 - if(need_ldc) { + if (need_ldc) { struct ia_css_binary_descr capt_ldc_descr; + ia_css_pipe_get_ldc_binarydesc(pipe, &capt_ldc_descr, &prim_out_info, &capt_ldc_out_info); @@ -6351,6 +6353,7 @@ static enum ia_css_err load_primary_binaries( for (i = 0; i < mycs->num_primary_stage; i++) { struct ia_css_frame_info *local_vf_info = NULL; + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && (i == mycs->num_primary_stage - 1)) local_vf_info = &vf_info; ia_css_pipe_get_primary_binarydesc(pipe, &prim_descr[i], &prim_in_info, &prim_out_info, local_vf_info, i); @@ -6433,7 +6436,7 @@ allocate_delay_frames(struct ia_css_pipe *pipe) IA_CSS_ENTER_PRIVATE(""); - if (pipe == NULL) { + if (!pipe) { IA_CSS_ERROR("Invalid args - pipe %p", pipe); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -6455,11 +6458,12 @@ allocate_delay_frames(struct ia_css_pipe *pipe) case IA_CSS_PIPE_ID_VIDEO: { struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video; + ref_info = mycs_video->video_binary.internal_frame_info; /*The ref frame expects - * 1. Y plane - * 2. UV plane with line interleaving, like below - * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) * * This format is not YUV420(which has Y, U and V planes). * Its closer to NV12, except that the UV plane has UV @@ -6474,6 +6478,7 @@ allocate_delay_frames(struct ia_css_pipe *pipe) case IA_CSS_PIPE_ID_PREVIEW: { struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview; + ref_info = mycs_preview->preview_binary.internal_frame_info; /*The ref frame expects * 1. Y plane @@ -6492,7 +6497,6 @@ allocate_delay_frames(struct ia_css_pipe *pipe) break; default: return IA_CSS_ERR_INVALID_ARGUMENTS; - } ref_info.raw_bit_depth = SH_CSS_REF_BIT_DEPTH; @@ -6520,7 +6524,7 @@ static enum ia_css_err load_advanced_binaries( IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); if (pipe->pipe_settings.capture.pre_isp_binary.info) return IA_CSS_SUCCESS; @@ -6632,7 +6636,7 @@ static enum ia_css_err load_bayer_isp_binaries( struct ia_css_binary_descr pre_de_descr; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); pipe_out_info = &pipe->output_info[0]; @@ -6665,7 +6669,7 @@ static enum ia_css_err load_low_light_binaries( enum ia_css_err err = IA_CSS_SUCCESS; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); if (pipe->pipe_settings.capture.pre_isp_binary.info) @@ -6775,7 +6779,7 @@ static bool copy_on_sp(struct ia_css_pipe *pipe) { bool rval; - assert(pipe != NULL); + assert(pipe); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "copy_on_sp() enter:\n"); rval = true; @@ -6797,7 +6801,7 @@ static enum ia_css_err load_capture_binaries( bool must_be_raw; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); if (pipe->pipe_settings.capture.primary_binary[0].info) { @@ -6832,7 +6836,7 @@ static enum ia_css_err load_capture_binaries( case IA_CSS_CAPTURE_MODE_RAW: err = load_copy_binaries(pipe); #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) - if (err == IA_CSS_SUCCESS) + if (err == IA_CSS_SUCCESS) pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; #endif break; @@ -6862,9 +6866,10 @@ static enum ia_css_err unload_capture_binaries(struct ia_css_pipe *pipe) { unsigned int i; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || ((pipe->mode != IA_CSS_PIPE_ID_CAPTURE) && (pipe->mode != IA_CSS_PIPE_ID_COPY))) { + if ((!pipe) || ((pipe->mode != IA_CSS_PIPE_ID_CAPTURE) && (pipe->mode != IA_CSS_PIPE_ID_COPY))) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -6894,7 +6899,6 @@ static bool need_downscaling(const struct ia_css_resolution in_res, const struct ia_css_resolution out_res) { - if (in_res.width > out_res.width || in_res.height > out_res.height) return true; @@ -6910,7 +6914,7 @@ need_yuv_scaler_stage(const struct ia_css_pipe *pipe) bool need_format_conversion = false; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); + assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); /* TODO: make generic function */ @@ -6951,17 +6955,17 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_frame_info tmp_in_info; - unsigned max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; + unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; - assert(cas_scaler_in_info != NULL); - assert(cas_scaler_out_info != NULL); + assert(cas_scaler_in_info); + assert(cas_scaler_out_info); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() enter:\n"); /* We assume that this function is used only for single output port case. */ descr->num_output_stage = 1; - hor_ds_factor = CEIL_DIV(cas_scaler_in_info->res.width , cas_scaler_out_info->res.width); + hor_ds_factor = CEIL_DIV(cas_scaler_in_info->res.width, cas_scaler_out_info->res.width); ver_ds_factor = CEIL_DIV(cas_scaler_in_info->res.height, cas_scaler_out_info->res.height); /* use the same horizontal and vertical downscaling factor for simplicity */ assert(hor_ds_factor == ver_ds_factor); @@ -7000,7 +7004,6 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( tmp_in_info = *cas_scaler_in_info; for (i = 0; i < descr->num_stage; i++) { - descr->in_info[i] = tmp_in_info; if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= cas_scaler_out_info->res.width) { descr->is_output_stage[i] = true; @@ -7018,7 +7021,7 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( descr->out_info[i].res.height = cas_scaler_out_info->res.height; descr->out_info[i].padded_width = cas_scaler_out_info->padded_width; descr->out_info[i].format = cas_scaler_out_info->format; - if (cas_scaler_vf_info != NULL) { + if (cas_scaler_vf_info) { descr->vf_info[i].res.width = cas_scaler_vf_info->res.width; descr->vf_info[i].res.height = cas_scaler_vf_info->res.height; descr->vf_info[i].padded_width = cas_scaler_vf_info->padded_width; @@ -7065,7 +7068,7 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pi unsigned int num_stages = 0; enum ia_css_err err = IA_CSS_SUCCESS; - unsigned max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; + unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() enter:\n"); @@ -7088,7 +7091,7 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pi descr->num_output_stage += 1; } - if (out_info[i] != NULL) { + if (out_info[i]) { hor_scale_factor[i] = CEIL_DIV(in_info.res.width, out_info[i]->res.width); ver_scale_factor[i] = CEIL_DIV(in_info.res.height, out_info[i]->res.height); /* use the same horizontal and vertical scaling factor for simplicity */ @@ -7108,7 +7111,7 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pi descr->num_stage = num_stages; - descr->in_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); + descr->in_info = kmalloc_array(descr->num_stage, sizeof(struct ia_css_frame_info), GFP_KERNEL); if (!descr->in_info) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto ERR; @@ -7129,7 +7132,7 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pi goto ERR; } descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); - if (descr->is_output_stage == NULL) { + if (!descr->is_output_stage) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto ERR; } @@ -7137,8 +7140,8 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pi for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { if (out_info[i]) { if (i > 0) { - assert((out_info[i-1]->res.width >= out_info[i]->res.width) && - (out_info[i-1]->res.height >= out_info[i]->res.height)); + assert((out_info[i - 1]->res.width >= out_info[i]->res.width) && + (out_info[i - 1]->res.height >= out_info[i]->res.height)); } } } @@ -7147,7 +7150,7 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pi tmp_in_info.format = IA_CSS_FRAME_FORMAT_YUV420; for (i = 0, j = 0; i < descr->num_stage; i++) { assert(j < 2); - assert(out_info[j] != NULL); + assert(out_info[j]); descr->in_info[i] = tmp_in_info; if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= out_info[j]->res.width) { @@ -7166,7 +7169,7 @@ static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pi descr->out_info[i].res.height = out_info[j]->res.height; descr->out_info[i].padded_width = out_info[j]->padded_width; descr->out_info[i].format = out_info[j]->format; - if (vf_out_info[j] != NULL) { + if (vf_out_info[j]) { descr->vf_info[i].res.width = vf_out_info[j]->res.width; descr->vf_info[i].res.height = vf_out_info[j]->res.height; descr->vf_info[i].padded_width = vf_out_info[j]->padded_width; @@ -7228,14 +7231,14 @@ load_yuvpp_binaries(struct ia_css_pipe *pipe) bool need_isp_copy_binary = false; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); if (pipe->pipe_settings.yuvpp.copy_binary.info) goto ERR; - /* Set both must_be_raw and must_be_yuv to false then yuvpp can take rgb inputs */ + /* Set both must_be_raw and must_be_yuv to false then yuvpp can take rgb inputs */ err = ia_css_util_check_input(&pipe->stream->config, false, false); if (err != IA_CSS_SUCCESS) goto ERR; @@ -7409,9 +7412,10 @@ static enum ia_css_err unload_yuvpp_binaries(struct ia_css_pipe *pipe) { unsigned int i; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -7441,7 +7445,7 @@ static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) enum ia_css_input_mode yuvpp_pipe_input_mode; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -7454,7 +7458,7 @@ static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) /* multi stream video needs mipi buffers */ -#if !defined(HAS_NO_INPUT_SYSTEM) && ( defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) ) +#if !defined(HAS_NO_INPUT_SYSTEM) && (defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)) err = send_mipi_frames(pipe); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -7479,9 +7483,10 @@ static enum ia_css_err sh_css_pipe_unload_binaries(struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if (pipe == NULL) { + if (!pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -7516,7 +7521,7 @@ sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; - assert(pipe != NULL); + assert(pipe); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_load_binaries() enter:\n"); /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ @@ -7581,7 +7586,7 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) #endif IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((pipe == NULL) || (pipe->stream == NULL) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -7627,6 +7632,7 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) * Bayer-Quad RAW. */ int in_frame_format; + if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { in_frame_format = IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8; } else if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8) { @@ -7694,7 +7700,6 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) need_scaler = need_yuv_scaler_stage(pipe); if (pipe->pipe_settings.yuvpp.copy_binary.info) { - struct ia_css_frame *in_frame_local = NULL; #ifdef USE_INPUT_SYSTEM_VERSION_2401 @@ -7772,8 +7777,8 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) j++; } } - } else if (copy_stage != NULL) { - if (vf_frame[0] != NULL && vf_frame[0]->info.res.width != 0) { + } else if (copy_stage) { + if (vf_frame[0] && vf_frame[0]->info.res.width != 0) { in_frame = copy_stage->args.out_vf_frame; err = add_vf_pp_stage(pipe, in_frame, vf_frame[0], &vf_pp_binary[0], &vf_pp_stage); @@ -7793,7 +7798,7 @@ create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) static enum ia_css_err create_host_copy_pipeline(struct ia_css_pipe *pipe, - unsigned max_input_width, + unsigned int max_input_width, struct ia_css_frame *out_frame) { struct ia_css_pipeline *me; @@ -7876,7 +7881,7 @@ create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe) IA_CSS_PIPELINE_ISYS_COPY, max_input_width); err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, &out_stage); - if(err != IA_CSS_SUCCESS) + if (err != IA_CSS_SUCCESS) return err; ia_css_pipeline_finalize_stages(me, pipe->stream->config.continuous); @@ -7925,8 +7930,8 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) bool need_ldc = false; IA_CSS_ENTER_PRIVATE(""); - assert(pipe != NULL); - assert(pipe->stream != NULL); + assert(pipe); + assert(pipe->stream); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); me = &pipe->pipeline; @@ -8007,8 +8012,8 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) need_pp = (need_capture_pp(pipe) || pipe->output_stage) && mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER; - need_yuv_pp = (yuv_scaler_binary != NULL && yuv_scaler_binary->info != NULL); - need_ldc = (capture_ldc_binary != NULL && capture_ldc_binary->info != NULL); + need_yuv_pp = (yuv_scaler_binary && yuv_scaler_binary->info); + need_ldc = (capture_ldc_binary && capture_ldc_binary->info); if (pipe->pipe_settings.capture.copy_binary.info) { if (raw) { @@ -8088,7 +8093,7 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) IA_CSS_BINARY_MODE_COPY; current_stage->args.copy_output = current_stage->args.copy_vf; } else if (mode == IA_CSS_CAPTURE_MODE_ADVANCED || - mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { + mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, out_frames, in_frame, NULL); @@ -8108,7 +8113,7 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) return err; } - if(need_pp) { + if (need_pp) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, out_frames, NULL, NULL); @@ -8140,9 +8145,10 @@ create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) #ifndef ISP2401 if (need_pp && current_stage) { struct ia_css_frame *local_in_frame = NULL; + local_in_frame = current_stage->args.out_frame[0]; - if(need_ldc) { + if (need_ldc) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, out_frames, local_in_frame, NULL); @@ -8253,7 +8259,7 @@ static enum ia_css_err capture_start( enum sh_css_pipe_config_override copy_ovrd; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if (pipe == NULL) { + if (!pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -8261,7 +8267,7 @@ static enum ia_css_err capture_start( me = &pipe->pipeline; if ((pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER ) && + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) && (pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { if (copy_on_sp(pipe)) { err = start_copy_on_sp(pipe, &me->out_frame[0]); @@ -8293,7 +8299,6 @@ static enum ia_css_err capture_start( ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); copy_ovrd = 1 << thread_id; - } start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); @@ -8311,7 +8316,6 @@ static enum ia_css_err capture_start( IA_CSS_LEAVE_ERR_PRIVATE(err); return err; - } static enum ia_css_err @@ -8319,8 +8323,8 @@ sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, struct ia_css_frame_info *info, unsigned int idx) { - assert(pipe != NULL); - assert(info != NULL); + assert(pipe); + assert(info); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_get_output_frame_info() enter:\n"); @@ -8336,9 +8340,8 @@ sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, 0); } else if (info->format == IA_CSS_FRAME_FORMAT_RAW || info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) { - info->raw_bit_depth = - ia_css_pipe_util_pipe_input_format_bpp(pipe); - + info->raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, @@ -8353,7 +8356,7 @@ ia_css_stream_send_input_frame(const struct ia_css_stream *stream, unsigned int width, unsigned int height) { - assert(stream != NULL); + assert(stream); ia_css_inputfifo_send_input_frame( data, width, height, @@ -8365,7 +8368,7 @@ ia_css_stream_send_input_frame(const struct ia_css_stream *stream, void ia_css_stream_start_input_frame(const struct ia_css_stream *stream) { - assert(stream != NULL); + assert(stream); ia_css_inputfifo_start_frame( stream->config.channel_id, @@ -8380,7 +8383,7 @@ ia_css_stream_send_input_line(const struct ia_css_stream *stream, const unsigned short *data2, unsigned int width2) { - assert(stream != NULL); + assert(stream); ia_css_inputfifo_send_line(stream->config.channel_id, data, width, data2, width2); @@ -8392,8 +8395,8 @@ ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, const unsigned short *data, unsigned int width) { - assert(stream != NULL); - if (data == NULL || width == 0) + assert(stream); + if (!data || width == 0) return; ia_css_inputfifo_send_embedded_line(stream->config.channel_id, format, data, width); @@ -8402,7 +8405,7 @@ ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, void ia_css_stream_end_input_frame(const struct ia_css_stream *stream) { - assert(stream != NULL); + assert(stream); ia_css_inputfifo_end_frame(stream->config.channel_id); } @@ -8411,8 +8414,8 @@ ia_css_stream_end_input_frame(const struct ia_css_stream *stream) static void append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) { - IA_CSS_ENTER_PRIVATE("l = %p, firmware = %p", l , firmware); - if (l == NULL) { + IA_CSS_ENTER_PRIVATE("l = %p, firmware = %p", l, firmware); + if (!l) { IA_CSS_ERROR("NULL fw_info"); IA_CSS_LEAVE_PRIVATE(""); return; @@ -8441,16 +8444,17 @@ static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware) { hrt_vaddress binary; - if (firmware == NULL) { + if (!firmware) { IA_CSS_ERROR("NULL input parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } binary = firmware->info.isp.xmem_addr; if (!binary) { - unsigned size = firmware->blob.size; + unsigned int size = firmware->blob.size; const unsigned char *blob; const unsigned char *binary_name; + binary_name = (const unsigned char *)(IA_CSS_EXT_ISP_PROG_NAME( firmware)); @@ -8471,14 +8475,15 @@ acc_load_extension(struct ia_css_fw_info *firmware) { enum ia_css_err err; struct ia_css_fw_info *hd = firmware; - while (hd){ + + while (hd) { err = upload_isp_code(hd); if (err != IA_CSS_SUCCESS) return err; hd = hd->next; } - if (firmware == NULL) + if (!firmware) return IA_CSS_ERR_INVALID_ARGUMENTS; firmware->loaded = true; return IA_CSS_SUCCESS; @@ -8490,10 +8495,10 @@ acc_unload_extension(struct ia_css_fw_info *firmware) struct ia_css_fw_info *hd = firmware; struct ia_css_fw_info *hdn = NULL; - if (firmware == NULL) /* should not happen */ + if (!firmware) /* should not happen */ return; /* unload and remove multiple firmwares */ - while (hd){ + while (hd) { hdn = (hd->next) ? &(*hd->next) : NULL; if (hd->info.isp.xmem_addr) { hmm_free(hd->info.isp.xmem_addr); @@ -8506,6 +8511,7 @@ acc_unload_extension(struct ia_css_fw_info *firmware) firmware->loaded = false; } + /* Load firmware for extension */ static enum ia_css_err ia_css_pipe_load_extension(struct ia_css_pipe *pipe, @@ -8515,21 +8521,20 @@ ia_css_pipe_load_extension(struct ia_css_pipe *pipe, IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); - if ((firmware == NULL) || (pipe == NULL)) { + if ((!firmware) || (!pipe)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) { - if (&pipe->output_stage != NULL) + if (&pipe->output_stage) append_firmware(&pipe->output_stage, firmware); else { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } - } - else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) { - if (&pipe->vf_stage != NULL) + } else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) { + if (&pipe->vf_stage) append_firmware(&pipe->vf_stage, firmware); else { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); @@ -8549,7 +8554,7 @@ ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, { IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); - if ((firmware == NULL) || (pipe == NULL)) { + if ((!firmware) || (!pipe)) { IA_CSS_ERROR("NULL input parameters"); IA_CSS_LEAVE_PRIVATE(""); return; @@ -8569,7 +8574,7 @@ ia_css_pipeline_uses_params(struct ia_css_pipeline *me) { struct ia_css_pipeline_stage *stage; - assert(me != NULL); + assert(me); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipeline_uses_params() enter: me=%p\n", me); @@ -8577,8 +8582,7 @@ ia_css_pipeline_uses_params(struct ia_css_pipeline *me) for (stage = me->stages; stage; stage = stage->next) if (stage->binary_info && stage->binary_info->enable.params) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_uses_params() leave: " - "return_bool=true\n"); + "ia_css_pipeline_uses_params() leave: return_bool=true\n"); return true; } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, @@ -8593,15 +8597,17 @@ sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, struct ia_css_fw_info *fw = (struct ia_css_fw_info *)acc_fw; /* In QoS case, load_extension already called, so skipping */ enum ia_css_err err = IA_CSS_SUCCESS; + if (fw->loaded == false) err = acc_load_extension(fw); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_pipeline_add_acc_stage() enter: pipeline=%p," - " acc_fw=%p\n", pipeline, acc_fw); + "sh_css_pipeline_add_acc_stage() enter: pipeline=%p, acc_fw=%p\n", + pipeline, acc_fw); if (err == IA_CSS_SUCCESS) { struct ia_css_pipeline_stage_desc stage_desc; + ia_css_pipe_get_acc_stage_desc(&stage_desc, NULL, fw); err = ia_css_pipeline_create_and_add_stage(pipeline, &stage_desc, @@ -8609,7 +8615,7 @@ sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_pipeline_add_acc_stage() leave: return_err=%d\n",err); + "sh_css_pipeline_add_acc_stage() leave: return_err=%d\n", err); return err; } @@ -8621,10 +8627,10 @@ enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, unsigned int exp_id) { struct sh_css_tag_descr tag_descr; - uint32_t encoded_tag_descr; + u32 encoded_tag_descr; enum ia_css_err err; - assert(stream != NULL); + assert(stream); IA_CSS_ENTER("exp_id=%d", exp_id); /* Only continuous streams have a tagger */ @@ -8647,7 +8653,7 @@ enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 * on both host and the SP side. * It is mainly because it is enough to have only one tag_cmd queue */ - err= ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); + err = ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); IA_CSS_LEAVE_ERR(err); return err; @@ -8667,12 +8673,12 @@ enum ia_css_err ia_css_stream_capture( unsigned int encoded_tag_descr; enum ia_css_err return_err; - if (stream == NULL) + if (!stream) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() enter: num_captures=%d," - " skip=%d, offset=%d\n", num_captures, skip,offset); + "ia_css_stream_capture() enter: num_captures=%d, skip=%d, offset=%d\n", + num_captures, skip, offset); /* Check if the tag descriptor is valid */ if (num_captures < SH_CSS_MINIMUM_TAG_ID) { @@ -8685,15 +8691,13 @@ enum ia_css_err ia_css_stream_capture( /* Create the tag descriptor from the parameters */ sh_css_create_tag_descr(num_captures, skip, offset, 0, &tag_descr); - /* Encode the tag descriptor into a 32-bit value */ encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); if (!sh_css_sp_is_running()) { /* SP is not running. The queues are not valid */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() leaving:" - "queues unavailable\n"); + "ia_css_stream_capture() leaving:queues unavailable\n"); return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -8714,7 +8718,7 @@ void ia_css_stream_request_flash(struct ia_css_stream *stream) { (void)stream; - assert(stream != NULL); + assert(stream); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_request_flash() enter: void\n"); #ifndef ISP2401 @@ -8794,7 +8798,7 @@ sh_css_init_host_sp_control_vars(void) #ifndef ISP2401 sp_dmem_store_uint32(SP0_ID, (unsigned int)sp_address_of(sp_stop_copy_preview), - my_css.stop_copy_preview?(uint32_t)(1):(uint32_t)(0)); + my_css.stop_copy_preview ? (uint32_t)(1) : (uint32_t)(0)); #endif store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); @@ -8821,7 +8825,7 @@ void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) void ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config *extra_config) { - if (extra_config == NULL) { + if (!extra_config) { IA_CSS_ERROR("NULL input parameter"); return; } @@ -8838,7 +8842,7 @@ ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config *extra_config) void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_config_defaults()\n"); - assert(stream_config != NULL); + assert(stream_config); memset(stream_config, 0, sizeof(*stream_config)); stream_config->online = true; stream_config->left_padding = -1; @@ -8854,7 +8858,7 @@ ia_css_acc_pipe_create(struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; - if (pipe == NULL) { + if (!pipe) { IA_CSS_ERROR("NULL input parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -8875,20 +8879,21 @@ ia_css_pipe_create(const struct ia_css_pipe_config *config, struct ia_css_pipe **pipe) { #ifndef ISP2401 - if (config == NULL) + if (!config) #else enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER_PRIVATE("config = %p, pipe = %p", config, pipe); - if (config == NULL) { + if (!config) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); #endif return IA_CSS_ERR_INVALID_ARGUMENTS; #ifndef ISP2401 - if (pipe == NULL) + if (!pipe) #else } - if (pipe == NULL) { + if (!pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); #endif return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -8899,7 +8904,7 @@ ia_css_pipe_create(const struct ia_css_pipe_config *config, err = ia_css_pipe_create_extra(config, NULL, pipe); - if(err == IA_CSS_SUCCESS) { + if (err == IA_CSS_SUCCESS) { IA_CSS_LOG("pipe created successfully = %p", *pipe); } @@ -8926,7 +8931,7 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, return IA_CSS_ERR_INVALID_ARGUMENTS; } - if ((pipe == NULL) || (config == NULL)) { + if ((!pipe) || (!config)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -8967,7 +8972,6 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, else internal_pipe->dvs_frame_delay = 1; - /* we still keep enable_raw_binning for backward compatibility, for any new fractional bayer downscaling, we should use bayer_ds_out_res. if both are specified, bayer_ds_out_res will take precedence.if none is specified, we @@ -8982,6 +8986,7 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, if ((internal_pipe->config.vf_pp_in_res.width || internal_pipe->config.capt_pp_in_res.width)) { enum ia_css_frame_format format; + if (internal_pipe->config.vf_pp_in_res.width) { format = IA_CSS_FRAME_FORMAT_YUV_LINE; ia_css_frame_info_init( @@ -9070,23 +9075,21 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, return IA_CSS_SUCCESS; } - enum ia_css_err ia_css_pipe_get_info(const struct ia_css_pipe *pipe, struct ia_css_pipe_info *pipe_info) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_get_info()\n"); - assert(pipe_info != NULL); - if (pipe_info == NULL) { + assert(pipe_info); + if (!pipe_info) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "ia_css_pipe_get_info: pipe_info cannot be NULL\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if (pipe == NULL || pipe->stream == NULL) { + if (!pipe || !pipe->stream) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "ia_css_pipe_get_info: ia_css_stream_create needs to" - " be called before ia_css_[stream/pipe]_get_info\n"); + "ia_css_pipe_get_info: ia_css_stream_create needs to be called before ia_css_[stream/pipe]_get_info\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; } /* we succeeded return the info */ @@ -9099,7 +9102,7 @@ bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info) { unsigned int i; - if (pipe_info != NULL) { + if (pipe_info) { for (i = 0; i < IA_CSS_DVS_STAT_NUM_OF_LEVELS; i++) { if (pipe_info->grid_info.dvs_grid.dvs_stat_grid_info.grd_cfg[i].grd_start.enable) return true; @@ -9119,7 +9122,7 @@ ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, IA_CSS_ENTER_PRIVATE("pipe = %p, pin_index = %d, new_formats = %d", pipe, pin_index, new_format); - if (NULL == pipe) { + if (!pipe) { IA_CSS_ERROR("pipe is not set"); err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -9131,14 +9134,14 @@ ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - if (IA_CSS_FRAME_FORMAT_NV12_TILEY != new_format) { + if (new_format != IA_CSS_FRAME_FORMAT_NV12_TILEY) { IA_CSS_ERROR("new format is not valid"); err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } else { err = ia_css_pipe_check_format(pipe, new_format); - if (IA_CSS_SUCCESS == err) { + if (err == IA_CSS_SUCCESS) { if (pin_index == 0) { pipe->output_info[0].format = new_format; } else { @@ -9157,7 +9160,8 @@ static enum ia_css_err ia_css_stream_configure_rx(struct ia_css_stream *stream) { struct ia_css_input_port *config; - assert(stream != NULL); + + assert(stream); config = &stream->config.source.port; /* AM: this code is not reliable, especially for 2400 */ @@ -9199,10 +9203,11 @@ find_pipe(struct ia_css_pipe *pipes[], enum ia_css_pipe_mode mode, bool copy_pipe) { - unsigned i; - assert(pipes != NULL); + unsigned int i; + + assert(pipes); for (i = 0; i < num_pipes; i++) { - assert(pipes[i] != NULL); + assert(pipes[i]); if (pipes[i]->config.mode != mode) continue; if (copy_pipe && pipes[i]->mode != IA_CSS_PIPE_ID_COPY) @@ -9218,18 +9223,19 @@ ia_css_acc_stream_create(struct ia_css_stream *stream) int i; enum ia_css_err err = IA_CSS_SUCCESS; - assert(stream != NULL); + assert(stream); IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (stream == NULL) { + if (!stream) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *pipe = stream->pipes[i]; - assert(pipe != NULL); - if (pipe == NULL) { + + assert(pipe); + if (!pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -9246,7 +9252,8 @@ ia_css_acc_stream_create(struct ia_css_stream *stream) for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *pipe = stream->pipes[i]; - assert(pipe != NULL); + + assert(pipe); ia_css_pipe_map_queue(pipe, true); } @@ -9258,7 +9265,6 @@ ia_css_acc_stream_create(struct ia_css_stream *stream) stream->started = false; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); return IA_CSS_SUCCESS; @@ -9273,8 +9279,8 @@ metadata_info_init(const struct ia_css_metadata_config *mdc, return IA_CSS_ERR_INVALID_ARGUMENTS; md->resolution = mdc->resolution; - /* We round up the stride to a multiple of the width - * of the port going to DDR, this is a HW requirements (DMA). */ + /* We round up the stride to a multiple of the width + * of the port going to DDR, this is a HW requirements (DMA). */ md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); md->size = mdc->resolution.height * md->stride; return IA_CSS_SUCCESS; @@ -9350,8 +9356,8 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, /* some checks */ if (num_pipes == 0 || - stream == NULL || - pipes == NULL) { + !stream || + !pipes) { err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR(err); return err; @@ -9385,14 +9391,15 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, if (!stream_config->online) #endif { - unsigned int port = (unsigned int) stream_config->source.port.port; + unsigned int port = (unsigned int)stream_config->source.port.port; + if (port >= N_MIPI_PORT_ID) { err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR(err); return err; } - if (my_css.size_mem_words != 0){ + if (my_css.size_mem_words != 0) { my_css.mipi_frame_size[port] = my_css.size_mem_words; } else if (stream_config->mipi_buffer_config.size_mem_words != 0) { my_css.mipi_frame_size[port] = stream_config->mipi_buffer_config.size_mem_words; @@ -9417,7 +9424,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, IA_CSS_LEAVE_ERR(err); return err; } - } #endif @@ -9441,7 +9447,7 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, /* allocate pipes */ curr_stream->num_pipes = num_pipes; - curr_stream->pipes = kzalloc(num_pipes * sizeof(struct ia_css_pipe *), GFP_KERNEL); + curr_stream->pipes = kcalloc(num_pipes, sizeof(struct ia_css_pipe *), GFP_KERNEL); if (!curr_stream->pipes) { curr_stream->num_pipes = 0; kfree(curr_stream); @@ -9453,7 +9459,7 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, /* store pipes */ spcopyonly = (num_pipes == 1) && (pipes[0]->config.mode == IA_CSS_PIPE_MODE_COPY); for (i = 0; i < num_pipes; i++) - curr_stream->pipes [i] = pipes[i]; + curr_stream->pipes[i] = pipes[i]; curr_stream->last_pipe = curr_stream->pipes[0]; /* take over stream config */ curr_stream->config = *stream_config; @@ -9550,7 +9556,6 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, /* The aspect ratio cropping is currently only * supported on the new input system. */ if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { - struct ia_css_resolution crop_res; err = aspect_ratio_crop(curr_pipe, &crop_res); @@ -9594,7 +9599,7 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, goto ERR; } /* sensor binning */ - if (!spcopyonly){ + if (!spcopyonly) { sensor_binning_changed = sh_css_params_set_binning_factor(curr_stream, curr_stream->config.sensor_binning_factor); } else { @@ -9636,7 +9641,7 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, if (curr_stream->cont_capt == true) { capture_pipe = find_pipe(pipes, num_pipes, IA_CSS_PIPE_MODE_CAPTURE, false); - if (capture_pipe == NULL) { + if (!capture_pipe) { err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; } @@ -9695,6 +9700,7 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, /* now pipes have been configured, info should be available */ for (i = 0; i < num_pipes; i++) { struct ia_css_pipe_info *pipe_info = NULL; + curr_pipe = pipes[i]; err = sh_css_pipe_load_binaries(curr_pipe); @@ -9712,12 +9718,12 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, #ifdef ISP2401 pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; #endif - if (!spcopyonly){ + if (!spcopyonly) { err = sh_css_pipe_get_shading_info(curr_pipe, #ifndef ISP2401 &pipe_info->shading_info); #else - &pipe_info->shading_info, &curr_pipe->config); + & pipe_info->shading_info, &curr_pipe->config); #endif if (err != IA_CSS_SUCCESS) goto ERR; @@ -9807,7 +9813,7 @@ ia_css_stream_destroy(struct ia_css_stream *stream) #endif IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (stream == NULL) { + if (!stream) { err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -9815,7 +9821,7 @@ ia_css_stream_destroy(struct ia_css_stream *stream) ia_css_stream_isp_parameters_uninit(stream); - if ((stream->last_pipe != NULL) && + if ((stream->last_pipe) && ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) { #if defined(USE_INPUT_SYSTEM_VERSION_2401) for (i = 0; i < stream->num_pipes; i++) { @@ -9823,19 +9829,19 @@ ia_css_stream_destroy(struct ia_css_stream *stream) unsigned int sp_thread_id; struct sh_css_sp_pipeline_terminal *sp_pipeline_input_terminal; - assert(entry != NULL); - if (entry != NULL) { + assert(entry); + if (entry) { /* get the SP thread id */ if (ia_css_pipeline_get_sp_thread_id( ia_css_pipe_get_pipe_num(entry), &sp_thread_id) != true) return IA_CSS_ERR_INTERNAL_ERROR; /* get the target input terminal */ sp_pipeline_input_terminal = - &(sh_css_sp_group.pipe_io[sp_thread_id].input); + &sh_css_sp_group.pipe_io[sp_thread_id].input; for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { ia_css_isys_stream_h isys_stream = - &(sp_pipeline_input_terminal->context.virtual_input_system_stream[i]); + &sp_pipeline_input_terminal->context.virtual_input_system_stream[i]; if (stream->config.isys_config[i].valid && isys_stream->valid) ia_css_isys_stream_destroy(isys_stream); } @@ -9854,7 +9860,7 @@ ia_css_stream_destroy(struct ia_css_stream *stream) * some test stream create-destroy cycles do not generate output frames * and the mipi buffer is not freed in the deque function */ - if (entry != NULL) + if (entry) free_mipi_frames(entry); } } @@ -9863,7 +9869,8 @@ ia_css_stream_destroy(struct ia_css_stream *stream) for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *curr_pipe = stream->pipes[i]; - assert(curr_pipe != NULL); + + assert(curr_pipe); ia_css_pipe_map_queue(curr_pipe, false); } @@ -9877,8 +9884,9 @@ ia_css_stream_destroy(struct ia_css_stream *stream) /* remove references from pipes to stream */ for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *entry = stream->pipes[i]; - assert(entry != NULL); - if (entry != NULL) { + + assert(entry); + if (entry) { /* clear reference to stream */ entry->stream = NULL; /* check internal copy pipe */ @@ -9902,7 +9910,7 @@ ia_css_stream_destroy(struct ia_css_stream *stream) #ifndef ISP2401 /* working mode: take out of the seed list */ if (my_css_save.mode == sh_css_mode_working) - for(i=0;iinfo; return IA_CSS_SUCCESS; @@ -9952,25 +9960,28 @@ ia_css_stream_load(struct ia_css_stream *stream) #ifndef ISP2401 int i; enum ia_css_err err; - assert(stream != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() enter, \n"); + + assert(stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() enter,\n"); for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { if (my_css_save.stream_seeds[i].stream == stream) { int j; - for ( j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { - if ((err = ia_css_pipe_create(&(my_css_save.stream_seeds[i].pipe_config[j]), &my_css_save.stream_seeds[i].pipes[j])) != IA_CSS_SUCCESS) { + + for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { + if ((err = ia_css_pipe_create(&my_css_save.stream_seeds[i].pipe_config[j], &my_css_save.stream_seeds[i].pipes[j])) != IA_CSS_SUCCESS) { if (j) { int k; - for(k=0;klast_pipe == NULL)) { + if ((!stream) || (!stream->last_pipe)) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -10011,7 +10023,7 @@ ia_css_stream_start(struct ia_css_stream *stream) #if !defined(HAS_NO_INPUT_SYSTEM) #if defined(USE_INPUT_SYSTEM_VERSION_2401) - if((stream->config.mode == IA_CSS_INPUT_MODE_SENSOR) || + if ((stream->config.mode == IA_CSS_INPUT_MODE_SENSOR) || (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) stream_register_with_csi_rx(stream); #endif @@ -10022,7 +10034,7 @@ ia_css_stream_start(struct ia_css_stream *stream) if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { unsigned int idx; - unsigned int port = (unsigned int) (stream->config.source.port.port) ; + unsigned int port = (unsigned int)(stream->config.source.port.port); for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = sh_css_get_mipi_sizes_for_check(port, idx); @@ -10049,8 +10061,8 @@ ia_css_stream_stop(struct ia_css_stream *stream) enum ia_css_err err = IA_CSS_SUCCESS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop() enter/exit\n"); - assert(stream != NULL); - assert(stream->last_pipe != NULL); + assert(stream); + assert(stream->last_pipe); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop: stopping %d\n", stream->last_pipe->mode); @@ -10059,7 +10071,7 @@ ia_css_stream_stop(struct ia_css_stream *stream) if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { unsigned int idx; - unsigned int port = (unsigned int) (stream->config.source.port.port) ; + unsigned int port = (unsigned int)(stream->config.source.port.port); for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = 0; @@ -10086,7 +10098,8 @@ bool ia_css_stream_has_stopped(struct ia_css_stream *stream) { bool stopped; - assert(stream != NULL); + + assert(stream); #ifndef ISP2401 stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); @@ -10106,22 +10119,24 @@ enum ia_css_err ia_css_stream_unload(struct ia_css_stream *stream) { int i; - assert(stream != NULL); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() enter, \n"); + + assert(stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() enter,\n"); /* some checks */ - assert (stream != NULL); - for(i=0;imode; else *pipe_id = IA_CSS_PIPE_ID_COPY; @@ -10155,12 +10170,12 @@ ia_css_stream_get_shading_correction_binary(const struct ia_css_stream *stream) { struct ia_css_pipe *pipe; - assert(stream != NULL); + assert(stream); pipe = stream->pipes[0]; if (stream->num_pipes == 2) { - assert(stream->pipes[1] != NULL); + assert(stream->pipes[1]); if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) pipe = stream->pipes[1]; @@ -10176,8 +10191,9 @@ ia_css_stream_get_dvs_binary(const struct ia_css_stream *stream) struct ia_css_pipe *video_pipe = NULL; /* First we find the video pipe */ - for (i=0; inum_pipes; i++) { + for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *pipe = stream->pipes[i]; + if (pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { video_pipe = pipe; break; @@ -10194,12 +10210,12 @@ ia_css_stream_get_3a_binary(const struct ia_css_stream *stream) struct ia_css_pipe *pipe; struct ia_css_binary *s3a_binary = NULL; - assert(stream != NULL); + assert(stream); pipe = stream->pipes[0]; if (stream->num_pipes == 2) { - assert(stream->pipes[1] != NULL); + assert(stream->pipes[1]); if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) pipe = stream->pipes[1]; @@ -10210,17 +10226,16 @@ ia_css_stream_get_3a_binary(const struct ia_css_stream *stream) return s3a_binary; } - enum ia_css_err ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, unsigned int output_padded_width) { struct ia_css_pipe *pipe; - assert(stream != NULL); + assert(stream); pipe = stream->last_pipe; - assert(pipe != NULL); + assert(pipe); /* set the config also just in case (redundant info? why do we save config in pipe?) */ pipe->config.output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; @@ -10234,7 +10249,7 @@ ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe) { struct ia_css_binary *binary = NULL; - assert(pipe != NULL); + assert(pipe); switch (pipe->config.mode) { case IA_CSS_PIPE_MODE_PREVIEW: @@ -10253,8 +10268,7 @@ ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe) break; } } - } - else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) + } else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { @@ -10279,26 +10293,26 @@ ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) { struct ia_css_binary *binary = NULL; - assert(pipe != NULL); + assert(pipe); switch (pipe->config.mode) { case IA_CSS_PIPE_MODE_PREVIEW: - binary = (struct ia_css_binary*)&pipe->pipe_settings.preview.preview_binary; + binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; break; case IA_CSS_PIPE_MODE_VIDEO: - binary = (struct ia_css_binary*)&pipe->pipe_settings.video.video_binary; + binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; break; case IA_CSS_PIPE_MODE_CAPTURE: if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { unsigned int i; + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; break; } } - } - else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) + } else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { @@ -10317,7 +10331,7 @@ ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) if (binary && !binary->info->sp.enable.s3a) binary = NULL; - return binary; + return binary; } static struct ia_css_binary * @@ -10325,11 +10339,11 @@ ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe) { struct ia_css_binary *binary = NULL; - assert(pipe != NULL); + assert(pipe); switch (pipe->config.mode) { case IA_CSS_PIPE_MODE_VIDEO: - binary = (struct ia_css_binary*)&pipe->pipe_settings.video.video_binary; + binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; break; default: break; @@ -10344,15 +10358,15 @@ ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe) struct ia_css_pipeline * ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe) { - assert(pipe != NULL); + assert(pipe); - return (struct ia_css_pipeline*)&pipe->pipeline; + return (struct ia_css_pipeline *)&pipe->pipeline; } unsigned int ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) { - assert(pipe != NULL); + assert(pipe); /* KW was not sure this function was not returning a value that was out of range; so added an assert, and, for the @@ -10367,11 +10381,10 @@ ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) return pipe->pipe_num; } - unsigned int ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe) { - assert(pipe != NULL); + assert(pipe); return (unsigned int)pipe->config.isp_pipe_version; } @@ -10389,7 +10402,7 @@ ia_css_start_sp(void) /* waiting for the SP is completely started */ timeout = SP_START_TIMEOUT_US; - while((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout) { + while ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout) { timeout--; hrt_sleep(); } @@ -10502,7 +10515,7 @@ ia_css_update_continuous_frames(struct ia_css_stream *stream) IA_CSS_DEBUG_TRACE, "sh_css_update_continuous_frames() enter:\n"); - if (stream == NULL) { + if (!stream) { ia_css_debug_dtrace( IA_CSS_DEBUG_TRACE, "sh_css_update_continuous_frames() leave: invalid stream, return_void\n"); @@ -10533,7 +10546,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) bool need_input_queue; IA_CSS_ENTER(""); - assert(pipe != NULL); + assert(pipe); pipe_id = pipe->mode; pipe_num = pipe->pipe_num; @@ -10624,6 +10637,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) #endif } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { unsigned int idx; + for (idx = 0; idx < IA_CSS_PIPE_MAX_OUTPUT_STAGE; idx++) { ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx, map); if (pipe->enable_viewfinder[idx]) @@ -10652,8 +10666,7 @@ static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info *inf if (info->padded_width > info->res.width) { frame->config_on_frame_enqueue.padded_width = info->padded_width; - } - else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) + } else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) { return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -10676,7 +10689,7 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) /* Only continuous streams have a tagger to which we can send the * unlock message. */ - if (stream == NULL || !stream->config.continuous) { + if (!stream || !stream->config.continuous) { IA_CSS_ERROR("invalid stream pointer"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -10697,7 +10710,7 @@ ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) } /* @brief Set the state (Enable or Disable) of the Extension stage in the - * given pipe. + * given pipe. */ enum ia_css_err ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool enable) @@ -10709,7 +10722,7 @@ ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool IA_CSS_ENTER(""); /* Parameter Check */ - if (pipe == NULL || pipe->stream == NULL) { + if (!pipe || !pipe->stream) { IA_CSS_ERROR("Invalid Pipe."); err = IA_CSS_ERR_INVALID_ARGUMENTS; } else if (!(pipe->config.acc_extension)) { @@ -10721,19 +10734,19 @@ ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool } else { /* Query the threadid and stage_num for the Extension firmware*/ ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&(pipe->pipeline), fw_handle, &stage); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); if (err == IA_CSS_SUCCESS) { /* Set the Extension State;. TODO: Add check for stage firmware.type (QOS)*/ err = ia_css_bufq_enqueue_psys_event( - (uint8_t) IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE, - (uint8_t) thread_id, - (uint8_t) stage->stage_num, + (uint8_t)IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE, + (uint8_t)thread_id, + (uint8_t)stage->stage_num, enable ? 1 : 0); if (err == IA_CSS_SUCCESS) { - if(enable) - SH_CSS_QOS_STAGE_ENABLE(&(sh_css_sp_group.pipe[thread_id]),stage->stage_num); + if (enable) + SH_CSS_QOS_STAGE_ENABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); else - SH_CSS_QOS_STAGE_DISABLE(&(sh_css_sp_group.pipe[thread_id]),stage->stage_num); + SH_CSS_QOS_STAGE_DISABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); } } } @@ -10754,7 +10767,7 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool IA_CSS_ENTER(""); /* Parameter Check */ - if (pipe == NULL || pipe->stream == NULL) { + if (!pipe || !pipe->stream) { IA_CSS_ERROR("Invalid Pipe."); err = IA_CSS_ERR_INVALID_ARGUMENTS; } else if (!(pipe->config.acc_extension)) { @@ -10770,7 +10783,7 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool if (err == IA_CSS_SUCCESS) { /* Get the Extension State */ - *enable = (SH_CSS_QOS_STAGE_IS_ENABLED(&(sh_css_sp_group.pipe[thread_id]),stage->stage_num)) ? true : false; + *enable = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], stage->stage_num)) ? true : false; } } IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, *enable); @@ -10799,7 +10812,7 @@ ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, uint32_t fw_hand fw = &sh_css_sp_fw; /* Parameter Check */ - if (pipe == NULL || pipe->stream == NULL) { + if (!pipe || !pipe->stream) { IA_CSS_ERROR("Invalid Pipe."); err = IA_CSS_ERR_INVALID_ARGUMENTS; } else if (!(pipe->config.acc_extension)) { @@ -10811,10 +10824,10 @@ ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, uint32_t fw_hand } else { /* Query the thread_id and stage_num corresponding to the Extension firmware */ ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&(pipe->pipeline), fw_handle, &stage); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); if (err == IA_CSS_SUCCESS) { /* Get the Extension State */ - enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&(sh_css_sp_group.pipe[thread_id]), stage->stage_num)) ? true : false; + enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], stage->stage_num)) ? true : false; /* Update mapped arg only when extension stage is not enabled */ if (enabled) { IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); @@ -10861,12 +10874,12 @@ aspect_ratio_crop_init(struct ia_css_stream *curr_stream, enum ia_css_err err = IA_CSS_SUCCESS; int i; struct ia_css_pipe *curr_pipe; - uint32_t pipe_mask = 0; + u32 pipe_mask = 0; - if ((curr_stream == NULL) || + if ((!curr_stream) || (curr_stream->num_pipes == 0) || - (pipes == NULL) || - (do_crop_status == NULL)) { + (!pipes) || + (!do_crop_status)) { err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR(err); return err; @@ -10890,7 +10903,7 @@ aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) { bool status = false; - if ((curr_pipe != NULL) && enabled) { + if ((curr_pipe) && enabled) { if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) @@ -10912,8 +10925,8 @@ aspect_ratio_crop(struct ia_css_pipe *curr_pipe, bool use_vf_pp_in_res = false; bool use_capt_pp_in_res = false; - if ((curr_pipe == NULL) || - (effective_res == NULL)) { + if ((!curr_pipe) || + (!effective_res)) { err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR(err); return err; @@ -11007,7 +11020,7 @@ sh_css_hmm_buffer_record_uninit(void) buffer_record = &hmm_buffer_record[0]; for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { if (buffer_record->in_use) { - if (buffer_record->h_vbuf != NULL) + if (buffer_record->h_vbuf) ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); sh_css_hmm_buffer_record_reset(buffer_record); #else @@ -11015,7 +11028,7 @@ sh_css_hmm_buffer_record_uninit(void) buffer_record = &hmm_buffer_record[0]; for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { if (buffer_record->in_use) { - if (buffer_record->h_vbuf != NULL) + if (buffer_record->h_vbuf) ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); sh_css_hmm_buffer_record_reset(buffer_record); } @@ -11031,7 +11044,7 @@ sh_css_hmm_buffer_record_uninit(void) static void sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record) { - assert(buffer_record != NULL); + assert(buffer_record); buffer_record->in_use = false; buffer_record->type = IA_CSS_BUFFER_TYPE_INVALID; buffer_record->h_vbuf = NULL; @@ -11047,7 +11060,7 @@ static struct sh_css_hmm_buffer_record struct sh_css_hmm_buffer_record *buffer_record = NULL; struct sh_css_hmm_buffer_record *out_buffer_record = NULL; - assert(h_vbuf != NULL); + assert(h_vbuf); assert((type > IA_CSS_BUFFER_TYPE_INVALID) && (type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)); assert(kernel_ptr != 0); @@ -11079,7 +11092,7 @@ static struct sh_css_hmm_buffer_record for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { if ((buffer_record->in_use) && (buffer_record->type == type) && - (buffer_record->h_vbuf != NULL) && + (buffer_record->h_vbuf) && (buffer_record->h_vbuf->vptr == ddr_buffer_addr)) { found_record = true; break; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h index 4072c564f911b..87a6b4a7efdd5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h @@ -70,7 +70,7 @@ #define SH_CSS_BDS_FACTOR_8_00 (11) #define NUM_BDS_FACTORS (12) -#define PACK_BDS_FACTOR(factor) (1<<(factor)) +#define PACK_BDS_FACTOR(factor) (1 << (factor)) /* Following macros should match with the type enum ia_css_pipe_version in * ia_css_pipe_public.h. The reason to add these macros is that enum type @@ -101,7 +101,7 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] /* Bits of fractional part of interpolation in vamem, [0,4095]->[0,255] */ #define SH_CSS_RGB_GAMMA_FRAC_BITS \ (SH_CSS_RGB_GAMMA_INPUT_BITS - SH_CSS_ISP_RGB_GAMMA_TABLE_SIZE_LOG2) -#define SH_CSS_RGB_GAMMA_ONE (1 << SH_CSS_RGB_GAMMA_FRAC_BITS) +#define SH_CSS_RGB_GAMMA_ONE BIT(SH_CSS_RGB_GAMMA_FRAC_BITS) /* Bits of input of CCM, = 13, Y[0,8191],CgCo[-4096,4095] */ #define SH_CSS_YUV2RGB_CCM_INPUT_BITS SH_CSS_BAYER_BITS @@ -131,7 +131,7 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MAX_BQ_GRID_WIDTH 80 #define SH_CSS_MAX_BQ_GRID_HEIGHT 60 -/* The minimum dvs envelope is 12x12(for IPU2) to make sure the +/* The minimum dvs envelope is 12x12(for IPU2) to make sure the * invalid rows/columns that result from filter initialization are skipped. */ #define SH_CSS_MIN_DVS_ENVELOPE 12U @@ -184,7 +184,7 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MORPH_TABLE_GRID ISP_VEC_NELEMS #define SH_CSS_MORPH_TABLE_ELEM_BYTES 2 #define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \ - (HIVE_ISP_DDR_WORD_BYTES/SH_CSS_MORPH_TABLE_ELEM_BYTES) + (HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES) #ifndef ISP2401 #define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) @@ -211,7 +211,6 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define NUM_TNR_FRAMES 2 /* FIXME */ - #define MAX_NUM_DELAY_FRAMES MAX_NUM_VIDEO_DELAY_FRAMES #else @@ -257,15 +256,15 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] /* Rules: these implement logic shared between the host code and ISP firmware. The ISP firmware needs these rules to be applied at pre-processor time, that's why these are macros, not functions. */ -#define _ISP_BQS(num) ((num)/2) +#define _ISP_BQS(num) ((num) / 2) #define _ISP_VECS(width) CEIL_DIV(width, ISP_VEC_NELEMS) #define ISP_BQ_GRID_WIDTH(elements_per_line, deci_factor_log2) \ - CEIL_SHIFT(elements_per_line/2, deci_factor_log2) + CEIL_SHIFT(elements_per_line / 2, deci_factor_log2) #define ISP_BQ_GRID_HEIGHT(lines_per_frame, deci_factor_log2) \ - CEIL_SHIFT(lines_per_frame/2, deci_factor_log2) + CEIL_SHIFT(lines_per_frame / 2, deci_factor_log2) #define ISP_C_VECTORS_PER_LINE(elements_per_line) \ - _ISP_VECS(elements_per_line/2) + _ISP_VECS(elements_per_line / 2) /* The morphing table is similar to the shading table in the sense that we have 1 more value than we have cells in the grid. */ @@ -304,7 +303,7 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] CEIL_SHIFT(_ISP_BQS(in_height), deci_factor_log2) #define ISP_S3ATBL_VECTORS \ _ISP_VECS(SH_CSS_MAX_S3ATBL_WIDTH * \ - (sizeof(struct ia_css_3a_output)/sizeof(int32_t))) + (sizeof(struct ia_css_3a_output) / sizeof(int32_t))) #define ISP_S3ATBL_HI_LO_STRIDE \ (ISP_S3ATBL_VECTORS * ISP_VEC_NELEMS) #define ISP_S3ATBL_HI_LO_STRIDE_BYTES \ @@ -312,7 +311,7 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] /* Viewfinder support */ #define __ISP_MAX_VF_OUTPUT_WIDTH(width, left_crop) \ - (width - 2*ISP_VEC_NELEMS + ((left_crop) ? 2 * ISP_VEC_NELEMS : 0)) + (width - 2 * ISP_VEC_NELEMS + ((left_crop) ? 2 * ISP_VEC_NELEMS : 0)) #define __ISP_VF_OUTPUT_WIDTH_VECS(out_width, vf_log_downscale) \ (_ISP_VECS((out_width) >> (vf_log_downscale))) @@ -330,17 +329,17 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] /* Rules for computing the internal width. This is extremely complicated * and definitely needs to be commented and explained. */ -#define _ISP_LEFT_CROP_EXTRA(left_crop) ((left_crop) > 0 ? 2*ISP_VEC_NELEMS : 0) +#define _ISP_LEFT_CROP_EXTRA(left_crop) ((left_crop) > 0 ? 2 * ISP_VEC_NELEMS : 0) #define __ISP_MIN_INTERNAL_WIDTH(num_chunks, pipelining, mode) \ - ((num_chunks) * (pipelining) * (1<<_ISP_LOG_VECTOR_STEP(mode)) * \ + ((num_chunks) * (pipelining) * (1 << _ISP_LOG_VECTOR_STEP(mode)) * \ ISP_VEC_NELEMS) #define __ISP_PADDED_OUTPUT_WIDTH(out_width, dvs_env_width, left_crop) \ ((out_width) + MAX(dvs_env_width, _ISP_LEFT_CROP_EXTRA(left_crop))) #define __ISP_CHUNK_STRIDE_ISP(mode) \ - ((1<<_ISP_LOG_VECTOR_STEP(mode)) * ISP_VEC_NELEMS) + ((1 << _ISP_LOG_VECTOR_STEP(mode)) * ISP_VEC_NELEMS) #define __ISP_CHUNK_STRIDE_DDR(c_subsampling, num_chunks) \ ((c_subsampling) * (num_chunks) * HIVE_ISP_DDR_WORD_BYTES) @@ -375,9 +374,9 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] ((enable_ds) ? \ SH_CSS_MAX_SENSOR_WIDTH :\ (enable_fixed_bayer_ds) ? \ - CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC, 4*ISP_VEC_NELEMS) : \ + CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH_DEC, 4 * ISP_VEC_NELEMS) : \ (enable_raw_bin) ? \ - CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH, 4*ISP_VEC_NELEMS) : \ + CEIL_MUL(SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH, 4 * ISP_VEC_NELEMS) : \ (enable_continuous) ? \ SH_CSS_MAX_CONTINUOUS_SENSOR_WIDTH \ : max_internal_width) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c index 8158ea40d0695..2be1d0904336d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c @@ -56,7 +56,7 @@ static struct firmware_header *firmware_header; #ifndef ISP2401 static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); #else -static const char *release_version = STR(irci_ecr-master_20150911_0724); +static const char *release_version = STR(irci_ecr - master_20150911_0724); #endif #define MAX_FW_REL_VER_NAME 300 @@ -64,28 +64,26 @@ static char FW_rel_ver_name[MAX_FW_REL_VER_NAME] = "---"; struct ia_css_fw_info sh_css_sp_fw; struct ia_css_blob_descr *sh_css_blob_info; /* Only ISP blob info (no SP) */ -unsigned sh_css_num_binaries; /* This includes 1 SP binary */ +unsigned int sh_css_num_binaries; /* This includes 1 SP binary */ static struct fw_param *fw_minibuffer; - char *sh_css_get_fw_version(void) { return FW_rel_ver_name; } - /* * Split the loaded firmware into blobs */ /* Setup sp/sp1 binary */ static enum ia_css_err -setup_binary(struct ia_css_fw_info *fw, const char *fw_data, struct ia_css_fw_info *sh_css_fw, unsigned binary_id) +setup_binary(struct ia_css_fw_info *fw, const char *fw_data, struct ia_css_fw_info *sh_css_fw, unsigned int binary_id) { const char *blob_data; - if ((fw == NULL) || (fw_data == NULL)) + if ((!fw) || (!fw_data)) return IA_CSS_ERR_INVALID_ARGUMENTS; blob_data = fw_data + fw->blob.offset; @@ -93,7 +91,7 @@ setup_binary(struct ia_css_fw_info *fw, const char *fw_data, struct ia_css_fw_in *sh_css_fw = *fw; sh_css_fw->blob.code = vmalloc(fw->blob.size); - if (sh_css_fw->blob.code == NULL) + if (!sh_css_fw->blob.code) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; memcpy((void *)sh_css_fw->blob.code, blob_data, fw->blob.size); @@ -102,17 +100,18 @@ setup_binary(struct ia_css_fw_info *fw, const char *fw_data, struct ia_css_fw_in return IA_CSS_SUCCESS; } + enum ia_css_err -sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia_css_blob_descr *bd, unsigned index) +sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia_css_blob_descr *bd, unsigned int index) { const char *name; const unsigned char *blob; - if ((fw == NULL) || (bd == NULL)) + if ((!fw) || (!bd)) return IA_CSS_ERR_INVALID_ARGUMENTS; /* Special case: only one binary in fw */ - if (bi == NULL) bi = (const struct ia_css_fw_info *)fw; + if (!bi) bi = (const struct ia_css_fw_info *)fw; name = fw + bi->blob.prog_name_offset; blob = (const unsigned char *)fw + bi->blob.offset; @@ -123,7 +122,7 @@ sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia return IA_CSS_ERR_INVALID_ARGUMENTS; } - if ((bi->blob.offset % (1UL<<(ISP_PMEM_WIDTH_LOG2-3))) != 0) + if ((bi->blob.offset % (1UL << (ISP_PMEM_WIDTH_LOG2 - 3))) != 0) return IA_CSS_ERR_INVALID_ARGUMENTS; bd->blob = blob; @@ -196,7 +195,7 @@ enum ia_css_err sh_css_load_firmware(const char *fw_data, unsigned int fw_size) { - unsigned i; + unsigned int i; struct ia_css_fw_info *binaries; struct sh_css_fw_bi_file_h *file_header; bool valid_firmware = false; @@ -270,7 +269,7 @@ sh_css_load_firmware(const char *fw_data, if (bi->type != ia_css_isp_firmware) return IA_CSS_ERR_INTERNAL_ERROR; - if (sh_css_blob_info == NULL) /* cannot happen but KW does not see this */ + if (!sh_css_blob_info) /* cannot happen but KW does not see this */ return IA_CSS_ERR_INTERNAL_ERROR; sh_css_blob_info[i - NUM_OF_SPS] = bd; } @@ -281,10 +280,10 @@ sh_css_load_firmware(const char *fw_data, void sh_css_unload_firmware(void) { - /* release firmware minibuffer */ if (fw_minibuffer) { unsigned int i = 0; + for (i = 0; i < sh_css_num_binaries; i++) { if (fw_minibuffer[i].name) kfree((void *)fw_minibuffer[i].name); @@ -302,14 +301,14 @@ void sh_css_unload_firmware(void) } hrt_vaddress -sh_css_load_blob(const unsigned char *blob, unsigned size) +sh_css_load_blob(const unsigned char *blob, unsigned int size) { hrt_vaddress target_addr = mmgr_malloc(size); /* this will allocate memory aligned to a DDR word boundary which is required for the CSS DMA to read the instructions. */ - assert(blob != NULL); - if (target_addr) + assert(blob); + if (target_addr) mmgr_store(target_addr, blob, size); return target_addr; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h index 588aabde8a86d..55d94f268b2a3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h @@ -32,7 +32,7 @@ extern struct ia_css_fw_info sh_css_sp_fw; extern struct ia_css_fw_info sh_css_bl_fw; #endif /* HAS_BL */ extern struct ia_css_blob_descr *sh_css_blob_info; -extern unsigned sh_css_num_binaries; +extern unsigned int sh_css_num_binaries; char *sh_css_get_fw_version(void); @@ -46,7 +46,7 @@ sh_css_load_firmware(const char *fw_data, void sh_css_unload_firmware(void); -hrt_vaddress sh_css_load_blob(const unsigned char *blob, unsigned size); +hrt_vaddress sh_css_load_blob(const unsigned char *blob, unsigned int size); enum ia_css_err sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia_css_blob_descr *bd, unsigned int i); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h index 90a63b3921e6c..cd2d755ec523d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h @@ -18,23 +18,23 @@ #include #define sISP_REG_BIT ISP_VEC_ELEMBITS -#define uISP_REG_BIT ((unsigned)(sISP_REG_BIT-1)) -#define sSHIFT (16-sISP_REG_BIT) -#define uSHIFT ((unsigned)(16-uISP_REG_BIT)) -#define sFRACTION_BITS_FITTING(a) (a-sSHIFT) -#define uFRACTION_BITS_FITTING(a) ((unsigned)(a-uSHIFT)) -#define sISP_VAL_MIN (-(1<>sSHIFT) >> max(sFRACTION_BITS_FITTING(a)-(b), 0)), \ + min_t(int, max_t(int, (((v) >> sSHIFT) >> max(sFRACTION_BITS_FITTING(a) - (b), 0)), \ sISP_VAL_MIN), sISP_VAL_MAX) #define uDIGIT_FITTING(v, a, b) \ - min((unsigned)max((unsigned)(((v)>>uSHIFT) \ - >> max((int)(uFRACTION_BITS_FITTING(a)-(b)), 0)), \ + min((unsigned int)max((unsigned)(((v) >> uSHIFT) \ + >> max((int)(uFRACTION_BITS_FITTING(a) - (b)), 0)), \ uISP_VAL_MIN), uISP_VAL_MAX) #endif /* __SH_CSS_FRAC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c index 716d808d56db6..fb4598341408c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c @@ -48,8 +48,9 @@ bool sh_css_hrt_system_is_idle(void) if (!idle) IA_CSS_WARNING("ISP not idle"); - for (ch=0; chlength; i++) { histogram->run[i] = 0; @@ -59,9 +59,9 @@ sh_css_metrics_enable_pc_histogram(bool enable) } static void -make_histogram(struct sh_css_pc_histogram *histogram, unsigned length) +make_histogram(struct sh_css_pc_histogram *histogram, unsigned int length) { - assert(histogram != NULL); + assert(histogram); if (histogram->length) return; @@ -85,9 +85,9 @@ static void insert_binary_metrics(struct sh_css_binary_metrics **l, struct sh_css_binary_metrics *metrics) { - assert(l != NULL); - assert(*l != NULL); - assert(metrics != NULL); + assert(l); + assert(*l); + assert(metrics); for (; *l; l = &(*l)->next) if (*l == metrics) @@ -100,7 +100,7 @@ insert_binary_metrics(struct sh_css_binary_metrics **l, void sh_css_metrics_start_binary(struct sh_css_binary_metrics *metrics) { - assert(metrics != NULL); + assert(metrics); if (!pc_histogram_enabled) return; @@ -125,7 +125,6 @@ sh_css_metrics_sample_pcs(void) unsigned int resume_sc = 0; #endif - #if MULTIPLE_PCS int i; unsigned int pc_tab[NOF_PCS]; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h index 2ef9238d95ad5..f465d1545b8b1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h @@ -18,22 +18,22 @@ #include struct sh_css_pc_histogram { - unsigned length; - unsigned *run; - unsigned *stall; - unsigned *msink; + unsigned int length; + unsigned int *run; + unsigned int *stall; + unsigned int *msink; }; struct sh_css_binary_metrics { - unsigned mode; - unsigned id; + unsigned int mode; + unsigned int id; struct sh_css_pc_histogram isp_histogram; struct sh_css_pc_histogram sp_histogram; struct sh_css_binary_metrics *next; }; struct ia_css_frame_metrics { - unsigned num_frames; + unsigned int num_frames; }; struct sh_css_metrics { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c index a6a00024bae84..2713fc042dcd4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c @@ -30,7 +30,7 @@ #include "sw_event_global.h" /* IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY */ #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) -static uint32_t ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */ +static u32 ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */ #endif enum ia_css_err @@ -59,15 +59,15 @@ static bool ia_css_mipi_is_source_port_valid(struct ia_css_pipe *pipe, switch (pipe->stream->config.mode) { case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: - port = (unsigned int) pipe->stream->config.source.port.port; + port = (unsigned int)pipe->stream->config.source.port.port; max_ports = N_CSI_PORTS; break; case IA_CSS_INPUT_MODE_TPG: - port = (unsigned int) pipe->stream->config.source.tpg.id; + port = (unsigned int)pipe->stream->config.source.tpg.id; max_ports = N_CSS_TPG_IDS; break; case IA_CSS_INPUT_MODE_PRBS: - port = (unsigned int) pipe->stream->config.source.prbs.id; + port = (unsigned int)pipe->stream->config.source.prbs.id; max_ports = N_CSS_PRBS_IDS; break; default: @@ -242,7 +242,7 @@ enum ia_css_err ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, const unsigned int size_mem_words) { - uint32_t idx; + u32 idx; enum ia_css_err err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; @@ -396,9 +396,9 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "allocate_mipi_frames(%p) enter:\n", pipe); - assert(pipe != NULL); - assert(pipe->stream != NULL); - if ((pipe == NULL) || (pipe->stream == NULL)) { + assert(pipe); + assert(pipe->stream); + if ((!pipe) || (!pipe->stream)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "allocate_mipi_frames(%p) exit: pipe or stream is null.\n", pipe); @@ -428,7 +428,7 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) } #ifndef ISP2401 - port = (unsigned int) pipe->stream->config.source.port.port; + port = (unsigned int)pipe->stream->config.source.port.port; assert(port < N_CSI_PORTS); if (port >= N_CSI_PORTS) { #else @@ -442,8 +442,8 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) #ifdef USE_INPUT_SYSTEM_VERSION_2401 err = calculate_mipi_buff_size( - &(pipe->stream->config), - &(my_css.mipi_frame_size[port])); + &pipe->stream->config, + &my_css.mipi_frame_size[port]); #endif #if defined(USE_INPUT_SYSTEM_VERSION_2) @@ -486,7 +486,8 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) /* Incremental allocation (per stream), not for all streams at once. */ { /* limit the scope of i,j */ - unsigned i, j; + unsigned int i, j; + for (i = 0; i < my_css.num_mipi_frames[port]; i++) { /* free previous frame */ if (my_css.mipi_frames[port][i]) { @@ -515,7 +516,7 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) } if (info->metadata_info.size > 0) { /* free previous metadata buffer */ - if (my_css.mipi_metadata[port][i] != NULL) { + if (my_css.mipi_metadata[port][i]) { ia_css_metadata_free(my_css.mipi_metadata[port][i]); my_css.mipi_metadata[port][i] = NULL; } @@ -523,7 +524,7 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) if (i < my_css.num_mipi_frames[port]) { /* allocate new metadata buffer */ my_css.mipi_metadata[port][i] = ia_css_metadata_allocate(&info->metadata_info); - if (my_css.mipi_metadata[port][i] == NULL) { + if (!my_css.mipi_metadata[port][i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "allocate_mipi_metadata(%p, %d) failed.\n", pipe, port); @@ -558,9 +559,9 @@ free_mipi_frames(struct ia_css_pipe *pipe) "free_mipi_frames(%p) enter:\n", pipe); /* assert(pipe != NULL); TEMP: TODO: Should be assert only. */ - if (pipe != NULL) { - assert(pipe->stream != NULL); - if ((pipe == NULL) || (pipe->stream == NULL)) { + if (pipe) { + assert(pipe->stream); + if ((!pipe) || (!pipe->stream)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "free_mipi_frames(%p) exit: error: pipe or stream is null.\n", pipe); @@ -581,7 +582,7 @@ free_mipi_frames(struct ia_css_pipe *pipe) } #ifndef ISP2401 - port = (unsigned int) pipe->stream->config.source.port.port; + port = (unsigned int)pipe->stream->config.source.port.port; assert(port < N_CSI_PORTS); if (port >= N_CSI_PORTS) { #else @@ -615,14 +616,15 @@ free_mipi_frames(struct ia_css_pipe *pipe) if (ref_count_mipi_allocation[port] == 0) { /* no streams are using this buffer, so free it */ unsigned int i; + for (i = 0; i < my_css.num_mipi_frames[port]; i++) { - if (my_css.mipi_frames[port][i] != NULL) { + if (my_css.mipi_frames[port][i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "free_mipi_frames(port=%d, num=%d).\n", port, i); ia_css_frame_free(my_css.mipi_frames[port][i]); my_css.mipi_frames[port][i] = NULL; } - if (my_css.mipi_metadata[port][i] != NULL) { + if (my_css.mipi_metadata[port][i]) { ia_css_metadata_free(my_css.mipi_metadata[port][i]); my_css.mipi_metadata[port][i] = NULL; } @@ -648,14 +650,15 @@ free_mipi_frames(struct ia_css_pipe *pipe) /* AM TEMP: free-ing all mipi buffers just like a legacy code. */ for (port = CSI_PORT0_ID; port < N_CSI_PORTS; port++) { unsigned int i; + for (i = 0; i < my_css.num_mipi_frames[port]; i++) { - if (my_css.mipi_frames[port][i] != NULL) { + if (my_css.mipi_frames[port][i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "free_mipi_frames(port=%d, num=%d).\n", port, i); ia_css_frame_free(my_css.mipi_frames[port][i]); my_css.mipi_frames[port][i] = NULL; } - if (my_css.mipi_metadata[port][i] != NULL) { + if (my_css.mipi_metadata[port][i]) { ia_css_metadata_free(my_css.mipi_metadata[port][i]); my_css.mipi_metadata[port][i] = NULL; } @@ -683,9 +686,9 @@ send_mipi_frames(struct ia_css_pipe *pipe) IA_CSS_ENTER_PRIVATE("pipe=%p", pipe); - assert(pipe != NULL); - assert(pipe->stream != NULL); - if (pipe == NULL || pipe->stream == NULL) { + assert(pipe); + assert(pipe->stream); + if (!pipe || !pipe->stream) { IA_CSS_ERROR("pipe or stream is null"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -705,7 +708,7 @@ send_mipi_frames(struct ia_css_pipe *pipe) } #ifndef ISP2401 - port = (unsigned int) pipe->stream->config.source.port.port; + port = (unsigned int)pipe->stream->config.source.port.port; assert(port < N_CSI_PORTS); if (port >= N_CSI_PORTS) { IA_CSS_ERROR("invalid port specified (%d)", port); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c index 237e38b2f0c19..ccd5bd4c965e0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c @@ -46,9 +46,11 @@ void sh_css_mmu_set_page_table_base_index(hrt_data base_index) { int i; + IA_CSS_ENTER_PRIVATE("base_index=0x%08x\n", base_index); for (i = 0; i < N_MMU_ID; i++) { mmu_ID_t mmu_id = i; + mmu_set_page_table_base_index(mmu_id, base_index); mmu_invalidate_cache(mmu_id); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c index 57dd5e7988c98..0b92f7b0746da 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c @@ -31,20 +31,18 @@ alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_d struct ia_css_dvs_6axis_config *dvs_config = NULL; dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_malloc(sizeof(struct ia_css_dvs_6axis_config)); - if (dvs_config == NULL) { + if (!dvs_config) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - } - else + } else { /*Initialize new struct with latest config settings*/ - if (NULL != dvs_config_src) { + if (dvs_config_src) { dvs_config->width_y = width_y = dvs_config_src->width_y; dvs_config->height_y = height_y = dvs_config_src->height_y; dvs_config->width_uv = width_uv = dvs_config_src->width_uv; dvs_config->height_uv = height_uv = dvs_config_src->height_uv; IA_CSS_LOG("alloc_dvs_6axis_table Y: W %d H %d", width_y, height_y); - } - else if (NULL != frame_res) { + } else if (frame_res) { dvs_config->width_y = width_y = DVS_TABLE_IN_BLOCKDIM_X_LUMA(frame_res->width); dvs_config->height_y = height_y = DVS_TABLE_IN_BLOCKDIM_Y_LUMA(frame_res->height); dvs_config->width_uv = width_uv = DVS_TABLE_IN_BLOCKDIM_X_CHROMA(frame_res->width / 2); /* UV = Y/2, depens on colour format YUV 4.2.0*/ @@ -54,14 +52,14 @@ alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_d /* Generate Y buffers */ dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); - if (dvs_config->xcoords_y == NULL) { + if (!dvs_config->xcoords_y) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto exit; } dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); - if (dvs_config->ycoords_y == NULL) { + if (!dvs_config->ycoords_y) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto exit; @@ -71,14 +69,14 @@ alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_d IA_CSS_LOG("UV W %d H %d", width_uv, height_uv); dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); - if (dvs_config->xcoords_uv == NULL) { + if (!dvs_config->xcoords_uv) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto exit; } dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); - if (dvs_config->ycoords_uv == NULL) { + if (!dvs_config->ycoords_uv) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -106,28 +104,27 @@ init_dvs_6axis_table_from_default(struct ia_css_dvs_6axis_config *dvs_config, co dvs_offset->width, dvs_offset->height, width_y, height_y); for (y = 0; y < height_y; y++) { for (x = 0; x < width_y; x++) { - dvs_config->xcoords_y[y*width_y + x] = (dvs_offset->width + x*DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; + dvs_config->xcoords_y[y * width_y + x] = (dvs_offset->width + x * DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; } } for (y = 0; y < height_y; y++) { for (x = 0; x < width_y; x++) { - dvs_config->ycoords_y[y*width_y + x] = (dvs_offset->height + y*DVS_BLOCKDIM_Y_LUMA) << DVS_COORD_FRAC_BITS; + dvs_config->ycoords_y[y * width_y + x] = (dvs_offset->height + y * DVS_BLOCKDIM_Y_LUMA) << DVS_COORD_FRAC_BITS; } } for (y = 0; y < height_uv; y++) { for (x = 0; x < width_uv; x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ - dvs_config->xcoords_uv[y*width_uv + x] = ((dvs_offset->width / 2) + x*DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; + dvs_config->xcoords_uv[y * width_uv + x] = ((dvs_offset->width / 2) + x * DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; } } for (y = 0; y < height_uv; y++) { for (x = 0; x < width_uv; x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ - dvs_config->ycoords_uv[y*width_uv + x] = ((dvs_offset->height / 2) + y*DVS_BLOCKDIM_Y_CHROMA) << DVS_COORD_FRAC_BITS; + dvs_config->ycoords_uv[y * width_uv + x] = ((dvs_offset->height / 2) + y * DVS_BLOCKDIM_Y_CHROMA) << DVS_COORD_FRAC_BITS; } } - } static void @@ -149,8 +146,8 @@ generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, const struct { struct ia_css_dvs_6axis_config *dvs_6axis_table; - assert(frame_res != NULL); - assert(dvs_offset != NULL); + assert(frame_res); + assert(dvs_offset); dvs_6axis_table = alloc_dvs_6axis_table(frame_res, NULL); if (dvs_6axis_table) { @@ -165,7 +162,7 @@ generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config { struct ia_css_dvs_6axis_config *dvs_6axis_table; - assert(NULL != dvs_config_src); + assert(dvs_config_src); dvs_6axis_table = alloc_dvs_6axis_table(NULL, dvs_config_src); if (dvs_6axis_table) { @@ -178,32 +175,32 @@ generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config void free_dvs_6axis_table(struct ia_css_dvs_6axis_config **dvs_6axis_config) { - assert(dvs_6axis_config != NULL); - assert(*dvs_6axis_config != NULL); + assert(dvs_6axis_config); + assert(*dvs_6axis_config); - if ((dvs_6axis_config != NULL) && (*dvs_6axis_config != NULL)) + if ((dvs_6axis_config) && (*dvs_6axis_config)) { IA_CSS_ENTER_PRIVATE("dvs_6axis_config %p", (*dvs_6axis_config)); - if ((*dvs_6axis_config)->xcoords_y != NULL) + if ((*dvs_6axis_config)->xcoords_y) { sh_css_free((*dvs_6axis_config)->xcoords_y); (*dvs_6axis_config)->xcoords_y = NULL; } - if ((*dvs_6axis_config)->ycoords_y != NULL) + if ((*dvs_6axis_config)->ycoords_y) { sh_css_free((*dvs_6axis_config)->ycoords_y); (*dvs_6axis_config)->ycoords_y = NULL; } /* Free up UV buffers */ - if ((*dvs_6axis_config)->xcoords_uv != NULL) + if ((*dvs_6axis_config)->xcoords_uv) { sh_css_free((*dvs_6axis_config)->xcoords_uv); (*dvs_6axis_config)->xcoords_uv = NULL; } - if ((*dvs_6axis_config)->ycoords_uv != NULL) + if ((*dvs_6axis_config)->ycoords_uv) { sh_css_free((*dvs_6axis_config)->ycoords_uv); (*dvs_6axis_config)->ycoords_uv = NULL; @@ -223,12 +220,12 @@ void copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, unsigned int width_uv; unsigned int height_uv; - assert(dvs_config_src != NULL); - assert(dvs_config_dst != NULL); - assert(dvs_config_src->xcoords_y != NULL); - assert(dvs_config_src->xcoords_uv != NULL); - assert(dvs_config_src->ycoords_y != NULL); - assert(dvs_config_src->ycoords_uv != NULL); + assert(dvs_config_src); + assert(dvs_config_dst); + assert(dvs_config_src->xcoords_y); + assert(dvs_config_src->xcoords_uv); + assert(dvs_config_src->ycoords_y); + assert(dvs_config_src->ycoords_uv); assert(dvs_config_src->width_y == dvs_config_dst->width_y); assert(dvs_config_src->width_uv == dvs_config_dst->width_uv); assert(dvs_config_src->height_y == dvs_config_dst->height_y); @@ -244,7 +241,6 @@ void copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, memcpy(dvs_config_dst->xcoords_uv, dvs_config_src->xcoords_uv, (width_uv * height_uv * sizeof(uint32_t))); memcpy(dvs_config_dst->ycoords_uv, dvs_config_src->ycoords_uv, (width_uv * height_uv * sizeof(uint32_t))); - } void @@ -252,16 +248,14 @@ ia_css_dvs_statistics_get(enum dvs_statistics_type type, union ia_css_dvs_statistics_host *host_stats, const union ia_css_dvs_statistics_isp *isp_stats) { - - if (DVS_STATISTICS == type) + if (type == DVS_STATISTICS) { ia_css_get_dvs_statistics(host_stats->p_dvs_statistics_host, isp_stats->p_dvs_statistics_isp); - } else if (DVS2_STATISTICS == type) + } else if (type == DVS2_STATISTICS) { ia_css_get_dvs2_statistics(host_stats->p_dvs2_statistics_host, isp_stats->p_dvs_statistics_isp); } return; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h index 79b563dc78eea..04389a7dbcb06 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h @@ -38,7 +38,6 @@ #define DVS_NUM_BLOCKS_X_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_X)) #define DVS_NUM_BLOCKS_Y_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_CHROMA)) - #endif #define DVS_TABLE_IN_BLOCKDIM_X_LUMA(X) (DVS_NUM_BLOCKS_X(X) + 1) /* N blocks have N + 1 set of coords */ #define DVS_TABLE_IN_BLOCKDIM_X_CHROMA(X) (DVS_NUM_BLOCKS_X_CHROMA(X) + 1) @@ -82,5 +81,4 @@ void copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, const struct ia_css_dvs_6axis_config *dvs_config_src); - #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c index e6ebd1b08f0d6..f5cfd4cbe41c6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c @@ -94,8 +94,8 @@ crop_and_interpolate(unsigned int cropped_width, unsigned short *in_ptr, *out_ptr; - assert(in_table != NULL); - assert(out_table != NULL); + assert(in_table); + assert(out_table); sensor_width = in_table->sensor_width; sensor_height = in_table->sensor_height; @@ -108,10 +108,10 @@ crop_and_interpolate(unsigned int cropped_width, out_cell_size = CEIL_DIV(padded_width, out_table->width - 1); in_cell_size = CEIL_DIV(sensor_width, table_width - 1); - out_start_col = ((int)sensor_width - (int)cropped_width)/2 - left_padding; - out_start_row = ((int)sensor_height - (int)cropped_height)/2 - top_padding; - table_cell_w = (int)((table_width-1) * in_cell_size); - table_cell_h = (table_height-1) * in_cell_size; + out_start_col = ((int)sensor_width - (int)cropped_width) / 2 - left_padding; + out_start_row = ((int)sensor_height - (int)cropped_height) / 2 - top_padding; + table_cell_w = (int)((table_width - 1) * in_cell_size); + table_cell_h = (table_height - 1) * in_cell_size; for (i = 0; i < out_table->height; i++) { int ty, src_y0, src_y1; @@ -128,14 +128,14 @@ crop_and_interpolate(unsigned int cropped_width, src_y1 = (ty + out_cell_size) / in_cell_size; else src_y1 = src_y0 + 1; - src_y0 = clamp(src_y0, 0, (int)table_height-1); - src_y1 = clamp(src_y1, 0, (int)table_height-1); - ty = min(clamp(ty, 0, (int)sensor_height-1), + src_y0 = clamp(src_y0, 0, (int)table_height - 1); + src_y1 = clamp(src_y1, 0, (int)table_height - 1); + ty = min(clamp(ty, 0, (int)sensor_height - 1), (int)table_cell_h); /* calculate closest source points for distance computation */ - sy0 = min(src_y0 * in_cell_size, sensor_height-1); - sy1 = min(src_y1 * in_cell_size, sensor_height-1); + sy0 = min(src_y0 * in_cell_size, sensor_height - 1); + sy1 = min(src_y1 * in_cell_size, sensor_height - 1); /* calculate distance between source and target pixels */ dy0 = ty - sy0; dy1 = sy1 - ty; @@ -161,14 +161,14 @@ crop_and_interpolate(unsigned int cropped_width, src_x1 = src_x0 + 1; } /* if src points fall in padding, select closest ones.*/ - src_x0 = clamp(src_x0, 0, (int)table_width-1); - src_x1 = clamp(src_x1, 0, (int)table_width-1); - tx = min(clamp(tx, 0, (int)sensor_width-1), + src_x0 = clamp(src_x0, 0, (int)table_width - 1); + src_x1 = clamp(src_x1, 0, (int)table_width - 1); + tx = min(clamp(tx, 0, (int)sensor_width - 1), (int)table_cell_w); /* calculate closest source points for distance computation */ - sx0 = min(src_x0 * in_cell_size, sensor_width-1); - sx1 = min(src_x1 * in_cell_size, sensor_width-1); + sx0 = min(src_x0 * in_cell_size, sensor_width - 1); + sx1 = min(src_x1 * in_cell_size, sensor_width - 1); /* calculate distances between source and target pixels */ dx0 = tx - sx0; @@ -184,13 +184,13 @@ crop_and_interpolate(unsigned int cropped_width, } /* get source pixel values */ - s_ul = in_ptr[(table_width*src_y0)+src_x0]; - s_ur = in_ptr[(table_width*src_y0)+src_x1]; - s_ll = in_ptr[(table_width*src_y1)+src_x0]; - s_lr = in_ptr[(table_width*src_y1)+src_x1]; + s_ul = in_ptr[(table_width * src_y0) + src_x0]; + s_ur = in_ptr[(table_width * src_y0) + src_x1]; + s_ll = in_ptr[(table_width * src_y1) + src_x0]; + s_lr = in_ptr[(table_width * src_y1) + src_x1]; - *out_ptr = (unsigned short) ((dx0*dy0*s_lr + dx0*dy1*s_ur + dx1*dy0*s_ll + dx1*dy1*s_ul) / - (divx*divy)); + *out_ptr = (unsigned short)((dx0 * dy0 * s_lr + dx0 * dy1 * s_ur + dx1 * dy0 * s_ll + dx1 * dy1 * s_ul) / + (divx * divy)); } } } @@ -213,9 +213,9 @@ sh_css_params_shading_id_table_generate( #endif struct ia_css_shading_table *result; - assert(target_table != NULL); + assert(target_table); #ifndef ISP2401 - assert(binary != NULL); + assert(binary); #endif #ifndef ISP2401 @@ -223,7 +223,7 @@ sh_css_params_shading_id_table_generate( table_height = binary->sctbl_height; #endif result = ia_css_shading_table_alloc(table_width, table_height); - if (result == NULL) { + if (!result) { *target_table = NULL; return; } @@ -257,8 +257,8 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, struct ia_css_shading_table *result; - assert(target_table != NULL); - assert(binary != NULL); + assert(target_table); + assert(binary); if (!in_table) { #ifndef ISP2401 @@ -275,14 +275,14 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, shading correction is performed in the bayer domain (before bayer down scaling). */ #if defined(USE_INPUT_SYSTEM_VERSION_2401) - padded_width = CEIL_MUL(binary->effective_in_frame_res.width + 2*ISP_VEC_NELEMS, - 2*ISP_VEC_NELEMS); + padded_width = CEIL_MUL(binary->effective_in_frame_res.width + 2 * ISP_VEC_NELEMS, + 2 * ISP_VEC_NELEMS); #endif input_height = binary->in_frame_info.res.height; input_width = binary->in_frame_info.res.width; left_padding = binary->left_padding; left_cropping = (binary->info->sp.pipeline.left_cropping == 0) ? - binary->dvs_envelope.width : 2*ISP_VEC_NELEMS; + binary->dvs_envelope.width : 2 * ISP_VEC_NELEMS; sh_css_bds_factor_get_numerator_denominator (bds_factor, &bds_numerator, &bds_denominator); @@ -335,7 +335,7 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, #endif result = ia_css_shading_table_alloc(table_width, table_height); - if (result == NULL) { + if (!result) { *target_table = NULL; return; } @@ -376,8 +376,9 @@ ia_css_shading_table_alloc( for (i = 0; i < IA_CSS_SC_NUM_COLORS; i++) { me->data[i] = sh_css_malloc(width * height * sizeof(*me->data[0])); - if (me->data[i] == NULL) { + if (!me->data[i]) { unsigned int j; + for (j = 0; j < i; j++) { sh_css_free(me->data[j]); me->data[j] = NULL; @@ -396,7 +397,7 @@ ia_css_shading_table_free(struct ia_css_shading_table *table) { unsigned int i; - if (table == NULL) + if (!table) return; /* We only output logging when the table is not NULL, otherwise @@ -414,4 +415,3 @@ ia_css_shading_table_free(struct ia_css_shading_table *table) IA_CSS_LEAVE(""); } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h index e87863b7c8cce..2521f622d7502 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h @@ -36,4 +36,3 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, unsigned int bds_factor); #endif /* __SH_CSS_PARAMS_SHADING_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c index 9084bf751d633..2a2bb27bdc1c5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c @@ -677,521 +677,521 @@ static const int zoom_table[4][HRT_GDC_N] = { }; #else /* defined(CONFIG_CSI2_PLUS) */ static const int zoom_table[4][HRT_GDC_N] = { - { 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, - 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, - 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, - 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 0<<4, 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<< 4, 4 << 4, 4 << 4, 4 << 4, + 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, + 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, + 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, + 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, + 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, + 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, + 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, + 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, + 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, + 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, + 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, + 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, + 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, + 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 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<< 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, + 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4 } }; #endif @@ -1219,6 +1219,7 @@ static const struct ia_css_shading_settings default_shading_settings = { 1 /* enable shading table conversion in the css (This matches the legacy way.) */ }; + /* ------ deprecated(bz675) : to ------ */ struct ia_css_isp_skc_dvs_statistics { @@ -1241,7 +1242,7 @@ free_ia_css_isp_parameter_set_info(hrt_vaddress ptr); static enum ia_css_err sh_css_params_write_to_ddr_internal( struct ia_css_pipe *pipe, - unsigned pipe_id, + unsigned int pipe_id, struct ia_css_isp_parameters *params, const struct ia_css_pipeline_stage *stage, struct sh_css_ddr_address_map *ddr_map, @@ -1318,9 +1319,9 @@ convert_allocate_fpntbl(struct ia_css_isp_parameters *params) short *data_ptr; struct ia_css_host_data *me; unsigned int isp_format_data_size; - uint32_t *isp_format_data_ptr; + u32 *isp_format_data_ptr; - assert(params != NULL); + assert(params); data_ptr = params->fpn_config.data; isp_format_data_size = params->fpn_config.height * params->fpn_config.width * sizeof(uint32_t); @@ -1351,7 +1352,7 @@ store_fpntbl(struct ia_css_isp_parameters *params, hrt_vaddress ptr) { struct ia_css_host_data *isp_data; - assert(params != NULL); + assert(params); assert(ptr != mmgr_NULL); isp_data = convert_allocate_fpntbl(params); @@ -1371,7 +1372,7 @@ convert_raw_to_fpn(struct ia_css_isp_parameters *params) int maxval = 0; unsigned int i; - assert(params != NULL); + assert(params); /* Find the maximum value in the table */ for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) { @@ -1401,17 +1402,18 @@ convert_raw_to_fpn(struct ia_css_isp_parameters *params) } /* Adjust the values in the table for the shift value */ for (i = 0; i < params->fpn_config.height * params->fpn_config.width; i++) - ((unsigned short *) params->fpn_config.data)[i] >>= params->fpn_config.shift; + ((unsigned short *)params->fpn_config.data)[i] >>= params->fpn_config.shift; } static void ia_css_process_kernel(struct ia_css_stream *stream, struct ia_css_isp_parameters *params, - void (*process)(unsigned pipe_id, + void (*process)(unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params)) { int i; + for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *pipe = stream->pipes[i]; struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); @@ -1427,7 +1429,6 @@ ia_css_process_kernel(struct ia_css_stream *stream, static enum ia_css_err sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) { - enum ia_css_err err = IA_CSS_SUCCESS; /* Currently we check if 10bpp DPC configuration is required based * on the use case,i.e. if BDS and DPC is both enabled. The more cleaner @@ -1436,7 +1437,7 @@ sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) * implementation. (This is because the configuration is set before a * binary is selected, and the binary info is not available) */ - if((pipe == NULL) || (is_dp_10bpp == NULL)) { + if ((!pipe) || (!is_dp_10bpp)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); err = IA_CSS_ERR_INTERNAL_ERROR; } else { @@ -1446,13 +1447,14 @@ sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) if (pipe->config.enable_dpc) { /*check if BDS is enabled*/ unsigned int required_bds_factor = SH_CSS_BDS_FACTOR_1_00; + if ((pipe->config.bayer_ds_out_res.width != 0) && (pipe->config.bayer_ds_out_res.height != 0)) { if (IA_CSS_SUCCESS == binarydesc_calculate_bds_factor( pipe->config.input_effective_res, pipe->config.bayer_ds_out_res, &required_bds_factor)) { - if (SH_CSS_BDS_FACTOR_1_00 != required_bds_factor) { + if (required_bds_factor != SH_CSS_BDS_FACTOR_1_00) { /*we use 10bpp BDS configuration*/ *is_dp_10bpp = true; } @@ -1475,8 +1477,8 @@ sh_css_set_black_frame(struct ia_css_stream *stream, unsigned int height, width, y, x, k, data; hrt_vaddress ptr; - assert(stream != NULL); - assert(raw_black_frame != NULL); + assert(stream); + assert(raw_black_frame); params = stream->isp_params_configs; height = raw_black_frame->info.res.height; @@ -1492,7 +1494,7 @@ sh_css_set_black_frame(struct ia_css_stream *stream, sh_css_free(params->fpn_config.data); params->fpn_config.data = NULL; } - if (params->fpn_config.data == NULL) { + if (!params->fpn_config.data) { params->fpn_config.data = sh_css_malloc(height * width * sizeof(short)); if (!params->fpn_config.data) { IA_CSS_ERROR("out of memory"); @@ -1508,20 +1510,21 @@ sh_css_set_black_frame(struct ia_css_stream *stream, for (y = 0; y < height; y++) { for (x = 0; x < width; x += (ISP_VEC_NELEMS * 2)) { int ofs = y * width + x; + for (k = 0; k < ISP_VEC_NELEMS; k += 2) { mmgr_load(ptr, (void *)(&data), sizeof(int)); params->fpn_config.data[ofs + 2 * k] = - (short) (data & 0xFFFF); + (short)(data & 0xFFFF); params->fpn_config.data[ofs + 2 * k + 2] = - (short) ((data >> 16) & 0xFFFF); + (short)((data >> 16) & 0xFFFF); ptr += sizeof(int); /* byte system address */ } for (k = 0; k < ISP_VEC_NELEMS; k += 2) { mmgr_load(ptr, (void *)(&data), sizeof(int)); params->fpn_config.data[ofs + 2 * k + 1] = - (short) (data & 0xFFFF); + (short)(data & 0xFFFF); params->fpn_config.data[ofs + 2 * k + 3] = - (short) ((data >> 16) & 0xFFFF); + (short)((data >> 16) & 0xFFFF); ptr += sizeof(int); /* byte system address */ } } @@ -1544,7 +1547,7 @@ sh_css_params_set_binning_factor(struct ia_css_stream *stream, unsigned int binn struct ia_css_isp_parameters *params; IA_CSS_ENTER_PRIVATE("void"); - assert(stream != NULL); + assert(stream); params = stream->isp_params_configs; @@ -1574,9 +1577,9 @@ sh_css_set_shading_table(struct ia_css_stream *stream, const struct ia_css_shading_table *table) { IA_CSS_ENTER_PRIVATE(""); - if (table == NULL) + if (!table) return; - assert(stream != NULL); + assert(stream); if (!table->enable) table = NULL; @@ -1601,8 +1604,8 @@ ia_css_params_store_ia_css_host_data( hrt_vaddress ddr_addr, struct ia_css_host_data *data) { - assert(data != NULL); - assert(data->address != NULL); + assert(data); + assert(data->address); assert(ddr_addr != mmgr_NULL); IA_CSS_ENTER_PRIVATE(""); @@ -1625,12 +1628,12 @@ ia_css_params_alloc_convert_sctbl( unsigned int sctbl_size; short int *ptr; - assert(binary != NULL); - assert(shading_table != NULL); + assert(binary); + assert(shading_table); IA_CSS_ENTER_PRIVATE(""); - if (shading_table == NULL) { + if (!shading_table) { IA_CSS_LEAVE_PRIVATE("void"); return NULL; } @@ -1643,7 +1646,7 @@ ia_css_params_alloc_convert_sctbl( if (!sctbl) return NULL; - ptr = (short int*)sctbl->address; + ptr = (short int *)sctbl->address; memset(ptr, 0, sctbl_size); @@ -1652,7 +1655,7 @@ ia_css_params_alloc_convert_sctbl( for (j = 0; j < IA_CSS_SC_NUM_COLORS; j++) { memcpy(ptr, &shading_table->data[j] - [i*shading_table->width], + [i * shading_table->width], shading_table->width * sizeof(short)); ptr += aligned_width; } @@ -1671,7 +1674,7 @@ enum ia_css_err ia_css_params_store_sctbl( IA_CSS_ENTER_PRIVATE(""); - if (sc_config == NULL) { + if (!sc_config) { IA_CSS_LEAVE_PRIVATE("void"); return IA_CSS_SUCCESS; } @@ -1712,16 +1715,16 @@ ia_css_process_zoom_and_motion( const struct ia_css_pipeline_stage *stage; enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_resolution pipe_in_res; + pipe_in_res.width = 0; pipe_in_res.height = 0; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE(""); /* Go through all stages to udate uds and cropping */ for (stage = first_stage; stage; stage = stage->next) { - struct ia_css_binary *binary; /* note: the var below is made static as it is quite large; if it is not static it ends up on the stack which could @@ -1737,6 +1740,7 @@ ia_css_process_zoom_and_motion( } else { const struct sh_css_binary_args *args = &stage->args; const struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; + if (args->out_frame[0]) out_infos[0] = &args->out_frame[0]->info; info = &stage->firmware->info.isp; @@ -1785,7 +1789,7 @@ ia_css_process_zoom_and_motion( pipe_in_res, stage->enable_zoom); if (err != IA_CSS_SUCCESS) - return err; + return err; } } params->isp_params_changed = true; @@ -1798,11 +1802,11 @@ static void sh_css_set_gamma_table(struct ia_css_isp_parameters *params, const struct ia_css_gamma_table *table) { - if (table == NULL) + if (!table) return; IA_CSS_ENTER_PRIVATE("table=%p", table); - assert(params != NULL); + assert(params); params->gc_table = *table; params->config_changed[IA_CSS_GC_ID] = true; @@ -1813,11 +1817,11 @@ static void sh_css_get_gamma_table(const struct ia_css_isp_parameters *params, struct ia_css_gamma_table *table) { - if (table == NULL) + if (!table) return; IA_CSS_ENTER_PRIVATE("table=%p", table); - assert(params != NULL); + assert(params); *table = params->gc_table; IA_CSS_LEAVE_PRIVATE("void"); @@ -1827,12 +1831,12 @@ static void sh_css_set_ctc_table(struct ia_css_isp_parameters *params, const struct ia_css_ctc_table *table) { - if (table == NULL) + if (!table) return; IA_CSS_ENTER_PRIVATE("table=%p", table); - assert(params != NULL); + assert(params); params->ctc_table = *table; params->config_changed[IA_CSS_CTC_ID] = true; @@ -1843,12 +1847,12 @@ static void sh_css_get_ctc_table(const struct ia_css_isp_parameters *params, struct ia_css_ctc_table *table) { - if (table == NULL) + if (!table) return; IA_CSS_ENTER_PRIVATE("table=%p", table); - assert(params != NULL); + assert(params); *table = params->ctc_table; IA_CSS_LEAVE_PRIVATE("void"); @@ -1858,12 +1862,12 @@ static void sh_css_set_macc_table(struct ia_css_isp_parameters *params, const struct ia_css_macc_table *table) { - if (table == NULL) + if (!table) return; IA_CSS_ENTER_PRIVATE("table=%p", table); - assert(params != NULL); + assert(params); params->macc_table = *table; params->config_changed[IA_CSS_MACC_ID] = true; @@ -1874,12 +1878,12 @@ static void sh_css_get_macc_table(const struct ia_css_isp_parameters *params, struct ia_css_macc_table *table) { - if (table == NULL) + if (!table) return; IA_CSS_ENTER_PRIVATE("table=%p", table); - assert(params != NULL); + assert(params); *table = params->macc_table; IA_CSS_LEAVE_PRIVATE("void"); @@ -1888,16 +1892,13 @@ sh_css_get_macc_table(const struct ia_css_isp_parameters *params, void ia_css_morph_table_free( struct ia_css_morph_table *me) { - unsigned int i; - if (me == NULL) + if (!me) return; IA_CSS_ENTER(""); - - for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { if (me->coordinates_x[i]) { sh_css_free(me->coordinates_x[i]); @@ -1911,22 +1912,19 @@ void ia_css_morph_table_free( sh_css_free(me); IA_CSS_LEAVE("void"); - } - struct ia_css_morph_table *ia_css_morph_table_allocate( unsigned int width, unsigned int height) { - unsigned int i; struct ia_css_morph_table *me; IA_CSS_ENTER(""); me = sh_css_malloc(sizeof(*me)); - if (me == NULL) { + if (!me) { IA_CSS_ERROR("out of memory"); return me; } @@ -1944,8 +1942,8 @@ struct ia_css_morph_table *ia_css_morph_table_allocate( sh_css_malloc(height * width * sizeof(*me->coordinates_y[i])); - if ((me->coordinates_x[i] == NULL) || - (me->coordinates_y[i] == NULL)) { + if ((!me->coordinates_x[i]) || + (!me->coordinates_y[i])) { ia_css_morph_table_free(me); me = NULL; return me; @@ -1955,10 +1953,8 @@ struct ia_css_morph_table *ia_css_morph_table_allocate( me->height = height; IA_CSS_LEAVE(""); return me; - } - static enum ia_css_err sh_css_params_default_morph_table( struct ia_css_morph_table **table, const struct ia_css_binary *binary) @@ -1969,8 +1965,8 @@ static enum ia_css_err sh_css_params_default_morph_table( start_y[IA_CSS_MORPH_TABLE_NUM_PLANES] = { 0, 0, -8, -8, -8, 0 }; struct ia_css_morph_table *tab; - assert(table != NULL); - assert(binary != NULL); + assert(table); + assert(binary); IA_CSS_ENTER_PRIVATE(""); @@ -1979,11 +1975,12 @@ static enum ia_css_err sh_css_params_default_morph_table( height = binary->morph_tbl_height; tab = ia_css_morph_table_allocate(width, height); - if (tab == NULL) + if (!tab) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { short val_y = start_y[i]; + for (j = 0; j < height; j++) { short val_x = start_x[i]; unsigned short *x_ptr, *y_ptr; @@ -2017,12 +2014,12 @@ static void sh_css_set_morph_table(struct ia_css_isp_parameters *params, const struct ia_css_morph_table *table) { - if (table == NULL) + if (!table) return; IA_CSS_ENTER_PRIVATE("table=%p", table); - assert(params != NULL); + assert(params); if (table->enable == false) table = NULL; params->morph_table = table; @@ -2082,7 +2079,7 @@ ia_css_isp_3a_statistics_map_allocate( } me->data_ptr = data_ptr; - me->data_allocated = data_ptr == NULL; + me->data_allocated = !data_ptr; if (!data_ptr) { me->data_ptr = sh_css_malloc(isp_stats->size); if (!me->data_ptr) { @@ -2109,7 +2106,6 @@ ia_css_isp_3a_statistics_map_allocate( if (me) sh_css_free(me); return NULL; - } enum ia_css_err @@ -2121,8 +2117,8 @@ ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, IA_CSS_ENTER("host_stats=%p, isp_stats=%p", host_stats, isp_stats); - assert(host_stats != NULL); - assert(isp_stats != NULL); + assert(host_stats); + assert(isp_stats); map = ia_css_isp_3a_statistics_map_allocate(isp_stats, NULL); if (map) { @@ -2145,7 +2141,7 @@ static void ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, struct ia_css_isp_parameters *params) { - assert(params != NULL); + assert(params); /* Copy also to DP. Should be done by the driver. */ params->dp_config.gr = params->wb_config.gr; @@ -2153,7 +2149,7 @@ ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, params->dp_config.b = params->wb_config.b; params->dp_config.gb = params->wb_config.gb; #ifdef ISP2401 - assert(pipe != NULL); + assert(pipe); assert(pipe->mode < IA_CSS_PIPE_ID_NUM); if (pipe->mode < IA_CSS_PIPE_ID_NUM) { @@ -2171,11 +2167,11 @@ sh_css_set_dp_config(const struct ia_css_pipe *pipe, struct ia_css_isp_parameters *params, const struct ia_css_dp_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); - assert(pipe != NULL); + assert(params); + assert(pipe); assert(pipe->mode < IA_CSS_PIPE_ID_NUM); IA_CSS_ENTER_PRIVATE("config=%p", config); @@ -2193,11 +2189,11 @@ sh_css_get_dp_config(const struct ia_css_pipe *pipe, const struct ia_css_isp_parameters *params, struct ia_css_dp_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); - assert(pipe != NULL); + assert(params); + assert(pipe); IA_CSS_ENTER_PRIVATE("config=%p", config); *config = params->pipe_dp_config[pipe->mode]; @@ -2209,9 +2205,9 @@ static void sh_css_set_nr_config(struct ia_css_isp_parameters *params, const struct ia_css_nr_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("config=%p", config); @@ -2229,9 +2225,9 @@ static void sh_css_set_ee_config(struct ia_css_isp_parameters *params, const struct ia_css_ee_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("config=%p", config); ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); @@ -2247,12 +2243,12 @@ static void sh_css_get_ee_config(const struct ia_css_isp_parameters *params, struct ia_css_ee_config *config) { - if (config == NULL) + if (!config) return; IA_CSS_ENTER_PRIVATE("config=%p", config); - assert(params != NULL); + assert(params); *config = params->ee_config; ia_css_ee_debug_dtrace(config, IA_CSS_DEBUG_TRACE_PRIVATE); @@ -2264,10 +2260,10 @@ sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, struct ia_css_isp_parameters *params, const struct ia_css_dvs_6axis_config *dvs_config) { - if (dvs_config == NULL) + if (!dvs_config) return; - assert(params != NULL); - assert(pipe != NULL); + assert(params); + assert(pipe); assert(dvs_config->height_y == dvs_config->height_uv); assert((dvs_config->width_y - 1) == 2 * (dvs_config->width_uv - 1)); assert(pipe->mode < IA_CSS_PIPE_ID_NUM); @@ -2288,10 +2284,10 @@ sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, const struct ia_css_isp_parameters *params, struct ia_css_dvs_6axis_config *dvs_config) { - if (dvs_config == NULL) + if (!dvs_config) return; - assert(params != NULL); - assert(pipe != NULL); + assert(params); + assert(pipe); assert(dvs_config->height_y == dvs_config->height_uv); assert((dvs_config->width_y - 1) == 2 * dvs_config->width_uv - 1); @@ -2317,9 +2313,9 @@ static void sh_css_set_baa_config(struct ia_css_isp_parameters *params, const struct ia_css_aa_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("config=%p", config); @@ -2333,9 +2329,9 @@ static void sh_css_get_baa_config(const struct ia_css_isp_parameters *params, struct ia_css_aa_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("config=%p", config); @@ -2348,9 +2344,9 @@ static void sh_css_set_dz_config(struct ia_css_isp_parameters *params, const struct ia_css_dz_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("dx=%d, dy=%d", config->dx, config->dy); @@ -2369,9 +2365,9 @@ static void sh_css_get_dz_config(const struct ia_css_isp_parameters *params, struct ia_css_dz_config *config) { - if (config == NULL) + if (!config) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("config=%p", config); @@ -2384,9 +2380,9 @@ static void sh_css_set_motion_vector(struct ia_css_isp_parameters *params, const struct ia_css_vector *motion) { - if (motion == NULL) + if (!motion) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("x=%d, y=%d", motion->x, motion->y); @@ -2402,9 +2398,9 @@ static void sh_css_get_motion_vector(const struct ia_css_isp_parameters *params, struct ia_css_vector *motion) { - if (motion == NULL) + if (!motion) return; - assert(params != NULL); + assert(params); IA_CSS_ENTER_PRIVATE("motion=%p", motion); @@ -2416,7 +2412,7 @@ sh_css_get_motion_vector(const struct ia_css_isp_parameters *params, struct ia_css_isp_config * sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe) { - if (pipe == NULL) + if (!pipe) { IA_CSS_ERROR("pipe=%p", NULL); return NULL; @@ -2440,7 +2436,7 @@ ia_css_stream_set_isp_config_on_pipe( { enum ia_css_err err = IA_CSS_SUCCESS; - if ((stream == NULL) || (config == NULL)) + if ((!stream) || (!config)) return IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_ENTER("stream=%p, config=%p, pipe=%p", stream, config, pipe); @@ -2465,7 +2461,7 @@ ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, IA_CSS_ENTER("pipe=%p", pipe); - if ((pipe == NULL) || (pipe->stream == NULL)) + if ((!pipe) || (!pipe->stream)) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "config=%p\n", config); @@ -2503,7 +2499,7 @@ sh_css_set_global_isp_config_on_pipe( * but instead continue with updating the ISP params to enable testing of features * which are currently in TR phase. */ - err = (err1 != IA_CSS_SUCCESS ) ? err1 : ((err2 != IA_CSS_SUCCESS) ? err2 : err); + err = (err1 != IA_CSS_SUCCESS) ? err1 : ((err2 != IA_CSS_SUCCESS) ? err2 : err); IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -2516,7 +2512,7 @@ sh_css_set_per_frame_isp_config_on_pipe( const struct ia_css_isp_config *config, struct ia_css_pipe *pipe) { - unsigned i; + unsigned int i; bool per_frame_config_created = false; enum ia_css_err err = IA_CSS_SUCCESS; enum ia_css_err err1 = IA_CSS_SUCCESS; @@ -2541,7 +2537,7 @@ sh_css_set_per_frame_isp_config_on_pipe( { err = sh_css_create_isp_params(stream, &stream->per_frame_isp_params_configs); - if(err != IA_CSS_SUCCESS) + if (err != IA_CSS_SUCCESS) goto exit; per_frame_config_created = true; } @@ -2591,13 +2587,13 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, { enum ia_css_err err = IA_CSS_SUCCESS; bool is_dp_10bpp = true; - assert(pipe != NULL); + + assert(pipe); IA_CSS_ENTER_PRIVATE("pipe=%p, config=%p, params=%p", pipe, config, params); ia_css_set_configs(params, config); - sh_css_set_nr_config(params, config->nr_config); sh_css_set_ee_config(params, config->ee_config); sh_css_set_baa_config(params, config->baa_config); @@ -2616,8 +2612,8 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, sh_css_set_shading_settings(params, config->shading_settings); /* ------ deprecated(bz675) : to ------ */ - params->dis_coef_table_changed = (config->dvs_coefs != NULL); - params->dvs2_coef_table_changed = (config->dvs2_coefs != NULL); + params->dis_coef_table_changed = (config->dvs_coefs); + params->dvs2_coef_table_changed = (config->dvs2_coefs); params->output_frame = config->output_frame; params->isp_parameters_id = config->isp_config_id; @@ -2637,7 +2633,7 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, * user. */ /* we do not exit from this point immediately to allow internal * firmware feature testing. */ - if(is_dp_10bpp) { + if (is_dp_10bpp) { err = IA_CSS_ERR_INVALID_ARGUMENTS; } } else { @@ -2669,12 +2665,12 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, { struct ia_css_isp_parameters *params = NULL; - assert(config != NULL); + assert(config); IA_CSS_ENTER("config=%p", config); params = pipe->stream->isp_params_configs; - assert(params != NULL); + assert(params); ia_css_get_configs(params, config); @@ -2711,7 +2707,7 @@ static bool realloc_isp_css_mm_buf( enum ia_css_err *err, uint16_t mmgr_attribute) { - int32_t id; + s32 id; *err = IA_CSS_SUCCESS; /* Possible optimization: add a function sh_css_isp_css_mm_realloc() @@ -2752,7 +2748,7 @@ static bool reallocate_buffer( enum ia_css_err *err) { bool ret; - uint16_t mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; + u16 mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; IA_CSS_ENTER_PRIVATE("void"); @@ -2772,7 +2768,7 @@ ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) IA_CSS_ENTER("grid=%p", grid); - assert(grid != NULL); + assert(grid); /* MW: Does "grid->enable" also control the histogram output ?? */ if (!grid->enable) @@ -2815,7 +2811,6 @@ ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) if (me->hmem_size) me->data_hmem.rgby_tbl = me->data_ptr + me->dmem_size + 2 * me->vmem_size; - err: IA_CSS_LEAVE("return=%p", me); return me; @@ -2824,7 +2819,7 @@ ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) void ia_css_isp_3a_statistics_free(struct ia_css_isp_3a_statistics *me) { - if (me != NULL) { + if (me) { hmm_free(me->data_ptr); sh_css_free(me); } @@ -2846,7 +2841,7 @@ ia_css_metadata_allocate(const struct ia_css_metadata_info *metadata_info) return NULL; md = sh_css_malloc(sizeof(*md)); - if (md == NULL) + if (!md) goto error; md->info = *metadata_info; @@ -2867,7 +2862,7 @@ ia_css_metadata_allocate(const struct ia_css_metadata_info *metadata_info) void ia_css_metadata_free(struct ia_css_metadata *me) { - if (me != NULL) { + if (me) { /* The enter and leave macros are placed inside * the condition to avoid false logging of metadata * free events when metadata is disabled. @@ -2885,28 +2880,28 @@ ia_css_metadata_free_multiple(unsigned int num_bufs, struct ia_css_metadata **bu { unsigned int i; - if (bufs != NULL) { + if (bufs) { for (i = 0; i < num_bufs; i++) ia_css_metadata_free(bufs[i]); } } -static unsigned g_param_buffer_dequeue_count = 0; -static unsigned g_param_buffer_enqueue_count = 0; +static unsigned int g_param_buffer_dequeue_count; +static unsigned int g_param_buffer_enqueue_count; enum ia_css_err ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) { enum ia_css_err err = IA_CSS_SUCCESS; - unsigned i; + unsigned int i; struct sh_css_ddr_address_map *ddr_ptrs; struct sh_css_ddr_address_map_size *ddr_ptrs_size; struct ia_css_isp_parameters *params; - assert(stream != NULL); + assert(stream); IA_CSS_ENTER_PRIVATE("void"); - if (stream == NULL) { + if (!stream) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2917,8 +2912,8 @@ ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) stream->per_frame_isp_params_configs = NULL; err = sh_css_create_isp_params(stream, &stream->isp_params_configs); - if(err != IA_CSS_SUCCESS) - goto ERR; + if (err != IA_CSS_SUCCESS) + goto ERR; params = stream->isp_params_configs; if (!sh_css_init_isp_params_from_global(stream, params, true, NULL)) { @@ -2968,7 +2963,7 @@ sh_css_create_isp_params(struct ia_css_stream *stream, struct ia_css_isp_parameters **isp_params_out) { bool succ = true; - unsigned i; + unsigned int i; struct sh_css_ddr_address_map *ddr_ptrs; struct sh_css_ddr_address_map_size *ddr_ptrs_size; enum ia_css_err err = IA_CSS_SUCCESS; @@ -3026,7 +3021,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, bool retval = true; int i = 0; bool is_dp_10bpp = true; - unsigned isp_pipe_version = ia_css_pipe_get_isp_pipe_version(stream->pipes[0]); + unsigned int isp_pipe_version = ia_css_pipe_get_isp_pipe_version(stream->pipes[0]); struct ia_css_isp_parameters *stream_params = stream->isp_params_configs; if (!use_default_config && !stream_params) { @@ -3066,12 +3061,12 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, #else for (i = 0; i < stream->num_pipes; i++) { - if (IA_CSS_SUCCESS == sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) { + if (sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp) == IA_CSS_SUCCESS) { /* set the return value as false if both DPC and * BDS is enabled by the user. But we do not return * the value immediately to enable internal firmware * feature testing. */ - if(is_dp_10bpp) { + if (is_dp_10bpp) { sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); } else { sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); @@ -3131,8 +3126,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, #ifdef ISP2401 ia_css_tnr3_set_default_config(¶ms->tnr3_config); #endif - } - else + } else { ia_css_set_xnr3_config(params, &stream_params->xnr3_config); @@ -3219,8 +3213,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, if (stream_params->sc_table) { sh_css_update_shading_table_status(pipe_in, params); sh_css_set_shading_table(stream, params, stream_params->sc_table); - } - else { + } else { params->sc_table = NULL; params->sc_table_changed = true; params->sc_table_dirty = false; @@ -3305,7 +3298,7 @@ sh_css_params_init(void) static void host_lut_store(const void *lut) { - unsigned i; + unsigned int i; for (i = 0; i < N_GDC_ID; i++) gdc_lut_store((gdc_ID_t)i, (const int (*)[HRT_GDC_N]) lut); @@ -3334,7 +3327,7 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, #endif IA_CSS_ENTER("pipe=%p lut=%p", pipe, lut); - if (lut == NULL || pipe == NULL) { + if (!lut || !pipe) { err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE("err=%d", err); return err; @@ -3397,7 +3390,7 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, /* if pipe is NULL, returns default lut addr. */ hrt_vaddress sh_css_pipe_get_pp_gdc_lut(const struct ia_css_pipe *pipe) { - assert(pipe != NULL); + assert(pipe); if (pipe->scaler_pp_lut != mmgr_NULL) return pipe->scaler_pp_lut; @@ -3442,7 +3435,6 @@ void sh_css_params_free_default_gdc_lut(void) default_gdc_lut = mmgr_NULL; IA_CSS_LEAVE_PRIVATE("void"); - } hrt_vaddress sh_css_params_get_default_gdc_lut(void) @@ -3488,7 +3480,7 @@ sh_css_param_clear_param_sets(void) do { \ ia_css_refcount_decrement(id, x); \ (x) = mmgr_NULL; \ - } while(0) + } while (0) static void free_map(struct sh_css_ddr_address_map *map) { @@ -3499,7 +3491,7 @@ static void free_map(struct sh_css_ddr_address_map *map) IA_CSS_ENTER_PRIVATE("void"); /* free buffers */ - for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size)/ + for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / sizeof(size_t)); i++) { if (addrs[i] == mmgr_NULL) continue; @@ -3518,7 +3510,7 @@ ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) stream->per_frame_isp_params_configs; IA_CSS_ENTER_PRIVATE("void"); - if (params == NULL) { + if (!params) { IA_CSS_LEAVE_PRIVATE("isp_param_configs is NULL"); return; } @@ -3531,9 +3523,9 @@ ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) free_map(&per_frame_params->pipe_ddr_ptrs[i]); /* Free up theDVS table memory blocks before recomputing new table */ if (params->pipe_dvs_6axis_config[i]) - free_dvs_6axis_table(&(params->pipe_dvs_6axis_config[i])); + free_dvs_6axis_table(¶ms->pipe_dvs_6axis_config[i]); if (per_frame_params && per_frame_params->pipe_dvs_6axis_config[i]) - free_dvs_6axis_table(&(per_frame_params->pipe_dvs_6axis_config[i])); + free_dvs_6axis_table(&per_frame_params->pipe_dvs_6axis_config[i]); } free_map(¶ms->ddr_ptrs); if (per_frame_params) @@ -3568,7 +3560,7 @@ ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) void sh_css_params_uninit(void) { - unsigned p, i; + unsigned int p, i; IA_CSS_ENTER_PRIVATE("void"); @@ -3603,7 +3595,7 @@ convert_allocate_morph_plane( unsigned int i, j, padding, w; struct ia_css_host_data *me; unsigned int isp_data_size; - uint16_t *isp_data_ptr; + u16 *isp_data_ptr; IA_CSS_ENTER_PRIVATE("void"); @@ -3619,7 +3611,7 @@ convert_allocate_morph_plane( } isp_data_size = height * (w + padding) * sizeof(uint16_t); - me = ia_css_host_data_allocate((size_t) isp_data_size); + me = ia_css_host_data_allocate((size_t)isp_data_size); if (!me) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); @@ -3672,9 +3664,9 @@ static void sh_css_update_isp_params_to_ddr( IA_CSS_ENTER_PRIVATE("void"); - assert(params != NULL); + assert(params); - mmgr_store(ddr_ptr, &(params->uds), size); + mmgr_store(ddr_ptr, ¶ms->uds, size); IA_CSS_LEAVE_PRIVATE("void"); } @@ -3713,7 +3705,7 @@ void ia_css_dequeue_param_buffers(/*unsigned int pipe_num*/ void) for (i = 0; SH_CSS_INVALID_QUEUE_ID != param_queue_ids[i]; i++) { cpy = (hrt_vaddress)0; /* clean-up old copy */ - while (IA_CSS_SUCCESS == ia_css_bufq_dequeue_buffer(param_queue_ids[i], (uint32_t *)&cpy)) { + while (ia_css_bufq_dequeue_buffer(param_queue_ids[i], (uint32_t *)&cpy) == IA_CSS_SUCCESS) { /* TMP: keep track of dequeued param set count */ g_param_buffer_dequeue_count++; @@ -3739,7 +3731,7 @@ process_kernel_parameters(unsigned int pipe_id, unsigned int isp_pipe_version, unsigned int raw_bit_depth) { - unsigned param_id; + unsigned int param_id; (void)isp_pipe_version; (void)raw_bit_depth; @@ -3783,7 +3775,7 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, (void)acc_cluster_params_changed; - assert(curr_pipe != NULL); + assert(curr_pipe); IA_CSS_ENTER_PRIVATE("pipe=%p, isp_parameters_id=%d", pipe_in, params->isp_parameters_id); raw_bit_depth = ia_css_stream_input_format_bits_per_pixel(curr_pipe->stream); @@ -3838,7 +3830,7 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, err = ia_css_process_zoom_and_motion(params, pipeline->stages); if (err != IA_CSS_SUCCESS) - return err; + return err; } /* check if to actually update the parameters for this pipe */ /* When API change is implemented making good distinction between @@ -3851,7 +3843,7 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, /* BZ 125915, should be moved till after "update other buff" */ /* update the other buffers to the pipe specific copies */ for (stage = pipeline->stages; stage; stage = stage->next) { - unsigned mem; + unsigned int mem; if (!stage || !stage->binary) continue; @@ -3912,7 +3904,7 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, IA_CSS_LOG("queue param set %x to %d", cpy, thread_id); err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)cpy); - if (IA_CSS_SUCCESS != err) { + if (err != IA_CSS_SUCCESS) { free_ia_css_isp_parameter_set_info(cpy); #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) IA_CSS_LOG("pfp: FAILED to add config id %d for OF %d to q %d on thread %d", @@ -3921,13 +3913,12 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, queue_id, thread_id); #endif break; - } - else { + } else { /* TMP: check discrepancy between nr of enqueued * parameter sets and dequeued sets */ g_param_buffer_enqueue_count++; - assert(g_param_buffer_enqueue_count < g_param_buffer_dequeue_count+50); + assert(g_param_buffer_enqueue_count < g_param_buffer_dequeue_count + 50); #ifdef ISP2401 ia_css_save_latest_paramset_ptr(pipe, cpy); #endif @@ -3978,7 +3969,7 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, static enum ia_css_err sh_css_params_write_to_ddr_internal( struct ia_css_pipe *pipe, - unsigned pipe_id, + unsigned int pipe_id, struct ia_css_isp_parameters *params, const struct ia_css_pipeline_stage *stage, struct sh_css_ddr_address_map *ddr_map, @@ -3987,22 +3978,21 @@ sh_css_params_write_to_ddr_internal( enum ia_css_err err; const struct ia_css_binary *binary; - unsigned stage_num; - unsigned mem; + unsigned int stage_num; + unsigned int mem; bool buff_realloced; /* struct is > 128 bytes so it should not be on stack (see checkpatch) */ static struct ia_css_macc_table converted_macc_table; IA_CSS_ENTER_PRIVATE("void"); - assert(params != NULL); - assert(ddr_map != NULL); - assert(ddr_map_size != NULL); - assert(stage != NULL); + assert(params); + assert(ddr_map); + assert(ddr_map_size); + assert(stage); binary = stage->binary; - assert(binary != NULL); - + assert(binary); stage_num = stage->stage_num; @@ -4028,7 +4018,7 @@ sh_css_params_write_to_ddr_internal( } if (binary->info->sp.enable.sc) { - uint32_t enable_conv = params-> + u32 enable_conv = params-> shading_settings.enable_shading_table_conversion; buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, @@ -4067,7 +4057,7 @@ sh_css_params_write_to_ddr_internal( sh_css_params_shading_id_table_generate(¶ms->sc_config, binary->sctbl_width_per_color, binary->sctbl_height); #endif - if (params->sc_config == NULL) { + if (!params->sc_config) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -4098,7 +4088,7 @@ sh_css_params_write_to_ddr_internal( params->sensor_binning, ¶ms->sc_config, binary, pipe->required_bds_factor); - if (params->sc_config == NULL) { + if (!params->sc_config) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -4125,9 +4115,10 @@ sh_css_params_write_to_ddr_internal( * DPC kernel. The code below sets the pipe specific configuration to * individual binaries. */ if (params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) { - unsigned size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + + unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; - unsigned offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_dp_encode((struct sh_css_isp_dp_params *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], @@ -4146,31 +4137,31 @@ sh_css_params_write_to_ddr_internal( 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8}; for (i = 0; i < IA_CSS_MACC_NUM_AXES; i++) { - idx = 4*idx_map[i]; - j = 4*i; + idx = 4 * idx_map[i]; + j = 4 * i; if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) { converted_macc_table.data[idx] = (int16_t)sDIGIT_FITTING(params->macc_table.data[j], 13, SH_CSS_MACC_COEF_SHIFT); - converted_macc_table.data[idx+1] = - (int16_t)sDIGIT_FITTING(params->macc_table.data[j+1], + converted_macc_table.data[idx + 1] = + (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 1], 13, SH_CSS_MACC_COEF_SHIFT); - converted_macc_table.data[idx+2] = - (int16_t)sDIGIT_FITTING(params->macc_table.data[j+2], + converted_macc_table.data[idx + 2] = + (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 2], 13, SH_CSS_MACC_COEF_SHIFT); - converted_macc_table.data[idx+3] = - (int16_t)sDIGIT_FITTING(params->macc_table.data[j+3], + converted_macc_table.data[idx + 3] = + (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 3], 13, SH_CSS_MACC_COEF_SHIFT); } else if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) { converted_macc_table.data[idx] = params->macc_table.data[j]; - converted_macc_table.data[idx+1] = - params->macc_table.data[j+1]; - converted_macc_table.data[idx+2] = - params->macc_table.data[j+2]; - converted_macc_table.data[idx+3] = - params->macc_table.data[j+3]; + converted_macc_table.data[idx + 1] = + params->macc_table.data[j + 1]; + converted_macc_table.data[idx + 2] = + params->macc_table.data[j + 2]; + converted_macc_table.data[idx + 3] = + params->macc_table.data[j + 3]; } } reallocate_buffer(&ddr_map->macc_tbl, @@ -4206,7 +4197,7 @@ sh_css_params_write_to_ddr_internal( if (params->pipe_dvs_6axis_config_changed[pipe_id] || buff_realloced) { const struct ia_css_frame_info *dvs_in_frame_info; - if ( stage->args.delay_frames[0] ) { + if (stage->args.delay_frames[0]) { /*When delay frames are present(as in case of video), they are used for dvs. Configure DVS using those params*/ dvs_in_frame_info = &stage->args.delay_frames[0]->info; @@ -4216,13 +4207,14 @@ sh_css_params_write_to_ddr_internal( } /* Generate default DVS unity table on start up*/ - if (params->pipe_dvs_6axis_config[pipe_id] == NULL) { - + if (!params->pipe_dvs_6axis_config[pipe_id]) { #ifndef ISP2401 struct ia_css_resolution dvs_offset; + dvs_offset.width = #else struct ia_css_resolution dvs_offset = {0, 0}; + if (binary->dvs_envelope.width || binary->dvs_envelope.height) { dvs_offset.width = #endif @@ -4239,7 +4231,7 @@ sh_css_params_write_to_ddr_internal( params->pipe_dvs_6axis_config[pipe_id] = generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); - if (params->pipe_dvs_6axis_config[pipe_id] == NULL) { + if (!params->pipe_dvs_6axis_config[pipe_id]) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -4322,12 +4314,12 @@ sh_css_params_write_to_ddr_internal( const struct ia_css_morph_table *table = params->morph_table; struct ia_css_morph_table *id_table = NULL; - if ((table != NULL) && + if ((table) && (table->width < binary->morph_tbl_width || table->height < binary->morph_tbl_height)) { table = NULL; } - if (table == NULL) { + if (!table) { err = sh_css_params_default_morph_table(&id_table, binary); if (err != IA_CSS_SUCCESS) { @@ -4349,7 +4341,7 @@ sh_css_params_write_to_ddr_internal( *virt_addr_tetra_y[i], binary->morph_tbl_aligned_width); } - if (id_table != NULL) + if (id_table) ia_css_morph_table_free(id_table); } } @@ -4359,6 +4351,7 @@ sh_css_params_write_to_ddr_internal( const struct ia_css_isp_data *isp_data = ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, IA_CSS_PARAM_CLASS_PARAM, mem); size_t size = isp_data->size; + if (!size) continue; buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], &ddr_map_size->isp_mem_param[stage_num][mem], @@ -4385,11 +4378,11 @@ const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream *stream struct ia_css_isp_parameters *params; IA_CSS_ENTER_LEAVE("void"); - assert(stream != NULL); + assert(stream); params = stream->isp_params_configs; - return &(params->fpn_config); + return ¶ms->fpn_config; } struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stream) @@ -4399,7 +4392,7 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stre IA_CSS_ENTER("void"); - assert(stream != NULL); + assert(stream); params = stream->isp_params_configs; if (!params) @@ -4441,7 +4434,7 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stre pipe = stream->pipes[0]; if (stream->num_pipes == 2) { - assert(stream->pipes[1] != NULL); + assert(stream->pipes[1]); if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) pipe = stream->pipes[1]; @@ -4470,7 +4463,6 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stre return table; } - hrt_vaddress sh_css_store_sp_group_to_ddr(void) { IA_CSS_ENTER_LEAVE_PRIVATE("void"); @@ -4481,8 +4473,8 @@ hrt_vaddress sh_css_store_sp_group_to_ddr(void) } hrt_vaddress sh_css_store_sp_stage_to_ddr( - unsigned pipe, - unsigned stage) + unsigned int pipe, + unsigned int stage) { IA_CSS_ENTER_LEAVE_PRIVATE("void"); mmgr_store(xmem_sp_stage_ptrs[pipe][stage], @@ -4492,8 +4484,8 @@ hrt_vaddress sh_css_store_sp_stage_to_ddr( } hrt_vaddress sh_css_store_isp_stage_to_ddr( - unsigned pipe, - unsigned stage) + unsigned int pipe, + unsigned int stage) { IA_CSS_ENTER_LEAVE_PRIVATE("void"); mmgr_store(xmem_isp_stage_ptrs[pipe][stage], @@ -4519,17 +4511,17 @@ static enum ia_css_err ref_sh_css_ddr_address_map( } in_addrs, to_addrs; IA_CSS_ENTER_PRIVATE("void"); - assert(map != NULL); - assert(out != NULL); + assert(map); + assert(out); in_addrs.map = map; to_addrs.map = out; - assert(sizeof(struct sh_css_ddr_address_map_size)/sizeof(size_t) == - sizeof(struct sh_css_ddr_address_map)/sizeof(hrt_vaddress)); + assert(sizeof(struct sh_css_ddr_address_map_size) / sizeof(size_t) == + sizeof(struct sh_css_ddr_address_map) / sizeof(hrt_vaddress)); /* copy map using size info */ - for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size)/ + for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / sizeof(size_t)); i++) { if (in_addrs.addrs[i] == mmgr_NULL) to_addrs.addrs[i] = mmgr_NULL; @@ -4550,8 +4542,8 @@ static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( IA_CSS_ENTER_PRIVATE("void"); - assert(me != NULL); - assert(out != NULL); + assert(me); + assert(out); *out = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_SET_POOL, mmgr_malloc( sizeof(struct ia_css_isp_parameter_set_info))); @@ -4587,7 +4579,7 @@ free_ia_css_isp_parameter_set_info( mmgr_load(ptr, &isp_params_info.mem_map, sizeof(struct sh_css_ddr_address_map)); /* copy map using size info */ - for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size)/ + for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / sizeof(size_t)); i++) { if (addrs[i] == mmgr_NULL) continue; @@ -4620,10 +4612,10 @@ void sh_css_invalidate_params(struct ia_css_stream *stream) { struct ia_css_isp_parameters *params; - unsigned i, j, mem; + unsigned int i, j, mem; IA_CSS_ENTER_PRIVATE("void"); - assert(stream != NULL); + assert(stream); params = stream->isp_params_configs; params->isp_params_changed = true; @@ -4646,7 +4638,7 @@ sh_css_invalidate_params(struct ia_css_stream *stream) /*Free up theDVS table memory blocks before recomputing new table */ for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { if (params->pipe_dvs_6axis_config[i]) { - free_dvs_6axis_table(&(params->pipe_dvs_6axis_config[i])); + free_dvs_6axis_table(¶ms->pipe_dvs_6axis_config[i]); params->pipe_dvs_6axis_config_changed[i] = true; } } @@ -4664,18 +4656,19 @@ sh_css_update_uds_and_crop_info( const struct ia_css_vector *motion_vector, struct sh_css_uds_info *uds, /* out */ struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + bool enable_zoom) { IA_CSS_ENTER_PRIVATE("void"); - assert(info != NULL); - assert(in_frame_info != NULL); - assert(out_frame_info != NULL); - assert(dvs_env != NULL); - assert(zoom != NULL); - assert(motion_vector != NULL); - assert(uds != NULL); - assert(sp_out_crop_pos != NULL); + assert(info); + assert(in_frame_info); + assert(out_frame_info); + assert(dvs_env); + assert(zoom); + assert(motion_vector); + assert(uds); + assert(sp_out_crop_pos); uds->curr_dx = enable_zoom ? (uint16_t)zoom->dx : HRT_GDC_N; uds->curr_dy = enable_zoom ? (uint16_t)zoom->dy : HRT_GDC_N; @@ -4744,8 +4737,8 @@ sh_css_update_uds_and_crop_info( motion_y = clamp(motion_y, -half_env_y, half_env_y); /* for video with downscaling, the envelope is included in the input resolution. */ - uds_xc = in_frame_info->res.width/2 + motion_x; - uds_yc = in_frame_info->res.height/2 + motion_y; + uds_xc = in_frame_info->res.width / 2 + motion_x; + uds_yc = in_frame_info->res.height / 2 + motion_y; crop_x = info->pipeline.left_cropping; /* ds == 2 (yuv_ds) can be pipelined, remove top lines */ @@ -4780,8 +4773,7 @@ sh_css_update_uds_and_crop_info( uds->yc = (uint16_t)uds_yc; sp_out_crop_pos->x = (uint16_t)crop_x; sp_out_crop_pos->y = (uint16_t)crop_y; - } - else { + } else { /* for down scaling, we always use the center of the image */ uds->xc = (uint16_t)in_frame_info->res.width / 2; uds->yc = (uint16_t)in_frame_info->res.height / 2; @@ -4815,23 +4807,24 @@ sh_css_update_uds_and_crop_info_based_on_zoom_region( * Ideally, That should be done on host side not on sp side. */ unsigned int filter_envelope = 0; + IA_CSS_ENTER_PRIVATE("void"); - assert(info != NULL); - assert(in_frame_info != NULL); - assert(out_frame_info != NULL); - assert(dvs_env != NULL); - assert(zoom != NULL); - assert(motion_vector != NULL); - assert(uds != NULL); - assert(sp_out_crop_pos != NULL); + assert(info); + assert(in_frame_info); + assert(out_frame_info); + assert(dvs_env); + assert(zoom); + assert(motion_vector); + assert(uds); + assert(sp_out_crop_pos); x0 = zoom->zoom_region.origin.x; y0 = zoom->zoom_region.origin.y; x1 = zoom->zoom_region.resolution.width + x0; y1 = zoom->zoom_region.resolution.height + y0; if ((x0 > x1) || (y0 > y1) || (x1 > pipe_in_res.width) || (y1 > pipe_in_res.height)) - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; if (!enable_zoom) { uds->curr_dx = HRT_GDC_N; @@ -4861,8 +4854,8 @@ sh_css_update_uds_and_crop_info_based_on_zoom_region( ((y1 - y0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.height; /* B. Calculate xc/yc based on crop region */ - uds->xc = (uint16_t) x0 + (((x1)-(x0)) / 2); - uds->yc = (uint16_t) y0 + (((y1)-(y0)) / 2); + uds->xc = (uint16_t)x0 + (((x1) - (x0)) / 2); + uds->yc = (uint16_t)y0 + (((y1) - (y0)) / 2); } else { uds->xc = (uint16_t)in_frame_info->res.width / 2; uds->yc = (uint16_t)in_frame_info->res.height / 2; @@ -4887,7 +4880,7 @@ ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) IA_CSS_ENTER("grid=%p", grid); - assert(grid != NULL); + assert(grid); me = sh_css_calloc(1, sizeof(*me)); if (!me) @@ -4930,7 +4923,7 @@ ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid) { struct ia_css_dvs_statistics *me; - assert(grid != NULL); + assert(grid); me = sh_css_calloc(1, sizeof(*me)); if (!me) @@ -4951,7 +4944,6 @@ ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid) err: ia_css_dvs_statistics_free(me); return NULL; - } void @@ -4970,7 +4962,7 @@ ia_css_dvs_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) { struct ia_css_dvs_coefficients *me; - assert(grid != NULL); + assert(grid); me = sh_css_calloc(1, sizeof(*me)); if (!me) @@ -5012,7 +5004,7 @@ ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid) { struct ia_css_dvs2_statistics *me; - assert(grid != NULL); + assert(grid); me = sh_css_calloc(1, sizeof(*me)); if (!me) @@ -5064,7 +5056,6 @@ ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid) err: ia_css_dvs2_statistics_free(me); return NULL; - } void @@ -5084,13 +5075,12 @@ ia_css_dvs2_statistics_free(struct ia_css_dvs2_statistics *me) } } - struct ia_css_dvs2_coefficients * ia_css_dvs2_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) { struct ia_css_dvs2_coefficients *me; - assert(grid != NULL); + assert(grid); me = sh_css_calloc(1, sizeof(*me)); if (!me) @@ -5171,7 +5161,7 @@ ia_css_dvs2_6axis_config_allocate(const struct ia_css_stream *stream) unsigned int width_uv; unsigned int height_uv; - assert(stream != NULL); + assert(stream); params = stream->isp_params_configs; /* Backward compatibility by default consider pipe as Video*/ @@ -5234,7 +5224,7 @@ ia_css_en_dz_capt_pipe(struct ia_css_stream *stream, bool enable) enum ia_css_err err; int i; - if (stream == NULL) + if (!stream) return; for (i = 0; i < stream->num_pipes; i++) { @@ -5250,4 +5240,3 @@ ia_css_en_dz_capt_pipe(struct ia_css_stream *stream, bool enable) } } } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h index 270ec2b60a3ed..7a37d72856365 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h @@ -31,7 +31,6 @@ struct ia_css_isp_parameters; #include "uds/uds_1.0/ia_css_uds_param.h" #include "crop/crop_1.0/ia_css_crop_types.h" - #define PIX_SHIFT_FILTER_RUN_IN_X 12 #define PIX_SHIFT_FILTER_RUN_IN_Y 12 @@ -42,7 +41,6 @@ struct sh_css_isp_param_configs { struct sh_css_isp_ob_stream_config ob; }; - /* Isp parameters per stream */ struct ia_css_isp_parameters { /* UDS */ @@ -113,6 +111,7 @@ struct ia_css_isp_parameters { struct ia_css_dvs2_coefficients dvs2_coefs; bool isp_params_changed; + bool isp_mem_params_changed [IA_CSS_PIPE_ID_NUM][SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; bool dz_config_changed; @@ -145,7 +144,7 @@ struct ia_css_isp_parameters { struct sh_css_ddr_address_map ddr_ptrs; struct sh_css_ddr_address_map_size ddr_ptrs_size; struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ - uint32_t isp_parameters_id; /** Unique ID to track which config was actually applied to a particular frame */ + u32 isp_parameters_id; /** Unique ID to track which config was actually applied to a particular frame */ }; void diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c index ad46996cfbd34..2f19ee14d6e84 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c @@ -20,13 +20,13 @@ void ia_css_get_properties(struct ia_css_properties *properties) { - assert(properties != NULL); + assert(properties); #if defined(HAS_GDC_VERSION_2) || defined(HAS_GDC_VERSION_3) /* * MW: We don't want to store the coordinates * full range in memory: Truncate */ - properties->gdc_coord_one = gdc_get_unity(GDC0_ID)/HRT_GDC_COORD_SCALE; + properties->gdc_coord_one = gdc_get_unity(GDC0_ID) / HRT_GDC_COORD_SCALE; #else #error "Unknown GDC version" #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c index 254d5797d8f88..d603f6aee4fc1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c @@ -54,7 +54,7 @@ #include "ia_css_spctrl.h" #ifndef offsetof -#define offsetof(T, x) ((unsigned)&(((T *)0)->x)) +#define offsetof(T, x) ((unsigned int)&(((T *)0)->x)) #endif #define IA_CSS_INCLUDE_CONFIGURATIONS @@ -81,7 +81,7 @@ static bool sp_running; static enum ia_css_err set_output_frame_buffer(const struct ia_css_frame *frame, - unsigned idx); + unsigned int idx); static void sh_css_copy_buffer_attr_to_spbuffer(struct ia_css_buffer_sp *dest_buf, @@ -106,10 +106,10 @@ static void copy_isp_stage_to_sp_stage(void) { /* [WW07.5]type casting will cause potential issues */ - sh_css_sp_stage.num_stripes = (uint8_t) sh_css_isp_stage.binary_info.iterator.num_stripes; - sh_css_sp_stage.row_stripes_height = (uint16_t) sh_css_isp_stage.binary_info.iterator.row_stripes_height; - sh_css_sp_stage.row_stripes_overlap_lines = (uint16_t) sh_css_isp_stage.binary_info.iterator.row_stripes_overlap_lines; - sh_css_sp_stage.top_cropping = (uint16_t) sh_css_isp_stage.binary_info.pipeline.top_cropping; + sh_css_sp_stage.num_stripes = (uint8_t)sh_css_isp_stage.binary_info.iterator.num_stripes; + sh_css_sp_stage.row_stripes_height = (uint16_t)sh_css_isp_stage.binary_info.iterator.row_stripes_height; + sh_css_sp_stage.row_stripes_overlap_lines = (uint16_t)sh_css_isp_stage.binary_info.iterator.row_stripes_overlap_lines; + sh_css_sp_stage.top_cropping = (uint16_t)sh_css_isp_stage.binary_info.pipeline.top_cropping; /* moved to sh_css_sp_init_stage sh_css_sp_stage.enable.vf_output = sh_css_isp_stage.binary_info.enable.vf_veceven || @@ -123,9 +123,10 @@ copy_isp_stage_to_sp_stage(void) } void -store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned stage) +store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned int stage) { unsigned int thread_id; + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); copy_isp_stage_to_sp_stage(); if (id != IA_CSS_PIPE_ID_COPY) @@ -143,7 +144,7 @@ store_sp_per_frame_data(const struct ia_css_fw_info *fw) { unsigned int HIVE_ADDR_sp_per_frame_data = 0; - assert(fw != NULL); + assert(fw); switch (fw->type) { case ia_css_sp_firmware: @@ -182,28 +183,28 @@ sh_css_sp_get_debug_state(struct sh_css_sp_debug_state *state) { const struct ia_css_fw_info *fw = &sh_css_sp_fw; unsigned int HIVE_ADDR_sp_output = fw->info.sp.output; - unsigned i; - unsigned offset = (unsigned int)offsetof(struct sh_css_sp_output, debug)/sizeof(int); + unsigned int i; + unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, debug) / sizeof(int); - assert(state != NULL); + assert(state); (void)HIVE_ADDR_sp_output; /* To get rid of warning in CRUN */ - for (i = 0; i < sizeof(*state)/sizeof(int); i++) - ((unsigned *)state)[i] = load_sp_array_uint(sp_output, i+offset); + for (i = 0; i < sizeof(*state) / sizeof(int); i++) + ((unsigned *)state)[i] = load_sp_array_uint(sp_output, i + offset); } #endif void sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_frame, - unsigned two_ppc) + unsigned int two_ppc) { enum ia_css_pipe_id pipe_id; unsigned int thread_id; struct sh_css_sp_pipeline *pipe; - uint8_t stage_num = 0; + u8 stage_num = 0; - assert(out_frame != NULL); + assert(out_frame); pipe_id = IA_CSS_PIPE_ID_CAPTURE; ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); pipe = &sh_css_sp_group.pipe[thread_id]; @@ -247,18 +248,18 @@ sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_fram static void sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, - unsigned pipe_num, - unsigned two_ppc, - unsigned max_input_width, + unsigned int pipe_num, + unsigned int two_ppc, + unsigned int max_input_width, enum sh_css_pipe_config_override pipe_conf_override, unsigned int if_config_index) { enum ia_css_pipe_id pipe_id; unsigned int thread_id; - uint8_t stage_num = 0; + u8 stage_num = 0; struct sh_css_sp_pipeline *pipe; - assert(out_frame != NULL); + assert(out_frame); { /* @@ -266,7 +267,8 @@ sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, * program_input_circuit must be saved as it is set outside * this function. */ - uint8_t program_input_circuit; + u8 program_input_circuit; + program_input_circuit = sh_css_sp_stage.program_input_circuit; memset(&sh_css_sp_stage, 0, sizeof(sh_css_sp_stage)); sh_css_sp_stage.program_input_circuit = program_input_circuit; @@ -314,7 +316,7 @@ sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, sh_css_sp_stage.xmem_bin_addr = 0x0; sh_css_sp_stage.stage_type = SH_CSS_SP_STAGE_TYPE; sh_css_sp_stage.func = (unsigned int)IA_CSS_PIPELINE_RAW_COPY; - sh_css_sp_stage.if_config_index = (uint8_t) if_config_index; + sh_css_sp_stage.if_config_index = (uint8_t)if_config_index; set_output_frame_buffer(out_frame, 0); ia_css_debug_pipe_graph_dump_sp_raw_copy(out_frame); @@ -322,17 +324,17 @@ sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, static void sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, - unsigned pipe_num, unsigned max_input_width, unsigned int if_config_index) + unsigned int pipe_num, unsigned int max_input_width, unsigned int if_config_index) { enum ia_css_pipe_id pipe_id; unsigned int thread_id; - uint8_t stage_num = 0; + u8 stage_num = 0; struct sh_css_sp_pipeline *pipe; #if defined SH_CSS_ENABLE_METADATA enum sh_css_queue_id queue_id; #endif - assert(out_frame != NULL); + assert(out_frame); { /* @@ -340,7 +342,8 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, * program_input_circuit must be saved as it is set outside * this function. */ - uint8_t program_input_circuit; + u8 program_input_circuit; + program_input_circuit = sh_css_sp_stage.program_input_circuit; memset(&sh_css_sp_stage, 0, sizeof(sh_css_sp_stage)); sh_css_sp_stage.program_input_circuit = program_input_circuit; @@ -365,7 +368,7 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, sh_css_sp_stage.xmem_bin_addr = 0x0; sh_css_sp_stage.stage_type = SH_CSS_SP_STAGE_TYPE; sh_css_sp_stage.func = (unsigned int)IA_CSS_PIPELINE_ISYS_COPY; - sh_css_sp_stage.if_config_index = (uint8_t) if_config_index; + sh_css_sp_stage.if_config_index = (uint8_t)if_config_index; set_output_frame_buffer(out_frame, 0); @@ -398,7 +401,7 @@ sh_css_sp_get_sw_interrupt_value(unsigned int irq) unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, sw_interrupt_value) / sizeof(int); (void)HIVE_ADDR_sp_output; /* To get rid of warning in CRUN */ - return load_sp_array_uint(sp_output, offset+irq); + return load_sp_array_uint(sp_output, offset + irq); } static void @@ -439,12 +442,11 @@ static void sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, const struct ia_css_frame *frame_in) { - assert(frame_in != NULL); + assert(frame_in); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_copy_frame_to_spframe():\n"); - sh_css_copy_buffer_attr_to_spbuffer(&sp_frame_out->buf_attr, frame_in->dynamic_queue_id, frame_in->data, @@ -527,13 +529,12 @@ sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, memset(&sp_frame_out->planes, 0, sizeof(sp_frame_out->planes)); break; } - } static enum ia_css_err set_input_frame_buffer(const struct ia_css_frame *frame) { - if (frame == NULL) + if (!frame) return IA_CSS_ERR_INVALID_ARGUMENTS; switch (frame->info.format) { @@ -562,9 +563,9 @@ set_input_frame_buffer(const struct ia_css_frame *frame) static enum ia_css_err set_output_frame_buffer(const struct ia_css_frame *frame, - unsigned idx) + unsigned int idx) { - if (frame == NULL) + if (!frame) return IA_CSS_ERR_INVALID_ARGUMENTS; switch (frame->info.format) { @@ -605,7 +606,7 @@ set_output_frame_buffer(const struct ia_css_frame *frame, static enum ia_css_err set_view_finder_buffer(const struct ia_css_frame *frame) { - if (frame == NULL) + if (!frame) return IA_CSS_ERR_INVALID_ARGUMENTS; switch (frame->info.format) { @@ -640,12 +641,12 @@ void sh_css_sp_set_if_configs( ) { assert(if_config_index < SH_CSS_MAX_IF_CONFIGS); - assert(config_a != NULL); + assert(config_a); sh_css_sp_group.config.input_formatter.set[if_config_index].config_a = *config_a; sh_css_sp_group.config.input_formatter.a_changed = true; - if (config_b != NULL) { + if (config_b) { sh_css_sp_group.config.input_formatter.set[if_config_index].config_b = *config_b; sh_css_sp_group.config.input_formatter.b_changed = true; } @@ -735,7 +736,7 @@ sh_css_sp_write_frame_pointers(const struct sh_css_binary_args *args) enum ia_css_err err = IA_CSS_SUCCESS; int i; - assert(args != NULL); + assert(args); if (args->in_frame) err = set_input_frame_buffer(args->in_frame); @@ -778,7 +779,7 @@ sh_css_sp_init_group(bool two_ppc, void sh_css_stage_write_binary_info(struct ia_css_binary_info *info) { - assert(info != NULL); + assert(info); sh_css_isp_stage.binary_info = *info; } @@ -805,7 +806,7 @@ copy_isp_mem_if_to_ddr(struct ia_css_binary *binary) static bool is_sp_stage(struct ia_css_pipeline_stage *stage) { - assert(stage != NULL); + assert(stage); return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; } @@ -885,7 +886,7 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, const struct ia_css_blob_info *blob_info, const struct sh_css_binary_args *args, unsigned int pipe_num, - unsigned stage, + unsigned int stage, bool xnr, const struct ia_css_isp_param_css_segments *isp_mem_if, unsigned int if_config_index, @@ -900,10 +901,10 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, enum sh_css_queue_id queue_id; bool continuous = sh_css_continuous_is_enabled((uint8_t)pipe_num); - assert(binary != NULL); - assert(blob_info != NULL); - assert(args != NULL); - assert(isp_mem_if != NULL); + assert(binary); + assert(blob_info); + assert(args); + assert(isp_mem_if); xinfo = binary->info; info = &xinfo->sp; @@ -913,7 +914,8 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, * program_input_circuit must be saved as it is set outside * this function. */ - uint8_t program_input_circuit; + u8 program_input_circuit; + program_input_circuit = sh_css_sp_stage.program_input_circuit; memset(&sh_css_sp_stage, 0, sizeof(sh_css_sp_stage)); sh_css_sp_stage.program_input_circuit = (uint8_t)program_input_circuit; @@ -921,7 +923,7 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); - if (info == NULL) { + if (!info) { sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL; return IA_CSS_SUCCESS; } @@ -965,7 +967,7 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, sh_css_sp_stage.isp_deci_log_factor = (uint8_t)binary->deci_factor_log2; sh_css_sp_stage.isp_vf_downscale_bits = (uint8_t)binary->vf_downscale_log2; - sh_css_sp_stage.if_config_index = (uint8_t) if_config_index; + sh_css_sp_stage.if_config_index = (uint8_t)if_config_index; sh_css_sp_stage.sp_enable_xnr = (uint8_t)xnr; sh_css_sp_stage.xmem_bin_addr = xinfo->xmem_addr; @@ -974,8 +976,8 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, sh_css_stage_write_binary_info((struct ia_css_binary_info *)info); /* Make sure binary name is smaller than allowed string size */ - assert(strlen(binary_name) < SH_CSS_MAX_BINARY_NAME-1); - strncpy(sh_css_isp_stage.binary_name, binary_name, SH_CSS_MAX_BINARY_NAME-1); + assert(strlen(binary_name) < SH_CSS_MAX_BINARY_NAME - 1); + strncpy(sh_css_isp_stage.binary_name, binary_name, SH_CSS_MAX_BINARY_NAME - 1); sh_css_isp_stage.binary_name[SH_CSS_MAX_BINARY_NAME - 1] = 0; sh_css_isp_stage.mem_initializers = *isp_mem_if; @@ -1007,24 +1009,24 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, #ifndef ISP2401 if (args->in_frame) { pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); - if (pipe == NULL) + if (!pipe) return IA_CSS_ERR_INTERNAL_ERROR; ia_css_get_crop_offsets(pipe, &args->in_frame->info); } else if (&binary->in_frame_info) { pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); - if (pipe == NULL) + if (!pipe) return IA_CSS_ERR_INTERNAL_ERROR; ia_css_get_crop_offsets(pipe, &binary->in_frame_info); #else if (stage == 0) { if (args->in_frame) { pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); - if (pipe == NULL) + if (!pipe) return IA_CSS_ERR_INTERNAL_ERROR; ia_css_get_crop_offsets(pipe, &args->in_frame->info); } else if (&binary->in_frame_info) { pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); - if (pipe == NULL) + if (!pipe) return IA_CSS_ERR_INTERNAL_ERROR; ia_css_get_crop_offsets(pipe, &binary->in_frame_info); } @@ -1073,7 +1075,7 @@ sp_init_stage(struct ia_css_pipeline_stage *stage, struct ia_css_binary *binary; const struct ia_css_fw_info *firmware; const struct sh_css_binary_args *args; - unsigned stage_num; + unsigned int stage_num; /* * Initialiser required because of the "else" path below. * Is this a valid path ? @@ -1098,14 +1100,13 @@ sp_init_stage(struct ia_css_pipeline_stage *stage, enum ia_css_err err = IA_CSS_SUCCESS; - assert(stage != NULL); + assert(stage); binary = stage->binary; firmware = stage->firmware; args = &stage->args; stage_num = stage->stage_num; - if (binary) { info = binary->info; binary_name = (const char *)(info->blob->name); @@ -1113,6 +1114,7 @@ sp_init_stage(struct ia_css_pipeline_stage *stage, ia_css_init_memory_interface(mem_if, &binary->mem_params, &binary->css_params); } else if (firmware) { const struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; + if (args->out_frame[0]) out_infos[0] = &args->out_frame[0]->info; info = &firmware->info.isp; @@ -1156,14 +1158,14 @@ sp_init_stage(struct ia_css_pipeline_stage *stage, static void sp_init_sp_stage(struct ia_css_pipeline_stage *stage, - unsigned pipe_num, + unsigned int pipe_num, bool two_ppc, enum sh_css_pipe_config_override copy_ovrd, unsigned int if_config_index) { const struct sh_css_binary_args *args = &stage->args; - assert(stage != NULL); + assert(stage); switch (stage->sp_func) { case IA_CSS_PIPELINE_RAW_COPY: sh_css_sp_start_raw_copy(args->out_frame[0], @@ -1185,7 +1187,7 @@ sp_init_sp_stage(struct ia_css_pipeline_stage *stage, void sh_css_sp_init_pipeline(struct ia_css_pipeline *me, enum ia_css_pipe_id id, - uint8_t pipe_num, + u8 pipe_num, bool xnr, bool two_ppc, bool continuous, @@ -1210,16 +1212,16 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, struct ia_css_pipeline_stage *stage = NULL; struct ia_css_binary *first_binary = NULL; struct ia_css_pipe *pipe = NULL; - unsigned num; + unsigned int num; enum ia_css_pipe_id pipe_id = id; unsigned int thread_id; - uint8_t if_config_index, tmp_if_config_index; + u8 if_config_index, tmp_if_config_index; - assert(me != NULL); + assert(me); #if !defined(HAS_NO_INPUT_SYSTEM) - assert(me->stages != NULL); + assert(me->stages); first_binary = me->stages->binary; @@ -1228,7 +1230,7 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, assert(port_id < N_MIPI_PORT_ID); if (port_id >= N_MIPI_PORT_ID) /* should not happen but KW does not know */ return; /* we should be able to return an error */ - if_config_index = (uint8_t) (port_id - MIPI_PORT0_ID); + if_config_index = (uint8_t)(port_id - MIPI_PORT0_ID); } else if (input_mode == IA_CSS_INPUT_MODE_MEMORY) { if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; } else { @@ -1249,7 +1251,7 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, } me->num_stages = num; - if (first_binary != NULL) { + if (first_binary) { /* Init pipeline data */ sh_css_sp_init_group(two_ppc, first_binary->input_format, offline, if_config_index); @@ -1294,14 +1296,14 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, sh_css_sp_group.pipe[thread_id].inout_port_config = me->inout_port_config; pipe = find_pipe_by_num(pipe_num); - assert(pipe != NULL); - if (pipe == NULL) { + assert(pipe); + if (!pipe) { return; } sh_css_sp_group.pipe[thread_id].scaler_pp_lut = sh_css_pipe_get_pp_gdc_lut(pipe); #if defined(SH_CSS_ENABLE_METADATA) - if (md_info != NULL && md_info->size > 0) { + if (md_info && md_info->size > 0) { sh_css_sp_group.pipe[thread_id].metadata.width = md_info->resolution.width; sh_css_sp_group.pipe[thread_id].metadata.height = md_info->resolution.height; sh_css_sp_group.pipe[thread_id].metadata.stride = md_info->stride; @@ -1317,7 +1319,7 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) sh_css_sp_group.pipe[thread_id].output_frame_queue_id = (uint32_t)SH_CSS_INVALID_QUEUE_ID; - if (IA_CSS_PIPE_ID_COPY != pipe_id) { + if (pipe_id != IA_CSS_PIPE_ID_COPY) { ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, (enum sh_css_queue_id *)(&sh_css_sp_group.pipe[thread_id].output_frame_queue_id)); } #endif @@ -1326,8 +1328,8 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, /* For the shading correction type 1 (the legacy shading table conversion in css is not used), * the parameters are passed to the isp for the shading table centering. */ - if (internal_frame_origin_bqs_on_sctbl != NULL && - params != NULL && params->shading_settings.enable_shading_table_conversion == 0) { + if (internal_frame_origin_bqs_on_sctbl && + params && params->shading_settings.enable_shading_table_conversion == 0) { sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl @@ -1360,13 +1362,13 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, sh_css_sp_group.pipe[thread_id].pipe_config |= (uint32_t) (me->acquire_isp_each_stage << IA_CSS_ACQUIRE_ISP_POS); store_sp_group_data(); - } void sh_css_sp_uninit_pipeline(unsigned int pipe_num) { unsigned int thread_id; + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); /*memset(&sh_css_sp_group.pipe[thread_id], 0, sizeof(struct sh_css_sp_pipeline));*/ sh_css_sp_group.pipe[thread_id].num_stages = 0; @@ -1400,7 +1402,6 @@ sh_css_read_host2sp_command(void) return (enum host2sp_commands)load_sp_array_uint(host_sp_com, offset); } - /* * Frame data is no longer part of the sp_stage structure but part of a * separate structure. The aim is to make the sp_data struct static @@ -1427,14 +1428,13 @@ sh_css_init_host2sp_frame_data(void) */ } - /* * @brief Update the offline frame information in host_sp_communication. * Refer to "sh_css_sp.h" for more details. */ void sh_css_update_host2sp_offline_frame( - unsigned frame_num, + unsigned int frame_num, struct ia_css_frame *frame, struct ia_css_metadata *metadata) { @@ -1464,7 +1464,7 @@ sh_css_update_host2sp_offline_frame( */ void sh_css_update_host2sp_mipi_frame( - unsigned frame_num, + unsigned int frame_num, struct ia_css_frame *frame) { unsigned int HIVE_ADDR_host_sp_com; @@ -1489,7 +1489,7 @@ sh_css_update_host2sp_mipi_frame( */ void sh_css_update_host2sp_mipi_metadata( - unsigned frame_num, + unsigned int frame_num, struct ia_css_metadata *metadata) { unsigned int HIVE_ADDR_host_sp_com; @@ -1508,7 +1508,7 @@ sh_css_update_host2sp_mipi_metadata( } void -sh_css_update_host2sp_num_mipi_frames(unsigned num_frames) +sh_css_update_host2sp_num_mipi_frames(unsigned int num_frames) { unsigned int HIVE_ADDR_host_sp_com; unsigned int offset; @@ -1523,7 +1523,7 @@ sh_css_update_host2sp_num_mipi_frames(unsigned num_frames) #endif void -sh_css_update_host2sp_cont_num_raw_frames(unsigned num_frames, bool set_avail) +sh_css_update_host2sp_cont_num_raw_frames(unsigned int num_frames, bool set_avail) { const struct ia_css_fw_info *fw; unsigned int HIVE_ADDR_host_sp_com; @@ -1569,7 +1569,6 @@ sh_css_event_init_irq_mask(void) (unsigned int)sp_address_of(host_sp_com) + offset, &event_irq_mask_init, sizeof(event_irq_mask_init)); } - } enum ia_css_err @@ -1582,7 +1581,7 @@ ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, struct sh_css_event_irq_mask event_irq_mask; unsigned int pipe_num; - assert(pipe != NULL); + assert(pipe); assert(IA_CSS_PIPE_ID_NUM == NR_OF_PIPELINES); /* Linux kernel does not have UINT16_MAX @@ -1626,7 +1625,7 @@ ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe, IA_CSS_ENTER_LEAVE(""); - assert(pipe != NULL); + assert(pipe); assert(IA_CSS_PIPE_ID_NUM == NR_OF_PIPELINES); pipe_num = ia_css_pipe_get_pipe_num(pipe); @@ -1669,7 +1668,6 @@ sh_css_sp_start_isp(void) fw = &sh_css_sp_fw; HIVE_ADDR_sp_sw_state = fw->info.sp.sw_state; - if (sp_running) return; @@ -1685,7 +1683,6 @@ sh_css_sp_start_isp(void) (unsigned int)sp_address_of(sp_sw_state), (uint32_t)(IA_CSS_SP_SW_TERMINATED)); - /* Note 1: The sp_start_isp function contains a wait till * the input network is configured by the SP. * Note 2: Not all SP binaries supports host2sp_commands. @@ -1706,7 +1703,6 @@ sh_css_sp_start_isp(void) mmu_invalidate_cache_all(); ia_css_spctrl_start(SP0_ID); - } bool @@ -1719,7 +1715,6 @@ ia_css_isp_has_started(void) return (bool)load_sp_uint(ia_css_ispctrl_sp_isp_started); } - /* * @brief Initialize the DMA software-mask in the debug mode. * Refer to "sh_css_sp.h" for more details. @@ -1756,10 +1751,10 @@ sh_css_sp_set_dma_sw_reg(int dma_id, int request_type, bool enable) { - uint32_t sw_reg; - uint32_t bit_val; - uint32_t bit_offset; - uint32_t bit_mask; + u32 sw_reg; + u32 bit_val; + u32 bit_offset; + u32 bit_mask; (void)dma_id; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h index 3c41e997de791..d2e8dcb00c0ee 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h @@ -30,7 +30,7 @@ void sh_css_sp_store_init_dmem(const struct ia_css_fw_info *fw); void -store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned stage); +store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned int stage); void sh_css_stage_write_binary_info(struct ia_css_binary_info *info); @@ -41,7 +41,7 @@ store_sp_group_data(void); /* Start binary (jpeg) copy on the SP */ void sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_frame, - unsigned two_ppc); + unsigned int two_ppc); unsigned int sh_css_sp_get_binary_copy_size(void); @@ -53,7 +53,7 @@ sh_css_sp_get_sw_interrupt_value(unsigned int irq); void sh_css_sp_init_pipeline(struct ia_css_pipeline *me, enum ia_css_pipe_id id, - uint8_t pipe_num, + u8 pipe_num, bool xnr, bool two_ppc, bool continuous, @@ -93,7 +93,7 @@ sh_css_init_host2sp_frame_data(void); */ void sh_css_update_host2sp_offline_frame( - unsigned frame_num, + unsigned int frame_num, struct ia_css_frame *frame, struct ia_css_metadata *metadata); @@ -106,7 +106,7 @@ sh_css_update_host2sp_offline_frame( */ void sh_css_update_host2sp_mipi_frame( - unsigned frame_num, + unsigned int frame_num, struct ia_css_frame *frame); /** @@ -117,7 +117,7 @@ sh_css_update_host2sp_mipi_frame( */ void sh_css_update_host2sp_mipi_metadata( - unsigned frame_num, + unsigned int frame_num, struct ia_css_metadata *metadata); /** @@ -126,7 +126,7 @@ sh_css_update_host2sp_mipi_metadata( * @param[in] num_frames The number of mipi frames to use. */ void -sh_css_update_host2sp_num_mipi_frames(unsigned num_frames); +sh_css_update_host2sp_num_mipi_frames(unsigned int num_frames); #endif /** @@ -135,7 +135,7 @@ sh_css_update_host2sp_num_mipi_frames(unsigned num_frames); * @param[in] num_frames The number of raw frames to use. */ void -sh_css_update_host2sp_cont_num_raw_frames(unsigned num_frames, bool set_avail); +sh_css_update_host2sp_cont_num_raw_frames(unsigned int num_frames, bool set_avail); void sh_css_event_init_irq_mask(void); @@ -240,7 +240,6 @@ sh_css_sp_set_dma_sw_reg(int dma_id, int request_type, bool enable); - extern struct sh_css_sp_group sh_css_sp_group; extern struct sh_css_sp_stage sh_css_sp_stage; extern struct sh_css_isp_stage sh_css_isp_stage; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h index 0b8e3d8720691..cfca3520e8ccd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h @@ -64,7 +64,7 @@ struct sh_css { unsigned int size_mem_words; /* \deprecated{Use ia_css_mipi_buffer_config instead.}*/ enum ia_css_irq_type irq_type; unsigned int pipe_counter; - + unsigned int type; /* 2400 or 2401 for now */ }; @@ -77,4 +77,3 @@ struct sh_css { extern struct sh_css my_css; #endif /* __SH_CSS_STRUCT_H */ - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h index 5ded3a1437bf7..d9bcae6007bfa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h @@ -23,15 +23,15 @@ /* Uds types, used in pipeline_global.h and sh_css_internal.h */ struct sh_css_uds_info { - uint16_t curr_dx; - uint16_t curr_dy; - uint16_t xc; - uint16_t yc; + u16 curr_dx; + u16 curr_dy; + u16 xc; + u16 yc; }; struct sh_css_crop_pos { - uint16_t x; - uint16_t y; + u16 x; + u16 y; }; #endif /* _SH_CSS_UDS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c index 15bc10b5e9b1b..0ff81ea06241f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c @@ -708,7 +708,7 @@ void hmm_init_mem_stat(int res_pgnr, int dyc_en, int dyc_pgnr) { hmm_mem_stat.res_size = res_pgnr; /* If reserved mem pool is not enabled, set its "mem stat" values as -1. */ - if (0 == hmm_mem_stat.res_size) { + if (hmm_mem_stat.res_size == 0) { hmm_mem_stat.res_size = -1; hmm_mem_stat.res_cnt = -1; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c index ef35ac0b3a27c..d9c7d8012b897 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c @@ -102,7 +102,7 @@ static struct hmm_buffer_object *__bo_search_and_remove_from_free_rbtree( this = rb_entry(node, struct hmm_buffer_object, node); if (this->pgnr == pgnr || - (this->pgnr > pgnr && this->node.rb_left == NULL)) { + (this->pgnr > pgnr && !this->node.rb_left)) { goto remove_bo_and_return; } else { if (this->pgnr < pgnr) { @@ -128,7 +128,7 @@ static struct hmm_buffer_object *__bo_search_and_remove_from_free_rbtree( * 1. check if 'this->next' is NULL: * yes: erase 'this' node and rebalance rbtree, return 'this'. */ - if (this->next == NULL) { + if (!this->next) { rb_erase(&this->node, &this->bdev->free_rbtree); return this; } @@ -156,11 +156,11 @@ static struct hmm_buffer_object *__bo_search_by_addr(struct rb_root *root, bo = rb_entry(n, struct hmm_buffer_object, node); if (bo->start > start) { - if (n->rb_left == NULL) + if (!n->rb_left) return NULL; n = n->rb_left; } else if (bo->start < start) { - if (n->rb_right == NULL) + if (!n->rb_right) return NULL; n = n->rb_right; } else { @@ -181,13 +181,13 @@ static struct hmm_buffer_object *__bo_search_by_addr_in_range( bo = rb_entry(n, struct hmm_buffer_object, node); if (bo->start > start) { - if (n->rb_left == NULL) + if (!n->rb_left) return NULL; n = n->rb_left; } else { if (bo->end > start) return bo; - if (n->rb_right == NULL) + if (!n->rb_right) return NULL; n = n->rb_right; } @@ -199,7 +199,7 @@ static struct hmm_buffer_object *__bo_search_by_addr_in_range( static void __bo_insert_to_free_rbtree(struct rb_root *root, struct hmm_buffer_object *bo) { - struct rb_node **new = &(root->rb_node); + struct rb_node **new = &root->rb_node; struct rb_node *parent = NULL; struct hmm_buffer_object *this; unsigned int pgnr = bo->pgnr; @@ -232,7 +232,7 @@ static void __bo_insert_to_free_rbtree(struct rb_root *root, static void __bo_insert_to_alloc_rbtree(struct rb_root *root, struct hmm_buffer_object *bo) { - struct rb_node **new = &(root->rb_node); + struct rb_node **new = &root->rb_node; struct rb_node *parent = NULL; struct hmm_buffer_object *this; unsigned int start = bo->start; @@ -294,14 +294,14 @@ static void __bo_take_off_handling(struct hmm_buffer_object *bo) * and does not have a linked list after bo, to take off this bo, * we just need erase bo directly and rebalance the free rbtree */ - if (bo->prev == NULL && bo->next == NULL) { + if (!bo->prev && !bo->next) { rb_erase(&bo->node, &bdev->free_rbtree); /* 2. when bo->next != NULL && bo->prev == NULL, bo is a rbtree node, * and has a linked list,to take off this bo we need erase bo * first, then, insert bo->next into free rbtree and rebalance * the free rbtree */ - } else if (bo->prev == NULL && bo->next != NULL) { + } else if (!bo->prev && bo->next) { bo->next->prev = NULL; rb_erase(&bo->node, &bdev->free_rbtree); __bo_insert_to_free_rbtree(&bdev->free_rbtree, bo->next); @@ -311,7 +311,7 @@ static void __bo_take_off_handling(struct hmm_buffer_object *bo) * node, to take off this bo, we just need set the "prev/next" * pointers to NULL, the free rbtree stays unchaged */ - } else if (bo->prev != NULL && bo->next == NULL) { + } else if (bo->prev && !bo->next) { bo->prev->next = NULL; bo->prev = NULL; /* 4. when bo->prev != NULL && bo->next != NULL ,bo is not a rbtree @@ -319,7 +319,7 @@ static void __bo_take_off_handling(struct hmm_buffer_object *bo) * to take off this bo, we just set take the "prev/next" pointers * to NULL, the free rbtree stays unchaged */ - } else if (bo->prev != NULL && bo->next != NULL) { + } else if (bo->prev && bo->next) { bo->next->prev = bo->prev; bo->prev->next = bo->next; bo->next = NULL; @@ -634,10 +634,8 @@ struct hmm_buffer_object *hmm_bo_device_search_vmap_start( found: spin_unlock_irqrestore(&bdev->list_lock, flags); return bo; - } - static void free_private_bo_pages(struct hmm_buffer_object *bo, struct hmm_pool *dypool, struct hmm_pool *repool, @@ -821,8 +819,7 @@ static int alloc_private_pages(struct hmm_buffer_object *bo, ret = set_pages_uc(pages, blk_pgnr); if (ret) { dev_err(atomisp_dev, - "set page uncacheable" - "failed.\n"); + "set page uncacheablefailed.\n"); __free_pages(pages, order); @@ -999,7 +996,7 @@ static int alloc_user_pages(struct hmm_buffer_object *bo, down_read(¤t->mm->mmap_sem); vma = find_vma(current->mm, (unsigned long)userptr); up_read(¤t->mm->mmap_sem); - if (vma == NULL) { + if (!vma) { dev_err(atomisp_dev, "find_vma failed\n"); kfree(bo->page_obj); kfree(pages); @@ -1029,8 +1026,7 @@ static int alloc_user_pages(struct hmm_buffer_object *bo, /* can be written by caller, not forced */ if (page_nr != bo->pgnr) { dev_err(atomisp_dev, - "get_user_pages err: bo->pgnr = %d, " - "pgnr actually pinned = %d.\n", + "get_user_pages err: bo->pgnr = %d, pgnr actually pinned = %d.\n", bo->pgnr, page_nr); goto out_of_mem; } @@ -1492,8 +1488,7 @@ int hmm_bo_mmap(struct vm_area_struct *vma, struct hmm_buffer_object *bo) */ if ((start + pgnr_to_size(pgnr)) != end) { dev_warn(atomisp_dev, - "vma's address space size not equal" - " to buffer object's size"); + "vma's address space size not equal to buffer object's size"); return -EINVAL; } @@ -1502,9 +1497,8 @@ int hmm_bo_mmap(struct vm_area_struct *vma, struct hmm_buffer_object *bo) pfn = page_to_pfn(bo->page_obj[i].page); if (remap_pfn_range(vma, virt, pfn, PAGE_SIZE, PAGE_SHARED)) { dev_warn(atomisp_dev, - "remap_pfn_range failed:" - " virt = 0x%x, pfn = 0x%x," - " mapped_pgnr = %d\n", virt, pfn, 1); + "remap_pfn_range failed: virt = 0x%x, pfn = 0x%x, mapped_pgnr = %d\n", + virt, pfn, 1); return -EINVAL; } virt += PAGE_SIZE; @@ -1513,7 +1507,7 @@ int hmm_bo_mmap(struct vm_area_struct *vma, struct hmm_buffer_object *bo) vma->vm_private_data = bo; vma->vm_ops = &hmm_bo_vm_ops; - vma->vm_flags |= VM_IO|VM_DONTEXPAND|VM_DONTDUMP; + vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP; /* * call hmm_bo_vm_open explicitly. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c index f300e75479979..12d3839149c94 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c @@ -48,7 +48,7 @@ static unsigned int get_pages_from_reserved_pool(void *pool, if (repool_info->initialized) { repool_pgnr = repool_info->index; - for (j = repool_pgnr-1; j >= 0; j--) { + for (j = repool_pgnr - 1; j >= 0; j--) { page_obj[i].page = repool_info->pages[j]; page_obj[i].type = HMM_PAGE_TYPE_RESERVED; i++; @@ -119,6 +119,7 @@ static int hmm_reserved_pool_init(void **pool, unsigned int pool_size) struct page *pages; int j; struct hmm_reserved_pool_info *repool_info; + if (pool_size == 0) return 0; @@ -184,8 +185,7 @@ static int hmm_reserved_pool_init(void **pool, unsigned int pool_size) *pool = repool_info; dev_info(atomisp_dev, - "hmm_reserved_pool init successfully," - "hmm_reserved_pool is with %d pages.\n", + "hmm_reserved_pool init successfully,hmm_reserved_pool is with %d pages.\n", repool_info->pgnr); return 0; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c index 0df96e6619835..8885d52166f3b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c @@ -56,7 +56,7 @@ int hmm_vm_init(struct hmm_vm *vm, unsigned int start, vm->cache = kmem_cache_create("atomisp_vm", sizeof(struct hmm_vm_node), 0, 0, NULL); - return vm->cache != NULL ? 0 : -ENOMEM; + return vm->cache ? 0 : -ENOMEM; } void hmm_vm_clean(struct hmm_vm *vm) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h index fb38fc540b812..c6893d712d619 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h @@ -71,30 +71,33 @@ static inline void hrt_sleep(void) udelay(1); } -static inline uint32_t _hrt_mem_store(uint32_t to, const void *from, size_t n) +static inline u32 _hrt_mem_store(u32 to, const void *from, size_t n) { - unsigned i; - uint32_t _to = to; + unsigned int i; + u32 _to = to; const char *_from = (const char *)from; + for (i = 0; i < n; i++, _to++, _from++) _hrt_master_port_store_8(_to, *_from); return _to; } -static inline void *_hrt_mem_load(uint32_t from, void *to, size_t n) +static inline void *_hrt_mem_load(u32 from, void *to, size_t n) { - unsigned i; + unsigned int i; char *_to = (char *)to; - uint32_t _from = from; + u32 _from = from; + for (i = 0; i < n; i++, _to++, _from++) *_to = _hrt_master_port_load_8(_from); return _to; } -static inline uint32_t _hrt_mem_set(uint32_t to, int c, size_t n) +static inline u32 _hrt_mem_set(u32 to, int c, size_t n) { - unsigned i; - uint32_t _to = to; + unsigned int i; + u32 _to = to; + for (i = 0; i < n; i++, _to++) _hrt_master_port_store_8(_to, c); return _to; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c index 9b186517f20a6..a1861410bf75e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c @@ -22,10 +22,10 @@ #include "hive_isp_css_mm_hrt.h" #include "hmm/hmm.h" -#define __page_align(size) (((size) + (PAGE_SIZE-1)) & (~(PAGE_SIZE-1))) +#define __page_align(size) (((size) + (PAGE_SIZE - 1)) & (~(PAGE_SIZE - 1))) static void __user *my_userptr; -static unsigned my_num_pages; +static unsigned int my_num_pages; static enum hrt_userptr_type my_usr_type; void hrt_isp_css_mm_set_user_ptr(void __user *userptr, @@ -50,19 +50,17 @@ static ia_css_ptr __hrt_isp_css_mm_alloc(size_t bytes, #endif if (type == HRT_USR_PTR) { - if (userptr == NULL) + if (!userptr) return hmm_alloc(bytes, HMM_BO_PRIVATE, 0, NULL, cached); else { if (num_pages < ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is less" - " than the expected size..\n"); + "user space memory size is less than the expected size..\n"); else if (num_pages > ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is" - " large than the expected size..\n"); + "user space memory size is large than the expected size..\n"); return hmm_alloc(bytes, HMM_BO_USER, 0, userptr, cached); @@ -91,18 +89,16 @@ ia_css_ptr hrt_isp_css_mm_alloc_user_ptr(size_t bytes, ia_css_ptr hrt_isp_css_mm_alloc_cached(size_t bytes) { - if (my_userptr == NULL) + if (!my_userptr) return hmm_alloc(bytes, HMM_BO_PRIVATE, 0, NULL, HMM_CACHED); else { if (my_num_pages < ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is less" - " than the expected size..\n"); + "user space memory size is less than the expected size..\n"); else if (my_num_pages > ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is" - " large than the expected size..\n"); + "user space memory size is large than the expected size..\n"); return hmm_alloc(bytes, HMM_BO_USER, 0, my_userptr, HMM_CACHED); @@ -112,6 +108,7 @@ ia_css_ptr hrt_isp_css_mm_alloc_cached(size_t bytes) ia_css_ptr hrt_isp_css_mm_calloc(size_t bytes) { ia_css_ptr ptr = hrt_isp_css_mm_alloc(bytes); + if (ptr) hmm_set(ptr, 0, bytes); return ptr; @@ -120,8 +117,8 @@ ia_css_ptr hrt_isp_css_mm_calloc(size_t bytes) ia_css_ptr hrt_isp_css_mm_calloc_cached(size_t bytes) { ia_css_ptr ptr = hrt_isp_css_mm_alloc_cached(bytes); + if (ptr) hmm_set(ptr, 0, bytes); return ptr; } - diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h index 93762e71b4cab..a7a2775aa6f51 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h @@ -23,7 +23,7 @@ #include #include -#define HRT_BUF_FLAG_CACHED (1 << 0) +#define HRT_BUF_FLAG_CACHED BIT(0) enum hrt_userptr_type { HRT_USR_PTR = 0, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h index 508d6fd68f93b..3e7b1ed4ef5ba 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h @@ -224,7 +224,6 @@ void hmm_bo_ref(struct hmm_buffer_object *bo); */ void hmm_bo_unref(struct hmm_buffer_object *bo); - /* * allocate/free physical pages for the bo. will try to alloc mem * from highmem if from_highmem is set, and type indicate that the @@ -232,10 +231,8 @@ void hmm_bo_unref(struct hmm_buffer_object *bo); * or by ISP driver itself. */ - int hmm_bo_allocated(struct hmm_buffer_object *bo); - /* * allocate/free physical pages for the bo. will try to alloc mem * from highmem if from_highmem is set, and type indicate that the @@ -315,5 +312,4 @@ struct hmm_buffer_object *hmm_bo_device_search_in_range( struct hmm_buffer_object *hmm_bo_device_search_vmap_start( struct hmm_bo_device *bdev, const void *vaddr); - #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h index 52098161082d4..816a61a190678 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h @@ -41,6 +41,7 @@ struct hmm_vm_node { unsigned int size; struct hmm_vm *vm; }; + #define ISP_VM_START 0x0 #define ISP_VM_SIZE (0x7FFFFFFF) /* 2G address space */ #define ISP_PTR_NULL NULL diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h index 0fa8e02a8655f..e52a3ed5992b5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h @@ -31,14 +31,14 @@ * same as kernel's page size. */ #define ISP_PAGE_OFFSET 12 -#define ISP_PAGE_SIZE (1U << ISP_PAGE_OFFSET) +#define ISP_PAGE_SIZE BIT(ISP_PAGE_OFFSET) #define ISP_PAGE_MASK (~(phys_addr_t)(ISP_PAGE_SIZE - 1)) #define ISP_L1PT_OFFSET 22 #define ISP_L1PT_MASK (~((1U << ISP_L1PT_OFFSET) - 1)) #define ISP_L2PT_OFFSET 12 -#define ISP_L2PT_MASK (~(ISP_L1PT_MASK|(~(ISP_PAGE_MASK)))) +#define ISP_L2PT_MASK (~(ISP_L1PT_MASK | (~(ISP_PAGE_MASK)))) #define ISP_L1PT_PTES 1024 #define ISP_L2PT_PTES 1024 @@ -49,7 +49,7 @@ #define ISP_PTR_TO_L2_IDX(x) ((((x) & ISP_L2PT_MASK)) \ >> ISP_L2PT_OFFSET) -#define ISP_PAGE_ALIGN(x) (((x) + (ISP_PAGE_SIZE-1)) \ +#define ISP_PAGE_ALIGN(x) (((x) + (ISP_PAGE_SIZE - 1)) \ & ISP_PAGE_MASK) #define ISP_PT_TO_VIRT(l1_idx, l2_idx, offset) do {\ @@ -84,7 +84,7 @@ struct isp_mmu_client { * * must be provided. */ - unsigned int (*get_pd_base) (struct isp_mmu *mmu, phys_addr_t pd_base); + unsigned int (*get_pd_base)(struct isp_mmu *mmu, phys_addr_t pd_base); /* * callback to flush tlb. * @@ -96,12 +96,12 @@ struct isp_mmu_client { * tlb_flush_all is must be provided. if tlb_flush_range is * not valid, it will set to tlb_flush_all by default. */ - void (*tlb_flush_range) (struct isp_mmu *mmu, + void (*tlb_flush_range)(struct isp_mmu *mmu, unsigned int addr, unsigned int size); - void (*tlb_flush_all) (struct isp_mmu *mmu); - unsigned int (*phys_to_pte) (struct isp_mmu *mmu, + void (*tlb_flush_all)(struct isp_mmu *mmu); + unsigned int (*phys_to_pte)(struct isp_mmu *mmu, phys_addr_t phys); - phys_addr_t (*pte_to_phys) (struct isp_mmu *mmu, + phys_addr_t (*pte_to_phys)(struct isp_mmu *mmu, unsigned int pte); }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c index d7f25fe890aeb..775f446bbf6f9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c @@ -59,6 +59,7 @@ static void free_mmu_map(struct isp_mmu *mmu, unsigned int start_isp_virt, static unsigned int atomisp_get_pte(phys_addr_t pt, unsigned int idx) { unsigned int *pt_virt = phys_to_virt(pt); + return *(pt_virt + idx); } @@ -84,7 +85,8 @@ static unsigned int isp_pgaddr_to_pte_valid(struct isp_mmu *mmu, phys_addr_t phys) { unsigned int pte = mmu->driver->phys_to_pte(mmu, phys); - return (unsigned int) (pte | ISP_PTE_VALID_MASK(mmu)); + + return (unsigned int)(pte | ISP_PTE_VALID_MASK(mmu)); } /* @@ -129,6 +131,7 @@ static phys_addr_t alloc_page_table(struct isp_mmu *mmu) static void free_page_table(struct isp_mmu *mmu, phys_addr_t page) { void *virt; + page &= ISP_PAGE_MASK; /* * reset the page to write back before free @@ -149,10 +152,8 @@ static void mmu_remap_error(struct isp_mmu *mmu, phys_addr_t new_phys) { dev_err(atomisp_dev, "address remap:\n\n" - "\tL1 PT: virt = %p, phys = 0x%llx, " - "idx = %d\n" - "\tL2 PT: virt = %p, phys = 0x%llx, " - "idx = %d\n" + "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" + "\tL2 PT: virt = %p, phys = 0x%llx, idx = %d\n" "\told: isp_virt = 0x%x, phys = 0x%llx\n" "\tnew: isp_virt = 0x%x, phys = 0x%llx\n", isp_pt_phys_to_virt(l1_pt), @@ -169,10 +170,8 @@ static void mmu_unmap_l2_pte_error(struct isp_mmu *mmu, unsigned int isp_virt, unsigned int pte) { dev_err(atomisp_dev, "unmap invalid L2 pte:\n\n" - "\tL1 PT: virt = %p, phys = 0x%llx, " - "idx = %d\n" - "\tL2 PT: virt = %p, phys = 0x%llx, " - "idx = %d\n" + "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" + "\tL2 PT: virt = %p, phys = 0x%llx, idx = %d\n" "\tisp_virt = 0x%x, pte(page phys) = 0x%x\n", isp_pt_phys_to_virt(l1_pt), (u64)l1_pt, l1_idx, @@ -186,8 +185,7 @@ static void mmu_unmap_l1_pte_error(struct isp_mmu *mmu, unsigned int isp_virt, unsigned int pte) { dev_err(atomisp_dev, "unmap invalid L1 pte (L2 PT):\n\n" - "\tL1 PT: virt = %p, phys = 0x%llx, " - "idx = %d\n" + "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" "\tisp_virt = 0x%x, l1_pte(L2 PT) = 0x%x\n", isp_pt_phys_to_virt(l1_pt), (u64)l1_pt, l1_idx, (unsigned int)isp_virt, @@ -372,7 +370,6 @@ static void mmu_l2_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, unsigned int l1_idx, phys_addr_t l2_pt, unsigned int start, unsigned int end) { - unsigned int ptr; unsigned int idx; unsigned int pte; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c b/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c index c0212564b7c82..031d7fa005105 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c @@ -38,6 +38,7 @@ static phys_addr_t sh_pte_to_phys(struct isp_mmu *mmu, unsigned int pte) { unsigned int mask = mmu->driver->pte_valid_mask; + return (phys_addr_t)((pte & ~mask) << ISP_PAGE_OFFSET); } @@ -45,6 +46,7 @@ static unsigned int sh_get_pd_base(struct isp_mmu *mmu, phys_addr_t phys) { unsigned int pte = sh_phys_to_pte(mmu, phys); + return HOST_ADDRESS(pte); } diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index 70c34de987079..d0b427539b6d3 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -575,7 +575,7 @@ static struct camera_vcm_control *gmin_get_vcm_ctrl(struct v4l2_subdev *subdev, struct gmin_subdev *gs = find_gmin_subdev(subdev); struct camera_vcm_control *vcm; - if (client == NULL || gs == NULL) + if (!client || !gs) return NULL; if (!camera_module) -- GitLab From eaa399eb542cdfc5748a32634ba3d5cffb5517cd Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 17:51:29 +0200 Subject: [PATCH 391/503] media: atomisp: do lots of other coding style cleanups Use some auto-reformat tools to make the atomisp style a little better. There are still lots of weird things there, but this will hopefully reduce the number of pure coding style patches submitted upstream. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-gc0310.c | 259 +- .../media/atomisp/i2c/atomisp-gc2235.c | 178 +- .../atomisp/i2c/atomisp-libmsrlisthelper.c | 22 +- .../media/atomisp/i2c/atomisp-lm3554.c | 182 +- .../media/atomisp/i2c/atomisp-mt9m114.c | 324 +- .../media/atomisp/i2c/atomisp-ov2680.c | 266 +- .../media/atomisp/i2c/atomisp-ov2722.c | 202 +- drivers/staging/media/atomisp/i2c/mt9m114.h | 138 +- drivers/staging/media/atomisp/i2c/ov2680.h | 1292 +-- .../media/atomisp/i2c/ov5693/atomisp-ov5693.c | 347 +- .../media/atomisp/include/linux/atomisp.h | 3 +- .../include/linux/atomisp_gmin_platform.h | 8 +- .../atomisp/include/linux/atomisp_platform.h | 12 +- .../atomisp/include/linux/libmsrlisthelper.h | 4 +- .../media/atomisp/pci/atomisp2/atomisp_acc.c | 37 +- .../media/atomisp/pci/atomisp2/atomisp_cmd.c | 1486 +-- .../media/atomisp/pci/atomisp2/atomisp_cmd.h | 44 +- .../atomisp/pci/atomisp2/atomisp_compat.h | 355 +- .../pci/atomisp2/atomisp_compat_css20.c | 1393 +-- .../pci/atomisp2/atomisp_compat_css20.h | 42 +- .../pci/atomisp2/atomisp_compat_ioctl32.c | 147 +- .../pci/atomisp2/atomisp_compat_ioctl32.h | 6 +- .../media/atomisp/pci/atomisp2/atomisp_csi2.c | 49 +- .../media/atomisp/pci/atomisp2/atomisp_csi2.h | 7 +- .../atomisp/pci/atomisp2/atomisp_drvfs.c | 12 +- .../media/atomisp/pci/atomisp2/atomisp_file.c | 4 +- .../media/atomisp/pci/atomisp2/atomisp_file.h | 4 +- .../media/atomisp/pci/atomisp2/atomisp_fops.c | 150 +- .../media/atomisp/pci/atomisp2/atomisp_fops.h | 10 +- .../atomisp/pci/atomisp2/atomisp_internal.h | 2 +- .../atomisp/pci/atomisp2/atomisp_ioctl.c | 239 +- .../atomisp/pci/atomisp2/atomisp_ioctl.h | 17 +- .../atomisp/pci/atomisp2/atomisp_subdev.c | 176 +- .../atomisp/pci/atomisp2/atomisp_subdev.h | 19 +- .../atomisp/pci/atomisp2/atomisp_tables.h | 226 +- .../media/atomisp/pci/atomisp2/atomisp_tpg.c | 2 +- .../media/atomisp/pci/atomisp2/atomisp_tpg.h | 2 +- .../pci/atomisp2/atomisp_trace_event.h | 84 +- .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 190 +- .../media/atomisp/pci/atomisp2/atomisp_v4l2.h | 4 +- .../base/circbuf/interface/ia_css_circbuf.h | 66 +- .../circbuf/interface/ia_css_circbuf_desc.h | 32 +- .../css2400/base/circbuf/src/circbuf.c | 30 +- .../base/refcount/interface/ia_css_refcount.h | 2 +- .../css2400/base/refcount/src/refcount.c | 6 +- .../pipe/interface/ia_css_pipe_binarydesc.h | 158 +- .../pipe/interface/ia_css_pipe_stagedesc.h | 38 +- .../camera/pipe/interface/ia_css_pipe_util.h | 10 +- .../css2400/camera/pipe/src/pipe_binarydesc.c | 249 +- .../css2400/camera/pipe/src/pipe_stagedesc.c | 47 +- .../css2400/camera/pipe/src/pipe_util.c | 12 +- .../camera/util/interface/ia_css_util.h | 34 +- .../atomisp2/css2400/camera/util/src/util.c | 68 +- .../ia_css_isp_configs.c | 210 +- .../ia_css_isp_configs.h | 56 +- .../ia_css_isp_params.c | 1871 ++-- .../ia_css_isp_params.h | 84 +- .../ia_css_isp_states.c | 98 +- .../ia_css_isp_states.h | 3 +- .../css2400/css_2400_system/hrt/dma_v2_defs.h | 2 +- .../css2400/css_2400_system/hrt/gdc_v2_defs.h | 50 +- .../css_2400_system/hrt/gpio_block_defs.h | 8 +- .../hrt/hive_isp_css_irq_types_hrt.h | 76 +- .../hrt/isp2400_mamoiada_params.h | 46 +- .../css_2400_system/hrt/isp2400_support.h | 4 +- .../ia_css_isp_configs.c | 210 +- .../ia_css_isp_configs.h | 56 +- .../ia_css_isp_params.c | 1868 ++-- .../ia_css_isp_params.h | 84 +- .../ia_css_isp_states.c | 98 +- .../ia_css_isp_states.h | 3 +- .../host/csi_rx_private.h | 165 +- .../host/ibuf_ctrl_private.h | 175 +- .../host/input_system_private.h | 48 +- .../css_2401_csi2p_system/host/isys_dma.c | 8 +- .../host/isys_dma_private.h | 16 +- .../css_2401_csi2p_system/host/isys_irq.c | 14 +- .../host/isys_irq_local.h | 2 +- .../host/isys_irq_private.h | 28 +- .../host/isys_stream2mmio_private.h | 46 +- .../host/pixelgen_private.h | 129 +- .../css_2401_csi2p_system/host/system_local.h | 124 +- .../css_2401_csi2p_system/hrt/dma_v2_defs.h | 2 +- .../css_2401_csi2p_system/hrt/gdc_v2_defs.h | 50 +- .../hrt/gpio_block_defs.h | 8 +- .../hrt/hive_isp_css_2401_irq_types_hrt.h | 74 +- .../hrt/ibuf_cntrl_defs.h | 44 +- .../hrt/isp2400_support.h | 4 +- .../hrt/isp2401_mamoiada_params.h | 46 +- .../hrt/stream2mmio_defs.h | 4 +- .../input_system_global.h | 3 +- .../css_2401_csi2p_system/isys_dma_global.h | 9 +- .../ia_css_isp_configs.c | 210 +- .../ia_css_isp_configs.h | 56 +- .../ia_css_isp_params.c | 1868 ++-- .../ia_css_isp_params.h | 84 +- .../ia_css_isp_states.c | 98 +- .../ia_css_isp_states.h | 3 +- .../css2400/css_2401_system/hrt/dma_v2_defs.h | 2 +- .../css2400/css_2401_system/hrt/gdc_v2_defs.h | 50 +- .../css_2401_system/hrt/gpio_block_defs.h | 8 +- .../hrt/hive_isp_css_2401_irq_types_hrt.h | 74 +- .../css_2401_system/hrt/isp2400_support.h | 4 +- .../hrt/isp2401_mamoiada_params.h | 46 +- .../css2400/hive_isp_css_common/dma_global.h | 10 +- .../css2400/hive_isp_css_common/host/debug.c | 10 +- .../hive_isp_css_common/host/debug_private.h | 54 +- .../css2400/hive_isp_css_common/host/dma.c | 258 +- .../hive_isp_css_common/host/dma_local.h | 4 +- .../hive_isp_css_common/host/dma_private.h | 6 +- .../host/event_fifo_local.h | 12 +- .../host/event_fifo_private.h | 4 +- .../hive_isp_css_common/host/fifo_monitor.c | 545 +- .../host/fifo_monitor_local.h | 12 +- .../host/fifo_monitor_private.h | 26 +- .../css2400/hive_isp_css_common/host/gdc.c | 32 +- .../hive_isp_css_common/host/gp_device.c | 82 +- .../host/gp_device_private.h | 10 +- .../hive_isp_css_common/host/gp_timer.c | 6 +- .../hive_isp_css_common/host/gpio_private.h | 18 +- .../hive_isp_css_common/host/hmem_private.h | 2 +- .../host/input_formatter.c | 155 +- .../host/input_formatter_local.h | 5 +- .../host/input_formatter_private.h | 10 +- .../hive_isp_css_common/host/input_system.c | 1405 +-- .../host/input_system_local.h | 60 +- .../host/input_system_private.h | 66 +- .../css2400/hive_isp_css_common/host/irq.c | 178 +- .../hive_isp_css_common/host/irq_private.h | 10 +- .../css2400/hive_isp_css_common/host/isp.c | 54 +- .../hive_isp_css_common/host/isp_private.h | 60 +- .../css2400/hive_isp_css_common/host/mmu.c | 8 +- .../css2400/hive_isp_css_common/host/sp.c | 42 +- .../hive_isp_css_common/host/sp_private.h | 74 +- .../hive_isp_css_common/host/system_local.h | 124 +- .../hive_isp_css_common/host/timed_ctrl.c | 44 +- .../host/timed_ctrl_private.h | 10 +- .../hive_isp_css_common/host/vamem_private.h | 11 +- .../css2400/hive_isp_css_common/host/vmem.c | 100 +- .../hive_isp_css_common/host/vmem_local.h | 46 +- .../hive_isp_css_common/input_system_global.h | 2 +- .../css2400/hive_isp_css_common/vmem_global.h | 2 +- .../device_access/device_access.h | 38 +- .../hive_isp_css_include/host/csi_rx_public.h | 42 +- .../hive_isp_css_include/host/debug_public.h | 6 +- .../hive_isp_css_include/host/dma_public.h | 20 +- .../host/event_fifo_public.h | 16 +- .../host/fifo_monitor_public.h | 36 +- .../hive_isp_css_include/host/gdc_public.h | 10 +- .../host/gp_device_public.h | 14 +- .../hive_isp_css_include/host/gpio_public.h | 10 +- .../hive_isp_css_include/host/hmem_public.h | 2 +- .../host/ibuf_ctrl_public.h | 24 +- .../host/input_formatter_public.h | 30 +- .../host/input_system_public.h | 220 +- .../hive_isp_css_include/host/irq_public.h | 46 +- .../hive_isp_css_include/host/isp_public.h | 68 +- .../host/isys_dma_public.h | 14 +- .../host/isys_irq_public.h | 20 +- .../hive_isp_css_include/host/isys_public.h | 8 +- .../host/isys_stream2mmio_public.h | 28 +- .../hive_isp_css_include/host/mmu_public.h | 18 +- .../host/pixelgen_public.h | 18 +- .../hive_isp_css_include/host/sp_public.h | 84 +- .../host/timed_ctrl_public.h | 46 +- .../memory_access/memory_access.h | 8 +- .../hive_isp_css_include/memory_realloc.h | 10 +- .../hive_isp_css_include/string_support.h | 26 +- .../css2400/hive_isp_css_shared/host/tag.c | 16 +- .../atomisp/pci/atomisp2/css2400/ia_css_3a.h | 8 +- .../pci/atomisp2/css2400/ia_css_acc_types.h | 16 +- .../pci/atomisp2/css2400/ia_css_buffer.h | 9 +- .../pci/atomisp2/css2400/ia_css_control.h | 8 +- .../atomisp2/css2400/ia_css_device_access.h | 3 +- .../atomisp/pci/atomisp2/css2400/ia_css_dvs.h | 12 +- .../pci/atomisp2/css2400/ia_css_firmware.h | 2 +- .../atomisp2/css2400/ia_css_frame_public.h | 8 +- .../atomisp/pci/atomisp2/css2400/ia_css_irq.h | 2 +- .../atomisp2/css2400/ia_css_memory_access.c | 6 +- .../pci/atomisp2/css2400/ia_css_metadata.h | 4 +- .../pci/atomisp2/css2400/ia_css_mipi.h | 14 +- .../pci/atomisp2/css2400/ia_css_pipe.h | 4 +- .../pci/atomisp2/css2400/ia_css_pipe_public.h | 25 +- .../pci/atomisp2/css2400/ia_css_stream.h | 19 +- .../atomisp2/css2400/ia_css_stream_format.h | 4 +- .../atomisp2/css2400/ia_css_stream_public.h | 63 +- .../pci/atomisp2/css2400/ia_css_timer.h | 2 +- .../pci/atomisp2/css2400/ia_css_types.h | 65 +- .../isp/kernels/anr/anr_1.0/ia_css_anr.host.c | 30 +- .../isp/kernels/anr/anr_1.0/ia_css_anr.host.h | 12 +- .../isp/kernels/anr/anr_2/ia_css_anr2.host.c | 10 +- .../isp/kernels/anr/anr_2/ia_css_anr2.host.h | 8 +- .../anr/anr_2/ia_css_anr2_table.host.c | 56 +- .../isp/kernels/anr/anr_2/ia_css_anr_param.h | 2 +- .../isp/kernels/bh/bh_2/ia_css_bh.host.c | 10 +- .../isp/kernels/bh/bh_2/ia_css_bh.host.h | 10 +- .../isp/kernels/bnlm/ia_css_bnlm.host.c | 57 +- .../isp/kernels/bnlm/ia_css_bnlm.host.h | 16 +- .../kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c | 37 +- .../kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h | 10 +- .../isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c | 28 +- .../isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h | 10 +- .../isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c | 4 +- .../isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h | 4 +- .../isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c | 28 +- .../isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h | 18 +- .../conversion_1.0/ia_css_conversion.host.c | 6 +- .../conversion_1.0/ia_css_conversion.host.h | 6 +- .../copy_output_1.0/ia_css_copy_output.host.c | 10 +- .../copy_output_1.0/ia_css_copy_output.host.h | 10 +- .../kernels/crop/crop_1.0/ia_css_crop.host.c | 16 +- .../kernels/crop/crop_1.0/ia_css_crop.host.h | 16 +- .../isp/kernels/csc/csc_1.0/ia_css_csc.host.c | 78 +- .../isp/kernels/csc/csc_1.0/ia_css_csc.host.h | 24 +- .../kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c | 19 +- .../kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h | 10 +- .../isp/kernels/ctc/ctc2/ia_css_ctc2.host.c | 15 +- .../isp/kernels/ctc/ctc2/ia_css_ctc2_types.h | 2 +- .../isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c | 22 +- .../isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h | 8 +- .../ctc/ctc_1.0/ia_css_ctc_table.host.c | 322 +- .../isp/kernels/de/de_1.0/ia_css_de.host.c | 34 +- .../isp/kernels/de/de_1.0/ia_css_de.host.h | 18 +- .../isp/kernels/de/de_1.0/ia_css_de_state.h | 2 +- .../isp/kernels/de/de_2/ia_css_de2.host.c | 20 +- .../isp/kernels/de/de_2/ia_css_de2.host.h | 12 +- .../isp/kernels/dp/dp_1.0/ia_css_dp.host.c | 48 +- .../isp/kernels/dp/dp_1.0/ia_css_dp.host.h | 18 +- .../isp/kernels/dpc2/ia_css_dpc2.host.c | 16 +- .../isp/kernels/dpc2/ia_css_dpc2.host.h | 14 +- .../isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c | 76 +- .../isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h | 28 +- .../isp/kernels/eed1_8/ia_css_eed1_8.host.c | 86 +- .../isp/kernels/eed1_8/ia_css_eed1_8.host.h | 20 +- .../isp/kernels/eed1_8/ia_css_eed1_8_types.h | 6 +- .../kernels/fc/fc_1.0/ia_css_formats.host.c | 20 +- .../kernels/fc/fc_1.0/ia_css_formats.host.h | 14 +- .../isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c | 24 +- .../isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h | 20 +- .../isp/kernels/gc/gc_1.0/ia_css_gc.host.c | 54 +- .../isp/kernels/gc/gc_1.0/ia_css_gc.host.h | 34 +- .../kernels/gc/gc_1.0/ia_css_gc_table.host.c | 322 +- .../isp/kernels/gc/gc_2/ia_css_gc2.host.c | 42 +- .../isp/kernels/gc/gc_2/ia_css_gc2.host.h | 42 +- .../kernels/gc/gc_2/ia_css_gc2_table.host.c | 130 +- .../isp/kernels/gc/gc_2/ia_css_gc2_types.h | 2 +- .../css2400/isp/kernels/hdr/ia_css_hdr.host.c | 6 +- .../css2400/isp/kernels/hdr/ia_css_hdr.host.h | 6 +- .../isp/kernels/hdr/ia_css_hdr_param.h | 18 +- .../isp/kernels/hdr/ia_css_hdr_types.h | 18 +- .../io_ls/bayer_io_ls/ia_css_bayer_io.host.c | 31 +- .../io_ls/bayer_io_ls/ia_css_bayer_io.host.h | 4 +- .../bayer_io_ls/ia_css_bayer_io.host.c | 31 +- .../bayer_io_ls/ia_css_bayer_io.host.h | 4 +- .../yuv444_io_ls/ia_css_yuv444_io.host.c | 31 +- .../yuv444_io_ls/ia_css_yuv444_io.host.h | 4 +- .../iterator_1.0/ia_css_iterator.host.c | 14 +- .../iterator_1.0/ia_css_iterator.host.h | 10 +- .../macc/macc1_5/ia_css_macc1_5.host.c | 23 +- .../macc/macc1_5/ia_css_macc1_5.host.h | 16 +- .../macc/macc1_5/ia_css_macc1_5_param.h | 2 +- .../macc/macc1_5/ia_css_macc1_5_table.host.c | 6 +- .../kernels/macc/macc_1.0/ia_css_macc.host.c | 18 +- .../kernels/macc/macc_1.0/ia_css_macc.host.h | 14 +- .../macc/macc_1.0/ia_css_macc_table.host.c | 12 +- .../isp/kernels/ob/ob2/ia_css_ob2.host.c | 28 +- .../isp/kernels/ob/ob2/ia_css_ob2.host.h | 12 +- .../isp/kernels/ob/ob_1.0/ia_css_ob.host.c | 58 +- .../isp/kernels/ob/ob_1.0/ia_css_ob.host.h | 28 +- .../output/output_1.0/ia_css_output.host.c | 72 +- .../output/output_1.0/ia_css_output.host.h | 44 +- .../qplane/qplane_2/ia_css_qplane.host.c | 12 +- .../qplane/qplane_2/ia_css_qplane.host.h | 12 +- .../isp/kernels/raw/raw_1.0/ia_css_raw.host.c | 28 +- .../isp/kernels/raw/raw_1.0/ia_css_raw.host.h | 18 +- .../raw_aa_binning_1.0/ia_css_raa.host.c | 6 +- .../raw_aa_binning_1.0/ia_css_raa.host.h | 6 +- .../isp/kernels/ref/ref_1.0/ia_css_ref.host.c | 22 +- .../isp/kernels/ref/ref_1.0/ia_css_ref.host.h | 16 +- .../isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c | 159 +- .../isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h | 42 +- .../kernels/s3a/s3a_1.0/ia_css_s3a_types.h | 15 +- .../isp/kernels/sc/sc_1.0/ia_css_sc.host.c | 43 +- .../isp/kernels/sc/sc_1.0/ia_css_sc.host.h | 26 +- .../isp/kernels/sc/sc_1.0/ia_css_sc_types.h | 12 +- .../sdis/common/ia_css_sdis_common.host.h | 22 +- .../sdis/common/ia_css_sdis_common_types.h | 3 +- .../kernels/sdis/sdis_1.0/ia_css_sdis.host.c | 155 +- .../kernels/sdis/sdis_1.0/ia_css_sdis.host.h | 64 +- .../kernels/sdis/sdis_1.0/ia_css_sdis_types.h | 6 +- .../kernels/sdis/sdis_2/ia_css_sdis2.host.c | 145 +- .../kernels/sdis/sdis_2/ia_css_sdis2.host.h | 64 +- .../kernels/sdis/sdis_2/ia_css_sdis2_types.h | 18 +- .../isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c | 32 +- .../isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h | 14 +- .../isp/kernels/tnr/tnr3/ia_css_tnr3_types.h | 12 +- .../isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c | 43 +- .../isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h | 28 +- .../isp/kernels/vf/vf_1.0/ia_css_vf.host.c | 109 +- .../isp/kernels/vf/vf_1.0/ia_css_vf.host.h | 20 +- .../isp/kernels/wb/wb_1.0/ia_css_wb.host.c | 32 +- .../isp/kernels/wb/wb_1.0/ia_css_wb.host.h | 14 +- .../isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c | 24 +- .../isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h | 20 +- .../xnr/xnr_1.0/ia_css_xnr_table.host.c | 46 +- .../kernels/xnr/xnr_1.0/ia_css_xnr_types.h | 2 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3.host.c | 34 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3.host.h | 16 +- .../isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c | 128 +- .../isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h | 32 +- .../kernels/ynr/ynr_1.0/ia_css_ynr_state.h | 2 +- .../isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c | 50 +- .../isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h | 28 +- .../isp/modes/interface/input_buf.isp.h | 17 +- .../css2400/isp/modes/interface/isp_const.h | 2 +- .../css2400/isp/modes/interface/isp_types.h | 22 +- .../pci/atomisp2/css2400/memory_realloc.c | 41 +- .../runtime/binary/interface/ia_css_binary.h | 42 +- .../css2400/runtime/binary/src/binary.c | 1291 +-- .../runtime/bufq/interface/ia_css_bufq.h | 46 +- .../atomisp2/css2400/runtime/bufq/src/bufq.c | 147 +- .../runtime/debug/interface/ia_css_debug.h | 53 +- .../debug/interface/ia_css_debug_pipe.h | 8 +- .../css2400/runtime/debug/src/ia_css_debug.c | 637 +- .../runtime/event/interface/ia_css_event.h | 10 +- .../css2400/runtime/event/src/event.c | 13 +- .../runtime/eventq/interface/ia_css_eventq.h | 14 +- .../css2400/runtime/eventq/src/eventq.c | 14 +- .../runtime/frame/interface/ia_css_frame.h | 38 +- .../frame/interface/ia_css_frame_comm.h | 10 +- .../css2400/runtime/frame/src/frame.c | 387 +- .../runtime/ifmtr/interface/ia_css_ifmtr.h | 4 +- .../css2400/runtime/ifmtr/src/ifmtr.c | 103 +- .../inputfifo/interface/ia_css_inputfifo.h | 38 +- .../css2400/runtime/inputfifo/src/inputfifo.c | 198 +- .../isp_param/interface/ia_css_isp_param.h | 80 +- .../css2400/runtime/isp_param/src/isp_param.c | 95 +- .../runtime/isys/interface/ia_css_isys.h | 74 +- .../runtime/isys/interface/ia_css_isys_comm.h | 4 +- .../css2400/runtime/isys/src/csi_rx_rmgr.c | 26 +- .../css2400/runtime/isys/src/ibuf_ctrl_rmgr.c | 6 +- .../css2400/runtime/isys/src/isys_dma_rmgr.c | 8 +- .../css2400/runtime/isys/src/isys_init.c | 56 +- .../runtime/isys/src/isys_stream2mmio_rmgr.c | 8 +- .../atomisp2/css2400/runtime/isys/src/rx.c | 113 +- .../css2400/runtime/isys/src/virtual_isys.c | 534 +- .../pipeline/interface/ia_css_pipeline.h | 40 +- .../css2400/runtime/pipeline/src/pipeline.c | 248 +- .../runtime/queue/interface/ia_css_queue.h | 44 +- .../css2400/runtime/queue/src/queue.c | 50 +- .../css2400/runtime/queue/src/queue_access.c | 100 +- .../css2400/runtime/queue/src/queue_access.h | 24 +- .../runtime/rmgr/interface/ia_css_rmgr_vbuf.h | 12 +- .../css2400/runtime/rmgr/src/rmgr_vbuf.c | 13 +- .../runtime/spctrl/interface/ia_css_spctrl.h | 2 +- .../css2400/runtime/spctrl/src/spctrl.c | 23 +- .../css2400/runtime/timer/src/timer.c | 5 +- .../atomisp/pci/atomisp2/css2400/sh_css.c | 9766 +++++++++-------- .../pci/atomisp2/css2400/sh_css_defs.h | 2 +- .../pci/atomisp2/css2400/sh_css_firmware.c | 70 +- .../pci/atomisp2/css2400/sh_css_firmware.h | 3 +- .../atomisp/pci/atomisp2/css2400/sh_css_hrt.c | 6 +- .../pci/atomisp2/css2400/sh_css_internal.h | 123 +- .../pci/atomisp2/css2400/sh_css_legacy.h | 5 +- .../pci/atomisp2/css2400/sh_css_metrics.c | 2 +- .../pci/atomisp2/css2400/sh_css_mipi.c | 276 +- .../pci/atomisp2/css2400/sh_css_mipi.h | 4 +- .../atomisp/pci/atomisp2/css2400/sh_css_mmu.c | 10 +- .../pci/atomisp2/css2400/sh_css_param_dvs.c | 123 +- .../pci/atomisp2/css2400/sh_css_param_dvs.h | 8 +- .../atomisp2/css2400/sh_css_param_shading.c | 78 +- .../atomisp2/css2400/sh_css_param_shading.h | 8 +- .../pci/atomisp2/css2400/sh_css_params.c | 2505 ++--- .../pci/atomisp2/css2400/sh_css_params.h | 31 +- .../pci/atomisp2/css2400/sh_css_properties.c | 8 +- .../atomisp/pci/atomisp2/css2400/sh_css_sp.c | 523 +- .../atomisp/pci/atomisp2/css2400/sh_css_sp.h | 40 +- .../atomisp2/css2400/sh_css_stream_format.c | 2 +- .../atomisp2/css2400/sh_css_stream_format.h | 2 +- .../pci/atomisp2/css2400/sh_css_struct.h | 17 +- .../pci/atomisp2/css2400/sh_css_version.c | 3 +- .../media/atomisp/pci/atomisp2/hmm/hmm_bo.c | 182 +- .../pci/atomisp2/hmm/hmm_dynamic_pool.c | 18 +- .../pci/atomisp2/hmm/hmm_reserved_pool.c | 18 +- .../media/atomisp/pci/atomisp2/hmm/hmm_vm.c | 8 +- .../pci/atomisp2/hrt/hive_isp_css_mm_hrt.c | 34 +- .../pci/atomisp2/hrt/hive_isp_css_mm_hrt.h | 10 +- .../atomisp/pci/atomisp2/include/hmm/hmm.h | 2 +- .../atomisp/pci/atomisp2/include/hmm/hmm_bo.h | 18 +- .../pci/atomisp2/include/hmm/hmm_pool.h | 4 +- .../atomisp/pci/atomisp2/include/hmm/hmm_vm.h | 6 +- .../pci/atomisp2/include/mmu/isp_mmu.h | 8 +- .../media/atomisp/pci/atomisp2/mmu/isp_mmu.c | 78 +- .../intel-mid/atomisp_gmin_platform.c | 19 +- 394 files changed, 23523 insertions(+), 21037 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c index 404dc5187749c..6ca708e8ff6ad 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -101,7 +101,7 @@ static int gc0310_i2c_write(struct i2c_client *client, u16 len, u8 *data) } static int gc0310_write_reg(struct i2c_client *client, u16 data_length, - u8 reg, u8 val) + u8 reg, u8 val) { int ret; unsigned char data[2] = {0}; @@ -191,8 +191,8 @@ static int __gc0310_buf_reg_array(struct i2c_client *client, } static int __gc0310_write_reg_is_consecutive(struct i2c_client *client, - struct gc0310_write_ctrl *ctrl, - const struct gc0310_reg *next) + struct gc0310_write_ctrl *ctrl, + const struct gc0310_reg *next) { if (ctrl->index == 0) return 1; @@ -222,7 +222,7 @@ static int gc0310_write_reg_array(struct i2c_client *client, * flushed before proceed. */ if (!__gc0310_write_reg_is_consecutive(client, &ctrl, - next)) { + next)) { err = __gc0310_flush_reg_array(client, &ctrl); if (err) return err; @@ -230,7 +230,7 @@ static int gc0310_write_reg_array(struct i2c_client *client, err = __gc0310_buf_reg_array(client, &ctrl, next); if (err) { dev_err(&client->dev, "%s: write error, aborted\n", - __func__); + __func__); return err; } break; @@ -256,8 +256,8 @@ static int gc0310_g_fnumber(struct v4l2_subdev *sd, s32 *val) static int gc0310_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) { *val = (GC0310_F_NUMBER_DEFAULT_NUM << 24) | - (GC0310_F_NUMBER_DEM << 16) | - (GC0310_F_NUMBER_DEFAULT_NUM << 8) | GC0310_F_NUMBER_DEM; + (GC0310_F_NUMBER_DEM << 16) | + (GC0310_F_NUMBER_DEFAULT_NUM << 8) | GC0310_F_NUMBER_DEM; return 0; } @@ -280,8 +280,8 @@ static int gc0310_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) } static int gc0310_get_intg_factor(struct i2c_client *client, - struct camera_mipi_info *info, - const struct gc0310_resolution *res) + struct camera_mipi_info *info, + const struct gc0310_resolution *res) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct gc0310_device *dev = to_gc0310_sensor(sd); @@ -304,11 +304,11 @@ static int gc0310_get_intg_factor(struct i2c_client *client, /* get integration time */ buf->coarse_integration_time_min = GC0310_COARSE_INTG_TIME_MIN; buf->coarse_integration_time_max_margin = - GC0310_COARSE_INTG_TIME_MAX_MARGIN; + GC0310_COARSE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_min = GC0310_FINE_INTG_TIME_MIN; buf->fine_integration_time_max_margin = - GC0310_FINE_INTG_TIME_MAX_MARGIN; + GC0310_FINE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_def = GC0310_FINE_INTG_TIME_MIN; buf->read_mode = res->bin_mode; @@ -316,12 +316,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client, /* get the cropping and output resolution to ISP for this mode. */ /* Getting crop_horizontal_start */ ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_H_CROP_START_H, ®_val); + GC0310_H_CROP_START_H, ®_val); if (ret) return ret; val = (reg_val & 0xFF) << 8; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_H_CROP_START_L, ®_val); + GC0310_H_CROP_START_L, ®_val); if (ret) return ret; buf->crop_horizontal_start = val | (reg_val & 0xFF); @@ -329,12 +329,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client, /* Getting crop_vertical_start */ ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_V_CROP_START_H, ®_val); + GC0310_V_CROP_START_H, ®_val); if (ret) return ret; val = (reg_val & 0xFF) << 8; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_V_CROP_START_L, ®_val); + GC0310_V_CROP_START_L, ®_val); if (ret) return ret; buf->crop_vertical_start = val | (reg_val & 0xFF); @@ -342,12 +342,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client, /* Getting output_width */ ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_H_OUTSIZE_H, ®_val); + GC0310_H_OUTSIZE_H, ®_val); if (ret) return ret; val = (reg_val & 0xFF) << 8; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_H_OUTSIZE_L, ®_val); + GC0310_H_OUTSIZE_L, ®_val); if (ret) return ret; buf->output_width = val | (reg_val & 0xFF); @@ -355,12 +355,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client, /* Getting output_height */ ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_V_OUTSIZE_H, ®_val); + GC0310_V_OUTSIZE_H, ®_val); if (ret) return ret; val = (reg_val & 0xFF) << 8; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_V_OUTSIZE_L, ®_val); + GC0310_V_OUTSIZE_L, ®_val); if (ret) return ret; buf->output_height = val | (reg_val & 0xFF); @@ -373,41 +373,43 @@ static int gc0310_get_intg_factor(struct i2c_client *client, /* Getting line_length_pck */ ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_H_BLANKING_H, ®_val); + GC0310_H_BLANKING_H, ®_val); if (ret) return ret; val = (reg_val & 0xFF) << 8; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_H_BLANKING_L, ®_val); + GC0310_H_BLANKING_L, ®_val); if (ret) return ret; hori_blanking = val | (reg_val & 0xFF); ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_SH_DELAY, ®_val); + GC0310_SH_DELAY, ®_val); if (ret) return ret; sh_delay = reg_val; buf->line_length_pck = buf->output_width + hori_blanking + sh_delay + 4; - pr_info("hori_blanking=%d sh_delay=%d line_length_pck=%d\n", hori_blanking, sh_delay, buf->line_length_pck); + pr_info("hori_blanking=%d sh_delay=%d line_length_pck=%d\n", hori_blanking, + sh_delay, buf->line_length_pck); /* Getting frame_length_lines */ ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_V_BLANKING_H, ®_val); + GC0310_V_BLANKING_H, ®_val); if (ret) return ret; val = (reg_val & 0xFF) << 8; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_V_BLANKING_L, ®_val); + GC0310_V_BLANKING_L, ®_val); if (ret) return ret; vert_blanking = val | (reg_val & 0xFF); buf->frame_length_lines = buf->output_height + vert_blanking; - pr_info("vert_blanking=%d frame_length_lines=%d\n", vert_blanking, buf->frame_length_lines); + pr_info("vert_blanking=%d frame_length_lines=%d\n", vert_blanking, + buf->frame_length_lines); buf->binning_factor_x = res->bin_factor_x ? - res->bin_factor_x : 1; + res->bin_factor_x : 1; buf->binning_factor_y = res->bin_factor_y ? - res->bin_factor_y : 1; + res->bin_factor_y : 1; return 0; } @@ -435,13 +437,13 @@ static int gc0310_set_gain(struct v4l2_subdev *sd, int gain) /* set analog gain */ ret = gc0310_write_reg(client, GC0310_8BIT, - GC0310_AGC_ADJ, again); + GC0310_AGC_ADJ, again); if (ret) return ret; /* set digital gain */ ret = gc0310_write_reg(client, GC0310_8BIT, - GC0310_DGC_ADJ, dgain); + GC0310_DGC_ADJ, dgain); if (ret) return ret; @@ -459,14 +461,14 @@ static int __gc0310_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* set exposure */ ret = gc0310_write_reg(client, GC0310_8BIT, - GC0310_AEC_PK_EXPO_L, - coarse_itg & 0xff); + GC0310_AEC_PK_EXPO_L, + coarse_itg & 0xff); if (ret) return ret; ret = gc0310_write_reg(client, GC0310_8BIT, - GC0310_AEC_PK_EXPO_H, - (coarse_itg >> 8) & 0x0f); + GC0310_AEC_PK_EXPO_H, + (coarse_itg >> 8) & 0x0f); if (ret) return ret; @@ -478,7 +480,7 @@ static int __gc0310_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } static int gc0310_set_exposure(struct v4l2_subdev *sd, int exposure, - int gain, int digitgain) + int gain, int digitgain) { struct gc0310_device *dev = to_gc0310_sensor(sd); int ret; @@ -491,7 +493,7 @@ static int gc0310_set_exposure(struct v4l2_subdev *sd, int exposure, } static long gc0310_s_exposure(struct v4l2_subdev *sd, - struct atomisp_exposure *exposure) + struct atomisp_exposure *exposure) { int exp = exposure->integration_time[0]; int gain = exposure->gain[0]; @@ -542,15 +544,15 @@ static int gc0310_q_exposure(struct v4l2_subdev *sd, s32 *value) /* get exposure */ ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_AEC_PK_EXPO_L, - ®_v); + GC0310_AEC_PK_EXPO_L, + ®_v); if (ret) goto err; *value = reg_v; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_AEC_PK_EXPO_H, - ®_v); + GC0310_AEC_PK_EXPO_H, + ®_v); if (ret) goto err; @@ -622,91 +624,91 @@ static const struct v4l2_ctrl_ops ctrl_ops = { static const struct v4l2_ctrl_config gc0310_controls[] = { { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "exposure", - .min = 0x0, - .max = 0xffff, - .step = 0x01, - .def = 0x00, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_VFLIP, - .type = V4L2_CTRL_TYPE_BOOLEAN, - .name = "Flip", - .min = 0, - .max = 1, - .step = 1, - .def = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flip", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_HFLIP, - .type = V4L2_CTRL_TYPE_BOOLEAN, - .name = "Mirror", - .min = 0, - .max = 1, - .step = 1, - .def = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Mirror", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCAL_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focal length", - .min = GC0310_FOCAL_LENGTH_DEFAULT, - .max = GC0310_FOCAL_LENGTH_DEFAULT, - .step = 0x01, - .def = GC0310_FOCAL_LENGTH_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = GC0310_FOCAL_LENGTH_DEFAULT, + .max = GC0310_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = GC0310_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number", - .min = GC0310_F_NUMBER_DEFAULT, - .max = GC0310_F_NUMBER_DEFAULT, - .step = 0x01, - .def = GC0310_F_NUMBER_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = GC0310_F_NUMBER_DEFAULT, + .max = GC0310_F_NUMBER_DEFAULT, + .step = 0x01, + .def = GC0310_F_NUMBER_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_RANGE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number range", - .min = GC0310_F_NUMBER_RANGE, - .max = GC0310_F_NUMBER_RANGE, - .step = 0x01, - .def = GC0310_F_NUMBER_RANGE, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = GC0310_F_NUMBER_RANGE, + .max = GC0310_F_NUMBER_RANGE, + .step = 0x01, + .def = GC0310_F_NUMBER_RANGE, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_HORZ, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "horizontal binning factor", - .min = 0, - .max = GC0310_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = GC0310_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_VERT, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "vertical binning factor", - .min = 0, - .max = GC0310_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = GC0310_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, }; static int gc0310_init(struct v4l2_subdev *sd) @@ -904,7 +906,7 @@ static int distance(struct gc0310_resolution *res, u32 w, u32 h) match = abs(((w_ratio << 13) / h_ratio) - 8192); if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) + (match > LARGEST_ALLOWED_RATIO_MISMATCH)) return -1; return w_ratio + h_ratio; @@ -1070,13 +1072,13 @@ static int gc0310_detect(struct i2c_client *client) return -ENODEV; ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_SC_CMMN_CHIP_ID_H, &high); + GC0310_SC_CMMN_CHIP_ID_H, &high); if (ret) { dev_err(&client->dev, "read sensor_id_high failed\n"); return -ENODEV; } ret = gc0310_read_reg(client, GC0310_8BIT, - GC0310_SC_CMMN_CHIP_ID_L, &low); + GC0310_SC_CMMN_CHIP_ID_L, &low); if (ret) { dev_err(&client->dev, "read sensor_id_low failed\n"); return -ENODEV; @@ -1085,7 +1087,8 @@ static int gc0310_detect(struct i2c_client *client) pr_info("sensor ID = 0x%x\n", id); if (id != GC0310_ID) { - dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n", id, GC0310_ID); + dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n", id, + GC0310_ID); return -ENODEV; } @@ -1108,7 +1111,7 @@ static int gc0310_s_stream(struct v4l2_subdev *sd, int enable) if (enable) { /* enable per frame MIPI and sensor ctrl reset */ ret = gc0310_write_reg(client, GC0310_8BIT, - 0xFE, 0x30); + 0xFE, 0x30); if (ret) { mutex_unlock(&dev->input_lock); return ret; @@ -1116,22 +1119,22 @@ static int gc0310_s_stream(struct v4l2_subdev *sd, int enable) } ret = gc0310_write_reg(client, GC0310_8BIT, - GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3); + GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3); if (ret) { mutex_unlock(&dev->input_lock); return ret; } ret = gc0310_write_reg(client, GC0310_8BIT, GC0310_SW_STREAM, - enable ? GC0310_START_STREAMING : - GC0310_STOP_STREAMING); + enable ? GC0310_START_STREAMING : + GC0310_STOP_STREAMING); if (ret) { mutex_unlock(&dev->input_lock); return ret; } ret = gc0310_write_reg(client, GC0310_8BIT, - GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0); + GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0); if (ret) { mutex_unlock(&dev->input_lock); return ret; @@ -1154,7 +1157,7 @@ static int gc0310_s_config(struct v4l2_subdev *sd, return -ENODEV; dev->platform_data = - (struct camera_sensor_platform_data *)platform_data; + (struct camera_sensor_platform_data *)platform_data; mutex_lock(&dev->input_lock); /* power off the module, then power on it in future diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c index b7f2e7b494bbd..b663b47449a74 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -102,7 +102,7 @@ static int gc2235_i2c_write(struct i2c_client *client, u16 len, u8 *data) } static int gc2235_write_reg(struct i2c_client *client, u16 data_length, - u8 reg, u8 val) + u8 reg, u8 val) { int ret; unsigned char data[4] = {0}; @@ -170,8 +170,8 @@ static int __gc2235_buf_reg_array(struct i2c_client *client, } static int __gc2235_write_reg_is_consecutive(struct i2c_client *client, - struct gc2235_write_ctrl *ctrl, - const struct gc2235_reg *next) + struct gc2235_write_ctrl *ctrl, + const struct gc2235_reg *next) { if (ctrl->index == 0) return 1; @@ -201,7 +201,7 @@ static int gc2235_write_reg_array(struct i2c_client *client, * flushed before proceed. */ if (!__gc2235_write_reg_is_consecutive(client, &ctrl, - next)) { + next)) { err = __gc2235_flush_reg_array(client, &ctrl); if (err) return err; @@ -209,7 +209,7 @@ static int gc2235_write_reg_array(struct i2c_client *client, err = __gc2235_buf_reg_array(client, &ctrl, next); if (err) { dev_err(&client->dev, "%s: write error, aborted\n", - __func__); + __func__); return err; } break; @@ -235,14 +235,14 @@ static int gc2235_g_fnumber(struct v4l2_subdev *sd, s32 *val) static int gc2235_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) { *val = (GC2235_F_NUMBER_DEFAULT_NUM << 24) | - (GC2235_F_NUMBER_DEM << 16) | - (GC2235_F_NUMBER_DEFAULT_NUM << 8) | GC2235_F_NUMBER_DEM; + (GC2235_F_NUMBER_DEM << 16) | + (GC2235_F_NUMBER_DEFAULT_NUM << 8) | GC2235_F_NUMBER_DEM; return 0; } static int gc2235_get_intg_factor(struct i2c_client *client, - struct camera_mipi_info *info, - const struct gc2235_resolution *res) + struct camera_mipi_info *info, + const struct gc2235_resolution *res) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct gc2235_device *dev = to_gc2235_sensor(sd); @@ -259,11 +259,11 @@ static int gc2235_get_intg_factor(struct i2c_client *client, /* get integration time */ buf->coarse_integration_time_min = GC2235_COARSE_INTG_TIME_MIN; buf->coarse_integration_time_max_margin = - GC2235_COARSE_INTG_TIME_MAX_MARGIN; + GC2235_COARSE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_min = GC2235_FINE_INTG_TIME_MIN; buf->fine_integration_time_max_margin = - GC2235_FINE_INTG_TIME_MAX_MARGIN; + GC2235_FINE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_def = GC2235_FINE_INTG_TIME_MIN; buf->frame_length_lines = res->lines_per_frame; @@ -272,48 +272,48 @@ static int gc2235_get_intg_factor(struct i2c_client *client, /* get the cropping and output resolution to ISP for this mode. */ ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_H_CROP_START_H, ®_val_h); + GC2235_H_CROP_START_H, ®_val_h); ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_H_CROP_START_L, ®_val); + GC2235_H_CROP_START_L, ®_val); if (ret) return ret; buf->crop_horizontal_start = (reg_val_h << 8) | reg_val; ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_V_CROP_START_H, ®_val_h); + GC2235_V_CROP_START_H, ®_val_h); ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_V_CROP_START_L, ®_val); + GC2235_V_CROP_START_L, ®_val); if (ret) return ret; buf->crop_vertical_start = (reg_val_h << 8) | reg_val; ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_H_OUTSIZE_H, ®_val_h); + GC2235_H_OUTSIZE_H, ®_val_h); ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_H_OUTSIZE_L, ®_val); + GC2235_H_OUTSIZE_L, ®_val); if (ret) return ret; buf->output_width = (reg_val_h << 8) | reg_val; ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_V_OUTSIZE_H, ®_val_h); + GC2235_V_OUTSIZE_H, ®_val_h); ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_V_OUTSIZE_L, ®_val); + GC2235_V_OUTSIZE_L, ®_val); if (ret) return ret; buf->output_height = (reg_val_h << 8) | reg_val; buf->crop_horizontal_end = buf->crop_horizontal_start + - buf->output_width - 1; + buf->output_width - 1; buf->crop_vertical_end = buf->crop_vertical_start + - buf->output_height - 1; + buf->output_height - 1; ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_HB_H, ®_val_h); + GC2235_HB_H, ®_val_h); ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_HB_L, ®_val); + GC2235_HB_L, ®_val); if (ret) return ret; @@ -322,34 +322,34 @@ static int gc2235_get_intg_factor(struct i2c_client *client, #endif ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_SH_DELAY_H, ®_val_h); + GC2235_SH_DELAY_H, ®_val_h); ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_SH_DELAY_L, ®_val); + GC2235_SH_DELAY_L, ®_val); #if 0 buf->line_length_pck = buf->output_width + 16 + dummy + - (((u16)reg_val_h << 8) | (u16)reg_val) + 4; + (((u16)reg_val_h << 8) | (u16)reg_val) + 4; #endif ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_VB_H, ®_val_h); + GC2235_VB_H, ®_val_h); ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_VB_L, ®_val); + GC2235_VB_L, ®_val); if (ret) return ret; #if 0 buf->frame_length_lines = buf->output_height + 32 + - (((u16)reg_val_h << 8) | (u16)reg_val); + (((u16)reg_val_h << 8) | (u16)reg_val); #endif buf->binning_factor_x = res->bin_factor_x ? - res->bin_factor_x : 1; + res->bin_factor_x : 1; buf->binning_factor_y = res->bin_factor_y ? - res->bin_factor_y : 1; + res->bin_factor_y : 1; return 0; } static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg, - int gain, int digitgain) + int gain, int digitgain) { struct i2c_client *client = v4l2_get_subdevdata(sd); @@ -361,9 +361,9 @@ static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg, expo_coarse_l = coarse_integration & 0xff; ret = gc2235_write_reg(client, GC2235_8BIT, - GC2235_EXPOSURE_H, expo_coarse_h); + GC2235_EXPOSURE_H, expo_coarse_h); ret = gc2235_write_reg(client, GC2235_8BIT, - GC2235_EXPOSURE_L, expo_coarse_l); + GC2235_EXPOSURE_L, expo_coarse_l); if (gain <= 0x58) { gain_val = 0x40; @@ -377,15 +377,15 @@ static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = gc2235_write_reg(client, GC2235_8BIT, - GC2235_GLOBAL_GAIN, (u8)gain_val); + GC2235_GLOBAL_GAIN, (u8)gain_val); ret = gc2235_write_reg(client, GC2235_8BIT, - GC2235_PRE_GAIN, (u8)gain_val2); + GC2235_PRE_GAIN, (u8)gain_val2); return ret; } static int gc2235_set_exposure(struct v4l2_subdev *sd, int exposure, - int gain, int digitgain) + int gain, int digitgain) { struct gc2235_device *dev = to_gc2235_sensor(sd); int ret; @@ -398,7 +398,7 @@ static int gc2235_set_exposure(struct v4l2_subdev *sd, int exposure, } static long gc2235_s_exposure(struct v4l2_subdev *sd, - struct atomisp_exposure *exposure) + struct atomisp_exposure *exposure) { int exp = exposure->integration_time[0]; int gain = exposure->gain[0]; @@ -437,14 +437,14 @@ static int gc2235_q_exposure(struct v4l2_subdev *sd, s32 *value) /* get exposure */ ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_EXPOSURE_L, - ®_v); + GC2235_EXPOSURE_L, + ®_v); if (ret) goto err; ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_EXPOSURE_H, - ®_v2); + GC2235_EXPOSURE_H, + ®_v2); if (ret) goto err; @@ -487,49 +487,49 @@ static const struct v4l2_ctrl_ops ctrl_ops = { static struct v4l2_ctrl_config gc2235_controls[] = { { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "exposure", - .min = 0x0, - .max = 0xffff, - .step = 0x01, - .def = 0x00, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCAL_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focal length", - .min = GC2235_FOCAL_LENGTH_DEFAULT, - .max = GC2235_FOCAL_LENGTH_DEFAULT, - .step = 0x01, - .def = GC2235_FOCAL_LENGTH_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = GC2235_FOCAL_LENGTH_DEFAULT, + .max = GC2235_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = GC2235_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number", - .min = GC2235_F_NUMBER_DEFAULT, - .max = GC2235_F_NUMBER_DEFAULT, - .step = 0x01, - .def = GC2235_F_NUMBER_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = GC2235_F_NUMBER_DEFAULT, + .max = GC2235_F_NUMBER_DEFAULT, + .step = 0x01, + .def = GC2235_F_NUMBER_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_RANGE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number range", - .min = GC2235_F_NUMBER_RANGE, - .max = GC2235_F_NUMBER_RANGE, - .step = 0x01, - .def = GC2235_F_NUMBER_RANGE, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = GC2235_F_NUMBER_RANGE, + .max = GC2235_F_NUMBER_RANGE, + .step = 0x01, + .def = GC2235_F_NUMBER_RANGE, + .flags = 0, + }, }; static int __gc2235_init(struct v4l2_subdev *sd) @@ -854,13 +854,13 @@ static int gc2235_detect(struct i2c_client *client) return -ENODEV; ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_SENSOR_ID_H, &high); + GC2235_SENSOR_ID_H, &high); if (ret) { dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); return -ENODEV; } ret = gc2235_read_reg(client, GC2235_8BIT, - GC2235_SENSOR_ID_L, &low); + GC2235_SENSOR_ID_L, &low); id = ((high << 8) | low); if (id != GC2235_ID) { @@ -900,7 +900,7 @@ static int gc2235_s_config(struct v4l2_subdev *sd, return -ENODEV; dev->platform_data = - (struct camera_sensor_platform_data *)platform_data; + (struct camera_sensor_platform_data *)platform_data; mutex_lock(&dev->input_lock); /* power off the module, then power on it in future @@ -962,8 +962,8 @@ static int gc2235_g_frame_interval(struct v4l2_subdev *sd, } static int gc2235_enum_mbus_code(struct v4l2_subdev *sd, - struct v4l2_subdev_pad_config *cfg, - struct v4l2_subdev_mbus_code_enum *code) + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) { if (code->index >= MAX_FMTS) return -EINVAL; @@ -1062,8 +1062,8 @@ static int gc2235_probe(struct i2c_client *client) v4l2_i2c_subdev_init(&dev->sd, client, &gc2235_ops); gcpdev = gmin_camera_platform_data(&dev->sd, - ATOMISP_INPUT_FORMAT_RAW_10, - atomisp_bayer_order_grbg); + ATOMISP_INPUT_FORMAT_RAW_10, + atomisp_bayer_order_grbg); ret = gc2235_s_config(&dev->sd, client->irq, gcpdev); if (ret) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c index 1d8db57812ace..33ab884f7352f 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c @@ -47,7 +47,7 @@ struct tbd_data_record_header { #define TBD_CLASS_DRV_ID 2 static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr, - unsigned int size) + unsigned int size) { /* The configuration data contains any number of sequences where * the first byte (that is, uint8_t) that marks the number of bytes @@ -87,11 +87,11 @@ static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr, } static int parse_and_apply(struct i2c_client *client, uint8_t *buffer, - unsigned int size) + unsigned int size) { u8 *endptr8 = buffer + size; struct tbd_data_record_header *header = - (struct tbd_data_record_header *)buffer; + (struct tbd_data_record_header *)buffer; /* There may be any number of datasets present */ unsigned int dataset = 0; @@ -103,7 +103,7 @@ static int parse_and_apply(struct i2c_client *client, uint8_t *buffer, /* All data should be located within given buffer */ if ((uint8_t *)header + header->data_offset + - header->data_size > endptr8) + header->data_size > endptr8) return -EINVAL; /* We have a new valid dataset */ @@ -114,16 +114,16 @@ static int parse_and_apply(struct i2c_client *client, uint8_t *buffer, int ret; dev_info(&client->dev, - "New MSR data for sensor driver (dataset %02d) size:%d\n", - dataset, header->data_size); + "New MSR data for sensor driver (dataset %02d) size:%d\n", + dataset, header->data_size); ret = set_msr_configuration(client, - buffer + header->data_offset, - header->data_size); + buffer + header->data_offset, + header->data_size); if (ret) return ret; } header = (struct tbd_data_record_header *)(buffer + - header->next_offset); + header->next_offset); } while (header->next_offset); return 0; @@ -168,7 +168,7 @@ int apply_msr_data(struct i2c_client *client, const struct firmware *fw) EXPORT_SYMBOL_GPL(apply_msr_data); int load_msr_list(struct i2c_client *client, char *name, - const struct firmware **fw) + const struct firmware **fw) { int ret = request_firmware(fw, name, &client->dev); @@ -179,7 +179,7 @@ int load_msr_list(struct i2c_client *client, char *name, return ret; } dev_info(&client->dev, "Received %lu bytes drv data\n", - (unsigned long)(*fw)->size); + (unsigned long)(*fw)->size); return 0; } diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c index 7edaf50a6febd..4d94f49fccbcc 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c @@ -296,7 +296,7 @@ static int lm3554_g_flash_intensity(struct v4l2_subdev *sd, s32 *val) struct lm3554 *flash = to_lm3554(sd); *val = LM3554_VALUE_TO_PERCENT((u32)flash->flash_current, - LM3554_FLASH_STEP); + LM3554_FLASH_STEP); return 0; } @@ -318,7 +318,7 @@ static int lm3554_g_torch_intensity(struct v4l2_subdev *sd, s32 *val) struct lm3554 *flash = to_lm3554(sd); *val = LM3554_VALUE_TO_PERCENT((u32)flash->torch_current, - LM3554_TORCH_STEP); + LM3554_TORCH_STEP); return 0; } @@ -340,7 +340,7 @@ static int lm3554_g_indicator_intensity(struct v4l2_subdev *sd, s32 *val) struct lm3554 *flash = to_lm3554(sd); *val = LM3554_VALUE_TO_PERCENT((u32)flash->indicator_current, - LM3554_INDICATOR_STEP); + LM3554_INDICATOR_STEP); return 0; } @@ -494,94 +494,94 @@ static const struct v4l2_ctrl_ops ctrl_ops = { static const struct v4l2_ctrl_config lm3554_controls[] = { { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_TIMEOUT, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Flash Timeout", - .min = 0x0, - .max = LM3554_MAX_TIMEOUT, - .step = 0x01, - .def = LM3554_DEFAULT_TIMEOUT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_TIMEOUT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Timeout", + .min = 0x0, + .max = LM3554_MAX_TIMEOUT, + .step = 0x01, + .def = LM3554_DEFAULT_TIMEOUT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_INTENSITY, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Flash Intensity", - .min = LM3554_MIN_PERCENT, - .max = LM3554_MAX_PERCENT, - .step = 0x01, - .def = LM3554_FLASH_DEFAULT_BRIGHTNESS, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_FLASH_DEFAULT_BRIGHTNESS, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_TORCH_INTENSITY, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Torch Intensity", - .min = LM3554_MIN_PERCENT, - .max = LM3554_MAX_PERCENT, - .step = 0x01, - .def = LM3554_TORCH_DEFAULT_BRIGHTNESS, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_TORCH_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Torch Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_TORCH_DEFAULT_BRIGHTNESS, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_INDICATOR_INTENSITY, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Indicator Intensity", - .min = LM3554_MIN_PERCENT, - .max = LM3554_MAX_PERCENT, - .step = 0x01, - .def = LM3554_INDICATOR_DEFAULT_BRIGHTNESS, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_INDICATOR_INTENSITY, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Indicator Intensity", + .min = LM3554_MIN_PERCENT, + .max = LM3554_MAX_PERCENT, + .step = 0x01, + .def = LM3554_INDICATOR_DEFAULT_BRIGHTNESS, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_STROBE, - .type = V4L2_CTRL_TYPE_BOOLEAN, - .name = "Flash Strobe", - .min = 0, - .max = 1, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STROBE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flash Strobe", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_MODE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Flash Mode", - .min = 0, - .max = 100, - .step = 1, - .def = ATOMISP_FLASH_MODE_OFF, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_MODE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Mode", + .min = 0, + .max = 100, + .step = 1, + .def = ATOMISP_FLASH_MODE_OFF, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_STATUS, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Flash Status", - .min = ATOMISP_FLASH_STATUS_OK, - .max = ATOMISP_FLASH_STATUS_TIMEOUT, - .step = 1, - .def = ATOMISP_FLASH_STATUS_OK, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STATUS, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Status", + .min = ATOMISP_FLASH_STATUS_OK, + .max = ATOMISP_FLASH_STATUS_TIMEOUT, + .step = 1, + .def = ATOMISP_FLASH_STATUS_OK, + .flags = 0, + }, #ifndef CSS15 { - .ops = &ctrl_ops, - .id = V4L2_CID_FLASH_STATUS_REGISTER, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Flash Status Register", - .min = 0, - .max = 255, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FLASH_STATUS_REGISTER, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Flash Status Register", + .min = 0, + .max = 255, + .step = 1, + .def = 0, + .flags = 0, + }, #endif }; @@ -825,17 +825,17 @@ static void *lm3554_platform_data_func(struct i2c_client *client) static struct lm3554_platform_data platform_data; platform_data.gpio_reset = - desc_to_gpio(gpiod_get_index(&client->dev, - NULL, 2, GPIOD_OUT_LOW)); + desc_to_gpio(gpiod_get_index(&client->dev, + NULL, 2, GPIOD_OUT_LOW)); platform_data.gpio_strobe = - desc_to_gpio(gpiod_get_index(&client->dev, - NULL, 0, GPIOD_OUT_LOW)); + desc_to_gpio(gpiod_get_index(&client->dev, + NULL, 0, GPIOD_OUT_LOW)); platform_data.gpio_torch = - desc_to_gpio(gpiod_get_index(&client->dev, - NULL, 1, GPIOD_OUT_LOW)); + desc_to_gpio(gpiod_get_index(&client->dev, + NULL, 1, GPIOD_OUT_LOW)); dev_info(&client->dev, "camera pdata: lm3554: reset: %d strobe %d torch %d\n", - platform_data.gpio_reset, platform_data.gpio_strobe, - platform_data.gpio_torch); + platform_data.gpio_reset, platform_data.gpio_strobe, + platform_data.gpio_torch); /* Set to TX2 mode, then ENVM/TX2 pin is a power amplifier sync input: * ENVM/TX pin asserted, flash forced into torch; diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c index 56e5ac0c5fa8f..7f8a2b9a4c694 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -62,7 +62,7 @@ mt9m114_read_reg(struct i2c_client *client, u16 data_length, u32 reg, u32 *val) } if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT - && data_length != MISENSOR_32BIT) { + && data_length != MISENSOR_32BIT) { v4l2_err(client, "%s error, invalid data length\n", __func__); return -EINVAL; } @@ -92,7 +92,7 @@ mt9m114_read_reg(struct i2c_client *client, u16 data_length, u32 reg, u32 *val) *val = data[1] + (data[0] << 8); else *val = data[3] + (data[2] << 8) + - (data[1] << 16) + (data[0] << 24); + (data[1] << 16) + (data[0] << 24); return 0; } @@ -116,7 +116,7 @@ mt9m114_write_reg(struct i2c_client *client, u16 data_length, u16 reg, u32 val) } if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT - && data_length != MISENSOR_32BIT) { + && data_length != MISENSOR_32BIT) { v4l2_err(client, "%s error, invalid data_length\n", __func__); return -EINVAL; } @@ -183,7 +183,7 @@ mt9m114_write_reg(struct i2c_client *client, u16 data_length, u16 reg, u32 val) */ static int misensor_rmw_reg(struct i2c_client *client, u16 data_length, u16 reg, - u32 mask, u32 set) + u32 mask, u32 set) { int err; u32 val; @@ -346,8 +346,8 @@ __mt9m114_write_reg_is_consecutive(struct i2c_client *client, * */ static int mt9m114_write_reg_array(struct i2c_client *client, - const struct misensor_reg *reglist, - int poll) + const struct misensor_reg *reglist, + int poll) { const struct misensor_reg *next = reglist; struct mt9m114_write_ctrl ctrl; @@ -372,7 +372,7 @@ static int mt9m114_write_reg_array(struct i2c_client *client, err = __mt9m114_flush_reg_array(client, &ctrl); err |= misensor_rmw_reg(client, next->length & - ~MISENSOR_TOK_RMW, + ~MISENSOR_TOK_RMW, next->reg, next->val, next->val2); if (err) { @@ -434,7 +434,7 @@ static int mt9m114_set_suspend(struct v4l2_subdev *sd) struct i2c_client *client = v4l2_get_subdevdata(sd); return mt9m114_write_reg_array(client, - mt9m114_standby_reg, POST_POLLING); + mt9m114_standby_reg, POST_POLLING); } static int mt9m114_init_common(struct v4l2_subdev *sd) @@ -639,7 +639,7 @@ static int mt9m114_try_res(u32 *w, u32 *h) int idx = 0; if ((*w > MT9M114_RES_960P_SIZE_H) - || (*h > MT9M114_RES_960P_SIZE_V)) { + || (*h > MT9M114_RES_960P_SIZE_V)) { *w = MT9M114_RES_960P_SIZE_H; *h = MT9M114_RES_960P_SIZE_V; } else { @@ -712,8 +712,8 @@ static int mt9m114_res2size(struct v4l2_subdev *sd, int *h_size, int *v_size) } static int mt9m114_get_intg_factor(struct i2c_client *client, - struct camera_mipi_info *info, - const struct mt9m114_res_struct *res) + struct camera_mipi_info *info, + const struct mt9m114_res_struct *res) { struct atomisp_sensor_mode_data *buf = &info->data; u32 reg_val; @@ -723,7 +723,7 @@ static int mt9m114_get_intg_factor(struct i2c_client *client, return -EINVAL; ret = mt9m114_read_reg(client, MISENSOR_32BIT, - REG_PIXEL_CLK, ®_val); + REG_PIXEL_CLK, ®_val); if (ret) return ret; buf->vt_pix_clk_freq_mhz = reg_val; @@ -731,11 +731,11 @@ static int mt9m114_get_intg_factor(struct i2c_client *client, /* get integration time */ buf->coarse_integration_time_min = MT9M114_COARSE_INTG_TIME_MIN; buf->coarse_integration_time_max_margin = - MT9M114_COARSE_INTG_TIME_MAX_MARGIN; + MT9M114_COARSE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_min = MT9M114_FINE_INTG_TIME_MIN; buf->fine_integration_time_max_margin = - MT9M114_FINE_INTG_TIME_MAX_MARGIN; + MT9M114_FINE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_def = MT9M114_FINE_INTG_TIME_MIN; @@ -745,63 +745,63 @@ static int mt9m114_get_intg_factor(struct i2c_client *client, /* get the cropping and output resolution to ISP for this mode. */ ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_H_START, ®_val); + REG_H_START, ®_val); if (ret) return ret; buf->crop_horizontal_start = reg_val; ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_V_START, ®_val); + REG_V_START, ®_val); if (ret) return ret; buf->crop_vertical_start = reg_val; ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_H_END, ®_val); + REG_H_END, ®_val); if (ret) return ret; buf->crop_horizontal_end = reg_val; ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_V_END, ®_val); + REG_V_END, ®_val); if (ret) return ret; buf->crop_vertical_end = reg_val; ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_WIDTH, ®_val); + REG_WIDTH, ®_val); if (ret) return ret; buf->output_width = reg_val; ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_HEIGHT, ®_val); + REG_HEIGHT, ®_val); if (ret) return ret; buf->output_height = reg_val; ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_TIMING_HTS, ®_val); + REG_TIMING_HTS, ®_val); if (ret) return ret; buf->line_length_pck = reg_val; ret = mt9m114_read_reg(client, MISENSOR_16BIT, - REG_TIMING_VTS, ®_val); + REG_TIMING_VTS, ®_val); if (ret) return ret; buf->frame_length_lines = reg_val; buf->binning_factor_x = res->bin_factor_x ? - res->bin_factor_x : 1; + res->bin_factor_x : 1; buf->binning_factor_y = res->bin_factor_y ? - res->bin_factor_y : 1; + res->bin_factor_y : 1; return 0; } static int mt9m114_get_fmt(struct v4l2_subdev *sd, - struct v4l2_subdev_pad_config *cfg, - struct v4l2_subdev_format *format) + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) { struct v4l2_mbus_framefmt *fmt = &format->format; int width, height; @@ -860,18 +860,18 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, case MT9M114_RES_736P: ret = mt9m114_write_reg_array(c, mt9m114_736P_init, NO_POLLING); ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, - MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); break; case MT9M114_RES_864P: ret = mt9m114_write_reg_array(c, mt9m114_864P_init, NO_POLLING); ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, - MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); break; case MT9M114_RES_960P: ret = mt9m114_write_reg_array(c, mt9m114_976P_init, NO_POLLING); /* set sensor read_mode to Normal */ ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE, - MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); + MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET); break; default: v4l2_err(sd, "set resolution: %d failed!\n", res_index->res); @@ -920,7 +920,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd, } } ret = mt9m114_get_intg_factor(c, mt9m114_info, - &mt9m114_res[res_index->res]); + &mt9m114_res[res_index->res]); if (ret) { dev_err(&c->dev, "failed to get integration_factor\n"); return -EINVAL; @@ -954,8 +954,8 @@ static int mt9m114_g_fnumber(struct v4l2_subdev *sd, s32 *val) static int mt9m114_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) { *val = (MT9M114_F_NUMBER_DEFAULT_NUM << 24) | - (MT9M114_F_NUMBER_DEM << 16) | - (MT9M114_F_NUMBER_DEFAULT_NUM << 8) | MT9M114_F_NUMBER_DEM; + (MT9M114_F_NUMBER_DEM << 16) | + (MT9M114_F_NUMBER_DEFAULT_NUM << 8) | MT9M114_F_NUMBER_DEM; return 0; } @@ -967,7 +967,7 @@ static int mt9m114_g_hflip(struct v4l2_subdev *sd, s32 *val) u32 data; ret = mt9m114_read_reg(c, MISENSOR_16BIT, - (u32)MISENSOR_READ_MODE, &data); + (u32)MISENSOR_READ_MODE, &data); if (ret) return ret; *val = !!(data & MISENSOR_HFLIP_MASK); @@ -982,7 +982,7 @@ static int mt9m114_g_vflip(struct v4l2_subdev *sd, s32 *val) u32 data; ret = mt9m114_read_reg(c, MISENSOR_16BIT, - (u32)MISENSOR_READ_MODE, &data); + (u32)MISENSOR_READ_MODE, &data); if (ret) return ret; *val = !!(data & MISENSOR_VFLIP_MASK); @@ -1003,8 +1003,8 @@ static long mt9m114_s_exposure(struct v4l2_subdev *sd, u32 AnalogGainToWrite = 0; dev_dbg(&client->dev, "%s(0x%X 0x%X 0x%X)\n", __func__, - exposure->integration_time[0], exposure->gain[0], - exposure->gain[1]); + exposure->integration_time[0], exposure->gain[0], + exposure->gain[1]); coarse_integration = exposure->integration_time[0]; /* fine_integration = ExposureTime.FineIntegrationTime; */ @@ -1036,7 +1036,7 @@ static long mt9m114_s_exposure(struct v4l2_subdev *sd, /* 3A provide real exposure time. should not translate to any value here. */ ret = mt9m114_write_reg(client, MISENSOR_16BIT, - REG_EXPO_COARSE, (u16)(coarse_integration)); + REG_EXPO_COARSE, (u16)(coarse_integration)); if (ret) { v4l2_err(client, "%s: fail to set exposure time\n", __func__); return -EINVAL; @@ -1072,10 +1072,10 @@ static long mt9m114_s_exposure(struct v4l2_subdev *sd, (u16)((DigitalGain << 12) | AnalogGainToWrite); */ AnalogGainToWrite = (u16)((DigitalGain << 12) | (u16)AnalogGain); ret = mt9m114_write_reg(client, MISENSOR_16BIT, - REG_GAIN, AnalogGainToWrite); + REG_GAIN, AnalogGainToWrite); if (ret) { v4l2_err(client, "%s: fail to set AnalogGainToWrite\n", - __func__); + __func__); return -EINVAL; } @@ -1135,7 +1135,7 @@ static int mt9m114_s_exposure_metering(struct v4l2_subdev *sd, s32 val) switch (val) { case V4L2_EXPOSURE_METERING_SPOT: ret = mt9m114_write_reg_array(client, mt9m114_exp_average, - NO_POLLING); + NO_POLLING); if (ret) { dev_err(&client->dev, "write exp_average reg err.\n"); return ret; @@ -1144,7 +1144,7 @@ static int mt9m114_s_exposure_metering(struct v4l2_subdev *sd, s32 val) case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED: default: ret = mt9m114_write_reg_array(client, mt9m114_exp_center, - NO_POLLING); + NO_POLLING); if (ret) { dev_err(&client->dev, "write exp_default reg err"); return ret; @@ -1309,7 +1309,7 @@ static int mt9m114_g_3a_lock(struct v4l2_subdev *sd, s32 *val) { if (aaalock) return V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE - | V4L2_LOCK_FOCUS; + | V4L2_LOCK_FOCUS; return 0; } @@ -1404,137 +1404,137 @@ static const struct v4l2_ctrl_ops ctrl_ops = { static struct v4l2_ctrl_config mt9m114_controls[] = { { - .ops = &ctrl_ops, - .id = V4L2_CID_VFLIP, - .name = "Image v-Flip", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = 0, - .max = 1, - .step = 1, - .def = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .name = "Image v-Flip", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_HFLIP, - .name = "Image h-Flip", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = 0, - .max = 1, - .step = 1, - .def = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .name = "Image h-Flip", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCAL_ABSOLUTE, - .name = "focal length", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = MT9M114_FOCAL_LENGTH_DEFAULT, - .max = MT9M114_FOCAL_LENGTH_DEFAULT, - .step = 1, - .def = MT9M114_FOCAL_LENGTH_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .name = "focal length", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_FOCAL_LENGTH_DEFAULT, + .max = MT9M114_FOCAL_LENGTH_DEFAULT, + .step = 1, + .def = MT9M114_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_ABSOLUTE, - .name = "f-number", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = MT9M114_F_NUMBER_DEFAULT, - .max = MT9M114_F_NUMBER_DEFAULT, - .step = 1, - .def = MT9M114_F_NUMBER_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .name = "f-number", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_F_NUMBER_DEFAULT, + .max = MT9M114_F_NUMBER_DEFAULT, + .step = 1, + .def = MT9M114_F_NUMBER_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_RANGE, - .name = "f-number range", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = MT9M114_F_NUMBER_RANGE, - .max = MT9M114_F_NUMBER_RANGE, - .step = 1, - .def = MT9M114_F_NUMBER_RANGE, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .name = "f-number range", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = MT9M114_F_NUMBER_RANGE, + .max = MT9M114_F_NUMBER_RANGE, + .step = 1, + .def = MT9M114_F_NUMBER_RANGE, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_ABSOLUTE, - .name = "exposure", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = 0, - .max = 0xffff, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .name = "exposure", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 0xffff, + .step = 1, + .def = 0, + .flags = 0, + }, #ifndef CSS15 { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_ZONE_NUM, - .name = "one-time exposure zone number", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = 0, - .max = 0xffff, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ZONE_NUM, + .name = "one-time exposure zone number", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = 0xffff, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_METERING, - .name = "metering", - .type = V4L2_CTRL_TYPE_MENU, - .min = 0, - .max = 3, - .step = 0, - .def = 1, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_METERING, + .name = "metering", + .type = V4L2_CTRL_TYPE_MENU, + .min = 0, + .max = 3, + .step = 0, + .def = 1, + .flags = 0, + }, #endif { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_HORZ, - .name = "horizontal binning factor", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = 0, - .max = MT9M114_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .name = "horizontal binning factor", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = MT9M114_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_VERT, - .name = "vertical binning factor", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = 0, - .max = MT9M114_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .name = "vertical binning factor", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 0, + .max = MT9M114_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE, - .name = "exposure biasx", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = -2, - .max = 2, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE, + .name = "exposure biasx", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = -2, + .max = 2, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_3A_LOCK, - .name = "3a lock", - .type = V4L2_CTRL_TYPE_BITMASK, - .min = 0, - .max = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE | V4L2_LOCK_FOCUS, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_3A_LOCK, + .name = "3a lock", + .type = V4L2_CTRL_TYPE_BITMASK, + .min = 0, + .max = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE | V4L2_LOCK_FOCUS, + .step = 1, + .def = 0, + .flags = 0, + }, }; static int mt9m114_detect(struct mt9m114_device *dev, struct i2c_client *client) @@ -1686,7 +1686,7 @@ static int mt9m114_t_vflip(struct v4l2_subdev *sd, int value) } static int mt9m114_g_frame_interval(struct v4l2_subdev *sd, - struct v4l2_subdev_frame_interval *interval) + struct v4l2_subdev_frame_interval *interval) { struct mt9m114_device *dev = to_mt9m114_sensor(sd); @@ -1705,7 +1705,7 @@ static int mt9m114_s_stream(struct v4l2_subdev *sd, int enable) if (enable) { ret = mt9m114_write_reg_array(c, mt9m114_chgstat_reg, - POST_POLLING); + POST_POLLING); if (ret < 0) return ret; diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 89169da512346..cb8989e351672 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -58,7 +58,7 @@ static int ov2680_read_reg(struct i2c_client *client, } if (data_length != OV2680_8BIT && data_length != OV2680_16BIT - && data_length != OV2680_32BIT) { + && data_length != OV2680_32BIT) { dev_err(&client->dev, "%s error, invalid data length\n", __func__); return -EINVAL; @@ -117,7 +117,7 @@ static int ov2680_i2c_write(struct i2c_client *client, u16 len, u8 *data) } static int ov2680_write_reg(struct i2c_client *client, u16 data_length, - u16 reg, u16 val) + u16 reg, u16 val) { int ret; unsigned char data[4] = {0}; @@ -220,8 +220,8 @@ static int __ov2680_buf_reg_array(struct i2c_client *client, } static int __ov2680_write_reg_is_consecutive(struct i2c_client *client, - struct ov2680_write_ctrl *ctrl, - const struct ov2680_reg *next) + struct ov2680_write_ctrl *ctrl, + const struct ov2680_reg *next) { if (ctrl->index == 0) return 1; @@ -251,9 +251,10 @@ static int ov2680_write_reg_array(struct i2c_client *client, * If next address is not consecutive, data needs to be * flushed before proceed. */ - dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg, next->val); + dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg, + next->val); if (!__ov2680_write_reg_is_consecutive(client, &ctrl, - next)) { + next)) { err = __ov2680_flush_reg_array(client, &ctrl); if (err) return err; @@ -261,7 +262,7 @@ static int ov2680_write_reg_array(struct i2c_client *client, err = __ov2680_buf_reg_array(client, &ctrl, next); if (err) { dev_err(&client->dev, "%s: write error, aborted\n", - __func__); + __func__); return err; } break; @@ -288,8 +289,8 @@ static int ov2680_g_fnumber(struct v4l2_subdev *sd, s32 *val) static int ov2680_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) { *val = (OV2680_F_NUMBER_DEFAULT_NUM << 24) | - (OV2680_F_NUMBER_DEM << 16) | - (OV2680_F_NUMBER_DEFAULT_NUM << 8) | OV2680_F_NUMBER_DEM; + (OV2680_F_NUMBER_DEM << 16) | + (OV2680_F_NUMBER_DEFAULT_NUM << 8) | OV2680_F_NUMBER_DEM; return 0; } @@ -315,8 +316,8 @@ static int ov2680_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) } static int ov2680_get_intg_factor(struct i2c_client *client, - struct camera_mipi_info *info, - const struct ov2680_resolution *res) + struct camera_mipi_info *info, + const struct ov2680_resolution *res) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct ov2680_device *dev = to_ov2680_sensor(sd); @@ -338,11 +339,11 @@ static int ov2680_get_intg_factor(struct i2c_client *client, /* get integration time */ buf->coarse_integration_time_min = OV2680_COARSE_INTG_TIME_MIN; buf->coarse_integration_time_max_margin = - OV2680_COARSE_INTG_TIME_MAX_MARGIN; + OV2680_COARSE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_min = OV2680_FINE_INTG_TIME_MIN; buf->fine_integration_time_max_margin = - OV2680_FINE_INTG_TIME_MAX_MARGIN; + OV2680_FINE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_def = OV2680_FINE_INTG_TIME_MIN; buf->frame_length_lines = res->lines_per_frame; @@ -351,50 +352,50 @@ static int ov2680_get_intg_factor(struct i2c_client *client, /* get the cropping and output resolution to ISP for this mode. */ ret = ov2680_read_reg(client, OV2680_16BIT, - OV2680_HORIZONTAL_START_H, ®_val); + OV2680_HORIZONTAL_START_H, ®_val); if (ret) return ret; buf->crop_horizontal_start = reg_val; ret = ov2680_read_reg(client, OV2680_16BIT, - OV2680_VERTICAL_START_H, ®_val); + OV2680_VERTICAL_START_H, ®_val); if (ret) return ret; buf->crop_vertical_start = reg_val; ret = ov2680_read_reg(client, OV2680_16BIT, - OV2680_HORIZONTAL_END_H, ®_val); + OV2680_HORIZONTAL_END_H, ®_val); if (ret) return ret; buf->crop_horizontal_end = reg_val; ret = ov2680_read_reg(client, OV2680_16BIT, - OV2680_VERTICAL_END_H, ®_val); + OV2680_VERTICAL_END_H, ®_val); if (ret) return ret; buf->crop_vertical_end = reg_val; ret = ov2680_read_reg(client, OV2680_16BIT, - OV2680_HORIZONTAL_OUTPUT_SIZE_H, ®_val); + OV2680_HORIZONTAL_OUTPUT_SIZE_H, ®_val); if (ret) return ret; buf->output_width = reg_val; ret = ov2680_read_reg(client, OV2680_16BIT, - OV2680_VERTICAL_OUTPUT_SIZE_H, ®_val); + OV2680_VERTICAL_OUTPUT_SIZE_H, ®_val); if (ret) return ret; buf->output_height = reg_val; buf->binning_factor_x = res->bin_factor_x ? - (res->bin_factor_x * 2) : 1; + (res->bin_factor_x * 2) : 1; buf->binning_factor_y = res->bin_factor_y ? - (res->bin_factor_y * 2) : 1; + (res->bin_factor_y * 2) : 1; return 0; } static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, - int gain, int digitgain) + int gain, int digitgain) { struct i2c_client *client = v4l2_get_subdevdata(sd); @@ -410,7 +411,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* group hold */ ret = ov2680_write_reg(client, OV2680_8BIT, - OV2680_GROUP_ACCESS, 0x00); + OV2680_GROUP_ACCESS, 0x00); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV2680_GROUP_ACCESS); @@ -466,7 +467,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* Digital gain */ if (digitgain) { ret = ov2680_write_reg(client, OV2680_16BIT, - OV2680_MWB_RED_GAIN_H, digitgain); + OV2680_MWB_RED_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV2680_MWB_RED_GAIN_H); @@ -474,7 +475,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov2680_write_reg(client, OV2680_16BIT, - OV2680_MWB_GREEN_GAIN_H, digitgain); + OV2680_MWB_GREEN_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV2680_MWB_RED_GAIN_H); @@ -482,7 +483,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov2680_write_reg(client, OV2680_16BIT, - OV2680_MWB_BLUE_GAIN_H, digitgain); + OV2680_MWB_BLUE_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV2680_MWB_RED_GAIN_H); @@ -498,14 +499,14 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* Delay launch group */ ret = ov2680_write_reg(client, OV2680_8BIT, - OV2680_GROUP_ACCESS, 0xa0); + OV2680_GROUP_ACCESS, 0xa0); if (ret) return ret; return ret; } static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure, - int gain, int digitgain) + int gain, int digitgain) { struct ov2680_device *dev = to_ov2680_sensor(sd); int ret; @@ -518,7 +519,7 @@ static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure, } static long ov2680_s_exposure(struct v4l2_subdev *sd, - struct atomisp_exposure *exposure) + struct atomisp_exposure *exposure) { u16 coarse_itg = exposure->integration_time[0]; u16 analog_gain = exposure->gain[0]; @@ -559,21 +560,21 @@ static int ov2680_q_exposure(struct v4l2_subdev *sd, s32 *value) /* get exposure */ ret = ov2680_read_reg(client, OV2680_8BIT, - OV2680_EXPOSURE_L, - ®_v); + OV2680_EXPOSURE_L, + ®_v); if (ret) goto err; ret = ov2680_read_reg(client, OV2680_8BIT, - OV2680_EXPOSURE_M, - ®_v2); + OV2680_EXPOSURE_M, + ®_v2); if (ret) goto err; reg_v += reg_v2 << 8; ret = ov2680_read_reg(client, OV2680_8BIT, - OV2680_EXPOSURE_H, - ®_v2); + OV2680_EXPOSURE_H, + ®_v2); if (ret) goto err; @@ -616,15 +617,16 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; } ret = ov2680_write_reg(client, OV2680_8BIT, - OV2680_FLIP_REG, val); + OV2680_FLIP_REG, val); if (ret) return ret; - index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : 0); + index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : + 0); ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; dev->format.code = ov2680_translate_bayer_order( - ov2680_info->raw_bayer_order); + ov2680_info->raw_bayer_order); } return ret; } @@ -649,15 +651,16 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; } ret = ov2680_write_reg(client, OV2680_8BIT, - OV2680_MIRROR_REG, val); + OV2680_MIRROR_REG, val); if (ret) return ret; - index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : 0); + index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : + 0); ov2680_info = v4l2_get_subdev_hostdata(sd); if (ov2680_info) { ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index]; dev->format.code = ov2680_translate_bayer_order( - ov2680_info->raw_bayer_order); + ov2680_info->raw_bayer_order); } return ret; } @@ -725,91 +728,91 @@ static const struct v4l2_ctrl_ops ctrl_ops = { static const struct v4l2_ctrl_config ov2680_controls[] = { { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "exposure", - .min = 0x0, - .max = 0xffff, - .step = 0x01, - .def = 0x00, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCAL_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focal length", - .min = OV2680_FOCAL_LENGTH_DEFAULT, - .max = OV2680_FOCAL_LENGTH_DEFAULT, - .step = 0x01, - .def = OV2680_FOCAL_LENGTH_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV2680_FOCAL_LENGTH_DEFAULT, + .max = OV2680_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV2680_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number", - .min = OV2680_F_NUMBER_DEFAULT, - .max = OV2680_F_NUMBER_DEFAULT, - .step = 0x01, - .def = OV2680_F_NUMBER_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV2680_F_NUMBER_DEFAULT, + .max = OV2680_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV2680_F_NUMBER_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_RANGE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number range", - .min = OV2680_F_NUMBER_RANGE, - .max = OV2680_F_NUMBER_RANGE, - .step = 0x01, - .def = OV2680_F_NUMBER_RANGE, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV2680_F_NUMBER_RANGE, + .max = OV2680_F_NUMBER_RANGE, + .step = 0x01, + .def = OV2680_F_NUMBER_RANGE, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_HORZ, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "horizontal binning factor", - .min = 0, - .max = OV2680_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = OV2680_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_VERT, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "vertical binning factor", - .min = 0, - .max = OV2680_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = OV2680_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_VFLIP, - .type = V4L2_CTRL_TYPE_BOOLEAN, - .name = "Flip", - .min = 0, - .max = 1, - .step = 1, - .def = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_VFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Flip", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_HFLIP, - .type = V4L2_CTRL_TYPE_BOOLEAN, - .name = "Mirror", - .min = 0, - .max = 1, - .step = 1, - .def = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_HFLIP, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .name = "Mirror", + .min = 0, + .max = 1, + .step = 1, + .def = 0, + }, }; static int ov2680_init_registers(struct v4l2_subdev *sd) @@ -1009,7 +1012,7 @@ static int distance(struct ov2680_resolution *res, u32 w, u32 h) match = abs(((w_ratio << 13) / h_ratio) - 8192); if ((w_ratio < 8192) || (h_ratio < 8192) || - (match > LARGEST_ALLOWED_RATIO_MISMATCH)) + (match > LARGEST_ALLOWED_RATIO_MISMATCH)) return -1; return w_ratio + h_ratio; @@ -1091,10 +1094,10 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, cfg->try_fmt = *fmt; mutex_unlock(&dev->input_lock); return 0; - } + } dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); dev_dbg(&client->dev, "+++++get_resolution_index=%d+++++l\n", - dev->fmt_idx); + dev->fmt_idx); if (dev->fmt_idx == -1) { dev_err(&client->dev, "get resolution fail\n"); mutex_unlock(&dev->input_lock); @@ -1103,7 +1106,7 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, v4l2_info(client, "__s_mbus_fmt i=%d, w=%d, h=%d\n", dev->fmt_idx, fmt->width, fmt->height); dev_dbg(&client->dev, "__s_mbus_fmt i=%d, w=%d, h=%d\n", - dev->fmt_idx, fmt->width, fmt->height); + dev->fmt_idx, fmt->width, fmt->height); ret = ov2680_write_reg_array(client, ov2680_res[dev->fmt_idx].regs); if (ret) @@ -1167,13 +1170,13 @@ static int ov2680_detect(struct i2c_client *client) return -ENODEV; ret = ov2680_read_reg(client, OV2680_8BIT, - OV2680_SC_CMMN_CHIP_ID_H, &high); + OV2680_SC_CMMN_CHIP_ID_H, &high); if (ret) { dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); return -ENODEV; } ret = ov2680_read_reg(client, OV2680_8BIT, - OV2680_SC_CMMN_CHIP_ID_L, &low); + OV2680_SC_CMMN_CHIP_ID_L, &low); id = ((((u16)high) << 8) | (u16)low); if (id != OV2680_ID) { @@ -1182,7 +1185,7 @@ static int ov2680_detect(struct i2c_client *client) } ret = ov2680_read_reg(client, OV2680_8BIT, - OV2680_SC_CMMN_SUB_ID, &high); + OV2680_SC_CMMN_SUB_ID, &high); revision = (u8)high & 0x0f; dev_info(&client->dev, "sensor_revision id = 0x%x, rev= %d\n", @@ -1204,8 +1207,8 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) dev_dbg(&client->dev, "ov2680_s_stream off\n"); ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_SW_STREAM, - enable ? OV2680_START_STREAMING : - OV2680_STOP_STREAMING); + enable ? OV2680_START_STREAMING : + OV2680_STOP_STREAMING); #if 0 /* restore settings */ ov2680_res = ov2680_res_preview; @@ -1232,7 +1235,7 @@ static int ov2680_s_config(struct v4l2_subdev *sd, return -ENODEV; dev->platform_data = - (struct camera_sensor_platform_data *)platform_data; + (struct camera_sensor_platform_data *)platform_data; mutex_lock(&dev->input_lock); /* power off the module, then power on it in future @@ -1338,7 +1341,7 @@ static const struct v4l2_subdev_video_ops ov2680_video_ops = { }; static const struct v4l2_subdev_sensor_ops ov2680_sensor_ops = { - .g_skip_frames = ov2680_g_skip_frames, + .g_skip_frames = ov2680_g_skip_frames, }; static const struct v4l2_subdev_core_ops ov2680_core_ops = { @@ -1435,8 +1438,7 @@ static int ov2680_probe(struct i2c_client *client) dev->sd.ctrl_handler = &dev->ctrl_handler; ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); - if (ret) - { + if (ret) { ov2680_remove(client); dev_dbg(&client->dev, "+++ remove ov2680\n"); } diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c index a85bbd02331de..44edd182fbabe 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -49,7 +49,7 @@ static int ov2722_read_reg(struct i2c_client *client, } if (data_length != OV2722_8BIT && data_length != OV2722_16BIT - && data_length != OV2722_32BIT) { + && data_length != OV2722_32BIT) { dev_err(&client->dev, "%s error, invalid data length\n", __func__); return -EINVAL; @@ -108,7 +108,7 @@ static int ov2722_i2c_write(struct i2c_client *client, u16 len, u8 *data) } static int ov2722_write_reg(struct i2c_client *client, u16 data_length, - u16 reg, u16 val) + u16 reg, u16 val) { int ret; unsigned char data[4] = {0}; @@ -211,8 +211,8 @@ static int __ov2722_buf_reg_array(struct i2c_client *client, } static int __ov2722_write_reg_is_consecutive(struct i2c_client *client, - struct ov2722_write_ctrl *ctrl, - const struct ov2722_reg *next) + struct ov2722_write_ctrl *ctrl, + const struct ov2722_reg *next) { if (ctrl->index == 0) return 1; @@ -242,7 +242,7 @@ static int ov2722_write_reg_array(struct i2c_client *client, * flushed before proceed. */ if (!__ov2722_write_reg_is_consecutive(client, &ctrl, - next)) { + next)) { err = __ov2722_flush_reg_array(client, &ctrl); if (err) return err; @@ -250,7 +250,7 @@ static int ov2722_write_reg_array(struct i2c_client *client, err = __ov2722_buf_reg_array(client, &ctrl, next); if (err) { dev_err(&client->dev, "%s: write error, aborted\n", - __func__); + __func__); return err; } break; @@ -276,14 +276,14 @@ static int ov2722_g_fnumber(struct v4l2_subdev *sd, s32 *val) static int ov2722_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) { *val = (OV2722_F_NUMBER_DEFAULT_NUM << 24) | - (OV2722_F_NUMBER_DEM << 16) | - (OV2722_F_NUMBER_DEFAULT_NUM << 8) | OV2722_F_NUMBER_DEM; + (OV2722_F_NUMBER_DEM << 16) | + (OV2722_F_NUMBER_DEFAULT_NUM << 8) | OV2722_F_NUMBER_DEM; return 0; } static int ov2722_get_intg_factor(struct i2c_client *client, - struct camera_mipi_info *info, - const struct ov2722_resolution *res) + struct camera_mipi_info *info, + const struct ov2722_resolution *res) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct ov2722_device *dev = NULL; @@ -304,17 +304,17 @@ static int ov2722_get_intg_factor(struct i2c_client *client, /* pixel clock calculattion */ ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_SC_CMMN_PLL_CTRL3, &pre_pll_clk_div); + OV2722_SC_CMMN_PLL_CTRL3, &pre_pll_clk_div); if (ret) return ret; ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_SC_CMMN_PLL_MULTIPLIER, &pll_multiplier); + OV2722_SC_CMMN_PLL_MULTIPLIER, &pll_multiplier); if (ret) return ret; ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_SC_CMMN_PLL_DEBUG_OPT, &op_pix_clk_div); + OV2722_SC_CMMN_PLL_DEBUG_OPT, &op_pix_clk_div); if (ret) return ret; @@ -325,7 +325,7 @@ static int ov2722_get_intg_factor(struct i2c_client *client, pll_multiplier = pll_multiplier & 0x7f; op_pix_clk_div = op_pix_clk_div & 0x03; pix_clk_freq_hz = ext_clk_freq_hz / pre_pll_clk_div * pll_multiplier - * op_pix_clk_div / pll_invariant_div; + * op_pix_clk_div / pll_invariant_div; dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz; buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz; @@ -333,11 +333,11 @@ static int ov2722_get_intg_factor(struct i2c_client *client, /* get integration time */ buf->coarse_integration_time_min = OV2722_COARSE_INTG_TIME_MIN; buf->coarse_integration_time_max_margin = - OV2722_COARSE_INTG_TIME_MAX_MARGIN; + OV2722_COARSE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_min = OV2722_FINE_INTG_TIME_MIN; buf->fine_integration_time_max_margin = - OV2722_FINE_INTG_TIME_MAX_MARGIN; + OV2722_FINE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_def = OV2722_FINE_INTG_TIME_MIN; buf->frame_length_lines = res->lines_per_frame; @@ -346,50 +346,50 @@ static int ov2722_get_intg_factor(struct i2c_client *client, /* get the cropping and output resolution to ISP for this mode. */ ret = ov2722_read_reg(client, OV2722_16BIT, - OV2722_H_CROP_START_H, ®_val); + OV2722_H_CROP_START_H, ®_val); if (ret) return ret; buf->crop_horizontal_start = reg_val; ret = ov2722_read_reg(client, OV2722_16BIT, - OV2722_V_CROP_START_H, ®_val); + OV2722_V_CROP_START_H, ®_val); if (ret) return ret; buf->crop_vertical_start = reg_val; ret = ov2722_read_reg(client, OV2722_16BIT, - OV2722_H_CROP_END_H, ®_val); + OV2722_H_CROP_END_H, ®_val); if (ret) return ret; buf->crop_horizontal_end = reg_val; ret = ov2722_read_reg(client, OV2722_16BIT, - OV2722_V_CROP_END_H, ®_val); + OV2722_V_CROP_END_H, ®_val); if (ret) return ret; buf->crop_vertical_end = reg_val; ret = ov2722_read_reg(client, OV2722_16BIT, - OV2722_H_OUTSIZE_H, ®_val); + OV2722_H_OUTSIZE_H, ®_val); if (ret) return ret; buf->output_width = reg_val; ret = ov2722_read_reg(client, OV2722_16BIT, - OV2722_V_OUTSIZE_H, ®_val); + OV2722_V_OUTSIZE_H, ®_val); if (ret) return ret; buf->output_height = reg_val; buf->binning_factor_x = res->bin_factor_x ? - res->bin_factor_x : 1; + res->bin_factor_x : 1; buf->binning_factor_y = res->bin_factor_y ? - res->bin_factor_y : 1; + res->bin_factor_y : 1; return 0; } static long __ov2722_set_exposure(struct v4l2_subdev *sd, int coarse_itg, - int gain, int digitgain) + int gain, int digitgain) { struct i2c_client *client = v4l2_get_subdevdata(sd); @@ -414,53 +414,53 @@ static long __ov2722_set_exposure(struct v4l2_subdev *sd, int coarse_itg, digitgain <<= 2; ret = ov2722_write_reg(client, OV2722_16BIT, - OV2722_VTS_H, vts); + OV2722_VTS_H, vts); if (ret) return ret; ret = ov2722_write_reg(client, OV2722_16BIT, - OV2722_HTS_H, hts); + OV2722_HTS_H, hts); if (ret) return ret; /* set exposure */ ret = ov2722_write_reg(client, OV2722_8BIT, - OV2722_AEC_PK_EXPO_L, - coarse_itg & 0xff); + OV2722_AEC_PK_EXPO_L, + coarse_itg & 0xff); if (ret) return ret; ret = ov2722_write_reg(client, OV2722_16BIT, - OV2722_AEC_PK_EXPO_H, - (coarse_itg >> 8) & 0xfff); + OV2722_AEC_PK_EXPO_H, + (coarse_itg >> 8) & 0xfff); if (ret) return ret; /* set analog gain */ ret = ov2722_write_reg(client, OV2722_16BIT, - OV2722_AGC_ADJ_H, gain); + OV2722_AGC_ADJ_H, gain); if (ret) return ret; /* set digital gain */ ret = ov2722_write_reg(client, OV2722_16BIT, - OV2722_MWB_GAIN_R_H, digitgain); + OV2722_MWB_GAIN_R_H, digitgain); if (ret) return ret; ret = ov2722_write_reg(client, OV2722_16BIT, - OV2722_MWB_GAIN_G_H, digitgain); + OV2722_MWB_GAIN_G_H, digitgain); if (ret) return ret; ret = ov2722_write_reg(client, OV2722_16BIT, - OV2722_MWB_GAIN_B_H, digitgain); + OV2722_MWB_GAIN_B_H, digitgain); return ret; } static int ov2722_set_exposure(struct v4l2_subdev *sd, int exposure, - int gain, int digitgain) + int gain, int digitgain) { struct ov2722_device *dev = to_ov2722_sensor(sd); int ret; @@ -473,7 +473,7 @@ static int ov2722_set_exposure(struct v4l2_subdev *sd, int exposure, } static long ov2722_s_exposure(struct v4l2_subdev *sd, - struct atomisp_exposure *exposure) + struct atomisp_exposure *exposure) { int exp = exposure->integration_time[0]; int gain = exposure->gain[0]; @@ -512,21 +512,21 @@ static int ov2722_q_exposure(struct v4l2_subdev *sd, s32 *value) /* get exposure */ ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_AEC_PK_EXPO_L, - ®_v); + OV2722_AEC_PK_EXPO_L, + ®_v); if (ret) goto err; ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_AEC_PK_EXPO_M, - ®_v2); + OV2722_AEC_PK_EXPO_M, + ®_v2); if (ret) goto err; reg_v += reg_v2 << 8; ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_AEC_PK_EXPO_H, - ®_v2); + OV2722_AEC_PK_EXPO_H, + ®_v2); if (ret) goto err; @@ -575,60 +575,60 @@ static const struct v4l2_ctrl_ops ctrl_ops = { static const struct v4l2_ctrl_config ov2722_controls[] = { { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "exposure", - .min = 0x0, - .max = 0xffff, - .step = 0x01, - .def = 0x00, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCAL_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focal length", - .min = OV2722_FOCAL_LENGTH_DEFAULT, - .max = OV2722_FOCAL_LENGTH_DEFAULT, - .step = 0x01, - .def = OV2722_FOCAL_LENGTH_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV2722_FOCAL_LENGTH_DEFAULT, + .max = OV2722_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV2722_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number", - .min = OV2722_F_NUMBER_DEFAULT, - .max = OV2722_F_NUMBER_DEFAULT, - .step = 0x01, - .def = OV2722_F_NUMBER_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV2722_F_NUMBER_DEFAULT, + .max = OV2722_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV2722_F_NUMBER_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_RANGE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number range", - .min = OV2722_F_NUMBER_RANGE, - .max = OV2722_F_NUMBER_RANGE, - .step = 0x01, - .def = OV2722_F_NUMBER_RANGE, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV2722_F_NUMBER_RANGE, + .max = OV2722_F_NUMBER_RANGE, + .step = 0x01, + .def = OV2722_F_NUMBER_RANGE, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_LINK_FREQ, - .name = "Link Frequency", - .type = V4L2_CTRL_TYPE_INTEGER, - .min = 1, - .max = 1500000 * 1000, - .step = 1, - .def = 1, - .flags = V4L2_CTRL_FLAG_VOLATILE | V4L2_CTRL_FLAG_READ_ONLY, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_LINK_FREQ, + .name = "Link Frequency", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 1, + .max = 1500000 * 1000, + .step = 1, + .def = 1, + .flags = V4L2_CTRL_FLAG_VOLATILE | V4L2_CTRL_FLAG_READ_ONLY, + }, }; static int ov2722_init(struct v4l2_subdev *sd) @@ -859,7 +859,7 @@ static int startup(struct v4l2_subdev *sd) int ret = 0; ret = ov2722_write_reg(client, OV2722_8BIT, - OV2722_SW_RESET, 0x01); + OV2722_SW_RESET, 0x01); if (ret) { dev_err(&client->dev, "ov2722 reset err.\n"); return ret; @@ -950,7 +950,7 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd, } ret = ov2722_get_intg_factor(client, ov2722_info, - &ov2722_res[dev->fmt_idx]); + &ov2722_res[dev->fmt_idx]); if (ret) dev_err(&client->dev, "failed to get integration_factor\n"); @@ -990,13 +990,13 @@ static int ov2722_detect(struct i2c_client *client) return -ENODEV; ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_SC_CMMN_CHIP_ID_H, &high); + OV2722_SC_CMMN_CHIP_ID_H, &high); if (ret) { dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); return -ENODEV; } ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_SC_CMMN_CHIP_ID_L, &low); + OV2722_SC_CMMN_CHIP_ID_L, &low); id = (high << 8) | low; if ((id != OV2722_ID) && (id != OV2720_ID)) { @@ -1005,7 +1005,7 @@ static int ov2722_detect(struct i2c_client *client) } ret = ov2722_read_reg(client, OV2722_8BIT, - OV2722_SC_CMMN_SUB_ID, &high); + OV2722_SC_CMMN_SUB_ID, &high); revision = (u8)high & 0x0f; dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); @@ -1022,8 +1022,8 @@ static int ov2722_s_stream(struct v4l2_subdev *sd, int enable) mutex_lock(&dev->input_lock); ret = ov2722_write_reg(client, OV2722_8BIT, OV2722_SW_STREAM, - enable ? OV2722_START_STREAMING : - OV2722_STOP_STREAMING); + enable ? OV2722_START_STREAMING : + OV2722_STOP_STREAMING); mutex_unlock(&dev->input_lock); return ret; @@ -1040,7 +1040,7 @@ static int ov2722_s_config(struct v4l2_subdev *sd, return -ENODEV; dev->platform_data = - (struct camera_sensor_platform_data *)platform_data; + (struct camera_sensor_platform_data *)platform_data; mutex_lock(&dev->input_lock); diff --git a/drivers/staging/media/atomisp/i2c/mt9m114.h b/drivers/staging/media/atomisp/i2c/mt9m114.h index 4283447fd76f1..172cec0bb3986 100644 --- a/drivers/staging/media/atomisp/i2c/mt9m114.h +++ b/drivers/staging/media/atomisp/i2c/mt9m114.h @@ -341,52 +341,52 @@ struct mt9m114_write_ctrl { */ static struct mt9m114_res_struct mt9m114_res[] = { { - .desc = "720P", - .res = MT9M114_RES_736P, - .width = 1296, - .height = 736, - .fps = 30, - .used = false, - .regs = NULL, - .skip_frames = 1, - - .pixels_per_line = 0x0640, - .lines_per_frame = 0x0307, - .bin_factor_x = 1, - .bin_factor_y = 1, - .bin_mode = 0, + .desc = "720P", + .res = MT9M114_RES_736P, + .width = 1296, + .height = 736, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0640, + .lines_per_frame = 0x0307, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, }, { - .desc = "848P", - .res = MT9M114_RES_864P, - .width = 1296, - .height = 864, - .fps = 30, - .used = false, - .regs = NULL, - .skip_frames = 1, - - .pixels_per_line = 0x0640, - .lines_per_frame = 0x03E8, - .bin_factor_x = 1, - .bin_factor_y = 1, - .bin_mode = 0, + .desc = "848P", + .res = MT9M114_RES_864P, + .width = 1296, + .height = 864, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0640, + .lines_per_frame = 0x03E8, + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, }, { - .desc = "960P", - .res = MT9M114_RES_960P, - .width = 1296, - .height = 976, - .fps = 30, - .used = false, - .regs = NULL, - .skip_frames = 1, - - .pixels_per_line = 0x0644, /* consistent with regs arrays */ - .lines_per_frame = 0x03E5, /* consistent with regs arrays */ - .bin_factor_x = 1, - .bin_factor_y = 1, - .bin_mode = 0, + .desc = "960P", + .res = MT9M114_RES_960P, + .width = 1296, + .height = 976, + .fps = 30, + .used = false, + .regs = NULL, + .skip_frames = 1, + + .pixels_per_line = 0x0644, /* consistent with regs arrays */ + .lines_per_frame = 0x03E5, /* consistent with regs arrays */ + .bin_factor_x = 1, + .bin_factor_y = 1, + .bin_mode = 0, }, }; @@ -500,33 +500,33 @@ static struct misensor_reg const mt9m114_exp_center[] = { #if 0 /* Currently unused */ static struct misensor_reg const mt9m114_suspend[] = { - {MISENSOR_16BIT, 0x098E, 0xDC00}, - {MISENSOR_8BIT, 0xDC00, 0x40}, - {MISENSOR_16BIT, 0x0080, 0x8002}, - {MISENSOR_TOK_TERM, 0, 0} + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x40}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} }; static struct misensor_reg const mt9m114_streaming[] = { - {MISENSOR_16BIT, 0x098E, 0xDC00}, - {MISENSOR_8BIT, 0xDC00, 0x34}, - {MISENSOR_16BIT, 0x0080, 0x8002}, - {MISENSOR_TOK_TERM, 0, 0} + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x34}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} }; #endif static struct misensor_reg const mt9m114_standby_reg[] = { - {MISENSOR_16BIT, 0x098E, 0xDC00}, - {MISENSOR_8BIT, 0xDC00, 0x50}, - {MISENSOR_16BIT, 0x0080, 0x8002}, - {MISENSOR_TOK_TERM, 0, 0} + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x50}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} }; #if 0 /* Currently unused */ static struct misensor_reg const mt9m114_wakeup_reg[] = { - {MISENSOR_16BIT, 0x098E, 0xDC00}, - {MISENSOR_8BIT, 0xDC00, 0x54}, - {MISENSOR_16BIT, 0x0080, 0x8002}, - {MISENSOR_TOK_TERM, 0, 0} + {MISENSOR_16BIT, 0x098E, 0xDC00}, + {MISENSOR_8BIT, 0xDC00, 0x54}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} }; #endif @@ -590,7 +590,7 @@ static struct misensor_reg const mt9m114_976P_init[] = { {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */ /* cam_sensor_cfg_fine_integ_time_min = 219 */ {MISENSOR_16BIT, 0xC80E, 0x00DB}, - /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */ + /* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */ {MISENSOR_16BIT, 0xC810, 0x05B3}, /* 0x074C //cam_sensor_cfg_frame_length_lines = 1006 */ {MISENSOR_16BIT, 0xC812, 0x03E5}, @@ -800,19 +800,19 @@ static struct misensor_reg const mt9m114_common[] = { #if 0 /* Currently unused */ static struct misensor_reg const mt9m114_antiflicker_50hz[] = { - {MISENSOR_16BIT, 0x098E, 0xC88B}, - {MISENSOR_8BIT, 0xC88B, 0x32}, - {MISENSOR_8BIT, 0xDC00, 0x28}, - {MISENSOR_16BIT, 0x0080, 0x8002}, - {MISENSOR_TOK_TERM, 0, 0} + {MISENSOR_16BIT, 0x098E, 0xC88B}, + {MISENSOR_8BIT, 0xC88B, 0x32}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} }; static struct misensor_reg const mt9m114_antiflicker_60hz[] = { - {MISENSOR_16BIT, 0x098E, 0xC88B}, - {MISENSOR_8BIT, 0xC88B, 0x3C}, - {MISENSOR_8BIT, 0xDC00, 0x28}, - {MISENSOR_16BIT, 0x0080, 0x8002}, - {MISENSOR_TOK_TERM, 0, 0} + {MISENSOR_16BIT, 0x098E, 0xC88B}, + {MISENSOR_8BIT, 0xC88B, 0x3C}, + {MISENSOR_8BIT, 0xDC00, 0x28}, + {MISENSOR_16BIT, 0x0080, 0x8002}, + {MISENSOR_TOK_TERM, 0, 0} }; static struct misensor_reg const mt9m114_iq[] = { diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h index d216d827e573c..741d0e2e03987 100644 --- a/drivers/staging/media/atomisp/i2c/ov2680.h +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -162,659 +162,659 @@ struct ov2680_format { struct ov2680_reg *regs; }; - /* - * ov2680 device structure. - */ - struct ov2680_device { - struct v4l2_subdev sd; - struct media_pad pad; - struct v4l2_mbus_framefmt format; - struct mutex input_lock; +/* + * ov2680 device structure. + */ +struct ov2680_device { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_mbus_framefmt format; + struct mutex input_lock; struct v4l2_ctrl_handler ctrl_handler; - struct camera_sensor_platform_data *platform_data; - int vt_pix_clk_freq_mhz; - int fmt_idx; - int run_mode; - u8 res; - u8 type; - }; - - enum ov2680_tok_type { - OV2680_8BIT = 0x0001, - OV2680_16BIT = 0x0002, - OV2680_32BIT = 0x0004, - OV2680_TOK_TERM = 0xf000, /* terminating token for reg list */ - OV2680_TOK_DELAY = 0xfe00, /* delay token for reg list */ - OV2680_TOK_MASK = 0xfff0 - }; - - /** - * struct ov2680_reg - MI sensor register format - * @type: type of the register - * @reg: 16-bit offset to register - * @val: 8/16/32-bit register value - * - * Define a structure for sensor register initialization values - */ - struct ov2680_reg { - enum ov2680_tok_type type; - u16 reg; - u32 val; /* @set value for read/mod/write, @mask */ - }; - - #define to_ov2680_sensor(x) container_of(x, struct ov2680_device, sd) - - #define OV2680_MAX_WRITE_BUF_SIZE 30 - - struct ov2680_write_buffer { - u16 addr; - u8 data[OV2680_MAX_WRITE_BUF_SIZE]; - }; - - struct ov2680_write_ctrl { - int index; - struct ov2680_write_buffer buffer; - }; - - static struct ov2680_reg const ov2680_global_setting[] = { - {OV2680_8BIT, 0x0103, 0x01}, - {OV2680_8BIT, 0x3002, 0x00}, - {OV2680_8BIT, 0x3016, 0x1c}, - {OV2680_8BIT, 0x3018, 0x44}, - {OV2680_8BIT, 0x3020, 0x00}, - {OV2680_8BIT, 0x3080, 0x02}, - {OV2680_8BIT, 0x3082, 0x45}, - {OV2680_8BIT, 0x3084, 0x09}, - {OV2680_8BIT, 0x3085, 0x04}, - {OV2680_8BIT, 0x3503, 0x03}, - {OV2680_8BIT, 0x350b, 0x36}, - {OV2680_8BIT, 0x3600, 0xb4}, - {OV2680_8BIT, 0x3603, 0x39}, - {OV2680_8BIT, 0x3604, 0x24}, - {OV2680_8BIT, 0x3605, 0x00}, - {OV2680_8BIT, 0x3620, 0x26}, - {OV2680_8BIT, 0x3621, 0x37}, - {OV2680_8BIT, 0x3622, 0x04}, - {OV2680_8BIT, 0x3628, 0x00}, - {OV2680_8BIT, 0x3705, 0x3c}, - {OV2680_8BIT, 0x370c, 0x50}, - {OV2680_8BIT, 0x370d, 0xc0}, - {OV2680_8BIT, 0x3718, 0x88}, - {OV2680_8BIT, 0x3720, 0x00}, - {OV2680_8BIT, 0x3721, 0x00}, - {OV2680_8BIT, 0x3722, 0x00}, - {OV2680_8BIT, 0x3723, 0x00}, - {OV2680_8BIT, 0x3738, 0x00}, - {OV2680_8BIT, 0x3717, 0x58}, - {OV2680_8BIT, 0x3781, 0x80}, - {OV2680_8BIT, 0x3789, 0x60}, - {OV2680_8BIT, 0x3800, 0x00}, - {OV2680_8BIT, 0x3819, 0x04}, - {OV2680_8BIT, 0x4000, 0x81}, - {OV2680_8BIT, 0x4001, 0x40}, - {OV2680_8BIT, 0x4602, 0x02}, - {OV2680_8BIT, 0x481f, 0x36}, - {OV2680_8BIT, 0x4825, 0x36}, - {OV2680_8BIT, 0x4837, 0x18}, - {OV2680_8BIT, 0x5002, 0x30}, - {OV2680_8BIT, 0x5004, 0x04},//manual awb 1x - {OV2680_8BIT, 0x5005, 0x00}, - {OV2680_8BIT, 0x5006, 0x04}, - {OV2680_8BIT, 0x5007, 0x00}, - {OV2680_8BIT, 0x5008, 0x04}, - {OV2680_8BIT, 0x5009, 0x00}, - {OV2680_8BIT, 0x5080, 0x00}, - {OV2680_8BIT, 0x3701, 0x64}, //add on 14/05/13 - {OV2680_8BIT, 0x3784, 0x0c}, //based OV2680_R1A_AM10.ovt add on 14/06/13 - {OV2680_8BIT, 0x5780, 0x3e}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 - {OV2680_8BIT, 0x5781, 0x0f}, - {OV2680_8BIT, 0x5782, 0x04}, - {OV2680_8BIT, 0x5783, 0x02}, - {OV2680_8BIT, 0x5784, 0x01}, - {OV2680_8BIT, 0x5785, 0x01}, - {OV2680_8BIT, 0x5786, 0x00}, - {OV2680_8BIT, 0x5787, 0x04}, - {OV2680_8BIT, 0x5788, 0x02}, - {OV2680_8BIT, 0x5789, 0x00}, - {OV2680_8BIT, 0x578a, 0x01}, - {OV2680_8BIT, 0x578b, 0x02}, - {OV2680_8BIT, 0x578c, 0x03}, - {OV2680_8BIT, 0x578d, 0x03}, - {OV2680_8BIT, 0x578e, 0x08}, - {OV2680_8BIT, 0x578f, 0x0c}, - {OV2680_8BIT, 0x5790, 0x08}, - {OV2680_8BIT, 0x5791, 0x04}, - {OV2680_8BIT, 0x5792, 0x00}, - {OV2680_8BIT, 0x5793, 0x00}, - {OV2680_8BIT, 0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 - {OV2680_8BIT, 0x0100, 0x00}, //stream off - - {OV2680_TOK_TERM, 0, 0} - }; + struct camera_sensor_platform_data *platform_data; + int vt_pix_clk_freq_mhz; + int fmt_idx; + int run_mode; + u8 res; + u8 type; +}; + +enum ov2680_tok_type { + OV2680_8BIT = 0x0001, + OV2680_16BIT = 0x0002, + OV2680_32BIT = 0x0004, + OV2680_TOK_TERM = 0xf000, /* terminating token for reg list */ + OV2680_TOK_DELAY = 0xfe00, /* delay token for reg list */ + OV2680_TOK_MASK = 0xfff0 +}; + +/** + * struct ov2680_reg - MI sensor register format + * @type: type of the register + * @reg: 16-bit offset to register + * @val: 8/16/32-bit register value + * + * Define a structure for sensor register initialization values + */ +struct ov2680_reg { + enum ov2680_tok_type type; + u16 reg; + u32 val; /* @set value for read/mod/write, @mask */ +}; + +#define to_ov2680_sensor(x) container_of(x, struct ov2680_device, sd) + +#define OV2680_MAX_WRITE_BUF_SIZE 30 + +struct ov2680_write_buffer { + u16 addr; + u8 data[OV2680_MAX_WRITE_BUF_SIZE]; +}; + +struct ov2680_write_ctrl { + int index; + struct ov2680_write_buffer buffer; +}; + +static struct ov2680_reg const ov2680_global_setting[] = { + {OV2680_8BIT, 0x0103, 0x01}, + {OV2680_8BIT, 0x3002, 0x00}, + {OV2680_8BIT, 0x3016, 0x1c}, + {OV2680_8BIT, 0x3018, 0x44}, + {OV2680_8BIT, 0x3020, 0x00}, + {OV2680_8BIT, 0x3080, 0x02}, + {OV2680_8BIT, 0x3082, 0x45}, + {OV2680_8BIT, 0x3084, 0x09}, + {OV2680_8BIT, 0x3085, 0x04}, + {OV2680_8BIT, 0x3503, 0x03}, + {OV2680_8BIT, 0x350b, 0x36}, + {OV2680_8BIT, 0x3600, 0xb4}, + {OV2680_8BIT, 0x3603, 0x39}, + {OV2680_8BIT, 0x3604, 0x24}, + {OV2680_8BIT, 0x3605, 0x00}, + {OV2680_8BIT, 0x3620, 0x26}, + {OV2680_8BIT, 0x3621, 0x37}, + {OV2680_8BIT, 0x3622, 0x04}, + {OV2680_8BIT, 0x3628, 0x00}, + {OV2680_8BIT, 0x3705, 0x3c}, + {OV2680_8BIT, 0x370c, 0x50}, + {OV2680_8BIT, 0x370d, 0xc0}, + {OV2680_8BIT, 0x3718, 0x88}, + {OV2680_8BIT, 0x3720, 0x00}, + {OV2680_8BIT, 0x3721, 0x00}, + {OV2680_8BIT, 0x3722, 0x00}, + {OV2680_8BIT, 0x3723, 0x00}, + {OV2680_8BIT, 0x3738, 0x00}, + {OV2680_8BIT, 0x3717, 0x58}, + {OV2680_8BIT, 0x3781, 0x80}, + {OV2680_8BIT, 0x3789, 0x60}, + {OV2680_8BIT, 0x3800, 0x00}, + {OV2680_8BIT, 0x3819, 0x04}, + {OV2680_8BIT, 0x4000, 0x81}, + {OV2680_8BIT, 0x4001, 0x40}, + {OV2680_8BIT, 0x4602, 0x02}, + {OV2680_8BIT, 0x481f, 0x36}, + {OV2680_8BIT, 0x4825, 0x36}, + {OV2680_8BIT, 0x4837, 0x18}, + {OV2680_8BIT, 0x5002, 0x30}, + {OV2680_8BIT, 0x5004, 0x04},//manual awb 1x + {OV2680_8BIT, 0x5005, 0x00}, + {OV2680_8BIT, 0x5006, 0x04}, + {OV2680_8BIT, 0x5007, 0x00}, + {OV2680_8BIT, 0x5008, 0x04}, + {OV2680_8BIT, 0x5009, 0x00}, + {OV2680_8BIT, 0x5080, 0x00}, + {OV2680_8BIT, 0x3701, 0x64}, //add on 14/05/13 + {OV2680_8BIT, 0x3784, 0x0c}, //based OV2680_R1A_AM10.ovt add on 14/06/13 + {OV2680_8BIT, 0x5780, 0x3e}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {OV2680_8BIT, 0x5781, 0x0f}, + {OV2680_8BIT, 0x5782, 0x04}, + {OV2680_8BIT, 0x5783, 0x02}, + {OV2680_8BIT, 0x5784, 0x01}, + {OV2680_8BIT, 0x5785, 0x01}, + {OV2680_8BIT, 0x5786, 0x00}, + {OV2680_8BIT, 0x5787, 0x04}, + {OV2680_8BIT, 0x5788, 0x02}, + {OV2680_8BIT, 0x5789, 0x00}, + {OV2680_8BIT, 0x578a, 0x01}, + {OV2680_8BIT, 0x578b, 0x02}, + {OV2680_8BIT, 0x578c, 0x03}, + {OV2680_8BIT, 0x578d, 0x03}, + {OV2680_8BIT, 0x578e, 0x08}, + {OV2680_8BIT, 0x578f, 0x0c}, + {OV2680_8BIT, 0x5790, 0x08}, + {OV2680_8BIT, 0x5791, 0x04}, + {OV2680_8BIT, 0x5792, 0x00}, + {OV2680_8BIT, 0x5793, 0x00}, + {OV2680_8BIT, 0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {OV2680_8BIT, 0x0100, 0x00}, //stream off + + {OV2680_TOK_TERM, 0, 0} +}; #if 0 /* None of the definitions below are used currently */ - /* - * 176x144 30fps VBlanking 1lane 10Bit (binning) - */ - static struct ov2680_reg const ov2680_QCIF_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xaf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x47}, - {OV2680_8BIT, 0x3808, 0x00}, - {OV2680_8BIT, 0x3809, 0xC0}, - {OV2680_8BIT, 0x380a, 0x00}, - {OV2680_8BIT, 0x380b, 0xa0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4000, 0x81}, - {OV2680_8BIT, 0x4001, 0x40}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} - }; - - /* - * 352x288 30fps VBlanking 1lane 10Bit (binning) - */ - static struct ov2680_reg const ov2680_CIF_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x03}, - {OV2680_8BIT, 0x3805, 0x8f}, - {OV2680_8BIT, 0x3806, 0x02}, - {OV2680_8BIT, 0x3807, 0xe7}, - {OV2680_8BIT, 0x3808, 0x01}, - {OV2680_8BIT, 0x3809, 0x70}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0x30}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} - }; - - /* - * 336x256 30fps VBlanking 1lane 10Bit (binning) - */ - static struct ov2680_reg const ov2680_QVGA_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x03}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x02}, - {OV2680_8BIT, 0x3807, 0x87}, - {OV2680_8BIT, 0x3808, 0x01}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0x00}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} - }; - - /* - * 656x496 30fps VBlanking 1lane 10Bit (binning) - */ - static struct ov2680_reg const ov2680_656x496_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xcf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x67}, - {OV2680_8BIT, 0x3808, 0x02}, - {OV2680_8BIT, 0x3809, 0x90}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0xf0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} - }; - /* - * 800x600 30fps VBlanking 1lane 10Bit (binning) - */ - static struct ov2680_reg const ov2680_720x592_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x26}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0x00}, // X_ADDR_START; - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, // Y_ADDR_START; - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xaf}, // X_ADDR_END; - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xaf}, // Y_ADDR_END; - {OV2680_8BIT, 0x3808, 0x02}, - {OV2680_8BIT, 0x3809, 0xd0}, // X_OUTPUT_SIZE; - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0x50}, // Y_OUTPUT_SIZE; - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xac}, // HTS; - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, // VTS; - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5708, 0x00}, - {OV2680_8BIT, 0x5704, 0x02}, - {OV2680_8BIT, 0x5705, 0xd0}, // X_WIN; - {OV2680_8BIT, 0x5706, 0x02}, - {OV2680_8BIT, 0x5707, 0x50}, // Y_WIN; - {OV2680_8BIT, 0x3820, 0xc2}, // FLIP_FORMAT; - {OV2680_8BIT, 0x3821, 0x01}, // MIRROR_FORMAT; - {OV2680_8BIT, 0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; - // BIT[3]: Mirror order, BG or GB; - // BIT[2]: Flip order, BR or RB; - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} - }; - /* - * 800x600 30fps VBlanking 1lane 10Bit (binning) - */ - static struct ov2680_reg const ov2680_800x600_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x26}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x03}, - {OV2680_8BIT, 0x3809, 0x20}, - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0x58}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xac}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x5708, 0x00}, - {OV2680_8BIT, 0x5704, 0x03}, - {OV2680_8BIT, 0x5705, 0x20}, - {OV2680_8BIT, 0x5706, 0x02}, - {OV2680_8BIT, 0x5707, 0x58}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - {OV2680_8BIT, 0x5090, 0x00}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} - }; - - /* - * 720p=1280*720 30fps VBlanking 1lane 10Bit (no-Scaling) - */ - static struct ov2680_reg const ov2680_720p_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0xf2}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xbf}, - {OV2680_8BIT, 0x3806, 0x03}, - {OV2680_8BIT, 0x3807, 0xdd}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0x10}, - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0xe0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x06}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} - }; - - /* - * 1296x976 30fps VBlanking 1lane 10Bit(no-scaling) - */ - static struct ov2680_reg const ov2680_1296x976_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xbf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x57}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0x10}, - {OV2680_8BIT, 0x380a, 0x03}, - {OV2680_8BIT, 0x380b, 0xd0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x08}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, //miror/flip - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} - }; - - /* - * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling) - */ - static struct ov2680_reg const ov2680_1456x1096_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x90}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xC0}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0xb0}, - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0x48}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} - }; +/* + * 176x144 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_QCIF_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xaf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x47}, + {OV2680_8BIT, 0x3808, 0x00}, + {OV2680_8BIT, 0x3809, 0xC0}, + {OV2680_8BIT, 0x380a, 0x00}, + {OV2680_8BIT, 0x380b, 0xa0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4000, 0x81}, + {OV2680_8BIT, 0x4001, 0x40}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} +}; + +/* + * 352x288 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_CIF_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x03}, + {OV2680_8BIT, 0x3805, 0x8f}, + {OV2680_8BIT, 0x3806, 0x02}, + {OV2680_8BIT, 0x3807, 0xe7}, + {OV2680_8BIT, 0x3808, 0x01}, + {OV2680_8BIT, 0x3809, 0x70}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0x30}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} +}; + +/* + * 336x256 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_QVGA_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x03}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x02}, + {OV2680_8BIT, 0x3807, 0x87}, + {OV2680_8BIT, 0x3808, 0x01}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0x00}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} +}; + +/* + * 656x496 30fps VBlanking 1lane 10Bit (binning) + */ +static struct ov2680_reg const ov2680_656x496_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xcf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x67}, + {OV2680_8BIT, 0x3808, 0x02}, + {OV2680_8BIT, 0x3809, 0x90}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0xf0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} +}; +/* +* 800x600 30fps VBlanking 1lane 10Bit (binning) +*/ +static struct ov2680_reg const ov2680_720x592_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x26}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0x00}, // X_ADDR_START; + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, // Y_ADDR_START; + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xaf}, // X_ADDR_END; + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xaf}, // Y_ADDR_END; + {OV2680_8BIT, 0x3808, 0x02}, + {OV2680_8BIT, 0x3809, 0xd0}, // X_OUTPUT_SIZE; + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0x50}, // Y_OUTPUT_SIZE; + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xac}, // HTS; + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, // VTS; + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5708, 0x00}, + {OV2680_8BIT, 0x5704, 0x02}, + {OV2680_8BIT, 0x5705, 0xd0}, // X_WIN; + {OV2680_8BIT, 0x5706, 0x02}, + {OV2680_8BIT, 0x5707, 0x50}, // Y_WIN; + {OV2680_8BIT, 0x3820, 0xc2}, // FLIP_FORMAT; + {OV2680_8BIT, 0x3821, 0x01}, // MIRROR_FORMAT; + {OV2680_8BIT, 0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; + // BIT[3]: Mirror order, BG or GB; + // BIT[2]: Flip order, BR or RB; + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} +}; +/* +* 800x600 30fps VBlanking 1lane 10Bit (binning) +*/ +static struct ov2680_reg const ov2680_800x600_30fps[] = { + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x26}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x03}, + {OV2680_8BIT, 0x3809, 0x20}, + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0x58}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xac}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x5708, 0x00}, + {OV2680_8BIT, 0x5704, 0x03}, + {OV2680_8BIT, 0x5705, 0x20}, + {OV2680_8BIT, 0x5706, 0x02}, + {OV2680_8BIT, 0x5707, 0x58}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + {OV2680_8BIT, 0x5090, 0x00}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} +}; + +/* + * 720p=1280*720 30fps VBlanking 1lane 10Bit (no-Scaling) + */ +static struct ov2680_reg const ov2680_720p_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0xf2}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xbf}, + {OV2680_8BIT, 0x3806, 0x03}, + {OV2680_8BIT, 0x3807, 0xdd}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0x10}, + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0xe0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x06}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} +}; + +/* + * 1296x976 30fps VBlanking 1lane 10Bit(no-scaling) + */ +static struct ov2680_reg const ov2680_1296x976_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xbf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x57}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0x10}, + {OV2680_8BIT, 0x380a, 0x03}, + {OV2680_8BIT, 0x380b, 0xd0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x08}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, //miror/flip + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} +}; + +/* + * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling) +*/ +static struct ov2680_reg const ov2680_1456x1096_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x90}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xC0}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0xb0}, + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0x48}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} +}; #endif - /* - *1616x916 30fps VBlanking 1lane 10bit - */ - - static struct ov2680_reg const ov2680_1616x916_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x96}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x39}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x03}, - {OV2680_8BIT, 0x380b, 0x94}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x08}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x03}, - {OV2680_8BIT, 0x5707, 0x94}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_TOK_TERM, 0, 0} - }; - - /* - * 1612x1212 30fps VBlanking 1lane 10Bit - */ +/* + *1616x916 30fps VBlanking 1lane 10bit + */ + +static struct ov2680_reg const ov2680_1616x916_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x96}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x39}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x03}, + {OV2680_8BIT, 0x380b, 0x94}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x08}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x03}, + {OV2680_8BIT, 0x5707, 0x94}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_TOK_TERM, 0, 0} +}; + +/* + * 1612x1212 30fps VBlanking 1lane 10Bit + */ #if 0 - static struct ov2680_reg const ov2680_1616x1082_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x86}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0x3a}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x04}, - {OV2680_8BIT, 0x5707, 0x3a}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} - }; +static struct ov2680_reg const ov2680_1616x1082_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x86}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0x3a}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x04}, + {OV2680_8BIT, 0x5707, 0x3a}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} +}; #endif - /* - * 1616x1216 30fps VBlanking 1lane 10Bit - */ - static struct ov2680_reg const ov2680_1616x1216_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50},//50},//4line for mirror and flip - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0xc0},//c0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x0b}, - {OV2680_8BIT, 0x5081, 0x01}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x04}, - {OV2680_8BIT, 0x5707, 0xcc}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_TOK_TERM, 0, 0} - }; - - static struct ov2680_resolution ov2680_res_preview[] = { +/* + * 1616x1216 30fps VBlanking 1lane 10Bit + */ +static struct ov2680_reg const ov2680_1616x1216_30fps[] = { + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50},//50},//4line for mirror and flip + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0xc0},//c0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x0b}, + {OV2680_8BIT, 0x5081, 0x01}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x04}, + {OV2680_8BIT, 0x5707, 0xcc}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_TOK_TERM, 0, 0} +}; + +static struct ov2680_resolution ov2680_res_preview[] = { { .desc = "ov2680_1616x1216_30fps", .width = 1616, diff --git a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c index 4a184400c7d7b..9e92ee8626e5d 100644 --- a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c +++ b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c @@ -53,7 +53,8 @@ */ static uint up_delay = 30; module_param(up_delay, uint, 0644); -MODULE_PARM_DESC(up_delay, "Delay prior to the first CCI transaction for ov5693"); +MODULE_PARM_DESC(up_delay, + "Delay prior to the first CCI transaction for ov5693"); static int vcm_ad_i2c_wr8(struct i2c_client *client, u8 reg, u8 val) { @@ -136,7 +137,7 @@ static int ov5693_read_reg(struct i2c_client *client, } if (data_length != OV5693_8BIT && data_length != OV5693_16BIT - && data_length != OV5693_32BIT) { + && data_length != OV5693_32BIT) { dev_err(&client->dev, "%s error, invalid data length\n", __func__); return -EINVAL; @@ -258,7 +259,7 @@ static int vcm_detect(struct i2c_client *client) } static int ov5693_write_reg(struct i2c_client *client, u16 data_length, - u16 reg, u16 val) + u16 reg, u16 val) { int ret; unsigned char data[4] = {0}; @@ -363,8 +364,8 @@ static int __ov5693_buf_reg_array(struct i2c_client *client, } static int __ov5693_write_reg_is_consecutive(struct i2c_client *client, - struct ov5693_write_ctrl *ctrl, - const struct ov5693_reg *next) + struct ov5693_write_ctrl *ctrl, + const struct ov5693_reg *next) { if (ctrl->index == 0) return 1; @@ -394,7 +395,7 @@ static int ov5693_write_reg_array(struct i2c_client *client, * flushed before proceed. */ if (!__ov5693_write_reg_is_consecutive(client, &ctrl, - next)) { + next)) { err = __ov5693_flush_reg_array(client, &ctrl); if (err) return err; @@ -429,8 +430,8 @@ static int ov5693_g_fnumber(struct v4l2_subdev *sd, s32 *val) static int ov5693_g_fnumber_range(struct v4l2_subdev *sd, s32 *val) { *val = (OV5693_F_NUMBER_DEFAULT_NUM << 24) | - (OV5693_F_NUMBER_DEM << 16) | - (OV5693_F_NUMBER_DEFAULT_NUM << 8) | OV5693_F_NUMBER_DEM; + (OV5693_F_NUMBER_DEM << 16) | + (OV5693_F_NUMBER_DEFAULT_NUM << 8) | OV5693_F_NUMBER_DEM; return 0; } @@ -453,8 +454,8 @@ static int ov5693_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val) } static int ov5693_get_intg_factor(struct i2c_client *client, - struct camera_mipi_info *info, - const struct ov5693_resolution *res) + struct camera_mipi_info *info, + const struct ov5693_resolution *res) { struct v4l2_subdev *sd = i2c_get_clientdata(client); struct ov5693_device *dev = to_ov5693_sensor(sd); @@ -475,11 +476,11 @@ static int ov5693_get_intg_factor(struct i2c_client *client, /* get integration time */ buf->coarse_integration_time_min = OV5693_COARSE_INTG_TIME_MIN; buf->coarse_integration_time_max_margin = - OV5693_COARSE_INTG_TIME_MAX_MARGIN; + OV5693_COARSE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_min = OV5693_FINE_INTG_TIME_MIN; buf->fine_integration_time_max_margin = - OV5693_FINE_INTG_TIME_MAX_MARGIN; + OV5693_FINE_INTG_TIME_MAX_MARGIN; buf->fine_integration_time_def = OV5693_FINE_INTG_TIME_MIN; buf->frame_length_lines = res->lines_per_frame; @@ -488,50 +489,50 @@ static int ov5693_get_intg_factor(struct i2c_client *client, /* get the cropping and output resolution to ISP for this mode. */ ret = ov5693_read_reg(client, OV5693_16BIT, - OV5693_HORIZONTAL_START_H, ®_val); + OV5693_HORIZONTAL_START_H, ®_val); if (ret) return ret; buf->crop_horizontal_start = reg_val; ret = ov5693_read_reg(client, OV5693_16BIT, - OV5693_VERTICAL_START_H, ®_val); + OV5693_VERTICAL_START_H, ®_val); if (ret) return ret; buf->crop_vertical_start = reg_val; ret = ov5693_read_reg(client, OV5693_16BIT, - OV5693_HORIZONTAL_END_H, ®_val); + OV5693_HORIZONTAL_END_H, ®_val); if (ret) return ret; buf->crop_horizontal_end = reg_val; ret = ov5693_read_reg(client, OV5693_16BIT, - OV5693_VERTICAL_END_H, ®_val); + OV5693_VERTICAL_END_H, ®_val); if (ret) return ret; buf->crop_vertical_end = reg_val; ret = ov5693_read_reg(client, OV5693_16BIT, - OV5693_HORIZONTAL_OUTPUT_SIZE_H, ®_val); + OV5693_HORIZONTAL_OUTPUT_SIZE_H, ®_val); if (ret) return ret; buf->output_width = reg_val; ret = ov5693_read_reg(client, OV5693_16BIT, - OV5693_VERTICAL_OUTPUT_SIZE_H, ®_val); + OV5693_VERTICAL_OUTPUT_SIZE_H, ®_val); if (ret) return ret; buf->output_height = reg_val; buf->binning_factor_x = res->bin_factor_x ? - res->bin_factor_x : 1; + res->bin_factor_x : 1; buf->binning_factor_y = res->bin_factor_y ? - res->bin_factor_y : 1; + res->bin_factor_y : 1; return 0; } static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, - int gain, int digitgain) + int gain, int digitgain) { struct i2c_client *client = v4l2_get_subdevdata(sd); @@ -552,7 +553,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } /* group hold */ ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_GROUP_ACCESS, 0x00); + OV5693_GROUP_ACCESS, 0x00); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_GROUP_ACCESS); @@ -560,7 +561,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_TIMING_HTS_H, (hts >> 8) & 0xFF); + OV5693_TIMING_HTS_H, (hts >> 8) & 0xFF); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_TIMING_HTS_H); @@ -568,7 +569,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_TIMING_HTS_L, hts & 0xFF); + OV5693_TIMING_HTS_L, hts & 0xFF); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_TIMING_HTS_L); @@ -579,7 +580,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, vts = (u16)coarse_itg + OV5693_INTEGRATION_TIME_MARGIN; ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_TIMING_VTS_H, (vts >> 8) & 0xFF); + OV5693_TIMING_VTS_H, (vts >> 8) & 0xFF); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_TIMING_VTS_H); @@ -587,7 +588,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_TIMING_VTS_L, vts & 0xFF); + OV5693_TIMING_VTS_L, vts & 0xFF); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_TIMING_VTS_L); @@ -624,7 +625,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* Analog gain */ ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_AGC_L, gain & 0xff); + OV5693_AGC_L, gain & 0xff); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_AGC_L); @@ -632,7 +633,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_AGC_H, (gain >> 8) & 0xff); + OV5693_AGC_H, (gain >> 8) & 0xff); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_AGC_H); @@ -642,7 +643,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* Digital gain */ if (digitgain) { ret = ov5693_write_reg(client, OV5693_16BIT, - OV5693_MWB_RED_GAIN_H, digitgain); + OV5693_MWB_RED_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_MWB_RED_GAIN_H); @@ -650,7 +651,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov5693_write_reg(client, OV5693_16BIT, - OV5693_MWB_GREEN_GAIN_H, digitgain); + OV5693_MWB_GREEN_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_MWB_RED_GAIN_H); @@ -658,7 +659,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } ret = ov5693_write_reg(client, OV5693_16BIT, - OV5693_MWB_BLUE_GAIN_H, digitgain); + OV5693_MWB_BLUE_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, "%s: write %x error, aborted\n", __func__, OV5693_MWB_RED_GAIN_H); @@ -668,20 +669,20 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* End group */ ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_GROUP_ACCESS, 0x10); + OV5693_GROUP_ACCESS, 0x10); if (ret) return ret; /* Delay launch group */ ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_GROUP_ACCESS, 0xa0); + OV5693_GROUP_ACCESS, 0xa0); if (ret) return ret; return ret; } static int ov5693_set_exposure(struct v4l2_subdev *sd, int exposure, - int gain, int digitgain) + int gain, int digitgain) { struct ov5693_device *dev = to_ov5693_sensor(sd); int ret; @@ -694,7 +695,7 @@ static int ov5693_set_exposure(struct v4l2_subdev *sd, int exposure, } static long ov5693_s_exposure(struct v4l2_subdev *sd, - struct atomisp_exposure *exposure) + struct atomisp_exposure *exposure) { u16 coarse_itg = exposure->integration_time[0]; u16 analog_gain = exposure->gain[0]; @@ -720,7 +721,7 @@ static int ov5693_read_otp_reg_array(struct i2c_client *client, u16 size, for (index = 0; index <= size; index++) { pVal = (u16 *)(buf + index); ret = - ov5693_read_reg(client, OV5693_8BIT, addr + index, + ov5693_read_reg(client, OV5693_8BIT, addr + index, pVal); if (ret) return ret; @@ -740,7 +741,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf) dev->otp_size = 0; for (i = 1; i < OV5693_OTP_BANK_MAX; i++) { /*set bank NO and OTP read mode. */ - ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_BANK_REG, (i | 0xc0)); //[7:6] 2'b11 [5:0] bank no + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_BANK_REG, + (i | 0xc0)); //[7:6] 2'b11 [5:0] bank no if (ret) { dev_err(&client->dev, "failed to prepare OTP page\n"); return ret; @@ -748,7 +750,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf) //pr_debug("write 0x%x->0x%x\n",OV5693_OTP_BANK_REG,(i|0xc0)); /*enable read */ - ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_READ_REG, OV5693_OTP_MODE_READ); // enable :1 + ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_READ_REG, + OV5693_OTP_MODE_READ); // enable :1 if (ret) { dev_err(&client->dev, "failed to set OTP reading mode page"); @@ -776,7 +779,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf) b = buf; continue; } - } else if (i == 24) { //if the first 320bytes data doesn't not exist, try to read the next 32bytes data. + } else if (i == + 24) { //if the first 320bytes data doesn't not exist, try to read the next 32bytes data. if ((*b) == 0) { dev->otp_size = 32; break; @@ -784,7 +788,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf) b = buf; continue; } - } else if (i == 27) { //if the prvious 32bytes data doesn't exist, try to read the next 32bytes data again. + } else if (i == + 27) { //if the prvious 32bytes data doesn't exist, try to read the next 32bytes data again. if ((*b) == 0) { dev->otp_size = 32; break; @@ -900,21 +905,21 @@ static int ov5693_q_exposure(struct v4l2_subdev *sd, s32 *value) /* get exposure */ ret = ov5693_read_reg(client, OV5693_8BIT, - OV5693_EXPOSURE_L, - ®_v); + OV5693_EXPOSURE_L, + ®_v); if (ret) goto err; ret = ov5693_read_reg(client, OV5693_8BIT, - OV5693_EXPOSURE_M, - ®_v2); + OV5693_EXPOSURE_M, + ®_v2); if (ret) goto err; reg_v += reg_v2 << 8; ret = ov5693_read_reg(client, OV5693_8BIT, - OV5693_EXPOSURE_H, - ®_v2); + OV5693_EXPOSURE_H, + ®_v2); if (ret) goto err; @@ -935,7 +940,7 @@ static int ad5823_t_focus_vcm(struct v4l2_subdev *sd, u16 val) /* set reg VCM_CODE_MSB Bit[1:0] */ vcm_code = (vcm_code & VCM_CODE_MSB_MASK) | - ((val >> 8) & ~VCM_CODE_MSB_MASK); + ((val >> 8) & ~VCM_CODE_MSB_MASK); ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_MSB, vcm_code); if (ret) return ret; @@ -947,7 +952,7 @@ static int ad5823_t_focus_vcm(struct v4l2_subdev *sd, u16 val) /* set required vcm move time */ vcm_code = AD5823_RESONANCE_PERIOD / AD5823_RESONANCE_COEF - - AD5823_HIGH_FREQ_RANGE; + - AD5823_HIGH_FREQ_RANGE; ret = ad5823_i2c_write(client, AD5823_REG_VCM_MOVE_TIME, vcm_code); return ret; @@ -1011,8 +1016,8 @@ static int ov5693_q_focus_status(struct v4l2_subdev *sd, s32 *value) struct ov5693_device *dev = to_ov5693_sensor(sd); ktime_t temptime; ktime_t timedelay = ns_to_ktime(min_t(u32, - abs(dev->number_of_steps) * DELAY_PER_STEP_NS, - DELAY_MAX_PER_STEP_NS)); + abs(dev->number_of_steps) * DELAY_PER_STEP_NS, + DELAY_MAX_PER_STEP_NS)); temptime = ktime_sub(ktime_get(), (dev->timestamp_t_focus_abs)); if (ktime_compare(temptime, timedelay) <= 0) { @@ -1136,126 +1141,126 @@ static const struct v4l2_ctrl_ops ctrl_ops = { static const struct v4l2_ctrl_config ov5693_controls[] = { { - .ops = &ctrl_ops, - .id = V4L2_CID_EXPOSURE_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "exposure", - .min = 0x0, - .max = 0xffff, - .step = 0x01, - .def = 0x00, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_EXPOSURE_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "exposure", + .min = 0x0, + .max = 0xffff, + .step = 0x01, + .def = 0x00, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCAL_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focal length", - .min = OV5693_FOCAL_LENGTH_DEFAULT, - .max = OV5693_FOCAL_LENGTH_DEFAULT, - .step = 0x01, - .def = OV5693_FOCAL_LENGTH_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCAL_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focal length", + .min = OV5693_FOCAL_LENGTH_DEFAULT, + .max = OV5693_FOCAL_LENGTH_DEFAULT, + .step = 0x01, + .def = OV5693_FOCAL_LENGTH_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number", - .min = OV5693_F_NUMBER_DEFAULT, - .max = OV5693_F_NUMBER_DEFAULT, - .step = 0x01, - .def = OV5693_F_NUMBER_DEFAULT, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number", + .min = OV5693_F_NUMBER_DEFAULT, + .max = OV5693_F_NUMBER_DEFAULT, + .step = 0x01, + .def = OV5693_F_NUMBER_DEFAULT, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FNUMBER_RANGE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "f-number range", - .min = OV5693_F_NUMBER_RANGE, - .max = OV5693_F_NUMBER_RANGE, - .step = 0x01, - .def = OV5693_F_NUMBER_RANGE, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FNUMBER_RANGE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "f-number range", + .min = OV5693_F_NUMBER_RANGE, + .max = OV5693_F_NUMBER_RANGE, + .step = 0x01, + .def = OV5693_F_NUMBER_RANGE, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCUS_ABSOLUTE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focus move absolute", - .min = 0, - .max = OV5693_VCM_MAX_FOCUS_POS, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_ABSOLUTE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus move absolute", + .min = 0, + .max = OV5693_VCM_MAX_FOCUS_POS, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCUS_RELATIVE, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focus move relative", - .min = OV5693_VCM_MAX_FOCUS_NEG, - .max = OV5693_VCM_MAX_FOCUS_POS, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_RELATIVE, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus move relative", + .min = OV5693_VCM_MAX_FOCUS_NEG, + .max = OV5693_VCM_MAX_FOCUS_POS, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_FOCUS_STATUS, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "focus status", - .min = 0, - .max = 100, /* allow enum to grow in the future */ - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_FOCUS_STATUS, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "focus status", + .min = 0, + .max = 100, /* allow enum to grow in the future */ + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_VCM_SLEW, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "vcm slew", - .min = 0, - .max = OV5693_VCM_SLEW_STEP_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_VCM_SLEW, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vcm slew", + .min = 0, + .max = OV5693_VCM_SLEW_STEP_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_VCM_TIMEING, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "vcm step time", - .min = 0, - .max = OV5693_VCM_SLEW_TIME_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_VCM_TIMEING, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vcm step time", + .min = 0, + .max = OV5693_VCM_SLEW_TIME_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_HORZ, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "horizontal binning factor", - .min = 0, - .max = OV5693_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_HORZ, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "horizontal binning factor", + .min = 0, + .max = OV5693_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, { - .ops = &ctrl_ops, - .id = V4L2_CID_BIN_FACTOR_VERT, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "vertical binning factor", - .min = 0, - .max = OV5693_BIN_FACTOR_MAX, - .step = 1, - .def = 0, - .flags = 0, - }, + .ops = &ctrl_ops, + .id = V4L2_CID_BIN_FACTOR_VERT, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "vertical binning factor", + .min = 0, + .max = OV5693_BIN_FACTOR_MAX, + .step = 1, + .def = 0, + .flags = 0, + }, }; static int ov5693_init(struct v4l2_subdev *sd) @@ -1280,7 +1285,7 @@ static int ov5693_init(struct v4l2_subdev *sd) dev_err(&client->dev, "vcm enable ringing failed\n"); ret = ad5823_i2c_write(client, AD5823_REG_MODE, - AD5823_ARC_RES1); + AD5823_ARC_RES1); if (ret) dev_err(&client->dev, "vcm change mode failed\n"); @@ -1549,7 +1554,7 @@ static int startup(struct v4l2_subdev *sd) int ret = 0; ret = ov5693_write_reg(client, OV5693_8BIT, - OV5693_SW_RESET, 0x01); + OV5693_SW_RESET, 0x01); if (ret) { dev_err(&client->dev, "ov5693 reset err.\n"); return ret; @@ -1649,12 +1654,12 @@ static int ov5693_set_fmt(struct v4l2_subdev *sd, * data yet. So add stop streaming here. */ ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM, - OV5693_STOP_STREAMING); + OV5693_STOP_STREAMING); if (ret) dev_warn(&client->dev, "ov5693 stream off err\n"); ret = ov5693_get_intg_factor(client, ov5693_info, - &ov5693_res[dev->fmt_idx]); + &ov5693_res[dev->fmt_idx]); if (ret) { dev_err(&client->dev, "failed to get integration_factor\n"); goto err; @@ -1701,13 +1706,13 @@ static int ov5693_detect(struct i2c_client *client) return -ENODEV; ret = ov5693_read_reg(client, OV5693_8BIT, - OV5693_SC_CMMN_CHIP_ID_H, &high); + OV5693_SC_CMMN_CHIP_ID_H, &high); if (ret) { dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); return -ENODEV; } ret = ov5693_read_reg(client, OV5693_8BIT, - OV5693_SC_CMMN_CHIP_ID_L, &low); + OV5693_SC_CMMN_CHIP_ID_L, &low); id = ((((u16)high) << 8) | (u16)low); if (id != OV5693_ID) { @@ -1716,7 +1721,7 @@ static int ov5693_detect(struct i2c_client *client) } ret = ov5693_read_reg(client, OV5693_8BIT, - OV5693_SC_CMMN_SUB_ID, &high); + OV5693_SC_CMMN_SUB_ID, &high); revision = (u8)high & 0x0f; dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision); @@ -1733,8 +1738,8 @@ static int ov5693_s_stream(struct v4l2_subdev *sd, int enable) mutex_lock(&dev->input_lock); ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM, - enable ? OV5693_START_STREAMING : - OV5693_STOP_STREAMING); + enable ? OV5693_START_STREAMING : + OV5693_STOP_STREAMING); mutex_unlock(&dev->input_lock); @@ -1752,7 +1757,7 @@ static int ov5693_s_config(struct v4l2_subdev *sd, return -ENODEV; dev->platform_data = - (struct camera_sensor_platform_data *)platform_data; + (struct camera_sensor_platform_data *)platform_data; mutex_lock(&dev->input_lock); /* power off the module, then power on it in future @@ -1906,7 +1911,7 @@ static int ov5693_probe(struct i2c_client *client) i2c = gmin_get_var_int(&client->dev, "I2CAddr", -1); if (i2c != -1) { dev_info(&client->dev, - "Overriding firmware-provided I2C address (0x%x) with 0x%x\n", + "Overriding firmware-provided I2C address (0x%x) with 0x%x\n", client->addr, i2c); client->addr = i2c; } diff --git a/drivers/staging/media/atomisp/include/linux/atomisp.h b/drivers/staging/media/atomisp/include/linux/atomisp.h index e78e8a5cfb868..df0ee5ddedd98 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp.h @@ -407,7 +407,8 @@ struct atomisp_zoom_point { * This specifies the region */ struct atomisp_zoom_region { - struct atomisp_zoom_point origin; /* Starting point coordinates for the region */ + struct atomisp_zoom_point + origin; /* Starting point coordinates for the region */ struct atomisp_resolution resolution; /* Region resolution */ }; diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h index e701eac26e3cf..09e260ea06cac 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h @@ -21,15 +21,15 @@ int atomisp_register_i2c_module(struct v4l2_subdev *subdev, struct camera_sensor_platform_data *plat_data, enum intel_v4l2_subdev_type type); struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter, - struct i2c_board_info *board_info); + struct i2c_board_info *board_info); int atomisp_gmin_remove_subdev(struct v4l2_subdev *sd); int gmin_get_var_int(struct device *dev, const char *var, int def); int camera_sensor_csi(struct v4l2_subdev *sd, u32 port, u32 lanes, u32 format, u32 bayer_order, int flag); struct camera_sensor_platform_data *gmin_camera_platform_data( - struct v4l2_subdev *subdev, - enum atomisp_input_format csi_format, - enum atomisp_bayer_order csi_bayer); + struct v4l2_subdev *subdev, + enum atomisp_input_format csi_format, + enum atomisp_bayer_order csi_bayer); int atomisp_gmin_register_vcm_control(struct camera_vcm_control *); diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h index f363a7e2968d3..9cf46325a696c 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h @@ -187,13 +187,13 @@ struct camera_vcm_control; struct camera_vcm_ops { int (*power_up)(struct v4l2_subdev *sd, struct camera_vcm_control *vcm); int (*power_down)(struct v4l2_subdev *sd, - struct camera_vcm_control *vcm); + struct camera_vcm_control *vcm); int (*queryctrl)(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc, - struct camera_vcm_control *vcm); + struct camera_vcm_control *vcm); int (*g_ctrl)(struct v4l2_subdev *sd, struct v4l2_control *ctrl, - struct camera_vcm_control *vcm); + struct camera_vcm_control *vcm); int (*s_ctrl)(struct v4l2_subdev *sd, struct v4l2_control *ctrl, - struct camera_vcm_control *vcm); + struct camera_vcm_control *vcm); }; struct camera_vcm_control { @@ -215,8 +215,8 @@ struct camera_sensor_platform_data { int (*v1p8_ctrl)(struct v4l2_subdev *subdev, int on); int (*v2p8_ctrl)(struct v4l2_subdev *subdev, int on); int (*v1p2_ctrl)(struct v4l2_subdev *subdev, int on); - struct camera_vcm_control * (*get_vcm_ctrl)(struct v4l2_subdev *subdev, - char *module_id); + struct camera_vcm_control *(*get_vcm_ctrl)(struct v4l2_subdev *subdev, + char *module_id); }; struct camera_mipi_info { diff --git a/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h b/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h index 431b059e65f43..1b5111ad9415f 100644 --- a/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h +++ b/drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h @@ -19,9 +19,9 @@ struct i2c_client; struct firmware; int load_msr_list(struct i2c_client *client, char *path, - const struct firmware **fw); + const struct firmware **fw); int apply_msr_data(struct i2c_client *client, const struct firmware *fw); void release_msr_list(struct i2c_client *client, - const struct firmware *fw); + const struct firmware *fw); #endif /* ifndef __LIBMSRLISTHELPER_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c index 33187ea625bf7..8d575eb0a73fe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c @@ -76,8 +76,8 @@ acc_get_fw(struct atomisp_sub_device *asd, unsigned int handle) struct atomisp_acc_fw *acc_fw; list_for_each_entry(acc_fw, &asd->acc.fw, list) - if (acc_fw->handle == handle) - return acc_fw; + if (acc_fw->handle == handle) + return acc_fw; return NULL; } @@ -141,9 +141,9 @@ int atomisp_acc_load_to_pipe(struct atomisp_sub_device *asd, struct atomisp_acc_fw_load_to_pipe *user_fw) { static const unsigned int pipeline_flags = - ATOMISP_ACC_FW_LOAD_FL_PREVIEW | ATOMISP_ACC_FW_LOAD_FL_COPY | - ATOMISP_ACC_FW_LOAD_FL_VIDEO | - ATOMISP_ACC_FW_LOAD_FL_CAPTURE | ATOMISP_ACC_FW_LOAD_FL_ACC; + ATOMISP_ACC_FW_LOAD_FL_PREVIEW | ATOMISP_ACC_FW_LOAD_FL_COPY | + ATOMISP_ACC_FW_LOAD_FL_VIDEO | + ATOMISP_ACC_FW_LOAD_FL_CAPTURE | ATOMISP_ACC_FW_LOAD_FL_ACC; struct atomisp_acc_fw *acc_fw; int handle; @@ -194,11 +194,11 @@ int atomisp_acc_load_to_pipe(struct atomisp_sub_device *asd, if (acc_fw->fw->type == ia_css_isp_firmware) { static const int type_to_css[] = { [ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT] = - IA_CSS_ACC_OUTPUT, + IA_CSS_ACC_OUTPUT, [ATOMISP_ACC_FW_LOAD_TYPE_VIEWFINDER] = - IA_CSS_ACC_VIEWFINDER, + IA_CSS_ACC_VIEWFINDER, [ATOMISP_ACC_FW_LOAD_TYPE_STANDALONE] = - IA_CSS_ACC_STANDALONE, + IA_CSS_ACC_STANDALONE, }; acc_fw->fw->info.isp.type = type_to_css[acc_fw->type]; } @@ -383,7 +383,8 @@ int atomisp_acc_map(struct atomisp_sub_device *asd, struct atomisp_acc_map *map) return 0; } -int atomisp_acc_unmap(struct atomisp_sub_device *asd, struct atomisp_acc_map *map) +int atomisp_acc_unmap(struct atomisp_sub_device *asd, + struct atomisp_acc_map *map) { struct atomisp_map *atomisp_map; @@ -465,9 +466,9 @@ int atomisp_acc_load_extensions(struct atomisp_sub_device *asd) if (acc_fw->flags & acc_flag_to_pipe[i].flag) { ret = atomisp_css_load_acc_extension(asd, - acc_fw->fw, - acc_flag_to_pipe[i].pipe_id, - acc_fw->type); + acc_fw->fw, + acc_flag_to_pipe[i].pipe_id, + acc_fw->type); if (ret) goto error; @@ -496,7 +497,7 @@ int atomisp_acc_load_extensions(struct atomisp_sub_device *asd) while (--i >= 0) { if (acc_fw->flags & acc_flag_to_pipe[i].flag) { atomisp_css_unload_acc_extension(asd, acc_fw->fw, - acc_flag_to_pipe[i].pipe_id); + acc_flag_to_pipe[i].pipe_id); } } @@ -512,8 +513,8 @@ int atomisp_acc_load_extensions(struct atomisp_sub_device *asd) continue; if (acc_fw->flags & acc_flag_to_pipe[i].flag) { atomisp_css_unload_acc_extension(asd, - acc_fw->fw, - acc_flag_to_pipe[i].pipe_id); + acc_fw->fw, + acc_flag_to_pipe[i].pipe_id); } } } @@ -536,8 +537,8 @@ void atomisp_acc_unload_extensions(struct atomisp_sub_device *asd) for (i = ARRAY_SIZE(acc_flag_to_pipe) - 1; i >= 0; i--) { if (acc_fw->flags & acc_flag_to_pipe[i].flag) { atomisp_css_unload_acc_extension(asd, - acc_fw->fw, - acc_flag_to_pipe[i].pipe_id); + acc_fw->fw, + acc_flag_to_pipe[i].pipe_id); } } } @@ -570,7 +571,7 @@ int atomisp_acc_set_state(struct atomisp_sub_device *asd, for (i = 0; i < ARRAY_SIZE(acc_flag_to_pipe); i++) { if (acc_fw->flags & acc_flag_to_pipe[i].flag) { pipe = asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - pipes[acc_flag_to_pipe[i].pipe_id]; + pipes[acc_flag_to_pipe[i].pipe_id]; r = ia_css_pipe_set_qos_ext_state(pipe, acc_fw->handle, enable); if (r != IA_CSS_SUCCESS) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index 2aba72bce260f..77279e73595ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -93,7 +93,7 @@ struct camera_mipi_info *atomisp_to_sensor_mipi_info(struct v4l2_subdev *sd) struct atomisp_video_pipe *atomisp_to_video_pipe(struct video_device *dev) { return (struct atomisp_video_pipe *) - container_of(dev, struct atomisp_video_pipe, vdev); + container_of(dev, struct atomisp_video_pipe, vdev); } /* @@ -102,7 +102,7 @@ struct atomisp_video_pipe *atomisp_to_video_pipe(struct video_device *dev) struct atomisp_acc_pipe *atomisp_to_acc_pipe(struct video_device *dev) { return (struct atomisp_acc_pipe *) - container_of(dev, struct atomisp_acc_pipe, vdev); + container_of(dev, struct atomisp_acc_pipe, vdev); } static unsigned short atomisp_get_sensor_fps(struct atomisp_sub_device *asd) @@ -149,7 +149,7 @@ static int write_target_freq_to_hw(struct atomisp_device *isp, if (isp_sspm1 & ISP_FREQ_VALID_MASK) { dev_dbg(isp->dev, "clearing ISPSSPM1 valid bit.\n"); iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1, - isp_sspm1 & ~(1 << ISP_FREQ_VALID_OFFSET)); + isp_sspm1 & ~(1 << ISP_FREQ_VALID_OFFSET)); } ratio = (2 * isp->hpll_freq + new_freq / 2) / new_freq - 1; @@ -160,10 +160,10 @@ static int write_target_freq_to_hw(struct atomisp_device *isp, for (i = 0; i < ISP_DFS_TRY_TIMES; i++) { iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1, - isp_sspm1 - | ratio << ISP_REQ_FREQ_OFFSET - | 1 << ISP_FREQ_VALID_OFFSET - | guar_ratio << ISP_REQ_GUAR_FREQ_OFFSET); + isp_sspm1 + | ratio << ISP_REQ_FREQ_OFFSET + | 1 << ISP_FREQ_VALID_OFFSET + | guar_ratio << ISP_REQ_GUAR_FREQ_OFFSET); iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); timeout = 20; @@ -218,7 +218,7 @@ int atomisp_freq_scaling(struct atomisp_device *isp, } if ((isp->pdev->device & ATOMISP_PCI_DEVICE_SOC_MASK) == - ATOMISP_PCI_DEVICE_SOC_CHT && ATOMISP_USE_YUVPP(asd)) + ATOMISP_PCI_DEVICE_SOC_CHT && ATOMISP_USE_YUVPP(asd)) isp->dfs = &dfs_config_cht_soc; dfs = isp->dfs; @@ -258,7 +258,7 @@ int atomisp_freq_scaling(struct atomisp_device *isp, curr_rules.run_mode = ATOMISP_RUN_MODE_SDV; else curr_rules.run_mode = - ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE; + ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE; } /* search for the target frequency by looping freq rules*/ @@ -406,7 +406,8 @@ void atomisp_eof_event(struct atomisp_sub_device *asd, uint8_t exp_id) v4l2_event_queue(asd->subdev.devnode, &event); } -static void atomisp_3a_stats_ready_event(struct atomisp_sub_device *asd, uint8_t exp_id) +static void atomisp_3a_stats_ready_event(struct atomisp_sub_device *asd, + uint8_t exp_id) { struct v4l2_event event = {0}; @@ -417,7 +418,7 @@ static void atomisp_3a_stats_ready_event(struct atomisp_sub_device *asd, uint8_t } static void atomisp_metadata_ready_event(struct atomisp_sub_device *asd, - enum atomisp_metadata_type md_type) + enum atomisp_metadata_type md_type) { struct v4l2_event event = {0}; @@ -554,9 +555,9 @@ irqreturn_t atomisp_isr(int irq, void *dev) * start processing next frame from sensor before old * one is completely done. */ if (atomic_read(&asd->sequence) == atomic_read( - &asd->sequence_temp)) + &asd->sequence_temp)) atomic_set(&asd->sequence_temp, - atomic_read(&asd->sof_count)); + atomic_read(&asd->sof_count)); } if (irq_infos & CSS_IRQ_INFO_EVENTS_READY) atomic_set(&asd->sequence, @@ -634,10 +635,10 @@ bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe) { #ifndef ISP2401 return asd->video_out_capture.buffers_in_css || - asd->video_out_vf.buffers_in_css || - asd->video_out_preview.buffers_in_css || - asd->video_out_video_capture.buffers_in_css ? - true : false; + asd->video_out_vf.buffers_in_css || + asd->video_out_preview.buffers_in_css || + asd->video_out_video_capture.buffers_in_css ? + true : false; #else return pipe->buffers_in_css ? true : false; #endif @@ -654,10 +655,10 @@ void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr, dev_dbg(isp->dev, "atomisp_io_base:%p\n", atomisp_io_base); dev_dbg(isp->dev, "%s, addr:0x%x, size: %d, size32: %d\n", __func__, - addr, size, size32); + addr, size, size32); if (size32 * 4 + addr > 0x4000) { dev_err(isp->dev, "illegal size (%d) or addr (0x%x)\n", - size32, addr); + size32, addr); return; } addr += SP_DMEM_BASE; @@ -671,7 +672,7 @@ void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr, } static struct videobuf_buffer *atomisp_css_frame_to_vbuf( - struct atomisp_video_pipe *pipe, struct atomisp_css_frame *frame) + struct atomisp_video_pipe *pipe, struct atomisp_css_frame *frame) { struct videobuf_vmalloc_memory *vm_mem; struct atomisp_css_frame *handle; @@ -702,7 +703,7 @@ static void atomisp_flush_video_pipe(struct atomisp_sub_device *asd, pipe->capq.bufs[i]->state == VIDEOBUF_QUEUED) { pipe->capq.bufs[i]->ts = ktime_get_ns(); pipe->capq.bufs[i]->field_count = - atomic_read(&asd->sequence) << 1; + atomic_read(&asd->sequence) << 1; dev_dbg(asd->isp->dev, "release buffers on device %s\n", pipe->vdev.name); if (pipe->capq.bufs[i]->state == VIDEOBUF_QUEUED) @@ -754,16 +755,16 @@ static void atomisp_recover_params_queue(struct atomisp_video_pipe *pipe) /* find atomisp_video_pipe with css pipe id, buffer type and atomisp run_mode */ static struct atomisp_video_pipe *__atomisp_get_pipe( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id, - enum atomisp_css_buffer_type buf_type) + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id, + enum atomisp_css_buffer_type buf_type) { struct atomisp_device *isp = asd->isp; if (css_pipe_id == CSS_PIPE_ID_COPY && isp->inputs[asd->input_curr].camera_caps-> - sensor[asd->sensor_curr].stream_num > 1) { + sensor[asd->sensor_curr].stream_num > 1) { switch (stream_id) { case ATOMISP_INPUT_STREAM_PREVIEW: return &asd->video_out_preview; @@ -857,8 +858,7 @@ static struct atomisp_video_pipe *__atomisp_get_pipe( enum atomisp_metadata_type atomisp_get_metadata_type(struct atomisp_sub_device *asd, - enum ia_css_pipe_id pipe_id) -{ + enum ia_css_pipe_id pipe_id) { if (!asd->continuous_mode->val) return ATOMISP_MAIN_METADATA; @@ -926,7 +926,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, list_for_each_entry_safe(s3a_buf, _s3a_buf_tmp, &asd->s3a_stats_in_css, list) { if (s3a_buf->s3a_data == - buffer.css_buffer.data.stats_3a) { + buffer.css_buffer.data.stats_3a) { list_del_init(&s3a_buf->list); list_add_tail(&s3a_buf->list, &asd->s3a_stats_ready); @@ -947,7 +947,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, list_for_each_entry_safe(md_buf, _md_buf_tmp, &asd->metadata_in_css[md_type], list) { if (md_buf->metadata == - buffer.css_buffer.data.metadata) { + buffer.css_buffer.data.metadata) { list_del_init(&md_buf->list); list_add_tail(&md_buf->list, &asd->metadata_ready[md_type]); @@ -961,9 +961,9 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, break; case CSS_BUFFER_TYPE_DIS_STATISTICS: list_for_each_entry_safe(dis_buf, _dis_buf_tmp, - &asd->dis_stats_in_css, list) { + &asd->dis_stats_in_css, list) { if (dis_buf->dis_data == - buffer.css_buffer.data.stats_dvs) { + buffer.css_buffer.data.stats_dvs) { spin_lock_irqsave(&asd->dis_stats_lock, irqflags); list_del_init(&dis_buf->list); @@ -999,7 +999,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, if (IS_BYT && buf_type == CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME && asd->continuous_mode->val && ATOMISP_USE_YUVPP(asd)) frame->exp_id = (asd->postview_exp_id++) % - (ATOMISP_MAX_EXP_ID + 1); + (ATOMISP_MAX_EXP_ID + 1); dev_dbg(isp->dev, "%s: vf frame with exp_id %d is ready\n", __func__, frame->exp_id); @@ -1023,21 +1023,21 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, if (css_pipe_id == IA_CSS_PIPE_ID_CAPTURE && asd->pending_capture_request > 0) { err = atomisp_css_offline_capture_configure(asd, - asd->params.offline_parm.num_captures, - asd->params.offline_parm.skip_frames, - asd->params.offline_parm.offset); + asd->params.offline_parm.num_captures, + asd->params.offline_parm.skip_frames, + asd->params.offline_parm.offset); #ifndef ISP2401 asd->pending_capture_request--; dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", err); #else - asd->pending_capture_request--; - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", - err); - } else { - asd->re_trigger_capture = true; - } + asd->pending_capture_request--; + asd->re_trigger_capture = false; + dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", + err); + } else { + asd->re_trigger_capture = true; + } #endif } break; @@ -1063,7 +1063,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, if (IS_BYT && buf_type == CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME && asd->continuous_mode->val && ATOMISP_USE_YUVPP(asd)) frame->exp_id = (asd->preview_exp_id++) % - (ATOMISP_MAX_EXP_ID + 1); + (ATOMISP_MAX_EXP_ID + 1); dev_dbg(isp->dev, "%s: main frame with exp_id %d is ready\n", __func__, frame->exp_id); @@ -1079,7 +1079,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, pipe->frame_params[vb->i]->params.dvs_6axis) asd->params.dvs_6axis = NULL; atomisp_free_css_parameters( - &pipe->frame_params[vb->i]->params); + &pipe->frame_params[vb->i]->params); kvfree(pipe->frame_params[vb->i]); pipe->frame_params[vb->i] = NULL; } @@ -1090,27 +1090,27 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, if (frame->flash_state == CSS_FRAME_FLASH_STATE_PARTIAL) { asd->frame_status[vb->i] = - ATOMISP_FRAME_STATUS_FLASH_PARTIAL; + ATOMISP_FRAME_STATUS_FLASH_PARTIAL; dev_dbg(isp->dev, "%s partially flashed\n", - __func__); + __func__); } else if (frame->flash_state == CSS_FRAME_FLASH_STATE_FULL) { asd->frame_status[vb->i] = - ATOMISP_FRAME_STATUS_FLASH_EXPOSED; + ATOMISP_FRAME_STATUS_FLASH_EXPOSED; asd->params.num_flash_frames--; dev_dbg(isp->dev, "%s completely flashed\n", - __func__); + __func__); } else { asd->frame_status[vb->i] = - ATOMISP_FRAME_STATUS_OK; + ATOMISP_FRAME_STATUS_OK; dev_dbg(isp->dev, - "%s no flash in this frame\n", - __func__); + "%s no flash in this frame\n", + __func__); } /* Check if flashing sequence is done */ if (asd->frame_status[vb->i] == - ATOMISP_FRAME_STATUS_FLASH_EXPOSED) + ATOMISP_FRAME_STATUS_FLASH_EXPOSED) asd->params.flash_state = ATOMISP_FLASH_DONE; } else if (isp->flash) { if (v4l2_g_ctrl(isp->flash->ctrl_handler, &ctrl) == @@ -1138,14 +1138,14 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, css_pipe_id == CSS_PIPE_ID_VIDEO) { asd->latest_preview_exp_id = frame->exp_id; } else if (css_pipe_id == - CSS_PIPE_ID_CAPTURE) { + CSS_PIPE_ID_CAPTURE) { if (asd->run_mode->val == - ATOMISP_RUN_MODE_VIDEO) + ATOMISP_RUN_MODE_VIDEO) dev_dbg(isp->dev, "SDV capture raw buffer id: %u\n", - frame->exp_id); + frame->exp_id); else dev_dbg(isp->dev, "ZSL capture raw buffer id: %u\n", - frame->exp_id); + frame->exp_id); } } /* @@ -1155,7 +1155,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, * be locked automatically, so record it here. */ if (((css_pipe_id == CSS_PIPE_ID_PREVIEW) || - (css_pipe_id == CSS_PIPE_ID_VIDEO)) && + (css_pipe_id == CSS_PIPE_ID_VIDEO)) && asd->enable_raw_buffer_lock->val && asd->continuous_mode->val) { atomisp_set_raw_buffer_bitmap(asd, frame->exp_id); @@ -1167,7 +1167,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, &asd->params.css_param); if (asd->params.css_param.update_flag.dz_config) atomisp_css_set_dz_config(asd, - &asd->params.css_param.dz_config); + &asd->params.css_param.dz_config); /* New global dvs 6axis config should be blocked * here if there's a buffer with per-frame parameters * pending in CSS frame buffer queue. @@ -1178,7 +1178,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, */ if (asd->params.dvs_6axis) atomisp_css_set_dvs_6axis(asd, - asd->params.dvs_6axis); + asd->params.dvs_6axis); else asd->params.css_update_params_needed = false; /* The update flag should not be cleaned here @@ -1198,7 +1198,8 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, default: break; } - if (vb) { + if (vb) + { vb->ts = ktime_get_ns(); vb->field_count = atomic_read(&asd->sequence) << 1; /*mark videobuffer done for dequeue*/ @@ -1220,13 +1221,14 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, * Requeue should only be done for 3a and dis buffers. * Queue/dequeue order will change if driver recycles image buffers. */ - if (requeue) { + if (requeue) + { err = atomisp_css_queue_buffer(asd, stream_id, css_pipe_id, buf_type, &buffer); if (err) dev_err(isp->dev, "%s, q to css fails: %d\n", - __func__, err); + __func__, err); return; } if (!error && q_buffers) @@ -1249,8 +1251,8 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, void atomisp_delayed_init_work(struct work_struct *work) { struct atomisp_sub_device *asd = container_of(work, - struct atomisp_sub_device, - delayed_init_work); + struct atomisp_sub_device, + delayed_init_work); /* * to SOC camera, use yuvpp pipe and no support continuous mode. */ @@ -1303,7 +1305,7 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) struct ia_css_pipeline_stage *stage; for (stage = acc_pipeline->stages; stage; - stage = stage->next) { + stage = stage->next) { const struct ia_css_fw_info *fw; fw = stage->firmware; @@ -1326,11 +1328,11 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) /* stream off sensor */ ret = v4l2_subdev_call( - isp->inputs[asd->input_curr]. - camera, video, s_stream, 0); + isp->inputs[asd->input_curr]. + camera, video, s_stream, 0); if (ret) dev_warn(isp->dev, - "can't stop streaming on sensor!\n"); + "can't stop streaming on sensor!\n"); atomisp_acc_unload_extensions(asd); @@ -1377,12 +1379,12 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) if (isp->inputs[asd->input_curr].type != FILE_INPUT) atomisp_css_input_set_mode(asd, - CSS_INPUT_MODE_SENSOR); + CSS_INPUT_MODE_SENSOR); css_pipe_id = atomisp_get_css_pipe_id(asd); if (atomisp_css_start(asd, css_pipe_id, true)) dev_warn(isp->dev, - "start SP failed, so do not set streaming to be enable!\n"); + "start SP failed, so do not set streaming to be enable!\n"); else asd->streaming = ATOMISP_DEVICE_STREAMING_ENABLED; @@ -1391,7 +1393,7 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) if (!isp->sw_contex.file_input) { atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF, - atomisp_css_valid_sof(isp)); + atomisp_css_valid_sof(isp)); if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_AUTO, true) < 0) dev_dbg(isp->dev, "dfs failed!\n"); @@ -1413,7 +1415,7 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) reinit_completion(&asd->init_done); asd->delayed_init = ATOMISP_DELAYED_INIT_QUEUED; queue_work(asd->delayed_init_workq, - &asd->delayed_init_work); + &asd->delayed_init_work); } /* * dequeueing buffers is not needed. CSS will recycle @@ -1433,8 +1435,8 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) } ret = v4l2_subdev_call( - isp->inputs[asd->input_curr].camera, video, - s_stream, 1); + isp->inputs[asd->input_curr].camera, video, + s_stream, 1); if (ret) dev_warn(isp->dev, "can't start streaming on sensor!\n"); @@ -1450,7 +1452,7 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) void atomisp_wdt_work(struct work_struct *work) { struct atomisp_device *isp = container_of(work, struct atomisp_device, - wdt_work); + wdt_work); int i; #ifdef ISP2401 unsigned int pipe_wdt_cnt[MAX_STREAM_NUM][4] = { {0} }; @@ -1473,20 +1475,21 @@ void atomisp_wdt_work(struct work_struct *work) struct atomisp_sub_device *asd = &isp->asd[i]; pipe_wdt_cnt[i][0] += - atomic_read(&asd->video_out_capture.wdt_count); + atomic_read(&asd->video_out_capture.wdt_count); pipe_wdt_cnt[i][1] += - atomic_read(&asd->video_out_vf.wdt_count); + atomic_read(&asd->video_out_vf.wdt_count); pipe_wdt_cnt[i][2] += - atomic_read(&asd->video_out_preview.wdt_count); + atomic_read(&asd->video_out_preview.wdt_count); pipe_wdt_cnt[i][3] += - atomic_read(&asd->video_out_video_capture.wdt_count); + atomic_read(&asd->video_out_video_capture.wdt_count); css_recover = - (pipe_wdt_cnt[i][0] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && - pipe_wdt_cnt[i][1] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && - pipe_wdt_cnt[i][2] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && - pipe_wdt_cnt[i][3] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT) - ? true : false; - dev_err(isp->dev, "pipe on asd%d timeout cnt: (%d, %d, %d, %d) of %d, recover = %d\n", + (pipe_wdt_cnt[i][0] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][1] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][2] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][3] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT) + ? true : false; + dev_err(isp->dev, + "pipe on asd%d timeout cnt: (%d, %d, %d, %d) of %d, recover = %d\n", asd->index, pipe_wdt_cnt[i][0], pipe_wdt_cnt[i][1], pipe_wdt_cnt[i][2], pipe_wdt_cnt[i][3], ATOMISP_ISP_MAX_TIMEOUT_COUNT, css_recover); @@ -1610,11 +1613,11 @@ void atomisp_wdt_work(struct work_struct *work) struct atomisp_sub_device *asd = &isp->asd[i]; if (asd->streaming == - ATOMISP_DEVICE_STREAMING_ENABLED) { + ATOMISP_DEVICE_STREAMING_ENABLED) { atomisp_wdt_refresh(asd, - isp->sw_contex.file_input ? - ATOMISP_ISP_FILE_TIMEOUT_DURATION : - ATOMISP_ISP_TIMEOUT_DURATION); + isp->sw_contex.file_input ? + ATOMISP_ISP_FILE_TIMEOUT_DURATION : + ATOMISP_ISP_TIMEOUT_DURATION); } } #endif @@ -1645,7 +1648,7 @@ void atomisp_css_flush(struct atomisp_device *isp) struct atomisp_sub_device *asd = &isp->asd[i]; if (asd->streaming != - ATOMISP_DEVICE_STREAMING_ENABLED) + ATOMISP_DEVICE_STREAMING_ENABLED) continue; atomisp_wdt_refresh(asd, @@ -1669,9 +1672,9 @@ void atomisp_wdt(struct timer_list *t) #ifdef ISP2401 atomic_inc(&pipe->wdt_count); dev_warn(isp->dev, - "[WARNING]asd %d pipe %s ISP timeout %d!\n", - asd->index, pipe->vdev.name, - atomic_read(&pipe->wdt_count)); + "[WARNING]asd %d pipe %s ISP timeout %d!\n", + asd->index, pipe->vdev.name, + atomic_read(&pipe->wdt_count)); #endif if (atomic_read(&isp->wdt_work_queued)) { dev_dbg(isp->dev, "ISP watchdog was put into workqueue\n"); @@ -1685,7 +1688,7 @@ void atomisp_wdt(struct timer_list *t) void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) #else void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, - unsigned int delay) + unsigned int delay) #endif { unsigned long next; @@ -1934,11 +1937,11 @@ int atomisp_get_frame_pgnr(struct atomisp_device *isp, * Get internal fmt according to V4L2 fmt */ static enum atomisp_css_frame_format -v4l2_fmt_to_sh_fmt(u32 fmt) -{ - switch (fmt) { +v4l2_fmt_to_sh_fmt(u32 fmt) { + switch (fmt) + { case V4L2_PIX_FMT_YUV420: - return CSS_FRAME_FORMAT_YUV420; + return CSS_FRAME_FORMAT_YUV420; case V4L2_PIX_FMT_YVU420: return CSS_FRAME_FORMAT_YV12; case V4L2_PIX_FMT_YUV422P: @@ -2084,7 +2087,7 @@ static void atomisp_update_capture_mode(struct atomisp_sub_device *asd) #ifdef ISP2401 int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, - struct atomisp_s_runmode *runmode) + struct atomisp_s_runmode *runmode) { struct atomisp_device *isp = asd->isp; struct v4l2_ctrl *c; @@ -2094,7 +2097,8 @@ int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, CI_MODE_VIDEO, CI_MODE_STILL_CAPTURE, CI_MODE_CONTINUOUS, - CI_MODE_PREVIEW }; + CI_MODE_PREVIEW + }; if (!(runmode && (runmode->mode & RUNMODE_MASK))) return -EINVAL; @@ -2202,7 +2206,7 @@ int atomisp_tnr(struct atomisp_sub_device *asd, int flag, } else { /* Set tnr config to isp parameters */ memcpy(&asd->params.css_param.tnr_config, config, - sizeof(struct atomisp_css_tnr_config)); + sizeof(struct atomisp_css_tnr_config)); atomisp_css_set_tnr_config(asd, &asd->params.css_param.tnr_config); asd->params.css_update_params_needed = true; } @@ -2296,7 +2300,7 @@ int atomisp_ctc(struct atomisp_sub_device *asd, int flag, * Function to update gamma correction parameters */ int atomisp_gamma_correction(struct atomisp_sub_device *asd, int flag, - struct atomisp_gc_config *config) + struct atomisp_gc_config *config) { if (flag == 0) { /* Get gamma correction params from current setup */ @@ -2400,7 +2404,7 @@ static void atomisp_curr_user_grid_info(struct atomisp_sub_device *asd, } int atomisp_compare_grid(struct atomisp_sub_device *asd, - struct atomisp_grid_info *atomgrid) + struct atomisp_grid_info *atomgrid) { struct atomisp_grid_info tmp = {0}; @@ -2429,16 +2433,16 @@ int atomisp_gdc_cac_table(struct atomisp_sub_device *asd, int flag, for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { ret = copy_to_user(config->coordinates_x[i], - tab.coordinates_x[i], tab.height * - tab.width * sizeof(*tab.coordinates_x[i])); + tab.coordinates_x[i], tab.height * + tab.width * sizeof(*tab.coordinates_x[i])); if (ret) { dev_err(isp->dev, "Failed to copy to User for x\n"); return -EFAULT; } ret = copy_to_user(config->coordinates_y[i], - tab.coordinates_y[i], tab.height * - tab.width * sizeof(*tab.coordinates_y[i])); + tab.coordinates_y[i], tab.height * + tab.width * sizeof(*tab.coordinates_y[i])); if (ret) { dev_err(isp->dev, "Failed to copy to User for y\n"); @@ -2447,7 +2451,7 @@ int atomisp_gdc_cac_table(struct atomisp_sub_device *asd, int flag, } } else { struct atomisp_css_morph_table *tab = - asd->params.css_param.morph_table; + asd->params.css_param.morph_table; /* free first if we have one */ if (tab) { @@ -2466,24 +2470,24 @@ int atomisp_gdc_cac_table(struct atomisp_sub_device *asd, int flag, for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { ret = copy_from_user(tab->coordinates_x[i], - config->coordinates_x[i], - config->height * config->width * - sizeof(*config->coordinates_x[i])); + config->coordinates_x[i], + config->height * config->width * + sizeof(*config->coordinates_x[i])); if (ret) { dev_err(isp->dev, - "Failed to copy from User for x, ret %d\n", - ret); + "Failed to copy from User for x, ret %d\n", + ret); atomisp_css_morph_table_free(tab); return -EFAULT; } ret = copy_from_user(tab->coordinates_y[i], - config->coordinates_y[i], - config->height * config->width * - sizeof(*config->coordinates_y[i])); + config->coordinates_y[i], + config->height * config->width * + sizeof(*config->coordinates_y[i])); if (ret) { dev_err(isp->dev, - "Failed to copy from User for y, ret is %d\n", - ret); + "Failed to copy from User for y, ret is %d\n", + ret); atomisp_css_morph_table_free(tab); return -EFAULT; } @@ -2561,7 +2565,7 @@ int atomisp_get_dis_stat(struct atomisp_sub_device *asd, * Function set camrea_prefiles.xml current sensor pixel array size */ int atomisp_set_array_res(struct atomisp_sub_device *asd, - struct atomisp_resolution *config) + struct atomisp_resolution *config) { dev_dbg(asd->isp->dev, ">%s start\n", __func__); if (!config) { @@ -2578,23 +2582,23 @@ int atomisp_set_array_res(struct atomisp_sub_device *asd, * Function to get DVS2 BQ resolution settings */ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, - struct atomisp_dvs2_bq_resolutions *bq_res) + struct atomisp_dvs2_bq_resolutions *bq_res) { struct ia_css_pipe_config *pipe_cfg = NULL; struct ia_css_stream_config *stream_cfg = NULL; struct ia_css_stream_input_config *input_config = NULL; struct ia_css_stream *stream = - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream; + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream; if (!stream) { dev_warn(asd->isp->dev, "stream is not created"); return -EAGAIN; } pipe_cfg = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[CSS_PIPE_ID_VIDEO]; + .pipe_configs[CSS_PIPE_ID_VIDEO]; stream_cfg = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .stream_config; + .stream_config; input_config = &stream_cfg->input_config; if (!bq_res) @@ -2609,9 +2613,9 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, /* the GDC input resolution */ if (!asd->continuous_mode->val) { bq_res->source_bq.width_bq = bq_res->output_bq.width_bq + - pipe_cfg->dvs_envelope.width / 2; + pipe_cfg->dvs_envelope.width / 2; bq_res->source_bq.height_bq = bq_res->output_bq.height_bq + - pipe_cfg->dvs_envelope.height / 2; + pipe_cfg->dvs_envelope.height / 2; /* * Bad pixels caused by spatial filter processing * ISP filter resolution should be given by CSS/FW, but for now @@ -2626,9 +2630,9 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, if (asd->params.video_dis_en) { bq_res->envelope_bq.width_bq = pipe_cfg->dvs_envelope.width - / 2 - bq_res->ispfilter_bq.width_bq; + / 2 - bq_res->ispfilter_bq.width_bq; bq_res->envelope_bq.height_bq = pipe_cfg->dvs_envelope.height - / 2 - bq_res->ispfilter_bq.height_bq; + / 2 - bq_res->ispfilter_bq.height_bq; } } else { unsigned int w_padding; @@ -2642,13 +2646,13 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, * effective_input / bayer_ds_ratio */ bq_res->source_bq.width_bq = - (input_config->effective_res.width * - pipe_cfg->bayer_ds_out_res.width / - input_config->effective_res.width + 1) / 2; + (input_config->effective_res.width * + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width + 1) / 2; bq_res->source_bq.height_bq = - (input_config->effective_res.height * - pipe_cfg->bayer_ds_out_res.height / - input_config->effective_res.height + 1) / 2; + (input_config->effective_res.height * + pipe_cfg->bayer_ds_out_res.height / + input_config->effective_res.height + 1) / 2; if (!asd->params.video_dis_en) { /* @@ -2658,11 +2662,11 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, * formula for SDV. */ bq_res->ispfilter_bq.width_bq = 128 * - pipe_cfg->bayer_ds_out_res.width / - input_config->effective_res.width / 2; + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width / 2; bq_res->ispfilter_bq.height_bq = 128 * - pipe_cfg->bayer_ds_out_res.width / - input_config->effective_res.width / 2; + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width / 2; if (IS_HWREVISION(asd->isp, ATOMISP_HW_REVISION_ISP2401)) { /* No additional left padding for ISYS2401 */ @@ -2680,17 +2684,17 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, * gdc_shift_bq = w_padding/BDS/2 + ispfilter_bq/2 */ gdc_effective_input = - input_config->effective_res.width + - pipe_cfg->dvs_envelope.width; + input_config->effective_res.width + + pipe_cfg->dvs_envelope.width; w_padding = roundup(gdc_effective_input, 128) - - input_config->effective_res.width; + input_config->effective_res.width; w_padding = w_padding * - pipe_cfg->bayer_ds_out_res.width / - input_config->effective_res.width + 1; + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width + 1; w_padding = roundup(w_padding / 2, 1); bq_res->gdc_shift_bq.width_bq = bq_res->ispfilter_bq.width_bq / 2 - + w_padding; + + w_padding; bq_res->gdc_shift_bq.height_bq = 4 / 2; } } else { @@ -2710,9 +2714,9 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, if (w_padding < 12) w_padding = 12; bq_res->gdc_shift_bq.width_bq = 4 / 2 + - ((w_padding - 12) * - pipe_cfg->bayer_ds_out_res.width / - input_config->effective_res.width + 1) / 2; + ((w_padding - 12) * + pipe_cfg->bayer_ds_out_res.width / + input_config->effective_res.width + 1) / 2; bq_res->gdc_shift_bq.height_bq = 4 / 2; } @@ -2727,20 +2731,21 @@ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, pipe_cfg->output_info[0].res.height / 5, ATOM_ISP_STEP_HEIGHT); bq_res->envelope_bq.width_bq = - min((dvs_w / 2), (dvs_w_max / 2)) - - bq_res->ispfilter_bq.width_bq; + min((dvs_w / 2), (dvs_w_max / 2)) - + bq_res->ispfilter_bq.width_bq; bq_res->envelope_bq.height_bq = - min((dvs_h / 2), (dvs_h_max / 2)) - - bq_res->ispfilter_bq.height_bq; + min((dvs_h / 2), (dvs_h_max / 2)) - + bq_res->ispfilter_bq.height_bq; } } - dev_dbg(asd->isp->dev, "source_bq.width_bq %d, source_bq.height_bq %d,\nispfilter_bq.width_bq %d, ispfilter_bq.height_bq %d,\ngdc_shift_bq.width_bq %d, gdc_shift_bq.height_bq %d,\nenvelope_bq.width_bq %d, envelope_bq.height_bq %d,\noutput_bq.width_bq %d, output_bq.height_bq %d\n", - bq_res->source_bq.width_bq, bq_res->source_bq.height_bq, - bq_res->ispfilter_bq.width_bq, bq_res->ispfilter_bq.height_bq, - bq_res->gdc_shift_bq.width_bq, bq_res->gdc_shift_bq.height_bq, - bq_res->envelope_bq.width_bq, bq_res->envelope_bq.height_bq, - bq_res->output_bq.width_bq, bq_res->output_bq.height_bq); + dev_dbg(asd->isp->dev, + "source_bq.width_bq %d, source_bq.height_bq %d,\nispfilter_bq.width_bq %d, ispfilter_bq.height_bq %d,\ngdc_shift_bq.width_bq %d, gdc_shift_bq.height_bq %d,\nenvelope_bq.width_bq %d, envelope_bq.height_bq %d,\noutput_bq.width_bq %d, output_bq.height_bq %d\n", + bq_res->source_bq.width_bq, bq_res->source_bq.height_bq, + bq_res->ispfilter_bq.width_bq, bq_res->ispfilter_bq.height_bq, + bq_res->gdc_shift_bq.width_bq, bq_res->gdc_shift_bq.height_bq, + bq_res->envelope_bq.width_bq, bq_res->envelope_bq.height_bq, + bq_res->output_bq.width_bq, bq_res->output_bq.height_bq); return 0; } @@ -2781,13 +2786,13 @@ int atomisp_3a_stat(struct atomisp_sub_device *asd, int flag, } s3a_buf = list_entry(asd->s3a_stats_ready.next, - struct atomisp_s3a_buf, list); + struct atomisp_s3a_buf, list); if (s3a_buf->s3a_map) ia_css_translate_3a_statistics( - asd->params.s3a_user_stat, s3a_buf->s3a_map); + asd->params.s3a_user_stat, s3a_buf->s3a_map); else ia_css_get_3a_statistics(asd->params.s3a_user_stat, - s3a_buf->s3a_data); + s3a_buf->s3a_data); config->exp_id = s3a_buf->s3a_data->exp_id; config->isp_config_id = s3a_buf->s3a_data->isp_config_id; @@ -2796,14 +2801,15 @@ int atomisp_3a_stat(struct atomisp_sub_device *asd, int flag, asd->params.s3a_output_bytes); if (ret) { dev_err(isp->dev, "copy to user failed: copied %lu bytes\n", - ret); + ret); return -EFAULT; } /* Move to free buffer list */ list_del_init(&s3a_buf->list); list_add_tail(&s3a_buf->list, &asd->s3a_stats); - dev_dbg(isp->dev, "%s: finish getting exp_id %d 3a stat, isp_config_id %d\n", __func__, + dev_dbg(isp->dev, "%s: finish getting exp_id %d 3a stat, isp_config_id %d\n", + __func__, config->exp_id, config->isp_config_id); return 0; } @@ -2823,9 +2829,9 @@ int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag, return -EINVAL; stream_config = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - stream_config; + stream_config; stream_info = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - stream_info; + stream_info; /* We always return the resolution and stride even if there is * no valid metadata. This allows the caller to get the information @@ -2847,14 +2853,14 @@ int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag, } mipi_info = atomisp_to_sensor_mipi_info( - isp->inputs[asd->input_curr].camera); + isp->inputs[asd->input_curr].camera); if (!mipi_info) return -EINVAL; if (mipi_info->metadata_effective_width) { for (i = 0; i < md->height; i++) md->effective_width[i] = - mipi_info->metadata_effective_width[i]; + mipi_info->metadata_effective_width[i]; } md_buf = list_entry(asd->metadata_ready[md_type].next, @@ -2866,8 +2872,8 @@ int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag, stream_info->metadata_info.size); } else { hmm_load(md_buf->metadata->address, - asd->params.metadata_user[md_type], - stream_info->metadata_info.size); + asd->params.metadata_user[md_type], + stream_info->metadata_info.size); ret = copy_to_user(md->data, asd->params.metadata_user[md_type], @@ -2902,9 +2908,9 @@ int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag, return -EINVAL; stream_config = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - stream_config; + stream_config; stream_info = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - stream_info; + stream_info; /* We always return the resolution and stride even if there is * no valid metadata. This allows the caller to get the information @@ -2930,14 +2936,14 @@ int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag, } mipi_info = atomisp_to_sensor_mipi_info( - isp->inputs[asd->input_curr].camera); + isp->inputs[asd->input_curr].camera); if (!mipi_info) return -EINVAL; if (mipi_info->metadata_effective_width) { for (i = 0; i < md->height; i++) md->effective_width[i] = - mipi_info->metadata_effective_width[i]; + mipi_info->metadata_effective_width[i]; } md_buf = list_entry(asd->metadata_ready[md_type].next, @@ -2949,8 +2955,8 @@ int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag, stream_info->metadata_info.size); } else { hmm_load(md_buf->metadata->address, - asd->params.metadata_user[md_type], - stream_info->metadata_info.size); + asd->params.metadata_user[md_type], + stream_info->metadata_info.size); ret = copy_to_user(md->data, asd->params.metadata_user[md_type], @@ -2978,7 +2984,7 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; struct atomisp_resolution eff_res, out_res; #ifdef ISP2401 int w_offset, h_offset; @@ -2991,26 +2997,26 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, return 0; if (css_pipe_id != IA_CSS_PIPE_ID_PREVIEW - && css_pipe_id != IA_CSS_PIPE_ID_CAPTURE) { + && css_pipe_id != IA_CSS_PIPE_ID_CAPTURE) { dev_err(asd->isp->dev, "%s the set pipe no support crop region" , __func__); return -EINVAL; } eff_res.width = - stream_env->stream_config.input_config.effective_res.width; + stream_env->stream_config.input_config.effective_res.width; eff_res.height = - stream_env->stream_config.input_config.effective_res.height; + stream_env->stream_config.input_config.effective_res.height; if (eff_res.width == 0 || eff_res.height == 0) { dev_err(asd->isp->dev, "%s err effective resolution" - , __func__); + , __func__); return -EINVAL; } if (dz_config->zoom_region.resolution.width - == asd->sensor_array_res.width - || dz_config->zoom_region.resolution.height - == asd->sensor_array_res.height) { + == asd->sensor_array_res.width + || dz_config->zoom_region.resolution.height + == asd->sensor_array_res.height) { /*no need crop region*/ dz_config->zoom_region.origin.x = 0; dz_config->zoom_region.origin.y = 0; @@ -3026,75 +3032,75 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, */ #ifdef ISP2401 out_res.width = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; + stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; out_res.height = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; + stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; if (out_res.width == 0 || out_res.height == 0) { dev_err(asd->isp->dev, "%s err current pipe output resolution" - , __func__); + , __func__); return -EINVAL; } if (asd->sensor_array_res.width * out_res.height - < out_res.width * asd->sensor_array_res.height) { + < out_res.width * asd->sensor_array_res.height) { h_offset = asd->sensor_array_res.height - - asd->sensor_array_res.width - * out_res.height / out_res.width; + asd->sensor_array_res.width + * out_res.height / out_res.width; h_offset = h_offset / 2; if (dz_config->zoom_region.origin.y < h_offset) dz_config->zoom_region.origin.y = 0; else dz_config->zoom_region.origin.y = - dz_config->zoom_region.origin.y - h_offset; + dz_config->zoom_region.origin.y - h_offset; w_offset = 0; } else { w_offset = asd->sensor_array_res.width - - asd->sensor_array_res.height - * out_res.width / out_res.height; + asd->sensor_array_res.height + * out_res.width / out_res.height; w_offset = w_offset / 2; if (dz_config->zoom_region.origin.x < w_offset) dz_config->zoom_region.origin.x = 0; else dz_config->zoom_region.origin.x = - dz_config->zoom_region.origin.x - w_offset; + dz_config->zoom_region.origin.x - w_offset; h_offset = 0; } #endif dz_config->zoom_region.origin.x = - dz_config->zoom_region.origin.x - * eff_res.width + dz_config->zoom_region.origin.x + * eff_res.width #ifndef ISP2401 - / asd->sensor_array_res.width; + / asd->sensor_array_res.width; #else - / (asd->sensor_array_res.width - - 2 * w_offset); + / (asd->sensor_array_res.width - + 2 * w_offset); #endif dz_config->zoom_region.origin.y = - dz_config->zoom_region.origin.y - * eff_res.height + dz_config->zoom_region.origin.y + * eff_res.height #ifndef ISP2401 - / asd->sensor_array_res.height; + / asd->sensor_array_res.height; #else - / (asd->sensor_array_res.height - - 2 * h_offset); + / (asd->sensor_array_res.height - + 2 * h_offset); #endif dz_config->zoom_region.resolution.width = - dz_config->zoom_region.resolution.width - * eff_res.width + dz_config->zoom_region.resolution.width + * eff_res.width #ifndef ISP2401 - / asd->sensor_array_res.width; + / asd->sensor_array_res.width; #else - / (asd->sensor_array_res.width - - 2 * w_offset); + / (asd->sensor_array_res.width - + 2 * w_offset); #endif dz_config->zoom_region.resolution.height = - dz_config->zoom_region.resolution.height - * eff_res.height + dz_config->zoom_region.resolution.height + * eff_res.height #ifndef ISP2401 - / asd->sensor_array_res.height; + / asd->sensor_array_res.height; #else - / (asd->sensor_array_res.height - - 2 * h_offset); + / (asd->sensor_array_res.height - + 2 * h_offset); #endif /* @@ -3103,42 +3109,43 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, */ #ifndef ISP2401 out_res.width = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; + stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; out_res.height = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; + stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; if (out_res.width == 0 || out_res.height == 0) { dev_err(asd->isp->dev, "%s err current pipe output resolution" - , __func__); + , __func__); return -EINVAL; } #endif if (out_res.width * dz_config->zoom_region.resolution.height - > dz_config->zoom_region.resolution.width * out_res.height) { + > dz_config->zoom_region.resolution.width * out_res.height) { dz_config->zoom_region.resolution.height = - dz_config->zoom_region.resolution.width - * out_res.height / out_res.width; + dz_config->zoom_region.resolution.width + * out_res.height / out_res.width; } else { dz_config->zoom_region.resolution.width = - dz_config->zoom_region.resolution.height - * out_res.width / out_res.height; - } - dev_dbg(asd->isp->dev, "%s crop region:(%d,%d),(%d,%d) eff_res(%d, %d) array_size(%d,%d) out_res(%d, %d)\n", - __func__, dz_config->zoom_region.origin.x, - dz_config->zoom_region.origin.y, - dz_config->zoom_region.resolution.width, - dz_config->zoom_region.resolution.height, - eff_res.width, eff_res.height, - asd->sensor_array_res.width, - asd->sensor_array_res.height, - out_res.width, out_res.height); + dz_config->zoom_region.resolution.height + * out_res.width / out_res.height; + } + dev_dbg(asd->isp->dev, + "%s crop region:(%d,%d),(%d,%d) eff_res(%d, %d) array_size(%d,%d) out_res(%d, %d)\n", + __func__, dz_config->zoom_region.origin.x, + dz_config->zoom_region.origin.y, + dz_config->zoom_region.resolution.width, + dz_config->zoom_region.resolution.height, + eff_res.width, eff_res.height, + asd->sensor_array_res.width, + asd->sensor_array_res.height, + out_res.width, out_res.height); if ((dz_config->zoom_region.origin.x + - dz_config->zoom_region.resolution.width - > eff_res.width) || - (dz_config->zoom_region.origin.y + - dz_config->zoom_region.resolution.height - > eff_res.height)) + dz_config->zoom_region.resolution.width + > eff_res.width) || + (dz_config->zoom_region.origin.y + + dz_config->zoom_region.resolution.height + > eff_res.height)) return -EINVAL; return 0; @@ -3148,8 +3155,8 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, * Function to check the zoom region whether is effective */ static bool atomisp_check_zoom_region( - struct atomisp_sub_device *asd, - struct ia_css_dz_config *dz_config) + struct atomisp_sub_device *asd, + struct ia_css_dz_config *dz_config) { struct atomisp_resolution config; bool flag = false; @@ -3163,15 +3170,16 @@ static bool atomisp_check_zoom_region( config.width = asd->sensor_array_res.width; config.height = asd->sensor_array_res.height; w = dz_config->zoom_region.origin.x + - dz_config->zoom_region.resolution.width; + dz_config->zoom_region.resolution.width; h = dz_config->zoom_region.origin.y + - dz_config->zoom_region.resolution.height; + dz_config->zoom_region.resolution.height; if ((w <= config.width) && (h <= config.height) && w > 0 && h > 0) flag = true; else /* setting error zoom region */ - dev_err(asd->isp->dev, "%s zoom region ERROR:dz_config:(%d,%d),(%d,%d)array_res(%d, %d)\n", + dev_err(asd->isp->dev, + "%s zoom region ERROR:dz_config:(%d,%d),(%d,%d)array_res(%d, %d)\n", __func__, dz_config->zoom_region.origin.x, dz_config->zoom_region.origin.y, dz_config->zoom_region.resolution.width, @@ -3182,8 +3190,8 @@ static bool atomisp_check_zoom_region( } void atomisp_apply_css_parameters( - struct atomisp_sub_device *asd, - struct atomisp_css_params *css_param) + struct atomisp_sub_device *asd, + struct atomisp_css_params *css_param) { if (css_param->update_flag.wb_config) atomisp_css_set_wb_config(asd, &css_param->wb_config); @@ -3235,11 +3243,11 @@ void atomisp_apply_css_parameters( if (css_param->update_flag.yuv2rgb_cc_config) atomisp_css_set_yuv2rgb_cc_config(asd, - &css_param->yuv2rgb_cc_config); + &css_param->yuv2rgb_cc_config); if (css_param->update_flag.rgb2yuv_cc_config) atomisp_css_set_rgb2yuv_cc_config(asd, - &css_param->rgb2yuv_cc_config); + &css_param->rgb2yuv_cc_config); if (css_param->update_flag.macc_table) atomisp_css_set_macc_table(asd, &css_param->macc_table); @@ -3267,8 +3275,8 @@ void atomisp_apply_css_parameters( if (css_param->update_flag.dvs2_coefs) { struct atomisp_css_dvs_grid_info *dvs_grid_info = - atomisp_css_get_dvs_grid_info( - &asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info( + &asd->params.curr_grid_info); if (dvs_grid_info && dvs_grid_info->enable) atomisp_css_set_dvs2_coefs(asd, css_param->dvs2_coeff); @@ -3292,7 +3300,7 @@ void atomisp_apply_css_parameters( } static unsigned int long copy_from_compatible(void *to, const void *from, - unsigned long n, bool from_user) + unsigned long n, bool from_user) { if (from_user) return copy_from_user(to, (void __user *)from, n); @@ -3313,269 +3321,269 @@ int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, if (arg->wb_config && (from_user || !cur_config->wb_config)) { if (copy_from_compatible(&css_param->wb_config, arg->wb_config, - sizeof(struct atomisp_css_wb_config), - from_user)) + sizeof(struct atomisp_css_wb_config), + from_user)) return -EFAULT; css_param->update_flag.wb_config = - (struct atomisp_wb_config *)&css_param->wb_config; + (struct atomisp_wb_config *)&css_param->wb_config; } if (arg->ob_config && (from_user || !cur_config->ob_config)) { if (copy_from_compatible(&css_param->ob_config, arg->ob_config, - sizeof(struct atomisp_css_ob_config), - from_user)) + sizeof(struct atomisp_css_ob_config), + from_user)) return -EFAULT; css_param->update_flag.ob_config = - (struct atomisp_ob_config *)&css_param->ob_config; + (struct atomisp_ob_config *)&css_param->ob_config; } if (arg->dp_config && (from_user || !cur_config->dp_config)) { if (copy_from_compatible(&css_param->dp_config, arg->dp_config, - sizeof(struct atomisp_css_dp_config), - from_user)) + sizeof(struct atomisp_css_dp_config), + from_user)) return -EFAULT; css_param->update_flag.dp_config = - (struct atomisp_dp_config *)&css_param->dp_config; + (struct atomisp_dp_config *)&css_param->dp_config; } if (asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { if (arg->dz_config && (from_user || !cur_config->dz_config)) { if (copy_from_compatible(&css_param->dz_config, - arg->dz_config, - sizeof(struct atomisp_css_dz_config), - from_user)) + arg->dz_config, + sizeof(struct atomisp_css_dz_config), + from_user)) return -EFAULT; if (!atomisp_check_zoom_region(asd, - &css_param->dz_config)) { + &css_param->dz_config)) { dev_err(asd->isp->dev, "crop region error!"); return -EINVAL; } css_param->update_flag.dz_config = - (struct atomisp_dz_config *) - &css_param->dz_config; + (struct atomisp_dz_config *) + &css_param->dz_config; } } if (arg->nr_config && (from_user || !cur_config->nr_config)) { if (copy_from_compatible(&css_param->nr_config, arg->nr_config, - sizeof(struct atomisp_css_nr_config), - from_user)) + sizeof(struct atomisp_css_nr_config), + from_user)) return -EFAULT; css_param->update_flag.nr_config = - (struct atomisp_nr_config *)&css_param->nr_config; + (struct atomisp_nr_config *)&css_param->nr_config; } if (arg->ee_config && (from_user || !cur_config->ee_config)) { if (copy_from_compatible(&css_param->ee_config, arg->ee_config, - sizeof(struct atomisp_css_ee_config), - from_user)) + sizeof(struct atomisp_css_ee_config), + from_user)) return -EFAULT; css_param->update_flag.ee_config = - (struct atomisp_ee_config *)&css_param->ee_config; + (struct atomisp_ee_config *)&css_param->ee_config; } if (arg->tnr_config && (from_user || !cur_config->tnr_config)) { if (copy_from_compatible(&css_param->tnr_config, - arg->tnr_config, - sizeof(struct atomisp_css_tnr_config), - from_user)) + arg->tnr_config, + sizeof(struct atomisp_css_tnr_config), + from_user)) return -EFAULT; css_param->update_flag.tnr_config = - (struct atomisp_tnr_config *) - &css_param->tnr_config; + (struct atomisp_tnr_config *) + &css_param->tnr_config; } if (arg->a3a_config && (from_user || !cur_config->a3a_config)) { if (copy_from_compatible(&css_param->s3a_config, - arg->a3a_config, - sizeof(struct atomisp_css_3a_config), - from_user)) + arg->a3a_config, + sizeof(struct atomisp_css_3a_config), + from_user)) return -EFAULT; css_param->update_flag.a3a_config = - (struct atomisp_3a_config *)&css_param->s3a_config; + (struct atomisp_3a_config *)&css_param->s3a_config; } if (arg->ctc_config && (from_user || !cur_config->ctc_config)) { if (copy_from_compatible(&css_param->ctc_config, - arg->ctc_config, - sizeof(struct atomisp_css_ctc_config), - from_user)) + arg->ctc_config, + sizeof(struct atomisp_css_ctc_config), + from_user)) return -EFAULT; css_param->update_flag.ctc_config = - (struct atomisp_ctc_config *) - &css_param->ctc_config; + (struct atomisp_ctc_config *) + &css_param->ctc_config; } if (arg->cnr_config && (from_user || !cur_config->cnr_config)) { if (copy_from_compatible(&css_param->cnr_config, - arg->cnr_config, - sizeof(struct atomisp_css_cnr_config), - from_user)) + arg->cnr_config, + sizeof(struct atomisp_css_cnr_config), + from_user)) return -EFAULT; css_param->update_flag.cnr_config = - (struct atomisp_cnr_config *) - &css_param->cnr_config; + (struct atomisp_cnr_config *) + &css_param->cnr_config; } if (arg->ecd_config && (from_user || !cur_config->ecd_config)) { if (copy_from_compatible(&css_param->ecd_config, - arg->ecd_config, - sizeof(struct atomisp_css_ecd_config), - from_user)) + arg->ecd_config, + sizeof(struct atomisp_css_ecd_config), + from_user)) return -EFAULT; css_param->update_flag.ecd_config = - (struct atomisp_ecd_config *) - &css_param->ecd_config; + (struct atomisp_ecd_config *) + &css_param->ecd_config; } if (arg->ynr_config && (from_user || !cur_config->ynr_config)) { if (copy_from_compatible(&css_param->ynr_config, - arg->ynr_config, - sizeof(struct atomisp_css_ynr_config), - from_user)) + arg->ynr_config, + sizeof(struct atomisp_css_ynr_config), + from_user)) return -EFAULT; css_param->update_flag.ynr_config = - (struct atomisp_ynr_config *) - &css_param->ynr_config; + (struct atomisp_ynr_config *) + &css_param->ynr_config; } if (arg->fc_config && (from_user || !cur_config->fc_config)) { if (copy_from_compatible(&css_param->fc_config, - arg->fc_config, - sizeof(struct atomisp_css_fc_config), - from_user)) + arg->fc_config, + sizeof(struct atomisp_css_fc_config), + from_user)) return -EFAULT; css_param->update_flag.fc_config = - (struct atomisp_fc_config *)&css_param->fc_config; + (struct atomisp_fc_config *)&css_param->fc_config; } if (arg->macc_config && (from_user || !cur_config->macc_config)) { if (copy_from_compatible(&css_param->macc_config, - arg->macc_config, - sizeof(struct atomisp_css_macc_config), - from_user)) + arg->macc_config, + sizeof(struct atomisp_css_macc_config), + from_user)) return -EFAULT; css_param->update_flag.macc_config = - (struct atomisp_macc_config *) - &css_param->macc_config; + (struct atomisp_macc_config *) + &css_param->macc_config; } if (arg->aa_config && (from_user || !cur_config->aa_config)) { if (copy_from_compatible(&css_param->aa_config, arg->aa_config, - sizeof(struct atomisp_css_aa_config), - from_user)) + sizeof(struct atomisp_css_aa_config), + from_user)) return -EFAULT; css_param->update_flag.aa_config = - (struct atomisp_aa_config *)&css_param->aa_config; + (struct atomisp_aa_config *)&css_param->aa_config; } if (arg->anr_config && (from_user || !cur_config->anr_config)) { if (copy_from_compatible(&css_param->anr_config, - arg->anr_config, - sizeof(struct atomisp_css_anr_config), - from_user)) + arg->anr_config, + sizeof(struct atomisp_css_anr_config), + from_user)) return -EFAULT; css_param->update_flag.anr_config = - (struct atomisp_anr_config *) - &css_param->anr_config; + (struct atomisp_anr_config *) + &css_param->anr_config; } if (arg->xnr_config && (from_user || !cur_config->xnr_config)) { if (copy_from_compatible(&css_param->xnr_config, - arg->xnr_config, - sizeof(struct atomisp_css_xnr_config), - from_user)) + arg->xnr_config, + sizeof(struct atomisp_css_xnr_config), + from_user)) return -EFAULT; css_param->update_flag.xnr_config = - (struct atomisp_xnr_config *) - &css_param->xnr_config; + (struct atomisp_xnr_config *) + &css_param->xnr_config; } if (arg->yuv2rgb_cc_config && - (from_user || !cur_config->yuv2rgb_cc_config)) { + (from_user || !cur_config->yuv2rgb_cc_config)) { if (copy_from_compatible(&css_param->yuv2rgb_cc_config, - arg->yuv2rgb_cc_config, - sizeof(struct atomisp_css_cc_config), - from_user)) + arg->yuv2rgb_cc_config, + sizeof(struct atomisp_css_cc_config), + from_user)) return -EFAULT; css_param->update_flag.yuv2rgb_cc_config = - (struct atomisp_cc_config *) - &css_param->yuv2rgb_cc_config; + (struct atomisp_cc_config *) + &css_param->yuv2rgb_cc_config; } if (arg->rgb2yuv_cc_config && - (from_user || !cur_config->rgb2yuv_cc_config)) { + (from_user || !cur_config->rgb2yuv_cc_config)) { if (copy_from_compatible(&css_param->rgb2yuv_cc_config, - arg->rgb2yuv_cc_config, - sizeof(struct atomisp_css_cc_config), - from_user)) + arg->rgb2yuv_cc_config, + sizeof(struct atomisp_css_cc_config), + from_user)) return -EFAULT; css_param->update_flag.rgb2yuv_cc_config = - (struct atomisp_cc_config *) - &css_param->rgb2yuv_cc_config; + (struct atomisp_cc_config *) + &css_param->rgb2yuv_cc_config; } if (arg->macc_table && (from_user || !cur_config->macc_table)) { if (copy_from_compatible(&css_param->macc_table, - arg->macc_table, - sizeof(struct atomisp_css_macc_table), - from_user)) + arg->macc_table, + sizeof(struct atomisp_css_macc_table), + from_user)) return -EFAULT; css_param->update_flag.macc_table = - (struct atomisp_macc_table *) - &css_param->macc_table; + (struct atomisp_macc_table *) + &css_param->macc_table; } if (arg->xnr_table && (from_user || !cur_config->xnr_table)) { if (copy_from_compatible(&css_param->xnr_table, - arg->xnr_table, - sizeof(struct atomisp_css_xnr_table), - from_user)) + arg->xnr_table, + sizeof(struct atomisp_css_xnr_table), + from_user)) return -EFAULT; css_param->update_flag.xnr_table = - (struct atomisp_xnr_table *)&css_param->xnr_table; + (struct atomisp_xnr_table *)&css_param->xnr_table; } if (arg->r_gamma_table && (from_user || !cur_config->r_gamma_table)) { if (copy_from_compatible(&css_param->r_gamma_table, - arg->r_gamma_table, - sizeof(struct atomisp_css_rgb_gamma_table), - from_user)) + arg->r_gamma_table, + sizeof(struct atomisp_css_rgb_gamma_table), + from_user)) return -EFAULT; css_param->update_flag.r_gamma_table = - (struct atomisp_rgb_gamma_table *) - &css_param->r_gamma_table; + (struct atomisp_rgb_gamma_table *) + &css_param->r_gamma_table; } if (arg->g_gamma_table && (from_user || !cur_config->g_gamma_table)) { if (copy_from_compatible(&css_param->g_gamma_table, - arg->g_gamma_table, - sizeof(struct atomisp_css_rgb_gamma_table), - from_user)) + arg->g_gamma_table, + sizeof(struct atomisp_css_rgb_gamma_table), + from_user)) return -EFAULT; css_param->update_flag.g_gamma_table = - (struct atomisp_rgb_gamma_table *) - &css_param->g_gamma_table; + (struct atomisp_rgb_gamma_table *) + &css_param->g_gamma_table; } if (arg->b_gamma_table && (from_user || !cur_config->b_gamma_table)) { if (copy_from_compatible(&css_param->b_gamma_table, - arg->b_gamma_table, - sizeof(struct atomisp_css_rgb_gamma_table), - from_user)) + arg->b_gamma_table, + sizeof(struct atomisp_css_rgb_gamma_table), + from_user)) return -EFAULT; css_param->update_flag.b_gamma_table = - (struct atomisp_rgb_gamma_table *) - &css_param->b_gamma_table; + (struct atomisp_rgb_gamma_table *) + &css_param->b_gamma_table; } if (arg->anr_thres && (from_user || !cur_config->anr_thres)) { if (copy_from_compatible(&css_param->anr_thres, arg->anr_thres, - sizeof(struct atomisp_css_anr_thres), - from_user)) + sizeof(struct atomisp_css_anr_thres), + from_user)) return -EFAULT; css_param->update_flag.anr_thres = - (struct atomisp_anr_thres *)&css_param->anr_thres; + (struct atomisp_anr_thres *)&css_param->anr_thres; } if (from_user) @@ -3654,101 +3662,101 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, #endif return -EINVAL; #ifdef ISP2401 - } -#endif } +#endif +} - /* Shading table size per color */ +/* Shading table size per color */ #ifndef ISP2401 - if (source_st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - source_st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) +if (source_st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + source_st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) #else - if (st.width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - st.height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { - dev_err(asd->isp->dev, "shading table w/h validate failed!"); +if (st.width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + st.height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { + dev_err(asd->isp->dev, "shading table w/h validate failed!"); #endif - return -EINVAL; + return -EINVAL; #ifdef ISP2401 - } +} #endif #ifndef ISP2401 - shading_table = atomisp_css_shading_table_alloc(source_st->width, - source_st->height); - if (!shading_table) - return -ENOMEM; +shading_table = atomisp_css_shading_table_alloc(source_st->width, + source_st->height); +if (!shading_table) + return -ENOMEM; #else - shading_table = atomisp_css_shading_table_alloc(st.width, - st.height); - if (!shading_table) { - dev_err(asd->isp->dev, "shading table alloc failed!"); - return -ENOMEM; - } +shading_table = atomisp_css_shading_table_alloc(st.width, + st.height); +if (!shading_table) { + dev_err(asd->isp->dev, "shading table alloc failed!"); + return -ENOMEM; +} #endif #ifndef ISP2401 - len_table = source_st->width * source_st->height * ATOMISP_SC_TYPE_SIZE; +len_table = source_st->width * source_st->height * ATOMISP_SC_TYPE_SIZE; #else - len_table = st.width * st.height * ATOMISP_SC_TYPE_SIZE; +len_table = st.width * st.height * ATOMISP_SC_TYPE_SIZE; #endif - for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { - if (copy_from_compatible(shading_table->data[i], +for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { + if (copy_from_compatible(shading_table->data[i], #ifndef ISP2401 - source_st->data[i], len_table, from_user)) { + source_st->data[i], len_table, from_user)) { #else - st.data[i], len_table, from_user)) { + st.data[i], len_table, from_user)) { #endif - atomisp_css_shading_table_free(shading_table); - return -EFAULT; - } + atomisp_css_shading_table_free(shading_table); + return -EFAULT; } +} #ifndef ISP2401 - shading_table->sensor_width = source_st->sensor_width; - shading_table->sensor_height = source_st->sensor_height; - shading_table->fraction_bits = source_st->fraction_bits; - shading_table->enable = source_st->enable; +shading_table->sensor_width = source_st->sensor_width; +shading_table->sensor_height = source_st->sensor_height; +shading_table->fraction_bits = source_st->fraction_bits; +shading_table->enable = source_st->enable; #else - shading_table->sensor_width = st.sensor_width; - shading_table->sensor_height = st.sensor_height; - shading_table->fraction_bits = st.fraction_bits; - shading_table->enable = st.enable; +shading_table->sensor_width = st.sensor_width; +shading_table->sensor_height = st.sensor_height; +shading_table->fraction_bits = st.fraction_bits; +shading_table->enable = st.enable; #endif - /* No need to update shading table if it is the same */ - if (old_table && - old_table->sensor_width == shading_table->sensor_width && - old_table->sensor_height == shading_table->sensor_height && - old_table->width == shading_table->width && - old_table->height == shading_table->height && - old_table->fraction_bits == shading_table->fraction_bits && - old_table->enable == shading_table->enable) { - bool data_is_same = true; - - for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { - if (memcmp(shading_table->data[i], old_table->data[i], - len_table) != 0) { - data_is_same = false; - break; - } - } +/* No need to update shading table if it is the same */ +if (old_table && + old_table->sensor_width == shading_table->sensor_width && + old_table->sensor_height == shading_table->sensor_height && + old_table->width == shading_table->width && + old_table->height == shading_table->height && + old_table->fraction_bits == shading_table->fraction_bits && + old_table->enable == shading_table->enable) { + bool data_is_same = true; - if (data_is_same) { - atomisp_css_shading_table_free(shading_table); - return 0; + for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { + if (memcmp(shading_table->data[i], old_table->data[i], + len_table) != 0) { + data_is_same = false; + break; } } + if (data_is_same) { + atomisp_css_shading_table_free(shading_table); + return 0; + } +} + set_lsc: - /* set LSC to CSS */ - css_param->shading_table = shading_table; - css_param->update_flag.shading_table = - (struct atomisp_shading_table *)shading_table; - asd->params.sc_en = shading_table; +/* set LSC to CSS */ +css_param->shading_table = shading_table; +css_param->update_flag.shading_table = + (struct atomisp_shading_table *)shading_table; +asd->params.sc_en = shading_table; - if (old_table) - atomisp_css_shading_table_free(old_table); +if (old_table) + atomisp_css_shading_table_free(old_table); - return 0; +return 0; } int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, @@ -3757,7 +3765,7 @@ int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, bool from_user) { struct atomisp_css_dvs_grid_info *cur = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); int dvs_hor_coef_bytes, dvs_ver_coef_bytes; #ifdef ISP2401 struct ia_css_dvs2_coefficients dvs2_coefs; @@ -3822,51 +3830,51 @@ int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, dvs_ver_coef_bytes = asd->params.dvs_ver_coef_bytes; if (copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_real, #ifndef ISP2401 - coefs->hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || + coefs->hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || #else - dvs2_coefs.hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || + dvs2_coefs.hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || #endif copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_imag, #ifndef ISP2401 - coefs->hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || + coefs->hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || #else - dvs2_coefs.hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || + dvs2_coefs.hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || #endif copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_real, #ifndef ISP2401 - coefs->hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || + coefs->hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || #else - dvs2_coefs.hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || + dvs2_coefs.hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || #endif copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_imag, #ifndef ISP2401 - coefs->hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || + coefs->hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || #else - dvs2_coefs.hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || + dvs2_coefs.hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || #endif copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_real, #ifndef ISP2401 - coefs->ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || + coefs->ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || #else - dvs2_coefs.ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || + dvs2_coefs.ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || #endif copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_imag, #ifndef ISP2401 - coefs->ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || + coefs->ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || #else - dvs2_coefs.ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || + dvs2_coefs.ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || #endif copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_real, #ifndef ISP2401 - coefs->ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || + coefs->ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || #else - dvs2_coefs.ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || + dvs2_coefs.ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || #endif copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_imag, #ifndef ISP2401 - coefs->ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { + coefs->ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { #else - dvs2_coefs.ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { + dvs2_coefs.ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { #endif ia_css_dvs2_coefficients_free(css_param->dvs2_coeff); css_param->dvs2_coeff = NULL; @@ -3879,9 +3887,9 @@ int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, } int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, - struct atomisp_dvs_6axis_config *source_6axis_config, - struct atomisp_css_params *css_param, - bool from_user) + struct atomisp_dvs_6axis_config *source_6axis_config, + struct atomisp_css_params *css_param, + bool from_user) { struct atomisp_css_dvs_6axis_config *dvs_6axis_config; struct atomisp_css_dvs_6axis_config *old_6axis_config; @@ -3889,9 +3897,9 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, struct atomisp_css_dvs_6axis_config t_6axis_config; #endif struct ia_css_stream *stream = - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream; + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream; struct atomisp_css_dvs_grid_info *dvs_grid_info = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); int ret = -EFAULT; if (!stream) { @@ -3914,8 +3922,8 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, #ifdef ISP2401 if (copy_from_compatible(&t_6axis_config, source_6axis_config, - sizeof(struct atomisp_dvs_6axis_config), - from_user)) { + sizeof(struct atomisp_dvs_6axis_config), + from_user)) { dev_err(asd->isp->dev, "copy morph table failed!"); return -EFAULT; } @@ -3953,64 +3961,64 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, if (copy_from_compatible(dvs_6axis_config->xcoords_y, #ifndef ISP2401 - source_6axis_config->xcoords_y, - source_6axis_config->width_y * - source_6axis_config->height_y * - sizeof(*source_6axis_config->xcoords_y), + source_6axis_config->xcoords_y, + source_6axis_config->width_y * + source_6axis_config->height_y * + sizeof(*source_6axis_config->xcoords_y), #else - t_6axis_config.xcoords_y, - t_6axis_config.width_y * - t_6axis_config.height_y * - sizeof(*dvs_6axis_config->xcoords_y), + t_6axis_config.xcoords_y, + t_6axis_config.width_y * + t_6axis_config.height_y * + sizeof(*dvs_6axis_config->xcoords_y), #endif - from_user)) + from_user)) goto error; if (copy_from_compatible(dvs_6axis_config->ycoords_y, #ifndef ISP2401 - source_6axis_config->ycoords_y, - source_6axis_config->width_y * - source_6axis_config->height_y * - sizeof(*source_6axis_config->ycoords_y), + source_6axis_config->ycoords_y, + source_6axis_config->width_y * + source_6axis_config->height_y * + sizeof(*source_6axis_config->ycoords_y), #else - t_6axis_config.ycoords_y, - t_6axis_config.width_y * - t_6axis_config.height_y * - sizeof(*dvs_6axis_config->ycoords_y), + t_6axis_config.ycoords_y, + t_6axis_config.width_y * + t_6axis_config.height_y * + sizeof(*dvs_6axis_config->ycoords_y), #endif - from_user)) + from_user)) goto error; if (copy_from_compatible(dvs_6axis_config->xcoords_uv, #ifndef ISP2401 - source_6axis_config->xcoords_uv, - source_6axis_config->width_uv * - source_6axis_config->height_uv * - sizeof(*source_6axis_config->xcoords_uv), + source_6axis_config->xcoords_uv, + source_6axis_config->width_uv * + source_6axis_config->height_uv * + sizeof(*source_6axis_config->xcoords_uv), #else - t_6axis_config.xcoords_uv, - t_6axis_config.width_uv * - t_6axis_config.height_uv * - sizeof(*dvs_6axis_config->xcoords_uv), + t_6axis_config.xcoords_uv, + t_6axis_config.width_uv * + t_6axis_config.height_uv * + sizeof(*dvs_6axis_config->xcoords_uv), #endif - from_user)) + from_user)) goto error; if (copy_from_compatible(dvs_6axis_config->ycoords_uv, #ifndef ISP2401 - source_6axis_config->ycoords_uv, - source_6axis_config->width_uv * - source_6axis_config->height_uv * - sizeof(*source_6axis_config->ycoords_uv), + source_6axis_config->ycoords_uv, + source_6axis_config->width_uv * + source_6axis_config->height_uv * + sizeof(*source_6axis_config->ycoords_uv), #else - t_6axis_config.ycoords_uv, - t_6axis_config.width_uv * - t_6axis_config.height_uv * - sizeof(*dvs_6axis_config->ycoords_uv), + t_6axis_config.ycoords_uv, + t_6axis_config.width_uv * + t_6axis_config.height_uv * + sizeof(*dvs_6axis_config->ycoords_uv), #endif - from_user)) + from_user)) goto error; css_param->dvs_6axis = dvs_6axis_config; css_param->update_flag.dvs_6axis_config = - (struct atomisp_dvs_6axis_config *)dvs_6axis_config; + (struct atomisp_dvs_6axis_config *)dvs_6axis_config; return 0; error: @@ -4020,9 +4028,9 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, } int atomisp_cp_morph_table(struct atomisp_sub_device *asd, - struct atomisp_morph_table *source_morph_table, - struct atomisp_css_params *css_param, - bool from_user) + struct atomisp_morph_table *source_morph_table, + struct atomisp_css_params *css_param, + bool from_user) { int ret = -EFAULT; unsigned int i; @@ -4051,38 +4059,38 @@ int atomisp_cp_morph_table(struct atomisp_sub_device *asd, #endif morph_table = atomisp_css_morph_table_allocate( #ifndef ISP2401 - source_morph_table->width, - source_morph_table->height); + source_morph_table->width, + source_morph_table->height); #else - mtbl.width, - mtbl.height); + mtbl.width, + mtbl.height); #endif if (!morph_table) return -ENOMEM; for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { if (copy_from_compatible(morph_table->coordinates_x[i], - (__force void *)source_morph_table->coordinates_x[i], + (__force void *)source_morph_table->coordinates_x[i], #ifndef ISP2401 - source_morph_table->height * source_morph_table->width * - sizeof(*source_morph_table->coordinates_x[i]), + source_morph_table->height * source_morph_table->width * + sizeof(*source_morph_table->coordinates_x[i]), #else - mtbl.height * mtbl.width * - sizeof(*morph_table->coordinates_x[i]), + mtbl.height * mtbl.width * + sizeof(*morph_table->coordinates_x[i]), #endif - from_user)) + from_user)) goto error; if (copy_from_compatible(morph_table->coordinates_y[i], - (__force void *)source_morph_table->coordinates_y[i], + (__force void *)source_morph_table->coordinates_y[i], #ifndef ISP2401 - source_morph_table->height * source_morph_table->width * - sizeof(*source_morph_table->coordinates_y[i]), + source_morph_table->height * source_morph_table->width * + sizeof(*source_morph_table->coordinates_y[i]), #else - mtbl.height * mtbl.width * - sizeof(*morph_table->coordinates_y[i]), + mtbl.height * mtbl.width * + sizeof(*morph_table->coordinates_y[i]), #endif - from_user)) + from_user)) goto error; } @@ -4090,7 +4098,7 @@ int atomisp_cp_morph_table(struct atomisp_sub_device *asd, if (old_morph_table) atomisp_css_morph_table_free(old_morph_table); css_param->update_flag.morph_table = - (struct atomisp_morph_table *)morph_table; + (struct atomisp_morph_table *)morph_table; return 0; error: @@ -4115,8 +4123,8 @@ int atomisp_makeup_css_parameters(struct atomisp_sub_device *asd, if (ret) return ret; ret = atomisp_css_cp_dvs2_coefs(asd, - (struct ia_css_dvs2_coefficients *)arg->dvs2_coefs, - css_param, false); + (struct ia_css_dvs2_coefficients *)arg->dvs2_coefs, + css_param, false); if (ret) return ret; ret = atomisp_cp_dvs_6axis_config(asd, arg->dvs_6axis_config, @@ -4175,10 +4183,10 @@ void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe) return; list_for_each_entry_safe(vb, vb_tmp, - &pipe->buffers_waiting_for_param, queue) { + &pipe->buffers_waiting_for_param, queue) { if (pipe->frame_request_config_id[vb->i]) { list_for_each_entry_safe(param, param_tmp, - &pipe->per_frame_params, list) { + &pipe->per_frame_params, list) { if (pipe->frame_request_config_id[vb->i] != param->params.isp_config_id) continue; @@ -4227,7 +4235,7 @@ void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe) atomisp_wdt_start(pipe); else atomisp_wdt_refresh_pipe(pipe, - ATOMISP_WDT_KEEP_CURRENT_DELAY); + ATOMISP_WDT_KEEP_CURRENT_DELAY); } #endif } @@ -4237,7 +4245,7 @@ void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe) * Function to configure ISP parameters */ int atomisp_set_parameters(struct video_device *vdev, - struct atomisp_parameters *arg) + struct atomisp_parameters *arg) { struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); struct atomisp_sub_device *asd = pipe->asd; @@ -4250,7 +4258,8 @@ int atomisp_set_parameters(struct video_device *vdev, return -EINVAL; } - dev_dbg(asd->isp->dev, "%s: set parameter(per_frame_setting %d) for asd%d with isp_config_id %d of %s\n", + dev_dbg(asd->isp->dev, + "%s: set parameter(per_frame_setting %d) for asd%d with isp_config_id %d of %s\n", __func__, arg->per_frame_setting, asd->index, arg->isp_config_id, vdev->name); #ifdef ISP2401 @@ -4291,8 +4300,8 @@ int atomisp_set_parameters(struct video_device *vdev, goto apply_parameter_failed; ret = atomisp_css_cp_dvs2_coefs(asd, - (struct ia_css_dvs2_coefficients *)arg->dvs2_coefs, - css_param, true); + (struct ia_css_dvs2_coefficients *)arg->dvs2_coefs, + css_param, true); if (ret) goto apply_parameter_failed; @@ -4328,14 +4337,14 @@ int atomisp_param(struct atomisp_sub_device *asd, int flag, { struct atomisp_device *isp = asd->isp; struct ia_css_pipe_config *vp_cfg = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - pipe_configs[IA_CSS_PIPE_ID_VIDEO]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + pipe_configs[IA_CSS_PIPE_ID_VIDEO]; /* Read parameter for 3A binary info */ if (flag == 0) { struct atomisp_css_dvs_grid_info *dvs_grid_info = - atomisp_css_get_dvs_grid_info( - &asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info( + &asd->params.curr_grid_info); if (!&config->info) { dev_err(isp->dev, "ERROR: NULL pointer in grid_info\n"); @@ -4356,8 +4365,8 @@ int atomisp_param(struct atomisp_sub_device *asd, int flag, /* update dvs grid info */ if (dvs_grid_info) memcpy(&config->dvs_grid, - dvs_grid_info, - sizeof(struct atomisp_css_dvs_grid_info)); + dvs_grid_info, + sizeof(struct atomisp_css_dvs_grid_info)); if (asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { config->dvs_envelop.width = 0; @@ -4369,7 +4378,7 @@ int atomisp_param(struct atomisp_sub_device *asd, int flag, if (!asd->continuous_mode->val) { config->dvs_envelop.width = vp_cfg->dvs_envelope.width; config->dvs_envelop.height = - vp_cfg->dvs_envelope.height; + vp_cfg->dvs_envelope.height; } else { unsigned int dvs_w, dvs_h, dvs_w_max, dvs_h_max; @@ -4561,7 +4570,7 @@ int atomisp_bad_pixel_param(struct atomisp_sub_device *asd, int flag, } else { /* Set bad pixel to isp parameters */ memcpy(&asd->params.css_param.dp_config, config, - sizeof(asd->params.css_param.dp_config)); + sizeof(asd->params.css_param.dp_config)); atomisp_css_set_dp_config(asd, &asd->params.css_param.dp_config); asd->params.css_update_params_needed = true; } @@ -4640,7 +4649,7 @@ atomisp_bytesperline_to_padded_width(unsigned int bytesperline, static int atomisp_v4l2_framebuffer_to_css_frame(const struct v4l2_framebuffer *arg, - struct atomisp_css_frame **result) + struct atomisp_css_frame **result) { struct atomisp_css_frame *res = NULL; unsigned int padded_width; @@ -4650,13 +4659,13 @@ atomisp_v4l2_framebuffer_to_css_frame(const struct v4l2_framebuffer *arg, sh_format = v4l2_fmt_to_sh_fmt(arg->fmt.pixelformat); padded_width = atomisp_bytesperline_to_padded_width( - arg->fmt.bytesperline, sh_format); + arg->fmt.bytesperline, sh_format); /* Note: the padded width on an atomisp_css_frame is in elements, not in bytes. The RAW frame we use here should always be a 16bit RAW frame. This is why we bytesperline/2 is equal to the padded with */ if (atomisp_css_frame_allocate(&res, arg->fmt.width, arg->fmt.height, - sh_format, padded_width, 0)) { + sh_format, padded_width, 0)) { ret = -ENOMEM; goto err; } @@ -4758,7 +4767,7 @@ int atomisp_false_color_param(struct atomisp_sub_device *asd, int flag, * Function to configure white balance params */ int atomisp_white_balance_param(struct atomisp_sub_device *asd, int flag, - struct atomisp_wb_config *config) + struct atomisp_wb_config *config) { if (flag == 0) { /* Get white balance from current setup */ @@ -4837,7 +4846,7 @@ int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, struct atomisp_device *isp = asd->isp; mipi_info = atomisp_to_sensor_mipi_info( - isp->inputs[asd->input_curr].camera); + isp->inputs[asd->input_curr].camera); if (!mipi_info) return -EINVAL; @@ -4855,7 +4864,7 @@ int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f) } static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, - u16 stream_index, struct atomisp_input_stream_info *stream_info) + u16 stream_index, struct atomisp_input_stream_info *stream_info) { int i; @@ -4866,16 +4875,16 @@ static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, asd->stream_env[stream_index].isys_configs = stream_info->isys_configs; for (i = 0; i < stream_info->isys_configs; i++) { asd->stream_env[stream_index].isys_info[i].input_format = - stream_info->isys_info[i].input_format; + stream_info->isys_info[i].input_format; asd->stream_env[stream_index].isys_info[i].width = - stream_info->isys_info[i].width; + stream_info->isys_info[i].width; asd->stream_env[stream_index].isys_info[i].height = - stream_info->isys_info[i].height; + stream_info->isys_info[i].height; } } static void __atomisp_init_stream_info(u16 stream_index, - struct atomisp_input_stream_info *stream_info) + struct atomisp_input_stream_info *stream_info) { int i; @@ -4892,7 +4901,7 @@ static void __atomisp_init_stream_info(u16 stream_index, /* This function looks up the closest available resolution. */ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, - bool *res_overflow) + bool *res_overflow) { struct atomisp_device *isp = video_get_drvdata(vdev); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; @@ -4976,11 +4985,11 @@ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, /* app vs isp */ f->fmt.pix.width = rounddown( - clamp_t(u32, f->fmt.pix.width, ATOM_ISP_MIN_WIDTH, - ATOM_ISP_MAX_WIDTH), ATOM_ISP_STEP_WIDTH); + clamp_t(u32, f->fmt.pix.width, ATOM_ISP_MIN_WIDTH, + ATOM_ISP_MAX_WIDTH), ATOM_ISP_STEP_WIDTH); f->fmt.pix.height = rounddown( - clamp_t(u32, f->fmt.pix.height, ATOM_ISP_MIN_HEIGHT, - ATOM_ISP_MAX_HEIGHT), ATOM_ISP_STEP_HEIGHT); + clamp_t(u32, f->fmt.pix.height, ATOM_ISP_MIN_HEIGHT, + ATOM_ISP_MAX_HEIGHT), ATOM_ISP_STEP_HEIGHT); return 0; } @@ -5021,17 +5030,17 @@ atomisp_try_fmt_file(struct atomisp_device *isp, struct v4l2_format *f) } enum mipi_port_id __get_mipi_port(struct atomisp_device *isp, - enum atomisp_camera_port port) + enum atomisp_camera_port port) { switch (port) { case ATOMISP_CAMERA_PORT_PRIMARY: - return MIPI_PORT0_ID; + return MIPI_PORT0_ID; case ATOMISP_CAMERA_PORT_SECONDARY: return MIPI_PORT1_ID; case ATOMISP_CAMERA_PORT_TERTIARY: if (MIPI_PORT1_ID + 1 != N_MIPI_PORT_ID) return MIPI_PORT1_ID + 1; - /* go through down for else case */ + /* go through down for else case */ default: dev_err(isp->dev, "unsupported port: %d\n", port); return MIPI_PORT0_ID; @@ -5039,9 +5048,9 @@ enum mipi_port_id __get_mipi_port(struct atomisp_device *isp, } static inline int atomisp_set_sensor_mipi_to_isp( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - struct camera_mipi_info *mipi_info) + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + struct camera_mipi_info *mipi_info) { struct v4l2_control ctrl; struct atomisp_device *isp = asd->isp; @@ -5056,21 +5065,21 @@ static inline int atomisp_set_sensor_mipi_to_isp( if (asd->stream_env[stream_id].isys_configs == 1) { input_format = - asd->stream_env[stream_id].isys_info[0].input_format; + asd->stream_env[stream_id].isys_info[0].input_format; atomisp_css_isys_set_format(asd, stream_id, - input_format, IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX); + input_format, IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX); } else if (asd->stream_env[stream_id].isys_configs == 2) { atomisp_css_isys_two_stream_cfg_update_stream1( - asd, stream_id, - asd->stream_env[stream_id].isys_info[0].input_format, - asd->stream_env[stream_id].isys_info[0].width, - asd->stream_env[stream_id].isys_info[0].height); + asd, stream_id, + asd->stream_env[stream_id].isys_info[0].input_format, + asd->stream_env[stream_id].isys_info[0].width, + asd->stream_env[stream_id].isys_info[0].height); atomisp_css_isys_two_stream_cfg_update_stream2( - asd, stream_id, - asd->stream_env[stream_id].isys_info[1].input_format, - asd->stream_env[stream_id].isys_info[1].width, - asd->stream_env[stream_id].isys_info[1].height); + asd, stream_id, + asd->stream_env[stream_id].isys_info[1].input_format, + asd->stream_env[stream_id].isys_info[1].width, + asd->stream_env[stream_id].isys_info[1].height); } /* Compatibility for sensors which provide no media bus code @@ -5081,7 +5090,7 @@ static inline int atomisp_set_sensor_mipi_to_isp( /* Input stream config is still needs configured */ /* TODO: Check if this is necessary */ fc = atomisp_find_in_fmt_conv_by_atomisp_in_fmt( - mipi_info->input_format); + mipi_info->input_format); if (!fc) return -EINVAL; input_format = fc->css_stream_fmt; @@ -5102,17 +5111,17 @@ static inline int atomisp_set_sensor_mipi_to_isp( atomisp_css_input_set_bayer_order(asd, stream_id, bayer_order); fc = atomisp_find_in_fmt_conv_by_atomisp_in_fmt( - mipi_info->metadata_format); + mipi_info->metadata_format); if (!fc) return -EINVAL; input_format = fc->css_stream_fmt; atomisp_css_input_configure_port(asd, - __get_mipi_port(asd->isp, mipi_info->port), - mipi_info->num_lanes, - 0xffff4, mipi_freq, - input_format, - mipi_info->metadata_width, - mipi_info->metadata_height); + __get_mipi_port(asd->isp, mipi_info->port), + mipi_info->num_lanes, + 0xffff4, mipi_freq, + input_format, + mipi_info->metadata_width, + mipi_info->metadata_height); return 0; } @@ -5132,14 +5141,14 @@ static int __enable_continuous_mode(struct atomisp_sub_device *asd, #endif /* in case of ANR, force capture pipe to offline mode */ atomisp_css_capture_enable_online(asd, ATOMISP_INPUT_STREAM_GENERAL, - asd->params.low_light ? false : !enable); + asd->params.low_light ? false : !enable); atomisp_css_preview_enable_online(asd, ATOMISP_INPUT_STREAM_GENERAL, - !enable); + !enable); atomisp_css_enable_continuous(asd, enable); atomisp_css_enable_cvf(asd, asd->continuous_viewfinder->val); if (atomisp_css_continuous_set_num_raw_frames(asd, - asd->continuous_raw_buffer_size->val)) { + asd->continuous_raw_buffer_size->val)) { dev_err(isp->dev, "css_continuous_set_num_raw_frames failed\n"); return -EINVAL; } @@ -5183,7 +5192,7 @@ static int get_frame_info_nop(struct atomisp_sub_device *asd, * handled in CSS when the input resolution is changed. */ static int css_input_resolution_changed(struct atomisp_sub_device *asd, - struct v4l2_mbus_framefmt *ffmt) + struct v4l2_mbus_framefmt *ffmt) { struct atomisp_metadata_buf *md_buf = NULL, *_md_buf; unsigned int i; @@ -5229,10 +5238,10 @@ static int css_input_resolution_changed(struct atomisp_sub_device *asd, } static int atomisp_set_fmt_to_isp(struct video_device *vdev, - struct atomisp_css_frame_info *output_info, - struct atomisp_css_frame_info *raw_output_info, - struct v4l2_pix_format *pix, - unsigned int source_pad) + struct atomisp_css_frame_info *output_info, + struct atomisp_css_frame_info *raw_output_info, + struct v4l2_pix_format *pix, + unsigned int source_pad) { struct camera_mipi_info *mipi_info; struct atomisp_device *isp = video_get_drvdata(vdev); @@ -5245,13 +5254,13 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, unsigned int width, unsigned int height, unsigned int min_width, enum atomisp_css_frame_format sh_fmt) = - configure_output_nop; + configure_output_nop; int (*get_frame_info)(struct atomisp_sub_device *asd, struct atomisp_css_frame_info *finfo) = - get_frame_info_nop; + get_frame_info_nop; int (*configure_pp_input)(struct atomisp_sub_device *asd, unsigned int width, unsigned int height) = - configure_pp_input_nop; + configure_pp_input_nop; u16 stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); const struct atomisp_in_fmt_conv *fc; int ret; @@ -5259,36 +5268,36 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, v4l2_fh_init(&fh.vfh, vdev); isp_sink_crop = atomisp_subdev_get_rect( - &asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SINK, V4L2_SEL_TGT_CROP); + &asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, V4L2_SEL_TGT_CROP); format = atomisp_get_format_bridge(pix->pixelformat); if (!format) return -EINVAL; if (isp->inputs[asd->input_curr].type != TEST_PATTERN && - isp->inputs[asd->input_curr].type != FILE_INPUT) { + isp->inputs[asd->input_curr].type != FILE_INPUT) { mipi_info = atomisp_to_sensor_mipi_info( - isp->inputs[asd->input_curr].camera); + isp->inputs[asd->input_curr].camera); if (!mipi_info) { dev_err(isp->dev, "mipi_info is NULL\n"); return -EINVAL; } if (atomisp_set_sensor_mipi_to_isp(asd, stream_index, - mipi_info)) + mipi_info)) return -EINVAL; fc = atomisp_find_in_fmt_conv_by_atomisp_in_fmt( - mipi_info->input_format); + mipi_info->input_format); if (!fc) fc = atomisp_find_in_fmt_conv( - atomisp_subdev_get_ffmt(&asd->subdev, - NULL, V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SINK)->code); + atomisp_subdev_get_ffmt(&asd->subdev, + NULL, V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK)->code); if (!fc) return -EINVAL; if (format->sh_fmt == CSS_FRAME_FORMAT_RAW && - raw_output_format_match_input(fc->css_stream_fmt, - pix->pixelformat)) + raw_output_format_match_input(fc->css_stream_fmt, + pix->pixelformat)) return -EINVAL; } @@ -5324,20 +5333,20 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, if (asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER) { atomisp_css_video_configure_viewfinder(asd, - vf_size.width, vf_size.height, 0, - asd->video_out_vf.sh_fmt); + vf_size.width, vf_size.height, 0, + asd->video_out_vf.sh_fmt); } else if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW || source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) atomisp_css_video_configure_viewfinder(asd, - vf_size.width, vf_size.height, 0, - asd->video_out_vf.sh_fmt); + vf_size.width, vf_size.height, 0, + asd->video_out_vf.sh_fmt); else atomisp_css_capture_configure_viewfinder(asd, vf_size.width, vf_size.height, 0, asd->video_out_vf.sh_fmt); } else if (source_pad != ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW || - asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) { + asd->vfpp->val == ATOMISP_VFPP_DISABLE_LOWLAT) { atomisp_css_capture_configure_viewfinder(asd, vf_size.width, vf_size.height, 0, asd->video_out_vf.sh_fmt); @@ -5352,7 +5361,7 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, atomisp_css_input_set_mode(asd, CSS_INPUT_MODE_SENSOR); atomisp_css_disable_vf_pp(asd, - asd->vfpp->val != ATOMISP_VFPP_ENABLE); + asd->vfpp->val != ATOMISP_VFPP_ENABLE); /* ISP2401 new input system need to use copy pipe */ if (asd->copy_mode) { @@ -5367,25 +5376,25 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, if (!asd->continuous_mode->val) { configure_output = atomisp_css_video_configure_output; get_frame_info = - atomisp_css_video_get_output_frame_info; + atomisp_css_video_get_output_frame_info; pipe_id = CSS_PIPE_ID_VIDEO; } else { if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW || source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { configure_output = - atomisp_css_video_configure_output; + atomisp_css_video_configure_output; get_frame_info = - atomisp_css_video_get_output_frame_info; + atomisp_css_video_get_output_frame_info; configure_pp_input = - atomisp_css_video_configure_pp_input; + atomisp_css_video_configure_pp_input; pipe_id = CSS_PIPE_ID_VIDEO; } else { configure_output = - atomisp_css_capture_configure_output; + atomisp_css_capture_configure_output; get_frame_info = - atomisp_css_capture_get_output_frame_info; + atomisp_css_capture_get_output_frame_info; configure_pp_input = - atomisp_css_capture_configure_pp_input; + atomisp_css_capture_configure_pp_input; pipe_id = CSS_PIPE_ID_CAPTURE; atomisp_update_capture_mode(asd); @@ -5415,8 +5424,8 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, if (!asd->continuous_mode->val) /* in case of ANR, force capture pipe to offline mode */ atomisp_css_capture_enable_online(asd, stream_index, - asd->params.low_light ? - false : asd->params.online_process); + asd->params.low_light ? + false : asd->params.online_process); configure_output = atomisp_css_capture_configure_output; get_frame_info = atomisp_css_capture_get_output_frame_info; @@ -5426,14 +5435,14 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, if (!asd->params.online_process && !asd->continuous_mode->val) { ret = atomisp_css_capture_get_output_raw_frame_info(asd, - raw_output_info); + raw_output_info); if (ret) return ret; } if (!asd->continuous_mode->val && asd->run_mode->val != ATOMISP_RUN_MODE_STILL_CAPTURE) { dev_err(isp->dev, - "Need to set the running mode first\n"); + "Need to set the running mode first\n"); asd->run_mode->val = ATOMISP_RUN_MODE_STILL_CAPTURE; } } @@ -5446,10 +5455,10 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, if (asd->copy_mode) ret = atomisp_css_copy_configure_output(asd, stream_index, - pix->width, pix->height, - format->planar ? pix->bytesperline : - pix->bytesperline * 8 / format->depth, - format->sh_fmt); + pix->width, pix->height, + format->planar ? pix->bytesperline : + pix->bytesperline * 8 / format->depth, + format->sh_fmt); else ret = configure_output(asd, pix->width, pix->height, format->planar ? pix->bytesperline : @@ -5485,7 +5494,7 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, } if (asd->copy_mode) ret = atomisp_css_copy_get_output_frame_info(asd, stream_index, - output_info); + output_info); else ret = get_frame_info(asd, output_info); if (ret) { @@ -5502,16 +5511,16 @@ static int atomisp_set_fmt_to_isp(struct video_device *vdev, if (!asd->continuous_mode->val && !asd->params.online_process && !isp->sw_contex.file_input && - atomisp_css_frame_allocate_from_info(&asd->raw_output_frame, - raw_output_info)) + atomisp_css_frame_allocate_from_info(&asd->raw_output_frame, + raw_output_info)) return -ENOMEM; return 0; } static void atomisp_get_dis_envelop(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int *dvs_env_w, unsigned int *dvs_env_h) + unsigned int width, unsigned int height, + unsigned int *dvs_env_w, unsigned int *dvs_env_h) { struct atomisp_device *isp = asd->isp; @@ -5535,22 +5544,22 @@ static void atomisp_get_dis_envelop(struct atomisp_sub_device *asd, } static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, - int source_pad, struct v4l2_format *f) + int source_pad, struct v4l2_format *f) { #if defined(ISP2401_NEW_INPUT_SYSTEM) struct v4l2_mbus_framefmt *sink, *src; sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, - V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK); + V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK); src = atomisp_subdev_get_ffmt(&asd->subdev, NULL, - V4L2_SUBDEV_FORMAT_ACTIVE, source_pad); + V4L2_SUBDEV_FORMAT_ACTIVE, source_pad); if ((sink->code == src->code && - sink->width == f->fmt.pix.width && - sink->height == f->fmt.pix.height) || + sink->width == f->fmt.pix.width && + sink->height == f->fmt.pix.height) || ((asd->isp->inputs[asd->input_curr].type == SOC_CAMERA) && - (asd->isp->inputs[asd->input_curr].camera_caps-> - sensor[asd->sensor_curr].stream_num > 1))) + (asd->isp->inputs[asd->input_curr].camera_caps-> + sensor[asd->sensor_curr].stream_num > 1))) asd->copy_mode = true; else #endif @@ -5561,9 +5570,9 @@ static void atomisp_check_copy_mode(struct atomisp_sub_device *asd, } static int atomisp_set_fmt_to_snr(struct video_device *vdev, - struct v4l2_format *f, unsigned int pixelformat, - unsigned int padding_w, unsigned int padding_h, - unsigned int dvs_env_w, unsigned int dvs_env_h) + struct v4l2_format *f, unsigned int pixelformat, + unsigned int padding_w, unsigned int padding_h, + unsigned int dvs_env_w, unsigned int dvs_env_h) { struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; const struct atomisp_format_bridge *format; @@ -5606,7 +5615,7 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { vformat.which = V4L2_SUBDEV_FORMAT_TRY; ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - pad, set_fmt, &pad_cfg, &vformat); + pad, set_fmt, &pad_cfg, &vformat); if (ret) return ret; if (ffmt->width < req_ffmt->width || @@ -5615,7 +5624,7 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, req_ffmt->width -= dvs_env_w; ffmt = req_ffmt; dev_warn(isp->dev, - "can not enable video dis due to sensor limitation."); + "can not enable video dis due to sensor limitation."); asd->params.video_dis_en = false; } } @@ -5634,7 +5643,7 @@ static int atomisp_set_fmt_to_snr(struct video_device *vdev, if (ffmt->width < ATOM_ISP_STEP_WIDTH || ffmt->height < ATOM_ISP_STEP_HEIGHT) - return -EINVAL; + return -EINVAL; if (asd->params.video_dis_en && source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VIDEO && @@ -5695,7 +5704,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_VF || (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW - && asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO)) { + && asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO)) { if (asd->fmt_auto->val) { struct v4l2_rect *capture_comp; struct v4l2_rect r = {0}; @@ -5705,16 +5714,16 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) capture_comp = atomisp_subdev_get_rect( - &asd->subdev, NULL, - V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SOURCE_VIDEO, - V4L2_SEL_TGT_COMPOSE); + &asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_VIDEO, + V4L2_SEL_TGT_COMPOSE); else capture_comp = atomisp_subdev_get_rect( - &asd->subdev, NULL, - V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE, - V4L2_SEL_TGT_COMPOSE); + &asd->subdev, NULL, + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE, + V4L2_SEL_TGT_COMPOSE); if (capture_comp->width < r.width || capture_comp->height < r.height) { @@ -5723,9 +5732,9 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) } atomisp_subdev_set_selection( - &asd->subdev, fh.pad, - V4L2_SUBDEV_FORMAT_ACTIVE, source_pad, - V4L2_SEL_TGT_COMPOSE, 0, &r); + &asd->subdev, fh.pad, + V4L2_SUBDEV_FORMAT_ACTIVE, source_pad, + V4L2_SEL_TGT_COMPOSE, 0, &r); f->fmt.pix.width = r.width; f->fmt.pix.height = r.height; @@ -5734,17 +5743,17 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && (asd->isp->inputs[asd->input_curr].type == SOC_CAMERA) && (asd->isp->inputs[asd->input_curr].camera_caps-> - sensor[asd->sensor_curr].stream_num > 1)) { + sensor[asd->sensor_curr].stream_num > 1)) { /* For M10MO outputing YUV preview images. */ u16 video_index = - atomisp_source_pad_to_stream_id(asd, - ATOMISP_SUBDEV_PAD_SOURCE_VIDEO); + atomisp_source_pad_to_stream_id(asd, + ATOMISP_SUBDEV_PAD_SOURCE_VIDEO); ret = atomisp_css_copy_get_output_frame_info(asd, video_index, &output_info); if (ret) { dev_err(isp->dev, - "copy_get_output_frame_info ret %i", ret); + "copy_get_output_frame_info ret %i", ret); return -EINVAL; } if (!asd->yuvpp_mode) { @@ -5754,18 +5763,18 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) */ asd->yuvpp_mode = true; ret = atomisp_css_copy_configure_output( - asd, video_index, 0, 0, 0, 0); + asd, video_index, 0, 0, 0, 0); if (ret) { dev_err(isp->dev, "failed to disable copy pipe"); return -EINVAL; } ret = atomisp_css_yuvpp_configure_output( - asd, video_index, - output_info.res.width, - output_info.res.height, - output_info.padded_width, - output_info.format); + asd, video_index, + output_info.res.width, + output_info.res.height, + output_info.padded_width, + output_info.format); if (ret) { dev_err(isp->dev, "failed to set up yuvpp pipe\n"); @@ -5773,23 +5782,23 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) } atomisp_css_video_enable_online(asd, false); atomisp_css_preview_enable_online(asd, - ATOMISP_INPUT_STREAM_GENERAL, false); + ATOMISP_INPUT_STREAM_GENERAL, false); } atomisp_css_yuvpp_configure_viewfinder(asd, video_index, - f->fmt.pix.width, f->fmt.pix.height, - format_bridge->planar ? f->fmt.pix.bytesperline - : f->fmt.pix.bytesperline * 8 - / format_bridge->depth, format_bridge->sh_fmt); + f->fmt.pix.width, f->fmt.pix.height, + format_bridge->planar ? f->fmt.pix.bytesperline + : f->fmt.pix.bytesperline * 8 + / format_bridge->depth, format_bridge->sh_fmt); atomisp_css_yuvpp_get_viewfinder_frame_info( - asd, video_index, &output_info); + asd, video_index, &output_info); } else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) { atomisp_css_video_configure_viewfinder(asd, - f->fmt.pix.width, f->fmt.pix.height, - format_bridge->planar ? f->fmt.pix.bytesperline - : f->fmt.pix.bytesperline * 8 - / format_bridge->depth, format_bridge->sh_fmt); + f->fmt.pix.width, f->fmt.pix.height, + format_bridge->planar ? f->fmt.pix.bytesperline + : f->fmt.pix.bytesperline * 8 + / format_bridge->depth, format_bridge->sh_fmt); atomisp_css_video_get_viewfinder_frame_info(asd, - &output_info); + &output_info); asd->copy_mode = false; } else { atomisp_css_capture_configure_viewfinder(asd, @@ -5798,7 +5807,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) : f->fmt.pix.bytesperline * 8 / format_bridge->depth, format_bridge->sh_fmt); atomisp_css_capture_get_viewfinder_frame_info(asd, - &output_info); + &output_info); asd->copy_mode = false; } @@ -5836,18 +5845,18 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) f->fmt.pix.height = snr_fmt.fmt.pix.height; snr_format_bridge = - atomisp_get_format_bridge(snr_fmt.fmt.pix.pixelformat); + atomisp_get_format_bridge(snr_fmt.fmt.pix.pixelformat); if (!snr_format_bridge) return -EINVAL; atomisp_subdev_get_ffmt(&asd->subdev, NULL, V4L2_SUBDEV_FORMAT_ACTIVE, ATOMISP_SUBDEV_PAD_SINK)->code = - snr_format_bridge->mbus_code; + snr_format_bridge->mbus_code; isp_sink_fmt = *atomisp_subdev_get_ffmt(&asd->subdev, NULL, - V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SINK); + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); isp_source_fmt.code = format_bridge->mbus_code; atomisp_subdev_set_ffmt(&asd->subdev, fh.pad, @@ -5865,13 +5874,13 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) /* construct resolution supported by isp */ if (res_overflow && !asd->continuous_mode->val) { f->fmt.pix.width = rounddown( - clamp_t(u32, f->fmt.pix.width - padding_w, - ATOM_ISP_MIN_WIDTH, - ATOM_ISP_MAX_WIDTH), ATOM_ISP_STEP_WIDTH); + clamp_t(u32, f->fmt.pix.width - padding_w, + ATOM_ISP_MIN_WIDTH, + ATOM_ISP_MAX_WIDTH), ATOM_ISP_STEP_WIDTH); f->fmt.pix.height = rounddown( - clamp_t(u32, f->fmt.pix.height - padding_h, - ATOM_ISP_MIN_HEIGHT, - ATOM_ISP_MAX_HEIGHT), ATOM_ISP_STEP_HEIGHT); + clamp_t(u32, f->fmt.pix.height - padding_h, + ATOM_ISP_MIN_HEIGHT, + ATOM_ISP_MAX_HEIGHT), ATOM_ISP_STEP_HEIGHT); } atomisp_get_dis_envelop(asd, f->fmt.pix.width, f->fmt.pix.height, @@ -5905,7 +5914,7 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) if (!asd->continuous_mode->val || isp_sink_fmt.width < (f->fmt.pix.width + padding_w + dvs_env_w) || isp_sink_fmt.height < (f->fmt.pix.height + padding_h + - dvs_env_h)) { + dvs_env_h)) { /* * For jpeg or custom raw format the sensor will return constant * width and height. Because we already had quried try_mbus_fmt, @@ -5922,8 +5931,8 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) s_fmt.fmt.pix.height = backup_fmt.fmt.pix.height; } ret = atomisp_set_fmt_to_snr(vdev, &s_fmt, - f->fmt.pix.pixelformat, padding_w, - padding_h, dvs_env_w, dvs_env_h); + f->fmt.pix.pixelformat, padding_w, + padding_h, dvs_env_w, dvs_env_h); if (ret) return -EINVAL; @@ -5935,16 +5944,16 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) asd->yuvpp_mode = false; /* Reset variable */ isp_sink_crop = *atomisp_subdev_get_rect(&asd->subdev, NULL, - V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SINK, - V4L2_SEL_TGT_CROP); + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, + V4L2_SEL_TGT_CROP); /* Try to enable YUV downscaling if ISP input is 10 % (either * width or height) bigger than the desired result. */ if (isp_sink_crop.width * 9 / 10 < f->fmt.pix.width || isp_sink_crop.height * 9 / 10 < f->fmt.pix.height || (atomisp_subdev_format_conversion(asd, source_pad) && - ((asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && + ((asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && !asd->continuous_mode->val) || asd->vfpp->val == ATOMISP_VFPP_DISABLE_SCALER))) { /* for continuous mode, preview size might be smaller than @@ -5956,11 +5965,11 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) && source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && !crop_needs_override) { isp_sink_crop.width = - max_t(unsigned int, f->fmt.pix.width, - isp_sink_crop.width); + max_t(unsigned int, f->fmt.pix.width, + isp_sink_crop.width); isp_sink_crop.height = - max_t(unsigned int, f->fmt.pix.height, - isp_sink_crop.height); + max_t(unsigned int, f->fmt.pix.height, + isp_sink_crop.height); } else { isp_sink_crop.width = f->fmt.pix.width; isp_sink_crop.height = f->fmt.pix.height; @@ -5981,21 +5990,21 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) main_compose.width = isp_sink_crop.width; main_compose.height = - DIV_ROUND_UP(main_compose.width * f->fmt.pix.height, - f->fmt.pix.width); + DIV_ROUND_UP(main_compose.width * f->fmt.pix.height, + f->fmt.pix.width); if (main_compose.height > isp_sink_crop.height) { main_compose.height = isp_sink_crop.height; main_compose.width = - DIV_ROUND_UP(main_compose.height * - f->fmt.pix.width, - f->fmt.pix.height); + DIV_ROUND_UP(main_compose.height * + f->fmt.pix.width, + f->fmt.pix.height); } atomisp_subdev_set_selection(&asd->subdev, fh.pad, - V4L2_SUBDEV_FORMAT_ACTIVE, - source_pad, - V4L2_SEL_TGT_COMPOSE, 0, - &main_compose); + V4L2_SUBDEV_FORMAT_ACTIVE, + source_pad, + V4L2_SEL_TGT_COMPOSE, 0, + &main_compose); } else { struct v4l2_rect sink_crop = {0}; struct v4l2_rect main_compose = {0}; @@ -6018,30 +6027,30 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) isp_sink_crop.height * main_compose.width) { sink_crop.height = isp_sink_crop.height; sink_crop.width = DIV_NEAREST_STEP( - sink_crop.height * - f->fmt.pix.width, - f->fmt.pix.height, - ATOM_ISP_STEP_WIDTH); + sink_crop.height * + f->fmt.pix.width, + f->fmt.pix.height, + ATOM_ISP_STEP_WIDTH); } else { sink_crop.width = isp_sink_crop.width; sink_crop.height = DIV_NEAREST_STEP( - sink_crop.width * - f->fmt.pix.height, - f->fmt.pix.width, - ATOM_ISP_STEP_HEIGHT); + sink_crop.width * + f->fmt.pix.height, + f->fmt.pix.width, + ATOM_ISP_STEP_HEIGHT); } atomisp_subdev_set_selection(&asd->subdev, fh.pad, - V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SINK, - V4L2_SEL_TGT_CROP, - V4L2_SEL_FLAG_KEEP_CONFIG, - &sink_crop); + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK, + V4L2_SEL_TGT_CROP, + V4L2_SEL_FLAG_KEEP_CONFIG, + &sink_crop); } atomisp_subdev_set_selection(&asd->subdev, fh.pad, - V4L2_SUBDEV_FORMAT_ACTIVE, - source_pad, - V4L2_SEL_TGT_COMPOSE, 0, - &main_compose); + V4L2_SUBDEV_FORMAT_ACTIVE, + source_pad, + V4L2_SEL_TGT_COMPOSE, 0, + &main_compose); } set_fmt_to_isp: @@ -6056,14 +6065,14 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) if (format_bridge->planar) { pipe->pix.bytesperline = output_info.padded_width; pipe->pix.sizeimage = PAGE_ALIGN(f->fmt.pix.height * - DIV_ROUND_UP(format_bridge->depth * - output_info.padded_width, 8)); + DIV_ROUND_UP(format_bridge->depth * + output_info.padded_width, 8)); } else { pipe->pix.bytesperline = - DIV_ROUND_UP(format_bridge->depth * - output_info.padded_width, 8); + DIV_ROUND_UP(format_bridge->depth * + output_info.padded_width, 8); pipe->pix.sizeimage = - PAGE_ALIGN(f->fmt.pix.height * pipe->pix.bytesperline); + PAGE_ALIGN(f->fmt.pix.height * pipe->pix.bytesperline); } if (f->fmt.pix.field == V4L2_FIELD_ANY) f->fmt.pix.field = V4L2_FIELD_NONE; @@ -6110,15 +6119,15 @@ int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f) format_bridge = atomisp_get_format_bridge(f->fmt.pix.pixelformat); if (!format_bridge) { dev_dbg(isp->dev, "atomisp_get_format_bridge err! fmt:0x%x\n", - f->fmt.pix.pixelformat); + f->fmt.pix.pixelformat); return -EINVAL; } pipe->pix = f->fmt.pix; atomisp_css_input_set_mode(asd, CSS_INPUT_MODE_FIFO); atomisp_css_input_configure_port(asd, - __get_mipi_port(isp, ATOMISP_CAMERA_PORT_PRIMARY), 2, 0xffff4, - 0, 0, 0, 0); + __get_mipi_port(isp, ATOMISP_CAMERA_PORT_PRIMARY), 2, 0xffff4, + 0, 0, 0, 0); ffmt.width = f->fmt.pix.width; ffmt.height = f->fmt.pix.height; ffmt.code = format_bridge->mbus_code; @@ -6130,7 +6139,7 @@ int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f) } int atomisp_set_shading_table(struct atomisp_sub_device *asd, - struct atomisp_shading_table *user_shading_table) + struct atomisp_shading_table *user_shading_table) { struct atomisp_css_shading_table *shading_table; struct atomisp_css_shading_table *free_table; @@ -6159,7 +6168,7 @@ int atomisp_set_shading_table(struct atomisp_sub_device *asd, return -EINVAL; shading_table = atomisp_css_shading_table_alloc( - user_shading_table->width, user_shading_table->height); + user_shading_table->width, user_shading_table->height); if (!shading_table) return -ENOMEM; @@ -6272,7 +6281,7 @@ int atomisp_exif_makernote(struct atomisp_sub_device *asd, } int atomisp_offline_capture_configure(struct atomisp_sub_device *asd, - struct atomisp_cont_capture_conf *cvf_config) + struct atomisp_cont_capture_conf *cvf_config) { struct v4l2_ctrl *c; @@ -6304,26 +6313,26 @@ int atomisp_offline_capture_configure(struct atomisp_sub_device *asd, if (asd->enable_raw_buffer_lock->val) { init_raw_num = - ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES_LOCK_EN; + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES_LOCK_EN; if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && asd->params.video_dis_en) init_raw_num += ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; } else { init_raw_num = - ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES; + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES; } /* TODO: this can be removed once user-space * has been updated to use control API */ asd->continuous_raw_buffer_size->val = - max_t(int, - asd->continuous_raw_buffer_size->val, - asd->params.offline_parm. - num_captures + init_raw_num); + max_t(int, + asd->continuous_raw_buffer_size->val, + asd->params.offline_parm. + num_captures + init_raw_num); asd->continuous_raw_buffer_size->val = - min_t(int, ATOMISP_CONT_RAW_FRAMES, - asd->continuous_raw_buffer_size->val); + min_t(int, ATOMISP_CONT_RAW_FRAMES, + asd->continuous_raw_buffer_size->val); } asd->continuous_mode->val = true; } else { @@ -6364,14 +6373,14 @@ int atomisp_flash_enable(struct atomisp_sub_device *asd, int num_frames) if (num_frames < 0) { dev_dbg(isp->dev, "%s ERROR: num_frames: %d\n", __func__, - num_frames); + num_frames); return -EINVAL; } /* a requested flash is still in progress. */ if (num_frames && asd->params.flash_state != ATOMISP_FLASH_IDLE) { dev_dbg(isp->dev, "%s flash busy: %d frames left: %d\n", - __func__, asd->params.flash_state, - asd->params.num_flash_frames); + __func__, asd->params.flash_state, + asd->params.num_flash_frames); return -EBUSY; } @@ -6381,13 +6390,13 @@ int atomisp_flash_enable(struct atomisp_sub_device *asd, int num_frames) } int atomisp_source_pad_to_stream_id(struct atomisp_sub_device *asd, - uint16_t source_pad) + uint16_t source_pad) { int stream_id; struct atomisp_device *isp = asd->isp; if (isp->inputs[asd->input_curr].camera_caps-> - sensor[asd->sensor_curr].stream_num == 1) + sensor[asd->sensor_curr].stream_num == 1) return ATOMISP_INPUT_STREAM_GENERAL; switch (source_pad) { @@ -6484,7 +6493,8 @@ int atomisp_set_raw_buffer_bitmap(struct atomisp_sub_device *asd, int exp_id) /* WORKAROUND unlock the raw buffer compulsively */ ret = atomisp_css_exp_id_unlock(asd, exp_id); if (ret) { - dev_err(asd->isp->dev, "%s exp_id is wrapping back to %d but force unlock failed,, err %d.\n", + dev_err(asd->isp->dev, + "%s exp_id is wrapping back to %d but force unlock failed,, err %d.\n", __func__, exp_id, ret); return ret; } @@ -6493,8 +6503,9 @@ int atomisp_set_raw_buffer_bitmap(struct atomisp_sub_device *asd, int exp_id) (*bitmap) &= ~(1 << bit); asd->raw_buffer_locked_count--; spin_unlock_irqrestore(&asd->raw_buffer_bitmap_lock, flags); - dev_warn(asd->isp->dev, "%s exp_id is wrapping back to %d but it is still locked so force unlock it, raw_buffer_locked_count %d\n", - __func__, exp_id, asd->raw_buffer_locked_count); + dev_warn(asd->isp->dev, + "%s exp_id is wrapping back to %d but it is still locked so force unlock it, raw_buffer_locked_count %d\n", + __func__, exp_id, asd->raw_buffer_locked_count); } return 0; } @@ -6579,7 +6590,7 @@ int atomisp_exp_id_unlock(struct atomisp_sub_device *asd, int *exp_id) } int atomisp_enable_dz_capt_pipe(struct atomisp_sub_device *asd, - unsigned int *enable) + unsigned int *enable) { bool value; @@ -6649,12 +6660,12 @@ static int atomisp_get_pipe_id(struct atomisp_video_pipe *pipe) /* fail through */ dev_warn(asd->isp->dev, "%s failed to find proper pipe\n", - __func__); + __func__); return CSS_PIPE_ID_CAPTURE; } int atomisp_get_invalid_frame_num(struct video_device *vdev, - int *invalid_frame_num) + int *invalid_frame_num) { struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); struct atomisp_sub_device *asd = pipe->asd; @@ -6663,7 +6674,7 @@ int atomisp_get_invalid_frame_num(struct video_device *vdev, int ret; if (asd->isp->inputs[asd->input_curr].camera_caps-> - sensor[asd->sensor_curr].stream_num > 1) { + sensor[asd->sensor_curr].stream_num > 1) { /* External ISP */ *invalid_frame_num = 0; return 0; @@ -6671,14 +6682,15 @@ int atomisp_get_invalid_frame_num(struct video_device *vdev, pipe_id = atomisp_get_pipe_id(pipe); if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].pipes[pipe_id]) { - dev_warn(asd->isp->dev, "%s pipe %d has not been created yet, do SET_FMT first!\n", - __func__, pipe_id); + dev_warn(asd->isp->dev, + "%s pipe %d has not been created yet, do SET_FMT first!\n", + __func__, pipe_id); return -EINVAL; } ret = ia_css_pipe_get_info( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipes[pipe_id], &p_info); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipes[pipe_id], &p_info); if (ret == IA_CSS_SUCCESS) { *invalid_frame_num = p_info.num_invalid_frames; return 0; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h index a403ff95a2a99..3885a5a9d65a8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h @@ -86,7 +86,7 @@ void atomisp_setup_flash(struct atomisp_sub_device *asd); irqreturn_t atomisp_isr(int irq, void *dev); irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr); const struct atomisp_format_bridge *get_atomisp_format_bridge_from_mbus( - u32 mbus_code); + u32 mbus_code); bool atomisp_is_mbuscode_raw(uint32_t code); int atomisp_get_frame_pgnr(struct atomisp_device *isp, const struct atomisp_css_frame *frame, u32 *p_pgnr); @@ -108,7 +108,7 @@ bool atomisp_is_viewfinder_support(struct atomisp_device *isp); * ATOMISP_IOC_S_SENSOR_RUNMODE ioctl was called */ int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, - struct atomisp_s_runmode *runmode); + struct atomisp_s_runmode *runmode); /* #endif * Function to enable/disable lens geometry distortion correction (GDC) and @@ -130,7 +130,7 @@ int atomisp_low_light(struct atomisp_sub_device *asd, int flag, int atomisp_xnr(struct atomisp_sub_device *asd, int flag, int *arg); int atomisp_formats(struct atomisp_sub_device *asd, int flag, - struct atomisp_formats_config *config); + struct atomisp_formats_config *config); /* * Function to configure noise reduction @@ -171,7 +171,7 @@ int atomisp_ctc(struct atomisp_sub_device *asd, int flag, * Function to update gamma correction parameters */ int atomisp_gamma_correction(struct atomisp_sub_device *asd, int flag, - struct atomisp_gc_config *config); + struct atomisp_gc_config *config); /* * Function to update Gdc table for gdc @@ -194,7 +194,7 @@ int atomisp_get_dis_stat(struct atomisp_sub_device *asd, * Function to get DVS2 BQ resolution settings */ int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd, - struct atomisp_dvs2_bq_resolutions *bq_res); + struct atomisp_dvs2_bq_resolutions *bq_res); /* * Function to set the DIS coefficients. @@ -221,10 +221,10 @@ int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag, struct atomisp_metadata *config); int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag, - struct atomisp_metadata_with_type *config); + struct atomisp_metadata_with_type *config); int atomisp_set_parameters(struct video_device *vdev, - struct atomisp_parameters *arg); + struct atomisp_parameters *arg); /* * Function to set/get isp parameters to isp */ @@ -298,14 +298,14 @@ int atomisp_digital_zoom(struct atomisp_sub_device *asd, int flag, * Function set camera_prefiles.xml current sensor pixel array size */ int atomisp_set_array_res(struct atomisp_sub_device *asd, - struct atomisp_resolution *config); + struct atomisp_resolution *config); /* * Function to calculate real zoom region for every pipe */ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, - struct atomisp_css_dz_config *dz_config, - enum atomisp_css_pipe_id css_pipe_id); + struct atomisp_css_dz_config *dz_config, + enum atomisp_css_pipe_id css_pipe_id); int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd, struct atomisp_parameters *arg, @@ -328,16 +328,16 @@ int atomisp_cp_morph_table(struct atomisp_sub_device *asd, bool from_user); int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, - struct atomisp_dvs_6axis_config *user_6axis_config, - struct atomisp_css_params *css_param, - bool from_user); + struct atomisp_dvs_6axis_config *user_6axis_config, + struct atomisp_css_params *css_param, + bool from_user); int atomisp_makeup_css_parameters(struct atomisp_sub_device *asd, struct atomisp_parameters *arg, struct atomisp_css_params *css_param); int atomisp_compare_grid(struct atomisp_sub_device *asd, - struct atomisp_grid_info *atomgrid); + struct atomisp_grid_info *atomgrid); int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd, struct atomisp_sensor_mode_data *config); @@ -346,7 +346,7 @@ int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f); /* This function looks up the closest available resolution. */ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, - bool *res_overflow); + bool *res_overflow); int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f); int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f); @@ -355,7 +355,7 @@ int atomisp_set_shading_table(struct atomisp_sub_device *asd, struct atomisp_shading_table *shading_table); int atomisp_offline_capture_configure(struct atomisp_sub_device *asd, - struct atomisp_cont_capture_conf *cvf_config); + struct atomisp_cont_capture_conf *cvf_config); int atomisp_ospm_dphy_down(struct atomisp_device *isp); int atomisp_ospm_dphy_up(struct atomisp_device *isp); @@ -381,7 +381,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, void atomisp_css_flush(struct atomisp_device *isp); int atomisp_source_pad_to_stream_id(struct atomisp_sub_device *asd, - uint16_t source_pad); + uint16_t source_pad); /* * Events. Only one event has to be exported for now. @@ -389,13 +389,13 @@ int atomisp_source_pad_to_stream_id(struct atomisp_sub_device *asd, void atomisp_eof_event(struct atomisp_sub_device *asd, uint8_t exp_id); enum mipi_port_id __get_mipi_port(struct atomisp_device *isp, - enum atomisp_camera_port port); + enum atomisp_camera_port port); bool atomisp_is_vf_pipe(struct atomisp_video_pipe *pipe); void atomisp_apply_css_parameters( - struct atomisp_sub_device *asd, - struct atomisp_css_params *css_param); + struct atomisp_sub_device *asd, + struct atomisp_css_params *css_param); void atomisp_free_css_parameters(struct atomisp_css_params *css_param); void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe); @@ -417,7 +417,7 @@ void atomisp_init_raw_buffer_bitmap(struct atomisp_sub_device *asd); * Function to enable/disable zoom for capture pipe */ int atomisp_enable_dz_capt_pipe(struct atomisp_sub_device *asd, - unsigned int *enable); + unsigned int *enable); /* * Function to get metadata type bu pipe id @@ -436,7 +436,7 @@ int atomisp_inject_a_fake_event(struct atomisp_sub_device *asd, int *event); * pipeline output */ int atomisp_get_invalid_frame_num(struct video_device *vdev, - int *invalid_frame_num); + int *invalid_frame_num); int atomisp_mrfld_power_up(struct atomisp_device *isp); int atomisp_mrfld_power_down(struct atomisp_device *isp); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h index e74b205a9537e..205c530e80908 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h @@ -149,34 +149,34 @@ int atomisp_css_irq_translate(struct atomisp_device *isp, unsigned int *infos); void atomisp_css_rx_get_irq_info(enum mipi_port_id port, - unsigned int *infos); + unsigned int *infos); void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, - unsigned int infos); + unsigned int infos); int atomisp_css_irq_enable(struct atomisp_device *isp, enum atomisp_css_irq_info info, bool enable); int atomisp_q_video_buffer_to_css(struct atomisp_sub_device *asd, - struct videobuf_vmalloc_memory *vm_mem, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_buffer_type css_buf_type, - enum atomisp_css_pipe_id css_pipe_id); + struct videobuf_vmalloc_memory *vm_mem, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id); int atomisp_q_s3a_buffer_to_css(struct atomisp_sub_device *asd, - struct atomisp_s3a_buf *s3a_buf, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id); + struct atomisp_s3a_buf *s3a_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id); int atomisp_q_metadata_buffer_to_css(struct atomisp_sub_device *asd, - struct atomisp_metadata_buf *metadata_buf, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id); + struct atomisp_metadata_buf *metadata_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id); int atomisp_q_dis_buffer_to_css(struct atomisp_sub_device *asd, - struct atomisp_dis_buf *dis_buf, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id); + struct atomisp_dis_buf *dis_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id); void atomisp_css_mmu_invalidate_cache(void); @@ -187,7 +187,7 @@ int atomisp_css_start(struct atomisp_sub_device *asd, void atomisp_css_update_isp_params(struct atomisp_sub_device *asd); void atomisp_css_update_isp_params_on_pipe(struct atomisp_sub_device *asd, - struct ia_css_pipe *pipe); + struct ia_css_pipe *pipe); int atomisp_css_queue_buffer(struct atomisp_sub_device *asd, enum atomisp_input_stream_id stream_id, @@ -196,10 +196,10 @@ int atomisp_css_queue_buffer(struct atomisp_sub_device *asd, struct atomisp_css_buffer *isp_css_buffer); int atomisp_css_dequeue_buffer(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id pipe_id, - enum atomisp_css_buffer_type buf_type, - struct atomisp_css_buffer *isp_css_buffer); + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id pipe_id, + enum atomisp_css_buffer_type buf_type, + struct atomisp_css_buffer *isp_css_buffer); int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, u16 stream_id, @@ -213,11 +213,12 @@ void atomisp_css_free_3a_buffer(struct atomisp_s3a_buf *s3a_buf); void atomisp_css_free_dis_buffer(struct atomisp_dis_buf *dis_buf); -void atomisp_css_free_metadata_buffer(struct atomisp_metadata_buf *metadata_buf); +void atomisp_css_free_metadata_buffer(struct atomisp_metadata_buf + *metadata_buf); int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, - enum atomisp_css_pipe_id pipe_id, - int source_pad); + enum atomisp_css_pipe_id pipe_id, + int source_pad); int atomisp_alloc_3a_output_buf(struct atomisp_sub_device *asd); @@ -265,102 +266,102 @@ int atomisp_css_isys_two_stream_cfg(struct atomisp_sub_device *asd, enum atomisp_input_format input_format); void atomisp_css_isys_two_stream_cfg_update_stream1( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_input_format input_format, - unsigned int width, unsigned int height); + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height); void atomisp_css_isys_two_stream_cfg_update_stream2( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_input_format input_format, - unsigned int width, unsigned int height); + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height); int atomisp_css_input_set_resolution(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - struct v4l2_mbus_framefmt *ffmt); + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt); void atomisp_css_input_set_binning_factor(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - unsigned int bin_factor); + enum atomisp_input_stream_id stream_id, + unsigned int bin_factor); void atomisp_css_input_set_bayer_order(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_bayer_order bayer_order); + enum atomisp_input_stream_id stream_id, + enum atomisp_css_bayer_order bayer_order); void atomisp_css_input_set_format(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_input_format format); + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format format); int atomisp_css_input_set_effective_resolution( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - unsigned int width, - unsigned int height); + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + unsigned int width, + unsigned int height); void atomisp_css_video_set_dis_envelope(struct atomisp_sub_device *asd, unsigned int dvs_w, unsigned int dvs_h); void atomisp_css_input_set_two_pixels_per_clock( - struct atomisp_sub_device *asd, - bool two_ppc); + struct atomisp_sub_device *asd, + bool two_ppc); void atomisp_css_enable_raw_binning(struct atomisp_sub_device *asd, - bool enable); + bool enable); void atomisp_css_enable_dz(struct atomisp_sub_device *asd, bool enable); void atomisp_css_capture_set_mode(struct atomisp_sub_device *asd, - enum atomisp_css_capture_mode mode); + enum atomisp_css_capture_mode mode); void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, enum atomisp_css_input_mode mode); void atomisp_css_capture_enable_online(struct atomisp_sub_device *asd, - unsigned short stream_index, bool enable); + unsigned short stream_index, bool enable); void atomisp_css_preview_enable_online(struct atomisp_sub_device *asd, - unsigned short stream_index, bool enable); + unsigned short stream_index, bool enable); void atomisp_css_video_enable_online(struct atomisp_sub_device *asd, - bool enable); + bool enable); void atomisp_css_enable_continuous(struct atomisp_sub_device *asd, - bool enable); + bool enable); void atomisp_css_enable_cvf(struct atomisp_sub_device *asd, - bool enable); + bool enable); int atomisp_css_input_configure_port(struct atomisp_sub_device *asd, - enum mipi_port_id port, - unsigned int num_lanes, - unsigned int timeout, - unsigned int mipi_freq, - enum atomisp_input_format metadata_format, - unsigned int metadata_width, - unsigned int metadata_height); + enum mipi_port_id port, + unsigned int num_lanes, + unsigned int timeout, + unsigned int mipi_freq, + enum atomisp_input_format metadata_format, + unsigned int metadata_width, + unsigned int metadata_height); int atomisp_css_frame_allocate(struct atomisp_css_frame **frame, - unsigned int width, unsigned int height, - enum atomisp_css_frame_format format, - unsigned int padded_width, - unsigned int raw_bit_depth); + unsigned int width, unsigned int height, + enum atomisp_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth); int atomisp_css_frame_allocate_from_info(struct atomisp_css_frame **frame, - const struct atomisp_css_frame_info *info); + const struct atomisp_css_frame_info *info); void atomisp_css_frame_free(struct atomisp_css_frame *frame); int atomisp_css_frame_map(struct atomisp_css_frame **frame, - const struct atomisp_css_frame_info *info, - const void __user *data, uint16_t attribute, - void *context); + const struct atomisp_css_frame_info *info, + const void __user *data, uint16_t attribute, + void *context); int atomisp_css_set_black_frame(struct atomisp_sub_device *asd, - const struct atomisp_css_frame *raw_black_frame); + const struct atomisp_css_frame *raw_black_frame); int atomisp_css_allocate_continuous_frames(bool init_time, - struct atomisp_sub_device *asd); + struct atomisp_sub_device *asd); void atomisp_css_update_continuous_frames(struct atomisp_sub_device *asd); @@ -368,117 +369,117 @@ void atomisp_create_pipes_stream(struct atomisp_sub_device *asd); void atomisp_destroy_pipes_stream_force(struct atomisp_sub_device *asd); int atomisp_css_stop(struct atomisp_sub_device *asd, - enum atomisp_css_pipe_id pipe_id, bool in_reset); + enum atomisp_css_pipe_id pipe_id, bool in_reset); int atomisp_css_continuous_set_num_raw_frames( - struct atomisp_sub_device *asd, - int num_frames); + struct atomisp_sub_device *asd, + int num_frames); void atomisp_css_disable_vf_pp(struct atomisp_sub_device *asd, bool disable); int atomisp_css_copy_configure_output(struct atomisp_sub_device *asd, - unsigned int stream_index, - unsigned int width, unsigned int height, - unsigned int padded_width, - enum atomisp_css_frame_format format); + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format); int atomisp_css_yuvpp_configure_output(struct atomisp_sub_device *asd, - unsigned int stream_index, - unsigned int width, unsigned int height, - unsigned int padded_width, - enum atomisp_css_frame_format format); + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format); int atomisp_css_yuvpp_configure_viewfinder( - struct atomisp_sub_device *asd, - unsigned int stream_index, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format); + struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); int atomisp_css_yuvpp_get_output_frame_info( - struct atomisp_sub_device *asd, - unsigned int stream_index, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info); int atomisp_css_yuvpp_get_viewfinder_frame_info( - struct atomisp_sub_device *asd, - unsigned int stream_index, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info); int atomisp_css_preview_configure_output(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format); + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); int atomisp_css_capture_configure_output(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format); + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); int atomisp_css_video_configure_output(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format); + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, - u16 source_pad, - struct atomisp_css_frame_info *frame_info); + u16 source_pad, + struct atomisp_css_frame_info *frame_info); int atomisp_css_video_configure_viewfinder(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format); + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); int atomisp_css_capture_configure_viewfinder( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format); + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format); int atomisp_css_video_get_viewfinder_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); int atomisp_css_capture_get_viewfinder_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); int atomisp_css_copy_get_output_frame_info( - struct atomisp_sub_device *asd, - unsigned int stream_index, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info); int atomisp_css_capture_get_output_raw_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); int atomisp_css_preview_get_output_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); int atomisp_css_capture_get_output_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); int atomisp_css_video_get_output_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info); + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info); int atomisp_css_preview_configure_pp_input( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height); + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height); int atomisp_css_capture_configure_pp_input( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height); + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height); int atomisp_css_video_configure_pp_input( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height); + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height); int atomisp_css_offline_capture_configure(struct atomisp_sub_device *asd, - int num_captures, unsigned int skip, int offset); + int num_captures, unsigned int skip, int offset); int atomisp_css_exp_id_capture(struct atomisp_sub_device *asd, int exp_id); int atomisp_css_exp_id_unlock(struct atomisp_sub_device *asd, int exp_id); @@ -494,130 +495,130 @@ bool atomisp_css_isp_has_started(void); void atomisp_css_request_flash(struct atomisp_sub_device *asd); void atomisp_css_set_wb_config(struct atomisp_sub_device *asd, - struct atomisp_css_wb_config *wb_config); + struct atomisp_css_wb_config *wb_config); void atomisp_css_set_ob_config(struct atomisp_sub_device *asd, - struct atomisp_css_ob_config *ob_config); + struct atomisp_css_ob_config *ob_config); void atomisp_css_set_dp_config(struct atomisp_sub_device *asd, - struct atomisp_css_dp_config *dp_config); + struct atomisp_css_dp_config *dp_config); void atomisp_css_set_de_config(struct atomisp_sub_device *asd, - struct atomisp_css_de_config *de_config); + struct atomisp_css_de_config *de_config); void atomisp_css_set_dz_config(struct atomisp_sub_device *asd, - struct atomisp_css_dz_config *dz_config); + struct atomisp_css_dz_config *dz_config); void atomisp_css_set_default_de_config(struct atomisp_sub_device *asd); void atomisp_css_set_ce_config(struct atomisp_sub_device *asd, - struct atomisp_css_ce_config *ce_config); + struct atomisp_css_ce_config *ce_config); void atomisp_css_set_nr_config(struct atomisp_sub_device *asd, - struct atomisp_css_nr_config *nr_config); + struct atomisp_css_nr_config *nr_config); void atomisp_css_set_ee_config(struct atomisp_sub_device *asd, - struct atomisp_css_ee_config *ee_config); + struct atomisp_css_ee_config *ee_config); void atomisp_css_set_tnr_config(struct atomisp_sub_device *asd, - struct atomisp_css_tnr_config *tnr_config); + struct atomisp_css_tnr_config *tnr_config); void atomisp_css_set_cc_config(struct atomisp_sub_device *asd, - struct atomisp_css_cc_config *cc_config); + struct atomisp_css_cc_config *cc_config); void atomisp_css_set_macc_table(struct atomisp_sub_device *asd, - struct atomisp_css_macc_table *macc_table); + struct atomisp_css_macc_table *macc_table); void atomisp_css_set_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_gamma_table *gamma_table); + struct atomisp_css_gamma_table *gamma_table); void atomisp_css_set_ctc_table(struct atomisp_sub_device *asd, - struct atomisp_css_ctc_table *ctc_table); + struct atomisp_css_ctc_table *ctc_table); void atomisp_css_set_gc_config(struct atomisp_sub_device *asd, - struct atomisp_css_gc_config *gc_config); + struct atomisp_css_gc_config *gc_config); void atomisp_css_set_3a_config(struct atomisp_sub_device *asd, - struct atomisp_css_3a_config *s3a_config); + struct atomisp_css_3a_config *s3a_config); void atomisp_css_video_set_dis_vector(struct atomisp_sub_device *asd, - struct atomisp_dis_vector *vector); + struct atomisp_dis_vector *vector); void atomisp_css_set_dvs2_coefs(struct atomisp_sub_device *asd, struct ia_css_dvs2_coefficients *coefs); int atomisp_css_set_dis_coefs(struct atomisp_sub_device *asd, - struct atomisp_dis_coefficients *coefs); + struct atomisp_dis_coefficients *coefs); void atomisp_css_set_zoom_factor(struct atomisp_sub_device *asd, - unsigned int zoom); + unsigned int zoom); int atomisp_css_get_wb_config(struct atomisp_sub_device *asd, - struct atomisp_wb_config *config); + struct atomisp_wb_config *config); int atomisp_css_get_ob_config(struct atomisp_sub_device *asd, - struct atomisp_ob_config *config); + struct atomisp_ob_config *config); int atomisp_css_get_dp_config(struct atomisp_sub_device *asd, - struct atomisp_dp_config *config); + struct atomisp_dp_config *config); int atomisp_css_get_de_config(struct atomisp_sub_device *asd, - struct atomisp_de_config *config); + struct atomisp_de_config *config); int atomisp_css_get_nr_config(struct atomisp_sub_device *asd, - struct atomisp_nr_config *config); + struct atomisp_nr_config *config); int atomisp_css_get_ee_config(struct atomisp_sub_device *asd, - struct atomisp_ee_config *config); + struct atomisp_ee_config *config); int atomisp_css_get_tnr_config(struct atomisp_sub_device *asd, - struct atomisp_tnr_config *config); + struct atomisp_tnr_config *config); int atomisp_css_get_ctc_table(struct atomisp_sub_device *asd, - struct atomisp_ctc_table *config); + struct atomisp_ctc_table *config); int atomisp_css_get_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_gamma_table *config); + struct atomisp_gamma_table *config); int atomisp_css_get_gc_config(struct atomisp_sub_device *asd, - struct atomisp_gc_config *config); + struct atomisp_gc_config *config); int atomisp_css_get_3a_config(struct atomisp_sub_device *asd, - struct atomisp_3a_config *config); + struct atomisp_3a_config *config); int atomisp_css_get_formats_config(struct atomisp_sub_device *asd, - struct atomisp_formats_config *formats_config); + struct atomisp_formats_config *formats_config); void atomisp_css_set_formats_config(struct atomisp_sub_device *asd, - struct atomisp_css_formats_config *formats_config); + struct atomisp_css_formats_config *formats_config); int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, - unsigned int *zoom); + unsigned int *zoom); struct atomisp_css_shading_table *atomisp_css_shading_table_alloc( - unsigned int width, unsigned int height); + unsigned int width, unsigned int height); void atomisp_css_set_shading_table(struct atomisp_sub_device *asd, - struct atomisp_css_shading_table *table); + struct atomisp_css_shading_table *table); void atomisp_css_shading_table_free(struct atomisp_css_shading_table *table); struct atomisp_css_morph_table *atomisp_css_morph_table_allocate( - unsigned int width, unsigned int height); + unsigned int width, unsigned int height); void atomisp_css_set_morph_table(struct atomisp_sub_device *asd, - struct atomisp_css_morph_table *table); + struct atomisp_css_morph_table *table); void atomisp_css_get_morph_table(struct atomisp_sub_device *asd, - struct atomisp_css_morph_table *table); + struct atomisp_css_morph_table *table); void atomisp_css_morph_table_free(struct atomisp_css_morph_table *table); void atomisp_css_set_cont_prev_start_time(struct atomisp_device *isp, - unsigned int overlap); + unsigned int overlap); int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd, - struct atomisp_dis_statistics *stats); + struct atomisp_dis_statistics *stats); int atomisp_css_update_stream(struct atomisp_sub_device *asd); @@ -630,21 +631,21 @@ int atomisp_css_stop_acc_pipe(struct atomisp_sub_device *asd); void atomisp_css_destroy_acc_pipe(struct atomisp_sub_device *asd); int atomisp_css_load_acc_extension(struct atomisp_sub_device *asd, - struct atomisp_css_fw_info *fw, - enum atomisp_css_pipe_id pipe_id, - unsigned int type); + struct atomisp_css_fw_info *fw, + enum atomisp_css_pipe_id pipe_id, + unsigned int type); void atomisp_css_unload_acc_extension(struct atomisp_sub_device *asd, - struct atomisp_css_fw_info *fw, - enum atomisp_css_pipe_id pipe_id); + struct atomisp_css_fw_info *fw, + enum atomisp_css_pipe_id pipe_id); int atomisp_css_wait_acc_finish(struct atomisp_sub_device *asd); void atomisp_css_acc_done(struct atomisp_sub_device *asd); int atomisp_css_load_acc_binary(struct atomisp_sub_device *asd, - struct atomisp_css_fw_info *fw, - unsigned int index); + struct atomisp_css_fw_info *fw, + unsigned int index); void atomisp_css_unload_acc_binary(struct atomisp_sub_device *asd); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c index 56c69b4738987..fe094dec8e03d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c @@ -211,12 +211,12 @@ static int hmm_get_mmu_base_addr(unsigned int *mmu_base_addr) } *mmu_base_addr = sh_mmu_mrfld.get_pd_base(&bo_device.mmu, - bo_device.mmu.base_address); + bo_device.mmu.base_address); return 0; } static void atomisp_isp_parameters_clean_up( - struct atomisp_css_isp_config *config) + struct atomisp_css_isp_config *config) { /* * Set NULL to configs pointer to avoid they are set into isp again when @@ -239,89 +239,89 @@ static void __dump_pipe_config(struct atomisp_sub_device *asd, pe_config = &stream_env->pipe_extra_configs[pipe_id]; dev_dbg(isp->dev, "dumping pipe[%d] config:\n", pipe_id); dev_dbg(isp->dev, - "pipe_config.pipe_mode:%d.\n", p_config->mode); + "pipe_config.pipe_mode:%d.\n", p_config->mode); dev_dbg(isp->dev, - "pipe_config.output_info[0] w=%d, h=%d.\n", - p_config->output_info[0].res.width, - p_config->output_info[0].res.height); + "pipe_config.output_info[0] w=%d, h=%d.\n", + p_config->output_info[0].res.width, + p_config->output_info[0].res.height); dev_dbg(isp->dev, - "pipe_config.vf_pp_in_res w=%d, h=%d.\n", - p_config->vf_pp_in_res.width, - p_config->vf_pp_in_res.height); + "pipe_config.vf_pp_in_res w=%d, h=%d.\n", + p_config->vf_pp_in_res.width, + p_config->vf_pp_in_res.height); dev_dbg(isp->dev, - "pipe_config.capt_pp_in_res w=%d, h=%d.\n", - p_config->capt_pp_in_res.width, - p_config->capt_pp_in_res.height); + "pipe_config.capt_pp_in_res w=%d, h=%d.\n", + p_config->capt_pp_in_res.width, + p_config->capt_pp_in_res.height); dev_dbg(isp->dev, - "pipe_config.output.padded w=%d.\n", - p_config->output_info[0].padded_width); + "pipe_config.output.padded w=%d.\n", + p_config->output_info[0].padded_width); dev_dbg(isp->dev, - "pipe_config.vf_output_info[0] w=%d, h=%d.\n", - p_config->vf_output_info[0].res.width, - p_config->vf_output_info[0].res.height); + "pipe_config.vf_output_info[0] w=%d, h=%d.\n", + p_config->vf_output_info[0].res.width, + p_config->vf_output_info[0].res.height); dev_dbg(isp->dev, - "pipe_config.bayer_ds_out_res w=%d, h=%d.\n", - p_config->bayer_ds_out_res.width, - p_config->bayer_ds_out_res.height); + "pipe_config.bayer_ds_out_res w=%d, h=%d.\n", + p_config->bayer_ds_out_res.width, + p_config->bayer_ds_out_res.height); dev_dbg(isp->dev, - "pipe_config.envelope w=%d, h=%d.\n", - p_config->dvs_envelope.width, - p_config->dvs_envelope.height); + "pipe_config.envelope w=%d, h=%d.\n", + p_config->dvs_envelope.width, + p_config->dvs_envelope.height); dev_dbg(isp->dev, - "pipe_config.dvs_frame_delay=%d.\n", - p_config->dvs_frame_delay); + "pipe_config.dvs_frame_delay=%d.\n", + p_config->dvs_frame_delay); dev_dbg(isp->dev, - "pipe_config.isp_pipe_version:%d.\n", + "pipe_config.isp_pipe_version:%d.\n", p_config->isp_pipe_version); dev_dbg(isp->dev, - "pipe_config.acc_extension=%p.\n", - p_config->acc_extension); + "pipe_config.acc_extension=%p.\n", + p_config->acc_extension); dev_dbg(isp->dev, - "pipe_config.acc_stages=%p.\n", - p_config->acc_stages); + "pipe_config.acc_stages=%p.\n", + p_config->acc_stages); dev_dbg(isp->dev, - "pipe_config.num_acc_stages=%d.\n", - p_config->num_acc_stages); + "pipe_config.num_acc_stages=%d.\n", + p_config->num_acc_stages); dev_dbg(isp->dev, - "pipe_config.acc_num_execs=%d.\n", - p_config->acc_num_execs); + "pipe_config.acc_num_execs=%d.\n", + p_config->acc_num_execs); dev_dbg(isp->dev, - "pipe_config.default_capture_config.capture_mode=%d.\n", - p_config->default_capture_config.mode); + "pipe_config.default_capture_config.capture_mode=%d.\n", + p_config->default_capture_config.mode); dev_dbg(isp->dev, - "pipe_config.enable_dz=%d.\n", - p_config->enable_dz); + "pipe_config.enable_dz=%d.\n", + p_config->enable_dz); dev_dbg(isp->dev, - "pipe_config.default_capture_config.enable_xnr=%d.\n", - p_config->default_capture_config.enable_xnr); + "pipe_config.default_capture_config.enable_xnr=%d.\n", + p_config->default_capture_config.enable_xnr); dev_dbg(isp->dev, - "dumping pipe[%d] extra config:\n", pipe_id); + "dumping pipe[%d] extra config:\n", pipe_id); dev_dbg(isp->dev, - "pipe_extra_config.enable_raw_binning:%d.\n", - pe_config->enable_raw_binning); + "pipe_extra_config.enable_raw_binning:%d.\n", + pe_config->enable_raw_binning); dev_dbg(isp->dev, - "pipe_extra_config.enable_yuv_ds:%d.\n", - pe_config->enable_yuv_ds); + "pipe_extra_config.enable_yuv_ds:%d.\n", + pe_config->enable_yuv_ds); dev_dbg(isp->dev, - "pipe_extra_config.enable_high_speed:%d.\n", - pe_config->enable_high_speed); + "pipe_extra_config.enable_high_speed:%d.\n", + pe_config->enable_high_speed); dev_dbg(isp->dev, - "pipe_extra_config.enable_dvs_6axis:%d.\n", - pe_config->enable_dvs_6axis); + "pipe_extra_config.enable_dvs_6axis:%d.\n", + pe_config->enable_dvs_6axis); dev_dbg(isp->dev, - "pipe_extra_config.enable_reduced_pipe:%d.\n", - pe_config->enable_reduced_pipe); + "pipe_extra_config.enable_reduced_pipe:%d.\n", + pe_config->enable_reduced_pipe); dev_dbg(isp->dev, - "pipe_(extra_)config.enable_dz:%d.\n", - p_config->enable_dz); + "pipe_(extra_)config.enable_dz:%d.\n", + p_config->enable_dz); dev_dbg(isp->dev, - "pipe_extra_config.disable_vf_pp:%d.\n", - pe_config->disable_vf_pp); + "pipe_extra_config.disable_vf_pp:%d.\n", + pe_config->disable_vf_pp); } } static void __dump_stream_config(struct atomisp_sub_device *asd, - struct atomisp_stream_env *stream_env) + struct atomisp_stream_env *stream_env) { struct atomisp_device *isp = asd->isp; struct ia_css_stream_config *s_config; @@ -342,47 +342,49 @@ static void __dump_stream_config(struct atomisp_sub_device *asd, if (s_config->mode == IA_CSS_INPUT_MODE_SENSOR || s_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { dev_dbg(isp->dev, "stream_config.source.port.port=%d.\n", - s_config->source.port.port); + s_config->source.port.port); dev_dbg(isp->dev, "stream_config.source.port.num_lanes=%d.\n", - s_config->source.port.num_lanes); + s_config->source.port.num_lanes); dev_dbg(isp->dev, "stream_config.source.port.timeout=%d.\n", - s_config->source.port.timeout); + s_config->source.port.timeout); dev_dbg(isp->dev, "stream_config.source.port.rxcount=0x%x.\n", - s_config->source.port.rxcount); + s_config->source.port.rxcount); dev_dbg(isp->dev, "stream_config.source.port.compression.type=%d.\n", - s_config->source.port.compression.type); - dev_dbg(isp->dev, "stream_config.source.port.compression.compressed_bits_per_pixel=%d.\n", - s_config->source.port.compression. - compressed_bits_per_pixel); - dev_dbg(isp->dev, "stream_config.source.port.compression.uncompressed_bits_per_pixel=%d.\n", - s_config->source.port.compression. - uncompressed_bits_per_pixel); + s_config->source.port.compression.type); + dev_dbg(isp->dev, + "stream_config.source.port.compression.compressed_bits_per_pixel=%d.\n", + s_config->source.port.compression. + compressed_bits_per_pixel); + dev_dbg(isp->dev, + "stream_config.source.port.compression.uncompressed_bits_per_pixel=%d.\n", + s_config->source.port.compression. + uncompressed_bits_per_pixel); } else if (s_config->mode == IA_CSS_INPUT_MODE_TPG) { dev_dbg(isp->dev, "stream_config.source.tpg.id=%d.\n", - s_config->source.tpg.id); + s_config->source.tpg.id); dev_dbg(isp->dev, "stream_config.source.tpg.mode=%d.\n", - s_config->source.tpg.mode); + s_config->source.tpg.mode); dev_dbg(isp->dev, "stream_config.source.tpg.x_mask=%d.\n", - s_config->source.tpg.x_mask); + s_config->source.tpg.x_mask); dev_dbg(isp->dev, "stream_config.source.tpg.x_delta=%d.\n", - s_config->source.tpg.x_delta); + s_config->source.tpg.x_delta); dev_dbg(isp->dev, "stream_config.source.tpg.y_mask=%d.\n", - s_config->source.tpg.y_mask); + s_config->source.tpg.y_mask); dev_dbg(isp->dev, "stream_config.source.tpg.y_delta=%d.\n", - s_config->source.tpg.y_delta); + s_config->source.tpg.y_delta); dev_dbg(isp->dev, "stream_config.source.tpg.xy_mask=%d.\n", - s_config->source.tpg.xy_mask); + s_config->source.tpg.xy_mask); } else if (s_config->mode == IA_CSS_INPUT_MODE_PRBS) { dev_dbg(isp->dev, "stream_config.source.prbs.id=%d.\n", - s_config->source.prbs.id); + s_config->source.prbs.id); dev_dbg(isp->dev, "stream_config.source.prbs.h_blank=%d.\n", - s_config->source.prbs.h_blank); + s_config->source.prbs.h_blank); dev_dbg(isp->dev, "stream_config.source.prbs.v_blank=%d.\n", - s_config->source.prbs.v_blank); + s_config->source.prbs.v_blank); dev_dbg(isp->dev, "stream_config.source.prbs.seed=%d.\n", - s_config->source.prbs.seed); + s_config->source.prbs.seed); dev_dbg(isp->dev, "stream_config.source.prbs.seed1=%d.\n", - s_config->source.prbs.seed1); + s_config->source.prbs.seed1); } for (j = 0; j < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; j++) { @@ -419,41 +421,41 @@ static void __dump_stream_config(struct atomisp_sub_device *asd, s_config->input_config.bayer_order); dev_dbg(isp->dev, "stream_config.pixels_per_clock=%d.\n", - s_config->pixels_per_clock); + s_config->pixels_per_clock); dev_dbg(isp->dev, "stream_config.online=%d.\n", s_config->online); dev_dbg(isp->dev, "stream_config.continuous=%d.\n", - s_config->continuous); + s_config->continuous); dev_dbg(isp->dev, "stream_config.disable_cont_viewfinder=%d.\n", - s_config->disable_cont_viewfinder); + s_config->disable_cont_viewfinder); dev_dbg(isp->dev, "stream_config.channel_id=%d.\n", - s_config->channel_id); + s_config->channel_id); dev_dbg(isp->dev, "stream_config.init_num_cont_raw_buf=%d.\n", - s_config->init_num_cont_raw_buf); + s_config->init_num_cont_raw_buf); dev_dbg(isp->dev, "stream_config.target_num_cont_raw_buf=%d.\n", - s_config->target_num_cont_raw_buf); + s_config->target_num_cont_raw_buf); dev_dbg(isp->dev, "stream_config.left_padding=%d.\n", - s_config->left_padding); + s_config->left_padding); dev_dbg(isp->dev, "stream_config.sensor_binning_factor=%d.\n", - s_config->sensor_binning_factor); + s_config->sensor_binning_factor); dev_dbg(isp->dev, "stream_config.pixels_per_clock=%d.\n", - s_config->pixels_per_clock); + s_config->pixels_per_clock); dev_dbg(isp->dev, "stream_config.pack_raw_pixels=%d.\n", - s_config->pack_raw_pixels); + s_config->pack_raw_pixels); dev_dbg(isp->dev, "stream_config.flash_gpio_pin=%d.\n", - s_config->flash_gpio_pin); + s_config->flash_gpio_pin); dev_dbg(isp->dev, "stream_config.mipi_buffer_config.size_mem_words=%d.\n", - s_config->mipi_buffer_config.size_mem_words); + s_config->mipi_buffer_config.size_mem_words); dev_dbg(isp->dev, "stream_config.mipi_buffer_config.contiguous=%d.\n", - s_config->mipi_buffer_config.contiguous); + s_config->mipi_buffer_config.contiguous); dev_dbg(isp->dev, "stream_config.metadata_config.data_type=%d.\n", - s_config->metadata_config.data_type); + s_config->metadata_config.data_type); dev_dbg(isp->dev, "stream_config.metadata_config.resolution w=%d, h=%d.\n", - s_config->metadata_config.resolution.width, - s_config->metadata_config.resolution.height); + s_config->metadata_config.resolution.width, + s_config->metadata_config.resolution.height); } static int __destroy_stream(struct atomisp_sub_device *asd, - struct atomisp_stream_env *stream_env, bool force) + struct atomisp_stream_env *stream_env, bool force) { struct atomisp_device *isp = asd->isp; int i; @@ -531,17 +533,17 @@ static int __create_stream(struct atomisp_sub_device *asd, return 0; stream_env->stream_config.target_num_cont_raw_buf = - asd->continuous_raw_buffer_size->val; + asd->continuous_raw_buffer_size->val; stream_env->stream_config.channel_id = stream_env->ch_id; stream_env->stream_config.ia_css_enable_raw_buffer_locking = - asd->enable_raw_buffer_lock->val; + asd->enable_raw_buffer_lock->val; __dump_stream_config(asd, stream_env); if (ia_css_stream_create(&stream_env->stream_config, - pipe_index, multi_pipes, &stream_env->stream) != IA_CSS_SUCCESS) + pipe_index, multi_pipes, &stream_env->stream) != IA_CSS_SUCCESS) return -EINVAL; if (ia_css_stream_get_info(stream_env->stream, - &stream_env->stream_info) != IA_CSS_SUCCESS) { + &stream_env->stream_info) != IA_CSS_SUCCESS) { ia_css_stream_destroy(stream_env->stream); stream_env->stream = NULL; return -EINVAL; @@ -621,59 +623,59 @@ void atomisp_destroy_pipes_stream_force(struct atomisp_sub_device *asd) } static void __apply_additional_pipe_config( - struct atomisp_sub_device *asd, - struct atomisp_stream_env *stream_env, - enum ia_css_pipe_id pipe_id) + struct atomisp_sub_device *asd, + struct atomisp_stream_env *stream_env, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; if (pipe_id < 0 || pipe_id >= IA_CSS_PIPE_ID_NUM) { dev_err(isp->dev, - "wrong pipe_id for additional pipe config.\n"); + "wrong pipe_id for additional pipe config.\n"); return; } /* apply default pipe config */ stream_env->pipe_configs[pipe_id].isp_pipe_version = 2; stream_env->pipe_configs[pipe_id].enable_dz = - asd->disable_dz->val ? false : true; + asd->disable_dz->val ? false : true; /* apply isp 2.2 specific config for baytrail*/ switch (pipe_id) { case IA_CSS_PIPE_ID_CAPTURE: /* enable capture pp/dz manually or digital zoom would * fail*/ if (stream_env->pipe_configs[pipe_id]. - default_capture_config.mode == CSS_CAPTURE_MODE_RAW) + default_capture_config.mode == CSS_CAPTURE_MODE_RAW) stream_env->pipe_configs[pipe_id].enable_dz = false; #ifdef ISP2401 /* the isp default to use ISP2.2 and the camera hal will * control whether use isp2.7 */ if (asd->select_isp_version->val == - ATOMISP_CSS_ISP_PIPE_VERSION_2_7) + ATOMISP_CSS_ISP_PIPE_VERSION_2_7) stream_env->pipe_configs[pipe_id].isp_pipe_version = - SH_CSS_ISP_PIPE_VERSION_2_7; + SH_CSS_ISP_PIPE_VERSION_2_7; else stream_env->pipe_configs[pipe_id].isp_pipe_version = - SH_CSS_ISP_PIPE_VERSION_2_2; + SH_CSS_ISP_PIPE_VERSION_2_2; #endif break; case IA_CSS_PIPE_ID_VIDEO: /* enable reduced pipe to have binary * video_dz_2_min selected*/ stream_env->pipe_extra_configs[pipe_id] - .enable_reduced_pipe = true; + .enable_reduced_pipe = true; stream_env->pipe_configs[pipe_id] - .enable_dz = false; + .enable_dz = false; if (ATOMISP_SOC_CAMERA(asd)) stream_env->pipe_configs[pipe_id].enable_dz = true; if (asd->params.video_dis_en) { stream_env->pipe_extra_configs[pipe_id] - .enable_dvs_6axis = true; + .enable_dvs_6axis = true; stream_env->pipe_configs[pipe_id] - .dvs_frame_delay = - ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; + .dvs_frame_delay = + ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; } break; case IA_CSS_PIPE_ID_PREVIEW: @@ -695,7 +697,7 @@ static void __apply_additional_pipe_config( } static bool is_pipe_valid_to_current_run_mode(struct atomisp_sub_device *asd, - enum ia_css_pipe_id pipe_id) + enum ia_css_pipe_id pipe_id) { if (!asd) return false; @@ -736,7 +738,7 @@ static bool is_pipe_valid_to_current_run_mode(struct atomisp_sub_device *asd, else return false; } - /* fall through to ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE */ + /* fall through to ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE */ case ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE: if (pipe_id == IA_CSS_PIPE_ID_CAPTURE || pipe_id == IA_CSS_PIPE_ID_PREVIEW) @@ -751,7 +753,7 @@ static bool is_pipe_valid_to_current_run_mode(struct atomisp_sub_device *asd, else return false; } - /* fall through to ATOMISP_RUN_MODE_SDV */ + /* fall through to ATOMISP_RUN_MODE_SDV */ case ATOMISP_RUN_MODE_SDV: if (pipe_id == IA_CSS_PIPE_ID_CAPTURE || pipe_id == IA_CSS_PIPE_ID_VIDEO) @@ -792,13 +794,13 @@ static int __create_pipe(struct atomisp_sub_device *asd, &stream_env->pipe_extra_configs[pipe_id], sizeof(extra_config))) ret = ia_css_pipe_create( - &stream_env->pipe_configs[pipe_id], - &stream_env->pipes[pipe_id]); + &stream_env->pipe_configs[pipe_id], + &stream_env->pipes[pipe_id]); else ret = ia_css_pipe_create_extra( - &stream_env->pipe_configs[pipe_id], - &stream_env->pipe_extra_configs[pipe_id], - &stream_env->pipes[pipe_id]); + &stream_env->pipe_configs[pipe_id], + &stream_env->pipe_extra_configs[pipe_id], + &stream_env->pipes[pipe_id]); if (ret != IA_CSS_SUCCESS) dev_err(isp->dev, "create pipe[%d] error.\n", pipe_id); return ret; @@ -898,10 +900,10 @@ static inline int __set_css_print_env(struct atomisp_device *isp, int opt) isp->css_env.isp_css_env.print_env.debug_print = NULL; else if (opt == 1) isp->css_env.isp_css_env.print_env.debug_print = - atomisp_css2_dbg_ftrace_print; + atomisp_css2_dbg_ftrace_print; else if (opt == 2) isp->css_env.isp_css_env.print_env.debug_print = - atomisp_css2_dbg_print; + atomisp_css2_dbg_print; else ret = -EINVAL; @@ -926,17 +928,17 @@ int atomisp_css_load_firmware(struct atomisp_device *isp) isp->css_env.isp_css_fw.bytes = isp->firmware->size; isp->css_env.isp_css_env.hw_access_env.store_8 = - atomisp_css2_hw_store_8; + atomisp_css2_hw_store_8; isp->css_env.isp_css_env.hw_access_env.store_16 = - atomisp_css2_hw_store_16; + atomisp_css2_hw_store_16; isp->css_env.isp_css_env.hw_access_env.store_32 = - atomisp_css2_hw_store_32; + atomisp_css2_hw_store_32; isp->css_env.isp_css_env.hw_access_env.load_8 = atomisp_css2_hw_load_8; isp->css_env.isp_css_env.hw_access_env.load_16 = - atomisp_css2_hw_load_16; + atomisp_css2_hw_load_16; isp->css_env.isp_css_env.hw_access_env.load_32 = - atomisp_css2_hw_load_32; + atomisp_css2_hw_load_32; isp->css_env.isp_css_env.hw_access_env.load = atomisp_css2_hw_load; isp->css_env.isp_css_env.hw_access_env.store = atomisp_css2_hw_store; @@ -1013,8 +1015,8 @@ int atomisp_css_irq_translate(struct atomisp_device *isp, err = ia_css_irq_translate(infos); if (err != IA_CSS_SUCCESS) { dev_warn(isp->dev, - "%s:failed to translate irq (err = %d,infos = %d)\n", - __func__, err, *infos); + "%s:failed to translate irq (err = %d,infos = %d)\n", + __func__, err, *infos); return -EINVAL; } @@ -1022,7 +1024,7 @@ int atomisp_css_irq_translate(struct atomisp_device *isp, } void atomisp_css_rx_get_irq_info(enum mipi_port_id port, - unsigned int *infos) + unsigned int *infos) { #ifndef ISP2401_NEW_INPUT_SYSTEM ia_css_isys_rx_get_irq_info(port, infos); @@ -1032,7 +1034,7 @@ void atomisp_css_rx_get_irq_info(enum mipi_port_id port, } void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, - unsigned int infos) + unsigned int infos) { #ifndef ISP2401_NEW_INPUT_SYSTEM ia_css_isys_rx_clear_irq_info(port, infos); @@ -1040,7 +1042,7 @@ void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, } int atomisp_css_irq_enable(struct atomisp_device *isp, - enum atomisp_css_irq_info info, bool enable) + enum atomisp_css_irq_info info, bool enable) { if (ia_css_irq_enable(info, enable) != IA_CSS_SUCCESS) { dev_warn(isp->dev, "%s:Invalid irq info.\n", __func__); @@ -1060,19 +1062,19 @@ void atomisp_css_init_struct(struct atomisp_sub_device *asd) asd->stream_env[i].pipes[j] = NULL; asd->stream_env[i].update_pipe[j] = false; ia_css_pipe_config_defaults( - &asd->stream_env[i].pipe_configs[j]); + &asd->stream_env[i].pipe_configs[j]); ia_css_pipe_extra_config_defaults( - &asd->stream_env[i].pipe_extra_configs[j]); + &asd->stream_env[i].pipe_extra_configs[j]); } ia_css_stream_config_defaults(&asd->stream_env[i].stream_config); } } int atomisp_q_video_buffer_to_css(struct atomisp_sub_device *asd, - struct videobuf_vmalloc_memory *vm_mem, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_buffer_type css_buf_type, - enum atomisp_css_pipe_id css_pipe_id) + struct videobuf_vmalloc_memory *vm_mem, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id) { struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; struct ia_css_buffer css_buf = {0}; @@ -1082,7 +1084,7 @@ int atomisp_q_video_buffer_to_css(struct atomisp_sub_device *asd, css_buf.data.frame = vm_mem->vaddr; err = ia_css_pipe_enqueue_buffer( - stream_env->pipes[css_pipe_id], &css_buf); + stream_env->pipes[css_pipe_id], &css_buf); if (err != IA_CSS_SUCCESS) return -EINVAL; @@ -1090,9 +1092,9 @@ int atomisp_q_video_buffer_to_css(struct atomisp_sub_device *asd, } int atomisp_q_metadata_buffer_to_css(struct atomisp_sub_device *asd, - struct atomisp_metadata_buf *metadata_buf, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id) + struct atomisp_metadata_buf *metadata_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) { struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; struct ia_css_buffer buffer = {0}; @@ -1101,7 +1103,7 @@ int atomisp_q_metadata_buffer_to_css(struct atomisp_sub_device *asd, buffer.type = IA_CSS_BUFFER_TYPE_METADATA; buffer.data.metadata = metadata_buf->metadata; if (ia_css_pipe_enqueue_buffer(stream_env->pipes[css_pipe_id], - &buffer)) { + &buffer)) { dev_err(isp->dev, "failed to q meta data buffer\n"); return -EINVAL; } @@ -1110,9 +1112,9 @@ int atomisp_q_metadata_buffer_to_css(struct atomisp_sub_device *asd, } int atomisp_q_s3a_buffer_to_css(struct atomisp_sub_device *asd, - struct atomisp_s3a_buf *s3a_buf, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id) + struct atomisp_s3a_buf *s3a_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) { struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; struct ia_css_buffer buffer = {0}; @@ -1121,8 +1123,8 @@ int atomisp_q_s3a_buffer_to_css(struct atomisp_sub_device *asd, buffer.type = IA_CSS_BUFFER_TYPE_3A_STATISTICS; buffer.data.stats_3a = s3a_buf->s3a_data; if (ia_css_pipe_enqueue_buffer( - stream_env->pipes[css_pipe_id], - &buffer)) { + stream_env->pipes[css_pipe_id], + &buffer)) { dev_dbg(isp->dev, "failed to q s3a stat buffer\n"); return -EINVAL; } @@ -1131,9 +1133,9 @@ int atomisp_q_s3a_buffer_to_css(struct atomisp_sub_device *asd, } int atomisp_q_dis_buffer_to_css(struct atomisp_sub_device *asd, - struct atomisp_dis_buf *dis_buf, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id) + struct atomisp_dis_buf *dis_buf, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) { struct atomisp_stream_env *stream_env = &asd->stream_env[stream_id]; struct ia_css_buffer buffer = {0}; @@ -1142,8 +1144,8 @@ int atomisp_q_dis_buffer_to_css(struct atomisp_sub_device *asd, buffer.type = IA_CSS_BUFFER_TYPE_DIS_STATISTICS; buffer.data.stats_dvs = dis_buf->dis_data; if (ia_css_pipe_enqueue_buffer( - stream_env->pipes[css_pipe_id], - &buffer)) { + stream_env->pipes[css_pipe_id], + &buffer)) { dev_dbg(isp->dev, "failed to q dvs stat buffer\n"); return -EINVAL; } @@ -1162,7 +1164,7 @@ void atomisp_css_mmu_invalidate_tlb(void) } int atomisp_css_start(struct atomisp_sub_device *asd, - enum atomisp_css_pipe_id pipe_id, bool in_reset) + enum atomisp_css_pipe_id pipe_id, bool in_reset) { struct atomisp_device *isp = asd->isp; bool sp_is_started = false; @@ -1277,18 +1279,18 @@ void atomisp_css_update_isp_params(struct atomisp_sub_device *asd) if (asd->copy_mode) { dev_warn(asd->isp->dev, "%s: ia_css_stream_set_isp_config() not supported in copy mode!.\n", - __func__); + __func__); return; } ia_css_stream_set_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &asd->params.config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &asd->params.config); atomisp_isp_parameters_clean_up(&asd->params.config); } void atomisp_css_update_isp_params_on_pipe(struct atomisp_sub_device *asd, - struct ia_css_pipe *pipe) + struct ia_css_pipe *pipe) { enum ia_css_err ret; @@ -1297,16 +1299,17 @@ void atomisp_css_update_isp_params_on_pipe(struct atomisp_sub_device *asd, return; } - dev_dbg(asd->isp->dev, "%s: apply parameter for ia_css_frame %p with isp_config_id %d on pipe %p.\n", + dev_dbg(asd->isp->dev, + "%s: apply parameter for ia_css_frame %p with isp_config_id %d on pipe %p.\n", __func__, asd->params.config.output_frame, asd->params.config.isp_config_id, pipe); ret = ia_css_stream_set_isp_config_on_pipe( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &asd->params.config, pipe); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &asd->params.config, pipe); if (ret != IA_CSS_SUCCESS) dev_warn(asd->isp->dev, "%s: ia_css_stream_set_isp_config_on_pipe failed %d\n", - __func__, ret); + __func__, ret); atomisp_isp_parameters_clean_up(&asd->params.config); } @@ -1318,25 +1321,25 @@ int atomisp_css_queue_buffer(struct atomisp_sub_device *asd, { if (ia_css_pipe_enqueue_buffer( asd->stream_env[stream_id].pipes[pipe_id], - &isp_css_buffer->css_buffer) - != IA_CSS_SUCCESS) + &isp_css_buffer->css_buffer) + != IA_CSS_SUCCESS) return -EINVAL; return 0; } int atomisp_css_dequeue_buffer(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id pipe_id, - enum atomisp_css_buffer_type buf_type, - struct atomisp_css_buffer *isp_css_buffer) + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id pipe_id, + enum atomisp_css_buffer_type buf_type, + struct atomisp_css_buffer *isp_css_buffer) { struct atomisp_device *isp = asd->isp; enum ia_css_err err; err = ia_css_pipe_dequeue_buffer( - asd->stream_env[stream_id].pipes[pipe_id], - &isp_css_buffer->css_buffer); + asd->stream_env[stream_id].pipes[pipe_id], + &isp_css_buffer->css_buffer); if (err != IA_CSS_SUCCESS) { dev_err(isp->dev, "ia_css_pipe_dequeue_buffer failed: 0x%x\n", err); @@ -1354,13 +1357,13 @@ int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, { struct atomisp_device *isp = asd->isp; struct atomisp_css_dvs_grid_info *dvs_grid_info = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); if (s3a_buf && asd->params.curr_grid_info.s3a_grid.enable) { void *s3a_ptr; s3a_buf->s3a_data = ia_css_isp_3a_statistics_allocate( - &asd->params.curr_grid_info.s3a_grid); + &asd->params.curr_grid_info.s3a_grid); if (!s3a_buf->s3a_data) { dev_err(isp->dev, "3a buf allocation failed.\n"); return -EINVAL; @@ -1368,7 +1371,7 @@ int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, s3a_ptr = hmm_vmap(s3a_buf->s3a_data->data_ptr, true); s3a_buf->s3a_map = ia_css_isp_3a_statistics_map_allocate( - s3a_buf->s3a_data, s3a_ptr); + s3a_buf->s3a_data, s3a_ptr); } if (dis_buf && dvs_grid_info && dvs_grid_info->enable) { @@ -1385,13 +1388,13 @@ int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd, dvs_ptr = hmm_vmap(dis_buf->dis_data->data_ptr, true); dis_buf->dvs_map = ia_css_isp_dvs_statistics_map_allocate( - dis_buf->dis_data, dvs_ptr); + dis_buf->dis_data, dvs_ptr); } if (asd->stream_env[stream_id].stream_info. - metadata_info.size && md_buf) { + metadata_info.size && md_buf) { md_buf->metadata = ia_css_metadata_allocate( - &asd->stream_env[stream_id].stream_info.metadata_info); + &asd->stream_env[stream_id].stream_info.metadata_info); if (!md_buf->metadata) { if (s3a_buf) ia_css_isp_3a_statistics_free(s3a_buf->s3a_data); @@ -1441,7 +1444,7 @@ void atomisp_css_free_stat_buffers(struct atomisp_sub_device *asd) struct atomisp_dis_buf *dis_buf, *_dis_buf; struct atomisp_metadata_buf *md_buf, *_md_buf; struct atomisp_css_dvs_grid_info *dvs_grid_info = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); unsigned int i; /* 3A statistics use vmalloc, DIS use kmalloc */ @@ -1456,13 +1459,13 @@ void atomisp_css_free_stat_buffers(struct atomisp_sub_device *asd) asd->params.dvs_ver_coef_bytes = 0; asd->params.dis_proj_data_valid = false; list_for_each_entry_safe(dis_buf, _dis_buf, - &asd->dis_stats, list) { + &asd->dis_stats, list) { atomisp_css_free_dis_buffer(dis_buf); list_del(&dis_buf->list); kfree(dis_buf); } list_for_each_entry_safe(dis_buf, _dis_buf, - &asd->dis_stats_in_css, list) { + &asd->dis_stats_in_css, list) { atomisp_css_free_dis_buffer(dis_buf); list_del(&dis_buf->list); kfree(dis_buf); @@ -1473,19 +1476,19 @@ void atomisp_css_free_stat_buffers(struct atomisp_sub_device *asd) asd->params.s3a_user_stat = NULL; asd->params.s3a_output_bytes = 0; list_for_each_entry_safe(s3a_buf, _s3a_buf, - &asd->s3a_stats, list) { + &asd->s3a_stats, list) { atomisp_css_free_3a_buffer(s3a_buf); list_del(&s3a_buf->list); kfree(s3a_buf); } list_for_each_entry_safe(s3a_buf, _s3a_buf, - &asd->s3a_stats_in_css, list) { + &asd->s3a_stats_in_css, list) { atomisp_css_free_3a_buffer(s3a_buf); list_del(&s3a_buf->list); kfree(s3a_buf); } list_for_each_entry_safe(s3a_buf, _s3a_buf, - &asd->s3a_stats_ready, list) { + &asd->s3a_stats_ready, list) { atomisp_css_free_3a_buffer(s3a_buf); list_del(&s3a_buf->list); kfree(s3a_buf); @@ -1499,19 +1502,19 @@ void atomisp_css_free_stat_buffers(struct atomisp_sub_device *asd) for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { list_for_each_entry_safe(md_buf, _md_buf, - &asd->metadata[i], list) { + &asd->metadata[i], list) { atomisp_css_free_metadata_buffer(md_buf); list_del(&md_buf->list); kfree(md_buf); } list_for_each_entry_safe(md_buf, _md_buf, - &asd->metadata_in_css[i], list) { + &asd->metadata_in_css[i], list) { atomisp_css_free_metadata_buffer(md_buf); list_del(&md_buf->list); kfree(md_buf); } list_for_each_entry_safe(md_buf, _md_buf, - &asd->metadata_ready[i], list) { + &asd->metadata_ready[i], list) { atomisp_css_free_metadata_buffer(md_buf); list_del(&md_buf->list); kfree(md_buf); @@ -1522,15 +1525,15 @@ void atomisp_css_free_stat_buffers(struct atomisp_sub_device *asd) } int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, - enum atomisp_css_pipe_id pipe_id, - int source_pad) + enum atomisp_css_pipe_id pipe_id, + int source_pad) { struct ia_css_pipe_info p_info; struct ia_css_grid_info old_info; struct atomisp_device *isp = asd->isp; int stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); int md_width = asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - stream_config.metadata_config.resolution.width; + stream_config.metadata_config.resolution.width; memset(&p_info, 0, sizeof(struct ia_css_pipe_info)); memset(&old_info, 0, sizeof(struct ia_css_grid_info)); @@ -1543,9 +1546,9 @@ int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, } memcpy(&old_info, &asd->params.curr_grid_info, - sizeof(struct ia_css_grid_info)); + sizeof(struct ia_css_grid_info)); memcpy(&asd->params.curr_grid_info, &p_info.grid_info, - sizeof(struct ia_css_grid_info)); + sizeof(struct ia_css_grid_info)); /* * Record which css pipe enables s3a_grid. * Currently would have one css pipe that need it @@ -1553,7 +1556,7 @@ int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, if (asd->params.curr_grid_info.s3a_grid.enable) { if (asd->params.s3a_enabled_pipe != CSS_PIPE_ID_NUM) dev_dbg(isp->dev, "css pipe %d enabled s3a grid replaced by: %d.\n", - asd->params.s3a_enabled_pipe, pipe_id); + asd->params.s3a_enabled_pipe, pipe_id); asd->params.s3a_enabled_pipe = pipe_id; } @@ -1561,18 +1564,18 @@ int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, * DIS statistics buffers are allocated or buffer size would be zero * then no need to do anything. */ if (((!memcmp(&old_info, &asd->params.curr_grid_info, sizeof(old_info)) - && asd->params.s3a_user_stat && asd->params.dvs_stat) - || asd->params.curr_grid_info.s3a_grid.width == 0 - || asd->params.curr_grid_info.s3a_grid.height == 0) + && asd->params.s3a_user_stat && asd->params.dvs_stat) + || asd->params.curr_grid_info.s3a_grid.width == 0 + || asd->params.curr_grid_info.s3a_grid.height == 0) && asd->params.metadata_width_size == md_width) { dev_dbg(isp->dev, "grid info change escape. memcmp=%d, s3a_user_stat=%d,dvs_stat=%d, s3a.width=%d, s3a.height=%d, metadata width =%d\n", !memcmp(&old_info, &asd->params.curr_grid_info, - sizeof(old_info)), - !!asd->params.s3a_user_stat, !!asd->params.dvs_stat, - asd->params.curr_grid_info.s3a_grid.width, - asd->params.curr_grid_info.s3a_grid.height, - asd->params.metadata_width_size); + sizeof(old_info)), + !!asd->params.s3a_user_stat, !!asd->params.dvs_stat, + asd->params.curr_grid_info.s3a_grid.width, + asd->params.curr_grid_info.s3a_grid.height, + asd->params.metadata_width_size); return -EINVAL; } asd->params.metadata_width_size = md_width; @@ -1583,11 +1586,11 @@ int atomisp_css_get_grid_info(struct atomisp_sub_device *asd, int atomisp_alloc_3a_output_buf(struct atomisp_sub_device *asd) { if (!asd->params.curr_grid_info.s3a_grid.width || - !asd->params.curr_grid_info.s3a_grid.height) + !asd->params.curr_grid_info.s3a_grid.height) return 0; asd->params.s3a_user_stat = ia_css_3a_statistics_allocate( - &asd->params.curr_grid_info.s3a_grid); + &asd->params.curr_grid_info.s3a_grid); if (!asd->params.s3a_user_stat) return -ENOMEM; /* 3A statistics. These can be big, so we use vmalloc. */ @@ -1602,7 +1605,7 @@ int atomisp_alloc_3a_output_buf(struct atomisp_sub_device *asd) int atomisp_alloc_dis_coef_buf(struct atomisp_sub_device *asd) { struct atomisp_css_dvs_grid_info *dvs_grid = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); if (!dvs_grid) return 0; @@ -1614,15 +1617,15 @@ int atomisp_alloc_dis_coef_buf(struct atomisp_sub_device *asd) /* DIS coefficients. */ asd->params.css_param.dvs2_coeff = ia_css_dvs2_coefficients_allocate( - dvs_grid); + dvs_grid); if (!asd->params.css_param.dvs2_coeff) return -ENOMEM; asd->params.dvs_hor_coef_bytes = dvs_grid->num_hor_coefs * - sizeof(*asd->params.css_param.dvs2_coeff->hor_coefs.odd_real); + sizeof(*asd->params.css_param.dvs2_coeff->hor_coefs.odd_real); asd->params.dvs_ver_coef_bytes = dvs_grid->num_ver_coefs * - sizeof(*asd->params.css_param.dvs2_coeff->ver_coefs.odd_real); + sizeof(*asd->params.css_param.dvs2_coeff->ver_coefs.odd_real); /* DIS projections. */ asd->params.dis_proj_data_valid = false; @@ -1631,12 +1634,12 @@ int atomisp_alloc_dis_coef_buf(struct atomisp_sub_device *asd) return -ENOMEM; asd->params.dvs_hor_proj_bytes = - dvs_grid->aligned_height * dvs_grid->aligned_width * - sizeof(*asd->params.dvs_stat->hor_prod.odd_real); + dvs_grid->aligned_height * dvs_grid->aligned_width * + sizeof(*asd->params.dvs_stat->hor_prod.odd_real); asd->params.dvs_ver_proj_bytes = - dvs_grid->aligned_height * dvs_grid->aligned_width * - sizeof(*asd->params.dvs_stat->ver_prod.odd_real); + dvs_grid->aligned_height * dvs_grid->aligned_width * + sizeof(*asd->params.dvs_stat->ver_prod.odd_real); return 0; } @@ -1649,8 +1652,8 @@ int atomisp_alloc_metadata_output_buf(struct atomisp_sub_device *asd) * space */ for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { asd->params.metadata_user[i] = kvmalloc( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. - stream_info.metadata_info.size, GFP_KERNEL); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]. + stream_info.metadata_info.size, GFP_KERNEL); if (!asd->params.metadata_user[i]) { while (--i >= 0) { kvfree(asd->params.metadata_user[i]); @@ -1682,10 +1685,10 @@ void atomisp_css_get_dis_statistics(struct atomisp_sub_device *asd, if (asd->params.dvs_stat) { if (dvs_map) ia_css_translate_dvs2_statistics( - asd->params.dvs_stat, dvs_map); + asd->params.dvs_stat, dvs_map); else ia_css_get_dvs2_statistics(asd->params.dvs_stat, - isp_css_buffer->css_buffer.data.stats_dvs); + isp_css_buffer->css_buffer.data.stats_dvs); } } @@ -1698,7 +1701,7 @@ int atomisp_css_dequeue_event(struct atomisp_css_event *current_event) } void atomisp_css_temp_pipe_to_pipe_id(struct atomisp_sub_device *asd, - struct atomisp_css_event *current_event) + struct atomisp_css_event *current_event) { /* * FIXME! @@ -1719,7 +1722,7 @@ int atomisp_css_isys_set_resolution(struct atomisp_sub_device *asd, int isys_stream) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; if (isys_stream >= IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH) return -EINVAL; @@ -1730,11 +1733,11 @@ int atomisp_css_isys_set_resolution(struct atomisp_sub_device *asd, } int atomisp_css_input_set_resolution(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - struct v4l2_mbus_framefmt *ffmt) + enum atomisp_input_stream_id stream_id, + struct v4l2_mbus_framefmt *ffmt) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->input_config.input_res.width = ffmt->width; s_config->input_config.input_res.height = ffmt->height; @@ -1742,19 +1745,19 @@ int atomisp_css_input_set_resolution(struct atomisp_sub_device *asd, } void atomisp_css_input_set_binning_factor(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - unsigned int bin_factor) + enum atomisp_input_stream_id stream_id, + unsigned int bin_factor) { asd->stream_env[stream_id] - .stream_config.sensor_binning_factor = bin_factor; + .stream_config.sensor_binning_factor = bin_factor; } void atomisp_css_input_set_bayer_order(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_bayer_order bayer_order) + enum atomisp_input_stream_id stream_id, + enum atomisp_css_bayer_order bayer_order) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->input_config.bayer_order = bayer_order; } @@ -1764,7 +1767,7 @@ void atomisp_css_isys_set_link(struct atomisp_sub_device *asd, int isys_stream) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->isys_config[isys_stream].linked_isys_stream_id = link; } @@ -1775,7 +1778,7 @@ void atomisp_css_isys_set_valid(struct atomisp_sub_device *asd, int isys_stream) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->isys_config[isys_stream].valid = valid; } @@ -1786,17 +1789,17 @@ void atomisp_css_isys_set_format(struct atomisp_sub_device *asd, int isys_stream) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->isys_config[isys_stream].format = format; } void atomisp_css_input_set_format(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_input_format format) + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format format) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->input_config.format = format; } @@ -1807,7 +1810,7 @@ int atomisp_css_set_default_isys_config(struct atomisp_sub_device *asd, { int i; struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; /* * Set all isys configs to not valid. * Currently we support only one stream per channel @@ -1834,69 +1837,69 @@ int atomisp_css_isys_two_stream_cfg(struct atomisp_sub_device *asd, enum atomisp_input_format input_format) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.width = - s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.width; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.width; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.height = - s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.height / 2; + s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.height / 2; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].linked_isys_stream_id - = IA_CSS_STREAM_ISYS_STREAM_0; + = IA_CSS_STREAM_ISYS_STREAM_0; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].format = - ATOMISP_INPUT_FORMAT_USER_DEF1; + ATOMISP_INPUT_FORMAT_USER_DEF1; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].format = - ATOMISP_INPUT_FORMAT_USER_DEF2; + ATOMISP_INPUT_FORMAT_USER_DEF2; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].valid = true; return 0; } void atomisp_css_isys_two_stream_cfg_update_stream1( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_input_format input_format, - unsigned int width, unsigned int height) + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.width = - width; + width; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].input_res.height = - height; + height; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].format = - input_format; + input_format; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_0].valid = true; } void atomisp_css_isys_two_stream_cfg_update_stream2( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_input_format input_format, - unsigned int width, unsigned int height) + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + enum atomisp_input_format input_format, + unsigned int width, unsigned int height) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.width = - width; + width; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].input_res.height = - height; + height; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].linked_isys_stream_id - = IA_CSS_STREAM_ISYS_STREAM_0; + = IA_CSS_STREAM_ISYS_STREAM_0; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].format = - input_format; + input_format; s_config->isys_config[IA_CSS_STREAM_ISYS_STREAM_1].valid = true; } int atomisp_css_input_set_effective_resolution( - struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - unsigned int width, unsigned int height) + struct atomisp_sub_device *asd, + enum atomisp_input_stream_id stream_id, + unsigned int width, unsigned int height) { struct ia_css_stream_config *s_config = - &asd->stream_env[stream_id].stream_config; + &asd->stream_env[stream_id].stream_config; s_config->input_config.effective_res.width = width; s_config->input_config.effective_res.height = height; return 0; @@ -1906,33 +1909,33 @@ void atomisp_css_video_set_dis_envelope(struct atomisp_sub_device *asd, unsigned int dvs_w, unsigned int dvs_h) { asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[IA_CSS_PIPE_ID_VIDEO].dvs_envelope.width = dvs_w; + .pipe_configs[IA_CSS_PIPE_ID_VIDEO].dvs_envelope.width = dvs_w; asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[IA_CSS_PIPE_ID_VIDEO].dvs_envelope.height = dvs_h; + .pipe_configs[IA_CSS_PIPE_ID_VIDEO].dvs_envelope.height = dvs_h; } void atomisp_css_input_set_two_pixels_per_clock( - struct atomisp_sub_device *asd, - bool two_ppc) + struct atomisp_sub_device *asd, + bool two_ppc) { int i; if (asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .stream_config.pixels_per_clock == (two_ppc ? 2 : 1)) + .stream_config.pixels_per_clock == (two_ppc ? 2 : 1)) return; asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .stream_config.pixels_per_clock = (two_ppc ? 2 : 1); + .stream_config.pixels_per_clock = (two_ppc ? 2 : 1); for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] .update_pipe[i] = true; } void atomisp_css_enable_raw_binning(struct atomisp_sub_device *asd, - bool enable) + bool enable) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; unsigned int pipe; if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) @@ -1944,7 +1947,7 @@ void atomisp_css_enable_raw_binning(struct atomisp_sub_device *asd, stream_env->update_pipe[pipe] = true; if (enable) stream_env->pipe_configs[pipe].output_info[0].padded_width = - stream_env->stream_config.input_config.effective_res.width; + stream_env->stream_config.input_config.effective_res.width; } void atomisp_css_enable_dz(struct atomisp_sub_device *asd, bool enable) @@ -1953,21 +1956,21 @@ void atomisp_css_enable_dz(struct atomisp_sub_device *asd, bool enable) for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[i].enable_dz = enable; + .pipe_configs[i].enable_dz = enable; } void atomisp_css_capture_set_mode(struct atomisp_sub_device *asd, - enum atomisp_css_capture_mode mode) + enum atomisp_css_capture_mode mode) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; if (stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE] - .default_capture_config.mode == mode) + .default_capture_config.mode == mode) return; stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE]. - default_capture_config.mode = mode; + default_capture_config.mode = mode; stream_env->update_pipe[IA_CSS_PIPE_ID_CAPTURE] = true; } @@ -1983,7 +1986,7 @@ void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, if (isp->inputs[asd->input_curr].type == TEST_PATTERN) { struct ia_css_stream_config *s_config = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_config; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_config; s_config->mode = IA_CSS_INPUT_MODE_TPG; s_config->source.tpg.mode = IA_CSS_TPG_MODE_CHECKERBOARD; s_config->source.tpg.x_mask = (1 << 4) - 1; @@ -2004,26 +2007,26 @@ void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, * Here using a large safe value. */ struct ia_css_stream_config *s_config = - &asd->stream_env[i].stream_config; + &asd->stream_env[i].stream_config; if (s_config->input_config.input_res.width == 0) continue; if (ia_css_mipi_frame_calculate_size( - s_config->input_config.input_res.width, - s_config->input_config.input_res.height, - s_config->input_config.format, - true, - 0x13000, - &size_mem_words) != IA_CSS_SUCCESS) { + s_config->input_config.input_res.width, + s_config->input_config.input_res.height, + s_config->input_config.format, + true, + 0x13000, + &size_mem_words) != IA_CSS_SUCCESS) { if (intel_mid_identify_cpu() == - INTEL_MID_CPU_CHIP_TANGIER) + INTEL_MID_CPU_CHIP_TANGIER) size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_2; else size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_1; dev_warn(asd->isp->dev, - "ia_css_mipi_frame_calculate_size failed,applying pre-defined MIPI buffer size %u.\n", - size_mem_words); + "ia_css_mipi_frame_calculate_size failed,applying pre-defined MIPI buffer size %u.\n", + size_mem_words); } s_config->mipi_buffer_config.size_mem_words = size_mem_words; s_config->mipi_buffer_config.nof_mipi_buffers = 2; @@ -2031,10 +2034,10 @@ void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, } void atomisp_css_capture_enable_online(struct atomisp_sub_device *asd, - unsigned short stream_index, bool enable) + unsigned short stream_index, bool enable) { struct atomisp_stream_env *stream_env = - &asd->stream_env[stream_index]; + &asd->stream_env[stream_index]; if (stream_env->stream_config.online == !!enable) return; @@ -2044,10 +2047,10 @@ void atomisp_css_capture_enable_online(struct atomisp_sub_device *asd, } void atomisp_css_preview_enable_online(struct atomisp_sub_device *asd, - unsigned short stream_index, bool enable) + unsigned short stream_index, bool enable) { struct atomisp_stream_env *stream_env = - &asd->stream_env[stream_index]; + &asd->stream_env[stream_index]; int i; if (stream_env->stream_config.online != !!enable) { @@ -2058,10 +2061,10 @@ void atomisp_css_preview_enable_online(struct atomisp_sub_device *asd, } void atomisp_css_video_enable_online(struct atomisp_sub_device *asd, - bool enable) + bool enable) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_VIDEO]; + &asd->stream_env[ATOMISP_INPUT_STREAM_VIDEO]; int i; if (stream_env->stream_config.online != enable) { @@ -2072,10 +2075,10 @@ void atomisp_css_video_enable_online(struct atomisp_sub_device *asd, } void atomisp_css_enable_continuous(struct atomisp_sub_device *asd, - bool enable) + bool enable) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; int i; /* @@ -2098,10 +2101,10 @@ void atomisp_css_enable_continuous(struct atomisp_sub_device *asd, } void atomisp_css_enable_cvf(struct atomisp_sub_device *asd, - bool enable) + bool enable) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; int i; if (stream_env->stream_config.disable_cont_viewfinder != !enable) { @@ -2112,14 +2115,14 @@ void atomisp_css_enable_cvf(struct atomisp_sub_device *asd, } int atomisp_css_input_configure_port( - struct atomisp_sub_device *asd, - enum mipi_port_id port, - unsigned int num_lanes, - unsigned int timeout, - unsigned int mipi_freq, - enum atomisp_input_format metadata_format, - unsigned int metadata_width, - unsigned int metadata_height) + struct atomisp_sub_device *asd, + enum mipi_port_id port, + unsigned int num_lanes, + unsigned int timeout, + unsigned int mipi_freq, + enum atomisp_input_format metadata_format, + unsigned int metadata_width, + unsigned int metadata_height) { int i; struct atomisp_stream_env *stream_env; @@ -2135,7 +2138,7 @@ int atomisp_css_input_configure_port( * 10-bit fixed points for improved accuracy. */ const unsigned int rxcount = - min(((mipi_freq / 46000) - 1280) >> 10, 0xffU) * 0x01010101U; + min(((mipi_freq / 46000) - 1280) >> 10, 0xffU) * 0x01010101U; for (i = 0; i < ATOMISP_INPUT_STREAM_NUM; i++) { stream_env = &asd->stream_env[i]; @@ -2145,31 +2148,31 @@ int atomisp_css_input_configure_port( if (mipi_freq) stream_env->stream_config.source.port.rxcount = rxcount; stream_env->stream_config. - metadata_config.data_type = metadata_format; + metadata_config.data_type = metadata_format; stream_env->stream_config. - metadata_config.resolution.width = metadata_width; + metadata_config.resolution.width = metadata_width; stream_env->stream_config. - metadata_config.resolution.height = metadata_height; + metadata_config.resolution.height = metadata_height; } return 0; } int atomisp_css_frame_allocate(struct atomisp_css_frame **frame, - unsigned int width, unsigned int height, - enum atomisp_css_frame_format format, - unsigned int padded_width, - unsigned int raw_bit_depth) + unsigned int width, unsigned int height, + enum atomisp_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth) { if (ia_css_frame_allocate(frame, width, height, format, - padded_width, raw_bit_depth) != IA_CSS_SUCCESS) + padded_width, raw_bit_depth) != IA_CSS_SUCCESS) return -ENOMEM; return 0; } int atomisp_css_frame_allocate_from_info(struct atomisp_css_frame **frame, - const struct atomisp_css_frame_info *info) + const struct atomisp_css_frame_info *info) { if (ia_css_frame_allocate_from_info(frame, info) != IA_CSS_SUCCESS) return -ENOMEM; @@ -2183,9 +2186,9 @@ void atomisp_css_frame_free(struct atomisp_css_frame *frame) } int atomisp_css_frame_map(struct atomisp_css_frame **frame, - const struct atomisp_css_frame_info *info, - const void __user *data, uint16_t attribute, - void *context) + const struct atomisp_css_frame_info *info, + const void __user *data, uint16_t attribute, + void *context) { if (ia_css_frame_map(frame, info, data, attribute, context) != IA_CSS_SUCCESS) @@ -2206,11 +2209,11 @@ int atomisp_css_set_black_frame(struct atomisp_sub_device *asd, } int atomisp_css_allocate_continuous_frames(bool init_time, - struct atomisp_sub_device *asd) + struct atomisp_sub_device *asd) { if (ia_css_alloc_continuous_frame_remain( asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) - != IA_CSS_SUCCESS) + != IA_CSS_SUCCESS) return -EINVAL; return 0; } @@ -2218,11 +2221,11 @@ int atomisp_css_allocate_continuous_frames(bool init_time, void atomisp_css_update_continuous_frames(struct atomisp_sub_device *asd) { ia_css_update_continuous_frames( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream); } int atomisp_css_stop(struct atomisp_sub_device *asd, - enum atomisp_css_pipe_id pipe_id, bool in_reset) + enum atomisp_css_pipe_id pipe_id, bool in_reset) { struct atomisp_device *isp = asd->isp; struct atomisp_s3a_buf *s3a_buf; @@ -2255,12 +2258,12 @@ int atomisp_css_stop(struct atomisp_sub_device *asd, stream_env = &asd->stream_env[i]; for (j = 0; j < IA_CSS_PIPE_ID_NUM; j++) { ia_css_pipe_config_defaults( - &stream_env->pipe_configs[j]); + &stream_env->pipe_configs[j]); ia_css_pipe_extra_config_defaults( - &stream_env->pipe_extra_configs[j]); + &stream_env->pipe_extra_configs[j]); } ia_css_stream_config_defaults( - &stream_env->stream_config); + &stream_env->stream_config); } atomisp_isp_parameters_clean_up(&asd->params.config); asd->params.css_update_params_needed = false; @@ -2269,13 +2272,13 @@ int atomisp_css_stop(struct atomisp_sub_device *asd, /* move stats buffers to free queue list */ while (!list_empty(&asd->s3a_stats_in_css)) { s3a_buf = list_entry(asd->s3a_stats_in_css.next, - struct atomisp_s3a_buf, list); + struct atomisp_s3a_buf, list); list_del(&s3a_buf->list); list_add_tail(&s3a_buf->list, &asd->s3a_stats); } while (!list_empty(&asd->s3a_stats_ready)) { s3a_buf = list_entry(asd->s3a_stats_ready.next, - struct atomisp_s3a_buf, list); + struct atomisp_s3a_buf, list); list_del(&s3a_buf->list); list_add_tail(&s3a_buf->list, &asd->s3a_stats); } @@ -2283,7 +2286,7 @@ int atomisp_css_stop(struct atomisp_sub_device *asd, spin_lock_irqsave(&asd->dis_stats_lock, irqflags); while (!list_empty(&asd->dis_stats_in_css)) { dis_buf = list_entry(asd->dis_stats_in_css.next, - struct atomisp_dis_buf, list); + struct atomisp_dis_buf, list); list_del(&dis_buf->list); list_add_tail(&dis_buf->list, &asd->dis_stats); } @@ -2293,13 +2296,13 @@ int atomisp_css_stop(struct atomisp_sub_device *asd, for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { while (!list_empty(&asd->metadata_in_css[i])) { md_buf = list_entry(asd->metadata_in_css[i].next, - struct atomisp_metadata_buf, list); + struct atomisp_metadata_buf, list); list_del(&md_buf->list); list_add_tail(&md_buf->list, &asd->metadata[i]); } while (!list_empty(&asd->metadata_ready[i])) { md_buf = list_entry(asd->metadata_ready[i].next, - struct atomisp_metadata_buf, list); + struct atomisp_metadata_buf, list); list_del(&md_buf->list); list_add_tail(&md_buf->list, &asd->metadata[i]); } @@ -2315,31 +2318,31 @@ int atomisp_css_stop(struct atomisp_sub_device *asd, } int atomisp_css_continuous_set_num_raw_frames( - struct atomisp_sub_device *asd, - int num_frames) + struct atomisp_sub_device *asd, + int num_frames) { if (asd->enable_raw_buffer_lock->val) { asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] .stream_config.init_num_cont_raw_buf = - ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES_LOCK_EN; + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES_LOCK_EN; if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO && asd->params.video_dis_en) asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] .stream_config.init_num_cont_raw_buf += - ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; + ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; } else { asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] .stream_config.init_num_cont_raw_buf = - ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES; + ATOMISP_CSS2_NUM_OFFLINE_INIT_CONTINUOUS_FRAMES; } if (asd->params.video_dis_en) asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .stream_config.init_num_cont_raw_buf += - ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; + .stream_config.init_num_cont_raw_buf += + ATOMISP_CSS2_NUM_DVS_FRAME_DELAY; asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .stream_config.target_num_cont_raw_buf = num_frames; + .stream_config.target_num_cont_raw_buf = num_frames; return 0; } @@ -2354,12 +2357,12 @@ void atomisp_css_disable_vf_pp(struct atomisp_sub_device *asd, } static enum ia_css_pipe_mode __pipe_id_to_pipe_mode( - struct atomisp_sub_device *asd, - enum ia_css_pipe_id pipe_id) + struct atomisp_sub_device *asd, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; struct camera_mipi_info *mipi_info = atomisp_to_sensor_mipi_info( - isp->inputs[asd->input_curr].camera); + isp->inputs[asd->input_curr].camera); switch (pipe_id) { case IA_CSS_PIPE_ID_COPY: @@ -2368,7 +2371,7 @@ static enum ia_css_pipe_mode __pipe_id_to_pipe_mode( * YUV420_Legacy format. */ if (mipi_info && mipi_info->input_format == - ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) + ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) return IA_CSS_PIPE_MODE_YUVPP; return IA_CSS_PIPE_MODE_COPY; case IA_CSS_PIPE_ID_PREVIEW: @@ -2396,11 +2399,11 @@ static void __configure_output(struct atomisp_sub_device *asd, { struct atomisp_device *isp = asd->isp; struct atomisp_stream_env *stream_env = - &asd->stream_env[stream_index]; + &asd->stream_env[stream_index]; struct ia_css_stream_config *s_config = &stream_env->stream_config; stream_env->pipe_configs[pipe_id].mode = - __pipe_id_to_pipe_mode(asd, pipe_id); + __pipe_id_to_pipe_mode(asd, pipe_id); stream_env->update_pipe[pipe_id] = true; stream_env->pipe_configs[pipe_id].output_info[0].res.width = width; @@ -2420,20 +2423,20 @@ static void __configure_output(struct atomisp_sub_device *asd, } static void __configure_video_preview_output(struct atomisp_sub_device *asd, - unsigned int stream_index, - unsigned int width, unsigned int height, - unsigned int min_width, - enum ia_css_frame_format format, - enum ia_css_pipe_id pipe_id) + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int min_width, + enum ia_css_frame_format format, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; struct atomisp_stream_env *stream_env = - &asd->stream_env[stream_index]; + &asd->stream_env[stream_index]; struct ia_css_frame_info *css_output_info; struct ia_css_stream_config *stream_config = &stream_env->stream_config; stream_env->pipe_configs[pipe_id].mode = - __pipe_id_to_pipe_mode(asd, pipe_id); + __pipe_id_to_pipe_mode(asd, pipe_id); stream_env->update_pipe[pipe_id] = true; /* @@ -2443,10 +2446,10 @@ static void __configure_video_preview_output(struct atomisp_sub_device *asd, */ if (asd->continuous_mode->val) css_output_info = &stream_env->pipe_configs[pipe_id]. - output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; else css_output_info = &stream_env->pipe_configs[pipe_id]. - output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; css_output_info->res.width = width; css_output_info->res.height = height; @@ -2469,17 +2472,17 @@ static void __configure_video_preview_output(struct atomisp_sub_device *asd, * downscaling input resolution. */ static void __configure_capture_pp_input(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - enum ia_css_pipe_id pipe_id) + unsigned int width, unsigned int height, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; struct ia_css_stream_config *stream_config = &stream_env->stream_config; struct ia_css_pipe_config *pipe_configs = - &stream_env->pipe_configs[pipe_id]; + &stream_env->pipe_configs[pipe_id]; struct ia_css_pipe_extra_config *pipe_extra_configs = - &stream_env->pipe_extra_configs[pipe_id]; + &stream_env->pipe_extra_configs[pipe_id]; unsigned int hor_ds_factor = 0, ver_ds_factor = 0; if (width == 0 && height == 0) @@ -2490,15 +2493,15 @@ static void __configure_capture_pp_input(struct atomisp_sub_device *asd, return; /* here just copy the calculation in css */ hor_ds_factor = CEIL_DIV(width >> 1, - pipe_configs->output_info[0].res.width); + pipe_configs->output_info[0].res.width); ver_ds_factor = CEIL_DIV(height >> 1, - pipe_configs->output_info[0].res.height); + pipe_configs->output_info[0].res.height); if ((asd->isp->media_dev.hw_revision < - (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) || - IS_CHT) && hor_ds_factor != ver_ds_factor) { + (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) || + IS_CHT) && hor_ds_factor != ver_ds_factor) { dev_warn(asd->isp->dev, - "Cropping for capture due to FW limitation"); + "Cropping for capture due to FW limitation"); return; } @@ -2508,9 +2511,9 @@ static void __configure_capture_pp_input(struct atomisp_sub_device *asd, pipe_extra_configs->enable_yuv_ds = true; pipe_configs->capt_pp_in_res.width = - stream_config->input_config.effective_res.width; + stream_config->input_config.effective_res.width; pipe_configs->capt_pp_in_res.height = - stream_config->input_config.effective_res.height; + stream_config->input_config.effective_res.height; dev_dbg(isp->dev, "configuring pipe[%d]capture pp input w=%d.h=%d.\n", pipe_id, width, height); @@ -2521,24 +2524,24 @@ static void __configure_capture_pp_input(struct atomisp_sub_device *asd, * yuv downscaling, which needs addtional configurations. */ static void __configure_preview_pp_input(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - enum ia_css_pipe_id pipe_id) + unsigned int width, unsigned int height, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; int out_width, out_height, yuv_ds_in_width, yuv_ds_in_height; struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; struct ia_css_stream_config *stream_config = &stream_env->stream_config; struct ia_css_pipe_config *pipe_configs = - &stream_env->pipe_configs[pipe_id]; + &stream_env->pipe_configs[pipe_id]; struct ia_css_pipe_extra_config *pipe_extra_configs = - &stream_env->pipe_extra_configs[pipe_id]; + &stream_env->pipe_extra_configs[pipe_id]; struct ia_css_resolution *bayer_ds_out_res = - &pipe_configs->bayer_ds_out_res; + &pipe_configs->bayer_ds_out_res; struct ia_css_resolution *vf_pp_in_res = - &pipe_configs->vf_pp_in_res; + &pipe_configs->vf_pp_in_res; struct ia_css_resolution *effective_res = - &stream_config->input_config.effective_res; + &stream_config->input_config.effective_res; const struct bayer_ds_factor bds_fct[] = {{2, 1}, {3, 2}, {5, 4} }; /* @@ -2580,7 +2583,7 @@ static void __configure_preview_pp_input(struct atomisp_sub_device *asd, * online == 1 or continuous == 0 or raw_binning = 0 */ if (stream_config->online || !stream_config->continuous || - !pipe_extra_configs->enable_raw_binning) { + !pipe_extra_configs->enable_raw_binning) { bayer_ds_out_res->width = 0; bayer_ds_out_res->height = 0; } else { @@ -2632,7 +2635,7 @@ static void __configure_preview_pp_input(struct atomisp_sub_device *asd, } if (vf_pp_in_res->width == out_width && - vf_pp_in_res->height == out_height) { + vf_pp_in_res->height == out_height) { pipe_extra_configs->enable_yuv_ds = false; vf_pp_in_res->width = 0; vf_pp_in_res->height = 0; @@ -2649,25 +2652,26 @@ static void __configure_preview_pp_input(struct atomisp_sub_device *asd, * yuv downscaling, which needs addtional configurations. */ static void __configure_video_pp_input(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - enum ia_css_pipe_id pipe_id) + unsigned int width, unsigned int height, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; int out_width, out_height; struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; struct ia_css_stream_config *stream_config = &stream_env->stream_config; struct ia_css_pipe_config *pipe_configs = - &stream_env->pipe_configs[pipe_id]; + &stream_env->pipe_configs[pipe_id]; struct ia_css_pipe_extra_config *pipe_extra_configs = - &stream_env->pipe_extra_configs[pipe_id]; + &stream_env->pipe_extra_configs[pipe_id]; struct ia_css_resolution *bayer_ds_out_res = - &pipe_configs->bayer_ds_out_res; + &pipe_configs->bayer_ds_out_res; struct ia_css_resolution *effective_res = - &stream_config->input_config.effective_res; + &stream_config->input_config.effective_res; const struct bayer_ds_factor bds_factors[] = { - {8, 1}, {6, 1}, {4, 1}, {3, 1}, {2, 1}, {3, 2} }; + {8, 1}, {6, 1}, {4, 1}, {3, 1}, {2, 1}, {3, 2} + }; unsigned int i; if (width == 0 && height == 0) @@ -2717,11 +2721,11 @@ static void __configure_video_pp_input(struct atomisp_sub_device *asd, effective_res->height >= out_height * bds_factors[i].numerator / bds_factors[i].denominator) { bayer_ds_out_res->width = effective_res->width * - bds_factors[i].denominator / - bds_factors[i].numerator; + bds_factors[i].denominator / + bds_factors[i].numerator; bayer_ds_out_res->height = effective_res->height * - bds_factors[i].denominator / - bds_factors[i].numerator; + bds_factors[i].denominator / + bds_factors[i].numerator; break; } } @@ -2751,34 +2755,34 @@ static void __configure_vf_output(struct atomisp_sub_device *asd, { struct atomisp_device *isp = asd->isp; struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; stream_env->pipe_configs[pipe_id].mode = - __pipe_id_to_pipe_mode(asd, pipe_id); + __pipe_id_to_pipe_mode(asd, pipe_id); stream_env->update_pipe[pipe_id] = true; stream_env->pipe_configs[pipe_id].vf_output_info[0].res.width = width; stream_env->pipe_configs[pipe_id].vf_output_info[0].res.height = height; stream_env->pipe_configs[pipe_id].vf_output_info[0].format = format; stream_env->pipe_configs[pipe_id].vf_output_info[0].padded_width = - min_width; + min_width; dev_dbg(isp->dev, "configuring pipe[%d] vf output info w=%d.h=%d.f=%d.\n", - pipe_id, width, height, format); + pipe_id, width, height, format); } static void __configure_video_vf_output(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format, - enum ia_css_pipe_id pipe_id) + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; struct ia_css_frame_info *css_output_info; stream_env->pipe_configs[pipe_id].mode = - __pipe_id_to_pipe_mode(asd, pipe_id); + __pipe_id_to_pipe_mode(asd, pipe_id); stream_env->update_pipe[pipe_id] = true; /* @@ -2788,10 +2792,10 @@ static void __configure_video_vf_output(struct atomisp_sub_device *asd, */ if (asd->continuous_mode->val) css_output_info = &stream_env->pipe_configs[pipe_id]. - vf_output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + vf_output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; else css_output_info = &stream_env->pipe_configs[pipe_id]. - vf_output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + vf_output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; css_output_info->res.width = width; css_output_info->res.height = height; @@ -2799,14 +2803,14 @@ static void __configure_video_vf_output(struct atomisp_sub_device *asd, css_output_info->padded_width = min_width; dev_dbg(isp->dev, "configuring pipe[%d] vf output info w=%d.h=%d.f=%d.\n", - pipe_id, width, height, format); + pipe_id, width, height, format); } static int __get_frame_info(struct atomisp_sub_device *asd, - unsigned int stream_index, - struct atomisp_css_frame_info *info, - enum frame_info_type type, - enum ia_css_pipe_id pipe_id) + unsigned int stream_index, + struct atomisp_css_frame_info *info, + enum frame_info_type type, + enum ia_css_pipe_id pipe_id) { struct atomisp_device *isp = asd->isp; enum ia_css_err ret; @@ -2826,8 +2830,8 @@ static int __get_frame_info(struct atomisp_sub_device *asd, goto stream_err; ret = ia_css_pipe_get_info( - asd->stream_env[stream_index] - .pipes[pipe_id], &p_info); + asd->stream_env[stream_index] + .pipes[pipe_id], &p_info); if (ret == IA_CSS_SUCCESS) { switch (type) { case ATOMISP_CSS_VF_FRAME: @@ -2861,7 +2865,7 @@ static int __get_frame_info(struct atomisp_sub_device *asd, } static unsigned int atomisp_get_pipe_index(struct atomisp_sub_device *asd, - uint16_t source_pad) + uint16_t source_pad) { struct atomisp_device *isp = asd->isp; /* @@ -2887,7 +2891,7 @@ static unsigned int atomisp_get_pipe_index(struct atomisp_sub_device *asd, return IA_CSS_PIPE_ID_CAPTURE; case ATOMISP_SUBDEV_PAD_SOURCE_VF: if (!atomisp_is_mbuscode_raw( - asd->fmt[asd->capture_pad].fmt.code)) + asd->fmt[asd->capture_pad].fmt.code)) return IA_CSS_PIPE_ID_CAPTURE; case ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW: if (asd->yuvpp_mode) @@ -2906,8 +2910,8 @@ static unsigned int atomisp_get_pipe_index(struct atomisp_sub_device *asd, } int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, - u16 source_pad, - struct atomisp_css_frame_info *frame_info) + u16 source_pad, + struct atomisp_css_frame_info *frame_info) { struct ia_css_pipe_info info; int pipe_index = atomisp_get_pipe_index(asd, source_pad); @@ -2918,12 +2922,12 @@ int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, stream_index = atomisp_source_pad_to_stream_id(asd, source_pad); else { stream_index = (pipe_index == IA_CSS_PIPE_ID_YUVPP) ? - ATOMISP_INPUT_STREAM_VIDEO : - atomisp_source_pad_to_stream_id(asd, source_pad); + ATOMISP_INPUT_STREAM_VIDEO : + atomisp_source_pad_to_stream_id(asd, source_pad); } if (IA_CSS_SUCCESS != ia_css_pipe_get_info(asd->stream_env[stream_index] - .pipes[pipe_index], &info)) { + .pipes[pipe_index], &info)) { dev_err(isp->dev, "ia_css_pipe_get_info FAILED"); return -EINVAL; } @@ -2935,10 +2939,10 @@ int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, case ATOMISP_SUBDEV_PAD_SOURCE_VIDEO: if (ATOMISP_USE_YUVPP(asd) && asd->continuous_mode->val) *frame_info = info. - output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; else *frame_info = info. - output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; break; case ATOMISP_SUBDEV_PAD_SOURCE_VF: if (stream_index == ATOMISP_INPUT_STREAM_POSTVIEW) @@ -2952,16 +2956,16 @@ int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, pipe_index == IA_CSS_PIPE_ID_YUVPP)) if (ATOMISP_USE_YUVPP(asd) && asd->continuous_mode->val) *frame_info = info. - vf_output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + vf_output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; else *frame_info = info. - vf_output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + vf_output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; else if (ATOMISP_USE_YUVPP(asd) && asd->continuous_mode->val) *frame_info = - info.output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; + info.output_info[ATOMISP_CSS_OUTPUT_SECOND_INDEX]; else *frame_info = - info.output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; + info.output_info[ATOMISP_CSS_OUTPUT_DEFAULT_INDEX]; break; default: @@ -2972,14 +2976,14 @@ int atomisp_get_css_frame_info(struct atomisp_sub_device *asd, } int atomisp_css_copy_configure_output(struct atomisp_sub_device *asd, - unsigned int stream_index, - unsigned int width, unsigned int height, - unsigned int padded_width, - enum atomisp_css_frame_format format) + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format) { asd->stream_env[stream_index].pipe_configs[IA_CSS_PIPE_ID_COPY]. - default_capture_config.mode = - CSS_CAPTURE_MODE_RAW; + default_capture_config.mode = + CSS_CAPTURE_MODE_RAW; __configure_output(asd, stream_index, width, height, padded_width, format, IA_CSS_PIPE_ID_COPY); @@ -2987,14 +2991,14 @@ int atomisp_css_copy_configure_output(struct atomisp_sub_device *asd, } int atomisp_css_yuvpp_configure_output(struct atomisp_sub_device *asd, - unsigned int stream_index, - unsigned int width, unsigned int height, - unsigned int padded_width, - enum atomisp_css_frame_format format) + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int padded_width, + enum atomisp_css_frame_format format) { asd->stream_env[stream_index].pipe_configs[IA_CSS_PIPE_ID_YUVPP]. - default_capture_config.mode = - CSS_CAPTURE_MODE_RAW; + default_capture_config.mode = + CSS_CAPTURE_MODE_RAW; __configure_output(asd, stream_index, width, height, padded_width, format, IA_CSS_PIPE_ID_YUVPP); @@ -3002,67 +3006,68 @@ int atomisp_css_yuvpp_configure_output(struct atomisp_sub_device *asd, } int atomisp_css_yuvpp_configure_viewfinder( - struct atomisp_sub_device *asd, - unsigned int stream_index, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format) + struct atomisp_sub_device *asd, + unsigned int stream_index, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) { struct atomisp_stream_env *stream_env = - &asd->stream_env[stream_index]; + &asd->stream_env[stream_index]; enum ia_css_pipe_id pipe_id = IA_CSS_PIPE_ID_YUVPP; stream_env->pipe_configs[pipe_id].mode = - __pipe_id_to_pipe_mode(asd, pipe_id); + __pipe_id_to_pipe_mode(asd, pipe_id); stream_env->update_pipe[pipe_id] = true; stream_env->pipe_configs[pipe_id].vf_output_info[0].res.width = width; stream_env->pipe_configs[pipe_id].vf_output_info[0].res.height = height; stream_env->pipe_configs[pipe_id].vf_output_info[0].format = format; stream_env->pipe_configs[pipe_id].vf_output_info[0].padded_width = - min_width; + min_width; return 0; } int atomisp_css_yuvpp_get_output_frame_info( - struct atomisp_sub_device *asd, - unsigned int stream_index, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info) { return __get_frame_info(asd, stream_index, info, - ATOMISP_CSS_OUTPUT_FRAME, IA_CSS_PIPE_ID_YUVPP); + ATOMISP_CSS_OUTPUT_FRAME, IA_CSS_PIPE_ID_YUVPP); } int atomisp_css_yuvpp_get_viewfinder_frame_info( - struct atomisp_sub_device *asd, - unsigned int stream_index, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info) { return __get_frame_info(asd, stream_index, info, - ATOMISP_CSS_VF_FRAME, IA_CSS_PIPE_ID_YUVPP); + ATOMISP_CSS_VF_FRAME, IA_CSS_PIPE_ID_YUVPP); } int atomisp_css_preview_configure_output(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format) + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) { /* * to SOC camera, use yuvpp pipe. */ if (ATOMISP_USE_YUVPP(asd)) - __configure_video_preview_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, - min_width, format, IA_CSS_PIPE_ID_YUVPP); + __configure_video_preview_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, + height, + min_width, format, IA_CSS_PIPE_ID_YUVPP); else __configure_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, - min_width, format, IA_CSS_PIPE_ID_PREVIEW); + min_width, format, IA_CSS_PIPE_ID_PREVIEW); return 0; } int atomisp_css_capture_configure_output(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format) + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) { enum ia_css_pipe_id pipe_id; @@ -3075,50 +3080,51 @@ int atomisp_css_capture_configure_output(struct atomisp_sub_device *asd, pipe_id = IA_CSS_PIPE_ID_CAPTURE; __configure_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, - min_width, format, pipe_id); + min_width, format, pipe_id); return 0; } int atomisp_css_video_configure_output(struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format) + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) { /* * to SOC camera, use yuvpp pipe. */ if (ATOMISP_USE_YUVPP(asd)) - __configure_video_preview_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, - min_width, format, IA_CSS_PIPE_ID_YUVPP); + __configure_video_preview_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, + height, + min_width, format, IA_CSS_PIPE_ID_YUVPP); else __configure_output(asd, ATOMISP_INPUT_STREAM_GENERAL, width, height, - min_width, format, IA_CSS_PIPE_ID_VIDEO); + min_width, format, IA_CSS_PIPE_ID_VIDEO); return 0; } int atomisp_css_video_configure_viewfinder( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format) + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) { /* * to SOC camera, video will use yuvpp pipe. */ if (ATOMISP_USE_YUVPP(asd)) __configure_video_vf_output(asd, width, height, min_width, format, - IA_CSS_PIPE_ID_YUVPP); + IA_CSS_PIPE_ID_YUVPP); else __configure_vf_output(asd, width, height, min_width, format, - IA_CSS_PIPE_ID_VIDEO); + IA_CSS_PIPE_ID_VIDEO); return 0; } int atomisp_css_capture_configure_viewfinder( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height, - unsigned int min_width, - enum atomisp_css_frame_format format) + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height, + unsigned int min_width, + enum atomisp_css_frame_format format) { enum ia_css_pipe_id pipe_id; @@ -3131,13 +3137,13 @@ int atomisp_css_capture_configure_viewfinder( pipe_id = IA_CSS_PIPE_ID_CAPTURE; __configure_vf_output(asd, width, height, min_width, format, - pipe_id); + pipe_id); return 0; } int atomisp_css_video_get_viewfinder_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) { enum ia_css_pipe_id pipe_id; enum frame_info_type frame_type = ATOMISP_CSS_VF_FRAME; @@ -3151,12 +3157,12 @@ int atomisp_css_video_get_viewfinder_frame_info( } return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, - frame_type, pipe_id); + frame_type, pipe_id); } int atomisp_css_capture_get_viewfinder_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) { enum ia_css_pipe_id pipe_id; @@ -3166,32 +3172,32 @@ int atomisp_css_capture_get_viewfinder_frame_info( pipe_id = IA_CSS_PIPE_ID_CAPTURE; return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, - ATOMISP_CSS_VF_FRAME, pipe_id); + ATOMISP_CSS_VF_FRAME, pipe_id); } int atomisp_css_capture_get_output_raw_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) { if (ATOMISP_USE_YUVPP(asd)) return 0; return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, - ATOMISP_CSS_RAW_FRAME, IA_CSS_PIPE_ID_CAPTURE); + ATOMISP_CSS_RAW_FRAME, IA_CSS_PIPE_ID_CAPTURE); } int atomisp_css_copy_get_output_frame_info( - struct atomisp_sub_device *asd, - unsigned int stream_index, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + unsigned int stream_index, + struct atomisp_css_frame_info *info) { return __get_frame_info(asd, stream_index, info, - ATOMISP_CSS_OUTPUT_FRAME, IA_CSS_PIPE_ID_COPY); + ATOMISP_CSS_OUTPUT_FRAME, IA_CSS_PIPE_ID_COPY); } int atomisp_css_preview_get_output_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) { enum ia_css_pipe_id pipe_id; enum frame_info_type frame_type = ATOMISP_CSS_OUTPUT_FRAME; @@ -3205,12 +3211,12 @@ int atomisp_css_preview_get_output_frame_info( } return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, - frame_type, pipe_id); + frame_type, pipe_id); } int atomisp_css_capture_get_output_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) { enum ia_css_pipe_id pipe_id; @@ -3220,12 +3226,12 @@ int atomisp_css_capture_get_output_frame_info( pipe_id = IA_CSS_PIPE_ID_CAPTURE; return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, - ATOMISP_CSS_OUTPUT_FRAME, pipe_id); + ATOMISP_CSS_OUTPUT_FRAME, pipe_id); } int atomisp_css_video_get_output_frame_info( - struct atomisp_sub_device *asd, - struct atomisp_css_frame_info *info) + struct atomisp_sub_device *asd, + struct atomisp_css_frame_info *info) { enum ia_css_pipe_id pipe_id; enum frame_info_type frame_type = ATOMISP_CSS_OUTPUT_FRAME; @@ -3239,68 +3245,68 @@ int atomisp_css_video_get_output_frame_info( } return __get_frame_info(asd, ATOMISP_INPUT_STREAM_GENERAL, info, - frame_type, pipe_id); + frame_type, pipe_id); } int atomisp_css_preview_configure_pp_input( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height) + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; __configure_preview_pp_input(asd, width, height, - ATOMISP_USE_YUVPP(asd) ? - IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_PREVIEW); + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_PREVIEW); if (width > stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE]. - capt_pp_in_res.width) + capt_pp_in_res.width) __configure_capture_pp_input(asd, width, height, - ATOMISP_USE_YUVPP(asd) ? - IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); return 0; } int atomisp_css_capture_configure_pp_input( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height) + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) { __configure_capture_pp_input(asd, width, height, - ATOMISP_USE_YUVPP(asd) ? - IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); return 0; } int atomisp_css_video_configure_pp_input( - struct atomisp_sub_device *asd, - unsigned int width, unsigned int height) + struct atomisp_sub_device *asd, + unsigned int width, unsigned int height) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; __configure_video_pp_input(asd, width, height, - ATOMISP_USE_YUVPP(asd) ? - IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_VIDEO); + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_VIDEO); if (width > stream_env->pipe_configs[IA_CSS_PIPE_ID_CAPTURE]. - capt_pp_in_res.width) + capt_pp_in_res.width) __configure_capture_pp_input(asd, width, height, - ATOMISP_USE_YUVPP(asd) ? - IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); + ATOMISP_USE_YUVPP(asd) ? + IA_CSS_PIPE_ID_YUVPP : IA_CSS_PIPE_ID_CAPTURE); return 0; } int atomisp_css_offline_capture_configure(struct atomisp_sub_device *asd, - int num_captures, unsigned int skip, int offset) + int num_captures, unsigned int skip, int offset) { enum ia_css_err ret; #ifdef ISP2401 dev_dbg(asd->isp->dev, "%s num_capture:%d skip:%d offset:%d\n", - __func__, num_captures, skip, offset); + __func__, num_captures, skip, offset); #endif ret = ia_css_stream_capture( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - num_captures, skip, offset); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + num_captures, skip, offset); if (ret != IA_CSS_SUCCESS) return -EINVAL; @@ -3312,8 +3318,8 @@ int atomisp_css_exp_id_capture(struct atomisp_sub_device *asd, int exp_id) enum ia_css_err ret; ret = ia_css_stream_capture_frame( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - exp_id); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + exp_id); if (ret == IA_CSS_ERR_QUEUE_IS_FULL) { /* capture cmd queue is full */ return -EBUSY; @@ -3329,8 +3335,8 @@ int atomisp_css_exp_id_unlock(struct atomisp_sub_device *asd, int exp_id) enum ia_css_err ret; ret = ia_css_unlock_raw_frame( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - exp_id); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + exp_id); if (ret == IA_CSS_ERR_QUEUE_IS_FULL) return -EAGAIN; else if (ret != IA_CSS_SUCCESS) @@ -3343,11 +3349,11 @@ int atomisp_css_capture_enable_xnr(struct atomisp_sub_device *asd, bool enable) { asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[IA_CSS_PIPE_ID_CAPTURE] - .default_capture_config.enable_xnr = enable; + .pipe_configs[IA_CSS_PIPE_ID_CAPTURE] + .default_capture_config.enable_xnr = enable; asd->params.capture_config.enable_xnr = enable; asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .update_pipe[IA_CSS_PIPE_ID_CAPTURE] = true; + .update_pipe[IA_CSS_PIPE_ID_CAPTURE] = true; return 0; } @@ -3357,8 +3363,8 @@ void atomisp_css_send_input_frame(struct atomisp_sub_device *asd, unsigned int height) { ia_css_stream_send_input_frame( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - data, width, height); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + data, width, height); } bool atomisp_css_isp_has_started(void) @@ -3369,35 +3375,35 @@ bool atomisp_css_isp_has_started(void) void atomisp_css_request_flash(struct atomisp_sub_device *asd) { ia_css_stream_request_flash( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream); } void atomisp_css_set_wb_config(struct atomisp_sub_device *asd, - struct atomisp_css_wb_config *wb_config) + struct atomisp_css_wb_config *wb_config) { asd->params.config.wb_config = wb_config; } void atomisp_css_set_ob_config(struct atomisp_sub_device *asd, - struct atomisp_css_ob_config *ob_config) + struct atomisp_css_ob_config *ob_config) { asd->params.config.ob_config = ob_config; } void atomisp_css_set_dp_config(struct atomisp_sub_device *asd, - struct atomisp_css_dp_config *dp_config) + struct atomisp_css_dp_config *dp_config) { asd->params.config.dp_config = dp_config; } void atomisp_css_set_de_config(struct atomisp_sub_device *asd, - struct atomisp_css_de_config *de_config) + struct atomisp_css_de_config *de_config) { asd->params.config.de_config = de_config; } void atomisp_css_set_dz_config(struct atomisp_sub_device *asd, - struct atomisp_css_dz_config *dz_config) + struct atomisp_css_dz_config *dz_config) { asd->params.config.dz_config = dz_config; } @@ -3408,145 +3414,145 @@ void atomisp_css_set_default_de_config(struct atomisp_sub_device *asd) } void atomisp_css_set_ce_config(struct atomisp_sub_device *asd, - struct atomisp_css_ce_config *ce_config) + struct atomisp_css_ce_config *ce_config) { asd->params.config.ce_config = ce_config; } void atomisp_css_set_nr_config(struct atomisp_sub_device *asd, - struct atomisp_css_nr_config *nr_config) + struct atomisp_css_nr_config *nr_config) { asd->params.config.nr_config = nr_config; } void atomisp_css_set_ee_config(struct atomisp_sub_device *asd, - struct atomisp_css_ee_config *ee_config) + struct atomisp_css_ee_config *ee_config) { asd->params.config.ee_config = ee_config; } void atomisp_css_set_tnr_config(struct atomisp_sub_device *asd, - struct atomisp_css_tnr_config *tnr_config) + struct atomisp_css_tnr_config *tnr_config) { asd->params.config.tnr_config = tnr_config; } void atomisp_css_set_cc_config(struct atomisp_sub_device *asd, - struct atomisp_css_cc_config *cc_config) + struct atomisp_css_cc_config *cc_config) { asd->params.config.cc_config = cc_config; } void atomisp_css_set_macc_table(struct atomisp_sub_device *asd, - struct atomisp_css_macc_table *macc_table) + struct atomisp_css_macc_table *macc_table) { asd->params.config.macc_table = macc_table; } void atomisp_css_set_macc_config(struct atomisp_sub_device *asd, - struct atomisp_css_macc_config *macc_config) + struct atomisp_css_macc_config *macc_config) { asd->params.config.macc_config = macc_config; } void atomisp_css_set_ecd_config(struct atomisp_sub_device *asd, - struct atomisp_css_ecd_config *ecd_config) + struct atomisp_css_ecd_config *ecd_config) { asd->params.config.ecd_config = ecd_config; } void atomisp_css_set_ynr_config(struct atomisp_sub_device *asd, - struct atomisp_css_ynr_config *ynr_config) + struct atomisp_css_ynr_config *ynr_config) { asd->params.config.ynr_config = ynr_config; } void atomisp_css_set_fc_config(struct atomisp_sub_device *asd, - struct atomisp_css_fc_config *fc_config) + struct atomisp_css_fc_config *fc_config) { asd->params.config.fc_config = fc_config; } void atomisp_css_set_ctc_config(struct atomisp_sub_device *asd, - struct atomisp_css_ctc_config *ctc_config) + struct atomisp_css_ctc_config *ctc_config) { asd->params.config.ctc_config = ctc_config; } void atomisp_css_set_cnr_config(struct atomisp_sub_device *asd, - struct atomisp_css_cnr_config *cnr_config) + struct atomisp_css_cnr_config *cnr_config) { asd->params.config.cnr_config = cnr_config; } void atomisp_css_set_aa_config(struct atomisp_sub_device *asd, - struct atomisp_css_aa_config *aa_config) + struct atomisp_css_aa_config *aa_config) { asd->params.config.aa_config = aa_config; } void atomisp_css_set_baa_config(struct atomisp_sub_device *asd, - struct atomisp_css_baa_config *baa_config) + struct atomisp_css_baa_config *baa_config) { asd->params.config.baa_config = baa_config; } void atomisp_css_set_anr_config(struct atomisp_sub_device *asd, - struct atomisp_css_anr_config *anr_config) + struct atomisp_css_anr_config *anr_config) { asd->params.config.anr_config = anr_config; } void atomisp_css_set_xnr_config(struct atomisp_sub_device *asd, - struct atomisp_css_xnr_config *xnr_config) + struct atomisp_css_xnr_config *xnr_config) { asd->params.config.xnr_config = xnr_config; } void atomisp_css_set_yuv2rgb_cc_config(struct atomisp_sub_device *asd, - struct atomisp_css_cc_config *yuv2rgb_cc_config) + struct atomisp_css_cc_config *yuv2rgb_cc_config) { asd->params.config.yuv2rgb_cc_config = yuv2rgb_cc_config; } void atomisp_css_set_rgb2yuv_cc_config(struct atomisp_sub_device *asd, - struct atomisp_css_cc_config *rgb2yuv_cc_config) + struct atomisp_css_cc_config *rgb2yuv_cc_config) { asd->params.config.rgb2yuv_cc_config = rgb2yuv_cc_config; } void atomisp_css_set_xnr_table(struct atomisp_sub_device *asd, - struct atomisp_css_xnr_table *xnr_table) + struct atomisp_css_xnr_table *xnr_table) { asd->params.config.xnr_table = xnr_table; } void atomisp_css_set_r_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_rgb_gamma_table *r_gamma_table) + struct atomisp_css_rgb_gamma_table *r_gamma_table) { asd->params.config.r_gamma_table = r_gamma_table; } void atomisp_css_set_g_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_rgb_gamma_table *g_gamma_table) + struct atomisp_css_rgb_gamma_table *g_gamma_table) { asd->params.config.g_gamma_table = g_gamma_table; } void atomisp_css_set_b_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_rgb_gamma_table *b_gamma_table) + struct atomisp_css_rgb_gamma_table *b_gamma_table) { asd->params.config.b_gamma_table = b_gamma_table; } void atomisp_css_set_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_gamma_table *gamma_table) + struct atomisp_css_gamma_table *gamma_table) { asd->params.config.gamma_table = gamma_table; } void atomisp_css_set_ctc_table(struct atomisp_sub_device *asd, - struct atomisp_css_ctc_table *ctc_table) + struct atomisp_css_ctc_table *ctc_table) { int i; u16 *vamem_ptr = ctc_table->data.vamem_1; @@ -3573,46 +3579,46 @@ void atomisp_css_set_ctc_table(struct atomisp_sub_device *asd, } void atomisp_css_set_anr_thres(struct atomisp_sub_device *asd, - struct atomisp_css_anr_thres *anr_thres) + struct atomisp_css_anr_thres *anr_thres) { asd->params.config.anr_thres = anr_thres; } void atomisp_css_set_dvs_6axis(struct atomisp_sub_device *asd, - struct atomisp_css_dvs_6axis *dvs_6axis) + struct atomisp_css_dvs_6axis *dvs_6axis) { asd->params.config.dvs_6axis_config = dvs_6axis; } void atomisp_css_set_gc_config(struct atomisp_sub_device *asd, - struct atomisp_css_gc_config *gc_config) + struct atomisp_css_gc_config *gc_config) { asd->params.config.gc_config = gc_config; } void atomisp_css_set_3a_config(struct atomisp_sub_device *asd, - struct atomisp_css_3a_config *s3a_config) + struct atomisp_css_3a_config *s3a_config) { asd->params.config.s3a_config = s3a_config; } void atomisp_css_video_set_dis_vector(struct atomisp_sub_device *asd, - struct atomisp_dis_vector *vector) + struct atomisp_dis_vector *vector) { if (!asd->params.config.motion_vector) asd->params.config.motion_vector = &asd->params.css_param.motion_vector; memset(asd->params.config.motion_vector, - 0, sizeof(struct ia_css_vector)); + 0, sizeof(struct ia_css_vector)); asd->params.css_param.motion_vector.x = vector->x; asd->params.css_param.motion_vector.y = vector->y; } static int atomisp_compare_dvs_grid(struct atomisp_sub_device *asd, - struct atomisp_dvs_grid_info *atomgrid) + struct atomisp_dvs_grid_info *atomgrid) { struct atomisp_css_dvs_grid_info *cur = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); if (!cur) { dev_err(asd->isp->dev, "dvs grid not available!\n"); @@ -3633,13 +3639,13 @@ static int atomisp_compare_dvs_grid(struct atomisp_sub_device *asd, } void atomisp_css_set_dvs2_coefs(struct atomisp_sub_device *asd, - struct ia_css_dvs2_coefficients *coefs) + struct ia_css_dvs2_coefficients *coefs) { asd->params.config.dvs2_coefs = coefs; } int atomisp_css_set_dis_coefs(struct atomisp_sub_device *asd, - struct atomisp_dis_coefficients *coefs) + struct atomisp_dis_coefficients *coefs) { if (atomisp_compare_dvs_grid(asd, &coefs->grid_info) != 0) /* If the grid info in the argument differs from the current @@ -3666,70 +3672,70 @@ int atomisp_css_set_dis_coefs(struct atomisp_sub_device *asd, return -EINVAL; if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.odd_real, - coefs->hor_coefs.odd_real, asd->params.dvs_hor_coef_bytes)) + coefs->hor_coefs.odd_real, asd->params.dvs_hor_coef_bytes)) return -EFAULT; if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.odd_imag, - coefs->hor_coefs.odd_imag, asd->params.dvs_hor_coef_bytes)) + coefs->hor_coefs.odd_imag, asd->params.dvs_hor_coef_bytes)) return -EFAULT; if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.even_real, - coefs->hor_coefs.even_real, asd->params.dvs_hor_coef_bytes)) + coefs->hor_coefs.even_real, asd->params.dvs_hor_coef_bytes)) return -EFAULT; if (copy_from_user(asd->params.css_param.dvs2_coeff->hor_coefs.even_imag, - coefs->hor_coefs.even_imag, asd->params.dvs_hor_coef_bytes)) + coefs->hor_coefs.even_imag, asd->params.dvs_hor_coef_bytes)) return -EFAULT; if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.odd_real, - coefs->ver_coefs.odd_real, asd->params.dvs_ver_coef_bytes)) + coefs->ver_coefs.odd_real, asd->params.dvs_ver_coef_bytes)) return -EFAULT; if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.odd_imag, - coefs->ver_coefs.odd_imag, asd->params.dvs_ver_coef_bytes)) + coefs->ver_coefs.odd_imag, asd->params.dvs_ver_coef_bytes)) return -EFAULT; if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.even_real, - coefs->ver_coefs.even_real, asd->params.dvs_ver_coef_bytes)) + coefs->ver_coefs.even_real, asd->params.dvs_ver_coef_bytes)) return -EFAULT; if (copy_from_user(asd->params.css_param.dvs2_coeff->ver_coefs.even_imag, - coefs->ver_coefs.even_imag, asd->params.dvs_ver_coef_bytes)) + coefs->ver_coefs.even_imag, asd->params.dvs_ver_coef_bytes)) return -EFAULT; asd->params.css_param.update_flag.dvs2_coefs = - (struct atomisp_dvs2_coefficients *) - asd->params.css_param.dvs2_coeff; + (struct atomisp_dvs2_coefficients *) + asd->params.css_param.dvs2_coeff; /* FIXME! */ -/* asd->params.dis_proj_data_valid = false; */ + /* asd->params.dis_proj_data_valid = false; */ asd->params.css_update_params_needed = true; return 0; } void atomisp_css_set_zoom_factor(struct atomisp_sub_device *asd, - unsigned int zoom) + unsigned int zoom) { struct atomisp_device *isp = asd->isp; if (zoom == asd->params.css_param.dz_config.dx && - zoom == asd->params.css_param.dz_config.dy) { + zoom == asd->params.css_param.dz_config.dy) { dev_dbg(isp->dev, "same zoom scale. skipped.\n"); return; } memset(&asd->params.css_param.dz_config, 0, - sizeof(struct ia_css_dz_config)); + sizeof(struct ia_css_dz_config)); asd->params.css_param.dz_config.dx = zoom; asd->params.css_param.dz_config.dy = zoom; asd->params.css_param.update_flag.dz_config = - (struct atomisp_dz_config *)&asd->params.css_param.dz_config; + (struct atomisp_dz_config *)&asd->params.css_param.dz_config; asd->params.css_update_params_needed = true; } void atomisp_css_set_formats_config(struct atomisp_sub_device *asd, - struct atomisp_css_formats_config *formats_config) + struct atomisp_css_formats_config *formats_config) { asd->params.config.formats_config = formats_config; } int atomisp_css_get_wb_config(struct atomisp_sub_device *asd, - struct atomisp_wb_config *config) + struct atomisp_wb_config *config) { struct atomisp_css_wb_config wb_config; struct ia_css_isp_config isp_config; @@ -3744,15 +3750,15 @@ int atomisp_css_get_wb_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.wb_config = &wb_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, &wb_config, sizeof(*config)); return 0; } int atomisp_css_get_ob_config(struct atomisp_sub_device *asd, - struct atomisp_ob_config *config) + struct atomisp_ob_config *config) { struct atomisp_css_ob_config ob_config; struct ia_css_isp_config isp_config; @@ -3767,15 +3773,15 @@ int atomisp_css_get_ob_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.ob_config = &ob_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, &ob_config, sizeof(*config)); return 0; } int atomisp_css_get_dp_config(struct atomisp_sub_device *asd, - struct atomisp_dp_config *config) + struct atomisp_dp_config *config) { struct atomisp_css_dp_config dp_config; struct ia_css_isp_config isp_config; @@ -3790,15 +3796,15 @@ int atomisp_css_get_dp_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.dp_config = &dp_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, &dp_config, sizeof(*config)); return 0; } int atomisp_css_get_de_config(struct atomisp_sub_device *asd, - struct atomisp_de_config *config) + struct atomisp_de_config *config) { struct atomisp_css_de_config de_config; struct ia_css_isp_config isp_config; @@ -3813,15 +3819,15 @@ int atomisp_css_get_de_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.de_config = &de_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, &de_config, sizeof(*config)); return 0; } int atomisp_css_get_nr_config(struct atomisp_sub_device *asd, - struct atomisp_nr_config *config) + struct atomisp_nr_config *config) { struct atomisp_css_nr_config nr_config; struct ia_css_isp_config isp_config; @@ -3837,15 +3843,15 @@ int atomisp_css_get_nr_config(struct atomisp_sub_device *asd, isp_config.nr_config = &nr_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, &nr_config, sizeof(*config)); return 0; } int atomisp_css_get_ee_config(struct atomisp_sub_device *asd, - struct atomisp_ee_config *config) + struct atomisp_ee_config *config) { struct atomisp_css_ee_config ee_config; struct ia_css_isp_config isp_config; @@ -3853,22 +3859,22 @@ int atomisp_css_get_ee_config(struct atomisp_sub_device *asd, if (!asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream) { dev_err(isp->dev, "%s called after streamoff, skipping.\n", - __func__); + __func__); return -EINVAL; } memset(&ee_config, 0, sizeof(struct atomisp_css_ee_config)); memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.ee_config = &ee_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, &ee_config, sizeof(*config)); return 0; } int atomisp_css_get_tnr_config(struct atomisp_sub_device *asd, - struct atomisp_tnr_config *config) + struct atomisp_tnr_config *config) { struct atomisp_css_tnr_config tnr_config; struct ia_css_isp_config isp_config; @@ -3883,15 +3889,15 @@ int atomisp_css_get_tnr_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.tnr_config = &tnr_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, &tnr_config, sizeof(*config)); return 0; } int atomisp_css_get_ctc_table(struct atomisp_sub_device *asd, - struct atomisp_ctc_table *config) + struct atomisp_ctc_table *config) { struct atomisp_css_ctc_table *tab; struct ia_css_isp_config isp_config; @@ -3910,8 +3916,8 @@ int atomisp_css_get_ctc_table(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.ctc_table = tab; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, tab, sizeof(*tab)); vfree(tab); @@ -3919,7 +3925,7 @@ int atomisp_css_get_ctc_table(struct atomisp_sub_device *asd, } int atomisp_css_get_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_gamma_table *config) + struct atomisp_gamma_table *config) { struct atomisp_css_gamma_table *tab; struct ia_css_isp_config isp_config; @@ -3938,8 +3944,8 @@ int atomisp_css_get_gamma_table(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.gamma_table = tab; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); memcpy(config, tab, sizeof(*tab)); vfree(tab); @@ -3947,7 +3953,7 @@ int atomisp_css_get_gamma_table(struct atomisp_sub_device *asd, } int atomisp_css_get_gc_config(struct atomisp_sub_device *asd, - struct atomisp_gc_config *config) + struct atomisp_gc_config *config) { struct atomisp_css_gc_config gc_config; struct ia_css_isp_config isp_config; @@ -3962,8 +3968,8 @@ int atomisp_css_get_gc_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.gc_config = &gc_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); /* Get gamma correction params from current setup */ memcpy(config, &gc_config, sizeof(*config)); @@ -3971,7 +3977,7 @@ int atomisp_css_get_gc_config(struct atomisp_sub_device *asd, } int atomisp_css_get_3a_config(struct atomisp_sub_device *asd, - struct atomisp_3a_config *config) + struct atomisp_3a_config *config) { struct atomisp_css_3a_config s3a_config; struct ia_css_isp_config isp_config; @@ -3986,8 +3992,8 @@ int atomisp_css_get_3a_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.s3a_config = &s3a_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); /* Get white balance from current setup */ memcpy(config, &s3a_config, sizeof(*config)); @@ -3995,7 +4001,7 @@ int atomisp_css_get_3a_config(struct atomisp_sub_device *asd, } int atomisp_css_get_formats_config(struct atomisp_sub_device *asd, - struct atomisp_formats_config *config) + struct atomisp_formats_config *config) { struct atomisp_css_formats_config formats_config; struct ia_css_isp_config isp_config; @@ -4010,8 +4016,8 @@ int atomisp_css_get_formats_config(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(isp_config)); isp_config.formats_config = &formats_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); /* Get narrow gamma from current setup */ memcpy(config, &formats_config, sizeof(*config)); @@ -4019,7 +4025,7 @@ int atomisp_css_get_formats_config(struct atomisp_sub_device *asd, } int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, - unsigned int *zoom) + unsigned int *zoom) { struct ia_css_dz_config dz_config; /** Digital Zoom */ struct ia_css_isp_config isp_config; @@ -4034,8 +4040,8 @@ int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.dz_config = &dz_config; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); *zoom = dz_config.dx; return 0; @@ -4045,7 +4051,7 @@ int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd, * Function to set/get image stablization statistics */ int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd, - struct atomisp_dis_statistics *stats) + struct atomisp_dis_statistics *stats) { struct atomisp_device *isp = asd->isp; struct atomisp_dis_buf *dis_buf; @@ -4083,16 +4089,16 @@ int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd, } dis_buf = list_entry(asd->dis_stats.next, - struct atomisp_dis_buf, list); + struct atomisp_dis_buf, list); list_del_init(&dis_buf->list); spin_unlock_irqrestore(&asd->dis_stats_lock, flags); if (dis_buf->dvs_map) ia_css_translate_dvs2_statistics( - asd->params.dvs_stat, dis_buf->dvs_map); + asd->params.dvs_stat, dis_buf->dvs_map); else ia_css_get_dvs2_statistics(asd->params.dvs_stat, - dis_buf->dis_data); + dis_buf->dis_data); stats->exp_id = dis_buf->dis_data->exp_id; spin_lock_irqsave(&asd->dis_stats_lock, flags); @@ -4136,13 +4142,13 @@ int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd, } struct atomisp_css_shading_table *atomisp_css_shading_table_alloc( - unsigned int width, unsigned int height) + unsigned int width, unsigned int height) { return ia_css_shading_table_alloc(width, height); } void atomisp_css_set_shading_table(struct atomisp_sub_device *asd, - struct atomisp_css_shading_table *table) + struct atomisp_css_shading_table *table) { asd->params.config.shading_table = table; } @@ -4153,19 +4159,19 @@ void atomisp_css_shading_table_free(struct atomisp_css_shading_table *table) } struct atomisp_css_morph_table *atomisp_css_morph_table_allocate( - unsigned int width, unsigned int height) + unsigned int width, unsigned int height) { return ia_css_morph_table_allocate(width, height); } void atomisp_css_set_morph_table(struct atomisp_sub_device *asd, - struct atomisp_css_morph_table *table) + struct atomisp_css_morph_table *table) { asd->params.config.morph_table = table; } void atomisp_css_get_morph_table(struct atomisp_sub_device *asd, - struct atomisp_css_morph_table *table) + struct atomisp_css_morph_table *table) { struct ia_css_isp_config isp_config; struct atomisp_device *isp = asd->isp; @@ -4179,8 +4185,8 @@ void atomisp_css_get_morph_table(struct atomisp_sub_device *asd, memset(&isp_config, 0, sizeof(struct ia_css_isp_config)); isp_config.morph_table = table; ia_css_stream_get_isp_config( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - &isp_config); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + &isp_config); } void atomisp_css_morph_table_free(struct atomisp_css_morph_table *table) @@ -4189,7 +4195,7 @@ void atomisp_css_morph_table_free(struct atomisp_css_morph_table *table) } void atomisp_css_set_cont_prev_start_time(struct atomisp_device *isp, - unsigned int overlap) + unsigned int overlap) { /* CSS 2.0 doesn't support this API. */ dev_dbg(isp->dev, "set cont prev start time is not supported.\n"); @@ -4209,7 +4215,7 @@ int atomisp_css_wait_acc_finish(struct atomisp_sub_device *asd) /* Unlock the isp mutex taken in IOCTL handler before sleeping! */ rt_mutex_unlock(&isp->mutex); if (wait_for_completion_interruptible_timeout(&asd->acc.acc_done, - ATOMISP_ISP_TIMEOUT_DURATION) == 0) { + ATOMISP_ISP_TIMEOUT_DURATION) == 0) { dev_err(isp->dev, "<%s: completion timeout\n", __func__); atomisp_css_debug_dump_sp_sw_debug_info(); atomisp_css_debug_dump_debug_info(__func__); @@ -4230,9 +4236,9 @@ int atomisp_css_set_acc_parameters(struct atomisp_acc_fw *acc_fw) continue; ia_css_isp_param_set_css_mem_init(&acc_fw->fw->mem_initializers, - IA_CSS_PARAM_CLASS_PARAM, mem, - acc_fw->args[mem].css_ptr, - acc_fw->args[mem].length); + IA_CSS_PARAM_CLASS_PARAM, mem, + acc_fw->args[mem].css_ptr, + acc_fw->args[mem].length); } return 0; @@ -4248,25 +4254,25 @@ int atomisp_css_load_acc_extension(struct atomisp_sub_device *asd, fw->next = NULL; hd = &(asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[pipe_id].acc_extension); + .pipe_configs[pipe_id].acc_extension); while (*hd) hd = &(*hd)->next; *hd = fw; asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .update_pipe[pipe_id] = true; + .update_pipe[pipe_id] = true; return 0; } /* Unload acc binary extension */ void atomisp_css_unload_acc_extension(struct atomisp_sub_device *asd, - struct atomisp_css_fw_info *fw, - enum atomisp_css_pipe_id pipe_id) + struct atomisp_css_fw_info *fw, + enum atomisp_css_pipe_id pipe_id) { struct atomisp_css_fw_info **hd; hd = &(asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[pipe_id].acc_extension); + .pipe_configs[pipe_id].acc_extension); while (*hd && *hd != fw) hd = &(*hd)->next; if (!*hd) { @@ -4277,7 +4283,7 @@ void atomisp_css_unload_acc_extension(struct atomisp_sub_device *asd, fw->next = NULL; asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .update_pipe[pipe_id] = true; + .update_pipe[pipe_id] = true; } int atomisp_css_create_acc_pipe(struct atomisp_sub_device *asd) @@ -4285,19 +4291,19 @@ int atomisp_css_create_acc_pipe(struct atomisp_sub_device *asd) struct atomisp_device *isp = asd->isp; struct ia_css_pipe_config *pipe_config; struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; if (stream_env->acc_stream) { if (stream_env->acc_stream_state == CSS_STREAM_STARTED) { if (ia_css_stream_stop(stream_env->acc_stream) - != IA_CSS_SUCCESS) { + != IA_CSS_SUCCESS) { dev_err(isp->dev, "stop acc_stream failed.\n"); return -EBUSY; } } if (ia_css_stream_destroy(stream_env->acc_stream) - != IA_CSS_SUCCESS) { + != IA_CSS_SUCCESS) { dev_err(isp->dev, "destroy acc_stream failed.\n"); return -EBUSY; } @@ -4307,7 +4313,7 @@ int atomisp_css_create_acc_pipe(struct atomisp_sub_device *asd) pipe_config = &stream_env->pipe_configs[CSS_PIPE_ID_ACC]; ia_css_pipe_config_defaults(pipe_config); asd->acc.acc_stages = kzalloc(MAX_ACC_STAGES * - sizeof(void *), GFP_KERNEL); + sizeof(void *), GFP_KERNEL); if (!asd->acc.acc_stages) return -ENOMEM; pipe_config->acc_stages = asd->acc.acc_stages; @@ -4326,22 +4332,22 @@ int atomisp_css_start_acc_pipe(struct atomisp_sub_device *asd) { struct atomisp_device *isp = asd->isp; struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; struct ia_css_pipe_config *pipe_config = - &stream_env->pipe_configs[IA_CSS_PIPE_ID_ACC]; + &stream_env->pipe_configs[IA_CSS_PIPE_ID_ACC]; if (ia_css_pipe_create(pipe_config, - &stream_env->pipes[IA_CSS_PIPE_ID_ACC]) != IA_CSS_SUCCESS) { + &stream_env->pipes[IA_CSS_PIPE_ID_ACC]) != IA_CSS_SUCCESS) { dev_err(isp->dev, "%s: ia_css_pipe_create failed\n", - __func__); + __func__); return -EBADE; } memset(&stream_env->acc_stream_config, 0, - sizeof(struct ia_css_stream_config)); + sizeof(struct ia_css_stream_config)); if (ia_css_stream_create(&stream_env->acc_stream_config, 1, - &stream_env->pipes[IA_CSS_PIPE_ID_ACC], - &stream_env->acc_stream) != IA_CSS_SUCCESS) { + &stream_env->pipes[IA_CSS_PIPE_ID_ACC], + &stream_env->acc_stream) != IA_CSS_SUCCESS) { dev_err(isp->dev, "%s: create acc_stream error.\n", __func__); return -EINVAL; } @@ -4358,7 +4364,7 @@ int atomisp_css_start_acc_pipe(struct atomisp_sub_device *asd) } if (ia_css_stream_start(stream_env->acc_stream) - != IA_CSS_SUCCESS) { + != IA_CSS_SUCCESS) { dev_err(isp->dev, "acc_stream start error.\n"); return -EIO; } @@ -4370,7 +4376,7 @@ int atomisp_css_start_acc_pipe(struct atomisp_sub_device *asd) int atomisp_css_stop_acc_pipe(struct atomisp_sub_device *asd) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; if (stream_env->acc_stream_state == CSS_STREAM_STARTED) { ia_css_stream_stop(stream_env->acc_stream); stream_env->acc_stream_state = CSS_STREAM_STOPPED; @@ -4381,26 +4387,26 @@ int atomisp_css_stop_acc_pipe(struct atomisp_sub_device *asd) void atomisp_css_destroy_acc_pipe(struct atomisp_sub_device *asd) { struct atomisp_stream_env *stream_env = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; if (stream_env->acc_stream) { if (ia_css_stream_destroy(stream_env->acc_stream) != IA_CSS_SUCCESS) dev_warn(asd->isp->dev, - "destroy acc_stream failed.\n"); + "destroy acc_stream failed.\n"); stream_env->acc_stream = NULL; } if (stream_env->pipes[IA_CSS_PIPE_ID_ACC]) { if (ia_css_pipe_destroy(stream_env->pipes[IA_CSS_PIPE_ID_ACC]) - != IA_CSS_SUCCESS) + != IA_CSS_SUCCESS) dev_warn(asd->isp->dev, - "destroy ACC pipe failed.\n"); + "destroy ACC pipe failed.\n"); stream_env->pipes[IA_CSS_PIPE_ID_ACC] = NULL; stream_env->update_pipe[IA_CSS_PIPE_ID_ACC] = false; ia_css_pipe_config_defaults( - &stream_env->pipe_configs[IA_CSS_PIPE_ID_ACC]); + &stream_env->pipe_configs[IA_CSS_PIPE_ID_ACC]); ia_css_pipe_extra_config_defaults( - &stream_env->pipe_extra_configs[IA_CSS_PIPE_ID_ACC]); + &stream_env->pipe_extra_configs[IA_CSS_PIPE_ID_ACC]); } asd->acc.pipeline = NULL; @@ -4416,16 +4422,16 @@ void atomisp_css_destroy_acc_pipe(struct atomisp_sub_device *asd) } int atomisp_css_load_acc_binary(struct atomisp_sub_device *asd, - struct atomisp_css_fw_info *fw, - unsigned int index) + struct atomisp_css_fw_info *fw, + unsigned int index) { struct ia_css_pipe_config *pipe_config = - &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] - .pipe_configs[IA_CSS_PIPE_ID_ACC]; + &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL] + .pipe_configs[IA_CSS_PIPE_ID_ACC]; if (index >= MAX_ACC_STAGES) { dev_dbg(asd->isp->dev, "%s: index(%d) out of range\n", - __func__, index); + __func__, index); return -ENOMEM; } @@ -4437,9 +4443,9 @@ int atomisp_css_load_acc_binary(struct atomisp_sub_device *asd, } static struct atomisp_sub_device *__get_atomisp_subdev( - struct ia_css_pipe *css_pipe, - struct atomisp_device *isp, - enum atomisp_input_stream_id *stream_id) + struct ia_css_pipe *css_pipe, + struct atomisp_device *isp, + enum atomisp_input_stream_id *stream_id) { int i, j, k; struct atomisp_sub_device *asd; @@ -4454,11 +4460,11 @@ static struct atomisp_sub_device *__get_atomisp_subdev( stream_env = &asd->stream_env[j]; for (k = 0; k < IA_CSS_PIPE_ID_NUM; k++) { if (stream_env->pipes[k] && - stream_env->pipes[k] == css_pipe) { - *stream_id = j; - return asd; - } + stream_env->pipes[k] == css_pipe) { + *stream_id = j; + return asd; } + } } } @@ -4479,12 +4485,13 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, while (!atomisp_css_dequeue_event(¤t_event)) { if (current_event.event.type == - IA_CSS_EVENT_TYPE_FW_ASSERT) { + IA_CSS_EVENT_TYPE_FW_ASSERT) { /* * Received FW assertion signal, * trigger WDT to recover */ - dev_err(isp->dev, "%s: ISP reports FW_ASSERT event! fw_assert_module_id %d fw_assert_line_no %d\n", + dev_err(isp->dev, + "%s: ISP reports FW_ASSERT event! fw_assert_module_id %d fw_assert_line_no %d\n", __func__, current_event.event.fw_assert_module_id, current_event.event.fw_assert_line_no); @@ -4498,21 +4505,21 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, return -EINVAL; } else if (current_event.event.type == IA_CSS_EVENT_TYPE_FW_WARNING) { dev_warn(isp->dev, "%s: ISP reports warning, code is %d, exp_id %d\n", - __func__, current_event.event.fw_warning, - current_event.event.exp_id); + __func__, current_event.event.fw_warning, + current_event.event.exp_id); continue; } asd = __get_atomisp_subdev(current_event.event.pipe, - isp, &stream_id); + isp, &stream_id); if (!asd) { if (current_event.event.type == CSS_EVENT_TIMER) dev_dbg(isp->dev, "event: Timer event."); else dev_warn(isp->dev, "%s:no subdev.event:%d", - __func__, - current_event.event.type); + __func__, + current_event.event.type); continue; } @@ -4576,7 +4583,7 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, break; default: dev_dbg(isp->dev, "unhandled css stored event: 0x%x\n", - current_event.event.type); + current_event.event.type); break; } } @@ -4592,9 +4599,9 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, if (!atomisp_buffers_queued(asd)) atomisp_wdt_stop(asd, false); else if (reset_wdt_timer[i]) - /* SOF irq should not reset wdt timer. */ + /* SOF irq should not reset wdt timer. */ atomisp_wdt_refresh(asd, - ATOMISP_WDT_KEEP_CURRENT_DELAY); + ATOMISP_WDT_KEEP_CURRENT_DELAY); } #endif @@ -4611,8 +4618,8 @@ bool atomisp_css_valid_sof(struct atomisp_device *isp) /* Loop for each css vc stream */ for (j = 0; j < ATOMISP_INPUT_STREAM_NUM; j++) { if (asd->stream_env[j].stream && - asd->stream_env[j].stream_config.mode == - IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + asd->stream_env[j].stream_config.mode == + IA_CSS_INPUT_MODE_BUFFERED_SENSOR) return false; } } @@ -4650,13 +4657,13 @@ int atomisp_css_dump_blob_infor(void) } void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd, - uint32_t isp_config_id) + uint32_t isp_config_id) { asd->params.config.isp_config_id = isp_config_id; } void atomisp_css_set_isp_config_applied_frame(struct atomisp_sub_device *asd, - struct atomisp_css_frame *output_frame) + struct atomisp_css_frame *output_frame) { asd->params.config.output_frame = output_frame; } @@ -4680,12 +4687,12 @@ int atomisp_set_css_dbgfunc(struct atomisp_device *isp, int opt) void atomisp_en_dz_capt_pipe(struct atomisp_sub_device *asd, bool enable) { ia_css_en_dz_capt_pipe( - asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, - enable); + asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, + enable); } struct atomisp_css_dvs_grid_info *atomisp_css_get_dvs_grid_info( - struct atomisp_css_grid_info *grid_info) + struct atomisp_css_grid_info *grid_info) { if (!grid_info) return NULL; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h index a06c5b6e8027d..7abd1ff356522 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h @@ -196,55 +196,55 @@ struct atomisp_css_event { }; void atomisp_css_set_macc_config(struct atomisp_sub_device *asd, - struct atomisp_css_macc_config *macc_config); + struct atomisp_css_macc_config *macc_config); void atomisp_css_set_ecd_config(struct atomisp_sub_device *asd, - struct atomisp_css_ecd_config *ecd_config); + struct atomisp_css_ecd_config *ecd_config); void atomisp_css_set_ynr_config(struct atomisp_sub_device *asd, - struct atomisp_css_ynr_config *ynr_config); + struct atomisp_css_ynr_config *ynr_config); void atomisp_css_set_fc_config(struct atomisp_sub_device *asd, - struct atomisp_css_fc_config *fc_config); + struct atomisp_css_fc_config *fc_config); void atomisp_css_set_aa_config(struct atomisp_sub_device *asd, - struct atomisp_css_aa_config *aa_config); + struct atomisp_css_aa_config *aa_config); void atomisp_css_set_baa_config(struct atomisp_sub_device *asd, - struct atomisp_css_baa_config *baa_config); + struct atomisp_css_baa_config *baa_config); void atomisp_css_set_anr_config(struct atomisp_sub_device *asd, - struct atomisp_css_anr_config *anr_config); + struct atomisp_css_anr_config *anr_config); void atomisp_css_set_xnr_config(struct atomisp_sub_device *asd, - struct atomisp_css_xnr_config *xnr_config); + struct atomisp_css_xnr_config *xnr_config); void atomisp_css_set_cnr_config(struct atomisp_sub_device *asd, - struct atomisp_css_cnr_config *cnr_config); + struct atomisp_css_cnr_config *cnr_config); void atomisp_css_set_ctc_config(struct atomisp_sub_device *asd, - struct atomisp_css_ctc_config *ctc_config); + struct atomisp_css_ctc_config *ctc_config); void atomisp_css_set_yuv2rgb_cc_config(struct atomisp_sub_device *asd, - struct atomisp_css_cc_config *yuv2rgb_cc_config); + struct atomisp_css_cc_config *yuv2rgb_cc_config); void atomisp_css_set_rgb2yuv_cc_config(struct atomisp_sub_device *asd, - struct atomisp_css_cc_config *rgb2yuv_cc_config); + struct atomisp_css_cc_config *rgb2yuv_cc_config); void atomisp_css_set_xnr_table(struct atomisp_sub_device *asd, - struct atomisp_css_xnr_table *xnr_table); + struct atomisp_css_xnr_table *xnr_table); void atomisp_css_set_r_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_rgb_gamma_table *r_gamma_table); + struct atomisp_css_rgb_gamma_table *r_gamma_table); void atomisp_css_set_g_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_rgb_gamma_table *g_gamma_table); + struct atomisp_css_rgb_gamma_table *g_gamma_table); void atomisp_css_set_b_gamma_table(struct atomisp_sub_device *asd, - struct atomisp_css_rgb_gamma_table *b_gamma_table); + struct atomisp_css_rgb_gamma_table *b_gamma_table); void atomisp_css_set_anr_thres(struct atomisp_sub_device *asd, - struct atomisp_css_anr_thres *anr_thres); + struct atomisp_css_anr_thres *anr_thres); int atomisp_css_check_firmware_version(struct atomisp_device *isp); @@ -253,7 +253,7 @@ int atomisp_css_load_firmware(struct atomisp_device *isp); void atomisp_css_unload_firmware(struct atomisp_device *isp); void atomisp_css_set_dvs_6axis(struct atomisp_sub_device *asd, - struct atomisp_css_dvs_6axis *dvs_6axis); + struct atomisp_css_dvs_6axis *dvs_6axis); unsigned int atomisp_css_debug_get_dtrace_level(void); @@ -264,14 +264,14 @@ int atomisp_css_dump_sp_raw_copy_linecount(bool reduced); int atomisp_css_dump_blob_infor(void); void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd, - uint32_t isp_config_id); + uint32_t isp_config_id); void atomisp_css_set_isp_config_applied_frame(struct atomisp_sub_device *asd, - struct atomisp_css_frame *output_frame); + struct atomisp_css_frame *output_frame); int atomisp_get_css_dbgfunc(void); int atomisp_set_css_dbgfunc(struct atomisp_device *isp, int opt); struct atomisp_css_dvs_grid_info *atomisp_css_get_dvs_grid_info( - struct atomisp_css_grid_info *grid_info); + struct atomisp_css_grid_info *grid_info); #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c index fb06dcbc96ed5..8a630b0d070f2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c @@ -25,7 +25,7 @@ #include "atomisp_compat_ioctl32.h" static int get_atomisp_histogram32(struct atomisp_histogram *kp, - struct atomisp_histogram32 __user *up) + struct atomisp_histogram32 __user *up) { compat_uptr_t tmp; @@ -39,7 +39,7 @@ static int get_atomisp_histogram32(struct atomisp_histogram *kp, } static int put_atomisp_histogram32(struct atomisp_histogram *kp, - struct atomisp_histogram32 __user *up) + struct atomisp_histogram32 __user *up) { compat_uptr_t tmp = (compat_uptr_t)((uintptr_t)kp->data); @@ -52,7 +52,7 @@ static int put_atomisp_histogram32(struct atomisp_histogram *kp, } static inline int get_v4l2_pix_format(struct v4l2_pix_format *kp, - struct v4l2_pix_format __user *up) + struct v4l2_pix_format __user *up) { if (copy_from_user(kp, up, sizeof(struct v4l2_pix_format))) return -EFAULT; @@ -60,7 +60,7 @@ static inline int get_v4l2_pix_format(struct v4l2_pix_format *kp, } static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp, - struct v4l2_pix_format __user *up) + struct v4l2_pix_format __user *up) { if (copy_to_user(up, kp, sizeof(struct v4l2_pix_format))) return -EFAULT; @@ -68,7 +68,7 @@ static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp, } static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp, - struct v4l2_framebuffer32 __user *up) + struct v4l2_framebuffer32 __user *up) { compat_uptr_t tmp; @@ -84,7 +84,7 @@ static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp, } static int get_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, - struct atomisp_dis_statistics32 __user *up) + struct atomisp_dis_statistics32 __user *up) { compat_uptr_t hor_prod_odd_real; compat_uptr_t hor_prod_odd_imag; @@ -120,24 +120,24 @@ static int get_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, } static int put_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, - struct atomisp_dis_statistics32 __user *up) + struct atomisp_dis_statistics32 __user *up) { compat_uptr_t hor_prod_odd_real = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_real); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_real); compat_uptr_t hor_prod_odd_imag = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_imag); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_imag); compat_uptr_t hor_prod_even_real = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_real); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_real); compat_uptr_t hor_prod_even_imag = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_imag); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_imag); compat_uptr_t ver_prod_odd_real = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_real); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_real); compat_uptr_t ver_prod_odd_imag = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_imag); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_imag); compat_uptr_t ver_prod_even_real = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_real); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_real); compat_uptr_t ver_prod_even_imag = - (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_imag); + (compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_imag); if (!access_ok(up, sizeof(struct atomisp_dis_statistics32)) || copy_to_user(up, kp, sizeof(struct atomisp_dvs_grid_info)) || @@ -156,7 +156,7 @@ static int put_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp, } static int get_atomisp_dis_coefficients32(struct atomisp_dis_coefficients *kp, - struct atomisp_dis_coefficients32 __user *up) + struct atomisp_dis_coefficients32 __user *up) { compat_uptr_t hor_coefs_odd_real; compat_uptr_t hor_coefs_odd_imag; @@ -191,8 +191,9 @@ static int get_atomisp_dis_coefficients32(struct atomisp_dis_coefficients *kp, } static int get_atomisp_dvs_6axis_config32(struct atomisp_dvs_6axis_config *kp, - struct atomisp_dvs_6axis_config32 __user *up) -{ compat_uptr_t xcoords_y; + struct atomisp_dvs_6axis_config32 __user *up) +{ + compat_uptr_t xcoords_y; compat_uptr_t ycoords_y; compat_uptr_t xcoords_uv; compat_uptr_t ycoords_uv; @@ -217,7 +218,7 @@ static int get_atomisp_dvs_6axis_config32(struct atomisp_dvs_6axis_config *kp, } static int get_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, - struct atomisp_3a_statistics32 __user *up) + struct atomisp_3a_statistics32 __user *up) { compat_uptr_t data; compat_uptr_t rgby_data; @@ -237,7 +238,7 @@ static int get_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, } static int put_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, - struct atomisp_3a_statistics32 __user *up) + struct atomisp_3a_statistics32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); compat_uptr_t rgby_data = (compat_uptr_t)((uintptr_t)kp->rgby_data); @@ -254,7 +255,7 @@ static int put_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp, } static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp, - struct atomisp_metadata32 __user *up) + struct atomisp_metadata32 __user *up) { compat_uptr_t data; compat_uptr_t effective_width; @@ -274,11 +275,11 @@ static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp, } static int put_atomisp_metadata_stat32(struct atomisp_metadata *kp, - struct atomisp_metadata32 __user *up) + struct atomisp_metadata32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); compat_uptr_t effective_width = - (compat_uptr_t)((uintptr_t)kp->effective_width); + (compat_uptr_t)((uintptr_t)kp->effective_width); if (!access_ok(up, sizeof(struct atomisp_metadata32)) || put_user(data, &up->data) || put_user(kp->width, &up->width) || @@ -292,12 +293,12 @@ static int put_atomisp_metadata_stat32(struct atomisp_metadata *kp, } static int put_atomisp_metadata_by_type_stat32( - struct atomisp_metadata_with_type *kp, - struct atomisp_metadata_with_type32 __user *up) + struct atomisp_metadata_with_type *kp, + struct atomisp_metadata_with_type32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); compat_uptr_t effective_width = - (compat_uptr_t)((uintptr_t)kp->effective_width); + (compat_uptr_t)((uintptr_t)kp->effective_width); if (!access_ok(up, sizeof(struct atomisp_metadata_with_type32)) || put_user(data, &up->data) || put_user(kp->width, &up->width) || @@ -312,8 +313,8 @@ static int put_atomisp_metadata_by_type_stat32( } static int get_atomisp_metadata_by_type_stat32( - struct atomisp_metadata_with_type *kp, - struct atomisp_metadata_with_type32 __user *up) + struct atomisp_metadata_with_type *kp, + struct atomisp_metadata_with_type32 __user *up) { compat_uptr_t data; compat_uptr_t effective_width; @@ -334,7 +335,7 @@ static int get_atomisp_metadata_by_type_stat32( } static int get_atomisp_morph_table32(struct atomisp_morph_table *kp, - struct atomisp_morph_table32 __user *up) + struct atomisp_morph_table32 __user *up) { unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES; @@ -358,7 +359,7 @@ static int get_atomisp_morph_table32(struct atomisp_morph_table *kp, } static int put_atomisp_morph_table32(struct atomisp_morph_table *kp, - struct atomisp_morph_table32 __user *up) + struct atomisp_morph_table32 __user *up) { unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES; @@ -382,7 +383,7 @@ static int put_atomisp_morph_table32(struct atomisp_morph_table *kp, } static int get_atomisp_overlay32(struct atomisp_overlay *kp, - struct atomisp_overlay32 __user *up) + struct atomisp_overlay32 __user *up) { compat_uptr_t frame; @@ -406,7 +407,7 @@ static int get_atomisp_overlay32(struct atomisp_overlay *kp, } static int put_atomisp_overlay32(struct atomisp_overlay *kp, - struct atomisp_overlay32 __user *up) + struct atomisp_overlay32 __user *up) { compat_uptr_t frame = (compat_uptr_t)((uintptr_t)kp->frame); @@ -429,8 +430,8 @@ static int put_atomisp_overlay32(struct atomisp_overlay *kp, } static int get_atomisp_calibration_group32( - struct atomisp_calibration_group *kp, - struct atomisp_calibration_group32 __user *up) + struct atomisp_calibration_group *kp, + struct atomisp_calibration_group32 __user *up) { compat_uptr_t calb_grp_values; @@ -445,11 +446,11 @@ static int get_atomisp_calibration_group32( } static int put_atomisp_calibration_group32( - struct atomisp_calibration_group *kp, - struct atomisp_calibration_group32 __user *up) + struct atomisp_calibration_group *kp, + struct atomisp_calibration_group32 __user *up) { compat_uptr_t calb_grp_values = - (compat_uptr_t)((uintptr_t)kp->calb_grp_values); + (compat_uptr_t)((uintptr_t)kp->calb_grp_values); if (!access_ok(up, sizeof(struct atomisp_calibration_group32)) || put_user(kp->size, &up->size) || @@ -461,7 +462,7 @@ static int put_atomisp_calibration_group32( } static int get_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, - struct atomisp_acc_fw_load32 __user *up) + struct atomisp_acc_fw_load32 __user *up) { compat_uptr_t data; @@ -476,7 +477,7 @@ static int get_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, } static int put_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, - struct atomisp_acc_fw_load32 __user *up) + struct atomisp_acc_fw_load32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); @@ -490,7 +491,7 @@ static int put_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp, } static int get_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, - struct atomisp_acc_fw_arg32 __user *up) + struct atomisp_acc_fw_arg32 __user *up) { compat_uptr_t value; @@ -506,7 +507,7 @@ static int get_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, } static int put_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, - struct atomisp_acc_fw_arg32 __user *up) + struct atomisp_acc_fw_arg32 __user *up) { compat_uptr_t value = (compat_uptr_t)((uintptr_t)kp->value); @@ -521,7 +522,7 @@ static int put_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp, } static int get_v4l2_private_int_data32(struct v4l2_private_int_data *kp, - struct v4l2_private_int_data32 __user *up) + struct v4l2_private_int_data32 __user *up) { compat_uptr_t data; @@ -537,7 +538,7 @@ static int get_v4l2_private_int_data32(struct v4l2_private_int_data *kp, } static int put_v4l2_private_int_data32(struct v4l2_private_int_data *kp, - struct v4l2_private_int_data32 __user *up) + struct v4l2_private_int_data32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); @@ -552,7 +553,7 @@ static int put_v4l2_private_int_data32(struct v4l2_private_int_data *kp, } static int get_atomisp_shading_table32(struct atomisp_shading_table *kp, - struct atomisp_shading_table32 __user *up) + struct atomisp_shading_table32 __user *up) { unsigned int n = ATOMISP_NUM_SC_COLORS; @@ -575,7 +576,7 @@ static int get_atomisp_shading_table32(struct atomisp_shading_table *kp, } static int get_atomisp_acc_map32(struct atomisp_acc_map *kp, - struct atomisp_acc_map32 __user *up) + struct atomisp_acc_map32 __user *up) { compat_uptr_t user_ptr; @@ -595,7 +596,7 @@ static int get_atomisp_acc_map32(struct atomisp_acc_map *kp, } static int put_atomisp_acc_map32(struct atomisp_acc_map *kp, - struct atomisp_acc_map32 __user *up) + struct atomisp_acc_map32 __user *up) { compat_uptr_t user_ptr = (compat_uptr_t)((uintptr_t)kp->user_ptr); @@ -614,7 +615,7 @@ static int put_atomisp_acc_map32(struct atomisp_acc_map *kp, } static int get_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, - struct atomisp_acc_s_mapped_arg32 __user *up) + struct atomisp_acc_s_mapped_arg32 __user *up) { if (!access_ok(up, sizeof(struct atomisp_acc_s_mapped_arg32)) || get_user(kp->fw_handle, &up->fw_handle) || @@ -627,7 +628,7 @@ static int get_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, } static int put_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, - struct atomisp_acc_s_mapped_arg32 __user *up) + struct atomisp_acc_s_mapped_arg32 __user *up) { if (!access_ok(up, sizeof(struct atomisp_acc_s_mapped_arg32)) || put_user(kp->fw_handle, &up->fw_handle) || @@ -640,10 +641,10 @@ static int put_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp, } static int get_atomisp_parameters32(struct atomisp_parameters *kp, - struct atomisp_parameters32 __user *up) + struct atomisp_parameters32 __user *up) { int n = offsetof(struct atomisp_parameters32, output_frame) / - sizeof(compat_uptr_t); + sizeof(compat_uptr_t); unsigned int size, offset = 0; void __user *user_ptr; unsigned int stp, mtp, dcp, dscp = 0; @@ -676,16 +677,16 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp, } karg; size = sizeof(struct atomisp_shading_table) + - sizeof(struct atomisp_morph_table) + - sizeof(struct atomisp_dis_coefficients) + - sizeof(struct atomisp_dvs_6axis_config); + sizeof(struct atomisp_morph_table) + + sizeof(struct atomisp_dis_coefficients) + + sizeof(struct atomisp_dvs_6axis_config); user_ptr = compat_alloc_user_space(size); /* handle shading table */ if (stp != 0) { if (get_atomisp_shading_table32(&karg.shading_table, - (struct atomisp_shading_table32 __user *) - (uintptr_t)stp)) + (struct atomisp_shading_table32 __user *) + (uintptr_t)stp)) return -EFAULT; kp->shading_table = (void __force *)user_ptr + offset; @@ -702,8 +703,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp, /* handle morph table */ if (mtp != 0) { if (get_atomisp_morph_table32(&karg.morph_table, - (struct atomisp_morph_table32 __user *) - (uintptr_t)mtp)) + (struct atomisp_morph_table32 __user *) + (uintptr_t)mtp)) return -EFAULT; kp->morph_table = (void __force *)user_ptr + offset; @@ -720,8 +721,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp, /* handle dvs2 coefficients */ if (dcp != 0) { if (get_atomisp_dis_coefficients32(&karg.dvs2_coefs, - (struct atomisp_dis_coefficients32 __user *) - (uintptr_t)dcp)) + (struct atomisp_dis_coefficients32 __user *) + (uintptr_t)dcp)) return -EFAULT; kp->dvs2_coefs = (void __force *)user_ptr + offset; @@ -737,8 +738,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp, /* handle dvs 6axis configuration */ if (dscp != 0) { if (get_atomisp_dvs_6axis_config32(&karg.dvs_6axis_config, - (struct atomisp_dvs_6axis_config32 __user *) - (uintptr_t)dscp)) + (struct atomisp_dvs_6axis_config32 __user *) + (uintptr_t)dscp)) return -EFAULT; kp->dvs_6axis_config = (void __force *)user_ptr + offset; @@ -756,8 +757,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp, } static int get_atomisp_acc_fw_load_to_pipe32( - struct atomisp_acc_fw_load_to_pipe *kp, - struct atomisp_acc_fw_load_to_pipe32 __user *up) + struct atomisp_acc_fw_load_to_pipe *kp, + struct atomisp_acc_fw_load_to_pipe32 __user *up) { compat_uptr_t data; @@ -777,8 +778,8 @@ static int get_atomisp_acc_fw_load_to_pipe32( } static int put_atomisp_acc_fw_load_to_pipe32( - struct atomisp_acc_fw_load_to_pipe *kp, - struct atomisp_acc_fw_load_to_pipe32 __user *up) + struct atomisp_acc_fw_load_to_pipe *kp, + struct atomisp_acc_fw_load_to_pipe32 __user *up) { compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data); @@ -797,8 +798,8 @@ static int put_atomisp_acc_fw_load_to_pipe32( } static int get_atomisp_sensor_ae_bracketing_lut( - struct atomisp_sensor_ae_bracketing_lut *kp, - struct atomisp_sensor_ae_bracketing_lut32 __user *up) + struct atomisp_sensor_ae_bracketing_lut *kp, + struct atomisp_sensor_ae_bracketing_lut32 __user *up) { compat_uptr_t lut; @@ -822,7 +823,7 @@ static long native_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } static long atomisp_do_compat_ioctl(struct file *file, - unsigned int cmd, unsigned long arg) + unsigned int cmd, unsigned long arg) { union { struct atomisp_histogram his; @@ -996,7 +997,7 @@ static long atomisp_do_compat_ioctl(struct file *file, break; case ATOMISP_IOC_G_METADATA_BY_TYPE: err = get_atomisp_metadata_by_type_stat32(&karg.md_with_type, - up); + up); break; case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: err = get_atomisp_sensor_ae_bracketing_lut(&karg.lut, up); @@ -1058,7 +1059,7 @@ static long atomisp_do_compat_ioctl(struct file *file, break; case ATOMISP_IOC_G_METADATA_BY_TYPE: err = put_atomisp_metadata_by_type_stat32(&karg.md_with_type, - up); + up); break; } @@ -1168,9 +1169,9 @@ long atomisp_compat_ioctl32(struct file *file, default: dev_warn(isp->dev, - "%s: unknown ioctl '%c', dir=%d, #%d (0x%08x)\n", - __func__, _IOC_TYPE(cmd), _IOC_DIR(cmd), _IOC_NR(cmd), - cmd); + "%s: unknown ioctl '%c', dir=%d, #%d (0x%08x)\n", + __func__, _IOC_TYPE(cmd), _IOC_DIR(cmd), _IOC_NR(cmd), + cmd); break; } return ret; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h index 6091ac58b0063..7e59ccb88a2e3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h @@ -241,12 +241,14 @@ struct atomisp_parameters32 { compat_uptr_t tnr_2500_config; /* Skylake: TNR config */ compat_uptr_t dpc_2500_config; /* Skylake: DPC config */ compat_uptr_t awb_2500_config; /* Skylake: auto white balance config */ - compat_uptr_t awb_fr_2500_config; /* Skylake: auto white balance filter response config */ + compat_uptr_t + awb_fr_2500_config; /* Skylake: auto white balance filter response config */ compat_uptr_t anr_2500_config; /* Skylake: ANR config */ compat_uptr_t af_2500_config; /* Skylake: auto focus config */ compat_uptr_t ae_2500_config; /* Skylake: auto exposure config */ compat_uptr_t bds_2500_config; /* Skylake: bayer downscaler config */ - compat_uptr_t dvs_2500_config; /* Skylake: digital video stabilization config */ + compat_uptr_t + dvs_2500_config; /* Skylake: digital video stabilization config */ compat_uptr_t res_mgr_2500_config; /* diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c index 0fce3d6bfdd36..b9afeb5d78dec 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c @@ -22,14 +22,13 @@ #include "atomisp-regs.h" static struct v4l2_mbus_framefmt *__csi2_get_format(struct - atomisp_mipi_csi2_device - * csi2, - struct - v4l2_subdev_pad_config * cfg, - enum - v4l2_subdev_format_whence - which, unsigned int pad) -{ + atomisp_mipi_csi2_device + * csi2, + struct + v4l2_subdev_pad_config *cfg, + enum + v4l2_subdev_format_whence + which, unsigned int pad) { if (which == V4L2_SUBDEV_FORMAT_TRY) return v4l2_subdev_get_try_format(&csi2->subdev, cfg, pad); else @@ -91,7 +90,7 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd); struct v4l2_mbus_framefmt *actual_ffmt = #ifndef ISP2401 - __csi2_get_format(csi2, cfg, which, pad); + __csi2_get_format(csi2, cfg, which, pad); #else __csi2_get_format(csi2, cfg, which, pad); #endif @@ -107,11 +106,11 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, actual_ffmt->code = atomisp_in_fmt_conv[0].code; actual_ffmt->width = clamp_t( - u32, ffmt->width, ATOM_ISP_MIN_WIDTH, - ATOM_ISP_MAX_WIDTH); + u32, ffmt->width, ATOM_ISP_MIN_WIDTH, + ATOM_ISP_MAX_WIDTH); actual_ffmt->height = clamp_t( - u32, ffmt->height, ATOM_ISP_MIN_HEIGHT, - ATOM_ISP_MAX_HEIGHT); + u32, ffmt->height, ATOM_ISP_MIN_HEIGHT, + ATOM_ISP_MAX_HEIGHT); tmp_ffmt = *ffmt = *actual_ffmt; @@ -122,9 +121,9 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, /* FIXME: DPCM decompression */ *actual_ffmt = *ffmt = #ifndef ISP2401 - *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); + *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); #else - *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); + *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); #endif return 0; @@ -194,8 +193,8 @@ static const struct v4l2_subdev_ops csi2_ops = { * return -EINVAL or zero on success */ static int csi2_link_setup(struct media_entity *entity, - const struct media_pad *local, - const struct media_pad *remote, u32 flags) + const struct media_pad *local, + const struct media_pad *remote, u32 flags) { struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd); @@ -235,7 +234,7 @@ static const struct media_entity_operations csi2_media_ops = { * return -ENOMEM or zero on success */ static int mipi_csi2_init_entities(struct atomisp_mipi_csi2_device *csi2, - int port) + int port) { struct v4l2_subdev *sd = &csi2->subdev; struct media_pad *pads = csi2->pads; @@ -258,7 +257,7 @@ static int mipi_csi2_init_entities(struct atomisp_mipi_csi2_device *csi2, return ret; csi2->formats[CSI2_PAD_SINK].code = - csi2->formats[CSI2_PAD_SOURCE].code = + csi2->formats[CSI2_PAD_SOURCE].code = atomisp_in_fmt_conv[0].code; return 0; @@ -272,7 +271,7 @@ atomisp_mipi_csi2_unregister_entities(struct atomisp_mipi_csi2_device *csi2) } int atomisp_mipi_csi2_register_entities(struct atomisp_mipi_csi2_device *csi2, - struct v4l2_device *vdev) + struct v4l2_device *vdev) { int ret; @@ -379,7 +378,7 @@ static void atomisp_csi2_configure_isp2401(struct atomisp_sub_device *asd) int n; mipi_info = atomisp_to_sensor_mipi_info( - isp->inputs[asd->input_curr].camera); + isp->inputs[asd->input_curr].camera); port = mipi_info->port; ctrl.id = V4L2_CID_LINK_FREQ; @@ -388,13 +387,13 @@ static void atomisp_csi2_configure_isp2401(struct atomisp_sub_device *asd) mipi_freq = ctrl.value; clk_termen = atomisp_csi2_configure_calc(coeff_clk_termen, - mipi_freq, TERMEN_DEFAULT); + mipi_freq, TERMEN_DEFAULT); clk_settle = atomisp_csi2_configure_calc(coeff_clk_settle, - mipi_freq, SETTLE_DEFAULT); + mipi_freq, SETTLE_DEFAULT); dat_termen = atomisp_csi2_configure_calc(coeff_dat_termen, - mipi_freq, TERMEN_DEFAULT); + mipi_freq, TERMEN_DEFAULT); dat_settle = atomisp_csi2_configure_calc(coeff_dat_settle, - mipi_freq, SETTLE_DEFAULT); + mipi_freq, SETTLE_DEFAULT); for (n = 0; n < csi2_port_lanes[port] + 1; n++) { hrt_address base = csi2_port_base[port] + csi2_lane_base[n]; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h index ccd5f08f7575f..739c26f0807a9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h @@ -42,15 +42,16 @@ struct atomisp_mipi_csi2_device { u32 output; /* output direction */ }; -int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, +int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, unsigned int which, uint16_t pad, struct v4l2_mbus_framefmt *ffmt); int atomisp_mipi_csi2_init(struct atomisp_device *isp); void atomisp_mipi_csi2_cleanup(struct atomisp_device *isp); void atomisp_mipi_csi2_unregister_entities( - struct atomisp_mipi_csi2_device *csi2); + struct atomisp_mipi_csi2_device *csi2); int atomisp_mipi_csi2_register_entities(struct atomisp_mipi_csi2_device *csi2, - struct v4l2_device *vdev); + struct v4l2_device *vdev); void atomisp_csi2_configure(struct atomisp_sub_device *asd); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c index a431cc472bdfa..4a6ea021ddcc3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c @@ -54,7 +54,7 @@ static struct _iunit_debug iunit_debug = { }; static inline int iunit_dump_dbgopt(struct atomisp_device *isp, - unsigned int opt) + unsigned int opt) { int ret = 0; @@ -99,11 +99,11 @@ static ssize_t iunit_dbglvl_show(struct device_driver *drv, char *buf) } static ssize_t iunit_dbglvl_store(struct device_driver *drv, const char *buf, - size_t size) + size_t size) { if (kstrtouint(buf, 10, &iunit_debug.dbglvl) - || iunit_debug.dbglvl < 1 - || iunit_debug.dbglvl > 9) { + || iunit_debug.dbglvl < 1 + || iunit_debug.dbglvl > 9) { return -ERANGE; } atomisp_css_debug_set_dtrace_level(iunit_debug.dbglvl); @@ -118,7 +118,7 @@ static ssize_t iunit_dbgfun_show(struct device_driver *drv, char *buf) } static ssize_t iunit_dbgfun_store(struct device_driver *drv, const char *buf, - size_t size) + size_t size) { unsigned int opt; int ret; @@ -142,7 +142,7 @@ static ssize_t iunit_dbgopt_show(struct device_driver *drv, char *buf) } static ssize_t iunit_dbgopt_store(struct device_driver *drv, const char *buf, - size_t size) + size_t size) { unsigned int opt; int ret; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c index 354a28ef129ae..4ab0390316cf5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c @@ -34,7 +34,7 @@ static void file_work(struct work_struct *work) { struct atomisp_file_device *file_dev = - container_of(work, struct atomisp_file_device, work); + container_of(work, struct atomisp_file_device, work); struct atomisp_device *isp = file_dev->isp; /* only support file injection on subdev0 */ struct atomisp_sub_device *asd = &isp->asd[0]; @@ -183,7 +183,7 @@ atomisp_file_input_unregister_entities(struct atomisp_file_device *file_dev) } int atomisp_file_input_register_entities(struct atomisp_file_device *file_dev, - struct v4l2_device *vdev) + struct v4l2_device *vdev) { /* Register the subdev and video nodes. */ return v4l2_device_register_subdev(vdev, &file_dev->sd); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h index 61fdeb5ee60a2..e38f8bc389f16 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h @@ -37,7 +37,7 @@ struct atomisp_file_device { void atomisp_file_input_cleanup(struct atomisp_device *isp); int atomisp_file_input_init(struct atomisp_device *isp); void atomisp_file_input_unregister_entities( - struct atomisp_file_device *file_dev); + struct atomisp_file_device *file_dev); int atomisp_file_input_register_entities(struct atomisp_file_device *file_dev, - struct v4l2_device *vdev); + struct v4l2_device *vdev); #endif /* __ATOMISP_FILE_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c index 4271a5cc8f662..2b855e7b61c8c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c @@ -87,16 +87,16 @@ static int atomisp_buf_prepare(struct videobuf_queue *vq, } static int atomisp_q_one_metadata_buffer(struct atomisp_sub_device *asd, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_pipe_id css_pipe_id) + enum atomisp_input_stream_id stream_id, + enum atomisp_css_pipe_id css_pipe_id) { struct atomisp_metadata_buf *metadata_buf; enum atomisp_metadata_type md_type = - atomisp_get_metadata_type(asd, css_pipe_id); + atomisp_get_metadata_type(asd, css_pipe_id); struct list_head *metadata_list; if (asd->metadata_bufs_in_css[stream_id][css_pipe_id] >= - ATOMISP_CSS_Q_DEPTH) + ATOMISP_CSS_Q_DEPTH) return 0; /* we have reached CSS queue depth */ if (!list_empty(&asd->metadata[md_type])) { @@ -105,7 +105,7 @@ static int atomisp_q_one_metadata_buffer(struct atomisp_sub_device *asd, metadata_list = &asd->metadata_ready[md_type]; } else { dev_warn(asd->isp->dev, "%s: No metadata buffers available for type %d!\n", - __func__, md_type); + __func__, md_type); return -EINVAL; } @@ -114,12 +114,12 @@ static int atomisp_q_one_metadata_buffer(struct atomisp_sub_device *asd, list_del_init(&metadata_buf->list); if (atomisp_q_metadata_buffer_to_css(asd, metadata_buf, - stream_id, css_pipe_id)) { + stream_id, css_pipe_id)) { list_add(&metadata_buf->list, metadata_list); return -EINVAL; } else { list_add_tail(&metadata_buf->list, - &asd->metadata_in_css[md_type]); + &asd->metadata_in_css[md_type]); } asd->metadata_bufs_in_css[stream_id][css_pipe_id]++; @@ -143,7 +143,7 @@ static int atomisp_q_one_s3a_buffer(struct atomisp_sub_device *asd, s3a_list = &asd->s3a_stats_ready; } else { dev_warn(asd->isp->dev, "%s: No s3a buffers available!\n", - __func__); + __func__); return -EINVAL; } @@ -161,7 +161,7 @@ static int atomisp_q_one_s3a_buffer(struct atomisp_sub_device *asd, list_add_tail(&s3a_buf->list, &asd->s3a_stats_in_css); if (s3a_list == &asd->s3a_stats_ready) dev_warn(asd->isp->dev, "%s: drop one s3a stat which has exp_id %d!\n", - __func__, exp_id); + __func__, exp_id); } asd->s3a_bufs_in_css[css_pipe_id]++; @@ -182,12 +182,12 @@ static int atomisp_q_one_dis_buffer(struct atomisp_sub_device *asd, if (list_empty(&asd->dis_stats)) { spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags); dev_warn(asd->isp->dev, "%s: No dis buffers available!\n", - __func__); + __func__); return -EINVAL; } dis_buf = list_entry(asd->dis_stats.prev, - struct atomisp_dis_buf, list); + struct atomisp_dis_buf, list); list_del_init(&dis_buf->list); spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags); @@ -211,15 +211,15 @@ static int atomisp_q_one_dis_buffer(struct atomisp_sub_device *asd, } int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd, - struct atomisp_video_pipe *pipe, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_buffer_type css_buf_type, - enum atomisp_css_pipe_id css_pipe_id) + struct atomisp_video_pipe *pipe, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id) { struct videobuf_vmalloc_memory *vm_mem; struct atomisp_css_params_with_list *param; struct atomisp_css_dvs_grid_info *dvs_grid = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); unsigned long irqflags; int err = 0; @@ -246,24 +246,24 @@ int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd, param = pipe->frame_params[vb->i]; if (param) { atomisp_makeup_css_parameters(asd, - &asd->params.css_param.update_flag, - ¶m->params); + &asd->params.css_param.update_flag, + ¶m->params); atomisp_apply_css_parameters(asd, ¶m->params); if (param->params.update_flag.dz_config && - asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { + asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) { err = atomisp_calculate_real_zoom_region(asd, ¶m->params.dz_config, css_pipe_id); if (!err) atomisp_css_set_dz_config(asd, - ¶m->params.dz_config); + ¶m->params.dz_config); } atomisp_css_set_isp_config_applied_frame(asd, - vm_mem->vaddr); + vm_mem->vaddr); atomisp_css_update_isp_params_on_pipe(asd, - asd->stream_env[stream_id].pipes[css_pipe_id]); + asd->stream_env[stream_id].pipes[css_pipe_id]); asd->params.dvs_6axis = (struct atomisp_css_dvs_6axis *) - param->params.dvs_6axis; + param->params.dvs_6axis; /* * WORKAROUND: @@ -274,49 +274,49 @@ int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd, * zoom region,I will set it to global setting. */ if (param->params.update_flag.dz_config && - asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO - && !err) { + asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO + && !err) { memcpy(&asd->params.css_param.dz_config, - ¶m->params.dz_config, - sizeof(struct ia_css_dz_config)); + ¶m->params.dz_config, + sizeof(struct ia_css_dz_config)); asd->params.css_param.update_flag.dz_config = - (struct atomisp_dz_config *) - &asd->params.css_param.dz_config; + (struct atomisp_dz_config *) + &asd->params.css_param.dz_config; asd->params.css_update_params_needed = true; } } /* Enqueue buffer */ err = atomisp_q_video_buffer_to_css(asd, vm_mem, stream_id, - css_buf_type, css_pipe_id); + css_buf_type, css_pipe_id); if (err) { spin_lock_irqsave(&pipe->irq_lock, irqflags); list_add_tail(&vb->queue, &pipe->activeq); vb->state = VIDEOBUF_QUEUED; spin_unlock_irqrestore(&pipe->irq_lock, irqflags); dev_err(asd->isp->dev, "%s, css q fails: %d\n", - __func__, err); + __func__, err); return -EINVAL; } pipe->buffers_in_css++; /* enqueue 3A/DIS/metadata buffers */ if (asd->params.curr_grid_info.s3a_grid.enable && - css_pipe_id == asd->params.s3a_enabled_pipe && - css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) + css_pipe_id == asd->params.s3a_enabled_pipe && + css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) atomisp_q_one_s3a_buffer(asd, stream_id, - css_pipe_id); + css_pipe_id); if (asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_info. - metadata_info.size && - css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) + metadata_info.size && + css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) atomisp_q_one_metadata_buffer(asd, stream_id, - css_pipe_id); + css_pipe_id); if (dvs_grid && dvs_grid->enable && - css_pipe_id == CSS_PIPE_ID_VIDEO && - css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) + css_pipe_id == CSS_PIPE_ID_VIDEO && + css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME) atomisp_q_one_dis_buffer(asd, stream_id, - css_pipe_id); + css_pipe_id); } return 0; @@ -329,7 +329,7 @@ static int atomisp_get_css_buf_type(struct atomisp_sub_device *asd, if (ATOMISP_USE_YUVPP(asd)) { /* when run ZSL case */ if (asd->continuous_mode->val && - asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { + asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) { if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) return CSS_BUFFER_TYPE_OUTPUT_FRAME; else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) @@ -340,7 +340,7 @@ static int atomisp_get_css_buf_type(struct atomisp_sub_device *asd, /*when run SDV case*/ if (asd->continuous_mode->val && - asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { + asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) { if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) return CSS_BUFFER_TYPE_OUTPUT_FRAME; else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW) @@ -387,26 +387,26 @@ static int atomisp_qbuffers_to_css_for_all_pipes(struct atomisp_sub_device *asd) video_pipe = &asd->video_out_video_capture; buf_type = atomisp_get_css_buf_type( - asd, css_preview_pipe_id, - atomisp_subdev_source_pad(&preview_pipe->vdev)); + asd, css_preview_pipe_id, + atomisp_subdev_source_pad(&preview_pipe->vdev)); input_stream_id = ATOMISP_INPUT_STREAM_PREVIEW; atomisp_q_video_buffers_to_css(asd, preview_pipe, input_stream_id, buf_type, css_preview_pipe_id); buf_type = atomisp_get_css_buf_type(asd, css_capture_pipe_id, - atomisp_subdev_source_pad(&capture_pipe->vdev)); + atomisp_subdev_source_pad(&capture_pipe->vdev)); input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; atomisp_q_video_buffers_to_css(asd, capture_pipe, - input_stream_id, - buf_type, css_capture_pipe_id); + input_stream_id, + buf_type, css_capture_pipe_id); buf_type = atomisp_get_css_buf_type(asd, css_video_pipe_id, - atomisp_subdev_source_pad(&video_pipe->vdev)); + atomisp_subdev_source_pad(&video_pipe->vdev)); input_stream_id = ATOMISP_INPUT_STREAM_VIDEO; atomisp_q_video_buffers_to_css(asd, video_pipe, - input_stream_id, - buf_type, css_video_pipe_id); + input_stream_id, + buf_type, css_video_pipe_id); return 0; } @@ -483,8 +483,8 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) if (capture_pipe) { buf_type = atomisp_get_css_buf_type( - asd, css_capture_pipe_id, - atomisp_subdev_source_pad(&capture_pipe->vdev)); + asd, css_capture_pipe_id, + atomisp_subdev_source_pad(&capture_pipe->vdev)); input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; /* @@ -500,8 +500,8 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) if (vf_pipe) { buf_type = atomisp_get_css_buf_type( - asd, css_capture_pipe_id, - atomisp_subdev_source_pad(&vf_pipe->vdev)); + asd, css_capture_pipe_id, + atomisp_subdev_source_pad(&vf_pipe->vdev)); if (asd->stream_env[ATOMISP_INPUT_STREAM_POSTVIEW].stream) input_stream_id = ATOMISP_INPUT_STREAM_POSTVIEW; else @@ -519,11 +519,11 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) if (preview_pipe) { buf_type = atomisp_get_css_buf_type( - asd, css_preview_pipe_id, - atomisp_subdev_source_pad(&preview_pipe->vdev)); + asd, css_preview_pipe_id, + atomisp_subdev_source_pad(&preview_pipe->vdev)); if (ATOMISP_SOC_CAMERA(asd) && css_preview_pipe_id == CSS_PIPE_ID_YUVPP) input_stream_id = ATOMISP_INPUT_STREAM_GENERAL; - /* else for ext isp use case */ + /* else for ext isp use case */ else if (css_preview_pipe_id == CSS_PIPE_ID_YUVPP) input_stream_id = ATOMISP_INPUT_STREAM_VIDEO; else if (asd->stream_env[ATOMISP_INPUT_STREAM_PREVIEW].stream) @@ -544,8 +544,8 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd) if (video_pipe) { buf_type = atomisp_get_css_buf_type( - asd, css_video_pipe_id, - atomisp_subdev_source_pad(&video_pipe->vdev)); + asd, css_video_pipe_id, + atomisp_subdev_source_pad(&video_pipe->vdev)); if (asd->stream_env[ATOMISP_INPUT_STREAM_VIDEO].stream) input_stream_id = ATOMISP_INPUT_STREAM_VIDEO; else @@ -676,10 +676,10 @@ static int atomisp_init_pipe(struct atomisp_video_pipe *pipe) INIT_LIST_HEAD(&pipe->buffers_waiting_for_param); INIT_LIST_HEAD(&pipe->per_frame_params); memset(pipe->frame_request_config_id, 0, - VIDEO_MAX_FRAME * sizeof(unsigned int)); + VIDEO_MAX_FRAME * sizeof(unsigned int)); memset(pipe->frame_params, 0, - VIDEO_MAX_FRAME * - sizeof(struct atomisp_css_params_with_list *)); + VIDEO_MAX_FRAME * + sizeof(struct atomisp_css_params_with_list *)); return 0; } @@ -927,8 +927,8 @@ static int atomisp_release(struct file *file) if (pipe->capq.streaming) dev_warn(isp->dev, - "%s: ISP still streaming while closing!", - __func__); + "%s: ISP still streaming while closing!", + __func__); if (pipe->capq.streaming && __atomisp_streamoff(file, NULL, V4L2_BUF_TYPE_VIDEO_CAPTURE)) { @@ -982,7 +982,7 @@ static int atomisp_release(struct file *file) atomisp_css_free_stat_buffers(asd); atomisp_free_internal_buffers(asd); ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - core, s_power, 0); + core, s_power, 0); if (ret) dev_warn(isp->dev, "Failed to power-off sensor\n"); @@ -1016,10 +1016,10 @@ static int atomisp_release(struct file *file) done: if (!acc_node) { atomisp_subdev_set_selection(&asd->subdev, fh.pad, - V4L2_SUBDEV_FORMAT_ACTIVE, - atomisp_subdev_source_pad(vdev), - V4L2_SEL_TGT_COMPOSE, 0, - &clear_compose); + V4L2_SUBDEV_FORMAT_ACTIVE, + atomisp_subdev_source_pad(vdev), + V4L2_SEL_TGT_COMPOSE, 0, + &clear_compose); } rt_mutex_unlock(&isp->mutex); mutex_unlock(&isp->streamoff_mutex); @@ -1053,7 +1053,7 @@ static int do_isp_mm_remap(struct atomisp_device *isp, } static int frame_mmap(struct atomisp_device *isp, - const struct atomisp_css_frame *frame, struct vm_area_struct *vma) + const struct atomisp_css_frame *frame, struct vm_area_struct *vma) { ia_css_ptr isp_virt; u32 host_virt; @@ -1075,12 +1075,12 @@ static int frame_mmap(struct atomisp_device *isp, } int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q, - struct vm_area_struct *vma) + struct vm_area_struct *vma) { u32 offset = vma->vm_pgoff << PAGE_SHIFT; int ret = -EINVAL, i; struct atomisp_device *isp = - ((struct atomisp_video_pipe *)(q->priv_data))->isp; + ((struct atomisp_video_pipe *)(q->priv_data))->isp; struct videobuf_vmalloc_memory *vm_mem; struct videobuf_mapping *map; @@ -1126,7 +1126,7 @@ int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q, * There is also padding on the right (padded_width - width). */ static int remove_pad_from_frame(struct atomisp_device *isp, - struct atomisp_css_frame *in_frame, __u32 width, __u32 height) + struct atomisp_css_frame *in_frame, __u32 width, __u32 height) { unsigned int i; unsigned short *buffer; @@ -1205,7 +1205,7 @@ static int atomisp_mmap(struct file *file, struct vm_area_struct *vma) } ret = remove_pad_from_frame(isp, raw_virt_addr, - pipe->pix.width, pipe->pix.height); + pipe->pix.width, pipe->pix.height); if (ret < 0) { dev_err(isp->dev, "remove pad failed.\n"); goto error; @@ -1258,7 +1258,7 @@ static int atomisp_file_mmap(struct file *file, struct vm_area_struct *vma) } static __poll_t atomisp_poll(struct file *file, - struct poll_table_struct *pt) + struct poll_table_struct *pt) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h index 2faab3429d439..e05e8f3a4442e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h @@ -22,10 +22,10 @@ #include "atomisp_subdev.h" int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd, - struct atomisp_video_pipe *pipe, - enum atomisp_input_stream_id stream_id, - enum atomisp_css_buffer_type css_buf_type, - enum atomisp_css_pipe_id css_pipe_id); + struct atomisp_video_pipe *pipe, + enum atomisp_input_stream_id stream_id, + enum atomisp_css_buffer_type css_buf_type, + enum atomisp_css_pipe_id css_pipe_id); unsigned int atomisp_dev_users(struct atomisp_device *isp); unsigned int atomisp_sub_dev_users(struct atomisp_sub_device *asd); @@ -35,7 +35,7 @@ unsigned int atomisp_sub_dev_users(struct atomisp_sub_device *asd); */ int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q, - struct vm_area_struct *vma); + struct vm_area_struct *vma); int atomisp_qbuf_to_css(struct atomisp_device *isp, struct atomisp_video_pipe *pipe, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h index a5412433835dd..8901d2f00c90b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h @@ -295,7 +295,7 @@ extern struct device *atomisp_dev; #define atomisp_is_wdt_running(a) timer_pending(&(a)->wdt) #ifdef ISP2401 void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, - unsigned int delay); + unsigned int delay); #endif void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay); #ifndef ISP2401 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c index d4eef9f76e6aa..13f8511aa67ca 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c @@ -282,7 +282,7 @@ static struct v4l2_queryctrl ci_v4l2_controls[] = { .name = "3a lock", .minimum = 0, .maximum = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE - | V4L2_LOCK_FOCUS, + | V4L2_LOCK_FOCUS, .step = 1, .default_value = 0, }, @@ -504,7 +504,7 @@ const struct atomisp_format_bridge atomisp_output_fmts[] = { }, #if 0 { - /* This is a custom format being used by M10MO to send the RAW data */ + /* This is a custom format being used by M10MO to send the RAW data */ .pixelformat = V4L2_PIX_FMT_CUSTOM_M10MO_RAW, .depth = 8, .mbus_code = V4L2_MBUS_FMT_CUSTOM_M10MO_RAW, @@ -515,7 +515,7 @@ const struct atomisp_format_bridge atomisp_output_fmts[] = { }; const struct atomisp_format_bridge *atomisp_get_format_bridge( - unsigned int pixelformat) + unsigned int pixelformat) { unsigned int i; @@ -528,7 +528,7 @@ const struct atomisp_format_bridge *atomisp_get_format_bridge( } const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus( - u32 mbus_code) + u32 mbus_code) { unsigned int i; @@ -560,7 +560,7 @@ static int atomisp_querycap(struct file *file, void *fh, strncpy(cap->bus_info, BUS_INFO, sizeof(cap->card) - 1); cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | - V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT; + V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT; cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; return 0; } @@ -569,7 +569,7 @@ static int atomisp_querycap(struct file *file, void *fh, * enum input are used to check primary/secondary camera */ static int atomisp_enum_input(struct file *file, void *fh, - struct v4l2_input *input) + struct v4l2_input *input) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -621,13 +621,13 @@ static int atomisp_enum_input(struct file *file, void *fh, } static unsigned int atomisp_subdev_streaming_count( - struct atomisp_sub_device *asd) + struct atomisp_sub_device *asd) { return asd->video_out_preview.capq.streaming - + asd->video_out_capture.capq.streaming - + asd->video_out_video_capture.capq.streaming - + asd->video_out_vf.capq.streaming - + asd->video_in.capq.streaming; + + asd->video_out_capture.capq.streaming + + asd->video_out_video_capture.capq.streaming + + asd->video_out_vf.capq.streaming + + asd->video_in.capq.streaming; } unsigned int atomisp_streaming_count(struct atomisp_device *isp) @@ -636,7 +636,7 @@ unsigned int atomisp_streaming_count(struct atomisp_device *isp) for (i = 0, sum = 0; i < isp->num_of_streams; i++) sum += isp->asd[i].streaming == - ATOMISP_DEVICE_STREAMING_ENABLED; + ATOMISP_DEVICE_STREAMING_ENABLED; return sum; } @@ -693,8 +693,8 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) */ if (isp->inputs[input].asd && isp->inputs[input].asd != asd) { dev_err(isp->dev, - "%s, camera is already used by stream: %d\n", __func__, - isp->inputs[input].asd->index); + "%s, camera is already used by stream: %d\n", __func__, + isp->inputs[input].asd->index); ret = -EBUSY; goto error; } @@ -708,7 +708,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) if (atomisp_subdev_streaming_count(asd)) { dev_err(isp->dev, - "ISP is still streaming, stop first\n"); + "ISP is still streaming, stop first\n"); ret = -EINVAL; goto error; } @@ -720,7 +720,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) core, s_power, 0); if (ret) dev_warn(isp->dev, - "Failed to power-off sensor\n"); + "Failed to power-off sensor\n"); /* clear the asd field to show this camera is not used */ isp->inputs[asd->input_curr].asd = NULL; } @@ -739,7 +739,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) /* select operating sensor */ ret = v4l2_subdev_call(isp->inputs[input].camera, video, s_routing, - 0, isp->inputs[input].sensor_index, 0); + 0, isp->inputs[input].sensor_index, 0); if (ret && (ret != -ENOIOCTLCMD)) { dev_err(isp->dev, "Failed to select sensor\n"); goto error; @@ -771,7 +771,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) } static int atomisp_enum_fmt_cap(struct file *file, void *fh, - struct v4l2_fmtdesc *f) + struct v4l2_fmtdesc *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -784,9 +784,10 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh, rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad, enum_mbus_code, NULL, &code); if (rval == -ENOIOCTLCMD) { - dev_warn(isp->dev, "enum_mbus_code pad op not supported. Please fix your sensor driver!\n"); - // rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - // video, enum_mbus_fmt, 0, &code.code); + dev_warn(isp->dev, + "enum_mbus_code pad op not supported. Please fix your sensor driver!\n"); + // rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + // video, enum_mbus_fmt, 0, &code.code); } rt_mutex_unlock(&isp->mutex); @@ -795,7 +796,7 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh, for (i = 0; i < ARRAY_SIZE(atomisp_output_fmts); i++) { const struct atomisp_format_bridge *format = - &atomisp_output_fmts[i]; + &atomisp_output_fmts[i]; /* * Is the atomisp-supported format is valid for the @@ -821,7 +822,7 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh, } static int atomisp_g_fmt_cap(struct file *file, void *fh, - struct v4l2_format *f) + struct v4l2_format *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -835,7 +836,7 @@ static int atomisp_g_fmt_cap(struct file *file, void *fh, } static int atomisp_g_fmt_file(struct file *file, void *fh, - struct v4l2_format *f) + struct v4l2_format *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -850,7 +851,7 @@ static int atomisp_g_fmt_file(struct file *file, void *fh, /* This function looks up the closest available resolution. */ static int atomisp_try_fmt_cap(struct file *file, void *fh, - struct v4l2_format *f) + struct v4l2_format *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -863,7 +864,7 @@ static int atomisp_try_fmt_cap(struct file *file, void *fh, } static int atomisp_s_fmt_cap(struct file *file, void *fh, - struct v4l2_format *f) + struct v4l2_format *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -881,7 +882,7 @@ static int atomisp_s_fmt_cap(struct file *file, void *fh, } static int atomisp_s_fmt_file(struct file *file, void *fh, - struct v4l2_format *f) + struct v4l2_format *f) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -925,7 +926,7 @@ static void atomisp_videobuf_free_queue(struct videobuf_queue *q) } int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, - uint16_t stream_id) + uint16_t stream_id) { struct atomisp_device *isp = asd->isp; struct atomisp_s3a_buf *s3a_buf = NULL, *_s3a_buf; @@ -933,11 +934,11 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, struct atomisp_metadata_buf *md_buf = NULL, *_md_buf; int count; struct atomisp_css_dvs_grid_info *dvs_grid_info = - atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); + atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); unsigned int i; if (list_empty(&asd->s3a_stats) && - asd->params.curr_grid_info.s3a_grid.enable) { + asd->params.curr_grid_info.s3a_grid.enable) { count = ATOMISP_CSS_Q_DEPTH + ATOMISP_S3A_BUF_QUEUE_DEPTH_FOR_HAL; dev_dbg(isp->dev, "allocating %d 3a buffers\n", count); @@ -947,7 +948,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, goto error; if (atomisp_css_allocate_stat_buffers( - asd, stream_id, s3a_buf, NULL, NULL)) { + asd, stream_id, s3a_buf, NULL, NULL)) { kfree(s3a_buf); goto error; } @@ -957,7 +958,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, } if (list_empty(&asd->dis_stats) && dvs_grid_info && - dvs_grid_info->enable) { + dvs_grid_info->enable) { count = ATOMISP_CSS_Q_DEPTH + 1; dev_dbg(isp->dev, "allocating %d dis buffers\n", count); while (count--) { @@ -967,7 +968,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, goto error; } if (atomisp_css_allocate_stat_buffers( - asd, stream_id, NULL, dis_buf, NULL)) { + asd, stream_id, NULL, dis_buf, NULL)) { kfree(dis_buf); goto error; } @@ -991,7 +992,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, goto error; if (atomisp_css_allocate_stat_buffers( - asd, stream_id, NULL, NULL, md_buf)) { + asd, stream_id, NULL, NULL, md_buf)) { kfree(md_buf); goto error; } @@ -1018,7 +1019,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) { list_for_each_entry_safe(md_buf, _md_buf, &asd->metadata[i], - list) { + list) { atomisp_css_free_metadata_buffer(md_buf); list_del(&md_buf->list); kfree(md_buf); @@ -1031,7 +1032,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, * Initiate Memory Mapping or User Pointer I/O */ int __atomisp_reqbufs(struct file *file, void *fh, - struct v4l2_requestbuffers *req) + struct v4l2_requestbuffers *req) { struct video_device *vdev = video_devdata(file); struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); @@ -1052,10 +1053,10 @@ int __atomisp_reqbufs(struct file *file, void *fh, mutex_unlock(&pipe->capq.vb_lock); /* clear request config id */ memset(pipe->frame_request_config_id, 0, - VIDEO_MAX_FRAME * sizeof(unsigned int)); + VIDEO_MAX_FRAME * sizeof(unsigned int)); memset(pipe->frame_params, 0, - VIDEO_MAX_FRAME * - sizeof(struct atomisp_css_params_with_list *)); + VIDEO_MAX_FRAME * + sizeof(struct atomisp_css_params_with_list *)); return 0; } @@ -1102,7 +1103,7 @@ int __atomisp_reqbufs(struct file *file, void *fh, } int atomisp_reqbufs(struct file *file, void *fh, - struct v4l2_requestbuffers *req) + struct v4l2_requestbuffers *req) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -1116,7 +1117,7 @@ int atomisp_reqbufs(struct file *file, void *fh, } static int atomisp_reqbufs_file(struct file *file, void *fh, - struct v4l2_requestbuffers *req) + struct v4l2_requestbuffers *req) { struct video_device *vdev = video_devdata(file); struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); @@ -1133,7 +1134,7 @@ static int atomisp_reqbufs_file(struct file *file, void *fh, /* application query the status of a buffer */ static int atomisp_querybuf(struct file *file, void *fh, - struct v4l2_buffer *buf) + struct v4l2_buffer *buf) { struct video_device *vdev = video_devdata(file); struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); @@ -1142,7 +1143,7 @@ static int atomisp_querybuf(struct file *file, void *fh, } static int atomisp_querybuf_file(struct file *file, void *fh, - struct v4l2_buffer *buf) + struct v4l2_buffer *buf) { struct video_device *vdev = video_devdata(file); struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); @@ -1178,13 +1179,13 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) if (asd->streaming == ATOMISP_DEVICE_STREAMING_STOPPING) { dev_err(isp->dev, "%s: reject, as ISP at stopping.\n", - __func__); + __func__); ret = -EIO; goto error; } if (!buf || buf->index >= VIDEO_MAX_FRAME || - !pipe->capq.bufs[buf->index]) { + !pipe->capq.bufs[buf->index]) { dev_err(isp->dev, "Invalid index for qbuf.\n"); ret = -EINVAL; goto error; @@ -1211,7 +1212,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) goto done; if (atomisp_get_css_frame_info(asd, - atomisp_subdev_source_pad(vdev), &frame_info)) { + atomisp_subdev_source_pad(vdev), &frame_info)) { ret = -EIO; goto error; } @@ -1220,28 +1221,28 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) #ifdef CONFIG_ION #ifndef ISP2401 attributes.type = buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_ION - ? HRT_USR_ION : HRT_USR_PTR; + ? HRT_USR_ION : HRT_USR_PTR; #else if (buf->reserved & ATOMISP_BUFFER_TYPE_IS_ION) { attributes.type = HRT_USR_ION; if (asd->ion_dev_fd->val != ION_FD_UNSET) { dev_dbg(isp->dev, "ION buffer queued, share_fd=%lddev_fd=%d.\n", - buf->m.userptr, asd->ion_dev_fd->val); + buf->m.userptr, asd->ion_dev_fd->val); /* * Make sure the shared fd we just got * from user space isn't larger than * the space we have for it. */ if ((buf->m.userptr & - (ATOMISP_ION_DEVICE_FD_MASK)) != 0) { + (ATOMISP_ION_DEVICE_FD_MASK)) != 0) { dev_err(isp->dev, - "Error: v4l2 buffer fd:0X%0lX > 0XFFFF.\n", - buf->m.userptr); + "Error: v4l2 buffer fd:0X%0lX > 0XFFFF.\n", + buf->m.userptr); ret = -EINVAL; goto error; } buf->m.userptr |= asd->ion_dev_fd->val << - ATOMISP_ION_DEVICE_FD_OFFSET; + ATOMISP_ION_DEVICE_FD_OFFSET; } else { dev_err(isp->dev, "v4l2 buffer type is ION, \ but no dev fd set from userspace.\n"); @@ -1256,8 +1257,8 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) attributes.type = HRT_USR_PTR; #endif ret = atomisp_css_frame_map(&handle, &frame_info, - (void __user *)buf->m.userptr, - 0, &attributes); + (void __user *)buf->m.userptr, + 0, &attributes); if (ret) { dev_err(isp->dev, "Failed to map user buffer\n"); goto error; @@ -1290,8 +1291,9 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) (buf->reserved2 & ATOMISP_BUFFER_HAS_PER_FRAME_SETTING)) { /* this buffer will have a per-frame parameter */ pipe->frame_request_config_id[buf->index] = buf->reserved2 & - ~ATOMISP_BUFFER_HAS_PER_FRAME_SETTING; - dev_dbg(isp->dev, "This buffer requires per_frame setting which has isp_config_id %d\n", + ~ATOMISP_BUFFER_HAS_PER_FRAME_SETTING; + dev_dbg(isp->dev, + "This buffer requires per_frame setting which has isp_config_id %d\n", pipe->frame_request_config_id[buf->index]); } else { pipe->frame_request_config_id[buf->index] = 0; @@ -1318,7 +1320,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) atomisp_wdt_start(asd); #else if (!atomisp_is_wdt_running(pipe) && - atomisp_buffers_queued_pipe(pipe)) + atomisp_buffers_queued_pipe(pipe)) atomisp_wdt_start(pipe); #endif } @@ -1341,7 +1343,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) asd->pending_capture_request++; dev_dbg(isp->dev, "Add one pending capture request.\n"); #else - if (asd->re_trigger_capture) { + if (asd->re_trigger_capture) { ret = atomisp_css_offline_capture_configure(asd, asd->params.offline_parm.num_captures, asd->params.offline_parm.skip_frames, @@ -1350,11 +1352,11 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n", __func__, ret); - } else { + } else { asd->pending_capture_request++; asd->re_trigger_capture = false; dev_dbg(isp->dev, "Add one pending capture request.\n"); - } + } #endif } rt_mutex_unlock(&isp->mutex); @@ -1370,7 +1372,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) } static int atomisp_qbuf_file(struct file *file, void *fh, - struct v4l2_buffer *buf) + struct v4l2_buffer *buf) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -1384,7 +1386,7 @@ static int atomisp_qbuf_file(struct file *file, void *fh, } if (!buf || buf->index >= VIDEO_MAX_FRAME || - !pipe->outq.bufs[buf->index]) { + !pipe->outq.bufs[buf->index]) { dev_err(isp->dev, "Invalid index for qbuf.\n"); ret = -EINVAL; goto error; @@ -1412,7 +1414,7 @@ static int atomisp_qbuf_file(struct file *file, void *fh, } static int __get_frame_exp_id(struct atomisp_video_pipe *pipe, - struct v4l2_buffer *buf) + struct v4l2_buffer *buf) { struct videobuf_vmalloc_memory *vm_mem; struct atomisp_css_frame *handle; @@ -1449,7 +1451,7 @@ static int atomisp_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) if (asd->streaming == ATOMISP_DEVICE_STREAMING_STOPPING) { rt_mutex_unlock(&isp->mutex); dev_err(isp->dev, "%s: reject, as ISP at stopping.\n", - __func__); + __func__); return -EIO; } @@ -1476,7 +1478,8 @@ static int atomisp_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) buf->reserved2 = pipe->frame_config_id[buf->index]; rt_mutex_unlock(&isp->mutex); - dev_dbg(isp->dev, "dqbuf buffer %d (%s) for asd%d with exp_id %d, isp_config_id %d\n", + dev_dbg(isp->dev, + "dqbuf buffer %d (%s) for asd%d with exp_id %d, isp_config_id %d\n", buf->index, vdev->name, asd->index, buf->reserved >> 16, buf->reserved2); return 0; @@ -1515,7 +1518,7 @@ enum atomisp_css_pipe_id atomisp_get_css_pipe_id(struct atomisp_sub_device *asd) case ATOMISP_RUN_MODE_VIDEO: return CSS_PIPE_ID_VIDEO; case ATOMISP_RUN_MODE_STILL_CAPTURE: - /* fall through */ + /* fall through */ default: return CSS_PIPE_ID_CAPTURE; } @@ -1540,8 +1543,8 @@ static unsigned int atomisp_sensor_start_stream(struct atomisp_sub_device *asd) if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO || (asd->run_mode->val == ATOMISP_RUN_MODE_STILL_CAPTURE && !atomisp_is_mbuscode_raw( - asd->fmt[ - asd->capture_pad].fmt.code) && + asd->fmt[ + asd->capture_pad].fmt.code) && !asd->continuous_mode->val)) return 2; else @@ -1562,7 +1565,7 @@ int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, int sensor_index = isp->asd[i].input_curr; if (isp->inputs[sensor_index].camera_caps-> - sensor[isp->asd[i].sensor_curr].is_slave) + sensor[isp->asd[i].sensor_curr].is_slave) slave = sensor_index; else master = sensor_index; @@ -1612,11 +1615,11 @@ int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, /* FIXME! */ #ifndef ISP2401 static void __wdt_on_master_slave_sensor(struct atomisp_device *isp, - unsigned int wdt_duration) + unsigned int wdt_duration) #else static void __wdt_on_master_slave_sensor(struct atomisp_video_pipe *pipe, - unsigned int wdt_duration, - bool enable) + unsigned int wdt_duration, + bool enable) #endif { #ifndef ISP2401 @@ -1649,7 +1652,7 @@ static void atomisp_pause_buffer_event(struct atomisp_device *isp) int sensor_index = isp->asd[i].input_curr; if (isp->inputs[sensor_index].camera_caps-> - sensor[isp->asd[i].sensor_curr].is_slave) { + sensor[isp->asd[i].sensor_curr].is_slave) { v4l2_event_queue(isp->asd[i].subdev.devnode, &event); break; } @@ -1678,7 +1681,7 @@ static void atomisp_dma_burst_len_cfg(struct atomisp_sub_device *asd) * This ioctl start the capture during streaming I/O. */ static int atomisp_streamon(struct file *file, void *fh, - enum v4l2_buf_type type) + enum v4l2_buf_type type) { struct video_device *vdev = video_devdata(file); struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev); @@ -1757,7 +1760,7 @@ static int atomisp_streamon(struct file *file, void *fh, flush_work(&asd->delayed_init_work); rt_mutex_unlock(&isp->mutex); if (wait_for_completion_interruptible( - &asd->init_done) != 0) + &asd->init_done) != 0) return -ERESTARTSYS; rt_mutex_lock(&isp->mutex); } @@ -1810,7 +1813,7 @@ static int atomisp_streamon(struct file *file, void *fh, atomisp_apply_css_parameters(asd, &asd->params.css_param); if (asd->params.css_param.update_flag.dz_config) atomisp_css_set_dz_config(asd, - &asd->params.css_param.dz_config); + &asd->params.css_param.dz_config); atomisp_css_update_isp_params(asd); asd->params.css_update_params_needed = false; memset(&asd->params.css_param.update_flag, 0, @@ -1852,7 +1855,7 @@ static int atomisp_streamon(struct file *file, void *fh, if (!isp->sw_contex.file_input) { atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF, - atomisp_css_valid_sof(isp)); + atomisp_css_valid_sof(isp)); atomisp_csi2_configure(asd); /* * set freq to max when streaming count > 1 which indicate @@ -1860,11 +1863,11 @@ static int atomisp_streamon(struct file *file, void *fh, */ if (atomisp_streaming_count(isp) > 1) { if (atomisp_freq_scaling(isp, - ATOMISP_DFS_MODE_MAX, false) < 0) + ATOMISP_DFS_MODE_MAX, false) < 0) dev_dbg(isp->dev, "dfs failed!\n"); } else { if (atomisp_freq_scaling(isp, - ATOMISP_DFS_MODE_AUTO, false) < 0) + ATOMISP_DFS_MODE_AUTO, false) < 0) dev_dbg(isp->dev, "dfs failed!\n"); } } else { @@ -1873,7 +1876,7 @@ static int atomisp_streamon(struct file *file, void *fh, } if (asd->depth_mode->val && atomisp_streaming_count(isp) == - ATOMISP_DEPTH_SENSOR_STREAMON_COUNT) { + ATOMISP_DEPTH_SENSOR_STREAMON_COUNT) { ret = atomisp_stream_on_master_slave_sensor(isp, false); if (ret) { dev_err(isp->dev, "master slave sensor stream on failed!\n"); @@ -1886,7 +1889,7 @@ static int atomisp_streamon(struct file *file, void *fh, #endif goto start_delay_wq; } else if (asd->depth_mode->val && (atomisp_streaming_count(isp) < - ATOMISP_DEPTH_SENSOR_STREAMON_COUNT)) { + ATOMISP_DEPTH_SENSOR_STREAMON_COUNT)) { #ifdef ISP2401 __wdt_on_master_slave_sensor(pipe, wdt_duration, false); #endif @@ -1895,7 +1898,7 @@ static int atomisp_streamon(struct file *file, void *fh, /* Enable the CSI interface on ANN B0/K0 */ if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 << - ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) { + ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) { pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL, isp->saved_regs.csi_control | MRFLD_PCI_CSI_CONTROL_CSI_READY); @@ -1923,14 +1926,14 @@ static int atomisp_streamon(struct file *file, void *fh, struct v4l2_mbus_framefmt *sink; sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL, - V4L2_SUBDEV_FORMAT_ACTIVE, - ATOMISP_SUBDEV_PAD_SINK); + V4L2_SUBDEV_FORMAT_ACTIVE, + ATOMISP_SUBDEV_PAD_SINK); reinit_completion(&asd->init_done); asd->delayed_init = ATOMISP_DELAYED_INIT_QUEUED; queue_work(asd->delayed_init_workq, &asd->delayed_init_work); atomisp_css_set_cont_prev_start_time(isp, - ATOMISP_CALC_CSS_PREV_OVERLAP(sink->height)); + ATOMISP_CALC_CSS_PREV_OVERLAP(sink->height)); } else { asd->delayed_init = ATOMISP_DELAYED_INIT_NOT_QUEUED; } @@ -1971,20 +1974,20 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) * case of continuous capture */ if ((asd->continuous_mode->val || - isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) && + isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) && atomisp_subdev_source_pad(vdev) != - ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && + ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW && atomisp_subdev_source_pad(vdev) != - ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { + ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) { if (isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) { v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - video, s_stream, 0); + video, s_stream, 0); } else if (atomisp_subdev_source_pad(vdev) - == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) { + == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) { /* stop continuous still capture if needed */ if (asd->params.offline_parm.num_captures == -1) atomisp_css_offline_capture_configure(asd, - 0, 0, 0); + 0, 0, 0); atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_AUTO, false); } /* @@ -2035,7 +2038,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) */ if (isp->sw_contex.file_input) v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - video, s_stream, 0); + video, s_stream, 0); rt_mutex_lock(&isp->mutex); atomisp_acc_unload_extensions(asd); @@ -2057,7 +2060,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) if (!isp->sw_contex.file_input) atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF, - false); + false); if (asd->delayed_init == ATOMISP_DELAYED_INIT_QUEUED) { cancel_work_sync(&asd->delayed_init_work); @@ -2127,7 +2130,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) /* Disable the CSI interface on ANN B0/K0 */ if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 << - ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) { + ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) { pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL, isp->saved_regs.csi_control & ~MRFLD_PCI_CSI_CONTROL_CSI_READY); @@ -2157,14 +2160,14 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) for (i = 0; i < isp->num_of_streams; i++) { if (isp->asd[i].stream_prepared) { atomisp_destroy_pipes_stream_force(&isp-> - asd[i]); + asd[i]); recreate_streams[i] = true; } } /* disable PUNIT/ISP acknowlede/handshake - SRSE=3 */ pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control | - MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK); + MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK); dev_err(isp->dev, "atomisp_reset"); atomisp_reset(isp); for (i = 0; i < isp->num_of_streams; i++) { @@ -2198,7 +2201,7 @@ static int atomisp_streamoff(struct file *file, void *fh, * call this ioctl with a pointer to this structure */ static int atomisp_g_ctrl(struct file *file, void *fh, - struct v4l2_control *control) + struct v4l2_control *control) { struct video_device *vdev = video_devdata(file); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; @@ -2400,7 +2403,7 @@ static int atomisp_queryctl(struct file *file, void *fh, } static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, - struct v4l2_ext_controls *c) + struct v4l2_ext_controls *c) { struct video_device *vdev = video_devdata(file); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; @@ -2475,8 +2478,8 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, break; case V4L2_CID_G_SKIP_FRAMES: ret = v4l2_subdev_call( - isp->inputs[asd->input_curr].camera, - sensor, g_skip_frames, (u32 *)&ctrl.value); + isp->inputs[asd->input_curr].camera, + sensor, g_skip_frames, (u32 *)&ctrl.value); break; default: ret = -EINVAL; @@ -2493,7 +2496,7 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, /* This ioctl allows the application to get multiple controls by class */ static int atomisp_g_ext_ctrls(struct file *file, void *fh, - struct v4l2_ext_controls *c) + struct v4l2_ext_controls *c) { struct v4l2_control ctrl; int i, ret = 0; @@ -2518,7 +2521,7 @@ static int atomisp_g_ext_ctrls(struct file *file, void *fh, } static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, - struct v4l2_ext_controls *c) + struct v4l2_ext_controls *c) { struct video_device *vdev = video_devdata(file); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; @@ -2589,7 +2592,7 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, * flash state */ if (ctrl.id == V4L2_CID_FLASH_MODE) { asd->params.flash_state = - ATOMISP_FLASH_IDLE; + ATOMISP_FLASH_IDLE; asd->params.num_flash_frames = 0; } } @@ -2619,7 +2622,7 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, /* This ioctl allows the application to set multiple controls by class */ static int atomisp_s_ext_ctrls(struct file *file, void *fh, - struct v4l2_ext_controls *c) + struct v4l2_ext_controls *c) { struct v4l2_control ctrl; int i, ret = 0; @@ -2647,7 +2650,7 @@ static int atomisp_s_ext_ctrls(struct file *file, void *fh, * vidioc_g/s_param are used to switch isp running mode */ static int atomisp_g_parm(struct file *file, void *fh, - struct v4l2_streamparm *parm) + struct v4l2_streamparm *parm) { struct video_device *vdev = video_devdata(file); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; @@ -2666,7 +2669,7 @@ static int atomisp_g_parm(struct file *file, void *fh, } static int atomisp_s_parm(struct file *file, void *fh, - struct v4l2_streamparm *parm) + struct v4l2_streamparm *parm) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -2728,7 +2731,7 @@ static int atomisp_s_parm(struct file *file, void *fh, } static int atomisp_s_parm_file(struct file *file, void *fh, - struct v4l2_streamparm *parm) + struct v4l2_streamparm *parm) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -2746,7 +2749,7 @@ static int atomisp_s_parm_file(struct file *file, void *fh, } static long atomisp_vidioc_default(struct file *file, void *fh, - bool valid_prio, unsigned int cmd, void *arg) + bool valid_prio, unsigned int cmd, void *arg) { struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); @@ -2837,14 +2840,14 @@ static long atomisp_vidioc_default(struct file *file, void *fh, case ATOMISP_IOC_S_DIS_COEFS: err = atomisp_css_cp_dvs2_coefs(asd, arg, - &asd->params.css_param, true); + &asd->params.css_param, true); if (!err && arg) asd->params.css_update_params_needed = true; break; case ATOMISP_IOC_S_DIS_VECTOR: err = atomisp_cp_dvs_6axis_config(asd, arg, - &asd->params.css_param, true); + &asd->params.css_param, true); if (!err && arg) asd->params.css_update_params_needed = true; break; @@ -2945,17 +2948,17 @@ static long atomisp_vidioc_default(struct file *file, void *fh, #endif #ifndef ISP2401 err = v4l2_subdev_call( - isp->inputs[asd->input_curr].motor, - core, ioctl, cmd, arg); + isp->inputs[asd->input_curr].motor, + core, ioctl, cmd, arg); #else err = v4l2_subdev_call( - isp->motor, - core, ioctl, cmd, arg); + isp->motor, + core, ioctl, cmd, arg); #endif else err = v4l2_subdev_call( - isp->inputs[asd->input_curr].camera, - core, ioctl, cmd, arg); + isp->inputs[asd->input_curr].camera, + core, ioctl, cmd, arg); break; case ATOMISP_IOC_S_EXPOSURE: @@ -2969,7 +2972,7 @@ static long atomisp_vidioc_default(struct file *file, void *fh, case ATOMISP_IOC_G_UPDATE_EXPOSURE: #endif err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - core, ioctl, cmd, arg); + core, ioctl, cmd, arg); break; case ATOMISP_IOC_ACC_LOAD: @@ -3031,7 +3034,7 @@ static long atomisp_vidioc_default(struct file *file, void *fh, break; case ATOMISP_IOC_EXT_ISP_CTRL: err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, - core, ioctl, cmd, arg); + core, ioctl, cmd, arg); break; case ATOMISP_IOC_EXP_ID_UNLOCK: err = atomisp_exp_id_unlock(asd, arg); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h index 0d2785b9ef990..1f87d8f00c4a1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h @@ -28,27 +28,27 @@ struct atomisp_video_pipe; extern const struct atomisp_format_bridge atomisp_output_fmts[]; const struct atomisp_format_bridge *atomisp_get_format_bridge( - unsigned int pixelformat); + unsigned int pixelformat); #ifndef ISP2401 const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus( - u32 mbus_code); + u32 mbus_code); #else const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus(u32 - mbus_code); + mbus_code); #endif int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, - uint16_t stream_id); + uint16_t stream_id); int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type); int __atomisp_reqbufs(struct file *file, void *fh, - struct v4l2_requestbuffers *req); + struct v4l2_requestbuffers *req); int atomisp_reqbufs(struct file *file, void *fh, - struct v4l2_requestbuffers *req); + struct v4l2_requestbuffers *req); enum atomisp_css_pipe_id atomisp_get_css_pipe_id(struct atomisp_sub_device - *asd); + *asd); void atomisp_videobuf_free_buf(struct videobuf_buffer *vb); @@ -65,5 +65,6 @@ unsigned int atomisp_is_acc_enabled(struct atomisp_device *isp); long atomisp_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg); -int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, bool isp_timeout); +int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, + bool isp_timeout); #endif /* __ATOMISP_IOCTL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c index b92d3bf593a00..7dc19e038faa0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c @@ -101,7 +101,7 @@ const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv(u32 code) } const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt( - enum atomisp_input_format atomisp_in_fmt) + enum atomisp_input_format atomisp_in_fmt) { int i; @@ -124,7 +124,7 @@ bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd, V4L2_SUBDEV_FORMAT_ACTIVE, source_pad); return atomisp_is_mbuscode_raw(sink->code) - && !atomisp_is_mbuscode_raw(src->code); + && !atomisp_is_mbuscode_raw(src->code); } uint16_t atomisp_subdev_source_pad(struct video_device *vdev) @@ -154,7 +154,7 @@ uint16_t atomisp_subdev_source_pad(struct video_device *vdev) * Return 0 on success or a negative error code otherwise. */ static long isp_subdev_ioctl(struct v4l2_subdev *sd, - unsigned int cmd, void *arg) + unsigned int cmd, void *arg) { return 0; } @@ -189,7 +189,7 @@ static int isp_subdev_subscribe_event(struct v4l2_subdev *sd, return -EINVAL; if (sub->type == V4L2_EVENT_FRAME_SYNC && - !atomisp_css_valid_sof(isp)) + !atomisp_css_valid_sof(isp)) return -EINVAL; return v4l2_event_subscribe(fh, sub, 16, NULL); @@ -243,9 +243,9 @@ static int isp_subdev_validate_rect(struct v4l2_subdev *sd, uint32_t pad, } struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd, - struct v4l2_subdev_pad_config *cfg, - u32 which, uint32_t pad, - uint32_t target) + struct v4l2_subdev_pad_config *cfg, + u32 which, uint32_t pad, + uint32_t target) { struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); @@ -305,7 +305,7 @@ static void isp_subdev_propagate(struct v4l2_subdev *sd, { struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM]; struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM], - *comp[ATOMISP_SUBDEV_PADS_NUM]; + *comp[ATOMISP_SUBDEV_PADS_NUM]; if (flags & V4L2_SEL_FLAG_KEEP_CONFIG) return; @@ -338,7 +338,7 @@ static int isp_subdev_get_selection(struct v4l2_subdev *sd, return rval; rec = atomisp_subdev_get_rect(sd, cfg, sel->which, sel->pad, - sel->target); + sel->target); if (!rec) return -EINVAL; @@ -350,7 +350,8 @@ static char *atomisp_pad_str[] = { "ATOMISP_SUBDEV_PAD_SINK", "ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE", "ATOMISP_SUBDEV_PAD_SOURCE_VF", "ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW", - "ATOMISP_SUBDEV_PAD_SOURCE_VIDEO"}; + "ATOMISP_SUBDEV_PAD_SOURCE_VIDEO" + }; int atomisp_subdev_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, @@ -362,7 +363,7 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM]; u16 vdev_pad = atomisp_subdev_source_pad(sd->devnode); struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM], - *comp[ATOMISP_SUBDEV_PADS_NUM]; + *comp[ATOMISP_SUBDEV_PADS_NUM]; enum atomisp_input_stream_id stream_id; unsigned int i; unsigned int padding_w = pad_w; @@ -394,7 +395,7 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd, /* Workaround for BYT 1080p perfectshot since the maxinum resolution of * front camera ov2722 is 1932x1092 and cannot use pad_w > 12*/ if (!strncmp(isp->inputs[isp_sd->input_curr].camera->name, - "ov2722", 6) && crop[pad]->height == 1092) { + "ov2722", 6) && crop[pad]->height == 1092) { padding_w = 12; padding_h = 12; } @@ -436,8 +437,8 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd, struct v4l2_rect tmp = *crop[pad]; atomisp_subdev_set_selection( - sd, cfg, which, i, V4L2_SEL_TGT_COMPOSE, - flags, &tmp); + sd, cfg, which, i, V4L2_SEL_TGT_COMPOSE, + flags, &tmp); } } @@ -463,7 +464,7 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd, atomisp_css_video_set_dis_envelope(isp_sd, dvs_w, dvs_h); atomisp_css_input_set_effective_resolution(isp_sd, stream_id, - crop[pad]->width, crop[pad]->height); + crop[pad]->width, crop[pad]->height); break; } @@ -487,8 +488,8 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd, comp[pad]->height = r->height; if (r->width == 0 || r->height == 0 || - crop[ATOMISP_SUBDEV_PAD_SINK]->width == 0 || - crop[ATOMISP_SUBDEV_PAD_SINK]->height == 0) + crop[ATOMISP_SUBDEV_PAD_SINK]->width == 0 || + crop[ATOMISP_SUBDEV_PAD_SINK]->height == 0) break; /* * do cropping on sensor input if ratio of required resolution @@ -505,20 +506,20 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd, * */ if (r->width * crop[ATOMISP_SUBDEV_PAD_SINK]->height < - crop[ATOMISP_SUBDEV_PAD_SINK]->width * r->height) + crop[ATOMISP_SUBDEV_PAD_SINK]->width * r->height) atomisp_css_input_set_effective_resolution(isp_sd, stream_id, rounddown(crop[ATOMISP_SUBDEV_PAD_SINK]-> - height * r->width / r->height, - ATOM_ISP_STEP_WIDTH), + height * r->width / r->height, + ATOM_ISP_STEP_WIDTH), crop[ATOMISP_SUBDEV_PAD_SINK]->height); else atomisp_css_input_set_effective_resolution(isp_sd, stream_id, crop[ATOMISP_SUBDEV_PAD_SINK]->width, rounddown(crop[ATOMISP_SUBDEV_PAD_SINK]-> - width * r->height / r->width, - ATOM_ISP_STEP_WIDTH)); + width * r->height / r->width, + ATOM_ISP_STEP_WIDTH)); break; } @@ -568,7 +569,7 @@ static int atomisp_get_sensor_bin_factor(struct atomisp_sub_device *asd) int ret; if (isp->inputs[asd->input_curr].type == FILE_INPUT || - isp->inputs[asd->input_curr].type == TEST_PATTERN) + isp->inputs[asd->input_curr].type == TEST_PATTERN) return 0; ctrl.id = V4L2_CID_BIN_FACTOR_HORZ; @@ -601,7 +602,7 @@ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); struct atomisp_device *isp = isp_sd->isp; struct v4l2_mbus_framefmt *__ffmt = - atomisp_subdev_get_ffmt(sd, cfg, which, pad); + atomisp_subdev_get_ffmt(sd, cfg, which, pad); u16 vdev_pad = atomisp_subdev_source_pad(sd->devnode); enum atomisp_input_stream_id stream_id; @@ -615,7 +616,7 @@ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, switch (pad) { case ATOMISP_SUBDEV_PAD_SINK: { const struct atomisp_in_fmt_conv *fc = - atomisp_find_in_fmt_conv(ffmt->code); + atomisp_find_in_fmt_conv(ffmt->code); if (!fc) { fc = atomisp_in_fmt_conv; @@ -631,14 +632,14 @@ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd, if (which == V4L2_SUBDEV_FORMAT_ACTIVE) { atomisp_css_input_set_resolution(isp_sd, - stream_id, ffmt); + stream_id, ffmt); atomisp_css_input_set_binning_factor(isp_sd, - stream_id, - atomisp_get_sensor_bin_factor(isp_sd)); + stream_id, + atomisp_get_sensor_bin_factor(isp_sd)); atomisp_css_input_set_bayer_order(isp_sd, stream_id, fc->bayer_order); atomisp_css_input_set_format(isp_sd, stream_id, - fc->css_stream_fmt); + fc->css_stream_fmt); atomisp_css_set_default_isys_config(isp_sd, stream_id, ffmt); } @@ -694,9 +695,9 @@ static int isp_subdev_set_format(struct v4l2_subdev *sd, /* V4L2 subdev core operations */ static const struct v4l2_subdev_core_ops isp_subdev_v4l2_core_ops = { - .ioctl = isp_subdev_ioctl, .s_power = isp_subdev_set_power, - .subscribe_event = isp_subdev_subscribe_event, - .unsubscribe_event = isp_subdev_unsubscribe_event, + .ioctl = isp_subdev_ioctl, .s_power = isp_subdev_set_power, + .subscribe_event = isp_subdev_subscribe_event, + .unsubscribe_event = isp_subdev_unsubscribe_event, }; /* V4L2 subdev pad operations */ @@ -743,8 +744,8 @@ static void isp_subdev_init_params(struct atomisp_sub_device *asd) * return -EINVAL or zero on success */ static int isp_subdev_link_setup(struct media_entity *entity, - const struct media_pad *local, - const struct media_pad *remote, u32 flags) + const struct media_pad *local, + const struct media_pad *remote, u32 flags) { struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity); struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd); @@ -776,8 +777,8 @@ static int isp_subdev_link_setup(struct media_entity *entity, /* read from memory */ if (flags & MEDIA_LNK_FL_ENABLED) { if (isp_sd->input >= ATOMISP_SUBDEV_INPUT_CSI2_PORT1 && - isp_sd->input < (ATOMISP_SUBDEV_INPUT_CSI2_PORT1 - + ATOMISP_CAMERA_NR_PORTS)) + isp_sd->input < (ATOMISP_SUBDEV_INPUT_CSI2_PORT1 + + ATOMISP_CAMERA_NR_PORTS)) return -EBUSY; isp_sd->input = ATOMISP_SUBDEV_INPUT_MEMORY; } else { @@ -811,9 +812,9 @@ static int isp_subdev_link_setup(struct media_entity *entity, /* media operations */ static const struct media_entity_operations isp_subdev_media_ops = { - .link_setup = isp_subdev_link_setup, - .link_validate = v4l2_subdev_link_validate, -/* .set_power = v4l2_subdev_set_power, */ + .link_setup = isp_subdev_link_setup, + .link_validate = v4l2_subdev_link_validate, + /* .set_power = v4l2_subdev_set_power, */ }; static int __atomisp_update_run_mode(struct atomisp_sub_device *asd) @@ -853,14 +854,15 @@ int atomisp_update_run_mode(struct atomisp_sub_device *asd) static int s_ctrl(struct v4l2_ctrl *ctrl) { struct atomisp_sub_device *asd = container_of( - ctrl->handler, struct atomisp_sub_device, ctrl_handler); + ctrl->handler, struct atomisp_sub_device, ctrl_handler); switch (ctrl->id) { case V4L2_CID_RUN_MODE: return __atomisp_update_run_mode(asd); case V4L2_CID_DEPTH_MODE: if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) { - dev_err(asd->isp->dev, "ISP is streaming, it is not supported to change the depth mode\n"); + dev_err(asd->isp->dev, + "ISP is streaming, it is not supported to change the depth mode\n"); return -EINVAL; } break; @@ -884,7 +886,7 @@ static const struct v4l2_ctrl_config ctrl_fmt_auto = { .def = 1, }; -static const char * const ctrl_run_mode_menu[] = { +static const char *const ctrl_run_mode_menu[] = { NULL, "Video", "Still capture", @@ -903,7 +905,7 @@ static const struct v4l2_ctrl_config ctrl_run_mode = { .qmenu = ctrl_run_mode_menu, }; -static const char * const ctrl_vfpp_mode_menu[] = { +static const char *const ctrl_vfpp_mode_menu[] = { "Enable", /* vfpp always enabled */ "Disable to scaler mode", /* CSS into video mode and disable */ "Disable to low latency mode", /* CSS into still mode and disable */ @@ -1064,20 +1066,20 @@ static const struct v4l2_ctrl_config ctrl_select_isp_version = { * this fd will be used to map shared fd to buffer. */ static const struct v4l2_ctrl_config ctrl_ion_dev_fd = { - .ops = &ctrl_ops, - .id = V4L2_CID_ATOMISP_ION_DEVICE_FD, - .type = V4L2_CTRL_TYPE_INTEGER, - .name = "Ion Device Fd", - .min = -1, - .max = 1024, - .step = 1, - .def = ION_FD_UNSET + .ops = &ctrl_ops, + .id = V4L2_CID_ATOMISP_ION_DEVICE_FD, + .type = V4L2_CTRL_TYPE_INTEGER, + .name = "Ion Device Fd", + .min = -1, + .max = 1024, + .step = 1, + .def = ION_FD_UNSET }; #endif #endif static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd, - struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type) + struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type) { pipe->type = buf_type; pipe->asd = asd; @@ -1091,11 +1093,11 @@ static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd, 0, VIDEO_MAX_FRAME * sizeof(unsigned int)); memset(pipe->frame_params, 0, VIDEO_MAX_FRAME * - sizeof(struct atomisp_css_params_with_list *)); + sizeof(struct atomisp_css_params_with_list *)); } static void atomisp_init_acc_pipe(struct atomisp_sub_device *asd, - struct atomisp_acc_pipe *pipe) + struct atomisp_acc_pipe *pipe) { pipe->asd = asd; pipe->isp = asd->isp; @@ -1131,15 +1133,15 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd) pads[ATOMISP_SUBDEV_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE; asd->fmt[ATOMISP_SUBDEV_PAD_SINK].fmt.code = - MEDIA_BUS_FMT_SBGGR10_1X10; + MEDIA_BUS_FMT_SBGGR10_1X10; asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW].fmt.code = - MEDIA_BUS_FMT_SBGGR10_1X10; + MEDIA_BUS_FMT_SBGGR10_1X10; asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_VF].fmt.code = - MEDIA_BUS_FMT_SBGGR10_1X10; + MEDIA_BUS_FMT_SBGGR10_1X10; asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE].fmt.code = - MEDIA_BUS_FMT_SBGGR10_1X10; + MEDIA_BUS_FMT_SBGGR10_1X10; asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_VIDEO].fmt.code = - MEDIA_BUS_FMT_SBGGR10_1X10; + MEDIA_BUS_FMT_SBGGR10_1X10; me->ops = &isp_subdev_media_ops; me->function = MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN; @@ -1191,44 +1193,44 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd) return ret; asd->fmt_auto = v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_fmt_auto, NULL); + &ctrl_fmt_auto, NULL); asd->run_mode = v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_run_mode, NULL); + &ctrl_run_mode, NULL); asd->vfpp = v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_vfpp, NULL); + &ctrl_vfpp, NULL); asd->continuous_mode = v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_continuous_mode, NULL); + &ctrl_continuous_mode, NULL); asd->continuous_viewfinder = v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_continuous_viewfinder, - NULL); + &ctrl_continuous_viewfinder, + NULL); asd->continuous_raw_buffer_size = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_continuous_raw_buffer_size, - NULL); + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_continuous_raw_buffer_size, + NULL); asd->enable_raw_buffer_lock = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_enable_raw_buffer_lock, - NULL); + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_enable_raw_buffer_lock, + NULL); asd->depth_mode = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_depth_mode, - NULL); + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_depth_mode, + NULL); asd->disable_dz = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_disable_dz, - NULL); + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_disable_dz, + NULL); #ifdef ISP2401 asd->select_isp_version = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_select_isp_version, - NULL); + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_select_isp_version, + NULL); #ifdef CONFIG_ION asd->ion_dev_fd = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_ion_dev_fd, - NULL); + v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_ion_dev_fd, + NULL); #endif #endif @@ -1258,7 +1260,7 @@ int atomisp_create_pads_links(struct atomisp_device *isp) for (i = 0; i < isp->input_cnt - 2; i++) { ret = media_create_pad_link(&isp->inputs[i].camera->entity, 0, &isp->csi2_port[isp->inputs[i]. - port].subdev.entity, + port].subdev.entity, CSI2_PAD_SINK, MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); @@ -1320,7 +1322,7 @@ void atomisp_subdev_cleanup_pending_events(struct atomisp_sub_device *asd) unsigned int i, pending_event; list_for_each_entry_safe(fh, fh_tmp, - &asd->subdev.devnode->fh_list, list) { + &asd->subdev.devnode->fh_list, list) { pending_event = v4l2_event_pending(fh); for (i = 0; i < pending_event; i++) v4l2_event_dequeue(fh, &event, 1); @@ -1340,7 +1342,7 @@ void atomisp_subdev_unregister_entities(struct atomisp_sub_device *asd) } int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, - struct v4l2_device *vdev) + struct v4l2_device *vdev) { int ret; @@ -1405,7 +1407,7 @@ int atomisp_subdev_init(struct atomisp_device *isp) */ isp->num_of_streams = 2; isp->asd = devm_kzalloc(isp->dev, sizeof(struct atomisp_sub_device) * - isp->num_of_streams, GFP_KERNEL); + isp->num_of_streams, GFP_KERNEL); if (!isp->asd) return -ENOMEM; for (i = 0; i < isp->num_of_streams; i++) { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h index 6eb2661c3dece..58f77a146999c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h @@ -341,7 +341,7 @@ struct atomisp_sub_device { unsigned int dis_bufs_in_css; unsigned int metadata_bufs_in_css - [ATOMISP_INPUT_STREAM_NUM][CSS_PIPE_ID_NUM]; + [ATOMISP_INPUT_STREAM_NUM][CSS_PIPE_ID_NUM]; /* The list of free and available metadata buffers for CSS */ struct list_head metadata[ATOMISP_METADATA_TYPE_NUM]; /* The list of metadata buffers which have been en-queued to CSS */ @@ -395,7 +395,8 @@ struct atomisp_sub_device { bool copy_mode; /* CSI2+ use copy mode */ bool yuvpp_mode; /* CSI2+ yuvpp pipe */ - int raw_buffer_bitmap[ATOMISP_MAX_EXP_ID / 32 + 1]; /* Record each Raw Buffer lock status */ + int raw_buffer_bitmap[ATOMISP_MAX_EXP_ID / 32 + + 1]; /* Record each Raw Buffer lock status */ int raw_buffer_locked_count; spinlock_t raw_buffer_bitmap_lock; @@ -424,11 +425,11 @@ bool atomisp_subdev_is_compressed(u32 code); const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv(u32 code); #ifndef ISP2401 const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt( - enum atomisp_input_format atomisp_in_fmt); + enum atomisp_input_format atomisp_in_fmt); #else const struct atomisp_in_fmt_conv - *atomisp_find_in_fmt_conv_by_atomisp_in_fmt(enum atomisp_input_format - atomisp_in_fmt); +*atomisp_find_in_fmt_conv_by_atomisp_in_fmt(enum atomisp_input_format + atomisp_in_fmt); #endif const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_compressed(u32 code); bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd, @@ -441,9 +442,9 @@ struct v4l2_mbus_framefmt struct v4l2_subdev_pad_config *cfg, uint32_t which, uint32_t pad); struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd, - struct v4l2_subdev_pad_config *cfg, - u32 which, uint32_t pad, - uint32_t target); + struct v4l2_subdev_pad_config *cfg, + u32 which, uint32_t pad, + uint32_t target); int atomisp_subdev_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, u32 which, uint32_t pad, uint32_t target, @@ -459,7 +460,7 @@ void atomisp_subdev_cleanup_pending_events(struct atomisp_sub_device *asd); void atomisp_subdev_unregister_entities(struct atomisp_sub_device *asd); int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, - struct v4l2_device *vdev); + struct v4l2_device *vdev); int atomisp_subdev_init(struct atomisp_device *isp); void atomisp_subdev_cleanup(struct atomisp_device *isp); int atomisp_create_pads_links(struct atomisp_device *isp); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h index 319ded6a96daf..22eac8a25dbad 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h @@ -42,146 +42,146 @@ static struct atomisp_css_cc_config mono_cc_config = { /*Skin whiten image effect table*/ static struct atomisp_css_macc_table skin_low_macc_table = { .data = { - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 7168, 0, 2048, 8192, - 5120, -1024, 2048, 8192, - 8192, 2048, -1024, 5120, - 8192, 2048, 0, 7168, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192 + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 7168, 0, 2048, 8192, + 5120, -1024, 2048, 8192, + 8192, 2048, -1024, 5120, + 8192, 2048, 0, 7168, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 } }; static struct atomisp_css_macc_table skin_medium_macc_table = { .data = { - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 5120, 0, 6144, 8192, - 3072, -1024, 2048, 6144, - 6144, 2048, -1024, 3072, - 8192, 6144, 0, 5120, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192 + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 5120, 0, 6144, 8192, + 3072, -1024, 2048, 6144, + 6144, 2048, -1024, 3072, + 8192, 6144, 0, 5120, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 } }; static struct atomisp_css_macc_table skin_high_macc_table = { .data = { - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 4096, 0, 8192, 8192, - 0, -2048, 4096, 6144, - 6144, 4096, -2048, 0, - 8192, 8192, 0, 4096, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192 + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 4096, 0, 8192, 8192, + 0, -2048, 4096, 6144, + 6144, 4096, -2048, 0, + 8192, 8192, 0, 4096, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 } }; /*Blue enhencement image effect table*/ static struct atomisp_css_macc_table blue_macc_table = { .data = { - 9728, -3072, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 9728, 0, -3072, 8192, - 12800, 1536, -3072, 8192, - 11264, 0, 0, 11264, - 9728, -3072, 0, 11264 + 9728, -3072, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 9728, 0, -3072, 8192, + 12800, 1536, -3072, 8192, + 11264, 0, 0, 11264, + 9728, -3072, 0, 11264 } }; /*Green enhencement image effect table*/ static struct atomisp_css_macc_table green_macc_table = { .data = { - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 10240, 4096, 0, 8192, - 10240, 4096, 0, 12288, - 12288, 0, 0, 12288, - 14336, -2048, 4096, 8192, - 10240, 0, 4096, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192, - 8192, 0, 0, 8192 + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 10240, 4096, 0, 8192, + 10240, 4096, 0, 12288, + 12288, 0, 0, 12288, + 14336, -2048, 4096, 8192, + 10240, 0, 4096, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192, + 8192, 0, 0, 8192 } }; static struct atomisp_css_ctc_table vivid_ctc_table = { .data.vamem_2 = { - 0, 384, 837, 957, 1011, 1062, 1083, 1080, - 1078, 1077, 1053, 1039, 1012, 992, 969, 951, - 929, 906, 886, 866, 845, 823, 809, 790, - 772, 758, 741, 726, 711, 701, 688, 675, - 666, 656, 648, 639, 633, 626, 618, 612, - 603, 594, 582, 572, 557, 545, 529, 516, - 504, 491, 480, 467, 459, 447, 438, 429, - 419, 412, 404, 397, 389, 382, 376, 368, - 363, 357, 351, 345, 340, 336, 330, 326, - 321, 318, 312, 308, 304, 300, 297, 294, - 291, 286, 284, 281, 278, 275, 271, 268, - 261, 257, 251, 245, 240, 235, 232, 225, - 223, 218, 213, 209, 206, 204, 199, 197, - 193, 189, 186, 185, 183, 179, 177, 175, - 172, 170, 169, 167, 164, 164, 162, 160, - 158, 157, 156, 154, 154, 152, 151, 150, - 149, 148, 146, 147, 146, 144, 143, 143, - 142, 141, 140, 141, 139, 138, 138, 138, - 137, 136, 136, 135, 134, 134, 134, 133, - 132, 132, 131, 130, 131, 130, 129, 128, - 129, 127, 127, 127, 127, 125, 125, 125, - 123, 123, 122, 120, 118, 115, 114, 111, - 110, 108, 106, 105, 103, 102, 100, 99, - 97, 97, 96, 95, 94, 93, 93, 91, - 91, 91, 90, 90, 89, 89, 88, 88, - 89, 88, 88, 87, 87, 87, 87, 86, - 87, 87, 86, 87, 86, 86, 84, 84, - 82, 80, 78, 76, 74, 72, 70, 68, - 67, 65, 62, 60, 58, 56, 55, 54, - 53, 51, 49, 49, 47, 45, 45, 45, - 41, 40, 39, 39, 34, 33, 34, 32, - 25, 23, 24, 20, 13, 9, 12, 0, - 0 + 0, 384, 837, 957, 1011, 1062, 1083, 1080, + 1078, 1077, 1053, 1039, 1012, 992, 969, 951, + 929, 906, 886, 866, 845, 823, 809, 790, + 772, 758, 741, 726, 711, 701, 688, 675, + 666, 656, 648, 639, 633, 626, 618, 612, + 603, 594, 582, 572, 557, 545, 529, 516, + 504, 491, 480, 467, 459, 447, 438, 429, + 419, 412, 404, 397, 389, 382, 376, 368, + 363, 357, 351, 345, 340, 336, 330, 326, + 321, 318, 312, 308, 304, 300, 297, 294, + 291, 286, 284, 281, 278, 275, 271, 268, + 261, 257, 251, 245, 240, 235, 232, 225, + 223, 218, 213, 209, 206, 204, 199, 197, + 193, 189, 186, 185, 183, 179, 177, 175, + 172, 170, 169, 167, 164, 164, 162, 160, + 158, 157, 156, 154, 154, 152, 151, 150, + 149, 148, 146, 147, 146, 144, 143, 143, + 142, 141, 140, 141, 139, 138, 138, 138, + 137, 136, 136, 135, 134, 134, 134, 133, + 132, 132, 131, 130, 131, 130, 129, 128, + 129, 127, 127, 127, 127, 125, 125, 125, + 123, 123, 122, 120, 118, 115, 114, 111, + 110, 108, 106, 105, 103, 102, 100, 99, + 97, 97, 96, 95, 94, 93, 93, 91, + 91, 91, 90, 90, 89, 89, 88, 88, + 89, 88, 88, 87, 87, 87, 87, 86, + 87, 87, 86, 87, 86, 86, 84, 84, + 82, 80, 78, 76, 74, 72, 70, 68, + 67, 65, 62, 60, 58, 56, 55, 54, + 53, 51, 49, 49, 47, 45, 45, 45, + 41, 40, 39, 39, 34, 33, 34, 32, + 25, 23, 24, 20, 13, 9, 12, 0, + 0 } }; #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c index 1d233f2a69fdd..97176b54d1ec3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c @@ -117,7 +117,7 @@ void atomisp_tpg_unregister_entities(struct atomisp_tpg_device *tpg) } int atomisp_tpg_register_entities(struct atomisp_tpg_device *tpg, - struct v4l2_device *vdev) + struct v4l2_device *vdev) { int ret; /* Register the subdev and video nodes. */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h index af354c4bfd3eb..cf492d7577733 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h @@ -33,6 +33,6 @@ void atomisp_tpg_cleanup(struct atomisp_device *isp); int atomisp_tpg_init(struct atomisp_device *isp); void atomisp_tpg_unregister_entities(struct atomisp_tpg_device *tpg); int atomisp_tpg_register_entities(struct atomisp_tpg_device *tpg, - struct v4l2_device *vdev); + struct v4l2_device *vdev); #endif /* __ATOMISP_TPG_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h index 13cdfc4f0976b..4d7a6794ee66d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h @@ -24,14 +24,14 @@ #include TRACE_EVENT(camera_meminfo, - TP_PROTO(const char *name, int uptr_size, int counter, int sys_size, - int sys_res_size, int cam_sys_use, int cam_dyc_use, - int cam_res_use), + TP_PROTO(const char *name, int uptr_size, int counter, int sys_size, + int sys_res_size, int cam_sys_use, int cam_dyc_use, + int cam_res_use), - TP_ARGS(name, uptr_size, counter, sys_size, sys_res_size, cam_sys_use, - cam_dyc_use, cam_res_use), + TP_ARGS(name, uptr_size, counter, sys_size, sys_res_size, cam_sys_use, + cam_dyc_use, cam_res_use), - TP_STRUCT__entry( + TP_STRUCT__entry( __array(char, name, 24) __field(int, uptr_size) __field(int, counter) @@ -40,9 +40,9 @@ TRACE_EVENT(camera_meminfo, __field(int, cam_res_use) __field(int, cam_dyc_use) __field(int, cam_sys_use) - ), + ), - TP_fast_assign( + TP_fast_assign( strlcpy(__entry->name, name, 24); __entry->uptr_size = uptr_size; __entry->counter = counter; @@ -51,72 +51,72 @@ TRACE_EVENT(camera_meminfo, __entry->cam_res_use = cam_res_use; __entry->cam_dyc_use = cam_dyc_use; __entry->cam_sys_use = cam_sys_use; - ), + ), - TP_printk( + TP_printk( "<%s> User ptr memory:%d pages,\tISP private memory used:%d pages:\tsysFP system size:%d,\treserved size:%d\tcamFP sysUse:%d,\tdycUse:%d,\tresUse:%d.\n", __entry->name, __entry->uptr_size, __entry->counter, __entry->sys_size, __entry->sys_res_size, __entry->cam_sys_use, __entry->cam_dyc_use, __entry->cam_res_use) -); + ); TRACE_EVENT(camera_debug, - TP_PROTO(const char *name, char *info, const int line), + TP_PROTO(const char *name, char *info, const int line), - TP_ARGS(name, info, line), + TP_ARGS(name, info, line), - TP_STRUCT__entry( + TP_STRUCT__entry( __array(char, name, 24) __array(char, info, 24) __field(int, line) - ), + ), - TP_fast_assign( + TP_fast_assign( strlcpy(__entry->name, name, 24); strlcpy(__entry->info, info, 24); __entry->line = line; - ), + ), - TP_printk("<%s>-<%d> %s\n", __entry->name, __entry->line, - __entry->info) -); + TP_printk("<%s>-<%d> %s\n", __entry->name, __entry->line, + __entry->info) + ); TRACE_EVENT(ipu_cstate, - TP_PROTO(int cstate), + TP_PROTO(int cstate), - TP_ARGS(cstate), + TP_ARGS(cstate), - TP_STRUCT__entry( - __field(int, cstate) - ), + TP_STRUCT__entry( + __field(int, cstate) + ), - TP_fast_assign( - __entry->cstate = cstate; - ), + TP_fast_assign( + __entry->cstate = cstate; + ), - TP_printk("cstate=%d", __entry->cstate) -); + TP_printk("cstate=%d", __entry->cstate) + ); TRACE_EVENT(ipu_pstate, - TP_PROTO(int freq, int util), + TP_PROTO(int freq, int util), - TP_ARGS(freq, util), + TP_ARGS(freq, util), - TP_STRUCT__entry( - __field(int, freq) - __field(int, util) - ), + TP_STRUCT__entry( + __field(int, freq) + __field(int, util) + ), - TP_fast_assign( - __entry->freq = freq; - __entry->util = util; - ), + TP_fast_assign( + __entry->freq = freq; + __entry->util = util; + ), - TP_printk("freq=%d util=%d", __entry->freq, __entry->util) -); + TP_printk("freq=%d util=%d", __entry->freq, __entry->util) + ); #endif #undef TRACE_INCLUDE_PATH diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index 5a68967d15c4a..5a624a5ae56b4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -56,24 +56,24 @@ MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load"); static unsigned int repool_pgnr; module_param(repool_pgnr, uint, 0644); MODULE_PARM_DESC(repool_pgnr, - "Set the reserved memory pool size in page (default:0)"); + "Set the reserved memory pool size in page (default:0)"); /* set dynamic memory pool size in page */ unsigned int dypool_pgnr = UINT_MAX; module_param(dypool_pgnr, uint, 0644); MODULE_PARM_DESC(dypool_pgnr, - "Set the dynamic memory pool size in page (default:0)"); + "Set the dynamic memory pool size in page (default:0)"); bool dypool_enable; module_param(dypool_enable, bool, 0644); MODULE_PARM_DESC(dypool_enable, - "dynamic memory pool enable/disable (default:disable)"); + "dynamic memory pool enable/disable (default:disable)"); /* memory optimization: deferred firmware loading */ bool defer_fw_load; module_param(defer_fw_load, bool, 0644); MODULE_PARM_DESC(defer_fw_load, - "Defer FW loading until device is opened (default:disable)"); + "Defer FW loading until device is opened (default:disable)"); /* cross componnet debug message flag */ int dbg_level; @@ -84,7 +84,7 @@ MODULE_PARM_DESC(dbg_level, "debug message on/off (default:off)"); int dbg_func = 2; module_param(dbg_func, int, 0644); MODULE_PARM_DESC(dbg_func, - "log function switch non/trace_printk/printk (default:printk)"); + "log function switch non/trace_printk/printk (default:printk)"); int mipicsi_flag; module_param(mipicsi_flag, int, 0644); @@ -157,7 +157,7 @@ void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name) } int atomisp_video_register(struct atomisp_video_pipe *video, - struct v4l2_device *vdev) + struct v4l2_device *vdev) { int ret; @@ -172,7 +172,7 @@ int atomisp_video_register(struct atomisp_video_pipe *video, } int atomisp_acc_register(struct atomisp_acc_pipe *video, - struct v4l2_device *vdev) + struct v4l2_device *vdev) { int ret; @@ -219,10 +219,10 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp) &isp->saved_regs.pmcs); /* Ensure read/write combining is enabled. */ pci_read_config_dword(dev, PCI_I_CONTROL, - &isp->saved_regs.i_control); + &isp->saved_regs.i_control); isp->saved_regs.i_control |= - MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING | - MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING; + MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING | + MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING; pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL, &isp->saved_regs.csi_access_viol); pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL, @@ -236,7 +236,7 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp) * For both issues, setting this bit is a workaround. */ isp->saved_regs.csi_rcomp_config |= - MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE; + MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE; pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, &isp->saved_regs.csi_afe_dly); pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL, @@ -244,14 +244,14 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp) if (isp->media_dev.hw_revision >= (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT)) isp->saved_regs.csi_control |= - MRFLD_PCI_CSI_CONTROL_PARPATHEN; + MRFLD_PCI_CSI_CONTROL_PARPATHEN; /* * On CHT CSI_READY bit should be enabled before stream on */ if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 << - ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0))) + ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0))) isp->saved_regs.csi_control |= - MRFLD_PCI_CSI_CONTROL_CSI_READY; + MRFLD_PCI_CSI_CONTROL_CSI_READY; pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL, &isp->saved_regs.csi_afe_rcomp_config); pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL, @@ -277,24 +277,24 @@ static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp) pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, isp->saved_regs.interrupt_control); pci_write_config_dword(dev, PCI_I_CONTROL, - isp->saved_regs.i_control); + isp->saved_regs.i_control); pci_write_config_dword(dev, MRFLD_PCI_PMCS, - isp->saved_regs.pmcs); + isp->saved_regs.pmcs); pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL, - isp->saved_regs.csi_access_viol); + isp->saved_regs.csi_access_viol); pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL, - isp->saved_regs.csi_rcomp_config); + isp->saved_regs.csi_rcomp_config); pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, - isp->saved_regs.csi_afe_dly); + isp->saved_regs.csi_afe_dly); pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL, - isp->saved_regs.csi_control); + isp->saved_regs.csi_control); pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL, - isp->saved_regs.csi_afe_rcomp_config); + isp->saved_regs.csi_afe_rcomp_config); pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL, - isp->saved_regs.csi_afe_hs_control); + isp->saved_regs.csi_afe_hs_control); pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL, - isp->saved_regs.csi_deadline_control); + isp->saved_regs.csi_deadline_control); /* * for MRFLD, Software/firmware needs to write a 1 to bit0 @@ -337,8 +337,8 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq); if (irq != 0) { dev_err(isp->dev, - "%s: fail to clear isp interrupt status reg=0x%x\n", - __func__, irq); + "%s: fail to clear isp interrupt status reg=0x%x\n", + __func__, irq); spin_unlock_irqrestore(&isp->lock, flags); return -EAGAIN; } else { @@ -352,8 +352,8 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) goto done; } dev_err(isp->dev, - "%s: error in iunit interrupt. status reg=0x%x\n", - __func__, irq); + "%s: error in iunit interrupt. status reg=0x%x\n", + __func__, irq); spin_unlock_irqrestore(&isp->lock, flags); return -EAGAIN; } @@ -376,10 +376,10 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) return 0; } - /* - * WA for DDR DVFS enable/disable - * By default, ISP will force DDR DVFS 1600MHz before disable DVFS - */ +/* +* WA for DDR DVFS enable/disable +* By default, ISP will force DDR DVFS 1600MHz before disable DVFS +*/ static void punit_ddr_dvfs_enable(bool enable) { int door_bell = 1 << 8; @@ -430,10 +430,10 @@ int atomisp_mrfld_power_down(struct atomisp_device *isp) while (1) { iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n", - reg_value); + reg_value); /* wait until ISPSSPM0 bit[25:24] shows 0x3 */ if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) == - MRFLD_ISPSSPM0_IUNIT_POWER_OFF) { + MRFLD_ISPSSPM0_IUNIT_POWER_OFF) { trace_ipu_cstate(0); return 0; } @@ -475,10 +475,10 @@ int atomisp_mrfld_power_up(struct atomisp_device *isp) while (1) { iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n", - reg_value); + reg_value); /* wait until ISPSSPM0 bit[25:24] shows 0x0 */ if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) == - MRFLD_ISPSSPM0_IUNIT_POWER_ON) { + MRFLD_ISPSSPM0_IUNIT_POWER_ON) { trace_ipu_cstate(1); return 0; } @@ -495,7 +495,7 @@ int atomisp_mrfld_power_up(struct atomisp_device *isp) int atomisp_runtime_suspend(struct device *dev) { struct atomisp_device *isp = (struct atomisp_device *) - dev_get_drvdata(dev); + dev_get_drvdata(dev); int ret; ret = atomisp_mrfld_pre_power_down(isp); @@ -513,12 +513,12 @@ int atomisp_runtime_suspend(struct device *dev) int atomisp_runtime_resume(struct device *dev) { struct atomisp_device *isp = (struct atomisp_device *) - dev_get_drvdata(dev); + dev_get_drvdata(dev); int ret; ret = atomisp_mrfld_power_up(isp); if (ret) - return ret; + return ret; cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency); if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) { @@ -541,7 +541,7 @@ int atomisp_runtime_resume(struct device *dev) static int __maybe_unused atomisp_suspend(struct device *dev) { struct atomisp_device *isp = (struct atomisp_device *) - dev_get_drvdata(dev); + dev_get_drvdata(dev); /* FIXME: only has one isp_subdev at present */ struct atomisp_sub_device *asd = &isp->asd[0]; unsigned long flags; @@ -579,7 +579,7 @@ static int __maybe_unused atomisp_suspend(struct device *dev) static int __maybe_unused atomisp_resume(struct device *dev) { struct atomisp_device *isp = (struct atomisp_device *) - dev_get_drvdata(dev); + dev_get_drvdata(dev); int ret; ret = atomisp_mrfld_power_up(isp); @@ -638,8 +638,8 @@ int atomisp_csi_lane_config(struct atomisp_device *isp) int port3_lanes_shift; if (isp->media_dev.hw_revision < - ATOMISP_HW_REVISION_ISP2401_LEGACY << - ATOMISP_HW_REVISION_SHIFT) { + ATOMISP_HW_REVISION_ISP2401_LEGACY << + ATOMISP_HW_REVISION_SHIFT) { /* Merrifield */ port_config_mask = MRFLD_PORT_CONFIG_MASK; port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT; @@ -650,8 +650,8 @@ int atomisp_csi_lane_config(struct atomisp_device *isp) } if (isp->media_dev.hw_revision < - ATOMISP_HW_REVISION_ISP2401 << - ATOMISP_HW_REVISION_SHIFT) { + ATOMISP_HW_REVISION_ISP2401 << + ATOMISP_HW_REVISION_SHIFT) { /* Merrifield / Moorefield legacy input system */ nportconfigs = MRFLD_PORT_CONFIG_NUM; } else { @@ -709,12 +709,12 @@ int atomisp_csi_lane_config(struct atomisp_device *isp) pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control); csi_control &= ~port_config_mask; csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT) - | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT)) - | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT)) - | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT)) - | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT) - | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT) - | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift); + | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT)) + | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT)) + | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT)) + | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT) + | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT) + | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift); pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control); @@ -741,9 +741,9 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) { struct v4l2_subdev *subdev; struct i2c_board_info *board_info = - &subdevs->v4l2_subdev.board_info; + &subdevs->v4l2_subdev.board_info; struct i2c_adapter *adapter = - i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id); + i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id); int sensor_num, i; if (!adapter) { @@ -796,18 +796,18 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) */ isp->inputs[isp->input_cnt].frame_size.pixel_format = 0; isp->inputs[isp->input_cnt].camera_caps = - atomisp_get_default_camera_caps(); + atomisp_get_default_camera_caps(); sensor_num = isp->inputs[isp->input_cnt] - .camera_caps->sensor_num; + .camera_caps->sensor_num; isp->input_cnt++; for (i = 1; i < sensor_num; i++) { if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) { dev_warn(isp->dev, - "atomisp inputs out of range\n"); + "atomisp inputs out of range\n"); break; } isp->inputs[isp->input_cnt] = - isp->inputs[isp->input_cnt - 1]; + isp->inputs[isp->input_cnt - 1]; isp->inputs[isp->input_cnt].sensor_index = i; isp->input_cnt++; } @@ -853,7 +853,7 @@ static void atomisp_unregister_entities(struct atomisp_device *isp) atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]); list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list) - v4l2_device_unregister_subdev(sd); + v4l2_device_unregister_subdev(sd); v4l2_device_unregister(&isp->v4l2_dev); media_device_unregister(&isp->media_dev); @@ -885,7 +885,7 @@ static int atomisp_register_entities(struct atomisp_device *isp) /* Register internal entities */ for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) { ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i], - &isp->v4l2_dev); + &isp->v4l2_dev); if (ret == 0) continue; @@ -894,13 +894,13 @@ static int atomisp_register_entities(struct atomisp_device *isp) /* deregister all registered CSI ports */ while (i--) atomisp_mipi_csi2_unregister_entities( - &isp->csi2_port[i]); + &isp->csi2_port[i]); goto csi_and_subdev_probe_failed; } ret = - atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev); + atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev); if (ret < 0) { dev_err(isp->dev, "atomisp_file_input_register_entities\n"); goto file_input_register_failed; @@ -921,7 +921,7 @@ static int atomisp_register_entities(struct atomisp_device *isp) "atomisp_subdev_register_entities fail\n"); for (; i > 0; i--) atomisp_subdev_unregister_entities( - &isp->asd[i - 1]); + &isp->asd[i - 1]); goto subdev_register_failed; } } @@ -932,16 +932,16 @@ static int atomisp_register_entities(struct atomisp_device *isp) init_completion(&asd->init_done); asd->delayed_init_workq = - alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE, - 1); + alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE, + 1); if (!asd->delayed_init_workq) { dev_err(isp->dev, - "Failed to initialize delayed init workq\n"); + "Failed to initialize delayed init workq\n"); ret = -ENOMEM; for (; i > 0; i--) destroy_workqueue(isp->asd[i - 1]. - delayed_init_workq); + delayed_init_workq); goto wq_alloc_failed; } INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work); @@ -950,7 +950,7 @@ static int atomisp_register_entities(struct atomisp_device *isp) for (i = 0; i < isp->input_cnt; i++) { if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) { dev_err(isp->dev, "isp->inputs port %d not supported\n", - isp->inputs[i].port); + isp->inputs[i].port); ret = -EINVAL; goto link_failed; } @@ -961,7 +961,7 @@ static int atomisp_register_entities(struct atomisp_device *isp) isp->inputs[isp->input_cnt].type = FILE_INPUT; isp->inputs[isp->input_cnt].port = -1; isp->inputs[isp->input_cnt].camera_caps = - atomisp_get_default_camera_caps(); + atomisp_get_default_camera_caps(); isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd; if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) { @@ -985,11 +985,11 @@ static int atomisp_register_entities(struct atomisp_device *isp) link_failed: for (i = 0; i < isp->num_of_streams; i++) destroy_workqueue(isp->asd[i]. - delayed_init_workq); + delayed_init_workq); wq_alloc_failed: for (i = 0; i < isp->num_of_streams; i++) atomisp_subdev_unregister_entities( - &isp->asd[i]); + &isp->asd[i]); subdev_register_failed: atomisp_tpg_unregister_entities(&isp->tpg); tpg_register_failed: @@ -1150,7 +1150,7 @@ static int init_atomisp_wdts(struct atomisp_device *isp) #define ATOM_ISP_PCI_BAR 0 static int atomisp_pci_probe(struct pci_dev *dev, - const struct pci_device_id *id) + const struct pci_device_id *id) { const struct atomisp_platform_data *pdata; struct atomisp_device *isp; @@ -1217,9 +1217,9 @@ static int atomisp_pci_probe(struct pci_dev *dev, switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) { case ATOMISP_PCI_DEVICE_SOC_MRFLD: isp->media_dev.hw_revision = - (ATOMISP_HW_REVISION_ISP2400 - << ATOMISP_HW_REVISION_SHIFT) | - ATOMISP_HW_STEPPING_B0; + (ATOMISP_HW_REVISION_ISP2400 + << ATOMISP_HW_REVISION_SHIFT) | + ATOMISP_HW_STEPPING_B0; switch (id->device) { case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179: @@ -1236,12 +1236,12 @@ static int atomisp_pci_probe(struct pci_dev *dev, break; case ATOMISP_PCI_DEVICE_SOC_BYT: isp->media_dev.hw_revision = - (ATOMISP_HW_REVISION_ISP2400 - << ATOMISP_HW_REVISION_SHIFT) | - ATOMISP_HW_STEPPING_B0; + (ATOMISP_HW_REVISION_ISP2400 + << ATOMISP_HW_REVISION_SHIFT) | + ATOMISP_HW_STEPPING_B0; #ifdef FIXME if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) || - INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) { + INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) { isp->dfs = &dfs_config_byt_cr; isp->hpll_freq = HPLL_FREQ_2000MHZ; } else @@ -1254,7 +1254,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, * have specs yet for exactly how it varies. Default to * BYT-CR but let provisioning set it via EFI variable */ isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq", - HPLL_FREQ_2000MHZ); + HPLL_FREQ_2000MHZ); /* * for BYT/CHT we are put isp into D3cold to avoid pci registers access @@ -1266,26 +1266,26 @@ static int atomisp_pci_probe(struct pci_dev *dev, case ATOMISP_PCI_DEVICE_SOC_ANN: isp->media_dev.hw_revision = ( #ifdef ISP2401_NEW_INPUT_SYSTEM - ATOMISP_HW_REVISION_ISP2401 + ATOMISP_HW_REVISION_ISP2401 #else - ATOMISP_HW_REVISION_ISP2401_LEGACY + ATOMISP_HW_REVISION_ISP2401_LEGACY #endif - << ATOMISP_HW_REVISION_SHIFT); + << ATOMISP_HW_REVISION_SHIFT); isp->media_dev.hw_revision |= isp->pdev->revision < 2 ? - ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; + ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; isp->dfs = &dfs_config_merr; isp->hpll_freq = HPLL_FREQ_1600MHZ; break; case ATOMISP_PCI_DEVICE_SOC_CHT: isp->media_dev.hw_revision = ( #ifdef ISP2401_NEW_INPUT_SYSTEM - ATOMISP_HW_REVISION_ISP2401 + ATOMISP_HW_REVISION_ISP2401 #else - ATOMISP_HW_REVISION_ISP2401_LEGACY + ATOMISP_HW_REVISION_ISP2401_LEGACY #endif - << ATOMISP_HW_REVISION_SHIFT); + << ATOMISP_HW_REVISION_SHIFT); isp->media_dev.hw_revision |= isp->pdev->revision < 2 ? - ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; + ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0; isp->dfs = &dfs_config_cht; isp->pdev->d3cold_delay = 0; @@ -1355,7 +1355,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1); if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) == - ATOMISP_PCI_DEVICE_SOC_MRFLD) { + ATOMISP_PCI_DEVICE_SOC_MRFLD) { u32 csi_afe_trim; /* @@ -1365,19 +1365,19 @@ static int atomisp_pci_probe(struct pci_dev *dev, pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, &csi_afe_trim); csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK << - MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) | + MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) | (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK << - MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) | + MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) | (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK << - MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT)); + MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT)); csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM << - MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) | + MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) | (MRFLD_PCI_CSI2_HSRXCLKTRIM << - MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) | + MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) | (MRFLD_PCI_CSI3_HSRXCLKTRIM << - MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT); + MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT); pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, - csi_afe_trim); + csi_afe_trim); } err = atomisp_initialize_modules(isp); @@ -1489,7 +1489,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, static void atomisp_pci_remove(struct pci_dev *dev) { struct atomisp_device *isp = (struct atomisp_device *) - pci_get_drvdata(dev); + pci_get_drvdata(dev); atomisp_drvfs_exit(); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h index 944a6cf40a2f0..37cdb98f8196a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h @@ -30,10 +30,10 @@ int atomisp_video_init(struct atomisp_video_pipe *video, const char *name); void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name); void atomisp_video_unregister(struct atomisp_video_pipe *video); int atomisp_video_register(struct atomisp_video_pipe *video, - struct v4l2_device *vdev); + struct v4l2_device *vdev); void atomisp_acc_unregister(struct atomisp_acc_pipe *video); int atomisp_acc_register(struct atomisp_acc_pipe *video, - struct v4l2_device *vdev); + struct v4l2_device *vdev); const struct firmware *atomisp_load_firmware(struct atomisp_device *isp); int atomisp_csi_lane_config(struct atomisp_device *isp); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h index 55fe4b7011c27..789a2e68cab8a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h @@ -45,9 +45,9 @@ struct ia_css_circbuf_s { * @param desc The descriptor set to the size using ia_css_circbuf_desc_init(). */ void ia_css_circbuf_create( - ia_css_circbuf_t *cb, - ia_css_circbuf_elem_t *elems, - ia_css_circbuf_desc_t *desc); + ia_css_circbuf_t *cb, + ia_css_circbuf_elem_t *elems, + ia_css_circbuf_desc_t *desc); /** * @brief Destroy the circular buffer. @@ -55,7 +55,7 @@ void ia_css_circbuf_create( * @param cb The pointer to the circular buffer. */ void ia_css_circbuf_destroy( - ia_css_circbuf_t *cb); + ia_css_circbuf_t *cb); /** * @brief Pop a value out of the circular buffer. @@ -68,7 +68,7 @@ void ia_css_circbuf_destroy( * @return the pop-out value. */ uint32_t ia_css_circbuf_pop( - ia_css_circbuf_t *cb); + ia_css_circbuf_t *cb); /** * @brief Extract a value out of the circular buffer. @@ -82,8 +82,8 @@ uint32_t ia_css_circbuf_pop( * @return the extracted value. */ uint32_t ia_css_circbuf_extract( - ia_css_circbuf_t *cb, - int offset); + ia_css_circbuf_t *cb, + int offset); /**************************************************************** * @@ -97,8 +97,8 @@ uint32_t ia_css_circbuf_extract( * @param val The value to be set. */ static inline void ia_css_circbuf_elem_set_val( - ia_css_circbuf_elem_t *elem, - uint32_t val) + ia_css_circbuf_elem_t *elem, + uint32_t val) { OP___assert(elem); @@ -111,7 +111,7 @@ static inline void ia_css_circbuf_elem_set_val( * @param elem The pointer to the element. */ static inline void ia_css_circbuf_elem_init( - ia_css_circbuf_elem_t *elem) + ia_css_circbuf_elem_t *elem) { OP___assert(elem); ia_css_circbuf_elem_set_val(elem, 0); @@ -124,8 +124,8 @@ static inline void ia_css_circbuf_elem_init( * @param dest The element as the copy destination. */ static inline void ia_css_circbuf_elem_cpy( - ia_css_circbuf_elem_t *src, - ia_css_circbuf_elem_t *dest) + ia_css_circbuf_elem_t *src, + ia_css_circbuf_elem_t *dest) { OP___assert(src); OP___assert(dest); @@ -143,9 +143,9 @@ static inline void ia_css_circbuf_elem_cpy( * @return the position at offset. */ static inline uint8_t ia_css_circbuf_get_pos_at_offset( - ia_css_circbuf_t *cb, - u32 base, - int offset) + ia_css_circbuf_t *cb, + u32 base, + int offset) { u8 dest; @@ -176,9 +176,9 @@ static inline uint8_t ia_css_circbuf_get_pos_at_offset( * @return the offset. */ static inline int ia_css_circbuf_get_offset( - ia_css_circbuf_t *cb, - u32 src_pos, - uint32_t dest_pos) + ia_css_circbuf_t *cb, + u32 src_pos, + uint32_t dest_pos) { int offset; @@ -201,7 +201,7 @@ static inline int ia_css_circbuf_get_offset( * TODO: Test this API. */ static inline uint32_t ia_css_circbuf_get_size( - ia_css_circbuf_t *cb) + ia_css_circbuf_t *cb) { OP___assert(cb); OP___assert(cb->desc); @@ -217,7 +217,7 @@ static inline uint32_t ia_css_circbuf_get_size( * @return the number of available elements. */ static inline uint32_t ia_css_circbuf_get_num_elems( - ia_css_circbuf_t *cb) + ia_css_circbuf_t *cb) { int num; @@ -239,7 +239,7 @@ static inline uint32_t ia_css_circbuf_get_num_elems( * - false when it is not empty. */ static inline bool ia_css_circbuf_is_empty( - ia_css_circbuf_t *cb) + ia_css_circbuf_t *cb) { OP___assert(cb); OP___assert(cb->desc); @@ -274,8 +274,8 @@ static inline bool ia_css_circbuf_is_full(ia_css_circbuf_t *cb) * @param elem The new element. */ static inline void ia_css_circbuf_write( - ia_css_circbuf_t *cb, - ia_css_circbuf_elem_t elem) + ia_css_circbuf_t *cb, + ia_css_circbuf_elem_t elem) { OP___assert(cb); OP___assert(cb->desc); @@ -298,8 +298,8 @@ static inline void ia_css_circbuf_write( * @param val The value to be pushed in. */ static inline void ia_css_circbuf_push( - ia_css_circbuf_t *cb, - uint32_t val) + ia_css_circbuf_t *cb, + uint32_t val) { ia_css_circbuf_elem_t elem; @@ -321,7 +321,7 @@ static inline void ia_css_circbuf_push( * @return: The number of free elements. */ static inline uint32_t ia_css_circbuf_get_free_elems( - ia_css_circbuf_t *cb) + ia_css_circbuf_t *cb) { OP___assert(cb); OP___assert(cb->desc); @@ -338,8 +338,8 @@ static inline uint32_t ia_css_circbuf_get_free_elems( * @return the elements value. */ uint32_t ia_css_circbuf_peek( - ia_css_circbuf_t *cb, - int offset); + ia_css_circbuf_t *cb, + int offset); /** * @brief Get an element in Circular Buffer. @@ -350,8 +350,8 @@ uint32_t ia_css_circbuf_peek( * @return the elements value. */ uint32_t ia_css_circbuf_peek_from_start( - ia_css_circbuf_t *cb, - int offset); + ia_css_circbuf_t *cb, + int offset); /** * @brief Increase Size of a Circular Buffer. @@ -369,8 +369,8 @@ uint32_t ia_css_circbuf_peek_from_start( * false on failure */ bool ia_css_circbuf_increase_size( - ia_css_circbuf_t *cb, - unsigned int sz_delta, - ia_css_circbuf_elem_t *elems); + ia_css_circbuf_t *cb, + unsigned int sz_delta, + ia_css_circbuf_elem_t *elems); #endif /*_IA_CSS_CIRCBUF_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h index 8724e60982879..47c488cec8adf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h @@ -35,7 +35,7 @@ * - false when it is not empty. */ static inline bool ia_css_circbuf_desc_is_empty( - ia_css_circbuf_desc_t *cb_desc) + ia_css_circbuf_desc_t *cb_desc) { OP___assert(cb_desc); return (cb_desc->end == cb_desc->start); @@ -52,7 +52,7 @@ static inline bool ia_css_circbuf_desc_is_empty( * - false when it is not full. */ static inline bool ia_css_circbuf_desc_is_full( - ia_css_circbuf_desc_t *cb_desc) + ia_css_circbuf_desc_t *cb_desc) { OP___assert(cb_desc); return (OP_std_modadd(cb_desc->end, 1, cb_desc->size) == cb_desc->start); @@ -65,8 +65,8 @@ static inline bool ia_css_circbuf_desc_is_full( * @param size The size of the circular buffer */ static inline void ia_css_circbuf_desc_init( - ia_css_circbuf_desc_t *cb_desc, - int8_t size) + ia_css_circbuf_desc_t *cb_desc, + int8_t size) { OP___assert(cb_desc); cb_desc->size = size; @@ -82,9 +82,9 @@ static inline void ia_css_circbuf_desc_init( * @return the position in the circular buffer descriptor. */ static inline uint8_t ia_css_circbuf_desc_get_pos_at_offset( - ia_css_circbuf_desc_t *cb_desc, - u32 base, - int offset) + ia_css_circbuf_desc_t *cb_desc, + u32 base, + int offset) { u8 dest; @@ -115,9 +115,9 @@ static inline uint8_t ia_css_circbuf_desc_get_pos_at_offset( * @return the offset. */ static inline int ia_css_circbuf_desc_get_offset( - ia_css_circbuf_desc_t *cb_desc, - u32 src_pos, - uint32_t dest_pos) + ia_css_circbuf_desc_t *cb_desc, + u32 src_pos, + uint32_t dest_pos) { int offset; @@ -137,15 +137,15 @@ static inline int ia_css_circbuf_desc_get_offset( * @return The number of available elements. */ static inline uint32_t ia_css_circbuf_desc_get_num_elems( - ia_css_circbuf_desc_t *cb_desc) + ia_css_circbuf_desc_t *cb_desc) { int num; OP___assert(cb_desc); num = ia_css_circbuf_desc_get_offset(cb_desc, - cb_desc->start, - cb_desc->end); + cb_desc->start, + cb_desc->end); return (uint32_t)num; } @@ -158,15 +158,15 @@ static inline uint32_t ia_css_circbuf_desc_get_num_elems( * @return: The number of free elements. */ static inline uint32_t ia_css_circbuf_desc_get_free_elems( - ia_css_circbuf_desc_t *cb_desc) + ia_css_circbuf_desc_t *cb_desc) { u32 num; OP___assert(cb_desc); num = ia_css_circbuf_desc_get_offset(cb_desc, - cb_desc->start, - cb_desc->end); + cb_desc->start, + cb_desc->end); return (cb_desc->size - num); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c index 1c48ceea72061..78e98268e1888 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c @@ -45,8 +45,8 @@ ia_css_circbuf_read(ia_css_circbuf_t *cb); * @param chunk_dest The position to which the first element in the chunk would be shift. */ static inline void ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, - u32 chunk_src, - uint32_t chunk_dest); + u32 chunk_src, + uint32_t chunk_dest); /* * @brief Get the "val" field in the element. @@ -69,8 +69,8 @@ ia_css_circbuf_elem_get_val(ia_css_circbuf_elem_t *elem); */ void ia_css_circbuf_create(ia_css_circbuf_t *cb, - ia_css_circbuf_elem_t *elems, - ia_css_circbuf_desc_t *desc) + ia_css_circbuf_elem_t *elems, + ia_css_circbuf_desc_t *desc) { u32 i; @@ -200,9 +200,9 @@ uint32_t ia_css_circbuf_peek_from_start(ia_css_circbuf_t *cb, int offset) * Please refer to "ia_css_circbuf.h" for details. */ bool ia_css_circbuf_increase_size( - ia_css_circbuf_t *cb, - unsigned int sz_delta, - ia_css_circbuf_elem_t *elems) + ia_css_circbuf_t *cb, + unsigned int sz_delta, + ia_css_circbuf_elem_t *elems) { u8 curr_size; u8 curr_end; @@ -216,7 +216,8 @@ bool ia_css_circbuf_increase_size( /* We assume cb was pre defined as global to allow * increase in size */ /* FM: are we sure this cannot cause size to become too big? */ - if (((uint8_t)(cb->desc->size + (uint8_t)sz_delta) > cb->desc->size) && ((uint8_t)sz_delta == sz_delta)) + if (((uint8_t)(cb->desc->size + (uint8_t)sz_delta) > cb->desc->size) && + ((uint8_t)sz_delta == sz_delta)) cb->desc->size += (uint8_t)sz_delta; else return false; /* overflow in size */ @@ -239,8 +240,8 @@ bool ia_css_circbuf_increase_size( } else { /* Move elements and fix Start*/ ia_css_circbuf_shift_chunk(cb, - curr_size - 1, - curr_size + sz_delta - 1); + curr_size - 1, + curr_size + sz_delta - 1); } } @@ -288,7 +289,7 @@ ia_css_circbuf_read(ia_css_circbuf_t *cb) */ static inline void ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, - u32 chunk_src, uint32_t chunk_dest) + u32 chunk_src, uint32_t chunk_dest) { int chunk_offset; int chunk_sz; @@ -296,14 +297,14 @@ ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, /* get the chunk offset and size */ chunk_offset = ia_css_circbuf_get_offset(cb, - chunk_src, chunk_dest); + chunk_src, chunk_dest); chunk_sz = ia_css_circbuf_get_offset(cb, cb->desc->start, chunk_src) + 1; /* shift each element to its terminal position */ for (i = 0; i < chunk_sz; i++) { /* copy the element from the source to the destination */ ia_css_circbuf_elem_cpy(&cb->elems[chunk_src], - &cb->elems[chunk_dest]); + &cb->elems[chunk_dest]); /* clear the source position */ ia_css_circbuf_elem_init(&cb->elems[chunk_src]); @@ -314,5 +315,6 @@ ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb, } /* adjust the index "start" */ - cb->desc->start = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, chunk_offset); + cb->desc->start = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, + chunk_offset); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h index 7a0a03e7b9886..8cf3b0e0cc394 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h @@ -69,7 +69,7 @@ bool ia_css_refcount_is_single(hrt_vaddress ptr); * return None */ void ia_css_refcount_clear(s32 id, - clear_func clear_func_ptr); + clear_func clear_func_ptr); /*! \brief Function to verify if object is valid * diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c index 6fca1554dd020..97670fd9e078f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c @@ -38,7 +38,7 @@ struct ia_css_refcount_list { static struct ia_css_refcount_list myrefcount; static struct ia_css_refcount_entry *refcount_find_entry(hrt_vaddress ptr, - bool firstfree) + bool firstfree) { u32 i; @@ -143,7 +143,7 @@ hrt_vaddress ia_css_refcount_increment(s32 id, hrt_vaddress ptr) if (entry->id != id) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "ia_css_refcount_increment(): Ref count IDS do not match!\n"); + "ia_css_refcount_increment(): Ref count IDS do not match!\n"); return mmgr_NULL; } @@ -193,7 +193,7 @@ bool ia_css_refcount_decrement(s32 id, hrt_vaddress ptr) valid anymore */ if (entry) IA_CSS_ERROR("id %x, ptr 0x%x entry %p entry->id %x entry->count %d\n", - id, ptr, entry, entry->id, entry->count); + id, ptr, entry, entry->id, entry->count); else IA_CSS_ERROR("entry NULL\n"); #ifdef ISP2401 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h index ba152c1e08124..551e8d7c5003e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h @@ -30,11 +30,11 @@ * */ void ia_css_pipe_get_copy_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *copy_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *copy_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); /* @brief Get a binary descriptor for vfpp. * @@ -46,10 +46,10 @@ void ia_css_pipe_get_copy_binarydesc( * */ void ia_css_pipe_get_vfpp_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *vf_pp_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *vf_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); /* @brief Get numerator and denominator of bayer downscaling factor. * @@ -63,9 +63,9 @@ void ia_css_pipe_get_vfpp_binarydesc( * */ enum ia_css_err sh_css_bds_factor_get_numerator_denominator( - unsigned int bds_factor, - unsigned int *bds_factor_numerator, - unsigned int *bds_factor_denominator); + unsigned int bds_factor, + unsigned int *bds_factor_numerator, + unsigned int *bds_factor_denominator); /* @brief Get a binary descriptor for preview stage. * @@ -79,12 +79,12 @@ enum ia_css_err sh_css_bds_factor_get_numerator_denominator( * */ enum ia_css_err ia_css_pipe_get_preview_binarydesc( - struct ia_css_pipe * const pipe, - struct ia_css_binary_descr *preview_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *bds_out_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info); + struct ia_css_pipe *const pipe, + struct ia_css_binary_descr *preview_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); /* @brief Get a binary descriptor for video stage. * @@ -97,13 +97,13 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc( * */ enum ia_css_err ia_css_pipe_get_video_binarydesc( - struct ia_css_pipe * const pipe, - struct ia_css_binary_descr *video_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *bds_out_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - int stream_config_left_padding); + struct ia_css_pipe *const pipe, + struct ia_css_binary_descr *video_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + int stream_config_left_padding); /* @brief Get a binary descriptor for yuv scaler stage. * @@ -117,12 +117,12 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( * */ void ia_css_pipe_get_yuvscaler_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *yuv_scaler_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *internal_out_info, - struct ia_css_frame_info *vf_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *yuv_scaler_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *internal_out_info, + struct ia_css_frame_info *vf_info); /* @brief Get a binary descriptor for capture pp stage. * @@ -134,11 +134,11 @@ void ia_css_pipe_get_yuvscaler_binarydesc( * */ void ia_css_pipe_get_capturepp_binarydesc( - struct ia_css_pipe * const pipe, - struct ia_css_binary_descr *capture_pp_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info); + struct ia_css_pipe *const pipe, + struct ia_css_binary_descr *capture_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); /* @brief Get a binary descriptor for primary capture. * @@ -151,12 +151,12 @@ void ia_css_pipe_get_capturepp_binarydesc( * */ void ia_css_pipe_get_primary_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *prim_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - unsigned int stage_idx); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *prim_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int stage_idx); /* @brief Get a binary descriptor for pre gdc stage. * @@ -168,10 +168,10 @@ void ia_css_pipe_get_primary_binarydesc( * */ void ia_css_pipe_get_pre_gdc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *gdc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); /* @brief Get a binary descriptor for gdc stage. * @@ -183,10 +183,10 @@ void ia_css_pipe_get_pre_gdc_binarydesc( * */ void ia_css_pipe_get_gdc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *gdc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); /* @brief Get a binary descriptor for post gdc. * @@ -199,11 +199,11 @@ void ia_css_pipe_get_gdc_binarydesc( * */ void ia_css_pipe_get_post_gdc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *post_gdc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *post_gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); /* @brief Get a binary descriptor for de. * @@ -215,10 +215,10 @@ void ia_css_pipe_get_post_gdc_binarydesc( * */ void ia_css_pipe_get_pre_de_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *pre_de_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *pre_de_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); /* @brief Get a binary descriptor for pre anr stage. * @@ -230,10 +230,10 @@ void ia_css_pipe_get_pre_de_binarydesc( * */ void ia_css_pipe_get_pre_anr_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *pre_anr_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *pre_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); /* @brief Get a binary descriptor for ANR stage. * @@ -245,10 +245,10 @@ void ia_css_pipe_get_pre_anr_binarydesc( * */ void ia_css_pipe_get_anr_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *anr_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); /* @brief Get a binary descriptor for post anr stage. * @@ -261,11 +261,11 @@ void ia_css_pipe_get_anr_binarydesc( * */ void ia_css_pipe_get_post_anr_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *post_anr_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *post_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info); /* @brief Get a binary descriptor for ldc stage. * @@ -277,10 +277,10 @@ void ia_css_pipe_get_post_anr_binarydesc( * */ void ia_css_pipe_get_ldc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *ldc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info); + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *ldc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info); /* @brief Calculates the required BDS factor * @@ -290,8 +290,8 @@ void ia_css_pipe_get_ldc_binarydesc( * @return IA_CSS_SUCCESS or error code upon error. */ enum ia_css_err binarydesc_calculate_bds_factor( - struct ia_css_resolution input_res, - struct ia_css_resolution output_res, - unsigned int *bds_factor); + struct ia_css_resolution input_res, + struct ia_css_resolution output_res, + unsigned int *bds_factor); #endif /* __IA_CSS_PIPE_BINARYDESC_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h index 92008ece64baf..e58c9190310d6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h @@ -22,30 +22,30 @@ #include "ia_css_pipeline_common.h" void ia_css_pipe_get_generic_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_binary *binary, - struct ia_css_frame *out_frame[], - struct ia_css_frame *in_frame, - struct ia_css_frame *vf_frame); + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame); void ia_css_pipe_get_firmwares_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_binary *binary, - struct ia_css_frame *out_frame[], - struct ia_css_frame *in_frame, - struct ia_css_frame *vf_frame, - const struct ia_css_fw_info *fw, - unsigned int mode); + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame, + const struct ia_css_fw_info *fw, + unsigned int mode); void ia_css_pipe_get_acc_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_binary *binary, - struct ia_css_fw_info *fw); + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_fw_info *fw); void ia_css_pipe_get_sp_func_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_frame *out_frame, - enum ia_css_pipeline_stage_sp_func sp_func, - unsigned int max_input_width); + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_frame *out_frame, + enum ia_css_pipeline_stage_sp_func sp_func, + unsigned int max_input_width); #endif /*__IA_CSS_PIPE_STAGEDESC__H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h index d5035824f64fa..ad60210abe951 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h @@ -26,14 +26,14 @@ * */ unsigned int ia_css_pipe_util_pipe_input_format_bpp( - const struct ia_css_pipe * const pipe); + const struct ia_css_pipe *const pipe); void ia_css_pipe_util_create_output_frames( - struct ia_css_frame *frames[]); + struct ia_css_frame *frames[]); void ia_css_pipe_util_set_output_frames( - struct ia_css_frame *frames[], - unsigned int idx, - struct ia_css_frame *frame); + struct ia_css_frame *frames[], + unsigned int idx, + struct ia_css_frame *frame); #endif /* __IA_CSS_PIPE_UTIL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c index 46c23caea40f9..e4f42cb75d5d8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c @@ -31,12 +31,12 @@ /* Generic descriptor for offline binaries. Internal function. */ static void pipe_binarydesc_get_offline( - struct ia_css_pipe const * const pipe, - const int mode, - struct ia_css_binary_descr *descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info[], - struct ia_css_frame_info *vf_info) + struct ia_css_pipe const *const pipe, + const int mode, + struct ia_css_binary_descr *descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info[], + struct ia_css_frame_info *vf_info) { unsigned int i; /* in_info, out_info, vf_info can be NULL */ @@ -77,11 +77,11 @@ static void pipe_binarydesc_get_offline( } void ia_css_pipe_get_copy_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *copy_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *copy_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) { struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; unsigned int i; @@ -105,10 +105,10 @@ void ia_css_pipe_get_copy_binarydesc( } void ia_css_pipe_get_vfpp_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *vf_pp_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *vf_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) { struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; unsigned int i; @@ -123,7 +123,7 @@ void ia_css_pipe_get_vfpp_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_VF_PP, - vf_pp_descr, in_info, out_infos, NULL); + vf_pp_descr, in_info, out_infos, NULL); vf_pp_descr->enable_fractional_ds = true; IA_CSS_LEAVE_PRIVATE(""); } @@ -144,9 +144,9 @@ static struct sh_css_bds_factor bds_factors_list[] = { }; enum ia_css_err sh_css_bds_factor_get_numerator_denominator( - unsigned int bds_factor, - unsigned int *bds_factor_numerator, - unsigned int *bds_factor_denominator) + unsigned int bds_factor, + unsigned int *bds_factor_numerator, + unsigned int *bds_factor_denominator) { unsigned int i; @@ -165,14 +165,14 @@ enum ia_css_err sh_css_bds_factor_get_numerator_denominator( } enum ia_css_err binarydesc_calculate_bds_factor( - struct ia_css_resolution input_res, - struct ia_css_resolution output_res, - unsigned int *bds_factor) + struct ia_css_resolution input_res, + struct ia_css_resolution output_res, + unsigned int *bds_factor) { unsigned int i; unsigned int in_w = input_res.width, - in_h = input_res.height, - out_w = output_res.width, out_h = output_res.height; + in_h = input_res.height, + out_w = output_res.width, out_h = output_res.height; unsigned int max_bds_factor = 8; unsigned int max_rounding_margin = 2; @@ -191,9 +191,9 @@ enum ia_css_err binarydesc_calculate_bds_factor( /* See width-wise and height-wise if this bds_factor * satisfies the condition */ bool cond = (out_w * num / den + delta > in_w) && - (out_w * num / den <= in_w) && - (out_h * num / den + delta > in_h) && - (out_h * num / den <= in_h); + (out_w * num / den <= in_w) && + (out_h * num / den + delta > in_h) && + (out_h * num / den <= in_h); if (cond) { *bds_factor = bds_factors_list[i].bds_factor; @@ -206,12 +206,12 @@ enum ia_css_err binarydesc_calculate_bds_factor( } enum ia_css_err ia_css_pipe_get_preview_binarydesc( - struct ia_css_pipe * const pipe, - struct ia_css_binary_descr *preview_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *bds_out_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info) + struct ia_css_pipe *const pipe, + struct ia_css_binary_descr *preview_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) { enum ia_css_err err; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -242,7 +242,7 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, mode, - preview_descr, in_info, out_infos, vf_info); + preview_descr, in_info, out_infos, vf_info); if (pipe->stream->config.online) { preview_descr->online = pipe->stream->config.online; preview_descr->two_ppc = @@ -264,8 +264,8 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc( pipe->config.bayer_ds_out_res.width; err = binarydesc_calculate_bds_factor(in_info->res, - bds_out_info->res, - &preview_descr->required_bds_factor); + bds_out_info->res, + &preview_descr->required_bds_factor); if (err != IA_CSS_SUCCESS) return err; } else { @@ -325,13 +325,13 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc( } enum ia_css_err ia_css_pipe_get_video_binarydesc( - struct ia_css_pipe * const pipe, - struct ia_css_binary_descr *video_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *bds_out_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - int stream_config_left_padding) + struct ia_css_pipe *const pipe, + struct ia_css_binary_descr *video_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *bds_out_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + int stream_config_left_padding) { int mode = IA_CSS_BINARY_MODE_VIDEO; unsigned int i; @@ -361,7 +361,7 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, mode, - video_descr, in_info, out_infos, vf_info); + video_descr, in_info, out_infos, vf_info); if (pipe->stream->config.online) { video_descr->online = pipe->stream->config.online; @@ -377,7 +377,7 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( HRT_GDC_N)); video_descr->enable_dz = pipe->config.enable_dz - || stream_dz_config; + || stream_dz_config; video_descr->dvs_env = pipe->config.dvs_envelope; video_descr->enable_yuv_ds = pipe->extra_config.enable_yuv_ds; video_descr->enable_high_speed = @@ -390,12 +390,12 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( video_descr->enable_fractional_ds = pipe->extra_config.enable_fractional_ds; video_descr->enable_dpc = - pipe->config.enable_dpc; + pipe->config.enable_dpc; #ifdef ISP2401 video_descr->enable_luma_only = - pipe->config.enable_luma_only; + pipe->config.enable_luma_only; video_descr->enable_tnr = - pipe->config.enable_tnr; + pipe->config.enable_tnr; #endif if (pipe->extra_config.enable_raw_binning) { @@ -408,7 +408,7 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( bds_out_info->padded_width = pipe->config.bayer_ds_out_res.width; err = - binarydesc_calculate_bds_factor( + binarydesc_calculate_bds_factor( in_info->res, bds_out_info->res, &video_descr->required_bds_factor); if (err != IA_CSS_SUCCESS) @@ -450,12 +450,12 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( } void ia_css_pipe_get_yuvscaler_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *yuv_scaler_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *internal_out_info, - struct ia_css_frame_info *vf_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *yuv_scaler_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *internal_out_info, + struct ia_css_frame_info *vf_info) { struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; struct ia_css_frame_info *this_vf_info = NULL; @@ -481,24 +481,24 @@ void ia_css_pipe_get_yuvscaler_binarydesc( if (vf_info) { this_vf_info = (vf_info->res.width == 0 && - vf_info->res.height == 0) ? NULL : vf_info; + vf_info->res.height == 0) ? NULL : vf_info; } pipe_binarydesc_get_offline(pipe, - IA_CSS_BINARY_MODE_CAPTURE_PP, - yuv_scaler_descr, - in_info, out_infos, this_vf_info); + IA_CSS_BINARY_MODE_CAPTURE_PP, + yuv_scaler_descr, + in_info, out_infos, this_vf_info); yuv_scaler_descr->enable_fractional_ds = true; IA_CSS_LEAVE_PRIVATE(""); } void ia_css_pipe_get_capturepp_binarydesc( - struct ia_css_pipe * const pipe, - struct ia_css_binary_descr *capture_pp_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info) + struct ia_css_pipe *const pipe, + struct ia_css_binary_descr *capture_pp_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -523,15 +523,15 @@ void ia_css_pipe_get_capturepp_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, - IA_CSS_BINARY_MODE_CAPTURE_PP, - capture_pp_descr, - in_info, out_infos, vf_info); + IA_CSS_BINARY_MODE_CAPTURE_PP, + capture_pp_descr, + in_info, out_infos, vf_info); capture_pp_descr->enable_capture_pp_bli = - pipe->config.default_capture_config.enable_capture_pp_bli; + pipe->config.default_capture_config.enable_capture_pp_bli; capture_pp_descr->enable_fractional_ds = true; capture_pp_descr->enable_xnr = - pipe->config.default_capture_config.enable_xnr != 0; + pipe->config.default_capture_config.enable_xnr != 0; IA_CSS_LEAVE_PRIVATE(""); } @@ -546,12 +546,12 @@ static unsigned int primary_hq_binary_modes[NUM_PRIMARY_HQ_STAGES] = { }; void ia_css_pipe_get_primary_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *prim_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - unsigned int stage_idx) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *prim_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int stage_idx) { enum ia_css_pipe_version pipe_version = pipe->config.isp_pipe_version; int mode; @@ -590,7 +590,7 @@ void ia_css_pipe_get_primary_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, mode, - prim_descr, in_info, out_infos, vf_info); + prim_descr, in_info, out_infos, vf_info); if (pipe->stream->config.online && pipe->stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) { @@ -605,7 +605,7 @@ void ia_css_pipe_get_primary_binarydesc( pipe->extra_config.enable_fractional_ds; #ifdef ISP2401 prim_descr->enable_luma_only = - pipe->config.enable_luma_only; + pipe->config.enable_luma_only; #endif /* We have both striped and non-striped primary binaries, * if continuous viewfinder is required, then we must select @@ -615,23 +615,24 @@ void ia_css_pipe_get_primary_binarydesc( prim_descr->striped = false; else #ifndef ISP2401 - prim_descr->striped = prim_descr->continuous && (!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf); + prim_descr->striped = prim_descr->continuous && + (!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf); #else prim_descr->striped = prim_descr->continuous && !pipe->stream->disable_cont_vf; if ((pipe->config.default_capture_config.enable_xnr != 0) && - (pipe->extra_config.enable_dvs_6axis == true)) - prim_descr->enable_xnr = true; + (pipe->extra_config.enable_dvs_6axis == true)) + prim_descr->enable_xnr = true; #endif } IA_CSS_LEAVE_PRIVATE(""); } void ia_css_pipe_get_pre_gdc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *pre_gdc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *pre_gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -649,16 +650,16 @@ void ia_css_pipe_get_pre_gdc_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP, - pre_gdc_descr, in_info, out_infos, NULL); + pre_gdc_descr, in_info, out_infos, NULL); pre_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version; IA_CSS_LEAVE_PRIVATE(""); } void ia_css_pipe_get_gdc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *gdc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -675,16 +676,16 @@ void ia_css_pipe_get_gdc_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_GDC, - gdc_descr, in_info, out_infos, NULL); + gdc_descr, in_info, out_infos, NULL); IA_CSS_LEAVE_PRIVATE(""); } void ia_css_pipe_get_post_gdc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *post_gdc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *post_gdc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -703,17 +704,17 @@ void ia_css_pipe_get_post_gdc_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP, - post_gdc_descr, in_info, out_infos, vf_info); + post_gdc_descr, in_info, out_infos, vf_info); post_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version; IA_CSS_LEAVE_PRIVATE(""); } void ia_css_pipe_get_pre_de_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *pre_de_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *pre_de_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -732,10 +733,10 @@ void ia_css_pipe_get_pre_de_binarydesc( if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP, - pre_de_descr, in_info, out_infos, NULL); + pre_de_descr, in_info, out_infos, NULL); else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) { pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_DE, - pre_de_descr, in_info, out_infos, NULL); + pre_de_descr, in_info, out_infos, NULL); } if (pipe->stream->config.online) { @@ -749,10 +750,10 @@ void ia_css_pipe_get_pre_de_binarydesc( } void ia_css_pipe_get_pre_anr_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *pre_anr_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *pre_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -770,7 +771,7 @@ void ia_css_pipe_get_pre_anr_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP, - pre_anr_descr, in_info, out_infos, NULL); + pre_anr_descr, in_info, out_infos, NULL); if (pipe->stream->config.online) { pre_anr_descr->online = true; @@ -783,10 +784,10 @@ void ia_css_pipe_get_pre_anr_binarydesc( } void ia_css_pipe_get_anr_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *anr_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -804,18 +805,18 @@ void ia_css_pipe_get_anr_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_ANR, - anr_descr, in_info, out_infos, NULL); + anr_descr, in_info, out_infos, NULL); anr_descr->isp_pipe_version = pipe->config.isp_pipe_version; IA_CSS_LEAVE_PRIVATE(""); } void ia_css_pipe_get_post_anr_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *post_anr_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *post_anr_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -834,17 +835,17 @@ void ia_css_pipe_get_post_anr_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP, - post_anr_descr, in_info, out_infos, vf_info); + post_anr_descr, in_info, out_infos, vf_info); post_anr_descr->isp_pipe_version = pipe->config.isp_pipe_version; IA_CSS_LEAVE_PRIVATE(""); } void ia_css_pipe_get_ldc_binarydesc( - struct ia_css_pipe const * const pipe, - struct ia_css_binary_descr *ldc_descr, - struct ia_css_frame_info *in_info, - struct ia_css_frame_info *out_info) + struct ia_css_pipe const *const pipe, + struct ia_css_binary_descr *ldc_descr, + struct ia_css_frame_info *in_info, + struct ia_css_frame_info *out_info) { unsigned int i; struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; @@ -871,8 +872,8 @@ void ia_css_pipe_get_ldc_binarydesc( out_infos[i] = NULL; pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_CAPTURE_PP, - ldc_descr, in_info, out_infos, NULL); + ldc_descr, in_info, out_infos, NULL); ldc_descr->enable_dvs_6axis = - pipe->extra_config.enable_dvs_6axis; + pipe->extra_config.enable_dvs_6axis; IA_CSS_LEAVE_PRIVATE(""); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c index 8b42e86dd9a2b..43f63cc20f493 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c @@ -17,11 +17,11 @@ #include "ia_css_debug.h" void ia_css_pipe_get_generic_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_binary *binary, - struct ia_css_frame *out_frame[], - struct ia_css_frame *in_frame, - struct ia_css_frame *vf_frame) + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame) { unsigned int i; @@ -49,17 +49,18 @@ void ia_css_pipe_get_generic_stage_desc( } void ia_css_pipe_get_firmwares_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_binary *binary, - struct ia_css_frame *out_frame[], - struct ia_css_frame *in_frame, - struct ia_css_frame *vf_frame, - const struct ia_css_fw_info *fw, - unsigned int mode) + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_frame *out_frame[], + struct ia_css_frame *in_frame, + struct ia_css_frame *vf_frame, + const struct ia_css_fw_info *fw, + unsigned int mode) { unsigned int i; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_firmwares_stage_desc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_get_firmwares_stage_desc() enter:\n"); stage_desc->binary = binary; stage_desc->firmware = fw; stage_desc->sp_func = IA_CSS_PIPELINE_NO_FUNC; @@ -73,13 +74,14 @@ void ia_css_pipe_get_firmwares_stage_desc( } void ia_css_pipe_get_acc_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_binary *binary, - struct ia_css_fw_info *fw) + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_binary *binary, + struct ia_css_fw_info *fw) { unsigned int i; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_acc_stage_desc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_get_acc_stage_desc() enter:\n"); stage_desc->binary = binary; stage_desc->firmware = fw; stage_desc->sp_func = IA_CSS_PIPELINE_NO_FUNC; @@ -93,14 +95,15 @@ void ia_css_pipe_get_acc_stage_desc( } void ia_css_pipe_get_sp_func_stage_desc( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_frame *out_frame, - enum ia_css_pipeline_stage_sp_func sp_func, - unsigned int max_input_width) + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_frame *out_frame, + enum ia_css_pipeline_stage_sp_func sp_func, + unsigned int max_input_width) { unsigned int i; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_sp_func_stage_desc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_get_sp_func_stage_desc() enter:\n"); stage_desc->binary = NULL; stage_desc->firmware = NULL; stage_desc->sp_func = sp_func; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c index 32bddb326ab83..cc06315507249 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c @@ -19,17 +19,17 @@ #include "assert_support.h" unsigned int ia_css_pipe_util_pipe_input_format_bpp( - const struct ia_css_pipe * const pipe) + const struct ia_css_pipe *const pipe) { assert(pipe); assert(pipe->stream); return ia_css_util_input_format_bpp(pipe->stream->config.input_config.format, - pipe->stream->config.pixels_per_clock == 2); + pipe->stream->config.pixels_per_clock == 2); } void ia_css_pipe_util_create_output_frames( - struct ia_css_frame *frames[]) + struct ia_css_frame *frames[]) { unsigned int i; @@ -40,9 +40,9 @@ void ia_css_pipe_util_create_output_frames( } void ia_css_pipe_util_set_output_frames( - struct ia_css_frame *frames[], - unsigned int idx, - struct ia_css_frame *frame) + struct ia_css_frame *frames[], + unsigned int idx, + struct ia_css_frame *frame) { assert(idx < IA_CSS_BINARY_MAX_OUTPUT_PORTS); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h index f7cebf085dca5..b09a0a009c087 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h @@ -29,7 +29,7 @@ * */ enum ia_css_err ia_css_convert_errno( - int in_err); + int in_err); /* @brief check vf frame info. * @@ -38,7 +38,7 @@ enum ia_css_err ia_css_convert_errno( * */ enum ia_css_err ia_css_util_check_vf_info( - const struct ia_css_frame_info * const info); + const struct ia_css_frame_info *const info); /* @brief check input configuration. * @@ -48,9 +48,9 @@ enum ia_css_err ia_css_util_check_vf_info( * */ enum ia_css_err ia_css_util_check_input( - const struct ia_css_stream_config * const stream_config, - bool must_be_raw, - bool must_be_yuv); + const struct ia_css_stream_config *const stream_config, + bool must_be_raw, + bool must_be_yuv); /* @brief check vf and out frame info. * @@ -60,8 +60,8 @@ enum ia_css_err ia_css_util_check_input( * */ enum ia_css_err ia_css_util_check_vf_out_info( - const struct ia_css_frame_info * const out_info, - const struct ia_css_frame_info * const vf_info); + const struct ia_css_frame_info *const out_info, + const struct ia_css_frame_info *const vf_info); /* @brief check width and height * @@ -71,8 +71,8 @@ enum ia_css_err ia_css_util_check_vf_out_info( * */ enum ia_css_err ia_css_util_check_res( - unsigned int width, - unsigned int height); + unsigned int width, + unsigned int height); #ifdef ISP2401 /* @brief compare resolutions (less or equal) @@ -84,8 +84,8 @@ enum ia_css_err ia_css_util_check_res( * */ bool ia_css_util_res_leq( - struct ia_css_resolution a, - struct ia_css_resolution b); + struct ia_css_resolution a, + struct ia_css_resolution b); /** * @brief Check if resolution is zero @@ -95,7 +95,7 @@ bool ia_css_util_res_leq( * @returns true if resolution is zero */ bool ia_css_util_resolution_is_zero( - const struct ia_css_resolution resolution); + const struct ia_css_resolution resolution); /** * @brief Check if resolution is even @@ -105,7 +105,7 @@ bool ia_css_util_resolution_is_zero( * @returns true if resolution is even */ bool ia_css_util_resolution_is_even( - const struct ia_css_resolution resolution); + const struct ia_css_resolution resolution); #endif /* @brief check width and height @@ -116,8 +116,8 @@ bool ia_css_util_resolution_is_even( * */ unsigned int ia_css_util_input_format_bpp( - enum atomisp_input_format stream_format, - bool two_ppc); + enum atomisp_input_format stream_format, + bool two_ppc); /* @brief check if input format it raw * @@ -126,7 +126,7 @@ unsigned int ia_css_util_input_format_bpp( * */ bool ia_css_util_is_input_format_raw( - enum atomisp_input_format stream_format); + enum atomisp_input_format stream_format); /* @brief check if input format it yuv * @@ -135,6 +135,6 @@ bool ia_css_util_is_input_format_raw( * */ bool ia_css_util_is_input_format_yuv( - enum atomisp_input_format stream_format); + enum atomisp_input_format stream_format); #endif /* __IA_CSS_UTIL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c index f50198b32888f..a44cd35acd0f3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c @@ -21,38 +21,38 @@ #include "ia_css_binary.h" enum ia_css_err ia_css_convert_errno( - int in_err) + int in_err) { enum ia_css_err out_err; switch (in_err) { - case 0: - out_err = IA_CSS_SUCCESS; - break; - case EINVAL: - out_err = IA_CSS_ERR_INVALID_ARGUMENTS; - break; - case ENODATA: - out_err = IA_CSS_ERR_QUEUE_IS_EMPTY; - break; - case ENOSYS: - case ENOTSUP: - out_err = IA_CSS_ERR_INTERNAL_ERROR; - break; - case ENOBUFS: - out_err = IA_CSS_ERR_QUEUE_IS_FULL; - break; - default: - out_err = IA_CSS_ERR_INTERNAL_ERROR; - break; + case 0: + out_err = IA_CSS_SUCCESS; + break; + case EINVAL: + out_err = IA_CSS_ERR_INVALID_ARGUMENTS; + break; + case ENODATA: + out_err = IA_CSS_ERR_QUEUE_IS_EMPTY; + break; + case ENOSYS: + case ENOTSUP: + out_err = IA_CSS_ERR_INTERNAL_ERROR; + break; + case ENOBUFS: + out_err = IA_CSS_ERR_QUEUE_IS_FULL; + break; + default: + out_err = IA_CSS_ERR_INTERNAL_ERROR; + break; } return out_err; } /* MW: Table look-up ??? */ unsigned int ia_css_util_input_format_bpp( - enum atomisp_input_format format, - bool two_ppc) + enum atomisp_input_format format, + bool two_ppc) { unsigned int rval = 0; @@ -114,7 +114,7 @@ unsigned int ia_css_util_input_format_bpp( } enum ia_css_err ia_css_util_check_vf_info( - const struct ia_css_frame_info * const info) + const struct ia_css_frame_info *const info) { enum ia_css_err err; unsigned int max_vf_width; @@ -130,8 +130,8 @@ enum ia_css_err ia_css_util_check_vf_info( } enum ia_css_err ia_css_util_check_vf_out_info( - const struct ia_css_frame_info * const out_info, - const struct ia_css_frame_info * const vf_info) + const struct ia_css_frame_info *const out_info, + const struct ia_css_frame_info *const vf_info) { enum ia_css_err err; @@ -191,18 +191,18 @@ bool ia_css_util_is_input_format_raw(enum atomisp_input_format format) bool ia_css_util_is_input_format_yuv(enum atomisp_input_format format) { return format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY || - format == ATOMISP_INPUT_FORMAT_YUV420_8 || - format == ATOMISP_INPUT_FORMAT_YUV420_10 || - format == ATOMISP_INPUT_FORMAT_YUV420_16 || - format == ATOMISP_INPUT_FORMAT_YUV422_8 || - format == ATOMISP_INPUT_FORMAT_YUV422_10 || - format == ATOMISP_INPUT_FORMAT_YUV422_16; + format == ATOMISP_INPUT_FORMAT_YUV420_8 || + format == ATOMISP_INPUT_FORMAT_YUV420_10 || + format == ATOMISP_INPUT_FORMAT_YUV420_16 || + format == ATOMISP_INPUT_FORMAT_YUV422_8 || + format == ATOMISP_INPUT_FORMAT_YUV422_10 || + format == ATOMISP_INPUT_FORMAT_YUV422_16; } enum ia_css_err ia_css_util_check_input( - const struct ia_css_stream_config * const stream_config, - bool must_be_raw, - bool must_be_yuv) + const struct ia_css_stream_config *const stream_config, + bool must_be_raw, + bool must_be_yuv) { assert(stream_config); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c index de99359a0fbcb..9fae24b3e689f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c @@ -24,10 +24,11 @@ void ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_iterator() enter:\n"); { unsigned int offset = 0; @@ -39,20 +40,23 @@ ia_css_configure_iterator( } if (size) { ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_iterator() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_copy_output() enter:\n"); { unsigned int offset = 0; @@ -64,20 +68,23 @@ ia_css_configure_copy_output( } if (size) { ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_copy_output() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_crop() enter:\n"); { unsigned int offset = 0; @@ -89,20 +96,23 @@ ia_css_configure_crop( } if (size) { ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_crop() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_fpn() enter:\n"); { unsigned int offset = 0; @@ -114,20 +124,23 @@ ia_css_configure_fpn( } if (size) { ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_fpn() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_dvs() enter:\n"); { unsigned int offset = 0; @@ -139,20 +152,23 @@ ia_css_configure_dvs( } if (size) { ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_dvs() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_qplane() enter:\n"); { unsigned int offset = 0; @@ -164,20 +180,23 @@ ia_css_configure_qplane( } if (size) { ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_qplane() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output0() enter:\n"); { unsigned int offset = 0; @@ -189,20 +208,23 @@ ia_css_configure_output0( } if (size) { ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output0() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output1() enter:\n"); { unsigned int offset = 0; @@ -214,20 +236,23 @@ ia_css_configure_output1( } if (size) { ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output1() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output() enter:\n"); { unsigned int offset = 0; @@ -239,10 +264,12 @@ ia_css_configure_output( } if (size) { ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ @@ -250,10 +277,11 @@ ia_css_configure_output( void ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() enter:\n"); { unsigned int offset = 0; @@ -265,10 +293,12 @@ ia_css_configure_sc( } if (size) { ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ @@ -276,10 +306,11 @@ ia_css_configure_sc( void ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_raw() enter:\n"); { unsigned int offset = 0; @@ -291,20 +322,23 @@ ia_css_configure_raw( } if (size) { ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_raw() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_tnr() enter:\n"); { unsigned int offset = 0; @@ -316,20 +350,23 @@ ia_css_configure_tnr( } if (size) { ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_tnr() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_ref() enter:\n"); { unsigned int offset = 0; @@ -341,20 +378,23 @@ ia_css_configure_ref( } if (size) { ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_ref() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_vf() enter:\n"); { unsigned int offset = 0; @@ -366,8 +406,10 @@ ia_css_configure_vf( } if (size) { ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_vf() leave:\n"); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h index 8aacd3dbc05a5..451fbae02aee0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h @@ -88,101 +88,101 @@ struct ia_css_config_memory_offsets { void ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ #ifdef ISP2401 void ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ #endif void ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); #endif /* IA_CSS_INCLUDE_CONFIGURATION */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c index ebf69c43e645c..28be9146530ad 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c @@ -66,48 +66,56 @@ static void ia_css_process_aa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; if (size) { struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; t->strength = params->aa_config.strength; } params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; } /* Code generated by genparam/gencode.c:gen_process_function() */ static void ia_css_process_anr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr() enter:\n"); ia_css_anr_encode((struct sh_css_isp_anr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->anr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->anr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr() leave:\n"); } } } @@ -116,28 +124,33 @@ size); static void ia_css_process_anr2( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr2() enter:\n"); ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->anr_thres, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->anr_thres, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr2() leave:\n"); } } } @@ -146,38 +159,43 @@ size); static void ia_css_process_bh( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } @@ -188,28 +206,33 @@ size); static void ia_css_process_cnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_cnr() enter:\n"); ia_css_cnr_encode((struct sh_css_isp_cnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_cnr() leave:\n"); } } } @@ -218,28 +241,33 @@ size); static void ia_css_process_crop( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_crop() enter:\n"); ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->crop_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->crop_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_crop() leave:\n"); } } } @@ -248,28 +276,33 @@ size); static void ia_css_process_csc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_csc() enter:\n"); ia_css_csc_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_csc() leave:\n"); } } } @@ -278,26 +311,29 @@ size); static void ia_css_process_dp( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); ia_css_dp_encode((struct sh_css_isp_dp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dp_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dp_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); } @@ -308,28 +344,33 @@ size); static void ia_css_process_bnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bnr() enter:\n"); ia_css_bnr_encode((struct sh_css_isp_bnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bnr() leave:\n"); } } } @@ -338,26 +379,29 @@ size); static void ia_css_process_de( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); ia_css_de_encode((struct sh_css_isp_de_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->de_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->de_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); } @@ -368,28 +412,33 @@ size); static void ia_css_process_ecd( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ecd() enter:\n"); ia_css_ecd_encode((struct sh_css_isp_ecd_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ecd_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ecd_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ecd() leave:\n"); } } } @@ -398,28 +447,33 @@ size); static void ia_css_process_formats( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_formats() enter:\n"); ia_css_formats_encode((struct sh_css_isp_formats_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->formats_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->formats_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_formats() leave:\n"); } } } @@ -428,28 +482,33 @@ size); static void ia_css_process_fpn( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_fpn() enter:\n"); ia_css_fpn_encode((struct sh_css_isp_fpn_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fpn_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fpn_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_fpn() leave:\n"); } } } @@ -458,44 +517,50 @@ size); static void ia_css_process_gc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); ia_css_gc_encode((struct sh_css_isp_gc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->gc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->gc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->gc_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->gc_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } @@ -506,26 +571,29 @@ size); static void ia_css_process_ce( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); ia_css_ce_encode((struct sh_css_isp_ce_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ce_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ce_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); } @@ -536,28 +604,33 @@ size); static void ia_css_process_yuv2rgb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yuv2rgb() enter:\n"); ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yuv2rgb_cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yuv2rgb_cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yuv2rgb() leave:\n"); } } } @@ -566,28 +639,33 @@ size); static void ia_css_process_rgb2yuv( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_rgb2yuv() enter:\n"); ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->rgb2yuv_cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->rgb2yuv_cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_rgb2yuv() leave:\n"); } } } @@ -596,28 +674,33 @@ size); static void ia_css_process_r_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_r_gamma() enter:\n"); ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->r_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->r_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_r_gamma() leave:\n"); } } } @@ -626,28 +709,33 @@ size); static void ia_css_process_g_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_g_gamma() enter:\n"); ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->g_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->g_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_g_gamma() leave:\n"); } } } @@ -656,28 +744,33 @@ size); static void ia_css_process_b_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_b_gamma() enter:\n"); ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], - ¶ms->b_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], + ¶ms->b_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_b_gamma() leave:\n"); } } } @@ -686,31 +779,36 @@ size); static void ia_css_process_uds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; if (size) { struct sh_css_sp_uds_params *p; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_uds() enter:\n"); p = (struct sh_css_sp_uds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; p->crop_pos = params->uds_config.crop_pos; p->uds = params->uds_config.uds; params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_uds() leave:\n"); } } } @@ -719,28 +817,33 @@ ia_css_process_uds( static void ia_css_process_raa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_raa() enter:\n"); ia_css_raa_encode((struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->raa_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->raa_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_raa() leave:\n"); } } } @@ -749,28 +852,33 @@ size); static void ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_s3a() enter:\n"); ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_s3a() leave:\n"); } } } @@ -779,44 +887,50 @@ size); static void ia_css_process_ob( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); ia_css_ob_encode((struct sh_css_isp_ob_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ob_config, -¶ms->stream_configs.ob, size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ob_config, + ¶ms->stream_configs.ob, size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->ob_config, -¶ms->stream_configs.ob, size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->ob_config, + ¶ms->stream_configs.ob, size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } @@ -827,28 +941,33 @@ ia_css_process_ob( static void ia_css_process_output( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_output() enter:\n"); ia_css_output_encode((struct sh_css_isp_output_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->output_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->output_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_output() leave:\n"); } } } @@ -857,26 +976,29 @@ size); static void ia_css_process_sc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); ia_css_sc_encode((struct sh_css_isp_sc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->sc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->sc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); } @@ -887,30 +1009,35 @@ size); static void ia_css_process_bds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; if (size) { struct sh_css_isp_bds_params *p; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bds() enter:\n"); p = (struct sh_css_isp_bds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; p->baf_strength = params->bds_config.strength; params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bds() leave:\n"); } } } @@ -919,28 +1046,33 @@ ia_css_process_bds( static void ia_css_process_tnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_tnr() enter:\n"); ia_css_tnr_encode((struct sh_css_isp_tnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->tnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->tnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_tnr() leave:\n"); } } } @@ -949,28 +1081,33 @@ size); static void ia_css_process_macc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_macc() enter:\n"); ia_css_macc_encode((struct sh_css_isp_macc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->macc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->macc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_macc() leave:\n"); } } } @@ -979,28 +1116,33 @@ size); static void ia_css_process_sdis_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horicoef() enter:\n"); ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horicoef() leave:\n"); } } } @@ -1009,28 +1151,33 @@ size); static void ia_css_process_sdis_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertcoef() enter:\n"); ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertcoef() leave:\n"); } } } @@ -1039,28 +1186,33 @@ size); static void ia_css_process_sdis_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horiproj() enter:\n"); ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horiproj() leave:\n"); } } } @@ -1069,28 +1221,33 @@ size); static void ia_css_process_sdis_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertproj() enter:\n"); ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertproj() leave:\n"); } } } @@ -1099,28 +1256,33 @@ size); static void ia_css_process_sdis2_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horicoef() enter:\n"); ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horicoef() leave:\n"); } } } @@ -1129,28 +1291,33 @@ size); static void ia_css_process_sdis2_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertcoef() enter:\n"); ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertcoef() leave:\n"); } } } @@ -1159,28 +1326,33 @@ size); static void ia_css_process_sdis2_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horiproj() enter:\n"); ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horiproj() leave:\n"); } } } @@ -1189,28 +1361,33 @@ size); static void ia_css_process_sdis2_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertproj() enter:\n"); ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertproj() leave:\n"); } } } @@ -1219,26 +1396,29 @@ size); static void ia_css_process_wb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); ia_css_wb_encode((struct sh_css_isp_wb_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->wb_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->wb_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); } @@ -1249,26 +1429,29 @@ size); static void ia_css_process_nr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); ia_css_nr_encode((struct sh_css_isp_ynr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); } @@ -1279,28 +1462,33 @@ size); static void ia_css_process_yee( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yee() enter:\n"); ia_css_yee_encode((struct sh_css_isp_yee_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yee_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yee_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yee() leave:\n"); } } } @@ -1309,28 +1497,33 @@ size); static void ia_css_process_ynr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ynr() enter:\n"); ia_css_ynr_encode((struct sh_css_isp_yee2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ynr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ynr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ynr() leave:\n"); } } } @@ -1339,26 +1532,29 @@ size); static void ia_css_process_fc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); ia_css_fc_encode((struct sh_css_isp_fc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); } @@ -1369,46 +1565,56 @@ size); static void ia_css_process_ctc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() enter:\n"); ia_css_ctc_encode((struct sh_css_isp_ctc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ctc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ctc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() enter:\n"); ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->ctc_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->ctc_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() leave:\n"); } } } @@ -1417,28 +1623,33 @@ size); static void ia_css_process_xnr_table( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr_table() enter:\n"); ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->xnr_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->xnr_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr_table() leave:\n"); } } } @@ -1447,28 +1658,33 @@ size); static void ia_css_process_xnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr() enter:\n"); ia_css_xnr_encode((struct sh_css_isp_xnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr() leave:\n"); } } } @@ -1477,47 +1693,57 @@ size); static void ia_css_process_xnr3( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() enter:\n"); ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr3_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr3_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() leave:\n"); } } #ifdef ISP2401 { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() enter:\n"); ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->xnr3_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() leave:\n"); } } #endif @@ -1526,9 +1752,9 @@ size); /* Code generated by genparam/gencode.c:gen_param_process_table() */ void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) = { + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) = { ia_css_process_aa, ia_css_process_anr, ia_css_process_anr2, @@ -1581,17 +1807,20 @@ void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( static void ia_css_get_dp_config(const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config){ + struct ia_css_dp_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_dp_config() enter: config=%p\n", + config); *config = params->dp_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_dp_config() leave\n"); ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1599,7 +1828,7 @@ ia_css_get_dp_config(const struct ia_css_isp_parameters *params, void ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) + const struct ia_css_dp_config *config) { if (!config) return; @@ -1613,24 +1842,28 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DP_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_dp_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_wb_config(const struct ia_css_isp_parameters *params, - struct ia_css_wb_config *config){ + struct ia_css_wb_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_wb_config() enter: config=%p\n", + config); *config = params->wb_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_wb_config() leave\n"); ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1638,7 +1871,7 @@ ia_css_get_wb_config(const struct ia_css_isp_parameters *params, void ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config) + const struct ia_css_wb_config *config) { if (!config) return; @@ -1652,24 +1885,28 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_WB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_wb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_tnr_config *config){ + struct ia_css_tnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_tnr_config() enter: config=%p\n", + config); *config = params->tnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_tnr_config() leave\n"); ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1677,7 +1914,7 @@ ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config) + const struct ia_css_tnr_config *config) { if (!config) return; @@ -1691,24 +1928,28 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_TNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_tnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ob_config(const struct ia_css_isp_parameters *params, - struct ia_css_ob_config *config){ + struct ia_css_ob_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ob_config() enter: config=%p\n", + config); *config = params->ob_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ob_config() leave\n"); ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1716,7 +1957,7 @@ ia_css_get_ob_config(const struct ia_css_isp_parameters *params, void ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config) + const struct ia_css_ob_config *config) { if (!config) return; @@ -1730,24 +1971,28 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ob_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_de_config(const struct ia_css_isp_parameters *params, - struct ia_css_de_config *config){ + struct ia_css_de_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_de_config() enter: config=%p\n", + config); *config = params->de_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_de_config() leave\n"); ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1755,7 +2000,7 @@ ia_css_get_de_config(const struct ia_css_isp_parameters *params, void ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config) + const struct ia_css_de_config *config) { if (!config) return; @@ -1769,24 +2014,28 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_de_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_anr_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_config *config){ + struct ia_css_anr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr_config() enter: config=%p\n", + config); *config = params->anr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr_config() leave\n"); ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1794,7 +2043,7 @@ ia_css_get_anr_config(const struct ia_css_isp_parameters *params, void ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config) + const struct ia_css_anr_config *config) { if (!config) return; @@ -1808,24 +2057,28 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_anr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_thres *config){ + struct ia_css_anr_thres *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr2_config() enter: config=%p\n", + config); *config = params->anr_thres; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr2_config() leave\n"); ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1833,7 +2086,7 @@ ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config) + const struct ia_css_anr_thres *config) { if (!config) return; @@ -1847,24 +2100,28 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR2_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_anr2_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ce_config(const struct ia_css_isp_parameters *params, - struct ia_css_ce_config *config){ + struct ia_css_ce_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ce_config() enter: config=%p\n", + config); *config = params->ce_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ce_config() leave\n"); ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1872,7 +2129,7 @@ ia_css_get_ce_config(const struct ia_css_isp_parameters *params, void ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config) + const struct ia_css_ce_config *config) { if (!config) return; @@ -1886,24 +2143,28 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ce_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, - struct ia_css_ecd_config *config){ + struct ia_css_ecd_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ecd_config() enter: config=%p\n", + config); *config = params->ecd_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ecd_config() leave\n"); ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1911,7 +2172,7 @@ ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config) + const struct ia_css_ecd_config *config) { if (!config) return; @@ -1925,24 +2186,28 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ECD_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ecd_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, - struct ia_css_ynr_config *config){ + struct ia_css_ynr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ynr_config() enter: config=%p\n", + config); *config = params->ynr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ynr_config() leave\n"); ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1950,7 +2215,7 @@ ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config) + const struct ia_css_ynr_config *config) { if (!config) return; @@ -1964,24 +2229,28 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ynr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_fc_config(const struct ia_css_isp_parameters *params, - struct ia_css_fc_config *config){ + struct ia_css_fc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_fc_config() enter: config=%p\n", + config); *config = params->fc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_fc_config() leave\n"); ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1989,7 +2258,7 @@ ia_css_get_fc_config(const struct ia_css_isp_parameters *params, void ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config) + const struct ia_css_fc_config *config) { if (!config) return; @@ -2003,24 +2272,28 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_fc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_cnr_config *config){ + struct ia_css_cnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_cnr_config() enter: config=%p\n", + config); *config = params->cnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_cnr_config() leave\n"); ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2028,7 +2301,7 @@ ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config) + const struct ia_css_cnr_config *config) { if (!config) return; @@ -2042,24 +2315,28 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_cnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_macc_config(const struct ia_css_isp_parameters *params, - struct ia_css_macc_config *config){ + struct ia_css_macc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_macc_config() enter: config=%p\n", + config); *config = params->macc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_macc_config() leave\n"); ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2067,7 +2344,7 @@ ia_css_get_macc_config(const struct ia_css_isp_parameters *params, void ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config) + const struct ia_css_macc_config *config) { if (!config) return; @@ -2081,24 +2358,28 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_MACC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_macc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_config *config){ + struct ia_css_ctc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ctc_config() enter: config=%p\n", + config); *config = params->ctc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ctc_config() leave\n"); ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2106,7 +2387,7 @@ ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config) + const struct ia_css_ctc_config *config) { if (!config) return; @@ -2120,31 +2401,35 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CTC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ctc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_aa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config){ + struct ia_css_aa_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_aa_config() enter: config=%p\n", + config); *config = params->aa_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_aa_config() leave\n"); } /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) + const struct ia_css_aa_config *config) { if (!config) return; @@ -2157,24 +2442,28 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_AA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_aa_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_yuv2rgb_config() enter: config=%p\n", + config); *config = params->yuv2rgb_cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_yuv2rgb_config() leave\n"); ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2182,7 +2471,7 @@ ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2196,24 +2485,28 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YUV2RGB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_yuv2rgb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_rgb2yuv_config() enter: config=%p\n", + config); *config = params->rgb2yuv_cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_rgb2yuv_config() leave\n"); ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2221,7 +2514,7 @@ ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2235,24 +2528,28 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_RGB2YUV_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_rgb2yuv_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_csc_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_csc_config() enter: config=%p\n", + config); *config = params->cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_csc_config() leave\n"); ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2260,7 +2557,7 @@ ia_css_get_csc_config(const struct ia_css_isp_parameters *params, void ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2274,24 +2571,28 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CSC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_csc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_nr_config(const struct ia_css_isp_parameters *params, - struct ia_css_nr_config *config){ + struct ia_css_nr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_nr_config() enter: config=%p\n", + config); *config = params->nr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_nr_config() leave\n"); ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2299,7 +2600,7 @@ ia_css_get_nr_config(const struct ia_css_isp_parameters *params, void ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) + const struct ia_css_nr_config *config) { if (!config) return; @@ -2314,24 +2615,28 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_NR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_nr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_gc_config(const struct ia_css_isp_parameters *params, - struct ia_css_gc_config *config){ + struct ia_css_gc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_gc_config() enter: config=%p\n", + config); *config = params->gc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_gc_config() leave\n"); ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2339,7 +2644,7 @@ ia_css_get_gc_config(const struct ia_css_isp_parameters *params, void ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config) + const struct ia_css_gc_config *config) { if (!config) return; @@ -2353,24 +2658,28 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_GC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_gc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horicoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horicoef_config() leave\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2378,13 +2687,14 @@ ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_horicoef_config() enter:\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2395,24 +2705,28 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertcoef_config() leave\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2420,13 +2734,14 @@ ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_vertcoef_config() enter:\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2437,24 +2752,28 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horiproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horiproj_config() leave\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2462,13 +2781,14 @@ ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_horiproj_config() enter:\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2479,24 +2799,28 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertproj_config() leave\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2504,13 +2828,14 @@ ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_vertproj_config() enter:\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2521,24 +2846,28 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horicoef_config() leave\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2546,13 +2875,14 @@ ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_horicoef_config() enter:\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2563,24 +2893,28 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertcoef_config() leave\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2588,13 +2922,14 @@ ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_vertcoef_config() enter:\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2605,24 +2940,28 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horiproj_config() leave\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2630,13 +2969,14 @@ ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_horiproj_config() enter:\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2647,24 +2987,28 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertproj_config() leave\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2672,13 +3016,14 @@ ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_vertproj_config() enter:\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2689,24 +3034,28 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_r_gamma_config() enter: config=%p\n", + config); *config = params->r_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_r_gamma_config() leave\n"); ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2714,7 +3063,7 @@ ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2728,24 +3077,28 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_R_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_r_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_g_gamma_config() enter: config=%p\n", + config); *config = params->g_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_g_gamma_config() leave\n"); ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2753,7 +3106,7 @@ ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2767,24 +3120,28 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_G_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_g_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_b_gamma_config() enter: config=%p\n", + config); *config = params->b_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_b_gamma_config() leave\n"); ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2792,7 +3149,7 @@ ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2806,24 +3163,28 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_B_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_b_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_table *config){ + struct ia_css_xnr_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_table_config() enter: config=%p\n", + config); *config = params->xnr_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_table_config() leave\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2831,13 +3192,14 @@ ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config) + const struct ia_css_xnr_table *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_xnr_table_config() enter:\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; params->config_changed[IA_CSS_XNR_TABLE_ID] = true; @@ -2845,24 +3207,28 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_TABLE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr_table_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_formats_config(const struct ia_css_isp_parameters *params, - struct ia_css_formats_config *config){ + struct ia_css_formats_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_formats_config() enter: config=%p\n", + config); *config = params->formats_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_formats_config() leave\n"); ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2870,7 +3236,7 @@ ia_css_get_formats_config(const struct ia_css_isp_parameters *params, void ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config) + const struct ia_css_formats_config *config) { if (!config) return; @@ -2884,24 +3250,28 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FORMATS_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_formats_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_config *config){ + struct ia_css_xnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_config() enter: config=%p\n", + config); *config = params->xnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_config() leave\n"); ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2909,7 +3279,7 @@ ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config) + const struct ia_css_xnr_config *config) { if (!config) return; @@ -2923,24 +3293,28 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr3_config *config){ + struct ia_css_xnr3_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr3_config() enter: config=%p\n", + config); *config = params->xnr3_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr3_config() leave\n"); ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2948,7 +3322,7 @@ ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config) + const struct ia_css_xnr3_config *config) { if (!config) return; @@ -2962,24 +3336,28 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR3_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr3_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, - struct ia_css_3a_config *config){ + struct ia_css_3a_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_s3a_config() enter: config=%p\n", + config); *config = params->s3a_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_s3a_config() leave\n"); ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2987,7 +3365,7 @@ ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config) + const struct ia_css_3a_config *config) { if (!config) return; @@ -3002,24 +3380,28 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_S3A_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_s3a_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_output_config(const struct ia_css_isp_parameters *params, - struct ia_css_output_config *config){ + struct ia_css_output_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_output_config() enter: config=%p\n", + config); *config = params->output_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_output_config() leave\n"); ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -3027,7 +3409,7 @@ ia_css_get_output_config(const struct ia_css_isp_parameters *params, void ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config) + const struct ia_css_output_config *config) { if (!config) return; @@ -3041,14 +3423,15 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OUTPUT_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_output_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) { ia_css_get_dp_config(params, config->dp_config); ia_css_get_wb_config(params, config->wb_config); @@ -3093,7 +3476,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params, void ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) { ia_css_set_dp_config(params, config->dp_config); ia_css_set_wb_config(params, config->wb_config); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h index b5175c253c61d..7b81ffa29d8bd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h @@ -150,237 +150,237 @@ struct ia_css_memory_offsets { struct ia_css_pipeline_stage; /* forward declaration */ extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params); + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config); + const struct ia_css_dp_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config); + const struct ia_css_wb_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config); + const struct ia_css_tnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config); + const struct ia_css_ob_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config); + const struct ia_css_de_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config); + const struct ia_css_anr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config); + const struct ia_css_anr_thres *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config); + const struct ia_css_ce_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config); + const struct ia_css_ecd_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config); + const struct ia_css_ynr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config); + const struct ia_css_fc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config); + const struct ia_css_cnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config); + const struct ia_css_macc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config); + const struct ia_css_ctc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config); + const struct ia_css_aa_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config); + const struct ia_css_nr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config); + const struct ia_css_gc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config); + const struct ia_css_xnr_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config); + const struct ia_css_formats_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config); + const struct ia_css_xnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config); + const struct ia_css_xnr3_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config); + const struct ia_css_3a_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config); + const struct ia_css_output_config *config); /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) ; #ifdef ISP2401 @@ -389,7 +389,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params, void ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) ; #ifdef ISP2401 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c index c14323224d126..42e0344c677d1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c @@ -22,9 +22,10 @@ static void ia_css_initialize_aa_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_aa_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; @@ -32,18 +33,21 @@ ia_css_initialize_aa_state( unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; if (size) - memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); + memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + 0, size); } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_aa_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_cnr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; @@ -52,20 +56,22 @@ ia_css_initialize_cnr_state( if (size) { ia_css_init_cnr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_cnr2_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr2_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; @@ -74,20 +80,22 @@ ia_css_initialize_cnr2_state( if (size) { ia_css_init_cnr2_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr2_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_dp_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_dp_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; @@ -96,20 +104,22 @@ ia_css_initialize_dp_state( if (size) { ia_css_init_dp_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_dp_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_de_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_de_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; @@ -118,20 +128,22 @@ ia_css_initialize_de_state( if (size) { ia_css_init_de_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_de_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_tnr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_tnr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; @@ -140,20 +152,22 @@ ia_css_initialize_tnr_state( if (size) { ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_tnr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_ref_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ref_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; @@ -162,20 +176,22 @@ ia_css_initialize_ref_state( if (size) { ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ref_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_ynr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ynr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; @@ -184,16 +200,18 @@ ia_css_initialize_ynr_state( if (size) { ia_css_init_ynr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ynr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_state_init_table() */ -void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = { +void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( + const struct ia_css_binary *binary) = { ia_css_initialize_aa_state, ia_css_initialize_cnr_state, ia_css_initialize_cnr2_state, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h index 732adafb0a633..cc9cdcd0e2be8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h @@ -65,7 +65,8 @@ struct ia_css_state_memory_offsets { #include "ia_css_binary.h" /* struct ia_css_binary */ /* Code generated by genparam/genstate.c:gen_state_init_table() */ -extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary); +extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( + const struct ia_css_binary *binary); #endif /* IA_CSS_INCLUDE_STATE */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h index ba43562f12874..8741b8347dd42 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h @@ -122,7 +122,7 @@ #define _DMA_V2_ZERO_EXTEND 0 #define _DMA_V2_SIGN_EXTEND 1 - /* SLAVE address map */ +/* SLAVE address map */ #define _DMA_V2_SEL_FSM_CMD 0 #define _DMA_V2_SEL_CH_REG 1 #define _DMA_V2_SEL_CONN_GROUP 2 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h index 33f8b5ce9ba3e..3cc627aa6b091 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h @@ -25,43 +25,43 @@ #define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ #define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */ - /* The supported range is [-256, .., +256] */ - /* in 14-bit signed notation, */ - /* We need all ten bits (MSB must be zero). */ - /* -s is inserted to solve this issue, and */ - /* therefore "1" is equal to +256. */ +/* The supported range is [-256, .., +256] */ +/* in 14-bit signed notation, */ +/* We need all ten bits (MSB must be zero). */ +/* -s is inserted to solve this issue, and */ +/* therefore "1" is equal to +256. */ #define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) #define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */ - /* 2 bytes per coefficient */ +/* 2 bytes per coefficient */ #define _HRT_GDC_REG_ALIGN 4 - // 31 30 29 25 24 0 - // |-----|---|--------|------------------------| - // | CMD | C | Reg_ID | Value | +// 31 30 29 25 24 0 +// |-----|---|--------|------------------------| +// | CMD | C | Reg_ID | Value | - // There are just two commands possible for the GDC block: - // 1 - Configure reg - // 0 - Data token +// There are just two commands possible for the GDC block: +// 1 - Configure reg +// 0 - Data token - // C - Reserved bit - // Used in protocol to indicate whether it is C-run or other type of runs - // In case of C-run, this bit has a value of 1, for all the other runs, it is 0. +// C - Reserved bit +// Used in protocol to indicate whether it is C-run or other type of runs +// In case of C-run, this bit has a value of 1, for all the other runs, it is 0. - // Reg_ID - Address of the register to be configured +// Reg_ID - Address of the register to be configured - // Value - Value to store to the addressed register, maximum of 24 bits +// Value - Value to store to the addressed register, maximum of 24 bits - // Configure reg command is not followed by any other token. - // The address of the register and the data to be filled in is contained in the same token +// Configure reg command is not followed by any other token. +// The address of the register and the data to be filled in is contained in the same token - // When the first data token is received, it must be: - // 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, - // 2. P0'X (device configured in one of the tetragon modes) - // After the first data token is received, pre-defined number of tokens with the following meaning follow: - // 1. two tokens: SRC address ; DST address - // 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address +// When the first data token is received, it must be: +// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, +// 2. P0'X (device configured in one of the tetragon modes) +// After the first data token is received, pre-defined number of tokens with the following meaning follow: +// 1. two tokens: SRC address ; DST address +// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address #define HRT_GDC_CONFIG_CMD 1 #define HRT_GDC_DATA_CMD 0 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h index d02435a3ec5a1..96286a141b00b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h @@ -18,10 +18,10 @@ #define _HRT_GPIO_BLOCK_REG_ALIGN 4 /* R/W registers */ -#define _gpio_block_reg_do_e 0 +#define _gpio_block_reg_do_e 0 #define _gpio_block_reg_do_select 1 -#define _gpio_block_reg_do_0 2 -#define _gpio_block_reg_do_1 3 +#define _gpio_block_reg_do_0 2 +#define _gpio_block_reg_do_1 3 #define _gpio_block_reg_do_pwm_cnt_0 4 #define _gpio_block_reg_do_pwm_cnt_1 5 #define _gpio_block_reg_do_pwm_cnt_2 6 @@ -36,6 +36,6 @@ #define _gpio_block_reg_di_active_level 15 /* read-only registers */ -#define _gpio_block_reg_di 16 +#define _gpio_block_reg_di 16 #endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h index b366dbf5019df..dd47972f619d8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h @@ -23,50 +23,50 @@ * The definitions are taken from _defs.h */ typedef enum hrt_isp_css_irq { - hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, - hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, - hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, - hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, - hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, - hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, - hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, - hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, - hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, - hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, - hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, - hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, - hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, - hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, - hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, - hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, - hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, - hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, #ifdef _HIVE_ISP_CSS_2401_SYSTEM - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, #else - hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, + hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, #endif - hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, - hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, - hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, - hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, - hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, - hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, - hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, - /* this must (obviously) be the last on in the enum */ - hrt_isp_css_irq_num_irqs + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, + /* this must (obviously) be the last on in the enum */ + hrt_isp_css_irq_num_irqs } hrt_isp_css_irq_t; typedef enum hrt_isp_css_irq_status { - hrt_isp_css_irq_status_error, - hrt_isp_css_irq_status_more_irqs, - hrt_isp_css_irq_status_success + hrt_isp_css_irq_status_error, + hrt_isp_css_irq_status_more_irqs, + hrt_isp_css_irq_status_success } hrt_isp_css_irq_status_t; #endif /* _HIVE_ISP_CSS_IRQ_TYPES_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h index ebebb38624cb0..843c819cf519e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h @@ -45,26 +45,26 @@ #define ISP_VMEM_ELEM_PRECISION 14 #define ISP_VMEM_IS_BAMEM 1 #if ISP_VMEM_IS_BAMEM - #define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 - #define ISP_VMEM_BAMEM_LATENCY 5 - #define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 - #define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 - #define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 - #define ISP_VMEM_BAMEM_LININT 0 - #define ISP_VMEM_BAMEM_DAP_BITS 3 - #define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 - #define ISP_VMEM_BAMEM_PID_BITS 3 - #define ISP_VMEM_BAMEM_OFFSET_BITS 19 - #define ISP_VMEM_BAMEM_ADDRESS_BITS 25 - #define ISP_VMEM_BAMEM_RID_BITS 4 - #define ISP_VMEM_BAMEM_TRANSPOSITION 1 - #define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 - #define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 - #define ISP_VMEM_BAMEM_LUT_ELEMS 16 - #define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 - #define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 - #define ISP_VMEM_BAMEM_SMART_FETCH 1 - #define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 +#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 +#define ISP_VMEM_BAMEM_LATENCY 5 +#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 +#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 +#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 +#define ISP_VMEM_BAMEM_LININT 0 +#define ISP_VMEM_BAMEM_DAP_BITS 3 +#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 +#define ISP_VMEM_BAMEM_PID_BITS 3 +#define ISP_VMEM_BAMEM_OFFSET_BITS 19 +#define ISP_VMEM_BAMEM_ADDRESS_BITS 25 +#define ISP_VMEM_BAMEM_RID_BITS 4 +#define ISP_VMEM_BAMEM_TRANSPOSITION 1 +#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 +#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 +#define ISP_VMEM_BAMEM_LUT_ELEMS 16 +#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 +#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 +#define ISP_VMEM_BAMEM_SMART_FETCH 1 +#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 #endif /* ISP_VMEM_IS_BAMEM */ #define ISP_PMEM_DEPTH 2048 #define ISP_PMEM_WIDTH 640 @@ -111,8 +111,8 @@ #define ISP_SRU_GUARDING 1 #define ISP_VLSU_GUARDING 1 -#define ISP_VRF_RAM 1 -#define ISP_SRF_RAM 1 +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 #define ISP_SPLIT_VMUL_VADD_IS 0 #define ISP_RFSPLIT_FPGA 0 @@ -166,7 +166,7 @@ #define ISP_VMEM_WIDTH 896 #define ISP_VMEM_ALIGN 128 #if ISP_VMEM_IS_BAMEM - #define ISP_VMEM_ALIGN_ELEM 2 +#define ISP_VMEM_ALIGN_ELEM 2 #endif /* ISP_VMEM_IS_BAMEM */ #define ISP_SIMDLSU 1 #define ISP_LSU_IMM_BITS 12 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h index e00bc841d0f0d..e9106d1e6a63d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h @@ -31,8 +31,8 @@ typedef char *tmemvectors, *tmemvectoru, *tvector; #define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) #if ISP_HAS_HIST - #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) - #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) +#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) +#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) #endif #endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c index de99359a0fbcb..9fae24b3e689f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c @@ -24,10 +24,11 @@ void ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_iterator() enter:\n"); { unsigned int offset = 0; @@ -39,20 +40,23 @@ ia_css_configure_iterator( } if (size) { ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_iterator() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_copy_output() enter:\n"); { unsigned int offset = 0; @@ -64,20 +68,23 @@ ia_css_configure_copy_output( } if (size) { ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_copy_output() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_crop() enter:\n"); { unsigned int offset = 0; @@ -89,20 +96,23 @@ ia_css_configure_crop( } if (size) { ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_crop() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_fpn() enter:\n"); { unsigned int offset = 0; @@ -114,20 +124,23 @@ ia_css_configure_fpn( } if (size) { ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_fpn() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_dvs() enter:\n"); { unsigned int offset = 0; @@ -139,20 +152,23 @@ ia_css_configure_dvs( } if (size) { ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_dvs() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_qplane() enter:\n"); { unsigned int offset = 0; @@ -164,20 +180,23 @@ ia_css_configure_qplane( } if (size) { ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_qplane() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output0() enter:\n"); { unsigned int offset = 0; @@ -189,20 +208,23 @@ ia_css_configure_output0( } if (size) { ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output0() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output1() enter:\n"); { unsigned int offset = 0; @@ -214,20 +236,23 @@ ia_css_configure_output1( } if (size) { ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output1() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output() enter:\n"); { unsigned int offset = 0; @@ -239,10 +264,12 @@ ia_css_configure_output( } if (size) { ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ @@ -250,10 +277,11 @@ ia_css_configure_output( void ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() enter:\n"); { unsigned int offset = 0; @@ -265,10 +293,12 @@ ia_css_configure_sc( } if (size) { ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ @@ -276,10 +306,11 @@ ia_css_configure_sc( void ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_raw() enter:\n"); { unsigned int offset = 0; @@ -291,20 +322,23 @@ ia_css_configure_raw( } if (size) { ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_raw() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_tnr() enter:\n"); { unsigned int offset = 0; @@ -316,20 +350,23 @@ ia_css_configure_tnr( } if (size) { ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_tnr() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_ref() enter:\n"); { unsigned int offset = 0; @@ -341,20 +378,23 @@ ia_css_configure_ref( } if (size) { ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_ref() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_vf() enter:\n"); { unsigned int offset = 0; @@ -366,8 +406,10 @@ ia_css_configure_vf( } if (size) { ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_vf() leave:\n"); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h index 8aacd3dbc05a5..451fbae02aee0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h @@ -88,101 +88,101 @@ struct ia_css_config_memory_offsets { void ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ #ifdef ISP2401 void ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ #endif void ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); #endif /* IA_CSS_INCLUDE_CONFIGURATION */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c index 3afe861b709ef..2df57c4864b72 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c @@ -67,16 +67,18 @@ static void ia_css_process_aa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; if (size) { struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; t->strength = params->aa_config.strength; } } @@ -85,28 +87,33 @@ ia_css_process_aa( static void ia_css_process_anr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr() enter:\n"); ia_css_anr_encode((struct sh_css_isp_anr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->anr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->anr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr() leave:\n"); } } } @@ -115,28 +122,33 @@ size); static void ia_css_process_anr2( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr2() enter:\n"); ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->anr_thres, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->anr_thres, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr2() leave:\n"); } } } @@ -145,38 +157,43 @@ size); static void ia_css_process_bh( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } @@ -187,28 +204,33 @@ size); static void ia_css_process_cnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_cnr() enter:\n"); ia_css_cnr_encode((struct sh_css_isp_cnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_cnr() leave:\n"); } } } @@ -217,28 +239,33 @@ size); static void ia_css_process_crop( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_crop() enter:\n"); ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->crop_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->crop_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_crop() leave:\n"); } } } @@ -247,28 +274,33 @@ size); static void ia_css_process_csc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_csc() enter:\n"); ia_css_csc_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_csc() leave:\n"); } } } @@ -277,26 +309,29 @@ size); static void ia_css_process_dp( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); ia_css_dp_encode((struct sh_css_isp_dp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dp_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dp_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); } @@ -307,28 +342,33 @@ size); static void ia_css_process_bnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bnr() enter:\n"); ia_css_bnr_encode((struct sh_css_isp_bnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bnr() leave:\n"); } } } @@ -337,26 +377,29 @@ size); static void ia_css_process_de( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); ia_css_de_encode((struct sh_css_isp_de_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->de_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->de_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); } @@ -367,28 +410,33 @@ size); static void ia_css_process_ecd( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ecd() enter:\n"); ia_css_ecd_encode((struct sh_css_isp_ecd_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ecd_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ecd_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ecd() leave:\n"); } } } @@ -397,28 +445,33 @@ size); static void ia_css_process_formats( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_formats() enter:\n"); ia_css_formats_encode((struct sh_css_isp_formats_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->formats_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->formats_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_formats() leave:\n"); } } } @@ -427,28 +480,33 @@ size); static void ia_css_process_fpn( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_fpn() enter:\n"); ia_css_fpn_encode((struct sh_css_isp_fpn_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fpn_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fpn_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_fpn() leave:\n"); } } } @@ -457,44 +515,50 @@ size); static void ia_css_process_gc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); ia_css_gc_encode((struct sh_css_isp_gc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->gc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->gc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->gc_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->gc_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } @@ -505,26 +569,29 @@ size); static void ia_css_process_ce( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); ia_css_ce_encode((struct sh_css_isp_ce_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ce_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ce_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); } @@ -535,28 +602,33 @@ size); static void ia_css_process_yuv2rgb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yuv2rgb() enter:\n"); ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yuv2rgb_cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yuv2rgb_cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yuv2rgb() leave:\n"); } } } @@ -565,28 +637,33 @@ size); static void ia_css_process_rgb2yuv( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_rgb2yuv() enter:\n"); ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->rgb2yuv_cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->rgb2yuv_cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_rgb2yuv() leave:\n"); } } } @@ -595,28 +672,33 @@ size); static void ia_css_process_r_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_r_gamma() enter:\n"); ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->r_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->r_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_r_gamma() leave:\n"); } } } @@ -625,28 +707,33 @@ size); static void ia_css_process_g_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_g_gamma() enter:\n"); ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->g_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->g_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_g_gamma() leave:\n"); } } } @@ -655,28 +742,33 @@ size); static void ia_css_process_b_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_b_gamma() enter:\n"); ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], - ¶ms->b_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], + ¶ms->b_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_b_gamma() leave:\n"); } } } @@ -685,31 +777,36 @@ size); static void ia_css_process_uds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; if (size) { struct sh_css_sp_uds_params *p; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_uds() enter:\n"); p = (struct sh_css_sp_uds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; p->crop_pos = params->uds_config.crop_pos; p->uds = params->uds_config.uds; params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_uds() leave:\n"); } } } @@ -718,28 +815,33 @@ ia_css_process_uds( static void ia_css_process_raa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_raa() enter:\n"); ia_css_raa_encode((struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->raa_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->raa_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_raa() leave:\n"); } } } @@ -748,28 +850,33 @@ size); static void ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_s3a() enter:\n"); ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_s3a() leave:\n"); } } } @@ -778,44 +885,50 @@ size); static void ia_css_process_ob( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); ia_css_ob_encode((struct sh_css_isp_ob_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ob_config, -¶ms->stream_configs.ob, size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ob_config, + ¶ms->stream_configs.ob, size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->ob_config, -¶ms->stream_configs.ob, size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->ob_config, + ¶ms->stream_configs.ob, size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } @@ -826,28 +939,33 @@ ia_css_process_ob( static void ia_css_process_output( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_output() enter:\n"); ia_css_output_encode((struct sh_css_isp_output_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->output_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->output_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_output() leave:\n"); } } } @@ -856,26 +974,29 @@ size); static void ia_css_process_sc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); ia_css_sc_encode((struct sh_css_isp_sc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->sc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->sc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); } @@ -886,30 +1007,35 @@ size); static void ia_css_process_bds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; if (size) { struct sh_css_isp_bds_params *p; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bds() enter:\n"); p = (struct sh_css_isp_bds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; p->baf_strength = params->bds_config.strength; params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bds() leave:\n"); } } } @@ -918,28 +1044,33 @@ ia_css_process_bds( static void ia_css_process_tnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_tnr() enter:\n"); ia_css_tnr_encode((struct sh_css_isp_tnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->tnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->tnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_tnr() leave:\n"); } } } @@ -948,28 +1079,33 @@ size); static void ia_css_process_macc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_macc() enter:\n"); ia_css_macc_encode((struct sh_css_isp_macc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->macc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->macc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_macc() leave:\n"); } } } @@ -978,28 +1114,33 @@ size); static void ia_css_process_sdis_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horicoef() enter:\n"); ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horicoef() leave:\n"); } } } @@ -1008,28 +1149,33 @@ size); static void ia_css_process_sdis_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertcoef() enter:\n"); ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertcoef() leave:\n"); } } } @@ -1038,28 +1184,33 @@ size); static void ia_css_process_sdis_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horiproj() enter:\n"); ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horiproj() leave:\n"); } } } @@ -1068,28 +1219,33 @@ size); static void ia_css_process_sdis_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertproj() enter:\n"); ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertproj() leave:\n"); } } } @@ -1098,28 +1254,33 @@ size); static void ia_css_process_sdis2_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horicoef() enter:\n"); ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horicoef() leave:\n"); } } } @@ -1128,28 +1289,33 @@ size); static void ia_css_process_sdis2_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertcoef() enter:\n"); ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertcoef() leave:\n"); } } } @@ -1158,28 +1324,33 @@ size); static void ia_css_process_sdis2_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horiproj() enter:\n"); ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horiproj() leave:\n"); } } } @@ -1188,28 +1359,33 @@ size); static void ia_css_process_sdis2_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertproj() enter:\n"); ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertproj() leave:\n"); } } } @@ -1218,26 +1394,29 @@ size); static void ia_css_process_wb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); ia_css_wb_encode((struct sh_css_isp_wb_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->wb_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->wb_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); } @@ -1248,26 +1427,29 @@ size); static void ia_css_process_nr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); ia_css_nr_encode((struct sh_css_isp_ynr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); } @@ -1278,28 +1460,33 @@ size); static void ia_css_process_yee( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yee() enter:\n"); ia_css_yee_encode((struct sh_css_isp_yee_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yee_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yee_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yee() leave:\n"); } } } @@ -1308,28 +1495,33 @@ size); static void ia_css_process_ynr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ynr() enter:\n"); ia_css_ynr_encode((struct sh_css_isp_yee2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ynr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ynr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ynr() leave:\n"); } } } @@ -1338,26 +1530,29 @@ size); static void ia_css_process_fc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); ia_css_fc_encode((struct sh_css_isp_fc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); } @@ -1368,46 +1563,56 @@ size); static void ia_css_process_ctc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() enter:\n"); ia_css_ctc_encode((struct sh_css_isp_ctc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ctc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ctc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() enter:\n"); ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->ctc_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->ctc_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() leave:\n"); } } } @@ -1416,28 +1621,33 @@ size); static void ia_css_process_xnr_table( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr_table() enter:\n"); ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->xnr_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->xnr_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr_table() leave:\n"); } } } @@ -1446,28 +1656,33 @@ size); static void ia_css_process_xnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr() enter:\n"); ia_css_xnr_encode((struct sh_css_isp_xnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr() leave:\n"); } } } @@ -1476,47 +1691,57 @@ size); static void ia_css_process_xnr3( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() enter:\n"); ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr3_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr3_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() leave:\n"); } } #ifdef ISP2401 { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() enter:\n"); ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->xnr3_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() leave:\n"); } } #endif @@ -1525,9 +1750,9 @@ size); /* Code generated by genparam/gencode.c:gen_param_process_table() */ void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) = { + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) = { ia_css_process_aa, ia_css_process_anr, ia_css_process_anr2, @@ -1580,17 +1805,20 @@ void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( static void ia_css_get_dp_config(const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config){ + struct ia_css_dp_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_dp_config() enter: config=%p\n", + config); *config = params->dp_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_dp_config() leave\n"); ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1598,7 +1826,7 @@ ia_css_get_dp_config(const struct ia_css_isp_parameters *params, void ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) + const struct ia_css_dp_config *config) { if (!config) return; @@ -1612,24 +1840,28 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DP_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_dp_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_wb_config(const struct ia_css_isp_parameters *params, - struct ia_css_wb_config *config){ + struct ia_css_wb_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_wb_config() enter: config=%p\n", + config); *config = params->wb_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_wb_config() leave\n"); ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1637,7 +1869,7 @@ ia_css_get_wb_config(const struct ia_css_isp_parameters *params, void ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config) + const struct ia_css_wb_config *config) { if (!config) return; @@ -1651,24 +1883,28 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_WB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_wb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_tnr_config *config){ + struct ia_css_tnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_tnr_config() enter: config=%p\n", + config); *config = params->tnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_tnr_config() leave\n"); ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1676,7 +1912,7 @@ ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config) + const struct ia_css_tnr_config *config) { if (!config) return; @@ -1690,24 +1926,28 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_TNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_tnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ob_config(const struct ia_css_isp_parameters *params, - struct ia_css_ob_config *config){ + struct ia_css_ob_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ob_config() enter: config=%p\n", + config); *config = params->ob_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ob_config() leave\n"); ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1715,7 +1955,7 @@ ia_css_get_ob_config(const struct ia_css_isp_parameters *params, void ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config) + const struct ia_css_ob_config *config) { if (!config) return; @@ -1729,24 +1969,28 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ob_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_de_config(const struct ia_css_isp_parameters *params, - struct ia_css_de_config *config){ + struct ia_css_de_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_de_config() enter: config=%p\n", + config); *config = params->de_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_de_config() leave\n"); ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1754,7 +1998,7 @@ ia_css_get_de_config(const struct ia_css_isp_parameters *params, void ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config) + const struct ia_css_de_config *config) { if (!config) return; @@ -1768,24 +2012,28 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_de_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_anr_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_config *config){ + struct ia_css_anr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr_config() enter: config=%p\n", + config); *config = params->anr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr_config() leave\n"); ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1793,7 +2041,7 @@ ia_css_get_anr_config(const struct ia_css_isp_parameters *params, void ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config) + const struct ia_css_anr_config *config) { if (!config) return; @@ -1807,24 +2055,28 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_anr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_thres *config){ + struct ia_css_anr_thres *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr2_config() enter: config=%p\n", + config); *config = params->anr_thres; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr2_config() leave\n"); ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1832,7 +2084,7 @@ ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config) + const struct ia_css_anr_thres *config) { if (!config) return; @@ -1846,24 +2098,28 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR2_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_anr2_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ce_config(const struct ia_css_isp_parameters *params, - struct ia_css_ce_config *config){ + struct ia_css_ce_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ce_config() enter: config=%p\n", + config); *config = params->ce_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ce_config() leave\n"); ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1871,7 +2127,7 @@ ia_css_get_ce_config(const struct ia_css_isp_parameters *params, void ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config) + const struct ia_css_ce_config *config) { if (!config) return; @@ -1885,24 +2141,28 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ce_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, - struct ia_css_ecd_config *config){ + struct ia_css_ecd_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ecd_config() enter: config=%p\n", + config); *config = params->ecd_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ecd_config() leave\n"); ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1910,7 +2170,7 @@ ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config) + const struct ia_css_ecd_config *config) { if (!config) return; @@ -1924,24 +2184,28 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ECD_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ecd_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, - struct ia_css_ynr_config *config){ + struct ia_css_ynr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ynr_config() enter: config=%p\n", + config); *config = params->ynr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ynr_config() leave\n"); ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1949,7 +2213,7 @@ ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config) + const struct ia_css_ynr_config *config) { if (!config) return; @@ -1963,24 +2227,28 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ynr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_fc_config(const struct ia_css_isp_parameters *params, - struct ia_css_fc_config *config){ + struct ia_css_fc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_fc_config() enter: config=%p\n", + config); *config = params->fc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_fc_config() leave\n"); ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1988,7 +2256,7 @@ ia_css_get_fc_config(const struct ia_css_isp_parameters *params, void ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config) + const struct ia_css_fc_config *config) { if (!config) return; @@ -2002,24 +2270,28 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_fc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_cnr_config *config){ + struct ia_css_cnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_cnr_config() enter: config=%p\n", + config); *config = params->cnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_cnr_config() leave\n"); ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2027,7 +2299,7 @@ ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config) + const struct ia_css_cnr_config *config) { if (!config) return; @@ -2041,24 +2313,28 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_cnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_macc_config(const struct ia_css_isp_parameters *params, - struct ia_css_macc_config *config){ + struct ia_css_macc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_macc_config() enter: config=%p\n", + config); *config = params->macc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_macc_config() leave\n"); ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2066,7 +2342,7 @@ ia_css_get_macc_config(const struct ia_css_isp_parameters *params, void ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config) + const struct ia_css_macc_config *config) { if (!config) return; @@ -2080,24 +2356,28 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_MACC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_macc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_config *config){ + struct ia_css_ctc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ctc_config() enter: config=%p\n", + config); *config = params->ctc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ctc_config() leave\n"); ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2105,7 +2385,7 @@ ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config) + const struct ia_css_ctc_config *config) { if (!config) return; @@ -2119,31 +2399,35 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CTC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ctc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_aa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config){ + struct ia_css_aa_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_aa_config() enter: config=%p\n", + config); *config = params->aa_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_aa_config() leave\n"); } /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) + const struct ia_css_aa_config *config) { if (!config) return; @@ -2156,24 +2440,28 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_AA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_aa_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_yuv2rgb_config() enter: config=%p\n", + config); *config = params->yuv2rgb_cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_yuv2rgb_config() leave\n"); ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2181,7 +2469,7 @@ ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2195,24 +2483,28 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YUV2RGB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_yuv2rgb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_rgb2yuv_config() enter: config=%p\n", + config); *config = params->rgb2yuv_cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_rgb2yuv_config() leave\n"); ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2220,7 +2512,7 @@ ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2234,24 +2526,28 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_RGB2YUV_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_rgb2yuv_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_csc_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_csc_config() enter: config=%p\n", + config); *config = params->cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_csc_config() leave\n"); ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2259,7 +2555,7 @@ ia_css_get_csc_config(const struct ia_css_isp_parameters *params, void ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2273,24 +2569,28 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CSC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_csc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_nr_config(const struct ia_css_isp_parameters *params, - struct ia_css_nr_config *config){ + struct ia_css_nr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_nr_config() enter: config=%p\n", + config); *config = params->nr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_nr_config() leave\n"); ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2298,7 +2598,7 @@ ia_css_get_nr_config(const struct ia_css_isp_parameters *params, void ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) + const struct ia_css_nr_config *config) { if (!config) return; @@ -2313,24 +2613,28 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_NR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_nr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_gc_config(const struct ia_css_isp_parameters *params, - struct ia_css_gc_config *config){ + struct ia_css_gc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_gc_config() enter: config=%p\n", + config); *config = params->gc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_gc_config() leave\n"); ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2338,7 +2642,7 @@ ia_css_get_gc_config(const struct ia_css_isp_parameters *params, void ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config) + const struct ia_css_gc_config *config) { if (!config) return; @@ -2352,24 +2656,28 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_GC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_gc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horicoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horicoef_config() leave\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2377,13 +2685,14 @@ ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_horicoef_config() enter:\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2394,24 +2703,28 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertcoef_config() leave\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2419,13 +2732,14 @@ ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_vertcoef_config() enter:\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2436,24 +2750,28 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horiproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horiproj_config() leave\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2461,13 +2779,14 @@ ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_horiproj_config() enter:\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2478,24 +2797,28 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertproj_config() leave\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2503,13 +2826,14 @@ ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_vertproj_config() enter:\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2520,24 +2844,28 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horicoef_config() leave\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2545,13 +2873,14 @@ ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_horicoef_config() enter:\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2562,24 +2891,28 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertcoef_config() leave\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2587,13 +2920,14 @@ ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_vertcoef_config() enter:\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2604,24 +2938,28 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horiproj_config() leave\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2629,13 +2967,14 @@ ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_horiproj_config() enter:\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2646,24 +2985,28 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertproj_config() leave\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2671,13 +3014,14 @@ ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_vertproj_config() enter:\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2688,24 +3032,28 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_r_gamma_config() enter: config=%p\n", + config); *config = params->r_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_r_gamma_config() leave\n"); ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2713,7 +3061,7 @@ ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2727,24 +3075,28 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_R_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_r_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_g_gamma_config() enter: config=%p\n", + config); *config = params->g_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_g_gamma_config() leave\n"); ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2752,7 +3104,7 @@ ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2766,24 +3118,28 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_G_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_g_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_b_gamma_config() enter: config=%p\n", + config); *config = params->b_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_b_gamma_config() leave\n"); ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2791,7 +3147,7 @@ ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2805,24 +3161,28 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_B_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_b_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_table *config){ + struct ia_css_xnr_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_table_config() enter: config=%p\n", + config); *config = params->xnr_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_table_config() leave\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2830,13 +3190,14 @@ ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config) + const struct ia_css_xnr_table *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_xnr_table_config() enter:\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; params->config_changed[IA_CSS_XNR_TABLE_ID] = true; @@ -2844,24 +3205,28 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_TABLE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr_table_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_formats_config(const struct ia_css_isp_parameters *params, - struct ia_css_formats_config *config){ + struct ia_css_formats_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_formats_config() enter: config=%p\n", + config); *config = params->formats_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_formats_config() leave\n"); ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2869,7 +3234,7 @@ ia_css_get_formats_config(const struct ia_css_isp_parameters *params, void ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config) + const struct ia_css_formats_config *config) { if (!config) return; @@ -2883,24 +3248,28 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FORMATS_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_formats_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_config *config){ + struct ia_css_xnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_config() enter: config=%p\n", + config); *config = params->xnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_config() leave\n"); ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2908,7 +3277,7 @@ ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config) + const struct ia_css_xnr_config *config) { if (!config) return; @@ -2922,24 +3291,28 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr3_config *config){ + struct ia_css_xnr3_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr3_config() enter: config=%p\n", + config); *config = params->xnr3_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr3_config() leave\n"); ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2947,7 +3320,7 @@ ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config) + const struct ia_css_xnr3_config *config) { if (!config) return; @@ -2961,24 +3334,28 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR3_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr3_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, - struct ia_css_3a_config *config){ + struct ia_css_3a_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_s3a_config() enter: config=%p\n", + config); *config = params->s3a_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_s3a_config() leave\n"); ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2986,7 +3363,7 @@ ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config) + const struct ia_css_3a_config *config) { if (!config) return; @@ -3001,24 +3378,28 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_S3A_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_s3a_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_output_config(const struct ia_css_isp_parameters *params, - struct ia_css_output_config *config){ + struct ia_css_output_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_output_config() enter: config=%p\n", + config); *config = params->output_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_output_config() leave\n"); ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -3026,7 +3407,7 @@ ia_css_get_output_config(const struct ia_css_isp_parameters *params, void ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config) + const struct ia_css_output_config *config) { if (!config) return; @@ -3040,14 +3421,15 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OUTPUT_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_output_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) { ia_css_get_dp_config(params, config->dp_config); ia_css_get_wb_config(params, config->wb_config); @@ -3092,7 +3474,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params, void ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) { ia_css_set_dp_config(params, config->dp_config); ia_css_set_wb_config(params, config->wb_config); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h index b5175c253c61d..7b81ffa29d8bd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h @@ -150,237 +150,237 @@ struct ia_css_memory_offsets { struct ia_css_pipeline_stage; /* forward declaration */ extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params); + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config); + const struct ia_css_dp_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config); + const struct ia_css_wb_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config); + const struct ia_css_tnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config); + const struct ia_css_ob_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config); + const struct ia_css_de_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config); + const struct ia_css_anr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config); + const struct ia_css_anr_thres *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config); + const struct ia_css_ce_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config); + const struct ia_css_ecd_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config); + const struct ia_css_ynr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config); + const struct ia_css_fc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config); + const struct ia_css_cnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config); + const struct ia_css_macc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config); + const struct ia_css_ctc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config); + const struct ia_css_aa_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config); + const struct ia_css_nr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config); + const struct ia_css_gc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config); + const struct ia_css_xnr_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config); + const struct ia_css_formats_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config); + const struct ia_css_xnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config); + const struct ia_css_xnr3_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config); + const struct ia_css_3a_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config); + const struct ia_css_output_config *config); /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) ; #ifdef ISP2401 @@ -389,7 +389,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params, void ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) ; #ifdef ISP2401 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c index dcc42c1ce94ef..c54787f3fc244 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c @@ -23,27 +23,31 @@ static void ia_css_initialize_aa_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_aa_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; if (size) - memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); + memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + 0, size); } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_aa_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_cnr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; @@ -52,20 +56,22 @@ ia_css_initialize_cnr_state( if (size) { ia_css_init_cnr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_cnr2_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr2_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; @@ -74,20 +80,22 @@ ia_css_initialize_cnr2_state( if (size) { ia_css_init_cnr2_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr2_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_dp_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_dp_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; @@ -96,20 +104,22 @@ ia_css_initialize_dp_state( if (size) { ia_css_init_dp_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_dp_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_de_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_de_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; @@ -118,20 +128,22 @@ ia_css_initialize_de_state( if (size) { ia_css_init_de_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_de_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_tnr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_tnr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; @@ -140,20 +152,22 @@ ia_css_initialize_tnr_state( if (size) { ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_tnr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_ref_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ref_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; @@ -162,20 +176,22 @@ ia_css_initialize_ref_state( if (size) { ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ref_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_ynr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ynr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; @@ -184,16 +200,18 @@ ia_css_initialize_ynr_state( if (size) { ia_css_init_ynr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ynr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_state_init_table() */ -void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = { +void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( + const struct ia_css_binary *binary) = { ia_css_initialize_aa_state, ia_css_initialize_cnr_state, ia_css_initialize_cnr2_state, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h index 732adafb0a633..cc9cdcd0e2be8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h @@ -65,7 +65,8 @@ struct ia_css_state_memory_offsets { #include "ia_css_binary.h" /* struct ia_css_binary */ /* Code generated by genparam/genstate.c:gen_state_init_table() */ -extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary); +extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( + const struct ia_css_binary *binary); #endif /* IA_CSS_INCLUDE_STATE */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h index c8bcef24d7c28..940e79c7e3378 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h @@ -34,27 +34,27 @@ * Refer to "csi_rx_public.h" for details. */ static inline void csi_rx_fe_ctrl_get_state( - const csi_rx_frontend_ID_t ID, - csi_rx_fe_ctrl_state_t *state) + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state) { u32 i; state->enable = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ENABLE_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ENABLE_REG_IDX); state->nof_enable_lanes = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX); state->error_handling = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ERROR_HANDLING_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ERROR_HANDLING_REG_IDX); state->status = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_REG_IDX); state->status_dlane_hs = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX); state->status_dlane_lp = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX); state->clane.termen = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX); state->clane.settle = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX); /* * Get the values of the register-set per @@ -62,9 +62,9 @@ static inline void csi_rx_fe_ctrl_get_state( */ for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) { csi_rx_fe_ctrl_get_dlane_state( - ID, - i, - &state->dlane[i]); + ID, + i, + &state->dlane[i]); } } @@ -73,14 +73,14 @@ static inline void csi_rx_fe_ctrl_get_state( * Refer to "csi_rx_public.h" for details. */ static inline void csi_rx_fe_ctrl_get_dlane_state( - const csi_rx_frontend_ID_t ID, - const u32 lane, - csi_rx_fe_ctrl_lane_t *dlane_state) + const csi_rx_frontend_ID_t ID, + const u32 lane, + csi_rx_fe_ctrl_lane_t *dlane_state) { dlane_state->termen = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane)); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane)); dlane_state->settle = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane)); + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane)); } /** @@ -88,27 +88,36 @@ static inline void csi_rx_fe_ctrl_get_dlane_state( * Refer to "csi_rx_public.h" for details. */ static inline void csi_rx_fe_ctrl_dump_state( - const csi_rx_frontend_ID_t ID, - csi_rx_fe_ctrl_state_t *state) + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state) { u32 i; - ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x\n", ID, state->enable); - ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x\n", ID, state->nof_enable_lanes); - ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x\n", ID, state->error_handling); + ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x\n", ID, + state->enable); + ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x\n", ID, + state->nof_enable_lanes); + ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x\n", ID, + state->error_handling); ia_css_print("CSI RX FE STATE Controller %d Status 0x%x\n", ID, state->status); - ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x\n", ID, state->status_dlane_hs); - ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x\n", ID, state->status_dlane_lp); - ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x\n", ID, state->clane.termen); - ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x\n", ID, state->clane.settle); + ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x\n", ID, + state->status_dlane_hs); + ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x\n", ID, + state->status_dlane_lp); + ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x\n", ID, + state->clane.termen); + ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x\n", ID, + state->clane.settle); /* * Get the values of the register-set per * dlane. */ for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) { - ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x\n", ID, i, state->dlane[i].termen); - ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x\n", ID, i, state->dlane[i].settle); + ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x\n", ID, i, + state->dlane[i].termen); + ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x\n", ID, i, + state->dlane[i].settle); } } @@ -117,61 +126,61 @@ static inline void csi_rx_fe_ctrl_dump_state( * Refer to "csi_rx_public.h" for details. */ static inline void csi_rx_be_ctrl_get_state( - const csi_rx_backend_ID_t ID, - csi_rx_be_ctrl_state_t *state) + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state) { u32 i; state->enable = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_ENABLE_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_ENABLE_REG_IDX); state->status = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_STATUS_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_STATUS_REG_IDX); for (i = 0; i < N_CSI_RX_BE_MIPI_COMP_FMT_REG ; i++) { state->comp_format_reg[i] = - csi_rx_be_ctrl_reg_load(ID, - _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX + i); + csi_rx_be_ctrl_reg_load(ID, + _HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX + i); } state->raw16 = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_IDX); state->raw18 = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_IDX); state->force_raw8 = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_FORCE_RAW8_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_FORCE_RAW8_REG_IDX); state->irq_status = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX); #if 0 /* device access error for these registers */ /* ToDo: rootcause this failure */ state->custom_mode_enable = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_EN_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_EN_REG_IDX); state->custom_mode_data_state = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX); for (i = 0; i < N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) { state->pec[i] = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX + i); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX + i); } state->custom_mode_valid_eop_config = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_REG_IDX); #endif state->global_lut_disregard_reg = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX); state->packet_status_stall = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX); /* * Get the values of the register-set per * lut. */ for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) { state->short_packet_lut_entry[i] = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX + i); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX + i); } for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) { state->long_packet_lut_entry[i] = - csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX + i); + csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX + i); } } @@ -180,8 +189,8 @@ static inline void csi_rx_be_ctrl_get_state( * Refer to "csi_rx_public.h" for details. */ static inline void csi_rx_be_ctrl_dump_state( - const csi_rx_backend_ID_t ID, - csi_rx_be_ctrl_state_t *state) + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state) { u32 i; @@ -189,28 +198,38 @@ static inline void csi_rx_be_ctrl_dump_state( ia_css_print("CSI RX BE STATE Controller %d Status 0x%x\n", ID, state->status); for (i = 0; i < N_CSI_RX_BE_MIPI_COMP_FMT_REG ; i++) { - ia_css_print("CSI RX BE STATE Controller %d comp format reg vc%d value 0x%x\n", ID, i, state->status); + ia_css_print("CSI RX BE STATE Controller %d comp format reg vc%d value 0x%x\n", + ID, i, state->status); } ia_css_print("CSI RX BE STATE Controller %d RAW16 0x%x\n", ID, state->raw16); ia_css_print("CSI RX BE STATE Controller %d RAW18 0x%x\n", ID, state->raw18); - ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x\n", ID, state->force_raw8); - ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x\n", ID, state->irq_status); + ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x\n", ID, + state->force_raw8); + ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x\n", ID, + state->irq_status); #if 0 /* ToDo:Getting device access error for this register */ for (i = 0; i < N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) { - ia_css_print("CSI RX BE STATE Controller %d PEC ID %d custom pec 0x%x\n", ID, i, state->pec[i]); + ia_css_print("CSI RX BE STATE Controller %d PEC ID %d custom pec 0x%x\n", ID, i, + state->pec[i]); } #endif - ia_css_print("CSI RX BE STATE Controller %d Global LUT disregard reg 0x%x\n", ID, state->global_lut_disregard_reg); - ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x\n", ID, state->packet_status_stall); + ia_css_print("CSI RX BE STATE Controller %d Global LUT disregard reg 0x%x\n", + ID, state->global_lut_disregard_reg); + ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x\n", ID, + state->packet_status_stall); /* * Get the values of the register-set per * lut. */ for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) { - ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x\n", ID, i, state->short_packet_lut_entry[i]); + ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x\n", + ID, i, + state->short_packet_lut_entry[i]); } for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) { - ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x\n", ID, i, state->long_packet_lut_entry[i]); + ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x\n", + ID, i, + state->long_packet_lut_entry[i]); } } @@ -225,12 +244,13 @@ static inline void csi_rx_be_ctrl_dump_state( * Refer to "csi_rx_public.h" for details. */ static inline hrt_data csi_rx_fe_ctrl_reg_load( - const csi_rx_frontend_ID_t ID, - const hrt_address reg) + const csi_rx_frontend_ID_t ID, + const hrt_address reg) { assert(ID < N_CSI_RX_FRONTEND_ID); assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data)); + return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof( + hrt_data)); } /** @@ -238,14 +258,15 @@ static inline hrt_data csi_rx_fe_ctrl_reg_load( * Refer to "ibuf_ctrl_public.h" for details. */ static inline void csi_rx_fe_ctrl_reg_store( - const csi_rx_frontend_ID_t ID, - const hrt_address reg, - const hrt_data value) + const csi_rx_frontend_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_CSI_RX_FRONTEND_ID); assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); + ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), + value); } /** @@ -253,12 +274,13 @@ static inline void csi_rx_fe_ctrl_reg_store( * Refer to "csi_rx_public.h" for details. */ static inline hrt_data csi_rx_be_ctrl_reg_load( - const csi_rx_backend_ID_t ID, - const hrt_address reg) + const csi_rx_backend_ID_t ID, + const hrt_address reg) { assert(ID < N_CSI_RX_BACKEND_ID); assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data)); + return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof( + hrt_data)); } /** @@ -266,14 +288,15 @@ static inline hrt_data csi_rx_be_ctrl_reg_load( * Refer to "ibuf_ctrl_public.h" for details. */ static inline void csi_rx_be_ctrl_reg_store( - const csi_rx_backend_ID_t ID, - const hrt_address reg, - const hrt_data value) + const csi_rx_backend_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_CSI_RX_BACKEND_ID); assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); + ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data), + value); } /* end of DLI */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h index 5fda64313935d..a0800a5df68a7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h @@ -32,15 +32,15 @@ * Refer to "ibuf_ctrl_public.h" for details. */ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( - const ibuf_ctrl_ID_t ID, - ibuf_ctrl_state_t *state) + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state) { u32 i; state->recalc_words = - ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS); + ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS); state->arbiters = - ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS); + ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS); /* * Get the values of the register-set per @@ -48,9 +48,9 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( */ for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) { ibuf_ctrl_get_proc_state( - ID, - i, - &state->proc_state[i]); + ID, + i, + &state->proc_state[i]); } } @@ -59,92 +59,92 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state( * Refer to "ibuf_ctrl_public.h" for details. */ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state( - const ibuf_ctrl_ID_t ID, - const u32 proc_id, - ibuf_ctrl_proc_state_t *state) + const ibuf_ctrl_ID_t ID, + const u32 proc_id, + ibuf_ctrl_proc_state_t *state) { hrt_address reg_bank_offset; reg_bank_offset = - _IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id); + _IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id); state->num_items = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE); state->num_stores = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME); state->dma_channel = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL); state->dma_command = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD); state->ibuf_st_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS); state->ibuf_stride = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE); state->ibuf_end_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS); state->dest_st_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS); state->dest_stride = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE); state->dest_end_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS); state->sync_frame = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME); state->sync_command = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD); state->store_command = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD); state->shift_returned_items = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS); state->elems_ibuf = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF); state->elems_dest = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST); state->cur_stores = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES); state->cur_acks = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS); state->cur_s2m_ibuf_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR); state->cur_dma_ibuf_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR); state->cur_dma_dest_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR); state->cur_isp_dest_addr = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR); state->dma_cmds_send = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND); state->main_cntrl_state = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE); state->dma_sync_state = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE); state->isp_sync_state = - ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE); + ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE); } /** @@ -152,12 +152,13 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state( * Refer to "ibuf_ctrl_public.h" for details. */ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state( - const ibuf_ctrl_ID_t ID, - ibuf_ctrl_state_t *state) + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state) { u32 i; - ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID, state->recalc_words); + ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID, + state->recalc_words); ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters); /* @@ -165,32 +166,64 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state( * ibuf-controller process. */ for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) { - ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i, state->proc_state[i].num_items); - ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i, state->proc_state[i].num_stores); - ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i, state->proc_state[i].dma_channel); - ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i, state->proc_state[i].dma_command); - ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_st_addr); - ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i, state->proc_state[i].ibuf_stride); - ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_end_addr); - ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i, state->proc_state[i].dest_st_addr); - ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i, state->proc_state[i].dest_stride); - ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i, state->proc_state[i].dest_end_addr); - ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i, state->proc_state[i].sync_frame); - ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i, state->proc_state[i].sync_command); - ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i, state->proc_state[i].store_command); - ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n", ID, i, state->proc_state[i].shift_returned_items); - ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i, state->proc_state[i].elems_ibuf); - ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i, state->proc_state[i].elems_dest); - ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i, state->proc_state[i].cur_stores); - ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i, state->proc_state[i].cur_acks); - ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_s2m_ibuf_addr); - ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_ibuf_addr); - ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_dest_addr); - ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_isp_dest_addr); - ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i, state->proc_state[i].dma_cmds_send); - ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID, i, state->proc_state[i].main_cntrl_state); - ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i, state->proc_state[i].dma_sync_state); - ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, state->proc_state[i].isp_sync_state); + ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i, + state->proc_state[i].num_items); + ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i, + state->proc_state[i].num_stores); + ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i, + state->proc_state[i].dma_channel); + ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i, + state->proc_state[i].dma_command); + ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i, + state->proc_state[i].ibuf_st_addr); + ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i, + state->proc_state[i].ibuf_stride); + ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i, + state->proc_state[i].ibuf_end_addr); + ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i, + state->proc_state[i].dest_st_addr); + ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i, + state->proc_state[i].dest_stride); + ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i, + state->proc_state[i].dest_end_addr); + ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i, + state->proc_state[i].sync_frame); + ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i, + state->proc_state[i].sync_command); + ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i, + state->proc_state[i].store_command); + ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n", + ID, i, + state->proc_state[i].shift_returned_items); + ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i, + state->proc_state[i].elems_ibuf); + ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i, + state->proc_state[i].elems_dest); + ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i, + state->proc_state[i].cur_stores); + ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i, + state->proc_state[i].cur_acks); + ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID, + i, + state->proc_state[i].cur_s2m_ibuf_addr); + ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID, + i, + state->proc_state[i].cur_dma_ibuf_addr); + ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID, + i, + state->proc_state[i].cur_dma_dest_addr); + ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID, + i, + state->proc_state[i].cur_isp_dest_addr); + ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i, + state->proc_state[i].dma_cmds_send); + ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID, + i, + state->proc_state[i].main_cntrl_state); + ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i, + state->proc_state[i].dma_sync_state); + ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, + state->proc_state[i].isp_sync_state); } } @@ -206,8 +239,8 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state( * Refer to "ibuf_ctrl_public.h" for details. */ STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load( - const ibuf_ctrl_ID_t ID, - const hrt_address reg) + const ibuf_ctrl_ID_t ID, + const hrt_address reg) { assert(ID < N_IBUF_CTRL_ID); assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); @@ -219,9 +252,9 @@ STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load( * Refer to "ibuf_ctrl_public.h" for details. */ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_reg_store( - const ibuf_ctrl_ID_t ID, - const hrt_address reg, - const hrt_data value) + const ibuf_ctrl_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_IBUF_CTRL_ID); assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h index 361f6fb25395e..3f60f59ae51f6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h @@ -18,8 +18,8 @@ #include "input_system_public.h" STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( - const input_system_ID_t ID, - input_system_state_t *state) + const input_system_ID_t ID, + input_system_state_t *state) { u32 i; @@ -28,36 +28,36 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( /* get the states of all CSI RX frontend devices */ for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { csi_rx_fe_ctrl_get_state( - (csi_rx_frontend_ID_t)i, - &state->csi_rx_fe_ctrl_state[i]); + (csi_rx_frontend_ID_t)i, + &state->csi_rx_fe_ctrl_state[i]); } /* get the states of all CIS RX backend devices */ for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { csi_rx_be_ctrl_get_state( - (csi_rx_backend_ID_t)i, - &state->csi_rx_be_ctrl_state[i]); + (csi_rx_backend_ID_t)i, + &state->csi_rx_be_ctrl_state[i]); } /* get the states of all pixelgen devices */ for (i = 0; i < N_PIXELGEN_ID; i++) { pixelgen_ctrl_get_state( - (pixelgen_ID_t)i, - &state->pixelgen_ctrl_state[i]); + (pixelgen_ID_t)i, + &state->pixelgen_ctrl_state[i]); } /* get the states of all stream2mmio devices */ for (i = 0; i < N_STREAM2MMIO_ID; i++) { stream2mmio_get_state( - (stream2mmio_ID_t)i, - &state->stream2mmio_state[i]); + (stream2mmio_ID_t)i, + &state->stream2mmio_state[i]); } /* get the states of all ibuf-controller devices */ for (i = 0; i < N_IBUF_CTRL_ID; i++) { ibuf_ctrl_get_state( - (ibuf_ctrl_ID_t)i, - &state->ibuf_ctrl_state[i]); + (ibuf_ctrl_ID_t)i, + &state->ibuf_ctrl_state[i]); } /* get the states of all isys irq controllers */ @@ -73,8 +73,8 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state( } STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state( - const input_system_ID_t ID, - input_system_state_t *state) + const input_system_ID_t ID, + input_system_state_t *state) { u32 i; @@ -83,36 +83,36 @@ STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state( /* dump the states of all CSI RX frontend devices */ for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) { csi_rx_fe_ctrl_dump_state( - (csi_rx_frontend_ID_t)i, - &state->csi_rx_fe_ctrl_state[i]); + (csi_rx_frontend_ID_t)i, + &state->csi_rx_fe_ctrl_state[i]); } /* dump the states of all CIS RX backend devices */ for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) { csi_rx_be_ctrl_dump_state( - (csi_rx_backend_ID_t)i, - &state->csi_rx_be_ctrl_state[i]); + (csi_rx_backend_ID_t)i, + &state->csi_rx_be_ctrl_state[i]); } /* dump the states of all pixelgen devices */ for (i = 0; i < N_PIXELGEN_ID; i++) { pixelgen_ctrl_dump_state( - (pixelgen_ID_t)i, - &state->pixelgen_ctrl_state[i]); + (pixelgen_ID_t)i, + &state->pixelgen_ctrl_state[i]); } /* dump the states of all st2mmio devices */ for (i = 0; i < N_STREAM2MMIO_ID; i++) { stream2mmio_dump_state( - (stream2mmio_ID_t)i, - &state->stream2mmio_state[i]); + (stream2mmio_ID_t)i, + &state->stream2mmio_state[i]); } /* dump the states of all ibuf-controller devices */ for (i = 0; i < N_IBUF_CTRL_ID; i++) { ibuf_ctrl_dump_state( - (ibuf_ctrl_ID_t)i, - &state->ibuf_ctrl_state[i]); + (ibuf_ctrl_ID_t)i, + &state->ibuf_ctrl_state[i]); } /* dump the states of all isys irq controllers */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c index 77767228985ef..36c026cbd7cc8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c @@ -28,13 +28,13 @@ const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID] = { }; void isys2401_dma_set_max_burst_size( - const isys2401_dma_ID_t dma_id, - uint32_t max_burst_size) + const isys2401_dma_ID_t dma_id, + uint32_t max_burst_size) { assert(dma_id < N_ISYS2401_DMA_ID); assert((max_burst_size > 0x00) && (max_burst_size <= 0xFF)); isys2401_dma_reg_store(dma_id, - DMA_DEV_INFO_REG_IDX(_DMA_V2_DEV_INTERF_MAX_BURST_IDX, HIVE_DMA_BUS_DDR_CONN), - (max_burst_size - 1)); + DMA_DEV_INFO_REG_IDX(_DMA_V2_DEV_INTERF_MAX_BURST_IDX, HIVE_DMA_BUS_DDR_CONN), + (max_burst_size - 1)); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h index 6cb9dd69e96f9..a1a222372ed39 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h @@ -23,9 +23,9 @@ #include "print_support.h" STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store( - const isys2401_dma_ID_t dma_id, - const unsigned int reg, - const hrt_data value) + const isys2401_dma_ID_t dma_id, + const unsigned int reg, + const hrt_data value) { unsigned int reg_loc; @@ -34,13 +34,14 @@ STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store( reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); - ia_css_print("isys dma store at addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value); + ia_css_print("isys dma store at addr(0x%x) val(%u)\n", reg_loc, + (unsigned int)value); ia_css_device_store_uint32(reg_loc, value); } STORAGE_CLASS_ISYS2401_DMA_C hrt_data isys2401_dma_reg_load( - const isys2401_dma_ID_t dma_id, - const unsigned int reg) + const isys2401_dma_ID_t dma_id, + const unsigned int reg) { unsigned int reg_loc; hrt_data value; @@ -51,7 +52,8 @@ STORAGE_CLASS_ISYS2401_DMA_C hrt_data isys2401_dma_reg_load( reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data)); value = ia_css_device_load_uint32(reg_loc); - ia_css_print("isys dma load from addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value); + ia_css_print("isys dma load from addr(0x%x) val(%u)\n", reg_loc, + (unsigned int)value); return value; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c index 842ae340ae138..567c926bd47f5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c @@ -28,12 +28,16 @@ /* Public interface */ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_status_enable( - const isys_irq_ID_t isys_irqc_id) + const isys_irq_ID_t isys_irqc_id) { assert(isys_irqc_id < N_ISYS_IRQ_ID); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Setting irq mask for port %u\n", isys_irqc_id); - isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX, ISYS_IRQ_MASK_REG_VALUE); - isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX, ISYS_IRQ_CLEAR_REG_VALUE); - isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX, ISYS_IRQ_ENABLE_REG_VALUE); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Setting irq mask for port %u\n", + isys_irqc_id); + isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX, + ISYS_IRQ_MASK_REG_VALUE); + isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX, + ISYS_IRQ_CLEAR_REG_VALUE); + isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX, + ISYS_IRQ_ENABLE_REG_VALUE); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h index 0bffb5680e255..4fd05b29dfdb5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h @@ -27,7 +27,7 @@ struct isys_irqc_state_s { hrt_data status; hrt_data enable; hrt_data level_no; -/*hrt_data clear; */ /* write-only register */ + /*hrt_data clear; */ /* write-only register */ }; #endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h index c2f34e45d84be..c519e6f06462c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h @@ -29,8 +29,8 @@ * Refer to "isys_irq.h" for details. */ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_get( - const isys_irq_ID_t isys_irqc_id, - isys_irqc_state_t *state) + const isys_irq_ID_t isys_irqc_id, + isys_irqc_state_t *state) { state->edge = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_EDGE_REG_IDX); state->mask = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX); @@ -48,13 +48,13 @@ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_get( * Refer to "isys_irq.h" for details. */ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_dump( - const isys_irq_ID_t isys_irqc_id, - const isys_irqc_state_t *state) + const isys_irq_ID_t isys_irqc_id, + const isys_irqc_state_t *state) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "isys irq controller id %d\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n", - isys_irqc_id, - state->status, state->edge, state->mask, state->enable, state->level_no); + "isys irq controller id %d\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n", + isys_irqc_id, + state->status, state->edge, state->mask, state->enable, state->level_no); } /* end of NCI */ @@ -65,9 +65,9 @@ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_dump( /* Support functions */ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_reg_store( - const isys_irq_ID_t isys_irqc_id, - const unsigned int reg_idx, - const hrt_data value) + const isys_irq_ID_t isys_irqc_id, + const unsigned int reg_idx, + const hrt_data value) { unsigned int reg_addr; @@ -76,14 +76,14 @@ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_reg_store( reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); + "isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); ia_css_device_store_uint32(reg_addr, value); } STORAGE_CLASS_ISYS2401_IRQ_C hrt_data isys_irqc_reg_load( - const isys_irq_ID_t isys_irqc_id, - const unsigned int reg_idx) + const isys_irq_ID_t isys_irqc_id, + const unsigned int reg_idx) { unsigned int reg_addr; hrt_data value; @@ -94,7 +94,7 @@ STORAGE_CLASS_ISYS2401_IRQ_C hrt_data isys_irqc_reg_load( reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data)); value = ia_css_device_load_uint32(reg_addr); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); + "isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value); return value; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h index 71743a8b940e6..e5aae5c022eba 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h @@ -40,8 +40,8 @@ * Refer to "stream2mmio_public.h" for details. */ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state( - const stream2mmio_ID_t ID, - stream2mmio_state_t *state) + const stream2mmio_ID_t ID, + stream2mmio_state_t *state) { stream2mmio_sid_ID_t i; @@ -59,30 +59,30 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state( * Refer to "stream2mmio_public.h" for details. */ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state( - const stream2mmio_ID_t ID, - const stream2mmio_sid_ID_t sid_id, - stream2mmio_sid_state_t *state) + const stream2mmio_ID_t ID, + const stream2mmio_sid_ID_t sid_id, + stream2mmio_sid_state_t *state) { state->rcv_ack = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID); + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID); state->pix_width_id = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_PIX_WIDTH_ID_REG_ID); + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_PIX_WIDTH_ID_REG_ID); state->start_addr = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_START_ADDR_REG_ID); + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_START_ADDR_REG_ID); state->end_addr = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_END_ADDR_REG_ID); + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_END_ADDR_REG_ID); state->strides = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_STRIDE_REG_ID); + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_STRIDE_REG_ID); state->num_items = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_NUM_ITEMS_REG_ID); + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_NUM_ITEMS_REG_ID); state->block_when_no_cmd = - stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID); + stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID); } /** @@ -90,7 +90,7 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state( * Refer to "stream2mmio_public.h" for details. */ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state( - stream2mmio_sid_state_t *state) + stream2mmio_sid_state_t *state) { ia_css_print("\t \t Receive acks 0x%x\n", state->rcv_ack); ia_css_print("\t \t Pixel width 0x%x\n", state->pix_width_id); @@ -106,8 +106,8 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state( * Refer to "stream2mmio_public.h" for details. */ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_dump_state( - const stream2mmio_ID_t ID, - stream2mmio_state_t *state) + const stream2mmio_ID_t ID, + stream2mmio_state_t *state) { stream2mmio_sid_ID_t i; @@ -133,9 +133,9 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_dump_state( * Refer to "stream2mmio_public.h" for details. */ STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load( - const stream2mmio_ID_t ID, - const stream2mmio_sid_ID_t sid_id, - const uint32_t reg_idx) + const stream2mmio_ID_t ID, + const stream2mmio_sid_ID_t sid_id, + const uint32_t reg_idx) { u32 reg_bank_offset; @@ -143,7 +143,7 @@ STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load( reg_bank_offset = STREAM2MMIO_REGS_PER_SID * sid_id; return ia_css_device_load_uint32(STREAM2MMIO_CTRL_BASE[ID] + - (reg_bank_offset + reg_idx) * sizeof(hrt_data)); + (reg_bank_offset + reg_idx) * sizeof(hrt_data)); } /** @@ -151,15 +151,15 @@ STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load( * Refer to "stream2mmio_public.h" for details. */ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_reg_store( - const stream2mmio_ID_t ID, - const hrt_address reg, - const hrt_data value) + const stream2mmio_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_STREAM2MMIO_ID); assert(STREAM2MMIO_CTRL_BASE[ID] != (hrt_address)-1); ia_css_device_store_uint32(STREAM2MMIO_CTRL_BASE[ID] + - reg * sizeof(hrt_data), value); + reg * sizeof(hrt_data), value); } /* end of DLI */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h index 3aa7e29d0e7d9..79f5ef595d35e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h @@ -30,63 +30,63 @@ * Refer to "pixelgen_public.h" for details. */ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state( - const pixelgen_ID_t ID, - pixelgen_ctrl_state_t *state) + const pixelgen_ID_t ID, + pixelgen_ctrl_state_t *state) { state->com_enable = - pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX); state->prbs_rstval0 = - pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX); state->prbs_rstval1 = - pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX); state->syng_sid = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX); state->syng_free_run = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX); state->syng_pause = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX); state->syng_nof_frames = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX); state->syng_nof_pixels = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX); state->syng_nof_line = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX); state->syng_hblank_cyc = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX); state->syng_vblank_cyc = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX); state->syng_stat_hcnt = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX); state->syng_stat_vcnt = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX); state->syng_stat_fcnt = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX); state->syng_stat_done = - pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX); state->tpg_mode = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX); state->tpg_hcnt_mask = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_MASK_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_MASK_REG_IDX); state->tpg_vcnt_mask = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_MASK_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_MASK_REG_IDX); state->tpg_xycnt_mask = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_XYCNT_MASK_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_XYCNT_MASK_REG_IDX); state->tpg_hcnt_delta = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_DELTA_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_DELTA_REG_IDX); state->tpg_vcnt_delta = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_DELTA_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_DELTA_REG_IDX); state->tpg_r1 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_R1_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_R1_REG_IDX); state->tpg_g1 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_G1_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_G1_REG_IDX); state->tpg_b1 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_B1_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_B1_REG_IDX); state->tpg_r2 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_R2_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_R2_REG_IDX); state->tpg_g2 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_G2_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_G2_REG_IDX); state->tpg_b2 = - pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX); + pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX); } /** @@ -94,30 +94,47 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state( * Refer to "pixelgen_public.h" for details. */ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state( - const pixelgen_ID_t ID, - pixelgen_ctrl_state_t *state) + const pixelgen_ID_t ID, + pixelgen_ctrl_state_t *state) { ia_css_print("Pixel Generator ID %d Enable 0x%x\n", ID, state->com_enable); - ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x\n", ID, state->prbs_rstval0); - ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x\n", ID, state->prbs_rstval1); + ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x\n", ID, + state->prbs_rstval0); + ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x\n", ID, + state->prbs_rstval1); ia_css_print("Pixel Generator ID %d SYNC SID 0x%x\n", ID, state->syng_sid); - ia_css_print("Pixel Generator ID %d syng free run 0x%x\n", ID, state->syng_free_run); + ia_css_print("Pixel Generator ID %d syng free run 0x%x\n", ID, + state->syng_free_run); ia_css_print("Pixel Generator ID %d syng pause 0x%x\n", ID, state->syng_pause); - ia_css_print("Pixel Generator ID %d syng no of frames 0x%x\n", ID, state->syng_nof_frames); - ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x\n", ID, state->syng_nof_pixels); - ia_css_print("Pixel Generator ID %d syng no of line 0x%x\n", ID, state->syng_nof_line); - ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x\n", ID, state->syng_hblank_cyc); - ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x\n", ID, state->syng_vblank_cyc); - ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x\n", ID, state->syng_stat_hcnt); - ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x\n", ID, state->syng_stat_vcnt); - ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x\n", ID, state->syng_stat_fcnt); - ia_css_print("Pixel Generator ID %d syng stat done 0x%x\n", ID, state->syng_stat_done); + ia_css_print("Pixel Generator ID %d syng no of frames 0x%x\n", ID, + state->syng_nof_frames); + ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x\n", ID, + state->syng_nof_pixels); + ia_css_print("Pixel Generator ID %d syng no of line 0x%x\n", ID, + state->syng_nof_line); + ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x\n", ID, + state->syng_hblank_cyc); + ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x\n", ID, + state->syng_vblank_cyc); + ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x\n", ID, + state->syng_stat_hcnt); + ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x\n", ID, + state->syng_stat_vcnt); + ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x\n", ID, + state->syng_stat_fcnt); + ia_css_print("Pixel Generator ID %d syng stat done 0x%x\n", ID, + state->syng_stat_done); ia_css_print("Pixel Generator ID %d tpg modee 0x%x\n", ID, state->tpg_mode); - ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, state->tpg_hcnt_mask); - ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, state->tpg_hcnt_mask); - ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x\n", ID, state->tpg_xycnt_mask); - ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x\n", ID, state->tpg_hcnt_delta); - ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x\n", ID, state->tpg_vcnt_delta); + ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, + state->tpg_hcnt_mask); + ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, + state->tpg_hcnt_mask); + ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x\n", ID, + state->tpg_xycnt_mask); + ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x\n", ID, + state->tpg_hcnt_delta); + ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x\n", ID, + state->tpg_vcnt_delta); ia_css_print("Pixel Generator ID %d tpg r1 0x%x\n", ID, state->tpg_r1); ia_css_print("Pixel Generator ID %d tpg g1 0x%x\n", ID, state->tpg_g1); ia_css_print("Pixel Generator ID %d tpg b1 0x%x\n", ID, state->tpg_b1); @@ -137,12 +154,13 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state( * Refer to "pixelgen_public.h" for details. */ STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load( - const pixelgen_ID_t ID, - const hrt_address reg) + const pixelgen_ID_t ID, + const hrt_address reg) { assert(ID < N_PIXELGEN_ID); assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1); - return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data)); + return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof( + hrt_data)); } /** @@ -150,14 +168,15 @@ STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load( * Refer to "pixelgen_ctrl_public.h" for details. */ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_reg_store( - const pixelgen_ID_t ID, - const hrt_address reg, - const hrt_data value) + const pixelgen_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_PIXELGEN_ID); assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); + ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data), + value); } /* end of DLI */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h index 3d394b623731d..068b6efb33207 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h @@ -43,32 +43,40 @@ /* DDR */ static const hrt_address DDR_BASE[N_DDR_ID] = { - 0x0000000120000000ULL}; + 0x0000000120000000ULL +}; /* ISP */ static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - 0x0000000000020000ULL}; + 0x0000000000020000ULL +}; static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - 0x0000000000200000ULL}; + 0x0000000000200000ULL +}; static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - 0x0000000000100000ULL}; + 0x0000000000100000ULL +}; static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { 0x00000000001C0000ULL, 0x00000000001D0000ULL, - 0x00000000001E0000ULL}; + 0x00000000001E0000ULL +}; static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - 0x00000000001F0000ULL}; + 0x00000000001F0000ULL +}; /* SP */ static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - 0x0000000000010000ULL}; + 0x0000000000010000ULL +}; static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - 0x0000000000300000ULL}; + 0x0000000000300000ULL +}; /* MMU */ #if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) @@ -78,24 +86,28 @@ static const hrt_address SP_DMEM_BASE[N_SP_ID] = { */ static const hrt_address MMU_BASE[N_MMU_ID] = { 0x0000000000070000ULL, - 0x00000000000A0000ULL}; + 0x00000000000A0000ULL +}; #else #error "system_local.h: SYSTEM must be one of {2400, 2401 }" #endif /* DMA */ static const hrt_address DMA_BASE[N_DMA_ID] = { - 0x0000000000040000ULL}; + 0x0000000000040000ULL +}; static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = { - 0x00000000000CA000ULL}; + 0x00000000000CA000ULL +}; /* IRQ */ static const hrt_address IRQ_BASE[N_IRQ_ID] = { 0x0000000000000500ULL, 0x0000000000030A00ULL, 0x000000000008C000ULL, - 0x0000000000090200ULL}; + 0x0000000000090200ULL +}; /* 0x0000000000000500ULL}; */ @@ -103,11 +115,13 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = { /* GDC */ static const hrt_address GDC_BASE[N_GDC_ID] = { 0x0000000000050000ULL, - 0x0000000000060000ULL}; + 0x0000000000060000ULL +}; /* FIFO_MONITOR (not a subset of GP_DEVICE) */ static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - 0x0000000000000000ULL}; + 0x0000000000000000ULL +}; /* static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { @@ -119,32 +133,37 @@ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { /* GP_DEVICE (single base for all separate GP_REG instances) */ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - 0x0000000000000000ULL}; + 0x0000000000000000ULL +}; /*GP TIMER , all timer registers are inter-twined, * so, having multiple base addresses for * different timers does not help*/ static const hrt_address GP_TIMER_BASE = - (hrt_address)0x0000000000000600ULL; + (hrt_address)0x0000000000000600ULL; /* GPIO */ static const hrt_address GPIO_BASE[N_GPIO_ID] = { - 0x0000000000000400ULL}; + 0x0000000000000400ULL +}; /* TIMED_CTRL */ static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - 0x0000000000000100ULL}; + 0x0000000000000100ULL +}; /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { 0x0000000000030000ULL, 0x0000000000030200ULL, 0x0000000000030400ULL, - 0x0000000000030600ULL}; /* memcpy() */ + 0x0000000000030600ULL +}; /* memcpy() */ /* INPUT_SYSTEM */ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - 0x0000000000080000ULL}; + 0x0000000000080000ULL +}; /* 0x0000000000081000ULL, */ /* capture A */ /* 0x0000000000082000ULL, */ /* capture B */ /* 0x0000000000083000ULL, */ /* capture C */ @@ -157,7 +176,8 @@ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { /* RX, the MIPI lane control regs start at offset 0 */ static const hrt_address RX_BASE[N_RX_ID] = { - 0x0000000000080100ULL}; + 0x0000000000080100ULL +}; /* IBUF_CTRL, part of the Input System 2401 */ static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = { @@ -206,32 +226,40 @@ static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = { /* DDR : Attention, this value not defined in 32-bit */ static const hrt_address DDR_BASE[N_DDR_ID] = { - 0x00000000UL}; + 0x00000000UL +}; /* ISP */ static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - 0x00020000UL}; + 0x00020000UL +}; static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - 0xffffffffUL}; + 0xffffffffUL +}; static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - 0xffffffffUL}; + 0xffffffffUL +}; static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { 0xffffffffUL, 0xffffffffUL, - 0xffffffffUL}; + 0xffffffffUL +}; static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - 0xffffffffUL}; + 0xffffffffUL +}; /* SP */ static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - 0x00010000UL}; + 0x00010000UL +}; static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - 0x00300000UL}; + 0x00300000UL +}; /* MMU */ #if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) @@ -241,24 +269,28 @@ static const hrt_address SP_DMEM_BASE[N_SP_ID] = { */ static const hrt_address MMU_BASE[N_MMU_ID] = { 0x00070000UL, - 0x000A0000UL}; + 0x000A0000UL +}; #else #error "system_local.h: SYSTEM must be one of {2400, 2401 }" #endif /* DMA */ static const hrt_address DMA_BASE[N_DMA_ID] = { - 0x00040000UL}; + 0x00040000UL +}; static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = { - 0x000CA000UL}; + 0x000CA000UL +}; /* IRQ */ static const hrt_address IRQ_BASE[N_IRQ_ID] = { 0x00000500UL, 0x00030A00UL, 0x0008C000UL, - 0x00090200UL}; + 0x00090200UL +}; /* 0x00000500UL}; */ @@ -266,11 +298,13 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = { /* GDC */ static const hrt_address GDC_BASE[N_GDC_ID] = { 0x00050000UL, - 0x00060000UL}; + 0x00060000UL +}; /* FIFO_MONITOR (not a subset of GP_DEVICE) */ static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - 0x00000000UL}; + 0x00000000UL +}; /* static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { @@ -282,31 +316,36 @@ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { /* GP_DEVICE (single base for all separate GP_REG instances) */ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - 0x00000000UL}; + 0x00000000UL +}; /*GP TIMER , all timer registers are inter-twined, * so, having multiple base addresses for * different timers does not help*/ static const hrt_address GP_TIMER_BASE = - (hrt_address)0x00000600UL; + (hrt_address)0x00000600UL; /* GPIO */ static const hrt_address GPIO_BASE[N_GPIO_ID] = { - 0x00000400UL}; + 0x00000400UL +}; /* TIMED_CTRL */ static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - 0x00000100UL}; + 0x00000100UL +}; /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { 0x00030000UL, 0x00030200UL, - 0x00030400UL}; + 0x00030400UL +}; /* 0x00030600UL, */ /* memcpy() */ /* INPUT_SYSTEM */ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - 0x00080000UL}; + 0x00080000UL +}; /* 0x00081000UL, */ /* capture A */ /* 0x00082000UL, */ /* capture B */ /* 0x00083000UL, */ /* capture C */ @@ -319,7 +358,8 @@ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { /* RX, the MIPI lane control regs start at offset 0 */ static const hrt_address RX_BASE[N_RX_ID] = { - 0x00080100UL}; + 0x00080100UL +}; /* IBUF_CTRL, part of the Input System 2401 */ static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h index ba43562f12874..8741b8347dd42 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h @@ -122,7 +122,7 @@ #define _DMA_V2_ZERO_EXTEND 0 #define _DMA_V2_SIGN_EXTEND 1 - /* SLAVE address map */ +/* SLAVE address map */ #define _DMA_V2_SEL_FSM_CMD 0 #define _DMA_V2_SEL_CH_REG 1 #define _DMA_V2_SEL_CONN_GROUP 2 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h index 33f8b5ce9ba3e..3cc627aa6b091 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h @@ -25,43 +25,43 @@ #define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ #define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */ - /* The supported range is [-256, .., +256] */ - /* in 14-bit signed notation, */ - /* We need all ten bits (MSB must be zero). */ - /* -s is inserted to solve this issue, and */ - /* therefore "1" is equal to +256. */ +/* The supported range is [-256, .., +256] */ +/* in 14-bit signed notation, */ +/* We need all ten bits (MSB must be zero). */ +/* -s is inserted to solve this issue, and */ +/* therefore "1" is equal to +256. */ #define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) #define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */ - /* 2 bytes per coefficient */ +/* 2 bytes per coefficient */ #define _HRT_GDC_REG_ALIGN 4 - // 31 30 29 25 24 0 - // |-----|---|--------|------------------------| - // | CMD | C | Reg_ID | Value | +// 31 30 29 25 24 0 +// |-----|---|--------|------------------------| +// | CMD | C | Reg_ID | Value | - // There are just two commands possible for the GDC block: - // 1 - Configure reg - // 0 - Data token +// There are just two commands possible for the GDC block: +// 1 - Configure reg +// 0 - Data token - // C - Reserved bit - // Used in protocol to indicate whether it is C-run or other type of runs - // In case of C-run, this bit has a value of 1, for all the other runs, it is 0. +// C - Reserved bit +// Used in protocol to indicate whether it is C-run or other type of runs +// In case of C-run, this bit has a value of 1, for all the other runs, it is 0. - // Reg_ID - Address of the register to be configured +// Reg_ID - Address of the register to be configured - // Value - Value to store to the addressed register, maximum of 24 bits +// Value - Value to store to the addressed register, maximum of 24 bits - // Configure reg command is not followed by any other token. - // The address of the register and the data to be filled in is contained in the same token +// Configure reg command is not followed by any other token. +// The address of the register and the data to be filled in is contained in the same token - // When the first data token is received, it must be: - // 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, - // 2. P0'X (device configured in one of the tetragon modes) - // After the first data token is received, pre-defined number of tokens with the following meaning follow: - // 1. two tokens: SRC address ; DST address - // 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address +// When the first data token is received, it must be: +// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, +// 2. P0'X (device configured in one of the tetragon modes) +// After the first data token is received, pre-defined number of tokens with the following meaning follow: +// 1. two tokens: SRC address ; DST address +// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address #define HRT_GDC_CONFIG_CMD 1 #define HRT_GDC_DATA_CMD 0 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h index d02435a3ec5a1..96286a141b00b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h @@ -18,10 +18,10 @@ #define _HRT_GPIO_BLOCK_REG_ALIGN 4 /* R/W registers */ -#define _gpio_block_reg_do_e 0 +#define _gpio_block_reg_do_e 0 #define _gpio_block_reg_do_select 1 -#define _gpio_block_reg_do_0 2 -#define _gpio_block_reg_do_1 3 +#define _gpio_block_reg_do_0 2 +#define _gpio_block_reg_do_1 3 #define _gpio_block_reg_do_pwm_cnt_0 4 #define _gpio_block_reg_do_pwm_cnt_1 5 #define _gpio_block_reg_do_pwm_cnt_2 6 @@ -36,6 +36,6 @@ #define _gpio_block_reg_di_active_level 15 /* read-only registers */ -#define _gpio_block_reg_di 16 +#define _gpio_block_reg_di 16 #endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h index 3037484d206b7..6fd48be53d552 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h @@ -23,46 +23,46 @@ * The definitions are taken from _defs.h */ typedef enum hrt_isp_css_irq { - hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, - hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, - hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, - hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, - hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, - hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, - hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, - hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, - hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, - hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, - hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, - hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, - hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, - hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, - hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, - hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, - hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, - hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, - hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, - hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, - hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, - hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, - hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, - hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, - hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, - /* this must (obviously) be the last on in the enum */ - hrt_isp_css_irq_num_irqs + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, + /* this must (obviously) be the last on in the enum */ + hrt_isp_css_irq_num_irqs } hrt_isp_css_irq_t; typedef enum hrt_isp_css_irq_status { - hrt_isp_css_irq_status_error, - hrt_isp_css_irq_status_more_irqs, - hrt_isp_css_irq_status_success + hrt_isp_css_irq_status_error, + hrt_isp_css_irq_status_more_irqs, + hrt_isp_css_irq_status_success } hrt_isp_css_irq_status_t; #endif /* _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h index 0d1b65db83cde..5975b094a9d09 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h @@ -19,20 +19,20 @@ #include #define _IBUF_CNTRL_REG_ALIGN 4 - /* alignment of register banks, first bank are shared configuration and status registers: */ +/* alignment of register banks, first bank are shared configuration and status registers: */ #define _IBUF_CNTRL_PROC_REG_ALIGN 32 - /* the actual amount of configuration registers per proc: */ +/* the actual amount of configuration registers per proc: */ #define _IBUF_CNTRL_CONFIG_REGS_PER_PROC 18 - /* the actual amount of shared configuration registers: */ +/* the actual amount of shared configuration registers: */ #define _IBUF_CNTRL_CONFIG_REGS_NO_PROC 0 - /* the actual amount of status registers per proc */ +/* the actual amount of status registers per proc */ #define _IBUF_CNTRL_STATUS_REGS_PER_PROC (_IBUF_CNTRL_CONFIG_REGS_PER_PROC + 10) - /* the actual amount shared status registers */ +/* the actual amount shared status registers */ #define _IBUF_CNTRL_STATUS_REGS_NO_PROC (_IBUF_CNTRL_CONFIG_REGS_NO_PROC + 2) - /* time out bits, maximum time out value is 2^_IBUF_CNTRL_TIME_OUT_BITS - 1 */ +/* time out bits, maximum time out value is 2^_IBUF_CNTRL_TIME_OUT_BITS - 1 */ #define _IBUF_CNTRL_TIME_OUT_BITS 5 /* command token definition */ @@ -53,7 +53,7 @@ #define _IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS _STREAM2MMIO_PACK_NUM_ITEMS_BITS #define _IBUF_CNTRL_ACK_TOKEN_LSB _IBUF_CNTRL_ACK_TOKEN_STORES_IDX #define _IBUF_CNTRL_ACK_TOKEN_MSB (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX - 1) - /* bit 31 indicates a valid ack: */ +/* bit 31 indicates a valid ack: */ #define _IBUF_CNTRL_ACK_TOKEN_VALID_BIT (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX) /*shared registers:*/ @@ -66,44 +66,44 @@ #define _IBUF_CNTRL_CMD 0 #define _IBUF_CNTRL_ACK 1 - /* number of items (packets or words) per frame: */ +/* number of items (packets or words) per frame: */ #define _IBUF_CNTRL_NUM_ITEMS_PER_STORE 2 - /* number of stores (packets or words) per store/buffer: */ +/* number of stores (packets or words) per store/buffer: */ #define _IBUF_CNTRL_NUM_STORES_PER_FRAME 3 - /* the channel and command in the DMA */ +/* the channel and command in the DMA */ #define _IBUF_CNTRL_DMA_CHANNEL 4 #define _IBUF_CNTRL_DMA_CMD 5 - /* the start address and stride of the buffers */ +/* the start address and stride of the buffers */ #define _IBUF_CNTRL_BUFFER_START_ADDRESS 6 #define _IBUF_CNTRL_BUFFER_STRIDE 7 #define _IBUF_CNTRL_BUFFER_END_ADDRESS 8 - /* destination start address, stride and end address; should be the same as in the DMA */ +/* destination start address, stride and end address; should be the same as in the DMA */ #define _IBUF_CNTRL_DEST_START_ADDRESS 9 #define _IBUF_CNTRL_DEST_STRIDE 10 #define _IBUF_CNTRL_DEST_END_ADDRESS 11 - /* send a frame sync or not, default 1 */ +/* send a frame sync or not, default 1 */ #define _IBUF_CNTRL_SYNC_FRAME 12 - /* str2mmio cmds */ +/* str2mmio cmds */ #define _IBUF_CNTRL_STR2MMIO_SYNC_CMD 13 #define _IBUF_CNTRL_STR2MMIO_STORE_CMD 14 - /* num elems p word*/ +/* num elems p word*/ #define _IBUF_CNTRL_SHIFT_ITEMS 15 #define _IBUF_CNTRL_ELEMS_P_WORD_IBUF 16 #define _IBUF_CNTRL_ELEMS_P_WORD_DEST 17 - /* STATUS */ - /* current frame and stores in buffer */ +/* STATUS */ +/* current frame and stores in buffer */ #define _IBUF_CNTRL_CUR_STORES 18 #define _IBUF_CNTRL_CUR_ACKS 19 - /* current buffer and destination address for DMA cmd's */ +/* current buffer and destination address for DMA cmd's */ #define _IBUF_CNTRL_CUR_S2M_IBUF_ADDR 20 #define _IBUF_CNTRL_CUR_DMA_IBUF_ADDR 21 #define _IBUF_CNTRL_CUR_DMA_DEST_ADDR 22 @@ -119,16 +119,16 @@ #define _IBUF_CNTRL_CMD_STORE_FRAME_IDX 0 #define _IBUF_CNTRL_CMD_ONLINE_IDX 1 - /* initialize, copy st_addr to cur_addr etc */ +/* initialize, copy st_addr to cur_addr etc */ #define _IBUF_CNTRL_CMD_INITIALIZE 0 - /* store an online frame (sync with ISP, use end cfg start, stride and end address: */ +/* store an online frame (sync with ISP, use end cfg start, stride and end address: */ #define _IBUF_CNTRL_CMD_STORE_ONLINE_FRAME ((1 << _IBUF_CNTRL_CMD_STORE_FRAME_IDX) | (1 << _IBUF_CNTRL_CMD_ONLINE_IDX)) - /* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */ +/* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */ #define _IBUF_CNTRL_CMD_STORE_OFFLINE_FRAME BIT(_IBUF_CNTRL_CMD_STORE_FRAME_IDX) - /* false command token, should be different then commands. Use online bit, not store frame: */ +/* false command token, should be different then commands. Use online bit, not store frame: */ #define _IBUF_CNTRL_FALSE_ACK 2 #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h index e00bc841d0f0d..e9106d1e6a63d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h @@ -31,8 +31,8 @@ typedef char *tmemvectors, *tmemvectoru, *tvector; #define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) #if ISP_HAS_HIST - #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) - #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) +#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) +#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) #endif #endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h index 7e79e3c611ee4..29e097b5d9e4f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h @@ -45,26 +45,26 @@ #define ISP_VMEM_ELEM_PRECISION 14 #define ISP_VMEM_IS_BAMEM 1 #if ISP_VMEM_IS_BAMEM - #define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 - #define ISP_VMEM_BAMEM_LATENCY 5 - #define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 - #define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 - #define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 - #define ISP_VMEM_BAMEM_LININT 0 - #define ISP_VMEM_BAMEM_DAP_BITS 3 - #define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 - #define ISP_VMEM_BAMEM_PID_BITS 3 - #define ISP_VMEM_BAMEM_OFFSET_BITS 19 - #define ISP_VMEM_BAMEM_ADDRESS_BITS 25 - #define ISP_VMEM_BAMEM_RID_BITS 4 - #define ISP_VMEM_BAMEM_TRANSPOSITION 1 - #define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 - #define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 - #define ISP_VMEM_BAMEM_LUT_ELEMS 16 - #define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 - #define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 - #define ISP_VMEM_BAMEM_SMART_FETCH 1 - #define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 +#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 +#define ISP_VMEM_BAMEM_LATENCY 5 +#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 +#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 +#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 +#define ISP_VMEM_BAMEM_LININT 0 +#define ISP_VMEM_BAMEM_DAP_BITS 3 +#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 +#define ISP_VMEM_BAMEM_PID_BITS 3 +#define ISP_VMEM_BAMEM_OFFSET_BITS 19 +#define ISP_VMEM_BAMEM_ADDRESS_BITS 25 +#define ISP_VMEM_BAMEM_RID_BITS 4 +#define ISP_VMEM_BAMEM_TRANSPOSITION 1 +#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 +#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 +#define ISP_VMEM_BAMEM_LUT_ELEMS 16 +#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 +#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 +#define ISP_VMEM_BAMEM_SMART_FETCH 1 +#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 #endif /* ISP_VMEM_IS_BAMEM */ #define ISP_PMEM_DEPTH 2048 #define ISP_PMEM_WIDTH 640 @@ -111,8 +111,8 @@ #define ISP_SRU_GUARDING 1 #define ISP_VLSU_GUARDING 1 -#define ISP_VRF_RAM 1 -#define ISP_SRF_RAM 1 +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 #define ISP_SPLIT_VMUL_VADD_IS 0 #define ISP_RFSPLIT_FPGA 0 @@ -166,7 +166,7 @@ #define ISP_VMEM_WIDTH 896 #define ISP_VMEM_ALIGN 128 #if ISP_VMEM_IS_BAMEM - #define ISP_VMEM_ALIGN_ELEM 2 +#define ISP_VMEM_ALIGN_ELEM 2 #endif /* ISP_VMEM_IS_BAMEM */ #define ISP_SIMDLSU 1 #define ISP_LSU_IMM_BITS 12 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h index 988b3ebc953da..a3940d2468908 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h @@ -56,8 +56,8 @@ #define _STREAM2MMIO_ACK_TOKEN_EOP_BIT _STREAM2MMIO_PACK_ACK_EOP_BIT #define _STREAM2MMIO_ACK_TOKEN_EOF_BIT _STREAM2MMIO_PACK_ACK_EOF_BIT #define _STREAM2MMIO_ACK_TOKEN_VALID_BIT (_STREAM2MMIO_ACK_TOKEN_EOF_BIT + 1) /* this bit indicates a valid ack */ - /* if there is no valid ack, a read */ - /* on the ack register returns 0 */ +/* if there is no valid ack, a read */ +/* on the ack register returns 0 */ #define _STREAM2MMIO_ACK_TOKEN_WIDTH (_STREAM2MMIO_ACK_TOKEN_VALID_BIT + 1) /* commands for packer module */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h index 7a68f03c6c5c0..ff9f53b07c773 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h @@ -186,7 +186,8 @@ struct virtual_input_system_stream_s { #endif }; -typedef struct virtual_input_system_stream_cfg_s virtual_input_system_stream_cfg_t; +typedef struct virtual_input_system_stream_cfg_s + virtual_input_system_stream_cfg_t; struct virtual_input_system_stream_cfg_s { u8 enable_metadata; input_system_input_port_cfg_t input_port_cfg; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h index cc057d8b93cf9..2ca4d5210a38c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h @@ -45,7 +45,7 @@ struct isys2401_dma_port_cfg_s { u32 elements; u32 cropping; u32 width; - }; +}; /* end of DMA Port */ /************************************************ @@ -68,8 +68,8 @@ typedef enum { } isys2401_dma_connection; typedef enum { - isys2401_dma_zero_extension = _DMA_ZERO_EXTEND, - isys2401_dma_sign_extension = _DMA_SIGN_EXTEND + isys2401_dma_zero_extension = _DMA_ZERO_EXTEND, + isys2401_dma_sign_extension = _DMA_SIGN_EXTEND } isys2401_dma_extension; typedef struct isys2401_dma_cfg_s isys2401_dma_cfg_t; @@ -83,6 +83,7 @@ struct isys2401_dma_cfg_s { /* end of DMA Device */ /* isys2401_dma_channel limits per DMA ID */ -extern const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID]; +extern const isys2401_dma_channel +N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID]; #endif /* __ISYS_DMA_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c index de99359a0fbcb..9fae24b3e689f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c @@ -24,10 +24,11 @@ void ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_iterator() enter:\n"); { unsigned int offset = 0; @@ -39,20 +40,23 @@ ia_css_configure_iterator( } if (size) { ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_iterator() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_copy_output() enter:\n"); { unsigned int offset = 0; @@ -64,20 +68,23 @@ ia_css_configure_copy_output( } if (size) { ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_copy_output() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_crop() enter:\n"); { unsigned int offset = 0; @@ -89,20 +96,23 @@ ia_css_configure_crop( } if (size) { ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_crop() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_fpn() enter:\n"); { unsigned int offset = 0; @@ -114,20 +124,23 @@ ia_css_configure_fpn( } if (size) { ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_fpn() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_dvs() enter:\n"); { unsigned int offset = 0; @@ -139,20 +152,23 @@ ia_css_configure_dvs( } if (size) { ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_dvs() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_qplane() enter:\n"); { unsigned int offset = 0; @@ -164,20 +180,23 @@ ia_css_configure_qplane( } if (size) { ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_qplane() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output0() enter:\n"); { unsigned int offset = 0; @@ -189,20 +208,23 @@ ia_css_configure_output0( } if (size) { ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output0() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output1() enter:\n"); { unsigned int offset = 0; @@ -214,20 +236,23 @@ ia_css_configure_output1( } if (size) { ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output1() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output() enter:\n"); { unsigned int offset = 0; @@ -239,10 +264,12 @@ ia_css_configure_output( } if (size) { ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_output() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ @@ -250,10 +277,11 @@ ia_css_configure_output( void ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() enter:\n"); { unsigned int offset = 0; @@ -265,10 +293,12 @@ ia_css_configure_sc( } if (size) { ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ @@ -276,10 +306,11 @@ ia_css_configure_sc( void ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_raw() enter:\n"); { unsigned int offset = 0; @@ -291,20 +322,23 @@ ia_css_configure_raw( } if (size) { ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_raw() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_tnr() enter:\n"); { unsigned int offset = 0; @@ -316,20 +350,23 @@ ia_css_configure_tnr( } if (size) { ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_tnr() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_ref() enter:\n"); { unsigned int offset = 0; @@ -341,20 +378,23 @@ ia_css_configure_ref( } if (size) { ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_ref() leave:\n"); } /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_vf() enter:\n"); { unsigned int offset = 0; @@ -366,8 +406,10 @@ ia_css_configure_vf( } if (size) { ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); } + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_vf() leave:\n"); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h index 8aacd3dbc05a5..451fbae02aee0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h @@ -88,101 +88,101 @@ struct ia_css_config_memory_offsets { void ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_iterator_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_copy_output_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_crop_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_fpn_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_dvs_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_qplane_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output0_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output1_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_output_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ #ifdef ISP2401 void ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ #endif void ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_raw_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_tnr_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_ref_configuration *config_dmem); /* Code generated by genparam/genconfig.c:gen_configure_function() */ void ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem); + const struct ia_css_binary *binary, + const struct ia_css_vf_configuration *config_dmem); #endif /* IA_CSS_INCLUDE_CONFIGURATION */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c index 3afe861b709ef..2df57c4864b72 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c @@ -67,16 +67,18 @@ static void ia_css_process_aa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; if (size) { struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; t->strength = params->aa_config.strength; } } @@ -85,28 +87,33 @@ ia_css_process_aa( static void ia_css_process_anr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr() enter:\n"); ia_css_anr_encode((struct sh_css_isp_anr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->anr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->anr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr() leave:\n"); } } } @@ -115,28 +122,33 @@ size); static void ia_css_process_anr2( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr2() enter:\n"); ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->anr_thres, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->anr_thres, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_anr2() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_anr2() leave:\n"); } } } @@ -145,38 +157,43 @@ size); static void ia_css_process_bh( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); } @@ -187,28 +204,33 @@ size); static void ia_css_process_cnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_cnr() enter:\n"); ia_css_cnr_encode((struct sh_css_isp_cnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_cnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_cnr() leave:\n"); } } } @@ -217,28 +239,33 @@ size); static void ia_css_process_crop( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_crop() enter:\n"); ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->crop_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->crop_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_crop() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_crop() leave:\n"); } } } @@ -247,28 +274,33 @@ size); static void ia_css_process_csc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_csc() enter:\n"); ia_css_csc_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_csc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_csc() leave:\n"); } } } @@ -277,26 +309,29 @@ size); static void ia_css_process_dp( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); ia_css_dp_encode((struct sh_css_isp_dp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dp_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dp_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); } @@ -307,28 +342,33 @@ size); static void ia_css_process_bnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bnr() enter:\n"); ia_css_bnr_encode((struct sh_css_isp_bnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bnr() leave:\n"); } } } @@ -337,26 +377,29 @@ size); static void ia_css_process_de( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.de.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); ia_css_de_encode((struct sh_css_isp_de_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->de_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->de_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); } @@ -367,28 +410,33 @@ size); static void ia_css_process_ecd( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ecd() enter:\n"); ia_css_ecd_encode((struct sh_css_isp_ecd_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ecd_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ecd_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ecd() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ecd() leave:\n"); } } } @@ -397,28 +445,33 @@ size); static void ia_css_process_formats( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_formats() enter:\n"); ia_css_formats_encode((struct sh_css_isp_formats_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->formats_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->formats_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_formats() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_formats() leave:\n"); } } } @@ -427,28 +480,33 @@ size); static void ia_css_process_fpn( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_fpn() enter:\n"); ia_css_fpn_encode((struct sh_css_isp_fpn_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fpn_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fpn_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fpn() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_fpn() leave:\n"); } } } @@ -457,44 +515,50 @@ size); static void ia_css_process_gc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); ia_css_gc_encode((struct sh_css_isp_gc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->gc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->gc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->gc_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->gc_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); } @@ -505,26 +569,29 @@ size); static void ia_css_process_ce( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); ia_css_ce_encode((struct sh_css_isp_ce_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ce_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ce_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); } @@ -535,28 +602,33 @@ size); static void ia_css_process_yuv2rgb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yuv2rgb() enter:\n"); ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yuv2rgb_cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yuv2rgb_cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yuv2rgb() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yuv2rgb() leave:\n"); } } } @@ -565,28 +637,33 @@ size); static void ia_css_process_rgb2yuv( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_rgb2yuv() enter:\n"); ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->rgb2yuv_cc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->rgb2yuv_cc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_rgb2yuv() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_rgb2yuv() leave:\n"); } } } @@ -595,28 +672,33 @@ size); static void ia_css_process_r_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_r_gamma() enter:\n"); ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->r_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->r_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_r_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_r_gamma() leave:\n"); } } } @@ -625,28 +707,33 @@ size); static void ia_css_process_g_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_g_gamma() enter:\n"); ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->g_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->g_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_g_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_g_gamma() leave:\n"); } } } @@ -655,28 +742,33 @@ size); static void ia_css_process_b_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_b_gamma() enter:\n"); ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], - ¶ms->b_gamma_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], + ¶ms->b_gamma_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_b_gamma() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_b_gamma() leave:\n"); } } } @@ -685,31 +777,36 @@ size); static void ia_css_process_uds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; if (size) { struct sh_css_sp_uds_params *p; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_uds() enter:\n"); p = (struct sh_css_sp_uds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; p->crop_pos = params->uds_config.crop_pos; p->uds = params->uds_config.uds; params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_uds() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_uds() leave:\n"); } } } @@ -718,28 +815,33 @@ ia_css_process_uds( static void ia_css_process_raa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_raa() enter:\n"); ia_css_raa_encode((struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->raa_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->raa_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_raa() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_raa() leave:\n"); } } } @@ -748,28 +850,33 @@ size); static void ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_s3a() enter:\n"); ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->s3a_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_s3a() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_s3a() leave:\n"); } } } @@ -778,44 +885,50 @@ size); static void ia_css_process_ob( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); ia_css_ob_encode((struct sh_css_isp_ob_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ob_config, -¶ms->stream_configs.ob, size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ob_config, + ¶ms->stream_configs.ob, size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->ob_config, -¶ms->stream_configs.ob, size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->ob_config, + ¶ms->stream_configs.ob, size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); } @@ -826,28 +939,33 @@ ia_css_process_ob( static void ia_css_process_output( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.output.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_output() enter:\n"); ia_css_output_encode((struct sh_css_isp_output_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->output_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->output_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_output() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_output() leave:\n"); } } } @@ -856,26 +974,29 @@ size); static void ia_css_process_sc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); ia_css_sc_encode((struct sh_css_isp_sc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->sc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->sc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); } @@ -886,30 +1007,35 @@ size); static void ia_css_process_bds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; if (size) { struct sh_css_isp_bds_params *p; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bds() enter:\n"); p = (struct sh_css_isp_bds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; p->baf_strength = params->bds_config.strength; params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bds() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_bds() leave:\n"); } } } @@ -918,28 +1044,33 @@ ia_css_process_bds( static void ia_css_process_tnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_tnr() enter:\n"); ia_css_tnr_encode((struct sh_css_isp_tnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->tnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->tnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_tnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_tnr() leave:\n"); } } } @@ -948,28 +1079,33 @@ size); static void ia_css_process_macc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_macc() enter:\n"); ia_css_macc_encode((struct sh_css_isp_macc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->macc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->macc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_macc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_macc() leave:\n"); } } } @@ -978,28 +1114,33 @@ size); static void ia_css_process_sdis_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horicoef() enter:\n"); ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horicoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horicoef() leave:\n"); } } } @@ -1008,28 +1149,33 @@ size); static void ia_css_process_sdis_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertcoef() enter:\n"); ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertcoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertcoef() leave:\n"); } } } @@ -1038,28 +1184,33 @@ size); static void ia_css_process_sdis_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horiproj() enter:\n"); ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_horiproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_horiproj() leave:\n"); } } } @@ -1068,28 +1219,33 @@ size); static void ia_css_process_sdis_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertproj() enter:\n"); ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis_vertproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis_vertproj() leave:\n"); } } } @@ -1098,28 +1254,33 @@ size); static void ia_css_process_sdis2_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horicoef() enter:\n"); ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horicoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horicoef() leave:\n"); } } } @@ -1128,28 +1289,33 @@ size); static void ia_css_process_sdis2_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertcoef() enter:\n"); ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertcoef() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertcoef() leave:\n"); } } } @@ -1158,28 +1324,33 @@ size); static void ia_css_process_sdis2_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horiproj() enter:\n"); ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_horiproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_horiproj() leave:\n"); } } } @@ -1188,28 +1359,33 @@ size); static void ia_css_process_sdis2_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertproj() enter:\n"); ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->dvs2_coefs, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sdis2_vertproj() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_sdis2_vertproj() leave:\n"); } } } @@ -1218,26 +1394,29 @@ size); static void ia_css_process_wb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); ia_css_wb_encode((struct sh_css_isp_wb_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->wb_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->wb_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); } @@ -1248,26 +1427,29 @@ size); static void ia_css_process_nr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); ia_css_nr_encode((struct sh_css_isp_ynr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->nr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); } @@ -1278,28 +1460,33 @@ size); static void ia_css_process_yee( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yee() enter:\n"); ia_css_yee_encode((struct sh_css_isp_yee_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yee_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->yee_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_yee() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_yee() leave:\n"); } } } @@ -1308,28 +1495,33 @@ size); static void ia_css_process_ynr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ynr() enter:\n"); ia_css_ynr_encode((struct sh_css_isp_yee2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ynr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ynr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ynr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ynr() leave:\n"); } } } @@ -1338,26 +1530,29 @@ size); static void ia_css_process_fc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; if (size) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); ia_css_fc_encode((struct sh_css_isp_fc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->fc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); } @@ -1368,46 +1563,56 @@ size); static void ia_css_process_ctc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() enter:\n"); ia_css_ctc_encode((struct sh_css_isp_ctc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ctc_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->ctc_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() leave:\n"); } } { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() enter:\n"); ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->ctc_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], + ¶ms->ctc_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ctc() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_ctc() leave:\n"); } } } @@ -1416,28 +1621,33 @@ size); static void ia_css_process_xnr_table( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr_table() enter:\n"); ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->xnr_table, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], + ¶ms->xnr_table, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr_table() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr_table() leave:\n"); } } } @@ -1446,28 +1656,33 @@ size); static void ia_css_process_xnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr() enter:\n"); ia_css_xnr_encode((struct sh_css_isp_xnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr() leave:\n"); } } } @@ -1476,47 +1691,57 @@ size); static void ia_css_process_xnr3( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { assert(params); { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() enter:\n"); ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr3_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->xnr3_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() leave:\n"); } } #ifdef ISP2401 { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() enter:\n"); ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, -size); + &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], + ¶ms->xnr3_config, + size); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = + true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_xnr3() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_process_xnr3() leave:\n"); } } #endif @@ -1525,9 +1750,9 @@ size); /* Code generated by genparam/gencode.c:gen_param_process_table() */ void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) = { + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) = { ia_css_process_aa, ia_css_process_anr, ia_css_process_anr2, @@ -1580,17 +1805,20 @@ void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( static void ia_css_get_dp_config(const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config){ + struct ia_css_dp_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_dp_config() enter: config=%p\n", + config); *config = params->dp_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_dp_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_dp_config() leave\n"); ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1598,7 +1826,7 @@ ia_css_get_dp_config(const struct ia_css_isp_parameters *params, void ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) + const struct ia_css_dp_config *config) { if (!config) return; @@ -1612,24 +1840,28 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DP_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_dp_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_wb_config(const struct ia_css_isp_parameters *params, - struct ia_css_wb_config *config){ + struct ia_css_wb_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_wb_config() enter: config=%p\n", + config); *config = params->wb_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_wb_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_wb_config() leave\n"); ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1637,7 +1869,7 @@ ia_css_get_wb_config(const struct ia_css_isp_parameters *params, void ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config) + const struct ia_css_wb_config *config) { if (!config) return; @@ -1651,24 +1883,28 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_WB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_wb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_tnr_config *config){ + struct ia_css_tnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_tnr_config() enter: config=%p\n", + config); *config = params->tnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_tnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_tnr_config() leave\n"); ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1676,7 +1912,7 @@ ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config) + const struct ia_css_tnr_config *config) { if (!config) return; @@ -1690,24 +1926,28 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_TNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_tnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ob_config(const struct ia_css_isp_parameters *params, - struct ia_css_ob_config *config){ + struct ia_css_ob_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ob_config() enter: config=%p\n", + config); *config = params->ob_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ob_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ob_config() leave\n"); ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1715,7 +1955,7 @@ ia_css_get_ob_config(const struct ia_css_isp_parameters *params, void ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config) + const struct ia_css_ob_config *config) { if (!config) return; @@ -1729,24 +1969,28 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ob_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_de_config(const struct ia_css_isp_parameters *params, - struct ia_css_de_config *config){ + struct ia_css_de_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_de_config() enter: config=%p\n", + config); *config = params->de_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_de_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_de_config() leave\n"); ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1754,7 +1998,7 @@ ia_css_get_de_config(const struct ia_css_isp_parameters *params, void ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config) + const struct ia_css_de_config *config) { if (!config) return; @@ -1768,24 +2012,28 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_DE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_de_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_anr_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_config *config){ + struct ia_css_anr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr_config() enter: config=%p\n", + config); *config = params->anr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr_config() leave\n"); ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1793,7 +2041,7 @@ ia_css_get_anr_config(const struct ia_css_isp_parameters *params, void ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config) + const struct ia_css_anr_config *config) { if (!config) return; @@ -1807,24 +2055,28 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_anr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_thres *config){ + struct ia_css_anr_thres *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr2_config() enter: config=%p\n", + config); *config = params->anr_thres; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_anr2_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_anr2_config() leave\n"); ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1832,7 +2084,7 @@ ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config) + const struct ia_css_anr_thres *config) { if (!config) return; @@ -1846,24 +2098,28 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ANR2_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_anr2_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ce_config(const struct ia_css_isp_parameters *params, - struct ia_css_ce_config *config){ + struct ia_css_ce_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ce_config() enter: config=%p\n", + config); *config = params->ce_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ce_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ce_config() leave\n"); ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1871,7 +2127,7 @@ ia_css_get_ce_config(const struct ia_css_isp_parameters *params, void ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config) + const struct ia_css_ce_config *config) { if (!config) return; @@ -1885,24 +2141,28 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ce_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, - struct ia_css_ecd_config *config){ + struct ia_css_ecd_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ecd_config() enter: config=%p\n", + config); *config = params->ecd_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ecd_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ecd_config() leave\n"); ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1910,7 +2170,7 @@ ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config) + const struct ia_css_ecd_config *config) { if (!config) return; @@ -1924,24 +2184,28 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_ECD_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ecd_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, - struct ia_css_ynr_config *config){ + struct ia_css_ynr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ynr_config() enter: config=%p\n", + config); *config = params->ynr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ynr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ynr_config() leave\n"); ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1949,7 +2213,7 @@ ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config) + const struct ia_css_ynr_config *config) { if (!config) return; @@ -1963,24 +2227,28 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ynr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_fc_config(const struct ia_css_isp_parameters *params, - struct ia_css_fc_config *config){ + struct ia_css_fc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_fc_config() enter: config=%p\n", + config); *config = params->fc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_fc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_fc_config() leave\n"); ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -1988,7 +2256,7 @@ ia_css_get_fc_config(const struct ia_css_isp_parameters *params, void ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config) + const struct ia_css_fc_config *config) { if (!config) return; @@ -2002,24 +2270,28 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_fc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_cnr_config *config){ + struct ia_css_cnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_cnr_config() enter: config=%p\n", + config); *config = params->cnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_cnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_cnr_config() leave\n"); ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2027,7 +2299,7 @@ ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config) + const struct ia_css_cnr_config *config) { if (!config) return; @@ -2041,24 +2313,28 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_cnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_macc_config(const struct ia_css_isp_parameters *params, - struct ia_css_macc_config *config){ + struct ia_css_macc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_macc_config() enter: config=%p\n", + config); *config = params->macc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_macc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_macc_config() leave\n"); ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2066,7 +2342,7 @@ ia_css_get_macc_config(const struct ia_css_isp_parameters *params, void ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config) + const struct ia_css_macc_config *config) { if (!config) return; @@ -2080,24 +2356,28 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_MACC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_macc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_config *config){ + struct ia_css_ctc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ctc_config() enter: config=%p\n", + config); *config = params->ctc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_ctc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_ctc_config() leave\n"); ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2105,7 +2385,7 @@ ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config) + const struct ia_css_ctc_config *config) { if (!config) return; @@ -2119,31 +2399,35 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CTC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_ctc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_aa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config){ + struct ia_css_aa_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_aa_config() enter: config=%p\n", + config); *config = params->aa_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_aa_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_aa_config() leave\n"); } /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) + const struct ia_css_aa_config *config) { if (!config) return; @@ -2156,24 +2440,28 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_AA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_aa_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_yuv2rgb_config() enter: config=%p\n", + config); *config = params->yuv2rgb_cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_yuv2rgb_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_yuv2rgb_config() leave\n"); ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2181,7 +2469,7 @@ ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2195,24 +2483,28 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_YUV2RGB_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_yuv2rgb_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_rgb2yuv_config() enter: config=%p\n", + config); *config = params->rgb2yuv_cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_rgb2yuv_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_rgb2yuv_config() leave\n"); ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2220,7 +2512,7 @@ ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2234,24 +2526,28 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_RGB2YUV_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_rgb2yuv_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_csc_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config){ + struct ia_css_cc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_csc_config() enter: config=%p\n", + config); *config = params->cc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_csc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_csc_config() leave\n"); ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2259,7 +2555,7 @@ ia_css_get_csc_config(const struct ia_css_isp_parameters *params, void ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) + const struct ia_css_cc_config *config) { if (!config) return; @@ -2273,24 +2569,28 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_CSC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_csc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_nr_config(const struct ia_css_isp_parameters *params, - struct ia_css_nr_config *config){ + struct ia_css_nr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_nr_config() enter: config=%p\n", + config); *config = params->nr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_nr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_nr_config() leave\n"); ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2298,7 +2598,7 @@ ia_css_get_nr_config(const struct ia_css_isp_parameters *params, void ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) + const struct ia_css_nr_config *config) { if (!config) return; @@ -2313,24 +2613,28 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_NR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_nr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_gc_config(const struct ia_css_isp_parameters *params, - struct ia_css_gc_config *config){ + struct ia_css_gc_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_gc_config() enter: config=%p\n", + config); *config = params->gc_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_gc_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_gc_config() leave\n"); ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2338,7 +2642,7 @@ ia_css_get_gc_config(const struct ia_css_isp_parameters *params, void ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config) + const struct ia_css_gc_config *config) { if (!config) return; @@ -2352,24 +2656,28 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_GC_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_gc_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horicoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horicoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horicoef_config() leave\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2377,13 +2685,14 @@ ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horicoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_horicoef_config() enter:\n"); ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2394,24 +2703,28 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertcoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertcoef_config() leave\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2419,13 +2732,14 @@ ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertcoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_vertcoef_config() enter:\n"); ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2436,24 +2750,28 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horiproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_horiproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_horiproj_config() leave\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2461,13 +2779,14 @@ ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_horiproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_horiproj_config() enter:\n"); ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2478,24 +2797,28 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config){ + struct ia_css_dvs_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertproj_config() enter: config=%p\n", + config); *config = params->dvs_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis_vertproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis_vertproj_config() leave\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2503,13 +2826,14 @@ ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) + const struct ia_css_dvs_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis_vertproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis_vertproj_config() enter:\n"); ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs_coefs = *config; params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; @@ -2520,24 +2844,28 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horicoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horicoef_config() leave\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2545,13 +2873,14 @@ ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horicoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_horicoef_config() enter:\n"); ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2562,24 +2891,28 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertcoef_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertcoef_config() leave\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2587,13 +2920,14 @@ ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertcoef_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_vertcoef_config() enter:\n"); ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2604,24 +2938,28 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_horiproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_horiproj_config() leave\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2629,13 +2967,14 @@ ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_horiproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_horiproj_config() enter:\n"); ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2646,24 +2985,28 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config){ + struct ia_css_dvs2_coefficients *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", + config); *config = params->dvs2_coefs; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_sdis2_vertproj_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_sdis2_vertproj_config() leave\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2671,13 +3014,14 @@ ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) + const struct ia_css_dvs2_coefficients *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_sdis2_vertproj_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_sdis2_vertproj_config() enter:\n"); ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dvs2_coefs = *config; params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; @@ -2688,24 +3032,28 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_r_gamma_config() enter: config=%p\n", + config); *config = params->r_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_r_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_r_gamma_config() leave\n"); ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2713,7 +3061,7 @@ ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2727,24 +3075,28 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_R_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_r_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_g_gamma_config() enter: config=%p\n", + config); *config = params->g_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_g_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_g_gamma_config() leave\n"); ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2752,7 +3104,7 @@ ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2766,24 +3118,28 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_G_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_g_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config){ + struct ia_css_rgb_gamma_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_b_gamma_config() enter: config=%p\n", + config); *config = params->b_gamma_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_b_gamma_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_b_gamma_config() leave\n"); ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2791,7 +3147,7 @@ ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) + const struct ia_css_rgb_gamma_table *config) { if (!config) return; @@ -2805,24 +3161,28 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_B_GAMMA_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_b_gamma_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_table *config){ + struct ia_css_xnr_table *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_table_config() enter: config=%p\n", + config); *config = params->xnr_table; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_table_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_table_config() leave\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2830,13 +3190,14 @@ ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config) + const struct ia_css_xnr_table *config) { if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_table_config() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_set_xnr_table_config() enter:\n"); ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; params->config_changed[IA_CSS_XNR_TABLE_ID] = true; @@ -2844,24 +3205,28 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_TABLE_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr_table_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_formats_config(const struct ia_css_isp_parameters *params, - struct ia_css_formats_config *config){ + struct ia_css_formats_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_formats_config() enter: config=%p\n", + config); *config = params->formats_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_formats_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_formats_config() leave\n"); ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2869,7 +3234,7 @@ ia_css_get_formats_config(const struct ia_css_isp_parameters *params, void ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config) + const struct ia_css_formats_config *config) { if (!config) return; @@ -2883,24 +3248,28 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_FORMATS_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_formats_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_config *config){ + struct ia_css_xnr_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_config() enter: config=%p\n", + config); *config = params->xnr_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr_config() leave\n"); ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2908,7 +3277,7 @@ ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config) + const struct ia_css_xnr_config *config) { if (!config) return; @@ -2922,24 +3291,28 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr3_config *config){ + struct ia_css_xnr3_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr3_config() enter: config=%p\n", + config); *config = params->xnr3_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_xnr3_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_xnr3_config() leave\n"); ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2947,7 +3320,7 @@ ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config) + const struct ia_css_xnr3_config *config) { if (!config) return; @@ -2961,24 +3334,28 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_XNR3_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_xnr3_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, - struct ia_css_3a_config *config){ + struct ia_css_3a_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_s3a_config() enter: config=%p\n", + config); *config = params->s3a_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_s3a_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_s3a_config() leave\n"); ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -2986,7 +3363,7 @@ ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config) + const struct ia_css_3a_config *config) { if (!config) return; @@ -3001,24 +3378,28 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_S3A_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_s3a_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_get_function() */ static void ia_css_get_output_config(const struct ia_css_isp_parameters *params, - struct ia_css_output_config *config){ + struct ia_css_output_config *config) +{ if (!config) return; assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() enter: config=%p\n", - config); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_output_config() enter: config=%p\n", + config); *config = params->output_config; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_get_output_config() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_get_output_config() leave\n"); ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); } @@ -3026,7 +3407,7 @@ ia_css_get_output_config(const struct ia_css_isp_parameters *params, void ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config) + const struct ia_css_output_config *config) { if (!config) return; @@ -3040,14 +3421,15 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_OUTPUT_ID] = true; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_set_output_config() leave: return_void\n"); } /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) { ia_css_get_dp_config(params, config->dp_config); ia_css_get_wb_config(params, config->wb_config); @@ -3092,7 +3474,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params, void ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) { ia_css_set_dp_config(params, config->dp_config); ia_css_set_wb_config(params, config->wb_config); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h index b5175c253c61d..7b81ffa29d8bd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h @@ -150,237 +150,237 @@ struct ia_css_memory_offsets { struct ia_css_pipeline_stage; /* forward declaration */ extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params); + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config); + const struct ia_css_dp_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config); + const struct ia_css_wb_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config); + const struct ia_css_tnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config); + const struct ia_css_ob_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config); + const struct ia_css_de_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config); + const struct ia_css_anr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config); + const struct ia_css_anr_thres *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config); + const struct ia_css_ce_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config); + const struct ia_css_ecd_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config); + const struct ia_css_ynr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config); + const struct ia_css_fc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config); + const struct ia_css_cnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config); + const struct ia_css_macc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config); + const struct ia_css_ctc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config); + const struct ia_css_aa_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); + const struct ia_css_cc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config); + const struct ia_css_nr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config); + const struct ia_css_gc_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); + const struct ia_css_dvs_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); + const struct ia_css_dvs2_coefficients *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); + const struct ia_css_rgb_gamma_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config); + const struct ia_css_xnr_table *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config); + const struct ia_css_formats_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config); + const struct ia_css_xnr_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config); + const struct ia_css_xnr3_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config); + const struct ia_css_3a_config *config); /* Code generated by genparam/gencode.c:gen_set_function() */ void ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config); + const struct ia_css_output_config *config); /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) ; #ifdef ISP2401 @@ -389,7 +389,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params, void ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) + const struct ia_css_isp_config *config) ; #ifdef ISP2401 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c index dcc42c1ce94ef..c54787f3fc244 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c @@ -23,27 +23,31 @@ static void ia_css_initialize_aa_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_aa_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; if (size) - memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size); + memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + 0, size); } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_aa_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_cnr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; @@ -52,20 +56,22 @@ ia_css_initialize_cnr_state( if (size) { ia_css_init_cnr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_cnr2_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr2_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; @@ -74,20 +80,22 @@ ia_css_initialize_cnr2_state( if (size) { ia_css_init_cnr2_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_cnr2_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_dp_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_dp_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; @@ -96,20 +104,22 @@ ia_css_initialize_dp_state( if (size) { ia_css_init_dp_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_dp_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_de_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_de_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; @@ -118,20 +128,22 @@ ia_css_initialize_de_state( if (size) { ia_css_init_de_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_de_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_tnr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_tnr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; @@ -140,20 +152,22 @@ ia_css_initialize_tnr_state( if (size) { ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_tnr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_ref_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ref_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; @@ -162,20 +176,22 @@ ia_css_initialize_ref_state( if (size) { ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ref_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_init_function() */ static void ia_css_initialize_ynr_state( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ynr_state() enter:\n"); { unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; @@ -184,16 +200,18 @@ ia_css_initialize_ynr_state( if (size) { ia_css_init_ynr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], + size); } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_initialize_ynr_state() leave:\n"); } /* Code generated by genparam/genstate.c:gen_state_init_table() */ -void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = { +void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( + const struct ia_css_binary *binary) = { ia_css_initialize_aa_state, ia_css_initialize_cnr_state, ia_css_initialize_cnr2_state, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h index 732adafb0a633..cc9cdcd0e2be8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h @@ -65,7 +65,8 @@ struct ia_css_state_memory_offsets { #include "ia_css_binary.h" /* struct ia_css_binary */ /* Code generated by genparam/genstate.c:gen_state_init_table() */ -extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary); +extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( + const struct ia_css_binary *binary); #endif /* IA_CSS_INCLUDE_STATE */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h index ba43562f12874..8741b8347dd42 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h @@ -122,7 +122,7 @@ #define _DMA_V2_ZERO_EXTEND 0 #define _DMA_V2_SIGN_EXTEND 1 - /* SLAVE address map */ +/* SLAVE address map */ #define _DMA_V2_SEL_FSM_CMD 0 #define _DMA_V2_SEL_CH_REG 1 #define _DMA_V2_SEL_CONN_GROUP 2 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h index 33f8b5ce9ba3e..3cc627aa6b091 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h @@ -25,43 +25,43 @@ #define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ #define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */ - /* The supported range is [-256, .., +256] */ - /* in 14-bit signed notation, */ - /* We need all ten bits (MSB must be zero). */ - /* -s is inserted to solve this issue, and */ - /* therefore "1" is equal to +256. */ +/* The supported range is [-256, .., +256] */ +/* in 14-bit signed notation, */ +/* We need all ten bits (MSB must be zero). */ +/* -s is inserted to solve this issue, and */ +/* therefore "1" is equal to +256. */ #define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) #define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */ - /* 2 bytes per coefficient */ +/* 2 bytes per coefficient */ #define _HRT_GDC_REG_ALIGN 4 - // 31 30 29 25 24 0 - // |-----|---|--------|------------------------| - // | CMD | C | Reg_ID | Value | +// 31 30 29 25 24 0 +// |-----|---|--------|------------------------| +// | CMD | C | Reg_ID | Value | - // There are just two commands possible for the GDC block: - // 1 - Configure reg - // 0 - Data token +// There are just two commands possible for the GDC block: +// 1 - Configure reg +// 0 - Data token - // C - Reserved bit - // Used in protocol to indicate whether it is C-run or other type of runs - // In case of C-run, this bit has a value of 1, for all the other runs, it is 0. +// C - Reserved bit +// Used in protocol to indicate whether it is C-run or other type of runs +// In case of C-run, this bit has a value of 1, for all the other runs, it is 0. - // Reg_ID - Address of the register to be configured +// Reg_ID - Address of the register to be configured - // Value - Value to store to the addressed register, maximum of 24 bits +// Value - Value to store to the addressed register, maximum of 24 bits - // Configure reg command is not followed by any other token. - // The address of the register and the data to be filled in is contained in the same token +// Configure reg command is not followed by any other token. +// The address of the register and the data to be filled in is contained in the same token - // When the first data token is received, it must be: - // 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, - // 2. P0'X (device configured in one of the tetragon modes) - // After the first data token is received, pre-defined number of tokens with the following meaning follow: - // 1. two tokens: SRC address ; DST address - // 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address +// When the first data token is received, it must be: +// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, +// 2. P0'X (device configured in one of the tetragon modes) +// After the first data token is received, pre-defined number of tokens with the following meaning follow: +// 1. two tokens: SRC address ; DST address +// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address #define HRT_GDC_CONFIG_CMD 1 #define HRT_GDC_DATA_CMD 0 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h index d02435a3ec5a1..96286a141b00b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h @@ -18,10 +18,10 @@ #define _HRT_GPIO_BLOCK_REG_ALIGN 4 /* R/W registers */ -#define _gpio_block_reg_do_e 0 +#define _gpio_block_reg_do_e 0 #define _gpio_block_reg_do_select 1 -#define _gpio_block_reg_do_0 2 -#define _gpio_block_reg_do_1 3 +#define _gpio_block_reg_do_0 2 +#define _gpio_block_reg_do_1 3 #define _gpio_block_reg_do_pwm_cnt_0 4 #define _gpio_block_reg_do_pwm_cnt_1 5 #define _gpio_block_reg_do_pwm_cnt_2 6 @@ -36,6 +36,6 @@ #define _gpio_block_reg_di_active_level 15 /* read-only registers */ -#define _gpio_block_reg_di 16 +#define _gpio_block_reg_di 16 #endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h index 0b921c33a7d2c..071073d70ebfd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h @@ -24,46 +24,46 @@ * The definitions are taken from _defs.h */ typedef enum hrt_isp_css_irq { - hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, - hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, - hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, - hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, - hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, - hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, - hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, - hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, - hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, - hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, - hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, - hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, - hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, - hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, - hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, - hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, - hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, - hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, - hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, - hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, - hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, - hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, - hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, - hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, - hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, - /* this must (obviously) be the last on in the enum */ - hrt_isp_css_irq_num_irqs + hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, + hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, + hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, + hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, + hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, + hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, + hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, + hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, + hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, + hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, + hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, + hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, + hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, + hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, + hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, + hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, + hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, + hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, + hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, + hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, + hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, + hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, + hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, + hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, + hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, + hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, + hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, + /* this must (obviously) be the last on in the enum */ + hrt_isp_css_irq_num_irqs } hrt_isp_css_irq_t; typedef enum hrt_isp_css_irq_status { - hrt_isp_css_irq_status_error, - hrt_isp_css_irq_status_more_irqs, - hrt_isp_css_irq_status_success + hrt_isp_css_irq_status_error, + hrt_isp_css_irq_status_more_irqs, + hrt_isp_css_irq_status_success } hrt_isp_css_irq_status_t; #endif /* _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h index e00bc841d0f0d..e9106d1e6a63d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h @@ -31,8 +31,8 @@ typedef char *tmemvectors, *tmemvectoru, *tvector; #define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) #if ISP_HAS_HIST - #define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) - #define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) +#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) +#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) #endif #endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h index 7e79e3c611ee4..29e097b5d9e4f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h @@ -45,26 +45,26 @@ #define ISP_VMEM_ELEM_PRECISION 14 #define ISP_VMEM_IS_BAMEM 1 #if ISP_VMEM_IS_BAMEM - #define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 - #define ISP_VMEM_BAMEM_LATENCY 5 - #define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 - #define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 - #define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 - #define ISP_VMEM_BAMEM_LININT 0 - #define ISP_VMEM_BAMEM_DAP_BITS 3 - #define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 - #define ISP_VMEM_BAMEM_PID_BITS 3 - #define ISP_VMEM_BAMEM_OFFSET_BITS 19 - #define ISP_VMEM_BAMEM_ADDRESS_BITS 25 - #define ISP_VMEM_BAMEM_RID_BITS 4 - #define ISP_VMEM_BAMEM_TRANSPOSITION 1 - #define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 - #define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 - #define ISP_VMEM_BAMEM_LUT_ELEMS 16 - #define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 - #define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 - #define ISP_VMEM_BAMEM_SMART_FETCH 1 - #define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 +#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 +#define ISP_VMEM_BAMEM_LATENCY 5 +#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 +#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 +#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 +#define ISP_VMEM_BAMEM_LININT 0 +#define ISP_VMEM_BAMEM_DAP_BITS 3 +#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 +#define ISP_VMEM_BAMEM_PID_BITS 3 +#define ISP_VMEM_BAMEM_OFFSET_BITS 19 +#define ISP_VMEM_BAMEM_ADDRESS_BITS 25 +#define ISP_VMEM_BAMEM_RID_BITS 4 +#define ISP_VMEM_BAMEM_TRANSPOSITION 1 +#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 +#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 +#define ISP_VMEM_BAMEM_LUT_ELEMS 16 +#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 +#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 +#define ISP_VMEM_BAMEM_SMART_FETCH 1 +#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 #endif /* ISP_VMEM_IS_BAMEM */ #define ISP_PMEM_DEPTH 2048 #define ISP_PMEM_WIDTH 640 @@ -111,8 +111,8 @@ #define ISP_SRU_GUARDING 1 #define ISP_VLSU_GUARDING 1 -#define ISP_VRF_RAM 1 -#define ISP_SRF_RAM 1 +#define ISP_VRF_RAM 1 +#define ISP_SRF_RAM 1 #define ISP_SPLIT_VMUL_VADD_IS 0 #define ISP_RFSPLIT_FPGA 0 @@ -166,7 +166,7 @@ #define ISP_VMEM_WIDTH 896 #define ISP_VMEM_ALIGN 128 #if ISP_VMEM_IS_BAMEM - #define ISP_VMEM_ALIGN_ELEM 2 +#define ISP_VMEM_ALIGN_ELEM 2 #endif /* ISP_VMEM_IS_BAMEM */ #define ISP_SIMDLSU 1 #define ISP_LSU_IMM_BITS 12 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h index d897fc943da4f..85d509f5b923f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h @@ -55,14 +55,14 @@ typedef unsigned int dma_channel; typedef enum { - dma_isp_to_bus_connection = HIVE_DMA_ISP_BUS_CONN, - dma_isp_to_ddr_connection = HIVE_DMA_ISP_DDR_CONN, - dma_bus_to_ddr_connection = HIVE_DMA_BUS_DDR_CONN, + dma_isp_to_bus_connection = HIVE_DMA_ISP_BUS_CONN, + dma_isp_to_ddr_connection = HIVE_DMA_ISP_DDR_CONN, + dma_bus_to_ddr_connection = HIVE_DMA_BUS_DDR_CONN, } dma_connection; typedef enum { - dma_zero_extension = _DMA_ZERO_EXTEND, - dma_sign_extension = _DMA_SIGN_EXTEND + dma_zero_extension = _DMA_ZERO_EXTEND, + dma_sign_extension = _DMA_SIGN_EXTEND } dma_extension; #define DMA_PROP_SHIFT(val, param) ((val) << _DMA_V2_ ## param ## _IDX) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c index 92e7b70c17384..d911aec24185b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c @@ -49,13 +49,13 @@ void debug_buffer_ddr_init(const hrt_vaddress addr) /* set the ddr queue */ debug_buffer_ddr_address = addr; mmgr_store(addr + DEBUG_DATA_BUF_MODE_DDR_ADDR, - &mode, sizeof(debug_buf_mode_t)); + &mode, sizeof(debug_buf_mode_t)); mmgr_store(addr + DEBUG_DATA_HEAD_DDR_ADDR, - &head, sizeof(uint32_t)); + &head, sizeof(uint32_t)); mmgr_store(addr + DEBUG_DATA_TAIL_DDR_ADDR, - &tail, sizeof(uint32_t)); + &tail, sizeof(uint32_t)); mmgr_store(addr + DEBUG_DATA_ENABLE_DDR_ADDR, - &enable, sizeof(uint32_t)); + &enable, sizeof(uint32_t)); /* set the local copy */ debug_data.head = 0; @@ -67,5 +67,5 @@ void debug_buffer_setmode(const debug_buf_mode_t mode) assert(debug_buffer_address != ((hrt_address)-1)); sp_dmem_store_uint32(SP0_ID, - debug_buffer_address + DEBUG_DATA_BUF_MODE_ADDR, mode); + debug_buffer_address + DEBUG_DATA_BUF_MODE_ADDR, mode); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h index 9bc0a7cdd9afb..8447e33d1c04b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h @@ -42,7 +42,8 @@ STORAGE_CLASS_DEBUG_C hrt_data debug_dequeue(void) if (!is_debug_buffer_empty()) { value = debug_data_ptr->buf[debug_data_ptr->head]; debug_data_ptr->head = (debug_data_ptr->head + 1) & DEBUG_BUF_MASK; - sp_dmem_store_uint32(SP0_ID, debug_buffer_address + DEBUG_DATA_HEAD_ADDR, debug_data_ptr->head); + sp_dmem_store_uint32(SP0_ID, debug_buffer_address + DEBUG_DATA_HEAD_ADDR, + debug_data_ptr->head); } return value; @@ -50,34 +51,48 @@ STORAGE_CLASS_DEBUG_C hrt_data debug_dequeue(void) STORAGE_CLASS_DEBUG_C void debug_synch_queue(void) { - u32 remote_tail = sp_dmem_load_uint32(SP0_ID, debug_buffer_address + DEBUG_DATA_TAIL_ADDR); -/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ + u32 remote_tail = sp_dmem_load_uint32(SP0_ID, + debug_buffer_address + DEBUG_DATA_TAIL_ADDR); + /* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ if (remote_tail > debug_data_ptr->tail) { size_t delta = remote_tail - debug_data_ptr->tail; - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + + debug_data_ptr->tail * sizeof(uint32_t), + (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); } else if (remote_tail < debug_data_ptr->tail) { size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); - sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR, (void *)&debug_data_ptr->buf[0], remote_tail * sizeof(uint32_t)); + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR + + debug_data_ptr->tail * sizeof(uint32_t), + (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + sp_dmem_load(SP0_ID, debug_buffer_address + DEBUG_DATA_BUF_ADDR, + (void *)&debug_data_ptr->buf[0], + remote_tail * sizeof(uint32_t)); } /* else we are up to date */ debug_data_ptr->tail = remote_tail; } STORAGE_CLASS_DEBUG_C void debug_synch_queue_isp(void) { - u32 remote_tail = isp_dmem_load_uint32(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_TAIL_ADDR); -/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ + u32 remote_tail = isp_dmem_load_uint32(ISP0_ID, + DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_TAIL_ADDR); + /* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ if (remote_tail > debug_data_ptr->tail) { size_t delta = remote_tail - debug_data_ptr->tail; - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + + debug_data_ptr->tail * sizeof(uint32_t), + (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); } else if (remote_tail < debug_data_ptr->tail) { size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); - isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR, (void *)&debug_data_ptr->buf[0], remote_tail * sizeof(uint32_t)); + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR + + debug_data_ptr->tail * sizeof(uint32_t), + (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + isp_dmem_load(ISP0_ID, DEBUG_BUFFER_ISP_DMEM_ADDR + DEBUG_DATA_BUF_ADDR, + (void *)&debug_data_ptr->buf[0], + remote_tail * sizeof(uint32_t)); } /* else we are up to date */ debug_data_ptr->tail = remote_tail; } @@ -86,17 +101,24 @@ STORAGE_CLASS_DEBUG_C void debug_synch_queue_ddr(void) { u32 remote_tail; - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_TAIL_DDR_ADDR, &remote_tail, sizeof(uint32_t)); -/* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_TAIL_DDR_ADDR, &remote_tail, + sizeof(uint32_t)); + /* We could move the remote head after the upload, but we would have to limit the upload w.r.t. the local head. This is easier */ if (remote_tail > debug_data_ptr->tail) { size_t delta = remote_tail - debug_data_ptr->tail; - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + + debug_data_ptr->tail * sizeof(uint32_t), + (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); } else if (remote_tail < debug_data_ptr->tail) { size_t delta = DEBUG_BUF_SIZE - debug_data_ptr->tail; - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + debug_data_ptr->tail * sizeof(uint32_t), (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); - mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR, (void *)&debug_data_ptr->buf[0], remote_tail * sizeof(uint32_t)); + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR + + debug_data_ptr->tail * sizeof(uint32_t), + (void *)&debug_data_ptr->buf[debug_data_ptr->tail], delta * sizeof(uint32_t)); + mmgr_load(debug_buffer_ddr_address + DEBUG_DATA_BUF_DDR_ADDR, + (void *)&debug_data_ptr->buf[0], + remote_tail * sizeof(uint32_t)); } /* else we are up to date */ debug_data_ptr->tail = remote_tail; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c index 265dfdd653c6f..87df1da1164eb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c @@ -42,52 +42,52 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) state->last_command_channel = (tmp >> 10 & 0x1F); state->last_command_param = (tmp >> 15 & 0x0F); tmp = (tmp >> 4) & 0x3F; -/* state->last_command = (dma_commands_t)tmp; */ -/* if the enumerator is made non-linear */ + /* state->last_command = (dma_commands_t)tmp; */ + /* if the enumerator is made non-linear */ /* AM: the list below does not cover all the cases*/ /* and these are not correct */ /* therefore for just dumpinmg this command*/ state->last_command = tmp; -/* - if (tmp == 0) - state->last_command = DMA_COMMAND_READ; - if (tmp == 1) - state->last_command = DMA_COMMAND_WRITE; - if (tmp == 2) - state->last_command = DMA_COMMAND_SET_CHANNEL; - if (tmp == 3) - state->last_command = DMA_COMMAND_SET_PARAM; - if (tmp == 4) - state->last_command = DMA_COMMAND_READ_SPECIFIC; - if (tmp == 5) - state->last_command = DMA_COMMAND_WRITE_SPECIFIC; - if (tmp == 8) - state->last_command = DMA_COMMAND_INIT; - if (tmp == 12) - state->last_command = DMA_COMMAND_INIT_SPECIFIC; - if (tmp == 15) - state->last_command = DMA_COMMAND_RST; -*/ + /* + if (tmp == 0) + state->last_command = DMA_COMMAND_READ; + if (tmp == 1) + state->last_command = DMA_COMMAND_WRITE; + if (tmp == 2) + state->last_command = DMA_COMMAND_SET_CHANNEL; + if (tmp == 3) + state->last_command = DMA_COMMAND_SET_PARAM; + if (tmp == 4) + state->last_command = DMA_COMMAND_READ_SPECIFIC; + if (tmp == 5) + state->last_command = DMA_COMMAND_WRITE_SPECIFIC; + if (tmp == 8) + state->last_command = DMA_COMMAND_INIT; + if (tmp == 12) + state->last_command = DMA_COMMAND_INIT_SPECIFIC; + if (tmp == 15) + state->last_command = DMA_COMMAND_RST; + */ -/* No sub-fields, idx = 0 */ + /* No sub-fields, idx = 0 */ state->current_command = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_CMD_IDX)); + DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_CMD_IDX)); state->current_addr_a = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_A_IDX)); + DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_A_IDX)); state->current_addr_b = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_B_IDX)); + DMA_CG_INFO_REG_IDX(0, _DMA_FSM_GROUP_ADDR_B_IDX)); tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_STATE_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_STATE_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_idle = tmp & 0x1; state->fsm_ctrl_run = tmp & 0x2; state->fsm_ctrl_stalling = tmp & 0x4; state->fsm_ctrl_error = tmp & 0x8; tmp = tmp >> 4; -/* state->fsm_ctrl_state = (dma_ctrl_states_t)tmp; */ + /* state->fsm_ctrl_state = (dma_ctrl_states_t)tmp; */ if (tmp == 0) state->fsm_ctrl_state = DMA_CTRL_STATE_IDLE; if (tmp == 1) @@ -99,92 +99,92 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) if (tmp == 4) state->fsm_ctrl_state = DMA_CTRL_STATE_INIT; state->fsm_ctrl_source_dev = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_source_addr = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_source_stride = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_source_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_XB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_XB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_source_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_REQ_YB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_REQ_YB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_source_dev = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_dest_dev = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_dest_addr = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_dest_stride = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_source_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_dest_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_dest_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_source_elems = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_dest_elems = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); state->fsm_ctrl_pack_extension = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX, - _DMA_FSM_GROUP_FSM_CTRL_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX, + _DMA_FSM_GROUP_FSM_CTRL_IDX)); tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_STATE_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_STATE_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); state->pack_idle = tmp & 0x1; state->pack_run = tmp & 0x2; state->pack_stalling = tmp & 0x4; state->pack_error = tmp & 0x8; state->pack_cnt_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_CNT_YB_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_CNT_YB_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); state->pack_src_cnt_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); state->pack_dest_cnt_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX, - _DMA_FSM_GROUP_FSM_PACK_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX, + _DMA_FSM_GROUP_FSM_PACK_IDX)); tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_REQ_STATE_IDX, - _DMA_FSM_GROUP_FSM_REQ_IDX)); -/* state->read_state = (dma_rw_states_t)tmp; */ + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_REQ_STATE_IDX, + _DMA_FSM_GROUP_FSM_REQ_IDX)); + /* state->read_state = (dma_rw_states_t)tmp; */ if (tmp == 0) state->read_state = DMA_RW_STATE_IDLE; if (tmp == 1) @@ -194,19 +194,19 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) if (tmp == 3) state->read_state = DMA_RW_STATE_UNLOCK_CHANNEL; state->read_cnt_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_REQ_CNT_YB_IDX, - _DMA_FSM_GROUP_FSM_REQ_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_REQ_CNT_YB_IDX, + _DMA_FSM_GROUP_FSM_REQ_IDX)); state->read_cnt_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_REQ_CNT_XB_IDX, - _DMA_FSM_GROUP_FSM_REQ_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_REQ_CNT_XB_IDX, + _DMA_FSM_GROUP_FSM_REQ_IDX)); tmp = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_WR_STATE_IDX, - _DMA_FSM_GROUP_FSM_WR_IDX)); -/* state->write_state = (dma_rw_states_t)tmp; */ + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_WR_STATE_IDX, + _DMA_FSM_GROUP_FSM_WR_IDX)); + /* state->write_state = (dma_rw_states_t)tmp; */ if (tmp == 0) state->write_state = DMA_RW_STATE_IDLE; if (tmp == 1) @@ -216,13 +216,13 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) if (tmp == 3) state->write_state = DMA_RW_STATE_UNLOCK_CHANNEL; state->write_height = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_WR_CNT_YB_IDX, - _DMA_FSM_GROUP_FSM_WR_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_WR_CNT_YB_IDX, + _DMA_FSM_GROUP_FSM_WR_IDX)); state->write_width = dma_reg_load(ID, - DMA_CG_INFO_REG_IDX( - _DMA_FSM_GROUP_FSM_WR_CNT_XB_IDX, - _DMA_FSM_GROUP_FSM_WR_IDX)); + DMA_CG_INFO_REG_IDX( + _DMA_FSM_GROUP_FSM_WR_CNT_XB_IDX, + _DMA_FSM_GROUP_FSM_WR_IDX)); for (i = 0; i < HIVE_ISP_NUM_DMA_CONNS; i++) { dma_port_state_t *port = &state->port_states[i]; @@ -253,38 +253,38 @@ void dma_get_state(const dma_ID_t ID, dma_state_t *state) dma_channel_state_t *ch = &state->channel_states[i]; ch->connection = DMA_GET_CONNECTION(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_PACKING_SETUP_PARAM))); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_PACKING_SETUP_PARAM))); ch->sign_extend = DMA_GET_EXTENSION(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_PACKING_SETUP_PARAM))); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_PACKING_SETUP_PARAM))); ch->height = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_HEIGHT_PARAM)); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_HEIGHT_PARAM)); ch->stride_a = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_STRIDE_A_PARAM)); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_STRIDE_A_PARAM)); ch->elems_a = DMA_GET_ELEMENTS(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_A_PARAM))); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_A_PARAM))); ch->cropping_a = DMA_GET_CROPPING(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_A_PARAM))); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_A_PARAM))); ch->width_a = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_WIDTH_A_PARAM)); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_WIDTH_A_PARAM)); ch->stride_b = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_STRIDE_B_PARAM)); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_STRIDE_B_PARAM)); ch->elems_b = DMA_GET_ELEMENTS(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_B_PARAM))); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_B_PARAM))); ch->cropping_b = DMA_GET_CROPPING(dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_ELEM_CROPPING_B_PARAM))); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_ELEM_CROPPING_B_PARAM))); ch->width_b = dma_reg_load(ID, - DMA_CHANNEL_PARAM_REG_IDX(i, - _DMA_WIDTH_B_PARAM)); + DMA_CHANNEL_PARAM_REG_IDX(i, + _DMA_WIDTH_B_PARAM)); } } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h index 2c30925c8f514..54837b5246554 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h @@ -188,9 +188,9 @@ struct dma_state_s { int fsm_ctrl_pack_dest_elems; int fsm_ctrl_pack_extension; int pack_idle; - int pack_run; + int pack_run; int pack_stalling; - int pack_error; + int pack_error; int pack_cnt_height; int pack_src_cnt_width; int pack_dest_cnt_width; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h index 5b4d7c02f1bae..ebb75da72e182 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h @@ -22,8 +22,8 @@ #include "assert_support.h" STORAGE_CLASS_DMA_C void dma_reg_store(const dma_ID_t ID, - const unsigned int reg, - const hrt_data value) + const unsigned int reg, + const hrt_data value) { assert(ID < N_DMA_ID); assert(DMA_BASE[ID] != (hrt_address) - 1); @@ -31,7 +31,7 @@ STORAGE_CLASS_DMA_C void dma_reg_store(const dma_ID_t ID, } STORAGE_CLASS_DMA_C hrt_data dma_reg_load(const dma_ID_t ID, - const unsigned int reg) + const unsigned int reg) { assert(ID < N_DMA_ID); assert(DMA_BASE[ID] != (hrt_address) - 1); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h index c595692c6ea98..39a9dd697096a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h @@ -34,24 +34,28 @@ typedef enum { static const hrt_address event_source_addr[N_EVENT_ID] = { 0x0000000000380000ULL, 0x0000000000380004ULL, - 0xffffffffffffffffULL}; + 0xffffffffffffffffULL +}; /* Read from FIFO are blocking, query data availability */ static const hrt_address event_source_query_addr[N_EVENT_ID] = { 0x0000000000380010ULL, 0x0000000000380014ULL, - 0xffffffffffffffffULL}; + 0xffffffffffffffffULL +}; /* Events are written to FIFO */ static const hrt_address event_sink_addr[N_EVENT_ID] = { 0x0000000000380008ULL, 0x000000000038000CULL, - 0x0000000000090104ULL}; + 0x0000000000090104ULL +}; /* Writes to FIFO are blocking, query data space */ static const hrt_address event_sink_query_addr[N_EVENT_ID] = { 0x0000000000380018ULL, 0x000000000038001CULL, - 0x000000000009010CULL}; + 0x000000000009010CULL +}; #endif /* _EVENT_FIFO_LOCAL_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h index 9af2d46b55970..0fb0172badc5d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h @@ -32,7 +32,7 @@ STORAGE_CLASS_EVENT_C void event_wait_for(const event_ID_t ID) } STORAGE_CLASS_EVENT_C void cnd_event_wait_for(const event_ID_t ID, - const bool cnd) + const bool cnd) { if (cnd) { event_wait_for(ID); @@ -47,7 +47,7 @@ STORAGE_CLASS_EVENT_C hrt_data event_receive_token(const event_ID_t ID) } STORAGE_CLASS_EVENT_C void event_send_token(const event_ID_t ID, - const hrt_data token) + const hrt_data token) { assert(ID < N_EVENT_ID); assert(event_sink_addr[ID] != ((hrt_address) - 1)); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c index bc84a4b298499..e9116f11dc80f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c @@ -32,26 +32,27 @@ STORAGE_CLASS_FIFO_MONITOR_DATA unsigned int FIFO_SWITCH_ADDR[N_FIFO_SWITCH] = { _REG_GP_SWITCH_IF_ADDR, _REG_GP_SWITCH_GDC1_ADDR, - _REG_GP_SWITCH_GDC2_ADDR}; + _REG_GP_SWITCH_GDC2_ADDR +}; #ifndef __INLINE_FIFO_MONITOR__ #include "fifo_monitor_private.h" #endif /* __INLINE_FIFO_MONITOR__ */ static inline bool fifo_monitor_status_valid( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id); + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id); static inline bool fifo_monitor_status_accept( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id); + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id); void fifo_channel_get_state( - const fifo_monitor_ID_t ID, - const fifo_channel_t channel_id, - fifo_channel_state_t *state) + const fifo_monitor_ID_t ID, + const fifo_channel_t channel_id, + fifo_channel_state_t *state) { assert(channel_id < N_FIFO_CHANNEL); assert(state); @@ -59,431 +60,429 @@ void fifo_channel_get_state( switch (channel_id) { case FIFO_CHANNEL_ISP0_TO_SP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_SP); /* ISP_STR_MON_PORT_ISP2SP */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_SP); /* ISP_STR_MON_PORT_ISP2SP */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_SP); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_SP); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_ISP); /* ISP_STR_MON_PORT_SP2ISP */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_ISP); /* ISP_STR_MON_PORT_SP2ISP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_ISP); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_ISP); break; case FIFO_CHANNEL_SP0_TO_ISP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_ISP); /* ISP_STR_MON_PORT_SP2ISP */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_ISP); /* ISP_STR_MON_PORT_SP2ISP */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_ISP); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_ISP); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_SP); /* ISP_STR_MON_PORT_ISP2SP */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_SP); /* ISP_STR_MON_PORT_ISP2SP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_SP); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_SP); break; case FIFO_CHANNEL_ISP0_TO_IF0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_A); /* ISP_STR_MON_PORT_ISP2PIFA */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_A); /* ISP_STR_MON_PORT_ISP2PIFA */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_A); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_A); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); break; case FIFO_CHANNEL_IF0_TO_ISP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_A); /* ISP_STR_MON_PORT_PIFA2ISP */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_A); /* ISP_STR_MON_PORT_PIFA2ISP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_A); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_A); break; case FIFO_CHANNEL_ISP0_TO_IF1: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_B); /* ISP_STR_MON_PORT_ISP2PIFA */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_B); /* ISP_STR_MON_PORT_ISP2PIFA */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_PIF_B); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_PIF_B); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); break; case FIFO_CHANNEL_IF1_TO_ISP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); /* ISP_STR_MON_PORT_PIFB2ISP */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); /* ISP_STR_MON_PORT_PIFB2ISP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); break; case FIFO_CHANNEL_ISP0_TO_DMA0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_DMA); /* ISP_STR_MON_PORT_ISP2DMA */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_DMA); /* ISP_STR_MON_PORT_ISP2DMA */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_DMA); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_DMA); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_ISP); /* MOD_STR_MON_PORT_ISP2DMA */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_ISP); /* MOD_STR_MON_PORT_ISP2DMA */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_ISP); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_ISP); break; case FIFO_CHANNEL_DMA0_TO_ISP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2ISP); /* MOD_STR_MON_PORT_DMA2ISP */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2ISP); /* MOD_STR_MON_PORT_DMA2ISP */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2ISP); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2ISP); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_DMA); /* ISP_STR_MON_PORT_DMA2ISP */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_DMA); /* ISP_STR_MON_PORT_DMA2ISP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_DMA); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_DMA); break; case FIFO_CHANNEL_ISP0_TO_GDC0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GDC); /* ISP_STR_MON_PORT_ISP2GDC1 */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GDC); /* ISP_STR_MON_PORT_ISP2GDC1 */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GDC); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GDC); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_GDC); /* MOD_STR_MON_PORT_CELLS2GDC1 */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_GDC); /* MOD_STR_MON_PORT_CELLS2GDC1 */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_GDC); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_GDC); break; case FIFO_CHANNEL_GDC0_TO_ISP0: state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_GDC); /* MOD_STR_MON_PORT_GDC12CELLS */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_GDC); /* MOD_STR_MON_PORT_GDC12CELLS */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_GDC); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_GDC); state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GDC); /* ISP_STR_MON_PORT_GDC12ISP */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GDC); /* ISP_STR_MON_PORT_GDC12ISP */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GDC); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GDC); break; case FIFO_CHANNEL_ISP0_TO_GDC1: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_ISP2GDC2); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_ISP2GDC2); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_ISP2GDC2); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_ISP2GDC2); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); break; case FIFO_CHANNEL_GDC1_TO_ISP0: state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_GDC22ISP); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_GDC22ISP); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_GDC22ISP); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_GDC22ISP); break; case FIFO_CHANNEL_ISP0_TO_HOST0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GPD); /* ISP_STR_MON_PORT_ISP2GPD */ + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GPD); /* ISP_STR_MON_PORT_ISP2GPD */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_SND_GPD); + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_SND_GPD); { - hrt_data value = ia_css_device_load_uint32(0x0000000000380014ULL); + hrt_data value = ia_css_device_load_uint32(0x0000000000380014ULL); - state->fifo_valid = !_hrt_get_bit(value, 0); - state->sink_accept = false; /* no monitor connected */ + state->fifo_valid = !_hrt_get_bit(value, 0); + state->sink_accept = false; /* no monitor connected */ } break; - case FIFO_CHANNEL_HOST0_TO_ISP0: - { + case FIFO_CHANNEL_HOST0_TO_ISP0: { hrt_data value = ia_css_device_load_uint32(0x000000000038001CULL); state->fifo_valid = false; /* no monitor connected */ state->sink_accept = !_hrt_get_bit(value, 0); - } - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GPD); /* ISP_STR_MON_PORT_FA2ISP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_ISP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_GPD); - break; + } + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GPD); /* ISP_STR_MON_PORT_FA2ISP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_ISP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_GPD); + break; case FIFO_CHANNEL_SP0_TO_IF0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_A); /* SP_STR_MON_PORT_SP2PIFA */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_A); /* SP_STR_MON_PORT_SP2PIFA */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_A); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_A); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); /* MOD_STR_MON_PORT_CELLS2PIFA */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_A); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_A); break; case FIFO_CHANNEL_IF0_TO_SP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); /* MOD_STR_MON_PORT_PIFA2CELLS */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_A); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_A); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_PIF_A); /* SP_STR_MON_PORT_PIFA2SP */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_PIF_A); /* SP_STR_MON_PORT_PIFA2SP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_PIF_A); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_PIF_A); break; case FIFO_CHANNEL_SP0_TO_IF1: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_B); /* SP_STR_MON_PORT_SP2PIFB */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_B); /* SP_STR_MON_PORT_SP2PIFB */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_PIF_B); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_PIF_B); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); /* MOD_STR_MON_PORT_CELLS2PIFB */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_PIF_B); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_PIF_B); break; case FIFO_CHANNEL_IF1_TO_SP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); /* MOD_STR_MON_PORT_PIFB2CELLS */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_PIF_B); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_PIF_B); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); /* SP_STR_MON_PORT_PIFB2SP */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); /* SP_STR_MON_PORT_PIFB2SP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - ISP_STR_MON_PORT_RCV_PIF_B); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + ISP_STR_MON_PORT_RCV_PIF_B); break; case FIFO_CHANNEL_SP0_TO_IF2: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_SIF); /* SP_STR_MON_PORT_SP2SIF */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_SIF); /* SP_STR_MON_PORT_SP2SIF */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_SIF); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_SIF); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_SIF); /* MOD_STR_MON_PORT_SP2SIF */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_SIF); /* MOD_STR_MON_PORT_SP2SIF */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_SIF); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_SIF); break; case FIFO_CHANNEL_IF2_TO_SP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_SIF); /* MOD_STR_MON_PORT_SIF2SP */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_SIF); /* MOD_STR_MON_PORT_SIF2SP */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_SIF); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_SIF); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_SIF); /* SP_STR_MON_PORT_SIF2SP */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_SIF); /* SP_STR_MON_PORT_SIF2SP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_SIF); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_SIF); break; case FIFO_CHANNEL_SP0_TO_DMA0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_DMA); /* SP_STR_MON_PORT_SP2DMA */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_DMA); /* SP_STR_MON_PORT_SP2DMA */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_DMA); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_DMA); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_SP); /* MOD_STR_MON_PORT_SP2DMA */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_SP); /* MOD_STR_MON_PORT_SP2DMA */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_DMA_FR_SP); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_DMA_FR_SP); break; case FIFO_CHANNEL_DMA0_TO_SP0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2SP); /* MOD_STR_MON_PORT_DMA2SP */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2SP); /* MOD_STR_MON_PORT_DMA2SP */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_DMA2SP); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_DMA2SP); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_DMA); /* SP_STR_MON_PORT_DMA2SP */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_DMA); /* SP_STR_MON_PORT_DMA2SP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_DMA); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_DMA); break; case FIFO_CHANNEL_SP0_TO_GDC0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC1); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC1); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC1); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC1); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC1); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC1); state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC1); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC1); break; case FIFO_CHANNEL_GDC0_TO_SP0: state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC12CELLS); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC12CELLS); state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC12CELLS); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC12CELLS); state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC12SP); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC12SP); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC12SP); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC12SP); break; case FIFO_CHANNEL_SP0_TO_GDC1: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC2); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC2); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_SP2GDC2); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_SP2GDC2); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_CELLS2GDC2); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_CELLS2GDC2); break; case FIFO_CHANNEL_GDC1_TO_SP0: state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_GDC22CELLS); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_GDC22CELLS); state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC22SP); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC22SP); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, - SP_STR_MON_PORT_B_GDC22SP); + HIVE_GP_REGS_SP_STREAM_STAT_B_IDX, + SP_STR_MON_PORT_B_GDC22SP); break; case FIFO_CHANNEL_SP0_TO_HOST0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_GPD); /* SP_STR_MON_PORT_SP2GPD */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_GPD); /* SP_STR_MON_PORT_SP2GPD */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_GPD); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_GPD); { - hrt_data value = ia_css_device_load_uint32(0x0000000000380010ULL); + hrt_data value = ia_css_device_load_uint32(0x0000000000380010ULL); - state->fifo_valid = !_hrt_get_bit(value, 0); - state->sink_accept = false; /* no monitor connected */ + state->fifo_valid = !_hrt_get_bit(value, 0); + state->sink_accept = false; /* no monitor connected */ } break; - case FIFO_CHANNEL_HOST0_TO_SP0: - { + case FIFO_CHANNEL_HOST0_TO_SP0: { hrt_data value = ia_css_device_load_uint32(0x0000000000380018ULL); state->fifo_valid = false; /* no monitor connected */ state->sink_accept = !_hrt_get_bit(value, 0); - } - state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_GPD); /* SP_STR_MON_PORT_FA2SP */ - state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_GPD); - break; + } + state->src_valid = fifo_monitor_status_valid(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_GPD); /* SP_STR_MON_PORT_FA2SP */ + state->fifo_accept = fifo_monitor_status_accept(ID, + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_GPD); + break; case FIFO_CHANNEL_SP0_TO_STREAM2MEM0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_SP2MC */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_SP2MC */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SND_MC); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SND_MC); state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_SP2MC */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_SP2MC */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_RCV_MC); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_RCV_MC); break; case FIFO_CHANNEL_STREAM2MEM0_TO_SP0: state->fifo_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_MC2SP */ + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_MC); /* SP_STR_MON_PORT_MC2SP */ state->sink_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_MOD_STREAM_STAT_IDX, - MOD_STR_MON_PORT_SND_MC); + HIVE_GP_REGS_MOD_STREAM_STAT_IDX, + MOD_STR_MON_PORT_SND_MC); state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_MC2SP */ + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_MC); /* MOD_STR_MON_PORT_MC2SP */ state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_RCV_MC); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_RCV_MC); break; case FIFO_CHANNEL_SP0_TO_INPUT_SYSTEM0: state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SP2ISYS); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SP2ISYS); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_SP2ISYS); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_SP2ISYS); state->fifo_valid = false; state->sink_accept = false; break; @@ -491,11 +490,11 @@ void fifo_channel_get_state( state->fifo_valid = false; state->sink_accept = false; state->src_valid = fifo_monitor_status_valid(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_ISYS2SP); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_ISYS2SP); state->fifo_accept = fifo_monitor_status_accept(ID, - HIVE_GP_REGS_SP_STREAM_STAT_IDX, - SP_STR_MON_PORT_ISYS2SP); + HIVE_GP_REGS_SP_STREAM_STAT_IDX, + SP_STR_MON_PORT_ISYS2SP); break; default: assert(0); @@ -506,9 +505,9 @@ void fifo_channel_get_state( } void fifo_switch_get_state( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id, - fifo_switch_state_t *state) + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + fifo_switch_state_t *state) { hrt_data data = (hrt_data)-1; @@ -528,8 +527,8 @@ void fifo_switch_get_state( } void fifo_monitor_get_state( - const fifo_monitor_ID_t ID, - fifo_monitor_state_t *state) + const fifo_monitor_ID_t ID, + fifo_monitor_state_t *state) { fifo_channel_t ch_id; fifo_switch_t sw_id; @@ -539,20 +538,20 @@ void fifo_monitor_get_state( for (ch_id = 0; ch_id < N_FIFO_CHANNEL; ch_id++) { fifo_channel_get_state(ID, ch_id, - &state->fifo_channels[ch_id]); + &state->fifo_channels[ch_id]); } for (sw_id = 0; sw_id < N_FIFO_SWITCH; sw_id++) { fifo_switch_get_state(ID, sw_id, - &state->fifo_switches[sw_id]); + &state->fifo_switches[sw_id]); } return; } static inline bool fifo_monitor_status_valid( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id) + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id) { hrt_data data = fifo_monitor_reg_load(ID, reg); @@ -560,9 +559,9 @@ static inline bool fifo_monitor_status_valid( } static inline bool fifo_monitor_status_accept( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const unsigned int port_id) + const fifo_monitor_ID_t ID, + const unsigned int reg, + const unsigned int port_id) { hrt_data data = fifo_monitor_reg_load(ID, reg); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h index ed2f861817886..a557ff8a416f7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h @@ -68,12 +68,12 @@ typedef enum fifo_channel { FIFO_CHANNEL_STREAM2MEM0_TO_SP0, FIFO_CHANNEL_SP0_TO_INPUT_SYSTEM0, FIFO_CHANNEL_INPUT_SYSTEM0_TO_SP0, -/* - * No clue what this is - * - FIFO_CHANNEL_SP0_TO_IRQ0, - FIFO_CHANNEL_IRQ0_TO_SP0, - */ + /* + * No clue what this is + * + FIFO_CHANNEL_SP0_TO_IRQ0, + FIFO_CHANNEL_IRQ0_TO_SP0, + */ N_FIFO_CHANNEL } fifo_channel_t; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h index a85da30e476ef..abaef8672ae2f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h @@ -29,9 +29,9 @@ extern const unsigned int FIFO_SWITCH_ADDR[N_FIFO_SWITCH]; #endif STORAGE_CLASS_FIFO_MONITOR_C void fifo_switch_set( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id, - const hrt_data sel) + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + const hrt_data sel) { assert(ID == FIFO_MONITOR0_ID); assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); @@ -44,8 +44,8 @@ STORAGE_CLASS_FIFO_MONITOR_C void fifo_switch_set( } STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_switch_get( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id) + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id) { assert(ID == FIFO_MONITOR0_ID); assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); @@ -56,23 +56,25 @@ STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_switch_get( } STORAGE_CLASS_FIFO_MONITOR_C void fifo_monitor_reg_store( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const hrt_data value) + const fifo_monitor_ID_t ID, + const unsigned int reg, + const hrt_data value) { assert(ID < N_FIFO_MONITOR_ID); assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); - ia_css_device_store_uint32(FIFO_MONITOR_BASE[ID] + reg * sizeof(hrt_data), value); + ia_css_device_store_uint32(FIFO_MONITOR_BASE[ID] + reg * sizeof(hrt_data), + value); return; } STORAGE_CLASS_FIFO_MONITOR_C hrt_data fifo_monitor_reg_load( - const fifo_monitor_ID_t ID, - const unsigned int reg) + const fifo_monitor_ID_t ID, + const unsigned int reg) { assert(ID < N_FIFO_MONITOR_ID); assert(FIFO_MONITOR_BASE[ID] != (hrt_address) - 1); - return ia_css_device_load_uint32(FIFO_MONITOR_BASE[ID] + reg * sizeof(hrt_data)); + return ia_css_device_load_uint32(FIFO_MONITOR_BASE[ID] + reg * sizeof( + hrt_data)); } #endif /* __FIFO_MONITOR_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c index 83df4ac25c4ef..65c5296163ddb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c @@ -23,13 +23,13 @@ * Local function declarations */ static inline void gdc_reg_store( - const gdc_ID_t ID, - const unsigned int reg, - const hrt_data value); + const gdc_ID_t ID, + const unsigned int reg, + const hrt_data value); static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg); + const gdc_ID_t ID, + const unsigned int reg); #ifndef __INLINE_GDC__ #include "gdc_private.h" @@ -39,8 +39,8 @@ static inline hrt_data gdc_reg_load( * Exported function implementations */ void gdc_lut_store( - const gdc_ID_t ID, - const int data[4][HRT_GDC_N]) + const gdc_ID_t ID, + const int data[4][HRT_GDC_N]) { unsigned int i, lut_offset = HRT_GDC_LUT_IDX; @@ -54,9 +54,9 @@ void gdc_lut_store( hrt_data entry_3 = data[3][i] & HRT_GDC_BCI_COEF_MASK; hrt_data word_0 = entry_0 | - (entry_1 << HRT_GDC_LUT_COEFF_OFFSET); + (entry_1 << HRT_GDC_LUT_COEFF_OFFSET); hrt_data word_1 = entry_2 | - (entry_3 << HRT_GDC_LUT_COEFF_OFFSET); + (entry_3 << HRT_GDC_LUT_COEFF_OFFSET); gdc_reg_store(ID, lut_offset++, word_0); gdc_reg_store(ID, lut_offset++, word_1); @@ -83,7 +83,7 @@ void gdc_lut_store( * */ void gdc_lut_convert_to_isp_format(const int in_lut[4][HRT_GDC_N], - int out_lut[4][HRT_GDC_N]) + int out_lut[4][HRT_GDC_N]) { unsigned int i; int *out = (int *)out_lut; @@ -98,7 +98,7 @@ void gdc_lut_convert_to_isp_format(const int in_lut[4][HRT_GDC_N], } int gdc_get_unity( - const gdc_ID_t ID) + const gdc_ID_t ID) { assert(ID < N_GDC_ID); (void)ID; @@ -109,17 +109,17 @@ int gdc_get_unity( * Local function implementations */ static inline void gdc_reg_store( - const gdc_ID_t ID, - const unsigned int reg, - const hrt_data value) + const gdc_ID_t ID, + const unsigned int reg, + const hrt_data value) { ia_css_device_store_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data), value); return; } static inline hrt_data gdc_reg_load( - const gdc_ID_t ID, - const unsigned int reg) + const gdc_ID_t ID, + const unsigned int reg) { return ia_css_device_load_uint32(GDC_BASE[ID] + reg * sizeof(hrt_data)); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c index 118839b348320..5f20ac0b492ed 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c @@ -20,89 +20,89 @@ #endif /* __INLINE_GP_DEVICE__ */ void gp_device_get_state( - const gp_device_ID_t ID, - gp_device_state_t *state) + const gp_device_ID_t ID, + gp_device_state_t *state) { assert(ID < N_GP_DEVICE_ID); assert(state); state->syncgen_enable = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_ENABLE_ADDR); + _REG_GP_SYNCGEN_ENABLE_ADDR); state->syncgen_free_running = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_FREE_RUNNING_ADDR); + _REG_GP_SYNCGEN_FREE_RUNNING_ADDR); state->syncgen_pause = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_PAUSE_ADDR); + _REG_GP_SYNCGEN_PAUSE_ADDR); state->nr_frames = gp_device_reg_load(ID, - _REG_GP_NR_FRAMES_ADDR); + _REG_GP_NR_FRAMES_ADDR); state->syngen_nr_pix = gp_device_reg_load(ID, - _REG_GP_SYNGEN_NR_PIX_ADDR); + _REG_GP_SYNGEN_NR_PIX_ADDR); state->syngen_nr_pix = gp_device_reg_load(ID, - _REG_GP_SYNGEN_NR_PIX_ADDR); + _REG_GP_SYNGEN_NR_PIX_ADDR); state->syngen_nr_lines = gp_device_reg_load(ID, - _REG_GP_SYNGEN_NR_LINES_ADDR); + _REG_GP_SYNGEN_NR_LINES_ADDR); state->syngen_hblank_cycles = gp_device_reg_load(ID, - _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR); + _REG_GP_SYNGEN_HBLANK_CYCLES_ADDR); state->syngen_vblank_cycles = gp_device_reg_load(ID, - _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR); + _REG_GP_SYNGEN_VBLANK_CYCLES_ADDR); state->isel_sof = gp_device_reg_load(ID, - _REG_GP_ISEL_SOF_ADDR); + _REG_GP_ISEL_SOF_ADDR); state->isel_eof = gp_device_reg_load(ID, - _REG_GP_ISEL_EOF_ADDR); + _REG_GP_ISEL_EOF_ADDR); state->isel_sol = gp_device_reg_load(ID, - _REG_GP_ISEL_SOL_ADDR); + _REG_GP_ISEL_SOL_ADDR); state->isel_eol = gp_device_reg_load(ID, - _REG_GP_ISEL_EOL_ADDR); + _REG_GP_ISEL_EOL_ADDR); state->isel_lfsr_enable = gp_device_reg_load(ID, - _REG_GP_ISEL_LFSR_ENABLE_ADDR); + _REG_GP_ISEL_LFSR_ENABLE_ADDR); state->isel_lfsr_enable_b = gp_device_reg_load(ID, - _REG_GP_ISEL_LFSR_ENABLE_B_ADDR); + _REG_GP_ISEL_LFSR_ENABLE_B_ADDR); state->isel_lfsr_reset_value = gp_device_reg_load(ID, - _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR); + _REG_GP_ISEL_LFSR_RESET_VALUE_ADDR); state->isel_tpg_enable = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_ENABLE_ADDR); + _REG_GP_ISEL_TPG_ENABLE_ADDR); state->isel_tpg_enable_b = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_ENABLE_B_ADDR); + _REG_GP_ISEL_TPG_ENABLE_B_ADDR); state->isel_hor_cnt_mask = gp_device_reg_load(ID, - _REG_GP_ISEL_HOR_CNT_MASK_ADDR); + _REG_GP_ISEL_HOR_CNT_MASK_ADDR); state->isel_ver_cnt_mask = gp_device_reg_load(ID, - _REG_GP_ISEL_VER_CNT_MASK_ADDR); + _REG_GP_ISEL_VER_CNT_MASK_ADDR); state->isel_xy_cnt_mask = gp_device_reg_load(ID, - _REG_GP_ISEL_XY_CNT_MASK_ADDR); + _REG_GP_ISEL_XY_CNT_MASK_ADDR); state->isel_hor_cnt_delta = gp_device_reg_load(ID, - _REG_GP_ISEL_HOR_CNT_DELTA_ADDR); + _REG_GP_ISEL_HOR_CNT_DELTA_ADDR); state->isel_ver_cnt_delta = gp_device_reg_load(ID, - _REG_GP_ISEL_VER_CNT_DELTA_ADDR); + _REG_GP_ISEL_VER_CNT_DELTA_ADDR); state->isel_tpg_mode = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_MODE_ADDR); + _REG_GP_ISEL_TPG_MODE_ADDR); state->isel_tpg_red1 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_RED1_ADDR); + _REG_GP_ISEL_TPG_RED1_ADDR); state->isel_tpg_green1 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_GREEN1_ADDR); + _REG_GP_ISEL_TPG_GREEN1_ADDR); state->isel_tpg_blue1 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_BLUE1_ADDR); + _REG_GP_ISEL_TPG_BLUE1_ADDR); state->isel_tpg_red2 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_RED2_ADDR); + _REG_GP_ISEL_TPG_RED2_ADDR); state->isel_tpg_green2 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_GREEN2_ADDR); + _REG_GP_ISEL_TPG_GREEN2_ADDR); state->isel_tpg_blue2 = gp_device_reg_load(ID, - _REG_GP_ISEL_TPG_BLUE2_ADDR); + _REG_GP_ISEL_TPG_BLUE2_ADDR); state->isel_ch_id = gp_device_reg_load(ID, - _REG_GP_ISEL_CH_ID_ADDR); + _REG_GP_ISEL_CH_ID_ADDR); state->isel_fmt_type = gp_device_reg_load(ID, - _REG_GP_ISEL_FMT_TYPE_ADDR); + _REG_GP_ISEL_FMT_TYPE_ADDR); state->isel_data_sel = gp_device_reg_load(ID, - _REG_GP_ISEL_DATA_SEL_ADDR); + _REG_GP_ISEL_DATA_SEL_ADDR); state->isel_sband_sel = gp_device_reg_load(ID, - _REG_GP_ISEL_SBAND_SEL_ADDR); + _REG_GP_ISEL_SBAND_SEL_ADDR); state->isel_sync_sel = gp_device_reg_load(ID, - _REG_GP_ISEL_SYNC_SEL_ADDR); + _REG_GP_ISEL_SYNC_SEL_ADDR); state->syncgen_hor_cnt = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_HOR_CNT_ADDR); + _REG_GP_SYNCGEN_HOR_CNT_ADDR); state->syncgen_ver_cnt = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_VER_CNT_ADDR); + _REG_GP_SYNCGEN_VER_CNT_ADDR); state->syncgen_frame_cnt = gp_device_reg_load(ID, - _REG_GP_SYNCGEN_FRAME_CNT_ADDR); + _REG_GP_SYNCGEN_FRAME_CNT_ADDR); state->soft_reset = gp_device_reg_load(ID, - _REG_GP_SOFT_RESET_ADDR); + _REG_GP_SOFT_RESET_ADDR); return; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h index 0a5b15ec35106..cdc1b12a9e8ab 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h @@ -22,9 +22,9 @@ #include "assert_support.h" STORAGE_CLASS_GP_DEVICE_C void gp_device_reg_store( - const gp_device_ID_t ID, - const unsigned int reg_addr, - const hrt_data value) + const gp_device_ID_t ID, + const unsigned int reg_addr, + const hrt_data value) { assert(ID < N_GP_DEVICE_ID); assert(GP_DEVICE_BASE[ID] != (hrt_address) - 1); @@ -34,8 +34,8 @@ STORAGE_CLASS_GP_DEVICE_C void gp_device_reg_store( } STORAGE_CLASS_GP_DEVICE_C hrt_data gp_device_reg_load( - const gp_device_ID_t ID, - const hrt_address reg_addr) + const gp_device_ID_t ID, + const hrt_address reg_addr) { assert(ID < N_GP_DEVICE_ID); assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c index 2e205b168c17d..4a856f1f14bfe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c @@ -33,8 +33,8 @@ static uint32_t gp_timer_reg_load(uint32_t reg) { return ia_css_device_load_uint32( - GP_TIMER_BASE + - (reg * sizeof(uint32_t))); + GP_TIMER_BASE + + (reg * sizeof(uint32_t))); } static void @@ -42,7 +42,7 @@ gp_timer_reg_store(u32 reg, uint32_t value) { ia_css_device_store_uint32((GP_TIMER_BASE + (reg * sizeof(uint32_t))), - value); + value); } void gp_timer_init(gp_timer_ID_t ID) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h index f01d5833d1249..56b442040ad9c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h @@ -22,22 +22,22 @@ #include "assert_support.h" STORAGE_CLASS_GPIO_C void gpio_reg_store( - const gpio_ID_t ID, - const unsigned int reg, - const hrt_data value) + const gpio_ID_t ID, + const unsigned int reg, + const hrt_data value) { -OP___assert(ID < N_GPIO_ID); -OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); + OP___assert(ID < N_GPIO_ID); + OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); ia_css_device_store_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data), value); return; } STORAGE_CLASS_GPIO_C hrt_data gpio_reg_load( - const gpio_ID_t ID, - const unsigned int reg) + const gpio_ID_t ID, + const unsigned int reg) { -OP___assert(ID < N_GPIO_ID); -OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); + OP___assert(ID < N_GPIO_ID); + OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); return ia_css_device_load_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data)); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h index a4ffa5a8fed35..270d04cc9d095 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h @@ -20,7 +20,7 @@ #include "assert_support.h" STORAGE_CLASS_HMEM_C size_t sizeof_hmem( - const hmem_ID_t ID) + const hmem_ID_t ID) { assert(ID < N_HMEM_ID); (void)ID; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c index 8efbc3afff731..0c90c5ed659ba 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c @@ -30,19 +30,22 @@ const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID] = { INPUT_FORMATTER0_SRST_OFFSET, INPUT_FORMATTER1_SRST_OFFSET, INPUT_FORMATTER2_SRST_OFFSET, - INPUT_FORMATTER3_SRST_OFFSET}; + INPUT_FORMATTER3_SRST_OFFSET +}; const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID] = { INPUT_FORMATTER0_SRST_MASK, INPUT_FORMATTER1_SRST_MASK, INPUT_FORMATTER2_SRST_MASK, - INPUT_FORMATTER3_SRST_MASK}; + INPUT_FORMATTER3_SRST_MASK +}; const u8 HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID] = { HIVE_INPUT_SWITCH_SELECT_IF_PRIM, HIVE_INPUT_SWITCH_SELECT_IF_PRIM, HIVE_INPUT_SWITCH_SELECT_IF_SEC, - HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM}; + HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM +}; /* MW Should be part of system_global.h, where we have the main enumeration */ static const bool HIVE_IF_BIN_COPY[N_INPUT_FORMATTER_ID] = { @@ -50,7 +53,7 @@ static const bool HIVE_IF_BIN_COPY[N_INPUT_FORMATTER_ID] = { }; void input_formatter_rst( - const input_formatter_ID_t ID) + const input_formatter_ID_t ID) { hrt_address addr; hrt_data rst; @@ -72,7 +75,7 @@ void input_formatter_rst( } unsigned int input_formatter_get_alignment( - const input_formatter_ID_t ID) + const input_formatter_ID_t ID) { assert(ID < N_INPUT_FORMATTER_ID); @@ -80,22 +83,22 @@ unsigned int input_formatter_get_alignment( } void input_formatter_set_fifo_blocking_mode( - const input_formatter_ID_t ID, - const bool enable) + const input_formatter_ID_t ID, + const bool enable) { assert(ID < N_INPUT_FORMATTER_ID); /* cnd_input_formatter_reg_store() */ if (!HIVE_IF_BIN_COPY[ID]) { input_formatter_reg_store(ID, - HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS, enable); + HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS, enable); } return; } void input_formatter_get_switch_state( - const input_formatter_ID_t ID, - input_formatter_switch_state_t *state) + const input_formatter_ID_t ID, + input_formatter_switch_state_t *state) { assert(ID < N_INPUT_FORMATTER_ID); assert(state); @@ -103,126 +106,136 @@ void input_formatter_get_switch_state( /* We'll change this into an intelligent function to get switch info per IF */ (void)ID; - state->if_input_switch_lut_reg[0] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg0); - state->if_input_switch_lut_reg[1] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg1); - state->if_input_switch_lut_reg[2] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg2); - state->if_input_switch_lut_reg[3] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg3); - state->if_input_switch_lut_reg[4] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg4); - state->if_input_switch_lut_reg[5] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg5); - state->if_input_switch_lut_reg[6] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg6); - state->if_input_switch_lut_reg[7] = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_lut_reg7); - state->if_input_switch_fsync_lut = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_fsync_lut); - state->if_input_switch_ch_id_fmt_type = gp_device_reg_load(GP_DEVICE0_ID, _REG_GP_IFMT_input_switch_ch_id_fmt_type); + state->if_input_switch_lut_reg[0] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg0); + state->if_input_switch_lut_reg[1] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg1); + state->if_input_switch_lut_reg[2] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg2); + state->if_input_switch_lut_reg[3] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg3); + state->if_input_switch_lut_reg[4] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg4); + state->if_input_switch_lut_reg[5] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg5); + state->if_input_switch_lut_reg[6] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg6); + state->if_input_switch_lut_reg[7] = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_lut_reg7); + state->if_input_switch_fsync_lut = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_fsync_lut); + state->if_input_switch_ch_id_fmt_type = gp_device_reg_load(GP_DEVICE0_ID, + _REG_GP_IFMT_input_switch_ch_id_fmt_type); return; } void input_formatter_get_state( - const input_formatter_ID_t ID, - input_formatter_state_t *state) + const input_formatter_ID_t ID, + input_formatter_state_t *state) { assert(ID < N_INPUT_FORMATTER_ID); assert(state); -/* - state->reset = input_formatter_reg_load(ID, - HIVE_IF_RESET_ADDRESS); - */ + /* + state->reset = input_formatter_reg_load(ID, + HIVE_IF_RESET_ADDRESS); + */ state->start_line = input_formatter_reg_load(ID, - HIVE_IF_START_LINE_ADDRESS); + HIVE_IF_START_LINE_ADDRESS); state->start_column = input_formatter_reg_load(ID, - HIVE_IF_START_COLUMN_ADDRESS); + HIVE_IF_START_COLUMN_ADDRESS); state->cropped_height = input_formatter_reg_load(ID, - HIVE_IF_CROPPED_HEIGHT_ADDRESS); + HIVE_IF_CROPPED_HEIGHT_ADDRESS); state->cropped_width = input_formatter_reg_load(ID, - HIVE_IF_CROPPED_WIDTH_ADDRESS); + HIVE_IF_CROPPED_WIDTH_ADDRESS); state->ver_decimation = input_formatter_reg_load(ID, - HIVE_IF_VERTICAL_DECIMATION_ADDRESS); + HIVE_IF_VERTICAL_DECIMATION_ADDRESS); state->hor_decimation = input_formatter_reg_load(ID, - HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS); + HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS); state->hor_deinterleaving = input_formatter_reg_load(ID, - HIVE_IF_H_DEINTERLEAVING_ADDRESS); + HIVE_IF_H_DEINTERLEAVING_ADDRESS); state->left_padding = input_formatter_reg_load(ID, - HIVE_IF_LEFTPADDING_WIDTH_ADDRESS); + HIVE_IF_LEFTPADDING_WIDTH_ADDRESS); state->eol_offset = input_formatter_reg_load(ID, - HIVE_IF_END_OF_LINE_OFFSET_ADDRESS); + HIVE_IF_END_OF_LINE_OFFSET_ADDRESS); state->vmem_start_address = input_formatter_reg_load(ID, - HIVE_IF_VMEM_START_ADDRESS_ADDRESS); + HIVE_IF_VMEM_START_ADDRESS_ADDRESS); state->vmem_end_address = input_formatter_reg_load(ID, - HIVE_IF_VMEM_END_ADDRESS_ADDRESS); + HIVE_IF_VMEM_END_ADDRESS_ADDRESS); state->vmem_increment = input_formatter_reg_load(ID, - HIVE_IF_VMEM_INCREMENT_ADDRESS); + HIVE_IF_VMEM_INCREMENT_ADDRESS); state->is_yuv420 = input_formatter_reg_load(ID, - HIVE_IF_YUV_420_FORMAT_ADDRESS); + HIVE_IF_YUV_420_FORMAT_ADDRESS); state->vsync_active_low = input_formatter_reg_load(ID, - HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS); + HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS); state->hsync_active_low = input_formatter_reg_load(ID, - HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS); + HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS); state->allow_fifo_overflow = input_formatter_reg_load(ID, - HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS); + HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS); state->block_fifo_when_no_req = input_formatter_reg_load(ID, - HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS); + HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS); state->ver_deinterleaving = input_formatter_reg_load(ID, - HIVE_IF_V_DEINTERLEAVING_ADDRESS); -/* FSM */ + HIVE_IF_V_DEINTERLEAVING_ADDRESS); + /* FSM */ state->fsm_sync_status = input_formatter_reg_load(ID, - HIVE_IF_FSM_SYNC_STATUS); + HIVE_IF_FSM_SYNC_STATUS); state->fsm_sync_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_SYNC_COUNTER); + HIVE_IF_FSM_SYNC_COUNTER); state->fsm_crop_status = input_formatter_reg_load(ID, - HIVE_IF_FSM_CROP_STATUS); + HIVE_IF_FSM_CROP_STATUS); state->fsm_crop_line_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_CROP_LINE_COUNTER); + HIVE_IF_FSM_CROP_LINE_COUNTER); state->fsm_crop_pixel_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_CROP_PIXEL_COUNTER); + HIVE_IF_FSM_CROP_PIXEL_COUNTER); state->fsm_deinterleaving_index = input_formatter_reg_load(ID, - HIVE_IF_FSM_DEINTERLEAVING_IDX); + HIVE_IF_FSM_DEINTERLEAVING_IDX); state->fsm_dec_h_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_DECIMATION_H_COUNTER); + HIVE_IF_FSM_DECIMATION_H_COUNTER); state->fsm_dec_v_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_DECIMATION_V_COUNTER); + HIVE_IF_FSM_DECIMATION_V_COUNTER); state->fsm_dec_block_v_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER); + HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER); state->fsm_padding_status = input_formatter_reg_load(ID, - HIVE_IF_FSM_PADDING_STATUS); + HIVE_IF_FSM_PADDING_STATUS); state->fsm_padding_elem_counter = input_formatter_reg_load(ID, - HIVE_IF_FSM_PADDING_ELEMENT_COUNTER); + HIVE_IF_FSM_PADDING_ELEMENT_COUNTER); state->fsm_vector_support_error = input_formatter_reg_load(ID, - HIVE_IF_FSM_VECTOR_SUPPORT_ERROR); + HIVE_IF_FSM_VECTOR_SUPPORT_ERROR); state->fsm_vector_buffer_full = input_formatter_reg_load(ID, - HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL); + HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL); state->vector_support = input_formatter_reg_load(ID, - HIVE_IF_FSM_VECTOR_SUPPORT); + HIVE_IF_FSM_VECTOR_SUPPORT); state->sensor_data_lost = input_formatter_reg_load(ID, - HIVE_IF_FIFO_SENSOR_STATUS); + HIVE_IF_FIFO_SENSOR_STATUS); return; } void input_formatter_bin_get_state( - const input_formatter_ID_t ID, - input_formatter_bin_state_t *state) + const input_formatter_ID_t ID, + input_formatter_bin_state_t *state) { assert(ID < N_INPUT_FORMATTER_ID); assert(state); state->reset = input_formatter_reg_load(ID, - HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS); + HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS); state->input_endianness = input_formatter_reg_load(ID, - HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS); + HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS); state->output_endianness = input_formatter_reg_load(ID, - HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS); + HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS); state->bitswap = input_formatter_reg_load(ID, - HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS); + HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS); state->block_synch = input_formatter_reg_load(ID, - HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS); + HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS); state->packet_synch = input_formatter_reg_load(ID, - HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS); + HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS); state->readpostwrite_synch = input_formatter_reg_load(ID, - HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS); + HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS); state->is_2ppc = input_formatter_reg_load(ID, - HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS); + HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS); state->en_status_update = input_formatter_reg_load(ID, - HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS); + HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS); return; } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h index 0fc9f759c44e0..ee2c8372421cb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h @@ -66,7 +66,7 @@ struct input_formatter_switch_state_s { }; struct input_formatter_state_s { -/* int reset; */ + /* int reset; */ int start_line; int start_column; int cropped_height; @@ -115,6 +115,7 @@ struct input_formatter_bin_state_s { }; static const unsigned int input_formatter_alignment[N_INPUT_FORMATTER_ID] = { - ISP_VEC_ALIGN, ISP_VEC_ALIGN, HIVE_ISP_CTRL_DATA_BYTES}; + ISP_VEC_ALIGN, ISP_VEC_ALIGN, HIVE_ISP_CTRL_DATA_BYTES +}; #endif /* __INPUT_FORMATTER_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h index 2f42a9c2771ce..bdca709219a4d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h @@ -22,9 +22,9 @@ #include "assert_support.h" STORAGE_CLASS_INPUT_FORMATTER_C void input_formatter_reg_store( - const input_formatter_ID_t ID, - const hrt_address reg_addr, - const hrt_data value) + const input_formatter_ID_t ID, + const hrt_address reg_addr, + const hrt_data value) { assert(ID < N_INPUT_FORMATTER_ID); assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); @@ -34,8 +34,8 @@ STORAGE_CLASS_INPUT_FORMATTER_C void input_formatter_reg_store( } STORAGE_CLASS_INPUT_FORMATTER_C hrt_data input_formatter_reg_load( - const input_formatter_ID_t ID, - const unsigned int reg_addr) + const input_formatter_ID_t ID, + const unsigned int reg_addr) { assert(ID < N_INPUT_FORMATTER_ID); assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c index 9202cfedd94fd..2114cf4f3fdab 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c @@ -32,10 +32,10 @@ static const ib_buffer_t IB_BUFFER_NULL = {0, 0, 0 }; static input_system_error_t input_system_configure_channel( - const channel_cfg_t channel); + const channel_cfg_t channel); static input_system_error_t input_system_configure_channel_sensor( - const channel_cfg_t channel); + const channel_cfg_t channel); static input_system_error_t input_buffer_configuration(void); @@ -45,64 +45,64 @@ static void receiver_rst(const rx_ID_t ID); static void input_system_network_rst(const input_system_ID_t ID); static void capture_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t * const cfg); + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t *const cfg); static void acquisition_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t * const cfg); + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t *const cfg); static void ctrl_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ctrl_unit_cfg_t * const cfg); + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ctrl_unit_cfg_t *const cfg); static void input_system_network_configure( - const input_system_ID_t ID, - const input_system_network_cfg_t * const cfg); + const input_system_ID_t ID, + const input_system_network_cfg_t *const cfg); // MW: CSI is previously named as "rx" short for "receiver" static input_system_error_t set_csi_cfg( - csi_cfg_t * const lhs, - const csi_cfg_t * const rhs, - input_system_config_flags_t * const flags); + csi_cfg_t *const lhs, + const csi_cfg_t *const rhs, + input_system_config_flags_t *const flags); static input_system_error_t set_source_type( - input_system_source_t * const lhs, - const input_system_source_t rhs, - input_system_config_flags_t * const flags); + input_system_source_t *const lhs, + const input_system_source_t rhs, + input_system_config_flags_t *const flags); static input_system_error_t input_system_multiplexer_cfg( - input_system_multiplex_t * const lhs, - const input_system_multiplex_t rhs, - input_system_config_flags_t * const flags); + input_system_multiplex_t *const lhs, + const input_system_multiplex_t rhs, + input_system_config_flags_t *const flags); static inline void capture_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - capture_unit_state_t *state); + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + capture_unit_state_t *state); static inline void acquisition_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - acquisition_unit_state_t *state); + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + acquisition_unit_state_t *state); static inline void ctrl_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - ctrl_unit_state_t *state); + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + ctrl_unit_state_t *state); static inline void mipi_port_get_state( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - mipi_port_state_t *state); + const rx_ID_t ID, + const enum mipi_port_id port_ID, + mipi_port_state_t *state); static inline void rx_channel_get_state( - const rx_ID_t ID, - const unsigned int ch_id, - rx_channel_state_t *state); + const rx_ID_t ID, + const unsigned int ch_id, + rx_channel_state_t *state); static void gp_device_rst(const gp_device_ID_t ID); @@ -111,13 +111,13 @@ static void input_selector_cfg_for_sensor(const gp_device_ID_t ID); static void input_switch_rst(const gp_device_ID_t ID); static void input_switch_cfg( - const gp_device_ID_t ID, - const input_switch_cfg_t * const cfg + const gp_device_ID_t ID, + const input_switch_cfg_t *const cfg ); void input_system_get_state( - const input_system_ID_t ID, - input_system_state_t *state) + const input_system_ID_t ID, + input_system_state_t *state) { sub_system_ID_t sub_id; @@ -125,58 +125,61 @@ void input_system_get_state( assert(state); state->str_multicastA_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX); state->str_multicastB_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_B_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_B_IDX); state->str_multicastC_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_C_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_C_IDX); state->str_mux_sel = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX); state->str_mon_status = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_STRMON_STAT_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_STRMON_STAT_IDX); state->str_mon_irq_cond = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_STRMON_COND_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_STRMON_COND_IDX); state->str_mon_irq_en = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX); state->isys_srst = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_SRST_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_SRST_IDX); state->isys_slv_reg_srst = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_SLV_REG_SRST_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_SLV_REG_SRST_IDX); state->str_deint_portA_cnt = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_REG_PORT_A_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_REG_PORT_A_IDX); state->str_deint_portB_cnt = input_system_sub_system_reg_load(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_REG_PORT_B_IDX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_REG_PORT_B_IDX); - for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { + for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; + sub_id++) { capture_unit_get_state(ID, sub_id, - &state->capture_unit[sub_id - CAPTURE_UNIT0_ID]); + &state->capture_unit[sub_id - CAPTURE_UNIT0_ID]); } - for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { + for (sub_id = ACQUISITION_UNIT0_ID; + sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { acquisition_unit_get_state(ID, sub_id, - &state->acquisition_unit[sub_id - ACQUISITION_UNIT0_ID]); + &state->acquisition_unit[sub_id - ACQUISITION_UNIT0_ID]); } - for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { + for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; + sub_id++) { ctrl_unit_get_state(ID, sub_id, - &state->ctrl_unit_state[sub_id - CTRL_UNIT0_ID]); + &state->ctrl_unit_state[sub_id - CTRL_UNIT0_ID]); } return; } void receiver_get_state( - const rx_ID_t ID, - receiver_state_t *state) + const rx_ID_t ID, + receiver_state_t *state) { enum mipi_port_id port_id; unsigned int ch_id; @@ -185,85 +188,85 @@ void receiver_get_state( assert(state); state->fs_to_ls_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_FS_TO_LS_DELAY_REG_IDX); + _HRT_CSS_RECEIVER_FS_TO_LS_DELAY_REG_IDX); state->ls_to_data_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_LS_TO_DATA_DELAY_REG_IDX); + _HRT_CSS_RECEIVER_LS_TO_DATA_DELAY_REG_IDX); state->data_to_le_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_DATA_TO_LE_DELAY_REG_IDX); + _HRT_CSS_RECEIVER_DATA_TO_LE_DELAY_REG_IDX); state->le_to_fe_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_LE_TO_FE_DELAY_REG_IDX); + _HRT_CSS_RECEIVER_LE_TO_FE_DELAY_REG_IDX); state->fe_to_fs_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_FE_TO_FS_DELAY_REG_IDX); + _HRT_CSS_RECEIVER_FE_TO_FS_DELAY_REG_IDX); state->le_to_fs_delay = (uint8_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_LE_TO_LS_DELAY_REG_IDX); + _HRT_CSS_RECEIVER_LE_TO_LS_DELAY_REG_IDX); state->is_two_ppc = (bool)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX); + _HRT_CSS_RECEIVER_TWO_PIXEL_EN_REG_IDX); state->backend_rst = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BACKEND_RST_REG_IDX); + _HRT_CSS_RECEIVER_BACKEND_RST_REG_IDX); state->raw18 = (uint16_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_RAW18_REG_IDX); + _HRT_CSS_RECEIVER_RAW18_REG_IDX); state->force_raw8 = (bool)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_FORCE_RAW8_REG_IDX); + _HRT_CSS_RECEIVER_FORCE_RAW8_REG_IDX); state->raw16 = (uint16_t)receiver_reg_load(ID, - _HRT_CSS_RECEIVER_RAW16_REG_IDX); + _HRT_CSS_RECEIVER_RAW16_REG_IDX); for (port_id = (enum mipi_port_id)0; port_id < N_MIPI_PORT_ID; port_id++) { mipi_port_get_state(ID, port_id, - &state->mipi_port_state[port_id]); + &state->mipi_port_state[port_id]); } for (ch_id = 0U; ch_id < N_RX_CHANNEL_ID; ch_id++) { rx_channel_get_state(ID, ch_id, - &state->rx_channel_state[ch_id]); + &state->rx_channel_state[ch_id]); } state->be_gsp_acc_ovl = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_GSP_ACC_OVL_REG_IDX); + _HRT_CSS_RECEIVER_BE_GSP_ACC_OVL_REG_IDX); state->be_srst = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_SRST_REG_IDX); + _HRT_CSS_RECEIVER_BE_SRST_REG_IDX); state->be_is_two_ppc = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX); + _HRT_CSS_RECEIVER_BE_TWO_PPC_REG_IDX); state->be_comp_format0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG0_IDX); + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG0_IDX); state->be_comp_format1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG1_IDX); + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG1_IDX); state->be_comp_format2 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG2_IDX); + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG2_IDX); state->be_comp_format3 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG3_IDX); + _HRT_CSS_RECEIVER_BE_COMP_FORMAT_REG3_IDX); state->be_sel = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_SEL_REG_IDX); + _HRT_CSS_RECEIVER_BE_SEL_REG_IDX); state->be_raw16_config = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_RAW16_CONFIG_REG_IDX); + _HRT_CSS_RECEIVER_BE_RAW16_CONFIG_REG_IDX); state->be_raw18_config = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_RAW18_CONFIG_REG_IDX); + _HRT_CSS_RECEIVER_BE_RAW18_CONFIG_REG_IDX); state->be_force_raw8 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_FORCE_RAW8_REG_IDX); + _HRT_CSS_RECEIVER_BE_FORCE_RAW8_REG_IDX); state->be_irq_status = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_IRQ_STATUS_REG_IDX); + _HRT_CSS_RECEIVER_BE_IRQ_STATUS_REG_IDX); state->be_irq_clear = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_BE_IRQ_CLEAR_REG_IDX); + _HRT_CSS_RECEIVER_BE_IRQ_CLEAR_REG_IDX); return; } bool is_mipi_format_yuv420( - const mipi_format_t mipi_format) + const mipi_format_t mipi_format) { bool is_yuv420 = ( - (mipi_format == MIPI_FORMAT_YUV420_8) || - (mipi_format == MIPI_FORMAT_YUV420_10) || - (mipi_format == MIPI_FORMAT_YUV420_8_SHIFT) || - (mipi_format == MIPI_FORMAT_YUV420_10_SHIFT)); -/* MIPI_FORMAT_YUV420_8_LEGACY is not YUV420 */ + (mipi_format == MIPI_FORMAT_YUV420_8) || + (mipi_format == MIPI_FORMAT_YUV420_10) || + (mipi_format == MIPI_FORMAT_YUV420_8_SHIFT) || + (mipi_format == MIPI_FORMAT_YUV420_10_SHIFT)); + /* MIPI_FORMAT_YUV420_8_LEGACY is not YUV420 */ return is_yuv420; } void receiver_set_compression( - const rx_ID_t ID, - const unsigned int cfg_ID, - const mipi_compressor_t comp, - const mipi_predictor_t pred) + const rx_ID_t ID, + const unsigned int cfg_ID, + const mipi_compressor_t comp, + const mipi_predictor_t pred) { const unsigned int field_id = cfg_ID % N_MIPI_FORMAT_CUSTOM; const unsigned int ch_id = cfg_ID / N_MIPI_FORMAT_CUSTOM; @@ -281,13 +284,21 @@ void receiver_set_compression( val = (((uint8_t)pred) << 3) | comp; switch (ch_id) { - case 0: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); + case 0: + addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX : + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); break; - case 1: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); + case 1: + addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX : + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); break; - case 2: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); + case 2: + addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX : + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); break; - case 3: addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX : _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); + case 3: + addr = ((field_id < 6) ? _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX : + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); break; default: /* should not happen */ @@ -295,19 +306,20 @@ void receiver_set_compression( return; } - reg = ((field_id < 6) ? (val << (field_id * 5)) : (val << ((field_id - 6) * 5))); + reg = ((field_id < 6) ? (val << (field_id * 5)) : (val << (( + field_id - 6) * 5))); receiver_reg_store(ID, addr, reg); return; } void receiver_port_enable( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const bool cnd) + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const bool cnd) { hrt_data reg = receiver_port_reg_load(ID, port_ID, - _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); + _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); if (cnd) { reg |= 0x01; @@ -316,246 +328,246 @@ void receiver_port_enable( } receiver_port_reg_store(ID, port_ID, - _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, reg); + _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX, reg); return; } bool is_receiver_port_enabled( - const rx_ID_t ID, - const enum mipi_port_id port_ID) + const rx_ID_t ID, + const enum mipi_port_id port_ID) { hrt_data reg = receiver_port_reg_load(ID, port_ID, - _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); + _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); return ((reg & 0x01) != 0); } void receiver_irq_enable( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const rx_irq_info_t irq_info) + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info) { receiver_port_reg_store(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, irq_info); + port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, irq_info); return; } rx_irq_info_t receiver_get_irq_info( - const rx_ID_t ID, - const enum mipi_port_id port_ID) + const rx_ID_t ID, + const enum mipi_port_id port_ID) { return receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); } void receiver_irq_clear( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const rx_irq_info_t irq_info) + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info) { receiver_port_reg_store(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX, irq_info); + port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX, irq_info); return; } static inline void capture_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - capture_unit_state_t *state) + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + capture_unit_state_t *state) { assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); assert(state); state->StartMode = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_START_MODE_REG_ID); + sub_id, + CAPT_START_MODE_REG_ID); state->Start_Addr = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_START_ADDR_REG_ID); + sub_id, + CAPT_START_ADDR_REG_ID); state->Mem_Region_Size = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_MEM_REGION_SIZE_REG_ID); + sub_id, + CAPT_MEM_REGION_SIZE_REG_ID); state->Num_Mem_Regions = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_NUM_MEM_REGIONS_REG_ID); + sub_id, + CAPT_NUM_MEM_REGIONS_REG_ID); // AM: Illegal read from following registers. -/* state->Init = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_INIT_REG_ID); - state->Start = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_START_REG_ID); - state->Stop = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_STOP_REG_ID); -*/ + /* state->Init = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_INIT_REG_ID); + state->Start = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_START_REG_ID); + state->Stop = input_system_sub_system_reg_load(ID, + sub_id, + CAPT_STOP_REG_ID); + */ state->Packet_Length = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_PACKET_LENGTH_REG_ID); + sub_id, + CAPT_PACKET_LENGTH_REG_ID); state->Received_Length = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_RECEIVED_LENGTH_REG_ID); + sub_id, + CAPT_RECEIVED_LENGTH_REG_ID); state->Received_Short_Packets = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_RECEIVED_SHORT_PACKETS_REG_ID); + sub_id, + CAPT_RECEIVED_SHORT_PACKETS_REG_ID); state->Received_Long_Packets = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_RECEIVED_LONG_PACKETS_REG_ID); + sub_id, + CAPT_RECEIVED_LONG_PACKETS_REG_ID); state->Last_Command = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_LAST_COMMAND_REG_ID); + sub_id, + CAPT_LAST_COMMAND_REG_ID); state->Next_Command = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_NEXT_COMMAND_REG_ID); + sub_id, + CAPT_NEXT_COMMAND_REG_ID); state->Last_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_LAST_ACKNOWLEDGE_REG_ID); + sub_id, + CAPT_LAST_ACKNOWLEDGE_REG_ID); state->Next_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_NEXT_ACKNOWLEDGE_REG_ID); + sub_id, + CAPT_NEXT_ACKNOWLEDGE_REG_ID); state->FSM_State_Info = input_system_sub_system_reg_load(ID, - sub_id, - CAPT_FSM_STATE_INFO_REG_ID); + sub_id, + CAPT_FSM_STATE_INFO_REG_ID); return; } static inline void acquisition_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - acquisition_unit_state_t *state) + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + acquisition_unit_state_t *state) { assert(sub_id == ACQUISITION_UNIT0_ID); assert(state); state->Start_Addr = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_START_ADDR_REG_ID); + sub_id, + ACQ_START_ADDR_REG_ID); state->Mem_Region_Size = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_MEM_REGION_SIZE_REG_ID); + sub_id, + ACQ_MEM_REGION_SIZE_REG_ID); state->Num_Mem_Regions = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_NUM_MEM_REGIONS_REG_ID); + sub_id, + ACQ_NUM_MEM_REGIONS_REG_ID); // AM: Illegal read from following registers. -/* state->Init = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_INIT_REG_ID); -*/ + /* state->Init = input_system_sub_system_reg_load(ID, + sub_id, + ACQ_INIT_REG_ID); + */ state->Received_Short_Packets = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_RECEIVED_SHORT_PACKETS_REG_ID); + sub_id, + ACQ_RECEIVED_SHORT_PACKETS_REG_ID); state->Received_Long_Packets = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_RECEIVED_LONG_PACKETS_REG_ID); + sub_id, + ACQ_RECEIVED_LONG_PACKETS_REG_ID); state->Last_Command = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_LAST_COMMAND_REG_ID); + sub_id, + ACQ_LAST_COMMAND_REG_ID); state->Next_Command = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_NEXT_COMMAND_REG_ID); + sub_id, + ACQ_NEXT_COMMAND_REG_ID); state->Last_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_LAST_ACKNOWLEDGE_REG_ID); + sub_id, + ACQ_LAST_ACKNOWLEDGE_REG_ID); state->Next_Acknowledge = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_NEXT_ACKNOWLEDGE_REG_ID); + sub_id, + ACQ_NEXT_ACKNOWLEDGE_REG_ID); state->FSM_State_Info = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_FSM_STATE_INFO_REG_ID); + sub_id, + ACQ_FSM_STATE_INFO_REG_ID); state->Int_Cntr_Info = input_system_sub_system_reg_load(ID, - sub_id, - ACQ_INT_CNTR_INFO_REG_ID); + sub_id, + ACQ_INT_CNTR_INFO_REG_ID); return; } static inline void ctrl_unit_get_state( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - ctrl_unit_state_t *state) + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + ctrl_unit_state_t *state) { assert(sub_id == CTRL_UNIT0_ID); assert(state); state->captA_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_A_REG_ID); + sub_id, + ISYS_CTRL_CAPT_START_ADDR_A_REG_ID); state->captB_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_B_REG_ID); + sub_id, + ISYS_CTRL_CAPT_START_ADDR_B_REG_ID); state->captC_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_C_REG_ID); + sub_id, + ISYS_CTRL_CAPT_START_ADDR_C_REG_ID); state->captA_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID); + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID); state->captB_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID); + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID); state->captC_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID); + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID); state->captA_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID); + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID); state->captB_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID); + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID); state->captC_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID); + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID); state->acq_start_addr = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_START_ADDR_REG_ID); + sub_id, + ISYS_CTRL_ACQ_START_ADDR_REG_ID); state->acq_mem_region_size = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID); + sub_id, + ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID); state->acq_num_mem_regions = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID); + sub_id, + ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID); // AM: Illegal read from following registers. -/* state->ctrl_init = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_INIT_REG_ID); -*/ + /* state->ctrl_init = input_system_sub_system_reg_load(ID, + sub_id, + ISYS_CTRL_INIT_REG_ID); + */ state->last_cmd = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_LAST_COMMAND_REG_ID); + sub_id, + ISYS_CTRL_LAST_COMMAND_REG_ID); state->next_cmd = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_NEXT_COMMAND_REG_ID); + sub_id, + ISYS_CTRL_NEXT_COMMAND_REG_ID); state->last_ack = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID); + sub_id, + ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID); state->next_ack = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID); + sub_id, + ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID); state->top_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_FSM_STATE_INFO_REG_ID); + sub_id, + ISYS_CTRL_FSM_STATE_INFO_REG_ID); state->captA_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID); + sub_id, + ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID); state->captB_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID); + sub_id, + ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID); state->captC_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID); + sub_id, + ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID); state->acq_fsm_state = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID); + sub_id, + ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID); state->capt_reserve_one_mem_region = input_system_sub_system_reg_load(ID, - sub_id, - ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID); + sub_id, + ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID); return; } static inline void mipi_port_get_state( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - mipi_port_state_t *state) + const rx_ID_t ID, + const enum mipi_port_id port_ID, + mipi_port_state_t *state) { int i; @@ -564,21 +576,21 @@ static inline void mipi_port_get_state( assert(state); state->device_ready = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_DEVICE_READY_REG_IDX); state->irq_status = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_IRQ_STATUS_REG_IDX); state->irq_enable = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); state->timeout_count = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_TIMEOUT_COUNT_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_TIMEOUT_COUNT_REG_IDX); state->init_count = (uint16_t)receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_INIT_COUNT_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_INIT_COUNT_REG_IDX); state->raw16_18 = (uint16_t)receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_RAW16_18_DATAID_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_RAW16_18_DATAID_REG_IDX); state->sync_count = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_SYNC_COUNT_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_SYNC_COUNT_REG_IDX); state->rx_count = receiver_port_reg_load(ID, - port_ID, _HRT_CSS_RECEIVER_RX_COUNT_REG_IDX); + port_ID, _HRT_CSS_RECEIVER_RX_COUNT_REG_IDX); for (i = 0; i < MIPI_4LANE_CFG ; i++) { state->lane_sync_count[i] = (uint8_t)((state->sync_count) >> (i * 8)); @@ -589,9 +601,9 @@ static inline void mipi_port_get_state( } static inline void rx_channel_get_state( - const rx_ID_t ID, - const unsigned int ch_id, - rx_channel_state_t *state) + const rx_ID_t ID, + const unsigned int ch_id, + rx_channel_state_t *state) { int i; @@ -602,31 +614,31 @@ static inline void rx_channel_get_state( switch (ch_id) { case 0: state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX); state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX); break; case 1: state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX); state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX); break; case 2: state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX); state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX); break; case 3: state->comp_scheme0 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX); state->comp_scheme1 = receiver_reg_load(ID, - _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); + _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX); break; } -/* See Table 7.1.17,..., 7.1.24 */ + /* See Table 7.1.17,..., 7.1.24 */ for (i = 0; i < 6; i++) { u8 val = (uint8_t)((state->comp_scheme0) >> (i * 5)) & 0x1f; @@ -647,7 +659,7 @@ static inline void rx_channel_get_state( static input_system_cfg2400_t config; static void receiver_rst( - const rx_ID_t ID) + const rx_ID_t ID) { enum mipi_port_id port_id; @@ -707,7 +719,8 @@ static void gp_device_rst(const gp_device_ID_t ID) // gp_device_reg_store(ID, _REG_GP_SYNCGEN_HOR_CNT_ADDR, ZERO); // gp_device_reg_store(ID, _REG_GP_SYNCGEN_VER_CNT_ADDR, ZERO); // gp_device_reg_store(ID, _REG_GP_SYNCGEN_FRAME_CNT_ADDR, ZERO); - gp_device_reg_store(ID, _REG_GP_SOFT_RESET_ADDR, ZERO); // AM: Maybe this soft reset is not safe. + gp_device_reg_store(ID, _REG_GP_SOFT_RESET_ADDR, + ZERO); // AM: Maybe this soft reset is not safe. return; } @@ -738,21 +751,21 @@ static void input_switch_rst(const gp_device_ID_t ID) // Initialize the data&hsync LUT. for (addr = _REG_GP_IFMT_input_switch_lut_reg0; - addr <= _REG_GP_IFMT_input_switch_lut_reg7; addr += SIZEOF_HRT_REG) { + addr <= _REG_GP_IFMT_input_switch_lut_reg7; addr += SIZEOF_HRT_REG) { gp_device_reg_store(ID, addr, ZERO); } // Initialize the vsync LUT. gp_device_reg_store(ID, - _REG_GP_IFMT_input_switch_fsync_lut, - ZERO); + _REG_GP_IFMT_input_switch_fsync_lut, + ZERO); return; } static void input_switch_cfg( - const gp_device_ID_t ID, - const input_switch_cfg_t * const cfg) + const gp_device_ID_t ID, + const input_switch_cfg_t *const cfg) { int addr_offset; @@ -761,16 +774,17 @@ static void input_switch_cfg( // Initialize the data&hsync LUT. for (addr_offset = 0; addr_offset < N_RX_CHANNEL_ID * 2; addr_offset++) { - assert(addr_offset * SIZEOF_HRT_REG + _REG_GP_IFMT_input_switch_lut_reg0 <= _REG_GP_IFMT_input_switch_lut_reg7); + assert(addr_offset * SIZEOF_HRT_REG + _REG_GP_IFMT_input_switch_lut_reg0 <= + _REG_GP_IFMT_input_switch_lut_reg7); gp_device_reg_store(ID, - _REG_GP_IFMT_input_switch_lut_reg0 + addr_offset * SIZEOF_HRT_REG, - cfg->hsync_data_reg[addr_offset]); + _REG_GP_IFMT_input_switch_lut_reg0 + addr_offset * SIZEOF_HRT_REG, + cfg->hsync_data_reg[addr_offset]); } // Initialize the vsync LUT. gp_device_reg_store(ID, - _REG_GP_IFMT_input_switch_fsync_lut, - cfg->vsync_data_reg); + _REG_GP_IFMT_input_switch_fsync_lut, + cfg->vsync_data_reg); return; } @@ -781,49 +795,52 @@ static void input_system_network_rst(const input_system_ID_t ID) // Reset all 3 multicasts. input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX, - INPUT_SYSTEM_DISCARD_ALL); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX, + INPUT_SYSTEM_DISCARD_ALL); input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_B_IDX, - INPUT_SYSTEM_DISCARD_ALL); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_B_IDX, + INPUT_SYSTEM_DISCARD_ALL); input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_C_IDX, - INPUT_SYSTEM_DISCARD_ALL); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_C_IDX, + INPUT_SYSTEM_DISCARD_ALL); // Reset stream mux. input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX, - N_INPUT_SYSTEM_MULTIPLEX); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + N_INPUT_SYSTEM_MULTIPLEX); // Reset 3 capture units. - for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { + for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; + sub_id++) { input_system_sub_system_reg_store(ID, - sub_id, - CAPT_INIT_REG_ID, - 1U << CAPT_INIT_RST_REG_BIT); + sub_id, + CAPT_INIT_REG_ID, + 1U << CAPT_INIT_RST_REG_BIT); } // Reset acquisition unit. - for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { + for (sub_id = ACQUISITION_UNIT0_ID; + sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { input_system_sub_system_reg_store(ID, - sub_id, - ACQ_INIT_REG_ID, - 1U << ACQ_INIT_RST_REG_BIT); + sub_id, + ACQ_INIT_REG_ID, + 1U << ACQ_INIT_RST_REG_BIT); } // DMA unit reset is not needed. // Reset controller units. // NB: In future we need to keep part of ctrl_state for split capture and - for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { + for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; + sub_id++) { input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_INIT_REG_ID, - 1U); //AM: Is there any named constant? + sub_id, + ISYS_CTRL_INIT_REG_ID, + 1U); //AM: Is there any named constant? } return; @@ -873,7 +890,7 @@ input_system_error_t input_system_configuration_reset(void) // MW: Comments are good, but doxygen is required, place it at the declaration // Function that appends the channel to current configuration. static input_system_error_t input_system_configure_channel( - const channel_cfg_t channel) + const channel_cfg_t channel) { input_system_error_t error = INPUT_SYSTEM_ERR_NO_ERROR; // Check if channel is not already configured. @@ -881,39 +898,48 @@ static input_system_error_t input_system_configure_channel( return INPUT_SYSTEM_ERR_CHANNEL_ALREADY_SET; } else { switch (channel.source_type) { - case INPUT_SYSTEM_SOURCE_SENSOR: - error = input_system_configure_channel_sensor(channel); - break; - case INPUT_SYSTEM_SOURCE_TPG: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_SOURCE_PRBS: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_SOURCE_FIFO: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - default: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; + case INPUT_SYSTEM_SOURCE_SENSOR: + error = input_system_configure_channel_sensor(channel); + break; + case INPUT_SYSTEM_SOURCE_TPG: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_SOURCE_PRBS: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_SOURCE_FIFO: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + default: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; } if (error != INPUT_SYSTEM_ERR_NO_ERROR) return error; // Input switch channel configurations must be combined in united config. - config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2] = - channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[0]; - config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2 + 1] = - channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[1]; + config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2] + = + channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[0]; + config.input_switch_cfg.hsync_data_reg[channel.source_cfg.csi_cfg.csi_port * 2 + + 1] = + channel.target_cfg.input_switch_channel_cfg.hsync_data_reg[1]; config.input_switch_cfg.vsync_data_reg |= - (channel.target_cfg.input_switch_channel_cfg.vsync_data_reg & 0x7) << (channel.source_cfg.csi_cfg.csi_port * 3); + (channel.target_cfg.input_switch_channel_cfg.vsync_data_reg & 0x7) << + (channel.source_cfg.csi_cfg.csi_port * 3); // Other targets are just copied and marked as set. - config.target_isp[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_isp_cfg; - config.target_sp[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_sp_cfg; - config.target_strm2mem[channel.source_cfg.csi_cfg.csi_port] = channel.target_cfg.target_strm2mem_cfg; - config.target_isp_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; - config.target_sp_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; - config.target_strm2mem_flags[channel.source_cfg.csi_cfg.csi_port] |= INPUT_SYSTEM_CFG_FLAG_SET; + config.target_isp[channel.source_cfg.csi_cfg.csi_port] = + channel.target_cfg.target_isp_cfg; + config.target_sp[channel.source_cfg.csi_cfg.csi_port] = + channel.target_cfg.target_sp_cfg; + config.target_strm2mem[channel.source_cfg.csi_cfg.csi_port] = + channel.target_cfg.target_strm2mem_cfg; + config.target_isp_flags[channel.source_cfg.csi_cfg.csi_port] |= + INPUT_SYSTEM_CFG_FLAG_SET; + config.target_sp_flags[channel.source_cfg.csi_cfg.csi_port] |= + INPUT_SYSTEM_CFG_FLAG_SET; + config.target_strm2mem_flags[channel.source_cfg.csi_cfg.csi_port] |= + INPUT_SYSTEM_CFG_FLAG_SET; config.ch_flags[channel.ch_id] = INPUT_SYSTEM_CFG_FLAG_SET; } @@ -937,73 +963,75 @@ static input_system_error_t input_buffer_configuration(void) if (config.csi_flags[port] & INPUT_SYSTEM_CFG_FLAG_SET) { // Check and set csi buffer in input buffer. switch (source.buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE: - case INPUT_SYSTEM_XMEM_ACQUIRE: - config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_BLOCKED; // Well, not used. - break; - - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: - case INPUT_SYSTEM_SRAM_BUFFERING: - case INPUT_SYSTEM_XMEM_BUFFERING: - case INPUT_SYSTEM_XMEM_CAPTURE: - size_requested = source.csi_buffer.mem_reg_size * source.csi_buffer.nof_mem_regs; - if (source.csi_buffer.mem_reg_size > 0 - && source.csi_buffer.nof_mem_regs > 0 - && size_requested <= unallocated_memory - ) { - config.csi_buffer[port].mem_reg_addr = current_address; - config.csi_buffer[port].mem_reg_size = source.csi_buffer.mem_reg_size; - config.csi_buffer[port].nof_mem_regs = source.csi_buffer.nof_mem_regs; - current_address += size_requested; - unallocated_memory -= size_requested; - config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_SET; - } else { - config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } - break; + case INPUT_SYSTEM_FIFO_CAPTURE: + case INPUT_SYSTEM_XMEM_ACQUIRE: + config.csi_buffer_flags[port] = + INPUT_SYSTEM_CFG_FLAG_BLOCKED; // Well, not used. + break; - default: + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: + case INPUT_SYSTEM_SRAM_BUFFERING: + case INPUT_SYSTEM_XMEM_BUFFERING: + case INPUT_SYSTEM_XMEM_CAPTURE: + size_requested = source.csi_buffer.mem_reg_size * + source.csi_buffer.nof_mem_regs; + if (source.csi_buffer.mem_reg_size > 0 + && source.csi_buffer.nof_mem_regs > 0 + && size_requested <= unallocated_memory + ) { + config.csi_buffer[port].mem_reg_addr = current_address; + config.csi_buffer[port].mem_reg_size = source.csi_buffer.mem_reg_size; + config.csi_buffer[port].nof_mem_regs = source.csi_buffer.nof_mem_regs; + current_address += size_requested; + unallocated_memory -= size_requested; + config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_SET; + } else { config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + break; + + default: + config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; } // Check acquisition buffer specified but set it later since it has to be unique. switch (source.buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE: - case INPUT_SYSTEM_SRAM_BUFFERING: - case INPUT_SYSTEM_XMEM_CAPTURE: - // Nothing to do. - break; + case INPUT_SYSTEM_FIFO_CAPTURE: + case INPUT_SYSTEM_SRAM_BUFFERING: + case INPUT_SYSTEM_XMEM_CAPTURE: + // Nothing to do. + break; - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: - case INPUT_SYSTEM_XMEM_BUFFERING: - case INPUT_SYSTEM_XMEM_ACQUIRE: - if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_RESET) { - size_requested = source.acquisition_buffer.mem_reg_size - * source.acquisition_buffer.nof_mem_regs; - if (source.acquisition_buffer.mem_reg_size > 0 - && source.acquisition_buffer.nof_mem_regs > 0 - && size_requested <= unallocated_memory - ) { - candidate_buffer_acq = source.acquisition_buffer; - acq_already_specified = INPUT_SYSTEM_CFG_FLAG_SET; - } - } else { - // Check if specified acquisition buffer is the same as specified before. - if (source.acquisition_buffer.mem_reg_size != candidate_buffer_acq.mem_reg_size - || source.acquisition_buffer.nof_mem_regs != candidate_buffer_acq.nof_mem_regs - ) { - config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; - return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; - } + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: + case INPUT_SYSTEM_XMEM_BUFFERING: + case INPUT_SYSTEM_XMEM_ACQUIRE: + if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_RESET) { + size_requested = source.acquisition_buffer.mem_reg_size + * source.acquisition_buffer.nof_mem_regs; + if (source.acquisition_buffer.mem_reg_size > 0 + && source.acquisition_buffer.nof_mem_regs > 0 + && size_requested <= unallocated_memory + ) { + candidate_buffer_acq = source.acquisition_buffer; + acq_already_specified = INPUT_SYSTEM_CFG_FLAG_SET; } - break; + } else { + // Check if specified acquisition buffer is the same as specified before. + if (source.acquisition_buffer.mem_reg_size != candidate_buffer_acq.mem_reg_size + || source.acquisition_buffer.nof_mem_regs != candidate_buffer_acq.nof_mem_regs + ) { + config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; + return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; + } + } + break; - default: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; + default: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; } } else { config.csi_buffer_flags[port] = INPUT_SYSTEM_CFG_FLAG_BLOCKED; @@ -1011,12 +1039,15 @@ static input_system_error_t input_buffer_configuration(void) } // end of for ( port ) // Set the acquisition buffer at the end. - size_requested = candidate_buffer_acq.mem_reg_size * candidate_buffer_acq.nof_mem_regs; + size_requested = candidate_buffer_acq.mem_reg_size * + candidate_buffer_acq.nof_mem_regs; if (acq_already_specified == INPUT_SYSTEM_CFG_FLAG_SET - && size_requested <= unallocated_memory) { + && size_requested <= unallocated_memory) { config.acquisition_buffer_unique.mem_reg_addr = current_address; - config.acquisition_buffer_unique.mem_reg_size = candidate_buffer_acq.mem_reg_size; - config.acquisition_buffer_unique.nof_mem_regs = candidate_buffer_acq.nof_mem_regs; + config.acquisition_buffer_unique.mem_reg_size = + candidate_buffer_acq.mem_reg_size; + config.acquisition_buffer_unique.nof_mem_regs = + candidate_buffer_acq.nof_mem_regs; current_address += size_requested; unallocated_memory -= size_requested; config.acquisition_buffer_unique_flags = INPUT_SYSTEM_CFG_FLAG_SET; @@ -1028,125 +1059,126 @@ static input_system_error_t input_buffer_configuration(void) } static void capture_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t * const cfg) + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t *const cfg) { assert(ID < N_INPUT_SYSTEM_ID); - assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= CAPTURE_UNIT2_ID)); // Commented part is always true. + assert(/*(sub_id >= CAPTURE_UNIT0_ID) &&*/ (sub_id <= + CAPTURE_UNIT2_ID)); // Commented part is always true. assert(cfg); input_system_sub_system_reg_store(ID, - sub_id, - CAPT_START_ADDR_REG_ID, - cfg->mem_reg_addr); + sub_id, + CAPT_START_ADDR_REG_ID, + cfg->mem_reg_addr); input_system_sub_system_reg_store(ID, - sub_id, - CAPT_MEM_REGION_SIZE_REG_ID, - cfg->mem_reg_size); + sub_id, + CAPT_MEM_REGION_SIZE_REG_ID, + cfg->mem_reg_size); input_system_sub_system_reg_store(ID, - sub_id, - CAPT_NUM_MEM_REGIONS_REG_ID, - cfg->nof_mem_regs); + sub_id, + CAPT_NUM_MEM_REGIONS_REG_ID, + cfg->nof_mem_regs); return; } static void acquisition_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ib_buffer_t * const cfg) + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ib_buffer_t *const cfg) { assert(ID < N_INPUT_SYSTEM_ID); assert(sub_id == ACQUISITION_UNIT0_ID); assert(cfg); input_system_sub_system_reg_store(ID, - sub_id, - ACQ_START_ADDR_REG_ID, - cfg->mem_reg_addr); + sub_id, + ACQ_START_ADDR_REG_ID, + cfg->mem_reg_addr); input_system_sub_system_reg_store(ID, - sub_id, - ACQ_NUM_MEM_REGIONS_REG_ID, - cfg->nof_mem_regs); + sub_id, + ACQ_NUM_MEM_REGIONS_REG_ID, + cfg->nof_mem_regs); input_system_sub_system_reg_store(ID, - sub_id, - ACQ_MEM_REGION_SIZE_REG_ID, - cfg->mem_reg_size); + sub_id, + ACQ_MEM_REGION_SIZE_REG_ID, + cfg->mem_reg_size); return; } static void ctrl_unit_configure( - const input_system_ID_t ID, - const sub_system_ID_t sub_id, - const ctrl_unit_cfg_t * const cfg) + const input_system_ID_t ID, + const sub_system_ID_t sub_id, + const ctrl_unit_cfg_t *const cfg) { assert(ID < N_INPUT_SYSTEM_ID); assert(sub_id == CTRL_UNIT0_ID); assert(cfg); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_A_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_addr); + sub_id, + ISYS_CTRL_CAPT_START_ADDR_A_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_addr); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_size); + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT0_ID].mem_reg_size); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT0_ID].nof_mem_regs); + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT0_ID].nof_mem_regs); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_B_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_addr); + sub_id, + ISYS_CTRL_CAPT_START_ADDR_B_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_addr); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_size); + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT1_ID].mem_reg_size); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT1_ID].nof_mem_regs); + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT1_ID].nof_mem_regs); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_START_ADDR_C_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_addr); + sub_id, + ISYS_CTRL_CAPT_START_ADDR_C_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_addr); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_size); + sub_id, + ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT2_ID].mem_reg_size); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID, - cfg->buffer_mipi[CAPTURE_UNIT2_ID].nof_mem_regs); + sub_id, + ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID, + cfg->buffer_mipi[CAPTURE_UNIT2_ID].nof_mem_regs); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_ACQ_START_ADDR_REG_ID, - cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_addr); + sub_id, + ISYS_CTRL_ACQ_START_ADDR_REG_ID, + cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_addr); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID, - cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_size); + sub_id, + ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID, + cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].mem_reg_size); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID, - cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].nof_mem_regs); + sub_id, + ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID, + cfg->buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID].nof_mem_regs); input_system_sub_system_reg_store(ID, - sub_id, - ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID, - 0); + sub_id, + ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID, + 0); return; } static void input_system_network_configure( - const input_system_ID_t ID, - const input_system_network_cfg_t * const cfg) + const input_system_ID_t ID, + const input_system_network_cfg_t *const cfg) { u32 sub_id; @@ -1155,45 +1187,49 @@ static void input_system_network_configure( // Set all 3 multicasts. input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX, - cfg->multicast_cfg[CAPTURE_UNIT0_ID]); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX, + cfg->multicast_cfg[CAPTURE_UNIT0_ID]); input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_B_IDX, - cfg->multicast_cfg[CAPTURE_UNIT1_ID]); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_B_IDX, + cfg->multicast_cfg[CAPTURE_UNIT1_ID]); input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_C_IDX, - cfg->multicast_cfg[CAPTURE_UNIT2_ID]); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_C_IDX, + cfg->multicast_cfg[CAPTURE_UNIT2_ID]); // Set stream mux. input_system_sub_system_reg_store(ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX, - cfg->mux_cfg); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + cfg->mux_cfg); // Set capture units. - for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; sub_id++) { + for (sub_id = CAPTURE_UNIT0_ID; sub_id < CAPTURE_UNIT0_ID + N_CAPTURE_UNIT_ID; + sub_id++) { capture_unit_configure(ID, - sub_id, - &cfg->ctrl_unit_cfg[ID].buffer_mipi[sub_id - CAPTURE_UNIT0_ID]); + sub_id, + &cfg->ctrl_unit_cfg[ID].buffer_mipi[sub_id - CAPTURE_UNIT0_ID]); } // Set acquisition units. - for (sub_id = ACQUISITION_UNIT0_ID; sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { + for (sub_id = ACQUISITION_UNIT0_ID; + sub_id < ACQUISITION_UNIT0_ID + N_ACQUISITION_UNIT_ID; sub_id++) { acquisition_unit_configure(ID, - sub_id, - &cfg->ctrl_unit_cfg[sub_id - ACQUISITION_UNIT0_ID].buffer_acquire[sub_id - ACQUISITION_UNIT0_ID]); + sub_id, + &cfg->ctrl_unit_cfg[sub_id - ACQUISITION_UNIT0_ID].buffer_acquire[sub_id - + ACQUISITION_UNIT0_ID]); } // No DMA configuration needed. Ctrl_unit will fully control it. // Set controller units. - for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; sub_id++) { + for (sub_id = CTRL_UNIT0_ID; sub_id < CTRL_UNIT0_ID + N_CTRL_UNIT_ID; + sub_id++) { ctrl_unit_configure(ID, - sub_id, - &cfg->ctrl_unit_cfg[sub_id - CTRL_UNIT0_ID]); + sub_id, + &cfg->ctrl_unit_cfg[sub_id - CTRL_UNIT0_ID]); } return; @@ -1207,74 +1243,82 @@ static input_system_error_t configuration_to_registers(void) assert(config.source_type_flags & INPUT_SYSTEM_CFG_FLAG_SET); switch (config.source_type) { - case INPUT_SYSTEM_SOURCE_SENSOR: + case INPUT_SYSTEM_SOURCE_SENSOR: + + // Determine stream multicasts setting based on the mode of csi_cfg_t. + // AM: This should be moved towards earlier function call, e.g. in + // the commit function. + for (i = MIPI_PORT0_ID; i < N_MIPI_PORT_ID; i++) { + if (config.csi_flags[i] & INPUT_SYSTEM_CFG_FLAG_SET) { + switch (config.csi_value[i].buffering_mode) { + case INPUT_SYSTEM_FIFO_CAPTURE: + config.multicast[i] = INPUT_SYSTEM_CSI_BACKEND; + break; - // Determine stream multicasts setting based on the mode of csi_cfg_t. - // AM: This should be moved towards earlier function call, e.g. in - // the commit function. - for (i = MIPI_PORT0_ID; i < N_MIPI_PORT_ID; i++) { - if (config.csi_flags[i] & INPUT_SYSTEM_CFG_FLAG_SET) { - switch (config.csi_value[i].buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE: - config.multicast[i] = INPUT_SYSTEM_CSI_BACKEND; - break; - - case INPUT_SYSTEM_XMEM_CAPTURE: - case INPUT_SYSTEM_SRAM_BUFFERING: - case INPUT_SYSTEM_XMEM_BUFFERING: - config.multicast[i] = INPUT_SYSTEM_INPUT_BUFFER; - break; - - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: - config.multicast[i] = INPUT_SYSTEM_MULTICAST; - break; - - case INPUT_SYSTEM_XMEM_ACQUIRE: - config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; - break; - - default: - config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - //break; - } - } else { + case INPUT_SYSTEM_XMEM_CAPTURE: + case INPUT_SYSTEM_SRAM_BUFFERING: + case INPUT_SYSTEM_XMEM_BUFFERING: + config.multicast[i] = INPUT_SYSTEM_INPUT_BUFFER; + break; + + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: + config.multicast[i] = INPUT_SYSTEM_MULTICAST; + break; + + case INPUT_SYSTEM_XMEM_ACQUIRE: config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; + break; + + default: + config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + //break; } + } else { + config.multicast[i] = INPUT_SYSTEM_DISCARD_ALL; + } - input_system_network_cfg.multicast_cfg[i] = config.multicast[i]; + input_system_network_cfg.multicast_cfg[i] = config.multicast[i]; - } // for + } // for - input_system_network_cfg.mux_cfg = config.multiplexer; + input_system_network_cfg.mux_cfg = config.multiplexer; - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT0_ID] = config.csi_buffer[MIPI_PORT0_ID]; - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT1_ID] = config.csi_buffer[MIPI_PORT1_ID]; - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT2_ID] = config.csi_buffer[MIPI_PORT2_ID]; - input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - CTRL_UNIT0_ID].buffer_acquire[ACQUISITION_UNIT0_ID - ACQUISITION_UNIT0_ID] = - config.acquisition_buffer_unique; + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - + CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT0_ID] = + config.csi_buffer[MIPI_PORT0_ID]; + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - + CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT1_ID] = + config.csi_buffer[MIPI_PORT1_ID]; + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - + CTRL_UNIT0_ID].buffer_mipi[CAPTURE_UNIT2_ID] = + config.csi_buffer[MIPI_PORT2_ID]; + input_system_network_cfg.ctrl_unit_cfg[CTRL_UNIT0_ID - + CTRL_UNIT0_ID].buffer_acquire[ACQUISITION_UNIT0_ID - + ACQUISITION_UNIT0_ID] = + config.acquisition_buffer_unique; - // First set input network around CSI receiver. - input_system_network_configure(INPUT_SYSTEM0_ID, &input_system_network_cfg); + // First set input network around CSI receiver. + input_system_network_configure(INPUT_SYSTEM0_ID, &input_system_network_cfg); - // Set the CSI receiver. - //... - break; + // Set the CSI receiver. + //... + break; - case INPUT_SYSTEM_SOURCE_TPG: + case INPUT_SYSTEM_SOURCE_TPG: - break; + break; - case INPUT_SYSTEM_SOURCE_PRBS: + case INPUT_SYSTEM_SOURCE_PRBS: - break; + break; - case INPUT_SYSTEM_SOURCE_FIFO: - break; + case INPUT_SYSTEM_SOURCE_FIFO: + break; - default: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; + default: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; } // end of switch (source_type) @@ -1313,10 +1357,10 @@ input_system_error_t input_system_configuration_commit(void) // FIFO input_system_error_t input_system_csi_fifo_channel_cfg( - u32 ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - target_cfg2400_t target + u32 ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + target_cfg2400_t target ) { channel_cfg_t channel; @@ -1336,13 +1380,13 @@ input_system_error_t input_system_csi_fifo_channel_cfg( } input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( - u32 ch_id, - u32 nof_frames, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 csi_mem_reg_size, - u32 csi_nof_mem_regs, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, + target_cfg2400_t target ) { channel_cfg_t channel; @@ -1352,7 +1396,8 @@ input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( channel.source_type = INPUT_SYSTEM_SOURCE_SENSOR; //channel.source channel.source_cfg.csi_cfg.csi_port = port; - channel.source_cfg.csi_cfg.buffering_mode = INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING; + channel.source_cfg.csi_cfg.buffering_mode = + INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_size = csi_mem_reg_size; channel.source_cfg.csi_cfg.csi_buffer.nof_mem_regs = csi_nof_mem_regs; channel.source_cfg.csi_cfg.csi_buffer.mem_reg_addr = 0; @@ -1366,14 +1411,14 @@ input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( // SRAM input_system_error_t input_system_csi_sram_channel_cfg( - u32 ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 csi_mem_reg_size, - u32 csi_nof_mem_regs, - // uint32_t acq_mem_reg_size, - // uint32_t acq_nof_mem_regs, - target_cfg2400_t target + u32 ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, + // uint32_t acq_mem_reg_size, + // uint32_t acq_nof_mem_regs, + target_cfg2400_t target ) { channel_cfg_t channel; @@ -1398,15 +1443,15 @@ input_system_error_t input_system_csi_sram_channel_cfg( // Collects all parameters and puts them in channel_cfg_t. input_system_error_t input_system_csi_xmem_channel_cfg( - u32 ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 csi_mem_reg_size, - u32 csi_nof_mem_regs, - u32 acq_mem_reg_size, - u32 acq_nof_mem_regs, - target_cfg2400_t target, - uint32_t nof_xmem_buffers + u32 ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, + u32 acq_mem_reg_size, + u32 acq_nof_mem_regs, + target_cfg2400_t target, + uint32_t nof_xmem_buffers ) { channel_cfg_t channel; @@ -1430,13 +1475,13 @@ input_system_error_t input_system_csi_xmem_channel_cfg( } input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( - u32 ch_id, - u32 nof_frames, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 acq_mem_reg_size, - u32 acq_nof_mem_regs, - target_cfg2400_t target) + u32 ch_id, + u32 nof_frames, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 acq_mem_reg_size, + u32 acq_nof_mem_regs, + target_cfg2400_t target) { channel_cfg_t channel; @@ -1457,14 +1502,14 @@ input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( } input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( - u32 ch_id, - u32 nof_frames, - input_system_csi_port_t port, - u32 csi_mem_reg_size, - u32 csi_nof_mem_regs, - u32 acq_mem_reg_size, - u32 acq_nof_mem_regs, - target_cfg2400_t target) + u32 ch_id, + u32 nof_frames, + input_system_csi_port_t port, + u32 csi_mem_reg_size, + u32 csi_nof_mem_regs, + u32 acq_mem_reg_size, + u32 acq_nof_mem_regs, + target_cfg2400_t target) { channel_cfg_t channel; @@ -1490,14 +1535,14 @@ input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( // Non - CSI input_system_error_t input_system_prbs_channel_cfg( - u32 ch_id, - u32 nof_frames,//not used yet - u32 seed, - u32 sync_gen_width, - u32 sync_gen_height, - u32 sync_gen_hblank_cycles, - u32 sync_gen_vblank_cycles, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames,//not used yet + u32 seed, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, + target_cfg2400_t target ) { channel_cfg_t channel; @@ -1519,18 +1564,18 @@ input_system_error_t input_system_prbs_channel_cfg( } input_system_error_t input_system_tpg_channel_cfg( - u32 ch_id, - u32 nof_frames,//not used yet - u32 x_mask, - u32 y_mask, - u32 x_delta, - u32 y_delta, - u32 xy_mask, - u32 sync_gen_width, - u32 sync_gen_height, - u32 sync_gen_hblank_cycles, - u32 sync_gen_vblank_cycles, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames,//not used yet + u32 x_mask, + u32 y_mask, + u32 x_delta, + u32 y_delta, + u32 xy_mask, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, + target_cfg2400_t target ) { channel_cfg_t channel; @@ -1556,10 +1601,10 @@ input_system_error_t input_system_tpg_channel_cfg( // MW: Don't use system specific names, (even in system specific files) "cfg2400" -> cfg input_system_error_t input_system_gpfifo_channel_cfg( - u32 ch_id, - u32 nof_frames, //not used yet + u32 ch_id, + u32 nof_frames, //not used yet - target_cfg2400_t target) + target_cfg2400_t target) { channel_cfg_t channel; @@ -1580,7 +1625,7 @@ input_system_error_t input_system_gpfifo_channel_cfg( // Fills the parameters to config.csi_value[port] static input_system_error_t input_system_configure_channel_sensor( - const channel_cfg_t channel) + const channel_cfg_t channel) { const u32 port = channel.source_cfg.csi_cfg.csi_port; input_system_error_t status = INPUT_SYSTEM_ERR_NO_ERROR; @@ -1592,78 +1637,83 @@ static input_system_error_t input_system_configure_channel_sensor( //check if port > N_INPUT_SYSTEM_MULTIPLEX - status = set_source_type(&config.source_type, channel.source_type, &config.source_type_flags); + status = set_source_type(&config.source_type, channel.source_type, + &config.source_type_flags); if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; // Check for conflicts on source (implicitly on multicast, capture unit and input buffer). - status = set_csi_cfg(&config.csi_value[port], &channel.source_cfg.csi_cfg, &config.csi_flags[port]); + status = set_csi_cfg(&config.csi_value[port], &channel.source_cfg.csi_cfg, + &config.csi_flags[port]); if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; switch (channel.source_cfg.csi_cfg.buffering_mode) { - case INPUT_SYSTEM_FIFO_CAPTURE: + case INPUT_SYSTEM_FIFO_CAPTURE: - // Check for conflicts on mux. - mux = INPUT_SYSTEM_MIPI_PORT0 + port; - status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - config.multicast[port] = INPUT_SYSTEM_CSI_BACKEND; + // Check for conflicts on mux. + mux = INPUT_SYSTEM_MIPI_PORT0 + port; + status = input_system_multiplexer_cfg(&config.multiplexer, mux, + &config.multiplexer_flags); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + config.multicast[port] = INPUT_SYSTEM_CSI_BACKEND; - // Shared resource, so it should be blocked. - //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + // Shared resource, so it should be blocked. + //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - break; - case INPUT_SYSTEM_SRAM_BUFFERING: + break; + case INPUT_SYSTEM_SRAM_BUFFERING: - // Check for conflicts on mux. - mux = INPUT_SYSTEM_ACQUISITION_UNIT; - status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; + // Check for conflicts on mux. + mux = INPUT_SYSTEM_ACQUISITION_UNIT; + status = input_system_multiplexer_cfg(&config.multiplexer, mux, + &config.multiplexer_flags); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; - // Shared resource, so it should be blocked. - //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + // Shared resource, so it should be blocked. + //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - break; - case INPUT_SYSTEM_XMEM_BUFFERING: + break; + case INPUT_SYSTEM_XMEM_BUFFERING: - // Check for conflicts on mux. - mux = INPUT_SYSTEM_ACQUISITION_UNIT; - status = input_system_multiplexer_cfg(&config.multiplexer, mux, &config.multiplexer_flags); - if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; - config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; + // Check for conflicts on mux. + mux = INPUT_SYSTEM_ACQUISITION_UNIT; + status = input_system_multiplexer_cfg(&config.multiplexer, mux, + &config.multiplexer_flags); + if (status != INPUT_SYSTEM_ERR_NO_ERROR) return status; + config.multicast[port] = INPUT_SYSTEM_INPUT_BUFFER; - // Shared resource, so it should be blocked. - //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + // Shared resource, so it should be blocked. + //config.mux_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.csi_buffer_flags[port] |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; + //config.acquisition_buffer_unique_flags |= INPUT_SYSTEM_CFG_FLAG_BLOCKED; - break; - case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_XMEM_CAPTURE: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - case INPUT_SYSTEM_XMEM_ACQUIRE: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; - default: - return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; - break; + break; + case INPUT_SYSTEM_FIFO_CAPTURE_WITH_COUNTING: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_XMEM_CAPTURE: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + case INPUT_SYSTEM_XMEM_ACQUIRE: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; + default: + return INPUT_SYSTEM_ERR_PARAMETER_NOT_SUPPORTED; + break; } return INPUT_SYSTEM_ERR_NO_ERROR; } // Test flags and set structure. static input_system_error_t set_source_type( - input_system_source_t * const lhs, - const input_system_source_t rhs, - input_system_config_flags_t * const flags) + input_system_source_t *const lhs, + const input_system_source_t rhs, + input_system_config_flags_t *const flags) { // MW: Not enough asserts assert(lhs); @@ -1697,9 +1747,9 @@ static input_system_error_t set_source_type( // Test flags and set structure. static input_system_error_t set_csi_cfg( - csi_cfg_t * const lhs, - const csi_cfg_t * const rhs, - input_system_config_flags_t * const flags) + csi_cfg_t *const lhs, + const csi_cfg_t *const rhs, + input_system_config_flags_t *const flags) { u32 memory_required; u32 acq_memory_required; @@ -1716,12 +1766,12 @@ static input_system_error_t set_csi_cfg( // check for consistency with already set value. if (/*lhs->backend_ch == rhs.backend_ch &&*/ lhs->buffering_mode == rhs->buffering_mode - && lhs->csi_buffer.mem_reg_size == rhs->csi_buffer.mem_reg_size - && lhs->csi_buffer.nof_mem_regs == rhs->csi_buffer.nof_mem_regs - && lhs->acquisition_buffer.mem_reg_size == rhs->acquisition_buffer.mem_reg_size - && lhs->acquisition_buffer.nof_mem_regs == rhs->acquisition_buffer.nof_mem_regs - && lhs->nof_xmem_buffers == rhs->nof_xmem_buffers - ) { + && lhs->csi_buffer.mem_reg_size == rhs->csi_buffer.mem_reg_size + && lhs->csi_buffer.nof_mem_regs == rhs->csi_buffer.nof_mem_regs + && lhs->acquisition_buffer.mem_reg_size == rhs->acquisition_buffer.mem_reg_size + && lhs->acquisition_buffer.nof_mem_regs == rhs->acquisition_buffer.nof_mem_regs + && lhs->nof_xmem_buffers == rhs->nof_xmem_buffers + ) { return INPUT_SYSTEM_ERR_NO_ERROR; } else { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; @@ -1732,13 +1782,14 @@ static input_system_error_t set_csi_cfg( // no check for backend_ch // no check for nof_xmem_buffers memory_required = rhs->csi_buffer.mem_reg_size * rhs->csi_buffer.nof_mem_regs; - acq_memory_required = rhs->acquisition_buffer.mem_reg_size * rhs->acquisition_buffer.nof_mem_regs; + acq_memory_required = rhs->acquisition_buffer.mem_reg_size * + rhs->acquisition_buffer.nof_mem_regs; if (rhs->buffering_mode >= N_INPUT_SYSTEM_BUFFERING_MODE - || - // Check if required memory is available in input buffer (SRAM). - (memory_required + acq_memory_required) > config.unallocated_ib_mem_words + || + // Check if required memory is available in input buffer (SRAM). + (memory_required + acq_memory_required) > config.unallocated_ib_mem_words - ) { + ) { *flags |= INPUT_SYSTEM_CFG_FLAG_CONFLICT; return INPUT_SYSTEM_ERR_CONFLICT_ON_RESOURCE; } @@ -1751,7 +1802,7 @@ static input_system_error_t set_csi_cfg( lhs->csi_buffer.nof_mem_regs = rhs->csi_buffer.nof_mem_regs; lhs->acquisition_buffer.mem_reg_size = rhs->acquisition_buffer.mem_reg_size; lhs->acquisition_buffer.nof_mem_regs = rhs->acquisition_buffer.nof_mem_regs; - // ALX: NB: Here we just set buffer parameters, but still not allocate it + // ALX: NB: Here we just set buffer parameters, but still not allocate it // (no addresses determined). That will be done during commit. // FIXIT: acq_memory_required is not deducted, since it can be allocated multiple times. @@ -1763,9 +1814,9 @@ static input_system_error_t set_csi_cfg( // Test flags and set structure. static input_system_error_t input_system_multiplexer_cfg( - input_system_multiplex_t * const lhs, - const input_system_multiplex_t rhs, - input_system_config_flags_t * const flags) + input_system_multiplex_t *const lhs, + const input_system_multiplex_t rhs, + input_system_config_flags_t *const flags) { assert(lhs); assert(flags); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h index 7813cf79fef14..3c0e2efb08ae5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h @@ -126,31 +126,42 @@ struct channel_cfg_s { // Complete configuration for input system. struct input_system_cfg2400_s { - input_system_source_t source_type; input_system_config_flags_t source_type_flags; + input_system_source_t source_type; + input_system_config_flags_t source_type_flags; //channel_cfg_t channel[N_CHANNELS]; input_system_config_flags_t ch_flags[N_CHANNELS]; // This is the place where the buffers' settings are collected, as given. - csi_cfg_t csi_value[N_CSI_PORTS]; input_system_config_flags_t csi_flags[N_CSI_PORTS]; + csi_cfg_t csi_value[N_CSI_PORTS]; + input_system_config_flags_t csi_flags[N_CSI_PORTS]; // Possible another struct for ib. // This buffers set at the end, based on the all configurations. - ib_buffer_t csi_buffer[N_CSI_PORTS]; input_system_config_flags_t csi_buffer_flags[N_CSI_PORTS]; - ib_buffer_t acquisition_buffer_unique; input_system_config_flags_t acquisition_buffer_unique_flags; + ib_buffer_t csi_buffer[N_CSI_PORTS]; + input_system_config_flags_t csi_buffer_flags[N_CSI_PORTS]; + ib_buffer_t acquisition_buffer_unique; + input_system_config_flags_t acquisition_buffer_unique_flags; u32 unallocated_ib_mem_words; // Used for check.DEFAULT = IB_CAPACITY_IN_WORDS. //uint32_t acq_allocated_ib_mem_words; input_system_connection_t multicast[N_CSI_PORTS]; - input_system_multiplex_t multiplexer; input_system_config_flags_t multiplexer_flags; + input_system_multiplex_t multiplexer; + input_system_config_flags_t multiplexer_flags; - tpg_cfg_t tpg_value; input_system_config_flags_t tpg_flags; - prbs_cfg_t prbs_value; input_system_config_flags_t prbs_flags; - gpfifo_cfg_t gpfifo_value; input_system_config_flags_t gpfifo_flags; + tpg_cfg_t tpg_value; + input_system_config_flags_t tpg_flags; + prbs_cfg_t prbs_value; + input_system_config_flags_t prbs_flags; + gpfifo_cfg_t gpfifo_value; + input_system_config_flags_t gpfifo_flags; input_switch_cfg_t input_switch_cfg; - target_isp_cfg_t target_isp[N_CHANNELS]; input_system_config_flags_t target_isp_flags[N_CHANNELS]; - target_sp_cfg_t target_sp[N_CHANNELS]; input_system_config_flags_t target_sp_flags[N_CHANNELS]; - target_strm2mem_cfg_t target_strm2mem[N_CHANNELS]; input_system_config_flags_t target_strm2mem_flags[N_CHANNELS]; + target_isp_cfg_t target_isp[N_CHANNELS]; + input_system_config_flags_t target_isp_flags[N_CHANNELS]; + target_sp_cfg_t target_sp[N_CHANNELS]; + input_system_config_flags_t target_sp_flags[N_CHANNELS]; + target_strm2mem_cfg_t target_strm2mem[N_CHANNELS]; + input_system_config_flags_t target_strm2mem_flags[N_CHANNELS]; input_system_config_flags_t session_flags; @@ -326,7 +337,7 @@ typedef enum { RX_IRQ_INFO_ERR_SOT_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT, RX_IRQ_INFO_ERR_CONTROL = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT, RX_IRQ_INFO_ERR_ECC_DOUBLE = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT, -/* RX_IRQ_INFO_NO_ERR = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT, */ + /* RX_IRQ_INFO_NO_ERR = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT, */ RX_IRQ_INFO_ERR_CRC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT, RX_IRQ_INFO_ERR_UNKNOWN_ID = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT, RX_IRQ_INFO_ERR_FRAME_SYNC = 1UL << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT, @@ -356,12 +367,14 @@ struct rx_cfg_s { static const hrt_address MIPI_PORT_OFFSET[N_MIPI_PORT_ID] = { 0x00000000UL, 0x00000100UL, - 0x00000200UL}; + 0x00000200UL +}; static const mipi_lane_cfg_t MIPI_PORT_MAXLANES[N_MIPI_PORT_ID] = { MIPI_4LANE_CFG, MIPI_1LANE_CFG, - MIPI_2LANE_CFG}; + MIPI_2LANE_CFG +}; static const bool MIPI_PORT_ACTIVE[N_RX_MODE][N_MIPI_PORT_ID] = { {true, true, false}, @@ -371,7 +384,8 @@ static const bool MIPI_PORT_ACTIVE[N_RX_MODE][N_MIPI_PORT_ID] = { {true, true, true}, {true, true, true}, {true, true, true}, - {true, true, true}}; + {true, true, true} +}; static const mipi_lane_cfg_t MIPI_PORT_LANES[N_RX_MODE][N_MIPI_PORT_ID] = { {MIPI_4LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG}, @@ -381,7 +395,8 @@ static const mipi_lane_cfg_t MIPI_PORT_LANES[N_RX_MODE][N_MIPI_PORT_ID] = { {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_2LANE_CFG}, {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}, {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}, - {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}}; + {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG} +}; static const hrt_address SUB_SYSTEM_OFFSET[N_SUB_SYSTEM_ID] = { 0x00001000UL, @@ -392,7 +407,8 @@ static const hrt_address SUB_SYSTEM_OFFSET[N_SUB_SYSTEM_ID] = { 0x00009000UL, 0x0000A000UL, 0x0000B000UL, - 0x0000C000UL}; + 0x0000C000UL +}; struct capture_unit_state_s { int Packet_Length; @@ -408,13 +424,13 @@ struct capture_unit_state_s { int Start_Addr; int Mem_Region_Size; int Num_Mem_Regions; -/* int Init; write-only registers - int Start; - int Stop; */ + /* int Init; write-only registers + int Start; + int Stop; */ }; struct acquisition_unit_state_s { -/* int Init; write-only register */ + /* int Init; write-only register */ int Received_Short_Packets; int Received_Long_Packets; int Last_Command; @@ -450,7 +466,7 @@ struct ctrl_unit_state_s { int acq_start_addr; int acq_mem_region_size; int acq_num_mem_regions; -/* int ctrl_init; write only register */ + /* int ctrl_init; write only register */ int capt_reserve_one_mem_region; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h index 288b94fdf4cae..0ce9cbc0063ea 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h @@ -22,29 +22,31 @@ #include "assert_support.h" STORAGE_CLASS_INPUT_SYSTEM_C void input_system_reg_store( - const input_system_ID_t ID, - const hrt_address reg, - const hrt_data value) + const input_system_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_INPUT_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data), value); + ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data), + value); return; } STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_reg_load( - const input_system_ID_t ID, - const hrt_address reg) + const input_system_ID_t ID, + const hrt_address reg) { assert(ID < N_INPUT_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data)); + return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof( + hrt_data)); } STORAGE_CLASS_INPUT_SYSTEM_C void receiver_reg_store( - const rx_ID_t ID, - const hrt_address reg, - const hrt_data value) + const rx_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_RX_ID); assert(RX_BASE[ID] != (hrt_address)-1); @@ -53,8 +55,8 @@ STORAGE_CLASS_INPUT_SYSTEM_C void receiver_reg_store( } STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_reg_load( - const rx_ID_t ID, - const hrt_address reg) + const rx_ID_t ID, + const hrt_address reg) { assert(ID < N_RX_ID); assert(RX_BASE[ID] != (hrt_address)-1); @@ -62,55 +64,59 @@ STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_reg_load( } STORAGE_CLASS_INPUT_SYSTEM_C void receiver_port_reg_store( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const hrt_address reg, - const hrt_data value) + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_RX_ID); assert(port_ID < N_MIPI_PORT_ID); assert(RX_BASE[ID] != (hrt_address)-1); assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); - ia_css_device_store_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg * sizeof(hrt_data), value); + ia_css_device_store_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg * + sizeof(hrt_data), value); return; } STORAGE_CLASS_INPUT_SYSTEM_C hrt_data receiver_port_reg_load( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const hrt_address reg) + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg) { assert(ID < N_RX_ID); assert(port_ID < N_MIPI_PORT_ID); assert(RX_BASE[ID] != (hrt_address)-1); assert(MIPI_PORT_OFFSET[port_ID] != (hrt_address)-1); - return ia_css_device_load_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg * sizeof(hrt_data)); + return ia_css_device_load_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg * + sizeof(hrt_data)); } STORAGE_CLASS_INPUT_SYSTEM_C void input_system_sub_system_reg_store( - const input_system_ID_t ID, - const sub_system_ID_t sub_ID, - const hrt_address reg, - const hrt_data value) + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_INPUT_SYSTEM_ID); assert(sub_ID < N_SUB_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); - ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg * sizeof(hrt_data), value); + ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + + reg * sizeof(hrt_data), value); return; } STORAGE_CLASS_INPUT_SYSTEM_C hrt_data input_system_sub_system_reg_load( - const input_system_ID_t ID, - const sub_system_ID_t sub_ID, - const hrt_address reg) + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg) { assert(ID < N_INPUT_SYSTEM_ID); assert(sub_ID < N_SUB_SYSTEM_ID); assert(INPUT_SYSTEM_BASE[ID] != (hrt_address)-1); assert(SUB_SYSTEM_OFFSET[sub_ID] != (hrt_address)-1); - return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + SUB_SYSTEM_OFFSET[sub_ID] + reg * sizeof(hrt_data)); + return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + + SUB_SYSTEM_OFFSET[sub_ID] + reg * sizeof(hrt_data)); } #endif /* __INPUT_SYSTEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c index 12efe29893f44..fdc99cc6eae4a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c @@ -23,14 +23,14 @@ #include "platform_support.h" /* hrt_sleep() */ static inline void irq_wait_for_write_complete( - const irq_ID_t ID); + const irq_ID_t ID); static inline bool any_irq_channel_enabled( - const irq_ID_t ID); + const irq_ID_t ID); static inline irq_ID_t virq_get_irq_id( - const virq_id_t irq_ID, - unsigned int *channel_ID); + const virq_id_t irq_ID, + unsigned int *channel_ID); #ifndef __INLINE_IRQ__ #include "irq_private.h" @@ -40,23 +40,26 @@ static unsigned short IRQ_N_CHANNEL[N_IRQ_ID] = { IRQ0_ID_N_CHANNEL, IRQ1_ID_N_CHANNEL, IRQ2_ID_N_CHANNEL, - IRQ3_ID_N_CHANNEL}; + IRQ3_ID_N_CHANNEL +}; static unsigned short IRQ_N_ID_OFFSET[N_IRQ_ID + 1] = { IRQ0_ID_OFFSET, IRQ1_ID_OFFSET, IRQ2_ID_OFFSET, IRQ3_ID_OFFSET, - IRQ_END_OFFSET}; + IRQ_END_OFFSET +}; static virq_id_t IRQ_NESTING_ID[N_IRQ_ID] = { N_virq_id, virq_ifmt, virq_isys, - virq_isel}; + virq_isel +}; void irq_clear_all( - const irq_ID_t ID) + const irq_ID_t ID) { hrt_data mask = 0xFFFFFFFF; @@ -68,7 +71,7 @@ void irq_clear_all( } irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, mask); + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, mask); return; } @@ -76,15 +79,15 @@ void irq_clear_all( * Do we want the user to be able to set the signalling method ? */ void irq_enable_channel( - const irq_ID_t ID, + const irq_ID_t ID, const unsigned int irq_id) { unsigned int mask = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX); + _HRT_IRQ_CONTROLLER_MASK_REG_IDX); unsigned int enable = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); unsigned int edge_in = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); + _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); unsigned int me = 1U << irq_id; assert(ID < N_IRQ_ID); @@ -94,23 +97,23 @@ void irq_enable_channel( enable |= me; edge_in |= me; /* rising edge */ -/* to avoid mishaps configuration must follow the following order */ + /* to avoid mishaps configuration must follow the following order */ -/* mask this interrupt */ + /* mask this interrupt */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask & ~me); -/* rising edge at input */ + _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask & ~me); + /* rising edge at input */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_EDGE_REG_IDX, edge_in); -/* enable interrupt to output */ + _HRT_IRQ_CONTROLLER_EDGE_REG_IDX, edge_in); + /* enable interrupt to output */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); -/* clear current irq only */ + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); + /* clear current irq only */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); -/* unmask interrupt from input */ + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); + /* unmask interrupt from input */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); + _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); irq_wait_for_write_complete(ID); @@ -118,8 +121,8 @@ void irq_enable_channel( } void irq_enable_pulse( - const irq_ID_t ID, - bool pulse) + const irq_ID_t ID, + bool pulse) { unsigned int edge_out = 0x0; @@ -128,18 +131,18 @@ void irq_enable_pulse( } /* output is given as edge, not pulse */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX, edge_out); + _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX, edge_out); return; } void irq_disable_channel( - const irq_ID_t ID, - const unsigned int irq_id) + const irq_ID_t ID, + const unsigned int irq_id) { unsigned int mask = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX); + _HRT_IRQ_CONTROLLER_MASK_REG_IDX); unsigned int enable = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); unsigned int me = 1U << irq_id; assert(ID < N_IRQ_ID); @@ -148,15 +151,15 @@ void irq_disable_channel( mask &= ~me; enable &= ~me; -/* enable interrupt to output */ + /* enable interrupt to output */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); -/* unmask interrupt from input */ + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX, enable); + /* unmask interrupt from input */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); -/* clear current irq only */ + _HRT_IRQ_CONTROLLER_MASK_REG_IDX, mask); + /* clear current irq only */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, me); irq_wait_for_write_complete(ID); @@ -164,18 +167,18 @@ void irq_disable_channel( } enum hrt_isp_css_irq_status irq_get_channel_id( - const irq_ID_t ID, - unsigned int *irq_id) + const irq_ID_t ID, + unsigned int *irq_id) { unsigned int irq_status = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); unsigned int idx; enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; assert(ID < N_IRQ_ID); assert(irq_id); -/* find the first irq bit */ + /* find the first irq bit */ for (idx = 0; idx < IRQ_N_CHANNEL[ID]; idx++) { if (irq_status & (1U << idx)) break; @@ -183,12 +186,12 @@ enum hrt_isp_css_irq_status irq_get_channel_id( if (idx == IRQ_N_CHANNEL[ID]) return hrt_isp_css_irq_status_error; -/* now check whether there are more bits set */ + /* now check whether there are more bits set */ if (irq_status != (1U << idx)) status = hrt_isp_css_irq_status_more_irqs; irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); irq_wait_for_write_complete(ID); @@ -200,11 +203,12 @@ enum hrt_isp_css_irq_status irq_get_channel_id( static const hrt_address IRQ_REQUEST_ADDR[N_IRQ_SW_CHANNEL_ID] = { _REG_GP_IRQ_REQUEST0_ADDR, - _REG_GP_IRQ_REQUEST1_ADDR}; + _REG_GP_IRQ_REQUEST1_ADDR +}; void irq_raise( - const irq_ID_t ID, - const irq_sw_channel_id_t irq_id) + const irq_ID_t ID, + const irq_sw_channel_id_t irq_id) { hrt_address addr; @@ -215,45 +219,45 @@ void irq_raise( (void)ID; addr = IRQ_REQUEST_ADDR[irq_id]; -/* The SW IRQ pins are remapped to offset zero */ + /* The SW IRQ pins are remapped to offset zero */ gp_device_reg_store(GP_DEVICE0_ID, - (unsigned int)addr, 1); + (unsigned int)addr, 1); gp_device_reg_store(GP_DEVICE0_ID, - (unsigned int)addr, 0); + (unsigned int)addr, 0); return; } void irq_controller_get_state( - const irq_ID_t ID, - irq_controller_state_t *state) + const irq_ID_t ID, + irq_controller_state_t *state) { assert(ID < N_IRQ_ID); assert(state); state->irq_edge = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); + _HRT_IRQ_CONTROLLER_EDGE_REG_IDX); state->irq_mask = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_MASK_REG_IDX); + _HRT_IRQ_CONTROLLER_MASK_REG_IDX); state->irq_status = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); state->irq_enable = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); state->irq_level_not_pulse = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX); + _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX); return; } bool any_virq_signal(void) { unsigned int irq_status = irq_reg_load(IRQ0_ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); return (irq_status != 0); } void cnd_virq_enable_channel( - const virq_id_t irq_ID, - const bool en) + const virq_id_t irq_ID, + const bool en) { irq_ID_t i; unsigned int channel_ID; @@ -262,20 +266,20 @@ void cnd_virq_enable_channel( assert(ID < N_IRQ_ID); for (i = IRQ1_ID; i < N_IRQ_ID; i++) { - /* It is not allowed to enable the pin of a nested IRQ directly */ + /* It is not allowed to enable the pin of a nested IRQ directly */ assert(irq_ID != IRQ_NESTING_ID[i]); } if (en) { irq_enable_channel(ID, channel_ID); if (IRQ_NESTING_ID[ID] != N_virq_id) { -/* Single level nesting, otherwise we'd need to recurse */ + /* Single level nesting, otherwise we'd need to recurse */ irq_enable_channel(IRQ0_ID, IRQ_NESTING_ID[ID]); } } else { irq_disable_channel(ID, channel_ID); if ((IRQ_NESTING_ID[ID] != N_virq_id) && !any_irq_channel_enabled(ID)) { -/* Only disable the top if the nested ones are empty */ + /* Only disable the top if the nested ones are empty */ irq_disable_channel(IRQ0_ID, IRQ_NESTING_ID[ID]); } } @@ -293,7 +297,7 @@ void virq_clear_all(void) } enum hrt_isp_css_irq_status virq_get_channel_signals( - virq_info_t *irq_info) + virq_info_t *irq_info) { enum hrt_isp_css_irq_status irq_status = hrt_isp_css_irq_status_error; irq_ID_t ID; @@ -303,17 +307,17 @@ enum hrt_isp_css_irq_status virq_get_channel_signals( for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { if (any_irq_channel_enabled(ID)) { hrt_data irq_data = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); if (irq_data != 0) { -/* The error condition is an IRQ pulse received with no IRQ status written */ + /* The error condition is an IRQ pulse received with no IRQ status written */ irq_status = hrt_isp_css_irq_status_success; } irq_info->irq_status_reg[ID] |= irq_data; irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, irq_data); + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, irq_data); irq_wait_for_write_complete(ID); } @@ -323,30 +327,30 @@ enum hrt_isp_css_irq_status virq_get_channel_signals( } void virq_clear_info( - virq_info_t *irq_info) + virq_info_t *irq_info) { irq_ID_t ID; assert(irq_info); for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) { - irq_info->irq_status_reg[ID] = 0; + irq_info->irq_status_reg[ID] = 0; } return; } enum hrt_isp_css_irq_status virq_get_channel_id( - virq_id_t *irq_id) + virq_id_t *irq_id) { unsigned int irq_status = irq_reg_load(IRQ0_ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); unsigned int idx; enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success; irq_ID_t ID; assert(irq_id); -/* find the first irq bit on device 0 */ + /* find the first irq bit on device 0 */ for (idx = 0; idx < IRQ_N_CHANNEL[IRQ0_ID]; idx++) { if (irq_status & (1U << idx)) break; @@ -356,23 +360,23 @@ enum hrt_isp_css_irq_status virq_get_channel_id( return hrt_isp_css_irq_status_error; } -/* Check whether there are more bits set on device 0 */ + /* Check whether there are more bits set on device 0 */ if (irq_status != (1U << idx)) { status = hrt_isp_css_irq_status_more_irqs; } -/* Check whether we have an IRQ on one of the nested devices */ + /* Check whether we have an IRQ on one of the nested devices */ for (ID = N_IRQ_ID - 1 ; ID > (irq_ID_t)0; ID--) { if (IRQ_NESTING_ID[ID] == (virq_id_t)idx) { break; } } -/* If we have a nested IRQ, load that state, discard the device 0 state */ + /* If we have a nested IRQ, load that state, discard the device 0 state */ if (ID != IRQ0_ID) { irq_status = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); -/* find the first irq bit on device "id" */ + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX); + /* find the first irq bit on device "id" */ for (idx = 0; idx < IRQ_N_CHANNEL[ID]; idx++) { if (irq_status & (1U << idx)) break; @@ -382,19 +386,19 @@ enum hrt_isp_css_irq_status virq_get_channel_id( return hrt_isp_css_irq_status_error; } -/* Alternatively check whether there are more bits set on this device */ + /* Alternatively check whether there are more bits set on this device */ if (irq_status != (1U << idx)) { status = hrt_isp_css_irq_status_more_irqs; } else { -/* If this device is empty, clear the state on device 0 */ + /* If this device is empty, clear the state on device 0 */ irq_reg_store(IRQ0_ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << IRQ_NESTING_ID[ID]); + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << IRQ_NESTING_ID[ID]); } } /* if (ID != IRQ0_ID) */ -/* Here we proceed to clear the IRQ on detected device, if no nested IRQ, this is device 0 */ + /* Here we proceed to clear the IRQ on detected device, if no nested IRQ, this is device 0 */ irq_reg_store(ID, - _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); + _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, 1U << idx); irq_wait_for_write_complete(ID); @@ -406,30 +410,30 @@ enum hrt_isp_css_irq_status virq_get_channel_id( } static inline void irq_wait_for_write_complete( - const irq_ID_t ID) + const irq_ID_t ID) { assert(ID < N_IRQ_ID); assert(IRQ_BASE[ID] != (hrt_address)-1); (void)ia_css_device_load_uint32(IRQ_BASE[ID] + - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX * sizeof(hrt_data)); + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX * sizeof(hrt_data)); } static inline bool any_irq_channel_enabled( - const irq_ID_t ID) + const irq_ID_t ID) { hrt_data en_reg; assert(ID < N_IRQ_ID); en_reg = irq_reg_load(ID, - _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); + _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX); return (en_reg != 0); } static inline irq_ID_t virq_get_irq_id( - const virq_id_t irq_ID, - unsigned int *channel_ID) + const virq_id_t irq_ID, + unsigned int *channel_ID) { irq_ID_t ID; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h index db3cfcba5b817..8a947aefd8519 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h @@ -22,9 +22,9 @@ #include "assert_support.h" STORAGE_CLASS_IRQ_C void irq_reg_store( - const irq_ID_t ID, - const unsigned int reg, - const hrt_data value) + const irq_ID_t ID, + const unsigned int reg, + const hrt_data value) { assert(ID < N_IRQ_ID); assert(IRQ_BASE[ID] != (hrt_address) - 1); @@ -33,8 +33,8 @@ STORAGE_CLASS_IRQ_C void irq_reg_store( } STORAGE_CLASS_IRQ_C hrt_data irq_reg_load( - const irq_ID_t ID, - const unsigned int reg) + const irq_ID_t ID, + const unsigned int reg) { assert(ID < N_IRQ_ID); assert(IRQ_BASE[ID] != (hrt_address) - 1); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c index c8ef87d7c07ad..7de7d08f4757d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c @@ -23,24 +23,24 @@ #include "platform_support.h" /* hrt_sleep() */ void cnd_isp_irq_enable( - const isp_ID_t ID, - const bool cnd) + const isp_ID_t ID, + const bool cnd) { if (cnd) { isp_ctrl_setbit(ID, ISP_IRQ_READY_REG, ISP_IRQ_READY_BIT); -/* Enabling the IRQ immediately triggers an interrupt, clear it */ + /* Enabling the IRQ immediately triggers an interrupt, clear it */ isp_ctrl_setbit(ID, ISP_IRQ_CLEAR_REG, ISP_IRQ_CLEAR_BIT); } else { isp_ctrl_clearbit(ID, ISP_IRQ_READY_REG, - ISP_IRQ_READY_BIT); + ISP_IRQ_READY_BIT); } return; } void isp_get_state( - const isp_ID_t ID, - isp_state_t *state, - isp_stall_t *stall) + const isp_ID_t ID, + isp_state_t *state, + isp_stall_t *stall) { hrt_data sc = isp_ctrl_load(ID, ISP_SC_REG); @@ -60,40 +60,40 @@ void isp_get_state( state->is_sleeping = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_SLEEPING_BIT); state->is_stalling = isp_ctrl_getbit(ID, ISP_SC_REG, ISP_STALLING_BIT); stall->stat_ctrl = - !isp_ctrl_getbit(ID, ISP_CTRL_SINK_REG, ISP_CTRL_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_CTRL_SINK_REG, ISP_CTRL_SINK_BIT); stall->pmem = - !isp_ctrl_getbit(ID, ISP_PMEM_SINK_REG, ISP_PMEM_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_PMEM_SINK_REG, ISP_PMEM_SINK_BIT); stall->dmem = - !isp_ctrl_getbit(ID, ISP_DMEM_SINK_REG, ISP_DMEM_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_DMEM_SINK_REG, ISP_DMEM_SINK_BIT); stall->vmem = - !isp_ctrl_getbit(ID, ISP_VMEM_SINK_REG, ISP_VMEM_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_VMEM_SINK_REG, ISP_VMEM_SINK_BIT); stall->fifo0 = - !isp_ctrl_getbit(ID, ISP_FIFO0_SINK_REG, ISP_FIFO0_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_FIFO0_SINK_REG, ISP_FIFO0_SINK_BIT); stall->fifo1 = - !isp_ctrl_getbit(ID, ISP_FIFO1_SINK_REG, ISP_FIFO1_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_FIFO1_SINK_REG, ISP_FIFO1_SINK_BIT); stall->fifo2 = - !isp_ctrl_getbit(ID, ISP_FIFO2_SINK_REG, ISP_FIFO2_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_FIFO2_SINK_REG, ISP_FIFO2_SINK_BIT); stall->fifo3 = - !isp_ctrl_getbit(ID, ISP_FIFO3_SINK_REG, ISP_FIFO3_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_FIFO3_SINK_REG, ISP_FIFO3_SINK_BIT); stall->fifo4 = - !isp_ctrl_getbit(ID, ISP_FIFO4_SINK_REG, ISP_FIFO4_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_FIFO4_SINK_REG, ISP_FIFO4_SINK_BIT); stall->fifo5 = - !isp_ctrl_getbit(ID, ISP_FIFO5_SINK_REG, ISP_FIFO5_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_FIFO5_SINK_REG, ISP_FIFO5_SINK_BIT); stall->fifo6 = - !isp_ctrl_getbit(ID, ISP_FIFO6_SINK_REG, ISP_FIFO6_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_FIFO6_SINK_REG, ISP_FIFO6_SINK_BIT); stall->vamem1 = - !isp_ctrl_getbit(ID, ISP_VAMEM1_SINK_REG, ISP_VAMEM1_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_VAMEM1_SINK_REG, ISP_VAMEM1_SINK_BIT); stall->vamem2 = - !isp_ctrl_getbit(ID, ISP_VAMEM2_SINK_REG, ISP_VAMEM2_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_VAMEM2_SINK_REG, ISP_VAMEM2_SINK_BIT); stall->vamem3 = - !isp_ctrl_getbit(ID, ISP_VAMEM3_SINK_REG, ISP_VAMEM3_SINK_BIT); + !isp_ctrl_getbit(ID, ISP_VAMEM3_SINK_REG, ISP_VAMEM3_SINK_BIT); stall->hmem = - !isp_ctrl_getbit(ID, ISP_HMEM_SINK_REG, ISP_HMEM_SINK_BIT); -/* - stall->icache_master = - !isp_ctrl_getbit(ID, ISP_ICACHE_MT_SINK_REG, - ISP_ICACHE_MT_SINK_BIT); - */ + !isp_ctrl_getbit(ID, ISP_HMEM_SINK_REG, ISP_HMEM_SINK_BIT); + /* + stall->icache_master = + !isp_ctrl_getbit(ID, ISP_ICACHE_MT_SINK_REG, + ISP_ICACHE_MT_SINK_BIT); + */ return; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h index 2ba39efc9d064..a6ab10711255b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h @@ -27,9 +27,9 @@ #include "type_support.h" STORAGE_CLASS_ISP_C void isp_ctrl_store( - const isp_ID_t ID, - const unsigned int reg, - const hrt_data value) + const isp_ID_t ID, + const unsigned int reg, + const hrt_data value) { assert(ID < N_ISP_ID); assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1); @@ -42,8 +42,8 @@ STORAGE_CLASS_ISP_C void isp_ctrl_store( } STORAGE_CLASS_ISP_C hrt_data isp_ctrl_load( - const isp_ID_t ID, - const unsigned int reg) + const isp_ID_t ID, + const unsigned int reg) { assert(ID < N_ISP_ID); assert(ISP_CTRL_BASE[ID] != (hrt_address) - 1); @@ -55,9 +55,9 @@ STORAGE_CLASS_ISP_C hrt_data isp_ctrl_load( } STORAGE_CLASS_ISP_C bool isp_ctrl_getbit( - const isp_ID_t ID, - const unsigned int reg, - const unsigned int bit) + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit) { hrt_data val = isp_ctrl_load(ID, reg); @@ -65,9 +65,9 @@ STORAGE_CLASS_ISP_C bool isp_ctrl_getbit( } STORAGE_CLASS_ISP_C void isp_ctrl_setbit( - const isp_ID_t ID, - const unsigned int reg, - const unsigned int bit) + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit) { hrt_data data = isp_ctrl_load(ID, reg); @@ -76,9 +76,9 @@ STORAGE_CLASS_ISP_C void isp_ctrl_setbit( } STORAGE_CLASS_ISP_C void isp_ctrl_clearbit( - const isp_ID_t ID, - const unsigned int reg, - const unsigned int bit) + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit) { hrt_data data = isp_ctrl_load(ID, reg); @@ -87,10 +87,10 @@ STORAGE_CLASS_ISP_C void isp_ctrl_clearbit( } STORAGE_CLASS_ISP_C void isp_dmem_store( - const isp_ID_t ID, - unsigned int addr, - const void *data, - const size_t size) + const isp_ID_t ID, + unsigned int addr, + const void *data, + const size_t size) { assert(ID < N_ISP_ID); assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); @@ -103,10 +103,10 @@ STORAGE_CLASS_ISP_C void isp_dmem_store( } STORAGE_CLASS_ISP_C void isp_dmem_load( - const isp_ID_t ID, - const unsigned int addr, - void *data, - const size_t size) + const isp_ID_t ID, + const unsigned int addr, + void *data, + const size_t size) { assert(ID < N_ISP_ID); assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); @@ -119,9 +119,9 @@ STORAGE_CLASS_ISP_C void isp_dmem_load( } STORAGE_CLASS_ISP_C void isp_dmem_store_uint32( - const isp_ID_t ID, - unsigned int addr, - const uint32_t data) + const isp_ID_t ID, + unsigned int addr, + const uint32_t data) { assert(ID < N_ISP_ID); assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); @@ -135,8 +135,8 @@ STORAGE_CLASS_ISP_C void isp_dmem_store_uint32( } STORAGE_CLASS_ISP_C uint32_t isp_dmem_load_uint32( - const isp_ID_t ID, - const unsigned int addr) + const isp_ID_t ID, + const unsigned int addr) { assert(ID < N_ISP_ID); assert(ISP_DMEM_BASE[ID] != (hrt_address) - 1); @@ -149,11 +149,11 @@ STORAGE_CLASS_ISP_C uint32_t isp_dmem_load_uint32( } STORAGE_CLASS_ISP_C uint32_t isp_2w_cat_1w( - const u16 x0, - const uint16_t x1) + const u16 x0, + const uint16_t x1) { u32 out = ((uint32_t)(x1 & HIVE_ISP_VMEM_MASK) << ISP_VMEM_ELEMBITS) - | (x0 & HIVE_ISP_VMEM_MASK); + | (x0 & HIVE_ISP_VMEM_MASK); return out; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c index 32dd1f4411523..a17b32b6d4146 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c @@ -16,21 +16,21 @@ #include "mmu_device.h" void mmu_set_page_table_base_index( - const mmu_ID_t ID, - const hrt_data base_index) + const mmu_ID_t ID, + const hrt_data base_index) { mmu_reg_store(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX, base_index); return; } hrt_data mmu_get_page_table_base_index( - const mmu_ID_t ID) + const mmu_ID_t ID) { return mmu_reg_load(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX); } void mmu_invalidate_cache( - const mmu_ID_t ID) + const mmu_ID_t ID) { mmu_reg_store(ID, _HRT_MMU_INVALIDATE_TLB_REG_IDX, 1); return; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c index 354b67dc738a0..f084b316e3730 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c @@ -21,12 +21,12 @@ #include "assert_support.h" void cnd_sp_irq_enable( - const sp_ID_t ID, - const bool cnd) + const sp_ID_t ID, + const bool cnd) { if (cnd) { sp_ctrl_setbit(ID, SP_IRQ_READY_REG, SP_IRQ_READY_BIT); -/* Enabling the IRQ immediately triggers an interrupt, clear it */ + /* Enabling the IRQ immediately triggers an interrupt, clear it */ sp_ctrl_setbit(ID, SP_IRQ_CLEAR_REG, SP_IRQ_CLEAR_BIT); } else { sp_ctrl_clearbit(ID, SP_IRQ_READY_REG, SP_IRQ_READY_BIT); @@ -34,9 +34,9 @@ void cnd_sp_irq_enable( } void sp_get_state( - const sp_ID_t ID, - sp_state_t *state, - sp_stall_t *stall) + const sp_ID_t ID, + sp_state_t *state, + sp_stall_t *stall) { hrt_data sc = sp_ctrl_load(ID, SP_SC_REG); @@ -50,32 +50,32 @@ void sp_get_state( state->is_sleeping = (sc & (1U << SP_SLEEPING_BIT)) != 0; state->is_stalling = (sc & (1U << SP_STALLING_BIT)) != 0; stall->fifo0 = - !sp_ctrl_getbit(ID, SP_FIFO0_SINK_REG, SP_FIFO0_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO0_SINK_REG, SP_FIFO0_SINK_BIT); stall->fifo1 = - !sp_ctrl_getbit(ID, SP_FIFO1_SINK_REG, SP_FIFO1_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO1_SINK_REG, SP_FIFO1_SINK_BIT); stall->fifo2 = - !sp_ctrl_getbit(ID, SP_FIFO2_SINK_REG, SP_FIFO2_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO2_SINK_REG, SP_FIFO2_SINK_BIT); stall->fifo3 = - !sp_ctrl_getbit(ID, SP_FIFO3_SINK_REG, SP_FIFO3_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO3_SINK_REG, SP_FIFO3_SINK_BIT); stall->fifo4 = - !sp_ctrl_getbit(ID, SP_FIFO4_SINK_REG, SP_FIFO4_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO4_SINK_REG, SP_FIFO4_SINK_BIT); stall->fifo5 = - !sp_ctrl_getbit(ID, SP_FIFO5_SINK_REG, SP_FIFO5_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO5_SINK_REG, SP_FIFO5_SINK_BIT); stall->fifo6 = - !sp_ctrl_getbit(ID, SP_FIFO6_SINK_REG, SP_FIFO6_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO6_SINK_REG, SP_FIFO6_SINK_BIT); stall->fifo7 = - !sp_ctrl_getbit(ID, SP_FIFO7_SINK_REG, SP_FIFO7_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO7_SINK_REG, SP_FIFO7_SINK_BIT); stall->fifo8 = - !sp_ctrl_getbit(ID, SP_FIFO8_SINK_REG, SP_FIFO8_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO8_SINK_REG, SP_FIFO8_SINK_BIT); stall->fifo9 = - !sp_ctrl_getbit(ID, SP_FIFO9_SINK_REG, SP_FIFO9_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFO9_SINK_REG, SP_FIFO9_SINK_BIT); stall->fifoa = - !sp_ctrl_getbit(ID, SP_FIFOA_SINK_REG, SP_FIFOA_SINK_BIT); + !sp_ctrl_getbit(ID, SP_FIFOA_SINK_REG, SP_FIFOA_SINK_BIT); stall->dmem = - !sp_ctrl_getbit(ID, SP_DMEM_SINK_REG, SP_DMEM_SINK_BIT); + !sp_ctrl_getbit(ID, SP_DMEM_SINK_REG, SP_DMEM_SINK_BIT); stall->control_master = - !sp_ctrl_getbit(ID, SP_CTRL_MT_SINK_REG, SP_CTRL_MT_SINK_BIT); + !sp_ctrl_getbit(ID, SP_CTRL_MT_SINK_REG, SP_CTRL_MT_SINK_BIT); stall->icache_master = - !sp_ctrl_getbit(ID, SP_ICACHE_MT_SINK_REG, - SP_ICACHE_MT_SINK_BIT); + !sp_ctrl_getbit(ID, SP_ICACHE_MT_SINK_REG, + SP_ICACHE_MT_SINK_BIT); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h index 230cfcc5bfc9e..e3e24fac126e9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h @@ -22,9 +22,9 @@ #include "assert_support.h" STORAGE_CLASS_SP_C void sp_ctrl_store( - const sp_ID_t ID, - const hrt_address reg, - const hrt_data value) + const sp_ID_t ID, + const hrt_address reg, + const hrt_data value) { assert(ID < N_SP_ID); assert(SP_CTRL_BASE[ID] != (hrt_address)-1); @@ -33,8 +33,8 @@ STORAGE_CLASS_SP_C void sp_ctrl_store( } STORAGE_CLASS_SP_C hrt_data sp_ctrl_load( - const sp_ID_t ID, - const hrt_address reg) + const sp_ID_t ID, + const hrt_address reg) { assert(ID < N_SP_ID); assert(SP_CTRL_BASE[ID] != (hrt_address)-1); @@ -42,9 +42,9 @@ STORAGE_CLASS_SP_C hrt_data sp_ctrl_load( } STORAGE_CLASS_SP_C bool sp_ctrl_getbit( - const sp_ID_t ID, - const hrt_address reg, - const unsigned int bit) + const sp_ID_t ID, + const hrt_address reg, + const unsigned int bit) { hrt_data val = sp_ctrl_load(ID, reg); @@ -52,9 +52,9 @@ STORAGE_CLASS_SP_C bool sp_ctrl_getbit( } STORAGE_CLASS_SP_C void sp_ctrl_setbit( - const sp_ID_t ID, - const hrt_address reg, - const unsigned int bit) + const sp_ID_t ID, + const hrt_address reg, + const unsigned int bit) { hrt_data data = sp_ctrl_load(ID, reg); @@ -63,9 +63,9 @@ STORAGE_CLASS_SP_C void sp_ctrl_setbit( } STORAGE_CLASS_SP_C void sp_ctrl_clearbit( - const sp_ID_t ID, - const hrt_address reg, - const unsigned int bit) + const sp_ID_t ID, + const hrt_address reg, + const unsigned int bit) { hrt_data data = sp_ctrl_load(ID, reg); @@ -74,10 +74,10 @@ STORAGE_CLASS_SP_C void sp_ctrl_clearbit( } STORAGE_CLASS_SP_C void sp_dmem_store( - const sp_ID_t ID, - hrt_address addr, - const void *data, - const size_t size) + const sp_ID_t ID, + hrt_address addr, + const void *data, + const size_t size) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); @@ -86,10 +86,10 @@ STORAGE_CLASS_SP_C void sp_dmem_store( } STORAGE_CLASS_SP_C void sp_dmem_load( - const sp_ID_t ID, - const hrt_address addr, - void *data, - const size_t size) + const sp_ID_t ID, + const hrt_address addr, + void *data, + const size_t size) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); @@ -98,9 +98,9 @@ STORAGE_CLASS_SP_C void sp_dmem_load( } STORAGE_CLASS_SP_C void sp_dmem_store_uint8( - const sp_ID_t ID, - hrt_address addr, - const uint8_t data) + const sp_ID_t ID, + hrt_address addr, + const uint8_t data) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); @@ -110,9 +110,9 @@ STORAGE_CLASS_SP_C void sp_dmem_store_uint8( } STORAGE_CLASS_SP_C void sp_dmem_store_uint16( - const sp_ID_t ID, - hrt_address addr, - const uint16_t data) + const sp_ID_t ID, + hrt_address addr, + const uint16_t data) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); @@ -122,9 +122,9 @@ STORAGE_CLASS_SP_C void sp_dmem_store_uint16( } STORAGE_CLASS_SP_C void sp_dmem_store_uint32( - const sp_ID_t ID, - hrt_address addr, - const uint32_t data) + const sp_ID_t ID, + hrt_address addr, + const uint32_t data) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); @@ -134,8 +134,8 @@ STORAGE_CLASS_SP_C void sp_dmem_store_uint32( } STORAGE_CLASS_SP_C uint8_t sp_dmem_load_uint8( - const sp_ID_t ID, - const hrt_address addr) + const sp_ID_t ID, + const hrt_address addr) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); @@ -144,8 +144,8 @@ STORAGE_CLASS_SP_C uint8_t sp_dmem_load_uint8( } STORAGE_CLASS_SP_C uint16_t sp_dmem_load_uint16( - const sp_ID_t ID, - const hrt_address addr) + const sp_ID_t ID, + const hrt_address addr) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); @@ -154,8 +154,8 @@ STORAGE_CLASS_SP_C uint16_t sp_dmem_load_uint16( } STORAGE_CLASS_SP_C uint32_t sp_dmem_load_uint32( - const sp_ID_t ID, - const hrt_address addr) + const sp_ID_t ID, + const hrt_address addr) { assert(ID < N_SP_ID); assert(SP_DMEM_BASE[ID] != (hrt_address)-1); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h index f1430c3df3010..914263d6bba57 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h @@ -45,35 +45,44 @@ /* DDR */ static const hrt_address DDR_BASE[N_DDR_ID] = { - (hrt_address)0x0000000120000000ULL}; + (hrt_address)0x0000000120000000ULL +}; /* ISP */ static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - (hrt_address)0x0000000000020000ULL}; + (hrt_address)0x0000000000020000ULL +}; static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - (hrt_address)0x0000000000200000ULL}; + (hrt_address)0x0000000000200000ULL +}; static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - (hrt_address)0x0000000000100000ULL}; + (hrt_address)0x0000000000100000ULL +}; static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { (hrt_address)0x00000000001C0000ULL, (hrt_address)0x00000000001D0000ULL, - (hrt_address)0x00000000001E0000ULL}; + (hrt_address)0x00000000001E0000ULL +}; static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - (hrt_address)0x00000000001F0000ULL}; + (hrt_address)0x00000000001F0000ULL +}; /* SP */ static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - (hrt_address)0x0000000000010000ULL}; + (hrt_address)0x0000000000010000ULL +}; static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - (hrt_address)0x0000000000300000ULL}; + (hrt_address)0x0000000000300000ULL +}; static const hrt_address SP_PMEM_BASE[N_SP_ID] = { - (hrt_address)0x00000000000B0000ULL}; + (hrt_address)0x00000000000B0000ULL +}; /* MMU */ #if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) @@ -83,21 +92,24 @@ static const hrt_address SP_PMEM_BASE[N_SP_ID] = { */ static const hrt_address MMU_BASE[N_MMU_ID] = { (hrt_address)0x0000000000070000ULL, - (hrt_address)0x00000000000A0000ULL}; + (hrt_address)0x00000000000A0000ULL +}; #else #error "system_local.h: SYSTEM must be one of {2400, 2401 }" #endif /* DMA */ static const hrt_address DMA_BASE[N_DMA_ID] = { - (hrt_address)0x0000000000040000ULL}; + (hrt_address)0x0000000000040000ULL +}; /* IRQ */ static const hrt_address IRQ_BASE[N_IRQ_ID] = { (hrt_address)0x0000000000000500ULL, (hrt_address)0x0000000000030A00ULL, (hrt_address)0x000000000008C000ULL, - (hrt_address)0x0000000000090200ULL}; + (hrt_address)0x0000000000090200ULL +}; /* (hrt_address)0x0000000000000500ULL}; */ @@ -105,11 +117,13 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = { /* GDC */ static const hrt_address GDC_BASE[N_GDC_ID] = { (hrt_address)0x0000000000050000ULL, - (hrt_address)0x0000000000060000ULL}; + (hrt_address)0x0000000000060000ULL +}; /* FIFO_MONITOR (not a subset of GP_DEVICE) */ static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - (hrt_address)0x0000000000000000ULL}; + (hrt_address)0x0000000000000000ULL +}; /* static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { @@ -121,31 +135,36 @@ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { /* GP_DEVICE (single base for all separate GP_REG instances) */ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - (hrt_address)0x0000000000000000ULL}; + (hrt_address)0x0000000000000000ULL +}; /*GP TIMER , all timer registers are inter-twined, * so, having multiple base addresses for * different timers does not help*/ static const hrt_address GP_TIMER_BASE = - (hrt_address)0x0000000000000600ULL; + (hrt_address)0x0000000000000600ULL; /* GPIO */ static const hrt_address GPIO_BASE[N_GPIO_ID] = { - (hrt_address)0x0000000000000400ULL}; + (hrt_address)0x0000000000000400ULL +}; /* TIMED_CTRL */ static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - (hrt_address)0x0000000000000100ULL}; + (hrt_address)0x0000000000000100ULL +}; /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { (hrt_address)0x0000000000030000ULL, (hrt_address)0x0000000000030200ULL, (hrt_address)0x0000000000030400ULL, - (hrt_address)0x0000000000030600ULL}; /* memcpy() */ + (hrt_address)0x0000000000030600ULL +}; /* memcpy() */ /* INPUT_SYSTEM */ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - (hrt_address)0x0000000000080000ULL}; + (hrt_address)0x0000000000080000ULL +}; /* (hrt_address)0x0000000000081000ULL, */ /* capture A */ /* (hrt_address)0x0000000000082000ULL, */ /* capture B */ /* (hrt_address)0x0000000000083000ULL, */ /* capture C */ @@ -158,7 +177,8 @@ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { /* RX, the MIPI lane control regs start at offset 0 */ static const hrt_address RX_BASE[N_RX_ID] = { - (hrt_address)0x0000000000080100ULL}; + (hrt_address)0x0000000000080100ULL +}; #elif HRT_ADDRESS_WIDTH == 32 @@ -166,35 +186,44 @@ static const hrt_address RX_BASE[N_RX_ID] = { /* DDR : Attention, this value not defined in 32-bit */ static const hrt_address DDR_BASE[N_DDR_ID] = { - (hrt_address)0x00000000UL}; + (hrt_address)0x00000000UL +}; /* ISP */ static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = { - (hrt_address)0x00020000UL}; + (hrt_address)0x00020000UL +}; static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = { - (hrt_address)0x00200000UL}; + (hrt_address)0x00200000UL +}; static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = { - (hrt_address)0x100000UL}; + (hrt_address)0x100000UL +}; static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = { (hrt_address)0xffffffffUL, (hrt_address)0xffffffffUL, - (hrt_address)0xffffffffUL}; + (hrt_address)0xffffffffUL +}; static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = { - (hrt_address)0xffffffffUL}; + (hrt_address)0xffffffffUL +}; /* SP */ static const hrt_address SP_CTRL_BASE[N_SP_ID] = { - (hrt_address)0x00010000UL}; + (hrt_address)0x00010000UL +}; static const hrt_address SP_DMEM_BASE[N_SP_ID] = { - (hrt_address)0x00300000UL}; + (hrt_address)0x00300000UL +}; static const hrt_address SP_PMEM_BASE[N_SP_ID] = { - (hrt_address)0x000B0000UL}; + (hrt_address)0x000B0000UL +}; /* MMU */ #if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM) @@ -204,21 +233,24 @@ static const hrt_address SP_PMEM_BASE[N_SP_ID] = { */ static const hrt_address MMU_BASE[N_MMU_ID] = { (hrt_address)0x00070000UL, - (hrt_address)0x000A0000UL}; + (hrt_address)0x000A0000UL +}; #else #error "system_local.h: SYSTEM must be one of {2400, 2401 }" #endif /* DMA */ static const hrt_address DMA_BASE[N_DMA_ID] = { - (hrt_address)0x00040000UL}; + (hrt_address)0x00040000UL +}; /* IRQ */ static const hrt_address IRQ_BASE[N_IRQ_ID] = { (hrt_address)0x00000500UL, (hrt_address)0x00030A00UL, (hrt_address)0x0008C000UL, - (hrt_address)0x00090200UL}; + (hrt_address)0x00090200UL +}; /* (hrt_address)0x00000500UL}; */ @@ -226,11 +258,13 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = { /* GDC */ static const hrt_address GDC_BASE[N_GDC_ID] = { (hrt_address)0x00050000UL, - (hrt_address)0x00060000UL}; + (hrt_address)0x00060000UL +}; /* FIFO_MONITOR (not a subset of GP_DEVICE) */ static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = { - (hrt_address)0x00000000UL}; + (hrt_address)0x00000000UL +}; /* static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = { @@ -242,32 +276,37 @@ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { /* GP_DEVICE (single base for all separate GP_REG instances) */ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = { - (hrt_address)0x00000000UL}; + (hrt_address)0x00000000UL +}; /*GP TIMER , all timer registers are inter-twined, * so, having multiple base addresses for * different timers does not help*/ static const hrt_address GP_TIMER_BASE = - (hrt_address)0x00000600UL; + (hrt_address)0x00000600UL; /* GPIO */ static const hrt_address GPIO_BASE[N_GPIO_ID] = { - (hrt_address)0x00000400UL}; + (hrt_address)0x00000400UL +}; /* TIMED_CTRL */ static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = { - (hrt_address)0x00000100UL}; + (hrt_address)0x00000100UL +}; /* INPUT_FORMATTER */ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = { (hrt_address)0x00030000UL, (hrt_address)0x00030200UL, - (hrt_address)0x00030400UL}; + (hrt_address)0x00030400UL +}; /* (hrt_address)0x00030600UL, */ /* memcpy() */ /* INPUT_SYSTEM */ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { - (hrt_address)0x00080000UL}; + (hrt_address)0x00080000UL +}; /* (hrt_address)0x00081000UL, */ /* capture A */ /* (hrt_address)0x00082000UL, */ /* capture B */ /* (hrt_address)0x00083000UL, */ /* capture C */ @@ -280,7 +319,8 @@ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = { /* RX, the MIPI lane control regs start at offset 0 */ static const hrt_address RX_BASE[N_RX_ID] = { - (hrt_address)0x00080100UL}; + (hrt_address)0x00080100UL +}; #else #error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c index 204ea6c0925d2..aaea743894437 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c @@ -21,12 +21,12 @@ #include "assert_support.h" void timed_ctrl_snd_commnd( - const timed_ctrl_ID_t ID, - hrt_data mask, - hrt_data condition, - hrt_data counter, - hrt_address addr, - hrt_data value) + const timed_ctrl_ID_t ID, + hrt_data mask, + hrt_data condition, + hrt_data counter, + hrt_address addr, + hrt_data value) { OP___assert(ID == TIMED_CTRL0_ID); OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); @@ -42,33 +42,33 @@ void timed_ctrl_snd_commnd( correct BASE address both for csim and android */ void timed_ctrl_snd_sp_commnd( - const timed_ctrl_ID_t ID, - hrt_data mask, - hrt_data condition, - hrt_data counter, - const sp_ID_t SP_ID, - hrt_address offset, - hrt_data value) + const timed_ctrl_ID_t ID, + hrt_data mask, + hrt_data condition, + hrt_data counter, + const sp_ID_t SP_ID, + hrt_address offset, + hrt_data value) { OP___assert(SP_ID < N_SP_ID); OP___assert(SP_DMEM_BASE[SP_ID] != (hrt_address)-1); timed_ctrl_snd_commnd(ID, mask, condition, counter, - SP_DMEM_BASE[SP_ID] + offset, value); + SP_DMEM_BASE[SP_ID] + offset, value); } void timed_ctrl_snd_gpio_commnd( - const timed_ctrl_ID_t ID, - hrt_data mask, - hrt_data condition, - hrt_data counter, - const gpio_ID_t GPIO_ID, - hrt_address offset, - hrt_data value) + const timed_ctrl_ID_t ID, + hrt_data mask, + hrt_data condition, + hrt_data counter, + const gpio_ID_t GPIO_ID, + hrt_address offset, + hrt_data value) { OP___assert(GPIO_ID < N_GPIO_ID); OP___assert(GPIO_BASE[GPIO_ID] != (hrt_address)-1); timed_ctrl_snd_commnd(ID, mask, condition, counter, - GPIO_BASE[GPIO_ID] + offset, value); + GPIO_BASE[GPIO_ID] + offset, value); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h index ffa295c14f8f0..3c137badbd439 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h @@ -22,12 +22,12 @@ #include "assert_support.h" STORAGE_CLASS_TIMED_CTRL_C void timed_ctrl_reg_store( - const timed_ctrl_ID_t ID, - const unsigned int reg, - const hrt_data value) + const timed_ctrl_ID_t ID, + const unsigned int reg, + const hrt_data value) { -OP___assert(ID < N_TIMED_CTRL_ID); -OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address) - 1); + OP___assert(ID < N_TIMED_CTRL_ID); + OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address) - 1); ia_css_device_store_uint32(TIMED_CTRL_BASE[ID] + reg * sizeof(hrt_data), value); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h index 1536cfbabd392..78a607bb4e713 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h @@ -22,14 +22,15 @@ #include "assert_support.h" STORAGE_CLASS_ISP_C void isp_vamem_store( - const vamem_ID_t ID, - vamem_data_t *addr, - const vamem_data_t *data, - const size_t size) /* in vamem_data_t */ + const vamem_ID_t ID, + vamem_data_t *addr, + const vamem_data_t *data, + const size_t size) /* in vamem_data_t */ { assert(ID < N_VAMEM_ID); assert(ISP_VAMEM_BASE[ID] != (hrt_address) - 1); - hrt_master_port_store(ISP_VAMEM_BASE[ID] + (unsigned int)addr, data, size * sizeof(vamem_data_t)); + hrt_master_port_store(ISP_VAMEM_BASE[ID] + (unsigned int)addr, data, + size * sizeof(vamem_data_t)); } #endif /* __VAMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c index 728f9d6072a63..0c6830ae73444 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c @@ -23,7 +23,7 @@ #include "platform_support.h" /* hrt_sleep() */ typedef unsigned long long hive_uedge; -typedef hive_uedge * hive_wide; +typedef hive_uedge *hive_wide; /* Copied from SDK: sim_semantics.c */ @@ -40,11 +40,11 @@ typedef hive_uedge * hive_wide; static void move_subword( - hive_uedge *target, - unsigned int target_bit, - hive_uedge src, - unsigned int src_start, - unsigned int src_end) + hive_uedge *target, + unsigned int target_bit, + hive_uedge src, + unsigned int src_start, + unsigned int src_end) { unsigned int start_elem = target_bit / uedge_bits; unsigned int start_bit = target_bit % uedge_bits; @@ -57,10 +57,12 @@ move_subword( hive_uedge old_val0 = INV_SUBWORD(target[start_elem], start_bit, uedge_bits); target[start_elem] = old_val0 | (src_subword << start_bit); - old_val1 = INV_SUBWORD(target[start_elem + 1], 0, subword_width + start_bit - uedge_bits); + old_val1 = INV_SUBWORD(target[start_elem + 1], 0, + subword_width + start_bit - uedge_bits); target[start_elem + 1] = old_val1 | (src_subword >> (uedge_bits - start_bit)); } else { - hive_uedge old_val = INV_SUBWORD(target[start_elem], start_bit, start_bit + subword_width); + hive_uedge old_val = INV_SUBWORD(target[start_elem], start_bit, + start_bit + subword_width); target[start_elem] = old_val | (src_subword << start_bit); } @@ -68,10 +70,10 @@ move_subword( static void hive_sim_wide_unpack( - hive_wide vector, - hive_wide elem, - hive_uint elem_bits, - hive_uint index) + hive_wide vector, + hive_wide elem, + hive_uint elem_bits, + hive_uint index) { /* pointers into wide_type: */ unsigned int start_elem = (elem_bits * index) / uedge_bits; @@ -102,10 +104,10 @@ hive_sim_wide_unpack( static void hive_sim_wide_pack( - hive_wide vector, - hive_wide elem, - hive_uint elem_bits, - hive_uint index) + hive_wide vector, + hive_wide elem, + hive_uint elem_bits, + hive_uint index) { /* pointers into wide_type: */ unsigned int start_elem = (elem_bits * index) / uedge_bits; @@ -118,7 +120,8 @@ hive_sim_wide_pack( unsigned int start_bit = elem_bits * index; unsigned int i = 0; - for (; bits_to_write > uedge_bits; bits_to_write -= uedge_bits, i++, start_bit += uedge_bits) { + for (; bits_to_write > uedge_bits; + bits_to_write -= uedge_bits, i++, start_bit += uedge_bits) { move_word(vector, start_bit, elem[i]); } move_lower_bits(vector, start_bit, elem[i], bits_to_write); @@ -129,9 +132,9 @@ hive_sim_wide_pack( } static void load_vector( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from) + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from) { unsigned int i; hive_uedge *data; @@ -155,9 +158,9 @@ static void load_vector( } static void store_vector( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from) + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from) { unsigned int i; unsigned int size = sizeof(short) * ISP_NWAY; @@ -180,10 +183,10 @@ static void store_vector( } void isp_vmem_load( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned int elems) /* In t_vmem_elem */ + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned int elems) /* In t_vmem_elem */ { unsigned int c; const t_vmem_elem *vp = from; @@ -198,10 +201,10 @@ void isp_vmem_load( } void isp_vmem_store( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned int elems) /* In t_vmem_elem */ + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned int elems) /* In t_vmem_elem */ { unsigned int c; t_vmem_elem *vp = to; @@ -216,14 +219,14 @@ void isp_vmem_store( } void isp_vmem_2d_load( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned int height, - unsigned int width, - unsigned int stride_to, /* In t_vmem_elem */ - - unsigned stride_from /* In t_vmem_elem */) + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ + + unsigned stride_from /* In t_vmem_elem */) { unsigned int h; @@ -239,19 +242,20 @@ void isp_vmem_2d_load( load_vector(ID, &to[stride_to * h + c], vp); vp = (t_vmem_elem *)((char *)vp + ISP_VEC_ALIGN); } - from = (const t_vmem_elem *)((const char *)from + stride_from / ISP_NWAY * ISP_VEC_ALIGN); + from = (const t_vmem_elem *)((const char *)from + stride_from / ISP_NWAY * + ISP_VEC_ALIGN); } } void isp_vmem_2d_store( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned int height, - unsigned int width, - unsigned int stride_to, /* In t_vmem_elem */ - - unsigned stride_from /* In t_vmem_elem */) + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ + + unsigned stride_from /* In t_vmem_elem */) { unsigned int h; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h index 25043677448dc..a42cce42f29d1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h @@ -23,35 +23,35 @@ typedef u16 t_vmem_elem; #define VMEM_ARRAY(x, s) t_vmem_elem x[s / ISP_NWAY][ISP_NWAY] void isp_vmem_load( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned int elems); /* In t_vmem_elem */ + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned int elems); /* In t_vmem_elem */ void isp_vmem_store( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned int elems); /* In t_vmem_elem */ + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned int elems); /* In t_vmem_elem */ void isp_vmem_2d_load( - const isp_ID_t ID, - const t_vmem_elem *from, - t_vmem_elem *to, - unsigned int height, - unsigned int width, - unsigned int stride_to, /* In t_vmem_elem */ + const isp_ID_t ID, + const t_vmem_elem *from, + t_vmem_elem *to, + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ - unsigned stride_from /* In t_vmem_elem */); + unsigned stride_from /* In t_vmem_elem */); void isp_vmem_2d_store( - const isp_ID_t ID, - t_vmem_elem *to, - const t_vmem_elem *from, - unsigned int height, - unsigned int width, - unsigned int stride_to, /* In t_vmem_elem */ - - unsigned stride_from /* In t_vmem_elem */); + const isp_ID_t ID, + t_vmem_elem *to, + const t_vmem_elem *from, + unsigned int height, + unsigned int width, + unsigned int stride_to, /* In t_vmem_elem */ + + unsigned stride_from /* In t_vmem_elem */); #endif /* __VMEM_LOCAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h index b443b58f96089..759141c9310a6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h @@ -134,7 +134,7 @@ typedef struct ib_buffer_s ib_buffer_t; struct csi_cfg_s { u32 csi_port; - buffering_mode_t buffering_mode; + buffering_mode_t buffering_mode; ib_buffer_t csi_buffer; ib_buffer_t acquisition_buffer; u32 nof_xmem_buffers; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vmem_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vmem_global.h index 369856363b5bb..7867cd137f3fe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vmem_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vmem_global.h @@ -22,7 +22,7 @@ #define VMEM_ALIGN ISP_VMEM_ALIGN #ifndef PIPE_GENERATION -typedef tvector * pvector; +typedef tvector *pvector; #endif #endif /* __VMEM_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h index 038cf3cf7c607..0a86b1fbd27b3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h @@ -76,7 +76,7 @@ typedef hrt_address sys_address; \return none, */ void device_set_base_address( - const sys_address base_addr); + const sys_address base_addr); /*! Get the (sub)system base address @@ -91,7 +91,7 @@ sys_address device_get_base_address(void); \return device[addr] */ uint8_t ia_css_device_load_uint8( - const hrt_address addr); + const hrt_address addr); /*! Read a 16-bit value from a device register or memory in the device @@ -100,7 +100,7 @@ uint8_t ia_css_device_load_uint8( \return device[addr] */ uint16_t ia_css_device_load_uint16( - const hrt_address addr); + const hrt_address addr); /*! Read a 32-bit value from a device register or memory in the device @@ -109,7 +109,7 @@ uint16_t ia_css_device_load_uint16( \return device[addr] */ uint32_t ia_css_device_load_uint32( - const hrt_address addr); + const hrt_address addr); /*! Read a 64-bit value from a device register or memory in the device @@ -118,7 +118,7 @@ uint32_t ia_css_device_load_uint32( \return device[addr] */ uint64_t ia_css_device_load_uint64( - const hrt_address addr); + const hrt_address addr); /*! Write an 8-bit value to a device register or memory in the device @@ -128,8 +128,8 @@ uint64_t ia_css_device_load_uint64( \return none, device[addr] = value */ void ia_css_device_store_uint8( - const hrt_address addr, - const uint8_t data); + const hrt_address addr, + const uint8_t data); /*! Write a 16-bit value to a device register or memory in the device @@ -139,8 +139,8 @@ void ia_css_device_store_uint8( \return none, device[addr] = value */ void ia_css_device_store_uint16( - const hrt_address addr, - const uint16_t data); + const hrt_address addr, + const uint16_t data); /*! Write a 32-bit value to a device register or memory in the device @@ -150,8 +150,8 @@ void ia_css_device_store_uint16( \return none, device[addr] = value */ void ia_css_device_store_uint32( - const hrt_address addr, - const uint32_t data); + const hrt_address addr, + const uint32_t data); /*! Write a 64-bit value to a device register or memory in the device @@ -161,8 +161,8 @@ void ia_css_device_store_uint32( \return none, device[addr] = value */ void ia_css_device_store_uint64( - const hrt_address addr, - const uint64_t data); + const hrt_address addr, + const uint64_t data); /*! Read an array of bytes from device registers or memory in the device @@ -173,9 +173,9 @@ void ia_css_device_store_uint64( \return none */ void ia_css_device_load( - const hrt_address addr, - void *data, - const size_t size); + const hrt_address addr, + void *data, + const size_t size); /*! Write an array of bytes to device registers or memory in the device @@ -186,8 +186,8 @@ void ia_css_device_load( \return none */ void ia_css_device_store( - const hrt_address addr, - const void *data, - const size_t size); + const hrt_address addr, + const void *data, + const size_t size); #endif /* __DEVICE_ACCESS_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h index 63b3c2acc6879..f7cd4d7b96e5a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h @@ -29,8 +29,8 @@ * @param[out] state Point to the register-state. */ void csi_rx_fe_ctrl_get_state( - const csi_rx_frontend_ID_t ID, - csi_rx_fe_ctrl_state_t *state); + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state); /** * @brief Dump the csi rx frontend state. * Dump the state of the csi rx frontend regiester-set. @@ -39,8 +39,8 @@ void csi_rx_fe_ctrl_get_state( * @param[in] state Point to the register-state. */ void csi_rx_fe_ctrl_dump_state( - const csi_rx_frontend_ID_t ID, - csi_rx_fe_ctrl_state_t *state); + const csi_rx_frontend_ID_t ID, + csi_rx_fe_ctrl_state_t *state); /** * @brief Get the state of the csi rx fe dlane. * Get the state of the register set per dlane process. @@ -50,9 +50,9 @@ void csi_rx_fe_ctrl_dump_state( * @param[out] state Point to the dlane state. */ void csi_rx_fe_ctrl_get_dlane_state( - const csi_rx_frontend_ID_t ID, - const u32 lane, - csi_rx_fe_ctrl_lane_t *dlane_state); + const csi_rx_frontend_ID_t ID, + const u32 lane, + csi_rx_fe_ctrl_lane_t *dlane_state); /** * @brief Get the csi rx backend state. * Get the state of the csi rx backend regiester-set. @@ -61,8 +61,8 @@ void csi_rx_fe_ctrl_get_dlane_state( * @param[out] state Point to the register-state. */ void csi_rx_be_ctrl_get_state( - const csi_rx_backend_ID_t ID, - csi_rx_be_ctrl_state_t *state); + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state); /** * @brief Dump the csi rx backend state. * Dump the state of the csi rx backend regiester-set. @@ -71,8 +71,8 @@ void csi_rx_be_ctrl_get_state( * @param[in] state Point to the register-state. */ void csi_rx_be_ctrl_dump_state( - const csi_rx_backend_ID_t ID, - csi_rx_be_ctrl_state_t *state); + const csi_rx_backend_ID_t ID, + csi_rx_be_ctrl_state_t *state); /* end of NCI */ /***************************************************** @@ -90,8 +90,8 @@ void csi_rx_be_ctrl_dump_state( * @return the value of the register. */ hrt_data csi_rx_fe_ctrl_reg_load( - const csi_rx_frontend_ID_t ID, - const hrt_address reg); + const csi_rx_frontend_ID_t ID, + const hrt_address reg); /** * @brief Store a value to the register. * Store a value to the registe of the csi rx fe. @@ -102,9 +102,9 @@ hrt_data csi_rx_fe_ctrl_reg_load( * */ void csi_rx_fe_ctrl_reg_store( - const csi_rx_frontend_ID_t ID, - const hrt_address reg, - const hrt_data value); + const csi_rx_frontend_ID_t ID, + const hrt_address reg, + const hrt_data value); /** * @brief Load the register value. * Load the value of the register of the csirx be. @@ -115,8 +115,8 @@ void csi_rx_fe_ctrl_reg_store( * @return the value of the register. */ hrt_data csi_rx_be_ctrl_reg_load( - const csi_rx_backend_ID_t ID, - const hrt_address reg); + const csi_rx_backend_ID_t ID, + const hrt_address reg); /** * @brief Store a value to the register. * Store a value to the registe of the csi rx be. @@ -127,9 +127,9 @@ hrt_data csi_rx_be_ctrl_reg_load( * */ void csi_rx_be_ctrl_reg_store( - const csi_rx_backend_ID_t ID, - const hrt_address reg, - const hrt_data value); + const csi_rx_backend_ID_t ID, + const hrt_address reg, + const hrt_data value); /* end of DLI */ #endif /* USE_INPUT_SYSTEM_VERSION_2401 */ #endif /* __CSI_RX_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h index 450f4400fd493..79a8446658ee3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h @@ -79,20 +79,20 @@ STORAGE_CLASS_DEBUG_H void debug_synch_queue_ddr(void); \return none */ void debug_buffer_init( - const hrt_address addr); + const hrt_address addr); /*! Set the offset/address of the (remote) debug buffer \return none */ void debug_buffer_ddr_init( - const hrt_vaddress addr); + const hrt_vaddress addr); /*! Set the (remote) operating mode of the debug buffer \return none */ void debug_buffer_setmode( - const debug_buf_mode_t mode); + const debug_buf_mode_t mode); #endif /* __DEBUG_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h index 834e5dfc5ce07..385b978b703b6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h @@ -27,8 +27,8 @@ typedef struct dma_state_s dma_state_t; \return none, state = DMA[ID].state */ void dma_get_state( - const dma_ID_t ID, - dma_state_t *state); + const dma_ID_t ID, + dma_state_t *state); /*! Write to a control register of DMA[ID] @@ -39,9 +39,9 @@ void dma_get_state( \return none, DMA[ID].ctrl[reg] = value */ STORAGE_CLASS_DMA_H void dma_reg_store( - const dma_ID_t ID, - const unsigned int reg, - const hrt_data value); + const dma_ID_t ID, + const unsigned int reg, + const hrt_data value); /*! Read from a control register of DMA[ID] @@ -52,8 +52,8 @@ STORAGE_CLASS_DMA_H void dma_reg_store( \return DMA[ID].ctrl[reg] */ STORAGE_CLASS_DMA_H hrt_data dma_reg_load( - const dma_ID_t ID, - const unsigned int reg); + const dma_ID_t ID, + const unsigned int reg); /*! Set maximum burst size of DMA[ID] @@ -65,8 +65,8 @@ STORAGE_CLASS_DMA_H hrt_data dma_reg_load( */ void dma_set_max_burst_size( - dma_ID_t ID, - dma_connection conn, - uint32_t max_burst_size); + dma_ID_t ID, + dma_connection conn, + uint32_t max_burst_size); #endif /* __DMA_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h index 6e84fc775f259..a84b74b3bc1e6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h @@ -25,7 +25,7 @@ \return none, dequeue(event_queue[ID]) */ STORAGE_CLASS_EVENT_H void event_wait_for( - const event_ID_t ID); + const event_ID_t ID); /*! Conditional blocking wait for an event source EVENT[ID] @@ -35,8 +35,8 @@ STORAGE_CLASS_EVENT_H void event_wait_for( \return none, if(cnd) dequeue(event_queue[ID]) */ STORAGE_CLASS_EVENT_H void cnd_event_wait_for( - const event_ID_t ID, - const bool cnd); + const event_ID_t ID, + const bool cnd); /*! Blocking read from an event source EVENT[ID] @@ -45,7 +45,7 @@ STORAGE_CLASS_EVENT_H void cnd_event_wait_for( \return dequeue(event_queue[ID]) */ STORAGE_CLASS_EVENT_H hrt_data event_receive_token( - const event_ID_t ID); + const event_ID_t ID); /*! Blocking write to an event sink EVENT[ID] @@ -55,8 +55,8 @@ STORAGE_CLASS_EVENT_H hrt_data event_receive_token( \return none, enqueue(event_queue[ID]) */ STORAGE_CLASS_EVENT_H void event_send_token( - const event_ID_t ID, - const hrt_data token); + const event_ID_t ID, + const hrt_data token); /*! Query an event source EVENT[ID] @@ -65,7 +65,7 @@ STORAGE_CLASS_EVENT_H void event_send_token( \return !isempty(event_queue[ID]) */ STORAGE_CLASS_EVENT_H bool is_event_pending( - const event_ID_t ID); + const event_ID_t ID); /*! Query an event sink EVENT[ID] @@ -74,6 +74,6 @@ STORAGE_CLASS_EVENT_H bool is_event_pending( \return !isfull(event_queue[ID]) */ STORAGE_CLASS_EVENT_H bool can_event_send_token( - const event_ID_t ID); + const event_ID_t ID); #endif /* __EVENT_FIFO_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h index 93b4f9b441ae0..e451d6f2a70d4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h @@ -30,9 +30,9 @@ typedef struct fifo_monitor_state_s fifo_monitor_state_t; \return none, fifo_switch[switch_id].sel = sel */ STORAGE_CLASS_FIFO_MONITOR_H void fifo_switch_set( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id, - const hrt_data sel); + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + const hrt_data sel); /*! Get a fifo switch multiplex @@ -42,8 +42,8 @@ STORAGE_CLASS_FIFO_MONITOR_H void fifo_switch_set( \return fifo_switch[switch_id].sel */ STORAGE_CLASS_FIFO_MONITOR_H hrt_data fifo_switch_get( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id); + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id); /*! Read the state of FIFO_MONITOR[ID] @@ -53,8 +53,8 @@ STORAGE_CLASS_FIFO_MONITOR_H hrt_data fifo_switch_get( \return none, state = FIFO_MONITOR[ID].state */ void fifo_monitor_get_state( - const fifo_monitor_ID_t ID, - fifo_monitor_state_t *state); + const fifo_monitor_ID_t ID, + fifo_monitor_state_t *state); /*! Read the state of a fifo channel @@ -65,9 +65,9 @@ void fifo_monitor_get_state( \return none, state = fifo_channel[channel_id].state */ void fifo_channel_get_state( - const fifo_monitor_ID_t ID, - const fifo_channel_t channel_id, - fifo_channel_state_t *state); + const fifo_monitor_ID_t ID, + const fifo_channel_t channel_id, + fifo_channel_state_t *state); /*! Read the state of a fifo switch @@ -78,9 +78,9 @@ void fifo_channel_get_state( \return none, state = fifo_switch[switch_id].state */ void fifo_switch_get_state( - const fifo_monitor_ID_t ID, - const fifo_switch_t switch_id, - fifo_switch_state_t *state); + const fifo_monitor_ID_t ID, + const fifo_switch_t switch_id, + fifo_switch_state_t *state); /*! Write to a control register of FIFO_MONITOR[ID] @@ -91,9 +91,9 @@ void fifo_switch_get_state( \return none, FIFO_MONITOR[ID].ctrl[reg] = value */ STORAGE_CLASS_FIFO_MONITOR_H void fifo_monitor_reg_store( - const fifo_monitor_ID_t ID, - const unsigned int reg, - const hrt_data value); + const fifo_monitor_ID_t ID, + const unsigned int reg, + const hrt_data value); /*! Read from a control register of FIFO_MONITOR[ID] @@ -104,7 +104,7 @@ STORAGE_CLASS_FIFO_MONITOR_H void fifo_monitor_reg_store( \return FIFO_MONITOR[ID].ctrl[reg] */ STORAGE_CLASS_FIFO_MONITOR_H hrt_data fifo_monitor_reg_load( - const fifo_monitor_ID_t ID, - const unsigned int reg); + const fifo_monitor_ID_t ID, + const unsigned int reg); #endif /* __FIFO_MONITOR_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h index 736a3ca67d793..fc6f42e76fbe6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h @@ -34,8 +34,8 @@ \return none, GDC[ID].lut[0...3][0...HRT_GDC_N-1] = data */ void gdc_lut_store( - const gdc_ID_t ID, - const int data[4][HRT_GDC_N]); + const gdc_ID_t ID, + const int data[4][HRT_GDC_N]); /*! Convert the bicubic interpolation table of GDC[ID] to the ISP-specific format @@ -44,8 +44,8 @@ void gdc_lut_store( \param out_lut[out] The data matrix as the output of conversion */ void gdc_lut_convert_to_isp_format( - const int in_lut[4][HRT_GDC_N], - int out_lut[4][HRT_GDC_N]); + const int in_lut[4][HRT_GDC_N], + int out_lut[4][HRT_GDC_N]); /*! Return the integer representation of 1.0 of GDC[ID] @@ -54,6 +54,6 @@ void gdc_lut_convert_to_isp_format( \return unity */ int gdc_get_unity( - const gdc_ID_t ID); + const gdc_ID_t ID); #endif /* __GDC_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h index fa5ff8c4cd28a..7cc0799d49ed6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h @@ -27,8 +27,8 @@ typedef struct gp_device_state_s gp_device_state_t; \return none, state = GP_DEVICE[ID].state */ void gp_device_get_state( - const gp_device_ID_t ID, - gp_device_state_t *state); + const gp_device_ID_t ID, + gp_device_state_t *state); /*! Write to a control register of GP_DEVICE[ID] @@ -39,9 +39,9 @@ void gp_device_get_state( \return none, GP_DEVICE[ID].ctrl[reg] = value */ STORAGE_CLASS_GP_DEVICE_H void gp_device_reg_store( - const gp_device_ID_t ID, - const unsigned int reg_addr, - const hrt_data value); + const gp_device_ID_t ID, + const unsigned int reg_addr, + const hrt_data value); /*! Read from a control register of GP_DEVICE[ID] @@ -52,7 +52,7 @@ STORAGE_CLASS_GP_DEVICE_H void gp_device_reg_store( \return GP_DEVICE[ID].ctrl[reg] */ STORAGE_CLASS_GP_DEVICE_H hrt_data gp_device_reg_load( - const gp_device_ID_t ID, - const hrt_address reg_addr); + const gp_device_ID_t ID, + const hrt_address reg_addr); #endif /* __GP_DEVICE_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h index 275e8e4d853da..d21aab3a179d8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h @@ -26,9 +26,9 @@ \return none, GPIO[ID].ctrl[reg] = value */ STORAGE_CLASS_GPIO_H void gpio_reg_store( - const gpio_ID_t ID, - const unsigned int reg_addr, - const hrt_data value); + const gpio_ID_t ID, + const unsigned int reg_addr, + const hrt_data value); /*! Read from a control register of GPIO[ID] @@ -39,7 +39,7 @@ STORAGE_CLASS_GPIO_H void gpio_reg_store( \return GPIO[ID].ctrl[reg] */ STORAGE_CLASS_GPIO_H hrt_data gpio_reg_load( - const gpio_ID_t ID, - const unsigned int reg_addr); + const gpio_ID_t ID, + const unsigned int reg_addr); #endif /* __GPIO_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h index 8538f86ab5e61..567fbc1d35e79 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h @@ -27,6 +27,6 @@ \return sizeof(HMEM[ID]) */ STORAGE_CLASS_HMEM_H size_t sizeof_hmem( - const hmem_ID_t ID); + const hmem_ID_t ID); #endif /* __HMEM_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h index 5bd6cebe85b31..6b17a6b651b7c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h @@ -29,8 +29,8 @@ * @param[out] state Point to the register-state. */ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_state( - const ibuf_ctrl_ID_t ID, - ibuf_ctrl_state_t *state); + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state); /** * @brief Get the state of the ibuf-controller process. @@ -41,9 +41,9 @@ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_state( * @param[out] state Point to the process state. */ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_proc_state( - const ibuf_ctrl_ID_t ID, - const u32 proc_id, - ibuf_ctrl_proc_state_t *state); + const ibuf_ctrl_ID_t ID, + const u32 proc_id, + ibuf_ctrl_proc_state_t *state); /** * @brief Dump the ibuf-controller state. * Dump the state of the ibuf-controller regiester-set. @@ -52,8 +52,8 @@ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_get_proc_state( * @param[in] state Pointer to the register-state. */ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_dump_state( - const ibuf_ctrl_ID_t ID, - ibuf_ctrl_state_t *state); + const ibuf_ctrl_ID_t ID, + ibuf_ctrl_state_t *state); /* end of NCI */ /***************************************************** @@ -71,8 +71,8 @@ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_dump_state( * @return the value of the register. */ STORAGE_CLASS_IBUF_CTRL_H hrt_data ibuf_ctrl_reg_load( - const ibuf_ctrl_ID_t ID, - const hrt_address reg); + const ibuf_ctrl_ID_t ID, + const hrt_address reg); /** * @brief Store a value to the register. @@ -84,9 +84,9 @@ STORAGE_CLASS_IBUF_CTRL_H hrt_data ibuf_ctrl_reg_load( * */ STORAGE_CLASS_IBUF_CTRL_H void ibuf_ctrl_reg_store( - const ibuf_ctrl_ID_t ID, - const hrt_address reg, - const hrt_data value); + const ibuf_ctrl_ID_t ID, + const hrt_address reg, + const hrt_data value); /* end of DLI */ #endif /* USE_INPUT_SYSTEM_VERSION_2401 */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h index 87f6d5031fdfe..e5758cb8beddb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h @@ -25,7 +25,7 @@ \return none, reset(INPUT_FORMATTER[ID]) */ void input_formatter_rst( - const input_formatter_ID_t ID); + const input_formatter_ID_t ID); /*! Set the blocking mode of INPUT_FORMATTER[ID] @@ -42,8 +42,8 @@ void input_formatter_rst( \return none, INPUT_FORMATTER[ID].blocking_mode = enable */ void input_formatter_set_fifo_blocking_mode( - const input_formatter_ID_t ID, - const bool enable); + const input_formatter_ID_t ID, + const bool enable); /*! Return the data alignment of INPUT_FORMATTER[ID] @@ -52,7 +52,7 @@ void input_formatter_set_fifo_blocking_mode( \return alignment(INPUT_FORMATTER[ID].data) */ unsigned int input_formatter_get_alignment( - const input_formatter_ID_t ID); + const input_formatter_ID_t ID); /*! Read the source switch state into INPUT_FORMATTER[ID] @@ -62,8 +62,8 @@ unsigned int input_formatter_get_alignment( \return none, state = INPUT_FORMATTER[ID].switch_state */ void input_formatter_get_switch_state( - const input_formatter_ID_t ID, - input_formatter_switch_state_t *state); + const input_formatter_ID_t ID, + input_formatter_switch_state_t *state); /*! Read the control registers of INPUT_FORMATTER[ID] @@ -73,8 +73,8 @@ void input_formatter_get_switch_state( \return none, state = INPUT_FORMATTER[ID].state */ void input_formatter_get_state( - const input_formatter_ID_t ID, - input_formatter_state_t *state); + const input_formatter_ID_t ID, + input_formatter_state_t *state); /*! Read the control registers of bin copy INPUT_FORMATTER[ID] @@ -84,8 +84,8 @@ void input_formatter_get_state( \return none, state = INPUT_FORMATTER[ID].state */ void input_formatter_bin_get_state( - const input_formatter_ID_t ID, - input_formatter_bin_state_t *state); + const input_formatter_ID_t ID, + input_formatter_bin_state_t *state); /*! Write to a control register of INPUT_FORMATTER[ID] @@ -96,9 +96,9 @@ void input_formatter_bin_get_state( \return none, INPUT_FORMATTER[ID].ctrl[reg] = value */ STORAGE_CLASS_INPUT_FORMATTER_H void input_formatter_reg_store( - const input_formatter_ID_t ID, - const hrt_address reg_addr, - const hrt_data value); + const input_formatter_ID_t ID, + const hrt_address reg_addr, + const hrt_data value); /*! Read from a control register of INPUT_FORMATTER[ID] @@ -109,7 +109,7 @@ STORAGE_CLASS_INPUT_FORMATTER_H void input_formatter_reg_store( \return INPUT_FORMATTER[ID].ctrl[reg] */ STORAGE_CLASS_INPUT_FORMATTER_H hrt_data input_formatter_reg_load( - const input_formatter_ID_t ID, - const unsigned int reg_addr); + const input_formatter_ID_t ID, + const unsigned int reg_addr); #endif /* __INPUT_FORMATTER_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h index 786b3585fde38..d0de27abb95a9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h @@ -31,8 +31,8 @@ typedef struct receiver_state_s receiver_state_t; \return none, state = INPUT_SYSTEM[ID].state */ void input_system_get_state( - const input_system_ID_t ID, - input_system_state_t *state); + const input_system_ID_t ID, + input_system_state_t *state); /*! Read the state of RECEIVER[ID] @@ -42,8 +42,8 @@ void input_system_get_state( \return none, state = RECEIVER[ID].state */ void receiver_get_state( - const rx_ID_t ID, - receiver_state_t *state); + const rx_ID_t ID, + receiver_state_t *state); /*! Flag whether a MIPI format is YUV420 @@ -52,7 +52,7 @@ void receiver_get_state( \return mipi_format == YUV420 */ bool is_mipi_format_yuv420( - const mipi_format_t mipi_format); + const mipi_format_t mipi_format); /*! Set compression parameters for cfg[cfg_ID] of RECEIVER[ID] @@ -68,10 +68,10 @@ bool is_mipi_format_yuv420( \return none, RECEIVER[ID].cfg[cfg_ID] = {comp, pred} */ void receiver_set_compression( - const rx_ID_t ID, - const unsigned int cfg_ID, - const mipi_compressor_t comp, - const mipi_predictor_t pred); + const rx_ID_t ID, + const unsigned int cfg_ID, + const mipi_compressor_t comp, + const mipi_predictor_t pred); /*! Enable PORT[port_ID] of RECEIVER[ID] @@ -82,9 +82,9 @@ void receiver_set_compression( \return None, enable(RECEIVER[ID].PORT[port_ID]) */ void receiver_port_enable( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const bool cnd); + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const bool cnd); /*! Flag if PORT[port_ID] of RECEIVER[ID] is enabled @@ -94,8 +94,8 @@ void receiver_port_enable( \return enable(RECEIVER[ID].PORT[port_ID]) == true */ bool is_receiver_port_enabled( - const rx_ID_t ID, - const enum mipi_port_id port_ID); + const rx_ID_t ID, + const enum mipi_port_id port_ID); /*! Enable the IRQ channels of PORT[port_ID] of RECEIVER[ID] @@ -106,9 +106,9 @@ bool is_receiver_port_enabled( \return None, enable(RECEIVER[ID].PORT[port_ID].irq_info) */ void receiver_irq_enable( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const rx_irq_info_t irq_info); + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info); /*! Return the IRQ status of PORT[port_ID] of RECEIVER[ID] @@ -118,8 +118,8 @@ void receiver_irq_enable( \return RECEIVER[ID].PORT[port_ID].irq_info */ rx_irq_info_t receiver_get_irq_info( - const rx_ID_t ID, - const enum mipi_port_id port_ID); + const rx_ID_t ID, + const enum mipi_port_id port_ID); /*! Clear the IRQ status of PORT[port_ID] of RECEIVER[ID] @@ -130,9 +130,9 @@ rx_irq_info_t receiver_get_irq_info( \return None, clear(RECEIVER[ID].PORT[port_ID].irq_info) */ void receiver_irq_clear( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const rx_irq_info_t irq_info); + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const rx_irq_info_t irq_info); /*! Write to a control register of INPUT_SYSTEM[ID] @@ -143,9 +143,9 @@ void receiver_irq_clear( \return none, INPUT_SYSTEM[ID].ctrl[reg] = value */ STORAGE_CLASS_INPUT_SYSTEM_H void input_system_reg_store( - const input_system_ID_t ID, - const hrt_address reg, - const hrt_data value); + const input_system_ID_t ID, + const hrt_address reg, + const hrt_data value); /*! Read from a control register of INPUT_SYSTEM[ID] @@ -156,8 +156,8 @@ STORAGE_CLASS_INPUT_SYSTEM_H void input_system_reg_store( \return INPUT_SYSTEM[ID].ctrl[reg] */ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data input_system_reg_load( - const input_system_ID_t ID, - const hrt_address reg); + const input_system_ID_t ID, + const hrt_address reg); /*! Write to a control register of RECEIVER[ID] @@ -168,9 +168,9 @@ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data input_system_reg_load( \return none, RECEIVER[ID].ctrl[reg] = value */ STORAGE_CLASS_INPUT_SYSTEM_H void receiver_reg_store( - const rx_ID_t ID, - const hrt_address reg, - const hrt_data value); + const rx_ID_t ID, + const hrt_address reg, + const hrt_data value); /*! Read from a control register of RECEIVER[ID] @@ -181,8 +181,8 @@ STORAGE_CLASS_INPUT_SYSTEM_H void receiver_reg_store( \return RECEIVER[ID].ctrl[reg] */ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data receiver_reg_load( - const rx_ID_t ID, - const hrt_address reg); + const rx_ID_t ID, + const hrt_address reg); /*! Write to a control register of PORT[port_ID] of RECEIVER[ID] @@ -194,10 +194,10 @@ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data receiver_reg_load( \return none, RECEIVER[ID].PORT[port_ID].ctrl[reg] = value */ STORAGE_CLASS_INPUT_SYSTEM_H void receiver_port_reg_store( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const hrt_address reg, - const hrt_data value); + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg, + const hrt_data value); /*! Read from a control register PORT[port_ID] of of RECEIVER[ID] @@ -209,9 +209,9 @@ STORAGE_CLASS_INPUT_SYSTEM_H void receiver_port_reg_store( \return RECEIVER[ID].PORT[port_ID].ctrl[reg] */ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data receiver_port_reg_load( - const rx_ID_t ID, - const enum mipi_port_id port_ID, - const hrt_address reg); + const rx_ID_t ID, + const enum mipi_port_id port_ID, + const hrt_address reg); /*! Write to a control register of SUB_SYSTEM[sub_ID] of INPUT_SYSTEM[ID] @@ -223,10 +223,10 @@ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data receiver_port_reg_load( \return none, INPUT_SYSTEM[ID].SUB_SYSTEM[sub_ID].ctrl[reg] = value */ STORAGE_CLASS_INPUT_SYSTEM_H void input_system_sub_system_reg_store( - const input_system_ID_t ID, - const sub_system_ID_t sub_ID, - const hrt_address reg, - const hrt_data value); + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg, + const hrt_data value); /*! Read from a control register SUB_SYSTEM[sub_ID] of INPUT_SYSTEM[ID] @@ -238,9 +238,9 @@ STORAGE_CLASS_INPUT_SYSTEM_H void input_system_sub_system_reg_store( \return INPUT_SYSTEM[ID].SUB_SYSTEM[sub_ID].ctrl[reg] */ STORAGE_CLASS_INPUT_SYSTEM_H hrt_data input_system_sub_system_reg_load( - const input_system_ID_t ID, - const sub_system_ID_t sub_ID, - const hrt_address reg); + const input_system_ID_t ID, + const sub_system_ID_t sub_ID, + const hrt_address reg); /////////////////////////////////////////////////////////////////////////// // @@ -269,100 +269,100 @@ input_system_error_t input_system_configuration_commit(void); // FIFO channel config function user input_system_error_t input_system_csi_fifo_channel_cfg( - u32 ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - target_cfg2400_t target + u32 ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + target_cfg2400_t target ); input_system_error_t input_system_csi_fifo_channel_with_counting_cfg( - u32 ch_id, - u32 nof_frame, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 mem_region_size, - u32 nof_mem_regions, - target_cfg2400_t target + u32 ch_id, + u32 nof_frame, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 mem_region_size, + u32 nof_mem_regions, + target_cfg2400_t target ); // SRAM channel config function user input_system_error_t input_system_csi_sram_channel_cfg( - u32 ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 csi_mem_region_size, - u32 csi_nof_mem_regions, - target_cfg2400_t target + u32 ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 csi_mem_region_size, + u32 csi_nof_mem_regions, + target_cfg2400_t target ); //XMEM channel config function user input_system_error_t input_system_csi_xmem_channel_cfg( - u32 ch_id, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 mem_region_size, - u32 nof_mem_regions, - u32 acq_mem_region_size, - u32 acq_nof_mem_regions, - target_cfg2400_t target, - uint32_t nof_xmem_buffers + u32 ch_id, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 mem_region_size, + u32 nof_mem_regions, + u32 acq_mem_region_size, + u32 acq_nof_mem_regions, + target_cfg2400_t target, + uint32_t nof_xmem_buffers ); input_system_error_t input_system_csi_xmem_capture_only_channel_cfg( - u32 ch_id, - u32 nof_frames, - input_system_csi_port_t port, - u32 csi_mem_region_size, - u32 csi_nof_mem_regions, - u32 acq_mem_region_size, - u32 acq_nof_mem_regions, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames, + input_system_csi_port_t port, + u32 csi_mem_region_size, + u32 csi_nof_mem_regions, + u32 acq_mem_region_size, + u32 acq_nof_mem_regions, + target_cfg2400_t target ); input_system_error_t input_system_csi_xmem_acquire_only_channel_cfg( - u32 ch_id, - u32 nof_frames, - input_system_csi_port_t port, - backend_channel_cfg_t backend_ch, - u32 acq_mem_region_size, - u32 acq_nof_mem_regions, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames, + input_system_csi_port_t port, + backend_channel_cfg_t backend_ch, + u32 acq_mem_region_size, + u32 acq_nof_mem_regions, + target_cfg2400_t target ); // Non - CSI channel config function user input_system_error_t input_system_prbs_channel_cfg( - u32 ch_id, - u32 nof_frames, - u32 seed, - u32 sync_gen_width, - u32 sync_gen_height, - u32 sync_gen_hblank_cycles, - u32 sync_gen_vblank_cycles, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames, + u32 seed, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, + target_cfg2400_t target ); input_system_error_t input_system_tpg_channel_cfg( - u32 ch_id, - u32 nof_frames,//not used yet - u32 x_mask, - u32 y_mask, - u32 x_delta, - u32 y_delta, - u32 xy_mask, - u32 sync_gen_width, - u32 sync_gen_height, - u32 sync_gen_hblank_cycles, - u32 sync_gen_vblank_cycles, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames,//not used yet + u32 x_mask, + u32 y_mask, + u32 x_delta, + u32 y_delta, + u32 xy_mask, + u32 sync_gen_width, + u32 sync_gen_height, + u32 sync_gen_hblank_cycles, + u32 sync_gen_vblank_cycles, + target_cfg2400_t target ); input_system_error_t input_system_gpfifo_channel_cfg( - u32 ch_id, - u32 nof_frames, - target_cfg2400_t target + u32 ch_id, + u32 nof_frames, + target_cfg2400_t target ); #endif /* #ifdef USE_INPUT_SYSTEM_VERSION_2401 */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h index 79d16c0550f04..dfe2aa9ff2572 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h @@ -26,8 +26,8 @@ \return none, state = IRQ[ID].state */ void irq_controller_get_state( - const irq_ID_t ID, - irq_controller_state_t *state); + const irq_ID_t ID, + irq_controller_state_t *state); /*! Write to a control register of IRQ[ID] @@ -38,9 +38,9 @@ void irq_controller_get_state( \return none, IRQ[ID].ctrl[reg] = value */ STORAGE_CLASS_IRQ_H void irq_reg_store( - const irq_ID_t ID, - const unsigned int reg, - const hrt_data value); + const irq_ID_t ID, + const unsigned int reg, + const hrt_data value); /*! Read from a control register of IRQ[ID] @@ -51,8 +51,8 @@ STORAGE_CLASS_IRQ_H void irq_reg_store( \return IRQ[ID].ctrl[reg] */ STORAGE_CLASS_IRQ_H hrt_data irq_reg_load( - const irq_ID_t ID, - const unsigned int reg); + const irq_ID_t ID, + const unsigned int reg); /*! Enable an IRQ channel of IRQ[ID] with a mode @@ -62,8 +62,8 @@ STORAGE_CLASS_IRQ_H hrt_data irq_reg_load( \return none, enable(IRQ[ID].channel[irq_ID]) */ void irq_enable_channel( - const irq_ID_t ID, - const unsigned int irq_ID); + const irq_ID_t ID, + const unsigned int irq_ID); /*! Enable pulse interrupts for IRQ[ID] with a mode @@ -73,8 +73,8 @@ void irq_enable_channel( \return none */ void irq_enable_pulse( - const irq_ID_t ID, - bool pulse); + const irq_ID_t ID, + bool pulse); /*! Disable an IRQ channel of IRQ[ID] @@ -84,8 +84,8 @@ void irq_enable_pulse( \return none, disable(IRQ[ID].channel[irq_ID]) */ void irq_disable_channel( - const irq_ID_t ID, - const unsigned int irq); + const irq_ID_t ID, + const unsigned int irq); /*! Clear the state of all IRQ channels of IRQ[ID] @@ -94,7 +94,7 @@ void irq_disable_channel( \return none, clear(IRQ[ID].channel[]) */ void irq_clear_all( - const irq_ID_t ID); + const irq_ID_t ID); /*! Return the ID of a signalling IRQ channel of IRQ[ID] @@ -108,8 +108,8 @@ void irq_clear_all( \return state(IRQ[ID]) */ enum hrt_isp_css_irq_status irq_get_channel_id( - const irq_ID_t ID, - unsigned int *irq_id); + const irq_ID_t ID, + unsigned int *irq_id); /*! Raise an interrupt on channel irq_id of device IRQ[ID] @@ -119,8 +119,8 @@ enum hrt_isp_css_irq_status irq_get_channel_id( \return none, signal(IRQ[ID].channel[irq_id]) */ void irq_raise( - const irq_ID_t ID, - const irq_sw_channel_id_t irq_id); + const irq_ID_t ID, + const irq_sw_channel_id_t irq_id); /*! Test if any IRQ channel of the virtual super IRQ has raised a signal @@ -136,8 +136,8 @@ bool any_virq_signal(void); \return none, VIRQ.channel[irq_ID].enable = en */ void cnd_virq_enable_channel( - const virq_id_t irq_ID, - const bool en); + const virq_id_t irq_ID, + const bool en); /*! Clear the state of all IRQ channels of the virtual super IRQ @@ -152,7 +152,7 @@ void virq_clear_all(void); \return none */ void virq_clear_info( - virq_info_t *irq_info); + virq_info_t *irq_info); /*! Return the ID of a signalling IRQ channel of the virtual super IRQ @@ -165,7 +165,7 @@ void virq_clear_info( \return state(IRQ[...]) */ enum hrt_isp_css_irq_status virq_get_channel_id( - virq_id_t *irq_id); + virq_id_t *irq_id); /*! Return the IDs of all signaling IRQ channels of the virtual super IRQ @@ -179,6 +179,6 @@ enum hrt_isp_css_irq_status virq_get_channel_id( \return (error(state(IRQ[...])) */ enum hrt_isp_css_irq_status virq_get_channel_signals( - virq_info_t *irq_info); + virq_info_t *irq_info); #endif /* __IRQ_PUBLIC_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h index e0bbc6499c732..0da2937b900e5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h @@ -26,8 +26,8 @@ \return none, if(cnd) enable(ISP[ID].irq) else disable(ISP[ID].irq) */ void cnd_isp_irq_enable( - const isp_ID_t ID, - const bool cnd); + const isp_ID_t ID, + const bool cnd); /*! Read the state of cell ISP[ID] @@ -38,9 +38,9 @@ void cnd_isp_irq_enable( \return none, state = ISP[ID].state, stall = ISP[ID].stall */ void isp_get_state( - const isp_ID_t ID, - isp_state_t *state, - isp_stall_t *stall); + const isp_ID_t ID, + isp_state_t *state, + isp_stall_t *stall); /*! Write to the status and control register of ISP[ID] @@ -51,9 +51,9 @@ void isp_get_state( \return none, ISP[ID].sc[reg] = value */ STORAGE_CLASS_ISP_H void isp_ctrl_store( - const isp_ID_t ID, - const unsigned int reg, - const hrt_data value); + const isp_ID_t ID, + const unsigned int reg, + const hrt_data value); /*! Read from the status and control register of ISP[ID] @@ -64,8 +64,8 @@ STORAGE_CLASS_ISP_H void isp_ctrl_store( \return ISP[ID].sc[reg] */ STORAGE_CLASS_ISP_H hrt_data isp_ctrl_load( - const isp_ID_t ID, - const unsigned int reg); + const isp_ID_t ID, + const unsigned int reg); /*! Get the status of a bitfield in the control register of ISP[ID] @@ -76,9 +76,9 @@ STORAGE_CLASS_ISP_H hrt_data isp_ctrl_load( \return (ISP[ID].sc[reg] & (1<exp_id; - if (exp_id != 0) - { + if (exp_id != 0) { /* we encode either an exp_id or capture data */ assert((num_captures == 0) && (skip == 0) && (offset == 0)); encoded_tag = TAG_EXP | (exp_id & 0xFF) << TAG_EXP_ID_SHIFT; - } else - { + } else { encoded_tag = TAG_CAP - | ((num_captures_sign & 0x00000001) << TAG_NUM_CAPTURES_SIGN_SHIFT) - | ((offset_sign & 0x00000001) << TAG_OFFSET_SIGN_SHIFT) - | ((num_captures & 0x000000FF) << TAG_NUM_CAPTURES_SHIFT) - | ((skip & 0x000000FF) << TAG_OFFSET_SHIFT) - | ((offset & 0x000000FF) << TAG_SKIP_SHIFT); + | ((num_captures_sign & 0x00000001) << TAG_NUM_CAPTURES_SIGN_SHIFT) + | ((offset_sign & 0x00000001) << TAG_OFFSET_SIGN_SHIFT) + | ((num_captures & 0x000000FF) << TAG_NUM_CAPTURES_SHIFT) + | ((skip & 0x000000FF) << TAG_OFFSET_SHIFT) + | ((offset & 0x000000FF) << TAG_SKIP_SHIFT); } return encoded_tag; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h index 919574a203917..a79941a2e0f2a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h @@ -121,8 +121,8 @@ ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, * */ void ia_css_translate_3a_statistics( - struct ia_css_3a_statistics *host_stats, - const struct ia_css_isp_3a_statistics_map *isp_stats); + struct ia_css_3a_statistics *host_stats, + const struct ia_css_isp_3a_statistics_map *isp_stats); /* Convenience functions for alloc/free of certain datatypes */ @@ -172,8 +172,8 @@ ia_css_3a_statistics_free(struct ia_css_3a_statistics *me); */ struct ia_css_isp_3a_statistics_map * ia_css_isp_3a_statistics_map_allocate( - const struct ia_css_isp_3a_statistics *isp_stats, - void *data_ptr); + const struct ia_css_isp_3a_statistics *isp_stats, + void *data_ptr); /* @brief Free the 3a statistics map * @param[in] me Pointer to the 3a statistics map diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h index 3aac8d8f60231..a8202aabdd383 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h @@ -78,7 +78,8 @@ struct ia_css_blob_descr; struct ia_css_blob_info { /** Static blob data */ u32 offset; /** Blob offset in fw file */ - struct ia_css_isp_param_memory_offsets memory_offsets; /** offset wrt hdr in bytes */ + struct ia_css_isp_param_memory_offsets + memory_offsets; /** offset wrt hdr in bytes */ u32 prog_name_offset; /** offset wrt hdr in bytes */ u32 size; /** Size of blob */ u32 padding_size; /** total cummulative of bytes added due to section alignment */ @@ -95,8 +96,10 @@ struct ia_css_blob_info { u32 bss_target; /** Start position of bss in SP dmem */ u32 bss_size; /** Size of bss section */ /** Dynamic data filled by loader */ - CSS_ALIGN(const void *code, 8); /** Code section absolute pointer within fw, code = icache + text */ - CSS_ALIGN(const void *data, 8); /** Data section absolute pointer within fw, data = data + bss */ + CSS_ALIGN(const void *code, + 8); /** Code section absolute pointer within fw, code = icache + text */ + CSS_ALIGN(const void *data, + 8); /** Data section absolute pointer within fw, data = data + bss */ }; struct ia_css_binary_input_info { @@ -216,7 +219,7 @@ struct ia_css_binary_info { struct ia_css_binary_uds_info uds; struct ia_css_binary_block_info block; struct ia_css_isp_param_isp_segments mem_initializers; -/* MW: Packing (related) bools in an integer ?? */ + /* MW: Packing (related) bools in an integer ?? */ struct { #ifdef ISP2401 u8 luma_only; @@ -253,7 +256,7 @@ struct ia_css_binary_info { u8 padding[2]; } enable; struct { -/* DMA channel ID: [0,...,HIVE_ISP_NUM_DMA_CHANNELS> */ + /* DMA channel ID: [0,...,HIVE_ISP_NUM_DMA_CHANNELS> */ u8 ref_y_channel; u8 ref_c_channel; u8 tnr_channel; @@ -284,7 +287,8 @@ struct ia_css_binary_xinfo { enum ia_css_frame_format output_formats[IA_CSS_FRAME_FORMAT_NUM]; CSS_ALIGN(s32 num_vf_formats, 8); /** number of supported vf formats */ - enum ia_css_frame_format vf_formats[IA_CSS_FRAME_FORMAT_NUM]; /** types of supported vf formats */ + enum ia_css_frame_format + vf_formats[IA_CSS_FRAME_FORMAT_NUM]; /** types of supported vf formats */ u8 num_output_pins; ia_css_ptr xmem_addr; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h index 3bb641d8bb57a..403fa9416d0fa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h @@ -57,7 +57,8 @@ struct ia_css_buffer { /** exposure id for this buffer; 0 = not available see ia_css_event_public.h for more detail. */ union { - struct ia_css_isp_3a_statistics *stats_3a; /** 3A statistics & optionally RGBY statistics. */ + struct ia_css_isp_3a_statistics + *stats_3a; /** 3A statistics & optionally RGBY statistics. */ struct ia_css_isp_dvs_statistics *stats_dvs; /** DVS statistics. */ struct ia_css_isp_skc_dvs_statistics *stats_skc_dvs; /** SKC DVS statistics. */ struct ia_css_frame *frame; /** Frame buffer. */ @@ -65,8 +66,10 @@ struct ia_css_buffer { struct ia_css_metadata *metadata; /** Sensor metadata. */ } data; /** Buffer data pointer. */ u64 driver_cookie; /** cookie for the driver */ - struct ia_css_time_meas timing_data; /** timing data (readings from the timer) */ - struct ia_css_clock_tick isys_eof_clock_tick; /** ISYS's end of frame timer tick*/ + struct ia_css_time_meas + timing_data; /** timing data (readings from the timer) */ + struct ia_css_clock_tick + isys_eof_clock_tick; /** ISYS's end of frame timer tick*/ }; /* @brief Dequeue param buffers from sp2host_queue diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h index 9e01ed2c1bbeb..d9bd1861e50d4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h @@ -46,10 +46,10 @@ * the fw pointer could be freed after this function completes. */ enum ia_css_err ia_css_init( - const struct ia_css_env *env, - const struct ia_css_fw *fw, - u32 l1_base, - enum ia_css_irq_type irq_type); + const struct ia_css_env *env, + const struct ia_css_fw *fw, + u32 l1_base, + enum ia_css_irq_type irq_type); /* @brief Un-initialize the CSS API. * @return None diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h index 84a960b7abbc0..b2bf7d540b621 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h @@ -54,6 +54,7 @@ void ia_css_device_load(const hrt_address addr, void *data, const size_t size); void -ia_css_device_store(const hrt_address addr, const void *data, const size_t size); +ia_css_device_store(const hrt_address addr, const void *data, + const size_t size); #endif /* _IA_CSS_DEVICE_ACCESS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h index d635a747f13db..e647f73c3bd6b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h @@ -111,8 +111,8 @@ ia_css_get_dvs_statistics(struct ia_css_dvs_statistics *host_stats, */ void ia_css_translate_dvs_statistics( - struct ia_css_dvs_statistics *host_stats, - const struct ia_css_isp_dvs_statistics_map *isp_stats); + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); /* @brief Copy DVS 2.0 statistics from an ISP buffer to a host buffer. * @param[in] host_stats Host buffer @@ -145,8 +145,8 @@ ia_css_get_dvs2_statistics(struct ia_css_dvs2_statistics *host_stats, */ void ia_css_translate_dvs2_statistics( - struct ia_css_dvs2_statistics *host_stats, - const struct ia_css_isp_dvs_statistics_map *isp_stats); + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); /* @brief Copy DVS statistics from an ISP buffer to a host buffer. * @param[in] type - DVS statistics type @@ -275,8 +275,8 @@ ia_css_dvs2_6axis_config_free(struct ia_css_dvs_6axis_config *dvs_6axis_config); */ struct ia_css_isp_dvs_statistics_map * ia_css_isp_dvs_statistics_map_allocate( - const struct ia_css_isp_dvs_statistics *isp_stats, - void *data_ptr); + const struct ia_css_isp_dvs_statistics *isp_stats, + void *data_ptr); /* @brief Free the dvs statistics map * @param[in] me Pointer to the dvs statistics map diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h index d7d7f0a995e5c..48059c026c8bb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h @@ -49,7 +49,7 @@ struct ia_css_fw { */ enum ia_css_err ia_css_load_firmware(const struct ia_css_env *env, - const struct ia_css_fw *fw); + const struct ia_css_fw *fw); /* @brief Unloads the firmware * @return None diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h index a32fb299fa628..69e9143e5418a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h @@ -282,7 +282,7 @@ ia_css_frame_allocate_contiguous(struct ia_css_frame **frame, */ enum ia_css_err ia_css_frame_allocate_contiguous_from_info(struct ia_css_frame **frame, - const struct ia_css_frame_info *info); + const struct ia_css_frame_info *info); /* @brief Allocate a CSS frame structure using a frame info structure. * @@ -295,7 +295,7 @@ ia_css_frame_allocate_contiguous_from_info(struct ia_css_frame **frame, */ enum ia_css_err ia_css_frame_create_from_info(struct ia_css_frame **frame, - const struct ia_css_frame_info *info); + const struct ia_css_frame_info *info); /* @brief Set a mapped data buffer to a CSS frame * @@ -312,8 +312,8 @@ ia_css_frame_create_from_info(struct ia_css_frame **frame, */ enum ia_css_err ia_css_frame_set_data(struct ia_css_frame *frame, - const ia_css_ptr mapped_data, - size_t data_size_bytes); + const ia_css_ptr mapped_data, + size_t data_size_bytes); /* @brief Map an existing frame data pointer to a CSS frame. * diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h index c8840138899ac..7716373553e0e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h @@ -110,7 +110,7 @@ enum ia_css_rx_irq_info { IA_CSS_RX_IRQ_INFO_EXIT_SLEEP_MODE = 1U << 2, /** exited sleep mode */ IA_CSS_RX_IRQ_INFO_ECC_CORRECTED = 1U << 3, /** ECC corrected */ IA_CSS_RX_IRQ_INFO_ERR_SOT = 1U << 4, - /** Start of transmission */ + /** Start of transmission */ IA_CSS_RX_IRQ_INFO_ERR_SOT_SYNC = 1U << 5, /** SOT sync (??) */ IA_CSS_RX_IRQ_INFO_ERR_CONTROL = 1U << 6, /** Control (??) */ IA_CSS_RX_IRQ_INFO_ERR_ECC_DOUBLE = 1U << 7, /** Double ECC */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c index 269392d4d5d4e..8d1356047448b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c @@ -79,7 +79,7 @@ mmgr_mmap(const void __user *ptr, const size_t size, struct hrt_userbuffer_attr *userbuffer_attr = context; return hrt_isp_css_mm_alloc_user_ptr( - size, ptr, userbuffer_attr->pgnr, - userbuffer_attr->type, - attribute & HRT_BUF_FLAG_CACHED); + size, ptr, userbuffer_attr->pgnr, + userbuffer_attr->type, + attribute & HRT_BUF_FLAG_CACHED); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h index 38305aa26b9b3..0212d71b3355e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h @@ -42,8 +42,8 @@ struct ia_css_metadata_info { struct ia_css_metadata { struct ia_css_metadata_info info; /** Layout info */ - ia_css_ptr address; /** CSS virtual address */ - u32 exp_id; + ia_css_ptr address; /** CSS virtual address */ + u32 exp_id; /** Exposure ID, see ia_css_event_public.h for more detail */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h index 367b2aafa5e83..c02138ee25117 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h @@ -39,7 +39,7 @@ */ enum ia_css_err ia_css_mipi_frame_specify(const unsigned int size_mem_words, - const bool contiguous); + const bool contiguous); #if !defined(HAS_NO_INPUT_SYSTEM) /* @brief Register size of a CSS MIPI frame for check during capturing. @@ -56,7 +56,7 @@ ia_css_mipi_frame_specify(const unsigned int size_mem_words, */ enum ia_css_err ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, - const unsigned int size_mem_words); + const unsigned int size_mem_words); #endif /* @brief Calculate the size of a mipi frame. @@ -73,10 +73,10 @@ ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, */ enum ia_css_err ia_css_mipi_frame_calculate_size(const unsigned int width, - const unsigned int height, - const enum atomisp_input_format format, - const bool hasSOLandEOL, - const unsigned int embedded_data_size_words, - unsigned int *size_mem_words); + const unsigned int height, + const enum atomisp_input_format format, + const bool hasSOLandEOL, + const unsigned int embedded_data_size_words, + unsigned int *size_mem_words); #endif /* __IA_CSS_MIPI_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h index f0963968f22ce..fed632cef5a96 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h @@ -187,7 +187,7 @@ void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map); enum ia_css_err sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, - struct ia_css_isp_parameters *params, - bool commit, struct ia_css_pipe *pipe); + struct ia_css_isp_parameters *params, + bool commit, struct ia_css_pipe *pipe); #endif /* __IA_CSS_PIPE_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h index 57542d451ec0a..4da21d87d0a64 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h @@ -296,7 +296,7 @@ ia_css_pipe_get_info(const struct ia_css_pipe *pipe, */ enum ia_css_err ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, - struct ia_css_isp_config *config); + struct ia_css_isp_config *config); /* @brief Controls when the Event generator raises an IRQ to the Host. * @@ -462,8 +462,8 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, */ enum ia_css_err ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, - u32 fw_handle, - bool enable); + u32 fw_handle, + bool enable); /* @brief Get the state (Enable or Disable) of the Extension stage in the * given pipe. @@ -488,8 +488,8 @@ ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, */ enum ia_css_err ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, - u32 fw_handle, - bool *enable); + u32 fw_handle, + bool *enable); #ifdef ISP2401 /* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. @@ -509,9 +509,10 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, * maintained on IPU3 or further.} */ enum ia_css_err -ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, uint32_t fw_handle, - struct ia_css_isp_param_css_segments *css_seg, - struct ia_css_isp_param_isp_segments *isp_seg); +ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, + uint32_t fw_handle, + struct ia_css_isp_param_css_segments *css_seg, + struct ia_css_isp_param_isp_segments *isp_seg); #endif /* @brief Get selected configuration settings @@ -521,7 +522,7 @@ ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, uint32_t fw_hand */ void ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, - struct ia_css_isp_config *config); + struct ia_css_isp_config *config); /* @brief Set the scaler lut on this pipe. A copy of lut is made in the inuit * address space. So the LUT can be freed by caller. @@ -541,7 +542,7 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, */ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, - const void *lut); + const void *lut); /* @brief Checking of DVS statistics ability * @param[in] pipe_info The pipe info. * @return true - has DVS statistics ability @@ -571,8 +572,8 @@ bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info); */ enum ia_css_err ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, - int output_pin, - enum ia_css_frame_format format); + int output_pin, + enum ia_css_frame_format format); #endif #endif /* __IA_CSS_PIPE_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h index fb6e8c2ca8bfb..59484d38409ff 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h @@ -67,7 +67,8 @@ unsigned int ia_css_stream_input_format_bits_per_pixel(struct ia_css_stream *stream); bool -sh_css_params_set_binning_factor(struct ia_css_stream *stream, unsigned int sensor_binning); +sh_css_params_set_binning_factor(struct ia_css_stream *stream, + unsigned int sensor_binning); void sh_css_invalidate_params(struct ia_css_stream *stream); @@ -92,14 +93,14 @@ ia_css_get_isp_dis_coefficients(struct ia_css_stream *stream, void ia_css_get_isp_dvs2_coefficients(struct ia_css_stream *stream, - short *hor_coefs_odd_real, - short *hor_coefs_odd_imag, - short *hor_coefs_even_real, - short *hor_coefs_even_imag, - short *ver_coefs_odd_real, - short *ver_coefs_odd_imag, - short *ver_coefs_even_real, - short *ver_coefs_even_imag); + short *hor_coefs_odd_real, + short *hor_coefs_odd_imag, + short *hor_coefs_even_real, + short *hor_coefs_even_imag, + short *ver_coefs_odd_real, + short *ver_coefs_odd_imag, + short *ver_coefs_even_real, + short *ver_coefs_even_imag); enum ia_css_err ia_css_stream_isp_parameters_init(struct ia_css_stream *stream); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h index f97b9eb2b19c2..4cd29833584f5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h @@ -23,7 +23,7 @@ #include "../../../include/linux/atomisp_platform.h" unsigned int ia_css_util_input_format_bpp( - enum atomisp_input_format format, - bool two_ppc); + enum atomisp_input_format format, + bool two_ppc); #endif /* __ATOMISP_INPUT_FORMAT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h index a5ec4e100cec0..ff8d95aa77e34 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h @@ -97,7 +97,8 @@ struct ia_css_stream_config { will arrive. Use this field to specify virtual channel id. Valid values are: 0, 1, 2, 3 */ - struct ia_css_stream_isys_stream_config isys_config[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; + struct ia_css_stream_isys_stream_config + isys_config[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; struct ia_css_stream_input_config input_config; #ifdef ISP2401 @@ -116,7 +117,7 @@ struct ia_css_stream_config { 1, 2 or 4. */ bool online; /** offline will activate RAW copy on SP, use this for continuous capture. */ - /* ISYS2401 usage: ISP receives data directly from sensor, no copy. */ + /* ISYS2401 usage: ISP receives data directly from sensor, no copy. */ unsigned int init_num_cont_raw_buf; /** initial number of raw buffers to allocate */ unsigned int target_num_cont_raw_buf; /** total number of raw buffers to @@ -127,8 +128,10 @@ struct ia_css_stream_config { bool disable_cont_viewfinder; /** disable continuous viewfinder for ZSL use case */ s32 flash_gpio_pin; /** pin on which the flash is connected, -1 for no flash */ int left_padding; /** The number of input-formatter left-paddings, -1 for default from binary.*/ - struct ia_css_mipi_buffer_config mipi_buffer_config; /** mipi buffer configuration */ - struct ia_css_metadata_config metadata_config; /** Metadata configuration. */ + struct ia_css_mipi_buffer_config + mipi_buffer_config; /** mipi buffer configuration */ + struct ia_css_metadata_config + metadata_config; /** Metadata configuration. */ bool ia_css_enable_raw_buffer_locking; /** Enable Raw Buffer Locking for HALv3 Support */ bool lock_all; /** Lock all RAW buffers (true) or lock only buffers processed by @@ -164,20 +167,20 @@ void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config); * create the internal structures and fill in the configuration data and pipes */ - /* @brief Creates a stream - * @param[in] stream_config The stream configuration. - * @param[in] num_pipes The number of pipes to incorporate in the stream. - * @param[in] pipes The pipes. - * @param[out] stream The stream. - * @return IA_CSS_SUCCESS or the error code. - * - * This function will create a stream with a given configuration and given pipes. - */ +/* @brief Creates a stream +* @param[in] stream_config The stream configuration. +* @param[in] num_pipes The number of pipes to incorporate in the stream. +* @param[in] pipes The pipes. +* @param[out] stream The stream. +* @return IA_CSS_SUCCESS or the error code. +* +* This function will create a stream with a given configuration and given pipes. +*/ enum ia_css_err ia_css_stream_create(const struct ia_css_stream_config *stream_config, - int num_pipes, - struct ia_css_pipe *pipes[], - struct ia_css_stream **stream); + int num_pipes, + struct ia_css_pipe *pipes[], + struct ia_css_stream **stream); /* @brief Destroys a stream * @param[in] stream The stream. @@ -277,7 +280,8 @@ ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream); * This function will Set the output frame stride (at the last pipe) */ enum ia_css_err -ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, unsigned int output_padded_width); +ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, + unsigned int output_padded_width); /* @brief Return max number of continuous RAW frames. * @param[in] stream The stream. @@ -288,7 +292,8 @@ ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, unsigned int * the system can support. */ enum ia_css_err -ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth); +ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, + int *buffer_depth); /* @brief Set nr of continuous RAW frames to use. * @@ -342,9 +347,9 @@ ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth); */ enum ia_css_err ia_css_stream_capture(struct ia_css_stream *stream, - int num_captures, - unsigned int skip, - int offset); + int num_captures, + unsigned int skip, + int offset); /* @brief Specify which raw frame to tag based on exp_id found in frame info * @@ -358,7 +363,7 @@ ia_css_stream_capture(struct ia_css_stream *stream, */ enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, - unsigned int exp_id); + unsigned int exp_id); /* ===== VIDEO ===== */ @@ -452,9 +457,9 @@ ia_css_stream_send_input_line(const struct ia_css_stream *stream, */ void ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, - enum atomisp_input_format format, - const unsigned short *data, - unsigned int width); + enum atomisp_input_format format, + const unsigned short *data, + unsigned int width); /* @brief End an input frame on the CSS input FIFO. * @@ -499,8 +504,8 @@ ia_css_stream_request_flash(struct ia_css_stream *stream); */ enum ia_css_err ia_css_stream_set_isp_config_on_pipe(struct ia_css_stream *stream, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe); + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe); /* @brief Configure a stream with filter coefficients. * @deprecated {Replaced by @@ -519,8 +524,8 @@ ia_css_stream_set_isp_config_on_pipe(struct ia_css_stream *stream, */ enum ia_css_err ia_css_stream_set_isp_config( - struct ia_css_stream *stream, - const struct ia_css_isp_config *config); + struct ia_css_stream *stream, + const struct ia_css_isp_config *config); /* @brief Get selected configuration settings * @param[in] stream The stream. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h index 4ec8614216006..82cbe9fca72ba 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h @@ -79,6 +79,6 @@ struct ia_css_time_meas { */ enum ia_css_err ia_css_timer_get_current_tick( - struct ia_css_clock_tick *curr_ts); + struct ia_css_clock_tick *curr_ts); #endif /* __IA_CSS_TIMER_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h index add400b910544..cb6a82392821d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h @@ -316,10 +316,10 @@ struct ia_css_shading_info { output_width = input_width * bayer_scale_hor_ratio_out / bayer_scale_hor_ratio_in */ #else - /** Horizontal ratio of bayer scaling between input width and output width, - for the scaling which should be done before shading correction. - output_width = input_width * bayer_scale_hor_ratio_out - / bayer_scale_hor_ratio_in + 0.5 */ + /** Horizontal ratio of bayer scaling between input width and output width, + for the scaling which should be done before shading correction. + output_width = input_width * bayer_scale_hor_ratio_out + / bayer_scale_hor_ratio_in + 0.5 */ #endif u32 bayer_scale_ver_ratio_in; u32 bayer_scale_ver_ratio_out; @@ -342,26 +342,26 @@ struct ia_css_shading_info { This corresponds to the top pixel of bayer inputted to isp from sensor. */ #else - /** Vertical ratio of bayer scaling between input height and output height, - for the scaling which should be done before shading correction. - output_height = input_height * bayer_scale_ver_ratio_out - / bayer_scale_ver_ratio_in + 0.5 */ + /** Vertical ratio of bayer scaling between input height and output height, + for the scaling which should be done before shading correction. + output_height = input_height * bayer_scale_ver_ratio_out + / bayer_scale_ver_ratio_in + 0.5 */ struct ia_css_resolution isp_input_sensor_data_res_bqs; - /** Sensor data size (in bqs) inputted to ISP. This is the size BEFORE bayer scaling. - NOTE: This is NOT the size of the physical sensor size. - CSS requests the driver that ISP inputs sensor data - by the size of isp_input_sensor_data_res_bqs. - The driver sends the sensor data to ISP, - after the adequate cropping/binning/scaling - are applied to the physical sensor data area. - ISP assumes the area of isp_input_sensor_data_res_bqs - is centered on the physical sensor. */ + /** Sensor data size (in bqs) inputted to ISP. This is the size BEFORE bayer scaling. + NOTE: This is NOT the size of the physical sensor size. + CSS requests the driver that ISP inputs sensor data + by the size of isp_input_sensor_data_res_bqs. + The driver sends the sensor data to ISP, + after the adequate cropping/binning/scaling + are applied to the physical sensor data area. + ISP assumes the area of isp_input_sensor_data_res_bqs + is centered on the physical sensor. */ struct ia_css_resolution sensor_data_res_bqs; - /** Sensor data size (in bqs) at shading correction. - This is the size AFTER bayer scaling. */ + /** Sensor data size (in bqs) at shading correction. + This is the size AFTER bayer scaling. */ struct ia_css_coordinate sensor_data_origin_bqs_on_sctbl; - /** Origin of sensor data area positioned on shading table at shading correction. - The coordinate x,y should be positive values. */ + /** Origin of sensor data area positioned on shading table at shading correction. + The coordinate x,y should be positive values. */ #endif } type_1; @@ -399,7 +399,7 @@ struct ia_css_grid_info { struct ia_css_3a_grid_info s3a_grid; /** 3A grid info */ union ia_css_dvs_grid_u dvs_grid; - /** All types of DVS statistics grid info union */ + /** All types of DVS statistics grid info union */ enum ia_css_vamem_type vamem_type; }; @@ -530,7 +530,8 @@ struct ia_css_isp_config { [YNR2&YEE2, 2only] */ struct ia_css_fc_config *fc_config; /** Fringe Control [FC2, 2only] */ - struct ia_css_formats_config *formats_config; /** Formats Control for main output + struct ia_css_formats_config + *formats_config; /** Formats Control for main output [FORMATS, 1&2] */ struct ia_css_cnr_config *cnr_config; /** Chroma Noise Reduction [CNR2, 2only] */ @@ -598,17 +599,23 @@ struct ia_css_isp_config { * DVS, GDC) from IQ tool level and application level down-to ISP FW level. * the risk for regression is not in the individual blocks, but how they * integrate together. */ - struct ia_css_output_config *output_config; /** Main Output Mirroring, flipping */ + struct ia_css_output_config + *output_config; /** Main Output Mirroring, flipping */ #ifdef ISP2401 - struct ia_css_tnr3_kernel_config *tnr3_config; /** TNR3 config */ + struct ia_css_tnr3_kernel_config + *tnr3_config; /** TNR3 config */ #endif - struct ia_css_scaler_config *scaler_config; /** Skylake: scaler config (optional) */ - struct ia_css_formats_config *formats_config_display;/** Formats control for viewfinder/display output (optional) + struct ia_css_scaler_config + *scaler_config; /** Skylake: scaler config (optional) */ + struct ia_css_formats_config + *formats_config_display;/** Formats control for viewfinder/display output (optional) [OSYS, n/a] */ - struct ia_css_output_config *output_config_display; /** Viewfinder/display output mirroring, flipping (optional) */ + struct ia_css_output_config + *output_config_display; /** Viewfinder/display output mirroring, flipping (optional) */ - struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ + struct ia_css_frame + *output_frame; /** Output frame the config is to be applied to (optional) */ u32 isp_config_id; /** Unique ID to track which config was actually applied to a particular frame */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c index c5fb1e08f3b4e..c190483dc2b38 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c @@ -20,18 +20,20 @@ const struct ia_css_anr_config default_anr_config = { 10, - { 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, - 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, - 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, - 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4}, + { + 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, + 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, + 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4, + 0, 3, 1, 2, 3, 6, 4, 5, 1, 4, 2, 3, 2, 5, 3, 4 + }, {10, 20, 30} }; void ia_css_anr_encode( - struct sh_css_isp_anr_params *to, - const struct ia_css_anr_config *from, - unsigned int size) + struct sh_css_isp_anr_params *to, + const struct ia_css_anr_config *from, + unsigned int size) { (void)size; to->threshold = from->threshold; @@ -39,21 +41,21 @@ ia_css_anr_encode( void ia_css_anr_dump( - const struct sh_css_isp_anr_params *anr, - unsigned int level) + const struct sh_css_isp_anr_params *anr, + unsigned int level) { if (!anr) return; ia_css_debug_dtrace(level, "Advance Noise Reduction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "anr_threshold", anr->threshold); + "anr_threshold", anr->threshold); } void ia_css_anr_debug_dtrace( - const struct ia_css_anr_config *config, - unsigned int level) + const struct ia_css_anr_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.threshold=%d\n", - config->threshold); + "config.threshold=%d\n", + config->threshold); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h index 1f045a0ca8df9..3855f54765e31 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h @@ -22,18 +22,18 @@ extern const struct ia_css_anr_config default_anr_config; void ia_css_anr_encode( - struct sh_css_isp_anr_params *to, - const struct ia_css_anr_config *from, - unsigned int size); + struct sh_css_isp_anr_params *to, + const struct ia_css_anr_config *from, + unsigned int size); void ia_css_anr_dump( - const struct sh_css_isp_anr_params *anr, - unsigned int level); + const struct sh_css_isp_anr_params *anr, + unsigned int level); void ia_css_anr_debug_dtrace( - const struct ia_css_anr_config *config, unsigned int level) + const struct ia_css_anr_config *config, unsigned int level) ; #endif /* __IA_CSS_ANR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c index 5db6f1afff68e..feee073b50999 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c @@ -20,9 +20,9 @@ void ia_css_anr2_vmem_encode( - struct ia_css_isp_anr2_params *to, - const struct ia_css_anr_thres *from, - size_t size) + struct ia_css_isp_anr2_params *to, + const struct ia_css_anr_thres *from, + size_t size) { unsigned int i; @@ -38,8 +38,8 @@ ia_css_anr2_vmem_encode( void ia_css_anr2_debug_dtrace( - const struct ia_css_anr_thres *config, - unsigned int level) + const struct ia_css_anr_thres *config, + unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h index 96a063ffdc16e..e681801e8f0f1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h @@ -23,13 +23,13 @@ void ia_css_anr2_vmem_encode( - struct ia_css_isp_anr2_params *to, - const struct ia_css_anr_thres *from, - size_t size); + struct ia_css_isp_anr2_params *to, + const struct ia_css_anr_thres *from, + size_t size); void ia_css_anr2_debug_dtrace( - const struct ia_css_anr_thres *config, unsigned int level) + const struct ia_css_anr_thres *config, unsigned int level) ; #endif /* __IA_CSS_ANR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c index 9cbeeef7417b8..070e90e3e2b53 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c @@ -18,34 +18,38 @@ #if 1 const struct ia_css_anr_thres default_anr_thres = { -{128, 384, 640, 896, 896, 640, 384, 128, 384, 1152, 1920, 2688, 2688, 1920, 1152, 384, 640, 1920, 3200, 4480, 4480, 3200, 1920, 640, 896, 2688, 4480, 6272, 6272, 4480, 2688, 896, 896, 2688, 4480, 6272, 6272, 4480, 2688, 896, 640, 1920, 3200, 4480, 4480, 3200, 1920, 640, 384, 1152, 1920, 2688, 2688, 1920, 1152, 384, 128, 384, 640, 896, 896, 640, 384, 128, -0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, -0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, -0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, -30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, -60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, -90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, -10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, -20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, -30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, -20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, -40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, -60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120} + { + 128, 384, 640, 896, 896, 640, 384, 128, 384, 1152, 1920, 2688, 2688, 1920, 1152, 384, 640, 1920, 3200, 4480, 4480, 3200, 1920, 640, 896, 2688, 4480, 6272, 6272, 4480, 2688, 896, 896, 2688, 4480, 6272, 6272, 4480, 2688, 896, 640, 1920, 3200, 4480, 4480, 3200, 1920, 640, 384, 1152, 1920, 2688, 2688, 1920, 1152, 384, 128, 384, 640, 896, 896, 640, 384, 128, + 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, 0, 0, 30, 30, 10, 10, 20, 20, + 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, 0, 0, 60, 60, 20, 20, 40, 40, + 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, 0, 0, 90, 90, 30, 30, 60, 60, + 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, 30, 30, 60, 60, 40, 40, 50, 50, + 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, 60, 60, 120, 120, 80, 80, 100, 100, + 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, 90, 90, 180, 180, 120, 120, 150, 150, + 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, 10, 10, 40, 40, 20, 20, 30, 30, + 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, 20, 20, 80, 80, 40, 40, 60, 60, + 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, 30, 30, 120, 120, 60, 60, 90, 90, + 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, 20, 20, 50, 50, 30, 30, 40, 40, + 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, 40, 40, 100, 100, 60, 60, 80, 80, + 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120, 60, 60, 150, 150, 90, 90, 120, 120 + } }; #else const struct ia_css_anr_thres default_anr_thres = { -{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + } }; #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h index 629c9ae6ad234..47a0fb08cfcc5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h @@ -21,7 +21,7 @@ /* Advanced Noise Reduction (ANR) thresholds */ struct ia_css_isp_anr2_params { - VMEM_ARRAY(data, ANR_PARAM_SIZE * ISP_VEC_NELEMS); + VMEM_ARRAY(data, ANR_PARAM_SIZE *ISP_VEC_NELEMS); }; #endif /* __IA_CSS_ANR2_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c index 0e8dd4eebc3b8..6c7aa51ec079d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c @@ -24,8 +24,8 @@ void ia_css_bh_hmem_decode( - struct ia_css_3a_rgby_output *out_ptr, - const struct ia_css_bh_table *hmem_buf) + struct ia_css_3a_rgby_output *out_ptr, + const struct ia_css_bh_table *hmem_buf) { int i; @@ -49,9 +49,9 @@ ia_css_bh_hmem_decode( void ia_css_bh_encode( - struct sh_css_isp_bh_params *to, - const struct ia_css_3a_config *from, - unsigned int size) + struct sh_css_isp_bh_params *to, + const struct ia_css_3a_config *from, + unsigned int size) { (void)size; /* coefficients to calculate Y */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h index 2a4c6c4a75463..ccd83169fe224 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h @@ -20,13 +20,13 @@ void ia_css_bh_hmem_decode( - struct ia_css_3a_rgby_output *out_ptr, - const struct ia_css_bh_table *hmem_buf); + struct ia_css_3a_rgby_output *out_ptr, + const struct ia_css_bh_table *hmem_buf); void ia_css_bh_encode( - struct sh_css_isp_bh_params *to, - const struct ia_css_3a_config *from, - unsigned int size); + struct sh_css_isp_bh_params *to, + const struct ia_css_3a_config *from, + unsigned int size); #endif /* __IA_CSS_BH_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c index 03da019346fc1..6888a7363710f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c @@ -27,7 +27,7 @@ static const s32 div_lut_nearests[BNLM_DIV_LUT_SIZE] = { static const s32 div_lut_slopes[BNLM_DIV_LUT_SIZE] = { -7760, -6960, -6216, -5536, -4912, -4344, -3832, -3360, -2936, -2552, -2208, -2208 -}; + }; static const s32 div_lut_intercepts[BNLM_DIV_LUT_SIZE] = { 8184, 7752, 7336, 6928, 6536, 6152, 5776, 5416, 5064, 4728, 4408, 4408 @@ -41,7 +41,8 @@ static const s32 div_lut_intercepts[BNLM_DIV_LUT_SIZE] = { * lut_size: Size of lut_val array */ static inline void -bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr, const int32_t *lut_val, const uint32_t lut_size) +bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr, + const int32_t *lut_val, const uint32_t lut_size) { u32 blk, i; const u32 block_size = 16; @@ -94,19 +95,24 @@ bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr, const int32_t *lut */ void ia_css_bnlm_vmem_encode( - struct bnlm_vmem_params *to, - const struct ia_css_bnlm_config *from, - size_t size) + struct bnlm_vmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size) { int i; (void)size; /* Initialize LUTs in VMEM parameters */ - bnlm_lut_encode(&to->mu_root_lut, from->mu_root_lut_thr, from->mu_root_lut_val, 16); - bnlm_lut_encode(&to->sad_norm_lut, from->sad_norm_lut_thr, from->sad_norm_lut_val, 16); - bnlm_lut_encode(&to->sig_detail_lut, from->sig_detail_lut_thr, from->sig_detail_lut_val, 16); - bnlm_lut_encode(&to->sig_rad_lut, from->sig_rad_lut_thr, from->sig_rad_lut_val, 16); - bnlm_lut_encode(&to->rad_pow_lut, from->rad_pow_lut_thr, from->rad_pow_lut_val, 16); + bnlm_lut_encode(&to->mu_root_lut, from->mu_root_lut_thr, from->mu_root_lut_val, + 16); + bnlm_lut_encode(&to->sad_norm_lut, from->sad_norm_lut_thr, + from->sad_norm_lut_val, 16); + bnlm_lut_encode(&to->sig_detail_lut, from->sig_detail_lut_thr, + from->sig_detail_lut_val, 16); + bnlm_lut_encode(&to->sig_rad_lut, from->sig_rad_lut_thr, from->sig_rad_lut_val, + 16); + bnlm_lut_encode(&to->rad_pow_lut, from->rad_pow_lut_thr, from->rad_pow_lut_val, + 16); bnlm_lut_encode(&to->nl_0_lut, from->nl_0_lut_thr, from->nl_0_lut_val, 16); bnlm_lut_encode(&to->nl_1_lut, from->nl_1_lut_thr, from->nl_1_lut_val, 16); bnlm_lut_encode(&to->nl_2_lut, from->nl_2_lut_thr, from->nl_2_lut_val, 16); @@ -124,7 +130,8 @@ ia_css_bnlm_vmem_encode( to->match_quality_max_idx[0][2] = from->match_quality_max_idx[2]; to->match_quality_max_idx[0][3] = from->match_quality_max_idx[3]; - bnlm_lut_encode(&to->div_lut, div_lut_nearests, div_lut_slopes, BNLM_DIV_LUT_SIZE); + bnlm_lut_encode(&to->div_lut, div_lut_nearests, div_lut_slopes, + BNLM_DIV_LUT_SIZE); memset(to->div_lut_intercepts, 0, sizeof(to->div_lut_intercepts)); for (i = 0; i < BNLM_DIV_LUT_SIZE; i++) { to->div_lut_intercepts[0][i] = div_lut_intercepts[i]; @@ -139,9 +146,9 @@ ia_css_bnlm_vmem_encode( /* - Encodes BNLM public parameters into DMEM parameters */ void ia_css_bnlm_encode( - struct bnlm_dmem_params *to, - const struct ia_css_bnlm_config *from, - size_t size) + struct bnlm_dmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size) { (void)size; to->rad_enable = from->rad_enable; @@ -159,8 +166,8 @@ ia_css_bnlm_encode( /* Prints debug traces for BNLM public parameters */ void ia_css_bnlm_debug_trace( - const struct ia_css_bnlm_config *config, - unsigned int level) + const struct ia_css_bnlm_config *config, + unsigned int level) { if (!config) return; @@ -168,15 +175,21 @@ ia_css_bnlm_debug_trace( #ifndef IA_CSS_NO_DEBUG ia_css_debug_dtrace(level, "BNLM:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_enable", config->rad_enable); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_x_origin", config->rad_x_origin); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_y_origin", config->rad_y_origin); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_x_origin", + config->rad_x_origin); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rad_y_origin", + config->rad_y_origin); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "avg_min_th", config->avg_min_th); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "max_min_th", config->max_min_th); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_a", config->exp_coeff_a); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_b", config->exp_coeff_b); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_c", config->exp_coeff_c); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_exponent", config->exp_exponent); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_a", + config->exp_coeff_a); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_b", + config->exp_coeff_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_coeff_c", + config->exp_coeff_c); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "exp_exponent", + config->exp_exponent); /* ToDo: print traces for LUTs */ #endif /* IA_CSS_NO_DEBUG */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h index 7f888afeb65ac..a57933bfb974d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h @@ -20,21 +20,21 @@ void ia_css_bnlm_vmem_encode( - struct bnlm_vmem_params *to, - const struct ia_css_bnlm_config *from, - size_t size); + struct bnlm_vmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size); void ia_css_bnlm_encode( - struct bnlm_dmem_params *to, - const struct ia_css_bnlm_config *from, - size_t size); + struct bnlm_dmem_params *to, + const struct ia_css_bnlm_config *from, + size_t size); #ifndef IA_CSS_NO_DEBUG void ia_css_bnlm_debug_trace( - const struct ia_css_bnlm_config *config, - unsigned int level); + const struct ia_css_bnlm_config *config, + unsigned int level); #endif #endif /* __IA_CSS_BNLM_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c index 42c6e5fa5a1eb..a5e20596539d6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c @@ -48,9 +48,9 @@ const struct ia_css_bnr2_2_config default_bnr2_2_config = { void ia_css_bnr2_2_encode( - struct sh_css_isp_bnr2_2_params *to, - const struct ia_css_bnr2_2_config *from, - size_t size) + struct sh_css_isp_bnr2_2_params *to, + const struct ia_css_bnr2_2_config *from, + size_t size) { (void)size; to->d_var_gain_r = from->d_var_gain_r; @@ -85,8 +85,8 @@ ia_css_bnr2_2_encode( #ifndef IA_CSS_NO_DEBUG void ia_css_bnr2_2_debug_dtrace( - const struct ia_css_bnr2_2_config *bnr, - unsigned int level) + const struct ia_css_bnr2_2_config *bnr, + unsigned int level) { if (!bnr) return; @@ -95,24 +95,33 @@ ia_css_bnr2_2_debug_dtrace( ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_r", bnr->d_var_gain_r); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_g", bnr->d_var_gain_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_b", bnr->d_var_gain_b); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_r", bnr->d_var_gain_slope_r); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_g", bnr->d_var_gain_slope_g); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_b", bnr->d_var_gain_slope_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_r", + bnr->d_var_gain_slope_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_g", + bnr->d_var_gain_slope_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_gain_slope_b", + bnr->d_var_gain_slope_b); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_r", bnr->n_var_gain_r); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_g", bnr->n_var_gain_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_b", bnr->n_var_gain_b); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_r", bnr->n_var_gain_slope_r); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_g", bnr->n_var_gain_slope_g); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_b", bnr->n_var_gain_slope_b); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_r", + bnr->n_var_gain_slope_r); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_g", + bnr->n_var_gain_slope_g); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "n_var_gain_slope_b", + bnr->n_var_gain_slope_b); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dir_thres", bnr->dir_thres); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dir_thres_w", bnr->dir_thres_w); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "var_offset_coef", bnr->var_offset_coef); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "var_offset_coef", + bnr->var_offset_coef); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dir_gain", bnr->dir_gain); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_gain", bnr->detail_gain); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_gain_divisor", bnr->detail_gain_divisor); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_level_offset", bnr->detail_level_offset); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_gain_divisor", + bnr->detail_gain_divisor); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "detail_level_offset", + bnr->detail_level_offset); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_th_min", bnr->d_var_th_min); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "d_var_th_max", bnr->d_var_th_max); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h index ab1106fd24d6c..a021733dcdf72 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h @@ -21,15 +21,15 @@ extern const struct ia_css_bnr2_2_config default_bnr2_2_config; void ia_css_bnr2_2_encode( - struct sh_css_isp_bnr2_2_params *to, - const struct ia_css_bnr2_2_config *from, - size_t size); + struct sh_css_isp_bnr2_2_params *to, + const struct ia_css_bnr2_2_config *from, + size_t size); #ifndef IA_CSS_NO_DEBUG void ia_css_bnr2_2_debug_dtrace( - const struct ia_css_bnr2_2_config *config, - unsigned int level); + const struct ia_css_bnr2_2_config *config, + unsigned int level); #endif #endif /* __IA_CSS_BNR2_2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c index 62489df37701d..5efb0ce7f3231 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c @@ -21,9 +21,9 @@ void ia_css_bnr_encode( - struct sh_css_isp_bnr_params *to, - const struct ia_css_nr_config *from, - unsigned int size) + struct sh_css_isp_bnr_params *to, + const struct ia_css_nr_config *from, + unsigned int size) { (void)size; /* BNR (Bayer Noise Reduction) */ @@ -41,24 +41,24 @@ ia_css_bnr_encode( void ia_css_bnr_dump( - const struct sh_css_isp_bnr_params *bnr, - unsigned int level) + const struct sh_css_isp_bnr_params *bnr, + unsigned int level) { if (!bnr) return; ia_css_debug_dtrace(level, "Bayer Noise Reduction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "bnr_gain_all", bnr->gain_all); + "bnr_gain_all", bnr->gain_all); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "bnr_gain_dir", bnr->gain_dir); + "bnr_gain_dir", bnr->gain_dir); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "bnr_threshold_low", - bnr->threshold_low); + "bnr_threshold_low", + bnr->threshold_low); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "bnr_threshold_width_log2", - bnr->threshold_width_log2); + "bnr_threshold_width_log2", + bnr->threshold_width_log2); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "bnr_threshold_width", - bnr->threshold_width); + "bnr_threshold_width", + bnr->threshold_width); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "bnr_clip", bnr->clip); + "bnr_clip", bnr->clip); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h index aa3493c39b749..4c29b47b8177d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h @@ -22,13 +22,13 @@ void ia_css_bnr_encode( - struct sh_css_isp_bnr_params *to, - const struct ia_css_nr_config *from, - unsigned int size); + struct sh_css_isp_bnr_params *to, + const struct ia_css_nr_config *from, + unsigned int size); void ia_css_bnr_dump( - const struct sh_css_isp_bnr_params *bnr, - unsigned int level); + const struct sh_css_isp_bnr_params *bnr, + unsigned int level); #endif /* __IA_CSS_DP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c index a07b68c92cd34..c50afa6bf8a67 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c @@ -21,8 +21,8 @@ /* keep the interface here, it is not enabled yet because host doesn't know the size of individual state */ void ia_css_init_cnr_state( - void/*struct sh_css_isp_cnr_vmem_state*/ * state, - size_t size) + void/*struct sh_css_isp_cnr_vmem_state*/ * state, + size_t size) { memset(state, 0, size); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h index 8430f1b640545..87250ca5842c9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h @@ -19,7 +19,7 @@ void ia_css_init_cnr_state( - void/*struct sh_css_isp_cnr_vmem_state*/ * state, - size_t size); + void/*struct sh_css_isp_cnr_vmem_state*/ * state, + size_t size); #endif /* __IA_CSS_CNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c index 899f6b2749943..610871d213bb1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c @@ -31,9 +31,9 @@ const struct ia_css_cnr_config default_cnr_config = { void ia_css_cnr_encode( - struct sh_css_isp_cnr_params *to, - const struct ia_css_cnr_config *from, - unsigned int size) + struct sh_css_isp_cnr_params *to, + const struct ia_css_cnr_config *from, + unsigned int size) { (void)size; to->coring_u = from->coring_u; @@ -48,26 +48,26 @@ ia_css_cnr_encode( void ia_css_cnr_dump( - const struct sh_css_isp_cnr_params *cnr, - unsigned int level); + const struct sh_css_isp_cnr_params *cnr, + unsigned int level); void ia_css_cnr_debug_dtrace( - const struct ia_css_cnr_config *config, - unsigned int level) + const struct ia_css_cnr_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.coring_u=%d, config.coring_v=%d, config.sense_gain_vy=%d, config.sense_gain_hy=%d, config.sense_gain_vu=%d, config.sense_gain_hu=%d, config.sense_gain_vv=%d, config.sense_gain_hv=%d\n", - config->coring_u, config->coring_v, - config->sense_gain_vy, config->sense_gain_hy, - config->sense_gain_vu, config->sense_gain_hu, - config->sense_gain_vv, config->sense_gain_hv); + "config.coring_u=%d, config.coring_v=%d, config.sense_gain_vy=%d, config.sense_gain_hy=%d, config.sense_gain_vu=%d, config.sense_gain_hu=%d, config.sense_gain_vv=%d, config.sense_gain_hv=%d\n", + config->coring_u, config->coring_v, + config->sense_gain_vy, config->sense_gain_hy, + config->sense_gain_vu, config->sense_gain_hu, + config->sense_gain_vv, config->sense_gain_hv); } void ia_css_init_cnr2_state( - void/*struct sh_css_isp_cnr_vmem_state*/ * state, - size_t size) + void/*struct sh_css_isp_cnr_vmem_state*/ * state, + size_t size) { memset(state, 0, size); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h index 902b850cebf50..d322359feedf7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h @@ -22,22 +22,22 @@ extern const struct ia_css_cnr_config default_cnr_config; void ia_css_cnr_encode( - struct sh_css_isp_cnr_params *to, - const struct ia_css_cnr_config *from, - unsigned int size); + struct sh_css_isp_cnr_params *to, + const struct ia_css_cnr_config *from, + unsigned int size); void ia_css_cnr_dump( - const struct sh_css_isp_cnr_params *cnr, - unsigned int level); + const struct sh_css_isp_cnr_params *cnr, + unsigned int level); void ia_css_cnr_debug_dtrace( - const struct ia_css_cnr_config *config, - unsigned int level); + const struct ia_css_cnr_config *config, + unsigned int level); void ia_css_init_cnr2_state( - void/*struct sh_css_isp_cnr_vmem_state*/ * state, - size_t size); + void/*struct sh_css_isp_cnr_vmem_state*/ * state, + size_t size); #endif /* __IA_CSS_CNR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c index d7c814d3c4102..e64e26089a4d2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c @@ -24,9 +24,9 @@ const struct ia_css_conversion_config default_conversion_config = { void ia_css_conversion_encode( - struct sh_css_isp_conversion_params *to, - const struct ia_css_conversion_config *from, - unsigned int size) + struct sh_css_isp_conversion_params *to, + const struct ia_css_conversion_config *from, + unsigned int size) { (void)size; to->en = from->en; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h index 6f798811c9ab8..59db91464da27 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h @@ -22,9 +22,9 @@ extern const struct ia_css_conversion_config default_conversion_config; void ia_css_conversion_encode( - struct sh_css_isp_conversion_params *to, - const struct ia_css_conversion_config *from, - unsigned int size); + struct sh_css_isp_conversion_params *to, + const struct ia_css_conversion_config *from, + unsigned int size); #ifdef ISP2401 /* workaround until code generation in isp_kernelparameters.host.c is fixed */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c index 18e40c37510b3..6e29b7eeb3edd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c @@ -25,9 +25,9 @@ static const struct ia_css_copy_output_configuration default_config = { void ia_css_copy_output_config( - struct sh_css_isp_copy_output_isp_config *to, - const struct ia_css_copy_output_configuration *from, - unsigned int size) + struct sh_css_isp_copy_output_isp_config *to, + const struct ia_css_copy_output_configuration *from, + unsigned int size) { (void)size; to->enable = from->enable; @@ -35,8 +35,8 @@ ia_css_copy_output_config( void ia_css_copy_output_configure( - const struct ia_css_binary *binary, - bool enable) + const struct ia_css_binary *binary, + bool enable) { struct ia_css_copy_output_configuration config = default_config; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h index 0e12d80df9d76..6f42abdec9bbb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h @@ -22,13 +22,13 @@ void ia_css_copy_output_config( - struct sh_css_isp_copy_output_isp_config *to, - const struct ia_css_copy_output_configuration *from, - unsigned int size); + struct sh_css_isp_copy_output_isp_config *to, + const struct ia_css_copy_output_configuration *from, + unsigned int size); void ia_css_copy_output_configure( - const struct ia_css_binary *binary, - bool enable); + const struct ia_css_binary *binary, + bool enable); #endif /* __IA_CSS_COPY_OUTPUT_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c index 4f541971a1fdb..c6a3bd4fbf80f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c @@ -27,9 +27,9 @@ static const struct ia_css_crop_configuration default_config = { void ia_css_crop_encode( - struct sh_css_isp_crop_isp_params *to, - const struct ia_css_crop_config *from, - unsigned int size) + struct sh_css_isp_crop_isp_params *to, + const struct ia_css_crop_config *from, + unsigned int size) { (void)size; to->crop_pos = from->crop_pos; @@ -37,9 +37,9 @@ ia_css_crop_encode( void ia_css_crop_config( - struct sh_css_isp_crop_isp_config *to, - const struct ia_css_crop_configuration *from, - unsigned int size) + struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; @@ -53,8 +53,8 @@ ia_css_crop_config( void ia_css_crop_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_crop_configuration config = default_config; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h index 5d2bf405946c5..2e451a872d2af 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h @@ -23,19 +23,19 @@ void ia_css_crop_encode( - struct sh_css_isp_crop_isp_params *to, - const struct ia_css_crop_config *from, - unsigned int size); + struct sh_css_isp_crop_isp_params *to, + const struct ia_css_crop_config *from, + unsigned int size); void ia_css_crop_config( - struct sh_css_isp_crop_isp_config *to, - const struct ia_css_crop_configuration *from, - unsigned int size); + struct sh_css_isp_crop_isp_config *to, + const struct ia_css_crop_configuration *from, + unsigned int size); void ia_css_crop_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_CROP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c index 732ca773722c1..ea81e1d3e4452 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c @@ -28,9 +28,9 @@ const struct ia_css_cc_config default_cc_config = { void ia_css_encode_cc( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size) + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size) { (void)size; #ifndef IA_CSS_NO_DEBUG @@ -55,9 +55,9 @@ ia_css_encode_cc( void ia_css_csc_encode( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size) + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size) { ia_css_encode_cc(to, from, size); } @@ -65,63 +65,63 @@ ia_css_csc_encode( #ifndef IA_CSS_NO_DEBUG void ia_css_cc_dump( - const struct sh_css_isp_csc_params *csc, - unsigned int level, - const char *name) + const struct sh_css_isp_csc_params *csc, + unsigned int level, + const char *name) { if (!csc) return; ia_css_debug_dtrace(level, "%s\n", name); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m_shift", - csc->m_shift); + "m_shift", + csc->m_shift); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m00", - csc->m00); + "m00", + csc->m00); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m01", - csc->m01); + "m01", + csc->m01); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m02", - csc->m02); + "m02", + csc->m02); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m10", - csc->m10); + "m10", + csc->m10); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m11", - csc->m11); + "m11", + csc->m11); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m12", - csc->m12); + "m12", + csc->m12); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m20", - csc->m20); + "m20", + csc->m20); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m21", - csc->m21); + "m21", + csc->m21); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "m22", - csc->m22); + "m22", + csc->m22); } void ia_css_csc_dump( - const struct sh_css_isp_csc_params *csc, - unsigned int level) + const struct sh_css_isp_csc_params *csc, + unsigned int level) { ia_css_cc_dump(csc, level, "Color Space Conversion"); } void ia_css_cc_config_debug_dtrace( - const struct ia_css_cc_config *config, - unsigned int level) + const struct ia_css_cc_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.m[0]=%d, config.m[1]=%d, config.m[2]=%d, config.m[3]=%d, config.m[4]=%d, config.m[5]=%d, config.m[6]=%d, config.m[7]=%d, config.m[8]=%d\n", - config->matrix[0], - config->matrix[1], config->matrix[2], - config->matrix[3], config->matrix[4], - config->matrix[5], config->matrix[6], - config->matrix[7], config->matrix[8]); + "config.m[0]=%d, config.m[1]=%d, config.m[2]=%d, config.m[3]=%d, config.m[4]=%d, config.m[5]=%d, config.m[6]=%d, config.m[7]=%d, config.m[8]=%d\n", + config->matrix[0], + config->matrix[1], config->matrix[2], + config->matrix[3], config->matrix[4], + config->matrix[5], config->matrix[6], + config->matrix[7], config->matrix[8]); } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h index 2c9fec710d12b..347ccd8645774 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h @@ -22,31 +22,31 @@ extern const struct ia_css_cc_config default_cc_config; void ia_css_encode_cc( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size); + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size); void ia_css_csc_encode( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size); + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_cc_dump( - const struct sh_css_isp_csc_params *csc, unsigned int level, - const char *name); + const struct sh_css_isp_csc_params *csc, unsigned int level, + const char *name); void ia_css_csc_dump( - const struct sh_css_isp_csc_params *csc, - unsigned int level); + const struct sh_css_isp_csc_params *csc, + unsigned int level); void ia_css_cc_config_debug_dtrace( - const struct ia_css_cc_config *config, - unsigned int level); + const struct ia_css_cc_config *config, + unsigned int level); #define ia_css_csc_debug_dtrace ia_css_cc_config_debug_dtrace #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c index 7558d80c0ff4b..e80f42ab0e6ae 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c @@ -21,8 +21,8 @@ #include "ia_css_ctc1_5.host.h" static void ctc_gradient( - int *dydx, int *shift, - int y1, int y0, int x1, int x0) + int *dydx, int *shift, + int y1, int y0, int x1, int x0) { int frc_bits = max(IA_CSS_CTC_COEF_SHIFT, 16); int dy = y1 - y0; @@ -34,7 +34,8 @@ static void ctc_gradient( int max_dydx = (1 << IA_CSS_CTC_COEF_SHIFT) - 1; if (dx == 0) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ctc_gradient() error, illegal division operation\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ctc_gradient() error, illegal division operation\n"); return; } else { dydx_int = dy / dx; @@ -55,7 +56,7 @@ static void ctc_gradient( <= ((1 << IA_CSS_CTC_COEF_SHIFT) - 1) */ for (sft = 0; sft <= IA_CSS_CTC_COEF_SHIFT; sft++) { int tmp_dydx = (dydx_int << sft) - + (dydx_frc >> (frc_bits - sft)); + + (dydx_frc >> (frc_bits - sft)); if (tmp_dydx <= max_dydx) { *dydx = tmp_dydx; *shift = sft; @@ -69,9 +70,9 @@ static void ctc_gradient( void ia_css_ctc_encode( - struct sh_css_isp_ctc_params *to, - const struct ia_css_ctc_config *from, - unsigned int size) + struct sh_css_isp_ctc_params *to, + const struct ia_css_ctc_config *from, + unsigned int size) { (void)size; to->y0 = from->y0; @@ -116,5 +117,5 @@ ia_css_ctc_encode( void ia_css_ctc_dump( - const struct sh_css_isp_ctc_params *ctc, - unsigned int level); + const struct sh_css_isp_ctc_params *ctc, + unsigned int level); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h index c5b28151529f6..f3c40a49f7c00 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h @@ -21,13 +21,13 @@ void ia_css_ctc_encode( - struct sh_css_isp_ctc_params *to, - const struct ia_css_ctc_config *from, - unsigned int size); + struct sh_css_isp_ctc_params *to, + const struct ia_css_ctc_config *from, + unsigned int size); void ia_css_ctc_dump( - const struct sh_css_isp_ctc_params *ctc, - unsigned int level); + const struct sh_css_isp_ctc_params *ctc, + unsigned int level); #endif /* __IA_CSS_CTC1_5_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c index 9a447f14b869a..b247dc6bec6a7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c @@ -27,7 +27,8 @@ const struct ia_css_ctc2_config default_ctc2_config = { INEFFECTIVE_VAL, INEFFECTIVE_VAL, INEFFECTIVE_VAL, BASIC_VAL * 2, BASIC_VAL * 4, BASIC_VAL * 6, BASIC_VAL * 8, INEFFECTIVE_VAL, INEFFECTIVE_VAL, - BASIC_VAL >> 1, BASIC_VAL}; + BASIC_VAL >> 1, BASIC_VAL +}; /* (dydx) = ctc2_slope(y1, y0, x1, x0) * ----------------------------------------------- @@ -89,15 +90,15 @@ void ia_css_ctc2_vmem_encode(struct ia_css_isp_ctc2_vmem_params *to, * 0.0 -> y_x1 -> y_x2 -> y _x3 -> y_x4 -> 1.0 */ dydx0 = ctc2_slope(from->y_y1, from->y_y0, - from->y_x1, 0); + from->y_x1, 0); dydx1 = ctc2_slope(from->y_y2, from->y_y1, - from->y_x2, from->y_x1); + from->y_x2, from->y_x1); dydx2 = ctc2_slope(from->y_y3, from->y_y2, - from->y_x3, from->y_x2); + from->y_x3, from->y_x2); dydx3 = ctc2_slope(from->y_y4, from->y_y3, - from->y_x4, from->y_x3); + from->y_x4, from->y_x3); dydx4 = ctc2_slope(from->y_y5, from->y_y4, - SH_CSS_BAYER_MAXVAL, from->y_x4); + SH_CSS_BAYER_MAXVAL, from->y_x4); /*Fill 3 arrays with: * - Luma input gain values y_y0, y_y1, y_y2, y_3, y_y4 @@ -152,5 +153,5 @@ void ia_css_ctc2_encode(struct ia_css_isp_ctc2_dmem_params *to, /*Slope Calculation*/ to->uv_dydx = ctc2_slope(from->uv_y1, from->uv_y0, - from->uv_x1, from->uv_x0); + from->uv_x1, from->uv_x0); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h index be9cd8c9c4705..9d5dadf70f1ae 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h @@ -49,6 +49,6 @@ struct ia_css_ctc2_config { */ s32 uv_x0; s32 uv_x1; - }; +}; #endif /* __IA_CSS_CTC2_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c index 580b5a84f9333..26311b0a23f99 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c @@ -35,9 +35,9 @@ const struct ia_css_ctc_config default_ctc_config = { void ia_css_ctc_vamem_encode( - struct sh_css_isp_ctc_vamem_params *to, - const struct ia_css_ctc_table *from, - unsigned int size) + struct sh_css_isp_ctc_vamem_params *to, + const struct ia_css_ctc_table *from, + unsigned int size) { (void)size; memcpy(&to->ctc, &from->data, sizeof(to->ctc)); @@ -45,14 +45,14 @@ ia_css_ctc_vamem_encode( void ia_css_ctc_debug_dtrace( - const struct ia_css_ctc_config *config, - unsigned int level) + const struct ia_css_ctc_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.ce_gain_exp=%d, config.y0=%d, config.x1=%d, config.y1=%d, config.x2=%d, config.y2=%d, config.x3=%d, config.y3=%d, config.x4=%d, config.y4=%d\n", - config->ce_gain_exp, config->y0, - config->x1, config->y1, - config->x2, config->y2, - config->x3, config->y3, - config->x4, config->y4); + "config.ce_gain_exp=%d, config.y0=%d, config.x1=%d, config.y1=%d, config.x2=%d, config.y2=%d, config.x3=%d, config.y3=%d, config.x4=%d, config.y4=%d\n", + config->ce_gain_exp, config->y0, + config->x1, config->y1, + config->x2, config->y2, + config->x3, config->y3, + config->x4, config->y4); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h index d044071b690d3..e4ad676361dde 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h @@ -24,13 +24,13 @@ extern const struct ia_css_ctc_config default_ctc_config; void ia_css_ctc_vamem_encode( - struct sh_css_isp_ctc_vamem_params *to, - const struct ia_css_ctc_table *from, - unsigned int size); + struct sh_css_isp_ctc_vamem_params *to, + const struct ia_css_ctc_table *from, + unsigned int size); void ia_css_ctc_debug_dtrace( - const struct ia_css_ctc_config *config, unsigned int level) + const struct ia_css_ctc_config *config, unsigned int level) ; #endif /* __IA_CSS_CTC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c index bf140d8149345..adb146c03a73d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c @@ -25,39 +25,39 @@ struct ia_css_ctc_table default_ctc_table; static const uint16_t default_ctc_table_data[IA_CSS_VAMEM_2_CTC_TABLE_SIZE] = { - 0, 384, 837, 957, 1011, 1062, 1083, 1080, -1078, 1077, 1053, 1039, 1012, 992, 969, 951, - 929, 906, 886, 866, 845, 823, 809, 790, - 772, 758, 741, 726, 711, 701, 688, 675, - 666, 656, 648, 639, 633, 626, 618, 612, - 603, 594, 582, 572, 557, 545, 529, 516, - 504, 491, 480, 467, 459, 447, 438, 429, - 419, 412, 404, 397, 389, 382, 376, 368, - 363, 357, 351, 345, 340, 336, 330, 326, - 321, 318, 312, 308, 304, 300, 297, 294, - 291, 286, 284, 281, 278, 275, 271, 268, - 261, 257, 251, 245, 240, 235, 232, 225, - 223, 218, 213, 209, 206, 204, 199, 197, - 193, 189, 186, 185, 183, 179, 177, 175, - 172, 170, 169, 167, 164, 164, 162, 160, - 158, 157, 156, 154, 154, 152, 151, 150, - 149, 148, 146, 147, 146, 144, 143, 143, - 142, 141, 140, 141, 139, 138, 138, 138, - 137, 136, 136, 135, 134, 134, 134, 133, - 132, 132, 131, 130, 131, 130, 129, 128, - 129, 127, 127, 127, 127, 125, 125, 125, - 123, 123, 122, 120, 118, 115, 114, 111, - 110, 108, 106, 105, 103, 102, 100, 99, - 97, 97, 96, 95, 94, 93, 93, 91, - 91, 91, 90, 90, 89, 89, 88, 88, - 89, 88, 88, 87, 87, 87, 87, 86, - 87, 87, 86, 87, 86, 86, 84, 84, - 82, 80, 78, 76, 74, 72, 70, 68, - 67, 65, 62, 60, 58, 56, 55, 54, - 53, 51, 49, 49, 47, 45, 45, 45, - 41, 40, 39, 39, 34, 33, 34, 32, - 25, 23, 24, 20, 13, 9, 12, 0, - 0 + 0, 384, 837, 957, 1011, 1062, 1083, 1080, + 1078, 1077, 1053, 1039, 1012, 992, 969, 951, + 929, 906, 886, 866, 845, 823, 809, 790, + 772, 758, 741, 726, 711, 701, 688, 675, + 666, 656, 648, 639, 633, 626, 618, 612, + 603, 594, 582, 572, 557, 545, 529, 516, + 504, 491, 480, 467, 459, 447, 438, 429, + 419, 412, 404, 397, 389, 382, 376, 368, + 363, 357, 351, 345, 340, 336, 330, 326, + 321, 318, 312, 308, 304, 300, 297, 294, + 291, 286, 284, 281, 278, 275, 271, 268, + 261, 257, 251, 245, 240, 235, 232, 225, + 223, 218, 213, 209, 206, 204, 199, 197, + 193, 189, 186, 185, 183, 179, 177, 175, + 172, 170, 169, 167, 164, 164, 162, 160, + 158, 157, 156, 154, 154, 152, 151, 150, + 149, 148, 146, 147, 146, 144, 143, 143, + 142, 141, 140, 141, 139, 138, 138, 138, + 137, 136, 136, 135, 134, 134, 134, 133, + 132, 132, 131, 130, 131, 130, 129, 128, + 129, 127, 127, 127, 127, 125, 125, 125, + 123, 123, 122, 120, 118, 115, 114, 111, + 110, 108, 106, 105, 103, 102, 100, 99, + 97, 97, 96, 95, 94, 93, 93, 91, + 91, 91, 90, 90, 89, 89, 88, 88, + 89, 88, 88, 87, 87, 87, 87, 86, + 87, 87, 86, 87, 86, 86, 84, 84, + 82, 80, 78, 76, 74, 72, 70, 68, + 67, 65, 62, 60, 58, 56, 55, 54, + 53, 51, 49, 49, 47, 45, 45, 45, + 41, 40, 39, 39, 34, 33, 34, 32, + 25, 23, 24, 20, 13, 9, 12, 0, + 0 }; #elif defined(HAS_VAMEM_VERSION_1) @@ -65,134 +65,134 @@ default_ctc_table_data[IA_CSS_VAMEM_2_CTC_TABLE_SIZE] = { /* Default Parameters */ static const uint16_t default_ctc_table_data[IA_CSS_VAMEM_1_CTC_TABLE_SIZE] = { - 0, 0, 256, 384, 384, 497, 765, 806, - 837, 851, 888, 901, 957, 981, 993, 1001, - 1011, 1029, 1028, 1039, 1062, 1059, 1073, 1080, - 1083, 1085, 1085, 1098, 1080, 1084, 1085, 1093, - 1078, 1073, 1070, 1069, 1077, 1066, 1072, 1063, - 1053, 1044, 1046, 1053, 1039, 1028, 1025, 1024, - 1012, 1013, 1016, 996, 992, 990, 990, 980, - 969, 968, 961, 955, 951, 949, 933, 930, - 929, 925, 921, 916, 906, 901, 895, 893, - 886, 877, 872, 869, 866, 861, 857, 849, - 845, 838, 836, 832, 823, 821, 815, 813, - 809, 805, 796, 793, 790, 785, 784, 778, - 772, 768, 766, 763, 758, 752, 749, 745, - 741, 740, 736, 730, 726, 724, 723, 718, - 711, 709, 706, 704, 701, 698, 691, 689, - 688, 683, 683, 678, 675, 673, 671, 669, - 666, 663, 661, 660, 656, 656, 653, 650, - 648, 647, 646, 643, 639, 638, 637, 635, - 633, 632, 629, 627, 626, 625, 622, 621, - 618, 618, 614, 614, 612, 609, 606, 606, - 603, 600, 600, 597, 594, 591, 590, 586, - 582, 581, 578, 575, 572, 569, 563, 560, - 557, 554, 551, 548, 545, 539, 536, 533, - 529, 527, 524, 519, 516, 513, 510, 507, - 504, 501, 498, 493, 491, 488, 485, 484, - 480, 476, 474, 471, 467, 466, 464, 460, - 459, 455, 453, 449, 447, 446, 443, 441, - 438, 435, 432, 432, 429, 427, 426, 422, - 419, 418, 416, 414, 412, 410, 408, 406, - 404, 402, 401, 398, 397, 395, 393, 390, - 389, 388, 387, 384, 382, 380, 378, 377, - 376, 375, 372, 370, 368, 368, 366, 364, - 363, 361, 360, 358, 357, 355, 354, 352, - 351, 350, 349, 346, 345, 344, 344, 342, - 340, 339, 337, 337, 336, 335, 333, 331, - 330, 329, 328, 326, 326, 324, 324, 322, - 321, 320, 318, 318, 318, 317, 315, 313, - 312, 311, 311, 310, 308, 307, 306, 306, - 304, 304, 302, 301, 300, 300, 299, 297, - 297, 296, 296, 294, 294, 292, 291, 291, - 291, 290, 288, 287, 286, 286, 287, 285, - 284, 283, 282, 282, 281, 281, 279, 278, - 278, 278, 276, 276, 275, 274, 274, 273, - 271, 270, 269, 268, 268, 267, 265, 262, - 261, 260, 260, 259, 257, 254, 252, 252, - 251, 251, 249, 246, 245, 244, 243, 242, - 240, 239, 239, 237, 235, 235, 233, 231, - 232, 230, 229, 226, 225, 224, 225, 224, - 223, 220, 219, 219, 218, 217, 217, 214, - 213, 213, 212, 211, 209, 209, 209, 208, - 206, 205, 204, 203, 204, 203, 201, 200, - 199, 197, 198, 198, 197, 195, 194, 194, - 193, 192, 192, 191, 189, 190, 189, 188, - 186, 187, 186, 185, 185, 184, 183, 181, - 183, 182, 181, 180, 179, 178, 178, 178, - 177, 176, 175, 176, 175, 174, 174, 173, - 172, 173, 172, 171, 170, 170, 169, 169, - 169, 168, 167, 166, 167, 167, 166, 165, - 164, 164, 164, 163, 164, 163, 162, 163, - 162, 161, 160, 161, 160, 160, 160, 159, - 158, 157, 158, 158, 157, 157, 156, 156, - 156, 156, 155, 155, 154, 154, 154, 154, - 154, 153, 152, 153, 152, 152, 151, 152, - 151, 152, 151, 150, 150, 149, 149, 150, - 149, 149, 148, 148, 148, 149, 148, 147, - 146, 146, 147, 146, 147, 146, 145, 146, - 146, 145, 144, 145, 144, 145, 144, 144, - 143, 143, 143, 144, 143, 142, 142, 142, - 142, 142, 142, 141, 141, 141, 141, 140, - 140, 141, 140, 140, 141, 140, 139, 139, - 139, 140, 139, 139, 138, 138, 137, 139, - 138, 138, 138, 137, 138, 137, 137, 137, - 137, 136, 137, 136, 136, 136, 136, 135, - 136, 135, 135, 135, 135, 136, 135, 135, - 134, 134, 133, 135, 134, 134, 134, 133, - 134, 133, 134, 133, 133, 132, 133, 133, - 132, 133, 132, 132, 132, 132, 131, 131, - 131, 132, 131, 131, 130, 131, 130, 132, - 131, 130, 130, 129, 130, 129, 130, 129, - 129, 129, 130, 129, 128, 128, 128, 128, - 129, 128, 128, 127, 127, 128, 128, 127, - 127, 126, 126, 127, 127, 126, 126, 126, - 127, 126, 126, 126, 125, 125, 126, 125, - 125, 124, 124, 124, 125, 125, 124, 124, - 123, 124, 124, 123, 123, 122, 122, 122, - 122, 122, 121, 120, 120, 119, 118, 118, - 118, 117, 117, 116, 115, 115, 115, 114, - 114, 113, 113, 112, 111, 111, 111, 110, - 110, 109, 109, 108, 108, 108, 107, 107, - 106, 106, 105, 105, 105, 104, 104, 103, - 103, 102, 102, 102, 102, 101, 101, 100, - 100, 99, 99, 99, 99, 99, 99, 98, - 97, 98, 97, 97, 97, 96, 96, 95, - 96, 95, 96, 95, 95, 94, 94, 95, - 94, 94, 94, 93, 93, 92, 93, 93, - 93, 93, 92, 92, 91, 92, 92, 92, - 91, 91, 90, 90, 91, 91, 91, 90, - 90, 90, 90, 91, 90, 90, 90, 89, - 89, 89, 90, 89, 89, 89, 89, 89, - 88, 89, 89, 88, 88, 88, 88, 87, - 89, 88, 88, 88, 88, 88, 87, 88, - 88, 88, 87, 87, 87, 87, 87, 88, - 87, 87, 87, 87, 87, 87, 88, 87, - 87, 87, 87, 86, 86, 87, 87, 87, - 87, 86, 86, 86, 87, 87, 86, 87, - 86, 86, 86, 87, 87, 86, 86, 86, - 86, 86, 87, 87, 86, 85, 85, 85, - 84, 85, 85, 84, 84, 83, 83, 82, - 82, 82, 81, 81, 80, 79, 79, 79, - 78, 77, 77, 76, 76, 76, 75, 74, - 74, 74, 73, 73, 72, 71, 71, 71, - 70, 70, 69, 69, 68, 68, 67, 67, - 67, 66, 66, 65, 65, 64, 64, 63, - 62, 62, 62, 61, 60, 60, 59, 59, - 58, 58, 57, 57, 56, 56, 56, 55, - 55, 54, 55, 55, 54, 53, 53, 52, - 53, 53, 52, 51, 51, 50, 51, 50, - 49, 49, 50, 49, 49, 48, 48, 47, - 47, 48, 46, 45, 45, 45, 46, 45, - 45, 44, 45, 45, 45, 43, 42, 42, - 41, 43, 41, 40, 40, 39, 40, 41, - 39, 39, 39, 39, 39, 38, 35, 35, - 34, 37, 36, 34, 33, 33, 33, 35, - 34, 32, 32, 31, 32, 30, 29, 26, - 25, 25, 27, 26, 23, 23, 23, 25, - 24, 24, 22, 21, 20, 19, 16, 14, - 13, 13, 13, 10, 9, 7, 7, 7, - 12, 12, 12, 7, 0, 0, 0, 0 + 0, 0, 256, 384, 384, 497, 765, 806, + 837, 851, 888, 901, 957, 981, 993, 1001, + 1011, 1029, 1028, 1039, 1062, 1059, 1073, 1080, + 1083, 1085, 1085, 1098, 1080, 1084, 1085, 1093, + 1078, 1073, 1070, 1069, 1077, 1066, 1072, 1063, + 1053, 1044, 1046, 1053, 1039, 1028, 1025, 1024, + 1012, 1013, 1016, 996, 992, 990, 990, 980, + 969, 968, 961, 955, 951, 949, 933, 930, + 929, 925, 921, 916, 906, 901, 895, 893, + 886, 877, 872, 869, 866, 861, 857, 849, + 845, 838, 836, 832, 823, 821, 815, 813, + 809, 805, 796, 793, 790, 785, 784, 778, + 772, 768, 766, 763, 758, 752, 749, 745, + 741, 740, 736, 730, 726, 724, 723, 718, + 711, 709, 706, 704, 701, 698, 691, 689, + 688, 683, 683, 678, 675, 673, 671, 669, + 666, 663, 661, 660, 656, 656, 653, 650, + 648, 647, 646, 643, 639, 638, 637, 635, + 633, 632, 629, 627, 626, 625, 622, 621, + 618, 618, 614, 614, 612, 609, 606, 606, + 603, 600, 600, 597, 594, 591, 590, 586, + 582, 581, 578, 575, 572, 569, 563, 560, + 557, 554, 551, 548, 545, 539, 536, 533, + 529, 527, 524, 519, 516, 513, 510, 507, + 504, 501, 498, 493, 491, 488, 485, 484, + 480, 476, 474, 471, 467, 466, 464, 460, + 459, 455, 453, 449, 447, 446, 443, 441, + 438, 435, 432, 432, 429, 427, 426, 422, + 419, 418, 416, 414, 412, 410, 408, 406, + 404, 402, 401, 398, 397, 395, 393, 390, + 389, 388, 387, 384, 382, 380, 378, 377, + 376, 375, 372, 370, 368, 368, 366, 364, + 363, 361, 360, 358, 357, 355, 354, 352, + 351, 350, 349, 346, 345, 344, 344, 342, + 340, 339, 337, 337, 336, 335, 333, 331, + 330, 329, 328, 326, 326, 324, 324, 322, + 321, 320, 318, 318, 318, 317, 315, 313, + 312, 311, 311, 310, 308, 307, 306, 306, + 304, 304, 302, 301, 300, 300, 299, 297, + 297, 296, 296, 294, 294, 292, 291, 291, + 291, 290, 288, 287, 286, 286, 287, 285, + 284, 283, 282, 282, 281, 281, 279, 278, + 278, 278, 276, 276, 275, 274, 274, 273, + 271, 270, 269, 268, 268, 267, 265, 262, + 261, 260, 260, 259, 257, 254, 252, 252, + 251, 251, 249, 246, 245, 244, 243, 242, + 240, 239, 239, 237, 235, 235, 233, 231, + 232, 230, 229, 226, 225, 224, 225, 224, + 223, 220, 219, 219, 218, 217, 217, 214, + 213, 213, 212, 211, 209, 209, 209, 208, + 206, 205, 204, 203, 204, 203, 201, 200, + 199, 197, 198, 198, 197, 195, 194, 194, + 193, 192, 192, 191, 189, 190, 189, 188, + 186, 187, 186, 185, 185, 184, 183, 181, + 183, 182, 181, 180, 179, 178, 178, 178, + 177, 176, 175, 176, 175, 174, 174, 173, + 172, 173, 172, 171, 170, 170, 169, 169, + 169, 168, 167, 166, 167, 167, 166, 165, + 164, 164, 164, 163, 164, 163, 162, 163, + 162, 161, 160, 161, 160, 160, 160, 159, + 158, 157, 158, 158, 157, 157, 156, 156, + 156, 156, 155, 155, 154, 154, 154, 154, + 154, 153, 152, 153, 152, 152, 151, 152, + 151, 152, 151, 150, 150, 149, 149, 150, + 149, 149, 148, 148, 148, 149, 148, 147, + 146, 146, 147, 146, 147, 146, 145, 146, + 146, 145, 144, 145, 144, 145, 144, 144, + 143, 143, 143, 144, 143, 142, 142, 142, + 142, 142, 142, 141, 141, 141, 141, 140, + 140, 141, 140, 140, 141, 140, 139, 139, + 139, 140, 139, 139, 138, 138, 137, 139, + 138, 138, 138, 137, 138, 137, 137, 137, + 137, 136, 137, 136, 136, 136, 136, 135, + 136, 135, 135, 135, 135, 136, 135, 135, + 134, 134, 133, 135, 134, 134, 134, 133, + 134, 133, 134, 133, 133, 132, 133, 133, + 132, 133, 132, 132, 132, 132, 131, 131, + 131, 132, 131, 131, 130, 131, 130, 132, + 131, 130, 130, 129, 130, 129, 130, 129, + 129, 129, 130, 129, 128, 128, 128, 128, + 129, 128, 128, 127, 127, 128, 128, 127, + 127, 126, 126, 127, 127, 126, 126, 126, + 127, 126, 126, 126, 125, 125, 126, 125, + 125, 124, 124, 124, 125, 125, 124, 124, + 123, 124, 124, 123, 123, 122, 122, 122, + 122, 122, 121, 120, 120, 119, 118, 118, + 118, 117, 117, 116, 115, 115, 115, 114, + 114, 113, 113, 112, 111, 111, 111, 110, + 110, 109, 109, 108, 108, 108, 107, 107, + 106, 106, 105, 105, 105, 104, 104, 103, + 103, 102, 102, 102, 102, 101, 101, 100, + 100, 99, 99, 99, 99, 99, 99, 98, + 97, 98, 97, 97, 97, 96, 96, 95, + 96, 95, 96, 95, 95, 94, 94, 95, + 94, 94, 94, 93, 93, 92, 93, 93, + 93, 93, 92, 92, 91, 92, 92, 92, + 91, 91, 90, 90, 91, 91, 91, 90, + 90, 90, 90, 91, 90, 90, 90, 89, + 89, 89, 90, 89, 89, 89, 89, 89, + 88, 89, 89, 88, 88, 88, 88, 87, + 89, 88, 88, 88, 88, 88, 87, 88, + 88, 88, 87, 87, 87, 87, 87, 88, + 87, 87, 87, 87, 87, 87, 88, 87, + 87, 87, 87, 86, 86, 87, 87, 87, + 87, 86, 86, 86, 87, 87, 86, 87, + 86, 86, 86, 87, 87, 86, 86, 86, + 86, 86, 87, 87, 86, 85, 85, 85, + 84, 85, 85, 84, 84, 83, 83, 82, + 82, 82, 81, 81, 80, 79, 79, 79, + 78, 77, 77, 76, 76, 76, 75, 74, + 74, 74, 73, 73, 72, 71, 71, 71, + 70, 70, 69, 69, 68, 68, 67, 67, + 67, 66, 66, 65, 65, 64, 64, 63, + 62, 62, 62, 61, 60, 60, 59, 59, + 58, 58, 57, 57, 56, 56, 56, 55, + 55, 54, 55, 55, 54, 53, 53, 52, + 53, 53, 52, 51, 51, 50, 51, 50, + 49, 49, 50, 49, 49, 48, 48, 47, + 47, 48, 46, 45, 45, 45, 46, 45, + 45, 44, 45, 45, 45, 43, 42, 42, + 41, 43, 41, 40, 40, 39, 40, 41, + 39, 39, 39, 39, 39, 38, 35, 35, + 34, 37, 36, 34, 33, 33, 33, 35, + 34, 32, 32, 31, 32, 30, 29, 26, + 25, 25, 27, 26, 23, 23, 23, 25, + 24, 24, 22, 21, 20, 19, 16, 14, + 13, 13, 13, 10, 9, 7, 7, 7, + 12, 12, 12, 7, 0, 0, 0, 0 }; #else diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.c index 4eb96b4dc8dcf..8e4218cb70cd6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.c @@ -26,9 +26,9 @@ const struct ia_css_de_config default_de_config = { void ia_css_de_encode( - struct sh_css_isp_de_params *to, - const struct ia_css_de_config *from, - unsigned int size) + struct sh_css_isp_de_params *to, + const struct ia_css_de_config *from, + unsigned int size) { (void)size; to->pixelnoise = @@ -43,36 +43,36 @@ ia_css_de_encode( void ia_css_de_dump( - const struct sh_css_isp_de_params *de, - unsigned int level) + const struct sh_css_isp_de_params *de, + unsigned int level) { if (!de) return; ia_css_debug_dtrace(level, "Demosaic:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "de_pixelnoise", de->pixelnoise); + "de_pixelnoise", de->pixelnoise); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "de_c1_coring_threshold", - de->c1_coring_threshold); + "de_c1_coring_threshold", + de->c1_coring_threshold); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "de_c2_coring_threshold", - de->c2_coring_threshold); + "de_c2_coring_threshold", + de->c2_coring_threshold); } void ia_css_de_debug_dtrace( - const struct ia_css_de_config *config, - unsigned int level) + const struct ia_css_de_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.pixelnoise=%d, config.c1_coring_threshold=%d, config.c2_coring_threshold=%d\n", - config->pixelnoise, - config->c1_coring_threshold, config->c2_coring_threshold); + "config.pixelnoise=%d, config.c1_coring_threshold=%d, config.c2_coring_threshold=%d\n", + config->pixelnoise, + config->c1_coring_threshold, config->c2_coring_threshold); } void ia_css_init_de_state( - void/*struct sh_css_isp_de_vmem_state*/ * state, - size_t size) + void/*struct sh_css_isp_de_vmem_state*/ * state, + size_t size) { memset(state, 0, size); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h index b7b28af365c55..baae1d9809dab 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h @@ -22,23 +22,23 @@ extern const struct ia_css_de_config default_de_config; void ia_css_de_encode( - struct sh_css_isp_de_params *to, - const struct ia_css_de_config *from, - unsigned int size); + struct sh_css_isp_de_params *to, + const struct ia_css_de_config *from, + unsigned int size); void ia_css_de_dump( - const struct sh_css_isp_de_params *de, - unsigned int level); + const struct sh_css_isp_de_params *de, + unsigned int level); void ia_css_de_debug_dtrace( - const struct ia_css_de_config *config, - unsigned int level); + const struct ia_css_de_config *config, + unsigned int level); void ia_css_init_de_state( - void/*struct sh_css_isp_de_vmem_state*/ * state, - size_t size); + void/*struct sh_css_isp_de_vmem_state*/ * state, + size_t size); #endif /* __IA_CSS_DE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h index eddd9ae7d05f2..59568a182f64c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h @@ -20,7 +20,7 @@ /* DE (Demosaic) */ struct sh_css_isp_de_vmem_state { - VMEM_ARRAY(de_buf[4], MAX_VECTORS_PER_BUF_LINE * ISP_NWAY); + VMEM_ARRAY(de_buf[4], MAX_VECTORS_PER_BUF_LINE *ISP_NWAY); }; #endif /* __IA_CSS_DE_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c index d459ec9a973bc..ade23d53f6bb5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c @@ -26,9 +26,9 @@ const struct ia_css_ecd_config default_ecd_config = { void ia_css_ecd_encode( - struct sh_css_isp_ecd_params *to, - const struct ia_css_ecd_config *from, - unsigned int size) + struct sh_css_isp_ecd_params *to, + const struct ia_css_ecd_config *from, + unsigned int size) { (void)size; to->zip_strength = from->zip_strength; @@ -38,16 +38,16 @@ ia_css_ecd_encode( void ia_css_ecd_dump( - const struct sh_css_isp_ecd_params *ecd, - unsigned int level); + const struct sh_css_isp_ecd_params *ecd, + unsigned int level); void ia_css_ecd_debug_dtrace( - const struct ia_css_ecd_config *config, - unsigned int level) + const struct ia_css_ecd_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.zip_strength=%d, config.fc_strength=%d, config.fc_debias=%d\n", - config->zip_strength, - config->fc_strength, config->fc_debias); + "config.zip_strength=%d, config.fc_strength=%d, config.fc_debias=%d\n", + config->zip_strength, + config->fc_strength, config->fc_debias); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h index 69c5d2533ef7e..f3749e5145053 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h @@ -22,17 +22,17 @@ extern const struct ia_css_ecd_config default_ecd_config; void ia_css_ecd_encode( - struct sh_css_isp_ecd_params *to, - const struct ia_css_ecd_config *from, - unsigned int size); + struct sh_css_isp_ecd_params *to, + const struct ia_css_ecd_config *from, + unsigned int size); void ia_css_ecd_dump( - const struct sh_css_isp_ecd_params *ecd, - unsigned int level); + const struct sh_css_isp_ecd_params *ecd, + unsigned int level); void ia_css_ecd_debug_dtrace( - const struct ia_css_ecd_config *config, unsigned int level); + const struct ia_css_ecd_config *config, unsigned int level); #endif /* __IA_CSS_DE2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c index 039865b6a4463..461ff18ed0117 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c @@ -44,9 +44,9 @@ const struct ia_css_dp_config default_dp_config = { void ia_css_dp_encode( - struct sh_css_isp_dp_params *to, - const struct ia_css_dp_config *from, - unsigned int size) + struct sh_css_isp_dp_params *to, + const struct ia_css_dp_config *from, + unsigned int size) { int gain = from->gain; int gr = from->gr; @@ -82,51 +82,51 @@ ia_css_dp_encode( void ia_css_dp_dump( - const struct sh_css_isp_dp_params *dp, - unsigned int level) + const struct sh_css_isp_dp_params *dp, + unsigned int level) { if (!dp) return; ia_css_debug_dtrace(level, "Defect Pixel Correction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dp_threshold_single_w_2adj_on", - dp->threshold_single); + "dp_threshold_single_w_2adj_on", + dp->threshold_single); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dp_threshold_2adj_w_2adj_on", - dp->threshold_2adjacent); + "dp_threshold_2adj_w_2adj_on", + dp->threshold_2adjacent); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dp_gain", dp->gain); + "dp_gain", dp->gain); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_rr_gr", dp->coef_rr_gr); + "dpc_coef_rr_gr", dp->coef_rr_gr); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_rr_gb", dp->coef_rr_gb); + "dpc_coef_rr_gb", dp->coef_rr_gb); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_bb_gb", dp->coef_bb_gb); + "dpc_coef_bb_gb", dp->coef_bb_gb); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_bb_gr", dp->coef_bb_gr); + "dpc_coef_bb_gr", dp->coef_bb_gr); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_gr_rr", dp->coef_gr_rr); + "dpc_coef_gr_rr", dp->coef_gr_rr); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_gr_bb", dp->coef_gr_bb); + "dpc_coef_gr_bb", dp->coef_gr_bb); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_gb_bb", dp->coef_gb_bb); + "dpc_coef_gb_bb", dp->coef_gb_bb); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "dpc_coef_gb_rr", dp->coef_gb_rr); + "dpc_coef_gb_rr", dp->coef_gb_rr); } void ia_css_dp_debug_dtrace( - const struct ia_css_dp_config *config, - unsigned int level) + const struct ia_css_dp_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.threshold=%d, config.gain=%d\n", - config->threshold, config->gain); + "config.threshold=%d, config.gain=%d\n", + config->threshold, config->gain); } void ia_css_init_dp_state( - void/*struct sh_css_isp_dp_vmem_state*/ * state, - size_t size) + void/*struct sh_css_isp_dp_vmem_state*/ * state, + size_t size) { memset(state, 0, size); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h index c8359ecc3a898..05fd7fdd618d8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h @@ -25,23 +25,23 @@ extern const struct ia_css_dp_config default_dp_10bpp_config; void ia_css_dp_encode( - struct sh_css_isp_dp_params *to, - const struct ia_css_dp_config *from, - unsigned int size); + struct sh_css_isp_dp_params *to, + const struct ia_css_dp_config *from, + unsigned int size); void ia_css_dp_dump( - const struct sh_css_isp_dp_params *dp, - unsigned int level); + const struct sh_css_isp_dp_params *dp, + unsigned int level); void ia_css_dp_debug_dtrace( - const struct ia_css_dp_config *config, - unsigned int level); + const struct ia_css_dp_config *config, + unsigned int level); void ia_css_init_dp_state( - void/*struct sh_css_isp_dp_vmem_state*/ * state, - size_t size); + void/*struct sh_css_isp_dp_vmem_state*/ * state, + size_t size); #endif /* __IA_CSS_DP_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c index 1217a2a7b2f55..4dfad4ace20bc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c @@ -17,16 +17,16 @@ void ia_css_dpc2_encode( - struct ia_css_isp_dpc2_params *to, - const struct ia_css_dpc2_config *from, - size_t size) + struct ia_css_isp_dpc2_params *to, + const struct ia_css_dpc2_config *from, + size_t size) { (void)size; assert((from->metric1 >= 0) && (from->metric1 <= METRIC1_ONE_FP)); assert((from->metric3 >= 0) && (from->metric3 <= METRIC3_ONE_FP)); assert((from->metric2 >= METRIC2_ONE_FP) && - (from->metric2 < 256 * METRIC2_ONE_FP)); + (from->metric2 < 256 * METRIC2_ONE_FP)); assert((from->wb_gain_gr > 0) && (from->wb_gain_gr < 16 * WBGAIN_ONE_FP)); assert((from->wb_gain_r > 0) && (from->wb_gain_r < 16 * WBGAIN_ONE_FP)); assert((from->wb_gain_b > 0) && (from->wb_gain_b < 16 * WBGAIN_ONE_FP)); @@ -45,8 +45,8 @@ ia_css_dpc2_encode( /* TODO: AM: This needs a proper implementation. */ void ia_css_init_dpc2_state( - void *state, - size_t size) + void *state, + size_t size) { (void)state; (void)size; @@ -56,8 +56,8 @@ ia_css_init_dpc2_state( /* TODO: AM: This needs a proper implementation. */ void ia_css_dpc2_debug_dtrace( - const struct ia_css_dpc2_config *config, - unsigned int level) + const struct ia_css_dpc2_config *config, + unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h index 7d4619f2bfb2e..a31ef0e5047b8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h @@ -20,20 +20,20 @@ void ia_css_dpc2_encode( - struct ia_css_isp_dpc2_params *to, - const struct ia_css_dpc2_config *from, - size_t size); + struct ia_css_isp_dpc2_params *to, + const struct ia_css_dpc2_config *from, + size_t size); void ia_css_init_dpc2_state( - void *state, - size_t size); + void *state, + size_t size); #ifndef IA_CSS_NO_DEBUG void ia_css_dpc2_debug_dtrace( - const struct ia_css_dpc2_config *config, - unsigned int level); + const struct ia_css_dpc2_config *config, + unsigned int level); #endif #endif /* __IA_CSS_DPC2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c index 0c21b41774c38..2e438a4de3a64 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c @@ -33,9 +33,9 @@ static const struct ia_css_dvs_configuration default_config = { void ia_css_dvs_config( - struct sh_css_isp_dvs_isp_config *to, - const struct ia_css_dvs_configuration *from, - unsigned int size) + struct sh_css_isp_dvs_isp_config *to, + const struct ia_css_dvs_configuration *from, + unsigned int size) { (void)size; to->num_horizontal_blocks = @@ -46,8 +46,8 @@ ia_css_dvs_config( void ia_css_dvs_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_dvs_configuration config = default_config; @@ -58,12 +58,12 @@ ia_css_dvs_configure( static void convert_coords_to_ispparams( - struct ia_css_host_data *gdc_warp_table, - const struct ia_css_dvs_6axis_config *config, - unsigned int i_stride, - unsigned int o_width, - unsigned int o_height, - unsigned int uv_flag) + struct ia_css_host_data *gdc_warp_table, + const struct ia_css_dvs_6axis_config *config, + unsigned int i_stride, + unsigned int o_width, + unsigned int o_height, + unsigned int uv_flag) { unsigned int i, j; #ifndef ISP2401 @@ -71,17 +71,20 @@ convert_coords_to_ispparams( #endif gdc_warp_param_mem_t s = { 0 }; unsigned int x00, x01, x10, x11, - y00, y01, y10, y11; + y00, y01, y10, y11; unsigned int xmin, ymin, xmax, ymax; unsigned int topleft_x, topleft_y, bottom_x, bottom_y, - topleft_x_frac, topleft_y_frac; + topleft_x_frac, topleft_y_frac; unsigned int dvs_interp_envelope = (DVS_GDC_INTERP_METHOD == HRT_GDC_BLI_MODE ? - DVS_GDC_BLI_INTERP_ENVELOPE : DVS_GDC_BCI_INTERP_ENVELOPE); + DVS_GDC_BLI_INTERP_ENVELOPE : DVS_GDC_BCI_INTERP_ENVELOPE); /* number of blocks per height and width */ - unsigned int num_blocks_y = (uv_flag ? DVS_NUM_BLOCKS_Y_CHROMA(o_height) : DVS_NUM_BLOCKS_Y(o_height)); - unsigned int num_blocks_x = (uv_flag ? DVS_NUM_BLOCKS_X_CHROMA(o_width) : DVS_NUM_BLOCKS_X(o_width)); // round num_x up to blockdim_x, if it concerns the Y0Y1 block (uv_flag==0) round up to even + unsigned int num_blocks_y = (uv_flag ? DVS_NUM_BLOCKS_Y_CHROMA( + o_height) : DVS_NUM_BLOCKS_Y(o_height)); + unsigned int num_blocks_x = (uv_flag ? DVS_NUM_BLOCKS_X_CHROMA( + o_width) : DVS_NUM_BLOCKS_X( + o_width)); // round num_x up to blockdim_x, if it concerns the Y0Y1 block (uv_flag==0) round up to even unsigned int in_stride = i_stride * DVS_INPUT_BYTES_PER_PIXEL; unsigned int width, height; @@ -97,14 +100,12 @@ convert_coords_to_ispparams( ptr += (2 * uv_flag); /* format is Y0 Y1 UV, so UV starts at 3rd position */ - if (uv_flag == 0) - { + if (uv_flag == 0) { xbuff = config->xcoords_y; ybuff = config->ycoords_y; width = config->width_y; height = config->height_y; - } else - { + } else { xbuff = config->xcoords_uv; ybuff = config->ycoords_uv; width = config->width_uv; @@ -116,7 +117,8 @@ convert_coords_to_ispparams( IA_CSS_LOG("num_blocks_x %d num_blocks_y %d", num_blocks_x, num_blocks_y); IA_CSS_LOG("width %d height %d", width, height); - assert(width == num_blocks_x + 1); // the width and height of the provided morphing table should be 1 more than the number of blocks + assert(width == num_blocks_x + + 1); // the width and height of the provided morphing table should be 1 more than the number of blocks assert(height == num_blocks_y + 1); for (j = 0; j < num_blocks_y; j++) { @@ -145,8 +147,8 @@ convert_coords_to_ispparams( topleft_y = ymin >> DVS_COORD_FRAC_BITS; topleft_x = ((xmin >> DVS_COORD_FRAC_BITS) - >> XMEM_ALIGN_LOG2) - << (XMEM_ALIGN_LOG2); + >> XMEM_ALIGN_LOG2) + << (XMEM_ALIGN_LOG2); s.in_addr_offset = topleft_y * in_stride + topleft_x; /* similar to topleft_y calculation, but round up if ymax @@ -225,9 +227,9 @@ convert_coords_to_ispparams( struct ia_css_host_data * convert_allocate_dvs_6axis_config( - const struct ia_css_dvs_6axis_config *dvs_6axis_config, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *dvs_in_frame_info) + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info) { unsigned int i_stride; unsigned int o_width; @@ -246,7 +248,7 @@ convert_allocate_dvs_6axis_config( /*DVS only supports input frame of YUV420 or NV12. Fail for all other cases*/ assert((dvs_in_frame_info->format == IA_CSS_FRAME_FORMAT_NV12) - || (dvs_in_frame_info->format == IA_CSS_FRAME_FORMAT_YUV420)); + || (dvs_in_frame_info->format == IA_CSS_FRAME_FORMAT_YUV420)); isp_data_ptr = (struct gdc_warp_param_mem_s *)me->address; @@ -273,11 +275,10 @@ convert_allocate_dvs_6axis_config( enum ia_css_err store_dvs_6axis_config( - const struct ia_css_dvs_6axis_config *dvs_6axis_config, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *dvs_in_frame_info, - hrt_vaddress ddr_addr_y) -{ + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info, + hrt_vaddress ddr_addr_y) { struct ia_css_host_data *me; assert(dvs_6axis_config); @@ -285,17 +286,18 @@ store_dvs_6axis_config( assert(dvs_in_frame_info); me = convert_allocate_dvs_6axis_config(dvs_6axis_config, - binary, - dvs_in_frame_info); + binary, + dvs_in_frame_info); - if (!me) { + if (!me) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } ia_css_params_store_ia_css_host_data( - ddr_addr_y, - me); + ddr_addr_y, + me); ia_css_host_data_free(me); return IA_CSS_SUCCESS; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h index 4402ca76d6271..d711170cf7cc8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h @@ -30,31 +30,31 @@ void ia_css_dvs_config( - struct sh_css_isp_dvs_isp_config *to, - const struct ia_css_dvs_configuration *from, - unsigned int size); + struct sh_css_isp_dvs_isp_config *to, + const struct ia_css_dvs_configuration *from, + unsigned int size); void ia_css_dvs_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void convert_dvs_6axis_config( - struct ia_css_isp_parameters *params, - const struct ia_css_binary *binary); + struct ia_css_isp_parameters *params, + const struct ia_css_binary *binary); struct ia_css_host_data * convert_allocate_dvs_6axis_config( - const struct ia_css_dvs_6axis_config *dvs_6axis_config, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *dvs_in_frame_info); + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info); enum ia_css_err store_dvs_6axis_config( - const struct ia_css_dvs_6axis_config *dvs_6axis_config, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *dvs_in_frame_info, - hrt_vaddress ddr_addr_y); + const struct ia_css_dvs_6axis_config *dvs_6axis_config, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *dvs_in_frame_info, + hrt_vaddress ddr_addr_y); #endif /* __IA_CSS_DVS_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c index 5a79f10a62948..03e1998b04649 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c @@ -33,50 +33,62 @@ #define NUMBER_OF_FCINV_POINTS 9 static const s16 chgrinv_x[NUMBER_OF_CHGRINV_POINTS] = { -0, 16, 64, 144, 272, 448, 672, 976, -1376, 1888, 2528, 3312, 4256, 5376, 6688}; + 0, 16, 64, 144, 272, 448, 672, 976, + 1376, 1888, 2528, 3312, 4256, 5376, 6688 +}; static const s16 chgrinv_a[NUMBER_OF_CHGRINV_POINTS] = { --7171, -256, -29, -3456, -1071, -475, -189, -102, --48, -38, -10, -9, -7, -6, 0}; + -7171, -256, -29, -3456, -1071, -475, -189, -102, + -48, -38, -10, -9, -7, -6, 0 + }; static const s16 chgrinv_b[NUMBER_OF_CHGRINV_POINTS] = { -8191, 1021, 256, 114, 60, 37, 24, 17, -12, 9, 6, 5, 4, 3, 2}; + 8191, 1021, 256, 114, 60, 37, 24, 17, + 12, 9, 6, 5, 4, 3, 2 +}; static const s16 chgrinv_c[NUMBER_OF_CHGRINV_POINTS] = { -1, 1, 1, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0}; + 1, 1, 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0 +}; static const s16 tcinv_x[NUMBER_OF_TCINV_POINTS] = { -0, 4, 11, 23, 42, 68, 102, 148, 205}; + 0, 4, 11, 23, 42, 68, 102, 148, 205 +}; static const s16 tcinv_a[NUMBER_OF_TCINV_POINTS] = { --6364, -631, -126, -34, -13, -6, -4452, -2156, 0}; + -6364, -631, -126, -34, -13, -6, -4452, -2156, 0 + }; static const s16 tcinv_b[NUMBER_OF_TCINV_POINTS] = { -8191, 1828, 726, 352, 197, 121, 80, 55, 40}; + 8191, 1828, 726, 352, 197, 121, 80, 55, 40 +}; static const s16 tcinv_c[NUMBER_OF_TCINV_POINTS] = { -1, 1, 1, 1, 1, 1, 0, 0, 0}; + 1, 1, 1, 1, 1, 1, 0, 0, 0 +}; static const s16 fcinv_x[NUMBER_OF_FCINV_POINTS] = { -0, 80, 216, 456, 824, 1344, 2040, 2952, 4096}; + 0, 80, 216, 456, 824, 1344, 2040, 2952, 4096 +}; static const s16 fcinv_a[NUMBER_OF_FCINV_POINTS] = { --5244, -486, -86, -2849, -961, -400, -180, -86, 0}; + -5244, -486, -86, -2849, -961, -400, -180, -86, 0 + }; static const s16 fcinv_b[NUMBER_OF_FCINV_POINTS] = { -8191, 1637, 607, 287, 159, 98, 64, 44, 32}; + 8191, 1637, 607, 287, 159, 98, 64, 44, 32 +}; static const s16 fcinv_c[NUMBER_OF_FCINV_POINTS] = { -1, 1, 1, 0, 0, 0, 0, 0, 0}; + 1, 1, 1, 0, 0, 0, 0, 0, 0 +}; void ia_css_eed1_8_vmem_encode( - struct eed1_8_vmem_params *to, - const struct ia_css_eed1_8_config *from, - size_t size) + struct eed1_8_vmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size) { unsigned int i, j, base; const unsigned int total_blocks = 4; @@ -160,24 +172,24 @@ ia_css_eed1_8_vmem_encode( for (j = 0; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) { to->e_dew_enh_x[0][base + j] = min_t(int, max_t(int, - from->dew_enhance_seg_x[j], 0), - 8191); + from->dew_enhance_seg_x[j], 0), + 8191); to->e_dew_enh_y[0][base + j] = min_t(int, max_t(int, - from->dew_enhance_seg_y[j], -8192), - 8191); + from->dew_enhance_seg_y[j], -8192), + 8191); } for (j = 0; j < (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1); j++) { to->e_dew_enh_a[0][base + j] = min_t(int, max_t(int, - from->dew_enhance_seg_slope[j], - -8192), 8191); + from->dew_enhance_seg_slope[j], + -8192), 8191); /* Convert dew_enhance_seg_exp to flag: * 0 -> 0 * 1...13 -> 1 */ to->e_dew_enh_f[0][base + j] = (min_t(int, max_t(int, - from->dew_enhance_seg_exp[j], - 0), 13) > 0); + from->dew_enhance_seg_exp[j], + 0), 13) > 0); } /* Hard-coded to 0, in order to be able to handle out of @@ -212,9 +224,9 @@ ia_css_eed1_8_vmem_encode( void ia_css_eed1_8_encode( - struct eed1_8_dmem_params *to, - const struct ia_css_eed1_8_config *from, - size_t size) + struct eed1_8_dmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size) { int i; int min_exp = 0; @@ -270,8 +282,8 @@ ia_css_eed1_8_encode( void ia_css_init_eed1_8_state( - void *state, - size_t size) + void *state, + size_t size) { memset(state, 0, size); } @@ -279,19 +291,21 @@ ia_css_init_eed1_8_state( #ifndef IA_CSS_NO_DEBUG void ia_css_eed1_8_debug_dtrace( - const struct ia_css_eed1_8_config *eed, - unsigned int level) + const struct ia_css_eed1_8_config *eed, + unsigned int level) { if (!eed) return; ia_css_debug_dtrace(level, "Edge Enhancing Demosaic 1.8:\n"); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rbzp_strength", eed->rbzp_strength); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rbzp_strength", + eed->rbzp_strength); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcstrength", eed->fcstrength); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcthres_0", eed->fcthres_0); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcthres_1", eed->fcthres_1); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fc_sat_coef", eed->fc_sat_coef); - ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fc_coring_prm", eed->fc_coring_prm); + ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fc_coring_prm", + eed->fc_coring_prm); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_thres0", eed->aerel_thres0); ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_gain0", eed->aerel_gain0); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h index aa38a35f75dea..05f817125d3ca 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h @@ -20,26 +20,26 @@ void ia_css_eed1_8_vmem_encode( - struct eed1_8_vmem_params *to, - const struct ia_css_eed1_8_config *from, - size_t size); + struct eed1_8_vmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size); void ia_css_eed1_8_encode( - struct eed1_8_dmem_params *to, - const struct ia_css_eed1_8_config *from, - size_t size); + struct eed1_8_dmem_params *to, + const struct ia_css_eed1_8_config *from, + size_t size); void ia_css_init_eed1_8_state( - void *state, - size_t size); + void *state, + size_t size); #ifndef IA_CSS_NO_DEBUG void ia_css_eed1_8_debug_dtrace( - const struct ia_css_eed1_8_config *config, - unsigned int level); + const struct ia_css_eed1_8_config *config, + unsigned int level); #endif #endif /* __IA_CSS_EED1_8_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h index 303ec5193ffcf..b8fdb7a51a127 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h @@ -77,8 +77,10 @@ struct ia_css_eed1_8_config { s32 dew_enhance_seg_x[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: X. */ s32 dew_enhance_seg_y[IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS]; /** Segment data for directional edge weight: Y. */ - s32 dew_enhance_seg_slope[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Slope. */ - s32 dew_enhance_seg_exp[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)]; /** Segment data for directional edge weight: Exponent. */ + s32 dew_enhance_seg_slope[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - + 1)]; /** Segment data for directional edge weight: Slope. */ + s32 dew_enhance_seg_exp[(IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - + 1)]; /** Segment data for directional edge weight: Exponent. */ s32 dedgew_max; /** Max Weight for Directional Edge. */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c index de08cc2f41f8f..0b96b9618ab6e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c @@ -28,9 +28,9 @@ const struct ia_css_formats_config default_formats_config = { void ia_css_formats_encode( - struct sh_css_isp_formats_params *to, - const struct ia_css_formats_config *from, - unsigned int size) + struct sh_css_isp_formats_params *to, + const struct ia_css_formats_config *from, + unsigned int size) { (void)size; to->video_full_range_flag = from->video_full_range_flag; @@ -40,12 +40,12 @@ ia_css_formats_encode( /* FIXME: See BZ 4427 */ void ia_css_formats_dump( - const struct sh_css_isp_formats_params *formats, - unsigned int level) + const struct sh_css_isp_formats_params *formats, + unsigned int level) { if (!formats) return; ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "video_full_range_flag", formats->video_full_range_flag); + "video_full_range_flag", formats->video_full_range_flag); } #endif @@ -53,11 +53,11 @@ ia_css_formats_dump( /* FIXME: See BZ 4427 */ void ia_css_formats_debug_dtrace( - const struct ia_css_formats_config *config, - unsigned int level) + const struct ia_css_formats_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.video_full_range_flag=%d\n", - config->video_full_range_flag); + "config.video_full_range_flag=%d\n", + config->video_full_range_flag); } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h index a6a4a2e41b21e..0aac424d9d549 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h @@ -22,23 +22,23 @@ extern const struct ia_css_formats_config default_formats_config; void ia_css_formats_encode( - struct sh_css_isp_formats_params *to, - const struct ia_css_formats_config *from, - unsigned int size); + struct sh_css_isp_formats_params *to, + const struct ia_css_formats_config *from, + unsigned int size); #ifndef IA_CSS_NO_DEBUG /* FIXME: See BZ 4427 */ void ia_css_formats_dump( - const struct sh_css_isp_formats_params *formats, - unsigned int level); + const struct sh_css_isp_formats_params *formats, + unsigned int level); #endif #ifndef IA_CSS_NO_DEBUG /* FIXME: See BZ 4427 */ void ia_css_formats_debug_dtrace( - const struct ia_css_formats_config *formats, - unsigned int level); + const struct ia_css_formats_config *formats, + unsigned int level); #endif /*IA_CSS_NO_DEBUG*/ #endif /* __IA_CSS_FORMATS_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c index 06d54dd285b0f..7b55dfea359a8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c @@ -28,9 +28,9 @@ void ia_css_fpn_encode( - struct sh_css_isp_fpn_params *to, - const struct ia_css_fpn_table *from, - unsigned int size) + struct sh_css_isp_fpn_params *to, + const struct ia_css_fpn_table *from, + unsigned int size) { (void)size; to->shift = from->shift; @@ -39,22 +39,22 @@ ia_css_fpn_encode( void ia_css_fpn_dump( - const struct sh_css_isp_fpn_params *fpn, - unsigned int level) + const struct sh_css_isp_fpn_params *fpn, + unsigned int level) { if (!fpn) return; ia_css_debug_dtrace(level, "Fixed Pattern Noise Reduction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "fpn_shift", fpn->shift); + "fpn_shift", fpn->shift); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "fpn_enabled", fpn->enabled); + "fpn_enabled", fpn->enabled); } void ia_css_fpn_config( - struct sh_css_isp_fpn_isp_config *to, - const struct ia_css_fpn_configuration *from, - unsigned int size) + struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; @@ -68,8 +68,8 @@ ia_css_fpn_config( void ia_css_fpn_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; const struct ia_css_fpn_configuration config = { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h index 0aeea3752e65f..02e85570bd1c0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h @@ -21,24 +21,24 @@ void ia_css_fpn_encode( - struct sh_css_isp_fpn_params *to, - const struct ia_css_fpn_table *from, - unsigned int size); + struct sh_css_isp_fpn_params *to, + const struct ia_css_fpn_table *from, + unsigned int size); void ia_css_fpn_dump( - const struct sh_css_isp_fpn_params *fpn, - unsigned int level); + const struct sh_css_isp_fpn_params *fpn, + unsigned int level); void ia_css_fpn_config( - struct sh_css_isp_fpn_isp_config *to, - const struct ia_css_fpn_configuration *from, - unsigned int size); + struct sh_css_isp_fpn_isp_config *to, + const struct ia_css_fpn_configuration *from, + unsigned int size); void ia_css_fpn_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_FPN_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c index 0635190d3b716..1a489c93eb97f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c @@ -35,24 +35,24 @@ const struct ia_css_ce_config default_ce_config = { void ia_css_gc_encode( - struct sh_css_isp_gc_params *to, - const struct ia_css_gc_config *from, - unsigned int size) + struct sh_css_isp_gc_params *to, + const struct ia_css_gc_config *from, + unsigned int size) { (void)size; to->gain_k1 = uDIGIT_FITTING((int)from->gain_k1, 16, - IA_CSS_GAMMA_GAIN_K_SHIFT); + IA_CSS_GAMMA_GAIN_K_SHIFT); to->gain_k2 = uDIGIT_FITTING((int)from->gain_k2, 16, - IA_CSS_GAMMA_GAIN_K_SHIFT); + IA_CSS_GAMMA_GAIN_K_SHIFT); } void ia_css_ce_encode( - struct sh_css_isp_ce_params *to, - const struct ia_css_ce_config *from, - unsigned int size) + struct sh_css_isp_ce_params *to, + const struct ia_css_ce_config *from, + unsigned int size) { (void)size; to->uv_level_min = from->uv_level_min; @@ -61,9 +61,9 @@ ia_css_ce_encode( void ia_css_gc_vamem_encode( - struct sh_css_isp_gc_vamem_params *to, - const struct ia_css_gamma_table *from, - unsigned int size) + struct sh_css_isp_gc_vamem_params *to, + const struct ia_css_gamma_table *from, + unsigned int size) { (void)size; memcpy(&to->gc, &from->data, sizeof(to->gc)); @@ -72,46 +72,46 @@ ia_css_gc_vamem_encode( #ifndef IA_CSS_NO_DEBUG void ia_css_gc_dump( - const struct sh_css_isp_gc_params *gc, - unsigned int level) + const struct sh_css_isp_gc_params *gc, + unsigned int level) { if (!gc) return; ia_css_debug_dtrace(level, "Gamma Correction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "gamma_gain_k1", gc->gain_k1); + "gamma_gain_k1", gc->gain_k1); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "gamma_gain_k2", gc->gain_k2); + "gamma_gain_k2", gc->gain_k2); } void ia_css_ce_dump( - const struct sh_css_isp_ce_params *ce, - unsigned int level) + const struct sh_css_isp_ce_params *ce, + unsigned int level) { ia_css_debug_dtrace(level, "Chroma Enhancement:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ce_uv_level_min", ce->uv_level_min); + "ce_uv_level_min", ce->uv_level_min); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ce_uv_level_max", ce->uv_level_max); + "ce_uv_level_max", ce->uv_level_max); } void ia_css_gc_debug_dtrace( - const struct ia_css_gc_config *config, - unsigned int level) + const struct ia_css_gc_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.gain_k1=%d, config.gain_k2=%d\n", - config->gain_k1, config->gain_k2); + "config.gain_k1=%d, config.gain_k2=%d\n", + config->gain_k1, config->gain_k2); } void ia_css_ce_debug_dtrace( - const struct ia_css_ce_config *config, - unsigned int level) + const struct ia_css_ce_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.uv_level_min=%d, config.uv_level_max=%d\n", - config->uv_level_min, config->uv_level_max); + "config.uv_level_min=%d, config.uv_level_max=%d\n", + config->uv_level_min, config->uv_level_max); } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h index 4f470780002c9..2fb2927b07f1b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h @@ -23,42 +23,42 @@ extern const struct ia_css_ce_config default_ce_config; void ia_css_gc_encode( - struct sh_css_isp_gc_params *to, - const struct ia_css_gc_config *from, - unsigned int size); + struct sh_css_isp_gc_params *to, + const struct ia_css_gc_config *from, + unsigned int size); void ia_css_gc_vamem_encode( - struct sh_css_isp_gc_vamem_params *to, - const struct ia_css_gamma_table *from, - unsigned int size); + struct sh_css_isp_gc_vamem_params *to, + const struct ia_css_gamma_table *from, + unsigned int size); void ia_css_ce_encode( - struct sh_css_isp_ce_params *to, - const struct ia_css_ce_config *from, - unsigned int size); + struct sh_css_isp_ce_params *to, + const struct ia_css_ce_config *from, + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_gc_dump( - const struct sh_css_isp_gc_params *gc, - unsigned int level); + const struct sh_css_isp_gc_params *gc, + unsigned int level); void ia_css_ce_dump( - const struct sh_css_isp_ce_params *ce, - unsigned int level); + const struct sh_css_isp_ce_params *ce, + unsigned int level); void ia_css_gc_debug_dtrace( - const struct ia_css_gc_config *config, - unsigned int level); + const struct ia_css_gc_config *config, + unsigned int level); void ia_css_ce_debug_dtrace( - const struct ia_css_ce_config *config, - unsigned int level); + const struct ia_css_ce_config *config, + unsigned int level); #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c index 0c51d283a070f..15cf0575aac5f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c @@ -25,173 +25,173 @@ struct ia_css_gamma_table default_gamma_table; static const uint16_t default_gamma_table_data[IA_CSS_VAMEM_2_GAMMA_TABLE_SIZE] = { - 0, 4, 8, 12, 17, 21, 27, 32, - 38, 44, 49, 55, 61, 66, 71, 76, - 80, 84, 88, 92, 95, 98, 102, 105, -108, 110, 113, 116, 118, 121, 123, 126, -128, 130, 132, 135, 137, 139, 141, 143, -145, 146, 148, 150, 152, 153, 155, 156, -158, 160, 161, 162, 164, 165, 166, 168, -169, 170, 171, 172, 174, 175, 176, 177, -178, 179, 180, 181, 182, 183, 184, 184, -185, 186, 187, 188, 189, 189, 190, 191, -192, 192, 193, 194, 195, 195, 196, 197, -197, 198, 198, 199, 200, 200, 201, 201, -202, 203, 203, 204, 204, 205, 205, 206, -206, 207, 207, 208, 208, 209, 209, 210, -210, 210, 211, 211, 212, 212, 213, 213, -214, 214, 214, 215, 215, 216, 216, 216, -217, 217, 218, 218, 218, 219, 219, 220, -220, 220, 221, 221, 222, 222, 222, 223, -223, 223, 224, 224, 225, 225, 225, 226, -226, 226, 227, 227, 227, 228, 228, 228, -229, 229, 229, 230, 230, 230, 231, 231, -231, 232, 232, 232, 233, 233, 233, 234, -234, 234, 234, 235, 235, 235, 236, 236, -236, 237, 237, 237, 237, 238, 238, 238, -239, 239, 239, 239, 240, 240, 240, 241, -241, 241, 241, 242, 242, 242, 242, 243, -243, 243, 243, 244, 244, 244, 245, 245, -245, 245, 246, 246, 246, 246, 247, 247, -247, 247, 248, 248, 248, 248, 249, 249, -249, 249, 250, 250, 250, 250, 251, 251, -251, 251, 252, 252, 252, 252, 253, 253, -253, 253, 254, 254, 254, 254, 255, 255, -255 + 0, 4, 8, 12, 17, 21, 27, 32, + 38, 44, 49, 55, 61, 66, 71, 76, + 80, 84, 88, 92, 95, 98, 102, 105, + 108, 110, 113, 116, 118, 121, 123, 126, + 128, 130, 132, 135, 137, 139, 141, 143, + 145, 146, 148, 150, 152, 153, 155, 156, + 158, 160, 161, 162, 164, 165, 166, 168, + 169, 170, 171, 172, 174, 175, 176, 177, + 178, 179, 180, 181, 182, 183, 184, 184, + 185, 186, 187, 188, 189, 189, 190, 191, + 192, 192, 193, 194, 195, 195, 196, 197, + 197, 198, 198, 199, 200, 200, 201, 201, + 202, 203, 203, 204, 204, 205, 205, 206, + 206, 207, 207, 208, 208, 209, 209, 210, + 210, 210, 211, 211, 212, 212, 213, 213, + 214, 214, 214, 215, 215, 216, 216, 216, + 217, 217, 218, 218, 218, 219, 219, 220, + 220, 220, 221, 221, 222, 222, 222, 223, + 223, 223, 224, 224, 225, 225, 225, 226, + 226, 226, 227, 227, 227, 228, 228, 228, + 229, 229, 229, 230, 230, 230, 231, 231, + 231, 232, 232, 232, 233, 233, 233, 234, + 234, 234, 234, 235, 235, 235, 236, 236, + 236, 237, 237, 237, 237, 238, 238, 238, + 239, 239, 239, 239, 240, 240, 240, 241, + 241, 241, 241, 242, 242, 242, 242, 243, + 243, 243, 243, 244, 244, 244, 245, 245, + 245, 245, 246, 246, 246, 246, 247, 247, + 247, 247, 248, 248, 248, 248, 249, 249, + 249, 249, 250, 250, 250, 250, 251, 251, + 251, 251, 252, 252, 252, 252, 253, 253, + 253, 253, 254, 254, 254, 254, 255, 255, + 255 }; #elif defined(HAS_VAMEM_VERSION_1) static const uint16_t default_gamma_table_data[IA_CSS_VAMEM_1_GAMMA_TABLE_SIZE] = { - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 16, - 17, 18, 19, 20, 21, 23, 24, 25, - 27, 28, 29, 31, 32, 33, 35, 36, - 38, 39, 41, 42, 44, 45, 47, 48, - 49, 51, 52, 54, 55, 57, 58, 60, - 61, 62, 64, 65, 66, 68, 69, 70, - 71, 72, 74, 75, 76, 77, 78, 79, - 80, 81, 82, 83, 84, 85, 86, 87, - 88, 89, 90, 91, 92, 93, 93, 94, - 95, 96, 97, 98, 98, 99, 100, 101, - 102, 102, 103, 104, 105, 105, 106, 107, - 108, 108, 109, 110, 110, 111, 112, 112, - 113, 114, 114, 115, 116, 116, 117, 118, - 118, 119, 120, 120, 121, 121, 122, 123, - 123, 124, 125, 125, 126, 126, 127, 127, /* 128 */ - 128, 129, 129, 130, 130, 131, 131, 132, - 132, 133, 134, 134, 135, 135, 136, 136, - 137, 137, 138, 138, 139, 139, 140, 140, - 141, 141, 142, 142, 143, 143, 144, 144, - 145, 145, 145, 146, 146, 147, 147, 148, - 148, 149, 149, 150, 150, 150, 151, 151, - 152, 152, 152, 153, 153, 154, 154, 155, - 155, 155, 156, 156, 156, 157, 157, 158, - 158, 158, 159, 159, 160, 160, 160, 161, - 161, 161, 162, 162, 162, 163, 163, 163, - 164, 164, 164, 165, 165, 165, 166, 166, - 166, 167, 167, 167, 168, 168, 168, 169, - 169, 169, 170, 170, 170, 170, 171, 171, - 171, 172, 172, 172, 172, 173, 173, 173, - 174, 174, 174, 174, 175, 175, 175, 176, - 176, 176, 176, 177, 177, 177, 177, 178, /* 256 */ - 178, 178, 178, 179, 179, 179, 179, 180, - 180, 180, 180, 181, 181, 181, 181, 182, - 182, 182, 182, 182, 183, 183, 183, 183, - 184, 184, 184, 184, 184, 185, 185, 185, - 185, 186, 186, 186, 186, 186, 187, 187, - 187, 187, 187, 188, 188, 188, 188, 188, - 189, 189, 189, 189, 189, 190, 190, 190, - 190, 190, 191, 191, 191, 191, 191, 192, - 192, 192, 192, 192, 192, 193, 193, 193, - 193, 193, 194, 194, 194, 194, 194, 194, - 195, 195, 195, 195, 195, 195, 196, 196, - 196, 196, 196, 196, 197, 197, 197, 197, - 197, 197, 198, 198, 198, 198, 198, 198, - 198, 199, 199, 199, 199, 199, 199, 200, - 200, 200, 200, 200, 200, 200, 201, 201, - 201, 201, 201, 201, 201, 202, 202, 202, /* 384 */ - 202, 202, 202, 202, 203, 203, 203, 203, - 203, 203, 203, 204, 204, 204, 204, 204, - 204, 204, 204, 205, 205, 205, 205, 205, - 205, 205, 205, 206, 206, 206, 206, 206, - 206, 206, 206, 207, 207, 207, 207, 207, - 207, 207, 207, 208, 208, 208, 208, 208, - 208, 208, 208, 209, 209, 209, 209, 209, - 209, 209, 209, 209, 210, 210, 210, 210, - 210, 210, 210, 210, 210, 211, 211, 211, - 211, 211, 211, 211, 211, 211, 212, 212, - 212, 212, 212, 212, 212, 212, 212, 213, - 213, 213, 213, 213, 213, 213, 213, 213, - 214, 214, 214, 214, 214, 214, 214, 214, - 214, 214, 215, 215, 215, 215, 215, 215, - 215, 215, 215, 216, 216, 216, 216, 216, - 216, 216, 216, 216, 216, 217, 217, 217, /* 512 */ - 217, 217, 217, 217, 217, 217, 217, 218, - 218, 218, 218, 218, 218, 218, 218, 218, - 218, 219, 219, 219, 219, 219, 219, 219, - 219, 219, 219, 220, 220, 220, 220, 220, - 220, 220, 220, 220, 220, 221, 221, 221, - 221, 221, 221, 221, 221, 221, 221, 221, - 222, 222, 222, 222, 222, 222, 222, 222, - 222, 222, 223, 223, 223, 223, 223, 223, - 223, 223, 223, 223, 223, 224, 224, 224, - 224, 224, 224, 224, 224, 224, 224, 224, - 225, 225, 225, 225, 225, 225, 225, 225, - 225, 225, 225, 226, 226, 226, 226, 226, - 226, 226, 226, 226, 226, 226, 226, 227, - 227, 227, 227, 227, 227, 227, 227, 227, - 227, 227, 228, 228, 228, 228, 228, 228, - 228, 228, 228, 228, 228, 228, 229, 229, - 229, 229, 229, 229, 229, 229, 229, 229, - 229, 229, 230, 230, 230, 230, 230, 230, - 230, 230, 230, 230, 230, 230, 231, 231, - 231, 231, 231, 231, 231, 231, 231, 231, - 231, 231, 231, 232, 232, 232, 232, 232, - 232, 232, 232, 232, 232, 232, 232, 233, - 233, 233, 233, 233, 233, 233, 233, 233, - 233, 233, 233, 233, 234, 234, 234, 234, - 234, 234, 234, 234, 234, 234, 234, 234, - 234, 235, 235, 235, 235, 235, 235, 235, - 235, 235, 235, 235, 235, 235, 236, 236, - 236, 236, 236, 236, 236, 236, 236, 236, - 236, 236, 236, 236, 237, 237, 237, 237, - 237, 237, 237, 237, 237, 237, 237, 237, - 237, 237, 238, 238, 238, 238, 238, 238, - 238, 238, 238, 238, 238, 238, 238, 238, - 239, 239, 239, 239, 239, 239, 239, 239, - 239, 239, 239, 239, 239, 239, 240, 240, - 240, 240, 240, 240, 240, 240, 240, 240, - 240, 240, 240, 240, 241, 241, 241, 241, - 241, 241, 241, 241, 241, 241, 241, 241, - 241, 241, 241, 242, 242, 242, 242, 242, - 242, 242, 242, 242, 242, 242, 242, 242, - 242, 242, 243, 243, 243, 243, 243, 243, - 243, 243, 243, 243, 243, 243, 243, 243, - 243, 244, 244, 244, 244, 244, 244, 244, - 244, 244, 244, 244, 244, 244, 244, 244, - 245, 245, 245, 245, 245, 245, 245, 245, - 245, 245, 245, 245, 245, 245, 245, 246, - 246, 246, 246, 246, 246, 246, 246, 246, - 246, 246, 246, 246, 246, 246, 246, 247, - 247, 247, 247, 247, 247, 247, 247, 247, - 247, 247, 247, 247, 247, 247, 247, 248, - 248, 248, 248, 248, 248, 248, 248, 248, - 248, 248, 248, 248, 248, 248, 248, 249, - 249, 249, 249, 249, 249, 249, 249, 249, - 249, 249, 249, 249, 249, 249, 249, 250, - 250, 250, 250, 250, 250, 250, 250, 250, - 250, 250, 250, 250, 250, 250, 250, 251, - 251, 251, 251, 251, 251, 251, 251, 251, - 251, 251, 251, 251, 251, 251, 251, 252, - 252, 252, 252, 252, 252, 252, 252, 252, - 252, 252, 252, 252, 252, 252, 252, 253, - 253, 253, 253, 253, 253, 253, 253, 253, - 253, 253, 253, 253, 253, 253, 253, 253, - 254, 254, 254, 254, 254, 254, 254, 254, - 254, 254, 254, 254, 254, 254, 254, 254, - 255, 255, 255, 255, 255, 255, 255, 255 + 0, 1, 2, 3, 4, 5, 6, 7, + 8, 9, 10, 11, 12, 13, 14, 16, + 17, 18, 19, 20, 21, 23, 24, 25, + 27, 28, 29, 31, 32, 33, 35, 36, + 38, 39, 41, 42, 44, 45, 47, 48, + 49, 51, 52, 54, 55, 57, 58, 60, + 61, 62, 64, 65, 66, 68, 69, 70, + 71, 72, 74, 75, 76, 77, 78, 79, + 80, 81, 82, 83, 84, 85, 86, 87, + 88, 89, 90, 91, 92, 93, 93, 94, + 95, 96, 97, 98, 98, 99, 100, 101, + 102, 102, 103, 104, 105, 105, 106, 107, + 108, 108, 109, 110, 110, 111, 112, 112, + 113, 114, 114, 115, 116, 116, 117, 118, + 118, 119, 120, 120, 121, 121, 122, 123, + 123, 124, 125, 125, 126, 126, 127, 127, /* 128 */ + 128, 129, 129, 130, 130, 131, 131, 132, + 132, 133, 134, 134, 135, 135, 136, 136, + 137, 137, 138, 138, 139, 139, 140, 140, + 141, 141, 142, 142, 143, 143, 144, 144, + 145, 145, 145, 146, 146, 147, 147, 148, + 148, 149, 149, 150, 150, 150, 151, 151, + 152, 152, 152, 153, 153, 154, 154, 155, + 155, 155, 156, 156, 156, 157, 157, 158, + 158, 158, 159, 159, 160, 160, 160, 161, + 161, 161, 162, 162, 162, 163, 163, 163, + 164, 164, 164, 165, 165, 165, 166, 166, + 166, 167, 167, 167, 168, 168, 168, 169, + 169, 169, 170, 170, 170, 170, 171, 171, + 171, 172, 172, 172, 172, 173, 173, 173, + 174, 174, 174, 174, 175, 175, 175, 176, + 176, 176, 176, 177, 177, 177, 177, 178, /* 256 */ + 178, 178, 178, 179, 179, 179, 179, 180, + 180, 180, 180, 181, 181, 181, 181, 182, + 182, 182, 182, 182, 183, 183, 183, 183, + 184, 184, 184, 184, 184, 185, 185, 185, + 185, 186, 186, 186, 186, 186, 187, 187, + 187, 187, 187, 188, 188, 188, 188, 188, + 189, 189, 189, 189, 189, 190, 190, 190, + 190, 190, 191, 191, 191, 191, 191, 192, + 192, 192, 192, 192, 192, 193, 193, 193, + 193, 193, 194, 194, 194, 194, 194, 194, + 195, 195, 195, 195, 195, 195, 196, 196, + 196, 196, 196, 196, 197, 197, 197, 197, + 197, 197, 198, 198, 198, 198, 198, 198, + 198, 199, 199, 199, 199, 199, 199, 200, + 200, 200, 200, 200, 200, 200, 201, 201, + 201, 201, 201, 201, 201, 202, 202, 202, /* 384 */ + 202, 202, 202, 202, 203, 203, 203, 203, + 203, 203, 203, 204, 204, 204, 204, 204, + 204, 204, 204, 205, 205, 205, 205, 205, + 205, 205, 205, 206, 206, 206, 206, 206, + 206, 206, 206, 207, 207, 207, 207, 207, + 207, 207, 207, 208, 208, 208, 208, 208, + 208, 208, 208, 209, 209, 209, 209, 209, + 209, 209, 209, 209, 210, 210, 210, 210, + 210, 210, 210, 210, 210, 211, 211, 211, + 211, 211, 211, 211, 211, 211, 212, 212, + 212, 212, 212, 212, 212, 212, 212, 213, + 213, 213, 213, 213, 213, 213, 213, 213, + 214, 214, 214, 214, 214, 214, 214, 214, + 214, 214, 215, 215, 215, 215, 215, 215, + 215, 215, 215, 216, 216, 216, 216, 216, + 216, 216, 216, 216, 216, 217, 217, 217, /* 512 */ + 217, 217, 217, 217, 217, 217, 217, 218, + 218, 218, 218, 218, 218, 218, 218, 218, + 218, 219, 219, 219, 219, 219, 219, 219, + 219, 219, 219, 220, 220, 220, 220, 220, + 220, 220, 220, 220, 220, 221, 221, 221, + 221, 221, 221, 221, 221, 221, 221, 221, + 222, 222, 222, 222, 222, 222, 222, 222, + 222, 222, 223, 223, 223, 223, 223, 223, + 223, 223, 223, 223, 223, 224, 224, 224, + 224, 224, 224, 224, 224, 224, 224, 224, + 225, 225, 225, 225, 225, 225, 225, 225, + 225, 225, 225, 226, 226, 226, 226, 226, + 226, 226, 226, 226, 226, 226, 226, 227, + 227, 227, 227, 227, 227, 227, 227, 227, + 227, 227, 228, 228, 228, 228, 228, 228, + 228, 228, 228, 228, 228, 228, 229, 229, + 229, 229, 229, 229, 229, 229, 229, 229, + 229, 229, 230, 230, 230, 230, 230, 230, + 230, 230, 230, 230, 230, 230, 231, 231, + 231, 231, 231, 231, 231, 231, 231, 231, + 231, 231, 231, 232, 232, 232, 232, 232, + 232, 232, 232, 232, 232, 232, 232, 233, + 233, 233, 233, 233, 233, 233, 233, 233, + 233, 233, 233, 233, 234, 234, 234, 234, + 234, 234, 234, 234, 234, 234, 234, 234, + 234, 235, 235, 235, 235, 235, 235, 235, + 235, 235, 235, 235, 235, 235, 236, 236, + 236, 236, 236, 236, 236, 236, 236, 236, + 236, 236, 236, 236, 237, 237, 237, 237, + 237, 237, 237, 237, 237, 237, 237, 237, + 237, 237, 238, 238, 238, 238, 238, 238, + 238, 238, 238, 238, 238, 238, 238, 238, + 239, 239, 239, 239, 239, 239, 239, 239, + 239, 239, 239, 239, 239, 239, 240, 240, + 240, 240, 240, 240, 240, 240, 240, 240, + 240, 240, 240, 240, 241, 241, 241, 241, + 241, 241, 241, 241, 241, 241, 241, 241, + 241, 241, 241, 242, 242, 242, 242, 242, + 242, 242, 242, 242, 242, 242, 242, 242, + 242, 242, 243, 243, 243, 243, 243, 243, + 243, 243, 243, 243, 243, 243, 243, 243, + 243, 244, 244, 244, 244, 244, 244, 244, + 244, 244, 244, 244, 244, 244, 244, 244, + 245, 245, 245, 245, 245, 245, 245, 245, + 245, 245, 245, 245, 245, 245, 245, 246, + 246, 246, 246, 246, 246, 246, 246, 246, + 246, 246, 246, 246, 246, 246, 246, 247, + 247, 247, 247, 247, 247, 247, 247, 247, + 247, 247, 247, 247, 247, 247, 247, 248, + 248, 248, 248, 248, 248, 248, 248, 248, + 248, 248, 248, 248, 248, 248, 248, 249, + 249, 249, 249, 249, 249, 249, 249, 249, + 249, 249, 249, 249, 249, 249, 249, 250, + 250, 250, 250, 250, 250, 250, 250, 250, + 250, 250, 250, 250, 250, 250, 250, 251, + 251, 251, 251, 251, 251, 251, 251, 251, + 251, 251, 251, 251, 251, 251, 251, 252, + 252, 252, 252, 252, 252, 252, 252, 252, + 252, 252, 252, 252, 252, 252, 252, 253, + 253, 253, 253, 253, 253, 253, 253, 253, + 253, 253, 253, 253, 253, 253, 253, 253, + 254, 254, 254, 254, 254, 254, 254, 254, + 254, 254, 254, 254, 254, 254, 254, 254, + 255, 255, 255, 255, 255, 255, 255, 255 }; #else diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.c index 6d8ef22985713..29a1e013a9aa2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.c @@ -35,27 +35,27 @@ const struct ia_css_cc_config default_rgb2yuv_cc_config = { void ia_css_yuv2rgb_encode( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size) + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size) { ia_css_encode_cc(to, from, size); } void ia_css_rgb2yuv_encode( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size) + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size) { ia_css_encode_cc(to, from, size); } void ia_css_r_gamma_vamem_encode( - struct sh_css_isp_rgb_gamma_vamem_params *to, - const struct ia_css_rgb_gamma_table *from, - unsigned int size) + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned int size) { (void)size; memcpy(&to->gc, &from->data, sizeof(to->gc)); @@ -63,9 +63,9 @@ ia_css_r_gamma_vamem_encode( void ia_css_g_gamma_vamem_encode( - struct sh_css_isp_rgb_gamma_vamem_params *to, - const struct ia_css_rgb_gamma_table *from, - unsigned int size) + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned int size) { (void)size; memcpy(&to->gc, &from->data, sizeof(to->gc)); @@ -73,9 +73,9 @@ ia_css_g_gamma_vamem_encode( void ia_css_b_gamma_vamem_encode( - struct sh_css_isp_rgb_gamma_vamem_params *to, - const struct ia_css_rgb_gamma_table *from, - unsigned int size) + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned int size) { (void)size; memcpy(&to->gc, &from->data, sizeof(to->gc)); @@ -84,24 +84,24 @@ ia_css_b_gamma_vamem_encode( #ifndef IA_CSS_NO_DEBUG void ia_css_yuv2rgb_dump( - const struct sh_css_isp_csc_params *yuv2rgb, - unsigned int level) + const struct sh_css_isp_csc_params *yuv2rgb, + unsigned int level) { ia_css_cc_dump(yuv2rgb, level, "YUV to RGB Conversion"); } void ia_css_rgb2yuv_dump( - const struct sh_css_isp_csc_params *rgb2yuv, - unsigned int level) + const struct sh_css_isp_csc_params *rgb2yuv, + unsigned int level) { ia_css_cc_dump(rgb2yuv, level, "RGB to YUV Conversion"); } void ia_css_rgb_gamma_table_debug_dtrace( - const struct ia_css_rgb_gamma_table *config, - unsigned int level) + const struct ia_css_rgb_gamma_table *config, + unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h index 146bb1d76e403..ca7d545764713 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h @@ -24,49 +24,49 @@ extern const struct ia_css_cc_config default_rgb2yuv_cc_config; void ia_css_yuv2rgb_encode( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size); + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size); void ia_css_rgb2yuv_encode( - struct sh_css_isp_csc_params *to, - const struct ia_css_cc_config *from, - unsigned int size); + struct sh_css_isp_csc_params *to, + const struct ia_css_cc_config *from, + unsigned int size); void ia_css_r_gamma_vamem_encode( - struct sh_css_isp_rgb_gamma_vamem_params *to, - const struct ia_css_rgb_gamma_table *from, - unsigned int size); + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned int size); void ia_css_g_gamma_vamem_encode( - struct sh_css_isp_rgb_gamma_vamem_params *to, - const struct ia_css_rgb_gamma_table *from, - unsigned int size); + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned int size); void ia_css_b_gamma_vamem_encode( - struct sh_css_isp_rgb_gamma_vamem_params *to, - const struct ia_css_rgb_gamma_table *from, - unsigned int size); + struct sh_css_isp_rgb_gamma_vamem_params *to, + const struct ia_css_rgb_gamma_table *from, + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_yuv2rgb_dump( - const struct sh_css_isp_csc_params *yuv2rgb, - unsigned int level); + const struct sh_css_isp_csc_params *yuv2rgb, + unsigned int level); void ia_css_rgb2yuv_dump( - const struct sh_css_isp_csc_params *rgb2yuv, - unsigned int level); + const struct sh_css_isp_csc_params *rgb2yuv, + unsigned int level); void ia_css_rgb_gamma_table_debug_dtrace( - const struct ia_css_rgb_gamma_table *config, - unsigned int level); + const struct ia_css_rgb_gamma_table *config, + unsigned int level); #define ia_css_yuv2rgb_debug_dtrace ia_css_cc_config_debug_dtrace #define ia_css_rgb2yuv_debug_dtrace ia_css_cc_config_debug_dtrace diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c index a90d9d0a18547..d2fe0052fb002 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c @@ -29,76 +29,76 @@ struct ia_css_rgb_gamma_table default_b_gamma_table; static const uint16_t default_gamma_table_data[IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE] = { - 0, 72, 144, 216, 288, 360, 426, 486, - 541, 592, 641, 687, 730, 772, 812, 850, - 887, 923, 958, 991, 1024, 1055, 1086, 1117, -1146, 1175, 1203, 1230, 1257, 1284, 1310, 1335, -1360, 1385, 1409, 1433, 1457, 1480, 1502, 1525, -1547, 1569, 1590, 1612, 1632, 1653, 1674, 1694, -1714, 1734, 1753, 1772, 1792, 1811, 1829, 1848, -1866, 1884, 1902, 1920, 1938, 1955, 1973, 1990, -2007, 2024, 2040, 2057, 2074, 2090, 2106, 2122, -2138, 2154, 2170, 2185, 2201, 2216, 2231, 2247, -2262, 2277, 2291, 2306, 2321, 2335, 2350, 2364, -2378, 2393, 2407, 2421, 2435, 2449, 2462, 2476, -2490, 2503, 2517, 2530, 2543, 2557, 2570, 2583, -2596, 2609, 2622, 2634, 2647, 2660, 2673, 2685, -2698, 2710, 2722, 2735, 2747, 2759, 2771, 2783, -2795, 2807, 2819, 2831, 2843, 2855, 2867, 2878, -2890, 2901, 2913, 2924, 2936, 2947, 2958, 2970, -2981, 2992, 3003, 3014, 3025, 3036, 3047, 3058, -3069, 3080, 3091, 3102, 3112, 3123, 3134, 3144, -3155, 3165, 3176, 3186, 3197, 3207, 3217, 3228, -3238, 3248, 3258, 3268, 3279, 3289, 3299, 3309, -3319, 3329, 3339, 3349, 3358, 3368, 3378, 3388, -3398, 3407, 3417, 3427, 3436, 3446, 3455, 3465, -3474, 3484, 3493, 3503, 3512, 3521, 3531, 3540, -3549, 3559, 3568, 3577, 3586, 3595, 3605, 3614, -3623, 3632, 3641, 3650, 3659, 3668, 3677, 3686, -3694, 3703, 3712, 3721, 3730, 3739, 3747, 3756, -3765, 3773, 3782, 3791, 3799, 3808, 3816, 3825, -3833, 3842, 3850, 3859, 3867, 3876, 3884, 3893, -3901, 3909, 3918, 3926, 3934, 3942, 3951, 3959, -3967, 3975, 3984, 3992, 4000, 4008, 4016, 4024, -4032, 4040, 4048, 4056, 4064, 4072, 4080, 4088, -4095 + 0, 72, 144, 216, 288, 360, 426, 486, + 541, 592, 641, 687, 730, 772, 812, 850, + 887, 923, 958, 991, 1024, 1055, 1086, 1117, + 1146, 1175, 1203, 1230, 1257, 1284, 1310, 1335, + 1360, 1385, 1409, 1433, 1457, 1480, 1502, 1525, + 1547, 1569, 1590, 1612, 1632, 1653, 1674, 1694, + 1714, 1734, 1753, 1772, 1792, 1811, 1829, 1848, + 1866, 1884, 1902, 1920, 1938, 1955, 1973, 1990, + 2007, 2024, 2040, 2057, 2074, 2090, 2106, 2122, + 2138, 2154, 2170, 2185, 2201, 2216, 2231, 2247, + 2262, 2277, 2291, 2306, 2321, 2335, 2350, 2364, + 2378, 2393, 2407, 2421, 2435, 2449, 2462, 2476, + 2490, 2503, 2517, 2530, 2543, 2557, 2570, 2583, + 2596, 2609, 2622, 2634, 2647, 2660, 2673, 2685, + 2698, 2710, 2722, 2735, 2747, 2759, 2771, 2783, + 2795, 2807, 2819, 2831, 2843, 2855, 2867, 2878, + 2890, 2901, 2913, 2924, 2936, 2947, 2958, 2970, + 2981, 2992, 3003, 3014, 3025, 3036, 3047, 3058, + 3069, 3080, 3091, 3102, 3112, 3123, 3134, 3144, + 3155, 3165, 3176, 3186, 3197, 3207, 3217, 3228, + 3238, 3248, 3258, 3268, 3279, 3289, 3299, 3309, + 3319, 3329, 3339, 3349, 3358, 3368, 3378, 3388, + 3398, 3407, 3417, 3427, 3436, 3446, 3455, 3465, + 3474, 3484, 3493, 3503, 3512, 3521, 3531, 3540, + 3549, 3559, 3568, 3577, 3586, 3595, 3605, 3614, + 3623, 3632, 3641, 3650, 3659, 3668, 3677, 3686, + 3694, 3703, 3712, 3721, 3730, 3739, 3747, 3756, + 3765, 3773, 3782, 3791, 3799, 3808, 3816, 3825, + 3833, 3842, 3850, 3859, 3867, 3876, 3884, 3893, + 3901, 3909, 3918, 3926, 3934, 3942, 3951, 3959, + 3967, 3975, 3984, 3992, 4000, 4008, 4016, 4024, + 4032, 4040, 4048, 4056, 4064, 4072, 4080, 4088, + 4095 }; #elif defined(HAS_VAMEM_VERSION_1) static const uint16_t default_gamma_table_data[IA_CSS_VAMEM_1_RGB_GAMMA_TABLE_SIZE] = { - 0, 72, 144, 216, 288, 360, 426, 486, - 541, 592, 641, 687, 730, 772, 812, 850, - 887, 923, 958, 991, 1024, 1055, 1086, 1117, -1146, 1175, 1203, 1230, 1257, 1284, 1310, 1335, -1360, 1385, 1409, 1433, 1457, 1480, 1502, 1525, -1547, 1569, 1590, 1612, 1632, 1653, 1674, 1694, -1714, 1734, 1753, 1772, 1792, 1811, 1829, 1848, -1866, 1884, 1902, 1920, 1938, 1955, 1973, 1990, -2007, 2024, 2040, 2057, 2074, 2090, 2106, 2122, -2138, 2154, 2170, 2185, 2201, 2216, 2231, 2247, -2262, 2277, 2291, 2306, 2321, 2335, 2350, 2364, -2378, 2393, 2407, 2421, 2435, 2449, 2462, 2476, -2490, 2503, 2517, 2530, 2543, 2557, 2570, 2583, -2596, 2609, 2622, 2634, 2647, 2660, 2673, 2685, -2698, 2710, 2722, 2735, 2747, 2759, 2771, 2783, -2795, 2807, 2819, 2831, 2843, 2855, 2867, 2878, -2890, 2901, 2913, 2924, 2936, 2947, 2958, 2970, -2981, 2992, 3003, 3014, 3025, 3036, 3047, 3058, -3069, 3080, 3091, 3102, 3112, 3123, 3134, 3144, -3155, 3165, 3176, 3186, 3197, 3207, 3217, 3228, -3238, 3248, 3258, 3268, 3279, 3289, 3299, 3309, -3319, 3329, 3339, 3349, 3358, 3368, 3378, 3388, -3398, 3407, 3417, 3427, 3436, 3446, 3455, 3465, -3474, 3484, 3493, 3503, 3512, 3521, 3531, 3540, -3549, 3559, 3568, 3577, 3586, 3595, 3605, 3614, -3623, 3632, 3641, 3650, 3659, 3668, 3677, 3686, -3694, 3703, 3712, 3721, 3730, 3739, 3747, 3756, -3765, 3773, 3782, 3791, 3799, 3808, 3816, 3825, -3833, 3842, 3850, 3859, 3867, 3876, 3884, 3893, -3901, 3909, 3918, 3926, 3934, 3942, 3951, 3959, -3967, 3975, 3984, 3992, 4000, 4008, 4016, 4024, -4032, 4040, 4048, 4056, 4064, 4072, 4080, 4088 + 0, 72, 144, 216, 288, 360, 426, 486, + 541, 592, 641, 687, 730, 772, 812, 850, + 887, 923, 958, 991, 1024, 1055, 1086, 1117, + 1146, 1175, 1203, 1230, 1257, 1284, 1310, 1335, + 1360, 1385, 1409, 1433, 1457, 1480, 1502, 1525, + 1547, 1569, 1590, 1612, 1632, 1653, 1674, 1694, + 1714, 1734, 1753, 1772, 1792, 1811, 1829, 1848, + 1866, 1884, 1902, 1920, 1938, 1955, 1973, 1990, + 2007, 2024, 2040, 2057, 2074, 2090, 2106, 2122, + 2138, 2154, 2170, 2185, 2201, 2216, 2231, 2247, + 2262, 2277, 2291, 2306, 2321, 2335, 2350, 2364, + 2378, 2393, 2407, 2421, 2435, 2449, 2462, 2476, + 2490, 2503, 2517, 2530, 2543, 2557, 2570, 2583, + 2596, 2609, 2622, 2634, 2647, 2660, 2673, 2685, + 2698, 2710, 2722, 2735, 2747, 2759, 2771, 2783, + 2795, 2807, 2819, 2831, 2843, 2855, 2867, 2878, + 2890, 2901, 2913, 2924, 2936, 2947, 2958, 2970, + 2981, 2992, 3003, 3014, 3025, 3036, 3047, 3058, + 3069, 3080, 3091, 3102, 3112, 3123, 3134, 3144, + 3155, 3165, 3176, 3186, 3197, 3207, 3217, 3228, + 3238, 3248, 3258, 3268, 3279, 3289, 3299, 3309, + 3319, 3329, 3339, 3349, 3358, 3368, 3378, 3388, + 3398, 3407, 3417, 3427, 3436, 3446, 3455, 3465, + 3474, 3484, 3493, 3503, 3512, 3521, 3531, 3540, + 3549, 3559, 3568, 3577, 3586, 3595, 3605, 3614, + 3623, 3632, 3641, 3650, 3659, 3668, 3677, 3686, + 3694, 3703, 3712, 3721, 3730, 3739, 3747, 3756, + 3765, 3773, 3782, 3791, 3799, 3808, 3816, 3825, + 3833, 3842, 3850, 3859, 3867, 3876, 3884, 3893, + 3901, 3909, 3918, 3926, 3934, 3942, 3951, 3959, + 3967, 3975, 3984, 3992, 4000, 4008, 4016, 4024, + 4032, 4040, 4048, 4056, 4064, 4072, 4080, 4088 }; #else #error "VAMEM version must be one of {VAMEM_VERSION_1, VAMEM_VERSION_2}" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h index 7df75918ce4c7..30780394ed7fe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h @@ -43,7 +43,7 @@ union ia_css_rgb_gamma_data { /** RGB Gamma table on vamem type1. This table is not used, because sRGB Gamma Correction is not implemented for ISP2300. */ u16 vamem_2[IA_CSS_VAMEM_2_RGB_GAMMA_TABLE_SIZE]; - /** RGB Gamma table on vamem type2. u0.12, [0,4095] */ + /** RGB Gamma table on vamem type2. u0.12, [0,4095] */ }; struct ia_css_rgb_gamma_table { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.c index 763ce01afe60f..643b7d9095e62 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.c @@ -18,9 +18,9 @@ void ia_css_hdr_init_config( - struct sh_css_isp_hdr_params *to, - const struct ia_css_hdr_config *from, - unsigned int size) + struct sh_css_isp_hdr_params *to, + const struct ia_css_hdr_config *from, + unsigned int size) { int i; (void)size; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h index 5ee0d8dd12c82..ecc8bea3542b9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h @@ -24,8 +24,8 @@ extern const struct ia_css_hdr_config default_hdr_config; void ia_css_hdr_init_config( - struct sh_css_isp_hdr_params *to, - const struct ia_css_hdr_config *from, - unsigned int size); + struct sh_css_isp_hdr_params *to, + const struct ia_css_hdr_config *from, + unsigned int size); #endif /* __IA_CSS_HDR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h index 784c716ce5e39..47651cdf94b73 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h @@ -24,12 +24,18 @@ /* HDR irradiance map parameters on ISP. */ struct sh_css_hdr_irradiance_params { s32 test_irr; - s32 match_shift[HDR_NUM_INPUT_FRAMES - 1]; /* Histogram matching shift parameter */ - s32 match_mul[HDR_NUM_INPUT_FRAMES - 1]; /* Histogram matching multiplication parameter */ - s32 thr_low[HDR_NUM_INPUT_FRAMES - 1]; /* Weight map soft threshold low bound parameter */ - s32 thr_high[HDR_NUM_INPUT_FRAMES - 1]; /* Weight map soft threshold high bound parameter */ - s32 thr_coeff[HDR_NUM_INPUT_FRAMES - 1]; /* Soft threshold linear function coefficient */ - s32 thr_shift[HDR_NUM_INPUT_FRAMES - 1]; /* Soft threshold precision shift parameter */ + s32 match_shift[HDR_NUM_INPUT_FRAMES - + 1]; /* Histogram matching shift parameter */ + s32 match_mul[HDR_NUM_INPUT_FRAMES - + 1]; /* Histogram matching multiplication parameter */ + s32 thr_low[HDR_NUM_INPUT_FRAMES - + 1]; /* Weight map soft threshold low bound parameter */ + s32 thr_high[HDR_NUM_INPUT_FRAMES - + 1]; /* Weight map soft threshold high bound parameter */ + s32 thr_coeff[HDR_NUM_INPUT_FRAMES - + 1]; /* Soft threshold linear function coefficient */ + s32 thr_shift[HDR_NUM_INPUT_FRAMES - + 1]; /* Soft threshold precision shift parameter */ s32 weight_bpp; /* Weight map bits per pixel */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h index 9b4b32bc67530..7c2f8f213befb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h @@ -25,12 +25,18 @@ */ struct ia_css_hdr_irradiance_params { int test_irr; /** Test parameter */ - int match_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Histogram matching shift parameter */ - int match_mul[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Histogram matching multiplication parameter */ - int thr_low[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Weight map soft threshold low bound parameter */ - int thr_high[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Weight map soft threshold high bound parameter */ - int thr_coeff[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Soft threshold linear function coefficien */ - int thr_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - 1]; /** Soft threshold precision shift parameter */ + int match_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - + 1]; /** Histogram matching shift parameter */ + int match_mul[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - + 1]; /** Histogram matching multiplication parameter */ + int thr_low[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - + 1]; /** Weight map soft threshold low bound parameter */ + int thr_high[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - + 1]; /** Weight map soft threshold high bound parameter */ + int thr_coeff[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - + 1]; /** Soft threshold linear function coefficien */ + int thr_shift[IA_CSS_HDR_MAX_NUM_INPUT_FRAMES - + 1]; /** Soft threshold precision shift parameter */ int weight_bpp; /** Weight map bits per pixel */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c index a57a9d124363c..c50b3d136f83f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -24,15 +24,18 @@ void ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; - const struct ia_css_frame **out_frames = (const struct ia_css_frame **)&args->out_frame; - const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **) + &args->out_frame; + const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : + &binary->in_frame_info; const unsigned int ddr_bits_per_element = sizeof(short) * 8; - const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, + ddr_bits_per_element); unsigned int size_get = 0, size_put = 0; unsigned int offset = 0; @@ -42,10 +45,12 @@ ia_css_bayer_io_config( } if (size_get) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; struct dma_port_config config; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() get part enter:\n"); #endif ia_css_dma_configure_from_info(&config, in_frame_info); @@ -55,7 +60,8 @@ ia_css_bayer_io_config( to->stride = config.stride; to->ddr_elems_per_word = ddr_elems_per_word; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() get part leave:\n"); #endif } @@ -65,10 +71,12 @@ ia_css_bayer_io_config( } if (size_put) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; struct dma_port_config config; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() put part enter:\n"); #endif ia_css_dma_configure_from_info(&config, &out_frames[0]->info); @@ -79,7 +87,8 @@ ia_css_bayer_io_config( to->ddr_elems_per_word = ddr_elems_per_word; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() put part leave:\n"); #endif } } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h index 3decbf1a188d1..8eb7affbd2262 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -23,8 +23,8 @@ void ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); #endif /*__BAYER_IO_HOST_H */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c index 5e511edb05e2d..96abc16607210 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -24,15 +24,18 @@ more details. void ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; - const struct ia_css_frame **out_frames = (const struct ia_css_frame **)&args->out_frame; - const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **) + &args->out_frame; + const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : + &binary->in_frame_info; const unsigned int ddr_bits_per_element = sizeof(short) * 8; - const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, + ddr_bits_per_element); unsigned int size_get = 0, size_put = 0; unsigned int offset = 0; @@ -42,10 +45,12 @@ ia_css_bayer_io_config( } if (size_get) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; struct dma_port_config config; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() get part enter:\n"); #endif ia_css_dma_configure_from_info(&config, in_frame_info); @@ -55,7 +60,8 @@ ia_css_bayer_io_config( to->stride = config.stride; to->ddr_elems_per_word = ddr_elems_per_word; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() get part leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() get part leave:\n"); #endif } @@ -65,10 +71,12 @@ ia_css_bayer_io_config( } if (size_put) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; struct dma_port_config config; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() put part enter:\n"); #endif ia_css_dma_configure_from_info(&config, &out_frames[0]->info); @@ -79,7 +87,8 @@ ia_css_bayer_io_config( to->ddr_elems_per_word = ddr_elems_per_word; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_bayer_io_config() put part leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_bayer_io_config() put part leave:\n"); #endif } } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h index eaf54524245a0..42f2d1054afd4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -23,8 +23,8 @@ more details. void ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); #endif /*__BAYER_IO_HOST_H */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c index bc8a695b89692..2fc0c222a5796 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c @@ -24,15 +24,18 @@ more details. void ia_css_yuv444_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args) { const struct ia_css_frame *in_frame = args->in_frame; - const struct ia_css_frame **out_frames = (const struct ia_css_frame **)&args->out_frame; - const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : &binary->in_frame_info; + const struct ia_css_frame **out_frames = (const struct ia_css_frame **) + &args->out_frame; + const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : + &binary->in_frame_info; const unsigned int ddr_bits_per_element = sizeof(short) * 8; - const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, ddr_bits_per_element); + const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, + ddr_bits_per_element); unsigned int size_get = 0, size_put = 0; unsigned int offset = 0; @@ -42,10 +45,12 @@ ia_css_yuv444_io_config( } if (size_get) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; struct dma_port_config config; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() get part enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_yuv444_io_config() get part enter:\n"); #endif ia_css_dma_configure_from_info(&config, in_frame_info); @@ -55,7 +60,8 @@ ia_css_yuv444_io_config( to->stride = config.stride; to->ddr_elems_per_word = ddr_elems_per_word; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() get part leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_yuv444_io_config() get part leave:\n"); #endif } @@ -65,10 +71,12 @@ ia_css_yuv444_io_config( } if (size_put) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *)&binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; + struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; struct dma_port_config config; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() put part enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_yuv444_io_config() put part enter:\n"); #endif ia_css_dma_configure_from_info(&config, &out_frames[0]->info); @@ -79,7 +87,8 @@ ia_css_yuv444_io_config( to->ddr_elems_per_word = ddr_elems_per_word; #ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_yuv444_io_config() put part leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_yuv444_io_config() put part leave:\n"); #endif } } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h index e5b2aa76ceaef..b61d4a2311e7f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h @@ -23,8 +23,8 @@ more details. void ia_css_yuv444_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args); #endif /*__YUV44_IO_HOST_H */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c index cc39a35b999b6..49c1b3e3370df 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c @@ -25,9 +25,9 @@ static const struct ia_css_iterator_configuration default_config = { void ia_css_iterator_config( - struct sh_css_isp_iterator_isp_config *to, - const struct ia_css_iterator_configuration *from, - unsigned int size) + struct sh_css_isp_iterator_isp_config *to, + const struct ia_css_iterator_configuration *from, + unsigned int size) { (void)size; ia_css_frame_info_to_frame_sp_info(&to->input_info, from->input_info); @@ -39,9 +39,8 @@ ia_css_iterator_config( enum ia_css_err ia_css_iterator_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info) -{ + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info) { struct ia_css_frame_info my_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; struct ia_css_iterator_configuration config = default_config; @@ -66,7 +65,8 @@ ia_css_iterator_configure( * the original out res. for video pipe, it has two output pins --- out and * vf_out, so it can keep these two resolutions already. */ if (binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_PREVIEW && - binary->vf_downscale_log2 > 0) { + binary->vf_downscale_log2 > 0) + { /* TODO: Remove this after preview output decimation is fixed * by configuring out&vf info files properly */ my_info.padded_width <<= binary->vf_downscale_log2; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h index 279909cf66a49..c5e8d58e0fe11 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h @@ -22,13 +22,13 @@ void ia_css_iterator_config( - struct sh_css_isp_iterator_isp_config *to, - const struct ia_css_iterator_configuration *from, - unsigned int size); + struct sh_css_isp_iterator_isp_config *to, + const struct ia_css_iterator_configuration *from, + unsigned int size); enum ia_css_err ia_css_iterator_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info); #endif /* __IA_CSS_ITERATOR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c index 7cef616e7d07f..7a6abe0c5b7dd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c @@ -28,9 +28,9 @@ const struct ia_css_macc1_5_config default_macc1_5_config = { void ia_css_macc1_5_encode( - struct sh_css_isp_macc1_5_params *to, - const struct ia_css_macc1_5_config *from, - unsigned int size) + struct sh_css_isp_macc1_5_params *to, + const struct ia_css_macc1_5_config *from, + unsigned int size) { (void)size; to->exp = from->exp; @@ -38,13 +38,14 @@ ia_css_macc1_5_encode( void ia_css_macc1_5_vmem_encode( - struct sh_css_isp_macc1_5_vmem_params *params, - const struct ia_css_macc1_5_table *from, - unsigned int size) + struct sh_css_isp_macc1_5_vmem_params *params, + const struct ia_css_macc1_5_table *from, + unsigned int size) { unsigned int i, j, k, idx; unsigned int idx_map[] = { - 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8}; + 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8 + }; (void)size; @@ -63,11 +64,11 @@ ia_css_macc1_5_vmem_encode( #ifndef IA_CSS_NO_DEBUG void ia_css_macc1_5_debug_dtrace( - const struct ia_css_macc1_5_config *config, - unsigned int level) + const struct ia_css_macc1_5_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.exp=%d\n", - config->exp); + "config.exp=%d\n", + config->exp); } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h index 53ef18f7e9121..ae9ede2b685a4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h @@ -22,20 +22,20 @@ extern const struct ia_css_macc1_5_config default_macc1_5_config; void ia_css_macc1_5_encode( - struct sh_css_isp_macc1_5_params *to, - const struct ia_css_macc1_5_config *from, - unsigned int size); + struct sh_css_isp_macc1_5_params *to, + const struct ia_css_macc1_5_config *from, + unsigned int size); void ia_css_macc1_5_vmem_encode( - struct sh_css_isp_macc1_5_vmem_params *params, - const struct ia_css_macc1_5_table *from, - unsigned int size); + struct sh_css_isp_macc1_5_vmem_params *params, + const struct ia_css_macc1_5_table *from, + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_macc1_5_debug_dtrace( - const struct ia_css_macc1_5_config *config, - unsigned int level); + const struct ia_css_macc1_5_config *config, + unsigned int level); #endif #endif /* __IA_CSS_MACC1_5_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h index 1ac2c9c50a71a..497ad89ab728c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h @@ -25,7 +25,7 @@ struct sh_css_isp_macc1_5_params { }; struct sh_css_isp_macc1_5_vmem_params { - VMEM_ARRAY(data, IA_CSS_MACC_NUM_COEFS * ISP_NWAY); + VMEM_ARRAY(data, IA_CSS_MACC_NUM_COEFS *ISP_NWAY); }; #endif /* __IA_CSS_MACC1_5_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c index 89714bf87b529..c094f3df10aa3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c @@ -21,12 +21,14 @@ * ineffective: 16 of "identity 2x2 matix" {4096,0,0,4096} */ const struct ia_css_macc1_5_table default_macc1_5_table = { - { 4096, 0, 0, 4096, 4096, 0, 0, 4096, + { 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, - 4096, 0, 0, 4096, 4096, 0, 0, 4096 } + 4096, 0, 0, 4096, 4096, 0, 0, 4096, + 4096, 0, 0, 4096, 4096, 0, 0, 4096 + } }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c index f931f631d2bcb..0b1d1bf5e8a0a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c @@ -25,9 +25,9 @@ const struct ia_css_macc_config default_macc_config = { void ia_css_macc_encode( - struct sh_css_isp_macc_params *to, - const struct ia_css_macc_config *from, - unsigned int size) + struct sh_css_isp_macc_params *to, + const struct ia_css_macc_config *from, + unsigned int size) { (void)size; to->exp = from->exp; @@ -35,15 +35,15 @@ ia_css_macc_encode( void ia_css_macc_dump( - const struct sh_css_isp_macc_params *macc, - unsigned int level); + const struct sh_css_isp_macc_params *macc, + unsigned int level); void ia_css_macc_debug_dtrace( - const struct ia_css_macc_config *config, - unsigned int level) + const struct ia_css_macc_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.exp=%d\n", - config->exp); + "config.exp=%d\n", + config->exp); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h index 843892de45a52..0e13e9cb05477 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h @@ -24,18 +24,18 @@ extern const struct ia_css_macc_config default_macc_config; void ia_css_macc_encode( - struct sh_css_isp_macc_params *to, - const struct ia_css_macc_config *from, - unsigned int size); + struct sh_css_isp_macc_params *to, + const struct ia_css_macc_config *from, + unsigned int size); void ia_css_macc_dump( - const struct sh_css_isp_macc_params *macc, - unsigned int level); + const struct sh_css_isp_macc_params *macc, + unsigned int level); void ia_css_macc_debug_dtrace( - const struct ia_css_macc_config *config, - unsigned int level); + const struct ia_css_macc_config *config, + unsigned int level); #endif /* __IA_CSS_MACC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c index 56c2114fe54c1..f9a430da54b8c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c @@ -21,14 +21,16 @@ * ineffective: 16 of "identity 2x2 matix" {8192,0,0,8192} */ const struct ia_css_macc_table default_macc_table = { - { 8192, 0, 0, 8192, 8192, 0, 0, 8192, + { 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, 8192, 0, 0, 8192, - 8192, 0, 0, 8192, 8192, 0, 0, 8192 } + 8192, 0, 0, 8192, 8192, 0, 0, 8192, + 8192, 0, 0, 8192, 8192, 0, 0, 8192 + } }; /* Multi-Axes Color Correction table for ISP2. @@ -36,12 +38,14 @@ const struct ia_css_macc_table default_macc_table = { * ineffective: 16 of "identity 2x2 matix" {4096,0,0,4096} */ const struct ia_css_macc_table default_macc2_table = { - { 4096, 0, 0, 4096, 4096, 0, 0, 4096, + { + 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, 4096, 0, 0, 4096, - 4096, 0, 0, 4096, 4096, 0, 0, 4096 } + 4096, 0, 0, 4096, 4096, 0, 0, 4096 + } }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c index 81f5a36e7b178..f7403ce16c994 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c @@ -30,9 +30,9 @@ const struct ia_css_ob2_config default_ob2_config = { void ia_css_ob2_encode( - struct sh_css_isp_ob2_params *to, - const struct ia_css_ob2_config *from, - unsigned int size) + struct sh_css_isp_ob2_params *to, + const struct ia_css_ob2_config *from, + unsigned int size) { (void)size; @@ -46,31 +46,31 @@ ia_css_ob2_encode( #ifndef IA_CSS_NO_DEBUG void ia_css_ob2_dump( - const struct sh_css_isp_ob2_params *ob2, - unsigned int level) + const struct sh_css_isp_ob2_params *ob2, + unsigned int level) { if (!ob2) return; ia_css_debug_dtrace(level, "Optical Black 2:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob2_blacklevel_gr", ob2->blacklevel_gr); + "ob2_blacklevel_gr", ob2->blacklevel_gr); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob2_blacklevel_r", ob2->blacklevel_r); + "ob2_blacklevel_r", ob2->blacklevel_r); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob2_blacklevel_b", ob2->blacklevel_b); + "ob2_blacklevel_b", ob2->blacklevel_b); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob2_blacklevel_gb", ob2->blacklevel_gb); + "ob2_blacklevel_gb", ob2->blacklevel_gb); } void ia_css_ob2_debug_dtrace( - const struct ia_css_ob2_config *config, - unsigned int level) + const struct ia_css_ob2_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.level_gr=%d, config.level_r=%d, config.level_b=%d, config.level_gb=%d, ", - config->level_gr, config->level_r, - config->level_b, config->level_gb); + "config.level_gr=%d, config.level_r=%d, config.level_b=%d, config.level_gb=%d, ", + config->level_gr, config->level_r, + config->level_b, config->level_gb); } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h index 5350ec3ac6421..936f6a08a174d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h @@ -22,19 +22,19 @@ extern const struct ia_css_ob2_config default_ob2_config; void ia_css_ob2_encode( - struct sh_css_isp_ob2_params *to, - const struct ia_css_ob2_config *from, - unsigned int size); + struct sh_css_isp_ob2_params *to, + const struct ia_css_ob2_config *from, + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_ob2_dump( - const struct sh_css_isp_ob2_params *ob2, - unsigned int level); + const struct sh_css_isp_ob2_params *ob2, + unsigned int level); void ia_css_ob2_debug_dtrace( - const struct ia_css_ob2_config *config, unsigned int level); + const struct ia_css_ob2_config *config, unsigned int level); #endif #endif /* __IA_CSS_OB2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c index fce5e65ff6bce..6367d94275fb0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c @@ -34,9 +34,9 @@ const struct ia_css_ob_config default_ob_config = { void ia_css_ob_configure( - struct sh_css_isp_ob_stream_config *config, - unsigned int isp_pipe_version, - unsigned int raw_bit_depth) + struct sh_css_isp_ob_stream_config *config, + unsigned int isp_pipe_version, + unsigned int raw_bit_depth) { config->isp_pipe_version = isp_pipe_version; config->raw_bit_depth = raw_bit_depth; @@ -44,13 +44,13 @@ ia_css_ob_configure( void ia_css_ob_encode( - struct sh_css_isp_ob_params *to, - const struct ia_css_ob_config *from, - const struct sh_css_isp_ob_stream_config *config, - unsigned int size) + struct sh_css_isp_ob_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned int size) { unsigned int ob_bit_depth - = config->isp_pipe_version == 2 ? SH_CSS_BAYER_BITS : config->raw_bit_depth; + = config->isp_pipe_version == 2 ? SH_CSS_BAYER_BITS : config->raw_bit_depth; unsigned int scale = 16 - ob_bit_depth; (void)size; @@ -88,10 +88,10 @@ ia_css_ob_encode( void ia_css_ob_vmem_encode( - struct sh_css_isp_ob_vmem_params *to, - const struct ia_css_ob_config *from, - const struct sh_css_isp_ob_stream_config *config, - unsigned int size) + struct sh_css_isp_ob_vmem_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned int size) { struct sh_css_isp_ob_params tmp; struct sh_css_isp_ob_params *ob = &tmp; @@ -118,37 +118,37 @@ ia_css_ob_vmem_encode( void ia_css_ob_dump( - const struct sh_css_isp_ob_params *ob, - unsigned int level) + const struct sh_css_isp_ob_params *ob, + unsigned int level) { if (!ob) return; ia_css_debug_dtrace(level, "Optical Black:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob_blacklevel_gr", ob->blacklevel_gr); + "ob_blacklevel_gr", ob->blacklevel_gr); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob_blacklevel_r", ob->blacklevel_r); + "ob_blacklevel_r", ob->blacklevel_r); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob_blacklevel_b", ob->blacklevel_b); + "ob_blacklevel_b", ob->blacklevel_b); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ob_blacklevel_gb", ob->blacklevel_gb); + "ob_blacklevel_gb", ob->blacklevel_gb); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "obarea_start_bq", ob->area_start_bq); + "obarea_start_bq", ob->area_start_bq); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "obarea_length_bq", ob->area_length_bq); + "obarea_length_bq", ob->area_length_bq); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "obarea_length_bq_inverse", - ob->area_length_bq_inverse); + "obarea_length_bq_inverse", + ob->area_length_bq_inverse); } void ia_css_ob_debug_dtrace( - const struct ia_css_ob_config *config, - unsigned int level) + const struct ia_css_ob_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.mode=%d, config.level_gr=%d, config.level_r=%d, config.level_b=%d, config.level_gb=%d, config.start_position=%d, config.end_position=%d\n", - config->mode, - config->level_gr, config->level_r, - config->level_b, config->level_gb, - config->start_position, config->end_position); + "config.mode=%d, config.level_gr=%d, config.level_r=%d, config.level_b=%d, config.level_gb=%d, config.start_position=%d, config.end_position=%d\n", + config->mode, + config->level_gr, config->level_r, + config->level_b, config->level_gb, + config->start_position, config->end_position); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h index 64cbaf15ceba0..d767c5856880f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h @@ -22,32 +22,32 @@ extern const struct ia_css_ob_config default_ob_config; void ia_css_ob_configure( - struct sh_css_isp_ob_stream_config *config, - unsigned int isp_pipe_version, - unsigned int raw_bit_depth); + struct sh_css_isp_ob_stream_config *config, + unsigned int isp_pipe_version, + unsigned int raw_bit_depth); void ia_css_ob_encode( - struct sh_css_isp_ob_params *to, - const struct ia_css_ob_config *from, - const struct sh_css_isp_ob_stream_config *config, - unsigned int size); + struct sh_css_isp_ob_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned int size); void ia_css_ob_vmem_encode( - struct sh_css_isp_ob_vmem_params *to, - const struct ia_css_ob_config *from, - const struct sh_css_isp_ob_stream_config *config, - unsigned int size); + struct sh_css_isp_ob_vmem_params *to, + const struct ia_css_ob_config *from, + const struct sh_css_isp_ob_stream_config *config, + unsigned int size); void ia_css_ob_dump( - const struct sh_css_isp_ob_params *ob, - unsigned int level); + const struct sh_css_isp_ob_params *ob, + unsigned int level); void ia_css_ob_debug_dtrace( - const struct ia_css_ob_config *config, unsigned int level) + const struct ia_css_ob_config *config, unsigned int level) ; #endif /* __IA_CSS_OB_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c index 0446faae159f6..df4cb9c362a4e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c @@ -30,19 +30,21 @@ static const struct ia_css_output_configuration default_output_configuration = { .info = (struct ia_css_frame_info *)NULL, }; -static const struct ia_css_output0_configuration default_output0_configuration = { +static const struct ia_css_output0_configuration default_output0_configuration + = { .info = (struct ia_css_frame_info *)NULL, }; -static const struct ia_css_output1_configuration default_output1_configuration = { +static const struct ia_css_output1_configuration default_output1_configuration + = { .info = (struct ia_css_frame_info *)NULL, }; void ia_css_output_encode( - struct sh_css_isp_output_params *to, - const struct ia_css_output_config *from, - unsigned int size) + struct sh_css_isp_output_params *to, + const struct ia_css_output_config *from, + unsigned int size) { (void)size; to->enable_hflip = from->enable_hflip; @@ -51,9 +53,9 @@ ia_css_output_encode( void ia_css_output_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output_configuration *from, - unsigned int size) + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; @@ -70,32 +72,32 @@ ia_css_output_config( void ia_css_output0_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output0_configuration *from, - unsigned int size) + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned int size) { ia_css_output_config( - to, (const struct ia_css_output_configuration *)from, size); + to, (const struct ia_css_output_configuration *)from, size); } void ia_css_output1_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output1_configuration *from, - unsigned int size) + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned int size) { ia_css_output_config( - to, (const struct ia_css_output_configuration *)from, size); + to, (const struct ia_css_output_configuration *)from, size); } void ia_css_output_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output_configuration config = - default_output_configuration; + default_output_configuration; config.info = info; @@ -105,12 +107,12 @@ ia_css_output_configure( void ia_css_output0_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output0_configuration config = - default_output0_configuration; + default_output0_configuration; config.info = info; @@ -120,12 +122,12 @@ ia_css_output0_configure( void ia_css_output1_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { if (info) { struct ia_css_output1_configuration config = - default_output1_configuration; + default_output1_configuration; config.info = info; @@ -135,27 +137,27 @@ ia_css_output1_configure( void ia_css_output_dump( - const struct sh_css_isp_output_params *output, - unsigned int level) + const struct sh_css_isp_output_params *output, + unsigned int level) { if (!output) return; ia_css_debug_dtrace(level, "Horizontal Output Flip:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "enable", output->enable_hflip); + "enable", output->enable_hflip); ia_css_debug_dtrace(level, "Vertical Output Flip:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "enable", output->enable_vflip); + "enable", output->enable_vflip); } void ia_css_output_debug_dtrace( - const struct ia_css_output_config *config, - unsigned int level) + const struct ia_css_output_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.enable_hflip=%d", - config->enable_hflip); + "config.enable_hflip=%d", + config->enable_hflip); ia_css_debug_dtrace(level, - "config.enable_vflip=%d", - config->enable_vflip); + "config.enable_vflip=%d", + config->enable_vflip); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h index 4fe2c54dae5e7..3d8f61c225cfb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h @@ -25,51 +25,51 @@ extern const struct ia_css_output_config default_output_config; void ia_css_output_encode( - struct sh_css_isp_output_params *to, - const struct ia_css_output_config *from, - unsigned int size); + struct sh_css_isp_output_params *to, + const struct ia_css_output_config *from, + unsigned int size); void ia_css_output_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output_configuration *from, - unsigned int size); + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output_configuration *from, + unsigned int size); void ia_css_output0_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output0_configuration *from, - unsigned int size); + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output0_configuration *from, + unsigned int size); void ia_css_output1_config( - struct sh_css_isp_output_isp_config *to, - const struct ia_css_output1_configuration *from, - unsigned int size); + struct sh_css_isp_output_isp_config *to, + const struct ia_css_output1_configuration *from, + unsigned int size); void ia_css_output_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void ia_css_output0_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void ia_css_output1_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); void ia_css_output_dump( - const struct sh_css_isp_output_params *output, - unsigned int level); + const struct sh_css_isp_output_params *output, + unsigned int level); void ia_css_output_debug_dtrace( - const struct ia_css_output_config *config, - unsigned int level); + const struct ia_css_output_config *config, + unsigned int level); #endif /* __IA_CSS_OUTPUT_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c index f6e452e1d70af..3de108b56005e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c @@ -29,9 +29,9 @@ static const struct ia_css_qplane_configuration default_config = { void ia_css_qplane_config( - struct sh_css_isp_qplane_isp_config *to, - const struct ia_css_qplane_configuration *from, - unsigned int size) + struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; @@ -48,9 +48,9 @@ ia_css_qplane_config( void ia_css_qplane_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *info) + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *info) { struct ia_css_qplane_configuration config = default_config; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h index 7448ec706893b..ad6d7ca783e42 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h @@ -30,14 +30,14 @@ void ia_css_qplane_config( - struct sh_css_isp_qplane_isp_config *to, - const struct ia_css_qplane_configuration *from, - unsigned int size); + struct sh_css_isp_qplane_isp_config *to, + const struct ia_css_qplane_configuration *from, + unsigned int size); void ia_css_qplane_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *from); + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *from); #endif /* __IA_CSS_QPLANE_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c index 3d8d2683fb5df..1a85f20770c17 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c @@ -36,11 +36,11 @@ sh_css_elems_bytes_from_info(unsigned int raw_bit_depth) /* MW: These areMIPI / ISYS properties, not camera function properties */ static enum sh_stream_format -css2isp_stream_format(enum atomisp_input_format from) -{ - switch (from) { +css2isp_stream_format(enum atomisp_input_format from) { + switch (from) + { case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: - return sh_stream_format_yuv420_legacy; + return sh_stream_format_yuv420_legacy; case ATOMISP_INPUT_FORMAT_YUV420_8: case ATOMISP_INPUT_FORMAT_YUV420_10: case ATOMISP_INPUT_FORMAT_YUV420_16: @@ -71,9 +71,9 @@ css2isp_stream_format(enum atomisp_input_format from) void ia_css_raw_config( - struct sh_css_isp_raw_isp_config *to, - const struct ia_css_raw_configuration *from, - unsigned int size) + struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; const struct ia_css_frame_info *in_info = from->in_info; @@ -95,7 +95,7 @@ ia_css_raw_config( /* Assume divisiblity here, may need to generalize to fixed point. */ assert((in_info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) || - (elems_a % to->port_b.elems == 0)); + (elems_a % to->port_b.elems == 0)); to->width_a_over_b = elems_a / to->port_b.elems; to->inout_port_config = from->pipe->inout_port_config; @@ -113,12 +113,12 @@ ia_css_raw_config( void ia_css_raw_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info, - const struct ia_css_frame_info *internal_info, - bool two_ppc, - bool deinterleaved) + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved) { u8 enable_left_padding = (uint8_t)((binary->left_padding) ? 1 : 0); struct ia_css_raw_configuration config = default_config; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h index 189c0839ee01d..36a4079aa24a7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h @@ -22,17 +22,17 @@ void ia_css_raw_config( - struct sh_css_isp_raw_isp_config *to, - const struct ia_css_raw_configuration *from, - unsigned int size); + struct sh_css_isp_raw_isp_config *to, + const struct ia_css_raw_configuration *from, + unsigned int size); void ia_css_raw_configure( - const struct sh_css_sp_pipeline *pipe, - const struct ia_css_binary *binary, - const struct ia_css_frame_info *in_info, - const struct ia_css_frame_info *internal_info, - bool two_ppc, - bool deinterleaved); + const struct sh_css_sp_pipeline *pipe, + const struct ia_css_binary *binary, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *internal_info, + bool two_ppc, + bool deinterleaved); #endif /* __IA_CSS_RAW_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c index 50ab19ad8b1e3..2045b974ec8ab 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c @@ -23,9 +23,9 @@ void ia_css_raa_encode( - struct sh_css_isp_aa_params *to, - const struct ia_css_aa_config *from, - unsigned int size) + struct sh_css_isp_aa_params *to, + const struct ia_css_aa_config *from, + unsigned int size) { (void)size; (void)to; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h index 9435781ac99ee..d4df1dc540a0e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h @@ -20,8 +20,8 @@ void ia_css_raa_encode( - struct sh_css_isp_aa_params *to, - const struct ia_css_aa_config *from, - unsigned int size); + struct sh_css_isp_aa_params *to, + const struct ia_css_aa_config *from, + unsigned int size); #endif /* __IA_CSS_RAA_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c index 692727ed01007..c3f43fd327d45 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c @@ -23,9 +23,9 @@ void ia_css_ref_config( - struct sh_css_isp_ref_isp_config *to, - const struct ia_css_ref_configuration *from, - unsigned int size) + struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS, i; @@ -35,8 +35,10 @@ ia_css_ref_config( to->dvs_frame_delay = from->dvs_frame_delay; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) { if (from->ref_frames[i]) { - to->ref_frame_addr_y[i] = from->ref_frames[i]->data + from->ref_frames[i]->planes.yuv.y.offset; - to->ref_frame_addr_c[i] = from->ref_frames[i]->data + from->ref_frames[i]->planes.yuv.u.offset; + to->ref_frame_addr_y[i] = from->ref_frames[i]->data + + from->ref_frames[i]->planes.yuv.y.offset; + to->ref_frame_addr_c[i] = from->ref_frames[i]->data + + from->ref_frames[i]->planes.yuv.u.offset; } else { to->ref_frame_addr_y[i] = 0; to->ref_frame_addr_c[i] = 0; @@ -49,9 +51,9 @@ ia_css_ref_config( void ia_css_ref_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame **ref_frames, - const uint32_t dvs_frame_delay) + const struct ia_css_binary *binary, + const struct ia_css_frame **ref_frames, + const uint32_t dvs_frame_delay) { struct ia_css_ref_configuration config; unsigned int i; @@ -64,8 +66,8 @@ ia_css_ref_configure( void ia_css_init_ref_state( - struct sh_css_isp_ref_dmem_state *state, - unsigned int size) + struct sh_css_isp_ref_dmem_state *state, + unsigned int size) { (void)size; assert(MAX_NUM_VIDEO_DELAY_FRAMES >= 2); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h index 29cca48b21930..4f48a8cfc604f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h @@ -24,18 +24,18 @@ void ia_css_ref_config( - struct sh_css_isp_ref_isp_config *to, - const struct ia_css_ref_configuration *from, - unsigned int size); + struct sh_css_isp_ref_isp_config *to, + const struct ia_css_ref_configuration *from, + unsigned int size); void ia_css_ref_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame **ref_frames, - const uint32_t dvs_frame_delay); + const struct ia_css_binary *binary, + const struct ia_css_frame **ref_frames, + const uint32_t dvs_frame_delay); void ia_css_init_ref_state( - struct sh_css_isp_ref_dmem_state *state, - unsigned int size); + struct sh_css_isp_ref_dmem_state *state, + unsigned int size); #endif /* __IA_CSS_REF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c index 254835184fe49..d093565d9eb8c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c @@ -39,14 +39,14 @@ static unsigned int s3a_raw_bit_depth; void ia_css_s3a_configure(unsigned int raw_bit_depth) { - s3a_raw_bit_depth = raw_bit_depth; + s3a_raw_bit_depth = raw_bit_depth; } static void ia_css_ae_encode( - struct sh_css_isp_ae_params *to, - const struct ia_css_3a_config *from, - unsigned int size) + struct sh_css_isp_ae_params *to, + const struct ia_css_3a_config *from, + unsigned int size) { (void)size; /* coefficients to calculate Y */ @@ -60,25 +60,25 @@ ia_css_ae_encode( static void ia_css_awb_encode( - struct sh_css_isp_awb_params *to, - const struct ia_css_3a_config *from, - unsigned int size) + struct sh_css_isp_awb_params *to, + const struct ia_css_3a_config *from, + unsigned int size) { (void)size; /* AWB level gate */ to->lg_high_raw = - uDIGIT_FITTING(from->awb_lg_high_raw, 16, s3a_raw_bit_depth); + uDIGIT_FITTING(from->awb_lg_high_raw, 16, s3a_raw_bit_depth); to->lg_low = - uDIGIT_FITTING(from->awb_lg_low, 16, SH_CSS_BAYER_BITS); + uDIGIT_FITTING(from->awb_lg_low, 16, SH_CSS_BAYER_BITS); to->lg_high = - uDIGIT_FITTING(from->awb_lg_high, 16, SH_CSS_BAYER_BITS); + uDIGIT_FITTING(from->awb_lg_high, 16, SH_CSS_BAYER_BITS); } static void ia_css_af_encode( - struct sh_css_isp_af_params *to, - const struct ia_css_3a_config *from, - unsigned int size) + struct sh_css_isp_af_params *to, + const struct ia_css_3a_config *from, + unsigned int size) { unsigned int i; (void)size; @@ -86,19 +86,19 @@ ia_css_af_encode( /* af fir coefficients */ for (i = 0; i < 7; ++i) { to->fir1[i] = - sDIGIT_FITTING(from->af_fir1_coef[i], 15, - SH_CSS_AF_FIR_SHIFT); + sDIGIT_FITTING(from->af_fir1_coef[i], 15, + SH_CSS_AF_FIR_SHIFT); to->fir2[i] = - sDIGIT_FITTING(from->af_fir2_coef[i], 15, - SH_CSS_AF_FIR_SHIFT); + sDIGIT_FITTING(from->af_fir2_coef[i], 15, + SH_CSS_AF_FIR_SHIFT); } } void ia_css_s3a_encode( - struct sh_css_isp_s3a_params *to, - const struct ia_css_3a_config *from, - unsigned int size) + struct sh_css_isp_s3a_params *to, + const struct ia_css_3a_config *from, + unsigned int size) { (void)size; @@ -110,9 +110,9 @@ ia_css_s3a_encode( #if 0 void ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) + unsigned int pipe_id, + const struct ia_css_pipeline_stage *stage, + struct ia_css_isp_parameters *params) { short dmem_offset = stage->binary->info->mem_offsets->dmem.s3a; @@ -120,13 +120,14 @@ ia_css_process_s3a( if (dmem_offset >= 0) { ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], - ¶ms->s3a_config); + &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], + ¶ms->s3a_config); ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], - ¶ms->s3a_config); + &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], + ¶ms->s3a_config); params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM0] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM0] = + true; } params->isp_params_changed = true; @@ -136,70 +137,70 @@ ia_css_process_s3a( #ifndef IA_CSS_NO_DEBUG void ia_css_ae_dump( - const struct sh_css_isp_ae_params *ae, - unsigned int level) + const struct sh_css_isp_ae_params *ae, + unsigned int level) { if (!ae) return; ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ae_y_coef_r", ae->y_coef_r); + "ae_y_coef_r", ae->y_coef_r); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ae_y_coef_g", ae->y_coef_g); + "ae_y_coef_g", ae->y_coef_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ae_y_coef_b", ae->y_coef_b); + "ae_y_coef_b", ae->y_coef_b); } void ia_css_awb_dump( - const struct sh_css_isp_awb_params *awb, - unsigned int level) + const struct sh_css_isp_awb_params *awb, + unsigned int level) { ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "awb_lg_high_raw", awb->lg_high_raw); + "awb_lg_high_raw", awb->lg_high_raw); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "awb_lg_low", awb->lg_low); + "awb_lg_low", awb->lg_low); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "awb_lg_high", awb->lg_high); + "awb_lg_high", awb->lg_high); } void ia_css_af_dump( - const struct sh_css_isp_af_params *af, - unsigned int level) + const struct sh_css_isp_af_params *af, + unsigned int level) { ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir1[0]", af->fir1[0]); + "af_fir1[0]", af->fir1[0]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir1[1]", af->fir1[1]); + "af_fir1[1]", af->fir1[1]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir1[2]", af->fir1[2]); + "af_fir1[2]", af->fir1[2]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir1[3]", af->fir1[3]); + "af_fir1[3]", af->fir1[3]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir1[4]", af->fir1[4]); + "af_fir1[4]", af->fir1[4]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir1[5]", af->fir1[5]); + "af_fir1[5]", af->fir1[5]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir1[6]", af->fir1[6]); + "af_fir1[6]", af->fir1[6]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir2[0]", af->fir2[0]); + "af_fir2[0]", af->fir2[0]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir2[1]", af->fir2[1]); + "af_fir2[1]", af->fir2[1]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir2[2]", af->fir2[2]); + "af_fir2[2]", af->fir2[2]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir2[3]", af->fir2[3]); + "af_fir2[3]", af->fir2[3]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir2[4]", af->fir2[4]); + "af_fir2[4]", af->fir2[4]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir2[5]", af->fir2[5]); + "af_fir2[5]", af->fir2[5]); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "af_fir2[6]", af->fir2[6]); + "af_fir2[6]", af->fir2[6]); } void ia_css_s3a_dump( - const struct sh_css_isp_s3a_params *s3a, - unsigned int level) + const struct sh_css_isp_s3a_params *s3a, + unsigned int level) { ia_css_debug_dtrace(level, "S3A Support:\n"); ia_css_ae_dump(&s3a->ae, level); @@ -209,21 +210,21 @@ ia_css_s3a_dump( void ia_css_s3a_debug_dtrace( - const struct ia_css_3a_config *config, - unsigned int level) + const struct ia_css_3a_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.ae_y_coef_r=%d, config.ae_y_coef_g=%d, config.ae_y_coef_b=%d, config.awb_lg_high_raw=%d, config.awb_lg_low=%d, config.awb_lg_high=%d\n", - config->ae_y_coef_r, config->ae_y_coef_g, - config->ae_y_coef_b, config->awb_lg_high_raw, - config->awb_lg_low, config->awb_lg_high); + "config.ae_y_coef_r=%d, config.ae_y_coef_g=%d, config.ae_y_coef_b=%d, config.awb_lg_high_raw=%d, config.awb_lg_low=%d, config.awb_lg_high=%d\n", + config->ae_y_coef_r, config->ae_y_coef_g, + config->ae_y_coef_b, config->awb_lg_high_raw, + config->awb_lg_low, config->awb_lg_high); } #endif void ia_css_s3a_hmem_decode( - struct ia_css_3a_statistics *host_stats, - const struct ia_css_bh_table *hmem_buf) + struct ia_css_3a_statistics *host_stats, + const struct ia_css_bh_table *hmem_buf) { #if defined(HAS_NO_HMEM) (void)host_stats; @@ -241,8 +242,8 @@ ia_css_s3a_hmem_decode( assert(hmem_buf); count_for_3a = host_stats->grid.width * host_stats->grid.height - * host_stats->grid.bqs_per_grid_cell - * host_stats->grid.bqs_per_grid_cell; + * host_stats->grid.bqs_per_grid_cell + * host_stats->grid.bqs_per_grid_cell; out_ptr = host_stats->rgby_data; @@ -294,8 +295,8 @@ ia_css_s3a_hmem_decode( void ia_css_s3a_dmem_decode( - struct ia_css_3a_statistics *host_stats, - const struct ia_css_3a_output *isp_stats) + struct ia_css_3a_statistics *host_stats, + const struct ia_css_3a_output *isp_stats) { int isp_width, host_width, height, i; struct ia_css_3a_output *host_ptr; @@ -330,9 +331,9 @@ merge_hi_lo_14(unsigned short hi, unsigned short lo) void ia_css_s3a_vmem_decode( - struct ia_css_3a_statistics *host_stats, - const u16 *isp_stats_hi, - const uint16_t *isp_stats_lo) + struct ia_css_3a_statistics *host_stats, + const u16 *isp_stats_hi, + const uint16_t *isp_stats_lo) { int out_width, out_height, chunk, rest, kmax, y, x, k, elm_start, elm, ofs; const u16 *hi, *lo; @@ -362,21 +363,21 @@ ia_css_s3a_vmem_decode( elm = elm_start + x * sizeof(*output) / sizeof(int32_t); for (k = 0; k < kmax; k++, elm++) { output[ofs + k].ae_y = merge_hi_lo_14( - hi[elm + chunk * 0], lo[elm + chunk * 0]); + hi[elm + chunk * 0], lo[elm + chunk * 0]); output[ofs + k].awb_cnt = merge_hi_lo_14( - hi[elm + chunk * 1], lo[elm + chunk * 1]); + hi[elm + chunk * 1], lo[elm + chunk * 1]); output[ofs + k].awb_gr = merge_hi_lo_14( - hi[elm + chunk * 2], lo[elm + chunk * 2]); + hi[elm + chunk * 2], lo[elm + chunk * 2]); output[ofs + k].awb_r = merge_hi_lo_14( - hi[elm + chunk * 3], lo[elm + chunk * 3]); + hi[elm + chunk * 3], lo[elm + chunk * 3]); output[ofs + k].awb_b = merge_hi_lo_14( - hi[elm + chunk * 4], lo[elm + chunk * 4]); + hi[elm + chunk * 4], lo[elm + chunk * 4]); output[ofs + k].awb_gb = merge_hi_lo_14( - hi[elm + chunk * 5], lo[elm + chunk * 5]); + hi[elm + chunk * 5], lo[elm + chunk * 5]); output[ofs + k].af_hpf1 = merge_hi_lo_14( - hi[elm + chunk * 6], lo[elm + chunk * 6]); + hi[elm + chunk * 6], lo[elm + chunk * 6]); output[ofs + k].af_hpf2 = merge_hi_lo_14( - hi[elm + chunk * 7], lo[elm + chunk * 7]); + hi[elm + chunk * 7], lo[elm + chunk * 7]); } x += chunk; rest -= chunk; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h index 1dfe326263183..13d19dab1f1d4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h @@ -23,55 +23,55 @@ extern const struct ia_css_3a_config default_3a_config; void ia_css_s3a_configure( - unsigned int raw_bit_depth); + unsigned int raw_bit_depth); void ia_css_s3a_encode( - struct sh_css_isp_s3a_params *to, - const struct ia_css_3a_config *from, - unsigned int size); + struct sh_css_isp_s3a_params *to, + const struct ia_css_3a_config *from, + unsigned int size); #ifndef IA_CSS_NO_DEBUG void ia_css_ae_dump( - const struct sh_css_isp_ae_params *ae, - unsigned int level); + const struct sh_css_isp_ae_params *ae, + unsigned int level); void ia_css_awb_dump( - const struct sh_css_isp_awb_params *awb, - unsigned int level); + const struct sh_css_isp_awb_params *awb, + unsigned int level); void ia_css_af_dump( - const struct sh_css_isp_af_params *af, - unsigned int level); + const struct sh_css_isp_af_params *af, + unsigned int level); void ia_css_s3a_dump( - const struct sh_css_isp_s3a_params *s3a, - unsigned int level); + const struct sh_css_isp_s3a_params *s3a, + unsigned int level); void ia_css_s3a_debug_dtrace( - const struct ia_css_3a_config *config, - unsigned int level); + const struct ia_css_3a_config *config, + unsigned int level); #endif void ia_css_s3a_hmem_decode( - struct ia_css_3a_statistics *host_stats, - const struct ia_css_bh_table *hmem_buf); + struct ia_css_3a_statistics *host_stats, + const struct ia_css_bh_table *hmem_buf); void ia_css_s3a_dmem_decode( - struct ia_css_3a_statistics *host_stats, - const struct ia_css_3a_output *isp_stats); + struct ia_css_3a_statistics *host_stats, + const struct ia_css_3a_output *isp_stats); void ia_css_s3a_vmem_decode( - struct ia_css_3a_statistics *host_stats, - const u16 *isp_stats_hi, - const uint16_t *isp_stats_lo); + struct ia_css_3a_statistics *host_stats, + const u16 *isp_stats_hi, + const uint16_t *isp_stats_lo); #endif /* __IA_CSS_S3A_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h index be8e83ec215c3..5a5b277ca0eb4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h @@ -40,11 +40,13 @@ struct ia_css_3a_grid_info { #if defined(SYSTEM_css_skycam_c0_system) u32 ae_enable; /** ae enabled in binary, 0:disabled, 1:enabled */ - struct ae_public_config_grid_config ae_grd_info; /** see description in ae_public.h*/ + struct ae_public_config_grid_config + ae_grd_info; /** see description in ae_public.h*/ u32 awb_enable; /** awb enabled in binary, 0:disabled, 1:enabled */ - struct awb_public_config_grid_config awb_grd_info; /** see description in awb_public.h*/ + struct awb_public_config_grid_config + awb_grd_info; /** see description in awb_public.h*/ u32 af_enable; /** af enabled in binary, 0:disabled, 1:enabled */ @@ -52,7 +54,8 @@ struct ia_css_3a_grid_info { u32 awb_fr_enable; /** awb_fr enabled in binary, 0:disabled, 1:enabled */ - struct awb_fr_public_grid_config awb_fr_grd_info;/** see description in awb_fr_public.h*/ + struct awb_fr_public_grid_config + awb_fr_grd_info;/** see description in awb_fr_public.h*/ u32 elem_bit_depth; /** TODO:Taken from BYT - need input from AIQ if needed for SKC @@ -189,8 +192,10 @@ struct ia_css_3a_output { * using the provided configuration (ia_css_3a_config). */ struct ia_css_3a_statistics { - struct ia_css_3a_grid_info grid; /** grid info contains the dimensions of the 3A grid */ - struct ia_css_3a_output *data; /** the pointer to 3a_output[grid.width * grid.height] + struct ia_css_3a_grid_info + grid; /** grid info contains the dimensions of the 3A grid */ + struct ia_css_3a_output + *data; /** the pointer to 3a_output[grid.width * grid.height] containing the 3A statistics */ struct ia_css_3a_rgby_output *rgby_data;/** the pointer to 3a_rgby_output[256] containing the histogram */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c index 8ec9296300ca0..cfec188681e2e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c @@ -27,9 +27,9 @@ void ia_css_sc_encode( - struct sh_css_isp_sc_params *to, - struct ia_css_shading_table **from, - unsigned int size) + struct sh_css_isp_sc_params *to, + struct ia_css_shading_table **from, + unsigned int size) { (void)size; to->gain_shift = (*from)->fraction_bits; @@ -37,21 +37,21 @@ ia_css_sc_encode( void ia_css_sc_dump( - const struct sh_css_isp_sc_params *sc, - unsigned int level) + const struct sh_css_isp_sc_params *sc, + unsigned int level) { if (!sc) return; ia_css_debug_dtrace(level, "Shading Correction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "sc_gain_shift", sc->gain_shift); + "sc_gain_shift", sc->gain_shift); } #ifdef ISP2401 void ia_css_sc_config( - struct sh_css_isp_sc_isp_config *to, - const struct ia_css_sc_configuration *from, - unsigned int size) + struct sh_css_isp_sc_isp_config *to, + const struct ia_css_sc_configuration *from, + unsigned int size) { u32 internal_org_x_bqs = from->internal_frame_origin_x_bqs_on_sctbl; u32 internal_org_y_bqs = from->internal_frame_origin_y_bqs_on_sctbl; @@ -72,13 +72,14 @@ ia_css_sc_config( void ia_css_sc_configure( - const struct ia_css_binary *binary, - u32 internal_frame_origin_x_bqs_on_sctbl, - uint32_t internal_frame_origin_y_bqs_on_sctbl) + const struct ia_css_binary *binary, + u32 internal_frame_origin_x_bqs_on_sctbl, + uint32_t internal_frame_origin_y_bqs_on_sctbl) { const struct ia_css_sc_configuration config = { internal_frame_origin_x_bqs_on_sctbl, - internal_frame_origin_y_bqs_on_sctbl }; + internal_frame_origin_y_bqs_on_sctbl + }; ia_css_configure_sc(binary, &config); } @@ -93,39 +94,39 @@ ia_css_sc_configure( for the ia_css_shading_settings structure. (michie) */ void sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, - struct ia_css_shading_settings *settings) + struct ia_css_shading_settings *settings) { if (!settings) return; assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_get_shading_settings() enter: settings=%p\n", settings); + "ia_css_get_shading_settings() enter: settings=%p\n", settings); *settings = params->shading_settings; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_get_shading_settings() leave: settings.enable_shading_table_conversion=%d\n", - settings->enable_shading_table_conversion); + "ia_css_get_shading_settings() leave: settings.enable_shading_table_conversion=%d\n", + settings->enable_shading_table_conversion); } void sh_css_set_shading_settings(struct ia_css_isp_parameters *params, - const struct ia_css_shading_settings *settings) + const struct ia_css_shading_settings *settings) { if (!settings) return; assert(params); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_shading_settings() enter: settings.enable_shading_table_conversion=%d\n", - settings->enable_shading_table_conversion); + "ia_css_set_shading_settings() enter: settings.enable_shading_table_conversion=%d\n", + settings->enable_shading_table_conversion); params->shading_settings = *settings; params->shading_settings_changed = true; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_shading_settings() leave: return_void\n"); + "ia_css_set_shading_settings() leave: return_void\n"); } /* ------ deprecated(bz675) : to ------ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h index 6f25401c173f8..4f3cb34d45130 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h @@ -22,14 +22,14 @@ void ia_css_sc_encode( - struct sh_css_isp_sc_params *to, - struct ia_css_shading_table **from, - unsigned int size); + struct sh_css_isp_sc_params *to, + struct ia_css_shading_table **from, + unsigned int size); void ia_css_sc_dump( - const struct sh_css_isp_sc_params *sc, - unsigned int level); + const struct sh_css_isp_sc_params *sc, + unsigned int level); #ifdef ISP2401 /* @brief Configure the shading correction. @@ -41,9 +41,9 @@ ia_css_sc_dump( */ void ia_css_sc_config( - struct sh_css_isp_sc_isp_config *to, - const struct ia_css_sc_configuration *from, - unsigned int size); + struct sh_css_isp_sc_isp_config *to, + const struct ia_css_sc_configuration *from, + unsigned int size); /* @brief Configure the shading correction. * @param[in] binary The binary, which has the shading correction. @@ -59,19 +59,19 @@ ia_css_sc_config( */ void ia_css_sc_configure( - const struct ia_css_binary *binary, - u32 internal_frame_origin_x_bqs_on_sctbl, - uint32_t internal_frame_origin_y_bqs_on_sctbl); + const struct ia_css_binary *binary, + u32 internal_frame_origin_x_bqs_on_sctbl, + uint32_t internal_frame_origin_y_bqs_on_sctbl); #endif /* ------ deprecated(bz675) : from ------ */ void sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, - struct ia_css_shading_settings *settings); + struct ia_css_shading_settings *settings); void sh_css_set_shading_settings(struct ia_css_isp_parameters *params, - const struct ia_css_shading_settings *settings); + const struct ia_css_shading_settings *settings); /* ------ deprecated(bz675) : to ------ */ #endif /* __IA_CSS_SC_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h index 8cd4f4eccfbc3..69e7ec7525c87 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h @@ -65,7 +65,7 @@ enum ia_css_sc_color { struct ia_css_shading_table { u32 enable; /** Set to false for no shading correction. The data field can be NULL when enable == true */ -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ u32 sensor_width; /** Native sensor width in pixels. */ u32 sensor_height; /** Native sensor height in lines. When shading_settings.enable_shading_table_conversion is set @@ -73,7 +73,7 @@ struct ia_css_shading_table { These are used only in the legacy shading table conversion in the css, when shading_settings. enable_shading_table_conversion is set as 1. */ -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ u32 width; /** Number of data points per line per color. u8.0, [0,81] */ u32 height; /** Number of lines of data points per color. @@ -126,10 +126,10 @@ struct ia_css_shading_settings { struct ia_css_sc_configuration { u32 internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ u32 internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ - /** NOTE: bqs = size in BQ(Bayer Quad) unit. - 1BQ means {Gr,R,B,Gb}(2x2 pixels). - Horizontal 1 bqs corresponds to horizontal 2 pixels. - Vertical 1 bqs corresponds to vertical 2 pixels. */ + /** NOTE: bqs = size in BQ(Bayer Quad) unit. + 1BQ means {Gr,R,B,Gb}(2x2 pixels). + Horizontal 1 bqs corresponds to horizontal 2 pixels. + Vertical 1 bqs corresponds to vertical 2 pixels. */ }; #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h index d5be09e851d2c..c03936fb05508 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h @@ -61,25 +61,27 @@ /* Array cannot be 2-dimensional, since driver ddr allocation does not know stride */ struct sh_css_isp_sdis_hori_proj_tbl { - s32 tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_HOR_PROJ_NUM_ISP]; + s32 tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_HOR_PROJ_NUM_ISP]; #if DVS2_PROJ_MARGIN > 0 - s32 margin[DVS2_PROJ_MARGIN]; + s32 margin[DVS2_PROJ_MARGIN]; #endif }; struct sh_css_isp_sdis_vert_proj_tbl { - s32 tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_VER_PROJ_NUM_ISP]; + s32 tbl[ISP_DVS_NUM_COEF_TYPES * ISP_MAX_SDIS_VER_PROJ_NUM_ISP]; #if DVS2_PROJ_MARGIN > 0 - s32 margin[DVS2_PROJ_MARGIN]; + s32 margin[DVS2_PROJ_MARGIN]; #endif }; struct sh_css_isp_sdis_hori_coef_tbl { - VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_HOR_COEF_NUM_VECS * ISP_NWAY); + VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], + ISP_MAX_SDIS_HOR_COEF_NUM_VECS *ISP_NWAY); }; struct sh_css_isp_sdis_vert_coef_tbl { - VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], ISP_MAX_SDIS_VER_COEF_NUM_VECS * ISP_NWAY); + VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES], + ISP_MAX_SDIS_VER_COEF_NUM_VECS *ISP_NWAY); }; #endif /* defined(__ISP) || defined (MK_FIRMWARE) */ @@ -87,10 +89,10 @@ struct sh_css_isp_sdis_vert_coef_tbl { #ifndef PIPE_GENERATION struct s_sdis_config { - unsigned int horicoef_vectors; - unsigned int vertcoef_vectors; - unsigned int horiproj_num; - unsigned int vertproj_num; + unsigned int horicoef_vectors; + unsigned int vertcoef_vectors; + unsigned int horiproj_num; + unsigned int vertproj_num; }; extern struct s_sdis_config sdis_config; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h index c72b36a0ca18c..e257841bba671 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h @@ -189,7 +189,8 @@ struct ia_css_dvs_stat_grid_info { /** DVS statistics global configuration (kappa, match, binning) */ struct dvs_stat_public_dvs_grd_cfg grd_cfg[IA_CSS_DVS_STAT_NUM_OF_LEVELS]; /** DVS statistics grid configuration (blocks and grids) */ - struct dvs_stat_public_dvs_level_fe_roi_cfg fe_roi_cfg[IA_CSS_DVS_STAT_NUM_OF_LEVELS]; + struct dvs_stat_public_dvs_level_fe_roi_cfg + fe_roi_cfg[IA_CSS_DVS_STAT_NUM_OF_LEVELS]; /** DVS statistics FE ROI (region of interest) configuration */ }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c index 22293829ad9bf..418481e016f76 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c @@ -26,7 +26,8 @@ const struct ia_css_dvs_coefficients default_sdis_config = { }; static void -fill_row(short *private, const short *public, unsigned int width, unsigned int padding) +fill_row(short *private, const short *public, unsigned int width, + unsigned int padding) { assert((int)width >= 0); assert((int)padding >= 0); @@ -35,15 +36,17 @@ fill_row(short *private, const short *public, unsigned int width, unsigned int p } void ia_css_sdis_horicoef_vmem_encode( - struct sh_css_isp_sdis_hori_coef_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size) { - unsigned int aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; + unsigned int aligned_width = from->grid.aligned_width * + from->grid.bqs_per_grid_cell; unsigned int width = from->grid.num_hor_coefs; int padding = aligned_width - width; unsigned int stride = size / IA_CSS_DVS_NUM_COEF_TYPES / sizeof(short); - unsigned int total_bytes = aligned_width * IA_CSS_DVS_NUM_COEF_TYPES * sizeof(short); + unsigned int total_bytes = aligned_width * IA_CSS_DVS_NUM_COEF_TYPES * sizeof( + short); short *public = from->hor_coefs; short *private = (short *)to; unsigned int type; @@ -51,7 +54,8 @@ void ia_css_sdis_horicoef_vmem_encode( /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); + assert(size % (IA_CSS_DVS_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof( + short)) == 0); for (type = 0; type < IA_CSS_DVS_NUM_COEF_TYPES; type++) { fill_row(&private[type * stride], &public[type * width], width, padding); @@ -59,15 +63,17 @@ void ia_css_sdis_horicoef_vmem_encode( } void ia_css_sdis_vertcoef_vmem_encode( - struct sh_css_isp_sdis_vert_coef_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size) { - unsigned int aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; + unsigned int aligned_height = from->grid.aligned_height * + from->grid.bqs_per_grid_cell; unsigned int height = from->grid.num_ver_coefs; int padding = aligned_height - height; unsigned int stride = size / IA_CSS_DVS_NUM_COEF_TYPES / sizeof(short); - unsigned int total_bytes = aligned_height * IA_CSS_DVS_NUM_COEF_TYPES * sizeof(short); + unsigned int total_bytes = aligned_height * IA_CSS_DVS_NUM_COEF_TYPES * + sizeof(short); short *public = from->ver_coefs; short *private = (short *)to; unsigned int type; @@ -75,7 +81,8 @@ void ia_css_sdis_vertcoef_vmem_encode( /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); + assert(size % (IA_CSS_DVS_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof( + short)) == 0); for (type = 0; type < IA_CSS_DVS_NUM_COEF_TYPES; type++) { fill_row(&private[type * stride], &public[type * height], height, padding); @@ -83,9 +90,9 @@ void ia_css_sdis_vertcoef_vmem_encode( } void ia_css_sdis_horiproj_encode( - struct sh_css_isp_sdis_hori_proj_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size) { (void)to; (void)from; @@ -93,9 +100,9 @@ void ia_css_sdis_horiproj_encode( } void ia_css_sdis_vertproj_encode( - struct sh_css_isp_sdis_vert_proj_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size) { (void)to; (void)from; @@ -103,9 +110,9 @@ void ia_css_sdis_vertproj_encode( } void ia_css_get_isp_dis_coefficients( - struct ia_css_stream *stream, - short *horizontal_coefficients, - short *vertical_coefficients) + struct ia_css_stream *stream, + short *horizontal_coefficients, + short *vertical_coefficients) { struct ia_css_isp_parameters *params; unsigned int hor_num_isp, ver_num_isp; @@ -132,11 +139,13 @@ void ia_css_get_isp_dis_coefficients( for (i = 0; i < IA_CSS_DVS_NUM_COEF_TYPES; i++) { fill_row(&horizontal_coefficients[i * hor_num_isp], - ¶ms->dvs_coefs.hor_coefs[i * hor_num_3a], hor_num_3a, hor_num_isp - hor_num_3a); + ¶ms->dvs_coefs.hor_coefs[i * hor_num_3a], hor_num_3a, + hor_num_isp - hor_num_3a); } for (i = 0; i < SH_CSS_DIS_VER_NUM_COEF_TYPES(dvs_binary); i++) { fill_row(&vertical_coefficients[i * ver_num_isp], - ¶ms->dvs_coefs.ver_coefs[i * ver_num_3a], ver_num_3a, ver_num_isp - ver_num_3a); + ¶ms->dvs_coefs.ver_coefs[i * ver_num_3a], ver_num_3a, + ver_num_isp - ver_num_3a); } IA_CSS_LEAVE("void"); @@ -144,7 +153,7 @@ void ia_css_get_isp_dis_coefficients( size_t ia_css_sdis_hor_coef_tbl_bytes( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { if (binary->info->sp.pipeline.isp_pipe_version == 1) return sizeof(short) * IA_CSS_DVS_NUM_COEF_TYPES * binary->dis.coef.pad.width; @@ -154,19 +163,20 @@ ia_css_sdis_hor_coef_tbl_bytes( size_t ia_css_sdis_ver_coef_tbl_bytes( - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) { - return sizeof(short) * SH_CSS_DIS_VER_NUM_COEF_TYPES(binary) * binary->dis.coef.pad.height; + return sizeof(short) * SH_CSS_DIS_VER_NUM_COEF_TYPES(binary) * + binary->dis.coef.pad.height; } void ia_css_sdis_init_info( - struct ia_css_sdis_info *dis, - unsigned int sc_3a_dis_width, - unsigned int sc_3a_dis_padded_width, - unsigned int sc_3a_dis_height, - unsigned int isp_pipe_version, - unsigned int enabled) + struct ia_css_sdis_info *dis, + unsigned int sc_3a_dis_width, + unsigned int sc_3a_dis_padded_width, + unsigned int sc_3a_dis_height, + unsigned int isp_pipe_version, + unsigned int enabled) { if (!enabled) { *dis = (struct ia_css_sdis_info) { }; @@ -176,47 +186,49 @@ ia_css_sdis_init_info( dis->deci_factor_log2 = SH_CSS_DIS_DECI_FACTOR_LOG2; dis->grid.dim.width = - _ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + _ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2; dis->grid.dim.height = - _ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + _ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2; dis->grid.pad.width = - CEIL_SHIFT(_ISP_BQS(sc_3a_dis_padded_width), SH_CSS_DIS_DECI_FACTOR_LOG2); + CEIL_SHIFT(_ISP_BQS(sc_3a_dis_padded_width), SH_CSS_DIS_DECI_FACTOR_LOG2); dis->grid.pad.height = - CEIL_SHIFT(_ISP_BQS(sc_3a_dis_height), SH_CSS_DIS_DECI_FACTOR_LOG2); + CEIL_SHIFT(_ISP_BQS(sc_3a_dis_height), SH_CSS_DIS_DECI_FACTOR_LOG2); dis->coef.dim.width = - (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) << SH_CSS_DIS_DECI_FACTOR_LOG2; + (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) << + SH_CSS_DIS_DECI_FACTOR_LOG2; dis->coef.dim.height = - (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2) << SH_CSS_DIS_DECI_FACTOR_LOG2; + (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2) << + SH_CSS_DIS_DECI_FACTOR_LOG2; dis->coef.pad.width = - __ISP_SDIS_HOR_COEF_NUM_VECS(sc_3a_dis_padded_width) * ISP_VEC_NELEMS; + __ISP_SDIS_HOR_COEF_NUM_VECS(sc_3a_dis_padded_width) * ISP_VEC_NELEMS; dis->coef.pad.height = - __ISP_SDIS_VER_COEF_NUM_VECS(sc_3a_dis_height) * ISP_VEC_NELEMS; + __ISP_SDIS_VER_COEF_NUM_VECS(sc_3a_dis_height) * ISP_VEC_NELEMS; if (isp_pipe_version == 1) { dis->proj.dim.width = - _ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + _ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2; dis->proj.dim.height = - _ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2; + _ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2; } else { dis->proj.dim.width = - (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) * - (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2); + (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) * + (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2); dis->proj.dim.height = - (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) * - (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2); + (_ISP_BQS(sc_3a_dis_width) >> SH_CSS_DIS_DECI_FACTOR_LOG2) * + (_ISP_BQS(sc_3a_dis_height) >> SH_CSS_DIS_DECI_FACTOR_LOG2); } dis->proj.pad.width = - __ISP_SDIS_HOR_PROJ_NUM_ISP(sc_3a_dis_padded_width, - sc_3a_dis_height, - SH_CSS_DIS_DECI_FACTOR_LOG2, - isp_pipe_version); + __ISP_SDIS_HOR_PROJ_NUM_ISP(sc_3a_dis_padded_width, + sc_3a_dis_height, + SH_CSS_DIS_DECI_FACTOR_LOG2, + isp_pipe_version); dis->proj.pad.height = - __ISP_SDIS_VER_PROJ_NUM_ISP(sc_3a_dis_padded_width, - SH_CSS_DIS_DECI_FACTOR_LOG2); + __ISP_SDIS_VER_PROJ_NUM_ISP(sc_3a_dis_padded_width, + SH_CSS_DIS_DECI_FACTOR_LOG2); } void ia_css_sdis_clear_coefficients( - struct ia_css_dvs_coefficients *dvs_coefs) + struct ia_css_dvs_coefficients *dvs_coefs) { dvs_coefs->hor_coefs = NULL; dvs_coefs->ver_coefs = NULL; @@ -224,9 +236,8 @@ void ia_css_sdis_clear_coefficients( enum ia_css_err ia_css_get_dvs_statistics( - struct ia_css_dvs_statistics *host_stats, - const struct ia_css_isp_dvs_statistics *isp_stats) -{ + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats) { struct ia_css_isp_dvs_statistics_map *map; enum ia_css_err ret = IA_CSS_SUCCESS; @@ -236,11 +247,13 @@ ia_css_get_dvs_statistics( assert(isp_stats); map = ia_css_isp_dvs_statistics_map_allocate(isp_stats, NULL); - if (map) { + if (map) + { mmgr_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); ia_css_translate_dvs_statistics(host_stats, map); ia_css_isp_dvs_statistics_map_free(map); - } else { + } else + { IA_CSS_ERROR("out of memory"); ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -251,8 +264,8 @@ ia_css_get_dvs_statistics( void ia_css_translate_dvs_statistics( - struct ia_css_dvs_statistics *host_stats, - const struct ia_css_isp_dvs_statistics_map *isp_stats) + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats) { unsigned int hor_num_isp, ver_num_isp, hor_num_dvs, ver_num_dvs, i; s32 *hor_ptr_dvs, *ver_ptr_dvs, *hor_ptr_isp, *ver_ptr_isp; @@ -292,7 +305,7 @@ ia_css_translate_dvs_statistics( struct ia_css_isp_dvs_statistics * ia_css_isp_dvs_statistics_allocate( - const struct ia_css_dvs_grid_info *grid) + const struct ia_css_dvs_grid_info *grid) { struct ia_css_isp_dvs_statistics *me; int hor_size, ver_size; @@ -308,9 +321,11 @@ ia_css_isp_dvs_statistics_allocate( if (!me) goto err; - hor_size = CEIL_MUL(sizeof(int) * IA_CSS_DVS_NUM_COEF_TYPES * grid->aligned_height, + hor_size = CEIL_MUL(sizeof(int) * IA_CSS_DVS_NUM_COEF_TYPES * + grid->aligned_height, HIVE_ISP_DDR_WORD_BYTES); - ver_size = CEIL_MUL(sizeof(int) * IA_CSS_DVS_NUM_COEF_TYPES * grid->aligned_width, + ver_size = CEIL_MUL(sizeof(int) * IA_CSS_DVS_NUM_COEF_TYPES * + grid->aligned_width, HIVE_ISP_DDR_WORD_BYTES); me->size = hor_size + ver_size; @@ -335,8 +350,8 @@ ia_css_isp_dvs_statistics_allocate( struct ia_css_isp_dvs_statistics_map * ia_css_isp_dvs_statistics_map_allocate( - const struct ia_css_isp_dvs_statistics *isp_stats, - void *data_ptr) + const struct ia_css_isp_dvs_statistics *isp_stats, + void *data_ptr) { struct ia_css_isp_dvs_statistics_map *me; /* Windows compiler does not like adding sizes to a void * @@ -394,28 +409,28 @@ ia_css_isp_dvs_statistics_free(struct ia_css_isp_dvs_statistics *me) } void ia_css_sdis_horicoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis_vertcoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis_horiproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis_vertproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level) + const struct ia_css_dvs_coefficients *config, unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h index 1f9bcacdecbbb..b1b0cb8ea1752 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h @@ -29,73 +29,73 @@ struct sh_css_isp_sdis_hori_proj_tbl; struct sh_css_isp_sdis_vert_proj_tbl; void ia_css_sdis_horicoef_vmem_encode( - struct sh_css_isp_sdis_hori_coef_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size); void ia_css_sdis_vertcoef_vmem_encode( - struct sh_css_isp_sdis_vert_coef_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size); void ia_css_sdis_horiproj_encode( - struct sh_css_isp_sdis_hori_proj_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size); void ia_css_sdis_vertproj_encode( - struct sh_css_isp_sdis_vert_proj_tbl *to, - const struct ia_css_dvs_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs_coefficients *from, + unsigned int size); void ia_css_get_isp_dis_coefficients( - struct ia_css_stream *stream, - short *horizontal_coefficients, - short *vertical_coefficients); + struct ia_css_stream *stream, + short *horizontal_coefficients, + short *vertical_coefficients); enum ia_css_err ia_css_get_dvs_statistics( - struct ia_css_dvs_statistics *host_stats, - const struct ia_css_isp_dvs_statistics *isp_stats); + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats); void ia_css_translate_dvs_statistics( - struct ia_css_dvs_statistics *host_stats, - const struct ia_css_isp_dvs_statistics_map *isp_stats); + struct ia_css_dvs_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); struct ia_css_isp_dvs_statistics * ia_css_isp_dvs_statistics_allocate( - const struct ia_css_dvs_grid_info *grid); + const struct ia_css_dvs_grid_info *grid); void ia_css_isp_dvs_statistics_free( - struct ia_css_isp_dvs_statistics *me); + struct ia_css_isp_dvs_statistics *me); size_t ia_css_sdis_hor_coef_tbl_bytes(const struct ia_css_binary *binary); size_t ia_css_sdis_ver_coef_tbl_bytes(const struct ia_css_binary *binary); void ia_css_sdis_init_info( - struct ia_css_sdis_info *dis, - unsigned int sc_3a_dis_width, - unsigned int sc_3a_dis_padded_width, - unsigned int sc_3a_dis_height, - unsigned int isp_pipe_version, - unsigned int enabled); + struct ia_css_sdis_info *dis, + unsigned int sc_3a_dis_width, + unsigned int sc_3a_dis_padded_width, + unsigned int sc_3a_dis_height, + unsigned int isp_pipe_version, + unsigned int enabled); void ia_css_sdis_clear_coefficients( - struct ia_css_dvs_coefficients *dvs_coefs); + struct ia_css_dvs_coefficients *dvs_coefs); void ia_css_sdis_horicoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level); + const struct ia_css_dvs_coefficients *config, unsigned int level); void ia_css_sdis_vertcoef_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level); + const struct ia_css_dvs_coefficients *config, unsigned int level); void ia_css_sdis_horiproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level); + const struct ia_css_dvs_coefficients *config, unsigned int level); void ia_css_sdis_vertproj_debug_dtrace( - const struct ia_css_dvs_coefficients *config, unsigned int level); + const struct ia_css_dvs_coefficients *config, unsigned int level); #endif /* __IA_CSS_SDIS_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h index 766dfd9a4f751..5542fa5555b4a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h @@ -31,7 +31,8 @@ */ struct ia_css_dvs_coefficients { - struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ + struct ia_css_dvs_grid_info + grid;/** grid info contains the dimensions of the dvs grid */ s16 *hor_coefs; /** the pointer to int16_t[grid.num_hor_coefs * IA_CSS_DVS_NUM_COEF_TYPES] containing the horizontal coefficients */ s16 *ver_coefs; /** the pointer to int16_t[grid.num_ver_coefs * IA_CSS_DVS_NUM_COEF_TYPES] @@ -43,7 +44,8 @@ struct ia_css_dvs_coefficients { */ struct ia_css_dvs_statistics { - struct ia_css_dvs_grid_info grid;/** grid info contains the dimensions of the dvs grid */ + struct ia_css_dvs_grid_info + grid;/** grid info contains the dimensions of the dvs grid */ s32 *hor_proj; /** the pointer to int16_t[grid.height * IA_CSS_DVS_NUM_COEF_TYPES] containing the horizontal projections */ s32 *ver_proj; /** the pointer to int16_t[grid.width * IA_CSS_DVS_NUM_COEF_TYPES] diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c index fea03777f81cc..20fa7d924d582 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c @@ -24,28 +24,32 @@ const struct ia_css_dvs2_coefficients default_sdis2_config = { }; static void -fill_row(short *private, const short *public, unsigned int width, unsigned int padding) +fill_row(short *private, const short *public, unsigned int width, + unsigned int padding) { memcpy(private, public, width * sizeof(short)); memset(&private[width], 0, padding * sizeof(short)); } void ia_css_sdis2_horicoef_vmem_encode( - struct sh_css_isp_sdis_hori_coef_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size) { - unsigned int aligned_width = from->grid.aligned_width * from->grid.bqs_per_grid_cell; + unsigned int aligned_width = from->grid.aligned_width * + from->grid.bqs_per_grid_cell; unsigned int width = from->grid.num_hor_coefs; int padding = aligned_width - width; unsigned int stride = size / IA_CSS_DVS2_NUM_COEF_TYPES / sizeof(short); - unsigned int total_bytes = aligned_width * IA_CSS_DVS2_NUM_COEF_TYPES * sizeof(short); + unsigned int total_bytes = aligned_width * IA_CSS_DVS2_NUM_COEF_TYPES * + sizeof(short); short *private = (short *)to; /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); + assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof( + short)) == 0); fill_row(&private[0 * stride], from->hor_coefs.odd_real, width, padding); fill_row(&private[1 * stride], from->hor_coefs.odd_imag, width, padding); fill_row(&private[2 * stride], from->hor_coefs.even_real, width, padding); @@ -53,21 +57,24 @@ void ia_css_sdis2_horicoef_vmem_encode( } void ia_css_sdis2_vertcoef_vmem_encode( - struct sh_css_isp_sdis_vert_coef_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size) { - unsigned int aligned_height = from->grid.aligned_height * from->grid.bqs_per_grid_cell; + unsigned int aligned_height = from->grid.aligned_height * + from->grid.bqs_per_grid_cell; unsigned int height = from->grid.num_ver_coefs; int padding = aligned_height - height; unsigned int stride = size / IA_CSS_DVS2_NUM_COEF_TYPES / sizeof(short); - unsigned int total_bytes = aligned_height * IA_CSS_DVS2_NUM_COEF_TYPES * sizeof(short); + unsigned int total_bytes = aligned_height * IA_CSS_DVS2_NUM_COEF_TYPES * + sizeof(short); short *private = (short *)to; /* Copy the table, add padding */ assert(padding >= 0); assert(total_bytes <= size); - assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof(short)) == 0); + assert(size % (IA_CSS_DVS2_NUM_COEF_TYPES * ISP_VEC_NELEMS * sizeof( + short)) == 0); fill_row(&private[0 * stride], from->ver_coefs.odd_real, height, padding); fill_row(&private[1 * stride], from->ver_coefs.odd_imag, height, padding); fill_row(&private[2 * stride], from->ver_coefs.even_real, height, padding); @@ -75,9 +82,9 @@ void ia_css_sdis2_vertcoef_vmem_encode( } void ia_css_sdis2_horiproj_encode( - struct sh_css_isp_sdis_hori_proj_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size) { (void)to; (void)from; @@ -85,9 +92,9 @@ void ia_css_sdis2_horiproj_encode( } void ia_css_sdis2_vertproj_encode( - struct sh_css_isp_sdis_vert_proj_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size) + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size) { (void)to; (void)from; @@ -95,15 +102,15 @@ void ia_css_sdis2_vertproj_encode( } void ia_css_get_isp_dvs2_coefficients( - struct ia_css_stream *stream, - short *hor_coefs_odd_real, - short *hor_coefs_odd_imag, - short *hor_coefs_even_real, - short *hor_coefs_even_imag, - short *ver_coefs_odd_real, - short *ver_coefs_odd_imag, - short *ver_coefs_even_real, - short *ver_coefs_even_imag) + struct ia_css_stream *stream, + short *hor_coefs_odd_real, + short *hor_coefs_odd_imag, + short *hor_coefs_even_real, + short *hor_coefs_even_imag, + short *ver_coefs_odd_real, + short *ver_coefs_odd_imag, + short *ver_coefs_even_real, + short *ver_coefs_even_imag) { struct ia_css_isp_parameters *params; unsigned int hor_num_3a, ver_num_3a; @@ -134,20 +141,28 @@ void ia_css_get_isp_dvs2_coefficients( hor_num_isp = dvs_binary->dis.coef.pad.width; ver_num_isp = dvs_binary->dis.coef.pad.height; - memcpy(hor_coefs_odd_real, params->dvs2_coefs.hor_coefs.odd_real, hor_num_3a * sizeof(short)); - memcpy(hor_coefs_odd_imag, params->dvs2_coefs.hor_coefs.odd_imag, hor_num_3a * sizeof(short)); - memcpy(hor_coefs_even_real, params->dvs2_coefs.hor_coefs.even_real, hor_num_3a * sizeof(short)); - memcpy(hor_coefs_even_imag, params->dvs2_coefs.hor_coefs.even_imag, hor_num_3a * sizeof(short)); - memcpy(ver_coefs_odd_real, params->dvs2_coefs.ver_coefs.odd_real, ver_num_3a * sizeof(short)); - memcpy(ver_coefs_odd_imag, params->dvs2_coefs.ver_coefs.odd_imag, ver_num_3a * sizeof(short)); - memcpy(ver_coefs_even_real, params->dvs2_coefs.ver_coefs.even_real, ver_num_3a * sizeof(short)); - memcpy(ver_coefs_even_imag, params->dvs2_coefs.ver_coefs.even_imag, ver_num_3a * sizeof(short)); + memcpy(hor_coefs_odd_real, params->dvs2_coefs.hor_coefs.odd_real, + hor_num_3a * sizeof(short)); + memcpy(hor_coefs_odd_imag, params->dvs2_coefs.hor_coefs.odd_imag, + hor_num_3a * sizeof(short)); + memcpy(hor_coefs_even_real, params->dvs2_coefs.hor_coefs.even_real, + hor_num_3a * sizeof(short)); + memcpy(hor_coefs_even_imag, params->dvs2_coefs.hor_coefs.even_imag, + hor_num_3a * sizeof(short)); + memcpy(ver_coefs_odd_real, params->dvs2_coefs.ver_coefs.odd_real, + ver_num_3a * sizeof(short)); + memcpy(ver_coefs_odd_imag, params->dvs2_coefs.ver_coefs.odd_imag, + ver_num_3a * sizeof(short)); + memcpy(ver_coefs_even_real, params->dvs2_coefs.ver_coefs.even_real, + ver_num_3a * sizeof(short)); + memcpy(ver_coefs_even_imag, params->dvs2_coefs.ver_coefs.even_imag, + ver_num_3a * sizeof(short)); IA_CSS_LEAVE("void"); } void ia_css_sdis2_clear_coefficients( - struct ia_css_dvs2_coefficients *dvs2_coefs) + struct ia_css_dvs2_coefficients *dvs2_coefs) { dvs2_coefs->hor_coefs.odd_real = NULL; dvs2_coefs->hor_coefs.odd_imag = NULL; @@ -161,9 +176,8 @@ void ia_css_sdis2_clear_coefficients( enum ia_css_err ia_css_get_dvs2_statistics( - struct ia_css_dvs2_statistics *host_stats, - const struct ia_css_isp_dvs_statistics *isp_stats) -{ + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats) { struct ia_css_isp_dvs_statistics_map *map; enum ia_css_err ret = IA_CSS_SUCCESS; @@ -173,11 +187,13 @@ ia_css_get_dvs2_statistics( assert(isp_stats); map = ia_css_isp_dvs_statistics_map_allocate(isp_stats, NULL); - if (map) { + if (map) + { mmgr_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); ia_css_translate_dvs2_statistics(host_stats, map); ia_css_isp_dvs_statistics_map_free(map); - } else { + } else + { IA_CSS_ERROR("out of memory"); ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -188,8 +204,8 @@ ia_css_get_dvs2_statistics( void ia_css_translate_dvs2_statistics( - struct ia_css_dvs2_statistics *host_stats, - const struct ia_css_isp_dvs_statistics_map *isp_stats) + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats) { unsigned int size_bytes, table_width, table_size, height; unsigned int src_offset = 0, dst_offset = 0; @@ -209,18 +225,19 @@ ia_css_translate_dvs2_statistics( assert(isp_stats->ver_proj); IA_CSS_ENTER("hor_coefs.odd_real=%p, hor_coefs.odd_imag=%p, hor_coefs.even_real=%p, hor_coefs.even_imag=%p, ver_coefs.odd_real=%p, ver_coefs.odd_imag=%p, ver_coefs.even_real=%p, ver_coefs.even_imag=%p, haddr=%p, vaddr=%p", - host_stats->hor_prod.odd_real, host_stats->hor_prod.odd_imag, - host_stats->hor_prod.even_real, host_stats->hor_prod.even_imag, - host_stats->ver_prod.odd_real, host_stats->ver_prod.odd_imag, - host_stats->ver_prod.even_real, host_stats->ver_prod.even_imag, - isp_stats->hor_proj, isp_stats->ver_proj); + host_stats->hor_prod.odd_real, host_stats->hor_prod.odd_imag, + host_stats->hor_prod.even_real, host_stats->hor_prod.even_imag, + host_stats->ver_prod.odd_real, host_stats->ver_prod.odd_imag, + host_stats->ver_prod.even_real, host_stats->ver_prod.even_imag, + isp_stats->hor_proj, isp_stats->ver_proj); /* Host side: reflecting the true width in bytes */ size_bytes = host_stats->grid.aligned_width * sizeof(*htemp_ptr); /* DDR side: need to be aligned to the system bus width */ /* statistics table width in terms of 32-bit words*/ - table_width = CEIL_MUL(size_bytes, HIVE_ISP_DDR_WORD_BYTES) / sizeof(*htemp_ptr); + table_width = CEIL_MUL(size_bytes, + HIVE_ISP_DDR_WORD_BYTES) / sizeof(*htemp_ptr); table_size = table_width * host_stats->grid.aligned_height; htemp_ptr = isp_stats->hor_proj; /* horizontal stats */ @@ -228,23 +245,23 @@ ia_css_translate_dvs2_statistics( for (height = 0; height < host_stats->grid.aligned_height; height++) { /* hor stats */ memcpy(host_stats->hor_prod.odd_real + dst_offset, - &htemp_ptr[0 * table_size + src_offset], size_bytes); + &htemp_ptr[0 * table_size + src_offset], size_bytes); memcpy(host_stats->hor_prod.odd_imag + dst_offset, - &htemp_ptr[1 * table_size + src_offset], size_bytes); + &htemp_ptr[1 * table_size + src_offset], size_bytes); memcpy(host_stats->hor_prod.even_real + dst_offset, - &htemp_ptr[2 * table_size + src_offset], size_bytes); + &htemp_ptr[2 * table_size + src_offset], size_bytes); memcpy(host_stats->hor_prod.even_imag + dst_offset, - &htemp_ptr[3 * table_size + src_offset], size_bytes); + &htemp_ptr[3 * table_size + src_offset], size_bytes); /* ver stats */ memcpy(host_stats->ver_prod.odd_real + dst_offset, - &vtemp_ptr[0 * table_size + src_offset], size_bytes); + &vtemp_ptr[0 * table_size + src_offset], size_bytes); memcpy(host_stats->ver_prod.odd_imag + dst_offset, - &vtemp_ptr[1 * table_size + src_offset], size_bytes); + &vtemp_ptr[1 * table_size + src_offset], size_bytes); memcpy(host_stats->ver_prod.even_real + dst_offset, - &vtemp_ptr[2 * table_size + src_offset], size_bytes); + &vtemp_ptr[2 * table_size + src_offset], size_bytes); memcpy(host_stats->ver_prod.even_imag + dst_offset, - &vtemp_ptr[3 * table_size + src_offset], size_bytes); + &vtemp_ptr[3 * table_size + src_offset], size_bytes); src_offset += table_width; /* aligned table width */ dst_offset += host_stats->grid.aligned_width; @@ -255,7 +272,7 @@ ia_css_translate_dvs2_statistics( struct ia_css_isp_dvs_statistics * ia_css_isp_dvs2_statistics_allocate( - const struct ia_css_dvs_grid_info *grid) + const struct ia_css_dvs_grid_info *grid) { struct ia_css_isp_dvs_statistics *me; int size; @@ -275,7 +292,7 @@ ia_css_isp_dvs2_statistics_allocate( aligned to HIVE_ISP_DDR_WORD_BYTES */ size = CEIL_MUL(sizeof(int) * grid->aligned_width, HIVE_ISP_DDR_WORD_BYTES) - * grid->aligned_height * IA_CSS_DVS2_NUM_COEF_TYPES; + * grid->aligned_height * IA_CSS_DVS2_NUM_COEF_TYPES; me->size = 2 * size; me->data_ptr = mmgr_malloc(me->size); @@ -305,28 +322,28 @@ ia_css_isp_dvs2_statistics_free(struct ia_css_isp_dvs_statistics *me) } void ia_css_sdis2_horicoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis2_vertcoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis2_horiproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; } void ia_css_sdis2_vertproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level) + const struct ia_css_dvs2_coefficients *config, unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h index d723b63b150ed..a966a6bcb692d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h @@ -29,67 +29,67 @@ struct sh_css_isp_sdis_hori_proj_tbl; struct sh_css_isp_sdis_vert_proj_tbl; void ia_css_sdis2_horicoef_vmem_encode( - struct sh_css_isp_sdis_hori_coef_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_hori_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size); void ia_css_sdis2_vertcoef_vmem_encode( - struct sh_css_isp_sdis_vert_coef_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_vert_coef_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size); void ia_css_sdis2_horiproj_encode( - struct sh_css_isp_sdis_hori_proj_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_hori_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size); void ia_css_sdis2_vertproj_encode( - struct sh_css_isp_sdis_vert_proj_tbl *to, - const struct ia_css_dvs2_coefficients *from, - unsigned int size); + struct sh_css_isp_sdis_vert_proj_tbl *to, + const struct ia_css_dvs2_coefficients *from, + unsigned int size); void ia_css_get_isp_dvs2_coefficients( - struct ia_css_stream *stream, - short *hor_coefs_odd_real, - short *hor_coefs_odd_imag, - short *hor_coefs_even_real, - short *hor_coefs_even_imag, - short *ver_coefs_odd_real, - short *ver_coefs_odd_imag, - short *ver_coefs_even_real, - short *ver_coefs_even_imag); + struct ia_css_stream *stream, + short *hor_coefs_odd_real, + short *hor_coefs_odd_imag, + short *hor_coefs_even_real, + short *hor_coefs_even_imag, + short *ver_coefs_odd_real, + short *ver_coefs_odd_imag, + short *ver_coefs_even_real, + short *ver_coefs_even_imag); void ia_css_sdis2_clear_coefficients( - struct ia_css_dvs2_coefficients *dvs2_coefs); + struct ia_css_dvs2_coefficients *dvs2_coefs); enum ia_css_err ia_css_get_dvs2_statistics( - struct ia_css_dvs2_statistics *host_stats, - const struct ia_css_isp_dvs_statistics *isp_stats); + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics *isp_stats); void ia_css_translate_dvs2_statistics( - struct ia_css_dvs2_statistics *host_stats, - const struct ia_css_isp_dvs_statistics_map *isp_stats); + struct ia_css_dvs2_statistics *host_stats, + const struct ia_css_isp_dvs_statistics_map *isp_stats); struct ia_css_isp_dvs_statistics * ia_css_isp_dvs2_statistics_allocate( - const struct ia_css_dvs_grid_info *grid); + const struct ia_css_dvs_grid_info *grid); void ia_css_isp_dvs2_statistics_free( - struct ia_css_isp_dvs_statistics *me); + struct ia_css_isp_dvs_statistics *me); void ia_css_sdis2_horicoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); void ia_css_sdis2_vertcoef_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); void ia_css_sdis2_horiproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); void ia_css_sdis2_vertproj_debug_dtrace( - const struct ia_css_dvs2_coefficients *config, unsigned int level); + const struct ia_css_dvs2_coefficients *config, unsigned int level); #endif /* __IA_CSS_SDIS2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h index 7a6fb266d5c85..e8ae135bfd6ae 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h @@ -41,9 +41,12 @@ struct ia_css_dvs2_coef_types { * coefficients. */ struct ia_css_dvs2_coefficients { - struct ia_css_dvs_grid_info grid; /** grid info contains the dimensions of the dvs grid */ - struct ia_css_dvs2_coef_types hor_coefs; /** struct with pointers that contain the horizontal coefficients */ - struct ia_css_dvs2_coef_types ver_coefs; /** struct with pointers that contain the vertical coefficients */ + struct ia_css_dvs_grid_info + grid; /** grid info contains the dimensions of the dvs grid */ + struct ia_css_dvs2_coef_types + hor_coefs; /** struct with pointers that contain the horizontal coefficients */ + struct ia_css_dvs2_coef_types + ver_coefs; /** struct with pointers that contain the vertical coefficients */ }; /* DVS 2.0 Statistic types. This structure contains 4 pointers to @@ -61,9 +64,12 @@ struct ia_css_dvs2_stat_types { * the horizontal odd real statistics. Valid statistics data area is int16_t[0..grid.height-1][0..grid.width-1] */ struct ia_css_dvs2_statistics { - struct ia_css_dvs_grid_info grid; /** grid info contains the dimensions of the dvs grid */ - struct ia_css_dvs2_stat_types hor_prod; /** struct with pointers that contain the horizontal statistics */ - struct ia_css_dvs2_stat_types ver_prod; /** struct with pointers that contain the vertical statistics */ + struct ia_css_dvs_grid_info + grid; /** grid info contains the dimensions of the dvs grid */ + struct ia_css_dvs2_stat_types + hor_prod; /** struct with pointers that contain the horizontal statistics */ + struct ia_css_dvs2_stat_types + ver_prod; /** struct with pointers that contain the vertical statistics */ }; #endif /* __IA_CSS_SDIS2_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c index 2ee8d78c6a268..69921c27bfaef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c @@ -16,21 +16,21 @@ #include "ia_css_tdf.host.h" static const s16 g_pyramid[8][8] = { -{128, 384, 640, 896, 896, 640, 384, 128}, -{384, 1152, 1920, 2688, 2688, 1920, 1152, 384}, -{640, 1920, 3200, 4480, 4480, 3200, 1920, 640}, -{896, 2688, 4480, 6272, 6272, 4480, 2688, 896}, -{896, 2688, 4480, 6272, 6272, 4480, 2688, 896}, -{640, 1920, 3200, 4480, 4480, 3200, 1920, 640}, -{384, 1152, 1920, 2688, 2688, 1920, 1152, 384}, -{128, 384, 640, 896, 896, 640, 384, 128} + {128, 384, 640, 896, 896, 640, 384, 128}, + {384, 1152, 1920, 2688, 2688, 1920, 1152, 384}, + {640, 1920, 3200, 4480, 4480, 3200, 1920, 640}, + {896, 2688, 4480, 6272, 6272, 4480, 2688, 896}, + {896, 2688, 4480, 6272, 6272, 4480, 2688, 896}, + {640, 1920, 3200, 4480, 4480, 3200, 1920, 640}, + {384, 1152, 1920, 2688, 2688, 1920, 1152, 384}, + {128, 384, 640, 896, 896, 640, 384, 128} }; void ia_css_tdf_vmem_encode( - struct ia_css_isp_tdf_vmem_params *to, - const struct ia_css_tdf_config *from, - size_t size) + struct ia_css_isp_tdf_vmem_params *to, + const struct ia_css_tdf_config *from, + size_t size) { unsigned int i; (void)size; @@ -44,9 +44,9 @@ ia_css_tdf_vmem_encode( void ia_css_tdf_encode( - struct ia_css_isp_tdf_dmem_params *to, - const struct ia_css_tdf_config *from, - size_t size) + struct ia_css_isp_tdf_dmem_params *to, + const struct ia_css_tdf_config *from, + size_t size) { (void)size; to->Epsilon_0 = from->epsilon_0; @@ -66,8 +66,8 @@ ia_css_tdf_encode( void ia_css_tdf_debug_dtrace( - const struct ia_css_tdf_config *config, - unsigned int level) + const struct ia_css_tdf_config *config, + unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h index 468e0177ed8a8..bc6e1653e354c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h @@ -20,19 +20,19 @@ void ia_css_tdf_vmem_encode( - struct ia_css_isp_tdf_vmem_params *to, - const struct ia_css_tdf_config *from, - size_t size); + struct ia_css_isp_tdf_vmem_params *to, + const struct ia_css_tdf_config *from, + size_t size); void ia_css_tdf_encode( - struct ia_css_isp_tdf_dmem_params *to, - const struct ia_css_tdf_config *from, - size_t size); + struct ia_css_isp_tdf_dmem_params *to, + const struct ia_css_tdf_config *from, + size_t size); void ia_css_tdf_debug_dtrace( - const struct ia_css_tdf_config *config, unsigned int level) + const struct ia_css_tdf_config *config, unsigned int level) ; #endif /* __IA_CSS_TDF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h index 223423f8c40b2..37ac2e8b75df7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h @@ -51,10 +51,14 @@ struct ia_css_tnr3_kernel_config { unsigned int round_adj_u; /** Rounding Adjust for U */ unsigned int round_adj_v; /** Rounding Adjust for V */ unsigned int knee_y[TNR3_NUM_SEGMENTS - 1]; /** Knee points */ - unsigned int sigma_y[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for Y at points Y0, Y1, Y2, Y3 */ - unsigned int sigma_u[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for U at points U0, U1, U2, U3 */ - unsigned int sigma_v[TNR3_NUM_SEGMENTS + 1]; /** Standard deviation for V at points V0, V1, V2, V3 */ - unsigned int ref_buf_select; /** Selection of the reference buffer */ + unsigned int sigma_y[TNR3_NUM_SEGMENTS + + 1]; /** Standard deviation for Y at points Y0, Y1, Y2, Y3 */ + unsigned int sigma_u[TNR3_NUM_SEGMENTS + + 1]; /** Standard deviation for U at points U0, U1, U2, U3 */ + unsigned int sigma_v[TNR3_NUM_SEGMENTS + + 1]; /** Standard deviation for V at points V0, V1, V2, V3 */ + unsigned int + ref_buf_select; /** Selection of the reference buffer */ }; #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c index d2f9887ffddb5..519e33a055549 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c @@ -31,9 +31,9 @@ const struct ia_css_tnr_config default_tnr_config = { void ia_css_tnr_encode( - struct sh_css_isp_tnr_params *to, - const struct ia_css_tnr_config *from, - unsigned int size) + struct sh_css_isp_tnr_params *to, + const struct ia_css_tnr_config *from, + unsigned int size) { (void)size; to->coef = @@ -46,35 +46,35 @@ ia_css_tnr_encode( void ia_css_tnr_dump( - const struct sh_css_isp_tnr_params *tnr, - unsigned int level) + const struct sh_css_isp_tnr_params *tnr, + unsigned int level) { if (!tnr) return; ia_css_debug_dtrace(level, "Temporal Noise Reduction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "tnr_coef", tnr->coef); + "tnr_coef", tnr->coef); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "tnr_threshold_Y", tnr->threshold_Y); + "tnr_threshold_Y", tnr->threshold_Y); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "tnr_threshold_C", tnr->threshold_C); + "tnr_threshold_C", tnr->threshold_C); } void ia_css_tnr_debug_dtrace( - const struct ia_css_tnr_config *config, - unsigned int level) + const struct ia_css_tnr_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.gain=%d, config.threshold_y=%d, config.threshold_uv=%d\n", - config->gain, - config->threshold_y, config->threshold_uv); + "config.gain=%d, config.threshold_y=%d, config.threshold_uv=%d\n", + config->gain, + config->threshold_y, config->threshold_uv); } void ia_css_tnr_config( - struct sh_css_isp_tnr_isp_config *to, - const struct ia_css_tnr_configuration *from, - unsigned int size) + struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; unsigned int i; @@ -88,7 +88,8 @@ ia_css_tnr_config( #else for (i = 0; i < NUM_TNR_FRAMES; i++) { #endif - to->tnr_frame_addr[i] = from->tnr_frames[i]->data + from->tnr_frames[i]->planes.yuyv.offset; + to->tnr_frame_addr[i] = from->tnr_frames[i]->data + + from->tnr_frames[i]->planes.yuyv.offset; } /* Assume divisiblity here, may need to generalize to fixed point. */ @@ -97,8 +98,8 @@ ia_css_tnr_config( void ia_css_tnr_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame **frames) + const struct ia_css_binary *binary, + const struct ia_css_frame **frames) { struct ia_css_tnr_configuration config; unsigned int i; @@ -115,8 +116,8 @@ ia_css_tnr_configure( void ia_css_init_tnr_state( - struct sh_css_isp_tnr_dmem_state *state, - size_t size) + struct sh_css_isp_tnr_dmem_state *state, + size_t size) { (void)size; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h index 50aabec5d3ac6..3dbf962089d00 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h @@ -24,33 +24,33 @@ extern const struct ia_css_tnr_config default_tnr_config; void ia_css_tnr_encode( - struct sh_css_isp_tnr_params *to, - const struct ia_css_tnr_config *from, - unsigned int size); + struct sh_css_isp_tnr_params *to, + const struct ia_css_tnr_config *from, + unsigned int size); void ia_css_tnr_dump( - const struct sh_css_isp_tnr_params *tnr, - unsigned int level); + const struct sh_css_isp_tnr_params *tnr, + unsigned int level); void ia_css_tnr_debug_dtrace( - const struct ia_css_tnr_config *config, - unsigned int level); + const struct ia_css_tnr_config *config, + unsigned int level); void ia_css_tnr_config( - struct sh_css_isp_tnr_isp_config *to, - const struct ia_css_tnr_configuration *from, - unsigned int size); + struct sh_css_isp_tnr_isp_config *to, + const struct ia_css_tnr_configuration *from, + unsigned int size); void ia_css_tnr_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame **frames); + const struct ia_css_binary *binary, + const struct ia_css_frame **frames); void ia_css_init_tnr_state( - struct sh_css_isp_tnr_dmem_state *state, - size_t size); + struct sh_css_isp_tnr_dmem_state *state, + size_t size); #endif /* __IA_CSS_TNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c index 0aa0231b03481..be274d680caf5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c @@ -25,9 +25,9 @@ void ia_css_vf_config( - struct sh_css_isp_vf_isp_config *to, - const struct ia_css_vf_configuration *from, - unsigned int size) + struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned int size) { unsigned int elems_a = ISP_VEC_NELEMS; @@ -51,79 +51,78 @@ ia_css_vf_config( */ enum ia_css_err sh_css_vf_downscale_log2( - const struct ia_css_frame_info *out_info, - const struct ia_css_frame_info *vf_info, - unsigned int *downscale_log2) -{ - unsigned int ds_log2 = 0; - unsigned int out_width; + const struct ia_css_frame_info *out_info, + const struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2) { + unsigned int ds_log2 = 0; + unsigned int out_width; - if ((!out_info) | (!vf_info)) - return IA_CSS_ERR_INVALID_ARGUMENTS; + if ((!out_info) | (!vf_info)) + return IA_CSS_ERR_INVALID_ARGUMENTS; - out_width = out_info->res.width; + out_width = out_info->res.width; - if (out_width == 0) - return IA_CSS_ERR_INVALID_ARGUMENTS; + if (out_width == 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; - /* downscale until width smaller than the viewfinder width. We don't + /* downscale until width smaller than the viewfinder width. We don't * test for the height since the vmem buffers only put restrictions on * the width of a line, not on the number of lines in a frame. */ - while (out_width >= vf_info->res.width) { - ds_log2++; - out_width /= 2; - } - /* now width is smaller, so we go up one step */ - if ((ds_log2 > 0) && (out_width < ia_css_binary_max_vf_width())) - ds_log2--; - /* TODO: use actual max input resolution of vf_pp binary */ - if ((out_info->res.width >> ds_log2) >= 2 * ia_css_binary_max_vf_width()) - return IA_CSS_ERR_INVALID_ARGUMENTS; - *downscale_log2 = ds_log2; - return IA_CSS_SUCCESS; + while (out_width >= vf_info->res.width) + { + ds_log2++; + out_width /= 2; + } + /* now width is smaller, so we go up one step */ + if ((ds_log2 > 0) && (out_width < ia_css_binary_max_vf_width())) + ds_log2--; + /* TODO: use actual max input resolution of vf_pp binary */ + if ((out_info->res.width >> ds_log2) >= 2 * ia_css_binary_max_vf_width()) + return IA_CSS_ERR_INVALID_ARGUMENTS; + *downscale_log2 = ds_log2; + return IA_CSS_SUCCESS; } static enum ia_css_err configure_kernel( - const struct ia_css_binary_info *info, - const struct ia_css_frame_info *out_info, - const struct ia_css_frame_info *vf_info, - unsigned int *downscale_log2, - struct ia_css_vf_configuration *config) -{ - enum ia_css_err err; - unsigned int vf_log_ds = 0; - - /* First compute value */ - if (vf_info) { - err = sh_css_vf_downscale_log2(out_info, vf_info, &vf_log_ds); - if (err != IA_CSS_SUCCESS) - return err; - } - vf_log_ds = min(vf_log_ds, info->vf_dec.max_log_downscale); - *downscale_log2 = vf_log_ds; - - /* Then store it in isp config section */ - config->vf_downscale_bits = vf_log_ds; - return IA_CSS_SUCCESS; + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *out_info, + const struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2, + struct ia_css_vf_configuration *config) { + enum ia_css_err err; + unsigned int vf_log_ds = 0; + + /* First compute value */ + if (vf_info) + { + err = sh_css_vf_downscale_log2(out_info, vf_info, &vf_log_ds); + if (err != IA_CSS_SUCCESS) + return err; + } + vf_log_ds = min(vf_log_ds, info->vf_dec.max_log_downscale); + *downscale_log2 = vf_log_ds; + + /* Then store it in isp config section */ + config->vf_downscale_bits = vf_log_ds; + return IA_CSS_SUCCESS; } static void configure_dma( - struct ia_css_vf_configuration *config, - const struct ia_css_frame_info *vf_info) + struct ia_css_vf_configuration *config, + const struct ia_css_frame_info *vf_info) { config->info = vf_info; } enum ia_css_err ia_css_vf_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - unsigned int *downscale_log2) -{ + const struct ia_css_binary *binary, + const struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2) { enum ia_css_err err; struct ia_css_vf_configuration config; const struct ia_css_binary_info *info = &binary->info->sp; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h index 247ad0a39b9bd..9cc594f9a840b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h @@ -27,21 +27,21 @@ */ enum ia_css_err sh_css_vf_downscale_log2( - const struct ia_css_frame_info *out_info, - const struct ia_css_frame_info *vf_info, - unsigned int *downscale_log2); + const struct ia_css_frame_info *out_info, + const struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2); void ia_css_vf_config( - struct sh_css_isp_vf_isp_config *to, - const struct ia_css_vf_configuration *from, - unsigned int size); + struct sh_css_isp_vf_isp_config *to, + const struct ia_css_vf_configuration *from, + unsigned int size); enum ia_css_err ia_css_vf_configure( - const struct ia_css_binary *binary, - const struct ia_css_frame_info *out_info, - struct ia_css_frame_info *vf_info, - unsigned int *downscale_log2); + const struct ia_css_binary *binary, + const struct ia_css_frame_info *out_info, + struct ia_css_frame_info *vf_info, + unsigned int *downscale_log2); #endif /* __IA_CSS_VF_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c index 5affd3875f268..d07c500eb542f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c @@ -31,9 +31,9 @@ const struct ia_css_wb_config default_wb_config = { void ia_css_wb_encode( - struct sh_css_isp_wb_params *to, - const struct ia_css_wb_config *from, - unsigned int size) + struct sh_css_isp_wb_params *to, + const struct ia_css_wb_config *from, + unsigned int size) { (void)size; to->gain_shift = @@ -55,32 +55,32 @@ ia_css_wb_encode( #ifndef IA_CSS_NO_DEBUG void ia_css_wb_dump( - const struct sh_css_isp_wb_params *wb, - unsigned int level) + const struct sh_css_isp_wb_params *wb, + unsigned int level) { if (!wb) return; ia_css_debug_dtrace(level, "White Balance:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "wb_gain_shift", wb->gain_shift); + "wb_gain_shift", wb->gain_shift); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "wb_gain_gr", wb->gain_gr); + "wb_gain_gr", wb->gain_gr); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "wb_gain_r", wb->gain_r); + "wb_gain_r", wb->gain_r); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "wb_gain_b", wb->gain_b); + "wb_gain_b", wb->gain_b); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "wb_gain_gb", wb->gain_gb); + "wb_gain_gb", wb->gain_gb); } void ia_css_wb_debug_dtrace( - const struct ia_css_wb_config *config, - unsigned int level) + const struct ia_css_wb_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.integer_bits=%d, config.gr=%d, config.r=%d, config.b=%d, config.gb=%d\n", - config->integer_bits, - config->gr, config->r, - config->b, config->gb); + "config.integer_bits=%d, config.gr=%d, config.r=%d, config.b=%d, config.gb=%d\n", + config->integer_bits, + config->gr, config->r, + config->b, config->gb); } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h index 7d983f3f20c7a..545dea39c2e0a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h @@ -22,18 +22,18 @@ extern const struct ia_css_wb_config default_wb_config; void ia_css_wb_encode( - struct sh_css_isp_wb_params *to, - const struct ia_css_wb_config *from, - unsigned int size); + struct sh_css_isp_wb_params *to, + const struct ia_css_wb_config *from, + unsigned int size); void ia_css_wb_dump( - const struct sh_css_isp_wb_params *wb, - unsigned int level); + const struct sh_css_isp_wb_params *wb, + unsigned int level); void ia_css_wb_debug_dtrace( - const struct ia_css_wb_config *wb, - unsigned int level); + const struct ia_css_wb_config *wb, + unsigned int level); #endif /* __IA_CSS_WB_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c index 50f42348ed192..e04c604ba6129 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c @@ -26,9 +26,9 @@ const struct ia_css_xnr_config default_xnr_config = { void ia_css_xnr_table_vamem_encode( - struct sh_css_isp_xnr_vamem_params *to, - const struct ia_css_xnr_table *from, - unsigned int size) + struct sh_css_isp_xnr_vamem_params *to, + const struct ia_css_xnr_table *from, + unsigned int size) { (void)size; memcpy(&to->xnr, &from->data, sizeof(to->xnr)); @@ -36,20 +36,20 @@ ia_css_xnr_table_vamem_encode( void ia_css_xnr_encode( - struct sh_css_isp_xnr_params *to, - const struct ia_css_xnr_config *from, - unsigned int size) + struct sh_css_isp_xnr_params *to, + const struct ia_css_xnr_config *from, + unsigned int size) { (void)size; to->threshold = - (uint16_t)uDIGIT_FITTING(from->threshold, 16, SH_CSS_ISP_YUV_BITS); + (uint16_t)uDIGIT_FITTING(from->threshold, 16, SH_CSS_ISP_YUV_BITS); } void ia_css_xnr_table_debug_dtrace( - const struct ia_css_xnr_table *config, - unsigned int level) + const struct ia_css_xnr_table *config, + unsigned int level) { (void)config; (void)level; @@ -57,9 +57,9 @@ ia_css_xnr_table_debug_dtrace( void ia_css_xnr_debug_dtrace( - const struct ia_css_xnr_config *config, - unsigned int level) + const struct ia_css_xnr_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.threshold=%d\n", config->threshold); + "config.threshold=%d\n", config->threshold); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h index eae4aa78ce58d..31833b78739fd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h @@ -24,24 +24,24 @@ extern const struct ia_css_xnr_config default_xnr_config; void ia_css_xnr_table_vamem_encode( - struct sh_css_isp_xnr_vamem_params *to, - const struct ia_css_xnr_table *from, - unsigned int size); + struct sh_css_isp_xnr_vamem_params *to, + const struct ia_css_xnr_table *from, + unsigned int size); void ia_css_xnr_encode( - struct sh_css_isp_xnr_params *to, - const struct ia_css_xnr_config *from, - unsigned int size); + struct sh_css_isp_xnr_params *to, + const struct ia_css_xnr_config *from, + unsigned int size); void ia_css_xnr_table_debug_dtrace( - const struct ia_css_xnr_table *s3a, - unsigned int level); + const struct ia_css_xnr_table *s3a, + unsigned int level); void ia_css_xnr_debug_dtrace( - const struct ia_css_xnr_config *config, - unsigned int level); + const struct ia_css_xnr_config *config, + unsigned int level); #endif /* __IA_CSS_XNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c index 0119e20292ce6..78653b2666a45 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c @@ -25,45 +25,45 @@ struct ia_css_xnr_table default_xnr_table; static const uint16_t default_xnr_table_data[IA_CSS_VAMEM_2_XNR_TABLE_SIZE] = { - /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ - 8191 >> 1, 4096 >> 1, 2730 >> 1, 2048 >> 1, 1638 >> 1, 1365 >> 1, 1170 >> 1, 1024 >> 1, 910 >> 1, 819 >> 1, 744 >> 1, 682 >> 1, 630 >> 1, 585 >> 1, - 546 >> 1, 512 >> 1, + /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ + 8191 >> 1, 4096 >> 1, 2730 >> 1, 2048 >> 1, 1638 >> 1, 1365 >> 1, 1170 >> 1, 1024 >> 1, 910 >> 1, 819 >> 1, 744 >> 1, 682 >> 1, 630 >> 1, 585 >> 1, + 546 >> 1, 512 >> 1, - /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ - 481 >> 1, 455 >> 1, 431 >> 1, 409 >> 1, 390 >> 1, 372 >> 1, 356 >> 1, 341 >> 1, 327 >> 1, 315 >> 1, 303 >> 1, 292 >> 1, 282 >> 1, 273 >> 1, 264 >> 1, - 256 >> 1, + /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ + 481 >> 1, 455 >> 1, 431 >> 1, 409 >> 1, 390 >> 1, 372 >> 1, 356 >> 1, 341 >> 1, 327 >> 1, 315 >> 1, 303 >> 1, 292 >> 1, 282 >> 1, 273 >> 1, 264 >> 1, + 256 >> 1, - /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ - 248 >> 1, 240 >> 1, 234 >> 1, 227 >> 1, 221 >> 1, 215 >> 1, 210 >> 1, 204 >> 1, 199 >> 1, 195 >> 1, 190 >> 1, 186 >> 1, 182 >> 1, 178 >> 1, 174 >> 1, - 170 >> 1, + /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ + 248 >> 1, 240 >> 1, 234 >> 1, 227 >> 1, 221 >> 1, 215 >> 1, 210 >> 1, 204 >> 1, 199 >> 1, 195 >> 1, 190 >> 1, 186 >> 1, 182 >> 1, 178 >> 1, 174 >> 1, + 170 >> 1, - /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ - 167 >> 1, 163 >> 1, 160 >> 1, 157 >> 1, 154 >> 1, 151 >> 1, 148 >> 1, 146 >> 1, 143 >> 1, 141 >> 1, 138 >> 1, 136 >> 1, 134 >> 1, 132 >> 1, 130 >> 1, 128 >> 1 + /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ + 167 >> 1, 163 >> 1, 160 >> 1, 157 >> 1, 154 >> 1, 151 >> 1, 148 >> 1, 146 >> 1, 143 >> 1, 141 >> 1, 138 >> 1, 136 >> 1, 134 >> 1, 132 >> 1, 130 >> 1, 128 >> 1 }; #elif defined(HAS_VAMEM_VERSION_1) static const uint16_t default_xnr_table_data[IA_CSS_VAMEM_1_XNR_TABLE_SIZE] = { - /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ - 8191 >> 1, 4096 >> 1, 2730 >> 1, 2048 >> 1, 1638 >> 1, 1365 >> 1, 1170 >> 1, 1024 >> 1, 910 >> 1, 819 >> 1, 744 >> 1, 682 >> 1, 630 >> 1, 585 >> 1, - 546 >> 1, 512 >> 1, + /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 */ + 8191 >> 1, 4096 >> 1, 2730 >> 1, 2048 >> 1, 1638 >> 1, 1365 >> 1, 1170 >> 1, 1024 >> 1, 910 >> 1, 819 >> 1, 744 >> 1, 682 >> 1, 630 >> 1, 585 >> 1, + 546 >> 1, 512 >> 1, - /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ - 481 >> 1, 455 >> 1, 431 >> 1, 409 >> 1, 390 >> 1, 372 >> 1, 356 >> 1, 341 >> 1, 327 >> 1, 315 >> 1, 303 >> 1, 292 >> 1, 282 >> 1, 273 >> 1, 264 >> 1, - 256 >> 1, + /* 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 */ + 481 >> 1, 455 >> 1, 431 >> 1, 409 >> 1, 390 >> 1, 372 >> 1, 356 >> 1, 341 >> 1, 327 >> 1, 315 >> 1, 303 >> 1, 292 >> 1, 282 >> 1, 273 >> 1, 264 >> 1, + 256 >> 1, - /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ - 248 >> 1, 240 >> 1, 234 >> 1, 227 >> 1, 221 >> 1, 215 >> 1, 210 >> 1, 204 >> 1, 199 >> 1, 195 >> 1, 190 >> 1, 186 >> 1, 182 >> 1, 178 >> 1, 174 >> 1, - 170 >> 1, + /* 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 */ + 248 >> 1, 240 >> 1, 234 >> 1, 227 >> 1, 221 >> 1, 215 >> 1, 210 >> 1, 204 >> 1, 199 >> 1, 195 >> 1, 190 >> 1, 186 >> 1, 182 >> 1, 178 >> 1, 174 >> 1, + 170 >> 1, - /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ - 167 >> 1, 163 >> 1, 160 >> 1, 157 >> 1, 154 >> 1, 151 >> 1, 148 >> 1, 146 >> 1, 143 >> 1, 141 >> 1, 138 >> 1, 136 >> 1, 134 >> 1, 132 >> 1, 130 >> 1, 128 >> 1 + /* 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 */ + 167 >> 1, 163 >> 1, 160 >> 1, 157 >> 1, 154 >> 1, 151 >> 1, 148 >> 1, 146 >> 1, 143 >> 1, 141 >> 1, 138 >> 1, 136 >> 1, 134 >> 1, 132 >> 1, 130 >> 1, 128 >> 1 }; #else #error "sh_css_params.c: VAMEM version must \ - be one of {VAMEM_VERSION_1, VAMEM_VERSION_2}" +be one of {VAMEM_VERSION_1, VAMEM_VERSION_2}" #endif void diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h index d26df92aa2b60..22189c936f643 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h @@ -44,7 +44,7 @@ /* Number of elements in the xnr table. */ #define IA_CSS_VAMEM_2_XNR_TABLE_SIZE_LOG2 6 /* Number of elements in the xnr table. */ -#define IA_CSS_VAMEM_2_XNR_TABLE_SIZE BIT(IA_CSS_VAMEM_2_XNR_TABLE_SIZE_LOG2) +#define IA_CSS_VAMEM_2_XNR_TABLE_SIZE BIT(IA_CSS_VAMEM_2_XNR_TABLE_SIZE_LOG2) /** IA_CSS_VAMEM_TYPE_1(ISP2300) or IA_CSS_VAMEM_TYPE_2(ISP2400) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c index 59e6da4b25462..886abff24a219 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c @@ -37,19 +37,23 @@ #define XNR3_LOOK_UP_TABLE_POINTS 16 static const s16 x[XNR3_LOOK_UP_TABLE_POINTS] = { -1024, 1164, 1320, 1492, 1680, 1884, 2108, 2352, -2616, 2900, 3208, 3540, 3896, 4276, 4684, 5120}; + 1024, 1164, 1320, 1492, 1680, 1884, 2108, 2352, + 2616, 2900, 3208, 3540, 3896, 4276, 4684, 5120 +}; static const s16 a[XNR3_LOOK_UP_TABLE_POINTS] = { --7213, -5580, -4371, -3421, -2722, -2159, -6950, -5585, --4529, -3697, -3010, -2485, -2070, -1727, -1428, 0}; + -7213, -5580, -4371, -3421, -2722, -2159, -6950, -5585, + -4529, -3697, -3010, -2485, -2070, -1727, -1428, 0 + }; static const s16 b[XNR3_LOOK_UP_TABLE_POINTS] = { -4096, 3603, 3178, 2811, 2497, 2226, 1990, 1783, -1603, 1446, 1307, 1185, 1077, 981, 895, 819}; + 4096, 3603, 3178, 2811, 2497, 2226, 1990, 1783, + 1603, 1446, 1307, 1185, 1077, 981, 895, 819 +}; static const s16 c[XNR3_LOOK_UP_TABLE_POINTS] = { -1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; + 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; /* #endif @@ -146,9 +150,9 @@ compute_blending(int strength) void ia_css_xnr3_encode( - struct sh_css_isp_xnr3_params *to, - const struct ia_css_xnr3_config *from, - unsigned int size) + struct sh_css_isp_xnr3_params *to, + const struct ia_css_xnr3_config *from, + unsigned int size) { int kernel_size = XNR_FILTER_SIZE; /* The adjust factor is the next power of 2 @@ -203,9 +207,9 @@ ia_css_xnr3_encode( */ void ia_css_xnr3_vmem_encode( - struct sh_css_isp_xnr3_vmem_params *to, - const struct ia_css_xnr3_config *from, - unsigned int size) + struct sh_css_isp_xnr3_vmem_params *to, + const struct ia_css_xnr3_config *from, + unsigned int size) { unsigned int i, j, base; const unsigned int total_blocks = 4; @@ -256,8 +260,8 @@ ia_css_xnr3_vmem_encode( /* Dummy Function added as the tool expects it*/ void ia_css_xnr3_debug_dtrace( - const struct ia_css_xnr3_config *config, - unsigned int level) + const struct ia_css_xnr3_config *config, + unsigned int level) { (void)config; (void)level; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h index 27f969f3a201d..f6b9e13105886 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h @@ -22,21 +22,21 @@ extern const struct ia_css_xnr3_config default_xnr3_config; void ia_css_xnr3_encode( - struct sh_css_isp_xnr3_params *to, - const struct ia_css_xnr3_config *from, - unsigned int size); + struct sh_css_isp_xnr3_params *to, + const struct ia_css_xnr3_config *from, + unsigned int size); #ifdef ISP2401 void ia_css_xnr3_vmem_encode( - struct sh_css_isp_xnr3_vmem_params *to, - const struct ia_css_xnr3_config *from, - unsigned int size); + struct sh_css_isp_xnr3_vmem_params *to, + const struct ia_css_xnr3_config *from, + unsigned int size); #endif void ia_css_xnr3_debug_dtrace( - const struct ia_css_xnr3_config *config, - unsigned int level); + const struct ia_css_xnr3_config *config, + unsigned int level); #endif /* __IA_CSS_XNR3_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c index a23d876147ada..a1d0e915636de 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c @@ -36,14 +36,14 @@ const struct ia_css_ee_config default_ee_config = { void ia_css_nr_encode( - struct sh_css_isp_ynr_params *to, - const struct ia_css_nr_config *from, - unsigned int size) + struct sh_css_isp_ynr_params *to, + const struct ia_css_nr_config *from, + unsigned int size) { (void)size; /* YNR (Y Noise Reduction) */ to->threshold = - uDIGIT_FITTING(8192U, 16, SH_CSS_BAYER_BITS); + uDIGIT_FITTING(8192U, 16, SH_CSS_BAYER_BITS); to->gain_all = uDIGIT_FITTING(from->ynr_gain, 16, SH_CSS_YNR_GAIN_SHIFT); to->gain_dir = @@ -56,9 +56,9 @@ ia_css_nr_encode( void ia_css_yee_encode( - struct sh_css_isp_yee_params *to, - const struct ia_css_yee_config *from, - unsigned int size) + struct sh_css_isp_yee_params *to, + const struct ia_css_yee_config *from, + unsigned int size) { int asiWk1 = (int)from->ee.gain; int asiWk2 = asiWk1 / 8; @@ -68,11 +68,11 @@ ia_css_yee_encode( /* YEE (Y Edge Enhancement) */ to->dirthreshold_s = min((uDIGIT_FITTING(from->nr.direction, 16, SH_CSS_BAYER_BITS) - << 1), + << 1), SH_CSS_BAYER_MAXVAL); to->dirthreshold_g = min((uDIGIT_FITTING(from->nr.direction, 16, SH_CSS_BAYER_BITS) - << 4), + << 4), SH_CSS_BAYER_MAXVAL); to->dirthreshold_width_log2 = uFRACTION_BITS_FITTING(8); @@ -111,107 +111,107 @@ ia_css_yee_encode( void ia_css_nr_dump( - const struct sh_css_isp_ynr_params *ynr, - unsigned int level) + const struct sh_css_isp_ynr_params *ynr, + unsigned int level) { if (!ynr) return; ia_css_debug_dtrace(level, - "Y Noise Reduction:\n"); + "Y Noise Reduction:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynr_threshold", ynr->threshold); + "ynr_threshold", ynr->threshold); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynr_gain_all", ynr->gain_all); + "ynr_gain_all", ynr->gain_all); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynr_gain_dir", ynr->gain_dir); + "ynr_gain_dir", ynr->gain_dir); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynr_threshold_cb", ynr->threshold_cb); + "ynr_threshold_cb", ynr->threshold_cb); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynr_threshold_cr", ynr->threshold_cr); + "ynr_threshold_cr", ynr->threshold_cr); } void ia_css_yee_dump( - const struct sh_css_isp_yee_params *yee, - unsigned int level) + const struct sh_css_isp_yee_params *yee, + unsigned int level) { ia_css_debug_dtrace(level, - "Y Edge Enhancement:\n"); + "Y Edge Enhancement:\n"); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynryee_dirthreshold_s", - yee->dirthreshold_s); + "ynryee_dirthreshold_s", + yee->dirthreshold_s); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynryee_dirthreshold_g", - yee->dirthreshold_g); + "ynryee_dirthreshold_g", + yee->dirthreshold_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynryee_dirthreshold_width_log2", - yee->dirthreshold_width_log2); + "ynryee_dirthreshold_width_log2", + yee->dirthreshold_width_log2); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynryee_dirthreshold_width", - yee->dirthreshold_width); + "ynryee_dirthreshold_width", + yee->dirthreshold_width); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_detailgain", - yee->detailgain); + "yee_detailgain", + yee->detailgain); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_coring_s", - yee->coring_s); + "yee_coring_s", + yee->coring_s); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_coring_g", - yee->coring_g); + "yee_coring_g", + yee->coring_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_scale_plus_s", - yee->scale_plus_s); + "yee_scale_plus_s", + yee->scale_plus_s); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_scale_plus_g", - yee->scale_plus_g); + "yee_scale_plus_g", + yee->scale_plus_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_scale_minus_s", - yee->scale_minus_s); + "yee_scale_minus_s", + yee->scale_minus_s); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_scale_minus_g", - yee->scale_minus_g); + "yee_scale_minus_g", + yee->scale_minus_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_clip_plus_s", - yee->clip_plus_s); + "yee_clip_plus_s", + yee->clip_plus_s); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_clip_plus_g", - yee->clip_plus_g); + "yee_clip_plus_g", + yee->clip_plus_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_clip_minus_s", - yee->clip_minus_s); + "yee_clip_minus_s", + yee->clip_minus_s); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "yee_clip_minus_g", - yee->clip_minus_g); + "yee_clip_minus_g", + yee->clip_minus_g); ia_css_debug_dtrace(level, "\t%-32s = %d\n", - "ynryee_Yclip", - yee->Yclip); + "ynryee_Yclip", + yee->Yclip); } void ia_css_nr_debug_dtrace( - const struct ia_css_nr_config *config, - unsigned int level) + const struct ia_css_nr_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.direction=%d, config.bnr_gain=%d, config.ynr_gain=%d, config.threshold_cb=%d, config.threshold_cr=%d\n", - config->direction, - config->bnr_gain, config->ynr_gain, - config->threshold_cb, config->threshold_cr); + "config.direction=%d, config.bnr_gain=%d, config.ynr_gain=%d, config.threshold_cb=%d, config.threshold_cr=%d\n", + config->direction, + config->bnr_gain, config->ynr_gain, + config->threshold_cb, config->threshold_cr); } void ia_css_ee_debug_dtrace( - const struct ia_css_ee_config *config, - unsigned int level) + const struct ia_css_ee_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.threshold=%d, config.gain=%d, config.detail_gain=%d\n", - config->threshold, config->gain, config->detail_gain); + "config.threshold=%d, config.gain=%d, config.detail_gain=%d\n", + config->threshold, config->gain, config->detail_gain); } void ia_css_init_ynr_state( - void/*struct sh_css_isp_ynr_vmem_state*/ * state, - size_t size) + void/*struct sh_css_isp_ynr_vmem_state*/ * state, + size_t size) { memset(state, 0, size); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h index 63a26538b7bd1..20165093a298f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h @@ -23,38 +23,38 @@ extern const struct ia_css_ee_config default_ee_config; void ia_css_nr_encode( - struct sh_css_isp_ynr_params *to, - const struct ia_css_nr_config *from, - unsigned int size); + struct sh_css_isp_ynr_params *to, + const struct ia_css_nr_config *from, + unsigned int size); void ia_css_yee_encode( - struct sh_css_isp_yee_params *to, - const struct ia_css_yee_config *from, - unsigned int size); + struct sh_css_isp_yee_params *to, + const struct ia_css_yee_config *from, + unsigned int size); void ia_css_nr_dump( - const struct sh_css_isp_ynr_params *ynr, - unsigned int level); + const struct sh_css_isp_ynr_params *ynr, + unsigned int level); void ia_css_yee_dump( - const struct sh_css_isp_yee_params *yee, - unsigned int level); + const struct sh_css_isp_yee_params *yee, + unsigned int level); void ia_css_nr_debug_dtrace( - const struct ia_css_nr_config *config, - unsigned int level); + const struct ia_css_nr_config *config, + unsigned int level); void ia_css_ee_debug_dtrace( - const struct ia_css_ee_config *config, - unsigned int level); + const struct ia_css_ee_config *config, + unsigned int level); void ia_css_init_ynr_state( - void/*struct sh_css_isp_ynr_vmem_state*/ * state, - size_t size); + void/*struct sh_css_isp_ynr_vmem_state*/ * state, + size_t size); #endif /* __IA_CSS_YNR_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h index 4c5c2f0010d26..63aa76f1c4e50 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h @@ -20,7 +20,7 @@ /* YNR (luminance noise reduction) */ struct sh_css_isp_ynr_vmem_state { - VMEM_ARRAY(ynr_buf[4], MAX_VECTORS_PER_BUF_LINE * ISP_NWAY); + VMEM_ARRAY(ynr_buf[4], MAX_VECTORS_PER_BUF_LINE *ISP_NWAY); }; #endif /* __IA_CSS_YNR_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c index d162fc08b4ddd..9a3cd59c45075 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c @@ -44,9 +44,9 @@ const struct ia_css_fc_config default_fc_config = { void ia_css_ynr_encode( - struct sh_css_isp_yee2_params *to, - const struct ia_css_ynr_config *from, - unsigned int size) + struct sh_css_isp_yee2_params *to, + const struct ia_css_ynr_config *from, + unsigned int size) { (void)size; to->edge_sense_gain_0 = from->edge_sense_gain_0; @@ -57,9 +57,9 @@ ia_css_ynr_encode( void ia_css_fc_encode( - struct sh_css_isp_fc_params *to, - const struct ia_css_fc_config *from, - unsigned int size) + struct sh_css_isp_fc_params *to, + const struct ia_css_fc_config *from, + unsigned int size) { (void)size; to->gain_exp = from->gain_exp; @@ -82,37 +82,37 @@ ia_css_fc_encode( void ia_css_ynr_dump( - const struct sh_css_isp_yee2_params *yee2, - unsigned int level); + const struct sh_css_isp_yee2_params *yee2, + unsigned int level); void ia_css_fc_dump( - const struct sh_css_isp_fc_params *fc, - unsigned int level); + const struct sh_css_isp_fc_params *fc, + unsigned int level); void ia_css_fc_debug_dtrace( - const struct ia_css_fc_config *config, - unsigned int level) + const struct ia_css_fc_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.gain_exp=%d, config.coring_pos_0=%d, config.coring_pos_1=%d, config.coring_neg_0=%d, config.coring_neg_1=%d, config.gain_pos_0=%d, config.gain_pos_1=%d, config.gain_neg_0=%d, config.gain_neg_1=%d, config.crop_pos_0=%d, config.crop_pos_1=%d, config.crop_neg_0=%d, config.crop_neg_1=%d\n", - config->gain_exp, - config->coring_pos_0, config->coring_pos_1, - config->coring_neg_0, config->coring_neg_1, - config->gain_pos_0, config->gain_pos_1, - config->gain_neg_0, config->gain_neg_1, - config->crop_pos_0, config->crop_pos_1, - config->crop_neg_0, config->crop_neg_1); + "config.gain_exp=%d, config.coring_pos_0=%d, config.coring_pos_1=%d, config.coring_neg_0=%d, config.coring_neg_1=%d, config.gain_pos_0=%d, config.gain_pos_1=%d, config.gain_neg_0=%d, config.gain_neg_1=%d, config.crop_pos_0=%d, config.crop_pos_1=%d, config.crop_neg_0=%d, config.crop_neg_1=%d\n", + config->gain_exp, + config->coring_pos_0, config->coring_pos_1, + config->coring_neg_0, config->coring_neg_1, + config->gain_pos_0, config->gain_pos_1, + config->gain_neg_0, config->gain_neg_1, + config->crop_pos_0, config->crop_pos_1, + config->crop_neg_0, config->crop_neg_1); } void ia_css_ynr_debug_dtrace( - const struct ia_css_ynr_config *config, - unsigned int level) + const struct ia_css_ynr_config *config, + unsigned int level) { ia_css_debug_dtrace(level, - "config.edge_sense_gain_0=%d, config.edge_sense_gain_1=%d, config.corner_sense_gain_0=%d, config.corner_sense_gain_1=%d\n", - config->edge_sense_gain_0, config->edge_sense_gain_1, - config->corner_sense_gain_0, config->corner_sense_gain_1); + "config.edge_sense_gain_0=%d, config.edge_sense_gain_1=%d, config.corner_sense_gain_0=%d, config.corner_sense_gain_1=%d\n", + config->edge_sense_gain_0, config->edge_sense_gain_1, + config->corner_sense_gain_0, config->corner_sense_gain_1); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h index 8ee483a91d08e..38204f8c5735f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h @@ -23,34 +23,34 @@ extern const struct ia_css_fc_config default_fc_config; void ia_css_ynr_encode( - struct sh_css_isp_yee2_params *to, - const struct ia_css_ynr_config *from, - unsigned int size); + struct sh_css_isp_yee2_params *to, + const struct ia_css_ynr_config *from, + unsigned int size); void ia_css_fc_encode( - struct sh_css_isp_fc_params *to, - const struct ia_css_fc_config *from, - unsigned int size); + struct sh_css_isp_fc_params *to, + const struct ia_css_fc_config *from, + unsigned int size); void ia_css_ynr_dump( - const struct sh_css_isp_yee2_params *yee2, - unsigned int level); + const struct sh_css_isp_yee2_params *yee2, + unsigned int level); void ia_css_fc_dump( - const struct sh_css_isp_fc_params *fc, - unsigned int level); + const struct sh_css_isp_fc_params *fc, + unsigned int level); void ia_css_fc_debug_dtrace( - const struct ia_css_fc_config *config, - unsigned int level); + const struct ia_css_fc_config *config, + unsigned int level); void ia_css_ynr_debug_dtrace( - const struct ia_css_ynr_config *config, - unsigned int level); + const struct ia_css_ynr_config *config, + unsigned int level); #endif /* __IA_CSS_YNR2_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h index 32714d5870cf9..490bef3ebe80a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h @@ -53,18 +53,21 @@ more details. #if ENABLE_CONTINUOUS typedef struct { - tmemvectoru raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ - /* Two more lines for SP raw copy efficiency */ + tmemvectoru + raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ + /* Two more lines for SP raw copy efficiency */ #ifndef ENABLE_REDUCED_INPUT_BUFFER - /* "Workaround" solution in the case that space needed vmem exceeds the size of the vmem. */ - /* Since in theory this buffer is not needed for IPU 2.2/2.3, */ - /* the workaround solution will not be needed (and the whole buffer) after the code refactoring. */ - tmemvectoru _raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ + /* "Workaround" solution in the case that space needed vmem exceeds the size of the vmem. */ + /* Since in theory this buffer is not needed for IPU 2.2/2.3, */ + /* the workaround solution will not be needed (and the whole buffer) after the code refactoring. */ + tmemvectoru + _raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ #endif } input_line_type; #else /* ENABLE CONTINUOUS == 0 */ typedef struct { - tmemvectoru raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE]; /* 2 bayer lines */ + tmemvectoru + raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE]; /* 2 bayer lines */ } input_line_type; #endif /* ENABLE_CONTINUOUS */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h index 392b5dd334fb3..b1854fa85d618 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h @@ -51,7 +51,7 @@ more details. */ /* The binary id is used in pre-processor expressions so we cannot * use an enum here. */ - /* 24xx pipelines*/ +/* 24xx pipelines*/ #define SH_CSS_BINARY_ID_COPY 0 #define SH_CSS_BINARY_ID_BAYER_DS 1 #define SH_CSS_BINARY_ID_VF_PP_FULL 2 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h index 2c6d1f8dcbb91..05b76de36fe22 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h @@ -51,20 +51,20 @@ struct s_isp_gdcac_config { /* output.hive.c request information */ typedef enum { - output_y_channel, - output_c_channel, - OUTPUT_NUM_CHANNELS + output_y_channel, + output_c_channel, + OUTPUT_NUM_CHANNELS } output_channel_type; typedef struct s_output_dma_info { - unsigned int cond; /* Condition for transfer */ - output_channel_type channel_type; - dma_channel channel; - unsigned int width_a; - unsigned int width_b; - unsigned int stride; - unsigned int v_delta; /* Offset for v address to do cropping */ - char *x_base; /* X base address */ + unsigned int cond; /* Condition for transfer */ + output_channel_type channel_type; + dma_channel channel; + unsigned int width_a; + unsigned int width_b; + unsigned int stride; + unsigned int v_delta; /* Offset for v address to do cropping */ + char *x_base; /* X base address */ } output_dma_info_type; #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c index 8246ae402075d..e640d5daf5027 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c @@ -17,19 +17,19 @@ more details. #include "memory_access.h" static bool realloc_isp_css_mm_buf( - hrt_vaddress * curr_buf, - size_t *curr_size, - size_t needed_size, - bool force, - enum ia_css_err *err, - uint16_t mmgr_attribute); + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err, + uint16_t mmgr_attribute); bool reallocate_buffer( - hrt_vaddress * curr_buf, - size_t *curr_size, - size_t needed_size, - bool force, - enum ia_css_err *err) + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err) { bool ret; u16 mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; @@ -37,19 +37,19 @@ bool reallocate_buffer( IA_CSS_ENTER_PRIVATE("void"); ret = realloc_isp_css_mm_buf(curr_buf, - curr_size, needed_size, force, err, mmgr_attribute); + curr_size, needed_size, force, err, mmgr_attribute); IA_CSS_LEAVE_PRIVATE("ret=%d", ret); return ret; } static bool realloc_isp_css_mm_buf( - hrt_vaddress * curr_buf, - size_t *curr_size, - size_t needed_size, - bool force, - enum ia_css_err *err, - uint16_t mmgr_attribute) + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err, + uint16_t mmgr_attribute) { s32 id; @@ -59,7 +59,8 @@ static bool realloc_isp_css_mm_buf( IA_CSS_ENTER_PRIVATE("void"); - if (ia_css_refcount_is_single(*curr_buf) && !force && *curr_size >= needed_size) { + if (ia_css_refcount_is_single(*curr_buf) && !force && + *curr_size >= needed_size) { IA_CSS_LEAVE_PRIVATE("false"); return false; } @@ -67,7 +68,7 @@ static bool realloc_isp_css_mm_buf( id = IA_CSS_REFCOUNT_PARAM_BUFFER; ia_css_refcount_decrement(id, *curr_buf); *curr_buf = ia_css_refcount_increment(id, mmgr_alloc_attr(needed_size, - mmgr_attribute)); + mmgr_attribute)); if (!*curr_buf) { *err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h index b62c4d321a4ec..17560e4abfb3f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h @@ -177,17 +177,17 @@ ia_css_binary_uninit(void); enum ia_css_err ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, - bool online, - bool two_ppc, - enum atomisp_input_format stream_format, - const struct ia_css_frame_info *in_info, - const struct ia_css_frame_info *bds_out_info, - const struct ia_css_frame_info *out_info[], - const struct ia_css_frame_info *vf_info, - struct ia_css_binary *binary, - struct ia_css_resolution *dvs_env, - int stream_config_left_padding, - bool accelerator); + bool online, + bool two_ppc, + enum atomisp_input_format stream_format, + const struct ia_css_frame_info *in_info, + const struct ia_css_frame_info *bds_out_info, + const struct ia_css_frame_info *out_info[], + const struct ia_css_frame_info *vf_info, + struct ia_css_binary *binary, + struct ia_css_resolution *dvs_env, + int stream_config_left_padding, + bool accelerator); enum ia_css_err ia_css_binary_find(struct ia_css_binary_descr *descr, @@ -218,14 +218,14 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, */ enum ia_css_err ia_css_binary_get_shading_info(const struct ia_css_binary *binary, - enum ia_css_shading_correction_type type, - unsigned int required_bds_factor, - const struct ia_css_stream_config *stream_config, + enum ia_css_shading_correction_type type, + unsigned int required_bds_factor, + const struct ia_css_stream_config *stream_config, #ifndef ISP2401 - struct ia_css_shading_info *info); + struct ia_css_shading_info *info); #else - struct ia_css_shading_info *shading_info, - struct ia_css_pipe_config *pipe_config); + struct ia_css_shading_info *shading_info, + struct ia_css_pipe_config *pipe_config); #endif enum ia_css_err @@ -240,9 +240,9 @@ ia_css_binary_dvs_grid_info(const struct ia_css_binary *binary, void ia_css_binary_dvs_stat_grid_info( - const struct ia_css_binary *binary, - struct ia_css_grid_info *info, - struct ia_css_pipe *pipe); + const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe); unsigned ia_css_binary_max_vf_width(void); @@ -252,6 +252,6 @@ ia_css_binary_destroy_isp_parameters(struct ia_css_binary *binary); void ia_css_binary_get_isp_binaries(struct ia_css_binary_xinfo **binaries, - uint32_t *num_isp_binaries); + uint32_t *num_isp_binaries); #endif /* _IA_CSS_BINARY_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c index d07a4b0132a14..8f012aece09ce 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c @@ -79,16 +79,16 @@ ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, if (binary_supports_yuv_ds) { if (in_info) { isp_tmp_internal_width = in_info->res.width - + info->pipeline.left_cropping + binary_dvs_env.width; + + info->pipeline.left_cropping + binary_dvs_env.width; isp_tmp_internal_height = in_info->res.height - + info->pipeline.top_cropping + binary_dvs_env.height; + + info->pipeline.top_cropping + binary_dvs_env.height; } } else if ((bds_out_info) && (out_info) && - /* TODO: hack to make video_us case work. this should be reverted after - a nice solution in ISP */ - (bds_out_info->res.width >= out_info->res.width)) { - isp_tmp_internal_width = bds_out_info->padded_width; - isp_tmp_internal_height = bds_out_info->res.height; + /* TODO: hack to make video_us case work. this should be reverted after + a nice solution in ISP */ + (bds_out_info->res.width >= out_info->res.width)) { + isp_tmp_internal_width = bds_out_info->padded_width; + isp_tmp_internal_height = bds_out_info->res.height; } else { if (out_info) { isp_tmp_internal_width = out_info->padded_width; @@ -99,13 +99,13 @@ ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, /* We first calculate the resolutions used by the ISP. After that, * we use those resolutions to compute sizes for tables etc. */ internal_res->width = __ISP_INTERNAL_WIDTH(isp_tmp_internal_width, - (int)binary_dvs_env.width, - info->pipeline.left_cropping, info->pipeline.mode, - info->pipeline.c_subsampling, - info->output.num_chunks, info->pipeline.pipelining); + (int)binary_dvs_env.width, + info->pipeline.left_cropping, info->pipeline.mode, + info->pipeline.c_subsampling, + info->output.num_chunks, info->pipeline.pipelining); internal_res->height = __ISP_INTERNAL_HEIGHT(isp_tmp_internal_height, - info->pipeline.top_cropping, - binary_dvs_env.height); + info->pipeline.top_cropping, + binary_dvs_env.height); } #ifndef ISP2401 @@ -138,16 +138,16 @@ struct sh_css_binary_sc_requirements { static enum ia_css_err #ifndef ISP2401 ia_css_binary_compute_shading_table_bayer_origin( - const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct sh_css_shading_table_bayer_origin_compute_results *res) /* [out] */ + const struct ia_css_binary *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ + struct sh_css_shading_table_bayer_origin_compute_results *res) /* [out] */ #else sh_css_binary_get_sc_requirements( - const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ - struct sh_css_binary_sc_requirements *scr) /* [out] */ + const struct ia_css_binary *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ + struct sh_css_binary_sc_requirements *scr) /* [out] */ #endif { enum ia_css_err err; @@ -198,7 +198,7 @@ sh_css_binary_get_sc_requirements( /* Get the numerator and denominator of bayer downscaling factor. */ err = sh_css_bds_factor_get_numerator_denominator - (required_bds_factor, &bds_num, &bds_den); + (required_bds_factor, &bds_num, &bds_den); if (err != IA_CSS_SUCCESS) #else /* Flags corresponding to NEED_BDS_FACTOR_2_00/NEED_BDS_FACTOR_1_50/NEED_BDS_FACTOR_1_25 macros @@ -225,264 +225,273 @@ sh_css_binary_get_sc_requirements( unsigned int sensor_data_origin_y_bqs_on_internal; IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", - binary, required_bds_factor, stream_config); + binary, required_bds_factor, stream_config); /* Get the numerator and denominator of the required bayer downscaling factor. */ err = sh_css_bds_factor_get_numerator_denominator(required_bds_factor, &bds_num, &bds_den); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR_PRIVATE(err); #endif return err; #ifdef ISP2401 - } +} #endif #ifndef ISP2401 - /* Set the horizontal/vertical ratio of bayer scaling - between input area and output area. */ +/* Set the horizontal/vertical ratio of bayer scaling +between input area and output area. */ #else - IA_CSS_LOG("bds_num=%d, bds_den=%d", bds_num, bds_den); +IA_CSS_LOG("bds_num=%d, bds_den=%d", bds_num, bds_den); - /* Set the horizontal/vertical ratio of bayer scaling between input area and output area. */ +/* Set the horizontal/vertical ratio of bayer scaling between input area and output area. */ #endif - bs_hor_ratio_in = bds_num; - bs_hor_ratio_out = bds_den; - bs_ver_ratio_in = bds_num; - bs_ver_ratio_out = bds_den; +bs_hor_ratio_in = bds_num; +bs_hor_ratio_out = bds_den; +bs_ver_ratio_in = bds_num; +bs_ver_ratio_out = bds_den; #ifndef ISP2401 - /* Set the left padding set by InputFormatter. (ifmtr.c) */ +/* Set the left padding set by InputFormatter. (ifmtr.c) */ #else - /* Set the left padding set by InputFormatter. (ia_css_ifmtr_configure() in ifmtr.c) */ +/* Set the left padding set by InputFormatter. (ia_css_ifmtr_configure() in ifmtr.c) */ #endif - if (stream_config->left_padding == -1) - left_padding_bqs = _ISP_BQS(binary->left_padding); - else +if (stream_config->left_padding == -1) + left_padding_bqs = _ISP_BQS(binary->left_padding); +else #ifndef ISP2401 - left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS - - _ISP_BQS(stream_config->left_padding)); + left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS + - _ISP_BQS(stream_config->left_padding)); #else - left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS - _ISP_BQS(stream_config->left_padding)); + left_padding_bqs = (unsigned int)((int)ISP_VEC_NELEMS - _ISP_BQS(stream_config->left_padding)); #endif #ifndef ISP2401 - /* Set the left padding adjusted inside the isp. - When bds_factor 2.00 is needed, some padding is added to left_padding - inside the isp, before bayer downscaling. (raw.isp.c) - (Hopefully, left_crop/left_padding/top_crop should be defined in css - appropriately, depending on bds_factor.) - */ +/* Set the left padding adjusted inside the isp. +When bds_factor 2.00 is needed, some padding is added to left_padding +inside the isp, before bayer downscaling. (raw.isp.c) +(Hopefully, left_crop/left_padding/top_crop should be defined in css +appropriately, depending on bds_factor.) +*/ #else - IA_CSS_LOG("stream.left_padding=%d, binary.left_padding=%d, left_padding_bqs=%d", - stream_config->left_padding, binary->left_padding, left_padding_bqs); +IA_CSS_LOG("stream.left_padding=%d, binary.left_padding=%d, left_padding_bqs=%d", + stream_config->left_padding, binary->left_padding, left_padding_bqs); - /* Set the left padding adjusted inside the isp kernels. - * When the bds_factor isn't 1.00, the left padding size is adjusted inside the isp, - * before bayer downscaling. (scaled_hor_plane_index(), raw_compute_hphase() in raw.isp.c) - */ +/* Set the left padding adjusted inside the isp kernels. + * When the bds_factor isn't 1.00, the left padding size is adjusted inside the isp, + * before bayer downscaling. (scaled_hor_plane_index(), raw_compute_hphase() in raw.isp.c) + */ #endif - need_bds_factor_2_00 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_8_00))) != 0); +need_bds_factor_2_00 = ((binary->info->sp.bds.supported_bds_factors & + (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_8_00))) != 0); #ifndef ISP2401 - if (need_bds_factor_2_00 && binary->info->sp.pipeline.left_cropping > 0) - left_padding_adjusted_bqs = left_padding_bqs + ISP_VEC_NELEMS; - else +if (need_bds_factor_2_00 && binary->info->sp.pipeline.left_cropping > 0) + left_padding_adjusted_bqs = left_padding_bqs + ISP_VEC_NELEMS; +else #else - need_bds_factor_1_50 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_25) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00))) != 0); - - need_bds_factor_1_25 = ((binary->info->sp.bds.supported_bds_factors & - (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_25) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | - PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00))) != 0); - - if (binary->info->sp.pipeline.left_cropping > 0 && - (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25)) { - /* - * downscale 2.0 -> first_vec_adjusted_bqs = 128 - * downscale 1.5 -> first_vec_adjusted_bqs = 96 - * downscale 1.25 -> first_vec_adjusted_bqs = 80 - */ - unsigned int first_vec_adjusted_bqs - = ISP_VEC_NELEMS * bs_hor_ratio_in / bs_hor_ratio_out; - left_padding_adjusted_bqs = first_vec_adjusted_bqs - - _ISP_BQS(binary->info->sp.pipeline.left_cropping); - } else +need_bds_factor_1_50 = ((binary->info->sp.bds.supported_bds_factors & + (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_25) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_3_00) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_4_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_6_00))) != 0); + +need_bds_factor_1_25 = ((binary->info->sp.bds.supported_bds_factors & + (PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_1_25) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_2_50) | + PACK_BDS_FACTOR(SH_CSS_BDS_FACTOR_5_00))) != 0); + +if (binary->info->sp.pipeline.left_cropping > 0 && + (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25)) +{ + /* + * downscale 2.0 -> first_vec_adjusted_bqs = 128 + * downscale 1.5 -> first_vec_adjusted_bqs = 96 + * downscale 1.25 -> first_vec_adjusted_bqs = 80 + */ + unsigned int first_vec_adjusted_bqs + = ISP_VEC_NELEMS * bs_hor_ratio_in / bs_hor_ratio_out; + left_padding_adjusted_bqs = first_vec_adjusted_bqs + - _ISP_BQS(binary->info->sp.pipeline.left_cropping); +} else #endif - left_padding_adjusted_bqs = left_padding_bqs; + left_padding_adjusted_bqs = left_padding_bqs; #ifndef ISP2401 - /* Currently, the bad pixel caused by filters before bayer scaling - is NOT considered, because the bad pixel is subtle. - When some large filter is used in the future, - we need to consider the bad pixel. - - Currently, when bds_factor isn't 1.00, 3x3 anti-alias filter is applied - to each color plane(Gr/R/B/Gb) before bayer downscaling. - This filter moves each color plane to right/bottom directions - by 1 pixel at the most, depending on downscaling factor. - */ - bad_bqs_on_left_before_bs = 0; - bad_bqs_on_top_before_bs = 0; +/* Currently, the bad pixel caused by filters before bayer scaling +is NOT considered, because the bad pixel is subtle. +When some large filter is used in the future, +we need to consider the bad pixel. + +Currently, when bds_factor isn't 1.00, 3x3 anti-alias filter is applied +to each color plane(Gr/R/B/Gb) before bayer downscaling. +This filter moves each color plane to right/bottom directions +by 1 pixel at the most, depending on downscaling factor. +*/ +bad_bqs_on_left_before_bs = 0; +bad_bqs_on_top_before_bs = 0; #else - IA_CSS_LOG("supported_bds_factors=%d, need_bds_factor:2_00=%d, 1_50=%d, 1_25=%d", - binary->info->sp.bds.supported_bds_factors, - need_bds_factor_2_00, need_bds_factor_1_50, need_bds_factor_1_25); - IA_CSS_LOG("left_cropping=%d, left_padding_adjusted_bqs=%d", - binary->info->sp.pipeline.left_cropping, left_padding_adjusted_bqs); - - /* Set the top padding padded inside the isp kernel for bayer downscaling binaries. - * When the bds_factor isn't 1.00, the top padding is padded inside the isp - * before bayer downscaling, because the top cropping size (input margin) is not enough. - * (calculate_input_line(), raw_compute_vphase(), dma_read_raw() in raw.isp.c) - * NOTE: In dma_read_raw(), the factor passed to raw_compute_vphase() is got by get_bds_factor_for_dma_read(). - * This factor is BDS_FPVAL_100/BDS_FPVAL_125/BDS_FPVAL_150/BDS_FPVAL_200. - */ - top_padding_bqs = 0; - if (binary->info->sp.pipeline.top_cropping > 0 && - (required_bds_factor == SH_CSS_BDS_FACTOR_1_25 || - required_bds_factor == SH_CSS_BDS_FACTOR_1_50 || - required_bds_factor == SH_CSS_BDS_FACTOR_2_00)) { - /* Calculation from calculate_input_line() and raw_compute_vphase() in raw.isp.c. */ - int top_cropping_bqs = _ISP_BQS(binary->info->sp.pipeline.top_cropping); - /* top cropping (in bqs) */ - int factor = bds_num * bds_frac_acc / bds_den; /* downscaling factor by fixed-point */ - int top_padding_bqsxfrac_acc = (top_cropping_bqs * factor - top_cropping_bqs * bds_frac_acc) - + (2 * bds_frac_acc - factor); /* top padding by fixed-point (in bqs) */ - - top_padding_bqs = (unsigned int)((top_padding_bqsxfrac_acc + bds_frac_acc / 2 - 1) / bds_frac_acc); - } +IA_CSS_LOG("supported_bds_factors=%d, need_bds_factor:2_00=%d, 1_50=%d, 1_25=%d", + binary->info->sp.bds.supported_bds_factors, + need_bds_factor_2_00, need_bds_factor_1_50, need_bds_factor_1_25); +IA_CSS_LOG("left_cropping=%d, left_padding_adjusted_bqs=%d", + binary->info->sp.pipeline.left_cropping, left_padding_adjusted_bqs); + +/* Set the top padding padded inside the isp kernel for bayer downscaling binaries. + * When the bds_factor isn't 1.00, the top padding is padded inside the isp + * before bayer downscaling, because the top cropping size (input margin) is not enough. + * (calculate_input_line(), raw_compute_vphase(), dma_read_raw() in raw.isp.c) + * NOTE: In dma_read_raw(), the factor passed to raw_compute_vphase() is got by get_bds_factor_for_dma_read(). + * This factor is BDS_FPVAL_100/BDS_FPVAL_125/BDS_FPVAL_150/BDS_FPVAL_200. + */ +top_padding_bqs = 0; +if (binary->info->sp.pipeline.top_cropping > 0 && + (required_bds_factor == SH_CSS_BDS_FACTOR_1_25 || + required_bds_factor == SH_CSS_BDS_FACTOR_1_50 || + required_bds_factor == SH_CSS_BDS_FACTOR_2_00)) +{ + /* Calculation from calculate_input_line() and raw_compute_vphase() in raw.isp.c. */ + int top_cropping_bqs = _ISP_BQS(binary->info->sp.pipeline.top_cropping); + /* top cropping (in bqs) */ + int factor = bds_num * bds_frac_acc / + bds_den; /* downscaling factor by fixed-point */ + int top_padding_bqsxfrac_acc = (top_cropping_bqs * factor - top_cropping_bqs * + bds_frac_acc) + + (2 * bds_frac_acc - factor); /* top padding by fixed-point (in bqs) */ + + top_padding_bqs = (unsigned int)((top_padding_bqsxfrac_acc + bds_frac_acc / 2 - + 1) / bds_frac_acc); +} - IA_CSS_LOG("top_cropping=%d, top_padding_bqs=%d", binary->info->sp.pipeline.top_cropping, top_padding_bqs); +IA_CSS_LOG("top_cropping=%d, top_padding_bqs=%d", binary->info->sp.pipeline.top_cropping, top_padding_bqs); - /* Set the right/down shift amount caused by filters applied BEFORE bayer scaling, - * which scaling is applied BEFORE shading corrertion. - * - * When the bds_factor isn't 1.00, 3x3 anti-alias filter is applied to each color plane(Gr/R/B/Gb) - * before bayer downscaling. - * This filter shifts each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. - */ - right_shift_bqs_before_bs = 0; - down_shift_bqs_before_bs = 0; +/* Set the right/down shift amount caused by filters applied BEFORE bayer scaling, + * which scaling is applied BEFORE shading corrertion. + * + * When the bds_factor isn't 1.00, 3x3 anti-alias filter is applied to each color plane(Gr/R/B/Gb) + * before bayer downscaling. + * This filter shifts each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. + */ +right_shift_bqs_before_bs = 0; +down_shift_bqs_before_bs = 0; #endif #ifndef ISP2401 - /* Currently, the bad pixel caused by filters after bayer scaling - is NOT considered, because the bad pixel is subtle. - When some large filter is used in the future, - we need to consider the bad pixel. - - Currently, when DPC&BNR is processed between bayer scaling and - shading correction, DPC&BNR moves each color plane to - right/bottom directions by 1 pixel. - */ - bad_bqs_on_left_after_bs = 0; - bad_bqs_on_top_after_bs = 0; +/* Currently, the bad pixel caused by filters after bayer scaling +is NOT considered, because the bad pixel is subtle. +When some large filter is used in the future, +we need to consider the bad pixel. + +Currently, when DPC&BNR is processed between bayer scaling and +shading correction, DPC&BNR moves each color plane to +right/bottom directions by 1 pixel. +*/ +bad_bqs_on_left_after_bs = 0; +bad_bqs_on_top_after_bs = 0; #else - if (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25) { - right_shift_bqs_before_bs = 1; - down_shift_bqs_before_bs = 1; - } +if (need_bds_factor_2_00 || need_bds_factor_1_50 || need_bds_factor_1_25) +{ + right_shift_bqs_before_bs = 1; + down_shift_bqs_before_bs = 1; +} - IA_CSS_LOG("right_shift_bqs_before_bs=%d, down_shift_bqs_before_bs=%d", - right_shift_bqs_before_bs, down_shift_bqs_before_bs); +IA_CSS_LOG("right_shift_bqs_before_bs=%d, down_shift_bqs_before_bs=%d", + right_shift_bqs_before_bs, down_shift_bqs_before_bs); - /* Set the right/down shift amount caused by filters applied AFTER bayer scaling, - * which scaling is applied BEFORE shading corrertion. - * - * When DPC&BNR is processed between bayer scaling and shading correction, - * DPC&BNR moves each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. - */ - right_shift_bqs_after_bs = 0; - down_shift_bqs_after_bs = 0; +/* Set the right/down shift amount caused by filters applied AFTER bayer scaling, + * which scaling is applied BEFORE shading corrertion. + * + * When DPC&BNR is processed between bayer scaling and shading correction, + * DPC&BNR moves each color plane (Gr/R/B/Gb) to right/down directions by 1 pixel. + */ +right_shift_bqs_after_bs = 0; +down_shift_bqs_after_bs = 0; #endif #ifndef ISP2401 - /* Calculate the origin of bayer (real sensor data area) - located on the shading table during the shading correction. */ - res->sc_bayer_origin_x_bqs_on_shading_table - = ((left_padding_adjusted_bqs + bad_bqs_on_left_before_bs) - * bs_hor_ratio_out + bs_hor_ratio_in / 2) / bs_hor_ratio_in - + bad_bqs_on_left_after_bs; - /* "+ bs_hor_ratio_in/2": rounding for division by bs_hor_ratio_in */ - res->sc_bayer_origin_y_bqs_on_shading_table - = (bad_bqs_on_top_before_bs - * bs_ver_ratio_out + bs_ver_ratio_in / 2) / bs_ver_ratio_in - + bad_bqs_on_top_after_bs; - /* "+ bs_ver_ratio_in/2": rounding for division by bs_ver_ratio_in */ - - res->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; - res->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; - res->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; - res->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; +/* Calculate the origin of bayer (real sensor data area) +located on the shading table during the shading correction. */ +res->sc_bayer_origin_x_bqs_on_shading_table += ((left_padding_adjusted_bqs + bad_bqs_on_left_before_bs) + * bs_hor_ratio_out + bs_hor_ratio_in / 2) / bs_hor_ratio_in ++ bad_bqs_on_left_after_bs; +/* "+ bs_hor_ratio_in/2": rounding for division by bs_hor_ratio_in */ +res->sc_bayer_origin_y_bqs_on_shading_table += (bad_bqs_on_top_before_bs + * bs_ver_ratio_out + bs_ver_ratio_in / 2) / bs_ver_ratio_in ++ bad_bqs_on_top_after_bs; +/* "+ bs_ver_ratio_in/2": rounding for division by bs_ver_ratio_in */ + +res->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; +res->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; +res->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; +res->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; #else - if (binary->info->mem_offsets.offsets.param->dmem.dp.size != 0) { /* if DPC&BNR is enabled in the binary */ - right_shift_bqs_after_bs = 1; - down_shift_bqs_after_bs = 1; - } +if (binary->info->mem_offsets.offsets.param->dmem.dp.size != 0) /* if DPC&BNR is enabled in the binary */ +{ + right_shift_bqs_after_bs = 1; + down_shift_bqs_after_bs = 1; +} - IA_CSS_LOG("right_shift_bqs_after_bs=%d, down_shift_bqs_after_bs=%d", - right_shift_bqs_after_bs, down_shift_bqs_after_bs); +IA_CSS_LOG("right_shift_bqs_after_bs=%d, down_shift_bqs_after_bs=%d", + right_shift_bqs_after_bs, down_shift_bqs_after_bs); - /* Set the origin of the sensor data area on the internal frame at shading correction. */ - { - unsigned int bs_frac = bds_frac_acc; /* scaling factor 1.0 in fixed point */ - unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ - - bs_out = bs_hor_ratio_out * bs_frac; - bs_in = bs_hor_ratio_in * bs_frac; - sensor_data_origin_x_bqs_on_internal - = ((left_padding_adjusted_bqs + right_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in - + right_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ - - bs_out = bs_ver_ratio_out * bs_frac; - bs_in = bs_ver_ratio_in * bs_frac; - sensor_data_origin_y_bqs_on_internal - = ((top_padding_bqs + down_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in - + down_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ - } +/* Set the origin of the sensor data area on the internal frame at shading correction. */ +{ + unsigned int bs_frac = bds_frac_acc; /* scaling factor 1.0 in fixed point */ + unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ + + bs_out = bs_hor_ratio_out * bs_frac; + bs_in = bs_hor_ratio_in * bs_frac; + sensor_data_origin_x_bqs_on_internal + = ((left_padding_adjusted_bqs + right_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in + + right_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ + + bs_out = bs_ver_ratio_out * bs_frac; + bs_in = bs_ver_ratio_in * bs_frac; + sensor_data_origin_y_bqs_on_internal + = ((top_padding_bqs + down_shift_bqs_before_bs) * bs_out + bs_in / 2) / bs_in + + down_shift_bqs_after_bs; /* "+ bs_in/2": rounding */ +} - scr->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; - scr->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; - scr->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; - scr->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; - scr->sensor_data_origin_x_bqs_on_internal = (uint32_t)sensor_data_origin_x_bqs_on_internal; - scr->sensor_data_origin_y_bqs_on_internal = (uint32_t)sensor_data_origin_y_bqs_on_internal; - - IA_CSS_LOG("sc_requirements: %d, %d, %d, %d, %d, %d", - scr->bayer_scale_hor_ratio_in, scr->bayer_scale_hor_ratio_out, - scr->bayer_scale_ver_ratio_in, scr->bayer_scale_ver_ratio_out, - scr->sensor_data_origin_x_bqs_on_internal, scr->sensor_data_origin_y_bqs_on_internal); +scr->bayer_scale_hor_ratio_in = (uint32_t)bs_hor_ratio_in; +scr->bayer_scale_hor_ratio_out = (uint32_t)bs_hor_ratio_out; +scr->bayer_scale_ver_ratio_in = (uint32_t)bs_ver_ratio_in; +scr->bayer_scale_ver_ratio_out = (uint32_t)bs_ver_ratio_out; +scr->sensor_data_origin_x_bqs_on_internal = (uint32_t)sensor_data_origin_x_bqs_on_internal; +scr->sensor_data_origin_y_bqs_on_internal = (uint32_t)sensor_data_origin_y_bqs_on_internal; + +IA_CSS_LOG("sc_requirements: %d, %d, %d, %d, %d, %d", + scr->bayer_scale_hor_ratio_in, scr->bayer_scale_hor_ratio_out, + scr->bayer_scale_ver_ratio_in, scr->bayer_scale_ver_ratio_out, + scr->sensor_data_origin_x_bqs_on_internal, scr->sensor_data_origin_y_bqs_on_internal); #endif #ifdef ISP2401 - IA_CSS_LEAVE_ERR_PRIVATE(err); +IA_CSS_LEAVE_ERR_PRIVATE(err); #endif - return err; +return err; } /* Get the shading information of Shading Correction Type 1. */ static enum ia_css_err -ia_css_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ +ia_css_binary_get_shading_info_type_1(const struct ia_css_binary + *binary, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ #ifndef ISP2401 - struct ia_css_shading_info *info) /* [out] */ + struct ia_css_shading_info *info) /* [out] */ #else - struct ia_css_shading_info *shading_info, /* [out] */ - struct ia_css_pipe_config *pipe_config) /* [out] */ + struct ia_css_shading_info *shading_info, /* [out] */ + struct ia_css_pipe_config *pipe_config) /* [out] */ #endif { enum ia_css_err err; @@ -522,7 +531,7 @@ ia_css_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in info->info.type_1.bqs_per_grid_cell = (1 << binary->deci_factor_log2); #else IA_CSS_ENTER_PRIVATE("binary=%p, required_bds_factor=%d, stream_config=%p", - binary, required_bds_factor, stream_config); + binary, required_bds_factor, stream_config); #endif /* Initialize by default values. */ @@ -535,171 +544,173 @@ ia_css_binary_get_shading_info_type_1(const struct ia_css_binary *binary, /* [in info->info.type_1.sc_bayer_origin_y_bqs_on_shading_table = 0; err = ia_css_binary_compute_shading_table_bayer_origin( - binary, - required_bds_factor, - stream_config, - &res); + binary, + required_bds_factor, + stream_config, + &res); if (err != IA_CSS_SUCCESS) #else *shading_info = DEFAULT_SHADING_INFO_TYPE_1; err = sh_css_binary_get_sc_requirements(binary, required_bds_factor, stream_config, &scr); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR_PRIVATE(err); #endif return err; #ifdef ISP2401 - } +} - IA_CSS_LOG("binary: id=%d, sctbl=%dx%d, deci=%d", - binary->info->sp.id, binary->sctbl_width_per_color, binary->sctbl_height, binary->deci_factor_log2); - IA_CSS_LOG("binary: in=%dx%d, in_padded_w=%d, int=%dx%d, int_padded_w=%d, out=%dx%d, out_padded_w=%d", - binary->in_frame_info.res.width, binary->in_frame_info.res.height, binary->in_frame_info.padded_width, - binary->internal_frame_info.res.width, binary->internal_frame_info.res.height, - binary->internal_frame_info.padded_width, - binary->out_frame_info[0].res.width, binary->out_frame_info[0].res.height, - binary->out_frame_info[0].padded_width); - - /* Set the input size from sensor, which includes left/top crop size. */ - in_width_bqs = _ISP_BQS(binary->in_frame_info.res.width); - in_height_bqs = _ISP_BQS(binary->in_frame_info.res.height); - - /* Frame size internally used in ISP, including sensor data and padding. - * This is the frame size, to which the shading correction is applied. - */ - internal_width_bqs = _ISP_BQS(binary->internal_frame_info.res.width); - internal_height_bqs = _ISP_BQS(binary->internal_frame_info.res.height); - - /* Shading table. */ - num_hor_grids = binary->sctbl_width_per_color; - num_ver_grids = binary->sctbl_height; - bqs_per_grid_cell = (1 << binary->deci_factor_log2); - tbl_width_bqs = (num_hor_grids - 1) * bqs_per_grid_cell; - tbl_height_bqs = (num_ver_grids - 1) * bqs_per_grid_cell; +IA_CSS_LOG("binary: id=%d, sctbl=%dx%d, deci=%d", + binary->info->sp.id, binary->sctbl_width_per_color, binary->sctbl_height, binary->deci_factor_log2); +IA_CSS_LOG("binary: in=%dx%d, in_padded_w=%d, int=%dx%d, int_padded_w=%d, out=%dx%d, out_padded_w=%d", + binary->in_frame_info.res.width, binary->in_frame_info.res.height, binary->in_frame_info.padded_width, + binary->internal_frame_info.res.width, binary->internal_frame_info.res.height, + binary->internal_frame_info.padded_width, + binary->out_frame_info[0].res.width, binary->out_frame_info[0].res.height, + binary->out_frame_info[0].padded_width); + +/* Set the input size from sensor, which includes left/top crop size. */ +in_width_bqs = _ISP_BQS(binary->in_frame_info.res.width); +in_height_bqs = _ISP_BQS(binary->in_frame_info.res.height); + +/* Frame size internally used in ISP, including sensor data and padding. + * This is the frame size, to which the shading correction is applied. + */ +internal_width_bqs = _ISP_BQS(binary->internal_frame_info.res.width); +internal_height_bqs = _ISP_BQS(binary->internal_frame_info.res.height); + +/* Shading table. */ +num_hor_grids = binary->sctbl_width_per_color; +num_ver_grids = binary->sctbl_height; +bqs_per_grid_cell = (1 << binary->deci_factor_log2); +tbl_width_bqs = (num_hor_grids - 1) * bqs_per_grid_cell; +tbl_height_bqs = (num_ver_grids - 1) * bqs_per_grid_cell; #endif #ifndef ISP2401 - info->info.type_1.bayer_scale_hor_ratio_in = res.bayer_scale_hor_ratio_in; - info->info.type_1.bayer_scale_hor_ratio_out = res.bayer_scale_hor_ratio_out; - info->info.type_1.bayer_scale_ver_ratio_in = res.bayer_scale_ver_ratio_in; - info->info.type_1.bayer_scale_ver_ratio_out = res.bayer_scale_ver_ratio_out; - info->info.type_1.sc_bayer_origin_x_bqs_on_shading_table = res.sc_bayer_origin_x_bqs_on_shading_table; - info->info.type_1.sc_bayer_origin_y_bqs_on_shading_table = res.sc_bayer_origin_y_bqs_on_shading_table; +info->info.type_1.bayer_scale_hor_ratio_in = res.bayer_scale_hor_ratio_in; +info->info.type_1.bayer_scale_hor_ratio_out = res.bayer_scale_hor_ratio_out; +info->info.type_1.bayer_scale_ver_ratio_in = res.bayer_scale_ver_ratio_in; +info->info.type_1.bayer_scale_ver_ratio_out = res.bayer_scale_ver_ratio_out; +info->info.type_1.sc_bayer_origin_x_bqs_on_shading_table = res.sc_bayer_origin_x_bqs_on_shading_table; +info->info.type_1.sc_bayer_origin_y_bqs_on_shading_table = res.sc_bayer_origin_y_bqs_on_shading_table; #else - IA_CSS_LOG("tbl_width_bqs=%d, tbl_height_bqs=%d", tbl_width_bqs, tbl_height_bqs); +IA_CSS_LOG("tbl_width_bqs=%d, tbl_height_bqs=%d", tbl_width_bqs, tbl_height_bqs); #endif #ifdef ISP2401 - /* Real sensor data area on the internal frame at shading correction. - * Filters and scaling are applied to the internal frame before shading correction, depending on the binary. - */ - sensor_org_x_bqs_on_internal = scr.sensor_data_origin_x_bqs_on_internal; - sensor_org_y_bqs_on_internal = scr.sensor_data_origin_y_bqs_on_internal; - { - unsigned int bs_frac = 8; /* scaling factor 1.0 in fixed point (8 == FRAC_ACC macro in ISP) */ - unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ - - bs_out = scr.bayer_scale_hor_ratio_out * bs_frac; - bs_in = scr.bayer_scale_hor_ratio_in * bs_frac; - sensor_width_bqs = (in_width_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ +/* Real sensor data area on the internal frame at shading correction. + * Filters and scaling are applied to the internal frame before shading correction, depending on the binary. + */ +sensor_org_x_bqs_on_internal = scr.sensor_data_origin_x_bqs_on_internal; +sensor_org_y_bqs_on_internal = scr.sensor_data_origin_y_bqs_on_internal; +{ + unsigned int bs_frac = 8; /* scaling factor 1.0 in fixed point (8 == FRAC_ACC macro in ISP) */ + unsigned int bs_out, bs_in; /* scaling ratio in fixed point */ - bs_out = scr.bayer_scale_ver_ratio_out * bs_frac; - bs_in = scr.bayer_scale_ver_ratio_in * bs_frac; - sensor_height_bqs = (in_height_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ - } + bs_out = scr.bayer_scale_hor_ratio_out * bs_frac; + bs_in = scr.bayer_scale_hor_ratio_in * bs_frac; + sensor_width_bqs = (in_width_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ - /* Center of the sensor data on the internal frame at shading correction. */ - sensor_center_x_bqs_on_internal = sensor_org_x_bqs_on_internal + sensor_width_bqs / 2; - sensor_center_y_bqs_on_internal = sensor_org_y_bqs_on_internal + sensor_height_bqs / 2; + bs_out = scr.bayer_scale_ver_ratio_out * bs_frac; + bs_in = scr.bayer_scale_ver_ratio_in * bs_frac; + sensor_height_bqs = (in_height_bqs * bs_out + bs_in / 2) / bs_in; /* "+ bs_in/2": rounding */ +} - /* Size of left/right/upper/lower sides of the sensor center on the internal frame. */ - left = sensor_center_x_bqs_on_internal; - right = internal_width_bqs - sensor_center_x_bqs_on_internal; - upper = sensor_center_y_bqs_on_internal; - lower = internal_height_bqs - sensor_center_y_bqs_on_internal; +/* Center of the sensor data on the internal frame at shading correction. */ +sensor_center_x_bqs_on_internal = sensor_org_x_bqs_on_internal + sensor_width_bqs / 2; +sensor_center_y_bqs_on_internal = sensor_org_y_bqs_on_internal + sensor_height_bqs / 2; - /* Align the size of left/right/upper/lower sides to a multiple of the grid cell size. */ - adjust_left = CEIL_MUL(left, bqs_per_grid_cell); - adjust_right = CEIL_MUL(right, bqs_per_grid_cell); - adjust_upper = CEIL_MUL(upper, bqs_per_grid_cell); - adjust_lower = CEIL_MUL(lower, bqs_per_grid_cell); +/* Size of left/right/upper/lower sides of the sensor center on the internal frame. */ +left = sensor_center_x_bqs_on_internal; +right = internal_width_bqs - sensor_center_x_bqs_on_internal; +upper = sensor_center_y_bqs_on_internal; +lower = internal_height_bqs - sensor_center_y_bqs_on_internal; - /* Shading table should cover the adjusted frame size. */ - adjust_width_bqs = adjust_left + adjust_right; - adjust_height_bqs = adjust_upper + adjust_lower; +/* Align the size of left/right/upper/lower sides to a multiple of the grid cell size. */ +adjust_left = CEIL_MUL(left, bqs_per_grid_cell); +adjust_right = CEIL_MUL(right, bqs_per_grid_cell); +adjust_upper = CEIL_MUL(upper, bqs_per_grid_cell); +adjust_lower = CEIL_MUL(lower, bqs_per_grid_cell); - IA_CSS_LOG("adjust_width_bqs=%d, adjust_height_bqs=%d", adjust_width_bqs, adjust_height_bqs); +/* Shading table should cover the adjusted frame size. */ +adjust_width_bqs = adjust_left + adjust_right; +adjust_height_bqs = adjust_upper + adjust_lower; - if (adjust_width_bqs > tbl_width_bqs || adjust_height_bqs > tbl_height_bqs) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); - return IA_CSS_ERR_INTERNAL_ERROR; - } +IA_CSS_LOG("adjust_width_bqs=%d, adjust_height_bqs=%d", adjust_width_bqs, adjust_height_bqs); - /* Origin of the internal frame on the shading table. */ - internal_org_x_bqs_on_tbl = adjust_left - left; - internal_org_y_bqs_on_tbl = adjust_upper - upper; - - /* Origin of the real sensor data area on the shading table. */ - sensor_org_x_bqs_on_tbl = internal_org_x_bqs_on_tbl + sensor_org_x_bqs_on_internal; - sensor_org_y_bqs_on_tbl = internal_org_y_bqs_on_tbl + sensor_org_y_bqs_on_internal; - - /* The shading information necessary as API is stored in the shading_info. */ - shading_info->info.type_1.num_hor_grids = num_hor_grids; - shading_info->info.type_1.num_ver_grids = num_ver_grids; - shading_info->info.type_1.bqs_per_grid_cell = bqs_per_grid_cell; - - shading_info->info.type_1.bayer_scale_hor_ratio_in = scr.bayer_scale_hor_ratio_in; - shading_info->info.type_1.bayer_scale_hor_ratio_out = scr.bayer_scale_hor_ratio_out; - shading_info->info.type_1.bayer_scale_ver_ratio_in = scr.bayer_scale_ver_ratio_in; - shading_info->info.type_1.bayer_scale_ver_ratio_out = scr.bayer_scale_ver_ratio_out; - - shading_info->info.type_1.isp_input_sensor_data_res_bqs.width = in_width_bqs; - shading_info->info.type_1.isp_input_sensor_data_res_bqs.height = in_height_bqs; - - shading_info->info.type_1.sensor_data_res_bqs.width = sensor_width_bqs; - shading_info->info.type_1.sensor_data_res_bqs.height = sensor_height_bqs; - - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x = (int32_t)sensor_org_x_bqs_on_tbl; - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y = (int32_t)sensor_org_y_bqs_on_tbl; - - /* The shading information related to ISP (but, not necessary as API) is stored in the pipe_config. */ - pipe_config->internal_frame_origin_bqs_on_sctbl.x = (int32_t)internal_org_x_bqs_on_tbl; - pipe_config->internal_frame_origin_bqs_on_sctbl.y = (int32_t)internal_org_y_bqs_on_tbl; - - IA_CSS_LOG("shading_info: grids=%dx%d, cell=%d, scale=%d,%d,%d,%d, input=%dx%d, data=%dx%d, origin=(%d,%d)", - shading_info->info.type_1.num_hor_grids, - shading_info->info.type_1.num_ver_grids, - shading_info->info.type_1.bqs_per_grid_cell, - shading_info->info.type_1.bayer_scale_hor_ratio_in, - shading_info->info.type_1.bayer_scale_hor_ratio_out, - shading_info->info.type_1.bayer_scale_ver_ratio_in, - shading_info->info.type_1.bayer_scale_ver_ratio_out, - shading_info->info.type_1.isp_input_sensor_data_res_bqs.width, - shading_info->info.type_1.isp_input_sensor_data_res_bqs.height, - shading_info->info.type_1.sensor_data_res_bqs.width, - shading_info->info.type_1.sensor_data_res_bqs.height, - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x, - shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y); - - IA_CSS_LOG("pipe_config: origin=(%d,%d)", - pipe_config->internal_frame_origin_bqs_on_sctbl.x, - pipe_config->internal_frame_origin_bqs_on_sctbl.y); +if (adjust_width_bqs > tbl_width_bqs || adjust_height_bqs > tbl_height_bqs) +{ + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; +} - IA_CSS_LEAVE_ERR_PRIVATE(err); +/* Origin of the internal frame on the shading table. */ +internal_org_x_bqs_on_tbl = adjust_left - left; +internal_org_y_bqs_on_tbl = adjust_upper - upper; + +/* Origin of the real sensor data area on the shading table. */ +sensor_org_x_bqs_on_tbl = internal_org_x_bqs_on_tbl + sensor_org_x_bqs_on_internal; +sensor_org_y_bqs_on_tbl = internal_org_y_bqs_on_tbl + sensor_org_y_bqs_on_internal; + +/* The shading information necessary as API is stored in the shading_info. */ +shading_info->info.type_1.num_hor_grids = num_hor_grids; +shading_info->info.type_1.num_ver_grids = num_ver_grids; +shading_info->info.type_1.bqs_per_grid_cell = bqs_per_grid_cell; + +shading_info->info.type_1.bayer_scale_hor_ratio_in = scr.bayer_scale_hor_ratio_in; +shading_info->info.type_1.bayer_scale_hor_ratio_out = scr.bayer_scale_hor_ratio_out; +shading_info->info.type_1.bayer_scale_ver_ratio_in = scr.bayer_scale_ver_ratio_in; +shading_info->info.type_1.bayer_scale_ver_ratio_out = scr.bayer_scale_ver_ratio_out; + +shading_info->info.type_1.isp_input_sensor_data_res_bqs.width = in_width_bqs; +shading_info->info.type_1.isp_input_sensor_data_res_bqs.height = in_height_bqs; + +shading_info->info.type_1.sensor_data_res_bqs.width = sensor_width_bqs; +shading_info->info.type_1.sensor_data_res_bqs.height = sensor_height_bqs; + +shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x = (int32_t)sensor_org_x_bqs_on_tbl; +shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y = (int32_t)sensor_org_y_bqs_on_tbl; + +/* The shading information related to ISP (but, not necessary as API) is stored in the pipe_config. */ +pipe_config->internal_frame_origin_bqs_on_sctbl.x = (int32_t)internal_org_x_bqs_on_tbl; +pipe_config->internal_frame_origin_bqs_on_sctbl.y = (int32_t)internal_org_y_bqs_on_tbl; + +IA_CSS_LOG("shading_info: grids=%dx%d, cell=%d, scale=%d,%d,%d,%d, input=%dx%d, data=%dx%d, origin=(%d,%d)", + shading_info->info.type_1.num_hor_grids, + shading_info->info.type_1.num_ver_grids, + shading_info->info.type_1.bqs_per_grid_cell, + shading_info->info.type_1.bayer_scale_hor_ratio_in, + shading_info->info.type_1.bayer_scale_hor_ratio_out, + shading_info->info.type_1.bayer_scale_ver_ratio_in, + shading_info->info.type_1.bayer_scale_ver_ratio_out, + shading_info->info.type_1.isp_input_sensor_data_res_bqs.width, + shading_info->info.type_1.isp_input_sensor_data_res_bqs.height, + shading_info->info.type_1.sensor_data_res_bqs.width, + shading_info->info.type_1.sensor_data_res_bqs.height, + shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.x, + shading_info->info.type_1.sensor_data_origin_bqs_on_sctbl.y); + +IA_CSS_LOG("pipe_config: origin=(%d,%d)", + pipe_config->internal_frame_origin_bqs_on_sctbl.x, + pipe_config->internal_frame_origin_bqs_on_sctbl.y); + +IA_CSS_LEAVE_ERR_PRIVATE(err); #endif - return err; +return err; } enum ia_css_err ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ - enum ia_css_shading_correction_type type, /* [in] */ - unsigned int required_bds_factor, /* [in] */ - const struct ia_css_stream_config *stream_config, /* [in] */ + enum ia_css_shading_correction_type type, /* [in] */ + unsigned int required_bds_factor, /* [in] */ + const struct ia_css_stream_config *stream_config, /* [in] */ #ifndef ISP2401 - struct ia_css_shading_info *info) /* [out] */ + struct ia_css_shading_info *info) /* [out] */ #else - struct ia_css_shading_info *shading_info, /* [out] */ - struct ia_css_pipe_config *pipe_config) /* [out] */ + struct ia_css_shading_info *shading_info, /* [out] */ + struct ia_css_pipe_config *pipe_config) /* [out] */ #endif { enum ia_css_err err; @@ -711,7 +722,7 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ assert(shading_info); IA_CSS_ENTER_PRIVATE("binary=%p, type=%d, required_bds_factor=%d, stream_config=%p", - binary, type, required_bds_factor, stream_config); + binary, type, required_bds_factor, stream_config); #endif if (type == IA_CSS_SHADING_CORRECTION_TYPE_1) @@ -719,7 +730,7 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ err = ia_css_binary_get_shading_info_type_1(binary, required_bds_factor, stream_config, info); #else err = ia_css_binary_get_shading_info_type_1(binary, required_bds_factor, stream_config, - shading_info, pipe_config); + shading_info, pipe_config); #endif /* Other function calls can be added here when other shading correction types will be added in the future. */ @@ -732,7 +743,7 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ } static void sh_css_binary_common_grid_info(const struct ia_css_binary *binary, - struct ia_css_grid_info *info) + struct ia_css_grid_info *info) { assert(binary); assert(info); @@ -774,9 +785,9 @@ ia_css_binary_dvs_grid_info(const struct ia_css_binary *binary, void ia_css_binary_dvs_stat_grid_info( - const struct ia_css_binary *binary, - struct ia_css_grid_info *info, - struct ia_css_pipe *pipe) + const struct ia_css_binary *binary, + struct ia_css_grid_info *info, + struct ia_css_pipe *pipe) { (void)pipe; sh_css_binary_common_grid_info(binary, info); @@ -786,8 +797,7 @@ ia_css_binary_dvs_stat_grid_info( enum ia_css_err ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, struct ia_css_grid_info *info, - struct ia_css_pipe *pipe) -{ + struct ia_css_pipe *pipe) { struct ia_css_3a_grid_info *s3a_info; enum ia_css_err err = IA_CSS_SUCCESS; @@ -829,7 +839,7 @@ binary_init_pc_histogram(struct sh_css_pc_histogram *histo) static void binary_init_metrics(struct sh_css_binary_metrics *metrics, - const struct ia_css_binary_info *info) + const struct ia_css_binary_info *info) { assert(metrics); assert(info); @@ -844,7 +854,7 @@ binary_init_metrics(struct sh_css_binary_metrics *metrics, /* move to host part of output module */ static bool binary_supports_output_format(const struct ia_css_binary_xinfo *info, - enum ia_css_frame_format format) + enum ia_css_frame_format format) { int i; @@ -887,15 +897,14 @@ binary_supports_vf_format(const struct ia_css_binary_xinfo *info, /* move to host part of bds module */ static bool supports_bds_factor(u32 supported_factors, - uint32_t bds_factor) + uint32_t bds_factor) { return ((supported_factors & PACK_BDS_FACTOR(bds_factor)) != 0); } static enum ia_css_err binary_init_info(struct ia_css_binary_xinfo *info, unsigned int i, - bool *binary_found) -{ + bool *binary_found) { const unsigned char *blob = sh_css_blob_info[i].blob; unsigned int size = sh_css_blob_info[i].header.blob.size; @@ -919,8 +928,7 @@ binary_init_info(struct ia_css_binary_xinfo *info, unsigned int i, * be selected if no other primary matches. */ enum ia_css_err -ia_css_binary_init_infos(void) -{ +ia_css_binary_init_infos(void) { unsigned int i; unsigned int num_of_isp_binaries = sh_css_num_binaries - NUM_OF_SPS - NUM_OF_BLS; @@ -928,11 +936,12 @@ ia_css_binary_init_infos(void) return IA_CSS_SUCCESS; all_binaries = sh_css_malloc(num_of_isp_binaries * - sizeof(*all_binaries)); + sizeof(*all_binaries)); if (!all_binaries) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - for (i = 0; i < num_of_isp_binaries; i++) { + for (i = 0; i < num_of_isp_binaries; i++) + { enum ia_css_err ret; struct ia_css_binary_xinfo *binary = &all_binaries[i]; bool binary_found; @@ -952,12 +961,12 @@ ia_css_binary_init_infos(void) } enum ia_css_err -ia_css_binary_uninit(void) -{ +ia_css_binary_uninit(void) { unsigned int i; struct ia_css_binary_xinfo *b; - for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) { + for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) + { for (b = binary_infos[i]; b; b = b->next) { if (b->xmem_addr) hmm_free(b->xmem_addr); @@ -978,24 +987,24 @@ ia_css_binary_uninit(void) static int binary_grid_deci_factor_log2(int width, int height) { -/* 3A/Shading decimation factor spcification (at August 2008) - * ------------------------------------------------------------------ - * [Image Width (BQ)] [Decimation Factor (BQ)] [Resulting grid cells] -#ifndef ISP2401 - * 1280 ?c 32 40 ?c - * 640 ?c 1279 16 40 ?c 80 - * ?c 639 8 ?c 80 -#else - * from 1280 32 from 40 - * from 640 to 1279 16 from 40 to 80 - * to 639 8 to 80 -#endif - * ------------------------------------------------------------------ - */ -/* Maximum and minimum decimation factor by the specification */ + /* 3A/Shading decimation factor spcification (at August 2008) + * ------------------------------------------------------------------ + * [Image Width (BQ)] [Decimation Factor (BQ)] [Resulting grid cells] + #ifndef ISP2401 + * 1280 ?c 32 40 ?c + * 640 ?c 1279 16 40 ?c 80 + * ?c 639 8 ?c 80 + #else + * from 1280 32 from 40 + * from 640 to 1279 16 from 40 to 80 + * to 639 8 to 80 + #endif + * ------------------------------------------------------------------ + */ + /* Maximum and minimum decimation factor by the specification */ #define MAX_SPEC_DECI_FACT_LOG2 5 #define MIN_SPEC_DECI_FACT_LOG2 3 -/* the smallest frame width in bayer quads when decimation factor (log2) is 5 or 4, by the specification */ + /* the smallest frame width in bayer quads when decimation factor (log2) is 5 or 4, by the specification */ #define DECI_FACT_LOG2_5_SMALLEST_FRAME_WIDTH_BQ 1280 #define DECI_FACT_LOG2_4_SMALLEST_FRAME_WIDTH_BQ 640 @@ -1003,12 +1012,15 @@ binary_grid_deci_factor_log2(int width, int height) int spec_factor; /* the factor (log2) which satisfies the specification */ /* Currently supported maximum width and height are 5120(=80*64) and 3840(=60*64). */ - assert(ISP_BQ_GRID_WIDTH(width, MAX_SPEC_DECI_FACT_LOG2) <= SH_CSS_MAX_BQ_GRID_WIDTH); - assert(ISP_BQ_GRID_HEIGHT(height, MAX_SPEC_DECI_FACT_LOG2) <= SH_CSS_MAX_BQ_GRID_HEIGHT); + assert(ISP_BQ_GRID_WIDTH(width, + MAX_SPEC_DECI_FACT_LOG2) <= SH_CSS_MAX_BQ_GRID_WIDTH); + assert(ISP_BQ_GRID_HEIGHT(height, + MAX_SPEC_DECI_FACT_LOG2) <= SH_CSS_MAX_BQ_GRID_HEIGHT); /* Compute the smallest factor. */ smallest_factor = MAX_SPEC_DECI_FACT_LOG2; - while (ISP_BQ_GRID_WIDTH(width, smallest_factor - 1) <= SH_CSS_MAX_BQ_GRID_WIDTH && + while (ISP_BQ_GRID_WIDTH(width, + smallest_factor - 1) <= SH_CSS_MAX_BQ_GRID_WIDTH && ISP_BQ_GRID_HEIGHT(height, smallest_factor - 1) <= SH_CSS_MAX_BQ_GRID_HEIGHT && smallest_factor > MIN_SPEC_DECI_FACT_LOG2) smallest_factor--; @@ -1064,15 +1076,15 @@ binary_in_frame_padded_width(int in_frame_width, if (stream_config_left_padding != -1) { /* Different than before, we do left&right padding. */ rval = - CEIL_MUL(in_frame_width + nr_of_left_paddings, - 2 * ISP_VEC_NELEMS); + CEIL_MUL(in_frame_width + nr_of_left_paddings, + 2 * ISP_VEC_NELEMS); } else { /* Different than before, we do left&right padding. */ in_frame_width += dvs_env_width; rval = - CEIL_MUL(in_frame_width + - (left_cropping ? nr_of_left_paddings : 0), - 2 * ISP_VEC_NELEMS); + CEIL_MUL(in_frame_width + + (left_cropping ? nr_of_left_paddings : 0), + 2 * ISP_VEC_NELEMS); } } else { rval = isp_internal_width; @@ -1083,33 +1095,32 @@ binary_in_frame_padded_width(int in_frame_width, enum ia_css_err ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, - bool online, - bool two_ppc, - enum atomisp_input_format stream_format, - const struct ia_css_frame_info *in_info, /* can be NULL */ - const struct ia_css_frame_info *bds_out_info, /* can be NULL */ - const struct ia_css_frame_info *out_info[], /* can be NULL */ - const struct ia_css_frame_info *vf_info, /* can be NULL */ - struct ia_css_binary *binary, - struct ia_css_resolution *dvs_env, - int stream_config_left_padding, - bool accelerator) -{ + bool online, + bool two_ppc, + enum atomisp_input_format stream_format, + const struct ia_css_frame_info *in_info, /* can be NULL */ + const struct ia_css_frame_info *bds_out_info, /* can be NULL */ + const struct ia_css_frame_info *out_info[], /* can be NULL */ + const struct ia_css_frame_info *vf_info, /* can be NULL */ + struct ia_css_binary *binary, + struct ia_css_resolution *dvs_env, + int stream_config_left_padding, + bool accelerator) { const struct ia_css_binary_info *info = &xinfo->sp; unsigned int dvs_env_width = 0, - dvs_env_height = 0, - vf_log_ds = 0, - s3a_log_deci = 0, - bits_per_pixel = 0, - /* Resolution at SC/3A/DIS kernel. */ - sc_3a_dis_width = 0, - /* Resolution at SC/3A/DIS kernel. */ - sc_3a_dis_padded_width = 0, - /* Resolution at SC/3A/DIS kernel. */ - sc_3a_dis_height = 0, - isp_internal_width = 0, - isp_internal_height = 0, - s3a_isp_width = 0; + dvs_env_height = 0, + vf_log_ds = 0, + s3a_log_deci = 0, + bits_per_pixel = 0, + /* Resolution at SC/3A/DIS kernel. */ + sc_3a_dis_width = 0, + /* Resolution at SC/3A/DIS kernel. */ + sc_3a_dis_padded_width = 0, + /* Resolution at SC/3A/DIS kernel. */ + sc_3a_dis_height = 0, + isp_internal_width = 0, + isp_internal_height = 0, + s3a_isp_width = 0; bool need_scaling = false; struct ia_css_resolution binary_dvs_env, internal_res; @@ -1121,24 +1132,27 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, assert(binary); binary->info = xinfo; - if (!accelerator) { + if (!accelerator) + { /* binary->css_params has been filled by accelerator itself. */ err = ia_css_isp_param_allocate_isp_parameters( - &binary->mem_params, &binary->css_params, - &info->mem_initializers); + &binary->mem_params, &binary->css_params, + &info->mem_initializers); if (err != IA_CSS_SUCCESS) { return err; } } - for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + { if (out_info[i] && (out_info[i]->res.width != 0)) { bin_out_info = out_info[i]; break; } } - if (in_info && bin_out_info) { + if (in_info && bin_out_info) + { need_scaling = (in_info->res.width != bin_out_info->res.width) || - (in_info->res.height != bin_out_info->res.height); + (in_info->res.height != bin_out_info->res.height); } /* binary_dvs_env has to be equal or larger than SH_CSS_MIN_DVS_ENVELOPE */ @@ -1167,39 +1181,44 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, binary->internal_frame_info.res.height = isp_internal_height; binary->internal_frame_info.raw_bit_depth = bits_per_pixel; - if (in_info) { + if (in_info) + { binary->effective_in_frame_res.width = in_info->res.width; binary->effective_in_frame_res.height = in_info->res.height; bits_per_pixel = in_info->raw_bit_depth; /* input info */ - binary->in_frame_info.res.width = in_info->res.width + info->pipeline.left_cropping; - binary->in_frame_info.res.height = in_info->res.height + info->pipeline.top_cropping; + binary->in_frame_info.res.width = in_info->res.width + + info->pipeline.left_cropping; + binary->in_frame_info.res.height = in_info->res.height + + info->pipeline.top_cropping; binary->in_frame_info.res.width += dvs_env_width; binary->in_frame_info.res.height += dvs_env_height; binary->in_frame_info.padded_width = - binary_in_frame_padded_width(in_info->res.width, - isp_internal_width, - dvs_env_width, - stream_config_left_padding, - info->pipeline.left_cropping, - need_scaling); + binary_in_frame_padded_width(in_info->res.width, + isp_internal_width, + dvs_env_width, + stream_config_left_padding, + info->pipeline.left_cropping, + need_scaling); binary->in_frame_info.format = in_info->format; binary->in_frame_info.raw_bayer_order = in_info->raw_bayer_order; binary->in_frame_info.crop_info = in_info->crop_info; } - if (online) { + if (online) + { bits_per_pixel = ia_css_util_input_format_bpp( - stream_format, two_ppc); + stream_format, two_ppc); } binary->in_frame_info.raw_bit_depth = bits_per_pixel; - for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + { if (out_info[i]) { binary->out_frame_info[i].res.width = out_info[i]->res.width; binary->out_frame_info[i].res.height = out_info[i]->res.height; @@ -1218,13 +1237,15 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, } } - if (vf_info && (vf_info->res.width != 0)) { - err = ia_css_vf_configure(binary, bin_out_info, (struct ia_css_frame_info *)vf_info, &vf_log_ds); + if (vf_info && (vf_info->res.width != 0)) + { + err = ia_css_vf_configure(binary, bin_out_info, + (struct ia_css_frame_info *)vf_info, &vf_log_ds); if (err != IA_CSS_SUCCESS) { if (!accelerator) { ia_css_isp_param_destroy_isp_parameters( - &binary->mem_params, - &binary->css_params); + &binary->mem_params, + &binary->css_params); } return err; } @@ -1235,22 +1256,23 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, binary->input_format = stream_format; /* viewfinder output info */ - if ((vf_info) && (vf_info->res.width != 0)) { + if ((vf_info) && (vf_info->res.width != 0)) + { unsigned int vf_out_vecs, vf_out_width, vf_out_height; binary->vf_frame_info.format = vf_info->format; if (!bin_out_info) return IA_CSS_ERR_INTERNAL_ERROR; vf_out_vecs = __ISP_VF_OUTPUT_WIDTH_VECS(bin_out_info->padded_width, - vf_log_ds); + vf_log_ds); vf_out_width = _ISP_VF_OUTPUT_WIDTH(vf_out_vecs); vf_out_height = _ISP_VF_OUTPUT_HEIGHT(bin_out_info->res.height, - vf_log_ds); + vf_log_ds); /* For preview mode, output pin is used instead of vf. */ if (info->pipeline.mode == IA_CSS_BINARY_MODE_PREVIEW) { binary->out_frame_info[0].res.width = - (bin_out_info->res.width >> vf_log_ds); + (bin_out_info->res.width >> vf_log_ds); binary->out_frame_info[0].padded_width = vf_out_width; binary->out_frame_info[0].res.height = vf_out_height; @@ -1263,24 +1285,27 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, * the width that we actually want to keep, not on * the aligned width. */ binary->vf_frame_info.res.width = - (bin_out_info->res.width >> vf_log_ds); + (bin_out_info->res.width >> vf_log_ds); binary->vf_frame_info.padded_width = vf_out_width; binary->vf_frame_info.res.height = vf_out_height; } - } else { + } else + { binary->vf_frame_info.res.width = 0; binary->vf_frame_info.padded_width = 0; binary->vf_frame_info.res.height = 0; } - if (info->enable.ca_gdc) { + if (info->enable.ca_gdc) + { binary->morph_tbl_width = - _ISP_MORPH_TABLE_WIDTH(isp_internal_width); + _ISP_MORPH_TABLE_WIDTH(isp_internal_width); binary->morph_tbl_aligned_width = - _ISP_MORPH_TABLE_ALIGNED_WIDTH(isp_internal_width); + _ISP_MORPH_TABLE_ALIGNED_WIDTH(isp_internal_width); binary->morph_tbl_height = - _ISP_MORPH_TABLE_HEIGHT(isp_internal_height); - } else { + _ISP_MORPH_TABLE_HEIGHT(isp_internal_height); + } else + { binary->morph_tbl_width = 0; binary->morph_tbl_aligned_width = 0; binary->morph_tbl_height = 0; @@ -1290,7 +1315,8 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, sc_3a_dis_padded_width = binary->in_frame_info.padded_width; sc_3a_dis_height = binary->in_frame_info.res.height; if (bds_out_info && in_info && - bds_out_info->res.width != in_info->res.width) { + bds_out_info->res.width != in_info->res.width) + { /* TODO: Next, "internal_frame_info" should be derived from * bds_out. So this part will change once it is in place! */ sc_3a_dis_width = bds_out_info->res.width + info->pipeline.left_cropping; @@ -1299,56 +1325,62 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, } s3a_isp_width = _ISP_S3A_ELEMS_ISP_WIDTH(sc_3a_dis_padded_width, - info->pipeline.left_cropping); - if (info->s3a.fixed_s3a_deci_log) { + info->pipeline.left_cropping); + if (info->s3a.fixed_s3a_deci_log) + { s3a_log_deci = info->s3a.fixed_s3a_deci_log; - } else { + } else + { s3a_log_deci = binary_grid_deci_factor_log2(s3a_isp_width, - sc_3a_dis_height); + sc_3a_dis_height); } binary->deci_factor_log2 = s3a_log_deci; - if (info->enable.s3a) { + if (info->enable.s3a) + { binary->s3atbl_width = - _ISP_S3ATBL_WIDTH(sc_3a_dis_width, - s3a_log_deci); + _ISP_S3ATBL_WIDTH(sc_3a_dis_width, + s3a_log_deci); binary->s3atbl_height = - _ISP_S3ATBL_HEIGHT(sc_3a_dis_height, - s3a_log_deci); + _ISP_S3ATBL_HEIGHT(sc_3a_dis_height, + s3a_log_deci); binary->s3atbl_isp_width = - _ISP_S3ATBL_ISP_WIDTH(s3a_isp_width, - s3a_log_deci); + _ISP_S3ATBL_ISP_WIDTH(s3a_isp_width, + s3a_log_deci); binary->s3atbl_isp_height = - _ISP_S3ATBL_ISP_HEIGHT(sc_3a_dis_height, - s3a_log_deci); - } else { + _ISP_S3ATBL_ISP_HEIGHT(sc_3a_dis_height, + s3a_log_deci); + } else + { binary->s3atbl_width = 0; binary->s3atbl_height = 0; binary->s3atbl_isp_width = 0; binary->s3atbl_isp_height = 0; } - if (info->enable.sc) { + if (info->enable.sc) + { binary->sctbl_width_per_color = #ifndef ISP2401 - _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, - s3a_log_deci); + _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, + s3a_log_deci); #else - _ISP_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); + _ISP_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); #endif binary->sctbl_aligned_width_per_color = - SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; + SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; binary->sctbl_height = #ifndef ISP2401 - _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); + _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); #else - _ISP_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); + _ISP_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); binary->sctbl_legacy_width_per_color = - _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); + _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); binary->sctbl_legacy_height = - _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); + _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); #endif - } else { + } else + { binary->sctbl_width_per_color = 0; binary->sctbl_aligned_width_per_color = 0; binary->sctbl_height = 0; @@ -1358,11 +1390,11 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, #endif } ia_css_sdis_init_info(&binary->dis, - sc_3a_dis_width, - sc_3a_dis_padded_width, - sc_3a_dis_height, - info->pipeline.isp_pipe_version, - info->enable.dis); + sc_3a_dis_width, + sc_3a_dis_padded_width, + sc_3a_dis_height, + info->pipeline.isp_pipe_version, + info->enable.dis); if (info->pipeline.left_cropping) binary->left_padding = 2 * ISP_VEC_NELEMS - info->pipeline.left_cropping; else @@ -1373,17 +1405,16 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, enum ia_css_err ia_css_binary_find(struct ia_css_binary_descr *descr, - struct ia_css_binary *binary) -{ + struct ia_css_binary *binary) { int mode; bool online; bool two_ppc; enum atomisp_input_format stream_format; const struct ia_css_frame_info *req_in_info, - *req_bds_out_info, - *req_out_info[IA_CSS_BINARY_MAX_OUTPUT_PORTS], - *req_bin_out_info = NULL, - *req_vf_info; + *req_bds_out_info, + *req_out_info[IA_CSS_BINARY_MAX_OUTPUT_PORTS], + *req_bin_out_info = NULL, + *req_vf_info; struct ia_css_binary_xinfo *xcandidate; #ifndef ISP2401 @@ -1411,9 +1442,9 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, assert(binary); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() enter: descr=%p, (mode=%d), binary=%p\n", - descr, descr->mode, - binary); + "ia_css_binary_find() enter: descr=%p, (mode=%d), binary=%p\n", + descr, descr->mode, + binary); mode = descr->mode; online = descr->online; @@ -1421,7 +1452,8 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, stream_format = descr->stream_format; req_in_info = descr->in_info; req_bds_out_info = descr->bds_out_info; - for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + { req_out_info[i] = descr->out_info[i]; if (req_out_info[i] && (req_out_info[i]->res.width != 0)) req_bin_out_info = req_out_info[i]; @@ -1464,7 +1496,8 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, internal_res.width = 0; internal_res.height = 0; - if (mode == IA_CSS_BINARY_MODE_VIDEO) { + if (mode == IA_CSS_BINARY_MODE_VIDEO) + { dvs_env = descr->dvs_env; need_dz = descr->enable_dz; /* Video is the only mode that has a nodz variant. */ @@ -1473,14 +1506,15 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, /* print a map of the binary file */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "BINARY INFO:\n"); - for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) { + for (i = 0; i < IA_CSS_BINARY_NUM_MODES; i++) + { xcandidate = binary_infos[i]; if (xcandidate) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%d:\n", i); while (xcandidate) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " Name:%s Type:%d Cont:%d\n", - xcandidate->blob->name, xcandidate->type, - xcandidate->sp.enable.continuous); + xcandidate->blob->name, xcandidate->type, + xcandidate->sp.enable.continuous); xcandidate = xcandidate->next; } } @@ -1488,13 +1522,14 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, /* printf("sh_css_binary_find: pipe version %d\n", isp_pipe_version); */ for (xcandidate = binary_infos[mode]; xcandidate; - xcandidate = xcandidate->next) { + xcandidate = xcandidate->next) + { struct ia_css_binary_info *candidate = &xcandidate->sp; /* printf("sh_css_binary_find: evaluating candidate: * %d\n",candidate->id); */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() candidate = %p, mode = %d ID = %d\n", - candidate, candidate->pipeline.mode, candidate->id); + "ia_css_binary_find() candidate = %p, mode = %d ID = %d\n", + candidate, candidate->pipeline.mode, candidate->id); /* * MW: Only a limited set of jointly configured binaries can @@ -1504,16 +1539,16 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, if (!candidate->enable.continuous && continuous && (mode != IA_CSS_BINARY_MODE_COPY)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d && (%d != %d)\n", - __LINE__, candidate->enable.continuous, - continuous, mode, - IA_CSS_BINARY_MODE_COPY); + "ia_css_binary_find() [%d] continue: !%d && %d && (%d != %d)\n", + __LINE__, candidate->enable.continuous, + continuous, mode, + IA_CSS_BINARY_MODE_COPY); continue; } if (striped && candidate->iterator.num_stripes == 1) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: binary is not striped\n", - __LINE__); + "ia_css_binary_find() [%d] continue: binary is not striped\n", + __LINE__); continue; } @@ -1522,83 +1557,83 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, (mode != IA_CSS_BINARY_MODE_CAPTURE_PP) && (mode != IA_CSS_BINARY_MODE_VF_PP)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d != %d)\n", - __LINE__, - candidate->pipeline.isp_pipe_version, isp_pipe_version); + "ia_css_binary_find() [%d] continue: (%d != %d)\n", + __LINE__, + candidate->pipeline.isp_pipe_version, isp_pipe_version); continue; } if (!candidate->enable.reduced_pipe && enable_reduced_pipe) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, - candidate->enable.reduced_pipe, - enable_reduced_pipe); + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + candidate->enable.reduced_pipe, + enable_reduced_pipe); continue; } if (!candidate->enable.dvs_6axis && enable_dvs_6axis) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, - candidate->enable.dvs_6axis, - enable_dvs_6axis); + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + candidate->enable.dvs_6axis, + enable_dvs_6axis); continue; } if (candidate->enable.high_speed && !enable_high_speed) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: %d && !%d\n", - __LINE__, - candidate->enable.high_speed, - enable_high_speed); + "ia_css_binary_find() [%d] continue: %d && !%d\n", + __LINE__, + candidate->enable.high_speed, + enable_high_speed); continue; } if (!candidate->enable.xnr && need_xnr) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: %d && !%d\n", - __LINE__, - candidate->enable.xnr, - need_xnr); + "ia_css_binary_find() [%d] continue: %d && !%d\n", + __LINE__, + candidate->enable.xnr, + need_xnr); continue; } if (!(candidate->enable.ds & 2) && enable_yuv_ds) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, - ((candidate->enable.ds & 2) != 0), - enable_yuv_ds); + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + ((candidate->enable.ds & 2) != 0), + enable_yuv_ds); continue; } if ((candidate->enable.ds & 2) && !enable_yuv_ds) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: %d && !%d\n", - __LINE__, - ((candidate->enable.ds & 2) != 0), - enable_yuv_ds); + "ia_css_binary_find() [%d] continue: %d && !%d\n", + __LINE__, + ((candidate->enable.ds & 2) != 0), + enable_yuv_ds); continue; } if (mode == IA_CSS_BINARY_MODE_VIDEO && - candidate->enable.ds && need_ds) + candidate->enable.ds && need_ds) need_dz = false; /* when we require vf output, we need to have vf_veceven */ if ((req_vf_info) && !(candidate->enable.vf_veceven || - /* or variable vf vec even */ - candidate->vf_dec.is_variable || - /* or more than one output pin. */ - xcandidate->num_output_pins > 1)) { + /* or variable vf vec even */ + candidate->vf_dec.is_variable || + /* or more than one output pin. */ + xcandidate->num_output_pins > 1)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%p != NULL) && !(%d || %d || (%d >%d))\n", - __LINE__, req_vf_info, - candidate->enable.vf_veceven, - candidate->vf_dec.is_variable, - xcandidate->num_output_pins, 1); + "ia_css_binary_find() [%d] continue: (%p != NULL) && !(%d || %d || (%d >%d))\n", + __LINE__, req_vf_info, + candidate->enable.vf_veceven, + candidate->vf_dec.is_variable, + xcandidate->num_output_pins, 1); continue; } if (!candidate->enable.dvs_envelope && need_dvs) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, - candidate->enable.dvs_envelope, (int)need_dvs); + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, + candidate->enable.dvs_envelope, (int)need_dvs); continue; } /* internal_res check considers input, output, and dvs envelope sizes */ @@ -1606,79 +1641,80 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, req_bin_out_info, &dvs_env, candidate, &internal_res); if (internal_res.width > candidate->internal.max_width) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d > %d)\n", - __LINE__, internal_res.width, - candidate->internal.max_width); + "ia_css_binary_find() [%d] continue: (%d > %d)\n", + __LINE__, internal_res.width, + candidate->internal.max_width); continue; } if (internal_res.height > candidate->internal.max_height) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d > %d)\n", - __LINE__, internal_res.height, - candidate->internal.max_height); + "ia_css_binary_find() [%d] continue: (%d > %d)\n", + __LINE__, internal_res.height, + candidate->internal.max_height); continue; } if (!candidate->enable.ds && need_ds && !(xcandidate->num_output_pins > 1)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, candidate->enable.ds, (int)need_ds); + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, candidate->enable.ds, (int)need_ds); continue; } if (!candidate->enable.uds && !candidate->enable.dvs_6axis && need_dz) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && !%d && %d\n", - __LINE__, candidate->enable.uds, - candidate->enable.dvs_6axis, (int)need_dz); + "ia_css_binary_find() [%d] continue: !%d && !%d && %d\n", + __LINE__, candidate->enable.uds, + candidate->enable.dvs_6axis, (int)need_dz); continue; } if (online && candidate->input.source == IA_CSS_BINARY_INPUT_MEMORY) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: %d && (%d == %d)\n", - __LINE__, online, candidate->input.source, - IA_CSS_BINARY_INPUT_MEMORY); + "ia_css_binary_find() [%d] continue: %d && (%d == %d)\n", + __LINE__, online, candidate->input.source, + IA_CSS_BINARY_INPUT_MEMORY); continue; } if (!online && candidate->input.source == IA_CSS_BINARY_INPUT_SENSOR) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && (%d == %d)\n", - __LINE__, online, candidate->input.source, - IA_CSS_BINARY_INPUT_SENSOR); + "ia_css_binary_find() [%d] continue: !%d && (%d == %d)\n", + __LINE__, online, candidate->input.source, + IA_CSS_BINARY_INPUT_SENSOR); continue; } if (req_bin_out_info->res.width < candidate->output.min_width || req_bin_out_info->res.width > candidate->output.max_width) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d > %d) || (%d < %d)\n", - __LINE__, - req_bin_out_info->padded_width, - candidate->output.min_width, - req_bin_out_info->padded_width, - candidate->output.max_width); + "ia_css_binary_find() [%d] continue: (%d > %d) || (%d < %d)\n", + __LINE__, + req_bin_out_info->padded_width, + candidate->output.min_width, + req_bin_out_info->padded_width, + candidate->output.max_width); continue; } - if (xcandidate->num_output_pins > 1 && /* in case we have a second output pin, */ - req_vf_info) { /* and we need vf output. */ + if (xcandidate->num_output_pins > 1 && + /* in case we have a second output pin, */ + req_vf_info) { /* and we need vf output. */ if (req_vf_info->res.width > candidate->output.max_width) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d < %d)\n", - __LINE__, - req_vf_info->res.width, - candidate->output.max_width); + "ia_css_binary_find() [%d] continue: (%d < %d)\n", + __LINE__, + req_vf_info->res.width, + candidate->output.max_width); continue; } } if (req_in_info->padded_width > candidate->input.max_width) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d > %d)\n", - __LINE__, req_in_info->padded_width, - candidate->input.max_width); + "ia_css_binary_find() [%d] continue: (%d > %d)\n", + __LINE__, req_in_info->padded_width, + candidate->input.max_width); continue; } if (!binary_supports_output_format(xcandidate, req_bin_out_info->format)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d\n", - __LINE__, - binary_supports_output_format(xcandidate, req_bin_out_info->format)); + "ia_css_binary_find() [%d] continue: !%d\n", + __LINE__, + binary_supports_output_format(xcandidate, req_bin_out_info->format)); continue; } #ifdef ISP2401 @@ -1690,16 +1726,17 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, continue; } #endif - if (xcandidate->num_output_pins > 1 && /* in case we have a second output pin, */ + if (xcandidate->num_output_pins > 1 && + /* in case we have a second output pin, */ req_vf_info && /* and we need vf output. */ - /* check if the required vf format - is supported. */ + /* check if the required vf format + is supported. */ !binary_supports_output_format(xcandidate, req_vf_info->format)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d > %d) && (%p != NULL) && !%d\n", - __LINE__, xcandidate->num_output_pins, 1, - req_vf_info, - binary_supports_output_format(xcandidate, req_vf_info->format)); + "ia_css_binary_find() [%d] continue: (%d > %d) && (%p != NULL) && !%d\n", + __LINE__, xcandidate->num_output_pins, 1, + req_vf_info, + binary_supports_output_format(xcandidate, req_vf_info->format)); continue; } @@ -1708,10 +1745,10 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, req_vf_info && candidate->enable.vf_veceven && !binary_supports_vf_format(xcandidate, req_vf_info->format)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d == %d) && (%p != NULL) && %d && !%d\n", - __LINE__, xcandidate->num_output_pins, 1, - req_vf_info, candidate->enable.vf_veceven, - binary_supports_vf_format(xcandidate, req_vf_info->format)); + "ia_css_binary_find() [%d] continue: (%d == %d) && (%p != NULL) && %d && !%d\n", + __LINE__, xcandidate->num_output_pins, 1, + req_vf_info, candidate->enable.vf_veceven, + binary_supports_vf_format(xcandidate, req_vf_info->format)); continue; } @@ -1720,65 +1757,65 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, req_vf_info && candidate->enable.vf_veceven) { /* and we need vf output. */ if (req_vf_info->res.width > candidate->output.max_width) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: (%d < %d)\n", - __LINE__, - req_vf_info->res.width, - candidate->output.max_width); + "ia_css_binary_find() [%d] continue: (%d < %d)\n", + __LINE__, + req_vf_info->res.width, + candidate->output.max_width); continue; } } if (!supports_bds_factor(candidate->bds.supported_bds_factors, - descr->required_bds_factor)) { + descr->required_bds_factor)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", - __LINE__, candidate->bds.supported_bds_factors, - descr->required_bds_factor); + "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", + __LINE__, candidate->bds.supported_bds_factors, + descr->required_bds_factor); continue; } if (!candidate->enable.dpc && need_dpc) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", - __LINE__, candidate->enable.dpc, - descr->enable_dpc); + "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", + __LINE__, candidate->enable.dpc, + descr->enable_dpc); continue; } if (candidate->uds.use_bci && enable_capture_pp_bli) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", - __LINE__, candidate->uds.use_bci, - descr->enable_capture_pp_bli); + "ia_css_binary_find() [%d] continue: 0x%x & 0x%x)\n", + __LINE__, candidate->uds.use_bci, + descr->enable_capture_pp_bli); continue; } #ifdef ISP2401 if (candidate->enable.luma_only != enable_luma_only) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: %d != %d\n", - __LINE__, candidate->enable.luma_only, - descr->enable_luma_only); + "ia_css_binary_find() [%d] continue: %d != %d\n", + __LINE__, candidate->enable.luma_only, + descr->enable_luma_only); continue; } if (!candidate->enable.tnr && need_tnr) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() [%d] continue: !%d && %d\n", - __LINE__, candidate->enable.tnr, - descr->enable_tnr); + "ia_css_binary_find() [%d] continue: !%d && %d\n", + __LINE__, candidate->enable.tnr, + descr->enable_tnr); continue; } #endif /* reconfigure any variable properties of the binary */ err = ia_css_binary_fill_info(xcandidate, online, two_ppc, - stream_format, req_in_info, - req_bds_out_info, - req_out_info, req_vf_info, - binary, &dvs_env, - descr->stream_config_left_padding, - false); + stream_format, req_in_info, + req_bds_out_info, + req_out_info, req_vf_info, + binary, &dvs_env, + descr->stream_config_left_padding, + false); if (err != IA_CSS_SUCCESS) break; @@ -1787,11 +1824,11 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() selected = %p, mode = %d ID = %d\n", - xcandidate, xcandidate ? xcandidate->sp.pipeline.mode : 0, xcandidate ? xcandidate->sp.id : 0); + "ia_css_binary_find() selected = %p, mode = %d ID = %d\n", + xcandidate, xcandidate ? xcandidate->sp.pipeline.mode : 0, xcandidate ? xcandidate->sp.id : 0); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_binary_find() leave: return_err=%d\n", err); + "ia_css_binary_find() leave: return_err=%d\n", err); return err; } @@ -1817,7 +1854,7 @@ ia_css_binary_destroy_isp_parameters(struct ia_css_binary *binary) void ia_css_binary_get_isp_binaries(struct ia_css_binary_xinfo **binaries, - uint32_t *num_isp_binaries) + uint32_t *num_isp_binaries) { assert(binaries); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h index fffe3b8461625..9eca373c13636 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h @@ -48,10 +48,10 @@ more details. * false, if the query fails. */ bool ia_css_query_internal_queue_id( - enum ia_css_buffer_type buf_type, - unsigned int thread_id, - enum sh_css_queue_id *val - ); + enum ia_css_buffer_type buf_type, + unsigned int thread_id, + enum sh_css_queue_id *val +); /** * @brief Map buffer type to a internal queue id. @@ -62,10 +62,10 @@ bool ia_css_query_internal_queue_id( * @return none */ void ia_css_queue_map( - unsigned int thread_id, - enum ia_css_buffer_type buf_type, - bool map - ); + unsigned int thread_id, + enum ia_css_buffer_type buf_type, + bool map +); /** * @brief Initialize buffer type to a queue id mapping @@ -97,9 +97,9 @@ void ia_css_bufq_init(void); * */ enum ia_css_err ia_css_bufq_enqueue_buffer( - int thread_index, - int queue_id, - uint32_t item); + int thread_index, + int queue_id, + uint32_t item); /** * @brief Dequeues an item from SP to host buffer queue. @@ -111,8 +111,8 @@ enum ia_css_err ia_css_bufq_enqueue_buffer( * */ enum ia_css_err ia_css_bufq_dequeue_buffer( - int queue_id, - uint32_t *item); + int queue_id, + uint32_t *item); /** * @brief Enqueue an event item into host to SP communication event queue. @@ -125,11 +125,11 @@ enum ia_css_err ia_css_bufq_dequeue_buffer( * */ enum ia_css_err ia_css_bufq_enqueue_psys_event( - u8 evt_id, - u8 evt_payload_0, - u8 evt_payload_1, - uint8_t evt_payload_2 - ); + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, + uint8_t evt_payload_2 +); /** * @brief Dequeue an item from SP to host communication event queue. @@ -139,9 +139,9 @@ enum ia_css_err ia_css_bufq_enqueue_psys_event( * */ enum ia_css_err ia_css_bufq_dequeue_psys_event( - u8 item[BUFQ_EVENT_SIZE] + u8 item[BUFQ_EVENT_SIZE] - ); +); /** * @brief Enqueue an event item into host to SP EOF event queue. @@ -151,7 +151,7 @@ enum ia_css_err ia_css_bufq_dequeue_psys_event( * */ enum ia_css_err ia_css_bufq_enqueue_isys_event( - uint8_t evt_id); + uint8_t evt_id); /** * @brief Dequeue an item from SP to host communication EOF event queue. @@ -162,7 +162,7 @@ enum ia_css_err ia_css_bufq_enqueue_isys_event( * */ enum ia_css_err ia_css_bufq_dequeue_isys_event( - u8 item[BUFQ_EVENT_SIZE]); + u8 item[BUFQ_EVENT_SIZE]); /** * @brief Enqueue a tagger command item into tagger command queue.. @@ -172,7 +172,7 @@ enum ia_css_err ia_css_bufq_dequeue_isys_event( * */ enum ia_css_err ia_css_bufq_enqueue_tag_cmd( - uint32_t item); + uint32_t item); /** * @brief Uninitializes bufq module. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c index dff5bb8211b1c..87ce18f8267ec 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c @@ -38,10 +38,10 @@ static char prefix[BUFQ_DUMP_FILE_NAME_PREFIX_SIZE] = {0}; struct sh_css_queues { /* Host2SP buffer queue */ ia_css_queue_t host2sp_buffer_queue_handles - [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; /* SP2Host buffer queue */ ia_css_queue_t sp2host_buffer_queue_handles - [SH_CSS_MAX_NUM_QUEUES]; + [SH_CSS_MAX_NUM_QUEUES]; /* Host2SP event queue */ ia_css_queue_t host2sp_psys_event_queue_handle; @@ -65,10 +65,10 @@ struct sh_css_queues { struct sh_css_queues { /* Host2SP buffer queue */ ia_css_queue_t host2sp_buffer_queue_handles - [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; /* SP2Host buffer queue */ ia_css_queue_t sp2host_buffer_queue_handles - [SH_CSS_MAX_NUM_QUEUES]; + [SH_CSS_MAX_NUM_QUEUES]; /* Host2SP event queue */ ia_css_queue_t host2sp_psys_event_queue_handle; @@ -95,26 +95,27 @@ struct sh_css_queues { ********************************************************/ static struct sh_css_queues css_queues; -static int buffer_type_to_queue_id_map[SH_CSS_MAX_SP_THREADS][IA_CSS_NUM_DYNAMIC_BUFFER_TYPE]; +static int +buffer_type_to_queue_id_map[SH_CSS_MAX_SP_THREADS][IA_CSS_NUM_DYNAMIC_BUFFER_TYPE]; static bool queue_availability[SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; /******************************************************* *** Static functions ********************************************************/ static void map_buffer_type_to_queue_id( - unsigned int thread_id, - enum ia_css_buffer_type buf_type - ); + unsigned int thread_id, + enum ia_css_buffer_type buf_type +); static void unmap_buffer_type_to_queue_id( - unsigned int thread_id, - enum ia_css_buffer_type buf_type - ); + unsigned int thread_id, + enum ia_css_buffer_type buf_type +); static ia_css_queue_t *bufq_get_qhandle( - enum sh_css_queue_type type, - enum sh_css_queue_id id, - int thread - ); + enum sh_css_queue_type type, + enum sh_css_queue_id id, + int thread +); /******************************************************* *** Public functions @@ -135,15 +136,15 @@ void ia_css_queue_map_init(void) } void ia_css_queue_map( - unsigned int thread_id, - enum ia_css_buffer_type buf_type, - bool map) + unsigned int thread_id, + enum ia_css_buffer_type buf_type, + bool map) { assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); assert(thread_id < SH_CSS_MAX_SP_THREADS); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_queue_map() enter: buf_type=%d, thread_id=%d\n", buf_type, thread_id); + "ia_css_queue_map() enter: buf_type=%d, thread_id=%d\n", buf_type, thread_id); if (map) map_buffer_type_to_queue_id(thread_id, buf_type); @@ -155,13 +156,14 @@ void ia_css_queue_map( * @brief Query the internal queue ID. */ bool ia_css_query_internal_queue_id( - enum ia_css_buffer_type buf_type, - unsigned int thread_id, - enum sh_css_queue_id *val) + enum ia_css_buffer_type buf_type, + unsigned int thread_id, + enum sh_css_queue_id *val) { IA_CSS_ENTER("buf_type=%d, thread_id=%d, val = %p", buf_type, thread_id, val); - if ((!val) || (thread_id >= SH_CSS_MAX_SP_THREADS) || (buf_type >= IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)) { + if ((!val) || (thread_id >= SH_CSS_MAX_SP_THREADS) || + (buf_type >= IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)) { IA_CSS_LEAVE("return_val = false"); return false; } @@ -180,20 +182,22 @@ bool ia_css_query_internal_queue_id( *** Static functions ********************************************************/ static void map_buffer_type_to_queue_id( - unsigned int thread_id, - enum ia_css_buffer_type buf_type) + unsigned int thread_id, + enum ia_css_buffer_type buf_type) { unsigned int i; assert(thread_id < SH_CSS_MAX_SP_THREADS); assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); - assert(buffer_type_to_queue_id_map[thread_id][buf_type] == SH_CSS_INVALID_QUEUE_ID); + assert(buffer_type_to_queue_id_map[thread_id][buf_type] == + SH_CSS_INVALID_QUEUE_ID); /* queue 0 is reserved for parameters because it doesn't depend on events */ if (buf_type == IA_CSS_BUFFER_TYPE_PARAMETER_SET) { assert(queue_availability[thread_id][IA_CSS_PARAMETER_SET_QUEUE_ID]); queue_availability[thread_id][IA_CSS_PARAMETER_SET_QUEUE_ID] = false; - buffer_type_to_queue_id_map[thread_id][buf_type] = IA_CSS_PARAMETER_SET_QUEUE_ID; + buffer_type_to_queue_id_map[thread_id][buf_type] = + IA_CSS_PARAMETER_SET_QUEUE_ID; return; } @@ -201,7 +205,8 @@ static void map_buffer_type_to_queue_id( if (buf_type == IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET) { assert(queue_availability[thread_id][IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID]); queue_availability[thread_id][IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID] = false; - buffer_type_to_queue_id_map[thread_id][buf_type] = IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID; + buffer_type_to_queue_id_map[thread_id][buf_type] = + IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID; return; } @@ -218,14 +223,15 @@ static void map_buffer_type_to_queue_id( } static void unmap_buffer_type_to_queue_id( - unsigned int thread_id, - enum ia_css_buffer_type buf_type) + unsigned int thread_id, + enum ia_css_buffer_type buf_type) { int queue_id; assert(thread_id < SH_CSS_MAX_SP_THREADS); assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); - assert(buffer_type_to_queue_id_map[thread_id][buf_type] != SH_CSS_INVALID_QUEUE_ID); + assert(buffer_type_to_queue_id_map[thread_id][buf_type] != + SH_CSS_INVALID_QUEUE_ID); queue_id = buffer_type_to_queue_id_map[thread_id][buf_type]; buffer_type_to_queue_id_map[thread_id][buf_type] = SH_CSS_INVALID_QUEUE_ID; @@ -233,16 +239,16 @@ static void unmap_buffer_type_to_queue_id( } static ia_css_queue_t *bufq_get_qhandle( - enum sh_css_queue_type type, - enum sh_css_queue_id id, - int thread) + enum sh_css_queue_type type, + enum sh_css_queue_id id, + int thread) { ia_css_queue_t *q = NULL; switch (type) { case sh_css_host2sp_buffer_queue: if ((thread >= SH_CSS_MAX_SP_THREADS) || (thread < 0) || - (id == SH_CSS_INVALID_QUEUE_ID)) + (id == SH_CSS_INVALID_QUEUE_ID)) break; q = &css_queues.host2sp_buffer_queue_handles[thread][id]; break; @@ -308,7 +314,8 @@ void ia_css_bufq_init(void) /* Setup all the local queue descriptors for Host2SP Buffer Queues */ for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) for (j = 0; j < SH_CSS_MAX_NUM_QUEUES; j++) { - init_bufq((uint32_t)offsetof(struct host_sp_queues, host2sp_buffer_queues_desc[i][j]), + init_bufq((uint32_t)offsetof(struct host_sp_queues, + host2sp_buffer_queues_desc[i][j]), (uint32_t)offsetof(struct host_sp_queues, host2sp_buffer_queues_elems[i][j]), &css_queues.host2sp_buffer_queue_handles[i][j]); } @@ -321,23 +328,27 @@ void ia_css_bufq_init(void) } /* Host2SP event queue*/ - init_bufq((uint32_t)offsetof(struct host_sp_queues, host2sp_psys_event_queue_desc), + init_bufq((uint32_t)offsetof(struct host_sp_queues, + host2sp_psys_event_queue_desc), (uint32_t)offsetof(struct host_sp_queues, host2sp_psys_event_queue_elems), &css_queues.host2sp_psys_event_queue_handle); /* SP2Host event queue */ - init_bufq((uint32_t)offsetof(struct host_sp_queues, sp2host_psys_event_queue_desc), + init_bufq((uint32_t)offsetof(struct host_sp_queues, + sp2host_psys_event_queue_desc), (uint32_t)offsetof(struct host_sp_queues, sp2host_psys_event_queue_elems), &css_queues.sp2host_psys_event_queue_handle); #if !defined(HAS_NO_INPUT_SYSTEM) /* Host2SP ISYS event queue */ - init_bufq((uint32_t)offsetof(struct host_sp_queues, host2sp_isys_event_queue_desc), + init_bufq((uint32_t)offsetof(struct host_sp_queues, + host2sp_isys_event_queue_desc), (uint32_t)offsetof(struct host_sp_queues, host2sp_isys_event_queue_elems), &css_queues.host2sp_isys_event_queue_handle); /* SP2Host ISYS event queue*/ - init_bufq((uint32_t)offsetof(struct host_sp_queues, sp2host_isys_event_queue_desc), + init_bufq((uint32_t)offsetof(struct host_sp_queues, + sp2host_isys_event_queue_desc), (uint32_t)offsetof(struct host_sp_queues, sp2host_isys_event_queue_elems), &css_queues.sp2host_isys_event_queue_handle); @@ -351,9 +362,9 @@ void ia_css_bufq_init(void) } enum ia_css_err ia_css_bufq_enqueue_buffer( - int thread_index, - int queue_id, - uint32_t item) + int thread_index, + int queue_id, + uint32_t item) { enum ia_css_err return_err = IA_CSS_SUCCESS; ia_css_queue_t *q; @@ -361,13 +372,13 @@ enum ia_css_err ia_css_bufq_enqueue_buffer( IA_CSS_ENTER_PRIVATE("queue_id=%d", queue_id); if ((thread_index >= SH_CSS_MAX_SP_THREADS) || (thread_index < 0) || - (queue_id == SH_CSS_INVALID_QUEUE_ID)) + (queue_id == SH_CSS_INVALID_QUEUE_ID)) return IA_CSS_ERR_INVALID_ARGUMENTS; /* Get the queue for communication */ q = bufq_get_qhandle(sh_css_host2sp_buffer_queue, - queue_id, - thread_index); + queue_id, + thread_index); if (q) { error = ia_css_queue_enqueue(q, item); return_err = ia_css_convert_errno(error); @@ -381,8 +392,8 @@ enum ia_css_err ia_css_bufq_enqueue_buffer( } enum ia_css_err ia_css_bufq_dequeue_buffer( - int queue_id, - uint32_t *item) + int queue_id, + uint32_t *item) { enum ia_css_err return_err; int error = 0; @@ -396,8 +407,8 @@ enum ia_css_err ia_css_bufq_dequeue_buffer( return IA_CSS_ERR_INVALID_ARGUMENTS; q = bufq_get_qhandle(sh_css_sp2host_buffer_queue, - queue_id, - -1); + queue_id, + -1); if (q) { error = ia_css_queue_dequeue(q, item); return_err = ia_css_convert_errno(error); @@ -411,10 +422,10 @@ enum ia_css_err ia_css_bufq_dequeue_buffer( } enum ia_css_err ia_css_bufq_enqueue_psys_event( - u8 evt_id, - u8 evt_payload_0, - u8 evt_payload_1, - uint8_t evt_payload_2) + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, + uint8_t evt_payload_2) { enum ia_css_err return_err; int error = 0; @@ -428,7 +439,7 @@ enum ia_css_err ia_css_bufq_enqueue_psys_event( } error = ia_css_eventq_send(q, - evt_id, evt_payload_0, evt_payload_1, evt_payload_2); + evt_id, evt_payload_0, evt_payload_1, evt_payload_2); return_err = ia_css_convert_errno(error); IA_CSS_LEAVE_ERR_PRIVATE(return_err); @@ -436,7 +447,7 @@ enum ia_css_err ia_css_bufq_enqueue_psys_event( } enum ia_css_err ia_css_bufq_dequeue_psys_event( - u8 item[BUFQ_EVENT_SIZE]) + u8 item[BUFQ_EVENT_SIZE]) { enum ia_css_err; int error = 0; @@ -459,7 +470,7 @@ enum ia_css_err ia_css_bufq_dequeue_psys_event( } enum ia_css_err ia_css_bufq_dequeue_isys_event( - u8 item[BUFQ_EVENT_SIZE]) + u8 item[BUFQ_EVENT_SIZE]) { #if !defined(HAS_NO_INPUT_SYSTEM) enum ia_css_err; @@ -510,7 +521,7 @@ enum ia_css_err ia_css_bufq_enqueue_isys_event(uint8_t evt_id) } enum ia_css_err ia_css_bufq_enqueue_tag_cmd( - uint32_t item) + uint32_t item) { #if !defined(HAS_NO_INPUT_SYSTEM) enum ia_css_err return_err; @@ -547,7 +558,7 @@ static void bufq_dump_queue_info(const char *prefix, ia_css_queue_t *qhandle) ia_css_queue_get_used_space(qhandle, &used); ia_css_queue_get_free_space(qhandle, &free); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s: used=%u free=%u\n", - prefix, used, free); + prefix, used, free); } void ia_css_bufq_dump_queue_info(void) @@ -559,29 +570,29 @@ void ia_css_bufq_dump_queue_info(void) for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) { for (j = 0; j < SH_CSS_MAX_NUM_QUEUES; j++) { snprintf(prefix, BUFQ_DUMP_FILE_NAME_PREFIX_SIZE, - "host2sp_buffer_queue[%u][%u]", i, j); + "host2sp_buffer_queue[%u][%u]", i, j); bufq_dump_queue_info(prefix, - &css_queues.host2sp_buffer_queue_handles[i][j]); + &css_queues.host2sp_buffer_queue_handles[i][j]); } } for (i = 0; i < SH_CSS_MAX_NUM_QUEUES; i++) { snprintf(prefix, BUFQ_DUMP_FILE_NAME_PREFIX_SIZE, - "sp2host_buffer_queue[%u]", i); + "sp2host_buffer_queue[%u]", i); bufq_dump_queue_info(prefix, - &css_queues.sp2host_buffer_queue_handles[i]); + &css_queues.sp2host_buffer_queue_handles[i]); } bufq_dump_queue_info("host2sp_psys_event", - &css_queues.host2sp_psys_event_queue_handle); + &css_queues.host2sp_psys_event_queue_handle); bufq_dump_queue_info("sp2host_psys_event", - &css_queues.sp2host_psys_event_queue_handle); + &css_queues.sp2host_psys_event_queue_handle); #if !defined(HAS_NO_INPUT_SYSTEM) bufq_dump_queue_info("host2sp_isys_event", - &css_queues.host2sp_isys_event_queue_handle); + &css_queues.host2sp_isys_event_queue_handle); bufq_dump_queue_info("sp2host_isys_event", - &css_queues.sp2host_isys_event_queue_handle); + &css_queues.sp2host_isys_event_queue_handle); bufq_dump_queue_info("host2sp_tag_cmd", - &css_queues.host2sp_tag_cmd_queue_handle); + &css_queues.host2sp_tag_cmd_queue_handle); #endif } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h index a330575bb1522..682ecff5bc52a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h @@ -152,7 +152,7 @@ void ia_css_debug_dump_sp_stack_info(void); * @return None */ void ia_css_debug_set_dtrace_level( - const unsigned int trace_level); + const unsigned int trace_level); /*! @brief Function to get the global dtrace verbosity level. * @return global dtrace verbosity level @@ -203,11 +203,11 @@ void ia_css_debug_dump_sp_sw_debug_info(void); * @return None */ void ia_css_debug_dump_debug_info( - const char *context); + const char *context); #if SP_DEBUG != SP_DEBUG_NONE void ia_css_debug_print_sp_debug_state( - const struct sh_css_sp_debug_state *state); + const struct sh_css_sp_debug_state *state); #endif /*! @brief Dump all related binary info data @@ -215,7 +215,7 @@ void ia_css_debug_print_sp_debug_state( * @return None */ void ia_css_debug_binary_print( - const struct ia_css_binary *bi); + const struct ia_css_binary *bi); void ia_css_debug_sp_dump_mipi_fifo_high_water(void); @@ -286,8 +286,8 @@ void ia_css_debug_dump_isys_state(void); * @return None */ void ia_css_debug_frame_print( - const struct ia_css_frame *frame, - const char *descr); + const struct ia_css_frame *frame, + const char *descr); /*! @brief Function to enable sp sleep mode. * Function that enables sp sleep mode @@ -309,7 +309,8 @@ void ia_css_debug_wake_up_sp(void); * @param[in] enable flag indicating which parameters to dump. * @return None */ -void ia_css_debug_dump_isp_params(struct ia_css_stream *stream, unsigned int enable); +void ia_css_debug_dump_isp_params(struct ia_css_stream *stream, + unsigned int enable); /*! @brief Function to dump some sp performance counters. * Dump sp performance counters, currently input system errors. @@ -334,8 +335,8 @@ void sh_css_dump_sp_raw_copy_linecount(bool reduced); * @return None */ void ia_css_debug_dump_resolution( - const struct ia_css_resolution *res, - const char *label); + const struct ia_css_resolution *res, + const char *label); /*! @brief Dump the frame info to the trace output * Dumps the frame info to the trace output. @@ -344,8 +345,8 @@ void ia_css_debug_dump_resolution( * @return None */ void ia_css_debug_dump_frame_info( - const struct ia_css_frame_info *info, - const char *label); + const struct ia_css_frame_info *info, + const char *label); /*! @brief Dump the capture config info to the trace output * Dumps the capture config info to the trace output. @@ -353,7 +354,7 @@ void ia_css_debug_dump_frame_info( * @return None */ void ia_css_debug_dump_capture_config( - const struct ia_css_capture_config *config); + const struct ia_css_capture_config *config); /*! @brief Dump the pipe extra config info to the trace output * Dumps the pipe extra config info to the trace output. @@ -361,7 +362,7 @@ void ia_css_debug_dump_capture_config( * @return None */ void ia_css_debug_dump_pipe_extra_config( - const struct ia_css_pipe_extra_config *extra_config); + const struct ia_css_pipe_extra_config *extra_config); /*! @brief Dump the pipe config info to the trace output * Dumps the pipe config info to the trace output. @@ -369,7 +370,7 @@ void ia_css_debug_dump_pipe_extra_config( * @return None */ void ia_css_debug_dump_pipe_config( - const struct ia_css_pipe_config *config); + const struct ia_css_pipe_config *config); /*! @brief Dump the stream config source info to the trace output * Dumps the stream config source info to the trace output. @@ -377,7 +378,7 @@ void ia_css_debug_dump_pipe_config( * @return None */ void ia_css_debug_dump_stream_config_source( - const struct ia_css_stream_config *config); + const struct ia_css_stream_config *config); /*! @brief Dump the mipi buffer config info to the trace output * Dumps the mipi buffer config info to the trace output. @@ -385,7 +386,7 @@ void ia_css_debug_dump_stream_config_source( * @return None */ void ia_css_debug_dump_mipi_buffer_config( - const struct ia_css_mipi_buffer_config *config); + const struct ia_css_mipi_buffer_config *config); /*! @brief Dump the metadata config info to the trace output * Dumps the metadata config info to the trace output. @@ -393,7 +394,7 @@ void ia_css_debug_dump_mipi_buffer_config( * @return None */ void ia_css_debug_dump_metadata_config( - const struct ia_css_metadata_config *config); + const struct ia_css_metadata_config *config); /*! @brief Dump the stream config info to the trace output * Dumps the stream config info to the trace output. @@ -402,8 +403,8 @@ void ia_css_debug_dump_metadata_config( * @return None */ void ia_css_debug_dump_stream_config( - const struct ia_css_stream_config *config, - int num_pipes); + const struct ia_css_stream_config *config, + int num_pipes); /*! @brief Dump the state of the SP tagger * Dumps the internal state of the SP tagger @@ -440,9 +441,9 @@ bool ia_css_debug_mode_init(void); * - false, otherwise. */ bool ia_css_debug_mode_disable_dma_channel( - int dma_ID, - int channel_id, - int request_type); + int dma_ID, + int channel_id, + int request_type); /** * @brief Enable the DMA channel. * @@ -458,9 +459,9 @@ bool ia_css_debug_mode_disable_dma_channel( * - false, otherwise. */ bool ia_css_debug_mode_enable_dma_channel( - int dma_ID, - int channel_id, - int request_type); + int dma_ID, + int channel_id, + int request_type); /** * @brief Dump tracer data. @@ -493,7 +494,7 @@ void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps); * @return None */ void ia_css_debug_dump_hang_status( - struct ia_css_pipe *pipe); + struct ia_css_pipe *pipe); /*! @brief External command handler * External command handler diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h index fcb923d9c4c6c..3443807cb7c93 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h @@ -59,8 +59,8 @@ void ia_css_debug_pipe_graph_dump_epilogue(void); * @return None */ void ia_css_debug_pipe_graph_dump_stage( - struct ia_css_pipeline_stage *stage, - enum ia_css_pipe_id id); + struct ia_css_pipeline_stage *stage, + enum ia_css_pipe_id id); /** * @brief Internal debug support for constructing a pipe graph. @@ -69,7 +69,7 @@ void ia_css_debug_pipe_graph_dump_stage( * @return None */ void ia_css_debug_pipe_graph_dump_sp_raw_copy( - struct ia_css_frame *out_frame); + struct ia_css_frame *out_frame); /** * @brief Internal debug support for constructing a pipe graph. @@ -78,6 +78,6 @@ void ia_css_debug_pipe_graph_dump_sp_raw_copy( * @return None */ void ia_css_debug_pipe_graph_dump_stream_config( - const struct ia_css_stream_config *stream_config); + const struct ia_css_stream_config *stream_config); #endif /* _IA_CSS_DEBUG_PIPE_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c index 05969686b8c24..88d43ce3f9703 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c @@ -141,7 +141,7 @@ static struct pipe_graph_class { enum atomisp_input_format stream_format; } pg_inst = {true, 0, 0, 0, 0, N_ATOMISP_INPUT_FORMAT}; -static const char * const queue_id_to_str[] = { +static const char *const queue_id_to_str[] = { /* [SH_CSS_QUEUE_A_ID] =*/ "queue_A", /* [SH_CSS_QUEUE_B_ID] =*/ "queue_B", /* [SH_CSS_QUEUE_C_ID] =*/ "queue_C", @@ -152,7 +152,7 @@ static const char * const queue_id_to_str[] = { /* [SH_CSS_QUEUE_H_ID] =*/ "queue_H" }; -static const char * const pipe_id_to_str[] = { +static const char *const pipe_id_to_str[] = { /* [IA_CSS_PIPE_ID_PREVIEW] =*/ "preview", /* [IA_CSS_PIPE_ID_COPY] =*/ "copy", /* [IA_CSS_PIPE_ID_VIDEO] =*/ "video", @@ -174,9 +174,9 @@ void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...) } static void debug_dump_long_array_formatted( - const sp_ID_t sp_id, - hrt_address stack_sp_addr, - unsigned int stack_size) + const sp_ID_t sp_id, + hrt_address stack_sp_addr, + unsigned int stack_size) { unsigned int i; u32 val; @@ -198,7 +198,7 @@ static void debug_dump_long_array_formatted( } static void debug_dump_sp_stack_info( - const sp_ID_t sp_id) + const sp_ID_t sp_id) { const struct ia_css_fw_info *fw; unsigned int HIVE_ADDR_sp_threads_stack; @@ -211,33 +211,33 @@ static void debug_dump_sp_stack_info( ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "sp_id(%u) stack info\n", sp_id); ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "from objects stack_addr_offset:0x%x stack_size_offset:0x%x\n", - fw->info.sp.threads_stack, - fw->info.sp.threads_stack_size); + "from objects stack_addr_offset:0x%x stack_size_offset:0x%x\n", + fw->info.sp.threads_stack, + fw->info.sp.threads_stack_size); HIVE_ADDR_sp_threads_stack = fw->info.sp.threads_stack; HIVE_ADDR_sp_threads_stack_size = fw->info.sp.threads_stack_size; if (fw->info.sp.threads_stack == 0 || - fw->info.sp.threads_stack_size == 0) + fw->info.sp.threads_stack_size == 0) return; (void)HIVE_ADDR_sp_threads_stack; (void)HIVE_ADDR_sp_threads_stack_size; sp_dmem_load(sp_id, - (unsigned int)sp_address_of(sp_threads_stack), - &stack_sp_addr, sizeof(stack_sp_addr)); + (unsigned int)sp_address_of(sp_threads_stack), + &stack_sp_addr, sizeof(stack_sp_addr)); sp_dmem_load(sp_id, - (unsigned int)sp_address_of(sp_threads_stack_size), - &stack_sizes, sizeof(stack_sizes)); + (unsigned int)sp_address_of(sp_threads_stack_size), + &stack_sizes, sizeof(stack_sizes)); for (i = 0 ; i < MAX_THREAD_NUM; i++) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "thread: %u stack_addr: 0x%08x stack_size: %u\n", - i, stack_sp_addr[i], stack_sizes[i]); + "thread: %u stack_addr: 0x%08x stack_size: %u\n", + i, stack_sp_addr[i], stack_sizes[i]); debug_dump_long_array_formatted(sp_id, (hrt_address)stack_sp_addr[i], - stack_sizes[i]); + stack_sizes[i]); } } @@ -257,7 +257,8 @@ unsigned int ia_css_debug_get_dtrace_level(void) return ia_css_debug_trace_level; } -static const char *debug_stream_format2str(const enum atomisp_input_format stream_format) +static const char *debug_stream_format2str(const enum atomisp_input_format + stream_format) { switch (stream_format) { case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: @@ -345,7 +346,8 @@ static const char *debug_stream_format2str(const enum atomisp_input_format strea } }; -static const char *debug_frame_format2str(const enum ia_css_frame_format frame_format) +static const char *debug_frame_format2str(const enum ia_css_frame_format + frame_format) { switch (frame_format) { case IA_CSS_FRAME_FORMAT_NV11: @@ -559,7 +561,7 @@ void ia_css_debug_dump_sp_state(void) } static void debug_print_fifo_channel_state(const fifo_channel_state_t *state, - const char *descr) + const char *descr) { assert(state); assert(descr); @@ -680,11 +682,11 @@ static void debug_print_if_state(input_formatter_state_t *state, const char *id) "Hsync", st_hsync_active_low); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Allow FIFO overflow", st_allow_fifo_overflow); -/* Flag that tells whether the IF gives backpressure on frames */ -/* - * FYI, this is only on the frame request (indicate), when the IF has - * synch'd on a frame it will always give back pressure - */ + /* Flag that tells whether the IF gives backpressure on frames */ + /* + * FYI, this is only on the frame request (indicate), when the IF has + * synch'd on a frame it will always give back pressure + */ ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "Block when no request", st_block_fifo_when_no_req); @@ -692,65 +694,65 @@ static void debug_print_if_state(input_formatter_state_t *state, const char *id) ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "IF_BLOCKED_FIFO_NO_REQ_ADDRESS", input_formatter_reg_load(INPUT_FORMATTER0_ID, - HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS) - ); + HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS) + ); ia_css_debug_dtrace(2, "\t%-32s:\n", "InputSwitch State"); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg0", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg0)); + _REG_GP_IFMT_input_switch_lut_reg0)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg1", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg1)); + _REG_GP_IFMT_input_switch_lut_reg1)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg2", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg2)); + _REG_GP_IFMT_input_switch_lut_reg2)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg3", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg3)); + _REG_GP_IFMT_input_switch_lut_reg3)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg4", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg4)); + _REG_GP_IFMT_input_switch_lut_reg4)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg5", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg5)); + _REG_GP_IFMT_input_switch_lut_reg5)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg6", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg6)); + _REG_GP_IFMT_input_switch_lut_reg6)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_lut_reg7", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_lut_reg7)); + _REG_GP_IFMT_input_switch_lut_reg7)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_input_switch_fsync_lut", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_input_switch_fsync_lut)); + _REG_GP_IFMT_input_switch_fsync_lut)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_srst", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_srst)); + _REG_GP_IFMT_srst)); ia_css_debug_dtrace(2, "\t\t%-32s: %d\n", "_REG_GP_IFMT_slv_reg_srst", gp_device_reg_load(GP_DEVICE0_ID, - _REG_GP_IFMT_slv_reg_srst)); + _REG_GP_IFMT_slv_reg_srst)); #endif ia_css_debug_dtrace(2, "\tFSM Status:\n"); @@ -1002,7 +1004,7 @@ void ia_css_debug_dump_dma_state(void) break; default: snprintf(last_cmd_str, 64, - "unknown [Channel: %d]", ch_id); + "unknown [Channel: %d]", ch_id); break; } ia_css_debug_dtrace(2, "\t%-32s: (0x%X : %s)\n", @@ -1304,12 +1306,12 @@ void ia_css_debug_binary_print(const struct ia_css_binary *bi) for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { if (bi->out_frame_info[i].res.width != 0) { ia_css_debug_dtrace(2, - "out%d: %dx%d, format = %d, padded width = %d\n", - i, - bi->out_frame_info[i].res.width, - bi->out_frame_info[i].res.height, - bi->out_frame_info[i].format, - bi->out_frame_info[i].padded_width); + "out%d: %dx%d, format = %d, padded width = %d\n", + i, + bi->out_frame_info[i].res.width, + bi->out_frame_info[i].res.height, + bi->out_frame_info[i].format, + bi->out_frame_info[i].padded_width); } } ia_css_debug_dtrace(2, @@ -1617,13 +1619,13 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state #elif SP_DEBUG == SP_DEBUG_TRACE -/* - * This is just an example how TRACE_FILE_ID (see ia_css_debug.sp.h) will - * me mapped on the file name string. - * - * Adjust this to your trace case! - */ - static char const * const id2filename[8] = { + /* + * This is just an example how TRACE_FILE_ID (see ia_css_debug.sp.h) will + * me mapped on the file name string. + * + * Adjust this to your trace case! + */ + static char const *const id2filename[8] = { "param_buffer.sp.c | tagger.sp.c | pipe_data.sp.c", "isp_init.sp.c", "sp_raw_copy.hive.c", @@ -1680,9 +1682,9 @@ void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state for (n = host_index_last[t]; n < sp_index_last; n++) { int i = n % SH_CSS_SP_DBG_TRACE_DEPTH; int l = state->trace[t][i].location & - ((1 << SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS) - 1); + ((1 << SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS) - 1); int fid = state->trace[t][i].location >> - SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS; + SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS; int ts = state->trace[t][i].time_stamp; if (ts) { @@ -1988,7 +1990,7 @@ static void debug_print_isys_capture_unit_state(capture_unit_state_t *state) } static void debug_print_isys_acquisition_unit_state( - acquisition_unit_state_t *state) + acquisition_unit_state_t *state) { assert(state); @@ -2315,8 +2317,8 @@ findf_dmem_params(struct ia_css_stream *stream, short idx) short *offsets = (short *)&binary->info->mem_offsets.offsets.param->dmem; short dmem_offset = offsets[idx]; const struct ia_css_host_data *isp_data = - ia_css_isp_param_get_mem_init(&binary->mem_params, - IA_CSS_PARAM_CLASS_PARAM, IA_CSS_ISP_DMEM0); + ia_css_isp_param_get_mem_init(&binary->mem_params, + IA_CSS_PARAM_CLASS_PARAM, IA_CSS_ISP_DMEM0); if (dmem_offset < 0) continue; return &isp_data->address[dmem_offset]; @@ -2376,8 +2378,10 @@ void ia_css_debug_dump_isp_params(struct ia_css_stream *stream, if ((enable & IA_CSS_DEBUG_DUMP_CSC) || (enable & IA_CSS_DEBUG_DUMP_ALL)) { ia_css_csc_dump(FIND_DMEM_PARAMS(stream, csc), IA_CSS_DEBUG_VERBOSE); - ia_css_yuv2rgb_dump(FIND_DMEM_PARAMS_TYPE(stream, yuv2rgb, csc), IA_CSS_DEBUG_VERBOSE); - ia_css_rgb2yuv_dump(FIND_DMEM_PARAMS_TYPE(stream, rgb2yuv, csc), IA_CSS_DEBUG_VERBOSE); + ia_css_yuv2rgb_dump(FIND_DMEM_PARAMS_TYPE(stream, yuv2rgb, csc), + IA_CSS_DEBUG_VERBOSE); + ia_css_rgb2yuv_dump(FIND_DMEM_PARAMS_TYPE(stream, rgb2yuv, csc), + IA_CSS_DEBUG_VERBOSE); } if ((enable & IA_CSS_DEBUG_DUMP_GC) || (enable & IA_CSS_DEBUG_DUMP_ALL)) { @@ -2407,12 +2411,12 @@ void sh_css_dump_sp_raw_copy_linecount(bool reduced) fw = &sh_css_sp_fw; HIVE_ADDR_raw_copy_line_count = - fw->info.sp.raw_copy_line_count; + fw->info.sp.raw_copy_line_count; (void)HIVE_ADDR_raw_copy_line_count; sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(raw_copy_line_count), + (unsigned int)sp_address_of(raw_copy_line_count), &raw_copy_line_count, sizeof(raw_copy_line_count)); @@ -2422,8 +2426,8 @@ void sh_css_dump_sp_raw_copy_linecount(bool reduced) /* do the handling */ if (prev_raw_copy_line_count != raw_copy_line_count) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "sh_css_dump_sp_raw_copy_linecount() line_count=%d\n", - raw_copy_line_count); + "sh_css_dump_sp_raw_copy_linecount() line_count=%d\n", + raw_copy_line_count); prev_raw_copy_line_count = raw_copy_line_count; } } @@ -2465,12 +2469,14 @@ void ia_css_debug_dump_perf_counters(void) const struct ia_css_fw_info *fw; int i; unsigned int HIVE_ADDR_ia_css_isys_sp_error_cnt; - s32 ia_css_sp_input_system_error_cnt[N_MIPI_PORT_ID + 1]; /* 3 Capture Units and 1 Acquire Unit. */ + s32 ia_css_sp_input_system_error_cnt[N_MIPI_PORT_ID + + 1]; /* 3 Capture Units and 1 Acquire Unit. */ ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "Input System Error Counters:\n"); fw = &sh_css_sp_fw; - HIVE_ADDR_ia_css_isys_sp_error_cnt = fw->info.sp.perf_counter_input_system_error; + HIVE_ADDR_ia_css_isys_sp_error_cnt = + fw->info.sp.perf_counter_input_system_error; (void)HIVE_ADDR_ia_css_isys_sp_error_cnt; @@ -2481,7 +2487,7 @@ void ia_css_debug_dump_perf_counters(void) for (i = 0; i < N_MIPI_PORT_ID + 1; i++) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "\tport[%d] = %d\n", - i, ia_css_sp_input_system_error_cnt[i]); + i, ia_css_sp_input_system_error_cnt[i]); } #endif } @@ -2593,18 +2599,18 @@ void sh_css_dump_thread_wait_info(void) fw = &sh_css_sp_fw; HIVE_ADDR_sp_thread_wait = - fw->info.sp.debug_wait; + fw->info.sp.debug_wait; (void)HIVE_ADDR_sp_thread_wait; sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(sp_thread_wait), + (unsigned int)sp_address_of(sp_thread_wait), &sp_thread_wait, sizeof(sp_thread_wait)); for (i = 0; i < MAX_THREAD_NUM; i++) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "\twait[%d] = 0x%X\n", - i, sp_thread_wait[i]); + "\twait[%d] = 0x%X\n", + i, sp_thread_wait[i]); } } @@ -2619,18 +2625,18 @@ void sh_css_dump_pipe_stage_info(void) fw = &sh_css_sp_fw; HIVE_ADDR_sp_pipe_stage = - fw->info.sp.debug_stage; + fw->info.sp.debug_stage; (void)HIVE_ADDR_sp_pipe_stage; sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(sp_pipe_stage), + (unsigned int)sp_address_of(sp_pipe_stage), &sp_pipe_stage, sizeof(sp_pipe_stage)); for (i = 0; i < MAX_THREAD_NUM; i++) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "\tstage[%d] = %d\n", - i, sp_pipe_stage[i]); + "\tstage[%d] = %d\n", + i, sp_pipe_stage[i]); } } @@ -2645,29 +2651,29 @@ void sh_css_dump_pipe_stripe_info(void) fw = &sh_css_sp_fw; HIVE_ADDR_sp_pipe_stripe = - fw->info.sp.debug_stripe; + fw->info.sp.debug_stripe; (void)HIVE_ADDR_sp_pipe_stripe; sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(sp_pipe_stripe), + (unsigned int)sp_address_of(sp_pipe_stripe), &sp_pipe_stripe, sizeof(sp_pipe_stripe)); for (i = 0; i < MAX_THREAD_NUM; i++) { ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, - "\tstripe[%d] = %d\n", - i, sp_pipe_stripe[i]); + "\tstripe[%d] = %d\n", + i, sp_pipe_stripe[i]); } } #endif static void ia_css_debug_pipe_graph_dump_frame( - struct ia_css_frame *frame, - enum ia_css_pipe_id id, - char const *blob_name, - char const *frame_name, - bool in_frame) + struct ia_css_frame *frame, + enum ia_css_pipe_id id, + char const *blob_name, + char const *frame_name, + bool in_frame) { char bufinfo[100]; @@ -2675,30 +2681,30 @@ ia_css_debug_pipe_graph_dump_frame( snprintf(bufinfo, sizeof(bufinfo), "Internal"); } else { snprintf(bufinfo, sizeof(bufinfo), "Queue: %s %s", - pipe_id_to_str[id], - queue_id_to_str[frame->dynamic_queue_id]); + pipe_id_to_str[id], + queue_id_to_str[frame->dynamic_queue_id]); } dtrace_dot( - "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d, %dbpp\\n%s\"];", - frame, - debug_frame_format2str(frame->info.format), - frame->info.res.width, - frame->info.padded_width, - frame->info.res.height, - frame->info.raw_bit_depth, - bufinfo); + "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d, %dbpp\\n%s\"];", + frame, + debug_frame_format2str(frame->info.format), + frame->info.res.width, + frame->info.padded_width, + frame->info.res.height, + frame->info.raw_bit_depth, + bufinfo); if (in_frame) { dtrace_dot( - "\"%p\"->\"%s(pipe%d)\" [label = %s_frame];", - frame, - blob_name, id, frame_name); + "\"%p\"->\"%s(pipe%d)\" [label = %s_frame];", + frame, + blob_name, id, frame_name); } else { dtrace_dot( - "\"%s(pipe%d)\"->\"%p\" [label = %s_frame];", - blob_name, id, - frame, - frame_name); + "\"%s(pipe%d)\"->\"%p\" [label = %s_frame];", + blob_name, id, + frame, + frame_name); } } @@ -2710,7 +2716,7 @@ ia_css_debug_pipe_graph_dump_prologue(void) dtrace_dot("fontsize=9;"); dtrace_dot("label = \"\\nEnable options: rp=reduced pipe, vfve=vf_veceven, dvse=dvs_envelope, dvs6=dvs_6axis, bo=block_out, fbds=fixed_bayer_ds, bf6=bayer_fir_6db, rawb=raw_binning, cont=continuous, disc=dis_crop\\n" - "dp2a=dp_2adjacent, outp=output, outt=out_table, reff=ref_frame, par=params, gam=gamma, cagdc=ca_gdc, ispa=isp_addresses, inf=in_frame, outf=out_frame, hs=high_speed, inpc=input_chunking\""); + "dp2a=dp_2adjacent, outp=output, outt=out_table, reff=ref_frame, par=params, gam=gamma, cagdc=ca_gdc, ispa=isp_addresses, inf=in_frame, outf=out_frame, hs=high_speed, inpc=input_chunking\""); } void ia_css_debug_pipe_graph_dump_epilogue(void) @@ -2725,20 +2731,20 @@ void ia_css_debug_pipe_graph_dump_epilogue(void) */ dtrace_dot( - "node [shape = doublecircle, fixedsize=true, width=2.5]; \"input_system\" [label = \"Input system\"];"); + "node [shape = doublecircle, fixedsize=true, width=2.5]; \"input_system\" [label = \"Input system\"];"); dtrace_dot( - "\"input_system\"->\"%s\" [label = \"%s\"];", - dot_id_input_bin, debug_stream_format2str(pg_inst.stream_format)); + "\"input_system\"->\"%s\" [label = \"%s\"];", + dot_id_input_bin, debug_stream_format2str(pg_inst.stream_format)); dtrace_dot( - "node [shape = doublecircle, fixedsize=true, width=2.5]; \"sensor\" [label = \"Sensor\"];"); + "node [shape = doublecircle, fixedsize=true, width=2.5]; \"sensor\" [label = \"Sensor\"];"); dtrace_dot( - "\"sensor\"->\"input_system\" [label = \"%s\\n%d x %d\\n(%d x %d)\"];", - debug_stream_format2str(pg_inst.stream_format), - pg_inst.width, pg_inst.height, - pg_inst.eff_width, pg_inst.eff_height); + "\"sensor\"->\"input_system\" [label = \"%s\\n%d x %d\\n(%d x %d)\"];", + debug_stream_format2str(pg_inst.stream_format), + pg_inst.width, pg_inst.height, + pg_inst.eff_width, pg_inst.eff_height); } dtrace_dot("}"); @@ -2757,8 +2763,8 @@ void ia_css_debug_pipe_graph_dump_epilogue(void) void ia_css_debug_pipe_graph_dump_stage( - struct ia_css_pipeline_stage *stage, - enum ia_css_pipe_id id) + struct ia_css_pipeline_stage *stage, + enum ia_css_pipe_id id) { char blob_name[SH_CSS_MAX_BINARY_NAME + 10] = ""; char const *bin_type = ""; @@ -2777,10 +2783,11 @@ ia_css_debug_pipe_graph_dump_stage( bin_type = "binary"; if (stage->binary->info->blob) snprintf(blob_name, sizeof(blob_name), "%s_stage%d", - stage->binary->info->blob->name, stage->stage_num); + stage->binary->info->blob->name, stage->stage_num); } else if (stage->firmware) { bin_type = "firmware"; - strncpy_s(blob_name, sizeof(blob_name), IA_CSS_EXT_ISP_PROG_NAME(stage->firmware), sizeof(blob_name)); + strncpy_s(blob_name, sizeof(blob_name), + IA_CSS_EXT_ISP_PROG_NAME(stage->firmware), sizeof(blob_name)); } /* Guard in case of binaries that don't have any binary_info */ @@ -2795,41 +2802,41 @@ ia_css_debug_pipe_graph_dump_stage( * parameters per call "reasonable" */ snprintf(enable_info1, sizeof(enable_info1), - "%s%s%s%s%s%s%s%s%s%s%s%s%s%s", - bi->enable.reduced_pipe ? "rp," : "", - bi->enable.vf_veceven ? "vfve," : "", - bi->enable.dis ? "dis," : "", - bi->enable.dvs_envelope ? "dvse," : "", - bi->enable.uds ? "uds," : "", - bi->enable.dvs_6axis ? "dvs6," : "", - bi->enable.block_output ? "bo," : "", - bi->enable.ds ? "ds," : "", - bi->enable.bayer_fir_6db ? "bf6," : "", - bi->enable.raw_binning ? "rawb," : "", - bi->enable.continuous ? "cont," : "", - bi->enable.s3a ? "s3a," : "", - bi->enable.fpnr ? "fpnr," : "", - bi->enable.sc ? "sc," : "" + "%s%s%s%s%s%s%s%s%s%s%s%s%s%s", + bi->enable.reduced_pipe ? "rp," : "", + bi->enable.vf_veceven ? "vfve," : "", + bi->enable.dis ? "dis," : "", + bi->enable.dvs_envelope ? "dvse," : "", + bi->enable.uds ? "uds," : "", + bi->enable.dvs_6axis ? "dvs6," : "", + bi->enable.block_output ? "bo," : "", + bi->enable.ds ? "ds," : "", + bi->enable.bayer_fir_6db ? "bf6," : "", + bi->enable.raw_binning ? "rawb," : "", + bi->enable.continuous ? "cont," : "", + bi->enable.s3a ? "s3a," : "", + bi->enable.fpnr ? "fpnr," : "", + bi->enable.sc ? "sc," : "" ); snprintf(enable_info2, sizeof(enable_info2), - "%s%s%s%s%s%s%s%s%s%s%s", - bi->enable.macc ? "macc," : "", - bi->enable.output ? "outp," : "", - bi->enable.ref_frame ? "reff," : "", - bi->enable.tnr ? "tnr," : "", - bi->enable.xnr ? "xnr," : "", - bi->enable.params ? "par," : "", - bi->enable.ca_gdc ? "cagdc," : "", - bi->enable.isp_addresses ? "ispa," : "", - bi->enable.in_frame ? "inf," : "", - bi->enable.out_frame ? "outf," : "", - bi->enable.high_speed ? "hs," : "" + "%s%s%s%s%s%s%s%s%s%s%s", + bi->enable.macc ? "macc," : "", + bi->enable.output ? "outp," : "", + bi->enable.ref_frame ? "reff," : "", + bi->enable.tnr ? "tnr," : "", + bi->enable.xnr ? "xnr," : "", + bi->enable.params ? "par," : "", + bi->enable.ca_gdc ? "cagdc," : "", + bi->enable.isp_addresses ? "ispa," : "", + bi->enable.in_frame ? "inf," : "", + bi->enable.out_frame ? "outf," : "", + bi->enable.high_speed ? "hs," : "" ); /* And merge them into one string */ snprintf(enable_info, sizeof(enable_info), "%s%s", - enable_info1, enable_info2); + enable_info1, enable_info2); { int l, p; char *ei = enable_info; @@ -2847,8 +2854,8 @@ ia_css_debug_pipe_graph_dump_stage( p--; /* Last comma found, copy till that comma */ strncpy_s(enable_info1, - sizeof(enable_info1), - ei, p); + sizeof(enable_info1), + ei, p); enable_info1[p] = '\0'; ei += p + 1; @@ -2860,11 +2867,11 @@ ia_css_debug_pipe_graph_dump_stage( * it is not guaranteed dword aligned */ strncpy_s(enable_info2, - sizeof(enable_info2), - ei, l); + sizeof(enable_info2), + ei, l); enable_info2[l] = '\0'; snprintf(enable_info, sizeof(enable_info), "%s\\n%s", - enable_info1, enable_info2); + enable_info1, enable_info2); } else { /* 2nd line is still too long */ @@ -2872,8 +2879,8 @@ ia_css_debug_pipe_graph_dump_stage( while (ei[p] != ',') p--; strncpy_s(enable_info2, - sizeof(enable_info2), - ei, p); + sizeof(enable_info2), + ei, p); enable_info2[p] = '\0'; ei += p + 1; l = strlen(ei); @@ -2884,38 +2891,38 @@ ia_css_debug_pipe_graph_dump_stage( * it is not guaranteed dword aligned */ strcpy_s(enable_info3, - sizeof(enable_info3), ei); + sizeof(enable_info3), ei); enable_info3[l] = '\0'; snprintf(enable_info, sizeof(enable_info), - "%s\\n%s\\n%s", - enable_info1, enable_info2, - enable_info3); + "%s\\n%s\\n%s", + enable_info1, enable_info2, + enable_info3); } else { /* 3rd line is still too long */ p = ENABLE_LINE_MAX_LENGTH; while (ei[p] != ',') p--; strncpy_s(enable_info3, - sizeof(enable_info3), - ei, p); + sizeof(enable_info3), + ei, p); enable_info3[p] = '\0'; ei += p + 1; strcpy_s(enable_info3, - sizeof(enable_info3), ei); + sizeof(enable_info3), ei); snprintf(enable_info, sizeof(enable_info), - "%s\\n%s\\n%s", - enable_info1, enable_info2, - enable_info3); + "%s\\n%s\\n%s", + enable_info1, enable_info2, + enable_info3); } } } } dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\\n\\n%s\"]; \"%s(pipe%d)\"", - bin_type, blob_name, enable_info, blob_name, id); + bin_type, blob_name, enable_info, blob_name, id); } else { dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\\n\"]; \"%s(pipe%d)\"", - bin_type, blob_name, blob_name, id); + bin_type, blob_name, blob_name, id); } if (stage->stage_num == 0) { @@ -2928,14 +2935,14 @@ ia_css_debug_pipe_graph_dump_stage( */ if (strlen(dot_id_input_bin) == 0) { snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), - "%s(pipe%d)", blob_name, id); + "%s(pipe%d)", blob_name, id); } } if (stage->args.in_frame) { ia_css_debug_pipe_graph_dump_frame( - stage->args.in_frame, id, blob_name, - "in", true); + stage->args.in_frame, id, blob_name, + "in", true); } #ifndef ISP2401 @@ -2945,37 +2952,37 @@ ia_css_debug_pipe_graph_dump_stage( #endif if (stage->args.tnr_frames[i]) { ia_css_debug_pipe_graph_dump_frame( - stage->args.tnr_frames[i], id, - blob_name, "tnr_frame", true); + stage->args.tnr_frames[i], id, + blob_name, "tnr_frame", true); } } for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) { if (stage->args.delay_frames[i]) { ia_css_debug_pipe_graph_dump_frame( - stage->args.delay_frames[i], id, - blob_name, "delay_frame", true); + stage->args.delay_frames[i], id, + blob_name, "delay_frame", true); } } for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { if (stage->args.out_frame[i]) { ia_css_debug_pipe_graph_dump_frame( - stage->args.out_frame[i], id, blob_name, - "out", false); + stage->args.out_frame[i], id, blob_name, + "out", false); } } if (stage->args.out_vf_frame) { ia_css_debug_pipe_graph_dump_frame( - stage->args.out_vf_frame, id, blob_name, - "out_vf", false); + stage->args.out_vf_frame, id, blob_name, + "out_vf", false); } } void ia_css_debug_pipe_graph_dump_sp_raw_copy( - struct ia_css_frame *out_frame) + struct ia_css_frame *out_frame) { assert(out_frame); if (pg_inst.do_init) { @@ -2984,28 +2991,29 @@ ia_css_debug_pipe_graph_dump_sp_raw_copy( } dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\"]; \"%s(pipe%d)\"", - "sp-binary", "sp_raw_copy", "sp_raw_copy", 1); + "sp-binary", "sp_raw_copy", "sp_raw_copy", 1); snprintf(ring_buffer, sizeof(ring_buffer), - "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d\\nRingbuffer\"];", - out_frame, - debug_frame_format2str(out_frame->info.format), - out_frame->info.res.width, - out_frame->info.padded_width, - out_frame->info.res.height); + "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d\\nRingbuffer\"];", + out_frame, + debug_frame_format2str(out_frame->info.format), + out_frame->info.res.width, + out_frame->info.padded_width, + out_frame->info.res.height); dtrace_dot(ring_buffer); dtrace_dot( - "\"%s(pipe%d)\"->\"%p\" [label = out_frame];", - "sp_raw_copy", 1, out_frame); + "\"%s(pipe%d)\"->\"%p\" [label = out_frame];", + "sp_raw_copy", 1, out_frame); - snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), "%s(pipe%d)", "sp_raw_copy", 1); + snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), "%s(pipe%d)", + "sp_raw_copy", 1); } void ia_css_debug_pipe_graph_dump_stream_config( - const struct ia_css_stream_config *stream_config) + const struct ia_css_stream_config *stream_config) { pg_inst.width = stream_config->input_config.input_res.width; pg_inst.height = stream_config->input_config.input_res.height; @@ -3016,72 +3024,72 @@ ia_css_debug_pipe_graph_dump_stream_config( void ia_css_debug_dump_resolution( - const struct ia_css_resolution *res, - const char *label) + const struct ia_css_resolution *res, + const char *label) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s: =%d x =%d\n", - label, res->width, res->height); + label, res->width, res->height); } void ia_css_debug_dump_frame_info( - const struct ia_css_frame_info *info, - const char *label) + const struct ia_css_frame_info *info, + const char *label) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", label); ia_css_debug_dump_resolution(&info->res, "res"); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "padded_width: %d\n", - info->padded_width); + info->padded_width); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "format: %d\n", info->format); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "raw_bit_depth: %d\n", - info->raw_bit_depth); + info->raw_bit_depth); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "raw_bayer_order: %d\n", - info->raw_bayer_order); + info->raw_bayer_order); } void ia_css_debug_dump_capture_config( - const struct ia_css_capture_config *config) + const struct ia_css_capture_config *config) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", __func__); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_xnr: %d\n", - config->enable_xnr); + config->enable_xnr); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_raw_output: %d\n", - config->enable_raw_output); + config->enable_raw_output); } void ia_css_debug_dump_pipe_extra_config( - const struct ia_css_pipe_extra_config *extra_config) + const struct ia_css_pipe_extra_config *extra_config) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", __func__); if (extra_config) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "enable_raw_binning: %d\n", - extra_config->enable_raw_binning); + "enable_raw_binning: %d\n", + extra_config->enable_raw_binning); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_yuv_ds: %d\n", - extra_config->enable_yuv_ds); + extra_config->enable_yuv_ds); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "enable_high_speed: %d\n", - extra_config->enable_high_speed); + "enable_high_speed: %d\n", + extra_config->enable_high_speed); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "enable_dvs_6axis: %d\n", - extra_config->enable_dvs_6axis); + "enable_dvs_6axis: %d\n", + extra_config->enable_dvs_6axis); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "enable_reduced_pipe: %d\n", - extra_config->enable_reduced_pipe); + "enable_reduced_pipe: %d\n", + extra_config->enable_reduced_pipe); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "enable_fractional_ds: %d\n", - extra_config->enable_fractional_ds); + "enable_fractional_ds: %d\n", + extra_config->enable_fractional_ds); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "disable_vf_pp: %d\n", - extra_config->disable_vf_pp); + extra_config->disable_vf_pp); } } void ia_css_debug_dump_pipe_config( - const struct ia_css_pipe_config *config) + const struct ia_css_pipe_config *config) { unsigned int i; @@ -3093,41 +3101,41 @@ ia_css_debug_dump_pipe_config( } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "isp_pipe_version: %d\n", - config->isp_pipe_version); + config->isp_pipe_version); ia_css_debug_dump_resolution(&config->bayer_ds_out_res, - "bayer_ds_out_res"); + "bayer_ds_out_res"); ia_css_debug_dump_resolution(&config->capt_pp_in_res, - "capt_pp_in_res"); + "capt_pp_in_res"); ia_css_debug_dump_resolution(&config->vf_pp_in_res, "vf_pp_in_res"); #ifdef ISP2401 ia_css_debug_dump_resolution(&config->output_system_in_res, "output_system_in_res"); #endif ia_css_debug_dump_resolution(&config->dvs_crop_out_res, - "dvs_crop_out_res"); + "dvs_crop_out_res"); for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { ia_css_debug_dump_frame_info(&config->output_info[i], "output_info"); ia_css_debug_dump_frame_info(&config->vf_output_info[i], - "vf_output_info"); + "vf_output_info"); } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "acc_extension: %p\n", config->acc_extension); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_acc_stages: %d\n", - config->num_acc_stages); + config->num_acc_stages); ia_css_debug_dump_capture_config(&config->default_capture_config); ia_css_debug_dump_resolution(&config->dvs_envelope, "dvs_envelope"); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "dvs_frame_delay: %d\n", - config->dvs_frame_delay); + config->dvs_frame_delay); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "acc_num_execs: %d\n", - config->acc_num_execs); + config->acc_num_execs); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_dz: %d\n", - config->enable_dz); + config->enable_dz); IA_CSS_LEAVE_PRIVATE(""); } void ia_css_debug_dump_stream_config_source( - const struct ia_css_stream_config *config) + const struct ia_css_stream_config *config) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); switch (config->mode) { @@ -3135,43 +3143,43 @@ ia_css_debug_dump_stream_config_source( case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.port\n"); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "port: %d\n", - config->source.port.port); + config->source.port.port); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_lanes: %d\n", - config->source.port.num_lanes); + config->source.port.num_lanes); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "timeout: %d\n", - config->source.port.timeout); + config->source.port.timeout); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "compression: %d\n", - config->source.port.compression.type); + config->source.port.compression.type); break; case IA_CSS_INPUT_MODE_TPG: ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.tpg\n"); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "id: %d\n", - config->source.tpg.id); + config->source.tpg.id); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", - config->source.tpg.mode); + config->source.tpg.mode); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x_mask: 0x%x\n", - config->source.tpg.x_mask); + config->source.tpg.x_mask); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x_delta: %d\n", - config->source.tpg.x_delta); + config->source.tpg.x_delta); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "y_mask: 0x%x\n", - config->source.tpg.y_mask); + config->source.tpg.y_mask); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "y_delta: %d\n", - config->source.tpg.y_delta); + config->source.tpg.y_delta); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "xy_mask: 0x%x\n", - config->source.tpg.xy_mask); + config->source.tpg.xy_mask); break; case IA_CSS_INPUT_MODE_PRBS: ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.prbs\n"); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "id: %d\n", - config->source.prbs.id); + config->source.prbs.id); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "h_blank: %d\n", - config->source.prbs.h_blank); + config->source.prbs.h_blank); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "v_blank: %d\n", - config->source.prbs.v_blank); + config->source.prbs.v_blank); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "seed: 0x%x\n", - config->source.prbs.seed); + config->source.prbs.seed); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "seed1: 0x%x\n", - config->source.prbs.seed1); + config->source.prbs.seed1); break; default: case IA_CSS_INPUT_MODE_FIFO: @@ -3182,61 +3190,62 @@ ia_css_debug_dump_stream_config_source( void ia_css_debug_dump_mipi_buffer_config( - const struct ia_css_mipi_buffer_config *config) + const struct ia_css_mipi_buffer_config *config) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "size_mem_words: %d\n", - config->size_mem_words); + config->size_mem_words); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "nof_mipi_buffers: %d\n", - config->nof_mipi_buffers); + config->nof_mipi_buffers); } void ia_css_debug_dump_metadata_config( - const struct ia_css_metadata_config *config) + const struct ia_css_metadata_config *config) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "data_type: %d\n", - config->data_type); + config->data_type); ia_css_debug_dump_resolution(&config->resolution, "resolution"); } void ia_css_debug_dump_stream_config( - const struct ia_css_stream_config *config, - int num_pipes) + const struct ia_css_stream_config *config, + int num_pipes) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_pipes: %d\n", num_pipes); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); ia_css_debug_dump_stream_config_source(config); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "channel_id: %d\n", - config->channel_id); + config->channel_id); ia_css_debug_dump_resolution(&config->input_config.input_res, "input_res"); - ia_css_debug_dump_resolution(&config->input_config.effective_res, "effective_res"); + ia_css_debug_dump_resolution(&config->input_config.effective_res, + "effective_res"); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "format: %d\n", - config->input_config.format); + config->input_config.format); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "bayer_order: %d\n", - config->input_config.bayer_order); + config->input_config.bayer_order); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sensor_binning_factor: %d\n", - config->sensor_binning_factor); + config->sensor_binning_factor); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "pixels_per_clock: %d\n", - config->pixels_per_clock); + config->pixels_per_clock); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "online: %d\n", - config->online); + config->online); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "init_num_cont_raw_buf: %d\n", - config->init_num_cont_raw_buf); + config->init_num_cont_raw_buf); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "target_num_cont_raw_buf: %d\n", - config->target_num_cont_raw_buf); + "target_num_cont_raw_buf: %d\n", + config->target_num_cont_raw_buf); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "pack_raw_pixels: %d\n", - config->pack_raw_pixels); + config->pack_raw_pixels); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "continuous: %d\n", - config->continuous); + config->continuous); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "flash_gpio_pin: %d\n", - config->flash_gpio_pin); + config->flash_gpio_pin); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "left_padding: %d\n", - config->left_padding); + config->left_padding); ia_css_debug_dump_mipi_buffer_config(&config->mipi_buffer_config); ia_css_debug_dump_metadata_config(&config->metadata_config); } @@ -3300,8 +3309,7 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) /* read the header and parse it */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "~~~ Tracer "); - switch (proc_id) - { + switch (proc_id) { case TRACE_SP0_ID: ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP0"); start_addr = TRACE_SP0_ADDR; @@ -3324,7 +3332,8 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) max_trace_points = TRACE_ISP_MAX_POINTS; break; default: - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\ttraces are not supported for this processor ID - exiting\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "\t\ttraces are not supported for this processor ID - exiting\n"); return; } #ifndef ISP2401 @@ -3333,7 +3342,8 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) #endif #ifndef ISP2401 - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", tmp & 0xFF, point_num); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", tmp & 0xFF, + point_num); if ((tmp & 0xFF) != TRACER_VER) { #else /* Loading byte-by-byte as using the master routine had issues */ @@ -3343,7 +3353,8 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) point_num = header.max_tracer_points; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", header.version, point_num); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", header.version, + point_num); if ((header.version & 0xFF) != TRACER_VER) { #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tUnknown version - exiting\n"); @@ -3355,21 +3366,23 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) } /* copy the TPs and find the first 0 */ for (i = 0; i < point_num; i++) { - trace_read_buf[i] = ia_css_device_load_uint32(start_addr_data + (i * item_size)); + trace_read_buf[i] = ia_css_device_load_uint32(start_addr_data + + (i * item_size)); if ((limit == (-1)) && (trace_read_buf[i] == 0)) limit = i; } #ifdef ISP2401 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Status:\n"); for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\tT%d: %3d (%02x) %6d (%04x) %10d (%08x)\n", i, - header.thr_status_byte[i], header.thr_status_byte[i], - header.thr_status_word[i], header.thr_status_word[i], - header.thr_status_dword[i], header.thr_status_dword[i]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "\tT%d: %3d (%02x) %6d (%04x) %10d (%08x)\n", i, + header.thr_status_byte[i], header.thr_status_byte[i], + header.thr_status_word[i], header.thr_status_word[i], + header.thr_status_dword[i], header.thr_status_dword[i]); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Scratch:\n"); for (i = 0; i < MAX_SCRATCH_DATA; i++) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%10d (%08x) ", - header.scratch_debug[i], header.scratch_debug[i]); + header.scratch_debug[i], header.scratch_debug[i]); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\n"); #endif @@ -3379,8 +3392,10 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) return; } /* no overrun: start from 0 */ - if ((limit == point_num - 1) || /* first 0 is at the end - border case */ - (trace_read_buf[limit + 1] == 0)) /* did not make a full cycle after the memset */ + if ((limit == point_num - 1) || + /* first 0 is at the end - border case */ + (trace_read_buf[limit + 1] == + 0)) /* did not make a full cycle after the memset */ limit = 0; /* overrun: limit is the first non-zero after the first zero */ else @@ -3389,8 +3404,7 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) /* print the TPs */ for (i = 0; i < point_num; i++) { j = (limit + i) % point_num; - if (trace_read_buf[j]) - { + if (trace_read_buf[j]) { #ifndef ISP2401 TRACE_DUMP_FORMAT dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); #else @@ -3406,24 +3420,23 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); } #endif - switch (dump_format) - { + switch (dump_format) { case TRACE_DUMP_FORMAT_POINT: ia_css_debug_dtrace( #ifndef ISP2401 - IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %d\n", - j, FIELD_MAJOR_UNPACK(trace_read_buf[j]), + IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %d\n", + j, FIELD_MAJOR_UNPACK(trace_read_buf[j]), #else - IA_CSS_DEBUG_TRACE, "\t\t%d T%d %d:%d value - %x (%d)\n", - j, - tid_val, - FIELD_MAJOR_UNPACK(trace_read_buf[j]), + IA_CSS_DEBUG_TRACE, "\t\t%d T%d %d:%d value - %x (%d)\n", + j, + tid_val, + FIELD_MAJOR_UNPACK(trace_read_buf[j]), #endif - FIELD_MINOR_UNPACK(trace_read_buf[j]), + FIELD_MINOR_UNPACK(trace_read_buf[j]), #ifdef ISP2401 - FIELD_VALUE_UNPACK(trace_read_buf[j]), + FIELD_VALUE_UNPACK(trace_read_buf[j]), #endif - FIELD_VALUE_UNPACK(trace_read_buf[j])); + FIELD_VALUE_UNPACK(trace_read_buf[j])); break; #ifndef ISP2401 case TRACE_DUMP_FORMAT_VALUE24_HEX: @@ -3432,19 +3445,19 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) #endif ia_css_debug_dtrace( #ifndef ISP2401 - IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x H\n", + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x H\n", #else - IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %x (%d)\n", + IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %x (%d)\n", #endif - j, + j, #ifndef ISP2401 - FIELD_MAJOR_UNPACK(trace_read_buf[j]), - FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + FIELD_MAJOR_UNPACK(trace_read_buf[j]), + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); #else - FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), - FIELD_MINOR_UNPACK(trace_read_buf[j]), - FIELD_VALUE_UNPACK(trace_read_buf[j]), - FIELD_VALUE_UNPACK(trace_read_buf[j])); + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), + FIELD_MINOR_UNPACK(trace_read_buf[j]), + FIELD_VALUE_UNPACK(trace_read_buf[j]), + FIELD_VALUE_UNPACK(trace_read_buf[j])); #endif break; #ifndef ISP2401 @@ -3454,51 +3467,51 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) #endif ia_css_debug_dtrace( #ifndef ISP2401 - IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %d D\n", + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %d D\n", #else - IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x (%d)\n", + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x (%d)\n", #endif - j, - FIELD_MAJOR_UNPACK(trace_read_buf[j]), + j, + FIELD_MAJOR_UNPACK(trace_read_buf[j]), #ifdef ISP2401 - FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), - FIELD_VALUE_24_UNPACK(trace_read_buf[j]), + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), + FIELD_VALUE_24_UNPACK(trace_read_buf[j]), #endif - FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); break; #ifdef ISP2401 #endif case TRACE_DUMP_FORMAT_VALUE24_TIMING: ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing %x\n", - j, + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing %x\n", + j, #ifndef ISP2401 - FIELD_MAJOR_UNPACK(trace_read_buf[j]), + FIELD_MAJOR_UNPACK(trace_read_buf[j]), #else - FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), #endif - FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); break; case TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA: ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing delta %x\n", - j, + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing delta %x\n", + j, #ifndef ISP2401 - FIELD_MAJOR_UNPACK(trace_read_buf[j]), + FIELD_MAJOR_UNPACK(trace_read_buf[j]), #else - FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), + FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), #endif - FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); break; default: ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, - "no such trace dump format %d", + IA_CSS_DEBUG_TRACE, + "no such trace dump format %d", #ifndef ISP2401 - FIELD_FORMAT_UNPACK(trace_read_buf[j])); + FIELD_FORMAT_UNPACK(trace_read_buf[j])); #else - dump_format); + dump_format); #endif break; } @@ -3546,7 +3559,7 @@ void ia_css_debug_tagger_state(void) ia_css_debug_dtrace(2, "Tagger Info:\n"); for (i = 0; i < MAX_CB_ELEMS_FOR_TAGGER; i++) { ia_css_debug_dtrace(2, "\t tagger frame[%d]: exp_id=%d, marked=%d, locked=%d\n", - i, tbuf_frames[i].exp_id, tbuf_frames[i].mark, tbuf_frames[i].lock); + i, tbuf_frames[i].exp_id, tbuf_frames[i].mark, tbuf_frames[i].lock); } } #endif /* defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h index 295b2960320c6..809ee8fcbf293 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h @@ -35,12 +35,12 @@ more details. #include "sw_event_global.h" /*event macros.TODO : Change File Name..???*/ bool ia_css_event_encode( - u8 *in, - u8 nr, - uint32_t *out); + u8 *in, + u8 nr, + uint32_t *out); void ia_css_event_decode( - u32 event, - uint8_t *payload); + u32 event, + uint8_t *payload); #endif /*_IA_CSS_EVENT_H*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c index 5902d550350bd..74ad5f3d5d0e0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c @@ -57,9 +57,9 @@ more details. * Refer to "sw_event_public.h" for details. */ bool ia_css_event_encode( - u8 *in, - u8 nr, - uint32_t *out) + u8 *in, + u8 nr, + uint32_t *out) { bool ret; u32 nr_of_bits; @@ -88,14 +88,15 @@ bool ia_css_event_encode( } void ia_css_event_decode( - u32 event, - uint8_t *payload) + u32 event, + uint8_t *payload) { assert(payload[1] == 0); assert(payload[2] == 0); assert(payload[3] == 0); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_event_decode() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_event_decode() enter:\n"); /* First decode according to the common case * In case of a PORT_EOF event we overwrite with diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h index 62aaf0e3d7721..d12cfde889265 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h @@ -43,8 +43,8 @@ more details. * @return ENODATA - Queue is empty. */ int ia_css_eventq_recv( - ia_css_queue_t *eventq_handle, - uint8_t *payload); + ia_css_queue_t *eventq_handle, + uint8_t *payload); /** * @brief The Host sends the event to SP. @@ -61,9 +61,9 @@ int ia_css_eventq_recv( * @return ENOBUFS - Queue is full. */ int ia_css_eventq_send( - ia_css_queue_t *eventq_handle, - u8 evt_id, - u8 evt_payload_0, - u8 evt_payload_1, - uint8_t evt_payload_2); + ia_css_queue_t *eventq_handle, + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, + uint8_t evt_payload_2); #endif /* _IA_CSS_EVENTQ_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c index b49039b05c69a..0460f102d36fd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c @@ -22,8 +22,8 @@ #include "platform_support.h" /* hrt_sleep() */ int ia_css_eventq_recv( - ia_css_queue_t *eventq_handle, - uint8_t *payload) + ia_css_queue_t *eventq_handle, + uint8_t *payload) { u32 sp_event; int error; @@ -42,11 +42,11 @@ int ia_css_eventq_recv( * Refer to "sh_css_sp.h" for details. */ int ia_css_eventq_send( - ia_css_queue_t *eventq_handle, - u8 evt_id, - u8 evt_payload_0, - u8 evt_payload_1, - uint8_t evt_payload_2) + ia_css_queue_t *eventq_handle, + u8 evt_id, + u8 evt_payload_0, + u8 evt_payload_1, + uint8_t evt_payload_2) { u8 tmp[4]; u32 sw_event; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h index 89ad8080ceb12..0f8eed0a480fa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h @@ -50,8 +50,8 @@ more details. * @return */ void ia_css_frame_info_set_width(struct ia_css_frame_info *info, - unsigned int width, - unsigned int min_padded_width); + unsigned int width, + unsigned int min_padded_width); /* @brief Sets the given format to the frame info * @@ -61,7 +61,7 @@ void ia_css_frame_info_set_width(struct ia_css_frame_info *info, * @return */ void ia_css_frame_info_set_format(struct ia_css_frame_info *info, - enum ia_css_frame_format format); + enum ia_css_frame_format format); /* @brief Sets the frame info with the given parameters * @@ -74,10 +74,10 @@ void ia_css_frame_info_set_format(struct ia_css_frame_info *info, * @return */ void ia_css_frame_info_init(struct ia_css_frame_info *info, - unsigned int width, - unsigned int height, - enum ia_css_frame_format format, - unsigned int aligned); + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int aligned); /* @brief Checks whether 2 frame infos has the same resolution * @@ -87,8 +87,8 @@ void ia_css_frame_info_init(struct ia_css_frame_info *info, * @return Returns true if the frames are equal */ bool ia_css_frame_info_is_same_resolution( - const struct ia_css_frame_info *info_a, - const struct ia_css_frame_info *info_b); + const struct ia_css_frame_info *info_a, + const struct ia_css_frame_info *info_b); /* @brief Check the frame info is valid * @@ -118,7 +118,7 @@ enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame); * @return */ void ia_css_frame_free_multiple(unsigned int num_frames, - struct ia_css_frame **frames_array); + struct ia_css_frame **frames_array); /* @brief Allocate a CSS frame structure of given size in bytes.. * @@ -131,9 +131,9 @@ void ia_css_frame_free_multiple(unsigned int num_frames, * The frame structure is partially null initialized. */ enum ia_css_err ia_css_frame_allocate_with_buffer_size( - struct ia_css_frame **frame, - const unsigned int size_bytes, - const bool contiguous); + struct ia_css_frame **frame, + const unsigned int size_bytes, + const bool contiguous); /* @brief Check whether 2 frames are same type * @@ -143,8 +143,8 @@ enum ia_css_err ia_css_frame_allocate_with_buffer_size( * @return Returns true if the frames are equal */ bool ia_css_frame_is_same_type( - const struct ia_css_frame *frame_a, - const struct ia_css_frame *frame_b); + const struct ia_css_frame *frame_a, + const struct ia_css_frame *frame_b); /* @brief Configure a dma port from frame info * @@ -154,8 +154,8 @@ bool ia_css_frame_is_same_type( * @return */ void ia_css_dma_configure_from_info( - struct dma_port_config *config, - const struct ia_css_frame_info *info); + struct dma_port_config *config, + const struct ia_css_frame_info *info); #ifdef ISP2401 /* @brief Finds the cropping resolution @@ -173,8 +173,8 @@ void ia_css_dma_configure_from_info( */ enum ia_css_err ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, - const struct ia_css_resolution *out_res, - struct ia_css_resolution *crop_res); + const struct ia_css_resolution *out_res, + struct ia_css_resolution *crop_res); #endif #endif /* __IA_CSS_FRAME_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h index 5f995efae39d1..3351d34dbef30 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h @@ -43,7 +43,7 @@ more details. */ struct ia_css_frame_sp_plane { unsigned int offset; /* offset in bytes to start of frame data */ - /* offset is wrt data in sh_css_sp_sp_frame */ + /* offset is wrt data in sh_css_sp_sp_frame */ }; struct ia_css_frame_sp_binary_plane { @@ -121,11 +121,11 @@ struct ia_css_frame_sp { }; void ia_css_frame_info_to_frame_sp_info( - struct ia_css_frame_sp_info *sp_info, - const struct ia_css_frame_info *info); + struct ia_css_frame_sp_info *sp_info, + const struct ia_css_frame_info *info); void ia_css_resolution_to_sp_resolution( - struct ia_css_sp_resolution *sp_info, - const struct ia_css_resolution *info); + struct ia_css_sp_resolution *sp_info, + const struct ia_css_resolution *info); #endif /*__IA_CSS_FRAME_COMM_H__*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c index 05740a3a54099..ab4ca17f05746 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c @@ -43,29 +43,29 @@ more details. ** Static functions declarations **************************************************************************/ static void frame_init_plane(struct ia_css_frame_plane *plane, - unsigned int width, - unsigned int stride, - unsigned int height, - unsigned int offset); + unsigned int width, + unsigned int stride, + unsigned int height, + unsigned int offset); static void frame_init_single_plane(struct ia_css_frame *frame, - struct ia_css_frame_plane *plane, - unsigned int height, - unsigned int subpixels_per_line, - unsigned int bytes_per_pixel); + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel); static void frame_init_raw_single_plane( - struct ia_css_frame *frame, - struct ia_css_frame_plane *plane, - unsigned int height, - unsigned int subpixels_per_line, - unsigned int bits_per_pixel); + struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bits_per_pixel); static void frame_init_mipi_plane(struct ia_css_frame *frame, - struct ia_css_frame_plane *plane, - unsigned int height, - unsigned int subpixels_per_line, - unsigned int bytes_per_pixel); + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel); static void frame_init_nv_planes(struct ia_css_frame *frame, unsigned int horizontal_decimation, @@ -73,13 +73,13 @@ static void frame_init_nv_planes(struct ia_css_frame *frame, unsigned int bytes_per_element); static void frame_init_yuv_planes(struct ia_css_frame *frame, - unsigned int horizontal_decimation, - unsigned int vertical_decimation, - bool swap_uv, - unsigned int bytes_per_element); + unsigned int horizontal_decimation, + unsigned int vertical_decimation, + bool swap_uv, + unsigned int bytes_per_element); static void frame_init_rgb_planes(struct ia_css_frame *frame, - unsigned int bytes_per_element); + unsigned int bytes_per_element); static void frame_init_qplane6_planes(struct ia_css_frame *frame); @@ -103,7 +103,7 @@ static struct ia_css_frame *frame_create(unsigned int width, static unsigned ia_css_elems_bytes_from_info( - const struct ia_css_frame_info *info); + const struct ia_css_frame_info *info); /************************************************************************** ** CSS API functions, exposed by ia_css.h @@ -123,22 +123,22 @@ enum ia_css_err ia_css_frame_allocate_from_info(struct ia_css_frame **frame, if (!frame || !info) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate_from_info() enter:\n"); + "ia_css_frame_allocate_from_info() enter:\n"); err = ia_css_frame_allocate(frame, info->res.width, info->res.height, info->format, info->padded_width, info->raw_bit_depth); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate_from_info() leave:\n"); + "ia_css_frame_allocate_from_info() leave:\n"); return err; } enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, - unsigned int width, - unsigned int height, - enum ia_css_frame_format format, - unsigned int padded_width, - unsigned int raw_bit_depth) + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int padded_width, + unsigned int raw_bit_depth) { enum ia_css_err err = IA_CSS_SUCCESS; @@ -147,11 +147,11 @@ enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, #ifndef ISP2401 - "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d\n", - width, height, format); + "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d\n", + width, height, format); #else - "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", - width, height, format, padded_width, raw_bit_depth); + "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", + width, height, format, padded_width, raw_bit_depth); #endif err = frame_allocate_with_data(frame, width, height, format, @@ -159,25 +159,26 @@ enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, #ifndef ISP2401 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate() leave: frame=%p\n", *frame); + "ia_css_frame_allocate() leave: frame=%p\n", *frame); #else if ((*frame) && err == IA_CSS_SUCCESS) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", *frame, (*frame)->data); + "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", *frame, + (*frame)->data); else ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", - (void *)-1, (unsigned int)-1); + "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", + (void *)-1, (unsigned int)-1); #endif return err; } enum ia_css_err ia_css_frame_map(struct ia_css_frame **frame, - const struct ia_css_frame_info *info, - const void __user *data, - u16 attribute, - void *context) + const struct ia_css_frame_info *info, + const void __user *data, + u16 attribute, + void *context) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_frame *me; @@ -220,23 +221,23 @@ enum ia_css_err ia_css_frame_create_from_info(struct ia_css_frame **frame, struct ia_css_frame *me; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_create_from_info() enter:\n"); + "ia_css_frame_create_from_info() enter:\n"); if (!frame || !info) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_create_from_info() leave: invalid arguments\n"); + "ia_css_frame_create_from_info() leave: invalid arguments\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; } me = frame_create(info->res.width, - info->res.height, - info->format, - info->padded_width, - info->raw_bit_depth, - false, - false); + info->res.height, + info->format, + info->padded_width, + info->raw_bit_depth, + false, + false); if (!me) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_create_from_info() leave: frame create failed\n"); + "ia_css_frame_create_from_info() leave: frame create failed\n"); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -251,28 +252,29 @@ enum ia_css_err ia_css_frame_create_from_info(struct ia_css_frame **frame, #endif sh_css_free(me); #ifdef ISP2401 - me = NULL; - } + me = NULL; +} - *frame = me; +*frame = me; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_create_from_info() leave:\n"); +ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_create_from_info() leave:\n"); - return err; +return err; } enum ia_css_err ia_css_frame_set_data(struct ia_css_frame *frame, - const ia_css_ptr mapped_data, - size_t data_bytes) + const ia_css_ptr mapped_data, + size_t data_bytes) { enum ia_css_err err = IA_CSS_SUCCESS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_set_data() enter:\n"); + "ia_css_frame_set_data() enter:\n"); if (!frame) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_set_data() leave: NULL frame\n"); + "ia_css_frame_set_data() leave: NULL frame\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -282,7 +284,7 @@ enum ia_css_err ia_css_frame_set_data(struct ia_css_frame *frame, */ if ((mapped_data != mmgr_NULL) && (frame->data_bytes > data_bytes)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_set_data() leave: invalid arguments\n"); + "ia_css_frame_set_data() leave: invalid arguments\n"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -303,42 +305,42 @@ enum ia_css_err ia_css_frame_allocate_contiguous(struct ia_css_frame **frame, enum ia_css_err err = IA_CSS_SUCCESS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate_contiguous() " + "ia_css_frame_allocate_contiguous() " #ifndef ISP2401 - "enter: width=%d, height=%d, format=%d\n", - width, height, format); + "enter: width=%d, height=%d, format=%d\n", + width, height, format); #else - "enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", - width, height, format, padded_width, raw_bit_depth); + "enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", + width, height, format, padded_width, raw_bit_depth); #endif err = frame_allocate_with_data(frame, width, height, format, - padded_width, raw_bit_depth, true); + padded_width, raw_bit_depth, true); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate_contiguous() leave: frame=%p\n", - frame ? *frame : (void *)-1); + "ia_css_frame_allocate_contiguous() leave: frame=%p\n", + frame ? *frame : (void *)-1); return err; } enum ia_css_err ia_css_frame_allocate_contiguous_from_info( - struct ia_css_frame **frame, - const struct ia_css_frame_info *info) + struct ia_css_frame **frame, + const struct ia_css_frame_info *info) { enum ia_css_err err = IA_CSS_SUCCESS; assert(frame); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate_contiguous_from_info() enter:\n"); + "ia_css_frame_allocate_contiguous_from_info() enter:\n"); err = ia_css_frame_allocate_contiguous(frame, - info->res.width, - info->res.height, - info->format, - info->padded_width, - info->raw_bit_depth); + info->res.width, + info->res.height, + info->format, + info->padded_width, + info->raw_bit_depth); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate_contiguous_from_info() leave:\n"); + "ia_css_frame_allocate_contiguous_from_info() leave:\n"); return err; } @@ -373,58 +375,58 @@ enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame) switch (frame->info.format) { case IA_CSS_FRAME_FORMAT_MIPI: frame_init_mipi_plane(frame, &frame->planes.raw, - frame->info.res.height, - frame->info.padded_width, - frame->info.raw_bit_depth <= 8 ? 1 : 2); + frame->info.res.height, + frame->info.padded_width, + frame->info.raw_bit_depth <= 8 ? 1 : 2); break; case IA_CSS_FRAME_FORMAT_RAW_PACKED: frame_init_raw_single_plane(frame, &frame->planes.raw, - frame->info.res.height, - frame->info.padded_width, - frame->info.raw_bit_depth); + frame->info.res.height, + frame->info.padded_width, + frame->info.raw_bit_depth); break; case IA_CSS_FRAME_FORMAT_RAW: frame_init_single_plane(frame, &frame->planes.raw, - frame->info.res.height, - frame->info.padded_width, - frame->info.raw_bit_depth <= 8 ? 1 : 2); + frame->info.res.height, + frame->info.padded_width, + frame->info.raw_bit_depth <= 8 ? 1 : 2); break; case IA_CSS_FRAME_FORMAT_RGB565: frame_init_single_plane(frame, &frame->planes.rgb, - frame->info.res.height, - frame->info.padded_width, 2); + frame->info.res.height, + frame->info.padded_width, 2); break; case IA_CSS_FRAME_FORMAT_RGBA888: frame_init_single_plane(frame, &frame->planes.rgb, - frame->info.res.height, - frame->info.padded_width * 4, 1); + frame->info.res.height, + frame->info.padded_width * 4, 1); break; case IA_CSS_FRAME_FORMAT_PLANAR_RGB888: frame_init_rgb_planes(frame, 1); break; - /* yuyv and uyvu have the same frame layout, only the data - * positioning differs. - */ + /* yuyv and uyvu have the same frame layout, only the data + * positioning differs. + */ case IA_CSS_FRAME_FORMAT_YUYV: case IA_CSS_FRAME_FORMAT_UYVY: case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: frame_init_single_plane(frame, &frame->planes.yuyv, - frame->info.res.height, - frame->info.padded_width * 2, 1); + frame->info.res.height, + frame->info.padded_width * 2, 1); break; case IA_CSS_FRAME_FORMAT_YUV_LINE: /* Needs 3 extra lines to allow vf_pp prefetching */ frame_init_single_plane(frame, &frame->planes.yuyv, - frame->info.res.height * 3 / 2 + 3, - frame->info.padded_width, 1); + frame->info.res.height * 3 / 2 + 3, + frame->info.padded_width, 1); break; case IA_CSS_FRAME_FORMAT_NV11: - frame_init_nv_planes(frame, 4, 1, 1); + frame_init_nv_planes(frame, 4, 1, 1); break; - /* nv12 and nv21 have the same frame layout, only the data - * positioning differs. - */ + /* nv12 and nv21 have the same frame layout, only the data + * positioning differs. + */ case IA_CSS_FRAME_FORMAT_NV12: case IA_CSS_FRAME_FORMAT_NV21: case IA_CSS_FRAME_FORMAT_NV12_TILEY: @@ -433,9 +435,9 @@ enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame) case IA_CSS_FRAME_FORMAT_NV12_16: frame_init_nv_planes(frame, 2, 2, 2); break; - /* nv16 and nv61 have the same frame layout, only the data - * positioning differs. - */ + /* nv16 and nv61 have the same frame layout, only the data + * positioning differs. + */ case IA_CSS_FRAME_FORMAT_NV16: case IA_CSS_FRAME_FORMAT_NV61: frame_init_nv_planes(frame, 2, 1, 1); @@ -466,8 +468,8 @@ enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame) break; case IA_CSS_FRAME_FORMAT_BINARY_8: frame_init_single_plane(frame, &frame->planes.binary.data, - frame->info.res.height, - frame->info.padded_width, 1); + frame->info.res.height, + frame->info.padded_width, 1); frame->planes.binary.size = 0; break; default: @@ -477,8 +479,8 @@ enum ia_css_err ia_css_frame_init_planes(struct ia_css_frame *frame) } void ia_css_frame_info_set_width(struct ia_css_frame_info *info, - unsigned int width, - unsigned int min_padded_width) + unsigned int width, + unsigned int min_padded_width) { unsigned int align; @@ -518,19 +520,19 @@ void ia_css_frame_info_set_width(struct ia_css_frame_info *info, } void ia_css_frame_info_set_format(struct ia_css_frame_info *info, - enum ia_css_frame_format format) + enum ia_css_frame_format format) { assert(info); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_info_set_format() enter:\n"); + "ia_css_frame_info_set_format() enter:\n"); info->format = format; } void ia_css_frame_info_init(struct ia_css_frame_info *info, - unsigned int width, - unsigned int height, - enum ia_css_frame_format format, - unsigned int aligned) + unsigned int width, + unsigned int height, + enum ia_css_frame_format format, + unsigned int aligned) { IA_CSS_ENTER_PRIVATE("info = %p, width = %d, height = %d, format = %d, aligned = %d", info, width, height, format, aligned); @@ -546,7 +548,7 @@ void ia_css_frame_info_init(struct ia_css_frame_info *info, } void ia_css_frame_free_multiple(unsigned int num_frames, - struct ia_css_frame **frames_array) + struct ia_css_frame **frames_array) { unsigned int i; @@ -559,15 +561,15 @@ void ia_css_frame_free_multiple(unsigned int num_frames, } enum ia_css_err ia_css_frame_allocate_with_buffer_size( - struct ia_css_frame **frame, - const unsigned int buffer_size_bytes, - const bool contiguous) + struct ia_css_frame **frame, + const unsigned int buffer_size_bytes, + const bool contiguous) { /* AM: Body coppied from frame_allocate_with_data(). */ enum ia_css_err err; struct ia_css_frame *me = frame_create(0, 0, - IA_CSS_FRAME_FORMAT_NUM,/* Not valid format yet */ - 0, 0, contiguous, false); + IA_CSS_FRAME_FORMAT_NUM,/* Not valid format yet */ + 0, 0, contiguous, false); if (!me) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -592,24 +594,24 @@ enum ia_css_err ia_css_frame_allocate_with_buffer_size( } bool ia_css_frame_info_is_same_resolution( - const struct ia_css_frame_info *info_a, - const struct ia_css_frame_info *info_b) + const struct ia_css_frame_info *info_a, + const struct ia_css_frame_info *info_b) { if (!info_a || !info_b) return false; return (info_a->res.width == info_b->res.width) && - (info_a->res.height == info_b->res.height); + (info_a->res.height == info_b->res.height); } bool ia_css_frame_is_same_type(const struct ia_css_frame *frame_a, - const struct ia_css_frame *frame_b) + const struct ia_css_frame *frame_b) { bool is_equal = false; const struct ia_css_frame_info *info_a = &frame_a->info, - *info_b = &frame_b->info; + *info_b = &frame_b->info; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_is_same_type() enter:\n"); + "ia_css_frame_is_same_type() enter:\n"); if (!info_a || !info_b) return false; @@ -620,18 +622,19 @@ bool ia_css_frame_is_same_type(const struct ia_css_frame *frame_a, is_equal = ia_css_frame_info_is_same_resolution(info_a, info_b); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_is_same_type() leave:\n"); + "ia_css_frame_is_same_type() leave:\n"); return is_equal; } void ia_css_dma_configure_from_info( - struct dma_port_config *config, - const struct ia_css_frame_info *info) + struct dma_port_config *config, + const struct ia_css_frame_info *info) { unsigned int is_raw_packed = info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED; - unsigned int bits_per_pixel = is_raw_packed ? info->raw_bit_depth : ia_css_elems_bytes_from_info(info) * 8; + unsigned int bits_per_pixel = is_raw_packed ? info->raw_bit_depth : + ia_css_elems_bytes_from_info(info) * 8; unsigned int pix_per_ddrword = HIVE_ISP_DDR_WORD_BITS / bits_per_pixel; unsigned int words_per_line = CEIL_DIV(info->padded_width, pix_per_ddrword); unsigned int elems_b = pix_per_ddrword; @@ -648,10 +651,10 @@ ia_css_dma_configure_from_info( **************************************************************************/ static void frame_init_plane(struct ia_css_frame_plane *plane, - unsigned int width, - unsigned int stride, - unsigned int height, - unsigned int offset) + unsigned int width, + unsigned int stride, + unsigned int height, + unsigned int offset) { plane->height = height; plane->width = width; @@ -660,10 +663,10 @@ static void frame_init_plane(struct ia_css_frame_plane *plane, } static void frame_init_single_plane(struct ia_css_frame *frame, - struct ia_css_frame_plane *plane, - unsigned int height, - unsigned int subpixels_per_line, - unsigned int bytes_per_pixel) + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel) { unsigned int stride; @@ -680,29 +683,29 @@ static void frame_init_single_plane(struct ia_css_frame *frame, } static void frame_init_raw_single_plane( - struct ia_css_frame *frame, - struct ia_css_frame_plane *plane, - unsigned int height, - unsigned int subpixels_per_line, - unsigned int bits_per_pixel) + struct ia_css_frame *frame, + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bits_per_pixel) { unsigned int stride; assert(frame); stride = HIVE_ISP_DDR_WORD_BYTES * - CEIL_DIV(subpixels_per_line, - HIVE_ISP_DDR_WORD_BITS / bits_per_pixel); + CEIL_DIV(subpixels_per_line, + HIVE_ISP_DDR_WORD_BITS / bits_per_pixel); frame->data_bytes = stride * height; frame_init_plane(plane, subpixels_per_line, stride, height, 0); return; } static void frame_init_mipi_plane(struct ia_css_frame *frame, - struct ia_css_frame_plane *plane, - unsigned int height, - unsigned int subpixels_per_line, - unsigned int bytes_per_pixel) + struct ia_css_frame_plane *plane, + unsigned int height, + unsigned int subpixels_per_line, + unsigned int bytes_per_pixel) { unsigned int stride; @@ -753,16 +756,16 @@ static void frame_init_nv_planes(struct ia_css_frame *frame, } static void frame_init_yuv_planes(struct ia_css_frame *frame, - unsigned int horizontal_decimation, - unsigned int vertical_decimation, - bool swap_uv, - unsigned int bytes_per_element) + unsigned int horizontal_decimation, + unsigned int vertical_decimation, + bool swap_uv, + unsigned int bytes_per_element) { unsigned int y_width = frame->info.padded_width, - y_height = frame->info.res.height, - uv_width = y_width / horizontal_decimation, - uv_height = y_height / vertical_decimation, - y_stride, y_bytes, uv_bytes, uv_stride; + y_height = frame->info.res.height, + uv_width = y_width / horizontal_decimation, + uv_height = y_height / vertical_decimation, + y_stride, y_bytes, uv_bytes, uv_stride; y_stride = y_width * bytes_per_element; uv_stride = uv_width * bytes_per_element; @@ -786,10 +789,10 @@ static void frame_init_yuv_planes(struct ia_css_frame *frame, } static void frame_init_rgb_planes(struct ia_css_frame *frame, - unsigned int bytes_per_element) + unsigned int bytes_per_element) { unsigned int width = frame->info.res.width, - height = frame->info.res.height, stride, bytes; + height = frame->info.res.height, stride, bytes; stride = width * bytes_per_element; bytes = stride * height; @@ -805,7 +808,7 @@ static void frame_init_rgb_planes(struct ia_css_frame *frame, static void frame_init_qplane6_planes(struct ia_css_frame *frame) { unsigned int width = frame->info.padded_width / 2, - height = frame->info.res.height / 2, bytes, stride; + height = frame->info.res.height / 2, bytes, stride; stride = width * 2; bytes = stride * height; @@ -851,12 +854,12 @@ static enum ia_css_err frame_allocate_with_data(struct ia_css_frame **frame, { enum ia_css_err err; struct ia_css_frame *me = frame_create(width, - height, - format, - padded_width, - raw_bit_depth, - contiguous, - true); + height, + format, + padded_width, + raw_bit_depth, + contiguous, + true); if (!me) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -928,7 +931,7 @@ ia_css_elems_bytes_from_info(const struct ia_css_frame_info *info) return 1; /* bytes per pixel */ if (info->format == IA_CSS_FRAME_FORMAT_RAW - || (info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED)) { + || (info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED)) { if (info->raw_bit_depth) return CEIL_DIV(info->raw_bit_depth, 8); else @@ -944,8 +947,8 @@ ia_css_elems_bytes_from_info(const struct ia_css_frame_info *info) } void ia_css_frame_info_to_frame_sp_info( - struct ia_css_frame_sp_info *to, - const struct ia_css_frame_info *from) + struct ia_css_frame_sp_info *to, + const struct ia_css_frame_info *from) { ia_css_resolution_to_sp_resolution(&to->res, &from->res); to->padded_width = (uint16_t)from->padded_width; @@ -955,8 +958,8 @@ void ia_css_frame_info_to_frame_sp_info( } void ia_css_resolution_to_sp_resolution( - struct ia_css_sp_resolution *to, - const struct ia_css_resolution *from) + struct ia_css_sp_resolution *to, + const struct ia_css_resolution *from) { to->width = (uint16_t)from->width; to->height = (uint16_t)from->height; @@ -966,9 +969,8 @@ void ia_css_resolution_to_sp_resolution( enum ia_css_err ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, - const struct ia_css_resolution *out_res, - struct ia_css_resolution *crop_res) -{ + const struct ia_css_resolution *out_res, + struct ia_css_resolution *crop_res) { u32 wd_even_ceil, ht_even_ceil; u32 in_ratio, out_ratio; @@ -976,17 +978,17 @@ ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, return IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_ENTER_PRIVATE("in(%ux%u) -> out(%ux%u)", in_res->width, - in_res->height, out_res->width, out_res->height); + in_res->height, out_res->width, out_res->height); if ((in_res->width == 0) - || (in_res->height == 0) - || (out_res->width == 0) - || (out_res->height == 0)) - return IA_CSS_ERR_INVALID_ARGUMENTS; + || (in_res->height == 0) + || (out_res->width == 0) + || (out_res->height == 0)) + return IA_CSS_ERR_INVALID_ARGUMENTS; if ((out_res->width > in_res->width) || - (out_res->height > in_res->height)) - return IA_CSS_ERR_INVALID_ARGUMENTS; + (out_res->height > in_res->height)) + return IA_CSS_ERR_INVALID_ARGUMENTS; /* If aspect ratio (width/height) of out_res is higher than the aspect * ratio of the in_res, then we crop vertically, otherwise we crop @@ -995,17 +997,20 @@ ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, in_ratio = in_res->width * out_res->height; out_ratio = out_res->width * in_res->height; - if (in_ratio == out_ratio) { + if (in_ratio == out_ratio) + { crop_res->width = in_res->width; crop_res->height = in_res->height; - } else if (out_ratio > in_ratio) { + } else if (out_ratio > in_ratio) + { crop_res->width = in_res->width; crop_res->height = ROUND_DIV(out_res->height * crop_res->width, - out_res->width); - } else { + out_res->width); + } else + { crop_res->height = in_res->height; crop_res->width = ROUND_DIV(out_res->width * crop_res->height, - out_res->height); + out_res->height); } /* Round new (cropped) width and height to an even number. @@ -1016,16 +1021,18 @@ ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, */ wd_even_ceil = EVEN_CEIL(crop_res->width); ht_even_ceil = EVEN_CEIL(crop_res->height); - if ((wd_even_ceil > in_res->width) || (ht_even_ceil > in_res->height)) { + if ((wd_even_ceil > in_res->width) || (ht_even_ceil > in_res->height)) + { crop_res->width = EVEN_FLOOR(crop_res->width); crop_res->height = EVEN_FLOOR(crop_res->height); - } else { + } else + { crop_res->width = wd_even_ceil; crop_res->height = ht_even_ceil; } IA_CSS_LEAVE_PRIVATE("in(%ux%u) -> out(%ux%u)", crop_res->width, - crop_res->height, out_res->width, out_res->height); + crop_res->height, out_res->width, out_res->height); return IA_CSS_SUCCESS; } #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h index d02bff1bbf46e..53941fbf0b8f0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h @@ -38,10 +38,10 @@ more details. extern bool ifmtr_set_if_blocking_mode_reset; unsigned int ia_css_ifmtr_lines_needed_for_bayer_order( - const struct ia_css_stream_config *config); + const struct ia_css_stream_config *config); unsigned int ia_css_ifmtr_columns_needed_for_bayer_order( - const struct ia_css_stream_config *config); + const struct ia_css_stream_config *config); enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, struct ia_css_binary *binary); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c index bccbddd35d28d..cf55a01b20343 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c @@ -45,18 +45,18 @@ more details. * Static functions declarations ************************************************************/ static enum ia_css_err ifmtr_start_column( - const struct ia_css_stream_config *config, - unsigned int bin_in, - unsigned int *start_column); + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_column); static enum ia_css_err ifmtr_input_start_line( - const struct ia_css_stream_config *config, - unsigned int bin_in, - unsigned int *start_line); + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_line); static void ifmtr_set_if_blocking_mode( - const input_formatter_cfg_t * const config_a, - const input_formatter_cfg_t * const config_b); + const input_formatter_cfg_t *const config_a, + const input_formatter_cfg_t *const config_b); /************************************************************ * Public functions @@ -66,7 +66,7 @@ static void ifmtr_set_if_blocking_mode( * to correct in case the input bayer order is different. */ unsigned int ia_css_ifmtr_lines_needed_for_bayer_order( - const struct ia_css_stream_config *config) + const struct ia_css_stream_config *config) { assert(config); if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_BGGR) @@ -77,7 +77,7 @@ unsigned int ia_css_ifmtr_lines_needed_for_bayer_order( } unsigned int ia_css_ifmtr_columns_needed_for_bayer_order( - const struct ia_css_stream_config *config) + const struct ia_css_stream_config *config) { assert(config); if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_RGGB) @@ -91,26 +91,26 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, struct ia_css_binary *binary) { unsigned int start_line, start_column = 0, - cropped_height, - cropped_width, - num_vectors, - buffer_height = 2, - buffer_width, - two_ppc, - vmem_increment = 0, - deinterleaving = 0, - deinterleaving_b = 0, - width_a = 0, - width_b = 0, - bits_per_pixel, - vectors_per_buffer, - vectors_per_line = 0, - buffers_per_line = 0, - buf_offset_a = 0, - buf_offset_b = 0, - line_width = 0, - width_b_factor = 1, start_column_b, - left_padding = 0; + cropped_height, + cropped_width, + num_vectors, + buffer_height = 2, + buffer_width, + two_ppc, + vmem_increment = 0, + deinterleaving = 0, + deinterleaving_b = 0, + width_a = 0, + width_b = 0, + bits_per_pixel, + vectors_per_buffer, + vectors_per_line = 0, + buffers_per_line = 0, + buf_offset_a = 0, + buf_offset_b = 0, + line_width = 0, + width_b_factor = 1, start_column_b, + left_padding = 0; input_formatter_cfg_t if_a_config, if_b_config; enum atomisp_input_format input_format; enum ia_css_err err = IA_CSS_SUCCESS; @@ -125,7 +125,8 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, cropped_width = binary->in_frame_info.res.width; /* This should correspond to the input buffer definition for ISP binaries in input_buf.isp.h */ - if (binary->info->sp.enable.continuous && binary->info->sp.pipeline.mode != IA_CSS_BINARY_MODE_COPY) + if (binary->info->sp.enable.continuous && + binary->info->sp.pipeline.mode != IA_CSS_BINARY_MODE_COPY) buffer_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; else buffer_width = binary->info->sp.input.max_width; @@ -186,7 +187,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, start_column_b = start_column; bits_per_pixel = input_formatter_get_alignment(INPUT_FORMATTER0_ID) - * 8 / ISP_VEC_NELEMS; + * 8 / ISP_VEC_NELEMS; switch (input_format) { case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: if (two_ppc) { @@ -205,8 +206,8 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, vectors_per_line = num_vectors / buffer_height; /* Even lines are half size */ line_width = vectors_per_line * - input_formatter_get_alignment(INPUT_FORMATTER0_ID) / - 2; + input_formatter_get_alignment(INPUT_FORMATTER0_ID) / + 2; start_column /= 2; } else { vmem_increment = 1; @@ -231,8 +232,8 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, vectors_per_line = num_vectors / buffer_height; /* Even lines are half size */ line_width = vectors_per_line * - input_formatter_get_alignment(INPUT_FORMATTER0_ID) / - 2; + input_formatter_get_alignment(INPUT_FORMATTER0_ID) / + 2; start_column *= deinterleaving; start_column /= 2; start_column_b = start_column; @@ -317,7 +318,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, vmem_increment = 1; deinterleaving = 2; if ((!binary) || (config->continuous && binary - && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY)) { + && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY)) { /* !binary -> sp raw copy pipe, no deinterleaving */ deinterleaving = 1; } @@ -388,7 +389,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, } if (!line_width) line_width = vectors_per_line * - input_formatter_get_alignment(INPUT_FORMATTER0_ID); + input_formatter_get_alignment(INPUT_FORMATTER0_ID); if (!buffers_per_line) buffers_per_line = deinterleaving; line_width = CEIL_MUL(line_width, @@ -399,7 +400,7 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, if (config->mode == IA_CSS_INPUT_MODE_TPG && ((binary && binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_VIDEO) || - (!binary))) { + (!binary))) { /* !binary -> sp raw copy pipe */ /* workaround for TPG in video mode */ start_line = 0; @@ -432,10 +433,10 @@ enum ia_css_err ia_css_ifmtr_configure(struct ia_css_stream_config *config, buffer_width *= deinterleaving; /* Patch from bayer to rgb */ num_vectors = num_vectors / 2 * - deinterleaving * width_b_factor; + deinterleaving * width_b_factor; vectors_per_line = num_vectors / buffer_height; line_width = vectors_per_line * - input_formatter_get_alignment(INPUT_FORMATTER0_ID); + input_formatter_get_alignment(INPUT_FORMATTER0_ID); } if_b_config.start_line = start_line; if_b_config.start_column = start_column_b; @@ -483,8 +484,8 @@ bool ifmtr_set_if_blocking_mode_reset = true; * Static functions ************************************************************/ static void ifmtr_set_if_blocking_mode( - const input_formatter_cfg_t * const config_a, - const input_formatter_cfg_t * const config_b) + const input_formatter_cfg_t *const config_a, + const input_formatter_cfg_t *const config_b) { int i; bool block[] = { false, false, false, false }; @@ -516,12 +517,12 @@ static void ifmtr_set_if_blocking_mode( } static enum ia_css_err ifmtr_start_column( - const struct ia_css_stream_config *config, - unsigned int bin_in, - unsigned int *start_column) + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_column) { unsigned int in = config->input_config.input_res.width, start, - for_bayer = ia_css_ifmtr_columns_needed_for_bayer_order(config); + for_bayer = ia_css_ifmtr_columns_needed_for_bayer_order(config); if (bin_in + 2 * for_bayer > in) return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -542,12 +543,12 @@ static enum ia_css_err ifmtr_start_column( } static enum ia_css_err ifmtr_input_start_line( - const struct ia_css_stream_config *config, - unsigned int bin_in, - unsigned int *start_line) + const struct ia_css_stream_config *config, + unsigned int bin_in, + unsigned int *start_line) { unsigned int in = config->input_config.input_res.height, start, - for_bayer = ia_css_ifmtr_lines_needed_for_bayer_order(config); + for_bayer = ia_css_ifmtr_lines_needed_for_bayer_order(config); if (bin_in + 2 * for_bayer > in) return IA_CSS_ERR_INVALID_ARGUMENTS; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h index 545f9e2da59e9..a5e552e590e8a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h @@ -38,32 +38,32 @@ more details. /* SP access */ void ia_css_inputfifo_send_input_frame( - const unsigned short *data, - unsigned int width, - unsigned int height, - unsigned int ch_id, - enum atomisp_input_format input_format, - bool two_ppc); + const unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc); void ia_css_inputfifo_start_frame( - unsigned int ch_id, - enum atomisp_input_format input_format, - bool two_ppc); + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc); void ia_css_inputfifo_send_line( - unsigned int ch_id, - const unsigned short *data, - unsigned int width, - const unsigned short *data2, - unsigned int width2); + unsigned int ch_id, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2); void ia_css_inputfifo_send_embedded_line( - unsigned int ch_id, - enum atomisp_input_format data_type, - const unsigned short *data, - unsigned int width); + unsigned int ch_id, + enum atomisp_input_format data_type, + const unsigned short *data, + unsigned int width); void ia_css_inputfifo_end_frame( - unsigned int ch_id); + unsigned int ch_id); #endif /* _IA_CSS_INPUTFIFO_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c index 029db01a94411..57efa4055f5f7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c @@ -107,12 +107,12 @@ static struct inputfifo_instance /* Streaming to MIPI */ static unsigned int inputfifo_wrap_marker( -/* static inline unsigned inputfifo_wrap_marker( */ - unsigned int marker) + /* static inline unsigned inputfifo_wrap_marker( */ + unsigned int marker) { return marker | - (inputfifo_curr_ch_id << HIVE_STR_TO_MIPI_CH_ID_LSB) | - (inputfifo_curr_fmt_type << _HIVE_STR_TO_MIPI_FMT_TYPE_LSB); + (inputfifo_curr_ch_id << HIVE_STR_TO_MIPI_CH_ID_LSB) | + (inputfifo_curr_fmt_type << _HIVE_STR_TO_MIPI_FMT_TYPE_LSB); } static inline void @@ -125,8 +125,8 @@ _sh_css_fifo_snd(unsigned int token) } static void inputfifo_send_data_a( -/* static inline void inputfifo_send_data_a( */ -unsigned int data) + /* static inline void inputfifo_send_data_a( */ + unsigned int data) { unsigned int token = (1 << HIVE_STR_TO_MIPI_VALID_A_BIT) | (data << HIVE_STR_TO_MIPI_DATA_A_LSB); @@ -135,8 +135,8 @@ unsigned int data) } static void inputfifo_send_data_b( -/* static inline void inputfifo_send_data_b( */ - unsigned int data) + /* static inline void inputfifo_send_data_b( */ + unsigned int data) { unsigned int token = (1 << HIVE_STR_TO_MIPI_VALID_B_BIT) | (data << _HIVE_STR_TO_MIPI_DATA_B_LSB); @@ -145,9 +145,9 @@ static void inputfifo_send_data_b( } static void inputfifo_send_data( -/* static inline void inputfifo_send_data( */ - unsigned int a, - unsigned int b) + /* static inline void inputfifo_send_data( */ + unsigned int a, + unsigned int b) { unsigned int token = ((1 << HIVE_STR_TO_MIPI_VALID_A_BIT) | (1 << HIVE_STR_TO_MIPI_VALID_B_BIT) | @@ -161,7 +161,7 @@ static void inputfifo_send_sol(void) /* static inline void inputfifo_send_sol(void) */ { hrt_data token = inputfifo_wrap_marker( - 1 << HIVE_STR_TO_MIPI_SOL_BIT); + 1 << HIVE_STR_TO_MIPI_SOL_BIT); _sh_css_fifo_snd(token); return; @@ -171,7 +171,7 @@ static void inputfifo_send_eol(void) /* static inline void inputfifo_send_eol(void) */ { hrt_data token = inputfifo_wrap_marker( - 1 << HIVE_STR_TO_MIPI_EOL_BIT); + 1 << HIVE_STR_TO_MIPI_EOL_BIT); _sh_css_fifo_snd(token); return; } @@ -180,7 +180,7 @@ static void inputfifo_send_sof(void) /* static inline void inputfifo_send_sof(void) */ { hrt_data token = inputfifo_wrap_marker( - 1 << HIVE_STR_TO_MIPI_SOF_BIT); + 1 << HIVE_STR_TO_MIPI_SOF_BIT); _sh_css_fifo_snd(token); return; @@ -190,15 +190,15 @@ static void inputfifo_send_eof(void) /* static inline void inputfifo_send_eof(void) */ { hrt_data token = inputfifo_wrap_marker( - 1 << HIVE_STR_TO_MIPI_EOF_BIT); + 1 << HIVE_STR_TO_MIPI_EOF_BIT); _sh_css_fifo_snd(token); return; } #ifdef __ON__ static void inputfifo_send_ch_id( -/* static inline void inputfifo_send_ch_id( */ - unsigned int ch_id) + /* static inline void inputfifo_send_ch_id( */ + unsigned int ch_id) { hrt_data token; @@ -212,8 +212,8 @@ static void inputfifo_send_ch_id( } static void inputfifo_send_fmt_type( -/* static inline void inputfifo_send_fmt_type( */ - unsigned int fmt_type) + /* static inline void inputfifo_send_fmt_type( */ + unsigned int fmt_type) { hrt_data token; @@ -228,10 +228,10 @@ static void inputfifo_send_fmt_type( #endif /* __ON__ */ static void inputfifo_send_ch_id_and_fmt_type( -/* static inline -void inputfifo_send_ch_id_and_fmt_type( */ - unsigned int ch_id, - unsigned int fmt_type) + /* static inline + void inputfifo_send_ch_id_and_fmt_type( */ + unsigned int ch_id, + unsigned int fmt_type) { hrt_data token; @@ -255,9 +255,9 @@ static void inputfifo_send_empty_token(void) } static void inputfifo_start_frame( -/* static inline void inputfifo_start_frame( */ - unsigned int ch_id, - unsigned int fmt_type) + /* static inline void inputfifo_start_frame( */ + unsigned int ch_id, + unsigned int fmt_type) { inputfifo_send_ch_id_and_fmt_type(ch_id, fmt_type); inputfifo_send_sof(); @@ -265,7 +265,7 @@ static void inputfifo_start_frame( } static void inputfifo_end_frame( - unsigned int marker_cycles) + unsigned int marker_cycles) { unsigned int i; @@ -276,14 +276,14 @@ static void inputfifo_end_frame( } static void inputfifo_send_line2( - const unsigned short *data, - unsigned int width, - const unsigned short *data2, - unsigned int width2, - unsigned int hblank_cycles, - unsigned int marker_cycles, - unsigned int two_ppc, - enum inputfifo_mipi_data_type type) + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2, + unsigned int hblank_cycles, + unsigned int marker_cycles, + unsigned int two_ppc, + enum inputfifo_mipi_data_type type) { unsigned int i, is_rgb = 0, is_legacy = 0; @@ -315,10 +315,10 @@ static void inputfifo_send_line2( * if the file contains an odd number of bytes. */ inputfifo_send_data( - data[0], 0); + data[0], 0); } else { inputfifo_send_data( - data[0], data[1]); + data[0], data[1]); } /* Additional increment because we send 2 pixels */ data++; @@ -345,10 +345,10 @@ static void inputfifo_send_line2( * if the file contains an odd number of bytes. */ inputfifo_send_data( - data2[0], 0); + data2[0], 0); } else { inputfifo_send_data( - data2[0], data2[1]); + data2[0], data2[1]); } /* Additional increment because we send 2 pixels */ data2++; @@ -367,18 +367,18 @@ static void inputfifo_send_line2( static void inputfifo_send_line(const unsigned short *data, - unsigned int width, - unsigned int hblank_cycles, - unsigned int marker_cycles, - unsigned int two_ppc, - enum inputfifo_mipi_data_type type) + unsigned int width, + unsigned int hblank_cycles, + unsigned int marker_cycles, + unsigned int two_ppc, + enum inputfifo_mipi_data_type type) { assert(data); inputfifo_send_line2(data, width, NULL, 0, - hblank_cycles, - marker_cycles, - two_ppc, - type); + hblank_cycles, + marker_cycles, + two_ppc, + type); } /* Send a frame of data into the input network via the GP FIFO. @@ -410,15 +410,15 @@ inputfifo_send_line(const unsigned short *data, */ static void inputfifo_send_frame( - const unsigned short *data, - unsigned int width, - unsigned int height, - unsigned int ch_id, - unsigned int fmt_type, - unsigned int hblank_cycles, - unsigned int marker_cycles, - unsigned int two_ppc, - enum inputfifo_mipi_data_type type) + const unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int ch_id, + unsigned int fmt_type, + unsigned int hblank_cycles, + unsigned int marker_cycles, + unsigned int two_ppc, + enum inputfifo_mipi_data_type type) { unsigned int i; @@ -429,15 +429,15 @@ static void inputfifo_send_frame( if ((type == inputfifo_mipi_data_type_yuv420) && (i & 1) == 1) { inputfifo_send_line(data, 2 * width, - hblank_cycles, - marker_cycles, - two_ppc, type); + hblank_cycles, + marker_cycles, + two_ppc, type); data += 2 * width; } else { inputfifo_send_line(data, width, - hblank_cycles, - marker_cycles, - two_ppc, type); + hblank_cycles, + marker_cycles, + two_ppc, type); data += width; } } @@ -446,40 +446,40 @@ static void inputfifo_send_frame( } static enum inputfifo_mipi_data_type inputfifo_determine_type( - enum atomisp_input_format input_format) + enum atomisp_input_format input_format) { enum inputfifo_mipi_data_type type; type = inputfifo_mipi_data_type_regular; if (input_format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { type = - inputfifo_mipi_data_type_yuv420_legacy; + inputfifo_mipi_data_type_yuv420_legacy; } else if (input_format == ATOMISP_INPUT_FORMAT_YUV420_8 || input_format == ATOMISP_INPUT_FORMAT_YUV420_10 || input_format == ATOMISP_INPUT_FORMAT_YUV420_16) { type = - inputfifo_mipi_data_type_yuv420; + inputfifo_mipi_data_type_yuv420; } else if (input_format >= ATOMISP_INPUT_FORMAT_RGB_444 && input_format <= ATOMISP_INPUT_FORMAT_RGB_888) { type = - inputfifo_mipi_data_type_rgb; + inputfifo_mipi_data_type_rgb; } return type; } static struct inputfifo_instance *inputfifo_get_inst( - unsigned int ch_id) + unsigned int ch_id) { return &inputfifo_inst_admin[ch_id]; } void ia_css_inputfifo_send_input_frame( - const unsigned short *data, - unsigned int width, - unsigned int height, - unsigned int ch_id, - enum atomisp_input_format input_format, - bool two_ppc) + const unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc) { unsigned int fmt_type, hblank_cycles, marker_cycles; enum inputfifo_mipi_data_type type; @@ -488,20 +488,20 @@ void ia_css_inputfifo_send_input_frame( hblank_cycles = HBLANK_CYCLES; marker_cycles = MARKER_CYCLES; ia_css_isys_convert_stream_format_to_mipi_format(input_format, - MIPI_PREDICTOR_NONE, - &fmt_type); + MIPI_PREDICTOR_NONE, + &fmt_type); type = inputfifo_determine_type(input_format); inputfifo_send_frame(data, width, height, - ch_id, fmt_type, hblank_cycles, marker_cycles, - two_ppc, type); + ch_id, fmt_type, hblank_cycles, marker_cycles, + two_ppc, type); } void ia_css_inputfifo_start_frame( - unsigned int ch_id, - enum atomisp_input_format input_format, - bool two_ppc) + unsigned int ch_id, + enum atomisp_input_format input_format, + bool two_ppc) { struct inputfifo_instance *s2mi; @@ -509,8 +509,8 @@ void ia_css_inputfifo_start_frame( s2mi->ch_id = ch_id; ia_css_isys_convert_stream_format_to_mipi_format(input_format, - MIPI_PREDICTOR_NONE, - &s2mi->fmt_type); + MIPI_PREDICTOR_NONE, + &s2mi->fmt_type); s2mi->two_ppc = two_ppc; s2mi->type = inputfifo_determine_type(input_format); s2mi->hblank_cycles = HBLANK_CYCLES; @@ -522,11 +522,11 @@ void ia_css_inputfifo_start_frame( } void ia_css_inputfifo_send_line( - unsigned int ch_id, - const unsigned short *data, - unsigned int width, - const unsigned short *data2, - unsigned int width2) + unsigned int ch_id, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2) { struct inputfifo_instance *s2mi; @@ -539,17 +539,17 @@ void ia_css_inputfifo_send_line( inputfifo_curr_fmt_type = (s2mi->fmt_type) & _HIVE_ISP_FMT_TYPE_MASK; inputfifo_send_line2(data, width, data2, width2, - s2mi->hblank_cycles, - s2mi->marker_cycles, - s2mi->two_ppc, - s2mi->type); + s2mi->hblank_cycles, + s2mi->marker_cycles, + s2mi->two_ppc, + s2mi->type); } void ia_css_inputfifo_send_embedded_line( - unsigned int ch_id, - enum atomisp_input_format data_type, - const unsigned short *data, - unsigned int width) + unsigned int ch_id, + enum atomisp_input_format data_type, + const unsigned short *data, + unsigned int width) { struct inputfifo_instance *s2mi; unsigned int fmt_type; @@ -557,17 +557,17 @@ void ia_css_inputfifo_send_embedded_line( assert(data); s2mi = inputfifo_get_inst(ch_id); ia_css_isys_convert_stream_format_to_mipi_format(data_type, - MIPI_PREDICTOR_NONE, &fmt_type); + MIPI_PREDICTOR_NONE, &fmt_type); /* Set format_type for metadata line. */ inputfifo_curr_fmt_type = fmt_type & _HIVE_ISP_FMT_TYPE_MASK; inputfifo_send_line(data, width, s2mi->hblank_cycles, s2mi->marker_cycles, - s2mi->two_ppc, inputfifo_mipi_data_type_regular); + s2mi->two_ppc, inputfifo_mipi_data_type_regular); } void ia_css_inputfifo_end_frame( - unsigned int ch_id) + unsigned int ch_id) { struct inputfifo_instance *s2mi; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h index 15e4b3bff6d33..d32323866fd9e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h @@ -37,82 +37,82 @@ more details. /* Set functions for parameter memory descriptors */ void ia_css_isp_param_set_mem_init( - struct ia_css_isp_param_host_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem, - char *address, size_t size); + struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + char *address, size_t size); void ia_css_isp_param_set_css_mem_init( - struct ia_css_isp_param_css_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem, - hrt_vaddress address, size_t size); + struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + hrt_vaddress address, size_t size); void ia_css_isp_param_set_isp_mem_init( - struct ia_css_isp_param_isp_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem, - u32 address, size_t size); + struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + u32 address, size_t size); /* Get functions for parameter memory descriptors */ -const struct ia_css_host_data* +const struct ia_css_host_data * ia_css_isp_param_get_mem_init( - const struct ia_css_isp_param_host_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem); + const struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem); -const struct ia_css_data* +const struct ia_css_data * ia_css_isp_param_get_css_mem_init( - const struct ia_css_isp_param_css_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem); + const struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem); -const struct ia_css_isp_data* +const struct ia_css_isp_data * ia_css_isp_param_get_isp_mem_init( - const struct ia_css_isp_param_isp_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem); + const struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem); /* Initialize the memory interface sizes and addresses */ void ia_css_init_memory_interface( - struct ia_css_isp_param_css_segments *isp_mem_if, - const struct ia_css_isp_param_host_segments *mem_params, - const struct ia_css_isp_param_css_segments *css_params); + struct ia_css_isp_param_css_segments *isp_mem_if, + const struct ia_css_isp_param_host_segments *mem_params, + const struct ia_css_isp_param_css_segments *css_params); /* Allocate memory parameters */ enum ia_css_err ia_css_isp_param_allocate_isp_parameters( - struct ia_css_isp_param_host_segments *mem_params, - struct ia_css_isp_param_css_segments *css_params, - const struct ia_css_isp_param_isp_segments *mem_initializers); + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params, + const struct ia_css_isp_param_isp_segments *mem_initializers); /* Destroy memory parameters */ void ia_css_isp_param_destroy_isp_parameters( - struct ia_css_isp_param_host_segments *mem_params, - struct ia_css_isp_param_css_segments *css_params); + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params); /* Load fw parameters */ void ia_css_isp_param_load_fw_params( - const char *fw, - union ia_css_all_memory_offsets *mem_offsets, - const struct ia_css_isp_param_memory_offsets *memory_offsets, - bool init); + const char *fw, + union ia_css_all_memory_offsets *mem_offsets, + const struct ia_css_isp_param_memory_offsets *memory_offsets, + bool init); /* Copy host parameter images to ddr */ enum ia_css_err ia_css_isp_param_copy_isp_mem_if_to_ddr( - struct ia_css_isp_param_css_segments *ddr, - const struct ia_css_isp_param_host_segments *host, - enum ia_css_param_class pclass); + struct ia_css_isp_param_css_segments *ddr, + const struct ia_css_isp_param_host_segments *host, + enum ia_css_param_class pclass); /* Enable a pipeline by setting the control field in the isp dmem parameters */ void ia_css_isp_param_enable_pipeline( - const struct ia_css_isp_param_host_segments *mem_params); + const struct ia_css_isp_param_host_segments *mem_params); #endif /* _IA_CSS_ISP_PARAM_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c index a0b4387582980..cab82a9698b2a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c @@ -36,10 +36,10 @@ more details. void ia_css_isp_param_set_mem_init( - struct ia_css_isp_param_host_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem, - char *address, size_t size) + struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + char *address, size_t size) { mem_init->params[pclass][mem].address = address; mem_init->params[pclass][mem].size = (uint32_t)size; @@ -47,10 +47,10 @@ ia_css_isp_param_set_mem_init( void ia_css_isp_param_set_css_mem_init( - struct ia_css_isp_param_css_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem, - hrt_vaddress address, size_t size) + struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + hrt_vaddress address, size_t size) { mem_init->params[pclass][mem].address = address; mem_init->params[pclass][mem].size = (uint32_t)size; @@ -58,48 +58,48 @@ ia_css_isp_param_set_css_mem_init( void ia_css_isp_param_set_isp_mem_init( - struct ia_css_isp_param_isp_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem, - u32 address, size_t size) + struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem, + u32 address, size_t size) { mem_init->params[pclass][mem].address = address; mem_init->params[pclass][mem].size = (uint32_t)size; } /* Get functions for parameter memory descriptors */ -const struct ia_css_host_data* +const struct ia_css_host_data * ia_css_isp_param_get_mem_init( - const struct ia_css_isp_param_host_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem) + const struct ia_css_isp_param_host_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem) { return &mem_init->params[pclass][mem]; } -const struct ia_css_data* +const struct ia_css_data * ia_css_isp_param_get_css_mem_init( - const struct ia_css_isp_param_css_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem) + const struct ia_css_isp_param_css_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem) { return &mem_init->params[pclass][mem]; } -const struct ia_css_isp_data* +const struct ia_css_isp_data * ia_css_isp_param_get_isp_mem_init( - const struct ia_css_isp_param_isp_segments *mem_init, - enum ia_css_param_class pclass, - enum ia_css_isp_memories mem) + const struct ia_css_isp_param_isp_segments *mem_init, + enum ia_css_param_class pclass, + enum ia_css_isp_memories mem) { return &mem_init->params[pclass][mem]; } void ia_css_init_memory_interface( - struct ia_css_isp_param_css_segments *isp_mem_if, - const struct ia_css_isp_param_host_segments *mem_params, - const struct ia_css_isp_param_css_segments *css_params) + struct ia_css_isp_param_css_segments *isp_mem_if, + const struct ia_css_isp_param_host_segments *mem_params, + const struct ia_css_isp_param_css_segments *css_params) { unsigned int pclass, mem; @@ -110,22 +110,23 @@ ia_css_init_memory_interface( continue; isp_mem_if->params[pclass][mem].size = mem_params->params[pclass][mem].size; if (pclass != IA_CSS_PARAM_CLASS_PARAM) - isp_mem_if->params[pclass][mem].address = css_params->params[pclass][mem].address; + isp_mem_if->params[pclass][mem].address = + css_params->params[pclass][mem].address; } } } enum ia_css_err ia_css_isp_param_allocate_isp_parameters( - struct ia_css_isp_param_host_segments *mem_params, - struct ia_css_isp_param_css_segments *css_params, - const struct ia_css_isp_param_isp_segments *mem_initializers) -{ + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params, + const struct ia_css_isp_param_isp_segments *mem_initializers) { enum ia_css_err err = IA_CSS_SUCCESS; unsigned int mem, pclass; pclass = IA_CSS_PARAM_CLASS_PARAM; - for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) { + for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) + { for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) { u32 size = 0; @@ -159,8 +160,8 @@ ia_css_isp_param_allocate_isp_parameters( void ia_css_isp_param_destroy_isp_parameters( - struct ia_css_isp_param_host_segments *mem_params, - struct ia_css_isp_param_css_segments *css_params) + struct ia_css_isp_param_host_segments *mem_params, + struct ia_css_isp_param_css_segments *css_params) { unsigned int mem, pclass; @@ -178,10 +179,10 @@ ia_css_isp_param_destroy_isp_parameters( void ia_css_isp_param_load_fw_params( - const char *fw, - union ia_css_all_memory_offsets *mem_offsets, - const struct ia_css_isp_param_memory_offsets *memory_offsets, - bool init) + const char *fw, + union ia_css_all_memory_offsets *mem_offsets, + const struct ia_css_isp_param_memory_offsets *memory_offsets, + bool init) { unsigned int pclass; @@ -194,13 +195,13 @@ ia_css_isp_param_load_fw_params( enum ia_css_err ia_css_isp_param_copy_isp_mem_if_to_ddr( - struct ia_css_isp_param_css_segments *ddr, - const struct ia_css_isp_param_host_segments *host, - enum ia_css_param_class pclass) -{ + struct ia_css_isp_param_css_segments *ddr, + const struct ia_css_isp_param_host_segments *host, + enum ia_css_param_class pclass) { unsigned int mem; - for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { + for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) + { size_t size = host->params[pclass][mem].size; hrt_vaddress ddr_mem_ptr = ddr->params[pclass][mem].address; char *host_mem_ptr = host->params[pclass][mem].address; @@ -216,7 +217,7 @@ ia_css_isp_param_copy_isp_mem_if_to_ddr( void ia_css_isp_param_enable_pipeline( - const struct ia_css_isp_param_host_segments *mem_params) + const struct ia_css_isp_param_host_segments *mem_params) { /* By protocol b0 of the mandatory uint32_t first field of the input parameter is a disable bit*/ @@ -225,5 +226,7 @@ ia_css_isp_param_enable_pipeline( if (mem_params->params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM0].size == 0) return; - *(uint32_t *)&mem_params->params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM0].address[dmem_offset] = 0x0; + *(uint32_t *) + &mem_params->params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM0].address[dmem_offset] + = 0x0; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h index 9207a48856dff..8387dbfb90254 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h @@ -51,7 +51,7 @@ typedef input_system_cfg_t ia_css_isys_descr_t; input_system_error_t ia_css_isys_init(void); void ia_css_isys_uninit(void); enum mipi_port_id ia_css_isys_port_to_mipi_port( - enum mipi_port_id api_port); + enum mipi_port_id api_port); #endif #if defined(USE_INPUT_SYSTEM_VERSION_2401) @@ -68,8 +68,8 @@ enum mipi_port_id ia_css_isys_port_to_mipi_port( * there is already a stream registered with the same handle */ enum ia_css_err ia_css_isys_csi_rx_register_stream( - enum mipi_port_id port, - uint32_t isys_stream_id); + enum mipi_port_id port, + uint32_t isys_stream_id); /** * @brief Unregister one (virtual) stream. This is used to track when all @@ -83,21 +83,21 @@ enum ia_css_err ia_css_isys_csi_rx_register_stream( * there is no stream registered with that handle */ enum ia_css_err ia_css_isys_csi_rx_unregister_stream( - enum mipi_port_id port, - uint32_t isys_stream_id); + enum mipi_port_id port, + uint32_t isys_stream_id); enum ia_css_err ia_css_isys_convert_compressed_format( - struct ia_css_csi2_compression *comp, - struct input_system_cfg_s *cfg); + struct ia_css_csi2_compression *comp, + struct input_system_cfg_s *cfg); unsigned int ia_css_csi2_calculate_input_system_alignment( - enum atomisp_input_format fmt_type); + enum atomisp_input_format fmt_type); #endif #if !defined(USE_INPUT_SYSTEM_VERSION_2401) /* CSS Receiver */ void ia_css_isys_rx_configure( - const rx_cfg_t *config, - const enum ia_css_input_mode input_mode); + const rx_cfg_t *config, + const enum ia_css_input_mode input_mode); void ia_css_isys_rx_disable(void); @@ -124,75 +124,75 @@ unsigned int ia_css_isys_rx_translate_irq_infos(unsigned int bits); * format type must be sumitted correctly by the application. */ enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( - enum atomisp_input_format input_format, - mipi_predictor_t compression, - unsigned int *fmt_type); + enum atomisp_input_format input_format, + mipi_predictor_t compression, + unsigned int *fmt_type); #ifdef USE_INPUT_SYSTEM_VERSION_2401 /** * Virtual Input System. (Input System 2401) */ ia_css_isys_error_t ia_css_isys_stream_create( - ia_css_isys_descr_t *isys_stream_descr, - ia_css_isys_stream_h isys_stream, - uint32_t isys_stream_id); + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_h isys_stream, + uint32_t isys_stream_id); void ia_css_isys_stream_destroy( - ia_css_isys_stream_h isys_stream); + ia_css_isys_stream_h isys_stream); ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( - ia_css_isys_stream_h isys_stream, - ia_css_isys_descr_t *isys_stream_descr, - ia_css_isys_stream_cfg_t *isys_stream_cfg); + ia_css_isys_stream_h isys_stream, + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_cfg_t *isys_stream_cfg); void ia_css_isys_csi_rx_lut_rmgr_init(void); void ia_css_isys_csi_rx_lut_rmgr_uninit(void); bool ia_css_isys_csi_rx_lut_rmgr_acquire( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry); + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); void ia_css_isys_csi_rx_lut_rmgr_release( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry); + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); void ia_css_isys_ibuf_rmgr_init(void); void ia_css_isys_ibuf_rmgr_uninit(void); bool ia_css_isys_ibuf_rmgr_acquire( - u32 size, - uint32_t *start_addr); + u32 size, + uint32_t *start_addr); void ia_css_isys_ibuf_rmgr_release( - uint32_t *start_addr); + uint32_t *start_addr); void ia_css_isys_dma_channel_rmgr_init(void); void ia_css_isys_dma_channel_rmgr_uninit(void); bool ia_css_isys_dma_channel_rmgr_acquire( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel); + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); void ia_css_isys_dma_channel_rmgr_release( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel); + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); void ia_css_isys_stream2mmio_sid_rmgr_init(void); void ia_css_isys_stream2mmio_sid_rmgr_uninit(void); bool ia_css_isys_stream2mmio_sid_rmgr_acquire( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid); + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); void ia_css_isys_stream2mmio_sid_rmgr_release( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid); + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); /* end of Virtual Input System */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h index 71d1b66e954bd..451b0dc6a3a33 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h @@ -59,8 +59,8 @@ typedef virtual_input_system_stream_cfg_t ia_css_isys_stream_cfg_t; typedef bool ia_css_isys_error_t; static inline uint32_t ia_css_isys_generate_stream_id( - u32 sp_thread_id, - uint32_t stream_id) + u32 sp_thread_id, + uint32_t stream_id) { return sp_thread_id * IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH + stream_id; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c index f15c805a51930..06557c16071f4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c @@ -55,9 +55,9 @@ void ia_css_isys_csi_rx_lut_rmgr_uninit(void) } bool ia_css_isys_csi_rx_lut_rmgr_acquire( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry) + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) { bool retval = false; u32 max_num_packets_of_type; @@ -66,7 +66,8 @@ bool ia_css_isys_csi_rx_lut_rmgr_acquire( u16 i; assert(backend < N_CSI_RX_BACKEND_ID); - assert((packet_type == CSI_MIPI_PACKET_TYPE_LONG) || (packet_type == CSI_MIPI_PACKET_TYPE_SHORT)); + assert((packet_type == CSI_MIPI_PACKET_TYPE_LONG) || + (packet_type == CSI_MIPI_PACKET_TYPE_SHORT)); assert(entry); if ((backend < N_CSI_RX_BACKEND_ID) && (entry)) { @@ -104,9 +105,9 @@ bool ia_css_isys_csi_rx_lut_rmgr_acquire( } void ia_css_isys_csi_rx_lut_rmgr_release( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry) + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) { u32 max_num_packets; isys_csi_rx_rsrc_t *cur_rsrc = NULL; @@ -114,7 +115,8 @@ void ia_css_isys_csi_rx_lut_rmgr_release( assert(backend < N_CSI_RX_BACKEND_ID); assert(entry); - assert((packet_type >= CSI_MIPI_PACKET_TYPE_LONG) || (packet_type <= CSI_MIPI_PACKET_TYPE_SHORT)); + assert((packet_type >= CSI_MIPI_PACKET_TYPE_LONG) || + (packet_type <= CSI_MIPI_PACKET_TYPE_SHORT)); if ((backend < N_CSI_RX_BACKEND_ID) && (entry)) { if (packet_type == CSI_MIPI_PACKET_TYPE_LONG) { @@ -141,8 +143,8 @@ void ia_css_isys_csi_rx_lut_rmgr_release( } enum ia_css_err ia_css_isys_csi_rx_register_stream( - enum mipi_port_id port, - uint32_t isys_stream_id) + enum mipi_port_id port, + uint32_t isys_stream_id) { enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; @@ -161,8 +163,8 @@ enum ia_css_err ia_css_isys_csi_rx_register_stream( } enum ia_css_err ia_css_isys_csi_rx_unregister_stream( - enum mipi_port_id port, - uint32_t isys_stream_id) + enum mipi_port_id port, + uint32_t isys_stream_id) { enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c index faa14ed630808..72804774ea23c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c @@ -61,8 +61,8 @@ void ia_css_isys_ibuf_rmgr_uninit(void) } bool ia_css_isys_ibuf_rmgr_acquire( - u32 size, - uint32_t *start_addr) + u32 size, + uint32_t *start_addr) { bool retval = false; bool input_buffer_found = false; @@ -121,7 +121,7 @@ bool ia_css_isys_ibuf_rmgr_acquire( } void ia_css_isys_ibuf_rmgr_release( - uint32_t *start_addr) + uint32_t *start_addr) { u16 i; ibuf_handle_t *handle = NULL; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c index 425b317699f39..8ce21091c81d9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c @@ -51,8 +51,8 @@ void ia_css_isys_dma_channel_rmgr_uninit(void) } bool ia_css_isys_dma_channel_rmgr_acquire( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel) + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) { bool retval = false; isys2401_dma_channel i; @@ -81,8 +81,8 @@ bool ia_css_isys_dma_channel_rmgr_acquire( } void ia_css_isys_dma_channel_rmgr_release( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel) + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) { isys2401_dma_channel max_dma_channel; isys_dma_rsrc_t *cur_rsrc = NULL; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c index 0397f79edfef5..5e7565cdf871b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c @@ -60,41 +60,41 @@ input_system_error_t ia_css_isys_init(void) return error; error = input_system_csi_xmem_channel_cfg( - 0, /*ch_id */ - INPUT_SYSTEM_PORT_A, /*port */ - backend_ch0, /*backend_ch */ - 32, /*mem_region_size */ - 6, /*nof_mem_regions */ - acq_mem_region_size, /*acq_mem_region_size */ - acq_nof_mem_regions, /*acq_nof_mem_regions */ - targetB, /*target */ - 3); /*nof_xmem_buffers */ + 0, /*ch_id */ + INPUT_SYSTEM_PORT_A, /*port */ + backend_ch0, /*backend_ch */ + 32, /*mem_region_size */ + 6, /*nof_mem_regions */ + acq_mem_region_size, /*acq_mem_region_size */ + acq_nof_mem_regions, /*acq_nof_mem_regions */ + targetB, /*target */ + 3); /*nof_xmem_buffers */ if (error != INPUT_SYSTEM_ERR_NO_ERROR) return error; error = input_system_csi_xmem_channel_cfg( - 1, /*ch_id */ - INPUT_SYSTEM_PORT_B, /*port */ - backend_ch0, /*backend_ch */ - 16, /*mem_region_size */ - 3, /*nof_mem_regions */ - acq_mem_region_size, /*acq_mem_region_size */ - acq_nof_mem_regions, /*acq_nof_mem_regions */ - targetB, /*target */ - 3); /*nof_xmem_buffers */ + 1, /*ch_id */ + INPUT_SYSTEM_PORT_B, /*port */ + backend_ch0, /*backend_ch */ + 16, /*mem_region_size */ + 3, /*nof_mem_regions */ + acq_mem_region_size, /*acq_mem_region_size */ + acq_nof_mem_regions, /*acq_nof_mem_regions */ + targetB, /*target */ + 3); /*nof_xmem_buffers */ if (error != INPUT_SYSTEM_ERR_NO_ERROR) return error; error = input_system_csi_xmem_channel_cfg( - 2, /*ch_id */ - INPUT_SYSTEM_PORT_C, /*port */ - backend_ch1, /*backend_ch */ - 32, /*mem_region_size */ - 3, /*nof_mem_regions */ - acq_mem_region_size, /*acq_mem_region_size */ - acq_nof_mem_regions, /*acq_nof_mem_regions */ - targetC, /*target */ - 2); /*nof_xmem_buffers */ + 2, /*ch_id */ + INPUT_SYSTEM_PORT_C, /*port */ + backend_ch1, /*backend_ch */ + 32, /*mem_region_size */ + 3, /*nof_mem_regions */ + acq_mem_region_size, /*acq_mem_region_size */ + acq_nof_mem_regions, /*acq_nof_mem_regions */ + targetC, /*target */ + 2); /*nof_xmem_buffers */ if (error != INPUT_SYSTEM_ERR_NO_ERROR) return error; @@ -111,7 +111,7 @@ input_system_error_t ia_css_isys_init(void) ia_css_isys_stream2mmio_sid_rmgr_init(); isys2401_dma_set_max_burst_size(ISYS2401_DMA0_ID, - 1 /* Non Burst DMA transactions */); + 1 /* Non Burst DMA transactions */); /* Enable 2401 input system IRQ status for driver to retrieve */ isys_irqc_status_enable(ISYS_IRQ0_ID); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c index 3c2345f1156e4..44b9bb84981c5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c @@ -51,8 +51,8 @@ void ia_css_isys_stream2mmio_sid_rmgr_uninit(void) } bool ia_css_isys_stream2mmio_sid_rmgr_acquire( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid) + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) { bool retval = false; stream2mmio_sid_ID_t max_sid; @@ -82,8 +82,8 @@ bool ia_css_isys_stream2mmio_sid_rmgr_acquire( } void ia_css_isys_stream2mmio_sid_rmgr_release( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid) + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) { stream2mmio_sid_ID_t max_sid; isys_stream2mmio_rsrc_t *cur_rsrc = NULL; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c index 12682d3f907c3..cf0a6866e25a1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c @@ -39,27 +39,27 @@ more details. void ia_css_isys_rx_enable_all_interrupts(enum mipi_port_id port) { hrt_data bits = receiver_port_reg_load(RX0_ID, - port, - _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); + port, + _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); bits |= (1U << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT) | #if defined(HAS_RX_VERSION_2) - (1U << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT) | #endif - (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT) | - /*(1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT) | */ - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT) | - (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT); + (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT) | + /*(1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_NO_CORRECTION_BIT) | */ + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT) | + (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT); /*(1U << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT); */ receiver_port_reg_store(RX0_ID, @@ -173,18 +173,20 @@ void ia_css_rx_clear_irq_info(unsigned int irq_infos) ia_css_rx_port_clear_irq_info(MIPI_PORT1_ID, irq_infos); } -void ia_css_rx_port_clear_irq_info(enum mipi_port_id api_port, unsigned int irq_infos) +void ia_css_rx_port_clear_irq_info(enum mipi_port_id api_port, + unsigned int irq_infos) { enum mipi_port_id port = ia_css_isys_port_to_mipi_port(api_port); ia_css_isys_rx_clear_irq_info(port, irq_infos); } -void ia_css_isys_rx_clear_irq_info(enum mipi_port_id port, unsigned int irq_infos) +void ia_css_isys_rx_clear_irq_info(enum mipi_port_id port, + unsigned int irq_infos) { hrt_data bits = receiver_port_reg_load(RX0_ID, - port, - _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); + port, + _HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX); /* MW: Why do we remap the receiver bitmap */ if (irq_infos & IA_CSS_RX_IRQ_INFO_BUFFER_OVERRUN) @@ -231,9 +233,9 @@ void ia_css_isys_rx_clear_irq_info(enum mipi_port_id port, unsigned int irq_info #endif /* #if !defined(USE_INPUT_SYSTEM_VERSION_2401) */ enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( - enum atomisp_input_format input_format, - mipi_predictor_t compression, - unsigned int *fmt_type) + enum atomisp_input_format input_format, + mipi_predictor_t compression, + unsigned int *fmt_type) { assert(fmt_type); /* @@ -376,7 +378,8 @@ enum ia_css_err ia_css_isys_convert_stream_format_to_mipi_format( } #if defined(USE_INPUT_SYSTEM_VERSION_2401) -static mipi_predictor_t sh_css_csi2_compression_type_2_mipi_predictor(enum ia_css_csi2_compression_type type) +static mipi_predictor_t sh_css_csi2_compression_type_2_mipi_predictor( + enum ia_css_csi2_compression_type type) { mipi_predictor_t predictor = MIPI_PREDICTOR_NONE; @@ -393,8 +396,8 @@ static mipi_predictor_t sh_css_csi2_compression_type_2_mipi_predictor(enum ia_cs } enum ia_css_err ia_css_isys_convert_compressed_format( - struct ia_css_csi2_compression *comp, - struct input_system_cfg_s *cfg) + struct ia_css_csi2_compression *comp, + struct input_system_cfg_s *cfg) { enum ia_css_err err = IA_CSS_SUCCESS; @@ -429,7 +432,8 @@ enum ia_css_err ia_css_isys_convert_compressed_format( default: err = IA_CSS_ERR_INVALID_ARGUMENTS; } - } else if (comp->uncompressed_bits_per_pixel == UNCOMPRESSED_BITS_PER_PIXEL_12) { + } else if (comp->uncompressed_bits_per_pixel == + UNCOMPRESSED_BITS_PER_PIXEL_12) { switch (comp->compressed_bits_per_pixel) { case COMPRESSED_BITS_PER_PIXEL_6: cfg->csi_port_attr.comp_scheme = MIPI_COMPRESSOR_12_6_12; @@ -445,7 +449,8 @@ enum ia_css_err ia_css_isys_convert_compressed_format( } } else err = IA_CSS_ERR_INVALID_ARGUMENTS; - cfg->csi_port_attr.comp_predictor = sh_css_csi2_compression_type_2_mipi_predictor(comp->type); + cfg->csi_port_attr.comp_predictor = + sh_css_csi2_compression_type_2_mipi_predictor(comp->type); cfg->csi_port_attr.comp_enable = true; } else /* No compression */ cfg->csi_port_attr.comp_enable = false; @@ -453,7 +458,7 @@ enum ia_css_err ia_css_isys_convert_compressed_format( } unsigned int ia_css_csi2_calculate_input_system_alignment( - enum atomisp_input_format fmt_type) + enum atomisp_input_format fmt_type) { unsigned int memory_alignment_in_bytes = HIVE_ISP_DDR_WORD_BYTES; @@ -500,8 +505,8 @@ void ia_css_isys_rx_configure(const rx_cfg_t *config, enum mipi_port_id port; if ((!config) - || (config->mode >= N_RX_MODE) - || (config->port >= N_MIPI_PORT_ID)) { + || (config->mode >= N_RX_MODE) + || (config->port >= N_MIPI_PORT_ID)) { assert(0); return; } @@ -520,17 +525,17 @@ void ia_css_isys_rx_configure(const rx_cfg_t *config, /* AM: Check whether this is a problem with multiple streams. */ if (MIPI_PORT_LANES[config->mode][port] != MIPI_0LANE_CFG) { receiver_port_reg_store(RX0_ID, port, - _HRT_CSS_RECEIVER_FUNC_PROG_REG_IDX, - config->timeout); + _HRT_CSS_RECEIVER_FUNC_PROG_REG_IDX, + config->timeout); receiver_port_reg_store(RX0_ID, port, - _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX, - config->initcount); + _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX, + config->initcount); receiver_port_reg_store(RX0_ID, port, - _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX, - config->synccount); + _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX, + config->synccount); receiver_port_reg_store(RX0_ID, port, - _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX, - config->rxcount); + _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX, + config->rxcount); port_enabled[port] = true; @@ -538,29 +543,29 @@ void ia_css_isys_rx_configure(const rx_cfg_t *config, /* MW: A bit of a hack, straight wiring of the capture * units,assuming they are linearly enumerated. */ input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX - + (unsigned int)port, - INPUT_SYSTEM_CSI_BACKEND); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX + + (unsigned int)port, + INPUT_SYSTEM_CSI_BACKEND); /* MW: Like the integration test example we overwite, * the GPREG_MUX register */ input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX, - (input_system_multiplex_t)port); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + (input_system_multiplex_t)port); } else { /* * AM: A bit of a hack, wiring the input system. */ input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MULTICAST_A_IDX - + (unsigned int)port, - INPUT_SYSTEM_INPUT_BUFFER); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MULTICAST_A_IDX + + (unsigned int)port, + INPUT_SYSTEM_INPUT_BUFFER); input_system_sub_system_reg_store(INPUT_SYSTEM0_ID, - GPREGS_UNIT0_ID, - HIVE_ISYS_GPREG_MUX_IDX, - INPUT_SYSTEM_ACQUISITION_UNIT); + GPREGS_UNIT0_ID, + HIVE_ISYS_GPREG_MUX_IDX, + INPUT_SYSTEM_ACQUISITION_UNIT); } } /* diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c index c47e14d8bcad0..ceef7d0482327 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c @@ -49,122 +49,122 @@ more details. #endif static bool create_input_system_channel( - input_system_cfg_t *cfg, - bool metadata, - input_system_channel_t *channel); + input_system_cfg_t *cfg, + bool metadata, + input_system_channel_t *channel); static void destroy_input_system_channel( - input_system_channel_t *channel); + input_system_channel_t *channel); static bool create_input_system_input_port( - input_system_cfg_t *cfg, - input_system_input_port_t *input_port); + input_system_cfg_t *cfg, + input_system_input_port_t *input_port); static void destroy_input_system_input_port( - input_system_input_port_t *input_port); + input_system_input_port_t *input_port); static bool calculate_input_system_channel_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - input_system_channel_cfg_t *channel_cfg, - bool metadata); + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_channel_cfg_t *channel_cfg, + bool metadata); static bool calculate_input_system_input_port_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - input_system_input_port_cfg_t *input_port_cfg); + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_input_port_cfg_t *input_port_cfg); static bool acquire_sid( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid); + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); static void release_sid( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid); + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid); static bool acquire_ib_buffer( - s32 bits_per_pixel, - s32 pixels_per_line, - s32 lines_per_frame, - s32 align_in_bytes, - bool online, - ib_buffer_t *buf); + s32 bits_per_pixel, + s32 pixels_per_line, + s32 lines_per_frame, + s32 align_in_bytes, + bool online, + ib_buffer_t *buf); static void release_ib_buffer( - ib_buffer_t *buf); + ib_buffer_t *buf); static bool acquire_dma_channel( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel); + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); static void release_dma_channel( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel); + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel); static bool acquire_be_lut_entry( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry); + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); static void release_be_lut_entry( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry); + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry); static bool calculate_tpg_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - pixelgen_tpg_cfg_t *cfg); + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_tpg_cfg_t *cfg); static bool calculate_prbs_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - pixelgen_prbs_cfg_t *cfg); + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_prbs_cfg_t *cfg); static bool calculate_fe_cfg( - const input_system_cfg_t *isys_cfg, - csi_rx_frontend_cfg_t *cfg); + const input_system_cfg_t *isys_cfg, + csi_rx_frontend_cfg_t *cfg); static bool calculate_be_cfg( - const input_system_input_port_t *input_port, - const input_system_cfg_t *isys_cfg, - bool metadata, - csi_rx_backend_cfg_t *cfg); + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + bool metadata, + csi_rx_backend_cfg_t *cfg); static bool calculate_stream2mmio_cfg( - const input_system_cfg_t *isys_cfg, - bool metadata, - stream2mmio_cfg_t *cfg); + const input_system_cfg_t *isys_cfg, + bool metadata, + stream2mmio_cfg_t *cfg); static bool calculate_ibuf_ctrl_cfg( - const input_system_channel_t *channel, - const input_system_input_port_t *input_port, - const input_system_cfg_t *isys_cfg, - ibuf_ctrl_cfg_t *cfg); + const input_system_channel_t *channel, + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + ibuf_ctrl_cfg_t *cfg); static bool calculate_isys2401_dma_cfg( - const input_system_channel_t *channel, - const input_system_cfg_t *isys_cfg, - isys2401_dma_cfg_t *cfg); + const input_system_channel_t *channel, + const input_system_cfg_t *isys_cfg, + isys2401_dma_cfg_t *cfg); static bool calculate_isys2401_dma_port_cfg( - const input_system_cfg_t *isys_cfg, - bool raw_packed, - bool metadata, - isys2401_dma_port_cfg_t *cfg); + const input_system_cfg_t *isys_cfg, + bool raw_packed, + bool metadata, + isys2401_dma_port_cfg_t *cfg); static csi_mipi_packet_type_t get_csi_mipi_packet_type( - int32_t data_type); + int32_t data_type); static int32_t calculate_stride( - s32 bits_per_pixel, - s32 pixels_per_line, - bool raw_packed, - int32_t align_in_bytes); + s32 bits_per_pixel, + s32 pixels_per_line, + bool raw_packed, + int32_t align_in_bytes); /* end of Forwarded Declaration */ @@ -174,18 +174,18 @@ static int32_t calculate_stride( * **************************************************/ ia_css_isys_error_t ia_css_isys_stream_create( - ia_css_isys_descr_t *isys_stream_descr, - ia_css_isys_stream_h isys_stream, - uint32_t isys_stream_id) + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_h isys_stream, + uint32_t isys_stream_id) { ia_css_isys_error_t rc; if (!isys_stream_descr || !isys_stream || - isys_stream_id >= SH_CSS_MAX_ISYS_CHANNEL_NODES) + isys_stream_id >= SH_CSS_MAX_ISYS_CHANNEL_NODES) return false; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_isys_stream_create() enter:\n"); + "ia_css_isys_stream_create() enter:\n"); /*Reset isys_stream to 0*/ memset(isys_stream, 0, sizeof(*isys_stream)); @@ -193,11 +193,13 @@ ia_css_isys_error_t ia_css_isys_stream_create( isys_stream->id = isys_stream_id; isys_stream->linked_isys_stream_id = isys_stream_descr->linked_isys_stream_id; - rc = create_input_system_input_port(isys_stream_descr, &isys_stream->input_port); + rc = create_input_system_input_port(isys_stream_descr, + &isys_stream->input_port); if (rc == false) return false; - rc = create_input_system_channel(isys_stream_descr, false, &isys_stream->channel); + rc = create_input_system_channel(isys_stream_descr, false, + &isys_stream->channel); if (rc == false) { destroy_input_system_input_port(&isys_stream->input_port); return false; @@ -216,7 +218,8 @@ ia_css_isys_error_t ia_css_isys_stream_create( #endif /* create metadata channel */ if (isys_stream_descr->metadata.enable) { - rc = create_input_system_channel(isys_stream_descr, true, &isys_stream->md_channel); + rc = create_input_system_channel(isys_stream_descr, true, + &isys_stream->md_channel); if (rc == false) { destroy_input_system_input_port(&isys_stream->input_port); destroy_input_system_channel(&isys_stream->channel); @@ -224,13 +227,13 @@ ia_css_isys_error_t ia_css_isys_stream_create( } } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_isys_stream_create() leave:\n"); + "ia_css_isys_stream_create() leave:\n"); return true; } void ia_css_isys_stream_destroy( - ia_css_isys_stream_h isys_stream) + ia_css_isys_stream_h isys_stream) { destroy_input_system_input_port(&isys_stream->input_port); destroy_input_system_channel(&isys_stream->channel); @@ -241,26 +244,26 @@ void ia_css_isys_stream_destroy( } ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( - ia_css_isys_stream_h isys_stream, - ia_css_isys_descr_t *isys_stream_descr, - ia_css_isys_stream_cfg_t *isys_stream_cfg) + ia_css_isys_stream_h isys_stream, + ia_css_isys_descr_t *isys_stream_descr, + ia_css_isys_stream_cfg_t *isys_stream_cfg) { ia_css_isys_error_t rc; if (!isys_stream_cfg || - !isys_stream_descr || - !isys_stream) + !isys_stream_descr || + !isys_stream) return false; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_isys_stream_calculate_cfg() enter:\n"); + "ia_css_isys_stream_calculate_cfg() enter:\n"); rc = calculate_input_system_channel_cfg( - &isys_stream->channel, - &isys_stream->input_port, - isys_stream_descr, - &isys_stream_cfg->channel_cfg, - false); + &isys_stream->channel, + &isys_stream->input_port, + isys_stream_descr, + &isys_stream_cfg->channel_cfg, + false); if (rc == false) return false; @@ -268,27 +271,27 @@ ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( if (isys_stream_descr->metadata.enable) { isys_stream_cfg->enable_metadata = true; rc = calculate_input_system_channel_cfg( - &isys_stream->md_channel, - &isys_stream->input_port, - isys_stream_descr, - &isys_stream_cfg->md_channel_cfg, - true); + &isys_stream->md_channel, + &isys_stream->input_port, + isys_stream_descr, + &isys_stream_cfg->md_channel_cfg, + true); if (rc == false) return false; } rc = calculate_input_system_input_port_cfg( - &isys_stream->channel, - &isys_stream->input_port, - isys_stream_descr, - &isys_stream_cfg->input_port_cfg); + &isys_stream->channel, + &isys_stream->input_port, + isys_stream_descr, + &isys_stream_cfg->input_port_cfg); if (rc == false) return false; isys_stream->valid = 1; isys_stream_cfg->valid = 1; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_isys_stream_calculate_cfg() leave:\n"); + "ia_css_isys_stream_calculate_cfg() leave:\n"); return rc; } @@ -300,9 +303,9 @@ ia_css_isys_error_t ia_css_isys_stream_calculate_cfg( * **************************************************/ static bool create_input_system_channel( - input_system_cfg_t *cfg, - bool metadata, - input_system_channel_t *me) + input_system_cfg_t *cfg, + bool metadata, + input_system_channel_t *me) { bool rc = true; @@ -339,12 +342,16 @@ static bool create_input_system_channel( } if (!acquire_ib_buffer( - metadata ? cfg->metadata.bits_per_pixel : cfg->input_port_resolution.bits_per_pixel, - metadata ? cfg->metadata.pixels_per_line : cfg->input_port_resolution.pixels_per_line, - metadata ? cfg->metadata.lines_per_frame : cfg->input_port_resolution.lines_per_frame, - metadata ? cfg->metadata.align_req_in_bytes : cfg->input_port_resolution.align_req_in_bytes, - cfg->online, - &me->ib_buffer)) { + metadata ? cfg->metadata.bits_per_pixel : + cfg->input_port_resolution.bits_per_pixel, + metadata ? cfg->metadata.pixels_per_line : + cfg->input_port_resolution.pixels_per_line, + metadata ? cfg->metadata.lines_per_frame : + cfg->input_port_resolution.lines_per_frame, + metadata ? cfg->metadata.align_req_in_bytes : + cfg->input_port_resolution.align_req_in_bytes, + cfg->online, + &me->ib_buffer)) { release_sid(me->stream2mmio_id, &me->stream2mmio_sid_id); return false; } @@ -359,10 +366,10 @@ static bool create_input_system_channel( } static void destroy_input_system_channel( - input_system_channel_t *me) + input_system_channel_t *me) { release_sid(me->stream2mmio_id, - &me->stream2mmio_sid_id); + &me->stream2mmio_sid_id); release_ib_buffer(&me->ib_buffer); @@ -370,8 +377,8 @@ static void destroy_input_system_channel( } static bool create_input_system_input_port( - input_system_cfg_t *cfg, - input_system_input_port_t *me) + input_system_cfg_t *cfg, + input_system_input_port_t *me) { csi_mipi_packet_type_t packet_type; bool rc = true; @@ -385,9 +392,9 @@ static bool create_input_system_input_port( me->csi_rx.packet_type = packet_type; rc = acquire_be_lut_entry( - me->csi_rx.backend_id, - packet_type, - &me->csi_rx.backend_lut_entry); + me->csi_rx.backend_id, + packet_type, + &me->csi_rx.backend_lut_entry); break; case INPUT_SYSTEM_PIXELGEN_PORT0_ID: me->pixelgen.pixelgen_id = PIXELGEN0_ID; @@ -400,9 +407,9 @@ static bool create_input_system_input_port( me->csi_rx.packet_type = packet_type; rc = acquire_be_lut_entry( - me->csi_rx.backend_id, - packet_type, - &me->csi_rx.backend_lut_entry); + me->csi_rx.backend_id, + packet_type, + &me->csi_rx.backend_lut_entry); break; case INPUT_SYSTEM_PIXELGEN_PORT1_ID: me->pixelgen.pixelgen_id = PIXELGEN1_ID; @@ -416,9 +423,9 @@ static bool create_input_system_input_port( me->csi_rx.packet_type = packet_type; rc = acquire_be_lut_entry( - me->csi_rx.backend_id, - packet_type, - &me->csi_rx.backend_lut_entry); + me->csi_rx.backend_id, + packet_type, + &me->csi_rx.backend_lut_entry); break; case INPUT_SYSTEM_PIXELGEN_PORT2_ID: me->pixelgen.pixelgen_id = PIXELGEN2_ID; @@ -434,79 +441,80 @@ static bool create_input_system_input_port( me->metadata.packet_type = CSI_MIPI_PACKET_TYPE_UNDEFINED; if (rc && cfg->metadata.enable) { me->metadata.packet_type = get_csi_mipi_packet_type( - cfg->metadata.fmt_type); + cfg->metadata.fmt_type); rc = acquire_be_lut_entry( - me->csi_rx.backend_id, - me->metadata.packet_type, - &me->metadata.backend_lut_entry); + me->csi_rx.backend_id, + me->metadata.packet_type, + &me->metadata.backend_lut_entry); } return rc; } static void destroy_input_system_input_port( - input_system_input_port_t *me) + input_system_input_port_t *me) { if (me->source_type == INPUT_SYSTEM_SOURCE_TYPE_SENSOR) { release_be_lut_entry( - me->csi_rx.backend_id, - me->csi_rx.packet_type, - &me->csi_rx.backend_lut_entry); + me->csi_rx.backend_id, + me->csi_rx.packet_type, + &me->csi_rx.backend_lut_entry); } if (me->metadata.packet_type != CSI_MIPI_PACKET_TYPE_UNDEFINED) { /*Free the backend lut allocated for metadata*/ release_be_lut_entry( - me->csi_rx.backend_id, - me->metadata.packet_type, - &me->metadata.backend_lut_entry); + me->csi_rx.backend_id, + me->metadata.packet_type, + &me->metadata.backend_lut_entry); } } static bool calculate_input_system_channel_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - input_system_channel_cfg_t *channel_cfg, - bool metadata) + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_channel_cfg_t *channel_cfg, + bool metadata) { bool rc; rc = calculate_stream2mmio_cfg(isys_cfg, metadata, - &channel_cfg->stream2mmio_cfg); + &channel_cfg->stream2mmio_cfg); if (!rc) return false; rc = calculate_ibuf_ctrl_cfg( - channel, - input_port, - isys_cfg, - &channel_cfg->ibuf_ctrl_cfg); + channel, + input_port, + isys_cfg, + &channel_cfg->ibuf_ctrl_cfg); if (!rc) return false; if (metadata) - channel_cfg->ibuf_ctrl_cfg.stores_per_frame = isys_cfg->metadata.lines_per_frame; + channel_cfg->ibuf_ctrl_cfg.stores_per_frame = + isys_cfg->metadata.lines_per_frame; rc = calculate_isys2401_dma_cfg( - channel, - isys_cfg, - &channel_cfg->dma_cfg); + channel, + isys_cfg, + &channel_cfg->dma_cfg); if (!rc) return false; rc = calculate_isys2401_dma_port_cfg( - isys_cfg, - false, - metadata, - &channel_cfg->dma_src_port_cfg); + isys_cfg, + false, + metadata, + &channel_cfg->dma_src_port_cfg); if (!rc) return false; rc = calculate_isys2401_dma_port_cfg( - isys_cfg, - isys_cfg->raw_packed, - metadata, - &channel_cfg->dma_dest_port_cfg); + isys_cfg, + isys_cfg->raw_packed, + metadata, + &channel_cfg->dma_dest_port_cfg); if (!rc) return false; @@ -514,42 +522,42 @@ static bool calculate_input_system_channel_cfg( } static bool calculate_input_system_input_port_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - input_system_input_port_cfg_t *input_port_cfg) + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + input_system_input_port_cfg_t *input_port_cfg) { bool rc; switch (input_port->source_type) { case INPUT_SYSTEM_SOURCE_TYPE_SENSOR: rc = calculate_fe_cfg( - isys_cfg, - &input_port_cfg->csi_rx_cfg.frontend_cfg); + isys_cfg, + &input_port_cfg->csi_rx_cfg.frontend_cfg); rc &= calculate_be_cfg( - input_port, - isys_cfg, - false, - &input_port_cfg->csi_rx_cfg.backend_cfg); + input_port, + isys_cfg, + false, + &input_port_cfg->csi_rx_cfg.backend_cfg); if (rc && isys_cfg->metadata.enable) rc &= calculate_be_cfg(input_port, isys_cfg, true, - &input_port_cfg->csi_rx_cfg.md_backend_cfg); + &input_port_cfg->csi_rx_cfg.md_backend_cfg); break; case INPUT_SYSTEM_SOURCE_TYPE_TPG: rc = calculate_tpg_cfg( - channel, - input_port, - isys_cfg, - &input_port_cfg->pixelgen_cfg.tpg_cfg); + channel, + input_port, + isys_cfg, + &input_port_cfg->pixelgen_cfg.tpg_cfg); break; case INPUT_SYSTEM_SOURCE_TYPE_PRBS: rc = calculate_prbs_cfg( - channel, - input_port, - isys_cfg, - &input_port_cfg->pixelgen_cfg.prbs_cfg); + channel, + input_port, + isys_cfg, + &input_port_cfg->pixelgen_cfg.prbs_cfg); break; default: rc = false; @@ -560,25 +568,25 @@ static bool calculate_input_system_input_port_cfg( } static bool acquire_sid( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid) + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) { return ia_css_isys_stream2mmio_sid_rmgr_acquire(stream2mmio, sid); } static void release_sid( - stream2mmio_ID_t stream2mmio, - stream2mmio_sid_ID_t *sid) + stream2mmio_ID_t stream2mmio, + stream2mmio_sid_ID_t *sid) { ia_css_isys_stream2mmio_sid_rmgr_release(stream2mmio, sid); } /* See also: ia_css_dma_configure_from_info() */ static int32_t calculate_stride( - s32 bits_per_pixel, - s32 pixels_per_line, - bool raw_packed, - int32_t align_in_bytes) + s32 bits_per_pixel, + s32 pixels_per_line, + bool raw_packed, + int32_t align_in_bytes) { s32 bytes_per_line; s32 pixels_per_word; @@ -598,152 +606,157 @@ static int32_t calculate_stride( } static bool acquire_ib_buffer( - s32 bits_per_pixel, - s32 pixels_per_line, - s32 lines_per_frame, - s32 align_in_bytes, - bool online, - ib_buffer_t *buf) + s32 bits_per_pixel, + s32 pixels_per_line, + s32 lines_per_frame, + s32 align_in_bytes, + bool online, + ib_buffer_t *buf) { - buf->stride = calculate_stride(bits_per_pixel, pixels_per_line, false, align_in_bytes); + buf->stride = calculate_stride(bits_per_pixel, pixels_per_line, false, + align_in_bytes); if (online) buf->lines = 4; /* use double buffering for online usecases */ else buf->lines = 2; (void)(lines_per_frame); - return ia_css_isys_ibuf_rmgr_acquire(buf->stride * buf->lines, &buf->start_addr); + return ia_css_isys_ibuf_rmgr_acquire(buf->stride * buf->lines, + &buf->start_addr); } static void release_ib_buffer( - ib_buffer_t *buf) + ib_buffer_t *buf) { ia_css_isys_ibuf_rmgr_release(&buf->start_addr); } static bool acquire_dma_channel( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel) + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) { return ia_css_isys_dma_channel_rmgr_acquire(dma_id, channel); } static void release_dma_channel( - isys2401_dma_ID_t dma_id, - isys2401_dma_channel *channel) + isys2401_dma_ID_t dma_id, + isys2401_dma_channel *channel) { ia_css_isys_dma_channel_rmgr_release(dma_id, channel); } static bool acquire_be_lut_entry( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry) + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) { return ia_css_isys_csi_rx_lut_rmgr_acquire(backend, packet_type, entry); } static void release_be_lut_entry( - csi_rx_backend_ID_t backend, - csi_mipi_packet_type_t packet_type, - csi_rx_backend_lut_entry_t *entry) + csi_rx_backend_ID_t backend, + csi_mipi_packet_type_t packet_type, + csi_rx_backend_lut_entry_t *entry) { ia_css_isys_csi_rx_lut_rmgr_release(backend, packet_type, entry); } static bool calculate_tpg_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - pixelgen_tpg_cfg_t *cfg) + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_tpg_cfg_t *cfg) { (void)channel; (void)input_port; memcpy_s( - (void *)cfg, - sizeof(pixelgen_tpg_cfg_t), - (void *)(&isys_cfg->tpg_port_attr), - sizeof(pixelgen_tpg_cfg_t)); + (void *)cfg, + sizeof(pixelgen_tpg_cfg_t), + (void *)(&isys_cfg->tpg_port_attr), + sizeof(pixelgen_tpg_cfg_t)); return true; } static bool calculate_prbs_cfg( - input_system_channel_t *channel, - input_system_input_port_t *input_port, - input_system_cfg_t *isys_cfg, - pixelgen_prbs_cfg_t *cfg) + input_system_channel_t *channel, + input_system_input_port_t *input_port, + input_system_cfg_t *isys_cfg, + pixelgen_prbs_cfg_t *cfg) { (void)channel; (void)input_port; memcpy_s( - (void *)cfg, - sizeof(pixelgen_prbs_cfg_t), - (void *)(&isys_cfg->prbs_port_attr), - sizeof(pixelgen_prbs_cfg_t)); + (void *)cfg, + sizeof(pixelgen_prbs_cfg_t), + (void *)(&isys_cfg->prbs_port_attr), + sizeof(pixelgen_prbs_cfg_t)); return true; } static bool calculate_fe_cfg( - const input_system_cfg_t *isys_cfg, - csi_rx_frontend_cfg_t *cfg) + const input_system_cfg_t *isys_cfg, + csi_rx_frontend_cfg_t *cfg) { cfg->active_lanes = isys_cfg->csi_port_attr.active_lanes; return true; } static bool calculate_be_cfg( - const input_system_input_port_t *input_port, - const input_system_cfg_t *isys_cfg, - bool metadata, - csi_rx_backend_cfg_t *cfg) + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + bool metadata, + csi_rx_backend_cfg_t *cfg) { memcpy_s( - (void *)(&cfg->lut_entry), - sizeof(csi_rx_backend_lut_entry_t), - metadata ? (void *)(&input_port->metadata.backend_lut_entry) : - (void *)(&input_port->csi_rx.backend_lut_entry), - sizeof(csi_rx_backend_lut_entry_t)); + (void *)(&cfg->lut_entry), + sizeof(csi_rx_backend_lut_entry_t), + metadata ? (void *)(&input_port->metadata.backend_lut_entry) : + (void *)(&input_port->csi_rx.backend_lut_entry), + sizeof(csi_rx_backend_lut_entry_t)); cfg->csi_mipi_cfg.virtual_channel = isys_cfg->csi_port_attr.ch_id; if (metadata) { - cfg->csi_mipi_packet_type = get_csi_mipi_packet_type(isys_cfg->metadata.fmt_type); + cfg->csi_mipi_packet_type = get_csi_mipi_packet_type( + isys_cfg->metadata.fmt_type); cfg->csi_mipi_cfg.comp_enable = false; cfg->csi_mipi_cfg.data_type = isys_cfg->metadata.fmt_type; } else { - cfg->csi_mipi_packet_type = get_csi_mipi_packet_type(isys_cfg->csi_port_attr.fmt_type); + cfg->csi_mipi_packet_type = get_csi_mipi_packet_type( + isys_cfg->csi_port_attr.fmt_type); cfg->csi_mipi_cfg.data_type = isys_cfg->csi_port_attr.fmt_type; cfg->csi_mipi_cfg.comp_enable = isys_cfg->csi_port_attr.comp_enable; cfg->csi_mipi_cfg.comp_scheme = isys_cfg->csi_port_attr.comp_scheme; cfg->csi_mipi_cfg.comp_predictor = isys_cfg->csi_port_attr.comp_predictor; - cfg->csi_mipi_cfg.comp_bit_idx = cfg->csi_mipi_cfg.data_type - MIPI_FORMAT_CUSTOM0; + cfg->csi_mipi_cfg.comp_bit_idx = cfg->csi_mipi_cfg.data_type - + MIPI_FORMAT_CUSTOM0; } return true; } static bool calculate_stream2mmio_cfg( - const input_system_cfg_t *isys_cfg, - bool metadata, - stream2mmio_cfg_t *cfg + const input_system_cfg_t *isys_cfg, + bool metadata, + stream2mmio_cfg_t *cfg ) { cfg->bits_per_pixel = metadata ? isys_cfg->metadata.bits_per_pixel : - isys_cfg->input_port_resolution.bits_per_pixel; + isys_cfg->input_port_resolution.bits_per_pixel; cfg->enable_blocking = - ((isys_cfg->mode == INPUT_SYSTEM_SOURCE_TYPE_TPG) || - (isys_cfg->mode == INPUT_SYSTEM_SOURCE_TYPE_PRBS)); + ((isys_cfg->mode == INPUT_SYSTEM_SOURCE_TYPE_TPG) || + (isys_cfg->mode == INPUT_SYSTEM_SOURCE_TYPE_PRBS)); return true; } static bool calculate_ibuf_ctrl_cfg( - const input_system_channel_t *channel, - const input_system_input_port_t *input_port, - const input_system_cfg_t *isys_cfg, - ibuf_ctrl_cfg_t *cfg) + const input_system_channel_t *channel, + const input_system_input_port_t *input_port, + const input_system_cfg_t *isys_cfg, + ibuf_ctrl_cfg_t *cfg) { const s32 bits_per_byte = 8; s32 bits_per_pixel; @@ -756,7 +769,7 @@ static bool calculate_ibuf_ctrl_cfg( bytes_per_pixel = ceil_div(bits_per_pixel, bits_per_byte); left_padding = CEIL_MUL(isys_cfg->output_port_attr.left_padding, ISP_VEC_NELEMS) - * bytes_per_pixel; + * bytes_per_pixel; cfg->online = isys_cfg->online; @@ -772,9 +785,9 @@ static bool calculate_ibuf_ctrl_cfg( cfg->ib_buffer.lines = channel->ib_buffer.lines; /* -#ifndef ISP2401 + #ifndef ISP2401 * zhengjie.lu@intel.com: -#endif + #endif * "dest_buf_cfg" should be part of the input system output * port configuration. * @@ -788,21 +801,21 @@ static bool calculate_ibuf_ctrl_cfg( if (cfg->online) { cfg->dest_buf_cfg.start_addr = ISP_INPUT_BUF_START_ADDR + left_padding; cfg->dest_buf_cfg.stride = bytes_per_pixel - * isys_cfg->output_port_attr.max_isp_input_width; + * isys_cfg->output_port_attr.max_isp_input_width; cfg->dest_buf_cfg.lines = LINES_OF_ISP_INPUT_BUF; } else if (isys_cfg->raw_packed) { cfg->dest_buf_cfg.stride = calculate_stride(bits_per_pixel, - isys_cfg->input_port_resolution.pixels_per_line, - isys_cfg->raw_packed, - isys_cfg->input_port_resolution.align_req_in_bytes); + isys_cfg->input_port_resolution.pixels_per_line, + isys_cfg->raw_packed, + isys_cfg->input_port_resolution.align_req_in_bytes); } else { cfg->dest_buf_cfg.stride = channel->ib_buffer.stride; } /* -#ifndef ISP2401 + #ifndef ISP2401 * zhengjie.lu@intel.com: -#endif + #endif * "items_per_store" is hard coded as "1", which is ONLY valid * when the CSI-MIPI long packet is transferred. * @@ -823,9 +836,9 @@ static bool calculate_ibuf_ctrl_cfg( } static bool calculate_isys2401_dma_cfg( - const input_system_channel_t *channel, - const input_system_cfg_t *isys_cfg, - isys2401_dma_cfg_t *cfg) + const input_system_channel_t *channel, + const input_system_cfg_t *isys_cfg, + isys2401_dma_cfg_t *cfg) { cfg->channel = channel->dma_channel; @@ -844,10 +857,10 @@ static bool calculate_isys2401_dma_cfg( /* See also: ia_css_dma_configure_from_info() */ static bool calculate_isys2401_dma_port_cfg( - const input_system_cfg_t *isys_cfg, - bool raw_packed, - bool metadata, - isys2401_dma_port_cfg_t *cfg) + const input_system_cfg_t *isys_cfg, + bool raw_packed, + bool metadata, + isys2401_dma_port_cfg_t *cfg) { s32 bits_per_pixel; s32 pixels_per_line; @@ -864,7 +877,8 @@ static bool calculate_isys2401_dma_port_cfg( align_req_in_bytes = isys_cfg->input_port_resolution.align_req_in_bytes; } - cfg->stride = calculate_stride(bits_per_pixel, pixels_per_line, raw_packed, align_req_in_bytes); + cfg->stride = calculate_stride(bits_per_pixel, pixels_per_line, raw_packed, + align_req_in_bytes); if (!raw_packed) bits_per_pixel = CEIL_MUL(bits_per_pixel, 8); @@ -877,7 +891,7 @@ static bool calculate_isys2401_dma_port_cfg( } static csi_mipi_packet_type_t get_csi_mipi_packet_type( - int32_t data_type) + int32_t data_type) { csi_mipi_packet_type_t packet_type; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h index 1f10eaedc0515..3ad5e6227b27e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h @@ -117,10 +117,10 @@ void ia_css_pipeline_init(void); * externally and needs sane defaults */ enum ia_css_err ia_css_pipeline_create( - struct ia_css_pipeline *pipeline, - enum ia_css_pipe_id pipe_id, - unsigned int pipe_num, - unsigned int dvs_frame_delay); + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay); /* @brief destroy a pipeline * @@ -176,9 +176,9 @@ void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline); * arguments. */ enum ia_css_err ia_css_pipeline_create_and_add_stage( - struct ia_css_pipeline *pipeline, - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_pipeline_stage **stage); + struct ia_css_pipeline *pipeline, + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **stage); /* @brief Finalize the stages in a pipeline * @@ -188,7 +188,7 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( * This API is expected to be called after adding all stages */ void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, - bool continuous); + bool continuous); /* @brief gets a stage from the pipeline * @@ -197,8 +197,8 @@ void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, * */ enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, - int mode, - struct ia_css_pipeline_stage **stage); + int mode, + struct ia_css_pipeline_stage **stage); /* @brief Gets a pipeline stage corresponding Firmware handle from the pipeline * @@ -209,9 +209,10 @@ enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, * @return IA_CSS_SUCCESS or error code upon error. * */ -enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeline, - u32 fw_handle, - struct ia_css_pipeline_stage **stage); +enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline + *pipeline, + u32 fw_handle, + struct ia_css_pipeline_stage **stage); /* @brief Gets the Firmware handle corresponding the stage num from the pipeline * @@ -222,9 +223,10 @@ enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeli * @return IA_CSS_SUCCESS or error code upon error. * */ -enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeline, - u32 stage_num, - uint32_t *fw_handle); +enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline + *pipeline, + u32 stage_num, + uint32_t *fw_handle); /* @brief gets the output stage from the pipeline * @@ -233,9 +235,9 @@ enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeli * */ enum ia_css_err ia_css_pipeline_get_output_stage( - struct ia_css_pipeline *pipeline, - int mode, - struct ia_css_pipeline_stage **stage); + struct ia_css_pipeline *pipeline, + int mode, + struct ia_css_pipeline_stage **stage); /* @brief Checks whether the pipeline uses params * diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c index 3d36be4795e73..08386add94e01 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c @@ -55,15 +55,15 @@ static void pipeline_init_sp_thread_map(void); static void pipeline_map_num_to_sp_thread(unsigned int pipe_num); static void pipeline_unmap_num_to_sp_thread(unsigned int pipe_num); static void pipeline_init_defaults( - struct ia_css_pipeline *pipeline, - enum ia_css_pipe_id pipe_id, - unsigned int pipe_num, - unsigned int dvs_frame_delay); + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay); static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage); static enum ia_css_err pipeline_stage_create( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_pipeline_stage **new_stage); + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **new_stage); static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline); static void ia_css_pipeline_configure_inout_port(struct ia_css_pipeline *me, bool continuous); @@ -77,14 +77,14 @@ void ia_css_pipeline_init(void) } enum ia_css_err ia_css_pipeline_create( - struct ia_css_pipeline *pipeline, - enum ia_css_pipe_id pipe_id, - unsigned int pipe_num, - unsigned int dvs_frame_delay) + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay) { assert(pipeline); IA_CSS_ENTER_PRIVATE("pipeline = %p, pipe_id = %d, pipe_num = %d, dvs_frame_delay = %d", - pipeline, pipe_id, pipe_num, dvs_frame_delay); + pipeline, pipe_id, pipe_num, dvs_frame_delay); if (!pipeline) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -147,8 +147,8 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, assert(pipeline); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_start() enter: pipe_id=%d, pipeline=%p\n", - pipe_id, pipeline); + "ia_css_pipeline_start() enter: pipe_id=%d, pipeline=%p\n", + pipe_id, pipeline); pipeline->pipe_id = pipe_id; sh_css_sp_init_pipeline(pipeline, pipe_id, pipe_num, false, false, false, true, SH_CSS_BDS_FACTOR_1_00, @@ -166,14 +166,14 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, #endif #endif #ifndef ISP2401 - ); + ); #else NULL, NULL); #endif ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); if (!sh_css_sp_is_running()) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_start() error,leaving\n"); + "ia_css_pipeline_start() error,leaving\n"); /* queues are invalid*/ return; } @@ -183,7 +183,7 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, 0); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_start() leave: return_void\n"); + "ia_css_pipeline_start() leave: return_void\n"); } /* @@ -215,10 +215,10 @@ void ia_css_pipeline_dump_thread_map_info(void) unsigned int i; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "pipeline_num_to_sp_thread_map:\n"); + "pipeline_num_to_sp_thread_map:\n"); for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "pipe_num: %u, tid: 0x%x\n", i, pipeline_num_to_sp_thread_map[i]); + "pipe_num: %u, tid: 0x%x\n", i, pipeline_num_to_sp_thread_map[i]); } } @@ -233,18 +233,17 @@ enum ia_css_err ia_css_pipeline_request_stop(struct ia_css_pipeline *pipeline) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_request_stop() enter: pipeline=%p\n", - pipeline); + "ia_css_pipeline_request_stop() enter: pipeline=%p\n", + pipeline); pipeline->stop_requested = true; /* Send stop event to the sp*/ /* This needs improvement, stop on all the pipes available * in the stream*/ ia_css_pipeline_get_sp_thread_id(pipeline->pipe_num, &thread_id); - if (!sh_css_sp_is_running()) - { + if (!sh_css_sp_is_running()) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_request_stop() leaving\n"); + "ia_css_pipeline_request_stop() leaving\n"); /* queues are invalid */ return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -255,8 +254,8 @@ enum ia_css_err ia_css_pipeline_request_stop(struct ia_css_pipeline *pipeline) sh_css_sp_uninit_pipeline(pipeline->pipe_num); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_request_stop() leave: return_err=%d\n", - err); + "ia_css_pipeline_request_stop() leave: return_err=%d\n", + err); return err; } @@ -280,7 +279,8 @@ void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline) pipeline_stage_destroy(s); s = next; } - pipeline_init_defaults(pipeline, pipeline->pipe_id, pipeline->pipe_num, pipeline->dvs_frame_delay); + pipeline_init_defaults(pipeline, pipeline->pipe_id, pipeline->pipe_num, + pipeline->dvs_frame_delay); IA_CSS_LEAVE_PRIVATE("void"); } @@ -297,9 +297,9 @@ void ia_css_pipeline_clean(struct ia_css_pipeline *pipeline) * output arguments. */ enum ia_css_err ia_css_pipeline_create_and_add_stage( - struct ia_css_pipeline *pipeline, - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_pipeline_stage **stage) + struct ia_css_pipeline *pipeline, + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **stage) { struct ia_css_pipeline_stage *last, *new_stage = NULL; enum ia_css_err err; @@ -310,11 +310,11 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( last = pipeline->stages; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_create_and_add_stage() enter:\n"); + "ia_css_pipeline_create_and_add_stage() enter:\n"); if (!stage_desc->binary && !stage_desc->firmware && (stage_desc->sp_func == IA_CSS_PIPELINE_NO_FUNC)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_create_and_add_stage() done: Invalid args\n"); + "ia_css_pipeline_create_and_add_stage() done: Invalid args\n"); return IA_CSS_ERR_INTERNAL_ERROR; } @@ -327,9 +327,9 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( * stage, if no previous stage, it's an error. */ if ((stage_desc->sp_func == IA_CSS_PIPELINE_NO_FUNC) - && (!stage_desc->in_frame) - && (!stage_desc->firmware) - && (!stage_desc->binary->online)) { + && (!stage_desc->in_frame) + && (!stage_desc->firmware) + && (!stage_desc->binary->online)) { /* Do this only for ISP stages*/ if (last && last->args.out_frame[0]) stage_desc->in_frame = last->args.out_frame[0]; @@ -342,7 +342,7 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( err = pipeline_stage_create(stage_desc, &new_stage); if (err != IA_CSS_SUCCESS) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_create_and_add_stage() done: stage_create_failed\n"); + "ia_css_pipeline_create_and_add_stage() done: stage_create_failed\n"); return err; } @@ -356,12 +356,12 @@ enum ia_css_err ia_css_pipeline_create_and_add_stage( *stage = new_stage; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_create_and_add_stage() done:\n"); + "ia_css_pipeline_create_and_add_stage() done:\n"); return IA_CSS_SUCCESS; } void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, - bool continuous) + bool continuous) { unsigned int i = 0; struct ia_css_pipeline_stage *stage; @@ -378,15 +378,15 @@ void ia_css_pipeline_finalize_stages(struct ia_css_pipeline *pipeline, } enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, - int mode, - struct ia_css_pipeline_stage **stage) + int mode, + struct ia_css_pipeline_stage **stage) { struct ia_css_pipeline_stage *s; assert(pipeline); assert(stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_get_stage() enter:\n"); + "ia_css_pipeline_get_stage() enter:\n"); for (s = pipeline->stages; s; s = s->next) { if (s->mode == mode) { *stage = s; @@ -396,9 +396,10 @@ enum ia_css_err ia_css_pipeline_get_stage(struct ia_css_pipeline *pipeline, return IA_CSS_ERR_INTERNAL_ERROR; } -enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeline, - u32 fw_handle, - struct ia_css_pipeline_stage **stage) +enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline + *pipeline, + u32 fw_handle, + struct ia_css_pipeline_stage **stage) { struct ia_css_pipeline_stage *s; @@ -414,9 +415,10 @@ enum ia_css_err ia_css_pipeline_get_stage_from_fw(struct ia_css_pipeline *pipeli return IA_CSS_ERR_INTERNAL_ERROR; } -enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeline, - u32 stage_num, - uint32_t *fw_handle) +enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline + *pipeline, + u32 stage_num, + uint32_t *fw_handle) { struct ia_css_pipeline_stage *s; @@ -434,16 +436,16 @@ enum ia_css_err ia_css_pipeline_get_fw_from_stage(struct ia_css_pipeline *pipeli } enum ia_css_err ia_css_pipeline_get_output_stage( - struct ia_css_pipeline *pipeline, - int mode, - struct ia_css_pipeline_stage **stage) + struct ia_css_pipeline *pipeline, + int mode, + struct ia_css_pipeline_stage **stage) { struct ia_css_pipeline_stage *s; assert(pipeline); assert(stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_get_output_stage() enter:\n"); + "ia_css_pipeline_get_output_stage() enter:\n"); *stage = NULL; /* First find acceleration firmware at end of pipe */ @@ -499,7 +501,8 @@ bool ia_css_pipeline_is_mapped(unsigned int key) return false; } - ret = (bool)(pipeline_num_to_sp_thread_map[key] != (unsigned int)PIPELINE_NUM_UNMAPPED); + ret = (bool)(pipeline_num_to_sp_thread_map[key] != (unsigned int) + PIPELINE_NUM_UNMAPPED); IA_CSS_LEAVE_PRIVATE("return = %d", ret); return ret; @@ -556,7 +559,7 @@ static void pipeline_map_num_to_sp_thread(unsigned int pipe_num) /* pipe is not mapped to any thread */ assert(pipeline_num_to_sp_thread_map[pipe_num] - == (unsigned int)PIPELINE_NUM_UNMAPPED); + == (unsigned int)PIPELINE_NUM_UNMAPPED); for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) { if (pipeline_sp_thread_list[i] == @@ -583,7 +586,7 @@ static void pipeline_unmap_num_to_sp_thread(unsigned int pipe_num) unsigned int thread_id; assert(pipeline_num_to_sp_thread_map[pipe_num] - != (unsigned int)PIPELINE_NUM_UNMAPPED); + != (unsigned int)PIPELINE_NUM_UNMAPPED); thread_id = pipeline_num_to_sp_thread_map[pipe_num]; pipeline_num_to_sp_thread_map[pipe_num] = PIPELINE_NUM_UNMAPPED; @@ -591,8 +594,8 @@ static void pipeline_unmap_num_to_sp_thread(unsigned int pipe_num) } static enum ia_css_err pipeline_stage_create( - struct ia_css_pipeline_stage_desc *stage_desc, - struct ia_css_pipeline_stage **new_stage) + struct ia_css_pipeline_stage_desc *stage_desc, + struct ia_css_pipeline_stage **new_stage) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_pipeline_stage *stage = NULL; @@ -648,9 +651,9 @@ static enum ia_css_err pipeline_stage_create( for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { if (!(out_frame[i]) && (binary) - && (binary->out_frame_info[i].res.width)) { + && (binary->out_frame_info[i].res.width)) { err = ia_css_frame_allocate_from_info(&out_frame[i], - &binary->out_frame_info[i]); + &binary->out_frame_info[i]); if (err != IA_CSS_SUCCESS) goto ERR; stage->out_frame_allocated[i] = true; @@ -662,15 +665,15 @@ static enum ia_css_err pipeline_stage_create( if (!vf_frame) { if ((binary && binary->vf_frame_info.res.width) || (firmware && firmware->info.isp.sp.enable.vf_veceven) - ) { + ) { err = ia_css_frame_allocate_from_info(&vf_frame, - &binary->vf_frame_info); + &binary->vf_frame_info); if (err != IA_CSS_SUCCESS) goto ERR; stage->vf_frame_allocated = true; } } else if (vf_frame && binary && binary->vf_frame_info.res.width - && !firmware) { + && !firmware) { /* only mark as allocated if buffer pointer available */ if (vf_frame->data != mmgr_NULL) stage->vf_frame_allocated = true; @@ -689,10 +692,10 @@ static enum ia_css_err pipeline_stage_create( } static void pipeline_init_defaults( - struct ia_css_pipeline *pipeline, - enum ia_css_pipe_id pipe_id, - unsigned int pipe_num, - unsigned int dvs_frame_delay) + struct ia_css_pipeline *pipeline, + enum ia_css_pipe_id pipe_id, + unsigned int pipe_num, + unsigned int dvs_frame_delay) { unsigned int i; @@ -724,7 +727,8 @@ static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline) stage->enable_zoom = true; } else if (pipeline->pipe_id == IA_CSS_PIPE_ID_CAPTURE) { /* in capture pipeline, capture_pp stage should do zoom */ - err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, &stage); + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, + &stage); if (err == IA_CSS_SUCCESS) stage->enable_zoom = true; } else if (pipeline->pipe_id == IA_CSS_PIPE_ID_VIDEO) { @@ -734,74 +738,76 @@ static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline) stage->enable_zoom = true; } else if (pipeline->pipe_id == IA_CSS_PIPE_ID_YUVPP) { /* in yuvpp pipeline, first yuv_scaler stage should do zoom */ - err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, &stage); + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, + &stage); if (err == IA_CSS_SUCCESS) stage->enable_zoom = true; } } static void -ia_css_pipeline_configure_inout_port(struct ia_css_pipeline *me, bool continuous) +ia_css_pipeline_configure_inout_port(struct ia_css_pipeline *me, + bool continuous) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipeline_configure_inout_port() enter: pipe_id(%d) continuous(%d)\n", - me->pipe_id, continuous); + "ia_css_pipeline_configure_inout_port() enter: pipe_id(%d) continuous(%d)\n", + me->pipe_id, continuous); switch (me->pipe_id) { - case IA_CSS_PIPE_ID_PREVIEW: - case IA_CSS_PIPE_ID_VIDEO: - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_INPUT, - (uint8_t)(continuous ? SH_CSS_COPYSINK_TYPE : SH_CSS_HOST_TYPE), 1); - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); - break; - case IA_CSS_PIPE_ID_COPY: /*Copy pipe ports configured to "offline" mode*/ - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_INPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); - if (continuous) { - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_COPYSINK_TYPE, 1); - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_TAGGERSINK_TYPE, 1); - } else { - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); - } - break; - case IA_CSS_PIPE_ID_CAPTURE: - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_INPUT, - (uint8_t)(continuous ? SH_CSS_TAGGERSINK_TYPE : SH_CSS_HOST_TYPE), - 1); + case IA_CSS_PIPE_ID_PREVIEW: + case IA_CSS_PIPE_ID_VIDEO: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)(continuous ? SH_CSS_COPYSINK_TYPE : SH_CSS_HOST_TYPE), 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + case IA_CSS_PIPE_ID_COPY: /*Copy pipe ports configured to "offline" mode*/ + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + if (continuous) { SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); - break; - case IA_CSS_PIPE_ID_YUVPP: - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_INPUT, - (uint8_t)(SH_CSS_HOST_TYPE), 1); - SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); - break; - case IA_CSS_PIPE_ID_ACC: + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_COPYSINK_TYPE, 1); SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_INPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_TAGGERSINK_TYPE, 1); + } else { SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); - break; - default: - break; + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + } + break; + case IA_CSS_PIPE_ID_CAPTURE: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)(continuous ? SH_CSS_TAGGERSINK_TYPE : SH_CSS_HOST_TYPE), + 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + case IA_CSS_PIPE_ID_YUVPP: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)(SH_CSS_HOST_TYPE), 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + case IA_CSS_PIPE_ID_ACC: + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + SH_CSS_PIPE_PORT_CONFIG_SET(me->inout_port_config, + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); + break; + default: + break; } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipeline_configure_inout_port() leave: inout_port_config(%x)\n", - me->inout_port_config); + "ia_css_pipeline_configure_inout_port() leave: inout_port_config(%x)\n", + me->inout_port_config); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h index 9eb46411ac8b9..d1ef2179e7295 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h @@ -60,8 +60,8 @@ typedef struct ia_css_queue ia_css_queue_t; * */ int ia_css_queue_local_init( - ia_css_queue_t *qhandle, - ia_css_queue_local_t *desc); + ia_css_queue_t *qhandle, + ia_css_queue_local_t *desc); /* @brief Initialize a remote queue instance * @@ -71,8 +71,8 @@ int ia_css_queue_local_init( * @return EINVAL - Invalid argument. */ int ia_css_queue_remote_init( - ia_css_queue_t *qhandle, - ia_css_queue_remote_t *desc); + ia_css_queue_t *qhandle, + ia_css_queue_remote_t *desc); /* @brief Uninitialize a queue instance * @@ -81,7 +81,7 @@ int ia_css_queue_remote_init( * */ int ia_css_queue_uninit( - ia_css_queue_t *qhandle); + ia_css_queue_t *qhandle); /* @brief Enqueue an item in the queue instance * @@ -93,8 +93,8 @@ int ia_css_queue_uninit( * */ int ia_css_queue_enqueue( - ia_css_queue_t *qhandle, - uint32_t item); + ia_css_queue_t *qhandle, + uint32_t item); /* @brief Dequeue an item from the queue instance * @@ -107,8 +107,8 @@ int ia_css_queue_enqueue( * */ int ia_css_queue_dequeue( - ia_css_queue_t *qhandle, - uint32_t *item); + ia_css_queue_t *qhandle, + uint32_t *item); /* @brief Check if the queue is empty * @@ -120,8 +120,8 @@ int ia_css_queue_dequeue( * */ int ia_css_queue_is_empty( - ia_css_queue_t *qhandle, - bool *is_empty); + ia_css_queue_t *qhandle, + bool *is_empty); /* @brief Check if the queue is full * @@ -133,8 +133,8 @@ int ia_css_queue_is_empty( * */ int ia_css_queue_is_full( - ia_css_queue_t *qhandle, - bool *is_full); + ia_css_queue_t *qhandle, + bool *is_full); /* @brief Get used space in the queue * @@ -145,8 +145,8 @@ int ia_css_queue_is_full( * */ int ia_css_queue_get_used_space( - ia_css_queue_t *qhandle, - uint32_t *size); + ia_css_queue_t *qhandle, + uint32_t *size); /* @brief Get free space in the queue * @@ -157,8 +157,8 @@ int ia_css_queue_get_used_space( * */ int ia_css_queue_get_free_space( - ia_css_queue_t *qhandle, - uint32_t *size); + ia_css_queue_t *qhandle, + uint32_t *size); /* @brief Peek at an element in the queue * @@ -171,9 +171,9 @@ int ia_css_queue_get_free_space( * */ int ia_css_queue_peek( - ia_css_queue_t *qhandle, - u32 offset, - uint32_t *element); + ia_css_queue_t *qhandle, + u32 offset, + uint32_t *element); /* @brief Get the usable size for the queue * @@ -185,7 +185,7 @@ int ia_css_queue_peek( * */ int ia_css_queue_get_size( - ia_css_queue_t *qhandle, - uint32_t *size); + ia_css_queue_t *qhandle, + uint32_t *size); #endif /* __IA_CSS_QUEUE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c index d8746e7f6a686..dd79c6f180af5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c @@ -22,11 +22,11 @@ * Queue Public APIs *****************************************************************************/ int ia_css_queue_local_init( - ia_css_queue_t *qhandle, - ia_css_queue_local_t *desc) + ia_css_queue_t *qhandle, + ia_css_queue_local_t *desc) { if (NULL == qhandle || NULL == desc - || NULL == desc->cb_elems || NULL == desc->cb_desc) { + || NULL == desc->cb_elems || NULL == desc->cb_desc) { /* Invalid parameters, return error*/ return EINVAL; } @@ -36,15 +36,15 @@ int ia_css_queue_local_init( /* Create a local circular buffer queue*/ ia_css_circbuf_create(&qhandle->desc.cb_local, - desc->cb_elems, - desc->cb_desc); + desc->cb_elems, + desc->cb_desc); return 0; } int ia_css_queue_remote_init( - ia_css_queue_t *qhandle, - ia_css_queue_remote_t *desc) + ia_css_queue_t *qhandle, + ia_css_queue_remote_t *desc) { if (NULL == qhandle || NULL == desc) { /* Invalid parameters, return error*/ @@ -69,7 +69,7 @@ int ia_css_queue_remote_init( } int ia_css_queue_uninit( - ia_css_queue_t *qhandle) + ia_css_queue_t *qhandle) { if (!qhandle) return EINVAL; @@ -84,8 +84,8 @@ int ia_css_queue_uninit( } int ia_css_queue_enqueue( - ia_css_queue_t *qhandle, - uint32_t item) + ia_css_queue_t *qhandle, + uint32_t item) { int error = 0; @@ -143,8 +143,8 @@ int ia_css_queue_enqueue( } int ia_css_queue_dequeue( - ia_css_queue_t *qhandle, - uint32_t *item) + ia_css_queue_t *qhandle, + uint32_t *item) { int error = 0; @@ -200,8 +200,8 @@ int ia_css_queue_dequeue( } int ia_css_queue_is_full( - ia_css_queue_t *qhandle, - bool *is_full) + ia_css_queue_t *qhandle, + bool *is_full) { int error = 0; @@ -234,8 +234,8 @@ int ia_css_queue_is_full( } int ia_css_queue_get_free_space( - ia_css_queue_t *qhandle, - uint32_t *size) + ia_css_queue_t *qhandle, + uint32_t *size) { int error = 0; @@ -268,8 +268,8 @@ int ia_css_queue_get_free_space( } int ia_css_queue_get_used_space( - ia_css_queue_t *qhandle, - uint32_t *size) + ia_css_queue_t *qhandle, + uint32_t *size) { int error = 0; @@ -302,9 +302,9 @@ int ia_css_queue_get_used_space( } int ia_css_queue_peek( - ia_css_queue_t *qhandle, - u32 offset, - uint32_t *element) + ia_css_queue_t *qhandle, + u32 offset, + uint32_t *element) { u32 num_elems = 0; int error = 0; @@ -354,8 +354,8 @@ int ia_css_queue_peek( } int ia_css_queue_is_empty( - ia_css_queue_t *qhandle, - bool *is_empty) + ia_css_queue_t *qhandle, + bool *is_empty) { int error = 0; @@ -388,8 +388,8 @@ int ia_css_queue_is_empty( } int ia_css_queue_get_size( - ia_css_queue_t *qhandle, - uint32_t *size) + ia_css_queue_t *qhandle, + uint32_t *size) { int error = 0; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c index d9243184c112b..3b2a06655e99b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c @@ -36,9 +36,9 @@ more details. #include "assert_support.h" int ia_css_queue_load( - struct ia_css_queue *rdesc, - ia_css_circbuf_desc_t *cb_desc, - uint32_t ignore_desc_flags) + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags) { if (!rdesc || !cb_desc) return EINVAL; @@ -48,8 +48,8 @@ int ia_css_queue_load( if (0 == (ignore_desc_flags & QUEUE_IGNORE_SIZE_FLAG)) { cb_desc->size = sp_dmem_load_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, size)); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, size)); if (cb_desc->size == 0) { /* Adding back the workaround which was removed @@ -64,24 +64,24 @@ int ia_css_queue_load( if (0 == (ignore_desc_flags & QUEUE_IGNORE_START_FLAG)) cb_desc->start = sp_dmem_load_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, start)); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, start)); if (0 == (ignore_desc_flags & QUEUE_IGNORE_END_FLAG)) cb_desc->end = sp_dmem_load_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, end)); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, end)); if (0 == (ignore_desc_flags & QUEUE_IGNORE_STEP_FLAG)) cb_desc->step = sp_dmem_load_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, step)); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, step)); } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { /* doing DMA transfer of entire structure */ mmgr_load(rdesc->desc.remote.cb_desc_addr, - (void *)cb_desc, - sizeof(ia_css_circbuf_desc_t)); + (void *)cb_desc, + sizeof(ia_css_circbuf_desc_t)); } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { /* Not supported yet */ return ENOTSUP; @@ -91,9 +91,9 @@ int ia_css_queue_load( } int ia_css_queue_store( - struct ia_css_queue *rdesc, - ia_css_circbuf_desc_t *cb_desc, - uint32_t ignore_desc_flags) + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags) { if (!rdesc || !cb_desc) return EINVAL; @@ -103,32 +103,32 @@ int ia_css_queue_store( if (0 == (ignore_desc_flags & QUEUE_IGNORE_SIZE_FLAG)) sp_dmem_store_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, size), - cb_desc->size); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, size), + cb_desc->size); if (0 == (ignore_desc_flags & QUEUE_IGNORE_START_FLAG)) sp_dmem_store_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, start), - cb_desc->start); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, start), + cb_desc->start); if (0 == (ignore_desc_flags & QUEUE_IGNORE_END_FLAG)) sp_dmem_store_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, end), - cb_desc->end); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, end), + cb_desc->end); if (0 == (ignore_desc_flags & QUEUE_IGNORE_STEP_FLAG)) sp_dmem_store_uint8(rdesc->proc_id, - rdesc->desc.remote.cb_desc_addr - + offsetof(ia_css_circbuf_desc_t, step), - cb_desc->step); + rdesc->desc.remote.cb_desc_addr + + offsetof(ia_css_circbuf_desc_t, step), + cb_desc->step); } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { /* doing DMA transfer of entire structure */ mmgr_store(rdesc->desc.remote.cb_desc_addr, - (void *)cb_desc, - sizeof(ia_css_circbuf_desc_t)); + (void *)cb_desc, + sizeof(ia_css_circbuf_desc_t)); } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { /* Not supported yet */ return ENOTSUP; @@ -138,24 +138,24 @@ int ia_css_queue_store( } int ia_css_queue_item_load( - struct ia_css_queue *rdesc, - u8 position, - ia_css_circbuf_elem_t *item) + struct ia_css_queue *rdesc, + u8 position, + ia_css_circbuf_elem_t *item) { if (!rdesc || !item) return EINVAL; if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { sp_dmem_load(rdesc->proc_id, - rdesc->desc.remote.cb_elems_addr - + position * sizeof(ia_css_circbuf_elem_t), - item, - sizeof(ia_css_circbuf_elem_t)); + rdesc->desc.remote.cb_elems_addr + + position * sizeof(ia_css_circbuf_elem_t), + item, + sizeof(ia_css_circbuf_elem_t)); } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { mmgr_load(rdesc->desc.remote.cb_elems_addr - + position * sizeof(ia_css_circbuf_elem_t), - (void *)item, - sizeof(ia_css_circbuf_elem_t)); + + position * sizeof(ia_css_circbuf_elem_t), + (void *)item, + sizeof(ia_css_circbuf_elem_t)); } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { /* Not supported yet */ return ENOTSUP; @@ -165,24 +165,24 @@ int ia_css_queue_item_load( } int ia_css_queue_item_store( - struct ia_css_queue *rdesc, - u8 position, - ia_css_circbuf_elem_t *item) + struct ia_css_queue *rdesc, + u8 position, + ia_css_circbuf_elem_t *item) { if (!rdesc || !item) return EINVAL; if (rdesc->location == IA_CSS_QUEUE_LOC_SP) { sp_dmem_store(rdesc->proc_id, - rdesc->desc.remote.cb_elems_addr - + position * sizeof(ia_css_circbuf_elem_t), - item, - sizeof(ia_css_circbuf_elem_t)); + rdesc->desc.remote.cb_elems_addr + + position * sizeof(ia_css_circbuf_elem_t), + item, + sizeof(ia_css_circbuf_elem_t)); } else if (rdesc->location == IA_CSS_QUEUE_LOC_HOST) { mmgr_store(rdesc->desc.remote.cb_elems_addr - + position * sizeof(ia_css_circbuf_elem_t), - (void *)item, - sizeof(ia_css_circbuf_elem_t)); + + position * sizeof(ia_css_circbuf_elem_t), + (void *)item, + sizeof(ia_css_circbuf_elem_t)); } else if (rdesc->location == IA_CSS_QUEUE_LOC_ISP) { /* Not supported yet */ return ENOTSUP; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h index 3438288474bdc..6922b741a1165 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h @@ -79,23 +79,23 @@ struct ia_css_queue { }; int ia_css_queue_load( - struct ia_css_queue *rdesc, - ia_css_circbuf_desc_t *cb_desc, - uint32_t ignore_desc_flags); + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags); int ia_css_queue_store( - struct ia_css_queue *rdesc, - ia_css_circbuf_desc_t *cb_desc, - uint32_t ignore_desc_flags); + struct ia_css_queue *rdesc, + ia_css_circbuf_desc_t *cb_desc, + uint32_t ignore_desc_flags); int ia_css_queue_item_load( - struct ia_css_queue *rdesc, - u8 position, - ia_css_circbuf_elem_t *item); + struct ia_css_queue *rdesc, + u8 position, + ia_css_circbuf_elem_t *item); int ia_css_queue_item_store( - struct ia_css_queue *rdesc, - u8 position, - ia_css_circbuf_elem_t *item); + struct ia_css_queue *rdesc, + u8 position, + ia_css_circbuf_elem_t *item); #endif /* __QUEUE_ACCESS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h index b81acc80d861e..0046c6d49a872 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h @@ -68,7 +68,7 @@ extern struct ia_css_rmgr_vbuf_pool *hmm_buffer_pool; * @param pool The pointer to the pool */ STORAGE_CLASS_RMGR_H enum ia_css_err ia_css_rmgr_init_vbuf( - struct ia_css_rmgr_vbuf_pool *pool); + struct ia_css_rmgr_vbuf_pool *pool); /** * @brief Uninitialize the resource pool (host, vbuf) @@ -76,7 +76,7 @@ STORAGE_CLASS_RMGR_H enum ia_css_err ia_css_rmgr_init_vbuf( * @param pool The pointer to the pool */ STORAGE_CLASS_RMGR_H void ia_css_rmgr_uninit_vbuf( - struct ia_css_rmgr_vbuf_pool *pool); + struct ia_css_rmgr_vbuf_pool *pool); /** * @brief Acquire a handle from the pool (host, vbuf) @@ -85,8 +85,8 @@ STORAGE_CLASS_RMGR_H void ia_css_rmgr_uninit_vbuf( * @param handle The pointer to the handle */ STORAGE_CLASS_RMGR_H void ia_css_rmgr_acq_vbuf( - struct ia_css_rmgr_vbuf_pool *pool, - struct ia_css_rmgr_vbuf_handle **handle); + struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle); /** * @brief Release a handle to the pool (host, vbuf) @@ -95,8 +95,8 @@ STORAGE_CLASS_RMGR_H void ia_css_rmgr_acq_vbuf( * @param handle The pointer to the handle */ STORAGE_CLASS_RMGR_H void ia_css_rmgr_rel_vbuf( - struct ia_css_rmgr_vbuf_pool *pool, - struct ia_css_rmgr_vbuf_handle **handle); + struct ia_css_rmgr_vbuf_pool *pool, + struct ia_css_rmgr_vbuf_handle **handle); /** * @brief Retain the reference count for a handle (host, vbuf) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c index d49f50b619312..2c204dceb4915 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c @@ -101,7 +101,7 @@ void ia_css_rmgr_refcount_retain_vbuf(struct ia_css_rmgr_vbuf_handle **handle) */ if (!*handle) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "ia_css_i_host_refcount_retain_vbuf() failed to find empty slot!\n"); + "ia_css_i_host_refcount_retain_vbuf() failed to find empty slot!\n"); return; } (*handle)->vptr = h->vptr; @@ -176,7 +176,8 @@ void ia_css_rmgr_uninit_vbuf(struct ia_css_rmgr_vbuf_pool *pool) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_rmgr_uninit_vbuf()\n"); if (!pool) { - ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "ia_css_rmgr_uninit_vbuf(): NULL argument\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_rmgr_uninit_vbuf(): NULL argument\n"); return; } if (pool->handles) { @@ -184,14 +185,14 @@ void ia_css_rmgr_uninit_vbuf(struct ia_css_rmgr_vbuf_pool *pool) for (i = 0; i < pool->size; i++) { if (pool->handles[i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - " freeing/releasing %x (count=%d)\n", - pool->handles[i]->vptr, - pool->handles[i]->count); + " freeing/releasing %x (count=%d)\n", + pool->handles[i]->vptr, + pool->handles[i]->count); /* free memory */ hmm_free(pool->handles[i]->vptr); /* remove from refcount admin */ ia_css_rmgr_refcount_release_vbuf( - &pool->handles[i]); + &pool->handles[i]); } } /* now free the pool handles list */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h index 39b82c4685e72..64a517148ff9f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h @@ -55,7 +55,7 @@ hrt_vaddress get_sp_code_addr(sp_ID_t sp_id); /* ! Load firmware on to specfied SP */ enum ia_css_err ia_css_spctrl_load_fw(sp_ID_t sp_id, - ia_css_spctrl_cfg *spctrl_cfg); + ia_css_spctrl_cfg *spctrl_cfg); #ifdef ISP2401 /*! Setup registers for reloading FW */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/src/spctrl.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/src/spctrl.c index 6166619c24325..c4093945973c4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/src/spctrl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/src/spctrl.c @@ -52,7 +52,7 @@ static bool spctrl_loaded[N_SP_ID] = {0}; /* Load firmware */ enum ia_css_err ia_css_spctrl_load_fw(sp_ID_t sp_id, - ia_css_spctrl_cfg *spctrl_cfg) + ia_css_spctrl_cfg *spctrl_cfg) { hrt_vaddress code_addr = mmgr_NULL; struct ia_css_sp_init_dmem_cfg *init_dmem_cfg; @@ -69,8 +69,10 @@ enum ia_css_err ia_css_spctrl_load_fw(sp_ID_t sp_id, init_dmem_cfg->bss_size = spctrl_cfg->bss_size; init_dmem_cfg->sp_id = sp_id; - spctrl_cofig_info[sp_id].spctrl_config_dmem_addr = spctrl_cfg->spctrl_config_dmem_addr; - spctrl_cofig_info[sp_id].spctrl_state_dmem_addr = spctrl_cfg->spctrl_state_dmem_addr; + spctrl_cofig_info[sp_id].spctrl_config_dmem_addr = + spctrl_cfg->spctrl_config_dmem_addr; + spctrl_cofig_info[sp_id].spctrl_state_dmem_addr = + spctrl_cfg->spctrl_state_dmem_addr; /* store code (text + icache) and data to DDR * @@ -106,7 +108,8 @@ enum ia_css_err ia_css_spctrl_load_fw(sp_ID_t sp_id, /* now we program the base address into the icache and * invalidate the cache. */ - sp_ctrl_store(sp_id, SP_ICACHE_ADDR_REG, (hrt_data)spctrl_cofig_info[sp_id].code_addr); + sp_ctrl_store(sp_id, SP_ICACHE_ADDR_REG, + (hrt_data)spctrl_cofig_info[sp_id].code_addr); sp_ctrl_setbit(sp_id, SP_ICACHE_INV_REG, SP_ICACHE_INV_BIT); spctrl_loaded[sp_id] = true; return IA_CSS_SUCCESS; @@ -119,7 +122,8 @@ void sh_css_spctrl_reload_fw(sp_ID_t sp_id) /* now we program the base address into the icache and * invalidate the cache. */ - sp_ctrl_store(sp_id, SP_ICACHE_ADDR_REG, (hrt_data)spctrl_cofig_info[sp_id].code_addr); + sp_ctrl_store(sp_id, SP_ICACHE_ADDR_REG, + (hrt_data)spctrl_cofig_info[sp_id].code_addr); sp_ctrl_setbit(sp_id, SP_ICACHE_INV_REG, SP_ICACHE_INV_BIT); spctrl_loaded[sp_id] = true; } @@ -157,11 +161,12 @@ enum ia_css_err ia_css_spctrl_start(sp_ID_t sp_id) assert(sizeof(unsigned int) <= sizeof(hrt_data)); sp_dmem_store(sp_id, - spctrl_cofig_info[sp_id].spctrl_config_dmem_addr, - &spctrl_cofig_info[sp_id].dmem_config, - sizeof(spctrl_cofig_info[sp_id].dmem_config)); + spctrl_cofig_info[sp_id].spctrl_config_dmem_addr, + &spctrl_cofig_info[sp_id].dmem_config, + sizeof(spctrl_cofig_info[sp_id].dmem_config)); /* set the start address */ - sp_ctrl_store(sp_id, SP_START_ADDR_REG, (hrt_data)spctrl_cofig_info[sp_id].sp_entry); + sp_ctrl_store(sp_id, SP_START_ADDR_REG, + (hrt_data)spctrl_cofig_info[sp_id].sp_entry); sp_ctrl_setbit(sp_id, SP_SC_REG, SP_RUN_BIT); sp_ctrl_setbit(sp_id, SP_SC_REG, SP_START_BIT); return IA_CSS_SUCCESS; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c index c1d63e5a26566..fe1e53085cbee 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c @@ -36,9 +36,10 @@ more details. enum ia_css_err ia_css_timer_get_current_tick( - struct ia_css_clock_tick *curr_ts) { + struct ia_css_clock_tick *curr_ts) { assert(curr_ts); - if (!curr_ts) { + if (!curr_ts) + { return IA_CSS_ERR_INVALID_ARGUMENTS; } curr_ts->ticks = (clock_value_t)gp_timer_read(GP_TIMER_SEL); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index e094d1c3ea4dc..91251faa9b49a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -130,13 +130,16 @@ enum ia_sh_css_modes { the stream seed contains all the data required to "grow" the seed again after it was closed. */ struct sh_css_stream_seed { - struct ia_css_stream **orig_stream; /* pointer to restore the original handle */ + struct ia_css_stream + **orig_stream; /* pointer to restore the original handle */ struct ia_css_stream *stream; /* handle, used as ID too.*/ struct ia_css_stream_config stream_config; /* stream config struct */ int num_pipes; struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; /* pipe handles */ - struct ia_css_pipe **orig_pipes[IA_CSS_PIPE_ID_NUM]; /* pointer to restore original handle */ - struct ia_css_pipe_config pipe_config[IA_CSS_PIPE_ID_NUM]; /* pipe config structs */ + struct ia_css_pipe + **orig_pipes[IA_CSS_PIPE_ID_NUM]; /* pointer to restore original handle */ + struct ia_css_pipe_config + pipe_config[IA_CSS_PIPE_ID_NUM]; /* pipe config structs */ }; #define MAX_ACTIVE_STREAMS 5 @@ -220,7 +223,8 @@ static bool sh_css_pipes_have_stopped(struct ia_css_stream *stream); static enum ia_css_err -ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format format); +ia_css_pipe_check_format(struct ia_css_pipe *pipe, + enum ia_css_frame_format format); static enum ia_css_err check_pipe_resolutions(const struct ia_css_pipe *pipe); @@ -229,18 +233,19 @@ check_pipe_resolutions(const struct ia_css_pipe *pipe); static enum ia_css_err ia_css_pipe_load_extension(struct ia_css_pipe *pipe, - struct ia_css_fw_info *firmware); + struct ia_css_fw_info *firmware); static void ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, - struct ia_css_fw_info *firmware); + struct ia_css_fw_info *firmware); static void ia_css_reset_defaults(struct sh_css *css); static void sh_css_init_host_sp_control_vars(void); -static enum ia_css_err set_num_primary_stages(unsigned int *num, enum ia_css_pipe_version version); +static enum ia_css_err set_num_primary_stages(unsigned int *num, + enum ia_css_pipe_version version); static bool need_capture_pp(const struct ia_css_pipe *pipe); @@ -249,16 +254,17 @@ static bool need_yuv_scaler_stage(const struct ia_css_pipe *pipe); static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( - struct ia_css_frame_info *cas_scaler_in_info, - struct ia_css_frame_info *cas_scaler_out_info, - struct ia_css_frame_info *cas_scaler_vf_info, - struct ia_css_cas_binary_descr *descr); + struct ia_css_frame_info *cas_scaler_in_info, + struct ia_css_frame_info *cas_scaler_out_info, + struct ia_css_frame_info *cas_scaler_vf_info, + struct ia_css_cas_binary_descr *descr); -static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr *descr); +static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr + *descr); static bool need_downscaling(const struct ia_css_resolution in_res, - const struct ia_css_resolution out_res); + const struct ia_css_resolution out_res); static bool need_capt_ldc(const struct ia_css_pipe *pipe); @@ -267,9 +273,9 @@ sh_css_pipe_load_binaries(struct ia_css_pipe *pipe); static enum ia_css_err sh_css_pipe_get_viewfinder_frame_info( - struct ia_css_pipe *pipe, - struct ia_css_frame_info *info, - unsigned int idx); + struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx); static enum ia_css_err sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, @@ -292,15 +298,15 @@ static bool copy_on_sp(struct ia_css_pipe *pipe); static enum ia_css_err init_vf_frameinfo_defaults(struct ia_css_pipe *pipe, - struct ia_css_frame *vf_frame, unsigned int idx); + struct ia_css_frame *vf_frame, unsigned int idx); static enum ia_css_err init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, - struct ia_css_frame *frame, enum ia_css_frame_format format); + struct ia_css_frame *frame, enum ia_css_frame_format format); static enum ia_css_err init_out_frameinfo_defaults(struct ia_css_pipe *pipe, - struct ia_css_frame *out_frame, unsigned int idx); + struct ia_css_frame *out_frame, unsigned int idx); static enum ia_css_err sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, @@ -308,13 +314,14 @@ sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, static enum ia_css_err alloc_continuous_frames( - struct ia_css_pipe *pipe, bool init_time); + struct ia_css_pipe *pipe, bool init_time); static void pipe_global_init(void); static enum ia_css_err -pipe_generate_pipe_num(const struct ia_css_pipe *pipe, unsigned int *pipe_number); +pipe_generate_pipe_num(const struct ia_css_pipe *pipe, + unsigned int *pipe_number); static void pipe_release_pipe_num(unsigned int pipe_num); @@ -333,8 +340,8 @@ create_host_video_pipeline(struct ia_css_pipe *pipe); static enum ia_css_err create_host_copy_pipeline(struct ia_css_pipe *pipe, - unsigned int max_input_width, - struct ia_css_frame *out_frame); + unsigned int max_input_width, + struct ia_css_frame *out_frame); static enum ia_css_err create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe); @@ -351,7 +358,8 @@ create_host_acc_pipeline(struct ia_css_pipe *pipe); static unsigned int sh_css_get_sw_interrupt_value(unsigned int irq); -static struct ia_css_binary *ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe); +static struct ia_css_binary *ia_css_pipe_get_shading_correction_binary( + const struct ia_css_pipe *pipe); static struct ia_css_binary * ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe); @@ -370,42 +378,45 @@ sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record); static struct sh_css_hmm_buffer_record *sh_css_hmm_buffer_record_acquire(struct ia_css_rmgr_vbuf_handle *h_vbuf, - enum ia_css_buffer_type type, - hrt_address kernel_ptr); + enum ia_css_buffer_type type, + hrt_address kernel_ptr); static struct sh_css_hmm_buffer_record *sh_css_hmm_buffer_record_validate(hrt_vaddress ddr_buffer_addr, - enum ia_css_buffer_type type); + enum ia_css_buffer_type type); void ia_css_get_acc_configs( - struct ia_css_pipe *pipe, - struct ia_css_isp_config *config); + struct ia_css_pipe *pipe, + struct ia_css_isp_config *config); #if CONFIG_ON_FRAME_ENQUEUE() -static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info *info, struct frame_data_wrapper *frame); +static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info + *info, struct frame_data_wrapper *frame); #endif #ifdef USE_INPUT_SYSTEM_VERSION_2401 -static unsigned int get_crop_lines_for_bayer_order(const struct ia_css_stream_config *config); -static unsigned int get_crop_columns_for_bayer_order(const struct ia_css_stream_config *config); +static unsigned int get_crop_lines_for_bayer_order(const struct + ia_css_stream_config *config); +static unsigned int get_crop_columns_for_bayer_order(const struct + ia_css_stream_config *config); static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, - unsigned int *extra_row, unsigned int *extra_column); + unsigned int *extra_row, unsigned int *extra_column); #endif #ifdef ISP2401 #ifdef USE_INPUT_SYSTEM_VERSION_2401 static enum ia_css_err aspect_ratio_crop_init(struct ia_css_stream *curr_stream, - struct ia_css_pipe *pipes[], - bool *do_crop_status); + struct ia_css_pipe *pipes[], + bool *do_crop_status); static bool aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe); static enum ia_css_err aspect_ratio_crop(struct ia_css_pipe *curr_pipe, - struct ia_css_resolution *effective_res); + struct ia_css_resolution *effective_res); #endif #endif @@ -452,15 +463,15 @@ static enum ia_css_frame_format yuv422_copy_formats[] = { * by the copy binary given the stream format. * */ static enum ia_css_err -verify_copy_out_frame_format(struct ia_css_pipe *pipe) -{ +verify_copy_out_frame_format(struct ia_css_pipe *pipe) { enum ia_css_frame_format out_fmt = pipe->output_info[0].format; unsigned int i, found = 0; assert(pipe); assert(pipe->stream); - switch (pipe->stream->config.input_config.format) { + switch (pipe->stream->config.input_config.format) + { case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: case ATOMISP_INPUT_FORMAT_YUV420_8: for (i = 0; i < ARRAY_SIZE(yuv420_copy_formats) && !found; i++) @@ -498,7 +509,7 @@ verify_copy_out_frame_format(struct ia_css_pipe *pipe) case ATOMISP_INPUT_FORMAT_RAW_14: case ATOMISP_INPUT_FORMAT_RAW_16: found = (out_fmt == IA_CSS_FRAME_FORMAT_RAW) || - (out_fmt == IA_CSS_FRAME_FORMAT_RAW_PACKED); + (out_fmt == IA_CSS_FRAME_FORMAT_RAW_PACKED); break; case ATOMISP_INPUT_FORMAT_BINARY_8: found = (out_fmt == IA_CSS_FRAME_FORMAT_BINARY_8); @@ -518,15 +529,14 @@ ia_css_stream_input_format_bits_per_pixel(struct ia_css_stream *stream) if (stream) bpp = ia_css_util_input_format_bpp(stream->config.input_config.format, - stream->config.pixels_per_clock == 2); + stream->config.pixels_per_clock == 2); return bpp; } #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) static enum ia_css_err -sh_css_config_input_network(struct ia_css_stream *stream) -{ +sh_css_config_input_network(struct ia_css_stream *stream) { unsigned int fmt_type; struct ia_css_pipe *pipe = stream->last_pipe; struct ia_css_binary *binary = NULL; @@ -536,15 +546,15 @@ sh_css_config_input_network(struct ia_css_stream *stream) assert(pipe); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_config_input_network() enter:\n"); + "sh_css_config_input_network() enter:\n"); if (pipe->pipeline.stages) binary = pipe->pipeline.stages->binary; err = ia_css_isys_convert_stream_format_to_mipi_format( - stream->config.input_config.format, - stream->csi_rx_config.comp, - &fmt_type); + stream->config.input_config.format, + stream->csi_rx_config.comp, + &fmt_type); if (err != IA_CSS_SUCCESS) return err; sh_css_sp_program_input_circuit(fmt_type, @@ -552,21 +562,24 @@ sh_css_config_input_network(struct ia_css_stream *stream) stream->config.mode); if ((binary && (binary->online || stream->config.continuous)) || - pipe->config.mode == IA_CSS_PIPE_MODE_COPY) { + pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + { err = ia_css_ifmtr_configure(&stream->config, - binary); + binary); if (err != IA_CSS_SUCCESS) return err; } if (stream->config.mode == IA_CSS_INPUT_MODE_TPG || - stream->config.mode == IA_CSS_INPUT_MODE_PRBS) { + stream->config.mode == IA_CSS_INPUT_MODE_PRBS) + { unsigned int hblank_cycles = 100, - vblank_lines = 6, - width, - height, - vblank_cycles; - width = (stream->config.input_config.input_res.width) / (1 + (stream->config.pixels_per_clock == 2)); + vblank_lines = 6, + width, + height, + vblank_cycles; + width = (stream->config.input_config.input_res.width) / (1 + + (stream->config.pixels_per_clock == 2)); height = stream->config.input_config.input_res.height; vblank_cycles = vblank_lines * (width + hblank_cycles); sh_css_sp_configure_sync_gen(width, height, hblank_cycles, @@ -574,19 +587,19 @@ sh_css_config_input_network(struct ia_css_stream *stream) #if defined(IS_ISP_2400_SYSTEM) if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) { /* TODO: move define to proper file in tools */ - #define GP_ISEL_TPG_MODE 0x90058 +#define GP_ISEL_TPG_MODE 0x90058 ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); } #endif } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_config_input_network() leave:\n"); + "sh_css_config_input_network() leave:\n"); return IA_CSS_SUCCESS; } #elif !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) static unsigned int csi2_protocol_calculate_max_subpixels_per_line( - enum atomisp_input_format format, - unsigned int pixels_per_line) + enum atomisp_input_format format, + unsigned int pixels_per_line) { unsigned int rval; @@ -710,8 +723,8 @@ static unsigned int csi2_protocol_calculate_max_subpixels_per_line( } static bool sh_css_translate_stream_cfg_to_input_system_input_port_id( - struct ia_css_stream_config *stream_cfg, - ia_css_isys_descr_t *isys_stream_descr) + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr) { bool rc; @@ -759,8 +772,8 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_id( } static bool sh_css_translate_stream_cfg_to_input_system_input_port_type( - struct ia_css_stream_config *stream_cfg, - ia_css_isys_descr_t *isys_stream_descr) + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr) { bool rc; @@ -791,9 +804,9 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_type( } static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( - struct ia_css_stream_config *stream_cfg, - ia_css_isys_descr_t *isys_stream_descr, - int isys_stream_idx) + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr, + int isys_stream_idx) { bool rc; @@ -821,12 +834,17 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( isys_stream_descr->tpg_port_attr.color_cfg.G2 = 100; isys_stream_descr->tpg_port_attr.color_cfg.B2 = 160; - isys_stream_descr->tpg_port_attr.mask_cfg.h_mask = stream_cfg->source.tpg.x_mask; - isys_stream_descr->tpg_port_attr.mask_cfg.v_mask = stream_cfg->source.tpg.y_mask; - isys_stream_descr->tpg_port_attr.mask_cfg.hv_mask = stream_cfg->source.tpg.xy_mask; + isys_stream_descr->tpg_port_attr.mask_cfg.h_mask = + stream_cfg->source.tpg.x_mask; + isys_stream_descr->tpg_port_attr.mask_cfg.v_mask = + stream_cfg->source.tpg.y_mask; + isys_stream_descr->tpg_port_attr.mask_cfg.hv_mask = + stream_cfg->source.tpg.xy_mask; - isys_stream_descr->tpg_port_attr.delta_cfg.h_delta = stream_cfg->source.tpg.x_delta; - isys_stream_descr->tpg_port_attr.delta_cfg.v_delta = stream_cfg->source.tpg.y_delta; + isys_stream_descr->tpg_port_attr.delta_cfg.h_delta = + stream_cfg->source.tpg.x_delta; + isys_stream_descr->tpg_port_attr.delta_cfg.v_delta = + stream_cfg->source.tpg.y_delta; /* * TODO @@ -834,10 +852,13 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( */ isys_stream_descr->tpg_port_attr.sync_gen_cfg.hblank_cycles = 100; isys_stream_descr->tpg_port_attr.sync_gen_cfg.vblank_cycles = 100; - isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_clock = stream_cfg->pixels_per_clock; + isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_clock = + stream_cfg->pixels_per_clock; isys_stream_descr->tpg_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t)~(0x0); - isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_line = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; - isys_stream_descr->tpg_port_attr.sync_gen_cfg.lines_per_frame = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; + isys_stream_descr->tpg_port_attr.sync_gen_cfg.pixels_per_line = + stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; + isys_stream_descr->tpg_port_attr.sync_gen_cfg.lines_per_frame = + stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; break; case IA_CSS_INPUT_MODE_PRBS: @@ -851,33 +872,36 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( */ isys_stream_descr->prbs_port_attr.sync_gen_cfg.hblank_cycles = 100; isys_stream_descr->prbs_port_attr.sync_gen_cfg.vblank_cycles = 100; - isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_clock = stream_cfg->pixels_per_clock; + isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_clock = + stream_cfg->pixels_per_clock; isys_stream_descr->prbs_port_attr.sync_gen_cfg.nr_of_frames = (uint32_t)~(0x0); - isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_line = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; - isys_stream_descr->prbs_port_attr.sync_gen_cfg.lines_per_frame = stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; + isys_stream_descr->prbs_port_attr.sync_gen_cfg.pixels_per_line = + stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.width; + isys_stream_descr->prbs_port_attr.sync_gen_cfg.lines_per_frame = + stream_cfg->isys_config[IA_CSS_STREAM_DEFAULT_ISYS_STREAM_IDX].input_res.height; break; - case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: - { + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: { enum ia_css_err err; unsigned int fmt_type; err = ia_css_isys_convert_stream_format_to_mipi_format( - stream_cfg->isys_config[isys_stream_idx].format, - MIPI_PREDICTOR_NONE, - &fmt_type); + stream_cfg->isys_config[isys_stream_idx].format, + MIPI_PREDICTOR_NONE, + &fmt_type); if (err != IA_CSS_SUCCESS) rc = false; - isys_stream_descr->csi_port_attr.active_lanes = stream_cfg->source.port.num_lanes; + isys_stream_descr->csi_port_attr.active_lanes = + stream_cfg->source.port.num_lanes; isys_stream_descr->csi_port_attr.fmt_type = fmt_type; isys_stream_descr->csi_port_attr.ch_id = stream_cfg->channel_id; #ifdef USE_INPUT_SYSTEM_VERSION_2401 isys_stream_descr->online = stream_cfg->online; #endif err |= ia_css_isys_convert_compressed_format( - &stream_cfg->source.port.compression, - isys_stream_descr); + &stream_cfg->source.port.compression, + isys_stream_descr); if (err != IA_CSS_SUCCESS) rc = false; @@ -885,25 +909,28 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( isys_stream_descr->metadata.enable = false; if (stream_cfg->metadata_config.resolution.height > 0) { err = ia_css_isys_convert_stream_format_to_mipi_format( - stream_cfg->metadata_config.data_type, - MIPI_PREDICTOR_NONE, - &fmt_type); + stream_cfg->metadata_config.data_type, + MIPI_PREDICTOR_NONE, + &fmt_type); if (err != IA_CSS_SUCCESS) rc = false; isys_stream_descr->metadata.fmt_type = fmt_type; isys_stream_descr->metadata.bits_per_pixel = - ia_css_util_input_format_bpp(stream_cfg->metadata_config.data_type, true); - isys_stream_descr->metadata.pixels_per_line = stream_cfg->metadata_config.resolution.width; - isys_stream_descr->metadata.lines_per_frame = stream_cfg->metadata_config.resolution.height; + ia_css_util_input_format_bpp(stream_cfg->metadata_config.data_type, true); + isys_stream_descr->metadata.pixels_per_line = + stream_cfg->metadata_config.resolution.width; + isys_stream_descr->metadata.lines_per_frame = + stream_cfg->metadata_config.resolution.height; #ifdef USE_INPUT_SYSTEM_VERSION_2401 /* For new input system, number of str2mmio requests must be even. * So we round up number of metadata lines to be even. */ if (isys_stream_descr->metadata.lines_per_frame > 0) isys_stream_descr->metadata.lines_per_frame += - (isys_stream_descr->metadata.lines_per_frame & 1); + (isys_stream_descr->metadata.lines_per_frame & 1); #endif isys_stream_descr->metadata.align_req_in_bytes = - ia_css_csi2_calculate_input_system_alignment(stream_cfg->metadata_config.data_type); + ia_css_csi2_calculate_input_system_alignment( + stream_cfg->metadata_config.data_type); isys_stream_descr->metadata.enable = true; } @@ -918,9 +945,9 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_attr( } static bool sh_css_translate_stream_cfg_to_input_system_input_port_resolution( - struct ia_css_stream_config *stream_cfg, - ia_css_isys_descr_t *isys_stream_descr, - int isys_stream_idx) + struct ia_css_stream_config *stream_cfg, + ia_css_isys_descr_t *isys_stream_descr, + int isys_stream_idx) { unsigned int bits_per_subpixel; unsigned int max_subpixels_per_line; @@ -930,26 +957,26 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_resolution( fmt_type = stream_cfg->isys_config[isys_stream_idx].format; if ((stream_cfg->mode == IA_CSS_INPUT_MODE_SENSOR || - stream_cfg->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) && - stream_cfg->source.port.compression.type != IA_CSS_CSI2_COMPRESSION_TYPE_NONE) { + stream_cfg->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) && + stream_cfg->source.port.compression.type != IA_CSS_CSI2_COMPRESSION_TYPE_NONE) { if (stream_cfg->source.port.compression.uncompressed_bits_per_pixel == - UNCOMPRESSED_BITS_PER_PIXEL_10) { - fmt_type = ATOMISP_INPUT_FORMAT_RAW_10; + UNCOMPRESSED_BITS_PER_PIXEL_10) { + fmt_type = ATOMISP_INPUT_FORMAT_RAW_10; } else if (stream_cfg->source.port.compression.uncompressed_bits_per_pixel == - UNCOMPRESSED_BITS_PER_PIXEL_12) { - fmt_type = ATOMISP_INPUT_FORMAT_RAW_12; + UNCOMPRESSED_BITS_PER_PIXEL_12) { + fmt_type = ATOMISP_INPUT_FORMAT_RAW_12; } else return false; } bits_per_subpixel = - sh_css_stream_format_2_bits_per_subpixel(fmt_type); + sh_css_stream_format_2_bits_per_subpixel(fmt_type); if (bits_per_subpixel == 0) return false; max_subpixels_per_line = - csi2_protocol_calculate_max_subpixels_per_line(fmt_type, - stream_cfg->isys_config[isys_stream_idx].input_res.width); + csi2_protocol_calculate_max_subpixels_per_line(fmt_type, + stream_cfg->isys_config[isys_stream_idx].input_res.width); if (max_subpixels_per_line == 0) return false; @@ -961,30 +988,37 @@ static bool sh_css_translate_stream_cfg_to_input_system_input_port_resolution( /* HW needs subpixel info for their settings */ isys_stream_descr->input_port_resolution.bits_per_pixel = bits_per_subpixel; - isys_stream_descr->input_port_resolution.pixels_per_line = max_subpixels_per_line; + isys_stream_descr->input_port_resolution.pixels_per_line = + max_subpixels_per_line; isys_stream_descr->input_port_resolution.lines_per_frame = lines_per_frame; - isys_stream_descr->input_port_resolution.align_req_in_bytes = align_req_in_bytes; + isys_stream_descr->input_port_resolution.align_req_in_bytes = + align_req_in_bytes; return true; } static bool sh_css_translate_stream_cfg_to_isys_stream_descr( - struct ia_css_stream_config *stream_cfg, - bool early_polling, - ia_css_isys_descr_t *isys_stream_descr, - int isys_stream_idx) + struct ia_css_stream_config *stream_cfg, + bool early_polling, + ia_css_isys_descr_t *isys_stream_descr, + int isys_stream_idx) { bool rc; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_translate_stream_cfg_to_isys_stream_descr() enter:\n"); - rc = sh_css_translate_stream_cfg_to_input_system_input_port_id(stream_cfg, isys_stream_descr); - rc &= sh_css_translate_stream_cfg_to_input_system_input_port_type(stream_cfg, isys_stream_descr); - rc &= sh_css_translate_stream_cfg_to_input_system_input_port_attr(stream_cfg, isys_stream_descr, isys_stream_idx); - rc &= sh_css_translate_stream_cfg_to_input_system_input_port_resolution(stream_cfg, isys_stream_descr, isys_stream_idx); + "sh_css_translate_stream_cfg_to_isys_stream_descr() enter:\n"); + rc = sh_css_translate_stream_cfg_to_input_system_input_port_id(stream_cfg, + isys_stream_descr); + rc &= sh_css_translate_stream_cfg_to_input_system_input_port_type(stream_cfg, + isys_stream_descr); + rc &= sh_css_translate_stream_cfg_to_input_system_input_port_attr(stream_cfg, + isys_stream_descr, isys_stream_idx); + rc &= sh_css_translate_stream_cfg_to_input_system_input_port_resolution( + stream_cfg, isys_stream_descr, isys_stream_idx); isys_stream_descr->raw_packed = stream_cfg->pack_raw_pixels; - isys_stream_descr->linked_isys_stream_id = (int8_t)stream_cfg->isys_config[isys_stream_idx].linked_isys_stream_id; + isys_stream_descr->linked_isys_stream_id = (int8_t) + stream_cfg->isys_config[isys_stream_idx].linked_isys_stream_id; /* * Early polling is required for timestamp accuracy in certain case. * The ISYS HW polling is started on @@ -995,30 +1029,30 @@ static bool sh_css_translate_stream_cfg_to_isys_stream_descr( * Only 2401 relevant ?? */ isys_stream_descr->polling_mode - = early_polling ? INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST - : INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME; + = early_polling ? INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST + : INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); + "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); return rc; } static bool sh_css_translate_binary_info_to_input_system_output_port_attr( - struct ia_css_binary *binary, - ia_css_isys_descr_t *isys_stream_descr) + struct ia_css_binary *binary, + ia_css_isys_descr_t *isys_stream_descr) { if (!binary) return false; isys_stream_descr->output_port_attr.left_padding = binary->left_padding; - isys_stream_descr->output_port_attr.max_isp_input_width = binary->info->sp.input.max_width; + isys_stream_descr->output_port_attr.max_isp_input_width = + binary->info->sp.input.max_width; return true; } static enum ia_css_err -sh_css_config_input_network(struct ia_css_stream *stream) -{ +sh_css_config_input_network(struct ia_css_stream *stream) { bool rc; ia_css_isys_descr_t isys_stream_descr; unsigned int sp_thread_id; @@ -1031,9 +1065,10 @@ sh_css_config_input_network(struct ia_css_stream *stream) assert(stream); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_config_input_network() enter 0x%p:\n", stream); + "sh_css_config_input_network() enter 0x%p:\n", stream); - if (stream->config.continuous == true) { + if (stream->config.continuous == true) + { if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { pipe = stream->last_pipe; } else if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_YUVPP) { @@ -1043,7 +1078,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) } else if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { pipe = stream->last_pipe->pipe_settings.video.copy_pipe; } - } else { + } else + { pipe = stream->last_pipe; if (stream->last_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { /* @@ -1066,7 +1102,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) if (pipe->pipeline.stages->binary) binary = pipe->pipeline.stages->binary; - if (binary) { + if (binary) + { /* this was being done in ifmtr in 2400. * online and cont bypass the init_in_frameinfo_memory_defaults * so need to do it here @@ -1081,7 +1118,8 @@ sh_css_config_input_network(struct ia_css_stream *stream) /* get the target input terminal */ sp_pipeline_input_terminal = &sh_css_sp_group.pipe_io[sp_thread_id].input; - for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { + for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) + { /* initialization */ memset((void *)(&isys_stream_descr), 0, sizeof(ia_css_isys_descr_t)); sp_pipeline_input_terminal->context.virtual_input_system_stream[i].valid = 0; @@ -1092,14 +1130,14 @@ sh_css_config_input_network(struct ia_css_stream *stream) /* translate the stream configuration to the Input System (2401) configuration */ rc = sh_css_translate_stream_cfg_to_isys_stream_descr( - &stream->config, - early_polling, - &(isys_stream_descr), i); + &stream->config, + early_polling, + &(isys_stream_descr), i); if (stream->config.online) { rc &= sh_css_translate_binary_info_to_input_system_output_port_attr( - binary, - &(isys_stream_descr)); + binary, + &(isys_stream_descr)); } if (!rc) @@ -1109,31 +1147,32 @@ sh_css_config_input_network(struct ia_css_stream *stream) /* create the virtual Input System (2401) */ rc = ia_css_isys_stream_create( - &(isys_stream_descr), - &sp_pipeline_input_terminal->context.virtual_input_system_stream[i], - isys_stream_id); + &(isys_stream_descr), + &sp_pipeline_input_terminal->context.virtual_input_system_stream[i], + isys_stream_id); if (!rc) return IA_CSS_ERR_INTERNAL_ERROR; /* calculate the configuration of the virtual Input System (2401) */ rc = ia_css_isys_stream_calculate_cfg( - &sp_pipeline_input_terminal->context.virtual_input_system_stream[i], - &(isys_stream_descr), - &sp_pipeline_input_terminal->ctrl.virtual_input_system_stream_cfg[i]); + &sp_pipeline_input_terminal->context.virtual_input_system_stream[i], + &(isys_stream_descr), + &sp_pipeline_input_terminal->ctrl.virtual_input_system_stream_cfg[i]); if (!rc) { - ia_css_isys_stream_destroy(&sp_pipeline_input_terminal->context.virtual_input_system_stream[i]); + ia_css_isys_stream_destroy( + &sp_pipeline_input_terminal->context.virtual_input_system_stream[i]); return IA_CSS_ERR_INTERNAL_ERROR; } } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_config_input_network() leave:\n"); + "sh_css_config_input_network() leave:\n"); return IA_CSS_SUCCESS; } static inline struct ia_css_pipe *stream_get_last_pipe( - struct ia_css_stream *stream) + struct ia_css_stream *stream) { struct ia_css_pipe *last_pipe = NULL; @@ -1144,7 +1183,7 @@ static inline struct ia_css_pipe *stream_get_last_pipe( } static inline struct ia_css_pipe *stream_get_copy_pipe( - struct ia_css_stream *stream) + struct ia_css_stream *stream) { struct ia_css_pipe *copy_pipe = NULL; struct ia_css_pipe *last_pipe = NULL; @@ -1157,15 +1196,15 @@ static inline struct ia_css_pipe *stream_get_copy_pipe( (stream->config.continuous)) { pipe_id = last_pipe->mode; switch (pipe_id) { - case IA_CSS_PIPE_ID_PREVIEW: - copy_pipe = last_pipe->pipe_settings.preview.copy_pipe; - break; - case IA_CSS_PIPE_ID_VIDEO: - copy_pipe = last_pipe->pipe_settings.video.copy_pipe; - break; - default: - copy_pipe = NULL; - break; + case IA_CSS_PIPE_ID_PREVIEW: + copy_pipe = last_pipe->pipe_settings.preview.copy_pipe; + break; + case IA_CSS_PIPE_ID_VIDEO: + copy_pipe = last_pipe->pipe_settings.video.copy_pipe; + break; + default: + copy_pipe = NULL; + break; } } @@ -1173,7 +1212,7 @@ static inline struct ia_css_pipe *stream_get_copy_pipe( } static inline struct ia_css_pipe *stream_get_target_pipe( - struct ia_css_stream *stream) + struct ia_css_stream *stream) { struct ia_css_pipe *target_pipe; @@ -1188,8 +1227,8 @@ static inline struct ia_css_pipe *stream_get_target_pipe( } static enum ia_css_err stream_csi_rx_helper( - struct ia_css_stream *stream, - enum ia_css_err (*func)(enum mipi_port_id, uint32_t)) + struct ia_css_stream *stream, + enum ia_css_err (*func)(enum mipi_port_id, uint32_t)) { enum ia_css_err retval = IA_CSS_ERR_INTERNAL_ERROR; u32 sp_thread_id, stream_id; @@ -1205,8 +1244,8 @@ static enum ia_css_err stream_csi_rx_helper( goto exit; rc = ia_css_pipeline_get_sp_thread_id( - ia_css_pipe_get_pipe_num(target_pipe), - &sp_thread_id); + ia_css_pipe_get_pipe_num(target_pipe), + &sp_thread_id); if (!rc) goto exit; @@ -1228,13 +1267,13 @@ static enum ia_css_err stream_csi_rx_helper( } static inline enum ia_css_err stream_register_with_csi_rx( - struct ia_css_stream *stream) + struct ia_css_stream *stream) { return stream_csi_rx_helper(stream, ia_css_isys_csi_rx_register_stream); } static inline enum ia_css_err stream_unregister_with_csi_rx( - struct ia_css_stream *stream) + struct ia_css_stream *stream) { return stream_csi_rx_helper(stream, ia_css_isys_csi_rx_unregister_stream); } @@ -1260,13 +1299,13 @@ static void print_pc_histo(char *core_name, struct sh_css_pc_histogram *hist) if ((hist->run[i] == 0) && (hist->run[i] == hist->stall[i])) continue; sh_css_print("%s %d\t%d\t%d\n", - core_name, i, hist->run[i], hist->stall[i]); + core_name, i, hist->run[i], hist->stall[i]); cnt_run += hist->run[i]; cnt_stall += hist->stall[i]; } sh_css_print(" Statistics for %s, cnt_run = %d, cnt_stall = %d, hist->length = %d\n", - core_name, cnt_run, cnt_stall, hist->length); + core_name, cnt_run, cnt_stall, hist->length); } static void print_pc_histogram(void) @@ -1279,7 +1318,7 @@ static void print_pc_histogram(void) if (metrics->mode == IA_CSS_BINARY_MODE_PREVIEW || metrics->mode == IA_CSS_BINARY_MODE_VF_PP) { sh_css_print("pc_histogram for binary %d is SKIPPED\n", - metrics->id); + metrics->id); continue; } @@ -1320,7 +1359,7 @@ static void spying_thread_create(void) static void input_frame_info(struct ia_css_frame_info frame_info) { sh_css_print("SH_CSS:input_frame_info() -- frame->info.res.width = %d, frame->info.res.height = %d, format = %d\n", - frame_info.res.width, frame_info.res.height, frame_info.format); + frame_info.res.width, frame_info.res.height, frame_info.format); } #endif /* WITH_PC_MONITORING */ @@ -1368,8 +1407,7 @@ start_binary(struct ia_css_pipe *pipe, /* start the copy function on the SP */ static enum ia_css_err start_copy_on_sp(struct ia_css_pipe *pipe, - struct ia_css_frame *out_frame) -{ + struct ia_css_frame *out_frame) { (void)out_frame; assert(pipe); assert(pipe->stream); @@ -1387,8 +1425,10 @@ start_copy_on_sp(struct ia_css_pipe *pipe, sh_css_sp_start_binary_copy(ia_css_pipe_get_pipe_num(pipe), out_frame, pipe->stream->config.pixels_per_clock == 2); #if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) - if (pipe->stream->reconfigure_css_rx) { - ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, pipe->stream->config.mode); + if (pipe->stream->reconfigure_css_rx) + { + ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, + pipe->stream->config.mode); pipe->stream->reconfigure_css_rx = false; } #endif @@ -1418,9 +1458,9 @@ void sh_css_binary_args_reset(struct sh_css_binary_args *args) } static void start_pipe( - struct ia_css_pipe *me, - enum sh_css_pipe_config_override copy_ovrd, - enum ia_css_input_mode input_mode) + struct ia_css_pipe *me, + enum sh_css_pipe_config_override copy_ovrd, + enum ia_css_input_mode input_mode) { #if defined(HAS_NO_INPUT_SYSTEM) (void)input_mode; @@ -1445,14 +1485,14 @@ static void start_pipe( &me->stream->info.metadata_info #if !defined(HAS_NO_INPUT_SYSTEM) , (input_mode == IA_CSS_INPUT_MODE_MEMORY) ? - (enum mipi_port_id)0 : - me->stream->config.source.port.port + (enum mipi_port_id)0 : + me->stream->config.source.port.port #endif #ifdef ISP2401 , &me->config.internal_frame_origin_bqs_on_sctbl, me->stream->isp_params_configs #endif - ); + ); if (me->config.mode != IA_CSS_PIPE_MODE_COPY) { struct ia_css_pipeline_stage *stage; @@ -1474,7 +1514,7 @@ sh_css_invalidate_shading_tables(struct ia_css_stream *stream) assert(stream); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_invalidate_shading_tables() enter:\n"); + "sh_css_invalidate_shading_tables() enter:\n"); for (i = 0; i < stream->num_pipes; i++) { assert(stream->pipes[i]); @@ -1482,7 +1522,7 @@ sh_css_invalidate_shading_tables(struct ia_css_stream *stream) } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_invalidate_shading_tables() leave: return_void\n"); + "sh_css_invalidate_shading_tables() leave: return_void\n"); } #ifndef ISP2401 @@ -1505,17 +1545,17 @@ enable_interrupts(enum ia_css_irq_type irq_type) /* Enable SW interrupt 0, this is used to signal ISYS events */ cnd_virq_enable_channel( - (virq_id_t)(IRQ_SW_CHANNEL0_ID + IRQ_SW_CHANNEL_OFFSET), - true); + (virq_id_t)(IRQ_SW_CHANNEL0_ID + IRQ_SW_CHANNEL_OFFSET), + true); /* Enable SW interrupt 1, this is used to signal PSYS events */ cnd_virq_enable_channel( - (virq_id_t)(IRQ_SW_CHANNEL1_ID + IRQ_SW_CHANNEL_OFFSET), - true); + (virq_id_t)(IRQ_SW_CHANNEL1_ID + IRQ_SW_CHANNEL_OFFSET), + true); #if !defined(HAS_IRQ_MAP_VERSION_2) /* IRQ_SW_CHANNEL2_ID does not exist on 240x systems */ cnd_virq_enable_channel( - (virq_id_t)(IRQ_SW_CHANNEL2_ID + IRQ_SW_CHANNEL_OFFSET), - true); + (virq_id_t)(IRQ_SW_CHANNEL2_ID + IRQ_SW_CHANNEL_OFFSET), + true); virq_clear_all(); #endif @@ -1530,8 +1570,8 @@ enable_interrupts(enum ia_css_irq_type irq_type) #endif static bool sh_css_setup_spctrl_config(const struct ia_css_fw_info *fw, - const char *program, - ia_css_spctrl_cfg *spctrl_cfg) + const char *program, + ia_css_spctrl_cfg *spctrl_cfg) { if ((!fw) || (!spctrl_cfg)) return false; @@ -1557,8 +1597,7 @@ static bool sh_css_setup_spctrl_config(const struct ia_css_fw_info *fw, void ia_css_unload_firmware(void) { - if (sh_css_num_binaries) - { + if (sh_css_num_binaries) { /* we have already loaded before so get rid of the old stuff */ ia_css_binary_uninit(); sh_css_unload_firmware(); @@ -1601,8 +1640,7 @@ ia_css_check_firmware_version(const struct ia_css_fw *fw) enum ia_css_err ia_css_load_firmware(const struct ia_css_env *env, - const struct ia_css_fw *fw) -{ + const struct ia_css_fw *fw) { enum ia_css_err err; if (!env) @@ -1613,14 +1651,16 @@ ia_css_load_firmware(const struct ia_css_env *env, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_load_firmware() enter\n"); /* make sure we initialize my_css */ - if (my_css.flush != env->cpu_mem_env.flush) { + if (my_css.flush != env->cpu_mem_env.flush) + { ia_css_reset_defaults(&my_css); my_css.flush = env->cpu_mem_env.flush; } ia_css_unload_firmware(); /* in case we are called twice */ err = sh_css_load_firmware(fw->data, fw->bytes); - if (err == IA_CSS_SUCCESS) { + if (err == IA_CSS_SUCCESS) + { err = ia_css_binary_init_infos(); if (err == IA_CSS_SUCCESS) fw_explicitly_loaded = true; @@ -1634,8 +1674,7 @@ enum ia_css_err ia_css_init(const struct ia_css_env *env, const struct ia_css_fw *fw, u32 mmu_l1_base, - enum ia_css_irq_type irq_type) -{ + enum ia_css_irq_type irq_type) { enum ia_css_err err; ia_css_spctrl_cfg spctrl_cfg; @@ -1681,7 +1720,7 @@ ia_css_init(const struct ia_css_env *env, if (!fw && !fw_explicitly_loaded) return IA_CSS_ERR_INVALID_ARGUMENTS; if (!env) - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; sh_css_printf = env->print_env.debug_print; @@ -1696,9 +1735,9 @@ ia_css_init(const struct ia_css_env *env, ia_css_device_access_init(&env->hw_access_env); select = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_select) - & (~GPIO_FLASH_PIN_MASK); + & (~GPIO_FLASH_PIN_MASK); enable = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_e) - | GPIO_FLASH_PIN_MASK; + | GPIO_FLASH_PIN_MASK; sh_css_mmu_set_page_table_base_index(mmu_l1_base); #ifndef ISP2401 my_css_save.mmu_base = mmu_l1_base; @@ -1712,7 +1751,8 @@ ia_css_init(const struct ia_css_env *env, my_css.flush = flush_func; err = ia_css_rmgr_init(); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR(err); return err; } @@ -1728,7 +1768,8 @@ ia_css_init(const struct ia_css_env *env, { my_css_save_initialized = true; my_css_save.mode = sh_css_mode_working; - memset(my_css_save.stream_seeds, 0, sizeof(struct sh_css_stream_seed) * MAX_ACTIVE_STREAMS); + memset(my_css_save.stream_seeds, 0, + sizeof(struct sh_css_stream_seed) * MAX_ACTIVE_STREAMS); IA_CSS_LOG("init: %d mode=%d", my_css_save_initialized, my_css_save.mode); } #endif @@ -1754,12 +1795,14 @@ ia_css_init(const struct ia_css_env *env, gpio_reg_store(GPIO0_ID, _gpio_block_reg_do_0, 0); err = ia_css_refcount_init(REFCOUNT_SIZE); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR(err); return err; } err = sh_css_params_init(); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR(err); return err; } @@ -1785,20 +1828,23 @@ ia_css_init(const struct ia_css_env *env, return IA_CSS_ERR_INTERNAL_ERROR; err = ia_css_spctrl_load_fw(SP0_ID, &spctrl_cfg); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR(err); return err; } #if WITH_PC_MONITORING - if (!thread_alive) { + if (!thread_alive) + { thread_alive++; sh_css_print("PC_MONITORING: %s() -- create thread DISABLED\n", __func__); spying_thread_create(); } #endif - if (!sh_css_hrt_system_is_idle()) { + if (!sh_css_hrt_system_is_idle()) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_SYSTEM_NOT_IDLE); return IA_CSS_ERR_SYSTEM_NOT_IDLE; } @@ -1838,23 +1884,23 @@ enum ia_css_err ia_css_suspend(void) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() enter\n"); my_css_save.mode = sh_css_mode_suspend; for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (my_css_save.stream_seeds[i].stream) - { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> unloading seed %d (%p)\n", i, my_css_save.stream_seeds[i].stream); + if (my_css_save.stream_seeds[i].stream) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> unloading seed %d (%p)\n", i, + my_css_save.stream_seeds[i].stream); ia_css_stream_unload(my_css_save.stream_seeds[i].stream); } my_css_save.mode = sh_css_mode_working; ia_css_stop_sp(); ia_css_uninit(); for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> after 1: seed %d (%p)\n", i, my_css_save.stream_seeds[i].stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> after 1: seed %d (%p)\n", i, + my_css_save.stream_seeds[i].stream); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() leave\n"); return IA_CSS_SUCCESS; } enum ia_css_err -ia_css_resume(void) -{ +ia_css_resume(void) { int i, j; enum ia_css_err err; @@ -1869,23 +1915,20 @@ ia_css_resume(void) my_css_save.mode = sh_css_mode_resume; for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> seed stream %p\n", my_css_save.stream_seeds[i].stream); - if (my_css_save.stream_seeds[i].stream) - { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> seed stream %p\n", + my_css_save.stream_seeds[i].stream); + if (my_css_save.stream_seeds[i].stream) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> loading seed %d\n", i); err = ia_css_stream_load(my_css_save.stream_seeds[i].stream); - if (err != IA_CSS_SUCCESS) - { + if (err != IA_CSS_SUCCESS) { if (i) for (j = 0; j < i; j++) ia_css_stream_unload(my_css_save.stream_seeds[j].stream); return err; } err = ia_css_stream_start(my_css_save.stream_seeds[i].stream); - if (err != IA_CSS_SUCCESS) - { - for (j = 0; j <= i; j++) - { + if (err != IA_CSS_SUCCESS) { + for (j = 0; j <= i; j++) { ia_css_stream_stop(my_css_save.stream_seeds[j].stream); ia_css_stream_unload(my_css_save.stream_seeds[j].stream); } @@ -1893,7 +1936,8 @@ ia_css_resume(void) } *my_css_save.stream_seeds[i].orig_stream = my_css_save.stream_seeds[i].stream; for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) - *my_css_save.stream_seeds[i].orig_pipes[j] = my_css_save.stream_seeds[i].pipes[j]; + *my_css_save.stream_seeds[i].orig_pipes[j] = + my_css_save.stream_seeds[i].pipes[j]; } } my_css_save.mode = sh_css_mode_working; @@ -1902,8 +1946,7 @@ ia_css_resume(void) } enum ia_css_err -ia_css_enable_isys_event_queue(bool enable) -{ +ia_css_enable_isys_event_queue(bool enable) { if (sh_css_sp_is_running()) return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; sh_css_sp_enable_isys_event_queue(enable); @@ -1912,7 +1955,8 @@ ia_css_enable_isys_event_queue(bool enable) void *sh_css_malloc(size_t size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_malloc() enter: size=%zu\n", size); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_malloc() enter: size=%zu\n", + size); /* FIXME: This first test can probably go away */ if (size == 0) return NULL; @@ -1925,7 +1969,8 @@ void *sh_css_calloc(size_t N, size_t size) { void *p; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_calloc() enter: N=%zu, size=%zu\n", N, size); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_calloc() enter: N=%zu, size=%zu\n", N, size); /* FIXME: this test can probably go away */ if (size > 0) { @@ -1959,8 +2004,7 @@ sh_css_flush(struct ia_css_acc_fw *fw) * doing it from stream_create since we could run out of sp threads due to * allocation on inactive pipelines. */ static enum ia_css_err -map_sp_threads(struct ia_css_stream *stream, bool map) -{ +map_sp_threads(struct ia_css_stream *stream, bool map) { struct ia_css_pipe *main_pipe = NULL; struct ia_css_pipe *copy_pipe = NULL; struct ia_css_pipe *capture_pipe = NULL; @@ -1972,7 +2016,8 @@ map_sp_threads(struct ia_css_stream *stream, bool map) IA_CSS_ENTER_PRIVATE("stream = %p, map = %s", stream, map ? "true" : "false"); - if (!stream) { + if (!stream) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -1982,7 +2027,8 @@ map_sp_threads(struct ia_css_stream *stream, bool map) ia_css_pipeline_map(main_pipe->pipe_num, map); - switch (pipe_id) { + switch (pipe_id) + { case IA_CSS_PIPE_ID_PREVIEW: copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; capture_pipe = main_pipe->pipe_settings.preview.capture_pipe; @@ -2000,20 +2046,24 @@ map_sp_threads(struct ia_css_stream *stream, bool map) break; } - if (acc_pipe) { + if (acc_pipe) + { ia_css_pipeline_map(acc_pipe->pipe_num, map); } - if (capture_pipe) { + if (capture_pipe) + { ia_css_pipeline_map(capture_pipe->pipe_num, map); } /* Firmware expects copy pipe to be the last pipe mapped. (if needed) */ - if (copy_pipe) { + if (copy_pipe) + { ia_css_pipeline_map(copy_pipe->pipe_num, map); } /* DH regular multi pipe - not continuous mode: map the next pipes too */ - if (!stream->config.continuous) { + if (!stream->config.continuous) + { int i; for (i = 1; i < stream->num_pipes; i++) @@ -2027,41 +2077,44 @@ map_sp_threads(struct ia_css_stream *stream, bool map) /* creates a host pipeline skeleton for all pipes in a stream. Called during * stream_create. */ static enum ia_css_err -create_host_pipeline_structure(struct ia_css_stream *stream) -{ +create_host_pipeline_structure(struct ia_css_stream *stream) { struct ia_css_pipe *copy_pipe = NULL, *capture_pipe = NULL; struct ia_css_pipe *acc_pipe = NULL; enum ia_css_pipe_id pipe_id; struct ia_css_pipe *main_pipe = NULL; enum ia_css_err err = IA_CSS_SUCCESS; unsigned int copy_pipe_delay = 0, - capture_pipe_delay = 0; + capture_pipe_delay = 0; assert(stream); IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (!stream) { + if (!stream) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } main_pipe = stream->last_pipe; assert(main_pipe); - if (!main_pipe) { + if (!main_pipe) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } pipe_id = main_pipe->mode; - switch (pipe_id) { + switch (pipe_id) + { case IA_CSS_PIPE_ID_PREVIEW: copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; copy_pipe_delay = main_pipe->dvs_frame_delay; capture_pipe = main_pipe->pipe_settings.preview.capture_pipe; capture_pipe_delay = IA_CSS_FRAME_DELAY_0; acc_pipe = main_pipe->pipe_settings.preview.acc_pipe; - err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, main_pipe->pipe_num, main_pipe->dvs_frame_delay); + err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, + main_pipe->pipe_num, main_pipe->dvs_frame_delay); break; case IA_CSS_PIPE_ID_VIDEO: @@ -2069,7 +2122,8 @@ create_host_pipeline_structure(struct ia_css_stream *stream) copy_pipe_delay = main_pipe->dvs_frame_delay; capture_pipe = main_pipe->pipe_settings.video.capture_pipe; capture_pipe_delay = IA_CSS_FRAME_DELAY_0; - err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, main_pipe->pipe_num, main_pipe->dvs_frame_delay); + err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, + main_pipe->pipe_num, main_pipe->dvs_frame_delay); break; case IA_CSS_PIPE_ID_CAPTURE: @@ -2079,45 +2133,51 @@ create_host_pipeline_structure(struct ia_css_stream *stream) case IA_CSS_PIPE_ID_YUVPP: err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, - main_pipe->pipe_num, main_pipe->dvs_frame_delay); + main_pipe->pipe_num, main_pipe->dvs_frame_delay); break; case IA_CSS_PIPE_ID_ACC: - err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, main_pipe->pipe_num, main_pipe->dvs_frame_delay); + err = ia_css_pipeline_create(&main_pipe->pipeline, main_pipe->mode, + main_pipe->pipe_num, main_pipe->dvs_frame_delay); break; default: err = IA_CSS_ERR_INVALID_ARGUMENTS; } - if ((err == IA_CSS_SUCCESS) && copy_pipe) { + if ((err == IA_CSS_SUCCESS) && copy_pipe) + { err = ia_css_pipeline_create(©_pipe->pipeline, - copy_pipe->mode, - copy_pipe->pipe_num, - copy_pipe_delay); + copy_pipe->mode, + copy_pipe->pipe_num, + copy_pipe_delay); } - if ((err == IA_CSS_SUCCESS) && capture_pipe) { + if ((err == IA_CSS_SUCCESS) && capture_pipe) + { err = ia_css_pipeline_create(&capture_pipe->pipeline, - capture_pipe->mode, - capture_pipe->pipe_num, - capture_pipe_delay); + capture_pipe->mode, + capture_pipe->pipe_num, + capture_pipe_delay); } - if ((err == IA_CSS_SUCCESS) && acc_pipe) { - err = ia_css_pipeline_create(&acc_pipe->pipeline, acc_pipe->mode, acc_pipe->pipe_num, main_pipe->dvs_frame_delay); + if ((err == IA_CSS_SUCCESS) && acc_pipe) + { + err = ia_css_pipeline_create(&acc_pipe->pipeline, acc_pipe->mode, + acc_pipe->pipe_num, main_pipe->dvs_frame_delay); } /* DH regular multi pipe - not continuous mode: create the next pipelines too */ - if (!stream->config.continuous) { + if (!stream->config.continuous) + { int i; for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err; i++) { main_pipe = stream->pipes[i]; err = ia_css_pipeline_create(&main_pipe->pipeline, - main_pipe->mode, - main_pipe->pipe_num, - main_pipe->dvs_frame_delay); + main_pipe->mode, + main_pipe->pipe_num, + main_pipe->dvs_frame_delay); } } @@ -2128,8 +2188,7 @@ create_host_pipeline_structure(struct ia_css_stream *stream) /* creates a host pipeline for all pipes in a stream. Called during * stream_start. */ static enum ia_css_err -create_host_pipeline(struct ia_css_stream *stream) -{ +create_host_pipeline(struct ia_css_stream *stream) { struct ia_css_pipe *copy_pipe = NULL, *capture_pipe = NULL; struct ia_css_pipe *acc_pipe = NULL; enum ia_css_pipe_id pipe_id; @@ -2138,7 +2197,8 @@ create_host_pipeline(struct ia_css_stream *stream) unsigned int max_input_width = 0; IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (!stream) { + if (!stream) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2149,7 +2209,8 @@ create_host_pipeline(struct ia_css_stream *stream) /* No continuous frame allocation for capture pipe. It uses the * "main" pipe's frames. */ if ((pipe_id == IA_CSS_PIPE_ID_PREVIEW) || - (pipe_id == IA_CSS_PIPE_ID_VIDEO)) { + (pipe_id == IA_CSS_PIPE_ID_VIDEO)) + { /* About pipe_id == IA_CSS_PIPE_ID_PREVIEW && stream->config.mode != IA_CSS_INPUT_MODE_MEMORY: * The original condition pipe_id == IA_CSS_PIPE_ID_PREVIEW is too strong. E.g. in SkyCam (with memory * based input frames) there is no continuous mode and thus no need for allocated continuous frames @@ -2157,7 +2218,8 @@ create_host_pipeline(struct ia_css_stream *stream) * reason the stream->config.mode != IA_CSS_INPUT_MODE_MEMORY has beed added. */ if (stream->config.continuous || - (pipe_id == IA_CSS_PIPE_ID_PREVIEW && stream->config.mode != IA_CSS_INPUT_MODE_MEMORY)) { + (pipe_id == IA_CSS_PIPE_ID_PREVIEW && + stream->config.mode != IA_CSS_INPUT_MODE_MEMORY)) { err = alloc_continuous_frames(main_pipe, true); if (err != IA_CSS_SUCCESS) goto ERR; @@ -2166,27 +2228,30 @@ create_host_pipeline(struct ia_css_stream *stream) #if defined(USE_INPUT_SYSTEM_VERSION_2) /* old isys: need to allocate_mipi_frames() even in IA_CSS_PIPE_MODE_COPY */ - if (pipe_id != IA_CSS_PIPE_ID_ACC) { + if (pipe_id != IA_CSS_PIPE_ID_ACC) + { err = allocate_mipi_frames(main_pipe, &stream->info); if (err != IA_CSS_SUCCESS) goto ERR; } #elif defined(USE_INPUT_SYSTEM_VERSION_2401) if ((pipe_id != IA_CSS_PIPE_ID_ACC) && - (main_pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { + (main_pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) + { err = allocate_mipi_frames(main_pipe, &stream->info); if (err != IA_CSS_SUCCESS) goto ERR; } #endif - switch (pipe_id) { + switch (pipe_id) + { case IA_CSS_PIPE_ID_PREVIEW: copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; capture_pipe = main_pipe->pipe_settings.preview.capture_pipe; acc_pipe = main_pipe->pipe_settings.preview.acc_pipe; max_input_width = - main_pipe->pipe_settings.preview.preview_binary.info->sp.input.max_width; + main_pipe->pipe_settings.preview.preview_binary.info->sp.input.max_width; err = create_host_preview_pipeline(main_pipe); if (err != IA_CSS_SUCCESS) @@ -2198,7 +2263,7 @@ create_host_pipeline(struct ia_css_stream *stream) copy_pipe = main_pipe->pipe_settings.video.copy_pipe; capture_pipe = main_pipe->pipe_settings.video.capture_pipe; max_input_width = - main_pipe->pipe_settings.video.video_binary.info->sp.input.max_width; + main_pipe->pipe_settings.video.video_binary.info->sp.input.max_width; err = create_host_video_pipeline(main_pipe); if (err != IA_CSS_SUCCESS) @@ -2230,27 +2295,31 @@ create_host_pipeline(struct ia_css_stream *stream) if (err != IA_CSS_SUCCESS) goto ERR; - if (copy_pipe) { + if (copy_pipe) + { err = create_host_copy_pipeline(copy_pipe, max_input_width, - main_pipe->continuous_frames[0]); + main_pipe->continuous_frames[0]); if (err != IA_CSS_SUCCESS) goto ERR; } - if (capture_pipe) { + if (capture_pipe) + { err = create_host_capture_pipeline(capture_pipe); if (err != IA_CSS_SUCCESS) goto ERR; } - if (acc_pipe) { + if (acc_pipe) + { err = create_host_acc_pipeline(acc_pipe); if (err != IA_CSS_SUCCESS) goto ERR; } /* DH regular multi pipe - not continuous mode: create the next pipelines too */ - if (!stream->config.continuous) { + if (!stream->config.continuous) + { int i; for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err; i++) { @@ -2285,10 +2354,10 @@ create_host_pipeline(struct ia_css_stream *stream) static enum ia_css_err init_pipe_defaults(enum ia_css_pipe_mode mode, - struct ia_css_pipe *pipe, - bool copy_pipe) -{ - if (!pipe) { + struct ia_css_pipe *pipe, + bool copy_pipe) { + if (!pipe) + { IA_CSS_ERROR("NULL pipe parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2297,7 +2366,8 @@ init_pipe_defaults(enum ia_css_pipe_mode mode, *pipe = IA_CSS_DEFAULT_PIPE; /* TODO: JB should not be needed, but temporary backward reference */ - switch (mode) { + switch (mode) + { case IA_CSS_PIPE_MODE_PREVIEW: pipe->mode = IA_CSS_PIPE_ID_PREVIEW; pipe->pipe_settings.preview = IA_CSS_DEFAULT_PREVIEW_SETTINGS; @@ -2343,19 +2413,21 @@ pipe_global_init(void) } static enum ia_css_err -pipe_generate_pipe_num(const struct ia_css_pipe *pipe, unsigned int *pipe_number) -{ +pipe_generate_pipe_num(const struct ia_css_pipe *pipe, + unsigned int *pipe_number) { const u8 INVALID_PIPE_NUM = (uint8_t)~(0); u8 pipe_num = INVALID_PIPE_NUM; u8 i; - if (!pipe) { + if (!pipe) + { IA_CSS_ERROR("NULL pipe parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } /* Assign a new pipe_num .... search for empty place */ - for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { + for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) + { if (!my_css.all_pipes[i]) { /*position is reserved */ my_css.all_pipes[i] = (struct ia_css_pipe *)pipe; @@ -2363,7 +2435,8 @@ pipe_generate_pipe_num(const struct ia_css_pipe *pipe, unsigned int *pipe_number break; } } - if (pipe_num == INVALID_PIPE_NUM) { + if (pipe_num == INVALID_PIPE_NUM) + { /* Max number of pipes already allocated */ IA_CSS_ERROR("Max number of pipes already created"); return IA_CSS_ERR_RESOURCE_EXHAUSTED; @@ -2383,18 +2456,18 @@ pipe_release_pipe_num(unsigned int pipe_num) my_css.all_pipes[pipe_num] = NULL; my_css.pipe_counter--; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "pipe_release_pipe_num (%d)\n", pipe_num); + "pipe_release_pipe_num (%d)\n", pipe_num); } static enum ia_css_err create_pipe(enum ia_css_pipe_mode mode, struct ia_css_pipe **pipe, - bool copy_pipe) -{ + bool copy_pipe) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_pipe *me; - if (!pipe) { + if (!pipe) + { IA_CSS_ERROR("NULL pipe parameter"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2404,13 +2477,15 @@ create_pipe(enum ia_css_pipe_mode mode, return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; err = init_pipe_defaults(mode, me, copy_pipe); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { kfree(me); return err; } err = pipe_generate_pipe_num(me, &me->pipe_num); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { kfree(me); return err; } @@ -2426,7 +2501,7 @@ find_pipe_by_num(uint32_t pipe_num) for (i = 0; i < IA_CSS_PIPELINE_NUM_MAX; i++) { if (my_css.all_pipes[i] && - ia_css_pipe_get_pipe_num(my_css.all_pipes[i]) == pipe_num) { + ia_css_pipe_get_pipe_num(my_css.all_pipes[i]) == pipe_num) { return my_css.all_pipes[i]; } } @@ -2449,67 +2524,75 @@ static void sh_css_pipe_free_acc_binaries( /* loop through the stages and unload them */ for (stage = pipeline->stages; stage; stage = stage->next) { struct ia_css_fw_info *firmware = (struct ia_css_fw_info *) - stage->firmware; + stage->firmware; if (firmware) ia_css_pipe_unload_extension(pipe, firmware); } } enum ia_css_err -ia_css_pipe_destroy(struct ia_css_pipe *pipe) -{ +ia_css_pipe_destroy(struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; IA_CSS_ENTER("pipe = %p", pipe); - if (!pipe) { + if (!pipe) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if (pipe->stream) { + if (pipe->stream) + { IA_CSS_LOG("ia_css_stream_destroy not called!"); IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - switch (pipe->config.mode) { + switch (pipe->config.mode) + { case IA_CSS_PIPE_MODE_PREVIEW: /* need to take into account that this function is also called on the internal copy pipe */ if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { ia_css_frame_free_multiple(NUM_CONTINUOUS_FRAMES, - pipe->continuous_frames); + pipe->continuous_frames); ia_css_metadata_free_multiple(NUM_CONTINUOUS_FRAMES, - pipe->cont_md_buffers); + pipe->cont_md_buffers); if (pipe->pipe_settings.preview.copy_pipe) { err = ia_css_pipe_destroy(pipe->pipe_settings.preview.copy_pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): destroyed internal copy pipe err=%d\n", - err); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipe_destroy(): destroyed internal copy pipe err=%d\n", + err); } } break; case IA_CSS_PIPE_MODE_VIDEO: if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) { ia_css_frame_free_multiple(NUM_CONTINUOUS_FRAMES, - pipe->continuous_frames); + pipe->continuous_frames); ia_css_metadata_free_multiple(NUM_CONTINUOUS_FRAMES, - pipe->cont_md_buffers); + pipe->cont_md_buffers); if (pipe->pipe_settings.video.copy_pipe) { err = ia_css_pipe_destroy(pipe->pipe_settings.video.copy_pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_destroy(): destroyed internal copy pipe err=%d\n", - err); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipe_destroy(): destroyed internal copy pipe err=%d\n", + err); } } #ifndef ISP2401 - ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); + ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, + pipe->pipe_settings.video.tnr_frames); #else - ia_css_frame_free_multiple(NUM_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); + ia_css_frame_free_multiple(NUM_TNR_FRAMES, + pipe->pipe_settings.video.tnr_frames); #endif - ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, pipe->pipe_settings.video.delay_frames); + ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, + pipe->pipe_settings.video.delay_frames); break; case IA_CSS_PIPE_MODE_CAPTURE: - ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, pipe->pipe_settings.capture.delay_frames); + ia_css_frame_free_multiple(MAX_NUM_VIDEO_DELAY_FRAMES, + pipe->pipe_settings.capture.delay_frames); break; case IA_CSS_PIPE_MODE_ACC: sh_css_pipe_free_acc_binaries(pipe); @@ -2530,7 +2613,8 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) pipe_release_pipe_num(ia_css_pipe_get_pipe_num(pipe)); /* Temporarily, not every sh_css_pipe has an acc_extension. */ - if (pipe->config.acc_extension) { + if (pipe->config.acc_extension) + { ia_css_pipe_unload_extension(pipe, pipe->config.acc_extension); } kfree(pipe); @@ -2583,15 +2667,16 @@ ia_css_uninit(void) #if defined(HAS_IRQ_MAP_VERSION_2) enum ia_css_err ia_css_irq_translate( - unsigned int *irq_infos) + unsigned int *irq_infos) { virq_id_t irq; enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_more_irqs; unsigned int infos = 0; -/* irq_infos can be NULL, but that would make the function useless */ -/* assert(irq_infos != NULL); */ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() enter: irq_infos=%p\n", irq_infos); + /* irq_infos can be NULL, but that would make the function useless */ + /* assert(irq_infos != NULL); */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_irq_translate() enter: irq_infos=%p\n", irq_infos); while (status == hrt_isp_css_irq_status_more_irqs) { status = virq_get_channel_id(&irq); @@ -2646,15 +2731,16 @@ enum ia_css_err ia_css_irq_translate( if (irq_infos) *irq_infos = infos; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_irq_translate() leave: irq_infos=%u\n", - infos); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_irq_translate() leave: irq_infos=%u\n", + infos); return IA_CSS_SUCCESS; } enum ia_css_err ia_css_irq_enable( - enum ia_css_irq_info info, - bool enable) + enum ia_css_irq_info info, + bool enable) { virq_id_t irq = N_virq_id; @@ -2698,8 +2784,7 @@ enum ia_css_err ia_css_irq_enable( } #else -#error "sh_css.c: IRQ MAP must be one of \ - {IRQ_MAP_VERSION_2}" +#error "sh_css.c: IRQ MAP must be one of { IRQ_MAP_VERSION_2 }" #endif static unsigned int @@ -2707,18 +2792,20 @@ sh_css_get_sw_interrupt_value(unsigned int irq) { unsigned int irq_value; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() enter: irq=%d\n", irq); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_get_sw_interrupt_value() enter: irq=%d\n", irq); irq_value = sh_css_sp_get_sw_interrupt_value(irq); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_get_sw_interrupt_value() leave: irq_value=%d\n", irq_value); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_get_sw_interrupt_value() leave: irq_value=%d\n", irq_value); return irq_value; } /* configure and load the copy binary, the next binary is used to determine whether the copy binary needs to do left padding. */ static enum ia_css_err load_copy_binary( - struct ia_css_pipe *pipe, - struct ia_css_binary *copy_binary, - struct ia_css_binary *next_binary) + struct ia_css_pipe *pipe, + struct ia_css_binary *copy_binary, + struct ia_css_binary *next_binary) { struct ia_css_frame_info copy_out_info, copy_in_info, copy_vf_info; unsigned int left_padding; @@ -2729,7 +2816,7 @@ static enum ia_css_err load_copy_binary( assert(pipe); assert(copy_binary); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "load_copy_binary() enter:\n"); + "load_copy_binary() enter:\n"); if (next_binary) { copy_out_info = next_binary->in_frame_info; @@ -2742,7 +2829,8 @@ static enum ia_css_err load_copy_binary( } ia_css_pipe_get_copy_binarydesc(pipe, ©_descr, - ©_in_info, ©_out_info, (next_binary) ? NULL : NULL/*TODO: ©_vf_info*/); + ©_in_info, ©_out_info, + (next_binary) ? NULL : NULL/*TODO: ©_vf_info*/); err = ia_css_binary_find(©_descr, copy_binary); if (err != IA_CSS_SUCCESS) return err; @@ -2752,8 +2840,7 @@ static enum ia_css_err load_copy_binary( static enum ia_css_err alloc_continuous_frames( - struct ia_css_pipe *pipe, bool init_time) -{ + struct ia_css_pipe *pipe, bool init_time) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_frame_info ref_info; enum ia_css_pipe_id pipe_id; @@ -2764,7 +2851,8 @@ alloc_continuous_frames( IA_CSS_ENTER_PRIVATE("pipe = %p, init_time = %d", pipe, init_time); - if ((!pipe) || (!pipe->stream)) { + if ((!pipe) || (!pipe->stream)) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2772,21 +2860,26 @@ alloc_continuous_frames( pipe_id = pipe->mode; continuous = pipe->stream->config.continuous; - if (continuous) { + if (continuous) + { if (init_time) { num_frames = pipe->stream->config.init_num_cont_raw_buf; pipe->stream->continuous_pipe = pipe; } else num_frames = pipe->stream->config.target_num_cont_raw_buf; - } else { - num_frames = NUM_ONLINE_INIT_CONTINUOUS_FRAMES; + } else + { + num_frames = NUM_ONLINE_INIT_CONTINUOUS_FRAMES; } - if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) { + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) + { ref_info = pipe->pipe_settings.preview.preview_binary.in_frame_info; - } else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) { + } else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) + { ref_info = pipe->pipe_settings.video.video_binary.in_frame_info; - } else { + } else + { /* should not happen */ IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; @@ -2802,26 +2895,31 @@ alloc_continuous_frames( #endif #if !defined(HAS_NO_PACKED_RAW_PIXELS) - if (pipe->stream->config.pack_raw_pixels) { + if (pipe->stream->config.pack_raw_pixels) + { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW_PACKED\n"); + "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW_PACKED\n"); ref_info.format = IA_CSS_FRAME_FORMAT_RAW_PACKED; } else #endif { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW\n"); + "alloc_continuous_frames() IA_CSS_FRAME_FORMAT_RAW\n"); ref_info.format = IA_CSS_FRAME_FORMAT_RAW; } /* Write format back to binary */ - if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) { - pipe->pipe_settings.preview.preview_binary.in_frame_info.format = ref_info.format; + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) + { + pipe->pipe_settings.preview.preview_binary.in_frame_info.format = + ref_info.format; capture_pipe = pipe->pipe_settings.preview.capture_pipe; - } else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) { + } else if (pipe_id == IA_CSS_PIPE_ID_VIDEO) + { pipe->pipe_settings.video.video_binary.in_frame_info.format = ref_info.format; capture_pipe = pipe->pipe_settings.video.capture_pipe; - } else { + } else + { /* should not happen */ IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; @@ -2832,7 +2930,8 @@ alloc_continuous_frames( else idx = pipe->stream->config.init_num_cont_raw_buf; - for (i = idx; i < NUM_CONTINUOUS_FRAMES; i++) { + for (i = idx; i < NUM_CONTINUOUS_FRAMES; i++) + { /* free previous frame */ if (pipe->continuous_frames[i]) { ia_css_frame_free(pipe->continuous_frames[i]); @@ -2846,15 +2945,15 @@ alloc_continuous_frames( if (i < num_frames) { /* allocate new frame */ err = ia_css_frame_allocate_from_info( - &pipe->continuous_frames[i], - &ref_info); + &pipe->continuous_frames[i], + &ref_info); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } /* allocate metadata buffer */ pipe->cont_md_buffers[i] = ia_css_metadata_allocate( - &pipe->stream->info.metadata_info); + &pipe->stream->info.metadata_info); } } IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); @@ -2862,20 +2961,18 @@ alloc_continuous_frames( } enum ia_css_err -ia_css_alloc_continuous_frame_remain(struct ia_css_stream *stream) -{ +ia_css_alloc_continuous_frame_remain(struct ia_css_stream *stream) { if (!stream) return IA_CSS_ERR_INVALID_ARGUMENTS; return alloc_continuous_frames(stream->continuous_pipe, false); } static enum ia_css_err -load_preview_binaries(struct ia_css_pipe *pipe) -{ +load_preview_binaries(struct ia_css_pipe *pipe) { struct ia_css_frame_info prev_in_info, - prev_bds_out_info, - prev_out_info, - prev_vf_info; + prev_bds_out_info, + prev_out_info, + prev_vf_info; struct ia_css_binary_descr preview_descr; bool online; enum ia_css_err err = IA_CSS_SUCCESS; @@ -2925,9 +3022,9 @@ load_preview_binaries(struct ia_css_pipe *pipe) * */ need_vf_pp = pipe->config.enable_dz; need_vf_pp |= pipe_out_info->format != IA_CSS_FRAME_FORMAT_YUV_LINE && - !(pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12 || - pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12_16 || - pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12_TILEY); + !(pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12 || + pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12_16 || + pipe_out_info->format == IA_CSS_FRAME_FORMAT_NV12_TILEY); /* Preview step 1 */ if (pipe->vf_yuv_ds_input_info.res.width) @@ -2944,12 +3041,12 @@ load_preview_binaries(struct ia_css_pipe *pipe) IA_CSS_FRAME_FORMAT_YUV_LINE); err = ia_css_pipe_get_preview_binarydesc( - pipe, - &preview_descr, - &prev_in_info, - &prev_bds_out_info, - &prev_out_info, - &prev_vf_info); + pipe, + &preview_descr, + &prev_in_info, + &prev_bds_out_info, + &prev_out_info, + &prev_vf_info); if (err != IA_CSS_SUCCESS) return err; err = ia_css_binary_find(&preview_descr, &mycs->preview_binary); @@ -2963,8 +3060,8 @@ load_preview_binaries(struct ia_css_pipe *pipe) pipe->info.num_invalid_frames = pipe->num_invalid_frames; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "load_preview_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", - pipe->num_invalid_frames, pipe->dvs_frame_delay); + "load_preview_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", + pipe->num_invalid_frames, pipe->dvs_frame_delay); #endif /* The vf_pp binary is needed when (further) YUV downscaling is required */ @@ -2976,7 +3073,8 @@ load_preview_binaries(struct ia_css_pipe *pipe) * then the preview binary selection is done again. */ if (need_vf_pp && - (mycs->preview_binary.out_frame_info[0].format != IA_CSS_FRAME_FORMAT_YUV_LINE)) { + (mycs->preview_binary.out_frame_info[0].format != IA_CSS_FRAME_FORMAT_YUV_LINE)) + { /* Preview step 2 */ if (pipe->vf_yuv_ds_input_info.res.width) prev_vf_info = pipe->vf_yuv_ds_input_info; @@ -2984,32 +3082,33 @@ load_preview_binaries(struct ia_css_pipe *pipe) prev_vf_info = *pipe_out_info; ia_css_frame_info_set_format(&prev_vf_info, - IA_CSS_FRAME_FORMAT_YUV_LINE); + IA_CSS_FRAME_FORMAT_YUV_LINE); err = ia_css_pipe_get_preview_binarydesc( - pipe, - &preview_descr, - &prev_in_info, - &prev_bds_out_info, - &prev_out_info, - &prev_vf_info); + pipe, + &preview_descr, + &prev_in_info, + &prev_bds_out_info, + &prev_out_info, + &prev_vf_info); if (err != IA_CSS_SUCCESS) return err; err = ia_css_binary_find(&preview_descr, - &mycs->preview_binary); + &mycs->preview_binary); if (err != IA_CSS_SUCCESS) return err; } - if (need_vf_pp) { + if (need_vf_pp) + { struct ia_css_binary_descr vf_pp_descr; /* Viewfinder post-processing */ ia_css_pipe_get_vfpp_binarydesc(pipe, &vf_pp_descr, - &mycs->preview_binary.out_frame_info[0], - pipe_out_info); + &mycs->preview_binary.out_frame_info[0], + pipe_out_info); err = ia_css_binary_find(&vf_pp_descr, - &mycs->vf_pp_binary); + &mycs->vf_pp_binary); if (err != IA_CSS_SUCCESS) return err; } @@ -3033,7 +3132,8 @@ load_preview_binaries(struct ia_css_pipe *pipe) #endif /* Copy */ - if (need_isp_copy_binary) { + if (need_isp_copy_binary) + { err = load_copy_binary(pipe, &mycs->copy_binary, &mycs->preview_binary); @@ -3041,7 +3141,8 @@ load_preview_binaries(struct ia_css_pipe *pipe) return err; } - if (pipe->shading_table) { + if (pipe->shading_table) + { ia_css_shading_table_free(pipe->shading_table); pipe->shading_table = NULL; } @@ -3056,11 +3157,11 @@ ia_css_binary_unload(struct ia_css_binary *binary) } static enum ia_css_err -unload_preview_binaries(struct ia_css_pipe *pipe) -{ +unload_preview_binaries(struct ia_css_pipe *pipe) { IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -3073,10 +3174,10 @@ unload_preview_binaries(struct ia_css_pipe *pipe) } static const struct ia_css_fw_info *last_output_firmware( - const struct ia_css_fw_info *fw) + const struct ia_css_fw_info *fw) { const struct ia_css_fw_info *last_fw = NULL; -/* fw can be NULL */ + /* fw can be NULL */ IA_CSS_ENTER_LEAVE_PRIVATE(""); for (; fw; fw = fw->next) { @@ -3089,24 +3190,24 @@ static const struct ia_css_fw_info *last_output_firmware( } static enum ia_css_err add_firmwares( - struct ia_css_pipeline *me, - struct ia_css_binary *binary, - const struct ia_css_fw_info *fw, - const struct ia_css_fw_info *last_fw, - unsigned int binary_mode, - struct ia_css_frame *in_frame, - struct ia_css_frame *out_frame, - struct ia_css_frame *vf_frame, - struct ia_css_pipeline_stage **my_stage, - struct ia_css_pipeline_stage **vf_stage) + struct ia_css_pipeline *me, + struct ia_css_binary *binary, + const struct ia_css_fw_info *fw, + const struct ia_css_fw_info *last_fw, + unsigned int binary_mode, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_frame *vf_frame, + struct ia_css_pipeline_stage **my_stage, + struct ia_css_pipeline_stage **vf_stage) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_pipeline_stage *extra_stage = NULL; struct ia_css_pipeline_stage_desc stage_desc; -/* all args can be NULL ??? */ + /* all args can be NULL ??? */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "add_firmwares() enter:\n"); + "add_firmwares() enter:\n"); for (; fw; fw = fw->next) { struct ia_css_frame *out[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; @@ -3123,10 +3224,10 @@ static enum ia_css_err add_firmwares( vf = vf_frame; } ia_css_pipe_get_firmwares_stage_desc(&stage_desc, binary, - out, in, vf, fw, binary_mode); + out, in, vf, fw, binary_mode); err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - &extra_stage); + &stage_desc, + &extra_stage); if (err != IA_CSS_SUCCESS) return err; if (fw->info.isp.sp.enable.output != 0) @@ -3141,11 +3242,11 @@ static enum ia_css_err add_firmwares( } static enum ia_css_err add_vf_pp_stage( - struct ia_css_pipe *pipe, - struct ia_css_frame *in_frame, - struct ia_css_frame *out_frame, - struct ia_css_binary *vf_pp_binary, - struct ia_css_pipeline_stage **vf_pp_stage) + struct ia_css_pipe *pipe, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_binary *vf_pp_binary, + struct ia_css_pipeline_stage **vf_pp_stage) { struct ia_css_pipeline *me = NULL; const struct ia_css_fw_info *last_fw = NULL; @@ -3153,7 +3254,7 @@ static enum ia_css_err add_vf_pp_stage( struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; struct ia_css_pipeline_stage_desc stage_desc; -/* out_frame can be NULL ??? */ + /* out_frame can be NULL ??? */ if (!pipe) return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -3168,7 +3269,7 @@ static enum ia_css_err add_vf_pp_stage( me = &pipe->pipeline; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "add_vf_pp_stage() enter:\n"); + "add_vf_pp_stage() enter:\n"); *vf_pp_stage = NULL; @@ -3177,11 +3278,11 @@ static enum ia_css_err add_vf_pp_stage( if (last_fw) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, vf_pp_binary, - out_frames, in_frame, NULL); + out_frames, in_frame, NULL); } else { ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); ia_css_pipe_get_generic_stage_desc(&stage_desc, vf_pp_binary, - out_frames, in_frame, NULL); + out_frames, in_frame, NULL); } err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, vf_pp_stage); if (err != IA_CSS_SUCCESS) @@ -3196,13 +3297,13 @@ static enum ia_css_err add_vf_pp_stage( } static enum ia_css_err add_yuv_scaler_stage( - struct ia_css_pipe *pipe, - struct ia_css_pipeline *me, - struct ia_css_frame *in_frame, - struct ia_css_frame *out_frame, - struct ia_css_frame *internal_out_frame, - struct ia_css_binary *yuv_scaler_binary, - struct ia_css_pipeline_stage **pre_vf_pp_stage) + struct ia_css_pipe *pipe, + struct ia_css_pipeline *me, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_frame *internal_out_frame, + struct ia_css_binary *yuv_scaler_binary, + struct ia_css_pipeline_stage **pre_vf_pp_stage) { const struct ia_css_fw_info *last_fw; enum ia_css_err err = IA_CSS_SUCCESS; @@ -3217,7 +3318,7 @@ static enum ia_css_err add_yuv_scaler_stage( assert(yuv_scaler_binary); assert(pre_vf_pp_stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "add_yuv_scaler_stage() enter:\n"); + "add_yuv_scaler_stage() enter:\n"); *pre_vf_pp_stage = NULL; ia_css_pipe_util_create_output_frames(out_frames); @@ -3227,12 +3328,12 @@ static enum ia_css_err add_yuv_scaler_stage( if (last_fw) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, - yuv_scaler_binary, out_frames, in_frame, vf_frame); + yuv_scaler_binary, out_frames, in_frame, vf_frame); } else { ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); ia_css_pipe_util_set_output_frames(out_frames, 1, internal_out_frame); ia_css_pipe_get_generic_stage_desc(&stage_desc, - yuv_scaler_binary, out_frames, in_frame, vf_frame); + yuv_scaler_binary, out_frames, in_frame, vf_frame); } err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, @@ -3246,20 +3347,21 @@ static enum ia_css_err add_yuv_scaler_stage( in_frame, out_frame, vf_frame, NULL, pre_vf_pp_stage); /* If a firmware produce vf_pp output, we set that as vf_pp input */ - (*pre_vf_pp_stage)->args.vf_downscale_log2 = yuv_scaler_binary->vf_downscale_log2; + (*pre_vf_pp_stage)->args.vf_downscale_log2 = + yuv_scaler_binary->vf_downscale_log2; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "add_yuv_scaler_stage() leave:\n"); + "add_yuv_scaler_stage() leave:\n"); return err; } static enum ia_css_err add_capture_pp_stage( - struct ia_css_pipe *pipe, - struct ia_css_pipeline *me, - struct ia_css_frame *in_frame, - struct ia_css_frame *out_frame, - struct ia_css_binary *capture_pp_binary, - struct ia_css_pipeline_stage **capture_pp_stage) + struct ia_css_pipe *pipe, + struct ia_css_pipeline *me, + struct ia_css_frame *in_frame, + struct ia_css_frame *out_frame, + struct ia_css_binary *capture_pp_binary, + struct ia_css_pipeline_stage **capture_pp_stage) { const struct ia_css_fw_info *last_fw = NULL; enum ia_css_err err = IA_CSS_SUCCESS; @@ -3274,24 +3376,24 @@ static enum ia_css_err add_capture_pp_stage( assert(capture_pp_binary); assert(capture_pp_stage); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "add_capture_pp_stage() enter:\n"); + "add_capture_pp_stage() enter:\n"); *capture_pp_stage = NULL; ia_css_pipe_util_create_output_frames(out_frames); last_fw = last_output_firmware(pipe->output_stage); err = ia_css_frame_allocate_from_info(&vf_frame, - &capture_pp_binary->vf_frame_info); + &capture_pp_binary->vf_frame_info); if (err != IA_CSS_SUCCESS) return err; if (last_fw) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, - capture_pp_binary, out_frames, NULL, vf_frame); + capture_pp_binary, out_frames, NULL, vf_frame); } else { ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); ia_css_pipe_get_generic_stage_desc(&stage_desc, - capture_pp_binary, out_frames, NULL, vf_frame); + capture_pp_binary, out_frames, NULL, vf_frame); } err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, @@ -3305,7 +3407,7 @@ static enum ia_css_err add_capture_pp_stage( /* If a firmware produce vf_pp output, we set that as vf_pp input */ if (*capture_pp_stage) { (*capture_pp_stage)->args.vf_downscale_log2 = - capture_pp_binary->vf_downscale_log2; + capture_pp_binary->vf_downscale_log2; } return err; } @@ -3321,21 +3423,20 @@ static void sh_css_setup_queues(void) fw = &sh_css_sp_fw; HIVE_ADDR_host_sp_queues_initialized = - fw->info.sp.host_sp_queues_initialized; + fw->info.sp.host_sp_queues_initialized; ia_css_bufq_init(); /* set "host_sp_queues_initialized" to "true" */ sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(host_sp_queues_initialized), - (uint32_t)(1)); + (unsigned int)sp_address_of(host_sp_queues_initialized), + (uint32_t)(1)); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_setup_queues() leave:\n"); } static enum ia_css_err init_vf_frameinfo_defaults(struct ia_css_pipe *pipe, - struct ia_css_frame *vf_frame, unsigned int idx) -{ + struct ia_css_frame *vf_frame, unsigned int idx) { enum ia_css_err err = IA_CSS_SUCCESS; unsigned int thread_id; enum sh_css_queue_id queue_id; @@ -3357,7 +3458,7 @@ init_vf_frameinfo_defaults(struct ia_css_pipe *pipe, #ifdef USE_INPUT_SYSTEM_VERSION_2401 static unsigned int get_crop_lines_for_bayer_order( - const struct ia_css_stream_config *config) + const struct ia_css_stream_config *config) { assert(config); if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_BGGR) @@ -3369,7 +3470,7 @@ get_crop_lines_for_bayer_order( static unsigned int get_crop_columns_for_bayer_order( - const struct ia_css_stream_config *config) + const struct ia_css_stream_config *config) { assert(config); if ((config->input_config.bayer_order == IA_CSS_BAYER_ORDER_RGGB) @@ -3382,7 +3483,7 @@ get_crop_columns_for_bayer_order( /* This function is to get the sum of all extra pixels in addition to the effective * input, it includes dvs envelop and filter run-in */ static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, - unsigned int *extra_row, unsigned int *extra_column) + unsigned int *extra_row, unsigned int *extra_column) { enum ia_css_pipe_id pipe_id = pipe->mode; unsigned int left_cropping = 0, top_cropping = 0; @@ -3396,26 +3497,34 @@ static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, switch (pipe_id) { case IA_CSS_PIPE_ID_PREVIEW: if (pipe->pipe_settings.preview.preview_binary.info) { - left_cropping = pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.left_cropping; - top_cropping = pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.top_cropping; + left_cropping = + pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.left_cropping; + top_cropping = + pipe->pipe_settings.preview.preview_binary.info->sp.pipeline.top_cropping; } dvs_env = pipe->pipe_settings.preview.preview_binary.dvs_envelope; break; case IA_CSS_PIPE_ID_VIDEO: if (pipe->pipe_settings.video.video_binary.info) { - left_cropping = pipe->pipe_settings.video.video_binary.info->sp.pipeline.left_cropping; - top_cropping = pipe->pipe_settings.video.video_binary.info->sp.pipeline.top_cropping; + left_cropping = + pipe->pipe_settings.video.video_binary.info->sp.pipeline.left_cropping; + top_cropping = + pipe->pipe_settings.video.video_binary.info->sp.pipeline.top_cropping; } dvs_env = pipe->pipe_settings.video.video_binary.dvs_envelope; break; case IA_CSS_PIPE_ID_CAPTURE: for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { if (pipe->pipe_settings.capture.primary_binary[i].info) { - left_cropping += pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.left_cropping; - top_cropping += pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.top_cropping; + left_cropping += + pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.left_cropping; + top_cropping += + pipe->pipe_settings.capture.primary_binary[i].info->sp.pipeline.top_cropping; } - dvs_env.width += pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.width; - dvs_env.height += pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.height; + dvs_env.width += + pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.width; + dvs_env.height += + pipe->pipe_settings.capture.primary_binary[i].dvs_envelope.height; } break; default: @@ -3443,8 +3552,8 @@ ia_css_get_crop_offsets( assert(in_frame); IA_CSS_ENTER_PRIVATE("pipe = %p effective_wd = %u effective_ht = %u", - pipe, pipe->config.input_effective_res.width, - pipe->config.input_effective_res.height); + pipe, pipe->config.input_effective_res.width, + pipe->config.input_effective_res.height); input_res = &pipe->stream->config.input_config.input_res; #ifndef ISP2401 @@ -3492,8 +3601,7 @@ ia_css_get_crop_offsets( static enum ia_css_err init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, - struct ia_css_frame *frame, enum ia_css_frame_format format) -{ + struct ia_css_frame *frame, enum ia_css_frame_format format) { struct ia_css_frame *in_frame; enum ia_css_err err = IA_CSS_SUCCESS; unsigned int thread_id; @@ -3507,13 +3615,13 @@ init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, #ifdef USE_INPUT_SYSTEM_VERSION_2401 if (format == IA_CSS_FRAME_FORMAT_RAW) in_frame->info.format = (pipe->stream->config.pack_raw_pixels) ? - IA_CSS_FRAME_FORMAT_RAW_PACKED : IA_CSS_FRAME_FORMAT_RAW; + IA_CSS_FRAME_FORMAT_RAW_PACKED : IA_CSS_FRAME_FORMAT_RAW; #endif in_frame->info.res.width = pipe->stream->config.input_config.input_res.width; in_frame->info.res.height = pipe->stream->config.input_config.input_res.height; in_frame->info.raw_bit_depth = - ia_css_pipe_util_pipe_input_format_bpp(pipe); + ia_css_pipe_util_pipe_input_format_bpp(pipe); ia_css_frame_info_set_width(&in_frame->info, pipe->stream->config.input_config.input_res.width, 0); in_frame->contiguous = false; in_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; @@ -3527,15 +3635,14 @@ init_in_frameinfo_memory_defaults(struct ia_css_pipe *pipe, err = ia_css_frame_init_planes(in_frame); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "init_in_frameinfo_memory_defaults() bayer_order = %d:\n", in_frame->info.raw_bayer_order); + "init_in_frameinfo_memory_defaults() bayer_order = %d:\n", in_frame->info.raw_bayer_order); return err; } static enum ia_css_err init_out_frameinfo_defaults(struct ia_css_pipe *pipe, - struct ia_css_frame *out_frame, unsigned int idx) -{ + struct ia_css_frame *out_frame, unsigned int idx) { enum ia_css_err err = IA_CSS_SUCCESS; unsigned int thread_id; enum sh_css_queue_id queue_id; @@ -3559,7 +3666,7 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) { struct ia_css_pipeline_stage_desc stage_desc; struct ia_css_binary *copy_binary, *video_binary, - *yuv_scaler_binary, *vf_pp_binary; + *yuv_scaler_binary, *vf_pp_binary; struct ia_css_pipeline_stage *copy_stage = NULL; struct ia_css_pipeline_stage *video_stage = NULL; struct ia_css_pipeline_stage *yuv_scaler_stage = NULL; @@ -3597,16 +3704,19 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) /* When the input system is 2401, always enable 'in_frameinfo_memory' * except for the following: online or continuous */ - need_in_frameinfo_memory = !(pipe->stream->config.online || pipe->stream->config.continuous); + need_in_frameinfo_memory = !(pipe->stream->config.online || + pipe->stream->config.continuous); #else /* Construct in_frame info (only in case we have dynamic input */ - need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + need_in_frameinfo_memory = pipe->stream->config.mode == + IA_CSS_INPUT_MODE_MEMORY; #endif /* Construct in_frame info (only in case we have dynamic input */ if (need_in_frameinfo_memory) { in_frame = &pipe->in_frame_struct; - err = init_in_frameinfo_memory_defaults(pipe, in_frame, IA_CSS_FRAME_FORMAT_RAW); + err = init_in_frameinfo_memory_defaults(pipe, in_frame, + IA_CSS_FRAME_FORMAT_RAW); if (err != IA_CSS_SUCCESS) goto ERR; } @@ -3640,7 +3750,7 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) if (need_copy) { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, NULL, NULL); + out_frames, NULL, NULL); err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, ©_stage); @@ -3658,27 +3768,28 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) #endif } - ia_css_pipe_util_set_output_frames(out_frames, 0, need_yuv_pp ? NULL : out_frame); + ia_css_pipe_util_set_output_frames(out_frames, 0, + need_yuv_pp ? NULL : out_frame); /* when the video binary supports a second output pin, it can directly produce the vf_frame. */ if (need_vf_pp) { ia_css_pipe_get_generic_stage_desc(&stage_desc, video_binary, - out_frames, in_frame, NULL); + out_frames, in_frame, NULL); } else { ia_css_pipe_get_generic_stage_desc(&stage_desc, video_binary, - out_frames, in_frame, vf_frame); + out_frames, in_frame, vf_frame); } err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - &video_stage); + &stage_desc, + &video_stage); if (err != IA_CSS_SUCCESS) goto ERR; /* If we use copy iso video, the input must be yuv iso raw */ if (video_stage) { video_stage->args.copy_vf = - video_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; + video_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; video_stage->args.copy_output = video_stage->args.copy_vf; } @@ -3699,18 +3810,17 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) for (frm = 0; frm < NUM_TNR_FRAMES; frm++) { #endif video_stage->args.tnr_frames[frm] = - pipe->pipe_settings.video.tnr_frames[frm]; + pipe->pipe_settings.video.tnr_frames[frm]; } for (frm = 0; frm < MAX_NUM_VIDEO_DELAY_FRAMES; frm++) { video_stage->args.delay_frames[frm] = - pipe->pipe_settings.video.delay_frames[frm]; + pipe->pipe_settings.video.delay_frames[frm]; } } /* Append Extension on Video out, if enabled */ if (!need_vf_pp && video_stage && pipe->config.acc_extension && - (pipe->config.acc_extension->info.isp.type == IA_CSS_ACC_OUTPUT)) - { + (pipe->config.acc_extension->info.isp.type == IA_CSS_ACC_OUTPUT)) { struct ia_css_frame *out = NULL; struct ia_css_frame *in = NULL; @@ -3726,9 +3836,9 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) } err = add_firmwares(me, video_binary, pipe->output_stage, - last_output_firmware(pipe->output_stage), - IA_CSS_BINARY_MODE_VIDEO, - in, out, NULL, &video_stage, NULL); + last_output_firmware(pipe->output_stage), + IA_CSS_BINARY_MODE_VIDEO, + in, out, NULL, &video_stage, NULL); if (err != IA_CSS_SUCCESS) goto ERR; } @@ -3759,7 +3869,8 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) } pipe->pipeline.acquire_isp_each_stage = false; - ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + ia_css_pipeline_finalize_stages(&pipe->pipeline, + pipe->stream->config.continuous); ERR: IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -3767,14 +3878,14 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) } static enum ia_css_err -create_host_acc_pipeline(struct ia_css_pipe *pipe) -{ +create_host_acc_pipeline(struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; const struct ia_css_fw_info *fw; unsigned int i; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (!pipe->stream)) { + if ((!pipe) || (!pipe->stream)) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -3782,16 +3893,18 @@ create_host_acc_pipeline(struct ia_css_pipe *pipe) pipe->pipeline.num_execs = pipe->config.acc_num_execs; /* Reset pipe_qos_config to default disable all QOS extension stages */ if (pipe->config.acc_extension) - pipe->pipeline.pipe_qos_config = 0; + pipe->pipeline.pipe_qos_config = 0; fw = pipe->vf_stage; - for (i = 0; fw; fw = fw->next) { + for (i = 0; fw; fw = fw->next) + { err = sh_css_pipeline_add_acc_stage(&pipe->pipeline, fw); if (err != IA_CSS_SUCCESS) goto ERR; } - for (i = 0; i < pipe->config.num_acc_stages; i++) { + for (i = 0; i < pipe->config.num_acc_stages; i++) + { struct ia_css_fw_info *fw = pipe->config.acc_stages[i]; err = sh_css_pipeline_add_acc_stage(&pipe->pipeline, fw); @@ -3808,8 +3921,7 @@ create_host_acc_pipeline(struct ia_css_pipe *pipe) /* Create stages for preview */ static enum ia_css_err -create_host_preview_pipeline(struct ia_css_pipe *pipe) -{ +create_host_preview_pipeline(struct ia_css_pipe *pipe) { struct ia_css_pipeline_stage *copy_stage = NULL; struct ia_css_pipeline_stage *preview_stage = NULL; struct ia_css_pipeline_stage *vf_pp_stage = NULL; @@ -3829,7 +3941,8 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) #endif IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -3852,18 +3965,21 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) online = pipe->stream->config.online; continuous = pipe->stream->config.continuous; need_in_frameinfo_memory = - !((sensor && (online || continuous)) || (buffered_sensor && (online || continuous))); + !((sensor && (online || continuous)) || (buffered_sensor && (online || continuous))); #else /* Construct in_frame info (only in case we have dynamic input */ need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - if (need_in_frameinfo_memory) { - err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, IA_CSS_FRAME_FORMAT_RAW); + if (need_in_frameinfo_memory) + { + err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, + IA_CSS_FRAME_FORMAT_RAW); if (err != IA_CSS_SUCCESS) goto ERR; in_frame = &me->in_frame; - } else { + } else + { in_frame = NULL; } @@ -3877,20 +3993,23 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) if (pipe->pipe_settings.preview.vf_pp_binary.info) vf_pp_binary = &pipe->pipe_settings.preview.vf_pp_binary; - if (pipe->pipe_settings.preview.copy_binary.info) { + if (pipe->pipe_settings.preview.copy_binary.info) + { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, NULL, NULL); + out_frames, NULL, NULL); err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ©_stage); + &stage_desc, + ©_stage); if (err != IA_CSS_SUCCESS) goto ERR; in_frame = me->stages->args.out_frame[0]; #ifndef ISP2401 - } else { + } else + { #else - } else if (pipe->stream->config.continuous) { + } else if (pipe->stream->config.continuous) + { #endif #ifdef USE_INPUT_SYSTEM_VERSION_2401 /* When continuous is enabled, configure in_frame with the @@ -3904,14 +4023,16 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) #endif } - if (vf_pp_binary) { + if (vf_pp_binary) + { ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, preview_binary, - out_frames, in_frame, NULL); - } else { + out_frames, in_frame, NULL); + } else + { ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); ia_css_pipe_get_generic_stage_desc(&stage_desc, preview_binary, - out_frames, in_frame, NULL); + out_frames, in_frame, NULL); } err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, @@ -3920,20 +4041,22 @@ create_host_preview_pipeline(struct ia_css_pipe *pipe) goto ERR; /* If we use copy iso preview, the input must be yuv iso raw */ preview_stage->args.copy_vf = - preview_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; + preview_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY; preview_stage->args.copy_output = !preview_stage->args.copy_vf; - if (preview_stage->args.copy_vf && !preview_stage->args.out_vf_frame) { + if (preview_stage->args.copy_vf && !preview_stage->args.out_vf_frame) + { /* in case of copy, use the vf frame as output frame */ preview_stage->args.out_vf_frame = - preview_stage->args.out_frame[0]; + preview_stage->args.out_frame[0]; } - if (vf_pp_binary) { + if (vf_pp_binary) + { if (preview_binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_COPY) in_frame = preview_stage->args.out_vf_frame; else in_frame = preview_stage->args.out_frame[0]; err = add_vf_pp_stage(pipe, in_frame, out_frame, vf_pp_binary, - &vf_pp_stage); + &vf_pp_stage); if (err != IA_CSS_SUCCESS) goto ERR; } @@ -3952,14 +4075,14 @@ static void send_raw_frames(struct ia_css_pipe *pipe) unsigned int i; sh_css_update_host2sp_cont_num_raw_frames - (pipe->stream->config.init_num_cont_raw_buf, true); + (pipe->stream->config.init_num_cont_raw_buf, true); sh_css_update_host2sp_cont_num_raw_frames - (pipe->stream->config.target_num_cont_raw_buf, false); + (pipe->stream->config.target_num_cont_raw_buf, false); /* Hand-over all the SP-internal buffers */ for (i = 0; i < pipe->stream->config.init_num_cont_raw_buf; i++) { sh_css_update_host2sp_offline_frame(i, - pipe->continuous_frames[i], pipe->cont_md_buffers[i]); + pipe->continuous_frames[i], pipe->cont_md_buffers[i]); } } @@ -3967,8 +4090,7 @@ static void send_raw_frames(struct ia_css_pipe *pipe) } static enum ia_css_err -preview_start(struct ia_css_pipe *pipe) -{ +preview_start(struct ia_css_pipe *pipe) { struct ia_css_pipeline *me; struct ia_css_binary *copy_binary, *preview_binary, *vf_pp_binary = NULL; enum ia_css_err err = IA_CSS_SUCCESS; @@ -3978,7 +4100,8 @@ preview_start(struct ia_css_pipe *pipe) enum ia_css_input_mode preview_pipe_input_mode; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) { + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4012,40 +4135,43 @@ preview_start(struct ia_css_pipe *pipe) ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); copy_ovrd = 1 << thread_id; - if (pipe->stream->cont_capt) { - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), &thread_id); + if (pipe->stream->cont_capt) + { + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), + &thread_id); copy_ovrd |= 1 << thread_id; } } /* Construct and load the copy pipe */ - if (pipe->stream->config.continuous) { + if (pipe->stream->config.continuous) + { sh_css_sp_init_pipeline(©_pipe->pipeline, - IA_CSS_PIPE_ID_COPY, - (uint8_t)ia_css_pipe_get_pipe_num(copy_pipe), - false, - pipe->stream->config.pixels_per_clock == 2, false, - false, pipe->required_bds_factor, - copy_ovrd, - pipe->stream->config.mode, - &pipe->stream->config.metadata_config, + IA_CSS_PIPE_ID_COPY, + (uint8_t)ia_css_pipe_get_pipe_num(copy_pipe), + false, + pipe->stream->config.pixels_per_clock == 2, false, + false, pipe->required_bds_factor, + copy_ovrd, + pipe->stream->config.mode, + &pipe->stream->config.metadata_config, #ifndef ISP2401 - &pipe->stream->info.metadata_info + &pipe->stream->info.metadata_info #else - &pipe->stream->info.metadata_info, + &pipe->stream->info.metadata_info, #endif #if !defined(HAS_NO_INPUT_SYSTEM) #ifndef ISP2401 - , pipe->stream->config.source.port.port + , pipe->stream->config.source.port.port #else - pipe->stream->config.source.port.port, + pipe->stream->config.source.port.port, #endif #endif #ifndef ISP2401 - ); + ); #else - & pipe->config.internal_frame_origin_bqs_on_sctbl, - pipe->stream->isp_params_configs); + & pipe->config.internal_frame_origin_bqs_on_sctbl, + pipe->stream->isp_params_configs); #endif /* make the preview pipe start with mem mode input, copy handles @@ -4054,67 +4180,69 @@ preview_start(struct ia_css_pipe *pipe) } /* Construct and load the capture pipe */ - if (pipe->stream->cont_capt) { + if (pipe->stream->cont_capt) + { sh_css_sp_init_pipeline(&capture_pipe->pipeline, - IA_CSS_PIPE_ID_CAPTURE, - (uint8_t)ia_css_pipe_get_pipe_num(capture_pipe), - capture_pipe->config.default_capture_config.enable_xnr != 0, - capture_pipe->stream->config.pixels_per_clock == 2, - true, /* continuous */ - false, /* offline */ - capture_pipe->required_bds_factor, - 0, - IA_CSS_INPUT_MODE_MEMORY, - &pipe->stream->config.metadata_config, + IA_CSS_PIPE_ID_CAPTURE, + (uint8_t)ia_css_pipe_get_pipe_num(capture_pipe), + capture_pipe->config.default_capture_config.enable_xnr != 0, + capture_pipe->stream->config.pixels_per_clock == 2, + true, /* continuous */ + false, /* offline */ + capture_pipe->required_bds_factor, + 0, + IA_CSS_INPUT_MODE_MEMORY, + &pipe->stream->config.metadata_config, #ifndef ISP2401 - &pipe->stream->info.metadata_info + &pipe->stream->info.metadata_info #else - &pipe->stream->info.metadata_info, + &pipe->stream->info.metadata_info, #endif #if !defined(HAS_NO_INPUT_SYSTEM) #ifndef ISP2401 - , (enum mipi_port_id)0 + , (enum mipi_port_id)0 #else - (enum mipi_port_id)0, + (enum mipi_port_id)0, #endif #endif #ifndef ISP2401 - ); + ); #else - & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, - capture_pipe->stream->isp_params_configs); + & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, + capture_pipe->stream->isp_params_configs); #endif } - if (acc_pipe) { + if (acc_pipe) + { sh_css_sp_init_pipeline(&acc_pipe->pipeline, - IA_CSS_PIPE_ID_ACC, - (uint8_t)ia_css_pipe_get_pipe_num(acc_pipe), - false, - pipe->stream->config.pixels_per_clock == 2, - false, /* continuous */ - false, /* offline */ - pipe->required_bds_factor, - 0, - IA_CSS_INPUT_MODE_MEMORY, - NULL, + IA_CSS_PIPE_ID_ACC, + (uint8_t)ia_css_pipe_get_pipe_num(acc_pipe), + false, + pipe->stream->config.pixels_per_clock == 2, + false, /* continuous */ + false, /* offline */ + pipe->required_bds_factor, + 0, + IA_CSS_INPUT_MODE_MEMORY, + NULL, #ifndef ISP2401 - NULL + NULL #else - NULL, + NULL, #endif #if !defined(HAS_NO_INPUT_SYSTEM) #ifndef ISP2401 - , (enum mipi_port_id)0 + , (enum mipi_port_id)0 #else - (enum mipi_port_id)0, + (enum mipi_port_id)0, #endif #endif #ifndef ISP2401 - ); + ); #else - & pipe->config.internal_frame_origin_bqs_on_sctbl, - pipe->stream->isp_params_configs); + & pipe->config.internal_frame_origin_bqs_on_sctbl, + pipe->stream->isp_params_configs); #endif } @@ -4129,8 +4257,7 @@ preview_start(struct ia_css_pipe *pipe) enum ia_css_err ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, - const struct ia_css_buffer *buffer) -{ + const struct ia_css_buffer *buffer) { enum ia_css_err return_err = IA_CSS_SUCCESS; unsigned int thread_id; enum sh_css_queue_id queue_id; @@ -4145,7 +4272,8 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer); - if ((!pipe) || (!buffer)) { + if ((!pipe) || (!buffer)) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4154,12 +4282,13 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, /* following code will be enabled when IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME is removed */ #if 0 - if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { + if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) + { bool found_pipe = false; for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { if ((buffer->data.frame->info.res.width == pipe->output_info[i].res.width) && - (buffer->data.frame->info.res.height == pipe->output_info[i].res.height)) { + (buffer->data.frame->info.res.height == pipe->output_info[i].res.height)) { buf_type += i; found_pipe = true; break; @@ -4168,12 +4297,13 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, if (!found_pipe) return IA_CSS_ERR_INVALID_ARGUMENTS; } - if (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) { + if (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) + { bool found_pipe = false; for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { if ((buffer->data.frame->info.res.width == pipe->vf_output_info[i].res.width) && - (buffer->data.frame->info.res.height == pipe->vf_output_info[i].res.height)) { + (buffer->data.frame->info.res.height == pipe->vf_output_info[i].res.height)) { buf_type += i; found_pipe = true; break; @@ -4191,29 +4321,34 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, assert(buf_type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE); if ((buf_type == IA_CSS_BUFFER_TYPE_INVALID) || (buf_type >= IA_CSS_NUM_DYNAMIC_BUFFER_TYPE) || - (pipe_id >= IA_CSS_PIPE_ID_NUM)) { + (pipe_id >= IA_CSS_PIPE_ID_NUM)) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } ret_err = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - if (!ret_err) { + if (!ret_err) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } ret_err = ia_css_query_internal_queue_id(buf_type, thread_id, &queue_id); - if (!ret_err) { + if (!ret_err) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if ((queue_id <= SH_CSS_INVALID_QUEUE_ID) || (queue_id >= SH_CSS_MAX_NUM_QUEUES)) { + if ((queue_id <= SH_CSS_INVALID_QUEUE_ID) || (queue_id >= SH_CSS_MAX_NUM_QUEUES)) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if (!sh_css_sp_is_running()) { + if (!sh_css_sp_is_running()) + { IA_CSS_LOG("SP is not running!"); IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); /* SP is not running. The queues are not valid */ @@ -4231,21 +4366,24 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, ddr_buffer.cookie_ptr = buffer->driver_cookie; ddr_buffer.timing_data = buffer->timing_data; - if (buf_type == IA_CSS_BUFFER_TYPE_3A_STATISTICS) { + if (buf_type == IA_CSS_BUFFER_TYPE_3A_STATISTICS) + { if (!buffer->data.stats_3a) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.stats_3a); ddr_buffer.payload.s3a = *buffer->data.stats_3a; - } else if (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) { + } else if (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) + { if (!buffer->data.stats_dvs) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.stats_dvs); ddr_buffer.payload.dis = *buffer->data.stats_dvs; - } else if (buf_type == IA_CSS_BUFFER_TYPE_METADATA) { + } else if (buf_type == IA_CSS_BUFFER_TYPE_METADATA) + { if (!buffer->data.metadata) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -4253,10 +4391,11 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, ddr_buffer.kernel_ptr = HOST_ADDRESS(buffer->data.metadata); ddr_buffer.payload.metadata = *buffer->data.metadata; } else if ((buf_type == IA_CSS_BUFFER_TYPE_INPUT_FRAME) - || (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) - || (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) - || (buf_type == IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) - || (buf_type == IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME)) { + || (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) + || (buf_type == IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME)) + { if (!buffer->data.frame) { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -4266,13 +4405,13 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, ddr_buffer.payload.frame.flashed = 0; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipe_enqueue_buffer() buf_type=%d, data(DDR address)=0x%x\n", - buf_type, buffer->data.frame->data); + "ia_css_pipe_enqueue_buffer() buf_type=%d, data(DDR address)=0x%x\n", + buf_type, buffer->data.frame->data); #if CONFIG_ON_FRAME_ENQUEUE() return_err = set_config_on_frame_enqueue( - &buffer->data.frame->info, - &ddr_buffer.payload.frame); + &buffer->data.frame->info, + &ddr_buffer.payload.frame); if (return_err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR(return_err); return return_err; @@ -4291,17 +4430,19 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, assert(h_vbuf); assert(h_vbuf->vptr != 0x0); - if ((!h_vbuf) || (h_vbuf->vptr == 0x0)) { + if ((!h_vbuf) || (h_vbuf->vptr == 0x0)) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } mmgr_store(h_vbuf->vptr, - (void *)(&ddr_buffer), - sizeof(struct sh_css_hmm_buffer)); + (void *)(&ddr_buffer), + sizeof(struct sh_css_hmm_buffer)); if ((buf_type == IA_CSS_BUFFER_TYPE_3A_STATISTICS) - || (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) - || (buf_type == IA_CSS_BUFFER_TYPE_LACE_STATISTICS)) { + || (buf_type == IA_CSS_BUFFER_TYPE_DIS_STATISTICS) + || (buf_type == IA_CSS_BUFFER_TYPE_LACE_STATISTICS)) + { if (!pipeline) { ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &h_vbuf); IA_CSS_LOG("pipeline is empty!"); @@ -4315,8 +4456,8 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, if (STATS_ENABLED(stage)) { /* there is a stage that needs it */ return_err = ia_css_bufq_enqueue_buffer(thread_id, - queue_id, - (uint32_t)h_vbuf->vptr); + queue_id, + (uint32_t)h_vbuf->vptr); } } } else if ((buf_type == IA_CSS_BUFFER_TYPE_INPUT_FRAME) @@ -4324,23 +4465,26 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, || (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME) || (buf_type == IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME) || (buf_type == IA_CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME) - || (buf_type == IA_CSS_BUFFER_TYPE_METADATA)) { + || (buf_type == IA_CSS_BUFFER_TYPE_METADATA)) + { return_err = ia_css_bufq_enqueue_buffer(thread_id, queue_id, (uint32_t)h_vbuf->vptr); #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) - if ((return_err == IA_CSS_SUCCESS) && (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME)) { + if ((return_err == IA_CSS_SUCCESS) && + (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME)) { IA_CSS_LOG("pfp: enqueued OF %d to q %d thread %d", - ddr_buffer.payload.frame.frame_data, - queue_id, thread_id); + ddr_buffer.payload.frame.frame_data, + queue_id, thread_id); } #endif } - if (return_err == IA_CSS_SUCCESS) { + if (return_err == IA_CSS_SUCCESS) + { if (sh_css_hmm_buffer_record_acquire( - h_vbuf, buf_type, - HOST_ADDRESS(ddr_buffer.kernel_ptr))) { + h_vbuf, buf_type, + HOST_ADDRESS(ddr_buffer.kernel_ptr))) { IA_CSS_LOG("send vbuf=%p", h_vbuf); } else { return_err = IA_CSS_ERR_INTERNAL_ERROR; @@ -4352,7 +4496,8 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, * Tell the SP which queues are not empty, * by sending the software event. */ - if (return_err == IA_CSS_SUCCESS) { + if (return_err == IA_CSS_SUCCESS) + { if (!sh_css_sp_is_running()) { /* SP is not running. The queues are not valid */ IA_CSS_LOG("SP is not running!"); @@ -4360,11 +4505,12 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } return_err = ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, - (uint8_t)thread_id, - queue_id, - 0); - } else { + IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, + (uint8_t)thread_id, + queue_id, + 0); + } else + { ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &h_vbuf); IA_CSS_ERROR("buffer not enqueued"); } @@ -4379,8 +4525,7 @@ ia_css_pipe_enqueue_buffer(struct ia_css_pipe *pipe, */ enum ia_css_err ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, - struct ia_css_buffer *buffer) -{ + struct ia_css_buffer *buffer) { enum ia_css_err return_err; enum sh_css_queue_id queue_id; hrt_vaddress ddr_buffer_addr = (hrt_vaddress)0; @@ -4393,7 +4538,8 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, IA_CSS_ENTER("pipe=%p, buffer=%p", pipe, buffer); - if ((!pipe) || (!buffer)) { + if ((!pipe) || (!buffer)) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -4407,23 +4553,27 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, ddr_buffer.kernel_ptr = 0; ret_err = ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - if (!ret_err) { + if (!ret_err) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } ret_err = ia_css_query_internal_queue_id(buf_type, thread_id, &queue_id); - if (!ret_err) { + if (!ret_err) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if ((queue_id <= SH_CSS_INVALID_QUEUE_ID) || (queue_id >= SH_CSS_MAX_NUM_QUEUES)) { + if ((queue_id <= SH_CSS_INVALID_QUEUE_ID) || (queue_id >= SH_CSS_MAX_NUM_QUEUES)) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - if (!sh_css_sp_is_running()) { + if (!sh_css_sp_is_running()) + { IA_CSS_LOG("SP is not running!"); IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); /* SP is not running. The queues are not valid */ @@ -4431,9 +4581,10 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, } return_err = ia_css_bufq_dequeue_buffer(queue_id, - (uint32_t *)&ddr_buffer_addr); + (uint32_t *)&ddr_buffer_addr); - if (return_err == IA_CSS_SUCCESS) { + if (return_err == IA_CSS_SUCCESS) + { struct ia_css_frame *frame; struct sh_css_hmm_buffer_record *hmm_buffer_record = NULL; @@ -4441,7 +4592,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, /* Validate the ddr_buffer_addr and buf_type */ hmm_buffer_record = sh_css_hmm_buffer_record_validate( - ddr_buffer_addr, buf_type); + ddr_buffer_addr, buf_type); if (hmm_buffer_record) { /* valid hmm_buffer_record found. Save the kernel_ptr * for validation after performing mmgr_load. The @@ -4452,14 +4603,14 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, sh_css_hmm_buffer_record_reset(hmm_buffer_record); } else { IA_CSS_ERROR("hmm_buffer_record not found (0x%x) buf_type(%d)", - ddr_buffer_addr, buf_type); + ddr_buffer_addr, buf_type); IA_CSS_LEAVE_ERR(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } mmgr_load(ddr_buffer_addr, - &ddr_buffer, - sizeof(struct sh_css_hmm_buffer)); + &ddr_buffer, + sizeof(struct sh_css_hmm_buffer)); /* if the kernel_ptr is 0 or an invalid, return an error. * do not access the buffer via the kernal_ptr. @@ -4482,7 +4633,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, buffer->timing_data = ddr_buffer.timing_data; if ((buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) || - (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME)) { + (buf_type == IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME)) { buffer->isys_eof_clock_tick.ticks = ddr_buffer.isys_eof_clock_tick; } @@ -4490,8 +4641,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, case IA_CSS_BUFFER_TYPE_INPUT_FRAME: case IA_CSS_BUFFER_TYPE_OUTPUT_FRAME: case IA_CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: - if ((pipe) && (pipe->stop_requested == true)) - { + if ((pipe) && (pipe->stop_requested == true)) { #if defined(USE_INPUT_SYSTEM_VERSION_2) /* free mipi frames only for old input system * for 2401 it is done in ia_css_stream_destroy call @@ -4514,10 +4664,10 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, frame->isp_config_id = ddr_buffer.payload.frame.isp_parameters_id; if (ddr_buffer.payload.frame.flashed == 1) frame->flash_state = - IA_CSS_FRAME_FLASH_STATE_PARTIAL; + IA_CSS_FRAME_FLASH_STATE_PARTIAL; if (ddr_buffer.payload.frame.flashed == 2) frame->flash_state = - IA_CSS_FRAME_FLASH_STATE_FULL; + IA_CSS_FRAME_FLASH_STATE_FULL; frame->valid = pipe->num_invalid_frames == 0; if (!frame->valid) pipe->num_invalid_frames--; @@ -4533,26 +4683,26 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) if (buf_type == IA_CSS_BUFFER_TYPE_OUTPUT_FRAME) { IA_CSS_LOG("pfp: dequeued OF %d with config id %d thread %d", - frame->data, frame->isp_config_id, thread_id); + frame->data, frame->isp_config_id, thread_id); } #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipe_dequeue_buffer() buf_type=%d, data(DDR address)=0x%x\n", - buf_type, buffer->data.frame->data); + "ia_css_pipe_dequeue_buffer() buf_type=%d, data(DDR address)=0x%x\n", + buf_type, buffer->data.frame->data); break; case IA_CSS_BUFFER_TYPE_3A_STATISTICS: buffer->data.stats_3a = - (struct ia_css_isp_3a_statistics *)HOST_ADDRESS(ddr_buffer.kernel_ptr); + (struct ia_css_isp_3a_statistics *)HOST_ADDRESS(ddr_buffer.kernel_ptr); buffer->exp_id = ddr_buffer.payload.s3a.exp_id; buffer->data.stats_3a->exp_id = ddr_buffer.payload.s3a.exp_id; buffer->data.stats_3a->isp_config_id = ddr_buffer.payload.s3a.isp_config_id; break; case IA_CSS_BUFFER_TYPE_DIS_STATISTICS: buffer->data.stats_dvs = - (struct ia_css_isp_dvs_statistics *) - HOST_ADDRESS(ddr_buffer.kernel_ptr); + (struct ia_css_isp_dvs_statistics *) + HOST_ADDRESS(ddr_buffer.kernel_ptr); buffer->exp_id = ddr_buffer.payload.dis.exp_id; buffer->data.stats_dvs->exp_id = ddr_buffer.payload.dis.exp_id; break; @@ -4560,7 +4710,7 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, break; case IA_CSS_BUFFER_TYPE_METADATA: buffer->data.metadata = - (struct ia_css_metadata *)HOST_ADDRESS(ddr_buffer.kernel_ptr); + (struct ia_css_metadata *)HOST_ADDRESS(ddr_buffer.kernel_ptr); buffer->exp_id = ddr_buffer.payload.metadata.exp_id; buffer->data.metadata->exp_id = ddr_buffer.payload.metadata.exp_id; break; @@ -4575,7 +4725,8 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, * Tell the SP which queues are not full, * by sending the software event. */ - if (return_err == IA_CSS_SUCCESS) { + if (return_err == IA_CSS_SUCCESS) + { if (!sh_css_sp_is_running()) { IA_CSS_LOG("SP is not running!"); IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); @@ -4583,10 +4734,10 @@ ia_css_pipe_dequeue_buffer(struct ia_css_pipe *pipe, return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, - 0, - queue_id, - 0); + IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, + 0, + queue_id, + 0); } IA_CSS_LEAVE("buffer=%p", buffer); @@ -4624,14 +4775,12 @@ static enum ia_css_event_type convert_event_sp_to_host_domain[] = { }; enum ia_css_err -ia_css_dequeue_event(struct ia_css_event *event) -{ +ia_css_dequeue_event(struct ia_css_event *event) { return ia_css_dequeue_psys_event(event); } enum ia_css_err -ia_css_dequeue_psys_event(struct ia_css_event *event) -{ +ia_css_dequeue_psys_event(struct ia_css_event *event) { enum ia_css_pipe_id pipe_id = 0; u8 payload[4] = {0, 0, 0, 0}; enum ia_css_err ret_err; @@ -4646,7 +4795,8 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) if (!event) return IA_CSS_ERR_INVALID_ARGUMENTS; - if (!sh_css_sp_is_running()) { + if (!sh_css_sp_is_running()) + { /* SP is not running. The queues are not valid */ return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -4660,7 +4810,7 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) /* Tell the SP that we dequeued an event from the event queue. */ ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); + IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); /* Events are decoded into 4 bytes of payload, the first byte * contains the sp event type. This is converted to a host enum. @@ -4676,7 +4826,8 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) event->timer_code = 0; event->timer_subcode = 0; - if (event->type == IA_CSS_EVENT_TYPE_TIMER) { + if (event->type == IA_CSS_EVENT_TYPE_TIMER) + { /* timer event ??? get the 2nd event and decode the data into the event struct */ u32 tmp_data; /* 1st event: LSB 16-bit timer data and code */ @@ -4692,9 +4843,9 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) return ret_err; } ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); + IA_CSS_PSYS_SW_EVENT_EVENT_DEQUEUED, 0, 0, 0); event->type = convert_event_sp_to_host_domain[payload[0]]; - /* It's a timer */ + /* It's a timer */ if (event->type == IA_CSS_EVENT_TYPE_TIMER) { /* 2nd event data: MSB 16-bit timer and subcode */ tmp_data = ((payload[1] & 0xFF) | ((payload[3] & 0xFF) << 8)); @@ -4713,20 +4864,24 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) IA_CSS_ERROR("Missing 2nd timer event. Timer event discarded"); } } - if (event->type == IA_CSS_EVENT_TYPE_PORT_EOF) { + if (event->type == IA_CSS_EVENT_TYPE_PORT_EOF) + { event->port = (enum mipi_port_id)payload[1]; event->exp_id = payload[3]; - } else if (event->type == IA_CSS_EVENT_TYPE_FW_WARNING) { + } else if (event->type == IA_CSS_EVENT_TYPE_FW_WARNING) + { event->fw_warning = (enum ia_css_fw_warning)payload[1]; /* exp_id is only available in these warning types */ if (event->fw_warning == IA_CSS_FW_WARNING_EXP_ID_LOCKED || event->fw_warning == IA_CSS_FW_WARNING_TAG_EXP_ID_FAILED) event->exp_id = payload[3]; - } else if (event->type == IA_CSS_EVENT_TYPE_FW_ASSERT) { + } else if (event->type == IA_CSS_EVENT_TYPE_FW_ASSERT) + { event->fw_assert_module_id = payload[1]; /* module */ event->fw_assert_line_no = (payload[2] << 8) + payload[3]; /* payload[2] is line_no>>8, payload[3] is line_no&0xff */ - } else if (event->type != IA_CSS_EVENT_TYPE_TIMER) { + } else if (event->type != IA_CSS_EVENT_TYPE_TIMER) + { /* pipe related events. * payload[1] contains the pipe_num, * payload[2] contains the pipe_id. These are different. */ @@ -4743,7 +4898,7 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) n = event->pipe->stream->num_pipes; for (i = 0; i < n; i++) { struct ia_css_pipe *p = - event->pipe->stream->pipes[i]; + event->pipe->stream->pipes[i]; if (p->config.mode == IA_CSS_PIPE_MODE_CAPTURE) { event->pipe = p; break; @@ -4756,9 +4911,9 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) u32 stage_num = (uint32_t)payload[3]; ret_err = ia_css_pipeline_get_fw_from_stage( - &event->pipe->pipeline, - stage_num, - &event->fw_handle); + &event->pipe->pipeline, + stage_num, + &event->fw_handle); if (ret_err != IA_CSS_SUCCESS) { IA_CSS_ERROR("Invalid stage num received for ACC event. stage_num:%u", stage_num); @@ -4776,8 +4931,7 @@ ia_css_dequeue_psys_event(struct ia_css_event *event) } enum ia_css_err -ia_css_dequeue_isys_event(struct ia_css_event *event) -{ +ia_css_dequeue_isys_event(struct ia_css_event *event) { u8 payload[4] = {0, 0, 0, 0}; enum ia_css_err err = IA_CSS_SUCCESS; @@ -4787,7 +4941,8 @@ ia_css_dequeue_isys_event(struct ia_css_event *event) if (!event) return IA_CSS_ERR_INVALID_ARGUMENTS; - if (!sh_css_sp_is_running()) { + if (!sh_css_sp_is_running()) + { /* SP is not running. The queues are not valid */ return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } @@ -4819,12 +4974,11 @@ acc_start(struct ia_css_pipe *pipe) assert(pipe->stream); start_pipe(pipe, SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD, - pipe->stream->config.mode); + pipe->stream->config.mode); } static enum ia_css_err -sh_css_pipe_start(struct ia_css_stream *stream) -{ +sh_css_pipe_start(struct ia_css_stream *stream) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_pipe *pipe; @@ -4833,19 +4987,22 @@ sh_css_pipe_start(struct ia_css_stream *stream) IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (!stream) { + if (!stream) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } pipe = stream->last_pipe; - if (!pipe) { + if (!pipe) + { IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } pipe_id = pipe->mode; - if (stream->started == true) { + if (stream->started == true) + { IA_CSS_WARNING("Cannot start stream that is already started"); IA_CSS_LEAVE_ERR(err); return err; @@ -4853,7 +5010,8 @@ sh_css_pipe_start(struct ia_css_stream *stream) pipe->stop_requested = false; - switch (pipe_id) { + switch (pipe_id) + { case IA_CSS_PIPE_ID_PREVIEW: err = preview_start(pipe); break; @@ -4873,7 +5031,8 @@ sh_css_pipe_start(struct ia_css_stream *stream) err = IA_CSS_ERR_INVALID_ARGUMENTS; } /* DH regular multi pipe - not continuous mode: start the next pipes too */ - if (!stream->config.continuous) { + if (!stream->config.continuous) + { int i; for (i = 1; i < stream->num_pipes && IA_CSS_SUCCESS == err ; i++) { @@ -4903,7 +5062,8 @@ sh_css_pipe_start(struct ia_css_stream *stream) } } } - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } @@ -4913,10 +5073,11 @@ sh_css_pipe_start(struct ia_css_stream *stream) * don't use ISP parameters anyway. So this should be okay. * The SP binary (jpeg) copy does not use any parameters. */ - if (!copy_on_sp(pipe)) { + if (!copy_on_sp(pipe)) + { sh_css_invalidate_params(stream); err = sh_css_param_update_isp_params(pipe, - stream->isp_params_configs, true, NULL); + stream->isp_params_configs, true, NULL); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -4927,7 +5088,8 @@ sh_css_pipe_start(struct ia_css_stream *stream) ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - if (!sh_css_sp_is_running()) { + if (!sh_css_sp_is_running()) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); /* SP is not running. The queues are not valid */ return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; @@ -4936,21 +5098,23 @@ sh_css_pipe_start(struct ia_css_stream *stream) (uint8_t)thread_id, 0, 0); /* DH regular multi pipe - not continuous mode: enqueue event to the next pipes too */ - if (!stream->config.continuous) { + if (!stream->config.continuous) + { int i; for (i = 1; i < stream->num_pipes; i++) { ia_css_pipeline_get_sp_thread_id( - ia_css_pipe_get_pipe_num(stream->pipes[i]), - &thread_id); + ia_css_pipe_get_pipe_num(stream->pipes[i]), + &thread_id); ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_START_STREAM, - (uint8_t)thread_id, 0, 0); + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); } } /* in case of continuous capture mode, we also start capture thread and copy thread*/ - if (pipe->stream->config.continuous) { + if (pipe->stream->config.continuous) + { struct ia_css_pipe *copy_pipe = NULL; if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) @@ -4962,13 +5126,15 @@ sh_css_pipe_start(struct ia_css_stream *stream) IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(copy_pipe), &thread_id); - /* by the time we reach here q is initialized and handle is available.*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(copy_pipe), + &thread_id); + /* by the time we reach here q is initialized and handle is available.*/ ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_START_STREAM, - (uint8_t)thread_id, 0, 0); + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); } - if (pipe->stream->cont_capt) { + if (pipe->stream->cont_capt) + { struct ia_css_pipe *capture_pipe = NULL; if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) @@ -4980,25 +5146,28 @@ sh_css_pipe_start(struct ia_css_stream *stream) IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); return IA_CSS_ERR_INTERNAL_ERROR; } - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), &thread_id); - /* by the time we reach here q is initialized and handle is available.*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), + &thread_id); + /* by the time we reach here q is initialized and handle is available.*/ ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_START_STREAM, - (uint8_t)thread_id, 0, 0); + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); } /* in case of PREVIEW mode, check whether QOS acc_pipe is available, then start the qos pipe */ - if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) { + if (pipe_id == IA_CSS_PIPE_ID_PREVIEW) + { struct ia_css_pipe *acc_pipe = NULL; acc_pipe = pipe->pipe_settings.preview.acc_pipe; if (acc_pipe) { - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(acc_pipe), &thread_id); + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(acc_pipe), + &thread_id); /* by the time we reach here q is initialized and handle is available.*/ ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_START_STREAM, - (uint8_t)thread_id, 0, 0); + IA_CSS_PSYS_SW_EVENT_START_STREAM, + (uint8_t)thread_id, 0, 0); } } @@ -5012,10 +5181,10 @@ sh_css_pipe_start(struct ia_css_stream *stream) void sh_css_enable_cont_capt(bool enable, bool stop_copy_preview) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_enable_cont_capt() enter: enable=%d\n", enable); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_enable_cont_capt() enter: enable=%d\n", enable); //my_css.cont_capt = enable; - my_css.stop_copy_preview = stop_copy_preview; + my_css.stop_copy_preview = stop_copy_preview; } bool @@ -5045,7 +5214,8 @@ sh_css_pipes_stop(struct ia_css_stream *stream) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); #else assert(stream); - if (!stream) { + if (!stream) + { IA_CSS_LOG("stream does NOT exist!"); err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; @@ -5056,14 +5226,15 @@ sh_css_pipes_stop(struct ia_css_stream *stream) pipe = find_pipe_by_num(pipe_num); continuous = pipe && pipe->stream->config.continuous; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_continuous_is_enabled() leave: enable=%d\n", - continuous); + "sh_css_continuous_is_enabled() leave: enable=%d\n", + continuous); return continuous; } #else main_pipe = stream->last_pipe; assert(main_pipe); - if (!main_pipe) { + if (!main_pipe) + { IA_CSS_LOG("main_pipe does NOT exist!"); err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; @@ -5072,8 +5243,8 @@ sh_css_pipes_stop(struct ia_css_stream *stream) #ifndef ISP2401 enum ia_css_err -ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) -{ +ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, + int *buffer_depth) { if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_max_buffer_depth() enter: void\n"); @@ -5082,14 +5253,13 @@ ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_dep return IA_CSS_SUCCESS; } #else - main_pipe_id = main_pipe->mode; - IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); +main_pipe_id = main_pipe->mode; +IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); #endif #ifndef ISP2401 enum ia_css_err -ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) -{ +ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n", buffer_depth); (void)stream; if (buffer_depth > NUM_CONTINUOUS_FRAMES || buffer_depth < 1) @@ -5100,80 +5270,82 @@ ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) return IA_CSS_SUCCESS; } #else - /* - * Stop all "ia_css_pipe" instances in this target - * "ia_css_stream" instance. - */ - for (i = 0; i < stream->num_pipes; i++) { - /* send the "stop" request to the "ia_css_pipe" instance */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - stream->pipes[i]->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(&stream->pipes[i]->pipeline); +/* + * Stop all "ia_css_pipe" instances in this target + * "ia_css_stream" instance. + */ +for (i = 0; i < stream->num_pipes; i++) +{ + /* send the "stop" request to the "ia_css_pipe" instance */ + IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", + stream->pipes[i]->pipeline.pipe_id); + err = ia_css_pipeline_request_stop(&stream->pipes[i]->pipeline); #endif #ifndef ISP2401 enum ia_css_err -ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) -{ +ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, + int *buffer_depth) { if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); #else - /* - * Exit this loop if "ia_css_pipeline_request_stop()" - * returns the error code. - * - * The error code would be generated in the following - * two cases: - * (1) The Scalar Processor has already been stopped. - * (2) The "Host->SP" event queue is full. - * - * As the convention of using CSS API 2.0/2.1, such CSS - * error code would be propogated from the CSS-internal - * API returned value to the CSS API returned value. Then - * the CSS driver should capture these error code and - * handle it in the driver exception handling mechanism. - */ - if (err != IA_CSS_SUCCESS) { - goto ERR; - } - } - - /* - * In the CSS firmware use scenario "Continuous Preview" - * as well as "Continuous Video", the "ia_css_pipe" instance - * "Copy Pipe" is activated. This "Copy Pipe" is private to - * the CSS firmware so that it is not listed in the target - * "ia_css_stream" instance. - * - * We need to stop this "Copy Pipe", as well. - */ - if (main_pipe->stream->config.continuous) { - struct ia_css_pipe *copy_pipe = NULL; +/* + * Exit this loop if "ia_css_pipeline_request_stop()" + * returns the error code. + * + * The error code would be generated in the following + * two cases: + * (1) The Scalar Processor has already been stopped. + * (2) The "Host->SP" event queue is full. + * + * As the convention of using CSS API 2.0/2.1, such CSS + * error code would be propogated from the CSS-internal + * API returned value to the CSS API returned value. Then + * the CSS driver should capture these error code and + * handle it in the driver exception handling mechanism. + */ +if (err != IA_CSS_SUCCESS) { + goto ERR; +} +} - /* get the reference to "Copy Pipe" */ - if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) - copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; - else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) - copy_pipe = main_pipe->pipe_settings.video.copy_pipe; +/* + * In the CSS firmware use scenario "Continuous Preview" + * as well as "Continuous Video", the "ia_css_pipe" instance + * "Copy Pipe" is activated. This "Copy Pipe" is private to + * the CSS firmware so that it is not listed in the target + * "ia_css_stream" instance. + * + * We need to stop this "Copy Pipe", as well. + */ +if (main_pipe->stream->config.continuous) +{ + struct ia_css_pipe *copy_pipe = NULL; - /* return the error code if "Copy Pipe" does NOT exist */ - assert(copy_pipe); - if (!copy_pipe) { - IA_CSS_LOG("Copy Pipe does NOT exist!"); - err = IA_CSS_ERR_INTERNAL_ERROR; - goto ERR; - } + /* get the reference to "Copy Pipe" */ + if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) + copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; + else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) + copy_pipe = main_pipe->pipe_settings.video.copy_pipe; - /* send the "stop" request to "Copy Pipe" */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - copy_pipe->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(©_pipe->pipeline); + /* return the error code if "Copy Pipe" does NOT exist */ + assert(copy_pipe); + if (!copy_pipe) { + IA_CSS_LOG("Copy Pipe does NOT exist!"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; } + /* send the "stop" request to "Copy Pipe" */ + IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", + copy_pipe->pipeline.pipe_id); + err = ia_css_pipeline_request_stop(©_pipe->pipeline); +} + ERR: - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; +IA_CSS_LEAVE_ERR_PRIVATE(err); +return err; } /* @@ -5218,8 +5390,8 @@ sh_css_pipes_have_stopped(struct ia_css_stream *stream) for (i = 0; i < stream->num_pipes; i++) { rval = rval && ia_css_pipeline_has_stopped(&stream->pipes[i]->pipeline); IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", - stream->pipes[i]->pipeline.pipe_id, - rval); + stream->pipes[i]->pipeline.pipe_id, + rval); } /* @@ -5252,8 +5424,8 @@ sh_css_pipes_have_stopped(struct ia_css_stream *stream) /* check if "Copy Pipe" has stopped or not */ rval = rval && ia_css_pipeline_has_stopped(©_pipe->pipeline); IA_CSS_LOG("Pipe has stopped: pipe_id=%d, stopped=%d", - copy_pipe->pipeline.pipe_id, - rval); + copy_pipe->pipeline.pipe_id, + rval); } RET: @@ -5267,19 +5439,20 @@ sh_css_continuous_is_enabled(uint8_t pipe_num) struct ia_css_pipe *pipe; bool continuous; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); pipe = find_pipe_by_num(pipe_num); continuous = pipe && pipe->stream->config.continuous; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_continuous_is_enabled() leave: enable=%d\n", - continuous); + "sh_css_continuous_is_enabled() leave: enable=%d\n", + continuous); return continuous; } enum ia_css_err -ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) -{ +ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, + int *buffer_depth) { if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_max_buffer_depth() enter: void\n"); @@ -5289,8 +5462,7 @@ ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_dep } enum ia_css_err -ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) -{ +ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n", buffer_depth); (void)stream; if (buffer_depth > NUM_CONTINUOUS_FRAMES || buffer_depth < 1) @@ -5302,8 +5474,8 @@ ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) } enum ia_css_err -ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) -{ +ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, + int *buffer_depth) { if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); @@ -5319,19 +5491,20 @@ sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx) { OP___assert(port < N_CSI_PORTS); OP___assert(idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_get_mipi_sizes_for_check(port %d, idx %d): %d\n", - port, idx, my_css.mipi_sizes_for_check[port][idx]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_get_mipi_sizes_for_check(port %d, idx %d): %d\n", + port, idx, my_css.mipi_sizes_for_check[port][idx]); return my_css.mipi_sizes_for_check[port][idx]; } #endif static enum ia_css_err sh_css_pipe_configure_output( - struct ia_css_pipe *pipe, - unsigned int width, - unsigned int height, - unsigned int padded_width, - enum ia_css_frame_format format, - unsigned int idx) + struct ia_css_pipe *pipe, + unsigned int width, + unsigned int height, + unsigned int padded_width, + enum ia_css_frame_format format, + unsigned int idx) { enum ia_css_err err = IA_CSS_SUCCESS; @@ -5349,14 +5522,13 @@ static enum ia_css_err sh_css_pipe_configure_output( } if (pipe->output_info[idx].res.width != width || pipe->output_info[idx].res.height != height || - pipe->output_info[idx].format != format) - { + pipe->output_info[idx].format != format) { ia_css_frame_info_init( - &pipe->output_info[idx], - width, - height, - format, - padded_width); + &pipe->output_info[idx], + width, + height, + format, + padded_width); } IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); return IA_CSS_SUCCESS; @@ -5382,24 +5554,26 @@ sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, assert(pipe_config); #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_pipe_get_shading_info() enter:\n"); + "sh_css_pipe_get_shading_info() enter:\n"); binary = ia_css_pipe_get_shading_correction_binary(pipe); - if (binary) { + if (binary) + { err = ia_css_binary_get_shading_info(binary, - IA_CSS_SHADING_CORRECTION_TYPE_1, - pipe->required_bds_factor, - (const struct ia_css_stream_config *)&pipe->stream->config, + IA_CSS_SHADING_CORRECTION_TYPE_1, + pipe->required_bds_factor, + (const struct ia_css_stream_config *)&pipe->stream->config, #ifndef ISP2401 - info); + info); #else - shading_info, pipe_config); + shading_info, pipe_config); #endif /* Other function calls can be added here when other shading correction types will be added * in the future. */ - } else { + } else + { /* When the pipe does not have a binary which has the shading * correction, this function does not need to fill the shading * information. It is not a error case, and then @@ -5416,8 +5590,7 @@ sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, static enum ia_css_err sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, - struct ia_css_grid_info *info) -{ + struct ia_css_grid_info *info) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_binary *binary = NULL; @@ -5428,7 +5601,8 @@ sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, binary = ia_css_pipe_get_s3a_binary(pipe); - if (binary) { + if (binary) + { err = ia_css_binary_3a_grid_info(binary, info, pipe); if (err != IA_CSS_SUCCESS) goto ERR; @@ -5437,17 +5611,20 @@ sh_css_pipe_get_grid_info(struct ia_css_pipe *pipe, binary = ia_css_pipe_get_sdis_binary(pipe); - if (binary) { + if (binary) + { ia_css_binary_dvs_grid_info(binary, info, pipe); ia_css_binary_dvs_stat_grid_info(binary, info, pipe); - } else { + } else + { memset(&info->dvs_grid.dvs_grid_info, 0, - sizeof(info->dvs_grid.dvs_grid_info)); + sizeof(info->dvs_grid.dvs_grid_info)); memset(&info->dvs_grid.dvs_stat_grid_info, 0, - sizeof(info->dvs_grid.dvs_stat_grid_info)); + sizeof(info->dvs_grid.dvs_stat_grid_info)); } - if (binary) { + if (binary) + { /* copy pipe does not have ISP binary*/ info->isp_in_width = binary->internal_frame_info.res.width; info->isp_in_height = binary->internal_frame_info.res.height; @@ -5472,8 +5649,8 @@ ERR : * */ static enum ia_css_err -ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format format) -{ +ia_css_pipe_check_format(struct ia_css_pipe *pipe, + enum ia_css_frame_format format) { const enum ia_css_frame_format *supported_formats; int number_of_formats; int found = 0; @@ -5481,7 +5658,8 @@ ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format form IA_CSS_ENTER_PRIVATE(""); - if (NULL == pipe || NULL == pipe->pipe_settings.video.video_binary.info) { + if (NULL == pipe || NULL == pipe->pipe_settings.video.video_binary.info) + { IA_CSS_ERROR("Pipe or binary info is not set"); IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; @@ -5490,17 +5668,20 @@ ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format form supported_formats = pipe->pipe_settings.video.video_binary.info->output_formats; number_of_formats = sizeof(pipe->pipe_settings.video.video_binary.info->output_formats) / sizeof(enum ia_css_frame_format); - for (i = 0; i < number_of_formats && !found; i++) { + for (i = 0; i < number_of_formats && !found; i++) + { if (supported_formats[i] == format) { found = 1; break; } } - if (!found) { + if (!found) + { IA_CSS_ERROR("Requested format is not supported by binary"); IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; - } else { + } else + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); return IA_CSS_SUCCESS; } @@ -5510,7 +5691,7 @@ ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format form static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) { struct ia_css_frame_info video_in_info, tnr_info, - *video_vf_info, video_bds_out_info, *pipe_out_info, *pipe_vf_out_info; + *video_vf_info, video_bds_out_info, *pipe_out_info, *pipe_vf_out_info; bool online; enum ia_css_err err = IA_CSS_SUCCESS; bool continuous = pipe->stream->config.continuous; @@ -5552,7 +5733,7 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) return IA_CSS_ERR_INVALID_ARGUMENTS; if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { err = ia_css_util_check_vf_out_info(pipe_out_info, - pipe_vf_out_info); + pipe_vf_out_info); if (err != IA_CSS_SUCCESS) return err; } else { @@ -5569,8 +5750,9 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) /* Video */ if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { video_vf_info = pipe_vf_out_info; - vf_res_different_than_output = (video_vf_info->res.width != video_bin_out_info.res.width) || - (video_vf_info->res.height != video_bin_out_info.res.height); + vf_res_different_than_output = (video_vf_info->res.width != + video_bin_out_info.res.width) || + (video_vf_info->res.height != video_bin_out_info.res.height); } else { video_vf_info = NULL; } @@ -5587,21 +5769,21 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) video_bin_out_info.format = IA_CSS_FRAME_FORMAT_NV12; err = ia_css_pipe_create_cas_scaler_desc_single_output( - &video_bin_out_info, - pipe_out_info, - NULL, - &cas_scaler_descr); + &video_bin_out_info, + pipe_out_info, + NULL, + &cas_scaler_descr); if (err != IA_CSS_SUCCESS) return err; mycs->num_yuv_scaler = cas_scaler_descr.num_stage; mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * - sizeof(struct ia_css_binary), GFP_KERNEL); + sizeof(struct ia_css_binary), GFP_KERNEL); if (!mycs->yuv_scaler_binary) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; return err; } mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage - * sizeof(bool), GFP_KERNEL); + * sizeof(bool), GFP_KERNEL); if (!mycs->is_output_stage) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; return err; @@ -5611,12 +5793,12 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; ia_css_pipe_get_yuvscaler_binarydesc(pipe, - &yuv_scaler_descr, &cas_scaler_descr.in_info[i], - &cas_scaler_descr.out_info[i], - &cas_scaler_descr.internal_out_info[i], - &cas_scaler_descr.vf_info[i]); + &yuv_scaler_descr, &cas_scaler_descr.in_info[i], + &cas_scaler_descr.out_info[i], + &cas_scaler_descr.internal_out_info[i], + &cas_scaler_descr.vf_info[i]); err = ia_css_binary_find(&yuv_scaler_descr, - &mycs->yuv_scaler_binary[i]); + &mycs->yuv_scaler_binary[i]); if (err != IA_CSS_SUCCESS) { kfree(mycs->is_output_stage); mycs->is_output_stage = NULL; @@ -5631,8 +5813,9 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) enum ia_css_frame_format vf_info_format; err = ia_css_pipe_get_video_binarydesc(pipe, - &video_descr, &video_in_info, &video_bds_out_info, &video_bin_out_info, video_vf_info, - pipe->stream->config.left_padding); + &video_descr, &video_in_info, &video_bds_out_info, &video_bin_out_info, + video_vf_info, + pipe->stream->config.left_padding); if (err != IA_CSS_SUCCESS) return err; @@ -5663,29 +5846,29 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) /* If the binary has single output pin, we need vf_pp if additional * scaling is needed for vf */ need_vf_pp |= ((num_output_pins == 1) && - ((video_vf_info->res.width << vf_ds_log2 != pipe_out_info->res.width) || - (video_vf_info->res.height << vf_ds_log2 != pipe_out_info->res.height))); + ((video_vf_info->res.width << vf_ds_log2 != pipe_out_info->res.width) || + (video_vf_info->res.height << vf_ds_log2 != pipe_out_info->res.height))); } if (need_vf_pp) { /* save the current vf_info format for restoration later */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "load_video_binaries() need_vf_pp; find video binary with YUV_LINE again\n"); + "load_video_binaries() need_vf_pp; find video binary with YUV_LINE again\n"); vf_info_format = video_vf_info->format; if (!pipe->config.enable_vfpp_bci) ia_css_frame_info_set_format(video_vf_info, - IA_CSS_FRAME_FORMAT_YUV_LINE); + IA_CSS_FRAME_FORMAT_YUV_LINE); ia_css_binary_destroy_isp_parameters(&mycs->video_binary); err = ia_css_binary_find(&video_descr, - &mycs->video_binary); + &mycs->video_binary); /* restore original vf_info format */ ia_css_frame_info_set_format(video_vf_info, - vf_info_format); + vf_info_format); if (err != IA_CSS_SUCCESS) return err; } @@ -5708,10 +5891,10 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) pipe->num_invalid_frames *= 2; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "load_video_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", - pipe->num_invalid_frames, pipe->dvs_frame_delay); + "load_video_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", + pipe->num_invalid_frames, pipe->dvs_frame_delay); -/* pqiao TODO: temp hack for PO, should be removed after offline YUVPP is enabled */ + /* pqiao TODO: temp hack for PO, should be removed after offline YUVPP is enabled */ #if !defined(USE_INPUT_SYSTEM_VERSION_2401) /* Copy */ if (!online && !continuous) { @@ -5733,21 +5916,21 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) struct ia_css_binary_descr vf_pp_descr; if (mycs->video_binary.vf_frame_info.format - == IA_CSS_FRAME_FORMAT_YUV_LINE) { + == IA_CSS_FRAME_FORMAT_YUV_LINE) { ia_css_pipe_get_vfpp_binarydesc(pipe, &vf_pp_descr, - &mycs->video_binary.vf_frame_info, - pipe_vf_out_info); + &mycs->video_binary.vf_frame_info, + pipe_vf_out_info); } else { /* output from main binary is not yuv line. currently this is * possible only when bci is enabled on vfpp output */ assert(pipe->config.enable_vfpp_bci == true); ia_css_pipe_get_yuvscaler_binarydesc(pipe, &vf_pp_descr, - &mycs->video_binary.vf_frame_info, - pipe_vf_out_info, NULL, NULL); + &mycs->video_binary.vf_frame_info, + pipe_vf_out_info, NULL, NULL); } err = ia_css_binary_find(&vf_pp_descr, - &mycs->vf_pp_binary); + &mycs->vf_pp_binary); if (err != IA_CSS_SUCCESS) return err; } @@ -5770,7 +5953,8 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) * output_system_in_resolution(GDC_out_resolution) is * being used, then select that as it will also be in resolution for * TNR. At present, it only make sense for Skycam */ - if (pipe->config.output_system_in_res.width && pipe->config.output_system_in_res.height) { + if (pipe->config.output_system_in_res.width && + pipe->config.output_system_in_res.height) { tnr_width = pipe->config.output_system_in_res.width; tnr_height = pipe->config.output_system_in_res.height; } else { @@ -5780,20 +5964,20 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) /* Make tnr reference buffers output block width(in pix) align */ tnr_info.res.width = - CEIL_MUL(tnr_width, - (mycs->video_binary.info->sp.block.block_width * ISP_NWAY)); + CEIL_MUL(tnr_width, + (mycs->video_binary.info->sp.block.block_width * ISP_NWAY)); tnr_info.padded_width = tnr_info.res.width; #endif /* Make tnr reference buffers output block height align */ #ifndef ISP2401 tnr_info.res.height = - CEIL_MUL(tnr_info.res.height, - mycs->video_binary.info->sp.block.output_block_height); + CEIL_MUL(tnr_info.res.height, + mycs->video_binary.info->sp.block.output_block_height); #else tnr_info.res.height = - CEIL_MUL(tnr_height, - mycs->video_binary.info->sp.block.output_block_height); + CEIL_MUL(tnr_height, + mycs->video_binary.info->sp.block.output_block_height); #endif } else { tnr_info = mycs->video_binary.internal_frame_info; @@ -5811,8 +5995,8 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) mycs->tnr_frames[i] = NULL; } err = ia_css_frame_allocate_from_info( - &mycs->tnr_frames[i], - &tnr_info); + &mycs->tnr_frames[i], + &tnr_info); if (err != IA_CSS_SUCCESS) return err; } @@ -5821,13 +6005,13 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) } static enum ia_css_err -unload_video_binaries(struct ia_css_pipe *pipe) -{ +unload_video_binaries(struct ia_css_pipe *pipe) { unsigned int i; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -5889,7 +6073,8 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) copy_ovrd = 1 << thread_id; if (pipe->stream->cont_capt) { - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), &thread_id); + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(capture_pipe), + &thread_id); copy_ovrd |= 1 << thread_id; } } @@ -5897,31 +6082,31 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) /* Construct and load the copy pipe */ if (pipe->stream->config.continuous) { sh_css_sp_init_pipeline(©_pipe->pipeline, - IA_CSS_PIPE_ID_COPY, - (uint8_t)ia_css_pipe_get_pipe_num(copy_pipe), - false, - pipe->stream->config.pixels_per_clock == 2, false, - false, pipe->required_bds_factor, - copy_ovrd, - pipe->stream->config.mode, - &pipe->stream->config.metadata_config, + IA_CSS_PIPE_ID_COPY, + (uint8_t)ia_css_pipe_get_pipe_num(copy_pipe), + false, + pipe->stream->config.pixels_per_clock == 2, false, + false, pipe->required_bds_factor, + copy_ovrd, + pipe->stream->config.mode, + &pipe->stream->config.metadata_config, #ifndef ISP2401 - &pipe->stream->info.metadata_info + &pipe->stream->info.metadata_info #else - &pipe->stream->info.metadata_info, + &pipe->stream->info.metadata_info, #endif #if !defined(HAS_NO_INPUT_SYSTEM) #ifndef ISP2401 - , pipe->stream->config.source.port.port + , pipe->stream->config.source.port.port #else - pipe->stream->config.source.port.port, + pipe->stream->config.source.port.port, #endif #endif #ifndef ISP2401 - ); + ); #else - & copy_pipe->config.internal_frame_origin_bqs_on_sctbl, - copy_pipe->stream->isp_params_configs); + & copy_pipe->config.internal_frame_origin_bqs_on_sctbl, + copy_pipe->stream->isp_params_configs); #endif /* make the video pipe start with mem mode input, copy handles @@ -5932,33 +6117,33 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) /* Construct and load the capture pipe */ if (pipe->stream->cont_capt) { sh_css_sp_init_pipeline(&capture_pipe->pipeline, - IA_CSS_PIPE_ID_CAPTURE, - (uint8_t)ia_css_pipe_get_pipe_num(capture_pipe), - capture_pipe->config.default_capture_config.enable_xnr != 0, - capture_pipe->stream->config.pixels_per_clock == 2, - true, /* continuous */ - false, /* offline */ - capture_pipe->required_bds_factor, - 0, - IA_CSS_INPUT_MODE_MEMORY, - &pipe->stream->config.metadata_config, + IA_CSS_PIPE_ID_CAPTURE, + (uint8_t)ia_css_pipe_get_pipe_num(capture_pipe), + capture_pipe->config.default_capture_config.enable_xnr != 0, + capture_pipe->stream->config.pixels_per_clock == 2, + true, /* continuous */ + false, /* offline */ + capture_pipe->required_bds_factor, + 0, + IA_CSS_INPUT_MODE_MEMORY, + &pipe->stream->config.metadata_config, #ifndef ISP2401 - &pipe->stream->info.metadata_info + &pipe->stream->info.metadata_info #else - &pipe->stream->info.metadata_info, + &pipe->stream->info.metadata_info, #endif #if !defined(HAS_NO_INPUT_SYSTEM) #ifndef ISP2401 - , (enum mipi_port_id)0 + , (enum mipi_port_id)0 #else - (enum mipi_port_id)0, + (enum mipi_port_id)0, #endif #endif #ifndef ISP2401 - ); + ); #else - & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, - capture_pipe->stream->isp_params_configs); + & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, + capture_pipe->stream->isp_params_configs); #endif } @@ -5970,15 +6155,16 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) static enum ia_css_err sh_css_pipe_get_viewfinder_frame_info( - struct ia_css_pipe *pipe, - struct ia_css_frame_info *info, - unsigned int idx) + struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx) { assert(pipe); assert(info); -/* We could print the pointer as input arg, and the values as output */ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_get_viewfinder_frame_info() enter: void\n"); + /* We could print the pointer as input arg, and the values as output */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_viewfinder_frame_info() enter: void\n"); if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE && (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || @@ -5988,13 +6174,13 @@ enum ia_css_err sh_css_pipe_get_viewfinder_frame_info( *info = pipe->vf_output_info[idx]; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_pipe_get_viewfinder_frame_info() leave: \ + "sh_css_pipe_get_viewfinder_frame_info() leave: \ info.res.width=%d, info.res.height=%d, \ info.padded_width=%d, info.format=%d, \ info.raw_bit_depth=%d, info.raw_bayer_order=%d\n", - info->res.width, info->res.height, - info->padded_width, info->format, - info->raw_bit_depth, info->raw_bayer_order); + info->res.width, info->res.height, + info->padded_width, info->format, + info->raw_bit_depth, info->raw_bayer_order); return IA_CSS_SUCCESS; } @@ -6003,26 +6189,28 @@ static enum ia_css_err sh_css_pipe_configure_viewfinder(struct ia_css_pipe *pipe, unsigned int width, unsigned int height, unsigned int min_width, enum ia_css_frame_format format, - unsigned int idx) -{ + unsigned int idx) { enum ia_css_err err = IA_CSS_SUCCESS; IA_CSS_ENTER_PRIVATE("pipe = %p, width = %d, height = %d, min_width = %d, format = %d, idx = %d\n", pipe, width, height, min_width, format, idx); - if (!pipe) { + if (!pipe) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } err = ia_css_util_check_res(width, height); - if (err != IA_CSS_SUCCESS) { + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } if (pipe->vf_output_info[idx].res.width != width || pipe->vf_output_info[idx].res.height != height || - pipe->vf_output_info[idx].format != format) { + pipe->vf_output_info[idx].format != format) + { ia_css_frame_info_init(&pipe->vf_output_info[idx], width, height, format, min_width); } @@ -6037,7 +6225,8 @@ static enum ia_css_err load_copy_binaries(struct ia_css_pipe *pipe) assert(pipe); IA_CSS_ENTER_PRIVATE(""); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); if (pipe->pipe_settings.capture.copy_binary.info) return IA_CSS_SUCCESS; @@ -6050,8 +6239,8 @@ static enum ia_css_err load_copy_binaries(struct ia_css_pipe *pipe) goto ERR; err = load_copy_binary(pipe, - &pipe->pipe_settings.capture.copy_binary, - NULL); + &pipe->pipe_settings.capture.copy_binary, + NULL); ERR: IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -6059,7 +6248,7 @@ static enum ia_css_err load_copy_binaries(struct ia_css_pipe *pipe) } static bool need_capture_pp( - const struct ia_css_pipe *pipe) + const struct ia_css_pipe *pipe) { const struct ia_css_frame_info *out_info = &pipe->output_info[0]; @@ -6095,7 +6284,7 @@ static bool need_capture_pp( } static bool need_capt_ldc( - const struct ia_css_pipe *pipe) + const struct ia_css_pipe *pipe) { IA_CSS_ENTER_LEAVE_PRIVATE(""); assert(pipe); @@ -6103,7 +6292,8 @@ static bool need_capt_ldc( return (pipe->extra_config.enable_dvs_6axis) ? true : false; } -static enum ia_css_err set_num_primary_stages(unsigned int *num, enum ia_css_pipe_version version) +static enum ia_css_err set_num_primary_stages(unsigned int *num, + enum ia_css_pipe_version version) { enum ia_css_err err = IA_CSS_SUCCESS; @@ -6127,7 +6317,7 @@ static enum ia_css_err set_num_primary_stages(unsigned int *num, enum ia_css_pip } static enum ia_css_err load_primary_binaries( - struct ia_css_pipe *pipe) + struct ia_css_pipe *pipe) { bool online = false; bool memory = false; @@ -6139,14 +6329,14 @@ static enum ia_css_err load_primary_binaries( bool sensor = false; #endif struct ia_css_frame_info prim_in_info, - prim_out_info, - capt_pp_out_info, vf_info, - *vf_pp_in_info, *pipe_out_info, + prim_out_info, + capt_pp_out_info, vf_info, + *vf_pp_in_info, *pipe_out_info, #ifndef ISP2401 - *pipe_vf_out_info, *capt_pp_in_info, - capt_ldc_out_info; + *pipe_vf_out_info, *capt_pp_in_info, + capt_ldc_out_info; #else - *pipe_vf_out_info; + *pipe_vf_out_info; #endif enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_capture_settings *mycs; @@ -6156,7 +6346,8 @@ static enum ia_css_err load_primary_binaries( IA_CSS_ENTER_PRIVATE(""); assert(pipe); assert(pipe->stream); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); online = pipe->stream->config.online; memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; @@ -6172,7 +6363,8 @@ static enum ia_css_err load_primary_binaries( if (mycs->primary_binary[0].info) return IA_CSS_SUCCESS; - err = set_num_primary_stages(&mycs->num_primary_stage, pipe->config.isp_pipe_version); + err = set_num_primary_stages(&mycs->num_primary_stage, + pipe->config.isp_pipe_version); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -6198,16 +6390,16 @@ static enum ia_css_err load_primary_binaries( factor. */ vf_info = *pipe_vf_out_info; -/* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed for Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. This should not be considered as a clean solution. - * Proper investigation should be done to come up with the clean - * solution. - * */ + /* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + * */ ia_css_frame_info_set_format(&vf_info, IA_CSS_FRAME_FORMAT_YUV_LINE); /* TODO: All this yuv_scaler and capturepp calculation logic @@ -6220,41 +6412,41 @@ static enum ia_css_err load_primary_binaries( capt_pp_out_info.res.height /= MAX_PREFERRED_YUV_DS_PER_STEP; ia_css_frame_info_set_width(&capt_pp_out_info, capt_pp_out_info.res.width, 0); -/* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed for Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. This should not be considered as a clean solution. - * Proper investigation should be done to come up with the clean - * solution. - * */ + /* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + * */ need_extra_yuv_scaler = need_downscaling(capt_pp_out_info.res, - pipe_out_info->res); + pipe_out_info->res); if (need_extra_yuv_scaler) { struct ia_css_cas_binary_descr cas_scaler_descr = { }; err = ia_css_pipe_create_cas_scaler_desc_single_output( - &capt_pp_out_info, - pipe_out_info, - NULL, - &cas_scaler_descr); + &capt_pp_out_info, + pipe_out_info, + NULL, + &cas_scaler_descr); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } mycs->num_yuv_scaler = cas_scaler_descr.num_stage; mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * - sizeof(struct ia_css_binary), GFP_KERNEL); + sizeof(struct ia_css_binary), GFP_KERNEL); if (!mycs->yuv_scaler_binary) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage * - sizeof(bool), GFP_KERNEL); + sizeof(bool), GFP_KERNEL); if (!mycs->is_output_stage) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -6265,12 +6457,12 @@ static enum ia_css_err load_primary_binaries( mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; ia_css_pipe_get_yuvscaler_binarydesc(pipe, - &yuv_scaler_descr, &cas_scaler_descr.in_info[i], - &cas_scaler_descr.out_info[i], - &cas_scaler_descr.internal_out_info[i], - &cas_scaler_descr.vf_info[i]); + &yuv_scaler_descr, &cas_scaler_descr.in_info[i], + &cas_scaler_descr.out_info[i], + &cas_scaler_descr.internal_out_info[i], + &cas_scaler_descr.vf_info[i]); err = ia_css_binary_find(&yuv_scaler_descr, - &mycs->yuv_scaler_binary[i]); + &mycs->yuv_scaler_binary[i]); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -6290,173 +6482,173 @@ static enum ia_css_err load_primary_binaries( struct ia_css_binary_descr capt_ldc_descr; ia_css_pipe_get_ldc_binarydesc(pipe, - &capt_ldc_descr, &prim_out_info, - &capt_pp_out_info); + &capt_ldc_descr, &prim_out_info, + &capt_pp_out_info); #endif #ifdef ISP2401 err = ia_css_binary_find(&capt_ldc_descr, - &mycs->capture_ldc_binary); + &mycs->capture_ldc_binary); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } } else if (need_pp) { #endif - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ #ifndef ISP2401 - if (need_pp) { + if (need_pp) { #endif - struct ia_css_binary_descr capture_pp_descr; + struct ia_css_binary_descr capture_pp_descr; #ifndef ISP2401 - capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; + capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; #endif - ia_css_pipe_get_capturepp_binarydesc(pipe, + ia_css_pipe_get_capturepp_binarydesc(pipe, #ifndef ISP2401 - &capture_pp_descr, capt_pp_in_info, + &capture_pp_descr, capt_pp_in_info, #else - &capture_pp_descr, &prim_out_info, + &capture_pp_descr, &prim_out_info, #endif - &capt_pp_out_info, &vf_info); - err = ia_css_binary_find(&capture_pp_descr, - &mycs->capture_pp_binary); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + &capt_pp_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &mycs->capture_pp_binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } #ifndef ISP2401 - if (need_ldc) { - struct ia_css_binary_descr capt_ldc_descr; + if (need_ldc) { + struct ia_css_binary_descr capt_ldc_descr; - ia_css_pipe_get_ldc_binarydesc(pipe, - &capt_ldc_descr, &prim_out_info, - &capt_ldc_out_info); + ia_css_pipe_get_ldc_binarydesc(pipe, + &capt_ldc_descr, &prim_out_info, + &capt_ldc_out_info); - err = ia_css_binary_find(&capt_ldc_descr, - &mycs->capture_ldc_binary); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + err = ia_css_binary_find(&capt_ldc_descr, + &mycs->capture_ldc_binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } } - } #endif - } else { - prim_out_info = *pipe_out_info; - } + } else { + prim_out_info = *pipe_out_info; + } - /* Primary */ - { - struct ia_css_binary_descr prim_descr[MAX_NUM_PRIMARY_STAGES]; + /* Primary */ + { + struct ia_css_binary_descr prim_descr[MAX_NUM_PRIMARY_STAGES]; + + for (i = 0; i < mycs->num_primary_stage; i++) { + struct ia_css_frame_info *local_vf_info = NULL; + + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && + (i == mycs->num_primary_stage - 1)) + local_vf_info = &vf_info; + ia_css_pipe_get_primary_binarydesc(pipe, &prim_descr[i], &prim_in_info, + &prim_out_info, local_vf_info, i); + err = ia_css_binary_find(&prim_descr[i], &mycs->primary_binary[i]); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + } - for (i = 0; i < mycs->num_primary_stage; i++) { - struct ia_css_frame_info *local_vf_info = NULL; + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &mycs->capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &mycs->primary_binary[mycs->num_primary_stage - 1].vf_frame_info; + } - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && (i == mycs->num_primary_stage - 1)) - local_vf_info = &vf_info; - ia_css_pipe_get_primary_binarydesc(pipe, &prim_descr[i], &prim_in_info, &prim_out_info, local_vf_info, i); - err = ia_css_binary_find(&prim_descr[i], &mycs->primary_binary[i]); + /* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed for Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. Thisshould not be considered as a clean solution. + * Proper * investigation should be done to come up with the clean + * solution. + * */ + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { + struct ia_css_binary_descr vf_pp_descr; + + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } } - } - - /* Viewfinder post-processing */ - if (need_pp) { - vf_pp_in_info = - &mycs->capture_pp_binary.vf_frame_info; - } else { - vf_pp_in_info = - &mycs->primary_binary[mycs->num_primary_stage - 1].vf_frame_info; - } - -/* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed for Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. Thisshould not be considered as a clean solution. - * Proper * investigation should be done to come up with the clean - * solution. - * */ - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) - { - struct ia_css_binary_descr vf_pp_descr; + err = allocate_delay_frames(pipe); - ia_css_pipe_get_vfpp_binarydesc(pipe, - &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); - err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); + if (err != IA_CSS_SUCCESS) return err; - } - } - err = allocate_delay_frames(pipe); - - if (err != IA_CSS_SUCCESS) - return err; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* When the input system is 2401, only the Direct Sensor Mode - * Offline Capture uses the ISP copy binary. - */ - need_isp_copy_binary = !online && sensor; + /* When the input system is 2401, only the Direct Sensor Mode + * Offline Capture uses the ISP copy binary. + */ + need_isp_copy_binary = !online && sensor; #else - need_isp_copy_binary = !online && !continuous && !memory; + need_isp_copy_binary = !online && !continuous && !memory; #endif - /* ISP Copy */ - if (need_isp_copy_binary) { - err = load_copy_binary(pipe, - &mycs->copy_binary, - &mycs->primary_binary[0]); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + /* ISP Copy */ + if (need_isp_copy_binary) { + err = load_copy_binary(pipe, + &mycs->copy_binary, + &mycs->primary_binary[0]); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } } - } - return IA_CSS_SUCCESS; -} + return IA_CSS_SUCCESS; + } -static enum ia_css_err -allocate_delay_frames(struct ia_css_pipe *pipe) -{ - unsigned int num_delay_frames = 0, i = 0; - unsigned int dvs_frame_delay = 0; - struct ia_css_frame_info ref_info; - enum ia_css_err err = IA_CSS_SUCCESS; - enum ia_css_pipe_id mode = IA_CSS_PIPE_ID_VIDEO; - struct ia_css_frame **delay_frames = NULL; + static enum ia_css_err + allocate_delay_frames(struct ia_css_pipe *pipe) { + unsigned int num_delay_frames = 0, i = 0; + unsigned int dvs_frame_delay = 0; + struct ia_css_frame_info ref_info; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_pipe_id mode = IA_CSS_PIPE_ID_VIDEO; + struct ia_css_frame **delay_frames = NULL; - IA_CSS_ENTER_PRIVATE(""); + IA_CSS_ENTER_PRIVATE(""); - if (!pipe) { - IA_CSS_ERROR("Invalid args - pipe %p", pipe); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + if (!pipe) + { + IA_CSS_ERROR("Invalid args - pipe %p", pipe); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - mode = pipe->mode; - dvs_frame_delay = pipe->dvs_frame_delay; + mode = pipe->mode; + dvs_frame_delay = pipe->dvs_frame_delay; - if (dvs_frame_delay > 0) - num_delay_frames = dvs_frame_delay + 1; + if (dvs_frame_delay > 0) + num_delay_frames = dvs_frame_delay + 1; - switch (mode) { - case IA_CSS_PIPE_ID_CAPTURE: + switch (mode) { + case IA_CSS_PIPE_ID_CAPTURE: { struct ia_css_capture_settings *mycs_capture = &pipe->pipe_settings.capture; (void)mycs_capture; return err; } break; - case IA_CSS_PIPE_ID_VIDEO: - { + case IA_CSS_PIPE_ID_VIDEO: { struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video; ref_info = mycs_video->video_binary.internal_frame_info; @@ -6475,8 +6667,7 @@ allocate_delay_frames(struct ia_css_pipe *pipe) delay_frames = mycs_video->delay_frames; } break; - case IA_CSS_PIPE_ID_PREVIEW: - { + case IA_CSS_PIPE_ID_PREVIEW: { struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview; ref_info = mycs_preview->preview_binary.internal_frame_info; @@ -6497,2414 +6688,2467 @@ allocate_delay_frames(struct ia_css_pipe *pipe) break; default: return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + ref_info.raw_bit_depth = SH_CSS_REF_BIT_DEPTH; + + assert(num_delay_frames <= MAX_NUM_VIDEO_DELAY_FRAMES); + for (i = 0; i < num_delay_frames; i++) + { + err = ia_css_frame_allocate_from_info(&delay_frames[i], &ref_info); + if (err != IA_CSS_SUCCESS) + return err; + } + IA_CSS_LEAVE_PRIVATE(""); + return IA_CSS_SUCCESS; } - ref_info.raw_bit_depth = SH_CSS_REF_BIT_DEPTH; + static enum ia_css_err load_advanced_binaries( + struct ia_css_pipe *pipe) { + struct ia_css_frame_info pre_in_info, gdc_in_info, + post_in_info, post_out_info, + vf_info, *vf_pp_in_info, *pipe_out_info, + *pipe_vf_out_info; + bool need_pp; + bool need_isp_copy = true; + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE(""); + + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + pipe_out_info = &pipe->output_info[0]; + pipe_vf_out_info = &pipe->vf_output_info[0]; - assert(num_delay_frames <= MAX_NUM_VIDEO_DELAY_FRAMES); - for (i = 0; i < num_delay_frames; i++) { - err = ia_css_frame_allocate_from_info(&delay_frames[i], &ref_info); + vf_info = *pipe_vf_out_info; + err = ia_css_util_check_vf_out_info(pipe_out_info, &vf_info); if (err != IA_CSS_SUCCESS) return err; - } - IA_CSS_LEAVE_PRIVATE(""); - return IA_CSS_SUCCESS; -} + need_pp = need_capture_pp(pipe); -static enum ia_css_err load_advanced_binaries( - struct ia_css_pipe *pipe) -{ - struct ia_css_frame_info pre_in_info, gdc_in_info, - post_in_info, post_out_info, - vf_info, *vf_pp_in_info, *pipe_out_info, - *pipe_vf_out_info; - bool need_pp; - bool need_isp_copy = true; - enum ia_css_err err = IA_CSS_SUCCESS; + ia_css_frame_info_set_format(&vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); - IA_CSS_ENTER_PRIVATE(""); + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_pp) { + struct ia_css_binary_descr capture_pp_descr; - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); - if (pipe->pipe_settings.capture.pre_isp_binary.info) - return IA_CSS_SUCCESS; - pipe_out_info = &pipe->output_info[0]; - pipe_vf_out_info = &pipe->vf_output_info[0]; + ia_css_pipe_get_capturepp_binarydesc(pipe, + &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &pipe->pipe_settings.capture.capture_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } else { + post_out_info = *pipe_out_info; + } - vf_info = *pipe_vf_out_info; - err = ia_css_util_check_vf_out_info(pipe_out_info, &vf_info); - if (err != IA_CSS_SUCCESS) - return err; - need_pp = need_capture_pp(pipe); + /* Post-gdc */ + { + struct ia_css_binary_descr post_gdc_descr; - ia_css_frame_info_set_format(&vf_info, - IA_CSS_FRAME_FORMAT_YUV_LINE); + ia_css_pipe_get_post_gdc_binarydesc(pipe, + &post_gdc_descr, &post_in_info, &post_out_info, &vf_info); + err = ia_css_binary_find(&post_gdc_descr, + &pipe->pipe_settings.capture.post_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ - if (need_pp) { - struct ia_css_binary_descr capture_pp_descr; - - ia_css_pipe_get_capturepp_binarydesc(pipe, - &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); - err = ia_css_binary_find(&capture_pp_descr, - &pipe->pipe_settings.capture.capture_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } else { - post_out_info = *pipe_out_info; - } + /* Gdc */ + { + struct ia_css_binary_descr gdc_descr; - /* Post-gdc */ - { - struct ia_css_binary_descr post_gdc_descr; + ia_css_pipe_get_gdc_binarydesc(pipe, &gdc_descr, &gdc_in_info, + &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); + err = ia_css_binary_find(&gdc_descr, + &pipe->pipe_settings.capture.anr_gdc_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.anr_gdc_binary.left_padding = + pipe->pipe_settings.capture.post_isp_binary.left_padding; - ia_css_pipe_get_post_gdc_binarydesc(pipe, - &post_gdc_descr, &post_in_info, &post_out_info, &vf_info); - err = ia_css_binary_find(&post_gdc_descr, - &pipe->pipe_settings.capture.post_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } + /* Pre-gdc */ + { + struct ia_css_binary_descr pre_gdc_descr; - /* Gdc */ - { - struct ia_css_binary_descr gdc_descr; + ia_css_pipe_get_pre_gdc_binarydesc(pipe, &pre_gdc_descr, &pre_in_info, + &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); + err = ia_css_binary_find(&pre_gdc_descr, + &pipe->pipe_settings.capture.pre_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.pre_isp_binary.left_padding = + pipe->pipe_settings.capture.anr_gdc_binary.left_padding; - ia_css_pipe_get_gdc_binarydesc(pipe, &gdc_descr, &gdc_in_info, - &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); - err = ia_css_binary_find(&gdc_descr, - &pipe->pipe_settings.capture.anr_gdc_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.anr_gdc_binary.left_padding = - pipe->pipe_settings.capture.post_isp_binary.left_padding; + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; + } - /* Pre-gdc */ - { - struct ia_css_binary_descr pre_gdc_descr; + { + struct ia_css_binary_descr vf_pp_descr; + + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, + &pipe->pipe_settings.capture.vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - ia_css_pipe_get_pre_gdc_binarydesc(pipe, &pre_gdc_descr, &pre_in_info, - &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); - err = ia_css_binary_find(&pre_gdc_descr, + /* Copy */ +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* For CSI2+, only the direct sensor mode/online requires ISP copy */ + need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; +#endif + if (need_isp_copy) + load_copy_binary(pipe, + &pipe->pipe_settings.capture.copy_binary, &pipe->pipe_settings.capture.pre_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.pre_isp_binary.left_padding = - pipe->pipe_settings.capture.anr_gdc_binary.left_padding; - /* Viewfinder post-processing */ - if (need_pp) { - vf_pp_in_info = - &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; - } else { - vf_pp_in_info = - &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; + return err; } - { - struct ia_css_binary_descr vf_pp_descr; - - ia_css_pipe_get_vfpp_binarydesc(pipe, - &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); - err = ia_css_binary_find(&vf_pp_descr, - &pipe->pipe_settings.capture.vf_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } + static enum ia_css_err load_bayer_isp_binaries( + struct ia_css_pipe *pipe) { + struct ia_css_frame_info pre_isp_in_info, *pipe_out_info; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_binary_descr pre_de_descr; - /* Copy */ -#ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* For CSI2+, only the direct sensor mode/online requires ISP copy */ - need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; -#endif - if (need_isp_copy) - load_copy_binary(pipe, - &pipe->pipe_settings.capture.copy_binary, - &pipe->pipe_settings.capture.pre_isp_binary); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); + pipe_out_info = &pipe->output_info[0]; - return err; -} + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; -static enum ia_css_err load_bayer_isp_binaries( - struct ia_css_pipe *pipe) -{ - struct ia_css_frame_info pre_isp_in_info, *pipe_out_info; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_binary_descr pre_de_descr; + err = ia_css_frame_check_info(pipe_out_info); + if (err != IA_CSS_SUCCESS) + return err; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); - pipe_out_info = &pipe->output_info[0]; + ia_css_pipe_get_pre_de_binarydesc(pipe, &pre_de_descr, + &pre_isp_in_info, + pipe_out_info); - if (pipe->pipe_settings.capture.pre_isp_binary.info) - return IA_CSS_SUCCESS; + err = ia_css_binary_find(&pre_de_descr, + &pipe->pipe_settings.capture.pre_isp_binary); - err = ia_css_frame_check_info(pipe_out_info); - if (err != IA_CSS_SUCCESS) return err; + } - ia_css_pipe_get_pre_de_binarydesc(pipe, &pre_de_descr, - &pre_isp_in_info, - pipe_out_info); - - err = ia_css_binary_find(&pre_de_descr, - &pipe->pipe_settings.capture.pre_isp_binary); - - return err; -} + static enum ia_css_err load_low_light_binaries( + struct ia_css_pipe *pipe) { + struct ia_css_frame_info pre_in_info, anr_in_info, + post_in_info, post_out_info, + vf_info, *pipe_vf_out_info, *pipe_out_info, + *vf_pp_in_info; + bool need_pp; + bool need_isp_copy = true; + enum ia_css_err err = IA_CSS_SUCCESS; -static enum ia_css_err load_low_light_binaries( - struct ia_css_pipe *pipe) -{ - struct ia_css_frame_info pre_in_info, anr_in_info, - post_in_info, post_out_info, - vf_info, *pipe_vf_out_info, *pipe_out_info, - *vf_pp_in_info; - bool need_pp; - bool need_isp_copy = true; - enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + pipe_vf_out_info = &pipe->vf_output_info[0]; + pipe_out_info = &pipe->output_info[0]; - if (pipe->pipe_settings.capture.pre_isp_binary.info) - return IA_CSS_SUCCESS; - pipe_vf_out_info = &pipe->vf_output_info[0]; - pipe_out_info = &pipe->output_info[0]; + vf_info = *pipe_vf_out_info; + err = ia_css_util_check_vf_out_info(pipe_out_info, + &vf_info); + if (err != IA_CSS_SUCCESS) + return err; + need_pp = need_capture_pp(pipe); - vf_info = *pipe_vf_out_info; - err = ia_css_util_check_vf_out_info(pipe_out_info, - &vf_info); - if (err != IA_CSS_SUCCESS) - return err; - need_pp = need_capture_pp(pipe); + ia_css_frame_info_set_format(&vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); - ia_css_frame_info_set_format(&vf_info, - IA_CSS_FRAME_FORMAT_YUV_LINE); + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_pp) { + struct ia_css_binary_descr capture_pp_descr; - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ - if (need_pp) { - struct ia_css_binary_descr capture_pp_descr; - - ia_css_pipe_get_capturepp_binarydesc(pipe, - &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); - err = ia_css_binary_find(&capture_pp_descr, - &pipe->pipe_settings.capture.capture_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } else { - post_out_info = *pipe_out_info; - } + ia_css_pipe_get_capturepp_binarydesc(pipe, + &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &pipe->pipe_settings.capture.capture_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } else { + post_out_info = *pipe_out_info; + } - /* Post-anr */ - { - struct ia_css_binary_descr post_anr_descr; + /* Post-anr */ + { + struct ia_css_binary_descr post_anr_descr; - ia_css_pipe_get_post_anr_binarydesc(pipe, - &post_anr_descr, &post_in_info, &post_out_info, &vf_info); - err = ia_css_binary_find(&post_anr_descr, - &pipe->pipe_settings.capture.post_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } + ia_css_pipe_get_post_anr_binarydesc(pipe, + &post_anr_descr, &post_in_info, &post_out_info, &vf_info); + err = ia_css_binary_find(&post_anr_descr, + &pipe->pipe_settings.capture.post_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - /* Anr */ - { - struct ia_css_binary_descr anr_descr; + /* Anr */ + { + struct ia_css_binary_descr anr_descr; - ia_css_pipe_get_anr_binarydesc(pipe, &anr_descr, &anr_in_info, - &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); - err = ia_css_binary_find(&anr_descr, - &pipe->pipe_settings.capture.anr_gdc_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.anr_gdc_binary.left_padding = - pipe->pipe_settings.capture.post_isp_binary.left_padding; + ia_css_pipe_get_anr_binarydesc(pipe, &anr_descr, &anr_in_info, + &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); + err = ia_css_binary_find(&anr_descr, + &pipe->pipe_settings.capture.anr_gdc_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.anr_gdc_binary.left_padding = + pipe->pipe_settings.capture.post_isp_binary.left_padding; - /* Pre-anr */ - { - struct ia_css_binary_descr pre_anr_descr; + /* Pre-anr */ + { + struct ia_css_binary_descr pre_anr_descr; - ia_css_pipe_get_pre_anr_binarydesc(pipe, &pre_anr_descr, &pre_in_info, - &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); - err = ia_css_binary_find(&pre_anr_descr, - &pipe->pipe_settings.capture.pre_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.pre_isp_binary.left_padding = - pipe->pipe_settings.capture.anr_gdc_binary.left_padding; + ia_css_pipe_get_pre_anr_binarydesc(pipe, &pre_anr_descr, &pre_in_info, + &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); + err = ia_css_binary_find(&pre_anr_descr, + &pipe->pipe_settings.capture.pre_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.pre_isp_binary.left_padding = + pipe->pipe_settings.capture.anr_gdc_binary.left_padding; - /* Viewfinder post-processing */ - if (need_pp) { - vf_pp_in_info = - &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; - } else { - vf_pp_in_info = - &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; - } + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; + } - { - struct ia_css_binary_descr vf_pp_descr; + { + struct ia_css_binary_descr vf_pp_descr; - ia_css_pipe_get_vfpp_binarydesc(pipe, - &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); - err = ia_css_binary_find(&vf_pp_descr, - &pipe->pipe_settings.capture.vf_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, + &pipe->pipe_settings.capture.vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - /* Copy */ + /* Copy */ #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* For CSI2+, only the direct sensor mode/online requires ISP copy */ - need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; + /* For CSI2+, only the direct sensor mode/online requires ISP copy */ + need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; #endif - if (need_isp_copy) - err = load_copy_binary(pipe, - &pipe->pipe_settings.capture.copy_binary, - &pipe->pipe_settings.capture.pre_isp_binary); + if (need_isp_copy) + err = load_copy_binary(pipe, + &pipe->pipe_settings.capture.copy_binary, + &pipe->pipe_settings.capture.pre_isp_binary); - return err; -} + return err; + } -static bool copy_on_sp(struct ia_css_pipe *pipe) -{ - bool rval; + static bool copy_on_sp(struct ia_css_pipe *pipe) { + bool rval; - assert(pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "copy_on_sp() enter:\n"); + assert(pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "copy_on_sp() enter:\n"); - rval = true; + rval = true; - rval &= (pipe->mode == IA_CSS_PIPE_ID_CAPTURE); + rval &= (pipe->mode == IA_CSS_PIPE_ID_CAPTURE); - rval &= (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW); + rval &= (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW); - rval &= ((pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) || - (pipe->config.mode == IA_CSS_PIPE_MODE_COPY)); + rval &= ((pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_BINARY_8) || + (pipe->config.mode == IA_CSS_PIPE_MODE_COPY)); - return rval; -} + return rval; + } -static enum ia_css_err load_capture_binaries( - struct ia_css_pipe *pipe) -{ - enum ia_css_err err = IA_CSS_SUCCESS; - bool must_be_raw; + static enum ia_css_err load_capture_binaries( + struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + bool must_be_raw; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); - if (pipe->pipe_settings.capture.primary_binary[0].info) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + if (pipe->pipe_settings.capture.primary_binary[0].info) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } - /* in primary, advanced,low light or bayer, - the input format must be raw */ - must_be_raw = - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT; - err = ia_css_util_check_input(&pipe->stream->config, must_be_raw, false); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (copy_on_sp(pipe) && - pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { - ia_css_frame_info_init( - &pipe->output_info[0], - JPEG_BYTES, - 1, - IA_CSS_FRAME_FORMAT_BINARY_8, - 0); - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + /* in primary, advanced,low light or bayer, + the input format must be raw */ + must_be_raw = + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT; + err = ia_css_util_check_input(&pipe->stream->config, must_be_raw, false); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { + ia_css_frame_info_init( + &pipe->output_info[0], + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } - switch (pipe->config.default_capture_config.mode) { - case IA_CSS_CAPTURE_MODE_RAW: - err = load_copy_binaries(pipe); + switch (pipe->config.default_capture_config.mode) { + case IA_CSS_CAPTURE_MODE_RAW: + err = load_copy_binaries(pipe); #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) - if (err == IA_CSS_SUCCESS) - pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; + if (err == IA_CSS_SUCCESS) + pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; #endif - break; - case IA_CSS_CAPTURE_MODE_BAYER: - err = load_bayer_isp_binaries(pipe); - break; - case IA_CSS_CAPTURE_MODE_PRIMARY: - err = load_primary_binaries(pipe); - break; - case IA_CSS_CAPTURE_MODE_ADVANCED: - err = load_advanced_binaries(pipe); - break; - case IA_CSS_CAPTURE_MODE_LOW_LIGHT: - err = load_low_light_binaries(pipe); - break; - } - if (err != IA_CSS_SUCCESS) { + break; + case IA_CSS_CAPTURE_MODE_BAYER: + err = load_bayer_isp_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_PRIMARY: + err = load_primary_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_ADVANCED: + err = load_advanced_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_LOW_LIGHT: + err = load_low_light_binaries(pipe); + break; + } + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} + static enum ia_css_err + unload_capture_binaries(struct ia_css_pipe *pipe) { + unsigned int i; -static enum ia_css_err -unload_capture_binaries(struct ia_css_pipe *pipe) -{ - unsigned int i; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((!pipe) || ((pipe->mode != IA_CSS_PIPE_ID_CAPTURE) && (pipe->mode != IA_CSS_PIPE_ID_COPY))) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.capture.copy_binary); + for (i = 0; i < MAX_NUM_PRIMARY_STAGES; i++) + ia_css_binary_unload(&pipe->pipe_settings.capture.primary_binary[i]); + ia_css_binary_unload(&pipe->pipe_settings.capture.pre_isp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.anr_gdc_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.post_isp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.capture_pp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.capture_ldc_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.vf_pp_binary); - if ((!pipe) || ((pipe->mode != IA_CSS_PIPE_ID_CAPTURE) && (pipe->mode != IA_CSS_PIPE_ID_COPY))) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; + for (i = 0; i < pipe->pipe_settings.capture.num_yuv_scaler; i++) + ia_css_binary_unload(&pipe->pipe_settings.capture.yuv_scaler_binary[i]); + + kfree(pipe->pipe_settings.capture.is_output_stage); + pipe->pipe_settings.capture.is_output_stage = NULL; + kfree(pipe->pipe_settings.capture.yuv_scaler_binary); + pipe->pipe_settings.capture.yuv_scaler_binary = NULL; + + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; } - ia_css_binary_unload(&pipe->pipe_settings.capture.copy_binary); - for (i = 0; i < MAX_NUM_PRIMARY_STAGES; i++) - ia_css_binary_unload(&pipe->pipe_settings.capture.primary_binary[i]); - ia_css_binary_unload(&pipe->pipe_settings.capture.pre_isp_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.anr_gdc_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.post_isp_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.capture_pp_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.capture_ldc_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.vf_pp_binary); - for (i = 0; i < pipe->pipe_settings.capture.num_yuv_scaler; i++) - ia_css_binary_unload(&pipe->pipe_settings.capture.yuv_scaler_binary[i]); + static bool + need_downscaling(const struct ia_css_resolution in_res, + const struct ia_css_resolution out_res) { + if (in_res.width > out_res.width || in_res.height > out_res.height) + return true; - kfree(pipe->pipe_settings.capture.is_output_stage); - pipe->pipe_settings.capture.is_output_stage = NULL; - kfree(pipe->pipe_settings.capture.yuv_scaler_binary); - pipe->pipe_settings.capture.yuv_scaler_binary = NULL; + return false; + } - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; -} + static bool + need_yuv_scaler_stage(const struct ia_css_pipe *pipe) { + unsigned int i; + struct ia_css_resolution in_res, out_res; -static bool -need_downscaling(const struct ia_css_resolution in_res, - const struct ia_css_resolution out_res) -{ - if (in_res.width > out_res.width || in_res.height > out_res.height) - return true; + bool need_format_conversion = false; - return false; -} + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); -static bool -need_yuv_scaler_stage(const struct ia_css_pipe *pipe) -{ - unsigned int i; - struct ia_css_resolution in_res, out_res; + /* TODO: make generic function */ + need_format_conversion = + ((pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) && + (pipe->output_info[0].format != IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8)); - bool need_format_conversion = false; + in_res = pipe->config.input_effective_res; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); - - /* TODO: make generic function */ - need_format_conversion = - ((pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) && - (pipe->output_info[0].format != IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8)); - - in_res = pipe->config.input_effective_res; + if (pipe->config.enable_dz) + return true; - if (pipe->config.enable_dz) - return true; + if ((pipe->output_info[0].res.width != 0) && need_format_conversion) + return true; - if ((pipe->output_info[0].res.width != 0) && need_format_conversion) - return true; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + out_res = pipe->output_info[i].res; - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - out_res = pipe->output_info[i].res; + /* A non-zero width means it is a valid output port */ + if ((out_res.width != 0) && need_downscaling(in_res, out_res)) + return true; + } - /* A non-zero width means it is a valid output port */ - if ((out_res.width != 0) && need_downscaling(in_res, out_res)) - return true; + return false; } - return false; -} - -/* TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc */ -/* which has some hard-coded knowledge which prevents reuse of the function. */ -/* Later, merge this with ia_css_pipe_create_cas_scaler_desc */ -static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( - struct ia_css_frame_info *cas_scaler_in_info, - struct ia_css_frame_info *cas_scaler_out_info, - struct ia_css_frame_info *cas_scaler_vf_info, - struct ia_css_cas_binary_descr *descr) -{ - unsigned int i; - unsigned int hor_ds_factor = 0, ver_ds_factor = 0; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_frame_info tmp_in_info; + /* TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc */ + /* which has some hard-coded knowledge which prevents reuse of the function. */ + /* Later, merge this with ia_css_pipe_create_cas_scaler_desc */ + static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( + struct ia_css_frame_info *cas_scaler_in_info, + struct ia_css_frame_info *cas_scaler_out_info, + struct ia_css_frame_info *cas_scaler_vf_info, + struct ia_css_cas_binary_descr *descr) { + unsigned int i; + unsigned int hor_ds_factor = 0, ver_ds_factor = 0; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame_info tmp_in_info; - unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; + unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; - assert(cas_scaler_in_info); - assert(cas_scaler_out_info); + assert(cas_scaler_in_info); + assert(cas_scaler_out_info); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() enter:\n"); - /* We assume that this function is used only for single output port case. */ - descr->num_output_stage = 1; + /* We assume that this function is used only for single output port case. */ + descr->num_output_stage = 1; - hor_ds_factor = CEIL_DIV(cas_scaler_in_info->res.width, cas_scaler_out_info->res.width); - ver_ds_factor = CEIL_DIV(cas_scaler_in_info->res.height, cas_scaler_out_info->res.height); - /* use the same horizontal and vertical downscaling factor for simplicity */ - assert(hor_ds_factor == ver_ds_factor); + hor_ds_factor = CEIL_DIV(cas_scaler_in_info->res.width, + cas_scaler_out_info->res.width); + ver_ds_factor = CEIL_DIV(cas_scaler_in_info->res.height, + cas_scaler_out_info->res.height); + /* use the same horizontal and vertical downscaling factor for simplicity */ + assert(hor_ds_factor == ver_ds_factor); - i = 1; - while (i < hor_ds_factor) { - descr->num_stage++; - i *= max_scale_factor_per_stage; - } + i = 1; + while (i < hor_ds_factor) { + descr->num_stage++; + i *= max_scale_factor_per_stage; + } - descr->in_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->in_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->internal_out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->internal_out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->vf_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); - if (!descr->is_output_stage) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } + descr->in_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->in_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->internal_out_info = kmalloc(descr->num_stage * sizeof( + struct ia_css_frame_info), GFP_KERNEL); + if (!descr->internal_out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->vf_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); + if (!descr->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } - tmp_in_info = *cas_scaler_in_info; - for (i = 0; i < descr->num_stage; i++) { - descr->in_info[i] = tmp_in_info; - if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= cas_scaler_out_info->res.width) { - descr->is_output_stage[i] = true; - if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { - descr->internal_out_info[i].res.width = cas_scaler_out_info->res.width; - descr->internal_out_info[i].res.height = cas_scaler_out_info->res.height; - descr->internal_out_info[i].padded_width = cas_scaler_out_info->padded_width; - descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - } else { - assert(i == (descr->num_stage - 1)); - descr->internal_out_info[i].res.width = 0; - descr->internal_out_info[i].res.height = 0; - } - descr->out_info[i].res.width = cas_scaler_out_info->res.width; - descr->out_info[i].res.height = cas_scaler_out_info->res.height; - descr->out_info[i].padded_width = cas_scaler_out_info->padded_width; - descr->out_info[i].format = cas_scaler_out_info->format; - if (cas_scaler_vf_info) { - descr->vf_info[i].res.width = cas_scaler_vf_info->res.width; - descr->vf_info[i].res.height = cas_scaler_vf_info->res.height; - descr->vf_info[i].padded_width = cas_scaler_vf_info->padded_width; - ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + tmp_in_info = *cas_scaler_in_info; + for (i = 0; i < descr->num_stage; i++) { + descr->in_info[i] = tmp_in_info; + if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= + cas_scaler_out_info->res.width) { + descr->is_output_stage[i] = true; + if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { + descr->internal_out_info[i].res.width = cas_scaler_out_info->res.width; + descr->internal_out_info[i].res.height = cas_scaler_out_info->res.height; + descr->internal_out_info[i].padded_width = cas_scaler_out_info->padded_width; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + } else { + assert(i == (descr->num_stage - 1)); + descr->internal_out_info[i].res.width = 0; + descr->internal_out_info[i].res.height = 0; + } + descr->out_info[i].res.width = cas_scaler_out_info->res.width; + descr->out_info[i].res.height = cas_scaler_out_info->res.height; + descr->out_info[i].padded_width = cas_scaler_out_info->padded_width; + descr->out_info[i].format = cas_scaler_out_info->format; + if (cas_scaler_vf_info) { + descr->vf_info[i].res.width = cas_scaler_vf_info->res.width; + descr->vf_info[i].res.height = cas_scaler_vf_info->res.height; + descr->vf_info[i].padded_width = cas_scaler_vf_info->padded_width; + ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + } else { + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + descr->vf_info[i].padded_width = 0; + } } else { + descr->is_output_stage[i] = false; + descr->internal_out_info[i].res.width = tmp_in_info.res.width / + max_scale_factor_per_stage; + descr->internal_out_info[i].res.height = tmp_in_info.res.height / + max_scale_factor_per_stage; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init(&descr->internal_out_info[i], + tmp_in_info.res.width / max_scale_factor_per_stage, + tmp_in_info.res.height / max_scale_factor_per_stage, + IA_CSS_FRAME_FORMAT_YUV420, 0); + descr->out_info[i].res.width = 0; + descr->out_info[i].res.height = 0; descr->vf_info[i].res.width = 0; descr->vf_info[i].res.height = 0; - descr->vf_info[i].padded_width = 0; } - } else { - descr->is_output_stage[i] = false; - descr->internal_out_info[i].res.width = tmp_in_info.res.width / max_scale_factor_per_stage; - descr->internal_out_info[i].res.height = tmp_in_info.res.height / max_scale_factor_per_stage; - descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - ia_css_frame_info_init(&descr->internal_out_info[i], - tmp_in_info.res.width / max_scale_factor_per_stage, - tmp_in_info.res.height / max_scale_factor_per_stage, - IA_CSS_FRAME_FORMAT_YUV420, 0); - descr->out_info[i].res.width = 0; - descr->out_info[i].res.height = 0; - descr->vf_info[i].res.width = 0; - descr->vf_info[i].res.height = 0; - } - tmp_in_info = descr->internal_out_info[i]; - } + tmp_in_info = descr->internal_out_info[i]; + } ERR: - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", - err); - return err; -} - -/* FIXME: merge most of this and single output version */ -static enum ia_css_err ia_css_pipe_create_cas_scaler_desc(struct ia_css_pipe *pipe, - struct ia_css_cas_binary_descr *descr) -{ - struct ia_css_frame_info in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; - struct ia_css_frame_info *out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_frame_info *vf_out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_frame_info tmp_in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; - unsigned int i, j; - unsigned int hor_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], - ver_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], - scale_factor = 0; - unsigned int num_stages = 0; - enum ia_css_err err = IA_CSS_SUCCESS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", + err); + return err; + } - unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; + /* FIXME: merge most of this and single output version */ + static enum ia_css_err ia_css_pipe_create_cas_scaler_desc( + struct ia_css_pipe *pipe, + struct ia_css_cas_binary_descr *descr) { + struct ia_css_frame_info in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + struct ia_css_frame_info *out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info *vf_out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info tmp_in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + unsigned int i, j; + unsigned int hor_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], + ver_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], + scale_factor = 0; + unsigned int num_stages = 0; + enum ia_css_err err = IA_CSS_SUCCESS; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() enter:\n"); + unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - out_info[i] = NULL; - vf_out_info[i] = NULL; - hor_scale_factor[i] = 0; - ver_scale_factor[i] = 0; - } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() enter:\n"); - in_info.res = pipe->config.input_effective_res; - in_info.padded_width = in_info.res.width; - descr->num_output_stage = 0; - /* Find out how much scaling we need for each output */ - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if (pipe->output_info[i].res.width != 0) { - out_info[i] = &pipe->output_info[i]; - if (pipe->vf_output_info[i].res.width != 0) - vf_out_info[i] = &pipe->vf_output_info[i]; - descr->num_output_stage += 1; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + out_info[i] = NULL; + vf_out_info[i] = NULL; + hor_scale_factor[i] = 0; + ver_scale_factor[i] = 0; } - if (out_info[i]) { - hor_scale_factor[i] = CEIL_DIV(in_info.res.width, out_info[i]->res.width); - ver_scale_factor[i] = CEIL_DIV(in_info.res.height, out_info[i]->res.height); - /* use the same horizontal and vertical scaling factor for simplicity */ - assert(hor_scale_factor[i] == ver_scale_factor[i]); - scale_factor = 1; - do { - num_stages++; - scale_factor *= max_scale_factor_per_stage; - } while (scale_factor < hor_scale_factor[i]); + in_info.res = pipe->config.input_effective_res; + in_info.padded_width = in_info.res.width; + descr->num_output_stage = 0; + /* Find out how much scaling we need for each output */ + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (pipe->output_info[i].res.width != 0) { + out_info[i] = &pipe->output_info[i]; + if (pipe->vf_output_info[i].res.width != 0) + vf_out_info[i] = &pipe->vf_output_info[i]; + descr->num_output_stage += 1; + } - in_info.res = out_info[i]->res; + if (out_info[i]) { + hor_scale_factor[i] = CEIL_DIV(in_info.res.width, out_info[i]->res.width); + ver_scale_factor[i] = CEIL_DIV(in_info.res.height, out_info[i]->res.height); + /* use the same horizontal and vertical scaling factor for simplicity */ + assert(hor_scale_factor[i] == ver_scale_factor[i]); + scale_factor = 1; + do { + num_stages++; + scale_factor *= max_scale_factor_per_stage; + } while (scale_factor < hor_scale_factor[i]); + + in_info.res = out_info[i]->res; + } } - } - if (need_yuv_scaler_stage(pipe) && (num_stages == 0)) - num_stages = 1; + if (need_yuv_scaler_stage(pipe) && (num_stages == 0)) + num_stages = 1; - descr->num_stage = num_stages; + descr->num_stage = num_stages; - descr->in_info = kmalloc_array(descr->num_stage, sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->in_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->internal_out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->internal_out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->vf_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); - if (!descr->is_output_stage) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } + descr->in_info = kmalloc_array(descr->num_stage, + sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->in_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->internal_out_info = kmalloc(descr->num_stage * sizeof( + struct ia_css_frame_info), GFP_KERNEL); + if (!descr->internal_out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->vf_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); + if (!descr->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if (out_info[i]) { - if (i > 0) { - assert((out_info[i - 1]->res.width >= out_info[i]->res.width) && - (out_info[i - 1]->res.height >= out_info[i]->res.height)); + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (out_info[i]) { + if (i > 0) { + assert((out_info[i - 1]->res.width >= out_info[i]->res.width) && + (out_info[i - 1]->res.height >= out_info[i]->res.height)); + } } } - } - - tmp_in_info.res = pipe->config.input_effective_res; - tmp_in_info.format = IA_CSS_FRAME_FORMAT_YUV420; - for (i = 0, j = 0; i < descr->num_stage; i++) { - assert(j < 2); - assert(out_info[j]); - descr->in_info[i] = tmp_in_info; - if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= out_info[j]->res.width) { - descr->is_output_stage[i] = true; - if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { - descr->internal_out_info[i].res.width = out_info[j]->res.width; - descr->internal_out_info[i].res.height = out_info[j]->res.height; - descr->internal_out_info[i].padded_width = out_info[j]->padded_width; - descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - } else { - assert(i == (descr->num_stage - 1)); - descr->internal_out_info[i].res.width = 0; - descr->internal_out_info[i].res.height = 0; - } - descr->out_info[i].res.width = out_info[j]->res.width; - descr->out_info[i].res.height = out_info[j]->res.height; - descr->out_info[i].padded_width = out_info[j]->padded_width; - descr->out_info[i].format = out_info[j]->format; - if (vf_out_info[j]) { - descr->vf_info[i].res.width = vf_out_info[j]->res.width; - descr->vf_info[i].res.height = vf_out_info[j]->res.height; - descr->vf_info[i].padded_width = vf_out_info[j]->padded_width; - ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + tmp_in_info.res = pipe->config.input_effective_res; + tmp_in_info.format = IA_CSS_FRAME_FORMAT_YUV420; + for (i = 0, j = 0; i < descr->num_stage; i++) { + assert(j < 2); + assert(out_info[j]); + + descr->in_info[i] = tmp_in_info; + if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= + out_info[j]->res.width) { + descr->is_output_stage[i] = true; + if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { + descr->internal_out_info[i].res.width = out_info[j]->res.width; + descr->internal_out_info[i].res.height = out_info[j]->res.height; + descr->internal_out_info[i].padded_width = out_info[j]->padded_width; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + } else { + assert(i == (descr->num_stage - 1)); + descr->internal_out_info[i].res.width = 0; + descr->internal_out_info[i].res.height = 0; + } + descr->out_info[i].res.width = out_info[j]->res.width; + descr->out_info[i].res.height = out_info[j]->res.height; + descr->out_info[i].padded_width = out_info[j]->padded_width; + descr->out_info[i].format = out_info[j]->format; + if (vf_out_info[j]) { + descr->vf_info[i].res.width = vf_out_info[j]->res.width; + descr->vf_info[i].res.height = vf_out_info[j]->res.height; + descr->vf_info[i].padded_width = vf_out_info[j]->padded_width; + ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + } else { + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + descr->vf_info[i].padded_width = 0; + } + j++; } else { + descr->is_output_stage[i] = false; + descr->internal_out_info[i].res.width = tmp_in_info.res.width / + max_scale_factor_per_stage; + descr->internal_out_info[i].res.height = tmp_in_info.res.height / + max_scale_factor_per_stage; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init(&descr->internal_out_info[i], + tmp_in_info.res.width / max_scale_factor_per_stage, + tmp_in_info.res.height / max_scale_factor_per_stage, + IA_CSS_FRAME_FORMAT_YUV420, 0); + descr->out_info[i].res.width = 0; + descr->out_info[i].res.height = 0; descr->vf_info[i].res.width = 0; descr->vf_info[i].res.height = 0; - descr->vf_info[i].padded_width = 0; } - j++; - } else { - descr->is_output_stage[i] = false; - descr->internal_out_info[i].res.width = tmp_in_info.res.width / max_scale_factor_per_stage; - descr->internal_out_info[i].res.height = tmp_in_info.res.height / max_scale_factor_per_stage; - descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - ia_css_frame_info_init(&descr->internal_out_info[i], - tmp_in_info.res.width / max_scale_factor_per_stage, - tmp_in_info.res.height / max_scale_factor_per_stage, - IA_CSS_FRAME_FORMAT_YUV420, 0); - descr->out_info[i].res.width = 0; - descr->out_info[i].res.height = 0; - descr->vf_info[i].res.width = 0; - descr->vf_info[i].res.height = 0; - } - tmp_in_info = descr->internal_out_info[i]; - } + tmp_in_info = descr->internal_out_info[i]; + } ERR: - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", - err); - return err; -} + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", + err); + return err; + } -static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr *descr) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_destroy_cas_scaler_desc() enter:\n"); - kfree(descr->in_info); - descr->in_info = NULL; - kfree(descr->internal_out_info); - descr->internal_out_info = NULL; - kfree(descr->out_info); - descr->out_info = NULL; - kfree(descr->vf_info); - descr->vf_info = NULL; - kfree(descr->is_output_stage); - descr->is_output_stage = NULL; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_destroy_cas_scaler_desc() leave\n"); -} + static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr + *descr) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_destroy_cas_scaler_desc() enter:\n"); + kfree(descr->in_info); + descr->in_info = NULL; + kfree(descr->internal_out_info); + descr->internal_out_info = NULL; + kfree(descr->out_info); + descr->out_info = NULL; + kfree(descr->vf_info); + descr->vf_info = NULL; + kfree(descr->is_output_stage); + descr->is_output_stage = NULL; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_destroy_cas_scaler_desc() leave\n"); + } -static enum ia_css_err -load_yuvpp_binaries(struct ia_css_pipe *pipe) -{ - enum ia_css_err err = IA_CSS_SUCCESS; - bool need_scaler = false; - struct ia_css_frame_info *vf_pp_in_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_yuvpp_settings *mycs; - struct ia_css_binary *next_binary; - struct ia_css_cas_binary_descr cas_scaler_descr = { }; - unsigned int i, j; - bool need_isp_copy_binary = false; + static enum ia_css_err + load_yuvpp_binaries(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + bool need_scaler = false; + struct ia_css_frame_info *vf_pp_in_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_yuvpp_settings *mycs; + struct ia_css_binary *next_binary; + struct ia_css_cas_binary_descr cas_scaler_descr = { }; + unsigned int i, j; + bool need_isp_copy_binary = false; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->stream); - assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->stream); + assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); - if (pipe->pipe_settings.yuvpp.copy_binary.info) - goto ERR; + if (pipe->pipe_settings.yuvpp.copy_binary.info) + goto ERR; - /* Set both must_be_raw and must_be_yuv to false then yuvpp can take rgb inputs */ - err = ia_css_util_check_input(&pipe->stream->config, false, false); - if (err != IA_CSS_SUCCESS) - goto ERR; + /* Set both must_be_raw and must_be_yuv to false then yuvpp can take rgb inputs */ + err = ia_css_util_check_input(&pipe->stream->config, false, false); + if (err != IA_CSS_SUCCESS) + goto ERR; - mycs = &pipe->pipe_settings.yuvpp; + mycs = &pipe->pipe_settings.yuvpp; - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if (pipe->vf_output_info[i].res.width != 0) { - err = ia_css_util_check_vf_out_info(&pipe->output_info[i], - &pipe->vf_output_info[i]); - if (err != IA_CSS_SUCCESS) - goto ERR; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) + { + if (pipe->vf_output_info[i].res.width != 0) { + err = ia_css_util_check_vf_out_info(&pipe->output_info[i], + &pipe->vf_output_info[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + vf_pp_in_info[i] = NULL; } - vf_pp_in_info[i] = NULL; - } - need_scaler = need_yuv_scaler_stage(pipe); + need_scaler = need_yuv_scaler_stage(pipe); - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ - if (need_scaler) { - struct ia_css_binary_descr yuv_scaler_descr; + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_scaler) + { + struct ia_css_binary_descr yuv_scaler_descr; - err = ia_css_pipe_create_cas_scaler_desc(pipe, - &cas_scaler_descr); - if (err != IA_CSS_SUCCESS) - goto ERR; - mycs->num_output = cas_scaler_descr.num_output_stage; - mycs->num_yuv_scaler = cas_scaler_descr.num_stage; - mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * - sizeof(struct ia_css_binary), GFP_KERNEL); - if (!mycs->yuv_scaler_binary) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage * - sizeof(bool), GFP_KERNEL); - if (!mycs->is_output_stage) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - for (i = 0; i < cas_scaler_descr.num_stage; i++) { - mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; - ia_css_pipe_get_yuvscaler_binarydesc(pipe, - &yuv_scaler_descr, &cas_scaler_descr.in_info[i], - &cas_scaler_descr.out_info[i], - &cas_scaler_descr.internal_out_info[i], - &cas_scaler_descr.vf_info[i]); - err = ia_css_binary_find(&yuv_scaler_descr, - &mycs->yuv_scaler_binary[i]); + err = ia_css_pipe_create_cas_scaler_desc(pipe, + &cas_scaler_descr); if (err != IA_CSS_SUCCESS) goto ERR; + mycs->num_output = cas_scaler_descr.num_output_stage; + mycs->num_yuv_scaler = cas_scaler_descr.num_stage; + mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * + sizeof(struct ia_css_binary), GFP_KERNEL); + if (!mycs->yuv_scaler_binary) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage * + sizeof(bool), GFP_KERNEL); + if (!mycs->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + for (i = 0; i < cas_scaler_descr.num_stage; i++) { + mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; + ia_css_pipe_get_yuvscaler_binarydesc(pipe, + &yuv_scaler_descr, &cas_scaler_descr.in_info[i], + &cas_scaler_descr.out_info[i], + &cas_scaler_descr.internal_out_info[i], + &cas_scaler_descr.vf_info[i]); + err = ia_css_binary_find(&yuv_scaler_descr, + &mycs->yuv_scaler_binary[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + } else + { + mycs->num_output = 1; } - ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); - } else { - mycs->num_output = 1; - } - if (need_scaler) { - next_binary = &mycs->yuv_scaler_binary[0]; - } else { - next_binary = NULL; - } + if (need_scaler) + { + next_binary = &mycs->yuv_scaler_binary[0]; + } else + { + next_binary = NULL; + } #if defined(USE_INPUT_SYSTEM_VERSION_2401) - /* - * NOTES - * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when - * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? - * - * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ - * binary". However, the "yuv_scale_binary" does NOT support the input-frame - * format as "IA_CSS_STREAM _FORMAT_YUV422_8". - * - * Hence, the "isp_copy_binary" is required to be present in front of the "yuv - * _scale_binary". It would translate the input-frame to the frame formats that - * are supported by the "yuv_scale_binary". - * - * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ - * pp_defs.h" for the list of input-frame formats that are supported by the - * "yuv_scale_binary". - */ - need_isp_copy_binary = - (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8); -#else /* !USE_INPUT_SYSTEM_VERSION_2401 */ - need_isp_copy_binary = true; -#endif /* USE_INPUT_SYSTEM_VERSION_2401 */ - - if (need_isp_copy_binary) { - err = load_copy_binary(pipe, - &mycs->copy_binary, - next_binary); - - if (err != IA_CSS_SUCCESS) - goto ERR; - /* * NOTES - * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? + * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when + * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? * - * In some use cases, the first stage in the "yuvpp" pipe is the - * "isp_copy_binary". The "isp_copy_binary" is designed to process - * the input from either the system DDR or from the IPU internal VMEM. - * So it provides the flag "online" to specify where its input is from, - * i.e.: + * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ + * binary". However, the "yuv_scale_binary" does NOT support the input-frame + * format as "IA_CSS_STREAM _FORMAT_YUV422_8". * - * (1) "online <= true", the input is from the IPU internal VMEM. - * (2) "online <= false", the input is from the system DDR. + * Hence, the "isp_copy_binary" is required to be present in front of the "yuv + * _scale_binary". It would translate the input-frame to the frame formats that + * are supported by the "yuv_scale_binary". * - * In other use cases, the first stage in the "yuvpp" pipe is the - * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the - * input ONLY from the system DDR. So it does not provide the flag "online" - * to specify where its input is from. + * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ + * pp_defs.h" for the list of input-frame formats that are supported by the + * "yuv_scale_binary". */ - pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; - } + need_isp_copy_binary = + (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8); +#else /* !USE_INPUT_SYSTEM_VERSION_2401 */ + need_isp_copy_binary = true; +#endif /* USE_INPUT_SYSTEM_VERSION_2401 */ - /* Viewfinder post-processing */ - if (need_scaler) { - for (i = 0, j = 0; i < mycs->num_yuv_scaler; i++) { - if (mycs->is_output_stage[i]) { - assert(j < 2); - vf_pp_in_info[j] = - &mycs->yuv_scaler_binary[i].vf_frame_info; - j++; + if (need_isp_copy_binary) + { + err = load_copy_binary(pipe, + &mycs->copy_binary, + next_binary); + + if (err != IA_CSS_SUCCESS) + goto ERR; + + /* + * NOTES + * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? + * + * In some use cases, the first stage in the "yuvpp" pipe is the + * "isp_copy_binary". The "isp_copy_binary" is designed to process + * the input from either the system DDR or from the IPU internal VMEM. + * So it provides the flag "online" to specify where its input is from, + * i.e.: + * + * (1) "online <= true", the input is from the IPU internal VMEM. + * (2) "online <= false", the input is from the system DDR. + * + * In other use cases, the first stage in the "yuvpp" pipe is the + * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the + * input ONLY from the system DDR. So it does not provide the flag "online" + * to specify where its input is from. + */ + pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; + } + + /* Viewfinder post-processing */ + if (need_scaler) + { + for (i = 0, j = 0; i < mycs->num_yuv_scaler; i++) { + if (mycs->is_output_stage[i]) { + assert(j < 2); + vf_pp_in_info[j] = + &mycs->yuv_scaler_binary[i].vf_frame_info; + j++; + } + } + mycs->num_vf_pp = j; + } else + { + vf_pp_in_info[0] = + &mycs->copy_binary.vf_frame_info; + for (i = 1; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + vf_pp_in_info[i] = NULL; } + mycs->num_vf_pp = 1; } - mycs->num_vf_pp = j; - } else { - vf_pp_in_info[0] = - &mycs->copy_binary.vf_frame_info; - for (i = 1; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - vf_pp_in_info[i] = NULL; + mycs->vf_pp_binary = kzalloc(mycs->num_vf_pp * sizeof(struct ia_css_binary), + GFP_KERNEL); + if (!mycs->vf_pp_binary) + { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; } - mycs->num_vf_pp = 1; - } - mycs->vf_pp_binary = kzalloc(mycs->num_vf_pp * sizeof(struct ia_css_binary), - GFP_KERNEL); - if (!mycs->vf_pp_binary) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - { - struct ia_css_binary_descr vf_pp_descr; + { + struct ia_css_binary_descr vf_pp_descr; - for (i = 0; i < mycs->num_vf_pp; i++) { - if (pipe->vf_output_info[i].res.width != 0) { - ia_css_pipe_get_vfpp_binarydesc(pipe, - &vf_pp_descr, vf_pp_in_info[i], &pipe->vf_output_info[i]); - err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary[i]); - if (err != IA_CSS_SUCCESS) - goto ERR; + for (i = 0; i < mycs->num_vf_pp; i++) + { + if (pipe->vf_output_info[i].res.width != 0) { + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info[i], &pipe->vf_output_info[i]); + err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } } } - } - if (err != IA_CSS_SUCCESS) - goto ERR; + if (err != IA_CSS_SUCCESS) + goto ERR; ERR: - if (need_scaler) { - ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + if (need_scaler) + { + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "load_yuvpp_binaries() leave, err=%d\n", + err); + return err; } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "load_yuvpp_binaries() leave, err=%d\n", - err); - return err; -} -static enum ia_css_err -unload_yuvpp_binaries(struct ia_css_pipe *pipe) -{ - unsigned int i; + static enum ia_css_err + unload_yuvpp_binaries(struct ia_css_pipe *pipe) { + unsigned int i; - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - ia_css_binary_unload(&pipe->pipe_settings.yuvpp.copy_binary); - for (i = 0; i < pipe->pipe_settings.yuvpp.num_yuv_scaler; i++) { - ia_css_binary_unload(&pipe->pipe_settings.yuvpp.yuv_scaler_binary[i]); - } - for (i = 0; i < pipe->pipe_settings.yuvpp.num_vf_pp; i++) { - ia_css_binary_unload(&pipe->pipe_settings.yuvpp.vf_pp_binary[i]); - } - kfree(pipe->pipe_settings.yuvpp.is_output_stage); - pipe->pipe_settings.yuvpp.is_output_stage = NULL; - kfree(pipe->pipe_settings.yuvpp.yuv_scaler_binary); - pipe->pipe_settings.yuvpp.yuv_scaler_binary = NULL; - kfree(pipe->pipe_settings.yuvpp.vf_pp_binary); - pipe->pipe_settings.yuvpp.vf_pp_binary = NULL; + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.copy_binary); + for (i = 0; i < pipe->pipe_settings.yuvpp.num_yuv_scaler; i++) + { + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.yuv_scaler_binary[i]); + } + for (i = 0; i < pipe->pipe_settings.yuvpp.num_vf_pp; i++) + { + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.vf_pp_binary[i]); + } + kfree(pipe->pipe_settings.yuvpp.is_output_stage); + pipe->pipe_settings.yuvpp.is_output_stage = NULL; + kfree(pipe->pipe_settings.yuvpp.yuv_scaler_binary); + pipe->pipe_settings.yuvpp.yuv_scaler_binary = NULL; + kfree(pipe->pipe_settings.yuvpp.vf_pp_binary); + pipe->pipe_settings.yuvpp.vf_pp_binary = NULL; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; -} + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } -static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) -{ - struct ia_css_binary *copy_binary; - enum ia_css_err err = IA_CSS_SUCCESS; - enum sh_css_pipe_config_override copy_ovrd; - enum ia_css_input_mode yuvpp_pipe_input_mode; + static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) { + struct ia_css_binary *copy_binary; + enum ia_css_err err = IA_CSS_SUCCESS; + enum sh_css_pipe_config_override copy_ovrd; + enum ia_css_input_mode yuvpp_pipe_input_mode; - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - yuvpp_pipe_input_mode = pipe->stream->config.mode; + yuvpp_pipe_input_mode = pipe->stream->config.mode; - copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; + copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; - sh_css_metrics_start_frame(); + sh_css_metrics_start_frame(); - /* multi stream video needs mipi buffers */ + /* multi stream video needs mipi buffers */ #if !defined(HAS_NO_INPUT_SYSTEM) && (defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)) - err = send_mipi_frames(pipe); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } #endif - { - unsigned int thread_id; + { + unsigned int thread_id; - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - } + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + } - start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode); + start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode); - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } -static enum ia_css_err -sh_css_pipe_unload_binaries(struct ia_css_pipe *pipe) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + static enum ia_css_err + sh_css_pipe_unload_binaries(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if (!pipe) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + if (!pipe) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } - switch (pipe->mode) { - case IA_CSS_PIPE_ID_PREVIEW: - err = unload_preview_binaries(pipe); - break; - case IA_CSS_PIPE_ID_VIDEO: - err = unload_video_binaries(pipe); - break; - case IA_CSS_PIPE_ID_CAPTURE: - err = unload_capture_binaries(pipe); - break; - case IA_CSS_PIPE_ID_YUVPP: - err = unload_yuvpp_binaries(pipe); - break; - default: - break; + switch (pipe->mode) + { + case IA_CSS_PIPE_ID_PREVIEW: + err = unload_preview_binaries(pipe); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = unload_video_binaries(pipe); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = unload_capture_binaries(pipe); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = unload_yuvpp_binaries(pipe); + break; + default: + break; + } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} -static enum ia_css_err -sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + static enum ia_css_err + sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; - assert(pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_load_binaries() enter:\n"); + assert(pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_load_binaries() enter:\n"); - /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) - return err; + /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + return err; - switch (pipe->mode) { - case IA_CSS_PIPE_ID_PREVIEW: - err = load_preview_binaries(pipe); - break; - case IA_CSS_PIPE_ID_VIDEO: - err = load_video_binaries(pipe); - break; - case IA_CSS_PIPE_ID_CAPTURE: - err = load_capture_binaries(pipe); - break; - case IA_CSS_PIPE_ID_YUVPP: - err = load_yuvpp_binaries(pipe); - break; - case IA_CSS_PIPE_ID_ACC: - break; - default: - err = IA_CSS_ERR_INTERNAL_ERROR; - break; - } - if (err != IA_CSS_SUCCESS) { - if (sh_css_pipe_unload_binaries(pipe) != IA_CSS_SUCCESS) { - /* currently css does not support multiple error returns in a single function, - * using IA_CSS_ERR_INTERNAL_ERROR in this case */ + switch (pipe->mode) + { + case IA_CSS_PIPE_ID_PREVIEW: + err = load_preview_binaries(pipe); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = load_video_binaries(pipe); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = load_capture_binaries(pipe); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = load_yuvpp_binaries(pipe); + break; + case IA_CSS_PIPE_ID_ACC: + break; + default: err = IA_CSS_ERR_INTERNAL_ERROR; + break; + } + if (err != IA_CSS_SUCCESS) + { + if (sh_css_pipe_unload_binaries(pipe) != IA_CSS_SUCCESS) { + /* currently css does not support multiple error returns in a single function, + * using IA_CSS_ERR_INTERNAL_ERROR in this case */ + err = IA_CSS_ERR_INTERNAL_ERROR; + } } + return err; } - return err; -} - -static enum ia_css_err -create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) -{ - struct ia_css_pipeline *me; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_pipeline_stage *vf_pp_stage = NULL, - *copy_stage = NULL, - *yuv_scaler_stage = NULL; - struct ia_css_binary *copy_binary, - *vf_pp_binary, - *yuv_scaler_binary; - bool need_scaler = false; - unsigned int num_stage, num_vf_pp_stage, num_output_stage; - unsigned int i, j; - struct ia_css_frame *in_frame = NULL; - struct ia_css_frame *out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_frame *bin_out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - struct ia_css_frame *vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_pipeline_stage_desc stage_desc; - bool need_in_frameinfo_memory = false; + static enum ia_css_err + create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage *vf_pp_stage = NULL, + *copy_stage = NULL, + *yuv_scaler_stage = NULL; + struct ia_css_binary *copy_binary, + *vf_pp_binary, + *yuv_scaler_binary; + bool need_scaler = false; + unsigned int num_stage, num_vf_pp_stage, num_output_stage; + unsigned int i, j; + + struct ia_css_frame *in_frame = NULL; + struct ia_css_frame *out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame *bin_out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_pipeline_stage_desc stage_desc; + bool need_in_frameinfo_memory = false; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - bool sensor = false; - bool buffered_sensor = false; - bool online = false; - bool continuous = false; + bool sensor = false; + bool buffered_sensor = false; + bool online = false; + bool continuous = false; #endif - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - me = &pipe->pipeline; - ia_css_pipeline_clean(me); - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - out_frame[i] = NULL; - vf_frame[i] = NULL; - } - ia_css_pipe_util_create_output_frames(bin_out_frame); - num_stage = pipe->pipe_settings.yuvpp.num_yuv_scaler; - num_vf_pp_stage = pipe->pipe_settings.yuvpp.num_vf_pp; - num_output_stage = pipe->pipe_settings.yuvpp.num_output; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + me = &pipe->pipeline; + ia_css_pipeline_clean(me); + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) + { + out_frame[i] = NULL; + vf_frame[i] = NULL; + } + ia_css_pipe_util_create_output_frames(bin_out_frame); + num_stage = pipe->pipe_settings.yuvpp.num_yuv_scaler; + num_vf_pp_stage = pipe->pipe_settings.yuvpp.num_vf_pp; + num_output_stage = pipe->pipe_settings.yuvpp.num_output; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ - sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; - buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; - online = pipe->stream->config.online; - continuous = pipe->stream->config.continuous; - need_in_frameinfo_memory = + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ + sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; + buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; + need_in_frameinfo_memory = !((sensor && (online || continuous)) || (buffered_sensor && continuous)); #else - /* Construct in_frame info (only in case we have dynamic input */ - need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - /* the input frame can come from: - * a) memory: connect yuvscaler to me->in_frame - * b) sensor, via copy binary: connect yuvscaler to copy binary later on */ - if (need_in_frameinfo_memory) { - /* TODO: improve for different input formats. */ - - /* - * "pipe->stream->config.input_config.format" represents the sensor output - * frame format, e.g. YUV422 8-bit. - * - * "in_frame_format" represents the imaging pipe's input frame format, e.g. - * Bayer-Quad RAW. - */ - int in_frame_format; + /* the input frame can come from: + * a) memory: connect yuvscaler to me->in_frame + * b) sensor, via copy binary: connect yuvscaler to copy binary later on */ + if (need_in_frameinfo_memory) + { + /* TODO: improve for different input formats. */ - if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { - in_frame_format = IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8; - } else if (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8) { /* - * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", - * the "isp_copy_var" binary is selected as the first stage in the yuvpp - * pipe. - * - * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from - * the frame buffer (at DDR) to the frame-line buffer (at VMEM). - * - * By now, the "isp_copy_var" binary does NOT provide a separated - * frame-line buffer to store the YUV422-8 pixels. Instead, it stores - * the YUV422-8 pixels in the frame-line buffer which is designed to - * store the Bayer-Quad RAW pixels. + * "pipe->stream->config.input_config.format" represents the sensor output + * frame format, e.g. YUV422 8-bit. * - * To direct the "isp_copy_var" binary reading from the RAW frame-line - * buffer, its input frame format must be specified as "IA_CSS_FRAME_ - * FORMAT_RAW". + * "in_frame_format" represents the imaging pipe's input frame format, e.g. + * Bayer-Quad RAW. */ - in_frame_format = IA_CSS_FRAME_FORMAT_RAW; - } else { - in_frame_format = IA_CSS_FRAME_FORMAT_NV12; - } - - err = init_in_frameinfo_memory_defaults(pipe, - &me->in_frame, - in_frame_format); - - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + int in_frame_format; + + if (pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { + in_frame_format = IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8; + } else if (pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_YUV422_8) { + /* + * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", + * the "isp_copy_var" binary is selected as the first stage in the yuvpp + * pipe. + * + * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from + * the frame buffer (at DDR) to the frame-line buffer (at VMEM). + * + * By now, the "isp_copy_var" binary does NOT provide a separated + * frame-line buffer to store the YUV422-8 pixels. Instead, it stores + * the YUV422-8 pixels in the frame-line buffer which is designed to + * store the Bayer-Quad RAW pixels. + * + * To direct the "isp_copy_var" binary reading from the RAW frame-line + * buffer, its input frame format must be specified as "IA_CSS_FRAME_ + * FORMAT_RAW". + */ + in_frame_format = IA_CSS_FRAME_FORMAT_RAW; + } else { + in_frame_format = IA_CSS_FRAME_FORMAT_NV12; + } - in_frame = &me->in_frame; - } else { - in_frame = NULL; - } + err = init_in_frameinfo_memory_defaults(pipe, + &me->in_frame, + in_frame_format); - for (i = 0; i < num_output_stage; i++) { - assert(i < IA_CSS_PIPE_MAX_OUTPUT_STAGE); - if (pipe->output_info[i].res.width != 0) { - err = init_out_frameinfo_defaults(pipe, &me->out_frame[i], i); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - out_frame[i] = &me->out_frame[i]; + + in_frame = &me->in_frame; + } else + { + in_frame = NULL; } - /* Construct vf_frame info (only in case we have VF) */ - if (pipe->vf_output_info[i].res.width != 0) { - err = init_vf_frameinfo_defaults(pipe, &me->vf_frame[i], i); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + for (i = 0; i < num_output_stage; i++) + { + assert(i < IA_CSS_PIPE_MAX_OUTPUT_STAGE); + if (pipe->output_info[i].res.width != 0) { + err = init_out_frameinfo_defaults(pipe, &me->out_frame[i], i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + out_frame[i] = &me->out_frame[i]; + } + + /* Construct vf_frame info (only in case we have VF) */ + if (pipe->vf_output_info[i].res.width != 0) { + err = init_vf_frameinfo_defaults(pipe, &me->vf_frame[i], i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + vf_frame[i] = &me->vf_frame[i]; } - vf_frame[i] = &me->vf_frame[i]; } - } - copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; - vf_pp_binary = pipe->pipe_settings.yuvpp.vf_pp_binary; - yuv_scaler_binary = pipe->pipe_settings.yuvpp.yuv_scaler_binary; - need_scaler = need_yuv_scaler_stage(pipe); + copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; + vf_pp_binary = pipe->pipe_settings.yuvpp.vf_pp_binary; + yuv_scaler_binary = pipe->pipe_settings.yuvpp.yuv_scaler_binary; + need_scaler = need_yuv_scaler_stage(pipe); - if (pipe->pipe_settings.yuvpp.copy_binary.info) { - struct ia_css_frame *in_frame_local = NULL; + if (pipe->pipe_settings.yuvpp.copy_binary.info) + { + struct ia_css_frame *in_frame_local = NULL; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* After isp copy is enabled in_frame needs to be passed. */ - if (!online) - in_frame_local = in_frame; + /* After isp copy is enabled in_frame needs to be passed. */ + if (!online) + in_frame_local = in_frame; #endif - if (need_scaler) { - ia_css_pipe_util_set_output_frames(bin_out_frame, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - bin_out_frame, in_frame_local, NULL); - } else { - ia_css_pipe_util_set_output_frames(bin_out_frame, 0, out_frame[0]); - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - bin_out_frame, in_frame_local, NULL); - } - - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ©_stage); - - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - if (copy_stage) { - /* if we use yuv scaler binary, vf output should be from there */ - copy_stage->args.copy_vf = !need_scaler; - /* for yuvpp pipe, it should always be enabled */ - copy_stage->args.copy_output = true; - /* connect output of copy binary to input of yuv scaler */ - in_frame = copy_stage->args.out_frame[0]; - } - } - - if (need_scaler) { - struct ia_css_frame *tmp_out_frame = NULL; - struct ia_css_frame *tmp_vf_frame = NULL; - struct ia_css_frame *tmp_in_frame = in_frame; - - for (i = 0, j = 0; i < num_stage; i++) { - assert(j < num_output_stage); - if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { - tmp_out_frame = out_frame[j]; - tmp_vf_frame = vf_frame[j]; + if (need_scaler) { + ia_css_pipe_util_set_output_frames(bin_out_frame, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + bin_out_frame, in_frame_local, NULL); } else { - tmp_out_frame = NULL; - tmp_vf_frame = NULL; + ia_css_pipe_util_set_output_frames(bin_out_frame, 0, out_frame[0]); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + bin_out_frame, in_frame_local, NULL); } - err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, - NULL, - &yuv_scaler_binary[i], - &yuv_scaler_stage); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ©_stage); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - /* we use output port 1 as internal output port */ - tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; - if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { - if (tmp_vf_frame && (tmp_vf_frame->info.res.width != 0)) { - in_frame = yuv_scaler_stage->args.out_vf_frame; - err = add_vf_pp_stage(pipe, in_frame, tmp_vf_frame, &vf_pp_binary[j], - &vf_pp_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } - j++; + if (copy_stage) { + /* if we use yuv scaler binary, vf output should be from there */ + copy_stage->args.copy_vf = !need_scaler; + /* for yuvpp pipe, it should always be enabled */ + copy_stage->args.copy_output = true; + /* connect output of copy binary to input of yuv scaler */ + in_frame = copy_stage->args.out_frame[0]; } } - } else if (copy_stage) { - if (vf_frame[0] && vf_frame[0]->info.res.width != 0) { - in_frame = copy_stage->args.out_vf_frame; - err = add_vf_pp_stage(pipe, in_frame, vf_frame[0], &vf_pp_binary[0], - &vf_pp_stage); - } - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } - ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + if (need_scaler) + { + struct ia_css_frame *tmp_out_frame = NULL; + struct ia_css_frame *tmp_vf_frame = NULL; + struct ia_css_frame *tmp_in_frame = in_frame; + + for (i = 0, j = 0; i < num_stage; i++) { + assert(j < num_output_stage); + if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { + tmp_out_frame = out_frame[j]; + tmp_vf_frame = vf_frame[j]; + } else { + tmp_out_frame = NULL; + tmp_vf_frame = NULL; + } - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, + NULL, + &yuv_scaler_binary[i], + &yuv_scaler_stage); - return IA_CSS_SUCCESS; -} + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* we use output port 1 as internal output port */ + tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; + if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { + if (tmp_vf_frame && (tmp_vf_frame->info.res.width != 0)) { + in_frame = yuv_scaler_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, tmp_vf_frame, &vf_pp_binary[j], + &vf_pp_stage); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + j++; + } + } + } else if (copy_stage) + { + if (vf_frame[0] && vf_frame[0]->info.res.width != 0) { + in_frame = copy_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, vf_frame[0], &vf_pp_binary[0], + &vf_pp_stage); + } + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } -static enum ia_css_err -create_host_copy_pipeline(struct ia_css_pipe *pipe, - unsigned int max_input_width, - struct ia_css_frame *out_frame) -{ - struct ia_css_pipeline *me; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_pipeline_stage_desc stage_desc; + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_copy_pipeline() enter:\n"); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - /* pipeline already created as part of create_host_pipeline_structure */ - me = &pipe->pipeline; - ia_css_pipeline_clean(me); + return IA_CSS_SUCCESS; + } - /* Construct out_frame info */ - out_frame->contiguous = false; - out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + static enum ia_css_err + create_host_copy_pipeline(struct ia_css_pipe *pipe, + unsigned int max_input_width, + struct ia_css_frame *out_frame) { + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage_desc stage_desc; - if (copy_on_sp(pipe) && - pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { - ia_css_frame_info_init( - &out_frame->info, - JPEG_BYTES, - 1, - IA_CSS_FRAME_FORMAT_BINARY_8, - 0); - } else if (out_frame->info.format == IA_CSS_FRAME_FORMAT_RAW) { - out_frame->info.raw_bit_depth = - ia_css_pipe_util_pipe_input_format_bpp(pipe); - } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_copy_pipeline() enter:\n"); - me->num_stages = 1; - me->pipe_id = IA_CSS_PIPE_ID_COPY; - pipe->mode = IA_CSS_PIPE_ID_COPY; + /* pipeline already created as part of create_host_pipeline_structure */ + me = &pipe->pipeline; + ia_css_pipeline_clean(me); - ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, - IA_CSS_PIPELINE_RAW_COPY, max_input_width); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - NULL); + /* Construct out_frame info */ + out_frame->contiguous = false; + out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; - ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) + { + ia_css_frame_info_init( + &out_frame->info, + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + } else if (out_frame->info.format == IA_CSS_FRAME_FORMAT_RAW) + { + out_frame->info.raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); + } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_copy_pipeline() leave:\n"); + me->num_stages = 1; + me->pipe_id = IA_CSS_PIPE_ID_COPY; + pipe->mode = IA_CSS_PIPE_ID_COPY; - return err; -} + ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, + IA_CSS_PIPELINE_RAW_COPY, max_input_width); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); -static enum ia_css_err -create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe) -{ - struct ia_css_pipeline *me = &pipe->pipeline; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_pipeline_stage_desc stage_desc; - struct ia_css_frame *out_frame = &me->out_frame[0]; - struct ia_css_pipeline_stage *out_stage = NULL; - unsigned int thread_id; - enum sh_css_queue_id queue_id; - unsigned int max_input_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_isyscopy_capture_pipeline() enter:\n"); - ia_css_pipeline_clean(me); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_copy_pipeline() leave:\n"); - /* Construct out_frame info */ - err = sh_css_pipe_get_output_frame_info(pipe, &out_frame->info, 0); - if (err != IA_CSS_SUCCESS) return err; - out_frame->contiguous = false; - out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, &queue_id); - out_frame->dynamic_queue_id = queue_id; - out_frame->buf_type = IA_CSS_BUFFER_TYPE_OUTPUT_FRAME; + } - me->num_stages = 1; - me->pipe_id = IA_CSS_PIPE_ID_CAPTURE; - pipe->mode = IA_CSS_PIPE_ID_CAPTURE; - ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, - IA_CSS_PIPELINE_ISYS_COPY, max_input_width); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, &out_stage); - if (err != IA_CSS_SUCCESS) - return err; + static enum ia_css_err + create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me = &pipe->pipeline; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage_desc stage_desc; + struct ia_css_frame *out_frame = &me->out_frame[0]; + struct ia_css_pipeline_stage *out_stage = NULL; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + unsigned int max_input_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; - ia_css_pipeline_finalize_stages(me, pipe->stream->config.continuous); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_isyscopy_capture_pipeline() enter:\n"); + ia_css_pipeline_clean(me); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_isyscopy_capture_pipeline() leave:\n"); + /* Construct out_frame info */ + err = sh_css_pipe_get_output_frame_info(pipe, &out_frame->info, 0); + if (err != IA_CSS_SUCCESS) + return err; + out_frame->contiguous = false; + out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, &queue_id); + out_frame->dynamic_queue_id = queue_id; + out_frame->buf_type = IA_CSS_BUFFER_TYPE_OUTPUT_FRAME; + + me->num_stages = 1; + me->pipe_id = IA_CSS_PIPE_ID_CAPTURE; + pipe->mode = IA_CSS_PIPE_ID_CAPTURE; + ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, + IA_CSS_PIPELINE_ISYS_COPY, max_input_width); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, &out_stage); + if (err != IA_CSS_SUCCESS) + return err; - return err; -} + ia_css_pipeline_finalize_stages(me, pipe->stream->config.continuous); -static enum ia_css_err -create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) -{ - struct ia_css_pipeline *me; - enum ia_css_err err = IA_CSS_SUCCESS; - enum ia_css_capture_mode mode; - struct ia_css_pipeline_stage *current_stage = NULL; - struct ia_css_pipeline_stage *yuv_scaler_stage = NULL; - struct ia_css_binary *copy_binary, - *primary_binary[MAX_NUM_PRIMARY_STAGES], - *vf_pp_binary, - *pre_isp_binary, - *anr_gdc_binary, - *post_isp_binary, - *yuv_scaler_binary, - *capture_pp_binary, - *capture_ldc_binary; - bool need_pp = false; - bool raw; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_isyscopy_capture_pipeline() leave:\n"); - struct ia_css_frame *in_frame; - struct ia_css_frame *out_frame; - struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - struct ia_css_frame *vf_frame; - struct ia_css_pipeline_stage_desc stage_desc; - bool need_in_frameinfo_memory = false; + return err; + } + + static enum ia_css_err + create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_capture_mode mode; + struct ia_css_pipeline_stage *current_stage = NULL; + struct ia_css_pipeline_stage *yuv_scaler_stage = NULL; + struct ia_css_binary *copy_binary, + *primary_binary[MAX_NUM_PRIMARY_STAGES], + *vf_pp_binary, + *pre_isp_binary, + *anr_gdc_binary, + *post_isp_binary, + *yuv_scaler_binary, + *capture_pp_binary, + *capture_ldc_binary; + bool need_pp = false; + bool raw; + + struct ia_css_frame *in_frame; + struct ia_css_frame *out_frame; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame; + struct ia_css_pipeline_stage_desc stage_desc; + bool need_in_frameinfo_memory = false; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - bool sensor = false; - bool buffered_sensor = false; - bool online = false; - bool continuous = false; + bool sensor = false; + bool buffered_sensor = false; + bool online = false; + bool continuous = false; #endif - unsigned int i, num_yuv_scaler, num_primary_stage; - bool need_yuv_pp = false; - bool *is_output_stage = NULL; - bool need_ldc = false; + unsigned int i, num_yuv_scaler, num_primary_stage; + bool need_yuv_pp = false; + bool *is_output_stage = NULL; + bool need_ldc = false; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->stream); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->stream); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); - me = &pipe->pipeline; - mode = pipe->config.default_capture_config.mode; - raw = (mode == IA_CSS_CAPTURE_MODE_RAW); - ia_css_pipeline_clean(me); - ia_css_pipe_util_create_output_frames(out_frames); + me = &pipe->pipeline; + mode = pipe->config.default_capture_config.mode; + raw = (mode == IA_CSS_CAPTURE_MODE_RAW); + ia_css_pipeline_clean(me); + ia_css_pipe_util_create_output_frames(out_frames); #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ - sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); - buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); - online = pipe->stream->config.online; - continuous = pipe->stream->config.continuous; - need_in_frameinfo_memory = + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ + sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); + buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; + need_in_frameinfo_memory = !((sensor && (online || continuous)) || (buffered_sensor && (online || continuous))); #else - /* Construct in_frame info (only in case we have dynamic input */ - need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - if (need_in_frameinfo_memory) { - err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, IA_CSS_FRAME_FORMAT_RAW); - if (err != IA_CSS_SUCCESS) { + if (need_in_frameinfo_memory) + { + err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, + IA_CSS_FRAME_FORMAT_RAW); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + in_frame = &me->in_frame; + } else + { + in_frame = NULL; + } + + err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0); + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } + out_frame = &me->out_frame[0]; - in_frame = &me->in_frame; - } else { - in_frame = NULL; - } - - err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - out_frame = &me->out_frame[0]; - - /* Construct vf_frame info (only in case we have VF) */ - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) { - if (mode == IA_CSS_CAPTURE_MODE_RAW || mode == IA_CSS_CAPTURE_MODE_BAYER) { - /* These modes don't support viewfinder output */ + /* Construct vf_frame info (only in case we have VF) */ + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) + { + if (mode == IA_CSS_CAPTURE_MODE_RAW || mode == IA_CSS_CAPTURE_MODE_BAYER) { + /* These modes don't support viewfinder output */ + vf_frame = NULL; + } else { + init_vf_frameinfo_defaults(pipe, &me->vf_frame[0], 0); + vf_frame = &me->vf_frame[0]; + } + } else + { vf_frame = NULL; - } else { - init_vf_frameinfo_defaults(pipe, &me->vf_frame[0], 0); - vf_frame = &me->vf_frame[0]; } - } else { - vf_frame = NULL; - } - copy_binary = &pipe->pipe_settings.capture.copy_binary; - num_primary_stage = pipe->pipe_settings.capture.num_primary_stage; - if ((num_primary_stage == 0) && (mode == IA_CSS_CAPTURE_MODE_PRIMARY)) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); - return IA_CSS_ERR_INTERNAL_ERROR; - } - for (i = 0; i < num_primary_stage; i++) { - primary_binary[i] = &pipe->pipe_settings.capture.primary_binary[i]; - } - vf_pp_binary = &pipe->pipe_settings.capture.vf_pp_binary; - pre_isp_binary = &pipe->pipe_settings.capture.pre_isp_binary; - anr_gdc_binary = &pipe->pipe_settings.capture.anr_gdc_binary; - post_isp_binary = &pipe->pipe_settings.capture.post_isp_binary; - capture_pp_binary = &pipe->pipe_settings.capture.capture_pp_binary; - yuv_scaler_binary = pipe->pipe_settings.capture.yuv_scaler_binary; - num_yuv_scaler = pipe->pipe_settings.capture.num_yuv_scaler; - is_output_stage = pipe->pipe_settings.capture.is_output_stage; - capture_ldc_binary = &pipe->pipe_settings.capture.capture_ldc_binary; - - need_pp = (need_capture_pp(pipe) || pipe->output_stage) && - mode != IA_CSS_CAPTURE_MODE_RAW && - mode != IA_CSS_CAPTURE_MODE_BAYER; - need_yuv_pp = (yuv_scaler_binary && yuv_scaler_binary->info); - need_ldc = (capture_ldc_binary && capture_ldc_binary->info); - - if (pipe->pipe_settings.capture.copy_binary.info) { - if (raw) { - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + copy_binary = &pipe->pipe_settings.capture.copy_binary; + num_primary_stage = pipe->pipe_settings.capture.num_primary_stage; + if ((num_primary_stage == 0) && (mode == IA_CSS_CAPTURE_MODE_PRIMARY)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + for (i = 0; i < num_primary_stage; i++) + { + primary_binary[i] = &pipe->pipe_settings.capture.primary_binary[i]; + } + vf_pp_binary = &pipe->pipe_settings.capture.vf_pp_binary; + pre_isp_binary = &pipe->pipe_settings.capture.pre_isp_binary; + anr_gdc_binary = &pipe->pipe_settings.capture.anr_gdc_binary; + post_isp_binary = &pipe->pipe_settings.capture.post_isp_binary; + capture_pp_binary = &pipe->pipe_settings.capture.capture_pp_binary; + yuv_scaler_binary = pipe->pipe_settings.capture.yuv_scaler_binary; + num_yuv_scaler = pipe->pipe_settings.capture.num_yuv_scaler; + is_output_stage = pipe->pipe_settings.capture.is_output_stage; + capture_ldc_binary = &pipe->pipe_settings.capture.capture_ldc_binary; + + need_pp = (need_capture_pp(pipe) || pipe->output_stage) && + mode != IA_CSS_CAPTURE_MODE_RAW && + mode != IA_CSS_CAPTURE_MODE_BAYER; + need_yuv_pp = (yuv_scaler_binary && yuv_scaler_binary->info); + need_ldc = (capture_ldc_binary && capture_ldc_binary->info); + + if (pipe->pipe_settings.capture.copy_binary.info) + { + if (raw) { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) - if (!continuous) { + if (!continuous) { + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, in_frame, NULL); + } else { + in_frame = pipe->stream->last_pipe->continuous_frames[0]; + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, in_frame, NULL); + } +#else ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, in_frame, NULL); + out_frames, NULL, NULL); +#endif } else { - in_frame = pipe->stream->last_pipe->continuous_frames[0]; + ia_css_pipe_util_set_output_frames(out_frames, 0, in_frame); ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, in_frame, NULL); + out_frames, NULL, NULL); } -#else - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, NULL, NULL); -#endif - } else { - ia_css_pipe_util_set_output_frames(out_frames, 0, in_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, NULL, NULL); - } - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } else if (pipe->stream->config.continuous) + { + in_frame = pipe->stream->last_pipe->continuous_frames[0]; } - } else if (pipe->stream->config.continuous) { - in_frame = pipe->stream->last_pipe->continuous_frames[0]; - } - if (mode == IA_CSS_CAPTURE_MODE_PRIMARY) { - struct ia_css_frame *local_in_frame = NULL; - struct ia_css_frame *local_out_frame = NULL; + if (mode == IA_CSS_CAPTURE_MODE_PRIMARY) + { + struct ia_css_frame *local_in_frame = NULL; + struct ia_css_frame *local_out_frame = NULL; - for (i = 0; i < num_primary_stage; i++) { - if (i == 0) - local_in_frame = in_frame; - else - local_in_frame = NULL; + for (i = 0; i < num_primary_stage; i++) { + if (i == 0) + local_in_frame = in_frame; + else + local_in_frame = NULL; #ifndef ISP2401 - if (!need_pp && (i == num_primary_stage - 1)) + if (!need_pp && (i == num_primary_stage - 1)) #else - if (!need_pp && (i == num_primary_stage - 1) && !need_ldc) + if (!need_pp && (i == num_primary_stage - 1) && !need_ldc) #endif - local_out_frame = out_frame; - else - local_out_frame = NULL; - ia_css_pipe_util_set_output_frames(out_frames, 0, local_out_frame); -/* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed from Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. This * should not be considered as a clean solution. - * Proper investigation should be done to come up with the clean - * solution. - * */ - ia_css_pipe_get_generic_stage_desc(&stage_desc, primary_binary[i], - out_frames, local_in_frame, NULL); + local_out_frame = out_frame; + else + local_out_frame = NULL; + ia_css_pipe_util_set_output_frames(out_frames, 0, local_out_frame); + /* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed from Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This * should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + * */ + ia_css_pipe_get_generic_stage_desc(&stage_desc, primary_binary[i], + out_frames, local_in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + /* If we use copy iso primary, + the input must be yuv iso raw */ + current_stage->args.copy_vf = + primary_binary[0]->info->sp.pipeline.mode == + IA_CSS_BINARY_MODE_COPY; + current_stage->args.copy_output = current_stage->args.copy_vf; + } else if (mode == IA_CSS_CAPTURE_MODE_ADVANCED || + mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) + { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, + out_frames, in_frame, NULL); err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ¤t_stage); + &stage_desc, NULL); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - } - /* If we use copy iso primary, - the input must be yuv iso raw */ - current_stage->args.copy_vf = - primary_binary[0]->info->sp.pipeline.mode == - IA_CSS_BINARY_MODE_COPY; - current_stage->args.copy_output = current_stage->args.copy_vf; - } else if (mode == IA_CSS_CAPTURE_MODE_ADVANCED || - mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, - out_frames, in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, NULL); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, anr_gdc_binary, - out_frames, NULL, NULL); - err = ia_css_pipeline_create_and_add_stage(me, + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, anr_gdc_binary, + out_frames, NULL, NULL); + err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, NULL); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - if (need_pp) { - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, - out_frames, NULL, NULL); - } else { - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, - out_frames, NULL, NULL); - } + if (need_pp) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, + out_frames, NULL, NULL); + } else { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, + out_frames, NULL, NULL); + } - err = ia_css_pipeline_create_and_add_stage(me, + err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } else if (mode == IA_CSS_CAPTURE_MODE_BAYER) { - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, - out_frames, in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - NULL); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } else if (mode == IA_CSS_CAPTURE_MODE_BAYER) + { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, + out_frames, in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } } - } #ifndef ISP2401 - if (need_pp && current_stage) { - struct ia_css_frame *local_in_frame = NULL; + if (need_pp && current_stage) + { + struct ia_css_frame *local_in_frame = NULL; - local_in_frame = current_stage->args.out_frame[0]; + local_in_frame = current_stage->args.out_frame[0]; - if (need_ldc) { - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + if (need_ldc) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, + out_frames, local_in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ¤t_stage); + local_in_frame = current_stage->args.out_frame[0]; + } + err = add_capture_pp_stage(pipe, me, local_in_frame, + need_yuv_pp ? NULL : out_frame, +#else + /* ldc and capture_pp not supported in same pipeline */ + if (need_ldc && current_stage) + { + in_frame = current_stage->args.out_frame[0]; + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, - out_frames, local_in_frame, NULL); + out_frames, in_frame, NULL); err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, - ¤t_stage); - local_in_frame = current_stage->args.out_frame[0]; - } - err = add_capture_pp_stage(pipe, me, local_in_frame, need_yuv_pp ? NULL : out_frame, -#else - /* ldc and capture_pp not supported in same pipeline */ - if (need_ldc && current_stage) { - in_frame = current_stage->args.out_frame[0]; - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, - out_frames, in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - NULL); - } else if (need_pp && current_stage) { - in_frame = current_stage->args.out_frame[0]; - err = add_capture_pp_stage(pipe, me, in_frame, need_yuv_pp ? NULL : out_frame, + NULL); + } else if (need_pp && current_stage) + { + in_frame = current_stage->args.out_frame[0]; + err = add_capture_pp_stage(pipe, me, in_frame, need_yuv_pp ? NULL : out_frame, #endif - capture_pp_binary, - ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } - - if (need_yuv_pp && current_stage) { - struct ia_css_frame *tmp_in_frame = current_stage->args.out_frame[0]; - struct ia_css_frame *tmp_out_frame = NULL; - - for (i = 0; i < num_yuv_scaler; i++) { - if (is_output_stage[i] == true) - tmp_out_frame = out_frame; - else - tmp_out_frame = NULL; - - err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, - NULL, - &yuv_scaler_binary[i], - &yuv_scaler_stage); + capture_pp_binary, + ¤t_stage); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - /* we use output port 1 as internal output port */ - tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; } - } - -/* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The vf-pp - * stage has been removed from Skycam in the solution provided. - * The vf-pp stage should be re-introduced when required. This - * should not be considered as a clean solution. Proper - * investigation should be done to come up with the clean solution. - * */ - if (mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER && current_stage && vf_frame) { - in_frame = current_stage->args.out_vf_frame; - err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary, - ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } - ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_regular_capture_pipeline() leave:\n"); - - return IA_CSS_SUCCESS; -} - -static enum ia_css_err -create_host_capture_pipeline(struct ia_css_pipe *pipe) -{ - enum ia_css_err err = IA_CSS_SUCCESS; - - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) - err = create_host_isyscopy_capture_pipeline(pipe); - else - err = create_host_regular_capture_pipeline(pipe); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - IA_CSS_LEAVE_ERR_PRIVATE(err); - - return err; -} - -static enum ia_css_err capture_start( - struct ia_css_pipe *pipe) -{ - struct ia_css_pipeline *me; - - enum ia_css_err err = IA_CSS_SUCCESS; - enum sh_css_pipe_config_override copy_ovrd; - - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if (!pipe) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - - me = &pipe->pipeline; + if (need_yuv_pp && current_stage) + { + struct ia_css_frame *tmp_in_frame = current_stage->args.out_frame[0]; + struct ia_css_frame *tmp_out_frame = NULL; - if ((pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) && - (pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { - if (copy_on_sp(pipe)) { - err = start_copy_on_sp(pipe, &me->out_frame[0]); - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + for (i = 0; i < num_yuv_scaler; i++) { + if (is_output_stage[i] == true) + tmp_out_frame = out_frame; + else + tmp_out_frame = NULL; + + err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, + NULL, + &yuv_scaler_binary[i], + &yuv_scaler_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + /* we use output port 1 as internal output port */ + tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; + } } - } -#if defined(USE_INPUT_SYSTEM_VERSION_2) - /* old isys: need to send_mipi_frames() in all pipe modes */ - err = send_mipi_frames(pipe); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } -#elif defined(USE_INPUT_SYSTEM_VERSION_2401) - if (pipe->config.mode != IA_CSS_PIPE_MODE_COPY) { - err = send_mipi_frames(pipe); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + /* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The vf-pp + * stage has been removed from Skycam in the solution provided. + * The vf-pp stage should be re-introduced when required. This + * should not be considered as a clean solution. Proper + * investigation should be done to come up with the clean solution. + * */ + if (mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER && current_stage && vf_frame) + { + in_frame = current_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } } - } - -#endif + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - { - unsigned int thread_id; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_regular_capture_pipeline() leave:\n"); - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; + return IA_CSS_SUCCESS; } - start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); -#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) - /* - * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, - * which is currently done in start_binary(); but COPY pipe contains no binary, - * and does not call start_binary(); so we need to configure the rx here. - */ - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY && pipe->stream->reconfigure_css_rx) { - ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, pipe->stream->config.mode); - pipe->stream->reconfigure_css_rx = false; - } -#endif + static enum ia_css_err + create_host_capture_pipeline(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); -static enum ia_css_err -sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, - struct ia_css_frame_info *info, - unsigned int idx) -{ - assert(pipe); - assert(info); + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + err = create_host_isyscopy_capture_pipeline(pipe); + else + err = create_host_regular_capture_pipeline(pipe); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_pipe_get_output_frame_info() enter:\n"); + IA_CSS_LEAVE_ERR_PRIVATE(err); - *info = pipe->output_info[idx]; - if (copy_on_sp(pipe) && - pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { - ia_css_frame_info_init( - info, - JPEG_BYTES, - 1, - IA_CSS_FRAME_FORMAT_BINARY_8, - 0); - } else if (info->format == IA_CSS_FRAME_FORMAT_RAW || - info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) { - info->raw_bit_depth = - ia_css_pipe_util_pipe_input_format_bpp(pipe); + return err; } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_pipe_get_output_frame_info() leave:\n"); - return IA_CSS_SUCCESS; -} + static enum ia_css_err capture_start( + struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me; -#if !defined(HAS_NO_INPUT_SYSTEM) -void -ia_css_stream_send_input_frame(const struct ia_css_stream *stream, - const unsigned short *data, - unsigned int width, - unsigned int height) -{ - assert(stream); + enum ia_css_err err = IA_CSS_SUCCESS; + enum sh_css_pipe_config_override copy_ovrd; - ia_css_inputfifo_send_input_frame( - data, width, height, - stream->config.channel_id, - stream->config.input_config.format, - stream->config.pixels_per_clock == 2); -} + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if (!pipe) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } -void -ia_css_stream_start_input_frame(const struct ia_css_stream *stream) -{ - assert(stream); + me = &pipe->pipeline; - ia_css_inputfifo_start_frame( - stream->config.channel_id, - stream->config.input_config.format, - stream->config.pixels_per_clock == 2); -} + if ((pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) && + (pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { + if (copy_on_sp(pipe)) { + err = start_copy_on_sp(pipe, &me->out_frame[0]); + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } -void -ia_css_stream_send_input_line(const struct ia_css_stream *stream, - const unsigned short *data, - unsigned int width, - const unsigned short *data2, - unsigned int width2) -{ - assert(stream); +#if defined(USE_INPUT_SYSTEM_VERSION_2) + /* old isys: need to send_mipi_frames() in all pipe modes */ + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } +#elif defined(USE_INPUT_SYSTEM_VERSION_2401) + if (pipe->config.mode != IA_CSS_PIPE_MODE_COPY) { + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } - ia_css_inputfifo_send_line(stream->config.channel_id, - data, width, data2, width2); -} +#endif -void -ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, - enum atomisp_input_format format, - const unsigned short *data, - unsigned int width) -{ - assert(stream); - if (!data || width == 0) - return; - ia_css_inputfifo_send_embedded_line(stream->config.channel_id, - format, data, width); -} + { + unsigned int thread_id; -void -ia_css_stream_end_input_frame(const struct ia_css_stream *stream) -{ - assert(stream); + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + } + start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); - ia_css_inputfifo_end_frame(stream->config.channel_id); -} +#if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) + /* + * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, + * which is currently done in start_binary(); but COPY pipe contains no binary, + * and does not call start_binary(); so we need to configure the rx here. + */ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY && + pipe->stream->reconfigure_css_rx) { + ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, + pipe->stream->config.mode); + pipe->stream->reconfigure_css_rx = false; + } #endif -static void -append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) -{ - IA_CSS_ENTER_PRIVATE("l = %p, firmware = %p", l, firmware); - if (!l) { - IA_CSS_ERROR("NULL fw_info"); - IA_CSS_LEAVE_PRIVATE(""); - return; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } - while (*l) - l = &(*l)->next; - *l = firmware; - /*firmware->next = NULL;*/ /* when multiple acc extensions are loaded, 'next' can be not NULL */ - IA_CSS_LEAVE_PRIVATE(""); -} - -static void -remove_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) -{ - assert(*l); - assert(firmware); - (void)l; - (void)firmware; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() enter:\n"); - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() leave:\n"); - return; /* removing single and multiple firmware is handled in acc_unload_extension() */ -} -static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware) -{ - hrt_vaddress binary; + static enum ia_css_err + sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx) { + assert(pipe); + assert(info); - if (!firmware) { - IA_CSS_ERROR("NULL input parameter"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - binary = firmware->info.isp.xmem_addr; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_output_frame_info() enter:\n"); - if (!binary) { - unsigned int size = firmware->blob.size; - const unsigned char *blob; - const unsigned char *binary_name; + *info = pipe->output_info[idx]; + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) + { + ia_css_frame_info_init( + info, + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + } else if (info->format == IA_CSS_FRAME_FORMAT_RAW || + info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) + { + info->raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); + } - binary_name = - (const unsigned char *)(IA_CSS_EXT_ISP_PROG_NAME( - firmware)); - blob = binary_name + - strlen((const char *)binary_name) + - 1; - binary = sh_css_load_blob(blob, size); - firmware->info.isp.xmem_addr = binary; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_output_frame_info() leave:\n"); + return IA_CSS_SUCCESS; } - if (!binary) - return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - return IA_CSS_SUCCESS; -} +#if !defined(HAS_NO_INPUT_SYSTEM) + void + ia_css_stream_send_input_frame(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + unsigned int height) { + assert(stream); + + ia_css_inputfifo_send_input_frame( + data, width, height, + stream->config.channel_id, + stream->config.input_config.format, + stream->config.pixels_per_clock == 2); + } + + void + ia_css_stream_start_input_frame(const struct ia_css_stream *stream) { + assert(stream); + + ia_css_inputfifo_start_frame( + stream->config.channel_id, + stream->config.input_config.format, + stream->config.pixels_per_clock == 2); + } + + void + ia_css_stream_send_input_line(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2) { + assert(stream); + + ia_css_inputfifo_send_line(stream->config.channel_id, + data, width, data2, width2); + } + + void + ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, + enum atomisp_input_format format, + const unsigned short *data, + unsigned int width) { + assert(stream); + if (!data || width == 0) + return; + ia_css_inputfifo_send_embedded_line(stream->config.channel_id, + format, data, width); + } + + void + ia_css_stream_end_input_frame(const struct ia_css_stream *stream) { + assert(stream); + + ia_css_inputfifo_end_frame(stream->config.channel_id); + } +#endif + + static void + append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) { + IA_CSS_ENTER_PRIVATE("l = %p, firmware = %p", l, firmware); + if (!l) { + IA_CSS_ERROR("NULL fw_info"); + IA_CSS_LEAVE_PRIVATE(""); + return; + } + while (*l) + l = &(*l)->next; + *l = firmware; + /*firmware->next = NULL;*/ /* when multiple acc extensions are loaded, 'next' can be not NULL */ + IA_CSS_LEAVE_PRIVATE(""); + } -static enum ia_css_err -acc_load_extension(struct ia_css_fw_info *firmware) -{ - enum ia_css_err err; - struct ia_css_fw_info *hd = firmware; + static void + remove_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) { + assert(*l); + assert(firmware); + (void)l; + (void)firmware; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() enter:\n"); - while (hd) { - err = upload_isp_code(hd); - if (err != IA_CSS_SUCCESS) - return err; - hd = hd->next; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() leave:\n"); + return; /* removing single and multiple firmware is handled in acc_unload_extension() */ } - if (!firmware) - return IA_CSS_ERR_INVALID_ARGUMENTS; - firmware->loaded = true; - return IA_CSS_SUCCESS; -} - -static void -acc_unload_extension(struct ia_css_fw_info *firmware) -{ - struct ia_css_fw_info *hd = firmware; - struct ia_css_fw_info *hdn = NULL; + static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware) { + hrt_vaddress binary; - if (!firmware) /* should not happen */ - return; - /* unload and remove multiple firmwares */ - while (hd) { - hdn = (hd->next) ? &(*hd->next) : NULL; - if (hd->info.isp.xmem_addr) { - hmm_free(hd->info.isp.xmem_addr); - hd->info.isp.xmem_addr = mmgr_NULL; + if (!firmware) { + IA_CSS_ERROR("NULL input parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; } - hd->isp_code = NULL; - hd->next = NULL; - hd = hdn; - } + binary = firmware->info.isp.xmem_addr; - firmware->loaded = false; -} - -/* Load firmware for extension */ -static enum ia_css_err -ia_css_pipe_load_extension(struct ia_css_pipe *pipe, - struct ia_css_fw_info *firmware) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + if (!binary) { + unsigned int size = firmware->blob.size; + const unsigned char *blob; + const unsigned char *binary_name; - IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); + binary_name = + (const unsigned char *)(IA_CSS_EXT_ISP_PROG_NAME( + firmware)); + blob = binary_name + + strlen((const char *)binary_name) + + 1; + binary = sh_css_load_blob(blob, size); + firmware->info.isp.xmem_addr = binary; + } - if ((!firmware) || (!pipe)) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; + if (!binary) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + return IA_CSS_SUCCESS; } - if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) { - if (&pipe->output_stage) - append_firmware(&pipe->output_stage, firmware); - else { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); - return IA_CSS_ERR_INTERNAL_ERROR; - } - } else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) { - if (&pipe->vf_stage) - append_firmware(&pipe->vf_stage, firmware); - else { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); - return IA_CSS_ERR_INTERNAL_ERROR; + static enum ia_css_err + acc_load_extension(struct ia_css_fw_info *firmware) { + enum ia_css_err err; + struct ia_css_fw_info *hd = firmware; + + while (hd) + { + err = upload_isp_code(hd); + if (err != IA_CSS_SUCCESS) + return err; + hd = hd->next; } + + if (!firmware) + return IA_CSS_ERR_INVALID_ARGUMENTS; + firmware->loaded = true; + return IA_CSS_SUCCESS; } - err = acc_load_extension(firmware); - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} + static void + acc_unload_extension(struct ia_css_fw_info *firmware) { + struct ia_css_fw_info *hd = firmware; + struct ia_css_fw_info *hdn = NULL; -/* Unload firmware for extension */ -static void -ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, - struct ia_css_fw_info *firmware) -{ - IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); + if (!firmware) /* should not happen */ + return; + /* unload and remove multiple firmwares */ + while (hd) { + hdn = (hd->next) ? &(*hd->next) : NULL; + if (hd->info.isp.xmem_addr) { + hmm_free(hd->info.isp.xmem_addr); + hd->info.isp.xmem_addr = mmgr_NULL; + } + hd->isp_code = NULL; + hd->next = NULL; + hd = hdn; + } - if ((!firmware) || (!pipe)) { - IA_CSS_ERROR("NULL input parameters"); - IA_CSS_LEAVE_PRIVATE(""); - return; + firmware->loaded = false; } - if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) - remove_firmware(&pipe->output_stage, firmware); - else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) - remove_firmware(&pipe->vf_stage, firmware); - acc_unload_extension(firmware); + /* Load firmware for extension */ + static enum ia_css_err + ia_css_pipe_load_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_LEAVE_PRIVATE(""); -} + IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); -bool -ia_css_pipeline_uses_params(struct ia_css_pipeline *me) -{ - struct ia_css_pipeline_stage *stage; + if ((!firmware) || (!pipe)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - assert(me); + if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) + { + if (&pipe->output_stage) + append_firmware(&pipe->output_stage, firmware); + else { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + } else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) + { + if (&pipe->vf_stage) + append_firmware(&pipe->vf_stage, firmware); + else { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + } + err = acc_load_extension(firmware); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_uses_params() enter: me=%p\n", me); + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - for (stage = me->stages; stage; stage = stage->next) - if (stage->binary_info && stage->binary_info->enable.params) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_uses_params() leave: return_bool=true\n"); - return true; + /* Unload firmware for extension */ + static void + ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware) { + IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); + + if ((!firmware) || (!pipe)) { + IA_CSS_ERROR("NULL input parameters"); + IA_CSS_LEAVE_PRIVATE(""); + return; } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_uses_params() leave: return_bool=false\n"); - return false; -} -static enum ia_css_err -sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, - const void *acc_fw) -{ - struct ia_css_fw_info *fw = (struct ia_css_fw_info *)acc_fw; - /* In QoS case, load_extension already called, so skipping */ - enum ia_css_err err = IA_CSS_SUCCESS; + if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) + remove_firmware(&pipe->output_stage, firmware); + else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) + remove_firmware(&pipe->vf_stage, firmware); + acc_unload_extension(firmware); + + IA_CSS_LEAVE_PRIVATE(""); + } - if (fw->loaded == false) - err = acc_load_extension(fw); + bool + ia_css_pipeline_uses_params(struct ia_css_pipeline *me) { + struct ia_css_pipeline_stage *stage; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_pipeline_add_acc_stage() enter: pipeline=%p, acc_fw=%p\n", - pipeline, acc_fw); + assert(me); - if (err == IA_CSS_SUCCESS) { - struct ia_css_pipeline_stage_desc stage_desc; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() enter: me=%p\n", me); - ia_css_pipe_get_acc_stage_desc(&stage_desc, NULL, fw); - err = ia_css_pipeline_create_and_add_stage(pipeline, - &stage_desc, - NULL); + for (stage = me->stages; stage; stage = stage->next) + if (stage->binary_info && stage->binary_info->enable.params) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() leave: return_bool=true\n"); + return true; + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() leave: return_bool=false\n"); + return false; } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_pipeline_add_acc_stage() leave: return_err=%d\n", err); - return err; -} + static enum ia_css_err + sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, + const void *acc_fw) { + struct ia_css_fw_info *fw = (struct ia_css_fw_info *)acc_fw; + /* In QoS case, load_extension already called, so skipping */ + enum ia_css_err err = IA_CSS_SUCCESS; -/* - * @brief Tag a specific frame in continuous capture. - * Refer to "sh_css_internal.h" for details. - */ -enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, - unsigned int exp_id) -{ - struct sh_css_tag_descr tag_descr; - u32 encoded_tag_descr; - enum ia_css_err err; + if (fw->loaded == false) + err = acc_load_extension(fw); - assert(stream); - IA_CSS_ENTER("exp_id=%d", exp_id); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_pipeline_add_acc_stage() enter: pipeline=%p, acc_fw=%p\n", + pipeline, acc_fw); - /* Only continuous streams have a tagger */ - if (exp_id == 0 || !stream->config.continuous) { - IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + if (err == IA_CSS_SUCCESS) + { + struct ia_css_pipeline_stage_desc stage_desc; - if (!sh_css_sp_is_running()) { - /* SP is not running. The queues are not valid */ - IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); - return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + ia_css_pipe_get_acc_stage_desc(&stage_desc, NULL, fw); + err = ia_css_pipeline_create_and_add_stage(pipeline, + &stage_desc, + NULL); + } + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_pipeline_add_acc_stage() leave: return_err=%d\n", err); + return err; } - /* Create the tag descriptor from the parameters */ - sh_css_create_tag_descr(0, 0, 0, exp_id, &tag_descr); - /* Encode the tag descriptor into a 32-bit value */ - encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ - err = ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); + /* + * @brief Tag a specific frame in continuous capture. + * Refer to "sh_css_internal.h" for details. + */ + enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, + unsigned int exp_id) { + struct sh_css_tag_descr tag_descr; + u32 encoded_tag_descr; + enum ia_css_err err; - IA_CSS_LEAVE_ERR(err); - return err; -} + assert(stream); + IA_CSS_ENTER("exp_id=%d", exp_id); -/* - * @brief Configure the continuous capture. - * Refer to "sh_css_internal.h" for details. - */ -enum ia_css_err ia_css_stream_capture( - struct ia_css_stream *stream, - int num_captures, - unsigned int skip, - int offset) -{ - struct sh_css_tag_descr tag_descr; - unsigned int encoded_tag_descr; - enum ia_css_err return_err; + /* Only continuous streams have a tagger */ + if (exp_id == 0 || !stream->config.continuous) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if (!stream) - return IA_CSS_ERR_INVALID_ARGUMENTS; + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() enter: num_captures=%d, skip=%d, offset=%d\n", - num_captures, skip, offset); + /* Create the tag descriptor from the parameters */ + sh_css_create_tag_descr(0, 0, 0, exp_id, &tag_descr); + /* Encode the tag descriptor into a 32-bit value */ + encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); + /* Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue */ + err = ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); - /* Check if the tag descriptor is valid */ - if (num_captures < SH_CSS_MINIMUM_TAG_ID) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() leave: return_err=%d\n", - IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; } - /* Create the tag descriptor from the parameters */ - sh_css_create_tag_descr(num_captures, skip, offset, 0, &tag_descr); - - /* Encode the tag descriptor into a 32-bit value */ - encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); + /* + * @brief Configure the continuous capture. + * Refer to "sh_css_internal.h" for details. + */ + enum ia_css_err ia_css_stream_capture( + struct ia_css_stream *stream, + int num_captures, + unsigned int skip, + int offset) { + struct sh_css_tag_descr tag_descr; + unsigned int encoded_tag_descr; + enum ia_css_err return_err; + + if (!stream) + return IA_CSS_ERR_INVALID_ARGUMENTS; - if (!sh_css_sp_is_running()) { - /* SP is not running. The queues are not valid */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() leaving:queues unavailable\n"); - return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } + "ia_css_stream_capture() enter: num_captures=%d, skip=%d, offset=%d\n", + num_captures, skip, offset); + + /* Check if the tag descriptor is valid */ + if (num_captures < SH_CSS_MINIMUM_TAG_ID) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() leave: return_err=%d\n", + IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ - return_err = ia_css_bufq_enqueue_tag_cmd((uint32_t)encoded_tag_descr); + /* Create the tag descriptor from the parameters */ + sh_css_create_tag_descr(num_captures, skip, offset, 0, &tag_descr); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() leave: return_err=%d\n", - return_err); + /* Encode the tag descriptor into a 32-bit value */ + encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); - return return_err; -} + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() leaving:queues unavailable\n"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } -void ia_css_stream_request_flash(struct ia_css_stream *stream) -{ - (void)stream; + /* Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue */ + return_err = ia_css_bufq_enqueue_tag_cmd((uint32_t)encoded_tag_descr); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() leave: return_err=%d\n", + return_err); + + return return_err; + } - assert(stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_request_flash() enter: void\n"); + void ia_css_stream_request_flash(struct ia_css_stream *stream) { + (void)stream; + + assert(stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_request_flash() enter: void\n"); #ifndef ISP2401 - sh_css_write_host2sp_command(host2sp_cmd_start_flash); + sh_css_write_host2sp_command(host2sp_cmd_start_flash); #else - if (sh_css_sp_is_running()) { - if (!sh_css_write_host2sp_command(host2sp_cmd_start_flash)) { - IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); - ia_css_debug_dump_sp_sw_debug_info(); - ia_css_debug_dump_debug_info(NULL); - } - } else - IA_CSS_LOG("SP is not running!"); + if (sh_css_sp_is_running()) { + if (!sh_css_write_host2sp_command(host2sp_cmd_start_flash)) { + IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); + ia_css_debug_dump_sp_sw_debug_info(); + ia_css_debug_dump_debug_info(NULL); + } + } else + IA_CSS_LOG("SP is not running!"); #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_request_flash() leave: return_void\n"); -} + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_request_flash() leave: return_void\n"); + } -static void -sh_css_init_host_sp_control_vars(void) -{ - const struct ia_css_fw_info *fw; - unsigned int HIVE_ADDR_ia_css_ispctrl_sp_isp_started; + static void + sh_css_init_host_sp_control_vars(void) { + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_ia_css_ispctrl_sp_isp_started; - unsigned int HIVE_ADDR_host_sp_queues_initialized; - unsigned int HIVE_ADDR_sp_sleep_mode; - unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; + unsigned int HIVE_ADDR_host_sp_queues_initialized; + unsigned int HIVE_ADDR_sp_sleep_mode; + unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; #ifndef ISP2401 - unsigned int HIVE_ADDR_sp_stop_copy_preview; + unsigned int HIVE_ADDR_sp_stop_copy_preview; #endif - unsigned int HIVE_ADDR_host_sp_com; - unsigned int o = offsetof(struct host_sp_communication, host2sp_command) - / sizeof(int); + unsigned int HIVE_ADDR_host_sp_com; + unsigned int o = offsetof(struct host_sp_communication, host2sp_command) + / sizeof(int); #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) - unsigned int i; + unsigned int i; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_init_host_sp_control_vars() enter: void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_init_host_sp_control_vars() enter: void\n"); - fw = &sh_css_sp_fw; - HIVE_ADDR_ia_css_ispctrl_sp_isp_started = fw->info.sp.isp_started; + fw = &sh_css_sp_fw; + HIVE_ADDR_ia_css_ispctrl_sp_isp_started = fw->info.sp.isp_started; - HIVE_ADDR_host_sp_queues_initialized = - fw->info.sp.host_sp_queues_initialized; - HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; - HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; + HIVE_ADDR_host_sp_queues_initialized = + fw->info.sp.host_sp_queues_initialized; + HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; + HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; #ifndef ISP2401 - HIVE_ADDR_sp_stop_copy_preview = fw->info.sp.stop_copy_preview; + HIVE_ADDR_sp_stop_copy_preview = fw->info.sp.stop_copy_preview; #endif - HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; + HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; - (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ + (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ - (void)HIVE_ADDR_sp_sleep_mode; - (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; + (void)HIVE_ADDR_sp_sleep_mode; + (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; #ifndef ISP2401 - (void)HIVE_ADDR_sp_stop_copy_preview; -#endif - (void)HIVE_ADDR_host_sp_com; - - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(ia_css_ispctrl_sp_isp_started), - (uint32_t)(0)); - - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(host_sp_queues_initialized), - (uint32_t)(0)); - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(sp_sleep_mode), - (uint32_t)(0)); - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), - (uint32_t)(false)); + (void)HIVE_ADDR_sp_stop_copy_preview; +#endif + (void)HIVE_ADDR_host_sp_com; + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_ispctrl_sp_isp_started), + (uint32_t)(0)); + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(host_sp_queues_initialized), + (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_sleep_mode), + (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), + (uint32_t)(false)); #ifndef ISP2401 - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(sp_stop_copy_preview), - my_css.stop_copy_preview ? (uint32_t)(1) : (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_stop_copy_preview), + my_css.stop_copy_preview ? (uint32_t)(1) : (uint32_t)(0)); #endif - store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); + store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); #if !defined(HAS_NO_INPUT_SYSTEM) - for (i = 0; i < N_CSI_PORTS; i++) { - sh_css_update_host2sp_num_mipi_frames + for (i = 0; i < N_CSI_PORTS; i++) { + sh_css_update_host2sp_num_mipi_frames (my_css.num_mipi_frames[i]); - } + } #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_init_host_sp_control_vars() leave: return_void\n"); -} - -/* - * create the internal structures and fill in the configuration data - */ -void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_config_defaults()\n"); - *pipe_config = DEFAULT_PIPE_CONFIG; -} - -void -ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config *extra_config) -{ - if (!extra_config) { - IA_CSS_ERROR("NULL input parameter"); - return; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_init_host_sp_control_vars() leave: return_void\n"); } - extra_config->enable_raw_binning = false; - extra_config->enable_yuv_ds = false; - extra_config->enable_high_speed = false; - extra_config->enable_dvs_6axis = false; - extra_config->enable_reduced_pipe = false; - extra_config->disable_vf_pp = false; - extra_config->enable_fractional_ds = false; -} - -void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_config_defaults()\n"); - assert(stream_config); - memset(stream_config, 0, sizeof(*stream_config)); - stream_config->online = true; - stream_config->left_padding = -1; - stream_config->pixels_per_clock = 1; - /* temporary default value for backwards compatibility. - * This field used to be hardcoded within CSS but this has now - * been moved to the stream_config struct. */ - stream_config->source.port.rxcount = 0x04040404; -} - -static enum ia_css_err -ia_css_acc_pipe_create(struct ia_css_pipe *pipe) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + /* + * create the internal structures and fill in the configuration data + */ + void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_config_defaults()\n"); + *pipe_config = DEFAULT_PIPE_CONFIG; + } + + void + ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config + *extra_config) { + if (!extra_config) { + IA_CSS_ERROR("NULL input parameter"); + return; + } + + extra_config->enable_raw_binning = false; + extra_config->enable_yuv_ds = false; + extra_config->enable_high_speed = false; + extra_config->enable_dvs_6axis = false; + extra_config->enable_reduced_pipe = false; + extra_config->disable_vf_pp = false; + extra_config->enable_fractional_ds = false; + } + + void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_config_defaults()\n"); + assert(stream_config); + memset(stream_config, 0, sizeof(*stream_config)); + stream_config->online = true; + stream_config->left_padding = -1; + stream_config->pixels_per_clock = 1; + /* temporary default value for backwards compatibility. + * This field used to be hardcoded within CSS but this has now + * been moved to the stream_config struct. */ + stream_config->source.port.rxcount = 0x04040404; + } + + static enum ia_css_err + ia_css_acc_pipe_create(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + + if (!pipe) + { + IA_CSS_ERROR("NULL input parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if (!pipe) { - IA_CSS_ERROR("NULL input parameter"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + /* There is not meaning for num_execs = 0 semantically. Run atleast once. */ + if (pipe->config.acc_num_execs == 0) + pipe->config.acc_num_execs = 1; - /* There is not meaning for num_execs = 0 semantically. Run atleast once. */ - if (pipe->config.acc_num_execs == 0) - pipe->config.acc_num_execs = 1; + if (pipe->config.acc_extension) + { + err = ia_css_pipe_load_extension(pipe, pipe->config.acc_extension); + } - if (pipe->config.acc_extension) { - err = ia_css_pipe_load_extension(pipe, pipe->config.acc_extension); + return err; } - return err; -} - -enum ia_css_err -ia_css_pipe_create(const struct ia_css_pipe_config *config, - struct ia_css_pipe **pipe) -{ + enum ia_css_err + ia_css_pipe_create(const struct ia_css_pipe_config *config, + struct ia_css_pipe **pipe) { #ifndef ISP2401 - if (!config) + if (!config) #else - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER_PRIVATE("config = %p, pipe = %p", config, pipe); + IA_CSS_ENTER_PRIVATE("config = %p, pipe = %p", config, pipe); - if (!config) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + if (!config) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); #endif - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; #ifndef ISP2401 - if (!pipe) + if (!pipe) #else } - if (!pipe) { + if (!pipe) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); #endif - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; #ifndef ISP2401 - return ia_css_pipe_create_extra(config, NULL, pipe); + return ia_css_pipe_create_extra(config, NULL, pipe); #else } err = ia_css_pipe_create_extra(config, NULL, pipe); - if (err == IA_CSS_SUCCESS) { + if (err == IA_CSS_SUCCESS) + { IA_CSS_LOG("pipe created successfully = %p", *pipe); } @@ -8912,1390 +9156,1434 @@ ia_css_pipe_create(const struct ia_css_pipe_config *config, return err; #endif -} - -enum ia_css_err -ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, - const struct ia_css_pipe_extra_config *extra_config, - struct ia_css_pipe **pipe) -{ - enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; - struct ia_css_pipe *internal_pipe = NULL; - unsigned int i; - - IA_CSS_ENTER_PRIVATE("config = %p, extra_config = %p and pipe = %p", config, extra_config, pipe); - - /* do not allow to create more than the maximum limit */ - if (my_css.pipe_counter >= IA_CSS_PIPELINE_NUM_MAX) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_EXHAUSTED); - return IA_CSS_ERR_INVALID_ARGUMENTS; } - if ((!pipe) || (!config)) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + enum ia_css_err + ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, + const struct ia_css_pipe_extra_config *extra_config, + struct ia_css_pipe **pipe) { + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + struct ia_css_pipe *internal_pipe = NULL; + unsigned int i; - ia_css_debug_dump_pipe_config(config); - ia_css_debug_dump_pipe_extra_config(extra_config); + IA_CSS_ENTER_PRIVATE("config = %p, extra_config = %p and pipe = %p", config, extra_config, pipe); - err = create_pipe(config->mode, &internal_pipe, false); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + /* do not allow to create more than the maximum limit */ + if (my_css.pipe_counter >= IA_CSS_PIPELINE_NUM_MAX) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_EXHAUSTED); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - /* now we have a pipe structure to fill */ - internal_pipe->config = *config; - if (extra_config) - internal_pipe->extra_config = *extra_config; - else - ia_css_pipe_extra_config_defaults(&internal_pipe->extra_config); + if ((!pipe) || (!config)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if (config->mode == IA_CSS_PIPE_MODE_ACC) { - /* Temporary hack to migrate acceleration to CSS 2.0. - * In the future the code for all pipe types should be - * unified. */ - *pipe = internal_pipe; - if (!internal_pipe->config.acc_extension && - internal_pipe->config.num_acc_stages == 0){ /* if no acc binary and no standalone stage */ - *pipe = NULL; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; + ia_css_debug_dump_pipe_config(config); + ia_css_debug_dump_pipe_extra_config(extra_config); + + err = create_pipe(config->mode, &internal_pipe, false); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } - return ia_css_acc_pipe_create(internal_pipe); - } - /* Use config value when dvs_frame_delay setting equal to 2, otherwise always 1 by default */ - if (internal_pipe->config.dvs_frame_delay == IA_CSS_FRAME_DELAY_2) - internal_pipe->dvs_frame_delay = 2; - else - internal_pipe->dvs_frame_delay = 1; + /* now we have a pipe structure to fill */ + internal_pipe->config = *config; + if (extra_config) + internal_pipe->extra_config = *extra_config; + else + ia_css_pipe_extra_config_defaults(&internal_pipe->extra_config); - /* we still keep enable_raw_binning for backward compatibility, for any new - fractional bayer downscaling, we should use bayer_ds_out_res. if both are - specified, bayer_ds_out_res will take precedence.if none is specified, we - set bayer_ds_out_res equal to IF output resolution(IF may do cropping on - sensor output) or use default decimation factor 1. */ - if (internal_pipe->extra_config.enable_raw_binning && - internal_pipe->config.bayer_ds_out_res.width) { - /* fill some code here, if no code is needed, please remove it during integration */ - } + if (config->mode == IA_CSS_PIPE_MODE_ACC) + { + /* Temporary hack to migrate acceleration to CSS 2.0. + * In the future the code for all pipe types should be + * unified. */ + *pipe = internal_pipe; + if (!internal_pipe->config.acc_extension && + internal_pipe->config.num_acc_stages == + 0) { /* if no acc binary and no standalone stage */ + *pipe = NULL; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } + return ia_css_acc_pipe_create(internal_pipe); + } - /* YUV downscaling */ - if ((internal_pipe->config.vf_pp_in_res.width || - internal_pipe->config.capt_pp_in_res.width)) { - enum ia_css_frame_format format; + /* Use config value when dvs_frame_delay setting equal to 2, otherwise always 1 by default */ + if (internal_pipe->config.dvs_frame_delay == IA_CSS_FRAME_DELAY_2) + internal_pipe->dvs_frame_delay = 2; + else + internal_pipe->dvs_frame_delay = 1; + + /* we still keep enable_raw_binning for backward compatibility, for any new + fractional bayer downscaling, we should use bayer_ds_out_res. if both are + specified, bayer_ds_out_res will take precedence.if none is specified, we + set bayer_ds_out_res equal to IF output resolution(IF may do cropping on + sensor output) or use default decimation factor 1. */ + if (internal_pipe->extra_config.enable_raw_binning && + internal_pipe->config.bayer_ds_out_res.width) + { + /* fill some code here, if no code is needed, please remove it during integration */ + } - if (internal_pipe->config.vf_pp_in_res.width) { - format = IA_CSS_FRAME_FORMAT_YUV_LINE; - ia_css_frame_info_init( - &internal_pipe->vf_yuv_ds_input_info, - internal_pipe->config.vf_pp_in_res.width, - internal_pipe->config.vf_pp_in_res.height, - format, 0); + /* YUV downscaling */ + if ((internal_pipe->config.vf_pp_in_res.width || + internal_pipe->config.capt_pp_in_res.width)) + { + enum ia_css_frame_format format; + + if (internal_pipe->config.vf_pp_in_res.width) { + format = IA_CSS_FRAME_FORMAT_YUV_LINE; + ia_css_frame_info_init( + &internal_pipe->vf_yuv_ds_input_info, + internal_pipe->config.vf_pp_in_res.width, + internal_pipe->config.vf_pp_in_res.height, + format, 0); + } + if (internal_pipe->config.capt_pp_in_res.width) { + format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init( + &internal_pipe->out_yuv_ds_input_info, + internal_pipe->config.capt_pp_in_res.width, + internal_pipe->config.capt_pp_in_res.height, + format, 0); + } } - if (internal_pipe->config.capt_pp_in_res.width) { - format = IA_CSS_FRAME_FORMAT_YUV420; + if (internal_pipe->config.vf_pp_in_res.width && + internal_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + { ia_css_frame_info_init( - &internal_pipe->out_yuv_ds_input_info, - internal_pipe->config.capt_pp_in_res.width, - internal_pipe->config.capt_pp_in_res.height, - format, 0); + &internal_pipe->vf_yuv_ds_input_info, + internal_pipe->config.vf_pp_in_res.width, + internal_pipe->config.vf_pp_in_res.height, + IA_CSS_FRAME_FORMAT_YUV_LINE, 0); } - } - if (internal_pipe->config.vf_pp_in_res.width && - internal_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) { - ia_css_frame_info_init( - &internal_pipe->vf_yuv_ds_input_info, - internal_pipe->config.vf_pp_in_res.width, - internal_pipe->config.vf_pp_in_res.height, - IA_CSS_FRAME_FORMAT_YUV_LINE, 0); - } - /* handle bayer downscaling output info */ - if (internal_pipe->config.bayer_ds_out_res.width) { + /* handle bayer downscaling output info */ + if (internal_pipe->config.bayer_ds_out_res.width) + { ia_css_frame_info_init( - &internal_pipe->bds_output_info, - internal_pipe->config.bayer_ds_out_res.width, - internal_pipe->config.bayer_ds_out_res.height, - IA_CSS_FRAME_FORMAT_RAW, 0); - } - - /* handle output info, assume always needed */ - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if (internal_pipe->config.output_info[i].res.width) { - err = sh_css_pipe_configure_output( - internal_pipe, - internal_pipe->config.output_info[i].res.width, - internal_pipe->config.output_info[i].res.height, - internal_pipe->config.output_info[i].padded_width, - internal_pipe->config.output_info[i].format, - i); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - sh_css_free(internal_pipe); - internal_pipe = NULL; - return err; - } + &internal_pipe->bds_output_info, + internal_pipe->config.bayer_ds_out_res.width, + internal_pipe->config.bayer_ds_out_res.height, + IA_CSS_FRAME_FORMAT_RAW, 0); } - /* handle vf output info, when configured */ - internal_pipe->enable_viewfinder[i] = (internal_pipe->config.vf_output_info[i].res.width != 0); - if (internal_pipe->config.vf_output_info[i].res.width) { - err = sh_css_pipe_configure_viewfinder( - internal_pipe, - internal_pipe->config.vf_output_info[i].res.width, - internal_pipe->config.vf_output_info[i].res.height, - internal_pipe->config.vf_output_info[i].padded_width, - internal_pipe->config.vf_output_info[i].format, - i); + /* handle output info, assume always needed */ + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) + { + if (internal_pipe->config.output_info[i].res.width) { + err = sh_css_pipe_configure_output( + internal_pipe, + internal_pipe->config.output_info[i].res.width, + internal_pipe->config.output_info[i].res.height, + internal_pipe->config.output_info[i].padded_width, + internal_pipe->config.output_info[i].format, + i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + sh_css_free(internal_pipe); + internal_pipe = NULL; + return err; + } + } + + /* handle vf output info, when configured */ + internal_pipe->enable_viewfinder[i] = + (internal_pipe->config.vf_output_info[i].res.width != 0); + if (internal_pipe->config.vf_output_info[i].res.width) { + err = sh_css_pipe_configure_viewfinder( + internal_pipe, + internal_pipe->config.vf_output_info[i].res.width, + internal_pipe->config.vf_output_info[i].res.height, + internal_pipe->config.vf_output_info[i].padded_width, + internal_pipe->config.vf_output_info[i].format, + i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + sh_css_free(internal_pipe); + internal_pipe = NULL; + return err; + } + } + } + if (internal_pipe->config.acc_extension) + { + err = ia_css_pipe_load_extension(internal_pipe, + internal_pipe->config.acc_extension); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); sh_css_free(internal_pipe); - internal_pipe = NULL; return err; } } - } - if (internal_pipe->config.acc_extension) { - err = ia_css_pipe_load_extension(internal_pipe, - internal_pipe->config.acc_extension); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - sh_css_free(internal_pipe); - return err; - } - } - /* set all info to zeroes first */ - memset(&internal_pipe->info, 0, sizeof(internal_pipe->info)); + /* set all info to zeroes first */ + memset(&internal_pipe->info, 0, sizeof(internal_pipe->info)); - /* all went well, return the pipe */ - *pipe = internal_pipe; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; -} - -enum ia_css_err -ia_css_pipe_get_info(const struct ia_css_pipe *pipe, - struct ia_css_pipe_info *pipe_info) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipe_get_info()\n"); - assert(pipe_info); - if (!pipe_info) { - ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "ia_css_pipe_get_info: pipe_info cannot be NULL\n"); - return IA_CSS_ERR_INVALID_ARGUMENTS; + /* all went well, return the pipe */ + *pipe = internal_pipe; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; } - if (!pipe || !pipe->stream) { - ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "ia_css_pipe_get_info: ia_css_stream_create needs to be called before ia_css_[stream/pipe]_get_info\n"); - return IA_CSS_ERR_INVALID_ARGUMENTS; + + enum ia_css_err + ia_css_pipe_get_info(const struct ia_css_pipe *pipe, + struct ia_css_pipe_info *pipe_info) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipe_get_info()\n"); + assert(pipe_info); + if (!pipe_info) + { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_pipe_get_info: pipe_info cannot be NULL\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + if (!pipe || !pipe->stream) + { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_pipe_get_info: ia_css_stream_create needs to be called before ia_css_[stream/pipe]_get_info\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* we succeeded return the info */ + *pipe_info = pipe->info; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_get_info() leave\n"); + return IA_CSS_SUCCESS; } - /* we succeeded return the info */ - *pipe_info = pipe->info; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_get_info() leave\n"); - return IA_CSS_SUCCESS; -} -bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info) -{ - unsigned int i; + bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info) { + unsigned int i; - if (pipe_info) { - for (i = 0; i < IA_CSS_DVS_STAT_NUM_OF_LEVELS; i++) { - if (pipe_info->grid_info.dvs_grid.dvs_stat_grid_info.grd_cfg[i].grd_start.enable) - return true; + if (pipe_info) { + for (i = 0; i < IA_CSS_DVS_STAT_NUM_OF_LEVELS; i++) { + if (pipe_info->grid_info.dvs_grid.dvs_stat_grid_info.grd_cfg[i].grd_start.enable) + return true; + } } - } - return false; -} + return false; + } #ifdef ISP2401 -enum ia_css_err -ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, - int pin_index, - enum ia_css_frame_format new_format) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err + ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, + int pin_index, + enum ia_css_frame_format new_format) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER_PRIVATE("pipe = %p, pin_index = %d, new_formats = %d", pipe, pin_index, new_format); + IA_CSS_ENTER_PRIVATE("pipe = %p, pin_index = %d, new_formats = %d", pipe, pin_index, new_format); - if (!pipe) { - IA_CSS_ERROR("pipe is not set"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (0 != pin_index && 1 != pin_index) { - IA_CSS_ERROR("pin index is not valid"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (new_format != IA_CSS_FRAME_FORMAT_NV12_TILEY) { - IA_CSS_ERROR("new format is not valid"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } else { - err = ia_css_pipe_check_format(pipe, new_format); - if (err == IA_CSS_SUCCESS) { - if (pin_index == 0) { - pipe->output_info[0].format = new_format; - } else { - pipe->vf_output_info[0].format = new_format; + if (!pipe) + { + IA_CSS_ERROR("pipe is not set"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (0 != pin_index && 1 != pin_index) + { + IA_CSS_ERROR("pin index is not valid"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (new_format != IA_CSS_FRAME_FORMAT_NV12_TILEY) + { + IA_CSS_ERROR("new format is not valid"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } else + { + err = ia_css_pipe_check_format(pipe, new_format); + if (err == IA_CSS_SUCCESS) { + if (pin_index == 0) { + pipe->output_info[0].format = new_format; + } else { + pipe->vf_output_info[0].format = new_format; + } } } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} #endif #if defined(USE_INPUT_SYSTEM_VERSION_2) -/* Configuration of INPUT_SYSTEM_VERSION_2401 is done on SP */ -static enum ia_css_err -ia_css_stream_configure_rx(struct ia_css_stream *stream) -{ - struct ia_css_input_port *config; - - assert(stream); - - config = &stream->config.source.port; -/* AM: this code is not reliable, especially for 2400 */ - if (config->num_lanes == 1) - stream->csi_rx_config.mode = MONO_1L_1L_0L; - else if (config->num_lanes == 2) - stream->csi_rx_config.mode = MONO_2L_1L_0L; - else if (config->num_lanes == 3) - stream->csi_rx_config.mode = MONO_3L_1L_0L; - else if (config->num_lanes == 4) - stream->csi_rx_config.mode = MONO_4L_1L_0L; - else if (config->num_lanes != 0) - return IA_CSS_ERR_INVALID_ARGUMENTS; + /* Configuration of INPUT_SYSTEM_VERSION_2401 is done on SP */ + static enum ia_css_err + ia_css_stream_configure_rx(struct ia_css_stream *stream) { + struct ia_css_input_port *config; + + assert(stream); + + config = &stream->config.source.port; + /* AM: this code is not reliable, especially for 2400 */ + if (config->num_lanes == 1) + stream->csi_rx_config.mode = MONO_1L_1L_0L; + else if (config->num_lanes == 2) + stream->csi_rx_config.mode = MONO_2L_1L_0L; + else if (config->num_lanes == 3) + stream->csi_rx_config.mode = MONO_3L_1L_0L; + else if (config->num_lanes == 4) + stream->csi_rx_config.mode = MONO_4L_1L_0L; + else if (config->num_lanes != 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; - if (config->port > MIPI_PORT2_ID) - return IA_CSS_ERR_INVALID_ARGUMENTS; - stream->csi_rx_config.port = + if (config->port > MIPI_PORT2_ID) + return IA_CSS_ERR_INVALID_ARGUMENTS; + stream->csi_rx_config.port = ia_css_isys_port_to_mipi_port(config->port); - stream->csi_rx_config.timeout = config->timeout; - stream->csi_rx_config.initcount = 0; - stream->csi_rx_config.synccount = 0x28282828; - stream->csi_rx_config.rxcount = config->rxcount; - if (config->compression.type == IA_CSS_CSI2_COMPRESSION_TYPE_NONE) - stream->csi_rx_config.comp = MIPI_PREDICTOR_NONE; - else { - /* not implemented yet, requires extension of the rx_cfg_t - * struct */ - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - stream->csi_rx_config.is_two_ppc = (stream->config.pixels_per_clock == 2); - stream->reconfigure_css_rx = true; - return IA_CSS_SUCCESS; -} -#endif - -static struct ia_css_pipe * -find_pipe(struct ia_css_pipe *pipes[], - unsigned int num_pipes, - enum ia_css_pipe_mode mode, - bool copy_pipe) -{ - unsigned int i; - - assert(pipes); - for (i = 0; i < num_pipes; i++) { - assert(pipes[i]); - if (pipes[i]->config.mode != mode) - continue; - if (copy_pipe && pipes[i]->mode != IA_CSS_PIPE_ID_COPY) - continue; - return pipes[i]; + stream->csi_rx_config.timeout = config->timeout; + stream->csi_rx_config.initcount = 0; + stream->csi_rx_config.synccount = 0x28282828; + stream->csi_rx_config.rxcount = config->rxcount; + if (config->compression.type == IA_CSS_CSI2_COMPRESSION_TYPE_NONE) + stream->csi_rx_config.comp = MIPI_PREDICTOR_NONE; + else + { + /* not implemented yet, requires extension of the rx_cfg_t + * struct */ + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + stream->csi_rx_config.is_two_ppc = (stream->config.pixels_per_clock == 2); + stream->reconfigure_css_rx = true; + return IA_CSS_SUCCESS; } - return NULL; -} - -static enum ia_css_err -ia_css_acc_stream_create(struct ia_css_stream *stream) -{ - int i; - enum ia_css_err err = IA_CSS_SUCCESS; +#endif - assert(stream); - IA_CSS_ENTER_PRIVATE("stream = %p", stream); + static struct ia_css_pipe * + find_pipe(struct ia_css_pipe *pipes[], + unsigned int num_pipes, + enum ia_css_pipe_mode mode, + bool copy_pipe) { + unsigned int i; - if (!stream) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; + assert(pipes); + for (i = 0; i < num_pipes; i++) { + assert(pipes[i]); + if (pipes[i]->config.mode != mode) + continue; + if (copy_pipe && pipes[i]->mode != IA_CSS_PIPE_ID_COPY) + continue; + return pipes[i]; + } + return NULL; } - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *pipe = stream->pipes[i]; + static enum ia_css_err + ia_css_acc_stream_create(struct ia_css_stream *stream) { + int i; + enum ia_css_err err = IA_CSS_SUCCESS; + + assert(stream); + IA_CSS_ENTER_PRIVATE("stream = %p", stream); - assert(pipe); - if (!pipe) { + if (!stream) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - pipe->stream = stream; - } + for (i = 0; i < stream->num_pipes; i++) + { + struct ia_css_pipe *pipe = stream->pipes[i]; - /* Map SP threads before doing anything. */ - err = map_sp_threads(stream, true); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + assert(pipe); + if (!pipe) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + pipe->stream = stream; + } - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *pipe = stream->pipes[i]; + /* Map SP threads before doing anything. */ + err = map_sp_threads(stream, true); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - assert(pipe); - ia_css_pipe_map_queue(pipe, true); - } + for (i = 0; i < stream->num_pipes; i++) + { + struct ia_css_pipe *pipe = stream->pipes[i]; - err = create_host_pipeline_structure(stream); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + assert(pipe); + ia_css_pipe_map_queue(pipe, true); + } + + err = create_host_pipeline_structure(stream); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - stream->started = false; + stream->started = false; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; -} + return IA_CSS_SUCCESS; + } -static enum ia_css_err -metadata_info_init(const struct ia_css_metadata_config *mdc, - struct ia_css_metadata_info *md) -{ - /* Either both width and height should be set or neither */ - if ((mdc->resolution.height > 0) ^ (mdc->resolution.width > 0)) - return IA_CSS_ERR_INVALID_ARGUMENTS; + static enum ia_css_err + metadata_info_init(const struct ia_css_metadata_config *mdc, + struct ia_css_metadata_info *md) { + /* Either both width and height should be set or neither */ + if ((mdc->resolution.height > 0) ^ (mdc->resolution.width > 0)) + return IA_CSS_ERR_INVALID_ARGUMENTS; - md->resolution = mdc->resolution; - /* We round up the stride to a multiple of the width - * of the port going to DDR, this is a HW requirements (DMA). */ - md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); - md->size = mdc->resolution.height * md->stride; - return IA_CSS_SUCCESS; -} + md->resolution = mdc->resolution; + /* We round up the stride to a multiple of the width + * of the port going to DDR, this is a HW requirements (DMA). */ + md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); + md->size = mdc->resolution.height * md->stride; + return IA_CSS_SUCCESS; + } #ifdef ISP2401 -static enum ia_css_err check_pipe_resolutions(const struct ia_css_pipe *pipe) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + static enum ia_css_err check_pipe_resolutions(const struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER_PRIVATE(""); + IA_CSS_ENTER_PRIVATE(""); - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("null arguments"); - err = IA_CSS_ERR_INTERNAL_ERROR; - goto EXIT; - } + if (!pipe || !pipe->stream) { + IA_CSS_ERROR("null arguments"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto EXIT; + } - if (ia_css_util_check_res(pipe->config.input_effective_res.width, - pipe->config.input_effective_res.height) != IA_CSS_SUCCESS) { - IA_CSS_ERROR("effective resolution not supported"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - goto EXIT; - } - if (!ia_css_util_resolution_is_zero(pipe->stream->config.input_config.input_res)) { - if (!ia_css_util_res_leq(pipe->config.input_effective_res, - pipe->stream->config.input_config.input_res)) { - IA_CSS_ERROR("effective resolution is larger than input resolution"); + if (ia_css_util_check_res(pipe->config.input_effective_res.width, + pipe->config.input_effective_res.height) != IA_CSS_SUCCESS) { + IA_CSS_ERROR("effective resolution not supported"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + if (!ia_css_util_resolution_is_zero( + pipe->stream->config.input_config.input_res)) { + if (!ia_css_util_res_leq(pipe->config.input_effective_res, + pipe->stream->config.input_config.input_res)) { + IA_CSS_ERROR("effective resolution is larger than input resolution"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + } + if (!ia_css_util_resolution_is_even(pipe->config.output_info[0].res)) { + IA_CSS_ERROR("output resolution must be even"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + if (!ia_css_util_resolution_is_even(pipe->config.vf_output_info[0].res)) { + IA_CSS_ERROR("VF resolution must be even"); err = IA_CSS_ERR_INVALID_ARGUMENTS; goto EXIT; } - } - if (!ia_css_util_resolution_is_even(pipe->config.output_info[0].res)) { - IA_CSS_ERROR("output resolution must be even"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - goto EXIT; - } - if (!ia_css_util_resolution_is_even(pipe->config.vf_output_info[0].res)) { - IA_CSS_ERROR("VF resolution must be even"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - goto EXIT; - } EXIT: - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; -} + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } #endif -enum ia_css_err -ia_css_stream_create(const struct ia_css_stream_config *stream_config, - int num_pipes, - struct ia_css_pipe *pipes[], - struct ia_css_stream **stream) -{ - struct ia_css_pipe *curr_pipe; - struct ia_css_stream *curr_stream = NULL; - bool spcopyonly; - bool sensor_binning_changed; - int i, j; - enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; - struct ia_css_metadata_info md_info; + enum ia_css_err + ia_css_stream_create(const struct ia_css_stream_config *stream_config, + int num_pipes, + struct ia_css_pipe *pipes[], + struct ia_css_stream **stream) { + struct ia_css_pipe *curr_pipe; + struct ia_css_stream *curr_stream = NULL; + bool spcopyonly; + bool sensor_binning_changed; + int i, j; + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + struct ia_css_metadata_info md_info; #ifndef ISP2401 - struct ia_css_resolution effective_res; + struct ia_css_resolution effective_res; #else #ifdef USE_INPUT_SYSTEM_VERSION_2401 - bool aspect_ratio_crop_enabled = false; + bool aspect_ratio_crop_enabled = false; #endif #endif - IA_CSS_ENTER("num_pipes=%d", num_pipes); - ia_css_debug_dump_stream_config(stream_config, num_pipes); + IA_CSS_ENTER("num_pipes=%d", num_pipes); + ia_css_debug_dump_stream_config(stream_config, num_pipes); - /* some checks */ - if (num_pipes == 0 || - !stream || - !pipes) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + /* some checks */ + if (num_pipes == 0 || + !stream || + !pipes) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } #if defined(USE_INPUT_SYSTEM_VERSION_2) - /* We don't support metadata for JPEG stream, since they both use str2mem */ - if (stream_config->input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8 && - stream_config->metadata_config.resolution.height > 0) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + /* We don't support metadata for JPEG stream, since they both use str2mem */ + if (stream_config->input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8 && + stream_config->metadata_config.resolution.height > 0) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } #endif #ifdef USE_INPUT_SYSTEM_VERSION_2401 - if (stream_config->online && stream_config->pack_raw_pixels) { - IA_CSS_LOG("online and pack raw is invalid on input system 2401"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + if (stream_config->online && stream_config->pack_raw_pixels) + { + IA_CSS_LOG("online and pack raw is invalid on input system 2401"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } #endif #if !defined(HAS_NO_INPUT_SYSTEM) - ia_css_debug_pipe_graph_dump_stream_config(stream_config); + ia_css_debug_pipe_graph_dump_stream_config(stream_config); - /* check if mipi size specified */ - if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + /* check if mipi size specified */ + if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) #ifdef USE_INPUT_SYSTEM_VERSION_2401 - if (!stream_config->online) + if (!stream_config->online) #endif - { - unsigned int port = (unsigned int)stream_config->source.port.port; + { + unsigned int port = (unsigned int)stream_config->source.port.port; - if (port >= N_MIPI_PORT_ID) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; + if (port >= N_MIPI_PORT_ID) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } + + if (my_css.size_mem_words != 0) { + my_css.mipi_frame_size[port] = my_css.size_mem_words; + } else if (stream_config->mipi_buffer_config.size_mem_words != 0) { + my_css.mipi_frame_size[port] = stream_config->mipi_buffer_config.size_mem_words; + } else { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_create() exit: error, need to set mipi frame size.\n"); + assert(stream_config->mipi_buffer_config.size_mem_words != 0); + err = IA_CSS_ERR_INTERNAL_ERROR; + IA_CSS_LEAVE_ERR(err); + return err; + } + + if (my_css.size_mem_words != 0) { + my_css.num_mipi_frames[port] = + 2; /* Temp change: Default for backwards compatibility. */ + } else if (stream_config->mipi_buffer_config.nof_mipi_buffers != 0) { + my_css.num_mipi_frames[port] = + stream_config->mipi_buffer_config.nof_mipi_buffers; + } else { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_create() exit: error, need to set number of mipi frames.\n"); + assert(stream_config->mipi_buffer_config.nof_mipi_buffers != 0); + err = IA_CSS_ERR_INTERNAL_ERROR; + IA_CSS_LEAVE_ERR(err); + return err; + } + } +#endif + + /* Currently we only supported metadata up to a certain size. */ + err = metadata_info_init(&stream_config->metadata_config, &md_info); + if (err != IA_CSS_SUCCESS) + { IA_CSS_LEAVE_ERR(err); return err; } - if (my_css.size_mem_words != 0) { - my_css.mipi_frame_size[port] = my_css.size_mem_words; - } else if (stream_config->mipi_buffer_config.size_mem_words != 0) { - my_css.mipi_frame_size[port] = stream_config->mipi_buffer_config.size_mem_words; - } else { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_create() exit: error, need to set mipi frame size.\n"); - assert(stream_config->mipi_buffer_config.size_mem_words != 0); - err = IA_CSS_ERR_INTERNAL_ERROR; + /* allocate the stream instance */ + curr_stream = kmalloc(sizeof(struct ia_css_stream), GFP_KERNEL); + if (!curr_stream) + { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; IA_CSS_LEAVE_ERR(err); return err; } + /* default all to 0 */ + memset(curr_stream, 0, sizeof(struct ia_css_stream)); + curr_stream->info.metadata_info = md_info; - if (my_css.size_mem_words != 0) { - my_css.num_mipi_frames[port] = 2; /* Temp change: Default for backwards compatibility. */ - } else if (stream_config->mipi_buffer_config.nof_mipi_buffers != 0) { - my_css.num_mipi_frames[port] = stream_config->mipi_buffer_config.nof_mipi_buffers; - } else { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_create() exit: error, need to set number of mipi frames.\n"); - assert(stream_config->mipi_buffer_config.nof_mipi_buffers != 0); - err = IA_CSS_ERR_INTERNAL_ERROR; + /* allocate pipes */ + curr_stream->num_pipes = num_pipes; + curr_stream->pipes = kcalloc(num_pipes, sizeof(struct ia_css_pipe *), GFP_KERNEL); + if (!curr_stream->pipes) + { + curr_stream->num_pipes = 0; + kfree(curr_stream); + curr_stream = NULL; + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; IA_CSS_LEAVE_ERR(err); return err; } - } -#endif - - /* Currently we only supported metadata up to a certain size. */ - err = metadata_info_init(&stream_config->metadata_config, &md_info); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR(err); - return err; - } - - /* allocate the stream instance */ - curr_stream = kmalloc(sizeof(struct ia_css_stream), GFP_KERNEL); - if (!curr_stream) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - IA_CSS_LEAVE_ERR(err); - return err; - } - /* default all to 0 */ - memset(curr_stream, 0, sizeof(struct ia_css_stream)); - curr_stream->info.metadata_info = md_info; - - /* allocate pipes */ - curr_stream->num_pipes = num_pipes; - curr_stream->pipes = kcalloc(num_pipes, sizeof(struct ia_css_pipe *), GFP_KERNEL); - if (!curr_stream->pipes) { - curr_stream->num_pipes = 0; - kfree(curr_stream); - curr_stream = NULL; - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - IA_CSS_LEAVE_ERR(err); - return err; - } - /* store pipes */ - spcopyonly = (num_pipes == 1) && (pipes[0]->config.mode == IA_CSS_PIPE_MODE_COPY); - for (i = 0; i < num_pipes; i++) - curr_stream->pipes[i] = pipes[i]; - curr_stream->last_pipe = curr_stream->pipes[0]; - /* take over stream config */ - curr_stream->config = *stream_config; + /* store pipes */ + spcopyonly = (num_pipes == 1) && (pipes[0]->config.mode == IA_CSS_PIPE_MODE_COPY); + for (i = 0; i < num_pipes; i++) + curr_stream->pipes[i] = pipes[i]; + curr_stream->last_pipe = curr_stream->pipes[0]; + /* take over stream config */ + curr_stream->config = *stream_config; #if defined(USE_INPUT_SYSTEM_VERSION_2401) && defined(CSI2P_DISABLE_ISYS2401_ONLINE_MODE) - if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR && - stream_config->online) - curr_stream->config.online = false; + if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR && + stream_config->online) + curr_stream->config.online = false; #endif #ifdef USE_INPUT_SYSTEM_VERSION_2401 - if (curr_stream->config.online) { - curr_stream->config.source.port.num_lanes = stream_config->source.port.num_lanes; - curr_stream->config.mode = IA_CSS_INPUT_MODE_BUFFERED_SENSOR; - } + if (curr_stream->config.online) + { + curr_stream->config.source.port.num_lanes = + stream_config->source.port.num_lanes; + curr_stream->config.mode = IA_CSS_INPUT_MODE_BUFFERED_SENSOR; + } #endif - /* in case driver doesn't configure init number of raw buffers, configure it here */ - if (curr_stream->config.target_num_cont_raw_buf == 0) - curr_stream->config.target_num_cont_raw_buf = NUM_CONTINUOUS_FRAMES; - if (curr_stream->config.init_num_cont_raw_buf == 0) - curr_stream->config.init_num_cont_raw_buf = curr_stream->config.target_num_cont_raw_buf; + /* in case driver doesn't configure init number of raw buffers, configure it here */ + if (curr_stream->config.target_num_cont_raw_buf == 0) + curr_stream->config.target_num_cont_raw_buf = NUM_CONTINUOUS_FRAMES; + if (curr_stream->config.init_num_cont_raw_buf == 0) + curr_stream->config.init_num_cont_raw_buf = curr_stream->config.target_num_cont_raw_buf; - /* Enable locking & unlocking of buffers in RAW buffer pool */ - if (curr_stream->config.ia_css_enable_raw_buffer_locking) - sh_css_sp_configure_enable_raw_pool_locking( - curr_stream->config.lock_all); + /* Enable locking & unlocking of buffers in RAW buffer pool */ + if (curr_stream->config.ia_css_enable_raw_buffer_locking) + sh_css_sp_configure_enable_raw_pool_locking( + curr_stream->config.lock_all); - /* copy mode specific stuff */ - switch (curr_stream->config.mode) { + /* copy mode specific stuff */ + switch (curr_stream->config.mode) + { case IA_CSS_INPUT_MODE_SENSOR: case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: #if defined(USE_INPUT_SYSTEM_VERSION_2) - ia_css_stream_configure_rx(curr_stream); + ia_css_stream_configure_rx(curr_stream); #endif - break; - case IA_CSS_INPUT_MODE_TPG: + break; + case IA_CSS_INPUT_MODE_TPG: #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - IA_CSS_LOG("tpg_configuration: x_mask=%d, y_mask=%d, x_delta=%d, y_delta=%d, xy_mask=%d", - curr_stream->config.source.tpg.x_mask, - curr_stream->config.source.tpg.y_mask, - curr_stream->config.source.tpg.x_delta, - curr_stream->config.source.tpg.y_delta, - curr_stream->config.source.tpg.xy_mask); - - sh_css_sp_configure_tpg( - curr_stream->config.source.tpg.x_mask, - curr_stream->config.source.tpg.y_mask, - curr_stream->config.source.tpg.x_delta, - curr_stream->config.source.tpg.y_delta, - curr_stream->config.source.tpg.xy_mask); + IA_CSS_LOG("tpg_configuration: x_mask=%d, y_mask=%d, x_delta=%d, y_delta=%d, xy_mask=%d", + curr_stream->config.source.tpg.x_mask, + curr_stream->config.source.tpg.y_mask, + curr_stream->config.source.tpg.x_delta, + curr_stream->config.source.tpg.y_delta, + curr_stream->config.source.tpg.xy_mask); + + sh_css_sp_configure_tpg( + curr_stream->config.source.tpg.x_mask, + curr_stream->config.source.tpg.y_mask, + curr_stream->config.source.tpg.x_delta, + curr_stream->config.source.tpg.y_delta, + curr_stream->config.source.tpg.xy_mask); #endif - break; - case IA_CSS_INPUT_MODE_PRBS: + break; + case IA_CSS_INPUT_MODE_PRBS: #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - IA_CSS_LOG("mode prbs"); - sh_css_sp_configure_prbs(curr_stream->config.source.prbs.seed); + IA_CSS_LOG("mode prbs"); + sh_css_sp_configure_prbs(curr_stream->config.source.prbs.seed); #endif - break; - case IA_CSS_INPUT_MODE_MEMORY: - IA_CSS_LOG("mode memory"); - curr_stream->reconfigure_css_rx = false; - break; - default: - IA_CSS_LOG("mode sensor/default"); - } + break; + case IA_CSS_INPUT_MODE_MEMORY: + IA_CSS_LOG("mode memory"); + curr_stream->reconfigure_css_rx = false; + break; + default: + IA_CSS_LOG("mode sensor/default"); + } #ifdef ISP2401 #ifdef USE_INPUT_SYSTEM_VERSION_2401 - err = aspect_ratio_crop_init(curr_stream, - pipes, - &aspect_ratio_crop_enabled); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR(err); - return err; - } + err = aspect_ratio_crop_init(curr_stream, + pipes, + &aspect_ratio_crop_enabled); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR(err); + return err; + } #endif #endif - for (i = 0; i < num_pipes; i++) { + for (i = 0; i < num_pipes; i++) + { #ifdef ISP2401 - struct ia_css_resolution effective_res; + struct ia_css_resolution effective_res; #endif - curr_pipe = pipes[i]; - /* set current stream */ - curr_pipe->stream = curr_stream; - /* take over effective info */ + curr_pipe = pipes[i]; + /* set current stream */ + curr_pipe->stream = curr_stream; + /* take over effective info */ - effective_res = curr_pipe->config.input_effective_res; - if (effective_res.height == 0 || effective_res.width == 0) { - effective_res = curr_pipe->stream->config.input_config.effective_res; + effective_res = curr_pipe->config.input_effective_res; + if (effective_res.height == 0 || effective_res.width == 0) { + effective_res = curr_pipe->stream->config.input_config.effective_res; #ifdef ISP2401 #if defined(USE_INPUT_SYSTEM_VERSION_2401) - /* The aspect ratio cropping is currently only - * supported on the new input system. */ - if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { - struct ia_css_resolution crop_res; - - err = aspect_ratio_crop(curr_pipe, &crop_res); - if (err == IA_CSS_SUCCESS) { - effective_res = crop_res; - } else { - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("aspect_ratio_crop() failed with err(%d)", err); + /* The aspect ratio cropping is currently only + * supported on the new input system. */ + if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { + struct ia_css_resolution crop_res; + + err = aspect_ratio_crop(curr_pipe, &crop_res); + if (err == IA_CSS_SUCCESS) { + effective_res = crop_res; + } else { + /* in case of error fallback to default + * effective resolution from driver. */ + IA_CSS_LOG("aspect_ratio_crop() failed with err(%d)", err); + } } - } #endif #endif - curr_pipe->config.input_effective_res = effective_res; + curr_pipe->config.input_effective_res = effective_res; + } + IA_CSS_LOG("effective_res=%dx%d", + effective_res.width, + effective_res.height); } - IA_CSS_LOG("effective_res=%dx%d", - effective_res.width, - effective_res.height); - } #ifdef ISP2401 - for (i = 0; i < num_pipes; i++) { - if (pipes[i]->config.mode != IA_CSS_PIPE_MODE_ACC && - pipes[i]->config.mode != IA_CSS_PIPE_MODE_COPY) { - err = check_pipe_resolutions(pipes[i]); - if (err != IA_CSS_SUCCESS) { - goto ERR; + for (i = 0; i < num_pipes; i++) + { + if (pipes[i]->config.mode != IA_CSS_PIPE_MODE_ACC && + pipes[i]->config.mode != IA_CSS_PIPE_MODE_COPY) { + err = check_pipe_resolutions(pipes[i]); + if (err != IA_CSS_SUCCESS) { + goto ERR; + } } } - } #endif - err = ia_css_stream_isp_parameters_init(curr_stream); - if (err != IA_CSS_SUCCESS) - goto ERR; - IA_CSS_LOG("isp_params_configs: %p", curr_stream->isp_params_configs); + err = ia_css_stream_isp_parameters_init(curr_stream); + if (err != IA_CSS_SUCCESS) + goto ERR; + IA_CSS_LOG("isp_params_configs: %p", curr_stream->isp_params_configs); - if (num_pipes == 1 && pipes[0]->config.mode == IA_CSS_PIPE_MODE_ACC) { - *stream = curr_stream; - err = ia_css_acc_stream_create(curr_stream); - goto ERR; - } - /* sensor binning */ - if (!spcopyonly) { - sensor_binning_changed = - sh_css_params_set_binning_factor(curr_stream, curr_stream->config.sensor_binning_factor); - } else { - sensor_binning_changed = false; - } - - IA_CSS_LOG("sensor_binning=%d, changed=%d", - curr_stream->config.sensor_binning_factor, sensor_binning_changed); - /* loop over pipes */ - IA_CSS_LOG("num_pipes=%d", num_pipes); - curr_stream->cont_capt = false; - /* Temporary hack: we give the preview pipe a reference to the capture - * pipe in continuous capture mode. */ - if (curr_stream->config.continuous) { - /* Search for the preview pipe and create the copy pipe */ - struct ia_css_pipe *preview_pipe; - struct ia_css_pipe *video_pipe; - struct ia_css_pipe *acc_pipe; - struct ia_css_pipe *capture_pipe = NULL; - struct ia_css_pipe *copy_pipe = NULL; + if (num_pipes == 1 && pipes[0]->config.mode == IA_CSS_PIPE_MODE_ACC) + { + *stream = curr_stream; + err = ia_css_acc_stream_create(curr_stream); + goto ERR; + } + /* sensor binning */ + if (!spcopyonly) + { + sensor_binning_changed = + sh_css_params_set_binning_factor(curr_stream, + curr_stream->config.sensor_binning_factor); + } else + { + sensor_binning_changed = false; + } - if (num_pipes >= 2) { - curr_stream->cont_capt = true; - curr_stream->disable_cont_vf = curr_stream->config.disable_cont_viewfinder; + IA_CSS_LOG("sensor_binning=%d, changed=%d", + curr_stream->config.sensor_binning_factor, sensor_binning_changed); + /* loop over pipes */ + IA_CSS_LOG("num_pipes=%d", num_pipes); + curr_stream->cont_capt = false; + /* Temporary hack: we give the preview pipe a reference to the capture + * pipe in continuous capture mode. */ + if (curr_stream->config.continuous) + { + /* Search for the preview pipe and create the copy pipe */ + struct ia_css_pipe *preview_pipe; + struct ia_css_pipe *video_pipe; + struct ia_css_pipe *acc_pipe; + struct ia_css_pipe *capture_pipe = NULL; + struct ia_css_pipe *copy_pipe = NULL; + + if (num_pipes >= 2) { + curr_stream->cont_capt = true; + curr_stream->disable_cont_vf = curr_stream->config.disable_cont_viewfinder; #ifndef ISP2401 - curr_stream->stop_copy_preview = my_css.stop_copy_preview; -#endif - } - - /* Create copy pipe here, since it may not be exposed to the driver */ - preview_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_PREVIEW, false); - video_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_VIDEO, false); - acc_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_ACC, false); - if (acc_pipe && num_pipes == 2 && curr_stream->cont_capt == true) - curr_stream->cont_capt = false; /* preview + QoS case will not need cont_capt switch */ - if (curr_stream->cont_capt == true) { - capture_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_CAPTURE, false); - if (!capture_pipe) { - err = IA_CSS_ERR_INTERNAL_ERROR; - goto ERR; + curr_stream->stop_copy_preview = my_css.stop_copy_preview; +#endif } - } - /* We do not support preview and video pipe at the same time */ - if (preview_pipe && video_pipe) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - goto ERR; - } - if (preview_pipe && !preview_pipe->pipe_settings.preview.copy_pipe) { - err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); - if (err != IA_CSS_SUCCESS) - goto ERR; - ia_css_pipe_config_defaults(©_pipe->config); - preview_pipe->pipe_settings.preview.copy_pipe = copy_pipe; - copy_pipe->stream = curr_stream; - } - if (preview_pipe && (curr_stream->cont_capt == true)) { - preview_pipe->pipe_settings.preview.capture_pipe = capture_pipe; - } - if (video_pipe && !video_pipe->pipe_settings.video.copy_pipe) { - err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); - if (err != IA_CSS_SUCCESS) + /* Create copy pipe here, since it may not be exposed to the driver */ + preview_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_PREVIEW, false); + video_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_VIDEO, false); + acc_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_ACC, false); + if (acc_pipe && num_pipes == 2 && curr_stream->cont_capt == true) + curr_stream->cont_capt = + false; /* preview + QoS case will not need cont_capt switch */ + if (curr_stream->cont_capt == true) { + capture_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_CAPTURE, false); + if (!capture_pipe) { + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } + } + /* We do not support preview and video pipe at the same time */ + if (preview_pipe && video_pipe) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; goto ERR; - ia_css_pipe_config_defaults(©_pipe->config); - video_pipe->pipe_settings.video.copy_pipe = copy_pipe; - copy_pipe->stream = curr_stream; - } - if (video_pipe && (curr_stream->cont_capt == true)) { - video_pipe->pipe_settings.video.capture_pipe = capture_pipe; - } - if (preview_pipe && acc_pipe) { - preview_pipe->pipe_settings.preview.acc_pipe = acc_pipe; + } + + if (preview_pipe && !preview_pipe->pipe_settings.preview.copy_pipe) { + err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); + if (err != IA_CSS_SUCCESS) + goto ERR; + ia_css_pipe_config_defaults(©_pipe->config); + preview_pipe->pipe_settings.preview.copy_pipe = copy_pipe; + copy_pipe->stream = curr_stream; + } + if (preview_pipe && (curr_stream->cont_capt == true)) { + preview_pipe->pipe_settings.preview.capture_pipe = capture_pipe; + } + if (video_pipe && !video_pipe->pipe_settings.video.copy_pipe) { + err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); + if (err != IA_CSS_SUCCESS) + goto ERR; + ia_css_pipe_config_defaults(©_pipe->config); + video_pipe->pipe_settings.video.copy_pipe = copy_pipe; + copy_pipe->stream = curr_stream; + } + if (video_pipe && (curr_stream->cont_capt == true)) { + video_pipe->pipe_settings.video.capture_pipe = capture_pipe; + } + if (preview_pipe && acc_pipe) { + preview_pipe->pipe_settings.preview.acc_pipe = acc_pipe; + } } - } - for (i = 0; i < num_pipes; i++) { - curr_pipe = pipes[i]; - /* set current stream */ - curr_pipe->stream = curr_stream; + for (i = 0; i < num_pipes; i++) + { + curr_pipe = pipes[i]; + /* set current stream */ + curr_pipe->stream = curr_stream; #ifndef ISP2401 - /* take over effective info */ + /* take over effective info */ - effective_res = curr_pipe->config.input_effective_res; - err = ia_css_util_check_res( - effective_res.width, - effective_res.height); - if (err != IA_CSS_SUCCESS) - goto ERR; + effective_res = curr_pipe->config.input_effective_res; + err = ia_css_util_check_res( + effective_res.width, + effective_res.height); + if (err != IA_CSS_SUCCESS) + goto ERR; #endif - /* sensor binning per pipe */ - if (sensor_binning_changed) - sh_css_pipe_free_shading_table(curr_pipe); - } - - /* now pipes have been configured, info should be available */ - for (i = 0; i < num_pipes; i++) { - struct ia_css_pipe_info *pipe_info = NULL; + /* sensor binning per pipe */ + if (sensor_binning_changed) + sh_css_pipe_free_shading_table(curr_pipe); + } - curr_pipe = pipes[i]; + /* now pipes have been configured, info should be available */ + for (i = 0; i < num_pipes; i++) + { + struct ia_css_pipe_info *pipe_info = NULL; - err = sh_css_pipe_load_binaries(curr_pipe); - if (err != IA_CSS_SUCCESS) - goto ERR; + curr_pipe = pipes[i]; - /* handle each pipe */ - pipe_info = &curr_pipe->info; - for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { - err = sh_css_pipe_get_output_frame_info(curr_pipe, - &pipe_info->output_info[j], j); + err = sh_css_pipe_load_binaries(curr_pipe); if (err != IA_CSS_SUCCESS) goto ERR; - } + + /* handle each pipe */ + pipe_info = &curr_pipe->info; + for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { + err = sh_css_pipe_get_output_frame_info(curr_pipe, + &pipe_info->output_info[j], j); + if (err != IA_CSS_SUCCESS) + goto ERR; + } #ifdef ISP2401 - pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; + pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; #endif - if (!spcopyonly) { - err = sh_css_pipe_get_shading_info(curr_pipe, + if (!spcopyonly) { + err = sh_css_pipe_get_shading_info(curr_pipe, #ifndef ISP2401 - &pipe_info->shading_info); + &pipe_info->shading_info); #else - & pipe_info->shading_info, &curr_pipe->config); + & pipe_info->shading_info, &curr_pipe->config); #endif - if (err != IA_CSS_SUCCESS) - goto ERR; - err = sh_css_pipe_get_grid_info(curr_pipe, - &pipe_info->grid_info); - if (err != IA_CSS_SUCCESS) - goto ERR; - for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { - sh_css_pipe_get_viewfinder_frame_info(curr_pipe, - &pipe_info->vf_output_info[j], j); if (err != IA_CSS_SUCCESS) goto ERR; + err = sh_css_pipe_get_grid_info(curr_pipe, + &pipe_info->grid_info); + if (err != IA_CSS_SUCCESS) + goto ERR; + for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { + sh_css_pipe_get_viewfinder_frame_info(curr_pipe, + &pipe_info->vf_output_info[j], j); + if (err != IA_CSS_SUCCESS) + goto ERR; + } } - } - my_css.active_pipes[ia_css_pipe_get_pipe_num(curr_pipe)] = curr_pipe; - } + my_css.active_pipes[ia_css_pipe_get_pipe_num(curr_pipe)] = curr_pipe; + } - curr_stream->started = false; + curr_stream->started = false; - /* Map SP threads before doing anything. */ - err = map_sp_threads(curr_stream, true); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LOG("map_sp_threads: return_err=%d", err); - goto ERR; - } + /* Map SP threads before doing anything. */ + err = map_sp_threads(curr_stream, true); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LOG("map_sp_threads: return_err=%d", err); + goto ERR; + } - for (i = 0; i < num_pipes; i++) { - curr_pipe = pipes[i]; - ia_css_pipe_map_queue(curr_pipe, true); - } + for (i = 0; i < num_pipes; i++) + { + curr_pipe = pipes[i]; + ia_css_pipe_map_queue(curr_pipe, true); + } - /* Create host side pipeline objects without stages */ - err = create_host_pipeline_structure(curr_stream); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LOG("create_host_pipeline_structure: return_err=%d", err); - goto ERR; - } + /* Create host side pipeline objects without stages */ + err = create_host_pipeline_structure(curr_stream); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LOG("create_host_pipeline_structure: return_err=%d", err); + goto ERR; + } - /* assign curr_stream */ - *stream = curr_stream; + /* assign curr_stream */ + *stream = curr_stream; ERR: #ifndef ISP2401 - if (err == IA_CSS_SUCCESS) - { - /* working mode: enter into the seed list */ - if (my_css_save.mode == sh_css_mode_working) { - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (!my_css_save.stream_seeds[i].stream) { - IA_CSS_LOG("entered stream into loc=%d", i); - my_css_save.stream_seeds[i].orig_stream = stream; - my_css_save.stream_seeds[i].stream = curr_stream; - my_css_save.stream_seeds[i].num_pipes = num_pipes; - my_css_save.stream_seeds[i].stream_config = *stream_config; - for (j = 0; j < num_pipes; j++) { - my_css_save.stream_seeds[i].pipe_config[j] = pipes[j]->config; - my_css_save.stream_seeds[i].pipes[j] = pipes[j]; - my_css_save.stream_seeds[i].orig_pipes[j] = &pipes[j]; + if (err == IA_CSS_SUCCESS) + { + /* working mode: enter into the seed list */ + if (my_css_save.mode == sh_css_mode_working) { + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) + if (!my_css_save.stream_seeds[i].stream) { + IA_CSS_LOG("entered stream into loc=%d", i); + my_css_save.stream_seeds[i].orig_stream = stream; + my_css_save.stream_seeds[i].stream = curr_stream; + my_css_save.stream_seeds[i].num_pipes = num_pipes; + my_css_save.stream_seeds[i].stream_config = *stream_config; + for (j = 0; j < num_pipes; j++) { + my_css_save.stream_seeds[i].pipe_config[j] = pipes[j]->config; + my_css_save.stream_seeds[i].pipes[j] = pipes[j]; + my_css_save.stream_seeds[i].orig_pipes[j] = &pipes[j]; + } + break; } - break; } - } #else - if (err == IA_CSS_SUCCESS) { - err = ia_css_save_stream(curr_stream); + if (err == IA_CSS_SUCCESS) + { + err = ia_css_save_stream(curr_stream); #endif - } else { - ia_css_stream_destroy(curr_stream); - } + } else + { + ia_css_stream_destroy(curr_stream); + } #ifndef ISP2401 - IA_CSS_LEAVE("return_err=%d mode=%d", err, my_css_save.mode); + IA_CSS_LEAVE("return_err=%d mode=%d", err, my_css_save.mode); #else - IA_CSS_LEAVE("return_err=%d", err); + IA_CSS_LEAVE("return_err=%d", err); #endif - return err; -} + return err; + } -enum ia_css_err -ia_css_stream_destroy(struct ia_css_stream *stream) -{ - int i; - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err + ia_css_stream_destroy(struct ia_css_stream *stream) { + int i; + enum ia_css_err err = IA_CSS_SUCCESS; #ifdef ISP2401 - enum ia_css_err err1 = IA_CSS_SUCCESS; - enum ia_css_err err2 = IA_CSS_SUCCESS; + enum ia_css_err err1 = IA_CSS_SUCCESS; + enum ia_css_err err2 = IA_CSS_SUCCESS; #endif - IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (!stream) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + IA_CSS_ENTER_PRIVATE("stream = %p", stream); + if (!stream) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - ia_css_stream_isp_parameters_uninit(stream); + ia_css_stream_isp_parameters_uninit(stream); - if ((stream->last_pipe) && - ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) { + if ((stream->last_pipe) && + ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) + { #if defined(USE_INPUT_SYSTEM_VERSION_2401) - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *entry = stream->pipes[i]; - unsigned int sp_thread_id; - struct sh_css_sp_pipeline_terminal *sp_pipeline_input_terminal; - - assert(entry); - if (entry) { - /* get the SP thread id */ - if (ia_css_pipeline_get_sp_thread_id( - ia_css_pipe_get_pipe_num(entry), &sp_thread_id) != true) - return IA_CSS_ERR_INTERNAL_ERROR; - /* get the target input terminal */ - sp_pipeline_input_terminal = + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *entry = stream->pipes[i]; + unsigned int sp_thread_id; + struct sh_css_sp_pipeline_terminal *sp_pipeline_input_terminal; + + assert(entry); + if (entry) { + /* get the SP thread id */ + if (ia_css_pipeline_get_sp_thread_id( + ia_css_pipe_get_pipe_num(entry), &sp_thread_id) != true) + return IA_CSS_ERR_INTERNAL_ERROR; + /* get the target input terminal */ + sp_pipeline_input_terminal = &sh_css_sp_group.pipe_io[sp_thread_id].input; - for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { - ia_css_isys_stream_h isys_stream = + for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { + ia_css_isys_stream_h isys_stream = &sp_pipeline_input_terminal->context.virtual_input_system_stream[i]; - if (stream->config.isys_config[i].valid && isys_stream->valid) - ia_css_isys_stream_destroy(isys_stream); + if (stream->config.isys_config[i].valid && isys_stream->valid) + ia_css_isys_stream_destroy(isys_stream); + } } } - } #ifndef ISP2401 - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { #else - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - stream->config.mode == IA_CSS_INPUT_MODE_TPG || - stream->config.mode == IA_CSS_INPUT_MODE_PRBS) { -#endif - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *entry = stream->pipes[i]; - /* free any mipi frames that are remaining: - * some test stream create-destroy cycles do not generate output frames - * and the mipi buffer is not freed in the deque function - */ - if (entry) - free_mipi_frames(entry); + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || + stream->config.mode == IA_CSS_INPUT_MODE_TPG || + stream->config.mode == IA_CSS_INPUT_MODE_PRBS) { +#endif + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *entry = stream->pipes[i]; + /* free any mipi frames that are remaining: + * some test stream create-destroy cycles do not generate output frames + * and the mipi buffer is not freed in the deque function + */ + if (entry) + free_mipi_frames(entry); + } } - } - stream_unregister_with_csi_rx(stream); + stream_unregister_with_csi_rx(stream); #endif - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *curr_pipe = stream->pipes[i]; + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *curr_pipe = stream->pipes[i]; - assert(curr_pipe); - ia_css_pipe_map_queue(curr_pipe, false); - } + assert(curr_pipe); + ia_css_pipe_map_queue(curr_pipe, false); + } - err = map_sp_threads(stream, false); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + err = map_sp_threads(stream, false); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } } - } - /* remove references from pipes to stream */ - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *entry = stream->pipes[i]; - - assert(entry); - if (entry) { - /* clear reference to stream */ - entry->stream = NULL; - /* check internal copy pipe */ - if (entry->mode == IA_CSS_PIPE_ID_PREVIEW && - entry->pipe_settings.preview.copy_pipe) { - IA_CSS_LOG("clearing stream on internal preview copy pipe"); - entry->pipe_settings.preview.copy_pipe->stream = NULL; - } - if (entry->mode == IA_CSS_PIPE_ID_VIDEO && - entry->pipe_settings.video.copy_pipe) { - IA_CSS_LOG("clearing stream on internal video copy pipe"); - entry->pipe_settings.video.copy_pipe->stream = NULL; + /* remove references from pipes to stream */ + for (i = 0; i < stream->num_pipes; i++) + { + struct ia_css_pipe *entry = stream->pipes[i]; + + assert(entry); + if (entry) { + /* clear reference to stream */ + entry->stream = NULL; + /* check internal copy pipe */ + if (entry->mode == IA_CSS_PIPE_ID_PREVIEW && + entry->pipe_settings.preview.copy_pipe) { + IA_CSS_LOG("clearing stream on internal preview copy pipe"); + entry->pipe_settings.preview.copy_pipe->stream = NULL; + } + if (entry->mode == IA_CSS_PIPE_ID_VIDEO && + entry->pipe_settings.video.copy_pipe) { + IA_CSS_LOG("clearing stream on internal video copy pipe"); + entry->pipe_settings.video.copy_pipe->stream = NULL; + } + err = sh_css_pipe_unload_binaries(entry); } - err = sh_css_pipe_unload_binaries(entry); } - } - /* free associated memory of stream struct */ - kfree(stream->pipes); - stream->pipes = NULL; - stream->num_pipes = 0; + /* free associated memory of stream struct */ + kfree(stream->pipes); + stream->pipes = NULL; + stream->num_pipes = 0; #ifndef ISP2401 - /* working mode: take out of the seed list */ - if (my_css_save.mode == sh_css_mode_working) - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (my_css_save.stream_seeds[i].stream == stream) - { - IA_CSS_LOG("took out stream %d", i); - my_css_save.stream_seeds[i].stream = NULL; - break; - } + /* working mode: take out of the seed list */ + if (my_css_save.mode == sh_css_mode_working) + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) + if (my_css_save.stream_seeds[i].stream == stream) + { + IA_CSS_LOG("took out stream %d", i); + my_css_save.stream_seeds[i].stream = NULL; + break; + } #else - err2 = ia_css_save_restore_remove_stream(stream); + err2 = ia_css_save_restore_remove_stream(stream); - err1 = (err != IA_CSS_SUCCESS) ? err : err2; + err1 = (err != IA_CSS_SUCCESS) ? err : err2; #endif - kfree(stream); + kfree(stream); #ifndef ISP2401 - IA_CSS_LEAVE_ERR(err); + IA_CSS_LEAVE_ERR(err); #else - IA_CSS_LEAVE_ERR(err1); + IA_CSS_LEAVE_ERR(err1); #endif #ifndef ISP2401 - return err; + return err; #else - return err1; + return err1; #endif -} + } -enum ia_css_err -ia_css_stream_get_info(const struct ia_css_stream *stream, - struct ia_css_stream_info *stream_info) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_info: enter/exit\n"); - assert(stream); - assert(stream_info); + enum ia_css_err + ia_css_stream_get_info(const struct ia_css_stream *stream, + struct ia_css_stream_info *stream_info) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_info: enter/exit\n"); + assert(stream); + assert(stream_info); - *stream_info = stream->info; - return IA_CSS_SUCCESS; -} + *stream_info = stream->info; + return IA_CSS_SUCCESS; + } -/* - * Rebuild a stream, including allocating structs, setting configuration and - * building the required pipes. - * The data is taken from the css_save struct updated upon stream creation. - * The stream handle is used to identify the correct entry in the css_save struct - */ -enum ia_css_err -ia_css_stream_load(struct ia_css_stream *stream) -{ + /* + * Rebuild a stream, including allocating structs, setting configuration and + * building the required pipes. + * The data is taken from the css_save struct updated upon stream creation. + * The stream handle is used to identify the correct entry in the css_save struct + */ + enum ia_css_err + ia_css_stream_load(struct ia_css_stream *stream) { #ifndef ISP2401 - int i; - enum ia_css_err err; + int i; + enum ia_css_err err; - assert(stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() enter,\n"); - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { - if (my_css_save.stream_seeds[i].stream == stream) { - int j; - - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { - if ((err = ia_css_pipe_create(&my_css_save.stream_seeds[i].pipe_config[j], &my_css_save.stream_seeds[i].pipes[j])) != IA_CSS_SUCCESS) { - if (j) { - int k; - - for (k = 0; k < j; k++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[k]); + assert(stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() enter,\n"); + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) + { + if (my_css_save.stream_seeds[i].stream == stream) { + int j; + + for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { + if ((err = ia_css_pipe_create(&my_css_save.stream_seeds[i].pipe_config[j], + &my_css_save.stream_seeds[i].pipes[j])) != IA_CSS_SUCCESS) { + if (j) { + int k; + + for (k = 0; k < j; k++) + ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[k]); + } + return err; } + } + err = ia_css_stream_create(&my_css_save.stream_seeds[i].stream_config, + my_css_save.stream_seeds[i].num_pipes, + my_css_save.stream_seeds[i].pipes, + &my_css_save.stream_seeds[i].stream); + if (err != IA_CSS_SUCCESS) { + ia_css_stream_destroy(stream); + for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) + ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); return err; } + break; } - err = ia_css_stream_create(&my_css_save.stream_seeds[i].stream_config, - my_css_save.stream_seeds[i].num_pipes, - my_css_save.stream_seeds[i].pipes, - &my_css_save.stream_seeds[i].stream); - if (err != IA_CSS_SUCCESS) { - ia_css_stream_destroy(stream); - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); - return err; - } - break; } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() exit,\n"); - return IA_CSS_SUCCESS; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() exit,\n"); + return IA_CSS_SUCCESS; #else - /* TODO remove function - DEPRECATED */ - (void)stream; - return IA_CSS_ERR_NOT_SUPPORTED; + /* TODO remove function - DEPRECATED */ + (void)stream; + return IA_CSS_ERR_NOT_SUPPORTED; #endif -} + } -enum ia_css_err -ia_css_stream_start(struct ia_css_stream *stream) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err + ia_css_stream_start(struct ia_css_stream *stream) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER("stream = %p", stream); - if ((!stream) || (!stream->last_pipe)) { - IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - IA_CSS_LOG("starting %d", stream->last_pipe->mode); + IA_CSS_ENTER("stream = %p", stream); + if ((!stream) || (!stream->last_pipe)) + { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + IA_CSS_LOG("starting %d", stream->last_pipe->mode); - sh_css_sp_set_disable_continuous_viewfinder(stream->disable_cont_vf); + sh_css_sp_set_disable_continuous_viewfinder(stream->disable_cont_vf); - /* Create host side pipeline. */ - err = create_host_pipeline(stream); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR(err); - return err; - } + /* Create host side pipeline. */ + err = create_host_pipeline(stream); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR(err); + return err; + } #if !defined(HAS_NO_INPUT_SYSTEM) #if defined(USE_INPUT_SYSTEM_VERSION_2401) - if ((stream->config.mode == IA_CSS_INPUT_MODE_SENSOR) || - (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) - stream_register_with_csi_rx(stream); + if ((stream->config.mode == IA_CSS_INPUT_MODE_SENSOR) || + (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) + stream_register_with_csi_rx(stream); #endif #endif #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - /* Initialize mipi size checks */ - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - { - unsigned int idx; - unsigned int port = (unsigned int)(stream->config.source.port.port); + /* Initialize mipi size checks */ + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { + unsigned int idx; + unsigned int port = (unsigned int)(stream->config.source.port.port); - for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { - sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = sh_css_get_mipi_sizes_for_check(port, idx); + for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { + sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = + sh_css_get_mipi_sizes_for_check(port, idx); + } } - } #endif #if !defined(HAS_NO_INPUT_SYSTEM) - if (stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) { - err = sh_css_config_input_network(stream); - if (err != IA_CSS_SUCCESS) - return err; - } + if (stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) + { + err = sh_css_config_input_network(stream); + if (err != IA_CSS_SUCCESS) + return err; + } #endif /* !HAS_NO_INPUT_SYSTEM */ - err = sh_css_pipe_start(stream); - IA_CSS_LEAVE_ERR(err); - return err; -} + err = sh_css_pipe_start(stream); + IA_CSS_LEAVE_ERR(err); + return err; + } -enum ia_css_err -ia_css_stream_stop(struct ia_css_stream *stream) -{ - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err + ia_css_stream_stop(struct ia_css_stream *stream) { + enum ia_css_err err = IA_CSS_SUCCESS; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop() enter/exit\n"); - assert(stream); - assert(stream->last_pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop: stopping %d\n", - stream->last_pipe->mode); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop() enter/exit\n"); + assert(stream); + assert(stream->last_pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop: stopping %d\n", + stream->last_pipe->mode); #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - /* De-initialize mipi size checks */ - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - { - unsigned int idx; - unsigned int port = (unsigned int)(stream->config.source.port.port); + /* De-initialize mipi size checks */ + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { + unsigned int idx; + unsigned int port = (unsigned int)(stream->config.source.port.port); - for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { - sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = 0; + for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { + sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = 0; + } } - } #endif #ifndef ISP2401 - err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); + err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); #else - err = sh_css_pipes_stop(stream); + err = sh_css_pipes_stop(stream); #endif - if (err != IA_CSS_SUCCESS) - return err; + if (err != IA_CSS_SUCCESS) + return err; - /* Ideally, unmapping should happen after pipeline_stop, but current - * semantics do not allow that. */ - /* err = map_sp_threads(stream, false); */ + /* Ideally, unmapping should happen after pipeline_stop, but current + * semantics do not allow that. */ + /* err = map_sp_threads(stream, false); */ - return err; -} + return err; + } -bool -ia_css_stream_has_stopped(struct ia_css_stream *stream) -{ - bool stopped; + bool + ia_css_stream_has_stopped(struct ia_css_stream *stream) { + bool stopped; - assert(stream); + assert(stream); #ifndef ISP2401 - stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); + stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); #else - stopped = sh_css_pipes_have_stopped(stream); + stopped = sh_css_pipes_have_stopped(stream); #endif - return stopped; -} + return stopped; + } #ifndef ISP2401 -/* - * Destroy the stream and all the pipes related to it. - * The stream handle is used to identify the correct entry in the css_save struct - */ -enum ia_css_err -ia_css_stream_unload(struct ia_css_stream *stream) -{ - int i; + /* + * Destroy the stream and all the pipes related to it. + * The stream handle is used to identify the correct entry in the css_save struct + */ + enum ia_css_err + ia_css_stream_unload(struct ia_css_stream *stream) { + int i; - assert(stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() enter,\n"); - /* some checks */ - assert(stream); - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (my_css_save.stream_seeds[i].stream == stream) - { - int j; + assert(stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() enter,\n"); + /* some checks */ + assert(stream); + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) + if (my_css_save.stream_seeds[i].stream == stream) + { + int j; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload(): unloading %d (%p)\n", i, my_css_save.stream_seeds[i].stream); - ia_css_stream_destroy(stream); - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload(): after unloading %d (%p)\n", i, my_css_save.stream_seeds[i].stream); - break; - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() exit,\n"); - return IA_CSS_SUCCESS; -} + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_unload(): unloading %d (%p)\n", i, + my_css_save.stream_seeds[i].stream); + ia_css_stream_destroy(stream); + for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) + ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_unload(): after unloading %d (%p)\n", i, + my_css_save.stream_seeds[i].stream); + break; + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() exit,\n"); + return IA_CSS_SUCCESS; + } #endif -enum ia_css_err -ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe, enum ia_css_pipe_id *pipe_id) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_temp_pipe_to_pipe_id() enter/exit\n"); - if (pipe) - *pipe_id = pipe->mode; - else - *pipe_id = IA_CSS_PIPE_ID_COPY; + enum ia_css_err + ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe, + enum ia_css_pipe_id *pipe_id) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_temp_pipe_to_pipe_id() enter/exit\n"); + if (pipe) + *pipe_id = pipe->mode; + else + *pipe_id = IA_CSS_PIPE_ID_COPY; - return IA_CSS_SUCCESS; -} + return IA_CSS_SUCCESS; + } -enum atomisp_input_format -ia_css_stream_get_format(const struct ia_css_stream *stream) -{ - return stream->config.input_config.format; -} + enum atomisp_input_format + ia_css_stream_get_format(const struct ia_css_stream *stream) { + return stream->config.input_config.format; + } -bool -ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream) -{ - return (stream->config.pixels_per_clock == 2); -} + bool + ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream) { + return (stream->config.pixels_per_clock == 2); + } -struct ia_css_binary * -ia_css_stream_get_shading_correction_binary(const struct ia_css_stream *stream) -{ - struct ia_css_pipe *pipe; + struct ia_css_binary * + ia_css_stream_get_shading_correction_binary(const struct ia_css_stream + *stream) { + struct ia_css_pipe *pipe; - assert(stream); + assert(stream); - pipe = stream->pipes[0]; + pipe = stream->pipes[0]; - if (stream->num_pipes == 2) { - assert(stream->pipes[1]); - if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || - stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) - pipe = stream->pipes[1]; - } + if (stream->num_pipes == 2) { + assert(stream->pipes[1]); + if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || + stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + pipe = stream->pipes[1]; + } - return ia_css_pipe_get_shading_correction_binary(pipe); -} + return ia_css_pipe_get_shading_correction_binary(pipe); + } -struct ia_css_binary * -ia_css_stream_get_dvs_binary(const struct ia_css_stream *stream) -{ - int i; - struct ia_css_pipe *video_pipe = NULL; + struct ia_css_binary * + ia_css_stream_get_dvs_binary(const struct ia_css_stream *stream) { + int i; + struct ia_css_pipe *video_pipe = NULL; - /* First we find the video pipe */ - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *pipe = stream->pipes[i]; + /* First we find the video pipe */ + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *pipe = stream->pipes[i]; - if (pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { - video_pipe = pipe; - break; + if (pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { + video_pipe = pipe; + break; + } } + if (video_pipe) + return &video_pipe->pipe_settings.video.video_binary; + return NULL; } - if (video_pipe) - return &video_pipe->pipe_settings.video.video_binary; - return NULL; -} -struct ia_css_binary * -ia_css_stream_get_3a_binary(const struct ia_css_stream *stream) -{ - struct ia_css_pipe *pipe; - struct ia_css_binary *s3a_binary = NULL; + struct ia_css_binary * + ia_css_stream_get_3a_binary(const struct ia_css_stream *stream) { + struct ia_css_pipe *pipe; + struct ia_css_binary *s3a_binary = NULL; - assert(stream); + assert(stream); - pipe = stream->pipes[0]; + pipe = stream->pipes[0]; - if (stream->num_pipes == 2) { - assert(stream->pipes[1]); - if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || - stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) - pipe = stream->pipes[1]; - } + if (stream->num_pipes == 2) { + assert(stream->pipes[1]); + if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || + stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + pipe = stream->pipes[1]; + } - s3a_binary = ia_css_pipe_get_s3a_binary(pipe); + s3a_binary = ia_css_pipe_get_s3a_binary(pipe); - return s3a_binary; -} + return s3a_binary; + } -enum ia_css_err -ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, unsigned int output_padded_width) -{ - struct ia_css_pipe *pipe; + enum ia_css_err + ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, + unsigned int output_padded_width) { + struct ia_css_pipe *pipe; - assert(stream); + assert(stream); - pipe = stream->last_pipe; + pipe = stream->last_pipe; - assert(pipe); + assert(pipe); - /* set the config also just in case (redundant info? why do we save config in pipe?) */ - pipe->config.output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; - pipe->output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; + /* set the config also just in case (redundant info? why do we save config in pipe?) */ + pipe->config.output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; + pipe->output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; - return IA_CSS_SUCCESS; -} + return IA_CSS_SUCCESS; + } -static struct ia_css_binary * -ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe) -{ - struct ia_css_binary *binary = NULL; + static struct ia_css_binary * + ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe) { + struct ia_css_binary *binary = NULL; - assert(pipe); + assert(pipe); - switch (pipe->config.mode) { - case IA_CSS_PIPE_MODE_PREVIEW: - binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; - break; - case IA_CSS_PIPE_MODE_VIDEO: - binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; - break; - case IA_CSS_PIPE_MODE_CAPTURE: - if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { - unsigned int i; + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; + break; + case IA_CSS_PIPE_MODE_VIDEO: + binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + unsigned int i; - for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { - if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.sc) { - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; - break; + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.sc) { + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; + break; + } } - } - } else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; - else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { - if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) + } else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_BAYER) binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; - else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; + else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { + if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; + } + break; + default: + break; } - break; - default: - break; - } - if (binary && binary->info->sp.enable.sc) - return binary; + if (binary && binary->info->sp.enable.sc) + return binary; - return NULL; -} + return NULL; + } -static struct ia_css_binary * -ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) -{ - struct ia_css_binary *binary = NULL; + static struct ia_css_binary * + ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) { + struct ia_css_binary *binary = NULL; - assert(pipe); + assert(pipe); - switch (pipe->config.mode) { + switch (pipe->config.mode) { case IA_CSS_PIPE_MODE_PREVIEW: binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; break; @@ -10312,9 +10600,11 @@ ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) break; } } - } else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) + } else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_BAYER) binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; - else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || + else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_ADVANCED || pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; @@ -10326,782 +10616,806 @@ ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) break; default: break; - } + } - if (binary && !binary->info->sp.enable.s3a) - binary = NULL; + if (binary && !binary->info->sp.enable.s3a) + binary = NULL; - return binary; -} + return binary; + } -static struct ia_css_binary * -ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe) -{ - struct ia_css_binary *binary = NULL; + static struct ia_css_binary * + ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe) { + struct ia_css_binary *binary = NULL; - assert(pipe); + assert(pipe); - switch (pipe->config.mode) { + switch (pipe->config.mode) { case IA_CSS_PIPE_MODE_VIDEO: binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; break; default: break; - } + } - if (binary && !binary->info->sp.enable.dis) - binary = NULL; + if (binary && !binary->info->sp.enable.dis) + binary = NULL; - return binary; -} + return binary; + } -struct ia_css_pipeline * -ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe) -{ - assert(pipe); + struct ia_css_pipeline * + ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe) { + assert(pipe); - return (struct ia_css_pipeline *)&pipe->pipeline; -} + return (struct ia_css_pipeline *)&pipe->pipeline; + } -unsigned int -ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) -{ - assert(pipe); + unsigned int + ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) { + assert(pipe); - /* KW was not sure this function was not returning a value - that was out of range; so added an assert, and, for the - case when asserts are not enabled, clip to the largest - value; pipe_num is unsigned so the value cannot be too small - */ - assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX); + /* KW was not sure this function was not returning a value + that was out of range; so added an assert, and, for the + case when asserts are not enabled, clip to the largest + value; pipe_num is unsigned so the value cannot be too small + */ + assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX); - if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX) - return (IA_CSS_PIPELINE_NUM_MAX - 1); + if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX) + return (IA_CSS_PIPELINE_NUM_MAX - 1); - return pipe->pipe_num; -} + return pipe->pipe_num; + } -unsigned int -ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe) -{ - assert(pipe); + unsigned int + ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe) { + assert(pipe); - return (unsigned int)pipe->config.isp_pipe_version; -} + return (unsigned int)pipe->config.isp_pipe_version; + } #define SP_START_TIMEOUT_US 30000000 -enum ia_css_err -ia_css_start_sp(void) -{ - unsigned long timeout; - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err + ia_css_start_sp(void) { + unsigned long timeout; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER(""); - sh_css_sp_start_isp(); + IA_CSS_ENTER(""); + sh_css_sp_start_isp(); - /* waiting for the SP is completely started */ - timeout = SP_START_TIMEOUT_US; - while ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout) { - timeout--; - hrt_sleep(); - } - if (timeout == 0) { - IA_CSS_ERROR("timeout during SP initialization"); - return IA_CSS_ERR_INTERNAL_ERROR; - } + /* waiting for the SP is completely started */ + timeout = SP_START_TIMEOUT_US; + while ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout) + { + timeout--; + hrt_sleep(); + } + if (timeout == 0) + { + IA_CSS_ERROR("timeout during SP initialization"); + return IA_CSS_ERR_INTERNAL_ERROR; + } - /* Workaround, in order to run two streams in parallel. See TASK 4271*/ - /* TODO: Fix this. */ + /* Workaround, in order to run two streams in parallel. See TASK 4271*/ + /* TODO: Fix this. */ - sh_css_init_host_sp_control_vars(); + sh_css_init_host_sp_control_vars(); - /* buffers should be initialized only when sp is started */ - /* AM: At the moment it will be done only when there is no stream active. */ + /* buffers should be initialized only when sp is started */ + /* AM: At the moment it will be done only when there is no stream active. */ - sh_css_setup_queues(); - ia_css_bufq_dump_queue_info(); + sh_css_setup_queues(); + ia_css_bufq_dump_queue_info(); #ifdef ISP2401 - if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ - ia_css_set_system_mode(IA_CSS_SYS_MODE_WORKING); - } + if (ia_css_is_system_mode_suspend_or_resume() == false) /* skip in suspend/resume flow */ + { + ia_css_set_system_mode(IA_CSS_SYS_MODE_WORKING); + } #endif - IA_CSS_LEAVE_ERR(err); - return err; -} + IA_CSS_LEAVE_ERR(err); + return err; + } -/* - * Time to wait SP for termincate. Only condition when this can happen - * is a fatal hw failure, but we must be able to detect this and emit - * a proper error trace. - */ + /* + * Time to wait SP for termincate. Only condition when this can happen + * is a fatal hw failure, but we must be able to detect this and emit + * a proper error trace. + */ #define SP_SHUTDOWN_TIMEOUT_US 200000 -enum ia_css_err -ia_css_stop_sp(void) -{ - unsigned long timeout; - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err + ia_css_stop_sp(void) { + unsigned long timeout; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER("void"); + IA_CSS_ENTER("void"); - if (!sh_css_sp_is_running()) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE("SP already stopped : return_err=%d", err); + if (!sh_css_sp_is_running()) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE("SP already stopped : return_err=%d", err); - /* Return an error - stop SP should not have been called by driver */ - return err; - } + /* Return an error - stop SP should not have been called by driver */ + return err; + } - /* For now, stop whole SP */ + /* For now, stop whole SP */ #ifndef ISP2401 - sh_css_write_host2sp_command(host2sp_cmd_terminate); + sh_css_write_host2sp_command(host2sp_cmd_terminate); #else - if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) { - IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); - ia_css_debug_dump_sp_sw_debug_info(); - ia_css_debug_dump_debug_info(NULL); - } + if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) + { + IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); + ia_css_debug_dump_sp_sw_debug_info(); + ia_css_debug_dump_debug_info(NULL); + } #endif - sh_css_sp_set_sp_running(false); + sh_css_sp_set_sp_running(false); - timeout = SP_SHUTDOWN_TIMEOUT_US; - while (!ia_css_spctrl_is_idle(SP0_ID) && timeout) { - timeout--; - hrt_sleep(); - } - if ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_TERMINATED)) - IA_CSS_WARNING("SP has not terminated (SW)"); + timeout = SP_SHUTDOWN_TIMEOUT_US; + while (!ia_css_spctrl_is_idle(SP0_ID) && timeout) + { + timeout--; + hrt_sleep(); + } + if ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_TERMINATED)) + IA_CSS_WARNING("SP has not terminated (SW)"); - if (timeout == 0) { - IA_CSS_WARNING("SP is not idle"); - ia_css_debug_dump_sp_sw_debug_info(); - } - timeout = SP_SHUTDOWN_TIMEOUT_US; - while (!isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT) && timeout) { - timeout--; - hrt_sleep(); - } - if (timeout == 0) { - IA_CSS_WARNING("ISP is not idle"); - ia_css_debug_dump_sp_sw_debug_info(); - } + if (timeout == 0) + { + IA_CSS_WARNING("SP is not idle"); + ia_css_debug_dump_sp_sw_debug_info(); + } + timeout = SP_SHUTDOWN_TIMEOUT_US; + while (!isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT) && timeout) + { + timeout--; + hrt_sleep(); + } + if (timeout == 0) + { + IA_CSS_WARNING("ISP is not idle"); + ia_css_debug_dump_sp_sw_debug_info(); + } - sh_css_hmm_buffer_record_uninit(); + sh_css_hmm_buffer_record_uninit(); #ifndef ISP2401 - /* clear pending param sets from refcount */ - sh_css_param_clear_param_sets(); -#else - if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ /* clear pending param sets from refcount */ sh_css_param_clear_param_sets(); - ia_css_set_system_mode(IA_CSS_SYS_MODE_INIT); /* System is initialized but not 'running' */ - } +#else + if (ia_css_is_system_mode_suspend_or_resume() == false) /* skip in suspend/resume flow */ + { + /* clear pending param sets from refcount */ + sh_css_param_clear_param_sets(); + ia_css_set_system_mode( + IA_CSS_SYS_MODE_INIT); /* System is initialized but not 'running' */ + } #endif - IA_CSS_LEAVE_ERR(err); - return err; -} - -enum ia_css_err -ia_css_update_continuous_frames(struct ia_css_stream *stream) -{ - struct ia_css_pipe *pipe; - unsigned int i; + IA_CSS_LEAVE_ERR(err); + return err; + } - ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, - "sh_css_update_continuous_frames() enter:\n"); + enum ia_css_err + ia_css_update_continuous_frames(struct ia_css_stream *stream) { + struct ia_css_pipe *pipe; + unsigned int i; - if (!stream) { ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, - "sh_css_update_continuous_frames() leave: invalid stream, return_void\n"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() enter:\n"); - pipe = stream->continuous_pipe; + if (!stream) + { + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() leave: invalid stream, return_void\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - for (i = stream->config.init_num_cont_raw_buf; - i < stream->config.target_num_cont_raw_buf; i++) { - sh_css_update_host2sp_offline_frame(i, - pipe->continuous_frames[i], pipe->cont_md_buffers[i]); - } - sh_css_update_host2sp_cont_num_raw_frames - (stream->config.target_num_cont_raw_buf, true); - ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, - "sh_css_update_continuous_frames() leave: return_void\n"); + pipe = stream->continuous_pipe; - return IA_CSS_SUCCESS; -} + for (i = stream->config.init_num_cont_raw_buf; + i < stream->config.target_num_cont_raw_buf; i++) + { + sh_css_update_host2sp_offline_frame(i, + pipe->continuous_frames[i], pipe->cont_md_buffers[i]); + } + sh_css_update_host2sp_cont_num_raw_frames + (stream->config.target_num_cont_raw_buf, true); + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() leave: return_void\n"); -void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) -{ - unsigned int thread_id; - enum ia_css_pipe_id pipe_id; - unsigned int pipe_num; - bool need_input_queue; + return IA_CSS_SUCCESS; + } - IA_CSS_ENTER(""); - assert(pipe); + void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) { + unsigned int thread_id; + enum ia_css_pipe_id pipe_id; + unsigned int pipe_num; + bool need_input_queue; - pipe_id = pipe->mode; - pipe_num = pipe->pipe_num; + IA_CSS_ENTER(""); + assert(pipe); - ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + pipe_id = pipe->mode; + pipe_num = pipe->pipe_num; + + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); #if defined(HAS_NO_INPUT_SYSTEM) || defined(USE_INPUT_SYSTEM_VERSION_2401) - need_input_queue = true; + need_input_queue = true; #else - need_input_queue = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + need_input_queue = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - /* map required buffer queues to resources */ - /* TODO: to be improved */ - if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); + /* map required buffer queues to resources */ + /* TODO: to be improved */ + if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); #endif - if (pipe->pipe_settings.preview.preview_binary.info && - pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); - } else if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE) { - unsigned int i; + if (pipe->pipe_settings.preview.preview_binary.info && + pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + } else if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE) { + unsigned int i; - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); #endif - if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { - for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { - if (pipe->pipe_settings.capture.primary_binary[i].info && - pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); - break; + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info && + pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + break; + } } + } else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) { + if (pipe->pipe_settings.capture.pre_isp_binary.info && + pipe->pipe_settings.capture.pre_isp_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); } - } else if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) { - if (pipe->pipe_settings.capture.pre_isp_binary.info && - pipe->pipe_settings.capture.pre_isp_binary.info->sp.enable.s3a) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); - } - } else if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); + } else if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + if (pipe->pipe_settings.video.video_binary.info && + pipe->pipe_settings.video.video_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + if (pipe->pipe_settings.video.video_binary.info && + (pipe->pipe_settings.video.video_binary.info->sp.enable.dis + )) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_DIS_STATISTICS, map); + } else if (pipe->mode == IA_CSS_PIPE_ID_COPY) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + if (!pipe->stream->config.continuous) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif - if (pipe->pipe_settings.video.video_binary.info && - pipe->pipe_settings.video.video_binary.info->sp.enable.s3a) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); - if (pipe->pipe_settings.video.video_binary.info && - (pipe->pipe_settings.video.video_binary.info->sp.enable.dis - )) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_DIS_STATISTICS, map); - } else if (pipe->mode == IA_CSS_PIPE_ID_COPY) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - if (!pipe->stream->config.continuous) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + } else if (pipe->mode == IA_CSS_PIPE_ID_ACC) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif - } else if (pipe->mode == IA_CSS_PIPE_ID_ACC) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); #endif - } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { - unsigned int idx; + } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { + unsigned int idx; - for (idx = 0; idx < IA_CSS_PIPE_MAX_OUTPUT_STAGE; idx++) { - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx, map); - if (pipe->enable_viewfinder[idx]) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME + idx, map); - } - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + for (idx = 0; idx < IA_CSS_PIPE_MAX_OUTPUT_STAGE; idx++) { + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx, map); + if (pipe->enable_viewfinder[idx]) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME + idx, map); + } + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); #endif + } + IA_CSS_LEAVE(""); } - IA_CSS_LEAVE(""); -} #if CONFIG_ON_FRAME_ENQUEUE() -static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info *info, struct frame_data_wrapper *frame) -{ - frame->config_on_frame_enqueue.padded_width = 0; - - /* currently we support configuration on frame enqueue only on YUV formats */ - /* on other formats the padded_width is zeroed for no configuration override */ - switch (info->format) { - case IA_CSS_FRAME_FORMAT_YUV420: - case IA_CSS_FRAME_FORMAT_NV12: - if (info->padded_width > info->res.width) - { - frame->config_on_frame_enqueue.padded_width = info->padded_width; - } else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) - { - return IA_CSS_ERR_INVALID_ARGUMENTS; + static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info + *info, struct frame_data_wrapper *frame) { + frame->config_on_frame_enqueue.padded_width = 0; + + /* currently we support configuration on frame enqueue only on YUV formats */ + /* on other formats the padded_width is zeroed for no configuration override */ + switch (info->format) { + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_NV12: + if (info->padded_width > info->res.width) { + frame->config_on_frame_enqueue.padded_width = info->padded_width; + } else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) { + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* nothing to do if width == padded width or padded width is zeroed (the same) */ + break; + default: + break; } - /* nothing to do if width == padded width or padded width is zeroed (the same) */ - break; - default: - break; - } - return IA_CSS_SUCCESS; -} + return IA_CSS_SUCCESS; + } #endif -enum ia_css_err -ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) -{ - enum ia_css_err ret; + enum ia_css_err + ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) { + enum ia_css_err ret; - IA_CSS_ENTER(""); + IA_CSS_ENTER(""); - /* Only continuous streams have a tagger to which we can send the - * unlock message. */ - if (!stream || !stream->config.continuous) { - IA_CSS_ERROR("invalid stream pointer"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + /* Only continuous streams have a tagger to which we can send the + * unlock message. */ + if (!stream || !stream->config.continuous) + { + IA_CSS_ERROR("invalid stream pointer"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if (exp_id > IA_CSS_ISYS_MAX_EXPOSURE_ID || - exp_id < IA_CSS_ISYS_MIN_EXPOSURE_ID) { - IA_CSS_ERROR("invalid expsure ID: %d\n", exp_id); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + if (exp_id > IA_CSS_ISYS_MAX_EXPOSURE_ID || + exp_id < IA_CSS_ISYS_MIN_EXPOSURE_ID) + { + IA_CSS_ERROR("invalid expsure ID: %d\n", exp_id); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - /* Send the event. Since we verified that the exp_id is valid, - * we can safely assign it to an 8-bit argument here. */ - ret = ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, exp_id, 0, 0); + /* Send the event. Since we verified that the exp_id is valid, + * we can safely assign it to an 8-bit argument here. */ + ret = ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, exp_id, 0, 0); - IA_CSS_LEAVE_ERR(ret); - return ret; -} + IA_CSS_LEAVE_ERR(ret); + return ret; + } -/* @brief Set the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ -enum ia_css_err -ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool enable) -{ - unsigned int thread_id; - struct ia_css_pipeline_stage *stage; - enum ia_css_err err = IA_CSS_SUCCESS; + /* @brief Set the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ + enum ia_css_err + ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, + bool enable) { + unsigned int thread_id; + struct ia_css_pipeline_stage *stage; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER(""); + IA_CSS_ENTER(""); - /* Parameter Check */ - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("Invalid Pipe."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!(pipe->config.acc_extension)) { - IA_CSS_ERROR("Invalid Pipe(No Extension Firmware)"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!sh_css_sp_is_running()) { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else { - /* Query the threadid and stage_num for the Extension firmware*/ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); - if (err == IA_CSS_SUCCESS) { - /* Set the Extension State;. TODO: Add check for stage firmware.type (QOS)*/ - err = ia_css_bufq_enqueue_psys_event( - (uint8_t)IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE, - (uint8_t)thread_id, - (uint8_t)stage->stage_num, - enable ? 1 : 0); + /* Parameter Check */ + if (!pipe || !pipe->stream) + { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) + { + IA_CSS_ERROR("Invalid Pipe(No Extension Firmware)"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) + { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else + { + /* Query the threadid and stage_num for the Extension firmware*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); if (err == IA_CSS_SUCCESS) { - if (enable) - SH_CSS_QOS_STAGE_ENABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); - else - SH_CSS_QOS_STAGE_DISABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); + /* Set the Extension State;. TODO: Add check for stage firmware.type (QOS)*/ + err = ia_css_bufq_enqueue_psys_event( + (uint8_t)IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE, + (uint8_t)thread_id, + (uint8_t)stage->stage_num, + enable ? 1 : 0); + if (err == IA_CSS_SUCCESS) { + if (enable) + SH_CSS_QOS_STAGE_ENABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); + else + SH_CSS_QOS_STAGE_DISABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); + } } } + IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, enable); + return err; } - IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, enable); - return err; -} -/* @brief Get the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ -enum ia_css_err -ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, bool *enable) -{ - struct ia_css_pipeline_stage *stage; - unsigned int thread_id; - enum ia_css_err err = IA_CSS_SUCCESS; + /* @brief Get the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ + enum ia_css_err + ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, + bool *enable) { + struct ia_css_pipeline_stage *stage; + unsigned int thread_id; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER(""); + IA_CSS_ENTER(""); - /* Parameter Check */ - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("Invalid Pipe."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!(pipe->config.acc_extension)) { - IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!sh_css_sp_is_running()) { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else { - /* Query the threadid and stage_num corresponding to the Extension firmware*/ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); + /* Parameter Check */ + if (!pipe || !pipe->stream) + { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) + { + IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) + { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else + { + /* Query the threadid and stage_num corresponding to the Extension firmware*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); - if (err == IA_CSS_SUCCESS) { - /* Get the Extension State */ - *enable = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], stage->stage_num)) ? true : false; + if (err == IA_CSS_SUCCESS) { + /* Get the Extension State */ + *enable = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], + stage->stage_num)) ? true : false; + } } + IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, *enable); + return err; } - IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, *enable); - return err; -} #ifdef ISP2401 -enum ia_css_err -ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, uint32_t fw_handle, - struct ia_css_isp_param_css_segments *css_seg, struct ia_css_isp_param_isp_segments *isp_seg) -{ - unsigned int HIVE_ADDR_sp_group; - static struct sh_css_sp_group sp_group; - static struct sh_css_sp_stage sp_stage; - static struct sh_css_isp_stage isp_stage; - const struct ia_css_fw_info *fw; - unsigned int thread_id; - struct ia_css_pipeline_stage *stage; - enum ia_css_err err = IA_CSS_SUCCESS; - int stage_num = 0; - enum ia_css_isp_memories mem; - bool enabled; + enum ia_css_err + ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, + uint32_t fw_handle, + struct ia_css_isp_param_css_segments *css_seg, + struct ia_css_isp_param_isp_segments *isp_seg) { + unsigned int HIVE_ADDR_sp_group; + static struct sh_css_sp_group sp_group; + static struct sh_css_sp_stage sp_stage; + static struct sh_css_isp_stage isp_stage; + const struct ia_css_fw_info *fw; + unsigned int thread_id; + struct ia_css_pipeline_stage *stage; + enum ia_css_err err = IA_CSS_SUCCESS; + int stage_num = 0; + enum ia_css_isp_memories mem; + bool enabled; - IA_CSS_ENTER(""); + IA_CSS_ENTER(""); - fw = &sh_css_sp_fw; + fw = &sh_css_sp_fw; - /* Parameter Check */ - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("Invalid Pipe."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!(pipe->config.acc_extension)) { - IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!sh_css_sp_is_running()) { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else { - /* Query the thread_id and stage_num corresponding to the Extension firmware */ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); - if (err == IA_CSS_SUCCESS) { - /* Get the Extension State */ - enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], stage->stage_num)) ? true : false; - /* Update mapped arg only when extension stage is not enabled */ - if (enabled) { - IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else { - stage_num = stage->stage_num; - - HIVE_ADDR_sp_group = fw->info.sp.group; - sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(sp_group), - &sp_group, sizeof(struct sh_css_sp_group)); - mmgr_load(sp_group.pipe[thread_id].sp_stage_addr[stage_num], - &sp_stage, sizeof(struct sh_css_sp_stage)); - - mmgr_load(sp_stage.isp_stage_addr, - &isp_stage, sizeof(struct sh_css_isp_stage)); - - for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - } + /* Parameter Check */ + if (!pipe || !pipe->stream) + { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) + { + IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) + { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else + { + /* Query the thread_id and stage_num corresponding to the Extension firmware */ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); + if (err == IA_CSS_SUCCESS) { + /* Get the Extension State */ + enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], + stage->stage_num)) ? true : false; + /* Update mapped arg only when extension stage is not enabled */ + if (enabled) { + IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else { + stage_num = stage->stage_num; + + HIVE_ADDR_sp_group = fw->info.sp.group; + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(sp_group), + &sp_group, sizeof(struct sh_css_sp_group)); + mmgr_load(sp_group.pipe[thread_id].sp_stage_addr[stage_num], + &sp_stage, sizeof(struct sh_css_sp_stage)); + + mmgr_load(sp_stage.isp_stage_addr, + &isp_stage, sizeof(struct sh_css_isp_stage)); + + for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { + isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = + css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; + isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = + css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; + isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address + = + isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; + isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size + = + isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; + } - mmgr_store(sp_stage.isp_stage_addr, - &isp_stage, sizeof(struct sh_css_isp_stage)); + mmgr_store(sp_stage.isp_stage_addr, + &isp_stage, sizeof(struct sh_css_isp_stage)); + } } } + IA_CSS_LEAVE("err:%d handle:%u", err, fw_handle); + return err; } - IA_CSS_LEAVE("err:%d handle:%u", err, fw_handle); - return err; -} #ifdef USE_INPUT_SYSTEM_VERSION_2401 -static enum ia_css_err -aspect_ratio_crop_init(struct ia_css_stream *curr_stream, - struct ia_css_pipe *pipes[], - bool *do_crop_status) -{ - enum ia_css_err err = IA_CSS_SUCCESS; - int i; - struct ia_css_pipe *curr_pipe; - u32 pipe_mask = 0; + static enum ia_css_err + aspect_ratio_crop_init(struct ia_css_stream *curr_stream, + struct ia_css_pipe *pipes[], + bool *do_crop_status) { + enum ia_css_err err = IA_CSS_SUCCESS; + int i; + struct ia_css_pipe *curr_pipe; + u32 pipe_mask = 0; - if ((!curr_stream) || - (curr_stream->num_pipes == 0) || - (!pipes) || - (!do_crop_status)) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + if ((!curr_stream) || + (curr_stream->num_pipes == 0) || + (!pipes) || + (!do_crop_status)) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } - for (i = 0; i < curr_stream->num_pipes; i++) { - curr_pipe = pipes[i]; - pipe_mask |= (1 << curr_pipe->config.mode); - } + for (i = 0; i < curr_stream->num_pipes; i++) + { + curr_pipe = pipes[i]; + pipe_mask |= (1 << curr_pipe->config.mode); + } - *do_crop_status = + *do_crop_status = (((pipe_mask & (1 << IA_CSS_PIPE_MODE_PREVIEW)) || (pipe_mask & (1 << IA_CSS_PIPE_MODE_VIDEO))) && - (pipe_mask & (1 << IA_CSS_PIPE_MODE_CAPTURE)) && - curr_stream->config.continuous); - return IA_CSS_SUCCESS; -} + (pipe_mask & (1 << IA_CSS_PIPE_MODE_CAPTURE)) && + curr_stream->config.continuous); + return IA_CSS_SUCCESS; + } -static bool -aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) -{ - bool status = false; + static bool + aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) { + bool status = false; + + if ((curr_pipe) && enabled) { + if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || + (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || + (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) + status = true; + } - if ((curr_pipe) && enabled) { - if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) - status = true; + return status; } - return status; -} + static enum ia_css_err + aspect_ratio_crop(struct ia_css_pipe *curr_pipe, + struct ia_css_resolution *effective_res) { + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_resolution crop_res; + struct ia_css_resolution *in_res = NULL; + struct ia_css_resolution *out_res = NULL; + bool use_bds_output_info = false; + bool use_vf_pp_in_res = false; + bool use_capt_pp_in_res = false; -static enum ia_css_err -aspect_ratio_crop(struct ia_css_pipe *curr_pipe, - struct ia_css_resolution *effective_res) -{ - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_resolution crop_res; - struct ia_css_resolution *in_res = NULL; - struct ia_css_resolution *out_res = NULL; - bool use_bds_output_info = false; - bool use_vf_pp_in_res = false; - bool use_capt_pp_in_res = false; - - if ((!curr_pipe) || - (!effective_res)) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + if ((!curr_pipe) || + (!effective_res)) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } - if ((curr_pipe->config.mode != IA_CSS_PIPE_MODE_PREVIEW) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_VIDEO) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_CAPTURE)) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + if ((curr_pipe->config.mode != IA_CSS_PIPE_MODE_PREVIEW) && + (curr_pipe->config.mode != IA_CSS_PIPE_MODE_VIDEO) && + (curr_pipe->config.mode != IA_CSS_PIPE_MODE_CAPTURE)) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } - use_bds_output_info = + use_bds_output_info = ((curr_pipe->bds_output_info.res.width != 0) && (curr_pipe->bds_output_info.res.height != 0)); - use_vf_pp_in_res = + use_vf_pp_in_res = ((curr_pipe->config.vf_pp_in_res.width != 0) && (curr_pipe->config.vf_pp_in_res.height != 0)); - use_capt_pp_in_res = + use_capt_pp_in_res = ((curr_pipe->config.capt_pp_in_res.width != 0) && (curr_pipe->config.capt_pp_in_res.height != 0)); - in_res = &curr_pipe->stream->config.input_config.effective_res; - out_res = &curr_pipe->output_info[0].res; + in_res = &curr_pipe->stream->config.input_config.effective_res; + out_res = &curr_pipe->output_info[0].res; - switch (curr_pipe->config.mode) { - case IA_CSS_PIPE_MODE_PREVIEW: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - else if (use_vf_pp_in_res) - out_res = &curr_pipe->config.vf_pp_in_res; - break; - case IA_CSS_PIPE_MODE_VIDEO: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - break; - case IA_CSS_PIPE_MODE_CAPTURE: - if (use_capt_pp_in_res) - out_res = &curr_pipe->config.capt_pp_in_res; - break; - case IA_CSS_PIPE_MODE_ACC: - case IA_CSS_PIPE_MODE_COPY: - case IA_CSS_PIPE_MODE_YUVPP: - default: - IA_CSS_ERROR("aspect ratio cropping invalid args: mode[%d]\n", - curr_pipe->config.mode); - assert(0); - break; - } + switch (curr_pipe->config.mode) + { + case IA_CSS_PIPE_MODE_PREVIEW: + if (use_bds_output_info) + out_res = &curr_pipe->bds_output_info.res; + else if (use_vf_pp_in_res) + out_res = &curr_pipe->config.vf_pp_in_res; + break; + case IA_CSS_PIPE_MODE_VIDEO: + if (use_bds_output_info) + out_res = &curr_pipe->bds_output_info.res; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (use_capt_pp_in_res) + out_res = &curr_pipe->config.capt_pp_in_res; + break; + case IA_CSS_PIPE_MODE_ACC: + case IA_CSS_PIPE_MODE_COPY: + case IA_CSS_PIPE_MODE_YUVPP: + default: + IA_CSS_ERROR("aspect ratio cropping invalid args: mode[%d]\n", + curr_pipe->config.mode); + assert(0); + break; + } - err = ia_css_frame_find_crop_resolution(in_res, out_res, &crop_res); - if (err == IA_CSS_SUCCESS) { - *effective_res = crop_res; - } else { - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("ia_css_frame_find_crop_resolution() failed with err(%d)", err); + err = ia_css_frame_find_crop_resolution(in_res, out_res, &crop_res); + if (err == IA_CSS_SUCCESS) + { + *effective_res = crop_res; + } else + { + /* in case of error fallback to default + * effective resolution from driver. */ + IA_CSS_LOG("ia_css_frame_find_crop_resolution() failed with err(%d)", err); + } + return err; } - return err; -} #endif #endif -static void -sh_css_hmm_buffer_record_init(void) -{ - int i; + static void + sh_css_hmm_buffer_record_init(void) { + int i; #ifndef ISP2401 - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); -#else - if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); - } +#else + if (ia_css_is_system_mode_suspend_or_resume() == + false) { /* skip in suspend/resume flow */ + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); + } #endif + } } -} -static void -sh_css_hmm_buffer_record_uninit(void) -{ - int i; - struct sh_css_hmm_buffer_record *buffer_record = NULL; + static void + sh_css_hmm_buffer_record_uninit(void) { + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; #ifndef ISP2401 - buffer_record = &hmm_buffer_record[0]; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - if (buffer_record->in_use) { - if (buffer_record->h_vbuf) - ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); - sh_css_hmm_buffer_record_reset(buffer_record); -#else - if (ia_css_is_system_mode_suspend_or_resume() == false) { /* skip in suspend/resume flow */ buffer_record = &hmm_buffer_record[0]; for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { if (buffer_record->in_use) { if (buffer_record->h_vbuf) ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); sh_css_hmm_buffer_record_reset(buffer_record); +#else + if (ia_css_is_system_mode_suspend_or_resume() == + false) { /* skip in suspend/resume flow */ + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if (buffer_record->in_use) { + if (buffer_record->h_vbuf) + ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); + sh_css_hmm_buffer_record_reset(buffer_record); + } + buffer_record++; +#endif } +#ifndef ISP2401 buffer_record++; #endif } -#ifndef ISP2401 - buffer_record++; -#endif } -} -static void -sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record) -{ - assert(buffer_record); - buffer_record->in_use = false; - buffer_record->type = IA_CSS_BUFFER_TYPE_INVALID; - buffer_record->h_vbuf = NULL; - buffer_record->kernel_ptr = 0; -} + static void + sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record) { + assert(buffer_record); + buffer_record->in_use = false; + buffer_record->type = IA_CSS_BUFFER_TYPE_INVALID; + buffer_record->h_vbuf = NULL; + buffer_record->kernel_ptr = 0; + } -static struct sh_css_hmm_buffer_record -*sh_css_hmm_buffer_record_acquire(struct ia_css_rmgr_vbuf_handle *h_vbuf, - enum ia_css_buffer_type type, - hrt_address kernel_ptr) -{ - int i; - struct sh_css_hmm_buffer_record *buffer_record = NULL; - struct sh_css_hmm_buffer_record *out_buffer_record = NULL; + static struct sh_css_hmm_buffer_record + *sh_css_hmm_buffer_record_acquire(struct ia_css_rmgr_vbuf_handle *h_vbuf, + enum ia_css_buffer_type type, + hrt_address kernel_ptr) { + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + struct sh_css_hmm_buffer_record *out_buffer_record = NULL; - assert(h_vbuf); - assert((type > IA_CSS_BUFFER_TYPE_INVALID) && (type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)); - assert(kernel_ptr != 0); - - buffer_record = &hmm_buffer_record[0]; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - if (!buffer_record->in_use) { - buffer_record->in_use = true; - buffer_record->type = type; - buffer_record->h_vbuf = h_vbuf; - buffer_record->kernel_ptr = kernel_ptr; - out_buffer_record = buffer_record; - break; + assert(h_vbuf); + assert((type > IA_CSS_BUFFER_TYPE_INVALID) && + (type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)); + assert(kernel_ptr != 0); + + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if (!buffer_record->in_use) { + buffer_record->in_use = true; + buffer_record->type = type; + buffer_record->h_vbuf = h_vbuf; + buffer_record->kernel_ptr = kernel_ptr; + out_buffer_record = buffer_record; + break; + } + buffer_record++; } - buffer_record++; + + return out_buffer_record; } - return out_buffer_record; -} + static struct sh_css_hmm_buffer_record + *sh_css_hmm_buffer_record_validate(hrt_vaddress ddr_buffer_addr, + enum ia_css_buffer_type type) { + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + bool found_record = false; -static struct sh_css_hmm_buffer_record -*sh_css_hmm_buffer_record_validate(hrt_vaddress ddr_buffer_addr, - enum ia_css_buffer_type type) -{ - int i; - struct sh_css_hmm_buffer_record *buffer_record = NULL; - bool found_record = false; - - buffer_record = &hmm_buffer_record[0]; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - if ((buffer_record->in_use) && - (buffer_record->type == type) && - (buffer_record->h_vbuf) && - (buffer_record->h_vbuf->vptr == ddr_buffer_addr)) { - found_record = true; - break; + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if ((buffer_record->in_use) && + (buffer_record->type == type) && + (buffer_record->h_vbuf) && + (buffer_record->h_vbuf->vptr == ddr_buffer_addr)) { + found_record = true; + break; + } + buffer_record++; } - buffer_record++; - } - if (found_record) - return buffer_record; - else - return NULL; -} + if (found_record) + return buffer_record; + else + return NULL; + } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h index 87a6b4a7efdd5..f93272bf0e2a4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h @@ -68,7 +68,7 @@ #define SH_CSS_BDS_FACTOR_5_00 (9) #define SH_CSS_BDS_FACTOR_6_00 (10) #define SH_CSS_BDS_FACTOR_8_00 (11) -#define NUM_BDS_FACTORS (12) +#define NUM_BDS_FACTORS (12) #define PACK_BDS_FACTOR(factor) (1 << (factor)) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c index 2be1d0904336d..7c0216533e661 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c @@ -54,7 +54,8 @@ static struct firmware_header *firmware_header; * which will be replaced with the actual RELEASE_VERSION * during package generation. Please do not modify */ #ifndef ISP2401 -static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); +static const char *release_version = STR( + irci_stable_candrpv_0415_20150521_0458); #else static const char *release_version = STR(irci_ecr - master_20150911_0724); #endif @@ -79,8 +80,8 @@ char *sh_css_get_fw_version(void) /* Setup sp/sp1 binary */ static enum ia_css_err -setup_binary(struct ia_css_fw_info *fw, const char *fw_data, struct ia_css_fw_info *sh_css_fw, unsigned int binary_id) -{ +setup_binary(struct ia_css_fw_info *fw, const char *fw_data, + struct ia_css_fw_info *sh_css_fw, unsigned int binary_id) { const char *blob_data; if ((!fw) || (!fw_data)) @@ -102,8 +103,9 @@ setup_binary(struct ia_css_fw_info *fw, const char *fw_data, struct ia_css_fw_in } enum ia_css_err -sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia_css_blob_descr *bd, unsigned int index) -{ +sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, + struct ia_css_blob_descr *bd, + unsigned int index) { const char *name; const unsigned char *blob; @@ -117,7 +119,8 @@ sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia blob = (const unsigned char *)fw + bi->blob.offset; /* sanity check */ - if (bi->blob.size != bi->blob.text_size + bi->blob.icache_size + bi->blob.data_size + bi->blob.padding_size) { + if (bi->blob.size != bi->blob.text_size + bi->blob.icache_size + bi->blob.data_size + bi->blob.padding_size) + { /* sanity check, note the padding bytes added for section to DDR alignment */ return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -128,23 +131,27 @@ sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia bd->blob = blob; bd->header = *bi; - if (bi->type == ia_css_isp_firmware || bi->type == ia_css_sp_firmware) { + if (bi->type == ia_css_isp_firmware || bi->type == ia_css_sp_firmware) + { char *namebuffer; namebuffer = kstrdup(name, GFP_KERNEL); if (!namebuffer) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; bd->name = fw_minibuffer[index].name = namebuffer; - } else { + } else + { bd->name = name; } - if (bi->type == ia_css_isp_firmware) { + if (bi->type == ia_css_isp_firmware) + { size_t paramstruct_size = sizeof(struct ia_css_memory_offsets); size_t configstruct_size = sizeof(struct ia_css_config_memory_offsets); size_t statestruct_size = sizeof(struct ia_css_state_memory_offsets); - char *parambuf = kmalloc(paramstruct_size + configstruct_size + statestruct_size, + char *parambuf = kmalloc(paramstruct_size + configstruct_size + + statestruct_size, GFP_KERNEL); if (!parambuf) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -156,21 +163,24 @@ sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia fw_minibuffer[index].buffer = parambuf; /* copy ia_css_memory_offsets */ - memcpy(parambuf, (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_PARAM]), - paramstruct_size); + memcpy(parambuf, (void *)(fw + + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_PARAM]), + paramstruct_size); bd->mem_offsets.array[IA_CSS_PARAM_CLASS_PARAM].ptr = parambuf; /* copy ia_css_config_memory_offsets */ memcpy(parambuf + paramstruct_size, - (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_CONFIG]), - configstruct_size); - bd->mem_offsets.array[IA_CSS_PARAM_CLASS_CONFIG].ptr = parambuf + paramstruct_size; + (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_CONFIG]), + configstruct_size); + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_CONFIG].ptr = parambuf + + paramstruct_size; /* copy ia_css_state_memory_offsets */ memcpy(parambuf + paramstruct_size + configstruct_size, - (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_STATE]), - statestruct_size); - bd->mem_offsets.array[IA_CSS_PARAM_CLASS_STATE].ptr = parambuf + paramstruct_size + configstruct_size; + (void *)(fw + bi->blob.memory_offsets.offsets[IA_CSS_PARAM_CLASS_STATE]), + statestruct_size); + bd->mem_offsets.array[IA_CSS_PARAM_CLASS_STATE].ptr = parambuf + + paramstruct_size + configstruct_size; } return IA_CSS_SUCCESS; } @@ -193,8 +203,7 @@ sh_css_check_firmware_version(const char *fw_data) enum ia_css_err sh_css_load_firmware(const char *fw_data, - unsigned int fw_size) -{ + unsigned int fw_size) { unsigned int i; struct ia_css_fw_info *binaries; struct sh_css_fw_bi_file_h *file_header; @@ -205,13 +214,15 @@ sh_css_load_firmware(const char *fw_data, binaries = &firmware_header->binary_header; strncpy(FW_rel_ver_name, file_header->version, min(sizeof(FW_rel_ver_name), sizeof(file_header->version)) - 1); valid_firmware = sh_css_check_firmware_version(fw_data); - if (!valid_firmware) { + if (!valid_firmware) + { #if !defined(HRT_RTL) IA_CSS_ERROR("CSS code version (%s) and firmware version (%s) mismatch!", - file_header->version, release_version); + file_header->version, release_version); return IA_CSS_ERR_VERSION_MISMATCH; #endif - } else { + } else + { IA_CSS_LOG("successfully load firmware version %s", release_version); } @@ -224,13 +235,15 @@ sh_css_load_firmware(const char *fw_data, sh_css_num_binaries = file_header->binary_nr; /* Only allocate memory for ISP blob info */ - if (sh_css_num_binaries > NUM_OF_SPS) { + if (sh_css_num_binaries > NUM_OF_SPS) + { sh_css_blob_info = kmalloc( - (sh_css_num_binaries - NUM_OF_SPS) * - sizeof(*sh_css_blob_info), GFP_KERNEL); + (sh_css_num_binaries - NUM_OF_SPS) * + sizeof(*sh_css_blob_info), GFP_KERNEL); if (!sh_css_blob_info) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - } else { + } else + { sh_css_blob_info = NULL; } @@ -239,7 +252,8 @@ sh_css_load_firmware(const char *fw_data, if (!fw_minibuffer) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - for (i = 0; i < sh_css_num_binaries; i++) { + for (i = 0; i < sh_css_num_binaries; i++) + { struct ia_css_fw_info *bi = &binaries[i]; /* note: the var below is made static as it is quite large; if it is not static it ends up on the stack which could diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h index 55d94f268b2a3..090758d6f00ad 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h @@ -49,6 +49,7 @@ void sh_css_unload_firmware(void); hrt_vaddress sh_css_load_blob(const unsigned char *blob, unsigned int size); enum ia_css_err -sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, struct ia_css_blob_descr *bd, unsigned int i); +sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, + struct ia_css_blob_descr *bd, unsigned int i); #endif /* _SH_CSS_FIRMWARE_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c index fb4598341408c..94b2de5b5ef4b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c @@ -75,9 +75,9 @@ enum ia_css_err sh_css_hrt_sp_wait(void) * (e.g. frame_done) */ while (!sp_ctrl_getbit(SP0_ID, SP_SC_REG, SP_IDLE_BIT) && - ((irq_reg_load(IRQ0_ID, - _HRT_IRQ_CONTROLLER_STATUS_REG_IDX) & - (1U << (irq_id + IRQ_SW_CHANNEL_OFFSET))) == 0)) { + ((irq_reg_load(IRQ0_ID, + _HRT_IRQ_CONTROLLER_STATUS_REG_IDX) & + (1U << (irq_id + IRQ_SW_CHANNEL_OFFSET))) == 0)) { hrt_sleep(); } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h index 5daa0e1660edc..244111aad6961 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h @@ -101,14 +101,14 @@ #define SH_CSS_ENABLE_METADATA_THREAD #endif - /* - * SH_CSS_MAX_SP_THREADS: - * sp threads visible to host with connected communication queues - * these threads are capable of running an image pipe - * SH_CSS_MAX_SP_INTERNAL_THREADS: - * internal sp service threads, no communication queues to host - * these threads can't be used as image pipe - */ +/* + * SH_CSS_MAX_SP_THREADS: + * sp threads visible to host with connected communication queues + * these threads are capable of running an image pipe + * SH_CSS_MAX_SP_INTERNAL_THREADS: + * internal sp service threads, no communication queues to host + * these threads can't be used as image pipe + */ #if defined(SH_CSS_ENABLE_METADATA_THREAD) #define SH_CSS_SP_INTERNAL_METADATA_THREAD 1 @@ -119,9 +119,9 @@ #define SH_CSS_SP_INTERNAL_SERVICE_THREAD 1 #ifdef __DISABLE_UNUSED_THREAD__ - #define SH_CSS_MAX_SP_THREADS 0 +#define SH_CSS_MAX_SP_THREADS 0 #else - #define SH_CSS_MAX_SP_THREADS 5 +#define SH_CSS_MAX_SP_THREADS 5 #endif #define SH_CSS_MAX_SP_INTERNAL_THREADS (\ @@ -161,10 +161,10 @@ enum sh_css_order_binaries { ISP_FIRMWARE }; - /* - * JB: keep next enum in sync with thread id's - * and pipe id's - */ +/* +* JB: keep next enum in sync with thread id's +* and pipe id's +*/ enum sh_css_pipe_config_override { SH_CSS_PIPE_CONFIG_OVRD_NONE = 0, SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD = 0xffff @@ -274,23 +274,28 @@ struct sh_css_ddr_address_map_compound { }; struct ia_css_isp_parameter_set_info { - struct sh_css_ddr_address_map mem_map;/** pointers to Parameters in ISP format IMPT: + struct sh_css_ddr_address_map + mem_map;/** pointers to Parameters in ISP format IMPT: This should be first member of this struct */ - u32 isp_parameters_id;/** Unique ID to track which config was actually applied to a particular frame */ - ia_css_ptr output_frame_ptr;/** Output frame to which this config has to be applied (optional) */ + u32 + isp_parameters_id;/** Unique ID to track which config was actually applied to a particular frame */ + ia_css_ptr + output_frame_ptr;/** Output frame to which this config has to be applied (optional) */ }; /* this struct contains all arguments that can be passed to a binary. It depends on the binary which ones are used. */ struct sh_css_binary_args { struct ia_css_frame *in_frame; /* input frame */ - struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ + struct ia_css_frame + *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ #ifndef ISP2401 struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; /* tnr frames */ #else struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ #endif - struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ + struct ia_css_frame + *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ struct ia_css_frame *out_vf_frame; /* viewfinder output frame */ bool copy_vf; bool copy_output; @@ -408,7 +413,8 @@ struct sh_css_sp_config { u8 a_changed; u8 b_changed; u8 isp_2ppc; - struct sh_css_sp_input_formatter_set set[SH_CSS_MAX_IF_CONFIGS]; /* CSI-2 port is used as index. */ + struct sh_css_sp_input_formatter_set + set[SH_CSS_MAX_IF_CONFIGS]; /* CSI-2 port is used as index. */ } input_formatter; #endif #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) @@ -440,7 +446,8 @@ enum sh_css_stage_type { struct sh_css_sp_pipeline_terminal { union { /* Input System 2401 */ - virtual_input_system_stream_t virtual_input_system_stream[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; + virtual_input_system_stream_t + virtual_input_system_stream[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; } context; /* * TODO @@ -448,7 +455,8 @@ struct sh_css_sp_pipeline_terminal { */ union { /* Input System 2401 */ - virtual_input_system_stream_cfg_t virtual_input_system_stream_cfg[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; + virtual_input_system_stream_cfg_t + virtual_input_system_stream_cfg[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; } ctrl; }; @@ -508,7 +516,8 @@ enum sh_css_port_type { * This function frees an array of metadata buffers. */ void -ia_css_metadata_free_multiple(unsigned int num_bufs, struct ia_css_metadata **bufs); +ia_css_metadata_free_multiple(unsigned int num_bufs, + struct ia_css_metadata **bufs); /* Macro for handling pipe_qos_config */ #define QOS_INVALID (~0U) @@ -639,13 +648,13 @@ struct sh_css_sp_stage { u8 isp_deci_log_factor; u8 isp_vf_downscale_bits; u8 deinterleaved; -/* - * NOTE: Programming the input circuit can only be done at the - * start of a session. It is illegal to program it during execution - * The input circuit defines the connectivity - */ + /* + * NOTE: Programming the input circuit can only be done at the + * start of a session. It is illegal to program it during execution + * The input circuit defines the connectivity + */ u8 program_input_circuit; -/* enum ia_css_pipeline_stage_sp_func func; */ + /* enum ia_css_pipeline_stage_sp_func func; */ u8 func; /* The type of the pipe-stage */ /* enum sh_css_stage_type stage_type; */ @@ -782,8 +791,11 @@ struct sh_css_hmm_buffer { CSS_ALIGN(u64 cookie_ptr, 8); /* TODO: check if this alignment is needed */ u64 kernel_ptr; #else - CSS_ALIGN(struct { u32 a[2]; } cookie_ptr, 8); /* TODO: check if this alignment is needed */ - struct { u32 a[2]; } kernel_ptr; + CSS_ALIGN(struct { u32 a[2]; } cookie_ptr, + 8); /* TODO: check if this alignment is needed */ + struct { + u32 a[2]; + } kernel_ptr; #endif struct ia_css_time_meas timing_data; clock_value_t isys_eof_clock_tick; @@ -893,14 +905,14 @@ struct host_sp_queues { * buffer and the "vf_out_frame" buffer. */ ia_css_circbuf_desc_t host2sp_buffer_queues_desc - [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; ia_css_circbuf_elem_t host2sp_buffer_queues_elems - [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES] - [IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE]; + [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES] + [IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE]; ia_css_circbuf_desc_t sp2host_buffer_queues_desc - [SH_CSS_MAX_NUM_QUEUES]; + [SH_CSS_MAX_NUM_QUEUES]; ia_css_circbuf_elem_t sp2host_buffer_queues_elems - [SH_CSS_MAX_NUM_QUEUES][IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE]; + [SH_CSS_MAX_NUM_QUEUES][IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE]; /* * The queues for the events. @@ -908,11 +920,11 @@ struct host_sp_queues { ia_css_circbuf_desc_t host2sp_psys_event_queue_desc; ia_css_circbuf_elem_t host2sp_psys_event_queue_elems - [IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE]; + [IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE]; ia_css_circbuf_desc_t sp2host_psys_event_queue_desc; ia_css_circbuf_elem_t sp2host_psys_event_queue_elems - [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE]; + [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE]; #if !defined(HAS_NO_INPUT_SYSTEM) /* @@ -921,11 +933,11 @@ struct host_sp_queues { ia_css_circbuf_desc_t host2sp_isys_event_queue_desc; ia_css_circbuf_elem_t host2sp_isys_event_queue_elems - [IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE]; + [IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE]; ia_css_circbuf_desc_t sp2host_isys_event_queue_desc; ia_css_circbuf_elem_t sp2host_isys_event_queue_elems - [IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE]; + [IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE]; /* * The queue for the tagger commands. * CHECK: are these last two present on the 2401 ? @@ -933,7 +945,7 @@ struct host_sp_queues { ia_css_circbuf_desc_t host2sp_tag_cmd_queue_desc; ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems - [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE]; + [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE]; #endif }; @@ -1039,7 +1051,8 @@ sh_css_frame_info_set_width(struct ia_css_frame_info *info, #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) unsigned int -sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx); +sh_css_get_mipi_sizes_for_check(const unsigned int port, + const unsigned int idx); #endif @@ -1054,17 +1067,17 @@ sh_css_store_isp_stage_to_ddr(unsigned int pipe, unsigned int stage); void sh_css_update_uds_and_crop_info( - const struct ia_css_binary_info *info, - const struct ia_css_frame_info *in_frame_info, - const struct ia_css_frame_info *out_frame_info, - const struct ia_css_resolution *dvs_env, - const struct ia_css_dz_config *zoom, - const struct ia_css_vector *motion_vector, - struct sh_css_uds_info *uds, /* out */ - struct sh_css_crop_pos *sp_out_crop_pos, /* out */ - - bool enable_zoom - ); + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + + bool enable_zoom +); void sh_css_invalidate_shading_tables(struct ia_css_stream *stream); @@ -1087,8 +1100,8 @@ find_pipe_by_num(uint32_t pipe_num); #ifdef USE_INPUT_SYSTEM_VERSION_2401 void ia_css_get_crop_offsets( - struct ia_css_pipe *pipe, - struct ia_css_frame_info *in_frame); + struct ia_css_pipe *pipe, + struct ia_css_frame_info *in_frame); #endif #endif /* !defined(__ISP) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h index eeb0b44c93058..110b2912042c5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h @@ -59,7 +59,8 @@ ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, struct ia_css_pipe **pipe); void -ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config *extra_config); +ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config + *extra_config); enum ia_css_err ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe, @@ -68,7 +69,7 @@ ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe, /* DEPRECATED. FPN is not supported. */ enum ia_css_err sh_css_set_black_frame(struct ia_css_stream *stream, - const struct ia_css_frame *raw_black_frame); + const struct ia_css_frame *raw_black_frame); #ifndef ISP2401 void diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c index 4a640eb36271a..17f6dd9afab4e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c @@ -83,7 +83,7 @@ make_histogram(struct sh_css_pc_histogram *histogram, unsigned int length) static void insert_binary_metrics(struct sh_css_binary_metrics **l, - struct sh_css_binary_metrics *metrics) + struct sh_css_binary_metrics *metrics) { assert(l); assert(*l); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c index 2713fc042dcd4..ef9360d72b04e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c @@ -30,13 +30,13 @@ #include "sw_event_global.h" /* IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY */ #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) -static u32 ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */ +static u32 +ref_count_mipi_allocation[N_CSI_PORTS]; /* Initialized in mipi_init */ #endif enum ia_css_err ia_css_mipi_frame_specify(const unsigned int size_mem_words, - const bool contiguous) -{ + const bool contiguous) { enum ia_css_err err = IA_CSS_SUCCESS; my_css.size_mem_words = size_mem_words; @@ -51,7 +51,7 @@ ia_css_mipi_frame_specify(const unsigned int size_mem_words, * Check if a source port or TPG/PRBS ID is valid */ static bool ia_css_mipi_is_source_port_valid(struct ia_css_pipe *pipe, - unsigned int *pport) + unsigned int *pport) { bool ret = true; unsigned int port = 0; @@ -103,12 +103,11 @@ static bool ia_css_mipi_is_source_port_valid(struct ia_css_pipe *pipe, */ enum ia_css_err ia_css_mipi_frame_calculate_size(const unsigned int width, - const unsigned int height, - const enum atomisp_input_format format, - const bool hasSOLandEOL, - const unsigned int embedded_data_size_words, - unsigned int *size_mem_words) -{ + const unsigned int height, + const enum atomisp_input_format format, + const bool hasSOLandEOL, + const unsigned int embedded_data_size_words, + unsigned int *size_mem_words) { enum ia_css_err err = IA_CSS_SUCCESS; unsigned int bits_per_pixel = 0; @@ -135,15 +134,19 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, IA_CSS_ENTER("padded_width=%d, height=%d, format=%d, hasSOLandEOL=%d, embedded_data_size_words=%d\n", width_padded, height, format, hasSOLandEOL, embedded_data_size_words); - switch (format) { + switch (format) + { case ATOMISP_INPUT_FORMAT_RAW_6: /* 4p, 3B, 24bits */ - bits_per_pixel = 6; break; + bits_per_pixel = 6; + break; case ATOMISP_INPUT_FORMAT_RAW_7: /* 8p, 7B, 56bits */ - bits_per_pixel = 7; break; + bits_per_pixel = 7; + break; case ATOMISP_INPUT_FORMAT_RAW_8: /* 1p, 1B, 8bits */ case ATOMISP_INPUT_FORMAT_BINARY_8: /* 8bits, TODO: check. */ case ATOMISP_INPUT_FORMAT_YUV420_8: /* odd 2p, 2B, 16bits, even 2p, 4B, 32bits */ - bits_per_pixel = 8; break; + bits_per_pixel = 8; + break; case ATOMISP_INPUT_FORMAT_YUV420_10: /* odd 4p, 5B, 40bits, even 4p, 10B, 80bits */ case ATOMISP_INPUT_FORMAT_RAW_10: /* 4p, 5B, 40bits */ #if !defined(HAS_NO_PACKED_RAW_PIXELS) @@ -158,20 +161,26 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, break; case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: /* 2p, 3B, 24bits */ case ATOMISP_INPUT_FORMAT_RAW_12: /* 2p, 3B, 24bits */ - bits_per_pixel = 12; break; + bits_per_pixel = 12; + break; case ATOMISP_INPUT_FORMAT_RAW_14: /* 4p, 7B, 56bits */ - bits_per_pixel = 14; break; + bits_per_pixel = 14; + break; case ATOMISP_INPUT_FORMAT_RGB_444: /* 1p, 2B, 16bits */ case ATOMISP_INPUT_FORMAT_RGB_555: /* 1p, 2B, 16bits */ case ATOMISP_INPUT_FORMAT_RGB_565: /* 1p, 2B, 16bits */ case ATOMISP_INPUT_FORMAT_YUV422_8: /* 2p, 4B, 32bits */ - bits_per_pixel = 16; break; + bits_per_pixel = 16; + break; case ATOMISP_INPUT_FORMAT_RGB_666: /* 4p, 9B, 72bits */ - bits_per_pixel = 18; break; + bits_per_pixel = 18; + break; case ATOMISP_INPUT_FORMAT_YUV422_10: /* 2p, 5B, 40bits */ - bits_per_pixel = 20; break; + bits_per_pixel = 20; + break; case ATOMISP_INPUT_FORMAT_RGB_888: /* 1p, 3B, 24bits */ - bits_per_pixel = 24; break; + bits_per_pixel = 24; + break; case ATOMISP_INPUT_FORMAT_YUV420_16: /* Not supported */ case ATOMISP_INPUT_FORMAT_YUV422_16: /* Not supported */ @@ -184,14 +193,17 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, /* Even lines for YUV420 formats are double in bits_per_pixel. */ if (format == ATOMISP_INPUT_FORMAT_YUV420_8 - || format == ATOMISP_INPUT_FORMAT_YUV420_10 - || format == ATOMISP_INPUT_FORMAT_YUV420_16) { - even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */ - } else { + || format == ATOMISP_INPUT_FORMAT_YUV420_10 + || format == ATOMISP_INPUT_FORMAT_YUV420_16) + { + even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >> + 3; /* ceil ( bits per line / 8) */ + } else + { even_line_bytes = odd_line_bytes; } - /* a frame represented in memory: ()- optional; data - payload words. + /* a frame represented in memory: ()- optional; data - payload words. * addr 0 1 2 3 4 5 6 7: * first SOF (SOL) PACK_H data data data data data * data data data data data data data data @@ -209,26 +221,26 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, */ words_per_odd_line = (odd_line_bytes + 3) >> 2; - /* ceil(odd_line_bytes/4); word = 4 bytes */ + /* ceil(odd_line_bytes/4); word = 4 bytes */ words_per_even_line = (even_line_bytes + 3) >> 2; words_for_first_line = words_per_odd_line + 2 + (hasSOLandEOL ? 1 : 0); - /* + SOF +packet header + optionally (SOL), but (EOL) is not in the first line */ + /* + SOF +packet header + optionally (SOL), but (EOL) is not in the first line */ words_per_odd_line += (1 + (hasSOLandEOL ? 2 : 0)); - /* each non-first line has format header, and optionally (SOL) and (EOL). */ + /* each non-first line has format header, and optionally (SOL) and (EOL). */ words_per_even_line += (1 + (hasSOLandEOL ? 2 : 0)); mem_words_per_odd_line = (words_per_odd_line + 7) >> 3; - /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */ + /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */ mem_words_for_first_line = (words_for_first_line + 7) >> 3; mem_words_per_even_line = (words_per_even_line + 7) >> 3; mem_words_for_EOF = 1; /* last line consisit of the optional (EOL) and EOF */ mem_words = ((embedded_data_size_words + 7) >> 3) + - mem_words_for_first_line + - (((height + 1) >> 1) - 1) * mem_words_per_odd_line + - /* ceil (height/2) - 1 (first line is calculated separatelly) */ - (height >> 1) * mem_words_per_even_line + /* floor(height/2) */ - mem_words_for_EOF; + mem_words_for_first_line + + (((height + 1) >> 1) - 1) * mem_words_per_odd_line + + /* ceil (height/2) - 1 (first line is calculated separatelly) */ + (height >> 1) * mem_words_per_even_line + /* floor(height/2) */ + mem_words_for_EOF; *size_mem_words = mem_words; /* ceil(words/8); mem word is 32B = 8words. */ /* Check if the above is still needed. */ @@ -240,8 +252,7 @@ ia_css_mipi_frame_calculate_size(const unsigned int width, #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) enum ia_css_err ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, - const unsigned int size_mem_words) -{ + const unsigned int size_mem_words) { u32 idx; enum ia_css_err err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; @@ -250,10 +261,12 @@ ia_css_mipi_frame_enable_check_on_size(const enum mipi_port_id port, OP___assert(size_mem_words != 0); for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT && - my_css.mipi_sizes_for_check[port][idx] != 0; - idx++) { /* do nothing */ + my_css.mipi_sizes_for_check[port][idx] != 0; + idx++) /* do nothing */ + { } - if (idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT) { + if (idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT) + { my_css.mipi_sizes_for_check[port][idx] = size_mem_words; err = IA_CSS_SUCCESS; } @@ -275,9 +288,8 @@ mipi_init(void) enum ia_css_err calculate_mipi_buff_size( - struct ia_css_stream_config *stream_cfg, - unsigned int *size_mem_words) -{ + struct ia_css_stream_config *stream_cfg, + unsigned int *size_mem_words) { #if !defined(USE_INPUT_SYSTEM_VERSION_2401) enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; (void)stream_cfg; @@ -348,7 +360,7 @@ calculate_mipi_buff_size( bits_per_pixel = sh_css_stream_format_2_bits_per_subpixel(format); bits_per_pixel = - (format == ATOMISP_INPUT_FORMAT_RAW_10 && pack_raw_pixels) ? bits_per_pixel : 16; + (format == ATOMISP_INPUT_FORMAT_RAW_10 && pack_raw_pixels) ? bits_per_pixel : 16; if (bits_per_pixel == 0) return IA_CSS_ERR_INTERNAL_ERROR; @@ -356,22 +368,25 @@ calculate_mipi_buff_size( /* Even lines for YUV420 formats are double in bits_per_pixel. */ if (format == ATOMISP_INPUT_FORMAT_YUV420_8 - || format == ATOMISP_INPUT_FORMAT_YUV420_10) { - even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >> 3; /* ceil ( bits per line / 8) */ - } else { + || format == ATOMISP_INPUT_FORMAT_YUV420_10) + { + even_line_bytes = (width_padded * 2 * bits_per_pixel + 7) >> + 3; /* ceil ( bits per line / 8) */ + } else + { even_line_bytes = odd_line_bytes; } words_per_odd_line = (odd_line_bytes + 3) >> 2; - /* ceil(odd_line_bytes/4); word = 4 bytes */ + /* ceil(odd_line_bytes/4); word = 4 bytes */ words_per_even_line = (even_line_bytes + 3) >> 2; mem_words_per_odd_line = (words_per_odd_line + 7) >> 3; - /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */ + /* ceil(words_per_odd_line/8); mem_word = 32 bytes, 8 words */ mem_words_per_even_line = (words_per_even_line + 7) >> 3; mem_words_per_buff_line = - (mem_words_per_odd_line > mem_words_per_even_line) ? mem_words_per_odd_line : mem_words_per_even_line; + (mem_words_per_odd_line > mem_words_per_even_line) ? mem_words_per_odd_line : mem_words_per_even_line; mem_words_per_buff = mem_words_per_buff_line * height; *size_mem_words = mem_words_per_buff; @@ -382,8 +397,8 @@ calculate_mipi_buff_size( } enum ia_css_err -allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) -{ +allocate_mipi_frames(struct ia_css_pipe *pipe, + struct ia_css_stream_info *info) { #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; #ifndef ISP2401 @@ -394,63 +409,70 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) struct ia_css_frame_info mipi_intermediate_info; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) enter:\n", pipe); + "allocate_mipi_frames(%p) enter:\n", pipe); assert(pipe); assert(pipe->stream); - if ((!pipe) || (!pipe->stream)) { + if ((!pipe) || (!pipe->stream)) + { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: pipe or stream is null.\n", - pipe); + "allocate_mipi_frames(%p) exit: pipe or stream is null.\n", + pipe); return IA_CSS_ERR_INVALID_ARGUMENTS; } #ifdef USE_INPUT_SYSTEM_VERSION_2401 - if (pipe->stream->config.online) { + if (pipe->stream->config.online) + { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: no buffers needed for 2401 pipe mode.\n", - pipe); + "allocate_mipi_frames(%p) exit: no buffers needed for 2401 pipe mode.\n", + pipe); return IA_CSS_SUCCESS; } #endif #ifndef ISP2401 - if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { #else if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { + pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) + { #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: no buffers needed for pipe mode.\n", - pipe); + "allocate_mipi_frames(%p) exit: no buffers needed for pipe mode.\n", + pipe); return IA_CSS_SUCCESS; /* AM TODO: Check */ } #ifndef ISP2401 port = (unsigned int)pipe->stream->config.source.port.port; assert(port < N_CSI_PORTS); - if (port >= N_CSI_PORTS) { + if (port >= N_CSI_PORTS) + { #else - if (!ia_css_mipi_is_source_port_valid(pipe, &port)) { + if (!ia_css_mipi_is_source_port_valid(pipe, &port)) + { #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: error: port is not correct (port=%d).\n", - pipe, port); + "allocate_mipi_frames(%p) exit: error: port is not correct (port=%d).\n", + pipe, port); return IA_CSS_ERR_INTERNAL_ERROR; } #ifdef USE_INPUT_SYSTEM_VERSION_2401 err = calculate_mipi_buff_size( - &pipe->stream->config, - &my_css.mipi_frame_size[port]); + &pipe->stream->config, + &my_css.mipi_frame_size[port]); #endif #if defined(USE_INPUT_SYSTEM_VERSION_2) - if (ref_count_mipi_allocation[port] != 0) { + if (ref_count_mipi_allocation[port] != 0) + { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit: already allocated for this port (port=%d).\n", - pipe, port); + "allocate_mipi_frames(%p) exit: already allocated for this port (port=%d).\n", + pipe, port); return IA_CSS_SUCCESS; } #else @@ -459,11 +481,12 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) * TODO AM: Once that is changed (removed) this code should be removed as well. * In that case only 2400 related code should remain. */ - if (ref_count_mipi_allocation[port] != 0) { + if (ref_count_mipi_allocation[port] != 0) + { ref_count_mipi_allocation[port]++; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) leave: nothing to do, already allocated for this port (port=%d).\n", - pipe, port); + "allocate_mipi_frames(%p) leave: nothing to do, already allocated for this port (port=%d).\n", + pipe, port); return IA_CSS_SUCCESS; } #endif @@ -488,7 +511,8 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) { /* limit the scope of i,j */ unsigned int i, j; - for (i = 0; i < my_css.num_mipi_frames[port]; i++) { + for (i = 0; i < my_css.num_mipi_frames[port]; i++) + { /* free previous frame */ if (my_css.mipi_frames[port][i]) { ia_css_frame_free(my_css.mipi_frames[port][i]); @@ -498,9 +522,9 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) if (i < my_css.num_mipi_frames[port]) { /* allocate new frame */ err = ia_css_frame_allocate_with_buffer_size( - &my_css.mipi_frames[port][i], - my_css.mipi_frame_size[port] * HIVE_ISP_DDR_WORD_BYTES, - false); + &my_css.mipi_frames[port][i], + my_css.mipi_frame_size[port] * HIVE_ISP_DDR_WORD_BYTES, + false); if (err != IA_CSS_SUCCESS) { for (j = 0; j < i; j++) { if (my_css.mipi_frames[port][j]) { @@ -509,8 +533,8 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) } } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p, %d) exit: error: allocation failed.\n", - pipe, port); + "allocate_mipi_frames(%p, %d) exit: error: allocation failed.\n", + pipe, port); return err; } } @@ -526,8 +550,8 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) my_css.mipi_metadata[port][i] = ia_css_metadata_allocate(&info->metadata_info); if (!my_css.mipi_metadata[port][i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_metadata(%p, %d) failed.\n", - pipe, port); + "allocate_mipi_metadata(%p, %d) failed.\n", + pipe, port); return err; } } @@ -535,7 +559,7 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) } } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "allocate_mipi_frames(%p) exit:\n", pipe); + "allocate_mipi_frames(%p) exit:\n", pipe); return err; #else @@ -546,8 +570,7 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) } enum ia_css_err -free_mipi_frames(struct ia_css_pipe *pipe) -{ +free_mipi_frames(struct ia_css_pipe *pipe) { #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; #ifndef ISP2401 @@ -556,15 +579,16 @@ free_mipi_frames(struct ia_css_pipe *pipe) unsigned int port = 0; #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) enter:\n", pipe); + "free_mipi_frames(%p) enter:\n", pipe); /* assert(pipe != NULL); TEMP: TODO: Should be assert only. */ - if (pipe) { + if (pipe) + { assert(pipe->stream); if ((!pipe) || (!pipe->stream)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: pipe or stream is null.\n", - pipe); + "free_mipi_frames(%p) exit: error: pipe or stream is null.\n", + pipe); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -572,12 +596,12 @@ free_mipi_frames(struct ia_css_pipe *pipe) if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { #else if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { + pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: wrong mode.\n", - pipe); + "free_mipi_frames(%p) exit: error: wrong mode.\n", + pipe); return err; } @@ -590,11 +614,11 @@ free_mipi_frames(struct ia_css_pipe *pipe) #endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, #ifndef ISP2401 - "free_mipi_frames(%p, %d) exit: error: pipe port is not correct.\n", + "free_mipi_frames(%p, %d) exit: error: pipe port is not correct.\n", #else - "free_mipi_frames(%p) exit: error: pipe port is not correct (port=%d).\n", + "free_mipi_frames(%p) exit: error: pipe port is not correct (port=%d).\n", #endif - pipe, port); + pipe, port); return err; } #ifdef ISP2401 @@ -605,8 +629,8 @@ free_mipi_frames(struct ia_css_pipe *pipe) assert(ref_count_mipi_allocation[port] == 1); if (ref_count_mipi_allocation[port] != 1) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit: error: wrong ref_count (ref_count=%d).\n", - pipe, ref_count_mipi_allocation[port]); + "free_mipi_frames(%p) exit: error: wrong ref_count (ref_count=%d).\n", + pipe, ref_count_mipi_allocation[port]); return err; } #endif @@ -620,7 +644,7 @@ free_mipi_frames(struct ia_css_pipe *pipe) for (i = 0; i < my_css.num_mipi_frames[port]; i++) { if (my_css.mipi_frames[port][i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(port=%d, num=%d).\n", port, i); + "free_mipi_frames(port=%d, num=%d).\n", port, i); ia_css_frame_free(my_css.mipi_frames[port][i]); my_css.mipi_frames[port][i] = NULL; } @@ -631,7 +655,7 @@ free_mipi_frames(struct ia_css_pipe *pipe) } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) exit (deallocated).\n", pipe); + "free_mipi_frames(%p) exit (deallocated).\n", pipe); } #if defined(USE_INPUT_SYSTEM_VERSION_2401) else { @@ -641,12 +665,13 @@ free_mipi_frames(struct ia_css_pipe *pipe) * In that case only 2400 related code should remain. */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(%p) leave: nothing to do, other streams still use this port (port=%d).\n", - pipe, port); + "free_mipi_frames(%p) leave: nothing to do, other streams still use this port (port=%d).\n", + pipe, port); } #endif } - } else { /* pipe ==NULL */ + } else /* pipe ==NULL */ + { /* AM TEMP: free-ing all mipi buffers just like a legacy code. */ for (port = CSI_PORT0_ID; port < N_CSI_PORTS; port++) { unsigned int i; @@ -654,7 +679,7 @@ free_mipi_frames(struct ia_css_pipe *pipe) for (i = 0; i < my_css.num_mipi_frames[port]; i++) { if (my_css.mipi_frames[port][i]) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "free_mipi_frames(port=%d, num=%d).\n", port, i); + "free_mipi_frames(port=%d, num=%d).\n", port, i); ia_css_frame_free(my_css.mipi_frames[port][i]); my_css.mipi_frames[port][i] = NULL; } @@ -673,8 +698,7 @@ free_mipi_frames(struct ia_css_pipe *pipe) } enum ia_css_err -send_mipi_frames(struct ia_css_pipe *pipe) -{ +send_mipi_frames(struct ia_css_pipe *pipe) { #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; unsigned int i; @@ -688,7 +712,8 @@ send_mipi_frames(struct ia_css_pipe *pipe) assert(pipe); assert(pipe->stream); - if (!pipe || !pipe->stream) { + if (!pipe || !pipe->stream) + { IA_CSS_ERROR("pipe or stream is null"); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -696,11 +721,13 @@ send_mipi_frames(struct ia_css_pipe *pipe) /* multi stream video needs mipi buffers */ /* nothing to be done in other cases. */ #ifndef ISP2401 - if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { #else if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { + pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) + { #endif IA_CSS_LOG("nothing to be done for this mode"); return IA_CSS_SUCCESS; @@ -710,22 +737,26 @@ send_mipi_frames(struct ia_css_pipe *pipe) #ifndef ISP2401 port = (unsigned int)pipe->stream->config.source.port.port; assert(port < N_CSI_PORTS); - if (port >= N_CSI_PORTS) { + if (port >= N_CSI_PORTS) + { IA_CSS_ERROR("invalid port specified (%d)", port); #else - if (!ia_css_mipi_is_source_port_valid(pipe, &port)) { - IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).\n", pipe, port); + if (!ia_css_mipi_is_source_port_valid(pipe, &port)) + { + IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).\n", + pipe, port); #endif return err; } /* Hand-over the SP-internal mipi buffers */ - for (i = 0; i < my_css.num_mipi_frames[port]; i++) { + for (i = 0; i < my_css.num_mipi_frames[port]; i++) + { /* Need to include the ofset for port. */ sh_css_update_host2sp_mipi_frame(port * NUM_MIPI_FRAMES_PER_STREAM + i, - my_css.mipi_frames[port][i]); + my_css.mipi_frames[port][i]); sh_css_update_host2sp_mipi_metadata(port * NUM_MIPI_FRAMES_PER_STREAM + i, - my_css.mipi_metadata[port][i]); + my_css.mipi_metadata[port][i]); } sh_css_update_host2sp_num_mipi_frames(my_css.num_mipi_frames[port]); @@ -733,17 +764,18 @@ send_mipi_frames(struct ia_css_pipe *pipe) * Send an event to inform the SP * that all MIPI frames are passed. **********************************/ - if (!sh_css_sp_is_running()) { + if (!sh_css_sp_is_running()) + { /* SP is not running. The queues are not valid */ IA_CSS_ERROR("sp is not running"); return err; } ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY, - (uint8_t)port, - (uint8_t)my_css.num_mipi_frames[port], - 0 /* not used */); + IA_CSS_PSYS_SW_EVENT_MIPI_BUFFERS_READY, + (uint8_t)port, + (uint8_t)my_css.num_mipi_frames[port], + 0 /* not used */); IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); #else (void)pipe; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h index 990f678422fd2..ab38589d64573 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h @@ -43,7 +43,7 @@ send_mipi_frames(struct ia_css_pipe *pipe); */ enum ia_css_err calculate_mipi_buff_size( - struct ia_css_stream_config *stream_cfg, - unsigned int *size_mem_words); + struct ia_css_stream_config *stream_cfg, + unsigned int *size_mem_words); #endif /* __SH_CSS_MIPI_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c index ccd5bd4c965e0..179b6f40be494 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c @@ -26,7 +26,8 @@ ia_css_mmu_invalidate_cache(void) const struct ia_css_fw_info *fw = &sh_css_sp_fw; unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_mmu_invalidate_cache() enter\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_mmu_invalidate_cache() enter\n"); /* if the SP is not running we should not access its dmem */ if (sh_css_sp_is_running()) { @@ -35,10 +36,11 @@ ia_css_mmu_invalidate_cache(void) (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; /* Suppres warnings in CRUN */ sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), - true); + (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), + true); } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_mmu_invalidate_cache() leave\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_mmu_invalidate_cache() leave\n"); } /* Deprecated, this is an HRT backend function (memory_access.h) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c index 0b92f7b0746da..52e29161cb355 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c @@ -21,7 +21,8 @@ #include "memory_access.h" static struct ia_css_dvs_6axis_config * -alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_dvs_6axis_config *dvs_config_src) +alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, + struct ia_css_dvs_6axis_config *dvs_config_src) { unsigned int width_y = 0; unsigned int height_y = 0; @@ -30,12 +31,13 @@ alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_d enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_dvs_6axis_config *dvs_config = NULL; - dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_malloc(sizeof(struct ia_css_dvs_6axis_config)); + dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_malloc(sizeof( + struct ia_css_dvs_6axis_config)); if (!dvs_config) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - } else - { /*Initialize new struct with latest config settings*/ + } else { + /*Initialize new struct with latest config settings*/ if (dvs_config_src) { dvs_config->width_y = width_y = dvs_config_src->width_y; dvs_config->height_y = height_y = dvs_config_src->height_y; @@ -44,21 +46,28 @@ alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_d IA_CSS_LOG("alloc_dvs_6axis_table Y: W %d H %d", width_y, height_y); } else if (frame_res) { dvs_config->width_y = width_y = DVS_TABLE_IN_BLOCKDIM_X_LUMA(frame_res->width); - dvs_config->height_y = height_y = DVS_TABLE_IN_BLOCKDIM_Y_LUMA(frame_res->height); - dvs_config->width_uv = width_uv = DVS_TABLE_IN_BLOCKDIM_X_CHROMA(frame_res->width / 2); /* UV = Y/2, depens on colour format YUV 4.2.0*/ - dvs_config->height_uv = height_uv = DVS_TABLE_IN_BLOCKDIM_Y_CHROMA(frame_res->height / 2);/* UV = Y/2, depens on colour format YUV 4.2.0*/ + dvs_config->height_y = height_y = DVS_TABLE_IN_BLOCKDIM_Y_LUMA( + frame_res->height); + dvs_config->width_uv = width_uv = DVS_TABLE_IN_BLOCKDIM_X_CHROMA( + frame_res->width / + 2); /* UV = Y/2, depens on colour format YUV 4.2.0*/ + dvs_config->height_uv = height_uv = DVS_TABLE_IN_BLOCKDIM_Y_CHROMA( + frame_res->height / + 2);/* UV = Y/2, depens on colour format YUV 4.2.0*/ IA_CSS_LOG("alloc_dvs_6axis_table Y: W %d H %d", width_y, height_y); } /* Generate Y buffers */ - dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( + uint32_t)); if (!dvs_config->xcoords_y) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto exit; } - dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( + uint32_t)); if (!dvs_config->ycoords_y) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -68,21 +77,24 @@ alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_d /* Generate UV buffers */ IA_CSS_LOG("UV W %d H %d", width_uv, height_uv); - dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * + sizeof(uint32_t)); if (!dvs_config->xcoords_uv) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto exit; } - dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * + sizeof(uint32_t)); if (!dvs_config->ycoords_uv) { IA_CSS_ERROR("out of memory"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } exit: if (err != IA_CSS_SUCCESS) { - free_dvs_6axis_table(&dvs_config); /* we might have allocated some memory, release this */ + free_dvs_6axis_table( + &dvs_config); /* we might have allocated some memory, release this */ dvs_config = NULL; } } @@ -92,7 +104,8 @@ alloc_dvs_6axis_table(const struct ia_css_resolution *frame_res, struct ia_css_d } static void -init_dvs_6axis_table_from_default(struct ia_css_dvs_6axis_config *dvs_config, const struct ia_css_resolution *dvs_offset) +init_dvs_6axis_table_from_default(struct ia_css_dvs_6axis_config *dvs_config, + const struct ia_css_resolution *dvs_offset) { unsigned int x, y; unsigned int width_y = dvs_config->width_y; @@ -101,48 +114,61 @@ init_dvs_6axis_table_from_default(struct ia_css_dvs_6axis_config *dvs_config, co unsigned int height_uv = dvs_config->height_uv; IA_CSS_LOG("Env_X=%d, Env_Y=%d, width_y=%d, height_y=%d", - dvs_offset->width, dvs_offset->height, width_y, height_y); + dvs_offset->width, dvs_offset->height, width_y, height_y); for (y = 0; y < height_y; y++) { for (x = 0; x < width_y; x++) { - dvs_config->xcoords_y[y * width_y + x] = (dvs_offset->width + x * DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; + dvs_config->xcoords_y[y * width_y + x] = (dvs_offset->width + x * + DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; } } for (y = 0; y < height_y; y++) { for (x = 0; x < width_y; x++) { - dvs_config->ycoords_y[y * width_y + x] = (dvs_offset->height + y * DVS_BLOCKDIM_Y_LUMA) << DVS_COORD_FRAC_BITS; + dvs_config->ycoords_y[y * width_y + x] = (dvs_offset->height + y * + DVS_BLOCKDIM_Y_LUMA) << DVS_COORD_FRAC_BITS; } } for (y = 0; y < height_uv; y++) { - for (x = 0; x < width_uv; x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ - dvs_config->xcoords_uv[y * width_uv + x] = ((dvs_offset->width / 2) + x * DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; + for (x = 0; x < width_uv; + x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ + dvs_config->xcoords_uv[y * width_uv + x] = ((dvs_offset->width / 2) + x * + DVS_BLOCKDIM_X) << DVS_COORD_FRAC_BITS; } } for (y = 0; y < height_uv; y++) { - for (x = 0; x < width_uv; x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ - dvs_config->ycoords_uv[y * width_uv + x] = ((dvs_offset->height / 2) + y * DVS_BLOCKDIM_Y_CHROMA) << DVS_COORD_FRAC_BITS; + for (x = 0; x < width_uv; + x++) { /* Envelope dimensions set in Ypixels hence offset UV = offset Y/2 */ + dvs_config->ycoords_uv[y * width_uv + x] = ((dvs_offset->height / 2) + y * + DVS_BLOCKDIM_Y_CHROMA) << + DVS_COORD_FRAC_BITS; } } } static void -init_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config, struct ia_css_dvs_6axis_config *dvs_config_src) +init_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config, + struct ia_css_dvs_6axis_config *dvs_config_src) { unsigned int width_y = dvs_config->width_y; unsigned int height_y = dvs_config->height_y; unsigned int width_uv = dvs_config->width_uv; unsigned int height_uv = dvs_config->height_uv; - memcpy(dvs_config->xcoords_y, dvs_config_src->xcoords_y, (width_y * height_y * sizeof(uint32_t))); - memcpy(dvs_config->ycoords_y, dvs_config_src->ycoords_y, (width_y * height_y * sizeof(uint32_t))); - memcpy(dvs_config->xcoords_uv, dvs_config_src->xcoords_uv, (width_uv * height_uv * sizeof(uint32_t))); - memcpy(dvs_config->ycoords_uv, dvs_config_src->ycoords_uv, (width_uv * height_uv * sizeof(uint32_t))); + memcpy(dvs_config->xcoords_y, dvs_config_src->xcoords_y, + (width_y * height_y * sizeof(uint32_t))); + memcpy(dvs_config->ycoords_y, dvs_config_src->ycoords_y, + (width_y * height_y * sizeof(uint32_t))); + memcpy(dvs_config->xcoords_uv, dvs_config_src->xcoords_uv, + (width_uv * height_uv * sizeof(uint32_t))); + memcpy(dvs_config->ycoords_uv, dvs_config_src->ycoords_uv, + (width_uv * height_uv * sizeof(uint32_t))); } struct ia_css_dvs_6axis_config * -generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, const struct ia_css_resolution *dvs_offset) +generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, + const struct ia_css_resolution *dvs_offset) { struct ia_css_dvs_6axis_config *dvs_6axis_table; @@ -158,7 +184,8 @@ generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, const struct } struct ia_css_dvs_6axis_config * -generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config_src) +generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config + *dvs_config_src) { struct ia_css_dvs_6axis_config *dvs_6axis_table; @@ -178,30 +205,25 @@ free_dvs_6axis_table(struct ia_css_dvs_6axis_config **dvs_6axis_config) assert(dvs_6axis_config); assert(*dvs_6axis_config); - if ((dvs_6axis_config) && (*dvs_6axis_config)) - { + if ((dvs_6axis_config) && (*dvs_6axis_config)) { IA_CSS_ENTER_PRIVATE("dvs_6axis_config %p", (*dvs_6axis_config)); - if ((*dvs_6axis_config)->xcoords_y) - { + if ((*dvs_6axis_config)->xcoords_y) { sh_css_free((*dvs_6axis_config)->xcoords_y); (*dvs_6axis_config)->xcoords_y = NULL; } - if ((*dvs_6axis_config)->ycoords_y) - { + if ((*dvs_6axis_config)->ycoords_y) { sh_css_free((*dvs_6axis_config)->ycoords_y); (*dvs_6axis_config)->ycoords_y = NULL; } /* Free up UV buffers */ - if ((*dvs_6axis_config)->xcoords_uv) - { + if ((*dvs_6axis_config)->xcoords_uv) { sh_css_free((*dvs_6axis_config)->xcoords_uv); (*dvs_6axis_config)->xcoords_uv = NULL; } - if ((*dvs_6axis_config)->ycoords_uv) - { + if ((*dvs_6axis_config)->ycoords_uv) { sh_css_free((*dvs_6axis_config)->ycoords_uv); (*dvs_6axis_config)->ycoords_uv = NULL; } @@ -213,7 +235,7 @@ free_dvs_6axis_table(struct ia_css_dvs_6axis_config **dvs_6axis_config) } void copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, - const struct ia_css_dvs_6axis_config *dvs_config_src) + const struct ia_css_dvs_6axis_config *dvs_config_src) { unsigned int width_y; unsigned int height_y; @@ -233,14 +255,19 @@ void copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, width_y = dvs_config_src->width_y; height_y = dvs_config_src->height_y; - width_uv = dvs_config_src->width_uv; /* = Y/2, depens on colour format YUV 4.2.0*/ + width_uv = + dvs_config_src->width_uv; /* = Y/2, depens on colour format YUV 4.2.0*/ height_uv = dvs_config_src->height_uv; - memcpy(dvs_config_dst->xcoords_y, dvs_config_src->xcoords_y, (width_y * height_y * sizeof(uint32_t))); - memcpy(dvs_config_dst->ycoords_y, dvs_config_src->ycoords_y, (width_y * height_y * sizeof(uint32_t))); + memcpy(dvs_config_dst->xcoords_y, dvs_config_src->xcoords_y, + (width_y * height_y * sizeof(uint32_t))); + memcpy(dvs_config_dst->ycoords_y, dvs_config_src->ycoords_y, + (width_y * height_y * sizeof(uint32_t))); - memcpy(dvs_config_dst->xcoords_uv, dvs_config_src->xcoords_uv, (width_uv * height_uv * sizeof(uint32_t))); - memcpy(dvs_config_dst->ycoords_uv, dvs_config_src->ycoords_uv, (width_uv * height_uv * sizeof(uint32_t))); + memcpy(dvs_config_dst->xcoords_uv, dvs_config_src->xcoords_uv, + (width_uv * height_uv * sizeof(uint32_t))); + memcpy(dvs_config_dst->ycoords_uv, dvs_config_src->ycoords_uv, + (width_uv * height_uv * sizeof(uint32_t))); } void @@ -248,14 +275,12 @@ ia_css_dvs_statistics_get(enum dvs_statistics_type type, union ia_css_dvs_statistics_host *host_stats, const union ia_css_dvs_statistics_isp *isp_stats) { - if (type == DVS_STATISTICS) - { + if (type == DVS_STATISTICS) { ia_css_get_dvs_statistics(host_stats->p_dvs_statistics_host, - isp_stats->p_dvs_statistics_isp); - } else if (type == DVS2_STATISTICS) - { + isp_stats->p_dvs_statistics_isp); + } else if (type == DVS2_STATISTICS) { ia_css_get_dvs2_statistics(host_stats->p_dvs2_statistics_host, - isp_stats->p_dvs_statistics_isp); + isp_stats->p_dvs_statistics_isp); } return; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h index 04389a7dbcb06..89ae14b963cc6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h @@ -69,16 +69,18 @@ #endif struct ia_css_dvs_6axis_config * -generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, const struct ia_css_resolution *dvs_offset); +generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, + const struct ia_css_resolution *dvs_offset); struct ia_css_dvs_6axis_config * -generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config *dvs_config_src); +generate_dvs_6axis_table_from_config(struct ia_css_dvs_6axis_config + *dvs_config_src); void free_dvs_6axis_table(struct ia_css_dvs_6axis_config **dvs_6axis_config); void copy_dvs_6axis_table(struct ia_css_dvs_6axis_config *dvs_config_dst, - const struct ia_css_dvs_6axis_config *dvs_config_src); + const struct ia_css_dvs_6axis_config *dvs_config_src); #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c index f5cfd4cbe41c6..1d3129dd8feda 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c @@ -80,19 +80,19 @@ crop_and_interpolate(unsigned int cropped_width, enum ia_css_sc_color color) { unsigned int i, j, - sensor_width, - sensor_height, - table_width, - table_height, - table_cell_h, - out_cell_size, - in_cell_size, - out_start_row, - padded_width; + sensor_width, + sensor_height, + table_width, + table_height, + table_cell_h, + out_cell_size, + in_cell_size, + out_start_row, + padded_width; int out_start_col, /* can be negative to indicate padded space */ table_cell_w; unsigned short *in_ptr, - *out_ptr; + *out_ptr; assert(in_table); assert(out_table); @@ -131,7 +131,7 @@ crop_and_interpolate(unsigned int cropped_width, src_y0 = clamp(src_y0, 0, (int)table_height - 1); src_y1 = clamp(src_y1, 0, (int)table_height - 1); ty = min(clamp(ty, 0, (int)sensor_height - 1), - (int)table_cell_h); + (int)table_cell_h); /* calculate closest source points for distance computation */ sy0 = min(src_y0 * in_cell_size, sensor_height - 1); @@ -189,20 +189,21 @@ crop_and_interpolate(unsigned int cropped_width, s_ll = in_ptr[(table_width * src_y1) + src_x0]; s_lr = in_ptr[(table_width * src_y1) + src_x1]; - *out_ptr = (unsigned short)((dx0 * dy0 * s_lr + dx0 * dy1 * s_ur + dx1 * dy0 * s_ll + dx1 * dy1 * s_ul) / - (divx * divy)); + *out_ptr = (unsigned short)((dx0 * dy0 * s_lr + dx0 * dy1 * s_ur + dx1 * dy0 * + s_ll + dx1 * dy1 * s_ul) / + (divx * divy)); } } } void sh_css_params_shading_id_table_generate( - struct ia_css_shading_table **target_table, + struct ia_css_shading_table **target_table, #ifndef ISP2401 - const struct ia_css_binary *binary) + const struct ia_css_binary *binary) #else - unsigned int table_width, - unsigned int table_height) + unsigned int table_width, + unsigned int table_height) #endif { /* initialize table with ones, shift becomes zero */ @@ -244,14 +245,14 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, unsigned int bds_factor) { unsigned int input_width, - input_height, - table_width, - table_height, - left_padding, - top_padding, - padded_width, - left_cropping, - i; + input_height, + table_width, + table_height, + left_padding, + top_padding, + padded_width, + left_cropping, + i; unsigned int bds_numerator, bds_denominator; int right_padding; @@ -265,7 +266,7 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, sh_css_params_shading_id_table_generate(target_table, binary); #else sh_css_params_shading_id_table_generate(target_table, - binary->sctbl_legacy_width_per_color, binary->sctbl_legacy_height); + binary->sctbl_legacy_width_per_color, binary->sctbl_legacy_height); #endif return; } @@ -275,8 +276,9 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, shading correction is performed in the bayer domain (before bayer down scaling). */ #if defined(USE_INPUT_SYSTEM_VERSION_2401) - padded_width = CEIL_MUL(binary->effective_in_frame_res.width + 2 * ISP_VEC_NELEMS, - 2 * ISP_VEC_NELEMS); + padded_width = CEIL_MUL(binary->effective_in_frame_res.width + 2 * + ISP_VEC_NELEMS, + 2 * ISP_VEC_NELEMS); #endif input_height = binary->in_frame_info.res.height; input_width = binary->in_frame_info.res.width; @@ -285,11 +287,17 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, binary->dvs_envelope.width : 2 * ISP_VEC_NELEMS; sh_css_bds_factor_get_numerator_denominator - (bds_factor, &bds_numerator, &bds_denominator); - - left_padding = (left_padding + binary->info->sp.pipeline.left_cropping) * bds_numerator / bds_denominator - binary->info->sp.pipeline.left_cropping; - right_padding = (binary->internal_frame_info.res.width - binary->effective_in_frame_res.width * bds_denominator / bds_numerator - left_cropping) * bds_numerator / bds_denominator; - top_padding = binary->info->sp.pipeline.top_cropping * bds_numerator / bds_denominator - binary->info->sp.pipeline.top_cropping; + (bds_factor, &bds_numerator, &bds_denominator); + + left_padding = (left_padding + binary->info->sp.pipeline.left_cropping) * + bds_numerator / bds_denominator - + binary->info->sp.pipeline.left_cropping; + right_padding = (binary->internal_frame_info.res.width - + binary->effective_in_frame_res.width * bds_denominator / + bds_numerator - left_cropping) * bds_numerator / bds_denominator; + top_padding = binary->info->sp.pipeline.top_cropping * bds_numerator / + bds_denominator - + binary->info->sp.pipeline.top_cropping; #if !defined(USE_WINDOWS_BINNING_FACTOR) /* @deprecated{This part of the code will be replaced by the code @@ -356,8 +364,8 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, struct ia_css_shading_table * ia_css_shading_table_alloc( - unsigned int width, - unsigned int height) + unsigned int width, + unsigned int height) { unsigned int i; struct ia_css_shading_table *me; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h index 2521f622d7502..3b044acb2a73f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h @@ -20,12 +20,12 @@ void sh_css_params_shading_id_table_generate( - struct ia_css_shading_table **target_table, + struct ia_css_shading_table **target_table, #ifndef ISP2401 - const struct ia_css_binary *binary); + const struct ia_css_binary *binary); #else - unsigned int table_width, - unsigned int table_height); + unsigned int table_width, + unsigned int table_height); #endif void diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c index 2a2bb27bdc1c5..7dd82fa322354 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c @@ -138,9 +138,9 @@ static hrt_vaddress sp_ddr_ptrs; static hrt_vaddress xmem_sp_group_ptrs; static hrt_vaddress xmem_sp_stage_ptrs[IA_CSS_PIPE_ID_NUM] - [SH_CSS_MAX_STAGES]; +[SH_CSS_MAX_STAGES]; static hrt_vaddress xmem_isp_stage_ptrs[IA_CSS_PIPE_ID_NUM] - [SH_CSS_MAX_STAGES]; +[SH_CSS_MAX_STAGES]; static hrt_vaddress default_gdc_lut; static int interleaved_lut_temp[4][HRT_GDC_N]; @@ -158,39 +158,40 @@ static int interleaved_lut_temp[4][HRT_GDC_N]; */ static const int zoom_table[4][HRT_GDC_N] = { - { 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -2, -2, -2, -2, -2, -2, -2, - -3, -3, -3, -3, -3, -3, -3, -4, - -4, -4, -4, -4, -5, -5, -5, -5, - -5, -5, -6, -6, -6, -6, -7, -7, - -7, -7, -7, -8, -8, -8, -8, -9, - -9, -9, -9, -10, -10, -10, -10, -11, - -11, -11, -12, -12, -12, -12, -13, -13, - -13, -14, -14, -14, -15, -15, -15, -15, - -16, -16, -16, -17, -17, -17, -18, -18, - -18, -19, -19, -20, -20, -20, -21, -21, - -21, -22, -22, -22, -23, -23, -24, -24, - -24, -25, -25, -25, -26, -26, -27, -27, - -28, -28, -28, -29, -29, -30, -30, -30, - -31, -31, -32, -32, -33, -33, -33, -34, - -34, -35, -35, -36, -36, -37, -37, -37, - -38, -38, -39, -39, -40, -40, -41, -41, - -42, -42, -43, -43, -44, -44, -45, -45, - -46, -46, -47, -47, -48, -48, -49, -49, - -50, -50, -51, -51, -52, -52, -53, -53, - -54, -54, -55, -55, -56, -56, -57, -57, - -58, -59, -59, -60, -60, -61, -61, -62, - -62, -63, -63, -64, -65, -65, -66, -66, - -67, -67, -68, -69, -69, -70, -70, -71, - -71, -72, -73, -73, -74, -74, -75, -75, - -76, -77, -77, -78, -78, -79, -80, -80, - -81, -81, -82, -83, -83, -84, -84, -85, - -86, -86, -87, -87, -88, -89, -89, -90, - -91, -91, -92, -92, -93, -94, -94, -95, - -96, -96, -97, -97, -98, -99, -99, -100, + { + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, -1, + -1, -1, -1, -1, -1, -1, -1, -1, + -1, -2, -2, -2, -2, -2, -2, -2, + -3, -3, -3, -3, -3, -3, -3, -4, + -4, -4, -4, -4, -5, -5, -5, -5, + -5, -5, -6, -6, -6, -6, -7, -7, + -7, -7, -7, -8, -8, -8, -8, -9, + -9, -9, -9, -10, -10, -10, -10, -11, + -11, -11, -12, -12, -12, -12, -13, -13, + -13, -14, -14, -14, -15, -15, -15, -15, + -16, -16, -16, -17, -17, -17, -18, -18, + -18, -19, -19, -20, -20, -20, -21, -21, + -21, -22, -22, -22, -23, -23, -24, -24, + -24, -25, -25, -25, -26, -26, -27, -27, + -28, -28, -28, -29, -29, -30, -30, -30, + -31, -31, -32, -32, -33, -33, -33, -34, + -34, -35, -35, -36, -36, -37, -37, -37, + -38, -38, -39, -39, -40, -40, -41, -41, + -42, -42, -43, -43, -44, -44, -45, -45, + -46, -46, -47, -47, -48, -48, -49, -49, + -50, -50, -51, -51, -52, -52, -53, -53, + -54, -54, -55, -55, -56, -56, -57, -57, + -58, -59, -59, -60, -60, -61, -61, -62, + -62, -63, -63, -64, -65, -65, -66, -66, + -67, -67, -68, -69, -69, -70, -70, -71, + -71, -72, -73, -73, -74, -74, -75, -75, + -76, -77, -77, -78, -78, -79, -80, -80, + -81, -81, -82, -83, -83, -84, -84, -85, + -86, -86, -87, -87, -88, -89, -89, -90, + -91, -91, -92, -92, -93, -94, -94, -95, + -96, -96, -97, -97, -98, -99, -99, -100, -101, -101, -102, -102, -103, -104, -104, -105, -106, -106, -107, -108, -108, -109, -109, -110, -111, -111, -112, -113, -113, -114, -115, -115, @@ -280,47 +281,48 @@ static const int zoom_table[4][HRT_GDC_N] = { -124, -122, -121, -120, -118, -117, -115, -114, -112, -110, -109, -107, -106, -104, -103, -101, -100, -98, -96, -95, -93, -92, -90, -88, - -87, -85, -83, -82, -80, -78, -77, -75, - -73, -72, -70, -68, -67, -65, -63, -61, - -60, -58, -56, -54, -52, -51, -49, -47, - -45, -43, -42, -40, -38, -36, -34, -32, - -31, -29, -27, -25, -23, -21, -19, -17, - -15, -13, -11, -9, -7, -5, -3, -1 + -87, -85, -83, -82, -80, -78, -77, -75, + -73, -72, -70, -68, -67, -65, -63, -61, + -60, -58, -56, -54, -52, -51, -49, -47, + -45, -43, -42, -40, -38, -36, -34, -32, + -31, -29, -27, -25, -23, -21, -19, -17, + -15, -13, -11, -9, -7, -5, -3, -1 }, - { 0, 2, 4, 6, 8, 10, 12, 14, - 16, 18, 20, 22, 25, 27, 29, 31, - 33, 36, 38, 40, 43, 45, 47, 50, - 52, 54, 57, 59, 61, 64, 66, 69, - 71, 74, 76, 79, 81, 84, 86, 89, - 92, 94, 97, 99, 102, 105, 107, 110, - 113, 116, 118, 121, 124, 127, 129, 132, - 135, 138, 141, 144, 146, 149, 152, 155, - 158, 161, 164, 167, 170, 173, 176, 179, - 182, 185, 188, 191, 194, 197, 200, 203, - 207, 210, 213, 216, 219, 222, 226, 229, - 232, 235, 239, 242, 245, 248, 252, 255, - 258, 262, 265, 269, 272, 275, 279, 282, - 286, 289, 292, 296, 299, 303, 306, 310, - 313, 317, 321, 324, 328, 331, 335, 338, - 342, 346, 349, 353, 357, 360, 364, 368, - 372, 375, 379, 383, 386, 390, 394, 398, - 402, 405, 409, 413, 417, 421, 425, 429, - 432, 436, 440, 444, 448, 452, 456, 460, - 464, 468, 472, 476, 480, 484, 488, 492, - 496, 500, 504, 508, 512, 516, 521, 525, - 529, 533, 537, 541, 546, 550, 554, 558, - 562, 567, 571, 575, 579, 584, 588, 592, - 596, 601, 605, 609, 614, 618, 622, 627, - 631, 635, 640, 644, 649, 653, 657, 662, - 666, 671, 675, 680, 684, 689, 693, 698, - 702, 707, 711, 716, 720, 725, 729, 734, - 738, 743, 747, 752, 757, 761, 766, 771, - 775, 780, 784, 789, 794, 798, 803, 808, - 813, 817, 822, 827, 831, 836, 841, 846, - 850, 855, 860, 865, 870, 874, 879, 884, - 889, 894, 898, 903, 908, 913, 918, 923, - 928, 932, 937, 942, 947, 952, 957, 962, - 967, 972, 977, 982, 986, 991, 996, 1001, + { + 0, 2, 4, 6, 8, 10, 12, 14, + 16, 18, 20, 22, 25, 27, 29, 31, + 33, 36, 38, 40, 43, 45, 47, 50, + 52, 54, 57, 59, 61, 64, 66, 69, + 71, 74, 76, 79, 81, 84, 86, 89, + 92, 94, 97, 99, 102, 105, 107, 110, + 113, 116, 118, 121, 124, 127, 129, 132, + 135, 138, 141, 144, 146, 149, 152, 155, + 158, 161, 164, 167, 170, 173, 176, 179, + 182, 185, 188, 191, 194, 197, 200, 203, + 207, 210, 213, 216, 219, 222, 226, 229, + 232, 235, 239, 242, 245, 248, 252, 255, + 258, 262, 265, 269, 272, 275, 279, 282, + 286, 289, 292, 296, 299, 303, 306, 310, + 313, 317, 321, 324, 328, 331, 335, 338, + 342, 346, 349, 353, 357, 360, 364, 368, + 372, 375, 379, 383, 386, 390, 394, 398, + 402, 405, 409, 413, 417, 421, 425, 429, + 432, 436, 440, 444, 448, 452, 456, 460, + 464, 468, 472, 476, 480, 484, 488, 492, + 496, 500, 504, 508, 512, 516, 521, 525, + 529, 533, 537, 541, 546, 550, 554, 558, + 562, 567, 571, 575, 579, 584, 588, 592, + 596, 601, 605, 609, 614, 618, 622, 627, + 631, 635, 640, 644, 649, 653, 657, 662, + 666, 671, 675, 680, 684, 689, 693, 698, + 702, 707, 711, 716, 720, 725, 729, 734, + 738, 743, 747, 752, 757, 761, 766, 771, + 775, 780, 784, 789, 794, 798, 803, 808, + 813, 817, 822, 827, 831, 836, 841, 846, + 850, 855, 860, 865, 870, 874, 879, 884, + 889, 894, 898, 903, 908, 913, 918, 923, + 928, 932, 937, 942, 947, 952, 957, 962, + 967, 972, 977, 982, 986, 991, 996, 1001, 1006, 1011, 1016, 1021, 1026, 1031, 1036, 1041, 1046, 1051, 1056, 1062, 1067, 1072, 1077, 1082, 1087, 1092, 1097, 1102, 1107, 1112, 1117, 1122, @@ -416,7 +418,8 @@ static const int zoom_table[4][HRT_GDC_N] = { 4093, 4093, 4094, 4094, 4094, 4094, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4095 }, - { 4096, 4095, 4095, 4095, 4095, 4095, 4095, 4095, + { + 4096, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4095, 4094, 4094, 4094, 4094, 4093, 4093, 4093, 4092, 4092, 4092, 4091, 4091, 4090, 4090, 4089, 4089, 4088, 4088, 4087, 4087, 4086, @@ -511,47 +514,48 @@ static const int zoom_table[4][HRT_GDC_N] = { 1087, 1082, 1077, 1072, 1067, 1062, 1056, 1051, 1046, 1041, 1036, 1031, 1026, 1021, 1016, 1011, 1006, 1001, 996, 991, 986, 982, 977, 972, - 967, 962, 957, 952, 947, 942, 937, 932, - 928, 923, 918, 913, 908, 903, 898, 894, - 889, 884, 879, 874, 870, 865, 860, 855, - 850, 846, 841, 836, 831, 827, 822, 817, - 813, 808, 803, 798, 794, 789, 784, 780, - 775, 771, 766, 761, 757, 752, 747, 743, - 738, 734, 729, 725, 720, 716, 711, 707, - 702, 698, 693, 689, 684, 680, 675, 671, - 666, 662, 657, 653, 649, 644, 640, 635, - 631, 627, 622, 618, 614, 609, 605, 601, - 596, 592, 588, 584, 579, 575, 571, 567, - 562, 558, 554, 550, 546, 541, 537, 533, - 529, 525, 521, 516, 512, 508, 504, 500, - 496, 492, 488, 484, 480, 476, 472, 468, - 464, 460, 456, 452, 448, 444, 440, 436, - 432, 429, 425, 421, 417, 413, 409, 405, - 402, 398, 394, 390, 386, 383, 379, 375, - 372, 368, 364, 360, 357, 353, 349, 346, - 342, 338, 335, 331, 328, 324, 321, 317, - 313, 310, 306, 303, 299, 296, 292, 289, - 286, 282, 279, 275, 272, 269, 265, 262, - 258, 255, 252, 248, 245, 242, 239, 235, - 232, 229, 226, 222, 219, 216, 213, 210, - 207, 203, 200, 197, 194, 191, 188, 185, - 182, 179, 176, 173, 170, 167, 164, 161, - 158, 155, 152, 149, 146, 144, 141, 138, - 135, 132, 129, 127, 124, 121, 118, 116, - 113, 110, 107, 105, 102, 99, 97, 94, - 92, 89, 86, 84, 81, 79, 76, 74, - 71, 69, 66, 64, 61, 59, 57, 54, - 52, 50, 47, 45, 43, 40, 38, 36, - 33, 31, 29, 27, 25, 22, 20, 18, - 16, 14, 12, 10, 8, 6, 4, 2 + 967, 962, 957, 952, 947, 942, 937, 932, + 928, 923, 918, 913, 908, 903, 898, 894, + 889, 884, 879, 874, 870, 865, 860, 855, + 850, 846, 841, 836, 831, 827, 822, 817, + 813, 808, 803, 798, 794, 789, 784, 780, + 775, 771, 766, 761, 757, 752, 747, 743, + 738, 734, 729, 725, 720, 716, 711, 707, + 702, 698, 693, 689, 684, 680, 675, 671, + 666, 662, 657, 653, 649, 644, 640, 635, + 631, 627, 622, 618, 614, 609, 605, 601, + 596, 592, 588, 584, 579, 575, 571, 567, + 562, 558, 554, 550, 546, 541, 537, 533, + 529, 525, 521, 516, 512, 508, 504, 500, + 496, 492, 488, 484, 480, 476, 472, 468, + 464, 460, 456, 452, 448, 444, 440, 436, + 432, 429, 425, 421, 417, 413, 409, 405, + 402, 398, 394, 390, 386, 383, 379, 375, + 372, 368, 364, 360, 357, 353, 349, 346, + 342, 338, 335, 331, 328, 324, 321, 317, + 313, 310, 306, 303, 299, 296, 292, 289, + 286, 282, 279, 275, 272, 269, 265, 262, + 258, 255, 252, 248, 245, 242, 239, 235, + 232, 229, 226, 222, 219, 216, 213, 210, + 207, 203, 200, 197, 194, 191, 188, 185, + 182, 179, 176, 173, 170, 167, 164, 161, + 158, 155, 152, 149, 146, 144, 141, 138, + 135, 132, 129, 127, 124, 121, 118, 116, + 113, 110, 107, 105, 102, 99, 97, 94, + 92, 89, 86, 84, 81, 79, 76, 74, + 71, 69, 66, 64, 61, 59, 57, 54, + 52, 50, 47, 45, 43, 40, 38, 36, + 33, 31, 29, 27, 25, 22, 20, 18, + 16, 14, 12, 10, 8, 6, 4, 2 }, - { 0, -1, -3, -5, -7, -9, -11, -13, - -15, -17, -19, -20, -23, -25, -27, -28, - -30, -33, -34, -36, -39, -40, -42, -43, - -45, -46, -49, -50, -52, -54, -56, -58, - -60, -61, -62, -65, -66, -68, -70, -72, - -73, -74, -77, -78, -80, -82, -83, -85, - -87, -89, -90, -92, -93, -95, -96, -98, + { + 0, -1, -3, -5, -7, -9, -11, -13, + -15, -17, -19, -20, -23, -25, -27, -28, + -30, -33, -34, -36, -39, -40, -42, -43, + -45, -46, -49, -50, -52, -54, -56, -58, + -60, -61, -62, -65, -66, -68, -70, -72, + -73, -74, -77, -78, -80, -82, -83, -85, + -87, -89, -90, -92, -93, -95, -96, -98, -100, -102, -103, -105, -106, -107, -108, -110, -112, -114, -116, -116, -118, -120, -122, -122, -124, -126, -127, -128, -130, -131, -133, -133, @@ -641,43 +645,44 @@ static const int zoom_table[4][HRT_GDC_N] = { -110, -110, -109, -109, -108, -107, -107, -106, -105, -104, -104, -103, -102, -103, -102, -101, -101, -100, -99, -99, -98, -97, -97, -96, - -96, -95, -94, -94, -93, -92, -92, -91, - -91, -90, -89, -88, -88, -88, -87, -86, - -85, -86, -84, -84, -83, -82, -82, -81, - -81, -80, -80, -78, -79, -77, -77, -77, - -76, -76, -75, -74, -74, -73, -72, -72, - -72, -71, -70, -70, -69, -68, -68, -68, - -66, -67, -66, -65, -65, -65, -63, -63, - -62, -62, -61, -61, -60, -60, -60, -58, - -58, -58, -56, -56, -56, -55, -54, -55, - -54, -54, -53, -52, -51, -51, -51, -50, - -49, -49, -49, -49, -48, -47, -46, -46, - -46, -46, -45, -43, -43, -43, -43, -42, - -42, -42, -40, -40, -40, -39, -39, -38, - -38, -38, -37, -37, -36, -36, -35, -35, - -34, -35, -34, -33, -33, -32, -32, -31, - -31, -31, -30, -29, -29, -29, -28, -27, - -28, -28, -27, -26, -26, -25, -25, -25, - -24, -24, -24, -23, -23, -22, -22, -22, - -21, -21, -20, -20, -20, -20, -19, -18, - -19, -18, -18, -17, -18, -17, -16, -17, - -16, -15, -15, -15, -14, -14, -15, -13, - -13, -13, -13, -12, -12, -11, -12, -11, - -12, -10, -10, -10, -10, -10, -9, -10, - -9, -9, -9, -8, -8, -7, -8, -7, - -7, -7, -6, -6, -6, -7, -6, -6, - -5, -5, -5, -5, -5, -4, -4, -5, - -4, -4, -3, -3, -3, -3, -3, -2, - -3, -2, -2, -2, -1, -2, -1, -2, - -1, -1, -1, -1, -1, 0, -1, 0, - -1, -1, 0, 0, -1, 0, 0, -1, - 1, 1, 0, 0, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 + -96, -95, -94, -94, -93, -92, -92, -91, + -91, -90, -89, -88, -88, -88, -87, -86, + -85, -86, -84, -84, -83, -82, -82, -81, + -81, -80, -80, -78, -79, -77, -77, -77, + -76, -76, -75, -74, -74, -73, -72, -72, + -72, -71, -70, -70, -69, -68, -68, -68, + -66, -67, -66, -65, -65, -65, -63, -63, + -62, -62, -61, -61, -60, -60, -60, -58, + -58, -58, -56, -56, -56, -55, -54, -55, + -54, -54, -53, -52, -51, -51, -51, -50, + -49, -49, -49, -49, -48, -47, -46, -46, + -46, -46, -45, -43, -43, -43, -43, -42, + -42, -42, -40, -40, -40, -39, -39, -38, + -38, -38, -37, -37, -36, -36, -35, -35, + -34, -35, -34, -33, -33, -32, -32, -31, + -31, -31, -30, -29, -29, -29, -28, -27, + -28, -28, -27, -26, -26, -25, -25, -25, + -24, -24, -24, -23, -23, -22, -22, -22, + -21, -21, -20, -20, -20, -20, -19, -18, + -19, -18, -18, -17, -18, -17, -16, -17, + -16, -15, -15, -15, -14, -14, -15, -13, + -13, -13, -13, -12, -12, -11, -12, -11, + -12, -10, -10, -10, -10, -10, -9, -10, + -9, -9, -9, -8, -8, -7, -8, -7, + -7, -7, -6, -6, -6, -7, -6, -6, + -5, -5, -5, -5, -5, -4, -4, -5, + -4, -4, -3, -3, -3, -3, -3, -2, + -3, -2, -2, -2, -1, -2, -1, -2, + -1, -1, -1, -1, -1, 0, -1, 0, + -1, -1, 0, 0, -1, 0, 0, -1, + 1, 1, 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 } }; #else /* defined(CONFIG_CSI2_PLUS) */ static const int zoom_table[4][HRT_GDC_N] = { - { 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + { + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, @@ -689,124 +694,125 @@ static const int zoom_table[4][HRT_GDC_N] = { 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, - -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, - -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, - -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, - -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, - -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, - -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, - -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, - -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, - -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, - -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, - -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, - -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, - -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, - -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, - -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, - -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, - -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, - -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, - -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, - -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, - -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, - -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, - -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, - -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, - -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, - -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, - -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, - -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, - -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, - -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, - -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, - -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, - -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, - -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, - -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, - -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, - -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, - -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, - -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, - -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, - -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, - -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, - -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, - -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, - -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, - -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, - -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, - -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, - -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, - -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, - -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, - -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, - -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, - -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, - -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, - -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, - -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, - -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, - -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, - -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, - -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, - -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, - -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, - -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, - -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, - -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, - -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4 + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, + -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, + -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, + -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, + -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, + -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, -7 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4 }, - { 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, + { + 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, @@ -856,332 +862,334 @@ static const int zoom_table[4][HRT_GDC_N] = { 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, - 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, - 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, - 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, - 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, - 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, - 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, - 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, - 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, - 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, - 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, - 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, - 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, - 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, - 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, - 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, - 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, - 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, - 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, - 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, - 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, - 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, - 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, - 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, - 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, - 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, - 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, - 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, - 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, - 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, - 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, - 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, - 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, - 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, - 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, - 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, - 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, - 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, - 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, - 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, - 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, - 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, - 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, - 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, - 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, - 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, - 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, - 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, - 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, - 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, - 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, - 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, - 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, - 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, - 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, - 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, - 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, - 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, - 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, - 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, - 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, - 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, - 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, - 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, - 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, - 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, - 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, - 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, - 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, - 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, - 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, - 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, - 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, - 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, - 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4 + 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, + 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, + 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, + 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, + 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, + 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, + 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, + 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, + 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, + 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, + 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, + 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, + 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, + 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, + 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, + 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, + 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, + 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, + 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, + 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, + 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, + 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, + 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, + 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, + 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, + 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, + 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, + 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, + 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, + 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, + 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, + 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, + 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, + 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, + 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, + 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, + 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, + 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, + 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, + 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, + 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, + 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, + 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, + 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, + 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, + 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, + 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, + 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, + 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, + 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, + 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, + 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, + 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, + 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, + 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, + 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, + 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, + 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, + 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, + 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, + 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, + 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, + 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, + 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, + 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, + 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, + 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, + 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, + 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, + 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, + 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, + 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, + 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, + 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4 }, - { 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, - 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, - 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, - 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, - 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, - 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, - 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, - 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, - 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, - 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, - 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, - 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, - 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, - 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, - 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, - 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, - 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, - 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, - 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, - 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, - 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, - 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, - 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, - 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, - 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, - 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, - 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, - 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, - 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, 225 << 4, - 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, - 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, 222 << 4, - 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, - 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, 218 << 4, - 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, - 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, 213 << 4, - 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, - 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, 209 << 4, - 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, - 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, 205 << 4, - 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, - 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, 200 << 4, - 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, - 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, 195 << 4, - 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, - 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, 191 << 4, - 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, - 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, 186 << 4, - 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, - 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, 181 << 4, - 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, - 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, 176 << 4, - 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, - 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, 170 << 4, - 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, - 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, 165 << 4, - 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, - 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, 160 << 4, - 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, - 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, 154 << 4, - 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, - 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, 149 << 4, - 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, - 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, 144 << 4, - 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, - 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, 138 << 4, - 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, - 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, 132 << 4, - 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, - 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, 127 << 4, - 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, - 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, 121 << 4, - 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, - 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, 116 << 4, - 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, - 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, 110 << 4, - 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, - 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, 105 << 4, - 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, - 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, 99 << 4, - 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, - 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, 94 << 4, - 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, - 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, 88 << 4, - 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, - 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, 83 << 4, - 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, - 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, 78 << 4, - 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, - 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, 73 << 4, - 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, - 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, 67 << 4, - 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, - 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, 62 << 4, - 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, - 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, 58 << 4, - 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, - 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, 53 << 4, - 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, - 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, 48 << 4, - 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, - 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, 43 << 4, - 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, - 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, 39 << 4, - 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, - 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, 35 << 4, - 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, - 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, 31 << 4, - 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, - 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, 27 << 4, - 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, - 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, 23 << 4, - 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, - 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, 19 << 4, - 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, - 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, 16 << 4, - 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, - 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, 12 << 4, - 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, - 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, 9 << 4, - 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, - 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, 7 << 4, - 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, - 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, 4 << 4, - 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, - 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4, 2 << 4 + { + 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, + 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, 256 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, + 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, 255 << 4, + 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, + 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, 254 << 4, + 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, + 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, 253 << 4, + 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, + 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, 252 << 4, + 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, + 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, 250 << 4, + 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, + 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, 248 << 4, + 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, + 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, 246 << 4, + 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, + 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, 244 << 4, + 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, + 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, 241 << 4, + 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, + 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, 239 << 4, + 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, + 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, 236 << 4, + 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, + 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, 232 << 4, + 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, 229 << 4, + 229 << 4, 229 << 4, 229 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<< 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, + -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, -10 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, -19 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, -18 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, -17 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, -16 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, -15 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, -14 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, -13 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, -12 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, -11 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, -9 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, -8 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, -6 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, -5 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, -4 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, -3 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, -2 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, - -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, + -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, -1 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 0 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, 1 << 4, @@ -1197,13 +1205,14 @@ static const int zoom_table[4][HRT_GDC_N] = { #endif #else #error "sh_css_params.c: GDC version must be \ - one of {GDC_VERSION_2}" +one of {GDC_VERSION_2}" #endif static const struct ia_css_dz_config default_dz_config = { HRT_GDC_N, HRT_GDC_N, - { \ + { + \ {0, 0}, \ {0, 0}, \ } @@ -1228,25 +1237,25 @@ struct ia_css_isp_skc_dvs_statistics { static enum ia_css_err ref_sh_css_ddr_address_map( - struct sh_css_ddr_address_map *map, - struct sh_css_ddr_address_map *out); + struct sh_css_ddr_address_map *map, + struct sh_css_ddr_address_map *out); static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( - struct ia_css_isp_parameter_set_info *me, - hrt_vaddress *out); + struct ia_css_isp_parameter_set_info *me, + hrt_vaddress *out); static enum ia_css_err free_ia_css_isp_parameter_set_info(hrt_vaddress ptr); static enum ia_css_err sh_css_params_write_to_ddr_internal( - struct ia_css_pipe *pipe, - unsigned int pipe_id, - struct ia_css_isp_parameters *params, - const struct ia_css_pipeline_stage *stage, - struct sh_css_ddr_address_map *ddr_map, - struct sh_css_ddr_address_map_size *ddr_map_size); + struct ia_css_pipe *pipe, + unsigned int pipe_id, + struct ia_css_isp_parameters *params, + const struct ia_css_pipeline_stage *stage, + struct sh_css_ddr_address_map *ddr_map, + struct sh_css_ddr_address_map_size *ddr_map_size); static enum ia_css_err sh_css_create_isp_params(struct ia_css_stream *stream, @@ -1254,42 +1263,42 @@ sh_css_create_isp_params(struct ia_css_stream *stream, static bool sh_css_init_isp_params_from_global(struct ia_css_stream *stream, - struct ia_css_isp_parameters *params, - bool use_default_config, - struct ia_css_pipe *pipe_in); + struct ia_css_isp_parameters *params, + bool use_default_config, + struct ia_css_pipe *pipe_in); static enum ia_css_err sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe_in); + struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe_in); static enum ia_css_err sh_css_set_global_isp_config_on_pipe( - struct ia_css_pipe *curr_pipe, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe); + struct ia_css_pipe *curr_pipe, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe); #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) static enum ia_css_err sh_css_set_per_frame_isp_config_on_pipe( - struct ia_css_stream *stream, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe); + struct ia_css_stream *stream, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe); #endif static enum ia_css_err sh_css_update_uds_and_crop_info_based_on_zoom_region( - const struct ia_css_binary_info *info, - const struct ia_css_frame_info *in_frame_info, - const struct ia_css_frame_info *out_frame_info, - const struct ia_css_resolution *dvs_env, - const struct ia_css_dz_config *zoom, - const struct ia_css_vector *motion_vector, - struct sh_css_uds_info *uds, /* out */ - struct sh_css_crop_pos *sp_out_crop_pos, /* out */ - struct ia_css_resolution pipe_in_res, - bool enable_zoom); + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + struct ia_css_resolution pipe_in_res, + bool enable_zoom); hrt_vaddress sh_css_params_ddr_address_map(void) @@ -1324,7 +1333,8 @@ convert_allocate_fpntbl(struct ia_css_isp_parameters *params) assert(params); data_ptr = params->fpn_config.data; - isp_format_data_size = params->fpn_config.height * params->fpn_config.width * sizeof(uint32_t); + isp_format_data_size = params->fpn_config.height * params->fpn_config.width * + sizeof(uint32_t); me = ia_css_host_data_allocate(isp_format_data_size); @@ -1348,15 +1358,15 @@ convert_allocate_fpntbl(struct ia_css_isp_parameters *params) } static enum ia_css_err -store_fpntbl(struct ia_css_isp_parameters *params, hrt_vaddress ptr) -{ +store_fpntbl(struct ia_css_isp_parameters *params, hrt_vaddress ptr) { struct ia_css_host_data *isp_data; assert(params); assert(ptr != mmgr_NULL); isp_data = convert_allocate_fpntbl(params); - if (!isp_data) { + if (!isp_data) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -1382,11 +1392,11 @@ convert_raw_to_fpn(struct ia_css_isp_parameters *params) * depends on precision of input frame data. */ if (val < 0) { -/* Checkpatch patch */ + /* Checkpatch patch */ val = 0; } else if (val >= (1 << 13)) { -/* Checkpatch patch */ -/* MW: BUG, is "13" a system or application property */ + /* Checkpatch patch */ + /* MW: BUG, is "13" a system or application property */ val = (1 << 13) - 1; } maxval = max(maxval, val); @@ -1396,7 +1406,7 @@ convert_raw_to_fpn(struct ia_css_isp_parameters *params) */ params->fpn_config.shift = 0; while (maxval > 63) { -/* MW: BUG, is "63" a system or application property */ + /* MW: BUG, is "63" a system or application property */ maxval >>= 1; params->fpn_config.shift++; } @@ -1428,7 +1438,8 @@ ia_css_process_kernel(struct ia_css_stream *stream, } static enum ia_css_err -sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) { +sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, + bool *is_dp_10bpp) { enum ia_css_err err = IA_CSS_SUCCESS; /* Currently we check if 10bpp DPC configuration is required based * on the use case,i.e. if BDS and DPC is both enabled. The more cleaner @@ -1437,10 +1448,12 @@ sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) * implementation. (This is because the configuration is set before a * binary is selected, and the binary info is not available) */ - if ((!pipe) || (!is_dp_10bpp)) { + if ((!pipe) || (!is_dp_10bpp)) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); err = IA_CSS_ERR_INTERNAL_ERROR; - } else { + } else + { *is_dp_10bpp = false; /* check if DPC is enabled from the host */ @@ -1449,7 +1462,7 @@ sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) unsigned int required_bds_factor = SH_CSS_BDS_FACTOR_1_00; if ((pipe->config.bayer_ds_out_res.width != 0) && - (pipe->config.bayer_ds_out_res.height != 0)) { + (pipe->config.bayer_ds_out_res.height != 0)) { if (IA_CSS_SUCCESS == binarydesc_calculate_bds_factor( pipe->config.input_effective_res, pipe->config.bayer_ds_out_res, @@ -1468,8 +1481,7 @@ sh_css_select_dp_10bpp_config(const struct ia_css_pipe *pipe, bool *is_dp_10bpp) enum ia_css_err sh_css_set_black_frame(struct ia_css_stream *stream, - const struct ia_css_frame *raw_black_frame) -{ + const struct ia_css_frame *raw_black_frame) { struct ia_css_isp_parameters *params; /* this function desperately needs to be moved to the ISP or SP such * that it can use the DMA. @@ -1485,16 +1497,18 @@ sh_css_set_black_frame(struct ia_css_stream *stream, width = raw_black_frame->info.padded_width, ptr = raw_black_frame->data - + raw_black_frame->planes.raw.offset; + + raw_black_frame->planes.raw.offset; IA_CSS_ENTER_PRIVATE("black_frame=%p", raw_black_frame); if (params->fpn_config.data && - (params->fpn_config.width != width || params->fpn_config.height != height)) { + (params->fpn_config.width != width || params->fpn_config.height != height)) + { sh_css_free(params->fpn_config.data); params->fpn_config.data = NULL; } - if (!params->fpn_config.data) { + if (!params->fpn_config.data) + { params->fpn_config.data = sh_css_malloc(height * width * sizeof(short)); if (!params->fpn_config.data) { IA_CSS_ERROR("out of memory"); @@ -1507,7 +1521,8 @@ sh_css_set_black_frame(struct ia_css_stream *stream, } /* store raw to fpntbl */ - for (y = 0; y < height; y++) { + for (y = 0; y < height; y++) + { for (x = 0; x < width; x += (ISP_VEC_NELEMS * 2)) { int ofs = y * width + x; @@ -1542,7 +1557,8 @@ sh_css_set_black_frame(struct ia_css_stream *stream, } bool -sh_css_params_set_binning_factor(struct ia_css_stream *stream, unsigned int binning_fact) +sh_css_params_set_binning_factor(struct ia_css_stream *stream, + unsigned int binning_fact) { struct ia_css_isp_parameters *params; @@ -1563,7 +1579,7 @@ sh_css_params_set_binning_factor(struct ia_css_stream *stream, unsigned int binn static void sh_css_update_shading_table_status(struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params) + struct ia_css_isp_parameters *params) { if (params && pipe && (pipe->pipe_num != params->sc_table_last_pipe_num)) { params->sc_table_dirty = true; @@ -1601,8 +1617,8 @@ sh_css_set_shading_table(struct ia_css_stream *stream, void ia_css_params_store_ia_css_host_data( - hrt_vaddress ddr_addr, - struct ia_css_host_data *data) + hrt_vaddress ddr_addr, + struct ia_css_host_data *data) { assert(data); assert(data->address); @@ -1611,16 +1627,16 @@ ia_css_params_store_ia_css_host_data( IA_CSS_ENTER_PRIVATE(""); mmgr_store(ddr_addr, - (void *)(data->address), - (size_t)data->size); + (void *)(data->address), + (size_t)data->size); IA_CSS_LEAVE_PRIVATE("void"); } struct ia_css_host_data * ia_css_params_alloc_convert_sctbl( - const struct ia_css_pipeline_stage *stage, - const struct ia_css_shading_table *shading_table) + const struct ia_css_pipeline_stage *stage, + const struct ia_css_shading_table *shading_table) { const struct ia_css_binary *binary = stage->binary; struct ia_css_host_data *sctbl; @@ -1640,7 +1656,8 @@ ia_css_params_alloc_convert_sctbl( aligned_width = binary->sctbl_aligned_width_per_color; row_padding = aligned_width - shading_table->width; - sctbl_size = shading_table->height * IA_CSS_SC_NUM_COLORS * aligned_width * sizeof(short); + sctbl_size = shading_table->height * IA_CSS_SC_NUM_COLORS * aligned_width * + sizeof(short); sctbl = ia_css_host_data_allocate((size_t)sctbl_size); @@ -1648,15 +1665,15 @@ ia_css_params_alloc_convert_sctbl( return NULL; ptr = (short int *)sctbl->address; memset(ptr, - 0, - sctbl_size); + 0, + sctbl_size); for (i = 0; i < shading_table->height; i++) { for (j = 0; j < IA_CSS_SC_NUM_COLORS; j++) { memcpy(ptr, - &shading_table->data[j] - [i * shading_table->width], - shading_table->width * sizeof(short)); + &shading_table->data[j] + [i * shading_table->width], + shading_table->width * sizeof(short)); ptr += aligned_width; } } @@ -1666,9 +1683,9 @@ ia_css_params_alloc_convert_sctbl( } enum ia_css_err ia_css_params_store_sctbl( - const struct ia_css_pipeline_stage *stage, - hrt_vaddress sc_tbl, - const struct ia_css_shading_table *sc_config) + const struct ia_css_pipeline_stage *stage, + hrt_vaddress sc_tbl, + const struct ia_css_shading_table *sc_config) { struct ia_css_host_data *isp_sc_tbl; @@ -1708,9 +1725,8 @@ sh_css_enable_pipeline(const struct ia_css_binary *binary) static enum ia_css_err ia_css_process_zoom_and_motion( - struct ia_css_isp_parameters *params, - const struct ia_css_pipeline_stage *first_stage) -{ + struct ia_css_isp_parameters *params, + const struct ia_css_pipeline_stage *first_stage) { /* first_stage can be NULL */ const struct ia_css_pipeline_stage *stage; enum ia_css_err err = IA_CSS_SUCCESS; @@ -1724,7 +1740,8 @@ ia_css_process_zoom_and_motion( IA_CSS_ENTER_PRIVATE(""); /* Go through all stages to udate uds and cropping */ - for (stage = first_stage; stage; stage = stage->next) { + for (stage = first_stage; stage; stage = stage->next) + { struct ia_css_binary *binary; /* note: the var below is made static as it is quite large; if it is not static it ends up on the stack which could @@ -1745,15 +1762,15 @@ ia_css_process_zoom_and_motion( out_infos[0] = &args->out_frame[0]->info; info = &stage->firmware->info.isp; ia_css_binary_fill_info(info, false, false, - ATOMISP_INPUT_FORMAT_RAW_10, - args->in_frame ? &args->in_frame->info : NULL, - NULL, - out_infos, - args->out_vf_frame ? &args->out_vf_frame->info - : NULL, - &tmp_binary, - NULL, - -1, true); + ATOMISP_INPUT_FORMAT_RAW_10, + args->in_frame ? &args->in_frame->info : NULL, + NULL, + out_infos, + args->out_vf_frame ? &args->out_vf_frame->info + : NULL, + &tmp_binary, + NULL, + -1, true); binary = &tmp_binary; binary->info = info; } @@ -1767,29 +1784,29 @@ ia_css_process_zoom_and_motion( if (params->dz_config.zoom_region.resolution.width == 0 && params->dz_config.zoom_region.resolution.height == 0) { sh_css_update_uds_and_crop_info( - &info->sp, - &binary->in_frame_info, - &binary->out_frame_info[0], - &binary->dvs_envelope, - ¶ms->dz_config, - ¶ms->motion_config, - ¶ms->uds[stage->stage_num].uds, - ¶ms->uds[stage->stage_num].crop_pos, - stage->enable_zoom); + &info->sp, + &binary->in_frame_info, + &binary->out_frame_info[0], + &binary->dvs_envelope, + ¶ms->dz_config, + ¶ms->motion_config, + ¶ms->uds[stage->stage_num].uds, + ¶ms->uds[stage->stage_num].crop_pos, + stage->enable_zoom); } else { err = sh_css_update_uds_and_crop_info_based_on_zoom_region( - &info->sp, - &binary->in_frame_info, - &binary->out_frame_info[0], - &binary->dvs_envelope, - ¶ms->dz_config, - ¶ms->motion_config, - ¶ms->uds[stage->stage_num].uds, - ¶ms->uds[stage->stage_num].crop_pos, - pipe_in_res, - stage->enable_zoom); + &info->sp, + &binary->in_frame_info, + &binary->out_frame_info[0], + &binary->dvs_envelope, + ¶ms->dz_config, + ¶ms->motion_config, + ¶ms->uds[stage->stage_num].uds, + ¶ms->uds[stage->stage_num].crop_pos, + pipe_in_res, + stage->enable_zoom); if (err != IA_CSS_SUCCESS) - return err; + return err; } } params->isp_params_changed = true; @@ -1800,7 +1817,7 @@ ia_css_process_zoom_and_motion( static void sh_css_set_gamma_table(struct ia_css_isp_parameters *params, - const struct ia_css_gamma_table *table) + const struct ia_css_gamma_table *table) { if (!table) return; @@ -1815,7 +1832,7 @@ sh_css_set_gamma_table(struct ia_css_isp_parameters *params, static void sh_css_get_gamma_table(const struct ia_css_isp_parameters *params, - struct ia_css_gamma_table *table) + struct ia_css_gamma_table *table) { if (!table) return; @@ -1829,7 +1846,7 @@ sh_css_get_gamma_table(const struct ia_css_isp_parameters *params, static void sh_css_set_ctc_table(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_table *table) + const struct ia_css_ctc_table *table) { if (!table) return; @@ -1845,7 +1862,7 @@ sh_css_set_ctc_table(struct ia_css_isp_parameters *params, static void sh_css_get_ctc_table(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_table *table) + struct ia_css_ctc_table *table) { if (!table) return; @@ -1860,7 +1877,7 @@ sh_css_get_ctc_table(const struct ia_css_isp_parameters *params, static void sh_css_set_macc_table(struct ia_css_isp_parameters *params, - const struct ia_css_macc_table *table) + const struct ia_css_macc_table *table) { if (!table) return; @@ -1876,7 +1893,7 @@ sh_css_set_macc_table(struct ia_css_isp_parameters *params, static void sh_css_get_macc_table(const struct ia_css_isp_parameters *params, - struct ia_css_macc_table *table) + struct ia_css_macc_table *table) { if (!table) return; @@ -1890,7 +1907,7 @@ sh_css_get_macc_table(const struct ia_css_isp_parameters *params, } void ia_css_morph_table_free( - struct ia_css_morph_table *me) + struct ia_css_morph_table *me) { unsigned int i; @@ -1915,8 +1932,8 @@ void ia_css_morph_table_free( } struct ia_css_morph_table *ia_css_morph_table_allocate( - unsigned int width, - unsigned int height) + unsigned int width, + unsigned int height) { unsigned int i; struct ia_css_morph_table *me; @@ -1943,7 +1960,7 @@ struct ia_css_morph_table *ia_css_morph_table_allocate( sizeof(*me->coordinates_y[i])); if ((!me->coordinates_x[i]) || - (!me->coordinates_y[i])) { + (!me->coordinates_y[i])) { ia_css_morph_table_free(me); me = NULL; return me; @@ -1956,13 +1973,13 @@ struct ia_css_morph_table *ia_css_morph_table_allocate( } static enum ia_css_err sh_css_params_default_morph_table( - struct ia_css_morph_table **table, - const struct ia_css_binary *binary) + struct ia_css_morph_table **table, + const struct ia_css_binary *binary) { /* MW 2400 advanced requires different scaling */ unsigned int i, j, k, step, width, height; short start_x[IA_CSS_MORPH_TABLE_NUM_PLANES] = { -8, 0, -8, 0, 0, -8 }, - start_y[IA_CSS_MORPH_TABLE_NUM_PLANES] = { 0, 0, -8, -8, -8, 0 }; + start_y[IA_CSS_MORPH_TABLE_NUM_PLANES] = { 0, 0, -8, -8, -8, 0 }; struct ia_css_morph_table *tab; assert(table); @@ -2012,7 +2029,7 @@ static enum ia_css_err sh_css_params_default_morph_table( static void sh_css_set_morph_table(struct ia_css_isp_parameters *params, - const struct ia_css_morph_table *table) + const struct ia_css_morph_table *table) { if (!table) return; @@ -2029,8 +2046,8 @@ sh_css_set_morph_table(struct ia_css_isp_parameters *params, void ia_css_translate_3a_statistics( - struct ia_css_3a_statistics *host_stats, - const struct ia_css_isp_3a_statistics_map *isp_stats) + struct ia_css_3a_statistics *host_stats, + const struct ia_css_isp_3a_statistics_map *isp_stats) { IA_CSS_ENTER(""); if (host_stats->grid.use_dmem) { @@ -2064,8 +2081,8 @@ ia_css_isp_3a_statistics_map_free(struct ia_css_isp_3a_statistics_map *me) struct ia_css_isp_3a_statistics_map * ia_css_isp_3a_statistics_map_allocate( - const struct ia_css_isp_3a_statistics *isp_stats, - void *data_ptr) + const struct ia_css_isp_3a_statistics *isp_stats, + void *data_ptr) { struct ia_css_isp_3a_statistics_map *me; /* Windows compiler does not like adding sizes to a void * @@ -2095,9 +2112,9 @@ ia_css_isp_3a_statistics_map_allocate( me->dmem_stats = (void *)base_ptr; me->vmem_stats_hi = (void *)(base_ptr + isp_stats->dmem_size); me->vmem_stats_lo = (void *)(base_ptr + isp_stats->dmem_size + - isp_stats->vmem_size); + isp_stats->vmem_size); me->hmem_stats = (void *)(base_ptr + isp_stats->dmem_size + - 2 * isp_stats->vmem_size); + 2 * isp_stats->vmem_size); IA_CSS_LEAVE("map=%p", me); return me; @@ -2110,8 +2127,7 @@ ia_css_isp_3a_statistics_map_allocate( enum ia_css_err ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, - const struct ia_css_isp_3a_statistics *isp_stats) -{ + const struct ia_css_isp_3a_statistics *isp_stats) { struct ia_css_isp_3a_statistics_map *map; enum ia_css_err ret = IA_CSS_SUCCESS; @@ -2121,11 +2137,13 @@ ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, assert(isp_stats); map = ia_css_isp_3a_statistics_map_allocate(isp_stats, NULL); - if (map) { + if (map) + { mmgr_load(isp_stats->data_ptr, map->data_ptr, isp_stats->size); ia_css_translate_3a_statistics(host_stats, map); ia_css_isp_3a_statistics_map_free(map); - } else { + } else + { IA_CSS_ERROR("out of memory"); ret = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -2139,7 +2157,7 @@ ia_css_get_3a_statistics(struct ia_css_3a_statistics *host_stats, */ static void ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params) + struct ia_css_isp_parameters *params) { assert(params); @@ -2164,8 +2182,8 @@ ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, #ifdef ISP2401 static void sh_css_set_dp_config(const struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) + struct ia_css_isp_parameters *params, + const struct ia_css_dp_config *config) { if (!config) return; @@ -2186,8 +2204,8 @@ sh_css_set_dp_config(const struct ia_css_pipe *pipe, static void sh_css_get_dp_config(const struct ia_css_pipe *pipe, - const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config) + const struct ia_css_isp_parameters *params, + struct ia_css_dp_config *config) { if (!config) return; @@ -2203,7 +2221,7 @@ sh_css_get_dp_config(const struct ia_css_pipe *pipe, static void sh_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) + const struct ia_css_nr_config *config) { if (!config) return; @@ -2223,7 +2241,7 @@ sh_css_set_nr_config(struct ia_css_isp_parameters *params, static void sh_css_set_ee_config(struct ia_css_isp_parameters *params, - const struct ia_css_ee_config *config) + const struct ia_css_ee_config *config) { if (!config) return; @@ -2241,7 +2259,7 @@ sh_css_set_ee_config(struct ia_css_isp_parameters *params, static void sh_css_get_ee_config(const struct ia_css_isp_parameters *params, - struct ia_css_ee_config *config) + struct ia_css_ee_config *config) { if (!config) return; @@ -2257,8 +2275,8 @@ sh_css_get_ee_config(const struct ia_css_isp_parameters *params, static void sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params, - const struct ia_css_dvs_6axis_config *dvs_config) + struct ia_css_isp_parameters *params, + const struct ia_css_dvs_6axis_config *dvs_config) { if (!dvs_config) return; @@ -2281,8 +2299,8 @@ sh_css_set_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, static void sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, - const struct ia_css_isp_parameters *params, - struct ia_css_dvs_6axis_config *dvs_config) + const struct ia_css_isp_parameters *params, + struct ia_css_dvs_6axis_config *dvs_config) { if (!dvs_config) return; @@ -2297,12 +2315,12 @@ sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, (dvs_config->width_y == params->pipe_dvs_6axis_config[pipe->mode]->width_y) && (dvs_config->height_y == params->pipe_dvs_6axis_config[pipe->mode]->height_y) && (dvs_config->width_uv == params->pipe_dvs_6axis_config[pipe->mode]->width_uv) && - (dvs_config->height_uv == params->pipe_dvs_6axis_config[pipe->mode]->height_uv) && - dvs_config->xcoords_y && - dvs_config->ycoords_y && - dvs_config->xcoords_uv && - dvs_config->ycoords_uv) - { + (dvs_config->height_uv == params->pipe_dvs_6axis_config[pipe->mode]->height_uv) + && + dvs_config->xcoords_y && + dvs_config->ycoords_y && + dvs_config->xcoords_uv && + dvs_config->ycoords_uv) { copy_dvs_6axis_table(dvs_config, params->pipe_dvs_6axis_config[pipe->mode]); } @@ -2311,7 +2329,7 @@ sh_css_get_pipe_dvs_6axis_config(const struct ia_css_pipe *pipe, static void sh_css_set_baa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) + const struct ia_css_aa_config *config) { if (!config) return; @@ -2327,7 +2345,7 @@ sh_css_set_baa_config(struct ia_css_isp_parameters *params, static void sh_css_get_baa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config) + struct ia_css_aa_config *config) { if (!config) return; @@ -2342,7 +2360,7 @@ sh_css_get_baa_config(const struct ia_css_isp_parameters *params, static void sh_css_set_dz_config(struct ia_css_isp_parameters *params, - const struct ia_css_dz_config *config) + const struct ia_css_dz_config *config) { if (!config) return; @@ -2363,7 +2381,7 @@ sh_css_set_dz_config(struct ia_css_isp_parameters *params, static void sh_css_get_dz_config(const struct ia_css_isp_parameters *params, - struct ia_css_dz_config *config) + struct ia_css_dz_config *config) { if (!config) return; @@ -2378,7 +2396,7 @@ sh_css_get_dz_config(const struct ia_css_isp_parameters *params, static void sh_css_set_motion_vector(struct ia_css_isp_parameters *params, - const struct ia_css_vector *motion) + const struct ia_css_vector *motion) { if (!motion) return; @@ -2396,7 +2414,7 @@ sh_css_set_motion_vector(struct ia_css_isp_parameters *params, static void sh_css_get_motion_vector(const struct ia_css_isp_parameters *params, - struct ia_css_vector *motion) + struct ia_css_vector *motion) { if (!motion) return; @@ -2412,8 +2430,7 @@ sh_css_get_motion_vector(const struct ia_css_isp_parameters *params, struct ia_css_isp_config * sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe) { - if (!pipe) - { + if (!pipe) { IA_CSS_ERROR("pipe=%p", NULL); return NULL; } @@ -2422,18 +2439,16 @@ sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe) enum ia_css_err ia_css_stream_set_isp_config( - struct ia_css_stream *stream, - const struct ia_css_isp_config *config) -{ + struct ia_css_stream *stream, + const struct ia_css_isp_config *config) { return ia_css_stream_set_isp_config_on_pipe(stream, config, NULL); } enum ia_css_err ia_css_stream_set_isp_config_on_pipe( - struct ia_css_stream *stream, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe) -{ + struct ia_css_stream *stream, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; if ((!stream) || (!config)) @@ -2454,8 +2469,7 @@ ia_css_stream_set_isp_config_on_pipe( enum ia_css_err ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, - struct ia_css_isp_config *config) -{ + struct ia_css_isp_config *config) { struct ia_css_pipe *pipe_in = pipe; enum ia_css_err err = IA_CSS_SUCCESS; @@ -2478,10 +2492,9 @@ ia_css_pipe_set_isp_config(struct ia_css_pipe *pipe, static enum ia_css_err sh_css_set_global_isp_config_on_pipe( - struct ia_css_pipe *curr_pipe, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe) -{ + struct ia_css_pipe *curr_pipe, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe) { enum ia_css_err err = IA_CSS_SUCCESS; enum ia_css_err err1 = IA_CSS_SUCCESS; enum ia_css_err err2 = IA_CSS_SUCCESS; @@ -2508,10 +2521,9 @@ sh_css_set_global_isp_config_on_pipe( #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) static enum ia_css_err sh_css_set_per_frame_isp_config_on_pipe( - struct ia_css_stream *stream, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe) -{ + struct ia_css_stream *stream, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe) { unsigned int i; bool per_frame_config_created = false; enum ia_css_err err = IA_CSS_SUCCESS; @@ -2525,7 +2537,8 @@ sh_css_set_per_frame_isp_config_on_pipe( IA_CSS_ENTER_PRIVATE("stream=%p, config=%p, pipe=%p", stream, config, pipe); - if (!pipe) { + if (!pipe) + { err = IA_CSS_ERR_INVALID_ARGUMENTS; goto exit; } @@ -2545,7 +2558,8 @@ sh_css_set_per_frame_isp_config_on_pipe( params = stream->per_frame_isp_params_configs; /* update new ISP params object with the new config */ - if (!sh_css_init_isp_params_from_global(stream, params, false, pipe)) { + if (!sh_css_init_isp_params_from_global(stream, params, false, pipe)) + { err1 = IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2571,8 +2585,8 @@ sh_css_set_per_frame_isp_config_on_pipe( * We do not return this error immediately, but instead continue with updating the ISP params * to enable testing of features which are currently in TR phase. */ err = (err1 != IA_CSS_SUCCESS) ? err1 : - (err2 != IA_CSS_SUCCESS) ? err2 : - (err3 != IA_CSS_SUCCESS) ? err3 : err; + (err2 != IA_CSS_SUCCESS) ? err2 : + (err3 != IA_CSS_SUCCESS) ? err3 : err; exit: IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -2581,10 +2595,9 @@ sh_css_set_per_frame_isp_config_on_pipe( static enum ia_css_err sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, - struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config, - struct ia_css_pipe *pipe_in) -{ + struct ia_css_isp_parameters *params, + const struct ia_css_isp_config *config, + struct ia_css_pipe *pipe_in) { enum ia_css_err err = IA_CSS_SUCCESS; bool is_dp_10bpp = true; @@ -2598,8 +2611,8 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, sh_css_set_ee_config(params, config->ee_config); sh_css_set_baa_config(params, config->baa_config); if ((pipe->mode < IA_CSS_PIPE_ID_NUM) && - (params->pipe_dvs_6axis_config[pipe->mode])) - sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); + (params->pipe_dvs_6axis_config[pipe->mode])) + sh_css_set_pipe_dvs_6axis_config(pipe, params, config->dvs_6axis_config); sh_css_set_dz_config(params, config->dz_config); sh_css_set_motion_vector(params, config->motion_vector); sh_css_update_shading_table_status(pipe_in, params); @@ -2608,9 +2621,9 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, sh_css_set_macc_table(params, config->macc_table); sh_css_set_gamma_table(params, config->gamma_table); sh_css_set_ctc_table(params, config->ctc_table); -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ sh_css_set_shading_settings(params, config->shading_settings); -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ params->dis_coef_table_changed = (config->dvs_coefs); params->dvs2_coef_table_changed = (config->dvs2_coefs); @@ -2628,7 +2641,8 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, #endif if (IA_CSS_SUCCESS == - sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) { + sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) + { /* return an error when both DPC and BDS is enabled by the * user. */ /* we do not exit from this point immediately to allow internal @@ -2636,7 +2650,8 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, if (is_dp_10bpp) { err = IA_CSS_ERR_INVALID_ARGUMENTS; } - } else { + } else + { err = IA_CSS_ERR_INTERNAL_ERROR; goto exit; } @@ -2651,8 +2666,8 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, void ia_css_stream_get_isp_config( - const struct ia_css_stream *stream, - struct ia_css_isp_config *config) + const struct ia_css_stream *stream, + struct ia_css_isp_config *config) { IA_CSS_ENTER("void"); ia_css_pipe_get_isp_config(stream->pipes[0], config); @@ -2661,7 +2676,7 @@ ia_css_stream_get_isp_config( void ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, - struct ia_css_isp_config *config) + struct ia_css_isp_config *config) { struct ia_css_isp_parameters *params = NULL; @@ -2683,9 +2698,9 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, sh_css_get_ctc_table(params, config->ctc_table); sh_css_get_dz_config(params, config->dz_config); sh_css_get_motion_vector(params, config->motion_vector); -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ sh_css_get_shading_settings(params, config->shading_settings); -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ config->output_frame = params->output_frame; config->isp_config_id = params->isp_parameters_id; @@ -2700,12 +2715,12 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, * Deprecated: Implement mmgr_realloc() */ static bool realloc_isp_css_mm_buf( - hrt_vaddress *curr_buf, - size_t *curr_size, - size_t needed_size, - bool force, - enum ia_css_err *err, - uint16_t mmgr_attribute) + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err, + uint16_t mmgr_attribute) { s32 id; @@ -2728,7 +2743,7 @@ static bool realloc_isp_css_mm_buf( id = IA_CSS_REFCOUNT_PARAM_BUFFER; ia_css_refcount_decrement(id, *curr_buf); *curr_buf = ia_css_refcount_increment(id, mmgr_alloc_attr(needed_size, - mmgr_attribute)); + mmgr_attribute)); if (!*curr_buf) { *err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -2741,11 +2756,11 @@ static bool realloc_isp_css_mm_buf( } static bool reallocate_buffer( - hrt_vaddress *curr_buf, - size_t *curr_size, - size_t needed_size, - bool force, - enum ia_css_err *err) + hrt_vaddress *curr_buf, + size_t *curr_size, + size_t needed_size, + bool force, + enum ia_css_err *err) { bool ret; u16 mmgr_attribute = MMGR_ATTRIBUTE_DEFAULT; @@ -2753,7 +2768,7 @@ static bool reallocate_buffer( IA_CSS_ENTER_PRIVATE("void"); ret = realloc_isp_css_mm_buf(curr_buf, - curr_size, needed_size, force, err, mmgr_attribute); + curr_size, needed_size, force, err, mmgr_attribute); IA_CSS_LEAVE_PRIVATE("ret=%d", ret); return ret; @@ -2780,8 +2795,8 @@ ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) if (grid->use_dmem) { me->dmem_size = sizeof(struct ia_css_3a_output) * - grid->aligned_width * - grid->aligned_height; + grid->aligned_width * + grid->aligned_height; } else { me->vmem_size = ISP_S3ATBL_HI_LO_STRIDE_BYTES * grid->aligned_height; @@ -2876,7 +2891,8 @@ ia_css_metadata_free(struct ia_css_metadata *me) } void -ia_css_metadata_free_multiple(unsigned int num_bufs, struct ia_css_metadata **bufs) +ia_css_metadata_free_multiple(unsigned int num_bufs, + struct ia_css_metadata **bufs) { unsigned int i; @@ -2890,8 +2906,7 @@ static unsigned int g_param_buffer_dequeue_count; static unsigned int g_param_buffer_enqueue_count; enum ia_css_err -ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) -{ +ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) { enum ia_css_err err = IA_CSS_SUCCESS; unsigned int i; struct sh_css_ddr_address_map *ddr_ptrs; @@ -2901,7 +2916,8 @@ ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) assert(stream); IA_CSS_ENTER_PRIVATE("void"); - if (!stream) { + if (!stream) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } @@ -2916,7 +2932,8 @@ ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) goto ERR; params = stream->isp_params_configs; - if (!sh_css_init_isp_params_from_global(stream, params, true, NULL)) { + if (!sh_css_init_isp_params_from_global(stream, params, true, NULL)) + { /* we do not return the error immediately to enable internal * firmware feature testing */ err = IA_CSS_ERR_INVALID_ARGUMENTS; @@ -2926,7 +2943,8 @@ ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) ddr_ptrs_size = ¶ms->ddr_ptrs_size; /* create per pipe reference to general ddr_ptrs */ - for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + { ref_sh_css_ddr_address_map(ddr_ptrs, ¶ms->pipe_ddr_ptrs[i]); params->pipe_ddr_ptrs_size[i] = *ddr_ptrs_size; } @@ -2938,8 +2956,8 @@ ia_css_stream_isp_parameters_init(struct ia_css_stream *stream) static void ia_css_set_sdis_config( - struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *dvs_coefs) + struct ia_css_isp_parameters *params, + const struct ia_css_dvs_coefficients *dvs_coefs) { ia_css_set_sdis_horicoef_config(params, dvs_coefs); ia_css_set_sdis_vertcoef_config(params, dvs_coefs); @@ -2949,8 +2967,8 @@ ia_css_set_sdis_config( static void ia_css_set_sdis2_config( - struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *dvs2_coefs) + struct ia_css_isp_parameters *params, + const struct ia_css_dvs2_coefficients *dvs2_coefs) { ia_css_set_sdis2_horicoef_config(params, dvs2_coefs); ia_css_set_sdis2_vertcoef_config(params, dvs2_coefs); @@ -2960,8 +2978,7 @@ ia_css_set_sdis2_config( static enum ia_css_err sh_css_create_isp_params(struct ia_css_stream *stream, - struct ia_css_isp_parameters **isp_params_out) -{ + struct ia_css_isp_parameters **isp_params_out) { bool succ = true; unsigned int i; struct sh_css_ddr_address_map *ddr_ptrs; @@ -2969,7 +2986,7 @@ sh_css_create_isp_params(struct ia_css_stream *stream, enum ia_css_err err = IA_CSS_SUCCESS; size_t params_size; struct ia_css_isp_parameters *params = - sh_css_malloc(sizeof(struct ia_css_isp_parameters)); + sh_css_malloc(sizeof(struct ia_css_isp_parameters)); if (!params) { @@ -2978,18 +2995,20 @@ sh_css_create_isp_params(struct ia_css_stream *stream, IA_CSS_ERROR("%s:%d error: cannot allocate memory", __FILE__, __LINE__); IA_CSS_LEAVE_ERR_PRIVATE(err); return err; - } else { + } else + { memset(params, 0, sizeof(struct ia_css_isp_parameters)); } ddr_ptrs = ¶ms->ddr_ptrs; ddr_ptrs_size = ¶ms->ddr_ptrs_size; - for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) + { memset(¶ms->pipe_ddr_ptrs[i], 0, - sizeof(params->pipe_ddr_ptrs[i])); + sizeof(params->pipe_ddr_ptrs[i])); memset(¶ms->pipe_ddr_ptrs_size[i], 0, - sizeof(params->pipe_ddr_ptrs_size[i])); + sizeof(params->pipe_ddr_ptrs_size[i])); } memset(ddr_ptrs, 0, sizeof(*ddr_ptrs)); @@ -2998,14 +3017,14 @@ sh_css_create_isp_params(struct ia_css_stream *stream, params_size = sizeof(params->uds); ddr_ptrs_size->isp_param = params_size; ddr_ptrs->isp_param = - ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, - mmgr_malloc(params_size)); + ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, + mmgr_malloc(params_size)); succ &= (ddr_ptrs->isp_param != mmgr_NULL); ddr_ptrs_size->macc_tbl = sizeof(struct ia_css_macc_table); ddr_ptrs->macc_tbl = - ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, - mmgr_malloc(sizeof(struct ia_css_macc_table))); + ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, + mmgr_malloc(sizeof(struct ia_css_macc_table))); succ &= (ddr_ptrs->macc_tbl != mmgr_NULL); *isp_params_out = params; @@ -3014,14 +3033,15 @@ sh_css_create_isp_params(struct ia_css_stream *stream, static bool sh_css_init_isp_params_from_global(struct ia_css_stream *stream, - struct ia_css_isp_parameters *params, - bool use_default_config, - struct ia_css_pipe *pipe_in) + struct ia_css_isp_parameters *params, + bool use_default_config, + struct ia_css_pipe *pipe_in) { bool retval = true; int i = 0; bool is_dp_10bpp = true; - unsigned int isp_pipe_version = ia_css_pipe_get_isp_pipe_version(stream->pipes[0]); + unsigned int isp_pipe_version = ia_css_pipe_get_isp_pipe_version( + stream->pipes[0]); struct ia_css_isp_parameters *stream_params = stream->isp_params_configs; if (!use_default_config && !stream_params) { @@ -3032,8 +3052,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, params->output_frame = NULL; params->isp_parameters_id = 0; - if (use_default_config) - { + if (use_default_config) { ia_css_set_xnr3_config(params, &default_xnr3_config); sh_css_set_nr_config(params, &default_nr_config); @@ -3046,9 +3065,9 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, sh_css_set_ctc_table(params, &default_ctc_table); sh_css_set_baa_config(params, &default_baa_config); sh_css_set_dz_config(params, &default_dz_config); -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ sh_css_set_shading_settings(params, &default_shading_settings); -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ ia_css_set_s3a_config(params, &default_3a_config); ia_css_set_wb_config(params, &default_wb_config); @@ -3061,7 +3080,8 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, #else for (i = 0; i < stream->num_pipes; i++) { - if (sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp) == IA_CSS_SUCCESS) { + if (sh_css_select_dp_10bpp_config(stream->pipes[i], + &is_dp_10bpp) == IA_CSS_SUCCESS) { /* set the return value as false if both DPC and * BDS is enabled by the user. But we do not return * the value immediately to enable internal firmware @@ -3126,8 +3146,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, #ifdef ISP2401 ia_css_tnr3_set_default_config(¶ms->tnr3_config); #endif - } else - { + } else { ia_css_set_xnr3_config(params, &stream_params->xnr3_config); sh_css_set_nr_config(params, &stream_params->nr_config); @@ -3140,9 +3159,9 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, sh_css_set_ctc_table(params, &stream_params->ctc_table); sh_css_set_baa_config(params, &stream_params->bds_config); sh_css_set_dz_config(params, &stream_params->dz_config); -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ sh_css_set_shading_settings(params, &stream_params->shading_settings); -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ ia_css_set_s3a_config(params, &stream_params->s3a_config); ia_css_set_wb_config(params, &stream_params->wb_config); @@ -3173,7 +3192,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, for (i = 0; i < stream->num_pipes; i++) { if (IA_CSS_SUCCESS == - sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) { + sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) { /* set the return value as false if both DPC and * BDS is enabled by the user. But we do not return * the value immediately to enable internal firmware @@ -3190,7 +3209,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, } if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { sh_css_set_dp_config(stream->pipes[i], params, - &stream_params->pipe_dp_config[stream->pipes[i]->mode]); + &stream_params->pipe_dp_config[stream->pipes[i]->mode]); ia_css_set_param_exceptions(stream->pipes[i], params); #endif } else { @@ -3204,7 +3223,8 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, #endif params->fpn_config.data = stream_params->fpn_config.data; - params->config_changed[IA_CSS_FPN_ID] = stream_params->config_changed[IA_CSS_FPN_ID]; + params->config_changed[IA_CSS_FPN_ID] = + stream_params->config_changed[IA_CSS_FPN_ID]; params->fpn_config.enabled = stream_params->fpn_config.enabled; sh_css_set_motion_vector(params, &stream_params->motion_config); @@ -3225,10 +3245,10 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, if (stream_params->pipe_dvs_6axis_config[i]) { if (params->pipe_dvs_6axis_config[i]) { copy_dvs_6axis_table(params->pipe_dvs_6axis_config[i], - stream_params->pipe_dvs_6axis_config[i]); + stream_params->pipe_dvs_6axis_config[i]); } else { params->pipe_dvs_6axis_config[i] = - generate_dvs_6axis_table_from_config(stream_params->pipe_dvs_6axis_config[i]); + generate_dvs_6axis_table_from_config(stream_params->pipe_dvs_6axis_config[i]); } } } @@ -3245,8 +3265,7 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, } enum ia_css_err -sh_css_params_init(void) -{ +sh_css_params_init(void) { int i, p; IA_CSS_ENTER_PRIVATE("void"); @@ -3255,16 +3274,17 @@ sh_css_params_init(void) g_param_buffer_dequeue_count = 0; g_param_buffer_enqueue_count = 0; - for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) { + for (p = 0; p < IA_CSS_PIPE_ID_NUM; p++) + { for (i = 0; i < SH_CSS_MAX_STAGES; i++) { xmem_sp_stage_ptrs[p][i] = - ia_css_refcount_increment(-1, - mmgr_calloc(1, - sizeof(struct sh_css_sp_stage))); + ia_css_refcount_increment(-1, + mmgr_calloc(1, + sizeof(struct sh_css_sp_stage))); xmem_isp_stage_ptrs[p][i] = - ia_css_refcount_increment(-1, - mmgr_calloc(1, - sizeof(struct sh_css_isp_stage))); + ia_css_refcount_increment(-1, + mmgr_calloc(1, + sizeof(struct sh_css_isp_stage))); if ((xmem_sp_stage_ptrs[p][i] == mmgr_NULL) || (xmem_isp_stage_ptrs[p][i] == mmgr_NULL)) { @@ -3281,13 +3301,14 @@ sh_css_params_init(void) ia_css_config_xnr_table(); sp_ddr_ptrs = ia_css_refcount_increment(-1, mmgr_calloc(1, - CEIL_MUL(sizeof(struct sh_css_ddr_address_map), - HIVE_ISP_DDR_WORD_BYTES))); + CEIL_MUL(sizeof(struct sh_css_ddr_address_map), + HIVE_ISP_DDR_WORD_BYTES))); xmem_sp_group_ptrs = ia_css_refcount_increment(-1, mmgr_calloc(1, - sizeof(struct sh_css_sp_group))); + sizeof(struct sh_css_sp_group))); if ((sp_ddr_ptrs == mmgr_NULL) || - (xmem_sp_group_ptrs == mmgr_NULL)) { + (xmem_sp_group_ptrs == mmgr_NULL)) + { ia_css_uninit(); IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -3339,7 +3360,7 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, * ia_css_init() has been called. */ if (pipe->stream && pipe->stream->started) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "unable to set scaler lut since stream has started\n"); + "unable to set scaler lut since stream has started\n"); #ifndef ISP2401 store = false; #else @@ -3365,21 +3386,22 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; #else ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "unable to allocate scaler_pp_lut\n"); + "unable to allocate scaler_pp_lut\n"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } else { gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, - interleaved_lut_temp); + interleaved_lut_temp); mmgr_store(pipe->scaler_pp_lut, - (int *)interleaved_lut_temp, - sizeof(zoom_table)); + (int *)interleaved_lut_temp, + sizeof(zoom_table)); #endif } #ifndef ISP2401 - gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, interleaved_lut_temp); + gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, + interleaved_lut_temp); mmgr_store(pipe->scaler_pp_lut, (int *)interleaved_lut_temp, - sizeof(zoom_table)); + sizeof(zoom_table)); #endif } @@ -3419,9 +3441,9 @@ enum ia_css_err sh_css_params_map_and_store_default_gdc_lut(void) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])zoom_table, - interleaved_lut_temp); + interleaved_lut_temp); mmgr_store(default_gdc_lut, (int *)interleaved_lut_temp, - sizeof(zoom_table)); + sizeof(zoom_table)); IA_CSS_LEAVE_PRIVATE("lut(%u) err=%d", default_gdc_lut, err); return err; @@ -3443,7 +3465,7 @@ hrt_vaddress sh_css_params_get_default_gdc_lut(void) } static void free_param_set_callback( - hrt_vaddress ptr) + hrt_vaddress ptr) { IA_CSS_ENTER_PRIVATE("void"); @@ -3453,7 +3475,7 @@ static void free_param_set_callback( } static void free_buffer_callback( - hrt_vaddress ptr) + hrt_vaddress ptr) { IA_CSS_ENTER_PRIVATE("void"); @@ -3492,7 +3514,7 @@ static void free_map(struct sh_css_ddr_address_map *map) /* free buffers */ for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / - sizeof(size_t)); i++) { + sizeof(size_t)); i++) { if (addrs[i] == mmgr_NULL) continue; safe_free(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); @@ -3507,7 +3529,7 @@ ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) int i; struct ia_css_isp_parameters *params = stream->isp_params_configs; struct ia_css_isp_parameters *per_frame_params = - stream->per_frame_isp_params_configs; + stream->per_frame_isp_params_configs; IA_CSS_ENTER_PRIVATE("void"); if (!params) { @@ -3516,8 +3538,7 @@ ia_css_stream_isp_parameters_uninit(struct ia_css_stream *stream) } /* free existing ddr_ptr maps */ - for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) - { + for (i = 0; i < IA_CSS_PIPE_ID_NUM; i++) { free_map(¶ms->pipe_ddr_ptrs[i]); if (per_frame_params) free_map(&per_frame_params->pipe_ddr_ptrs[i]); @@ -3587,10 +3608,10 @@ sh_css_params_uninit(void) static struct ia_css_host_data * convert_allocate_morph_plane( - unsigned short *data, - unsigned int width, - unsigned int height, - unsigned int aligned_width) + unsigned short *data, + unsigned int width, + unsigned int height, + unsigned int aligned_width) { unsigned int i, j, padding, w; struct ia_css_host_data *me; @@ -3635,18 +3656,18 @@ convert_allocate_morph_plane( static enum ia_css_err store_morph_plane( - unsigned short *data, - unsigned int width, - unsigned int height, - hrt_vaddress dest, - unsigned int aligned_width) -{ + unsigned short *data, + unsigned int width, + unsigned int height, + hrt_vaddress dest, + unsigned int aligned_width) { struct ia_css_host_data *isp_data; assert(dest != mmgr_NULL); isp_data = convert_allocate_morph_plane(data, width, height, aligned_width); - if (!isp_data) { + if (!isp_data) + { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } @@ -3657,8 +3678,8 @@ store_morph_plane( } static void sh_css_update_isp_params_to_ddr( - struct ia_css_isp_parameters *params, - hrt_vaddress ddr_ptr) + struct ia_css_isp_parameters *params, + hrt_vaddress ddr_ptr) { size_t size = sizeof(params->uds); @@ -3671,16 +3692,17 @@ static void sh_css_update_isp_params_to_ddr( } static void sh_css_update_isp_mem_params_to_ddr( - const struct ia_css_binary *binary, - hrt_vaddress ddr_mem_ptr, - size_t size, - enum ia_css_isp_memories mem) + const struct ia_css_binary *binary, + hrt_vaddress ddr_mem_ptr, + size_t size, + enum ia_css_isp_memories mem) { const struct ia_css_host_data *params; IA_CSS_ENTER_PRIVATE("void"); - params = ia_css_isp_param_get_mem_init(&binary->mem_params, IA_CSS_PARAM_CLASS_PARAM, mem); + params = ia_css_isp_param_get_mem_init(&binary->mem_params, + IA_CSS_PARAM_CLASS_PARAM, mem); mmgr_store(ddr_mem_ptr, params->address, size); IA_CSS_LEAVE_PRIVATE("void"); @@ -3691,8 +3713,9 @@ void ia_css_dequeue_param_buffers(/*unsigned int pipe_num*/ void) unsigned int i; hrt_vaddress cpy; enum sh_css_queue_id param_queue_ids[3] = { IA_CSS_PARAMETER_SET_QUEUE_ID, - IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID, - SH_CSS_INVALID_QUEUE_ID}; + IA_CSS_PER_FRAME_PARAMETER_SET_QUEUE_ID, + SH_CSS_INVALID_QUEUE_ID + }; IA_CSS_ENTER_PRIVATE("void"); @@ -3705,15 +3728,16 @@ void ia_css_dequeue_param_buffers(/*unsigned int pipe_num*/ void) for (i = 0; SH_CSS_INVALID_QUEUE_ID != param_queue_ids[i]; i++) { cpy = (hrt_vaddress)0; /* clean-up old copy */ - while (ia_css_bufq_dequeue_buffer(param_queue_ids[i], (uint32_t *)&cpy) == IA_CSS_SUCCESS) { + while (ia_css_bufq_dequeue_buffer(param_queue_ids[i], + (uint32_t *)&cpy) == IA_CSS_SUCCESS) { /* TMP: keep track of dequeued param set count */ g_param_buffer_dequeue_count++; ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, - 0, - param_queue_ids[i], - 0); + IA_CSS_PSYS_SW_EVENT_BUFFER_DEQUEUED, + 0, + param_queue_ids[i], + 0); IA_CSS_LOG("dequeued param set %x from %d, release ref", cpy, 0); free_ia_css_isp_parameter_set_info(cpy); @@ -3740,7 +3764,7 @@ process_kernel_parameters(unsigned int pipe_id, if (params->config_changed[IA_CSS_OB_ID]) { ia_css_ob_configure(¶ms->stream_configs.ob, - isp_pipe_version, raw_bit_depth); + isp_pipe_version, raw_bit_depth); } if (params->config_changed[IA_CSS_S3A_ID]) { ia_css_s3a_configure(raw_bit_depth); @@ -3761,10 +3785,9 @@ process_kernel_parameters(unsigned int pipe_id, enum ia_css_err sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, - struct ia_css_isp_parameters *params, - bool commit, - struct ia_css_pipe *pipe_in) -{ + struct ia_css_isp_parameters *params, + bool commit, + struct ia_css_pipe *pipe_in) { enum ia_css_err err = IA_CSS_SUCCESS; hrt_vaddress cpy; int i; @@ -3781,13 +3804,15 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, raw_bit_depth = ia_css_stream_input_format_bits_per_pixel(curr_pipe->stream); /* now make the map available to the sp */ - if (!commit) { + if (!commit) + { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } /* enqueue a copies of the mem_map to the designated pipelines */ - for (i = 0; i < curr_pipe->stream->num_pipes; i++) { + for (i = 0; i < curr_pipe->stream->num_pipes; i++) + { struct ia_css_pipe *pipe; struct sh_css_ddr_address_map *cur_map; struct sh_css_ddr_address_map_size *cur_map_size; @@ -3805,11 +3830,12 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) ia_css_query_internal_queue_id(params->output_frame - ? IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET - : IA_CSS_BUFFER_TYPE_PARAMETER_SET, - thread_id, &queue_id); + ? IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET + : IA_CSS_BUFFER_TYPE_PARAMETER_SET, + thread_id, &queue_id); #else - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, &queue_id); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_PARAMETER_SET, thread_id, + &queue_id); #endif if (!sh_css_sp_is_running()) { /* SP is not running. The queues are not valid */ @@ -3828,9 +3854,9 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, /* we have to do this per pipeline because */ /* the processing is a.o. resolution dependent */ err = ia_css_process_zoom_and_motion(params, - pipeline->stages); + pipeline->stages); if (err != IA_CSS_SUCCESS) - return err; + return err; } /* check if to actually update the parameters for this pipe */ /* When API change is implemented making good distinction between @@ -3849,16 +3875,16 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, continue; process_kernel_parameters(pipeline->pipe_id, - stage, params, - isp_pipe_version, raw_bit_depth); + stage, params, + isp_pipe_version, raw_bit_depth); err = sh_css_params_write_to_ddr_internal( - pipe, - pipeline->pipe_id, - params, - stage, - cur_map, - cur_map_size); + pipe, + pipeline->pipe_id, + params, + stage, + cur_map, + cur_map_size); if (err != IA_CSS_SUCCESS) break; @@ -3872,10 +3898,10 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, /* update isp_params to pipe specific copies */ if (params->isp_params_changed) { reallocate_buffer(&cur_map->isp_param, - &cur_map_size->isp_param, - cur_map_size->isp_param, - true, - &err); + &cur_map_size->isp_param, + cur_map_size->isp_param, + true, + &err); if (err != IA_CSS_SUCCESS) break; sh_css_update_isp_params_to_ddr(params, cur_map->isp_param); @@ -3883,8 +3909,8 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, /* last make referenced copy */ err = ref_sh_css_ddr_address_map( - cur_map, - &isp_params_info.mem_map); + cur_map, + &isp_params_info.mem_map); if (err != IA_CSS_SUCCESS) break; @@ -3893,7 +3919,7 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, /* Update output frame pointer */ isp_params_info.output_frame_ptr = - (params->output_frame) ? params->output_frame->data : mmgr_NULL; + (params->output_frame) ? params->output_frame->data : mmgr_NULL; /* now write the copy to ddr */ err = write_ia_css_isp_parameter_set_info_to_ddr(&isp_params_info, &cpy); @@ -3908,9 +3934,9 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, free_ia_css_isp_parameter_set_info(cpy); #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) IA_CSS_LOG("pfp: FAILED to add config id %d for OF %d to q %d on thread %d", - isp_params_info.isp_parameters_id, - isp_params_info.output_frame_ptr, - queue_id, thread_id); + isp_params_info.isp_parameters_id, + isp_params_info.output_frame_ptr, + queue_id, thread_id); #endif break; } else { @@ -3932,15 +3958,15 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; } ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, - (uint8_t)thread_id, - (uint8_t)queue_id, - 0); + IA_CSS_PSYS_SW_EVENT_BUFFER_ENQUEUED, + (uint8_t)thread_id, + (uint8_t)queue_id, + 0); #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) IA_CSS_LOG("pfp: added config id %d for OF %d to q %d on thread %d", - isp_params_info.isp_parameters_id, - isp_params_info.output_frame_ptr, - queue_id, thread_id); + isp_params_info.isp_parameters_id, + isp_params_info.output_frame_ptr, + queue_id, thread_id); #endif } /* clean-up old copy */ @@ -3956,9 +3982,9 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, params->morph_table_changed = false; params->dz_config_changed = false; params->motion_config_changed = false; -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ params->shading_settings_changed = false; -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ memset(¶ms->config_changed[0], 0, sizeof(params->config_changed)); @@ -3968,13 +3994,12 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, static enum ia_css_err sh_css_params_write_to_ddr_internal( - struct ia_css_pipe *pipe, - unsigned int pipe_id, - struct ia_css_isp_parameters *params, - const struct ia_css_pipeline_stage *stage, - struct sh_css_ddr_address_map *ddr_map, - struct sh_css_ddr_address_map_size *ddr_map_size) -{ + struct ia_css_pipe *pipe, + unsigned int pipe_id, + struct ia_css_isp_parameters *params, + const struct ia_css_pipeline_stage *stage, + struct sh_css_ddr_address_map *ddr_map, + struct sh_css_ddr_address_map_size *ddr_map_size) { enum ia_css_err err; const struct ia_css_binary *binary; @@ -3996,12 +4021,13 @@ sh_css_params_write_to_ddr_internal( stage_num = stage->stage_num; - if (binary->info->sp.enable.fpnr) { + if (binary->info->sp.enable.fpnr) + { buff_realloced = reallocate_buffer(&ddr_map->fpn_tbl, - &ddr_map_size->fpn_tbl, - (size_t)(FPNTBL_BYTES(binary)), - params->config_changed[IA_CSS_FPN_ID], - &err); + &ddr_map_size->fpn_tbl, + (size_t)(FPNTBL_BYTES(binary)), + params->config_changed[IA_CSS_FPN_ID], + &err); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -4017,15 +4043,16 @@ sh_css_params_write_to_ddr_internal( } } - if (binary->info->sp.enable.sc) { + if (binary->info->sp.enable.sc) + { u32 enable_conv = params-> - shading_settings.enable_shading_table_conversion; + shading_settings.enable_shading_table_conversion; buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, - &ddr_map_size->sc_tbl, - (size_t)(SCTBL_BYTES(binary)), - params->sc_table_changed, - &err); + &ddr_map_size->sc_tbl, + (size_t)(SCTBL_BYTES(binary)), + params->sc_table_changed, + &err); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -4055,7 +4082,7 @@ sh_css_params_write_to_ddr_internal( sh_css_params_shading_id_table_generate(¶ms->sc_config, binary); #else sh_css_params_shading_id_table_generate(¶ms->sc_config, - binary->sctbl_width_per_color, binary->sctbl_height); + binary->sctbl_width_per_color, binary->sctbl_height); #endif if (!params->sc_config) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); @@ -4077,17 +4104,17 @@ sh_css_params_write_to_ddr_internal( params->sc_config = NULL; } } else { /* legacy */ -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ /* shading table is full resolution, reduce */ if (params->sc_config) { ia_css_shading_table_free(params->sc_config); params->sc_config = NULL; } prepare_shading_table( - (const struct ia_css_shading_table *)params->sc_table, - params->sensor_binning, - ¶ms->sc_config, - binary, pipe->required_bds_factor); + (const struct ia_css_shading_table *)params->sc_table, + params->sensor_binning, + ¶ms->sc_config, + binary, pipe->required_bds_factor); if (!params->sc_config) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -4106,7 +4133,7 @@ sh_css_params_write_to_ddr_internal( /* free the shading table */ ia_css_shading_table_free(params->sc_config); params->sc_config = NULL; -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ } } } @@ -4114,27 +4141,33 @@ sh_css_params_write_to_ddr_internal( /* DPC configuration is made pipe specific to allow flexibility in positioning of the * DPC kernel. The code below sets the pipe specific configuration to * individual binaries. */ - if (params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) { - unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; + if (params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) + { + unsigned int size = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - unsigned int offset = stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; + unsigned int offset = + stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; if (size) { ia_css_dp_encode((struct sh_css_isp_dp_params *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->pipe_dp_config[pipe_id], size); + &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], + ¶ms->pipe_dp_config[pipe_id], size); #endif #ifdef ISP2401 params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; + params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = + true; } } #endif - if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) { + if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) + { unsigned int i, j, idx; unsigned int idx_map[] = { - 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8}; + 0, 1, 3, 2, 6, 7, 5, 4, 12, 13, 15, 14, 10, 11, 9, 8 + }; for (i = 0; i < IA_CSS_MACC_NUM_AXES; i++) { idx = 4 * idx_map[i]; @@ -4142,26 +4175,27 @@ sh_css_params_write_to_ddr_internal( if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_1) { converted_macc_table.data[idx] = - (int16_t)sDIGIT_FITTING(params->macc_table.data[j], - 13, SH_CSS_MACC_COEF_SHIFT); + (int16_t)sDIGIT_FITTING(params->macc_table.data[j], + 13, SH_CSS_MACC_COEF_SHIFT); converted_macc_table.data[idx + 1] = - (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 1], - 13, SH_CSS_MACC_COEF_SHIFT); + (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 1], + 13, SH_CSS_MACC_COEF_SHIFT); converted_macc_table.data[idx + 2] = - (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 2], - 13, SH_CSS_MACC_COEF_SHIFT); + (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 2], + 13, SH_CSS_MACC_COEF_SHIFT); converted_macc_table.data[idx + 3] = - (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 3], - 13, SH_CSS_MACC_COEF_SHIFT); - } else if (binary->info->sp.pipeline.isp_pipe_version == SH_CSS_ISP_PIPE_VERSION_2_2) { + (int16_t)sDIGIT_FITTING(params->macc_table.data[j + 3], + 13, SH_CSS_MACC_COEF_SHIFT); + } else if (binary->info->sp.pipeline.isp_pipe_version == + SH_CSS_ISP_PIPE_VERSION_2_2) { converted_macc_table.data[idx] = - params->macc_table.data[j]; + params->macc_table.data[j]; converted_macc_table.data[idx + 1] = - params->macc_table.data[j + 1]; + params->macc_table.data[j + 1]; converted_macc_table.data[idx + 2] = - params->macc_table.data[j + 2]; + params->macc_table.data[j + 2]; converted_macc_table.data[idx + 3] = - params->macc_table.data[j + 3]; + params->macc_table.data[j + 3]; } } reallocate_buffer(&ddr_map->macc_tbl, @@ -4174,21 +4208,22 @@ sh_css_params_write_to_ddr_internal( return err; } mmgr_store(ddr_map->macc_tbl, - converted_macc_table.data, - sizeof(converted_macc_table.data)); + converted_macc_table.data, + sizeof(converted_macc_table.data)); } - if (binary->info->sp.enable.dvs_6axis) { + if (binary->info->sp.enable.dvs_6axis) + { /* because UV is packed into the Y plane, calc total * YYU size = /2 gives size of UV-only, * total YYU size = UV-only * 3. */ buff_realloced = reallocate_buffer( - &ddr_map->dvs_6axis_params_y, - &ddr_map_size->dvs_6axis_params_y, - (size_t)((DVS_6AXIS_BYTES(binary) / 2) * 3), - params->pipe_dvs_6axis_config_changed[pipe_id], - &err); + &ddr_map->dvs_6axis_params_y, + &ddr_map_size->dvs_6axis_params_y, + (size_t)((DVS_6AXIS_BYTES(binary) / 2) * 3), + params->pipe_dvs_6axis_config_changed[pipe_id], + &err); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -4218,162 +4253,166 @@ sh_css_params_write_to_ddr_internal( if (binary->dvs_envelope.width || binary->dvs_envelope.height) { dvs_offset.width = #endif - (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; + (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; #ifndef ISP2401 dvs_offset.height = #else - dvs_offset.height = + dvs_offset.height = #endif - (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; + (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; #ifdef ISP2401 - } + } #endif - params->pipe_dvs_6axis_config[pipe_id] = - generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); - if (!params->pipe_dvs_6axis_config[pipe_id]) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); - return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - } - params->pipe_dvs_6axis_config_changed[pipe_id] = true; + params->pipe_dvs_6axis_config[pipe_id] = + generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); + if (!params->pipe_dvs_6axis_config[pipe_id]) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; } - - store_dvs_6axis_config(params->pipe_dvs_6axis_config[pipe_id], - binary, - dvs_in_frame_info, - ddr_map->dvs_6axis_params_y); - params->isp_params_changed = true; + params->pipe_dvs_6axis_config_changed[pipe_id] = true; } + + store_dvs_6axis_config(params->pipe_dvs_6axis_config[pipe_id], + binary, + dvs_in_frame_info, + ddr_map->dvs_6axis_params_y); + params->isp_params_changed = true; } +} - if (binary->info->sp.enable.ca_gdc) { - unsigned int i; - hrt_vaddress *virt_addr_tetra_x[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - size_t *virt_size_tetra_x[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - hrt_vaddress *virt_addr_tetra_y[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - size_t *virt_size_tetra_y[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - - virt_addr_tetra_x[0] = &ddr_map->tetra_r_x; - virt_addr_tetra_x[1] = &ddr_map->tetra_gr_x; - virt_addr_tetra_x[2] = &ddr_map->tetra_gb_x; - virt_addr_tetra_x[3] = &ddr_map->tetra_b_x; - virt_addr_tetra_x[4] = &ddr_map->tetra_ratb_x; - virt_addr_tetra_x[5] = &ddr_map->tetra_batr_x; - - virt_size_tetra_x[0] = &ddr_map_size->tetra_r_x; - virt_size_tetra_x[1] = &ddr_map_size->tetra_gr_x; - virt_size_tetra_x[2] = &ddr_map_size->tetra_gb_x; - virt_size_tetra_x[3] = &ddr_map_size->tetra_b_x; - virt_size_tetra_x[4] = &ddr_map_size->tetra_ratb_x; - virt_size_tetra_x[5] = &ddr_map_size->tetra_batr_x; - - virt_addr_tetra_y[0] = &ddr_map->tetra_r_y; - virt_addr_tetra_y[1] = &ddr_map->tetra_gr_y; - virt_addr_tetra_y[2] = &ddr_map->tetra_gb_y; - virt_addr_tetra_y[3] = &ddr_map->tetra_b_y; - virt_addr_tetra_y[4] = &ddr_map->tetra_ratb_y; - virt_addr_tetra_y[5] = &ddr_map->tetra_batr_y; - - virt_size_tetra_y[0] = &ddr_map_size->tetra_r_y; - virt_size_tetra_y[1] = &ddr_map_size->tetra_gr_y; - virt_size_tetra_y[2] = &ddr_map_size->tetra_gb_y; - virt_size_tetra_y[3] = &ddr_map_size->tetra_b_y; - virt_size_tetra_y[4] = &ddr_map_size->tetra_ratb_y; - virt_size_tetra_y[5] = &ddr_map_size->tetra_batr_y; - - buff_realloced = false; - for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { - buff_realloced |= - reallocate_buffer(virt_addr_tetra_x[i], - virt_size_tetra_x[i], - (size_t) - (MORPH_PLANE_BYTES(binary)), - params->morph_table_changed, - &err); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - buff_realloced |= - reallocate_buffer(virt_addr_tetra_y[i], - virt_size_tetra_y[i], - (size_t) - (MORPH_PLANE_BYTES(binary)), - params->morph_table_changed, - &err); +if (binary->info->sp.enable.ca_gdc) +{ + unsigned int i; + hrt_vaddress *virt_addr_tetra_x[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + size_t *virt_size_tetra_x[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + hrt_vaddress *virt_addr_tetra_y[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + size_t *virt_size_tetra_y[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + + virt_addr_tetra_x[0] = &ddr_map->tetra_r_x; + virt_addr_tetra_x[1] = &ddr_map->tetra_gr_x; + virt_addr_tetra_x[2] = &ddr_map->tetra_gb_x; + virt_addr_tetra_x[3] = &ddr_map->tetra_b_x; + virt_addr_tetra_x[4] = &ddr_map->tetra_ratb_x; + virt_addr_tetra_x[5] = &ddr_map->tetra_batr_x; + + virt_size_tetra_x[0] = &ddr_map_size->tetra_r_x; + virt_size_tetra_x[1] = &ddr_map_size->tetra_gr_x; + virt_size_tetra_x[2] = &ddr_map_size->tetra_gb_x; + virt_size_tetra_x[3] = &ddr_map_size->tetra_b_x; + virt_size_tetra_x[4] = &ddr_map_size->tetra_ratb_x; + virt_size_tetra_x[5] = &ddr_map_size->tetra_batr_x; + + virt_addr_tetra_y[0] = &ddr_map->tetra_r_y; + virt_addr_tetra_y[1] = &ddr_map->tetra_gr_y; + virt_addr_tetra_y[2] = &ddr_map->tetra_gb_y; + virt_addr_tetra_y[3] = &ddr_map->tetra_b_y; + virt_addr_tetra_y[4] = &ddr_map->tetra_ratb_y; + virt_addr_tetra_y[5] = &ddr_map->tetra_batr_y; + + virt_size_tetra_y[0] = &ddr_map_size->tetra_r_y; + virt_size_tetra_y[1] = &ddr_map_size->tetra_gr_y; + virt_size_tetra_y[2] = &ddr_map_size->tetra_gb_y; + virt_size_tetra_y[3] = &ddr_map_size->tetra_b_y; + virt_size_tetra_y[4] = &ddr_map_size->tetra_ratb_y; + virt_size_tetra_y[5] = &ddr_map_size->tetra_batr_y; + + buff_realloced = false; + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + buff_realloced |= + reallocate_buffer(virt_addr_tetra_x[i], + virt_size_tetra_x[i], + (size_t) + (MORPH_PLANE_BYTES(binary)), + params->morph_table_changed, + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + buff_realloced |= + reallocate_buffer(virt_addr_tetra_y[i], + virt_size_tetra_y[i], + (size_t) + (MORPH_PLANE_BYTES(binary)), + params->morph_table_changed, + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + if (params->morph_table_changed || buff_realloced) { + const struct ia_css_morph_table *table = params->morph_table; + struct ia_css_morph_table *id_table = NULL; + + if ((table) && + (table->width < binary->morph_tbl_width || + table->height < binary->morph_tbl_height)) { + table = NULL; + } + if (!table) { + err = sh_css_params_default_morph_table(&id_table, + binary); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } + table = id_table; } - if (params->morph_table_changed || buff_realloced) { - const struct ia_css_morph_table *table = params->morph_table; - struct ia_css_morph_table *id_table = NULL; - - if ((table) && - (table->width < binary->morph_tbl_width || - table->height < binary->morph_tbl_height)) { - table = NULL; - } - if (!table) { - err = sh_css_params_default_morph_table(&id_table, - binary); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - table = id_table; - } - for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { - store_morph_plane(table->coordinates_x[i], - table->width, - table->height, - *virt_addr_tetra_x[i], - binary->morph_tbl_aligned_width); - store_morph_plane(table->coordinates_y[i], - table->width, - table->height, - *virt_addr_tetra_y[i], - binary->morph_tbl_aligned_width); - } - if (id_table) - ia_css_morph_table_free(id_table); + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + store_morph_plane(table->coordinates_x[i], + table->width, + table->height, + *virt_addr_tetra_x[i], + binary->morph_tbl_aligned_width); + store_morph_plane(table->coordinates_y[i], + table->width, + table->height, + *virt_addr_tetra_y[i], + binary->morph_tbl_aligned_width); } + if (id_table) + ia_css_morph_table_free(id_table); } +} - /* After special cases like SC, FPN since they may change parameters */ - for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) { - const struct ia_css_isp_data *isp_data = - ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, IA_CSS_PARAM_CLASS_PARAM, mem); - size_t size = isp_data->size; - - if (!size) continue; - buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], - &ddr_map_size->isp_mem_param[stage_num][mem], - size, - params->isp_mem_params_changed[pipe_id][stage_num][mem], - &err); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (params->isp_mem_params_changed[pipe_id][stage_num][mem] || buff_realloced) { - sh_css_update_isp_mem_params_to_ddr(binary, - ddr_map->isp_mem_param[stage_num][mem], - ddr_map_size->isp_mem_param[stage_num][mem], mem); - } +/* After special cases like SC, FPN since they may change parameters */ +for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) +{ + const struct ia_css_isp_data *isp_data = + ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, + IA_CSS_PARAM_CLASS_PARAM, mem); + size_t size = isp_data->size; + + if (!size) continue; + buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], + &ddr_map_size->isp_mem_param[stage_num][mem], + size, + params->isp_mem_params_changed[pipe_id][stage_num][mem], + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (params->isp_mem_params_changed[pipe_id][stage_num][mem] || buff_realloced) { + sh_css_update_isp_mem_params_to_ddr(binary, + ddr_map->isp_mem_param[stage_num][mem], + ddr_map_size->isp_mem_param[stage_num][mem], mem); } +} - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; +IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); +return IA_CSS_SUCCESS; } -const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream *stream) +const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream + *stream) { struct ia_css_isp_parameters *params; @@ -4385,7 +4424,8 @@ const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream *stream return ¶ms->fpn_config; } -struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stream) +struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream + *stream) { struct ia_css_shading_table *table = NULL; struct ia_css_isp_parameters *params; @@ -4403,7 +4443,7 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stre table = (struct ia_css_shading_table *)params->sc_table; } else { const struct ia_css_binary *binary - = ia_css_stream_get_shading_correction_binary(stream); + = ia_css_stream_get_shading_correction_binary(stream); if (binary) { /* generate the identical shading table */ if (params->sc_config) { @@ -4415,7 +4455,7 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stre #else sh_css_params_shading_id_table_generate(¶ms->sc_config, - binary->sctbl_width_per_color, binary->sctbl_height); + binary->sctbl_width_per_color, binary->sctbl_height); #endif table = params->sc_config; /* The sc_config will be freed in the @@ -4423,9 +4463,9 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stre } } } else { -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ const struct ia_css_binary *binary - = ia_css_stream_get_shading_correction_binary(stream); + = ia_css_stream_get_shading_correction_binary(stream); struct ia_css_pipe *pipe; /**********************************************************************/ @@ -4446,16 +4486,16 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream *stre params->sc_config = NULL; } prepare_shading_table( - (const struct ia_css_shading_table *)params->sc_table, - params->sensor_binning, - ¶ms->sc_config, - binary, pipe->required_bds_factor); + (const struct ia_css_shading_table *)params->sc_table, + params->sensor_binning, + ¶ms->sc_config, + binary, pipe->required_bds_factor); table = params->sc_config; /* The sc_config will be freed in the * ia_css_stream_isp_parameters_uninit function. */ } -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ } IA_CSS_LEAVE("table=%p", table); @@ -4467,36 +4507,36 @@ hrt_vaddress sh_css_store_sp_group_to_ddr(void) { IA_CSS_ENTER_LEAVE_PRIVATE("void"); mmgr_store(xmem_sp_group_ptrs, - &sh_css_sp_group, - sizeof(struct sh_css_sp_group)); + &sh_css_sp_group, + sizeof(struct sh_css_sp_group)); return xmem_sp_group_ptrs; } hrt_vaddress sh_css_store_sp_stage_to_ddr( - unsigned int pipe, - unsigned int stage) + unsigned int pipe, + unsigned int stage) { IA_CSS_ENTER_LEAVE_PRIVATE("void"); mmgr_store(xmem_sp_stage_ptrs[pipe][stage], - &sh_css_sp_stage, - sizeof(struct sh_css_sp_stage)); + &sh_css_sp_stage, + sizeof(struct sh_css_sp_stage)); return xmem_sp_stage_ptrs[pipe][stage]; } hrt_vaddress sh_css_store_isp_stage_to_ddr( - unsigned int pipe, - unsigned int stage) + unsigned int pipe, + unsigned int stage) { IA_CSS_ENTER_LEAVE_PRIVATE("void"); mmgr_store(xmem_isp_stage_ptrs[pipe][stage], - &sh_css_isp_stage, - sizeof(struct sh_css_isp_stage)); + &sh_css_isp_stage, + sizeof(struct sh_css_isp_stage)); return xmem_isp_stage_ptrs[pipe][stage]; } static enum ia_css_err ref_sh_css_ddr_address_map( - struct sh_css_ddr_address_map *map, - struct sh_css_ddr_address_map *out) + struct sh_css_ddr_address_map *map, + struct sh_css_ddr_address_map *out) { enum ia_css_err err = IA_CSS_SUCCESS; unsigned int i; @@ -4522,11 +4562,12 @@ static enum ia_css_err ref_sh_css_ddr_address_map( /* copy map using size info */ for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / - sizeof(size_t)); i++) { + sizeof(size_t)); i++) { if (in_addrs.addrs[i] == mmgr_NULL) to_addrs.addrs[i] = mmgr_NULL; else - to_addrs.addrs[i] = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, in_addrs.addrs[i]); + to_addrs.addrs[i] = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_BUFFER, + in_addrs.addrs[i]); } IA_CSS_LEAVE_ERR_PRIVATE(err); @@ -4534,8 +4575,8 @@ static enum ia_css_err ref_sh_css_ddr_address_map( } static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( - struct ia_css_isp_parameter_set_info *me, - hrt_vaddress *out) + struct ia_css_isp_parameter_set_info *me, + hrt_vaddress *out) { enum ia_css_err err = IA_CSS_SUCCESS; bool succ; @@ -4546,11 +4587,11 @@ static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( assert(out); *out = ia_css_refcount_increment(IA_CSS_REFCOUNT_PARAM_SET_POOL, mmgr_malloc( - sizeof(struct ia_css_isp_parameter_set_info))); + sizeof(struct ia_css_isp_parameter_set_info))); succ = (*out != mmgr_NULL); if (succ) mmgr_store(*out, - me, sizeof(struct ia_css_isp_parameter_set_info)); + me, sizeof(struct ia_css_isp_parameter_set_info)); else err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -4560,18 +4601,19 @@ static enum ia_css_err write_ia_css_isp_parameter_set_info_to_ddr( static enum ia_css_err free_ia_css_isp_parameter_set_info( - hrt_vaddress ptr) -{ + hrt_vaddress ptr) { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_isp_parameter_set_info isp_params_info; unsigned int i; - hrt_vaddress *addrs = (hrt_vaddress *)&isp_params_info.mem_map; + hrt_vaddress *addrs = (hrt_vaddress *) &isp_params_info.mem_map; IA_CSS_ENTER_PRIVATE("ptr = %u", ptr); /* sanity check - ptr must be valid */ - if (!ia_css_refcount_is_valid(ptr)) { - IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_SET_POOL(0x%x) invalid arg", __func__, ptr); + if (!ia_css_refcount_is_valid(ptr)) + { + IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_SET_POOL(0x%x) invalid arg", __func__, + ptr); err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -4580,7 +4622,8 @@ free_ia_css_isp_parameter_set_info( mmgr_load(ptr, &isp_params_info.mem_map, sizeof(struct sh_css_ddr_address_map)); /* copy map using size info */ for (i = 0; i < (sizeof(struct sh_css_ddr_address_map_size) / - sizeof(size_t)); i++) { + sizeof(size_t)); i++) + { if (addrs[i] == mmgr_NULL) continue; @@ -4592,7 +4635,8 @@ free_ia_css_isp_parameter_set_info( ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); } else { #endif - IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_BUFFER(0x%x) invalid arg", __func__, ptr); + IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_BUFFER(0x%x) invalid arg", __func__, + ptr); err = IA_CSS_ERR_INVALID_ARGUMENTS; continue; } @@ -4648,16 +4692,16 @@ sh_css_invalidate_params(struct ia_css_stream *stream) void sh_css_update_uds_and_crop_info( - const struct ia_css_binary_info *info, - const struct ia_css_frame_info *in_frame_info, - const struct ia_css_frame_info *out_frame_info, - const struct ia_css_resolution *dvs_env, - const struct ia_css_dz_config *zoom, - const struct ia_css_vector *motion_vector, - struct sh_css_uds_info *uds, /* out */ - struct sh_css_crop_pos *sp_out_crop_pos, /* out */ - - bool enable_zoom) + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + + bool enable_zoom) { IA_CSS_ENTER_PRIVATE("void"); @@ -4692,9 +4736,9 @@ sh_css_update_uds_and_crop_info( * initialization. */ env_width = dvs_env->width - - SH_CSS_MIN_DVS_ENVELOPE; + SH_CSS_MIN_DVS_ENVELOPE; env_height = dvs_env->height - - SH_CSS_MIN_DVS_ENVELOPE; + SH_CSS_MIN_DVS_ENVELOPE; half_env_x = env_width / 2; half_env_y = env_height / 2; /** @@ -4704,21 +4748,21 @@ sh_css_update_uds_and_crop_info( */ if (upscale_x) { uds_xc = (in_frame_info->res.width - + env_width - + SH_CSS_MIN_DVS_ENVELOPE) / 2; + + env_width + + SH_CSS_MIN_DVS_ENVELOPE) / 2; } else { uds_xc = (out_frame_info->res.width - + env_width) / 2 - + SH_CSS_MIN_DVS_ENVELOPE; + + env_width) / 2 + + SH_CSS_MIN_DVS_ENVELOPE; } if (upscale_y) { uds_yc = (in_frame_info->res.height - + env_height - + SH_CSS_MIN_DVS_ENVELOPE) / 2; + + env_height + + SH_CSS_MIN_DVS_ENVELOPE) / 2; } else { uds_yc = (out_frame_info->res.height - + env_height) / 2 - + SH_CSS_MIN_DVS_ENVELOPE; + + env_height) / 2 + + SH_CSS_MIN_DVS_ENVELOPE; } /* clip the motion vector to +/- half the envelope */ motion_x = clamp(motion_x, -half_env_x, half_env_x); @@ -4750,17 +4794,17 @@ sh_css_update_uds_and_crop_info( /* video nodz: here we can only crop. We make sure we crop at least the first 8x8 pixels away. */ env_width = dvs_env->width - - SH_CSS_MIN_DVS_ENVELOPE; + SH_CSS_MIN_DVS_ENVELOPE; env_height = dvs_env->height - - SH_CSS_MIN_DVS_ENVELOPE; + SH_CSS_MIN_DVS_ENVELOPE; half_env_x = env_width / 2; half_env_y = env_height / 2; motion_x = clamp(motion_x, -half_env_x, half_env_x); motion_y = clamp(motion_y, -half_env_y, half_env_y); crop_x = SH_CSS_MIN_DVS_ENVELOPE - + half_env_x + motion_x; + + half_env_x + motion_x; crop_y = SH_CSS_MIN_DVS_ENVELOPE - + half_env_y + motion_y; + + half_env_y + motion_y; } /* Must enforce that the crop position is even */ @@ -4785,17 +4829,16 @@ sh_css_update_uds_and_crop_info( static enum ia_css_err sh_css_update_uds_and_crop_info_based_on_zoom_region( - const struct ia_css_binary_info *info, - const struct ia_css_frame_info *in_frame_info, - const struct ia_css_frame_info *out_frame_info, - const struct ia_css_resolution *dvs_env, - const struct ia_css_dz_config *zoom, - const struct ia_css_vector *motion_vector, - struct sh_css_uds_info *uds, /* out */ - struct sh_css_crop_pos *sp_out_crop_pos, /* out */ - struct ia_css_resolution pipe_in_res, - bool enable_zoom) -{ + const struct ia_css_binary_info *info, + const struct ia_css_frame_info *in_frame_info, + const struct ia_css_frame_info *out_frame_info, + const struct ia_css_resolution *dvs_env, + const struct ia_css_dz_config *zoom, + const struct ia_css_vector *motion_vector, + struct sh_css_uds_info *uds, /* out */ + struct sh_css_crop_pos *sp_out_crop_pos, /* out */ + struct ia_css_resolution pipe_in_res, + bool enable_zoom) { unsigned int x0 = 0, y0 = 0, x1 = 0, y1 = 0; enum ia_css_err err = IA_CSS_SUCCESS; /* Note: @@ -4824,18 +4867,21 @@ sh_css_update_uds_and_crop_info_based_on_zoom_region( y1 = zoom->zoom_region.resolution.height + y0; if ((x0 > x1) || (y0 > y1) || (x1 > pipe_in_res.width) || (y1 > pipe_in_res.height)) - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; - if (!enable_zoom) { - uds->curr_dx = HRT_GDC_N; - uds->curr_dy = HRT_GDC_N; + if (!enable_zoom) + { + uds->curr_dx = HRT_GDC_N; + uds->curr_dy = HRT_GDC_N; } - if (info->enable.dvs_envelope) { + if (info->enable.dvs_envelope) + { /* Zoom region is only supported by the UDS module on ISP * 2 and higher. It is not supported in video mode on ISP 1 */ return IA_CSS_ERR_INVALID_ARGUMENTS; - } else { + } else + { if (enable_zoom) { /* A. Calculate dx/dy based on crop region using in_frame_info * Scale the crop region if in_frame_info to the stage is not same as @@ -4849,9 +4895,9 @@ sh_css_update_uds_and_crop_info_based_on_zoom_region( y1 = (y1 * in_frame_info->res.height) / (pipe_in_res.height); } uds->curr_dx = - ((x1 - x0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.width; + ((x1 - x0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.width; uds->curr_dy = - ((y1 - y0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.height; + ((y1 - y0 - filter_envelope) * HRT_GDC_N) / in_frame_info->res.height; /* B. Calculate xc/yc based on crop region */ uds->xc = (uint16_t)x0 + (((x1) - (x0)) / 2); @@ -4861,10 +4907,11 @@ sh_css_update_uds_and_crop_info_based_on_zoom_region( uds->yc = (uint16_t)in_frame_info->res.height / 2; } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "uds->curr_dx=%d, uds->xc=%d, uds->yc=%d\n", - uds->curr_dx, uds->xc, uds->yc); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "uds->curr_dx=%d, uds->xc=%d, uds->yc=%d\n", + uds->curr_dx, uds->xc, uds->yc); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x0=%d, y0=%d, x1=%d, y1=%d\n", - x0, y0, x1, y1); + x0, y0, x1, y1); sp_out_crop_pos->x = (uint16_t)info->pipeline.left_cropping; sp_out_crop_pos->y = (uint16_t)info->pipeline.top_cropping; } @@ -4893,7 +4940,8 @@ ia_css_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) goto err; #if !defined(HAS_NO_HMEM) /* No weighted histogram, no structure, treat the histogram data as a byte dump in a byte array */ - me->rgby_data = (struct ia_css_3a_rgby_output *)sh_css_malloc(sizeof_hmem(HMEM0_ID)); + me->rgby_data = (struct ia_css_3a_rgby_output *)sh_css_malloc(sizeof_hmem( + HMEM0_ID)); #else me->rgby_data = NULL; #endif @@ -4931,12 +4979,12 @@ ia_css_dvs_statistics_allocate(const struct ia_css_dvs_grid_info *grid) me->grid = *grid; me->hor_proj = sh_css_malloc(grid->height * IA_CSS_DVS_NUM_COEF_TYPES * - sizeof(*me->hor_proj)); + sizeof(*me->hor_proj)); if (!me->hor_proj) goto err; me->ver_proj = sh_css_malloc(grid->width * IA_CSS_DVS_NUM_COEF_TYPES * - sizeof(*me->ver_proj)); + sizeof(*me->ver_proj)); if (!me->ver_proj) goto err; @@ -4971,14 +5019,14 @@ ia_css_dvs_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) me->grid = *grid; me->hor_coefs = sh_css_malloc(grid->num_hor_coefs * - IA_CSS_DVS_NUM_COEF_TYPES * - sizeof(*me->hor_coefs)); + IA_CSS_DVS_NUM_COEF_TYPES * + sizeof(*me->hor_coefs)); if (!me->hor_coefs) goto err; me->ver_coefs = sh_css_malloc(grid->num_ver_coefs * - IA_CSS_DVS_NUM_COEF_TYPES * - sizeof(*me->ver_coefs)); + IA_CSS_DVS_NUM_COEF_TYPES * + sizeof(*me->ver_coefs)); if (!me->ver_coefs) goto err; @@ -5013,42 +5061,42 @@ ia_css_dvs2_statistics_allocate(const struct ia_css_dvs_grid_info *grid) me->grid = *grid; me->hor_prod.odd_real = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->hor_prod.odd_real)); + grid->aligned_height * sizeof(*me->hor_prod.odd_real)); if (!me->hor_prod.odd_real) goto err; me->hor_prod.odd_imag = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->hor_prod.odd_imag)); + grid->aligned_height * sizeof(*me->hor_prod.odd_imag)); if (!me->hor_prod.odd_imag) goto err; me->hor_prod.even_real = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->hor_prod.even_real)); + grid->aligned_height * sizeof(*me->hor_prod.even_real)); if (!me->hor_prod.even_real) goto err; me->hor_prod.even_imag = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->hor_prod.even_imag)); + grid->aligned_height * sizeof(*me->hor_prod.even_imag)); if (!me->hor_prod.even_imag) goto err; me->ver_prod.odd_real = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->ver_prod.odd_real)); + grid->aligned_height * sizeof(*me->ver_prod.odd_real)); if (!me->ver_prod.odd_real) goto err; me->ver_prod.odd_imag = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->ver_prod.odd_imag)); + grid->aligned_height * sizeof(*me->ver_prod.odd_imag)); if (!me->ver_prod.odd_imag) goto err; me->ver_prod.even_real = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->ver_prod.even_real)); + grid->aligned_height * sizeof(*me->ver_prod.even_real)); if (!me->ver_prod.even_real) goto err; me->ver_prod.even_imag = sh_css_malloc(grid->aligned_width * - grid->aligned_height * sizeof(*me->ver_prod.even_imag)); + grid->aligned_height * sizeof(*me->ver_prod.even_imag)); if (!me->ver_prod.even_imag) goto err; @@ -5089,42 +5137,42 @@ ia_css_dvs2_coefficients_allocate(const struct ia_css_dvs_grid_info *grid) me->grid = *grid; me->hor_coefs.odd_real = sh_css_malloc(grid->num_hor_coefs * - sizeof(*me->hor_coefs.odd_real)); + sizeof(*me->hor_coefs.odd_real)); if (!me->hor_coefs.odd_real) goto err; me->hor_coefs.odd_imag = sh_css_malloc(grid->num_hor_coefs * - sizeof(*me->hor_coefs.odd_imag)); + sizeof(*me->hor_coefs.odd_imag)); if (!me->hor_coefs.odd_imag) goto err; me->hor_coefs.even_real = sh_css_malloc(grid->num_hor_coefs * - sizeof(*me->hor_coefs.even_real)); + sizeof(*me->hor_coefs.even_real)); if (!me->hor_coefs.even_real) goto err; me->hor_coefs.even_imag = sh_css_malloc(grid->num_hor_coefs * - sizeof(*me->hor_coefs.even_imag)); + sizeof(*me->hor_coefs.even_imag)); if (!me->hor_coefs.even_imag) goto err; me->ver_coefs.odd_real = sh_css_malloc(grid->num_ver_coefs * - sizeof(*me->ver_coefs.odd_real)); + sizeof(*me->ver_coefs.odd_real)); if (!me->ver_coefs.odd_real) goto err; me->ver_coefs.odd_imag = sh_css_malloc(grid->num_ver_coefs * - sizeof(*me->ver_coefs.odd_imag)); + sizeof(*me->ver_coefs.odd_imag)); if (!me->ver_coefs.odd_imag) goto err; me->ver_coefs.even_real = sh_css_malloc(grid->num_ver_coefs * - sizeof(*me->ver_coefs.even_real)); + sizeof(*me->ver_coefs.even_real)); if (!me->ver_coefs.even_real) goto err; me->ver_coefs.even_imag = sh_css_malloc(grid->num_ver_coefs * - sizeof(*me->ver_coefs.even_imag)); + sizeof(*me->ver_coefs.even_imag)); if (!me->ver_coefs.even_imag) goto err; @@ -5165,33 +5213,43 @@ ia_css_dvs2_6axis_config_allocate(const struct ia_css_stream *stream) params = stream->isp_params_configs; /* Backward compatibility by default consider pipe as Video*/ - if (!params || (params && !params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO])) { + if (!params || (params && + !params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO])) { goto err; } - dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_calloc(1, sizeof(struct ia_css_dvs_6axis_config)); + dvs_config = (struct ia_css_dvs_6axis_config *)sh_css_calloc(1, + sizeof(struct ia_css_dvs_6axis_config)); if (!dvs_config) goto err; - dvs_config->width_y = width_y = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_y; - dvs_config->height_y = height_y = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_y; - dvs_config->width_uv = width_uv = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_uv; - dvs_config->height_uv = height_uv = params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_uv; + dvs_config->width_y = width_y = + params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_y; + dvs_config->height_y = height_y = + params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_y; + dvs_config->width_uv = width_uv = + params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->width_uv; + dvs_config->height_uv = height_uv = + params->pipe_dvs_6axis_config[IA_CSS_PIPE_ID_VIDEO]->height_uv; IA_CSS_LOG("table Y: W %d H %d", width_y, height_y); IA_CSS_LOG("table UV: W %d H %d", width_uv, height_uv); - dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + dvs_config->xcoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( + uint32_t)); if (!dvs_config->xcoords_y) goto err; - dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof(uint32_t)); + dvs_config->ycoords_y = (uint32_t *)sh_css_malloc(width_y * height_y * sizeof( + uint32_t)); if (!dvs_config->ycoords_y) goto err; - dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + dvs_config->xcoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * + sizeof(uint32_t)); if (!dvs_config->xcoords_uv) goto err; - dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * sizeof(uint32_t)); + dvs_config->ycoords_uv = (uint32_t *)sh_css_malloc(width_uv * height_uv * + sizeof(uint32_t)); if (!dvs_config->ycoords_uv) goto err; @@ -5233,7 +5291,8 @@ ia_css_en_dz_capt_pipe(struct ia_css_stream *stream, bool enable) pipe_id = pipeline->pipe_id; if (pipe_id == IA_CSS_PIPE_ID_CAPTURE) { - err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, &stage); + err = ia_css_pipeline_get_stage(pipeline, IA_CSS_BINARY_MODE_CAPTURE_PP, + &stage); if (err == IA_CSS_SUCCESS) stage->enable_zoom = enable; break; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h index 7a37d72856365..96d503967fd1a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h @@ -82,7 +82,7 @@ struct ia_css_isp_parameters { struct ia_css_anr_config anr_config; struct ia_css_ce_config ce_config; struct ia_css_formats_config formats_config; -/* ---- deprecated: replaced with pipe_dvs_6axis_config---- */ + /* ---- deprecated: replaced with pipe_dvs_6axis_config---- */ struct ia_css_dvs_6axis_config *dvs_6axis_config; struct ia_css_ecd_config ecd_config; struct ia_css_ynr_config ynr_config; @@ -104,16 +104,16 @@ struct ia_css_isp_parameters { struct ia_css_crop_config crop_config; struct ia_css_output_config output_config; struct ia_css_dvs_6axis_config *pipe_dvs_6axis_config[IA_CSS_PIPE_ID_NUM]; -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ struct ia_css_shading_settings shading_settings; -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ struct ia_css_dvs_coefficients dvs_coefs; struct ia_css_dvs2_coefficients dvs2_coefs; bool isp_params_changed; bool isp_mem_params_changed - [IA_CSS_PIPE_ID_NUM][SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; + [IA_CSS_PIPE_ID_NUM][SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; bool dz_config_changed; bool motion_config_changed; bool dis_coef_table_changed; @@ -123,16 +123,16 @@ struct ia_css_isp_parameters { bool sc_table_dirty; unsigned int sc_table_last_pipe_num; bool anr_thres_changed; -/* ---- deprecated: replaced with pipe_dvs_6axis_config_changed ---- */ + /* ---- deprecated: replaced with pipe_dvs_6axis_config_changed ---- */ bool dvs_6axis_config_changed; /* ------ pipe specific DPC configuration ------ */ /* Please note that this implementation is a temporary solution and * should be replaced by CSS per pipe configuration when the support * is ready (HSD 1303967698) */ bool pipe_dpc_config_changed[IA_CSS_PIPE_ID_NUM]; -/* ------ deprecated(bz675) : from ------ */ + /* ------ deprecated(bz675) : from ------ */ bool shading_settings_changed; -/* ------ deprecated(bz675) : to ------ */ + /* ------ deprecated(bz675) : to ------ */ bool pipe_dvs_6axis_config_changed[IA_CSS_PIPE_ID_NUM]; bool config_changed[IA_CSS_NUM_PARAMETER_IDS]; @@ -143,25 +143,26 @@ struct ia_css_isp_parameters { struct sh_css_ddr_address_map_size pipe_ddr_ptrs_size[IA_CSS_PIPE_ID_NUM]; struct sh_css_ddr_address_map ddr_ptrs; struct sh_css_ddr_address_map_size ddr_ptrs_size; - struct ia_css_frame *output_frame; /** Output frame the config is to be applied to (optional) */ + struct ia_css_frame + *output_frame; /** Output frame the config is to be applied to (optional) */ u32 isp_parameters_id; /** Unique ID to track which config was actually applied to a particular frame */ }; void ia_css_params_store_ia_css_host_data( - hrt_vaddress ddr_addr, - struct ia_css_host_data *data); + hrt_vaddress ddr_addr, + struct ia_css_host_data *data); enum ia_css_err ia_css_params_store_sctbl( - const struct ia_css_pipeline_stage *stage, - hrt_vaddress ddr_addr, - const struct ia_css_shading_table *shading_table); + const struct ia_css_pipeline_stage *stage, + hrt_vaddress ddr_addr, + const struct ia_css_shading_table *shading_table); struct ia_css_host_data * ia_css_params_alloc_convert_sctbl( - const struct ia_css_pipeline_stage *stage, - const struct ia_css_shading_table *shading_table); + const struct ia_css_pipeline_stage *stage, + const struct ia_css_shading_table *shading_table); struct ia_css_isp_config * sh_css_pipe_isp_config_get(struct ia_css_pipe *pipe); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c index 2f19ee14d6e84..50f99c53c3d45 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c @@ -22,10 +22,10 @@ ia_css_get_properties(struct ia_css_properties *properties) { assert(properties); #if defined(HAS_GDC_VERSION_2) || defined(HAS_GDC_VERSION_3) -/* - * MW: We don't want to store the coordinates - * full range in memory: Truncate - */ + /* + * MW: We don't want to store the coordinates + * full range in memory: Truncate + */ properties->gdc_coord_one = gdc_get_unity(GDC0_ID) / HRT_GDC_COORD_SCALE; #else #error "Unknown GDC version" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c index d603f6aee4fc1..25c46265b70d4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c @@ -85,9 +85,9 @@ set_output_frame_buffer(const struct ia_css_frame *frame, static void sh_css_copy_buffer_attr_to_spbuffer(struct ia_css_buffer_sp *dest_buf, - const enum sh_css_queue_id queue_id, - const hrt_vaddress xmem_addr, - const enum ia_css_buffer_type buf_type); + const enum sh_css_queue_id queue_id, + const hrt_vaddress xmem_addr, + const enum ia_css_buffer_type buf_type); static void initialize_frame_buffer_attribute(struct ia_css_buffer_sp *buf_attr); @@ -106,10 +106,14 @@ static void copy_isp_stage_to_sp_stage(void) { /* [WW07.5]type casting will cause potential issues */ - sh_css_sp_stage.num_stripes = (uint8_t)sh_css_isp_stage.binary_info.iterator.num_stripes; - sh_css_sp_stage.row_stripes_height = (uint16_t)sh_css_isp_stage.binary_info.iterator.row_stripes_height; - sh_css_sp_stage.row_stripes_overlap_lines = (uint16_t)sh_css_isp_stage.binary_info.iterator.row_stripes_overlap_lines; - sh_css_sp_stage.top_cropping = (uint16_t)sh_css_isp_stage.binary_info.pipeline.top_cropping; + sh_css_sp_stage.num_stripes = (uint8_t) + sh_css_isp_stage.binary_info.iterator.num_stripes; + sh_css_sp_stage.row_stripes_height = (uint16_t) + sh_css_isp_stage.binary_info.iterator.row_stripes_height; + sh_css_sp_stage.row_stripes_overlap_lines = (uint16_t) + sh_css_isp_stage.binary_info.iterator.row_stripes_overlap_lines; + sh_css_sp_stage.top_cropping = (uint16_t) + sh_css_isp_stage.binary_info.pipeline.top_cropping; /* moved to sh_css_sp_init_stage sh_css_sp_stage.enable.vf_output = sh_css_isp_stage.binary_info.enable.vf_veceven || @@ -118,12 +122,14 @@ copy_isp_stage_to_sp_stage(void) sh_css_sp_stage.enable.sdis = sh_css_isp_stage.binary_info.enable.dis; sh_css_sp_stage.enable.s3a = sh_css_isp_stage.binary_info.enable.s3a; #ifdef ISP2401 - sh_css_sp_stage.enable.lace_stats = sh_css_isp_stage.binary_info.enable.lace_stats; + sh_css_sp_stage.enable.lace_stats = + sh_css_isp_stage.binary_info.enable.lace_stats; #endif } void -store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned int stage) +store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, + unsigned int stage) { unsigned int thread_id; @@ -131,9 +137,9 @@ store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned int copy_isp_stage_to_sp_stage(); if (id != IA_CSS_PIPE_ID_COPY) sh_css_sp_stage.isp_stage_addr = - sh_css_store_isp_stage_to_ddr(pipe_num, stage); + sh_css_store_isp_stage_to_ddr(pipe_num, stage); sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = - sh_css_store_sp_stage_to_ddr(pipe_num, stage); + sh_css_store_sp_stage_to_ddr(pipe_num, stage); /* Clear for next frame */ sh_css_sp_stage.program_input_circuit = false; @@ -158,14 +164,14 @@ store_sp_per_frame_data(const struct ia_css_fw_info *fw) } sp_dmem_store(SP0_ID, - (unsigned int)sp_address_of(sp_per_frame_data), - &per_frame_data, - sizeof(per_frame_data)); + (unsigned int)sp_address_of(sp_per_frame_data), + &per_frame_data, + sizeof(per_frame_data)); } static void sh_css_store_sp_per_frame_data(enum ia_css_pipe_id pipe_id, - unsigned int pipe_num, + unsigned int pipe_num, const struct ia_css_fw_info *sp_fw) { if (!sp_fw) @@ -184,7 +190,8 @@ sh_css_sp_get_debug_state(struct sh_css_sp_debug_state *state) const struct ia_css_fw_info *fw = &sh_css_sp_fw; unsigned int HIVE_ADDR_sp_output = fw->info.sp.output; unsigned int i; - unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, debug) / sizeof(int); + unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, + debug) / sizeof(int); assert(state); @@ -196,7 +203,8 @@ sh_css_sp_get_debug_state(struct sh_css_sp_debug_state *state) #endif void -sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_frame, +sh_css_sp_start_binary_copy(unsigned int pipe_num, + struct ia_css_frame *out_frame, unsigned int two_ppc) { enum ia_css_pipe_id pipe_id; @@ -219,11 +227,11 @@ sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_fram if (pipe->inout_port_config == 0) { SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, - (uint8_t)SH_CSS_PORT_INPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); } IA_CSS_LOG("pipe_id %d port_config %08x", pipe->pipe_id, pipe->inout_port_config); @@ -237,7 +245,7 @@ sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_fram sh_css_sp_stage.num = stage_num; sh_css_sp_stage.stage_type = SH_CSS_SP_STAGE_TYPE; sh_css_sp_stage.func = - (unsigned int)IA_CSS_PIPELINE_BIN_COPY; + (unsigned int)IA_CSS_PIPELINE_BIN_COPY; set_output_frame_buffer(out_frame, 0); @@ -289,7 +297,7 @@ sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, sampled, needs checking/improvement */ if (pipe_conf_override == SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD) pipe->pipe_config = - (SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id); + (SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id); else pipe->pipe_config = pipe_conf_override; @@ -297,11 +305,11 @@ sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, if (pipe->inout_port_config == 0) { SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, - (uint8_t)SH_CSS_PORT_INPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); + (uint8_t)SH_CSS_PORT_INPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); SH_CSS_PIPE_PORT_CONFIG_SET(pipe->inout_port_config, - (uint8_t)SH_CSS_PORT_OUTPUT, - (uint8_t)SH_CSS_HOST_TYPE, 1); + (uint8_t)SH_CSS_PORT_OUTPUT, + (uint8_t)SH_CSS_HOST_TYPE, 1); } IA_CSS_LOG("pipe_id %d port_config %08x", pipe->pipe_id, pipe->inout_port_config); @@ -324,7 +332,8 @@ sh_css_sp_start_raw_copy(struct ia_css_frame *out_frame, static void sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, - unsigned int pipe_num, unsigned int max_input_width, unsigned int if_config_index) + unsigned int pipe_num, unsigned int max_input_width, + unsigned int if_config_index) { enum ia_css_pipe_id pipe_id; unsigned int thread_id; @@ -374,8 +383,11 @@ sh_css_sp_start_isys_copy(struct ia_css_frame *out_frame, #if defined SH_CSS_ENABLE_METADATA if (pipe->metadata.height > 0) { - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); - sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.metadata_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_METADATA); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, + &queue_id); + sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.metadata_buf, + queue_id, mmgr_EXCEPTION, + IA_CSS_BUFFER_TYPE_METADATA); } #endif @@ -388,7 +400,7 @@ sh_css_sp_get_binary_copy_size(void) const struct ia_css_fw_info *fw = &sh_css_sp_fw; unsigned int HIVE_ADDR_sp_output = fw->info.sp.output; unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, - bin_copy_bytes_copied) / sizeof(int); + bin_copy_bytes_copied) / sizeof(int); (void)HIVE_ADDR_sp_output; /* To get rid of warning in CRUN */ return load_sp_array_uint(sp_output, offset); } @@ -398,17 +410,18 @@ sh_css_sp_get_sw_interrupt_value(unsigned int irq) { const struct ia_css_fw_info *fw = &sh_css_sp_fw; unsigned int HIVE_ADDR_sp_output = fw->info.sp.output; - unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, sw_interrupt_value) - / sizeof(int); + unsigned int offset = (unsigned int)offsetof(struct sh_css_sp_output, + sw_interrupt_value) + / sizeof(int); (void)HIVE_ADDR_sp_output; /* To get rid of warning in CRUN */ return load_sp_array_uint(sp_output, offset + irq); } static void sh_css_copy_buffer_attr_to_spbuffer(struct ia_css_buffer_sp *dest_buf, - const enum sh_css_queue_id queue_id, - const hrt_vaddress xmem_addr, - const enum ia_css_buffer_type buf_type) + const enum sh_css_queue_id queue_id, + const hrt_vaddress xmem_addr, + const enum ia_css_buffer_type buf_type) { assert(buf_type < IA_CSS_NUM_BUFFER_TYPE); if (queue_id > SH_CSS_INVALID_QUEUE_ID) { @@ -427,8 +440,7 @@ sh_css_copy_buffer_attr_to_spbuffer(struct ia_css_buffer_sp *dest_buf, lines below. In order to satisfy KW an additional if has been added. This one will always yield true. */ - if ((queue_id < SH_CSS_MAX_NUM_QUEUES)) - { + if ((queue_id < SH_CSS_MAX_NUM_QUEUES)) { dest_buf->buf_src.queue_id = queue_id; } } else { @@ -440,17 +452,17 @@ sh_css_copy_buffer_attr_to_spbuffer(struct ia_css_buffer_sp *dest_buf, static void sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, - const struct ia_css_frame *frame_in) + const struct ia_css_frame *frame_in) { assert(frame_in); ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_copy_frame_to_spframe():\n"); + "sh_css_copy_frame_to_spframe():\n"); sh_css_copy_buffer_attr_to_spbuffer(&sp_frame_out->buf_attr, - frame_in->dynamic_queue_id, - frame_in->data, - frame_in->buf_type); + frame_in->dynamic_queue_id, + frame_in->data, + frame_in->buf_type); ia_css_frame_info_to_frame_sp_info(&sp_frame_out->info, &frame_in->info); @@ -465,11 +477,11 @@ sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, break; case IA_CSS_FRAME_FORMAT_PLANAR_RGB888: sp_frame_out->planes.planar_rgb.r.offset = - frame_in->planes.planar_rgb.r.offset; + frame_in->planes.planar_rgb.r.offset; sp_frame_out->planes.planar_rgb.g.offset = - frame_in->planes.planar_rgb.g.offset; + frame_in->planes.planar_rgb.g.offset; sp_frame_out->planes.planar_rgb.b.offset = - frame_in->planes.planar_rgb.b.offset; + frame_in->planes.planar_rgb.b.offset; break; case IA_CSS_FRAME_FORMAT_YUYV: case IA_CSS_FRAME_FORMAT_UYVY: @@ -486,9 +498,9 @@ sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, case IA_CSS_FRAME_FORMAT_NV16: case IA_CSS_FRAME_FORMAT_NV61: sp_frame_out->planes.nv.y.offset = - frame_in->planes.nv.y.offset; + frame_in->planes.nv.y.offset; sp_frame_out->planes.nv.uv.offset = - frame_in->planes.nv.uv.offset; + frame_in->planes.nv.uv.offset; break; case IA_CSS_FRAME_FORMAT_YUV420: case IA_CSS_FRAME_FORMAT_YUV422: @@ -498,29 +510,29 @@ sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, case IA_CSS_FRAME_FORMAT_YV12: case IA_CSS_FRAME_FORMAT_YV16: sp_frame_out->planes.yuv.y.offset = - frame_in->planes.yuv.y.offset; + frame_in->planes.yuv.y.offset; sp_frame_out->planes.yuv.u.offset = - frame_in->planes.yuv.u.offset; + frame_in->planes.yuv.u.offset; sp_frame_out->planes.yuv.v.offset = - frame_in->planes.yuv.v.offset; + frame_in->planes.yuv.v.offset; break; case IA_CSS_FRAME_FORMAT_QPLANE6: sp_frame_out->planes.plane6.r.offset = - frame_in->planes.plane6.r.offset; + frame_in->planes.plane6.r.offset; sp_frame_out->planes.plane6.r_at_b.offset = - frame_in->planes.plane6.r_at_b.offset; + frame_in->planes.plane6.r_at_b.offset; sp_frame_out->planes.plane6.gr.offset = - frame_in->planes.plane6.gr.offset; + frame_in->planes.plane6.gr.offset; sp_frame_out->planes.plane6.gb.offset = - frame_in->planes.plane6.gb.offset; + frame_in->planes.plane6.gb.offset; sp_frame_out->planes.plane6.b.offset = - frame_in->planes.plane6.b.offset; + frame_in->planes.plane6.b.offset; sp_frame_out->planes.plane6.b_at_r.offset = - frame_in->planes.plane6.b_at_r.offset; + frame_in->planes.plane6.b_at_r.offset; break; case IA_CSS_FRAME_FORMAT_BINARY_8: sp_frame_out->planes.binary.data.offset = - frame_in->planes.binary.data.offset; + frame_in->planes.binary.data.offset; break; default: /* This should not happen, but in case it does, @@ -532,12 +544,12 @@ sh_css_copy_frame_to_spframe(struct ia_css_frame_sp *sp_frame_out, } static enum ia_css_err -set_input_frame_buffer(const struct ia_css_frame *frame) -{ +set_input_frame_buffer(const struct ia_css_frame *frame) { if (!frame) return IA_CSS_ERR_INVALID_ARGUMENTS; - switch (frame->info.format) { + switch (frame->info.format) + { case IA_CSS_FRAME_FORMAT_QPLANE6: case IA_CSS_FRAME_FORMAT_YUV420_16: case IA_CSS_FRAME_FORMAT_RAW_PACKED: @@ -563,12 +575,12 @@ set_input_frame_buffer(const struct ia_css_frame *frame) static enum ia_css_err set_output_frame_buffer(const struct ia_css_frame *frame, - unsigned int idx) -{ + unsigned int idx) { if (!frame) return IA_CSS_ERR_INVALID_ARGUMENTS; - switch (frame->info.format) { + switch (frame->info.format) + { case IA_CSS_FRAME_FORMAT_YUV420: case IA_CSS_FRAME_FORMAT_YUV422: case IA_CSS_FRAME_FORMAT_YUV444: @@ -604,12 +616,12 @@ set_output_frame_buffer(const struct ia_css_frame *frame, } static enum ia_css_err -set_view_finder_buffer(const struct ia_css_frame *frame) -{ +set_view_finder_buffer(const struct ia_css_frame *frame) { if (!frame) return IA_CSS_ERR_INVALID_ARGUMENTS; - switch (frame->info.format) { + switch (frame->info.format) + { /* the dual output pin */ case IA_CSS_FRAME_FORMAT_NV12: case IA_CSS_FRAME_FORMAT_NV12_16: @@ -635,19 +647,21 @@ set_view_finder_buffer(const struct ia_css_frame *frame) #if !defined(HAS_NO_INPUT_FORMATTER) void sh_css_sp_set_if_configs( - const input_formatter_cfg_t *config_a, - const input_formatter_cfg_t *config_b, - const uint8_t if_config_index - ) + const input_formatter_cfg_t *config_a, + const input_formatter_cfg_t *config_b, + const uint8_t if_config_index +) { assert(if_config_index < SH_CSS_MAX_IF_CONFIGS); assert(config_a); - sh_css_sp_group.config.input_formatter.set[if_config_index].config_a = *config_a; + sh_css_sp_group.config.input_formatter.set[if_config_index].config_a = + *config_a; sh_css_sp_group.config.input_formatter.a_changed = true; if (config_b) { - sh_css_sp_group.config.input_formatter.set[if_config_index].config_b = *config_b; + sh_css_sp_group.config.input_formatter.set[if_config_index].config_b = + *config_b; sh_css_sp_group.config.input_formatter.b_changed = true; } @@ -665,10 +679,10 @@ sh_css_sp_program_input_circuit(int fmt_type, sh_css_sp_group.config.input_circuit.fmt_type = fmt_type; sh_css_sp_group.config.input_circuit.ch_id = ch_id; sh_css_sp_group.config.input_circuit.input_mode = input_mode; -/* - * The SP group is only loaded at SP boot time and is read once - * change flags as "input_circuit_cfg_changed" must be reset on the SP - */ + /* + * The SP group is only loaded at SP boot time and is read once + * change flags as "input_circuit_cfg_changed" must be reset on the SP + */ sh_css_sp_group.config.input_circuit_cfg_changed = true; sh_css_sp_stage.program_input_circuit = true; } @@ -731,8 +745,7 @@ sh_css_sp_set_disable_continuous_viewfinder(bool flag) } static enum ia_css_err -sh_css_sp_write_frame_pointers(const struct sh_css_binary_args *args) -{ +sh_css_sp_write_frame_pointers(const struct sh_css_binary_args *args) { enum ia_css_err err = IA_CSS_SUCCESS; int i; @@ -742,7 +755,8 @@ sh_css_sp_write_frame_pointers(const struct sh_css_binary_args *args) err = set_input_frame_buffer(args->in_frame); if (err == IA_CSS_SUCCESS && args->out_vf_frame) err = set_view_finder_buffer(args->out_vf_frame); - for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + { if (err == IA_CSS_SUCCESS && args->out_frame[i]) err = set_output_frame_buffer(args->out_frame[i], i); } @@ -770,7 +784,8 @@ sh_css_sp_init_group(bool two_ppc, if (if_config_index == SH_CSS_IF_CONFIG_NOT_NEEDED) return; #if !defined(HAS_NO_INPUT_FORMATTER) assert(if_config_index < SH_CSS_MAX_IF_CONFIGS); - sh_css_sp_group.config.input_formatter.set[if_config_index].stream_format = input_format; + sh_css_sp_group.config.input_formatter.set[if_config_index].stream_format = + input_format; #else (void)input_format; #endif @@ -784,20 +799,19 @@ sh_css_stage_write_binary_info(struct ia_css_binary_info *info) } static enum ia_css_err -copy_isp_mem_if_to_ddr(struct ia_css_binary *binary) -{ +copy_isp_mem_if_to_ddr(struct ia_css_binary *binary) { enum ia_css_err err; err = ia_css_isp_param_copy_isp_mem_if_to_ddr( - &binary->css_params, - &binary->mem_params, - IA_CSS_PARAM_CLASS_CONFIG); + &binary->css_params, + &binary->mem_params, + IA_CSS_PARAM_CLASS_CONFIG); if (err != IA_CSS_SUCCESS) return err; err = ia_css_isp_param_copy_isp_mem_if_to_ddr( - &binary->css_params, - &binary->mem_params, - IA_CSS_PARAM_CLASS_STATE); + &binary->css_params, + &binary->mem_params, + IA_CSS_PARAM_CLASS_STATE); if (err != IA_CSS_SUCCESS) return err; return IA_CSS_SUCCESS; @@ -812,12 +826,11 @@ is_sp_stage(struct ia_css_pipeline_stage *stage) static enum ia_css_err configure_isp_from_args( - const struct sh_css_sp_pipeline *pipeline, - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args, - bool two_ppc, - bool deinterleaved) -{ + const struct sh_css_sp_pipeline *pipeline, + const struct ia_css_binary *binary, + const struct sh_css_binary_args *args, + bool two_ppc, + bool deinterleaved) { #ifdef ISP2401 struct ia_css_pipe *pipe = find_pipe_by_num(pipeline->pipe_num); const struct ia_css_resolution *res; @@ -832,7 +845,7 @@ configure_isp_from_args( ia_css_output0_configure(binary, &args->out_frame[0]->info); #ifdef ISP2401 ia_css_sc_configure(binary, pipeline->shading.internal_frame_origin_x_bqs_on_sctbl, - pipeline->shading.internal_frame_origin_y_bqs_on_sctbl); + pipeline->shading.internal_frame_origin_y_bqs_on_sctbl); #endif ia_css_iterator_configure(binary, &args->in_frame->info); ia_css_dvs_configure(binary, &args->out_frame[0]->info); @@ -882,16 +895,15 @@ initialize_stage_frames(struct ia_css_frames_sp *frames) static enum ia_css_err sh_css_sp_init_stage(struct ia_css_binary *binary, - const char *binary_name, - const struct ia_css_blob_info *blob_info, - const struct sh_css_binary_args *args, - unsigned int pipe_num, - unsigned int stage, - bool xnr, - const struct ia_css_isp_param_css_segments *isp_mem_if, - unsigned int if_config_index, - bool two_ppc) -{ + const char *binary_name, + const struct ia_css_blob_info *blob_info, + const struct sh_css_binary_args *args, + unsigned int pipe_num, + unsigned int stage, + bool xnr, + const struct ia_css_isp_param_css_segments *isp_mem_if, + unsigned int if_config_index, + bool two_ppc) { const struct ia_css_binary_xinfo *xinfo; const struct ia_css_binary_info *info; enum ia_css_err err = IA_CSS_SUCCESS; @@ -923,7 +935,8 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); - if (!info) { + if (!info) + { sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL; return IA_CSS_SUCCESS; } @@ -954,13 +967,14 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, sh_css_sp_stage.frames.effective_in_res.height = binary->effective_in_frame_res.height; ia_css_frame_info_to_frame_sp_info(&sh_css_sp_stage.frames.in.info, - &binary->in_frame_info); - for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { + &binary->in_frame_info); + for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) + { ia_css_frame_info_to_frame_sp_info(&sh_css_sp_stage.frames.out[i].info, - &binary->out_frame_info[i]); + &binary->out_frame_info[i]); } ia_css_frame_info_to_frame_sp_info(&sh_css_sp_stage.frames.internal_frame_info, - &binary->internal_frame_info); + &binary->internal_frame_info); sh_css_sp_stage.dvs_envelope.width = binary->dvs_envelope.width; sh_css_sp_stage.dvs_envelope.height = binary->dvs_envelope.height; sh_css_sp_stage.isp_pipe_version = (uint8_t)info->pipeline.isp_pipe_version; @@ -990,13 +1004,21 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, err = sh_css_sp_write_frame_pointers(args); /* TODO: move it to a better place */ - if (binary->info->sp.enable.s3a) { - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_3A_STATISTICS, thread_id, &queue_id); - sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.s3a_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_3A_STATISTICS); + if (binary->info->sp.enable.s3a) + { + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_3A_STATISTICS, thread_id, + &queue_id); + sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.s3a_buf, queue_id, + mmgr_EXCEPTION, + IA_CSS_BUFFER_TYPE_3A_STATISTICS); } - if (binary->info->sp.enable.dis) { - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_DIS_STATISTICS, thread_id, &queue_id); - sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.dvs_buf, queue_id, mmgr_EXCEPTION, IA_CSS_BUFFER_TYPE_DIS_STATISTICS); + if (binary->info->sp.enable.dis) + { + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_DIS_STATISTICS, thread_id, + &queue_id); + sh_css_copy_buffer_attr_to_spbuffer(&sh_css_sp_stage.frames.dvs_buf, queue_id, + mmgr_EXCEPTION, + IA_CSS_BUFFER_TYPE_DIS_STATISTICS); } #if defined SH_CSS_ENABLE_METADATA ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_METADATA, thread_id, &queue_id); @@ -1007,18 +1029,21 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, #ifdef USE_INPUT_SYSTEM_VERSION_2401 #ifndef ISP2401 - if (args->in_frame) { + if (args->in_frame) + { pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); if (!pipe) return IA_CSS_ERR_INTERNAL_ERROR; ia_css_get_crop_offsets(pipe, &args->in_frame->info); - } else if (&binary->in_frame_info) { + } else if (&binary->in_frame_info) + { pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); if (!pipe) return IA_CSS_ERR_INTERNAL_ERROR; ia_css_get_crop_offsets(pipe, &binary->in_frame_info); #else - if (stage == 0) { + if (stage == 0) + { if (args->in_frame) { pipe = find_pipe_by_num(sh_css_sp_group.pipe[thread_id].pipe_num); if (!pipe) @@ -1037,7 +1062,7 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, #endif err = configure_isp_from_args(&sh_css_sp_group.pipe[thread_id], - binary, args, two_ppc, sh_css_sp_stage.deinterleaved); + binary, args, two_ppc, sh_css_sp_stage.deinterleaved); if (err != IA_CSS_SUCCESS) return err; @@ -1048,15 +1073,16 @@ sh_css_sp_init_stage(struct ia_css_binary *binary, * the original out res. for video pipe, it has two output pins --- out and * vf_out, so it can keep these two resolutions already. */ if (binary->info->sp.pipeline.mode == IA_CSS_BINARY_MODE_PREVIEW && - (binary->vf_downscale_log2 > 0)) { + (binary->vf_downscale_log2 > 0)) + { /* TODO: Remove this after preview output decimation is fixed * by configuring out&vf info fiels properly */ sh_css_sp_stage.frames.out[0].info.padded_width - <<= binary->vf_downscale_log2; + <<= binary->vf_downscale_log2; sh_css_sp_stage.frames.out[0].info.res.width - <<= binary->vf_downscale_log2; + <<= binary->vf_downscale_log2; sh_css_sp_stage.frames.out[0].info.res.height - <<= binary->vf_downscale_log2; + <<= binary->vf_downscale_log2; } err = copy_isp_mem_if_to_ddr(binary); if (err != IA_CSS_SUCCESS) @@ -1070,16 +1096,15 @@ sp_init_stage(struct ia_css_pipeline_stage *stage, unsigned int pipe_num, bool xnr, unsigned int if_config_index, - bool two_ppc) -{ + bool two_ppc) { struct ia_css_binary *binary; const struct ia_css_fw_info *firmware; const struct sh_css_binary_args *args; unsigned int stage_num; -/* - * Initialiser required because of the "else" path below. - * Is this a valid path ? - */ + /* + * Initialiser required because of the "else" path below. + * Is this a valid path ? + */ const char *binary_name = ""; const struct ia_css_binary_xinfo *info = NULL; /* note: the var below is made static as it is quite large; @@ -1107,35 +1132,38 @@ sp_init_stage(struct ia_css_pipeline_stage *stage, args = &stage->args; stage_num = stage->stage_num; - if (binary) { + if (binary) + { info = binary->info; binary_name = (const char *)(info->blob->name); blob_info = &info->blob->header.blob; ia_css_init_memory_interface(mem_if, &binary->mem_params, &binary->css_params); - } else if (firmware) { + } else if (firmware) + { const struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS] = {NULL}; if (args->out_frame[0]) out_infos[0] = &args->out_frame[0]->info; info = &firmware->info.isp; ia_css_binary_fill_info(info, false, false, - ATOMISP_INPUT_FORMAT_RAW_10, - args->in_frame ? &args->in_frame->info : NULL, - NULL, - out_infos, - args->out_vf_frame ? &args->out_vf_frame->info - : NULL, - &tmp_binary, - NULL, - -1, true); + ATOMISP_INPUT_FORMAT_RAW_10, + args->in_frame ? &args->in_frame->info : NULL, + NULL, + out_infos, + args->out_vf_frame ? &args->out_vf_frame->info + : NULL, + &tmp_binary, + NULL, + -1, true); binary = &tmp_binary; binary->info = info; binary_name = IA_CSS_EXT_ISP_PROG_NAME(firmware); blob_info = &firmware->blob; mem_if = (struct ia_css_isp_param_css_segments *)&firmware->mem_initializers; - } else { - /* SP stage */ - assert(stage->sp_func != IA_CSS_PIPELINE_NO_FUNC); + } else + { + /* SP stage */ + assert(stage->sp_func != IA_CSS_PIPELINE_NO_FUNC); /* binary and blob_info are now NULL. These will be passed to sh_css_sp_init_stage and dereferenced there, so passing a NULL @@ -1144,15 +1172,15 @@ sp_init_stage(struct ia_css_pipeline_stage *stage, } err = sh_css_sp_init_stage(binary, - (const char *)binary_name, - blob_info, - args, - pipe_num, - stage_num, - xnr, - mem_if, - if_config_index, - two_ppc); + (const char *)binary_name, + blob_info, + args, + pipe_num, + stage_num, + xnr, + mem_if, + if_config_index, + two_ppc); return err; } @@ -1169,15 +1197,15 @@ sp_init_sp_stage(struct ia_css_pipeline_stage *stage, switch (stage->sp_func) { case IA_CSS_PIPELINE_RAW_COPY: sh_css_sp_start_raw_copy(args->out_frame[0], - pipe_num, two_ppc, - stage->max_input_width, - copy_ovrd, if_config_index); + pipe_num, two_ppc, + stage->max_input_width, + copy_ovrd, if_config_index); break; case IA_CSS_PIPELINE_BIN_COPY: assert(false); /* TBI */ case IA_CSS_PIPELINE_ISYS_COPY: sh_css_sp_start_isys_copy(args->out_frame[0], - pipe_num, stage->max_input_width, if_config_index); + pipe_num, stage->max_input_width, if_config_index); break; case IA_CSS_PIPELINE_NO_FUNC: assert(false); @@ -1202,12 +1230,12 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, #endif #ifdef ISP2401 , - const struct ia_css_coordinate *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame + const struct ia_css_coordinate + *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame positioned on shading table at shading correction in ISP. */ const struct ia_css_isp_parameters *params #endif - ) -{ + ) { /* Get first stage */ struct ia_css_pipeline_stage *stage = NULL; struct ia_css_binary *first_binary = NULL; @@ -1226,14 +1254,17 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, first_binary = me->stages->binary; if (input_mode == IA_CSS_INPUT_MODE_SENSOR || - input_mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { + input_mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { assert(port_id < N_MIPI_PORT_ID); if (port_id >= N_MIPI_PORT_ID) /* should not happen but KW does not know */ return; /* we should be able to return an error */ if_config_index = (uint8_t)(port_id - MIPI_PORT0_ID); - } else if (input_mode == IA_CSS_INPUT_MODE_MEMORY) { + } else if (input_mode == IA_CSS_INPUT_MODE_MEMORY) + { if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; - } else { + } else + { if_config_index = 0x0; } #else @@ -1245,13 +1276,15 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, memset(&sh_css_sp_group.pipe[thread_id], 0, sizeof(struct sh_css_sp_pipeline)); /* Count stages */ - for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { + for (stage = me->stages, num = 0; stage; stage = stage->next, num++) + { stage->stage_num = num; ia_css_debug_pipe_graph_dump_stage(stage, id); } me->num_stages = num; - if (first_binary) { + if (first_binary) + { /* Init pipeline data */ sh_css_sp_init_group(two_ppc, first_binary->input_format, offline, if_config_index); @@ -1276,16 +1309,17 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, sh_css_sp_group.pipe[thread_id].required_bds_factor = required_bds_factor; #if !defined(HAS_NO_INPUT_SYSTEM) sh_css_sp_group.pipe[thread_id].input_system_mode - = (uint32_t)input_mode; + = (uint32_t)input_mode; sh_css_sp_group.pipe[thread_id].port_id = port_id; #endif sh_css_sp_group.pipe[thread_id].dvs_frame_delay = (uint32_t)me->dvs_frame_delay; /* TODO: next indicates from which queues parameters need to be sampled, needs checking/improvement */ - if (ia_css_pipeline_uses_params(me)) { + if (ia_css_pipeline_uses_params(me)) + { sh_css_sp_group.pipe[thread_id].pipe_config = - SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id; + SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << thread_id; } /* For continuous use-cases, SP copy is responsible for sampling the @@ -1297,20 +1331,22 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, pipe = find_pipe_by_num(pipe_num); assert(pipe); - if (!pipe) { + if (!pipe) + { return; } sh_css_sp_group.pipe[thread_id].scaler_pp_lut = sh_css_pipe_get_pp_gdc_lut(pipe); #if defined(SH_CSS_ENABLE_METADATA) - if (md_info && md_info->size > 0) { + if (md_info && md_info->size > 0) + { sh_css_sp_group.pipe[thread_id].metadata.width = md_info->resolution.width; sh_css_sp_group.pipe[thread_id].metadata.height = md_info->resolution.height; sh_css_sp_group.pipe[thread_id].metadata.stride = md_info->stride; sh_css_sp_group.pipe[thread_id].metadata.size = md_info->size; ia_css_isys_convert_stream_format_to_mipi_format( - md_config->data_type, MIPI_PREDICTOR_NONE, - &sh_css_sp_group.pipe[thread_id].metadata.format); + md_config->data_type, MIPI_PREDICTOR_NONE, + &sh_css_sp_group.pipe[thread_id].metadata.format); } #else (void)md_config; @@ -1319,8 +1355,11 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) sh_css_sp_group.pipe[thread_id].output_frame_queue_id = (uint32_t)SH_CSS_INVALID_QUEUE_ID; - if (pipe_id != IA_CSS_PIPE_ID_COPY) { - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, (enum sh_css_queue_id *)(&sh_css_sp_group.pipe[thread_id].output_frame_queue_id)); + if (pipe_id != IA_CSS_PIPE_ID_COPY) + { + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, + (enum sh_css_queue_id *)( + &sh_css_sp_group.pipe[thread_id].output_frame_queue_id)); } #endif @@ -1329,27 +1368,33 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, * the parameters are passed to the isp for the shading table centering. */ if (internal_frame_origin_bqs_on_sctbl && - params && params->shading_settings.enable_shading_table_conversion == 0) { + params && params->shading_settings.enable_shading_table_conversion == 0) + { sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; + = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->y; - } else { - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = 0; - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl = 0; + = (uint32_t)internal_frame_origin_bqs_on_sctbl->y; + } else + { + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = + 0; + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl = + 0; } #endif IA_CSS_LOG("pipe_id %d port_config %08x", pipe_id, sh_css_sp_group.pipe[thread_id].inout_port_config); - for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { + for (stage = me->stages, num = 0; stage; stage = stage->next, num++) + { sh_css_sp_group.pipe[thread_id].num_stages++; if (is_sp_stage(stage)) { sp_init_sp_stage(stage, pipe_num, two_ppc, - copy_ovrd, if_config_index); + copy_ovrd, if_config_index); } else { - if ((stage->stage_num != 0) || SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(me->inout_port_config)) + if ((stage->stage_num != 0) || + SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(me->inout_port_config)) tmp_if_config_index = SH_CSS_IF_CONFIG_NOT_NEEDED; else tmp_if_config_index = if_config_index; @@ -1377,8 +1422,9 @@ sh_css_sp_uninit_pipeline(unsigned int pipe_num) bool sh_css_write_host2sp_command(enum host2sp_commands host2sp_command) { unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; - unsigned int offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_command) - / sizeof(int); + unsigned int offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_command) + / sizeof(int); enum host2sp_commands last_cmd = host2sp_cmd_error; (void)HIVE_ADDR_host_sp_com; /* Suppres warnings in CRUN */ @@ -1393,11 +1439,10 @@ bool sh_css_write_host2sp_command(enum host2sp_commands host2sp_command) } enum host2sp_commands -sh_css_read_host2sp_command(void) -{ +sh_css_read_host2sp_command(void) { unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; unsigned int offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_command) - / sizeof(int); + / sizeof(int); (void)HIVE_ADDR_host_sp_com; /* Suppres warnings in CRUN */ return (enum host2sp_commands)load_sp_array_uint(host_sp_com, offset); } @@ -1434,9 +1479,9 @@ sh_css_init_host2sp_frame_data(void) */ void sh_css_update_host2sp_offline_frame( - unsigned int frame_num, - struct ia_css_frame *frame, - struct ia_css_metadata *metadata) + unsigned int frame_num, + struct ia_css_frame *frame, + struct ia_css_metadata *metadata) { unsigned int HIVE_ADDR_host_sp_com; unsigned int offset; @@ -1445,14 +1490,16 @@ sh_css_update_host2sp_offline_frame( /* Write new frame data into SP DMEM */ HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; - offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_offline_frames) - / sizeof(int); + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_offline_frames) + / sizeof(int); offset += frame_num; store_sp_array_uint(host_sp_com, offset, frame ? frame->data : 0); /* Write metadata buffer into SP DMEM */ - offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_offline_metadata) - / sizeof(int); + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_offline_metadata) + / sizeof(int); offset += frame_num; store_sp_array_uint(host_sp_com, offset, metadata ? metadata->address : 0); } @@ -1464,8 +1511,8 @@ sh_css_update_host2sp_offline_frame( */ void sh_css_update_host2sp_mipi_frame( - unsigned int frame_num, - struct ia_css_frame *frame) + unsigned int frame_num, + struct ia_css_frame *frame) { unsigned int HIVE_ADDR_host_sp_com; unsigned int offset; @@ -1475,12 +1522,13 @@ sh_css_update_host2sp_mipi_frame( /* Write new frame data into SP DMEM */ HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; - offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_mipi_frames) - / sizeof(int); + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_mipi_frames) + / sizeof(int); offset += frame_num; store_sp_array_uint(host_sp_com, offset, - frame ? frame->data : 0); + frame ? frame->data : 0); } /* @@ -1489,8 +1537,8 @@ sh_css_update_host2sp_mipi_frame( */ void sh_css_update_host2sp_mipi_metadata( - unsigned int frame_num, - struct ia_css_metadata *metadata) + unsigned int frame_num, + struct ia_css_metadata *metadata) { unsigned int HIVE_ADDR_host_sp_com; unsigned int o; @@ -1501,10 +1549,10 @@ sh_css_update_host2sp_mipi_metadata( /* Write new frame data into SP DMEM */ HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; o = offsetof(struct host_sp_communication, host2sp_mipi_metadata) - / sizeof(int); + / sizeof(int); o += frame_num; store_sp_array_uint(host_sp_com, o, - metadata ? metadata->address : 0); + metadata ? metadata->address : 0); } void @@ -1515,15 +1563,17 @@ sh_css_update_host2sp_num_mipi_frames(unsigned int num_frames) /* Write new frame data into SP DMEM */ HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; - offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_num_mipi_frames) - / sizeof(int); + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_num_mipi_frames) + / sizeof(int); store_sp_array_uint(host_sp_com, offset, num_frames); } #endif void -sh_css_update_host2sp_cont_num_raw_frames(unsigned int num_frames, bool set_avail) +sh_css_update_host2sp_cont_num_raw_frames(unsigned int num_frames, + bool set_avail) { const struct ia_css_fw_info *fw; unsigned int HIVE_ADDR_host_sp_com; @@ -1534,16 +1584,19 @@ sh_css_update_host2sp_cont_num_raw_frames(unsigned int num_frames, bool set_avai fw = &sh_css_sp_fw; HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; if (set_avail) { - offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_cont_avail_num_raw_frames) - / sizeof(int); + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_cont_avail_num_raw_frames) + / sizeof(int); avail_num_frames = load_sp_array_uint(host_sp_com, offset); extra_num_frames = num_frames - avail_num_frames; - offset_extra = (unsigned int)offsetof(struct host_sp_communication, host2sp_cont_extra_num_raw_frames) - / sizeof(int); + offset_extra = (unsigned int)offsetof(struct host_sp_communication, + host2sp_cont_extra_num_raw_frames) + / sizeof(int); store_sp_array_uint(host_sp_com, offset_extra, extra_num_frames); } else - offset = (unsigned int)offsetof(struct host_sp_communication, host2sp_cont_target_num_raw_frames) - / sizeof(int); + offset = (unsigned int)offsetof(struct host_sp_communication, + host2sp_cont_target_num_raw_frames) + / sizeof(int); store_sp_array_uint(host_sp_com, offset, num_frames); } @@ -1566,16 +1619,15 @@ sh_css_event_init_irq_mask(void) host2sp_event_irq_mask[i]); assert(offset % HRT_BUS_BYTES == 0); sp_dmem_store(SP0_ID, - (unsigned int)sp_address_of(host_sp_com) + offset, - &event_irq_mask_init, sizeof(event_irq_mask_init)); + (unsigned int)sp_address_of(host_sp_com) + offset, + &event_irq_mask_init, sizeof(event_irq_mask_init)); } } enum ia_css_err ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, unsigned int or_mask, - unsigned int and_mask) -{ + unsigned int and_mask) { unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; unsigned int offset; struct sh_css_event_irq_mask event_irq_mask; @@ -1605,8 +1657,8 @@ ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, host2sp_event_irq_mask[pipe_num]); assert(offset % HRT_BUS_BYTES == 0); sp_dmem_store(SP0_ID, - (unsigned int)sp_address_of(host_sp_com) + offset, - &event_irq_mask, sizeof(event_irq_mask)); + (unsigned int)sp_address_of(host_sp_com) + offset, + &event_irq_mask, sizeof(event_irq_mask)); return IA_CSS_SUCCESS; } @@ -1614,8 +1666,7 @@ ia_css_pipe_set_irq_mask(struct ia_css_pipe *pipe, enum ia_css_err ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe, unsigned int *or_mask, - unsigned int *and_mask) -{ + unsigned int *and_mask) { unsigned int HIVE_ADDR_host_sp_com = sh_css_sp_fw.info.sp.host_sp_com; unsigned int offset; struct sh_css_event_irq_mask event_irq_mask; @@ -1635,8 +1686,8 @@ ia_css_event_get_irq_mask(const struct ia_css_pipe *pipe, host2sp_event_irq_mask[pipe_num]); assert(offset % HRT_BUS_BYTES == 0); sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(host_sp_com) + offset, - &event_irq_mask, sizeof(event_irq_mask)); + (unsigned int)sp_address_of(host_sp_com) + offset, + &event_irq_mask, sizeof(event_irq_mask)); if (or_mask) *or_mask = event_irq_mask.or_mask; @@ -1680,8 +1731,8 @@ sh_css_sp_start_isp(void) store_sp_per_frame_data(fw); sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(sp_sw_state), - (uint32_t)(IA_CSS_SP_SW_TERMINATED)); + (unsigned int)sp_address_of(sp_sw_state), + (uint32_t)(IA_CSS_SP_SW_TERMINATED)); /* Note 1: The sp_start_isp function contains a wait till * the input network is configured by the SP. @@ -1728,14 +1779,14 @@ sh_css_sp_init_dma_sw_reg(int dma_id) for (i = 0; i < N_DMA_CHANNEL_ID; i++) { /* enable the writing request */ sh_css_sp_set_dma_sw_reg(dma_id, - i, - 0, - true); + i, + 0, + true); /* enable the reading request */ sh_css_sp_set_dma_sw_reg(dma_id, - i, - 1, - true); + i, + 1, + true); } return true; @@ -1747,9 +1798,9 @@ sh_css_sp_init_dma_sw_reg(int dma_id) */ bool sh_css_sp_set_dma_sw_reg(int dma_id, - int channel_id, - int request_type, - bool enable) + int channel_id, + int request_type, + bool enable) { u32 sw_reg; u32 bit_val; @@ -1763,7 +1814,7 @@ sh_css_sp_set_dma_sw_reg(int dma_id, /* get the software-mask */ sw_reg = - sh_css_sp_group.debug.dma_sw_reg; + sh_css_sp_group.debug.dma_sw_reg; /* get the offest of the target bit */ bit_offset = (8 * request_type) + channel_id; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h index d2e8dcb00c0ee..88d7d404cc7a4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h @@ -30,7 +30,8 @@ void sh_css_sp_store_init_dmem(const struct ia_css_fw_info *fw); void -store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned int stage); +store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, + unsigned int stage); void sh_css_stage_write_binary_info(struct ia_css_binary_info *info); @@ -40,7 +41,8 @@ store_sp_group_data(void); /* Start binary (jpeg) copy on the SP */ void -sh_css_sp_start_binary_copy(unsigned int pipe_num, struct ia_css_frame *out_frame, +sh_css_sp_start_binary_copy(unsigned int pipe_num, + struct ia_css_frame *out_frame, unsigned int two_ppc); unsigned int @@ -68,11 +70,12 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, #endif #ifdef ISP2401 , - const struct ia_css_coordinate *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame + const struct ia_css_coordinate + *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame positioned on shading table at shading correction in ISP. */ const struct ia_css_isp_parameters *params #endif - ); + ); void sh_css_sp_uninit_pipeline(unsigned int pipe_num); @@ -93,9 +96,9 @@ sh_css_init_host2sp_frame_data(void); */ void sh_css_update_host2sp_offline_frame( - unsigned int frame_num, - struct ia_css_frame *frame, - struct ia_css_metadata *metadata); + unsigned int frame_num, + struct ia_css_frame *frame, + struct ia_css_metadata *metadata); #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) /** @@ -106,8 +109,8 @@ sh_css_update_host2sp_offline_frame( */ void sh_css_update_host2sp_mipi_frame( - unsigned int frame_num, - struct ia_css_frame *frame); + unsigned int frame_num, + struct ia_css_frame *frame); /** * @brief Update the mipi metadata information in host_sp_communication. @@ -117,8 +120,8 @@ sh_css_update_host2sp_mipi_frame( */ void sh_css_update_host2sp_mipi_metadata( - unsigned int frame_num, - struct ia_css_metadata *metadata); + unsigned int frame_num, + struct ia_css_metadata *metadata); /** * @brief Update the nr of mipi frames to use in host_sp_communication. @@ -135,7 +138,8 @@ sh_css_update_host2sp_num_mipi_frames(unsigned int num_frames); * @param[in] num_frames The number of raw frames to use. */ void -sh_css_update_host2sp_cont_num_raw_frames(unsigned int num_frames, bool set_avail); +sh_css_update_host2sp_cont_num_raw_frames(unsigned int num_frames, + bool set_avail); void sh_css_event_init_irq_mask(void); @@ -159,9 +163,9 @@ sh_css_sp_get_debug_state(struct sh_css_sp_debug_state *state); #if !defined(HAS_NO_INPUT_FORMATTER) void sh_css_sp_set_if_configs( - const input_formatter_cfg_t *config_a, - const input_formatter_cfg_t *config_b, - const uint8_t if_config_index); + const input_formatter_cfg_t *config_a, + const input_formatter_cfg_t *config_b, + const uint8_t if_config_index); #endif void @@ -236,9 +240,9 @@ sh_css_sp_init_dma_sw_reg(int dma_id); */ bool sh_css_sp_set_dma_sw_reg(int dma_id, - int channel_id, - int request_type, - bool enable); + int channel_id, + int request_type, + bool enable); extern struct sh_css_sp_group sh_css_sp_group; extern struct sh_css_sp_stage sh_css_sp_stage; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c index 77f135e7dc3c2..548d4a3567b29 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c @@ -16,7 +16,7 @@ #include unsigned int sh_css_stream_format_2_bits_per_subpixel( - enum atomisp_input_format format) + enum atomisp_input_format format) { unsigned int rval; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h index b699f538e0ddb..32ebd6e0f344b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h @@ -18,6 +18,6 @@ #include unsigned int sh_css_stream_format_2_bits_per_subpixel( - enum atomisp_input_format format); + enum atomisp_input_format format); #endif /* __SH_CSS_STREAM_FORMAT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h index cfca3520e8ccd..482c99b14ba95 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h @@ -40,10 +40,11 @@ struct sh_css { * possibility. Also, active_pipes[] should be able to hold only * SH_CSS_MAX_SP_THREADS objects. Anything else is misleading. */ struct ia_css_pipe *all_pipes[IA_CSS_PIPELINE_NUM_MAX]; - void * (*malloc)(size_t bytes, bool zero_mem); + void *(*malloc)(size_t bytes, bool zero_mem); void (*free)(void *ptr); #ifdef ISP2401 - void * (*malloc_ex)(size_t bytes, bool zero_mem, const char *caller_func, int caller_line); + void *(*malloc_ex)(size_t bytes, bool zero_mem, const char *caller_func, + int caller_line); void (*free_ex)(void *ptr, const char *caller_func, int caller_line); #endif void (*flush)(struct ia_css_acc_fw *fw); @@ -54,14 +55,18 @@ struct sh_css { unsigned int num_cont_raw_frames; #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) unsigned int num_mipi_frames[N_CSI_PORTS]; - struct ia_css_frame *mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; - struct ia_css_metadata *mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; - unsigned int mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT]; + struct ia_css_frame + *mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + struct ia_css_metadata + *mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + unsigned int + mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT]; unsigned int mipi_frame_size[N_CSI_PORTS]; #endif hrt_vaddress sp_bin_addr; hrt_data page_table_base_index; - unsigned int size_mem_words; /* \deprecated{Use ia_css_mipi_buffer_config instead.}*/ + unsigned int + size_mem_words; /* \deprecated{Use ia_css_mipi_buffer_config instead.}*/ enum ia_css_irq_type irq_type; unsigned int pipe_counter; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c index 6e0c5e7f8620d..3c7cadd837da8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c @@ -18,8 +18,7 @@ #include "sh_css_firmware.h" enum ia_css_err -ia_css_get_version(char *version, int max_size) -{ +ia_css_get_version(char *version, int max_size) { if (max_size <= (int)strlen(CSS_VERSION_STRING) + (int)strlen(sh_css_get_fw_version()) + 5) return IA_CSS_ERR_INVALID_ARGUMENTS; strcpy(version, CSS_VERSION_STRING); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c index d9c7d8012b897..986396904fe03 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c @@ -66,11 +66,11 @@ static struct hmm_buffer_object *__bo_alloc(struct kmem_cache *bo_cache) } static int __bo_init(struct hmm_bo_device *bdev, struct hmm_buffer_object *bo, - unsigned int pgnr) + unsigned int pgnr) { check_bodev_null_return(bdev, -EINVAL); var_equal_return(hmm_bo_device_inited(bdev), 0, -EINVAL, - "hmm_bo_device not inited yet.\n"); + "hmm_bo_device not inited yet.\n"); /* prevent zero size buffer object */ if (pgnr == 0) { dev_err(atomisp_dev, "0 size buffer is not allowed.\n"); @@ -96,23 +96,23 @@ static int __bo_init(struct hmm_bo_device *bdev, struct hmm_buffer_object *bo, } static struct hmm_buffer_object *__bo_search_and_remove_from_free_rbtree( - struct rb_node *node, unsigned int pgnr) + struct rb_node *node, unsigned int pgnr) { struct hmm_buffer_object *this, *ret_bo, *temp_bo; this = rb_entry(node, struct hmm_buffer_object, node); if (this->pgnr == pgnr || - (this->pgnr > pgnr && !this->node.rb_left)) { + (this->pgnr > pgnr && !this->node.rb_left)) { goto remove_bo_and_return; } else { if (this->pgnr < pgnr) { if (!this->node.rb_right) return NULL; ret_bo = __bo_search_and_remove_from_free_rbtree( - this->node.rb_right, pgnr); + this->node.rb_right, pgnr); } else { ret_bo = __bo_search_and_remove_from_free_rbtree( - this->node.rb_left, pgnr); + this->node.rb_left, pgnr); } if (!ret_bo) { if (this->pgnr > pgnr) @@ -147,7 +147,7 @@ static struct hmm_buffer_object *__bo_search_and_remove_from_free_rbtree( } static struct hmm_buffer_object *__bo_search_by_addr(struct rb_root *root, - ia_css_ptr start) + ia_css_ptr start) { struct rb_node *n = root->rb_node; struct hmm_buffer_object *bo; @@ -172,7 +172,7 @@ static struct hmm_buffer_object *__bo_search_by_addr(struct rb_root *root, } static struct hmm_buffer_object *__bo_search_by_addr_in_range( - struct rb_root *root, unsigned int start) + struct rb_root *root, unsigned int start) { struct rb_node *n = root->rb_node; struct hmm_buffer_object *bo; @@ -197,7 +197,7 @@ static struct hmm_buffer_object *__bo_search_by_addr_in_range( } static void __bo_insert_to_free_rbtree(struct rb_root *root, - struct hmm_buffer_object *bo) + struct hmm_buffer_object *bo) { struct rb_node **new = &root->rb_node; struct rb_node *parent = NULL; @@ -255,8 +255,8 @@ static void __bo_insert_to_alloc_rbtree(struct rb_root *root, } static struct hmm_buffer_object *__bo_break_up(struct hmm_bo_device *bdev, - struct hmm_buffer_object *bo, - unsigned int pgnr) + struct hmm_buffer_object *bo, + unsigned int pgnr) { struct hmm_buffer_object *new_bo; unsigned long flags; @@ -296,29 +296,29 @@ static void __bo_take_off_handling(struct hmm_buffer_object *bo) */ if (!bo->prev && !bo->next) { rb_erase(&bo->node, &bdev->free_rbtree); - /* 2. when bo->next != NULL && bo->prev == NULL, bo is a rbtree node, - * and has a linked list,to take off this bo we need erase bo - * first, then, insert bo->next into free rbtree and rebalance - * the free rbtree - */ + /* 2. when bo->next != NULL && bo->prev == NULL, bo is a rbtree node, + * and has a linked list,to take off this bo we need erase bo + * first, then, insert bo->next into free rbtree and rebalance + * the free rbtree + */ } else if (!bo->prev && bo->next) { bo->next->prev = NULL; rb_erase(&bo->node, &bdev->free_rbtree); __bo_insert_to_free_rbtree(&bdev->free_rbtree, bo->next); bo->next = NULL; - /* 3. when bo->prev != NULL && bo->next == NULL, bo is not a rbtree - * node, bo is the last element of the linked list after rbtree - * node, to take off this bo, we just need set the "prev/next" - * pointers to NULL, the free rbtree stays unchaged - */ + /* 3. when bo->prev != NULL && bo->next == NULL, bo is not a rbtree + * node, bo is the last element of the linked list after rbtree + * node, to take off this bo, we just need set the "prev/next" + * pointers to NULL, the free rbtree stays unchaged + */ } else if (bo->prev && !bo->next) { bo->prev->next = NULL; bo->prev = NULL; - /* 4. when bo->prev != NULL && bo->next != NULL ,bo is not a rbtree - * node, bo is in the middle of the linked list after rbtree node, - * to take off this bo, we just set take the "prev/next" pointers - * to NULL, the free rbtree stays unchaged - */ + /* 4. when bo->prev != NULL && bo->next != NULL ,bo is not a rbtree + * node, bo is in the middle of the linked list after rbtree node, + * to take off this bo, we just set take the "prev/next" pointers + * to NULL, the free rbtree stays unchaged + */ } else if (bo->prev && bo->next) { bo->next->prev = bo->prev; bo->prev->next = bo->next; @@ -328,7 +328,7 @@ static void __bo_take_off_handling(struct hmm_buffer_object *bo) } static struct hmm_buffer_object *__bo_merge(struct hmm_buffer_object *bo, - struct hmm_buffer_object *next_bo) + struct hmm_buffer_object *next_bo) { struct hmm_bo_device *bdev; unsigned long flags; @@ -350,9 +350,9 @@ static struct hmm_buffer_object *__bo_merge(struct hmm_buffer_object *bo, * hmm_bo_device functions. */ int hmm_bo_device_init(struct hmm_bo_device *bdev, - struct isp_mmu_client *mmu_driver, - unsigned int vaddr_start, - unsigned int size) + struct isp_mmu_client *mmu_driver, + unsigned int vaddr_start, + unsigned int size) { struct hmm_buffer_object *bo; unsigned long flags; @@ -380,7 +380,7 @@ int hmm_bo_device_init(struct hmm_bo_device *bdev, bdev->free_rbtree = RB_ROOT; bdev->bo_cache = kmem_cache_create("bo_cache", - sizeof(struct hmm_buffer_object), 0, 0, NULL); + sizeof(struct hmm_buffer_object), 0, 0, NULL); if (!bdev->bo_cache) { dev_err(atomisp_dev, "%s: create cache failed!\n", __func__); isp_mmu_exit(&bdev->mmu); @@ -412,14 +412,14 @@ int hmm_bo_device_init(struct hmm_bo_device *bdev, } struct hmm_buffer_object *hmm_bo_alloc(struct hmm_bo_device *bdev, - unsigned int pgnr) + unsigned int pgnr) { struct hmm_buffer_object *bo, *new_bo; struct rb_root *root = &bdev->free_rbtree; check_bodev_null_return(bdev, NULL); var_equal_return(hmm_bo_device_inited(bdev), 0, NULL, - "hmm_bo_device not inited yet.\n"); + "hmm_bo_device not inited yet.\n"); if (pgnr == 0) { dev_err(atomisp_dev, "0 size buffer is not allowed.\n"); @@ -500,15 +500,15 @@ void hmm_bo_release(struct hmm_buffer_object *bo) next_bo = list_entry(bo->list.next, struct hmm_buffer_object, list); if (bo->list.prev != &bdev->entire_bo_list && - prev_bo->end == bo->start && - (prev_bo->status & HMM_BO_MASK) == HMM_BO_FREE) { + prev_bo->end == bo->start && + (prev_bo->status & HMM_BO_MASK) == HMM_BO_FREE) { __bo_take_off_handling(prev_bo); bo = __bo_merge(prev_bo, bo); } if (bo->list.next != &bdev->entire_bo_list && - next_bo->start == bo->end && - (next_bo->status & HMM_BO_MASK) == HMM_BO_FREE) { + next_bo->start == bo->end && + (next_bo->status & HMM_BO_MASK) == HMM_BO_FREE) { __bo_take_off_handling(next_bo); bo = __bo_merge(bo, next_bo); } @@ -534,7 +534,7 @@ void hmm_bo_device_exit(struct hmm_bo_device *bdev) */ while (!RB_EMPTY_ROOT(&bdev->allocated_rbtree)) hmm_bo_release( - rbtree_node_to_hmm_bo(bdev->allocated_rbtree.rb_node)); + rbtree_node_to_hmm_bo(bdev->allocated_rbtree.rb_node)); dev_dbg(atomisp_dev, "%s: finished releasing all allocated bos!\n", __func__); @@ -572,7 +572,7 @@ int hmm_bo_allocated(struct hmm_buffer_object *bo) } struct hmm_buffer_object *hmm_bo_device_search_start( - struct hmm_bo_device *bdev, ia_css_ptr vaddr) + struct hmm_bo_device *bdev, ia_css_ptr vaddr) { struct hmm_buffer_object *bo; @@ -592,7 +592,7 @@ struct hmm_buffer_object *hmm_bo_device_search_start( } struct hmm_buffer_object *hmm_bo_device_search_in_range( - struct hmm_bo_device *bdev, unsigned int vaddr) + struct hmm_bo_device *bdev, unsigned int vaddr) { struct hmm_buffer_object *bo; @@ -612,7 +612,7 @@ struct hmm_buffer_object *hmm_bo_device_search_in_range( } struct hmm_buffer_object *hmm_bo_device_search_vmap_start( - struct hmm_bo_device *bdev, const void *vaddr) + struct hmm_bo_device *bdev, const void *vaddr) { struct list_head *pos; struct hmm_buffer_object *bo; @@ -637,9 +637,9 @@ struct hmm_buffer_object *hmm_bo_device_search_vmap_start( } static void free_private_bo_pages(struct hmm_buffer_object *bo, - struct hmm_pool *dypool, - struct hmm_pool *repool, - int free_pgnr) + struct hmm_pool *dypool, + struct hmm_pool *repool, + int free_pgnr) { int i, ret; @@ -649,7 +649,7 @@ static void free_private_bo_pages(struct hmm_buffer_object *bo, if (repool->pops && repool->pops->pool_free_pages) { repool->pops->pool_free_pages(repool->pool_info, - &bo->page_obj[i]); + &bo->page_obj[i]); hmm_mem_stat.res_cnt--; } break; @@ -665,21 +665,21 @@ static void free_private_bo_pages(struct hmm_buffer_object *bo, && dypool->pops->pool_inited(dypool->pool_info)) { if (dypool->pops->pool_free_pages) dypool->pops->pool_free_pages( - dypool->pool_info, - &bo->page_obj[i]); + dypool->pool_info, + &bo->page_obj[i]); break; } - /* - * if dynamic memory pool doesn't exist, need to free - * pages to system directly. - */ + /* + * if dynamic memory pool doesn't exist, need to free + * pages to system directly. + */ default: ret = set_pages_wb(bo->page_obj[i].page, 1); if (ret) dev_err(atomisp_dev, - "set page to WB err ...ret = %d\n", - ret); + "set page to WB err ...ret = %d\n", + ret); /* W/A: set_pages_wb seldom return value = -EFAULT indicate that address of page is not in valid @@ -700,10 +700,10 @@ static void free_private_bo_pages(struct hmm_buffer_object *bo, /*Allocate pages which will be used only by ISP*/ static int alloc_private_pages(struct hmm_buffer_object *bo, - int from_highmem, - bool cached, - struct hmm_pool *dypool, - struct hmm_pool *repool) + int from_highmem, + bool cached, + struct hmm_pool *dypool, + struct hmm_pool *repool) { int ret; unsigned int pgnr, order, blk_pgnr, alloc_pgnr; @@ -720,7 +720,7 @@ static int alloc_private_pages(struct hmm_buffer_object *bo, pgnr = bo->pgnr; bo->page_obj = kmalloc_array(pgnr, sizeof(struct hmm_page_object), - GFP_KERNEL); + GFP_KERNEL); if (unlikely(!bo->page_obj)) return -ENOMEM; @@ -732,8 +732,8 @@ static int alloc_private_pages(struct hmm_buffer_object *bo, */ if (dypool->pops && dypool->pops->pool_alloc_pages) { alloc_pgnr = dypool->pops->pool_alloc_pages(dypool->pool_info, - bo->page_obj, pgnr, - cached); + bo->page_obj, pgnr, + cached); hmm_mem_stat.dyc_size -= alloc_pgnr; if (alloc_pgnr == pgnr) @@ -748,8 +748,8 @@ static int alloc_private_pages(struct hmm_buffer_object *bo, */ if (repool->pops && repool->pops->pool_alloc_pages) { alloc_pgnr = repool->pops->pool_alloc_pages(repool->pool_info, - &bo->page_obj[i], pgnr, - cached); + &bo->page_obj[i], pgnr, + cached); hmm_mem_stat.res_cnt += alloc_pgnr; if (alloc_pgnr == pgnr) return 0; @@ -794,7 +794,7 @@ static int alloc_private_pages(struct hmm_buffer_object *bo, if (order == HMM_MIN_ORDER) { dev_err(atomisp_dev, "%s: cannot allocate pages\n", - __func__); + __func__); goto cleanup; } order = HMM_MIN_ORDER; @@ -819,7 +819,7 @@ static int alloc_private_pages(struct hmm_buffer_object *bo, ret = set_pages_uc(pages, blk_pgnr); if (ret) { dev_err(atomisp_dev, - "set page uncacheablefailed.\n"); + "set page uncacheablefailed.\n"); __free_pages(pages, order); @@ -857,8 +857,8 @@ static int alloc_private_pages(struct hmm_buffer_object *bo, } static void free_private_pages(struct hmm_buffer_object *bo, - struct hmm_pool *dypool, - struct hmm_pool *repool) + struct hmm_pool *dypool, + struct hmm_pool *repool) { free_private_bo_pages(bo, dypool, repool, bo->pgnr); @@ -891,9 +891,9 @@ static int __get_pfnmap_pages(struct task_struct *tsk, struct mm_struct *mm, * If FOLL_FORCE is set, we only require the "MAY" flags. */ vm_flags = (gup_flags & FOLL_WRITE) ? - (VM_WRITE | VM_MAYWRITE) : (VM_READ | VM_MAYREAD); + (VM_WRITE | VM_MAYWRITE) : (VM_READ | VM_MAYREAD); vm_flags &= (gup_flags & FOLL_FORCE) ? - (VM_MAYREAD | VM_MAYWRITE) : (VM_READ | VM_WRITE); + (VM_MAYREAD | VM_MAYWRITE) : (VM_READ | VM_WRITE); i = 0; do { @@ -955,8 +955,8 @@ static int __get_pfnmap_pages(struct task_struct *tsk, struct mm_struct *mm, } static int get_pfnmap_pages(struct task_struct *tsk, struct mm_struct *mm, - unsigned long start, int nr_pages, int write, int force, - struct page **pages, struct vm_area_struct **vmas) + unsigned long start, int nr_pages, int write, int force, + struct page **pages, struct vm_area_struct **vmas) { int flags = FOLL_TOUCH; @@ -986,7 +986,7 @@ static int alloc_user_pages(struct hmm_buffer_object *bo, return -ENOMEM; bo->page_obj = kmalloc_array(bo->pgnr, sizeof(struct hmm_page_object), - GFP_KERNEL); + GFP_KERNEL); if (unlikely(!bo->page_obj)) { kfree(pages); return -ENOMEM; @@ -1018,7 +1018,7 @@ static int alloc_user_pages(struct hmm_buffer_object *bo, /*Handle frame buffer allocated in user space*/ mutex_unlock(&bo->mutex); page_nr = get_user_pages_fast((unsigned long)userptr, - (int)(bo->pgnr), 1, pages); + (int)(bo->pgnr), 1, pages); mutex_lock(&bo->mutex); bo->mem_type = HMM_BO_MEM_TYPE_USER; } @@ -1026,8 +1026,8 @@ static int alloc_user_pages(struct hmm_buffer_object *bo, /* can be written by caller, not forced */ if (page_nr != bo->pgnr) { dev_err(atomisp_dev, - "get_user_pages err: bo->pgnr = %d, pgnr actually pinned = %d.\n", - bo->pgnr, page_nr); + "get_user_pages err: bo->pgnr = %d, pgnr actually pinned = %d.\n", + bo->pgnr, page_nr); goto out_of_mem; } @@ -1092,7 +1092,7 @@ int hmm_bo_alloc_pages(struct hmm_buffer_object *bo, */ if (type == HMM_BO_PRIVATE) { ret = alloc_private_pages(bo, from_highmem, - cached, &dynamic_pool, &reserved_pool); + cached, &dynamic_pool, &reserved_pool); } else if (type == HMM_BO_USER) { ret = alloc_user_pages(bo, userptr, cached); } else { @@ -1117,7 +1117,7 @@ int hmm_bo_alloc_pages(struct hmm_buffer_object *bo, status_err: mutex_unlock(&bo->mutex); dev_err(atomisp_dev, - "buffer object has already page allocated.\n"); + "buffer object has already page allocated.\n"); return -EINVAL; } @@ -1148,7 +1148,7 @@ void hmm_bo_free_pages(struct hmm_buffer_object *bo) status_err2: mutex_unlock(&bo->mutex); dev_err(atomisp_dev, - "buffer object not page allocated yet.\n"); + "buffer object not page allocated yet.\n"); } int hmm_bo_page_allocated(struct hmm_buffer_object *bo) @@ -1179,7 +1179,7 @@ int hmm_bo_get_page_info(struct hmm_buffer_object *bo, status_err: dev_err(atomisp_dev, - "buffer object not page allocated yet.\n"); + "buffer object not page allocated yet.\n"); mutex_unlock(&bo->mutex); return -EINVAL; } @@ -1199,8 +1199,8 @@ int hmm_bo_bind(struct hmm_buffer_object *bo) mutex_lock(&bo->mutex); check_bo_status_yes_goto(bo, - HMM_BO_PAGE_ALLOCED | HMM_BO_ALLOCED, - status_err1); + HMM_BO_PAGE_ALLOCED | HMM_BO_ALLOCED, + status_err1); check_bo_status_no_goto(bo, HMM_BO_BINDED, status_err2); @@ -1230,7 +1230,7 @@ int hmm_bo_bind(struct hmm_buffer_object *bo) */ if (bo->start != 0x0) isp_mmu_flush_tlb_range(&bdev->mmu, bo->start, - (bo->pgnr << PAGE_SHIFT)); + (bo->pgnr << PAGE_SHIFT)); bo->status |= HMM_BO_BINDED; @@ -1248,7 +1248,7 @@ int hmm_bo_bind(struct hmm_buffer_object *bo) mutex_unlock(&bo->mutex); dev_err(atomisp_dev, - "setup MMU address mapping failed.\n"); + "setup MMU address mapping failed.\n"); return ret; status_err2: @@ -1258,7 +1258,7 @@ int hmm_bo_bind(struct hmm_buffer_object *bo) status_err1: mutex_unlock(&bo->mutex); dev_err(atomisp_dev, - "buffer object vm_node or page not allocated.\n"); + "buffer object vm_node or page not allocated.\n"); return -EINVAL; } @@ -1276,9 +1276,9 @@ void hmm_bo_unbind(struct hmm_buffer_object *bo) mutex_lock(&bo->mutex); check_bo_status_yes_goto(bo, - HMM_BO_PAGE_ALLOCED | - HMM_BO_ALLOCED | - HMM_BO_BINDED, status_err); + HMM_BO_PAGE_ALLOCED | + HMM_BO_ALLOCED | + HMM_BO_BINDED, status_err); bdev = bo->bdev; @@ -1305,7 +1305,7 @@ void hmm_bo_unbind(struct hmm_buffer_object *bo) status_err: mutex_unlock(&bo->mutex); dev_err(atomisp_dev, - "buffer vm or page not allocated or not binded yet.\n"); + "buffer vm or page not allocated or not binded yet.\n"); } int hmm_bo_binded(struct hmm_buffer_object *bo) @@ -1354,7 +1354,7 @@ void *hmm_bo_vmap(struct hmm_buffer_object *bo, bool cached) pages[i] = bo->page_obj[i].page; bo->vmap_addr = vmap(pages, bo->pgnr, VM_MAP, - cached ? PAGE_KERNEL : PAGE_KERNEL_NOCACHE); + cached ? PAGE_KERNEL : PAGE_KERNEL_NOCACHE); if (unlikely(!bo->vmap_addr)) { kfree(pages); mutex_unlock(&bo->mutex); @@ -1488,7 +1488,7 @@ int hmm_bo_mmap(struct vm_area_struct *vma, struct hmm_buffer_object *bo) */ if ((start + pgnr_to_size(pgnr)) != end) { dev_warn(atomisp_dev, - "vma's address space size not equal to buffer object's size"); + "vma's address space size not equal to buffer object's size"); return -EINVAL; } @@ -1497,8 +1497,8 @@ int hmm_bo_mmap(struct vm_area_struct *vma, struct hmm_buffer_object *bo) pfn = page_to_pfn(bo->page_obj[i].page); if (remap_pfn_range(vma, virt, pfn, PAGE_SIZE, PAGE_SHARED)) { dev_warn(atomisp_dev, - "remap_pfn_range failed: virt = 0x%x, pfn = 0x%x, mapped_pgnr = %d\n", - virt, pfn, 1); + "remap_pfn_range failed: virt = 0x%x, pfn = 0x%x, mapped_pgnr = %d\n", + virt, pfn, 1); return -EINVAL; } virt += PAGE_SIZE; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c index f59fd99082570..1a87af68a9244 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c @@ -33,8 +33,8 @@ * dynamic memory pool ops. */ static unsigned int get_pages_from_dynamic_pool(void *pool, - struct hmm_page_object *page_obj, - unsigned int size, bool cached) + struct hmm_page_object *page_obj, + unsigned int size, bool cached) { struct hmm_page *hmm_page; unsigned long flags; @@ -48,7 +48,7 @@ static unsigned int get_pages_from_dynamic_pool(void *pool, if (dypool_info->initialized) { while (!list_empty(&dypool_info->pages_list)) { hmm_page = list_entry(dypool_info->pages_list.next, - struct hmm_page, list); + struct hmm_page, list); list_del(&hmm_page->list); dypool_info->pgnr--; @@ -70,7 +70,7 @@ static unsigned int get_pages_from_dynamic_pool(void *pool, } static void free_pages_to_dynamic_pool(void *pool, - struct hmm_page_object *page_obj) + struct hmm_page_object *page_obj) { struct hmm_page *hmm_page; unsigned long flags; @@ -110,7 +110,7 @@ static void free_pages_to_dynamic_pool(void *pool, return; } hmm_page = kmem_cache_zalloc(dypool_info->pgptr_cache, - GFP_KERNEL); + GFP_KERNEL); if (!hmm_page) { /* free page directly */ ret = set_pages_wb(page_obj->page, 1); @@ -144,13 +144,13 @@ static int hmm_dynamic_pool_init(void **pool, unsigned int pool_size) return 0; dypool_info = kmalloc(sizeof(struct hmm_dynamic_pool_info), - GFP_KERNEL); + GFP_KERNEL); if (unlikely(!dypool_info)) return -ENOMEM; dypool_info->pgptr_cache = kmem_cache_create("pgptr_cache", - sizeof(struct hmm_page), 0, - SLAB_HWCACHE_ALIGN, NULL); + sizeof(struct hmm_page), 0, + SLAB_HWCACHE_ALIGN, NULL); if (!dypool_info->pgptr_cache) { kfree(dypool_info); return -ENOMEM; @@ -186,7 +186,7 @@ static void hmm_dynamic_pool_exit(void **pool) while (!list_empty(&dypool_info->pages_list)) { hmm_page = list_entry(dypool_info->pages_list.next, - struct hmm_page, list); + struct hmm_page, list); list_del(&hmm_page->list); spin_unlock_irqrestore(&dypool_info->list_lock, flags); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c index 12d3839149c94..d739ed914d652 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c @@ -32,8 +32,8 @@ * reserved memory pool ops. */ static unsigned int get_pages_from_reserved_pool(void *pool, - struct hmm_page_object *page_obj, - unsigned int size, bool cached) + struct hmm_page_object *page_obj, + unsigned int size, bool cached) { unsigned long flags; unsigned int i = 0; @@ -82,17 +82,17 @@ static void free_pages_to_reserved_pool(void *pool, } static int hmm_reserved_pool_setup(struct hmm_reserved_pool_info **repool_info, - unsigned int pool_size) + unsigned int pool_size) { struct hmm_reserved_pool_info *pool_info; pool_info = kmalloc(sizeof(struct hmm_reserved_pool_info), - GFP_KERNEL); + GFP_KERNEL); if (unlikely(!pool_info)) return -ENOMEM; pool_info->pages = kmalloc(sizeof(struct page *) * pool_size, - GFP_KERNEL); + GFP_KERNEL); if (unlikely(!pool_info->pages)) { kfree(pool_info); return -ENOMEM; @@ -147,7 +147,7 @@ static int hmm_reserved_pool_init(void **pool, unsigned int pool_size) if (order == 0) { fail_number++; dev_err(atomisp_dev, "%s: alloc_pages failed: %d\n", - __func__, fail_number); + __func__, fail_number); /* if fail five times, will goto end */ /* FIXME: whether is the mechanism is ok? */ @@ -162,7 +162,7 @@ static int hmm_reserved_pool_init(void **pool, unsigned int pool_size) ret = set_pages_uc(pages, blk_pgnr); if (ret) { dev_err(atomisp_dev, - "set pages uncached failed\n"); + "set pages uncached failed\n"); __free_pages(pages, order); goto end; } @@ -185,8 +185,8 @@ static int hmm_reserved_pool_init(void **pool, unsigned int pool_size) *pool = repool_info; dev_info(atomisp_dev, - "hmm_reserved_pool init successfully,hmm_reserved_pool is with %d pages.\n", - repool_info->pgnr); + "hmm_reserved_pool init successfully,hmm_reserved_pool is with %d pages.\n", + repool_info->pgnr); return 0; } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c index 8885d52166f3b..976a2cb513549 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c @@ -36,7 +36,7 @@ static unsigned int vm_node_end(unsigned int start, unsigned int pgnr) } static int addr_in_vm_node(unsigned int addr, - struct hmm_vm_node *node) + struct hmm_vm_node *node) { return (addr >= node->start) && (addr < (node->start + node->size)); } @@ -80,7 +80,7 @@ void hmm_vm_clean(struct hmm_vm *vm) } static struct hmm_vm_node *alloc_hmm_vm_node(unsigned int pgnr, - struct hmm_vm *vm) + struct hmm_vm *vm) { struct hmm_vm_node *node; @@ -134,7 +134,7 @@ struct hmm_vm_node *hmm_vm_alloc_node(struct hmm_vm *vm, unsigned int pgnr) spin_unlock(&vm->lock); kmem_cache_free(vm->cache, node); dev_err(atomisp_dev, - "no enough virtual address space.\n"); + "no enough virtual address space.\n"); return NULL; } @@ -191,7 +191,7 @@ struct hmm_vm_node *hmm_vm_find_node_start(struct hmm_vm *vm, unsigned int addr) } struct hmm_vm_node *hmm_vm_find_node_in_range(struct hmm_vm *vm, - unsigned int addr) + unsigned int addr) { struct hmm_vm_node *node; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c index a1861410bf75e..236f27b503862 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c @@ -38,32 +38,32 @@ void hrt_isp_css_mm_set_user_ptr(void __user *userptr, } static ia_css_ptr __hrt_isp_css_mm_alloc(size_t bytes, - const void __user *userptr, - unsigned int num_pages, - enum hrt_userptr_type type, - bool cached) + const void __user *userptr, + unsigned int num_pages, + enum hrt_userptr_type type, + bool cached) { #ifdef CONFIG_ION if (type == HRT_USR_ION) return hmm_alloc(bytes, HMM_BO_ION, 0, - userptr, cached); + userptr, cached); #endif if (type == HRT_USR_PTR) { if (!userptr) return hmm_alloc(bytes, HMM_BO_PRIVATE, 0, - NULL, cached); + NULL, cached); else { if (num_pages < ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is less than the expected size..\n"); + "user space memory size is less than the expected size..\n"); else if (num_pages > ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is large than the expected size..\n"); + "user space memory size is large than the expected size..\n"); return hmm_alloc(bytes, HMM_BO_USER, 0, - userptr, cached); + userptr, cached); } } else { dev_err(atomisp_dev, "user ptr type is incorrect.\n"); @@ -78,10 +78,10 @@ ia_css_ptr hrt_isp_css_mm_alloc(size_t bytes) } ia_css_ptr hrt_isp_css_mm_alloc_user_ptr(size_t bytes, - const void __user *userptr, - unsigned int num_pages, - enum hrt_userptr_type type, - bool cached) + const void __user *userptr, + unsigned int num_pages, + enum hrt_userptr_type type, + bool cached) { return __hrt_isp_css_mm_alloc(bytes, userptr, num_pages, type, cached); @@ -91,17 +91,17 @@ ia_css_ptr hrt_isp_css_mm_alloc_cached(size_t bytes) { if (!my_userptr) return hmm_alloc(bytes, HMM_BO_PRIVATE, 0, NULL, - HMM_CACHED); + HMM_CACHED); else { if (my_num_pages < ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is less than the expected size..\n"); + "user space memory size is less than the expected size..\n"); else if (my_num_pages > ((__page_align(bytes)) >> PAGE_SHIFT)) dev_err(atomisp_dev, - "user space memory size is large than the expected size..\n"); + "user space memory size is large than the expected size..\n"); return hmm_alloc(bytes, HMM_BO_USER, 0, - my_userptr, HMM_CACHED); + my_userptr, HMM_CACHED); } } diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h index a7a2775aa6f51..818ecf90b1f5a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h @@ -38,15 +38,15 @@ struct hrt_userbuffer_attr { }; void hrt_isp_css_mm_set_user_ptr(void __user *userptr, - unsigned int num_pages, enum hrt_userptr_type); + unsigned int num_pages, enum hrt_userptr_type); /* Allocate memory, returns a virtual address */ ia_css_ptr hrt_isp_css_mm_alloc(size_t bytes); ia_css_ptr hrt_isp_css_mm_alloc_user_ptr(size_t bytes, - const void __user *userptr, - unsigned int num_pages, - enum hrt_userptr_type, - bool cached); + const void __user *userptr, + unsigned int num_pages, + enum hrt_userptr_type, + bool cached); ia_css_ptr hrt_isp_css_mm_alloc_cached(size_t bytes); /* allocate memory and initialize with zeros, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h index 7dcc73c9f49d4..254a714424510 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h @@ -38,7 +38,7 @@ int hmm_init(void); void hmm_cleanup(void); ia_css_ptr hmm_alloc(size_t bytes, enum hmm_bo_type type, - int from_highmem, const void __user *userptr, bool cached); + int from_highmem, const void __user *userptr, bool cached); void hmm_free(ia_css_ptr ptr); int hmm_load(ia_css_ptr virt, void *data, unsigned int bytes); int hmm_store(ia_css_ptr virt, const void *data, unsigned int bytes); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h index 3e7b1ed4ef5ba..f847d1de860ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h @@ -166,13 +166,13 @@ struct hmm_buffer_object { }; struct hmm_buffer_object *hmm_bo_alloc(struct hmm_bo_device *bdev, - unsigned int pgnr); + unsigned int pgnr); void hmm_bo_release(struct hmm_buffer_object *bo); int hmm_bo_device_init(struct hmm_bo_device *bdev, - struct isp_mmu_client *mmu_driver, - unsigned int vaddr_start, unsigned int size); + struct isp_mmu_client *mmu_driver, + unsigned int vaddr_start, unsigned int size); /* * clean up all hmm_bo_device related things. @@ -240,8 +240,8 @@ int hmm_bo_allocated(struct hmm_buffer_object *bo); * or by ISP driver itself. */ int hmm_bo_alloc_pages(struct hmm_buffer_object *bo, - enum hmm_bo_type type, int from_highmem, - const void __user *userptr, bool cached); + enum hmm_bo_type type, int from_highmem, + const void __user *userptr, bool cached); void hmm_bo_free_pages(struct hmm_buffer_object *bo); int hmm_bo_page_allocated(struct hmm_buffer_object *bo); @@ -249,7 +249,7 @@ int hmm_bo_page_allocated(struct hmm_buffer_object *bo); * get physical page info of the bo. */ int hmm_bo_get_page_info(struct hmm_buffer_object *bo, - struct hmm_page_object **page_obj, int *pgnr); + struct hmm_page_object **page_obj, int *pgnr); /* * bind/unbind the physical pages to a virtual address space. @@ -294,7 +294,7 @@ extern struct hmm_pool reserved_pool; * return NULL if no such buffer object found. */ struct hmm_buffer_object *hmm_bo_device_search_start( - struct hmm_bo_device *bdev, ia_css_ptr vaddr); + struct hmm_bo_device *bdev, ia_css_ptr vaddr); /* * find the buffer object by its virtual address. @@ -303,13 +303,13 @@ struct hmm_buffer_object *hmm_bo_device_search_start( * return NULL if no such buffer object found. */ struct hmm_buffer_object *hmm_bo_device_search_in_range( - struct hmm_bo_device *bdev, ia_css_ptr vaddr); + struct hmm_bo_device *bdev, ia_css_ptr vaddr); /* * find the buffer object with kernel virtual address vaddr. * return NULL if no such buffer object found. */ struct hmm_buffer_object *hmm_bo_device_search_vmap_start( - struct hmm_bo_device *bdev, const void *vaddr); + struct hmm_bo_device *bdev, const void *vaddr); #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h index bf24e44462bca..8caf00502d748 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h @@ -48,8 +48,8 @@ struct hmm_pool_ops { int (*pool_init)(void **pool, unsigned int pool_size); void (*pool_exit)(void **pool); unsigned int (*pool_alloc_pages)(void *pool, - struct hmm_page_object *page_obj, - unsigned int size, bool cached); + struct hmm_page_object *page_obj, + unsigned int size, bool cached); void (*pool_free_pages)(void *pool, struct hmm_page_object *page_obj); int (*pool_inited)(void *pool); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h index 816a61a190678..93ac5e4451370 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h @@ -52,14 +52,14 @@ int hmm_vm_init(struct hmm_vm *vm, unsigned int start, void hmm_vm_clean(struct hmm_vm *vm); struct hmm_vm_node *hmm_vm_alloc_node(struct hmm_vm *vm, - unsigned int pgnr); + unsigned int pgnr); void hmm_vm_free_node(struct hmm_vm_node *node); struct hmm_vm_node *hmm_vm_find_node_start(struct hmm_vm *vm, - unsigned int addr); + unsigned int addr); struct hmm_vm_node *hmm_vm_find_node_in_range(struct hmm_vm *vm, - unsigned int addr); + unsigned int addr); #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h index e52a3ed5992b5..c94df9012ac73 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h @@ -97,12 +97,12 @@ struct isp_mmu_client { * not valid, it will set to tlb_flush_all by default. */ void (*tlb_flush_range)(struct isp_mmu *mmu, - unsigned int addr, unsigned int size); + unsigned int addr, unsigned int size); void (*tlb_flush_all)(struct isp_mmu *mmu); unsigned int (*phys_to_pte)(struct isp_mmu *mmu, - phys_addr_t phys); + phys_addr_t phys); phys_addr_t (*pte_to_phys)(struct isp_mmu *mmu, - unsigned int pte); + unsigned int pte); }; @@ -160,7 +160,7 @@ static inline void isp_mmu_flush_tlb_all(struct isp_mmu *mmu) #define isp_mmu_flush_tlb isp_mmu_flush_tlb_all static inline void isp_mmu_flush_tlb_range(struct isp_mmu *mmu, - unsigned int start, unsigned int size) + unsigned int start, unsigned int size) { if (mmu->driver && mmu->driver->tlb_flush_range) mmu->driver->tlb_flush_range(mmu, start, size); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c index 775f446bbf6f9..90365375534d1 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c @@ -54,7 +54,7 @@ #define NR_PAGES_2GB (SZ_2G / PAGE_SIZE) static void free_mmu_map(struct isp_mmu *mmu, unsigned int start_isp_virt, - unsigned int end_isp_virt); + unsigned int end_isp_virt); static unsigned int atomisp_get_pte(phys_addr_t pt, unsigned int idx) { @@ -82,7 +82,7 @@ static phys_addr_t isp_pte_to_pgaddr(struct isp_mmu *mmu, } static unsigned int isp_pgaddr_to_pte_valid(struct isp_mmu *mmu, - phys_addr_t phys) + phys_addr_t phys) { unsigned int pte = mmu->driver->phys_to_pte(mmu, phys); @@ -152,16 +152,16 @@ static void mmu_remap_error(struct isp_mmu *mmu, phys_addr_t new_phys) { dev_err(atomisp_dev, "address remap:\n\n" - "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" - "\tL2 PT: virt = %p, phys = 0x%llx, idx = %d\n" - "\told: isp_virt = 0x%x, phys = 0x%llx\n" - "\tnew: isp_virt = 0x%x, phys = 0x%llx\n", - isp_pt_phys_to_virt(l1_pt), - (u64)l1_pt, l1_idx, - isp_pt_phys_to_virt(l2_pt), - (u64)l2_pt, l2_idx, isp_virt, - (u64)old_phys, isp_virt, - (u64)new_phys); + "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" + "\tL2 PT: virt = %p, phys = 0x%llx, idx = %d\n" + "\told: isp_virt = 0x%x, phys = 0x%llx\n" + "\tnew: isp_virt = 0x%x, phys = 0x%llx\n", + isp_pt_phys_to_virt(l1_pt), + (u64)l1_pt, l1_idx, + isp_pt_phys_to_virt(l2_pt), + (u64)l2_pt, l2_idx, isp_virt, + (u64)old_phys, isp_virt, + (u64)new_phys); } static void mmu_unmap_l2_pte_error(struct isp_mmu *mmu, @@ -170,14 +170,14 @@ static void mmu_unmap_l2_pte_error(struct isp_mmu *mmu, unsigned int isp_virt, unsigned int pte) { dev_err(atomisp_dev, "unmap invalid L2 pte:\n\n" - "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" - "\tL2 PT: virt = %p, phys = 0x%llx, idx = %d\n" - "\tisp_virt = 0x%x, pte(page phys) = 0x%x\n", - isp_pt_phys_to_virt(l1_pt), - (u64)l1_pt, l1_idx, - isp_pt_phys_to_virt(l2_pt), - (u64)l2_pt, l2_idx, isp_virt, - pte); + "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" + "\tL2 PT: virt = %p, phys = 0x%llx, idx = %d\n" + "\tisp_virt = 0x%x, pte(page phys) = 0x%x\n", + isp_pt_phys_to_virt(l1_pt), + (u64)l1_pt, l1_idx, + isp_pt_phys_to_virt(l2_pt), + (u64)l2_pt, l2_idx, isp_virt, + pte); } static void mmu_unmap_l1_pte_error(struct isp_mmu *mmu, @@ -185,17 +185,17 @@ static void mmu_unmap_l1_pte_error(struct isp_mmu *mmu, unsigned int isp_virt, unsigned int pte) { dev_err(atomisp_dev, "unmap invalid L1 pte (L2 PT):\n\n" - "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" - "\tisp_virt = 0x%x, l1_pte(L2 PT) = 0x%x\n", - isp_pt_phys_to_virt(l1_pt), - (u64)l1_pt, l1_idx, (unsigned int)isp_virt, - pte); + "\tL1 PT: virt = %p, phys = 0x%llx, idx = %d\n" + "\tisp_virt = 0x%x, l1_pte(L2 PT) = 0x%x\n", + isp_pt_phys_to_virt(l1_pt), + (u64)l1_pt, l1_idx, (unsigned int)isp_virt, + pte); } static void mmu_unmap_l1_pt_error(struct isp_mmu *mmu, unsigned int pte) { dev_err(atomisp_dev, "unmap invalid L1PT:\n\n" - "L1PT = 0x%x\n", (unsigned int)pte); + "L1PT = 0x%x\n", (unsigned int)pte); } /* @@ -224,7 +224,7 @@ static int mmu_l2_map(struct isp_mmu *mmu, phys_addr_t l1_pt, if (ISP_PTE_VALID(mmu, pte)) { mmu_remap_error(mmu, l1_pt, l1_idx, - l2_pt, idx, ptr, pte, phys); + l2_pt, idx, ptr, pte, phys); /* free all mapped pages */ free_mmu_map(mmu, start, ptr); @@ -273,7 +273,7 @@ static int mmu_l1_map(struct isp_mmu *mmu, phys_addr_t l1_pt, l2_pt = alloc_page_table(mmu); if (l2_pt == NULL_PAGE) { dev_err(atomisp_dev, - "alloc page table fail.\n"); + "alloc page table fail.\n"); /* free all mapped pages */ free_mmu_map(mmu, start, ptr); @@ -293,12 +293,12 @@ static int mmu_l1_map(struct isp_mmu *mmu, phys_addr_t l1_pt, if (l1_aligned < end) { ret = mmu_l2_map(mmu, l1_pt, idx, - l2_pt, ptr, l1_aligned, phys); + l2_pt, ptr, l1_aligned, phys); phys += (l1_aligned - ptr); ptr = l1_aligned; } else { ret = mmu_l2_map(mmu, l1_pt, idx, - l2_pt, ptr, end, phys); + l2_pt, ptr, end, phys); phys += (end - ptr); ptr = end; } @@ -367,8 +367,8 @@ static int mmu_map(struct isp_mmu *mmu, unsigned int isp_virt, * address */ static void mmu_l2_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, - unsigned int l1_idx, phys_addr_t l2_pt, - unsigned int start, unsigned int end) + unsigned int l1_idx, phys_addr_t l2_pt, + unsigned int start, unsigned int end) { unsigned int ptr; unsigned int idx; @@ -387,7 +387,7 @@ static void mmu_l2_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, if (!ISP_PTE_VALID(mmu, pte)) mmu_unmap_l2_pte_error(mmu, l1_pt, l1_idx, - l2_pt, idx, ptr, pte); + l2_pt, idx, ptr, pte); atomisp_set_pte(l2_pt, idx, mmu->driver->null_pte); mmu->l2_pgt_refcount[l1_idx]--; @@ -405,7 +405,7 @@ static void mmu_l2_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, * address */ static void mmu_l1_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, - unsigned int start, unsigned int end) + unsigned int start, unsigned int end) { phys_addr_t l2_pt; unsigned int ptr, l1_aligned; @@ -452,7 +452,7 @@ static void mmu_l1_unmap(struct isp_mmu *mmu, phys_addr_t l1_pt, * address */ static void mmu_unmap(struct isp_mmu *mmu, unsigned int isp_virt, - unsigned int pgnr) + unsigned int pgnr) { unsigned int start, end; phys_addr_t l1_pt; @@ -478,7 +478,7 @@ static void mmu_unmap(struct isp_mmu *mmu, unsigned int isp_virt, * address. */ static void free_mmu_map(struct isp_mmu *mmu, unsigned int start_isp_virt, - unsigned int end_isp_virt) + unsigned int end_isp_virt) { unsigned int pgnr; unsigned int start, end; @@ -502,8 +502,8 @@ void isp_mmu_unmap(struct isp_mmu *mmu, unsigned int isp_virt, } static void isp_mmu_flush_tlb_range_default(struct isp_mmu *mmu, - unsigned int start, - unsigned int size) + unsigned int start, + unsigned int size) { isp_mmu_flush_tlb(mmu); } @@ -559,7 +559,7 @@ void isp_mmu_exit(struct isp_mmu *mmu) if (!ISP_PTE_VALID(mmu, mmu->l1_pte)) { dev_warn(atomisp_dev, "invalid L1PT: pte = 0x%x\n", - (unsigned int)mmu->l1_pte); + (unsigned int)mmu->l1_pte); return; } diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index d0b427539b6d3..4f1500ef0990c 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -50,7 +50,8 @@ struct gmin_subdev { static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS]; static enum { PMIC_UNSET = 0, PMIC_REGULATOR, PMIC_AXP, PMIC_TI, - PMIC_CRYSTALCOVE } pmic_id; + PMIC_CRYSTALCOVE + } pmic_id; /* The atomisp uses type==0 for the end-of-list marker, so leave space. */ static struct intel_v4l2_subdev_table pdata_subdevs[MAX_SUBDEVS + 1]; @@ -158,7 +159,7 @@ int atomisp_register_i2c_module(struct v4l2_subdev *subdev, EXPORT_SYMBOL_GPL(atomisp_register_i2c_module); struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter, - struct i2c_board_info *board_info) + struct i2c_board_info *board_info) { int i; @@ -337,14 +338,14 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) return NULL; dev_info(dev, - "gmin: initializing atomisp module subdev data.PMIC ID %d\n", - pmic_id); + "gmin: initializing atomisp module subdev data.PMIC ID %d\n", + pmic_id); gmin_subdevs[i].subdev = subdev; gmin_subdevs[i].clock_num = gmin_get_var_int(dev, "CamClk", 0); /*WA:CHT requires XTAL clock as PLL is not stable.*/ gmin_subdevs[i].clock_src = gmin_get_var_int(dev, "ClkSrc", - VLV2_CLK_PLL_19P2MHZ); + VLV2_CLK_PLL_19P2MHZ); gmin_subdevs[i].csi_port = gmin_get_var_int(dev, "CsiPort", 0); gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, "CsiLanes", 1); @@ -569,7 +570,7 @@ static int gmin_csi_cfg(struct v4l2_subdev *sd, int flag) } static struct camera_vcm_control *gmin_get_vcm_ctrl(struct v4l2_subdev *subdev, - char *camera_module) + char *camera_module) { struct i2c_client *client = v4l2_get_subdevdata(subdev); struct gmin_subdev *gs = find_gmin_subdev(subdev); @@ -605,9 +606,9 @@ static struct camera_sensor_platform_data gmin_plat = { }; struct camera_sensor_platform_data *gmin_camera_platform_data( - struct v4l2_subdev *subdev, - enum atomisp_input_format csi_format, - enum atomisp_bayer_order csi_bayer) + struct v4l2_subdev *subdev, + enum atomisp_input_format csi_format, + enum atomisp_bayer_order csi_bayer) { struct gmin_subdev *gs = find_gmin_subdev(subdev); -- GitLab From 02330fb0107a6fd5c00f4ea9022567540bc05b84 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 18:27:51 +0200 Subject: [PATCH 392/503] media: atomisp: remove some dead code There are several parts of atomisp that are meant to be built on different environments, tested using ifdefs. Remove some of them, as this code should build only on Linux. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-lm3554.c | 6 ---- .../media/atomisp/i2c/atomisp-mt9m114.c | 10 ------- .../media/atomisp/include/linux/atomisp.h | 4 --- .../css_2401_csi2p_system/host/system_local.h | 4 --- .../hrt/isp2401_mamoiada_params.h | 4 --- .../css2400/css_2401_csi2p_system/hrt/var.h | 23 -------------- .../hrt/isp2401_mamoiada_params.h | 4 --- .../css2400/css_2401_system/hrt/var.h | 23 -------------- .../hive_isp_css_common/host/system_local.h | 4 --- .../hive_isp_css_include/assert_support.h | 28 ----------------- .../hive_isp_css_include/error_support.h | 30 ------------------- .../hive_isp_css_include/math_support.h | 3 -- .../hive_isp_css_include/platform_support.h | 5 ---- .../hive_isp_css_include/string_support.h | 2 -- .../kernels/xnr/xnr_3.0/ia_css_xnr3_param.h | 8 ----- .../pci/atomisp2/css2400/sh_css_defs.h | 4 --- .../pci/atomisp2/css2400/sh_css_internal.h | 4 --- 17 files changed, 166 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c index 4d94f49fccbcc..05f9b354a70e9 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c @@ -403,7 +403,6 @@ static int lm3554_g_flash_status(struct v4l2_subdev *sd, s32 *val) return 0; } -#ifndef CSS15 static int lm3554_g_flash_status_register(struct v4l2_subdev *sd, s32 *val) { struct lm3554 *flash = to_lm3554(sd); @@ -417,7 +416,6 @@ static int lm3554_g_flash_status_register(struct v4l2_subdev *sd, s32 *val) *val = ret; return 0; } -#endif static int lm3554_s_ctrl(struct v4l2_ctrl *ctrl) { @@ -475,11 +473,9 @@ static int lm3554_g_volatile_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_FLASH_STATUS: ret = lm3554_g_flash_status(&dev->sd, &ctrl->val); break; -#ifndef CSS15 case V4L2_CID_FLASH_STATUS_REGISTER: ret = lm3554_g_flash_status_register(&dev->sd, &ctrl->val); break; -#endif default: ret = -EINVAL; } @@ -570,7 +566,6 @@ static const struct v4l2_ctrl_config lm3554_controls[] = { .def = ATOMISP_FLASH_STATUS_OK, .flags = 0, }, -#ifndef CSS15 { .ops = &ctrl_ops, .id = V4L2_CID_FLASH_STATUS_REGISTER, @@ -582,7 +577,6 @@ static const struct v4l2_ctrl_config lm3554_controls[] = { .def = 0, .flags = 0, }, -#endif }; /* ----------------------------------------------------------------------------- diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c index 7f8a2b9a4c694..9c426c95dc3ff 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -1112,7 +1112,6 @@ static int mt9m114_g_exposure(struct v4l2_subdev *sd, s32 *value) return 0; } -#ifndef CSS15 /* * This function will return the sensor supported max exposure zone number. * the sensor which supports max exposure zone number is 1. @@ -1222,7 +1221,6 @@ static int mt9m114_s_exposure_selection(struct v4l2_subdev *sd, return 0; } -#endif static int mt9m114_g_bin_factor_x(struct v4l2_subdev *sd, s32 *val) { @@ -1331,11 +1329,9 @@ static int mt9m114_s_ctrl(struct v4l2_ctrl *ctrl) __func__, ctrl->val); ret = mt9m114_t_hflip(&dev->sd, ctrl->val); break; -#ifndef CSS15 case V4L2_CID_EXPOSURE_METERING: ret = mt9m114_s_exposure_metering(&dev->sd, ctrl->val); break; -#endif case V4L2_CID_EXPOSURE: ret = mt9m114_s_ev(&dev->sd, ctrl->val); break; @@ -1373,11 +1369,9 @@ static int mt9m114_g_volatile_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_EXPOSURE_ABSOLUTE: ret = mt9m114_g_exposure(&dev->sd, &ctrl->val); break; -#ifndef CSS15 case V4L2_CID_EXPOSURE_ZONE_NUM: ret = mt9m114_g_exposure_zone_num(&dev->sd, &ctrl->val); break; -#endif case V4L2_CID_BIN_FACTOR_HORZ: ret = mt9m114_g_bin_factor_x(&dev->sd, &ctrl->val); break; @@ -1467,7 +1461,6 @@ static struct v4l2_ctrl_config mt9m114_controls[] = { .def = 0, .flags = 0, }, -#ifndef CSS15 { .ops = &ctrl_ops, .id = V4L2_CID_EXPOSURE_ZONE_NUM, @@ -1490,7 +1483,6 @@ static struct v4l2_ctrl_config mt9m114_controls[] = { .def = 1, .flags = 0, }, -#endif { .ops = &ctrl_ops, .id = V4L2_CID_BIN_FACTOR_HORZ, @@ -1794,9 +1786,7 @@ static const struct v4l2_subdev_pad_ops mt9m114_pad_ops = { .enum_frame_size = mt9m114_enum_frame_size, .get_fmt = mt9m114_get_fmt, .set_fmt = mt9m114_set_fmt, -#ifndef CSS15 .set_selection = mt9m114_s_exposure_selection, -#endif }; static const struct v4l2_subdev_ops mt9m114_ops = { diff --git a/drivers/staging/media/atomisp/include/linux/atomisp.h b/drivers/staging/media/atomisp/include/linux/atomisp.h index df0ee5ddedd98..47153e3b77551 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp.h @@ -14,9 +14,6 @@ * * */ -#ifdef CSS15 -#include -#else #ifndef _ATOM_ISP_H #define _ATOM_ISP_H @@ -1357,4 +1354,3 @@ enum { }; #endif /* _ATOM_ISP_H */ -#endif /* CSS15*/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h index 068b6efb33207..f88580a7aab47 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h @@ -25,11 +25,7 @@ #include "system_global.h" -#ifdef __FIST__ -#define HRT_ADDRESS_WIDTH 32 /* Surprise, this is a local property and even differs per platform */ -#else #define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ -#endif /* This interface is deprecated */ #include "hrt/hive_types.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h index 29e097b5d9e4f..e548e45a161d6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h @@ -177,11 +177,7 @@ #define _isp_ceil_div(a, b) (((a) + (b) - 1) / (b)) -#ifdef C_RUN -#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64) * 8) -#else #define ISP_VEC_ALIGN ISP_VMEM_ALIGN -#endif /* HRT specific vector support */ #define isp2401_mamoiada_vector_alignment ISP_VEC_ALIGN diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h index d3df4e1649c97..6d6fb35c62209 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h @@ -44,28 +44,6 @@ #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) -#ifdef C_RUN - -#ifdef C_RUN_DYNAMIC_LINK_PROGRAMS -void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); -#define _hrt_cell_get_crun_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) -#define _hrt_cell_get_crun_indexed_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) -#else -#define _hrt_cell_get_crun_symbol(cell, sym) (&sym) -#define _hrt_cell_get_crun_indexed_symbol(cell, sym) (sym) -#endif // C_RUN_DYNAMIC_LINK_PROGRAMS - -#define hrt_scalar_store(cell, type, var, data) \ - ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var)) = (data)) -#define hrt_scalar_load(cell, type, var) \ - ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var))) - -#define hrt_indexed_store(cell, type, array, index, data) \ - ((((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) = (data)) -#define hrt_indexed_load(cell, type, array, index) \ - (((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) - -#else /* C_RUN */ #define hrt_scalar_store(cell, type, var, data) \ HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ @@ -93,7 +71,6 @@ void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); HRTCAT(HIVE_MEM_, array), \ (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) -#endif /* C_RUN */ #endif /* _HRT_VAR_H */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h index 29e097b5d9e4f..e548e45a161d6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h @@ -177,11 +177,7 @@ #define _isp_ceil_div(a, b) (((a) + (b) - 1) / (b)) -#ifdef C_RUN -#define ISP_VEC_ALIGN (_isp_ceil_div(ISP_VEC_WIDTH, 64) * 8) -#else #define ISP_VEC_ALIGN ISP_VMEM_ALIGN -#endif /* HRT specific vector support */ #define isp2401_mamoiada_vector_alignment ISP_VEC_ALIGN diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h index d3df4e1649c97..6d6fb35c62209 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h @@ -44,28 +44,6 @@ #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) -#ifdef C_RUN - -#ifdef C_RUN_DYNAMIC_LINK_PROGRAMS -void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); -#define _hrt_cell_get_crun_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) -#define _hrt_cell_get_crun_indexed_symbol(cell, sym) csim_processor_get_crun_symbol(cell, HRTSTR(sym)) -#else -#define _hrt_cell_get_crun_symbol(cell, sym) (&sym) -#define _hrt_cell_get_crun_indexed_symbol(cell, sym) (sym) -#endif // C_RUN_DYNAMIC_LINK_PROGRAMS - -#define hrt_scalar_store(cell, type, var, data) \ - ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var)) = (data)) -#define hrt_scalar_load(cell, type, var) \ - ((*(HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_symbol(cell, var))) - -#define hrt_indexed_store(cell, type, array, index, data) \ - ((((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) = (data)) -#define hrt_indexed_load(cell, type, array, index) \ - (((HRT_HOST_TYPE(type) *)_hrt_cell_get_crun_indexed_symbol(cell, array))[index]) - -#else /* C_RUN */ #define hrt_scalar_store(cell, type, var, data) \ HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ @@ -93,7 +71,6 @@ void *csim_processor_get_crun_symbol(hive_proc_id p, const char *sym); HRTCAT(HIVE_MEM_, array), \ (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) -#endif /* C_RUN */ #endif /* _HRT_VAR_H */ #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h index 914263d6bba57..2a6937d0b69ca 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h @@ -25,13 +25,9 @@ #include "system_global.h" -#ifdef __FIST__ -#define HRT_ADDRESS_WIDTH 32 /* Surprise, this is a local property and even differs per platform */ -#else /* HRT assumes 32 by default (see Linux/include/hrt/hive_types.h), overrule it in case it is different */ #undef HRT_ADDRESS_WIDTH #define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ -#endif /* This interface is deprecated */ #include "hrt/hive_types.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h index ac00880e31181..4cb7e4c952c58 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h @@ -43,23 +43,6 @@ #define CT_ASSERT(cnd) ((void)sizeof(char[(cnd) ? 1 : -1])) #endif /* CT_ASSERT */ -#ifdef NDEBUG - -#define assert(cnd) ((void)0) - -#else - -#if defined(_MSC_VER) -#ifdef _KERNEL_MODE -/* Windows kernel mode compilation */ -#include -#define assert(cnd) ASSERT(cnd) -#else -/* Windows usermode compilation */ -#include -#endif - -#elif defined(__KERNEL__) #include /* TODO: it would be cleaner to use this: @@ -73,17 +56,6 @@ BUG(); \ } while (0) -#elif defined(__FIST__) || defined(__GNUC__) - -/* enable assert for crun */ -#include "assert.h" - -#else /* default for unknown environments */ -#define assert(cnd) ((void)0) -#endif - -#endif /* NDEBUG */ - #ifndef PIPE_GENERATION /* Deprecated OP___assert, this is still used in ~1000 places * in the code. This will be removed over time. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h index bca0195016dfe..4f0d259bf7edf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h @@ -15,20 +15,6 @@ #ifndef __ERROR_SUPPORT_H_INCLUDED__ #define __ERROR_SUPPORT_H_INCLUDED__ -#if defined(_MSC_VER) -#include -/* - * Put here everything _MSC_VER specific not covered in - * "errno.h" - */ -#define EINVAL 22 -#define EBADE 52 -#define ENODATA 61 -#define ENOTCONN 107 -#define ENOTSUP 252 -#define ENOBUFS 233 - -#elif defined(__KERNEL__) #include /* * Put here everything __KERNEL__ specific not covered in @@ -36,22 +22,6 @@ */ #define ENOTSUP 252 -#elif defined(__GNUC__) -#include -/* - * Put here everything __GNUC__ specific not covered in - * "errno.h" - */ - -#else /* default is for the FIST environment */ -#include -/* - * Put here everything FIST specific not covered in - * "errno.h" - */ - -#endif - #define verifexit(cond, error_tag) \ do { \ if (!(cond)) { \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h index b633cfaac1da3..fc32c89eba14b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h @@ -17,9 +17,6 @@ #include /* Override the definition of max/min from linux kernel*/ -#if defined(_MSC_VER) -#include /* Override the definition of max/min from stdlib.h*/ -#endif /* _MSC_VER */ /* in case we have min/max/MIN/MAX macro's undefine them */ #ifdef min diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h index 39a125ba563de..525c34882fd74 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h @@ -33,9 +33,4 @@ #define CSS_ALIGN(d, a) d __attribute__((aligned(a))) -/* - * Put here everything __KERNEL__ specific not covered in - * "assert_support.h", "math_support.h", etc - */ - #endif /* __PLATFORM_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h index 8fa8d3e6f960a..84efbbe78650d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h @@ -17,7 +17,6 @@ #include #include -#if !defined(_MSC_VER) /* * For all non microsoft cases, we need the following functions */ @@ -162,6 +161,5 @@ static inline int strcpy_s( return 0; } -#endif /*!defined(_MSC_VER)*/ #endif /* __STRING_SUPPORT_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h index e917537004429..d6fda1326f09d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h @@ -36,15 +36,7 @@ #define XNR_BLENDING_SCALE_FACTOR BIT(XNR_BLENDING_SCALE_LOG2) /* XNR3 filter size. Must be 11x11, 9x9 or 5x5. */ -#ifdef FLT_KERNEL_9x9 -#define XNR_FILTER_SIZE 9 -#else -#ifdef FLT_KERNEL_11x11 -#define XNR_FILTER_SIZE 11 -#else #define XNR_FILTER_SIZE 5 -#endif -#endif /* XNR3 alpha (1/sigma) parameters on the ISP, expressed as a base (0) value * for dark areas, and a scaled diff towards the value for bright areas. */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h index f93272bf0e2a4..c601745be2a6a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h @@ -239,11 +239,7 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define NUM_TNR_FRAMES_PER_REF_BUF_SET (2) /* In luma-only mode alternate illuminated frames are supported, that requires two double buffers */ -#ifdef ENABLE_LUMA_ONLY -#define NUM_TNR_REF_BUF_SETS (2) -#else #define NUM_TNR_REF_BUF_SETS (1) -#endif #define NUM_TNR_FRAMES (NUM_TNR_FRAMES_PER_REF_BUF_SET * NUM_TNR_REF_BUF_SETS) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h index 244111aad6961..84e8f1e5421c3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h @@ -118,11 +118,7 @@ #define SH_CSS_SP_INTERNAL_SERVICE_THREAD 1 -#ifdef __DISABLE_UNUSED_THREAD__ -#define SH_CSS_MAX_SP_THREADS 0 -#else #define SH_CSS_MAX_SP_THREADS 5 -#endif #define SH_CSS_MAX_SP_INTERNAL_THREADS (\ SH_CSS_SP_INTERNAL_SERVICE_THREAD +\ -- GitLab From 9a0d7fb5ece6d61b4b943db3216a3ecbb31f0917 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 19 Apr 2020 19:12:04 +0200 Subject: [PATCH 393/503] media: atomisp: simplify math_support.h There are some uneeded defines there. Simplify it, and make it independent of defines. Signed-off-by: Mauro Carvalho Chehab --- .../hive_isp_css_include/math_support.h | 58 +------------------ .../kernels/xnr/xnr_3.0/ia_css_xnr3.host.c | 2 +- 2 files changed, 2 insertions(+), 58 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h index fc32c89eba14b..bc61ffebf1b79 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h @@ -17,24 +17,6 @@ #include /* Override the definition of max/min from linux kernel*/ - -/* in case we have min/max/MIN/MAX macro's undefine them */ -#ifdef min -#undef min -#endif -#ifdef max -#undef max -#endif -#ifdef MIN /* also defined in include/hrt/numeric.h from SDK */ -#undef MIN -#endif -#ifdef MAX -#undef MAX -#endif -#ifdef ABS -#undef ABS -#endif - #define IS_ODD(a) ((a) & 0x1) #define IS_EVEN(a) (!IS_ODD(a)) @@ -49,24 +31,19 @@ /* A => B */ #define IMPLIES(a, b) (!(a) || (b)) -#define ABS(a) ((a) >= 0 ? (a) : -(a)) - /* for preprocessor and array sizing use MIN and MAX otherwise use min and max */ #define MAX(a, b) (((a) > (b)) ? (a) : (b)) #define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#ifdef ISP2401 + #define ROUND_DIV(a, b) (((b) != 0) ? ((a) + ((b) >> 1)) / (b) : 0) -#endif #define CEIL_DIV(a, b) (((b) != 0) ? ((a) + (b) - 1) / (b) : 0) #define CEIL_MUL(a, b) (CEIL_DIV(a, b) * (b)) #define CEIL_MUL2(a, b) (((a) + (b) - 1) & ~((b) - 1)) #define CEIL_SHIFT(a, b) (((a) + (1 << (b)) - 1) >> (b)) #define CEIL_SHIFT_MUL(a, b) (CEIL_SHIFT(a, b) << (b)) -#ifdef ISP2401 #define ROUND_HALF_DOWN_DIV(a, b) (((b) != 0) ? ((a) + (b / 2) - 1) / (b) : 0) #define ROUND_HALF_DOWN_MUL(a, b) (ROUND_HALF_DOWN_DIV(a, b) * (b)) -#endif /*To Find next power of 2 number from x */ #define bit2(x) ((x) | ((x) >> 1)) @@ -84,7 +61,6 @@ #if !defined(PIPE_GENERATION) -#ifndef INLINE_MATH_SUPPORT_UTILS /* This macro versions are added back as we are mixing types in usage of inline. This causes corner cases of calculations to be incorrect due to conversions @@ -95,38 +71,8 @@ and therefore adding them back. Leaving out the other math utility functions as they are newly added */ -#define max(a, b) (MAX(a, b)) -#define min(a, b) (MIN(a, b)) #define ceil_div(a, b) (CEIL_DIV(a, b)) -#else /* !defined(INLINE_MATH_SUPPORT_UTILS) */ - -static inline int max(int a, int b) -{ - return MAX(a, b); -} - -static inline int min(int a, int b) -{ - return MIN(a, b); -} - -static inline unsigned int ceil_div(unsigned int a, unsigned int b) -{ - return CEIL_DIV(a, b); -} -#endif /* !defined(INLINE_MATH_SUPPORT_UTILS) */ - -static inline unsigned int umax(unsigned int a, unsigned int b) -{ - return MAX(a, b); -} - -static inline unsigned int umin(unsigned int a, unsigned int b) -{ - return MIN(a, b); -} - static inline unsigned int ceil_mul(unsigned int a, unsigned int b) { return CEIL_MUL(a, b); @@ -199,12 +145,10 @@ static inline unsigned int ceil_pow2(unsigned int a) #endif /* !defined(PIPE_GENERATION) */ -#if !defined(__ISP) /* * For SP and ISP, SDK provides the definition of OP_std_modadd. * We need it only for host */ #define OP_std_modadd(base, offset, size) ((base + offset) % (size)) -#endif /* !defined(__ISP) */ #endif /* __MATH_SUPPORT_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c index 886abff24a219..e6c4e0fe34f0b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c @@ -145,7 +145,7 @@ compute_blending(int strength) * exactly as s0.11 fixed point, but -1.0 can. */ isp_strength = -(((strength * isp_scale) + offset) / host_scale); - return max(min(isp_strength, 0), -XNR_BLENDING_SCALE_FACTOR); + return MAX(MIN(isp_strength, 0), -XNR_BLENDING_SCALE_FACTOR); } void -- GitLab From e1ac35b39ac13814146559f80fe003977383d933 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 20 Apr 2020 09:19:56 +0200 Subject: [PATCH 394/503] media: atomisp: add a way for the driver to know the chipset version The atomisp supports two different chipsets: ISP2400 and ISP2401. Right now, this is controlled by ugly #defines inside the driver. Add a global bolean to identify the type of hardware. While this is hacky, it would be a quick way to start removing the ugly ifdefs. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/include/linux/atomisp.h | 3 ++ .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 36 +++++++++++++++---- 2 files changed, 33 insertions(+), 6 deletions(-) diff --git a/drivers/staging/media/atomisp/include/linux/atomisp.h b/drivers/staging/media/atomisp/include/linux/atomisp.h index 47153e3b77551..e9670749bae08 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp.h @@ -69,6 +69,9 @@ #define V4L2_MBUS_FMT_CUSTOM_M10MO_RAW 0x800b #endif +/* FIXME: for now, let's use a boolean to identify the type of atomisp chipset */ +extern bool atomisp_hw_is_isp2401; + /* Configuration used by Bayer noise reduction and YCC noise reduction */ struct atomisp_nr_config { /* [gain] Strength of noise reduction for Bayer NR (Used by Bayer NR) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index 5a624a5ae56b4..8e3d2df74eaa5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -105,6 +105,21 @@ int pad_h = 16; module_param(pad_h, int, 0644); MODULE_PARM_DESC(pad_h, "extra data for ISP processing"); +/* + * FIXME: this is a hack to make easier to support ISP2401 variant. + * As a given system will either be ISP2401 or not, we can just use + * a boolean, in order to replace existing #ifdef ISP2401 everywhere. + * + * Once this driver gets into a better shape, however, the best would + * be to replace this to something stored inside atomisp allocated + * structures. + */ +bool atomisp_hw_is_isp2401; + +/* Types of atomisp hardware */ +#define HW_IS_ISP2400 0 +#define HW_IS_ISP2401 1 + struct device *atomisp_dev; void __iomem *atomisp_io_base; @@ -1169,6 +1184,11 @@ static int atomisp_pci_probe(struct pci_dev *dev, /* Pointer to struct device. */ atomisp_dev = &dev->dev; + if (id->driver_data == HW_IS_ISP2401) + atomisp_hw_is_isp2401 = true; + else + atomisp_hw_is_isp2401 = false; + pdata = atomisp_get_platform_data(); if (!pdata) dev_warn(&dev->dev, "no platform data available\n"); @@ -1514,18 +1534,22 @@ static void atomisp_pci_remove(struct pci_dev *dev) } static const struct pci_device_id atomisp_pci_tbl[] = { +/* + * FIXME: + * remove the ifs once we get rid of the ifs on other parts of the driver + */ #if defined(ISP2400) || defined(ISP2400B0) /* Merrifield */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178)}, - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179)}, - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x117a)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178), .driver_data = HW_IS_ISP2400}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179), .driver_data = HW_IS_ISP2400}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x117a), .driver_data = HW_IS_ISP2400}, /* Baytrail */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0f38)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0f38), .driver_data = HW_IS_ISP2400}, #elif defined(ISP2401) /* Anniedale (Merrifield+ / Moorefield) */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1478)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1478), .driver_data = HW_IS_ISP2401}, /* Cherrytrail */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x22b8)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x22b8), .driver_data = HW_IS_ISP2401}, #endif {0,} }; -- GitLab From ea419fdae5eb2edce2cdb790e1faa1b91d224f22 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 20 Apr 2020 10:33:36 +0200 Subject: [PATCH 395/503] media: atomisp: atomisp_cmd.c test ISP version in runtime The logic there has lots of ifdef dependencies if the hardware is either ISP2400 or ISP2041. Replace them by runtime checks. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/atomisp_cmd.c | 1209 ++++++++--------- .../media/atomisp/pci/atomisp2/atomisp_cmd.h | 11 +- .../atomisp/pci/atomisp2/atomisp_internal.h | 28 +- .../atomisp/pci/atomisp2/atomisp_subdev.h | 30 +- 4 files changed, 593 insertions(+), 685 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index 77279e73595ef..9bc899536cf73 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -627,21 +627,20 @@ void atomisp_clear_css_buffer_counters(struct atomisp_sub_device *asd) asd->video_out_video_capture.buffers_in_css = 0; } -#ifndef ISP2401 +/* ISP2400 */ bool atomisp_buffers_queued(struct atomisp_sub_device *asd) -#else -bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe) -#endif { -#ifndef ISP2401 return asd->video_out_capture.buffers_in_css || asd->video_out_vf.buffers_in_css || asd->video_out_preview.buffers_in_css || asd->video_out_video_capture.buffers_in_css ? true : false; -#else +} + +/* ISP2401 */ +bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe) +{ return pipe->buffers_in_css ? true : false; -#endif } /* 0x100000 is the start of dmem inside SP */ @@ -886,9 +885,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, enum atomisp_metadata_type md_type; struct atomisp_device *isp = asd->isp; struct v4l2_control ctrl; -#ifdef ISP2401 bool reset_wdt_timer = false; -#endif if ( buf_type != CSS_BUFFER_TYPE_METADATA && @@ -980,9 +977,9 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, break; case CSS_BUFFER_TYPE_VF_OUTPUT_FRAME: case CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME: -#ifdef ISP2401 - reset_wdt_timer = true; -#endif + if (atomisp_hw_is_isp2401) + reset_wdt_timer = true; + pipe->buffers_in_css--; frame = buffer.css_buffer.data.frame; if (!frame) { @@ -1026,26 +1023,23 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, asd->params.offline_parm.num_captures, asd->params.offline_parm.skip_frames, asd->params.offline_parm.offset); -#ifndef ISP2401 - asd->pending_capture_request--; - dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", - err); -#else + asd->pending_capture_request--; - asd->re_trigger_capture = false; + + if (atomisp_hw_is_isp2401) + asd->re_trigger_capture = false; + dev_dbg(isp->dev, "Trigger capture again for new buffer. err=%d\n", err); - } else { + } else if (atomisp_hw_is_isp2401) { asd->re_trigger_capture = true; } -#endif - } break; case CSS_BUFFER_TYPE_OUTPUT_FRAME: case CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME: -#ifdef ISP2401 - reset_wdt_timer = true; -#endif + if (atomisp_hw_is_isp2401) + reset_wdt_timer = true; + pipe->buffers_in_css--; frame = buffer.css_buffer.data.frame; if (!frame) { @@ -1214,9 +1208,9 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, */ wake_up(&vb->done); } -#ifdef ISP2401 - atomic_set(&pipe->wdt_count, 0); -#endif + if (atomisp_hw_is_isp2401) + atomic_set(&pipe->wdt_count, 0); + /* * Requeue should only be done for 3a and dis buffers. * Queue/dequeue order will change if driver recycles image buffers. @@ -1233,19 +1227,19 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error, } if (!error && q_buffers) atomisp_qbuffers_to_css(asd); -#ifdef ISP2401 - /* If there are no buffers queued then - * delete wdt timer. */ - if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) - return; - if (!atomisp_buffers_queued_pipe(pipe)) - atomisp_wdt_stop_pipe(pipe, false); - else if (reset_wdt_timer) - /* SOF irq should not reset wdt timer. */ - atomisp_wdt_refresh_pipe(pipe, - ATOMISP_WDT_KEEP_CURRENT_DELAY); -#endif + if (atomisp_hw_is_isp2401) { + /* If there are no buffers queued then + * delete wdt timer. */ + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + return; + if (!atomisp_buffers_queued_pipe(pipe)) + atomisp_wdt_stop_pipe(pipe, false); + else if (reset_wdt_timer) + /* SOF irq should not reset wdt timer. */ + atomisp_wdt_refresh_pipe(pipe, + ATOMISP_WDT_KEEP_CURRENT_DELAY); + } } void atomisp_delayed_init_work(struct work_struct *work) @@ -1454,10 +1448,8 @@ void atomisp_wdt_work(struct work_struct *work) struct atomisp_device *isp = container_of(work, struct atomisp_device, wdt_work); int i; -#ifdef ISP2401 unsigned int pipe_wdt_cnt[MAX_STREAM_NUM][4] = { {0} }; - bool css_recover = true; -#endif + bool css_recover = false; rt_mutex_lock(&isp->mutex); if (!atomisp_streaming_count(isp)) { @@ -1466,42 +1458,42 @@ void atomisp_wdt_work(struct work_struct *work) return; } -#ifndef ISP2401 - dev_err(isp->dev, "timeout %d of %d\n", - atomic_read(&isp->wdt_count) + 1, - ATOMISP_ISP_MAX_TIMEOUT_COUNT); -#else - for (i = 0; i < isp->num_of_streams; i++) { - struct atomisp_sub_device *asd = &isp->asd[i]; + if (!atomisp_hw_is_isp2401) { + dev_err(isp->dev, "timeout %d of %d\n", + atomic_read(&isp->wdt_count) + 1, + ATOMISP_ISP_MAX_TIMEOUT_COUNT); - pipe_wdt_cnt[i][0] += - atomic_read(&asd->video_out_capture.wdt_count); - pipe_wdt_cnt[i][1] += - atomic_read(&asd->video_out_vf.wdt_count); - pipe_wdt_cnt[i][2] += - atomic_read(&asd->video_out_preview.wdt_count); - pipe_wdt_cnt[i][3] += - atomic_read(&asd->video_out_video_capture.wdt_count); - css_recover = - (pipe_wdt_cnt[i][0] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && - pipe_wdt_cnt[i][1] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && - pipe_wdt_cnt[i][2] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && - pipe_wdt_cnt[i][3] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT) - ? true : false; - dev_err(isp->dev, - "pipe on asd%d timeout cnt: (%d, %d, %d, %d) of %d, recover = %d\n", - asd->index, pipe_wdt_cnt[i][0], pipe_wdt_cnt[i][1], - pipe_wdt_cnt[i][2], pipe_wdt_cnt[i][3], - ATOMISP_ISP_MAX_TIMEOUT_COUNT, css_recover); + if (atomic_inc_return(&isp->wdt_count) < ATOMISP_ISP_MAX_TIMEOUT_COUNT) + css_recover = true; + } else { + css_recover = true; + + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + + pipe_wdt_cnt[i][0] += + atomic_read(&asd->video_out_capture.wdt_count); + pipe_wdt_cnt[i][1] += + atomic_read(&asd->video_out_vf.wdt_count); + pipe_wdt_cnt[i][2] += + atomic_read(&asd->video_out_preview.wdt_count); + pipe_wdt_cnt[i][3] += + atomic_read(&asd->video_out_video_capture.wdt_count); + css_recover = + (pipe_wdt_cnt[i][0] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][1] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][2] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT && + pipe_wdt_cnt[i][3] <= ATOMISP_ISP_MAX_TIMEOUT_COUNT) + ? true : false; + dev_err(isp->dev, + "pipe on asd%d timeout cnt: (%d, %d, %d, %d) of %d, recover = %d\n", + asd->index, pipe_wdt_cnt[i][0], pipe_wdt_cnt[i][1], + pipe_wdt_cnt[i][2], pipe_wdt_cnt[i][3], + ATOMISP_ISP_MAX_TIMEOUT_COUNT, css_recover); + } } -#endif -#ifndef ISP2401 - if (atomic_inc_return(&isp->wdt_count) < - ATOMISP_ISP_MAX_TIMEOUT_COUNT) { -#else if (css_recover) { -#endif unsigned int old_dbglevel = dbg_level; atomisp_css_debug_dump_sp_sw_debug_info(); @@ -1592,35 +1584,36 @@ void atomisp_wdt_work(struct work_struct *work) atomisp_flush_bufs_and_wakeup(asd); complete(&asd->init_done); } -#ifdef ISP2401 - atomisp_wdt_stop(asd, false); -#endif + if (atomisp_hw_is_isp2401) + atomisp_wdt_stop(asd, false); } -#ifndef ISP2401 - atomic_set(&isp->wdt_count, 0); -#endif - isp->isp_fatal_error = true; - atomic_set(&isp->wdt_work_queued, 0); + if (!atomisp_hw_is_isp2401) { + atomic_set(&isp->wdt_count, 0); + } else { + isp->isp_fatal_error = true; + atomic_set(&isp->wdt_work_queued, 0); - rt_mutex_unlock(&isp->mutex); - return; + rt_mutex_unlock(&isp->mutex); + return; + } } __atomisp_css_recover(isp, true); -#ifdef ISP2401 - for (i = 0; i < isp->num_of_streams; i++) { - struct atomisp_sub_device *asd = &isp->asd[i]; + if (atomisp_hw_is_isp2401) { + for (i = 0; i < isp->num_of_streams; i++) { + struct atomisp_sub_device *asd = &isp->asd[i]; + + if (asd->streaming != ATOMISP_DEVICE_STREAMING_ENABLED) + continue; - if (asd->streaming == - ATOMISP_DEVICE_STREAMING_ENABLED) { atomisp_wdt_refresh(asd, isp->sw_contex.file_input ? ATOMISP_ISP_FILE_TIMEOUT_DURATION : ATOMISP_ISP_TIMEOUT_DURATION); } } -#endif + dev_err(isp->dev, "timeout recovery handling done\n"); atomic_set(&isp->wdt_work_queued, 0); @@ -1661,21 +1654,25 @@ void atomisp_css_flush(struct atomisp_device *isp) void atomisp_wdt(struct timer_list *t) { -#ifndef ISP2401 - struct atomisp_sub_device *asd = from_timer(asd, t, wdt); -#else - struct atomisp_video_pipe *pipe = from_timer(pipe, t, wdt); - struct atomisp_sub_device *asd = pipe->asd; -#endif - struct atomisp_device *isp = asd->isp; + struct atomisp_sub_device *asd; + struct atomisp_device *isp; + + if (!atomisp_hw_is_isp2401) { + asd = from_timer(asd, t, wdt); + isp = asd->isp; + } else { + struct atomisp_video_pipe *pipe = from_timer(pipe, t, wdt); + + asd = pipe->asd; + isp = asd->isp; + + atomic_inc(&pipe->wdt_count); + dev_warn(isp->dev, + "[WARNING]asd %d pipe %s ISP timeout %d!\n", + asd->index, pipe->vdev.name, + atomic_read(&pipe->wdt_count)); + } -#ifdef ISP2401 - atomic_inc(&pipe->wdt_count); - dev_warn(isp->dev, - "[WARNING]asd %d pipe %s ISP timeout %d!\n", - asd->index, pipe->vdev.name, - atomic_read(&pipe->wdt_count)); -#endif if (atomic_read(&isp->wdt_work_queued)) { dev_dbg(isp->dev, "ISP watchdog was put into workqueue\n"); return; @@ -1684,135 +1681,117 @@ void atomisp_wdt(struct timer_list *t) queue_work(isp->wdt_work_queue, &isp->wdt_work); } -#ifndef ISP2401 -void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) -#else +/* ISP2400 */ +void atomisp_wdt_start(struct atomisp_sub_device *asd) +{ + atomisp_wdt_refresh(asd, ATOMISP_ISP_TIMEOUT_DURATION); +} + +/* ISP2401 */ void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, unsigned int delay) -#endif { unsigned long next; if (delay != ATOMISP_WDT_KEEP_CURRENT_DELAY) -#ifndef ISP2401 - asd->wdt_duration = delay; -#else pipe->wdt_duration = delay; -#endif -#ifndef ISP2401 - next = jiffies + asd->wdt_duration; -#else next = jiffies + pipe->wdt_duration; -#endif /* Override next if it has been pushed beyon the "next" time */ -#ifndef ISP2401 - if (atomisp_is_wdt_running(asd) && time_after(asd->wdt_expires, next)) - next = asd->wdt_expires; -#else if (atomisp_is_wdt_running(pipe) && time_after(pipe->wdt_expires, next)) next = pipe->wdt_expires; -#endif -#ifndef ISP2401 - asd->wdt_expires = next; -#else pipe->wdt_expires = next; -#endif -#ifndef ISP2401 - if (atomisp_is_wdt_running(asd)) - dev_dbg(asd->isp->dev, "WDT will hit after %d ms\n", - ((int)(next - jiffies) * 1000 / HZ)); -#else if (atomisp_is_wdt_running(pipe)) dev_dbg(pipe->asd->isp->dev, "WDT will hit after %d ms (%s)\n", ((int)(next - jiffies) * 1000 / HZ), pipe->vdev.name); -#endif else -#ifndef ISP2401 - dev_dbg(asd->isp->dev, "WDT starts with %d ms period\n", - ((int)(next - jiffies) * 1000 / HZ)); -#else dev_dbg(pipe->asd->isp->dev, "WDT starts with %d ms period (%s)\n", ((int)(next - jiffies) * 1000 / HZ), pipe->vdev.name); -#endif -#ifndef ISP2401 - mod_timer(&asd->wdt, next); - atomic_set(&asd->isp->wdt_count, 0); -#else mod_timer(&pipe->wdt, next); -#endif } -#ifndef ISP2401 -void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync) -#else void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay) { - dev_dbg(asd->isp->dev, "WDT refresh all:\n"); - if (atomisp_is_wdt_running(&asd->video_out_capture)) - atomisp_wdt_refresh_pipe(&asd->video_out_capture, delay); - if (atomisp_is_wdt_running(&asd->video_out_preview)) - atomisp_wdt_refresh_pipe(&asd->video_out_preview, delay); - if (atomisp_is_wdt_running(&asd->video_out_vf)) - atomisp_wdt_refresh_pipe(&asd->video_out_vf, delay); - if (atomisp_is_wdt_running(&asd->video_out_video_capture)) - atomisp_wdt_refresh_pipe(&asd->video_out_video_capture, delay); + if (!atomisp_hw_is_isp2401) { + unsigned long next; + + if (delay != ATOMISP_WDT_KEEP_CURRENT_DELAY) + asd->wdt_duration = delay; + + next = jiffies + asd->wdt_duration; + + /* Override next if it has been pushed beyon the "next" time */ + if (atomisp_is_wdt_running(asd) && time_after(asd->wdt_expires, next)) + next = asd->wdt_expires; + + asd->wdt_expires = next; + + if (atomisp_is_wdt_running(asd)) + dev_dbg(asd->isp->dev, "WDT will hit after %d ms\n", + ((int)(next - jiffies) * 1000 / HZ)); + else + dev_dbg(asd->isp->dev, "WDT starts with %d ms period\n", + ((int)(next - jiffies) * 1000 / HZ)); + + mod_timer(&asd->wdt, next); + atomic_set(&asd->isp->wdt_count, 0); + } else { + dev_dbg(asd->isp->dev, "WDT refresh all:\n"); + if (atomisp_is_wdt_running(&asd->video_out_capture)) + atomisp_wdt_refresh_pipe(&asd->video_out_capture, delay); + if (atomisp_is_wdt_running(&asd->video_out_preview)) + atomisp_wdt_refresh_pipe(&asd->video_out_preview, delay); + if (atomisp_is_wdt_running(&asd->video_out_vf)) + atomisp_wdt_refresh_pipe(&asd->video_out_vf, delay); + if (atomisp_is_wdt_running(&asd->video_out_video_capture)) + atomisp_wdt_refresh_pipe(&asd->video_out_video_capture, delay); + } } +/* ISP2401 */ void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync) -#endif { -#ifndef ISP2401 - dev_dbg(asd->isp->dev, "WDT stop\n"); -#else if (!atomisp_is_wdt_running(pipe)) return; dev_dbg(pipe->asd->isp->dev, "WDT stop asd %d (%s)\n", pipe->asd->index, pipe->vdev.name); -#endif if (sync) { -#ifndef ISP2401 - del_timer_sync(&asd->wdt); - cancel_work_sync(&asd->isp->wdt_work); -#else del_timer_sync(&pipe->wdt); cancel_work_sync(&pipe->asd->isp->wdt_work); -#endif } else { -#ifndef ISP2401 - del_timer(&asd->wdt); -#else del_timer(&pipe->wdt); -#endif } } -#ifndef ISP2401 -void atomisp_wdt_start(struct atomisp_sub_device *asd) -#else -void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync) +/* ISP 2401 */ +void atomisp_wdt_start_pipe(struct atomisp_video_pipe *pipe) { - dev_dbg(asd->isp->dev, "WDT stop all:\n"); - atomisp_wdt_stop_pipe(&asd->video_out_capture, sync); - atomisp_wdt_stop_pipe(&asd->video_out_preview, sync); - atomisp_wdt_stop_pipe(&asd->video_out_vf, sync); - atomisp_wdt_stop_pipe(&asd->video_out_video_capture, sync); + atomisp_wdt_refresh_pipe(pipe, ATOMISP_ISP_TIMEOUT_DURATION); } -void atomisp_wdt_start(struct atomisp_video_pipe *pipe) -#endif +void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync) { -#ifndef ISP2401 - atomisp_wdt_refresh(asd, ATOMISP_ISP_TIMEOUT_DURATION); -#else - atomisp_wdt_refresh_pipe(pipe, ATOMISP_ISP_TIMEOUT_DURATION); -#endif + dev_dbg(asd->isp->dev, "WDT stop:\n"); + + if (!atomisp_hw_is_isp2401) { + if (sync) { + del_timer_sync(&asd->wdt); + cancel_work_sync(&asd->isp->wdt_work); + } else { + del_timer(&asd->wdt); + } + } else { + atomisp_wdt_stop_pipe(&asd->video_out_capture, sync); + atomisp_wdt_stop_pipe(&asd->video_out_preview, sync); + atomisp_wdt_stop_pipe(&asd->video_out_vf, sync); + atomisp_wdt_stop_pipe(&asd->video_out_video_capture, sync); + } } void atomisp_setup_flash(struct atomisp_sub_device *asd) @@ -2085,20 +2064,13 @@ static void atomisp_update_capture_mode(struct atomisp_sub_device *asd) atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_PRIMARY); } -#ifdef ISP2401 +/* ISP2401 */ int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, struct atomisp_s_runmode *runmode) { struct atomisp_device *isp = asd->isp; struct v4l2_ctrl *c; - struct v4l2_streamparm p = {0}; int ret = 0; - int modes[] = { CI_MODE_NONE, - CI_MODE_VIDEO, - CI_MODE_STILL_CAPTURE, - CI_MODE_CONTINUOUS, - CI_MODE_PREVIEW - }; if (!(runmode && (runmode->mode & RUNMODE_MASK))) return -EINVAL; @@ -2114,7 +2086,6 @@ int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, return ret; } -#endif /* * Function to enable/disable lens geometry distortion correction (GDC) and * chromatic aberration correction (CAC) @@ -2986,9 +2957,7 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, struct atomisp_stream_env *stream_env = &asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL]; struct atomisp_resolution eff_res, out_res; -#ifdef ISP2401 int w_offset, h_offset; -#endif memset(&eff_res, 0, sizeof(eff_res)); memset(&out_res, 0, sizeof(out_res)); @@ -3030,95 +2999,76 @@ int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd, * to firmware limitation. * map real crop region base on above calculating base max crop region. */ -#ifdef ISP2401 - out_res.width = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; - out_res.height = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; - if (out_res.width == 0 || out_res.height == 0) { - dev_err(asd->isp->dev, "%s err current pipe output resolution" - , __func__); - return -EINVAL; - } - if (asd->sensor_array_res.width * out_res.height - < out_res.width * asd->sensor_array_res.height) { - h_offset = asd->sensor_array_res.height - - asd->sensor_array_res.width - * out_res.height / out_res.width; - h_offset = h_offset / 2; - if (dz_config->zoom_region.origin.y < h_offset) - dz_config->zoom_region.origin.y = 0; - else - dz_config->zoom_region.origin.y = - dz_config->zoom_region.origin.y - h_offset; - w_offset = 0; + if (!atomisp_hw_is_isp2401) { + dz_config->zoom_region.origin.x = dz_config->zoom_region.origin.x + * eff_res.width + / asd->sensor_array_res.width; + dz_config->zoom_region.origin.y = dz_config->zoom_region.origin.y + * eff_res.height + / asd->sensor_array_res.height; + dz_config->zoom_region.resolution.width = dz_config->zoom_region.resolution.width + * eff_res.width + / asd->sensor_array_res.width; + dz_config->zoom_region.resolution.height = dz_config->zoom_region.resolution.height + * eff_res.height + / asd->sensor_array_res.height; + /* + * Set same ratio of crop region resolution and current pipe output + * resolution + */ + out_res.width = stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; + out_res.height = stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; + if (out_res.width == 0 || out_res.height == 0) { + dev_err(asd->isp->dev, "%s err current pipe output resolution" + , __func__); + return -EINVAL; + } } else { - w_offset = asd->sensor_array_res.width - - asd->sensor_array_res.height - * out_res.width / out_res.height; - w_offset = w_offset / 2; - if (dz_config->zoom_region.origin.x < w_offset) - dz_config->zoom_region.origin.x = 0; - else - dz_config->zoom_region.origin.x = - dz_config->zoom_region.origin.x - w_offset; - h_offset = 0; - } -#endif - dz_config->zoom_region.origin.x = - dz_config->zoom_region.origin.x - * eff_res.width -#ifndef ISP2401 - / asd->sensor_array_res.width; -#else - / (asd->sensor_array_res.width - - 2 * w_offset); -#endif - dz_config->zoom_region.origin.y = - dz_config->zoom_region.origin.y - * eff_res.height -#ifndef ISP2401 - / asd->sensor_array_res.height; -#else - / (asd->sensor_array_res.height - - 2 * h_offset); -#endif - dz_config->zoom_region.resolution.width = - dz_config->zoom_region.resolution.width - * eff_res.width -#ifndef ISP2401 - / asd->sensor_array_res.width; -#else - / (asd->sensor_array_res.width - - 2 * w_offset); -#endif - dz_config->zoom_region.resolution.height = - dz_config->zoom_region.resolution.height - * eff_res.height -#ifndef ISP2401 - / asd->sensor_array_res.height; -#else - / (asd->sensor_array_res.height - - 2 * h_offset); -#endif + out_res.width = stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; + out_res.height = stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; + if (out_res.width == 0 || out_res.height == 0) { + dev_err(asd->isp->dev, "%s err current pipe output resolution" + , __func__); + return -EINVAL; + } - /* - * Set same ratio of crop region resolution and current pipe output - * resolution - */ -#ifndef ISP2401 - out_res.width = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.width; - out_res.height = - stream_env->pipe_configs[css_pipe_id].output_info[0].res.height; - if (out_res.width == 0 || out_res.height == 0) { - dev_err(asd->isp->dev, "%s err current pipe output resolution" - , __func__); - return -EINVAL; + if (asd->sensor_array_res.width * out_res.height + < out_res.width * asd->sensor_array_res.height) { + h_offset = asd->sensor_array_res.height + - asd->sensor_array_res.width + * out_res.height / out_res.width; + h_offset = h_offset / 2; + if (dz_config->zoom_region.origin.y < h_offset) + dz_config->zoom_region.origin.y = 0; + else + dz_config->zoom_region.origin.y = dz_config->zoom_region.origin.y - h_offset; + w_offset = 0; + } else { + w_offset = asd->sensor_array_res.width + - asd->sensor_array_res.height + * out_res.width / out_res.height; + w_offset = w_offset / 2; + if (dz_config->zoom_region.origin.x < w_offset) + dz_config->zoom_region.origin.x = 0; + else + dz_config->zoom_region.origin.x = dz_config->zoom_region.origin.x - w_offset; + h_offset = 0; + } + dz_config->zoom_region.origin.x = dz_config->zoom_region.origin.x + * eff_res.width + / (asd->sensor_array_res.width - 2 * w_offset); + dz_config->zoom_region.origin.y = dz_config->zoom_region.origin.y + * eff_res.height + / (asd->sensor_array_res.height - 2 * h_offset); + dz_config->zoom_region.resolution.width = dz_config->zoom_region.resolution.width + * eff_res.width + / (asd->sensor_array_res.width - 2 * w_offset); + dz_config->zoom_region.resolution.height = dz_config->zoom_region.resolution.height + * eff_res.height + / (asd->sensor_array_res.height - 2 * h_offset); } -#endif if (out_res.width * dz_config->zoom_region.resolution.height > dz_config->zoom_region.resolution.width * out_res.height) { dz_config->zoom_region.resolution.height = @@ -3611,9 +3561,7 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, unsigned int len_table; struct atomisp_css_shading_table *shading_table; struct atomisp_css_shading_table *old_table; -#ifdef ISP2401 - struct atomisp_shading_table st; -#endif + struct atomisp_shading_table *st, dest_st; if (!source_st) return 0; @@ -3624,26 +3572,22 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, if (!from_user && css_param->update_flag.shading_table) return 0; -#ifdef ISP2401 - if (copy_from_compatible(&st, source_st, - sizeof(struct atomisp_shading_table), - from_user)) { - dev_err(asd->isp->dev, "copy shading table failed!"); - return -EFAULT; + if (atomisp_hw_is_isp2401) { + if (copy_from_compatible(&dest_st, source_st, + sizeof(struct atomisp_shading_table), + from_user)) { + dev_err(asd->isp->dev, "copy shading table failed!"); + return -EFAULT; + } + st = &dest_st; + } else { + st = source_st; } -#endif old_table = css_param->shading_table; -#ifdef ISP2401 - -#endif /* user config is to disable the shading table. */ -#ifndef ISP2401 - if (!source_st->enable) { -#else - if (!st.enable) { -#endif + if (!st->enable) { /* Generate a minimum table with enable = 0. */ shading_table = atomisp_css_shading_table_alloc(1, 1); if (!shading_table) @@ -3654,109 +3598,70 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, /* Setting a new table. Validate first - all tables must be set */ for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { -#ifndef ISP2401 - if (!source_st->data[i]) -#else - if (!st.data[i]) { + if (!st->data[i]) { dev_err(asd->isp->dev, "shading table validate failed"); -#endif return -EINVAL; -#ifdef ISP2401 + } } -#endif -} - -/* Shading table size per color */ -#ifndef ISP2401 -if (source_st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - source_st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) -#else -if (st.width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - st.height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { - dev_err(asd->isp->dev, "shading table w/h validate failed!"); -#endif - return -EINVAL; -#ifdef ISP2401 -} -#endif - -#ifndef ISP2401 -shading_table = atomisp_css_shading_table_alloc(source_st->width, - source_st->height); -if (!shading_table) - return -ENOMEM; -#else -shading_table = atomisp_css_shading_table_alloc(st.width, - st.height); -if (!shading_table) { - dev_err(asd->isp->dev, "shading table alloc failed!"); - return -ENOMEM; -} -#endif -#ifndef ISP2401 -len_table = source_st->width * source_st->height * ATOMISP_SC_TYPE_SIZE; -#else -len_table = st.width * st.height * ATOMISP_SC_TYPE_SIZE; -#endif -for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { - if (copy_from_compatible(shading_table->data[i], -#ifndef ISP2401 - source_st->data[i], len_table, from_user)) { -#else - st.data[i], len_table, from_user)) { -#endif - atomisp_css_shading_table_free(shading_table); - return -EFAULT; + /* Shading table size per color */ + if (st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { + dev_err(asd->isp->dev, "shading table w/h validate failed!"); + return -EINVAL; } -} -#ifndef ISP2401 -shading_table->sensor_width = source_st->sensor_width; -shading_table->sensor_height = source_st->sensor_height; -shading_table->fraction_bits = source_st->fraction_bits; -shading_table->enable = source_st->enable; -#else -shading_table->sensor_width = st.sensor_width; -shading_table->sensor_height = st.sensor_height; -shading_table->fraction_bits = st.fraction_bits; -shading_table->enable = st.enable; -#endif -/* No need to update shading table if it is the same */ -if (old_table && - old_table->sensor_width == shading_table->sensor_width && - old_table->sensor_height == shading_table->sensor_height && - old_table->width == shading_table->width && - old_table->height == shading_table->height && - old_table->fraction_bits == shading_table->fraction_bits && - old_table->enable == shading_table->enable) { - bool data_is_same = true; + shading_table = atomisp_css_shading_table_alloc(st->width, st->height); + if (!shading_table) + return -ENOMEM; + len_table = st->width * st->height * ATOMISP_SC_TYPE_SIZE; for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { - if (memcmp(shading_table->data[i], old_table->data[i], - len_table) != 0) { - data_is_same = false; - break; + if (copy_from_compatible(shading_table->data[i], + st->data[i], len_table, from_user)) { + atomisp_css_shading_table_free(shading_table); + return -EFAULT; } } + shading_table->sensor_width = st->sensor_width; + shading_table->sensor_height = st->sensor_height; + shading_table->fraction_bits = st->fraction_bits; + shading_table->enable = st->enable; + + /* No need to update shading table if it is the same */ + if (old_table && + old_table->sensor_width == shading_table->sensor_width && + old_table->sensor_height == shading_table->sensor_height && + old_table->width == shading_table->width && + old_table->height == shading_table->height && + old_table->fraction_bits == shading_table->fraction_bits && + old_table->enable == shading_table->enable) { + bool data_is_same = true; + + for (i = 0; i < ATOMISP_NUM_SC_COLORS; i++) { + if (memcmp(shading_table->data[i], old_table->data[i], + len_table) != 0) { + data_is_same = false; + break; + } + } - if (data_is_same) { - atomisp_css_shading_table_free(shading_table); - return 0; + if (data_is_same) { + atomisp_css_shading_table_free(shading_table); + return 0; + } } -} set_lsc: -/* set LSC to CSS */ -css_param->shading_table = shading_table; -css_param->update_flag.shading_table = - (struct atomisp_shading_table *)shading_table; -asd->params.sc_en = shading_table; + /* set LSC to CSS */ + css_param->shading_table = shading_table; + css_param->update_flag.shading_table = (struct atomisp_shading_table *)shading_table; + asd->params.sc_en = shading_table; -if (old_table) - atomisp_css_shading_table_free(old_table); + if (old_table) + atomisp_css_shading_table_free(old_table); -return 0; + return 0; } int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, @@ -3767,9 +3672,7 @@ int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, struct atomisp_css_dvs_grid_info *cur = atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info); int dvs_hor_coef_bytes, dvs_ver_coef_bytes; -#ifdef ISP2401 struct ia_css_dvs2_coefficients dvs2_coefs; -#endif if (!coefs || !cur) return 0; @@ -3777,108 +3680,111 @@ int atomisp_css_cp_dvs2_coefs(struct atomisp_sub_device *asd, if (!from_user && css_param->update_flag.dvs2_coefs) return 0; -#ifndef ISP2401 - if (sizeof(*cur) != sizeof(coefs->grid) || - memcmp(&coefs->grid, cur, sizeof(coefs->grid))) { -#else - if (copy_from_compatible(&dvs2_coefs, coefs, - sizeof(struct ia_css_dvs2_coefficients), - from_user)) { - dev_err(asd->isp->dev, "copy dvs2 coef failed"); - return -EFAULT; - } + if (!atomisp_hw_is_isp2401) { + if (sizeof(*cur) != sizeof(coefs->grid) || + memcmp(&coefs->grid, cur, sizeof(coefs->grid))) { + dev_err(asd->isp->dev, "dvs grid mis-match!\n"); + /* If the grid info in the argument differs from the current + grid info, we tell the caller to reset the grid size and + try again. */ + return -EAGAIN; + } - if (sizeof(*cur) != sizeof(dvs2_coefs.grid) || - memcmp(&dvs2_coefs.grid, cur, sizeof(dvs2_coefs.grid))) { -#endif - dev_err(asd->isp->dev, "dvs grid mis-match!\n"); - /* If the grid info in the argument differs from the current - grid info, we tell the caller to reset the grid size and - try again. */ - return -EAGAIN; - } + if (!coefs->hor_coefs.odd_real || + !coefs->hor_coefs.odd_imag || + !coefs->hor_coefs.even_real || + !coefs->hor_coefs.even_imag || + !coefs->ver_coefs.odd_real || + !coefs->ver_coefs.odd_imag || + !coefs->ver_coefs.even_real || + !coefs->ver_coefs.even_imag) + return -EINVAL; -#ifndef ISP2401 - if (!coefs->hor_coefs.odd_real || - !coefs->hor_coefs.odd_imag || - !coefs->hor_coefs.even_real || - !coefs->hor_coefs.even_imag || - !coefs->ver_coefs.odd_real || - !coefs->ver_coefs.odd_imag || - !coefs->ver_coefs.even_real || - !coefs->ver_coefs.even_imag) -#else - if (!dvs2_coefs.hor_coefs.odd_real || - !dvs2_coefs.hor_coefs.odd_imag || - !dvs2_coefs.hor_coefs.even_real || - !dvs2_coefs.hor_coefs.even_imag || - !dvs2_coefs.ver_coefs.odd_real || - !dvs2_coefs.ver_coefs.odd_imag || - !dvs2_coefs.ver_coefs.even_real || - !dvs2_coefs.ver_coefs.even_imag) -#endif - return -EINVAL; + if (!css_param->dvs2_coeff) { + /* DIS coefficients. */ + css_param->dvs2_coeff = ia_css_dvs2_coefficients_allocate(cur); + if (!css_param->dvs2_coeff) + return -ENOMEM; + } - if (!css_param->dvs2_coeff) { - /* DIS coefficients. */ - css_param->dvs2_coeff = ia_css_dvs2_coefficients_allocate(cur); - if (!css_param->dvs2_coeff) - return -ENOMEM; - } + dvs_hor_coef_bytes = asd->params.dvs_hor_coef_bytes; + dvs_ver_coef_bytes = asd->params.dvs_ver_coef_bytes; + if (copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_real, + coefs->hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_imag, + coefs->hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_real, + coefs->hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_imag, + coefs->hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_real, + coefs->ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_imag, + coefs->ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_real, + coefs->ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_imag, + coefs->ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { + ia_css_dvs2_coefficients_free(css_param->dvs2_coeff); + css_param->dvs2_coeff = NULL; + return -EFAULT; + } + } else { + if (copy_from_compatible(&dvs2_coefs, coefs, + sizeof(struct ia_css_dvs2_coefficients), + from_user)) { + dev_err(asd->isp->dev, "copy dvs2 coef failed"); + return -EFAULT; + } - dvs_hor_coef_bytes = asd->params.dvs_hor_coef_bytes; - dvs_ver_coef_bytes = asd->params.dvs_ver_coef_bytes; - if (copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_real, -#ifndef ISP2401 - coefs->hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || -#else - dvs2_coefs.hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || -#endif - copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_imag, -#ifndef ISP2401 - coefs->hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || -#else - dvs2_coefs.hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || -#endif - copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_real, -#ifndef ISP2401 - coefs->hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || -#else - dvs2_coefs.hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || -#endif - copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_imag, -#ifndef ISP2401 - coefs->hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || -#else - dvs2_coefs.hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || -#endif - copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_real, -#ifndef ISP2401 - coefs->ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || -#else - dvs2_coefs.ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || -#endif - copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_imag, -#ifndef ISP2401 - coefs->ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || -#else - dvs2_coefs.ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || -#endif - copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_real, -#ifndef ISP2401 - coefs->ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || -#else - dvs2_coefs.ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || -#endif - copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_imag, -#ifndef ISP2401 - coefs->ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { -#else - dvs2_coefs.ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { -#endif - ia_css_dvs2_coefficients_free(css_param->dvs2_coeff); - css_param->dvs2_coeff = NULL; - return -EFAULT; + if (sizeof(*cur) != sizeof(dvs2_coefs.grid) || + memcmp(&dvs2_coefs.grid, cur, sizeof(dvs2_coefs.grid))) { + dev_err(asd->isp->dev, "dvs grid mis-match!\n"); + /* If the grid info in the argument differs from the current + grid info, we tell the caller to reset the grid size and + try again. */ + return -EAGAIN; + } + + if (!dvs2_coefs.hor_coefs.odd_real || + !dvs2_coefs.hor_coefs.odd_imag || + !dvs2_coefs.hor_coefs.even_real || + !dvs2_coefs.hor_coefs.even_imag || + !dvs2_coefs.ver_coefs.odd_real || + !dvs2_coefs.ver_coefs.odd_imag || + !dvs2_coefs.ver_coefs.even_real || + !dvs2_coefs.ver_coefs.even_imag) + return -EINVAL; + + if (!css_param->dvs2_coeff) { + /* DIS coefficients. */ + css_param->dvs2_coeff = ia_css_dvs2_coefficients_allocate(cur); + if (!css_param->dvs2_coeff) + return -ENOMEM; + } + + dvs_hor_coef_bytes = asd->params.dvs_hor_coef_bytes; + dvs_ver_coef_bytes = asd->params.dvs_ver_coef_bytes; + if (copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_real, + dvs2_coefs.hor_coefs.odd_real, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.odd_imag, + dvs2_coefs.hor_coefs.odd_imag, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_real, + dvs2_coefs.hor_coefs.even_real, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->hor_coefs.even_imag, + dvs2_coefs.hor_coefs.even_imag, dvs_hor_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_real, + dvs2_coefs.ver_coefs.odd_real, dvs_ver_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.odd_imag, + dvs2_coefs.ver_coefs.odd_imag, dvs_ver_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_real, + dvs2_coefs.ver_coefs.even_real, dvs_ver_coef_bytes, from_user) || + copy_from_compatible(css_param->dvs2_coeff->ver_coefs.even_imag, + dvs2_coefs.ver_coefs.even_imag, dvs_ver_coef_bytes, from_user)) { + ia_css_dvs2_coefficients_free(css_param->dvs2_coeff); + css_param->dvs2_coeff = NULL; + return -EFAULT; + } } css_param->update_flag.dvs2_coefs = @@ -3893,9 +3799,6 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, { struct atomisp_css_dvs_6axis_config *dvs_6axis_config; struct atomisp_css_dvs_6axis_config *old_6axis_config; -#ifdef ISP2401 - struct atomisp_css_dvs_6axis_config t_6axis_config; -#endif struct ia_css_stream *stream = asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream; struct atomisp_css_dvs_grid_info *dvs_grid_info = @@ -3919,103 +3822,113 @@ int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd, /* check whether need to reallocate for 6 axis config */ old_6axis_config = css_param->dvs_6axis; dvs_6axis_config = old_6axis_config; -#ifdef ISP2401 - if (copy_from_compatible(&t_6axis_config, source_6axis_config, - sizeof(struct atomisp_dvs_6axis_config), - from_user)) { - dev_err(asd->isp->dev, "copy morph table failed!"); - return -EFAULT; - } + if (atomisp_hw_is_isp2401) { + struct atomisp_css_dvs_6axis_config t_6axis_config; -#endif - if (old_6axis_config && -#ifndef ISP2401 - (old_6axis_config->width_y != source_6axis_config->width_y || - old_6axis_config->height_y != source_6axis_config->height_y || - old_6axis_config->width_uv != source_6axis_config->width_uv || - old_6axis_config->height_uv != source_6axis_config->height_uv)) { -#else - (old_6axis_config->width_y != t_6axis_config.width_y || - old_6axis_config->height_y != t_6axis_config.height_y || - old_6axis_config->width_uv != t_6axis_config.width_uv || - old_6axis_config->height_uv != t_6axis_config.height_uv)) { -#endif - ia_css_dvs2_6axis_config_free(css_param->dvs_6axis); - css_param->dvs_6axis = NULL; + if (copy_from_compatible(&t_6axis_config, source_6axis_config, + sizeof(struct atomisp_dvs_6axis_config), + from_user)) { + dev_err(asd->isp->dev, "copy morph table failed!"); + return -EFAULT; + } - dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); - if (!dvs_6axis_config) - return -ENOMEM; - } else if (!dvs_6axis_config) { - dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); - if (!dvs_6axis_config) - return -ENOMEM; - } + if (old_6axis_config && + (old_6axis_config->width_y != t_6axis_config.width_y || + old_6axis_config->height_y != t_6axis_config.height_y || + old_6axis_config->width_uv != t_6axis_config.width_uv || + old_6axis_config->height_uv != t_6axis_config.height_uv)) { + ia_css_dvs2_6axis_config_free(css_param->dvs_6axis); + css_param->dvs_6axis = NULL; + + dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); + if (!dvs_6axis_config) + return -ENOMEM; + } else if (!dvs_6axis_config) { + dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); + if (!dvs_6axis_config) + return -ENOMEM; + } -#ifndef ISP2401 - dvs_6axis_config->exp_id = source_6axis_config->exp_id; -#else - dvs_6axis_config->exp_id = t_6axis_config.exp_id; -#endif + dvs_6axis_config->exp_id = t_6axis_config.exp_id; - if (copy_from_compatible(dvs_6axis_config->xcoords_y, -#ifndef ISP2401 - source_6axis_config->xcoords_y, - source_6axis_config->width_y * - source_6axis_config->height_y * - sizeof(*source_6axis_config->xcoords_y), -#else - t_6axis_config.xcoords_y, - t_6axis_config.width_y * - t_6axis_config.height_y * - sizeof(*dvs_6axis_config->xcoords_y), -#endif - from_user)) - goto error; - if (copy_from_compatible(dvs_6axis_config->ycoords_y, -#ifndef ISP2401 - source_6axis_config->ycoords_y, - source_6axis_config->width_y * - source_6axis_config->height_y * - sizeof(*source_6axis_config->ycoords_y), -#else - t_6axis_config.ycoords_y, - t_6axis_config.width_y * - t_6axis_config.height_y * - sizeof(*dvs_6axis_config->ycoords_y), -#endif - from_user)) - goto error; - if (copy_from_compatible(dvs_6axis_config->xcoords_uv, -#ifndef ISP2401 - source_6axis_config->xcoords_uv, - source_6axis_config->width_uv * - source_6axis_config->height_uv * - sizeof(*source_6axis_config->xcoords_uv), -#else - t_6axis_config.xcoords_uv, - t_6axis_config.width_uv * - t_6axis_config.height_uv * - sizeof(*dvs_6axis_config->xcoords_uv), -#endif - from_user)) - goto error; - if (copy_from_compatible(dvs_6axis_config->ycoords_uv, -#ifndef ISP2401 - source_6axis_config->ycoords_uv, - source_6axis_config->width_uv * - source_6axis_config->height_uv * - sizeof(*source_6axis_config->ycoords_uv), -#else - t_6axis_config.ycoords_uv, - t_6axis_config.width_uv * - t_6axis_config.height_uv * - sizeof(*dvs_6axis_config->ycoords_uv), -#endif - from_user)) - goto error; + if (copy_from_compatible(dvs_6axis_config->xcoords_y, + t_6axis_config.xcoords_y, + t_6axis_config.width_y * + t_6axis_config.height_y * + sizeof(*dvs_6axis_config->xcoords_y), + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->ycoords_y, + t_6axis_config.ycoords_y, + t_6axis_config.width_y * + t_6axis_config.height_y * + sizeof(*dvs_6axis_config->ycoords_y), + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->xcoords_uv, + t_6axis_config.xcoords_uv, + t_6axis_config.width_uv * + t_6axis_config.height_uv * + sizeof(*dvs_6axis_config->xcoords_uv), + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->ycoords_uv, + t_6axis_config.ycoords_uv, + t_6axis_config.width_uv * + t_6axis_config.height_uv * + sizeof(*dvs_6axis_config->ycoords_uv), + from_user)) + goto error; + } else { + if (old_6axis_config && + (old_6axis_config->width_y != source_6axis_config->width_y || + old_6axis_config->height_y != source_6axis_config->height_y || + old_6axis_config->width_uv != source_6axis_config->width_uv || + old_6axis_config->height_uv != source_6axis_config->height_uv)) { + ia_css_dvs2_6axis_config_free(css_param->dvs_6axis); + css_param->dvs_6axis = NULL; + + dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); + if (!dvs_6axis_config) + return -ENOMEM; + } else if (!dvs_6axis_config) { + dvs_6axis_config = ia_css_dvs2_6axis_config_allocate(stream); + if (!dvs_6axis_config) + return -ENOMEM; + } + + dvs_6axis_config->exp_id = source_6axis_config->exp_id; + if (copy_from_compatible(dvs_6axis_config->xcoords_y, + source_6axis_config->xcoords_y, + source_6axis_config->width_y * + source_6axis_config->height_y * + sizeof(*source_6axis_config->xcoords_y), + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->ycoords_y, + source_6axis_config->ycoords_y, + source_6axis_config->width_y * + source_6axis_config->height_y * + sizeof(*source_6axis_config->ycoords_y), + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->xcoords_uv, + source_6axis_config->xcoords_uv, + source_6axis_config->width_uv * + source_6axis_config->height_uv * + sizeof(*source_6axis_config->xcoords_uv), + from_user)) + goto error; + if (copy_from_compatible(dvs_6axis_config->ycoords_uv, + source_6axis_config->ycoords_uv, + source_6axis_config->width_uv * + source_6axis_config->height_uv * + sizeof(*source_6axis_config->ycoords_uv), + from_user)) + goto error; + } css_param->dvs_6axis = dvs_6axis_config; css_param->update_flag.dvs_6axis_config = (struct atomisp_dvs_6axis_config *)dvs_6axis_config; @@ -4035,9 +3948,6 @@ int atomisp_cp_morph_table(struct atomisp_sub_device *asd, int ret = -EFAULT; unsigned int i; struct atomisp_css_morph_table *morph_table; -#ifdef ISP2401 - struct atomisp_css_morph_table mtbl; -#endif struct atomisp_css_morph_table *old_morph_table; if (!source_morph_table) @@ -4048,50 +3958,59 @@ int atomisp_cp_morph_table(struct atomisp_sub_device *asd, old_morph_table = css_param->morph_table; -#ifdef ISP2401 - if (copy_from_compatible(&mtbl, source_morph_table, - sizeof(struct atomisp_morph_table), - from_user)) { - dev_err(asd->isp->dev, "copy morph table failed!"); - return -EFAULT; - } + if (atomisp_hw_is_isp2401) { + struct atomisp_css_morph_table mtbl; -#endif - morph_table = atomisp_css_morph_table_allocate( -#ifndef ISP2401 - source_morph_table->width, - source_morph_table->height); -#else - mtbl.width, - mtbl.height); -#endif - if (!morph_table) - return -ENOMEM; + if (copy_from_compatible(&mtbl, source_morph_table, + sizeof(struct atomisp_morph_table), + from_user)) { + dev_err(asd->isp->dev, "copy morph table failed!"); + return -EFAULT; + } - for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { - if (copy_from_compatible(morph_table->coordinates_x[i], - (__force void *)source_morph_table->coordinates_x[i], -#ifndef ISP2401 - source_morph_table->height * source_morph_table->width * - sizeof(*source_morph_table->coordinates_x[i]), -#else - mtbl.height * mtbl.width * - sizeof(*morph_table->coordinates_x[i]), -#endif - from_user)) - goto error; + morph_table = atomisp_css_morph_table_allocate( + mtbl.width, + mtbl.height); + if (!morph_table) + return -ENOMEM; - if (copy_from_compatible(morph_table->coordinates_y[i], - (__force void *)source_morph_table->coordinates_y[i], -#ifndef ISP2401 - source_morph_table->height * source_morph_table->width * - sizeof(*source_morph_table->coordinates_y[i]), -#else - mtbl.height * mtbl.width * - sizeof(*morph_table->coordinates_y[i]), -#endif - from_user)) - goto error; + for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { + if (copy_from_compatible(morph_table->coordinates_x[i], + (__force void *)source_morph_table->coordinates_x[i], + mtbl.height * mtbl.width * + sizeof(*morph_table->coordinates_x[i]), + from_user)) + goto error; + + if (copy_from_compatible(morph_table->coordinates_y[i], + (__force void *)source_morph_table->coordinates_y[i], + mtbl.height * mtbl.width * + sizeof(*morph_table->coordinates_y[i]), + from_user)) + goto error; + } + } else { + morph_table = atomisp_css_morph_table_allocate( + source_morph_table->width, + source_morph_table->height); + if (!morph_table) + return -ENOMEM; + + for (i = 0; i < CSS_MORPH_TABLE_NUM_PLANES; i++) { + if (copy_from_compatible(morph_table->coordinates_x[i], + (__force void *)source_morph_table->coordinates_x[i], + source_morph_table->height * source_morph_table->width * + sizeof(*source_morph_table->coordinates_x[i]), + from_user)) + goto error; + + if (copy_from_compatible(morph_table->coordinates_y[i], + (__force void *)source_morph_table->coordinates_y[i], + source_morph_table->height * source_morph_table->width * + sizeof(*source_morph_table->coordinates_y[i]), + from_user)) + goto error; + } } css_param->morph_table = morph_table; @@ -4224,20 +4143,22 @@ void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe) } } - if (need_to_enqueue_buffer) { - atomisp_qbuffers_to_css(asd); -#ifndef ISP2401 + if (!need_to_enqueue_buffer) + return; + + atomisp_qbuffers_to_css(asd); + + if (!atomisp_hw_is_isp2401) { if (!atomisp_is_wdt_running(asd) && atomisp_buffers_queued(asd)) atomisp_wdt_start(asd); -#else + } else { if (atomisp_buffers_queued_pipe(pipe)) { if (!atomisp_is_wdt_running(pipe)) - atomisp_wdt_start(pipe); + atomisp_wdt_start_pipe(pipe); else atomisp_wdt_refresh_pipe(pipe, - ATOMISP_WDT_KEEP_CURRENT_DELAY); + ATOMISP_WDT_KEEP_CURRENT_DELAY); } -#endif } } @@ -4262,15 +4183,15 @@ int atomisp_set_parameters(struct video_device *vdev, "%s: set parameter(per_frame_setting %d) for asd%d with isp_config_id %d of %s\n", __func__, arg->per_frame_setting, asd->index, arg->isp_config_id, vdev->name); -#ifdef ISP2401 - if (atomisp_is_vf_pipe(pipe) && arg->per_frame_setting) { - dev_err(asd->isp->dev, "%s: vf pipe not support per_frame_setting", - __func__); - return -EINVAL; + if (atomisp_hw_is_isp2401) { + if (atomisp_is_vf_pipe(pipe) && arg->per_frame_setting) { + dev_err(asd->isp->dev, "%s: vf pipe not support per_frame_setting", + __func__); + return -EINVAL; + } } -#endif if (arg->per_frame_setting && !atomisp_is_vf_pipe(pipe)) { /* * Per-frame setting enabled, we allocate a new parameter @@ -4928,11 +4849,9 @@ int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f, fmt = atomisp_output_fmts; } -#ifdef ISP2401 if (f->fmt.pix.width <= 0 || f->fmt.pix.height <= 0) return -EINVAL; -#endif snr_mbus_fmt->code = fmt->mbus_code; snr_mbus_fmt->width = f->fmt.pix.width; snr_mbus_fmt->height = f->fmt.pix.height; @@ -5134,11 +5053,12 @@ static int __enable_continuous_mode(struct atomisp_sub_device *asd, "continuous mode %d, raw buffers %d, stop preview %d\n", enable, asd->continuous_raw_buffer_size->val, !asd->continuous_viewfinder->val); -#ifndef ISP2401 - atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_PRIMARY); -#else - atomisp_update_capture_mode(asd); -#endif + + if (!atomisp_hw_is_isp2401) + atomisp_css_capture_set_mode(asd, CSS_CAPTURE_MODE_PRIMARY); + else + atomisp_update_capture_mode(asd); + /* in case of ANR, force capture pipe to offline mode */ atomisp_css_capture_enable_online(asd, ATOMISP_INPUT_STREAM_GENERAL, asd->params.low_light ? false : !enable); @@ -6012,17 +5932,12 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f) main_compose.width = f->fmt.pix.width; main_compose.height = f->fmt.pix.height; -#ifndef ISP2401 /* WORKAROUND: this override is universally enabled in * GMIN to work around a CTS failures (GMINL-539) * which appears to be related by a hardware * performance limitation. It's unclear why this * particular code triggers the issue. */ - if (1 || - crop_needs_override) { -#else - if (crop_needs_override) { -#endif + if (!atomisp_hw_is_isp2401 || crop_needs_override) { if (isp_sink_crop.width * main_compose.height > isp_sink_crop.height * main_compose.width) { sink_crop.height = isp_sink_crop.height; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h index 3885a5a9d65a8..b5af9da3b0fba 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h @@ -40,13 +40,13 @@ struct atomisp_css_frame; #define MEMORY_SPACE_ENABLE 1 #define INTR_IER 24 #define INTR_IIR 16 -#ifdef ISP2401 + +/* ISP2401 */ #define RUNMODE_MASK (ATOMISP_RUN_MODE_VIDEO | ATOMISP_RUN_MODE_STILL_CAPTURE \ | ATOMISP_RUN_MODE_PREVIEW) /* FIXME: check if can go */ extern int atomisp_punit_hpll_freq; -#endif /* * Helper function @@ -59,11 +59,10 @@ struct atomisp_acc_pipe *atomisp_to_acc_pipe(struct video_device *dev); int atomisp_reset(struct atomisp_device *isp); void atomisp_flush_bufs_and_wakeup(struct atomisp_sub_device *asd); void atomisp_clear_css_buffer_counters(struct atomisp_sub_device *asd); -#ifndef ISP2401 +/* ISP2400 */ bool atomisp_buffers_queued(struct atomisp_sub_device *asd); -#else +/* ISP2401 */ bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe); -#endif /* TODO:should be here instead of atomisp_helper.h extern void __iomem *atomisp_io_base; @@ -103,14 +102,12 @@ bool atomisp_is_viewfinder_support(struct atomisp_device *isp); */ /* -#ifdef ISP2401 * Function to set sensor runmode by user when * ATOMISP_IOC_S_SENSOR_RUNMODE ioctl was called */ int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd, struct atomisp_s_runmode *runmode); /* -#endif * Function to enable/disable lens geometry distortion correction (GDC) and * chromatic aberration correction (CAC) */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h index 8901d2f00c90b..26539f3ffb9b6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h @@ -28,13 +28,9 @@ #include #include -#ifndef ISP2401 +/* ISP2400*/ #include "ia_css_types.h" #include "sh_css_legacy.h" -#else -/*#include "ia_css_types.h"*/ -/*#include "sh_css_legacy.h"*/ -#endif #include "atomisp_csi2.h" #include "atomisp_file.h" @@ -148,13 +144,12 @@ #define ATOMISP_DEPTH_DEFAULT_MASTER_SENSOR 0 #define ATOMISP_DEPTH_DEFAULT_SLAVE_SENSOR 1 -#ifdef ISP2401 +/* ISP2401 */ #define ATOMISP_ION_DEVICE_FD_OFFSET 16 #define ATOMISP_ION_SHARED_FD_MASK (0xFFFF) #define ATOMISP_ION_DEVICE_FD_MASK (~ATOMISP_ION_SHARED_FD_MASK) #define ION_FD_UNSET (-1) -#endif #define DIV_NEAREST_STEP(n, d, step) \ round_down((2 * (n) + (d) * (step)) / (2 * (d)), (step)) @@ -271,9 +266,10 @@ struct atomisp_device { bool isp_fatal_error; struct workqueue_struct *wdt_work_queue; struct work_struct wdt_work; -#ifndef ISP2401 + + /* ISP2400 */ atomic_t wdt_count; -#endif + atomic_t wdt_work_queued; spinlock_t lock; /* Just for streaming below */ @@ -293,17 +289,19 @@ struct atomisp_device { extern struct device *atomisp_dev; #define atomisp_is_wdt_running(a) timer_pending(&(a)->wdt) -#ifdef ISP2401 + +/* ISP2401 */ void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, unsigned int delay); -#endif void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay); -#ifndef ISP2401 + +/* ISP2400 */ void atomisp_wdt_start(struct atomisp_sub_device *asd); -#else -void atomisp_wdt_start(struct atomisp_video_pipe *pipe); + +/* ISP2401 */ +void atomisp_wdt_start_pipe(struct atomisp_video_pipe *pipe); void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync); -#endif + void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync); #endif /* __ATOMISP_INTERNAL_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h index 58f77a146999c..b0d561224beb9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h @@ -106,16 +106,15 @@ struct atomisp_video_pipe { */ unsigned int frame_request_config_id[VIDEO_MAX_FRAME]; struct atomisp_css_params_with_list *frame_params[VIDEO_MAX_FRAME]; -#ifdef ISP2401 /* * move wdt from asd struct to create wdt for each pipe */ + /* ISP2401 */ struct timer_list wdt; unsigned int wdt_duration; /* in jiffies */ unsigned long wdt_expires; atomic_t wdt_count; -#endif }; struct atomisp_acc_pipe { @@ -314,13 +313,12 @@ struct atomisp_sub_device { struct v4l2_ctrl *continuous_raw_buffer_size; struct v4l2_ctrl *continuous_viewfinder; struct v4l2_ctrl *enable_raw_buffer_lock; -#ifdef ISP2401 + + /* ISP2401 */ struct v4l2_ctrl *ion_dev_fd; -#endif - struct v4l2_ctrl *disable_dz; -#ifdef ISP2401 struct v4l2_ctrl *select_isp_version; -#endif + + struct v4l2_ctrl *disable_dz; struct { struct list_head fw; @@ -400,20 +398,18 @@ struct atomisp_sub_device { int raw_buffer_locked_count; spinlock_t raw_buffer_bitmap_lock; -#ifndef ISP2401 + /* ISP 2400 */ struct timer_list wdt; unsigned int wdt_duration; /* in jiffies */ unsigned long wdt_expires; -#endif + /* ISP2401 */ + bool re_trigger_capture; + struct atomisp_resolution sensor_array_res; bool high_speed_mode; /* Indicate whether now is a high speed mode */ int pending_capture_request; /* Indicates the number of pending capture requests. */ -#ifndef ISP2401 -#else - bool re_trigger_capture; -#endif unsigned int preview_exp_id; unsigned int postview_exp_id; }; @@ -423,14 +419,16 @@ extern const struct atomisp_in_fmt_conv atomisp_in_fmt_conv[]; u32 atomisp_subdev_uncompressed_code(u32 code); bool atomisp_subdev_is_compressed(u32 code); const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv(u32 code); -#ifndef ISP2401 + +/* ISP2400 */ const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt( enum atomisp_input_format atomisp_in_fmt); -#else + +/* ISP2401 */ const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt(enum atomisp_input_format atomisp_in_fmt); -#endif + const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_compressed(u32 code); bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd, unsigned int source_pad); -- GitLab From 268ff5bf6b2b4b560fb65a9527f14098de87b3a5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 20 Apr 2020 12:42:52 +0200 Subject: [PATCH 396/503] media: atomisp: atomisp_dfs_tables.h: don't depend on ISP version There's a dependency on this header for the ISP model. While this sounds really weird (as just one resolution needs it), as we don't know what's the right value, let's just keep it. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/atomisp_dfs_tables.h | 14 +++++++------- .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 10 ++++++++++ 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h index e3acf78816275..f5e16e968cd31 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h @@ -128,7 +128,7 @@ static const struct atomisp_dfs_config dfs_config_merr_1179 = { .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179), }; -static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { +static struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { { .width = 1920, .height = 1080, @@ -140,11 +140,11 @@ static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { .width = 1080, .height = 1920, .fps = 30, -#ifndef ISP2401 - .isp_freq = ISP_FREQ_266MHZ, -#else - .isp_freq = ISP_FREQ_400MHZ, -#endif + /* + * FIXME: this is weird, but .isp_freq depends on + * the chip being ISP2400 or ISP2401. So, this should be + * initialized on runtime. + */ .run_mode = ATOMISP_RUN_MODE_VIDEO, }, { @@ -205,7 +205,7 @@ static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { }, }; -static const struct atomisp_dfs_config dfs_config_merr_117a = { +static struct atomisp_dfs_config dfs_config_merr_117a = { .lowest_freq = ISP_FREQ_200MHZ, .max_freq_at_vmin = ISP_FREQ_200MHZ, .highest_freq = ISP_FREQ_400MHZ, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index 8e3d2df74eaa5..55bb513b933ae 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -1246,7 +1246,17 @@ static int atomisp_pci_probe(struct pci_dev *dev, isp->dfs = &dfs_config_merr_1179; break; case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A: + /* + * FIXME: This should likely be uneeded. Either one + * value is likely the correct one for this resolution + */ + if (!atomisp_hw_is_isp2401) + dfs_rules_merr_117a[1].isp_freq = ISP_FREQ_266MHZ; + else + dfs_rules_merr_117a[1].isp_freq = ISP_FREQ_400MHZ; + isp->dfs = &dfs_config_merr_117a; + break; default: isp->dfs = &dfs_config_merr; -- GitLab From 643405b0fff41787834c122660d77d9ebdb5c3a4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 20 Apr 2020 12:33:51 +0200 Subject: [PATCH 397/503] media: atomisp: pci/atomisp2/*.h remove #ifdef ISP2401 Those ifs can easily be removed without breaking the code. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h | 6 ------ drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h | 5 ++--- 2 files changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h index 5d102a4f8affc..cc489a331a7c5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h @@ -153,12 +153,6 @@ #define CCK_FUSE_REG_0 0x08 #define CCK_FUSE_HPLL_FREQ_MASK 0x03 -#if defined(ISP2401) -#define ISP_FREQ_MAX ISP_FREQ_320MHZ -#else -#define ISP_FREQ_MAX ISP_FREQ_400MHZ -#endif - /* ISP2401 CSI2+ receiver delay settings */ #define CSI2_PORT_A_BASE 0xC0000 #define CSI2_PORT_B_BASE 0xC2000 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h index 2558193045a69..65c9caf72b7bb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h @@ -39,10 +39,9 @@ extern int pad_h; #define CSS_DTRACE_VERBOSITY_LEVEL 5 /* Controls trace verbosity */ #define CSS_DTRACE_VERBOSITY_TIMEOUT 9 /* Verbosity on ISP timeout */ #define MRFLD_MAX_ZOOM_FACTOR 1024 -#ifdef ISP2401 -#define ATOMISP_CSS_ISP_PIPE_VERSION_2_2 0 + +/* ISP2401 */ #define ATOMISP_CSS_ISP_PIPE_VERSION_2_7 1 -#endif #define IS_ISP2401(isp) \ (((isp)->media_dev.hw_revision & ATOMISP_HW_REVISION_MASK) \ -- GitLab From 9ace178dee15432712fc70a5f84cb00695fc70b9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 13:49:34 +0200 Subject: [PATCH 398/503] media: atomisp: atomisp_ioctl.c: get rid of a ISP2400/ISP2401 dependency Replace #ifdef occurrences there with runtime checks. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/atomisp_ioctl.c | 305 ++++++++---------- .../atomisp/pci/atomisp2/atomisp_ioctl.h | 14 +- 2 files changed, 143 insertions(+), 176 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c index 13f8511aa67ca..3417cd547ae70 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c @@ -574,6 +574,7 @@ static int atomisp_enum_input(struct file *file, void *fh, struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); int index = input->index; + struct v4l2_subdev *motor; if (index >= isp->input_cnt) return -EINVAL; @@ -591,24 +592,19 @@ static int atomisp_enum_input(struct file *file, void *fh, * ioctl is the only way to enum inputs + possible external actuators * for 3A tuning purpose. */ -#ifndef ISP2401 - if (isp->inputs[index].motor && - strlen(isp->inputs[index].motor->name) > 0) { -#else - if (isp->motor && - strlen(isp->motor->name) > 0) { -#endif + if (!atomisp_hw_is_isp2401) + motor = isp->inputs[index].motor; + else + motor = isp->motor; + + if (motor && strlen(motor->name) > 0) { const int cur_len = strlen(input->name); const int max_size = sizeof(input->name) - cur_len - 1; if (max_size > 1) { input->name[cur_len] = '+'; strncpy(&input->name[cur_len + 1], -#ifndef ISP2401 - isp->inputs[index].motor->name, max_size - 1); -#else - isp->motor->name, max_size - 1); -#endif + motor->name, max_size - 1); } } @@ -677,6 +673,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) struct atomisp_device *isp = video_get_drvdata(vdev); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; struct v4l2_subdev *camera = NULL; + struct v4l2_subdev *motor; int ret; rt_mutex_lock(&isp->mutex); @@ -745,17 +742,16 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input) goto error; } -#ifndef ISP2401 - if (!isp->sw_contex.file_input && isp->inputs[input].motor) - ret = v4l2_subdev_call(isp->inputs[input].motor, core, - init, 1); -#else - if (isp->motor) - ret = v4l2_subdev_call(isp->motor, core, s_power, 1); + if (!atomisp_hw_is_isp2401) { + motor = isp->inputs[input].motor; + } else { + motor = isp->motor; + if (motor) + ret = v4l2_subdev_call(motor, core, s_power, 1); + } - if (!isp->sw_contex.file_input && isp->motor) - ret = v4l2_subdev_call(isp->motor, core, init, 1); -#endif + if (!isp->sw_contex.file_input && motor) + ret = v4l2_subdev_call(motor, core, init, 1); asd->input_curr = input; /* mark this camera is used by the current stream */ @@ -1218,43 +1214,40 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) } attributes.pgnr = pgnr; + attributes.type = HRT_USR_PTR; #ifdef CONFIG_ION -#ifndef ISP2401 - attributes.type = buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_ION - ? HRT_USR_ION : HRT_USR_PTR; -#else - if (buf->reserved & ATOMISP_BUFFER_TYPE_IS_ION) { - attributes.type = HRT_USR_ION; - if (asd->ion_dev_fd->val != ION_FD_UNSET) { - dev_dbg(isp->dev, "ION buffer queued, share_fd=%lddev_fd=%d.\n", - buf->m.userptr, asd->ion_dev_fd->val); - /* - * Make sure the shared fd we just got - * from user space isn't larger than - * the space we have for it. - */ - if ((buf->m.userptr & - (ATOMISP_ION_DEVICE_FD_MASK)) != 0) { - dev_err(isp->dev, - "Error: v4l2 buffer fd:0X%0lX > 0XFFFF.\n", - buf->m.userptr); + if (!atomisp_hw_is_isp2401) { + if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_ION) + attributes.type = HRT_USR_ION; + } else { + if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_ION) { + attributes.type = HRT_USR_ION; + if (asd->ion_dev_fd->val != ION_FD_UNSET) { + dev_dbg(isp->dev, "ION buffer queued, share_fd=%lddev_fd=%d.\n", + buf->m.userptr, asd->ion_dev_fd->val); + /* + * Make sure the shared fd we just got + * from user space isn't larger than + * the space we have for it. + */ + if ((buf->m.userptr & + (ATOMISP_ION_DEVICE_FD_MASK)) != 0) { + dev_err(isp->dev, + "Error: v4l2 buffer fd:0X%0lX > 0XFFFF.\n", + buf->m.userptr); + ret = -EINVAL; + goto error; + } + buf->m.userptr |= asd->ion_dev_fd->val << + ATOMISP_ION_DEVICE_FD_OFFSET; + } else { + dev_err(isp->dev, "v4l2 buffer type is ION, \ + but no dev fd set from userspace.\n"); ret = -EINVAL; goto error; } - buf->m.userptr |= asd->ion_dev_fd->val << - ATOMISP_ION_DEVICE_FD_OFFSET; - } else { - dev_err(isp->dev, "v4l2 buffer type is ION, \ - but no dev fd set from userspace.\n"); - ret = -EINVAL; - goto error; } - } else { - attributes.type = HRT_USR_PTR; } -#endif -#else - attributes.type = HRT_USR_PTR; #endif ret = atomisp_css_frame_map(&handle, &frame_info, (void __user *)buf->m.userptr, @@ -1315,14 +1308,14 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) } else { atomisp_qbuffers_to_css(asd); -#ifndef ISP2401 - if (!atomisp_is_wdt_running(asd) && atomisp_buffers_queued(asd)) - atomisp_wdt_start(asd); -#else - if (!atomisp_is_wdt_running(pipe) && - atomisp_buffers_queued_pipe(pipe)) - atomisp_wdt_start(pipe); -#endif + if (!atomisp_hw_is_isp2401) { + if (!atomisp_is_wdt_running(asd) && atomisp_buffers_queued(asd)) + atomisp_wdt_start(asd); + } else { + if (!atomisp_is_wdt_running(pipe) && + atomisp_buffers_queued_pipe(pipe)) + atomisp_wdt_start_pipe(pipe); + } } } @@ -1339,25 +1332,25 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) pipe->capq.streaming && !asd->enable_raw_buffer_lock->val && asd->params.offline_parm.num_captures == 1) { -#ifndef ISP2401 - asd->pending_capture_request++; - dev_dbg(isp->dev, "Add one pending capture request.\n"); -#else - if (asd->re_trigger_capture) { - ret = atomisp_css_offline_capture_configure(asd, - asd->params.offline_parm.num_captures, - asd->params.offline_parm.skip_frames, - asd->params.offline_parm.offset); - asd->re_trigger_capture = false; - dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n", - __func__, ret); - - } else { + if (!atomisp_hw_is_isp2401) { asd->pending_capture_request++; - asd->re_trigger_capture = false; dev_dbg(isp->dev, "Add one pending capture request.\n"); + } else { + if (asd->re_trigger_capture) { + ret = atomisp_css_offline_capture_configure(asd, + asd->params.offline_parm.num_captures, + asd->params.offline_parm.skip_frames, + asd->params.offline_parm.offset); + asd->re_trigger_capture = false; + dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n", + __func__, ret); + + } else { + asd->pending_capture_request++; + asd->re_trigger_capture = false; + dev_dbg(isp->dev, "Add one pending capture request.\n"); + } } -#endif } rt_mutex_unlock(&isp->mutex); @@ -1612,22 +1605,21 @@ int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, return 0; } -/* FIXME! */ -#ifndef ISP2401 +/* FIXME! ISP2400 */ static void __wdt_on_master_slave_sensor(struct atomisp_device *isp, - unsigned int wdt_duration) -#else -static void __wdt_on_master_slave_sensor(struct atomisp_video_pipe *pipe, - unsigned int wdt_duration, - bool enable) -#endif + unsigned int wdt_duration) { -#ifndef ISP2401 if (atomisp_buffers_queued(&isp->asd[0])) atomisp_wdt_refresh(&isp->asd[0], wdt_duration); if (atomisp_buffers_queued(&isp->asd[1])) atomisp_wdt_refresh(&isp->asd[1], wdt_duration); -#else +} + +/* FIXME! ISP2401 */ +static void __wdt_on_master_slave_sensor_pipe(struct atomisp_video_pipe *pipe, + unsigned int wdt_duration, + bool enable) +{ static struct atomisp_video_pipe *pipe0; if (enable) { @@ -1638,7 +1630,6 @@ static void __wdt_on_master_slave_sensor(struct atomisp_video_pipe *pipe, } else { pipe0 = pipe; } -#endif } static void atomisp_pause_buffer_event(struct atomisp_device *isp) @@ -1739,9 +1730,8 @@ static int atomisp_streamon(struct file *file, void *fh, /* Reset pending capture request count. */ asd->pending_capture_request = 0; -#ifdef ISP2401 - asd->re_trigger_capture = false; -#endif + if (atomisp_hw_is_isp2401) + asd->re_trigger_capture = false; if ((atomisp_subdev_streaming_count(asd) > sensor_start_stream) && (!isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl)) { @@ -1882,17 +1872,16 @@ static int atomisp_streamon(struct file *file, void *fh, dev_err(isp->dev, "master slave sensor stream on failed!\n"); goto out; } -#ifndef ISP2401 - __wdt_on_master_slave_sensor(isp, wdt_duration); -#else - __wdt_on_master_slave_sensor(pipe, wdt_duration, true); -#endif + if (!atomisp_hw_is_isp2401) { + __wdt_on_master_slave_sensor(isp, wdt_duration); + } else { + __wdt_on_master_slave_sensor_pipe(pipe, wdt_duration, true); + } goto start_delay_wq; } else if (asd->depth_mode->val && (atomisp_streaming_count(isp) < ATOMISP_DEPTH_SENSOR_STREAMON_COUNT)) { -#ifdef ISP2401 - __wdt_on_master_slave_sensor(pipe, wdt_duration, false); -#endif + if (atomisp_hw_is_isp2401) + __wdt_on_master_slave_sensor_pipe(pipe, wdt_duration, false); goto start_delay_wq; } @@ -1913,13 +1902,13 @@ static int atomisp_streamon(struct file *file, void *fh, goto out; } -#ifndef ISP2401 - if (atomisp_buffers_queued(asd)) - atomisp_wdt_refresh(asd, wdt_duration); -#else - if (atomisp_buffers_queued_pipe(pipe)) - atomisp_wdt_refresh_pipe(pipe, wdt_duration); -#endif + if (!atomisp_hw_is_isp2401) { + if (atomisp_buffers_queued(asd)) + atomisp_wdt_refresh(asd, wdt_duration); + } else { + if (atomisp_buffers_queued_pipe(pipe)) + atomisp_wdt_refresh_pipe(pipe, wdt_duration); + } start_delay_wq: if (asd->continuous_mode->val) { @@ -2372,16 +2361,16 @@ static int atomisp_queryctl(struct file *file, void *fh, case V4L2_CID_FOCUS_ABSOLUTE: case V4L2_CID_FOCUS_RELATIVE: case V4L2_CID_FOCUS_STATUS: -#ifndef ISP2401 - return v4l2_queryctrl(isp->inputs[asd->input_curr].camera-> - ctrl_handler, qc); -#else + if (!atomisp_hw_is_isp2401) { + return v4l2_queryctrl(isp->inputs[asd->input_curr].camera-> + ctrl_handler, qc); + } + /* ISP2401 */ if (isp->motor) return v4l2_queryctrl(isp->motor->ctrl_handler, qc); else return v4l2_queryctrl(isp->inputs[asd->input_curr]. camera->ctrl_handler, qc); -#endif } if (qc->id & V4L2_CTRL_FLAG_NEXT_CTRL) @@ -2408,10 +2397,16 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, struct video_device *vdev = video_devdata(file); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; struct atomisp_device *isp = video_get_drvdata(vdev); + struct v4l2_subdev *motor; struct v4l2_control ctrl; int i; int ret = 0; + if (!atomisp_hw_is_isp2401) + motor = isp->inputs[asd->input_curr].motor; + else + motor = isp->motor; + for (i = 0; i < c->count; i++) { ctrl.id = c->controls[i].id; ctrl.value = c->controls[i].value; @@ -2440,23 +2435,8 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh, case V4L2_CID_FOCUS_RELATIVE: case V4L2_CID_FOCUS_STATUS: case V4L2_CID_FOCUS_AUTO: -#ifndef ISP2401 - if (isp->inputs[asd->input_curr].motor) -#else - if (isp->motor) -#endif - ret = -#ifndef ISP2401 - v4l2_g_ctrl(isp->inputs[asd->input_curr]. - motor->ctrl_handler, &ctrl); -#else - v4l2_g_ctrl(isp->motor->ctrl_handler, - &ctrl); -#endif - else - ret = - v4l2_g_ctrl(isp->inputs[asd->input_curr]. - camera->ctrl_handler, &ctrl); + if (motor) + ret = v4l2_g_ctrl(motor->ctrl_handler, &ctrl); break; case V4L2_CID_FLASH_STATUS: case V4L2_CID_FLASH_INTENSITY: @@ -2526,10 +2506,17 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, struct video_device *vdev = video_devdata(file); struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd; struct atomisp_device *isp = video_get_drvdata(vdev); + struct v4l2_subdev *motor; struct v4l2_control ctrl; int i; int ret = 0; + + if (!atomisp_hw_is_isp2401) + motor = isp->inputs[asd->input_curr].motor; + else + motor = isp->motor; + for (i = 0; i < c->count; i++) { struct v4l2_ctrl *ctr; @@ -2557,19 +2544,9 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh, case V4L2_CID_FOCUS_RELATIVE: case V4L2_CID_FOCUS_STATUS: case V4L2_CID_FOCUS_AUTO: -#ifndef ISP2401 - if (isp->inputs[asd->input_curr].motor) -#else - if (isp->motor) -#endif - ret = v4l2_s_ctrl(NULL, -#ifndef ISP2401 - isp->inputs[asd->input_curr]. - motor->ctrl_handler, &ctrl); -#else - isp->motor->ctrl_handler, + if (motor) + ret = v4l2_s_ctrl(NULL, motor->ctrl_handler, &ctrl); -#endif else ret = v4l2_s_ctrl(NULL, isp->inputs[asd->input_curr]. @@ -2754,6 +2731,7 @@ static long atomisp_vidioc_default(struct file *file, void *fh, struct video_device *vdev = video_devdata(file); struct atomisp_device *isp = video_get_drvdata(vdev); struct atomisp_sub_device *asd; + struct v4l2_subdev *motor; bool acc_node; int err; @@ -2763,6 +2741,11 @@ static long atomisp_vidioc_default(struct file *file, void *fh, else asd = atomisp_to_video_pipe(vdev)->asd; + if (!atomisp_hw_is_isp2401) + motor = isp->inputs[asd->input_curr].motor; + else + motor = isp->motor; + switch (cmd) { case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA: case ATOMISP_IOC_S_EXPOSURE: @@ -2774,9 +2757,7 @@ static long atomisp_vidioc_default(struct file *file, void *fh, case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: case ATOMISP_IOC_S_SENSOR_EE_CONFIG: -#ifdef ISP2401 case ATOMISP_IOC_G_UPDATE_EXPOSURE: -#endif /* we do not need take isp->mutex for these IOCTLs */ break; default: @@ -2784,12 +2765,13 @@ static long atomisp_vidioc_default(struct file *file, void *fh, break; } switch (cmd) { -#ifdef ISP2401 case ATOMISP_IOC_S_SENSOR_RUNMODE: - err = atomisp_set_sensor_runmode(asd, arg); + if (atomisp_hw_is_isp2401) + err = atomisp_set_sensor_runmode(asd, arg); + else + err = -EINVAL; break; -#endif case ATOMISP_IOC_G_XNR: err = atomisp_xnr(asd, 0, arg); break; @@ -2941,24 +2923,11 @@ static long atomisp_vidioc_default(struct file *file, void *fh, break; case ATOMISP_IOC_G_MOTOR_PRIV_INT_DATA: -#ifndef ISP2401 - if (isp->inputs[asd->input_curr].motor) -#else - if (isp->motor) -#endif -#ifndef ISP2401 - err = v4l2_subdev_call( - isp->inputs[asd->input_curr].motor, - core, ioctl, cmd, arg); -#else - err = v4l2_subdev_call( - isp->motor, - core, ioctl, cmd, arg); -#endif + if (motor) + err = v4l2_subdev_call(motor, core, ioctl, cmd, arg); else - err = v4l2_subdev_call( - isp->inputs[asd->input_curr].camera, - core, ioctl, cmd, arg); + err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + core, ioctl, cmd, arg); break; case ATOMISP_IOC_S_EXPOSURE: @@ -2968,12 +2937,16 @@ static long atomisp_vidioc_default(struct file *file, void *fh, case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_MODE: case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: -#ifdef ISP2401 - case ATOMISP_IOC_G_UPDATE_EXPOSURE: -#endif err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, core, ioctl, cmd, arg); break; + case ATOMISP_IOC_G_UPDATE_EXPOSURE: + if (atomisp_hw_is_isp2401) + err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, + core, ioctl, cmd, arg); + else + err = -EINVAL; + break; case ATOMISP_IOC_ACC_LOAD: err = atomisp_acc_load(asd, arg); @@ -3085,9 +3058,7 @@ static long atomisp_vidioc_default(struct file *file, void *fh, case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_MODE: case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT: -#ifdef ISP2401 case ATOMISP_IOC_G_UPDATE_EXPOSURE: -#endif break; default: rt_mutex_unlock(&isp->mutex); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h index 1f87d8f00c4a1..5f3f2ec2539b0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h @@ -27,15 +27,11 @@ struct atomisp_video_pipe; extern const struct atomisp_format_bridge atomisp_output_fmts[]; -const struct atomisp_format_bridge *atomisp_get_format_bridge( - unsigned int pixelformat); -#ifndef ISP2401 -const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus( - u32 mbus_code); -#else -const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus(u32 - mbus_code); -#endif +const struct +atomisp_format_bridge *atomisp_get_format_bridge(unsigned int pixelformat); + +const struct +atomisp_format_bridge *atomisp_get_format_bridge_from_mbus(u32 mbus_code); int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd, uint16_t stream_id); -- GitLab From a19b190e32dfcdd909555df3c009e0bc66f8353d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 14:06:58 +0200 Subject: [PATCH 399/503] media: atomisp: atomisp_v4l2.c: set wdt timers according with ISP version Add a runtime check to use the proper wdt timer init at runtime, depending on the chipset revision. For now, we can't get rid of the remaining version checks, as the rest of the code is not prepared yet to detect the ISP version on runtime. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index 55bb513b933ae..ef7a83c5f4593 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -1148,14 +1148,17 @@ static int init_atomisp_wdts(struct atomisp_device *isp) for (i = 0; i < isp->num_of_streams; i++) { struct atomisp_sub_device *asd = &isp->asd[i]; -#ifndef ISP2401 - timer_setup(&asd->wdt, atomisp_wdt, 0); -#else - timer_setup(&asd->video_out_capture.wdt, atomisp_wdt, 0); - timer_setup(&asd->video_out_preview.wdt, atomisp_wdt, 0); - timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0); - timer_setup(&asd->video_out_video_capture.wdt, atomisp_wdt, 0); -#endif + if (!atomisp_hw_is_isp2401) + timer_setup(&asd->wdt, atomisp_wdt, 0); + else { + timer_setup(&asd->video_out_capture.wdt, + atomisp_wdt, 0); + timer_setup(&asd->video_out_preview.wdt, + atomisp_wdt, 0); + timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0); + timer_setup(&asd->video_out_video_capture.wdt, + atomisp_wdt, 0); + } } return 0; alloc_fail: -- GitLab From 02c392332cb906689d2e259895a509020a6f99b7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 14:17:45 +0200 Subject: [PATCH 400/503] media: atomisp: atomisp_subdev.c check ISP version on runtime Remove ISP-version-dependent ifdefs. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/atomisp_subdev.c | 26 ++++++++----------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c index 7dc19e038faa0..8f95afccaefce 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c @@ -1039,7 +1039,6 @@ static const struct v4l2_ctrl_config ctrl_depth_mode = { .def = 0, }; -#ifdef ISP2401 /* * Control for selectting ISP version * @@ -1058,13 +1057,14 @@ static const struct v4l2_ctrl_config ctrl_select_isp_version = { .def = 0, }; -#ifdef CONFIG_ION +#if 0 /* #ifdef CONFIG_ION */ /* * Control for ISP ion device fd * * userspace will open ion device and pass the fd to kernel. * this fd will be used to map shared fd to buffer. */ +/* V4L2_CID_ATOMISP_ION_DEVICE_FD is not defined */ static const struct v4l2_ctrl_config ctrl_ion_dev_fd = { .ops = &ctrl_ops, .id = V4L2_CID_ATOMISP_ION_DEVICE_FD, @@ -1077,7 +1077,6 @@ static const struct v4l2_ctrl_config ctrl_ion_dev_fd = { }; #endif -#endif static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd, struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type) { @@ -1220,19 +1219,16 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd) v4l2_ctrl_new_custom(&asd->ctrl_handler, &ctrl_disable_dz, NULL); -#ifdef ISP2401 - asd->select_isp_version = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_select_isp_version, - NULL); - -#ifdef CONFIG_ION - asd->ion_dev_fd = - v4l2_ctrl_new_custom(&asd->ctrl_handler, - &ctrl_ion_dev_fd, - NULL); -#endif + if (atomisp_hw_is_isp2401) { + asd->select_isp_version = v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_select_isp_version, + NULL); +#if 0 /* #ifdef CONFIG_ION */ + asd->ion_dev_fd = v4l2_ctrl_new_custom(&asd->ctrl_handler, + &ctrl_ion_dev_fd, + NULL); #endif + } /* Make controls visible on subdev as well. */ asd->subdev.ctrl_handler = &asd->ctrl_handler; -- GitLab From 78e2888ccb2920e2b782e6b07a7563800dabe7fe Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 14:20:14 +0200 Subject: [PATCH 401/503] media: atomisp: atomisp_csi2.c: remove useless ifdefs The ifdefs there are meaningless. Just remove them for good. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/atomisp_csi2.c | 20 ++----------------- 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c index b9afeb5d78dec..a2638863206e6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c @@ -88,12 +88,7 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *ffmt) { struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd); - struct v4l2_mbus_framefmt *actual_ffmt = -#ifndef ISP2401 - __csi2_get_format(csi2, cfg, which, pad); -#else - __csi2_get_format(csi2, cfg, which, pad); -#endif + struct v4l2_mbus_framefmt *actual_ffmt = __csi2_get_format(csi2, cfg, which, pad); if (pad == CSI2_PAD_SINK) { const struct atomisp_in_fmt_conv *ic; @@ -119,12 +114,7 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, } /* FIXME: DPCM decompression */ - *actual_ffmt = *ffmt = -#ifndef ISP2401 - *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); -#else - *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); -#endif + *actual_ffmt = *ffmt = *__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK); return 0; } @@ -181,9 +171,6 @@ static const struct v4l2_subdev_ops csi2_ops = { .pad = &csi2_pad_ops, }; -#ifndef ISP2401 - -#endif /* * csi2_link_setup - Setup CSI2 connections. * @entity : Pointer to media entity structure @@ -417,9 +404,6 @@ void atomisp_mipi_csi2_cleanup(struct atomisp_device *isp) { } -#ifndef ISP2401 - -#endif int atomisp_mipi_csi2_init(struct atomisp_device *isp) { struct atomisp_mipi_csi2_device *csi2_port; -- GitLab From 7ef17aa55fc381a6f3280203cd85175cb14b631f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 14:28:47 +0200 Subject: [PATCH 402/503] media: atomisp: atomisp_compat_css20.c: detect ISP at runtime Remove ifdefs that check ISP version from the code, switching to specific ISP-dependent code at runtime. Signed-off-by: Mauro Carvalho Chehab --- .../pci/atomisp2/atomisp_compat_css20.c | 73 +++++++++---------- 1 file changed, 36 insertions(+), 37 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c index fe094dec8e03d..6d63da0aaec0c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c @@ -647,18 +647,15 @@ static void __apply_additional_pipe_config( if (stream_env->pipe_configs[pipe_id]. default_capture_config.mode == CSS_CAPTURE_MODE_RAW) stream_env->pipe_configs[pipe_id].enable_dz = false; -#ifdef ISP2401 - - /* the isp default to use ISP2.2 and the camera hal will - * control whether use isp2.7 */ - if (asd->select_isp_version->val == - ATOMISP_CSS_ISP_PIPE_VERSION_2_7) - stream_env->pipe_configs[pipe_id].isp_pipe_version = - SH_CSS_ISP_PIPE_VERSION_2_7; - else - stream_env->pipe_configs[pipe_id].isp_pipe_version = - SH_CSS_ISP_PIPE_VERSION_2_2; -#endif + + if (atomisp_hw_is_isp2401) { + /* the isp default to use ISP2.2 and the camera hal will + * control whether use isp2.7 */ + if (asd->select_isp_version->val == ATOMISP_CSS_ISP_PIPE_VERSION_2_7) + stream_env->pipe_configs[pipe_id].isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_2_7; + else + stream_env->pipe_configs[pipe_id].isp_pipe_version = SH_CSS_ISP_PIPE_VERSION_2_2; + } break; case IA_CSS_PIPE_ID_VIDEO: /* enable reduced pipe to have binary @@ -3300,10 +3297,9 @@ int atomisp_css_offline_capture_configure(struct atomisp_sub_device *asd, { enum ia_css_err ret; -#ifdef ISP2401 dev_dbg(asd->isp->dev, "%s num_capture:%d skip:%d offset:%d\n", __func__, num_captures, skip, offset); -#endif + ret = ia_css_stream_capture( asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream, num_captures, skip, offset); @@ -4478,9 +4474,7 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, enum atomisp_input_stream_id stream_id = 0; struct atomisp_css_event current_event; struct atomisp_sub_device *asd; -#ifndef ISP2401 bool reset_wdt_timer[MAX_STREAM_NUM] = {false}; -#endif int i; while (!atomisp_css_dequeue_event(¤t_event)) { @@ -4497,11 +4491,12 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, current_event.event.fw_assert_line_no); for (i = 0; i < isp->num_of_streams; i++) atomisp_wdt_stop(&isp->asd[i], 0); -#ifndef ISP2401 - atomisp_wdt(&isp->asd[0].wdt); -#else - queue_work(isp->wdt_work_queue, &isp->wdt_work); -#endif + + if (!atomisp_hw_is_isp2401) + atomisp_wdt(&isp->asd[0].wdt); + else + queue_work(isp->wdt_work_queue, &isp->wdt_work); + return -EINVAL; } else if (current_event.event.type == IA_CSS_EVENT_TYPE_FW_WARNING) { dev_warn(isp->dev, "%s: ISP reports warning, code is %d, exp_id %d\n", @@ -4529,17 +4524,19 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, frame_done_found[asd->index] = true; atomisp_buf_done(asd, 0, CSS_BUFFER_TYPE_OUTPUT_FRAME, current_event.pipe, true, stream_id); -#ifndef ISP2401 - reset_wdt_timer[asd->index] = true; /* ISP running */ -#endif + + if (!atomisp_hw_is_isp2401) + reset_wdt_timer[asd->index] = true; /* ISP running */ + break; case CSS_EVENT_SEC_OUTPUT_FRAME_DONE: frame_done_found[asd->index] = true; atomisp_buf_done(asd, 0, CSS_BUFFER_TYPE_SEC_OUTPUT_FRAME, current_event.pipe, true, stream_id); -#ifndef ISP2401 - reset_wdt_timer[asd->index] = true; /* ISP running */ -#endif + + if (!atomisp_hw_is_isp2401) + reset_wdt_timer[asd->index] = true; /* ISP running */ + break; case CSS_EVENT_3A_STATISTICS_DONE: atomisp_buf_done(asd, 0, @@ -4557,17 +4554,18 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, atomisp_buf_done(asd, 0, CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, current_event.pipe, true, stream_id); -#ifndef ISP2401 - reset_wdt_timer[asd->index] = true; /* ISP running */ -#endif + + if (!atomisp_hw_is_isp2401) + reset_wdt_timer[asd->index] = true; /* ISP running */ + break; case CSS_EVENT_SEC_VF_OUTPUT_FRAME_DONE: atomisp_buf_done(asd, 0, CSS_BUFFER_TYPE_SEC_VF_OUTPUT_FRAME, current_event.pipe, true, stream_id); -#ifndef ISP2401 - reset_wdt_timer[asd->index] = true; /* ISP running */ -#endif + if (!atomisp_hw_is_isp2401) + reset_wdt_timer[asd->index] = true; /* ISP running */ + break; case CSS_EVENT_DIS_STATISTICS_DONE: atomisp_buf_done(asd, 0, @@ -4587,9 +4585,11 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, break; } } -#ifndef ISP2401 - /* If there are no buffers queued then - * delete wdt timer. */ + + if (!atomisp_hw_is_isp2401) + return 0; + + /* ISP2401: If there are no buffers queued then delete wdt timer. */ for (i = 0; i < isp->num_of_streams; i++) { asd = &isp->asd[i]; if (!asd) @@ -4603,7 +4603,6 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, atomisp_wdt_refresh(asd, ATOMISP_WDT_KEEP_CURRENT_DELAY); } -#endif return 0; } -- GitLab From 483f5215a2f48e500717862f9dbb18823221894e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 14:33:07 +0200 Subject: [PATCH 403/503] media: atomisp: atomisp_compat_ioctl32.c: be independent of ISP version There are two ioctls that are only available with ISP2401. Yet, at the compat level, we don't really need to take care, as the native ioctl handler will already return an error code if the ioctl doesn't exist. So, let's just remove the ifdefs here. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c index 8a630b0d070f2..3079043f1fac0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c @@ -1131,10 +1131,8 @@ long atomisp_compat_ioctl32(struct file *file, case ATOMISP_IOC_G_SENSOR_AE_BRACKETING_MODE: case ATOMISP_IOC_G_INVALID_FRAME_NUM: case ATOMISP_IOC_S_ARRAY_RESOLUTION: -#ifdef ISP2401 case ATOMISP_IOC_S_SENSOR_RUNMODE: case ATOMISP_IOC_G_UPDATE_EXPOSURE: -#endif ret = native_ioctl(file, cmd, arg); break; -- GitLab From ffa123612a13fb0e3cad765675f13943275171ff Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 22 Apr 2020 15:17:30 +0200 Subject: [PATCH 404/503] media: atomisp: sh_css_defs.h: get rid of build time dependencies There are several #ifdefs checking for ISP version there. Some of them are just two different ways to represent the same contants, while 3 parameters are actually different, depending on the ISP version. Change the header in a way that it will be compatible with both versions, and change dependent code to keep running, removing ifdefs there only when possible. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/atomisp_cmd.c | 28 +++++++--- .../pci/atomisp2/css2400/ia_css_pipe.h | 4 -- .../isp/kernels/sc/sc_1.0/ia_css_sc_param.h | 6 +-- .../isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c | 12 +---- .../kernels/tnr/tnr_1.0/ia_css_tnr_param.h | 8 --- .../css2400/isp/modes/interface/isp_const.h | 6 ++- .../runtime/binary/interface/ia_css_binary.h | 2 - .../css2400/runtime/binary/src/binary.c | 38 ++++++-------- .../css2400/runtime/debug/src/ia_css_debug.c | 4 -- .../atomisp/pci/atomisp2/css2400/sh_css.c | 10 ++-- .../pci/atomisp2/css2400/sh_css_defs.h | 51 ++++++------------- .../pci/atomisp2/css2400/sh_css_internal.h | 4 -- 12 files changed, 62 insertions(+), 111 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index 9bc899536cf73..4fc65c745fa59 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -3605,10 +3605,18 @@ int atomisp_cp_lsc_table(struct atomisp_sub_device *asd, } /* Shading table size per color */ - if (st->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - st->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { - dev_err(asd->isp->dev, "shading table w/h validate failed!"); - return -EINVAL; + if (!atomisp_hw_is_isp2401) { + if (st->width > ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + st->height > ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { + dev_err(asd->isp->dev, "shading table w/h validate failed!"); + return -EINVAL; + } + } else { + if (st->width > ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + st->height > ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) { + dev_err(asd->isp->dev, "shading table w/h validate failed!"); + return -EINVAL; + } } shading_table = atomisp_css_shading_table_alloc(st->width, st->height); @@ -6078,9 +6086,15 @@ int atomisp_set_shading_table(struct atomisp_sub_device *asd, } /* Shading table size per color */ - if (user_shading_table->width > SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || - user_shading_table->height > SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) - return -EINVAL; + if (!atomisp_hw_is_isp2401) { + if (user_shading_table->width > ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + user_shading_table->height > ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) + return -EINVAL; + } else { + if (user_shading_table->width > ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR || + user_shading_table->height > ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR) + return -EINVAL; + } shading_table = atomisp_css_shading_table_alloc( user_shading_table->width, user_shading_table->height); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h index fed632cef5a96..91653952f1a76 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h @@ -82,11 +82,7 @@ struct ia_css_video_settings { struct ia_css_binary vf_pp_binary; struct ia_css_binary *yuv_scaler_binary; struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; -#ifndef ISP2401 - struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; -#else struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; -#endif struct ia_css_frame *vf_pp_in_frame; struct ia_css_pipe *copy_pipe; struct ia_css_pipe *capture_pipe; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h index 85bc4f2c8d06f..cc44b6a57e968 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h @@ -17,7 +17,6 @@ #include "type_support.h" -#ifdef ISP2401 /* To position the shading center grid point on the center of output image, * one more grid cell is needed as margin. */ #define SH_CSS_SCTBL_CENTERING_MARGIN 1 @@ -25,6 +24,7 @@ /* The shading table width and height are the number of grids, not cells. The last grid should be counted. */ #define SH_CSS_SCTBL_LAST_GRID_COUNT 1 +#ifdef ISP2401 /* Number of horizontal grids per color in the shading table. */ #define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + \ @@ -34,6 +34,7 @@ #define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + \ SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) +#endif /* Legacy API: Number of horizontal grids per color in the shading table. */ #define _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ @@ -43,13 +44,11 @@ #define _ISP_SCTBL_LEGACY_HEIGHT(input_height, deci_factor_log2) \ (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) -#endif /* SC (Shading Corrction) */ struct sh_css_isp_sc_params { s32 gain_shift; }; -#ifdef ISP2401 /* Number of horizontal slice times for interpolated gain: * * The start position of the internal frame does not match the start position of the shading table. @@ -67,5 +66,4 @@ struct sh_css_isp_sc_isp_config { u32 internal_frame_origin_y_bqs_on_sctbl; }; -#endif #endif /* __IA_CSS_SC_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c index 519e33a055549..ecbd3042951a7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c @@ -83,11 +83,7 @@ ia_css_tnr_config( ia_css_dma_configure_from_info(&to->port_b, &from->tnr_frames[0]->info); to->width_a_over_b = elems_a / to->port_b.elems; to->frame_height = from->tnr_frames[0]->info.res.height; -#ifndef ISP2401 - for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { -#else for (i = 0; i < NUM_TNR_FRAMES; i++) { -#endif to->tnr_frame_addr[i] = from->tnr_frames[i]->data + from->tnr_frames[i]->planes.yuyv.offset; } @@ -104,11 +100,7 @@ ia_css_tnr_configure( struct ia_css_tnr_configuration config; unsigned int i; -#ifndef ISP2401 - for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) -#else for (i = 0; i < NUM_TNR_FRAMES; i++) -#endif config.tnr_frames[i] = frames[i]; ia_css_configure_tnr(binary, &config); @@ -121,9 +113,7 @@ ia_css_init_tnr_state( { (void)size; -#ifndef ISP2401 - assert(NUM_VIDEO_TNR_FRAMES >= 2); -#endif + assert(NUM_TNR_FRAMES >= 2); assert(sizeof(*state) == size); state->tnr_in_buf_idx = 0; state->tnr_out_buf_idx = 1; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h index 64eab3c8e5464..1973766d8e410 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h @@ -27,22 +27,14 @@ struct sh_css_isp_tnr_params { }; struct ia_css_tnr_configuration { -#ifndef ISP2401 - const struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; -#else const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; -#endif }; struct sh_css_isp_tnr_isp_config { u32 width_a_over_b; u32 frame_height; struct dma_port_config port_b; -#ifndef ISP2401 - hrt_vaddress tnr_frame_addr[NUM_VIDEO_TNR_FRAMES]; -#else hrt_vaddress tnr_frame_addr[NUM_TNR_FRAMES]; -#endif }; #endif /* __IA_CSS_TNR_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h index b1854fa85d618..b9a00894d3483 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h @@ -463,8 +463,10 @@ more details. /* [isp vmem] table size[vectors] per line per color (GR,R,B,GB), multiples of NWAY */ -#define SCTBL_VECTORS_PER_LINE_PER_COLOR \ - CEIL_DIV(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) +#define ISP2400_SCTBL_VECTORS_PER_LINE_PER_COLOR \ + CEIL_DIV(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) +#define ISP2401_SCTBL_VECTORS_PER_LINE_PER_COLOR \ + CEIL_DIV(ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) /* [isp vmem] table size[vectors] per line for 4colors (GR,R,B,GB), multiples of NWAY */ #define SCTBL_VECTORS_PER_LINE \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h index 17560e4abfb3f..ddc087c50ec5f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h @@ -145,10 +145,8 @@ struct ia_css_binary { int sctbl_width_per_color; int sctbl_aligned_width_per_color; int sctbl_height; -#ifdef ISP2401 int sctbl_legacy_width_per_color; int sctbl_legacy_height; -#endif struct ia_css_sdis_info dis; struct ia_css_resolution dvs_envelope; bool online; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c index 8f012aece09ce..f5282bb6ad6c7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c @@ -1360,34 +1360,28 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, if (info->enable.sc) { - binary->sctbl_width_per_color = -#ifndef ISP2401 - _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, - s3a_log_deci); -#else - _ISP_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); -#endif - binary->sctbl_aligned_width_per_color = - SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; - binary->sctbl_height = -#ifndef ISP2401 - _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); -#else - _ISP_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); - binary->sctbl_legacy_width_per_color = - _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); - binary->sctbl_legacy_height = - _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); + if (!atomisp_hw_is_isp2401) { + binary->sctbl_width_per_color = _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); + binary->sctbl_aligned_width_per_color = ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; + binary->sctbl_height = _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); + } else { + binary->sctbl_width_per_color = _ISP_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); + binary->sctbl_aligned_width_per_color = ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; + binary->sctbl_height = _ISP_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); +#ifdef ISP2401 + binary->sctbl_legacy_width_per_color = _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); + binary->sctbl_legacy_height = _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); #endif + } } else { binary->sctbl_width_per_color = 0; binary->sctbl_aligned_width_per_color = 0; binary->sctbl_height = 0; -#ifdef ISP2401 - binary->sctbl_legacy_width_per_color = 0; - binary->sctbl_legacy_height = 0; -#endif + if (atomisp_hw_is_isp2401) { + binary->sctbl_legacy_width_per_color = 0; + binary->sctbl_legacy_height = 0; + } } ia_css_sdis_init_info(&binary->dis, sc_3a_dis_width, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c index 88d43ce3f9703..c17e36dac8623 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c @@ -2945,11 +2945,7 @@ ia_css_debug_pipe_graph_dump_stage( "in", true); } -#ifndef ISP2401 - for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { -#else for (i = 0; i < NUM_TNR_FRAMES; i++) { -#endif if (stage->args.tnr_frames[i]) { ia_css_debug_pipe_graph_dump_frame( stage->args.tnr_frames[i], id, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index 91251faa9b49a..0427407ed911c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -1440,11 +1440,7 @@ void sh_css_binary_args_reset(struct sh_css_binary_args *args) { unsigned int i; -#ifndef ISP2401 - for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) -#else for (i = 0; i < NUM_TNR_FRAMES; i++) -#endif args->tnr_frames[i] = NULL; for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) args->delay_frames[i] = NULL; @@ -2581,7 +2577,7 @@ ia_css_pipe_destroy(struct ia_css_pipe *pipe) { } } #ifndef ISP2401 - ia_css_frame_free_multiple(NUM_VIDEO_TNR_FRAMES, + ia_css_frame_free_multiple(NUM_TNR_FRAMES, pipe->pipe_settings.video.tnr_frames); #else ia_css_frame_free_multiple(NUM_TNR_FRAMES, @@ -3805,7 +3801,7 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe) if (video_stage) { int frm; #ifndef ISP2401 - for (frm = 0; frm < NUM_VIDEO_TNR_FRAMES; frm++) { + for (frm = 0; frm < NUM_TNR_FRAMES; frm++) { #else for (frm = 0; frm < NUM_TNR_FRAMES; frm++) { #endif @@ -5986,7 +5982,7 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) tnr_info.raw_bit_depth = SH_CSS_TNR_BIT_DEPTH; #ifndef ISP2401 - for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { + for (i = 0; i < NUM_TNR_FRAMES; i++) { #else for (i = 0; i < NUM_TNR_FRAMES; i++) { #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h index c601745be2a6a..611a522eb6495 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h @@ -163,15 +163,6 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MIN_SENSOR_WIDTH 2 #define SH_CSS_MIN_SENSOR_HEIGHT 2 -#if defined(IS_ISP_2400_SYSTEM) -/* MAX width and height set to the same to allow for rotated - * resolutions. */ -#define SH_CSS_MAX_VF_WIDTH 1920 -#define SH_CSS_MAX_VF_HEIGHT 1920 -#else -#define SH_CSS_MAX_VF_WIDTH 1280 -#define SH_CSS_MAX_VF_HEIGHT 960 -#endif /* #define SH_CSS_MAX_VF_WIDTH_DEC 1920 #define SH_CSS_MAX_VF_HEIGHT_DEC 1080 @@ -186,34 +177,24 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] #define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \ (HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES) -#ifndef ISP2401 -#define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) -#define SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) -#else + +#define ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1) +#define ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1) + +#define ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ + CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) + /* TODO: I will move macros of "*_SCTBL_*" to SC kernel. "+ 2" should be "+ SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT". (michie, Sep/23/2014) */ -#define SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 2) -#define SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 2) -#endif -#define SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ - CEIL_MUL(SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) +#define ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 2) +#define ISP2401_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 2) + +#define ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR \ + CEIL_MUL(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS) /* Each line of this table is aligned to the maximum line width. */ #define SH_CSS_MAX_S3ATBL_WIDTH SH_CSS_MAX_BQ_GRID_WIDTH -#ifndef ISP2401 -/* The video binary supports a delay of 1 or 2 */ -#define MAX_DVS_FRAME_DELAY 2 -/* We always need one additional frame because the video binary - * reads the previous and writes the current frame concurrently */ -#define MAX_NUM_VIDEO_DELAY_FRAMES (MAX_DVS_FRAME_DELAY + 1) -#define NUM_VIDEO_TNR_FRAMES 2 - -#define NUM_TNR_FRAMES 2 /* FIXME */ - -#define MAX_NUM_DELAY_FRAMES MAX_NUM_VIDEO_DELAY_FRAMES - -#else /* Video mode specific DVS define */ /* The video binary supports a delay of 1 or 2 frames */ #define VIDEO_FRAME_DELAY 2 @@ -237,15 +218,14 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] */ #define NUM_VALID_TNR_REF_FRAMES (1) /* At least one valid TNR reference frame is required */ #define NUM_TNR_FRAMES_PER_REF_BUF_SET (2) - /* In luma-only mode alternate illuminated frames are supported, that requires two double buffers */ #define NUM_TNR_REF_BUF_SETS (1) #define NUM_TNR_FRAMES (NUM_TNR_FRAMES_PER_REF_BUF_SET * NUM_TNR_REF_BUF_SETS) -#define MAX_NUM_DELAY_FRAMES MAX(MAX_NUM_VIDEO_DELAY_FRAMES, NUM_PREVIEW_DVS_FRAMES) +#define NUM_VIDEO_TNR_FRAMES 2 -#endif +#define MAX_NUM_DELAY_FRAMES MAX(MAX_NUM_VIDEO_DELAY_FRAMES, NUM_PREVIEW_DVS_FRAMES) /* Note that this is the define used to configure all data structures common for all modes */ /* It should be equal or bigger to the max number of DVS frames for all possible modes */ @@ -272,7 +252,6 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] CEIL_MUL(_ISP_MORPH_TABLE_WIDTH(width), \ SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD) -#ifndef ISP2401 #define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + 1) #define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ @@ -281,7 +260,7 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] CEIL_MUL(_ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2), \ ISP_VEC_NELEMS) -#endif + /* ***************************************************************** * Statistics for 3A (Auto Focus, Auto White Balance, Auto Exposure) * *****************************************************************/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h index 84e8f1e5421c3..cef1caa264b49 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h @@ -285,11 +285,7 @@ struct sh_css_binary_args { struct ia_css_frame *in_frame; /* input frame */ struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ -#ifndef ISP2401 - struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES]; /* tnr frames */ -#else struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ -#endif struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ struct ia_css_frame *out_vf_frame; /* viewfinder output frame */ -- GitLab From 977e77c0b5c2fa1050a7307648ca1d208caed83c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 08:38:49 +0200 Subject: [PATCH 405/503] media: atomisp: make sh_css_struct.h independent of ISP version Use the same struct for both ISP2400 and ISP2401. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/css2400/sh_css_struct.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h index 482c99b14ba95..81b9598ef8b7d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h @@ -42,16 +42,17 @@ struct sh_css { struct ia_css_pipe *all_pipes[IA_CSS_PIPELINE_NUM_MAX]; void *(*malloc)(size_t bytes, bool zero_mem); void (*free)(void *ptr); -#ifdef ISP2401 + void (*flush)(struct ia_css_acc_fw *fw); + +/* ISP2401 */ void *(*malloc_ex)(size_t bytes, bool zero_mem, const char *caller_func, int caller_line); void (*free_ex)(void *ptr, const char *caller_func, int caller_line); -#endif - void (*flush)(struct ia_css_acc_fw *fw); - bool check_system_idle; -#ifndef ISP2401 + +/* ISP2400 */ bool stop_copy_preview; -#endif + + bool check_system_idle; unsigned int num_cont_raw_frames; #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) unsigned int num_mipi_frames[N_CSI_PORTS]; -- GitLab From 4f744a573db32b277fe55284b7bb70342522d464 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 09:11:01 +0200 Subject: [PATCH 406/503] media: atomisp: make sh_css_sp_init_pipeline() ISP version independent This function call has two parameters that are used only with ISP2401, enclosed on some ugly ifdefs. Make the function independent, passing NULL values for ISP2400. Signed-off-by: Mauro Carvalho Chehab --- .../pci/atomisp2/css2400/ia_css_pipe_public.h | 20 +-- .../css2400/runtime/pipeline/src/pipeline.c | 13 +- .../atomisp/pci/atomisp2/css2400/sh_css.c | 121 ++++++------------ .../pci/atomisp2/css2400/sh_css_internal.h | 30 +---- .../atomisp/pci/atomisp2/css2400/sh_css_sp.c | 41 +++--- .../atomisp/pci/atomisp2/css2400/sh_css_sp.h | 5 +- 6 files changed, 70 insertions(+), 160 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h index 4da21d87d0a64..54b66d19016f4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h @@ -80,22 +80,15 @@ struct ia_css_pipe_config { struct ia_css_resolution bayer_ds_out_res; /** bayer down scaling */ struct ia_css_resolution capt_pp_in_res; -#ifndef ISP2401 - /** bayer down scaling */ -#else /** capture post processing input resolution */ -#endif struct ia_css_resolution vf_pp_in_res; -#ifndef ISP2401 - /** bayer down scaling */ -#else - /** view finder post processing input resolution */ + + /** ISP2401: view finder post processing input resolution */ struct ia_css_resolution output_system_in_res; /** For IPU3 only: use output_system_in_res to specify what input resolution will OSYS receive, this resolution is equal to the output resolution of GDC if not determined CSS will set output_system_in_res with main osys output pin resolution All other IPUs may ignore this property */ -#endif struct ia_css_resolution dvs_crop_out_res; /** dvs crop, video only, not in use yet. Use dvs_envelope below. */ struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; @@ -128,28 +121,29 @@ struct ia_css_pipe_config { /** Enabling BCI mode will cause yuv_scale binary to be picked up instead of vf_pp. This only applies to viewfinder post processing stages. */ -#ifdef ISP2401 + +/* ISP2401 */ bool enable_luma_only; /** Enabling of monochrome mode for a pipeline. If enabled only luma processing will be done. */ bool enable_tnr; /** Enabling of TNR (temporal noise reduction). This is only applicable to video pipes. Non video-pipes should always set this parameter to false. */ -#endif + struct ia_css_isp_config *p_isp_config; /** Pointer to ISP configuration */ struct ia_css_resolution gdc_in_buffer_res; /** GDC in buffer resolution. */ struct ia_css_point gdc_in_buffer_offset; /** GDC in buffer offset - indicates the pixel coordinates of the first valid pixel inside the buffer */ -#ifdef ISP2401 + +/* ISP2401 */ struct ia_css_coordinate internal_frame_origin_bqs_on_sctbl; /** Origin of internal frame positioned on shading table at shading correction in ISP. NOTE: Shading table is larger than or equal to internal frame. Shading table has shading gains and internal frame has bayer data. The origin of internal frame is used in shading correction in ISP to retrieve shading gains which correspond to bayer data. */ -#endif }; /** diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c index 08386add94e01..f6f364ee78987 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c @@ -153,23 +153,12 @@ void ia_css_pipeline_start(enum ia_css_pipe_id pipe_id, sh_css_sp_init_pipeline(pipeline, pipe_id, pipe_num, false, false, false, true, SH_CSS_BDS_FACTOR_1_00, SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD, -#ifndef ISP2401 - IA_CSS_INPUT_MODE_MEMORY, NULL, NULL -#else IA_CSS_INPUT_MODE_MEMORY, NULL, NULL, -#endif #if !defined(HAS_NO_INPUT_SYSTEM) -#ifndef ISP2401 - , (enum mipi_port_id)0 -#else (enum mipi_port_id)0, #endif -#endif -#ifndef ISP2401 - ); -#else NULL, NULL); -#endif + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); if (!sh_css_sp_is_running()) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index 0427407ed911c..2fbd2bf703140 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -1458,6 +1458,9 @@ static void start_pipe( enum sh_css_pipe_config_override copy_ovrd, enum ia_css_input_mode input_mode) { + const struct ia_css_coordinate *coord = NULL; + const struct ia_css_isp_parameters *params = NULL; + #if defined(HAS_NO_INPUT_SYSTEM) (void)input_mode; #endif @@ -1467,6 +1470,11 @@ static void start_pipe( assert(me); /* all callers are in this file and call with non null argument */ + if (atomisp_hw_is_isp2401) { + coord = &me->config.internal_frame_origin_bqs_on_sctbl; + params = me->stream->isp_params_configs; + } + sh_css_sp_init_pipeline(&me->pipeline, me->mode, (uint8_t)ia_css_pipe_get_pipe_num(me), @@ -1482,13 +1490,10 @@ static void start_pipe( #if !defined(HAS_NO_INPUT_SYSTEM) , (input_mode == IA_CSS_INPUT_MODE_MEMORY) ? (enum mipi_port_id)0 : - me->stream->config.source.port.port -#endif -#ifdef ISP2401 - , &me->config.internal_frame_origin_bqs_on_sctbl, - me->stream->isp_params_configs + me->stream->config.source.port.port, #endif - ); + coord, + params); if (me->config.mode != IA_CSS_PIPE_MODE_COPY) { struct ia_css_pipeline_stage *stage; @@ -4094,6 +4099,8 @@ preview_start(struct ia_css_pipe *pipe) { struct ia_css_pipe *acc_pipe; enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode preview_pipe_input_mode; + const struct ia_css_coordinate *coord = NULL; + const struct ia_css_isp_parameters *params = NULL; IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW)) @@ -4120,8 +4127,10 @@ preview_start(struct ia_css_pipe *pipe) { #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) /* multi stream video needs mipi buffers */ err = send_mipi_frames(pipe); - if (err != IA_CSS_SUCCESS) - goto ERR; + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } #endif send_raw_frames(pipe); @@ -4139,6 +4148,11 @@ preview_start(struct ia_css_pipe *pipe) { } } + if (atomisp_hw_is_isp2401) { + coord = &pipe->config.internal_frame_origin_bqs_on_sctbl; + params = pipe->stream->isp_params_configs; + } + /* Construct and load the copy pipe */ if (pipe->stream->config.continuous) { @@ -4151,24 +4165,12 @@ preview_start(struct ia_css_pipe *pipe) { copy_ovrd, pipe->stream->config.mode, &pipe->stream->config.metadata_config, -#ifndef ISP2401 - &pipe->stream->info.metadata_info -#else &pipe->stream->info.metadata_info, -#endif #if !defined(HAS_NO_INPUT_SYSTEM) -#ifndef ISP2401 - , pipe->stream->config.source.port.port -#else pipe->stream->config.source.port.port, #endif -#endif -#ifndef ISP2401 - ); -#else - & pipe->config.internal_frame_origin_bqs_on_sctbl, - pipe->stream->isp_params_configs); -#endif + coord, + params); /* make the preview pipe start with mem mode input, copy handles the actual mode */ @@ -4189,24 +4191,12 @@ preview_start(struct ia_css_pipe *pipe) { 0, IA_CSS_INPUT_MODE_MEMORY, &pipe->stream->config.metadata_config, -#ifndef ISP2401 - &pipe->stream->info.metadata_info -#else &pipe->stream->info.metadata_info, -#endif #if !defined(HAS_NO_INPUT_SYSTEM) -#ifndef ISP2401 - , (enum mipi_port_id)0 -#else (enum mipi_port_id)0, #endif -#endif -#ifndef ISP2401 - ); -#else - & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, - capture_pipe->stream->isp_params_configs); -#endif + coord, + params); } if (acc_pipe) @@ -4222,31 +4212,16 @@ preview_start(struct ia_css_pipe *pipe) { 0, IA_CSS_INPUT_MODE_MEMORY, NULL, -#ifndef ISP2401 - NULL -#else NULL, -#endif #if !defined(HAS_NO_INPUT_SYSTEM) -#ifndef ISP2401 - , (enum mipi_port_id)0 -#else (enum mipi_port_id)0, #endif -#endif -#ifndef ISP2401 - ); -#else - & pipe->config.internal_frame_origin_bqs_on_sctbl, - pipe->stream->isp_params_configs); -#endif + coord, + params); } start_pipe(pipe, copy_ovrd, preview_pipe_input_mode); -#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) -ERR: -#endif IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } @@ -6038,6 +6013,9 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) enum sh_css_pipe_config_override copy_ovrd; enum ia_css_input_mode video_pipe_input_mode; + const struct ia_css_coordinate *coord = NULL; + const struct ia_css_isp_parameters *params = NULL; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); @@ -6075,6 +6053,11 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) } } + if (atomisp_hw_is_isp2401) { + coord = &pipe->config.internal_frame_origin_bqs_on_sctbl; + params = pipe->stream->isp_params_configs; + } + /* Construct and load the copy pipe */ if (pipe->stream->config.continuous) { sh_css_sp_init_pipeline(©_pipe->pipeline, @@ -6086,24 +6069,12 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) copy_ovrd, pipe->stream->config.mode, &pipe->stream->config.metadata_config, -#ifndef ISP2401 - &pipe->stream->info.metadata_info -#else &pipe->stream->info.metadata_info, -#endif #if !defined(HAS_NO_INPUT_SYSTEM) -#ifndef ISP2401 - , pipe->stream->config.source.port.port -#else pipe->stream->config.source.port.port, #endif -#endif -#ifndef ISP2401 - ); -#else - & copy_pipe->config.internal_frame_origin_bqs_on_sctbl, - copy_pipe->stream->isp_params_configs); -#endif + coord, + params); /* make the video pipe start with mem mode input, copy handles the actual mode */ @@ -6123,24 +6094,12 @@ static enum ia_css_err video_start(struct ia_css_pipe *pipe) 0, IA_CSS_INPUT_MODE_MEMORY, &pipe->stream->config.metadata_config, -#ifndef ISP2401 - &pipe->stream->info.metadata_info -#else &pipe->stream->info.metadata_info, -#endif #if !defined(HAS_NO_INPUT_SYSTEM) -#ifndef ISP2401 - , (enum mipi_port_id)0 -#else (enum mipi_port_id)0, #endif -#endif -#ifndef ISP2401 - ); -#else - & capture_pipe->config.internal_frame_origin_bqs_on_sctbl, - capture_pipe->stream->isp_params_configs); -#endif + coord, + params); } start_pipe(pipe, copy_ovrd, video_pipe_input_mode); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h index cef1caa264b49..d77601eb75ab6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h @@ -24,9 +24,7 @@ #if !defined(HAS_NO_INPUT_FORMATTER) #include "input_formatter.h" #endif -#if !defined(HAS_NO_INPUT_SYSTEM) #include "input_system.h" -#endif #include "ia_css_types.h" #include "ia_css_acc_types.h" @@ -387,9 +385,7 @@ struct sh_css_sp_input_formatter_set { }; #endif -#if !defined(HAS_NO_INPUT_SYSTEM) #define IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT (3) -#endif /* SP configuration information */ struct sh_css_sp_config { @@ -417,9 +413,7 @@ struct sh_css_sp_config { u8 input_circuit_cfg_changed; u32 mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT]; #endif -#if !defined(HAS_NO_INPUT_SYSTEM) u8 enable_isys_event_queue; -#endif u8 disable_cont_vf; }; @@ -535,10 +529,8 @@ struct sh_css_sp_pipeline { u32 inout_port_config; u32 required_bds_factor; u32 dvs_frame_delay; -#if !defined(HAS_NO_INPUT_SYSTEM) u32 input_system_mode; /* enum ia_css_input_mode */ u32 port_id; /* port_id for input system */ -#endif u32 num_stages; /* the pipe config */ u32 running; /* needed for pipe termination */ hrt_vaddress sp_stage_addr[SH_CSS_MAX_STAGES]; @@ -572,14 +564,14 @@ struct sh_css_sp_pipeline { u32 raw_bit_depth; } raw; } copy; -#ifdef ISP2401 + +/* ISP2401 */ /* Parameters passed to Shading Correction kernel. */ struct { u32 internal_frame_origin_x_bqs_on_sctbl; /* Origin X (bqs) of internal frame on shading table */ u32 internal_frame_origin_y_bqs_on_sctbl; /* Origin Y (bqs) of internal frame on shading table */ } shading; -#endif }; /* @@ -729,7 +721,6 @@ struct sh_css_sp_output { #define IA_CSS_NUM_ELEMS_HOST2SP_PARAM_QUEUE 3 #define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 6 -#if !defined(HAS_NO_INPUT_SYSTEM) /* sp-to-host queue is expected to be emptied in ISR since * it is used instead of HW interrupts (due to HW design issue). * We need one queue element per CSI port. */ @@ -738,11 +729,6 @@ struct sh_css_sp_output { * in the emptying of this queue in the SP since there is no * separate SP thread for this. */ #define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS) -#else -#define IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE 0 -#define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE 0 -#define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 0 -#endif #if defined(HAS_SP_2400) #define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 13 @@ -828,11 +814,9 @@ enum sh_css_queue_type { sh_css_sp2host_buffer_queue, sh_css_host2sp_psys_event_queue, sh_css_sp2host_psys_event_queue, -#if !defined(HAS_NO_INPUT_SYSTEM) sh_css_sp2host_isys_event_queue, sh_css_host2sp_isys_event_queue, sh_css_host2sp_tag_cmd_queue, -#endif }; struct sh_css_event_irq_mask { @@ -918,7 +902,6 @@ struct host_sp_queues { ia_css_circbuf_elem_t sp2host_psys_event_queue_elems [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE]; -#if !defined(HAS_NO_INPUT_SYSTEM) /* * The queues for the ISYS events. */ @@ -938,7 +921,6 @@ struct host_sp_queues { ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE]; -#endif }; #define SIZE_OF_QUEUES_ELEMS \ @@ -951,15 +933,7 @@ struct host_sp_queues { (IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE) + \ (IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE))) -#if !defined(HAS_NO_INPUT_SYSTEM) #define IA_CSS_NUM_CIRCBUF_DESCS 5 -#else -#ifndef ISP2401 -#define IA_CSS_NUM_CIRCBUF_DESCS 3 -#else -#define IA_CSS_NUM_CIRCBUF_DESCS 2 -#endif -#endif #define SIZE_OF_QUEUES_DESC \ ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c index 25c46265b70d4..b223a38942b15 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c @@ -1226,15 +1226,12 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, const struct ia_css_metadata_config *md_config, const struct ia_css_metadata_info *md_info, #if !defined(HAS_NO_INPUT_SYSTEM) - const enum mipi_port_id port_id + const enum mipi_port_id port_id, #endif -#ifdef ISP2401 - , const struct ia_css_coordinate *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame positioned on shading table at shading correction in ISP. */ const struct ia_css_isp_parameters *params -#endif ) { /* Get first stage */ struct ia_css_pipeline_stage *stage = NULL; @@ -1363,26 +1360,26 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, } #endif -#ifdef ISP2401 - /* For the shading correction type 1 (the legacy shading table conversion in css is not used), - * the parameters are passed to the isp for the shading table centering. - */ - if (internal_frame_origin_bqs_on_sctbl && - params && params->shading_settings.enable_shading_table_conversion == 0) - { - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl - = (uint32_t)internal_frame_origin_bqs_on_sctbl->y; - } else - { - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = - 0; - sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl = - 0; + if (atomisp_hw_is_isp2401) { + /* For the shading correction type 1 (the legacy shading table conversion in css is not used), + * the parameters are passed to the isp for the shading table centering. + */ + if (internal_frame_origin_bqs_on_sctbl && + params && params->shading_settings.enable_shading_table_conversion == 0) + { + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl + = (uint32_t)internal_frame_origin_bqs_on_sctbl->x; + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl + = (uint32_t)internal_frame_origin_bqs_on_sctbl->y; + } else + { + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl = + 0; + sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl = + 0; + } } -#endif IA_CSS_LOG("pipe_id %d port_config %08x", pipe_id, sh_css_sp_group.pipe[thread_id].inout_port_config); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h index 88d7d404cc7a4..7d4e13f1e038a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h @@ -66,15 +66,12 @@ sh_css_sp_init_pipeline(struct ia_css_pipeline *me, const struct ia_css_metadata_config *md_config, const struct ia_css_metadata_info *md_info, #if !defined(HAS_NO_INPUT_SYSTEM) - const enum mipi_port_id port_id + const enum mipi_port_id port_id, #endif -#ifdef ISP2401 - , const struct ia_css_coordinate *internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame positioned on shading table at shading correction in ISP. */ const struct ia_css_isp_parameters *params -#endif ); void -- GitLab From 6a2782c0b2a0a2ed1d877d3a708308b36496950c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 09:29:45 +0200 Subject: [PATCH 407/503] media: atomisp: remove ISP version macros from sh_css_legacy.h This header is really version-independent. So, just get rid of the macros from it. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/css2400/sh_css_legacy.h | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h index 110b2912042c5..99ac690ba7aa0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h @@ -31,18 +31,10 @@ enum ia_css_pipe_id { IA_CSS_PIPE_ID_VIDEO, IA_CSS_PIPE_ID_CAPTURE, IA_CSS_PIPE_ID_YUVPP, -#ifndef ISP2401 IA_CSS_PIPE_ID_ACC, IA_CSS_PIPE_ID_NUM -#else - IA_CSS_PIPE_ID_ACC -#endif }; -#ifdef ISP2401 -#define IA_CSS_PIPE_ID_NUM (IA_CSS_PIPE_ID_ACC + 1) -#endif - struct ia_css_pipe_extra_config { bool enable_raw_binning; bool enable_yuv_ds; @@ -71,9 +63,8 @@ enum ia_css_err sh_css_set_black_frame(struct ia_css_stream *stream, const struct ia_css_frame *raw_black_frame); -#ifndef ISP2401 +/* ISP2400 */ void sh_css_enable_cont_capt(bool enable, bool stop_copy_preview); -#endif #endif /* _SH_CSS_LEGACY_H_ */ -- GitLab From 5e0947450d16de5fd59fa43d04a53c5df037d54b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 09:29:54 +0200 Subject: [PATCH 408/503] media: atomisp: remove table duplication from dfs tables The way atomisp_dfs_tables.h is defined, it ends by duplicating all data structs there on both atomisp_v4l2.c and atomisp_cmd.c. Change the logic in order to place the definitions only on a single place. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/atomisp_dfs_tables.h | 369 +---------------- .../media/atomisp/pci/atomisp2/atomisp_v4l2.c | 370 ++++++++++++++++++ 2 files changed, 371 insertions(+), 368 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h index f5e16e968cd31..9680f211d424b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h @@ -35,373 +35,6 @@ struct atomisp_dfs_config { unsigned int dfs_table_size; }; -static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = { - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_PREVIEW, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_457MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, -}; - -/* Merrifield and Moorefield DFS rules */ -static const struct atomisp_dfs_config dfs_config_merr = { - .lowest_freq = ISP_FREQ_200MHZ, - .max_freq_at_vmin = ISP_FREQ_400MHZ, - .highest_freq = ISP_FREQ_457MHZ, - .dfs_table = dfs_rules_merr, - .dfs_table_size = ARRAY_SIZE(dfs_rules_merr), -}; - -static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = { - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_PREVIEW, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, -}; - -static const struct atomisp_dfs_config dfs_config_merr_1179 = { - .lowest_freq = ISP_FREQ_200MHZ, - .max_freq_at_vmin = ISP_FREQ_400MHZ, - .highest_freq = ISP_FREQ_400MHZ, - .dfs_table = dfs_rules_merr_1179, - .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179), -}; - -static struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { - { - .width = 1920, - .height = 1080, - .fps = 30, - .isp_freq = ISP_FREQ_266MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = 1080, - .height = 1920, - .fps = 30, - /* - * FIXME: this is weird, but .isp_freq depends on - * the chip being ISP2400 or ISP2401. So, this should be - * initialized on runtime. - */ - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = 1920, - .height = 1080, - .fps = 45, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = 1080, - .height = 1920, - .fps = 45, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = 60, - .isp_freq = ISP_FREQ_356MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_200MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_200MHZ, - .run_mode = ATOMISP_RUN_MODE_PREVIEW, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, -}; - -static struct atomisp_dfs_config dfs_config_merr_117a = { - .lowest_freq = ISP_FREQ_200MHZ, - .max_freq_at_vmin = ISP_FREQ_200MHZ, - .highest_freq = ISP_FREQ_400MHZ, - .dfs_table = dfs_rules_merr_117a, - .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a), -}; - -static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = { - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_PREVIEW, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_400MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, -}; - -static const struct atomisp_dfs_config dfs_config_byt = { - .lowest_freq = ISP_FREQ_200MHZ, - .max_freq_at_vmin = ISP_FREQ_400MHZ, - .highest_freq = ISP_FREQ_400MHZ, - .dfs_table = dfs_rules_byt, - .dfs_table_size = ARRAY_SIZE(dfs_rules_byt), -}; - -static const struct atomisp_freq_scaling_rule dfs_rules_byt_cr[] = { - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_PREVIEW, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, -}; - -static const struct atomisp_dfs_config dfs_config_byt_cr = { - .lowest_freq = ISP_FREQ_200MHZ, - .max_freq_at_vmin = ISP_FREQ_320MHZ, - .highest_freq = ISP_FREQ_320MHZ, - .dfs_table = dfs_rules_byt_cr, - .dfs_table_size = ARRAY_SIZE(dfs_rules_byt_cr), -}; - -static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = { - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_356MHZ, - .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_PREVIEW, - }, - { - .width = 1280, - .height = 720, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_356MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, -}; - -static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = { - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_356MHZ, - .run_mode = ATOMISP_RUN_MODE_VIDEO, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_356MHZ, - .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_320MHZ, - .run_mode = ATOMISP_RUN_MODE_PREVIEW, - }, - { - .width = ISP_FREQ_RULE_ANY, - .height = ISP_FREQ_RULE_ANY, - .fps = ISP_FREQ_RULE_ANY, - .isp_freq = ISP_FREQ_356MHZ, - .run_mode = ATOMISP_RUN_MODE_SDV, - }, -}; - -static const struct atomisp_dfs_config dfs_config_cht = { - .lowest_freq = ISP_FREQ_100MHZ, - .max_freq_at_vmin = ISP_FREQ_356MHZ, - .highest_freq = ISP_FREQ_356MHZ, - .dfs_table = dfs_rules_cht, - .dfs_table_size = ARRAY_SIZE(dfs_rules_cht), -}; - -static const struct atomisp_dfs_config dfs_config_cht_soc = { - .lowest_freq = ISP_FREQ_100MHZ, - .max_freq_at_vmin = ISP_FREQ_356MHZ, - .highest_freq = ISP_FREQ_356MHZ, - .dfs_table = dfs_rules_cht_soc, - .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc), -}; +extern const struct atomisp_dfs_config dfs_config_cht_soc; #endif /* __ATOMISP_DFS_TABLES_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index ef7a83c5f4593..87736e7a5ea93 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -124,6 +124,376 @@ struct device *atomisp_dev; void __iomem *atomisp_io_base; +static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_457MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +/* Merrifield and Moorefield DFS rules */ +static const struct atomisp_dfs_config dfs_config_merr = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_400MHZ, + .highest_freq = ISP_FREQ_457MHZ, + .dfs_table = dfs_rules_merr, + .dfs_table_size = ARRAY_SIZE(dfs_rules_merr), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_merr_1179 = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_400MHZ, + .highest_freq = ISP_FREQ_400MHZ, + .dfs_table = dfs_rules_merr_1179, + .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179), +}; + +static struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { + { + .width = 1920, + .height = 1080, + .fps = 30, + .isp_freq = ISP_FREQ_266MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = 1080, + .height = 1920, + .fps = 30, + /* + * FIXME: this is weird, but .isp_freq depends on + * the chip being ISP2400 or ISP2401. So, this should be + * initialized on runtime. + */ + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = 1920, + .height = 1080, + .fps = 45, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = 1080, + .height = 1920, + .fps = 45, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = 60, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_200MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_200MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static struct atomisp_dfs_config dfs_config_merr_117a = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_200MHZ, + .highest_freq = ISP_FREQ_400MHZ, + .dfs_table = dfs_rules_merr_117a, + .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_400MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_byt = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_400MHZ, + .highest_freq = ISP_FREQ_400MHZ, + .dfs_table = dfs_rules_byt, + .dfs_table_size = ARRAY_SIZE(dfs_rules_byt), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_byt_cr[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_byt_cr = { + .lowest_freq = ISP_FREQ_200MHZ, + .max_freq_at_vmin = ISP_FREQ_320MHZ, + .highest_freq = ISP_FREQ_320MHZ, + .dfs_table = dfs_rules_byt_cr, + .dfs_table_size = ARRAY_SIZE(dfs_rules_byt_cr), +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = 1280, + .height = 720, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = { + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_VIDEO, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_320MHZ, + .run_mode = ATOMISP_RUN_MODE_PREVIEW, + }, + { + .width = ISP_FREQ_RULE_ANY, + .height = ISP_FREQ_RULE_ANY, + .fps = ISP_FREQ_RULE_ANY, + .isp_freq = ISP_FREQ_356MHZ, + .run_mode = ATOMISP_RUN_MODE_SDV, + }, +}; + +static const struct atomisp_dfs_config dfs_config_cht = { + .lowest_freq = ISP_FREQ_100MHZ, + .max_freq_at_vmin = ISP_FREQ_356MHZ, + .highest_freq = ISP_FREQ_356MHZ, + .dfs_table = dfs_rules_cht, + .dfs_table_size = ARRAY_SIZE(dfs_rules_cht), +}; + +/* This one should be visible also by atomisp_cmd.c */ +const struct atomisp_dfs_config dfs_config_cht_soc = { + .lowest_freq = ISP_FREQ_100MHZ, + .max_freq_at_vmin = ISP_FREQ_356MHZ, + .highest_freq = ISP_FREQ_356MHZ, + .dfs_table = dfs_rules_cht_soc, + .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc), +}; + int atomisp_video_init(struct atomisp_video_pipe *video, const char *name) { int ret; -- GitLab From 19801a18a0c751f569a518d1cab8fe9b9a04cdda Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 09:37:27 +0200 Subject: [PATCH 409/503] media: atomisp: unify sh_css_params_shading_id_table_generate() Instead of packing parameters differently on ISP2400 and ISP2401, use just one way of passing them for both. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp2/css2400/sh_css_param_shading.c | 27 ++----------------- .../atomisp2/css2400/sh_css_param_shading.h | 4 --- .../pci/atomisp2/css2400/sh_css_params.c | 15 +++-------- 3 files changed, 6 insertions(+), 40 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c index 1d3129dd8feda..4b648df2d0734 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c @@ -199,30 +199,15 @@ crop_and_interpolate(unsigned int cropped_width, void sh_css_params_shading_id_table_generate( struct ia_css_shading_table **target_table, -#ifndef ISP2401 - const struct ia_css_binary *binary) -#else unsigned int table_width, unsigned int table_height) -#endif { /* initialize table with ones, shift becomes zero */ -#ifndef ISP2401 - unsigned int i, j, table_width, table_height; -#else unsigned int i, j; -#endif struct ia_css_shading_table *result; assert(target_table); -#ifndef ISP2401 - assert(binary); -#endif -#ifndef ISP2401 - table_width = binary->sctbl_width_per_color; - table_height = binary->sctbl_height; -#endif result = ia_css_shading_table_alloc(table_width, table_height); if (!result) { *target_table = NULL; @@ -262,12 +247,9 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, assert(binary); if (!in_table) { -#ifndef ISP2401 - sh_css_params_shading_id_table_generate(target_table, binary); -#else sh_css_params_shading_id_table_generate(target_table, - binary->sctbl_legacy_width_per_color, binary->sctbl_legacy_height); -#endif + binary->sctbl_legacy_width_per_color, + binary->sctbl_legacy_height); return; } @@ -332,15 +314,10 @@ prepare_shading_table(const struct ia_css_shading_table *in_table, input_width = min(input_width, in_table->sensor_width); input_height = min(input_height, in_table->sensor_height); -#ifndef ISP2401 - table_width = binary->sctbl_width_per_color; - table_height = binary->sctbl_height; -#else /* This prepare_shading_table() function is called only in legacy API (not in new API). Then, the legacy shading table width and height should be used. */ table_width = binary->sctbl_legacy_width_per_color; table_height = binary->sctbl_legacy_height; -#endif result = ia_css_shading_table_alloc(table_width, table_height); if (!result) { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h index 3b044acb2a73f..6e480d31c2012 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h @@ -21,12 +21,8 @@ void sh_css_params_shading_id_table_generate( struct ia_css_shading_table **target_table, -#ifndef ISP2401 - const struct ia_css_binary *binary); -#else unsigned int table_width, unsigned int table_height); -#endif void prepare_shading_table(const struct ia_css_shading_table *in_table, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c index 7dd82fa322354..224274c61a3d2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c @@ -4078,12 +4078,9 @@ sh_css_params_write_to_ddr_internal( ia_css_shading_table_free(params->sc_config); params->sc_config = NULL; } -#ifndef ISP2401 - sh_css_params_shading_id_table_generate(¶ms->sc_config, binary); -#else sh_css_params_shading_id_table_generate(¶ms->sc_config, - binary->sctbl_width_per_color, binary->sctbl_height); -#endif + binary->sctbl_width_per_color, + binary->sctbl_height); if (!params->sc_config) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -4450,13 +4447,9 @@ struct ia_css_shading_table *ia_css_get_shading_table(struct ia_css_stream ia_css_shading_table_free(params->sc_config); params->sc_config = NULL; } -#ifndef ISP2401 - sh_css_params_shading_id_table_generate(¶ms->sc_config, binary); - -#else sh_css_params_shading_id_table_generate(¶ms->sc_config, - binary->sctbl_width_per_color, binary->sctbl_height); -#endif + binary->sctbl_width_per_color, + binary->sctbl_height); table = params->sc_config; /* The sc_config will be freed in the * ia_css_stream_isp_parameters_uninit function. */ -- GitLab From 1e972929f055db297cc6b76515a32682a2e6dc39 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 09:41:01 +0200 Subject: [PATCH 410/503] media: atomisp: sh_css_param_dvs.h remove ISP version macros As namespaces aren't duplicated here, just remove the ifdefs. Signed-off-by: Mauro Carvalho Chehab --- .../pci/atomisp2/css2400/sh_css_param_dvs.h | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h index 89ae14b963cc6..b4cffbbdafde0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h @@ -17,9 +17,7 @@ #include #include -#ifdef ISP2401 #include -#endif #include "gdc_global.h" /* gdc_warp_param_mem_t */ #define DVS_ENV_MIN_X (12) @@ -29,16 +27,16 @@ #define DVS_BLOCKDIM_Y_LUMA (64) /* Y block height*/ #define DVS_BLOCKDIM_Y_CHROMA (32) /* UV height block size is half the Y block height*/ -#ifndef ISP2401 +/* ISP2400 */ /* horizontal 64x64 blocks round up to DVS_BLOCKDIM_X, make even */ #define DVS_NUM_BLOCKS_X(X) (CEIL_MUL(CEIL_DIV((X), DVS_BLOCKDIM_X), 2)) +/* ISP2400 */ /* vertical 64x64 blocks round up to DVS_BLOCKDIM_Y */ #define DVS_NUM_BLOCKS_Y(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_LUMA)) #define DVS_NUM_BLOCKS_X_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_X)) #define DVS_NUM_BLOCKS_Y_CHROMA(X) (CEIL_DIV((X), DVS_BLOCKDIM_Y_CHROMA)) -#endif #define DVS_TABLE_IN_BLOCKDIM_X_LUMA(X) (DVS_NUM_BLOCKS_X(X) + 1) /* N blocks have N + 1 set of coords */ #define DVS_TABLE_IN_BLOCKDIM_X_CHROMA(X) (DVS_NUM_BLOCKS_X_CHROMA(X) + 1) #define DVS_TABLE_IN_BLOCKDIM_Y_LUMA(X) (DVS_NUM_BLOCKS_Y(X) + 1) @@ -48,9 +46,10 @@ #define DVS_ENVELOPE_Y(X) (((X) == 0) ? (DVS_ENV_MIN_Y) : (X)) #define DVS_COORD_FRAC_BITS (10) -#ifndef ISP2401 + +/* ISP2400 */ #define DVS_INPUT_BYTES_PER_PIXEL (1) -#endif + #define XMEM_ALIGN_LOG2 (5) #define DVS_6AXIS_COORDS_ELEMS CEIL_MUL(sizeof(gdc_warp_param_mem_t) \ @@ -62,12 +61,12 @@ * DVS_NUM_BLOCKS_X((binary)->out_frame_info[0].res.width) \ * DVS_NUM_BLOCKS_Y((binary)->out_frame_info[0].res.height)) -#ifndef ISP2401 -/* Bilinear interpolation (HRT_GDC_BLI_MODE) is the supported method currently. +/* + * ISP2400: + * Bilinear interpolation (HRT_GDC_BLI_MODE) is the supported method currently. * Bicubic interpolation (HRT_GDC_BCI_MODE) is not supported yet */ #define DVS_GDC_INTERP_METHOD HRT_GDC_BLI_MODE -#endif struct ia_css_dvs_6axis_config * generate_dvs_6axis_table(const struct ia_css_resolution *frame_res, const struct ia_css_resolution *dvs_offset); -- GitLab From fe670b2a79b8f676f3a01771e8a79a7e37fa51a5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 23 Apr 2020 09:47:26 +0200 Subject: [PATCH 411/503] media: atomisp: print css_version in runtime The CSS version returned by ISP2400 is different than the one returned by ISP2401. While we could return just one version for both, as this sounds like just an informative string, for now, let's keep returning different versions, as we don't know if this would affect userspace. Signed-off-by: Mauro Carvalho Chehab --- .../pci/atomisp2/css2400/ia_css_version_data.h | 7 ++----- .../atomisp/pci/atomisp2/css2400/sh_css_version.c | 12 ++++++++++-- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h index 8fb8c045f2927..f630fa5d55cc9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h @@ -21,10 +21,7 @@ #ifndef __IA_CSS_VERSION_DATA_H #define __IA_CSS_VERSION_DATA_H -#ifndef ISP2401 -#define CSS_VERSION_STRING "REL:20150521_21.4_0539; API:2.1.15.3; GIT:irci_candrpv_0415_20150504_35b345#35b345be52ac575f8934abb3a88fea26a94e7343; SDK:/nfs/iir/disks/iir_hivepackages_003/iir_hivepkgs_disk017/Css_Mizuchi/packages/Css_Mizuchi/int_css_mizuchi_20140829_1053; USER:viedifw; " -#else -#define CSS_VERSION_STRING "REL:20150911_37.5_1652; API:2.1.20.9; GIT:irci___#ebf437d53a8951bb7ff6d13fdb7270dab393a92a; SDK:; USER:viedifw; " -#endif +#define ISP2400_CSS_VERSION_STRING "REL:20150521_21.4_0539; API:2.1.15.3; GIT:irci_candrpv_0415_20150504_35b345#35b345be52ac575f8934abb3a88fea26a94e7343; SDK:/nfs/iir/disks/iir_hivepackages_003/iir_hivepkgs_disk017/Css_Mizuchi/packages/Css_Mizuchi/int_css_mizuchi_20140829_1053; USER:viedifw; " +#define ISP2401_CSS_VERSION_STRING "REL:20150911_37.5_1652; API:2.1.20.9; GIT:irci___#ebf437d53a8951bb7ff6d13fdb7270dab393a92a; SDK:; USER:viedifw; " #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c index 3c7cadd837da8..eb986e15c7fa9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c @@ -12,6 +12,7 @@ * more details. */ +#include "../../include/linux/atomisp.h" #include "ia_css_version.h" #include "ia_css_version_data.h" #include "ia_css_err.h" @@ -19,9 +20,16 @@ enum ia_css_err ia_css_get_version(char *version, int max_size) { - if (max_size <= (int)strlen(CSS_VERSION_STRING) + (int)strlen(sh_css_get_fw_version()) + 5) + char *css_version; + + if (!atomisp_hw_is_isp2401) + css_version = ISP2400_CSS_VERSION_STRING; + else + css_version = ISP2401_CSS_VERSION_STRING; + + if (max_size <= (int)strlen(css_version) + (int)strlen(sh_css_get_fw_version()) + 5) return IA_CSS_ERR_INVALID_ARGUMENTS; - strcpy(version, CSS_VERSION_STRING); + strcpy(version, css_version); strcat(version, "FW:"); strcat(version, sh_css_get_fw_version()); strcat(version, "; "); -- GitLab From 1c874c13cd54448f9af7ccfd59ca7e03f49f66ac Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 25 Apr 2020 13:39:24 +0200 Subject: [PATCH 412/503] media: atomisp: add support for possible new names This patch addresses what it sounds to be a change at the name of some ACPI registers on newer ACPI tables. Signed-off-by: Mauro Carvalho Chehab --- .../platform/intel-mid/atomisp_gmin_platform.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index 4f1500ef0990c..eef7123a586f1 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -394,6 +394,17 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A"); gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B"); + /* + * Based on DTST dumps on newer Atom E3800 devices, it seems that + * the regulators data now have new names. + */ + if (IS_ERR(gmin_subdevs[i].v1p8_reg)) + gmin_subdevs[i].v1p8_reg = regulator_get(dev, "Regulator1p8v"); + + if (IS_ERR(gmin_subdevs[i].v2p8_reg)) + gmin_subdevs[i].v2p8_reg = regulator_get(dev, "Regulator2p8v"); + + /* Note: ideally we would initialize v[12]p8_on to the * output of regulator_is_enabled(), but sadly that * API is broken with the current drivers, returning -- GitLab From bd3016e92455a3b07ecf73399a1e7864bc05a307 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 26 Apr 2020 12:06:20 +0200 Subject: [PATCH 413/503] media: atomisp: css_trace.h: use the newest tracing code The css_trace header for ISP2401 also builds on older versions, and seems to be compatible with all versions. So, remove all ifdefs in favor of the CSP2401 version. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/css2400/css_trace.h | 108 ------------------ 1 file changed, 108 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h index 1b0854c1f77de..32520c21c324a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h @@ -16,9 +16,7 @@ #define __CSS_TRACE_H_ #include -#ifdef ISP2401 #include "sh_css_internal.h" /* for SH_CSS_MAX_SP_THREADS */ -#endif /* structs and constants for tracing @@ -31,48 +29,31 @@ struct trace_item_t { u16 counter; }; -#ifdef ISP2401 #define MAX_SCRATCH_DATA 4 #define MAX_CMD_DATA 2 -#endif /* trace header: holds the version and the topology of the tracer. */ struct trace_header_t { -#ifndef ISP2401 - /* 1st dword */ -#else /* 1st dword: descriptor */ -#endif u8 version; u8 max_threads; u16 max_tracer_points; -#ifdef ISP2401 /* 2nd field: command + data */ -#endif /* 2nd dword */ u32 command; /* 3rd & 4th dword */ -#ifndef ISP2401 - u32 data[2]; -#else u32 data[MAX_CMD_DATA]; /* 3rd field: debug pointer */ -#endif /* 5th & 6th dword: debug pointer mechanism */ u32 debug_ptr_signature; u32 debug_ptr_value; -#ifdef ISP2401 /* Rest of the header: status & scratch data */ u8 thr_status_byte[SH_CSS_MAX_SP_THREADS]; u16 thr_status_word[SH_CSS_MAX_SP_THREADS]; u32 thr_status_dword[SH_CSS_MAX_SP_THREADS]; u32 scratch_debug[MAX_SCRATCH_DATA]; -#endif }; -#ifndef ISP2401 -#define TRACER_VER 2 -#else /* offsets for master_port read/write */ #define HDR_HDR_OFFSET 0 /* offset of the header */ #define HDR_COMMAND_OFFSET offsetof(struct trace_header_t, command) @@ -94,7 +75,6 @@ Trace version history: */ #define TRACER_VER 4 -#endif #define TRACE_BUFF_ADDR 0xA000 #define TRACE_BUFF_SIZE 0x1000 /* 4K allocated */ @@ -102,40 +82,20 @@ Trace version history: #define TRACE_ENABLE_SP1 0 #define TRACE_ENABLE_ISP 0 -#ifndef ISP2401 -typedef enum { -#else enum TRACE_CORE_ID { -#endif TRACE_SP0_ID, TRACE_SP1_ID, TRACE_ISP_ID -#ifndef ISP2401 -} TRACE_CORE_ID; -#else }; -#endif /* TODO: add timing format? */ -#ifndef ISP2401 -typedef enum { - TRACE_DUMP_FORMAT_POINT, - TRACE_DUMP_FORMAT_VALUE24_HEX, - TRACE_DUMP_FORMAT_VALUE24_DEC, -#else enum TRACE_DUMP_FORMAT { TRACE_DUMP_FORMAT_POINT_NO_TID, TRACE_DUMP_FORMAT_VALUE24, -#endif TRACE_DUMP_FORMAT_VALUE24_TIMING, -#ifndef ISP2401 - TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA -} TRACE_DUMP_FORMAT; -#else TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA, TRACE_DUMP_FORMAT_POINT }; -#endif /* currently divided as follows:*/ #if (TRACE_ENABLE_SP0 + TRACE_ENABLE_SP1 + TRACE_ENABLE_ISP == 3) @@ -192,65 +152,32 @@ enum TRACE_DUMP_FORMAT { #define TRACE_SP0_HEADER_ADDR (TRACE_SP0_ADDR) #define TRACE_SP0_HEADER_SIZE (sizeof(struct trace_header_t)) -#ifndef ISP2401 -#define TRACE_SP0_ITEM_SIZE (sizeof(struct trace_item_t)) -#define TRACE_SP0_DATA_ADDR (TRACE_SP0_HEADER_ADDR + TRACE_SP0_HEADER_SIZE) -#define TRACE_SP0_DATA_SIZE (TRACE_SP0_SIZE - TRACE_SP0_HEADER_SIZE) -#define TRACE_SP0_MAX_POINTS (TRACE_SP0_DATA_SIZE / TRACE_SP0_ITEM_SIZE) -#else #define TRACE_SP0_ITEM_SIZE (sizeof(struct trace_item_t)) #define TRACE_SP0_DATA_ADDR (TRACE_SP0_HEADER_ADDR + TRACE_SP0_HEADER_SIZE) #define TRACE_SP0_DATA_SIZE (TRACE_SP0_SIZE - TRACE_SP0_HEADER_SIZE) #define TRACE_SP0_MAX_POINTS (TRACE_SP0_DATA_SIZE / TRACE_SP0_ITEM_SIZE) -#endif #define TRACE_SP1_HEADER_ADDR (TRACE_SP1_ADDR) #define TRACE_SP1_HEADER_SIZE (sizeof(struct trace_header_t)) -#ifndef ISP2401 -#define TRACE_SP1_ITEM_SIZE (sizeof(struct trace_item_t)) -#define TRACE_SP1_DATA_ADDR (TRACE_SP1_HEADER_ADDR + TRACE_SP1_HEADER_SIZE) -#define TRACE_SP1_DATA_SIZE (TRACE_SP1_SIZE - TRACE_SP1_HEADER_SIZE) -#define TRACE_SP1_MAX_POINTS (TRACE_SP1_DATA_SIZE / TRACE_SP1_ITEM_SIZE) -#else #define TRACE_SP1_ITEM_SIZE (sizeof(struct trace_item_t)) #define TRACE_SP1_DATA_ADDR (TRACE_SP1_HEADER_ADDR + TRACE_SP1_HEADER_SIZE) #define TRACE_SP1_DATA_SIZE (TRACE_SP1_SIZE - TRACE_SP1_HEADER_SIZE) #define TRACE_SP1_MAX_POINTS (TRACE_SP1_DATA_SIZE / TRACE_SP1_ITEM_SIZE) -#endif #define TRACE_ISP_HEADER_ADDR (TRACE_ISP_ADDR) #define TRACE_ISP_HEADER_SIZE (sizeof(struct trace_header_t)) -#ifndef ISP2401 -#define TRACE_ISP_ITEM_SIZE (sizeof(struct trace_item_t)) -#define TRACE_ISP_DATA_ADDR (TRACE_ISP_HEADER_ADDR + TRACE_ISP_HEADER_SIZE) -#define TRACE_ISP_DATA_SIZE (TRACE_ISP_SIZE - TRACE_ISP_HEADER_SIZE) -#define TRACE_ISP_MAX_POINTS (TRACE_ISP_DATA_SIZE / TRACE_ISP_ITEM_SIZE) - -#else #define TRACE_ISP_ITEM_SIZE (sizeof(struct trace_item_t)) #define TRACE_ISP_DATA_ADDR (TRACE_ISP_HEADER_ADDR + TRACE_ISP_HEADER_SIZE) #define TRACE_ISP_DATA_SIZE (TRACE_ISP_SIZE - TRACE_ISP_HEADER_SIZE) #define TRACE_ISP_MAX_POINTS (TRACE_ISP_DATA_SIZE / TRACE_ISP_ITEM_SIZE) -#endif -#ifndef ISP2401 -/* offsets for master_port read/write */ -#define HDR_HDR_OFFSET 0 /* offset of the header */ -#define HDR_COMMAND_OFFSET 4 /* offset of the command */ -#define HDR_DATA_OFFSET 8 /* offset of the command data */ -#define HDR_DEBUG_SIGNATURE_OFFSET 16 /* offset of the param debug signature in trace_header_t */ -#define HDR_DEBUG_POINTER_OFFSET 20 /* offset of the param debug pointer in trace_header_t */ -#endif /* common majors */ -#ifdef ISP2401 /* SP0 */ -#endif #define MAJOR_MAIN 1 #define MAJOR_ISP_STAGE_ENTRY 2 #define MAJOR_DMA_PRXY 3 #define MAJOR_START_ISP 4 -#ifdef ISP2401 /* SP1 */ #define MAJOR_OBSERVER_ISP0_EVENT 21 #define MAJOR_OBSERVER_OUTPUT_FORM_EVENT 22 @@ -260,7 +187,6 @@ enum TRACE_DUMP_FORMAT { #define MAJOR_OBSERVER_SP_TERMINATE_EVENT 26 #define MAJOR_OBSERVER_DMA_ACK 27 #define MAJOR_OBSERVER_ACC_ACK 28 -#endif #define DEBUG_PTR_SIGNATURE 0xABCD /* signature for the debug parameter pointer */ @@ -288,39 +214,20 @@ typedef enum { #define FIELD_VALUE_WIDTH (16) #define FIELD_VALUE_MASK FIELD_MASK(FIELD_VALUE_WIDTH) #define FIELD_VALUE_PACK(f) FIELD_PACK(f, FIELD_VALUE_MASK, FIELD_VALUE_OFFSET) -#ifndef ISP2401 -#define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f, FIELD_VALUE_MASK, FIELD_VALUE_OFFSET) -#else #define FIELD_VALUE_UNPACK(f) FIELD_UNPACK(f, FIELD_VALUE_MASK, FIELD_VALUE_OFFSET) -#endif #define FIELD_MINOR_OFFSET (FIELD_VALUE_OFFSET + FIELD_VALUE_WIDTH) #define FIELD_MINOR_WIDTH (8) #define FIELD_MINOR_MASK FIELD_MASK(FIELD_MINOR_WIDTH) #define FIELD_MINOR_PACK(f) FIELD_PACK(f, FIELD_MINOR_MASK, FIELD_MINOR_OFFSET) -#ifndef ISP2401 -#define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MINOR_MASK, FIELD_MINOR_OFFSET) -#else #define FIELD_MINOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MINOR_MASK, FIELD_MINOR_OFFSET) -#endif #define FIELD_MAJOR_OFFSET (FIELD_MINOR_OFFSET + FIELD_MINOR_WIDTH) #define FIELD_MAJOR_WIDTH (5) #define FIELD_MAJOR_MASK FIELD_MASK(FIELD_MAJOR_WIDTH) #define FIELD_MAJOR_PACK(f) FIELD_PACK(f, FIELD_MAJOR_MASK, FIELD_MAJOR_OFFSET) -#ifndef ISP2401 -#define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MAJOR_MASK, FIELD_MAJOR_OFFSET) -#else #define FIELD_MAJOR_UNPACK(f) FIELD_UNPACK(f, FIELD_MAJOR_MASK, FIELD_MAJOR_OFFSET) -#endif -#ifndef ISP2401 -#define FIELD_FORMAT_OFFSET (FIELD_MAJOR_OFFSET + FIELD_MAJOR_WIDTH) -#define FIELD_FORMAT_WIDTH (3) -#define FIELD_FORMAT_MASK FIELD_MASK(FIELD_FORMAT_WIDTH) -#define FIELD_FORMAT_PACK(f) FIELD_PACK(f, FIELD_FORMAT_MASK, FIELD_FORMAT_OFFSET) -#define FIELD_FORMAT_UNPACK(f) FIELD_UNPACK(f, FIELD_FORMAT_MASK, FIELD_FORMAT_OFFSET) -#else /* for quick traces - only insertion, compatible with the regular point */ #define FIELD_FULL_MAJOR_WIDTH (8) #define FIELD_FULL_MAJOR_MASK FIELD_MASK(FIELD_FULL_MAJOR_WIDTH) @@ -349,22 +256,13 @@ typedef enum { #define FIELD_TID_MASK FIELD_MASK(FIELD_TID_WIDTH) #define FIELD_TID_PACK(f) FIELD_PACK(f, FIELD_TID_MASK, FIELD_TID_OFFSET) #define FIELD_TID_UNPACK(f) FIELD_UNPACK(f, FIELD_TID_MASK, FIELD_TID_OFFSET) -#endif #define FIELD_VALUE_24_OFFSET (0) #define FIELD_VALUE_24_WIDTH (24) -#ifndef ISP2401 -#define FIELD_VALUE_24_MASK FIELD_MASK(FIELD_VALUE_24_WIDTH) -#else #define FIELD_VALUE_24_MASK FIELD_MASK(FIELD_VALUE_24_WIDTH) -#endif #define FIELD_VALUE_24_PACK(f) FIELD_PACK(f, FIELD_VALUE_24_MASK, FIELD_VALUE_24_OFFSET) #define FIELD_VALUE_24_UNPACK(f) FIELD_UNPACK(f, FIELD_VALUE_24_MASK, FIELD_VALUE_24_OFFSET) -#ifndef ISP2401 -#define PACK_TRACEPOINT(format, major, minor, value) \ - (FIELD_FORMAT_PACK(format) | FIELD_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor) | FIELD_VALUE_PACK(value)) -#else #define PACK_TRACEPOINT(tid, major, minor, value) \ (FIELD_TID_PACK(tid) | FIELD_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor) | FIELD_VALUE_PACK(value)) @@ -373,14 +271,8 @@ typedef enum { #define PACK_FORMATTED_TRACEPOINT(format, major, minor, value) \ (FIELD_TID_PACK(FIELD_TID_SEL_FORMAT_PAT) | FIELD_FORMAT_PACK(format) | FIELD_MAJOR_PACK(major) | FIELD_MINOR_PACK(minor) | FIELD_VALUE_PACK(value)) -#endif -#ifndef ISP2401 -#define PACK_TRACE_VALUE24(format, major, value) \ - (FIELD_FORMAT_PACK(format) | FIELD_MAJOR_PACK(major) | FIELD_VALUE_24_PACK(value)) -#else #define PACK_TRACE_VALUE24(major, value) \ (FIELD_TID_PACK(FIELD_TID_SEL_FORMAT_PAT) | FIELD_MAJOR_PACK(major) | FIELD_VALUE_24_PACK(value)) -#endif #endif /* __CSS_TRACE_H_ */ -- GitLab From c06e212da091388fcf715bcf365e83ec20b425cb Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 26 Apr 2020 18:56:54 +0200 Subject: [PATCH 414/503] media: atomisp: ia_css_binary_get_shading_info(): don't test version It doesn't make any sense to change the number of parameters for this function depending on the ISP version. Signed-off-by: Mauro Carvalho Chehab --- .../pci/atomisp2/css2400/ia_css_pipe_public.h | 3 +- .../runtime/binary/interface/ia_css_binary.h | 4 -- .../css2400/runtime/binary/src/binary.c | 11 +---- .../atomisp/pci/atomisp2/css2400/sh_css.c | 40 ++++++------------- 4 files changed, 15 insertions(+), 43 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h index 54b66d19016f4..3698f43518c90 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h @@ -182,11 +182,10 @@ struct ia_css_pipe_info { pixels normally used to initialize the ISP filters. This is why the raw output resolution should normally be set to the input resolution - 8x8. */ -#ifdef ISP2401 + /* ISP2401 */ struct ia_css_resolution output_system_in_res_info; /** For IPU3 only. Info about output system in resolution which is considered as gdc out resolution. */ -#endif struct ia_css_shading_info shading_info; /** After an image pipe is created, this field will contain the info for the shading correction. */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h index ddc087c50ec5f..40a0b4070c065 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h @@ -219,12 +219,8 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, enum ia_css_shading_correction_type type, unsigned int required_bds_factor, const struct ia_css_stream_config *stream_config, -#ifndef ISP2401 - struct ia_css_shading_info *info); -#else struct ia_css_shading_info *shading_info, struct ia_css_pipe_config *pipe_config); -#endif enum ia_css_err ia_css_binary_3a_grid_info(const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c index f5282bb6ad6c7..b5004592ac179 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c @@ -706,28 +706,21 @@ ia_css_binary_get_shading_info(const struct ia_css_binary *binary, /* [in] */ enum ia_css_shading_correction_type type, /* [in] */ unsigned int required_bds_factor, /* [in] */ const struct ia_css_stream_config *stream_config, /* [in] */ -#ifndef ISP2401 - struct ia_css_shading_info *info) /* [out] */ -#else struct ia_css_shading_info *shading_info, /* [out] */ struct ia_css_pipe_config *pipe_config) /* [out] */ -#endif { enum ia_css_err err; assert(binary); -#ifndef ISP2401 - assert(info); -#else assert(shading_info); IA_CSS_ENTER_PRIVATE("binary=%p, type=%d, required_bds_factor=%d, stream_config=%p", binary, type, required_bds_factor, stream_config); -#endif if (type == IA_CSS_SHADING_CORRECTION_TYPE_1) #ifndef ISP2401 - err = ia_css_binary_get_shading_info_type_1(binary, required_bds_factor, stream_config, info); + err = ia_css_binary_get_shading_info_type_1(binary, required_bds_factor, stream_config, + shading_info); #else err = ia_css_binary_get_shading_info_type_1(binary, required_bds_factor, stream_config, shading_info, pipe_config); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index 2fbd2bf703140..ee58db7758e1c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -5507,23 +5507,12 @@ static enum ia_css_err sh_css_pipe_configure_output( static enum ia_css_err sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, -#ifndef ISP2401 - struct ia_css_shading_info *info) -#else struct ia_css_shading_info *shading_info, struct ia_css_pipe_config *pipe_config) -#endif { enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_binary *binary = NULL; - assert(pipe); -#ifndef ISP2401 - assert(info); -#else - assert(shading_info); - assert(pipe_config); -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_get_shading_info() enter:\n"); @@ -5535,11 +5524,8 @@ sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, IA_CSS_SHADING_CORRECTION_TYPE_1, pipe->required_bds_factor, (const struct ia_css_stream_config *)&pipe->stream->config, -#ifndef ISP2401 - info); -#else shading_info, pipe_config); -#endif + /* Other function calls can be added here when other shading correction types will be added * in the future. */ @@ -5550,11 +5536,7 @@ sh_css_pipe_get_shading_info(struct ia_css_pipe *pipe, * information. It is not a error case, and then * this function should return IA_CSS_SUCCESS. */ -#ifndef ISP2401 - memset(info, 0, sizeof(*info)); -#else memset(shading_info, 0, sizeof(*shading_info)); -#endif } return err; } @@ -9951,16 +9933,18 @@ static enum ia_css_err load_primary_binaries( if (err != IA_CSS_SUCCESS) goto ERR; } -#ifdef ISP2401 - pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; -#endif + + if (atomisp_hw_is_isp2401) + pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; + if (!spcopyonly) { - err = sh_css_pipe_get_shading_info(curr_pipe, -#ifndef ISP2401 - &pipe_info->shading_info); -#else - & pipe_info->shading_info, &curr_pipe->config); -#endif + if (!atomisp_hw_is_isp2401) + err = sh_css_pipe_get_shading_info(curr_pipe, + &pipe_info->shading_info, NULL); + else + err = sh_css_pipe_get_shading_info(curr_pipe, + &pipe_info->shading_info, &curr_pipe->config); + if (err != IA_CSS_SUCCESS) goto ERR; err = sh_css_pipe_get_grid_info(curr_pipe, -- GitLab From 8a85fe11c2182168e61cda53f8abded802371b6f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 08:23:31 +0200 Subject: [PATCH 415/503] media: atomisp: get rid of some non-existing functions for ISP2401 There are no ia_css_set_system_mode() nor ia_css_is_system_mode_suspend_or_resume() functions at the driver. So, get rid of the code that would try to call it. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/css2400/sh_css.c | 42 +------------------ 1 file changed, 1 insertion(+), 41 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index ee58db7758e1c..aa8b270ce931b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -10648,12 +10648,6 @@ static enum ia_css_err load_primary_binaries( sh_css_setup_queues(); ia_css_bufq_dump_queue_info(); -#ifdef ISP2401 - if (ia_css_is_system_mode_suspend_or_resume() == false) /* skip in suspend/resume flow */ - { - ia_css_set_system_mode(IA_CSS_SYS_MODE_WORKING); - } -#endif IA_CSS_LEAVE_ERR(err); return err; } @@ -10722,18 +10716,8 @@ static enum ia_css_err load_primary_binaries( sh_css_hmm_buffer_record_uninit(); -#ifndef ISP2401 /* clear pending param sets from refcount */ sh_css_param_clear_param_sets(); -#else - if (ia_css_is_system_mode_suspend_or_resume() == false) /* skip in suspend/resume flow */ - { - /* clear pending param sets from refcount */ - sh_css_param_clear_param_sets(); - ia_css_set_system_mode( - IA_CSS_SYS_MODE_INIT); /* System is initialized but not 'running' */ - } -#endif IA_CSS_LEAVE_ERR(err); return err; @@ -11252,17 +11236,8 @@ static enum ia_css_err load_primary_binaries( sh_css_hmm_buffer_record_init(void) { int i; -#ifndef ISP2401 - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); -#else - if (ia_css_is_system_mode_suspend_or_resume() == - false) { /* skip in suspend/resume flow */ - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); - } -#endif - } } static void @@ -11270,29 +11245,14 @@ static enum ia_css_err load_primary_binaries( int i; struct sh_css_hmm_buffer_record *buffer_record = NULL; -#ifndef ISP2401 buffer_record = &hmm_buffer_record[0]; for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { if (buffer_record->in_use) { if (buffer_record->h_vbuf) ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); sh_css_hmm_buffer_record_reset(buffer_record); -#else - if (ia_css_is_system_mode_suspend_or_resume() == - false) { /* skip in suspend/resume flow */ - buffer_record = &hmm_buffer_record[0]; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - if (buffer_record->in_use) { - if (buffer_record->h_vbuf) - ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); - sh_css_hmm_buffer_record_reset(buffer_record); - } - buffer_record++; -#endif } -#ifndef ISP2401 buffer_record++; -#endif } } -- GitLab From 7535c68d179fa11ef7320d9f13affb94562919b1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 09:30:26 +0200 Subject: [PATCH 416/503] media: atomisp: make util.c work with ISP2401 runtime detection Don't hide those small functions behind ifdefs. Signed-off-by: Mauro Carvalho Chehab --- .../pci/atomisp2/css2400/camera/util/interface/ia_css_util.h | 5 +++-- .../atomisp/pci/atomisp2/css2400/camera/util/src/util.c | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h index b09a0a009c087..75333166ed9b3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h @@ -74,7 +74,7 @@ enum ia_css_err ia_css_util_check_res( unsigned int width, unsigned int height); -#ifdef ISP2401 +/* ISP2401 */ /* @brief compare resolutions (less or equal) * * @param[in] a resolution @@ -87,6 +87,7 @@ bool ia_css_util_res_leq( struct ia_css_resolution a, struct ia_css_resolution b); +/* ISP2401 */ /** * @brief Check if resolution is zero * @@ -97,6 +98,7 @@ bool ia_css_util_res_leq( bool ia_css_util_resolution_is_zero( const struct ia_css_resolution resolution); +/* ISP2401 */ /** * @brief Check if resolution is even * @@ -107,7 +109,6 @@ bool ia_css_util_resolution_is_zero( bool ia_css_util_resolution_is_even( const struct ia_css_resolution resolution); -#endif /* @brief check width and height * * @param[in] stream_format diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c index a44cd35acd0f3..f14776f09bbbe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c @@ -158,23 +158,24 @@ enum ia_css_err ia_css_util_check_res(unsigned int width, unsigned int height) return IA_CSS_SUCCESS; } -#ifdef ISP2401 +/* ISP2401 */ bool ia_css_util_res_leq(struct ia_css_resolution a, struct ia_css_resolution b) { return a.width <= b.width && a.height <= b.height; } +/* ISP2401 */ bool ia_css_util_resolution_is_zero(const struct ia_css_resolution resolution) { return (resolution.width == 0) || (resolution.height == 0); } +/* ISP2401 */ bool ia_css_util_resolution_is_even(const struct ia_css_resolution resolution) { return IS_EVEN(resolution.height) && IS_EVEN(resolution.width); } -#endif bool ia_css_util_is_input_format_raw(enum atomisp_input_format format) { return ((format == ATOMISP_INPUT_FORMAT_RAW_6) || -- GitLab From 406ae76079036fa9f335b70037cb971c14305cad Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 10:14:07 +0200 Subject: [PATCH 417/503] media: atomisp: sh_css: detect ISP version at runtime Get rid of all those ifdefs that were checking for ISP2401 inside sh_css.c. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/css2400/sh_css.c | 8205 ++++++++--------- 1 file changed, 4040 insertions(+), 4165 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c index aa8b270ce931b..76b110431407d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c @@ -187,7 +187,7 @@ allocate_delay_frames(struct ia_css_pipe *pipe); static enum ia_css_err sh_css_pipe_start(struct ia_css_stream *stream); -#ifdef ISP2401 +/* ISP 2401 */ /* * @brief Stop all "ia_css_pipe" instances in the target * "ia_css_stream" instance. @@ -219,18 +219,19 @@ sh_css_pipes_stop(struct ia_css_stream *stream); * instance have ben stopped. * - false, otherwise. */ +/* ISP 2401 */ static bool sh_css_pipes_have_stopped(struct ia_css_stream *stream); +/* ISP 2401 */ static enum ia_css_err ia_css_pipe_check_format(struct ia_css_pipe *pipe, enum ia_css_frame_format format); +/* ISP 2401 */ static enum ia_css_err check_pipe_resolutions(const struct ia_css_pipe *pipe); -#endif - static enum ia_css_err ia_css_pipe_load_extension(struct ia_css_pipe *pipe, struct ia_css_fw_info *firmware); @@ -402,10 +403,6 @@ static unsigned int get_crop_columns_for_bayer_order(const struct ia_css_stream_config *config); static void get_pipe_extra_pixel(struct ia_css_pipe *pipe, unsigned int *extra_row, unsigned int *extra_column); -#endif - -#ifdef ISP2401 -#ifdef USE_INPUT_SYSTEM_VERSION_2401 static enum ia_css_err aspect_ratio_crop_init(struct ia_css_stream *curr_stream, struct ia_css_pipe *pipes[], @@ -419,7 +416,6 @@ aspect_ratio_crop(struct ia_css_pipe *curr_pipe, struct ia_css_resolution *effective_res); #endif -#endif static void sh_css_pipe_free_shading_table(struct ia_css_pipe *pipe) { @@ -3054,17 +3050,17 @@ load_preview_binaries(struct ia_css_pipe *pipe) { if (err != IA_CSS_SUCCESS) return err; -#ifdef ISP2401 - /* The delay latency determines the number of invalid frames after - * a stream is started. */ - pipe->num_invalid_frames = pipe->dvs_frame_delay; - pipe->info.num_invalid_frames = pipe->num_invalid_frames; + if (atomisp_hw_is_isp2401) { + /* The delay latency determines the number of invalid frames after + * a stream is started. */ + pipe->num_invalid_frames = pipe->dvs_frame_delay; + pipe->info.num_invalid_frames = pipe->num_invalid_frames; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "load_preview_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", - pipe->num_invalid_frames, pipe->dvs_frame_delay); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "load_preview_binaries() num_invalid_frames=%d dvs_frame_delay=%d\n", + pipe->num_invalid_frames, pipe->dvs_frame_delay); + } -#endif /* The vf_pp binary is needed when (further) YUV downscaling is required */ need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.width != pipe_out_info->res.width; need_vf_pp |= mycs->preview_binary.out_frame_info[0].res.height != pipe_out_info->res.height; @@ -3119,17 +3115,16 @@ load_preview_binaries(struct ia_css_pipe *pipe) { * Offline Preview uses the ISP copy binary. */ need_isp_copy_binary = !online && sensor; -#else -#ifndef ISP2401 - need_isp_copy_binary = !online && !continuous; #else /* About pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY: * This is typical the case with SkyCam (which has no input system) but it also applies to all cases * where the driver chooses for memory based input frames. In these cases, a copy binary (which typical * copies sensor data to DDR) does not have much use. */ - need_isp_copy_binary = !online && !continuous && !(pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY); -#endif + if (!atomisp_hw_is_isp2401) + need_isp_copy_binary = !online && !continuous; + else + need_isp_copy_binary = !online && !continuous && !(pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY); #endif /* Copy */ @@ -5148,7 +5143,7 @@ sh_css_pipe_start(struct ia_css_stream *stream) { return err; } -#ifndef ISP2401 +/* ISP2400 */ void sh_css_enable_cont_capt(bool enable, bool stop_copy_preview) { @@ -5160,40 +5155,13 @@ sh_css_enable_cont_capt(bool enable, bool stop_copy_preview) bool sh_css_continuous_is_enabled(uint8_t pipe_num) -#else -/* - * @brief Stop all "ia_css_pipe" instances in the target - * "ia_css_stream" instance. - * - * Refer to "Local prototypes" for more info. - */ -static enum ia_css_err -sh_css_pipes_stop(struct ia_css_stream *stream) -#endif { -#ifndef ISP2401 struct ia_css_pipe *pipe; bool continuous; -#else - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_pipe *main_pipe; - enum ia_css_pipe_id main_pipe_id; - int i; -#endif -#ifndef ISP2401 - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); -#else - assert(stream); - if (!stream) - { - IA_CSS_LOG("stream does NOT exist!"); - err = IA_CSS_ERR_INTERNAL_ERROR; - goto ERR; - } -#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); -#ifndef ISP2401 pipe = find_pipe_by_num(pipe_num); continuous = pipe && pipe->stream->config.continuous; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, @@ -5201,18 +5169,8 @@ sh_css_pipes_stop(struct ia_css_stream *stream) continuous); return continuous; } -#else - main_pipe = stream->last_pipe; - assert(main_pipe); - if (!main_pipe) - { - IA_CSS_LOG("main_pipe does NOT exist!"); - err = IA_CSS_ERR_INTERNAL_ERROR; - goto ERR; - } -#endif -#ifndef ISP2401 +/* ISP2400 */ enum ia_css_err ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) { @@ -5223,12 +5181,7 @@ ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, *buffer_depth = NUM_CONTINUOUS_FRAMES; return IA_CSS_SUCCESS; } -#else -main_pipe_id = main_pipe->mode; -IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); -#endif -#ifndef ISP2401 enum ia_css_err ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n", buffer_depth); @@ -5240,83 +5193,121 @@ ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) { /* TODO: check what to regarding initialization */ return IA_CSS_SUCCESS; } -#else -/* - * Stop all "ia_css_pipe" instances in this target - * "ia_css_stream" instance. - */ -for (i = 0; i < stream->num_pipes; i++) -{ - /* send the "stop" request to the "ia_css_pipe" instance */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - stream->pipes[i]->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(&stream->pipes[i]->pipeline); -#endif -#ifndef ISP2401 +/* ISP2401 */ enum ia_css_err ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, int *buffer_depth) { if (!buffer_depth) return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); -#else -/* - * Exit this loop if "ia_css_pipeline_request_stop()" - * returns the error code. - * - * The error code would be generated in the following - * two cases: - * (1) The Scalar Processor has already been stopped. - * (2) The "Host->SP" event queue is full. - * - * As the convention of using CSS API 2.0/2.1, such CSS - * error code would be propogated from the CSS-internal - * API returned value to the CSS API returned value. Then - * the CSS driver should capture these error code and - * handle it in the driver exception handling mechanism. - */ -if (err != IA_CSS_SUCCESS) { - goto ERR; -} + (void)stream; + *buffer_depth = stream->config.target_num_cont_raw_buf; + return IA_CSS_SUCCESS; } /* - * In the CSS firmware use scenario "Continuous Preview" - * as well as "Continuous Video", the "ia_css_pipe" instance - * "Copy Pipe" is activated. This "Copy Pipe" is private to - * the CSS firmware so that it is not listed in the target + * @brief Stop all "ia_css_pipe" instances in the target * "ia_css_stream" instance. * - * We need to stop this "Copy Pipe", as well. + * Refer to "Local prototypes" for more info. */ -if (main_pipe->stream->config.continuous) +/* ISP2401 */ +static enum ia_css_err +sh_css_pipes_stop(struct ia_css_stream *stream) { - struct ia_css_pipe *copy_pipe = NULL; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipe *main_pipe; + enum ia_css_pipe_id main_pipe_id; + int i; - /* get the reference to "Copy Pipe" */ - if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) - copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; - else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) - copy_pipe = main_pipe->pipe_settings.video.copy_pipe; + assert(stream); + if (!stream) + { + IA_CSS_LOG("stream does NOT exist!"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } - /* return the error code if "Copy Pipe" does NOT exist */ - assert(copy_pipe); - if (!copy_pipe) { - IA_CSS_LOG("Copy Pipe does NOT exist!"); + main_pipe = stream->last_pipe; + assert(main_pipe); + if (!main_pipe) + { + IA_CSS_LOG("main_pipe does NOT exist!"); err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; } - /* send the "stop" request to "Copy Pipe" */ - IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", - copy_pipe->pipeline.pipe_id); - err = ia_css_pipeline_request_stop(©_pipe->pipeline); -} + main_pipe_id = main_pipe->mode; + IA_CSS_ENTER_PRIVATE("main_pipe_id=%d", main_pipe_id); + + /* + * Stop all "ia_css_pipe" instances in this target + * "ia_css_stream" instance. + */ + for (i = 0; i < stream->num_pipes; i++) + { + /* send the "stop" request to the "ia_css_pipe" instance */ + IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", + stream->pipes[i]->pipeline.pipe_id); + err = ia_css_pipeline_request_stop(&stream->pipes[i]->pipeline); + + /* + * Exit this loop if "ia_css_pipeline_request_stop()" + * returns the error code. + * + * The error code would be generated in the following + * two cases: + * (1) The Scalar Processor has already been stopped. + * (2) The "Host->SP" event queue is full. + * + * As the convention of using CSS API 2.0/2.1, such CSS + * error code would be propogated from the CSS-internal + * API returned value to the CSS API returned value. Then + * the CSS driver should capture these error code and + * handle it in the driver exception handling mechanism. + */ + if (err != IA_CSS_SUCCESS) { + goto ERR; + } + } + + /* + * In the CSS firmware use scenario "Continuous Preview" + * as well as "Continuous Video", the "ia_css_pipe" instance + * "Copy Pipe" is activated. This "Copy Pipe" is private to + * the CSS firmware so that it is not listed in the target + * "ia_css_stream" instance. + * + * We need to stop this "Copy Pipe", as well. + */ + if (main_pipe->stream->config.continuous) + { + struct ia_css_pipe *copy_pipe = NULL; + + /* get the reference to "Copy Pipe" */ + if (main_pipe_id == IA_CSS_PIPE_ID_PREVIEW) + copy_pipe = main_pipe->pipe_settings.preview.copy_pipe; + else if (main_pipe_id == IA_CSS_PIPE_ID_VIDEO) + copy_pipe = main_pipe->pipe_settings.video.copy_pipe; + + /* return the error code if "Copy Pipe" does NOT exist */ + assert(copy_pipe); + if (!copy_pipe) { + IA_CSS_LOG("Copy Pipe does NOT exist!"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto ERR; + } + + /* send the "stop" request to "Copy Pipe" */ + IA_CSS_LOG("Send the stop-request to the pipe: pipe_id=%d", + copy_pipe->pipeline.pipe_id); + err = ia_css_pipeline_request_stop(©_pipe->pipeline); + } ERR: -IA_CSS_LEAVE_ERR_PRIVATE(err); -return err; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } /* @@ -5325,6 +5316,7 @@ return err; * * Refer to "Local prototypes" for more info. */ +/* ISP2401 */ static bool sh_css_pipes_have_stopped(struct ia_css_stream *stream) { @@ -5404,58 +5396,6 @@ sh_css_pipes_have_stopped(struct ia_css_stream *stream) return rval; } -bool -sh_css_continuous_is_enabled(uint8_t pipe_num) -{ - struct ia_css_pipe *pipe; - bool continuous; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_continuous_is_enabled() enter: pipe_num=%d\n", pipe_num); - - pipe = find_pipe_by_num(pipe_num); - continuous = pipe && pipe->stream->config.continuous; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_continuous_is_enabled() leave: enable=%d\n", - continuous); - return continuous; -} - -enum ia_css_err -ia_css_stream_get_max_buffer_depth(struct ia_css_stream *stream, - int *buffer_depth) { - if (!buffer_depth) - return IA_CSS_ERR_INVALID_ARGUMENTS; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_max_buffer_depth() enter: void\n"); - (void)stream; - *buffer_depth = NUM_CONTINUOUS_FRAMES; - return IA_CSS_SUCCESS; -} - -enum ia_css_err -ia_css_stream_set_buffer_depth(struct ia_css_stream *stream, int buffer_depth) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_set_buffer_depth() enter: num_frames=%d\n", buffer_depth); - (void)stream; - if (buffer_depth > NUM_CONTINUOUS_FRAMES || buffer_depth < 1) - return IA_CSS_ERR_INVALID_ARGUMENTS; - /* ok, value allowed */ - stream->config.target_num_cont_raw_buf = buffer_depth; - /* TODO: check what to regarding initialization */ - return IA_CSS_SUCCESS; -} - -enum ia_css_err -ia_css_stream_get_buffer_depth(struct ia_css_stream *stream, - int *buffer_depth) { - if (!buffer_depth) - return IA_CSS_ERR_INVALID_ARGUMENTS; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_buffer_depth() enter: void\n"); -#endif - (void)stream; - *buffer_depth = stream->config.target_num_cont_raw_buf; - return IA_CSS_SUCCESS; -} - #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) unsigned int sh_css_get_mipi_sizes_for_check(const unsigned int port, const unsigned int idx) @@ -5596,7 +5536,7 @@ ERR : return err; } -#ifdef ISP2401 +/* ISP2401 */ /* * @brief Check if a format is supported by the pipe. * @@ -5639,7 +5579,6 @@ ia_css_pipe_check_format(struct ia_css_pipe *pipe, return IA_CSS_SUCCESS; } } -#endif static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) { @@ -5895,54 +5834,43 @@ static enum ia_css_err load_video_binaries(struct ia_css_pipe *pipe) return err; if (mycs->video_binary.info->sp.enable.block_output) { -#ifdef ISP2401 unsigned int tnr_width; unsigned int tnr_height; -#endif + tnr_info = mycs->video_binary.out_frame_info[0]; -#ifdef ISP2401 - - /* Select resolution for TNR. If - * output_system_in_resolution(GDC_out_resolution) is - * being used, then select that as it will also be in resolution for - * TNR. At present, it only make sense for Skycam */ - if (pipe->config.output_system_in_res.width && - pipe->config.output_system_in_res.height) { - tnr_width = pipe->config.output_system_in_res.width; - tnr_height = pipe->config.output_system_in_res.height; + + if (atomisp_hw_is_isp2401) { + /* Select resolution for TNR. If + * output_system_in_resolution(GDC_out_resolution) is + * being used, then select that as it will also be in resolution for + * TNR. At present, it only make sense for Skycam */ + if (pipe->config.output_system_in_res.width && + pipe->config.output_system_in_res.height) { + tnr_width = pipe->config.output_system_in_res.width; + tnr_height = pipe->config.output_system_in_res.height; + } else { + tnr_width = tnr_info.res.width; + tnr_height = tnr_info.res.height; + } + + /* Make tnr reference buffers output block width(in pix) align */ + tnr_info.res.width = CEIL_MUL(tnr_width, + (mycs->video_binary.info->sp.block.block_width * ISP_NWAY)); + tnr_info.padded_width = tnr_info.res.width; } else { - tnr_width = tnr_info.res.width; tnr_height = tnr_info.res.height; } - /* Make tnr reference buffers output block width(in pix) align */ - tnr_info.res.width = - CEIL_MUL(tnr_width, - (mycs->video_binary.info->sp.block.block_width * ISP_NWAY)); - tnr_info.padded_width = tnr_info.res.width; - -#endif /* Make tnr reference buffers output block height align */ -#ifndef ISP2401 - tnr_info.res.height = - CEIL_MUL(tnr_info.res.height, - mycs->video_binary.info->sp.block.output_block_height); -#else - tnr_info.res.height = - CEIL_MUL(tnr_height, - mycs->video_binary.info->sp.block.output_block_height); -#endif + tnr_info.res.height = CEIL_MUL(tnr_height, + mycs->video_binary.info->sp.block.output_block_height); } else { tnr_info = mycs->video_binary.internal_frame_info; } tnr_info.format = IA_CSS_FRAME_FORMAT_YUV_LINE; tnr_info.raw_bit_depth = SH_CSS_TNR_BIT_DEPTH; -#ifndef ISP2401 - for (i = 0; i < NUM_TNR_FRAMES; i++) { -#else for (i = 0; i < NUM_TNR_FRAMES; i++) { -#endif if (mycs->tnr_frames[i]) { ia_css_frame_free(mycs->tnr_frames[i]); mycs->tnr_frames[i] = NULL; @@ -5971,9 +5899,6 @@ unload_video_binaries(struct ia_css_pipe *pipe) { ia_css_binary_unload(&pipe->pipe_settings.video.copy_binary); ia_css_binary_unload(&pipe->pipe_settings.video.video_binary); ia_css_binary_unload(&pipe->pipe_settings.video.vf_pp_binary); -#ifndef ISP2401 - ia_css_binary_unload(&pipe->pipe_settings.video.vf_pp_binary); -#endif for (i = 0; i < pipe->pipe_settings.video.num_yuv_scaler; i++) ia_css_binary_unload(&pipe->pipe_settings.video.yuv_scaler_binary[i]); @@ -6192,12 +6117,13 @@ static bool need_capture_pp( IA_CSS_ENTER_LEAVE_PRIVATE(""); assert(pipe); assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE); -#ifdef ISP2401 - /* ldc and capture_pp are not supported in the same pipeline */ - if (need_capt_ldc(pipe) == true) - return false; -#endif + if (atomisp_hw_is_isp2401) { + /* ldc and capture_pp are not supported in the same pipeline */ + if (need_capt_ldc(pipe) == true) + return false; + } + /* determine whether we need to use the capture_pp binary. * This is needed for: * 1. XNR or @@ -6269,12 +6195,8 @@ static enum ia_css_err load_primary_binaries( prim_out_info, capt_pp_out_info, vf_info, *vf_pp_in_info, *pipe_out_info, -#ifndef ISP2401 *pipe_vf_out_info, *capt_pp_in_info, capt_ldc_out_info; -#else - *pipe_vf_out_info; -#endif enum ia_css_err err = IA_CSS_SUCCESS; struct ia_css_capture_settings *mycs; unsigned int i; @@ -6413,97 +6335,81 @@ static enum ia_css_err load_primary_binaries( /* TODO Do we disable ldc for skycam */ need_ldc = need_capt_ldc(pipe); -#ifdef ISP2401 - /* ldc and capt_pp are not supported in the same pipeline */ - if (need_ldc) { + + if (atomisp_hw_is_isp2401 && need_ldc) { + /* ldc and capt_pp are not supported in the same pipeline */ struct ia_css_binary_descr capt_ldc_descr; ia_css_pipe_get_ldc_binarydesc(pipe, - &capt_ldc_descr, &prim_out_info, - &capt_pp_out_info); -#endif + &capt_ldc_descr, &prim_out_info, + &capt_pp_out_info); -#ifdef ISP2401 err = ia_css_binary_find(&capt_ldc_descr, - &mycs->capture_ldc_binary); + &mycs->capture_ldc_binary); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - } else if (need_pp) { -#endif - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ -#ifndef ISP2401 - if (need_pp) { -#endif - struct ia_css_binary_descr capture_pp_descr; -#ifndef ISP2401 + need_pp = 0; + need_ldc = 0; + } + if (need_pp) { + struct ia_css_binary_descr capture_pp_descr; + struct ia_css_binary_descr prim_descr[MAX_NUM_PRIMARY_STAGES]; + + if (!atomisp_hw_is_isp2401) capt_pp_in_info = need_ldc ? &capt_ldc_out_info : &prim_out_info; -#endif + else + capt_pp_in_info = &prim_out_info; - ia_css_pipe_get_capturepp_binarydesc(pipe, -#ifndef ISP2401 - &capture_pp_descr, capt_pp_in_info, -#else - &capture_pp_descr, &prim_out_info, -#endif - &capt_pp_out_info, &vf_info); - err = ia_css_binary_find(&capture_pp_descr, - &mycs->capture_pp_binary); + ia_css_pipe_get_capturepp_binarydesc(pipe, + &capture_pp_descr, capt_pp_in_info, + &capt_pp_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &mycs->capture_pp_binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + if (need_ldc) { + struct ia_css_binary_descr capt_ldc_descr; + + ia_css_pipe_get_ldc_binarydesc(pipe, + &capt_ldc_descr, &prim_out_info, + &capt_ldc_out_info); + + err = ia_css_binary_find(&capt_ldc_descr, + &mycs->capture_ldc_binary); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } -#ifndef ISP2401 - - if (need_ldc) { - struct ia_css_binary_descr capt_ldc_descr; - - ia_css_pipe_get_ldc_binarydesc(pipe, - &capt_ldc_descr, &prim_out_info, - &capt_ldc_out_info); - - err = ia_css_binary_find(&capt_ldc_descr, - &mycs->capture_ldc_binary); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } -#endif - } else { - prim_out_info = *pipe_out_info; - } + } else { + prim_out_info = *pipe_out_info; + } /* Primary */ - { - struct ia_css_binary_descr prim_descr[MAX_NUM_PRIMARY_STAGES]; - - for (i = 0; i < mycs->num_primary_stage; i++) { - struct ia_css_frame_info *local_vf_info = NULL; - - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && - (i == mycs->num_primary_stage - 1)) - local_vf_info = &vf_info; - ia_css_pipe_get_primary_binarydesc(pipe, &prim_descr[i], &prim_in_info, - &prim_out_info, local_vf_info, i); - err = ia_css_binary_find(&prim_descr[i], &mycs->primary_binary[i]); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + for (i = 0; i < mycs->num_primary_stage; i++) { + struct ia_css_frame_info *local_vf_info = NULL; + + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0] && + (i == mycs->num_primary_stage - 1)) + local_vf_info = &vf_info; + ia_css_pipe_get_primary_binarydesc(pipe, &prim_descr[i], &prim_in_info, + &prim_out_info, local_vf_info, i); + err = ia_css_binary_find(&prim_descr[i], &mycs->primary_binary[i]); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } } /* Viewfinder post-processing */ - if (need_pp) { - vf_pp_in_info = - &mycs->capture_pp_binary.vf_frame_info; - } else { - vf_pp_in_info = - &mycs->primary_binary[mycs->num_primary_stage - 1].vf_frame_info; - } + if (need_pp) + vf_pp_in_info = &mycs->capture_pp_binary.vf_frame_info; + else + vf_pp_in_info = &mycs->primary_binary[mycs->num_primary_stage - 1].vf_frame_info; /* * WARNING: The #if def flag has been added below as a @@ -6550,3244 +6456,3234 @@ static enum ia_css_err load_primary_binaries( return err; } } - - return IA_CSS_SUCCESS; } - static enum ia_css_err - allocate_delay_frames(struct ia_css_pipe *pipe) { - unsigned int num_delay_frames = 0, i = 0; - unsigned int dvs_frame_delay = 0; - struct ia_css_frame_info ref_info; - enum ia_css_err err = IA_CSS_SUCCESS; - enum ia_css_pipe_id mode = IA_CSS_PIPE_ID_VIDEO; - struct ia_css_frame **delay_frames = NULL; + return IA_CSS_SUCCESS; +} - IA_CSS_ENTER_PRIVATE(""); +static enum ia_css_err +allocate_delay_frames(struct ia_css_pipe *pipe) { + unsigned int num_delay_frames = 0, i = 0; + unsigned int dvs_frame_delay = 0; + struct ia_css_frame_info ref_info; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_pipe_id mode = IA_CSS_PIPE_ID_VIDEO; + struct ia_css_frame **delay_frames = NULL; - if (!pipe) - { - IA_CSS_ERROR("Invalid args - pipe %p", pipe); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + IA_CSS_ENTER_PRIVATE(""); - mode = pipe->mode; - dvs_frame_delay = pipe->dvs_frame_delay; + if (!pipe) + { + IA_CSS_ERROR("Invalid args - pipe %p", pipe); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if (dvs_frame_delay > 0) - num_delay_frames = dvs_frame_delay + 1; + mode = pipe->mode; + dvs_frame_delay = pipe->dvs_frame_delay; - switch (mode) - { - case IA_CSS_PIPE_ID_CAPTURE: { - struct ia_css_capture_settings *mycs_capture = &pipe->pipe_settings.capture; - (void)mycs_capture; - return err; - } - break; - case IA_CSS_PIPE_ID_VIDEO: { - struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video; - - ref_info = mycs_video->video_binary.internal_frame_info; - /*The ref frame expects - * 1. Y plane - * 2. UV plane with line interleaving, like below - * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) - * - * This format is not YUV420(which has Y, U and V planes). - * Its closer to NV12, except that the UV plane has UV - * interleaving, like UVUVUVUVUVUVUVUVU... - * - * TODO: make this ref_frame format as a separate frame format - */ - ref_info.format = IA_CSS_FRAME_FORMAT_NV12; - delay_frames = mycs_video->delay_frames; - } - break; - case IA_CSS_PIPE_ID_PREVIEW: { - struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview; - - ref_info = mycs_preview->preview_binary.internal_frame_info; - /*The ref frame expects - * 1. Y plane - * 2. UV plane with line interleaving, like below - * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) - * - * This format is not YUV420(which has Y, U and V planes). - * Its closer to NV12, except that the UV plane has UV - * interleaving, like UVUVUVUVUVUVUVUVU... - * - * TODO: make this ref_frame format as a separate frame format - */ - ref_info.format = IA_CSS_FRAME_FORMAT_NV12; - delay_frames = mycs_preview->delay_frames; - } - break; - default: - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + if (dvs_frame_delay > 0) + num_delay_frames = dvs_frame_delay + 1; + + switch (mode) + { + case IA_CSS_PIPE_ID_CAPTURE: { + struct ia_css_capture_settings *mycs_capture = &pipe->pipe_settings.capture; + (void)mycs_capture; + return err; + } + break; + case IA_CSS_PIPE_ID_VIDEO: { + struct ia_css_video_settings *mycs_video = &pipe->pipe_settings.video; + + ref_info = mycs_video->video_binary.internal_frame_info; + /*The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ + ref_info.format = IA_CSS_FRAME_FORMAT_NV12; + delay_frames = mycs_video->delay_frames; + } + break; + case IA_CSS_PIPE_ID_PREVIEW: { + struct ia_css_preview_settings *mycs_preview = &pipe->pipe_settings.preview; + + ref_info = mycs_preview->preview_binary.internal_frame_info; + /*The ref frame expects + * 1. Y plane + * 2. UV plane with line interleaving, like below + * UUUUUU(width/2 times) VVVVVVVV..(width/2 times) + * + * This format is not YUV420(which has Y, U and V planes). + * Its closer to NV12, except that the UV plane has UV + * interleaving, like UVUVUVUVUVUVUVUVU... + * + * TODO: make this ref_frame format as a separate frame format + */ + ref_info.format = IA_CSS_FRAME_FORMAT_NV12; + delay_frames = mycs_preview->delay_frames; + } + break; + default: + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - ref_info.raw_bit_depth = SH_CSS_REF_BIT_DEPTH; + ref_info.raw_bit_depth = SH_CSS_REF_BIT_DEPTH; - assert(num_delay_frames <= MAX_NUM_VIDEO_DELAY_FRAMES); - for (i = 0; i < num_delay_frames; i++) - { - err = ia_css_frame_allocate_from_info(&delay_frames[i], &ref_info); - if (err != IA_CSS_SUCCESS) - return err; - } - IA_CSS_LEAVE_PRIVATE(""); - return IA_CSS_SUCCESS; + assert(num_delay_frames <= MAX_NUM_VIDEO_DELAY_FRAMES); + for (i = 0; i < num_delay_frames; i++) + { + err = ia_css_frame_allocate_from_info(&delay_frames[i], &ref_info); + if (err != IA_CSS_SUCCESS) + return err; } + IA_CSS_LEAVE_PRIVATE(""); + return IA_CSS_SUCCESS; +} + +static enum ia_css_err load_advanced_binaries( + struct ia_css_pipe *pipe) { + struct ia_css_frame_info pre_in_info, gdc_in_info, + post_in_info, post_out_info, + vf_info, *vf_pp_in_info, *pipe_out_info, + *pipe_vf_out_info; + bool need_pp; + bool need_isp_copy = true; + enum ia_css_err err = IA_CSS_SUCCESS; - static enum ia_css_err load_advanced_binaries( - struct ia_css_pipe *pipe) { - struct ia_css_frame_info pre_in_info, gdc_in_info, - post_in_info, post_out_info, - vf_info, *vf_pp_in_info, *pipe_out_info, - *pipe_vf_out_info; - bool need_pp; - bool need_isp_copy = true; - enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER_PRIVATE(""); - IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + pipe_out_info = &pipe->output_info[0]; + pipe_vf_out_info = &pipe->vf_output_info[0]; - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || - pipe->mode == IA_CSS_PIPE_ID_COPY); - if (pipe->pipe_settings.capture.pre_isp_binary.info) - return IA_CSS_SUCCESS; - pipe_out_info = &pipe->output_info[0]; - pipe_vf_out_info = &pipe->vf_output_info[0]; + vf_info = *pipe_vf_out_info; + err = ia_css_util_check_vf_out_info(pipe_out_info, &vf_info); + if (err != IA_CSS_SUCCESS) + return err; + need_pp = need_capture_pp(pipe); - vf_info = *pipe_vf_out_info; - err = ia_css_util_check_vf_out_info(pipe_out_info, &vf_info); + ia_css_frame_info_set_format(&vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); + + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_pp) { + struct ia_css_binary_descr capture_pp_descr; + + ia_css_pipe_get_capturepp_binarydesc(pipe, + &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &pipe->pipe_settings.capture.capture_pp_binary); if (err != IA_CSS_SUCCESS) return err; - need_pp = need_capture_pp(pipe); + } else { + post_out_info = *pipe_out_info; + } - ia_css_frame_info_set_format(&vf_info, - IA_CSS_FRAME_FORMAT_YUV_LINE); + /* Post-gdc */ + { + struct ia_css_binary_descr post_gdc_descr; - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ - if (need_pp) { - struct ia_css_binary_descr capture_pp_descr; + ia_css_pipe_get_post_gdc_binarydesc(pipe, + &post_gdc_descr, &post_in_info, &post_out_info, &vf_info); + err = ia_css_binary_find(&post_gdc_descr, + &pipe->pipe_settings.capture.post_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - ia_css_pipe_get_capturepp_binarydesc(pipe, - &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); - err = ia_css_binary_find(&capture_pp_descr, - &pipe->pipe_settings.capture.capture_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } else { - post_out_info = *pipe_out_info; - } + /* Gdc */ + { + struct ia_css_binary_descr gdc_descr; - /* Post-gdc */ - { - struct ia_css_binary_descr post_gdc_descr; + ia_css_pipe_get_gdc_binarydesc(pipe, &gdc_descr, &gdc_in_info, + &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); + err = ia_css_binary_find(&gdc_descr, + &pipe->pipe_settings.capture.anr_gdc_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.anr_gdc_binary.left_padding = + pipe->pipe_settings.capture.post_isp_binary.left_padding; - ia_css_pipe_get_post_gdc_binarydesc(pipe, - &post_gdc_descr, &post_in_info, &post_out_info, &vf_info); - err = ia_css_binary_find(&post_gdc_descr, - &pipe->pipe_settings.capture.post_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } + /* Pre-gdc */ + { + struct ia_css_binary_descr pre_gdc_descr; - /* Gdc */ - { - struct ia_css_binary_descr gdc_descr; + ia_css_pipe_get_pre_gdc_binarydesc(pipe, &pre_gdc_descr, &pre_in_info, + &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); + err = ia_css_binary_find(&pre_gdc_descr, + &pipe->pipe_settings.capture.pre_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.pre_isp_binary.left_padding = + pipe->pipe_settings.capture.anr_gdc_binary.left_padding; - ia_css_pipe_get_gdc_binarydesc(pipe, &gdc_descr, &gdc_in_info, - &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); - err = ia_css_binary_find(&gdc_descr, - &pipe->pipe_settings.capture.anr_gdc_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.anr_gdc_binary.left_padding = - pipe->pipe_settings.capture.post_isp_binary.left_padding; + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; + } - /* Pre-gdc */ - { - struct ia_css_binary_descr pre_gdc_descr; + { + struct ia_css_binary_descr vf_pp_descr; - ia_css_pipe_get_pre_gdc_binarydesc(pipe, &pre_gdc_descr, &pre_in_info, - &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); - err = ia_css_binary_find(&pre_gdc_descr, - &pipe->pipe_settings.capture.pre_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.pre_isp_binary.left_padding = - pipe->pipe_settings.capture.anr_gdc_binary.left_padding; + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, + &pipe->pipe_settings.capture.vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - /* Viewfinder post-processing */ - if (need_pp) { - vf_pp_in_info = - &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; - } else { - vf_pp_in_info = - &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; - } + /* Copy */ +#ifdef USE_INPUT_SYSTEM_VERSION_2401 + /* For CSI2+, only the direct sensor mode/online requires ISP copy */ + need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; +#endif + if (need_isp_copy) + load_copy_binary(pipe, + &pipe->pipe_settings.capture.copy_binary, + &pipe->pipe_settings.capture.pre_isp_binary); - { - struct ia_css_binary_descr vf_pp_descr; + return err; +} - ia_css_pipe_get_vfpp_binarydesc(pipe, - &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); - err = ia_css_binary_find(&vf_pp_descr, - &pipe->pipe_settings.capture.vf_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } +static enum ia_css_err load_bayer_isp_binaries( + struct ia_css_pipe *pipe) { + struct ia_css_frame_info pre_isp_in_info, *pipe_out_info; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_binary_descr pre_de_descr; - /* Copy */ -#ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* For CSI2+, only the direct sensor mode/online requires ISP copy */ - need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; -#endif - if (need_isp_copy) - load_copy_binary(pipe, - &pipe->pipe_settings.capture.copy_binary, - &pipe->pipe_settings.capture.pre_isp_binary); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); + pipe_out_info = &pipe->output_info[0]; + + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + err = ia_css_frame_check_info(pipe_out_info); + if (err != IA_CSS_SUCCESS) return err; - } - static enum ia_css_err load_bayer_isp_binaries( - struct ia_css_pipe *pipe) { - struct ia_css_frame_info pre_isp_in_info, *pipe_out_info; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_binary_descr pre_de_descr; + ia_css_pipe_get_pre_de_binarydesc(pipe, &pre_de_descr, + &pre_isp_in_info, + pipe_out_info); - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || - pipe->mode == IA_CSS_PIPE_ID_COPY); - pipe_out_info = &pipe->output_info[0]; + err = ia_css_binary_find(&pre_de_descr, + &pipe->pipe_settings.capture.pre_isp_binary); - if (pipe->pipe_settings.capture.pre_isp_binary.info) - return IA_CSS_SUCCESS; + return err; +} - err = ia_css_frame_check_info(pipe_out_info); - if (err != IA_CSS_SUCCESS) - return err; +static enum ia_css_err load_low_light_binaries( + struct ia_css_pipe *pipe) { + struct ia_css_frame_info pre_in_info, anr_in_info, + post_in_info, post_out_info, + vf_info, *pipe_vf_out_info, *pipe_out_info, + *vf_pp_in_info; + bool need_pp; + bool need_isp_copy = true; + enum ia_css_err err = IA_CSS_SUCCESS; - ia_css_pipe_get_pre_de_binarydesc(pipe, &pre_de_descr, - &pre_isp_in_info, - pipe_out_info); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); - err = ia_css_binary_find(&pre_de_descr, - &pipe->pipe_settings.capture.pre_isp_binary); + if (pipe->pipe_settings.capture.pre_isp_binary.info) + return IA_CSS_SUCCESS; + pipe_vf_out_info = &pipe->vf_output_info[0]; + pipe_out_info = &pipe->output_info[0]; + vf_info = *pipe_vf_out_info; + err = ia_css_util_check_vf_out_info(pipe_out_info, + &vf_info); + if (err != IA_CSS_SUCCESS) return err; - } - - static enum ia_css_err load_low_light_binaries( - struct ia_css_pipe *pipe) { - struct ia_css_frame_info pre_in_info, anr_in_info, - post_in_info, post_out_info, - vf_info, *pipe_vf_out_info, *pipe_out_info, - *vf_pp_in_info; - bool need_pp; - bool need_isp_copy = true; - enum ia_css_err err = IA_CSS_SUCCESS; - - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || - pipe->mode == IA_CSS_PIPE_ID_COPY); + need_pp = need_capture_pp(pipe); - if (pipe->pipe_settings.capture.pre_isp_binary.info) - return IA_CSS_SUCCESS; - pipe_vf_out_info = &pipe->vf_output_info[0]; - pipe_out_info = &pipe->output_info[0]; + ia_css_frame_info_set_format(&vf_info, + IA_CSS_FRAME_FORMAT_YUV_LINE); - vf_info = *pipe_vf_out_info; - err = ia_css_util_check_vf_out_info(pipe_out_info, - &vf_info); + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_pp) { + struct ia_css_binary_descr capture_pp_descr; + + ia_css_pipe_get_capturepp_binarydesc(pipe, + &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); + err = ia_css_binary_find(&capture_pp_descr, + &pipe->pipe_settings.capture.capture_pp_binary); if (err != IA_CSS_SUCCESS) return err; - need_pp = need_capture_pp(pipe); - - ia_css_frame_info_set_format(&vf_info, - IA_CSS_FRAME_FORMAT_YUV_LINE); - - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ - if (need_pp) { - struct ia_css_binary_descr capture_pp_descr; - - ia_css_pipe_get_capturepp_binarydesc(pipe, - &capture_pp_descr, &post_out_info, pipe_out_info, &vf_info); - err = ia_css_binary_find(&capture_pp_descr, - &pipe->pipe_settings.capture.capture_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } else { - post_out_info = *pipe_out_info; - } + } else { + post_out_info = *pipe_out_info; + } - /* Post-anr */ - { - struct ia_css_binary_descr post_anr_descr; + /* Post-anr */ + { + struct ia_css_binary_descr post_anr_descr; - ia_css_pipe_get_post_anr_binarydesc(pipe, - &post_anr_descr, &post_in_info, &post_out_info, &vf_info); - err = ia_css_binary_find(&post_anr_descr, - &pipe->pipe_settings.capture.post_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } + ia_css_pipe_get_post_anr_binarydesc(pipe, + &post_anr_descr, &post_in_info, &post_out_info, &vf_info); + err = ia_css_binary_find(&post_anr_descr, + &pipe->pipe_settings.capture.post_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - /* Anr */ - { - struct ia_css_binary_descr anr_descr; + /* Anr */ + { + struct ia_css_binary_descr anr_descr; - ia_css_pipe_get_anr_binarydesc(pipe, &anr_descr, &anr_in_info, - &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); - err = ia_css_binary_find(&anr_descr, - &pipe->pipe_settings.capture.anr_gdc_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.anr_gdc_binary.left_padding = - pipe->pipe_settings.capture.post_isp_binary.left_padding; + ia_css_pipe_get_anr_binarydesc(pipe, &anr_descr, &anr_in_info, + &pipe->pipe_settings.capture.post_isp_binary.in_frame_info); + err = ia_css_binary_find(&anr_descr, + &pipe->pipe_settings.capture.anr_gdc_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.anr_gdc_binary.left_padding = + pipe->pipe_settings.capture.post_isp_binary.left_padding; - /* Pre-anr */ - { - struct ia_css_binary_descr pre_anr_descr; + /* Pre-anr */ + { + struct ia_css_binary_descr pre_anr_descr; - ia_css_pipe_get_pre_anr_binarydesc(pipe, &pre_anr_descr, &pre_in_info, - &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); - err = ia_css_binary_find(&pre_anr_descr, - &pipe->pipe_settings.capture.pre_isp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } - pipe->pipe_settings.capture.pre_isp_binary.left_padding = - pipe->pipe_settings.capture.anr_gdc_binary.left_padding; + ia_css_pipe_get_pre_anr_binarydesc(pipe, &pre_anr_descr, &pre_in_info, + &pipe->pipe_settings.capture.anr_gdc_binary.in_frame_info); + err = ia_css_binary_find(&pre_anr_descr, + &pipe->pipe_settings.capture.pre_isp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } + pipe->pipe_settings.capture.pre_isp_binary.left_padding = + pipe->pipe_settings.capture.anr_gdc_binary.left_padding; - /* Viewfinder post-processing */ - if (need_pp) { - vf_pp_in_info = - &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; - } else { - vf_pp_in_info = - &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; - } + /* Viewfinder post-processing */ + if (need_pp) { + vf_pp_in_info = + &pipe->pipe_settings.capture.capture_pp_binary.vf_frame_info; + } else { + vf_pp_in_info = + &pipe->pipe_settings.capture.post_isp_binary.vf_frame_info; + } - { - struct ia_css_binary_descr vf_pp_descr; + { + struct ia_css_binary_descr vf_pp_descr; - ia_css_pipe_get_vfpp_binarydesc(pipe, - &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); - err = ia_css_binary_find(&vf_pp_descr, - &pipe->pipe_settings.capture.vf_pp_binary); - if (err != IA_CSS_SUCCESS) - return err; - } + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info, pipe_vf_out_info); + err = ia_css_binary_find(&vf_pp_descr, + &pipe->pipe_settings.capture.vf_pp_binary); + if (err != IA_CSS_SUCCESS) + return err; + } - /* Copy */ + /* Copy */ #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* For CSI2+, only the direct sensor mode/online requires ISP copy */ - need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; + /* For CSI2+, only the direct sensor mode/online requires ISP copy */ + need_isp_copy = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; #endif - if (need_isp_copy) - err = load_copy_binary(pipe, - &pipe->pipe_settings.capture.copy_binary, - &pipe->pipe_settings.capture.pre_isp_binary); + if (need_isp_copy) + err = load_copy_binary(pipe, + &pipe->pipe_settings.capture.copy_binary, + &pipe->pipe_settings.capture.pre_isp_binary); - return err; - } + return err; +} - static bool copy_on_sp(struct ia_css_pipe *pipe) { - bool rval; +static bool copy_on_sp(struct ia_css_pipe *pipe) { + bool rval; - assert(pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "copy_on_sp() enter:\n"); + assert(pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "copy_on_sp() enter:\n"); - rval = true; + rval = true; - rval &= (pipe->mode == IA_CSS_PIPE_ID_CAPTURE); + rval &= (pipe->mode == IA_CSS_PIPE_ID_CAPTURE); - rval &= (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW); + rval &= (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW); - rval &= ((pipe->stream->config.input_config.format == - ATOMISP_INPUT_FORMAT_BINARY_8) || - (pipe->config.mode == IA_CSS_PIPE_MODE_COPY)); + rval &= ((pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_BINARY_8) || + (pipe->config.mode == IA_CSS_PIPE_MODE_COPY)); - return rval; - } + return rval; +} - static enum ia_css_err load_capture_binaries( - struct ia_css_pipe *pipe) { - enum ia_css_err err = IA_CSS_SUCCESS; - bool must_be_raw; +static enum ia_css_err load_capture_binaries( + struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + bool must_be_raw; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || - pipe->mode == IA_CSS_PIPE_ID_COPY); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || + pipe->mode == IA_CSS_PIPE_ID_COPY); - if (pipe->pipe_settings.capture.primary_binary[0].info) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + if (pipe->pipe_settings.capture.primary_binary[0].info) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } - /* in primary, advanced,low light or bayer, - the input format must be raw */ - must_be_raw = - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT; - err = ia_css_util_check_input(&pipe->stream->config, must_be_raw, false); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (copy_on_sp(pipe) && - pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { - ia_css_frame_info_init( - &pipe->output_info[0], - JPEG_BYTES, - 1, - IA_CSS_FRAME_FORMAT_BINARY_8, - 0); - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + /* in primary, advanced,low light or bayer, + the input format must be raw */ + must_be_raw = + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT; + err = ia_css_util_check_input(&pipe->stream->config, must_be_raw, false); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) { + ia_css_frame_info_init( + &pipe->output_info[0], + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } - switch (pipe->config.default_capture_config.mode) { - case IA_CSS_CAPTURE_MODE_RAW: - err = load_copy_binaries(pipe); + switch (pipe->config.default_capture_config.mode) { + case IA_CSS_CAPTURE_MODE_RAW: + err = load_copy_binaries(pipe); #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) - if (err == IA_CSS_SUCCESS) - pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; + if (err == IA_CSS_SUCCESS) + pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; #endif - break; - case IA_CSS_CAPTURE_MODE_BAYER: - err = load_bayer_isp_binaries(pipe); - break; - case IA_CSS_CAPTURE_MODE_PRIMARY: - err = load_primary_binaries(pipe); - break; - case IA_CSS_CAPTURE_MODE_ADVANCED: - err = load_advanced_binaries(pipe); - break; - case IA_CSS_CAPTURE_MODE_LOW_LIGHT: - err = load_low_light_binaries(pipe); - break; - } - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - + break; + case IA_CSS_CAPTURE_MODE_BAYER: + err = load_bayer_isp_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_PRIMARY: + err = load_primary_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_ADVANCED: + err = load_advanced_binaries(pipe); + break; + case IA_CSS_CAPTURE_MODE_LOW_LIGHT: + err = load_low_light_binaries(pipe); + break; + } + if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - static enum ia_css_err - unload_capture_binaries(struct ia_css_pipe *pipe) { - unsigned int i; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); +static enum ia_css_err +unload_capture_binaries(struct ia_css_pipe *pipe) { + unsigned int i; - if ((!pipe) || ((pipe->mode != IA_CSS_PIPE_ID_CAPTURE) && (pipe->mode != IA_CSS_PIPE_ID_COPY))) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - ia_css_binary_unload(&pipe->pipe_settings.capture.copy_binary); - for (i = 0; i < MAX_NUM_PRIMARY_STAGES; i++) - ia_css_binary_unload(&pipe->pipe_settings.capture.primary_binary[i]); - ia_css_binary_unload(&pipe->pipe_settings.capture.pre_isp_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.anr_gdc_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.post_isp_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.capture_pp_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.capture_ldc_binary); - ia_css_binary_unload(&pipe->pipe_settings.capture.vf_pp_binary); + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - for (i = 0; i < pipe->pipe_settings.capture.num_yuv_scaler; i++) - ia_css_binary_unload(&pipe->pipe_settings.capture.yuv_scaler_binary[i]); + if ((!pipe) || ((pipe->mode != IA_CSS_PIPE_ID_CAPTURE) && (pipe->mode != IA_CSS_PIPE_ID_COPY))) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.capture.copy_binary); + for (i = 0; i < MAX_NUM_PRIMARY_STAGES; i++) + ia_css_binary_unload(&pipe->pipe_settings.capture.primary_binary[i]); + ia_css_binary_unload(&pipe->pipe_settings.capture.pre_isp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.anr_gdc_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.post_isp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.capture_pp_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.capture_ldc_binary); + ia_css_binary_unload(&pipe->pipe_settings.capture.vf_pp_binary); - kfree(pipe->pipe_settings.capture.is_output_stage); - pipe->pipe_settings.capture.is_output_stage = NULL; - kfree(pipe->pipe_settings.capture.yuv_scaler_binary); - pipe->pipe_settings.capture.yuv_scaler_binary = NULL; + for (i = 0; i < pipe->pipe_settings.capture.num_yuv_scaler; i++) + ia_css_binary_unload(&pipe->pipe_settings.capture.yuv_scaler_binary[i]); - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + kfree(pipe->pipe_settings.capture.is_output_stage); + pipe->pipe_settings.capture.is_output_stage = NULL; + kfree(pipe->pipe_settings.capture.yuv_scaler_binary); + pipe->pipe_settings.capture.yuv_scaler_binary = NULL; - static bool - need_downscaling(const struct ia_css_resolution in_res, - const struct ia_css_resolution out_res) { - if (in_res.width > out_res.width || in_res.height > out_res.height) - return true; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} - return false; - } +static bool +need_downscaling(const struct ia_css_resolution in_res, + const struct ia_css_resolution out_res) { + if (in_res.width > out_res.width || in_res.height > out_res.height) + return true; - static bool - need_yuv_scaler_stage(const struct ia_css_pipe *pipe) { - unsigned int i; - struct ia_css_resolution in_res, out_res; + return false; +} - bool need_format_conversion = false; +static bool +need_yuv_scaler_stage(const struct ia_css_pipe *pipe) { + unsigned int i; + struct ia_css_resolution in_res, out_res; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); + bool need_format_conversion = false; - /* TODO: make generic function */ - need_format_conversion = - ((pipe->stream->config.input_config.format == - ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) && - (pipe->output_info[0].format != IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8)); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); - in_res = pipe->config.input_effective_res; + /* TODO: make generic function */ + need_format_conversion = + ((pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) && + (pipe->output_info[0].format != IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8)); - if (pipe->config.enable_dz) - return true; + in_res = pipe->config.input_effective_res; - if ((pipe->output_info[0].res.width != 0) && need_format_conversion) - return true; + if (pipe->config.enable_dz) + return true; - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - out_res = pipe->output_info[i].res; + if ((pipe->output_info[0].res.width != 0) && need_format_conversion) + return true; - /* A non-zero width means it is a valid output port */ - if ((out_res.width != 0) && need_downscaling(in_res, out_res)) - return true; - } + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + out_res = pipe->output_info[i].res; - return false; + /* A non-zero width means it is a valid output port */ + if ((out_res.width != 0) && need_downscaling(in_res, out_res)) + return true; } - /* TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc */ - /* which has some hard-coded knowledge which prevents reuse of the function. */ - /* Later, merge this with ia_css_pipe_create_cas_scaler_desc */ - static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( - struct ia_css_frame_info *cas_scaler_in_info, - struct ia_css_frame_info *cas_scaler_out_info, - struct ia_css_frame_info *cas_scaler_vf_info, - struct ia_css_cas_binary_descr *descr) { - unsigned int i; - unsigned int hor_ds_factor = 0, ver_ds_factor = 0; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_frame_info tmp_in_info; + return false; +} - unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; +/* TODO: it is temporarily created from ia_css_pipe_create_cas_scaler_desc */ +/* which has some hard-coded knowledge which prevents reuse of the function. */ +/* Later, merge this with ia_css_pipe_create_cas_scaler_desc */ +static enum ia_css_err ia_css_pipe_create_cas_scaler_desc_single_output( + struct ia_css_frame_info *cas_scaler_in_info, + struct ia_css_frame_info *cas_scaler_out_info, + struct ia_css_frame_info *cas_scaler_vf_info, + struct ia_css_cas_binary_descr *descr) { + unsigned int i; + unsigned int hor_ds_factor = 0, ver_ds_factor = 0; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_frame_info tmp_in_info; - assert(cas_scaler_in_info); - assert(cas_scaler_out_info); + unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipe_create_cas_scaler_desc() enter:\n"); + assert(cas_scaler_in_info); + assert(cas_scaler_out_info); - /* We assume that this function is used only for single output port case. */ - descr->num_output_stage = 1; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() enter:\n"); - hor_ds_factor = CEIL_DIV(cas_scaler_in_info->res.width, - cas_scaler_out_info->res.width); - ver_ds_factor = CEIL_DIV(cas_scaler_in_info->res.height, - cas_scaler_out_info->res.height); - /* use the same horizontal and vertical downscaling factor for simplicity */ - assert(hor_ds_factor == ver_ds_factor); + /* We assume that this function is used only for single output port case. */ + descr->num_output_stage = 1; - i = 1; - while (i < hor_ds_factor) { - descr->num_stage++; - i *= max_scale_factor_per_stage; - } + hor_ds_factor = CEIL_DIV(cas_scaler_in_info->res.width, + cas_scaler_out_info->res.width); + ver_ds_factor = CEIL_DIV(cas_scaler_in_info->res.height, + cas_scaler_out_info->res.height); + /* use the same horizontal and vertical downscaling factor for simplicity */ + assert(hor_ds_factor == ver_ds_factor); - descr->in_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), - GFP_KERNEL); - if (!descr->in_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->internal_out_info = kmalloc(descr->num_stage * sizeof( - struct ia_css_frame_info), GFP_KERNEL); - if (!descr->internal_out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), - GFP_KERNEL); - if (!descr->out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), - GFP_KERNEL); - if (!descr->vf_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); - if (!descr->is_output_stage) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } + i = 1; + while (i < hor_ds_factor) { + descr->num_stage++; + i *= max_scale_factor_per_stage; + } - tmp_in_info = *cas_scaler_in_info; - for (i = 0; i < descr->num_stage; i++) { - descr->in_info[i] = tmp_in_info; - if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= - cas_scaler_out_info->res.width) { - descr->is_output_stage[i] = true; - if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { - descr->internal_out_info[i].res.width = cas_scaler_out_info->res.width; - descr->internal_out_info[i].res.height = cas_scaler_out_info->res.height; - descr->internal_out_info[i].padded_width = cas_scaler_out_info->padded_width; - descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - } else { - assert(i == (descr->num_stage - 1)); - descr->internal_out_info[i].res.width = 0; - descr->internal_out_info[i].res.height = 0; - } - descr->out_info[i].res.width = cas_scaler_out_info->res.width; - descr->out_info[i].res.height = cas_scaler_out_info->res.height; - descr->out_info[i].padded_width = cas_scaler_out_info->padded_width; - descr->out_info[i].format = cas_scaler_out_info->format; - if (cas_scaler_vf_info) { - descr->vf_info[i].res.width = cas_scaler_vf_info->res.width; - descr->vf_info[i].res.height = cas_scaler_vf_info->res.height; - descr->vf_info[i].padded_width = cas_scaler_vf_info->padded_width; - ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); - } else { - descr->vf_info[i].res.width = 0; - descr->vf_info[i].res.height = 0; - descr->vf_info[i].padded_width = 0; - } - } else { - descr->is_output_stage[i] = false; - descr->internal_out_info[i].res.width = tmp_in_info.res.width / - max_scale_factor_per_stage; - descr->internal_out_info[i].res.height = tmp_in_info.res.height / - max_scale_factor_per_stage; + descr->in_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->in_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->internal_out_info = kmalloc(descr->num_stage * sizeof( + struct ia_css_frame_info), GFP_KERNEL); + if (!descr->internal_out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->vf_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); + if (!descr->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + + tmp_in_info = *cas_scaler_in_info; + for (i = 0; i < descr->num_stage; i++) { + descr->in_info[i] = tmp_in_info; + if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= + cas_scaler_out_info->res.width) { + descr->is_output_stage[i] = true; + if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { + descr->internal_out_info[i].res.width = cas_scaler_out_info->res.width; + descr->internal_out_info[i].res.height = cas_scaler_out_info->res.height; + descr->internal_out_info[i].padded_width = cas_scaler_out_info->padded_width; descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - ia_css_frame_info_init(&descr->internal_out_info[i], - tmp_in_info.res.width / max_scale_factor_per_stage, - tmp_in_info.res.height / max_scale_factor_per_stage, - IA_CSS_FRAME_FORMAT_YUV420, 0); - descr->out_info[i].res.width = 0; - descr->out_info[i].res.height = 0; + } else { + assert(i == (descr->num_stage - 1)); + descr->internal_out_info[i].res.width = 0; + descr->internal_out_info[i].res.height = 0; + } + descr->out_info[i].res.width = cas_scaler_out_info->res.width; + descr->out_info[i].res.height = cas_scaler_out_info->res.height; + descr->out_info[i].padded_width = cas_scaler_out_info->padded_width; + descr->out_info[i].format = cas_scaler_out_info->format; + if (cas_scaler_vf_info) { + descr->vf_info[i].res.width = cas_scaler_vf_info->res.width; + descr->vf_info[i].res.height = cas_scaler_vf_info->res.height; + descr->vf_info[i].padded_width = cas_scaler_vf_info->padded_width; + ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + } else { descr->vf_info[i].res.width = 0; descr->vf_info[i].res.height = 0; + descr->vf_info[i].padded_width = 0; } - tmp_in_info = descr->internal_out_info[i]; - } -ERR: - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", - err); - return err; + } else { + descr->is_output_stage[i] = false; + descr->internal_out_info[i].res.width = tmp_in_info.res.width / + max_scale_factor_per_stage; + descr->internal_out_info[i].res.height = tmp_in_info.res.height / + max_scale_factor_per_stage; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init(&descr->internal_out_info[i], + tmp_in_info.res.width / max_scale_factor_per_stage, + tmp_in_info.res.height / max_scale_factor_per_stage, + IA_CSS_FRAME_FORMAT_YUV420, 0); + descr->out_info[i].res.width = 0; + descr->out_info[i].res.height = 0; + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + } + tmp_in_info = descr->internal_out_info[i]; } +ERR: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", + err); + return err; +} - /* FIXME: merge most of this and single output version */ - static enum ia_css_err ia_css_pipe_create_cas_scaler_desc( - struct ia_css_pipe *pipe, - struct ia_css_cas_binary_descr *descr) { - struct ia_css_frame_info in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; - struct ia_css_frame_info *out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_frame_info *vf_out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_frame_info tmp_in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; - unsigned int i, j; - unsigned int hor_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], - ver_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], - scale_factor = 0; - unsigned int num_stages = 0; - enum ia_css_err err = IA_CSS_SUCCESS; +/* FIXME: merge most of this and single output version */ +static enum ia_css_err ia_css_pipe_create_cas_scaler_desc( + struct ia_css_pipe *pipe, + struct ia_css_cas_binary_descr *descr) { + struct ia_css_frame_info in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + struct ia_css_frame_info *out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info *vf_out_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame_info tmp_in_info = IA_CSS_BINARY_DEFAULT_FRAME_INFO; + unsigned int i, j; + unsigned int hor_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], + ver_scale_factor[IA_CSS_PIPE_MAX_OUTPUT_STAGE], + scale_factor = 0; + unsigned int num_stages = 0; + enum ia_css_err err = IA_CSS_SUCCESS; - unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; + unsigned int max_scale_factor_per_stage = MAX_PREFERRED_YUV_DS_PER_STEP; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipe_create_cas_scaler_desc() enter:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() enter:\n"); - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - out_info[i] = NULL; - vf_out_info[i] = NULL; - hor_scale_factor[i] = 0; - ver_scale_factor[i] = 0; + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + out_info[i] = NULL; + vf_out_info[i] = NULL; + hor_scale_factor[i] = 0; + ver_scale_factor[i] = 0; + } + + in_info.res = pipe->config.input_effective_res; + in_info.padded_width = in_info.res.width; + descr->num_output_stage = 0; + /* Find out how much scaling we need for each output */ + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (pipe->output_info[i].res.width != 0) { + out_info[i] = &pipe->output_info[i]; + if (pipe->vf_output_info[i].res.width != 0) + vf_out_info[i] = &pipe->vf_output_info[i]; + descr->num_output_stage += 1; } - in_info.res = pipe->config.input_effective_res; - in_info.padded_width = in_info.res.width; - descr->num_output_stage = 0; - /* Find out how much scaling we need for each output */ - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if (pipe->output_info[i].res.width != 0) { - out_info[i] = &pipe->output_info[i]; - if (pipe->vf_output_info[i].res.width != 0) - vf_out_info[i] = &pipe->vf_output_info[i]; - descr->num_output_stage += 1; - } + if (out_info[i]) { + hor_scale_factor[i] = CEIL_DIV(in_info.res.width, out_info[i]->res.width); + ver_scale_factor[i] = CEIL_DIV(in_info.res.height, out_info[i]->res.height); + /* use the same horizontal and vertical scaling factor for simplicity */ + assert(hor_scale_factor[i] == ver_scale_factor[i]); + scale_factor = 1; + do { + num_stages++; + scale_factor *= max_scale_factor_per_stage; + } while (scale_factor < hor_scale_factor[i]); - if (out_info[i]) { - hor_scale_factor[i] = CEIL_DIV(in_info.res.width, out_info[i]->res.width); - ver_scale_factor[i] = CEIL_DIV(in_info.res.height, out_info[i]->res.height); - /* use the same horizontal and vertical scaling factor for simplicity */ - assert(hor_scale_factor[i] == ver_scale_factor[i]); - scale_factor = 1; - do { - num_stages++; - scale_factor *= max_scale_factor_per_stage; - } while (scale_factor < hor_scale_factor[i]); - - in_info.res = out_info[i]->res; - } + in_info.res = out_info[i]->res; } + } - if (need_yuv_scaler_stage(pipe) && (num_stages == 0)) - num_stages = 1; + if (need_yuv_scaler_stage(pipe) && (num_stages == 0)) + num_stages = 1; - descr->num_stage = num_stages; + descr->num_stage = num_stages; - descr->in_info = kmalloc_array(descr->num_stage, - sizeof(struct ia_css_frame_info), GFP_KERNEL); - if (!descr->in_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->internal_out_info = kmalloc(descr->num_stage * sizeof( - struct ia_css_frame_info), GFP_KERNEL); - if (!descr->internal_out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), - GFP_KERNEL); - if (!descr->out_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), - GFP_KERNEL); - if (!descr->vf_info) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); - if (!descr->is_output_stage) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } + descr->in_info = kmalloc_array(descr->num_stage, + sizeof(struct ia_css_frame_info), GFP_KERNEL); + if (!descr->in_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->internal_out_info = kmalloc(descr->num_stage * sizeof( + struct ia_css_frame_info), GFP_KERNEL); + if (!descr->internal_out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->out_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->out_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->vf_info = kmalloc(descr->num_stage * sizeof(struct ia_css_frame_info), + GFP_KERNEL); + if (!descr->vf_info) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } + descr->is_output_stage = kmalloc(descr->num_stage * sizeof(bool), GFP_KERNEL); + if (!descr->is_output_stage) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; + } - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - if (out_info[i]) { - if (i > 0) { - assert((out_info[i - 1]->res.width >= out_info[i]->res.width) && - (out_info[i - 1]->res.height >= out_info[i]->res.height)); - } + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + if (out_info[i]) { + if (i > 0) { + assert((out_info[i - 1]->res.width >= out_info[i]->res.width) && + (out_info[i - 1]->res.height >= out_info[i]->res.height)); } } + } - tmp_in_info.res = pipe->config.input_effective_res; - tmp_in_info.format = IA_CSS_FRAME_FORMAT_YUV420; - for (i = 0, j = 0; i < descr->num_stage; i++) { - assert(j < 2); - assert(out_info[j]); - - descr->in_info[i] = tmp_in_info; - if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= - out_info[j]->res.width) { - descr->is_output_stage[i] = true; - if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { - descr->internal_out_info[i].res.width = out_info[j]->res.width; - descr->internal_out_info[i].res.height = out_info[j]->res.height; - descr->internal_out_info[i].padded_width = out_info[j]->padded_width; - descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - } else { - assert(i == (descr->num_stage - 1)); - descr->internal_out_info[i].res.width = 0; - descr->internal_out_info[i].res.height = 0; - } - descr->out_info[i].res.width = out_info[j]->res.width; - descr->out_info[i].res.height = out_info[j]->res.height; - descr->out_info[i].padded_width = out_info[j]->padded_width; - descr->out_info[i].format = out_info[j]->format; - if (vf_out_info[j]) { - descr->vf_info[i].res.width = vf_out_info[j]->res.width; - descr->vf_info[i].res.height = vf_out_info[j]->res.height; - descr->vf_info[i].padded_width = vf_out_info[j]->padded_width; - ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); - } else { - descr->vf_info[i].res.width = 0; - descr->vf_info[i].res.height = 0; - descr->vf_info[i].padded_width = 0; - } - j++; - } else { - descr->is_output_stage[i] = false; - descr->internal_out_info[i].res.width = tmp_in_info.res.width / - max_scale_factor_per_stage; - descr->internal_out_info[i].res.height = tmp_in_info.res.height / - max_scale_factor_per_stage; + tmp_in_info.res = pipe->config.input_effective_res; + tmp_in_info.format = IA_CSS_FRAME_FORMAT_YUV420; + for (i = 0, j = 0; i < descr->num_stage; i++) { + assert(j < 2); + assert(out_info[j]); + + descr->in_info[i] = tmp_in_info; + if ((tmp_in_info.res.width / max_scale_factor_per_stage) <= + out_info[j]->res.width) { + descr->is_output_stage[i] = true; + if ((descr->num_output_stage > 1) && (i != (descr->num_stage - 1))) { + descr->internal_out_info[i].res.width = out_info[j]->res.width; + descr->internal_out_info[i].res.height = out_info[j]->res.height; + descr->internal_out_info[i].padded_width = out_info[j]->padded_width; descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; - ia_css_frame_info_init(&descr->internal_out_info[i], - tmp_in_info.res.width / max_scale_factor_per_stage, - tmp_in_info.res.height / max_scale_factor_per_stage, - IA_CSS_FRAME_FORMAT_YUV420, 0); - descr->out_info[i].res.width = 0; - descr->out_info[i].res.height = 0; + } else { + assert(i == (descr->num_stage - 1)); + descr->internal_out_info[i].res.width = 0; + descr->internal_out_info[i].res.height = 0; + } + descr->out_info[i].res.width = out_info[j]->res.width; + descr->out_info[i].res.height = out_info[j]->res.height; + descr->out_info[i].padded_width = out_info[j]->padded_width; + descr->out_info[i].format = out_info[j]->format; + if (vf_out_info[j]) { + descr->vf_info[i].res.width = vf_out_info[j]->res.width; + descr->vf_info[i].res.height = vf_out_info[j]->res.height; + descr->vf_info[i].padded_width = vf_out_info[j]->padded_width; + ia_css_frame_info_set_format(&descr->vf_info[i], IA_CSS_FRAME_FORMAT_YUV_LINE); + } else { descr->vf_info[i].res.width = 0; descr->vf_info[i].res.height = 0; + descr->vf_info[i].padded_width = 0; } - tmp_in_info = descr->internal_out_info[i]; - } -ERR: - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", - err); - return err; - } - - static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr - *descr) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipe_destroy_cas_scaler_desc() enter:\n"); - kfree(descr->in_info); - descr->in_info = NULL; - kfree(descr->internal_out_info); - descr->internal_out_info = NULL; - kfree(descr->out_info); - descr->out_info = NULL; - kfree(descr->vf_info); - descr->vf_info = NULL; - kfree(descr->is_output_stage); - descr->is_output_stage = NULL; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_pipe_destroy_cas_scaler_desc() leave\n"); + j++; + } else { + descr->is_output_stage[i] = false; + descr->internal_out_info[i].res.width = tmp_in_info.res.width / + max_scale_factor_per_stage; + descr->internal_out_info[i].res.height = tmp_in_info.res.height / + max_scale_factor_per_stage; + descr->internal_out_info[i].format = IA_CSS_FRAME_FORMAT_YUV420; + ia_css_frame_info_init(&descr->internal_out_info[i], + tmp_in_info.res.width / max_scale_factor_per_stage, + tmp_in_info.res.height / max_scale_factor_per_stage, + IA_CSS_FRAME_FORMAT_YUV420, 0); + descr->out_info[i].res.width = 0; + descr->out_info[i].res.height = 0; + descr->vf_info[i].res.width = 0; + descr->vf_info[i].res.height = 0; + } + tmp_in_info = descr->internal_out_info[i]; } +ERR: + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_create_cas_scaler_desc() leave, err=%d\n", + err); + return err; +} - static enum ia_css_err - load_yuvpp_binaries(struct ia_css_pipe *pipe) { - enum ia_css_err err = IA_CSS_SUCCESS; - bool need_scaler = false; - struct ia_css_frame_info *vf_pp_in_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_yuvpp_settings *mycs; - struct ia_css_binary *next_binary; - struct ia_css_cas_binary_descr cas_scaler_descr = { }; - unsigned int i, j; - bool need_isp_copy_binary = false; - - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->stream); - assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); - - if (pipe->pipe_settings.yuvpp.copy_binary.info) - goto ERR; +static void ia_css_pipe_destroy_cas_scaler_desc(struct ia_css_cas_binary_descr + *descr) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_destroy_cas_scaler_desc() enter:\n"); + kfree(descr->in_info); + descr->in_info = NULL; + kfree(descr->internal_out_info); + descr->internal_out_info = NULL; + kfree(descr->out_info); + descr->out_info = NULL; + kfree(descr->vf_info); + descr->vf_info = NULL; + kfree(descr->is_output_stage); + descr->is_output_stage = NULL; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_pipe_destroy_cas_scaler_desc() leave\n"); +} - /* Set both must_be_raw and must_be_yuv to false then yuvpp can take rgb inputs */ - err = ia_css_util_check_input(&pipe->stream->config, false, false); - if (err != IA_CSS_SUCCESS) - goto ERR; +static enum ia_css_err +load_yuvpp_binaries(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + bool need_scaler = false; + struct ia_css_frame_info *vf_pp_in_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_yuvpp_settings *mycs; + struct ia_css_binary *next_binary; + struct ia_css_cas_binary_descr cas_scaler_descr = { }; + unsigned int i, j; + bool need_isp_copy_binary = false; - mycs = &pipe->pipe_settings.yuvpp; + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->stream); + assert(pipe->mode == IA_CSS_PIPE_ID_YUVPP); - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) - { - if (pipe->vf_output_info[i].res.width != 0) { - err = ia_css_util_check_vf_out_info(&pipe->output_info[i], - &pipe->vf_output_info[i]); - if (err != IA_CSS_SUCCESS) - goto ERR; - } - vf_pp_in_info[i] = NULL; - } + if (pipe->pipe_settings.yuvpp.copy_binary.info) + goto ERR; - need_scaler = need_yuv_scaler_stage(pipe); + /* Set both must_be_raw and must_be_yuv to false then yuvpp can take rgb inputs */ + err = ia_css_util_check_input(&pipe->stream->config, false, false); + if (err != IA_CSS_SUCCESS) + goto ERR; - /* we build up the pipeline starting at the end */ - /* Capture post-processing */ - if (need_scaler) - { - struct ia_css_binary_descr yuv_scaler_descr; + mycs = &pipe->pipe_settings.yuvpp; - err = ia_css_pipe_create_cas_scaler_desc(pipe, - &cas_scaler_descr); + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) + { + if (pipe->vf_output_info[i].res.width != 0) { + err = ia_css_util_check_vf_out_info(&pipe->output_info[i], + &pipe->vf_output_info[i]); if (err != IA_CSS_SUCCESS) goto ERR; - mycs->num_output = cas_scaler_descr.num_output_stage; - mycs->num_yuv_scaler = cas_scaler_descr.num_stage; - mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * - sizeof(struct ia_css_binary), GFP_KERNEL); - if (!mycs->yuv_scaler_binary) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage * - sizeof(bool), GFP_KERNEL); - if (!mycs->is_output_stage) { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - goto ERR; - } - for (i = 0; i < cas_scaler_descr.num_stage; i++) { - mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; - ia_css_pipe_get_yuvscaler_binarydesc(pipe, - &yuv_scaler_descr, &cas_scaler_descr.in_info[i], - &cas_scaler_descr.out_info[i], - &cas_scaler_descr.internal_out_info[i], - &cas_scaler_descr.vf_info[i]); - err = ia_css_binary_find(&yuv_scaler_descr, - &mycs->yuv_scaler_binary[i]); - if (err != IA_CSS_SUCCESS) - goto ERR; - } - ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); - } else - { - mycs->num_output = 1; } + vf_pp_in_info[i] = NULL; + } - if (need_scaler) - { - next_binary = &mycs->yuv_scaler_binary[0]; - } else - { - next_binary = NULL; - } + need_scaler = need_yuv_scaler_stage(pipe); -#if defined(USE_INPUT_SYSTEM_VERSION_2401) - /* - * NOTES - * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when - * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? - * - * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ - * binary". However, the "yuv_scale_binary" does NOT support the input-frame - * format as "IA_CSS_STREAM _FORMAT_YUV422_8". - * - * Hence, the "isp_copy_binary" is required to be present in front of the "yuv - * _scale_binary". It would translate the input-frame to the frame formats that - * are supported by the "yuv_scale_binary". - * - * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ - * pp_defs.h" for the list of input-frame formats that are supported by the - * "yuv_scale_binary". - */ - need_isp_copy_binary = - (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8); -#else /* !USE_INPUT_SYSTEM_VERSION_2401 */ - need_isp_copy_binary = true; -#endif /* USE_INPUT_SYSTEM_VERSION_2401 */ + /* we build up the pipeline starting at the end */ + /* Capture post-processing */ + if (need_scaler) + { + struct ia_css_binary_descr yuv_scaler_descr; - if (need_isp_copy_binary) - { - err = load_copy_binary(pipe, - &mycs->copy_binary, - next_binary); - - if (err != IA_CSS_SUCCESS) - goto ERR; - - /* - * NOTES - * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? - * - * In some use cases, the first stage in the "yuvpp" pipe is the - * "isp_copy_binary". The "isp_copy_binary" is designed to process - * the input from either the system DDR or from the IPU internal VMEM. - * So it provides the flag "online" to specify where its input is from, - * i.e.: - * - * (1) "online <= true", the input is from the IPU internal VMEM. - * (2) "online <= false", the input is from the system DDR. - * - * In other use cases, the first stage in the "yuvpp" pipe is the - * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the - * input ONLY from the system DDR. So it does not provide the flag "online" - * to specify where its input is from. - */ - pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; - } - - /* Viewfinder post-processing */ - if (need_scaler) - { - for (i = 0, j = 0; i < mycs->num_yuv_scaler; i++) { - if (mycs->is_output_stage[i]) { - assert(j < 2); - vf_pp_in_info[j] = - &mycs->yuv_scaler_binary[i].vf_frame_info; - j++; - } - } - mycs->num_vf_pp = j; - } else - { - vf_pp_in_info[0] = - &mycs->copy_binary.vf_frame_info; - for (i = 1; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { - vf_pp_in_info[i] = NULL; - } - mycs->num_vf_pp = 1; + err = ia_css_pipe_create_cas_scaler_desc(pipe, + &cas_scaler_descr); + if (err != IA_CSS_SUCCESS) + goto ERR; + mycs->num_output = cas_scaler_descr.num_output_stage; + mycs->num_yuv_scaler = cas_scaler_descr.num_stage; + mycs->yuv_scaler_binary = kzalloc(cas_scaler_descr.num_stage * + sizeof(struct ia_css_binary), GFP_KERNEL); + if (!mycs->yuv_scaler_binary) { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; } - mycs->vf_pp_binary = kzalloc(mycs->num_vf_pp * sizeof(struct ia_css_binary), - GFP_KERNEL); - if (!mycs->vf_pp_binary) - { + mycs->is_output_stage = kzalloc(cas_scaler_descr.num_stage * + sizeof(bool), GFP_KERNEL); + if (!mycs->is_output_stage) { err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; goto ERR; } + for (i = 0; i < cas_scaler_descr.num_stage; i++) { + mycs->is_output_stage[i] = cas_scaler_descr.is_output_stage[i]; + ia_css_pipe_get_yuvscaler_binarydesc(pipe, + &yuv_scaler_descr, &cas_scaler_descr.in_info[i], + &cas_scaler_descr.out_info[i], + &cas_scaler_descr.internal_out_info[i], + &cas_scaler_descr.vf_info[i]); + err = ia_css_binary_find(&yuv_scaler_descr, + &mycs->yuv_scaler_binary[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + } else + { + mycs->num_output = 1; + } - { - struct ia_css_binary_descr vf_pp_descr; + if (need_scaler) + { + next_binary = &mycs->yuv_scaler_binary[0]; + } else + { + next_binary = NULL; + } - for (i = 0; i < mycs->num_vf_pp; i++) - { - if (pipe->vf_output_info[i].res.width != 0) { - ia_css_pipe_get_vfpp_binarydesc(pipe, - &vf_pp_descr, vf_pp_in_info[i], &pipe->vf_output_info[i]); - err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary[i]); - if (err != IA_CSS_SUCCESS) - goto ERR; - } - } - } +#if defined(USE_INPUT_SYSTEM_VERSION_2401) + /* + * NOTES + * - Why does the "yuvpp" pipe needs "isp_copy_binary" (i.e. ISP Copy) when + * its input is "ATOMISP_INPUT_FORMAT_YUV422_8"? + * + * In most use cases, the first stage in the "yuvpp" pipe is the "yuv_scale_ + * binary". However, the "yuv_scale_binary" does NOT support the input-frame + * format as "IA_CSS_STREAM _FORMAT_YUV422_8". + * + * Hence, the "isp_copy_binary" is required to be present in front of the "yuv + * _scale_binary". It would translate the input-frame to the frame formats that + * are supported by the "yuv_scale_binary". + * + * Please refer to "FrameWork/css/isp/pipes/capture_pp/capture_pp_1.0/capture_ + * pp_defs.h" for the list of input-frame formats that are supported by the + * "yuv_scale_binary". + */ + need_isp_copy_binary = + (pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_YUV422_8); +#else /* !USE_INPUT_SYSTEM_VERSION_2401 */ + need_isp_copy_binary = true; +#endif /* USE_INPUT_SYSTEM_VERSION_2401 */ + + if (need_isp_copy_binary) + { + err = load_copy_binary(pipe, + &mycs->copy_binary, + next_binary); if (err != IA_CSS_SUCCESS) goto ERR; -ERR: - if (need_scaler) - { - ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); + /* + * NOTES + * - Why is "pipe->pipe_settings.capture.copy_binary.online" specified? + * + * In some use cases, the first stage in the "yuvpp" pipe is the + * "isp_copy_binary". The "isp_copy_binary" is designed to process + * the input from either the system DDR or from the IPU internal VMEM. + * So it provides the flag "online" to specify where its input is from, + * i.e.: + * + * (1) "online <= true", the input is from the IPU internal VMEM. + * (2) "online <= false", the input is from the system DDR. + * + * In other use cases, the first stage in the "yuvpp" pipe is the + * "yuv_scale_binary". "The "yuv_scale_binary" is designed to process the + * input ONLY from the system DDR. So it does not provide the flag "online" + * to specify where its input is from. + */ + pipe->pipe_settings.capture.copy_binary.online = pipe->stream->config.online; + } + + /* Viewfinder post-processing */ + if (need_scaler) + { + for (i = 0, j = 0; i < mycs->num_yuv_scaler; i++) { + if (mycs->is_output_stage[i]) { + assert(j < 2); + vf_pp_in_info[j] = + &mycs->yuv_scaler_binary[i].vf_frame_info; + j++; + } } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "load_yuvpp_binaries() leave, err=%d\n", - err); - return err; + mycs->num_vf_pp = j; + } else + { + vf_pp_in_info[0] = + &mycs->copy_binary.vf_frame_info; + for (i = 1; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { + vf_pp_in_info[i] = NULL; + } + mycs->num_vf_pp = 1; + } + mycs->vf_pp_binary = kzalloc(mycs->num_vf_pp * sizeof(struct ia_css_binary), + GFP_KERNEL); + if (!mycs->vf_pp_binary) + { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + goto ERR; } - static enum ia_css_err - unload_yuvpp_binaries(struct ia_css_pipe *pipe) { - unsigned int i; - - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + { + struct ia_css_binary_descr vf_pp_descr; - if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) + for (i = 0; i < mycs->num_vf_pp; i++) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - ia_css_binary_unload(&pipe->pipe_settings.yuvpp.copy_binary); - for (i = 0; i < pipe->pipe_settings.yuvpp.num_yuv_scaler; i++) - { - ia_css_binary_unload(&pipe->pipe_settings.yuvpp.yuv_scaler_binary[i]); - } - for (i = 0; i < pipe->pipe_settings.yuvpp.num_vf_pp; i++) - { - ia_css_binary_unload(&pipe->pipe_settings.yuvpp.vf_pp_binary[i]); + if (pipe->vf_output_info[i].res.width != 0) { + ia_css_pipe_get_vfpp_binarydesc(pipe, + &vf_pp_descr, vf_pp_in_info[i], &pipe->vf_output_info[i]); + err = ia_css_binary_find(&vf_pp_descr, &mycs->vf_pp_binary[i]); + if (err != IA_CSS_SUCCESS) + goto ERR; + } } - kfree(pipe->pipe_settings.yuvpp.is_output_stage); - pipe->pipe_settings.yuvpp.is_output_stage = NULL; - kfree(pipe->pipe_settings.yuvpp.yuv_scaler_binary); - pipe->pipe_settings.yuvpp.yuv_scaler_binary = NULL; - kfree(pipe->pipe_settings.yuvpp.vf_pp_binary); - pipe->pipe_settings.yuvpp.vf_pp_binary = NULL; + } - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; + if (err != IA_CSS_SUCCESS) + goto ERR; + +ERR: + if (need_scaler) + { + ia_css_pipe_destroy_cas_scaler_desc(&cas_scaler_descr); } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "load_yuvpp_binaries() leave, err=%d\n", + err); + return err; +} - static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) { - struct ia_css_binary *copy_binary; - enum ia_css_err err = IA_CSS_SUCCESS; - enum sh_css_pipe_config_override copy_ovrd; - enum ia_css_input_mode yuvpp_pipe_input_mode; +static enum ia_css_err +unload_yuvpp_binaries(struct ia_css_pipe *pipe) { + unsigned int i; - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - yuvpp_pipe_input_mode = pipe->stream->config.mode; + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.copy_binary); + for (i = 0; i < pipe->pipe_settings.yuvpp.num_yuv_scaler; i++) + { + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.yuv_scaler_binary[i]); + } + for (i = 0; i < pipe->pipe_settings.yuvpp.num_vf_pp; i++) + { + ia_css_binary_unload(&pipe->pipe_settings.yuvpp.vf_pp_binary[i]); + } + kfree(pipe->pipe_settings.yuvpp.is_output_stage); + pipe->pipe_settings.yuvpp.is_output_stage = NULL; + kfree(pipe->pipe_settings.yuvpp.yuv_scaler_binary); + pipe->pipe_settings.yuvpp.yuv_scaler_binary = NULL; + kfree(pipe->pipe_settings.yuvpp.vf_pp_binary); + pipe->pipe_settings.yuvpp.vf_pp_binary = NULL; - copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} - sh_css_metrics_start_frame(); +static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) { + struct ia_css_binary *copy_binary; + enum ia_css_err err = IA_CSS_SUCCESS; + enum sh_css_pipe_config_override copy_ovrd; + enum ia_css_input_mode yuvpp_pipe_input_mode; - /* multi stream video needs mipi buffers */ + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } -#if !defined(HAS_NO_INPUT_SYSTEM) && (defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)) - err = send_mipi_frames(pipe); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } -#endif + yuvpp_pipe_input_mode = pipe->stream->config.mode; - { - unsigned int thread_id; + copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - } + sh_css_metrics_start_frame(); - start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode); + /* multi stream video needs mipi buffers */ +#if !defined(HAS_NO_INPUT_SYSTEM) && (defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)) + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } +#endif - static enum ia_css_err - sh_css_pipe_unload_binaries(struct ia_css_pipe *pipe) { - enum ia_css_err err = IA_CSS_SUCCESS; + { + unsigned int thread_id; - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + } - if (!pipe) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + start_pipe(pipe, copy_ovrd, yuvpp_pipe_input_mode); - switch (pipe->mode) - { - case IA_CSS_PIPE_ID_PREVIEW: - err = unload_preview_binaries(pipe); - break; - case IA_CSS_PIPE_ID_VIDEO: - err = unload_video_binaries(pipe); - break; - case IA_CSS_PIPE_ID_CAPTURE: - err = unload_capture_binaries(pipe); - break; - case IA_CSS_PIPE_ID_YUVPP: - err = unload_yuvpp_binaries(pipe); - break; - default: - break; - } - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} + +static enum ia_css_err +sh_css_pipe_unload_binaries(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + + if (!pipe) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; + } + + switch (pipe->mode) + { + case IA_CSS_PIPE_ID_PREVIEW: + err = unload_preview_binaries(pipe); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = unload_video_binaries(pipe); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = unload_capture_binaries(pipe); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = unload_yuvpp_binaries(pipe); + break; + default: + break; } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} - static enum ia_css_err - sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) { - enum ia_css_err err = IA_CSS_SUCCESS; +static enum ia_css_err +sh_css_pipe_load_binaries(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; - assert(pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_load_binaries() enter:\n"); + assert(pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_pipe_load_binaries() enter:\n"); - /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) - return err; + /* PIPE_MODE_COPY has no binaries, but has output frames to outside*/ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + return err; - switch (pipe->mode) - { - case IA_CSS_PIPE_ID_PREVIEW: - err = load_preview_binaries(pipe); - break; - case IA_CSS_PIPE_ID_VIDEO: - err = load_video_binaries(pipe); - break; - case IA_CSS_PIPE_ID_CAPTURE: - err = load_capture_binaries(pipe); - break; - case IA_CSS_PIPE_ID_YUVPP: - err = load_yuvpp_binaries(pipe); - break; - case IA_CSS_PIPE_ID_ACC: - break; - default: + switch (pipe->mode) + { + case IA_CSS_PIPE_ID_PREVIEW: + err = load_preview_binaries(pipe); + break; + case IA_CSS_PIPE_ID_VIDEO: + err = load_video_binaries(pipe); + break; + case IA_CSS_PIPE_ID_CAPTURE: + err = load_capture_binaries(pipe); + break; + case IA_CSS_PIPE_ID_YUVPP: + err = load_yuvpp_binaries(pipe); + break; + case IA_CSS_PIPE_ID_ACC: + break; + default: + err = IA_CSS_ERR_INTERNAL_ERROR; + break; + } + if (err != IA_CSS_SUCCESS) + { + if (sh_css_pipe_unload_binaries(pipe) != IA_CSS_SUCCESS) { + /* currently css does not support multiple error returns in a single function, + * using IA_CSS_ERR_INTERNAL_ERROR in this case */ err = IA_CSS_ERR_INTERNAL_ERROR; - break; } - if (err != IA_CSS_SUCCESS) - { - if (sh_css_pipe_unload_binaries(pipe) != IA_CSS_SUCCESS) { - /* currently css does not support multiple error returns in a single function, - * using IA_CSS_ERR_INTERNAL_ERROR in this case */ - err = IA_CSS_ERR_INTERNAL_ERROR; - } - } - return err; } + return err; +} - static enum ia_css_err - create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) { - struct ia_css_pipeline *me; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_pipeline_stage *vf_pp_stage = NULL, - *copy_stage = NULL, - *yuv_scaler_stage = NULL; - struct ia_css_binary *copy_binary, - *vf_pp_binary, - *yuv_scaler_binary; - bool need_scaler = false; - unsigned int num_stage, num_vf_pp_stage, num_output_stage; - unsigned int i, j; - - struct ia_css_frame *in_frame = NULL; - struct ia_css_frame *out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_frame *bin_out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - struct ia_css_frame *vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; - struct ia_css_pipeline_stage_desc stage_desc; - bool need_in_frameinfo_memory = false; +static enum ia_css_err +create_host_yuvpp_pipeline(struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage *vf_pp_stage = NULL, + *copy_stage = NULL, + *yuv_scaler_stage = NULL; + struct ia_css_binary *copy_binary, + *vf_pp_binary, + *yuv_scaler_binary; + bool need_scaler = false; + unsigned int num_stage, num_vf_pp_stage, num_output_stage; + unsigned int i, j; + + struct ia_css_frame *in_frame = NULL; + struct ia_css_frame *out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_frame *bin_out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE]; + struct ia_css_pipeline_stage_desc stage_desc; + bool need_in_frameinfo_memory = false; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - bool sensor = false; - bool buffered_sensor = false; - bool online = false; - bool continuous = false; + bool sensor = false; + bool buffered_sensor = false; + bool online = false; + bool continuous = false; #endif - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - me = &pipe->pipeline; - ia_css_pipeline_clean(me); - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) - { - out_frame[i] = NULL; - vf_frame[i] = NULL; - } - ia_css_pipe_util_create_output_frames(bin_out_frame); - num_stage = pipe->pipe_settings.yuvpp.num_yuv_scaler; - num_vf_pp_stage = pipe->pipe_settings.yuvpp.num_vf_pp; - num_output_stage = pipe->pipe_settings.yuvpp.num_output; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_YUVPP)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + me = &pipe->pipeline; + ia_css_pipeline_clean(me); + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) + { + out_frame[i] = NULL; + vf_frame[i] = NULL; + } + ia_css_pipe_util_create_output_frames(bin_out_frame); + num_stage = pipe->pipe_settings.yuvpp.num_yuv_scaler; + num_vf_pp_stage = pipe->pipe_settings.yuvpp.num_vf_pp; + num_output_stage = pipe->pipe_settings.yuvpp.num_output; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ - sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; - buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; - online = pipe->stream->config.online; - continuous = pipe->stream->config.continuous; - need_in_frameinfo_memory = - !((sensor && (online || continuous)) || (buffered_sensor && continuous)); + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ + sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR; + buffered_sensor = pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; + need_in_frameinfo_memory = + !((sensor && (online || continuous)) || (buffered_sensor && continuous)); #else - /* Construct in_frame info (only in case we have dynamic input */ - need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - /* the input frame can come from: - * a) memory: connect yuvscaler to me->in_frame - * b) sensor, via copy binary: connect yuvscaler to copy binary later on */ - if (need_in_frameinfo_memory) - { - /* TODO: improve for different input formats. */ + /* the input frame can come from: + * a) memory: connect yuvscaler to me->in_frame + * b) sensor, via copy binary: connect yuvscaler to copy binary later on */ + if (need_in_frameinfo_memory) + { + /* TODO: improve for different input formats. */ + /* + * "pipe->stream->config.input_config.format" represents the sensor output + * frame format, e.g. YUV422 8-bit. + * + * "in_frame_format" represents the imaging pipe's input frame format, e.g. + * Bayer-Quad RAW. + */ + int in_frame_format; + + if (pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { + in_frame_format = IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8; + } else if (pipe->stream->config.input_config.format == + ATOMISP_INPUT_FORMAT_YUV422_8) { /* - * "pipe->stream->config.input_config.format" represents the sensor output - * frame format, e.g. YUV422 8-bit. - * - * "in_frame_format" represents the imaging pipe's input frame format, e.g. - * Bayer-Quad RAW. - */ - int in_frame_format; - - if (pipe->stream->config.input_config.format == - ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY) { - in_frame_format = IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8; - } else if (pipe->stream->config.input_config.format == - ATOMISP_INPUT_FORMAT_YUV422_8) { - /* - * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", - * the "isp_copy_var" binary is selected as the first stage in the yuvpp - * pipe. - * - * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from - * the frame buffer (at DDR) to the frame-line buffer (at VMEM). - * - * By now, the "isp_copy_var" binary does NOT provide a separated - * frame-line buffer to store the YUV422-8 pixels. Instead, it stores - * the YUV422-8 pixels in the frame-line buffer which is designed to - * store the Bayer-Quad RAW pixels. - * - * To direct the "isp_copy_var" binary reading from the RAW frame-line - * buffer, its input frame format must be specified as "IA_CSS_FRAME_ - * FORMAT_RAW". - */ - in_frame_format = IA_CSS_FRAME_FORMAT_RAW; - } else { - in_frame_format = IA_CSS_FRAME_FORMAT_NV12; - } + * When the sensor output frame format is "ATOMISP_INPUT_FORMAT_YUV422_8", + * the "isp_copy_var" binary is selected as the first stage in the yuvpp + * pipe. + * + * For the "isp_copy_var" binary, it reads the YUV422-8 pixels from + * the frame buffer (at DDR) to the frame-line buffer (at VMEM). + * + * By now, the "isp_copy_var" binary does NOT provide a separated + * frame-line buffer to store the YUV422-8 pixels. Instead, it stores + * the YUV422-8 pixels in the frame-line buffer which is designed to + * store the Bayer-Quad RAW pixels. + * + * To direct the "isp_copy_var" binary reading from the RAW frame-line + * buffer, its input frame format must be specified as "IA_CSS_FRAME_ + * FORMAT_RAW". + */ + in_frame_format = IA_CSS_FRAME_FORMAT_RAW; + } else { + in_frame_format = IA_CSS_FRAME_FORMAT_NV12; + } + + err = init_in_frameinfo_memory_defaults(pipe, + &me->in_frame, + in_frame_format); - err = init_in_frameinfo_memory_defaults(pipe, - &me->in_frame, - in_frame_format); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + in_frame = &me->in_frame; + } else + { + in_frame = NULL; + } + for (i = 0; i < num_output_stage; i++) + { + assert(i < IA_CSS_PIPE_MAX_OUTPUT_STAGE); + if (pipe->output_info[i].res.width != 0) { + err = init_out_frameinfo_defaults(pipe, &me->out_frame[i], i); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - - in_frame = &me->in_frame; - } else - { - in_frame = NULL; + out_frame[i] = &me->out_frame[i]; } - for (i = 0; i < num_output_stage; i++) - { - assert(i < IA_CSS_PIPE_MAX_OUTPUT_STAGE); - if (pipe->output_info[i].res.width != 0) { - err = init_out_frameinfo_defaults(pipe, &me->out_frame[i], i); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - out_frame[i] = &me->out_frame[i]; - } - - /* Construct vf_frame info (only in case we have VF) */ - if (pipe->vf_output_info[i].res.width != 0) { - err = init_vf_frameinfo_defaults(pipe, &me->vf_frame[i], i); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - vf_frame[i] = &me->vf_frame[i]; + /* Construct vf_frame info (only in case we have VF) */ + if (pipe->vf_output_info[i].res.width != 0) { + err = init_vf_frameinfo_defaults(pipe, &me->vf_frame[i], i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } + vf_frame[i] = &me->vf_frame[i]; } + } - copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; - vf_pp_binary = pipe->pipe_settings.yuvpp.vf_pp_binary; - yuv_scaler_binary = pipe->pipe_settings.yuvpp.yuv_scaler_binary; - need_scaler = need_yuv_scaler_stage(pipe); + copy_binary = &pipe->pipe_settings.yuvpp.copy_binary; + vf_pp_binary = pipe->pipe_settings.yuvpp.vf_pp_binary; + yuv_scaler_binary = pipe->pipe_settings.yuvpp.yuv_scaler_binary; + need_scaler = need_yuv_scaler_stage(pipe); - if (pipe->pipe_settings.yuvpp.copy_binary.info) - { - struct ia_css_frame *in_frame_local = NULL; + if (pipe->pipe_settings.yuvpp.copy_binary.info) + { + struct ia_css_frame *in_frame_local = NULL; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* After isp copy is enabled in_frame needs to be passed. */ - if (!online) - in_frame_local = in_frame; + /* After isp copy is enabled in_frame needs to be passed. */ + if (!online) + in_frame_local = in_frame; #endif - if (need_scaler) { - ia_css_pipe_util_set_output_frames(bin_out_frame, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - bin_out_frame, in_frame_local, NULL); + if (need_scaler) { + ia_css_pipe_util_set_output_frames(bin_out_frame, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + bin_out_frame, in_frame_local, NULL); + } else { + ia_css_pipe_util_set_output_frames(bin_out_frame, 0, out_frame[0]); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + bin_out_frame, in_frame_local, NULL); + } + + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ©_stage); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + + if (copy_stage) { + /* if we use yuv scaler binary, vf output should be from there */ + copy_stage->args.copy_vf = !need_scaler; + /* for yuvpp pipe, it should always be enabled */ + copy_stage->args.copy_output = true; + /* connect output of copy binary to input of yuv scaler */ + in_frame = copy_stage->args.out_frame[0]; + } + } + + if (need_scaler) + { + struct ia_css_frame *tmp_out_frame = NULL; + struct ia_css_frame *tmp_vf_frame = NULL; + struct ia_css_frame *tmp_in_frame = in_frame; + + for (i = 0, j = 0; i < num_stage; i++) { + assert(j < num_output_stage); + if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { + tmp_out_frame = out_frame[j]; + tmp_vf_frame = vf_frame[j]; } else { - ia_css_pipe_util_set_output_frames(bin_out_frame, 0, out_frame[0]); - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - bin_out_frame, in_frame_local, NULL); + tmp_out_frame = NULL; + tmp_vf_frame = NULL; } - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ©_stage); + err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, + NULL, + &yuv_scaler_binary[i], + &yuv_scaler_stage); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - - if (copy_stage) { - /* if we use yuv scaler binary, vf output should be from there */ - copy_stage->args.copy_vf = !need_scaler; - /* for yuvpp pipe, it should always be enabled */ - copy_stage->args.copy_output = true; - /* connect output of copy binary to input of yuv scaler */ - in_frame = copy_stage->args.out_frame[0]; + /* we use output port 1 as internal output port */ + tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; + if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { + if (tmp_vf_frame && (tmp_vf_frame->info.res.width != 0)) { + in_frame = yuv_scaler_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, tmp_vf_frame, &vf_pp_binary[j], + &vf_pp_stage); + + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } + j++; } } + } else if (copy_stage) + { + if (vf_frame[0] && vf_frame[0]->info.res.width != 0) { + in_frame = copy_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, vf_frame[0], &vf_pp_binary[0], + &vf_pp_stage); + } + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } - if (need_scaler) - { - struct ia_css_frame *tmp_out_frame = NULL; - struct ia_css_frame *tmp_vf_frame = NULL; - struct ia_css_frame *tmp_in_frame = in_frame; - - for (i = 0, j = 0; i < num_stage; i++) { - assert(j < num_output_stage); - if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { - tmp_out_frame = out_frame[j]; - tmp_vf_frame = vf_frame[j]; - } else { - tmp_out_frame = NULL; - tmp_vf_frame = NULL; - } + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, - NULL, - &yuv_scaler_binary[i], - &yuv_scaler_stage); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - /* we use output port 1 as internal output port */ - tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; - if (pipe->pipe_settings.yuvpp.is_output_stage[i]) { - if (tmp_vf_frame && (tmp_vf_frame->info.res.width != 0)) { - in_frame = yuv_scaler_stage->args.out_vf_frame; - err = add_vf_pp_stage(pipe, in_frame, tmp_vf_frame, &vf_pp_binary[j], - &vf_pp_stage); - - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } - j++; - } - } - } else if (copy_stage) - { - if (vf_frame[0] && vf_frame[0]->info.res.width != 0) { - in_frame = copy_stage->args.out_vf_frame; - err = add_vf_pp_stage(pipe, in_frame, vf_frame[0], &vf_pp_binary[0], - &vf_pp_stage); - } - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } + return IA_CSS_SUCCESS; +} - ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); +static enum ia_css_err +create_host_copy_pipeline(struct ia_css_pipe *pipe, + unsigned int max_input_width, + struct ia_css_frame *out_frame) { + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage_desc stage_desc; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_copy_pipeline() enter:\n"); - return IA_CSS_SUCCESS; - } + /* pipeline already created as part of create_host_pipeline_structure */ + me = &pipe->pipeline; + ia_css_pipeline_clean(me); - static enum ia_css_err - create_host_copy_pipeline(struct ia_css_pipe *pipe, - unsigned int max_input_width, - struct ia_css_frame *out_frame) { - struct ia_css_pipeline *me; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_pipeline_stage_desc stage_desc; + /* Construct out_frame info */ + out_frame->contiguous = false; + out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_copy_pipeline() enter:\n"); + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) + { + ia_css_frame_info_init( + &out_frame->info, + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + } else if (out_frame->info.format == IA_CSS_FRAME_FORMAT_RAW) + { + out_frame->info.raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); + } - /* pipeline already created as part of create_host_pipeline_structure */ - me = &pipe->pipeline; - ia_css_pipeline_clean(me); + me->num_stages = 1; + me->pipe_id = IA_CSS_PIPE_ID_COPY; + pipe->mode = IA_CSS_PIPE_ID_COPY; - /* Construct out_frame info */ - out_frame->contiguous = false; - out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, + IA_CSS_PIPELINE_RAW_COPY, max_input_width); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); - if (copy_on_sp(pipe) && - pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) - { - ia_css_frame_info_init( - &out_frame->info, - JPEG_BYTES, - 1, - IA_CSS_FRAME_FORMAT_BINARY_8, - 0); - } else if (out_frame->info.format == IA_CSS_FRAME_FORMAT_RAW) - { - out_frame->info.raw_bit_depth = - ia_css_pipe_util_pipe_input_format_bpp(pipe); - } + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - me->num_stages = 1; - me->pipe_id = IA_CSS_PIPE_ID_COPY; - pipe->mode = IA_CSS_PIPE_ID_COPY; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_copy_pipeline() leave:\n"); - ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, - IA_CSS_PIPELINE_RAW_COPY, max_input_width); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - NULL); + return err; +} - ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); +static enum ia_css_err +create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me = &pipe->pipeline; + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_pipeline_stage_desc stage_desc; + struct ia_css_frame *out_frame = &me->out_frame[0]; + struct ia_css_pipeline_stage *out_stage = NULL; + unsigned int thread_id; + enum sh_css_queue_id queue_id; + unsigned int max_input_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_copy_pipeline() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_isyscopy_capture_pipeline() enter:\n"); + ia_css_pipeline_clean(me); + /* Construct out_frame info */ + err = sh_css_pipe_get_output_frame_info(pipe, &out_frame->info, 0); + if (err != IA_CSS_SUCCESS) return err; - } - - static enum ia_css_err - create_host_isyscopy_capture_pipeline(struct ia_css_pipe *pipe) { - struct ia_css_pipeline *me = &pipe->pipeline; - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_pipeline_stage_desc stage_desc; - struct ia_css_frame *out_frame = &me->out_frame[0]; - struct ia_css_pipeline_stage *out_stage = NULL; - unsigned int thread_id; - enum sh_css_queue_id queue_id; - unsigned int max_input_width = MAX_VECTORS_PER_INPUT_LINE_CONT * ISP_VEC_NELEMS; + out_frame->contiguous = false; + out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, &queue_id); + out_frame->dynamic_queue_id = queue_id; + out_frame->buf_type = IA_CSS_BUFFER_TYPE_OUTPUT_FRAME; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_isyscopy_capture_pipeline() enter:\n"); - ia_css_pipeline_clean(me); + me->num_stages = 1; + me->pipe_id = IA_CSS_PIPE_ID_CAPTURE; + pipe->mode = IA_CSS_PIPE_ID_CAPTURE; + ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, + IA_CSS_PIPELINE_ISYS_COPY, max_input_width); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, &out_stage); + if (err != IA_CSS_SUCCESS) + return err; - /* Construct out_frame info */ - err = sh_css_pipe_get_output_frame_info(pipe, &out_frame->info, 0); - if (err != IA_CSS_SUCCESS) - return err; - out_frame->contiguous = false; - out_frame->flash_state = IA_CSS_FRAME_FLASH_STATE_NONE; - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - ia_css_query_internal_queue_id(IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, thread_id, &queue_id); - out_frame->dynamic_queue_id = queue_id; - out_frame->buf_type = IA_CSS_BUFFER_TYPE_OUTPUT_FRAME; - - me->num_stages = 1; - me->pipe_id = IA_CSS_PIPE_ID_CAPTURE; - pipe->mode = IA_CSS_PIPE_ID_CAPTURE; - ia_css_pipe_get_sp_func_stage_desc(&stage_desc, out_frame, - IA_CSS_PIPELINE_ISYS_COPY, max_input_width); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, &out_stage); - if (err != IA_CSS_SUCCESS) - return err; + ia_css_pipeline_finalize_stages(me, pipe->stream->config.continuous); - ia_css_pipeline_finalize_stages(me, pipe->stream->config.continuous); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_isyscopy_capture_pipeline() leave:\n"); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_isyscopy_capture_pipeline() leave:\n"); + return err; +} - return err; - } +static enum ia_css_err +create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me; + enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_capture_mode mode; + struct ia_css_pipeline_stage *current_stage = NULL; + struct ia_css_pipeline_stage *yuv_scaler_stage = NULL; + struct ia_css_binary *copy_binary, + *primary_binary[MAX_NUM_PRIMARY_STAGES], + *vf_pp_binary, + *pre_isp_binary, + *anr_gdc_binary, + *post_isp_binary, + *yuv_scaler_binary, + *capture_pp_binary, + *capture_ldc_binary; + bool need_pp = false; + bool raw; - static enum ia_css_err - create_host_regular_capture_pipeline(struct ia_css_pipe *pipe) { - struct ia_css_pipeline *me; - enum ia_css_err err = IA_CSS_SUCCESS; - enum ia_css_capture_mode mode; - struct ia_css_pipeline_stage *current_stage = NULL; - struct ia_css_pipeline_stage *yuv_scaler_stage = NULL; - struct ia_css_binary *copy_binary, - *primary_binary[MAX_NUM_PRIMARY_STAGES], - *vf_pp_binary, - *pre_isp_binary, - *anr_gdc_binary, - *post_isp_binary, - *yuv_scaler_binary, - *capture_pp_binary, - *capture_ldc_binary; - bool need_pp = false; - bool raw; - - struct ia_css_frame *in_frame; - struct ia_css_frame *out_frame; - struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; - struct ia_css_frame *vf_frame; - struct ia_css_pipeline_stage_desc stage_desc; - bool need_in_frameinfo_memory = false; + struct ia_css_frame *in_frame; + struct ia_css_frame *out_frame; + struct ia_css_frame *out_frames[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; + struct ia_css_frame *vf_frame; + struct ia_css_pipeline_stage_desc stage_desc; + bool need_in_frameinfo_memory = false; #ifdef USE_INPUT_SYSTEM_VERSION_2401 - bool sensor = false; - bool buffered_sensor = false; - bool online = false; - bool continuous = false; + bool sensor = false; + bool buffered_sensor = false; + bool online = false; + bool continuous = false; #endif - unsigned int i, num_yuv_scaler, num_primary_stage; - bool need_yuv_pp = false; - bool *is_output_stage = NULL; - bool need_ldc = false; + unsigned int i, num_yuv_scaler, num_primary_stage; + bool need_yuv_pp = false; + bool *is_output_stage = NULL; + bool need_ldc = false; - IA_CSS_ENTER_PRIVATE(""); - assert(pipe); - assert(pipe->stream); - assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); + IA_CSS_ENTER_PRIVATE(""); + assert(pipe); + assert(pipe->stream); + assert(pipe->mode == IA_CSS_PIPE_ID_CAPTURE || pipe->mode == IA_CSS_PIPE_ID_COPY); - me = &pipe->pipeline; - mode = pipe->config.default_capture_config.mode; - raw = (mode == IA_CSS_CAPTURE_MODE_RAW); - ia_css_pipeline_clean(me); - ia_css_pipe_util_create_output_frames(out_frames); + me = &pipe->pipeline; + mode = pipe->config.default_capture_config.mode; + raw = (mode == IA_CSS_CAPTURE_MODE_RAW); + ia_css_pipeline_clean(me); + ia_css_pipe_util_create_output_frames(out_frames); #ifdef USE_INPUT_SYSTEM_VERSION_2401 - /* When the input system is 2401, always enable 'in_frameinfo_memory' - * except for the following: - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Online Capture - * - Direct Sensor Mode Continuous Capture - * - Buffered Sensor Mode Continuous Capture - */ - sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); - buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); - online = pipe->stream->config.online; - continuous = pipe->stream->config.continuous; - need_in_frameinfo_memory = - !((sensor && (online || continuous)) || (buffered_sensor && (online || continuous))); + /* When the input system is 2401, always enable 'in_frameinfo_memory' + * except for the following: + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Online Capture + * - Direct Sensor Mode Continuous Capture + * - Buffered Sensor Mode Continuous Capture + */ + sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_SENSOR); + buffered_sensor = (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR); + online = pipe->stream->config.online; + continuous = pipe->stream->config.continuous; + need_in_frameinfo_memory = + !((sensor && (online || continuous)) || (buffered_sensor && (online || continuous))); #else - /* Construct in_frame info (only in case we have dynamic input */ - need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + /* Construct in_frame info (only in case we have dynamic input */ + need_in_frameinfo_memory = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - if (need_in_frameinfo_memory) - { - err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, - IA_CSS_FRAME_FORMAT_RAW); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - - in_frame = &me->in_frame; - } else - { - in_frame = NULL; - } - - err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0); - if (err != IA_CSS_SUCCESS) - { + if (need_in_frameinfo_memory) + { + err = init_in_frameinfo_memory_defaults(pipe, &me->in_frame, + IA_CSS_FRAME_FORMAT_RAW); + if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - out_frame = &me->out_frame[0]; - /* Construct vf_frame info (only in case we have VF) */ - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) - { - if (mode == IA_CSS_CAPTURE_MODE_RAW || mode == IA_CSS_CAPTURE_MODE_BAYER) { - /* These modes don't support viewfinder output */ - vf_frame = NULL; - } else { - init_vf_frameinfo_defaults(pipe, &me->vf_frame[0], 0); - vf_frame = &me->vf_frame[0]; - } - } else - { + in_frame = &me->in_frame; + } else + { + in_frame = NULL; + } + + err = init_out_frameinfo_defaults(pipe, &me->out_frame[0], 0); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + out_frame = &me->out_frame[0]; + + /* Construct vf_frame info (only in case we have VF) */ + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) + { + if (mode == IA_CSS_CAPTURE_MODE_RAW || mode == IA_CSS_CAPTURE_MODE_BAYER) { + /* These modes don't support viewfinder output */ vf_frame = NULL; + } else { + init_vf_frameinfo_defaults(pipe, &me->vf_frame[0], 0); + vf_frame = &me->vf_frame[0]; } + } else + { + vf_frame = NULL; + } - copy_binary = &pipe->pipe_settings.capture.copy_binary; - num_primary_stage = pipe->pipe_settings.capture.num_primary_stage; - if ((num_primary_stage == 0) && (mode == IA_CSS_CAPTURE_MODE_PRIMARY)) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); - return IA_CSS_ERR_INTERNAL_ERROR; - } - for (i = 0; i < num_primary_stage; i++) - { - primary_binary[i] = &pipe->pipe_settings.capture.primary_binary[i]; - } - vf_pp_binary = &pipe->pipe_settings.capture.vf_pp_binary; - pre_isp_binary = &pipe->pipe_settings.capture.pre_isp_binary; - anr_gdc_binary = &pipe->pipe_settings.capture.anr_gdc_binary; - post_isp_binary = &pipe->pipe_settings.capture.post_isp_binary; - capture_pp_binary = &pipe->pipe_settings.capture.capture_pp_binary; - yuv_scaler_binary = pipe->pipe_settings.capture.yuv_scaler_binary; - num_yuv_scaler = pipe->pipe_settings.capture.num_yuv_scaler; - is_output_stage = pipe->pipe_settings.capture.is_output_stage; - capture_ldc_binary = &pipe->pipe_settings.capture.capture_ldc_binary; - - need_pp = (need_capture_pp(pipe) || pipe->output_stage) && - mode != IA_CSS_CAPTURE_MODE_RAW && - mode != IA_CSS_CAPTURE_MODE_BAYER; - need_yuv_pp = (yuv_scaler_binary && yuv_scaler_binary->info); - need_ldc = (capture_ldc_binary && capture_ldc_binary->info); - - if (pipe->pipe_settings.capture.copy_binary.info) - { - if (raw) { - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + copy_binary = &pipe->pipe_settings.capture.copy_binary; + num_primary_stage = pipe->pipe_settings.capture.num_primary_stage; + if ((num_primary_stage == 0) && (mode == IA_CSS_CAPTURE_MODE_PRIMARY)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; + } + for (i = 0; i < num_primary_stage; i++) + { + primary_binary[i] = &pipe->pipe_settings.capture.primary_binary[i]; + } + vf_pp_binary = &pipe->pipe_settings.capture.vf_pp_binary; + pre_isp_binary = &pipe->pipe_settings.capture.pre_isp_binary; + anr_gdc_binary = &pipe->pipe_settings.capture.anr_gdc_binary; + post_isp_binary = &pipe->pipe_settings.capture.post_isp_binary; + capture_pp_binary = &pipe->pipe_settings.capture.capture_pp_binary; + yuv_scaler_binary = pipe->pipe_settings.capture.yuv_scaler_binary; + num_yuv_scaler = pipe->pipe_settings.capture.num_yuv_scaler; + is_output_stage = pipe->pipe_settings.capture.is_output_stage; + capture_ldc_binary = &pipe->pipe_settings.capture.capture_ldc_binary; + + need_pp = (need_capture_pp(pipe) || pipe->output_stage) && + mode != IA_CSS_CAPTURE_MODE_RAW && + mode != IA_CSS_CAPTURE_MODE_BAYER; + need_yuv_pp = (yuv_scaler_binary && yuv_scaler_binary->info); + need_ldc = (capture_ldc_binary && capture_ldc_binary->info); + + if (pipe->pipe_settings.capture.copy_binary.info) + { + if (raw) { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2401) - if (!continuous) { - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, in_frame, NULL); - } else { - in_frame = pipe->stream->last_pipe->continuous_frames[0]; - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, in_frame, NULL); - } -#else - ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, NULL, NULL); -#endif - } else { - ia_css_pipe_util_set_output_frames(out_frames, 0, in_frame); + if (!continuous) { ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, - out_frames, NULL, NULL); - } - - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + out_frames, in_frame, NULL); + } else { + in_frame = pipe->stream->last_pipe->continuous_frames[0]; + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, in_frame, NULL); } - } else if (pipe->stream->config.continuous) - { - in_frame = pipe->stream->last_pipe->continuous_frames[0]; +#else + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, NULL, NULL); +#endif + } else { + ia_css_pipe_util_set_output_frames(out_frames, 0, in_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, copy_binary, + out_frames, NULL, NULL); } - if (mode == IA_CSS_CAPTURE_MODE_PRIMARY) - { - struct ia_css_frame *local_in_frame = NULL; - struct ia_css_frame *local_out_frame = NULL; + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } else if (pipe->stream->config.continuous) + { + in_frame = pipe->stream->last_pipe->continuous_frames[0]; + } - for (i = 0; i < num_primary_stage; i++) { - if (i == 0) - local_in_frame = in_frame; - else - local_in_frame = NULL; + if (mode == IA_CSS_CAPTURE_MODE_PRIMARY) + { + struct ia_css_frame *local_in_frame = NULL; + struct ia_css_frame *local_out_frame = NULL; + + for (i = 0; i < num_primary_stage; i++) { + if (i == 0) + local_in_frame = in_frame; + else + local_in_frame = NULL; #ifndef ISP2401 - if (!need_pp && (i == num_primary_stage - 1)) + if (!need_pp && (i == num_primary_stage - 1)) #else - if (!need_pp && (i == num_primary_stage - 1) && !need_ldc) + if (!need_pp && (i == num_primary_stage - 1) && !need_ldc) #endif - local_out_frame = out_frame; - else - local_out_frame = NULL; - ia_css_pipe_util_set_output_frames(out_frames, 0, local_out_frame); - /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The - * vf-pp stage has been removed from Skycam in the solution - * provided. The vf-pp stage should be re-introduced when - * required. This * should not be considered as a clean solution. - * Proper investigation should be done to come up with the clean - * solution. - * */ - ia_css_pipe_get_generic_stage_desc(&stage_desc, primary_binary[i], - out_frames, local_in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } - /* If we use copy iso primary, - the input must be yuv iso raw */ - current_stage->args.copy_vf = - primary_binary[0]->info->sp.pipeline.mode == - IA_CSS_BINARY_MODE_COPY; - current_stage->args.copy_output = current_stage->args.copy_vf; - } else if (mode == IA_CSS_CAPTURE_MODE_ADVANCED || - mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) - { - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, - out_frames, in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, NULL); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, anr_gdc_binary, - out_frames, NULL, NULL); + local_out_frame = out_frame; + else + local_out_frame = NULL; + ia_css_pipe_util_set_output_frames(out_frames, 0, local_out_frame); + /* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The + * vf-pp stage has been removed from Skycam in the solution + * provided. The vf-pp stage should be re-introduced when + * required. This * should not be considered as a clean solution. + * Proper investigation should be done to come up with the clean + * solution. + * */ + ia_css_pipe_get_generic_stage_desc(&stage_desc, primary_binary[i], + out_frames, local_in_frame, NULL); err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, NULL); + &stage_desc, + ¤t_stage); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } + } + /* If we use copy iso primary, + the input must be yuv iso raw */ + current_stage->args.copy_vf = + primary_binary[0]->info->sp.pipeline.mode == + IA_CSS_BINARY_MODE_COPY; + current_stage->args.copy_output = current_stage->args.copy_vf; + } else if (mode == IA_CSS_CAPTURE_MODE_ADVANCED || + mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) + { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, + out_frames, in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, anr_gdc_binary, + out_frames, NULL, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - if (need_pp) { - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, - out_frames, NULL, NULL); - } else { - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, - out_frames, NULL, NULL); - } - - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } else if (mode == IA_CSS_CAPTURE_MODE_BAYER) - { + if (need_pp) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); + ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, + out_frames, NULL, NULL); + } else { ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); - ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, - out_frames, in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - NULL); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + ia_css_pipe_get_generic_stage_desc(&stage_desc, post_isp_binary, + out_frames, NULL, NULL); + } + + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + } else if (mode == IA_CSS_CAPTURE_MODE_BAYER) + { + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, pre_isp_binary, + out_frames, in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } + } #ifndef ISP2401 - if (need_pp && current_stage) - { - struct ia_css_frame *local_in_frame = NULL; + if (need_pp && current_stage) + { + struct ia_css_frame *local_in_frame = NULL; - local_in_frame = current_stage->args.out_frame[0]; + local_in_frame = current_stage->args.out_frame[0]; - if (need_ldc) { - ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); - ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, - out_frames, local_in_frame, NULL); - err = ia_css_pipeline_create_and_add_stage(me, - &stage_desc, - ¤t_stage); - local_in_frame = current_stage->args.out_frame[0]; - } - err = add_capture_pp_stage(pipe, me, local_in_frame, - need_yuv_pp ? NULL : out_frame, -#else - /* ldc and capture_pp not supported in same pipeline */ - if (need_ldc && current_stage) - { - in_frame = current_stage->args.out_frame[0]; - ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + if (need_ldc) { + ia_css_pipe_util_set_output_frames(out_frames, 0, NULL); ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, - out_frames, in_frame, NULL); + out_frames, local_in_frame, NULL); err = ia_css_pipeline_create_and_add_stage(me, &stage_desc, - NULL); - } else if (need_pp && current_stage) - { - in_frame = current_stage->args.out_frame[0]; - err = add_capture_pp_stage(pipe, me, in_frame, need_yuv_pp ? NULL : out_frame, + ¤t_stage); + local_in_frame = current_stage->args.out_frame[0]; + } + err = add_capture_pp_stage(pipe, me, local_in_frame, + need_yuv_pp ? NULL : out_frame, +#else + /* ldc and capture_pp not supported in same pipeline */ + if (need_ldc && current_stage) + { + in_frame = current_stage->args.out_frame[0]; + ia_css_pipe_util_set_output_frames(out_frames, 0, out_frame); + ia_css_pipe_get_generic_stage_desc(&stage_desc, capture_ldc_binary, + out_frames, in_frame, NULL); + err = ia_css_pipeline_create_and_add_stage(me, + &stage_desc, + NULL); + } else if (need_pp && current_stage) + { + in_frame = current_stage->args.out_frame[0]; + err = add_capture_pp_stage(pipe, me, in_frame, need_yuv_pp ? NULL : out_frame, #endif - capture_pp_binary, - ¤t_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + capture_pp_binary, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } + } - if (need_yuv_pp && current_stage) - { - struct ia_css_frame *tmp_in_frame = current_stage->args.out_frame[0]; - struct ia_css_frame *tmp_out_frame = NULL; - - for (i = 0; i < num_yuv_scaler; i++) { - if (is_output_stage[i] == true) - tmp_out_frame = out_frame; - else - tmp_out_frame = NULL; + if (need_yuv_pp && current_stage) + { + struct ia_css_frame *tmp_in_frame = current_stage->args.out_frame[0]; + struct ia_css_frame *tmp_out_frame = NULL; - err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, - NULL, - &yuv_scaler_binary[i], - &yuv_scaler_stage); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - /* we use output port 1 as internal output port */ - tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; - } - } + for (i = 0; i < num_yuv_scaler; i++) { + if (is_output_stage[i] == true) + tmp_out_frame = out_frame; + else + tmp_out_frame = NULL; - /* - * WARNING: The #if def flag has been added below as a - * temporary solution to solve the problem of enabling the - * view finder in a single binary in a capture flow. The vf-pp - * stage has been removed from Skycam in the solution provided. - * The vf-pp stage should be re-introduced when required. This - * should not be considered as a clean solution. Proper - * investigation should be done to come up with the clean solution. - * */ - if (mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER && current_stage && vf_frame) - { - in_frame = current_stage->args.out_vf_frame; - err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary, - ¤t_stage); + err = add_yuv_scaler_stage(pipe, me, tmp_in_frame, tmp_out_frame, + NULL, + &yuv_scaler_binary[i], + &yuv_scaler_stage); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } + /* we use output port 1 as internal output port */ + tmp_in_frame = yuv_scaler_stage->args.out_frame[1]; } - ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "create_host_regular_capture_pipeline() leave:\n"); - - return IA_CSS_SUCCESS; } - static enum ia_css_err - create_host_capture_pipeline(struct ia_css_pipe *pipe) { - enum ia_css_err err = IA_CSS_SUCCESS; - - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) - err = create_host_isyscopy_capture_pipeline(pipe); - else - err = create_host_regular_capture_pipeline(pipe); - if (err != IA_CSS_SUCCESS) - { + /* + * WARNING: The #if def flag has been added below as a + * temporary solution to solve the problem of enabling the + * view finder in a single binary in a capture flow. The vf-pp + * stage has been removed from Skycam in the solution provided. + * The vf-pp stage should be re-introduced when required. This + * should not be considered as a clean solution. Proper + * investigation should be done to come up with the clean solution. + * */ + if (mode != IA_CSS_CAPTURE_MODE_RAW && mode != IA_CSS_CAPTURE_MODE_BAYER && current_stage && vf_frame) + { + in_frame = current_stage->args.out_vf_frame; + err = add_vf_pp_stage(pipe, in_frame, vf_frame, vf_pp_binary, + ¤t_stage); + if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } + } + ia_css_pipeline_finalize_stages(&pipe->pipeline, pipe->stream->config.continuous); - IA_CSS_LEAVE_ERR_PRIVATE(err); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "create_host_regular_capture_pipeline() leave:\n"); + + return IA_CSS_SUCCESS; +} + +static enum ia_css_err +create_host_capture_pipeline(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY) + err = create_host_isyscopy_capture_pipeline(pipe); + else + err = create_host_regular_capture_pipeline(pipe); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - static enum ia_css_err capture_start( - struct ia_css_pipe *pipe) { - struct ia_css_pipeline *me; + IA_CSS_LEAVE_ERR_PRIVATE(err); + + return err; +} - enum ia_css_err err = IA_CSS_SUCCESS; - enum sh_css_pipe_config_override copy_ovrd; +static enum ia_css_err capture_start( + struct ia_css_pipe *pipe) { + struct ia_css_pipeline *me; - IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); - if (!pipe) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + enum ia_css_err err = IA_CSS_SUCCESS; + enum sh_css_pipe_config_override copy_ovrd; - me = &pipe->pipeline; + IA_CSS_ENTER_PRIVATE("pipe = %p", pipe); + if (!pipe) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if ((pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) && - (pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { - if (copy_on_sp(pipe)) { - err = start_copy_on_sp(pipe, &me->out_frame[0]); - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + me = &pipe->pipeline; + + if ((pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_RAW || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) && + (pipe->config.mode != IA_CSS_PIPE_MODE_COPY)) { + if (copy_on_sp(pipe)) { + err = start_copy_on_sp(pipe, &me->out_frame[0]); + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } + } #if defined(USE_INPUT_SYSTEM_VERSION_2) - /* old isys: need to send_mipi_frames() in all pipe modes */ + /* old isys: need to send_mipi_frames() in all pipe modes */ + err = send_mipi_frames(pipe); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } +#elif defined(USE_INPUT_SYSTEM_VERSION_2401) + if (pipe->config.mode != IA_CSS_PIPE_MODE_COPY) { err = send_mipi_frames(pipe); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } -#elif defined(USE_INPUT_SYSTEM_VERSION_2401) - if (pipe->config.mode != IA_CSS_PIPE_MODE_COPY) { - err = send_mipi_frames(pipe); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } + } #endif - { - unsigned int thread_id; + { + unsigned int thread_id; - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - copy_ovrd = 1 << thread_id; - } - start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + copy_ovrd = 1 << thread_id; + } + start_pipe(pipe, copy_ovrd, pipe->stream->config.mode); #if !defined(HAS_NO_INPUT_SYSTEM) && !defined(USE_INPUT_SYSTEM_VERSION_2401) - /* - * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, - * which is currently done in start_binary(); but COPY pipe contains no binary, - * and does not call start_binary(); so we need to configure the rx here. - */ - if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY && - pipe->stream->reconfigure_css_rx) { - ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, - pipe->stream->config.mode); - pipe->stream->reconfigure_css_rx = false; - } -#endif - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; + /* + * old isys: for IA_CSS_PIPE_MODE_COPY pipe, isys rx has to be configured, + * which is currently done in start_binary(); but COPY pipe contains no binary, + * and does not call start_binary(); so we need to configure the rx here. + */ + if (pipe->config.mode == IA_CSS_PIPE_MODE_COPY && + pipe->stream->reconfigure_css_rx) { + ia_css_isys_rx_configure(&pipe->stream->csi_rx_config, + pipe->stream->config.mode); + pipe->stream->reconfigure_css_rx = false; } +#endif - static enum ia_css_err - sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, - struct ia_css_frame_info *info, - unsigned int idx) { - assert(pipe); - assert(info); + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_pipe_get_output_frame_info() enter:\n"); +static enum ia_css_err +sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe, + struct ia_css_frame_info *info, + unsigned int idx) { + assert(pipe); + assert(info); - *info = pipe->output_info[idx]; - if (copy_on_sp(pipe) && - pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) - { - ia_css_frame_info_init( - info, - JPEG_BYTES, - 1, - IA_CSS_FRAME_FORMAT_BINARY_8, - 0); - } else if (info->format == IA_CSS_FRAME_FORMAT_RAW || - info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) - { - info->raw_bit_depth = - ia_css_pipe_util_pipe_input_format_bpp(pipe); - } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_output_frame_info() enter:\n"); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_pipe_get_output_frame_info() leave:\n"); - return IA_CSS_SUCCESS; + *info = pipe->output_info[idx]; + if (copy_on_sp(pipe) && + pipe->stream->config.input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8) + { + ia_css_frame_info_init( + info, + JPEG_BYTES, + 1, + IA_CSS_FRAME_FORMAT_BINARY_8, + 0); + } else if (info->format == IA_CSS_FRAME_FORMAT_RAW || + info->format == IA_CSS_FRAME_FORMAT_RAW_PACKED) + { + info->raw_bit_depth = + ia_css_pipe_util_pipe_input_format_bpp(pipe); } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_pipe_get_output_frame_info() leave:\n"); + return IA_CSS_SUCCESS; +} + #if !defined(HAS_NO_INPUT_SYSTEM) - void - ia_css_stream_send_input_frame(const struct ia_css_stream *stream, - const unsigned short *data, - unsigned int width, - unsigned int height) { - assert(stream); +void +ia_css_stream_send_input_frame(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + unsigned int height) { + assert(stream); - ia_css_inputfifo_send_input_frame( - data, width, height, - stream->config.channel_id, - stream->config.input_config.format, - stream->config.pixels_per_clock == 2); - } + ia_css_inputfifo_send_input_frame( + data, width, height, + stream->config.channel_id, + stream->config.input_config.format, + stream->config.pixels_per_clock == 2); +} - void - ia_css_stream_start_input_frame(const struct ia_css_stream *stream) { - assert(stream); +void +ia_css_stream_start_input_frame(const struct ia_css_stream *stream) { + assert(stream); - ia_css_inputfifo_start_frame( - stream->config.channel_id, - stream->config.input_config.format, - stream->config.pixels_per_clock == 2); - } + ia_css_inputfifo_start_frame( + stream->config.channel_id, + stream->config.input_config.format, + stream->config.pixels_per_clock == 2); +} - void - ia_css_stream_send_input_line(const struct ia_css_stream *stream, - const unsigned short *data, - unsigned int width, - const unsigned short *data2, - unsigned int width2) { - assert(stream); +void +ia_css_stream_send_input_line(const struct ia_css_stream *stream, + const unsigned short *data, + unsigned int width, + const unsigned short *data2, + unsigned int width2) { + assert(stream); - ia_css_inputfifo_send_line(stream->config.channel_id, - data, width, data2, width2); - } + ia_css_inputfifo_send_line(stream->config.channel_id, + data, width, data2, width2); +} - void - ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, - enum atomisp_input_format format, - const unsigned short *data, - unsigned int width) { - assert(stream); - if (!data || width == 0) - return; - ia_css_inputfifo_send_embedded_line(stream->config.channel_id, - format, data, width); - } +void +ia_css_stream_send_input_embedded_line(const struct ia_css_stream *stream, + enum atomisp_input_format format, + const unsigned short *data, + unsigned int width) { + assert(stream); + if (!data || width == 0) + return; + ia_css_inputfifo_send_embedded_line(stream->config.channel_id, + format, data, width); +} - void - ia_css_stream_end_input_frame(const struct ia_css_stream *stream) { - assert(stream); +void +ia_css_stream_end_input_frame(const struct ia_css_stream *stream) { + assert(stream); - ia_css_inputfifo_end_frame(stream->config.channel_id); - } + ia_css_inputfifo_end_frame(stream->config.channel_id); +} #endif - static void - append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) { - IA_CSS_ENTER_PRIVATE("l = %p, firmware = %p", l, firmware); - if (!l) { - IA_CSS_ERROR("NULL fw_info"); - IA_CSS_LEAVE_PRIVATE(""); - return; - } - while (*l) - l = &(*l)->next; - *l = firmware; - /*firmware->next = NULL;*/ /* when multiple acc extensions are loaded, 'next' can be not NULL */ +static void +append_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) { + IA_CSS_ENTER_PRIVATE("l = %p, firmware = %p", l, firmware); + if (!l) { + IA_CSS_ERROR("NULL fw_info"); IA_CSS_LEAVE_PRIVATE(""); + return; } + while (*l) + l = &(*l)->next; + *l = firmware; + /*firmware->next = NULL;*/ /* when multiple acc extensions are loaded, 'next' can be not NULL */ + IA_CSS_LEAVE_PRIVATE(""); +} + +static void +remove_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) { + assert(*l); + assert(firmware); + (void)l; + (void)firmware; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() enter:\n"); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() leave:\n"); + return; /* removing single and multiple firmware is handled in acc_unload_extension() */ +} - static void - remove_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) { - assert(*l); - assert(firmware); - (void)l; - (void)firmware; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() enter:\n"); +static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware) { + hrt_vaddress binary; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "remove_firmware() leave:\n"); - return; /* removing single and multiple firmware is handled in acc_unload_extension() */ + if (!firmware) { + IA_CSS_ERROR("NULL input parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; } + binary = firmware->info.isp.xmem_addr; - static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware) { - hrt_vaddress binary; + if (!binary) { + unsigned int size = firmware->blob.size; + const unsigned char *blob; + const unsigned char *binary_name; - if (!firmware) { - IA_CSS_ERROR("NULL input parameter"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - binary = firmware->info.isp.xmem_addr; + binary_name = + (const unsigned char *)(IA_CSS_EXT_ISP_PROG_NAME( + firmware)); + blob = binary_name + + strlen((const char *)binary_name) + + 1; + binary = sh_css_load_blob(blob, size); + firmware->info.isp.xmem_addr = binary; + } - if (!binary) { - unsigned int size = firmware->blob.size; - const unsigned char *blob; - const unsigned char *binary_name; + if (!binary) + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + return IA_CSS_SUCCESS; +} - binary_name = - (const unsigned char *)(IA_CSS_EXT_ISP_PROG_NAME( - firmware)); - blob = binary_name + - strlen((const char *)binary_name) + - 1; - binary = sh_css_load_blob(blob, size); - firmware->info.isp.xmem_addr = binary; - } +static enum ia_css_err +acc_load_extension(struct ia_css_fw_info *firmware) { + enum ia_css_err err; + struct ia_css_fw_info *hd = firmware; - if (!binary) - return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - return IA_CSS_SUCCESS; + while (hd) + { + err = upload_isp_code(hd); + if (err != IA_CSS_SUCCESS) + return err; + hd = hd->next; } - static enum ia_css_err - acc_load_extension(struct ia_css_fw_info *firmware) { - enum ia_css_err err; - struct ia_css_fw_info *hd = firmware; + if (!firmware) + return IA_CSS_ERR_INVALID_ARGUMENTS; + firmware->loaded = true; + return IA_CSS_SUCCESS; +} - while (hd) - { - err = upload_isp_code(hd); - if (err != IA_CSS_SUCCESS) - return err; - hd = hd->next; - } +static void +acc_unload_extension(struct ia_css_fw_info *firmware) { + struct ia_css_fw_info *hd = firmware; + struct ia_css_fw_info *hdn = NULL; - if (!firmware) - return IA_CSS_ERR_INVALID_ARGUMENTS; - firmware->loaded = true; - return IA_CSS_SUCCESS; + if (!firmware) /* should not happen */ + return; + /* unload and remove multiple firmwares */ + while (hd) { + hdn = (hd->next) ? &(*hd->next) : NULL; + if (hd->info.isp.xmem_addr) { + hmm_free(hd->info.isp.xmem_addr); + hd->info.isp.xmem_addr = mmgr_NULL; + } + hd->isp_code = NULL; + hd->next = NULL; + hd = hdn; } - static void - acc_unload_extension(struct ia_css_fw_info *firmware) { - struct ia_css_fw_info *hd = firmware; - struct ia_css_fw_info *hdn = NULL; - - if (!firmware) /* should not happen */ - return; - /* unload and remove multiple firmwares */ - while (hd) { - hdn = (hd->next) ? &(*hd->next) : NULL; - if (hd->info.isp.xmem_addr) { - hmm_free(hd->info.isp.xmem_addr); - hd->info.isp.xmem_addr = mmgr_NULL; - } - hd->isp_code = NULL; - hd->next = NULL; - hd = hdn; - } + firmware->loaded = false; +} - firmware->loaded = false; - } +/* Load firmware for extension */ +static enum ia_css_err +ia_css_pipe_load_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware) { + enum ia_css_err err = IA_CSS_SUCCESS; - /* Load firmware for extension */ - static enum ia_css_err - ia_css_pipe_load_extension(struct ia_css_pipe *pipe, - struct ia_css_fw_info *firmware) { - enum ia_css_err err = IA_CSS_SUCCESS; + IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); - IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); + if ((!firmware) || (!pipe)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if ((!firmware) || (!pipe)) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; + if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) + { + if (&pipe->output_stage) + append_firmware(&pipe->output_stage, firmware); + else { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; } - - if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) - { - if (&pipe->output_stage) - append_firmware(&pipe->output_stage, firmware); - else { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); - return IA_CSS_ERR_INTERNAL_ERROR; - } - } else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) - { - if (&pipe->vf_stage) - append_firmware(&pipe->vf_stage, firmware); - else { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); - return IA_CSS_ERR_INTERNAL_ERROR; - } + } else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) + { + if (&pipe->vf_stage) + append_firmware(&pipe->vf_stage, firmware); + else { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INTERNAL_ERROR); + return IA_CSS_ERR_INTERNAL_ERROR; } - err = acc_load_extension(firmware); - - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; } + err = acc_load_extension(firmware); - /* Unload firmware for extension */ - static void - ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, - struct ia_css_fw_info *firmware) { - IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); - - if ((!firmware) || (!pipe)) { - IA_CSS_ERROR("NULL input parameters"); - IA_CSS_LEAVE_PRIVATE(""); - return; - } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} - if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) - remove_firmware(&pipe->output_stage, firmware); - else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) - remove_firmware(&pipe->vf_stage, firmware); - acc_unload_extension(firmware); +/* Unload firmware for extension */ +static void +ia_css_pipe_unload_extension(struct ia_css_pipe *pipe, + struct ia_css_fw_info *firmware) { + IA_CSS_ENTER_PRIVATE("fw = %p pipe = %p", firmware, pipe); + if ((!firmware) || (!pipe)) { + IA_CSS_ERROR("NULL input parameters"); IA_CSS_LEAVE_PRIVATE(""); + return; } - bool - ia_css_pipeline_uses_params(struct ia_css_pipeline *me) { - struct ia_css_pipeline_stage *stage; - - assert(me); + if (firmware->info.isp.type == IA_CSS_ACC_OUTPUT) + remove_firmware(&pipe->output_stage, firmware); + else if (firmware->info.isp.type == IA_CSS_ACC_VIEWFINDER) + remove_firmware(&pipe->vf_stage, firmware); + acc_unload_extension(firmware); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_uses_params() enter: me=%p\n", me); + IA_CSS_LEAVE_PRIVATE(""); +} - for (stage = me->stages; stage; stage = stage->next) - if (stage->binary_info && stage->binary_info->enable.params) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_uses_params() leave: return_bool=true\n"); - return true; - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipeline_uses_params() leave: return_bool=false\n"); - return false; - } +bool +ia_css_pipeline_uses_params(struct ia_css_pipeline *me) { + struct ia_css_pipeline_stage *stage; - static enum ia_css_err - sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, - const void *acc_fw) { - struct ia_css_fw_info *fw = (struct ia_css_fw_info *)acc_fw; - /* In QoS case, load_extension already called, so skipping */ - enum ia_css_err err = IA_CSS_SUCCESS; + assert(me); - if (fw->loaded == false) - err = acc_load_extension(fw); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() enter: me=%p\n", me); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_pipeline_add_acc_stage() enter: pipeline=%p, acc_fw=%p\n", - pipeline, acc_fw); + for (stage = me->stages; stage; stage = stage->next) + if (stage->binary_info && stage->binary_info->enable.params) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() leave: return_bool=true\n"); + return true; + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipeline_uses_params() leave: return_bool=false\n"); + return false; +} - if (err == IA_CSS_SUCCESS) - { - struct ia_css_pipeline_stage_desc stage_desc; +static enum ia_css_err +sh_css_pipeline_add_acc_stage(struct ia_css_pipeline *pipeline, + const void *acc_fw) { + struct ia_css_fw_info *fw = (struct ia_css_fw_info *)acc_fw; + /* In QoS case, load_extension already called, so skipping */ + enum ia_css_err err = IA_CSS_SUCCESS; - ia_css_pipe_get_acc_stage_desc(&stage_desc, NULL, fw); - err = ia_css_pipeline_create_and_add_stage(pipeline, - &stage_desc, - NULL); - } + if (fw->loaded == false) + err = acc_load_extension(fw); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "sh_css_pipeline_add_acc_stage() leave: return_err=%d\n", err); - return err; - } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_pipeline_add_acc_stage() enter: pipeline=%p, acc_fw=%p\n", + pipeline, acc_fw); - /* - * @brief Tag a specific frame in continuous capture. - * Refer to "sh_css_internal.h" for details. - */ - enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, - unsigned int exp_id) { - struct sh_css_tag_descr tag_descr; - u32 encoded_tag_descr; - enum ia_css_err err; + if (err == IA_CSS_SUCCESS) + { + struct ia_css_pipeline_stage_desc stage_desc; - assert(stream); - IA_CSS_ENTER("exp_id=%d", exp_id); + ia_css_pipe_get_acc_stage_desc(&stage_desc, NULL, fw); + err = ia_css_pipeline_create_and_add_stage(pipeline, + &stage_desc, + NULL); + } - /* Only continuous streams have a tagger */ - if (exp_id == 0 || !stream->config.continuous) { - IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "sh_css_pipeline_add_acc_stage() leave: return_err=%d\n", err); + return err; +} - if (!sh_css_sp_is_running()) { - /* SP is not running. The queues are not valid */ - IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); - return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } +/* + * @brief Tag a specific frame in continuous capture. + * Refer to "sh_css_internal.h" for details. + */ +enum ia_css_err ia_css_stream_capture_frame(struct ia_css_stream *stream, + unsigned int exp_id) { + struct sh_css_tag_descr tag_descr; + u32 encoded_tag_descr; + enum ia_css_err err; - /* Create the tag descriptor from the parameters */ - sh_css_create_tag_descr(0, 0, 0, exp_id, &tag_descr); - /* Encode the tag descriptor into a 32-bit value */ - encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ - err = ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); + assert(stream); + IA_CSS_ENTER("exp_id=%d", exp_id); - IA_CSS_LEAVE_ERR(err); - return err; + /* Only continuous streams have a tagger */ + if (exp_id == 0 || !stream->config.continuous) { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; } - /* - * @brief Configure the continuous capture. - * Refer to "sh_css_internal.h" for details. - */ - enum ia_css_err ia_css_stream_capture( - struct ia_css_stream *stream, - int num_captures, - unsigned int skip, - int offset) { - struct sh_css_tag_descr tag_descr; - unsigned int encoded_tag_descr; - enum ia_css_err return_err; - - if (!stream) - return IA_CSS_ERR_INVALID_ARGUMENTS; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() enter: num_captures=%d, skip=%d, offset=%d\n", - num_captures, skip, offset); + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ + IA_CSS_LEAVE_ERR(IA_CSS_ERR_RESOURCE_NOT_AVAILABLE); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } - /* Check if the tag descriptor is valid */ - if (num_captures < SH_CSS_MINIMUM_TAG_ID) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() leave: return_err=%d\n", - IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + /* Create the tag descriptor from the parameters */ + sh_css_create_tag_descr(0, 0, 0, exp_id, &tag_descr); + /* Encode the tag descriptor into a 32-bit value */ + encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); + /* Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue */ + err = ia_css_bufq_enqueue_tag_cmd(encoded_tag_descr); - /* Create the tag descriptor from the parameters */ - sh_css_create_tag_descr(num_captures, skip, offset, 0, &tag_descr); + IA_CSS_LEAVE_ERR(err); + return err; +} - /* Encode the tag descriptor into a 32-bit value */ - encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); +/* + * @brief Configure the continuous capture. + * Refer to "sh_css_internal.h" for details. + */ +enum ia_css_err ia_css_stream_capture( + struct ia_css_stream *stream, + int num_captures, + unsigned int skip, + int offset) { + struct sh_css_tag_descr tag_descr; + unsigned int encoded_tag_descr; + enum ia_css_err return_err; - if (!sh_css_sp_is_running()) { - /* SP is not running. The queues are not valid */ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_capture() leaving:queues unavailable\n"); - return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } + if (!stream) + return IA_CSS_ERR_INVALID_ARGUMENTS; - /* Enqueue the encoded tag to the host2sp queue. - * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 - * on both host and the SP side. - * It is mainly because it is enough to have only one tag_cmd queue */ - return_err = ia_css_bufq_enqueue_tag_cmd((uint32_t)encoded_tag_descr); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() enter: num_captures=%d, skip=%d, offset=%d\n", + num_captures, skip, offset); + /* Check if the tag descriptor is valid */ + if (num_captures < SH_CSS_MINIMUM_TAG_ID) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_capture() leave: return_err=%d\n", - return_err); - - return return_err; + IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; } - void ia_css_stream_request_flash(struct ia_css_stream *stream) { - (void)stream; + /* Create the tag descriptor from the parameters */ + sh_css_create_tag_descr(num_captures, skip, offset, 0, &tag_descr); - assert(stream); + /* Encode the tag descriptor into a 32-bit value */ + encoded_tag_descr = sh_css_encode_tag_descr(&tag_descr); + + if (!sh_css_sp_is_running()) { + /* SP is not running. The queues are not valid */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_request_flash() enter: void\n"); + "ia_css_stream_capture() leaving:queues unavailable\n"); + return IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } + + /* Enqueue the encoded tag to the host2sp queue. + * Note: The pipe and stage IDs for tag_cmd queue are hard-coded to 0 + * on both host and the SP side. + * It is mainly because it is enough to have only one tag_cmd queue */ + return_err = ia_css_bufq_enqueue_tag_cmd((uint32_t)encoded_tag_descr); + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_capture() leave: return_err=%d\n", + return_err); + + return return_err; +} + +void ia_css_stream_request_flash(struct ia_css_stream *stream) { + (void)stream; + + assert(stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_request_flash() enter: void\n"); #ifndef ISP2401 - sh_css_write_host2sp_command(host2sp_cmd_start_flash); + sh_css_write_host2sp_command(host2sp_cmd_start_flash); #else - if (sh_css_sp_is_running()) { - if (!sh_css_write_host2sp_command(host2sp_cmd_start_flash)) { - IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); - ia_css_debug_dump_sp_sw_debug_info(); - ia_css_debug_dump_debug_info(NULL); - } - } else - IA_CSS_LOG("SP is not running!"); + if (sh_css_sp_is_running()) { + if (!sh_css_write_host2sp_command(host2sp_cmd_start_flash)) { + IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); + ia_css_debug_dump_sp_sw_debug_info(); + ia_css_debug_dump_debug_info(NULL); + } + } else + IA_CSS_LOG("SP is not running!"); #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_request_flash() leave: return_void\n"); - } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_request_flash() leave: return_void\n"); +} - static void - sh_css_init_host_sp_control_vars(void) { - const struct ia_css_fw_info *fw; - unsigned int HIVE_ADDR_ia_css_ispctrl_sp_isp_started; +static void +sh_css_init_host_sp_control_vars(void) { + const struct ia_css_fw_info *fw; + unsigned int HIVE_ADDR_ia_css_ispctrl_sp_isp_started; - unsigned int HIVE_ADDR_host_sp_queues_initialized; - unsigned int HIVE_ADDR_sp_sleep_mode; - unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; + unsigned int HIVE_ADDR_host_sp_queues_initialized; + unsigned int HIVE_ADDR_sp_sleep_mode; + unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; #ifndef ISP2401 - unsigned int HIVE_ADDR_sp_stop_copy_preview; + unsigned int HIVE_ADDR_sp_stop_copy_preview; #endif - unsigned int HIVE_ADDR_host_sp_com; - unsigned int o = offsetof(struct host_sp_communication, host2sp_command) - / sizeof(int); + unsigned int HIVE_ADDR_host_sp_com; + unsigned int o = offsetof(struct host_sp_communication, host2sp_command) + / sizeof(int); #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) - unsigned int i; + unsigned int i; #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_init_host_sp_control_vars() enter: void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_init_host_sp_control_vars() enter: void\n"); - fw = &sh_css_sp_fw; - HIVE_ADDR_ia_css_ispctrl_sp_isp_started = fw->info.sp.isp_started; + fw = &sh_css_sp_fw; + HIVE_ADDR_ia_css_ispctrl_sp_isp_started = fw->info.sp.isp_started; - HIVE_ADDR_host_sp_queues_initialized = - fw->info.sp.host_sp_queues_initialized; - HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; - HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; + HIVE_ADDR_host_sp_queues_initialized = + fw->info.sp.host_sp_queues_initialized; + HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; + HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb; #ifndef ISP2401 - HIVE_ADDR_sp_stop_copy_preview = fw->info.sp.stop_copy_preview; + HIVE_ADDR_sp_stop_copy_preview = fw->info.sp.stop_copy_preview; #endif - HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; + HIVE_ADDR_host_sp_com = fw->info.sp.host_sp_com; - (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ + (void)HIVE_ADDR_ia_css_ispctrl_sp_isp_started; /* Suppres warnings in CRUN */ - (void)HIVE_ADDR_sp_sleep_mode; - (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; + (void)HIVE_ADDR_sp_sleep_mode; + (void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; #ifndef ISP2401 - (void)HIVE_ADDR_sp_stop_copy_preview; -#endif - (void)HIVE_ADDR_host_sp_com; - - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(ia_css_ispctrl_sp_isp_started), - (uint32_t)(0)); - - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(host_sp_queues_initialized), - (uint32_t)(0)); - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(sp_sleep_mode), - (uint32_t)(0)); - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), - (uint32_t)(false)); + (void)HIVE_ADDR_sp_stop_copy_preview; +#endif + (void)HIVE_ADDR_host_sp_com; + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_ispctrl_sp_isp_started), + (uint32_t)(0)); + + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(host_sp_queues_initialized), + (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_sleep_mode), + (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb), + (uint32_t)(false)); #ifndef ISP2401 - sp_dmem_store_uint32(SP0_ID, - (unsigned int)sp_address_of(sp_stop_copy_preview), - my_css.stop_copy_preview ? (uint32_t)(1) : (uint32_t)(0)); + sp_dmem_store_uint32(SP0_ID, + (unsigned int)sp_address_of(sp_stop_copy_preview), + my_css.stop_copy_preview ? (uint32_t)(1) : (uint32_t)(0)); #endif - store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); + store_sp_array_uint(host_sp_com, o, host2sp_cmd_ready); #if !defined(HAS_NO_INPUT_SYSTEM) - for (i = 0; i < N_CSI_PORTS; i++) { - sh_css_update_host2sp_num_mipi_frames - (my_css.num_mipi_frames[i]); - } + for (i = 0; i < N_CSI_PORTS; i++) { + sh_css_update_host2sp_num_mipi_frames + (my_css.num_mipi_frames[i]); + } #endif - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "sh_css_init_host_sp_control_vars() leave: return_void\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "sh_css_init_host_sp_control_vars() leave: return_void\n"); +} + +/* + * create the internal structures and fill in the configuration data + */ +void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_config_defaults()\n"); + *pipe_config = DEFAULT_PIPE_CONFIG; +} + +void +ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config + *extra_config) { + if (!extra_config) { + IA_CSS_ERROR("NULL input parameter"); + return; } - /* - * create the internal structures and fill in the configuration data - */ - void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_config_defaults()\n"); - *pipe_config = DEFAULT_PIPE_CONFIG; - } - - void - ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config - *extra_config) { - if (!extra_config) { - IA_CSS_ERROR("NULL input parameter"); - return; - } - - extra_config->enable_raw_binning = false; - extra_config->enable_yuv_ds = false; - extra_config->enable_high_speed = false; - extra_config->enable_dvs_6axis = false; - extra_config->enable_reduced_pipe = false; - extra_config->disable_vf_pp = false; - extra_config->enable_fractional_ds = false; - } - - void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_config_defaults()\n"); - assert(stream_config); - memset(stream_config, 0, sizeof(*stream_config)); - stream_config->online = true; - stream_config->left_padding = -1; - stream_config->pixels_per_clock = 1; - /* temporary default value for backwards compatibility. - * This field used to be hardcoded within CSS but this has now - * been moved to the stream_config struct. */ - stream_config->source.port.rxcount = 0x04040404; - } - - static enum ia_css_err - ia_css_acc_pipe_create(struct ia_css_pipe *pipe) { - enum ia_css_err err = IA_CSS_SUCCESS; - - if (!pipe) - { - IA_CSS_ERROR("NULL input parameter"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + extra_config->enable_raw_binning = false; + extra_config->enable_yuv_ds = false; + extra_config->enable_high_speed = false; + extra_config->enable_dvs_6axis = false; + extra_config->enable_reduced_pipe = false; + extra_config->disable_vf_pp = false; + extra_config->enable_fractional_ds = false; +} - /* There is not meaning for num_execs = 0 semantically. Run atleast once. */ - if (pipe->config.acc_num_execs == 0) - pipe->config.acc_num_execs = 1; +void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_config_defaults()\n"); + assert(stream_config); + memset(stream_config, 0, sizeof(*stream_config)); + stream_config->online = true; + stream_config->left_padding = -1; + stream_config->pixels_per_clock = 1; + /* temporary default value for backwards compatibility. + * This field used to be hardcoded within CSS but this has now + * been moved to the stream_config struct. */ + stream_config->source.port.rxcount = 0x04040404; +} + +static enum ia_css_err +ia_css_acc_pipe_create(struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; + + if (!pipe) + { + IA_CSS_ERROR("NULL input parameter"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if (pipe->config.acc_extension) - { - err = ia_css_pipe_load_extension(pipe, pipe->config.acc_extension); - } + /* There is not meaning for num_execs = 0 semantically. Run atleast once. */ + if (pipe->config.acc_num_execs == 0) + pipe->config.acc_num_execs = 1; - return err; + if (pipe->config.acc_extension) + { + err = ia_css_pipe_load_extension(pipe, pipe->config.acc_extension); } - enum ia_css_err - ia_css_pipe_create(const struct ia_css_pipe_config *config, - struct ia_css_pipe **pipe) { + return err; +} + +enum ia_css_err +ia_css_pipe_create(const struct ia_css_pipe_config *config, + struct ia_css_pipe **pipe) { #ifndef ISP2401 - if (!config) + if (!config) #else - enum ia_css_err err = IA_CSS_SUCCESS; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER_PRIVATE("config = %p, pipe = %p", config, pipe); + IA_CSS_ENTER_PRIVATE("config = %p, pipe = %p", config, pipe); - if (!config) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + if (!config) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); #endif - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; #ifndef ISP2401 - if (!pipe) -#else - } if (!pipe) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); +#else +} +if (!pipe) +{ + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); #endif - return IA_CSS_ERR_INVALID_ARGUMENTS; + return IA_CSS_ERR_INVALID_ARGUMENTS; #ifndef ISP2401 - return ia_css_pipe_create_extra(config, NULL, pipe); + return ia_css_pipe_create_extra(config, NULL, pipe); #else - } +} - err = ia_css_pipe_create_extra(config, NULL, pipe); +err = ia_css_pipe_create_extra(config, NULL, pipe); - if (err == IA_CSS_SUCCESS) - { - IA_CSS_LOG("pipe created successfully = %p", *pipe); - } +if (err == IA_CSS_SUCCESS) +{ + IA_CSS_LOG("pipe created successfully = %p", *pipe); +} - IA_CSS_LEAVE_ERR_PRIVATE(err); +IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; +return err; #endif - } +} - enum ia_css_err - ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, - const struct ia_css_pipe_extra_config *extra_config, - struct ia_css_pipe **pipe) { - enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; - struct ia_css_pipe *internal_pipe = NULL; - unsigned int i; +enum ia_css_err +ia_css_pipe_create_extra(const struct ia_css_pipe_config *config, + const struct ia_css_pipe_extra_config *extra_config, + struct ia_css_pipe **pipe) { + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + struct ia_css_pipe *internal_pipe = NULL; + unsigned int i; - IA_CSS_ENTER_PRIVATE("config = %p, extra_config = %p and pipe = %p", config, extra_config, pipe); + IA_CSS_ENTER_PRIVATE("config = %p, extra_config = %p and pipe = %p", config, extra_config, pipe); - /* do not allow to create more than the maximum limit */ - if (my_css.pipe_counter >= IA_CSS_PIPELINE_NUM_MAX) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_EXHAUSTED); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + /* do not allow to create more than the maximum limit */ + if (my_css.pipe_counter >= IA_CSS_PIPELINE_NUM_MAX) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_RESOURCE_EXHAUSTED); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if ((!pipe) || (!config)) - { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + if ((!pipe) || (!config)) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - ia_css_debug_dump_pipe_config(config); - ia_css_debug_dump_pipe_extra_config(extra_config); + ia_css_debug_dump_pipe_config(config); + ia_css_debug_dump_pipe_extra_config(extra_config); - err = create_pipe(config->mode, &internal_pipe, false); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + err = create_pipe(config->mode, &internal_pipe, false); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - /* now we have a pipe structure to fill */ - internal_pipe->config = *config; - if (extra_config) - internal_pipe->extra_config = *extra_config; - else - ia_css_pipe_extra_config_defaults(&internal_pipe->extra_config); + /* now we have a pipe structure to fill */ + internal_pipe->config = *config; + if (extra_config) + internal_pipe->extra_config = *extra_config; + else + ia_css_pipe_extra_config_defaults(&internal_pipe->extra_config); - if (config->mode == IA_CSS_PIPE_MODE_ACC) - { - /* Temporary hack to migrate acceleration to CSS 2.0. - * In the future the code for all pipe types should be - * unified. */ - *pipe = internal_pipe; - if (!internal_pipe->config.acc_extension && - internal_pipe->config.num_acc_stages == - 0) { /* if no acc binary and no standalone stage */ - *pipe = NULL; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } - return ia_css_acc_pipe_create(internal_pipe); + if (config->mode == IA_CSS_PIPE_MODE_ACC) + { + /* Temporary hack to migrate acceleration to CSS 2.0. + * In the future the code for all pipe types should be + * unified. */ + *pipe = internal_pipe; + if (!internal_pipe->config.acc_extension && + internal_pipe->config.num_acc_stages == + 0) { /* if no acc binary and no standalone stage */ + *pipe = NULL; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; } + return ia_css_acc_pipe_create(internal_pipe); + } - /* Use config value when dvs_frame_delay setting equal to 2, otherwise always 1 by default */ - if (internal_pipe->config.dvs_frame_delay == IA_CSS_FRAME_DELAY_2) - internal_pipe->dvs_frame_delay = 2; - else - internal_pipe->dvs_frame_delay = 1; - - /* we still keep enable_raw_binning for backward compatibility, for any new - fractional bayer downscaling, we should use bayer_ds_out_res. if both are - specified, bayer_ds_out_res will take precedence.if none is specified, we - set bayer_ds_out_res equal to IF output resolution(IF may do cropping on - sensor output) or use default decimation factor 1. */ - if (internal_pipe->extra_config.enable_raw_binning && - internal_pipe->config.bayer_ds_out_res.width) - { - /* fill some code here, if no code is needed, please remove it during integration */ - } + /* Use config value when dvs_frame_delay setting equal to 2, otherwise always 1 by default */ + if (internal_pipe->config.dvs_frame_delay == IA_CSS_FRAME_DELAY_2) + internal_pipe->dvs_frame_delay = 2; + else + internal_pipe->dvs_frame_delay = 1; - /* YUV downscaling */ - if ((internal_pipe->config.vf_pp_in_res.width || - internal_pipe->config.capt_pp_in_res.width)) - { - enum ia_css_frame_format format; - - if (internal_pipe->config.vf_pp_in_res.width) { - format = IA_CSS_FRAME_FORMAT_YUV_LINE; - ia_css_frame_info_init( - &internal_pipe->vf_yuv_ds_input_info, - internal_pipe->config.vf_pp_in_res.width, - internal_pipe->config.vf_pp_in_res.height, - format, 0); - } - if (internal_pipe->config.capt_pp_in_res.width) { - format = IA_CSS_FRAME_FORMAT_YUV420; - ia_css_frame_info_init( - &internal_pipe->out_yuv_ds_input_info, - internal_pipe->config.capt_pp_in_res.width, - internal_pipe->config.capt_pp_in_res.height, - format, 0); - } - } - if (internal_pipe->config.vf_pp_in_res.width && - internal_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) - { + /* we still keep enable_raw_binning for backward compatibility, for any new + fractional bayer downscaling, we should use bayer_ds_out_res. if both are + specified, bayer_ds_out_res will take precedence.if none is specified, we + set bayer_ds_out_res equal to IF output resolution(IF may do cropping on + sensor output) or use default decimation factor 1. */ + if (internal_pipe->extra_config.enable_raw_binning && + internal_pipe->config.bayer_ds_out_res.width) + { + /* fill some code here, if no code is needed, please remove it during integration */ + } + + /* YUV downscaling */ + if ((internal_pipe->config.vf_pp_in_res.width || + internal_pipe->config.capt_pp_in_res.width)) + { + enum ia_css_frame_format format; + + if (internal_pipe->config.vf_pp_in_res.width) { + format = IA_CSS_FRAME_FORMAT_YUV_LINE; ia_css_frame_info_init( &internal_pipe->vf_yuv_ds_input_info, internal_pipe->config.vf_pp_in_res.width, internal_pipe->config.vf_pp_in_res.height, - IA_CSS_FRAME_FORMAT_YUV_LINE, 0); + format, 0); } - /* handle bayer downscaling output info */ - if (internal_pipe->config.bayer_ds_out_res.width) - { + if (internal_pipe->config.capt_pp_in_res.width) { + format = IA_CSS_FRAME_FORMAT_YUV420; ia_css_frame_info_init( - &internal_pipe->bds_output_info, - internal_pipe->config.bayer_ds_out_res.width, - internal_pipe->config.bayer_ds_out_res.height, - IA_CSS_FRAME_FORMAT_RAW, 0); + &internal_pipe->out_yuv_ds_input_info, + internal_pipe->config.capt_pp_in_res.width, + internal_pipe->config.capt_pp_in_res.height, + format, 0); } - - /* handle output info, assume always needed */ - for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) - { - if (internal_pipe->config.output_info[i].res.width) { - err = sh_css_pipe_configure_output( - internal_pipe, - internal_pipe->config.output_info[i].res.width, - internal_pipe->config.output_info[i].res.height, - internal_pipe->config.output_info[i].padded_width, - internal_pipe->config.output_info[i].format, - i); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - sh_css_free(internal_pipe); - internal_pipe = NULL; - return err; - } - } - - /* handle vf output info, when configured */ - internal_pipe->enable_viewfinder[i] = - (internal_pipe->config.vf_output_info[i].res.width != 0); - if (internal_pipe->config.vf_output_info[i].res.width) { - err = sh_css_pipe_configure_viewfinder( - internal_pipe, - internal_pipe->config.vf_output_info[i].res.width, - internal_pipe->config.vf_output_info[i].res.height, - internal_pipe->config.vf_output_info[i].padded_width, - internal_pipe->config.vf_output_info[i].format, - i); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - sh_css_free(internal_pipe); - internal_pipe = NULL; - return err; - } + } + if (internal_pipe->config.vf_pp_in_res.width && + internal_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + { + ia_css_frame_info_init( + &internal_pipe->vf_yuv_ds_input_info, + internal_pipe->config.vf_pp_in_res.width, + internal_pipe->config.vf_pp_in_res.height, + IA_CSS_FRAME_FORMAT_YUV_LINE, 0); + } + /* handle bayer downscaling output info */ + if (internal_pipe->config.bayer_ds_out_res.width) + { + ia_css_frame_info_init( + &internal_pipe->bds_output_info, + internal_pipe->config.bayer_ds_out_res.width, + internal_pipe->config.bayer_ds_out_res.height, + IA_CSS_FRAME_FORMAT_RAW, 0); + } + + /* handle output info, assume always needed */ + for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) + { + if (internal_pipe->config.output_info[i].res.width) { + err = sh_css_pipe_configure_output( + internal_pipe, + internal_pipe->config.output_info[i].res.width, + internal_pipe->config.output_info[i].res.height, + internal_pipe->config.output_info[i].padded_width, + internal_pipe->config.output_info[i].format, + i); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + sh_css_free(internal_pipe); + internal_pipe = NULL; + return err; } } - if (internal_pipe->config.acc_extension) - { - err = ia_css_pipe_load_extension(internal_pipe, - internal_pipe->config.acc_extension); + + /* handle vf output info, when configured */ + internal_pipe->enable_viewfinder[i] = + (internal_pipe->config.vf_output_info[i].res.width != 0); + if (internal_pipe->config.vf_output_info[i].res.width) { + err = sh_css_pipe_configure_viewfinder( + internal_pipe, + internal_pipe->config.vf_output_info[i].res.width, + internal_pipe->config.vf_output_info[i].res.height, + internal_pipe->config.vf_output_info[i].padded_width, + internal_pipe->config.vf_output_info[i].format, + i); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); sh_css_free(internal_pipe); + internal_pipe = NULL; return err; } } - /* set all info to zeroes first */ - memset(&internal_pipe->info, 0, sizeof(internal_pipe->info)); - - /* all went well, return the pipe */ - *pipe = internal_pipe; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; } - - enum ia_css_err - ia_css_pipe_get_info(const struct ia_css_pipe *pipe, - struct ia_css_pipe_info *pipe_info) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_pipe_get_info()\n"); - assert(pipe_info); - if (!pipe_info) - { - ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "ia_css_pipe_get_info: pipe_info cannot be NULL\n"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - if (!pipe || !pipe->stream) - { - ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, - "ia_css_pipe_get_info: ia_css_stream_create needs to be called before ia_css_[stream/pipe]_get_info\n"); - return IA_CSS_ERR_INVALID_ARGUMENTS; + if (internal_pipe->config.acc_extension) + { + err = ia_css_pipe_load_extension(internal_pipe, + internal_pipe->config.acc_extension); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + sh_css_free(internal_pipe); + return err; } - /* we succeeded return the info */ - *pipe_info = pipe->info; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_get_info() leave\n"); - return IA_CSS_SUCCESS; } + /* set all info to zeroes first */ + memset(&internal_pipe->info, 0, sizeof(internal_pipe->info)); - bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info) { - unsigned int i; + /* all went well, return the pipe */ + *pipe = internal_pipe; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; +} - if (pipe_info) { - for (i = 0; i < IA_CSS_DVS_STAT_NUM_OF_LEVELS; i++) { - if (pipe_info->grid_info.dvs_grid.dvs_stat_grid_info.grd_cfg[i].grd_start.enable) - return true; - } - } +enum ia_css_err +ia_css_pipe_get_info(const struct ia_css_pipe *pipe, + struct ia_css_pipe_info *pipe_info) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_pipe_get_info()\n"); + assert(pipe_info); + if (!pipe_info) + { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_pipe_get_info: pipe_info cannot be NULL\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + if (!pipe || !pipe->stream) + { + ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, + "ia_css_pipe_get_info: ia_css_stream_create needs to be called before ia_css_[stream/pipe]_get_info\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + /* we succeeded return the info */ + *pipe_info = pipe->info; + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_get_info() leave\n"); + return IA_CSS_SUCCESS; +} - return false; +bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info) { + unsigned int i; + + if (pipe_info) { + for (i = 0; i < IA_CSS_DVS_STAT_NUM_OF_LEVELS; i++) { + if (pipe_info->grid_info.dvs_grid.dvs_stat_grid_info.grd_cfg[i].grd_start.enable) + return true; + } } -#ifdef ISP2401 - enum ia_css_err - ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, - int pin_index, - enum ia_css_frame_format new_format) { - enum ia_css_err err = IA_CSS_SUCCESS; + return false; +} - IA_CSS_ENTER_PRIVATE("pipe = %p, pin_index = %d, new_formats = %d", pipe, pin_index, new_format); +enum ia_css_err +ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, + int pin_index, + enum ia_css_frame_format new_format) { + enum ia_css_err err = IA_CSS_SUCCESS; - if (!pipe) - { - IA_CSS_ERROR("pipe is not set"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (0 != pin_index && 1 != pin_index) - { - IA_CSS_ERROR("pin index is not valid"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (new_format != IA_CSS_FRAME_FORMAT_NV12_TILEY) - { - IA_CSS_ERROR("new format is not valid"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } else - { - err = ia_css_pipe_check_format(pipe, new_format); - if (err == IA_CSS_SUCCESS) { - if (pin_index == 0) { - pipe->output_info[0].format = new_format; - } else { - pipe->vf_output_info[0].format = new_format; - } - } - } + IA_CSS_ENTER_PRIVATE("pipe = %p, pin_index = %d, new_formats = %d", pipe, pin_index, new_format); + + if (!pipe) + { + IA_CSS_ERROR("pipe is not set"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (0 != pin_index && 1 != pin_index) + { + IA_CSS_ERROR("pin index is not valid"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } + if (new_format != IA_CSS_FRAME_FORMAT_NV12_TILEY) + { + IA_CSS_ERROR("new format is not valid"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } else + { + err = ia_css_pipe_check_format(pipe, new_format); + if (err == IA_CSS_SUCCESS) { + if (pin_index == 0) { + pipe->output_info[0].format = new_format; + } else { + pipe->vf_output_info[0].format = new_format; + } + } + } + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} -#endif #if defined(USE_INPUT_SYSTEM_VERSION_2) - /* Configuration of INPUT_SYSTEM_VERSION_2401 is done on SP */ - static enum ia_css_err - ia_css_stream_configure_rx(struct ia_css_stream *stream) { - struct ia_css_input_port *config; +/* Configuration of INPUT_SYSTEM_VERSION_2401 is done on SP */ +static enum ia_css_err +ia_css_stream_configure_rx(struct ia_css_stream *stream) { + struct ia_css_input_port *config; - assert(stream); + assert(stream); - config = &stream->config.source.port; - /* AM: this code is not reliable, especially for 2400 */ - if (config->num_lanes == 1) - stream->csi_rx_config.mode = MONO_1L_1L_0L; - else if (config->num_lanes == 2) - stream->csi_rx_config.mode = MONO_2L_1L_0L; - else if (config->num_lanes == 3) - stream->csi_rx_config.mode = MONO_3L_1L_0L; - else if (config->num_lanes == 4) - stream->csi_rx_config.mode = MONO_4L_1L_0L; - else if (config->num_lanes != 0) - return IA_CSS_ERR_INVALID_ARGUMENTS; + config = &stream->config.source.port; + /* AM: this code is not reliable, especially for 2400 */ + if (config->num_lanes == 1) + stream->csi_rx_config.mode = MONO_1L_1L_0L; + else if (config->num_lanes == 2) + stream->csi_rx_config.mode = MONO_2L_1L_0L; + else if (config->num_lanes == 3) + stream->csi_rx_config.mode = MONO_3L_1L_0L; + else if (config->num_lanes == 4) + stream->csi_rx_config.mode = MONO_4L_1L_0L; + else if (config->num_lanes != 0) + return IA_CSS_ERR_INVALID_ARGUMENTS; - if (config->port > MIPI_PORT2_ID) - return IA_CSS_ERR_INVALID_ARGUMENTS; - stream->csi_rx_config.port = - ia_css_isys_port_to_mipi_port(config->port); - stream->csi_rx_config.timeout = config->timeout; - stream->csi_rx_config.initcount = 0; - stream->csi_rx_config.synccount = 0x28282828; - stream->csi_rx_config.rxcount = config->rxcount; - if (config->compression.type == IA_CSS_CSI2_COMPRESSION_TYPE_NONE) - stream->csi_rx_config.comp = MIPI_PREDICTOR_NONE; - else - { - /* not implemented yet, requires extension of the rx_cfg_t - * struct */ - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - stream->csi_rx_config.is_two_ppc = (stream->config.pixels_per_clock == 2); - stream->reconfigure_css_rx = true; - return IA_CSS_SUCCESS; + if (config->port > MIPI_PORT2_ID) + return IA_CSS_ERR_INVALID_ARGUMENTS; + stream->csi_rx_config.port = + ia_css_isys_port_to_mipi_port(config->port); + stream->csi_rx_config.timeout = config->timeout; + stream->csi_rx_config.initcount = 0; + stream->csi_rx_config.synccount = 0x28282828; + stream->csi_rx_config.rxcount = config->rxcount; + if (config->compression.type == IA_CSS_CSI2_COMPRESSION_TYPE_NONE) + stream->csi_rx_config.comp = MIPI_PREDICTOR_NONE; + else + { + /* not implemented yet, requires extension of the rx_cfg_t + * struct */ + return IA_CSS_ERR_INVALID_ARGUMENTS; } + stream->csi_rx_config.is_two_ppc = (stream->config.pixels_per_clock == 2); + stream->reconfigure_css_rx = true; + return IA_CSS_SUCCESS; +} #endif - static struct ia_css_pipe * - find_pipe(struct ia_css_pipe *pipes[], - unsigned int num_pipes, - enum ia_css_pipe_mode mode, - bool copy_pipe) { - unsigned int i; +static struct ia_css_pipe * +find_pipe(struct ia_css_pipe *pipes[], + unsigned int num_pipes, + enum ia_css_pipe_mode mode, + bool copy_pipe) { + unsigned int i; - assert(pipes); - for (i = 0; i < num_pipes; i++) { - assert(pipes[i]); - if (pipes[i]->config.mode != mode) - continue; - if (copy_pipe && pipes[i]->mode != IA_CSS_PIPE_ID_COPY) - continue; - return pipes[i]; - } - return NULL; + assert(pipes); + for (i = 0; i < num_pipes; i++) { + assert(pipes[i]); + if (pipes[i]->config.mode != mode) + continue; + if (copy_pipe && pipes[i]->mode != IA_CSS_PIPE_ID_COPY) + continue; + return pipes[i]; } + return NULL; +} - static enum ia_css_err - ia_css_acc_stream_create(struct ia_css_stream *stream) { - int i; - enum ia_css_err err = IA_CSS_SUCCESS; +static enum ia_css_err +ia_css_acc_stream_create(struct ia_css_stream *stream) { + int i; + enum ia_css_err err = IA_CSS_SUCCESS; - assert(stream); - IA_CSS_ENTER_PRIVATE("stream = %p", stream); + assert(stream); + IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (!stream) - { + if (!stream) + { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + + for (i = 0; i < stream->num_pipes; i++) + { + struct ia_css_pipe *pipe = stream->pipes[i]; + + assert(pipe); + if (!pipe) { IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); return IA_CSS_ERR_INVALID_ARGUMENTS; } - for (i = 0; i < stream->num_pipes; i++) - { - struct ia_css_pipe *pipe = stream->pipes[i]; - - assert(pipe); - if (!pipe) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - - pipe->stream = stream; - } + pipe->stream = stream; + } - /* Map SP threads before doing anything. */ - err = map_sp_threads(stream, true); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + /* Map SP threads before doing anything. */ + err = map_sp_threads(stream, true); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - for (i = 0; i < stream->num_pipes; i++) - { - struct ia_css_pipe *pipe = stream->pipes[i]; + for (i = 0; i < stream->num_pipes; i++) + { + struct ia_css_pipe *pipe = stream->pipes[i]; - assert(pipe); - ia_css_pipe_map_queue(pipe, true); - } + assert(pipe); + ia_css_pipe_map_queue(pipe, true); + } - err = create_host_pipeline_structure(stream); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + err = create_host_pipeline_structure(stream); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - stream->started = false; + stream->started = false; - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); - return IA_CSS_SUCCESS; - } + return IA_CSS_SUCCESS; +} - static enum ia_css_err - metadata_info_init(const struct ia_css_metadata_config *mdc, - struct ia_css_metadata_info *md) { - /* Either both width and height should be set or neither */ - if ((mdc->resolution.height > 0) ^ (mdc->resolution.width > 0)) - return IA_CSS_ERR_INVALID_ARGUMENTS; +static enum ia_css_err +metadata_info_init(const struct ia_css_metadata_config *mdc, + struct ia_css_metadata_info *md) { + /* Either both width and height should be set or neither */ + if ((mdc->resolution.height > 0) ^ (mdc->resolution.width > 0)) + return IA_CSS_ERR_INVALID_ARGUMENTS; - md->resolution = mdc->resolution; - /* We round up the stride to a multiple of the width - * of the port going to DDR, this is a HW requirements (DMA). */ - md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); - md->size = mdc->resolution.height * md->stride; - return IA_CSS_SUCCESS; - } + md->resolution = mdc->resolution; + /* We round up the stride to a multiple of the width + * of the port going to DDR, this is a HW requirements (DMA). */ + md->stride = CEIL_MUL(mdc->resolution.width, HIVE_ISP_DDR_WORD_BYTES); + md->size = mdc->resolution.height * md->stride; + return IA_CSS_SUCCESS; +} -#ifdef ISP2401 - static enum ia_css_err check_pipe_resolutions(const struct ia_css_pipe *pipe) { - enum ia_css_err err = IA_CSS_SUCCESS; +/* ISP2401 */ +static enum ia_css_err check_pipe_resolutions(const struct ia_css_pipe *pipe) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER_PRIVATE(""); + IA_CSS_ENTER_PRIVATE(""); - if (!pipe || !pipe->stream) { - IA_CSS_ERROR("null arguments"); - err = IA_CSS_ERR_INTERNAL_ERROR; - goto EXIT; - } + if (!pipe || !pipe->stream) { + IA_CSS_ERROR("null arguments"); + err = IA_CSS_ERR_INTERNAL_ERROR; + goto EXIT; + } - if (ia_css_util_check_res(pipe->config.input_effective_res.width, - pipe->config.input_effective_res.height) != IA_CSS_SUCCESS) { - IA_CSS_ERROR("effective resolution not supported"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - goto EXIT; - } - if (!ia_css_util_resolution_is_zero( - pipe->stream->config.input_config.input_res)) { - if (!ia_css_util_res_leq(pipe->config.input_effective_res, - pipe->stream->config.input_config.input_res)) { - IA_CSS_ERROR("effective resolution is larger than input resolution"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - goto EXIT; - } - } - if (!ia_css_util_resolution_is_even(pipe->config.output_info[0].res)) { - IA_CSS_ERROR("output resolution must be even"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - goto EXIT; - } - if (!ia_css_util_resolution_is_even(pipe->config.vf_output_info[0].res)) { - IA_CSS_ERROR("VF resolution must be even"); + if (ia_css_util_check_res(pipe->config.input_effective_res.width, + pipe->config.input_effective_res.height) != IA_CSS_SUCCESS) { + IA_CSS_ERROR("effective resolution not supported"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + if (!ia_css_util_resolution_is_zero( + pipe->stream->config.input_config.input_res)) { + if (!ia_css_util_res_leq(pipe->config.input_effective_res, + pipe->stream->config.input_config.input_res)) { + IA_CSS_ERROR("effective resolution is larger than input resolution"); err = IA_CSS_ERR_INVALID_ARGUMENTS; goto EXIT; } -EXIT: - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; } + if (!ia_css_util_resolution_is_even(pipe->config.output_info[0].res)) { + IA_CSS_ERROR("output resolution must be even"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } + if (!ia_css_util_resolution_is_even(pipe->config.vf_output_info[0].res)) { + IA_CSS_ERROR("VF resolution must be even"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto EXIT; + } +EXIT: + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; +} -#endif - - enum ia_css_err - ia_css_stream_create(const struct ia_css_stream_config *stream_config, - int num_pipes, - struct ia_css_pipe *pipes[], - struct ia_css_stream **stream) { - struct ia_css_pipe *curr_pipe; - struct ia_css_stream *curr_stream = NULL; - bool spcopyonly; - bool sensor_binning_changed; - int i, j; - enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; - struct ia_css_metadata_info md_info; +enum ia_css_err +ia_css_stream_create(const struct ia_css_stream_config *stream_config, + int num_pipes, + struct ia_css_pipe *pipes[], + struct ia_css_stream **stream) { + struct ia_css_pipe *curr_pipe; + struct ia_css_stream *curr_stream = NULL; + bool spcopyonly; + bool sensor_binning_changed; + int i, j; + enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; + struct ia_css_metadata_info md_info; #ifndef ISP2401 - struct ia_css_resolution effective_res; + struct ia_css_resolution effective_res; #else #ifdef USE_INPUT_SYSTEM_VERSION_2401 - bool aspect_ratio_crop_enabled = false; + bool aspect_ratio_crop_enabled = false; #endif #endif - IA_CSS_ENTER("num_pipes=%d", num_pipes); - ia_css_debug_dump_stream_config(stream_config, num_pipes); + IA_CSS_ENTER("num_pipes=%d", num_pipes); + ia_css_debug_dump_stream_config(stream_config, num_pipes); - /* some checks */ - if (num_pipes == 0 || - !stream || - !pipes) - { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + /* some checks */ + if (num_pipes == 0 || + !stream || + !pipes) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } #if defined(USE_INPUT_SYSTEM_VERSION_2) - /* We don't support metadata for JPEG stream, since they both use str2mem */ - if (stream_config->input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8 && - stream_config->metadata_config.resolution.height > 0) - { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + /* We don't support metadata for JPEG stream, since they both use str2mem */ + if (stream_config->input_config.format == ATOMISP_INPUT_FORMAT_BINARY_8 && + stream_config->metadata_config.resolution.height > 0) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } #endif #ifdef USE_INPUT_SYSTEM_VERSION_2401 - if (stream_config->online && stream_config->pack_raw_pixels) - { - IA_CSS_LOG("online and pack raw is invalid on input system 2401"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + if (stream_config->online && stream_config->pack_raw_pixels) + { + IA_CSS_LOG("online and pack raw is invalid on input system 2401"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } #endif #if !defined(HAS_NO_INPUT_SYSTEM) - ia_css_debug_pipe_graph_dump_stream_config(stream_config); + ia_css_debug_pipe_graph_dump_stream_config(stream_config); - /* check if mipi size specified */ - if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + /* check if mipi size specified */ + if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) #ifdef USE_INPUT_SYSTEM_VERSION_2401 - if (!stream_config->online) + if (!stream_config->online) #endif - { - unsigned int port = (unsigned int)stream_config->source.port.port; + { + unsigned int port = (unsigned int)stream_config->source.port.port; - if (port >= N_MIPI_PORT_ID) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + if (port >= N_MIPI_PORT_ID) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } - if (my_css.size_mem_words != 0) { - my_css.mipi_frame_size[port] = my_css.size_mem_words; - } else if (stream_config->mipi_buffer_config.size_mem_words != 0) { - my_css.mipi_frame_size[port] = stream_config->mipi_buffer_config.size_mem_words; - } else { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_create() exit: error, need to set mipi frame size.\n"); - assert(stream_config->mipi_buffer_config.size_mem_words != 0); - err = IA_CSS_ERR_INTERNAL_ERROR; - IA_CSS_LEAVE_ERR(err); - return err; - } + if (my_css.size_mem_words != 0) { + my_css.mipi_frame_size[port] = my_css.size_mem_words; + } else if (stream_config->mipi_buffer_config.size_mem_words != 0) { + my_css.mipi_frame_size[port] = stream_config->mipi_buffer_config.size_mem_words; + } else { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_create() exit: error, need to set mipi frame size.\n"); + assert(stream_config->mipi_buffer_config.size_mem_words != 0); + err = IA_CSS_ERR_INTERNAL_ERROR; + IA_CSS_LEAVE_ERR(err); + return err; + } - if (my_css.size_mem_words != 0) { - my_css.num_mipi_frames[port] = - 2; /* Temp change: Default for backwards compatibility. */ - } else if (stream_config->mipi_buffer_config.nof_mipi_buffers != 0) { - my_css.num_mipi_frames[port] = - stream_config->mipi_buffer_config.nof_mipi_buffers; - } else { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_create() exit: error, need to set number of mipi frames.\n"); - assert(stream_config->mipi_buffer_config.nof_mipi_buffers != 0); - err = IA_CSS_ERR_INTERNAL_ERROR; - IA_CSS_LEAVE_ERR(err); - return err; - } + if (my_css.size_mem_words != 0) { + my_css.num_mipi_frames[port] = + 2; /* Temp change: Default for backwards compatibility. */ + } else if (stream_config->mipi_buffer_config.nof_mipi_buffers != 0) { + my_css.num_mipi_frames[port] = + stream_config->mipi_buffer_config.nof_mipi_buffers; + } else { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_create() exit: error, need to set number of mipi frames.\n"); + assert(stream_config->mipi_buffer_config.nof_mipi_buffers != 0); + err = IA_CSS_ERR_INTERNAL_ERROR; + IA_CSS_LEAVE_ERR(err); + return err; } + } #endif - /* Currently we only supported metadata up to a certain size. */ - err = metadata_info_init(&stream_config->metadata_config, &md_info); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LEAVE_ERR(err); - return err; - } + /* Currently we only supported metadata up to a certain size. */ + err = metadata_info_init(&stream_config->metadata_config, &md_info); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR(err); + return err; + } - /* allocate the stream instance */ - curr_stream = kmalloc(sizeof(struct ia_css_stream), GFP_KERNEL); - if (!curr_stream) - { - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - IA_CSS_LEAVE_ERR(err); - return err; - } - /* default all to 0 */ - memset(curr_stream, 0, sizeof(struct ia_css_stream)); - curr_stream->info.metadata_info = md_info; + /* allocate the stream instance */ + curr_stream = kmalloc(sizeof(struct ia_css_stream), GFP_KERNEL); + if (!curr_stream) + { + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + IA_CSS_LEAVE_ERR(err); + return err; + } + /* default all to 0 */ + memset(curr_stream, 0, sizeof(struct ia_css_stream)); + curr_stream->info.metadata_info = md_info; - /* allocate pipes */ - curr_stream->num_pipes = num_pipes; - curr_stream->pipes = kcalloc(num_pipes, sizeof(struct ia_css_pipe *), GFP_KERNEL); - if (!curr_stream->pipes) - { - curr_stream->num_pipes = 0; - kfree(curr_stream); - curr_stream = NULL; - err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - IA_CSS_LEAVE_ERR(err); - return err; - } - /* store pipes */ - spcopyonly = (num_pipes == 1) && (pipes[0]->config.mode == IA_CSS_PIPE_MODE_COPY); - for (i = 0; i < num_pipes; i++) - curr_stream->pipes[i] = pipes[i]; - curr_stream->last_pipe = curr_stream->pipes[0]; - /* take over stream config */ - curr_stream->config = *stream_config; + /* allocate pipes */ + curr_stream->num_pipes = num_pipes; + curr_stream->pipes = kcalloc(num_pipes, sizeof(struct ia_css_pipe *), GFP_KERNEL); + if (!curr_stream->pipes) + { + curr_stream->num_pipes = 0; + kfree(curr_stream); + curr_stream = NULL; + err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + IA_CSS_LEAVE_ERR(err); + return err; + } + /* store pipes */ + spcopyonly = (num_pipes == 1) && (pipes[0]->config.mode == IA_CSS_PIPE_MODE_COPY); + for (i = 0; i < num_pipes; i++) + curr_stream->pipes[i] = pipes[i]; + curr_stream->last_pipe = curr_stream->pipes[0]; + /* take over stream config */ + curr_stream->config = *stream_config; #if defined(USE_INPUT_SYSTEM_VERSION_2401) && defined(CSI2P_DISABLE_ISYS2401_ONLINE_MODE) - if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR && - stream_config->online) - curr_stream->config.online = false; + if (stream_config->mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR && + stream_config->online) + curr_stream->config.online = false; #endif #ifdef USE_INPUT_SYSTEM_VERSION_2401 - if (curr_stream->config.online) - { - curr_stream->config.source.port.num_lanes = - stream_config->source.port.num_lanes; - curr_stream->config.mode = IA_CSS_INPUT_MODE_BUFFERED_SENSOR; - } + if (curr_stream->config.online) + { + curr_stream->config.source.port.num_lanes = + stream_config->source.port.num_lanes; + curr_stream->config.mode = IA_CSS_INPUT_MODE_BUFFERED_SENSOR; + } #endif - /* in case driver doesn't configure init number of raw buffers, configure it here */ - if (curr_stream->config.target_num_cont_raw_buf == 0) - curr_stream->config.target_num_cont_raw_buf = NUM_CONTINUOUS_FRAMES; - if (curr_stream->config.init_num_cont_raw_buf == 0) - curr_stream->config.init_num_cont_raw_buf = curr_stream->config.target_num_cont_raw_buf; + /* in case driver doesn't configure init number of raw buffers, configure it here */ + if (curr_stream->config.target_num_cont_raw_buf == 0) + curr_stream->config.target_num_cont_raw_buf = NUM_CONTINUOUS_FRAMES; + if (curr_stream->config.init_num_cont_raw_buf == 0) + curr_stream->config.init_num_cont_raw_buf = curr_stream->config.target_num_cont_raw_buf; - /* Enable locking & unlocking of buffers in RAW buffer pool */ - if (curr_stream->config.ia_css_enable_raw_buffer_locking) - sh_css_sp_configure_enable_raw_pool_locking( - curr_stream->config.lock_all); + /* Enable locking & unlocking of buffers in RAW buffer pool */ + if (curr_stream->config.ia_css_enable_raw_buffer_locking) + sh_css_sp_configure_enable_raw_pool_locking( + curr_stream->config.lock_all); - /* copy mode specific stuff */ - switch (curr_stream->config.mode) - { - case IA_CSS_INPUT_MODE_SENSOR: - case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: + /* copy mode specific stuff */ + switch (curr_stream->config.mode) + { + case IA_CSS_INPUT_MODE_SENSOR: + case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: #if defined(USE_INPUT_SYSTEM_VERSION_2) - ia_css_stream_configure_rx(curr_stream); + ia_css_stream_configure_rx(curr_stream); #endif - break; - case IA_CSS_INPUT_MODE_TPG: + break; + case IA_CSS_INPUT_MODE_TPG: #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - IA_CSS_LOG("tpg_configuration: x_mask=%d, y_mask=%d, x_delta=%d, y_delta=%d, xy_mask=%d", - curr_stream->config.source.tpg.x_mask, - curr_stream->config.source.tpg.y_mask, - curr_stream->config.source.tpg.x_delta, - curr_stream->config.source.tpg.y_delta, - curr_stream->config.source.tpg.xy_mask); - - sh_css_sp_configure_tpg( + IA_CSS_LOG("tpg_configuration: x_mask=%d, y_mask=%d, x_delta=%d, y_delta=%d, xy_mask=%d", curr_stream->config.source.tpg.x_mask, curr_stream->config.source.tpg.y_mask, curr_stream->config.source.tpg.x_delta, curr_stream->config.source.tpg.y_delta, curr_stream->config.source.tpg.xy_mask); + + sh_css_sp_configure_tpg( + curr_stream->config.source.tpg.x_mask, + curr_stream->config.source.tpg.y_mask, + curr_stream->config.source.tpg.x_delta, + curr_stream->config.source.tpg.y_delta, + curr_stream->config.source.tpg.xy_mask); #endif - break; - case IA_CSS_INPUT_MODE_PRBS: + break; + case IA_CSS_INPUT_MODE_PRBS: #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - IA_CSS_LOG("mode prbs"); - sh_css_sp_configure_prbs(curr_stream->config.source.prbs.seed); + IA_CSS_LOG("mode prbs"); + sh_css_sp_configure_prbs(curr_stream->config.source.prbs.seed); #endif - break; - case IA_CSS_INPUT_MODE_MEMORY: - IA_CSS_LOG("mode memory"); - curr_stream->reconfigure_css_rx = false; - break; - default: - IA_CSS_LOG("mode sensor/default"); - } + break; + case IA_CSS_INPUT_MODE_MEMORY: + IA_CSS_LOG("mode memory"); + curr_stream->reconfigure_css_rx = false; + break; + default: + IA_CSS_LOG("mode sensor/default"); + } -#ifdef ISP2401 #ifdef USE_INPUT_SYSTEM_VERSION_2401 - err = aspect_ratio_crop_init(curr_stream, - pipes, - &aspect_ratio_crop_enabled); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LEAVE_ERR(err); - return err; - } + err = aspect_ratio_crop_init(curr_stream, + pipes, + &aspect_ratio_crop_enabled); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR(err); + return err; + } #endif + for (i = 0; i < num_pipes; i++) + { + struct ia_css_resolution effective_res; -#endif - for (i = 0; i < num_pipes; i++) - { -#ifdef ISP2401 - struct ia_css_resolution effective_res; -#endif - curr_pipe = pipes[i]; - /* set current stream */ - curr_pipe->stream = curr_stream; - /* take over effective info */ + curr_pipe = pipes[i]; + /* set current stream */ + curr_pipe->stream = curr_stream; + /* take over effective info */ - effective_res = curr_pipe->config.input_effective_res; - if (effective_res.height == 0 || effective_res.width == 0) { - effective_res = curr_pipe->stream->config.input_config.effective_res; -#ifdef ISP2401 + effective_res = curr_pipe->config.input_effective_res; + if (effective_res.height == 0 || effective_res.width == 0) { + effective_res = curr_pipe->stream->config.input_config.effective_res; #if defined(USE_INPUT_SYSTEM_VERSION_2401) - /* The aspect ratio cropping is currently only - * supported on the new input system. */ - if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { - struct ia_css_resolution crop_res; - - err = aspect_ratio_crop(curr_pipe, &crop_res); - if (err == IA_CSS_SUCCESS) { - effective_res = crop_res; - } else { - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("aspect_ratio_crop() failed with err(%d)", err); - } + /* The aspect ratio cropping is currently only + * supported on the new input system. */ + if (aspect_ratio_crop_check(aspect_ratio_crop_enabled, curr_pipe)) { + struct ia_css_resolution crop_res; + + err = aspect_ratio_crop(curr_pipe, &crop_res); + if (err == IA_CSS_SUCCESS) { + effective_res = crop_res; + } else { + /* in case of error fallback to default + * effective resolution from driver. */ + IA_CSS_LOG("aspect_ratio_crop() failed with err(%d)", err); } -#endif -#endif - curr_pipe->config.input_effective_res = effective_res; } - IA_CSS_LOG("effective_res=%dx%d", - effective_res.width, - effective_res.height); +#endif + curr_pipe->config.input_effective_res = effective_res; } + IA_CSS_LOG("effective_res=%dx%d", + effective_res.width, + effective_res.height); + } -#ifdef ISP2401 - for (i = 0; i < num_pipes; i++) - { + if (atomisp_hw_is_isp2401) { + for (i = 0; i < num_pipes; i++) { if (pipes[i]->config.mode != IA_CSS_PIPE_MODE_ACC && pipes[i]->config.mode != IA_CSS_PIPE_MODE_COPY) { err = check_pipe_resolutions(pipes[i]); @@ -9796,393 +9692,372 @@ static enum ia_css_err load_primary_binaries( } } } + } -#endif - err = ia_css_stream_isp_parameters_init(curr_stream); - if (err != IA_CSS_SUCCESS) - goto ERR; - IA_CSS_LOG("isp_params_configs: %p", curr_stream->isp_params_configs); + err = ia_css_stream_isp_parameters_init(curr_stream); + if (err != IA_CSS_SUCCESS) + goto ERR; + IA_CSS_LOG("isp_params_configs: %p", curr_stream->isp_params_configs); - if (num_pipes == 1 && pipes[0]->config.mode == IA_CSS_PIPE_MODE_ACC) - { - *stream = curr_stream; - err = ia_css_acc_stream_create(curr_stream); - goto ERR; - } - /* sensor binning */ - if (!spcopyonly) - { - sensor_binning_changed = - sh_css_params_set_binning_factor(curr_stream, - curr_stream->config.sensor_binning_factor); - } else - { - sensor_binning_changed = false; - } + if (num_pipes == 1 && pipes[0]->config.mode == IA_CSS_PIPE_MODE_ACC) + { + *stream = curr_stream; + err = ia_css_acc_stream_create(curr_stream); + goto ERR; + } + /* sensor binning */ + if (!spcopyonly) + { + sensor_binning_changed = + sh_css_params_set_binning_factor(curr_stream, + curr_stream->config.sensor_binning_factor); + } else + { + sensor_binning_changed = false; + } - IA_CSS_LOG("sensor_binning=%d, changed=%d", - curr_stream->config.sensor_binning_factor, sensor_binning_changed); - /* loop over pipes */ - IA_CSS_LOG("num_pipes=%d", num_pipes); - curr_stream->cont_capt = false; - /* Temporary hack: we give the preview pipe a reference to the capture - * pipe in continuous capture mode. */ - if (curr_stream->config.continuous) - { - /* Search for the preview pipe and create the copy pipe */ - struct ia_css_pipe *preview_pipe; - struct ia_css_pipe *video_pipe; - struct ia_css_pipe *acc_pipe; - struct ia_css_pipe *capture_pipe = NULL; - struct ia_css_pipe *copy_pipe = NULL; - - if (num_pipes >= 2) { - curr_stream->cont_capt = true; - curr_stream->disable_cont_vf = curr_stream->config.disable_cont_viewfinder; -#ifndef ISP2401 + IA_CSS_LOG("sensor_binning=%d, changed=%d", + curr_stream->config.sensor_binning_factor, sensor_binning_changed); + /* loop over pipes */ + IA_CSS_LOG("num_pipes=%d", num_pipes); + curr_stream->cont_capt = false; + /* Temporary hack: we give the preview pipe a reference to the capture + * pipe in continuous capture mode. */ + if (curr_stream->config.continuous) + { + /* Search for the preview pipe and create the copy pipe */ + struct ia_css_pipe *preview_pipe; + struct ia_css_pipe *video_pipe; + struct ia_css_pipe *acc_pipe; + struct ia_css_pipe *capture_pipe = NULL; + struct ia_css_pipe *copy_pipe = NULL; + + if (num_pipes >= 2) { + curr_stream->cont_capt = true; + curr_stream->disable_cont_vf = curr_stream->config.disable_cont_viewfinder; + + if (!atomisp_hw_is_isp2401) curr_stream->stop_copy_preview = my_css.stop_copy_preview; -#endif - } + } - /* Create copy pipe here, since it may not be exposed to the driver */ - preview_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_PREVIEW, false); - video_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_VIDEO, false); - acc_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_ACC, false); - if (acc_pipe && num_pipes == 2 && curr_stream->cont_capt == true) - curr_stream->cont_capt = - false; /* preview + QoS case will not need cont_capt switch */ - if (curr_stream->cont_capt == true) { - capture_pipe = find_pipe(pipes, num_pipes, - IA_CSS_PIPE_MODE_CAPTURE, false); - if (!capture_pipe) { - err = IA_CSS_ERR_INTERNAL_ERROR; - goto ERR; - } - } - /* We do not support preview and video pipe at the same time */ - if (preview_pipe && video_pipe) { - err = IA_CSS_ERR_INVALID_ARGUMENTS; + /* Create copy pipe here, since it may not be exposed to the driver */ + preview_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_PREVIEW, false); + video_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_VIDEO, false); + acc_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_ACC, false); + if (acc_pipe && num_pipes == 2 && curr_stream->cont_capt == true) + curr_stream->cont_capt = + false; /* preview + QoS case will not need cont_capt switch */ + if (curr_stream->cont_capt == true) { + capture_pipe = find_pipe(pipes, num_pipes, + IA_CSS_PIPE_MODE_CAPTURE, false); + if (!capture_pipe) { + err = IA_CSS_ERR_INTERNAL_ERROR; goto ERR; } + } + /* We do not support preview and video pipe at the same time */ + if (preview_pipe && video_pipe) { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + goto ERR; + } - if (preview_pipe && !preview_pipe->pipe_settings.preview.copy_pipe) { - err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); - if (err != IA_CSS_SUCCESS) - goto ERR; - ia_css_pipe_config_defaults(©_pipe->config); - preview_pipe->pipe_settings.preview.copy_pipe = copy_pipe; - copy_pipe->stream = curr_stream; - } - if (preview_pipe && (curr_stream->cont_capt == true)) { - preview_pipe->pipe_settings.preview.capture_pipe = capture_pipe; - } - if (video_pipe && !video_pipe->pipe_settings.video.copy_pipe) { - err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); - if (err != IA_CSS_SUCCESS) - goto ERR; - ia_css_pipe_config_defaults(©_pipe->config); - video_pipe->pipe_settings.video.copy_pipe = copy_pipe; - copy_pipe->stream = curr_stream; - } - if (video_pipe && (curr_stream->cont_capt == true)) { - video_pipe->pipe_settings.video.capture_pipe = capture_pipe; - } - if (preview_pipe && acc_pipe) { - preview_pipe->pipe_settings.preview.acc_pipe = acc_pipe; - } + if (preview_pipe && !preview_pipe->pipe_settings.preview.copy_pipe) { + err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); + if (err != IA_CSS_SUCCESS) + goto ERR; + ia_css_pipe_config_defaults(©_pipe->config); + preview_pipe->pipe_settings.preview.copy_pipe = copy_pipe; + copy_pipe->stream = curr_stream; } - for (i = 0; i < num_pipes; i++) - { - curr_pipe = pipes[i]; - /* set current stream */ - curr_pipe->stream = curr_stream; -#ifndef ISP2401 + if (preview_pipe && (curr_stream->cont_capt == true)) { + preview_pipe->pipe_settings.preview.capture_pipe = capture_pipe; + } + if (video_pipe && !video_pipe->pipe_settings.video.copy_pipe) { + err = create_pipe(IA_CSS_PIPE_MODE_CAPTURE, ©_pipe, true); + if (err != IA_CSS_SUCCESS) + goto ERR; + ia_css_pipe_config_defaults(©_pipe->config); + video_pipe->pipe_settings.video.copy_pipe = copy_pipe; + copy_pipe->stream = curr_stream; + } + if (video_pipe && (curr_stream->cont_capt == true)) { + video_pipe->pipe_settings.video.capture_pipe = capture_pipe; + } + if (preview_pipe && acc_pipe) { + preview_pipe->pipe_settings.preview.acc_pipe = acc_pipe; + } + } + for (i = 0; i < num_pipes; i++) + { + curr_pipe = pipes[i]; + /* set current stream */ + curr_pipe->stream = curr_stream; + + if (!atomisp_hw_is_isp2401) { /* take over effective info */ effective_res = curr_pipe->config.input_effective_res; err = ia_css_util_check_res( - effective_res.width, - effective_res.height); + effective_res.width, + effective_res.height); if (err != IA_CSS_SUCCESS) goto ERR; -#endif - /* sensor binning per pipe */ - if (sensor_binning_changed) - sh_css_pipe_free_shading_table(curr_pipe); } + /* sensor binning per pipe */ + if (sensor_binning_changed) + sh_css_pipe_free_shading_table(curr_pipe); + } - /* now pipes have been configured, info should be available */ - for (i = 0; i < num_pipes; i++) - { - struct ia_css_pipe_info *pipe_info = NULL; + /* now pipes have been configured, info should be available */ + for (i = 0; i < num_pipes; i++) + { + struct ia_css_pipe_info *pipe_info = NULL; + + curr_pipe = pipes[i]; - curr_pipe = pipes[i]; + err = sh_css_pipe_load_binaries(curr_pipe); + if (err != IA_CSS_SUCCESS) + goto ERR; - err = sh_css_pipe_load_binaries(curr_pipe); + /* handle each pipe */ + pipe_info = &curr_pipe->info; + for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { + err = sh_css_pipe_get_output_frame_info(curr_pipe, + &pipe_info->output_info[j], j); if (err != IA_CSS_SUCCESS) goto ERR; + } - /* handle each pipe */ - pipe_info = &curr_pipe->info; - for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { - err = sh_css_pipe_get_output_frame_info(curr_pipe, - &pipe_info->output_info[j], j); - if (err != IA_CSS_SUCCESS) - goto ERR; - } - - if (atomisp_hw_is_isp2401) - pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; + if (atomisp_hw_is_isp2401) + pipe_info->output_system_in_res_info = curr_pipe->config.output_system_in_res; - if (!spcopyonly) { - if (!atomisp_hw_is_isp2401) - err = sh_css_pipe_get_shading_info(curr_pipe, - &pipe_info->shading_info, NULL); - else - err = sh_css_pipe_get_shading_info(curr_pipe, - &pipe_info->shading_info, &curr_pipe->config); + if (!spcopyonly) { + if (!atomisp_hw_is_isp2401) + err = sh_css_pipe_get_shading_info(curr_pipe, + &pipe_info->shading_info, NULL); + else + err = sh_css_pipe_get_shading_info(curr_pipe, + &pipe_info->shading_info, &curr_pipe->config); + if (err != IA_CSS_SUCCESS) + goto ERR; + err = sh_css_pipe_get_grid_info(curr_pipe, + &pipe_info->grid_info); + if (err != IA_CSS_SUCCESS) + goto ERR; + for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { + sh_css_pipe_get_viewfinder_frame_info(curr_pipe, + &pipe_info->vf_output_info[j], j); if (err != IA_CSS_SUCCESS) goto ERR; - err = sh_css_pipe_get_grid_info(curr_pipe, - &pipe_info->grid_info); - if (err != IA_CSS_SUCCESS) - goto ERR; - for (j = 0; j < IA_CSS_PIPE_MAX_OUTPUT_STAGE; j++) { - sh_css_pipe_get_viewfinder_frame_info(curr_pipe, - &pipe_info->vf_output_info[j], j); - if (err != IA_CSS_SUCCESS) - goto ERR; - } } - - my_css.active_pipes[ia_css_pipe_get_pipe_num(curr_pipe)] = curr_pipe; } - curr_stream->started = false; + my_css.active_pipes[ia_css_pipe_get_pipe_num(curr_pipe)] = curr_pipe; + } - /* Map SP threads before doing anything. */ - err = map_sp_threads(curr_stream, true); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LOG("map_sp_threads: return_err=%d", err); - goto ERR; - } + curr_stream->started = false; - for (i = 0; i < num_pipes; i++) - { - curr_pipe = pipes[i]; - ia_css_pipe_map_queue(curr_pipe, true); - } + /* Map SP threads before doing anything. */ + err = map_sp_threads(curr_stream, true); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LOG("map_sp_threads: return_err=%d", err); + goto ERR; + } - /* Create host side pipeline objects without stages */ - err = create_host_pipeline_structure(curr_stream); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LOG("create_host_pipeline_structure: return_err=%d", err); - goto ERR; - } + for (i = 0; i < num_pipes; i++) + { + curr_pipe = pipes[i]; + ia_css_pipe_map_queue(curr_pipe, true); + } - /* assign curr_stream */ - *stream = curr_stream; + /* Create host side pipeline objects without stages */ + err = create_host_pipeline_structure(curr_stream); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LOG("create_host_pipeline_structure: return_err=%d", err); + goto ERR; + } + + /* assign curr_stream */ + *stream = curr_stream; ERR: -#ifndef ISP2401 - if (err == IA_CSS_SUCCESS) - { - /* working mode: enter into the seed list */ - if (my_css_save.mode == sh_css_mode_working) { - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (!my_css_save.stream_seeds[i].stream) { - IA_CSS_LOG("entered stream into loc=%d", i); - my_css_save.stream_seeds[i].orig_stream = stream; - my_css_save.stream_seeds[i].stream = curr_stream; - my_css_save.stream_seeds[i].num_pipes = num_pipes; - my_css_save.stream_seeds[i].stream_config = *stream_config; - for (j = 0; j < num_pipes; j++) { - my_css_save.stream_seeds[i].pipe_config[j] = pipes[j]->config; - my_css_save.stream_seeds[i].pipes[j] = pipes[j]; - my_css_save.stream_seeds[i].orig_pipes[j] = &pipes[j]; - } - break; + if (err == IA_CSS_SUCCESS) { + /* working mode: enter into the seed list */ + if (my_css_save.mode == sh_css_mode_working) { + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { + if (!my_css_save.stream_seeds[i].stream) { + IA_CSS_LOG("entered stream into loc=%d", i); + my_css_save.stream_seeds[i].orig_stream = stream; + my_css_save.stream_seeds[i].stream = curr_stream; + my_css_save.stream_seeds[i].num_pipes = num_pipes; + my_css_save.stream_seeds[i].stream_config = *stream_config; + for (j = 0; j < num_pipes; j++) { + my_css_save.stream_seeds[i].pipe_config[j] = pipes[j]->config; + my_css_save.stream_seeds[i].pipes[j] = pipes[j]; + my_css_save.stream_seeds[i].orig_pipes[j] = &pipes[j]; } + break; + } } -#else - if (err == IA_CSS_SUCCESS) - { - err = ia_css_save_stream(curr_stream); -#endif - } else - { + } else { ia_css_stream_destroy(curr_stream); } -#ifndef ISP2401 - IA_CSS_LEAVE("return_err=%d mode=%d", err, my_css_save.mode); -#else - IA_CSS_LEAVE("return_err=%d", err); -#endif - return err; + } else { + ia_css_stream_destroy(curr_stream); } + IA_CSS_LEAVE("return_err=%d mode=%d", err, my_css_save.mode); + return err; +} - enum ia_css_err - ia_css_stream_destroy(struct ia_css_stream *stream) { - int i; - enum ia_css_err err = IA_CSS_SUCCESS; -#ifdef ISP2401 - enum ia_css_err err1 = IA_CSS_SUCCESS; - enum ia_css_err err2 = IA_CSS_SUCCESS; -#endif +enum ia_css_err +ia_css_stream_destroy(struct ia_css_stream *stream) { + int i; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER_PRIVATE("stream = %p", stream); - if (!stream) - { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + IA_CSS_ENTER_PRIVATE("stream = %p", stream); + if (!stream) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } - ia_css_stream_isp_parameters_uninit(stream); + ia_css_stream_isp_parameters_uninit(stream); - if ((stream->last_pipe) && - ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) - { + if ((stream->last_pipe) && + ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) + { #if defined(USE_INPUT_SYSTEM_VERSION_2401) - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *entry = stream->pipes[i]; - unsigned int sp_thread_id; - struct sh_css_sp_pipeline_terminal *sp_pipeline_input_terminal; - - assert(entry); - if (entry) { - /* get the SP thread id */ - if (ia_css_pipeline_get_sp_thread_id( - ia_css_pipe_get_pipe_num(entry), &sp_thread_id) != true) - return IA_CSS_ERR_INTERNAL_ERROR; - /* get the target input terminal */ - sp_pipeline_input_terminal = - &sh_css_sp_group.pipe_io[sp_thread_id].input; - - for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { - ia_css_isys_stream_h isys_stream = - &sp_pipeline_input_terminal->context.virtual_input_system_stream[i]; - if (stream->config.isys_config[i].valid && isys_stream->valid) - ia_css_isys_stream_destroy(isys_stream); - } + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *entry = stream->pipes[i]; + unsigned int sp_thread_id; + struct sh_css_sp_pipeline_terminal *sp_pipeline_input_terminal; + + assert(entry); + if (entry) { + /* get the SP thread id */ + if (ia_css_pipeline_get_sp_thread_id( + ia_css_pipe_get_pipe_num(entry), &sp_thread_id) != true) + return IA_CSS_ERR_INTERNAL_ERROR; + /* get the target input terminal */ + sp_pipeline_input_terminal = + &sh_css_sp_group.pipe_io[sp_thread_id].input; + + for (i = 0; i < IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH; i++) { + ia_css_isys_stream_h isys_stream = + &sp_pipeline_input_terminal->context.virtual_input_system_stream[i]; + if (stream->config.isys_config[i].valid && isys_stream->valid) + ia_css_isys_stream_destroy(isys_stream); } } -#ifndef ISP2401 - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { -#else - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - stream->config.mode == IA_CSS_INPUT_MODE_TPG || - stream->config.mode == IA_CSS_INPUT_MODE_PRBS) { -#endif - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *entry = stream->pipes[i]; - /* free any mipi frames that are remaining: - * some test stream create-destroy cycles do not generate output frames - * and the mipi buffer is not freed in the deque function - */ - if (entry) - free_mipi_frames(entry); - } + } + free_mpi = stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR; + if (atomisp_hw_is_isp2401) { + free_mpi |= stream->config.mode == IA_CSS_INPUT_MODE_TPG; + free_mpi |= stream->config.mode == IA_CSS_INPUT_MODE_PRBS; + } + + if (free_mpi) { + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *entry = stream->pipes[i]; + /* free any mipi frames that are remaining: + * some test stream create-destroy cycles do not generate output frames + * and the mipi buffer is not freed in the deque function + */ + if (entry) + free_mipi_frames(entry); } - stream_unregister_with_csi_rx(stream); + } + stream_unregister_with_csi_rx(stream); #endif - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *curr_pipe = stream->pipes[i]; + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *curr_pipe = stream->pipes[i]; - assert(curr_pipe); - ia_css_pipe_map_queue(curr_pipe, false); - } + assert(curr_pipe); + ia_css_pipe_map_queue(curr_pipe, false); + } - err = map_sp_threads(stream, false); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } + err = map_sp_threads(stream, false); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; } + } - /* remove references from pipes to stream */ - for (i = 0; i < stream->num_pipes; i++) - { - struct ia_css_pipe *entry = stream->pipes[i]; + /* remove references from pipes to stream */ + for (i = 0; i < stream->num_pipes; i++) + { + struct ia_css_pipe *entry = stream->pipes[i]; - assert(entry); - if (entry) { - /* clear reference to stream */ - entry->stream = NULL; - /* check internal copy pipe */ - if (entry->mode == IA_CSS_PIPE_ID_PREVIEW && - entry->pipe_settings.preview.copy_pipe) { - IA_CSS_LOG("clearing stream on internal preview copy pipe"); - entry->pipe_settings.preview.copy_pipe->stream = NULL; - } - if (entry->mode == IA_CSS_PIPE_ID_VIDEO && - entry->pipe_settings.video.copy_pipe) { - IA_CSS_LOG("clearing stream on internal video copy pipe"); - entry->pipe_settings.video.copy_pipe->stream = NULL; - } - err = sh_css_pipe_unload_binaries(entry); + assert(entry); + if (entry) { + /* clear reference to stream */ + entry->stream = NULL; + /* check internal copy pipe */ + if (entry->mode == IA_CSS_PIPE_ID_PREVIEW && + entry->pipe_settings.preview.copy_pipe) { + IA_CSS_LOG("clearing stream on internal preview copy pipe"); + entry->pipe_settings.preview.copy_pipe->stream = NULL; + } + if (entry->mode == IA_CSS_PIPE_ID_VIDEO && + entry->pipe_settings.video.copy_pipe) { + IA_CSS_LOG("clearing stream on internal video copy pipe"); + entry->pipe_settings.video.copy_pipe->stream = NULL; } + err = sh_css_pipe_unload_binaries(entry); } - /* free associated memory of stream struct */ - kfree(stream->pipes); - stream->pipes = NULL; - stream->num_pipes = 0; -#ifndef ISP2401 - /* working mode: take out of the seed list */ - if (my_css_save.mode == sh_css_mode_working) - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (my_css_save.stream_seeds[i].stream == stream) - { - IA_CSS_LOG("took out stream %d", i); - my_css_save.stream_seeds[i].stream = NULL; - break; - } -#else - err2 = ia_css_save_restore_remove_stream(stream); - - err1 = (err != IA_CSS_SUCCESS) ? err : err2; -#endif - kfree(stream); -#ifndef ISP2401 - IA_CSS_LEAVE_ERR(err); -#else - IA_CSS_LEAVE_ERR(err1); -#endif + } + /* free associated memory of stream struct */ + kfree(stream->pipes); + stream->pipes = NULL; + stream->num_pipes = 0; -#ifndef ISP2401 - return err; -#else - return err1; -#endif + /* working mode: take out of the seed list */ + if (my_css_save.mode == sh_css_mode_working) { + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) { + if (my_css_save.stream_seeds[i].stream == stream) + { + IA_CSS_LOG("took out stream %d", i); + my_css_save.stream_seeds[i].stream = NULL; + break; + } + } } - enum ia_css_err - ia_css_stream_get_info(const struct ia_css_stream *stream, - struct ia_css_stream_info *stream_info) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_info: enter/exit\n"); - assert(stream); - assert(stream_info); + kfree(stream); + IA_CSS_LEAVE_ERR(err); - *stream_info = stream->info; - return IA_CSS_SUCCESS; - } + return err; +} - /* - * Rebuild a stream, including allocating structs, setting configuration and - * building the required pipes. - * The data is taken from the css_save struct updated upon stream creation. - * The stream handle is used to identify the correct entry in the css_save struct - */ - enum ia_css_err - ia_css_stream_load(struct ia_css_stream *stream) { -#ifndef ISP2401 +enum ia_css_err +ia_css_stream_get_info(const struct ia_css_stream *stream, + struct ia_css_stream_info *stream_info) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_get_info: enter/exit\n"); + assert(stream); + assert(stream_info); + + *stream_info = stream->info; + return IA_CSS_SUCCESS; +} + +/* + * Rebuild a stream, including allocating structs, setting configuration and + * building the required pipes. + * The data is taken from the css_save struct updated upon stream creation. + * The stream handle is used to identify the correct entry in the css_save struct + */ +enum ia_css_err +ia_css_stream_load(struct ia_css_stream *stream) { + + if (!atomisp_hw_is_isp2401) { int i; enum ia_css_err err; @@ -10195,7 +10070,7 @@ static enum ia_css_err load_primary_binaries( for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) { if ((err = ia_css_pipe_create(&my_css_save.stream_seeds[i].pipe_config[j], - &my_css_save.stream_seeds[i].pipes[j])) != IA_CSS_SUCCESS) { + &my_css_save.stream_seeds[i].pipes[j])) != IA_CSS_SUCCESS) { if (j) { int k; @@ -10206,9 +10081,9 @@ static enum ia_css_err load_primary_binaries( } } err = ia_css_stream_create(&my_css_save.stream_seeds[i].stream_config, - my_css_save.stream_seeds[i].num_pipes, - my_css_save.stream_seeds[i].pipes, - &my_css_save.stream_seeds[i].stream); + my_css_save.stream_seeds[i].num_pipes, + my_css_save.stream_seeds[i].pipes, + &my_css_save.stream_seeds[i].stream); if (err != IA_CSS_SUCCESS) { ia_css_stream_destroy(stream); for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) @@ -10220,1101 +10095,1101 @@ static enum ia_css_err load_primary_binaries( } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_load() exit,\n"); return IA_CSS_SUCCESS; -#else + } else { /* TODO remove function - DEPRECATED */ (void)stream; return IA_CSS_ERR_NOT_SUPPORTED; -#endif } +} - enum ia_css_err - ia_css_stream_start(struct ia_css_stream *stream) { - enum ia_css_err err = IA_CSS_SUCCESS; +enum ia_css_err +ia_css_stream_start(struct ia_css_stream *stream) { + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER("stream = %p", stream); - if ((!stream) || (!stream->last_pipe)) - { - IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - IA_CSS_LOG("starting %d", stream->last_pipe->mode); + IA_CSS_ENTER("stream = %p", stream); + if ((!stream) || (!stream->last_pipe)) + { + IA_CSS_LEAVE_ERR(IA_CSS_ERR_INVALID_ARGUMENTS); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } + IA_CSS_LOG("starting %d", stream->last_pipe->mode); - sh_css_sp_set_disable_continuous_viewfinder(stream->disable_cont_vf); + sh_css_sp_set_disable_continuous_viewfinder(stream->disable_cont_vf); - /* Create host side pipeline. */ - err = create_host_pipeline(stream); - if (err != IA_CSS_SUCCESS) - { - IA_CSS_LEAVE_ERR(err); - return err; - } + /* Create host side pipeline. */ + err = create_host_pipeline(stream); + if (err != IA_CSS_SUCCESS) + { + IA_CSS_LEAVE_ERR(err); + return err; + } #if !defined(HAS_NO_INPUT_SYSTEM) #if defined(USE_INPUT_SYSTEM_VERSION_2401) - if ((stream->config.mode == IA_CSS_INPUT_MODE_SENSOR) || - (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) - stream_register_with_csi_rx(stream); + if ((stream->config.mode == IA_CSS_INPUT_MODE_SENSOR) || + (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR)) + stream_register_with_csi_rx(stream); #endif #endif #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - /* Initialize mipi size checks */ - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - { - unsigned int idx; - unsigned int port = (unsigned int)(stream->config.source.port.port); + /* Initialize mipi size checks */ + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { + unsigned int idx; + unsigned int port = (unsigned int)(stream->config.source.port.port); - for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { - sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = - sh_css_get_mipi_sizes_for_check(port, idx); - } + for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { + sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = + sh_css_get_mipi_sizes_for_check(port, idx); } + } #endif #if !defined(HAS_NO_INPUT_SYSTEM) - if (stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) - { - err = sh_css_config_input_network(stream); - if (err != IA_CSS_SUCCESS) - return err; - } + if (stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) + { + err = sh_css_config_input_network(stream); + if (err != IA_CSS_SUCCESS) + return err; + } #endif /* !HAS_NO_INPUT_SYSTEM */ - err = sh_css_pipe_start(stream); - IA_CSS_LEAVE_ERR(err); - return err; - } + err = sh_css_pipe_start(stream); + IA_CSS_LEAVE_ERR(err); + return err; +} - enum ia_css_err - ia_css_stream_stop(struct ia_css_stream *stream) { - enum ia_css_err err = IA_CSS_SUCCESS; +enum ia_css_err +ia_css_stream_stop(struct ia_css_stream *stream) { + enum ia_css_err err = IA_CSS_SUCCESS; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop() enter/exit\n"); - assert(stream); - assert(stream->last_pipe); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop: stopping %d\n", - stream->last_pipe->mode); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop() enter/exit\n"); + assert(stream); + assert(stream->last_pipe); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_stop: stopping %d\n", + stream->last_pipe->mode); #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) - /* De-initialize mipi size checks */ - if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - { - unsigned int idx; - unsigned int port = (unsigned int)(stream->config.source.port.port); + /* De-initialize mipi size checks */ + if (stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + { + unsigned int idx; + unsigned int port = (unsigned int)(stream->config.source.port.port); - for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { - sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = 0; - } + for (idx = 0; idx < IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT; idx++) { + sh_css_sp_group.config.mipi_sizes_for_check[port][idx] = 0; } + } #endif -#ifndef ISP2401 - err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); -#else + if (!atomisp_hw_is_isp2401) { + err = ia_css_pipeline_request_stop(&stream->last_pipe->pipeline); + } else { err = sh_css_pipes_stop(stream); -#endif - if (err != IA_CSS_SUCCESS) - return err; - - /* Ideally, unmapping should happen after pipeline_stop, but current - * semantics do not allow that. */ - /* err = map_sp_threads(stream, false); */ - - return err; } - bool - ia_css_stream_has_stopped(struct ia_css_stream *stream) { - bool stopped; - - assert(stream); + if (err != IA_CSS_SUCCESS) + return err; -#ifndef ISP2401 - stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); -#else - stopped = sh_css_pipes_have_stopped(stream); -#endif + /* Ideally, unmapping should happen after pipeline_stop, but current + * semantics do not allow that. */ + /* err = map_sp_threads(stream, false); */ - return stopped; - } + return err; +} -#ifndef ISP2401 - /* - * Destroy the stream and all the pipes related to it. - * The stream handle is used to identify the correct entry in the css_save struct - */ - enum ia_css_err - ia_css_stream_unload(struct ia_css_stream *stream) { - int i; +bool +ia_css_stream_has_stopped(struct ia_css_stream *stream) { + bool stopped; - assert(stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() enter,\n"); - /* some checks */ - assert(stream); - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (my_css_save.stream_seeds[i].stream == stream) - { - int j; + assert(stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_unload(): unloading %d (%p)\n", i, - my_css_save.stream_seeds[i].stream); - ia_css_stream_destroy(stream); - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) - ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_stream_unload(): after unloading %d (%p)\n", i, - my_css_save.stream_seeds[i].stream); - break; - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() exit,\n"); - return IA_CSS_SUCCESS; + if (!atomisp_hw_is_isp2401) { + stopped = ia_css_pipeline_has_stopped(&stream->last_pipe->pipeline); + } else { + stopped = sh_css_pipes_have_stopped(stream); } -#endif - enum ia_css_err - ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe, - enum ia_css_pipe_id *pipe_id) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_temp_pipe_to_pipe_id() enter/exit\n"); - if (pipe) - *pipe_id = pipe->mode; - else - *pipe_id = IA_CSS_PIPE_ID_COPY; + return stopped; +} - return IA_CSS_SUCCESS; - } +/* ISP2400 */ +/* + * Destroy the stream and all the pipes related to it. + * The stream handle is used to identify the correct entry in the css_save struct + */ +enum ia_css_err +ia_css_stream_unload(struct ia_css_stream *stream) { + int i; - enum atomisp_input_format - ia_css_stream_get_format(const struct ia_css_stream *stream) { - return stream->config.input_config.format; - } + assert(stream); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() enter,\n"); + /* some checks */ + assert(stream); + for (i = 0; i < MAX_ACTIVE_STREAMS; i++) + if (my_css_save.stream_seeds[i].stream == stream) + { + int j; - bool - ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream) { - return (stream->config.pixels_per_clock == 2); - } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_unload(): unloading %d (%p)\n", i, + my_css_save.stream_seeds[i].stream); + ia_css_stream_destroy(stream); + for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) + ia_css_pipe_destroy(my_css_save.stream_seeds[i].pipes[j]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_stream_unload(): after unloading %d (%p)\n", i, + my_css_save.stream_seeds[i].stream); + break; + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_unload() exit,\n"); + return IA_CSS_SUCCESS; +} - struct ia_css_binary * - ia_css_stream_get_shading_correction_binary(const struct ia_css_stream - *stream) { - struct ia_css_pipe *pipe; +enum ia_css_err +ia_css_temp_pipe_to_pipe_id(const struct ia_css_pipe *pipe, + enum ia_css_pipe_id *pipe_id) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_temp_pipe_to_pipe_id() enter/exit\n"); + if (pipe) + *pipe_id = pipe->mode; + else + *pipe_id = IA_CSS_PIPE_ID_COPY; - assert(stream); + return IA_CSS_SUCCESS; +} - pipe = stream->pipes[0]; +enum atomisp_input_format +ia_css_stream_get_format(const struct ia_css_stream *stream) { + return stream->config.input_config.format; +} - if (stream->num_pipes == 2) { - assert(stream->pipes[1]); - if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || - stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) - pipe = stream->pipes[1]; - } +bool +ia_css_stream_get_two_pixels_per_clock(const struct ia_css_stream *stream) { + return (stream->config.pixels_per_clock == 2); +} - return ia_css_pipe_get_shading_correction_binary(pipe); - } +struct ia_css_binary * +ia_css_stream_get_shading_correction_binary(const struct ia_css_stream + *stream) { + struct ia_css_pipe *pipe; - struct ia_css_binary * - ia_css_stream_get_dvs_binary(const struct ia_css_stream *stream) { - int i; - struct ia_css_pipe *video_pipe = NULL; + assert(stream); - /* First we find the video pipe */ - for (i = 0; i < stream->num_pipes; i++) { - struct ia_css_pipe *pipe = stream->pipes[i]; + pipe = stream->pipes[0]; - if (pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { - video_pipe = pipe; - break; - } - } - if (video_pipe) - return &video_pipe->pipe_settings.video.video_binary; - return NULL; + if (stream->num_pipes == 2) { + assert(stream->pipes[1]); + if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || + stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + pipe = stream->pipes[1]; } - struct ia_css_binary * - ia_css_stream_get_3a_binary(const struct ia_css_stream *stream) { - struct ia_css_pipe *pipe; - struct ia_css_binary *s3a_binary = NULL; + return ia_css_pipe_get_shading_correction_binary(pipe); +} - assert(stream); +struct ia_css_binary * +ia_css_stream_get_dvs_binary(const struct ia_css_stream *stream) { + int i; + struct ia_css_pipe *video_pipe = NULL; - pipe = stream->pipes[0]; + /* First we find the video pipe */ + for (i = 0; i < stream->num_pipes; i++) { + struct ia_css_pipe *pipe = stream->pipes[i]; - if (stream->num_pipes == 2) { - assert(stream->pipes[1]); - if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || - stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) - pipe = stream->pipes[1]; + if (pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) { + video_pipe = pipe; + break; } + } + if (video_pipe) + return &video_pipe->pipe_settings.video.video_binary; + return NULL; +} + +struct ia_css_binary * +ia_css_stream_get_3a_binary(const struct ia_css_stream *stream) { + struct ia_css_pipe *pipe; + struct ia_css_binary *s3a_binary = NULL; - s3a_binary = ia_css_pipe_get_s3a_binary(pipe); + assert(stream); + + pipe = stream->pipes[0]; - return s3a_binary; + if (stream->num_pipes == 2) { + assert(stream->pipes[1]); + if (stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_VIDEO || + stream->pipes[1]->config.mode == IA_CSS_PIPE_MODE_PREVIEW) + pipe = stream->pipes[1]; } - enum ia_css_err - ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, - unsigned int output_padded_width) { - struct ia_css_pipe *pipe; + s3a_binary = ia_css_pipe_get_s3a_binary(pipe); - assert(stream); + return s3a_binary; +} - pipe = stream->last_pipe; +enum ia_css_err +ia_css_stream_set_output_padded_width(struct ia_css_stream *stream, + unsigned int output_padded_width) { + struct ia_css_pipe *pipe; - assert(pipe); + assert(stream); - /* set the config also just in case (redundant info? why do we save config in pipe?) */ - pipe->config.output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; - pipe->output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; + pipe = stream->last_pipe; - return IA_CSS_SUCCESS; - } + assert(pipe); - static struct ia_css_binary * - ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe) { - struct ia_css_binary *binary = NULL; + /* set the config also just in case (redundant info? why do we save config in pipe?) */ + pipe->config.output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; + pipe->output_info[IA_CSS_PIPE_OUTPUT_STAGE_0].padded_width = output_padded_width; - assert(pipe); + return IA_CSS_SUCCESS; +} - switch (pipe->config.mode) { - case IA_CSS_PIPE_MODE_PREVIEW: - binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; - break; - case IA_CSS_PIPE_MODE_VIDEO: - binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; - break; - case IA_CSS_PIPE_MODE_CAPTURE: - if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { - unsigned int i; - - for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { - if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.sc) { - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; - break; - } +static struct ia_css_binary * +ia_css_pipe_get_shading_correction_binary(const struct ia_css_pipe *pipe) { + struct ia_css_binary *binary = NULL; + + assert(pipe); + + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; + break; + case IA_CSS_PIPE_MODE_VIDEO: + binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + unsigned int i; + + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.sc) { + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; + break; } - } else if (pipe->config.default_capture_config.mode == - IA_CSS_CAPTURE_MODE_BAYER) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; - else if (pipe->config.default_capture_config.mode == - IA_CSS_CAPTURE_MODE_ADVANCED || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { - if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; - else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; } - break; - default: - break; + } else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_BAYER) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { + if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; } + break; + default: + break; + } - if (binary && binary->info->sp.enable.sc) - return binary; + if (binary && binary->info->sp.enable.sc) + return binary; - return NULL; - } + return NULL; +} - static struct ia_css_binary * - ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) { - struct ia_css_binary *binary = NULL; +static struct ia_css_binary * +ia_css_pipe_get_s3a_binary(const struct ia_css_pipe *pipe) { + struct ia_css_binary *binary = NULL; - assert(pipe); + assert(pipe); - switch (pipe->config.mode) { - case IA_CSS_PIPE_MODE_PREVIEW: - binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; - break; - case IA_CSS_PIPE_MODE_VIDEO: - binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; - break; - case IA_CSS_PIPE_MODE_CAPTURE: - if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { - unsigned int i; - - for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { - if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; - break; - } + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_PREVIEW: + binary = (struct ia_css_binary *)&pipe->pipe_settings.preview.preview_binary; + break; + case IA_CSS_PIPE_MODE_VIDEO: + binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + unsigned int i; + + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.primary_binary[i]; + break; } - } else if (pipe->config.default_capture_config.mode == - IA_CSS_CAPTURE_MODE_BAYER) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; - else if (pipe->config.default_capture_config.mode == - IA_CSS_CAPTURE_MODE_ADVANCED || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { - if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; - else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) - binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; - else - assert(0); } - break; - default: - break; + } else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_BAYER) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT) { + if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.pre_isp_binary; + else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) + binary = (struct ia_css_binary *)&pipe->pipe_settings.capture.post_isp_binary; + else + assert(0); } - - if (binary && !binary->info->sp.enable.s3a) - binary = NULL; - - return binary; + break; + default: + break; } - static struct ia_css_binary * - ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe) { - struct ia_css_binary *binary = NULL; + if (binary && !binary->info->sp.enable.s3a) + binary = NULL; - assert(pipe); + return binary; +} - switch (pipe->config.mode) { - case IA_CSS_PIPE_MODE_VIDEO: - binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; - break; - default: - break; - } +static struct ia_css_binary * +ia_css_pipe_get_sdis_binary(const struct ia_css_pipe *pipe) { + struct ia_css_binary *binary = NULL; - if (binary && !binary->info->sp.enable.dis) - binary = NULL; + assert(pipe); - return binary; + switch (pipe->config.mode) { + case IA_CSS_PIPE_MODE_VIDEO: + binary = (struct ia_css_binary *)&pipe->pipe_settings.video.video_binary; + break; + default: + break; } - struct ia_css_pipeline * - ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe) { - assert(pipe); + if (binary && !binary->info->sp.enable.dis) + binary = NULL; - return (struct ia_css_pipeline *)&pipe->pipeline; - } + return binary; +} - unsigned int - ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) { - assert(pipe); +struct ia_css_pipeline * +ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe) { + assert(pipe); - /* KW was not sure this function was not returning a value - that was out of range; so added an assert, and, for the - case when asserts are not enabled, clip to the largest - value; pipe_num is unsigned so the value cannot be too small - */ - assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX); + return (struct ia_css_pipeline *)&pipe->pipeline; +} - if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX) - return (IA_CSS_PIPELINE_NUM_MAX - 1); +unsigned int +ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe) { + assert(pipe); - return pipe->pipe_num; - } + /* KW was not sure this function was not returning a value + that was out of range; so added an assert, and, for the + case when asserts are not enabled, clip to the largest + value; pipe_num is unsigned so the value cannot be too small + */ + assert(pipe->pipe_num < IA_CSS_PIPELINE_NUM_MAX); - unsigned int - ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe) { - assert(pipe); + if (pipe->pipe_num >= IA_CSS_PIPELINE_NUM_MAX) + return (IA_CSS_PIPELINE_NUM_MAX - 1); - return (unsigned int)pipe->config.isp_pipe_version; - } + return pipe->pipe_num; +} + +unsigned int +ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe) { + assert(pipe); + + return (unsigned int)pipe->config.isp_pipe_version; +} #define SP_START_TIMEOUT_US 30000000 - enum ia_css_err - ia_css_start_sp(void) { - unsigned long timeout; - enum ia_css_err err = IA_CSS_SUCCESS; +enum ia_css_err +ia_css_start_sp(void) { + unsigned long timeout; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER(""); - sh_css_sp_start_isp(); + IA_CSS_ENTER(""); + sh_css_sp_start_isp(); - /* waiting for the SP is completely started */ - timeout = SP_START_TIMEOUT_US; - while ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout) - { - timeout--; - hrt_sleep(); - } - if (timeout == 0) - { - IA_CSS_ERROR("timeout during SP initialization"); - return IA_CSS_ERR_INTERNAL_ERROR; - } + /* waiting for the SP is completely started */ + timeout = SP_START_TIMEOUT_US; + while ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_INITIALIZED) && timeout) + { + timeout--; + hrt_sleep(); + } + if (timeout == 0) + { + IA_CSS_ERROR("timeout during SP initialization"); + return IA_CSS_ERR_INTERNAL_ERROR; + } - /* Workaround, in order to run two streams in parallel. See TASK 4271*/ - /* TODO: Fix this. */ + /* Workaround, in order to run two streams in parallel. See TASK 4271*/ + /* TODO: Fix this. */ - sh_css_init_host_sp_control_vars(); + sh_css_init_host_sp_control_vars(); - /* buffers should be initialized only when sp is started */ - /* AM: At the moment it will be done only when there is no stream active. */ + /* buffers should be initialized only when sp is started */ + /* AM: At the moment it will be done only when there is no stream active. */ - sh_css_setup_queues(); - ia_css_bufq_dump_queue_info(); + sh_css_setup_queues(); + ia_css_bufq_dump_queue_info(); - IA_CSS_LEAVE_ERR(err); - return err; - } + IA_CSS_LEAVE_ERR(err); + return err; +} - /* - * Time to wait SP for termincate. Only condition when this can happen - * is a fatal hw failure, but we must be able to detect this and emit - * a proper error trace. - */ +/* + * Time to wait SP for termincate. Only condition when this can happen + * is a fatal hw failure, but we must be able to detect this and emit + * a proper error trace. + */ #define SP_SHUTDOWN_TIMEOUT_US 200000 - enum ia_css_err - ia_css_stop_sp(void) { - unsigned long timeout; - enum ia_css_err err = IA_CSS_SUCCESS; +enum ia_css_err +ia_css_stop_sp(void) { + unsigned long timeout; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER("void"); + IA_CSS_ENTER("void"); - if (!sh_css_sp_is_running()) - { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE("SP already stopped : return_err=%d", err); + if (!sh_css_sp_is_running()) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE("SP already stopped : return_err=%d", err); - /* Return an error - stop SP should not have been called by driver */ - return err; - } + /* Return an error - stop SP should not have been called by driver */ + return err; + } - /* For now, stop whole SP */ -#ifndef ISP2401 + /* For now, stop whole SP */ + if (!atomisp_hw_is_isp2401) { sh_css_write_host2sp_command(host2sp_cmd_terminate); -#else + } else { if (!sh_css_write_host2sp_command(host2sp_cmd_terminate)) { IA_CSS_ERROR("Call to 'sh-css_write_host2sp_command()' failed"); ia_css_debug_dump_sp_sw_debug_info(); ia_css_debug_dump_debug_info(NULL); } -#endif - sh_css_sp_set_sp_running(false); - - timeout = SP_SHUTDOWN_TIMEOUT_US; - while (!ia_css_spctrl_is_idle(SP0_ID) && timeout) - { - timeout--; - hrt_sleep(); - } - if ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_TERMINATED)) - IA_CSS_WARNING("SP has not terminated (SW)"); - - if (timeout == 0) - { - IA_CSS_WARNING("SP is not idle"); - ia_css_debug_dump_sp_sw_debug_info(); - } - timeout = SP_SHUTDOWN_TIMEOUT_US; - while (!isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT) && timeout) - { - timeout--; - hrt_sleep(); - } - if (timeout == 0) - { - IA_CSS_WARNING("ISP is not idle"); - ia_css_debug_dump_sp_sw_debug_info(); - } + } - sh_css_hmm_buffer_record_uninit(); + sh_css_sp_set_sp_running(false); - /* clear pending param sets from refcount */ - sh_css_param_clear_param_sets(); + timeout = SP_SHUTDOWN_TIMEOUT_US; + while (!ia_css_spctrl_is_idle(SP0_ID) && timeout) + { + timeout--; + hrt_sleep(); + } + if ((ia_css_spctrl_get_state(SP0_ID) != IA_CSS_SP_SW_TERMINATED)) + IA_CSS_WARNING("SP has not terminated (SW)"); - IA_CSS_LEAVE_ERR(err); - return err; + if (timeout == 0) + { + IA_CSS_WARNING("SP is not idle"); + ia_css_debug_dump_sp_sw_debug_info(); + } + timeout = SP_SHUTDOWN_TIMEOUT_US; + while (!isp_ctrl_getbit(ISP0_ID, ISP_SC_REG, ISP_IDLE_BIT) && timeout) + { + timeout--; + hrt_sleep(); + } + if (timeout == 0) + { + IA_CSS_WARNING("ISP is not idle"); + ia_css_debug_dump_sp_sw_debug_info(); } - enum ia_css_err - ia_css_update_continuous_frames(struct ia_css_stream *stream) { - struct ia_css_pipe *pipe; - unsigned int i; + sh_css_hmm_buffer_record_uninit(); - ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, - "sh_css_update_continuous_frames() enter:\n"); + /* clear pending param sets from refcount */ + sh_css_param_clear_param_sets(); - if (!stream) - { - ia_css_debug_dtrace( - IA_CSS_DEBUG_TRACE, - "sh_css_update_continuous_frames() leave: invalid stream, return_void\n"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + IA_CSS_LEAVE_ERR(err); + return err; +} - pipe = stream->continuous_pipe; +enum ia_css_err +ia_css_update_continuous_frames(struct ia_css_stream *stream) { + struct ia_css_pipe *pipe; + unsigned int i; - for (i = stream->config.init_num_cont_raw_buf; - i < stream->config.target_num_cont_raw_buf; i++) - { - sh_css_update_host2sp_offline_frame(i, - pipe->continuous_frames[i], pipe->cont_md_buffers[i]); - } - sh_css_update_host2sp_cont_num_raw_frames - (stream->config.target_num_cont_raw_buf, true); + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() enter:\n"); + + if (!stream) + { ia_css_debug_dtrace( IA_CSS_DEBUG_TRACE, - "sh_css_update_continuous_frames() leave: return_void\n"); + "sh_css_update_continuous_frames() leave: invalid stream, return_void\n"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - return IA_CSS_SUCCESS; + pipe = stream->continuous_pipe; + + for (i = stream->config.init_num_cont_raw_buf; + i < stream->config.target_num_cont_raw_buf; i++) + { + sh_css_update_host2sp_offline_frame(i, + pipe->continuous_frames[i], pipe->cont_md_buffers[i]); } + sh_css_update_host2sp_cont_num_raw_frames + (stream->config.target_num_cont_raw_buf, true); + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, + "sh_css_update_continuous_frames() leave: return_void\n"); - void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) { - unsigned int thread_id; - enum ia_css_pipe_id pipe_id; - unsigned int pipe_num; - bool need_input_queue; + return IA_CSS_SUCCESS; +} - IA_CSS_ENTER(""); - assert(pipe); +void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) { + unsigned int thread_id; + enum ia_css_pipe_id pipe_id; + unsigned int pipe_num; + bool need_input_queue; - pipe_id = pipe->mode; - pipe_num = pipe->pipe_num; + IA_CSS_ENTER(""); + assert(pipe); + + pipe_id = pipe->mode; + pipe_num = pipe->pipe_num; - ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); + ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id); #if defined(HAS_NO_INPUT_SYSTEM) || defined(USE_INPUT_SYSTEM_VERSION_2401) - need_input_queue = true; + need_input_queue = true; #else - need_input_queue = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; + need_input_queue = pipe->stream->config.mode == IA_CSS_INPUT_MODE_MEMORY; #endif - /* map required buffer queues to resources */ - /* TODO: to be improved */ - if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); + /* map required buffer queues to resources */ + /* TODO: to be improved */ + if (pipe->mode == IA_CSS_PIPE_ID_PREVIEW) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); #endif - if (pipe->pipe_settings.preview.preview_binary.info && - pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); - } else if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE) { - unsigned int i; + if (pipe->pipe_settings.preview.preview_binary.info && + pipe->pipe_settings.preview.preview_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + } else if (pipe->mode == IA_CSS_PIPE_ID_CAPTURE) { + unsigned int i; - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif - if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { - for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { - if (pipe->pipe_settings.capture.primary_binary[i].info && - pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); - break; - } - } - } else if (pipe->config.default_capture_config.mode == - IA_CSS_CAPTURE_MODE_ADVANCED || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT || - pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) { - if (pipe->pipe_settings.capture.pre_isp_binary.info && - pipe->pipe_settings.capture.pre_isp_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + if (pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_PRIMARY) { + for (i = 0; i < pipe->pipe_settings.capture.num_primary_stage; i++) { + if (pipe->pipe_settings.capture.primary_binary[i].info && + pipe->pipe_settings.capture.primary_binary[i].info->sp.enable.s3a) { ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + break; + } } - } else if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); -#if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif - if (pipe->pipe_settings.video.video_binary.info && - pipe->pipe_settings.video.video_binary.info->sp.enable.s3a) + } else if (pipe->config.default_capture_config.mode == + IA_CSS_CAPTURE_MODE_ADVANCED || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_LOW_LIGHT || + pipe->config.default_capture_config.mode == IA_CSS_CAPTURE_MODE_BAYER) { + if (pipe->pipe_settings.capture.pre_isp_binary.info && + pipe->pipe_settings.capture.pre_isp_binary.info->sp.enable.s3a) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); - if (pipe->pipe_settings.video.video_binary.info && - (pipe->pipe_settings.video.video_binary.info->sp.enable.dis - )) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_DIS_STATISTICS, map); - } else if (pipe->mode == IA_CSS_PIPE_ID_COPY) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - if (!pipe->stream->config.continuous) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + } + } else if (pipe->mode == IA_CSS_PIPE_ID_VIDEO) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + if (pipe->enable_viewfinder[IA_CSS_PIPE_OUTPUT_STAGE_0]) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); -#endif - } else if (pipe->mode == IA_CSS_PIPE_ID_ACC) { - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + if (pipe->pipe_settings.video.video_binary.info && + pipe->pipe_settings.video.video_binary.info->sp.enable.s3a) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_3A_STATISTICS, map); + if (pipe->pipe_settings.video.video_binary.info && + (pipe->pipe_settings.video.video_binary.info->sp.enable.dis + )) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_DIS_STATISTICS, map); + } else if (pipe->mode == IA_CSS_PIPE_ID_COPY) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + if (!pipe->stream->config.continuous) ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); +#endif + } else if (pipe->mode == IA_CSS_PIPE_ID_ACC) { + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PER_FRAME_PARAMETER_SET, map); +#if defined SH_CSS_ENABLE_METADATA + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); #endif - } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { - unsigned int idx; + } else if (pipe->mode == IA_CSS_PIPE_ID_YUVPP) { + unsigned int idx; - for (idx = 0; idx < IA_CSS_PIPE_MAX_OUTPUT_STAGE; idx++) { - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx, map); - if (pipe->enable_viewfinder[idx]) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME + idx, map); - } - if (need_input_queue) - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); + for (idx = 0; idx < IA_CSS_PIPE_MAX_OUTPUT_STAGE; idx++) { + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_OUTPUT_FRAME + idx, map); + if (pipe->enable_viewfinder[idx]) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_VF_OUTPUT_FRAME + idx, map); + } + if (need_input_queue) + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_INPUT_FRAME, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_PARAMETER_SET, map); #if defined SH_CSS_ENABLE_METADATA - ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); + ia_css_queue_map(thread_id, IA_CSS_BUFFER_TYPE_METADATA, map); #endif - } - IA_CSS_LEAVE(""); } + IA_CSS_LEAVE(""); +} #if CONFIG_ON_FRAME_ENQUEUE() - static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info - *info, struct frame_data_wrapper *frame) { - frame->config_on_frame_enqueue.padded_width = 0; - - /* currently we support configuration on frame enqueue only on YUV formats */ - /* on other formats the padded_width is zeroed for no configuration override */ - switch (info->format) { - case IA_CSS_FRAME_FORMAT_YUV420: - case IA_CSS_FRAME_FORMAT_NV12: - if (info->padded_width > info->res.width) { - frame->config_on_frame_enqueue.padded_width = info->padded_width; - } else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) { - return IA_CSS_ERR_INVALID_ARGUMENTS; - } - /* nothing to do if width == padded width or padded width is zeroed (the same) */ - break; - default: - break; +static enum ia_css_err set_config_on_frame_enqueue(struct ia_css_frame_info + *info, struct frame_data_wrapper *frame) { + frame->config_on_frame_enqueue.padded_width = 0; + + /* currently we support configuration on frame enqueue only on YUV formats */ + /* on other formats the padded_width is zeroed for no configuration override */ + switch (info->format) { + case IA_CSS_FRAME_FORMAT_YUV420: + case IA_CSS_FRAME_FORMAT_NV12: + if (info->padded_width > info->res.width) { + frame->config_on_frame_enqueue.padded_width = info->padded_width; + } else if ((info->padded_width < info->res.width) && (info->padded_width > 0)) { + return IA_CSS_ERR_INVALID_ARGUMENTS; } - - return IA_CSS_SUCCESS; + /* nothing to do if width == padded width or padded width is zeroed (the same) */ + break; + default: + break; } + + return IA_CSS_SUCCESS; +} #endif - enum ia_css_err - ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) { - enum ia_css_err ret; +enum ia_css_err +ia_css_unlock_raw_frame(struct ia_css_stream *stream, uint32_t exp_id) { + enum ia_css_err ret; - IA_CSS_ENTER(""); + IA_CSS_ENTER(""); - /* Only continuous streams have a tagger to which we can send the - * unlock message. */ - if (!stream || !stream->config.continuous) - { - IA_CSS_ERROR("invalid stream pointer"); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + /* Only continuous streams have a tagger to which we can send the + * unlock message. */ + if (!stream || !stream->config.continuous) + { + IA_CSS_ERROR("invalid stream pointer"); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - if (exp_id > IA_CSS_ISYS_MAX_EXPOSURE_ID || - exp_id < IA_CSS_ISYS_MIN_EXPOSURE_ID) - { - IA_CSS_ERROR("invalid expsure ID: %d\n", exp_id); - return IA_CSS_ERR_INVALID_ARGUMENTS; - } + if (exp_id > IA_CSS_ISYS_MAX_EXPOSURE_ID || + exp_id < IA_CSS_ISYS_MIN_EXPOSURE_ID) + { + IA_CSS_ERROR("invalid expsure ID: %d\n", exp_id); + return IA_CSS_ERR_INVALID_ARGUMENTS; + } - /* Send the event. Since we verified that the exp_id is valid, - * we can safely assign it to an 8-bit argument here. */ - ret = ia_css_bufq_enqueue_psys_event( - IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, exp_id, 0, 0); + /* Send the event. Since we verified that the exp_id is valid, + * we can safely assign it to an 8-bit argument here. */ + ret = ia_css_bufq_enqueue_psys_event( + IA_CSS_PSYS_SW_EVENT_UNLOCK_RAW_BUFFER, exp_id, 0, 0); - IA_CSS_LEAVE_ERR(ret); - return ret; - } + IA_CSS_LEAVE_ERR(ret); + return ret; +} - /* @brief Set the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ - enum ia_css_err - ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, - bool enable) { - unsigned int thread_id; - struct ia_css_pipeline_stage *stage; - enum ia_css_err err = IA_CSS_SUCCESS; +/* @brief Set the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ +enum ia_css_err +ia_css_pipe_set_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, + bool enable) { + unsigned int thread_id; + struct ia_css_pipeline_stage *stage; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER(""); + IA_CSS_ENTER(""); - /* Parameter Check */ - if (!pipe || !pipe->stream) - { - IA_CSS_ERROR("Invalid Pipe."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!(pipe->config.acc_extension)) - { - IA_CSS_ERROR("Invalid Pipe(No Extension Firmware)"); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!sh_css_sp_is_running()) - { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else - { - /* Query the threadid and stage_num for the Extension firmware*/ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); + /* Parameter Check */ + if (!pipe || !pipe->stream) + { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) + { + IA_CSS_ERROR("Invalid Pipe(No Extension Firmware)"); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) + { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else + { + /* Query the threadid and stage_num for the Extension firmware*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); + if (err == IA_CSS_SUCCESS) { + /* Set the Extension State;. TODO: Add check for stage firmware.type (QOS)*/ + err = ia_css_bufq_enqueue_psys_event( + (uint8_t)IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE, + (uint8_t)thread_id, + (uint8_t)stage->stage_num, + enable ? 1 : 0); if (err == IA_CSS_SUCCESS) { - /* Set the Extension State;. TODO: Add check for stage firmware.type (QOS)*/ - err = ia_css_bufq_enqueue_psys_event( - (uint8_t)IA_CSS_PSYS_SW_EVENT_STAGE_ENABLE_DISABLE, - (uint8_t)thread_id, - (uint8_t)stage->stage_num, - enable ? 1 : 0); - if (err == IA_CSS_SUCCESS) { - if (enable) - SH_CSS_QOS_STAGE_ENABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); - else - SH_CSS_QOS_STAGE_DISABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); - } + if (enable) + SH_CSS_QOS_STAGE_ENABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); + else + SH_CSS_QOS_STAGE_DISABLE(&sh_css_sp_group.pipe[thread_id], stage->stage_num); } } - IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, enable); - return err; } + IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, enable); + return err; +} - /* @brief Get the state (Enable or Disable) of the Extension stage in the - * given pipe. - */ - enum ia_css_err - ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, - bool *enable) { - struct ia_css_pipeline_stage *stage; - unsigned int thread_id; - enum ia_css_err err = IA_CSS_SUCCESS; +/* @brief Get the state (Enable or Disable) of the Extension stage in the + * given pipe. + */ +enum ia_css_err +ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle, + bool *enable) { + struct ia_css_pipeline_stage *stage; + unsigned int thread_id; + enum ia_css_err err = IA_CSS_SUCCESS; - IA_CSS_ENTER(""); + IA_CSS_ENTER(""); - /* Parameter Check */ - if (!pipe || !pipe->stream) - { - IA_CSS_ERROR("Invalid Pipe."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!(pipe->config.acc_extension)) - { - IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!sh_css_sp_is_running()) - { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else - { - /* Query the threadid and stage_num corresponding to the Extension firmware*/ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); + /* Parameter Check */ + if (!pipe || !pipe->stream) + { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) + { + IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) + { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else + { + /* Query the threadid and stage_num corresponding to the Extension firmware*/ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); - if (err == IA_CSS_SUCCESS) { - /* Get the Extension State */ - *enable = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], - stage->stage_num)) ? true : false; - } + if (err == IA_CSS_SUCCESS) { + /* Get the Extension State */ + *enable = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], + stage->stage_num)) ? true : false; } - IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, *enable); - return err; } + IA_CSS_LEAVE("err:%d handle:%u enable:%d", err, fw_handle, *enable); + return err; +} -#ifdef ISP2401 - enum ia_css_err - ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, - uint32_t fw_handle, - struct ia_css_isp_param_css_segments *css_seg, - struct ia_css_isp_param_isp_segments *isp_seg) { - unsigned int HIVE_ADDR_sp_group; - static struct sh_css_sp_group sp_group; - static struct sh_css_sp_stage sp_stage; - static struct sh_css_isp_stage isp_stage; - const struct ia_css_fw_info *fw; - unsigned int thread_id; - struct ia_css_pipeline_stage *stage; - enum ia_css_err err = IA_CSS_SUCCESS; - int stage_num = 0; - enum ia_css_isp_memories mem; - bool enabled; - - IA_CSS_ENTER(""); +/* ISP2401 */ +enum ia_css_err +ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, + uint32_t fw_handle, + struct ia_css_isp_param_css_segments *css_seg, + struct ia_css_isp_param_isp_segments *isp_seg) { + unsigned int HIVE_ADDR_sp_group; + static struct sh_css_sp_group sp_group; + static struct sh_css_sp_stage sp_stage; + static struct sh_css_isp_stage isp_stage; + const struct ia_css_fw_info *fw; + unsigned int thread_id; + struct ia_css_pipeline_stage *stage; + enum ia_css_err err = IA_CSS_SUCCESS; + int stage_num = 0; + enum ia_css_isp_memories mem; + bool enabled; - fw = &sh_css_sp_fw; + IA_CSS_ENTER(""); - /* Parameter Check */ - if (!pipe || !pipe->stream) - { - IA_CSS_ERROR("Invalid Pipe."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!(pipe->config.acc_extension)) - { - IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); - err = IA_CSS_ERR_INVALID_ARGUMENTS; - } else if (!sh_css_sp_is_running()) - { - IA_CSS_ERROR("Leaving: queue unavailable."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else - { - /* Query the thread_id and stage_num corresponding to the Extension firmware */ - ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); - err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); - if (err == IA_CSS_SUCCESS) { - /* Get the Extension State */ - enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], - stage->stage_num)) ? true : false; - /* Update mapped arg only when extension stage is not enabled */ - if (enabled) { - IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); - err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; - } else { - stage_num = stage->stage_num; - - HIVE_ADDR_sp_group = fw->info.sp.group; - sp_dmem_load(SP0_ID, - (unsigned int)sp_address_of(sp_group), - &sp_group, sizeof(struct sh_css_sp_group)); - mmgr_load(sp_group.pipe[thread_id].sp_stage_addr[stage_num], - &sp_stage, sizeof(struct sh_css_sp_stage)); - - mmgr_load(sp_stage.isp_stage_addr, - &isp_stage, sizeof(struct sh_css_isp_stage)); - - for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = - css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address - = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; - isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size - = - isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; - } + fw = &sh_css_sp_fw; - mmgr_store(sp_stage.isp_stage_addr, - &isp_stage, sizeof(struct sh_css_isp_stage)); + /* Parameter Check */ + if (!pipe || !pipe->stream) + { + IA_CSS_ERROR("Invalid Pipe."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!(pipe->config.acc_extension)) + { + IA_CSS_ERROR("Invalid Pipe (No Extension Firmware)."); + err = IA_CSS_ERR_INVALID_ARGUMENTS; + } else if (!sh_css_sp_is_running()) + { + IA_CSS_ERROR("Leaving: queue unavailable."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else + { + /* Query the thread_id and stage_num corresponding to the Extension firmware */ + ia_css_pipeline_get_sp_thread_id(ia_css_pipe_get_pipe_num(pipe), &thread_id); + err = ia_css_pipeline_get_stage_from_fw(&pipe->pipeline, fw_handle, &stage); + if (err == IA_CSS_SUCCESS) { + /* Get the Extension State */ + enabled = (SH_CSS_QOS_STAGE_IS_ENABLED(&sh_css_sp_group.pipe[thread_id], + stage->stage_num)) ? true : false; + /* Update mapped arg only when extension stage is not enabled */ + if (enabled) { + IA_CSS_ERROR("Leaving: cannot update when stage is enabled."); + err = IA_CSS_ERR_RESOURCE_NOT_AVAILABLE; + } else { + stage_num = stage->stage_num; + + HIVE_ADDR_sp_group = fw->info.sp.group; + sp_dmem_load(SP0_ID, + (unsigned int)sp_address_of(sp_group), + &sp_group, sizeof(struct sh_css_sp_group)); + mmgr_load(sp_group.pipe[thread_id].sp_stage_addr[stage_num], + &sp_stage, sizeof(struct sh_css_sp_stage)); + + mmgr_load(sp_stage.isp_stage_addr, + &isp_stage, sizeof(struct sh_css_isp_stage)); + + for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) { + isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address = + css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; + isp_stage.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size = + css_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; + isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].address + = + isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].address; + isp_stage.binary_info.mem_initializers.params[IA_CSS_PARAM_CLASS_PARAM][mem].size + = + isp_seg->params[IA_CSS_PARAM_CLASS_PARAM][mem].size; } + + mmgr_store(sp_stage.isp_stage_addr, + &isp_stage, sizeof(struct sh_css_isp_stage)); } } - IA_CSS_LEAVE("err:%d handle:%u", err, fw_handle); - return err; } + IA_CSS_LEAVE("err:%d handle:%u", err, fw_handle); + return err; +} #ifdef USE_INPUT_SYSTEM_VERSION_2401 - static enum ia_css_err - aspect_ratio_crop_init(struct ia_css_stream *curr_stream, - struct ia_css_pipe *pipes[], - bool *do_crop_status) { - enum ia_css_err err = IA_CSS_SUCCESS; - int i; - struct ia_css_pipe *curr_pipe; - u32 pipe_mask = 0; - - if ((!curr_stream) || - (curr_stream->num_pipes == 0) || - (!pipes) || - (!do_crop_status)) - { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } +static enum ia_css_err +aspect_ratio_crop_init(struct ia_css_stream *curr_stream, + struct ia_css_pipe *pipes[], + bool *do_crop_status) { + enum ia_css_err err = IA_CSS_SUCCESS; + int i; + struct ia_css_pipe *curr_pipe; + u32 pipe_mask = 0; - for (i = 0; i < curr_stream->num_pipes; i++) - { - curr_pipe = pipes[i]; - pipe_mask |= (1 << curr_pipe->config.mode); - } + if ((!curr_stream) || + (curr_stream->num_pipes == 0) || + (!pipes) || + (!do_crop_status)) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } - *do_crop_status = - (((pipe_mask & (1 << IA_CSS_PIPE_MODE_PREVIEW)) || - (pipe_mask & (1 << IA_CSS_PIPE_MODE_VIDEO))) && - (pipe_mask & (1 << IA_CSS_PIPE_MODE_CAPTURE)) && - curr_stream->config.continuous); - return IA_CSS_SUCCESS; + for (i = 0; i < curr_stream->num_pipes; i++) + { + curr_pipe = pipes[i]; + pipe_mask |= (1 << curr_pipe->config.mode); } - static bool - aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) { - bool status = false; + *do_crop_status = + (((pipe_mask & (1 << IA_CSS_PIPE_MODE_PREVIEW)) || + (pipe_mask & (1 << IA_CSS_PIPE_MODE_VIDEO))) && + (pipe_mask & (1 << IA_CSS_PIPE_MODE_CAPTURE)) && + curr_stream->config.continuous); + return IA_CSS_SUCCESS; +} - if ((curr_pipe) && enabled) { - if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || - (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) - status = true; - } +static bool +aspect_ratio_crop_check(bool enabled, struct ia_css_pipe *curr_pipe) { + bool status = false; - return status; + if ((curr_pipe) && enabled) { + if ((curr_pipe->config.mode == IA_CSS_PIPE_MODE_PREVIEW) || + (curr_pipe->config.mode == IA_CSS_PIPE_MODE_VIDEO) || + (curr_pipe->config.mode == IA_CSS_PIPE_MODE_CAPTURE)) + status = true; } - static enum ia_css_err - aspect_ratio_crop(struct ia_css_pipe *curr_pipe, - struct ia_css_resolution *effective_res) { - enum ia_css_err err = IA_CSS_SUCCESS; - struct ia_css_resolution crop_res; - struct ia_css_resolution *in_res = NULL; - struct ia_css_resolution *out_res = NULL; - bool use_bds_output_info = false; - bool use_vf_pp_in_res = false; - bool use_capt_pp_in_res = false; + return status; +} - if ((!curr_pipe) || - (!effective_res)) - { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } +static enum ia_css_err +aspect_ratio_crop(struct ia_css_pipe *curr_pipe, + struct ia_css_resolution *effective_res) { + enum ia_css_err err = IA_CSS_SUCCESS; + struct ia_css_resolution crop_res; + struct ia_css_resolution *in_res = NULL; + struct ia_css_resolution *out_res = NULL; + bool use_bds_output_info = false; + bool use_vf_pp_in_res = false; + bool use_capt_pp_in_res = false; - if ((curr_pipe->config.mode != IA_CSS_PIPE_MODE_PREVIEW) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_VIDEO) && - (curr_pipe->config.mode != IA_CSS_PIPE_MODE_CAPTURE)) - { - err = IA_CSS_ERR_INVALID_ARGUMENTS; - IA_CSS_LEAVE_ERR(err); - return err; - } + if ((!curr_pipe) || + (!effective_res)) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } - use_bds_output_info = - ((curr_pipe->bds_output_info.res.width != 0) && - (curr_pipe->bds_output_info.res.height != 0)); + if ((curr_pipe->config.mode != IA_CSS_PIPE_MODE_PREVIEW) && + (curr_pipe->config.mode != IA_CSS_PIPE_MODE_VIDEO) && + (curr_pipe->config.mode != IA_CSS_PIPE_MODE_CAPTURE)) + { + err = IA_CSS_ERR_INVALID_ARGUMENTS; + IA_CSS_LEAVE_ERR(err); + return err; + } - use_vf_pp_in_res = - ((curr_pipe->config.vf_pp_in_res.width != 0) && - (curr_pipe->config.vf_pp_in_res.height != 0)); + use_bds_output_info = + ((curr_pipe->bds_output_info.res.width != 0) && + (curr_pipe->bds_output_info.res.height != 0)); - use_capt_pp_in_res = - ((curr_pipe->config.capt_pp_in_res.width != 0) && - (curr_pipe->config.capt_pp_in_res.height != 0)); + use_vf_pp_in_res = + ((curr_pipe->config.vf_pp_in_res.width != 0) && + (curr_pipe->config.vf_pp_in_res.height != 0)); - in_res = &curr_pipe->stream->config.input_config.effective_res; - out_res = &curr_pipe->output_info[0].res; + use_capt_pp_in_res = + ((curr_pipe->config.capt_pp_in_res.width != 0) && + (curr_pipe->config.capt_pp_in_res.height != 0)); - switch (curr_pipe->config.mode) - { - case IA_CSS_PIPE_MODE_PREVIEW: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - else if (use_vf_pp_in_res) - out_res = &curr_pipe->config.vf_pp_in_res; - break; - case IA_CSS_PIPE_MODE_VIDEO: - if (use_bds_output_info) - out_res = &curr_pipe->bds_output_info.res; - break; - case IA_CSS_PIPE_MODE_CAPTURE: - if (use_capt_pp_in_res) - out_res = &curr_pipe->config.capt_pp_in_res; - break; - case IA_CSS_PIPE_MODE_ACC: - case IA_CSS_PIPE_MODE_COPY: - case IA_CSS_PIPE_MODE_YUVPP: - default: - IA_CSS_ERROR("aspect ratio cropping invalid args: mode[%d]\n", - curr_pipe->config.mode); - assert(0); - break; - } + in_res = &curr_pipe->stream->config.input_config.effective_res; + out_res = &curr_pipe->output_info[0].res; - err = ia_css_frame_find_crop_resolution(in_res, out_res, &crop_res); - if (err == IA_CSS_SUCCESS) - { - *effective_res = crop_res; - } else - { - /* in case of error fallback to default - * effective resolution from driver. */ - IA_CSS_LOG("ia_css_frame_find_crop_resolution() failed with err(%d)", err); - } - return err; + switch (curr_pipe->config.mode) + { + case IA_CSS_PIPE_MODE_PREVIEW: + if (use_bds_output_info) + out_res = &curr_pipe->bds_output_info.res; + else if (use_vf_pp_in_res) + out_res = &curr_pipe->config.vf_pp_in_res; + break; + case IA_CSS_PIPE_MODE_VIDEO: + if (use_bds_output_info) + out_res = &curr_pipe->bds_output_info.res; + break; + case IA_CSS_PIPE_MODE_CAPTURE: + if (use_capt_pp_in_res) + out_res = &curr_pipe->config.capt_pp_in_res; + break; + case IA_CSS_PIPE_MODE_ACC: + case IA_CSS_PIPE_MODE_COPY: + case IA_CSS_PIPE_MODE_YUVPP: + default: + IA_CSS_ERROR("aspect ratio cropping invalid args: mode[%d]\n", + curr_pipe->config.mode); + assert(0); + break; } -#endif + err = ia_css_frame_find_crop_resolution(in_res, out_res, &crop_res); + if (err == IA_CSS_SUCCESS) + { + *effective_res = crop_res; + } else + { + /* in case of error fallback to default + * effective resolution from driver. */ + IA_CSS_LOG("ia_css_frame_find_crop_resolution() failed with err(%d)", err); + } + return err; +} #endif - static void - sh_css_hmm_buffer_record_init(void) { - int i; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) - sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); - } +static void +sh_css_hmm_buffer_record_init(void) { + int i; - static void - sh_css_hmm_buffer_record_uninit(void) { - int i; - struct sh_css_hmm_buffer_record *buffer_record = NULL; - - buffer_record = &hmm_buffer_record[0]; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - if (buffer_record->in_use) { - if (buffer_record->h_vbuf) - ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); - sh_css_hmm_buffer_record_reset(buffer_record); - } - buffer_record++; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) + sh_css_hmm_buffer_record_reset(&hmm_buffer_record[i]); +} + +static void +sh_css_hmm_buffer_record_uninit(void) { + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if (buffer_record->in_use) { + if (buffer_record->h_vbuf) + ia_css_rmgr_rel_vbuf(hmm_buffer_pool, &buffer_record->h_vbuf); + sh_css_hmm_buffer_record_reset(buffer_record); } + buffer_record++; } +} - static void - sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record) { - assert(buffer_record); - buffer_record->in_use = false; - buffer_record->type = IA_CSS_BUFFER_TYPE_INVALID; - buffer_record->h_vbuf = NULL; - buffer_record->kernel_ptr = 0; - } +static void +sh_css_hmm_buffer_record_reset(struct sh_css_hmm_buffer_record *buffer_record) { + assert(buffer_record); + buffer_record->in_use = false; + buffer_record->type = IA_CSS_BUFFER_TYPE_INVALID; + buffer_record->h_vbuf = NULL; + buffer_record->kernel_ptr = 0; +} - static struct sh_css_hmm_buffer_record - *sh_css_hmm_buffer_record_acquire(struct ia_css_rmgr_vbuf_handle *h_vbuf, - enum ia_css_buffer_type type, - hrt_address kernel_ptr) { - int i; - struct sh_css_hmm_buffer_record *buffer_record = NULL; - struct sh_css_hmm_buffer_record *out_buffer_record = NULL; - - assert(h_vbuf); - assert((type > IA_CSS_BUFFER_TYPE_INVALID) && - (type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)); - assert(kernel_ptr != 0); - - buffer_record = &hmm_buffer_record[0]; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - if (!buffer_record->in_use) { - buffer_record->in_use = true; - buffer_record->type = type; - buffer_record->h_vbuf = h_vbuf; - buffer_record->kernel_ptr = kernel_ptr; - out_buffer_record = buffer_record; - break; - } - buffer_record++; - } +static struct sh_css_hmm_buffer_record +*sh_css_hmm_buffer_record_acquire(struct ia_css_rmgr_vbuf_handle *h_vbuf, + enum ia_css_buffer_type type, + hrt_address kernel_ptr) { + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + struct sh_css_hmm_buffer_record *out_buffer_record = NULL; - return out_buffer_record; + assert(h_vbuf); + assert((type > IA_CSS_BUFFER_TYPE_INVALID) && + (type < IA_CSS_NUM_DYNAMIC_BUFFER_TYPE)); + assert(kernel_ptr != 0); + + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if (!buffer_record->in_use) { + buffer_record->in_use = true; + buffer_record->type = type; + buffer_record->h_vbuf = h_vbuf; + buffer_record->kernel_ptr = kernel_ptr; + out_buffer_record = buffer_record; + break; + } + buffer_record++; } - static struct sh_css_hmm_buffer_record - *sh_css_hmm_buffer_record_validate(hrt_vaddress ddr_buffer_addr, - enum ia_css_buffer_type type) { - int i; - struct sh_css_hmm_buffer_record *buffer_record = NULL; - bool found_record = false; - - buffer_record = &hmm_buffer_record[0]; - for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { - if ((buffer_record->in_use) && - (buffer_record->type == type) && - (buffer_record->h_vbuf) && - (buffer_record->h_vbuf->vptr == ddr_buffer_addr)) { - found_record = true; - break; - } - buffer_record++; - } + return out_buffer_record; +} - if (found_record) - return buffer_record; - else - return NULL; +static struct sh_css_hmm_buffer_record +*sh_css_hmm_buffer_record_validate(hrt_vaddress ddr_buffer_addr, + enum ia_css_buffer_type type) { + int i; + struct sh_css_hmm_buffer_record *buffer_record = NULL; + bool found_record = false; + + buffer_record = &hmm_buffer_record[0]; + for (i = 0; i < MAX_HMM_BUFFER_NUM; i++) { + if ((buffer_record->in_use) && + (buffer_record->type == type) && + (buffer_record->h_vbuf) && + (buffer_record->h_vbuf->vptr == ddr_buffer_addr)) { + found_record = true; + break; + } + buffer_record++; } + + if (found_record) + return buffer_record; + else + return NULL; +} -- GitLab From badd9b3a95101594298aa20d019b441cd68f6a06 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 18:08:28 +0200 Subject: [PATCH 418/503] media: atomisp: isp_const.h: get rid of an unused big define list None of those SH_CSS_BINARY_ID_* symbols are used by this driver anymore. So, get rid of all of them. Signed-off-by: Mauro Carvalho Chehab --- .../css2400/isp/modes/interface/isp_const.h | 285 ------------------ .../pci/atomisp2/css2400/sh_css_firmware.c | 1 - 2 files changed, 286 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h index b9a00894d3483..698e6438f36ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h @@ -43,291 +43,6 @@ more details. #define UNION struct /* Union constructors not allowed in C++ */ -/* ISP binary identifiers. - These determine the order in which the binaries are looked up, do not change - this! - Also, the SP firmware uses this same order (isp_loader.hive.c). - Also, gen_firmware.c uses this order in its firmware_header. -*/ -/* The binary id is used in pre-processor expressions so we cannot - * use an enum here. */ -/* 24xx pipelines*/ -#define SH_CSS_BINARY_ID_COPY 0 -#define SH_CSS_BINARY_ID_BAYER_DS 1 -#define SH_CSS_BINARY_ID_VF_PP_FULL 2 -#define SH_CSS_BINARY_ID_VF_PP_OPT 3 -#define SH_CSS_BINARY_ID_YUV_SCALE 4 -#define SH_CSS_BINARY_ID_CAPTURE_PP 5 -#define SH_CSS_BINARY_ID_PRE_ISP 6 -#define SH_CSS_BINARY_ID_PRE_ISP_ISP2 7 -#define SH_CSS_BINARY_ID_GDC 8 -#define SH_CSS_BINARY_ID_POST_ISP 9 -#define SH_CSS_BINARY_ID_POST_ISP_ISP2 10 -#define SH_CSS_BINARY_ID_ANR 11 -#define SH_CSS_BINARY_ID_ANR_ISP2 12 -#define SH_CSS_BINARY_ID_PREVIEW_CONT_DS 13 -#define SH_CSS_BINARY_ID_PREVIEW_DS 14 -#define SH_CSS_BINARY_ID_PREVIEW_DEC 15 -#define SH_CSS_BINARY_ID_PREVIEW_CONT_BDS125_ISP2 16 -#define SH_CSS_BINARY_ID_PREVIEW_CONT_DPC_BDS150_ISP2 17 -#define SH_CSS_BINARY_ID_PREVIEW_CONT_BDS150_ISP2 18 -#define SH_CSS_BINARY_ID_PREVIEW_CONT_DPC_BDS200_ISP2 19 -#define SH_CSS_BINARY_ID_PREVIEW_CONT_BDS200_ISP2 20 -#define SH_CSS_BINARY_ID_PREVIEW_DZ 21 -#define SH_CSS_BINARY_ID_PREVIEW_DZ_ISP2 22 -#define SH_CSS_BINARY_ID_PRIMARY_DS 23 -#define SH_CSS_BINARY_ID_PRIMARY_VAR 24 -#define SH_CSS_BINARY_ID_PRIMARY_VAR_ISP2 25 -#define SH_CSS_BINARY_ID_PRIMARY_SMALL 26 -#define SH_CSS_BINARY_ID_PRIMARY_STRIPED 27 -#define SH_CSS_BINARY_ID_PRIMARY_STRIPED_ISP2 28 -#define SH_CSS_BINARY_ID_PRIMARY_8MP 29 -#define SH_CSS_BINARY_ID_PRIMARY_14MP 30 -#define SH_CSS_BINARY_ID_PRIMARY_16MP 31 -#define SH_CSS_BINARY_ID_PRIMARY_REF 32 -#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE0 33 -#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE1 34 -#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE2 35 -#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE3 36 -#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE4 37 -#define SH_CSS_BINARY_ID_PRIMARY_ISP261_STAGE5 38 -#define SH_CSS_BINARY_ID_VIDEO_OFFLINE 39 -#define SH_CSS_BINARY_ID_VIDEO_DS 40 -#define SH_CSS_BINARY_ID_VIDEO_YUV_DS 41 -#define SH_CSS_BINARY_ID_VIDEO_DZ 42 -#define SH_CSS_BINARY_ID_VIDEO_DZ_2400_ONLY 43 -#define SH_CSS_BINARY_ID_VIDEO_HIGH 44 -#define SH_CSS_BINARY_ID_VIDEO_NODZ 45 -#define SH_CSS_BINARY_ID_VIDEO_CONT_MULTIBDS_ISP2_MIN 46 -#define SH_CSS_BINARY_ID_VIDEO_CONT_BDS_300_600_ISP2_MIN 47 -#define SH_CSS_BINARY_ID_VIDEO_CONT_DPC_BDS150_ISP2_MIN 48 -#define SH_CSS_BINARY_ID_VIDEO_CONT_BDS150_ISP2_MIN 49 -#define SH_CSS_BINARY_ID_VIDEO_CONT_DPC_BDS200_ISP2_MIN 50 -#define SH_CSS_BINARY_ID_VIDEO_CONT_BDS200_ISP2_MIN 51 -#define SH_CSS_BINARY_ID_VIDEO_CONT_NOBDS_ISP2_MIN 52 -#define SH_CSS_BINARY_ID_VIDEO_DZ_ISP2_MIN 53 -#define SH_CSS_BINARY_ID_VIDEO_DZ_ISP2 54 -#define SH_CSS_BINARY_ID_VIDEO_LP_ISP2 55 -#define SH_CSS_BINARY_ID_RESERVED1 56 -#define SH_CSS_BINARY_ID_ACCELERATION 57 -#define SH_CSS_BINARY_ID_PRE_DE_ISP2 58 -#define SH_CSS_BINARY_ID_KERNEL_TEST_LOAD_STORE 59 -#define SH_CSS_BINARY_ID_CAPTURE_PP_BLI 60 -#define SH_CSS_BINARY_ID_CAPTURE_PP_LDC 61 -#ifdef ISP2401 -#define SH_CSS_BINARY_ID_PRIMARY_STRIPED_ISP2_XNR 62 -#endif - -/* skycam kerneltest pipelines */ -#ifndef ISP2401 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM 120 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM_STRIPED 121 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN 122 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN_STRIPED 123 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD 124 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD_STRIPED 125 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB 126 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A 127 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A_STRIPED 128 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AF 129 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID 130 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE 131 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE_STRIPED 132 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DEMOSAIC 133 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP1_C0 134 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2 135 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF 136 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF_STRIPED 137 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_REF 138 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS 139 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR 140 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_STRIPED 141 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_BLENDING 142 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_BLOCK 143 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AE 144 -#define SH_CSS_BINARY_ID_VIDEO_RAW 145 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB_FR 146 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP 147 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP_STRIPED 148 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR 149 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_IF 150 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_IF_STRIPED 151 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM 152 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_STRIPED 153 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS_STRIPED 154 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID_STRIPED 155 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV 156 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV_BLOCK 157 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_BLOCK 158 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_STRIPED 159 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_BLOCK_STRIPED 160 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_INPUT_YUV 161 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV 162 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV_16 163 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SPLIT 164 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM_STRIPED 165 - -#else -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM 121 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_NORM_STRIPED 122 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID 123 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OBGRID_STRIPED 124 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN 125 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_LIN_STRIPED 126 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD 127 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_SHD_STRIPED 128 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AE 129 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB 130 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AF 131 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_ACC_AWB_FR 132 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A 133 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_3A_STRIPED 134 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE 135 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_BAYER_DENOISE_STRIPED 136 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR 137 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR_STRIPED 138 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DEMOSAIC 139 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP 140 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DM_RGBPP_STRIPED 141 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP1_C0 142 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2 143 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2_STRIPED 144 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_REF 145 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR 146 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_STRIPED 147 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_XNR_BLENDING 148 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF 149 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_REF_STRIPED 150 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS 151 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_DVS_STRIPED 152 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DVS_STAT_C0 153 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_BLOCK 154 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR_STRIPED 155 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM 156 -#define SH_CSS_BINARY_ID_VIDEO_RAW 157 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV 158 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV_BLOCK 159 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_BLOCK 160 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_YUV16_STRIPED 161 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_COPY_BLOCK_STRIPED 162 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_INPUT_YUV 163 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV 164 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_YUV_16 165 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SPLIT 166 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_OUTPUT_SYSTEM_STRIPED 167 -#define SH_CSS_BINARY_ID_COPY_KERNELTEST_OUTPUT_SYSTEM 168 -#endif - -/* skycam partial test pipelines*/ -#ifndef ISP2401 -#define SH_CSS_BINARY_ID_IF_TO_DPC 201 -#define SH_CSS_BINARY_ID_IF_TO_BDS 202 -#else -#define SH_CSS_BINARY_ID_IF_TO_BDS 201 -#define SH_CSS_BINARY_ID_IF_TO_BDS_STRIPED 202 -#endif -#define SH_CSS_BINARY_ID_IF_TO_NORM 203 -#ifndef ISP2401 -#define SH_CSS_BINARY_ID_IF_TO_OB 204 -#define SH_CSS_BINARY_ID_IF_TO_LIN 205 -#define SH_CSS_BINARY_ID_IF_TO_SHD 206 -#define SH_CSS_BINARY_ID_IF_TO_BNR 207 -#define SH_CSS_BINARY_ID_IF_TO_RGBPP_NV12_16 208 -#define SH_CSS_BINARY_ID_IF_TO_RGBPP 210 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1 211 -#define SH_CSS_BINARY_ID_IF_TO_DM 214 -#define SH_CSS_BINARY_ID_IF_TO_YUVP2_C0 216 -#define SH_CSS_BINARY_ID_IF_TO_YUVP2_ANR_VIA_ISP 217 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_DVS 218 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_TNR 219 -#define SH_CSS_BINARY_ID_IF_TO_BDS_STRIPED 224 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_ANR_STRIPED 225 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_YUVP2_STRIPED 227 -#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0 228 -#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0_STRIPED 229 -#define SH_CSS_BINARY_ID_IF_TO_REF 236 -#define SH_CSS_BINARY_ID_IF_TO_DVS_STRIPED 237 -#define SH_CSS_BINARY_ID_IF_TO_YUVP2_STRIPED 238 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1_STRIPED 239 -#define SH_CSS_BINARY_ID_IF_TO_RGBPP_STRIPED 240 -#define SH_CSS_BINARY_ID_IF_TO_ANR_STRIPED 241 -#define SH_CSS_BINARY_ID_IF_TO_BNR_STRIPED 242 -#define SH_CSS_BINARY_ID_IF_TO_SHD_STRIPED 243 -#define SH_CSS_BINARY_ID_IF_TO_LIN_STRIPED 244 -#define SH_CSS_BINARY_ID_IF_TO_OB_STRIPED 245 -#define SH_CSS_BINARY_ID_IF_TO_NORM_STRIPED 248 -#define SH_CSS_BINARY_ID_COPY_KERNELTEST_OUTPUT_SYSTEM 253 -#define SH_CSS_BINARY_ID_IF_TO_XNR 256 -#define SH_CSS_BINARY_ID_IF_TO_XNR_STRIPED 257 -#define SH_CSS_BINARY_ID_IF_TO_REF_STRIPED 258 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS 259 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0 262 -#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY 263 -#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY_STRIPED 264 -#define SH_CSS_BINARY_ID_IF_TO_ANR 265 -#define SH_CSS_BINARY_ID_VIDEO_TEST_ACC_DVS_STAT_C0 266 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS_STRIPED 270 -#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY 276 -#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY_STRIPED 277 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0_STRIPED 278 -#else -#define SH_CSS_BINARY_ID_IF_TO_NORM_STRIPED 204 -#define SH_CSS_BINARY_ID_IF_TO_OB 205 -#define SH_CSS_BINARY_ID_IF_TO_OB_STRIPED 206 -#define SH_CSS_BINARY_ID_IF_TO_LIN 207 -#define SH_CSS_BINARY_ID_IF_TO_LIN_STRIPED 208 -#define SH_CSS_BINARY_ID_IF_TO_SHD 209 -#define SH_CSS_BINARY_ID_IF_TO_SHD_STRIPED 210 -#define SH_CSS_BINARY_ID_IF_TO_BNR 211 -#define SH_CSS_BINARY_ID_IF_TO_BNR_STRIPED 212 -#define SH_CSS_BINARY_ID_IF_TO_ANR 213 -#define SH_CSS_BINARY_ID_IF_TO_ANR_STRIPED 214 -#define SH_CSS_BINARY_ID_IF_TO_DM 215 -#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0 216 -#define SH_CSS_BINARY_ID_IF_TO_BDS_RGBP_DVS_STAT_C0_STRIPED 217 -#define SH_CSS_BINARY_ID_IF_TO_RGBPP 218 -#define SH_CSS_BINARY_ID_IF_TO_RGBPP_NV12_16 219 -#define SH_CSS_BINARY_ID_IF_TO_RGBPP_STRIPED 220 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1 221 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1_STRIPED 222 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0 223 -#define SH_CSS_BINARY_ID_IF_TO_YUVP2_C0 224 -#define SH_CSS_BINARY_ID_IF_TO_YUVP2_STRIPED 225 -#define SH_CSS_BINARY_ID_IF_TO_XNR 226 -#define SH_CSS_BINARY_ID_IF_TO_XNR_STRIPED 227 -#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY 228 -#define SH_CSS_BINARY_ID_IF_TO_XNR_PRIMARY_STRIPED 229 -#define SH_CSS_BINARY_ID_IF_TO_REF 230 -#define SH_CSS_BINARY_ID_IF_TO_REF_STRIPED 231 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_DVS 232 -#define SH_CSS_BINARY_ID_IF_TO_DVS_STRIPED 233 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_TNR 234 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS 235 -#define SH_CSS_BINARY_ID_VIDEO_IF_TO_OSYS_STRIPED 236 -#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY 237 -#define SH_CSS_BINARY_ID_IF_TO_OSYS_PRIMARY_STRIPED 238 -#define SH_CSS_BINARY_ID_IF_TO_YUVP1_C0_STRIPED 239 -#define SH_CSS_BINARY_ID_VIDEO_YUVP1_TO_OSYS 240 -#define SH_CSS_BINARY_ID_IF_TO_OSYS_PREVIEW 241 -#define SH_CSS_BINARY_ID_IF_TO_OSYS_PREVIEW_STRIPED 242 -#endif - -/* Skycam IR camera binaries */ -#ifndef ISP2401 -#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_NO_XNR 300 -#define SH_CSS_BINARY_ID_VIDEO_IR_IF_TO_OSYS_NO_DVS_NO_TNR_NO_XNR 301 -#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_NO_XNR_NO_DVS_PRIMARY 302 -#else -#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS 300 -#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_NO_TNR3 301 -#define SH_CSS_BINARY_ID_IR_IF_TO_OSYS_PRIMARY 302 - -/* Binaries under development */ -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR3 401 -#define SH_CSS_BINARY_ID_VIDEO_KERNELTEST_TNR3_STRIPED 402 - -#endif - #define XMEM_WIDTH_BITS HIVE_ISP_DDR_WORD_BITS #define XMEM_SHORTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 16) #define XMEM_INTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 32) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c index 7c0216533e661..b0b8c2c4a227e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c @@ -47,7 +47,6 @@ struct fw_param { const void *buffer; }; -/* Warning: same order as SH_CSS_BINARY_ID_* */ static struct firmware_header *firmware_header; /* The string STR is a place holder -- GitLab From d4cf9939a614a79a876782ea57f6ca7a64562c03 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 18:26:45 +0200 Subject: [PATCH 419/503] media: atomisp: get rid of several typedef-style defines Those vars aren't used anymore at this driver. Get rid of them. Signed-off-by: Mauro Carvalho Chehab --- .../css2400/css_2400_system/hrt/var.h | 20 ------------------- .../css2400/css_2401_csi2p_system/hrt/var.h | 20 ------------------- .../css2400/css_2401_system/hrt/var.h | 20 ------------------- 3 files changed, 60 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h index 0446916d21f61..778eb29b70181 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h @@ -20,26 +20,6 @@ #include "system_api.h" #include "hive_types.h" -#define hrt_int_type_of_char char -#define hrt_int_type_of_uchar unsigned char -#define hrt_int_type_of_short short -#define hrt_int_type_of_ushort unsigned short -#define hrt_int_type_of_int int -#define hrt_int_type_of_uint unsigned int -#define hrt_int_type_of_long long -#define hrt_int_type_of_ulong unsigned long -#define hrt_int_type_of_ptr unsigned int - -#define hrt_host_type_of_char char -#define hrt_host_type_of_uchar unsigned char -#define hrt_host_type_of_short short -#define hrt_host_type_of_ushort unsigned short -#define hrt_host_type_of_int int -#define hrt_host_type_of_uint unsigned int -#define hrt_host_type_of_long long -#define hrt_host_type_of_ulong unsigned long -#define hrt_host_type_of_ptr void* - #define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h index 6d6fb35c62209..0790ab0f22333 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h @@ -20,26 +20,6 @@ #include "system_api.h" #include "hive_types.h" -#define hrt_int_type_of_char char -#define hrt_int_type_of_uchar unsigned char -#define hrt_int_type_of_short short -#define hrt_int_type_of_ushort unsigned short -#define hrt_int_type_of_int int -#define hrt_int_type_of_uint unsigned int -#define hrt_int_type_of_long long -#define hrt_int_type_of_ulong unsigned long -#define hrt_int_type_of_ptr unsigned int - -#define hrt_host_type_of_char char -#define hrt_host_type_of_uchar unsigned char -#define hrt_host_type_of_short short -#define hrt_host_type_of_ushort unsigned short -#define hrt_host_type_of_int int -#define hrt_host_type_of_uint unsigned int -#define hrt_host_type_of_long long -#define hrt_host_type_of_ulong unsigned long -#define hrt_host_type_of_ptr void* - #define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h index 6d6fb35c62209..0790ab0f22333 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h @@ -20,26 +20,6 @@ #include "system_api.h" #include "hive_types.h" -#define hrt_int_type_of_char char -#define hrt_int_type_of_uchar unsigned char -#define hrt_int_type_of_short short -#define hrt_int_type_of_ushort unsigned short -#define hrt_int_type_of_int int -#define hrt_int_type_of_uint unsigned int -#define hrt_int_type_of_long long -#define hrt_int_type_of_ulong unsigned long -#define hrt_int_type_of_ptr unsigned int - -#define hrt_host_type_of_char char -#define hrt_host_type_of_uchar unsigned char -#define hrt_host_type_of_short short -#define hrt_host_type_of_ushort unsigned short -#define hrt_host_type_of_int int -#define hrt_host_type_of_uint unsigned int -#define hrt_host_type_of_long long -#define hrt_host_type_of_ulong unsigned long -#define hrt_host_type_of_ptr void* - #define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) #define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) #define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) -- GitLab From 8fba22fbdfc3cad85b5795f2e05b2527fc44e358 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 14:06:20 +0200 Subject: [PATCH 420/503] media: atomisp: get rid of trivial ISP2401 dependencies on header files On several header files, the dependency for ISP2401 is trivial: for example, it just adds new fields on structs or declare new functions. Get rid of those trivial cases. Signed-off-by: Mauro Carvalho Chehab --- .../ia_css_isp_configs.h | 19 ++++---- .../ia_css_isp_params.h | 9 +--- .../ia_css_isp_configs.h | 20 ++++---- .../ia_css_isp_params.h | 9 +--- .../ia_css_isp_configs.h | 15 +++--- .../ia_css_isp_params.h | 9 +--- .../css2400/hive_isp_css_common/isp_global.h | 7 +-- .../device_access/device_access.h | 16 ------- .../hive_isp_css_include/math_support.h | 7 ++- .../pci/atomisp2/css2400/ia_css_acc_types.h | 9 ++-- .../pci/atomisp2/css2400/ia_css_pipe_public.h | 9 ++-- .../pci/atomisp2/css2400/ia_css_stream.h | 4 +- .../atomisp2/css2400/ia_css_stream_public.h | 3 +- .../pci/atomisp2/css2400/ia_css_timer.h | 16 ------- .../pci/atomisp2/css2400/ia_css_types.h | 47 +++++++------------ .../conversion_1.0/ia_css_conversion.host.h | 4 -- .../isp/kernels/dp/dp_1.0/ia_css_dp.host.h | 4 +- .../kernels/dvs/dvs_1.0/ia_css_dvs_param.h | 7 --- .../fixedbds_1.0/ia_css_fixedbds_param.h | 3 +- .../io_ls/bayer_io_ls/ia_css_bayer_io.host.h | 2 - .../io_ls/bayer_io_ls/ia_css_bayer_io_param.h | 2 - .../io_ls/bayer_io_ls/ia_css_bayer_io_types.h | 2 - .../io_ls/common/ia_css_common_io_param.h | 2 - .../io_ls/common/ia_css_common_io_types.h | 2 - .../yuv444_io_ls/ia_css_yuv444_io_param.h | 2 - .../yuv444_io_ls/ia_css_yuv444_io_types.h | 2 - .../bayer_io_ls/ia_css_bayer_io.host.h | 2 - .../bayer_io_ls/ia_css_bayer_io_param.h | 2 - .../bayer_io_ls/ia_css_bayer_io_types.h | 2 - .../common/ia_css_common_io_param.h | 2 - .../common/ia_css_common_io_types.h | 2 - .../yuv444_io_ls/ia_css_yuv444_io.host.h | 2 - .../yuv444_io_ls/ia_css_yuv444_io_param.h | 2 - .../yuv444_io_ls/ia_css_yuv444_io_types.h | 2 - .../isp/kernels/sc/sc_1.0/ia_css_sc.host.h | 4 +- .../isp/kernels/sc/sc_1.0/ia_css_sc_types.h | 4 +- .../isp/kernels/tnr/tnr3/ia_css_tnr3_types.h | 2 - .../kernels/xnr/xnr_3.0/ia_css_xnr3.host.h | 3 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3_param.h | 8 +--- .../isp/modes/interface/input_buf.isp.h | 16 ------- .../css2400/isp/modes/interface/isp_const.h | 16 ------- .../css2400/isp/modes/interface/isp_types.h | 16 ------- .../runtime/binary/interface/ia_css_binary.h | 21 ++------- .../interface/ia_css_isp_param_types.h | 16 ------- 44 files changed, 79 insertions(+), 274 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h index 451fbae02aee0..c39322d72caef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h @@ -22,9 +22,9 @@ #include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" #include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" #include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -#ifdef ISP2401 +/* ISP2401 */ #include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" -#endif + #include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" #include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" #include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" @@ -47,13 +47,14 @@ enum ia_css_configuration_ids { IA_CSS_OUTPUT0_CONFIG_ID, IA_CSS_OUTPUT1_CONFIG_ID, IA_CSS_OUTPUT_CONFIG_ID, -#ifdef ISP2401 - IA_CSS_SC_CONFIG_ID, -#endif IA_CSS_RAW_CONFIG_ID, IA_CSS_TNR_CONFIG_ID, IA_CSS_REF_CONFIG_ID, IA_CSS_VF_CONFIG_ID, + + /* ISP2401 */ + IA_CSS_SC_CONFIG_ID, + IA_CSS_NUM_CONFIGURATION_IDS }; @@ -70,9 +71,10 @@ struct ia_css_config_memory_offsets { struct ia_css_isp_parameter output0; struct ia_css_isp_parameter output1; struct ia_css_isp_parameter output; -#ifdef ISP2401 + + /* ISP2401 */ struct ia_css_isp_parameter sc; -#endif + struct ia_css_isp_parameter raw; struct ia_css_isp_parameter tnr; struct ia_css_isp_parameter ref; @@ -149,7 +151,7 @@ ia_css_configure_output( /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#ifdef ISP2401 +/* ISP2401 */ void ia_css_configure_sc( const struct ia_css_binary *binary, @@ -157,7 +159,6 @@ ia_css_configure_sc( /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#endif void ia_css_configure_raw( const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h index 7b81ffa29d8bd..369dc41dae5fe 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h @@ -120,9 +120,9 @@ struct ia_css_memory_offsets { struct ia_css_isp_parameter sdis_vertcoef; struct ia_css_isp_parameter sdis2_horicoef; struct ia_css_isp_parameter sdis2_vertcoef; -#ifdef ISP2401 + + /* ISP2401 */ struct ia_css_isp_parameter xnr3; -#endif } vmem; struct { struct ia_css_isp_parameter bh; @@ -382,18 +382,13 @@ void ia_css_get_configs(struct ia_css_isp_parameters *params, const struct ia_css_isp_config *config) ; -#ifdef ISP2401 -#endif /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_set_configs(struct ia_css_isp_parameters *params, const struct ia_css_isp_config *config) ; -#ifdef ISP2401 - -#endif #endif /* IA_CSS_INCLUDE_PARAMETER */ #endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h index 451fbae02aee0..6dd0205fa59e7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h @@ -22,9 +22,10 @@ #include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" #include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" #include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -#ifdef ISP2401 + +/* ISP2401 */ #include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" -#endif + #include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" #include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" #include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" @@ -47,13 +48,14 @@ enum ia_css_configuration_ids { IA_CSS_OUTPUT0_CONFIG_ID, IA_CSS_OUTPUT1_CONFIG_ID, IA_CSS_OUTPUT_CONFIG_ID, -#ifdef ISP2401 - IA_CSS_SC_CONFIG_ID, -#endif IA_CSS_RAW_CONFIG_ID, IA_CSS_TNR_CONFIG_ID, IA_CSS_REF_CONFIG_ID, IA_CSS_VF_CONFIG_ID, + + /* ISP 2401 */ + IA_CSS_SC_CONFIG_ID, + IA_CSS_NUM_CONFIGURATION_IDS }; @@ -70,9 +72,10 @@ struct ia_css_config_memory_offsets { struct ia_css_isp_parameter output0; struct ia_css_isp_parameter output1; struct ia_css_isp_parameter output; -#ifdef ISP2401 + + /* ISP2401 */ struct ia_css_isp_parameter sc; -#endif + struct ia_css_isp_parameter raw; struct ia_css_isp_parameter tnr; struct ia_css_isp_parameter ref; @@ -149,7 +152,7 @@ ia_css_configure_output( /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#ifdef ISP2401 +/* ISP2401 */ void ia_css_configure_sc( const struct ia_css_binary *binary, @@ -157,7 +160,6 @@ ia_css_configure_sc( /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#endif void ia_css_configure_raw( const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h index 7b81ffa29d8bd..b8b3c48492ae9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h @@ -120,9 +120,9 @@ struct ia_css_memory_offsets { struct ia_css_isp_parameter sdis_vertcoef; struct ia_css_isp_parameter sdis2_horicoef; struct ia_css_isp_parameter sdis2_vertcoef; -#ifdef ISP2401 + + /* ISP2401 */ struct ia_css_isp_parameter xnr3; -#endif } vmem; struct { struct ia_css_isp_parameter bh; @@ -382,18 +382,13 @@ void ia_css_get_configs(struct ia_css_isp_parameters *params, const struct ia_css_isp_config *config) ; -#ifdef ISP2401 -#endif /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_set_configs(struct ia_css_isp_parameters *params, const struct ia_css_isp_config *config) ; -#ifdef ISP2401 -#endif #endif /* IA_CSS_INCLUDE_PARAMETER */ - #endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h index 451fbae02aee0..8cac7268acd38 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h @@ -22,9 +22,10 @@ #include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" #include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" #include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -#ifdef ISP2401 + +/* ISP2401 */ #include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" -#endif + #include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" #include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" #include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" @@ -47,13 +48,14 @@ enum ia_css_configuration_ids { IA_CSS_OUTPUT0_CONFIG_ID, IA_CSS_OUTPUT1_CONFIG_ID, IA_CSS_OUTPUT_CONFIG_ID, -#ifdef ISP2401 - IA_CSS_SC_CONFIG_ID, -#endif IA_CSS_RAW_CONFIG_ID, IA_CSS_TNR_CONFIG_ID, IA_CSS_REF_CONFIG_ID, IA_CSS_VF_CONFIG_ID, + + /* ISP2401 */ + IA_CSS_SC_CONFIG_ID, + IA_CSS_NUM_CONFIGURATION_IDS }; @@ -149,7 +151,7 @@ ia_css_configure_output( /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#ifdef ISP2401 +/* ISP2401 */ void ia_css_configure_sc( const struct ia_css_binary *binary, @@ -157,7 +159,6 @@ ia_css_configure_sc( /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#endif void ia_css_configure_raw( const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h index 7b81ffa29d8bd..b8b3c48492ae9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h @@ -120,9 +120,9 @@ struct ia_css_memory_offsets { struct ia_css_isp_parameter sdis_vertcoef; struct ia_css_isp_parameter sdis2_horicoef; struct ia_css_isp_parameter sdis2_vertcoef; -#ifdef ISP2401 + + /* ISP2401 */ struct ia_css_isp_parameter xnr3; -#endif } vmem; struct { struct ia_css_isp_parameter bh; @@ -382,18 +382,13 @@ void ia_css_get_configs(struct ia_css_isp_parameters *params, const struct ia_css_isp_config *config) ; -#ifdef ISP2401 -#endif /* Code generated by genparam/gencode.c:gen_global_access_function() */ void ia_css_set_configs(struct ia_css_isp_parameters *params, const struct ia_css_isp_config *config) ; -#ifdef ISP2401 -#endif #endif /* IA_CSS_INCLUDE_PARAMETER */ - #endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h index b5e4dc3a4ed35..59d28f4efbad5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h @@ -35,7 +35,6 @@ #define ISP_NWAY_LOG2 6 #define ISP_VEC_NELEMS_LOG2 ISP_NWAY_LOG2 -#ifdef ISP2401 #ifdef PIPE_GENERATION #define PIPEMEM(x) MEM(x) #define ISP_NWAY BIT(ISP_NWAY_LOG2) @@ -43,7 +42,6 @@ #define PIPEMEM(x) #endif -#endif /* The number of data bytes in a vector disregarding the reduced precision */ #define ISP_VEC_BYTES (ISP_VEC_NELEMS * sizeof(uint16_t)) @@ -99,17 +97,14 @@ #define ISP_VAMEM3_SINK_REG 0x08 #define ISP_HMEM_SINK_REG 0x08 -#ifdef ISP2401 +/* ISP2401 */ #define ISP_BAMEM_ALIGN_ELEM ISP_VMEM_ALIGN_ELEM #define BAMEM VMEM - #define XNR3_DOWN_BAMEM_BASE_ADDRESS (0x16880) #define XNR3_UP_BAMEM_BASE_ADDRESS (0x12880) - #define bmem_ldrow(fu, pid, offset, data) bmem_ldrow_s(fu, pid, offset, data) #define bmem_strow(fu, pid, offset, data) bmem_strow_s(fu, pid, offset, data) #define bmem_ldblk(fu, pid, offset, data) bmem_ldblk_s(fu, pid, offset, data) #define bmem_stblk(fu, pid, offset, data) bmem_stblk_s(fu, pid, offset, data) -#endif #endif /* __ISP_GLOBAL_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h index 0a86b1fbd27b3..be031d41de7cb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h @@ -1,18 +1,3 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#else /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -26,7 +11,6 @@ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ -#endif #ifndef __DEVICE_ACCESS_H_INCLUDED__ #define __DEVICE_ACCESS_H_INCLUDED__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h index bc61ffebf1b79..0b9519c8961c5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h @@ -23,11 +23,10 @@ /* force a value to a lower even value */ #define EVEN_FLOOR(x) ((x) & ~1) -#ifdef ISP2401 +/* ISP2401 */ /* If the number is odd, find the next even number */ #define EVEN_CEIL(x) ((IS_ODD(x)) ? ((x) + 1) : (x)) -#endif /* A => B */ #define IMPLIES(a, b) (!(a) || (b)) @@ -93,17 +92,17 @@ static inline unsigned int ceil_shift_mul(unsigned int a, unsigned int b) return CEIL_SHIFT_MUL(a, b); } -#ifdef ISP2401 +/* ISP2401 */ static inline unsigned int round_half_down_div(unsigned int a, unsigned int b) { return ROUND_HALF_DOWN_DIV(a, b); } +/* ISP2401 */ static inline unsigned int round_half_down_mul(unsigned int a, unsigned int b) { return ROUND_HALF_DOWN_MUL(a, b); } -#endif /* @brief Next Power of Two * diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h index a8202aabdd383..d429ffaa972fa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h @@ -221,11 +221,11 @@ struct ia_css_binary_info { struct ia_css_isp_param_isp_segments mem_initializers; /* MW: Packing (related) bools in an integer ?? */ struct { -#ifdef ISP2401 + /* ISP2401 */ u8 luma_only; u8 input_yuv; u8 input_raw; -#endif + u8 reduced_pipe; u8 vf_veceven; u8 dis; @@ -326,9 +326,10 @@ struct ia_css_sp_info { u32 host_sp_queues_initialized; /** Polled from the SP */ u32 sleep_mode; /** different mode to halt SP */ u32 invalidate_tlb; /** inform SP to invalidate mmu TLB */ -#ifndef ISP2401 + + /* ISP2400 */ u32 stop_copy_preview; /** suspend copy and preview pipe when capture */ -#endif + u32 debug_buffer_ddr_address; /** inform SP the address of DDR debug queue */ u32 perf_counter_input_system_error; /** input system perf diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h index 3698f43518c90..e782978a5ce77 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h @@ -24,9 +24,8 @@ #include #include #include -#ifdef ISP2401 +/* ISP2401 */ #include -#endif enum { IA_CSS_PIPE_OUTPUT_STAGE_0 = 0, @@ -484,7 +483,7 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, u32 fw_handle, bool *enable); -#ifdef ISP2401 +/* ISP2401 */ /* @brief Update mapped CSS and ISP arguments for QoS pipe during SP runtime. * @param[in] pipe Pipe handle. * @param[in] fw_handle Extension firmware Handle (ia_css_fw_info.handle). @@ -507,7 +506,6 @@ ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe, struct ia_css_isp_param_css_segments *css_seg, struct ia_css_isp_param_isp_segments *isp_seg); -#endif /* @brief Get selected configuration settings * @param[in] pipe The pipe. * @param[out] config Configuration settings. @@ -543,7 +541,7 @@ ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, */ bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info); -#ifdef ISP2401 +/* ISP2401 */ /* @brief Override the frameformat set on the output pins. * @param[in] pipe Pipe handle. * @param[in] output_pin Pin index to set the format on @@ -568,5 +566,4 @@ ia_css_pipe_override_frame_format(struct ia_css_pipe *pipe, int output_pin, enum ia_css_frame_format format); -#endif #endif /* __IA_CSS_PIPE_PUBLIC_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h index 59484d38409ff..5690fe832f416 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h @@ -42,9 +42,9 @@ struct ia_css_stream { bool cont_capt; bool disable_cont_vf; -#ifndef ISP2401 + + /* ISP2401 */ bool stop_copy_preview; -#endif bool started; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h index ff8d95aa77e34..fe11c8bf3cdcf 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h @@ -101,7 +101,6 @@ struct ia_css_stream_config { isys_config[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH]; struct ia_css_stream_input_config input_config; -#ifdef ISP2401 /* Currently, Android and Windows platforms interpret the binning_factor parameter * differently. In Android, the binning factor is expressed in the form * 2^N * 2^N, whereas in Windows platform, the binning factor is N*N @@ -109,7 +108,7 @@ struct ia_css_stream_config { * macro USE_WINDOWS_BINNING_FACTOR. This is for backward compatibility only * and will be deprecated. In the future,all platforms will use the N*N method */ -#endif + /* ISP2401 */ unsigned int sensor_binning_factor; /** Binning factor used by sensor to produce image data. This is used for shading correction. */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h index 82cbe9fca72ba..a37cfa60ad350 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h @@ -1,18 +1,3 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#else /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -26,7 +11,6 @@ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ -#endif #ifndef __IA_CSS_TIMER_H #define __IA_CSS_TIMER_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h index cb6a82392821d..08e9b24c3d93f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h @@ -50,9 +50,10 @@ #include "isp/kernels/wb/wb_1.0/ia_css_wb_types.h" #include "isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h" #include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h" -#ifdef ISP2401 + +/* ISP2401 */ #include "isp/kernels/tnr/tnr3/ia_css_tnr3_types.h" -#endif + #include "isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h" #include "isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h" #include "isp/kernels/output/output_1.0/ia_css_output_types.h" @@ -128,12 +129,8 @@ struct ia_css_isp_data { /* Shading Correction types. */ enum ia_css_shading_correction_type { -#ifndef ISP2401 - IA_CSS_SHADING_CORRECTION_TYPE_1 /** Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400) */ -#else IA_CSS_SHADING_CORRECTION_NONE, /** Shading Correction is not processed in the pipe. */ IA_CSS_SHADING_CORRECTION_TYPE_1 /** Shading Correction 1.0 (pipe 1.0 on ISP2300, pipe 2.2 on ISP2400/2401) */ -#endif /** More shading correction types can be added in the future. */ }; @@ -287,18 +284,11 @@ struct ia_css_shading_info { * ISP2: SC1 is used. */ struct { -#ifndef ISP2401 + /* ISP2400 */ u32 enable; /** Shading correction enabled. 0:disabled, 1:enabled */ - u32 num_hor_grids; /** Number of data points per line - per color on shading table. */ - u32 num_ver_grids; /** Number of lines of data points - per color on shading table. */ - u32 bqs_per_grid_cell; /** Grid cell size - in BQ(Bayer Quad) unit. - (1BQ means {Gr,R,B,Gb}(2x2 pixels).) - Valid values are 8,16,32,64. */ -#else + + /* ISP2401 */ u32 num_hor_grids; /** Number of data points per line per color on shading table. */ u32 num_ver_grids; /** Number of lines of data points per color on shading table. */ u32 bqs_per_grid_cell; /** Grid cell size in BQ unit. @@ -306,46 +296,42 @@ struct ia_css_shading_info { 1BQ means {Gr,R,B,Gb} (2x2 pixels). Horizontal 1 bqs corresponds to horizontal 2 pixels. Vertical 1 bqs corresponds to vertical 2 pixels. */ -#endif u32 bayer_scale_hor_ratio_in; u32 bayer_scale_hor_ratio_out; -#ifndef ISP2401 - /** Horizontal ratio of bayer scaling - between input width and output width, for the scaling - which should be done before shading correction. - output_width = input_width * bayer_scale_hor_ratio_out - / bayer_scale_hor_ratio_in */ -#else + /** Horizontal ratio of bayer scaling between input width and output width, for the scaling which should be done before shading correction. output_width = input_width * bayer_scale_hor_ratio_out / bayer_scale_hor_ratio_in + 0.5 */ -#endif u32 bayer_scale_ver_ratio_in; u32 bayer_scale_ver_ratio_out; -#ifndef ISP2401 + + /** Vertical ratio of bayer scaling between input height and output height, for the scaling which should be done before shading correction. output_height = input_height * bayer_scale_ver_ratio_out / bayer_scale_ver_ratio_in */ + /* ISP2400 */ u32 sc_bayer_origin_x_bqs_on_shading_table; /** X coordinate (in bqs) of bayer origin on shading table. This indicates the left-most pixel of bayer (not include margin) inputted to the shading correction. This corresponds to the left-most pixel of bayer inputted to isp from sensor. */ + /* ISP2400 */ u32 sc_bayer_origin_y_bqs_on_shading_table; /** Y coordinate (in bqs) of bayer origin on shading table. This indicates the top pixel of bayer (not include margin) inputted to the shading correction. This corresponds to the top pixel of bayer inputted to isp from sensor. */ -#else + /** Vertical ratio of bayer scaling between input height and output height, for the scaling which should be done before shading correction. output_height = input_height * bayer_scale_ver_ratio_out / bayer_scale_ver_ratio_in + 0.5 */ + /* ISP2401 */ struct ia_css_resolution isp_input_sensor_data_res_bqs; /** Sensor data size (in bqs) inputted to ISP. This is the size BEFORE bayer scaling. NOTE: This is NOT the size of the physical sensor size. @@ -356,13 +342,14 @@ struct ia_css_shading_info { are applied to the physical sensor data area. ISP assumes the area of isp_input_sensor_data_res_bqs is centered on the physical sensor. */ + /* ISP2401 */ struct ia_css_resolution sensor_data_res_bqs; /** Sensor data size (in bqs) at shading correction. This is the size AFTER bayer scaling. */ + /* ISP2401 */ struct ia_css_coordinate sensor_data_origin_bqs_on_sctbl; /** Origin of sensor data area positioned on shading table at shading correction. The coordinate x,y should be positive values. */ -#endif } type_1; /** More structures can be added here when more shading correction types will be added @@ -602,10 +589,10 @@ struct ia_css_isp_config { struct ia_css_output_config *output_config; /** Main Output Mirroring, flipping */ -#ifdef ISP2401 + /* ISP 2401 */ struct ia_css_tnr3_kernel_config *tnr3_config; /** TNR3 config */ -#endif + struct ia_css_scaler_config *scaler_config; /** Skylake: scaler config (optional) */ struct ia_css_formats_config diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h index 59db91464da27..c136d5e035112 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h @@ -26,8 +26,4 @@ ia_css_conversion_encode( const struct ia_css_conversion_config *from, unsigned int size); -#ifdef ISP2401 -/* workaround until code generation in isp_kernelparameters.host.c is fixed */ -#define ia_css_conversion_par_encode(to, from, size) ia_css_conversion_encode(to, from, size) -#endif #endif /* __IA_CSS_CONVERSION_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h index 05fd7fdd618d8..009541fafda08 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h @@ -19,9 +19,9 @@ #include "ia_css_dp_param.h" extern const struct ia_css_dp_config default_dp_config; -#ifdef ISP2401 + +/* ISP2401 */ extern const struct ia_css_dp_config default_dp_10bpp_config; -#endif void ia_css_dp_encode( diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h index a47f7d438ad59..f8842dae943bb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h @@ -16,20 +16,13 @@ #define __IA_CSS_DVS_PARAM_H #include -#ifdef ISP2401 #if !defined(ENABLE_TPROXY) && !defined(ENABLE_CRUN_FOR_TD) && !defined(PARAMBIN_GENERATION) -#endif #include "dma.h" -#ifdef ISP2401 #endif /* !defined(ENABLE_TPROXY) && !defined(ENABLE_CRUN_FOR_TD) */ -#endif #include "uds/uds_1.0/ia_css_uds_param.h" -#ifdef ISP2401 - -#endif /* dvserence frame */ struct sh_css_isp_dvs_isp_config { u32 num_horizontal_blocks; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h index 82cb1f2c7dd79..adfd4b37171c0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h @@ -17,7 +17,7 @@ #include "type_support.h" -#ifdef ISP2401 +/* ISP2401 */ #define BDS_UNIT 8 #define FRAC_LOG 3 #define FRAC_ACC BIT(FRAC_LOG) @@ -25,7 +25,6 @@ #error "FRAC_ACC and BDS_UNIT need to be merged into one define" #endif -#endif struct sh_css_isp_bds_params { int baf_strength; }; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h index 8eb7affbd2262..33642f00ef0fd 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -27,4 +26,3 @@ ia_css_bayer_io_config( const struct sh_css_binary_args *args); #endif /*__BAYER_IO_HOST_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h index 7b6f581c4a803..9fe58b2c14be0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -19,4 +18,3 @@ #include "../common/ia_css_common_io_param.h" #endif /* __IA_CSS_BAYER_IO_PARAM */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h index 2291b01452f8a..c2a83361b298d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -19,4 +18,3 @@ #include "../common/ia_css_common_io_types.h" #endif /* __IA_CSS_BAYER_IO_TYPES_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h index f1ce03aa7951a..70e3600a03c3e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -19,4 +18,3 @@ #include "../common/ia_css_common_io_types.h" #endif /* __IA_CSS_COMMON_IO_PARAM */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h index aedf2d88f87cd..541555ee2c483 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -28,4 +27,3 @@ struct ia_css_common_io_config { }; #endif /* __IA_CSS_COMMON_IO_TYPES */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h index 91fb5168c357f..6258fb42cd5c9 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -19,4 +18,3 @@ #include "../common/ia_css_common_io_param.h" #endif -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h index dac4403093948..5d0c92a430ca6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -19,4 +18,3 @@ #include "../common/ia_css_common_io_types.h" #endif -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h index 42f2d1054afd4..31dcf394ffb65 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -27,4 +26,3 @@ ia_css_bayer_io_config( const struct sh_css_binary_args *args); #endif /*__BAYER_IO_HOST_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h index bf5a3eccb3307..ea9d3ab973994 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -19,4 +18,3 @@ more details. #include "../common/ia_css_common_io_param.h" #endif /* __IA_CSS_BAYER_IO_PARAM */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h index 9e3c622db4d42..1e234e81d0fd6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -19,4 +18,3 @@ more details. #include "../common/ia_css_common_io_types.h" #endif /* __IA_CSS_BAYER_IO_TYPES_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h index e5fdcfff0cf7b..22aedcc4470f5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -19,4 +18,3 @@ more details. #include "../common/ia_css_common_io_types.h" #endif /* __IA_CSS_COMMON_IO_PARAM */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h index 1a505049aa43c..e49bd95f77dac 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -28,4 +27,3 @@ struct ia_css_common_io_config { }; #endif /* __IA_CSS_COMMON_IO_TYPES */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h index b61d4a2311e7f..556e53e05607f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -27,4 +26,3 @@ ia_css_yuv444_io_config( const struct sh_css_binary_args *args); #endif /*__YUV44_IO_HOST_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h index cc8eda19c6e84..1cc2aff57ef31 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -19,4 +18,3 @@ more details. #include "../common/ia_css_common_io_param.h" #endif -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h index 343325a111e13..990299a0d2c78 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -19,4 +18,3 @@ more details. #include "../common/ia_css_common_io_types.h" #endif -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h index 4f3cb34d45130..efbe40b399ddc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h @@ -31,7 +31,6 @@ ia_css_sc_dump( const struct sh_css_isp_sc_params *sc, unsigned int level); -#ifdef ISP2401 /* @brief Configure the shading correction. * @param[out] to Parameters used in the shading correction kernel in the isp. * @param[in] from Parameters passed from the host. @@ -39,6 +38,7 @@ ia_css_sc_dump( * * This function passes the parameters for the shading correction from the host to the isp. */ +/* ISP2401 */ void ia_css_sc_config( struct sh_css_isp_sc_isp_config *to, @@ -57,13 +57,13 @@ ia_css_sc_config( * The ia_css_configure_sc() function calls the ia_css_sc_config() function * to pass the parameters for the shading correction from the host to the isp. */ +/* ISP2401 */ void ia_css_sc_configure( const struct ia_css_binary *binary, u32 internal_frame_origin_x_bqs_on_sctbl, uint32_t internal_frame_origin_y_bqs_on_sctbl); -#endif /* ------ deprecated(bz675) : from ------ */ void sh_css_get_shading_settings(const struct ia_css_isp_parameters *params, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h index 69e7ec7525c87..41f3ee7158ff7 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h @@ -117,12 +117,11 @@ struct ia_css_shading_settings { /* ------ deprecated(bz675) : to ------ */ -#ifdef ISP2401 - /* Shading Correction configuration. * * NOTE: The shading table size is larger than or equal to the internal frame size. */ +/* ISP2401 */ struct ia_css_sc_configuration { u32 internal_frame_origin_x_bqs_on_sctbl; /** Origin X (in bqs) of internal frame on shading table. */ u32 internal_frame_origin_y_bqs_on_sctbl; /** Origin Y (in bqs) of internal frame on shading table. */ @@ -131,6 +130,5 @@ struct ia_css_sc_configuration { Horizontal 1 bqs corresponds to horizontal 2 pixels. Vertical 1 bqs corresponds to vertical 2 pixels. */ }; -#endif #endif /* __IA_CSS_SC_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h index 37ac2e8b75df7..349f0800bbe6a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h @@ -1,4 +1,3 @@ -#ifdef ISP2401 /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -62,4 +61,3 @@ struct ia_css_tnr3_kernel_config { }; #endif -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h index f6b9e13105886..959533ec29c67 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h @@ -26,14 +26,13 @@ ia_css_xnr3_encode( const struct ia_css_xnr3_config *from, unsigned int size); -#ifdef ISP2401 +/* ISP2401 */ void ia_css_xnr3_vmem_encode( struct sh_css_isp_xnr3_vmem_params *to, const struct ia_css_xnr3_config *from, unsigned int size); -#endif void ia_css_xnr3_debug_dtrace( const struct ia_css_xnr3_config *config, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h index d6fda1326f09d..7d108669e19a8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h @@ -16,10 +16,7 @@ #define __IA_CSS_XNR3_PARAM_H #include "type_support.h" -#ifdef ISP2401 -#include "vmem.h" /* needed for VMEM_ARRAY */ - -#endif +#include "vmem.h" /* ISP2401: needed for VMEM_ARRAY */ /* Scaling factor of the alpha values: which fixed-point value represents 1.0? * It must be chosen such that 1/min_sigma still fits in an ISP vector @@ -70,7 +67,7 @@ struct sh_css_isp_xnr3_params { struct sh_css_xnr3_blending_params blending; }; -#ifdef ISP2401 +/* ISP2401 */ /* * STRUCT sh_css_isp_xnr3_vmem_params * ----------------------------------------------- @@ -83,5 +80,4 @@ struct sh_css_isp_xnr3_vmem_params { VMEM_ARRAY(c, ISP_VEC_NELEMS); }; -#endif #endif /*__IA_CSS_XNR3_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h index 490bef3ebe80a..e7941f9614d52 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h @@ -1,18 +1,3 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#else /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -26,7 +11,6 @@ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ -#endif #ifndef _INPUT_BUF_ISP_H_ #define _INPUT_BUF_ISP_H_ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h index 698e6438f36ef..fc392c7fb18b2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h @@ -1,18 +1,3 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#else /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -26,7 +11,6 @@ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ -#endif #ifndef _COMMON_ISP_CONST_H_ #define _COMMON_ISP_CONST_H_ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h index 05b76de36fe22..651fce4a1faa8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h @@ -1,18 +1,3 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#else /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -26,7 +11,6 @@ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ -#endif #ifndef _ISP_TYPES_H_ #define _ISP_TYPES_H_ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h index 40a0b4070c065..487078d934e24 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h @@ -1,18 +1,3 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#else /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -26,7 +11,6 @@ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ -#endif #ifndef _IA_CSS_BINARY_H_ #define _IA_CSS_BINARY_H_ @@ -107,10 +91,11 @@ struct ia_css_binary_descr { bool enable_xnr; bool enable_fractional_ds; bool enable_dpc; -#ifdef ISP2401 + + /* ISP2401 */ bool enable_luma_only; bool enable_tnr; -#endif + bool enable_capture_pp_bli; struct ia_css_resolution dvs_env; enum atomisp_input_format stream_format; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h index ee933302bbb83..5d23b2f57719d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h @@ -1,18 +1,3 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#else /** Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -26,7 +11,6 @@ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. */ -#endif #ifndef _IA_CSS_ISP_PARAM_TYPES_H_ #define _IA_CSS_ISP_PARAM_TYPES_H_ -- GitLab From 4dcf78197aed6495ceea43b34d1b30ac25427082 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 18:31:31 +0200 Subject: [PATCH 421/503] media: atomisp: get rid of unused header files Those 4 header files aren't used anyware. So, send them to the trash can. Signed-off-by: Mauro Carvalho Chehab --- .../css2400/css_2400_system/hrt/var.h | 54 ------------------ .../css2400/css_2401_csi2p_system/hrt/var.h | 56 ------------------- .../css2400/css_2401_system/hrt/var.h | 56 ------------------- .../css2400/hive_isp_css_include/socket.h | 46 --------------- 4 files changed, 212 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h deleted file mode 100644 index 778eb29b70181..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/var.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_VAR_H -#define _HRT_VAR_H - -#include "version.h" -#include "system_api.h" -#include "hive_types.h" - -#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) -#define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) -#define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) - -#define hrt_scalar_store(cell, type, var, data) \ - HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ - cell, \ - HRTCAT(HIVE_MEM_, var), \ - HRTCAT(HIVE_ADDR_, var), \ - (HRT_INT_TYPE(type))(data)) - -#define hrt_scalar_load(cell, type, var) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ - cell, \ - HRTCAT(HIVE_MEM_, var), \ - HRTCAT(HIVE_ADDR_, var))) - -#define hrt_indexed_store(cell, type, array, index, data) \ - HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ - cell, \ - HRTCAT(HIVE_MEM_, array), \ - (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)), \ - (HRT_INT_TYPE(type))(data)) - -#define hrt_indexed_load(cell, type, array, index) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ - cell, \ - HRTCAT(HIVE_MEM_, array), \ - (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) - -#endif /* _HRT_VAR_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h deleted file mode 100644 index 0790ab0f22333..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/var.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_VAR_H -#define _HRT_VAR_H - -#include "version.h" -#include "system_api.h" -#include "hive_types.h" - -#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) -#define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) -#define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) - - -#define hrt_scalar_store(cell, type, var, data) \ - HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ - cell, \ - HRTCAT(HIVE_MEM_, var), \ - HRTCAT(HIVE_ADDR_, var), \ - (HRT_INT_TYPE(type))(data)) - -#define hrt_scalar_load(cell, type, var) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ - cell, \ - HRTCAT(HIVE_MEM_, var), \ - HRTCAT(HIVE_ADDR_, var))) - -#define hrt_indexed_store(cell, type, array, index, data) \ - HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ - cell, \ - HRTCAT(HIVE_MEM_, array), \ - (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)), \ - (HRT_INT_TYPE(type))(data)) - -#define hrt_indexed_load(cell, type, array, index) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ - cell, \ - HRTCAT(HIVE_MEM_, array), \ - (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) - - -#endif /* _HRT_VAR_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h deleted file mode 100644 index 0790ab0f22333..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/var.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_VAR_H -#define _HRT_VAR_H - -#include "version.h" -#include "system_api.h" -#include "hive_types.h" - -#define HRT_TYPE_BYTES(cell, type) (HRT_TYPE_BITS(cell, type) / 8) -#define HRT_HOST_TYPE(cell_type) HRTCAT(hrt_host_type_of_, cell_type) -#define HRT_INT_TYPE(type) HRTCAT(hrt_int_type_of_, type) - - -#define hrt_scalar_store(cell, type, var, data) \ - HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ - cell, \ - HRTCAT(HIVE_MEM_, var), \ - HRTCAT(HIVE_ADDR_, var), \ - (HRT_INT_TYPE(type))(data)) - -#define hrt_scalar_load(cell, type, var) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ - cell, \ - HRTCAT(HIVE_MEM_, var), \ - HRTCAT(HIVE_ADDR_, var))) - -#define hrt_indexed_store(cell, type, array, index, data) \ - HRTCAT(hrt_mem_store_, HRT_TYPE_BITS(cell, type))(\ - cell, \ - HRTCAT(HIVE_MEM_, array), \ - (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)), \ - (HRT_INT_TYPE(type))(data)) - -#define hrt_indexed_load(cell, type, array, index) \ - (HRT_HOST_TYPE(type))(HRTCAT4(_hrt_mem_load_, HRT_PROC_TYPE(cell), _, type) ( \ - cell, \ - HRTCAT(HIVE_MEM_, array), \ - (HRTCAT(HIVE_ADDR_, array)) + ((index) * HRT_TYPE_BYTES(cell, type)))) - - -#endif /* _HRT_VAR_H */ -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h deleted file mode 100644 index 81942a5d9fa41..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/socket.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __SOCKET_H_INCLUDED__ -#define __SOCKET_H_INCLUDED__ - -/* - * This file is included on every cell {SP,ISP,host} and on every system - * that uses the DMA device. It defines the API to DLI bridge - * - * System and cell specific interfaces and inline code are included - * conditionally through Makefile path settings. - * - * - . system and cell agnostic interfaces, constants and identifiers - * - public: system agnostic, cell specific interfaces - * - private: system dependent, cell specific interfaces & inline implementations - * - global: system specific constants and identifiers - * - local: system and cell specific constants and identifiers - * - */ - -#include "system_local.h" -#include "socket_local.h" - -#ifndef __INLINE_SOCKET__ -#define STORAGE_CLASS_SOCKET_H extern -#define STORAGE_CLASS_SOCKET_C -#include "socket_public.h" -#else /* __INLINE_SOCKET__ */ -#define STORAGE_CLASS_SOCKET_H static inline -#define STORAGE_CLASS_SOCKET_C static inline -#include "socket_private.h" -#endif /* __INLINE_SOCKET__ */ - -#endif /* __SOCKET_H_INCLUDED__ */ -- GitLab From c8b1a84e38c2416ade54be662af036e99a9b2e91 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 22:25:02 +0200 Subject: [PATCH 422/503] media: atomisp: remove unused definitions at */isp_capture_defs.h The isp_capture_defs.h contain several unused defines. Get rid of some of them, making all 3 instances identical. Signed-off-by: Mauro Carvalho Chehab --- .../css_2400_system/hrt/isp_capture_defs.h | 18 ------------------ .../hrt/isp_capture_defs.h | 18 ------------------ .../css_2401_system/hrt/isp_capture_defs.h | 18 ------------------ 3 files changed, 54 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h index 8ac2060452220..5ab796e5a53f0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h @@ -21,10 +21,6 @@ #define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ #define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM -//#define CAPT_RCV_ACK 1 -//#define CAPT_WRT_ACK 2 -//#define CAPT_IRQ_ACK 3 - /* --------------------------------------------------*/ #define NOF_IRQS 2 @@ -57,10 +53,6 @@ // Register width #define CAPT_START_MODE_REG_WIDTH 1 -#define CAPT_START_ADDR_REG_WIDTH 9 -#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 -#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 -#define CAPT_INIT_REG_WIDTH (18 + 4) #define CAPT_START_REG_WIDTH 1 #define CAPT_STOP_REG_WIDTH 1 @@ -76,14 +68,10 @@ #define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 #define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 #define CAPT_LAST_COMMAND_REG_WIDTH 32 -/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ #define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) -#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 -#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 - /* register reset value */ #define CAPT_START_MODE_REG_RSTVAL 0 #define CAPT_START_ADDR_REG_RSTVAL 0 @@ -110,9 +98,6 @@ #define CAPT_INIT_RESYNC_BIT 2 #define CAPT_INIT_RESTART_BIT 3 #define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 -#define CAPT_INIT_RESTART_MEM_ADDR_MSB 12 -#define CAPT_INIT_RESTART_MEM_REGION_LSB 13 -#define CAPT_INIT_RESTART_MEM_REGION_MSB 21 #define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT #define CAPT_INIT_RST_REG_BITS 1 @@ -123,9 +108,6 @@ #define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT #define CAPT_INIT_RESTART_BITS 1 #define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB -#define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) -#define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB -#define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) /* --------------------------------------------------*/ /* TOKEN INFO */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h index 6c36d3b6f6810..5ab796e5a53f0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h @@ -21,10 +21,6 @@ #define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ #define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM -//#define CAPT_RCV_ACK 1 -//#define CAPT_WRT_ACK 2 -//#define CAPT_IRQ_ACK 3 - /* --------------------------------------------------*/ #define NOF_IRQS 2 @@ -57,10 +53,6 @@ // Register width #define CAPT_START_MODE_REG_WIDTH 1 -//#define CAPT_START_ADDR_REG_WIDTH 9 -//#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 -//#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 -#define CAPT_INIT_REG_WIDTH (22 + 4) #define CAPT_START_REG_WIDTH 1 #define CAPT_STOP_REG_WIDTH 1 @@ -76,14 +68,10 @@ #define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 #define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 #define CAPT_LAST_COMMAND_REG_WIDTH 32 -/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ #define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) -//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 -//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 - /* register reset value */ #define CAPT_START_MODE_REG_RSTVAL 0 #define CAPT_START_ADDR_REG_RSTVAL 0 @@ -110,9 +98,6 @@ #define CAPT_INIT_RESYNC_BIT 2 #define CAPT_INIT_RESTART_BIT 3 #define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 -#define CAPT_INIT_RESTART_MEM_ADDR_MSB 14 -#define CAPT_INIT_RESTART_MEM_REGION_LSB 15 -#define CAPT_INIT_RESTART_MEM_REGION_MSB 25 #define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT #define CAPT_INIT_RST_REG_BITS 1 @@ -123,9 +108,6 @@ #define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT #define CAPT_INIT_RESTART_BITS 1 #define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB -#define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) -#define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB -#define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) /* --------------------------------------------------*/ /* TOKEN INFO */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h index 6c36d3b6f6810..5ab796e5a53f0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h @@ -21,10 +21,6 @@ #define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ #define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM -//#define CAPT_RCV_ACK 1 -//#define CAPT_WRT_ACK 2 -//#define CAPT_IRQ_ACK 3 - /* --------------------------------------------------*/ #define NOF_IRQS 2 @@ -57,10 +53,6 @@ // Register width #define CAPT_START_MODE_REG_WIDTH 1 -//#define CAPT_START_ADDR_REG_WIDTH 9 -//#define CAPT_MEM_REGION_SIZE_REG_WIDTH 9 -//#define CAPT_NUM_MEM_REGIONS_REG_WIDTH 9 -#define CAPT_INIT_REG_WIDTH (22 + 4) #define CAPT_START_REG_WIDTH 1 #define CAPT_STOP_REG_WIDTH 1 @@ -76,14 +68,10 @@ #define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 #define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 #define CAPT_LAST_COMMAND_REG_WIDTH 32 -/* #define CAPT_NEXT_COMMAND_REG_WIDTH 32 */ #define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 #define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) -//#define CAPT_INIT_RESTART_MEM_ADDR_WIDTH 9 -//#define CAPT_INIT_RESTART_MEM_REGION_WIDTH 9 - /* register reset value */ #define CAPT_START_MODE_REG_RSTVAL 0 #define CAPT_START_ADDR_REG_RSTVAL 0 @@ -110,9 +98,6 @@ #define CAPT_INIT_RESYNC_BIT 2 #define CAPT_INIT_RESTART_BIT 3 #define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 -#define CAPT_INIT_RESTART_MEM_ADDR_MSB 14 -#define CAPT_INIT_RESTART_MEM_REGION_LSB 15 -#define CAPT_INIT_RESTART_MEM_REGION_MSB 25 #define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT #define CAPT_INIT_RST_REG_BITS 1 @@ -123,9 +108,6 @@ #define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT #define CAPT_INIT_RESTART_BITS 1 #define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB -#define CAPT_INIT_RESTART_MEM_ADDR_BITS (CAPT_INIT_RESTART_MEM_ADDR_MSB - CAPT_INIT_RESTART_MEM_ADDR_LSB + 1) -#define CAPT_INIT_RESTART_MEM_REGION_IDX CAPT_INIT_RESTART_MEM_REGION_LSB -#define CAPT_INIT_RESTART_MEM_REGION_BITS (CAPT_INIT_RESTART_MEM_REGION_MSB - CAPT_INIT_RESTART_MEM_REGION_LSB + 1) /* --------------------------------------------------*/ /* TOKEN INFO */ -- GitLab From 7c2b6c1e3456acfb2dc3ed6fe3d7e3f64324358b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 18:38:04 +0200 Subject: [PATCH 423/503] media: atomisp: remove several duplicated files Those files have identical contents, but are located at different parts of the driver. As their contents are identical, we can simply remove them. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/atomisp_cmd.c | 2 +- .../css2400/{css_2400_system/hrt => }/bits.h | 0 .../{css_2400_system/hrt => }/cell_params.h | 0 .../ia_css_isp_configs.h | 190 --------- .../ia_css_isp_params.h | 394 ------------------ .../ia_css_isp_states.h | 73 ---- .../css_2401_csi2p_system/host/system_local.h | 2 +- .../css2400/css_2401_csi2p_system/hrt/bits.h | 104 ----- .../css_2401_csi2p_system/hrt/cell_params.h | 40 -- .../hrt/css_receiver_2400_common_defs.h | 198 --------- .../hrt/css_receiver_2400_defs.h | 256 ------------ .../css2400/css_2401_csi2p_system/hrt/defs.h | 36 -- .../css_2401_csi2p_system/hrt/dma_v2_defs.h | 199 --------- .../css_2401_csi2p_system/hrt/gdc_v2_defs.h | 163 -------- .../css_2401_csi2p_system/hrt/gp_timer_defs.h | 36 -- .../hrt/gpio_block_defs.h | 41 -- ...hive_isp_css_streaming_to_mipi_types_hrt.h | 26 -- .../css_2401_csi2p_system/hrt/hive_types.h | 128 ------ .../css_2401_csi2p_system/hrt/if_defs.h | 22 - .../hrt/input_formatter_subsystem_defs.h | 53 --- .../hrt/input_selector_defs.h | 88 ---- .../hrt/input_switch_2400_defs.h | 30 -- .../hrt/input_system_ctrl_defs.h | 243 ----------- .../hrt/input_system_defs.h | 126 ------ .../hrt/irq_controller_defs.h | 28 -- .../hrt/isp2400_support.h | 38 -- .../hrt/isp_acquisition_defs.h | 229 ---------- .../hrt/isp_capture_defs.h | 278 ------------ .../css_2401_csi2p_system/hrt/mmu_defs.h | 23 - .../hrt/scalar_processor_2400_params.h | 20 - .../css_2401_csi2p_system/hrt/str2mem_defs.h | 39 -- .../hrt/streaming_to_mipi_defs.h | 28 -- .../hrt/timed_controller_defs.h | 22 - .../css_2401_csi2p_system/hrt/version.h | 20 - .../ia_css_isp_configs.h | 190 --------- .../ia_css_isp_params.h | 394 ------------------ .../ia_css_isp_states.h | 73 ---- .../css2400/css_2401_system/hrt/bits.h | 104 ----- .../css2400/css_2401_system/hrt/cell_params.h | 40 -- .../hrt/css_receiver_2400_common_defs.h | 198 --------- .../hrt/css_receiver_2400_defs.h | 256 ------------ .../css2400/css_2401_system/hrt/defs.h | 36 -- .../css2400/css_2401_system/hrt/dma_v2_defs.h | 199 --------- .../css2400/css_2401_system/hrt/gdc_v2_defs.h | 163 -------- .../css_2401_system/hrt/gp_timer_defs.h | 36 -- .../css_2401_system/hrt/gpio_block_defs.h | 41 -- ...hive_isp_css_streaming_to_mipi_types_hrt.h | 26 -- .../css2400/css_2401_system/hrt/hive_types.h | 128 ------ .../css2400/css_2401_system/hrt/if_defs.h | 22 - .../hrt/input_formatter_subsystem_defs.h | 53 --- .../css_2401_system/hrt/input_selector_defs.h | 88 ---- .../hrt/input_switch_2400_defs.h | 30 -- .../hrt/input_system_ctrl_defs.h | 243 ----------- .../css_2401_system/hrt/input_system_defs.h | 126 ------ .../css_2401_system/hrt/irq_controller_defs.h | 28 -- .../css_2401_system/hrt/isp2400_support.h | 38 -- .../hrt/isp2401_mamoiada_params.h | 254 ----------- .../hrt/isp_acquisition_defs.h | 229 ---------- .../css_2401_system/hrt/isp_capture_defs.h | 278 ------------ .../css2400/css_2401_system/hrt/mmu_defs.h | 23 - .../hrt/scalar_processor_2400_params.h | 20 - .../css_2401_system/hrt/str2mem_defs.h | 39 -- .../hrt/streaming_to_mipi_defs.h | 28 -- .../hrt/timed_controller_defs.h | 22 - .../css2400/css_2401_system/hrt/version.h | 20 - .../hrt => }/css_receiver_2400_common_defs.h | 0 .../hrt => }/css_receiver_2400_defs.h | 0 .../css2400/{css_2400_system/hrt => }/defs.h | 0 .../{css_2400_system/hrt => }/dma_v2_defs.h | 0 .../{css_2400_system/hrt => }/gdc_v2_defs.h | 0 .../{css_2400_system/hrt => }/gp_timer_defs.h | 0 .../hrt => }/gpio_block_defs.h | 0 .../hive_isp_css_common/host/dma_local.h | 4 +- .../host/event_fifo_private.h | 2 +- .../hive_isp_css_common/host/fifo_monitor.c | 2 +- .../hive_isp_css_common/host/system_local.h | 4 +- .../hive_isp_css_common/timed_ctrl_global.h | 2 +- ...hive_isp_css_streaming_to_mipi_types_hrt.h | 0 .../{css_2400_system/hrt => }/hive_types.h | 0 .../ia_css_isp_configs.h | 0 .../ia_css_isp_params.h | 0 .../ia_css_isp_states.h | 0 .../{css_2400_system/hrt => }/if_defs.h | 0 .../hrt => }/input_formatter_subsystem_defs.h | 0 .../hrt => }/input_selector_defs.h | 0 .../hrt => }/input_switch_2400_defs.h | 0 .../hrt => }/input_system_ctrl_defs.h | 0 .../hrt => }/input_system_defs.h | 0 .../hrt => }/irq_controller_defs.h | 0 .../hrt => }/isp2400_support.h | 0 .../hrt => }/isp2401_mamoiada_params.h | 0 .../hrt => }/isp_acquisition_defs.h | 0 .../hrt => }/isp_capture_defs.h | 0 .../{css_2400_system/hrt => }/mmu_defs.h | 0 .../hrt => }/scalar_processor_2400_params.h | 0 .../{css_2400_system/hrt => }/str2mem_defs.h | 0 .../hrt => }/streaming_to_mipi_defs.h | 0 .../hrt => }/timed_controller_defs.h | 0 .../{css_2400_system/hrt => }/version.h | 0 99 files changed, 9 insertions(+), 6605 deletions(-) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/bits.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/cell_params.h (100%) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gp_timer_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/if_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mmu_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/scalar_processor_2400_params.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/str2mem_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/streaming_to_mipi_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/version.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gp_timer_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/if_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/mmu_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/scalar_processor_2400_params.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/str2mem_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/streaming_to_mipi_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/version.h rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/css_receiver_2400_common_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/css_receiver_2400_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/dma_v2_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/gdc_v2_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/gp_timer_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/gpio_block_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/hive_isp_css_streaming_to_mipi_types_hrt.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/hive_types.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated => }/ia_css_isp_configs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated => }/ia_css_isp_params.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hive_isp_css_2400_system_generated => }/ia_css_isp_states.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/if_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/input_formatter_subsystem_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/input_selector_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/input_switch_2400_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/input_system_ctrl_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/input_system_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/irq_controller_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/isp2400_support.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/hrt => }/isp2401_mamoiada_params.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/isp_acquisition_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/isp_capture_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/mmu_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/scalar_processor_2400_params.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/str2mem_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/streaming_to_mipi_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/timed_controller_defs.h (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/version.h (100%) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index 4fc65c745fa59..98074609e7ec6 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -58,7 +58,7 @@ #include "ia_css_types.h" #include "ia_css_stream.h" #include "error_support.h" -#include "hrt/bits.h" +#include "bits.h" /* We should never need to run the flash for more than 2 frames. * At 15fps this means 133ms. We set the timeout a bit longer. diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/bits.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/bits.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/bits.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/cell_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/cell_params.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/cell_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h deleted file mode 100644 index c39322d72caef..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifdef IA_CSS_INCLUDE_CONFIGURATIONS -#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" -#include "isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h" -#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" -#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" -#include "isp/kernels/output/output_1.0/ia_css_output.host.h" -#include "isp/kernels/qplane/qplane_2/ia_css_qplane.host.h" -#include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" -#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" -#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -/* ISP2401 */ -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" - -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" -#include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" -#include "isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h" -#endif /* IA_CSS_INCLUDE_CONFIGURATIONS */ -/* Generated code: do not edit or commmit. */ - -#ifndef _IA_CSS_ISP_CONFIG_H -#define _IA_CSS_ISP_CONFIG_H - -/* Code generated by genparam/gencode.c:gen_param_enum() */ - -enum ia_css_configuration_ids { - IA_CSS_ITERATOR_CONFIG_ID, - IA_CSS_COPY_OUTPUT_CONFIG_ID, - IA_CSS_CROP_CONFIG_ID, - IA_CSS_FPN_CONFIG_ID, - IA_CSS_DVS_CONFIG_ID, - IA_CSS_QPLANE_CONFIG_ID, - IA_CSS_OUTPUT0_CONFIG_ID, - IA_CSS_OUTPUT1_CONFIG_ID, - IA_CSS_OUTPUT_CONFIG_ID, - IA_CSS_RAW_CONFIG_ID, - IA_CSS_TNR_CONFIG_ID, - IA_CSS_REF_CONFIG_ID, - IA_CSS_VF_CONFIG_ID, - - /* ISP2401 */ - IA_CSS_SC_CONFIG_ID, - - IA_CSS_NUM_CONFIGURATION_IDS -}; - -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - -struct ia_css_config_memory_offsets { - struct { - struct ia_css_isp_parameter iterator; - struct ia_css_isp_parameter copy_output; - struct ia_css_isp_parameter crop; - struct ia_css_isp_parameter fpn; - struct ia_css_isp_parameter dvs; - struct ia_css_isp_parameter qplane; - struct ia_css_isp_parameter output0; - struct ia_css_isp_parameter output1; - struct ia_css_isp_parameter output; - - /* ISP2401 */ - struct ia_css_isp_parameter sc; - - struct ia_css_isp_parameter raw; - struct ia_css_isp_parameter tnr; - struct ia_css_isp_parameter ref; - struct ia_css_isp_parameter vf; - } dmem; -}; - -#if defined(IA_CSS_INCLUDE_CONFIGURATIONS) - -#include "ia_css_stream.h" /* struct ia_css_stream */ -#include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -/* ISP2401 */ -void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem); - -#endif /* IA_CSS_INCLUDE_CONFIGURATION */ - -#endif /* _IA_CSS_ISP_CONFIG_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h deleted file mode 100644 index 369dc41dae5fe..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h +++ /dev/null @@ -1,394 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#ifndef _IA_CSS_ISP_PARAM_H -#define _IA_CSS_ISP_PARAM_H - -/* Code generated by genparam/gencode.c:gen_param_enum() */ - -enum ia_css_parameter_ids { - IA_CSS_AA_ID, - IA_CSS_ANR_ID, - IA_CSS_ANR2_ID, - IA_CSS_BH_ID, - IA_CSS_CNR_ID, - IA_CSS_CROP_ID, - IA_CSS_CSC_ID, - IA_CSS_DP_ID, - IA_CSS_BNR_ID, - IA_CSS_DE_ID, - IA_CSS_ECD_ID, - IA_CSS_FORMATS_ID, - IA_CSS_FPN_ID, - IA_CSS_GC_ID, - IA_CSS_CE_ID, - IA_CSS_YUV2RGB_ID, - IA_CSS_RGB2YUV_ID, - IA_CSS_R_GAMMA_ID, - IA_CSS_G_GAMMA_ID, - IA_CSS_B_GAMMA_ID, - IA_CSS_UDS_ID, - IA_CSS_RAA_ID, - IA_CSS_S3A_ID, - IA_CSS_OB_ID, - IA_CSS_OUTPUT_ID, - IA_CSS_SC_ID, - IA_CSS_BDS_ID, - IA_CSS_TNR_ID, - IA_CSS_MACC_ID, - IA_CSS_SDIS_HORICOEF_ID, - IA_CSS_SDIS_VERTCOEF_ID, - IA_CSS_SDIS_HORIPROJ_ID, - IA_CSS_SDIS_VERTPROJ_ID, - IA_CSS_SDIS2_HORICOEF_ID, - IA_CSS_SDIS2_VERTCOEF_ID, - IA_CSS_SDIS2_HORIPROJ_ID, - IA_CSS_SDIS2_VERTPROJ_ID, - IA_CSS_WB_ID, - IA_CSS_NR_ID, - IA_CSS_YEE_ID, - IA_CSS_YNR_ID, - IA_CSS_FC_ID, - IA_CSS_CTC_ID, - IA_CSS_XNR_TABLE_ID, - IA_CSS_XNR_ID, - IA_CSS_XNR3_ID, - IA_CSS_NUM_PARAMETER_IDS -}; - -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - -struct ia_css_memory_offsets { - struct { - struct ia_css_isp_parameter aa; - struct ia_css_isp_parameter anr; - struct ia_css_isp_parameter bh; - struct ia_css_isp_parameter cnr; - struct ia_css_isp_parameter crop; - struct ia_css_isp_parameter csc; - struct ia_css_isp_parameter dp; - struct ia_css_isp_parameter bnr; - struct ia_css_isp_parameter de; - struct ia_css_isp_parameter ecd; - struct ia_css_isp_parameter formats; - struct ia_css_isp_parameter fpn; - struct ia_css_isp_parameter gc; - struct ia_css_isp_parameter ce; - struct ia_css_isp_parameter yuv2rgb; - struct ia_css_isp_parameter rgb2yuv; - struct ia_css_isp_parameter uds; - struct ia_css_isp_parameter raa; - struct ia_css_isp_parameter s3a; - struct ia_css_isp_parameter ob; - struct ia_css_isp_parameter output; - struct ia_css_isp_parameter sc; - struct ia_css_isp_parameter bds; - struct ia_css_isp_parameter tnr; - struct ia_css_isp_parameter macc; - struct ia_css_isp_parameter sdis_horiproj; - struct ia_css_isp_parameter sdis_vertproj; - struct ia_css_isp_parameter sdis2_horiproj; - struct ia_css_isp_parameter sdis2_vertproj; - struct ia_css_isp_parameter wb; - struct ia_css_isp_parameter nr; - struct ia_css_isp_parameter yee; - struct ia_css_isp_parameter ynr; - struct ia_css_isp_parameter fc; - struct ia_css_isp_parameter ctc; - struct ia_css_isp_parameter xnr; - struct ia_css_isp_parameter xnr3; - struct ia_css_isp_parameter get; - struct ia_css_isp_parameter put; - } dmem; - struct { - struct ia_css_isp_parameter anr2; - struct ia_css_isp_parameter ob; - struct ia_css_isp_parameter sdis_horicoef; - struct ia_css_isp_parameter sdis_vertcoef; - struct ia_css_isp_parameter sdis2_horicoef; - struct ia_css_isp_parameter sdis2_vertcoef; - - /* ISP2401 */ - struct ia_css_isp_parameter xnr3; - } vmem; - struct { - struct ia_css_isp_parameter bh; - } hmem0; - struct { - struct ia_css_isp_parameter gc; - struct ia_css_isp_parameter g_gamma; - struct ia_css_isp_parameter xnr_table; - } vamem1; - struct { - struct ia_css_isp_parameter r_gamma; - struct ia_css_isp_parameter ctc; - } vamem0; - struct { - struct ia_css_isp_parameter b_gamma; - } vamem2; -}; - -#if defined(IA_CSS_INCLUDE_PARAMETERS) - -#include "ia_css_stream.h" /* struct ia_css_stream */ -#include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/gencode.c:gen_param_process_table() */ - -struct ia_css_pipeline_stage; /* forward declaration */ - -extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config); - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -; - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -; -#endif /* IA_CSS_INCLUDE_PARAMETER */ - -#endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h deleted file mode 100644 index cc9cdcd0e2be8..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#define IA_CSS_INCLUDE_STATES -#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" -#include "isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h" -#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" -#include "isp/kernels/de/de_1.0/ia_css_de.host.h" -#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" -#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" -#include "isp/kernels/dpc2/ia_css_dpc2.host.h" -#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" -/* Generated code: do not edit or commmit. */ - -#ifndef _IA_CSS_ISP_STATE_H -#define _IA_CSS_ISP_STATE_H - -/* Code generated by genparam/gencode.c:gen_param_enum() */ - -enum ia_css_state_ids { - IA_CSS_AA_STATE_ID, - IA_CSS_CNR_STATE_ID, - IA_CSS_CNR2_STATE_ID, - IA_CSS_DP_STATE_ID, - IA_CSS_DE_STATE_ID, - IA_CSS_TNR_STATE_ID, - IA_CSS_REF_STATE_ID, - IA_CSS_YNR_STATE_ID, - IA_CSS_NUM_STATE_IDS -}; - -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - -struct ia_css_state_memory_offsets { - struct { - struct ia_css_isp_parameter aa; - struct ia_css_isp_parameter cnr; - struct ia_css_isp_parameter cnr2; - struct ia_css_isp_parameter dp; - struct ia_css_isp_parameter de; - struct ia_css_isp_parameter ynr; - } vmem; - struct { - struct ia_css_isp_parameter tnr; - struct ia_css_isp_parameter ref; - } dmem; -}; - -#if defined(IA_CSS_INCLUDE_STATES) - -#include "ia_css_stream.h" /* struct ia_css_stream */ -#include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/genstate.c:gen_state_init_table() */ - -extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( - const struct ia_css_binary *binary); - -#endif /* IA_CSS_INCLUDE_STATE */ - -#endif /* _IA_CSS_ISP_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h index f88580a7aab47..4bd95b8184944 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h @@ -28,7 +28,7 @@ #define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ /* This interface is deprecated */ -#include "hrt/hive_types.h" +#include "hive_types.h" /* * Cell specific address maps diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h deleted file mode 100644 index c6d2a5cba2134..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/bits.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_BITS_H -#define _HRT_BITS_H - -#include "defs.h" - -#define _hrt_ones(n) HRTCAT(_hrt_ones_, n) -#define _hrt_ones_0x0 0x00000000U -#define _hrt_ones_0x1 0x00000001U -#define _hrt_ones_0x2 0x00000003U -#define _hrt_ones_0x3 0x00000007U -#define _hrt_ones_0x4 0x0000000FU -#define _hrt_ones_0x5 0x0000001FU -#define _hrt_ones_0x6 0x0000003FU -#define _hrt_ones_0x7 0x0000007FU -#define _hrt_ones_0x8 0x000000FFU -#define _hrt_ones_0x9 0x000001FFU -#define _hrt_ones_0xA 0x000003FFU -#define _hrt_ones_0xB 0x000007FFU -#define _hrt_ones_0xC 0x00000FFFU -#define _hrt_ones_0xD 0x00001FFFU -#define _hrt_ones_0xE 0x00003FFFU -#define _hrt_ones_0xF 0x00007FFFU -#define _hrt_ones_0x10 0x0000FFFFU -#define _hrt_ones_0x11 0x0001FFFFU -#define _hrt_ones_0x12 0x0003FFFFU -#define _hrt_ones_0x13 0x0007FFFFU -#define _hrt_ones_0x14 0x000FFFFFU -#define _hrt_ones_0x15 0x001FFFFFU -#define _hrt_ones_0x16 0x003FFFFFU -#define _hrt_ones_0x17 0x007FFFFFU -#define _hrt_ones_0x18 0x00FFFFFFU -#define _hrt_ones_0x19 0x01FFFFFFU -#define _hrt_ones_0x1A 0x03FFFFFFU -#define _hrt_ones_0x1B 0x07FFFFFFU -#define _hrt_ones_0x1C 0x0FFFFFFFU -#define _hrt_ones_0x1D 0x1FFFFFFFU -#define _hrt_ones_0x1E 0x3FFFFFFFU -#define _hrt_ones_0x1F 0x7FFFFFFFU -#define _hrt_ones_0x20 0xFFFFFFFFU - -#define _hrt_ones_0 _hrt_ones_0x0 -#define _hrt_ones_1 _hrt_ones_0x1 -#define _hrt_ones_2 _hrt_ones_0x2 -#define _hrt_ones_3 _hrt_ones_0x3 -#define _hrt_ones_4 _hrt_ones_0x4 -#define _hrt_ones_5 _hrt_ones_0x5 -#define _hrt_ones_6 _hrt_ones_0x6 -#define _hrt_ones_7 _hrt_ones_0x7 -#define _hrt_ones_8 _hrt_ones_0x8 -#define _hrt_ones_9 _hrt_ones_0x9 -#define _hrt_ones_10 _hrt_ones_0xA -#define _hrt_ones_11 _hrt_ones_0xB -#define _hrt_ones_12 _hrt_ones_0xC -#define _hrt_ones_13 _hrt_ones_0xD -#define _hrt_ones_14 _hrt_ones_0xE -#define _hrt_ones_15 _hrt_ones_0xF -#define _hrt_ones_16 _hrt_ones_0x10 -#define _hrt_ones_17 _hrt_ones_0x11 -#define _hrt_ones_18 _hrt_ones_0x12 -#define _hrt_ones_19 _hrt_ones_0x13 -#define _hrt_ones_20 _hrt_ones_0x14 -#define _hrt_ones_21 _hrt_ones_0x15 -#define _hrt_ones_22 _hrt_ones_0x16 -#define _hrt_ones_23 _hrt_ones_0x17 -#define _hrt_ones_24 _hrt_ones_0x18 -#define _hrt_ones_25 _hrt_ones_0x19 -#define _hrt_ones_26 _hrt_ones_0x1A -#define _hrt_ones_27 _hrt_ones_0x1B -#define _hrt_ones_28 _hrt_ones_0x1C -#define _hrt_ones_29 _hrt_ones_0x1D -#define _hrt_ones_30 _hrt_ones_0x1E -#define _hrt_ones_31 _hrt_ones_0x1F -#define _hrt_ones_32 _hrt_ones_0x20 - -#define _hrt_mask(b, n) \ - (_hrt_ones(n) << (b)) -#define _hrt_get_bits(w, b, n) \ - (((w) >> (b)) & _hrt_ones(n)) -#define _hrt_set_bits(w, b, n, v) \ - (((w) & ~_hrt_mask(b, n)) | (((v) & _hrt_ones(n)) << (b))) -#define _hrt_get_bit(w, b) \ - (((w) >> (b)) & 1) -#define _hrt_set_bit(w, b, v) \ - (((w) & (~(1 << (b)))) | (((v) & 1) << (b))) -#define _hrt_set_lower_half(w, v) \ - _hrt_set_bits(w, 0, 16, v) -#define _hrt_set_upper_half(w, v) \ - _hrt_set_bits(w, 16, 16, v) - -#endif /* _HRT_BITS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h deleted file mode 100644 index 0eabc59ff5afb..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/cell_params.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _cell_params_h -#define _cell_params_h - -#define SP_PMEM_LOG_WIDTH_BITS 6 /*Width of PC, 64 bits, 8 bytes*/ -#define SP_ICACHE_TAG_BITS 4 /*size of tag*/ -#define SP_ICACHE_SET_BITS 8 /* 256 sets*/ -#define SP_ICACHE_BLOCKS_PER_SET_BITS 1 /* 2 way associative*/ -#define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ - -#define SP_ICACHE_ADDRESS_BITS \ - (SP_ICACHE_TAG_BITS + SP_ICACHE_BLOCK_ADDRESS_BITS) - -#define SP_PMEM_DEPTH BIT(SP_ICACHE_ADDRESS_BITS) - -#define SP_FIFO_0_DEPTH 0 -#define SP_FIFO_1_DEPTH 0 -#define SP_FIFO_2_DEPTH 0 -#define SP_FIFO_3_DEPTH 0 -#define SP_FIFO_4_DEPTH 0 -#define SP_FIFO_5_DEPTH 0 -#define SP_FIFO_6_DEPTH 0 -#define SP_FIFO_7_DEPTH 0 - -#define SP_SLV_BUS_MAXBURSTSIZE 1 - -#endif /* _cell_params_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h deleted file mode 100644 index 99d292164efca..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_common_defs.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _css_receiver_2400_common_defs_h_ -#define _css_receiver_2400_common_defs_h_ -#ifndef _mipi_backend_common_defs_h_ -#define _mipi_backend_common_defs_h_ - -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH 16 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH 2 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH 3 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH (_HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_WIDTH 32 /* use 32 to be compatibel with streaming monitor !, MSB's of interface are tied to '0' */ - -/* Definition of data format ID at the interface CSS_receiver capture/acquisition units */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10 25 /* 01 1001 YUV420 10-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8L 26 /* 01 1010 YUV420 8-bit legacy */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_8 30 /* 01 1110 YUV422 8-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_10 31 /* 01 1111 YUV422 10-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB444 32 /* 10 0000 RGB444 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB555 33 /* 10 0001 RGB555 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB565 34 /* 10 0010 RGB565 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB666 35 /* 10 0011 RGB666 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB888 36 /* 10 0100 RGB888 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW6 40 /* 10 1000 RAW6 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW7 41 /* 10 1001 RAW7 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW8 42 /* 10 1010 RAW8 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW10 43 /* 10 1011 RAW10 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW12 44 /* 10 1100 RAW12 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW14 45 /* 10 1101 RAW14 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_1 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_2 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_3 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_4 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_5 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_6 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_7 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_8 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_Emb 18 /* 01 0010 embedded eight bit non image data */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_SOF 0 /* 00 0000 frame start */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_EOF 1 /* 00 0001 frame end */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_SOL 2 /* 00 0010 line start */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_EOL 3 /* 00 0011 line end */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH1 8 /* 00 1000 Generic Short Packet Code 1 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH2 9 /* 00 1001 Generic Short Packet Code 2 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH3 10 /* 00 1010 Generic Short Packet Code 3 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH4 11 /* 00 1011 Generic Short Packet Code 4 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH5 12 /* 00 1100 Generic Short Packet Code 5 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH6 13 /* 00 1101 Generic Short Packet Code 6 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH7 14 /* 00 1110 Generic Short Packet Code 7 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -/* used reserved mipi positions for these */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_3 38 - -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_WIDTH 6 - -/* Definition of format_types at the interface CSS --> input_selector*/ -/* !! Changes here should be copied to systems/isp/isp_css/bin/conv_transmitter_cmd.tcl !! */ -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB888 0 // 36 'h24 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB555 1 // 33 'h -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB444 2 // 32 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB565 3 // 34 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB666 4 // 35 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW10 6 // 43 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW6 7 // 40 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW7 8 // 41 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW12 9 // 43 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW14 10 // 45 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8 11 // 30 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10 12 // 25 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_8 13 // 30 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_10 14 // 31 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_1 15 // 48 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8L 16 // 26 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_Emb 17 // 18 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_2 18 // 49 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_3 19 // 50 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_4 20 // 51 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_5 21 // 52 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_6 22 // 53 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_7 23 // 54 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_8 24 // 55 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8_CSPS 25 // 28 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10_CSPS 26 // 29 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW16 27 // ? -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18 28 // ? -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_2 29 // ? Option 2 for depacketiser -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_3 30 // ? Option 3 for depacketiser -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding - -/* definition for state machine of data FIFO for decode different type of data */ -#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_YUV420_10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_YUV420_8L_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_YUV422_8_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_YUV422_10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 -#define _HRT_CSS_RECEIVER_2400_RGB555_REPEAT_PTN 2 -#define _HRT_CSS_RECEIVER_2400_RGB565_REPEAT_PTN 2 -#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 -#define _HRT_CSS_RECEIVER_2400_RGB888_REPEAT_PTN 3 -#define _HRT_CSS_RECEIVER_2400_RAW6_REPEAT_PTN 3 -#define _HRT_CSS_RECEIVER_2400_RAW7_REPEAT_PTN 7 -#define _HRT_CSS_RECEIVER_2400_RAW8_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_RAW10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 -#define _HRT_CSS_RECEIVER_2400_RAW14_REPEAT_PTN 7 - -#define _HRT_CSS_RECEIVER_2400_MAX_REPEAT_PTN _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN - -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_WIDTH 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_IDX 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_WIDTH 1 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_USD_BITS 4 /* bits per USD type */ - -#define _HRT_CSS_RECEIVER_2400_BE_RAW16_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_RAW16_EN_IDX 6 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_OPTION_IDX 6 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_EN_IDX 8 - -#define _HRT_CSS_RECEIVER_2400_BE_COMP_NO_COMP 0 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_6_10 1 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_7_10 2 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_8_10 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_6_12 4 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_7_12 5 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_8_12 6 - -/* packet bit definition */ -#define _HRT_CSS_RECEIVER_2400_PKT_SOP_IDX 32 -#define _HRT_CSS_RECEIVER_2400_PKT_SOP_BITS 1 -#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_IDX 22 -#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_BITS 2 -#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_IDX 16 -#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_BITS 6 -#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_IDX 0 -#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_BITS 16 -#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_IDX 0 -#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_BITS 32 - -/*************************************************************************************************/ -/* Custom Decoding */ -/* These Custom Defs are defined based on design-time config in "csi_be_pixel_formatter.chdl" !! */ -/*************************************************************************************************/ -#define BE_CUST_EN_IDX 0 /* 2bits */ -#define BE_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ -#define BE_CUST_EN_WIDTH 8 -#define BE_CUST_MODE_ALL 1 /* Enable Custom Decoding for all DATA IDs */ -#define BE_CUST_MODE_ONE 3 /* Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID */ - -/* Data State config = {get_bits(6bits), valid(1bit)} */ -#define BE_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ -#define BE_CUST_DATA_STATE_S1_IDX 7 /* 7bits */ -#define BE_CUST_DATA_STATE_S2_IDX 14 /* 7bits */ -#define BE_CUST_DATA_STATE_WIDTH 21 -#define BE_CUST_DATA_STATE_VALID_IDX 0 /* 1bits */ -#define BE_CUST_DATA_STATE_GETBITS_IDX 1 /* 6bits */ - -/* Pixel Extractor config */ -#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 /* 5bits */ -#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 5 /* 5bits */ -#define BE_CUST_PIX_EXT_PIX_MASK_IDX 10 /* 18bits */ -#define BE_CUST_PIX_EXT_PIX_EN_IDX 28 /* 1bits */ -#define BE_CUST_PIX_EXT_WIDTH 29 - -/* Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} */ -#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_WIDTH 16 -#define BE_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 /* Normal (NO less get_bits case) Valid - 1bits */ -#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 /* Normal (NO less get_bits case) EoP - 1bits */ -#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 /* Especial (less get_bits case) Valid - 1bits */ -#define BE_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 /* Especial (less get_bits case) EoP - 1bits */ - -#endif /* _mipi_backend_common_defs_h_ */ -#endif /* _css_receiver_2400_common_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_defs.h deleted file mode 100644 index f4b2b41b6d943..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/css_receiver_2400_defs.h +++ /dev/null @@ -1,256 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _css_receiver_2400_defs_h_ -#define _css_receiver_2400_defs_h_ - -#include "css_receiver_2400_common_defs.h" - -#define CSS_RECEIVER_DATA_WIDTH 8 -#define CSS_RECEIVER_RX_TRIG 4 -#define CSS_RECEIVER_RF_WORD 32 -#define CSS_RECEIVER_IMG_PROC_RF_ADDR 10 -#define CSS_RECEIVER_CSI_RF_ADDR 4 -#define CSS_RECEIVER_DATA_OUT 12 -#define CSS_RECEIVER_CHN_NO 2 -#define CSS_RECEIVER_DWORD_CNT 11 -#define CSS_RECEIVER_FORMAT_TYP 5 -#define CSS_RECEIVER_HRESPONSE 2 -#define CSS_RECEIVER_STATE_WIDTH 3 -#define CSS_RECEIVER_FIFO_DAT 32 -#define CSS_RECEIVER_CNT_VAL 2 -#define CSS_RECEIVER_PRED10_VAL 10 -#define CSS_RECEIVER_PRED12_VAL 12 -#define CSS_RECEIVER_CNT_WIDTH 8 -#define CSS_RECEIVER_WORD_CNT 16 -#define CSS_RECEIVER_PIXEL_LEN 6 -#define CSS_RECEIVER_PIXEL_CNT 5 -#define CSS_RECEIVER_COMP_8_BIT 8 -#define CSS_RECEIVER_COMP_7_BIT 7 -#define CSS_RECEIVER_COMP_6_BIT 6 - -#define CSI_CONFIG_WIDTH 4 - -/* division of gen_short data, ch_id and fmt_type over streaming data interface */ -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB 0 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB - 1) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB - 1) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH - 1) - -#define _HRT_CSS_RECEIVER_2400_REG_ALIGN 4 -#define _HRT_CSS_RECEIVER_2400_BYTES_PER_PKT 4 - -#define hrt_css_receiver_2400_4_lane_port_offset 0x100 -#define hrt_css_receiver_2400_1_lane_port_offset 0x200 -#define hrt_css_receiver_2400_2_lane_port_offset 0x300 -#define hrt_css_receiver_2400_backend_port_offset 0x100 - -#define _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX 0 -#define _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX 1 -#define _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX 2 -#define _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX 3 -#define _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX 4 -#define _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX 7 -#define _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX 8 -#define _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX 9 -#define _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX 10 -#define _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX 11 -#define _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX 12 -#define _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX 13 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX 14 -#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX 15 -#define _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX 16 -#define _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX 17 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX 18 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX 19 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX 20 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX 21 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX 22 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX 23 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX 24 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX 25 -#define _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX 26 -#define _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX 27 -#define _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX 28 - -/* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */ -#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT 0 -#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT 1 -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT 2 -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT 3 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT 4 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT 5 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT 6 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT 7 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT 8 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT 9 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT 10 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT 11 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT 12 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT 13 -#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT 14 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT 15 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT 16 - -#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_CAUSE_ "Fifo Overrun" -#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_CAUSE_ "Reserved" -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_CAUSE_ "Sleep mode entry" -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_CAUSE_ "Sleep mode exit" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_CAUSE_ "Error high speed SOT" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_CAUSE_ "Error high speed sync SOT" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_CAUSE_ "Error control" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_CAUSE_ "Error correction double bit" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_CAUSE_ "Error correction single bit" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_CAUSE_ "No error" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_CAUSE_ "Error cyclic redundancy check" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_CAUSE_ "Error id" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_CAUSE_ "Error frame sync" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_CAUSE_ "Error frame data" -#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_CAUSE_ "Data time-out" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_CAUSE_ "Error escape" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_CAUSE_ "Error line sync" - -/* Bits for CSI2_DEVICE_READY register */ -#define _HRT_CSS_RECEIVER_2400_CSI2_DEVICE_READY_IDX 0 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_INIT_TIME_OUT_ERR_IDX 2 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_OVER_RUN_ERR_IDX 3 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_SOT_SYNC_ERR_IDX 4 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_RECEIVE_DATA_TIME_OUT_ERR_IDX 5 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_ECC_TWO_BIT_ERR_IDX 6 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_DATA_ID_ERR_IDX 7 - -/* Bits for CSI2_FUNC_PROG register */ -#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS 19 - -/* Bits for INIT_COUNT register */ -#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_IDX 0 -#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_BITS 16 - -/* Bits for COUNT registers */ -#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_BITS 8 -#define _HRT_CSS_RECEIVER_2400_RX_COUNT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RX_COUNT_BITS 8 - -/* Bits for RAW116_18_DATAID register */ -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_BITS 6 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_IDX 8 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_BITS 6 - -/* Bits for COMP_FORMAT register, this selects the compression data format */ -#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS 8 -#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_IDX (_HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX + _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS) -#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_BITS 8 - -/* Bits for COMP_PREDICT register, this selects the predictor algorithm */ -#define _HRT_CSS_RECEIVER_2400_PREDICT_NO_COMP 0 -#define _HRT_CSS_RECEIVER_2400_PREDICT_1 1 -#define _HRT_CSS_RECEIVER_2400_PREDICT_2 2 - -/* Number of bits used for the delay registers */ -#define _HRT_CSS_RECEIVER_2400_DELAY_BITS 8 - -/* Bits for COMP_SCHEME register, this selects the compression scheme for a VC */ -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD1_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD2_BITS_IDX 5 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD3_BITS_IDX 10 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD4_BITS_IDX 15 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD5_BITS_IDX 20 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD6_BITS_IDX 25 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD7_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD8_BITS_IDX 5 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_BITS_BITS 5 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_BITS 3 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_IDX 3 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_BITS 2 - -/* BITS for backend RAW16 and RAW 18 registers */ - -#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_BITS 6 -#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_IDX 6 -#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_BITS 2 -#define _HRT_CSS_RECEIVER_2400_RAW18_EN_IDX 8 -#define _HRT_CSS_RECEIVER_2400_RAW18_EN_BITS 1 - -#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_BITS 6 -#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_IDX 6 -#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_BITS 2 -#define _HRT_CSS_RECEIVER_2400_RAW16_EN_IDX 8 -#define _HRT_CSS_RECEIVER_2400_RAW16_EN_BITS 1 - -/* These hsync and vsync values are for HSS simulation only */ -#define _HRT_CSS_RECEIVER_2400_HSYNC_VAL BIT(16) -#define _HRT_CSS_RECEIVER_2400_VSYNC_VAL BIT(17) - -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_WIDTH 28 -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB 0 -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB + CSS_RECEIVER_DATA_OUT - 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB + CSS_RECEIVER_DATA_OUT - 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_EOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT + 1) - -// SH Backend Register IDs -#define _HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX 1 -#define _HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX 2 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX 4 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX 5 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX 6 -#define _HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX 7 -#define _HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX 8 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX 9 -#define _HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX 10 -#define _HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX 11 -#define _HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX 12 -#define _HRT_CSS_RECEIVER_2400_BE_CUST_EN_REG_IDX 13 -#define _HRT_CSS_RECEIVER_2400_BE_CUST_DATA_STATE_REG_IDX 14 /* Data State 0,1,2 config */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P0_REG_IDX 15 /* Pixel Extractor config for Data State 0 & Pix 0 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P1_REG_IDX 16 /* Pixel Extractor config for Data State 0 & Pix 1 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P2_REG_IDX 17 /* Pixel Extractor config for Data State 0 & Pix 2 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P3_REG_IDX 18 /* Pixel Extractor config for Data State 0 & Pix 3 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P0_REG_IDX 19 /* Pixel Extractor config for Data State 1 & Pix 0 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P1_REG_IDX 20 /* Pixel Extractor config for Data State 1 & Pix 1 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P2_REG_IDX 21 /* Pixel Extractor config for Data State 1 & Pix 2 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P3_REG_IDX 22 /* Pixel Extractor config for Data State 1 & Pix 3 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P0_REG_IDX 23 /* Pixel Extractor config for Data State 2 & Pix 0 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P1_REG_IDX 24 /* Pixel Extractor config for Data State 2 & Pix 1 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P2_REG_IDX 25 /* Pixel Extractor config for Data State 2 & Pix 2 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P3_REG_IDX 26 /* Pixel Extractor config for Data State 2 & Pix 3 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_VALID_EOP_REG_IDX 27 /* Pixel Valid & EoP config for Pix 0,1,2,3 */ - -#define _HRT_CSS_RECEIVER_2400_BE_NOF_REGISTERS 28 - -#define _HRT_CSS_RECEIVER_2400_BE_SRST_HE 0 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_RCF 1 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_PF 2 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_SM 3 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_PD 4 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_SD 5 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_OT 6 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_BC 7 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_WIDTH 8 - -#endif /* _css_receiver_2400_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/defs.h deleted file mode 100644 index 47505f41790c1..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/defs.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_DEFS_H_ -#define _HRT_DEFS_H_ - -#ifndef HRTCAT -#define _HRTCAT(m, n) m##n -#define HRTCAT(m, n) _HRTCAT(m, n) -#endif - -#ifndef HRTSTR -#define _HRTSTR(x) #x -#define HRTSTR(x) _HRTSTR(x) -#endif - -#ifndef HRTMIN -#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -#ifndef HRTMAX -#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif - -#endif /* _HRT_DEFS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h deleted file mode 100644 index 8741b8347dd42..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _dma_v2_defs_h -#define _dma_v2_defs_h - -#define _DMA_V2_NUM_CHANNELS_ID MaxNumChannels -#define _DMA_V2_CONNECTIONS_ID Connections -#define _DMA_V2_DEV_ELEM_WIDTHS_ID DevElemWidths -#define _DMA_V2_DEV_FIFO_DEPTH_ID DevFifoDepth -#define _DMA_V2_DEV_FIFO_RD_LAT_ID DevFifoRdLat -#define _DMA_V2_DEV_FIFO_LAT_BYPASS_ID DevFifoRdLatBypass -#define _DMA_V2_DEV_NO_BURST_ID DevNoBurst -#define _DMA_V2_DEV_RD_ACCEPT_ID DevRdAccept -#define _DMA_V2_DEV_SRMD_ID DevSRMD -#define _DMA_V2_DEV_HAS_CRUN_ID CRunMasters -#define _DMA_V2_CTRL_ACK_FIFO_DEPTH_ID CtrlAckFifoDepth -#define _DMA_V2_CMD_FIFO_DEPTH_ID CommandFifoDepth -#define _DMA_V2_CMD_FIFO_RD_LAT_ID CommandFifoRdLat -#define _DMA_V2_CMD_FIFO_LAT_BYPASS_ID CommandFifoRdLatBypass -#define _DMA_V2_NO_PACK_ID has_no_pack - -#define _DMA_V2_REG_ALIGN 4 -#define _DMA_V2_REG_ADDR_BITS 2 - -/* Command word */ -#define _DMA_V2_CMD_IDX 0 -#define _DMA_V2_CMD_BITS 6 -#define _DMA_V2_CHANNEL_IDX (_DMA_V2_CMD_IDX + _DMA_V2_CMD_BITS) -#define _DMA_V2_CHANNEL_BITS 5 - -/* The command to set a parameter contains the PARAM field next */ -#define _DMA_V2_PARAM_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) -#define _DMA_V2_PARAM_BITS 4 - -/* Commands to read, write or init specific blocks contain these - three values */ -#define _DMA_V2_SPEC_DEV_A_XB_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) -#define _DMA_V2_SPEC_DEV_A_XB_BITS 8 -#define _DMA_V2_SPEC_DEV_B_XB_IDX (_DMA_V2_SPEC_DEV_A_XB_IDX + _DMA_V2_SPEC_DEV_A_XB_BITS) -#define _DMA_V2_SPEC_DEV_B_XB_BITS 8 -#define _DMA_V2_SPEC_YB_IDX (_DMA_V2_SPEC_DEV_B_XB_IDX + _DMA_V2_SPEC_DEV_B_XB_BITS) -#define _DMA_V2_SPEC_YB_BITS (32 - _DMA_V2_SPEC_DEV_B_XB_BITS - _DMA_V2_SPEC_DEV_A_XB_BITS - _DMA_V2_CMD_BITS - _DMA_V2_CHANNEL_BITS) - -/* */ -#define _DMA_V2_CMD_CTRL_IDX 4 -#define _DMA_V2_CMD_CTRL_BITS 4 - -/* Packing setup word */ -#define _DMA_V2_CONNECTION_IDX 0 -#define _DMA_V2_CONNECTION_BITS 4 -#define _DMA_V2_EXTENSION_IDX (_DMA_V2_CONNECTION_IDX + _DMA_V2_CONNECTION_BITS) -#define _DMA_V2_EXTENSION_BITS 1 - -/* Elements packing word */ -#define _DMA_V2_ELEMENTS_IDX 0 -#define _DMA_V2_ELEMENTS_BITS 8 -#define _DMA_V2_LEFT_CROPPING_IDX (_DMA_V2_ELEMENTS_IDX + _DMA_V2_ELEMENTS_BITS) -#define _DMA_V2_LEFT_CROPPING_BITS 8 - -#define _DMA_V2_WIDTH_IDX 0 -#define _DMA_V2_WIDTH_BITS 16 - -#define _DMA_V2_HEIGHT_IDX 0 -#define _DMA_V2_HEIGHT_BITS 16 - -#define _DMA_V2_STRIDE_IDX 0 -#define _DMA_V2_STRIDE_BITS 32 - -/* Command IDs */ -#define _DMA_V2_MOVE_B2A_COMMAND 0 -#define _DMA_V2_MOVE_B2A_BLOCK_COMMAND 1 -#define _DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND 2 -#define _DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND 3 -#define _DMA_V2_MOVE_A2B_COMMAND 4 -#define _DMA_V2_MOVE_A2B_BLOCK_COMMAND 5 -#define _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND 6 -#define _DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND 7 -#define _DMA_V2_INIT_A_COMMAND 8 -#define _DMA_V2_INIT_A_BLOCK_COMMAND 9 -#define _DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND 10 -#define _DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND 11 -#define _DMA_V2_INIT_B_COMMAND 12 -#define _DMA_V2_INIT_B_BLOCK_COMMAND 13 -#define _DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND 14 -#define _DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND 15 -#define _DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_A_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_B_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_CONFIG_CHANNEL_COMMAND 32 -#define _DMA_V2_SET_CHANNEL_PARAM_COMMAND 33 -#define _DMA_V2_SET_CRUN_COMMAND 62 - -/* Channel Parameter IDs */ -#define _DMA_V2_PACKING_SETUP_PARAM 0 -#define _DMA_V2_STRIDE_A_PARAM 1 -#define _DMA_V2_ELEM_CROPPING_A_PARAM 2 -#define _DMA_V2_WIDTH_A_PARAM 3 -#define _DMA_V2_STRIDE_B_PARAM 4 -#define _DMA_V2_ELEM_CROPPING_B_PARAM 5 -#define _DMA_V2_WIDTH_B_PARAM 6 -#define _DMA_V2_HEIGHT_PARAM 7 -#define _DMA_V2_QUEUED_CMDS 8 - -/* Parameter Constants */ -#define _DMA_V2_ZERO_EXTEND 0 -#define _DMA_V2_SIGN_EXTEND 1 - -/* SLAVE address map */ -#define _DMA_V2_SEL_FSM_CMD 0 -#define _DMA_V2_SEL_CH_REG 1 -#define _DMA_V2_SEL_CONN_GROUP 2 -#define _DMA_V2_SEL_DEV_INTERF 3 - -#define _DMA_V2_ADDR_SEL_COMP_IDX 12 -#define _DMA_V2_ADDR_SEL_COMP_BITS 4 -#define _DMA_V2_ADDR_SEL_CH_REG_IDX 2 -#define _DMA_V2_ADDR_SEL_CH_REG_BITS 6 -#define _DMA_V2_ADDR_SEL_PARAM_IDX (_DMA_V2_ADDR_SEL_CH_REG_BITS + _DMA_V2_ADDR_SEL_CH_REG_IDX) -#define _DMA_V2_ADDR_SEL_PARAM_BITS 4 - -#define _DMA_V2_ADDR_SEL_GROUP_COMP_IDX 2 -#define _DMA_V2_ADDR_SEL_GROUP_COMP_BITS 6 -#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_IDX (_DMA_V2_ADDR_SEL_GROUP_COMP_BITS + _DMA_V2_ADDR_SEL_GROUP_COMP_IDX) -#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_BITS 4 - -#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX 2 -#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS 6 -#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_IDX (_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX + _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS) -#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_BITS 4 - -#define _DMA_V2_FSM_GROUP_CMD_IDX 0 -#define _DMA_V2_FSM_GROUP_ADDR_SRC_IDX 1 -#define _DMA_V2_FSM_GROUP_ADDR_DEST_IDX 2 -#define _DMA_V2_FSM_GROUP_CMD_CTRL_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_IDX 4 -#define _DMA_V2_FSM_GROUP_FSM_PACK_IDX 5 -#define _DMA_V2_FSM_GROUP_FSM_REQ_IDX 6 -#define _DMA_V2_FSM_GROUP_FSM_WR_IDX 7 - -#define _DMA_V2_FSM_GROUP_FSM_CTRL_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_XB_IDX 4 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_YB_IDX 5 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX 6 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX 7 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX 8 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX 9 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX 10 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX 11 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX 12 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX 13 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX 14 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX 15 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_CMD_CTRL_IDX 15 - -#define _DMA_V2_FSM_GROUP_FSM_PACK_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_YB_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX 3 - -#define _DMA_V2_FSM_GROUP_FSM_REQ_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_YB_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_XB_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_REQ_XB_REMAINING_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_BURST_IDX 4 - -#define _DMA_V2_FSM_GROUP_FSM_WR_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_YB_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_XB_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_WR_XB_REMAINING_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_BURST_IDX 4 - -#define _DMA_V2_DEV_INTERF_REQ_SIDE_STATUS_IDX 0 -#define _DMA_V2_DEV_INTERF_SEND_SIDE_STATUS_IDX 1 -#define _DMA_V2_DEV_INTERF_FIFO_STATUS_IDX 2 -#define _DMA_V2_DEV_INTERF_REQ_ONLY_COMPLETE_BURST_IDX 3 -#define _DMA_V2_DEV_INTERF_MAX_BURST_IDX 4 -#define _DMA_V2_DEV_INTERF_CHK_ADDR_ALIGN 5 - -#endif /* _dma_v2_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h deleted file mode 100644 index 3cc627aa6b091..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef HRT_GDC_v2_defs_h_ -#define HRT_GDC_v2_defs_h_ - -#define HRT_GDC_IS_V2 - -#define HRT_GDC_N 1024 /* Top-level design constant, equal to the number of entries in the LUT */ -#define HRT_GDC_FRAC_BITS 10 /* Number of fractional bits in the GDC block, driven by the size of the LUT */ - -#define HRT_GDC_BLI_FRAC_BITS 4 /* Number of fractional bits for the bi-linear interpolation type */ -#define HRT_GDC_BLI_COEF_ONE BIT(HRT_GDC_BLI_FRAC_BITS) - -#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ -#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */ -/* The supported range is [-256, .., +256] */ -/* in 14-bit signed notation, */ -/* We need all ten bits (MSB must be zero). */ -/* -s is inserted to solve this issue, and */ -/* therefore "1" is equal to +256. */ -#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) - -#define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */ -/* 2 bytes per coefficient */ - -#define _HRT_GDC_REG_ALIGN 4 - -// 31 30 29 25 24 0 -// |-----|---|--------|------------------------| -// | CMD | C | Reg_ID | Value | - -// There are just two commands possible for the GDC block: -// 1 - Configure reg -// 0 - Data token - -// C - Reserved bit -// Used in protocol to indicate whether it is C-run or other type of runs -// In case of C-run, this bit has a value of 1, for all the other runs, it is 0. - -// Reg_ID - Address of the register to be configured - -// Value - Value to store to the addressed register, maximum of 24 bits - -// Configure reg command is not followed by any other token. -// The address of the register and the data to be filled in is contained in the same token - -// When the first data token is received, it must be: -// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, -// 2. P0'X (device configured in one of the tetragon modes) -// After the first data token is received, pre-defined number of tokens with the following meaning follow: -// 1. two tokens: SRC address ; DST address -// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address - -#define HRT_GDC_CONFIG_CMD 1 -#define HRT_GDC_DATA_CMD 0 - -#define HRT_GDC_CMD_POS 31 -#define HRT_GDC_CMD_BITS 1 -#define HRT_GDC_CRUN_POS 30 -#define HRT_GDC_REG_ID_POS 25 -#define HRT_GDC_REG_ID_BITS 5 -#define HRT_GDC_DATA_POS 0 -#define HRT_GDC_DATA_BITS 25 - -#define HRT_GDC_FRYIPXFRX_BITS 26 -#define HRT_GDC_P0X_BITS 23 - -#define HRT_GDC_MAX_OXDIM (8192 - 64) -#define HRT_GDC_MAX_OYDIM 4095 -#define HRT_GDC_MAX_IXDIM (8192 - 64) -#define HRT_GDC_MAX_IYDIM 4095 -#define HRT_GDC_MAX_DS_FAC 16 -#define HRT_GDC_MAX_DX (HRT_GDC_MAX_DS_FAC * HRT_GDC_N - 1) -#define HRT_GDC_MAX_DY HRT_GDC_MAX_DX - -/* GDC lookup tables entries are 10 bits values, but they're - stored 2 by 2 as 32 bit values, yielding 16 bits per entry. - A GDC lookup table contains 64 * 4 elements */ - -#define HRT_GDC_PERF_1_1_pix 0 -#define HRT_GDC_PERF_2_1_pix 1 -#define HRT_GDC_PERF_1_2_pix 2 -#define HRT_GDC_PERF_2_2_pix 3 - -#define HRT_GDC_NND_MODE 0 -#define HRT_GDC_BLI_MODE 1 -#define HRT_GDC_BCI_MODE 2 -#define HRT_GDC_LUT_MODE 3 - -#define HRT_GDC_SCAN_STB 0 -#define HRT_GDC_SCAN_STR 1 - -#define HRT_GDC_MODE_SCALING 0 -#define HRT_GDC_MODE_TETRAGON 1 - -#define HRT_GDC_LUT_COEFF_OFFSET 16 -#define HRT_GDC_FRY_BIT_OFFSET 16 -// FRYIPXFRX is the only register where we store two values in one field, -// to save one token in the scaling protocol. -// Like this, we have three tokens in the scaling protocol, -// Otherwise, we would have had four. -// The register bit-map is: -// 31 26 25 16 15 10 9 0 -// |------|----------|------|----------| -// | XXXX | FRY | IPX | FRX | - -#define HRT_GDC_CE_FSM0_POS 0 -#define HRT_GDC_CE_FSM0_LEN 2 -#define HRT_GDC_CE_OPY_POS 2 -#define HRT_GDC_CE_OPY_LEN 14 -#define HRT_GDC_CE_OPX_POS 16 -#define HRT_GDC_CE_OPX_LEN 16 -// CHK_ENGINE register bit-map: -// 31 16 15 2 1 0 -// |----------------|-----------|----| -// | OPX | OPY |FSM0| -// However, for the time being at least, -// this implementation is meaningless in hss model, -// So, we just return 0 - -#define HRT_GDC_CHK_ENGINE_IDX 0 -#define HRT_GDC_WOIX_IDX 1 -#define HRT_GDC_WOIY_IDX 2 -#define HRT_GDC_BPP_IDX 3 -#define HRT_GDC_FRYIPXFRX_IDX 4 -#define HRT_GDC_OXDIM_IDX 5 -#define HRT_GDC_OYDIM_IDX 6 -#define HRT_GDC_SRC_ADDR_IDX 7 -#define HRT_GDC_SRC_END_ADDR_IDX 8 -#define HRT_GDC_SRC_WRAP_ADDR_IDX 9 -#define HRT_GDC_SRC_STRIDE_IDX 10 -#define HRT_GDC_DST_ADDR_IDX 11 -#define HRT_GDC_DST_STRIDE_IDX 12 -#define HRT_GDC_DX_IDX 13 -#define HRT_GDC_DY_IDX 14 -#define HRT_GDC_P0X_IDX 15 -#define HRT_GDC_P0Y_IDX 16 -#define HRT_GDC_P1X_IDX 17 -#define HRT_GDC_P1Y_IDX 18 -#define HRT_GDC_P2X_IDX 19 -#define HRT_GDC_P2Y_IDX 20 -#define HRT_GDC_P3X_IDX 21 -#define HRT_GDC_P3Y_IDX 22 -#define HRT_GDC_PERF_POINT_IDX 23 // 1x1 ; 1x2 ; 2x1 ; 2x2 pixels per cc -#define HRT_GDC_INTERP_TYPE_IDX 24 // NND ; BLI ; BCI ; LUT -#define HRT_GDC_SCAN_IDX 25 // 0 = STB (Slide To Bottom) ; 1 = STR (Slide To Right) -#define HRT_GDC_PROC_MODE_IDX 26 // 0 = Scaling ; 1 = Tetragon - -#define HRT_GDC_LUT_IDX 32 - -#endif /* HRT_GDC_v2_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gp_timer_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gp_timer_defs.h deleted file mode 100644 index ffd7b38fce9d3..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gp_timer_defs.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _gp_timer_defs_h -#define _gp_timer_defs_h - -#define _HRT_GP_TIMER_REG_ALIGN 4 - -#define HIVE_GP_TIMER_RESET_REG_IDX 0 -#define HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX 1 -#define HIVE_GP_TIMER_ENABLE_REG_IDX(timer) (HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX + 1 + timer) -#define HIVE_GP_TIMER_VALUE_REG_IDX(timer, timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timers) + timer) -#define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer, timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers, timers) + timer) -#define HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer, timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timers, timers) + timer) -#define HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq, timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timers, timers) + irq) -#define HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irqs, timers) + irq) -#define HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs, timers, irqs) + irq) - -#define HIVE_GP_TIMER_COUNT_TYPE_HIGH 0 -#define HIVE_GP_TIMER_COUNT_TYPE_LOW 1 -#define HIVE_GP_TIMER_COUNT_TYPE_POSEDGE 2 -#define HIVE_GP_TIMER_COUNT_TYPE_NEGEDGE 3 -#define HIVE_GP_TIMER_COUNT_TYPES 4 - -#endif /* _gp_timer_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h deleted file mode 100644 index 96286a141b00b..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _gpio_block_defs_h_ -#define _gpio_block_defs_h_ - -#define _HRT_GPIO_BLOCK_REG_ALIGN 4 - -/* R/W registers */ -#define _gpio_block_reg_do_e 0 -#define _gpio_block_reg_do_select 1 -#define _gpio_block_reg_do_0 2 -#define _gpio_block_reg_do_1 3 -#define _gpio_block_reg_do_pwm_cnt_0 4 -#define _gpio_block_reg_do_pwm_cnt_1 5 -#define _gpio_block_reg_do_pwm_cnt_2 6 -#define _gpio_block_reg_do_pwm_cnt_3 7 -#define _gpio_block_reg_do_pwm_main_cnt 8 -#define _gpio_block_reg_do_pwm_enable 9 -#define _gpio_block_reg_di_debounce_sel 10 -#define _gpio_block_reg_di_debounce_cnt_0 11 -#define _gpio_block_reg_di_debounce_cnt_1 12 -#define _gpio_block_reg_di_debounce_cnt_2 13 -#define _gpio_block_reg_di_debounce_cnt_3 14 -#define _gpio_block_reg_di_active_level 15 - -/* read-only registers */ -#define _gpio_block_reg_di 16 - -#endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h deleted file mode 100644 index a22b771f61f2e..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _hive_isp_css_streaming_to_mipi_types_hrt_h_ -#define _hive_isp_css_streaming_to_mipi_types_hrt_h_ - -#include - -#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS) - 1) -#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS) - 1) - -#define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) -#define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) - -#endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h deleted file mode 100644 index 9715893c8a360..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_types.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_HIVE_TYPES_H -#define _HRT_HIVE_TYPES_H - -#include "version.h" -#include "defs.h" - -#ifndef HRTCAT3 -#define _HRTCAT3(m, n, o) m##n##o -#define HRTCAT3(m, n, o) _HRTCAT3(m, n, o) -#endif - -#ifndef HRTCAT4 -#define _HRTCAT4(m, n, o, p) m##n##o##p -#define HRTCAT4(m, n, o, p) _HRTCAT4(m, n, o, p) -#endif - -#ifndef HRTMIN -#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -#ifndef HRTMAX -#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif - -/* boolean data type */ -typedef unsigned int hive_bool; -#define hive_false 0 -#define hive_true 1 - -typedef char hive_int8; -typedef short hive_int16; -typedef int hive_int32; -typedef long long hive_int64; - -typedef unsigned char hive_uint8; -typedef unsigned short hive_uint16; -typedef unsigned int hive_uint32; -typedef unsigned long long hive_uint64; - -/* by default assume 32 bit master port (both data and address) */ -#ifndef HRT_DATA_WIDTH -#define HRT_DATA_WIDTH 32 -#endif -#ifndef HRT_ADDRESS_WIDTH -#define HRT_ADDRESS_WIDTH 32 -#endif - -#define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8) -#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8) - -#if HRT_DATA_WIDTH == 64 -typedef hive_uint64 hrt_data; -#elif HRT_DATA_WIDTH == 32 -typedef hive_uint32 hrt_data; -#else -#error data width not supported -#endif - -#if HRT_ADDRESS_WIDTH == 64 -typedef hive_uint64 hrt_address; -#elif HRT_ADDRESS_WIDTH == 32 -typedef hive_uint32 hrt_address; -#else -#error adddres width not supported -#endif - -/* The SP side representation of an HMM virtual address */ -typedef hive_uint32 hrt_vaddress; - -/* use 64 bit addresses in simulation, where possible */ -typedef hive_uint64 hive_sim_address; - -/* below is for csim, not for hrt, rename and move this elsewhere */ - -typedef unsigned int hive_uint; -typedef hive_uint32 hive_address; -typedef hive_address hive_slave_address; -typedef hive_address hive_mem_address; - -/* MMIO devices */ -typedef hive_uint hive_mmio_id; -typedef hive_mmio_id hive_slave_id; -typedef hive_mmio_id hive_port_id; -typedef hive_mmio_id hive_master_id; -typedef hive_mmio_id hive_mem_id; -typedef hive_mmio_id hive_dev_id; -typedef hive_mmio_id hive_fifo_id; - -typedef hive_uint hive_hier_id; -typedef hive_hier_id hive_device_id; -typedef hive_device_id hive_proc_id; -typedef hive_device_id hive_cell_id; -typedef hive_device_id hive_host_id; -typedef hive_device_id hive_bus_id; -typedef hive_device_id hive_bridge_id; -typedef hive_device_id hive_fifo_adapter_id; -typedef hive_device_id hive_custom_device_id; - -typedef hive_uint hive_slot_id; -typedef hive_uint hive_fu_id; -typedef hive_uint hive_reg_file_id; -typedef hive_uint hive_reg_id; - -/* Streaming devices */ -typedef hive_uint hive_outport_id; -typedef hive_uint hive_inport_id; - -typedef hive_uint hive_msink_id; - -/* HRT specific */ -typedef char *hive_program; -typedef char *hive_function; - -#endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/if_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/if_defs.h deleted file mode 100644 index 7d39e45796ae1..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/if_defs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _IF_DEFS_H -#define _IF_DEFS_H - -#define HIVE_IF_FRAME_REQUEST 0xA000 -#define HIVE_IF_LINES_REQUEST 0xB000 -#define HIVE_IF_VECTORS_REQUEST 0xC000 - -#endif /* _IF_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h deleted file mode 100644 index 176456da961f7..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_formatter_subsystem_defs.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _if_subsystem_defs_h__ -#define _if_subsystem_defs_h__ - -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 0 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_1 1 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_2 2 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_3 3 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 -#define HIVE_IFMT_GP_REGS_SRST_IDX 9 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 - -#define HIVE_IFMT_GP_REGS_CH_ID_FMT_TYPE_IDX 11 - -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_BASE HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 - -/* order of the input bits for the ifmt irq controller */ -#define HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID 0 -#define HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID 1 -#define HIVE_IFMT_IRQ_IFT_SEC_BIT_ID 2 -#define HIVE_IFMT_IRQ_MEM_CPY_BIT_ID 3 -#define HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID 4 - -/* order of the input bits for the ifmt Soft reset register */ -#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_BIT_IDX 0 -#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_B_BIT_IDX 1 -#define HIVE_IFMT_GP_REGS_SRST_IFT_SEC_BIT_IDX 2 -#define HIVE_IFMT_GP_REGS_SRST_MEM_CPY_BIT_IDX 3 - -/* order of the input bits for the ifmt Soft reset register */ -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_BIT_IDX 0 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_B_BIT_IDX 1 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_SEC_BIT_IDX 2 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_MEM_CPY_BIT_IDX 3 - -#endif /* _if_subsystem_defs_h__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h deleted file mode 100644 index 1dd8ea3cd6d47..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_selector_defs.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_selector_defs_h -#define _input_selector_defs_h - -#ifndef HIVE_ISP_ISEL_SEL_BITS -#define HIVE_ISP_ISEL_SEL_BITS 2 -#endif - -#ifndef HIVE_ISP_CH_ID_BITS -#define HIVE_ISP_CH_ID_BITS 2 -#endif - -#ifndef HIVE_ISP_FMT_TYPE_BITS -#define HIVE_ISP_FMT_TYPE_BITS 5 -#endif - -/* gp_register register id's -- Outputs */ -#define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 -#define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 -#define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 -#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 -#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 - -#define HIVE_ISEL_GP_REGS_SOF_IDX 8 -#define HIVE_ISEL_GP_REGS_EOF_IDX 9 -#define HIVE_ISEL_GP_REGS_SOL_IDX 10 -#define HIVE_ISEL_GP_REGS_EOL_IDX 11 - -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 -#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 - -#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 -#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 -#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 -#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 -#define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 -#define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 -#define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 -#define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 -#define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 - -#define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 -#define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 -#define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 -#define HIVE_ISEL_GP_REGS_SBAND_SEL_IDX 32 -#define HIVE_ISEL_GP_REGS_SYNC_SEL_IDX 33 -#define HIVE_ISEL_GP_REGS_SRST_IDX 37 - -#define HIVE_ISEL_GP_REGS_SRST_SYNCGEN_BIT 0 -#define HIVE_ISEL_GP_REGS_SRST_PRBS_BIT 1 -#define HIVE_ISEL_GP_REGS_SRST_TPG_BIT 2 -#define HIVE_ISEL_GP_REGS_SRST_FIFO_BIT 3 - -/* gp_register register id's -- Inputs */ -#define HIVE_ISEL_GP_REGS_SYNCGEN_HOR_CNT_IDX 34 -#define HIVE_ISEL_GP_REGS_SYNCGEN_VER_CNT_IDX 35 -#define HIVE_ISEL_GP_REGS_SYNCGEN_FRAMES_CNT_IDX 36 - -/* irq sources isel irq controller */ -#define HIVE_ISEL_IRQ_SYNC_GEN_SOF_BIT_ID 0 -#define HIVE_ISEL_IRQ_SYNC_GEN_EOF_BIT_ID 1 -#define HIVE_ISEL_IRQ_SYNC_GEN_SOL_BIT_ID 2 -#define HIVE_ISEL_IRQ_SYNC_GEN_EOL_BIT_ID 3 -#define HIVE_ISEL_IRQ_NUM_IRQS 4 - -#endif /* _input_selector_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h deleted file mode 100644 index 2d5baae305220..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_switch_2400_defs.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_switch_2400_defs_h -#define _input_switch_2400_defs_h - -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id) * 2) + ((fmt_type) >= 16)) -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type) % 16) * 2) - -#define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 -#define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 -#define HIVE_INPUT_SWITCH_SELECT_IF_SEC 2 -#define HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM 3 -#define HIVE_INPUT_SWITCH_VSELECT_NO_OUTPUT 0 -#define HIVE_INPUT_SWITCH_VSELECT_IF_PRIM 1 -#define HIVE_INPUT_SWITCH_VSELECT_IF_SEC 2 -#define HIVE_INPUT_SWITCH_VSELECT_STR_TO_MEM 4 - -#endif /* _input_switch_2400_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h deleted file mode 100644 index fcfa8c4971bef..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_ctrl_defs.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_system_ctrl_defs_h -#define _input_system_ctrl_defs_h - -#define _INPUT_SYSTEM_CTRL_REG_ALIGN 4 /* assuming 32 bit control bus width */ - -/* --------------------------------------------------*/ - -/* --------------------------------------------------*/ -/* REGISTER INFO */ -/* --------------------------------------------------*/ - -// Number of registers -#define ISYS_CTRL_NOF_REGS 23 - -// Register id's of MMIO slave accesible registers -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_ID 0 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_ID 1 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_ID 2 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID 3 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID 4 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID 5 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID 6 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID 7 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID 8 -#define ISYS_CTRL_ACQ_START_ADDR_REG_ID 9 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID 10 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID 11 -#define ISYS_CTRL_INIT_REG_ID 12 -#define ISYS_CTRL_LAST_COMMAND_REG_ID 13 -#define ISYS_CTRL_NEXT_COMMAND_REG_ID 14 -#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID 15 -#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID 16 -#define ISYS_CTRL_FSM_STATE_INFO_REG_ID 17 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID 18 -#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID 19 -#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 -#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 -#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 - -/* register reset value */ -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 -#define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define ISYS_CTRL_INIT_REG_RSTVAL 0 -#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 - -/* register width value */ -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ISYS_CTRL_INIT_REG_WIDTH 3 -#define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ -#define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 -#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define ISYS_CTRL_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_WIDTH 1 - -/* bit definitions */ - -/* --------------------------------------------------*/ -/* TOKEN INFO */ -/* --------------------------------------------------*/ - -/* -InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 -[7:4] - CaptPortId, - CaptA-'b0000 - CaptB-'b0001 - CaptC-'b0010 -[31:16] - NOF_frames -InpSysCaptFrameExt 2/0 [3:0] - 'b0001' -[7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - - 2/1 [31:0] - external capture address -InpSysAcqFrame 2/0 [3:0] - 'b0010, -[31:4] - NOF_ext_mem_words - 2/1 [31:0] - external memory read start address -InpSysOverruleON 1/0 [3:0] - 'b0011, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysOverruleOFF 1/0 [3:0] - 'b0100, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysOverruleCmd 2/0 [3:0] - 'b0101, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - - 2/1 [31:0] - command token value for port opid - -acknowledge tokens: - -InpSysAckCFA 1/0 [3:0] - 'b0000 - [7:4] - CaptPortId, - CaptA-'b0000 - CaptB- 'b0001 - CaptC-'b0010 - [31:16] - NOF_frames -InpSysAckCFE 1/0 [3:0] - 'b0001' -[7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - -InpSysAckAF 1/0 [3:0] - 'b0010 -InpSysAckOverruleON 1/0 [3:0] - 'b0011, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysAckOverrule 2/0 [3:0] - 'b0101, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - - 2/1 [31:0] - acknowledge token value from port opid - -*/ - -/* Command and acknowledge tokens IDs */ -#define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ -#define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ -#define ISYS_CTRL_ACQ_FRAME_TOKEN_ID 2 /* 0010b */ -#define ISYS_CTRL_OVERRULE_ON_TOKEN_ID 3 /* 0011b */ -#define ISYS_CTRL_OVERRULE_OFF_TOKEN_ID 4 /* 0100b */ -#define ISYS_CTRL_OVERRULE_TOKEN_ID 5 /* 0101b */ - -#define ISYS_CTRL_ACK_CFA_TOKEN_ID 0 -#define ISYS_CTRL_ACK_CFE_TOKEN_ID 1 -#define ISYS_CTRL_ACK_AF_TOKEN_ID 2 -#define ISYS_CTRL_ACK_OVERRULE_ON_TOKEN_ID 3 -#define ISYS_CTRL_ACK_OVERRULE_OFF_TOKEN_ID 4 -#define ISYS_CTRL_ACK_OVERRULE_TOKEN_ID 5 -#define ISYS_CTRL_ACK_DEVICE_ERROR_TOKEN_ID 6 - -#define ISYS_CTRL_TOKEN_ID_MSB 3 -#define ISYS_CTRL_TOKEN_ID_LSB 0 -#define ISYS_CTRL_PORT_ID_TOKEN_MSB 7 -#define ISYS_CTRL_PORT_ID_TOKEN_LSB 4 -#define ISYS_CTRL_NOF_CAPT_TOKEN_MSB 31 -#define ISYS_CTRL_NOF_CAPT_TOKEN_LSB 16 -#define ISYS_CTRL_NOF_EXT_TOKEN_MSB 31 -#define ISYS_CTRL_NOF_EXT_TOKEN_LSB 8 - -#define ISYS_CTRL_TOKEN_ID_IDX 0 -#define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) -#define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) -#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB + 1) -#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB -#define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) -#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB -#define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) - -#define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ -#define ISYS_CTRL_PORT_ID_CAPT_B 1 /* device ID for capture unit B */ -#define ISYS_CTRL_PORT_ID_CAPT_C 2 /* device ID for capture unit C */ -#define ISYS_CTRL_PORT_ID_ACQUISITION 3 /* device ID for acquistion unit */ -#define ISYS_CTRL_PORT_ID_DMA_CAPT_A 4 /* device ID for dma unit */ -#define ISYS_CTRL_PORT_ID_DMA_CAPT_B 5 /* device ID for dma unit */ -#define ISYS_CTRL_PORT_ID_DMA_CAPT_C 6 /* device ID for dma unit */ -#define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ - -#define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ -#define ISYS_CTRL_NO_DMA_ACK 0 -#define ISYS_CTRL_NO_CAPT_ACK 16 - -#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_defs.h deleted file mode 100644 index ae62163034a66..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/input_system_defs.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_system_defs_h -#define _input_system_defs_h - -/* csi controller modes */ -#define HIVE_CSI_CONFIG_MAIN 0 -#define HIVE_CSI_CONFIG_STEREO1 4 -#define HIVE_CSI_CONFIG_STEREO2 8 - -/* general purpose register IDs */ - -/* Stream Multicast select modes */ -#define HIVE_ISYS_GPREG_MULTICAST_A_IDX 0 -#define HIVE_ISYS_GPREG_MULTICAST_B_IDX 1 -#define HIVE_ISYS_GPREG_MULTICAST_C_IDX 2 - -/* Stream Mux select modes */ -#define HIVE_ISYS_GPREG_MUX_IDX 3 - -/* streaming monitor status and control */ -#define HIVE_ISYS_GPREG_STRMON_STAT_IDX 4 -#define HIVE_ISYS_GPREG_STRMON_COND_IDX 5 -#define HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX 6 -#define HIVE_ISYS_GPREG_SRST_IDX 7 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_IDX 8 -#define HIVE_ISYS_GPREG_REG_PORT_A_IDX 9 -#define HIVE_ISYS_GPREG_REG_PORT_B_IDX 10 - -/* Bit numbers of the soft reset register */ -#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_A_BIT 0 -#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_B_BIT 1 -#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_C_BIT 2 -#define HIVE_ISYS_GPREG_SRST_MULTICAST_A_BIT 3 -#define HIVE_ISYS_GPREG_SRST_MULTICAST_B_BIT 4 -#define HIVE_ISYS_GPREG_SRST_MULTICAST_C_BIT 5 -#define HIVE_ISYS_GPREG_SRST_CAPT_A_BIT 6 -#define HIVE_ISYS_GPREG_SRST_CAPT_B_BIT 7 -#define HIVE_ISYS_GPREG_SRST_CAPT_C_BIT 8 -#define HIVE_ISYS_GPREG_SRST_ACQ_BIT 9 -/* For ISYS_CTRL 5bits are defined to allow soft-reset per sub-controller and top-ctrl */ -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_BIT 10 /*LSB for 5bit vector */ -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_A_BIT 10 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_B_BIT 11 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_C_BIT 12 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_ACQ_BIT 13 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_TOP_BIT 14 -/* -- */ -#define HIVE_ISYS_GPREG_SRST_STR_MUX_BIT 15 -#define HIVE_ISYS_GPREG_SRST_CIO2AHB_BIT 16 -#define HIVE_ISYS_GPREG_SRST_GEN_SHORT_FIFO_BIT 17 -#define HIVE_ISYS_GPREG_SRST_WIDE_BUS_BIT 18 // includes CIO conv -#define HIVE_ISYS_GPREG_SRST_DMA_BIT 19 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_A_BIT 20 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_B_BIT 21 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_C_BIT 22 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_ACQ_BIT 23 -#define HIVE_ISYS_GPREG_SRST_CSI_BE_OUT_BIT 24 - -#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_A_BIT 0 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_B_BIT 1 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_C_BIT 2 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_ACQ_BIT 3 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_DMA_BIT 4 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_ISYS_CTRL_BIT 5 - -/* streaming monitor port id's */ -#define HIVE_ISYS_STR_MON_PORT_CAPA 0 -#define HIVE_ISYS_STR_MON_PORT_CAPB 1 -#define HIVE_ISYS_STR_MON_PORT_CAPC 2 -#define HIVE_ISYS_STR_MON_PORT_ACQ 3 -#define HIVE_ISYS_STR_MON_PORT_CSS_GENSH 4 -#define HIVE_ISYS_STR_MON_PORT_SF_GENSH 5 -#define HIVE_ISYS_STR_MON_PORT_SP2ISYS 6 -#define HIVE_ISYS_STR_MON_PORT_ISYS2SP 7 -#define HIVE_ISYS_STR_MON_PORT_PIXA 8 -#define HIVE_ISYS_STR_MON_PORT_PIXB 9 - -/* interrupt bit ID's */ -#define HIVE_ISYS_IRQ_CSI_SOF_BIT_ID 0 -#define HIVE_ISYS_IRQ_CSI_EOF_BIT_ID 1 -#define HIVE_ISYS_IRQ_CSI_SOL_BIT_ID 2 -#define HIVE_ISYS_IRQ_CSI_EOL_BIT_ID 3 -#define HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID 4 -#define HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID 5 -#define HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP 6 -#define HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP 7 -/*#define HIVE_ISYS_IRQ_CAP_UNIT_A_UNDEF_PH 7*/ -#define HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP 8 -#define HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP 9 -/*#define HIVE_ISYS_IRQ_CAP_UNIT_B_UNDEF_PH 10*/ -#define HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP 10 -#define HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP 11 -/*#define HIVE_ISYS_IRQ_CAP_UNIT_C_UNDEF_PH 13*/ -#define HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH 12 -/*#define HIVE_ISYS_IRQ_ACQ_UNIT_UNDEF_PH 15*/ -#define HIVE_ISYS_IRQ_INP_CTRL_CAPA 13 -#define HIVE_ISYS_IRQ_INP_CTRL_CAPB 14 -#define HIVE_ISYS_IRQ_INP_CTRL_CAPC 15 -#define HIVE_ISYS_IRQ_CIO2AHB 16 -#define HIVE_ISYS_IRQ_DMA_BIT_ID 17 -#define HIVE_ISYS_IRQ_STREAM_MON_BIT_ID 18 -#define HIVE_ISYS_IRQ_NUM_BITS 19 - -/* DMA */ -#define HIVE_ISYS_DMA_CHANNEL 0 -#define HIVE_ISYS_DMA_IBUF_DDR_CONN 0 -#define HIVE_ISYS_DMA_HEIGHT 1 -#define HIVE_ISYS_DMA_ELEMS 1 /* both master buses of same width */ -#define HIVE_ISYS_DMA_STRIDE 0 /* no stride required as height is fixed to 1 */ -#define HIVE_ISYS_DMA_CROP 0 /* no cropping */ -#define HIVE_ISYS_DMA_EXTENSION 0 /* no extension as elem width is same on both side */ - -#endif /* _input_system_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h deleted file mode 100644 index efb3d7e135bdd..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/irq_controller_defs.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _irq_controller_defs_h -#define _irq_controller_defs_h - -#define _HRT_IRQ_CONTROLLER_EDGE_REG_IDX 0 -#define _HRT_IRQ_CONTROLLER_MASK_REG_IDX 1 -#define _HRT_IRQ_CONTROLLER_STATUS_REG_IDX 2 -#define _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX 3 -#define _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX 4 -#define _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX 5 -#define _HRT_IRQ_CONTROLLER_STR_OUT_ENABLE_REG_IDX 6 - -#define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 - -#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h deleted file mode 100644 index e9106d1e6a63d..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _isp2400_support_h -#define _isp2400_support_h - -#ifndef ISP2400_VECTOR_TYPES -/* This typedef is to be able to include hive header files - in the host code which is useful in crun */ -typedef char *tmemvectors, *tmemvectoru, *tvector; -#endif - -#define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem1), addr, val) -#define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem2), addr, val) - -#define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) -#define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) - -#define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) -#define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) - -#if ISP_HAS_HIST -#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) -#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) -#endif - -#endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h deleted file mode 100644 index 5bdc16c71e82c..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_acquisition_defs.h +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _isp_acquisition_defs_h -#define _isp_acquisition_defs_h - -#define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 - -/* --------------------------------------------------*/ - -#define NOF_ACQ_IRQS 1 - -/* --------------------------------------------------*/ -/* FSM */ -/* --------------------------------------------------*/ -#define MEM2STREAM_FSM_STATE_BITS 2 -#define ACQ_SYNCHRONIZER_FSM_STATE_BITS 2 - -/* --------------------------------------------------*/ -/* REGISTER INFO */ -/* --------------------------------------------------*/ - -#define NOF_ACQ_REGS 12 - -// Register id's of MMIO slave accesible registers -#define ACQ_START_ADDR_REG_ID 0 -#define ACQ_MEM_REGION_SIZE_REG_ID 1 -#define ACQ_NUM_MEM_REGIONS_REG_ID 2 -#define ACQ_INIT_REG_ID 3 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 -#define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 -#define ACQ_LAST_COMMAND_REG_ID 6 -#define ACQ_NEXT_COMMAND_REG_ID 7 -#define ACQ_LAST_ACKNOWLEDGE_REG_ID 8 -#define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 -#define ACQ_FSM_STATE_INFO_REG_ID 10 -#define ACQ_INT_CNTR_INFO_REG_ID 11 - -// Register width -#define ACQ_START_ADDR_REG_WIDTH 9 -#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ACQ_INIT_REG_WIDTH 3 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 -#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 -#define ACQ_LAST_COMMAND_REG_WIDTH 32 -#define ACQ_NEXT_COMMAND_REG_WIDTH 32 -#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS * 3)) -#define ACQ_INT_CNTR_INFO_REG_WIDTH 32 - -/* register reset value */ -#define ACQ_START_ADDR_REG_RSTVAL 0 -#define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 -#define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define ACQ_INIT_REG_RSTVAL 0 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 -#define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 -#define ACQ_LAST_COMMAND_REG_RSTVAL 0 -#define ACQ_NEXT_COMMAND_REG_RSTVAL 0 -#define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 -#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 -#define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 -#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 - -/* bit definitions */ -#define ACQ_INIT_RST_REG_BIT 0 -#define ACQ_INIT_RESYNC_BIT 2 -#define ACQ_INIT_RST_IDX ACQ_INIT_RST_REG_BIT -#define ACQ_INIT_RST_BITS 1 -#define ACQ_INIT_RESYNC_IDX ACQ_INIT_RESYNC_BIT -#define ACQ_INIT_RESYNC_BITS 1 - -/* --------------------------------------------------*/ -/* TOKEN INFO */ -/* --------------------------------------------------*/ -#define ACQ_TOKEN_ID_LSB 0 -#define ACQ_TOKEN_ID_MSB 3 -#define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 -#define ACQ_TOKEN_ID_IDX 0 -#define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH -#define ACQ_INIT_CMD_INIT_IDX 4 -#define ACQ_INIT_CMD_INIT_BITS 3 -#define ACQ_CMD_START_ADDR_IDX 4 -#define ACQ_CMD_START_ADDR_BITS 9 -#define ACQ_CMD_NOFWORDS_IDX 13 -#define ACQ_CMD_NOFWORDS_BITS 9 -#define ACQ_MEM_REGION_ID_IDX 22 -#define ACQ_MEM_REGION_ID_BITS 9 -#define ACQ_PACKET_LENGTH_TOKEN_MSB 21 -#define ACQ_PACKET_LENGTH_TOKEN_LSB 13 -#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 -#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_LSB 4 -#define ACQ_PACKET_CH_ID_TOKEN_MSB 11 -#define ACQ_PACKET_CH_ID_TOKEN_LSB 10 -#define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ -#define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ - -/* Command tokens IDs */ -#define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b -#define ACQ_READ_REGION_TOKEN_ID 1 //0001b -#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b -#define ACQ_INIT_TOKEN_ID 8 //1000b - -/* Acknowledge token IDs */ -#define ACQ_READ_REGION_ACK_TOKEN_ID 0 //0000b -#define ACQ_END_OF_PACKET_TOKEN_ID 4 //0100b -#define ACQ_END_OF_REGION_TOKEN_ID 5 //0101b -#define ACQ_SOP_MISMATCH_TOKEN_ID 6 //0110b -#define ACQ_UNDEF_PH_TOKEN_ID 7 //0111b - -#define ACQ_TOKEN_MEMREGIONID_MSB 30 -#define ACQ_TOKEN_MEMREGIONID_LSB 22 -#define ACQ_TOKEN_NOFWORDS_MSB 21 -#define ACQ_TOKEN_NOFWORDS_LSB 13 -#define ACQ_TOKEN_STARTADDR_MSB 12 -#define ACQ_TOKEN_STARTADDR_LSB 4 - -/* --------------------------------------------------*/ -/* MIPI */ -/* --------------------------------------------------*/ - -#define WORD_COUNT_WIDTH 16 -#define PKT_CODE_WIDTH 6 -#define CHN_NO_WIDTH 2 -#define ERROR_INFO_WIDTH 8 - -#define LONG_PKTCODE_MAX 63 -#define LONG_PKTCODE_MIN 16 -#define SHORT_PKTCODE_MAX 15 - -#define EOF_CODE 1 - -/* --------------------------------------------------*/ -/* Packet Info */ -/* --------------------------------------------------*/ -#define ACQ_START_OF_FRAME 0 -#define ACQ_END_OF_FRAME 1 -#define ACQ_START_OF_LINE 2 -#define ACQ_END_OF_LINE 3 -#define ACQ_LINE_PAYLOAD 4 -#define ACQ_GEN_SH_PKT 5 - -/* bit definition */ -#define ACQ_PKT_TYPE_IDX 16 -#define ACQ_PKT_TYPE_BITS 6 -#define ACQ_PKT_SOP_IDX 32 -#define ACQ_WORD_CNT_IDX 0 -#define ACQ_WORD_CNT_BITS 16 -#define ACQ_PKT_INFO_IDX 16 -#define ACQ_PKT_INFO_BITS 8 -#define ACQ_HEADER_DATA_IDX 0 -#define ACQ_HEADER_DATA_BITS 16 -#define ACQ_ACK_TOKEN_ID_IDX ACQ_TOKEN_ID_IDX -#define ACQ_ACK_TOKEN_ID_BITS ACQ_TOKEN_ID_BITS -#define ACQ_ACK_NOFWORDS_IDX 13 -#define ACQ_ACK_NOFWORDS_BITS 9 -#define ACQ_ACK_PKT_LEN_IDX 4 -#define ACQ_ACK_PKT_LEN_BITS 16 - -/* --------------------------------------------------*/ -/* Packet Data Type */ -/* --------------------------------------------------*/ - -#define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ -#define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ -#define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ -#define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ -#define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ -#define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ -#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ -#define ACQ_SOL_DATA 2 /* 00 0010 line start */ -#define ACQ_EOL_DATA 3 /* 00 0011 line end */ -#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -#define ACQ_RESERVED_DATA_TYPE_MIN 56 -#define ACQ_RESERVED_DATA_TYPE_MAX 63 -#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 -#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 -#define ACQ_YUV_RESERVED_DATA_TYPE 27 -#define ACQ_RGB_RESERVED_DATA_TYPE_MIN 37 -#define ACQ_RGB_RESERVED_DATA_TYPE_MAX 39 -#define ACQ_RAW_RESERVED_DATA_TYPE_MIN 46 -#define ACQ_RAW_RESERVED_DATA_TYPE_MAX 47 - -/* --------------------------------------------------*/ - -#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h deleted file mode 100644 index 5ab796e5a53f0..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp_capture_defs.h +++ /dev/null @@ -1,278 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _isp_capture_defs_h -#define _isp_capture_defs_h - -#define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ -#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM / 8) -#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ -#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM - -/* --------------------------------------------------*/ - -#define NOF_IRQS 2 - -/* --------------------------------------------------*/ -/* REGISTER INFO */ -/* --------------------------------------------------*/ - -// Number of registers -#define CAPT_NOF_REGS 16 - -// Register id's of MMIO slave accesible registers -#define CAPT_START_MODE_REG_ID 0 -#define CAPT_START_ADDR_REG_ID 1 -#define CAPT_MEM_REGION_SIZE_REG_ID 2 -#define CAPT_NUM_MEM_REGIONS_REG_ID 3 -#define CAPT_INIT_REG_ID 4 -#define CAPT_START_REG_ID 5 -#define CAPT_STOP_REG_ID 6 - -#define CAPT_PACKET_LENGTH_REG_ID 7 -#define CAPT_RECEIVED_LENGTH_REG_ID 8 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 -#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 -#define CAPT_LAST_COMMAND_REG_ID 11 -#define CAPT_NEXT_COMMAND_REG_ID 12 -#define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 -#define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 -#define CAPT_FSM_STATE_INFO_REG_ID 15 - -// Register width -#define CAPT_START_MODE_REG_WIDTH 1 - -#define CAPT_START_REG_WIDTH 1 -#define CAPT_STOP_REG_WIDTH 1 - -/* --------------------------------------------------*/ -/* FSM */ -/* --------------------------------------------------*/ -#define CAPT_WRITE2MEM_FSM_STATE_BITS 2 -#define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 - -#define CAPT_PACKET_LENGTH_REG_WIDTH 17 -#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 -#define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 -#define CAPT_LAST_COMMAND_REG_WIDTH 32 -#define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) - -/* register reset value */ -#define CAPT_START_MODE_REG_RSTVAL 0 -#define CAPT_START_ADDR_REG_RSTVAL 0 -#define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 -#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define CAPT_INIT_REG_RSTVAL 0 - -#define CAPT_START_REG_RSTVAL 0 -#define CAPT_STOP_REG_RSTVAL 0 - -#define CAPT_PACKET_LENGTH_REG_RSTVAL 0 -#define CAPT_RECEIVED_LENGTH_REG_RSTVAL 0 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 -#define CAPT_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 -#define CAPT_LAST_COMMAND_REG_RSTVAL 0 -#define CAPT_NEXT_COMMAND_REG_RSTVAL 0 -#define CAPT_LAST_ACKNOWLEDGE_REG_RSTVAL 0 -#define CAPT_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 -#define CAPT_FSM_STATE_INFO_REG_RSTVAL 0 - -/* bit definitions */ -#define CAPT_INIT_RST_REG_BIT 0 -#define CAPT_INIT_FLUSH_BIT 1 -#define CAPT_INIT_RESYNC_BIT 2 -#define CAPT_INIT_RESTART_BIT 3 -#define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 - -#define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT -#define CAPT_INIT_RST_REG_BITS 1 -#define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT -#define CAPT_INIT_FLUSH_BITS 1 -#define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT -#define CAPT_INIT_RESYNC_BITS 1 -#define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT -#define CAPT_INIT_RESTART_BITS 1 -#define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB - -/* --------------------------------------------------*/ -/* TOKEN INFO */ -/* --------------------------------------------------*/ -#define CAPT_TOKEN_ID_LSB 0 -#define CAPT_TOKEN_ID_MSB 3 -#define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ - -/* Command tokens IDs */ -#define CAPT_START_TOKEN_ID 0 /* 0000b */ -#define CAPT_STOP_TOKEN_ID 1 /* 0001b */ -#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ -#define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ -#define CAPT_INIT_TOKEN_ID 8 /* 1000b */ - -#define CAPT_START_TOKEN_BIT 0 -#define CAPT_STOP_TOKEN_BIT 0 -#define CAPT_FREEZE_TOKEN_BIT 0 -#define CAPT_RESUME_TOKEN_BIT 0 -#define CAPT_INIT_TOKEN_BIT 0 - -/* Acknowledge token IDs */ -#define CAPT_END_OF_PACKET_RECEIVED_TOKEN_ID 0 /* 0000b */ -#define CAPT_END_OF_PACKET_WRITTEN_TOKEN_ID 1 /* 0001b */ -#define CAPT_END_OF_REGION_WRITTEN_TOKEN_ID 2 /* 0010b */ -#define CAPT_FLUSH_DONE_TOKEN_ID 3 /* 0011b */ -#define CAPT_PREMATURE_SOP_TOKEN_ID 4 /* 0100b */ -#define CAPT_MISSING_SOP_TOKEN_ID 5 /* 0101b */ -#define CAPT_UNDEF_PH_TOKEN_ID 6 /* 0110b */ -#define CAPT_STOP_ACK_TOKEN_ID 7 /* 0111b */ - -#define CAPT_PACKET_LENGTH_TOKEN_MSB 19 -#define CAPT_PACKET_LENGTH_TOKEN_LSB 4 -#define CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB 20 -#define CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB 4 -#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB 25 -#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 -#define CAPT_PACKET_CH_ID_TOKEN_MSB 27 -#define CAPT_PACKET_CH_ID_TOKEN_LSB 26 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 - -/* bit definition */ -#define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB -#define CAPT_CMD_BITS (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) -#define CAPT_SOP_IDX 32 -#define CAPT_SOP_BITS 1 -#define CAPT_PKT_INFO_IDX 16 -#define CAPT_PKT_INFO_BITS 8 -#define CAPT_PKT_TYPE_IDX 0 -#define CAPT_PKT_TYPE_BITS 6 -#define CAPT_HEADER_DATA_IDX 0 -#define CAPT_HEADER_DATA_BITS 16 -#define CAPT_PKT_DATA_IDX 0 -#define CAPT_PKT_DATA_BITS 32 -#define CAPT_WORD_CNT_IDX 0 -#define CAPT_WORD_CNT_BITS 16 -#define CAPT_ACK_TOKEN_ID_IDX 0 -#define CAPT_ACK_TOKEN_ID_BITS 4 -//#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB -//#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) -//#define CAPT_ACK_PKT_INFO_IDX 20 -//#define CAPT_ACK_PKT_INFO_BITS 8 -//#define CAPT_ACK_MEM_REG_ID1_IDX 20 /* for capt_end_of_packet_written */ -//#define CAPT_ACK_MEM_REG_ID2_IDX 4 /* for capt_end_of_region_written */ -#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB -#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) -#define CAPT_ACK_SUPER_PKT_LEN_IDX CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB -#define CAPT_ACK_SUPER_PKT_LEN_BITS (CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB - CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB + 1) -#define CAPT_ACK_PKT_INFO_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB -#define CAPT_ACK_PKT_INFO_BITS (CAPT_PACKET_CH_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) -#define CAPT_ACK_MEM_REGION_ID_IDX CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB -#define CAPT_ACK_MEM_REGION_ID_BITS (CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB - CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB + 1) -#define CAPT_ACK_PKT_TYPE_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB -#define CAPT_ACK_PKT_TYPE_BITS (CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) -#define CAPT_INIT_TOKEN_INIT_IDX 4 -#define CAPT_INIT_TOKEN_INIT_BITS 22 - -/* --------------------------------------------------*/ -/* MIPI */ -/* --------------------------------------------------*/ - -#define CAPT_WORD_COUNT_WIDTH 16 -#define CAPT_PKT_CODE_WIDTH 6 -#define CAPT_CHN_NO_WIDTH 2 -#define CAPT_ERROR_INFO_WIDTH 8 - -#define LONG_PKTCODE_MAX 63 -#define LONG_PKTCODE_MIN 16 -#define SHORT_PKTCODE_MAX 15 - -/* --------------------------------------------------*/ -/* Packet Info */ -/* --------------------------------------------------*/ -#define CAPT_START_OF_FRAME 0 -#define CAPT_END_OF_FRAME 1 -#define CAPT_START_OF_LINE 2 -#define CAPT_END_OF_LINE 3 -#define CAPT_LINE_PAYLOAD 4 -#define CAPT_GEN_SH_PKT 5 - -/* --------------------------------------------------*/ -/* Packet Data Type */ -/* --------------------------------------------------*/ - -#define CAPT_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ -#define CAPT_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ -#define CAPT_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ -#define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ -#define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ -#define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ -#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ -#define CAPT_SOL_DATA 2 /* 00 0010 line start */ -#define CAPT_EOL_DATA 3 /* 00 0011 line end */ -#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -#define CAPT_RESERVED_DATA_TYPE_MIN 56 -#define CAPT_RESERVED_DATA_TYPE_MAX 63 -#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 -#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 -#define CAPT_YUV_RESERVED_DATA_TYPE 27 -#define CAPT_RGB_RESERVED_DATA_TYPE_MIN 37 -#define CAPT_RGB_RESERVED_DATA_TYPE_MAX 39 -#define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 -#define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 - -/* --------------------------------------------------*/ -/* Capture Unit State */ -/* --------------------------------------------------*/ -#define CAPT_FREE_RUN 0 -#define CAPT_NO_SYNC 1 -#define CAPT_SYNC_SWP 2 -#define CAPT_SYNC_MWP 3 -#define CAPT_SYNC_WAIT 4 -#define CAPT_FREEZE 5 -#define CAPT_RUN 6 - -/* --------------------------------------------------*/ - -#endif /* _isp_capture_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mmu_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mmu_defs.h deleted file mode 100644 index c038f39ffd25e..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mmu_defs.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _mmu_defs_h -#define _mmu_defs_h - -#define _HRT_MMU_INVALIDATE_TLB_REG_IDX 0 -#define _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX 1 - -#define _HRT_MMU_REG_ALIGN 4 - -#endif /* _mmu_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/scalar_processor_2400_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/scalar_processor_2400_params.h deleted file mode 100644 index 9b6c2893d9507..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/scalar_processor_2400_params.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _scalar_processor_2400_params_h -#define _scalar_processor_2400_params_h - -#include "cell_params.h" - -#endif /* _scalar_processor_2400_params_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/str2mem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/str2mem_defs.h deleted file mode 100644 index 1cb62444cf68b..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/str2mem_defs.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _ST2MEM_DEFS_H -#define _ST2MEM_DEFS_H - -#define _STR2MEM_CRUN_BIT 0x100000 -#define _STR2MEM_CMD_BITS 0x0F0000 -#define _STR2MEM_COUNT_BITS 0x00FFFF - -#define _STR2MEM_BLOCKS_CMD 0xA0000 -#define _STR2MEM_PACKETS_CMD 0xB0000 -#define _STR2MEM_BYTES_CMD 0xC0000 -#define _STR2MEM_BYTES_FROM_PACKET_CMD 0xD0000 - -#define _STR2MEM_SOFT_RESET_REG_ID 0 -#define _STR2MEM_INPUT_ENDIANNESS_REG_ID 1 -#define _STR2MEM_OUTPUT_ENDIANNESS_REG_ID 2 -#define _STR2MEM_BIT_SWAPPING_REG_ID 3 -#define _STR2MEM_BLOCK_SYNC_LEVEL_REG_ID 4 -#define _STR2MEM_PACKET_SYNC_LEVEL_REG_ID 5 -#define _STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID 6 -#define _STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID 7 -#define _STR2MEM_EN_STAT_UPDATE_ID 8 - -#define _STR2MEM_REG_ALIGN 4 - -#endif /* _ST2MEM_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/streaming_to_mipi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/streaming_to_mipi_defs.h deleted file mode 100644 index 60143b8743a2d..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/streaming_to_mipi_defs.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _streaming_to_mipi_defs_h -#define _streaming_to_mipi_defs_h - -#define HIVE_STR_TO_MIPI_VALID_A_BIT 0 -#define HIVE_STR_TO_MIPI_VALID_B_BIT 1 -#define HIVE_STR_TO_MIPI_SOL_BIT 2 -#define HIVE_STR_TO_MIPI_EOL_BIT 3 -#define HIVE_STR_TO_MIPI_SOF_BIT 4 -#define HIVE_STR_TO_MIPI_EOF_BIT 5 -#define HIVE_STR_TO_MIPI_CH_ID_LSB 6 - -#define HIVE_STR_TO_MIPI_DATA_A_LSB (HIVE_STR_TO_MIPI_VALID_B_BIT + 1) - -#endif /* _streaming_to_mipi_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h deleted file mode 100644 index 75451e090f4ff..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/timed_controller_defs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _timed_controller_defs_h -#define _timed_controller_defs_h - -#define _HRT_TIMED_CONTROLLER_CMD_REG_IDX 0 - -#define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 - -#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/version.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/version.h deleted file mode 100644 index bbc4948baea9b..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/version.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef HRT_VERSION_H -#define HRT_VERSION_H -#define HRT_VERSION_MAJOR 1 -#define HRT_VERSION_MINOR 4 -#define HRT_VERSION 1_4 -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h deleted file mode 100644 index 8cac7268acd38..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifdef IA_CSS_INCLUDE_CONFIGURATIONS -#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" -#include "isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h" -#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" -#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" -#include "isp/kernels/output/output_1.0/ia_css_output.host.h" -#include "isp/kernels/qplane/qplane_2/ia_css_qplane.host.h" -#include "isp/kernels/raw/raw_1.0/ia_css_raw.host.h" -#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" -#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" - -/* ISP2401 */ -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" - -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/vf/vf_1.0/ia_css_vf.host.h" -#include "isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h" -#include "isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h" -#endif /* IA_CSS_INCLUDE_CONFIGURATIONS */ -/* Generated code: do not edit or commmit. */ - -#ifndef _IA_CSS_ISP_CONFIG_H -#define _IA_CSS_ISP_CONFIG_H - -/* Code generated by genparam/gencode.c:gen_param_enum() */ - -enum ia_css_configuration_ids { - IA_CSS_ITERATOR_CONFIG_ID, - IA_CSS_COPY_OUTPUT_CONFIG_ID, - IA_CSS_CROP_CONFIG_ID, - IA_CSS_FPN_CONFIG_ID, - IA_CSS_DVS_CONFIG_ID, - IA_CSS_QPLANE_CONFIG_ID, - IA_CSS_OUTPUT0_CONFIG_ID, - IA_CSS_OUTPUT1_CONFIG_ID, - IA_CSS_OUTPUT_CONFIG_ID, - IA_CSS_RAW_CONFIG_ID, - IA_CSS_TNR_CONFIG_ID, - IA_CSS_REF_CONFIG_ID, - IA_CSS_VF_CONFIG_ID, - - /* ISP2401 */ - IA_CSS_SC_CONFIG_ID, - - IA_CSS_NUM_CONFIGURATION_IDS -}; - -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - -struct ia_css_config_memory_offsets { - struct { - struct ia_css_isp_parameter iterator; - struct ia_css_isp_parameter copy_output; - struct ia_css_isp_parameter crop; - struct ia_css_isp_parameter fpn; - struct ia_css_isp_parameter dvs; - struct ia_css_isp_parameter qplane; - struct ia_css_isp_parameter output0; - struct ia_css_isp_parameter output1; - struct ia_css_isp_parameter output; -#ifdef ISP2401 - struct ia_css_isp_parameter sc; -#endif - struct ia_css_isp_parameter raw; - struct ia_css_isp_parameter tnr; - struct ia_css_isp_parameter ref; - struct ia_css_isp_parameter vf; - } dmem; -}; - -#if defined(IA_CSS_INCLUDE_CONFIGURATIONS) - -#include "ia_css_stream.h" /* struct ia_css_stream */ -#include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -/* ISP2401 */ -void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem); - -#endif /* IA_CSS_INCLUDE_CONFIGURATION */ - -#endif /* _IA_CSS_ISP_CONFIG_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h deleted file mode 100644 index b8b3c48492ae9..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h +++ /dev/null @@ -1,394 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#ifndef _IA_CSS_ISP_PARAM_H -#define _IA_CSS_ISP_PARAM_H - -/* Code generated by genparam/gencode.c:gen_param_enum() */ - -enum ia_css_parameter_ids { - IA_CSS_AA_ID, - IA_CSS_ANR_ID, - IA_CSS_ANR2_ID, - IA_CSS_BH_ID, - IA_CSS_CNR_ID, - IA_CSS_CROP_ID, - IA_CSS_CSC_ID, - IA_CSS_DP_ID, - IA_CSS_BNR_ID, - IA_CSS_DE_ID, - IA_CSS_ECD_ID, - IA_CSS_FORMATS_ID, - IA_CSS_FPN_ID, - IA_CSS_GC_ID, - IA_CSS_CE_ID, - IA_CSS_YUV2RGB_ID, - IA_CSS_RGB2YUV_ID, - IA_CSS_R_GAMMA_ID, - IA_CSS_G_GAMMA_ID, - IA_CSS_B_GAMMA_ID, - IA_CSS_UDS_ID, - IA_CSS_RAA_ID, - IA_CSS_S3A_ID, - IA_CSS_OB_ID, - IA_CSS_OUTPUT_ID, - IA_CSS_SC_ID, - IA_CSS_BDS_ID, - IA_CSS_TNR_ID, - IA_CSS_MACC_ID, - IA_CSS_SDIS_HORICOEF_ID, - IA_CSS_SDIS_VERTCOEF_ID, - IA_CSS_SDIS_HORIPROJ_ID, - IA_CSS_SDIS_VERTPROJ_ID, - IA_CSS_SDIS2_HORICOEF_ID, - IA_CSS_SDIS2_VERTCOEF_ID, - IA_CSS_SDIS2_HORIPROJ_ID, - IA_CSS_SDIS2_VERTPROJ_ID, - IA_CSS_WB_ID, - IA_CSS_NR_ID, - IA_CSS_YEE_ID, - IA_CSS_YNR_ID, - IA_CSS_FC_ID, - IA_CSS_CTC_ID, - IA_CSS_XNR_TABLE_ID, - IA_CSS_XNR_ID, - IA_CSS_XNR3_ID, - IA_CSS_NUM_PARAMETER_IDS -}; - -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - -struct ia_css_memory_offsets { - struct { - struct ia_css_isp_parameter aa; - struct ia_css_isp_parameter anr; - struct ia_css_isp_parameter bh; - struct ia_css_isp_parameter cnr; - struct ia_css_isp_parameter crop; - struct ia_css_isp_parameter csc; - struct ia_css_isp_parameter dp; - struct ia_css_isp_parameter bnr; - struct ia_css_isp_parameter de; - struct ia_css_isp_parameter ecd; - struct ia_css_isp_parameter formats; - struct ia_css_isp_parameter fpn; - struct ia_css_isp_parameter gc; - struct ia_css_isp_parameter ce; - struct ia_css_isp_parameter yuv2rgb; - struct ia_css_isp_parameter rgb2yuv; - struct ia_css_isp_parameter uds; - struct ia_css_isp_parameter raa; - struct ia_css_isp_parameter s3a; - struct ia_css_isp_parameter ob; - struct ia_css_isp_parameter output; - struct ia_css_isp_parameter sc; - struct ia_css_isp_parameter bds; - struct ia_css_isp_parameter tnr; - struct ia_css_isp_parameter macc; - struct ia_css_isp_parameter sdis_horiproj; - struct ia_css_isp_parameter sdis_vertproj; - struct ia_css_isp_parameter sdis2_horiproj; - struct ia_css_isp_parameter sdis2_vertproj; - struct ia_css_isp_parameter wb; - struct ia_css_isp_parameter nr; - struct ia_css_isp_parameter yee; - struct ia_css_isp_parameter ynr; - struct ia_css_isp_parameter fc; - struct ia_css_isp_parameter ctc; - struct ia_css_isp_parameter xnr; - struct ia_css_isp_parameter xnr3; - struct ia_css_isp_parameter get; - struct ia_css_isp_parameter put; - } dmem; - struct { - struct ia_css_isp_parameter anr2; - struct ia_css_isp_parameter ob; - struct ia_css_isp_parameter sdis_horicoef; - struct ia_css_isp_parameter sdis_vertcoef; - struct ia_css_isp_parameter sdis2_horicoef; - struct ia_css_isp_parameter sdis2_vertcoef; - - /* ISP2401 */ - struct ia_css_isp_parameter xnr3; - } vmem; - struct { - struct ia_css_isp_parameter bh; - } hmem0; - struct { - struct ia_css_isp_parameter gc; - struct ia_css_isp_parameter g_gamma; - struct ia_css_isp_parameter xnr_table; - } vamem1; - struct { - struct ia_css_isp_parameter r_gamma; - struct ia_css_isp_parameter ctc; - } vamem0; - struct { - struct ia_css_isp_parameter b_gamma; - } vamem2; -}; - -#if defined(IA_CSS_INCLUDE_PARAMETERS) - -#include "ia_css_stream.h" /* struct ia_css_stream */ -#include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/gencode.c:gen_param_process_table() */ - -struct ia_css_pipeline_stage; /* forward declaration */ - -extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config); - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config); - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -; - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -; - -#endif /* IA_CSS_INCLUDE_PARAMETER */ -#endif /* _IA_CSS_ISP_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h deleted file mode 100644 index cc9cdcd0e2be8..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#define IA_CSS_INCLUDE_STATES -#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" -#include "isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h" -#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" -#include "isp/kernels/de/de_1.0/ia_css_de.host.h" -#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" -#include "isp/kernels/ref/ref_1.0/ia_css_ref.host.h" -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" -#include "isp/kernels/dpc2/ia_css_dpc2.host.h" -#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" -/* Generated code: do not edit or commmit. */ - -#ifndef _IA_CSS_ISP_STATE_H -#define _IA_CSS_ISP_STATE_H - -/* Code generated by genparam/gencode.c:gen_param_enum() */ - -enum ia_css_state_ids { - IA_CSS_AA_STATE_ID, - IA_CSS_CNR_STATE_ID, - IA_CSS_CNR2_STATE_ID, - IA_CSS_DP_STATE_ID, - IA_CSS_DE_STATE_ID, - IA_CSS_TNR_STATE_ID, - IA_CSS_REF_STATE_ID, - IA_CSS_YNR_STATE_ID, - IA_CSS_NUM_STATE_IDS -}; - -/* Code generated by genparam/gencode.c:gen_param_offsets() */ - -struct ia_css_state_memory_offsets { - struct { - struct ia_css_isp_parameter aa; - struct ia_css_isp_parameter cnr; - struct ia_css_isp_parameter cnr2; - struct ia_css_isp_parameter dp; - struct ia_css_isp_parameter de; - struct ia_css_isp_parameter ynr; - } vmem; - struct { - struct ia_css_isp_parameter tnr; - struct ia_css_isp_parameter ref; - } dmem; -}; - -#if defined(IA_CSS_INCLUDE_STATES) - -#include "ia_css_stream.h" /* struct ia_css_stream */ -#include "ia_css_binary.h" /* struct ia_css_binary */ -/* Code generated by genparam/genstate.c:gen_state_init_table() */ - -extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( - const struct ia_css_binary *binary); - -#endif /* IA_CSS_INCLUDE_STATE */ - -#endif /* _IA_CSS_ISP_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h deleted file mode 100644 index c6d2a5cba2134..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/bits.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_BITS_H -#define _HRT_BITS_H - -#include "defs.h" - -#define _hrt_ones(n) HRTCAT(_hrt_ones_, n) -#define _hrt_ones_0x0 0x00000000U -#define _hrt_ones_0x1 0x00000001U -#define _hrt_ones_0x2 0x00000003U -#define _hrt_ones_0x3 0x00000007U -#define _hrt_ones_0x4 0x0000000FU -#define _hrt_ones_0x5 0x0000001FU -#define _hrt_ones_0x6 0x0000003FU -#define _hrt_ones_0x7 0x0000007FU -#define _hrt_ones_0x8 0x000000FFU -#define _hrt_ones_0x9 0x000001FFU -#define _hrt_ones_0xA 0x000003FFU -#define _hrt_ones_0xB 0x000007FFU -#define _hrt_ones_0xC 0x00000FFFU -#define _hrt_ones_0xD 0x00001FFFU -#define _hrt_ones_0xE 0x00003FFFU -#define _hrt_ones_0xF 0x00007FFFU -#define _hrt_ones_0x10 0x0000FFFFU -#define _hrt_ones_0x11 0x0001FFFFU -#define _hrt_ones_0x12 0x0003FFFFU -#define _hrt_ones_0x13 0x0007FFFFU -#define _hrt_ones_0x14 0x000FFFFFU -#define _hrt_ones_0x15 0x001FFFFFU -#define _hrt_ones_0x16 0x003FFFFFU -#define _hrt_ones_0x17 0x007FFFFFU -#define _hrt_ones_0x18 0x00FFFFFFU -#define _hrt_ones_0x19 0x01FFFFFFU -#define _hrt_ones_0x1A 0x03FFFFFFU -#define _hrt_ones_0x1B 0x07FFFFFFU -#define _hrt_ones_0x1C 0x0FFFFFFFU -#define _hrt_ones_0x1D 0x1FFFFFFFU -#define _hrt_ones_0x1E 0x3FFFFFFFU -#define _hrt_ones_0x1F 0x7FFFFFFFU -#define _hrt_ones_0x20 0xFFFFFFFFU - -#define _hrt_ones_0 _hrt_ones_0x0 -#define _hrt_ones_1 _hrt_ones_0x1 -#define _hrt_ones_2 _hrt_ones_0x2 -#define _hrt_ones_3 _hrt_ones_0x3 -#define _hrt_ones_4 _hrt_ones_0x4 -#define _hrt_ones_5 _hrt_ones_0x5 -#define _hrt_ones_6 _hrt_ones_0x6 -#define _hrt_ones_7 _hrt_ones_0x7 -#define _hrt_ones_8 _hrt_ones_0x8 -#define _hrt_ones_9 _hrt_ones_0x9 -#define _hrt_ones_10 _hrt_ones_0xA -#define _hrt_ones_11 _hrt_ones_0xB -#define _hrt_ones_12 _hrt_ones_0xC -#define _hrt_ones_13 _hrt_ones_0xD -#define _hrt_ones_14 _hrt_ones_0xE -#define _hrt_ones_15 _hrt_ones_0xF -#define _hrt_ones_16 _hrt_ones_0x10 -#define _hrt_ones_17 _hrt_ones_0x11 -#define _hrt_ones_18 _hrt_ones_0x12 -#define _hrt_ones_19 _hrt_ones_0x13 -#define _hrt_ones_20 _hrt_ones_0x14 -#define _hrt_ones_21 _hrt_ones_0x15 -#define _hrt_ones_22 _hrt_ones_0x16 -#define _hrt_ones_23 _hrt_ones_0x17 -#define _hrt_ones_24 _hrt_ones_0x18 -#define _hrt_ones_25 _hrt_ones_0x19 -#define _hrt_ones_26 _hrt_ones_0x1A -#define _hrt_ones_27 _hrt_ones_0x1B -#define _hrt_ones_28 _hrt_ones_0x1C -#define _hrt_ones_29 _hrt_ones_0x1D -#define _hrt_ones_30 _hrt_ones_0x1E -#define _hrt_ones_31 _hrt_ones_0x1F -#define _hrt_ones_32 _hrt_ones_0x20 - -#define _hrt_mask(b, n) \ - (_hrt_ones(n) << (b)) -#define _hrt_get_bits(w, b, n) \ - (((w) >> (b)) & _hrt_ones(n)) -#define _hrt_set_bits(w, b, n, v) \ - (((w) & ~_hrt_mask(b, n)) | (((v) & _hrt_ones(n)) << (b))) -#define _hrt_get_bit(w, b) \ - (((w) >> (b)) & 1) -#define _hrt_set_bit(w, b, v) \ - (((w) & (~(1 << (b)))) | (((v) & 1) << (b))) -#define _hrt_set_lower_half(w, v) \ - _hrt_set_bits(w, 0, 16, v) -#define _hrt_set_upper_half(w, v) \ - _hrt_set_bits(w, 16, 16, v) - -#endif /* _HRT_BITS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h deleted file mode 100644 index 0eabc59ff5afb..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/cell_params.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _cell_params_h -#define _cell_params_h - -#define SP_PMEM_LOG_WIDTH_BITS 6 /*Width of PC, 64 bits, 8 bytes*/ -#define SP_ICACHE_TAG_BITS 4 /*size of tag*/ -#define SP_ICACHE_SET_BITS 8 /* 256 sets*/ -#define SP_ICACHE_BLOCKS_PER_SET_BITS 1 /* 2 way associative*/ -#define SP_ICACHE_BLOCK_ADDRESS_BITS 11 /* 2048 lines capacity*/ - -#define SP_ICACHE_ADDRESS_BITS \ - (SP_ICACHE_TAG_BITS + SP_ICACHE_BLOCK_ADDRESS_BITS) - -#define SP_PMEM_DEPTH BIT(SP_ICACHE_ADDRESS_BITS) - -#define SP_FIFO_0_DEPTH 0 -#define SP_FIFO_1_DEPTH 0 -#define SP_FIFO_2_DEPTH 0 -#define SP_FIFO_3_DEPTH 0 -#define SP_FIFO_4_DEPTH 0 -#define SP_FIFO_5_DEPTH 0 -#define SP_FIFO_6_DEPTH 0 -#define SP_FIFO_7_DEPTH 0 - -#define SP_SLV_BUS_MAXBURSTSIZE 1 - -#endif /* _cell_params_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h deleted file mode 100644 index 99d292164efca..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_common_defs.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _css_receiver_2400_common_defs_h_ -#define _css_receiver_2400_common_defs_h_ -#ifndef _mipi_backend_common_defs_h_ -#define _mipi_backend_common_defs_h_ - -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH 16 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH 2 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH 3 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH (_HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_CH_ID_WIDTH + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_WIDTH 32 /* use 32 to be compatibel with streaming monitor !, MSB's of interface are tied to '0' */ - -/* Definition of data format ID at the interface CSS_receiver capture/acquisition units */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8 24 /* 01 1000 YUV420 8-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10 25 /* 01 1001 YUV420 10-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8L 26 /* 01 1010 YUV420 8-bit legacy */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_8 30 /* 01 1110 YUV422 8-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV422_10 31 /* 01 1111 YUV422 10-bit */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB444 32 /* 10 0000 RGB444 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB555 33 /* 10 0001 RGB555 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB565 34 /* 10 0010 RGB565 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB666 35 /* 10 0011 RGB666 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RGB888 36 /* 10 0100 RGB888 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW6 40 /* 10 1000 RAW6 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW7 41 /* 10 1001 RAW7 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW8 42 /* 10 1010 RAW8 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW10 43 /* 10 1011 RAW10 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW12 44 /* 10 1100 RAW12 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW14 45 /* 10 1101 RAW14 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_1 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_2 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_3 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_4 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_5 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_6 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_7 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_USR_DEF_8 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_Emb 18 /* 01 0010 embedded eight bit non image data */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_SOF 0 /* 00 0000 frame start */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_EOF 1 /* 00 0001 frame end */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_SOL 2 /* 00 0010 line start */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_EOL 3 /* 00 0011 line end */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH1 8 /* 00 1000 Generic Short Packet Code 1 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH2 9 /* 00 1001 Generic Short Packet Code 2 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH3 10 /* 00 1010 Generic Short Packet Code 3 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH4 11 /* 00 1011 Generic Short Packet Code 4 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH5 12 /* 00 1100 Generic Short Packet Code 5 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH6 13 /* 00 1101 Generic Short Packet Code 6 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH7 14 /* 00 1110 Generic Short Packet Code 7 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_GEN_SH8 15 /* 00 1111 Generic Short Packet Code 8 */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_8_CSPS 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_YUV420_10_CSPS 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -/* used reserved mipi positions for these */ -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW16 46 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18 47 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_2 37 -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_RAW18_3 38 - -#define _HRT_CSS_RECEIVER_2400_DATA_FORMAT_ID_WIDTH 6 - -/* Definition of format_types at the interface CSS --> input_selector*/ -/* !! Changes here should be copied to systems/isp/isp_css/bin/conv_transmitter_cmd.tcl !! */ -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB888 0 // 36 'h24 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB555 1 // 33 'h -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB444 2 // 32 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB565 3 // 34 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RGB666 4 // 35 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW8 5 // 42 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW10 6 // 43 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW6 7 // 40 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW7 8 // 41 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW12 9 // 43 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW14 10 // 45 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8 11 // 30 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10 12 // 25 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_8 13 // 30 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV422_10 14 // 31 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_1 15 // 48 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8L 16 // 26 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_Emb 17 // 18 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_2 18 // 49 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_3 19 // 50 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_4 20 // 51 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_5 21 // 52 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_6 22 // 53 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_7 23 // 54 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_USR_DEF_8 24 // 55 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_8_CSPS 25 // 28 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_YUV420_10_CSPS 26 // 29 -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW16 27 // ? -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18 28 // ? -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_2 29 // ? Option 2 for depacketiser -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_RAW18_3 30 // ? Option 3 for depacketiser -#define _HRT_CSS_RECEIVER_2400_FMT_TYPE_CUSTOM 31 // to signal custom decoding - -/* definition for state machine of data FIFO for decode different type of data */ -#define _HRT_CSS_RECEIVER_2400_YUV420_8_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_YUV420_10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_YUV420_8L_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_YUV422_8_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_YUV422_10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_RGB444_REPEAT_PTN 2 -#define _HRT_CSS_RECEIVER_2400_RGB555_REPEAT_PTN 2 -#define _HRT_CSS_RECEIVER_2400_RGB565_REPEAT_PTN 2 -#define _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN 9 -#define _HRT_CSS_RECEIVER_2400_RGB888_REPEAT_PTN 3 -#define _HRT_CSS_RECEIVER_2400_RAW6_REPEAT_PTN 3 -#define _HRT_CSS_RECEIVER_2400_RAW7_REPEAT_PTN 7 -#define _HRT_CSS_RECEIVER_2400_RAW8_REPEAT_PTN 1 -#define _HRT_CSS_RECEIVER_2400_RAW10_REPEAT_PTN 5 -#define _HRT_CSS_RECEIVER_2400_RAW12_REPEAT_PTN 3 -#define _HRT_CSS_RECEIVER_2400_RAW14_REPEAT_PTN 7 - -#define _HRT_CSS_RECEIVER_2400_MAX_REPEAT_PTN _HRT_CSS_RECEIVER_2400_RGB666_REPEAT_PTN - -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FMT_WIDTH 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_IDX 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_PRED_WIDTH 1 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_USD_BITS 4 /* bits per USD type */ - -#define _HRT_CSS_RECEIVER_2400_BE_RAW16_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_RAW16_EN_IDX 6 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_OPTION_IDX 6 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_EN_IDX 8 - -#define _HRT_CSS_RECEIVER_2400_BE_COMP_NO_COMP 0 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_6_10 1 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_7_10 2 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_10_8_10 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_6_12 4 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_7_12 5 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_12_8_12 6 - -/* packet bit definition */ -#define _HRT_CSS_RECEIVER_2400_PKT_SOP_IDX 32 -#define _HRT_CSS_RECEIVER_2400_PKT_SOP_BITS 1 -#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_IDX 22 -#define _HRT_CSS_RECEIVER_2400_PKT_CH_ID_BITS 2 -#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_IDX 16 -#define _HRT_CSS_RECEIVER_2400_PKT_FMT_ID_BITS 6 -#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_IDX 0 -#define _HRT_CSS_RECEIVER_2400_PH_DATA_FIELD_BITS 16 -#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_IDX 0 -#define _HRT_CSS_RECEIVER_2400_PKT_PAYLOAD_BITS 32 - -/*************************************************************************************************/ -/* Custom Decoding */ -/* These Custom Defs are defined based on design-time config in "csi_be_pixel_formatter.chdl" !! */ -/*************************************************************************************************/ -#define BE_CUST_EN_IDX 0 /* 2bits */ -#define BE_CUST_EN_DATAID_IDX 2 /* 6bits MIPI DATA ID */ -#define BE_CUST_EN_WIDTH 8 -#define BE_CUST_MODE_ALL 1 /* Enable Custom Decoding for all DATA IDs */ -#define BE_CUST_MODE_ONE 3 /* Enable Custom Decoding for ONE DATA ID, programmed in CUST_EN_DATA_ID */ - -/* Data State config = {get_bits(6bits), valid(1bit)} */ -#define BE_CUST_DATA_STATE_S0_IDX 0 /* 7bits */ -#define BE_CUST_DATA_STATE_S1_IDX 7 /* 7bits */ -#define BE_CUST_DATA_STATE_S2_IDX 14 /* 7bits */ -#define BE_CUST_DATA_STATE_WIDTH 21 -#define BE_CUST_DATA_STATE_VALID_IDX 0 /* 1bits */ -#define BE_CUST_DATA_STATE_GETBITS_IDX 1 /* 6bits */ - -/* Pixel Extractor config */ -#define BE_CUST_PIX_EXT_DATA_ALIGN_IDX 0 /* 5bits */ -#define BE_CUST_PIX_EXT_PIX_ALIGN_IDX 5 /* 5bits */ -#define BE_CUST_PIX_EXT_PIX_MASK_IDX 10 /* 18bits */ -#define BE_CUST_PIX_EXT_PIX_EN_IDX 28 /* 1bits */ -#define BE_CUST_PIX_EXT_WIDTH 29 - -/* Pixel Valid & EoP config = {[eop,valid](especial), [eop,valid](normal)} */ -#define BE_CUST_PIX_VALID_EOP_P0_IDX 0 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_P1_IDX 4 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_P2_IDX 8 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_P3_IDX 12 /* 4bits */ -#define BE_CUST_PIX_VALID_EOP_WIDTH 16 -#define BE_CUST_PIX_VALID_EOP_NOR_VALID_IDX 0 /* Normal (NO less get_bits case) Valid - 1bits */ -#define BE_CUST_PIX_VALID_EOP_NOR_EOP_IDX 1 /* Normal (NO less get_bits case) EoP - 1bits */ -#define BE_CUST_PIX_VALID_EOP_ESP_VALID_IDX 2 /* Especial (less get_bits case) Valid - 1bits */ -#define BE_CUST_PIX_VALID_EOP_ESP_EOP_IDX 3 /* Especial (less get_bits case) EoP - 1bits */ - -#endif /* _mipi_backend_common_defs_h_ */ -#endif /* _css_receiver_2400_common_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_defs.h deleted file mode 100644 index f4b2b41b6d943..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/css_receiver_2400_defs.h +++ /dev/null @@ -1,256 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _css_receiver_2400_defs_h_ -#define _css_receiver_2400_defs_h_ - -#include "css_receiver_2400_common_defs.h" - -#define CSS_RECEIVER_DATA_WIDTH 8 -#define CSS_RECEIVER_RX_TRIG 4 -#define CSS_RECEIVER_RF_WORD 32 -#define CSS_RECEIVER_IMG_PROC_RF_ADDR 10 -#define CSS_RECEIVER_CSI_RF_ADDR 4 -#define CSS_RECEIVER_DATA_OUT 12 -#define CSS_RECEIVER_CHN_NO 2 -#define CSS_RECEIVER_DWORD_CNT 11 -#define CSS_RECEIVER_FORMAT_TYP 5 -#define CSS_RECEIVER_HRESPONSE 2 -#define CSS_RECEIVER_STATE_WIDTH 3 -#define CSS_RECEIVER_FIFO_DAT 32 -#define CSS_RECEIVER_CNT_VAL 2 -#define CSS_RECEIVER_PRED10_VAL 10 -#define CSS_RECEIVER_PRED12_VAL 12 -#define CSS_RECEIVER_CNT_WIDTH 8 -#define CSS_RECEIVER_WORD_CNT 16 -#define CSS_RECEIVER_PIXEL_LEN 6 -#define CSS_RECEIVER_PIXEL_CNT 5 -#define CSS_RECEIVER_COMP_8_BIT 8 -#define CSS_RECEIVER_COMP_7_BIT 7 -#define CSS_RECEIVER_COMP_6_BIT 6 - -#define CSI_CONFIG_WIDTH 4 - -/* division of gen_short data, ch_id and fmt_type over streaming data interface */ -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB 0 -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB - 1) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB - 1) -#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH - 1) - -#define _HRT_CSS_RECEIVER_2400_REG_ALIGN 4 -#define _HRT_CSS_RECEIVER_2400_BYTES_PER_PKT 4 - -#define hrt_css_receiver_2400_4_lane_port_offset 0x100 -#define hrt_css_receiver_2400_1_lane_port_offset 0x200 -#define hrt_css_receiver_2400_2_lane_port_offset 0x300 -#define hrt_css_receiver_2400_backend_port_offset 0x100 - -#define _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX 0 -#define _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX 1 -#define _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX 2 -#define _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX 3 -#define _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX 4 -#define _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX 7 -#define _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX 8 -#define _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX 9 -#define _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX 10 -#define _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX 11 -#define _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX 12 -#define _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX 13 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX 14 -#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX 15 -#define _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX 16 -#define _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX 17 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX 18 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX 19 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX 20 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX 21 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX 22 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX 23 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX 24 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX 25 -#define _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX 26 -#define _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX 27 -#define _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX 28 - -/* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */ -#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT 0 -#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT 1 -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT 2 -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT 3 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT 4 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT 5 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT 6 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT 7 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT 8 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT 9 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT 10 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT 11 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT 12 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT 13 -#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT 14 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_BIT 15 -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_BIT 16 - -#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_CAUSE_ "Fifo Overrun" -#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_CAUSE_ "Reserved" -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_CAUSE_ "Sleep mode entry" -#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_CAUSE_ "Sleep mode exit" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_CAUSE_ "Error high speed SOT" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_CAUSE_ "Error high speed sync SOT" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_CAUSE_ "Error control" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_CAUSE_ "Error correction double bit" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_CAUSE_ "Error correction single bit" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_CAUSE_ "No error" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_CAUSE_ "Error cyclic redundancy check" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_CAUSE_ "Error id" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_CAUSE_ "Error frame sync" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_CAUSE_ "Error frame data" -#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_CAUSE_ "Data time-out" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ESCAPE_CAUSE_ "Error escape" -#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_LINE_SYNC_CAUSE_ "Error line sync" - -/* Bits for CSI2_DEVICE_READY register */ -#define _HRT_CSS_RECEIVER_2400_CSI2_DEVICE_READY_IDX 0 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_INIT_TIME_OUT_ERR_IDX 2 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_OVER_RUN_ERR_IDX 3 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_SOT_SYNC_ERR_IDX 4 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_RECEIVE_DATA_TIME_OUT_ERR_IDX 5 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_ECC_TWO_BIT_ERR_IDX 6 -#define _HRT_CSS_RECEIVER_2400_CSI2_MASK_DATA_ID_ERR_IDX 7 - -/* Bits for CSI2_FUNC_PROG register */ -#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_CSI2_DATA_TIMEOUT_BITS 19 - -/* Bits for INIT_COUNT register */ -#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_IDX 0 -#define _HRT_CSS_RECEIVER_2400_INIT_TIMER_BITS 16 - -/* Bits for COUNT registers */ -#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_BITS 8 -#define _HRT_CSS_RECEIVER_2400_RX_COUNT_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RX_COUNT_BITS 8 - -/* Bits for RAW116_18_DATAID register */ -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW16_BITS_BITS 6 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_IDX 8 -#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_RAW18_BITS_BITS 6 - -/* Bits for COMP_FORMAT register, this selects the compression data format */ -#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS 8 -#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_IDX (_HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_IDX + _HRT_CSS_RECEIVER_2400_COMP_RAW_BITS_BITS) -#define _HRT_CSS_RECEIVER_2400_COMP_NUM_BITS_BITS 8 - -/* Bits for COMP_PREDICT register, this selects the predictor algorithm */ -#define _HRT_CSS_RECEIVER_2400_PREDICT_NO_COMP 0 -#define _HRT_CSS_RECEIVER_2400_PREDICT_1 1 -#define _HRT_CSS_RECEIVER_2400_PREDICT_2 2 - -/* Number of bits used for the delay registers */ -#define _HRT_CSS_RECEIVER_2400_DELAY_BITS 8 - -/* Bits for COMP_SCHEME register, this selects the compression scheme for a VC */ -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD1_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD2_BITS_IDX 5 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD3_BITS_IDX 10 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD4_BITS_IDX 15 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD5_BITS_IDX 20 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD6_BITS_IDX 25 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD7_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD8_BITS_IDX 5 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_BITS_BITS 5 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_IDX 0 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_FMT_BITS_BITS 3 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_IDX 3 -#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_USD_PRED_BITS_BITS 2 - -/* BITS for backend RAW16 and RAW 18 registers */ - -#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RAW18_DATAID_BITS 6 -#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_IDX 6 -#define _HRT_CSS_RECEIVER_2400_RAW18_OPTION_BITS 2 -#define _HRT_CSS_RECEIVER_2400_RAW18_EN_IDX 8 -#define _HRT_CSS_RECEIVER_2400_RAW18_EN_BITS 1 - -#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_IDX 0 -#define _HRT_CSS_RECEIVER_2400_RAW16_DATAID_BITS 6 -#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_IDX 6 -#define _HRT_CSS_RECEIVER_2400_RAW16_OPTION_BITS 2 -#define _HRT_CSS_RECEIVER_2400_RAW16_EN_IDX 8 -#define _HRT_CSS_RECEIVER_2400_RAW16_EN_BITS 1 - -/* These hsync and vsync values are for HSS simulation only */ -#define _HRT_CSS_RECEIVER_2400_HSYNC_VAL BIT(16) -#define _HRT_CSS_RECEIVER_2400_VSYNC_VAL BIT(17) - -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_WIDTH 28 -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB 0 -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_LSB + CSS_RECEIVER_DATA_OUT - 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_MSB + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_A_VAL_BIT + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_LSB + CSS_RECEIVER_DATA_OUT - 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_MSB + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_PIX_B_VAL_BIT + 1) -#define _HRT_CSS_RECEIVER_2400_BE_STREAMING_EOP_BIT (_HRT_CSS_RECEIVER_2400_BE_STREAMING_SOP_BIT + 1) - -// SH Backend Register IDs -#define _HRT_CSS_RECEIVER_2400_BE_GSP_ACC_OVL_REG_IDX 0 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_REG_IDX 1 -#define _HRT_CSS_RECEIVER_2400_BE_TWO_PPC_REG_IDX 2 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG0_IDX 3 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG1_IDX 4 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG2_IDX 5 -#define _HRT_CSS_RECEIVER_2400_BE_COMP_FORMAT_REG3_IDX 6 -#define _HRT_CSS_RECEIVER_2400_BE_SEL_REG_IDX 7 -#define _HRT_CSS_RECEIVER_2400_BE_RAW16_CONFIG_REG_IDX 8 -#define _HRT_CSS_RECEIVER_2400_BE_RAW18_CONFIG_REG_IDX 9 -#define _HRT_CSS_RECEIVER_2400_BE_FORCE_RAW8_REG_IDX 10 -#define _HRT_CSS_RECEIVER_2400_BE_IRQ_STATUS_REG_IDX 11 -#define _HRT_CSS_RECEIVER_2400_BE_IRQ_CLEAR_REG_IDX 12 -#define _HRT_CSS_RECEIVER_2400_BE_CUST_EN_REG_IDX 13 -#define _HRT_CSS_RECEIVER_2400_BE_CUST_DATA_STATE_REG_IDX 14 /* Data State 0,1,2 config */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P0_REG_IDX 15 /* Pixel Extractor config for Data State 0 & Pix 0 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P1_REG_IDX 16 /* Pixel Extractor config for Data State 0 & Pix 1 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P2_REG_IDX 17 /* Pixel Extractor config for Data State 0 & Pix 2 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S0P3_REG_IDX 18 /* Pixel Extractor config for Data State 0 & Pix 3 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P0_REG_IDX 19 /* Pixel Extractor config for Data State 1 & Pix 0 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P1_REG_IDX 20 /* Pixel Extractor config for Data State 1 & Pix 1 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P2_REG_IDX 21 /* Pixel Extractor config for Data State 1 & Pix 2 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S1P3_REG_IDX 22 /* Pixel Extractor config for Data State 1 & Pix 3 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P0_REG_IDX 23 /* Pixel Extractor config for Data State 2 & Pix 0 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P1_REG_IDX 24 /* Pixel Extractor config for Data State 2 & Pix 1 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P2_REG_IDX 25 /* Pixel Extractor config for Data State 2 & Pix 2 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_EXT_S2P3_REG_IDX 26 /* Pixel Extractor config for Data State 2 & Pix 3 */ -#define _HRT_CSS_RECEIVER_2400_BE_CUST_PIX_VALID_EOP_REG_IDX 27 /* Pixel Valid & EoP config for Pix 0,1,2,3 */ - -#define _HRT_CSS_RECEIVER_2400_BE_NOF_REGISTERS 28 - -#define _HRT_CSS_RECEIVER_2400_BE_SRST_HE 0 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_RCF 1 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_PF 2 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_SM 3 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_PD 4 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_SD 5 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_OT 6 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_BC 7 -#define _HRT_CSS_RECEIVER_2400_BE_SRST_WIDTH 8 - -#endif /* _css_receiver_2400_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/defs.h deleted file mode 100644 index 47505f41790c1..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/defs.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_DEFS_H_ -#define _HRT_DEFS_H_ - -#ifndef HRTCAT -#define _HRTCAT(m, n) m##n -#define HRTCAT(m, n) _HRTCAT(m, n) -#endif - -#ifndef HRTSTR -#define _HRTSTR(x) #x -#define HRTSTR(x) _HRTSTR(x) -#endif - -#ifndef HRTMIN -#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -#ifndef HRTMAX -#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif - -#endif /* _HRT_DEFS_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h deleted file mode 100644 index 8741b8347dd42..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _dma_v2_defs_h -#define _dma_v2_defs_h - -#define _DMA_V2_NUM_CHANNELS_ID MaxNumChannels -#define _DMA_V2_CONNECTIONS_ID Connections -#define _DMA_V2_DEV_ELEM_WIDTHS_ID DevElemWidths -#define _DMA_V2_DEV_FIFO_DEPTH_ID DevFifoDepth -#define _DMA_V2_DEV_FIFO_RD_LAT_ID DevFifoRdLat -#define _DMA_V2_DEV_FIFO_LAT_BYPASS_ID DevFifoRdLatBypass -#define _DMA_V2_DEV_NO_BURST_ID DevNoBurst -#define _DMA_V2_DEV_RD_ACCEPT_ID DevRdAccept -#define _DMA_V2_DEV_SRMD_ID DevSRMD -#define _DMA_V2_DEV_HAS_CRUN_ID CRunMasters -#define _DMA_V2_CTRL_ACK_FIFO_DEPTH_ID CtrlAckFifoDepth -#define _DMA_V2_CMD_FIFO_DEPTH_ID CommandFifoDepth -#define _DMA_V2_CMD_FIFO_RD_LAT_ID CommandFifoRdLat -#define _DMA_V2_CMD_FIFO_LAT_BYPASS_ID CommandFifoRdLatBypass -#define _DMA_V2_NO_PACK_ID has_no_pack - -#define _DMA_V2_REG_ALIGN 4 -#define _DMA_V2_REG_ADDR_BITS 2 - -/* Command word */ -#define _DMA_V2_CMD_IDX 0 -#define _DMA_V2_CMD_BITS 6 -#define _DMA_V2_CHANNEL_IDX (_DMA_V2_CMD_IDX + _DMA_V2_CMD_BITS) -#define _DMA_V2_CHANNEL_BITS 5 - -/* The command to set a parameter contains the PARAM field next */ -#define _DMA_V2_PARAM_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) -#define _DMA_V2_PARAM_BITS 4 - -/* Commands to read, write or init specific blocks contain these - three values */ -#define _DMA_V2_SPEC_DEV_A_XB_IDX (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS) -#define _DMA_V2_SPEC_DEV_A_XB_BITS 8 -#define _DMA_V2_SPEC_DEV_B_XB_IDX (_DMA_V2_SPEC_DEV_A_XB_IDX + _DMA_V2_SPEC_DEV_A_XB_BITS) -#define _DMA_V2_SPEC_DEV_B_XB_BITS 8 -#define _DMA_V2_SPEC_YB_IDX (_DMA_V2_SPEC_DEV_B_XB_IDX + _DMA_V2_SPEC_DEV_B_XB_BITS) -#define _DMA_V2_SPEC_YB_BITS (32 - _DMA_V2_SPEC_DEV_B_XB_BITS - _DMA_V2_SPEC_DEV_A_XB_BITS - _DMA_V2_CMD_BITS - _DMA_V2_CHANNEL_BITS) - -/* */ -#define _DMA_V2_CMD_CTRL_IDX 4 -#define _DMA_V2_CMD_CTRL_BITS 4 - -/* Packing setup word */ -#define _DMA_V2_CONNECTION_IDX 0 -#define _DMA_V2_CONNECTION_BITS 4 -#define _DMA_V2_EXTENSION_IDX (_DMA_V2_CONNECTION_IDX + _DMA_V2_CONNECTION_BITS) -#define _DMA_V2_EXTENSION_BITS 1 - -/* Elements packing word */ -#define _DMA_V2_ELEMENTS_IDX 0 -#define _DMA_V2_ELEMENTS_BITS 8 -#define _DMA_V2_LEFT_CROPPING_IDX (_DMA_V2_ELEMENTS_IDX + _DMA_V2_ELEMENTS_BITS) -#define _DMA_V2_LEFT_CROPPING_BITS 8 - -#define _DMA_V2_WIDTH_IDX 0 -#define _DMA_V2_WIDTH_BITS 16 - -#define _DMA_V2_HEIGHT_IDX 0 -#define _DMA_V2_HEIGHT_BITS 16 - -#define _DMA_V2_STRIDE_IDX 0 -#define _DMA_V2_STRIDE_BITS 32 - -/* Command IDs */ -#define _DMA_V2_MOVE_B2A_COMMAND 0 -#define _DMA_V2_MOVE_B2A_BLOCK_COMMAND 1 -#define _DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND 2 -#define _DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND 3 -#define _DMA_V2_MOVE_A2B_COMMAND 4 -#define _DMA_V2_MOVE_A2B_BLOCK_COMMAND 5 -#define _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND 6 -#define _DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND 7 -#define _DMA_V2_INIT_A_COMMAND 8 -#define _DMA_V2_INIT_A_BLOCK_COMMAND 9 -#define _DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND 10 -#define _DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND 11 -#define _DMA_V2_INIT_B_COMMAND 12 -#define _DMA_V2_INIT_B_BLOCK_COMMAND 13 -#define _DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND 14 -#define _DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND 15 -#define _DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_A_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_B_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_NO_ACK_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND (_DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND + 16) -#define _DMA_V2_CONFIG_CHANNEL_COMMAND 32 -#define _DMA_V2_SET_CHANNEL_PARAM_COMMAND 33 -#define _DMA_V2_SET_CRUN_COMMAND 62 - -/* Channel Parameter IDs */ -#define _DMA_V2_PACKING_SETUP_PARAM 0 -#define _DMA_V2_STRIDE_A_PARAM 1 -#define _DMA_V2_ELEM_CROPPING_A_PARAM 2 -#define _DMA_V2_WIDTH_A_PARAM 3 -#define _DMA_V2_STRIDE_B_PARAM 4 -#define _DMA_V2_ELEM_CROPPING_B_PARAM 5 -#define _DMA_V2_WIDTH_B_PARAM 6 -#define _DMA_V2_HEIGHT_PARAM 7 -#define _DMA_V2_QUEUED_CMDS 8 - -/* Parameter Constants */ -#define _DMA_V2_ZERO_EXTEND 0 -#define _DMA_V2_SIGN_EXTEND 1 - -/* SLAVE address map */ -#define _DMA_V2_SEL_FSM_CMD 0 -#define _DMA_V2_SEL_CH_REG 1 -#define _DMA_V2_SEL_CONN_GROUP 2 -#define _DMA_V2_SEL_DEV_INTERF 3 - -#define _DMA_V2_ADDR_SEL_COMP_IDX 12 -#define _DMA_V2_ADDR_SEL_COMP_BITS 4 -#define _DMA_V2_ADDR_SEL_CH_REG_IDX 2 -#define _DMA_V2_ADDR_SEL_CH_REG_BITS 6 -#define _DMA_V2_ADDR_SEL_PARAM_IDX (_DMA_V2_ADDR_SEL_CH_REG_BITS + _DMA_V2_ADDR_SEL_CH_REG_IDX) -#define _DMA_V2_ADDR_SEL_PARAM_BITS 4 - -#define _DMA_V2_ADDR_SEL_GROUP_COMP_IDX 2 -#define _DMA_V2_ADDR_SEL_GROUP_COMP_BITS 6 -#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_IDX (_DMA_V2_ADDR_SEL_GROUP_COMP_BITS + _DMA_V2_ADDR_SEL_GROUP_COMP_IDX) -#define _DMA_V2_ADDR_SEL_GROUP_COMP_INFO_BITS 4 - -#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX 2 -#define _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS 6 -#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_IDX (_DMA_V2_ADDR_SEL_DEV_INTERF_IDX_IDX + _DMA_V2_ADDR_SEL_DEV_INTERF_IDX_BITS) -#define _DMA_V2_ADDR_SEL_DEV_INTERF_INFO_BITS 4 - -#define _DMA_V2_FSM_GROUP_CMD_IDX 0 -#define _DMA_V2_FSM_GROUP_ADDR_SRC_IDX 1 -#define _DMA_V2_FSM_GROUP_ADDR_DEST_IDX 2 -#define _DMA_V2_FSM_GROUP_CMD_CTRL_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_IDX 4 -#define _DMA_V2_FSM_GROUP_FSM_PACK_IDX 5 -#define _DMA_V2_FSM_GROUP_FSM_REQ_IDX 6 -#define _DMA_V2_FSM_GROUP_FSM_WR_IDX 7 - -#define _DMA_V2_FSM_GROUP_FSM_CTRL_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_DEV_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_ADDR_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_STRIDE_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_XB_IDX 4 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_REQ_YB_IDX 5 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_DEV_IDX 6 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_DEV_IDX 7 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_ADDR_IDX 8 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_WR_STRIDE_IDX 9 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_REQ_XB_IDX 10 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_YB_IDX 11 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_WR_XB_IDX 12 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_REQ_IDX 13 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_ELEM_WR_IDX 14 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_PACK_S_Z_IDX 15 -#define _DMA_V2_FSM_GROUP_FSM_CTRL_CMD_CTRL_IDX 15 - -#define _DMA_V2_FSM_GROUP_FSM_PACK_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_YB_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_REQ_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_PACK_CNT_XB_WR_IDX 3 - -#define _DMA_V2_FSM_GROUP_FSM_REQ_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_YB_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_XB_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_REQ_XB_REMAINING_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_REQ_CNT_BURST_IDX 4 - -#define _DMA_V2_FSM_GROUP_FSM_WR_STATE_IDX 0 -#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_YB_IDX 1 -#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_XB_IDX 2 -#define _DMA_V2_FSM_GROUP_FSM_WR_XB_REMAINING_IDX 3 -#define _DMA_V2_FSM_GROUP_FSM_WR_CNT_BURST_IDX 4 - -#define _DMA_V2_DEV_INTERF_REQ_SIDE_STATUS_IDX 0 -#define _DMA_V2_DEV_INTERF_SEND_SIDE_STATUS_IDX 1 -#define _DMA_V2_DEV_INTERF_FIFO_STATUS_IDX 2 -#define _DMA_V2_DEV_INTERF_REQ_ONLY_COMPLETE_BURST_IDX 3 -#define _DMA_V2_DEV_INTERF_MAX_BURST_IDX 4 -#define _DMA_V2_DEV_INTERF_CHK_ADDR_ALIGN 5 - -#endif /* _dma_v2_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h deleted file mode 100644 index 3cc627aa6b091..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef HRT_GDC_v2_defs_h_ -#define HRT_GDC_v2_defs_h_ - -#define HRT_GDC_IS_V2 - -#define HRT_GDC_N 1024 /* Top-level design constant, equal to the number of entries in the LUT */ -#define HRT_GDC_FRAC_BITS 10 /* Number of fractional bits in the GDC block, driven by the size of the LUT */ - -#define HRT_GDC_BLI_FRAC_BITS 4 /* Number of fractional bits for the bi-linear interpolation type */ -#define HRT_GDC_BLI_COEF_ONE BIT(HRT_GDC_BLI_FRAC_BITS) - -#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */ -#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */ -/* The supported range is [-256, .., +256] */ -/* in 14-bit signed notation, */ -/* We need all ten bits (MSB must be zero). */ -/* -s is inserted to solve this issue, and */ -/* therefore "1" is equal to +256. */ -#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1) - -#define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */ -/* 2 bytes per coefficient */ - -#define _HRT_GDC_REG_ALIGN 4 - -// 31 30 29 25 24 0 -// |-----|---|--------|------------------------| -// | CMD | C | Reg_ID | Value | - -// There are just two commands possible for the GDC block: -// 1 - Configure reg -// 0 - Data token - -// C - Reserved bit -// Used in protocol to indicate whether it is C-run or other type of runs -// In case of C-run, this bit has a value of 1, for all the other runs, it is 0. - -// Reg_ID - Address of the register to be configured - -// Value - Value to store to the addressed register, maximum of 24 bits - -// Configure reg command is not followed by any other token. -// The address of the register and the data to be filled in is contained in the same token - -// When the first data token is received, it must be: -// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or, -// 2. P0'X (device configured in one of the tetragon modes) -// After the first data token is received, pre-defined number of tokens with the following meaning follow: -// 1. two tokens: SRC address ; DST address -// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address - -#define HRT_GDC_CONFIG_CMD 1 -#define HRT_GDC_DATA_CMD 0 - -#define HRT_GDC_CMD_POS 31 -#define HRT_GDC_CMD_BITS 1 -#define HRT_GDC_CRUN_POS 30 -#define HRT_GDC_REG_ID_POS 25 -#define HRT_GDC_REG_ID_BITS 5 -#define HRT_GDC_DATA_POS 0 -#define HRT_GDC_DATA_BITS 25 - -#define HRT_GDC_FRYIPXFRX_BITS 26 -#define HRT_GDC_P0X_BITS 23 - -#define HRT_GDC_MAX_OXDIM (8192 - 64) -#define HRT_GDC_MAX_OYDIM 4095 -#define HRT_GDC_MAX_IXDIM (8192 - 64) -#define HRT_GDC_MAX_IYDIM 4095 -#define HRT_GDC_MAX_DS_FAC 16 -#define HRT_GDC_MAX_DX (HRT_GDC_MAX_DS_FAC * HRT_GDC_N - 1) -#define HRT_GDC_MAX_DY HRT_GDC_MAX_DX - -/* GDC lookup tables entries are 10 bits values, but they're - stored 2 by 2 as 32 bit values, yielding 16 bits per entry. - A GDC lookup table contains 64 * 4 elements */ - -#define HRT_GDC_PERF_1_1_pix 0 -#define HRT_GDC_PERF_2_1_pix 1 -#define HRT_GDC_PERF_1_2_pix 2 -#define HRT_GDC_PERF_2_2_pix 3 - -#define HRT_GDC_NND_MODE 0 -#define HRT_GDC_BLI_MODE 1 -#define HRT_GDC_BCI_MODE 2 -#define HRT_GDC_LUT_MODE 3 - -#define HRT_GDC_SCAN_STB 0 -#define HRT_GDC_SCAN_STR 1 - -#define HRT_GDC_MODE_SCALING 0 -#define HRT_GDC_MODE_TETRAGON 1 - -#define HRT_GDC_LUT_COEFF_OFFSET 16 -#define HRT_GDC_FRY_BIT_OFFSET 16 -// FRYIPXFRX is the only register where we store two values in one field, -// to save one token in the scaling protocol. -// Like this, we have three tokens in the scaling protocol, -// Otherwise, we would have had four. -// The register bit-map is: -// 31 26 25 16 15 10 9 0 -// |------|----------|------|----------| -// | XXXX | FRY | IPX | FRX | - -#define HRT_GDC_CE_FSM0_POS 0 -#define HRT_GDC_CE_FSM0_LEN 2 -#define HRT_GDC_CE_OPY_POS 2 -#define HRT_GDC_CE_OPY_LEN 14 -#define HRT_GDC_CE_OPX_POS 16 -#define HRT_GDC_CE_OPX_LEN 16 -// CHK_ENGINE register bit-map: -// 31 16 15 2 1 0 -// |----------------|-----------|----| -// | OPX | OPY |FSM0| -// However, for the time being at least, -// this implementation is meaningless in hss model, -// So, we just return 0 - -#define HRT_GDC_CHK_ENGINE_IDX 0 -#define HRT_GDC_WOIX_IDX 1 -#define HRT_GDC_WOIY_IDX 2 -#define HRT_GDC_BPP_IDX 3 -#define HRT_GDC_FRYIPXFRX_IDX 4 -#define HRT_GDC_OXDIM_IDX 5 -#define HRT_GDC_OYDIM_IDX 6 -#define HRT_GDC_SRC_ADDR_IDX 7 -#define HRT_GDC_SRC_END_ADDR_IDX 8 -#define HRT_GDC_SRC_WRAP_ADDR_IDX 9 -#define HRT_GDC_SRC_STRIDE_IDX 10 -#define HRT_GDC_DST_ADDR_IDX 11 -#define HRT_GDC_DST_STRIDE_IDX 12 -#define HRT_GDC_DX_IDX 13 -#define HRT_GDC_DY_IDX 14 -#define HRT_GDC_P0X_IDX 15 -#define HRT_GDC_P0Y_IDX 16 -#define HRT_GDC_P1X_IDX 17 -#define HRT_GDC_P1Y_IDX 18 -#define HRT_GDC_P2X_IDX 19 -#define HRT_GDC_P2Y_IDX 20 -#define HRT_GDC_P3X_IDX 21 -#define HRT_GDC_P3Y_IDX 22 -#define HRT_GDC_PERF_POINT_IDX 23 // 1x1 ; 1x2 ; 2x1 ; 2x2 pixels per cc -#define HRT_GDC_INTERP_TYPE_IDX 24 // NND ; BLI ; BCI ; LUT -#define HRT_GDC_SCAN_IDX 25 // 0 = STB (Slide To Bottom) ; 1 = STR (Slide To Right) -#define HRT_GDC_PROC_MODE_IDX 26 // 0 = Scaling ; 1 = Tetragon - -#define HRT_GDC_LUT_IDX 32 - -#endif /* HRT_GDC_v2_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gp_timer_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gp_timer_defs.h deleted file mode 100644 index ffd7b38fce9d3..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gp_timer_defs.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _gp_timer_defs_h -#define _gp_timer_defs_h - -#define _HRT_GP_TIMER_REG_ALIGN 4 - -#define HIVE_GP_TIMER_RESET_REG_IDX 0 -#define HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX 1 -#define HIVE_GP_TIMER_ENABLE_REG_IDX(timer) (HIVE_GP_TIMER_OVERALL_ENABLE_REG_IDX + 1 + timer) -#define HIVE_GP_TIMER_VALUE_REG_IDX(timer, timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timers) + timer) -#define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer, timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers, timers) + timer) -#define HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer, timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timers, timers) + timer) -#define HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq, timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timers, timers) + irq) -#define HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irqs, timers) + irq) -#define HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs, timers, irqs) + irq) - -#define HIVE_GP_TIMER_COUNT_TYPE_HIGH 0 -#define HIVE_GP_TIMER_COUNT_TYPE_LOW 1 -#define HIVE_GP_TIMER_COUNT_TYPE_POSEDGE 2 -#define HIVE_GP_TIMER_COUNT_TYPE_NEGEDGE 3 -#define HIVE_GP_TIMER_COUNT_TYPES 4 - -#endif /* _gp_timer_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h deleted file mode 100644 index 96286a141b00b..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gpio_block_defs.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _gpio_block_defs_h_ -#define _gpio_block_defs_h_ - -#define _HRT_GPIO_BLOCK_REG_ALIGN 4 - -/* R/W registers */ -#define _gpio_block_reg_do_e 0 -#define _gpio_block_reg_do_select 1 -#define _gpio_block_reg_do_0 2 -#define _gpio_block_reg_do_1 3 -#define _gpio_block_reg_do_pwm_cnt_0 4 -#define _gpio_block_reg_do_pwm_cnt_1 5 -#define _gpio_block_reg_do_pwm_cnt_2 6 -#define _gpio_block_reg_do_pwm_cnt_3 7 -#define _gpio_block_reg_do_pwm_main_cnt 8 -#define _gpio_block_reg_do_pwm_enable 9 -#define _gpio_block_reg_di_debounce_sel 10 -#define _gpio_block_reg_di_debounce_cnt_0 11 -#define _gpio_block_reg_di_debounce_cnt_1 12 -#define _gpio_block_reg_di_debounce_cnt_2 13 -#define _gpio_block_reg_di_debounce_cnt_3 14 -#define _gpio_block_reg_di_active_level 15 - -/* read-only registers */ -#define _gpio_block_reg_di 16 - -#endif /* _gpio_block_defs_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h deleted file mode 100644 index a22b771f61f2e..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _hive_isp_css_streaming_to_mipi_types_hrt_h_ -#define _hive_isp_css_streaming_to_mipi_types_hrt_h_ - -#include - -#define _HIVE_ISP_CH_ID_MASK ((1U << HIVE_ISP_CH_ID_BITS) - 1) -#define _HIVE_ISP_FMT_TYPE_MASK ((1U << HIVE_ISP_FMT_TYPE_BITS) - 1) - -#define _HIVE_STR_TO_MIPI_FMT_TYPE_LSB (HIVE_STR_TO_MIPI_CH_ID_LSB + HIVE_ISP_CH_ID_BITS) -#define _HIVE_STR_TO_MIPI_DATA_B_LSB (HIVE_STR_TO_MIPI_DATA_A_LSB + HIVE_IF_PIXEL_WIDTH) - -#endif /* _hive_isp_css_streaming_to_mipi_types_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h deleted file mode 100644 index 9715893c8a360..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_types.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HRT_HIVE_TYPES_H -#define _HRT_HIVE_TYPES_H - -#include "version.h" -#include "defs.h" - -#ifndef HRTCAT3 -#define _HRTCAT3(m, n, o) m##n##o -#define HRTCAT3(m, n, o) _HRTCAT3(m, n, o) -#endif - -#ifndef HRTCAT4 -#define _HRTCAT4(m, n, o, p) m##n##o##p -#define HRTCAT4(m, n, o, p) _HRTCAT4(m, n, o, p) -#endif - -#ifndef HRTMIN -#define HRTMIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -#ifndef HRTMAX -#define HRTMAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif - -/* boolean data type */ -typedef unsigned int hive_bool; -#define hive_false 0 -#define hive_true 1 - -typedef char hive_int8; -typedef short hive_int16; -typedef int hive_int32; -typedef long long hive_int64; - -typedef unsigned char hive_uint8; -typedef unsigned short hive_uint16; -typedef unsigned int hive_uint32; -typedef unsigned long long hive_uint64; - -/* by default assume 32 bit master port (both data and address) */ -#ifndef HRT_DATA_WIDTH -#define HRT_DATA_WIDTH 32 -#endif -#ifndef HRT_ADDRESS_WIDTH -#define HRT_ADDRESS_WIDTH 32 -#endif - -#define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8) -#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8) - -#if HRT_DATA_WIDTH == 64 -typedef hive_uint64 hrt_data; -#elif HRT_DATA_WIDTH == 32 -typedef hive_uint32 hrt_data; -#else -#error data width not supported -#endif - -#if HRT_ADDRESS_WIDTH == 64 -typedef hive_uint64 hrt_address; -#elif HRT_ADDRESS_WIDTH == 32 -typedef hive_uint32 hrt_address; -#else -#error adddres width not supported -#endif - -/* The SP side representation of an HMM virtual address */ -typedef hive_uint32 hrt_vaddress; - -/* use 64 bit addresses in simulation, where possible */ -typedef hive_uint64 hive_sim_address; - -/* below is for csim, not for hrt, rename and move this elsewhere */ - -typedef unsigned int hive_uint; -typedef hive_uint32 hive_address; -typedef hive_address hive_slave_address; -typedef hive_address hive_mem_address; - -/* MMIO devices */ -typedef hive_uint hive_mmio_id; -typedef hive_mmio_id hive_slave_id; -typedef hive_mmio_id hive_port_id; -typedef hive_mmio_id hive_master_id; -typedef hive_mmio_id hive_mem_id; -typedef hive_mmio_id hive_dev_id; -typedef hive_mmio_id hive_fifo_id; - -typedef hive_uint hive_hier_id; -typedef hive_hier_id hive_device_id; -typedef hive_device_id hive_proc_id; -typedef hive_device_id hive_cell_id; -typedef hive_device_id hive_host_id; -typedef hive_device_id hive_bus_id; -typedef hive_device_id hive_bridge_id; -typedef hive_device_id hive_fifo_adapter_id; -typedef hive_device_id hive_custom_device_id; - -typedef hive_uint hive_slot_id; -typedef hive_uint hive_fu_id; -typedef hive_uint hive_reg_file_id; -typedef hive_uint hive_reg_id; - -/* Streaming devices */ -typedef hive_uint hive_outport_id; -typedef hive_uint hive_inport_id; - -typedef hive_uint hive_msink_id; - -/* HRT specific */ -typedef char *hive_program; -typedef char *hive_function; - -#endif /* _HRT_HIVE_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/if_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/if_defs.h deleted file mode 100644 index 7d39e45796ae1..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/if_defs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _IF_DEFS_H -#define _IF_DEFS_H - -#define HIVE_IF_FRAME_REQUEST 0xA000 -#define HIVE_IF_LINES_REQUEST 0xB000 -#define HIVE_IF_VECTORS_REQUEST 0xC000 - -#endif /* _IF_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h deleted file mode 100644 index 176456da961f7..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_formatter_subsystem_defs.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _if_subsystem_defs_h__ -#define _if_subsystem_defs_h__ - -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 0 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_1 1 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_2 2 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_3 3 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4 4 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5 5 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6 6 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7 7 -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG 8 -#define HIVE_IFMT_GP_REGS_SRST_IDX 9 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX 10 - -#define HIVE_IFMT_GP_REGS_CH_ID_FMT_TYPE_IDX 11 - -#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_BASE HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0 - -/* order of the input bits for the ifmt irq controller */ -#define HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID 0 -#define HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID 1 -#define HIVE_IFMT_IRQ_IFT_SEC_BIT_ID 2 -#define HIVE_IFMT_IRQ_MEM_CPY_BIT_ID 3 -#define HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID 4 - -/* order of the input bits for the ifmt Soft reset register */ -#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_BIT_IDX 0 -#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_B_BIT_IDX 1 -#define HIVE_IFMT_GP_REGS_SRST_IFT_SEC_BIT_IDX 2 -#define HIVE_IFMT_GP_REGS_SRST_MEM_CPY_BIT_IDX 3 - -/* order of the input bits for the ifmt Soft reset register */ -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_BIT_IDX 0 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_B_BIT_IDX 1 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_SEC_BIT_IDX 2 -#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_MEM_CPY_BIT_IDX 3 - -#endif /* _if_subsystem_defs_h__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h deleted file mode 100644 index 1dd8ea3cd6d47..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_selector_defs.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_selector_defs_h -#define _input_selector_defs_h - -#ifndef HIVE_ISP_ISEL_SEL_BITS -#define HIVE_ISP_ISEL_SEL_BITS 2 -#endif - -#ifndef HIVE_ISP_CH_ID_BITS -#define HIVE_ISP_CH_ID_BITS 2 -#endif - -#ifndef HIVE_ISP_FMT_TYPE_BITS -#define HIVE_ISP_FMT_TYPE_BITS 5 -#endif - -/* gp_register register id's -- Outputs */ -#define HIVE_ISEL_GP_REGS_SYNCGEN_ENABLE_IDX 0 -#define HIVE_ISEL_GP_REGS_SYNCGEN_FREE_RUNNING_IDX 1 -#define HIVE_ISEL_GP_REGS_SYNCGEN_PAUSE_IDX 2 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_FRAMES_IDX 3 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_PIX_IDX 4 -#define HIVE_ISEL_GP_REGS_SYNCGEN_NR_LINES_IDX 5 -#define HIVE_ISEL_GP_REGS_SYNCGEN_HBLANK_CYCLES_IDX 6 -#define HIVE_ISEL_GP_REGS_SYNCGEN_VBLANK_CYCLES_IDX 7 - -#define HIVE_ISEL_GP_REGS_SOF_IDX 8 -#define HIVE_ISEL_GP_REGS_EOF_IDX 9 -#define HIVE_ISEL_GP_REGS_SOL_IDX 10 -#define HIVE_ISEL_GP_REGS_EOL_IDX 11 - -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE 12 -#define HIVE_ISEL_GP_REGS_PRBS_ENABLE_PORT_B 13 -#define HIVE_ISEL_GP_REGS_PRBS_LFSR_RESET_VALUE 14 - -#define HIVE_ISEL_GP_REGS_TPG_ENABLE 15 -#define HIVE_ISEL_GP_REGS_TPG_ENABLE_PORT_B 16 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_MASK_IDX 17 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_MASK_IDX 18 -#define HIVE_ISEL_GP_REGS_TPG_XY_CNT_MASK_IDX 19 -#define HIVE_ISEL_GP_REGS_TPG_HOR_CNT_DELTA_IDX 20 -#define HIVE_ISEL_GP_REGS_TPG_VER_CNT_DELTA_IDX 21 -#define HIVE_ISEL_GP_REGS_TPG_MODE_IDX 22 -#define HIVE_ISEL_GP_REGS_TPG_R1_IDX 23 -#define HIVE_ISEL_GP_REGS_TPG_G1_IDX 24 -#define HIVE_ISEL_GP_REGS_TPG_B1_IDX 25 -#define HIVE_ISEL_GP_REGS_TPG_R2_IDX 26 -#define HIVE_ISEL_GP_REGS_TPG_G2_IDX 27 -#define HIVE_ISEL_GP_REGS_TPG_B2_IDX 28 - -#define HIVE_ISEL_GP_REGS_CH_ID_IDX 29 -#define HIVE_ISEL_GP_REGS_FMT_TYPE_IDX 30 -#define HIVE_ISEL_GP_REGS_DATA_SEL_IDX 31 -#define HIVE_ISEL_GP_REGS_SBAND_SEL_IDX 32 -#define HIVE_ISEL_GP_REGS_SYNC_SEL_IDX 33 -#define HIVE_ISEL_GP_REGS_SRST_IDX 37 - -#define HIVE_ISEL_GP_REGS_SRST_SYNCGEN_BIT 0 -#define HIVE_ISEL_GP_REGS_SRST_PRBS_BIT 1 -#define HIVE_ISEL_GP_REGS_SRST_TPG_BIT 2 -#define HIVE_ISEL_GP_REGS_SRST_FIFO_BIT 3 - -/* gp_register register id's -- Inputs */ -#define HIVE_ISEL_GP_REGS_SYNCGEN_HOR_CNT_IDX 34 -#define HIVE_ISEL_GP_REGS_SYNCGEN_VER_CNT_IDX 35 -#define HIVE_ISEL_GP_REGS_SYNCGEN_FRAMES_CNT_IDX 36 - -/* irq sources isel irq controller */ -#define HIVE_ISEL_IRQ_SYNC_GEN_SOF_BIT_ID 0 -#define HIVE_ISEL_IRQ_SYNC_GEN_EOF_BIT_ID 1 -#define HIVE_ISEL_IRQ_SYNC_GEN_SOL_BIT_ID 2 -#define HIVE_ISEL_IRQ_SYNC_GEN_EOL_BIT_ID 3 -#define HIVE_ISEL_IRQ_NUM_IRQS 4 - -#endif /* _input_selector_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h deleted file mode 100644 index 2d5baae305220..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_switch_2400_defs.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_switch_2400_defs_h -#define _input_switch_2400_defs_h - -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_ID(ch_id, fmt_type) (((ch_id) * 2) + ((fmt_type) >= 16)) -#define _HIVE_INPUT_SWITCH_GET_LUT_REG_LSB(fmt_type) (((fmt_type) % 16) * 2) - -#define HIVE_INPUT_SWITCH_SELECT_NO_OUTPUT 0 -#define HIVE_INPUT_SWITCH_SELECT_IF_PRIM 1 -#define HIVE_INPUT_SWITCH_SELECT_IF_SEC 2 -#define HIVE_INPUT_SWITCH_SELECT_STR_TO_MEM 3 -#define HIVE_INPUT_SWITCH_VSELECT_NO_OUTPUT 0 -#define HIVE_INPUT_SWITCH_VSELECT_IF_PRIM 1 -#define HIVE_INPUT_SWITCH_VSELECT_IF_SEC 2 -#define HIVE_INPUT_SWITCH_VSELECT_STR_TO_MEM 4 - -#endif /* _input_switch_2400_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h deleted file mode 100644 index fcfa8c4971bef..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_ctrl_defs.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_system_ctrl_defs_h -#define _input_system_ctrl_defs_h - -#define _INPUT_SYSTEM_CTRL_REG_ALIGN 4 /* assuming 32 bit control bus width */ - -/* --------------------------------------------------*/ - -/* --------------------------------------------------*/ -/* REGISTER INFO */ -/* --------------------------------------------------*/ - -// Number of registers -#define ISYS_CTRL_NOF_REGS 23 - -// Register id's of MMIO slave accesible registers -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_ID 0 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_ID 1 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_ID 2 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_ID 3 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_ID 4 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_ID 5 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_ID 6 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_ID 7 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_ID 8 -#define ISYS_CTRL_ACQ_START_ADDR_REG_ID 9 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_ID 10 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_ID 11 -#define ISYS_CTRL_INIT_REG_ID 12 -#define ISYS_CTRL_LAST_COMMAND_REG_ID 13 -#define ISYS_CTRL_NEXT_COMMAND_REG_ID 14 -#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_ID 15 -#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_ID 16 -#define ISYS_CTRL_FSM_STATE_INFO_REG_ID 17 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_ID 18 -#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_ID 19 -#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_ID 20 -#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 -#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_ID 22 - -/* register reset value */ -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_RSTVAL 128 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_RSTVAL 3 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_RSTVAL 3 -#define ISYS_CTRL_ACQ_START_ADDR_REG_RSTVAL 0 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define ISYS_CTRL_INIT_REG_RSTVAL 0 -#define ISYS_CTRL_LAST_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_NEXT_COMMAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-reset) -#define ISYS_CTRL_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_RSTVAL 0 -#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_RSTVAL 0 - -/* register width value */ -#define ISYS_CTRL_CAPT_START_ADDR_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_START_ADDR_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_MEM_REGION_SIZE_C_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_A_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_B_REG_WIDTH 9 -#define ISYS_CTRL_CAPT_NUM_MEM_REGIONS_C_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_START_ADDR_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ISYS_CTRL_ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ISYS_CTRL_INIT_REG_WIDTH 3 -#define ISYS_CTRL_LAST_COMMAND_REG_WIDTH 32 /* slave data width */ -#define ISYS_CTRL_NEXT_COMMAND_REG_WIDTH 32 -#define ISYS_CTRL_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define ISYS_CTRL_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define ISYS_CTRL_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_A_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_B_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_C_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_WIDTH 32 -#define ISYS_CTRL_CAPT_RESERVE_ONE_MEM_REGION_REG_WIDTH 1 - -/* bit definitions */ - -/* --------------------------------------------------*/ -/* TOKEN INFO */ -/* --------------------------------------------------*/ - -/* -InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 -[7:4] - CaptPortId, - CaptA-'b0000 - CaptB-'b0001 - CaptC-'b0010 -[31:16] - NOF_frames -InpSysCaptFrameExt 2/0 [3:0] - 'b0001' -[7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - - 2/1 [31:0] - external capture address -InpSysAcqFrame 2/0 [3:0] - 'b0010, -[31:4] - NOF_ext_mem_words - 2/1 [31:0] - external memory read start address -InpSysOverruleON 1/0 [3:0] - 'b0011, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysOverruleOFF 1/0 [3:0] - 'b0100, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysOverruleCmd 2/0 [3:0] - 'b0101, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - - 2/1 [31:0] - command token value for port opid - -acknowledge tokens: - -InpSysAckCFA 1/0 [3:0] - 'b0000 - [7:4] - CaptPortId, - CaptA-'b0000 - CaptB- 'b0001 - CaptC-'b0010 - [31:16] - NOF_frames -InpSysAckCFE 1/0 [3:0] - 'b0001' -[7:4] - CaptPortId, - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - -InpSysAckAF 1/0 [3:0] - 'b0010 -InpSysAckOverruleON 1/0 [3:0] - 'b0011, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysAckOverruleOFF 1/0 [3:0] - 'b0100, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - -InpSysAckOverrule 2/0 [3:0] - 'b0101, -[7:4] - overrule port id (opid) - 'b0000 - CaptA - 'b0001 - CaptB - 'b0010 - CaptC - 'b0011 - Acq - 'b0100 - DMA - - 2/1 [31:0] - acknowledge token value from port opid - -*/ - -/* Command and acknowledge tokens IDs */ -#define ISYS_CTRL_CAPT_FRAMES_ACQ_TOKEN_ID 0 /* 0000b */ -#define ISYS_CTRL_CAPT_FRAME_EXT_TOKEN_ID 1 /* 0001b */ -#define ISYS_CTRL_ACQ_FRAME_TOKEN_ID 2 /* 0010b */ -#define ISYS_CTRL_OVERRULE_ON_TOKEN_ID 3 /* 0011b */ -#define ISYS_CTRL_OVERRULE_OFF_TOKEN_ID 4 /* 0100b */ -#define ISYS_CTRL_OVERRULE_TOKEN_ID 5 /* 0101b */ - -#define ISYS_CTRL_ACK_CFA_TOKEN_ID 0 -#define ISYS_CTRL_ACK_CFE_TOKEN_ID 1 -#define ISYS_CTRL_ACK_AF_TOKEN_ID 2 -#define ISYS_CTRL_ACK_OVERRULE_ON_TOKEN_ID 3 -#define ISYS_CTRL_ACK_OVERRULE_OFF_TOKEN_ID 4 -#define ISYS_CTRL_ACK_OVERRULE_TOKEN_ID 5 -#define ISYS_CTRL_ACK_DEVICE_ERROR_TOKEN_ID 6 - -#define ISYS_CTRL_TOKEN_ID_MSB 3 -#define ISYS_CTRL_TOKEN_ID_LSB 0 -#define ISYS_CTRL_PORT_ID_TOKEN_MSB 7 -#define ISYS_CTRL_PORT_ID_TOKEN_LSB 4 -#define ISYS_CTRL_NOF_CAPT_TOKEN_MSB 31 -#define ISYS_CTRL_NOF_CAPT_TOKEN_LSB 16 -#define ISYS_CTRL_NOF_EXT_TOKEN_MSB 31 -#define ISYS_CTRL_NOF_EXT_TOKEN_LSB 8 - -#define ISYS_CTRL_TOKEN_ID_IDX 0 -#define ISYS_CTRL_TOKEN_ID_BITS (ISYS_CTRL_TOKEN_ID_MSB - ISYS_CTRL_TOKEN_ID_LSB + 1) -#define ISYS_CTRL_PORT_ID_IDX (ISYS_CTRL_TOKEN_ID_IDX + ISYS_CTRL_TOKEN_ID_BITS) -#define ISYS_CTRL_PORT_ID_BITS (ISYS_CTRL_PORT_ID_TOKEN_MSB - ISYS_CTRL_PORT_ID_TOKEN_LSB + 1) -#define ISYS_CTRL_NOF_CAPT_IDX ISYS_CTRL_NOF_CAPT_TOKEN_LSB -#define ISYS_CTRL_NOF_CAPT_BITS (ISYS_CTRL_NOF_CAPT_TOKEN_MSB - ISYS_CTRL_NOF_CAPT_TOKEN_LSB + 1) -#define ISYS_CTRL_NOF_EXT_IDX ISYS_CTRL_NOF_EXT_TOKEN_LSB -#define ISYS_CTRL_NOF_EXT_BITS (ISYS_CTRL_NOF_EXT_TOKEN_MSB - ISYS_CTRL_NOF_EXT_TOKEN_LSB + 1) - -#define ISYS_CTRL_PORT_ID_CAPT_A 0 /* device ID for capture unit A */ -#define ISYS_CTRL_PORT_ID_CAPT_B 1 /* device ID for capture unit B */ -#define ISYS_CTRL_PORT_ID_CAPT_C 2 /* device ID for capture unit C */ -#define ISYS_CTRL_PORT_ID_ACQUISITION 3 /* device ID for acquistion unit */ -#define ISYS_CTRL_PORT_ID_DMA_CAPT_A 4 /* device ID for dma unit */ -#define ISYS_CTRL_PORT_ID_DMA_CAPT_B 5 /* device ID for dma unit */ -#define ISYS_CTRL_PORT_ID_DMA_CAPT_C 6 /* device ID for dma unit */ -#define ISYS_CTRL_PORT_ID_DMA_ACQ 7 /* device ID for dma unit */ - -#define ISYS_CTRL_NO_ACQ_ACK 16 /* no ack from acquisition unit */ -#define ISYS_CTRL_NO_DMA_ACK 0 -#define ISYS_CTRL_NO_CAPT_ACK 16 - -#endif /* _input_system_ctrl_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_defs.h deleted file mode 100644 index ae62163034a66..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/input_system_defs.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _input_system_defs_h -#define _input_system_defs_h - -/* csi controller modes */ -#define HIVE_CSI_CONFIG_MAIN 0 -#define HIVE_CSI_CONFIG_STEREO1 4 -#define HIVE_CSI_CONFIG_STEREO2 8 - -/* general purpose register IDs */ - -/* Stream Multicast select modes */ -#define HIVE_ISYS_GPREG_MULTICAST_A_IDX 0 -#define HIVE_ISYS_GPREG_MULTICAST_B_IDX 1 -#define HIVE_ISYS_GPREG_MULTICAST_C_IDX 2 - -/* Stream Mux select modes */ -#define HIVE_ISYS_GPREG_MUX_IDX 3 - -/* streaming monitor status and control */ -#define HIVE_ISYS_GPREG_STRMON_STAT_IDX 4 -#define HIVE_ISYS_GPREG_STRMON_COND_IDX 5 -#define HIVE_ISYS_GPREG_STRMON_IRQ_EN_IDX 6 -#define HIVE_ISYS_GPREG_SRST_IDX 7 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_IDX 8 -#define HIVE_ISYS_GPREG_REG_PORT_A_IDX 9 -#define HIVE_ISYS_GPREG_REG_PORT_B_IDX 10 - -/* Bit numbers of the soft reset register */ -#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_A_BIT 0 -#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_B_BIT 1 -#define HIVE_ISYS_GPREG_SRST_CAPT_FIFO_C_BIT 2 -#define HIVE_ISYS_GPREG_SRST_MULTICAST_A_BIT 3 -#define HIVE_ISYS_GPREG_SRST_MULTICAST_B_BIT 4 -#define HIVE_ISYS_GPREG_SRST_MULTICAST_C_BIT 5 -#define HIVE_ISYS_GPREG_SRST_CAPT_A_BIT 6 -#define HIVE_ISYS_GPREG_SRST_CAPT_B_BIT 7 -#define HIVE_ISYS_GPREG_SRST_CAPT_C_BIT 8 -#define HIVE_ISYS_GPREG_SRST_ACQ_BIT 9 -/* For ISYS_CTRL 5bits are defined to allow soft-reset per sub-controller and top-ctrl */ -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_BIT 10 /*LSB for 5bit vector */ -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_A_BIT 10 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_B_BIT 11 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_CAPT_C_BIT 12 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_ACQ_BIT 13 -#define HIVE_ISYS_GPREG_SRST_ISYS_CTRL_TOP_BIT 14 -/* -- */ -#define HIVE_ISYS_GPREG_SRST_STR_MUX_BIT 15 -#define HIVE_ISYS_GPREG_SRST_CIO2AHB_BIT 16 -#define HIVE_ISYS_GPREG_SRST_GEN_SHORT_FIFO_BIT 17 -#define HIVE_ISYS_GPREG_SRST_WIDE_BUS_BIT 18 // includes CIO conv -#define HIVE_ISYS_GPREG_SRST_DMA_BIT 19 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_A_BIT 20 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_B_BIT 21 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_CAPT_C_BIT 22 -#define HIVE_ISYS_GPREG_SRST_SF_CTRL_ACQ_BIT 23 -#define HIVE_ISYS_GPREG_SRST_CSI_BE_OUT_BIT 24 - -#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_A_BIT 0 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_B_BIT 1 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_CAPT_C_BIT 2 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_ACQ_BIT 3 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_DMA_BIT 4 -#define HIVE_ISYS_GPREG_SLV_REG_SRST_ISYS_CTRL_BIT 5 - -/* streaming monitor port id's */ -#define HIVE_ISYS_STR_MON_PORT_CAPA 0 -#define HIVE_ISYS_STR_MON_PORT_CAPB 1 -#define HIVE_ISYS_STR_MON_PORT_CAPC 2 -#define HIVE_ISYS_STR_MON_PORT_ACQ 3 -#define HIVE_ISYS_STR_MON_PORT_CSS_GENSH 4 -#define HIVE_ISYS_STR_MON_PORT_SF_GENSH 5 -#define HIVE_ISYS_STR_MON_PORT_SP2ISYS 6 -#define HIVE_ISYS_STR_MON_PORT_ISYS2SP 7 -#define HIVE_ISYS_STR_MON_PORT_PIXA 8 -#define HIVE_ISYS_STR_MON_PORT_PIXB 9 - -/* interrupt bit ID's */ -#define HIVE_ISYS_IRQ_CSI_SOF_BIT_ID 0 -#define HIVE_ISYS_IRQ_CSI_EOF_BIT_ID 1 -#define HIVE_ISYS_IRQ_CSI_SOL_BIT_ID 2 -#define HIVE_ISYS_IRQ_CSI_EOL_BIT_ID 3 -#define HIVE_ISYS_IRQ_CSI_RECEIVER_BIT_ID 4 -#define HIVE_ISYS_IRQ_CSI_RECEIVER_BE_BIT_ID 5 -#define HIVE_ISYS_IRQ_CAP_UNIT_A_NO_SOP 6 -#define HIVE_ISYS_IRQ_CAP_UNIT_A_LATE_SOP 7 -/*#define HIVE_ISYS_IRQ_CAP_UNIT_A_UNDEF_PH 7*/ -#define HIVE_ISYS_IRQ_CAP_UNIT_B_NO_SOP 8 -#define HIVE_ISYS_IRQ_CAP_UNIT_B_LATE_SOP 9 -/*#define HIVE_ISYS_IRQ_CAP_UNIT_B_UNDEF_PH 10*/ -#define HIVE_ISYS_IRQ_CAP_UNIT_C_NO_SOP 10 -#define HIVE_ISYS_IRQ_CAP_UNIT_C_LATE_SOP 11 -/*#define HIVE_ISYS_IRQ_CAP_UNIT_C_UNDEF_PH 13*/ -#define HIVE_ISYS_IRQ_ACQ_UNIT_SOP_MISMATCH 12 -/*#define HIVE_ISYS_IRQ_ACQ_UNIT_UNDEF_PH 15*/ -#define HIVE_ISYS_IRQ_INP_CTRL_CAPA 13 -#define HIVE_ISYS_IRQ_INP_CTRL_CAPB 14 -#define HIVE_ISYS_IRQ_INP_CTRL_CAPC 15 -#define HIVE_ISYS_IRQ_CIO2AHB 16 -#define HIVE_ISYS_IRQ_DMA_BIT_ID 17 -#define HIVE_ISYS_IRQ_STREAM_MON_BIT_ID 18 -#define HIVE_ISYS_IRQ_NUM_BITS 19 - -/* DMA */ -#define HIVE_ISYS_DMA_CHANNEL 0 -#define HIVE_ISYS_DMA_IBUF_DDR_CONN 0 -#define HIVE_ISYS_DMA_HEIGHT 1 -#define HIVE_ISYS_DMA_ELEMS 1 /* both master buses of same width */ -#define HIVE_ISYS_DMA_STRIDE 0 /* no stride required as height is fixed to 1 */ -#define HIVE_ISYS_DMA_CROP 0 /* no cropping */ -#define HIVE_ISYS_DMA_EXTENSION 0 /* no extension as elem width is same on both side */ - -#endif /* _input_system_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h deleted file mode 100644 index efb3d7e135bdd..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/irq_controller_defs.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _irq_controller_defs_h -#define _irq_controller_defs_h - -#define _HRT_IRQ_CONTROLLER_EDGE_REG_IDX 0 -#define _HRT_IRQ_CONTROLLER_MASK_REG_IDX 1 -#define _HRT_IRQ_CONTROLLER_STATUS_REG_IDX 2 -#define _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX 3 -#define _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX 4 -#define _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX 5 -#define _HRT_IRQ_CONTROLLER_STR_OUT_ENABLE_REG_IDX 6 - -#define _HRT_IRQ_CONTROLLER_REG_ALIGN 4 - -#endif /* _irq_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h deleted file mode 100644 index e9106d1e6a63d..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2400_support.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _isp2400_support_h -#define _isp2400_support_h - -#ifndef ISP2400_VECTOR_TYPES -/* This typedef is to be able to include hive header files - in the host code which is useful in crun */ -typedef char *tmemvectors, *tmemvectoru, *tvector; -#endif - -#define hrt_isp_vamem1_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem1), addr, val) -#define hrt_isp_vamem2_store_16(cell, addr, val) hrt_mem_store_16(cell, HRT_PROC_TYPE_PROP(cell, _simd_vamem2), addr, val) - -#define hrt_isp_dmem(cell) HRT_PROC_TYPE_PROP(cell, _base_dmem) -#define hrt_isp_vmem(cell) HRT_PROC_TYPE_PROP(cell, _simd_vmem) - -#define hrt_isp_dmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_dmem(cell)) -#define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell)) - -#if ISP_HAS_HIST -#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram) -#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell)) -#endif - -#endif /* _isp2400_support_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h deleted file mode 100644 index e548e45a161d6..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp2401_mamoiada_params.h +++ /dev/null @@ -1,254 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Version */ -#define RTL_VERSION - -/* Cell name */ -#define ISP_CELL_TYPE isp2401_mamoiada -#define ISP_VMEM simd_vmem -#define _HRT_ISP_VMEM isp2401_mamoiada_simd_vmem - -/* instruction pipeline depth */ -#define ISP_BRANCHDELAY 5 - -/* bus */ -#define ISP_BUS_WIDTH 32 -#define ISP_BUS_ADDR_WIDTH 32 -#define ISP_BUS_BURST_SIZE 1 - -/* data-path */ -#define ISP_SCALAR_WIDTH 32 -#define ISP_SLICE_NELEMS 4 -#define ISP_VEC_NELEMS 64 -#define ISP_VEC_ELEMBITS 14 -#define ISP_VEC_ELEM8BITS 16 -#define ISP_CLONE_DATAPATH_IS_16 1 - -/* memories */ -#define ISP_DMEM_DEPTH 4096 -#define ISP_DMEM_BSEL_DOWNSAMPLE 8 -#define ISP_VMEM_DEPTH 3072 -#define ISP_VMEM_BSEL_DOWNSAMPLE 8 -#define ISP_VMEM_ELEMBITS 14 -#define ISP_VMEM_ELEM_PRECISION 14 -#define ISP_VMEM_IS_BAMEM 1 -#if ISP_VMEM_IS_BAMEM -#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 -#define ISP_VMEM_BAMEM_LATENCY 5 -#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 -#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 -#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 -#define ISP_VMEM_BAMEM_LININT 0 -#define ISP_VMEM_BAMEM_DAP_BITS 3 -#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 -#define ISP_VMEM_BAMEM_PID_BITS 3 -#define ISP_VMEM_BAMEM_OFFSET_BITS 19 -#define ISP_VMEM_BAMEM_ADDRESS_BITS 25 -#define ISP_VMEM_BAMEM_RID_BITS 4 -#define ISP_VMEM_BAMEM_TRANSPOSITION 1 -#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 -#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 -#define ISP_VMEM_BAMEM_LUT_ELEMS 16 -#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 -#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 -#define ISP_VMEM_BAMEM_SMART_FETCH 1 -#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 -#endif /* ISP_VMEM_IS_BAMEM */ -#define ISP_PMEM_DEPTH 2048 -#define ISP_PMEM_WIDTH 640 -#define ISP_VAMEM_ADDRESS_BITS 12 -#define ISP_VAMEM_ELEMBITS 12 -#define ISP_VAMEM_DEPTH 2048 -#define ISP_VAMEM_ALIGNMENT 2 -#define ISP_VA_ADDRESS_WIDTH 896 -#define ISP_VEC_VALSU_LATENCY ISP_VEC_NELEMS -#define ISP_HIST_ADDRESS_BITS 12 -#define ISP_HIST_ALIGNMENT 4 -#define ISP_HIST_COMP_IN_PREC 12 -#define ISP_HIST_DEPTH 1024 -#define ISP_HIST_WIDTH 24 -#define ISP_HIST_COMPONENTS 4 - -/* program counter */ -#define ISP_PC_WIDTH 13 - -/* Template switches */ -#define ISP_SHIELD_INPUT_DMEM 0 -#define ISP_SHIELD_OUTPUT_DMEM 1 -#define ISP_SHIELD_INPUT_VMEM 0 -#define ISP_SHIELD_OUTPUT_VMEM 0 -#define ISP_SHIELD_INPUT_PMEM 1 -#define ISP_SHIELD_OUTPUT_PMEM 1 -#define ISP_SHIELD_INPUT_HIST 1 -#define ISP_SHIELD_OUTPUT_HIST 1 -/* When LUT is select the shielding is always on */ -#define ISP_SHIELD_INPUT_VAMEM 1 -#define ISP_SHIELD_OUTPUT_VAMEM 1 - -#define ISP_HAS_IRQ 1 -#define ISP_HAS_SOFT_RESET 1 -#define ISP_HAS_VEC_DIV 0 -#define ISP_HAS_VFU_W_2O 1 -#define ISP_HAS_DEINT3 1 -#define ISP_HAS_LUT 1 -#define ISP_HAS_HIST 1 -#define ISP_HAS_VALSU 1 -#define ISP_HAS_3rdVALSU 1 -#define ISP_VRF1_HAS_2P 1 - -#define ISP_SRU_GUARDING 1 -#define ISP_VLSU_GUARDING 1 - -#define ISP_VRF_RAM 1 -#define ISP_SRF_RAM 1 - -#define ISP_SPLIT_VMUL_VADD_IS 0 -#define ISP_RFSPLIT_FPGA 0 - -/* RSN or Bus pipelining */ -#define ISP_RSN_PIPE 1 -#define ISP_VSF_BUS_PIPE 0 - -/* extra slave port to vmem */ -#define ISP_IF_VMEM 0 -#define ISP_GDC_VMEM 0 - -/* Streaming ports */ -#define ISP_IF 1 -#define ISP_IF_B 1 -#define ISP_GDC 1 -#define ISP_SCL 1 -#define ISP_GPFIFO 1 -#define ISP_SP 1 - -/* Removing Issue Slot(s) */ -#define ISP_HAS_NOT_SIMD_IS2 0 -#define ISP_HAS_NOT_SIMD_IS3 0 -#define ISP_HAS_NOT_SIMD_IS4 0 -#define ISP_HAS_NOT_SIMD_IS4_VADD 0 -#define ISP_HAS_NOT_SIMD_IS5 0 -#define ISP_HAS_NOT_SIMD_IS6 0 -#define ISP_HAS_NOT_SIMD_IS7 0 -#define ISP_HAS_NOT_SIMD_IS8 0 - -/* ICache */ -#define ISP_ICACHE 1 -#define ISP_ICACHE_ONLY 0 -#define ISP_ICACHE_PREFETCH 1 -#define ISP_ICACHE_INDEX_BITS 8 -#define ISP_ICACHE_SET_BITS 5 -#define ISP_ICACHE_BLOCKS_PER_SET_BITS 1 - -/* Experimental Flags */ -#define ISP_EXP_1 0 -#define ISP_EXP_2 0 -#define ISP_EXP_3 0 -#define ISP_EXP_4 0 -#define ISP_EXP_5 0 -#define ISP_EXP_6 0 - -/* Derived values */ -#define ISP_LOG2_PMEM_WIDTH 10 -#define ISP_VEC_WIDTH 896 -#define ISP_SLICE_WIDTH 56 -#define ISP_VMEM_WIDTH 896 -#define ISP_VMEM_ALIGN 128 -#if ISP_VMEM_IS_BAMEM -#define ISP_VMEM_ALIGN_ELEM 2 -#endif /* ISP_VMEM_IS_BAMEM */ -#define ISP_SIMDLSU 1 -#define ISP_LSU_IMM_BITS 12 - -/* convenient shortcuts for software*/ -#define ISP_NWAY ISP_VEC_NELEMS -#define NBITS ISP_VEC_ELEMBITS - -#define _isp_ceil_div(a, b) (((a) + (b) - 1) / (b)) - -#define ISP_VEC_ALIGN ISP_VMEM_ALIGN - -/* HRT specific vector support */ -#define isp2401_mamoiada_vector_alignment ISP_VEC_ALIGN -#define isp2401_mamoiada_vector_elem_bits ISP_VMEM_ELEMBITS -#define isp2401_mamoiada_vector_elem_precision ISP_VMEM_ELEM_PRECISION -#define isp2401_mamoiada_vector_num_elems ISP_VEC_NELEMS - -/* register file sizes */ -#define ISP_RF0_SIZE 64 -#define ISP_RF1_SIZE 16 -#define ISP_RF2_SIZE 64 -#define ISP_RF3_SIZE 4 -#define ISP_RF4_SIZE 64 -#define ISP_RF5_SIZE 16 -#define ISP_RF6_SIZE 16 -#define ISP_RF7_SIZE 16 -#define ISP_RF8_SIZE 16 -#define ISP_RF9_SIZE 16 -#define ISP_RF10_SIZE 16 -#define ISP_RF11_SIZE 16 -#define ISP_VRF1_SIZE 32 -#define ISP_VRF2_SIZE 32 -#define ISP_VRF3_SIZE 32 -#define ISP_VRF4_SIZE 32 -#define ISP_VRF5_SIZE 32 -#define ISP_VRF6_SIZE 32 -#define ISP_VRF7_SIZE 32 -#define ISP_VRF8_SIZE 32 -#define ISP_SRF1_SIZE 4 -#define ISP_SRF2_SIZE 64 -#define ISP_SRF3_SIZE 64 -#define ISP_SRF4_SIZE 32 -#define ISP_SRF5_SIZE 64 -#define ISP_FRF0_SIZE 16 -#define ISP_FRF1_SIZE 4 -#define ISP_FRF2_SIZE 16 -#define ISP_FRF3_SIZE 4 -#define ISP_FRF4_SIZE 4 -#define ISP_FRF5_SIZE 8 -#define ISP_FRF6_SIZE 4 -/* register file read latency */ -#define ISP_VRF1_READ_LAT 1 -#define ISP_VRF2_READ_LAT 1 -#define ISP_VRF3_READ_LAT 1 -#define ISP_VRF4_READ_LAT 1 -#define ISP_VRF5_READ_LAT 1 -#define ISP_VRF6_READ_LAT 1 -#define ISP_VRF7_READ_LAT 1 -#define ISP_VRF8_READ_LAT 1 -#define ISP_SRF1_READ_LAT 1 -#define ISP_SRF2_READ_LAT 1 -#define ISP_SRF3_READ_LAT 1 -#define ISP_SRF4_READ_LAT 1 -#define ISP_SRF5_READ_LAT 1 -#define ISP_SRF5_READ_LAT 1 -/* immediate sizes */ -#define ISP_IS1_IMM_BITS 14 -#define ISP_IS2_IMM_BITS 13 -#define ISP_IS3_IMM_BITS 14 -#define ISP_IS4_IMM_BITS 14 -#define ISP_IS5_IMM_BITS 9 -#define ISP_IS6_IMM_BITS 16 -#define ISP_IS7_IMM_BITS 9 -#define ISP_IS8_IMM_BITS 16 -#define ISP_IS9_IMM_BITS 11 -/* fifo depths */ -#define ISP_IF_FIFO_DEPTH 0 -#define ISP_IF_B_FIFO_DEPTH 0 -#define ISP_DMA_FIFO_DEPTH 0 -#define ISP_OF_FIFO_DEPTH 0 -#define ISP_GDC_FIFO_DEPTH 0 -#define ISP_SCL_FIFO_DEPTH 0 -#define ISP_GPFIFO_FIFO_DEPTH 0 -#define ISP_SP_FIFO_DEPTH 0 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h deleted file mode 100644 index 5bdc16c71e82c..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_acquisition_defs.h +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _isp_acquisition_defs_h -#define _isp_acquisition_defs_h - -#define _ISP_ACQUISITION_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_ACQUISITION_BYTES_PER_ELEM 4 - -/* --------------------------------------------------*/ - -#define NOF_ACQ_IRQS 1 - -/* --------------------------------------------------*/ -/* FSM */ -/* --------------------------------------------------*/ -#define MEM2STREAM_FSM_STATE_BITS 2 -#define ACQ_SYNCHRONIZER_FSM_STATE_BITS 2 - -/* --------------------------------------------------*/ -/* REGISTER INFO */ -/* --------------------------------------------------*/ - -#define NOF_ACQ_REGS 12 - -// Register id's of MMIO slave accesible registers -#define ACQ_START_ADDR_REG_ID 0 -#define ACQ_MEM_REGION_SIZE_REG_ID 1 -#define ACQ_NUM_MEM_REGIONS_REG_ID 2 -#define ACQ_INIT_REG_ID 3 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_ID 4 -#define ACQ_RECEIVED_LONG_PACKETS_REG_ID 5 -#define ACQ_LAST_COMMAND_REG_ID 6 -#define ACQ_NEXT_COMMAND_REG_ID 7 -#define ACQ_LAST_ACKNOWLEDGE_REG_ID 8 -#define ACQ_NEXT_ACKNOWLEDGE_REG_ID 9 -#define ACQ_FSM_STATE_INFO_REG_ID 10 -#define ACQ_INT_CNTR_INFO_REG_ID 11 - -// Register width -#define ACQ_START_ADDR_REG_WIDTH 9 -#define ACQ_MEM_REGION_SIZE_REG_WIDTH 9 -#define ACQ_NUM_MEM_REGIONS_REG_WIDTH 9 -#define ACQ_INIT_REG_WIDTH 3 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 -#define ACQ_RECEIVED_LONG_PACKETS_REG_WIDTH 32 -#define ACQ_LAST_COMMAND_REG_WIDTH 32 -#define ACQ_NEXT_COMMAND_REG_WIDTH 32 -#define ACQ_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define ACQ_FSM_STATE_INFO_REG_WIDTH ((MEM2STREAM_FSM_STATE_BITS * 3) + (ACQ_SYNCHRONIZER_FSM_STATE_BITS * 3)) -#define ACQ_INT_CNTR_INFO_REG_WIDTH 32 - -/* register reset value */ -#define ACQ_START_ADDR_REG_RSTVAL 0 -#define ACQ_MEM_REGION_SIZE_REG_RSTVAL 128 -#define ACQ_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define ACQ_INIT_REG_RSTVAL 0 -#define ACQ_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 -#define ACQ_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 -#define ACQ_LAST_COMMAND_REG_RSTVAL 0 -#define ACQ_NEXT_COMMAND_REG_RSTVAL 0 -#define ACQ_LAST_ACKNOWLEDGE_REG_RSTVAL 0 -#define ACQ_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 -#define ACQ_FSM_STATE_INFO_REG_RSTVAL 0 -#define ACQ_INT_CNTR_INFO_REG_RSTVAL 0 - -/* bit definitions */ -#define ACQ_INIT_RST_REG_BIT 0 -#define ACQ_INIT_RESYNC_BIT 2 -#define ACQ_INIT_RST_IDX ACQ_INIT_RST_REG_BIT -#define ACQ_INIT_RST_BITS 1 -#define ACQ_INIT_RESYNC_IDX ACQ_INIT_RESYNC_BIT -#define ACQ_INIT_RESYNC_BITS 1 - -/* --------------------------------------------------*/ -/* TOKEN INFO */ -/* --------------------------------------------------*/ -#define ACQ_TOKEN_ID_LSB 0 -#define ACQ_TOKEN_ID_MSB 3 -#define ACQ_TOKEN_WIDTH (ACQ_TOKEN_ID_MSB - ACQ_TOKEN_ID_LSB + 1) // 4 -#define ACQ_TOKEN_ID_IDX 0 -#define ACQ_TOKEN_ID_BITS ACQ_TOKEN_WIDTH -#define ACQ_INIT_CMD_INIT_IDX 4 -#define ACQ_INIT_CMD_INIT_BITS 3 -#define ACQ_CMD_START_ADDR_IDX 4 -#define ACQ_CMD_START_ADDR_BITS 9 -#define ACQ_CMD_NOFWORDS_IDX 13 -#define ACQ_CMD_NOFWORDS_BITS 9 -#define ACQ_MEM_REGION_ID_IDX 22 -#define ACQ_MEM_REGION_ID_BITS 9 -#define ACQ_PACKET_LENGTH_TOKEN_MSB 21 -#define ACQ_PACKET_LENGTH_TOKEN_LSB 13 -#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_MSB 9 -#define ACQ_PACKET_DATA_FORMAT_ID_TOKEN_LSB 4 -#define ACQ_PACKET_CH_ID_TOKEN_MSB 11 -#define ACQ_PACKET_CH_ID_TOKEN_LSB 10 -#define ACQ_PACKET_MEM_REGION_ID_TOKEN_MSB 12 /* only for capt_end_of_packet_written */ -#define ACQ_PACKET_MEM_REGION_ID_TOKEN_LSB 4 /* only for capt_end_of_packet_written */ - -/* Command tokens IDs */ -#define ACQ_READ_REGION_AUTO_INCR_TOKEN_ID 0 //0000b -#define ACQ_READ_REGION_TOKEN_ID 1 //0001b -#define ACQ_READ_REGION_SOP_TOKEN_ID 2 //0010b -#define ACQ_INIT_TOKEN_ID 8 //1000b - -/* Acknowledge token IDs */ -#define ACQ_READ_REGION_ACK_TOKEN_ID 0 //0000b -#define ACQ_END_OF_PACKET_TOKEN_ID 4 //0100b -#define ACQ_END_OF_REGION_TOKEN_ID 5 //0101b -#define ACQ_SOP_MISMATCH_TOKEN_ID 6 //0110b -#define ACQ_UNDEF_PH_TOKEN_ID 7 //0111b - -#define ACQ_TOKEN_MEMREGIONID_MSB 30 -#define ACQ_TOKEN_MEMREGIONID_LSB 22 -#define ACQ_TOKEN_NOFWORDS_MSB 21 -#define ACQ_TOKEN_NOFWORDS_LSB 13 -#define ACQ_TOKEN_STARTADDR_MSB 12 -#define ACQ_TOKEN_STARTADDR_LSB 4 - -/* --------------------------------------------------*/ -/* MIPI */ -/* --------------------------------------------------*/ - -#define WORD_COUNT_WIDTH 16 -#define PKT_CODE_WIDTH 6 -#define CHN_NO_WIDTH 2 -#define ERROR_INFO_WIDTH 8 - -#define LONG_PKTCODE_MAX 63 -#define LONG_PKTCODE_MIN 16 -#define SHORT_PKTCODE_MAX 15 - -#define EOF_CODE 1 - -/* --------------------------------------------------*/ -/* Packet Info */ -/* --------------------------------------------------*/ -#define ACQ_START_OF_FRAME 0 -#define ACQ_END_OF_FRAME 1 -#define ACQ_START_OF_LINE 2 -#define ACQ_END_OF_LINE 3 -#define ACQ_LINE_PAYLOAD 4 -#define ACQ_GEN_SH_PKT 5 - -/* bit definition */ -#define ACQ_PKT_TYPE_IDX 16 -#define ACQ_PKT_TYPE_BITS 6 -#define ACQ_PKT_SOP_IDX 32 -#define ACQ_WORD_CNT_IDX 0 -#define ACQ_WORD_CNT_BITS 16 -#define ACQ_PKT_INFO_IDX 16 -#define ACQ_PKT_INFO_BITS 8 -#define ACQ_HEADER_DATA_IDX 0 -#define ACQ_HEADER_DATA_BITS 16 -#define ACQ_ACK_TOKEN_ID_IDX ACQ_TOKEN_ID_IDX -#define ACQ_ACK_TOKEN_ID_BITS ACQ_TOKEN_ID_BITS -#define ACQ_ACK_NOFWORDS_IDX 13 -#define ACQ_ACK_NOFWORDS_BITS 9 -#define ACQ_ACK_PKT_LEN_IDX 4 -#define ACQ_ACK_PKT_LEN_BITS 16 - -/* --------------------------------------------------*/ -/* Packet Data Type */ -/* --------------------------------------------------*/ - -#define ACQ_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ -#define ACQ_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ -#define ACQ_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ -#define ACQ_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ -#define ACQ_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ -#define ACQ_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define ACQ_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define ACQ_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define ACQ_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define ACQ_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define ACQ_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define ACQ_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define ACQ_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define ACQ_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define ACQ_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define ACQ_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define ACQ_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define ACQ_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define ACQ_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define ACQ_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define ACQ_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define ACQ_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define ACQ_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define ACQ_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define ACQ_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define ACQ_SOF_DATA 0 /* 00 0000 frame start */ -#define ACQ_EOF_DATA 1 /* 00 0001 frame end */ -#define ACQ_SOL_DATA 2 /* 00 0010 line start */ -#define ACQ_EOL_DATA 3 /* 00 0011 line end */ -#define ACQ_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define ACQ_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define ACQ_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define ACQ_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define ACQ_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define ACQ_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define ACQ_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define ACQ_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define ACQ_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define ACQ_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -#define ACQ_RESERVED_DATA_TYPE_MIN 56 -#define ACQ_RESERVED_DATA_TYPE_MAX 63 -#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 -#define ACQ_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 -#define ACQ_YUV_RESERVED_DATA_TYPE 27 -#define ACQ_RGB_RESERVED_DATA_TYPE_MIN 37 -#define ACQ_RGB_RESERVED_DATA_TYPE_MAX 39 -#define ACQ_RAW_RESERVED_DATA_TYPE_MIN 46 -#define ACQ_RAW_RESERVED_DATA_TYPE_MAX 47 - -/* --------------------------------------------------*/ - -#endif /* _isp_acquisition_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h deleted file mode 100644 index 5ab796e5a53f0..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/isp_capture_defs.h +++ /dev/null @@ -1,278 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _isp_capture_defs_h -#define _isp_capture_defs_h - -#define _ISP_CAPTURE_REG_ALIGN 4 /* assuming 32 bit control bus width */ -#define _ISP_CAPTURE_BITS_PER_ELEM 32 /* only for data, not SOP */ -#define _ISP_CAPTURE_BYTES_PER_ELEM (_ISP_CAPTURE_BITS_PER_ELEM / 8) -#define _ISP_CAPTURE_BYTES_PER_WORD 32 /* 256/8 */ -#define _ISP_CAPTURE_ELEM_PER_WORD _ISP_CAPTURE_BYTES_PER_WORD / _ISP_CAPTURE_BYTES_PER_ELEM - -/* --------------------------------------------------*/ - -#define NOF_IRQS 2 - -/* --------------------------------------------------*/ -/* REGISTER INFO */ -/* --------------------------------------------------*/ - -// Number of registers -#define CAPT_NOF_REGS 16 - -// Register id's of MMIO slave accesible registers -#define CAPT_START_MODE_REG_ID 0 -#define CAPT_START_ADDR_REG_ID 1 -#define CAPT_MEM_REGION_SIZE_REG_ID 2 -#define CAPT_NUM_MEM_REGIONS_REG_ID 3 -#define CAPT_INIT_REG_ID 4 -#define CAPT_START_REG_ID 5 -#define CAPT_STOP_REG_ID 6 - -#define CAPT_PACKET_LENGTH_REG_ID 7 -#define CAPT_RECEIVED_LENGTH_REG_ID 8 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_ID 9 -#define CAPT_RECEIVED_LONG_PACKETS_REG_ID 10 -#define CAPT_LAST_COMMAND_REG_ID 11 -#define CAPT_NEXT_COMMAND_REG_ID 12 -#define CAPT_LAST_ACKNOWLEDGE_REG_ID 13 -#define CAPT_NEXT_ACKNOWLEDGE_REG_ID 14 -#define CAPT_FSM_STATE_INFO_REG_ID 15 - -// Register width -#define CAPT_START_MODE_REG_WIDTH 1 - -#define CAPT_START_REG_WIDTH 1 -#define CAPT_STOP_REG_WIDTH 1 - -/* --------------------------------------------------*/ -/* FSM */ -/* --------------------------------------------------*/ -#define CAPT_WRITE2MEM_FSM_STATE_BITS 2 -#define CAPT_SYNCHRONIZER_FSM_STATE_BITS 3 - -#define CAPT_PACKET_LENGTH_REG_WIDTH 17 -#define CAPT_RECEIVED_LENGTH_REG_WIDTH 17 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_WIDTH 32 -#define CAPT_RECEIVED_LONG_PACKETS_REG_WIDTH 32 -#define CAPT_LAST_COMMAND_REG_WIDTH 32 -#define CAPT_LAST_ACKNOWLEDGE_REG_WIDTH 32 -#define CAPT_NEXT_ACKNOWLEDGE_REG_WIDTH 32 -#define CAPT_FSM_STATE_INFO_REG_WIDTH ((CAPT_WRITE2MEM_FSM_STATE_BITS * 3) + (CAPT_SYNCHRONIZER_FSM_STATE_BITS * 3)) - -/* register reset value */ -#define CAPT_START_MODE_REG_RSTVAL 0 -#define CAPT_START_ADDR_REG_RSTVAL 0 -#define CAPT_MEM_REGION_SIZE_REG_RSTVAL 128 -#define CAPT_NUM_MEM_REGIONS_REG_RSTVAL 3 -#define CAPT_INIT_REG_RSTVAL 0 - -#define CAPT_START_REG_RSTVAL 0 -#define CAPT_STOP_REG_RSTVAL 0 - -#define CAPT_PACKET_LENGTH_REG_RSTVAL 0 -#define CAPT_RECEIVED_LENGTH_REG_RSTVAL 0 -#define CAPT_RECEIVED_SHORT_PACKETS_REG_RSTVAL 0 -#define CAPT_RECEIVED_LONG_PACKETS_REG_RSTVAL 0 -#define CAPT_LAST_COMMAND_REG_RSTVAL 0 -#define CAPT_NEXT_COMMAND_REG_RSTVAL 0 -#define CAPT_LAST_ACKNOWLEDGE_REG_RSTVAL 0 -#define CAPT_NEXT_ACKNOWLEDGE_REG_RSTVAL 0 -#define CAPT_FSM_STATE_INFO_REG_RSTVAL 0 - -/* bit definitions */ -#define CAPT_INIT_RST_REG_BIT 0 -#define CAPT_INIT_FLUSH_BIT 1 -#define CAPT_INIT_RESYNC_BIT 2 -#define CAPT_INIT_RESTART_BIT 3 -#define CAPT_INIT_RESTART_MEM_ADDR_LSB 4 - -#define CAPT_INIT_RST_REG_IDX CAPT_INIT_RST_REG_BIT -#define CAPT_INIT_RST_REG_BITS 1 -#define CAPT_INIT_FLUSH_IDX CAPT_INIT_FLUSH_BIT -#define CAPT_INIT_FLUSH_BITS 1 -#define CAPT_INIT_RESYNC_IDX CAPT_INIT_RESYNC_BIT -#define CAPT_INIT_RESYNC_BITS 1 -#define CAPT_INIT_RESTART_IDX CAPT_INIT_RESTART_BIT -#define CAPT_INIT_RESTART_BITS 1 -#define CAPT_INIT_RESTART_MEM_ADDR_IDX CAPT_INIT_RESTART_MEM_ADDR_LSB - -/* --------------------------------------------------*/ -/* TOKEN INFO */ -/* --------------------------------------------------*/ -#define CAPT_TOKEN_ID_LSB 0 -#define CAPT_TOKEN_ID_MSB 3 -#define CAPT_TOKEN_WIDTH (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) /* 4 */ - -/* Command tokens IDs */ -#define CAPT_START_TOKEN_ID 0 /* 0000b */ -#define CAPT_STOP_TOKEN_ID 1 /* 0001b */ -#define CAPT_FREEZE_TOKEN_ID 2 /* 0010b */ -#define CAPT_RESUME_TOKEN_ID 3 /* 0011b */ -#define CAPT_INIT_TOKEN_ID 8 /* 1000b */ - -#define CAPT_START_TOKEN_BIT 0 -#define CAPT_STOP_TOKEN_BIT 0 -#define CAPT_FREEZE_TOKEN_BIT 0 -#define CAPT_RESUME_TOKEN_BIT 0 -#define CAPT_INIT_TOKEN_BIT 0 - -/* Acknowledge token IDs */ -#define CAPT_END_OF_PACKET_RECEIVED_TOKEN_ID 0 /* 0000b */ -#define CAPT_END_OF_PACKET_WRITTEN_TOKEN_ID 1 /* 0001b */ -#define CAPT_END_OF_REGION_WRITTEN_TOKEN_ID 2 /* 0010b */ -#define CAPT_FLUSH_DONE_TOKEN_ID 3 /* 0011b */ -#define CAPT_PREMATURE_SOP_TOKEN_ID 4 /* 0100b */ -#define CAPT_MISSING_SOP_TOKEN_ID 5 /* 0101b */ -#define CAPT_UNDEF_PH_TOKEN_ID 6 /* 0110b */ -#define CAPT_STOP_ACK_TOKEN_ID 7 /* 0111b */ - -#define CAPT_PACKET_LENGTH_TOKEN_MSB 19 -#define CAPT_PACKET_LENGTH_TOKEN_LSB 4 -#define CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB 20 -#define CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB 4 -#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB 25 -#define CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB 20 -#define CAPT_PACKET_CH_ID_TOKEN_MSB 27 -#define CAPT_PACKET_CH_ID_TOKEN_LSB 26 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB 29 -#define CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB 21 - -/* bit definition */ -#define CAPT_CMD_IDX CAPT_TOKEN_ID_LSB -#define CAPT_CMD_BITS (CAPT_TOKEN_ID_MSB - CAPT_TOKEN_ID_LSB + 1) -#define CAPT_SOP_IDX 32 -#define CAPT_SOP_BITS 1 -#define CAPT_PKT_INFO_IDX 16 -#define CAPT_PKT_INFO_BITS 8 -#define CAPT_PKT_TYPE_IDX 0 -#define CAPT_PKT_TYPE_BITS 6 -#define CAPT_HEADER_DATA_IDX 0 -#define CAPT_HEADER_DATA_BITS 16 -#define CAPT_PKT_DATA_IDX 0 -#define CAPT_PKT_DATA_BITS 32 -#define CAPT_WORD_CNT_IDX 0 -#define CAPT_WORD_CNT_BITS 16 -#define CAPT_ACK_TOKEN_ID_IDX 0 -#define CAPT_ACK_TOKEN_ID_BITS 4 -//#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB -//#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) -//#define CAPT_ACK_PKT_INFO_IDX 20 -//#define CAPT_ACK_PKT_INFO_BITS 8 -//#define CAPT_ACK_MEM_REG_ID1_IDX 20 /* for capt_end_of_packet_written */ -//#define CAPT_ACK_MEM_REG_ID2_IDX 4 /* for capt_end_of_region_written */ -#define CAPT_ACK_PKT_LEN_IDX CAPT_PACKET_LENGTH_TOKEN_LSB -#define CAPT_ACK_PKT_LEN_BITS (CAPT_PACKET_LENGTH_TOKEN_MSB - CAPT_PACKET_LENGTH_TOKEN_LSB + 1) -#define CAPT_ACK_SUPER_PKT_LEN_IDX CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB -#define CAPT_ACK_SUPER_PKT_LEN_BITS (CAPT_SUPER_PACKET_LENGTH_TOKEN_MSB - CAPT_SUPER_PACKET_LENGTH_TOKEN_LSB + 1) -#define CAPT_ACK_PKT_INFO_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB -#define CAPT_ACK_PKT_INFO_BITS (CAPT_PACKET_CH_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) -#define CAPT_ACK_MEM_REGION_ID_IDX CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB -#define CAPT_ACK_MEM_REGION_ID_BITS (CAPT_PACKET_MEM_REGION_ID_TOKEN_MSB - CAPT_PACKET_MEM_REGION_ID_TOKEN_LSB + 1) -#define CAPT_ACK_PKT_TYPE_IDX CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB -#define CAPT_ACK_PKT_TYPE_BITS (CAPT_PACKET_DATA_FORMAT_ID_TOKEN_MSB - CAPT_PACKET_DATA_FORMAT_ID_TOKEN_LSB + 1) -#define CAPT_INIT_TOKEN_INIT_IDX 4 -#define CAPT_INIT_TOKEN_INIT_BITS 22 - -/* --------------------------------------------------*/ -/* MIPI */ -/* --------------------------------------------------*/ - -#define CAPT_WORD_COUNT_WIDTH 16 -#define CAPT_PKT_CODE_WIDTH 6 -#define CAPT_CHN_NO_WIDTH 2 -#define CAPT_ERROR_INFO_WIDTH 8 - -#define LONG_PKTCODE_MAX 63 -#define LONG_PKTCODE_MIN 16 -#define SHORT_PKTCODE_MAX 15 - -/* --------------------------------------------------*/ -/* Packet Info */ -/* --------------------------------------------------*/ -#define CAPT_START_OF_FRAME 0 -#define CAPT_END_OF_FRAME 1 -#define CAPT_START_OF_LINE 2 -#define CAPT_END_OF_LINE 3 -#define CAPT_LINE_PAYLOAD 4 -#define CAPT_GEN_SH_PKT 5 - -/* --------------------------------------------------*/ -/* Packet Data Type */ -/* --------------------------------------------------*/ - -#define CAPT_YUV420_8_DATA 24 /* 01 1000 YUV420 8-bit */ -#define CAPT_YUV420_10_DATA 25 /* 01 1001 YUV420 10-bit */ -#define CAPT_YUV420_8L_DATA 26 /* 01 1010 YUV420 8-bit legacy */ -#define CAPT_YUV422_8_DATA 30 /* 01 1110 YUV422 8-bit */ -#define CAPT_YUV422_10_DATA 31 /* 01 1111 YUV422 10-bit */ -#define CAPT_RGB444_DATA 32 /* 10 0000 RGB444 */ -#define CAPT_RGB555_DATA 33 /* 10 0001 RGB555 */ -#define CAPT_RGB565_DATA 34 /* 10 0010 RGB565 */ -#define CAPT_RGB666_DATA 35 /* 10 0011 RGB666 */ -#define CAPT_RGB888_DATA 36 /* 10 0100 RGB888 */ -#define CAPT_RAW6_DATA 40 /* 10 1000 RAW6 */ -#define CAPT_RAW7_DATA 41 /* 10 1001 RAW7 */ -#define CAPT_RAW8_DATA 42 /* 10 1010 RAW8 */ -#define CAPT_RAW10_DATA 43 /* 10 1011 RAW10 */ -#define CAPT_RAW12_DATA 44 /* 10 1100 RAW12 */ -#define CAPT_RAW14_DATA 45 /* 10 1101 RAW14 */ -#define CAPT_USR_DEF_1_DATA 48 /* 11 0000 JPEG [User Defined 8-bit Data Type 1] */ -#define CAPT_USR_DEF_2_DATA 49 /* 11 0001 User Defined 8-bit Data Type 2 */ -#define CAPT_USR_DEF_3_DATA 50 /* 11 0010 User Defined 8-bit Data Type 3 */ -#define CAPT_USR_DEF_4_DATA 51 /* 11 0011 User Defined 8-bit Data Type 4 */ -#define CAPT_USR_DEF_5_DATA 52 /* 11 0100 User Defined 8-bit Data Type 5 */ -#define CAPT_USR_DEF_6_DATA 53 /* 11 0101 User Defined 8-bit Data Type 6 */ -#define CAPT_USR_DEF_7_DATA 54 /* 11 0110 User Defined 8-bit Data Type 7 */ -#define CAPT_USR_DEF_8_DATA 55 /* 11 0111 User Defined 8-bit Data Type 8 */ -#define CAPT_Emb_DATA 18 /* 01 0010 embedded eight bit non image data */ -#define CAPT_SOF_DATA 0 /* 00 0000 frame start */ -#define CAPT_EOF_DATA 1 /* 00 0001 frame end */ -#define CAPT_SOL_DATA 2 /* 00 0010 line start */ -#define CAPT_EOL_DATA 3 /* 00 0011 line end */ -#define CAPT_GEN_SH1_DATA 8 /* 00 1000 Generic Short Packet Code 1 */ -#define CAPT_GEN_SH2_DATA 9 /* 00 1001 Generic Short Packet Code 2 */ -#define CAPT_GEN_SH3_DATA 10 /* 00 1010 Generic Short Packet Code 3 */ -#define CAPT_GEN_SH4_DATA 11 /* 00 1011 Generic Short Packet Code 4 */ -#define CAPT_GEN_SH5_DATA 12 /* 00 1100 Generic Short Packet Code 5 */ -#define CAPT_GEN_SH6_DATA 13 /* 00 1101 Generic Short Packet Code 6 */ -#define CAPT_GEN_SH7_DATA 14 /* 00 1110 Generic Short Packet Code 7 */ -#define CAPT_GEN_SH8_DATA 15 /* 00 1111 Generic Short Packet Code 8 */ -#define CAPT_YUV420_8_CSPS_DATA 28 /* 01 1100 YUV420 8-bit (Chroma Shifted Pixel Sampling) */ -#define CAPT_YUV420_10_CSPS_DATA 29 /* 01 1101 YUV420 10-bit (Chroma Shifted Pixel Sampling) */ -#define CAPT_RESERVED_DATA_TYPE_MIN 56 -#define CAPT_RESERVED_DATA_TYPE_MAX 63 -#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MIN 19 -#define CAPT_GEN_LONG_RESERVED_DATA_TYPE_MAX 23 -#define CAPT_YUV_RESERVED_DATA_TYPE 27 -#define CAPT_RGB_RESERVED_DATA_TYPE_MIN 37 -#define CAPT_RGB_RESERVED_DATA_TYPE_MAX 39 -#define CAPT_RAW_RESERVED_DATA_TYPE_MIN 46 -#define CAPT_RAW_RESERVED_DATA_TYPE_MAX 47 - -/* --------------------------------------------------*/ -/* Capture Unit State */ -/* --------------------------------------------------*/ -#define CAPT_FREE_RUN 0 -#define CAPT_NO_SYNC 1 -#define CAPT_SYNC_SWP 2 -#define CAPT_SYNC_MWP 3 -#define CAPT_SYNC_WAIT 4 -#define CAPT_FREEZE 5 -#define CAPT_RUN 6 - -/* --------------------------------------------------*/ - -#endif /* _isp_capture_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/mmu_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/mmu_defs.h deleted file mode 100644 index c038f39ffd25e..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/mmu_defs.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _mmu_defs_h -#define _mmu_defs_h - -#define _HRT_MMU_INVALIDATE_TLB_REG_IDX 0 -#define _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX 1 - -#define _HRT_MMU_REG_ALIGN 4 - -#endif /* _mmu_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/scalar_processor_2400_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/scalar_processor_2400_params.h deleted file mode 100644 index 9b6c2893d9507..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/scalar_processor_2400_params.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _scalar_processor_2400_params_h -#define _scalar_processor_2400_params_h - -#include "cell_params.h" - -#endif /* _scalar_processor_2400_params_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/str2mem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/str2mem_defs.h deleted file mode 100644 index 1cb62444cf68b..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/str2mem_defs.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _ST2MEM_DEFS_H -#define _ST2MEM_DEFS_H - -#define _STR2MEM_CRUN_BIT 0x100000 -#define _STR2MEM_CMD_BITS 0x0F0000 -#define _STR2MEM_COUNT_BITS 0x00FFFF - -#define _STR2MEM_BLOCKS_CMD 0xA0000 -#define _STR2MEM_PACKETS_CMD 0xB0000 -#define _STR2MEM_BYTES_CMD 0xC0000 -#define _STR2MEM_BYTES_FROM_PACKET_CMD 0xD0000 - -#define _STR2MEM_SOFT_RESET_REG_ID 0 -#define _STR2MEM_INPUT_ENDIANNESS_REG_ID 1 -#define _STR2MEM_OUTPUT_ENDIANNESS_REG_ID 2 -#define _STR2MEM_BIT_SWAPPING_REG_ID 3 -#define _STR2MEM_BLOCK_SYNC_LEVEL_REG_ID 4 -#define _STR2MEM_PACKET_SYNC_LEVEL_REG_ID 5 -#define _STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID 6 -#define _STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID 7 -#define _STR2MEM_EN_STAT_UPDATE_ID 8 - -#define _STR2MEM_REG_ALIGN 4 - -#endif /* _ST2MEM_DEFS_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/streaming_to_mipi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/streaming_to_mipi_defs.h deleted file mode 100644 index 60143b8743a2d..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/streaming_to_mipi_defs.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _streaming_to_mipi_defs_h -#define _streaming_to_mipi_defs_h - -#define HIVE_STR_TO_MIPI_VALID_A_BIT 0 -#define HIVE_STR_TO_MIPI_VALID_B_BIT 1 -#define HIVE_STR_TO_MIPI_SOL_BIT 2 -#define HIVE_STR_TO_MIPI_EOL_BIT 3 -#define HIVE_STR_TO_MIPI_SOF_BIT 4 -#define HIVE_STR_TO_MIPI_EOF_BIT 5 -#define HIVE_STR_TO_MIPI_CH_ID_LSB 6 - -#define HIVE_STR_TO_MIPI_DATA_A_LSB (HIVE_STR_TO_MIPI_VALID_B_BIT + 1) - -#endif /* _streaming_to_mipi_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h deleted file mode 100644 index 75451e090f4ff..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/timed_controller_defs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _timed_controller_defs_h -#define _timed_controller_defs_h - -#define _HRT_TIMED_CONTROLLER_CMD_REG_IDX 0 - -#define _HRT_TIMED_CONTROLLER_REG_ALIGN 4 - -#endif /* _timed_controller_defs_h */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/version.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/version.h deleted file mode 100644 index bbc4948baea9b..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/version.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef HRT_VERSION_H -#define HRT_VERSION_H -#define HRT_VERSION_MAJOR 1 -#define HRT_VERSION_MINOR 4 -#define HRT_VERSION 1_4 -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_common_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_common_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_common_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_common_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/css_receiver_2400_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/dma_v2_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/dma_v2_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/gdc_v2_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/gdc_v2_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gp_timer_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/gp_timer_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gp_timer_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/gp_timer_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/gpio_block_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/gpio_block_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h index 54837b5246554..d7db964d5cece 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h @@ -18,8 +18,8 @@ #include #include "dma_global.h" -#include /* HRTCAT() */ -#include /* _hrt_get_bits() */ +#include /* HRTCAT() */ +#include /* _hrt_get_bits() */ #include /* HIVE_DMA_NUM_CHANNELS */ #include diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h index 0fb0172badc5d..3b6cc27ecb289 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h @@ -21,7 +21,7 @@ #include "assert_support.h" -#include /* _hrt_get_bits() */ +#include /* _hrt_get_bits() */ STORAGE_CLASS_EVENT_C void event_wait_for(const event_ID_t ID) { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c index e9116f11dc80f..82f7c43bcb0af 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c @@ -17,7 +17,7 @@ #include #include "device_access.h" -#include +#include #include "gp_device.h" diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h index 2a6937d0b69ca..ee38059d6ceb8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h @@ -25,12 +25,12 @@ #include "system_global.h" -/* HRT assumes 32 by default (see Linux/include/hrt/hive_types.h), overrule it in case it is different */ +/* HRT assumes 32 by default (see Linux/include/hive_types.h), overrule it in case it is different */ #undef HRT_ADDRESS_WIDTH #define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */ /* This interface is deprecated */ -#include "hrt/hive_types.h" +#include "hive_types.h" /* * Cell specific address maps diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h index 539d941eb9feb..f185859e3084e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h @@ -17,7 +17,7 @@ #define IS_TIMED_CTRL_VERSION_1 -#include +#include "timed_controller_defs.h" /** * Order of the input bits for the timed controller taken from diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_streaming_to_mipi_types_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_streaming_to_mipi_types_hrt.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_streaming_to_mipi_types_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_types.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_configs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_configs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_states.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_states.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/if_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/if_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/if_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/if_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_formatter_subsystem_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_formatter_subsystem_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/input_formatter_subsystem_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_selector_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_selector_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/input_selector_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_switch_2400_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_switch_2400_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/input_switch_2400_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_ctrl_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_ctrl_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_ctrl_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/input_system_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/irq_controller_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/irq_controller_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/irq_controller_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_acquisition_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_acquisition_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_acquisition_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_capture_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp_capture_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_capture_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/mmu_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/mmu_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/mmu_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/mmu_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/scalar_processor_2400_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/scalar_processor_2400_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/scalar_processor_2400_params.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/scalar_processor_2400_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/str2mem_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/str2mem_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/str2mem_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/str2mem_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/streaming_to_mipi_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/streaming_to_mipi_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/streaming_to_mipi_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/streaming_to_mipi_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/timed_controller_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/timed_controller_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/timed_controller_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/version.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/version.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/version.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/version.h -- GitLab From ecdb2e34b295bf2e8aeb27e60e3842c87b8c3c8c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 22:53:28 +0200 Subject: [PATCH 424/503] media: atomisp: remove unused hive_isp_css_host_ids_hrt.h Nothing here is really used by the driver. So, let's just get rid of them. Signed-off-by: Mauro Carvalho Chehab --- .../hrt/hive_isp_css_host_ids_hrt.h | 84 ------------- .../host/pixelgen_private.h | 1 - .../hrt/PixelGen_SysBlock_defs.h | 11 -- .../hrt/hive_isp_css_host_ids_hrt.h | 118 ------------------ .../hrt/hive_isp_css_host_ids_hrt.h | 118 ------------------ 5 files changed, 332 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_host_ids_hrt.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_host_ids_hrt.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_host_ids_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_host_ids_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_host_ids_hrt.h deleted file mode 100644 index 564140ca92f62..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_host_ids_hrt.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _hive_isp_css_host_ids_hrt_h_ -#define _hive_isp_css_host_ids_hrt_h_ - -/* ISP_CSS identifiers */ -#define INP_SYS testbench_isp_inp_sys -#define ISYS_GP_REGS testbench_isp_inp_sys_gpreg -#define ISYS_IRQ_CTRL testbench_isp_inp_sys_irq_ctrl -#define ISYS_CAP_A testbench_isp_inp_sys_capt_unit_a -#define ISYS_CAP_B testbench_isp_inp_sys_capt_unit_b -#define ISYS_CAP_C testbench_isp_inp_sys_capt_unit_c -#define ISYS_INP_BUF testbench_isp_inp_sys_input_buffer -#define ISYS_INP_CTRL testbench_isp_inp_sys_inp_ctrl -#define ISYS_ACQ testbench_isp_inp_sys_acq_unit - -#define ISP testbench_isp_isp -#define SP testbench_isp_scp - -#define IF_PRIM testbench_isp_ifmt_ift_prim -#define IF_PRIM_B testbench_isp_ifmt_ift_prim_b -#define IF_SEC testbench_isp_ifmt_ift_sec -#define IF_SEC_MASTER testbench_isp_ifmt_ift_sec_mt_out -#define STR_TO_MEM testbench_isp_ifmt_mem_cpy -#define IFMT_GP_REGS testbench_isp_ifmt_gp_reg -#define IFMT_IRQ_CTRL testbench_isp_ifmt_irq_ctrl - -#define CSS_RECEIVER testbench_isp_inp_sys_csi_receiver - -#define TC testbench_isp_gpd_tc -#define GPTIMER testbench_isp_gpd_gptimer -#define DMA testbench_isp_isp_dma -#define GDC testbench_isp_gdc1 -#define GDC2 testbench_isp_gdc2 -#define IRQ_CTRL testbench_isp_gpd_irq_ctrl -#define GPIO testbench_isp_gpd_c_gpio -#define GP_REGS testbench_isp_gpd_gp_reg -#define ISEL_GP_REGS testbench_isp_isel_gpr -#define ISEL_IRQ_CTRL testbench_isp_isel_irq_ctrl -#define DATA_MMU testbench_isp_data_out_sys_c_mmu -#define ICACHE_MMU testbench_isp_icache_out_sys_c_mmu - -/* next is actually not FIFO but FIFO adapter, or slave to streaming adapter */ -#define ISP_SP_FIFO testbench_isp_fa_sp_isp -#define ISEL_FIFO testbench_isp_isel_sf_fa_in - -#define FIFO_GPF_SP testbench_isp_sf_fa2sp_in -#define FIFO_GPF_ISP testbench_isp_sf_fa2isp_in -#define FIFO_SP_GPF testbench_isp_sf_sp2fa_in -#define FIFO_ISP_GPF testbench_isp_sf_isp2fa_in - -#define DATA_OCP_MASTER testbench_isp_data_out_sys_cio2ocp_wide_data_out_mt -#define ICACHE_OCP_MASTER testbench_isp_icache_out_sys_cio2ocp_wide_data_out_mt - -#define SP_IN_FIFO testbench_isp_sf_fa2sp_in -#define SP_OUT_FIFO testbench_isp_sf_sp2fa_out -#define ISP_IN_FIFO testbench_isp_sf_fa2isp_in -#define ISP_OUT_FIFO testbench_isp_sf_isp2fa_out -#define GEN_SHORT_PACK_PORT testbench_isp_inp_sys_csi_str_mon_fa_gensh_out -#define ISYS_GP_REGS testbench_isp_inp_sys_gpreg - -/* Testbench identifiers */ -#define DDR testbench_ddram -#define DDR_SMALL testbench_ddram_small -#define XMEM DDR -#define GPIO_ADAPTER testbench_gp_adapter -#define SIG_MONITOR testbench_sig_mon -#define DDR_SLAVE testbench_ddram_ip0 -#define DDR_SMALL_SLAVE testbench_ddram_small_ip0 -#define HOST_MASTER host_op0 - -#endif /* _hive_isp_css_host_ids_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h index 79f5ef595d35e..65ea23604479e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h @@ -15,7 +15,6 @@ #ifndef __PIXELGEN_PRIVATE_H_INCLUDED__ #define __PIXELGEN_PRIVATE_H_INCLUDED__ #include "pixelgen_public.h" -#include "hive_isp_css_host_ids_hrt.h" #include "PixelGen_SysBlock_defs.h" #include "device_access.h" /* ia_css_device_load_uint32 */ #include "assert_support.h" /* assert */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h index bbc692363009d..ce53ba4837ea5 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h @@ -15,17 +15,6 @@ #ifndef _PixelGen_SysBlock_defs_h #define _PixelGen_SysBlock_defs_h -#ifdef ISYS2401_PXG_A -#else -#ifdef ISYS2401_PXG_B -#else -#ifdef ISYS2401_PXG_C -#else -#include -#endif -#endif -#endif - /* Parematers and User_Parameters for HSS */ #define _PXG_PPC Ppc #define _PXG_PIXEL_BITS PixelWidth diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_host_ids_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_host_ids_hrt.h deleted file mode 100644 index 2c5ba6fda8387..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_host_ids_hrt.h +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _hive_isp_css_host_ids_hrt_h_ -#define _hive_isp_css_host_ids_hrt_h_ - -/* ISP_CSS identifiers */ -#define INP_SYS testbench_isp_isp_css_part_is_2400_inp_sys -#define ISYS_GP_REGS testbench_isp_isp_css_part_is_2400_inp_sys_gpreg -#define ISYS_IRQ_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_irq_ctrl -#define ISYS_CAP_A testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_a -#define ISYS_CAP_B testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_b -#define ISYS_CAP_C testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_c -#define ISYS_INP_BUF testbench_isp_isp_css_part_input_buffer -#define ISYS_INP_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_inp_ctrl -#define ISYS_ACQ testbench_isp_isp_css_part_is_2400_inp_sys_acq_unit - -#define ISP testbench_isp_isp_css_sec_part_isp -#define SP testbench_isp_isp_css_sec_part_scp - -#define IF_PRIM testbench_isp_isp_css_part_is_2400_ifmt_ift_prim -#define IF_PRIM_B testbench_isp_isp_css_part_is_2400_ifmt_ift_prim_b -#define IF_SEC testbench_isp_isp_css_part_is_2400_ifmt_ift_sec -#define IF_SEC_MASTER testbench_isp_isp_css_part_is_2400_ifmt_ift_sec_mt_out -#define STR_TO_MEM testbench_isp_isp_css_part_is_2400_ifmt_mem_cpy -#define IFMT_GP_REGS testbench_isp_isp_css_part_is_2400_ifmt_gp_reg -#define IFMT_IRQ_CTRL testbench_isp_isp_css_part_is_2400_ifmt_irq_ctrl - -#define CSS_RECEIVER testbench_isp_isp_css_part_is_2400_inp_sys_csi_receiver - -#define TC testbench_isp_isp_css_sec_part_gpd_tc -#define GPTIMER testbench_isp_isp_css_sec_part_gpd_gptimer -#define DMA testbench_isp_isp_css_sec_part_isp_dma -#define GDC testbench_isp_isp_css_sec_part_gdc1 -#define GDC2 testbench_isp_isp_css_sec_part_gdc2 -#define IRQ_CTRL testbench_isp_isp_css_sec_part_gpd_irq_ctrl -#define GPIO testbench_isp_isp_css_sec_part_gpd_c_gpio -#define GP_REGS testbench_isp_isp_css_sec_part_gpd_gp_reg -#define ISEL_GP_REGS testbench_isp_isp_css_part_is_2400_isel_gpr -#define ISEL_IRQ_CTRL testbench_isp_isp_css_part_is_2400_isel_irq_ctrl -#define DATA_MMU testbench_isp_isp_css_sec_part_data_out_sys_c_mmu -#define ICACHE_MMU testbench_isp_isp_css_sec_part_icache_out_sys_c_mmu - -/* next is actually not FIFO but FIFO adapter, or slave to streaming adapter */ -#define ISP_SP_FIFO testbench_isp_isp_css_sec_part_fa_sp_isp -#define ISEL_FIFO testbench_isp_isp_css_part_is_2400_isel_sf_fa_in - -#define FIFO_GPF_SP testbench_isp_isp_css_sec_part_sf_fa2sp_in -#define FIFO_GPF_ISP testbench_isp_isp_css_sec_part_sf_fa2isp_in -#define FIFO_SP_GPF testbench_isp_isp_css_sec_part_sf_sp2fa_in -#define FIFO_ISP_GPF testbench_isp_isp_css_sec_part_sf_isp2fa_in - -#define DATA_OCP_MASTER testbench_isp_isp_css_sec_part_data_out_sys_cio2ocp_wide_data_out_mt -#define ICACHE_OCP_MASTER testbench_isp_isp_css_sec_part_icache_out_sys_cio2ocp_wide_data_out_mt - -#define SP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2sp_in -#define SP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_sp2fa_out -#define ISP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2isp_in -#define ISP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_isp2fa_out -#define GEN_SHORT_PACK_PORT testbench_isp_isp_css_part_is_2400_inp_sys_csi_str_mon_fa_gensh_out - -/* input_system_2401 identifiers */ -#define ISYS2401_GP_REGS testbench_isp_isp_css_part_is_2401_gpreg -#define ISYS2401_DMA testbench_isp_isp_css_part_is_2401_dma -#define ISYS2401_IRQ_CTRL testbench_isp_isp_css_part_is_2401_isys_irq_ctrl - -#define ISYS2401_CSI_RX_A testbench_isp_isp_css_part_is_2401_is_pipe_a_csi_rx -#define ISYS2401_MIPI_BE_A testbench_isp_isp_css_part_is_2401_is_pipe_a_mipi_be -#define ISYS2401_S2M_A testbench_isp_isp_css_part_is_2401_is_pipe_a_s2m -#define ISYS2401_PXG_A testbench_isp_isp_css_part_is_2401_is_pipe_a_pxlgen -#define ISYS2401_IBUF_CNTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_ibuf_ctrl -#define ISYS2401_IRQ_CTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_irq_ctrl_pipe - -#define ISYS2401_CSI_RX_B testbench_isp_isp_css_part_is_2401_is_pipe_b_csi_rx -#define ISYS2401_MIPI_BE_B testbench_isp_isp_css_part_is_2401_is_pipe_b_mipi_be -#define ISYS2401_S2M_B testbench_isp_isp_css_part_is_2401_is_pipe_b_s2m -#define ISYS2401_PXG_B testbench_isp_isp_css_part_is_2401_is_pipe_b_pxlgen -#define ISYS2401_IBUF_CNTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_ibuf_ctrl -#define ISYS2401_IRQ_CTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_irq_ctrl_pipe - -#define ISYS2401_CSI_RX_C testbench_isp_isp_css_part_is_2401_is_pipe_c_csi_rx -#define ISYS2401_MIPI_BE_C testbench_isp_isp_css_part_is_2401_is_pipe_c_mipi_be -#define ISYS2401_S2M_C testbench_isp_isp_css_part_is_2401_is_pipe_c_s2m -#define ISYS2401_PXG_C testbench_isp_isp_css_part_is_2401_is_pipe_c_pxlgen -#define ISYS2401_IBUF_CNTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_ibuf_ctrl -#define ISYS2401_IRQ_CTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_irq_ctrl_pipe - -/* Testbench identifiers */ -#define DDR testbench_ddram -#define DDR_SMALL testbench_ddram_small -#define XMEM DDR -#define GPIO_ADAPTER testbench_gp_adapter -#define SIG_MONITOR testbench_sig_mon -#define DDR_SLAVE testbench_ddram_ip0 -#define DDR_SMALL_SLAVE testbench_ddram_small_ip0 -#define HOST_MASTER host_op0 - -#define CSI_SENSOR testbench_vied_sensor -#define CSI_SENSOR_GP_REGS testbench_vied_sensor_gpreg -#define CSI_STR_IN_A testbench_vied_sensor_tx_a_csi_tx_data_in -#define CSI_STR_IN_B testbench_vied_sensor_tx_b_csi_tx_data_in -#define CSI_STR_IN_C testbench_vied_sensor_tx_c_csi_tx_data_in -#define CSI_SENSOR_TX_A testbench_vied_sensor_tx_a -#define CSI_SENSOR_TX_B testbench_vied_sensor_tx_b -#define CSI_SENSOR_TX_C testbench_vied_sensor_tx_c - -#endif /* _hive_isp_css_host_ids_hrt_h_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_host_ids_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_host_ids_hrt.h deleted file mode 100644 index 2c5ba6fda8387..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_host_ids_hrt.h +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _hive_isp_css_host_ids_hrt_h_ -#define _hive_isp_css_host_ids_hrt_h_ - -/* ISP_CSS identifiers */ -#define INP_SYS testbench_isp_isp_css_part_is_2400_inp_sys -#define ISYS_GP_REGS testbench_isp_isp_css_part_is_2400_inp_sys_gpreg -#define ISYS_IRQ_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_irq_ctrl -#define ISYS_CAP_A testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_a -#define ISYS_CAP_B testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_b -#define ISYS_CAP_C testbench_isp_isp_css_part_is_2400_inp_sys_capt_unit_c -#define ISYS_INP_BUF testbench_isp_isp_css_part_input_buffer -#define ISYS_INP_CTRL testbench_isp_isp_css_part_is_2400_inp_sys_inp_ctrl -#define ISYS_ACQ testbench_isp_isp_css_part_is_2400_inp_sys_acq_unit - -#define ISP testbench_isp_isp_css_sec_part_isp -#define SP testbench_isp_isp_css_sec_part_scp - -#define IF_PRIM testbench_isp_isp_css_part_is_2400_ifmt_ift_prim -#define IF_PRIM_B testbench_isp_isp_css_part_is_2400_ifmt_ift_prim_b -#define IF_SEC testbench_isp_isp_css_part_is_2400_ifmt_ift_sec -#define IF_SEC_MASTER testbench_isp_isp_css_part_is_2400_ifmt_ift_sec_mt_out -#define STR_TO_MEM testbench_isp_isp_css_part_is_2400_ifmt_mem_cpy -#define IFMT_GP_REGS testbench_isp_isp_css_part_is_2400_ifmt_gp_reg -#define IFMT_IRQ_CTRL testbench_isp_isp_css_part_is_2400_ifmt_irq_ctrl - -#define CSS_RECEIVER testbench_isp_isp_css_part_is_2400_inp_sys_csi_receiver - -#define TC testbench_isp_isp_css_sec_part_gpd_tc -#define GPTIMER testbench_isp_isp_css_sec_part_gpd_gptimer -#define DMA testbench_isp_isp_css_sec_part_isp_dma -#define GDC testbench_isp_isp_css_sec_part_gdc1 -#define GDC2 testbench_isp_isp_css_sec_part_gdc2 -#define IRQ_CTRL testbench_isp_isp_css_sec_part_gpd_irq_ctrl -#define GPIO testbench_isp_isp_css_sec_part_gpd_c_gpio -#define GP_REGS testbench_isp_isp_css_sec_part_gpd_gp_reg -#define ISEL_GP_REGS testbench_isp_isp_css_part_is_2400_isel_gpr -#define ISEL_IRQ_CTRL testbench_isp_isp_css_part_is_2400_isel_irq_ctrl -#define DATA_MMU testbench_isp_isp_css_sec_part_data_out_sys_c_mmu -#define ICACHE_MMU testbench_isp_isp_css_sec_part_icache_out_sys_c_mmu - -/* next is actually not FIFO but FIFO adapter, or slave to streaming adapter */ -#define ISP_SP_FIFO testbench_isp_isp_css_sec_part_fa_sp_isp -#define ISEL_FIFO testbench_isp_isp_css_part_is_2400_isel_sf_fa_in - -#define FIFO_GPF_SP testbench_isp_isp_css_sec_part_sf_fa2sp_in -#define FIFO_GPF_ISP testbench_isp_isp_css_sec_part_sf_fa2isp_in -#define FIFO_SP_GPF testbench_isp_isp_css_sec_part_sf_sp2fa_in -#define FIFO_ISP_GPF testbench_isp_isp_css_sec_part_sf_isp2fa_in - -#define DATA_OCP_MASTER testbench_isp_isp_css_sec_part_data_out_sys_cio2ocp_wide_data_out_mt -#define ICACHE_OCP_MASTER testbench_isp_isp_css_sec_part_icache_out_sys_cio2ocp_wide_data_out_mt - -#define SP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2sp_in -#define SP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_sp2fa_out -#define ISP_IN_FIFO testbench_isp_isp_css_sec_part_sf_fa2isp_in -#define ISP_OUT_FIFO testbench_isp_isp_css_sec_part_sf_isp2fa_out -#define GEN_SHORT_PACK_PORT testbench_isp_isp_css_part_is_2400_inp_sys_csi_str_mon_fa_gensh_out - -/* input_system_2401 identifiers */ -#define ISYS2401_GP_REGS testbench_isp_isp_css_part_is_2401_gpreg -#define ISYS2401_DMA testbench_isp_isp_css_part_is_2401_dma -#define ISYS2401_IRQ_CTRL testbench_isp_isp_css_part_is_2401_isys_irq_ctrl - -#define ISYS2401_CSI_RX_A testbench_isp_isp_css_part_is_2401_is_pipe_a_csi_rx -#define ISYS2401_MIPI_BE_A testbench_isp_isp_css_part_is_2401_is_pipe_a_mipi_be -#define ISYS2401_S2M_A testbench_isp_isp_css_part_is_2401_is_pipe_a_s2m -#define ISYS2401_PXG_A testbench_isp_isp_css_part_is_2401_is_pipe_a_pxlgen -#define ISYS2401_IBUF_CNTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_ibuf_ctrl -#define ISYS2401_IRQ_CTRL_A testbench_isp_isp_css_part_is_2401_is_pipe_a_irq_ctrl_pipe - -#define ISYS2401_CSI_RX_B testbench_isp_isp_css_part_is_2401_is_pipe_b_csi_rx -#define ISYS2401_MIPI_BE_B testbench_isp_isp_css_part_is_2401_is_pipe_b_mipi_be -#define ISYS2401_S2M_B testbench_isp_isp_css_part_is_2401_is_pipe_b_s2m -#define ISYS2401_PXG_B testbench_isp_isp_css_part_is_2401_is_pipe_b_pxlgen -#define ISYS2401_IBUF_CNTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_ibuf_ctrl -#define ISYS2401_IRQ_CTRL_B testbench_isp_isp_css_part_is_2401_is_pipe_b_irq_ctrl_pipe - -#define ISYS2401_CSI_RX_C testbench_isp_isp_css_part_is_2401_is_pipe_c_csi_rx -#define ISYS2401_MIPI_BE_C testbench_isp_isp_css_part_is_2401_is_pipe_c_mipi_be -#define ISYS2401_S2M_C testbench_isp_isp_css_part_is_2401_is_pipe_c_s2m -#define ISYS2401_PXG_C testbench_isp_isp_css_part_is_2401_is_pipe_c_pxlgen -#define ISYS2401_IBUF_CNTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_ibuf_ctrl -#define ISYS2401_IRQ_CTRL_C testbench_isp_isp_css_part_is_2401_is_pipe_c_irq_ctrl_pipe - -/* Testbench identifiers */ -#define DDR testbench_ddram -#define DDR_SMALL testbench_ddram_small -#define XMEM DDR -#define GPIO_ADAPTER testbench_gp_adapter -#define SIG_MONITOR testbench_sig_mon -#define DDR_SLAVE testbench_ddram_ip0 -#define DDR_SMALL_SLAVE testbench_ddram_small_ip0 -#define HOST_MASTER host_op0 - -#define CSI_SENSOR testbench_vied_sensor -#define CSI_SENSOR_GP_REGS testbench_vied_sensor_gpreg -#define CSI_STR_IN_A testbench_vied_sensor_tx_a_csi_tx_data_in -#define CSI_STR_IN_B testbench_vied_sensor_tx_b_csi_tx_data_in -#define CSI_STR_IN_C testbench_vied_sensor_tx_c_csi_tx_data_in -#define CSI_SENSOR_TX_A testbench_vied_sensor_tx_a -#define CSI_SENSOR_TX_B testbench_vied_sensor_tx_b -#define CSI_SENSOR_TX_C testbench_vied_sensor_tx_c - -#endif /* _hive_isp_css_host_ids_hrt_h_ */ -- GitLab From 14131db2ea1a88d0b9d0e5f8781e929928a69dc7 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 23:25:12 +0200 Subject: [PATCH 425/503] media: atomisp: hive_isp_css_defs.h: keep just one copy of it While those headers are different, the different fields aren't used at the driver. So, remove those different unused fields, rename one define and use just one header for all 3 different versions of the ISP. Signed-off-by: Mauro Carvalho Chehab --- .../hrt/hive_isp_css_irq_types_hrt.h | 4 - .../hrt/hive_isp_css_2401_irq_types_hrt.h | 2 +- .../hrt/hive_isp_css_defs.h | 432 ------------------ .../hrt/hive_isp_css_2401_irq_types_hrt.h | 2 +- .../css_2401_system/hrt/hive_isp_css_defs.h | 432 ------------------ .../hive_isp_css_common/host/irq_local.h | 2 +- .../hrt => }/hive_isp_css_defs.h | 4 - 7 files changed, 3 insertions(+), 875 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2400_system/hrt => }/hive_isp_css_defs.h (99%) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h index dd47972f619d8..5c636effba484 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h @@ -43,11 +43,7 @@ typedef enum hrt_isp_css_irq { hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, -#ifdef _HIVE_ISP_CSS_2401_SYSTEM - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, -#else hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, -#endif hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h index 6fd48be53d552..0760b95818f6d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h @@ -43,7 +43,7 @@ typedef enum hrt_isp_css_irq { hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h deleted file mode 100644 index be492eb9353da..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_defs.h +++ /dev/null @@ -1,432 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _hive_isp_css_defs_h__ -#define _hive_isp_css_defs_h__ - -#define _HIVE_ISP_CSS_2401_SYSTEM 1 -#define HIVE_ISP_CTRL_DATA_WIDTH 32 -#define HIVE_ISP_CTRL_ADDRESS_WIDTH 32 -#define HIVE_ISP_CTRL_MAX_BURST_SIZE 1 -#define HIVE_ISP_DDR_ADDRESS_WIDTH 36 - -#define HIVE_ISP_HOST_MAX_BURST_SIZE 8 /* host supports bursts in order to prevent repeating DDRAM accesses */ -#define HIVE_ISP_NUM_GPIO_PINS 12 - -/* This list of vector num_elems/elem_bits pairs is valid both in C as initializer - and in the DMA parameter list */ -#define HIVE_ISP_DDR_DMA_SPECS {{32, 8}, {16, 16}, {18, 14}, {25, 10}, {21, 12}} -#define HIVE_ISP_DDR_WORD_BITS 256 -#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS / 8) -#define HIVE_ISP_DDR_BYTES (512 * 1024 * 1024) -#define HIVE_ISP_DDR_BYTES_RTL (127 * 1024 * 1024) -#define HIVE_ISP_DDR_SMALL_BYTES (128 * 256 / 8) -#define HIVE_ISP_PAGE_SHIFT 12 -#define HIVE_ISP_PAGE_SIZE BIT(HIVE_ISP_PAGE_SHIFT) - -#define CSS_DDR_WORD_BITS HIVE_ISP_DDR_WORD_BITS -#define CSS_DDR_WORD_BYTES HIVE_ISP_DDR_WORD_BYTES - -/* settings used in applications */ -#define HIVE_XMEM_WIDTH HIVE_ISP_DDR_WORD_BITS -#define HIVE_VMEM_VECTOR_ELEMENTS 64 -#define HIVE_VMEM_ELEMENT_BITS 14 -#define HIVE_XMEM_ELEMENT_BITS 16 -#define HIVE_VMEM_VECTOR_BYTES (HIVE_VMEM_VECTOR_ELEMENTS * HIVE_XMEM_ELEMENT_BITS / 8) /* used for # addr bytes for one vector */ -#define HIVE_XMEM_PACKED_WORD_VMEM_ELEMENTS (HIVE_XMEM_WIDTH / HIVE_VMEM_ELEMENT_BITS) -#define HIVE_XMEM_WORD_VMEM_ELEMENTS (HIVE_XMEM_WIDTH / HIVE_XMEM_ELEMENT_BITS) -#define XMEM_INT_SIZE 4 - -#define HIVE_ISYS_INP_BUFFER_BYTES (64 * 1024) /* 64 kByte = 2k words (of 256 bits) */ - -/* If HIVE_ISP_DDR_BASE_OFFSET is set to a non-zero value, the wide bus just before the DDRAM gets an extra dummy port where */ -/* address range 0 .. HIVE_ISP_DDR_BASE_OFFSET-1 maps onto. This effectively creates an offset for the DDRAM from system perspective */ -#define HIVE_ISP_DDR_BASE_OFFSET 0x120000000 /* 0x200000 */ - -#define HIVE_DMA_ISP_BUS_CONN 0 -#define HIVE_DMA_ISP_DDR_CONN 1 -#define HIVE_DMA_BUS_DDR_CONN 2 -#define HIVE_DMA_ISP_MASTER master_port0 -#define HIVE_DMA_BUS_MASTER master_port1 -#define HIVE_DMA_DDR_MASTER master_port2 - -#define HIVE_DMA_NUM_CHANNELS 32 /* old value was 8 */ -#define HIVE_DMA_CMD_FIFO_DEPTH 24 /* old value was 12 */ - -#define HIVE_IF_PIXEL_WIDTH 12 - -#define HIVE_MMU_TLB_SETS 8 -#define HIVE_MMU_TLB_SET_BLOCKS 8 -#define HIVE_MMU_TLB_BLOCK_ELEMENTS 8 -#define HIVE_MMU_PAGE_TABLE_LEVELS 2 -#define HIVE_MMU_PAGE_BYTES HIVE_ISP_PAGE_SIZE - -#define HIVE_ISP_CH_ID_BITS 2 -#define HIVE_ISP_FMT_TYPE_BITS 5 -#define HIVE_ISP_ISEL_SEL_BITS 2 - -#define HIVE_GP_REGS_SDRAM_WAKEUP_IDX 0 -#define HIVE_GP_REGS_IDLE_IDX 1 -#define HIVE_GP_REGS_IRQ_0_IDX 2 -#define HIVE_GP_REGS_IRQ_1_IDX 3 -#define HIVE_GP_REGS_SP_STREAM_STAT_IDX 4 -#define HIVE_GP_REGS_SP_STREAM_STAT_B_IDX 5 -#define HIVE_GP_REGS_ISP_STREAM_STAT_IDX 6 -#define HIVE_GP_REGS_MOD_STREAM_STAT_IDX 7 -#define HIVE_GP_REGS_SP_STREAM_STAT_IRQ_COND_IDX 8 -#define HIVE_GP_REGS_SP_STREAM_STAT_B_IRQ_COND_IDX 9 -#define HIVE_GP_REGS_ISP_STREAM_STAT_IRQ_COND_IDX 10 -#define HIVE_GP_REGS_MOD_STREAM_STAT_IRQ_COND_IDX 11 -#define HIVE_GP_REGS_SP_STREAM_STAT_IRQ_ENABLE_IDX 12 -#define HIVE_GP_REGS_SP_STREAM_STAT_B_IRQ_ENABLE_IDX 13 -#define HIVE_GP_REGS_ISP_STREAM_STAT_IRQ_ENABLE_IDX 14 -#define HIVE_GP_REGS_MOD_STREAM_STAT_IRQ_ENABLE_IDX 15 -#define HIVE_GP_REGS_SWITCH_PRIM_IF_IDX 16 -#define HIVE_GP_REGS_SWITCH_GDC1_IDX 17 -#define HIVE_GP_REGS_SWITCH_GDC2_IDX 18 -#define HIVE_GP_REGS_SRST_IDX 19 -#define HIVE_GP_REGS_SLV_REG_SRST_IDX 20 -#define HIVE_GP_REGS_SWITCH_ISYS_IDX 21 - -/* Bit numbers of the soft reset register */ -#define HIVE_GP_REGS_SRST_ISYS_CBUS 0 -#define HIVE_GP_REGS_SRST_ISEL_CBUS 1 -#define HIVE_GP_REGS_SRST_IFMT_CBUS 2 -#define HIVE_GP_REGS_SRST_GPDEV_CBUS 3 -#define HIVE_GP_REGS_SRST_GPIO 4 -#define HIVE_GP_REGS_SRST_TC 5 -#define HIVE_GP_REGS_SRST_GPTIMER 6 -#define HIVE_GP_REGS_SRST_FACELLFIFOS 7 -#define HIVE_GP_REGS_SRST_D_OSYS 8 -#define HIVE_GP_REGS_SRST_IFT_SEC_PIPE 9 -#define HIVE_GP_REGS_SRST_GDC1 10 -#define HIVE_GP_REGS_SRST_GDC2 11 -#define HIVE_GP_REGS_SRST_VEC_BUS 12 -#define HIVE_GP_REGS_SRST_ISP 13 -#define HIVE_GP_REGS_SRST_SLV_GRP_BUS 14 -#define HIVE_GP_REGS_SRST_DMA 15 -#define HIVE_GP_REGS_SRST_SF_ISP_SP 16 -#define HIVE_GP_REGS_SRST_SF_PIF_CELLS 17 -#define HIVE_GP_REGS_SRST_SF_SIF_SP 18 -#define HIVE_GP_REGS_SRST_SF_MC_SP 19 -#define HIVE_GP_REGS_SRST_SF_ISYS_SP 20 -#define HIVE_GP_REGS_SRST_SF_DMA_CELLS 21 -#define HIVE_GP_REGS_SRST_SF_GDC1_CELLS 22 -#define HIVE_GP_REGS_SRST_SF_GDC2_CELLS 23 -#define HIVE_GP_REGS_SRST_SP 24 -#define HIVE_GP_REGS_SRST_OCP2CIO 25 -#define HIVE_GP_REGS_SRST_NBUS 26 -#define HIVE_GP_REGS_SRST_HOST12BUS 27 -#define HIVE_GP_REGS_SRST_WBUS 28 -#define HIVE_GP_REGS_SRST_IC_OSYS 29 -#define HIVE_GP_REGS_SRST_WBUS_IC 30 -#define HIVE_GP_REGS_SRST_ISYS_INP_BUF_BUS 31 - -/* Bit numbers of the slave register soft reset register */ -#define HIVE_GP_REGS_SLV_REG_SRST_DMA 0 -#define HIVE_GP_REGS_SLV_REG_SRST_GDC1 1 -#define HIVE_GP_REGS_SLV_REG_SRST_GDC2 2 - -/* order of the input bits for the irq controller */ -#define HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID 0 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID 1 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID 2 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID 3 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID 4 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID 5 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID 6 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID 7 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID 8 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID 9 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID 10 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID 11 -#define HIVE_GP_DEV_IRQ_SP_BIT_ID 12 -#define HIVE_GP_DEV_IRQ_ISP_BIT_ID 13 -#define HIVE_GP_DEV_IRQ_ISYS_BIT_ID 14 -#define HIVE_GP_DEV_IRQ_ISEL_BIT_ID 15 -#define HIVE_GP_DEV_IRQ_IFMT_BIT_ID 16 -#define HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID 17 -#define HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID 18 -#define HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID 19 -#define HIVE_GP_DEV_IRQ_IS2401_BIT_ID 20 -#define HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID 21 -#define HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID 22 -#define HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID 23 -#define HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID 24 -#define HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID 25 -#define HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID 26 -#define HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID 27 -#define HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID 28 -#define HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID 29 -#define HIVE_GP_DEV_IRQ_DMA_BIT_ID 30 -#define HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID 31 - -#define HIVE_GP_REGS_NUM_SW_IRQ_REGS 2 - -/* order of the input bits for the timed controller */ -#define HIVE_GP_DEV_TC_GPIO_PIN_0_BIT_ID 0 -#define HIVE_GP_DEV_TC_GPIO_PIN_1_BIT_ID 1 -#define HIVE_GP_DEV_TC_GPIO_PIN_2_BIT_ID 2 -#define HIVE_GP_DEV_TC_GPIO_PIN_3_BIT_ID 3 -#define HIVE_GP_DEV_TC_GPIO_PIN_4_BIT_ID 4 -#define HIVE_GP_DEV_TC_GPIO_PIN_5_BIT_ID 5 -#define HIVE_GP_DEV_TC_GPIO_PIN_6_BIT_ID 6 -#define HIVE_GP_DEV_TC_GPIO_PIN_7_BIT_ID 7 -#define HIVE_GP_DEV_TC_GPIO_PIN_8_BIT_ID 8 -#define HIVE_GP_DEV_TC_GPIO_PIN_9_BIT_ID 9 -#define HIVE_GP_DEV_TC_GPIO_PIN_10_BIT_ID 10 -#define HIVE_GP_DEV_TC_GPIO_PIN_11_BIT_ID 11 -#define HIVE_GP_DEV_TC_SP_BIT_ID 12 -#define HIVE_GP_DEV_TC_ISP_BIT_ID 13 -#define HIVE_GP_DEV_TC_ISYS_BIT_ID 14 -#define HIVE_GP_DEV_TC_ISEL_BIT_ID 15 -#define HIVE_GP_DEV_TC_IFMT_BIT_ID 16 -#define HIVE_GP_DEV_TC_GP_TIMER_0_BIT_ID 17 -#define HIVE_GP_DEV_TC_GP_TIMER_1_BIT_ID 18 -#define HIVE_GP_DEV_TC_MIPI_SOL_BIT_ID 19 -#define HIVE_GP_DEV_TC_MIPI_EOL_BIT_ID 20 -#define HIVE_GP_DEV_TC_MIPI_SOF_BIT_ID 21 -#define HIVE_GP_DEV_TC_MIPI_EOF_BIT_ID 22 -#define HIVE_GP_DEV_TC_INPSYS_SM 23 - -/* definitions for the gp_timer block */ -#define HIVE_GP_TIMER_0 0 -#define HIVE_GP_TIMER_1 1 -#define HIVE_GP_TIMER_2 2 -#define HIVE_GP_TIMER_3 3 -#define HIVE_GP_TIMER_4 4 -#define HIVE_GP_TIMER_5 5 -#define HIVE_GP_TIMER_6 6 -#define HIVE_GP_TIMER_7 7 -#define HIVE_GP_TIMER_NUM_COUNTERS 8 - -#define HIVE_GP_TIMER_IRQ_0 0 -#define HIVE_GP_TIMER_IRQ_1 1 -#define HIVE_GP_TIMER_NUM_IRQS 2 - -#define HIVE_GP_TIMER_GPIO_0_BIT_ID 0 -#define HIVE_GP_TIMER_GPIO_1_BIT_ID 1 -#define HIVE_GP_TIMER_GPIO_2_BIT_ID 2 -#define HIVE_GP_TIMER_GPIO_3_BIT_ID 3 -#define HIVE_GP_TIMER_GPIO_4_BIT_ID 4 -#define HIVE_GP_TIMER_GPIO_5_BIT_ID 5 -#define HIVE_GP_TIMER_GPIO_6_BIT_ID 6 -#define HIVE_GP_TIMER_GPIO_7_BIT_ID 7 -#define HIVE_GP_TIMER_GPIO_8_BIT_ID 8 -#define HIVE_GP_TIMER_GPIO_9_BIT_ID 9 -#define HIVE_GP_TIMER_GPIO_10_BIT_ID 10 -#define HIVE_GP_TIMER_GPIO_11_BIT_ID 11 -#define HIVE_GP_TIMER_INP_SYS_IRQ 12 -#define HIVE_GP_TIMER_ISEL_IRQ 13 -#define HIVE_GP_TIMER_IFMT_IRQ 14 -#define HIVE_GP_TIMER_SP_STRMON_IRQ 15 -#define HIVE_GP_TIMER_SP_B_STRMON_IRQ 16 -#define HIVE_GP_TIMER_ISP_STRMON_IRQ 17 -#define HIVE_GP_TIMER_MOD_STRMON_IRQ 18 -#define HIVE_GP_TIMER_IS2401_IRQ 19 -#define HIVE_GP_TIMER_ISP_BAMEM_ERROR_IRQ 20 -#define HIVE_GP_TIMER_ISP_DMEM_ERROR_IRQ 21 -#define HIVE_GP_TIMER_SP_ICACHE_MEM_ERROR_IRQ 22 -#define HIVE_GP_TIMER_SP_DMEM_ERROR_IRQ 23 -#define HIVE_GP_TIMER_SP_OUT_RUN_DP 24 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I0 25 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I1 26 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I2 27 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I3 28 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I4 29 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I5 30 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I6 31 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I7 32 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I8 33 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I9 34 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I10 35 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I1_I0 36 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I2_I0 37 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I3_I0 38 -#define HIVE_GP_TIMER_ISP_OUT_RUN_DP 39 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I0_I0 40 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I0_I1 41 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I1_I0 42 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I0 43 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I1 44 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I2 45 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I3 46 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I4 47 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I5 48 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I6 49 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I3_I0 50 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I4_I0 51 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I5_I0 52 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I6_I0 53 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I7_I0 54 -#define HIVE_GP_TIMER_MIPI_SOL_BIT_ID 55 -#define HIVE_GP_TIMER_MIPI_EOL_BIT_ID 56 -#define HIVE_GP_TIMER_MIPI_SOF_BIT_ID 57 -#define HIVE_GP_TIMER_MIPI_EOF_BIT_ID 58 -#define HIVE_GP_TIMER_INPSYS_SM 59 -#define HIVE_GP_TIMER_ISP_PMEM_ERROR_IRQ 60 - -/* port definitions for the streaming monitors */ -/* port definititions SP streaming monitor, monitors the status of streaming ports at the SP side of the streaming FIFO's */ -#define SP_STR_MON_PORT_SP2SIF 0 -#define SP_STR_MON_PORT_SIF2SP 1 -#define SP_STR_MON_PORT_SP2MC 2 -#define SP_STR_MON_PORT_MC2SP 3 -#define SP_STR_MON_PORT_SP2DMA 4 -#define SP_STR_MON_PORT_DMA2SP 5 -#define SP_STR_MON_PORT_SP2ISP 6 -#define SP_STR_MON_PORT_ISP2SP 7 -#define SP_STR_MON_PORT_SP2GPD 8 -#define SP_STR_MON_PORT_FA2SP 9 -#define SP_STR_MON_PORT_SP2ISYS 10 -#define SP_STR_MON_PORT_ISYS2SP 11 -#define SP_STR_MON_PORT_SP2PIFA 12 -#define SP_STR_MON_PORT_PIFA2SP 13 -#define SP_STR_MON_PORT_SP2PIFB 14 -#define SP_STR_MON_PORT_PIFB2SP 15 - -#define SP_STR_MON_PORT_B_SP2GDC1 0 -#define SP_STR_MON_PORT_B_GDC12SP 1 -#define SP_STR_MON_PORT_B_SP2GDC2 2 -#define SP_STR_MON_PORT_B_GDC22SP 3 - -/* previously used SP streaming monitor port identifiers, kept for backward compatibility */ -#define SP_STR_MON_PORT_SND_SIF SP_STR_MON_PORT_SP2SIF -#define SP_STR_MON_PORT_RCV_SIF SP_STR_MON_PORT_SIF2SP -#define SP_STR_MON_PORT_SND_MC SP_STR_MON_PORT_SP2MC -#define SP_STR_MON_PORT_RCV_MC SP_STR_MON_PORT_MC2SP -#define SP_STR_MON_PORT_SND_DMA SP_STR_MON_PORT_SP2DMA -#define SP_STR_MON_PORT_RCV_DMA SP_STR_MON_PORT_DMA2SP -#define SP_STR_MON_PORT_SND_ISP SP_STR_MON_PORT_SP2ISP -#define SP_STR_MON_PORT_RCV_ISP SP_STR_MON_PORT_ISP2SP -#define SP_STR_MON_PORT_SND_GPD SP_STR_MON_PORT_SP2GPD -#define SP_STR_MON_PORT_RCV_GPD SP_STR_MON_PORT_FA2SP -/* Deprecated */ -#define SP_STR_MON_PORT_SND_PIF SP_STR_MON_PORT_SP2PIFA -#define SP_STR_MON_PORT_RCV_PIF SP_STR_MON_PORT_PIFA2SP -#define SP_STR_MON_PORT_SND_PIFB SP_STR_MON_PORT_SP2PIFB -#define SP_STR_MON_PORT_RCV_PIFB SP_STR_MON_PORT_PIFB2SP - -#define SP_STR_MON_PORT_SND_PIF_A SP_STR_MON_PORT_SP2PIFA -#define SP_STR_MON_PORT_RCV_PIF_A SP_STR_MON_PORT_PIFA2SP -#define SP_STR_MON_PORT_SND_PIF_B SP_STR_MON_PORT_SP2PIFB -#define SP_STR_MON_PORT_RCV_PIF_B SP_STR_MON_PORT_PIFB2SP - -/* port definititions ISP streaming monitor, monitors the status of streaming ports at the ISP side of the streaming FIFO's */ -#define ISP_STR_MON_PORT_ISP2PIFA 0 -#define ISP_STR_MON_PORT_PIFA2ISP 1 -#define ISP_STR_MON_PORT_ISP2PIFB 2 -#define ISP_STR_MON_PORT_PIFB2ISP 3 -#define ISP_STR_MON_PORT_ISP2DMA 4 -#define ISP_STR_MON_PORT_DMA2ISP 5 -#define ISP_STR_MON_PORT_ISP2GDC1 6 -#define ISP_STR_MON_PORT_GDC12ISP 7 -#define ISP_STR_MON_PORT_ISP2GDC2 8 -#define ISP_STR_MON_PORT_GDC22ISP 9 -#define ISP_STR_MON_PORT_ISP2GPD 10 -#define ISP_STR_MON_PORT_FA2ISP 11 -#define ISP_STR_MON_PORT_ISP2SP 12 -#define ISP_STR_MON_PORT_SP2ISP 13 - -/* previously used ISP streaming monitor port identifiers, kept for backward compatibility */ -#define ISP_STR_MON_PORT_SND_PIF_A ISP_STR_MON_PORT_ISP2PIFA -#define ISP_STR_MON_PORT_RCV_PIF_A ISP_STR_MON_PORT_PIFA2ISP -#define ISP_STR_MON_PORT_SND_PIF_B ISP_STR_MON_PORT_ISP2PIFB -#define ISP_STR_MON_PORT_RCV_PIF_B ISP_STR_MON_PORT_PIFB2ISP -#define ISP_STR_MON_PORT_SND_DMA ISP_STR_MON_PORT_ISP2DMA -#define ISP_STR_MON_PORT_RCV_DMA ISP_STR_MON_PORT_DMA2ISP -#define ISP_STR_MON_PORT_SND_GDC ISP_STR_MON_PORT_ISP2GDC1 -#define ISP_STR_MON_PORT_RCV_GDC ISP_STR_MON_PORT_GDC12ISP -#define ISP_STR_MON_PORT_SND_GPD ISP_STR_MON_PORT_ISP2GPD -#define ISP_STR_MON_PORT_RCV_GPD ISP_STR_MON_PORT_FA2ISP -#define ISP_STR_MON_PORT_SND_SP ISP_STR_MON_PORT_ISP2SP -#define ISP_STR_MON_PORT_RCV_SP ISP_STR_MON_PORT_SP2ISP - -/* port definititions MOD streaming monitor, monitors the status of streaming ports at the module side of the streaming FIFO's */ - -#define MOD_STR_MON_PORT_PIFA2CELLS 0 -#define MOD_STR_MON_PORT_CELLS2PIFA 1 -#define MOD_STR_MON_PORT_PIFB2CELLS 2 -#define MOD_STR_MON_PORT_CELLS2PIFB 3 -#define MOD_STR_MON_PORT_SIF2SP 4 -#define MOD_STR_MON_PORT_SP2SIF 5 -#define MOD_STR_MON_PORT_MC2SP 6 -#define MOD_STR_MON_PORT_SP2MC 7 -#define MOD_STR_MON_PORT_DMA2ISP 8 -#define MOD_STR_MON_PORT_ISP2DMA 9 -#define MOD_STR_MON_PORT_DMA2SP 10 -#define MOD_STR_MON_PORT_SP2DMA 11 -#define MOD_STR_MON_PORT_GDC12CELLS 12 -#define MOD_STR_MON_PORT_CELLS2GDC1 13 -#define MOD_STR_MON_PORT_GDC22CELLS 14 -#define MOD_STR_MON_PORT_CELLS2GDC2 15 - -#define MOD_STR_MON_PORT_SND_PIF_A 0 -#define MOD_STR_MON_PORT_RCV_PIF_A 1 -#define MOD_STR_MON_PORT_SND_PIF_B 2 -#define MOD_STR_MON_PORT_RCV_PIF_B 3 -#define MOD_STR_MON_PORT_SND_SIF 4 -#define MOD_STR_MON_PORT_RCV_SIF 5 -#define MOD_STR_MON_PORT_SND_MC 6 -#define MOD_STR_MON_PORT_RCV_MC 7 -#define MOD_STR_MON_PORT_SND_DMA2ISP 8 -#define MOD_STR_MON_PORT_RCV_DMA_FR_ISP 9 -#define MOD_STR_MON_PORT_SND_DMA2SP 10 -#define MOD_STR_MON_PORT_RCV_DMA_FR_SP 11 -#define MOD_STR_MON_PORT_SND_GDC 12 -#define MOD_STR_MON_PORT_RCV_GDC 13 - -/* testbench signals: */ - -/* testbench GP adapter register ids */ -#define HIVE_TESTBENCH_GPIO_DATA_OUT_REG_IDX 0 -#define HIVE_TESTBENCH_GPIO_DIR_OUT_REG_IDX 1 -#define HIVE_TESTBENCH_IRQ_REG_IDX 2 -#define HIVE_TESTBENCH_SDRAM_WAKEUP_REG_IDX 3 -#define HIVE_TESTBENCH_IDLE_REG_IDX 4 -#define HIVE_TESTBENCH_GPIO_DATA_IN_REG_IDX 5 -#define HIVE_TESTBENCH_MIPI_BFM_EN_REG_IDX 6 -#define HIVE_TESTBENCH_CSI_CONFIG_REG_IDX 7 -#define HIVE_TESTBENCH_DDR_STALL_EN_REG_IDX 8 - -#define HIVE_TESTBENCH_ISP_PMEM_ERROR_IRQ_REG_IDX 9 -#define HIVE_TESTBENCH_ISP_BAMEM_ERROR_IRQ_REG_IDX 10 -#define HIVE_TESTBENCH_ISP_DMEM_ERROR_IRQ_REG_IDX 11 -#define HIVE_TESTBENCH_SP_ICACHE_MEM_ERROR_IRQ_REG_IDX 12 -#define HIVE_TESTBENCH_SP_DMEM_ERROR_IRQ_REG_IDX 13 - -#define HIVE_TESTBENCH_MIPI_PARPATHEN_REG_IDX 14 -#define HIVE_TESTBENCH_FB_HPLL_FREQ_REG_IDX 15 -#define HIVE_TESTBENCH_ISCLK_RATIO_REG_IDX 16 - -/* Signal monitor input bit ids */ -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_O_BIT_ID 0 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_1_BIT_ID 1 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_2_BIT_ID 2 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_3_BIT_ID 3 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_4_BIT_ID 4 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_5_BIT_ID 5 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_6_BIT_ID 6 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_7_BIT_ID 7 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_8_BIT_ID 8 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_9_BIT_ID 9 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_10_BIT_ID 10 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_11_BIT_ID 11 -#define HIVE_TESTBENCH_SIG_MON_IRQ_PIN_BIT_ID 12 -#define HIVE_TESTBENCH_SIG_MON_SDRAM_WAKEUP_PIN_BIT_ID 13 -#define HIVE_TESTBENCH_SIG_MON_IDLE_PIN_BIT_ID 14 - -#define ISP2400_DEBUG_NETWORK 1 - -#endif /* _hive_isp_css_defs_h__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h index 071073d70ebfd..a55806e1accdb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h @@ -44,7 +44,7 @@ typedef enum hrt_isp_css_irq { hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h deleted file mode 100644 index be492eb9353da..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_defs.h +++ /dev/null @@ -1,432 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _hive_isp_css_defs_h__ -#define _hive_isp_css_defs_h__ - -#define _HIVE_ISP_CSS_2401_SYSTEM 1 -#define HIVE_ISP_CTRL_DATA_WIDTH 32 -#define HIVE_ISP_CTRL_ADDRESS_WIDTH 32 -#define HIVE_ISP_CTRL_MAX_BURST_SIZE 1 -#define HIVE_ISP_DDR_ADDRESS_WIDTH 36 - -#define HIVE_ISP_HOST_MAX_BURST_SIZE 8 /* host supports bursts in order to prevent repeating DDRAM accesses */ -#define HIVE_ISP_NUM_GPIO_PINS 12 - -/* This list of vector num_elems/elem_bits pairs is valid both in C as initializer - and in the DMA parameter list */ -#define HIVE_ISP_DDR_DMA_SPECS {{32, 8}, {16, 16}, {18, 14}, {25, 10}, {21, 12}} -#define HIVE_ISP_DDR_WORD_BITS 256 -#define HIVE_ISP_DDR_WORD_BYTES (HIVE_ISP_DDR_WORD_BITS / 8) -#define HIVE_ISP_DDR_BYTES (512 * 1024 * 1024) -#define HIVE_ISP_DDR_BYTES_RTL (127 * 1024 * 1024) -#define HIVE_ISP_DDR_SMALL_BYTES (128 * 256 / 8) -#define HIVE_ISP_PAGE_SHIFT 12 -#define HIVE_ISP_PAGE_SIZE BIT(HIVE_ISP_PAGE_SHIFT) - -#define CSS_DDR_WORD_BITS HIVE_ISP_DDR_WORD_BITS -#define CSS_DDR_WORD_BYTES HIVE_ISP_DDR_WORD_BYTES - -/* settings used in applications */ -#define HIVE_XMEM_WIDTH HIVE_ISP_DDR_WORD_BITS -#define HIVE_VMEM_VECTOR_ELEMENTS 64 -#define HIVE_VMEM_ELEMENT_BITS 14 -#define HIVE_XMEM_ELEMENT_BITS 16 -#define HIVE_VMEM_VECTOR_BYTES (HIVE_VMEM_VECTOR_ELEMENTS * HIVE_XMEM_ELEMENT_BITS / 8) /* used for # addr bytes for one vector */ -#define HIVE_XMEM_PACKED_WORD_VMEM_ELEMENTS (HIVE_XMEM_WIDTH / HIVE_VMEM_ELEMENT_BITS) -#define HIVE_XMEM_WORD_VMEM_ELEMENTS (HIVE_XMEM_WIDTH / HIVE_XMEM_ELEMENT_BITS) -#define XMEM_INT_SIZE 4 - -#define HIVE_ISYS_INP_BUFFER_BYTES (64 * 1024) /* 64 kByte = 2k words (of 256 bits) */ - -/* If HIVE_ISP_DDR_BASE_OFFSET is set to a non-zero value, the wide bus just before the DDRAM gets an extra dummy port where */ -/* address range 0 .. HIVE_ISP_DDR_BASE_OFFSET-1 maps onto. This effectively creates an offset for the DDRAM from system perspective */ -#define HIVE_ISP_DDR_BASE_OFFSET 0x120000000 /* 0x200000 */ - -#define HIVE_DMA_ISP_BUS_CONN 0 -#define HIVE_DMA_ISP_DDR_CONN 1 -#define HIVE_DMA_BUS_DDR_CONN 2 -#define HIVE_DMA_ISP_MASTER master_port0 -#define HIVE_DMA_BUS_MASTER master_port1 -#define HIVE_DMA_DDR_MASTER master_port2 - -#define HIVE_DMA_NUM_CHANNELS 32 /* old value was 8 */ -#define HIVE_DMA_CMD_FIFO_DEPTH 24 /* old value was 12 */ - -#define HIVE_IF_PIXEL_WIDTH 12 - -#define HIVE_MMU_TLB_SETS 8 -#define HIVE_MMU_TLB_SET_BLOCKS 8 -#define HIVE_MMU_TLB_BLOCK_ELEMENTS 8 -#define HIVE_MMU_PAGE_TABLE_LEVELS 2 -#define HIVE_MMU_PAGE_BYTES HIVE_ISP_PAGE_SIZE - -#define HIVE_ISP_CH_ID_BITS 2 -#define HIVE_ISP_FMT_TYPE_BITS 5 -#define HIVE_ISP_ISEL_SEL_BITS 2 - -#define HIVE_GP_REGS_SDRAM_WAKEUP_IDX 0 -#define HIVE_GP_REGS_IDLE_IDX 1 -#define HIVE_GP_REGS_IRQ_0_IDX 2 -#define HIVE_GP_REGS_IRQ_1_IDX 3 -#define HIVE_GP_REGS_SP_STREAM_STAT_IDX 4 -#define HIVE_GP_REGS_SP_STREAM_STAT_B_IDX 5 -#define HIVE_GP_REGS_ISP_STREAM_STAT_IDX 6 -#define HIVE_GP_REGS_MOD_STREAM_STAT_IDX 7 -#define HIVE_GP_REGS_SP_STREAM_STAT_IRQ_COND_IDX 8 -#define HIVE_GP_REGS_SP_STREAM_STAT_B_IRQ_COND_IDX 9 -#define HIVE_GP_REGS_ISP_STREAM_STAT_IRQ_COND_IDX 10 -#define HIVE_GP_REGS_MOD_STREAM_STAT_IRQ_COND_IDX 11 -#define HIVE_GP_REGS_SP_STREAM_STAT_IRQ_ENABLE_IDX 12 -#define HIVE_GP_REGS_SP_STREAM_STAT_B_IRQ_ENABLE_IDX 13 -#define HIVE_GP_REGS_ISP_STREAM_STAT_IRQ_ENABLE_IDX 14 -#define HIVE_GP_REGS_MOD_STREAM_STAT_IRQ_ENABLE_IDX 15 -#define HIVE_GP_REGS_SWITCH_PRIM_IF_IDX 16 -#define HIVE_GP_REGS_SWITCH_GDC1_IDX 17 -#define HIVE_GP_REGS_SWITCH_GDC2_IDX 18 -#define HIVE_GP_REGS_SRST_IDX 19 -#define HIVE_GP_REGS_SLV_REG_SRST_IDX 20 -#define HIVE_GP_REGS_SWITCH_ISYS_IDX 21 - -/* Bit numbers of the soft reset register */ -#define HIVE_GP_REGS_SRST_ISYS_CBUS 0 -#define HIVE_GP_REGS_SRST_ISEL_CBUS 1 -#define HIVE_GP_REGS_SRST_IFMT_CBUS 2 -#define HIVE_GP_REGS_SRST_GPDEV_CBUS 3 -#define HIVE_GP_REGS_SRST_GPIO 4 -#define HIVE_GP_REGS_SRST_TC 5 -#define HIVE_GP_REGS_SRST_GPTIMER 6 -#define HIVE_GP_REGS_SRST_FACELLFIFOS 7 -#define HIVE_GP_REGS_SRST_D_OSYS 8 -#define HIVE_GP_REGS_SRST_IFT_SEC_PIPE 9 -#define HIVE_GP_REGS_SRST_GDC1 10 -#define HIVE_GP_REGS_SRST_GDC2 11 -#define HIVE_GP_REGS_SRST_VEC_BUS 12 -#define HIVE_GP_REGS_SRST_ISP 13 -#define HIVE_GP_REGS_SRST_SLV_GRP_BUS 14 -#define HIVE_GP_REGS_SRST_DMA 15 -#define HIVE_GP_REGS_SRST_SF_ISP_SP 16 -#define HIVE_GP_REGS_SRST_SF_PIF_CELLS 17 -#define HIVE_GP_REGS_SRST_SF_SIF_SP 18 -#define HIVE_GP_REGS_SRST_SF_MC_SP 19 -#define HIVE_GP_REGS_SRST_SF_ISYS_SP 20 -#define HIVE_GP_REGS_SRST_SF_DMA_CELLS 21 -#define HIVE_GP_REGS_SRST_SF_GDC1_CELLS 22 -#define HIVE_GP_REGS_SRST_SF_GDC2_CELLS 23 -#define HIVE_GP_REGS_SRST_SP 24 -#define HIVE_GP_REGS_SRST_OCP2CIO 25 -#define HIVE_GP_REGS_SRST_NBUS 26 -#define HIVE_GP_REGS_SRST_HOST12BUS 27 -#define HIVE_GP_REGS_SRST_WBUS 28 -#define HIVE_GP_REGS_SRST_IC_OSYS 29 -#define HIVE_GP_REGS_SRST_WBUS_IC 30 -#define HIVE_GP_REGS_SRST_ISYS_INP_BUF_BUS 31 - -/* Bit numbers of the slave register soft reset register */ -#define HIVE_GP_REGS_SLV_REG_SRST_DMA 0 -#define HIVE_GP_REGS_SLV_REG_SRST_GDC1 1 -#define HIVE_GP_REGS_SLV_REG_SRST_GDC2 2 - -/* order of the input bits for the irq controller */ -#define HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID 0 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID 1 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID 2 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID 3 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID 4 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID 5 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID 6 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID 7 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID 8 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID 9 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID 10 -#define HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID 11 -#define HIVE_GP_DEV_IRQ_SP_BIT_ID 12 -#define HIVE_GP_DEV_IRQ_ISP_BIT_ID 13 -#define HIVE_GP_DEV_IRQ_ISYS_BIT_ID 14 -#define HIVE_GP_DEV_IRQ_ISEL_BIT_ID 15 -#define HIVE_GP_DEV_IRQ_IFMT_BIT_ID 16 -#define HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID 17 -#define HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID 18 -#define HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID 19 -#define HIVE_GP_DEV_IRQ_IS2401_BIT_ID 20 -#define HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID 21 -#define HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID 22 -#define HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID 23 -#define HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID 24 -#define HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID 25 -#define HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID 26 -#define HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID 27 -#define HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID 28 -#define HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID 29 -#define HIVE_GP_DEV_IRQ_DMA_BIT_ID 30 -#define HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID 31 - -#define HIVE_GP_REGS_NUM_SW_IRQ_REGS 2 - -/* order of the input bits for the timed controller */ -#define HIVE_GP_DEV_TC_GPIO_PIN_0_BIT_ID 0 -#define HIVE_GP_DEV_TC_GPIO_PIN_1_BIT_ID 1 -#define HIVE_GP_DEV_TC_GPIO_PIN_2_BIT_ID 2 -#define HIVE_GP_DEV_TC_GPIO_PIN_3_BIT_ID 3 -#define HIVE_GP_DEV_TC_GPIO_PIN_4_BIT_ID 4 -#define HIVE_GP_DEV_TC_GPIO_PIN_5_BIT_ID 5 -#define HIVE_GP_DEV_TC_GPIO_PIN_6_BIT_ID 6 -#define HIVE_GP_DEV_TC_GPIO_PIN_7_BIT_ID 7 -#define HIVE_GP_DEV_TC_GPIO_PIN_8_BIT_ID 8 -#define HIVE_GP_DEV_TC_GPIO_PIN_9_BIT_ID 9 -#define HIVE_GP_DEV_TC_GPIO_PIN_10_BIT_ID 10 -#define HIVE_GP_DEV_TC_GPIO_PIN_11_BIT_ID 11 -#define HIVE_GP_DEV_TC_SP_BIT_ID 12 -#define HIVE_GP_DEV_TC_ISP_BIT_ID 13 -#define HIVE_GP_DEV_TC_ISYS_BIT_ID 14 -#define HIVE_GP_DEV_TC_ISEL_BIT_ID 15 -#define HIVE_GP_DEV_TC_IFMT_BIT_ID 16 -#define HIVE_GP_DEV_TC_GP_TIMER_0_BIT_ID 17 -#define HIVE_GP_DEV_TC_GP_TIMER_1_BIT_ID 18 -#define HIVE_GP_DEV_TC_MIPI_SOL_BIT_ID 19 -#define HIVE_GP_DEV_TC_MIPI_EOL_BIT_ID 20 -#define HIVE_GP_DEV_TC_MIPI_SOF_BIT_ID 21 -#define HIVE_GP_DEV_TC_MIPI_EOF_BIT_ID 22 -#define HIVE_GP_DEV_TC_INPSYS_SM 23 - -/* definitions for the gp_timer block */ -#define HIVE_GP_TIMER_0 0 -#define HIVE_GP_TIMER_1 1 -#define HIVE_GP_TIMER_2 2 -#define HIVE_GP_TIMER_3 3 -#define HIVE_GP_TIMER_4 4 -#define HIVE_GP_TIMER_5 5 -#define HIVE_GP_TIMER_6 6 -#define HIVE_GP_TIMER_7 7 -#define HIVE_GP_TIMER_NUM_COUNTERS 8 - -#define HIVE_GP_TIMER_IRQ_0 0 -#define HIVE_GP_TIMER_IRQ_1 1 -#define HIVE_GP_TIMER_NUM_IRQS 2 - -#define HIVE_GP_TIMER_GPIO_0_BIT_ID 0 -#define HIVE_GP_TIMER_GPIO_1_BIT_ID 1 -#define HIVE_GP_TIMER_GPIO_2_BIT_ID 2 -#define HIVE_GP_TIMER_GPIO_3_BIT_ID 3 -#define HIVE_GP_TIMER_GPIO_4_BIT_ID 4 -#define HIVE_GP_TIMER_GPIO_5_BIT_ID 5 -#define HIVE_GP_TIMER_GPIO_6_BIT_ID 6 -#define HIVE_GP_TIMER_GPIO_7_BIT_ID 7 -#define HIVE_GP_TIMER_GPIO_8_BIT_ID 8 -#define HIVE_GP_TIMER_GPIO_9_BIT_ID 9 -#define HIVE_GP_TIMER_GPIO_10_BIT_ID 10 -#define HIVE_GP_TIMER_GPIO_11_BIT_ID 11 -#define HIVE_GP_TIMER_INP_SYS_IRQ 12 -#define HIVE_GP_TIMER_ISEL_IRQ 13 -#define HIVE_GP_TIMER_IFMT_IRQ 14 -#define HIVE_GP_TIMER_SP_STRMON_IRQ 15 -#define HIVE_GP_TIMER_SP_B_STRMON_IRQ 16 -#define HIVE_GP_TIMER_ISP_STRMON_IRQ 17 -#define HIVE_GP_TIMER_MOD_STRMON_IRQ 18 -#define HIVE_GP_TIMER_IS2401_IRQ 19 -#define HIVE_GP_TIMER_ISP_BAMEM_ERROR_IRQ 20 -#define HIVE_GP_TIMER_ISP_DMEM_ERROR_IRQ 21 -#define HIVE_GP_TIMER_SP_ICACHE_MEM_ERROR_IRQ 22 -#define HIVE_GP_TIMER_SP_DMEM_ERROR_IRQ 23 -#define HIVE_GP_TIMER_SP_OUT_RUN_DP 24 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I0 25 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I1 26 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I2 27 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I3 28 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I4 29 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I5 30 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I6 31 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I7 32 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I8 33 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I9 34 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I0_I10 35 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I1_I0 36 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I2_I0 37 -#define HIVE_GP_TIMER_SP_WIRE_DEBUG_LM_MSINK_RUN_I3_I0 38 -#define HIVE_GP_TIMER_ISP_OUT_RUN_DP 39 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I0_I0 40 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I0_I1 41 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I1_I0 42 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I0 43 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I1 44 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I2 45 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I3 46 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I4 47 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I5 48 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I2_I6 49 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I3_I0 50 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I4_I0 51 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I5_I0 52 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I6_I0 53 -#define HIVE_GP_TIMER_ISP_WIRE_DEBUG_LM_MSINK_RUN_I7_I0 54 -#define HIVE_GP_TIMER_MIPI_SOL_BIT_ID 55 -#define HIVE_GP_TIMER_MIPI_EOL_BIT_ID 56 -#define HIVE_GP_TIMER_MIPI_SOF_BIT_ID 57 -#define HIVE_GP_TIMER_MIPI_EOF_BIT_ID 58 -#define HIVE_GP_TIMER_INPSYS_SM 59 -#define HIVE_GP_TIMER_ISP_PMEM_ERROR_IRQ 60 - -/* port definitions for the streaming monitors */ -/* port definititions SP streaming monitor, monitors the status of streaming ports at the SP side of the streaming FIFO's */ -#define SP_STR_MON_PORT_SP2SIF 0 -#define SP_STR_MON_PORT_SIF2SP 1 -#define SP_STR_MON_PORT_SP2MC 2 -#define SP_STR_MON_PORT_MC2SP 3 -#define SP_STR_MON_PORT_SP2DMA 4 -#define SP_STR_MON_PORT_DMA2SP 5 -#define SP_STR_MON_PORT_SP2ISP 6 -#define SP_STR_MON_PORT_ISP2SP 7 -#define SP_STR_MON_PORT_SP2GPD 8 -#define SP_STR_MON_PORT_FA2SP 9 -#define SP_STR_MON_PORT_SP2ISYS 10 -#define SP_STR_MON_PORT_ISYS2SP 11 -#define SP_STR_MON_PORT_SP2PIFA 12 -#define SP_STR_MON_PORT_PIFA2SP 13 -#define SP_STR_MON_PORT_SP2PIFB 14 -#define SP_STR_MON_PORT_PIFB2SP 15 - -#define SP_STR_MON_PORT_B_SP2GDC1 0 -#define SP_STR_MON_PORT_B_GDC12SP 1 -#define SP_STR_MON_PORT_B_SP2GDC2 2 -#define SP_STR_MON_PORT_B_GDC22SP 3 - -/* previously used SP streaming monitor port identifiers, kept for backward compatibility */ -#define SP_STR_MON_PORT_SND_SIF SP_STR_MON_PORT_SP2SIF -#define SP_STR_MON_PORT_RCV_SIF SP_STR_MON_PORT_SIF2SP -#define SP_STR_MON_PORT_SND_MC SP_STR_MON_PORT_SP2MC -#define SP_STR_MON_PORT_RCV_MC SP_STR_MON_PORT_MC2SP -#define SP_STR_MON_PORT_SND_DMA SP_STR_MON_PORT_SP2DMA -#define SP_STR_MON_PORT_RCV_DMA SP_STR_MON_PORT_DMA2SP -#define SP_STR_MON_PORT_SND_ISP SP_STR_MON_PORT_SP2ISP -#define SP_STR_MON_PORT_RCV_ISP SP_STR_MON_PORT_ISP2SP -#define SP_STR_MON_PORT_SND_GPD SP_STR_MON_PORT_SP2GPD -#define SP_STR_MON_PORT_RCV_GPD SP_STR_MON_PORT_FA2SP -/* Deprecated */ -#define SP_STR_MON_PORT_SND_PIF SP_STR_MON_PORT_SP2PIFA -#define SP_STR_MON_PORT_RCV_PIF SP_STR_MON_PORT_PIFA2SP -#define SP_STR_MON_PORT_SND_PIFB SP_STR_MON_PORT_SP2PIFB -#define SP_STR_MON_PORT_RCV_PIFB SP_STR_MON_PORT_PIFB2SP - -#define SP_STR_MON_PORT_SND_PIF_A SP_STR_MON_PORT_SP2PIFA -#define SP_STR_MON_PORT_RCV_PIF_A SP_STR_MON_PORT_PIFA2SP -#define SP_STR_MON_PORT_SND_PIF_B SP_STR_MON_PORT_SP2PIFB -#define SP_STR_MON_PORT_RCV_PIF_B SP_STR_MON_PORT_PIFB2SP - -/* port definititions ISP streaming monitor, monitors the status of streaming ports at the ISP side of the streaming FIFO's */ -#define ISP_STR_MON_PORT_ISP2PIFA 0 -#define ISP_STR_MON_PORT_PIFA2ISP 1 -#define ISP_STR_MON_PORT_ISP2PIFB 2 -#define ISP_STR_MON_PORT_PIFB2ISP 3 -#define ISP_STR_MON_PORT_ISP2DMA 4 -#define ISP_STR_MON_PORT_DMA2ISP 5 -#define ISP_STR_MON_PORT_ISP2GDC1 6 -#define ISP_STR_MON_PORT_GDC12ISP 7 -#define ISP_STR_MON_PORT_ISP2GDC2 8 -#define ISP_STR_MON_PORT_GDC22ISP 9 -#define ISP_STR_MON_PORT_ISP2GPD 10 -#define ISP_STR_MON_PORT_FA2ISP 11 -#define ISP_STR_MON_PORT_ISP2SP 12 -#define ISP_STR_MON_PORT_SP2ISP 13 - -/* previously used ISP streaming monitor port identifiers, kept for backward compatibility */ -#define ISP_STR_MON_PORT_SND_PIF_A ISP_STR_MON_PORT_ISP2PIFA -#define ISP_STR_MON_PORT_RCV_PIF_A ISP_STR_MON_PORT_PIFA2ISP -#define ISP_STR_MON_PORT_SND_PIF_B ISP_STR_MON_PORT_ISP2PIFB -#define ISP_STR_MON_PORT_RCV_PIF_B ISP_STR_MON_PORT_PIFB2ISP -#define ISP_STR_MON_PORT_SND_DMA ISP_STR_MON_PORT_ISP2DMA -#define ISP_STR_MON_PORT_RCV_DMA ISP_STR_MON_PORT_DMA2ISP -#define ISP_STR_MON_PORT_SND_GDC ISP_STR_MON_PORT_ISP2GDC1 -#define ISP_STR_MON_PORT_RCV_GDC ISP_STR_MON_PORT_GDC12ISP -#define ISP_STR_MON_PORT_SND_GPD ISP_STR_MON_PORT_ISP2GPD -#define ISP_STR_MON_PORT_RCV_GPD ISP_STR_MON_PORT_FA2ISP -#define ISP_STR_MON_PORT_SND_SP ISP_STR_MON_PORT_ISP2SP -#define ISP_STR_MON_PORT_RCV_SP ISP_STR_MON_PORT_SP2ISP - -/* port definititions MOD streaming monitor, monitors the status of streaming ports at the module side of the streaming FIFO's */ - -#define MOD_STR_MON_PORT_PIFA2CELLS 0 -#define MOD_STR_MON_PORT_CELLS2PIFA 1 -#define MOD_STR_MON_PORT_PIFB2CELLS 2 -#define MOD_STR_MON_PORT_CELLS2PIFB 3 -#define MOD_STR_MON_PORT_SIF2SP 4 -#define MOD_STR_MON_PORT_SP2SIF 5 -#define MOD_STR_MON_PORT_MC2SP 6 -#define MOD_STR_MON_PORT_SP2MC 7 -#define MOD_STR_MON_PORT_DMA2ISP 8 -#define MOD_STR_MON_PORT_ISP2DMA 9 -#define MOD_STR_MON_PORT_DMA2SP 10 -#define MOD_STR_MON_PORT_SP2DMA 11 -#define MOD_STR_MON_PORT_GDC12CELLS 12 -#define MOD_STR_MON_PORT_CELLS2GDC1 13 -#define MOD_STR_MON_PORT_GDC22CELLS 14 -#define MOD_STR_MON_PORT_CELLS2GDC2 15 - -#define MOD_STR_MON_PORT_SND_PIF_A 0 -#define MOD_STR_MON_PORT_RCV_PIF_A 1 -#define MOD_STR_MON_PORT_SND_PIF_B 2 -#define MOD_STR_MON_PORT_RCV_PIF_B 3 -#define MOD_STR_MON_PORT_SND_SIF 4 -#define MOD_STR_MON_PORT_RCV_SIF 5 -#define MOD_STR_MON_PORT_SND_MC 6 -#define MOD_STR_MON_PORT_RCV_MC 7 -#define MOD_STR_MON_PORT_SND_DMA2ISP 8 -#define MOD_STR_MON_PORT_RCV_DMA_FR_ISP 9 -#define MOD_STR_MON_PORT_SND_DMA2SP 10 -#define MOD_STR_MON_PORT_RCV_DMA_FR_SP 11 -#define MOD_STR_MON_PORT_SND_GDC 12 -#define MOD_STR_MON_PORT_RCV_GDC 13 - -/* testbench signals: */ - -/* testbench GP adapter register ids */ -#define HIVE_TESTBENCH_GPIO_DATA_OUT_REG_IDX 0 -#define HIVE_TESTBENCH_GPIO_DIR_OUT_REG_IDX 1 -#define HIVE_TESTBENCH_IRQ_REG_IDX 2 -#define HIVE_TESTBENCH_SDRAM_WAKEUP_REG_IDX 3 -#define HIVE_TESTBENCH_IDLE_REG_IDX 4 -#define HIVE_TESTBENCH_GPIO_DATA_IN_REG_IDX 5 -#define HIVE_TESTBENCH_MIPI_BFM_EN_REG_IDX 6 -#define HIVE_TESTBENCH_CSI_CONFIG_REG_IDX 7 -#define HIVE_TESTBENCH_DDR_STALL_EN_REG_IDX 8 - -#define HIVE_TESTBENCH_ISP_PMEM_ERROR_IRQ_REG_IDX 9 -#define HIVE_TESTBENCH_ISP_BAMEM_ERROR_IRQ_REG_IDX 10 -#define HIVE_TESTBENCH_ISP_DMEM_ERROR_IRQ_REG_IDX 11 -#define HIVE_TESTBENCH_SP_ICACHE_MEM_ERROR_IRQ_REG_IDX 12 -#define HIVE_TESTBENCH_SP_DMEM_ERROR_IRQ_REG_IDX 13 - -#define HIVE_TESTBENCH_MIPI_PARPATHEN_REG_IDX 14 -#define HIVE_TESTBENCH_FB_HPLL_FREQ_REG_IDX 15 -#define HIVE_TESTBENCH_ISCLK_RATIO_REG_IDX 16 - -/* Signal monitor input bit ids */ -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_O_BIT_ID 0 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_1_BIT_ID 1 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_2_BIT_ID 2 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_3_BIT_ID 3 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_4_BIT_ID 4 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_5_BIT_ID 5 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_6_BIT_ID 6 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_7_BIT_ID 7 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_8_BIT_ID 8 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_9_BIT_ID 9 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_10_BIT_ID 10 -#define HIVE_TESTBENCH_SIG_MON_GPIO_PIN_11_BIT_ID 11 -#define HIVE_TESTBENCH_SIG_MON_IRQ_PIN_BIT_ID 12 -#define HIVE_TESTBENCH_SIG_MON_SDRAM_WAKEUP_PIN_BIT_ID 13 -#define HIVE_TESTBENCH_SIG_MON_IDLE_PIN_BIT_ID 14 - -#define ISP2400_DEBUG_NETWORK 1 - -#endif /* _hive_isp_css_defs_h__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h index 81cdaf2450bc4..86028fde2a947 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h @@ -69,7 +69,7 @@ typedef enum { #if defined(IS_ISP_2400_MAMOIADA_SYSTEM) virq_isp_pmem_error = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, #elif defined(IS_ISP_2401_MAMOIADA_SYSTEM) - virq_isys_2401 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_IS2401_BIT_ID, + virq_isys_2401 = IRQ0_ID_OFFSET + HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, #else #error "irq_local.h: 2400_SYSTEM must be one of {2400, 2401 }" #endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_defs.h similarity index 99% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_defs.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_defs.h index 7c4e284cc1571..52676f3610ba3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_defs.h @@ -15,8 +15,6 @@ #ifndef _hive_isp_css_defs_h__ #define _hive_isp_css_defs_h__ -#define HIVE_ISP_CSS_IS_2400B0_SYSTEM - #define HIVE_ISP_CTRL_DATA_WIDTH 32 #define HIVE_ISP_CTRL_ADDRESS_WIDTH 32 #define HIVE_ISP_CTRL_MAX_BURST_SIZE 1 @@ -86,7 +84,6 @@ #define HIVE_GP_REGS_SWITCH_GDC2_IDX 18 #define HIVE_GP_REGS_SRST_IDX 19 #define HIVE_GP_REGS_SLV_REG_SRST_IDX 20 -#define HIVE_GP_REGS_VISA_REG_IDX 21 /* Bit numbers of the soft reset register */ #define HIVE_GP_REGS_SRST_ISYS_CBUS 0 @@ -222,7 +219,6 @@ #define HIVE_GP_TIMER_SP_B_STRMON_IRQ 16 #define HIVE_GP_TIMER_ISP_STRMON_IRQ 17 #define HIVE_GP_TIMER_MOD_STRMON_IRQ 18 -#define HIVE_GP_TIMER_ISP_PMEM_ERROR_IRQ 19 #define HIVE_GP_TIMER_ISP_BAMEM_ERROR_IRQ 20 #define HIVE_GP_TIMER_ISP_DMEM_ERROR_IRQ 21 #define HIVE_GP_TIMER_SP_ICACHE_MEM_ERROR_IRQ 22 -- GitLab From c343a51e167807ec8b1d8d28fe2a83045131a10f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 28 Apr 2020 23:48:32 +0200 Subject: [PATCH 426/503] media: atomisp: get finish de-duplication of hrt/hive*.h The last header (hive_isp_css_2401_irq_types_hrt.h) is also almost identical, except by an if ISP2400 inside a comment block. Remove the duplication and keep just one file. Signed-off-by: Mauro Carvalho Chehab --- .../hrt/hive_isp_css_2401_irq_types_hrt.h | 69 ------------------- .../hive_isp_css_2401_irq_types_hrt.h | 0 2 files changed, 69 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/hrt => }/hive_isp_css_2401_irq_types_hrt.h (100%) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h deleted file mode 100644 index a55806e1accdb..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/hive_isp_css_2401_irq_types_hrt.h +++ /dev/null @@ -1,69 +0,0 @@ -/* -#ifndef ISP2401 - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ -#define _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ - -/* - * These are the indices of each interrupt in the interrupt - * controller's registers. these can be used as the irq_id - * argument to the hrt functions irq_controller.h. - * - * The definitions are taken from _defs.h - */ -typedef enum hrt_isp_css_irq { - hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID, - hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID, - hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID, - hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID, - hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID, - hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID, - hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID, - hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID, - hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID, - hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID, - hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID, - hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID, - hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID, - hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID, - hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID, - hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID, - hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID, - hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID, - hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID, - hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID, - hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID, - hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID, - hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID, - hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID, - hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID, - hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID, - hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID, - hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID, - hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID, - /* this must (obviously) be the last on in the enum */ - hrt_isp_css_irq_num_irqs -} hrt_isp_css_irq_t; - -typedef enum hrt_isp_css_irq_status { - hrt_isp_css_irq_status_error, - hrt_isp_css_irq_status_more_irqs, - hrt_isp_css_irq_status_success -} hrt_isp_css_irq_status_t; - -#endif /* _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_2401_irq_types_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_2401_irq_types_hrt.h -- GitLab From 0a76fd8e8d202dcaabc714850205d5d75c9b8271 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 25 Apr 2020 13:47:56 +0200 Subject: [PATCH 427/503] media: atomisp: add Asus Transform T101HA ACPI vars Those were extracted from an ACPI dump: * Original Table Header: * Signature "DSDT" * Length 0x0001A0BD (106685) * Revision 0x02 * Checksum 0x76 * OEM ID "_ASUS_" * OEM Table ID "Notebook" * OEM Revision 0x01072009 (17244169) * Compiler ID "INTL" * Compiler Version 0x20120913 (538052883) */ DefinitionBlock ("", "DSDT", 2, "_ASUS_", "Notebook", 0x01072009) ... Local0 = Package (0x12) { "CamId", "ov2680", "CamType", "1", "CsiPort", "0", "CsiLanes", "1", "CsiFmt", "15", "CsiBayer", "0", "CamClk", "1", "Regulator1p8v", "0", "Regulator2p8v", "0" } Note: the DMI_MATCH() line probably needs to be tweaked. Signed-off-by: Mauro Carvalho Chehab --- .../platform/intel-mid/atomisp_gmin_platform.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index eef7123a586f1..3d2b7dbb2b028 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -269,6 +269,15 @@ static struct gmin_cfg_var i8880_vars[] = { {}, }; +static struct gmin_cfg_var asus_vars[] = { + {"OVTI2680:00_CsiPort", "1"}, + {"OVTI2680:00_CsiLanes", "1"}, + {"OVTI2680:00_CsiFmt", "15"}, + {"OVTI2680:00_CsiBayer", "0"}, + {"OVTI2680:00_CamClk", "0"}, + {}, +}; + static const struct dmi_system_id gmin_vars[] = { { .ident = "BYT-T FFD8", @@ -306,6 +315,13 @@ static const struct dmi_system_id gmin_vars[] = { }, .driver_data = i8880_vars, }, + { + .ident = "T101HA", + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "T101HA"), + }, + .driver_data = asus_vars, + }, {} }; -- GitLab From 5060e35ee5a81576b4c682eeb2131f2936fe5ffb Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 01:05:47 +0200 Subject: [PATCH 428/503] media: atomisp: use regulator_get_optional() for first attempt Some BIOSes seem to use different names for some regulators. Use regulator_get_optional() for the first attempt, in order to avoid using the dummy regulator and produce a warning, in the case that the first attempt fails. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/platform/intel-mid/atomisp_gmin_platform.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index 3d2b7dbb2b028..783ea48b26fb8 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -405,8 +405,11 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) gmin_subdevs[i].gpio1 = NULL; if (pmic_id == PMIC_REGULATOR) { - gmin_subdevs[i].v1p8_reg = regulator_get(dev, "V1P8SX"); - gmin_subdevs[i].v2p8_reg = regulator_get(dev, "V2P8SX"); + /* Those regulators may have different names depending on the BIOS */ + gmin_subdevs[i].v1p8_reg = regulator_get_optional(dev, "V1P8SX"); + gmin_subdevs[i].v2p8_reg = regulator_get_optional(dev, "V2P8SX"); + + gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A"); gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B"); -- GitLab From 3a5e9f4c4d5a0e670bf72044e20b14536ebaa968 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 10:35:30 +0200 Subject: [PATCH 429/503] media: atomisp: remove bayer_io_ls duplication There are two instances of those, one for isp2401 and another one for isp2400, both with identical contents, except for comments and an ifdef. Get rid of one of them. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/Makefile | 2 +- .../io_ls/bayer_io_ls/ia_css_bayer_io.host.c | 95 ------------------- .../io_ls/bayer_io_ls/ia_css_bayer_io.host.h | 28 ------ .../io_ls/bayer_io_ls/ia_css_bayer_io_param.h | 20 ---- .../io_ls/bayer_io_ls/ia_css_bayer_io_types.h | 20 ---- .../yuv444_io_ls/ia_css_yuv444_io_types.h | 20 ---- .../bayer_io_ls/ia_css_bayer_io.host.c | 26 +++-- .../bayer_io_ls/ia_css_bayer_io.host.h | 26 ++--- .../bayer_io_ls/ia_css_bayer_io_param.h | 26 ++--- .../bayer_io_ls/ia_css_bayer_io_types.h | 26 ++--- .../atomisp/pci/atomisp2/css2400/sh_css_sp.c | 4 - 11 files changed, 52 insertions(+), 241 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/Makefile b/drivers/staging/media/atomisp/pci/atomisp2/Makefile index 7fead5fc9a7df..ad9a8e69a5077 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/Makefile +++ b/drivers/staging/media/atomisp/pci/atomisp2/Makefile @@ -86,7 +86,7 @@ atomisp-objs += \ css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.o \ css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.o \ css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.o \ - css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ + css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.o \ css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.o \ css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.o \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c deleted file mode 100644 index c50b3d136f83f..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.c +++ /dev/null @@ -1,95 +0,0 @@ -#ifndef ISP2401 -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#include "ia_css_bayer_io.host.h" -#include "dma.h" -#include "math_support.h" -#ifndef IA_CSS_NO_DEBUG -#include "ia_css_debug.h" -#endif -#include "ia_css_isp_params.h" -#include "ia_css_frame.h" - -void -ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args) -{ - const struct ia_css_frame *in_frame = args->in_frame; - const struct ia_css_frame **out_frames = (const struct ia_css_frame **) - &args->out_frame; - const struct ia_css_frame_info *in_frame_info = (in_frame) ? &in_frame->info : - &binary->in_frame_info; - - const unsigned int ddr_bits_per_element = sizeof(short) * 8; - const unsigned int ddr_elems_per_word = ceil_div(HIVE_ISP_DDR_WORD_BITS, - ddr_bits_per_element); - unsigned int size_get = 0, size_put = 0; - unsigned int offset = 0; - - if (binary->info->mem_offsets.offsets.param) { - size_get = binary->info->mem_offsets.offsets.param->dmem.get.size; - offset = binary->info->mem_offsets.offsets.param->dmem.get.offset; - } - - if (size_get) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - struct dma_port_config config; -#ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_bayer_io_config() get part enter:\n"); -#endif - - ia_css_dma_configure_from_info(&config, in_frame_info); - // The base_address of the input frame will be set in the ISP - to->width = in_frame_info->res.width; - to->height = in_frame_info->res.height; - to->stride = config.stride; - to->ddr_elems_per_word = ddr_elems_per_word; -#ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_bayer_io_config() get part leave:\n"); -#endif - } - - if (binary->info->mem_offsets.offsets.param) { - size_put = binary->info->mem_offsets.offsets.param->dmem.put.size; - offset = binary->info->mem_offsets.offsets.param->dmem.put.offset; - } - - if (size_put) { - struct ia_css_common_io_config *to = (struct ia_css_common_io_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - struct dma_port_config config; -#ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_bayer_io_config() put part enter:\n"); -#endif - - ia_css_dma_configure_from_info(&config, &out_frames[0]->info); - to->base_address = out_frames[0]->data; - to->width = out_frames[0]->info.res.width; - to->height = out_frames[0]->info.res.height; - to->stride = config.stride; - to->ddr_elems_per_word = ddr_elems_per_word; - -#ifndef IA_CSS_NO_DEBUG - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_bayer_io_config() put part leave:\n"); -#endif - } -} -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h deleted file mode 100644 index 33642f00ef0fd..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __BAYER_IO_HOST_H -#define __BAYER_IO_HOST_H - -#include "ia_css_bayer_io_param.h" -#include "ia_css_bayer_io_types.h" -#include "ia_css_binary.h" -#include "sh_css_internal.h" - -void -ia_css_bayer_io_config( - const struct ia_css_binary *binary, - const struct sh_css_binary_args *args); - -#endif /*__BAYER_IO_HOST_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h deleted file mode 100644 index 9fe58b2c14be0..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_param.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_BAYER_IO_PARAM -#define __IA_CSS_BAYER_IO_PARAM - -#include "../common/ia_css_common_io_param.h" - -#endif /* __IA_CSS_BAYER_IO_PARAM */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h deleted file mode 100644 index c2a83361b298d..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io_types.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_BAYER_IO_TYPES_H -#define __IA_CSS_BAYER_IO_TYPES_H - -#include "../common/ia_css_common_io_types.h" - -#endif /* __IA_CSS_BAYER_IO_TYPES_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h deleted file mode 100644 index 5d0c92a430ca6..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_YUV444_IO_TYPES -#define __IA_CSS_YUV444_IO_TYPES - -#include "../common/ia_css_common_io_types.h" - -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c index 96abc16607210..bf71a7f661e63 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c @@ -1,17 +1,16 @@ -#ifdef ISP2401 /* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010 - 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ #include "ia_css_bayer_io.host.h" #include "dma.h" @@ -92,4 +91,3 @@ ia_css_bayer_io_config( #endif } } -#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h index 31dcf394ffb65..f9db75a089afc 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h @@ -1,16 +1,16 @@ -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010 - 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ #ifndef __BAYER_IO_HOST_H #define __BAYER_IO_HOST_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h index ea9d3ab973994..77cfed002e146 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h @@ -1,16 +1,16 @@ -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010 - 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ #ifndef __IA_CSS_BAYER_IO_PARAM #define __IA_CSS_BAYER_IO_PARAM diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h index 1e234e81d0fd6..59b58f30af112 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h @@ -1,16 +1,16 @@ -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2010 - 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ #ifndef __IA_CSS_BAYER_IO_TYPES_H #define __IA_CSS_BAYER_IO_TYPES_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c index b223a38942b15..5eb45db5c6531 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c @@ -62,11 +62,7 @@ #define IA_CSS_INCLUDE_STATES #include "ia_css_isp_states.h" -#ifndef ISP2401 -#include "isp/kernels/io_ls/bayer_io_ls/ia_css_bayer_io.host.h" -#else #include "isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h" -#endif struct sh_css_sp_group sh_css_sp_group; struct sh_css_sp_stage sh_css_sp_stage; -- GitLab From 5254591b4ec594223c65d6134ef4f9d4a8b04544 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 10:57:27 +0200 Subject: [PATCH 430/503] media: atomisp: rename anr2 param header file This file is different than the anr1 version. So, let's name it differently. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h | 2 +- .../anr/anr_2/{ia_css_anr_param.h => ia_css_anr2_param.h} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/{ia_css_anr_param.h => ia_css_anr2_param.h} (100%) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h index e681801e8f0f1..e99108682f5da 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h @@ -18,7 +18,7 @@ #include "sh_css_params.h" #include "ia_css_anr2_types.h" -#include "ia_css_anr_param.h" +#include "ia_css_anr2_param.h" #include "ia_css_anr2_table.host.h" void diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr_param.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_param.h -- GitLab From 33c04118f2fe2e4a4d699f128708d17096a0b622 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 11:15:59 +0200 Subject: [PATCH 431/503] media: atomisp: get rid of io_ls/ subdir The contents of this file is identical to ipu2_io_ls, except for the bayer directory, with is only at ipu2_io_ls. So, get rid of the duplicated code. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp2/Makefile | 8 ++--- .../io_ls/common/ia_css_common_io_param.h | 20 ------------- .../io_ls/common/ia_css_common_io_types.h | 29 ------------------- .../yuv444_io_ls/ia_css_yuv444_io_param.h | 20 ------------- 4 files changed, 4 insertions(+), 73 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/Makefile b/drivers/staging/media/atomisp/pci/atomisp2/Makefile index ad9a8e69a5077..0309e10c847f3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/Makefile +++ b/drivers/staging/media/atomisp/pci/atomisp2/Makefile @@ -250,10 +250,10 @@ INCLUDES += \ -I$(atomisp)/css2400/isp/kernels/gc/gc_1.0/ \ -I$(atomisp)/css2400/isp/kernels/gc/gc_2/ \ -I$(atomisp)/css2400/isp/kernels/hdr/ \ - -I$(atomisp)/css2400/isp/kernels/io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/io_ls/bayer_io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/io_ls/common/ \ - -I$(atomisp)/css2400/isp/kernels/io_ls/yuv444_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/common/ \ + -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ \ -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/ \ -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ \ -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/common/ \ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h deleted file mode 100644 index 70e3600a03c3e..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_param.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_COMMON_IO_PARAM -#define __IA_CSS_COMMON_IO_PARAM - -#include "../common/ia_css_common_io_types.h" - -#endif /* __IA_CSS_COMMON_IO_PARAM */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h deleted file mode 100644 index 541555ee2c483..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/common/ia_css_common_io_types.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_COMMON_IO_TYPES -#define __IA_CSS_COMMON_IO_TYPES - -#define MAX_IO_DMA_CHANNELS 2 - -struct ia_css_common_io_config { - unsigned int base_address; - unsigned int width; - unsigned int height; - unsigned int stride; - unsigned int ddr_elems_per_word; - unsigned int dma_channel[MAX_IO_DMA_CHANNELS]; -}; - -#endif /* __IA_CSS_COMMON_IO_TYPES */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h deleted file mode 100644 index 6258fb42cd5c9..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_YUV444_IO_PARAM -#define __IA_CSS_YUV444_IO_PARAM - -#include "../common/ia_css_common_io_param.h" - -#endif -- GitLab From 1360fa6fa2b185c92a2c7f2332c5ee362b618971 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 11:06:27 +0200 Subject: [PATCH 432/503] media: atomisp: remove unused duplicated files Those files aren't used. So, just get rid of them. Signed-off-by: Mauro Carvalho Chehab --- .../isp/kernels/cnr/cnr_2/ia_css_cnr_param.h | 20 -------------- .../isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h | 20 -------------- .../isp/kernels/de/de_1.0/ia_css_de_state.h | 26 ------------------- .../isp/kernels/de/de_2/ia_css_de_param.h | 20 -------------- .../isp/kernels/de/de_2/ia_css_de_state.h | 21 --------------- .../kernels/ynr/ynr_1.0/ia_css_ynr_state.h | 26 ------------------- .../isp/kernels/ynr/ynr_2/ia_css_ynr_param.h | 20 -------------- .../isp/kernels/ynr/ynr_2/ia_css_ynr_state.h | 21 --------------- 8 files changed, 174 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr_param.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_param.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_state.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_param.h delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_state.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr_param.h deleted file mode 100644 index 56651ba62598e..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr_param.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_CNRX_PARAM_H -#define __IA_CSS_CNRX_PARAM_H - -#include "ia_css_cnr2_param.h" - -#endif /* __IA_CSS_CNRX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h deleted file mode 100644 index dcd471f9bd665..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc_param.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_CTCX_PARAM_H -#define __IA_CSS_CTCX_PARAM_H - -#include "ia_css_ctc1_5_param.h" - -#endif /* __IA_CSS_CTCX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h deleted file mode 100644 index 59568a182f64c..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_state.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_DE_STATE_H -#define __IA_CSS_DE_STATE_H - -#include "type_support.h" -#include "vmem.h" - -/* DE (Demosaic) */ -struct sh_css_isp_de_vmem_state { - VMEM_ARRAY(de_buf[4], MAX_VECTORS_PER_BUF_LINE *ISP_NWAY); -}; - -#endif /* __IA_CSS_DE_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_param.h deleted file mode 100644 index 59af9523604d6..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_param.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_DEX_PARAM_H -#define __IA_CSS_DEX_PARAM_H - -#include "ia_css_de2_param.h" - -#endif /* __IA_CSS_DEX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_state.h deleted file mode 100644 index f2c65ba589830..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de_state.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_DE2_STATE_H -#define __IA_CSS_DE2_STATE_H - -/* Reuse DE1 states */ -#include "../de_1.0/ia_css_de_state.h" - -#endif /* __IA_CSS_DE2_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h deleted file mode 100644 index 63aa76f1c4e50..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_state.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_YNR_STATE_H -#define __IA_CSS_YNR_STATE_H - -#include "type_support.h" -#include "vmem.h" - -/* YNR (luminance noise reduction) */ -struct sh_css_isp_ynr_vmem_state { - VMEM_ARRAY(ynr_buf[4], MAX_VECTORS_PER_BUF_LINE *ISP_NWAY); -}; - -#endif /* __IA_CSS_YNR_STATE_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_param.h deleted file mode 100644 index 48fb7d22d7c13..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_param.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_YNRX_PARAM_H -#define __IA_CSS_YNRX_PARAM_H - -#include "ia_css_ynr2_param.h" - -#endif /* __IA_CSS_YNRX_PARAM_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_state.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_state.h deleted file mode 100644 index 2516dd3dc12b7..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr_state.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __IA_CSS_YNR2_STATE_H -#define __IA_CSS_YNR2_STATE_H - -/* Reuse YNR1 states */ -#include "../ynr_1.0/ia_css_ynr_state.h" - -#endif /* __IA_CSS_YNR2_STATE_H */ -- GitLab From e6c1310370138b9f9ef091bc13d04e99e51e60f3 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 11:43:07 +0200 Subject: [PATCH 433/503] media: atomisp: get rid of trivial version checks at *.h Most of the remaining ifdefs check for ISP2401 are trivial. Get rid of them. Signed-off-by: Mauro Carvalho Chehab --- .../input_system_global.h | 8 +++--- .../runtime/binary/interface/ia_css_binary.h | 8 ------ .../runtime/bufq/interface/ia_css_bufq.h | 18 +------------ .../runtime/bufq/interface/ia_css_bufq_comm.h | 16 ------------ .../runtime/debug/interface/ia_css_debug.h | 15 +++-------- .../debug/interface/ia_css_debug_internal.h | 18 +------------ .../debug/interface/ia_css_debug_pipe.h | 18 +------------ .../runtime/event/interface/ia_css_event.h | 18 +------------ .../runtime/eventq/interface/ia_css_eventq.h | 18 +------------ .../runtime/frame/interface/ia_css_frame.h | 25 +++---------------- .../frame/interface/ia_css_frame_comm.h | 18 +------------ .../runtime/ifmtr/interface/ia_css_ifmtr.h | 18 +------------ .../inputfifo/interface/ia_css_inputfifo.h | 18 +------------ .../isp_param/interface/ia_css_isp_param.h | 18 +------------ .../runtime/isys/interface/ia_css_isys.h | 18 +------------ .../runtime/isys/interface/ia_css_isys_comm.h | 18 +------------ .../css2400/runtime/isys/src/csi_rx_rmgr.h | 18 +------------ .../css2400/runtime/isys/src/ibuf_ctrl_rmgr.h | 18 +------------ .../css2400/runtime/isys/src/isys_dma_rmgr.h | 18 +------------ .../runtime/isys/src/isys_stream2mmio_rmgr.h | 18 +------------ .../css2400/runtime/isys/src/virtual_isys.h | 18 +------------ .../pipeline/interface/ia_css_pipeline.h | 18 +------------ .../interface/ia_css_pipeline_common.h | 18 +------------ .../runtime/queue/interface/ia_css_queue.h | 18 +------------ .../queue/interface/ia_css_queue_comm.h | 18 +------------ .../css2400/runtime/queue/src/queue_access.h | 18 +------------ .../runtime/rmgr/interface/ia_css_rmgr.h | 18 +------------ .../runtime/rmgr/interface/ia_css_rmgr_vbuf.h | 18 +------------ .../runtime/spctrl/interface/ia_css_spctrl.h | 21 ++-------------- .../spctrl/interface/ia_css_spctrl_comm.h | 18 +------------ .../tagger/interface/ia_css_tagger_common.h | 18 +------------ 31 files changed, 39 insertions(+), 504 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h index ff9f53b07c773..9c882fe134f4a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h @@ -125,9 +125,9 @@ struct input_system_cfg_s { input_system_input_port_ID_t input_port_id; input_system_source_type_t mode; -#ifdef ISP2401 + + /* ISP2401 */ input_system_polling_mode_t polling_mode; -#endif bool online; bool raw_packed; @@ -180,10 +180,10 @@ struct virtual_input_system_stream_s { u8 online; s8 linked_isys_stream_id; u8 valid; -#ifdef ISP2401 + + /* ISP2401 */ input_system_polling_mode_t polling_mode; s32 subscr_index; -#endif }; typedef struct virtual_input_system_stream_cfg_s diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h index 487078d934e24..26a3fc4d48e86 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h @@ -182,20 +182,12 @@ ia_css_binary_find(struct ia_css_binary_descr *descr, * @param[in] type: The shading correction type. * @param[in] required_bds_factor: The bayer downscaling factor required in the pipe. * @param[in] stream_config: The stream configuration. -#ifndef ISP2401 - * @param[out] info: The shading information. -#else * @param[out] shading_info: The shading information. * The shading information necessary as API is stored in the shading_info. -#endif * The driver needs to get this information to generate -#ifndef ISP2401 - * the shading table directly required in the isp. -#else * the shading table directly required from ISP. * @param[out] pipe_config: The pipe configuration. * The shading information related to ISP (but, not necessary as API) is stored in the pipe_config. -#endif * @return IA_CSS_SUCCESS or error code upon error. * */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h index 9eca373c13636..78e433fa34663 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_BUFQ_H #define _IA_CSS_BUFQ_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h index 20951f6bb0af5..508209711edce 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_BUFQ_COMM_H #define _IA_CSS_BUFQ_COMM_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h index 682ecff5bc52a..61d612ec3a05e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h @@ -26,11 +26,8 @@ #include "ia_css_stream_public.h" #include "ia_css_metadata.h" #include "sh_css_internal.h" -#ifdef ISP2401 -#if defined(IS_ISP_2500_SYSTEM) +/* ISP2500 */ #include "ia_css_pipe.h" -#endif -#endif /* available levels */ /*! Level for tracing errors */ @@ -177,7 +174,7 @@ void ia_css_debug_dump_isp_state(void); */ void ia_css_debug_dump_sp_state(void); -#ifdef ISP2401 +/* ISP2401 */ /*! @brief Dump GAC hardware state. * Dumps the GAC ACB hardware registers. may be useful for * detecting a GAC which got hang. @@ -185,7 +182,6 @@ void ia_css_debug_dump_sp_state(void); */ void ia_css_debug_dump_gac_state(void); -#endif /*! @brief Dump dma controller state. * Dumps the dma controller state to tracing output. * @return None @@ -472,7 +468,7 @@ bool ia_css_debug_mode_enable_dma_channel( */ void ia_css_debug_dump_trace(void); -#ifdef ISP2401 +/* ISP2401 */ /** * @brief Program counter dumping (in loop) * @@ -484,7 +480,7 @@ void ia_css_debug_dump_trace(void); */ void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps); -#if defined(IS_ISP_2500_SYSTEM) +/* ISP2500 */ /*! @brief Dump all states for ISP hang case. * Dumps the ISP previous and current configurations * GACs status, SP0/1 statuses. @@ -503,7 +499,4 @@ void ia_css_debug_dump_hang_status( */ void ia_css_debug_ext_command_handler(void); -#endif -#endif - #endif /* _IA_CSS_DEBUG_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h index 88d0258072011..27136381857f4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,20 +11,5 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif /* TO DO: Move debug related code from ia_css_internal.h in */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h index 3443807cb7c93..e9964bb421d60 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_DEBUG_PIPE_H_ #define _IA_CSS_DEBUG_PIPE_H_ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h index 809ee8fcbf293..1fcd0fadcac89 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_EVENT_H #define _IA_CSS_EVENT_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h index d12cfde889265..8602398ede52c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_EVENTQ_H #define _IA_CSS_EVENTQ_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h index 0f8eed0a480fa..613fa33ab9308 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,28 +11,13 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_FRAME_H__ #define __IA_CSS_FRAME_H__ -#ifdef ISP2401 +/* ISP2401 */ #include -#endif + #include #include #include "dma.h" @@ -157,7 +141,7 @@ void ia_css_dma_configure_from_info( struct dma_port_config *config, const struct ia_css_frame_info *info); -#ifdef ISP2401 +/* ISP2401 */ /* @brief Finds the cropping resolution * This function finds the maximum cropping resolution in an input image keeping * the aspect ratio for the given output resolution.Calculates the coordinates @@ -176,5 +160,4 @@ ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, const struct ia_css_resolution *out_res, struct ia_css_resolution *crop_res); -#endif #endif /* __IA_CSS_FRAME_H__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h index 3351d34dbef30..8861d07193bdb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_FRAME_COMM_H__ #define __IA_CSS_FRAME_COMM_H__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h index 53941fbf0b8f0..d4b0b23611763 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_IFMTR_H__ #define __IA_CSS_IFMTR_H__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h index a5e552e590e8a..d2dd231b6296c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_INPUTFIFO_H #define _IA_CSS_INPUTFIFO_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h index d32323866fd9e..2769183a8956a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_ISP_PARAM_H_ #define _IA_CSS_ISP_PARAM_H_ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h index 8387dbfb90254..e2aca35452c0f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_ISYS_H__ #define __IA_CSS_ISYS_H__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h index 451b0dc6a3a33..6ad7a0cd51465 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_ISYS_COMM_H #define __IA_CSS_ISYS_COMM_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h index c9a75d8e74387..79d7c4b29bf4d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __CSI_RX_RMGR_H_INCLUDED__ #define __CSI_RX_RMGR_H_INCLUDED__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h index a04034a8763c4..7155e2c6e05c2 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IBUF_CTRL_RMGR_H_INCLUDED__ #define __IBUF_CTRL_RMGR_H_INCLUDED__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h index 08913240d7270..e3d07ac390fc0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __ISYS_DMA_RMGR_H_INCLUDED__ #define __ISYS_DMA_RMGR_H_INCLUDED__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h index 6427a999848a9..b55cf02c8bceb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __ISYS_STREAM2MMIO_RMGR_H_INCLUDED__ #define __ISYS_STREAM2MMIO_RMGR_H_INCLUDED__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h index 91614beb9b896..b675907791adb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __VIRTUAL_ISYS_H_INCLUDED__ #define __VIRTUAL_ISYS_H_INCLUDED__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h index 3ad5e6227b27e..6a41efee5635f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_PIPELINE_H__ #define __IA_CSS_PIPELINE_H__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h index 30dec75bda0c4..b96a5b146096f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_PIPELINE_COMMON_H__ #define __IA_CSS_PIPELINE_COMMON_H__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h index d1ef2179e7295..6daeb060daf94 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_QUEUE_H #define __IA_CSS_QUEUE_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h index 04c9c1c84e860..87fa4288d9a6b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_QUEUE_COMM_H #define __IA_CSS_QUEUE_COMM_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h index 6922b741a1165..884c55a754d1f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __QUEUE_ACCESS_H #define __QUEUE_ACCESS_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h index 9f78e709b3d0e..47a80ae8dbf30 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_RMGR_H #define _IA_CSS_RMGR_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h index 0046c6d49a872..0660b65f2e34a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef _IA_CSS_RMGR_VBUF_H #define _IA_CSS_RMGR_VBUF_H diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h index 64a517148ff9f..543ca89684182 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_SPCTRL_H__ #define __IA_CSS_SPCTRL_H__ @@ -57,11 +41,10 @@ hrt_vaddress get_sp_code_addr(sp_ID_t sp_id); enum ia_css_err ia_css_spctrl_load_fw(sp_ID_t sp_id, ia_css_spctrl_cfg *spctrl_cfg); -#ifdef ISP2401 +/* ISP2401 */ /*! Setup registers for reloading FW */ void sh_css_spctrl_reload_fw(sp_ID_t sp_id); -#endif /*! Unload/release any memory allocated to hold the firmware */ enum ia_css_err ia_css_spctrl_unload_fw(sp_ID_t sp_id); diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl_comm.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl_comm.h index 16e6fc0018453..ca37c4ab75441 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl_comm.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl_comm.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_SPCTRL_COMM_H__ #define __IA_CSS_SPCTRL_COMM_H__ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h index 0a8bc1da06f6a..8992946464941 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/** -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #ifndef __IA_CSS_TAGGER_COMMON_H__ #define __IA_CSS_TAGGER_COMMON_H__ -- GitLab From 8022c2e2921499816f13ccb46663e8b4e6986299 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 11:50:52 +0200 Subject: [PATCH 434/503] media: atomisp: get rid of ia_css_sc_param.h version dependency That's the last header file which had ifdefs for ISP2401. The problem is that the conflicting dependencies were on another file (sh_css_defs.h). Move the conflicting code to it, adding a prefix which would describe what version the macro applies. Then, ensure that binary.c will use the right version, according with the hardware version. Signed-off-by: Mauro Carvalho Chehab --- .../isp/kernels/sc/sc_1.0/ia_css_sc_param.h | 27 ---------------- .../css2400/runtime/binary/src/binary.c | 10 +++--- .../pci/atomisp2/css2400/sh_css_defs.h | 32 +++++++++++++++++-- 3 files changed, 33 insertions(+), 36 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h index cc44b6a57e968..38a6258219876 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h @@ -17,33 +17,6 @@ #include "type_support.h" -/* To position the shading center grid point on the center of output image, - * one more grid cell is needed as margin. */ -#define SH_CSS_SCTBL_CENTERING_MARGIN 1 - -/* The shading table width and height are the number of grids, not cells. The last grid should be counted. */ -#define SH_CSS_SCTBL_LAST_GRID_COUNT 1 - -#ifdef ISP2401 -/* Number of horizontal grids per color in the shading table. */ -#define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ - (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + \ - SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) - -/* Number of vertical grids per color in the shading table. */ -#define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ - (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + \ - SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) -#endif - -/* Legacy API: Number of horizontal grids per color in the shading table. */ -#define _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ - (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) - -/* Legacy API: Number of vertical grids per color in the shading table. */ -#define _ISP_SCTBL_LEGACY_HEIGHT(input_height, deci_factor_log2) \ - (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) - /* SC (Shading Corrction) */ struct sh_css_isp_sc_params { s32 gain_shift; diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c index b5004592ac179..f5103813caa0b 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c @@ -1354,17 +1354,15 @@ ia_css_binary_fill_info(const struct ia_css_binary_xinfo *xinfo, if (info->enable.sc) { if (!atomisp_hw_is_isp2401) { - binary->sctbl_width_per_color = _ISP_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); + binary->sctbl_width_per_color = _ISP2400_SCTBL_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); binary->sctbl_aligned_width_per_color = ISP2400_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; - binary->sctbl_height = _ISP_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); + binary->sctbl_height = _ISP2400_SCTBL_HEIGHT(sc_3a_dis_height, s3a_log_deci); } else { - binary->sctbl_width_per_color = _ISP_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); + binary->sctbl_width_per_color = _ISP2401_SCTBL_WIDTH_PER_COLOR(isp_internal_width, s3a_log_deci); binary->sctbl_aligned_width_per_color = ISP2401_SH_CSS_MAX_SCTBL_ALIGNED_WIDTH_PER_COLOR; - binary->sctbl_height = _ISP_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); -#ifdef ISP2401 + binary->sctbl_height = _ISP2401_SCTBL_HEIGHT(isp_internal_height, s3a_log_deci); binary->sctbl_legacy_width_per_color = _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(sc_3a_dis_padded_width, s3a_log_deci); binary->sctbl_legacy_height = _ISP_SCTBL_LEGACY_HEIGHT(sc_3a_dis_height, s3a_log_deci); -#endif } } else { diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h index 611a522eb6495..fcd5081edf82f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h @@ -252,14 +252,40 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191] CEIL_MUL(_ISP_MORPH_TABLE_WIDTH(width), \ SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD) -#define _ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ +#define _ISP2400_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + 1) -#define _ISP_SCTBL_HEIGHT(input_height, deci_factor_log2) \ +#define _ISP2400_SCTBL_HEIGHT(input_height, deci_factor_log2) \ (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + 1) -#define _ISP_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ +#define _ISP2400_SCTBL_ALIGNED_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ CEIL_MUL(_ISP_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2), \ ISP_VEC_NELEMS) +/* To position the shading center grid point on the center of output image, + * one more grid cell is needed as margin. */ +#define SH_CSS_SCTBL_CENTERING_MARGIN 1 + +/* The shading table width and height are the number of grids, not cells. The last grid should be counted. */ +#define SH_CSS_SCTBL_LAST_GRID_COUNT 1 + +/* Number of horizontal grids per color in the shading table. */ +#define _ISP2401_SCTBL_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ + (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + \ + SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) + +/* Number of vertical grids per color in the shading table. */ +#define _ISP2401_SCTBL_HEIGHT(input_height, deci_factor_log2) \ + (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + \ + SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT) + + +/* ISP2401: Legacy API: Number of horizontal grids per color in the shading table. */ +#define _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(input_width, deci_factor_log2) \ + (ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) + +/* ISP2401: Legacy API: Number of vertical grids per color in the shading table. */ +#define _ISP_SCTBL_LEGACY_HEIGHT(input_height, deci_factor_log2) \ + (ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT) + /* ***************************************************************** * Statistics for 3A (Auto Focus, Auto White Balance, Auto Exposure) -- GitLab From e3292f808b75fa0e01b4391c1ce1972855143509 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 14:12:27 +0200 Subject: [PATCH 435/503] media: atomisp: get rid of ISP_VMEM_IS_BAMEM unused defines There are several defines on ISP-specific definition sets that are unused, related to VMEM_BAMEM. Get rid of those. Signed-off-by: Mauro Carvalho Chehab --- .../hrt/isp2400_mamoiada_params.h | 26 ------------------- .../css2400/hive_isp_css_common/isp_global.h | 1 - .../css2400/isp2401_mamoiada_params.h | 26 ------------------- 3 files changed, 53 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h index 843c819cf519e..edc4d4ff18466 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h @@ -43,29 +43,6 @@ #define ISP_VMEM_BSEL_DOWNSAMPLE 8 #define ISP_VMEM_ELEMBITS 14 #define ISP_VMEM_ELEM_PRECISION 14 -#define ISP_VMEM_IS_BAMEM 1 -#if ISP_VMEM_IS_BAMEM -#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 -#define ISP_VMEM_BAMEM_LATENCY 5 -#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 -#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 -#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 -#define ISP_VMEM_BAMEM_LININT 0 -#define ISP_VMEM_BAMEM_DAP_BITS 3 -#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 -#define ISP_VMEM_BAMEM_PID_BITS 3 -#define ISP_VMEM_BAMEM_OFFSET_BITS 19 -#define ISP_VMEM_BAMEM_ADDRESS_BITS 25 -#define ISP_VMEM_BAMEM_RID_BITS 4 -#define ISP_VMEM_BAMEM_TRANSPOSITION 1 -#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 -#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 -#define ISP_VMEM_BAMEM_LUT_ELEMS 16 -#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 -#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 -#define ISP_VMEM_BAMEM_SMART_FETCH 1 -#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 -#endif /* ISP_VMEM_IS_BAMEM */ #define ISP_PMEM_DEPTH 2048 #define ISP_PMEM_WIDTH 640 #define ISP_VAMEM_ADDRESS_BITS 12 @@ -165,9 +142,6 @@ #define ISP_SLICE_WIDTH 56 #define ISP_VMEM_WIDTH 896 #define ISP_VMEM_ALIGN 128 -#if ISP_VMEM_IS_BAMEM -#define ISP_VMEM_ALIGN_ELEM 2 -#endif /* ISP_VMEM_IS_BAMEM */ #define ISP_SIMDLSU 1 #define ISP_LSU_IMM_BITS 12 diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h index 59d28f4efbad5..1a8547d584358 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h @@ -98,7 +98,6 @@ #define ISP_HMEM_SINK_REG 0x08 /* ISP2401 */ -#define ISP_BAMEM_ALIGN_ELEM ISP_VMEM_ALIGN_ELEM #define BAMEM VMEM #define XNR3_DOWN_BAMEM_BASE_ADDRESS (0x16880) #define XNR3_UP_BAMEM_BASE_ADDRESS (0x12880) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h index e548e45a161d6..42f8214738262 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h @@ -43,29 +43,6 @@ #define ISP_VMEM_BSEL_DOWNSAMPLE 8 #define ISP_VMEM_ELEMBITS 14 #define ISP_VMEM_ELEM_PRECISION 14 -#define ISP_VMEM_IS_BAMEM 1 -#if ISP_VMEM_IS_BAMEM -#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8 -#define ISP_VMEM_BAMEM_LATENCY 5 -#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2 -#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8 -#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16 -#define ISP_VMEM_BAMEM_LININT 0 -#define ISP_VMEM_BAMEM_DAP_BITS 3 -#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0 -#define ISP_VMEM_BAMEM_PID_BITS 3 -#define ISP_VMEM_BAMEM_OFFSET_BITS 19 -#define ISP_VMEM_BAMEM_ADDRESS_BITS 25 -#define ISP_VMEM_BAMEM_RID_BITS 4 -#define ISP_VMEM_BAMEM_TRANSPOSITION 1 -#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1 -#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1 -#define ISP_VMEM_BAMEM_LUT_ELEMS 16 -#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14 -#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1 -#define ISP_VMEM_BAMEM_SMART_FETCH 1 -#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0 -#endif /* ISP_VMEM_IS_BAMEM */ #define ISP_PMEM_DEPTH 2048 #define ISP_PMEM_WIDTH 640 #define ISP_VAMEM_ADDRESS_BITS 12 @@ -165,9 +142,6 @@ #define ISP_SLICE_WIDTH 56 #define ISP_VMEM_WIDTH 896 #define ISP_VMEM_ALIGN 128 -#if ISP_VMEM_IS_BAMEM -#define ISP_VMEM_ALIGN_ELEM 2 -#endif /* ISP_VMEM_IS_BAMEM */ #define ISP_SIMDLSU 1 #define ISP_LSU_IMM_BITS 12 -- GitLab From c6552aebbe6cae982fd33bd885fcc111da3eeed8 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 14:24:48 +0200 Subject: [PATCH 436/503] media: atomisp: get rid of __ISP define tests This is not defined anywhere, so just get rid of the dead source code. Signed-off-by: Mauro Carvalho Chehab --- .../hive_isp_css_common/host/vamem_private.h | 36 ------------------- .../css2400/hive_isp_css_include/vamem.h | 9 ----- .../pci/atomisp2/css2400/ia_css_acc_types.h | 4 +-- .../pci/atomisp2/css2400/ia_css_buffer.h | 4 +-- .../isp/modes/interface/input_buf.isp.h | 23 ------------ .../css2400/isp/modes/interface/isp_types.h | 33 ----------------- .../pci/atomisp2/css2400/sh_css_internal.h | 15 +------- 7 files changed, 3 insertions(+), 121 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h deleted file mode 100644 index 78a607bb4e713..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_private.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010-2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __VAMEM_PRIVATE_H_INCLUDED__ -#define __VAMEM_PRIVATE_H_INCLUDED__ - -#include "vamem_public.h" - -#include - -#include "assert_support.h" - -STORAGE_CLASS_ISP_C void isp_vamem_store( - const vamem_ID_t ID, - vamem_data_t *addr, - const vamem_data_t *data, - const size_t size) /* in vamem_data_t */ -{ - assert(ID < N_VAMEM_ID); - assert(ISP_VAMEM_BASE[ID] != (hrt_address) - 1); - hrt_master_port_store(ISP_VAMEM_BASE[ID] + (unsigned int)addr, data, - size * sizeof(vamem_data_t)); -} - -#endif /* __VAMEM_PRIVATE_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h index 032f371a72c40..9918ca3981381 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h @@ -31,15 +31,6 @@ #include "system_local.h" #include "vamem_local.h" - -#ifndef __INLINE_VAMEM__ -#define STORAGE_CLASS_VAMEM_H extern -#define STORAGE_CLASS_VAMEM_C #include "vamem_public.h" -#else /* __INLINE_VAMEM__ */ -#define STORAGE_CLASS_VAMEM_H static inline -#define STORAGE_CLASS_VAMEM_C static inline -#include "vamem_private.h" -#endif /* __INLINE_VAMEM__ */ #endif /* __VAMEM_H_INCLUDED__ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h index d429ffaa972fa..d281846eeba56 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h @@ -355,7 +355,7 @@ struct ia_css_sp_info { issue with the firmware struct/union's. More permanent solution will be to refactor this include. */ -#if !defined(__ISP) + /* Accelerator firmware information. */ struct ia_css_acc_info { @@ -468,8 +468,6 @@ struct ia_css_acc_fw { #define IA_CSS_EXT_ISP_MEM_OFFSETS(f) \ ((const struct ia_css_memory_offsets *)((const char *)(f) + (f)->blob.mem_offsets)) -#endif /* !defined(__ISP) */ - enum ia_css_sp_sleep_mode { SP_DISABLE_SLEEP_MODE = 0, SP_SLEEP_AFTER_FRAME = 1 << 0, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h index 403fa9416d0fa..38e1f4791029e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h @@ -47,7 +47,7 @@ enum ia_css_buffer_type { }; /* Driver API is not SP/ISP visible, 64 bit types not supported on hivecc */ -#if !defined(__ISP) + /* Buffer structure. This is a container structure that enables content * independent buffer queues and access functions. */ @@ -82,6 +82,4 @@ struct ia_css_buffer { void ia_css_dequeue_param_buffers(void); -#endif /* !__ISP */ - #endif /* __IA_CSS_BUFFER_H */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h index e7941f9614d52..5774c905d8e1f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h @@ -33,28 +33,5 @@ more details. /* The input buffer should be on a fixed address in vmem, for continuous capture */ #define INPUT_BUF_ADDR 0x0 -#if (defined(__ISP) && (!defined(MODE) || MODE != IA_CSS_BINARY_MODE_COPY)) - -#if ENABLE_CONTINUOUS -typedef struct { - tmemvectoru - raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ - /* Two more lines for SP raw copy efficiency */ -#ifndef ENABLE_REDUCED_INPUT_BUFFER - /* "Workaround" solution in the case that space needed vmem exceeds the size of the vmem. */ - /* Since in theory this buffer is not needed for IPU 2.2/2.3, */ - /* the workaround solution will not be needed (and the whole buffer) after the code refactoring. */ - tmemvectoru - _raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE_CONT]; /* 2 bayer lines */ -#endif -} input_line_type; -#else /* ENABLE CONTINUOUS == 0 */ -typedef struct { - tmemvectoru - raw[INPUT_BUF_HEIGHT][INPUT_BUF_LINES][MAX_VECTORS_PER_INPUT_LINE]; /* 2 bayer lines */ -} input_line_type; -#endif /* ENABLE_CONTINUOUS */ - -#endif /*MODE*/ #endif /* _INPUT_BUF_ISP_H_ */ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h index 651fce4a1faa8..6bdf8451e7d45 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h @@ -19,39 +19,6 @@ more details. without this extra decl. */ struct ia_css_3a_output; -#if defined(__ISP) -struct isp_uds_config { - int hive_dx; - int hive_dy; - unsigned int hive_woix; - unsigned int hive_bpp; /* gdc_bits_per_pixel */ - unsigned int hive_bci; -}; - -struct s_isp_gdcac_config { - unsigned int nbx; - unsigned int nby; -}; - -/* output.hive.c request information */ -typedef enum { - output_y_channel, - output_c_channel, - OUTPUT_NUM_CHANNELS -} output_channel_type; - -typedef struct s_output_dma_info { - unsigned int cond; /* Condition for transfer */ - output_channel_type channel_type; - dma_channel channel; - unsigned int width_a; - unsigned int width_b; - unsigned int stride; - unsigned int v_delta; /* Offset for v address to do cropping */ - char *x_base; /* X base address */ -} output_dma_info_type; -#endif - /* Input stream formats, these correspond to the MIPI formats and the way * the CSS receiver sends these to the input formatter. * The bit depth of each pixel element is stored in the global variable diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h index d77601eb75ab6..5f271d9ae4854 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h @@ -31,9 +31,7 @@ #include "ia_css_buffer.h" #include "ia_css_binary.h" -#if !defined(__ISP) #include "sh_css_firmware.h" /* not needed/desired on SP/ISP */ -#endif #include "sh_css_legacy.h" #include "sh_css_defs.h" #include "sh_css_uds.h" @@ -765,16 +763,8 @@ struct sh_css_hmm_buffer { * uint64_t does not exist on SP/ISP. * Size of the struct is checked by sp.hive.c. */ -#if !defined(__ISP) CSS_ALIGN(u64 cookie_ptr, 8); /* TODO: check if this alignment is needed */ u64 kernel_ptr; -#else - CSS_ALIGN(struct { u32 a[2]; } cookie_ptr, - 8); /* TODO: check if this alignment is needed */ - struct { - u32 a[2]; - } kernel_ptr; -#endif struct ia_css_time_meas timing_data; clock_value_t isys_eof_clock_tick; }; @@ -970,9 +960,7 @@ sh_css_vprint(const char *fmt, va_list args) issue with the firmware struct/union's. More permanent solution will be to refactor this include. */ -#if !defined(__ISP) -hrt_vaddress -sh_css_params_ddr_address_map(void); +hrt_vaddress sh_css_params_ddr_address_map(void); enum ia_css_err sh_css_params_init(void); @@ -1069,6 +1057,5 @@ ia_css_get_crop_offsets( struct ia_css_pipe *pipe, struct ia_css_frame_info *in_frame); #endif -#endif /* !defined(__ISP) */ #endif /* _SH_CSS_INTERNAL_H_ */ -- GitLab From b82cd6b7f587bb6638d6a1cc5254437a9f69a4be Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 29 Apr 2020 21:55:48 +0200 Subject: [PATCH 437/503] media: atomisp: make all file names unique at atomisp driver The *system_*.h files contain ISP-specific definitions, and are used everywhere. While the best would be to get rid of those in favor of some ISP-specific structs, a change like that would require lots of changes. So, instead, let's rename those files replacing them by new ones with ISP ifdefs on it, in order to select between the two different versions. We shall later convert this to some abrstraction layer, but this change should help to be able to build support for either ISP2400 or ISP2401. Signed-off-by: Mauro Carvalho Chehab --- .../atomisp/pci/atomisp2/css2400/input_system_global.h | 10 ++++++++++ .../atomisp/pci/atomisp2/css2400/input_system_local.h | 10 ++++++++++ .../pci/atomisp2/css2400/input_system_private.h | 10 ++++++++++ .../atomisp/pci/atomisp2/css2400/input_system_public.h | 8 ++++++++ ...put_system_local.h => isp2400_input_system_local.h} | 0 ...system_private.h => isp2400_input_system_private.h} | 0 ...t_system_public.h => isp2400_input_system_public.h} | 0 .../system_global.h => isp2400_system_global.h} | 0 .../host/system_local.h => isp2400_system_local.h} | 0 ...t_system_global.h => isp2401_input_system_global.h} | 0 ...put_system_local.h => isp2401_input_system_local.h} | 0 ...system_private.h => isp2401_input_system_private.h} | 0 .../system_global.h => isp2401_system_global.h} | 0 .../host/system_local.h => isp2401_system_local.h} | 0 .../media/atomisp/pci/atomisp2/css2400/system_global.h | 10 ++++++++++ .../media/atomisp/pci/atomisp2/css2400/system_local.h | 10 ++++++++++ ...t_system_global.h => isp2400_input_system_global.h} | 0 17 files changed, 58 insertions(+) create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_global.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_local.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_private.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_public.h rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{hive_isp_css_common/host/input_system_local.h => isp2400_input_system_local.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{hive_isp_css_common/host/input_system_private.h => isp2400_input_system_private.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{hive_isp_css_include/host/input_system_public.h => isp2400_input_system_public.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{hive_isp_css_common/system_global.h => isp2400_system_global.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{hive_isp_css_common/host/system_local.h => isp2400_system_local.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/input_system_global.h => isp2401_input_system_global.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/host/input_system_local.h => isp2401_input_system_local.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/host/input_system_private.h => isp2401_input_system_private.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/system_global.h => isp2401_system_global.h} (100%) rename drivers/staging/media/atomisp/pci/atomisp2/css2400/{css_2401_csi2p_system/host/system_local.h => isp2401_system_local.h} (100%) create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/system_global.h create mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/system_local.h rename drivers/staging/media/atomisp/pci/atomisp2/{css2400/hive_isp_css_common/input_system_global.h => isp2400_input_system_global.h} (100%) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_global.h new file mode 100644 index 0000000000000..e75c2f29042df --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_global.h @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (c) 2020 Mauro Carvalho Chehab + */ + +#ifdef ISP2401 +# include "isp2401_input_system_global.h" +#else +# include "isp2400_input_system_global.h" +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_local.h new file mode 100644 index 0000000000000..8533a1e017e46 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_local.h @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (c) 2020 Mauro Carvalho Chehab + */ + +#ifdef ISP2401 +# include "isp2401_input_system_local.h" +#else +# include "isp2400_input_system_local.h" +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_private.h new file mode 100644 index 0000000000000..69c63a79a30c7 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_private.h @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (c) 2020 Mauro Carvalho Chehab + */ + +#ifdef ISP2401 +# include "isp2401_input_system_private.h" +#else +# include "isp2400_input_system_private.h" +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_public.h new file mode 100644 index 0000000000000..17682c86bceb1 --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_public.h @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (c) 2020 Mauro Carvalho Chehab + */ + +#ifndef ISP2401 +# include "isp2400_input_system_public.h" +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_local.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system_private.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_system_public.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/system_global.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/system_local.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_local.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/system_global.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h rename to drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_global.h new file mode 100644 index 0000000000000..7f833c15f3ceb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_global.h @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (c) 2020 Mauro Carvalho Chehab + */ + +#ifdef ISP2401 +# include "isp2401_system_global.h" +#else +# include "isp2400_system_global.h" +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_local.h b/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_local.h new file mode 100644 index 0000000000000..fbb5daadac9fb --- /dev/null +++ b/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_local.h @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (c) 2020 Mauro Carvalho Chehab + */ + +#ifdef ISP2401 +# include "isp2401_system_local.h" +#else +# include "isp2400_system_local.h" +#endif diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h b/drivers/staging/media/atomisp/pci/atomisp2/isp2400_input_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_system_global.h rename to drivers/staging/media/atomisp/pci/atomisp2/isp2400_input_system_global.h -- GitLab From d8763340d2cb6262fb86424315a1f92cabc0e23c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 09:25:26 +0200 Subject: [PATCH 438/503] media: atomisp: simplify makefiles Remove an uneeded define and Makefile. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp2/Makefile | 2 +- drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c | 2 +- drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile | 2 -- 3 files changed, 2 insertions(+), 4 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile diff --git a/drivers/staging/media/atomisp/pci/atomisp2/Makefile b/drivers/staging/media/atomisp/pci/atomisp2/Makefile index 0309e10c847f3..06f52fb1d38fa 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/Makefile +++ b/drivers/staging/media/atomisp/pci/atomisp2/Makefile @@ -334,7 +334,7 @@ DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__ #DEFINES += -DPUNIT_CAMERA_BUSY #DEFINES += -DUSE_KMEM_CACHE -DEFINES += -DATOMISP_POSTFIX=\"css2400b0_v21\" -DISP2400B0 +DEFINES += -DATOMISP_POSTFIX=\"css2400b0_v21\" DEFINES += -DSYSTEM_hive_isp_css_2400_system -DISP2400 ccflags-y += $(INCLUDES) $(DEFINES) -fno-common diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c index 87736e7a5ea93..d294e6ac8e3b4 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c @@ -1921,7 +1921,7 @@ static const struct pci_device_id atomisp_pci_tbl[] = { * FIXME: * remove the ifs once we get rid of the ifs on other parts of the driver */ -#if defined(ISP2400) || defined(ISP2400B0) +#if defined(ISP2400) /* Merrifield */ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178), .driver_data = HW_IS_ISP2400}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179), .driver_data = HW_IS_ISP2400}, diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile b/drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile deleted file mode 100644 index ee5631b0e635a..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/css2400/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -ccflags-y += -DISP2400B0 -ISP2400B0 := y -- GitLab From 9d4fa1a16b28b1d12b0378993d2d48f572a045d9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 09:49:43 +0200 Subject: [PATCH 439/503] media: atomisp: cleanup directory hierarchy This driver has very long directories without a good reason (IMHO). Let's drop two directories from such hierarchy, in order to simplify things a little bit and make the dir output a bit more readable. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Kconfig | 14 +- drivers/staging/media/atomisp/Makefile | 348 ++++++++++++++++- drivers/staging/media/atomisp/TODO | 2 +- .../{pci/atomisp2 => }/include/hmm/hmm.h | 0 .../{pci/atomisp2 => }/include/hmm/hmm_bo.h | 0 .../atomisp2 => }/include/hmm/hmm_common.h | 0 .../{pci/atomisp2 => }/include/hmm/hmm_pool.h | 0 .../{pci/atomisp2 => }/include/hmm/hmm_vm.h | 0 .../{pci/atomisp2 => }/include/mmu/isp_mmu.h | 0 .../atomisp2 => }/include/mmu/sh_mmu_mrfld.h | 0 drivers/staging/media/atomisp/pci/Kconfig | 14 - drivers/staging/media/atomisp/pci/Makefile | 5 - .../atomisp/pci/{atomisp2 => }/atomisp-regs.h | 0 .../media/atomisp/pci/atomisp2/Makefile | 349 ------------------ .../atomisp/pci/{atomisp2 => }/atomisp_acc.c | 0 .../atomisp/pci/{atomisp2 => }/atomisp_acc.h | 0 .../atomisp/pci/{atomisp2 => }/atomisp_cmd.c | 0 .../atomisp/pci/{atomisp2 => }/atomisp_cmd.h | 0 .../pci/{atomisp2 => }/atomisp_common.h | 0 .../pci/{atomisp2 => }/atomisp_compat.h | 0 .../pci/{atomisp2 => }/atomisp_compat_css20.c | 0 .../pci/{atomisp2 => }/atomisp_compat_css20.h | 0 .../{atomisp2 => }/atomisp_compat_ioctl32.c | 0 .../{atomisp2 => }/atomisp_compat_ioctl32.h | 0 .../atomisp/pci/{atomisp2 => }/atomisp_csi2.c | 0 .../atomisp/pci/{atomisp2 => }/atomisp_csi2.h | 0 .../pci/{atomisp2 => }/atomisp_dfs_tables.h | 0 .../pci/{atomisp2 => }/atomisp_drvfs.c | 0 .../pci/{atomisp2 => }/atomisp_drvfs.h | 0 .../atomisp/pci/{atomisp2 => }/atomisp_file.c | 0 .../atomisp/pci/{atomisp2 => }/atomisp_file.h | 0 .../atomisp/pci/{atomisp2 => }/atomisp_fops.c | 0 .../atomisp/pci/{atomisp2 => }/atomisp_fops.h | 0 .../pci/{atomisp2 => }/atomisp_helper.h | 0 .../pci/{atomisp2 => }/atomisp_internal.h | 0 .../pci/{atomisp2 => }/atomisp_ioctl.c | 0 .../pci/{atomisp2 => }/atomisp_ioctl.h | 0 .../pci/{atomisp2 => }/atomisp_subdev.c | 0 .../pci/{atomisp2 => }/atomisp_subdev.h | 0 .../pci/{atomisp2 => }/atomisp_tables.h | 0 .../atomisp/pci/{atomisp2 => }/atomisp_tpg.c | 0 .../atomisp/pci/{atomisp2 => }/atomisp_tpg.h | 0 .../pci/{atomisp2 => }/atomisp_trace_event.h | 0 .../atomisp/pci/{atomisp2 => }/atomisp_v4l2.c | 0 .../atomisp/pci/{atomisp2 => }/atomisp_v4l2.h | 0 .../base/circbuf/interface/ia_css_circbuf.h | 0 .../circbuf/interface/ia_css_circbuf_comm.h | 0 .../circbuf/interface/ia_css_circbuf_desc.h | 0 .../css2400 => }/base/circbuf/src/circbuf.c | 0 .../base/refcount/interface/ia_css_refcount.h | 0 .../css2400 => }/base/refcount/src/refcount.c | 0 .../atomisp/pci/{atomisp2/css2400 => }/bits.h | 0 .../pipe/interface/ia_css_pipe_binarydesc.h | 0 .../pipe/interface/ia_css_pipe_stagedesc.h | 0 .../camera/pipe/interface/ia_css_pipe_util.h | 0 .../camera/pipe/src/pipe_binarydesc.c | 0 .../camera/pipe/src/pipe_stagedesc.c | 0 .../css2400 => }/camera/pipe/src/pipe_util.c | 0 .../camera/util/interface/ia_css_util.h | 0 .../css2400 => }/camera/util/src/util.c | 0 .../pci/{atomisp2/css2400 => }/cell_params.h | 0 .../ia_css_isp_configs.c | 0 .../ia_css_isp_params.c | 0 .../ia_css_isp_states.c | 0 .../hrt/hive_isp_css_irq_types_hrt.h | 0 .../hrt/isp2400_mamoiada_params.h | 0 .../css2400 => }/css_2400_system/spmem_dump.c | 0 .../css_2401_csi2p_system/csi_rx_global.h | 0 .../ia_css_isp_configs.c | 0 .../ia_css_isp_params.c | 0 .../ia_css_isp_states.c | 0 .../css_2401_csi2p_system/host/csi_rx.c | 0 .../css_2401_csi2p_system/host/csi_rx_local.h | 0 .../host/csi_rx_private.h | 0 .../css_2401_csi2p_system/host/ibuf_ctrl.c | 0 .../host/ibuf_ctrl_local.h | 0 .../host/ibuf_ctrl_private.h | 0 .../css_2401_csi2p_system/host/isys_dma.c | 0 .../host/isys_dma_local.h | 0 .../host/isys_dma_private.h | 0 .../css_2401_csi2p_system/host/isys_irq.c | 0 .../host/isys_irq_local.h | 0 .../host/isys_irq_private.h | 0 .../host/isys_stream2mmio.c | 0 .../host/isys_stream2mmio_local.h | 0 .../host/isys_stream2mmio_private.h | 0 .../host/pixelgen_local.h | 0 .../host/pixelgen_private.h | 0 .../hrt/PixelGen_SysBlock_defs.h | 0 .../hrt/ibuf_cntrl_defs.h | 0 .../hrt/mipi_backend_common_defs.h | 0 .../hrt/mipi_backend_defs.h | 0 .../css_2401_csi2p_system/hrt/rx_csi_defs.h | 0 .../hrt/stream2mmio_defs.h | 0 .../css_2401_csi2p_system/ibuf_ctrl_global.h | 0 .../css_2401_csi2p_system/isys_dma_global.h | 0 .../css_2401_csi2p_system/isys_irq_global.h | 0 .../isys_stream2mmio_global.h | 0 .../css_2401_csi2p_system/pixelgen_global.h | 0 .../css_2401_csi2p_system/spmem_dump.c | 0 .../ia_css_isp_configs.c | 0 .../ia_css_isp_params.c | 0 .../ia_css_isp_states.c | 0 .../css2400 => }/css_2401_system/spmem_dump.c | 0 .../css_receiver_2400_common_defs.h | 0 .../css2400 => }/css_receiver_2400_defs.h | 0 .../pci/{atomisp2/css2400 => }/css_trace.h | 0 .../atomisp/pci/{atomisp2/css2400 => }/defs.h | 0 .../pci/{atomisp2/css2400 => }/dma_v2_defs.h | 0 .../pci/{atomisp2/css2400 => }/gdc_v2_defs.h | 0 .../{atomisp2/css2400 => }/gp_timer_defs.h | 0 .../{atomisp2/css2400 => }/gpio_block_defs.h | 0 .../hive_isp_css_2401_irq_types_hrt.h | 0 .../hive_isp_css_common/debug_global.h | 0 .../hive_isp_css_common/dma_global.h | 0 .../hive_isp_css_common/event_fifo_global.h | 0 .../hive_isp_css_common/fifo_monitor_global.h | 0 .../hive_isp_css_common/gdc_global.h | 0 .../hive_isp_css_common/gp_device_global.h | 0 .../hive_isp_css_common/gp_timer_global.h | 0 .../hive_isp_css_common/gpio_global.h | 0 .../hive_isp_css_common/hmem_global.h | 0 .../hive_isp_css_common/host/debug.c | 0 .../hive_isp_css_common/host/debug_local.h | 0 .../hive_isp_css_common/host/debug_private.h | 0 .../hive_isp_css_common/host/dma.c | 0 .../hive_isp_css_common/host/dma_local.h | 0 .../hive_isp_css_common/host/dma_private.h | 0 .../hive_isp_css_common/host/event_fifo.c | 0 .../host/event_fifo_local.h | 0 .../host/event_fifo_private.h | 0 .../hive_isp_css_common/host/fifo_monitor.c | 0 .../host/fifo_monitor_local.h | 0 .../host/fifo_monitor_private.h | 0 .../hive_isp_css_common/host/gdc.c | 0 .../hive_isp_css_common/host/gdc_local.h | 0 .../hive_isp_css_common/host/gdc_private.h | 0 .../hive_isp_css_common/host/gp_device.c | 0 .../host/gp_device_local.h | 0 .../host/gp_device_private.h | 0 .../hive_isp_css_common/host/gp_timer.c | 0 .../hive_isp_css_common/host/gp_timer_local.h | 0 .../host/gp_timer_private.h | 0 .../hive_isp_css_common/host/gpio_local.h | 0 .../hive_isp_css_common/host/gpio_private.h | 0 .../hive_isp_css_common/host/hmem.c | 0 .../hive_isp_css_common/host/hmem_local.h | 0 .../hive_isp_css_common/host/hmem_private.h | 0 .../host/input_formatter.c | 0 .../host/input_formatter_local.h | 0 .../host/input_formatter_private.h | 0 .../hive_isp_css_common/host/input_system.c | 0 .../hive_isp_css_common/host/irq.c | 0 .../hive_isp_css_common/host/irq_local.h | 0 .../hive_isp_css_common/host/irq_private.h | 0 .../hive_isp_css_common/host/isp.c | 0 .../hive_isp_css_common/host/isp_local.h | 0 .../hive_isp_css_common/host/isp_private.h | 0 .../hive_isp_css_common/host/mmu.c | 0 .../hive_isp_css_common/host/mmu_local.h | 0 .../hive_isp_css_common/host/sp.c | 0 .../hive_isp_css_common/host/sp_local.h | 0 .../hive_isp_css_common/host/sp_private.h | 0 .../hive_isp_css_common/host/timed_ctrl.c | 0 .../host/timed_ctrl_local.h | 0 .../host/timed_ctrl_private.h | 0 .../hive_isp_css_common/host/vamem_local.h | 0 .../hive_isp_css_common/host/vmem.c | 0 .../hive_isp_css_common/host/vmem_local.h | 0 .../hive_isp_css_common/host/vmem_private.h | 0 .../input_formatter_global.h | 0 .../hive_isp_css_common/irq_global.h | 0 .../hive_isp_css_common/isp_global.h | 0 .../hive_isp_css_common/mmu_global.h | 0 .../hive_isp_css_common/sp_global.h | 0 .../hive_isp_css_common/timed_ctrl_global.h | 0 .../hive_isp_css_common/vamem_global.h | 0 .../hive_isp_css_common/vmem_global.h | 0 .../css2400 => }/hive_isp_css_defs.h | 0 .../hive_isp_css_include/assert_support.h | 0 .../hive_isp_css_include/bitop_support.h | 0 .../hive_isp_css_include/csi_rx.h | 0 .../css2400 => }/hive_isp_css_include/debug.h | 0 .../device_access/device_access.h | 0 .../css2400 => }/hive_isp_css_include/dma.h | 0 .../hive_isp_css_include/error_support.h | 0 .../hive_isp_css_include/event_fifo.h | 0 .../hive_isp_css_include/fifo_monitor.h | 0 .../hive_isp_css_include/gdc_device.h | 0 .../hive_isp_css_include/gp_device.h | 0 .../hive_isp_css_include/gp_timer.h | 0 .../css2400 => }/hive_isp_css_include/gpio.h | 0 .../css2400 => }/hive_isp_css_include/hmem.h | 0 .../hive_isp_css_include/host/csi_rx_public.h | 0 .../hive_isp_css_include/host/debug_public.h | 0 .../hive_isp_css_include/host/dma_public.h | 0 .../host/event_fifo_public.h | 0 .../host/fifo_monitor_public.h | 0 .../hive_isp_css_include/host/gdc_public.h | 0 .../host/gp_device_public.h | 0 .../host/gp_timer_public.h | 0 .../hive_isp_css_include/host/gpio_public.h | 0 .../hive_isp_css_include/host/hmem_public.h | 0 .../host/ibuf_ctrl_public.h | 0 .../host/input_formatter_public.h | 0 .../hive_isp_css_include/host/irq_public.h | 0 .../hive_isp_css_include/host/isp_public.h | 0 .../host/isys_dma_public.h | 0 .../host/isys_irq_public.h | 0 .../hive_isp_css_include/host/isys_public.h | 0 .../host/isys_stream2mmio_public.h | 0 .../hive_isp_css_include/host/mmu_public.h | 0 .../host/pixelgen_public.h | 0 .../hive_isp_css_include/host/sp_public.h | 0 .../hive_isp_css_include/host/tag_public.h | 0 .../host/timed_ctrl_public.h | 0 .../hive_isp_css_include/host/vamem_public.h | 0 .../hive_isp_css_include/host/vmem_public.h | 0 .../hive_isp_css_include/ibuf_ctrl.h | 0 .../hive_isp_css_include/input_formatter.h | 0 .../hive_isp_css_include/input_system.h | 0 .../css2400 => }/hive_isp_css_include/irq.h | 0 .../css2400 => }/hive_isp_css_include/isp.h | 0 .../hive_isp_css_include/isys_dma.h | 0 .../hive_isp_css_include/isys_irq.h | 0 .../hive_isp_css_include/isys_stream2mmio.h | 0 .../hive_isp_css_include/math_support.h | 0 .../memory_access/memory_access.h | 0 .../hive_isp_css_include/memory_realloc.h | 0 .../hive_isp_css_include/misc_support.h | 0 .../hive_isp_css_include/mmu_device.h | 0 .../hive_isp_css_include/pixelgen.h | 0 .../hive_isp_css_include/platform_support.h | 0 .../hive_isp_css_include/print_support.h | 0 .../css2400 => }/hive_isp_css_include/queue.h | 0 .../hive_isp_css_include/resource.h | 0 .../css2400 => }/hive_isp_css_include/sp.h | 0 .../hive_isp_css_include/string_support.h | 0 .../hive_isp_css_include/system_types.h | 0 .../css2400 => }/hive_isp_css_include/tag.h | 0 .../hive_isp_css_include/timed_ctrl.h | 0 .../hive_isp_css_include/type_support.h | 0 .../css2400 => }/hive_isp_css_include/vamem.h | 0 .../css2400 => }/hive_isp_css_include/vmem.h | 0 .../hive_isp_css_shared/host/queue_local.h | 0 .../hive_isp_css_shared/host/queue_private.h | 0 .../hive_isp_css_shared/host/tag.c | 0 .../hive_isp_css_shared/host/tag_local.h | 0 .../hive_isp_css_shared/host/tag_private.h | 0 .../hive_isp_css_shared/queue_global.h | 0 .../hive_isp_css_shared/sw_event_global.h | 0 .../hive_isp_css_shared/tag_global.h | 0 ...hive_isp_css_streaming_to_mipi_types_hrt.h | 0 .../pci/{atomisp2/css2400 => }/hive_types.h | 0 .../atomisp/pci/{atomisp2 => }/hmm/hmm.c | 0 .../atomisp/pci/{atomisp2 => }/hmm/hmm_bo.c | 0 .../pci/{atomisp2 => }/hmm/hmm_dynamic_pool.c | 0 .../{atomisp2 => }/hmm/hmm_reserved_pool.c | 0 .../atomisp/pci/{atomisp2 => }/hmm/hmm_vm.c | 0 .../hrt/hive_isp_css_custom_host_hrt.h | 0 .../{atomisp2 => }/hrt/hive_isp_css_mm_hrt.c | 0 .../{atomisp2 => }/hrt/hive_isp_css_mm_hrt.h | 0 .../pci/{atomisp2/css2400 => }/ia_css.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_3a.h | 0 .../{atomisp2/css2400 => }/ia_css_acc_types.h | 0 .../{atomisp2/css2400 => }/ia_css_buffer.h | 0 .../{atomisp2/css2400 => }/ia_css_control.h | 0 .../css2400 => }/ia_css_device_access.c | 0 .../css2400 => }/ia_css_device_access.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_dvs.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_env.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_err.h | 0 .../css2400 => }/ia_css_event_public.h | 0 .../{atomisp2/css2400 => }/ia_css_firmware.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_frac.h | 0 .../css2400 => }/ia_css_frame_format.h | 0 .../css2400 => }/ia_css_frame_public.h | 0 .../{atomisp2/css2400 => }/ia_css_host_data.h | 0 .../css2400 => }/ia_css_input_port.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_irq.h | 0 .../css2400 => }/ia_css_isp_configs.h | 0 .../css2400 => }/ia_css_isp_params.h | 0 .../css2400 => }/ia_css_isp_states.h | 0 .../css2400 => }/ia_css_memory_access.c | 0 .../{atomisp2/css2400 => }/ia_css_metadata.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_mipi.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_mmu.h | 0 .../css2400 => }/ia_css_mmu_private.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_morph.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_pipe.h | 0 .../css2400 => }/ia_css_pipe_public.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_prbs.h | 0 .../css2400 => }/ia_css_properties.h | 0 .../{atomisp2/css2400 => }/ia_css_shading.h | 0 .../{atomisp2/css2400 => }/ia_css_stream.h | 0 .../css2400 => }/ia_css_stream_format.h | 0 .../css2400 => }/ia_css_stream_public.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_timer.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_tpg.h | 0 .../pci/{atomisp2/css2400 => }/ia_css_types.h | 0 .../{atomisp2/css2400 => }/ia_css_version.h | 0 .../css2400 => }/ia_css_version_data.h | 0 .../pci/{atomisp2/css2400 => }/if_defs.h | 0 .../input_formatter_subsystem_defs.h | 0 .../css2400 => }/input_selector_defs.h | 0 .../css2400 => }/input_switch_2400_defs.h | 0 .../css2400 => }/input_system_ctrl_defs.h | 0 .../css2400 => }/input_system_defs.h | 0 .../css2400 => }/input_system_global.h | 0 .../css2400 => }/input_system_local.h | 0 .../css2400 => }/input_system_private.h | 0 .../css2400 => }/input_system_public.h | 0 .../css2400 => }/irq_controller_defs.h | 0 .../isp/kernels/aa/aa_2/ia_css_aa2.host.c | 0 .../isp/kernels/aa/aa_2/ia_css_aa2.host.h | 0 .../isp/kernels/aa/aa_2/ia_css_aa2_param.h | 0 .../isp/kernels/aa/aa_2/ia_css_aa2_types.h | 0 .../isp/kernels/anr/anr_1.0/ia_css_anr.host.c | 0 .../isp/kernels/anr/anr_1.0/ia_css_anr.host.h | 0 .../kernels/anr/anr_1.0/ia_css_anr_param.h | 0 .../kernels/anr/anr_1.0/ia_css_anr_types.h | 0 .../isp/kernels/anr/anr_2/ia_css_anr2.host.c | 0 .../isp/kernels/anr/anr_2/ia_css_anr2.host.h | 0 .../isp/kernels/anr/anr_2/ia_css_anr2_param.h | 0 .../anr/anr_2/ia_css_anr2_table.host.c | 0 .../anr/anr_2/ia_css_anr2_table.host.h | 0 .../isp/kernels/anr/anr_2/ia_css_anr2_types.h | 0 .../isp/kernels/bh/bh_2/ia_css_bh.host.c | 0 .../isp/kernels/bh/bh_2/ia_css_bh.host.h | 0 .../isp/kernels/bh/bh_2/ia_css_bh_param.h | 0 .../isp/kernels/bh/bh_2/ia_css_bh_types.h | 0 .../isp/kernels/bnlm/ia_css_bnlm.host.c | 0 .../isp/kernels/bnlm/ia_css_bnlm.host.h | 0 .../isp/kernels/bnlm/ia_css_bnlm_param.h | 0 .../isp/kernels/bnlm/ia_css_bnlm_types.h | 0 .../kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c | 0 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.../runtime/isys/src/isys_dma_rmgr.h | 0 .../css2400 => }/runtime/isys/src/isys_init.c | 0 .../runtime/isys/src/isys_stream2mmio_rmgr.c | 0 .../runtime/isys/src/isys_stream2mmio_rmgr.h | 0 .../css2400 => }/runtime/isys/src/rx.c | 0 .../runtime/isys/src/virtual_isys.c | 0 .../runtime/isys/src/virtual_isys.h | 0 .../pipeline/interface/ia_css_pipeline.h | 0 .../interface/ia_css_pipeline_common.h | 0 .../runtime/pipeline/src/pipeline.c | 0 .../runtime/queue/interface/ia_css_queue.h | 0 .../queue/interface/ia_css_queue_comm.h | 0 .../css2400 => }/runtime/queue/src/queue.c | 0 .../runtime/queue/src/queue_access.c | 0 .../runtime/queue/src/queue_access.h | 0 .../runtime/rmgr/interface/ia_css_rmgr.h | 0 .../runtime/rmgr/interface/ia_css_rmgr_vbuf.h | 0 .../css2400 => }/runtime/rmgr/src/rmgr.c | 0 .../css2400 => }/runtime/rmgr/src/rmgr_vbuf.c | 0 .../runtime/spctrl/interface/ia_css_spctrl.h | 0 .../spctrl/interface/ia_css_spctrl_comm.h | 0 .../css2400 => }/runtime/spctrl/src/spctrl.c | 0 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0 .../pci/{atomisp2/css2400 => }/system_local.h | 0 .../css2400 => }/timed_controller_defs.h | 0 .../pci/{atomisp2/css2400 => }/version.h | 0 654 files changed, 360 insertions(+), 372 deletions(-) rename drivers/staging/media/atomisp/{pci/atomisp2 => }/include/hmm/hmm.h (100%) rename drivers/staging/media/atomisp/{pci/atomisp2 => }/include/hmm/hmm_bo.h (100%) rename drivers/staging/media/atomisp/{pci/atomisp2 => }/include/hmm/hmm_common.h (100%) rename drivers/staging/media/atomisp/{pci/atomisp2 => }/include/hmm/hmm_pool.h (100%) rename drivers/staging/media/atomisp/{pci/atomisp2 => }/include/hmm/hmm_vm.h (100%) rename drivers/staging/media/atomisp/{pci/atomisp2 => }/include/mmu/isp_mmu.h (100%) rename drivers/staging/media/atomisp/{pci/atomisp2 => }/include/mmu/sh_mmu_mrfld.h (100%) delete mode 100644 drivers/staging/media/atomisp/pci/Kconfig delete mode 100644 drivers/staging/media/atomisp/pci/Makefile rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp-regs.h (100%) delete mode 100644 drivers/staging/media/atomisp/pci/atomisp2/Makefile rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_acc.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_acc.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_cmd.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_cmd.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_common.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_compat.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_compat_css20.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_compat_css20.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_compat_ioctl32.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_compat_ioctl32.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_csi2.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_csi2.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_dfs_tables.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_drvfs.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_drvfs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_file.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_file.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_fops.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_fops.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_helper.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_internal.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_ioctl.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_ioctl.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_subdev.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_subdev.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_tables.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_tpg.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_tpg.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_trace_event.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_v4l2.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/atomisp_v4l2.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/base/circbuf/interface/ia_css_circbuf.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/base/circbuf/interface/ia_css_circbuf_comm.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/base/circbuf/interface/ia_css_circbuf_desc.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/base/circbuf/src/circbuf.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/base/refcount/interface/ia_css_refcount.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/base/refcount/src/refcount.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/bits.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/pipe/interface/ia_css_pipe_binarydesc.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/pipe/interface/ia_css_pipe_stagedesc.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/pipe/interface/ia_css_pipe_util.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/pipe/src/pipe_binarydesc.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/pipe/src/pipe_stagedesc.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/pipe/src/pipe_util.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/util/interface/ia_css_util.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/camera/util/src/util.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/cell_params.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2400_system/hrt/isp2400_mamoiada_params.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2400_system/spmem_dump.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/csi_rx_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/csi_rx.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/csi_rx_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/csi_rx_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/ibuf_ctrl.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/ibuf_ctrl_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/ibuf_ctrl_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_dma.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_dma_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_dma_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_irq.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_irq_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_irq_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_stream2mmio.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_stream2mmio_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/isys_stream2mmio_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/pixelgen_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/host/pixelgen_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hrt/mipi_backend_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hrt/rx_csi_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/hrt/stream2mmio_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/ibuf_ctrl_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/isys_dma_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/isys_irq_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/isys_stream2mmio_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/pixelgen_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_csi2p_system/spmem_dump.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_2401_system/spmem_dump.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_receiver_2400_common_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_receiver_2400_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/css_trace.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/dma_v2_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/gdc_v2_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/gp_timer_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/gpio_block_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_2401_irq_types_hrt.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/debug_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/dma_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/event_fifo_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/fifo_monitor_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/gdc_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/gp_device_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/gp_timer_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/gpio_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/hmem_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/debug.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/debug_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/debug_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/dma.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/dma_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/dma_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/event_fifo.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/event_fifo_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/event_fifo_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/fifo_monitor.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/fifo_monitor_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/fifo_monitor_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gdc.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gdc_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gdc_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gp_device.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gp_device_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gp_device_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gp_timer.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gp_timer_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gp_timer_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gpio_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/gpio_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/hmem.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/hmem_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/hmem_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/input_formatter.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/input_formatter_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/input_formatter_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/input_system.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/irq.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/irq_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/irq_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/isp.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/isp_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/isp_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/mmu.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/mmu_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/sp.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/sp_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/sp_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/timed_ctrl.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/timed_ctrl_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/timed_ctrl_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/vamem_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/vmem.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/vmem_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/host/vmem_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/input_formatter_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/irq_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/isp_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/mmu_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/sp_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/timed_ctrl_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/vamem_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_common/vmem_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/assert_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/bitop_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/csi_rx.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/debug.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/device_access/device_access.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/dma.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/error_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/event_fifo.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/fifo_monitor.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/gdc_device.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/gp_device.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/gp_timer.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/gpio.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/hmem.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/csi_rx_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/debug_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/dma_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/event_fifo_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/fifo_monitor_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/gdc_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/gp_device_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/gp_timer_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/gpio_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/hmem_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/ibuf_ctrl_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/input_formatter_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/irq_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/isp_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/isys_dma_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/isys_irq_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/isys_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/isys_stream2mmio_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/mmu_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/pixelgen_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/sp_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/tag_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/timed_ctrl_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/vamem_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/host/vmem_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/ibuf_ctrl.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/input_formatter.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/input_system.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/irq.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/isp.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/isys_dma.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/isys_irq.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/isys_stream2mmio.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/math_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/memory_access/memory_access.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/memory_realloc.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/misc_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/mmu_device.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/pixelgen.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/platform_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/print_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/queue.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/resource.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/sp.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/string_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/system_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/tag.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/timed_ctrl.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/type_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/vamem.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_include/vmem.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/host/queue_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/host/queue_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/host/tag.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/host/tag_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/host/tag_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/queue_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/sw_event_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_shared/tag_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_isp_css_streaming_to_mipi_types_hrt.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/hive_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hmm/hmm.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hmm/hmm_bo.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hmm/hmm_dynamic_pool.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hmm/hmm_reserved_pool.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hmm/hmm_vm.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hrt/hive_isp_css_custom_host_hrt.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hrt/hive_isp_css_mm_hrt.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/hrt/hive_isp_css_mm_hrt.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_3a.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_acc_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_buffer.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_control.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_device_access.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_device_access.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_dvs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_env.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_err.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_event_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_firmware.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_frac.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_frame_format.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_frame_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_host_data.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_input_port.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_irq.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_isp_configs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_isp_params.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_isp_states.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_memory_access.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_metadata.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_mipi.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_mmu.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_mmu_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_morph.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_pipe.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_pipe_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_prbs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_properties.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_shading.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_stream.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_stream_format.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_stream_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_timer.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_tpg.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_version.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/ia_css_version_data.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/if_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_formatter_subsystem_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_selector_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_switch_2400_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_system_ctrl_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_system_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_system_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_system_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_system_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/input_system_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/irq_controller_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/aa/aa_2/ia_css_aa2.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/aa/aa_2/ia_css_aa2.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/aa/aa_2/ia_css_aa2_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/aa/aa_2/ia_css_aa2_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_1.0/ia_css_anr.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_1.0/ia_css_anr.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_1.0/ia_css_anr_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_1.0/ia_css_anr_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_2/ia_css_anr2.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_2/ia_css_anr2.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_2/ia_css_anr2_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/anr/anr_2/ia_css_anr2_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bh/bh_2/ia_css_bh.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bh/bh_2/ia_css_bh.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bh/bh_2/ia_css_bh_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bh/bh_2/ia_css_bh_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnlm/ia_css_bnlm.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnlm/ia_css_bnlm.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnlm/ia_css_bnlm_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnlm/ia_css_bnlm_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/crop/crop_1.0/ia_css_crop.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/crop/crop_1.0/ia_css_crop.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/crop/crop_1.0/ia_css_crop_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/crop/crop_1.0/ia_css_crop_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/csc/csc_1.0/ia_css_csc.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/csc/csc_1.0/ia_css_csc.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/csc/csc_1.0/ia_css_csc_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/csc/csc_1.0/ia_css_csc_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => 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drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/uds/uds_1.0/ia_css_uds_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/vf/vf_1.0/ia_css_vf.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/vf/vf_1.0/ia_css_vf.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/vf/vf_1.0/ia_css_vf_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/vf/vf_1.0/ia_css_vf_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/wb/wb_1.0/ia_css_wb.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/wb/wb_1.0/ia_css_wb.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/wb/wb_1.0/ia_css_wb_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/wb/wb_1.0/ia_css_wb_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/modes/interface/input_buf.isp.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/modes/interface/isp_const.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp/modes/interface/isp_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/isp2400_input_system_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2400_input_system_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2400_input_system_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2400_input_system_public.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2400_support.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2400_system_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2400_system_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2401_input_system_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2401_input_system_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2401_input_system_private.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2401_mamoiada_params.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2401_system_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp2401_system_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp_acquisition_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/isp_capture_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/memory_realloc.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/mmu/isp_mmu.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2 => }/mmu/sh_mmu_mrfld.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/mmu_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/binary/interface/ia_css_binary.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/binary/src/binary.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/bufq/interface/ia_css_bufq.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/bufq/interface/ia_css_bufq_comm.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/bufq/src/bufq.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/debug/interface/ia_css_debug.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/debug/interface/ia_css_debug_internal.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/debug/interface/ia_css_debug_pipe.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/debug/src/ia_css_debug.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/event/interface/ia_css_event.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/event/src/event.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/eventq/interface/ia_css_eventq.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/eventq/src/eventq.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/frame/interface/ia_css_frame.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/frame/interface/ia_css_frame_comm.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/frame/src/frame.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/ifmtr/interface/ia_css_ifmtr.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/ifmtr/src/ifmtr.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/inputfifo/interface/ia_css_inputfifo.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/inputfifo/src/inputfifo.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isp_param/interface/ia_css_isp_param.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isp_param/interface/ia_css_isp_param_types.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isp_param/src/isp_param.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/interface/ia_css_isys.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/interface/ia_css_isys_comm.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/csi_rx_rmgr.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/csi_rx_rmgr.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/ibuf_ctrl_rmgr.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/ibuf_ctrl_rmgr.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/isys_dma_rmgr.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/isys_dma_rmgr.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/isys_init.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/isys_stream2mmio_rmgr.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/isys_stream2mmio_rmgr.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/rx.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/virtual_isys.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/isys/src/virtual_isys.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/pipeline/interface/ia_css_pipeline.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/pipeline/interface/ia_css_pipeline_common.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/pipeline/src/pipeline.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/queue/interface/ia_css_queue.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/queue/interface/ia_css_queue_comm.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/queue/src/queue.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/queue/src/queue_access.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/queue/src/queue_access.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/rmgr/interface/ia_css_rmgr.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/rmgr/interface/ia_css_rmgr_vbuf.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/rmgr/src/rmgr.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/rmgr/src/rmgr_vbuf.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/spctrl/interface/ia_css_spctrl.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/spctrl/interface/ia_css_spctrl_comm.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/spctrl/src/spctrl.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/tagger/interface/ia_css_tagger_common.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/runtime/timer/src/timer.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/scalar_processor_2400_params.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_dvs_info.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_firmware.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_firmware.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_frac.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_host_data.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_hrt.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_hrt.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_internal.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_legacy.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_metadata.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_metrics.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_metrics.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_mipi.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_mipi.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_mmu.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_morph.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_param_dvs.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_param_dvs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_param_shading.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_param_shading.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_params.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_params.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_params_internal.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_pipe.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_properties.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_shading.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_sp.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_sp.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_stream.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_stream_format.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_stream_format.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_struct.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_uds.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/sh_css_version.c (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/str2mem_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/streaming_to_mipi_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/system_global.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/system_local.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/timed_controller_defs.h (100%) rename drivers/staging/media/atomisp/pci/{atomisp2/css2400 => }/version.h (100%) diff --git a/drivers/staging/media/atomisp/Kconfig b/drivers/staging/media/atomisp/Kconfig index 397745ebcd568..dce6dd9bd7e1b 100644 --- a/drivers/staging/media/atomisp/Kconfig +++ b/drivers/staging/media/atomisp/Kconfig @@ -1,5 +1,5 @@ menuconfig INTEL_ATOMISP - bool "Enable support to Intel MIPI camera drivers" + bool "Enable support to Intel Atom ISP camera drivers" depends on X86 && EFI && PCI && ACPI select IOSF_MBI select MEDIA_CONTROLLER @@ -8,7 +8,17 @@ menuconfig INTEL_ATOMISP Enable support for the Intel ISP2 camera interfaces and MIPI sensor drivers. +config VIDEO_ATOMISP + tristate "Intel Atom Image Signal Processor Driver" + depends on VIDEO_V4L2 && INTEL_ATOMISP + select IOSF_MBI + select VIDEOBUF_VMALLOC + ---help--- + Say Y here if your platform supports Intel Atom SoC + camera imaging subsystem. + To compile this driver as a module, choose M here: the + module will be called atomisp + if INTEL_ATOMISP -source "drivers/staging/media/atomisp/pci/Kconfig" source "drivers/staging/media/atomisp/i2c/Kconfig" endif diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 403fe5edff6d4..f09554f2afcc7 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -1,6 +1,352 @@ # # Makefile for camera drivers. # -obj-$(CONFIG_INTEL_ATOMISP) += pci/ obj-$(CONFIG_INTEL_ATOMISP) += i2c/ obj-$(CONFIG_INTEL_ATOMISP) += platform/ +obj-$(CONFIG_VIDEO_ATOMISP) += atomisp.o + +atomisp = $(srctree)/drivers/staging/media/atomisp/ + +# SPDX-License-Identifier: GPL-2.0 +atomisp-objs += \ + pci/atomisp_acc.o \ + pci/atomisp_cmd.o \ + pci/atomisp_compat_css20.o \ + pci/atomisp_compat_ioctl32.o \ + pci/atomisp_csi2.o \ + pci/atomisp_drvfs.o \ + pci/atomisp_file.o \ + pci/atomisp_fops.o \ + pci/atomisp_ioctl.o \ + pci/atomisp_subdev.o \ + pci/atomisp_tpg.o \ + pci/atomisp_v4l2.o \ + pci/sh_css_firmware.o \ + pci/sh_css_host_data.o \ + pci/sh_css_hrt.o \ + pci/sh_css_metadata.o \ + pci/sh_css_metrics.o \ + pci/sh_css_mipi.o \ + pci/sh_css_mmu.o \ + pci/sh_css_morph.o \ + pci/sh_css.o \ + pci/sh_css_param_dvs.o \ + pci/sh_css_param_shading.o \ + pci/sh_css_params.o \ + pci/sh_css_pipe.o \ + pci/sh_css_properties.o \ + pci/sh_css_shading.o \ + pci/sh_css_sp.o \ + pci/sh_css_stream_format.o \ + pci/sh_css_stream.o \ + pci/sh_css_version.o \ + pci/base/circbuf/src/circbuf.o \ + pci/base/refcount/src/refcount.o \ + pci/camera/pipe/src/pipe_binarydesc.o \ + pci/camera/pipe/src/pipe_stagedesc.o \ + pci/camera/pipe/src/pipe_util.o \ + pci/camera/util/src/util.o \ + pci/hmm/hmm_bo.o \ + pci/hmm/hmm_dynamic_pool.o \ + pci/hmm/hmm.o \ + pci/hmm/hmm_reserved_pool.o \ + pci/hmm/hmm_vm.o \ + pci/hrt/hive_isp_css_mm_hrt.o \ + pci/ia_css_device_access.o \ + pci/ia_css_memory_access.o \ + pci/isp/kernels/aa/aa_2/ia_css_aa2.host.o \ + pci/isp/kernels/anr/anr_1.0/ia_css_anr.host.o \ + pci/isp/kernels/anr/anr_2/ia_css_anr2.host.o \ + pci/isp/kernels/anr/anr_2/ia_css_anr2_table.host.o \ + pci/isp/kernels/bh/bh_2/ia_css_bh.host.o \ + pci/isp/kernels/bnlm/ia_css_bnlm.host.o \ + pci/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.o \ + pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.o \ + pci/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.o \ + pci/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.o \ + pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.o \ + pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.o \ + pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.o \ + pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.o \ + pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.o \ + pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.o \ + pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.o \ + pci/isp/kernels/ctc/ctc2/ia_css_ctc2.host.o \ + pci/isp/kernels/de/de_1.0/ia_css_de.host.o \ + pci/isp/kernels/de/de_2/ia_css_de2.host.o \ + pci/isp/kernels/dpc2/ia_css_dpc2.host.o \ + pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.o \ + pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.o \ + pci/isp/kernels/eed1_8/ia_css_eed1_8.host.o \ + pci/isp/kernels/fc/fc_1.0/ia_css_formats.host.o \ + pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.o \ + pci/isp/kernels/gc/gc_1.0/ia_css_gc.host.o \ + pci/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.o \ + pci/isp/kernels/gc/gc_2/ia_css_gc2.host.o \ + pci/isp/kernels/gc/gc_2/ia_css_gc2_table.host.o \ + pci/isp/kernels/hdr/ia_css_hdr.host.o \ + pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ + pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ + pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.o \ + pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.o \ + pci/isp/kernels/macc/macc_1.0/ia_css_macc.host.o \ + pci/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.o \ + pci/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.o \ + pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.o \ + pci/isp/kernels/norm/norm_1.0/ia_css_norm.host.o \ + pci/isp/kernels/ob/ob_1.0/ia_css_ob.host.o \ + pci/isp/kernels/ob/ob2/ia_css_ob2.host.o \ + pci/isp/kernels/output/output_1.0/ia_css_output.host.o \ + pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.o \ + pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.o \ + pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.o \ + pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.o \ + pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.o \ + pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.o \ + pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.o \ + pci/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.o \ + pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.o \ + pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.o \ + pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.o \ + pci/isp/kernels/wb/wb_1.0/ia_css_wb.host.o \ + pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.o \ + pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.o \ + pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.o \ + pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.o \ + pci/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.o \ + pci/memory_realloc.o \ + pci/mmu/isp_mmu.o \ + pci/mmu/sh_mmu_mrfld.o \ + pci/runtime/binary/src/binary.o \ + pci/runtime/bufq/src/bufq.o \ + pci/runtime/debug/src/ia_css_debug.o \ + pci/runtime/eventq/src/eventq.o \ + pci/runtime/event/src/event.o \ + pci/runtime/frame/src/frame.o \ + pci/runtime/ifmtr/src/ifmtr.o \ + pci/runtime/inputfifo/src/inputfifo.o \ + pci/runtime/isp_param/src/isp_param.o \ + pci/runtime/isys/src/csi_rx_rmgr.o \ + pci/runtime/isys/src/ibuf_ctrl_rmgr.o \ + pci/runtime/isys/src/isys_dma_rmgr.o \ + pci/runtime/isys/src/isys_init.o \ + pci/runtime/isys/src/isys_stream2mmio_rmgr.o \ + pci/runtime/isys/src/rx.o \ + pci/runtime/isys/src/virtual_isys.o \ + pci/runtime/pipeline/src/pipeline.o \ + pci/runtime/queue/src/queue_access.o \ + pci/runtime/queue/src/queue.o \ + pci/runtime/rmgr/src/rmgr.o \ + pci/runtime/rmgr/src/rmgr_vbuf.o \ + pci/runtime/spctrl/src/spctrl.o \ + pci/runtime/timer/src/timer.o \ + pci/hive_isp_css_common/host/debug.o \ + pci/hive_isp_css_common/host/dma.o \ + pci/hive_isp_css_common/host/event_fifo.o \ + pci/hive_isp_css_common/host/fifo_monitor.o \ + pci/hive_isp_css_common/host/gdc.o \ + pci/hive_isp_css_common/host/gp_device.o \ + pci/hive_isp_css_common/host/gp_timer.o \ + pci/hive_isp_css_common/host/hmem.o \ + pci/hive_isp_css_common/host/input_formatter.o \ + pci/hive_isp_css_common/host/input_system.o \ + pci/hive_isp_css_common/host/irq.o \ + pci/hive_isp_css_common/host/isp.o \ + pci/hive_isp_css_common/host/mmu.o \ + pci/hive_isp_css_common/host/sp.o \ + pci/hive_isp_css_common/host/timed_ctrl.o \ + pci/hive_isp_css_common/host/vmem.o \ + pci/hive_isp_css_shared/host/tag.o \ + pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.o \ + pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.o \ + pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.o \ + pci/css_2400_system/spmem_dump.o \ + +# These will be needed when clean merge CHT support nicely into the driver +# Keep them here handy for when we get to that point +# + +obj-cht= \ + pci/css_2401_system/spmem_dump.o \ + pci/css_2401_csi2p_system/spmem_dump.o \ + pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.o \ + pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.o \ + pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.o \ + pci/css_2401_csi2p_system/host/csi_rx.o \ + pci/css_2401_csi2p_system/host/ibuf_ctrl.o \ + pci/css_2401_csi2p_system/host/isys_dma.o \ + pci/css_2401_csi2p_system/host/isys_irq.o \ + pci/css_2401_csi2p_system/host/isys_stream2mmio.o \ + pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.o \ + pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.o \ + pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.o \ + +# -I$(atomisp)/pci/css_2401_system/hrt/ \ +# -I$(atomisp)/pci/css_2401_csi2p_system/ \ +# -I$(atomisp)/pci/css_2401_csi2p_system/host/ \ +# -I$(atomisp)/pci/css_2401_csi2p_system/hrt/ \ +# -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \ +# -I$(atomisp)/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ \ + +INCLUDES += \ + -I$(atomisp)/ \ + -I$(atomisp)/include/ \ + -I$(atomisp)/include/hmm/ \ + -I$(atomisp)/include/mmu/ \ + -I$(atomisp)/pci/ \ + -I$(atomisp)/pci/hrt/ \ + -I$(atomisp)/pci/base/circbuf/interface/ \ + -I$(atomisp)/pci/base/refcount/interface/ \ + -I$(atomisp)/pci/camera/pipe/interface/ \ + -I$(atomisp)/pci/camera/util/interface/ \ + -I$(atomisp)/pci/css_2400_system/ \ + -I$(atomisp)/pci/css_2400_system/hive_isp_css_2400_system_generated/ \ + -I$(atomisp)/pci/css_2400_system/hrt/ \ + -I$(atomisp)/pci/hive_isp_css_common/ \ + -I$(atomisp)/pci/hive_isp_css_common/host/ \ + -I$(atomisp)/pci/hive_isp_css_include/ \ + -I$(atomisp)/pci/hive_isp_css_include/device_access/ \ + -I$(atomisp)/pci/hive_isp_css_include/host/ \ + -I$(atomisp)/pci/hive_isp_css_include/memory_access/ \ + -I$(atomisp)/pci/hive_isp_css_shared/ \ + -I$(atomisp)/pci/hive_isp_css_shared/host/ \ + -I$(atomisp)/pci/isp/kernels/ \ + -I$(atomisp)/pci/isp/kernels/aa/aa_2/ \ + -I$(atomisp)/pci/isp/kernels/anr/anr_1.0/ \ + -I$(atomisp)/pci/isp/kernels/anr/anr_2/ \ + -I$(atomisp)/pci/isp/kernels/bh/bh_2/ \ + -I$(atomisp)/pci/isp/kernels/bnlm/ \ + -I$(atomisp)/pci/isp/kernels/bnr/ \ + -I$(atomisp)/pci/isp/kernels/bnr/bnr_1.0/ \ + -I$(atomisp)/pci/isp/kernels/bnr/bnr2_2/ \ + -I$(atomisp)/pci/isp/kernels/cnr/ \ + -I$(atomisp)/pci/isp/kernels/cnr/cnr_1.0/ \ + -I$(atomisp)/pci/isp/kernels/cnr/cnr_2/ \ + -I$(atomisp)/pci/isp/kernels/conversion/ \ + -I$(atomisp)/pci/isp/kernels/conversion/conversion_1.0/ \ + -I$(atomisp)/pci/isp/kernels/copy_output/ \ + -I$(atomisp)/pci/isp/kernels/copy_output/copy_output_1.0/ \ + -I$(atomisp)/pci/isp/kernels/crop/ \ + -I$(atomisp)/pci/isp/kernels/crop/crop_1.0/ \ + -I$(atomisp)/pci/isp/kernels/csc/ \ + -I$(atomisp)/pci/isp/kernels/csc/csc_1.0/ \ + -I$(atomisp)/pci/isp/kernels/ctc/ \ + -I$(atomisp)/pci/isp/kernels/ctc/ctc_1.0/ \ + -I$(atomisp)/pci/isp/kernels/ctc/ctc1_5/ \ + -I$(atomisp)/pci/isp/kernels/ctc/ctc2/ \ + -I$(atomisp)/pci/isp/kernels/de/ \ + -I$(atomisp)/pci/isp/kernels/de/de_1.0/ \ + -I$(atomisp)/pci/isp/kernels/de/de_2/ \ + -I$(atomisp)/pci/isp/kernels/dp/ \ + -I$(atomisp)/pci/isp/kernels/dpc2/ \ + -I$(atomisp)/pci/isp/kernels/dp/dp_1.0/ \ + -I$(atomisp)/pci/isp/kernels/dvs/ \ + -I$(atomisp)/pci/isp/kernels/dvs/dvs_1.0/ \ + -I$(atomisp)/pci/isp/kernels/eed1_8/ \ + -I$(atomisp)/pci/isp/kernels/fc/ \ + -I$(atomisp)/pci/isp/kernels/fc/fc_1.0/ \ + -I$(atomisp)/pci/isp/kernels/fixedbds/ \ + -I$(atomisp)/pci/isp/kernels/fixedbds/fixedbds_1.0/ \ + -I$(atomisp)/pci/isp/kernels/fpn/ \ + -I$(atomisp)/pci/isp/kernels/fpn/fpn_1.0/ \ + -I$(atomisp)/pci/isp/kernels/gc/ \ + -I$(atomisp)/pci/isp/kernels/gc/gc_1.0/ \ + -I$(atomisp)/pci/isp/kernels/gc/gc_2/ \ + -I$(atomisp)/pci/isp/kernels/hdr/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/common/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/common/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ \ + -I$(atomisp)/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ \ + -I$(atomisp)/pci/isp/kernels/iterator/ \ + -I$(atomisp)/pci/isp/kernels/iterator/iterator_1.0/ \ + -I$(atomisp)/pci/isp/kernels/macc/ \ + -I$(atomisp)/pci/isp/kernels/macc/macc_1.0/ \ + -I$(atomisp)/pci/isp/kernels/macc/macc1_5/ \ + -I$(atomisp)/pci/isp/kernels/norm/ \ + -I$(atomisp)/pci/isp/kernels/norm/norm_1.0/ \ + -I$(atomisp)/pci/isp/kernels/ob/ \ + -I$(atomisp)/pci/isp/kernels/ob/ob_1.0/ \ + -I$(atomisp)/pci/isp/kernels/ob/ob2/ \ + -I$(atomisp)/pci/isp/kernels/output/ \ + -I$(atomisp)/pci/isp/kernels/output/output_1.0/ \ + -I$(atomisp)/pci/isp/kernels/qplane/ \ + -I$(atomisp)/pci/isp/kernels/qplane/qplane_2/ \ + -I$(atomisp)/pci/isp/kernels/raw/ \ + -I$(atomisp)/pci/isp/kernels/raw_aa_binning/ \ + -I$(atomisp)/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ \ + -I$(atomisp)/pci/isp/kernels/raw/raw_1.0/ \ + -I$(atomisp)/pci/isp/kernels/ref/ \ + -I$(atomisp)/pci/isp/kernels/ref/ref_1.0/ \ + -I$(atomisp)/pci/isp/kernels/s3a/ \ + -I$(atomisp)/pci/isp/kernels/s3a/s3a_1.0/ \ + -I$(atomisp)/pci/isp/kernels/sc/ \ + -I$(atomisp)/pci/isp/kernels/sc/sc_1.0/ \ + -I$(atomisp)/pci/isp/kernels/sdis/ \ + -I$(atomisp)/pci/isp/kernels/sdis/common/ \ + -I$(atomisp)/pci/isp/kernels/sdis/sdis_1.0/ \ + -I$(atomisp)/pci/isp/kernels/sdis/sdis_2/ \ + -I$(atomisp)/pci/isp/kernels/tdf/ \ + -I$(atomisp)/pci/isp/kernels/tdf/tdf_1.0/ \ + -I$(atomisp)/pci/isp/kernels/tnr/ \ + -I$(atomisp)/pci/isp/kernels/tnr/tnr_1.0/ \ + -I$(atomisp)/pci/isp/kernels/tnr/tnr3/ \ + -I$(atomisp)/pci/isp/kernels/uds/ \ + -I$(atomisp)/pci/isp/kernels/uds/uds_1.0/ \ + -I$(atomisp)/pci/isp/kernels/vf/ \ + -I$(atomisp)/pci/isp/kernels/vf/vf_1.0/ \ + -I$(atomisp)/pci/isp/kernels/wb/ \ + -I$(atomisp)/pci/isp/kernels/wb/wb_1.0/ \ + -I$(atomisp)/pci/isp/kernels/xnr/ \ + -I$(atomisp)/pci/isp/kernels/xnr/xnr_1.0/ \ + -I$(atomisp)/pci/isp/kernels/xnr/xnr_3.0/ \ + -I$(atomisp)/pci/isp/kernels/ynr/ \ + -I$(atomisp)/pci/isp/kernels/ynr/ynr_1.0/ \ + -I$(atomisp)/pci/isp/kernels/ynr/ynr_2/ \ + -I$(atomisp)/pci/isp/modes/interface/ \ + -I$(atomisp)/pci/runtime/binary/interface/ \ + -I$(atomisp)/pci/runtime/bufq/interface/ \ + -I$(atomisp)/pci/runtime/debug/interface/ \ + -I$(atomisp)/pci/runtime/event/interface/ \ + -I$(atomisp)/pci/runtime/eventq/interface/ \ + -I$(atomisp)/pci/runtime/frame/interface/ \ + -I$(atomisp)/pci/runtime/ifmtr/interface/ \ + -I$(atomisp)/pci/runtime/inputfifo/interface/ \ + -I$(atomisp)/pci/runtime/isp_param/interface/ \ + -I$(atomisp)/pci/runtime/isys/interface/ \ + -I$(atomisp)/pci/runtime/isys/src/ \ + -I$(atomisp)/pci/runtime/pipeline/interface/ \ + -I$(atomisp)/pci/runtime/queue/interface/ \ + -I$(atomisp)/pci/runtime/queue/src/ \ + -I$(atomisp)/pci/runtime/rmgr/interface/ \ + -I$(atomisp)/pci/runtime/spctrl/interface/ \ + -I$(atomisp)/pci/runtime/tagger/interface/ + +ifeq ($(CONFIG_ION),y) +INCLUDES += -I$(srctree)/drivers/staging/android/ion +endif + +DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__ +#DEFINES += -DUSE_DYNAMIC_BIN +#DEFINES += -DISP_POWER_GATING +#DEFINES += -DUSE_INTERRUPTS +#DEFINES += -DUSE_SSSE3 +#DEFINES += -DPUNIT_CAMERA_BUSY +#DEFINES += -DUSE_KMEM_CACHE + +DEFINES += -DATOMISP_POSTFIX=\"css2400b0_v21\" +DEFINES += -DSYSTEM_hive_isp_css_2400_system -DISP2400 + +ccflags-y += $(INCLUDES) $(DEFINES) -fno-common + +# HACK! While this driver is in bad shape, don't enable several warnings +# that would be otherwise enabled with W=1 +ccflags-y += $(call cc-disable-warning, implicit-fallthrough) +ccflags-y += $(call cc-disable-warning, missing-prototypes) +ccflags-y += $(call cc-disable-warning, missing-declarations) +ccflags-y += $(call cc-disable-warning, suggest-attribute=format) +ccflags-y += $(call cc-disable-warning, unused-const-variable) +ccflags-y += $(call cc-disable-warning, unused-but-set-variable) diff --git a/drivers/staging/media/atomisp/TODO b/drivers/staging/media/atomisp/TODO index 255ce3630c2a4..e2fba1ca0a120 100644 --- a/drivers/staging/media/atomisp/TODO +++ b/drivers/staging/media/atomisp/TODO @@ -26,7 +26,7 @@ 7. The ISP code depends on the exact FW version. The version defined in BYT: - drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c + drivers/staging/media/atomisp/pci/atomisp2/pci/sh_css_firmware.c static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); CHT: drivers/staging/media/atomisp/pci/atomisp2/css/sh_css_firmware.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h b/drivers/staging/media/atomisp/include/hmm/hmm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm.h rename to drivers/staging/media/atomisp/include/hmm/hmm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h b/drivers/staging/media/atomisp/include/hmm/hmm_bo.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_bo.h rename to drivers/staging/media/atomisp/include/hmm/hmm_bo.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_common.h b/drivers/staging/media/atomisp/include/hmm/hmm_common.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_common.h rename to drivers/staging/media/atomisp/include/hmm/hmm_common.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h b/drivers/staging/media/atomisp/include/hmm/hmm_pool.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_pool.h rename to drivers/staging/media/atomisp/include/hmm/hmm_pool.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h b/drivers/staging/media/atomisp/include/hmm/hmm_vm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/include/hmm/hmm_vm.h rename to drivers/staging/media/atomisp/include/hmm/hmm_vm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h b/drivers/staging/media/atomisp/include/mmu/isp_mmu.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/include/mmu/isp_mmu.h rename to drivers/staging/media/atomisp/include/mmu/isp_mmu.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/include/mmu/sh_mmu_mrfld.h b/drivers/staging/media/atomisp/include/mmu/sh_mmu_mrfld.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/include/mmu/sh_mmu_mrfld.h rename to drivers/staging/media/atomisp/include/mmu/sh_mmu_mrfld.h diff --git a/drivers/staging/media/atomisp/pci/Kconfig b/drivers/staging/media/atomisp/pci/Kconfig deleted file mode 100644 index 41f116d520609..0000000000000 --- a/drivers/staging/media/atomisp/pci/Kconfig +++ /dev/null @@ -1,14 +0,0 @@ -# -# Kconfig for ISP driver -# - -config VIDEO_ATOMISP - tristate "Intel Atom Image Signal Processor Driver" - depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API - select IOSF_MBI - select VIDEOBUF_VMALLOC - ---help--- - Say Y here if your platform supports Intel Atom SoC - camera imaging subsystem. - To compile this driver as a module, choose M here: the - module will be called atomisp diff --git a/drivers/staging/media/atomisp/pci/Makefile b/drivers/staging/media/atomisp/pci/Makefile deleted file mode 100644 index 61ad1fbb1ee60..0000000000000 --- a/drivers/staging/media/atomisp/pci/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for ISP driver -# - -obj-$(CONFIG_VIDEO_ATOMISP) += atomisp2/ diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h b/drivers/staging/media/atomisp/pci/atomisp-regs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp-regs.h rename to drivers/staging/media/atomisp/pci/atomisp-regs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/Makefile b/drivers/staging/media/atomisp/pci/atomisp2/Makefile deleted file mode 100644 index 06f52fb1d38fa..0000000000000 --- a/drivers/staging/media/atomisp/pci/atomisp2/Makefile +++ /dev/null @@ -1,349 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -atomisp-objs += \ - atomisp_drvfs.o \ - atomisp_file.o \ - css2400/sh_css_mipi.o \ - css2400/runtime/pipeline/src/pipeline.o \ - css2400/runtime/spctrl/src/spctrl.o \ - css2400/runtime/rmgr/src/rmgr.o \ - css2400/runtime/rmgr/src/rmgr_vbuf.o \ - css2400/runtime/isp_param/src/isp_param.o \ - css2400/runtime/inputfifo/src/inputfifo.o \ - css2400/runtime/queue/src/queue_access.o \ - css2400/runtime/queue/src/queue.o \ - css2400/runtime/frame/src/frame.o \ - css2400/runtime/eventq/src/eventq.o \ - css2400/runtime/binary/src/binary.o \ - css2400/runtime/timer/src/timer.o \ - css2400/runtime/isys/src/csi_rx_rmgr.o \ - css2400/runtime/isys/src/isys_stream2mmio_rmgr.o \ - css2400/runtime/isys/src/virtual_isys.o \ - css2400/runtime/isys/src/rx.o \ - css2400/runtime/isys/src/isys_dma_rmgr.o \ - css2400/runtime/isys/src/ibuf_ctrl_rmgr.o \ - css2400/runtime/isys/src/isys_init.o \ - css2400/runtime/bufq/src/bufq.o \ - css2400/runtime/ifmtr/src/ifmtr.o \ - css2400/runtime/debug/src/ia_css_debug.o \ - css2400/runtime/event/src/event.o \ - css2400/sh_css_sp.o \ - css2400/css_2400_system/spmem_dump.o \ - css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.o \ - css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.o \ - css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.o \ - css2400/sh_css_stream_format.o \ - css2400/sh_css_hrt.o \ - css2400/sh_css_properties.o \ - css2400/memory_realloc.o \ - css2400/hive_isp_css_shared/host/tag.o \ - css2400/sh_css_params.o \ - css2400/sh_css.o \ - css2400/isp/kernels/hdr/ia_css_hdr.host.o \ - css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.o \ - css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.o \ - css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.o \ - css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.o \ - css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.o \ - css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.o \ - css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.o \ - css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.o \ - css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.o \ - css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.o \ - css2400/isp/kernels/output/output_1.0/ia_css_output.host.o \ - css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.o \ - css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.o \ - css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.o \ - css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.o \ - css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.o \ - css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.o \ - css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.o \ - css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.o \ - css2400/isp/kernels/dpc2/ia_css_dpc2.host.o \ - css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.o \ - css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.o \ - css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.o \ - css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.o \ - css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.o \ - css2400/isp/kernels/bh/bh_2/ia_css_bh.host.o \ - css2400/isp/kernels/bnlm/ia_css_bnlm.host.o \ - css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.o \ - css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.o \ - css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.o \ - css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.o \ - css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.o \ - css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.o \ - css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.o \ - css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.o \ - css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.o \ - css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.o \ - css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.o \ - css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.o \ - css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.o \ - css2400/isp/kernels/de/de_1.0/ia_css_de.host.o \ - css2400/isp/kernels/de/de_2/ia_css_de2.host.o \ - css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.o \ - css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.o \ - css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.o \ - css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.o \ - css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.o \ - css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ - css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.o \ - css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.o \ - css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.o \ - css2400/isp/kernels/ob/ob2/ia_css_ob2.host.o \ - css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.o \ - css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.o \ - css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.o \ - css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.o \ - css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.o \ - css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.o \ - css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.o \ - css2400/sh_css_pipe.o \ - css2400/ia_css_device_access.o \ - css2400/sh_css_host_data.o \ - css2400/sh_css_mmu.o \ - css2400/sh_css_metadata.o \ - css2400/base/refcount/src/refcount.o \ - css2400/base/circbuf/src/circbuf.o \ - css2400/camera/pipe/src/pipe_binarydesc.o \ - css2400/camera/pipe/src/pipe_util.o \ - css2400/camera/pipe/src/pipe_stagedesc.o \ - css2400/camera/util/src/util.o \ - css2400/sh_css_metrics.o \ - css2400/sh_css_version.o \ - css2400/ia_css_memory_access.o \ - css2400/sh_css_param_shading.o \ - css2400/sh_css_morph.o \ - css2400/sh_css_firmware.o \ - css2400/hive_isp_css_common/host/isp.o \ - css2400/hive_isp_css_common/host/gdc.o \ - css2400/hive_isp_css_common/host/sp.o \ - css2400/hive_isp_css_common/host/vmem.o \ - css2400/hive_isp_css_common/host/dma.o \ - css2400/hive_isp_css_common/host/input_formatter.o \ - css2400/hive_isp_css_common/host/debug.o \ - css2400/hive_isp_css_common/host/hmem.o \ - css2400/hive_isp_css_common/host/gp_device.o \ - css2400/hive_isp_css_common/host/fifo_monitor.o \ - css2400/hive_isp_css_common/host/gp_timer.o \ - css2400/hive_isp_css_common/host/irq.o \ - css2400/hive_isp_css_common/host/input_system.o \ - css2400/hive_isp_css_common/host/timed_ctrl.o \ - css2400/hive_isp_css_common/host/mmu.o \ - css2400/hive_isp_css_common/host/event_fifo.o \ - css2400/sh_css_param_dvs.o \ - css2400/sh_css_shading.o \ - css2400/sh_css_stream.o \ - mmu/sh_mmu_mrfld.o \ - mmu/isp_mmu.o \ - atomisp_acc.o \ - atomisp_compat_css20.o \ - atomisp_fops.o \ - atomisp_subdev.o \ - atomisp_ioctl.o \ - atomisp_compat_ioctl32.o \ - atomisp_csi2.o \ - atomisp_cmd.o \ - atomisp_tpg.o \ - hmm/hmm_vm.o \ - hmm/hmm.o \ - hmm/hmm_bo.o \ - hmm/hmm_reserved_pool.o \ - hmm/hmm_dynamic_pool.o \ - hrt/hive_isp_css_mm_hrt.o \ - atomisp_v4l2.o - -# These will be needed when clean merge CHT support nicely into the driver -# Keep them here handy for when we get to that point -# - -obj-cht= \ - css2400/css_2401_system/spmem_dump.o \ - css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.o \ - css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.o \ - css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.o \ - css2400/css_2401_csi2p_system/spmem_dump.o \ - css2400/css_2401_csi2p_system/host/isys_stream2mmio.o \ - css2400/css_2401_csi2p_system/host/ibuf_ctrl.o \ - css2400/css_2401_csi2p_system/host/isys_irq.o \ - css2400/css_2401_csi2p_system/host/isys_dma.o \ - css2400/css_2401_csi2p_system/host/csi_rx.o \ - css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.o \ - css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.o \ - css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.o \ - -# -I$(atomisp)/css2400/css_2401_csi2p_system/ \ -# -I$(atomisp)/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ \ -# -I$(atomisp)/css2400/css_2401_csi2p_system/host/ \ -# -I$(atomisp)/css2400/css_2401_csi2p_system/hrt/ \ -# -I$(atomisp)/css2400/css_2401_system/hive_isp_css_2401_system_generated/ \ -# -I$(atomisp)/css2400/css_2401_system/hrt/ \ - - - -obj-$(CONFIG_VIDEO_ATOMISP) += atomisp.o - -atomisp = $(srctree)/drivers/staging/media/atomisp/pci/atomisp2 - -INCLUDES += \ - -I$(atomisp)/ \ - -I$(atomisp)/css2400/ \ - -I$(atomisp)/hrt/ \ - -I$(atomisp)/include/ \ - -I$(atomisp)/include/hmm/ \ - -I$(atomisp)/include/mmu/ \ - -I$(atomisp)/css2400/base/circbuf/interface/ \ - -I$(atomisp)/css2400/base/refcount/interface/ \ - -I$(atomisp)/css2400/camera/pipe/interface/ \ - -I$(atomisp)/css2400/camera/util/interface/ \ - -I$(atomisp)/css2400/css_2400_system/ \ - -I$(atomisp)/css2400/css_2400_system/hive_isp_css_2400_system_generated/ \ - -I$(atomisp)/css2400/css_2400_system/hrt/ \ - -I$(atomisp)/css2400/hive_isp_css_common/ \ - -I$(atomisp)/css2400/hive_isp_css_common/host/ \ - -I$(atomisp)/css2400/hive_isp_css_include/ \ - -I$(atomisp)/css2400/hive_isp_css_include/device_access/ \ - -I$(atomisp)/css2400/hive_isp_css_include/host/ \ - -I$(atomisp)/css2400/hive_isp_css_include/memory_access/ \ - -I$(atomisp)/css2400/hive_isp_css_shared/ \ - -I$(atomisp)/css2400/hive_isp_css_shared/host/ \ - -I$(atomisp)/css2400/isp/kernels/ \ - -I$(atomisp)/css2400/isp/kernels/aa/aa_2/ \ - -I$(atomisp)/css2400/isp/kernels/anr/anr_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/anr/anr_2/ \ - -I$(atomisp)/css2400/isp/kernels/bh/bh_2/ \ - -I$(atomisp)/css2400/isp/kernels/bnlm/ \ - -I$(atomisp)/css2400/isp/kernels/bnr/ \ - -I$(atomisp)/css2400/isp/kernels/bnr/bnr_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/bnr/bnr2_2/ \ - -I$(atomisp)/css2400/isp/kernels/cnr/ \ - -I$(atomisp)/css2400/isp/kernels/cnr/cnr_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/cnr/cnr_2/ \ - -I$(atomisp)/css2400/isp/kernels/conversion/ \ - -I$(atomisp)/css2400/isp/kernels/conversion/conversion_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/copy_output/ \ - -I$(atomisp)/css2400/isp/kernels/copy_output/copy_output_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/crop/ \ - -I$(atomisp)/css2400/isp/kernels/crop/crop_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/csc/ \ - -I$(atomisp)/css2400/isp/kernels/csc/csc_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/ctc/ \ - -I$(atomisp)/css2400/isp/kernels/ctc/ctc_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/ctc/ctc1_5/ \ - -I$(atomisp)/css2400/isp/kernels/ctc/ctc2/ \ - -I$(atomisp)/css2400/isp/kernels/de/ \ - -I$(atomisp)/css2400/isp/kernels/de/de_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/de/de_2/ \ - -I$(atomisp)/css2400/isp/kernels/dpc2/ \ - -I$(atomisp)/css2400/isp/kernels/dp/ \ - -I$(atomisp)/css2400/isp/kernels/dp/dp_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/dvs/ \ - -I$(atomisp)/css2400/isp/kernels/dvs/dvs_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/eed1_8/ \ - -I$(atomisp)/css2400/isp/kernels/fc/ \ - -I$(atomisp)/css2400/isp/kernels/fc/fc_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/fixedbds/ \ - -I$(atomisp)/css2400/isp/kernels/fixedbds/fixedbds_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/fpn/ \ - -I$(atomisp)/css2400/isp/kernels/fpn/fpn_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/gc/ \ - -I$(atomisp)/css2400/isp/kernels/gc/gc_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/gc/gc_2/ \ - -I$(atomisp)/css2400/isp/kernels/hdr/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/common/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/common/ \ - -I$(atomisp)/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ \ - -I$(atomisp)/css2400/isp/kernels/iterator/ \ - -I$(atomisp)/css2400/isp/kernels/iterator/iterator_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/macc/ \ - -I$(atomisp)/css2400/isp/kernels/macc/macc_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/macc/macc1_5/ \ - -I$(atomisp)/css2400/isp/kernels/norm/ \ - -I$(atomisp)/css2400/isp/kernels/norm/norm_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/ob/ \ - -I$(atomisp)/css2400/isp/kernels/ob/ob_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/ob/ob2/ \ - -I$(atomisp)/css2400/isp/kernels/output/ \ - -I$(atomisp)/css2400/isp/kernels/output/output_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/qplane/ \ - -I$(atomisp)/css2400/isp/kernels/qplane/qplane_2/ \ - -I$(atomisp)/css2400/isp/kernels/raw_aa_binning/ \ - -I$(atomisp)/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/raw/ \ - -I$(atomisp)/css2400/isp/kernels/raw/raw_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/ref/ \ - -I$(atomisp)/css2400/isp/kernels/ref/ref_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/s3a/ \ - -I$(atomisp)/css2400/isp/kernels/s3a/s3a_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/sc/ \ - -I$(atomisp)/css2400/isp/kernels/sc/sc_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/sdis/ \ - -I$(atomisp)/css2400/isp/kernels/sdis/common/ \ - -I$(atomisp)/css2400/isp/kernels/sdis/sdis_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/sdis/sdis_2/ \ - -I$(atomisp)/css2400/isp/kernels/tdf/ \ - -I$(atomisp)/css2400/isp/kernels/tdf/tdf_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/tnr/ \ - -I$(atomisp)/css2400/isp/kernels/tnr/tnr_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/tnr/tnr3/ \ - -I$(atomisp)/css2400/isp/kernels/uds/ \ - -I$(atomisp)/css2400/isp/kernels/uds/uds_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/vf/ \ - -I$(atomisp)/css2400/isp/kernels/vf/vf_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/wb/ \ - -I$(atomisp)/css2400/isp/kernels/wb/wb_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/xnr/ \ - -I$(atomisp)/css2400/isp/kernels/xnr/xnr_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/xnr/xnr_3.0/ \ - -I$(atomisp)/css2400/isp/kernels/ynr/ \ - -I$(atomisp)/css2400/isp/kernels/ynr/ynr_1.0/ \ - -I$(atomisp)/css2400/isp/kernels/ynr/ynr_2/ \ - -I$(atomisp)/css2400/isp/modes/interface/ \ - -I$(atomisp)/css2400/runtime/binary/interface/ \ - -I$(atomisp)/css2400/runtime/bufq/interface/ \ - -I$(atomisp)/css2400/runtime/debug/interface/ \ - -I$(atomisp)/css2400/runtime/event/interface/ \ - -I$(atomisp)/css2400/runtime/eventq/interface/ \ - -I$(atomisp)/css2400/runtime/frame/interface/ \ - -I$(atomisp)/css2400/runtime/ifmtr/interface/ \ - -I$(atomisp)/css2400/runtime/inputfifo/interface/ \ - -I$(atomisp)/css2400/runtime/isp_param/interface/ \ - -I$(atomisp)/css2400/runtime/isys/interface/ \ - -I$(atomisp)/css2400/runtime/isys/src/ \ - -I$(atomisp)/css2400/runtime/pipeline/interface/ \ - -I$(atomisp)/css2400/runtime/queue/interface/ \ - -I$(atomisp)/css2400/runtime/queue/src/ \ - -I$(atomisp)/css2400/runtime/rmgr/interface/ \ - -I$(atomisp)/css2400/runtime/spctrl/interface/ \ - -I$(atomisp)/css2400/runtime/tagger/interface/ - -ifeq ($(CONFIG_ION),y) -INCLUDES += -I$(srctree)/drivers/staging/android/ion -endif - -DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__ -#DEFINES += -DUSE_DYNAMIC_BIN -#DEFINES += -DISP_POWER_GATING -#DEFINES += -DUSE_INTERRUPTS -#DEFINES += -DUSE_SSSE3 -#DEFINES += -DPUNIT_CAMERA_BUSY -#DEFINES += -DUSE_KMEM_CACHE - -DEFINES += -DATOMISP_POSTFIX=\"css2400b0_v21\" -DEFINES += -DSYSTEM_hive_isp_css_2400_system -DISP2400 - -ccflags-y += $(INCLUDES) $(DEFINES) -fno-common - -# HACK! While this driver is in bad shape, don't enable several warnings -# that would be otherwise enabled with W=1 -ccflags-y += $(call cc-disable-warning, implicit-fallthrough) -ccflags-y += $(call cc-disable-warning, missing-prototypes) -ccflags-y += $(call cc-disable-warning, missing-declarations) -ccflags-y += $(call cc-disable-warning, suggest-attribute=format) -ccflags-y += $(call cc-disable-warning, unused-const-variable) -ccflags-y += $(call cc-disable-warning, unused-but-set-variable) diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c b/drivers/staging/media/atomisp/pci/atomisp_acc.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c rename to drivers/staging/media/atomisp/pci/atomisp_acc.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h b/drivers/staging/media/atomisp/pci/atomisp_acc.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.h rename to drivers/staging/media/atomisp/pci/atomisp_acc.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp_cmd.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c rename to drivers/staging/media/atomisp/pci/atomisp_cmd.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h b/drivers/staging/media/atomisp/pci/atomisp_cmd.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h rename to drivers/staging/media/atomisp/pci/atomisp_cmd.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h b/drivers/staging/media/atomisp/pci/atomisp_common.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_common.h rename to drivers/staging/media/atomisp/pci/atomisp_common.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h b/drivers/staging/media/atomisp/pci/atomisp_compat.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h rename to drivers/staging/media/atomisp/pci/atomisp_compat.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c rename to drivers/staging/media/atomisp/pci/atomisp_compat_css20.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h rename to drivers/staging/media/atomisp/pci/atomisp_compat_css20.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c b/drivers/staging/media/atomisp/pci/atomisp_compat_ioctl32.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c rename to drivers/staging/media/atomisp/pci/atomisp_compat_ioctl32.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h b/drivers/staging/media/atomisp/pci/atomisp_compat_ioctl32.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h rename to drivers/staging/media/atomisp/pci/atomisp_compat_ioctl32.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c b/drivers/staging/media/atomisp/pci/atomisp_csi2.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c rename to drivers/staging/media/atomisp/pci/atomisp_csi2.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h b/drivers/staging/media/atomisp/pci/atomisp_csi2.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h rename to drivers/staging/media/atomisp/pci/atomisp_csi2.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h b/drivers/staging/media/atomisp/pci/atomisp_dfs_tables.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_dfs_tables.h rename to drivers/staging/media/atomisp/pci/atomisp_dfs_tables.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c b/drivers/staging/media/atomisp/pci/atomisp_drvfs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c rename to drivers/staging/media/atomisp/pci/atomisp_drvfs.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.h b/drivers/staging/media/atomisp/pci/atomisp_drvfs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.h rename to drivers/staging/media/atomisp/pci/atomisp_drvfs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c b/drivers/staging/media/atomisp/pci/atomisp_file.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c rename to drivers/staging/media/atomisp/pci/atomisp_file.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h b/drivers/staging/media/atomisp/pci/atomisp_file.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h rename to drivers/staging/media/atomisp/pci/atomisp_file.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp_fops.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c rename to drivers/staging/media/atomisp/pci/atomisp_fops.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h b/drivers/staging/media/atomisp/pci/atomisp_fops.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h rename to drivers/staging/media/atomisp/pci/atomisp_fops.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h b/drivers/staging/media/atomisp/pci/atomisp_helper.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_helper.h rename to drivers/staging/media/atomisp/pci/atomisp_helper.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h b/drivers/staging/media/atomisp/pci/atomisp_internal.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h rename to drivers/staging/media/atomisp/pci/atomisp_internal.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c rename to drivers/staging/media/atomisp/pci/atomisp_ioctl.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h b/drivers/staging/media/atomisp/pci/atomisp_ioctl.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h rename to drivers/staging/media/atomisp/pci/atomisp_ioctl.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp_subdev.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c rename to drivers/staging/media/atomisp/pci/atomisp_subdev.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h b/drivers/staging/media/atomisp/pci/atomisp_subdev.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h rename to drivers/staging/media/atomisp/pci/atomisp_subdev.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h b/drivers/staging/media/atomisp/pci/atomisp_tables.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h rename to drivers/staging/media/atomisp/pci/atomisp_tables.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c b/drivers/staging/media/atomisp/pci/atomisp_tpg.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c rename to drivers/staging/media/atomisp/pci/atomisp_tpg.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h b/drivers/staging/media/atomisp/pci/atomisp_tpg.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h rename to drivers/staging/media/atomisp/pci/atomisp_tpg.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h b/drivers/staging/media/atomisp/pci/atomisp_trace_event.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h rename to drivers/staging/media/atomisp/pci/atomisp_trace_event.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c rename to drivers/staging/media/atomisp/pci/atomisp_v4l2.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h b/drivers/staging/media/atomisp/pci/atomisp_v4l2.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h rename to drivers/staging/media/atomisp/pci/atomisp_v4l2.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h b/drivers/staging/media/atomisp/pci/base/circbuf/interface/ia_css_circbuf.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h rename to drivers/staging/media/atomisp/pci/base/circbuf/interface/ia_css_circbuf.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h b/drivers/staging/media/atomisp/pci/base/circbuf/interface/ia_css_circbuf_comm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_comm.h rename to drivers/staging/media/atomisp/pci/base/circbuf/interface/ia_css_circbuf_comm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h b/drivers/staging/media/atomisp/pci/base/circbuf/interface/ia_css_circbuf_desc.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h rename to drivers/staging/media/atomisp/pci/base/circbuf/interface/ia_css_circbuf_desc.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c b/drivers/staging/media/atomisp/pci/base/circbuf/src/circbuf.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c rename to drivers/staging/media/atomisp/pci/base/circbuf/src/circbuf.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h b/drivers/staging/media/atomisp/pci/base/refcount/interface/ia_css_refcount.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h rename to drivers/staging/media/atomisp/pci/base/refcount/interface/ia_css_refcount.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c b/drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c rename to drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/bits.h b/drivers/staging/media/atomisp/pci/bits.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/bits.h rename to drivers/staging/media/atomisp/pci/bits.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h b/drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h rename to drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_binarydesc.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h b/drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_stagedesc.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h rename to drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_stagedesc.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h b/drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_util.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h rename to drivers/staging/media/atomisp/pci/camera/pipe/interface/ia_css_pipe_util.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c rename to drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_stagedesc.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c rename to drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_stagedesc.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_util.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c rename to drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_util.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h b/drivers/staging/media/atomisp/pci/camera/util/interface/ia_css_util.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h rename to drivers/staging/media/atomisp/pci/camera/util/interface/ia_css_util.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c b/drivers/staging/media/atomisp/pci/camera/util/src/util.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c rename to drivers/staging/media/atomisp/pci/camera/util/src/util.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/cell_params.h b/drivers/staging/media/atomisp/pci/cell_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/cell_params.h rename to drivers/staging/media/atomisp/pci/cell_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h rename to drivers/staging/media/atomisp/pci/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h b/drivers/staging/media/atomisp/pci/css_2400_system/hrt/isp2400_mamoiada_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h rename to drivers/staging/media/atomisp/pci/css_2400_system/hrt/isp2400_mamoiada_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/spmem_dump.c rename to drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/csi_rx_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/csi_rx_global.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/csi_rx_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_local.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_local.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_local.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_local.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_local.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/mipi_backend_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/rx_csi_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/rx_csi_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/rx_csi_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/stream2mmio_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/stream2mmio_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/ibuf_ctrl_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/ibuf_ctrl_global.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/ibuf_ctrl_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_dma_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_dma_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_irq_global.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_irq_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_irq_global.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_irq_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_stream2mmio_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_stream2mmio_global.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_stream2mmio_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/pixelgen_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/pixelgen_global.h rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/pixelgen_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/spmem_dump.c rename to drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/spmem_dump.c rename to drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_common_defs.h b/drivers/staging/media/atomisp/pci/css_receiver_2400_common_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_common_defs.h rename to drivers/staging/media/atomisp/pci/css_receiver_2400_common_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_defs.h b/drivers/staging/media/atomisp/pci/css_receiver_2400_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_receiver_2400_defs.h rename to drivers/staging/media/atomisp/pci/css_receiver_2400_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h b/drivers/staging/media/atomisp/pci/css_trace.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/css_trace.h rename to drivers/staging/media/atomisp/pci/css_trace.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/defs.h b/drivers/staging/media/atomisp/pci/defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/defs.h rename to drivers/staging/media/atomisp/pci/defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/dma_v2_defs.h b/drivers/staging/media/atomisp/pci/dma_v2_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/dma_v2_defs.h rename to drivers/staging/media/atomisp/pci/dma_v2_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/gdc_v2_defs.h b/drivers/staging/media/atomisp/pci/gdc_v2_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/gdc_v2_defs.h rename to drivers/staging/media/atomisp/pci/gdc_v2_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/gp_timer_defs.h b/drivers/staging/media/atomisp/pci/gp_timer_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/gp_timer_defs.h rename to drivers/staging/media/atomisp/pci/gp_timer_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/gpio_block_defs.h b/drivers/staging/media/atomisp/pci/gpio_block_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/gpio_block_defs.h rename to drivers/staging/media/atomisp/pci/gpio_block_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_2401_irq_types_hrt.h b/drivers/staging/media/atomisp/pci/hive_isp_css_2401_irq_types_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_2401_irq_types_hrt.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_2401_irq_types_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/debug_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/debug_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/debug_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/dma_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/dma_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/dma_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/event_fifo_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/event_fifo_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/event_fifo_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/event_fifo_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/fifo_monitor_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/fifo_monitor_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/fifo_monitor_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/fifo_monitor_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/gdc_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gdc_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/gdc_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/gp_device_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_device_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/gp_device_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_timer_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/gp_timer_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gp_timer_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/gp_timer_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gpio_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/gpio_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/gpio_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/gpio_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/hmem_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/hmem_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/hmem_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/debug.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/debug.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/debug_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/debug_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/debug_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/debug_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/debug_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/dma.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/dma.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/dma_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/dma_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/dma_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/dma_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/dma_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/event_fifo.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/event_fifo.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/event_fifo_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/event_fifo_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/event_fifo_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/event_fifo_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/event_fifo_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/fifo_monitor.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/fifo_monitor.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/fifo_monitor_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/fifo_monitor_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/fifo_monitor_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/fifo_monitor_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/fifo_monitor_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gdc_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gdc_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_device.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_device.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_device_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_device_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_device_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_device_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_device_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_timer.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_timer.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_timer_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_timer_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_timer_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gp_timer_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gp_timer_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gpio_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gpio_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gpio_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/gpio_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/gpio_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/hmem.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/hmem.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/hmem_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/hmem_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/hmem_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/hmem_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/hmem_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_formatter.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_formatter.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_formatter_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_formatter_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_formatter_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_formatter_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_formatter_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_system.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/input_system.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/input_system.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/irq_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/isp.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/isp.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/isp_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/isp_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/isp_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/isp_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/isp_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/mmu.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/mmu.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/mmu_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/mmu_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/mmu_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/sp_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/timed_ctrl_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vamem_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vamem_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vamem_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vmem.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vmem.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vmem_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vmem_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vmem_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/host/vmem_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/host/vmem_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/input_formatter_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/input_formatter_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/input_formatter_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/irq_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/irq_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/irq_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/irq_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/isp_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/isp_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/isp_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/mmu_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/mmu_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/mmu_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/mmu_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/sp_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/sp_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/sp_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/sp_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/timed_ctrl_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/timed_ctrl_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/timed_ctrl_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/vamem_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vamem_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/vamem_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vmem_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_common/vmem_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_common/vmem_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_common/vmem_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_defs.h b/drivers/staging/media/atomisp/pci/hive_isp_css_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_defs.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/assert_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/assert_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/assert_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/bitop_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/bitop_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/bitop_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/bitop_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/csi_rx.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/csi_rx.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/csi_rx.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/csi_rx.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/debug.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/debug.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/debug.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/debug.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/device_access/device_access.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/device_access/device_access.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/device_access/device_access.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/dma.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/dma.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/dma.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/dma.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/error_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/error_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/error_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/event_fifo.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/event_fifo.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/event_fifo.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/fifo_monitor.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/fifo_monitor.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/fifo_monitor.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/gdc_device.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gdc_device.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/gdc_device.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/gp_device.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_device.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/gp_device.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/gp_timer.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gp_timer.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/gp_timer.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/gpio.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/gpio.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/gpio.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/hmem.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/hmem.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/hmem.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/csi_rx_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/csi_rx_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/csi_rx_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/debug_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/debug_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/debug_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/dma_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/dma_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/dma_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/event_fifo_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/event_fifo_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/event_fifo_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/fifo_monitor_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/fifo_monitor_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/fifo_monitor_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gdc_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gdc_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gdc_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gp_device_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_device_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gp_device_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gp_timer_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gp_timer_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gp_timer_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gpio_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/gpio_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/gpio_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/hmem_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/hmem_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/hmem_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/ibuf_ctrl_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/ibuf_ctrl_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/ibuf_ctrl_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/input_formatter_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/input_formatter_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/input_formatter_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/irq_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/irq_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/irq_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isp_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_dma_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_dma_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_dma_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_dma_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_irq_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_irq_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_irq_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_irq_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_stream2mmio_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_stream2mmio_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/isys_stream2mmio_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isys_stream2mmio_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/mmu_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/mmu_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/pixelgen_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/pixelgen_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/pixelgen_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/pixelgen_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/sp_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/sp_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/sp_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/sp_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/tag_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/tag_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/tag_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/tag_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/timed_ctrl_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/timed_ctrl_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/timed_ctrl_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/timed_ctrl_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vamem_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/vamem_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vamem_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/vamem_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vmem_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/vmem_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/host/vmem_public.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/host/vmem_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/ibuf_ctrl.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/ibuf_ctrl.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/ibuf_ctrl.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/ibuf_ctrl.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_formatter.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/input_formatter.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_formatter.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/input_formatter.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_system.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/input_system.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/input_system.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/input_system.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/irq.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/irq.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/irq.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/irq.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isp.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/isp.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isp.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/isp.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_dma.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/isys_dma.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_dma.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/isys_dma.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_irq.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/isys_irq.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_irq.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/isys_irq.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/isys_stream2mmio.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/isys_stream2mmio.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/isys_stream2mmio.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/math_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/math_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/math_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/memory_access/memory_access.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_access/memory_access.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/memory_access/memory_access.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/memory_realloc.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/memory_realloc.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/memory_realloc.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/misc_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/misc_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/misc_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/misc_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/mmu_device.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/mmu_device.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/mmu_device.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/pixelgen.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/pixelgen.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/pixelgen.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/platform_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/platform_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/platform_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/print_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/print_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/print_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/queue.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/queue.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/queue.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/resource.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/resource.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/resource.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/sp.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/sp.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/sp.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/string_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/string_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/string_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/system_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/system_types.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/system_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/tag.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/tag.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/tag.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/timed_ctrl.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/timed_ctrl.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/timed_ctrl.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/type_support.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/type_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/type_support.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/type_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/vamem.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vamem.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/vamem.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/vmem.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_include/vmem.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_include/vmem.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/queue_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/queue_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/queue_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/queue_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/queue_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/tag.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag.c rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/tag.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_local.h b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/tag_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_local.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/tag_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_private.h b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/tag_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/host/tag_private.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/host/tag_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/queue_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/queue_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/queue_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/sw_event_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/sw_event_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/sw_event_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h b/drivers/staging/media/atomisp/pci/hive_isp_css_shared/tag_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_shared/tag_global.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_shared/tag_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_streaming_to_mipi_types_hrt.h b/drivers/staging/media/atomisp/pci/hive_isp_css_streaming_to_mipi_types_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_isp_css_streaming_to_mipi_types_hrt.h rename to drivers/staging/media/atomisp/pci/hive_isp_css_streaming_to_mipi_types_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_types.h b/drivers/staging/media/atomisp/pci/hive_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/hive_types.h rename to drivers/staging/media/atomisp/pci/hive_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c b/drivers/staging/media/atomisp/pci/hmm/hmm.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm.c rename to drivers/staging/media/atomisp/pci/hmm/hmm.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c b/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_bo.c rename to drivers/staging/media/atomisp/pci/hmm/hmm_bo.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c b/drivers/staging/media/atomisp/pci/hmm/hmm_dynamic_pool.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_dynamic_pool.c rename to drivers/staging/media/atomisp/pci/hmm/hmm_dynamic_pool.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c b/drivers/staging/media/atomisp/pci/hmm/hmm_reserved_pool.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_reserved_pool.c rename to drivers/staging/media/atomisp/pci/hmm/hmm_reserved_pool.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c b/drivers/staging/media/atomisp/pci/hmm/hmm_vm.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hmm/hmm_vm.c rename to drivers/staging/media/atomisp/pci/hmm/hmm_vm.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h b/drivers/staging/media/atomisp/pci/hrt/hive_isp_css_custom_host_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_custom_host_hrt.h rename to drivers/staging/media/atomisp/pci/hrt/hive_isp_css_custom_host_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c b/drivers/staging/media/atomisp/pci/hrt/hive_isp_css_mm_hrt.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.c rename to drivers/staging/media/atomisp/pci/hrt/hive_isp_css_mm_hrt.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h b/drivers/staging/media/atomisp/pci/hrt/hive_isp_css_mm_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/hrt/hive_isp_css_mm_hrt.h rename to drivers/staging/media/atomisp/pci/hrt/hive_isp_css_mm_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css.h b/drivers/staging/media/atomisp/pci/ia_css.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css.h rename to drivers/staging/media/atomisp/pci/ia_css.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h b/drivers/staging/media/atomisp/pci/ia_css_3a.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_3a.h rename to drivers/staging/media/atomisp/pci/ia_css_3a.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h b/drivers/staging/media/atomisp/pci/ia_css_acc_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_acc_types.h rename to drivers/staging/media/atomisp/pci/ia_css_acc_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h b/drivers/staging/media/atomisp/pci/ia_css_buffer.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_buffer.h rename to drivers/staging/media/atomisp/pci/ia_css_buffer.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h b/drivers/staging/media/atomisp/pci/ia_css_control.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_control.h rename to drivers/staging/media/atomisp/pci/ia_css_control.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c b/drivers/staging/media/atomisp/pci/ia_css_device_access.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.c rename to drivers/staging/media/atomisp/pci/ia_css_device_access.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h b/drivers/staging/media/atomisp/pci/ia_css_device_access.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_device_access.h rename to drivers/staging/media/atomisp/pci/ia_css_device_access.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h b/drivers/staging/media/atomisp/pci/ia_css_dvs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_dvs.h rename to drivers/staging/media/atomisp/pci/ia_css_dvs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_env.h b/drivers/staging/media/atomisp/pci/ia_css_env.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_env.h rename to drivers/staging/media/atomisp/pci/ia_css_env.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h b/drivers/staging/media/atomisp/pci/ia_css_err.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_err.h rename to drivers/staging/media/atomisp/pci/ia_css_err.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h b/drivers/staging/media/atomisp/pci/ia_css_event_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_event_public.h rename to drivers/staging/media/atomisp/pci/ia_css_event_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h b/drivers/staging/media/atomisp/pci/ia_css_firmware.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_firmware.h rename to drivers/staging/media/atomisp/pci/ia_css_firmware.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h b/drivers/staging/media/atomisp/pci/ia_css_frac.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frac.h rename to drivers/staging/media/atomisp/pci/ia_css_frac.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_format.h b/drivers/staging/media/atomisp/pci/ia_css_frame_format.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_format.h rename to drivers/staging/media/atomisp/pci/ia_css_frame_format.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h b/drivers/staging/media/atomisp/pci/ia_css_frame_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_frame_public.h rename to drivers/staging/media/atomisp/pci/ia_css_frame_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h b/drivers/staging/media/atomisp/pci/ia_css_host_data.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_host_data.h rename to drivers/staging/media/atomisp/pci/ia_css_host_data.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_input_port.h b/drivers/staging/media/atomisp/pci/ia_css_input_port.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_input_port.h rename to drivers/staging/media/atomisp/pci/ia_css_input_port.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h b/drivers/staging/media/atomisp/pci/ia_css_irq.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_irq.h rename to drivers/staging/media/atomisp/pci/ia_css_irq.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_configs.h rename to drivers/staging/media/atomisp/pci/ia_css_isp_configs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_params.h b/drivers/staging/media/atomisp/pci/ia_css_isp_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_params.h rename to drivers/staging/media/atomisp/pci/ia_css_isp_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_states.h b/drivers/staging/media/atomisp/pci/ia_css_isp_states.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_isp_states.h rename to drivers/staging/media/atomisp/pci/ia_css_isp_states.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c b/drivers/staging/media/atomisp/pci/ia_css_memory_access.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_memory_access.c rename to drivers/staging/media/atomisp/pci/ia_css_memory_access.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h b/drivers/staging/media/atomisp/pci/ia_css_metadata.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_metadata.h rename to drivers/staging/media/atomisp/pci/ia_css_metadata.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h b/drivers/staging/media/atomisp/pci/ia_css_mipi.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mipi.h rename to drivers/staging/media/atomisp/pci/ia_css_mipi.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu.h b/drivers/staging/media/atomisp/pci/ia_css_mmu.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu.h rename to drivers/staging/media/atomisp/pci/ia_css_mmu.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu_private.h b/drivers/staging/media/atomisp/pci/ia_css_mmu_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_mmu_private.h rename to drivers/staging/media/atomisp/pci/ia_css_mmu_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_morph.h b/drivers/staging/media/atomisp/pci/ia_css_morph.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_morph.h rename to drivers/staging/media/atomisp/pci/ia_css_morph.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h b/drivers/staging/media/atomisp/pci/ia_css_pipe.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe.h rename to drivers/staging/media/atomisp/pci/ia_css_pipe.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h b/drivers/staging/media/atomisp/pci/ia_css_pipe_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_pipe_public.h rename to drivers/staging/media/atomisp/pci/ia_css_pipe_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h b/drivers/staging/media/atomisp/pci/ia_css_prbs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_prbs.h rename to drivers/staging/media/atomisp/pci/ia_css_prbs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_properties.h b/drivers/staging/media/atomisp/pci/ia_css_properties.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_properties.h rename to drivers/staging/media/atomisp/pci/ia_css_properties.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_shading.h b/drivers/staging/media/atomisp/pci/ia_css_shading.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_shading.h rename to drivers/staging/media/atomisp/pci/ia_css_shading.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h b/drivers/staging/media/atomisp/pci/ia_css_stream.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream.h rename to drivers/staging/media/atomisp/pci/ia_css_stream.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h b/drivers/staging/media/atomisp/pci/ia_css_stream_format.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_format.h rename to drivers/staging/media/atomisp/pci/ia_css_stream_format.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h b/drivers/staging/media/atomisp/pci/ia_css_stream_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_stream_public.h rename to drivers/staging/media/atomisp/pci/ia_css_stream_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h b/drivers/staging/media/atomisp/pci/ia_css_timer.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_timer.h rename to drivers/staging/media/atomisp/pci/ia_css_timer.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h b/drivers/staging/media/atomisp/pci/ia_css_tpg.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_tpg.h rename to drivers/staging/media/atomisp/pci/ia_css_tpg.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h b/drivers/staging/media/atomisp/pci/ia_css_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_types.h rename to drivers/staging/media/atomisp/pci/ia_css_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version.h b/drivers/staging/media/atomisp/pci/ia_css_version.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version.h rename to drivers/staging/media/atomisp/pci/ia_css_version.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h b/drivers/staging/media/atomisp/pci/ia_css_version_data.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/ia_css_version_data.h rename to drivers/staging/media/atomisp/pci/ia_css_version_data.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/if_defs.h b/drivers/staging/media/atomisp/pci/if_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/if_defs.h rename to drivers/staging/media/atomisp/pci/if_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_formatter_subsystem_defs.h b/drivers/staging/media/atomisp/pci/input_formatter_subsystem_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_formatter_subsystem_defs.h rename to drivers/staging/media/atomisp/pci/input_formatter_subsystem_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_selector_defs.h b/drivers/staging/media/atomisp/pci/input_selector_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_selector_defs.h rename to drivers/staging/media/atomisp/pci/input_selector_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_switch_2400_defs.h b/drivers/staging/media/atomisp/pci/input_switch_2400_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_switch_2400_defs.h rename to drivers/staging/media/atomisp/pci/input_switch_2400_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_ctrl_defs.h b/drivers/staging/media/atomisp/pci/input_system_ctrl_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_ctrl_defs.h rename to drivers/staging/media/atomisp/pci/input_system_ctrl_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_defs.h b/drivers/staging/media/atomisp/pci/input_system_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_defs.h rename to drivers/staging/media/atomisp/pci/input_system_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_global.h b/drivers/staging/media/atomisp/pci/input_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_global.h rename to drivers/staging/media/atomisp/pci/input_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_local.h b/drivers/staging/media/atomisp/pci/input_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_local.h rename to drivers/staging/media/atomisp/pci/input_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_private.h b/drivers/staging/media/atomisp/pci/input_system_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_private.h rename to drivers/staging/media/atomisp/pci/input_system_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_public.h b/drivers/staging/media/atomisp/pci/input_system_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/input_system_public.h rename to drivers/staging/media/atomisp/pci/input_system_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/irq_controller_defs.h b/drivers/staging/media/atomisp/pci/irq_controller_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/irq_controller_defs.h rename to drivers/staging/media/atomisp/pci/irq_controller_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/aa/aa_2/ia_css_aa2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/aa/aa_2/ia_css_aa2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_1.0/ia_css_anr_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_1.0/ia_css_anr_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_table.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_table.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/anr/anr_2/ia_css_anr2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/anr/anr_2/ia_css_anr2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bh/bh_2/ia_css_bh_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bh/bh_2/ia_css_bh_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnlm/ia_css_bnlm_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ia_css_bnlm_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr2_2/ia_css_bnr2_2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/bnr/bnr_1.0/ia_css_bnr_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_1.0/ia_css_cnr.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_1.0/ia_css_cnr_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/cnr/cnr_2/ia_css_cnr2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/conversion/conversion_1.0/ia_css_conversion_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/copy_output/copy_output_1.0/ia_css_copy_output_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/crop/crop_1.0/ia_css_crop_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/crop/crop_1.0/ia_css_crop_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/csc/csc_1.0/ia_css_csc_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc2/ia_css_ctc2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_table.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/ia_css_ctc_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_1.0/ia_css_de_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_1.0/ia_css_de_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/de/de_2/ia_css_de2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/de/de_2/ia_css_de2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dpc2/ia_css_dpc2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ia_css_dpc2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/eed1_8/ia_css_eed1_8_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/eed1_8/ia_css_eed1_8_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fc/fc_1.0/ia_css_formats_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fc/fc_1.0/ia_css_formats_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_table.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_1.0/ia_css_gc_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_1.0/ia_css_gc_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_table.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_table.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_table.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_table.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/gc/gc_2/ia_css_gc2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/gc/gc_2/ia_css_gc2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/hdr/ia_css_hdr_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/hdr/ia_css_hdr_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/bayer_io_ls/ia_css_bayer_io_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/common/ia_css_common_io_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/common/ia_css_common_io_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/iterator/iterator_1.0/ia_css_iterator_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/iterator/iterator_1.0/ia_css_iterator_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_table.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc1_5/ia_css_macc1_5_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_table.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/macc/macc_1.0/ia_css_macc_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/macc/macc_1.0/ia_css_macc_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/norm/norm_1.0/ia_css_norm.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/norm/norm_1.0/ia_css_norm.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/norm/norm_1.0/ia_css_norm.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/norm/norm_1.0/ia_css_norm.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/norm/norm_1.0/ia_css_norm_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/norm/norm_1.0/ia_css_norm_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/norm/norm_1.0/ia_css_norm_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob2/ia_css_ob2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob2/ia_css_ob2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ob/ob_1.0/ia_css_ob_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ia_css_ob_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/output/output_1.0/ia_css_output_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/output/output_1.0/ia_css_output_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/qplane/qplane_2/ia_css_qplane_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw/raw_1.0/ia_css_raw_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/raw/raw_1.0/ia_css_raw_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref_state.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_state.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref_state.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ref/ref_1.0/ia_css_ref_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ref/ref_1.0/ia_css_ref_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ia_css_s3a_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sc/sc_1.0/ia_css_sc_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/common/ia_css_sdis_common.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/common/ia_css_sdis_common.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/common/ia_css_sdis_common_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/common/ia_css_sdis_common_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/common/ia_css_sdis_common_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_1.0/ia_css_sdis_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tdf/tdf_1.0/ia_css_tdf_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr3/ia_css_tnr3_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_state.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/tnr/tnr_1.0/ia_css_tnr_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/uds/uds_1.0/ia_css_uds_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/uds/uds_1.0/ia_css_uds_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/uds/uds_1.0/ia_css_uds_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/uds/uds_1.0/ia_css_uds_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/vf/vf_1.0/ia_css_vf_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/wb/wb_1.0/ia_css_wb_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/wb/wb_1.0/ia_css_wb_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_table.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_1.0/ia_css_ynr_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h b/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h rename to drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/ia_css_ynr2_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h b/drivers/staging/media/atomisp/pci/isp/modes/interface/input_buf.isp.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/input_buf.isp.h rename to drivers/staging/media/atomisp/pci/isp/modes/interface/input_buf.isp.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h b/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_const.h rename to drivers/staging/media/atomisp/pci/isp/modes/interface/isp_const.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h b/drivers/staging/media/atomisp/pci/isp/modes/interface/isp_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/modes/interface/isp_types.h rename to drivers/staging/media/atomisp/pci/isp/modes/interface/isp_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/isp2400_input_system_global.h b/drivers/staging/media/atomisp/pci/isp2400_input_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/isp2400_input_system_global.h rename to drivers/staging/media/atomisp/pci/isp2400_input_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_local.h b/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_local.h rename to drivers/staging/media/atomisp/pci/isp2400_input_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_private.h b/drivers/staging/media/atomisp/pci/isp2400_input_system_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_private.h rename to drivers/staging/media/atomisp/pci/isp2400_input_system_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_public.h b/drivers/staging/media/atomisp/pci/isp2400_input_system_public.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_input_system_public.h rename to drivers/staging/media/atomisp/pci/isp2400_input_system_public.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_support.h b/drivers/staging/media/atomisp/pci/isp2400_support.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_support.h rename to drivers/staging/media/atomisp/pci/isp2400_support.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_global.h b/drivers/staging/media/atomisp/pci/isp2400_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_global.h rename to drivers/staging/media/atomisp/pci/isp2400_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_local.h b/drivers/staging/media/atomisp/pci/isp2400_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2400_system_local.h rename to drivers/staging/media/atomisp/pci/isp2400_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_global.h b/drivers/staging/media/atomisp/pci/isp2401_input_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_global.h rename to drivers/staging/media/atomisp/pci/isp2401_input_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_local.h b/drivers/staging/media/atomisp/pci/isp2401_input_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_local.h rename to drivers/staging/media/atomisp/pci/isp2401_input_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_private.h b/drivers/staging/media/atomisp/pci/isp2401_input_system_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_input_system_private.h rename to drivers/staging/media/atomisp/pci/isp2401_input_system_private.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h b/drivers/staging/media/atomisp/pci/isp2401_mamoiada_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_mamoiada_params.h rename to drivers/staging/media/atomisp/pci/isp2401_mamoiada_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_global.h b/drivers/staging/media/atomisp/pci/isp2401_system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_global.h rename to drivers/staging/media/atomisp/pci/isp2401_system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_local.h b/drivers/staging/media/atomisp/pci/isp2401_system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp2401_system_local.h rename to drivers/staging/media/atomisp/pci/isp2401_system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_acquisition_defs.h b/drivers/staging/media/atomisp/pci/isp_acquisition_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_acquisition_defs.h rename to drivers/staging/media/atomisp/pci/isp_acquisition_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_capture_defs.h b/drivers/staging/media/atomisp/pci/isp_capture_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/isp_capture_defs.h rename to drivers/staging/media/atomisp/pci/isp_capture_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c b/drivers/staging/media/atomisp/pci/memory_realloc.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/memory_realloc.c rename to drivers/staging/media/atomisp/pci/memory_realloc.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/mmu/isp_mmu.c rename to drivers/staging/media/atomisp/pci/mmu/isp_mmu.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c b/drivers/staging/media/atomisp/pci/mmu/sh_mmu_mrfld.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/mmu/sh_mmu_mrfld.c rename to drivers/staging/media/atomisp/pci/mmu/sh_mmu_mrfld.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/mmu_defs.h b/drivers/staging/media/atomisp/pci/mmu_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/mmu_defs.h rename to drivers/staging/media/atomisp/pci/mmu_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h b/drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/interface/ia_css_binary.h rename to drivers/staging/media/atomisp/pci/runtime/binary/interface/ia_css_binary.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/binary/src/binary.c rename to drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h b/drivers/staging/media/atomisp/pci/runtime/bufq/interface/ia_css_bufq.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq.h rename to drivers/staging/media/atomisp/pci/runtime/bufq/interface/ia_css_bufq.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h b/drivers/staging/media/atomisp/pci/runtime/bufq/interface/ia_css_bufq_comm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/interface/ia_css_bufq_comm.h rename to drivers/staging/media/atomisp/pci/runtime/bufq/interface/ia_css_bufq_comm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c b/drivers/staging/media/atomisp/pci/runtime/bufq/src/bufq.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/bufq/src/bufq.c rename to drivers/staging/media/atomisp/pci/runtime/bufq/src/bufq.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h b/drivers/staging/media/atomisp/pci/runtime/debug/interface/ia_css_debug.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug.h rename to drivers/staging/media/atomisp/pci/runtime/debug/interface/ia_css_debug.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h b/drivers/staging/media/atomisp/pci/runtime/debug/interface/ia_css_debug_internal.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_internal.h rename to drivers/staging/media/atomisp/pci/runtime/debug/interface/ia_css_debug_internal.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h b/drivers/staging/media/atomisp/pci/runtime/debug/interface/ia_css_debug_pipe.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/interface/ia_css_debug_pipe.h rename to drivers/staging/media/atomisp/pci/runtime/debug/interface/ia_css_debug_pipe.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/debug/src/ia_css_debug.c rename to drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h b/drivers/staging/media/atomisp/pci/runtime/event/interface/ia_css_event.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/interface/ia_css_event.h rename to drivers/staging/media/atomisp/pci/runtime/event/interface/ia_css_event.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c b/drivers/staging/media/atomisp/pci/runtime/event/src/event.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/event/src/event.c rename to drivers/staging/media/atomisp/pci/runtime/event/src/event.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h b/drivers/staging/media/atomisp/pci/runtime/eventq/interface/ia_css_eventq.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/interface/ia_css_eventq.h rename to drivers/staging/media/atomisp/pci/runtime/eventq/interface/ia_css_eventq.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c b/drivers/staging/media/atomisp/pci/runtime/eventq/src/eventq.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/eventq/src/eventq.c rename to drivers/staging/media/atomisp/pci/runtime/eventq/src/eventq.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h b/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame.h rename to drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h b/drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame_comm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/interface/ia_css_frame_comm.h rename to drivers/staging/media/atomisp/pci/runtime/frame/interface/ia_css_frame_comm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/frame/src/frame.c rename to drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h b/drivers/staging/media/atomisp/pci/runtime/ifmtr/interface/ia_css_ifmtr.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/interface/ia_css_ifmtr.h rename to drivers/staging/media/atomisp/pci/runtime/ifmtr/interface/ia_css_ifmtr.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c b/drivers/staging/media/atomisp/pci/runtime/ifmtr/src/ifmtr.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/ifmtr/src/ifmtr.c rename to drivers/staging/media/atomisp/pci/runtime/ifmtr/src/ifmtr.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h b/drivers/staging/media/atomisp/pci/runtime/inputfifo/interface/ia_css_inputfifo.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/interface/ia_css_inputfifo.h rename to drivers/staging/media/atomisp/pci/runtime/inputfifo/interface/ia_css_inputfifo.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c b/drivers/staging/media/atomisp/pci/runtime/inputfifo/src/inputfifo.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/inputfifo/src/inputfifo.c rename to drivers/staging/media/atomisp/pci/runtime/inputfifo/src/inputfifo.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h b/drivers/staging/media/atomisp/pci/runtime/isp_param/interface/ia_css_isp_param.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param.h rename to drivers/staging/media/atomisp/pci/runtime/isp_param/interface/ia_css_isp_param.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h b/drivers/staging/media/atomisp/pci/runtime/isp_param/interface/ia_css_isp_param_types.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/interface/ia_css_isp_param_types.h rename to drivers/staging/media/atomisp/pci/runtime/isp_param/interface/ia_css_isp_param_types.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c b/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isp_param/src/isp_param.c rename to drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h b/drivers/staging/media/atomisp/pci/runtime/isys/interface/ia_css_isys.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys.h rename to drivers/staging/media/atomisp/pci/runtime/isys/interface/ia_css_isys.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h b/drivers/staging/media/atomisp/pci/runtime/isys/interface/ia_css_isys_comm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/interface/ia_css_isys_comm.h rename to drivers/staging/media/atomisp/pci/runtime/isys/interface/ia_css_isys_comm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.c rename to drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h b/drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/csi_rx_rmgr.h rename to drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.c rename to drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h b/drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/ibuf_ctrl_rmgr.h rename to drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.c rename to drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_dma_rmgr.h rename to drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_init.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_init.c rename to drivers/staging/media/atomisp/pci/runtime/isys/src/isys_init.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.c rename to drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/isys_stream2mmio_rmgr.h rename to drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/rx.c rename to drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.c rename to drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/isys/src/virtual_isys.h rename to drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h b/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline.h rename to drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h b/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline_common.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/interface/ia_css_pipeline_common.h rename to drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline_common.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/pipeline/src/pipeline.c rename to drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h b/drivers/staging/media/atomisp/pci/runtime/queue/interface/ia_css_queue.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue.h rename to drivers/staging/media/atomisp/pci/runtime/queue/interface/ia_css_queue.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h b/drivers/staging/media/atomisp/pci/runtime/queue/interface/ia_css_queue_comm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/interface/ia_css_queue_comm.h rename to drivers/staging/media/atomisp/pci/runtime/queue/interface/ia_css_queue_comm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c b/drivers/staging/media/atomisp/pci/runtime/queue/src/queue.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue.c rename to drivers/staging/media/atomisp/pci/runtime/queue/src/queue.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c b/drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.c rename to drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h b/drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/queue/src/queue_access.h rename to drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h b/drivers/staging/media/atomisp/pci/runtime/rmgr/interface/ia_css_rmgr.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr.h rename to drivers/staging/media/atomisp/pci/runtime/rmgr/interface/ia_css_rmgr.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h b/drivers/staging/media/atomisp/pci/runtime/rmgr/interface/ia_css_rmgr_vbuf.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/interface/ia_css_rmgr_vbuf.h rename to drivers/staging/media/atomisp/pci/runtime/rmgr/interface/ia_css_rmgr_vbuf.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr.c b/drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr.c rename to drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c b/drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr_vbuf.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/rmgr/src/rmgr_vbuf.c rename to drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr_vbuf.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h b/drivers/staging/media/atomisp/pci/runtime/spctrl/interface/ia_css_spctrl.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl.h rename to drivers/staging/media/atomisp/pci/runtime/spctrl/interface/ia_css_spctrl.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl_comm.h b/drivers/staging/media/atomisp/pci/runtime/spctrl/interface/ia_css_spctrl_comm.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/interface/ia_css_spctrl_comm.h rename to drivers/staging/media/atomisp/pci/runtime/spctrl/interface/ia_css_spctrl_comm.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/src/spctrl.c b/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/spctrl/src/spctrl.c rename to drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h b/drivers/staging/media/atomisp/pci/runtime/tagger/interface/ia_css_tagger_common.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/tagger/interface/ia_css_tagger_common.h rename to drivers/staging/media/atomisp/pci/runtime/tagger/interface/ia_css_tagger_common.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c b/drivers/staging/media/atomisp/pci/runtime/timer/src/timer.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/runtime/timer/src/timer.c rename to drivers/staging/media/atomisp/pci/runtime/timer/src/timer.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/scalar_processor_2400_params.h b/drivers/staging/media/atomisp/pci/scalar_processor_2400_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/scalar_processor_2400_params.h rename to drivers/staging/media/atomisp/pci/scalar_processor_2400_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css.c rename to drivers/staging/media/atomisp/pci/sh_css.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h b/drivers/staging/media/atomisp/pci/sh_css_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_defs.h rename to drivers/staging/media/atomisp/pci/sh_css_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_dvs_info.h b/drivers/staging/media/atomisp/pci/sh_css_dvs_info.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_dvs_info.h rename to drivers/staging/media/atomisp/pci/sh_css_dvs_info.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/sh_css_firmware.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c rename to drivers/staging/media/atomisp/pci/sh_css_firmware.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h b/drivers/staging/media/atomisp/pci/sh_css_firmware.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.h rename to drivers/staging/media/atomisp/pci/sh_css_firmware.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h b/drivers/staging/media/atomisp/pci/sh_css_frac.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_frac.h rename to drivers/staging/media/atomisp/pci/sh_css_frac.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_host_data.c b/drivers/staging/media/atomisp/pci/sh_css_host_data.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_host_data.c rename to drivers/staging/media/atomisp/pci/sh_css_host_data.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c b/drivers/staging/media/atomisp/pci/sh_css_hrt.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.c rename to drivers/staging/media/atomisp/pci/sh_css_hrt.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.h b/drivers/staging/media/atomisp/pci/sh_css_hrt.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_hrt.h rename to drivers/staging/media/atomisp/pci/sh_css_hrt.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h b/drivers/staging/media/atomisp/pci/sh_css_internal.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_internal.h rename to drivers/staging/media/atomisp/pci/sh_css_internal.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h b/drivers/staging/media/atomisp/pci/sh_css_legacy.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_legacy.h rename to drivers/staging/media/atomisp/pci/sh_css_legacy.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metadata.c b/drivers/staging/media/atomisp/pci/sh_css_metadata.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metadata.c rename to drivers/staging/media/atomisp/pci/sh_css_metadata.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c b/drivers/staging/media/atomisp/pci/sh_css_metrics.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.c rename to drivers/staging/media/atomisp/pci/sh_css_metrics.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h b/drivers/staging/media/atomisp/pci/sh_css_metrics.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_metrics.h rename to drivers/staging/media/atomisp/pci/sh_css_metrics.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c b/drivers/staging/media/atomisp/pci/sh_css_mipi.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.c rename to drivers/staging/media/atomisp/pci/sh_css_mipi.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h b/drivers/staging/media/atomisp/pci/sh_css_mipi.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mipi.h rename to drivers/staging/media/atomisp/pci/sh_css_mipi.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c b/drivers/staging/media/atomisp/pci/sh_css_mmu.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_mmu.c rename to drivers/staging/media/atomisp/pci/sh_css_mmu.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_morph.c b/drivers/staging/media/atomisp/pci/sh_css_morph.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_morph.c rename to drivers/staging/media/atomisp/pci/sh_css_morph.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c b/drivers/staging/media/atomisp/pci/sh_css_param_dvs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.c rename to drivers/staging/media/atomisp/pci/sh_css_param_dvs.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h b/drivers/staging/media/atomisp/pci/sh_css_param_dvs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_dvs.h rename to drivers/staging/media/atomisp/pci/sh_css_param_dvs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c b/drivers/staging/media/atomisp/pci/sh_css_param_shading.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.c rename to drivers/staging/media/atomisp/pci/sh_css_param_shading.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h b/drivers/staging/media/atomisp/pci/sh_css_param_shading.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_param_shading.h rename to drivers/staging/media/atomisp/pci/sh_css_param_shading.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c b/drivers/staging/media/atomisp/pci/sh_css_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.c rename to drivers/staging/media/atomisp/pci/sh_css_params.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h b/drivers/staging/media/atomisp/pci/sh_css_params.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params.h rename to drivers/staging/media/atomisp/pci/sh_css_params.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params_internal.h b/drivers/staging/media/atomisp/pci/sh_css_params_internal.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_params_internal.h rename to drivers/staging/media/atomisp/pci/sh_css_params_internal.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_pipe.c b/drivers/staging/media/atomisp/pci/sh_css_pipe.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_pipe.c rename to drivers/staging/media/atomisp/pci/sh_css_pipe.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c b/drivers/staging/media/atomisp/pci/sh_css_properties.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_properties.c rename to drivers/staging/media/atomisp/pci/sh_css_properties.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_shading.c b/drivers/staging/media/atomisp/pci/sh_css_shading.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_shading.c rename to drivers/staging/media/atomisp/pci/sh_css_shading.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c b/drivers/staging/media/atomisp/pci/sh_css_sp.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.c rename to drivers/staging/media/atomisp/pci/sh_css_sp.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h b/drivers/staging/media/atomisp/pci/sh_css_sp.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_sp.h rename to drivers/staging/media/atomisp/pci/sh_css_sp.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream.c b/drivers/staging/media/atomisp/pci/sh_css_stream.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream.c rename to drivers/staging/media/atomisp/pci/sh_css_stream.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c b/drivers/staging/media/atomisp/pci/sh_css_stream_format.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.c rename to drivers/staging/media/atomisp/pci/sh_css_stream_format.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h b/drivers/staging/media/atomisp/pci/sh_css_stream_format.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_stream_format.h rename to drivers/staging/media/atomisp/pci/sh_css_stream_format.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h b/drivers/staging/media/atomisp/pci/sh_css_struct.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_struct.h rename to drivers/staging/media/atomisp/pci/sh_css_struct.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h b/drivers/staging/media/atomisp/pci/sh_css_uds.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_uds.h rename to drivers/staging/media/atomisp/pci/sh_css_uds.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c b/drivers/staging/media/atomisp/pci/sh_css_version.c similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_version.c rename to drivers/staging/media/atomisp/pci/sh_css_version.c diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/str2mem_defs.h b/drivers/staging/media/atomisp/pci/str2mem_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/str2mem_defs.h rename to drivers/staging/media/atomisp/pci/str2mem_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/streaming_to_mipi_defs.h b/drivers/staging/media/atomisp/pci/streaming_to_mipi_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/streaming_to_mipi_defs.h rename to drivers/staging/media/atomisp/pci/streaming_to_mipi_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_global.h b/drivers/staging/media/atomisp/pci/system_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/system_global.h rename to drivers/staging/media/atomisp/pci/system_global.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/system_local.h b/drivers/staging/media/atomisp/pci/system_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/system_local.h rename to drivers/staging/media/atomisp/pci/system_local.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/timed_controller_defs.h b/drivers/staging/media/atomisp/pci/timed_controller_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/timed_controller_defs.h rename to drivers/staging/media/atomisp/pci/timed_controller_defs.h diff --git a/drivers/staging/media/atomisp/pci/atomisp2/css2400/version.h b/drivers/staging/media/atomisp/pci/version.h similarity index 100% rename from drivers/staging/media/atomisp/pci/atomisp2/css2400/version.h rename to drivers/staging/media/atomisp/pci/version.h -- GitLab From 8d4af3102d648df0d3d8e9ee8a36f7137b2e9a1c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 12:12:25 +0200 Subject: [PATCH 440/503] media: atomisp: get rid of some broken code Probably due to some version conflicts while the atomisp code were generated, some things don't build for ISP2401. So, use the ISP2400 variant when available, or get rid of the code that doesn't build. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/ia_css_types.h | 4 --- .../pci/runtime/debug/src/ia_css_debug.c | 3 --- drivers/staging/media/atomisp/pci/sh_css.c | 26 +++++-------------- .../staging/media/atomisp/pci/sh_css_params.c | 9 ------- drivers/staging/media/atomisp/pci/sh_css_sp.c | 9 ------- 5 files changed, 6 insertions(+), 45 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/ia_css_types.h b/drivers/staging/media/atomisp/pci/ia_css_types.h index 08e9b24c3d93f..d3584756e34ec 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_types.h +++ b/drivers/staging/media/atomisp/pci/ia_css_types.h @@ -589,10 +589,6 @@ struct ia_css_isp_config { struct ia_css_output_config *output_config; /** Main Output Mirroring, flipping */ - /* ISP 2401 */ - struct ia_css_tnr3_kernel_config - *tnr3_config; /** TNR3 config */ - struct ia_css_scaler_config *scaler_config; /** Skylake: scaler config (optional) */ struct ia_css_formats_config diff --git a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c index c17e36dac8623..da0df52896f3f 100644 --- a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c @@ -49,9 +49,6 @@ #include "assert_support.h" #include "print_support.h" #include "string_support.h" -#ifdef ISP2401 -#include "ia_css_system_ctrl.h" -#endif #include "fifo_monitor.h" diff --git a/drivers/staging/media/atomisp/pci/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c index 76b110431407d..46a5e6ed7d29a 100644 --- a/drivers/staging/media/atomisp/pci/sh_css.c +++ b/drivers/staging/media/atomisp/pci/sh_css.c @@ -1522,7 +1522,6 @@ sh_css_invalidate_shading_tables(struct ia_css_stream *stream) "sh_css_invalidate_shading_tables() leave: return_void\n"); } -#ifndef ISP2401 static void enable_interrupts(enum ia_css_irq_type irq_type) { @@ -1564,8 +1563,6 @@ enable_interrupts(enum ia_css_irq_type irq_type) IA_CSS_LEAVE_PRIVATE(""); } -#endif - static bool sh_css_setup_spctrl_config(const struct ia_css_fw_info *fw, const char *program, ia_css_spctrl_cfg *spctrl_cfg) @@ -1736,11 +1733,8 @@ ia_css_init(const struct ia_css_env *env, enable = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_e) | GPIO_FLASH_PIN_MASK; sh_css_mmu_set_page_table_base_index(mmu_l1_base); -#ifndef ISP2401 + my_css_save.mmu_base = mmu_l1_base; -#else - ia_css_save_mmu_base_addr(mmu_l1_base); -#endif ia_css_reset_defaults(&my_css); @@ -1754,13 +1748,8 @@ ia_css_init(const struct ia_css_env *env, return err; } -#ifndef ISP2401 IA_CSS_LOG("init: %d", my_css_save_initialized); -#else - ia_css_save_restore_data_init(); -#endif -#ifndef ISP2401 if (!my_css_save_initialized) { my_css_save_initialized = true; @@ -1769,7 +1758,7 @@ ia_css_init(const struct ia_css_env *env, sizeof(struct sh_css_stream_seed) * MAX_ACTIVE_STREAMS); IA_CSS_LOG("init: %d mode=%d", my_css_save_initialized, my_css_save.mode); } -#endif + mipi_init(); #ifndef ISP2401 @@ -1779,11 +1768,9 @@ ia_css_init(const struct ia_css_env *env, #endif my_css.irq_type = irq_type; -#ifndef ISP2401 + my_css_save.irq_type = irq_type; -#else - ia_css_save_irq_type(irq_type); -#endif + enable_interrupts(my_css.irq_type); /* configure GPIO to output mode */ @@ -9442,12 +9429,9 @@ ia_css_stream_create(const struct ia_css_stream_config *stream_config, int i, j; enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; struct ia_css_metadata_info md_info; -#ifndef ISP2401 struct ia_css_resolution effective_res; -#else #ifdef USE_INPUT_SYSTEM_VERSION_2401 bool aspect_ratio_crop_enabled = false; -#endif #endif IA_CSS_ENTER("num_pipes=%d", num_pipes); @@ -9934,6 +9918,8 @@ ia_css_stream_destroy(struct ia_css_stream *stream) { ia_css_pipeline_is_mapped(stream->last_pipe->pipe_num)) { #if defined(USE_INPUT_SYSTEM_VERSION_2401) + bool free_mpi; + for (i = 0; i < stream->num_pipes; i++) { struct ia_css_pipe *entry = stream->pipes[i]; unsigned int sp_thread_id; diff --git a/drivers/staging/media/atomisp/pci/sh_css_params.c b/drivers/staging/media/atomisp/pci/sh_css_params.c index 224274c61a3d2..baa5259bcf917 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/sh_css_params.c @@ -2708,7 +2708,6 @@ ia_css_pipe_get_isp_config(struct ia_css_pipe *pipe, IA_CSS_LEAVE("void"); } -#ifndef ISP2401 /* * coding style says the return of "mmgr_NULL" is the error signal * @@ -2774,8 +2773,6 @@ static bool reallocate_buffer( return ret; } -#endif - struct ia_css_isp_3a_statistics * ia_css_isp_3a_statistics_allocate(const struct ia_css_3a_grid_info *grid) { @@ -3143,9 +3140,6 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, ia_css_sdis_clear_coefficients(¶ms->dvs_coefs); params->dis_coef_table_changed = true; -#ifdef ISP2401 - ia_css_tnr3_set_default_config(¶ms->tnr3_config); -#endif } else { ia_css_set_xnr3_config(params, &stream_params->xnr3_config); @@ -3945,9 +3939,6 @@ sh_css_param_update_isp_params(struct ia_css_pipe *curr_pipe, */ g_param_buffer_enqueue_count++; assert(g_param_buffer_enqueue_count < g_param_buffer_dequeue_count + 50); -#ifdef ISP2401 - ia_css_save_latest_paramset_ptr(pipe, cpy); -#endif /* * Tell the SP which queues are not empty, * by sending the software event. diff --git a/drivers/staging/media/atomisp/pci/sh_css_sp.c b/drivers/staging/media/atomisp/pci/sh_css_sp.c index 5eb45db5c6531..e574396ad0f43 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_sp.c +++ b/drivers/staging/media/atomisp/pci/sh_css_sp.c @@ -117,10 +117,6 @@ copy_isp_stage_to_sp_stage(void) */ sh_css_sp_stage.enable.sdis = sh_css_isp_stage.binary_info.enable.dis; sh_css_sp_stage.enable.s3a = sh_css_isp_stage.binary_info.enable.s3a; -#ifdef ISP2401 - sh_css_sp_stage.enable.lace_stats = - sh_css_isp_stage.binary_info.enable.lace_stats; -#endif } void @@ -827,11 +823,6 @@ configure_isp_from_args( const struct sh_css_binary_args *args, bool two_ppc, bool deinterleaved) { -#ifdef ISP2401 - struct ia_css_pipe *pipe = find_pipe_by_num(pipeline->pipe_num); - const struct ia_css_resolution *res; - -#endif ia_css_fpn_configure(binary, &binary->in_frame_info); ia_css_crop_configure(binary, &args->delay_frames[0]->info); ia_css_qplane_configure(pipeline, binary, &binary->in_frame_info); -- GitLab From fe4586ca23ae68e307b75a8d7d7ee248e1a59949 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 12:30:07 +0200 Subject: [PATCH 441/503] media: atomisp: change function worders and fix include With the current way, it will produce lots of errors because the public header contains wrong definitions and the private one has functions defined at the wrong order. Signed-off-by: Mauro Carvalho Chehab --- .../host/csi_rx_private.h | 165 +++++++++--------- 1 file changed, 83 insertions(+), 82 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h index 940e79c7e3378..3fa3c3a487ab6 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h +++ b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h @@ -17,18 +17,100 @@ #include "rx_csi_defs.h" #include "mipi_backend_defs.h" -#include "csi_rx_public.h" +#include "csi_rx.h" #include "device_access.h" /* ia_css_device_load_uint32 */ #include "assert_support.h" /* assert */ #include "print_support.h" /* print */ +/***************************************************** + * + * Device level interface (DLI). + * + *****************************************************/ +/** + * @brief Load the register value. + * Refer to "csi_rx_public.h" for details. + */ +static inline hrt_data csi_rx_fe_ctrl_reg_load( + const csi_rx_frontend_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_CSI_RX_FRONTEND_ID); + assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof( + hrt_data)); +} + +/** + * @brief Store a value to the register. + * Refer to "ibuf_ctrl_public.h" for details. + */ +static inline void csi_rx_fe_ctrl_reg_store( + const csi_rx_frontend_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_CSI_RX_FRONTEND_ID); + assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); + + ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), + value); +} + +/** + * @brief Load the register value. + * Refer to "csi_rx_public.h" for details. + */ +static inline hrt_data csi_rx_be_ctrl_reg_load( + const csi_rx_backend_ID_t ID, + const hrt_address reg) +{ + assert(ID < N_CSI_RX_BACKEND_ID); + assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); + return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof( + hrt_data)); +} + +/** + * @brief Store a value to the register. + * Refer to "ibuf_ctrl_public.h" for details. + */ +static inline void csi_rx_be_ctrl_reg_store( + const csi_rx_backend_ID_t ID, + const hrt_address reg, + const hrt_data value) +{ + assert(ID < N_CSI_RX_BACKEND_ID); + assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); + + ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data), + value); +} + +/* end of DLI */ + /***************************************************** * * Native command interface (NCI). * *****************************************************/ +/** + * @brief Get the state of the csi rx fe dlane process. + * Refer to "csi_rx_public.h" for details. + */ +static inline void csi_rx_fe_ctrl_get_dlane_state( + const csi_rx_frontend_ID_t ID, + const u32 lane, + csi_rx_fe_ctrl_lane_t *dlane_state) +{ + dlane_state->termen = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane)); + dlane_state->settle = + csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane)); +} + /** * @brief Get the csi rx fe state. * Refer to "csi_rx_public.h" for details. @@ -68,21 +150,6 @@ static inline void csi_rx_fe_ctrl_get_state( } } -/** - * @brief Get the state of the csi rx fe dlane process. - * Refer to "csi_rx_public.h" for details. - */ -static inline void csi_rx_fe_ctrl_get_dlane_state( - const csi_rx_frontend_ID_t ID, - const u32 lane, - csi_rx_fe_ctrl_lane_t *dlane_state) -{ - dlane_state->termen = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane)); - dlane_state->settle = - csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane)); -} - /** * @brief dump the csi rx fe state. * Refer to "csi_rx_public.h" for details. @@ -234,71 +301,5 @@ static inline void csi_rx_be_ctrl_dump_state( } /* end of NCI */ -/***************************************************** - * - * Device level interface (DLI). - * - *****************************************************/ -/** - * @brief Load the register value. - * Refer to "csi_rx_public.h" for details. - */ -static inline hrt_data csi_rx_fe_ctrl_reg_load( - const csi_rx_frontend_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_CSI_RX_FRONTEND_ID); - assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof( - hrt_data)); -} - -/** - * @brief Store a value to the register. - * Refer to "ibuf_ctrl_public.h" for details. - */ -static inline void csi_rx_fe_ctrl_reg_store( - const csi_rx_frontend_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_CSI_RX_FRONTEND_ID); - assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1); - - ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), - value); -} - -/** - * @brief Load the register value. - * Refer to "csi_rx_public.h" for details. - */ -static inline hrt_data csi_rx_be_ctrl_reg_load( - const csi_rx_backend_ID_t ID, - const hrt_address reg) -{ - assert(ID < N_CSI_RX_BACKEND_ID); - assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof( - hrt_data)); -} - -/** - * @brief Store a value to the register. - * Refer to "ibuf_ctrl_public.h" for details. - */ -static inline void csi_rx_be_ctrl_reg_store( - const csi_rx_backend_ID_t ID, - const hrt_address reg, - const hrt_data value) -{ - assert(ID < N_CSI_RX_BACKEND_ID); - assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1); - - ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data), - value); -} - -/* end of DLI */ #endif /* __CSI_RX_PRIVATE_H_INCLUDED__ */ -- GitLab From 085093606320ac76a062c99cf12e33c010417b4b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 11:32:18 +0200 Subject: [PATCH 442/503] media: atomisp: allow building for isp2401 Now that everything needed to build for ISP2401 is solved, we can setup atomisp to build either for ISP2400 or ISP2401. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Kconfig | 12 +++++++ drivers/staging/media/atomisp/Makefile | 47 +++++++++++++++++--------- 2 files changed, 43 insertions(+), 16 deletions(-) diff --git a/drivers/staging/media/atomisp/Kconfig b/drivers/staging/media/atomisp/Kconfig index dce6dd9bd7e1b..f9507b7b8906a 100644 --- a/drivers/staging/media/atomisp/Kconfig +++ b/drivers/staging/media/atomisp/Kconfig @@ -19,6 +19,18 @@ config VIDEO_ATOMISP To compile this driver as a module, choose M here: the module will be called atomisp +config VIDEO_ATOMISP_ISP2401 + bool "VIDEO_ATOMISP_ISP2401" + depends on VIDEO_ATOMISP + help + Enable support for Atom ISP2401-based boards. + + Select this option for Anniedale (Merrifield+ / Moorefield) + and Cherrytrail SoCs. + + Disabling it enables support for Atom ISP2400-based boards + (Merrifield and Baytrail SoCs). + if INTEL_ATOMISP source "drivers/staging/media/atomisp/i2c/Kconfig" endif diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index f09554f2afcc7..3c1c9bc0eebc4 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -157,6 +157,8 @@ atomisp-objs += \ pci/hive_isp_css_common/host/timed_ctrl.o \ pci/hive_isp_css_common/host/vmem.o \ pci/hive_isp_css_shared/host/tag.o \ + +obj-byt = \ pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.o \ pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.o \ pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.o \ @@ -166,7 +168,7 @@ atomisp-objs += \ # Keep them here handy for when we get to that point # -obj-cht= \ +obj-cht = \ pci/css_2401_system/spmem_dump.o \ pci/css_2401_csi2p_system/spmem_dump.o \ pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.o \ @@ -176,17 +178,11 @@ obj-cht= \ pci/css_2401_csi2p_system/host/ibuf_ctrl.o \ pci/css_2401_csi2p_system/host/isys_dma.o \ pci/css_2401_csi2p_system/host/isys_irq.o \ - pci/css_2401_csi2p_system/host/isys_stream2mmio.o \ - pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.o \ - pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.o \ - pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.o \ + pci/css_2401_csi2p_system/host/isys_stream2mmio.o -# -I$(atomisp)/pci/css_2401_system/hrt/ \ -# -I$(atomisp)/pci/css_2401_csi2p_system/ \ -# -I$(atomisp)/pci/css_2401_csi2p_system/host/ \ -# -I$(atomisp)/pci/css_2401_csi2p_system/hrt/ \ -# -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \ -# -I$(atomisp)/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ \ +# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.o \ +# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.o \ +# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.o \ INCLUDES += \ -I$(atomisp)/ \ @@ -199,9 +195,6 @@ INCLUDES += \ -I$(atomisp)/pci/base/refcount/interface/ \ -I$(atomisp)/pci/camera/pipe/interface/ \ -I$(atomisp)/pci/camera/util/interface/ \ - -I$(atomisp)/pci/css_2400_system/ \ - -I$(atomisp)/pci/css_2400_system/hive_isp_css_2400_system_generated/ \ - -I$(atomisp)/pci/css_2400_system/hrt/ \ -I$(atomisp)/pci/hive_isp_css_common/ \ -I$(atomisp)/pci/hive_isp_css_common/host/ \ -I$(atomisp)/pci/hive_isp_css_include/ \ @@ -325,6 +318,21 @@ INCLUDES += \ -I$(atomisp)/pci/runtime/spctrl/interface/ \ -I$(atomisp)/pci/runtime/tagger/interface/ +INCLUDES_byt += \ + -I$(atomisp)/pci/css_2400_system/ \ + -I$(atomisp)/pci/css_2400_system/hive_isp_css_2400_system_generated/ \ + -I$(atomisp)/pci/css_2400_system/hrt/ \ + +INCLUDES_cht += \ + -I$(atomisp)/pci/css_2401_csi2p_system/ \ + -I$(atomisp)/pci/css_2401_csi2p_system/host/ \ + -I$(atomisp)/pci/css_2401_csi2p_system/hive_isp_css_2400_system_generated/ \ + -I$(atomisp)/pci/css_2401_csi2p_system/hrt/ \ + +# -I$(atomisp)/pci/css_2401_system/hrt/ \ +# -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \ + + ifeq ($(CONFIG_ION),y) INCLUDES += -I$(srctree)/drivers/staging/android/ion endif @@ -337,8 +345,15 @@ DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__ #DEFINES += -DPUNIT_CAMERA_BUSY #DEFINES += -DUSE_KMEM_CACHE -DEFINES += -DATOMISP_POSTFIX=\"css2400b0_v21\" -DEFINES += -DSYSTEM_hive_isp_css_2400_system -DISP2400 +ifeq ($(CONFIG_VIDEO_ATOMISP_ISP2401),y) +atomisp-objs += $(obj-cht) +INCLUDES += $(INCLUDES_cht) +DEFINES += -DISP2401 -DISP2401_NEW_INPUT_SYSTEM -DSYSTEM_hive_isp_css_2401_system +else +atomisp-objs += $(obj-byt) +INCLUDES += $(INCLUDES_byt) +DEFINES += -DISP2400 -DSYSTEM_hive_isp_css_2400_system +endif ccflags-y += $(INCLUDES) $(DEFINES) -fno-common -- GitLab From 9935e2928ae6cf52bb813a001817515605250f2d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 14:15:18 +0200 Subject: [PATCH 443/503] media: atomisp: cleanup contents of css_2400_system/ Everything there is for ISP2400 only. So, we can trivially solve all ifdefs at once Signed-off-by: Mauro Carvalho Chehab --- .../ia_css_isp_configs.c | 30 - .../ia_css_isp_params.c | 99 - .../atomisp/pci/css_2400_system/spmem_dump.c | 1700 +---------------- 3 files changed, 1 insertion(+), 1828 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c index 9fae24b3e689f..3ef556a648253 100644 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c @@ -273,36 +273,6 @@ ia_css_configure_output( } /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#ifdef ISP2401 - -void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.sc.size; - offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; - } - if (size) { - ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ -#endif void ia_css_configure_raw( diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c index 28be9146530ad..2b90a7075b9b3 100644 --- a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c @@ -1722,31 +1722,6 @@ ia_css_process_xnr3( "ia_css_process_xnr3() leave:\n"); } } -#ifdef ISP2401 - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } -#endif } /* Code generated by genparam/gencode.c:gen_param_process_table() */ @@ -1838,10 +1813,8 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dp_config = *config; params->config_changed[IA_CSS_DP_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_DP_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); } @@ -1881,10 +1854,8 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->wb_config = *config; params->config_changed[IA_CSS_WB_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_WB_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); } @@ -1924,10 +1895,8 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->tnr_config = *config; params->config_changed[IA_CSS_TNR_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_TNR_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); } @@ -1967,10 +1936,8 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ob_config = *config; params->config_changed[IA_CSS_OB_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_OB_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); } @@ -2010,10 +1977,8 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->de_config = *config; params->config_changed[IA_CSS_DE_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_DE_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); } @@ -2053,10 +2018,8 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_config = *config; params->config_changed[IA_CSS_ANR_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_ANR_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); } @@ -2096,10 +2059,8 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_thres = *config; params->config_changed[IA_CSS_ANR2_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_ANR2_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); } @@ -2139,10 +2100,8 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ce_config = *config; params->config_changed[IA_CSS_CE_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_CE_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); } @@ -2182,10 +2141,8 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ecd_config = *config; params->config_changed[IA_CSS_ECD_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_ECD_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); } @@ -2225,10 +2182,8 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ynr_config = *config; params->config_changed[IA_CSS_YNR_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_YNR_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); } @@ -2268,10 +2223,8 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->fc_config = *config; params->config_changed[IA_CSS_FC_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_FC_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); } @@ -2311,10 +2264,8 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cnr_config = *config; params->config_changed[IA_CSS_CNR_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_CNR_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); } @@ -2354,10 +2305,8 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->macc_config = *config; params->config_changed[IA_CSS_MACC_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_MACC_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); } @@ -2397,10 +2346,8 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ctc_config = *config; params->config_changed[IA_CSS_CTC_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_CTC_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); } @@ -2438,10 +2385,8 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); params->aa_config = *config; params->config_changed[IA_CSS_AA_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_AA_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); } @@ -2481,10 +2426,8 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->yuv2rgb_cc_config = *config; params->config_changed[IA_CSS_YUV2RGB_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_YUV2RGB_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); } @@ -2524,10 +2467,8 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->rgb2yuv_cc_config = *config; params->config_changed[IA_CSS_RGB2YUV_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_RGB2YUV_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); } @@ -2567,10 +2508,8 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cc_config = *config; params->config_changed[IA_CSS_CSC_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_CSC_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); } @@ -2611,10 +2550,8 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->nr_config = *config; params->config_changed[IA_CSS_BNR_ID] = true; params->config_changed[IA_CSS_NR_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_NR_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); } @@ -2654,10 +2591,8 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->gc_config = *config; params->config_changed[IA_CSS_GC_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_GC_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); } @@ -2701,10 +2636,8 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } @@ -2748,10 +2681,8 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } @@ -2795,10 +2726,8 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } @@ -2842,10 +2771,8 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } @@ -2889,10 +2816,8 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } @@ -2936,10 +2861,8 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } @@ -2983,10 +2906,8 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } @@ -3030,10 +2951,8 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } @@ -3073,10 +2992,8 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->r_gamma_table = *config; params->config_changed[IA_CSS_R_GAMMA_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_R_GAMMA_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); } @@ -3116,10 +3033,8 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->g_gamma_table = *config; params->config_changed[IA_CSS_G_GAMMA_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_G_GAMMA_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); } @@ -3159,10 +3074,8 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->b_gamma_table = *config; params->config_changed[IA_CSS_B_GAMMA_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_B_GAMMA_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); } @@ -3203,10 +3116,8 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; params->config_changed[IA_CSS_XNR_TABLE_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_XNR_TABLE_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); } @@ -3246,10 +3157,8 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->formats_config = *config; params->config_changed[IA_CSS_FORMATS_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_FORMATS_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); } @@ -3289,10 +3198,8 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_config = *config; params->config_changed[IA_CSS_XNR_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_XNR_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); } @@ -3332,10 +3239,8 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr3_config = *config; params->config_changed[IA_CSS_XNR3_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_XNR3_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); } @@ -3376,10 +3281,8 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->s3a_config = *config; params->config_changed[IA_CSS_BH_ID] = true; params->config_changed[IA_CSS_S3A_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_S3A_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); } @@ -3419,10 +3322,8 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->output_config = *config; params->config_changed[IA_CSS_OUTPUT_ID] = true; -#ifndef ISP2401 params->config_changed[IA_CSS_OUTPUT_ID] = true; -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); } diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c index a7bbb31b46077..300347dbba2b8 100644 --- a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c @@ -21,17 +21,9 @@ #define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) -#ifndef ISP2401 /* function input_system_acquisition_stop: ADE */ -#else -/* function input_system_acquisition_stop: AD8 */ -#endif -#ifndef ISP2401 /* function longjmp: 684E */ -#else -/* function longjmp: 69C1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_HIVE_IF_SRST_MASK @@ -45,206 +37,104 @@ #define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 #define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 -#ifndef ISP2401 /* function tmpmem_init_dmem: 6580 */ -#else -/* function tmpmem_init_dmem: 66BB */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_receive_ack: 5EC4 */ -#else -/* function ia_css_isys_sp_token_map_receive_ack: 5FFF */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_set_addr_B: 332C */ -#else -/* function ia_css_dmaproxy_sp_set_addr_B: 3520 */ - -/* function ia_css_pipe_data_init_tagger_resources: A4F */ -#endif /* function debug_buffer_set_ddr_addr: DD */ -#ifndef ISP2401 /* function receiver_port_reg_load: AC2 */ -#else -/* function receiver_port_reg_load: ABC */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_mipi #define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_vbuf_mipi 0x631C -#else -#define HIVE_ADDR_vbuf_mipi 0x6378 -#endif #define HIVE_SIZE_vbuf_mipi 12 #else #endif #endif #define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_vbuf_mipi 0x631C -#else -#define HIVE_ADDR_sp_vbuf_mipi 0x6378 -#endif #define HIVE_SIZE_sp_vbuf_mipi 12 -#ifndef ISP2401 /* function ia_css_event_sp_decode: 351D */ -#else -/* function ia_css_event_sp_decode: 3711 */ -#endif -#ifndef ISP2401 /* function ia_css_queue_get_size: 48A5 */ -#else -/* function ia_css_queue_get_size: 4B2D */ -#endif -#ifndef ISP2401 /* function ia_css_queue_load: 4EE6 */ -#else -/* function ia_css_queue_load: 5144 */ -#endif -#ifndef ISP2401 /* function setjmp: 6857 */ -#else -/* function setjmp: 69CA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue #define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x4684 -#else -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x46CC -#endif #define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x4684 -#else -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x46CC -#endif #define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_wait_for_ack: 6E07 */ -#else -/* function ia_css_dmaproxy_sp_wait_for_ack: 6F4B */ -#endif -#ifndef ISP2401 /* function ia_css_sp_rawcopy_func: 510B */ -#else -/* function ia_css_sp_rawcopy_func: 5369 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_pop_marked: 29F7 */ -#else -/* function ia_css_tagger_buf_sp_pop_marked: 2B99 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stage #define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_isp_stage 0x5C00 -#else -#define HIVE_ADDR_isp_stage 0x5C60 -#endif #define HIVE_SIZE_isp_stage 832 #else #endif #endif #define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_stage 0x5C00 -#else -#define HIVE_ADDR_sp_isp_stage 0x5C60 -#endif #define HIVE_SIZE_sp_isp_stage 832 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_raw #define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_vbuf_raw 0x2F4 -#else -#define HIVE_ADDR_vbuf_raw 0x30C -#endif #define HIVE_SIZE_vbuf_raw 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_vbuf_raw 0x2F4 -#else -#define HIVE_ADDR_sp_vbuf_raw 0x30C -#endif #define HIVE_SIZE_sp_vbuf_raw 4 -#ifndef ISP2401 /* function ia_css_sp_bin_copy_func: 5032 */ -#else -/* function ia_css_sp_bin_copy_func: 5290 */ -#endif -#ifndef ISP2401 /* function ia_css_queue_item_store: 4C34 */ -#else -/* function ia_css_queue_item_store: 4E92 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 /* function sp_start_isp: 45D */ @@ -252,96 +142,55 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_binary_group #define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_binary_group 0x5FF0 -#else -#define HIVE_ADDR_sp_binary_group 0x6050 -#endif #define HIVE_SIZE_sp_binary_group 32 #else #endif #endif #define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_binary_group 0x5FF0 -#else -#define HIVE_ADDR_sp_sp_binary_group 0x6050 -#endif #define HIVE_SIZE_sp_sp_binary_group 32 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sw_state #define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sw_state 0x62AC -#else -#define HIVE_ADDR_sp_sw_state 0x6308 -#endif #define HIVE_SIZE_sp_sw_state 4 #else #endif #endif #define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_sw_state 0x62AC -#else -#define HIVE_ADDR_sp_sp_sw_state 0x6308 -#endif #define HIVE_SIZE_sp_sp_sw_state 4 -#ifndef ISP2401 /* function ia_css_thread_sp_main: D5B */ -#else -/* function ia_css_thread_sp_main: D50 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_init_internal_buffers: 3723 */ -#else -/* function ia_css_ispctrl_sp_init_internal_buffers: 3952 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_psys_event_queue_handle #define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4B54 -#else -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4BB0 -#endif #define HIVE_SIZE_sp2host_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4B54 -#else -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4BB0 -#endif #define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue #define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x4698 -#else -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x46E0 -#endif #define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x4698 -#else -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x46E0 -#endif #define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 -#ifndef ISP2401 /* function ia_css_tagger_sp_propagate_frame: 2410 */ #ifndef HIVE_MULTIPLE_PROGRAMS @@ -355,99 +204,48 @@ #define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem #define HIVE_ADDR_sp_sp_stop_copy_preview 0x6290 #define HIVE_SIZE_sp_sp_stop_copy_preview 4 -#else -/* function ia_css_tagger_sp_propagate_frame: 2460 */ -#endif -#ifndef ISP2401 /* function input_system_reg_load: B17 */ -#else -/* function input_system_reg_load: B11 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_handles #define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_vbuf_handles 0x6328 -#else -#define HIVE_ADDR_vbuf_handles 0x6384 -#endif #define HIVE_SIZE_vbuf_handles 960 #else #endif #endif #define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_vbuf_handles 0x6328 -#else -#define HIVE_ADDR_sp_vbuf_handles 0x6384 -#endif #define HIVE_SIZE_sp_vbuf_handles 960 -#ifndef ISP2401 /* function ia_css_queue_store: 4D9A */ /* function ia_css_sp_flash_register: 2C2C */ -#else -/* function ia_css_queue_store: 4FF8 */ -#endif -#ifndef ISP2401 /* function ia_css_sp_rawcopy_dummy_function: 5652 */ -#else -/* function ia_css_sp_flash_register: 2DCE */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_create: 5B37 */ -#else -/* function ia_css_isys_sp_backend_create: 5C72 */ -#endif -#ifndef ISP2401 /* function ia_css_pipeline_sp_init: 1833 */ -#else -/* function ia_css_pipeline_sp_init: 186D */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_configure: 2300 */ -#else -/* function ia_css_tagger_sp_configure: 2350 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_end_binary: 3566 */ -#else -/* function ia_css_ispctrl_sp_end_binary: 375A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#else -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC -#endif #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#ifndef ISP2401 /* function receiver_port_reg_store: AC9 */ -#else -/* function receiver_port_reg_store: AC3 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_is_pending_mask @@ -464,364 +262,182 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_frame #define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_all_cb_elems_frame 0x46AC -#else -#define HIVE_ADDR_sp_all_cb_elems_frame 0x46F4 -#endif #define HIVE_SIZE_sp_all_cb_elems_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46AC -#else -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46F4 -#endif #define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_isys_event_queue_handle #define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4B74 -#else -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4BD0 -#endif #define HIVE_SIZE_sp2host_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4B74 -#else -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4BD0 -#endif #define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_com #define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_host_sp_com 0x4114 -#else -#define HIVE_ADDR_host_sp_com 0x4134 -#endif #define HIVE_SIZE_host_sp_com 220 #else #endif #endif #define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_host_sp_com 0x4114 -#else -#define HIVE_ADDR_sp_host_sp_com 0x4134 -#endif #define HIVE_SIZE_sp_host_sp_com 220 -#ifndef ISP2401 /* function ia_css_queue_get_free_space: 49F9 */ -#else -/* function ia_css_queue_get_free_space: 4C57 */ -#endif -#ifndef ISP2401 /* function exec_image_pipe: 6C4 */ -#else -/* function exec_image_pipe: 658 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_init_dmem_data #define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_init_dmem_data 0x62B0 -#else -#define HIVE_ADDR_sp_init_dmem_data 0x630C -#endif #define HIVE_SIZE_sp_init_dmem_data 24 #else #endif #endif #define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_init_dmem_data 0x62B0 -#else -#define HIVE_ADDR_sp_sp_init_dmem_data 0x630C -#endif #define HIVE_SIZE_sp_sp_init_dmem_data 24 -#ifndef ISP2401 /* function ia_css_sp_metadata_start: 5914 */ -#else -/* function ia_css_sp_metadata_start: 5A4F */ -#endif -#ifndef ISP2401 /* function ia_css_bufq_sp_init_buffer_queues: 2C9B */ -#else -/* function ia_css_bufq_sp_init_buffer_queues: 2E3D */ -#endif -#ifndef ISP2401 /* function ia_css_pipeline_sp_stop: 1816 */ -#else -/* function ia_css_pipeline_sp_stop: 1850 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_connect_pipes: 27EA */ -#else -/* function ia_css_tagger_sp_connect_pipes: 283A */ -#endif -#ifndef ISP2401 /* function sp_isys_copy_wait: 70D */ -#else -/* function sp_isys_copy_wait: 6A1 */ -#endif /* function is_isp_debug_buffer_full: 337 */ -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_configure_channel_from_info: 32AF */ -#else -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3490 */ -#endif -#ifndef ISP2401 /* function encode_and_post_timer_event: A30 */ -#else -/* function encode_and_post_timer_event: 9C4 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_per_frame_data #define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_per_frame_data 0x41F0 -#else -#define HIVE_ADDR_sp_per_frame_data 0x4210 -#endif #define HIVE_SIZE_sp_per_frame_data 4 #else #endif #endif #define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_per_frame_data 0x41F0 -#else -#define HIVE_ADDR_sp_sp_per_frame_data 0x4210 -#endif #define HIVE_SIZE_sp_sp_per_frame_data 4 -#ifndef ISP2401 /* function ia_css_rmgr_sp_vbuf_dequeue: 62D4 */ -#else -/* function ia_css_rmgr_sp_vbuf_dequeue: 640F */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_psys_event_queue_handle #define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4B80 -#else -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4BDC -#endif #define HIVE_SIZE_host2sp_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4B80 -#else -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4BDC -#endif #define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_xmem_bin_addr #define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_xmem_bin_addr 0x41F4 -#else -#define HIVE_ADDR_xmem_bin_addr 0x4214 -#endif #define HIVE_SIZE_xmem_bin_addr 4 #else #endif #endif #define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_xmem_bin_addr 0x41F4 -#else -#define HIVE_ADDR_sp_xmem_bin_addr 0x4214 -#endif #define HIVE_SIZE_sp_xmem_bin_addr 4 -#ifndef ISP2401 /* function tmr_clock_init: 65A0 */ -#else -/* function tmr_clock_init: 66DB */ -#endif -#ifndef ISP2401 /* function ia_css_pipeline_sp_run: 1403 */ -#else -/* function ia_css_pipeline_sp_run: 1424 */ -#endif -#ifndef ISP2401 /* function memcpy: 68F7 */ -#else -/* function memcpy: 6A6A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GP_DEVICE_BASE #define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_GP_DEVICE_BASE 0x2FC -#else -#define HIVE_ADDR_GP_DEVICE_BASE 0x314 -#endif #define HIVE_SIZE_GP_DEVICE_BASE 4 #else #endif #endif #define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_GP_DEVICE_BASE 0x2FC -#else -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x314 -#endif #define HIVE_SIZE_sp_GP_DEVICE_BASE 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_ready_queue #define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E0 -#else -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E4 -#endif #define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E0 -#else -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E4 -#endif #define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 -#ifndef ISP2401 /* function input_system_reg_store: B1E */ -#else -/* function input_system_reg_store: B18 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_frontend_start: 5D4D */ -#else -/* function ia_css_isys_sp_frontend_start: 5E88 */ -#endif -#ifndef ISP2401 /* function ia_css_uds_sp_scale_params: 6600 */ -#else -/* function ia_css_uds_sp_scale_params: 6773 */ -#endif -#ifndef ISP2401 /* function ia_css_circbuf_increase_size: E40 */ -#else -/* function ia_css_circbuf_increase_size: E35 */ -#endif -#ifndef ISP2401 /* function __divu: 6875 */ -#else -/* function __divu: 69E8 */ -#endif -#ifndef ISP2401 /* function ia_css_thread_sp_get_state: C83 */ -#else -/* function ia_css_thread_sp_get_state: C78 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_stop #define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_cont_capt_stop 0x46BC -#else -#define HIVE_ADDR_sem_for_cont_capt_stop 0x4704 -#endif #define HIVE_SIZE_sem_for_cont_capt_stop 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x46BC -#else -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x4704 -#endif #define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 -#ifndef ISP2401 /* function thread_fiber_sp_main: E39 */ -#else -/* function thread_fiber_sp_main: E2E */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_pipe_thread #define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_pipe_thread 0x4800 #define HIVE_SIZE_sp_isp_pipe_thread 340 #else -#define HIVE_ADDR_sp_isp_pipe_thread 0x4848 -#define HIVE_SIZE_sp_isp_pipe_thread 360 -#endif -#else #endif #endif #define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4800 #define HIVE_SIZE_sp_sp_isp_pipe_thread 340 -#else -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4848 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 -#endif -#ifndef ISP2401 /* function ia_css_parambuf_sp_handle_parameter_sets: 128A */ -#else -/* function ia_css_parambuf_sp_handle_parameter_sets: 127F */ -#endif -#ifndef ISP2401 /* function ia_css_spctrl_sp_set_state: 5943 */ -#else -/* function ia_css_spctrl_sp_set_state: 5A7E */ -#endif -#ifndef ISP2401 /* function ia_css_thread_sem_sp_signal: 6AF7 */ -#else -/* function ia_css_thread_sem_sp_signal: 6C6C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_IRQ_BASE @@ -847,27 +463,14 @@ #define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 #define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 -#ifndef ISP2401 /* function ia_css_isys_sp_isr: 6FDC */ /* function ia_css_isys_sp_generate_exp_id: 60E5 */ -#else -/* function ia_css_isys_sp_isr: 7139 */ -#endif -#ifndef ISP2401 /* function ia_css_rmgr_sp_init: 61CF */ -#else -/* function ia_css_isys_sp_generate_exp_id: 6220 */ -#endif -#ifndef ISP2401 /* function ia_css_thread_sem_sp_init: 6BC8 */ -#else -/* function ia_css_rmgr_sp_init: 630A */ -#endif -#ifndef ISP2401 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_is_isp_requested #define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem @@ -879,71 +482,28 @@ #define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem #define HIVE_ADDR_sp_is_isp_requested 0x308 #define HIVE_SIZE_sp_is_isp_requested 4 -#else -/* function ia_css_thread_sem_sp_init: 6D3B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_frame #define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_reading_cb_frame 0x46D0 -#else -#define HIVE_ADDR_sem_for_reading_cb_frame 0x4718 -#endif #define HIVE_SIZE_sem_for_reading_cb_frame 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x46D0 -#else -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x4718 -#endif #define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_execute: 3217 */ -#else -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x320 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x320 -#define HIVE_SIZE_sp_is_isp_requested 4 - -/* function ia_css_dmaproxy_sp_execute: 33F6 */ -#endif -#ifndef ISP2401 /* function ia_css_queue_is_empty: 48E0 */ -#else -/* function ia_css_queue_is_empty: 7098 */ -#endif -#ifndef ISP2401 /* function ia_css_pipeline_sp_has_stopped: 180C */ -#else -/* function ia_css_pipeline_sp_has_stopped: 1846 */ -#endif -#ifndef ISP2401 /* function ia_css_circbuf_extract: F44 */ -#else -/* function ia_css_circbuf_extract: F39 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_is_locked_from_start: 2B0D */ -#else -/* function ia_css_tagger_buf_sp_is_locked_from_start: 2CAF */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_sp_thread @@ -957,29 +517,13 @@ #define HIVE_ADDR_sp_current_sp_thread 0x1DC #define HIVE_SIZE_sp_current_sp_thread 4 -#ifndef ISP2401 /* function ia_css_spctrl_sp_get_spid: 594A */ -#else -/* function ia_css_spctrl_sp_get_spid: 5A85 */ -#endif -#ifndef ISP2401 /* function ia_css_bufq_sp_reset_buffers: 2D22 */ -#else -/* function ia_css_bufq_sp_reset_buffers: 2EC4 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_read_byte_addr: 6E35 */ -#else -/* function ia_css_dmaproxy_sp_read_byte_addr: 6F79 */ -#endif -#ifndef ISP2401 /* function ia_css_rmgr_sp_uninit: 61C8 */ -#else -/* function ia_css_rmgr_sp_uninit: 6303 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_stack @@ -993,258 +537,138 @@ #define HIVE_ADDR_sp_sp_threads_stack 0x164 #define HIVE_SIZE_sp_sp_threads_stack 28 -#ifndef ISP2401 /* function ia_css_circbuf_peek: F26 */ -#else -/* function ia_css_circbuf_peek: F1B */ -#endif -#ifndef ISP2401 /* function ia_css_parambuf_sp_wait_for_in_param: 1053 */ -#else -/* function ia_css_parambuf_sp_wait_for_in_param: 1048 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_get_exp_id: 5FAD */ -#else -/* function ia_css_isys_sp_token_map_get_exp_id: 60E8 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_param #define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_all_cb_elems_param 0x46F8 -#else -#define HIVE_ADDR_sp_all_cb_elems_param 0x4740 -#endif #define HIVE_SIZE_sp_all_cb_elems_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_all_cb_elems_param 0x46F8 -#else -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x4740 -#endif #define HIVE_SIZE_sp_sp_all_cb_elems_param 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_pipeline_sp_curr_binary_id #define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1EC -#else -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1F0 -#endif #define HIVE_SIZE_pipeline_sp_curr_binary_id 4 #else #endif #endif #define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1EC -#else -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1F0 -#endif #define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame_desc #define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_all_cbs_frame_desc 0x4708 -#else -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4750 -#endif #define HIVE_SIZE_sp_all_cbs_frame_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4708 -#else -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4750 -#endif #define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 -#ifndef ISP2401 /* function sp_isys_copy_func_v2: 706 */ -#else -/* function sp_isys_copy_func_v2: 69A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_param #define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_reading_cb_param 0x4710 -#else -#define HIVE_ADDR_sem_for_reading_cb_param 0x4758 -#endif #define HIVE_SIZE_sem_for_reading_cb_param 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4710 -#else -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4758 -#endif #define HIVE_SIZE_sp_sem_for_reading_cb_param 40 -#ifndef ISP2401 /* function ia_css_queue_get_used_space: 49AD */ -#else -/* function ia_css_queue_get_used_space: 4C0B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_start #define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_cont_capt_start 0x4738 -#else -#define HIVE_ADDR_sem_for_cont_capt_start 0x4780 -#endif #define HIVE_SIZE_sem_for_cont_capt_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4738 -#else -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4780 -#endif #define HIVE_SIZE_sp_sem_for_cont_capt_start 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tmp_heap #define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_tmp_heap 0x6010 -#else -#define HIVE_ADDR_tmp_heap 0x6070 -#endif #define HIVE_SIZE_tmp_heap 640 #else #endif #endif #define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_tmp_heap 0x6010 -#else -#define HIVE_ADDR_sp_tmp_heap 0x6070 -#endif #define HIVE_SIZE_sp_tmp_heap 640 -#ifndef ISP2401 /* function ia_css_rmgr_sp_get_num_vbuf: 64D8 */ -#else -/* function ia_css_rmgr_sp_get_num_vbuf: 6613 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_output_compute_dma_info: 3F49 */ -#else -/* function ia_css_ispctrl_sp_output_compute_dma_info: 418C */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_lock_exp_id: 20CD */ -#else -/* function ia_css_tagger_sp_lock_exp_id: 211D */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#ifndef ISP2401 /* function ia_css_queue_is_full: 4A44 */ -#else -/* function ia_css_queue_is_full: 4CA2 */ -#endif /* function debug_buffer_init_isp: E4 */ -#ifndef ISP2401 /* function ia_css_isys_sp_frontend_uninit: 5D07 */ -#else -/* function ia_css_isys_sp_frontend_uninit: 5E42 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_exp_id_is_locked: 2003 */ -#else -/* function ia_css_tagger_sp_exp_id_is_locked: 2053 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem #define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#else -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x6744 -#endif #define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#else -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x6744 -#endif #define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 -#ifndef ISP2401 /* function ia_css_rmgr_sp_refcount_dump: 62AF */ -#else -/* function ia_css_rmgr_sp_refcount_dump: 63EA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id #define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1259,137 +683,65 @@ #define HIVE_ADDR_sp_sp_pipe_threads 0x150 #define HIVE_SIZE_sp_sp_pipe_threads 20 -#ifndef ISP2401 /* function sp_event_proxy_func: 71B */ -#else -/* function sp_event_proxy_func: 6AF */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_isys_event_queue_handle #define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4BDC -#else -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4C38 -#endif #define HIVE_SIZE_host2sp_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4BDC -#else -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4C38 -#endif #define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 -#ifndef ISP2401 /* function ia_css_thread_sp_yield: 6A70 */ -#else -/* function ia_css_thread_sp_yield: 6BEA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param_desc #define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_all_cbs_param_desc 0x474C -#else -#define HIVE_ADDR_sp_all_cbs_param_desc 0x4794 -#endif #define HIVE_SIZE_sp_all_cbs_param_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x474C -#else -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x4794 -#endif #define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb #define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#else -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 -#endif #define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#else -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 -#endif #define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 -#ifndef ISP2401 /* function ia_css_thread_sp_fork: D10 */ -#else -/* function ia_css_thread_sp_fork: D05 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_destroy: 27F4 */ -#else -/* function ia_css_tagger_sp_destroy: 2844 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_vmem_read: 31B7 */ -#else -/* function ia_css_dmaproxy_sp_vmem_read: 3396 */ -#endif -#ifndef ISP2401 /* function ia_css_ifmtr_sp_init: 6136 */ -#else -/* function ia_css_ifmtr_sp_init: 6271 */ -#endif -#ifndef ISP2401 /* function initialize_sp_group: 6D4 */ -#else -/* function initialize_sp_group: 668 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_peek: 2919 */ -#else -/* function ia_css_tagger_buf_sp_peek: 2ABB */ -#endif -#ifndef ISP2401 /* function ia_css_thread_sp_init: D3C */ -#else -/* function ia_css_thread_sp_init: D31 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_reset_exp_id: 60DD */ -#else -/* function ia_css_isys_sp_reset_exp_id: 6218 */ -#endif -#ifndef ISP2401 /* function qos_scheduler_update_fps: 65F0 */ -#else -/* function qos_scheduler_update_fps: 6763 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_set_stream_base_addr: 461E */ -#else -/* function ia_css_ispctrl_sp_set_stream_base_addr: 4879 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_DMEM_BASE @@ -1415,78 +767,44 @@ #define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 #define HIVE_SIZE_sp_SP_DMEM_BASE 4 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_read: 322D */ -#else -/* function __ia_css_queue_is_empty_text: 4B68 */ - -/* function ia_css_dmaproxy_sp_read: 340C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_raw_copy_line_count #define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_raw_copy_line_count 0x2C8 -#else -#define HIVE_ADDR_raw_copy_line_count 0x2E0 -#endif #define HIVE_SIZE_raw_copy_line_count 4 #else #endif #endif #define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_raw_copy_line_count 0x2C8 -#else -#define HIVE_ADDR_sp_raw_copy_line_count 0x2E0 -#endif #define HIVE_SIZE_sp_raw_copy_line_count 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle #define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4BE8 -#else -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4C44 -#endif #define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4BE8 -#else -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4C44 -#endif #define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 -#ifndef ISP2401 /* function ia_css_queue_peek: 4923 */ -#else -/* function ia_css_queue_peek: 4B81 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt #define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4A94 -#else -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4AF0 -#endif #define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4A94 -#else -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4AF0 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1504,54 +822,26 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_thread #define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_isp_thread 0x5F40 -#else -#define HIVE_ADDR_isp_thread 0x5FA0 -#endif #define HIVE_SIZE_isp_thread 4 #else #endif #endif #define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_thread 0x5F40 -#else -#define HIVE_ADDR_sp_isp_thread 0x5FA0 -#endif #define HIVE_SIZE_sp_isp_thread 4 -#ifndef ISP2401 /* function encode_and_post_sp_event_non_blocking: A78 */ -#else -/* function encode_and_post_sp_event_non_blocking: A0C */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_frontend_destroy: 5DDF */ -#else -/* function ia_css_isys_sp_frontend_destroy: 5F1A */ -#endif /* function is_ddr_debug_buffer_full: 2CC */ -#ifndef ISP2401 /* function ia_css_isys_sp_frontend_stop: 5D1F */ -#else -/* function ia_css_isys_sp_frontend_stop: 5E5A */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_init: 607B */ -#else -/* function ia_css_isys_sp_token_map_init: 61B6 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2969 */ -#else -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2B0B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_fiber @@ -1565,186 +855,98 @@ #define HIVE_ADDR_sp_sp_threads_fiber 0x19C #define HIVE_SIZE_sp_sp_threads_fiber 28 -#ifndef ISP2401 /* function encode_and_post_sp_event: A01 */ -#else -/* function encode_and_post_sp_event: 995 */ -#endif /* function debug_enqueue_ddr: EE */ -#ifndef ISP2401 /* function ia_css_rmgr_sp_refcount_init_vbuf: 626A */ -#else -/* function ia_css_rmgr_sp_refcount_init_vbuf: 63A5 */ -#endif -#ifndef ISP2401 /* function dmaproxy_sp_read_write: 6EE4 */ -#else -/* function dmaproxy_sp_read_write: 7017 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer #define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#else -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 -#endif #define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#else -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 -#endif #define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_buffer_queue_handle #define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_host2sp_buffer_queue_handle 0x4BF4 -#else -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4C50 -#endif #define HIVE_SIZE_host2sp_buffer_queue_handle 480 #else #endif #endif #define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4BF4 -#else -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4C50 -#endif #define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_service #define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_flash_sp_in_service 0x3178 -#else -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3198 -#endif #define HIVE_SIZE_ia_css_flash_sp_in_service 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3178 -#else -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3198 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_process: 6BF0 */ -#else -/* function ia_css_dmaproxy_sp_process: 6D63 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_mark_from_end: 2BF1 */ -#else -/* function ia_css_tagger_buf_sp_mark_from_end: 2D93 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_rcv_acquire_ack: 59EC */ -#else -/* function ia_css_isys_sp_backend_rcv_acquire_ack: 5B27 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_pre_acquire_request: 5A02 */ -#else -/* function ia_css_isys_sp_backend_pre_acquire_request: 5B3D */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_init_cs: 3653 */ -#else -/* function ia_css_ispctrl_sp_init_cs: 3855 */ -#endif -#ifndef ISP2401 /* function ia_css_spctrl_sp_init: 5958 */ -#else -/* function ia_css_spctrl_sp_init: 5A93 */ -#endif -#ifndef ISP2401 /* function sp_event_proxy_init: 730 */ -#else -/* function sp_event_proxy_init: 6C4 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick #define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_output #define HIVE_MEM_sp_output scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_output 0x41F8 -#else -#define HIVE_ADDR_sp_output 0x4218 -#endif #define HIVE_SIZE_sp_output 16 #else #endif #endif #define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_output 0x41F8 -#else -#define HIVE_ADDR_sp_sp_output 0x4218 -#endif #define HIVE_SIZE_sp_sp_output 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#else -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 -#endif #define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1771,100 +973,52 @@ #define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C #define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 -#ifndef ISP2401 /* function sp_dma_proxy_reset_channels: 3487 */ -#else -/* function sp_dma_proxy_reset_channels: 367B */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_acquire: 5B0D */ -#else -/* function ia_css_isys_sp_backend_acquire: 5C48 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_update_size: 28E8 */ -#else -/* function ia_css_tagger_sp_update_size: 2A8A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_host_sp_queue #define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x511C -#else -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x5178 -#endif #define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x511C -#else -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x5178 -#endif #define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 -#ifndef ISP2401 /* function thread_fiber_sp_create: DA8 */ -#else -/* function thread_fiber_sp_create: D9D */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_set_increments: 3319 */ -#else -/* function ia_css_dmaproxy_sp_set_increments: 350D */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_frame #define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_writing_cb_frame 0x4754 -#else -#define HIVE_ADDR_sem_for_writing_cb_frame 0x479C -#endif #define HIVE_SIZE_sem_for_writing_cb_frame 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x4754 -#else -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x479C -#endif #define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 -#ifndef ISP2401 /* function receiver_reg_store: AD7 */ -#else -/* function receiver_reg_store: AD1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_param #define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_writing_cb_param 0x4768 -#else -#define HIVE_ADDR_sem_for_writing_cb_param 0x47B0 -#endif #define HIVE_SIZE_sem_for_writing_cb_param 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_writing_cb_param 0x4768 -#else -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x47B0 -#endif #define HIVE_SIZE_sp_sem_for_writing_cb_param 20 /* function sp_start_isp_entry: 453 */ @@ -1875,115 +1029,51 @@ #endif #define HIVE_ADDR_sp_sp_start_isp_entry 0x453 -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_unmark_all: 2B75 */ -#else -/* function ia_css_tagger_buf_sp_unmark_all: 2D17 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_unmark_from_start: 2BB6 */ -#else -/* function ia_css_tagger_buf_sp_unmark_from_start: 2D58 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_channel_acquire: 34B3 */ -#else -/* function ia_css_dmaproxy_sp_channel_acquire: 36A7 */ -#endif -#ifndef ISP2401 /* function ia_css_rmgr_sp_add_num_vbuf: 64B4 */ -#else -/* function ia_css_rmgr_sp_add_num_vbuf: 65EF */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_create: 60C4 */ -#else -/* function ia_css_isys_sp_token_map_create: 61FF */ -#endif -#ifndef ISP2401 /* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3183 */ -#else -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3362 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_acquire_buf_elem: 1FDB */ -#else -/* function ia_css_tagger_sp_acquire_buf_elem: 202B */ -#endif -#ifndef ISP2401 /* function ia_css_bufq_sp_is_dynamic_buffer: 306C */ -#else -/* function ia_css_bufq_sp_is_dynamic_buffer: 320E */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_group #define HIVE_MEM_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_group 0x4208 #define HIVE_SIZE_sp_group 1144 #else -#define HIVE_ADDR_sp_group 0x4228 -#define HIVE_SIZE_sp_group 1184 -#endif -#else #endif #endif #define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_group 0x4208 #define HIVE_SIZE_sp_sp_group 1144 -#else -#define HIVE_ADDR_sp_sp_group 0x4228 -#define HIVE_SIZE_sp_sp_group 1184 -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_event_proxy_thread #define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_event_proxy_thread 0x4954 #define HIVE_SIZE_sp_event_proxy_thread 68 #else -#define HIVE_ADDR_sp_event_proxy_thread 0x49B0 -#define HIVE_SIZE_sp_event_proxy_thread 72 -#endif -#else #endif #endif #define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_event_proxy_thread 0x4954 #define HIVE_SIZE_sp_sp_event_proxy_thread 68 -#else -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x49B0 -#define HIVE_SIZE_sp_sp_event_proxy_thread 72 -#endif -#ifndef ISP2401 /* function ia_css_thread_sp_kill: CD6 */ -#else -/* function ia_css_thread_sp_kill: CCB */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_create: 28A2 */ -#else -/* function ia_css_tagger_sp_create: 2A38 */ -#endif -#ifndef ISP2401 /* function tmpmem_acquire_dmem: 6561 */ -#else -/* function tmpmem_acquire_dmem: 669C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_MMU_BASE @@ -1997,81 +1087,41 @@ #define HIVE_ADDR_sp_MMU_BASE 0x24 #define HIVE_SIZE_sp_MMU_BASE 8 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_channel_release: 349F */ -#else -/* function ia_css_dmaproxy_sp_channel_release: 3693 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_is_idle: 347F */ -#else -/* function ia_css_dmaproxy_sp_is_idle: 3673 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_qos_start #define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_qos_start 0x477C -#else -#define HIVE_ADDR_sem_for_qos_start 0x47C4 -#endif #define HIVE_SIZE_sem_for_qos_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_qos_start 0x477C -#else -#define HIVE_ADDR_sp_sem_for_qos_start 0x47C4 -#endif #define HIVE_SIZE_sp_sem_for_qos_start 20 -#ifndef ISP2401 /* function isp_hmem_load: B55 */ -#else -/* function isp_hmem_load: B4F */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_release_buf_elem: 1FB7 */ -#else -/* function ia_css_tagger_sp_release_buf_elem: 2007 */ -#endif -#ifndef ISP2401 /* function ia_css_eventq_sp_send: 34F5 */ -#else -/* function ia_css_eventq_sp_send: 36E9 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_isys_sp_error_cnt #define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x62D4 -#else -#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x6330 -#endif #define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 #else #endif #endif #define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x62D4 -#else -#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x6330 -#endif #define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_unlock_from_start: 2AA5 */ -#else -/* function ia_css_tagger_buf_sp_unlock_from_start: 2C47 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_debug_buffer_ddr_address @@ -2085,88 +1135,34 @@ #define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC #define HIVE_SIZE_sp_debug_buffer_ddr_address 4 -#ifndef ISP2401 /* function sp_isys_copy_request: 714 */ -#else -/* function sp_isys_copy_request: 6A8 */ -#endif -#ifndef ISP2401 /* function ia_css_rmgr_sp_refcount_retain_vbuf: 6344 */ -#else -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 647F */ -#endif -#ifndef ISP2401 /* function ia_css_thread_sp_set_priority: CCE */ -#else -/* function ia_css_thread_sp_set_priority: CC3 */ -#endif -#ifndef ISP2401 /* function sizeof_hmem: BFC */ -#else -/* function sizeof_hmem: BF6 */ -#endif -#ifndef ISP2401 /* function tmpmem_release_dmem: 6550 */ -#else -/* function tmpmem_release_dmem: 668B */ -#endif /* function cnd_input_system_cfg: 392 */ -#ifndef ISP2401 /* function __ia_css_sp_rawcopy_func_critical: 6F65 */ -#else -/* function __ia_css_sp_rawcopy_func_critical: 70C2 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_set_width_exception: 3304 */ -#else -/* function __ia_css_dmaproxy_sp_process_text: 3306 */ -#endif -#ifndef ISP2401 /* function sp_event_assert: 8B1 */ -#else -/* function ia_css_dmaproxy_sp_set_width_exception: 34F8 */ -#endif -#ifndef ISP2401 /* function ia_css_flash_sp_init_internal_params: 2C90 */ -#else -/* function sp_event_assert: 845 */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 29AB */ -#else -/* function ia_css_flash_sp_init_internal_params: 2E32 */ -#endif -#ifndef ISP2401 /* function __modu: 68BB */ -#else -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 2B4D */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_init_isp_vector: 3189 */ -#else -/* function __modu: 6A2E */ - -/* function ia_css_dmaproxy_sp_init_isp_vector: 3368 */ -#endif /* function isp_vamem_store: 0 */ -#ifdef ISP2401 -/* function ia_css_tagger_sp_set_copy_pipe: 2A2F */ - -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GDC_BASE #define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem @@ -2179,42 +1175,22 @@ #define HIVE_ADDR_sp_GDC_BASE 0x44 #define HIVE_SIZE_sp_GDC_BASE 8 -#ifndef ISP2401 /* function ia_css_queue_local_init: 4C0E */ -#else -/* function ia_css_queue_local_init: 4E6C */ -#endif -#ifndef ISP2401 /* function sp_event_proxy_callout_func: 6988 */ -#else -/* function sp_event_proxy_callout_func: 6AFB */ -#endif -#ifndef ISP2401 /* function qos_scheduler_schedule_stage: 65C1 */ -#else -/* function qos_scheduler_schedule_stage: 670F */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads #define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x49E0 -#else -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x4A40 -#endif #define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x49E0 -#else -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x4A40 -#endif #define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -2229,63 +1205,29 @@ #define HIVE_ADDR_sp_sp_threads_stack_size 0x180 #define HIVE_SIZE_sp_sp_threads_stack_size 28 -#ifndef ISP2401 /* function ia_css_ispctrl_sp_isp_done_row_striping: 3F2F */ -#else -/* function ia_css_ispctrl_sp_isp_done_row_striping: 4172 */ -#endif -#ifndef ISP2401 /* function __ia_css_isys_sp_isr_text: 5E09 */ -#else -/* function __ia_css_isys_sp_isr_text: 5F44 */ -#endif -#ifndef ISP2401 /* function ia_css_queue_dequeue: 4A8C */ -#else -/* function ia_css_queue_dequeue: 4CEA */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_configure_channel: 6E4C */ -#else -/* function is_qos_standalone_mode: 66EA */ - -/* function ia_css_dmaproxy_sp_configure_channel: 6F90 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_thread_fiber_sp #define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_current_thread_fiber_sp 0x49E8 -#else -#define HIVE_ADDR_current_thread_fiber_sp 0x4A44 -#endif #define HIVE_SIZE_current_thread_fiber_sp 4 #else #endif #endif #define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_current_thread_fiber_sp 0x49E8 -#else -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x4A44 -#endif #define HIVE_SIZE_sp_current_thread_fiber_sp 4 -#ifndef ISP2401 /* function ia_css_circbuf_pop: FD8 */ -#else -/* function ia_css_circbuf_pop: FCD */ -#endif -#ifndef ISP2401 /* function memset: 693A */ -#else -/* function memset: 6AAD */ -#endif /* function irq_raise_set_token: B6 */ @@ -2301,253 +1243,121 @@ #define HIVE_ADDR_sp_GPIO_BASE 0x3C #define HIVE_SIZE_sp_GPIO_BASE 4 -#ifndef ISP2401 /* function ia_css_pipeline_acc_stage_enable: 17D7 */ -#else -/* function ia_css_pipeline_acc_stage_enable: 17FF */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_unlock_exp_id: 2028 */ -#else -/* function ia_css_tagger_sp_unlock_exp_id: 2078 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_ph #define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_isp_ph 0x62E4 -#else -#define HIVE_ADDR_isp_ph 0x6340 -#endif #define HIVE_SIZE_isp_ph 28 #else #endif #endif #define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_ph 0x62E4 -#else -#define HIVE_ADDR_sp_isp_ph 0x6340 -#endif #define HIVE_SIZE_sp_isp_ph 28 -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_flush: 6009 */ -#else -/* function ia_css_isys_sp_token_map_flush: 6144 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_init_ds: 37B2 */ -#else -/* function ia_css_ispctrl_sp_init_ds: 39E1 */ -#endif -#ifndef ISP2401 /* function get_xmem_base_addr_raw: 3B5F */ -#else -/* function get_xmem_base_addr_raw: 3D9A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param #define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_all_cbs_param 0x4790 -#else -#define HIVE_ADDR_sp_all_cbs_param 0x47D8 -#endif #define HIVE_SIZE_sp_all_cbs_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_all_cbs_param 0x4790 -#else -#define HIVE_ADDR_sp_sp_all_cbs_param 0x47D8 -#endif #define HIVE_SIZE_sp_sp_all_cbs_param 16 -#ifndef ISP2401 /* function ia_css_circbuf_create: 1026 */ -#else -/* function ia_css_circbuf_create: 101B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp_group #define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_sp_group 0x47A0 -#else -#define HIVE_ADDR_sem_for_sp_group 0x47E8 -#endif #define HIVE_SIZE_sem_for_sp_group 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_sp_group 0x47A0 -#else -#define HIVE_ADDR_sp_sem_for_sp_group 0x47E8 -#endif #define HIVE_SIZE_sp_sem_for_sp_group 20 -#ifndef ISP2401 /* function ia_css_framebuf_sp_wait_for_in_frame: 64DF */ -#else -/* function __ia_css_dmaproxy_sp_configure_channel_text: 34D7 */ - -/* function ia_css_framebuf_sp_wait_for_in_frame: 661A */ -#endif -#ifndef ISP2401 /* function ia_css_sp_rawcopy_tag_frame: 556F */ -#else -/* function ia_css_sp_rawcopy_tag_frame: 57B0 */ -#endif -#ifndef ISP2401 /* function isp_hmem_clear: B25 */ -#else -/* function isp_hmem_clear: B1F */ -#endif -#ifndef ISP2401 /* function ia_css_framebuf_sp_release_in_frame: 6522 */ -#else -/* function ia_css_framebuf_sp_release_in_frame: 665D */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_snd_acquire_request: 5A5F */ -#else -/* function ia_css_isys_sp_backend_snd_acquire_request: 5B9A */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_is_full: 5E90 */ -#else -/* function ia_css_isys_sp_token_map_is_full: 5FCB */ -#endif -#ifndef ISP2401 /* function input_system_acquisition_run: AF9 */ -#else -/* function input_system_acquisition_run: AF3 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_start_binary: 3631 */ -#else -/* function ia_css_ispctrl_sp_start_binary: 3833 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#else -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 -#endif #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#ifndef ISP2401 /* function ia_css_eventq_sp_recv: 34C7 */ -#else -/* function ia_css_eventq_sp_recv: 36BB */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_pool #define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_isp_pool 0x2E8 -#else -#define HIVE_ADDR_isp_pool 0x300 -#endif #define HIVE_SIZE_isp_pool 4 #else #endif #endif #define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_pool 0x2E8 -#else -#define HIVE_ADDR_sp_isp_pool 0x300 -#endif #define HIVE_SIZE_sp_isp_pool 4 -#ifndef ISP2401 /* function ia_css_rmgr_sp_rel_gen: 6211 */ -#else -/* function ia_css_rmgr_sp_rel_gen: 634C */ -/* function ia_css_tagger_sp_unblock_clients: 2900 */ -#endif - -#ifndef ISP2401 /* function css_get_frame_processing_time_end: 1FA7 */ -#else -/* function css_get_frame_processing_time_end: 1FF7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_any_pending_mask #define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_event_any_pending_mask 0x300 -#else -#define HIVE_ADDR_event_any_pending_mask 0x318 -#endif #define HIVE_SIZE_event_any_pending_mask 8 #else #endif #endif #define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_event_any_pending_mask 0x300 -#else -#define HIVE_ADDR_sp_event_any_pending_mask 0x318 -#endif #define HIVE_SIZE_sp_event_any_pending_mask 8 -#ifndef ISP2401 /* function ia_css_isys_sp_backend_push: 5A16 */ -#else -/* function ia_css_isys_sp_backend_push: 5B51 */ -#endif /* function sh_css_decode_tag_descr: 352 */ /* function debug_enqueue_isp: 27B */ -#ifndef ISP2401 -/* function qos_scheduler_update_stage_budget: 65AF */ -#else -/* function qos_scheduler_update_stage_budget: 66F2 */ -#endif +/* function qos_scheduler_update_stage_budget: 65AF */ -#ifndef ISP2401 /* function ia_css_spctrl_sp_uninit: 5951 */ -#else -/* function ia_css_spctrl_sp_uninit: 5A8C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE @@ -2564,66 +1374,34 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_lock_from_start: 2AD9 */ -#else -/* function ia_css_tagger_buf_sp_lock_from_start: 2C7B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_isp_idle #define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_isp_idle 0x47B4 -#else -#define HIVE_ADDR_sem_for_isp_idle 0x47FC -#endif #define HIVE_SIZE_sem_for_isp_idle 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_isp_idle 0x47B4 -#else -#define HIVE_ADDR_sp_sem_for_isp_idle 0x47FC -#endif #define HIVE_SIZE_sp_sem_for_isp_idle 20 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_write_byte_addr: 31E6 */ -#else -/* function ia_css_dmaproxy_sp_write_byte_addr: 33C5 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_init: 315D */ -#else -/* function ia_css_dmaproxy_sp_init: 333C */ -#endif -#ifndef ISP2401 /* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2D62 */ -#else -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2F04 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_VAMEM_BASE @@ -2640,86 +1418,46 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger #define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x6294 -#else -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x62F0 -#endif #define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 #else #endif #endif #define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x6294 -#else -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x62F0 -#endif #define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids #define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 -#ifndef ISP2401 /* function ia_css_queue_item_load: 4D00 */ -#else -/* function ia_css_queue_item_load: 4F5E */ -#endif -#ifndef ISP2401 /* function ia_css_spctrl_sp_get_state: 593C */ -#else -/* function ia_css_spctrl_sp_get_state: 5A77 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_uninit: 6026 */ -#else -/* function ia_css_isys_sp_token_map_uninit: 6161 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_callout_sp_thread #define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_callout_sp_thread 0x49DC -#else -#define HIVE_ADDR_callout_sp_thread 0x1E0 -#endif #define HIVE_SIZE_callout_sp_thread 4 #else #endif #endif #define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_callout_sp_thread 0x49DC -#else -#define HIVE_ADDR_sp_callout_sp_thread 0x1E0 -#endif #define HIVE_SIZE_sp_callout_sp_thread 4 -#ifndef ISP2401 /* function thread_fiber_sp_init: E2F */ -#else -/* function thread_fiber_sp_init: E24 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_SP_PMEM_BASE @@ -2733,129 +1471,53 @@ #define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 #define HIVE_SIZE_sp_SP_PMEM_BASE 4 -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_snd_acquire_req: 5F96 */ -#else -/* function ia_css_isys_sp_token_map_snd_acquire_req: 60D1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_input_stream_format #define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_input_stream_format 0x40F8 -#else -#define HIVE_ADDR_sp_isp_input_stream_format 0x4118 -#endif #define HIVE_SIZE_sp_isp_input_stream_format 20 #else #endif #endif #define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_isp_input_stream_format 0x40F8 -#else -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x4118 -#endif #define HIVE_SIZE_sp_sp_isp_input_stream_format 20 -#ifndef ISP2401 /* function __mod: 68A7 */ -#else -/* function __mod: 6A1A */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_init_dmem_channel: 3247 */ -#else -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3426 */ -#endif -#ifndef ISP2401 /* function ia_css_thread_sp_join: CFF */ -#else -/* function ia_css_thread_sp_join: CF4 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_add_command: 6F4F */ -#else -/* function ia_css_dmaproxy_sp_add_command: 7082 */ -#endif -#ifndef ISP2401 /* function ia_css_sp_metadata_thread_func: 57F0 */ -#else -/* function ia_css_sp_metadata_thread_func: 594F */ -#endif -#ifndef ISP2401 /* function __sp_event_proxy_func_critical: 6975 */ -#else -/* function __sp_event_proxy_func_critical: 6AE8 */ -#endif -#ifndef ISP2401 /* function ia_css_sp_metadata_wait: 5903 */ -#else -/* function ia_css_sp_metadata_wait: 5A3E */ -#endif -#ifndef ISP2401 /* function ia_css_circbuf_peek_from_start: F08 */ -#else -/* function ia_css_circbuf_peek_from_start: EFD */ -#endif -#ifndef ISP2401 /* function ia_css_event_sp_encode: 3552 */ -#else -/* function ia_css_event_sp_encode: 3746 */ -#endif -#ifndef ISP2401 /* function ia_css_thread_sp_run: D72 */ -#else -/* function ia_css_thread_sp_run: D67 */ -#endif -#ifndef ISP2401 /* function sp_isys_copy_func: 6F6 */ -#else -/* function sp_isys_copy_func: 68A */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_flush: 5A7F */ -#else -/* function ia_css_isys_sp_backend_flush: 5BBA */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_frame_exists: 599B */ -#else -/* function ia_css_isys_sp_backend_frame_exists: 5AD6 */ -#endif -#ifndef ISP2401 /* function ia_css_sp_isp_param_init_isp_memories: 4789 */ -#else -/* function ia_css_sp_isp_param_init_isp_memories: 4A11 */ -#endif -#ifndef ISP2401 /* function register_isr: 8A9 */ -#else -/* function register_isr: 83D */ -#endif /* function irq_raise: C8 */ -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_mmu_invalidate: 3124 */ -#else -/* function ia_css_dmaproxy_sp_mmu_invalidate: 32CC */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS @@ -2869,81 +1531,41 @@ #define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 #define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 -#ifndef ISP2401 /* function pipeline_sp_initialize_stage: 190B */ -#else -/* function pipeline_sp_initialize_stage: 1945 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_isys_sp_frontend_states #define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x62C8 -#else -#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x6324 -#endif #define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 #else #endif #endif #define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x62C8 -#else -#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x6324 -#endif #define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6E1E */ -#else -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6F62 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_done_ds: 3799 */ -#else -/* function ia_css_ispctrl_sp_done_ds: 39C8 */ -#endif -#ifndef ISP2401 /* function ia_css_sp_isp_param_get_mem_inits: 4764 */ -#else -/* function ia_css_sp_isp_param_get_mem_inits: 49EC */ -#endif -#ifndef ISP2401 /* function ia_css_parambuf_sp_init_buffer_queues: 13D0 */ -#else -/* function ia_css_parambuf_sp_init_buffer_queues: 13F1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_pfp_spref #define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_vbuf_pfp_spref 0x2F0 -#else -#define HIVE_ADDR_vbuf_pfp_spref 0x308 -#endif #define HIVE_SIZE_vbuf_pfp_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_vbuf_pfp_spref 0x2F0 -#else -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x308 -#endif #define HIVE_SIZE_sp_vbuf_pfp_spref 4 -#ifndef ISP2401 /* function input_system_cfg: ABB */ -#else -/* function input_system_cfg: AB5 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_HMEM_BASE @@ -2960,246 +1582,121 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames #define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x59DC -#else -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x5A38 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x59DC -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x5A38 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 -#ifndef ISP2401 /* function qos_scheduler_init_stage_budget: 65E8 */ -#else -/* function qos_scheduler_init_stage_budget: 6750 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_release: 5AF4 */ -#else -/* function ia_css_isys_sp_backend_release: 5C2F */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_backend_destroy: 5B1E */ -#else -/* function ia_css_isys_sp_backend_destroy: 5C59 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_buffer_queue_handle #define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp2host_buffer_queue_handle 0x5AF4 -#else -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5B50 -#endif #define HIVE_SIZE_sp2host_buffer_queue_handle 96 #else #endif #endif #define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5AF4 -#else -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5B50 -#endif #define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_check_mipi_frame_size: 5F5A */ -#else -/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 6095 */ -#endif -#ifndef ISP2401 /* function ia_css_ispctrl_sp_init_isp_vars: 4483 */ -#else -/* function ia_css_ispctrl_sp_init_isp_vars: 46DE */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5B70 */ -#else -/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5CAB */ -#endif -#ifndef ISP2401 /* function sp_warning: 8DC */ -#else -/* function sp_warning: 870 */ -#endif -#ifndef ISP2401 /* function ia_css_rmgr_sp_vbuf_enqueue: 6304 */ -#else -/* function ia_css_rmgr_sp_vbuf_enqueue: 643F */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_sp_tag_exp_id: 2142 */ -#else -/* function ia_css_tagger_sp_tag_exp_id: 2192 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_write: 31FD */ -#else -/* function ia_css_dmaproxy_sp_write: 33DC */ -#endif -#ifndef ISP2401 /* function ia_css_parambuf_sp_release_in_param: 1250 */ -#else -/* function ia_css_parambuf_sp_release_in_param: 1245 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_irq_sw_interrupt_token #define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_irq_sw_interrupt_token 0x40F4 -#else -#define HIVE_ADDR_irq_sw_interrupt_token 0x4114 -#endif #define HIVE_SIZE_irq_sw_interrupt_token 4 #else #endif #endif #define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_irq_sw_interrupt_token 0x40F4 -#else -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x4114 -#endif #define HIVE_SIZE_sp_irq_sw_interrupt_token 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_addresses #define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_addresses 0x5F44 -#else -#define HIVE_ADDR_sp_isp_addresses 0x5FA4 -#endif #define HIVE_SIZE_sp_isp_addresses 172 #else #endif #endif #define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_isp_addresses 0x5F44 -#else -#define HIVE_ADDR_sp_sp_isp_addresses 0x5FA4 -#endif #define HIVE_SIZE_sp_sp_isp_addresses 172 -#ifndef ISP2401 /* function ia_css_rmgr_sp_acq_gen: 6229 */ -#else -/* function ia_css_rmgr_sp_acq_gen: 6364 */ -#endif -#ifndef ISP2401 /* function receiver_reg_load: AD0 */ -#else -/* function receiver_reg_load: ACA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isps #define HIVE_MEM_isps scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_isps 0x6300 -#else -#define HIVE_ADDR_isps 0x635C -#endif #define HIVE_SIZE_isps 28 #else #endif #endif #define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isps 0x6300 -#else -#define HIVE_ADDR_sp_isps 0x635C -#endif #define HIVE_SIZE_sp_isps 28 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_queues_initialized #define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_host_sp_queues_initialized 0x410C -#else -#define HIVE_ADDR_host_sp_queues_initialized 0x412C -#endif #define HIVE_SIZE_host_sp_queues_initialized 4 #else #endif #endif #define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_host_sp_queues_initialized 0x410C -#else -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x412C -#endif #define HIVE_SIZE_sp_host_sp_queues_initialized 4 -#ifndef ISP2401 /* function ia_css_queue_uninit: 4BCC */ -#else -/* function ia_css_queue_uninit: 4E2A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started #define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5BFC -#else -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5C58 -#endif #define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5BFC -#else -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5C58 -#endif #define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 -#ifndef ISP2401 /* function ia_css_bufq_sp_release_dynamic_buf: 2DCE */ -#else -/* function ia_css_bufq_sp_release_dynamic_buf: 2F70 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_set_height_exception: 32F5 */ -#else -/* function ia_css_dmaproxy_sp_set_height_exception: 34E9 */ -#endif -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_init_vmem_channel: 327A */ -#else -/* function ia_css_dmaproxy_sp_init_vmem_channel: 345A */ -#endif -#ifndef ISP2401 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_num_ready_threads #define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem @@ -3213,277 +1710,142 @@ #define HIVE_SIZE_sp_num_ready_threads 4 /* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 31CF */ -#else -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 33AE */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_spref #define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_vbuf_spref 0x2EC -#else -#define HIVE_ADDR_vbuf_spref 0x304 -#endif #define HIVE_SIZE_vbuf_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_vbuf_spref 0x2EC -#else -#define HIVE_ADDR_sp_vbuf_spref 0x304 -#endif #define HIVE_SIZE_sp_vbuf_spref 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_metadata_thread #define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_metadata_thread 0x4998 #define HIVE_SIZE_sp_metadata_thread 68 #else -#define HIVE_ADDR_sp_metadata_thread 0x49F8 -#define HIVE_SIZE_sp_metadata_thread 72 -#endif -#else #endif #endif #define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_metadata_thread 0x4998 #define HIVE_SIZE_sp_sp_metadata_thread 68 -#else -#define HIVE_ADDR_sp_sp_metadata_thread 0x49F8 -#define HIVE_SIZE_sp_sp_metadata_thread 72 -#endif -#ifndef ISP2401 /* function ia_css_queue_enqueue: 4B16 */ -#else -/* function ia_css_queue_enqueue: 4D74 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_request #define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_flash_sp_request 0x4A98 -#else -#define HIVE_ADDR_ia_css_flash_sp_request 0x4AF4 -#endif #define HIVE_SIZE_ia_css_flash_sp_request 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4A98 -#else -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4AF4 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_request 4 -#ifndef ISP2401 /* function ia_css_dmaproxy_sp_vmem_write: 31A0 */ -#else -/* function ia_css_dmaproxy_sp_vmem_write: 337F */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tagger_frames #define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_tagger_frames 0x49EC -#else -#define HIVE_ADDR_tagger_frames 0x4A48 -#endif #define HIVE_SIZE_tagger_frames 168 #else #endif #endif #define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_tagger_frames 0x49EC -#else -#define HIVE_ADDR_sp_tagger_frames 0x4A48 -#endif #define HIVE_SIZE_sp_tagger_frames 168 -#ifndef ISP2401 /* function ia_css_isys_sp_token_map_snd_capture_req: 5FB8 */ -#else -/* function ia_css_isys_sp_token_map_snd_capture_req: 60F3 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_if #define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_reading_if 0x47C8 -#else -#define HIVE_ADDR_sem_for_reading_if 0x4810 -#endif #define HIVE_SIZE_sem_for_reading_if 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_reading_if 0x47C8 -#else -#define HIVE_ADDR_sp_sem_for_reading_if 0x4810 -#endif #define HIVE_SIZE_sp_sem_for_reading_if 20 -#ifndef ISP2401 /* function sp_generate_interrupts: 95B */ -#else -/* function sp_generate_interrupts: 8EF */ -/* function ia_css_pipeline_sp_start: 1858 */ -#endif - -#ifndef ISP2401 /* function ia_css_pipeline_sp_start: 181E */ -#else -/* function ia_css_thread_default_callout: 6BE3 */ -#endif -#ifndef ISP2401 /* function ia_css_sp_rawcopy_init: 50F3 */ -#else -/* function ia_css_sp_rawcopy_init: 5351 */ -#endif -#ifndef ISP2401 /* function tmr_clock_read: 6596 */ -#else -/* function tmr_clock_read: 66D1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_BAMEM_BASE #define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ISP_BAMEM_BASE 0x2F8 -#else -#define HIVE_ADDR_ISP_BAMEM_BASE 0x310 -#endif #define HIVE_SIZE_ISP_BAMEM_BASE 4 #else #endif #endif #define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x2F8 -#else -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x310 -#endif #define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 -#ifndef ISP2401 /* function ia_css_isys_sp_frontend_rcv_capture_ack: 5C1F */ -#else -/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5D5A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#else -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 -#endif #define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#else -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#ifndef ISP2401 /* function css_get_frame_processing_time_start: 1FAF */ -#else -/* function css_get_frame_processing_time_start: 1FFF */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame #define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_all_cbs_frame 0x47DC -#else -#define HIVE_ADDR_sp_all_cbs_frame 0x4824 -#endif #define HIVE_SIZE_sp_all_cbs_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_all_cbs_frame 0x47DC -#else -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x4824 -#endif #define HIVE_SIZE_sp_sp_all_cbs_frame 16 -#ifndef ISP2401 /* function thread_sp_queue_print: D8F */ -#else -/* function thread_sp_queue_print: D84 */ -#endif -#ifndef ISP2401 /* function sp_notify_eof: 907 */ -#else -/* function sp_notify_eof: 89B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_str2mem #define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sem_for_str2mem 0x47EC -#else -#define HIVE_ADDR_sem_for_str2mem 0x4834 -#endif #define HIVE_SIZE_sem_for_str2mem 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sem_for_str2mem 0x47EC -#else -#define HIVE_ADDR_sp_sem_for_str2mem 0x4834 -#endif #define HIVE_SIZE_sp_sem_for_str2mem 20 -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_is_marked_from_start: 2B41 */ -#else -/* function ia_css_tagger_buf_sp_is_marked_from_start: 2CE3 */ -#endif -#ifndef ISP2401 /* function ia_css_bufq_sp_acquire_dynamic_buf: 2F86 */ -#else -/* function ia_css_bufq_sp_acquire_dynamic_buf: 3128 */ -#endif -#ifndef ISP2401 /* function ia_css_circbuf_destroy: 101D */ -#else -/* function ia_css_circbuf_destroy: 1012 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_PMEM_BASE @@ -3497,87 +1859,43 @@ #define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC #define HIVE_SIZE_sp_ISP_PMEM_BASE 4 -#ifndef ISP2401 /* function ia_css_sp_isp_param_mem_load: 46F7 */ -#else -/* function ia_css_sp_isp_param_mem_load: 497F */ -#endif -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_pop_from_start: 292D */ -#else -/* function ia_css_tagger_buf_sp_pop_from_start: 2ACF */ -#endif -#ifndef ISP2401 /* function __div: 685F */ -#else -/* function __div: 69D2 */ -#endif -#ifndef ISP2401 /* function ia_css_isys_sp_frontend_create: 5DF0 */ -#else -/* function ia_css_isys_sp_frontend_create: 5F2B */ -#endif -#ifndef ISP2401 /* function ia_css_rmgr_sp_refcount_release_vbuf: 6323 */ -#else -/* function ia_css_rmgr_sp_refcount_release_vbuf: 645E */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_use #define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_ia_css_flash_sp_in_use 0x4A9C -#else -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4AF8 -#endif #define HIVE_SIZE_ia_css_flash_sp_in_use 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4A9C -#else -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4AF8 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 -#ifndef ISP2401 /* function ia_css_thread_sem_sp_wait: 6B42 */ -#else -/* function ia_css_thread_sem_sp_wait: 6CB7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sleep_mode #define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sleep_mode 0x4110 -#else -#define HIVE_ADDR_sp_sleep_mode 0x4130 -#endif #define HIVE_SIZE_sp_sleep_mode 4 #else #endif #endif #define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_sp_sleep_mode 0x4110 -#else -#define HIVE_ADDR_sp_sp_sleep_mode 0x4130 -#endif #define HIVE_SIZE_sp_sp_sleep_mode 4 -#ifndef ISP2401 /* function ia_css_tagger_buf_sp_push: 2A3C */ -#else -/* function ia_css_tagger_buf_sp_push: 2BDE */ -#endif /* function mmu_invalidate_cache: D3 */ @@ -3593,41 +1911,25 @@ #define HIVE_ADDR_sp_sp_max_cb_elems 0x148 #define HIVE_SIZE_sp_sp_max_cb_elems 8 -#ifndef ISP2401 /* function ia_css_queue_remote_init: 4BEE */ -#else -/* function ia_css_queue_remote_init: 4E4C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stop_req #define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_isp_stop_req 0x4680 -#else -#define HIVE_ADDR_isp_stop_req 0x46C8 -#endif #define HIVE_SIZE_isp_stop_req 4 #else #endif #endif #define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#ifndef ISP2401 #define HIVE_ADDR_sp_isp_stop_req 0x4680 -#else -#define HIVE_ADDR_sp_isp_stop_req 0x46C8 -#endif #define HIVE_SIZE_sp_isp_stop_req 4 -#ifndef ISP2401 #define HIVE_ICACHE_sp_critical_SEGMENT_START 0 #define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 -#endif #endif /* _sp_map_h_ */ -#ifndef ISP2401 extern void sh_css_dump_sp_dmem(void); void sh_css_dump_sp_dmem(void) { } -#endif -- GitLab From f172f6eef1ff7d8bc8c9353d410376f258031bdb Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 14:19:44 +0200 Subject: [PATCH 444/503] media: atomisp: cleanup contents of css_2401_csi2p_system Everything there is for ISP2401 only. So, we can trivially solve all ifdefs at once. Signed-off-by: Mauro Carvalho Chehab --- .../ia_css_isp_configs.c | 2 - .../ia_css_isp_params.c | 150 -- .../pci/css_2401_csi2p_system/spmem_dump.c | 1720 ----------------- 3 files changed, 1872 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c index 9fae24b3e689f..cd37e7e3d7796 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c @@ -273,7 +273,6 @@ ia_css_configure_output( } /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#ifdef ISP2401 void ia_css_configure_sc( @@ -302,7 +301,6 @@ ia_css_configure_sc( } /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#endif void ia_css_configure_raw( diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c index 2df57c4864b72..68297296885e8 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c @@ -1720,7 +1720,6 @@ ia_css_process_xnr3( "ia_css_process_xnr3() leave:\n"); } } -#ifdef ISP2401 { unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; @@ -1744,7 +1743,6 @@ ia_css_process_xnr3( "ia_css_process_xnr3() leave:\n"); } } -#endif } /* Code generated by genparam/gencode.c:gen_param_process_table() */ @@ -1836,10 +1834,6 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dp_config = *config; params->config_changed[IA_CSS_DP_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_DP_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); } @@ -1879,10 +1873,6 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->wb_config = *config; params->config_changed[IA_CSS_WB_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_WB_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); } @@ -1922,10 +1912,6 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->tnr_config = *config; params->config_changed[IA_CSS_TNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_TNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); } @@ -1965,10 +1951,6 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ob_config = *config; params->config_changed[IA_CSS_OB_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_OB_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); } @@ -2008,10 +1990,6 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->de_config = *config; params->config_changed[IA_CSS_DE_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_DE_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); } @@ -2051,10 +2029,6 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_config = *config; params->config_changed[IA_CSS_ANR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_ANR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); } @@ -2094,10 +2068,6 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_thres = *config; params->config_changed[IA_CSS_ANR2_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_ANR2_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); } @@ -2137,10 +2107,6 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ce_config = *config; params->config_changed[IA_CSS_CE_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CE_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); } @@ -2180,10 +2146,6 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ecd_config = *config; params->config_changed[IA_CSS_ECD_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_ECD_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); } @@ -2223,10 +2185,6 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ynr_config = *config; params->config_changed[IA_CSS_YNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_YNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); } @@ -2266,10 +2224,6 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->fc_config = *config; params->config_changed[IA_CSS_FC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_FC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); } @@ -2309,10 +2263,6 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cnr_config = *config; params->config_changed[IA_CSS_CNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); } @@ -2352,10 +2302,6 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->macc_config = *config; params->config_changed[IA_CSS_MACC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_MACC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); } @@ -2395,10 +2341,6 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ctc_config = *config; params->config_changed[IA_CSS_CTC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CTC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); } @@ -2436,10 +2378,6 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); params->aa_config = *config; params->config_changed[IA_CSS_AA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_AA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); } @@ -2479,10 +2417,6 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->yuv2rgb_cc_config = *config; params->config_changed[IA_CSS_YUV2RGB_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); } @@ -2522,10 +2456,6 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->rgb2yuv_cc_config = *config; params->config_changed[IA_CSS_RGB2YUV_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); } @@ -2565,10 +2495,6 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cc_config = *config; params->config_changed[IA_CSS_CSC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CSC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); } @@ -2609,10 +2535,6 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->nr_config = *config; params->config_changed[IA_CSS_BNR_ID] = true; params->config_changed[IA_CSS_NR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_NR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); } @@ -2652,10 +2574,6 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->gc_config = *config; params->config_changed[IA_CSS_GC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_GC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); } @@ -2699,10 +2617,6 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } @@ -2746,10 +2660,6 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } @@ -2793,10 +2703,6 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } @@ -2840,10 +2746,6 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } @@ -2887,10 +2789,6 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } @@ -2934,10 +2832,6 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } @@ -2981,10 +2875,6 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } @@ -3028,10 +2918,6 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } @@ -3071,10 +2957,6 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->r_gamma_table = *config; params->config_changed[IA_CSS_R_GAMMA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); } @@ -3114,10 +2996,6 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->g_gamma_table = *config; params->config_changed[IA_CSS_G_GAMMA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); } @@ -3157,10 +3035,6 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->b_gamma_table = *config; params->config_changed[IA_CSS_B_GAMMA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); } @@ -3201,10 +3075,6 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; params->config_changed[IA_CSS_XNR_TABLE_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); } @@ -3244,10 +3114,6 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->formats_config = *config; params->config_changed[IA_CSS_FORMATS_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_FORMATS_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); } @@ -3287,10 +3153,6 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_config = *config; params->config_changed[IA_CSS_XNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_XNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); } @@ -3330,10 +3192,6 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr3_config = *config; params->config_changed[IA_CSS_XNR3_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_XNR3_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); } @@ -3374,10 +3232,6 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->s3a_config = *config; params->config_changed[IA_CSS_BH_ID] = true; params->config_changed[IA_CSS_S3A_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_S3A_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); } @@ -3417,10 +3271,6 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->output_config = *config; params->config_changed[IA_CSS_OUTPUT_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_OUTPUT_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); } diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c index 895d4f171caf3..9d96d52e5eccd 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c @@ -21,115 +21,55 @@ #define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) -#ifndef ISP2401 -/* function longjmp: 680D */ -#else /* function longjmp: 6A0B */ -#endif -#ifndef ISP2401 -/* function tmpmem_init_dmem: 6558 */ -#else /* function tmpmem_init_dmem: 671E */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_addr_B: 3C50 */ -#else /* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ /* function ia_css_pipe_data_init_tagger_resources: AC7 */ -#endif /* function debug_buffer_set_ddr_addr: DD */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_mipi #define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_mipi 0x7398 -#else #define HIVE_ADDR_vbuf_mipi 0x7444 -#endif #define HIVE_SIZE_vbuf_mipi 12 #else #endif #endif #define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_mipi 0x7398 -#else #define HIVE_ADDR_sp_vbuf_mipi 0x7444 -#endif #define HIVE_SIZE_sp_vbuf_mipi 12 -#ifndef ISP2401 -/* function ia_css_event_sp_decode: 3E41 */ -#else /* function ia_css_event_sp_decode: 3FB6 */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_get_size: 51BF */ -#else /* function ia_css_queue_get_size: 53C8 */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_load: 5800 */ -#else /* function ia_css_queue_load: 59DF */ -#endif -#ifndef ISP2401 -/* function setjmp: 6816 */ -#else /* function setjmp: 6A14 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_sfi_get_current_frame: 27BF */ -#else /* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue #define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x5760 -#else #define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC -#endif #define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x5760 -#else #define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC -#endif #define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_wait_for_ack: 6DA9 */ -#else /* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_func: 596B */ -#else /* function ia_css_sp_rawcopy_func: 5B4A */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_pop_marked: 3339 */ -#else /* function ia_css_tagger_buf_sp_pop_marked: 345C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH @@ -146,99 +86,55 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stage #define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_stage 0x6C98 -#else #define HIVE_ADDR_isp_stage 0x6D48 -#endif #define HIVE_SIZE_isp_stage 832 #else #endif #endif #define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_stage 0x6C98 -#else #define HIVE_ADDR_sp_isp_stage 0x6D48 -#endif #define HIVE_SIZE_sp_isp_stage 832 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_raw #define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_raw 0x37C -#else #define HIVE_ADDR_vbuf_raw 0x394 -#endif #define HIVE_SIZE_vbuf_raw 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_raw 0x37C -#else #define HIVE_ADDR_sp_vbuf_raw 0x394 -#endif #define HIVE_SIZE_sp_vbuf_raw 4 -#ifndef ISP2401 -/* function ia_css_sp_bin_copy_func: 594C */ -#else /* function ia_css_sp_bin_copy_func: 5B2B */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_item_store: 554E */ -#else /* function ia_css_queue_item_store: 572D */ -#endif -#ifndef ISP2401 -/* function input_system_reset: 1286 */ -#else /* function input_system_reset: 1201 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5B38 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5B38 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5B4C -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5B4C -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 /* function sp_start_isp: 39C */ @@ -246,196 +142,94 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_binary_group #define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_binary_group 0x7088 -#else #define HIVE_ADDR_sp_binary_group 0x7138 -#endif #define HIVE_SIZE_sp_binary_group 32 #else #endif #endif #define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_binary_group 0x7088 -#else #define HIVE_ADDR_sp_sp_binary_group 0x7138 -#endif #define HIVE_SIZE_sp_sp_binary_group 32 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sw_state #define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sw_state 0x7344 -#else #define HIVE_ADDR_sp_sw_state 0x73F0 -#endif #define HIVE_SIZE_sp_sw_state 4 #else #endif #endif #define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_sw_state 0x7344 -#else #define HIVE_ADDR_sp_sp_sw_state 0x73F0 -#endif #define HIVE_SIZE_sp_sp_sw_state 4 -#ifndef ISP2401 -/* function ia_css_thread_sp_main: 13F7 */ -#else /* function ia_css_thread_sp_main: 136D */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_internal_buffers: 4047 */ -#else /* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_psys_event_queue_handle #define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5BEC -#else #define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 -#endif #define HIVE_SIZE_sp2host_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5BEC -#else #define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 -#endif #define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 -#ifndef ISP2401 -/* function pixelgen_unit_test: E68 */ -#else /* function pixelgen_unit_test: E62 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue #define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5774 -#else #define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 -#endif #define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5774 -#else #define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 -#endif #define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 -#ifndef ISP2401 -/* function ia_css_tagger_sp_propagate_frame: 2D52 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_stop_copy_preview -#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_stop_copy_preview 0x7328 -#define HIVE_SIZE_sp_stop_copy_preview 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_stop_copy_preview 0x7328 -#define HIVE_SIZE_sp_sp_stop_copy_preview 4 -#else /* function ia_css_tagger_sp_propagate_frame: 2D23 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_handles #define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_handles 0x73A4 -#else #define HIVE_ADDR_vbuf_handles 0x7450 -#endif #define HIVE_SIZE_vbuf_handles 960 #else #endif #endif #define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_handles 0x73A4 -#else #define HIVE_ADDR_sp_vbuf_handles 0x7450 -#endif #define HIVE_SIZE_sp_vbuf_handles 960 -#ifndef ISP2401 -/* function ia_css_queue_store: 56B4 */ - -/* function ia_css_sp_flash_register: 356E */ -#else /* function ia_css_queue_store: 5893 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_dummy_function: 5CF7 */ -#else /* function ia_css_sp_flash_register: 3691 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_init: 201C */ -#else /* function ia_css_pipeline_sp_init: 1FD7 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_configure: 2C42 */ -#else /* function ia_css_tagger_sp_configure: 2C13 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_end_binary: 3E8A */ -#else /* function ia_css_ispctrl_sp_end_binary: 3FFF */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5BF8 -#else #define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#endif #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5BF8 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#ifndef ISP2401 -/* function pixelgen_tpg_run: F1E */ -#else /* function pixelgen_tpg_run: F18 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_is_pending_mask @@ -452,157 +246,81 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_frame #define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cb_elems_frame 0x5788 -#else #define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 -#endif #define HIVE_SIZE_sp_all_cb_elems_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5788 -#else #define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 -#endif #define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_isys_event_queue_handle #define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5C0C -#else #define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 -#endif #define HIVE_SIZE_sp2host_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5C0C -#else #define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 -#endif #define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_com #define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host_sp_com 0x3E48 -#else #define HIVE_ADDR_host_sp_com 0x3E6C -#endif #define HIVE_SIZE_host_sp_com 220 #else #endif #endif #define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host_sp_com 0x3E48 -#else #define HIVE_ADDR_sp_host_sp_com 0x3E6C -#endif #define HIVE_SIZE_sp_host_sp_com 220 -#ifndef ISP2401 -/* function ia_css_queue_get_free_space: 5313 */ -#else /* function ia_css_queue_get_free_space: 54F2 */ -#endif -#ifndef ISP2401 -/* function exec_image_pipe: 5E6 */ -#else /* function exec_image_pipe: 57A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_init_dmem_data #define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_init_dmem_data 0x7348 -#else #define HIVE_ADDR_sp_init_dmem_data 0x73F4 -#endif #define HIVE_SIZE_sp_init_dmem_data 24 #else #endif #endif #define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_init_dmem_data 0x7348 -#else #define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 -#endif #define HIVE_SIZE_sp_sp_init_dmem_data 24 -#ifndef ISP2401 -/* function ia_css_sp_metadata_start: 5DD1 */ -#else /* function ia_css_sp_metadata_start: 5EB3 */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_init_buffer_queues: 35BF */ -#else /* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_stop: 1FFF */ -#else /* function ia_css_pipeline_sp_stop: 1FBA */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_connect_pipes: 312C */ -#else /* function ia_css_tagger_sp_connect_pipes: 30FD */ -#endif -#ifndef ISP2401 -/* function sp_isys_copy_wait: 644 */ -#else /* function sp_isys_copy_wait: 5D8 */ -#endif /* function is_isp_debug_buffer_full: 337 */ -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3BD3 */ -#else /* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ -#endif -#ifndef ISP2401 -/* function encode_and_post_timer_event: AA8 */ -#else /* function encode_and_post_timer_event: A3C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_input_system_bz2788_active #define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_input_system_bz2788_active 0x250C -#else #define HIVE_ADDR_input_system_bz2788_active 0x2524 -#endif #define HIVE_SIZE_input_system_bz2788_active 4 #else #endif #endif #define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_input_system_bz2788_active 0x250C -#else #define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 -#endif #define HIVE_SIZE_sp_input_system_bz2788_active 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -620,86 +338,46 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_per_frame_data #define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_per_frame_data 0x3F24 -#else #define HIVE_ADDR_sp_per_frame_data 0x3F48 -#endif #define HIVE_SIZE_sp_per_frame_data 4 #else #endif #endif #define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_per_frame_data 0x3F24 -#else #define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 -#endif #define HIVE_SIZE_sp_sp_per_frame_data 4 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_vbuf_dequeue: 62AC */ -#else /* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_psys_event_queue_handle #define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5C18 -#else #define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 -#endif #define HIVE_SIZE_host2sp_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5C18 -#else #define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 -#endif #define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_xmem_bin_addr #define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_xmem_bin_addr 0x3F28 -#else #define HIVE_ADDR_xmem_bin_addr 0x3F4C -#endif #define HIVE_SIZE_xmem_bin_addr 4 #else #endif #endif #define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_xmem_bin_addr 0x3F28 -#else #define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C -#endif #define HIVE_SIZE_sp_xmem_bin_addr 4 -#ifndef ISP2401 -/* function tmr_clock_init: 16F9 */ -#else /* function tmr_clock_init: 166F */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_run: 1ABF */ -#else /* function ia_css_pipeline_sp_run: 1A61 */ -#endif -#ifndef ISP2401 -/* function memcpy: 68B6 */ -#else /* function memcpy: 6AB4 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS @@ -716,91 +394,47 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GP_DEVICE_BASE #define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_GP_DEVICE_BASE 0x384 -#else #define HIVE_ADDR_GP_DEVICE_BASE 0x39C -#endif #define HIVE_SIZE_GP_DEVICE_BASE 4 #else #endif #endif #define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x384 -#else #define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C -#endif #define HIVE_SIZE_sp_GP_DEVICE_BASE 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_ready_queue #define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x278 -#else #define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C -#endif #define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x278 -#else #define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C -#endif #define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 -#ifndef ISP2401 -/* function stream2mmio_send_command: E0A */ -#else /* function stream2mmio_send_command: E04 */ -#endif -#ifndef ISP2401 -/* function ia_css_uds_sp_scale_params: 65BF */ -#else /* function ia_css_uds_sp_scale_params: 67BD */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_increase_size: 14DC */ -#else /* function ia_css_circbuf_increase_size: 1452 */ -#endif -#ifndef ISP2401 -/* function __divu: 6834 */ -#else /* function __divu: 6A32 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_get_state: 131F */ -#else /* function ia_css_thread_sp_get_state: 1295 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_stop #define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_cont_capt_stop 0x5798 -#else #define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 -#endif #define HIVE_SIZE_sem_for_cont_capt_stop 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5798 -#else #define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 -#endif #define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -815,51 +449,25 @@ #define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC #define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 -#ifndef ISP2401 -/* function thread_fiber_sp_main: 14D5 */ -#else /* function thread_fiber_sp_main: 144B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_pipe_thread #define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_pipe_thread 0x58DC -#define HIVE_SIZE_sp_isp_pipe_thread 340 -#else #define HIVE_ADDR_sp_isp_pipe_thread 0x5978 #define HIVE_SIZE_sp_isp_pipe_thread 360 -#endif #else #endif #endif #define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x58DC -#define HIVE_SIZE_sp_sp_isp_pipe_thread 340 -#else #define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 #define HIVE_SIZE_sp_sp_isp_pipe_thread 360 -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_handle_parameter_sets: 193F */ -#else /* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_set_state: 5DED */ -#else /* function ia_css_spctrl_sp_set_state: 5ECF */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sem_sp_signal: 6A99 */ -#else /* function ia_css_thread_sem_sp_signal: 6D18 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_IRQ_BASE @@ -873,11 +481,7 @@ #define HIVE_ADDR_sp_IRQ_BASE 0x2C #define HIVE_SIZE_sp_IRQ_BASE 16 -#ifndef ISP2401 -/* function ia_css_virtual_isys_sp_isr_init: 5E8C */ -#else /* function ia_css_virtual_isys_sp_isr_init: 5F70 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_TIMED_CTRL_BASE @@ -891,59 +495,24 @@ #define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 #define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 -#ifndef ISP2401 -/* function ia_css_isys_sp_generate_exp_id: 613C */ - -/* function ia_css_rmgr_sp_init: 61A7 */ -#else /* function ia_css_isys_sp_generate_exp_id: 6302 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sem_sp_init: 6B6A */ -#else /* function ia_css_rmgr_sp_init: 636D */ -#endif -#ifndef ISP2401 -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x390 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x390 -#define HIVE_SIZE_sp_is_isp_requested 4 -#else /* function ia_css_thread_sem_sp_init: 6DE7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_frame #define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_reading_cb_frame 0x57AC -#else #define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 -#endif #define HIVE_SIZE_sem_for_reading_cb_frame 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x57AC -#else #define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 -#endif #define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_execute: 3B3B */ -#else #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_is_isp_requested #define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem @@ -957,37 +526,16 @@ #define HIVE_SIZE_sp_is_isp_requested 4 /* function ia_css_dmaproxy_sp_execute: 3C9B */ -#endif -#ifndef ISP2401 -/* function csi_rx_backend_rst: CE6 */ -#else /* function csi_rx_backend_rst: CE0 */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_is_empty: 51FA */ -#else /* function ia_css_queue_is_empty: 7144 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_has_stopped: 1FF5 */ -#else /* function ia_css_pipeline_sp_has_stopped: 1FB0 */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_extract: 15E0 */ -#else /* function ia_css_circbuf_extract: 1556 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_is_locked_from_start: 344F */ -#else /* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_sp_thread @@ -1001,29 +549,13 @@ #define HIVE_ADDR_sp_current_sp_thread 0x274 #define HIVE_SIZE_sp_current_sp_thread 4 -#ifndef ISP2401 -/* function ia_css_spctrl_sp_get_spid: 5DF4 */ -#else /* function ia_css_spctrl_sp_get_spid: 5ED6 */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_reset_buffers: 3646 */ -#else /* function ia_css_bufq_sp_reset_buffers: 3769 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_read_byte_addr: 6DD7 */ -#else /* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_uninit: 61A0 */ -#else /* function ia_css_rmgr_sp_uninit: 6366 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_stack @@ -1049,246 +581,134 @@ #define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 #define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 -#ifndef ISP2401 -/* function ia_css_circbuf_peek: 15C2 */ -#else /* function ia_css_circbuf_peek: 1538 */ -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_wait_for_in_param: 1708 */ -#else /* function ia_css_parambuf_sp_wait_for_in_param: 167E */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_param #define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cb_elems_param 0x57D4 -#else #define HIVE_ADDR_sp_all_cb_elems_param 0x5870 -#endif #define HIVE_SIZE_sp_all_cb_elems_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x57D4 -#else #define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 -#endif #define HIVE_SIZE_sp_sp_all_cb_elems_param 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_pipeline_sp_curr_binary_id #define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x284 -#else #define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 -#endif #define HIVE_SIZE_pipeline_sp_curr_binary_id 4 #else #endif #endif #define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x284 -#else #define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 -#endif #define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame_desc #define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x57E4 -#else #define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 -#endif #define HIVE_SIZE_sp_all_cbs_frame_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x57E4 -#else #define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 -#endif #define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 -#ifndef ISP2401 -/* function sp_isys_copy_func_v2: 629 */ -#else /* function sp_isys_copy_func_v2: 5BD */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_param #define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_reading_cb_param 0x57EC -#else #define HIVE_ADDR_sem_for_reading_cb_param 0x5888 -#endif #define HIVE_SIZE_sem_for_reading_cb_param 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x57EC -#else #define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 -#endif #define HIVE_SIZE_sp_sem_for_reading_cb_param 40 -#ifndef ISP2401 -/* function ia_css_queue_get_used_space: 52C7 */ -#else /* function ia_css_queue_get_used_space: 54A6 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_start #define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_cont_capt_start 0x5814 -#else #define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 -#endif #define HIVE_SIZE_sem_for_cont_capt_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x5814 -#else #define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 -#endif #define HIVE_SIZE_sp_sem_for_cont_capt_start 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tmp_heap #define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_tmp_heap 0x70A8 -#else #define HIVE_ADDR_tmp_heap 0x7158 -#endif #define HIVE_SIZE_tmp_heap 640 #else #endif #endif #define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_tmp_heap 0x70A8 -#else #define HIVE_ADDR_sp_tmp_heap 0x7158 -#endif #define HIVE_SIZE_sp_tmp_heap 640 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_get_num_vbuf: 64B0 */ -#else /* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_output_compute_dma_info: 4863 */ -#else /* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_lock_exp_id: 2A0F */ -#else /* function ia_css_tagger_sp_lock_exp_id: 29E0 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5C24 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5C24 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#ifndef ISP2401 -/* function ia_css_queue_is_full: 535E */ -#else /* function ia_css_queue_is_full: 553D */ -#endif /* function debug_buffer_init_isp: E4 */ -#ifndef ISP2401 -/* function ia_css_tagger_sp_exp_id_is_locked: 2945 */ -#else /* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem #define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7764 -#else #define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#endif #define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7764 -#else #define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#endif #define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_dump: 6287 */ -#else /* function ia_css_rmgr_sp_refcount_dump: 644D */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id #define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5C60 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5C60 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1303,101 +723,53 @@ #define HIVE_ADDR_sp_sp_pipe_threads 0x150 #define HIVE_SIZE_sp_sp_pipe_threads 20 -#ifndef ISP2401 -/* function sp_event_proxy_func: 78D */ -#else /* function sp_event_proxy_func: 721 */ -#endif -#ifndef ISP2401 -/* function ibuf_ctrl_run: D7F */ -#else /* function ibuf_ctrl_run: D79 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_isys_event_queue_handle #define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5C74 -#else #define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 -#endif #define HIVE_SIZE_host2sp_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5C74 -#else #define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 -#endif #define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 -#ifndef ISP2401 -/* function ia_css_thread_sp_yield: 6A12 */ -#else /* function ia_css_thread_sp_yield: 6C96 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param_desc #define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_param_desc 0x5828 -#else #define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 -#endif #define HIVE_SIZE_sp_all_cbs_param_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x5828 -#else #define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 -#endif #define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb #define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6C8C -#else #define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#endif #define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6C8C -#else #define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#endif #define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 -#ifndef ISP2401 -/* function ia_css_thread_sp_fork: 13AC */ -#else /* function ia_css_thread_sp_fork: 1322 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_destroy: 3136 */ -#else /* function ia_css_tagger_sp_destroy: 3107 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_vmem_read: 3ADB */ -#else /* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES @@ -1411,41 +783,17 @@ #define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 #define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 -#ifndef ISP2401 -/* function initialize_sp_group: 5F6 */ -#else /* function initialize_sp_group: 58A */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_peek: 325B */ -#else /* function ia_css_tagger_buf_sp_peek: 337E */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_init: 13D8 */ -#else /* function ia_css_thread_sp_init: 134E */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_reset_exp_id: 6133 */ -#else /* function qos_scheduler_update_fps: 67AD */ -#endif -#ifndef ISP2401 -/* function qos_scheduler_update_fps: 65AF */ -#else /* function ia_css_isys_sp_reset_exp_id: 62F9 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_set_stream_base_addr: 4F38 */ -#else /* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_DMEM_BASE @@ -1471,90 +819,50 @@ #define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 #define HIVE_SIZE_sp_SP_DMEM_BASE 4 -#ifndef ISP2401 -/* function ibuf_ctrl_transfer: D67 */ -#else /* function ibuf_ctrl_transfer: D61 */ /* function __ia_css_queue_is_empty_text: 5403 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_read: 3B51 */ -#else /* function ia_css_dmaproxy_sp_read: 3CB1 */ -#endif -#ifndef ISP2401 -/* function virtual_isys_stream_is_capture_done: 5EB0 */ -#else /* function virtual_isys_stream_is_capture_done: 5F94 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_raw_copy_line_count #define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_raw_copy_line_count 0x360 -#else #define HIVE_ADDR_raw_copy_line_count 0x378 -#endif #define HIVE_SIZE_raw_copy_line_count 4 #else #endif #endif #define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_raw_copy_line_count 0x360 -#else #define HIVE_ADDR_sp_raw_copy_line_count 0x378 -#endif #define HIVE_SIZE_sp_raw_copy_line_count 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle #define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5C80 -#else #define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C -#endif #define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5C80 -#else #define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C -#endif #define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 -#ifndef ISP2401 -/* function ia_css_queue_peek: 523D */ -#else /* function ia_css_queue_peek: 541C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt #define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5B2C -#else #define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 -#endif #define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5B2C -#else #define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1569,45 +877,25 @@ #define HIVE_ADDR_sp_event_can_send_token_mask 0x88 #define HIVE_SIZE_sp_event_can_send_token_mask 44 -#ifndef ISP2401 -/* function csi_rx_frontend_stop: C11 */ -#else /* function csi_rx_frontend_stop: C0B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_thread #define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_thread 0x6FD8 -#else #define HIVE_ADDR_isp_thread 0x7088 -#endif #define HIVE_SIZE_isp_thread 4 #else #endif #endif #define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_thread 0x6FD8 -#else #define HIVE_ADDR_sp_isp_thread 0x7088 -#endif #define HIVE_SIZE_sp_isp_thread 4 -#ifndef ISP2401 -/* function encode_and_post_sp_event_non_blocking: AF0 */ -#else /* function encode_and_post_sp_event_non_blocking: A84 */ -#endif /* function is_ddr_debug_buffer_full: 2CC */ -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 32AB */ -#else /* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_fiber @@ -1621,187 +909,99 @@ #define HIVE_ADDR_sp_sp_threads_fiber 0x194 #define HIVE_SIZE_sp_sp_threads_fiber 24 -#ifndef ISP2401 -/* function encode_and_post_sp_event: A79 */ -#else /* function encode_and_post_sp_event: A0D */ -#endif /* function debug_enqueue_ddr: EE */ -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_init_vbuf: 6242 */ -#else /* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ -#endif -#ifndef ISP2401 -/* function dmaproxy_sp_read_write: 6E86 */ -#else /* function dmaproxy_sp_read_write: 70C3 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer #define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6C90 -#else #define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#endif #define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6C90 -#else #define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#endif #define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_buffer_queue_handle #define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5C8C -#else #define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 -#endif #define HIVE_SIZE_host2sp_buffer_queue_handle 480 #else #endif #endif #define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5C8C -#else #define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 -#endif #define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_service #define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3054 -#else #define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 -#endif #define HIVE_SIZE_ia_css_flash_sp_in_service 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3054 -#else #define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_process: 6B92 */ -#else /* function ia_css_dmaproxy_sp_process: 6E0F */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_mark_from_end: 3533 */ -#else /* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_cs: 3F77 */ -#else /* function ia_css_ispctrl_sp_init_cs: 40FA */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_init: 5E02 */ -#else /* function ia_css_spctrl_sp_init: 5EE4 */ -#endif -#ifndef ISP2401 -/* function sp_event_proxy_init: 7A2 */ -#else /* function sp_event_proxy_init: 736 */ -#endif -#ifndef ISP2401 -/* function input_system_input_port_close: 109B */ -#else /* function input_system_input_port_close: 1095 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick #define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5E6C -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5E6C -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_output #define HIVE_MEM_sp_output scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_output 0x3F2C -#else #define HIVE_ADDR_sp_output 0x3F50 -#endif #define HIVE_SIZE_sp_output 16 #else #endif #endif #define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_output 0x3F2C -#else #define HIVE_ADDR_sp_sp_output 0x3F50 -#endif #define HIVE_SIZE_sp_sp_output 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5E94 -#else #define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#endif #define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5E94 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 -#ifndef ISP2401 -/* function pixelgen_prbs_config: E93 */ -#else /* function pixelgen_prbs_config: E8D */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_CTRL_BASE @@ -1827,101 +1027,53 @@ #define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C #define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 -#ifndef ISP2401 -/* function sp_dma_proxy_reset_channels: 3DAB */ -#else /* function sp_dma_proxy_reset_channels: 3F20 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_update_size: 322A */ -#else /* function ia_css_tagger_sp_update_size: 334D */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_host_sp_queue #define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x61B4 -#else #define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 -#endif #define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x61B4 -#else #define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 -#endif #define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 -#ifndef ISP2401 -/* function thread_fiber_sp_create: 1444 */ -#else /* function thread_fiber_sp_create: 13BA */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_increments: 3C3D */ -#else /* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_frame #define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_writing_cb_frame 0x5830 -#else #define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC -#endif #define HIVE_SIZE_sem_for_writing_cb_frame 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x5830 -#else #define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC -#endif #define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_param #define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_writing_cb_param 0x5844 -#else #define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 -#endif #define HIVE_SIZE_sem_for_writing_cb_param 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x5844 -#else #define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 -#endif #define HIVE_SIZE_sp_sem_for_writing_cb_param 20 -#ifndef ISP2401 -/* function pixelgen_tpg_is_done: F0D */ -#else /* function pixelgen_tpg_is_done: F07 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_stream_capture_indication: 5FB6 */ -#else /* function ia_css_isys_stream_capture_indication: 60D7 */ -#endif /* function sp_start_isp_entry: 392 */ #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1931,121 +1083,53 @@ #endif #define HIVE_ADDR_sp_sp_start_isp_entry 0x392 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_unmark_all: 34B7 */ -#else /* function ia_css_tagger_buf_sp_unmark_all: 35DA */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_unmark_from_start: 34F8 */ -#else /* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_channel_acquire: 3DD7 */ -#else /* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_add_num_vbuf: 648C */ -#else /* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ -#endif -#ifndef ISP2401 -/* function ibuf_ctrl_config: D8B */ -#else /* function ibuf_ctrl_config: D85 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_stream_stop: 602E */ -#else /* function ia_css_isys_stream_stop: 61F4 */ -#endif -#ifndef ISP2401 -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3AA7 */ -#else /* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_acquire_buf_elem: 291D */ -#else /* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_is_dynamic_buffer: 3990 */ -#else /* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_group #define HIVE_MEM_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_group 0x3F3C -#define HIVE_SIZE_sp_group 6176 -#else #define HIVE_ADDR_sp_group 0x3F60 #define HIVE_SIZE_sp_group 6296 -#endif #else #endif #endif #define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_group 0x3F3C -#define HIVE_SIZE_sp_sp_group 6176 -#else #define HIVE_ADDR_sp_sp_group 0x3F60 #define HIVE_SIZE_sp_sp_group 6296 -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_event_proxy_thread #define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_event_proxy_thread 0x5A30 -#define HIVE_SIZE_sp_event_proxy_thread 68 -#else #define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 #define HIVE_SIZE_sp_event_proxy_thread 72 -#endif #else #endif #endif #define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5A30 -#define HIVE_SIZE_sp_sp_event_proxy_thread 68 -#else #define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 #define HIVE_SIZE_sp_sp_event_proxy_thread 72 -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_kill: 1372 */ -#else /* function ia_css_thread_sp_kill: 12E8 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_create: 31E4 */ -#else /* function ia_css_tagger_sp_create: 32FB */ -#endif -#ifndef ISP2401 -/* function tmpmem_acquire_dmem: 6539 */ -#else /* function tmpmem_acquire_dmem: 66FF */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_MMU_BASE @@ -2059,67 +1143,31 @@ #define HIVE_ADDR_sp_MMU_BASE 0x24 #define HIVE_SIZE_sp_MMU_BASE 8 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_channel_release: 3DC3 */ -#else /* function ia_css_dmaproxy_sp_channel_release: 3F38 */ -#endif -#ifndef ISP2401 -/* function pixelgen_prbs_run: E81 */ -#else /* function pixelgen_prbs_run: E7B */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_is_idle: 3DA3 */ -#else /* function ia_css_dmaproxy_sp_is_idle: 3F18 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_qos_start #define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_qos_start 0x5858 -#else #define HIVE_ADDR_sem_for_qos_start 0x58F4 -#endif #define HIVE_SIZE_sem_for_qos_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_qos_start 0x5858 -#else #define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 -#endif #define HIVE_SIZE_sp_sem_for_qos_start 20 -#ifndef ISP2401 -/* function isp_hmem_load: B63 */ -#else /* function isp_hmem_load: B5D */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_release_buf_elem: 28F9 */ -#else /* function ia_css_tagger_sp_release_buf_elem: 28CA */ -#endif -#ifndef ISP2401 -/* function ia_css_eventq_sp_send: 3E19 */ -#else /* function ia_css_eventq_sp_send: 3F8E */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_unlock_from_start: 33E7 */ -#else /* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_debug_buffer_ddr_address @@ -2133,98 +1181,40 @@ #define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC #define HIVE_SIZE_sp_debug_buffer_ddr_address 4 -#ifndef ISP2401 -/* function sp_isys_copy_request: 6ED */ -#else /* function sp_isys_copy_request: 681 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 631C */ -#else /* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_set_priority: 136A */ -#else /* function ia_css_thread_sp_set_priority: 12E0 */ -#endif -#ifndef ISP2401 -/* function sizeof_hmem: C0A */ -#else /* function sizeof_hmem: C04 */ -#endif -#ifndef ISP2401 -/* function input_system_channel_open: 1241 */ -#else /* function input_system_channel_open: 11BC */ -#endif -#ifndef ISP2401 -/* function pixelgen_tpg_stop: EFB */ -#else /* function pixelgen_tpg_stop: EF5 */ -#endif -#ifndef ISP2401 -/* function tmpmem_release_dmem: 6528 */ -#else /* function tmpmem_release_dmem: 66EE */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_width_exception: 3C28 */ -#else /* function __ia_css_dmaproxy_sp_process_text: 3BAB */ -#endif -#ifndef ISP2401 -/* function sp_event_assert: 929 */ -#else /* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ -#endif -#ifndef ISP2401 -/* function ia_css_flash_sp_init_internal_params: 35B4 */ -#else /* function sp_event_assert: 8BD */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 32ED */ -#else /* function ia_css_flash_sp_init_internal_params: 36D7 */ -#endif -#ifndef ISP2401 -/* function __modu: 687A */ -#else /* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init_isp_vector: 3AAD */ -#else /* function __modu: 6A78 */ -#endif -#ifndef ISP2401 -/* function input_system_channel_transfer: 122A */ -#else /* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ /* function input_system_channel_transfer: 11A5 */ -#endif /* function isp_vamem_store: 0 */ -#ifdef ISP2401 /* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GDC_BASE #define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem @@ -2237,42 +1227,22 @@ #define HIVE_ADDR_sp_GDC_BASE 0x44 #define HIVE_SIZE_sp_GDC_BASE 8 -#ifndef ISP2401 -/* function ia_css_queue_local_init: 5528 */ -#else /* function ia_css_queue_local_init: 5707 */ -#endif -#ifndef ISP2401 -/* function sp_event_proxy_callout_func: 6947 */ -#else /* function sp_event_proxy_callout_func: 6B45 */ -#endif -#ifndef ISP2401 -/* function qos_scheduler_schedule_stage: 6580 */ -#else /* function qos_scheduler_schedule_stage: 6759 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads #define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5A78 -#else #define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 -#endif #define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5A78 -#else #define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 -#endif #define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -2287,63 +1257,31 @@ #define HIVE_ADDR_sp_sp_threads_stack_size 0x17C #define HIVE_SIZE_sp_sp_threads_stack_size 24 -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_isp_done_row_striping: 4849 */ -#else /* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ -#endif -#ifndef ISP2401 -/* function __ia_css_virtual_isys_sp_isr_text: 5E45 */ -#else /* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_dequeue: 53A6 */ -#else /* function ia_css_queue_dequeue: 5585 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_configure_channel: 6DEE */ -#else /* function is_qos_standalone_mode: 6734 */ /* function ia_css_dmaproxy_sp_configure_channel: 703C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_thread_fiber_sp #define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_current_thread_fiber_sp 0x5A80 -#else #define HIVE_ADDR_current_thread_fiber_sp 0x5B2C -#endif #define HIVE_SIZE_current_thread_fiber_sp 4 #else #endif #endif #define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5A80 -#else #define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C -#endif #define HIVE_SIZE_sp_current_thread_fiber_sp 4 -#ifndef ISP2401 -/* function ia_css_circbuf_pop: 1674 */ -#else /* function ia_css_circbuf_pop: 15EA */ -#endif -#ifndef ISP2401 -/* function memset: 68F9 */ -#else /* function memset: 6AF7 */ -#endif /* function irq_raise_set_token: B6 */ @@ -2359,341 +1297,165 @@ #define HIVE_ADDR_sp_GPIO_BASE 0x3C #define HIVE_SIZE_sp_GPIO_BASE 4 -#ifndef ISP2401 -/* function pixelgen_prbs_stop: E6F */ -#else /* function pixelgen_prbs_stop: E69 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_acc_stage_enable: 1FC0 */ -#else /* function ia_css_pipeline_acc_stage_enable: 1F69 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_unlock_exp_id: 296A */ -#else /* function ia_css_tagger_sp_unlock_exp_id: 293B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_ph #define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_ph 0x7360 -#else #define HIVE_ADDR_isp_ph 0x740C -#endif #define HIVE_SIZE_isp_ph 28 #else #endif #endif #define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_ph 0x7360 -#else #define HIVE_ADDR_sp_isp_ph 0x740C -#endif #define HIVE_SIZE_sp_isp_ph 28 -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_ds: 40D6 */ -#else /* function ia_css_ispctrl_sp_init_ds: 4286 */ -#endif -#ifndef ISP2401 -/* function get_xmem_base_addr_raw: 4479 */ -#else /* function get_xmem_base_addr_raw: 4635 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param #define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_param 0x586C -#else #define HIVE_ADDR_sp_all_cbs_param 0x5908 -#endif #define HIVE_SIZE_sp_all_cbs_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_param 0x586C -#else #define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 -#endif #define HIVE_SIZE_sp_sp_all_cbs_param 16 -#ifndef ISP2401 -/* function pixelgen_tpg_config: F30 */ -#else /* function pixelgen_tpg_config: F2A */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_create: 16C2 */ -#else /* function ia_css_circbuf_create: 1638 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp_group #define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_sp_group 0x587C -#else #define HIVE_ADDR_sem_for_sp_group 0x5918 -#endif #define HIVE_SIZE_sem_for_sp_group 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_sp_group 0x587C -#else #define HIVE_ADDR_sp_sem_for_sp_group 0x5918 -#endif #define HIVE_SIZE_sp_sem_for_sp_group 20 -#ifndef ISP2401 -/* function csi_rx_frontend_run: C22 */ -#else /* function csi_rx_frontend_run: C1C */ /* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ -#endif -#ifndef ISP2401 -/* function ia_css_framebuf_sp_wait_for_in_frame: 64B7 */ -#else /* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_stream_open: 60E3 */ -#else /* function ia_css_isys_stream_open: 62A9 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_tag_frame: 5C71 */ -#else /* function ia_css_sp_rawcopy_tag_frame: 5E35 */ -#endif -#ifndef ISP2401 -/* function input_system_channel_configure: 125D */ -#else /* function input_system_channel_configure: 11D8 */ -#endif -#ifndef ISP2401 -/* function isp_hmem_clear: B33 */ -#else /* function isp_hmem_clear: B2D */ -#endif -#ifndef ISP2401 -/* function ia_css_framebuf_sp_release_in_frame: 64FA */ -#else /* function ia_css_framebuf_sp_release_in_frame: 66C0 */ -#endif -#ifndef ISP2401 -/* function stream2mmio_config: E1B */ -#else /* function stream2mmio_config: E15 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_start_binary: 3F55 */ -#else /* function ia_css_ispctrl_sp_start_binary: 40D8 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x698C -#else #define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#endif #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x698C -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#ifndef ISP2401 -/* function ia_css_eventq_sp_recv: 3DEB */ -#else /* function ia_css_eventq_sp_recv: 3F60 */ -#endif -#ifndef ISP2401 -/* function csi_rx_frontend_config: C7A */ -#else /* function csi_rx_frontend_config: C74 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_pool #define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_pool 0x370 -#else #define HIVE_ADDR_isp_pool 0x388 -#endif #define HIVE_SIZE_isp_pool 4 #else #endif #endif #define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_pool 0x370 -#else #define HIVE_ADDR_sp_isp_pool 0x388 -#endif #define HIVE_SIZE_sp_isp_pool 4 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_rel_gen: 61E9 */ -#else /* function ia_css_rmgr_sp_rel_gen: 63AF */ /* function ia_css_tagger_sp_unblock_clients: 31C3 */ -#endif -#ifndef ISP2401 -/* function css_get_frame_processing_time_end: 28E9 */ -#else /* function css_get_frame_processing_time_end: 28BA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_any_pending_mask #define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_event_any_pending_mask 0x388 -#else #define HIVE_ADDR_event_any_pending_mask 0x3A0 -#endif #define HIVE_SIZE_event_any_pending_mask 8 #else #endif #endif #define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_event_any_pending_mask 0x388 -#else #define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 -#endif #define HIVE_SIZE_sp_event_any_pending_mask 8 -#ifndef ISP2401 -/* function ia_css_pipeline_sp_get_pipe_io_status: 1AB8 */ -#else /* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ -#endif /* function sh_css_decode_tag_descr: 352 */ /* function debug_enqueue_isp: 27B */ -#ifndef ISP2401 -/* function qos_scheduler_update_stage_budget: 656E */ -#else /* function qos_scheduler_update_stage_budget: 673C */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_uninit: 5DFB */ -#else /* function ia_css_spctrl_sp_uninit: 5EDD */ -#endif -#ifndef ISP2401 -/* function csi_rx_backend_run: C68 */ -#else /* function csi_rx_backend_run: C62 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x69A0 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x69A0 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_lock_from_start: 341B */ -#else /* function ia_css_tagger_buf_sp_lock_from_start: 353E */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_isp_idle #define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_isp_idle 0x5890 -#else #define HIVE_ADDR_sem_for_isp_idle 0x592C -#endif #define HIVE_SIZE_sem_for_isp_idle 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_isp_idle 0x5890 -#else #define HIVE_ADDR_sp_sem_for_isp_idle 0x592C -#endif #define HIVE_SIZE_sp_sem_for_isp_idle 20 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_write_byte_addr: 3B0A */ -#else /* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init: 3A81 */ -#else /* function ia_css_dmaproxy_sp_init: 3BE1 */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 3686 */ -#else /* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_VAMEM_BASE @@ -2707,89 +1469,49 @@ #define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 #define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 -#ifndef ISP2401 -/* function input_system_channel_sync: 11A4 */ -#else /* function input_system_channel_sync: 6C10 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger #define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x732C -#else #define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 -#endif #define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 #else #endif #endif #define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x732C -#else #define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 -#endif #define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids #define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6A2C -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6A2C -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 -#ifndef ISP2401 -/* function ia_css_queue_item_load: 561A */ -#else /* function ia_css_queue_item_load: 57F9 */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_get_state: 5DE6 */ -#else /* function ia_css_spctrl_sp_get_state: 5EC8 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_callout_sp_thread #define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_callout_sp_thread 0x5A74 -#else #define HIVE_ADDR_callout_sp_thread 0x278 -#endif #define HIVE_SIZE_callout_sp_thread 4 #else #endif #endif #define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_callout_sp_thread 0x5A74 -#else #define HIVE_ADDR_sp_callout_sp_thread 0x278 -#endif #define HIVE_SIZE_sp_callout_sp_thread 4 -#ifndef ISP2401 -/* function thread_fiber_sp_init: 14CB */ -#else /* function thread_fiber_sp_init: 1441 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_SP_PMEM_BASE @@ -2806,126 +1528,50 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_input_stream_format #define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_input_stream_format 0x3E2C -#else #define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 -#endif #define HIVE_SIZE_sp_isp_input_stream_format 20 #else #endif #endif #define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E2C -#else #define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 -#endif #define HIVE_SIZE_sp_sp_isp_input_stream_format 20 -#ifndef ISP2401 -/* function __mod: 6866 */ -#else /* function __mod: 6A64 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3B6B */ -#else /* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_join: 139B */ -#else /* function ia_css_thread_sp_join: 1311 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_add_command: 6EF1 */ -#else /* function ia_css_dmaproxy_sp_add_command: 712E */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_metadata_thread_func: 5DDF */ -#else /* function ia_css_sp_metadata_thread_func: 5EC1 */ -#endif -#ifndef ISP2401 -/* function __sp_event_proxy_func_critical: 6934 */ -#else /* function __sp_event_proxy_func_critical: 6B32 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 5F53 */ -#else /* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_metadata_wait: 5DD8 */ -#else /* function ia_css_sp_metadata_wait: 5EBA */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_peek_from_start: 15A4 */ -#else /* function ia_css_circbuf_peek_from_start: 151A */ -#endif -#ifndef ISP2401 -/* function ia_css_event_sp_encode: 3E76 */ -#else /* function ia_css_event_sp_encode: 3FEB */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_run: 140E */ -#else /* function ia_css_thread_sp_run: 1384 */ -#endif -#ifndef ISP2401 -/* function sp_isys_copy_func: 618 */ -#else /* function sp_isys_copy_func: 5AC */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_isp_param_init_isp_memories: 50A3 */ -#else /* function ia_css_sp_isp_param_init_isp_memories: 52AC */ -#endif -#ifndef ISP2401 -/* function register_isr: 921 */ -#else /* function register_isr: 8B5 */ -#endif /* function irq_raise: C8 */ -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_mmu_invalidate: 3A48 */ -#else /* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ -#endif -#ifndef ISP2401 -/* function csi_rx_backend_disable: C34 */ -#else /* function csi_rx_backend_disable: C2E */ -#endif -#ifndef ISP2401 -/* function pipeline_sp_initialize_stage: 2104 */ -#else /* function pipeline_sp_initialize_stage: 20BF */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES @@ -2939,54 +1585,26 @@ #define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 #define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6DC0 */ -#else /* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_done_ds: 40BD */ -#else /* function ia_css_ispctrl_sp_done_ds: 426D */ -#endif -#ifndef ISP2401 -/* function csi_rx_backend_config: C8B */ -#else /* function csi_rx_backend_config: C85 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_isp_param_get_mem_inits: 507E */ -#else /* function ia_css_sp_isp_param_get_mem_inits: 5287 */ -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_init_buffer_queues: 1A85 */ -#else /* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_pfp_spref #define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_pfp_spref 0x378 -#else #define HIVE_ADDR_vbuf_pfp_spref 0x390 -#endif #define HIVE_SIZE_vbuf_pfp_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x378 -#else #define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 -#endif #define HIVE_SIZE_sp_vbuf_pfp_spref 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -3004,438 +1622,214 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames #define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6A74 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6A74 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 -#ifndef ISP2401 -/* function qos_scheduler_init_stage_budget: 65A7 */ -#else /* function qos_scheduler_init_stage_budget: 679A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_buffer_queue_handle #define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6B8C -#else #define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 -#endif #define HIVE_SIZE_sp2host_buffer_queue_handle 96 #else #endif #endif #define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6B8C -#else #define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 -#endif #define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_isp_vars: 4D9D */ -#else /* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_stream_start: 6010 */ -#else /* function ia_css_isys_stream_start: 6187 */ -#endif -#ifndef ISP2401 -/* function sp_warning: 954 */ -#else /* function sp_warning: 8E8 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_vbuf_enqueue: 62DC */ -#else /* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_tag_exp_id: 2A84 */ -#else /* function ia_css_tagger_sp_tag_exp_id: 2A55 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_sfi_release_current_frame: 276B */ -#else /* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_write: 3B21 */ -#else /* function ia_css_dmaproxy_sp_write: 3C81 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_stream_start_async: 608A */ -#else /* function ia_css_isys_stream_start_async: 6250 */ -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_release_in_param: 1905 */ -#else /* function ia_css_parambuf_sp_release_in_param: 187B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_irq_sw_interrupt_token #define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_irq_sw_interrupt_token 0x3E28 -#else #define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C -#endif #define HIVE_SIZE_irq_sw_interrupt_token 4 #else #endif #endif #define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E28 -#else #define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C -#endif #define HIVE_SIZE_sp_irq_sw_interrupt_token 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_addresses #define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_addresses 0x6FDC -#else #define HIVE_ADDR_sp_isp_addresses 0x708C -#endif #define HIVE_SIZE_sp_isp_addresses 172 #else #endif #endif #define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_isp_addresses 0x6FDC -#else #define HIVE_ADDR_sp_sp_isp_addresses 0x708C -#endif #define HIVE_SIZE_sp_sp_isp_addresses 172 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_acq_gen: 6201 */ -#else /* function ia_css_rmgr_sp_acq_gen: 63C7 */ -#endif -#ifndef ISP2401 -/* function input_system_input_port_open: 10ED */ -#else /* function input_system_input_port_open: 10E7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isps #define HIVE_MEM_isps scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isps 0x737C -#else #define HIVE_ADDR_isps 0x7428 -#endif #define HIVE_SIZE_isps 28 #else #endif #endif #define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isps 0x737C -#else #define HIVE_ADDR_sp_isps 0x7428 -#endif #define HIVE_SIZE_sp_isps 28 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_queues_initialized #define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host_sp_queues_initialized 0x3E40 -#else #define HIVE_ADDR_host_sp_queues_initialized 0x3E64 -#endif #define HIVE_SIZE_host_sp_queues_initialized 4 #else #endif #endif #define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E40 -#else #define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 -#endif #define HIVE_SIZE_sp_host_sp_queues_initialized 4 -#ifndef ISP2401 -/* function ia_css_queue_uninit: 54E6 */ -#else /* function ia_css_queue_uninit: 56C5 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started #define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6C94 -#else #define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 -#endif #define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6C94 -#else #define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 -#endif #define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 -#ifndef ISP2401 -/* function ia_css_bufq_sp_release_dynamic_buf: 36F2 */ -#else /* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_height_exception: 3C19 */ -#else /* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3B9E */ -#else /* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ -#endif -#ifndef ISP2401 -/* function csi_rx_backend_stop: C57 */ -#else /* function csi_rx_backend_stop: C51 */ -#endif -#ifndef ISP2401 -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_num_ready_threads -#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_num_ready_threads 0x5A7C -#define HIVE_SIZE_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_num_ready_threads 0x5A7C -#define HIVE_SIZE_sp_num_ready_threads 4 - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3AF3 */ -#else /* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_spref #define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_spref 0x374 -#else #define HIVE_ADDR_vbuf_spref 0x38C -#endif #define HIVE_SIZE_vbuf_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_spref 0x374 -#else #define HIVE_ADDR_sp_vbuf_spref 0x38C -#endif #define HIVE_SIZE_sp_vbuf_spref 4 -#ifndef ISP2401 -/* function ia_css_queue_enqueue: 5430 */ -#else /* function ia_css_queue_enqueue: 560F */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_request #define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_request 0x5B30 -#else #define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC -#endif #define HIVE_SIZE_ia_css_flash_sp_request 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5B30 -#else #define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_request 4 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_vmem_write: 3AC4 */ -#else /* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tagger_frames #define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_tagger_frames 0x5A84 -#else #define HIVE_ADDR_tagger_frames 0x5B30 -#endif #define HIVE_SIZE_tagger_frames 168 #else #endif #endif #define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_tagger_frames 0x5A84 -#else #define HIVE_ADDR_sp_tagger_frames 0x5B30 -#endif #define HIVE_SIZE_sp_tagger_frames 168 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_if #define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_reading_if 0x58A4 -#else #define HIVE_ADDR_sem_for_reading_if 0x5940 -#endif #define HIVE_SIZE_sem_for_reading_if 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_reading_if 0x58A4 -#else #define HIVE_ADDR_sp_sem_for_reading_if 0x5940 -#endif #define HIVE_SIZE_sp_sem_for_reading_if 20 -#ifndef ISP2401 -/* function sp_generate_interrupts: 9D3 */ -#else /* function sp_generate_interrupts: 967 */ /* function ia_css_pipeline_sp_start: 1FC2 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_start: 2007 */ -#else /* function ia_css_thread_default_callout: 6C8F */ -#endif -#ifndef ISP2401 -/* function csi_rx_backend_enable: C45 */ -#else /* function csi_rx_backend_enable: C3F */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_init: 5953 */ -#else /* function ia_css_sp_rawcopy_init: 5B32 */ -#endif -#ifndef ISP2401 -/* function input_system_input_port_configure: 113F */ -#else /* function input_system_input_port_configure: 1139 */ -#endif -#ifndef ISP2401 -/* function tmr_clock_read: 16EF */ -#else /* function tmr_clock_read: 1665 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_BAMEM_BASE #define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ISP_BAMEM_BASE 0x380 -#else #define HIVE_ADDR_ISP_BAMEM_BASE 0x398 -#endif #define HIVE_SIZE_ISP_BAMEM_BASE 4 #else #endif #endif #define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x380 -#else #define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 -#endif #define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6BEC -#else #define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#endif #define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6BEC -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#ifndef ISP2401 -/* function isys2401_dma_config_legacy: DE0 */ -#else /* function isys2401_dma_config_legacy: DDA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ibuf_ctrl_master_ports @@ -3449,93 +1843,45 @@ #define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 #define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 -#ifndef ISP2401 -/* function css_get_frame_processing_time_start: 28F1 */ -#else /* function css_get_frame_processing_time_start: 28C2 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame #define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_frame 0x58B8 -#else #define HIVE_ADDR_sp_all_cbs_frame 0x5954 -#endif #define HIVE_SIZE_sp_all_cbs_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x58B8 -#else #define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 -#endif #define HIVE_SIZE_sp_sp_all_cbs_frame 16 -#ifndef ISP2401 -/* function ia_css_virtual_isys_sp_isr: 6F07 */ -#else /* function ia_css_virtual_isys_sp_isr: 716E */ -#endif -#ifndef ISP2401 -/* function thread_sp_queue_print: 142B */ -#else /* function thread_sp_queue_print: 13A1 */ -#endif -#ifndef ISP2401 -/* function sp_notify_eof: 97F */ -#else /* function sp_notify_eof: 913 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_str2mem #define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_str2mem 0x58C8 -#else #define HIVE_ADDR_sem_for_str2mem 0x5964 -#endif #define HIVE_SIZE_sem_for_str2mem 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_str2mem 0x58C8 -#else #define HIVE_ADDR_sp_sem_for_str2mem 0x5964 -#endif #define HIVE_SIZE_sp_sem_for_str2mem 20 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_is_marked_from_start: 3483 */ -#else /* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_acquire_dynamic_buf: 38AA */ -#else /* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 28BF */ -#else /* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_destroy: 16B9 */ -#else /* function ia_css_circbuf_destroy: 162F */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_PMEM_BASE @@ -3549,81 +1895,41 @@ #define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC #define HIVE_SIZE_sp_ISP_PMEM_BASE 4 -#ifndef ISP2401 -/* function ia_css_sp_isp_param_mem_load: 5011 */ -#else /* function ia_css_sp_isp_param_mem_load: 521A */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_pop_from_start: 326F */ -#else /* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ -#endif -#ifndef ISP2401 -/* function __div: 681E */ -#else /* function __div: 6A1C */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_release_vbuf: 62FB */ -#else /* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_use #define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5B34 -#else #define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 -#endif #define HIVE_SIZE_ia_css_flash_sp_in_use 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5B34 -#else #define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 -#ifndef ISP2401 -/* function ia_css_thread_sem_sp_wait: 6AE4 */ -#else /* function ia_css_thread_sem_sp_wait: 6D63 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sleep_mode #define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sleep_mode 0x3E44 -#else #define HIVE_ADDR_sp_sleep_mode 0x3E68 -#endif #define HIVE_SIZE_sp_sleep_mode 4 #else #endif #endif #define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_sleep_mode 0x3E44 -#else #define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 -#endif #define HIVE_SIZE_sp_sp_sleep_mode 4 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_push: 337E */ -#else /* function ia_css_tagger_buf_sp_push: 34A1 */ -#endif /* function mmu_invalidate_cache: D3 */ @@ -3639,47 +1945,21 @@ #define HIVE_ADDR_sp_sp_max_cb_elems 0x148 #define HIVE_SIZE_sp_sp_max_cb_elems 8 -#ifndef ISP2401 -/* function ia_css_queue_remote_init: 5508 */ -#else /* function ia_css_queue_remote_init: 56E7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stop_req #define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_stop_req 0x575C -#else #define HIVE_ADDR_isp_stop_req 0x57F8 -#endif #define HIVE_SIZE_isp_stop_req 4 #else #endif #endif #define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_stop_req 0x575C -#else #define HIVE_ADDR_sp_isp_stop_req 0x57F8 -#endif #define HIVE_SIZE_sp_isp_stop_req 4 -#ifndef ISP2401 -/* function ia_css_pipeline_sp_sfi_request_next_frame: 2781 */ -#else /* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ -#endif -#ifndef ISP2401 -#define HIVE_ICACHE_sp_critical_SEGMENT_START 0 -#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 -#endif #endif /* _sp_map_h_ */ -#ifndef ISP2401 -extern void sh_css_dump_sp_dmem(void); -void sh_css_dump_sp_dmem(void) -{ -} -#endif -- GitLab From f0648058c59ac23792561d1036f563518557e00a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 14:21:15 +0200 Subject: [PATCH 445/503] media: atomisp: cleanup contents of css_2401_system Everything there is for ISP2401 only. So, we can trivially solve all ifdefs at once. Signed-off-by: Mauro Carvalho Chehab --- .../ia_css_isp_configs.c | 2 - .../ia_css_isp_params.c | 150 -- .../atomisp/pci/css_2401_system/spmem_dump.c | 1714 ----------------- 3 files changed, 1866 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c index 9fae24b3e689f..cd37e7e3d7796 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c @@ -273,7 +273,6 @@ ia_css_configure_output( } /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#ifdef ISP2401 void ia_css_configure_sc( @@ -302,7 +301,6 @@ ia_css_configure_sc( } /* Code generated by genparam/genconfig.c:gen_configure_function() */ -#endif void ia_css_configure_raw( diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c index 2df57c4864b72..68297296885e8 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c +++ b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c @@ -1720,7 +1720,6 @@ ia_css_process_xnr3( "ia_css_process_xnr3() leave:\n"); } } -#ifdef ISP2401 { unsigned int size = stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; @@ -1744,7 +1743,6 @@ ia_css_process_xnr3( "ia_css_process_xnr3() leave:\n"); } } -#endif } /* Code generated by genparam/gencode.c:gen_param_process_table() */ @@ -1836,10 +1834,6 @@ ia_css_set_dp_config(struct ia_css_isp_parameters *params, ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->dp_config = *config; params->config_changed[IA_CSS_DP_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_DP_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_dp_config() leave: return_void\n"); } @@ -1879,10 +1873,6 @@ ia_css_set_wb_config(struct ia_css_isp_parameters *params, ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->wb_config = *config; params->config_changed[IA_CSS_WB_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_WB_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_wb_config() leave: return_void\n"); } @@ -1922,10 +1912,6 @@ ia_css_set_tnr_config(struct ia_css_isp_parameters *params, ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->tnr_config = *config; params->config_changed[IA_CSS_TNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_TNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_tnr_config() leave: return_void\n"); } @@ -1965,10 +1951,6 @@ ia_css_set_ob_config(struct ia_css_isp_parameters *params, ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ob_config = *config; params->config_changed[IA_CSS_OB_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_OB_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ob_config() leave: return_void\n"); } @@ -2008,10 +1990,6 @@ ia_css_set_de_config(struct ia_css_isp_parameters *params, ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->de_config = *config; params->config_changed[IA_CSS_DE_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_DE_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_de_config() leave: return_void\n"); } @@ -2051,10 +2029,6 @@ ia_css_set_anr_config(struct ia_css_isp_parameters *params, ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_config = *config; params->config_changed[IA_CSS_ANR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_ANR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr_config() leave: return_void\n"); } @@ -2094,10 +2068,6 @@ ia_css_set_anr2_config(struct ia_css_isp_parameters *params, ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->anr_thres = *config; params->config_changed[IA_CSS_ANR2_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_ANR2_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_anr2_config() leave: return_void\n"); } @@ -2137,10 +2107,6 @@ ia_css_set_ce_config(struct ia_css_isp_parameters *params, ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ce_config = *config; params->config_changed[IA_CSS_CE_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CE_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ce_config() leave: return_void\n"); } @@ -2180,10 +2146,6 @@ ia_css_set_ecd_config(struct ia_css_isp_parameters *params, ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ecd_config = *config; params->config_changed[IA_CSS_ECD_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_ECD_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ecd_config() leave: return_void\n"); } @@ -2223,10 +2185,6 @@ ia_css_set_ynr_config(struct ia_css_isp_parameters *params, ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ynr_config = *config; params->config_changed[IA_CSS_YNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_YNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ynr_config() leave: return_void\n"); } @@ -2266,10 +2224,6 @@ ia_css_set_fc_config(struct ia_css_isp_parameters *params, ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->fc_config = *config; params->config_changed[IA_CSS_FC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_FC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_fc_config() leave: return_void\n"); } @@ -2309,10 +2263,6 @@ ia_css_set_cnr_config(struct ia_css_isp_parameters *params, ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cnr_config = *config; params->config_changed[IA_CSS_CNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_cnr_config() leave: return_void\n"); } @@ -2352,10 +2302,6 @@ ia_css_set_macc_config(struct ia_css_isp_parameters *params, ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->macc_config = *config; params->config_changed[IA_CSS_MACC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_MACC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_macc_config() leave: return_void\n"); } @@ -2395,10 +2341,6 @@ ia_css_set_ctc_config(struct ia_css_isp_parameters *params, ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->ctc_config = *config; params->config_changed[IA_CSS_CTC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CTC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_ctc_config() leave: return_void\n"); } @@ -2436,10 +2378,6 @@ ia_css_set_aa_config(struct ia_css_isp_parameters *params, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); params->aa_config = *config; params->config_changed[IA_CSS_AA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_AA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_aa_config() leave: return_void\n"); } @@ -2479,10 +2417,6 @@ ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->yuv2rgb_cc_config = *config; params->config_changed[IA_CSS_YUV2RGB_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_yuv2rgb_config() leave: return_void\n"); } @@ -2522,10 +2456,6 @@ ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->rgb2yuv_cc_config = *config; params->config_changed[IA_CSS_RGB2YUV_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_rgb2yuv_config() leave: return_void\n"); } @@ -2565,10 +2495,6 @@ ia_css_set_csc_config(struct ia_css_isp_parameters *params, ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->cc_config = *config; params->config_changed[IA_CSS_CSC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_CSC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_csc_config() leave: return_void\n"); } @@ -2609,10 +2535,6 @@ ia_css_set_nr_config(struct ia_css_isp_parameters *params, params->nr_config = *config; params->config_changed[IA_CSS_BNR_ID] = true; params->config_changed[IA_CSS_NR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_NR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_nr_config() leave: return_void\n"); } @@ -2652,10 +2574,6 @@ ia_css_set_gc_config(struct ia_css_isp_parameters *params, ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->gc_config = *config; params->config_changed[IA_CSS_GC_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_GC_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_gc_config() leave: return_void\n"); } @@ -2699,10 +2617,6 @@ ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horicoef_config() leave: return_void\n"); } @@ -2746,10 +2660,6 @@ ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); } @@ -2793,10 +2703,6 @@ ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_horiproj_config() leave: return_void\n"); } @@ -2840,10 +2746,6 @@ ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis_vertproj_config() leave: return_void\n"); } @@ -2887,10 +2789,6 @@ ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); } @@ -2934,10 +2832,6 @@ ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); } @@ -2981,10 +2875,6 @@ ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); } @@ -3028,10 +2918,6 @@ ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); } @@ -3071,10 +2957,6 @@ ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->r_gamma_table = *config; params->config_changed[IA_CSS_R_GAMMA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_r_gamma_config() leave: return_void\n"); } @@ -3114,10 +2996,6 @@ ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->g_gamma_table = *config; params->config_changed[IA_CSS_G_GAMMA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_g_gamma_config() leave: return_void\n"); } @@ -3157,10 +3035,6 @@ ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->b_gamma_table = *config; params->config_changed[IA_CSS_B_GAMMA_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_b_gamma_config() leave: return_void\n"); } @@ -3201,10 +3075,6 @@ ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_table = *config; params->config_changed[IA_CSS_XNR_TABLE_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_table_config() leave: return_void\n"); } @@ -3244,10 +3114,6 @@ ia_css_set_formats_config(struct ia_css_isp_parameters *params, ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->formats_config = *config; params->config_changed[IA_CSS_FORMATS_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_FORMATS_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_formats_config() leave: return_void\n"); } @@ -3287,10 +3153,6 @@ ia_css_set_xnr_config(struct ia_css_isp_parameters *params, ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr_config = *config; params->config_changed[IA_CSS_XNR_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_XNR_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr_config() leave: return_void\n"); } @@ -3330,10 +3192,6 @@ ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->xnr3_config = *config; params->config_changed[IA_CSS_XNR3_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_XNR3_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_xnr3_config() leave: return_void\n"); } @@ -3374,10 +3232,6 @@ ia_css_set_s3a_config(struct ia_css_isp_parameters *params, params->s3a_config = *config; params->config_changed[IA_CSS_BH_ID] = true; params->config_changed[IA_CSS_S3A_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_S3A_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_s3a_config() leave: return_void\n"); } @@ -3417,10 +3271,6 @@ ia_css_set_output_config(struct ia_css_isp_parameters *params, ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); params->output_config = *config; params->config_changed[IA_CSS_OUTPUT_ID] = true; -#ifndef ISP2401 - params->config_changed[IA_CSS_OUTPUT_ID] = true; - -#endif ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_set_output_config() leave: return_void\n"); } diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c index 4c44b89e47e95..9d049399d0a9f 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c @@ -21,17 +21,9 @@ #define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) -#ifndef ISP2401 -/* function input_system_acquisition_stop: ADE */ -#else /* function input_system_acquisition_stop: AD8 */ -#endif -#ifndef ISP2401 -/* function longjmp: 684E */ -#else /* function longjmp: 69C1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_HIVE_IF_SRST_MASK @@ -45,206 +37,106 @@ #define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 #define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 -#ifndef ISP2401 -/* function tmpmem_init_dmem: 6599 */ -#else /* function tmpmem_init_dmem: 66D4 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_receive_ack: 5EDD */ -#else /* function ia_css_isys_sp_token_map_receive_ack: 6018 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_addr_B: 3345 */ -#else /* function ia_css_dmaproxy_sp_set_addr_B: 3539 */ /* function ia_css_pipe_data_init_tagger_resources: A4F */ -#endif /* function debug_buffer_set_ddr_addr: DD */ -#ifndef ISP2401 -/* function receiver_port_reg_load: AC2 */ -#else /* function receiver_port_reg_load: ABC */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_mipi #define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_mipi 0x631C -#else #define HIVE_ADDR_vbuf_mipi 0x6378 -#endif #define HIVE_SIZE_vbuf_mipi 12 #else #endif #endif #define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_mipi 0x631C -#else #define HIVE_ADDR_sp_vbuf_mipi 0x6378 -#endif #define HIVE_SIZE_sp_vbuf_mipi 12 -#ifndef ISP2401 -/* function ia_css_event_sp_decode: 3536 */ -#else /* function ia_css_event_sp_decode: 372A */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_get_size: 48BE */ -#else /* function ia_css_queue_get_size: 4B46 */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_load: 4EFF */ -#else /* function ia_css_queue_load: 515D */ -#endif -#ifndef ISP2401 -/* function setjmp: 6857 */ -#else /* function setjmp: 69CA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue #define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x4684 -#else #define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x46CC -#endif #define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x4684 -#else #define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x46CC -#endif #define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_wait_for_ack: 6E07 */ -#else /* function ia_css_dmaproxy_sp_wait_for_ack: 6F4B */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_func: 5124 */ -#else /* function ia_css_sp_rawcopy_func: 5382 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_pop_marked: 2A10 */ -#else /* function ia_css_tagger_buf_sp_pop_marked: 2BB2 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stage #define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_stage 0x5C00 -#else #define HIVE_ADDR_isp_stage 0x5C60 -#endif #define HIVE_SIZE_isp_stage 832 #else #endif #endif #define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_stage 0x5C00 -#else #define HIVE_ADDR_sp_isp_stage 0x5C60 -#endif #define HIVE_SIZE_sp_isp_stage 832 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_raw #define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_raw 0x2F4 -#else #define HIVE_ADDR_vbuf_raw 0x30C -#endif #define HIVE_SIZE_vbuf_raw 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_raw 0x2F4 -#else #define HIVE_ADDR_sp_vbuf_raw 0x30C -#endif #define HIVE_SIZE_sp_vbuf_raw 4 -#ifndef ISP2401 -/* function ia_css_sp_bin_copy_func: 504B */ -#else /* function ia_css_sp_bin_copy_func: 52A9 */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_item_store: 4C4D */ -#else /* function ia_css_queue_item_store: 4EAB */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 /* function sp_start_isp: 45D */ @@ -252,202 +144,96 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_binary_group #define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_binary_group 0x5FF0 -#else #define HIVE_ADDR_sp_binary_group 0x6050 -#endif #define HIVE_SIZE_sp_binary_group 32 #else #endif #endif #define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_binary_group 0x5FF0 -#else #define HIVE_ADDR_sp_sp_binary_group 0x6050 -#endif #define HIVE_SIZE_sp_sp_binary_group 32 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sw_state #define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sw_state 0x62AC -#else #define HIVE_ADDR_sp_sw_state 0x6308 -#endif #define HIVE_SIZE_sp_sw_state 4 #else #endif #endif #define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_sw_state 0x62AC -#else #define HIVE_ADDR_sp_sp_sw_state 0x6308 -#endif #define HIVE_SIZE_sp_sp_sw_state 4 -#ifndef ISP2401 -/* function ia_css_thread_sp_main: D5B */ -#else /* function ia_css_thread_sp_main: D50 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_internal_buffers: 373C */ -#else /* function ia_css_ispctrl_sp_init_internal_buffers: 396B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_psys_event_queue_handle #define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4B54 -#else #define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4BB0 -#endif #define HIVE_SIZE_sp2host_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4B54 -#else #define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4BB0 -#endif #define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue #define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x4698 -#else #define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x46E0 -#endif #define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x4698 -#else #define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x46E0 -#endif #define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 -#ifndef ISP2401 -/* function ia_css_tagger_sp_propagate_frame: 2429 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_stop_copy_preview -#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_stop_copy_preview 0x6290 -#define HIVE_SIZE_sp_stop_copy_preview 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_stop_copy_preview 0x6290 -#define HIVE_SIZE_sp_sp_stop_copy_preview 4 -#else /* function ia_css_tagger_sp_propagate_frame: 2479 */ -#endif -#ifndef ISP2401 -/* function input_system_reg_load: B17 */ -#else /* function input_system_reg_load: B11 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_handles #define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_handles 0x6328 -#else #define HIVE_ADDR_vbuf_handles 0x6384 -#endif #define HIVE_SIZE_vbuf_handles 960 #else #endif #endif #define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_handles 0x6328 -#else #define HIVE_ADDR_sp_vbuf_handles 0x6384 -#endif #define HIVE_SIZE_sp_vbuf_handles 960 -#ifndef ISP2401 -/* function ia_css_queue_store: 4DB3 */ - -/* function ia_css_sp_flash_register: 2C45 */ -#else /* function ia_css_queue_store: 5011 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_dummy_function: 566B */ -#else /* function ia_css_sp_flash_register: 2DE7 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_create: 5B50 */ -#else /* function ia_css_isys_sp_backend_create: 5C8B */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_init: 184C */ -#else /* function ia_css_pipeline_sp_init: 1886 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_configure: 2319 */ -#else /* function ia_css_tagger_sp_configure: 2369 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_end_binary: 357F */ -#else /* function ia_css_ispctrl_sp_end_binary: 3773 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#else #define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC -#endif #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#ifndef ISP2401 -/* function receiver_port_reg_store: AC9 */ -#else /* function receiver_port_reg_store: AC3 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_is_pending_mask @@ -464,364 +250,182 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_frame #define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cb_elems_frame 0x46AC -#else #define HIVE_ADDR_sp_all_cb_elems_frame 0x46F4 -#endif #define HIVE_SIZE_sp_all_cb_elems_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46AC -#else #define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46F4 -#endif #define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_isys_event_queue_handle #define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4B74 -#else #define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4BD0 -#endif #define HIVE_SIZE_sp2host_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4B74 -#else #define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4BD0 -#endif #define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_com #define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host_sp_com 0x4114 -#else #define HIVE_ADDR_host_sp_com 0x4134 -#endif #define HIVE_SIZE_host_sp_com 220 #else #endif #endif #define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host_sp_com 0x4114 -#else #define HIVE_ADDR_sp_host_sp_com 0x4134 -#endif #define HIVE_SIZE_sp_host_sp_com 220 -#ifndef ISP2401 -/* function ia_css_queue_get_free_space: 4A12 */ -#else /* function ia_css_queue_get_free_space: 4C70 */ -#endif -#ifndef ISP2401 -/* function exec_image_pipe: 6C4 */ -#else /* function exec_image_pipe: 658 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_init_dmem_data #define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_init_dmem_data 0x62B0 -#else #define HIVE_ADDR_sp_init_dmem_data 0x630C -#endif #define HIVE_SIZE_sp_init_dmem_data 24 #else #endif #endif #define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_init_dmem_data 0x62B0 -#else #define HIVE_ADDR_sp_sp_init_dmem_data 0x630C -#endif #define HIVE_SIZE_sp_sp_init_dmem_data 24 -#ifndef ISP2401 -/* function ia_css_sp_metadata_start: 592D */ -#else /* function ia_css_sp_metadata_start: 5A68 */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_init_buffer_queues: 2CB4 */ -#else /* function ia_css_bufq_sp_init_buffer_queues: 2E56 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_stop: 182F */ -#else /* function ia_css_pipeline_sp_stop: 1869 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_connect_pipes: 2803 */ -#else /* function ia_css_tagger_sp_connect_pipes: 2853 */ -#endif -#ifndef ISP2401 -/* function sp_isys_copy_wait: 70D */ -#else /* function sp_isys_copy_wait: 6A1 */ -#endif /* function is_isp_debug_buffer_full: 337 */ -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 32C8 */ -#else /* function ia_css_dmaproxy_sp_configure_channel_from_info: 34A9 */ -#endif -#ifndef ISP2401 -/* function encode_and_post_timer_event: A30 */ -#else /* function encode_and_post_timer_event: 9C4 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_per_frame_data #define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_per_frame_data 0x41F0 -#else #define HIVE_ADDR_sp_per_frame_data 0x4210 -#endif #define HIVE_SIZE_sp_per_frame_data 4 #else #endif #endif #define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_per_frame_data 0x41F0 -#else #define HIVE_ADDR_sp_sp_per_frame_data 0x4210 -#endif #define HIVE_SIZE_sp_sp_per_frame_data 4 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_vbuf_dequeue: 62ED */ -#else /* function ia_css_rmgr_sp_vbuf_dequeue: 6428 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_psys_event_queue_handle #define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4B80 -#else #define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4BDC -#endif #define HIVE_SIZE_host2sp_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4B80 -#else #define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4BDC -#endif #define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_xmem_bin_addr #define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_xmem_bin_addr 0x41F4 -#else #define HIVE_ADDR_xmem_bin_addr 0x4214 -#endif #define HIVE_SIZE_xmem_bin_addr 4 #else #endif #endif #define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_xmem_bin_addr 0x41F4 -#else #define HIVE_ADDR_sp_xmem_bin_addr 0x4214 -#endif #define HIVE_SIZE_sp_xmem_bin_addr 4 -#ifndef ISP2401 -/* function tmr_clock_init: 13FB */ -#else /* function tmr_clock_init: 141C */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_run: 141C */ -#else /* function ia_css_pipeline_sp_run: 143D */ -#endif -#ifndef ISP2401 -/* function memcpy: 68F7 */ -#else /* function memcpy: 6A6A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GP_DEVICE_BASE #define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_GP_DEVICE_BASE 0x2FC -#else #define HIVE_ADDR_GP_DEVICE_BASE 0x314 -#endif #define HIVE_SIZE_GP_DEVICE_BASE 4 #else #endif #endif #define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x2FC -#else #define HIVE_ADDR_sp_GP_DEVICE_BASE 0x314 -#endif #define HIVE_SIZE_sp_GP_DEVICE_BASE 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_ready_queue #define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E0 -#else #define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E4 -#endif #define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E0 -#else #define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E4 -#endif #define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 -#ifndef ISP2401 -/* function input_system_reg_store: B1E */ -#else /* function input_system_reg_store: B18 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_frontend_start: 5D66 */ -#else /* function ia_css_isys_sp_frontend_start: 5EA1 */ -#endif -#ifndef ISP2401 -/* function ia_css_uds_sp_scale_params: 6600 */ -#else /* function ia_css_uds_sp_scale_params: 6773 */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_increase_size: E40 */ -#else /* function ia_css_circbuf_increase_size: E35 */ -#endif -#ifndef ISP2401 -/* function __divu: 6875 */ -#else /* function __divu: 69E8 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_get_state: C83 */ -#else /* function ia_css_thread_sp_get_state: C78 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_stop #define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_cont_capt_stop 0x46BC -#else #define HIVE_ADDR_sem_for_cont_capt_stop 0x4704 -#endif #define HIVE_SIZE_sem_for_cont_capt_stop 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x46BC -#else #define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x4704 -#endif #define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 -#ifndef ISP2401 -/* function thread_fiber_sp_main: E39 */ -#else /* function thread_fiber_sp_main: E2E */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_pipe_thread #define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_pipe_thread 0x4800 -#define HIVE_SIZE_sp_isp_pipe_thread 340 -#else #define HIVE_ADDR_sp_isp_pipe_thread 0x4848 #define HIVE_SIZE_sp_isp_pipe_thread 360 -#endif #else #endif #endif #define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4800 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 340 -#else #define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4848 #define HIVE_SIZE_sp_sp_isp_pipe_thread 360 -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_handle_parameter_sets: 128A */ -#else /* function ia_css_parambuf_sp_handle_parameter_sets: 127F */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_set_state: 595C */ -#else /* function ia_css_spctrl_sp_set_state: 5A97 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sem_sp_signal: 6AF7 */ -#else /* function ia_css_thread_sem_sp_signal: 6C6C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_IRQ_BASE @@ -847,65 +451,26 @@ #define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 #define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 -#ifndef ISP2401 -/* function ia_css_isys_sp_isr: 6FDC */ - -/* function ia_css_isys_sp_generate_exp_id: 60FE */ -#else /* function ia_css_isys_sp_isr: 7139 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_init: 61E8 */ -#else /* function ia_css_isys_sp_generate_exp_id: 6239 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sem_sp_init: 6BC8 */ -#else /* function ia_css_rmgr_sp_init: 6323 */ -#endif -#ifndef ISP2401 -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x308 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x308 -#define HIVE_SIZE_sp_is_isp_requested 4 -#else /* function ia_css_thread_sem_sp_init: 6D3B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_frame #define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_reading_cb_frame 0x46D0 -#else #define HIVE_ADDR_sem_for_reading_cb_frame 0x4718 -#endif #define HIVE_SIZE_sem_for_reading_cb_frame 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x46D0 -#else #define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x4718 -#endif #define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_execute: 3230 */ -#else #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_is_isp_requested #define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem @@ -919,31 +484,14 @@ #define HIVE_SIZE_sp_is_isp_requested 4 /* function ia_css_dmaproxy_sp_execute: 340F */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_is_empty: 48F9 */ -#else /* function ia_css_queue_is_empty: 7098 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_has_stopped: 1825 */ -#else /* function ia_css_pipeline_sp_has_stopped: 185F */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_extract: F44 */ -#else /* function ia_css_circbuf_extract: F39 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_is_locked_from_start: 2B26 */ -#else /* function ia_css_tagger_buf_sp_is_locked_from_start: 2CC8 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_sp_thread @@ -957,29 +505,13 @@ #define HIVE_ADDR_sp_current_sp_thread 0x1DC #define HIVE_SIZE_sp_current_sp_thread 4 -#ifndef ISP2401 -/* function ia_css_spctrl_sp_get_spid: 5963 */ -#else /* function ia_css_spctrl_sp_get_spid: 5A9E */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_reset_buffers: 2D3B */ -#else /* function ia_css_bufq_sp_reset_buffers: 2EDD */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_read_byte_addr: 6E35 */ -#else /* function ia_css_dmaproxy_sp_read_byte_addr: 6F79 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_uninit: 61E1 */ -#else /* function ia_css_rmgr_sp_uninit: 631C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_stack @@ -993,258 +525,138 @@ #define HIVE_ADDR_sp_sp_threads_stack 0x164 #define HIVE_SIZE_sp_sp_threads_stack 28 -#ifndef ISP2401 -/* function ia_css_circbuf_peek: F26 */ -#else /* function ia_css_circbuf_peek: F1B */ -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_wait_for_in_param: 1053 */ -#else /* function ia_css_parambuf_sp_wait_for_in_param: 1048 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_get_exp_id: 5FC6 */ -#else /* function ia_css_isys_sp_token_map_get_exp_id: 6101 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_param #define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cb_elems_param 0x46F8 -#else #define HIVE_ADDR_sp_all_cb_elems_param 0x4740 -#endif #define HIVE_SIZE_sp_all_cb_elems_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x46F8 -#else #define HIVE_ADDR_sp_sp_all_cb_elems_param 0x4740 -#endif #define HIVE_SIZE_sp_sp_all_cb_elems_param 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_pipeline_sp_curr_binary_id #define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1EC -#else #define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1F0 -#endif #define HIVE_SIZE_pipeline_sp_curr_binary_id 4 #else #endif #endif #define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1EC -#else #define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1F0 -#endif #define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame_desc #define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4708 -#else #define HIVE_ADDR_sp_all_cbs_frame_desc 0x4750 -#endif #define HIVE_SIZE_sp_all_cbs_frame_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4708 -#else #define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4750 -#endif #define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 -#ifndef ISP2401 -/* function sp_isys_copy_func_v2: 706 */ -#else /* function sp_isys_copy_func_v2: 69A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_param #define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_reading_cb_param 0x4710 -#else #define HIVE_ADDR_sem_for_reading_cb_param 0x4758 -#endif #define HIVE_SIZE_sem_for_reading_cb_param 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4710 -#else #define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4758 -#endif #define HIVE_SIZE_sp_sem_for_reading_cb_param 40 -#ifndef ISP2401 -/* function ia_css_queue_get_used_space: 49C6 */ -#else /* function ia_css_queue_get_used_space: 4C24 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_start #define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_cont_capt_start 0x4738 -#else #define HIVE_ADDR_sem_for_cont_capt_start 0x4780 -#endif #define HIVE_SIZE_sem_for_cont_capt_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4738 -#else #define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4780 -#endif #define HIVE_SIZE_sp_sem_for_cont_capt_start 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tmp_heap #define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_tmp_heap 0x6010 -#else #define HIVE_ADDR_tmp_heap 0x6070 -#endif #define HIVE_SIZE_tmp_heap 640 #else #endif #endif #define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_tmp_heap 0x6010 -#else #define HIVE_ADDR_sp_tmp_heap 0x6070 -#endif #define HIVE_SIZE_sp_tmp_heap 640 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_get_num_vbuf: 64F1 */ -#else /* function ia_css_rmgr_sp_get_num_vbuf: 662C */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_output_compute_dma_info: 3F62 */ -#else /* function ia_css_ispctrl_sp_output_compute_dma_info: 41A5 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_lock_exp_id: 20E6 */ -#else /* function ia_css_tagger_sp_lock_exp_id: 2136 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#ifndef ISP2401 -/* function ia_css_queue_is_full: 4A5D */ -#else /* function ia_css_queue_is_full: 4CBB */ -#endif /* function debug_buffer_init_isp: E4 */ -#ifndef ISP2401 -/* function ia_css_isys_sp_frontend_uninit: 5D20 */ -#else /* function ia_css_isys_sp_frontend_uninit: 5E5B */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_exp_id_is_locked: 201C */ -#else /* function ia_css_tagger_sp_exp_id_is_locked: 206C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem #define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#else #define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x6744 -#endif #define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#else #define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x6744 -#endif #define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_dump: 62C8 */ -#else /* function ia_css_rmgr_sp_refcount_dump: 6403 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id #define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1259,137 +671,65 @@ #define HIVE_ADDR_sp_sp_pipe_threads 0x150 #define HIVE_SIZE_sp_sp_pipe_threads 20 -#ifndef ISP2401 -/* function sp_event_proxy_func: 71B */ -#else /* function sp_event_proxy_func: 6AF */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_isys_event_queue_handle #define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4BDC -#else #define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4C38 -#endif #define HIVE_SIZE_host2sp_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4BDC -#else #define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4C38 -#endif #define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 -#ifndef ISP2401 -/* function ia_css_thread_sp_yield: 6A70 */ -#else /* function ia_css_thread_sp_yield: 6BEA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param_desc #define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_param_desc 0x474C -#else #define HIVE_ADDR_sp_all_cbs_param_desc 0x4794 -#endif #define HIVE_SIZE_sp_all_cbs_param_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x474C -#else #define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x4794 -#endif #define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb #define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#else #define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 -#endif #define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#else #define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 -#endif #define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 -#ifndef ISP2401 -/* function ia_css_thread_sp_fork: D10 */ -#else /* function ia_css_thread_sp_fork: D05 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_destroy: 280D */ -#else /* function ia_css_tagger_sp_destroy: 285D */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_vmem_read: 31D0 */ -#else /* function ia_css_dmaproxy_sp_vmem_read: 33AF */ -#endif -#ifndef ISP2401 -/* function ia_css_ifmtr_sp_init: 614F */ -#else /* function ia_css_ifmtr_sp_init: 628A */ -#endif -#ifndef ISP2401 -/* function initialize_sp_group: 6D4 */ -#else /* function initialize_sp_group: 668 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_peek: 2932 */ -#else /* function ia_css_tagger_buf_sp_peek: 2AD4 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_init: D3C */ -#else /* function ia_css_thread_sp_init: D31 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_reset_exp_id: 60F6 */ -#else /* function ia_css_isys_sp_reset_exp_id: 6231 */ -#endif -#ifndef ISP2401 -/* function qos_scheduler_update_fps: 65F0 */ -#else /* function qos_scheduler_update_fps: 6763 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_set_stream_base_addr: 4637 */ -#else /* function ia_css_ispctrl_sp_set_stream_base_addr: 4892 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_DMEM_BASE @@ -1415,78 +755,46 @@ #define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 #define HIVE_SIZE_sp_SP_DMEM_BASE 4 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_read: 3246 */ -#else /* function __ia_css_queue_is_empty_text: 4B81 */ /* function ia_css_dmaproxy_sp_read: 3425 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_raw_copy_line_count #define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_raw_copy_line_count 0x2C8 -#else #define HIVE_ADDR_raw_copy_line_count 0x2E0 -#endif #define HIVE_SIZE_raw_copy_line_count 4 #else #endif #endif #define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_raw_copy_line_count 0x2C8 -#else #define HIVE_ADDR_sp_raw_copy_line_count 0x2E0 -#endif #define HIVE_SIZE_sp_raw_copy_line_count 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle #define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4BE8 -#else #define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4C44 -#endif #define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4BE8 -#else #define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4C44 -#endif #define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 -#ifndef ISP2401 -/* function ia_css_queue_peek: 493C */ -#else /* function ia_css_queue_peek: 4B9A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt #define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4A94 -#else #define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4AF0 -#endif #define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4A94 -#else #define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4AF0 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1504,54 +812,26 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_thread #define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_thread 0x5F40 -#else #define HIVE_ADDR_isp_thread 0x5FA0 -#endif #define HIVE_SIZE_isp_thread 4 #else #endif #endif #define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_thread 0x5F40 -#else #define HIVE_ADDR_sp_isp_thread 0x5FA0 -#endif #define HIVE_SIZE_sp_isp_thread 4 -#ifndef ISP2401 -/* function encode_and_post_sp_event_non_blocking: A78 */ -#else /* function encode_and_post_sp_event_non_blocking: A0C */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_frontend_destroy: 5DF8 */ -#else /* function ia_css_isys_sp_frontend_destroy: 5F33 */ -#endif /* function is_ddr_debug_buffer_full: 2CC */ -#ifndef ISP2401 -/* function ia_css_isys_sp_frontend_stop: 5D38 */ -#else /* function ia_css_isys_sp_frontend_stop: 5E73 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_init: 6094 */ -#else /* function ia_css_isys_sp_token_map_init: 61CF */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2982 */ -#else /* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2B24 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_fiber @@ -1565,186 +845,98 @@ #define HIVE_ADDR_sp_sp_threads_fiber 0x19C #define HIVE_SIZE_sp_sp_threads_fiber 28 -#ifndef ISP2401 -/* function encode_and_post_sp_event: A01 */ -#else /* function encode_and_post_sp_event: 995 */ -#endif /* function debug_enqueue_ddr: EE */ -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_init_vbuf: 6283 */ -#else /* function ia_css_rmgr_sp_refcount_init_vbuf: 63BE */ -#endif -#ifndef ISP2401 -/* function dmaproxy_sp_read_write: 6EE4 */ -#else /* function dmaproxy_sp_read_write: 7017 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer #define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#else #define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 -#endif #define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#else #define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 -#endif #define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_buffer_queue_handle #define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4BF4 -#else #define HIVE_ADDR_host2sp_buffer_queue_handle 0x4C50 -#endif #define HIVE_SIZE_host2sp_buffer_queue_handle 480 #else #endif #endif #define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4BF4 -#else #define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4C50 -#endif #define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_service #define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3178 -#else #define HIVE_ADDR_ia_css_flash_sp_in_service 0x3198 -#endif #define HIVE_SIZE_ia_css_flash_sp_in_service 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3178 -#else #define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3198 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_process: 6BF0 */ -#else /* function ia_css_dmaproxy_sp_process: 6D63 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_mark_from_end: 2C0A */ -#else /* function ia_css_tagger_buf_sp_mark_from_end: 2DAC */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_rcv_acquire_ack: 5A05 */ -#else /* function ia_css_isys_sp_backend_rcv_acquire_ack: 5B40 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_pre_acquire_request: 5A1B */ -#else /* function ia_css_isys_sp_backend_pre_acquire_request: 5B56 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_cs: 366C */ -#else /* function ia_css_ispctrl_sp_init_cs: 386E */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_init: 5971 */ -#else /* function ia_css_spctrl_sp_init: 5AAC */ -#endif -#ifndef ISP2401 -/* function sp_event_proxy_init: 730 */ -#else /* function sp_event_proxy_init: 6C4 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick #define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_output #define HIVE_MEM_sp_output scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_output 0x41F8 -#else #define HIVE_ADDR_sp_output 0x4218 -#endif #define HIVE_SIZE_sp_output 16 #else #endif #endif #define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_output 0x41F8 -#else #define HIVE_ADDR_sp_sp_output 0x4218 -#endif #define HIVE_SIZE_sp_sp_output 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#else #define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 -#endif #define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -1771,100 +963,52 @@ #define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C #define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 -#ifndef ISP2401 -/* function sp_dma_proxy_reset_channels: 34A0 */ -#else /* function sp_dma_proxy_reset_channels: 3694 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_acquire: 5B26 */ -#else /* function ia_css_isys_sp_backend_acquire: 5C61 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_update_size: 2901 */ -#else /* function ia_css_tagger_sp_update_size: 2AA3 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_host_sp_queue #define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x511C -#else #define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x5178 -#endif #define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x511C -#else #define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x5178 -#endif #define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 -#ifndef ISP2401 -/* function thread_fiber_sp_create: DA8 */ -#else /* function thread_fiber_sp_create: D9D */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_increments: 3332 */ -#else /* function ia_css_dmaproxy_sp_set_increments: 3526 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_frame #define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_writing_cb_frame 0x4754 -#else #define HIVE_ADDR_sem_for_writing_cb_frame 0x479C -#endif #define HIVE_SIZE_sem_for_writing_cb_frame 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x4754 -#else #define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x479C -#endif #define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 -#ifndef ISP2401 -/* function receiver_reg_store: AD7 */ -#else /* function receiver_reg_store: AD1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_param #define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_writing_cb_param 0x4768 -#else #define HIVE_ADDR_sem_for_writing_cb_param 0x47B0 -#endif #define HIVE_SIZE_sem_for_writing_cb_param 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x4768 -#else #define HIVE_ADDR_sp_sem_for_writing_cb_param 0x47B0 -#endif #define HIVE_SIZE_sp_sem_for_writing_cb_param 20 /* function sp_start_isp_entry: 453 */ @@ -1875,115 +1019,51 @@ #endif #define HIVE_ADDR_sp_sp_start_isp_entry 0x453 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_unmark_all: 2B8E */ -#else /* function ia_css_tagger_buf_sp_unmark_all: 2D30 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_unmark_from_start: 2BCF */ -#else /* function ia_css_tagger_buf_sp_unmark_from_start: 2D71 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_channel_acquire: 34CC */ -#else /* function ia_css_dmaproxy_sp_channel_acquire: 36C0 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_add_num_vbuf: 64CD */ -#else /* function ia_css_rmgr_sp_add_num_vbuf: 6608 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_create: 60DD */ -#else /* function ia_css_isys_sp_token_map_create: 6218 */ -#endif -#ifndef ISP2401 -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 319C */ -#else /* function __ia_css_dmaproxy_sp_wait_for_ack_text: 337B */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_acquire_buf_elem: 1FF4 */ -#else /* function ia_css_tagger_sp_acquire_buf_elem: 2044 */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_is_dynamic_buffer: 3085 */ -#else /* function ia_css_bufq_sp_is_dynamic_buffer: 3227 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_group #define HIVE_MEM_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_group 0x4208 -#define HIVE_SIZE_sp_group 1144 -#else #define HIVE_ADDR_sp_group 0x4228 #define HIVE_SIZE_sp_group 1184 -#endif #else #endif #endif #define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_group 0x4208 -#define HIVE_SIZE_sp_sp_group 1144 -#else #define HIVE_ADDR_sp_sp_group 0x4228 #define HIVE_SIZE_sp_sp_group 1184 -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_event_proxy_thread #define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_event_proxy_thread 0x4954 -#define HIVE_SIZE_sp_event_proxy_thread 68 -#else #define HIVE_ADDR_sp_event_proxy_thread 0x49B0 #define HIVE_SIZE_sp_event_proxy_thread 72 -#endif #else #endif #endif #define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x4954 -#define HIVE_SIZE_sp_sp_event_proxy_thread 68 -#else #define HIVE_ADDR_sp_sp_event_proxy_thread 0x49B0 #define HIVE_SIZE_sp_sp_event_proxy_thread 72 -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_kill: CD6 */ -#else /* function ia_css_thread_sp_kill: CCB */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_create: 28BB */ -#else /* function ia_css_tagger_sp_create: 2A51 */ -#endif -#ifndef ISP2401 -/* function tmpmem_acquire_dmem: 657A */ -#else /* function tmpmem_acquire_dmem: 66B5 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_MMU_BASE @@ -1997,81 +1077,41 @@ #define HIVE_ADDR_sp_MMU_BASE 0x24 #define HIVE_SIZE_sp_MMU_BASE 8 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_channel_release: 34B8 */ -#else /* function ia_css_dmaproxy_sp_channel_release: 36AC */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_is_idle: 3498 */ -#else /* function ia_css_dmaproxy_sp_is_idle: 368C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_qos_start #define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_qos_start 0x477C -#else #define HIVE_ADDR_sem_for_qos_start 0x47C4 -#endif #define HIVE_SIZE_sem_for_qos_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_qos_start 0x477C -#else #define HIVE_ADDR_sp_sem_for_qos_start 0x47C4 -#endif #define HIVE_SIZE_sp_sem_for_qos_start 20 -#ifndef ISP2401 -/* function isp_hmem_load: B55 */ -#else /* function isp_hmem_load: B4F */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_release_buf_elem: 1FD0 */ -#else /* function ia_css_tagger_sp_release_buf_elem: 2020 */ -#endif -#ifndef ISP2401 -/* function ia_css_eventq_sp_send: 350E */ -#else /* function ia_css_eventq_sp_send: 3702 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_isys_sp_error_cnt #define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x62D4 -#else #define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x6330 -#endif #define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 #else #endif #endif #define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x62D4 -#else #define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x6330 -#endif #define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_unlock_from_start: 2ABE */ -#else /* function ia_css_tagger_buf_sp_unlock_from_start: 2C60 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_debug_buffer_ddr_address @@ -2085,88 +1125,38 @@ #define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC #define HIVE_SIZE_sp_debug_buffer_ddr_address 4 -#ifndef ISP2401 -/* function sp_isys_copy_request: 714 */ -#else /* function sp_isys_copy_request: 6A8 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 635D */ -#else /* function ia_css_rmgr_sp_refcount_retain_vbuf: 6498 */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_set_priority: CCE */ -#else /* function ia_css_thread_sp_set_priority: CC3 */ -#endif -#ifndef ISP2401 -/* function sizeof_hmem: BFC */ -#else /* function sizeof_hmem: BF6 */ -#endif -#ifndef ISP2401 -/* function tmpmem_release_dmem: 6569 */ -#else /* function tmpmem_release_dmem: 66A4 */ -#endif /* function cnd_input_system_cfg: 392 */ -#ifndef ISP2401 -/* function __ia_css_sp_rawcopy_func_critical: 6F65 */ -#else /* function __ia_css_sp_rawcopy_func_critical: 70C2 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_width_exception: 331D */ -#else /* function __ia_css_dmaproxy_sp_process_text: 331F */ -#endif -#ifndef ISP2401 -/* function sp_event_assert: 8B1 */ -#else /* function ia_css_dmaproxy_sp_set_width_exception: 3511 */ -#endif -#ifndef ISP2401 -/* function ia_css_flash_sp_init_internal_params: 2CA9 */ -#else /* function sp_event_assert: 845 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 29C4 */ -#else /* function ia_css_flash_sp_init_internal_params: 2E4B */ -#endif -#ifndef ISP2401 -/* function __modu: 68BB */ -#else /* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 2B66 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init_isp_vector: 31A2 */ -#else /* function __modu: 6A2E */ /* function ia_css_dmaproxy_sp_init_isp_vector: 3381 */ -#endif /* function isp_vamem_store: 0 */ -#ifdef ISP2401 /* function ia_css_tagger_sp_set_copy_pipe: 2A48 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GDC_BASE #define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem @@ -2179,42 +1169,22 @@ #define HIVE_ADDR_sp_GDC_BASE 0x44 #define HIVE_SIZE_sp_GDC_BASE 8 -#ifndef ISP2401 -/* function ia_css_queue_local_init: 4C27 */ -#else /* function ia_css_queue_local_init: 4E85 */ -#endif -#ifndef ISP2401 -/* function sp_event_proxy_callout_func: 6988 */ -#else /* function sp_event_proxy_callout_func: 6AFB */ -#endif -#ifndef ISP2401 -/* function qos_scheduler_schedule_stage: 65C1 */ -#else /* function qos_scheduler_schedule_stage: 670F */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads #define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x49E0 -#else #define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x4A40 -#endif #define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x49E0 -#else #define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x4A40 -#endif #define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -2229,63 +1199,31 @@ #define HIVE_ADDR_sp_sp_threads_stack_size 0x180 #define HIVE_SIZE_sp_sp_threads_stack_size 28 -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_isp_done_row_striping: 3F48 */ -#else /* function ia_css_ispctrl_sp_isp_done_row_striping: 418B */ -#endif -#ifndef ISP2401 -/* function __ia_css_isys_sp_isr_text: 5E22 */ -#else /* function __ia_css_isys_sp_isr_text: 5F5D */ -#endif -#ifndef ISP2401 -/* function ia_css_queue_dequeue: 4AA5 */ -#else /* function ia_css_queue_dequeue: 4D03 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_configure_channel: 6E4C */ -#else /* function is_qos_standalone_mode: 66EA */ /* function ia_css_dmaproxy_sp_configure_channel: 6F90 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_thread_fiber_sp #define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_current_thread_fiber_sp 0x49E8 -#else #define HIVE_ADDR_current_thread_fiber_sp 0x4A44 -#endif #define HIVE_SIZE_current_thread_fiber_sp 4 #else #endif #endif #define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x49E8 -#else #define HIVE_ADDR_sp_current_thread_fiber_sp 0x4A44 -#endif #define HIVE_SIZE_sp_current_thread_fiber_sp 4 -#ifndef ISP2401 -/* function ia_css_circbuf_pop: FD8 */ -#else /* function ia_css_circbuf_pop: FCD */ -#endif -#ifndef ISP2401 -/* function memset: 693A */ -#else /* function memset: 6AAD */ -#endif /* function irq_raise_set_token: B6 */ @@ -2301,253 +1239,125 @@ #define HIVE_ADDR_sp_GPIO_BASE 0x3C #define HIVE_SIZE_sp_GPIO_BASE 4 -#ifndef ISP2401 -/* function ia_css_pipeline_acc_stage_enable: 17F0 */ -#else /* function ia_css_pipeline_acc_stage_enable: 1818 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_unlock_exp_id: 2041 */ -#else /* function ia_css_tagger_sp_unlock_exp_id: 2091 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_ph #define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_ph 0x62E4 -#else #define HIVE_ADDR_isp_ph 0x6340 -#endif #define HIVE_SIZE_isp_ph 28 #else #endif #endif #define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_ph 0x62E4 -#else #define HIVE_ADDR_sp_isp_ph 0x6340 -#endif #define HIVE_SIZE_sp_isp_ph 28 -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_flush: 6022 */ -#else /* function ia_css_isys_sp_token_map_flush: 615D */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_ds: 37CB */ -#else /* function ia_css_ispctrl_sp_init_ds: 39FA */ -#endif -#ifndef ISP2401 -/* function get_xmem_base_addr_raw: 3B78 */ -#else /* function get_xmem_base_addr_raw: 3DB3 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param #define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_param 0x4790 -#else #define HIVE_ADDR_sp_all_cbs_param 0x47D8 -#endif #define HIVE_SIZE_sp_all_cbs_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_param 0x4790 -#else #define HIVE_ADDR_sp_sp_all_cbs_param 0x47D8 -#endif #define HIVE_SIZE_sp_sp_all_cbs_param 16 -#ifndef ISP2401 -/* function ia_css_circbuf_create: 1026 */ -#else /* function ia_css_circbuf_create: 101B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp_group #define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_sp_group 0x47A0 -#else #define HIVE_ADDR_sem_for_sp_group 0x47E8 -#endif #define HIVE_SIZE_sem_for_sp_group 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_sp_group 0x47A0 -#else #define HIVE_ADDR_sp_sem_for_sp_group 0x47E8 -#endif #define HIVE_SIZE_sp_sem_for_sp_group 20 -#ifndef ISP2401 -/* function ia_css_framebuf_sp_wait_for_in_frame: 64F8 */ -#else /* function __ia_css_dmaproxy_sp_configure_channel_text: 34F0 */ /* function ia_css_framebuf_sp_wait_for_in_frame: 6633 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_tag_frame: 5588 */ -#else /* function ia_css_sp_rawcopy_tag_frame: 57C9 */ -#endif -#ifndef ISP2401 -/* function isp_hmem_clear: B25 */ -#else /* function isp_hmem_clear: B1F */ -#endif -#ifndef ISP2401 -/* function ia_css_framebuf_sp_release_in_frame: 653B */ -#else /* function ia_css_framebuf_sp_release_in_frame: 6676 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_snd_acquire_request: 5A78 */ -#else /* function ia_css_isys_sp_backend_snd_acquire_request: 5BB3 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_is_full: 5EA9 */ -#else /* function ia_css_isys_sp_token_map_is_full: 5FE4 */ -#endif -#ifndef ISP2401 -/* function input_system_acquisition_run: AF9 */ -#else /* function input_system_acquisition_run: AF3 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_start_binary: 364A */ -#else /* function ia_css_ispctrl_sp_start_binary: 384C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#else #define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 -#endif #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#ifndef ISP2401 -/* function ia_css_eventq_sp_recv: 34E0 */ -#else /* function ia_css_eventq_sp_recv: 36D4 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_pool #define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_pool 0x2E8 -#else #define HIVE_ADDR_isp_pool 0x300 -#endif #define HIVE_SIZE_isp_pool 4 #else #endif #endif #define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_pool 0x2E8 -#else #define HIVE_ADDR_sp_isp_pool 0x300 -#endif #define HIVE_SIZE_sp_isp_pool 4 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_rel_gen: 622A */ -#else /* function ia_css_rmgr_sp_rel_gen: 6365 */ /* function ia_css_tagger_sp_unblock_clients: 2919 */ -#endif -#ifndef ISP2401 -/* function css_get_frame_processing_time_end: 1FC0 */ -#else /* function css_get_frame_processing_time_end: 2010 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_any_pending_mask #define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_event_any_pending_mask 0x300 -#else #define HIVE_ADDR_event_any_pending_mask 0x318 -#endif #define HIVE_SIZE_event_any_pending_mask 8 #else #endif #endif #define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_event_any_pending_mask 0x300 -#else #define HIVE_ADDR_sp_event_any_pending_mask 0x318 -#endif #define HIVE_SIZE_sp_event_any_pending_mask 8 -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_push: 5A2F */ -#else /* function ia_css_isys_sp_backend_push: 5B6A */ -#endif /* function sh_css_decode_tag_descr: 352 */ /* function debug_enqueue_isp: 27B */ -#ifndef ISP2401 -/* function qos_scheduler_update_stage_budget: 65AF */ -#else /* function qos_scheduler_update_stage_budget: 66F2 */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_uninit: 596A */ -#else /* function ia_css_spctrl_sp_uninit: 5AA5 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE @@ -2564,66 +1374,34 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_lock_from_start: 2AF2 */ -#else /* function ia_css_tagger_buf_sp_lock_from_start: 2C94 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_isp_idle #define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_isp_idle 0x47B4 -#else #define HIVE_ADDR_sem_for_isp_idle 0x47FC -#endif #define HIVE_SIZE_sem_for_isp_idle 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_isp_idle 0x47B4 -#else #define HIVE_ADDR_sp_sem_for_isp_idle 0x47FC -#endif #define HIVE_SIZE_sp_sem_for_isp_idle 20 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_write_byte_addr: 31FF */ -#else /* function ia_css_dmaproxy_sp_write_byte_addr: 33DE */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init: 3176 */ -#else /* function ia_css_dmaproxy_sp_init: 3355 */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2D7B */ -#else /* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2F1D */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_VAMEM_BASE @@ -2640,86 +1418,46 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger #define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x6294 -#else #define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x62F0 -#endif #define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 #else #endif #endif #define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x6294 -#else #define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x62F0 -#endif #define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids #define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 -#ifndef ISP2401 -/* function ia_css_queue_item_load: 4D19 */ -#else /* function ia_css_queue_item_load: 4F77 */ -#endif -#ifndef ISP2401 -/* function ia_css_spctrl_sp_get_state: 5955 */ -#else /* function ia_css_spctrl_sp_get_state: 5A90 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_uninit: 603F */ -#else /* function ia_css_isys_sp_token_map_uninit: 617A */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_callout_sp_thread #define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_callout_sp_thread 0x49DC -#else #define HIVE_ADDR_callout_sp_thread 0x1E0 -#endif #define HIVE_SIZE_callout_sp_thread 4 #else #endif #endif #define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_callout_sp_thread 0x49DC -#else #define HIVE_ADDR_sp_callout_sp_thread 0x1E0 -#endif #define HIVE_SIZE_sp_callout_sp_thread 4 -#ifndef ISP2401 -/* function thread_fiber_sp_init: E2F */ -#else /* function thread_fiber_sp_init: E24 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_SP_PMEM_BASE @@ -2733,129 +1471,53 @@ #define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 #define HIVE_SIZE_sp_SP_PMEM_BASE 4 -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_snd_acquire_req: 5FAF */ -#else /* function ia_css_isys_sp_token_map_snd_acquire_req: 60EA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_input_stream_format #define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_input_stream_format 0x40F8 -#else #define HIVE_ADDR_sp_isp_input_stream_format 0x4118 -#endif #define HIVE_SIZE_sp_isp_input_stream_format 20 #else #endif #endif #define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x40F8 -#else #define HIVE_ADDR_sp_sp_isp_input_stream_format 0x4118 -#endif #define HIVE_SIZE_sp_sp_isp_input_stream_format 20 -#ifndef ISP2401 -/* function __mod: 68A7 */ -#else /* function __mod: 6A1A */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3260 */ -#else /* function ia_css_dmaproxy_sp_init_dmem_channel: 343F */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_join: CFF */ -#else /* function ia_css_thread_sp_join: CF4 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_add_command: 6F4F */ -#else /* function ia_css_dmaproxy_sp_add_command: 7082 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_metadata_thread_func: 5809 */ -#else /* function ia_css_sp_metadata_thread_func: 5968 */ -#endif -#ifndef ISP2401 -/* function __sp_event_proxy_func_critical: 6975 */ -#else /* function __sp_event_proxy_func_critical: 6AE8 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_metadata_wait: 591C */ -#else /* function ia_css_sp_metadata_wait: 5A57 */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_peek_from_start: F08 */ -#else /* function ia_css_circbuf_peek_from_start: EFD */ -#endif -#ifndef ISP2401 -/* function ia_css_event_sp_encode: 356B */ -#else /* function ia_css_event_sp_encode: 375F */ -#endif -#ifndef ISP2401 -/* function ia_css_thread_sp_run: D72 */ -#else /* function ia_css_thread_sp_run: D67 */ -#endif -#ifndef ISP2401 -/* function sp_isys_copy_func: 6F6 */ -#else /* function sp_isys_copy_func: 68A */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_flush: 5A98 */ -#else /* function ia_css_isys_sp_backend_flush: 5BD3 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_frame_exists: 59B4 */ -#else /* function ia_css_isys_sp_backend_frame_exists: 5AEF */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_isp_param_init_isp_memories: 47A2 */ -#else /* function ia_css_sp_isp_param_init_isp_memories: 4A2A */ -#endif -#ifndef ISP2401 -/* function register_isr: 8A9 */ -#else /* function register_isr: 83D */ -#endif /* function irq_raise: C8 */ -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_mmu_invalidate: 313D */ -#else /* function ia_css_dmaproxy_sp_mmu_invalidate: 32E5 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS @@ -2869,81 +1531,41 @@ #define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 #define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 -#ifndef ISP2401 -/* function pipeline_sp_initialize_stage: 1924 */ -#else /* function pipeline_sp_initialize_stage: 195E */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_isys_sp_frontend_states #define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x62C8 -#else #define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x6324 -#endif #define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 #else #endif #endif #define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x62C8 -#else #define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x6324 -#endif #define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6E1E */ -#else /* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6F62 */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_done_ds: 37B2 */ -#else /* function ia_css_ispctrl_sp_done_ds: 39E1 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_isp_param_get_mem_inits: 477D */ -#else /* function ia_css_sp_isp_param_get_mem_inits: 4A05 */ -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_init_buffer_queues: 13D0 */ -#else /* function ia_css_parambuf_sp_init_buffer_queues: 13F1 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_pfp_spref #define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_pfp_spref 0x2F0 -#else #define HIVE_ADDR_vbuf_pfp_spref 0x308 -#endif #define HIVE_SIZE_vbuf_pfp_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x2F0 -#else #define HIVE_ADDR_sp_vbuf_pfp_spref 0x308 -#endif #define HIVE_SIZE_sp_vbuf_pfp_spref 4 -#ifndef ISP2401 -/* function input_system_cfg: ABB */ -#else /* function input_system_cfg: AB5 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_HMEM_BASE @@ -2960,530 +1582,260 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames #define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x59DC -#else #define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x5A38 -#endif #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x59DC -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x5A38 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 -#ifndef ISP2401 -/* function qos_scheduler_init_stage_budget: 65E8 */ -#else /* function qos_scheduler_init_stage_budget: 6750 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_release: 5B0D */ -#else /* function ia_css_isys_sp_backend_release: 5C48 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_backend_destroy: 5B37 */ -#else /* function ia_css_isys_sp_backend_destroy: 5C72 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_buffer_queue_handle #define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5AF4 -#else #define HIVE_ADDR_sp2host_buffer_queue_handle 0x5B50 -#endif #define HIVE_SIZE_sp2host_buffer_queue_handle 96 #else #endif #endif #define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5AF4 -#else #define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5B50 -#endif #define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 5F73 */ -#else /* function ia_css_isys_sp_token_map_check_mipi_frame_size: 60AE */ -#endif -#ifndef ISP2401 -/* function ia_css_ispctrl_sp_init_isp_vars: 449C */ -#else /* function ia_css_ispctrl_sp_init_isp_vars: 46F7 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5B89 */ -#else /* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5CC4 */ -#endif -#ifndef ISP2401 -/* function sp_warning: 8DC */ -#else /* function sp_warning: 870 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_vbuf_enqueue: 631D */ -#else /* function ia_css_rmgr_sp_vbuf_enqueue: 6458 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_sp_tag_exp_id: 215B */ -#else /* function ia_css_tagger_sp_tag_exp_id: 21AB */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_write: 3216 */ -#else /* function ia_css_dmaproxy_sp_write: 33F5 */ -#endif -#ifndef ISP2401 -/* function ia_css_parambuf_sp_release_in_param: 1250 */ -#else /* function ia_css_parambuf_sp_release_in_param: 1245 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_irq_sw_interrupt_token #define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_irq_sw_interrupt_token 0x40F4 -#else #define HIVE_ADDR_irq_sw_interrupt_token 0x4114 -#endif #define HIVE_SIZE_irq_sw_interrupt_token 4 #else #endif #endif #define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x40F4 -#else #define HIVE_ADDR_sp_irq_sw_interrupt_token 0x4114 -#endif #define HIVE_SIZE_sp_irq_sw_interrupt_token 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_addresses #define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_addresses 0x5F44 -#else #define HIVE_ADDR_sp_isp_addresses 0x5FA4 -#endif #define HIVE_SIZE_sp_isp_addresses 172 #else #endif #endif #define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_isp_addresses 0x5F44 -#else #define HIVE_ADDR_sp_sp_isp_addresses 0x5FA4 -#endif #define HIVE_SIZE_sp_sp_isp_addresses 172 -#ifndef ISP2401 -/* function ia_css_rmgr_sp_acq_gen: 6242 */ -#else /* function ia_css_rmgr_sp_acq_gen: 637D */ -#endif -#ifndef ISP2401 -/* function receiver_reg_load: AD0 */ -#else /* function receiver_reg_load: ACA */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isps #define HIVE_MEM_isps scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isps 0x6300 -#else #define HIVE_ADDR_isps 0x635C -#endif #define HIVE_SIZE_isps 28 #else #endif #endif #define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isps 0x6300 -#else #define HIVE_ADDR_sp_isps 0x635C -#endif #define HIVE_SIZE_sp_isps 28 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_queues_initialized #define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_host_sp_queues_initialized 0x410C -#else #define HIVE_ADDR_host_sp_queues_initialized 0x412C -#endif #define HIVE_SIZE_host_sp_queues_initialized 4 #else #endif #endif #define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x410C -#else #define HIVE_ADDR_sp_host_sp_queues_initialized 0x412C -#endif #define HIVE_SIZE_sp_host_sp_queues_initialized 4 -#ifndef ISP2401 -/* function ia_css_queue_uninit: 4BE5 */ -#else /* function ia_css_queue_uninit: 4E43 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started #define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5BFC -#else #define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5C58 -#endif #define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5BFC -#else #define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5C58 -#endif #define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 -#ifndef ISP2401 -/* function ia_css_bufq_sp_release_dynamic_buf: 2DE7 */ -#else /* function ia_css_bufq_sp_release_dynamic_buf: 2F89 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_set_height_exception: 330E */ -#else /* function ia_css_dmaproxy_sp_set_height_exception: 3502 */ -#endif -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3293 */ -#else /* function ia_css_dmaproxy_sp_init_vmem_channel: 3473 */ -#endif -#ifndef ISP2401 -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_num_ready_threads -#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_num_ready_threads 0x49E4 -#define HIVE_SIZE_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_num_ready_threads 0x49E4 -#define HIVE_SIZE_sp_num_ready_threads 4 - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 31E8 */ -#else /* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 33C7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_spref #define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_vbuf_spref 0x2EC -#else #define HIVE_ADDR_vbuf_spref 0x304 -#endif #define HIVE_SIZE_vbuf_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_vbuf_spref 0x2EC -#else #define HIVE_ADDR_sp_vbuf_spref 0x304 -#endif #define HIVE_SIZE_sp_vbuf_spref 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_metadata_thread #define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_metadata_thread 0x4998 -#define HIVE_SIZE_sp_metadata_thread 68 -#else #define HIVE_ADDR_sp_metadata_thread 0x49F8 #define HIVE_SIZE_sp_metadata_thread 72 -#endif #else #endif #endif #define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_metadata_thread 0x4998 -#define HIVE_SIZE_sp_sp_metadata_thread 68 -#else #define HIVE_ADDR_sp_sp_metadata_thread 0x49F8 #define HIVE_SIZE_sp_sp_metadata_thread 72 -#endif -#ifndef ISP2401 -/* function ia_css_queue_enqueue: 4B2F */ -#else /* function ia_css_queue_enqueue: 4D8D */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_request #define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_request 0x4A98 -#else #define HIVE_ADDR_ia_css_flash_sp_request 0x4AF4 -#endif #define HIVE_SIZE_ia_css_flash_sp_request 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4A98 -#else #define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4AF4 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_request 4 -#ifndef ISP2401 -/* function ia_css_dmaproxy_sp_vmem_write: 31B9 */ -#else /* function ia_css_dmaproxy_sp_vmem_write: 3398 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tagger_frames #define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_tagger_frames 0x49EC -#else #define HIVE_ADDR_tagger_frames 0x4A48 -#endif #define HIVE_SIZE_tagger_frames 168 #else #endif #endif #define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_tagger_frames 0x49EC -#else #define HIVE_ADDR_sp_tagger_frames 0x4A48 -#endif #define HIVE_SIZE_sp_tagger_frames 168 -#ifndef ISP2401 -/* function ia_css_isys_sp_token_map_snd_capture_req: 5FD1 */ -#else /* function ia_css_isys_sp_token_map_snd_capture_req: 610C */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_if #define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_reading_if 0x47C8 -#else #define HIVE_ADDR_sem_for_reading_if 0x4810 -#endif #define HIVE_SIZE_sem_for_reading_if 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_reading_if 0x47C8 -#else #define HIVE_ADDR_sp_sem_for_reading_if 0x4810 -#endif #define HIVE_SIZE_sp_sem_for_reading_if 20 -#ifndef ISP2401 -/* function sp_generate_interrupts: 95B */ -#else /* function sp_generate_interrupts: 8EF */ /* function ia_css_pipeline_sp_start: 1871 */ -#endif -#ifndef ISP2401 -/* function ia_css_pipeline_sp_start: 1837 */ -#else /* function ia_css_thread_default_callout: 6BE3 */ -#endif -#ifndef ISP2401 -/* function ia_css_sp_rawcopy_init: 510C */ -#else /* function ia_css_sp_rawcopy_init: 536A */ -#endif -#ifndef ISP2401 -/* function tmr_clock_read: 13F1 */ -#else /* function tmr_clock_read: 1412 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_BAMEM_BASE #define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ISP_BAMEM_BASE 0x2F8 -#else #define HIVE_ADDR_ISP_BAMEM_BASE 0x310 -#endif #define HIVE_SIZE_ISP_BAMEM_BASE 4 #else #endif #endif #define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x2F8 -#else #define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x310 -#endif #define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 -#ifndef ISP2401 -/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5C38 */ -#else /* function ia_css_isys_sp_frontend_rcv_capture_ack: 5D73 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#else #define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 -#endif #define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#else #define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 -#endif #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#ifndef ISP2401 -/* function css_get_frame_processing_time_start: 1FC8 */ -#else /* function css_get_frame_processing_time_start: 2018 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame #define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_all_cbs_frame 0x47DC -#else #define HIVE_ADDR_sp_all_cbs_frame 0x4824 -#endif #define HIVE_SIZE_sp_all_cbs_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x47DC -#else #define HIVE_ADDR_sp_sp_all_cbs_frame 0x4824 -#endif #define HIVE_SIZE_sp_sp_all_cbs_frame 16 -#ifndef ISP2401 -/* function thread_sp_queue_print: D8F */ -#else /* function thread_sp_queue_print: D84 */ -#endif -#ifndef ISP2401 -/* function sp_notify_eof: 907 */ -#else /* function sp_notify_eof: 89B */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_str2mem #define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sem_for_str2mem 0x47EC -#else #define HIVE_ADDR_sem_for_str2mem 0x4834 -#endif #define HIVE_SIZE_sem_for_str2mem 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sem_for_str2mem 0x47EC -#else #define HIVE_ADDR_sp_sem_for_str2mem 0x4834 -#endif #define HIVE_SIZE_sp_sem_for_str2mem 20 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_is_marked_from_start: 2B5A */ -#else /* function ia_css_tagger_buf_sp_is_marked_from_start: 2CFC */ -#endif -#ifndef ISP2401 -/* function ia_css_bufq_sp_acquire_dynamic_buf: 2F9F */ -#else /* function ia_css_bufq_sp_acquire_dynamic_buf: 3141 */ -#endif -#ifndef ISP2401 -/* function ia_css_circbuf_destroy: 101D */ -#else /* function ia_css_circbuf_destroy: 1012 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_PMEM_BASE @@ -3497,87 +1849,43 @@ #define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC #define HIVE_SIZE_sp_ISP_PMEM_BASE 4 -#ifndef ISP2401 -/* function ia_css_sp_isp_param_mem_load: 4710 */ -#else /* function ia_css_sp_isp_param_mem_load: 4998 */ -#endif -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_pop_from_start: 2946 */ -#else /* function ia_css_tagger_buf_sp_pop_from_start: 2AE8 */ -#endif -#ifndef ISP2401 -/* function __div: 685F */ -#else /* function __div: 69D2 */ -#endif -#ifndef ISP2401 -/* function ia_css_isys_sp_frontend_create: 5E09 */ -#else /* function ia_css_isys_sp_frontend_create: 5F44 */ -#endif -#ifndef ISP2401 -/* function ia_css_rmgr_sp_refcount_release_vbuf: 633C */ -#else /* function ia_css_rmgr_sp_refcount_release_vbuf: 6477 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_use #define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4A9C -#else #define HIVE_ADDR_ia_css_flash_sp_in_use 0x4AF8 -#endif #define HIVE_SIZE_ia_css_flash_sp_in_use 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4A9C -#else #define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4AF8 -#endif #define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 -#ifndef ISP2401 -/* function ia_css_thread_sem_sp_wait: 6B42 */ -#else /* function ia_css_thread_sem_sp_wait: 6CB7 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sleep_mode #define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sleep_mode 0x4110 -#else #define HIVE_ADDR_sp_sleep_mode 0x4130 -#endif #define HIVE_SIZE_sp_sleep_mode 4 #else #endif #endif #define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_sp_sleep_mode 0x4110 -#else #define HIVE_ADDR_sp_sp_sleep_mode 0x4130 -#endif #define HIVE_SIZE_sp_sp_sleep_mode 4 -#ifndef ISP2401 -/* function ia_css_tagger_buf_sp_push: 2A55 */ -#else /* function ia_css_tagger_buf_sp_push: 2BF7 */ -#endif /* function mmu_invalidate_cache: D3 */ @@ -3593,41 +1901,19 @@ #define HIVE_ADDR_sp_sp_max_cb_elems 0x148 #define HIVE_SIZE_sp_sp_max_cb_elems 8 -#ifndef ISP2401 -/* function ia_css_queue_remote_init: 4C07 */ -#else /* function ia_css_queue_remote_init: 4E65 */ -#endif #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stop_req #define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_isp_stop_req 0x4680 -#else #define HIVE_ADDR_isp_stop_req 0x46C8 -#endif #define HIVE_SIZE_isp_stop_req 4 #else #endif #endif #define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#ifndef ISP2401 -#define HIVE_ADDR_sp_isp_stop_req 0x4680 -#else #define HIVE_ADDR_sp_isp_stop_req 0x46C8 -#endif #define HIVE_SIZE_sp_isp_stop_req 4 -#ifndef ISP2401 -#define HIVE_ICACHE_sp_critical_SEGMENT_START 0 -#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 -#endif #endif /* _sp_map_h_ */ -#ifndef ISP2401 -extern void sh_css_dump_sp_dmem(void); -void sh_css_dump_sp_dmem(void) -{ -} -#endif -- GitLab From 3c0538fbad9f1d07d588f631e380256d941e3d3a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 30 Apr 2020 13:56:47 +0200 Subject: [PATCH 446/503] media: atomisp: get rid of most checks for ISP2401 version There are lots of places inside this driver checking for ISP2400/ISP2401 verison. Get rid of most of those, while keep building for both. Most of stuff in this patch is trivial to solve. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp_cmd.c | 2 - .../atomisp/pci/base/refcount/src/refcount.c | 9 +- .../pci/camera/pipe/src/pipe_binarydesc.c | 34 +- .../media/atomisp/pci/camera/util/src/util.c | 2 - .../isp/kernels/dp/dp_1.0/ia_css_dp.host.c | 3 +- .../isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c | 3 - .../yuv444_io_ls/ia_css_yuv444_io.host.c | 2 - .../isp/kernels/sc/sc_1.0/ia_css_sc.host.c | 7 +- .../kernels/xnr/xnr_3.0/ia_css_xnr3.host.c | 23 +- .../media/atomisp/pci/isp2400_system_global.h | 1 - .../media/atomisp/pci/isp2401_system_global.h | 1 - .../atomisp/pci/runtime/binary/src/binary.c | 11 +- .../media/atomisp/pci/runtime/bufq/src/bufq.c | 32 -- .../pci/runtime/debug/src/ia_css_debug.c | 171 +++---- .../atomisp/pci/runtime/event/src/event.c | 18 +- .../atomisp/pci/runtime/frame/src/frame.c | 63 +-- .../atomisp/pci/runtime/ifmtr/src/ifmtr.c | 22 +- .../pci/runtime/inputfifo/src/inputfifo.c | 50 +- .../pci/runtime/isp_param/src/isp_param.c | 18 +- .../pci/runtime/isys/src/csi_rx_rmgr.c | 18 +- .../pci/runtime/isys/src/ibuf_ctrl_rmgr.c | 19 - .../pci/runtime/isys/src/isys_dma_rmgr.c | 18 +- .../atomisp/pci/runtime/isys/src/isys_init.c | 18 +- .../runtime/isys/src/isys_stream2mmio_rmgr.c | 18 +- .../media/atomisp/pci/runtime/isys/src/rx.c | 18 +- .../pci/runtime/isys/src/virtual_isys.c | 18 - .../pci/runtime/pipeline/src/pipeline.c | 18 +- .../pci/runtime/queue/src/queue_access.c | 18 +- .../media/atomisp/pci/runtime/rmgr/src/rmgr.c | 18 +- .../atomisp/pci/runtime/spctrl/src/spctrl.c | 21 +- .../atomisp/pci/runtime/timer/src/timer.c | 16 - drivers/staging/media/atomisp/pci/sh_css.c | 2 - .../media/atomisp/pci/sh_css_firmware.c | 32 +- .../staging/media/atomisp/pci/sh_css_mipi.c | 113 ++--- .../staging/media/atomisp/pci/sh_css_params.c | 470 ++++++++---------- 35 files changed, 392 insertions(+), 915 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp_cmd.c index 98074609e7ec6..5be690f876c11 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp_cmd.c @@ -4797,10 +4797,8 @@ static void __atomisp_update_stream_env(struct atomisp_sub_device *asd, { int i; -#if defined(ISP2401_NEW_INPUT_SYSTEM) /* assign virtual channel id return from sensor driver query */ asd->stream_env[stream_index].ch_id = stream_info->ch_id; -#endif asd->stream_env[stream_index].isys_configs = stream_info->isys_configs; for (i = 0; i < stream_info->isys_configs; i++) { asd->stream_env[stream_index].isys_info[i].input_format = diff --git a/drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c b/drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c index 97670fd9e078f..e39cc21329532 100644 --- a/drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c +++ b/drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c @@ -196,9 +196,7 @@ bool ia_css_refcount_decrement(s32 id, hrt_vaddress ptr) id, ptr, entry, entry->id, entry->count); else IA_CSS_ERROR("entry NULL\n"); -#ifdef ISP2401 assert(false); -#endif return false; } @@ -246,14 +244,13 @@ void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) "ia_css_refcount_clear: using hmm_free: no clear_func\n"); hmm_free(entry->data); } -#ifndef ISP2401 -#else - assert(entry->count == 0); -#endif if (entry->count != 0) { IA_CSS_WARNING("Ref count for entry %x is not zero!", entry->id); } + + assert(entry->count == 0); + entry->data = mmgr_NULL; entry->count = 0; entry->id = 0; diff --git a/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c index e4f42cb75d5d8..c6b07d65ce3e8 100644 --- a/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c +++ b/drivers/staging/media/atomisp/pci/camera/pipe/src/pipe_binarydesc.c @@ -57,10 +57,8 @@ static void pipe_binarydesc_get_offline( descr->enable_dz = true; descr->enable_xnr = false; descr->enable_dpc = false; -#ifdef ISP2401 descr->enable_luma_only = false; descr->enable_tnr = false; -#endif descr->enable_capture_pp_bli = false; descr->enable_fractional_ds = false; descr->dvs_env.width = 0; @@ -391,12 +389,10 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc( pipe->extra_config.enable_fractional_ds; video_descr->enable_dpc = pipe->config.enable_dpc; -#ifdef ISP2401 video_descr->enable_luma_only = pipe->config.enable_luma_only; video_descr->enable_tnr = pipe->config.enable_tnr; -#endif if (pipe->extra_config.enable_raw_binning) { if (pipe->config.bayer_ds_out_res.width != 0 && @@ -603,27 +599,24 @@ void ia_css_pipe_get_primary_binarydesc( prim_descr->isp_pipe_version = pipe->config.isp_pipe_version; prim_descr->enable_fractional_ds = pipe->extra_config.enable_fractional_ds; -#ifdef ISP2401 prim_descr->enable_luma_only = pipe->config.enable_luma_only; -#endif /* We have both striped and non-striped primary binaries, * if continuous viewfinder is required, then we must select * a striped one. Otherwise we prefer to use a non-striped * since it has better performance. */ if (pipe_version == IA_CSS_PIPE_VERSION_2_6_1) prim_descr->striped = false; - else -#ifndef ISP2401 + else if (!atomisp_hw_is_isp2401) { prim_descr->striped = prim_descr->continuous && (!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf); -#else + } else { prim_descr->striped = prim_descr->continuous && !pipe->stream->disable_cont_vf; - if ((pipe->config.default_capture_config.enable_xnr != 0) && - (pipe->extra_config.enable_dvs_6axis == true)) - prim_descr->enable_xnr = true; -#endif + if ((pipe->config.default_capture_config.enable_xnr != 0) && + (pipe->extra_config.enable_dvs_6axis == true)) + prim_descr->enable_xnr = true; + } } IA_CSS_LEAVE_PRIVATE(""); } @@ -855,14 +848,15 @@ void ia_css_pipe_get_ldc_binarydesc( assert(out_info); IA_CSS_ENTER_PRIVATE(""); -#ifndef ISP2401 - *in_info = *out_info; -#else - if (pipe->out_yuv_ds_input_info.res.width) - *in_info = pipe->out_yuv_ds_input_info; - else + if (!atomisp_hw_is_isp2401) { *in_info = *out_info; -#endif + } else { + if (pipe->out_yuv_ds_input_info.res.width) + *in_info = pipe->out_yuv_ds_input_info; + else + *in_info = *out_info; + } + in_info->format = IA_CSS_FRAME_FORMAT_YUV420; in_info->raw_bit_depth = 0; ia_css_frame_info_set_width(in_info, in_info->res.width, 0); diff --git a/drivers/staging/media/atomisp/pci/camera/util/src/util.c b/drivers/staging/media/atomisp/pci/camera/util/src/util.c index f14776f09bbbe..217fe9cb54ffd 100644 --- a/drivers/staging/media/atomisp/pci/camera/util/src/util.c +++ b/drivers/staging/media/atomisp/pci/camera/util/src/util.c @@ -210,11 +210,9 @@ enum ia_css_err ia_css_util_check_input( if (!stream_config) return IA_CSS_ERR_INVALID_ARGUMENTS; -#ifdef IS_ISP_2400_SYSTEM if (stream_config->input_config.effective_res.width == 0 || stream_config->input_config.effective_res.height == 0) return IA_CSS_ERR_INVALID_ARGUMENTS; -#endif if (must_be_raw && !ia_css_util_is_input_format_raw(stream_config->input_config.format)) return IA_CSS_ERR_INVALID_ARGUMENTS; diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c index 461ff18ed0117..9fb37447831ca 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c @@ -19,7 +19,6 @@ #include "ia_css_dp.host.h" -#ifdef ISP2401 /* We use a different set of DPC configuration parameters when * DPC is used before OBC and NORM. Currently these parameters * are used in usecases which selects both BDS and DPC. @@ -32,7 +31,7 @@ const struct ia_css_dp_config default_dp_10bpp_config = { 32768, 32768 }; -#endif + const struct ia_css_dp_config default_dp_config = { 8192, 2048, diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c index 2e438a4de3a64..d2c3e8edf6265 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.c @@ -66,9 +66,6 @@ convert_coords_to_ispparams( unsigned int uv_flag) { unsigned int i, j; -#ifndef ISP2401 - /* Coverity CID 298073 - initialize */ -#endif gdc_warp_param_mem_t s = { 0 }; unsigned int x00, x01, x10, x11, y00, y01, y10, y11; diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c index 2fc0c222a5796..ba490c5fc18eb 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/ipu2_io_ls/yuv444_io_ls/ia_css_yuv444_io.host.c @@ -1,4 +1,3 @@ -#ifdef ISP2401 /* Support for Intel Camera Imaging ISP subsystem. Copyright (c) 2010 - 2015, Intel Corporation. @@ -92,4 +91,3 @@ ia_css_yuv444_io_config( #endif } } -#endif diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c index cfec188681e2e..000cbe600f972 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c @@ -16,12 +16,9 @@ #include "sh_css_defs.h" #include "ia_css_debug.h" #include "assert_support.h" -#ifdef ISP2401 -#include "math_support.h" /* min() */ #define IA_CSS_INCLUDE_CONFIGURATIONS #include "ia_css_isp_configs.h" -#endif #include "ia_css_sc.host.h" @@ -46,7 +43,7 @@ ia_css_sc_dump( "sc_gain_shift", sc->gain_shift); } -#ifdef ISP2401 +/* ISP2401 */ void ia_css_sc_config( struct sh_css_isp_sc_isp_config *to, @@ -70,6 +67,7 @@ ia_css_sc_config( to->internal_frame_origin_y_bqs_on_sctbl = internal_org_y_bqs; } +/* ISP2401 */ void ia_css_sc_configure( const struct ia_css_binary *binary, @@ -84,7 +82,6 @@ ia_css_sc_configure( ia_css_configure_sc(binary, &config); } -#endif /* ------ deprecated(bz675) : from ------ */ /* It looks like @parameter{} (in *.pipe) is used to generate the process/get/set functions, for parameters which should be used in the isp kernels. diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c index e6c4e0fe34f0b..4630cbd495f86 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c @@ -16,9 +16,7 @@ #include "math_support.h" #include "sh_css_defs.h" #include "ia_css_types.h" -#ifdef ISP2401 #include "assert_support.h" -#endif #include "ia_css_xnr3.host.h" /* Maximum value for alpha on ISP interface */ @@ -30,7 +28,6 @@ #define XNR_MIN_SIGMA (IA_CSS_XNR3_SIGMA_SCALE / 100) /* -#ifdef ISP2401 * division look-up table * Refers to XNR3.0.5 */ @@ -79,27 +76,12 @@ static int32_t compute_alpha(int sigma) { s32 alpha; -#if defined(XNR_ATE_ROUNDING_BUG) - s32 alpha_unscaled; -#else int offset = sigma / 2; -#endif + if (sigma < XNR_MIN_SIGMA) { alpha = XNR_MAX_ALPHA; } else { -#if defined(XNR_ATE_ROUNDING_BUG) - /* The scale factor for alpha must be the same as on the ISP, - * For sigma, it must match the public interface. The code - * below mimics the rounding and unintended loss of precision - * of the ATE reference code. It computes an unscaled alpha, - * rounds down, and then scales it to get the required fixed - * point representation. It would have been more precise to - * round after scaling. */ - alpha_unscaled = IA_CSS_XNR3_SIGMA_SCALE / sigma; - alpha = alpha_unscaled * XNR_ALPHA_SCALE_FACTOR; -#else alpha = ((IA_CSS_XNR3_SIGMA_SCALE * XNR_ALPHA_SCALE_FACTOR) + offset) / sigma; -#endif if (alpha > XNR_MAX_ALPHA) alpha = XNR_MAX_ALPHA; @@ -200,7 +182,7 @@ ia_css_xnr3_encode( to->blending.strength = blending; } -#ifdef ISP2401 +/* ISP2401 */ /* (void) = ia_css_xnr3_vmem_encode(*to, *from) * ----------------------------------------------- * VMEM Encode Function to translate UV parameters from userspace into ISP space @@ -256,7 +238,6 @@ ia_css_xnr3_vmem_encode( } } -#endif /* Dummy Function added as the tool expects it*/ void ia_css_xnr3_debug_dtrace( diff --git a/drivers/staging/media/atomisp/pci/isp2400_system_global.h b/drivers/staging/media/atomisp/pci/isp2400_system_global.h index 21938de974b7e..06fce25f20340 100644 --- a/drivers/staging/media/atomisp/pci/isp2400_system_global.h +++ b/drivers/staging/media/atomisp/pci/isp2400_system_global.h @@ -46,7 +46,6 @@ * N.B. the 3 input formatters are of 2 different classess */ -#define IS_ISP_2400_SYSTEM /* * Since this file is visible everywhere and the system definition * macros are not, detect the separate definitions for {host, SP, ISP} diff --git a/drivers/staging/media/atomisp/pci/isp2401_system_global.h b/drivers/staging/media/atomisp/pci/isp2401_system_global.h index 9c948cc175be5..213b6ee522088 100644 --- a/drivers/staging/media/atomisp/pci/isp2401_system_global.h +++ b/drivers/staging/media/atomisp/pci/isp2401_system_global.h @@ -52,7 +52,6 @@ #define USE_INPUT_SYSTEM_VERSION_2401 -#define IS_ISP_2400_SYSTEM /* * Since this file is visible everywhere and the system definition * macros are not, detect the separate definitions for {host, SP, ISP} diff --git a/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c b/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c index f5103813caa0b..2a23b7c6aeebe 100644 --- a/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c +++ b/drivers/staging/media/atomisp/pci/runtime/binary/src/binary.c @@ -27,13 +27,9 @@ #include "sh_css_legacy.h" #include "vf/vf_1.0/ia_css_vf.host.h" -#ifdef ISP2401 #include "sc/sc_1.0/ia_css_sc.host.h" -#endif #include "sdis/sdis_1.0/ia_css_sdis.host.h" -#ifdef ISP2401 #include "fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" /* FRAC_ACC */ -#endif #include "camera/pipe/interface/ia_css_pipe_binarydesc.h" @@ -108,7 +104,7 @@ ia_css_binary_internal_res(const struct ia_css_frame_info *in_info, binary_dvs_env.height); } -#ifndef ISP2401 +/* ISP2400 */ /* Computation results of the origin coordinate of bayer on the shading table. */ struct sh_css_shading_table_bayer_origin_compute_results { u32 bayer_scale_hor_ratio_in; /* Horizontal ratio (in) of bayer scaling. */ @@ -117,7 +113,9 @@ struct sh_css_shading_table_bayer_origin_compute_results { u32 bayer_scale_ver_ratio_out; /* Vertical ratio (out) of bayer scaling. */ u32 sc_bayer_origin_x_bqs_on_shading_table; /* X coordinate (in bqs) of bayer origin on shading table. */ u32 sc_bayer_origin_y_bqs_on_shading_table; /* Y coordinate (in bqs) of bayer origin on shading table. */ -#else +}; + +/* ISP2401 */ /* Requirements for the shading correction. */ struct sh_css_binary_sc_requirements { /* Bayer scaling factor, for the scaling which is applied before shading correction. */ @@ -131,7 +129,6 @@ struct sh_css_binary_sc_requirements { at shading correction. */ u32 sensor_data_origin_y_bqs_on_internal; /* Y origin (in bqs) of sensor data on internal frame at shading correction. */ -#endif }; /* Get the requirements for the shading correction. */ diff --git a/drivers/staging/media/atomisp/pci/runtime/bufq/src/bufq.c b/drivers/staging/media/atomisp/pci/runtime/bufq/src/bufq.c index 87ce18f8267ec..7e01df257150b 100644 --- a/drivers/staging/media/atomisp/pci/runtime/bufq/src/bufq.c +++ b/drivers/staging/media/atomisp/pci/runtime/bufq/src/bufq.c @@ -33,8 +33,6 @@ static char prefix[BUFQ_DUMP_FILE_NAME_PREFIX_SIZE] = {0}; /* Global Queue objects used by CSS */ /*********************************************************/ -#ifndef ISP2401 - struct sh_css_queues { /* Host2SP buffer queue */ ia_css_queue_t host2sp_buffer_queue_handles @@ -60,36 +58,6 @@ struct sh_css_queues { ia_css_queue_t host2sp_tag_cmd_queue_handle; }; -#else - -struct sh_css_queues { - /* Host2SP buffer queue */ - ia_css_queue_t host2sp_buffer_queue_handles - [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]; - /* SP2Host buffer queue */ - ia_css_queue_t sp2host_buffer_queue_handles - [SH_CSS_MAX_NUM_QUEUES]; - - /* Host2SP event queue */ - ia_css_queue_t host2sp_psys_event_queue_handle; - - /* SP2Host event queue */ - ia_css_queue_t sp2host_psys_event_queue_handle; - -#if !defined(HAS_NO_INPUT_SYSTEM) - /* Host2SP ISYS event queue */ - ia_css_queue_t host2sp_isys_event_queue_handle; - - /* SP2Host ISYS event queue */ - ia_css_queue_t sp2host_isys_event_queue_handle; - - /* Tagger command queue */ - ia_css_queue_t host2sp_tag_cmd_queue_handle; -#endif -}; - -#endif - /******************************************************* *** Static variables ********************************************************/ diff --git a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c index da0df52896f3f..3d7b0242cf534 100644 --- a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c @@ -39,9 +39,8 @@ #include "ia_css_isp_param.h" #include "sh_css_params.h" #include "ia_css_bufq.h" -#ifdef ISP2401 +/* ISP2401 */ #include "ia_css_queue.h" -#endif #include "ia_css_isp_params.h" @@ -3100,10 +3099,11 @@ ia_css_debug_dump_pipe_config( ia_css_debug_dump_resolution(&config->capt_pp_in_res, "capt_pp_in_res"); ia_css_debug_dump_resolution(&config->vf_pp_in_res, "vf_pp_in_res"); -#ifdef ISP2401 - ia_css_debug_dump_resolution(&config->output_system_in_res, - "output_system_in_res"); -#endif + + if (atomisp_hw_is_isp2401) { + ia_css_debug_dump_resolution(&config->output_system_in_res, + "output_system_in_res"); + } ia_css_debug_dump_resolution(&config->dvs_crop_out_res, "dvs_crop_out_res"); for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { @@ -3295,10 +3295,8 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) int i, j, max_trace_points, point_num, limit = -1; /* using a static buffer here as the driver has issues allocating memory */ static u32 trace_read_buf[TRACE_BUFF_SIZE] = {0}; -#ifdef ISP2401 static struct trace_header_t header; u8 *header_arr; -#endif /* read the header and parse it */ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "~~~ Tracer "); @@ -3329,27 +3327,27 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) "\t\ttraces are not supported for this processor ID - exiting\n"); return; } -#ifndef ISP2401 - tmp = ia_css_device_load_uint32(start_addr); - point_num = (tmp >> 16) & 0xFFFF; -#endif -#ifndef ISP2401 - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", tmp & 0xFF, - point_num); - if ((tmp & 0xFF) != TRACER_VER) { -#else - /* Loading byte-by-byte as using the master routine had issues */ - header_arr = (uint8_t *)&header; - for (i = 0; i < (int)sizeof(struct trace_header_t); i++) - header_arr[i] = ia_css_device_load_uint8(start_addr + (i)); + if (!atomisp_hw_is_isp2401) { + tmp = ia_css_device_load_uint32(start_addr); + point_num = (tmp >> 16) & 0xFFFF; + + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", tmp & 0xFF, + point_num); + } else { + /* Loading byte-by-byte as using the master routine had issues */ + header_arr = (uint8_t *)&header; + for (i = 0; i < (int)sizeof(struct trace_header_t); i++) + header_arr[i] = ia_css_device_load_uint8(start_addr + (i)); - point_num = header.max_tracer_points; + point_num = header.max_tracer_points; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", header.version, - point_num); - if ((header.version & 0xFF) != TRACER_VER) { -#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", header.version, + point_num); + + tmp = header.version; + } + if ((tmp & 0xFF) != TRACER_VER) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tUnknown version - exiting\n"); return; } @@ -3364,21 +3362,20 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) if ((limit == (-1)) && (trace_read_buf[i] == 0)) limit = i; } -#ifdef ISP2401 - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Status:\n"); - for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "\tT%d: %3d (%02x) %6d (%04x) %10d (%08x)\n", i, - header.thr_status_byte[i], header.thr_status_byte[i], - header.thr_status_word[i], header.thr_status_word[i], - header.thr_status_dword[i], header.thr_status_dword[i]); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Scratch:\n"); - for (i = 0; i < MAX_SCRATCH_DATA; i++) - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%10d (%08x) ", - header.scratch_debug[i], header.scratch_debug[i]); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\n"); - -#endif + if (atomisp_hw_is_isp2401) { + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Status:\n"); + for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "\tT%d: %3d (%02x) %6d (%04x) %10d (%08x)\n", i, + header.thr_status_byte[i], header.thr_status_byte[i], + header.thr_status_word[i], header.thr_status_word[i], + header.thr_status_dword[i], header.thr_status_dword[i]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Scratch:\n"); + for (i = 0; i < MAX_SCRATCH_DATA; i++) + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%10d (%08x) ", + header.scratch_debug[i], header.scratch_debug[i]); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\n"); + } /* two 0s in the beginning: empty buffer */ if ((trace_read_buf[0] == 0) && (trace_read_buf[1] == 0)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tEmpty tracer - exiting\n"); @@ -3398,114 +3395,83 @@ static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) for (i = 0; i < point_num; i++) { j = (limit + i) % point_num; if (trace_read_buf[j]) { -#ifndef ISP2401 - TRACE_DUMP_FORMAT dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); -#else - - tid_val = FIELD_TID_UNPACK(trace_read_buf[j]); - dump_format = TRACE_DUMP_FORMAT_POINT; - - /* - * When tid value is 111b, the data will be interpreted differently: - * tid val is ignored, major field contains 2 bits (msb) for format type - */ - if (tid_val == FIELD_TID_SEL_FORMAT_PAT) { - dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); + if (!atomisp_hw_is_isp2401) { + TRACE_DUMP_FORMAT dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); + } else { + tid_val = FIELD_TID_UNPACK(trace_read_buf[j]); + dump_format = TRACE_DUMP_FORMAT_POINT; + + /* + * When tid value is 111b, the data will be interpreted differently: + * tid val is ignored, major field contains 2 bits (msb) for format type + */ + if (tid_val == FIELD_TID_SEL_FORMAT_PAT) { + dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); + } } -#endif switch (dump_format) { case TRACE_DUMP_FORMAT_POINT: ia_css_debug_dtrace( -#ifndef ISP2401 IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %d\n", j, FIELD_MAJOR_UNPACK(trace_read_buf[j]), -#else - IA_CSS_DEBUG_TRACE, "\t\t%d T%d %d:%d value - %x (%d)\n", - j, - tid_val, - FIELD_MAJOR_UNPACK(trace_read_buf[j]), -#endif FIELD_MINOR_UNPACK(trace_read_buf[j]), -#ifdef ISP2401 - FIELD_VALUE_UNPACK(trace_read_buf[j]), -#endif FIELD_VALUE_UNPACK(trace_read_buf[j])); break; -#ifndef ISP2401 + /* ISP2400 */ case TRACE_DUMP_FORMAT_VALUE24_HEX: -#else - case TRACE_DUMP_FORMAT_POINT_NO_TID: -#endif ia_css_debug_dtrace( -#ifndef ISP2401 IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x H\n", -#else - IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %x (%d)\n", -#endif j, -#ifndef ISP2401 FIELD_MAJOR_UNPACK(trace_read_buf[j]), FIELD_VALUE_24_UNPACK(trace_read_buf[j])); -#else + break; + /* ISP2400 */ + case TRACE_DUMP_FORMAT_VALUE24_DEC: + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %d D\n", + j, + FIELD_MAJOR_UNPACK(trace_read_buf[j]), + FIELD_VALUE_24_UNPACK(trace_read_buf[j])); + break; + /* ISP2401 */ + case TRACE_DUMP_FORMAT_POINT_NO_TID: + ia_css_debug_dtrace( + IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %x (%d)\n", + j, FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), FIELD_MINOR_UNPACK(trace_read_buf[j]), FIELD_VALUE_UNPACK(trace_read_buf[j]), FIELD_VALUE_UNPACK(trace_read_buf[j])); -#endif break; -#ifndef ISP2401 - case TRACE_DUMP_FORMAT_VALUE24_DEC: -#else + /* ISP2401 */ case TRACE_DUMP_FORMAT_VALUE24: -#endif ia_css_debug_dtrace( -#ifndef ISP2401 - IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %d D\n", -#else IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x (%d)\n", -#endif j, FIELD_MAJOR_UNPACK(trace_read_buf[j]), -#ifdef ISP2401 FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), FIELD_VALUE_24_UNPACK(trace_read_buf[j]), -#endif FIELD_VALUE_24_UNPACK(trace_read_buf[j])); break; -#ifdef ISP2401 - -#endif case TRACE_DUMP_FORMAT_VALUE24_TIMING: ia_css_debug_dtrace( IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing %x\n", j, -#ifndef ISP2401 FIELD_MAJOR_UNPACK(trace_read_buf[j]), -#else - FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), -#endif FIELD_VALUE_24_UNPACK(trace_read_buf[j])); break; case TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA: ia_css_debug_dtrace( IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing delta %x\n", j, -#ifndef ISP2401 FIELD_MAJOR_UNPACK(trace_read_buf[j]), -#else - FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), -#endif FIELD_VALUE_24_UNPACK(trace_read_buf[j])); break; default: ia_css_debug_dtrace( IA_CSS_DEBUG_TRACE, "no such trace dump format %d", -#ifndef ISP2401 - FIELD_FORMAT_UNPACK(trace_read_buf[j])); -#else dump_format); -#endif break; } } @@ -3557,7 +3523,7 @@ void ia_css_debug_tagger_state(void) } #endif /* defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) */ -#ifdef ISP2401 +/* ISP2401 */ void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps) { unsigned int pc; @@ -3572,7 +3538,6 @@ void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d PC: 0x%X\n", id, pc); } } -#endif #if defined(HRT_SCHED) || defined(SH_CSS_DEBUG_SPMEM_DUMP_SUPPORT) #include "spmem_dump.c" diff --git a/drivers/staging/media/atomisp/pci/runtime/event/src/event.c b/drivers/staging/media/atomisp/pci/runtime/event/src/event.c index 74ad5f3d5d0e0..c4578470ad8cc 100644 --- a/drivers/staging/media/atomisp/pci/runtime/event/src/event.c +++ b/drivers/staging/media/atomisp/pci/runtime/event/src/event.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "sh_css_sp.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c b/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c index ab4ca17f05746..fcd8b06034f28 100644 --- a/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c +++ b/drivers/staging/media/atomisp/pci/runtime/frame/src/frame.c @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "ia_css_frame.h" #include @@ -146,21 +130,12 @@ enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, return IA_CSS_ERR_INVALID_ARGUMENTS; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, -#ifndef ISP2401 - "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d\n", - width, height, format); -#else "ia_css_frame_allocate() enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", width, height, format, padded_width, raw_bit_depth); -#endif err = frame_allocate_with_data(frame, width, height, format, padded_width, raw_bit_depth, false); -#ifndef ISP2401 - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_allocate() leave: frame=%p\n", *frame); -#else if ((*frame) && err == IA_CSS_SUCCESS) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", *frame, @@ -169,7 +144,6 @@ enum ia_css_err ia_css_frame_allocate(struct ia_css_frame **frame, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_allocate() leave: frame=%p, data(DDR address)=0x%x\n", (void *)-1, (unsigned int)-1); -#endif return err; } @@ -202,11 +176,7 @@ enum ia_css_err ia_css_frame_map(struct ia_css_frame **frame, if (err != IA_CSS_SUCCESS) { sh_css_free(me); -#ifndef ISP2401 - return err; -#else me = NULL; -#endif } *frame = me; @@ -243,25 +213,17 @@ enum ia_css_err ia_css_frame_create_from_info(struct ia_css_frame **frame, err = ia_css_frame_init_planes(me); -#ifndef ISP2401 - if (err == IA_CSS_SUCCESS) - *frame = me; - else -#else if (err != IA_CSS_SUCCESS) { -#endif sh_css_free(me); -#ifdef ISP2401 - me = NULL; -} + me = NULL; + } -*frame = me; -#endif + *frame = me; -ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_frame_create_from_info() leave:\n"); + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, + "ia_css_frame_create_from_info() leave:\n"); -return err; + return err; } enum ia_css_err ia_css_frame_set_data(struct ia_css_frame *frame, @@ -306,13 +268,8 @@ enum ia_css_err ia_css_frame_allocate_contiguous(struct ia_css_frame **frame, ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_frame_allocate_contiguous() " -#ifndef ISP2401 - "enter: width=%d, height=%d, format=%d\n", - width, height, format); -#else "enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n", width, height, format, padded_width, raw_bit_depth); -#endif err = frame_allocate_with_data(frame, width, height, format, padded_width, raw_bit_depth, true); @@ -581,11 +538,7 @@ enum ia_css_err ia_css_frame_allocate_with_buffer_size( if (err != IA_CSS_SUCCESS) { sh_css_free(me); -#ifndef ISP2401 - return err; -#else me = NULL; -#endif } *frame = me; @@ -965,8 +918,7 @@ void ia_css_resolution_to_sp_resolution( to->height = (uint16_t)from->height; } -#ifdef ISP2401 - +/* ISP2401 */ enum ia_css_err ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, const struct ia_css_resolution *out_res, @@ -1035,4 +987,3 @@ ia_css_frame_find_crop_resolution(const struct ia_css_resolution *in_res, crop_res->height, out_res->width, out_res->height); return IA_CSS_SUCCESS; } -#endif diff --git a/drivers/staging/media/atomisp/pci/runtime/ifmtr/src/ifmtr.c b/drivers/staging/media/atomisp/pci/runtime/ifmtr/src/ifmtr.c index cf55a01b20343..7a18eae8c638b 100644 --- a/drivers/staging/media/atomisp/pci/runtime/ifmtr/src/ifmtr.c +++ b/drivers/staging/media/atomisp/pci/runtime/ifmtr/src/ifmtr.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "system_global.h" #include @@ -492,10 +476,6 @@ static void ifmtr_set_if_blocking_mode( assert(N_INPUT_FORMATTER_ID <= (ARRAY_SIZE(block))); -#if !defined(IS_ISP_2400_SYSTEM) -#error "ifmtr_set_if_blocking_mode: ISP_SYSTEM must be one of {IS_ISP_2400_SYSTEM}" -#endif - block[INPUT_FORMATTER0_ID] = (bool)config_a->block_no_reqs; if (config_b) block[INPUT_FORMATTER1_ID] = (bool)config_b->block_no_reqs; diff --git a/drivers/staging/media/atomisp/pci/runtime/inputfifo/src/inputfifo.c b/drivers/staging/media/atomisp/pci/runtime/inputfifo/src/inputfifo.c index 57efa4055f5f7..e5a339fb52f2d 100644 --- a/drivers/staging/media/atomisp/pci/runtime/inputfifo/src/inputfifo.c +++ b/drivers/staging/media/atomisp/pci/runtime/inputfifo/src/inputfifo.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "platform_support.h" @@ -195,38 +179,6 @@ static void inputfifo_send_eof(void) return; } -#ifdef __ON__ -static void inputfifo_send_ch_id( - /* static inline void inputfifo_send_ch_id( */ - unsigned int ch_id) -{ - hrt_data token; - - inputfifo_curr_ch_id = ch_id & _HIVE_ISP_CH_ID_MASK; - /* we send an zero marker, this will wrap the ch_id and - * fmt_type automatically. - */ - token = inputfifo_wrap_marker(0); - _sh_css_fifo_snd(token); - return; -} - -static void inputfifo_send_fmt_type( - /* static inline void inputfifo_send_fmt_type( */ - unsigned int fmt_type) -{ - hrt_data token; - - inputfifo_curr_fmt_type = fmt_type & _HIVE_ISP_FMT_TYPE_MASK; - /* we send an zero marker, this will wrap the ch_id and - * fmt_type automatically. - */ - token = inputfifo_wrap_marker(0); - _sh_css_fifo_snd(token); - return; -} -#endif /* __ON__ */ - static void inputfifo_send_ch_id_and_fmt_type( /* static inline void inputfifo_send_ch_id_and_fmt_type( */ diff --git a/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c b/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c index cab82a9698b2a..443e412d05ad5 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c +++ b/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "memory_access.h" #include "ia_css_pipeline.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.c index 06557c16071f4..8f2ce2c057eba 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/csi_rx_rmgr.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "system_global.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.c index 72804774ea23c..9055ed3876736 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/ibuf_ctrl_rmgr.c @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -12,26 +11,9 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2010 - 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ -#endif #include "system_global.h" -#ifdef USE_INPUT_SYSTEM_VERSION_2401 - #include "assert_support.h" #include "platform_support.h" #include "ia_css_isys.h" @@ -137,4 +119,3 @@ void ia_css_isys_ibuf_rmgr_release( } } } -#endif diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.c index 8ce21091c81d9..930fa7a0ff53e 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_dma_rmgr.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "system_global.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_init.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_init.c index 5e7565cdf871b..b923233ec5b05 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_init.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_init.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "input_system.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.c index 44b9bb84981c5..53355a55d05d2 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/isys_stream2mmio_rmgr.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "system_global.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c index cf0a6866e25a1..43665ddff8ea4 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #define __INLINE_INPUT_SYSTEM__ #include "input_system.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c index ceef7d0482327..9a795a21d3e6e 100644 --- a/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c +++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/virtual_isys.c @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "system_global.h" @@ -45,9 +29,7 @@ more details. * Forwarded Declaration * *************************************************/ -#ifndef ISP2401 -#endif static bool create_input_system_channel( input_system_cfg_t *cfg, bool metadata, diff --git a/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c b/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c index f6f364ee78987..8b9982de8deb9 100644 --- a/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c +++ b/drivers/staging/media/atomisp/pci/runtime/pipeline/src/pipeline.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "ia_css_debug.h" #include "sw_event_global.h" /* encode_sw_event */ diff --git a/drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.c b/drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.c index 3b2a06655e99b..1e8d3eb82eab2 100644 --- a/drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.c +++ b/drivers/staging/media/atomisp/pci/runtime/queue/src/queue_access.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "type_support.h" #include "queue_access.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr.c b/drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr.c index 370ff3816dbe0..23ae19ee65cae 100644 --- a/drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr.c +++ b/drivers/staging/media/atomisp/pci/runtime/rmgr/src/rmgr.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "ia_css_rmgr.h" diff --git a/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c b/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c index c4093945973c4..ceaac8235b4bc 100644 --- a/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c +++ b/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c @@ -1,7 +1,6 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2010 - 2015, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include "ia_css_types.h" #define __INLINE_SP__ @@ -115,7 +99,7 @@ enum ia_css_err ia_css_spctrl_load_fw(sp_ID_t sp_id, return IA_CSS_SUCCESS; } -#ifdef ISP2401 +/* ISP2401 */ /* reload pre-loaded FW */ void sh_css_spctrl_reload_fw(sp_ID_t sp_id) { @@ -127,7 +111,6 @@ void sh_css_spctrl_reload_fw(sp_ID_t sp_id) sp_ctrl_setbit(sp_id, SP_ICACHE_INV_REG, SP_ICACHE_INV_BIT); spctrl_loaded[sp_id] = true; } -#endif hrt_vaddress get_sp_code_addr(sp_ID_t sp_id) { diff --git a/drivers/staging/media/atomisp/pci/runtime/timer/src/timer.c b/drivers/staging/media/atomisp/pci/runtime/timer/src/timer.c index fe1e53085cbee..57dddd74d6689 100644 --- a/drivers/staging/media/atomisp/pci/runtime/timer/src/timer.c +++ b/drivers/staging/media/atomisp/pci/runtime/timer/src/timer.c @@ -1,4 +1,3 @@ -#ifndef ISP2401 /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -12,21 +11,6 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ -#else -/* -Support for Intel Camera Imaging ISP subsystem. -Copyright (c) 2010 - 2015, Intel Corporation. - -This program is free software; you can redistribute it and/or modify it -under the terms and conditions of the GNU General Public License, -version 2, as published by the Free Software Foundation. - -This program is distributed in the hope it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. -*/ -#endif #include /* for uint32_t */ #include "ia_css_timer.h" /*struct ia_css_clock_tick */ diff --git a/drivers/staging/media/atomisp/pci/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c index 46a5e6ed7d29a..27cbc57846bbb 100644 --- a/drivers/staging/media/atomisp/pci/sh_css.c +++ b/drivers/staging/media/atomisp/pci/sh_css.c @@ -580,13 +580,11 @@ sh_css_config_input_network(struct ia_css_stream *stream) { vblank_cycles = vblank_lines * (width + hblank_cycles); sh_css_sp_configure_sync_gen(width, height, hblank_cycles, vblank_cycles); -#if defined(IS_ISP_2400_SYSTEM) if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) { /* TODO: move define to proper file in tools */ #define GP_ISEL_TPG_MODE 0x90058 ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); } -#endif } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_config_input_network() leave:\n"); diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/sh_css_firmware.c index b0b8c2c4a227e..fd2cefdec15d5 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.c @@ -52,12 +52,8 @@ static struct firmware_header *firmware_header; /* The string STR is a place holder * which will be replaced with the actual RELEASE_VERSION * during package generation. Please do not modify */ -#ifndef ISP2401 -static const char *release_version = STR( - irci_stable_candrpv_0415_20150521_0458); -#else -static const char *release_version = STR(irci_ecr - master_20150911_0724); -#endif +static const char *isp2400_release_version = STR(irci_stable_candrpv_0415_20150521_0458); +static const char *isp2401_release_version = STR(irci_ecr - master_20150911_0724); #define MAX_FW_REL_VER_NAME 300 static char FW_rel_ver_name[MAX_FW_REL_VER_NAME] = "---"; @@ -189,6 +185,13 @@ sh_css_check_firmware_version(const char *fw_data) { struct sh_css_fw_bi_file_h *file_header; + const char *release_version; + + if (!atomisp_hw_is_isp2401) + release_version = isp2400_release_version; + else + release_version = isp2401_release_version; + firmware_header = (struct firmware_header *)fw_data; file_header = &firmware_header->file_header; @@ -207,21 +210,23 @@ sh_css_load_firmware(const char *fw_data, struct ia_css_fw_info *binaries; struct sh_css_fw_bi_file_h *file_header; bool valid_firmware = false; + const char *release_version; + + if (!atomisp_hw_is_isp2401) + release_version = isp2400_release_version; + else + release_version = isp2401_release_version; firmware_header = (struct firmware_header *)fw_data; file_header = &firmware_header->file_header; binaries = &firmware_header->binary_header; strncpy(FW_rel_ver_name, file_header->version, min(sizeof(FW_rel_ver_name), sizeof(file_header->version)) - 1); valid_firmware = sh_css_check_firmware_version(fw_data); - if (!valid_firmware) - { -#if !defined(HRT_RTL) + if (!valid_firmware) { IA_CSS_ERROR("CSS code version (%s) and firmware version (%s) mismatch!", file_header->version, release_version); return IA_CSS_ERR_VERSION_MISMATCH; -#endif - } else - { + } else { IA_CSS_LOG("successfully load firmware version %s", release_version); } @@ -241,8 +246,7 @@ sh_css_load_firmware(const char *fw_data, sizeof(*sh_css_blob_info), GFP_KERNEL); if (!sh_css_blob_info) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; - } else - { + } else { sh_css_blob_info = NULL; } diff --git a/drivers/staging/media/atomisp/pci/sh_css_mipi.c b/drivers/staging/media/atomisp/pci/sh_css_mipi.c index ef9360d72b04e..35cbef5f9f714 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_mipi.c +++ b/drivers/staging/media/atomisp/pci/sh_css_mipi.c @@ -45,8 +45,6 @@ ia_css_mipi_frame_specify(const unsigned int size_mem_words, return err; } -#ifdef ISP2401 -#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) /* * Check if a source port or TPG/PRBS ID is valid */ @@ -87,9 +85,7 @@ static bool ia_css_mipi_is_source_port_valid(struct ia_css_pipe *pipe, return ret; } -#endif -#endif /* Assumptions: * - A line is multiple of 4 bytes = 1 word. * - Each frame has SOF and EOF (each 1 word). @@ -317,10 +313,8 @@ calculate_mipi_buff_size( enum ia_css_err err = IA_CSS_SUCCESS; /** -#ifndef ISP2401 * zhengjie.lu@intel.com * -#endif * NOTE * - In the struct "ia_css_stream_config", there * are two members: "input_config" and "isys_config". @@ -336,10 +330,8 @@ calculate_mipi_buff_size( /* end of NOTE */ /** -#ifndef ISP2401 * zhengjie.lu@intel.com * -#endif * NOTE * - The following code is derived from the * existing code "ia_css_mipi_frame_calculate_size()". @@ -396,16 +388,29 @@ calculate_mipi_buff_size( return err; } +static bool buffers_needed(struct ia_css_pipe *pipe) +{ + if (!atomisp_hw_is_isp2401) { + if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR) + return false; + else + return true; + } + + if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || + pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS) + return false; + + return true; +} + enum ia_css_err allocate_mipi_frames(struct ia_css_pipe *pipe, struct ia_css_stream_info *info) { #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; -#ifndef ISP2401 unsigned int port; -#else - unsigned int port = 0; -#endif struct ia_css_frame_info mipi_intermediate_info; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, @@ -431,30 +436,22 @@ allocate_mipi_frames(struct ia_css_pipe *pipe, } #endif -#ifndef ISP2401 - if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - { -#else - if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) - { -#endif + + if (!buffers_needed(pipe)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "allocate_mipi_frames(%p) exit: no buffers needed for pipe mode.\n", pipe); return IA_CSS_SUCCESS; /* AM TODO: Check */ } -#ifndef ISP2401 - port = (unsigned int)pipe->stream->config.source.port.port; + if (!atomisp_hw_is_isp2401) + port = (unsigned int)pipe->stream->config.source.port.port; + else + err = ia_css_mipi_is_source_port_valid(pipe, &port); + assert(port < N_CSI_PORTS); - if (port >= N_CSI_PORTS) - { -#else - if (!ia_css_mipi_is_source_port_valid(pipe, &port)) - { -#endif + + if (port >= N_CSI_PORTS || err) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "allocate_mipi_frames(%p) exit: error: port is not correct (port=%d).\n", pipe, port); @@ -573,11 +570,8 @@ enum ia_css_err free_mipi_frames(struct ia_css_pipe *pipe) { #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) enum ia_css_err err = IA_CSS_ERR_INTERNAL_ERROR; -#ifndef ISP2401 unsigned int port; -#else - unsigned int port = 0; -#endif + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "free_mipi_frames(%p) enter:\n", pipe); @@ -592,38 +586,27 @@ free_mipi_frames(struct ia_css_pipe *pipe) { return IA_CSS_ERR_INVALID_ARGUMENTS; } -#ifndef ISP2401 - if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) { -#else - if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) { -#endif + if (!buffers_needed(pipe)) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "free_mipi_frames(%p) exit: error: wrong mode.\n", pipe); return err; } -#ifndef ISP2401 - port = (unsigned int)pipe->stream->config.source.port.port; + if (!atomisp_hw_is_isp2401) + port = (unsigned int)pipe->stream->config.source.port.port; + else + err = ia_css_mipi_is_source_port_valid(pipe, &port); + assert(port < N_CSI_PORTS); - if (port >= N_CSI_PORTS) { -#else - if (!ia_css_mipi_is_source_port_valid(pipe, &port)) { -#endif + + if (port >= N_CSI_PORTS || err) { ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, -#ifndef ISP2401 "free_mipi_frames(%p, %d) exit: error: pipe port is not correct.\n", -#else - "free_mipi_frames(%p) exit: error: pipe port is not correct (port=%d).\n", -#endif pipe, port); return err; } -#ifdef ISP2401 -#endif if (ref_count_mipi_allocation[port] > 0) { #if defined(USE_INPUT_SYSTEM_VERSION_2) assert(ref_count_mipi_allocation[port] == 1); @@ -720,32 +703,22 @@ send_mipi_frames(struct ia_css_pipe *pipe) { /* multi stream video needs mipi buffers */ /* nothing to be done in other cases. */ -#ifndef ISP2401 - if (pipe->stream->config.mode != IA_CSS_INPUT_MODE_BUFFERED_SENSOR) - { -#else - if (!(pipe->stream->config.mode == IA_CSS_INPUT_MODE_BUFFERED_SENSOR || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG || - pipe->stream->config.mode == IA_CSS_INPUT_MODE_PRBS)) - { -#endif + if (!buffers_needed(pipe)) { IA_CSS_LOG("nothing to be done for this mode"); return IA_CSS_SUCCESS; /* TODO: AM: maybe this should be returning an error. */ } -#ifndef ISP2401 - port = (unsigned int)pipe->stream->config.source.port.port; + if (!atomisp_hw_is_isp2401) + port = (unsigned int)pipe->stream->config.source.port.port; + else + err = ia_css_mipi_is_source_port_valid(pipe, &port); + assert(port < N_CSI_PORTS); - if (port >= N_CSI_PORTS) - { - IA_CSS_ERROR("invalid port specified (%d)", port); -#else - if (!ia_css_mipi_is_source_port_valid(pipe, &port)) - { + + if (port >= N_CSI_PORTS || err) { IA_CSS_ERROR("send_mipi_frames(%p) exit: invalid port specified (port=%d).\n", pipe, port); -#endif return err; } diff --git a/drivers/staging/media/atomisp/pci/sh_css_params.c b/drivers/staging/media/atomisp/pci/sh_css_params.c index baa5259bcf917..2e719f7db89e1 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_params.c +++ b/drivers/staging/media/atomisp/pci/sh_css_params.c @@ -111,21 +111,15 @@ (sizeof(char) * (binary)->in_frame_info.res.height * \ (binary)->in_frame_info.padded_width) -#ifndef ISP2401 - -#define SCTBL_BYTES(binary) \ +#define ISP2400_SCTBL_BYTES(binary) \ (sizeof(unsigned short) * (binary)->sctbl_height * \ (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) -#else - -#define SCTBL_BYTES(binary) \ +#define ISP2401_SCTBL_BYTES(binary) \ (sizeof(unsigned short) * max((binary)->sctbl_height, (binary)->sctbl_legacy_height) * \ /* height should be the larger height between new api and legacy api */ \ (binary)->sctbl_aligned_width_per_color * IA_CSS_SC_NUM_COLORS) -#endif - #define MORPH_PLANE_BYTES(binary) \ (SH_CSS_MORPH_TABLE_ELEM_BYTES * (binary)->morph_tbl_aligned_width * \ (binary)->morph_tbl_height) @@ -2166,20 +2160,21 @@ ia_css_set_param_exceptions(const struct ia_css_pipe *pipe, params->dp_config.r = params->wb_config.r; params->dp_config.b = params->wb_config.b; params->dp_config.gb = params->wb_config.gb; -#ifdef ISP2401 - assert(pipe); - assert(pipe->mode < IA_CSS_PIPE_ID_NUM); - if (pipe->mode < IA_CSS_PIPE_ID_NUM) { - params->pipe_dp_config[pipe->mode].gr = params->wb_config.gr; - params->pipe_dp_config[pipe->mode].r = params->wb_config.r; - params->pipe_dp_config[pipe->mode].b = params->wb_config.b; - params->pipe_dp_config[pipe->mode].gb = params->wb_config.gb; + if (atomisp_hw_is_isp2401) { + assert(pipe); + assert(pipe->mode < IA_CSS_PIPE_ID_NUM); + + if (pipe->mode < IA_CSS_PIPE_ID_NUM) { + params->pipe_dp_config[pipe->mode].gr = params->wb_config.gr; + params->pipe_dp_config[pipe->mode].r = params->wb_config.r; + params->pipe_dp_config[pipe->mode].b = params->wb_config.b; + params->pipe_dp_config[pipe->mode].gb = params->wb_config.gb; + } } -#endif } -#ifdef ISP2401 +/* ISP2401 */ static void sh_css_set_dp_config(const struct ia_css_pipe *pipe, struct ia_css_isp_parameters *params, @@ -2200,7 +2195,6 @@ sh_css_set_dp_config(const struct ia_css_pipe *pipe, } IA_CSS_LEAVE_PRIVATE("void"); } -#endif static void sh_css_get_dp_config(const struct ia_css_pipe *pipe, @@ -2630,15 +2624,16 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, params->output_frame = config->output_frame; params->isp_parameters_id = config->isp_config_id; -#ifdef ISP2401 + /* Currently we do not offer CSS interface to set different * configurations for DPC, i.e. depending on DPC being enabled * before (NORM+OBC) or after. The folllowing code to set the * DPC configuration should be updated when this interface is made * available */ - sh_css_set_dp_config(pipe, params, config->dp_config); - ia_css_set_param_exceptions(pipe, params); -#endif + if (atomisp_hw_is_isp2401) { + sh_css_set_dp_config(pipe, params, config->dp_config); + ia_css_set_param_exceptions(pipe, params); + } if (IA_CSS_SUCCESS == sh_css_select_dp_10bpp_config(pipe, &is_dp_10bpp)) @@ -2656,9 +2651,9 @@ sh_css_init_isp_params_from_config(struct ia_css_pipe *pipe, goto exit; } -#ifndef ISP2401 - ia_css_set_param_exceptions(pipe, params); -#endif + if (!atomisp_hw_is_isp2401) + ia_css_set_param_exceptions(pipe, params); + exit: IA_CSS_LEAVE_ERR_PRIVATE(err); return err; @@ -3072,31 +3067,31 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, ia_css_set_tnr_config(params, &default_tnr_config); ia_css_set_ob_config(params, &default_ob_config); ia_css_set_dp_config(params, &default_dp_config); -#ifndef ISP2401 - ia_css_set_param_exceptions(pipe_in, params); -#else - for (i = 0; i < stream->num_pipes; i++) { - if (sh_css_select_dp_10bpp_config(stream->pipes[i], - &is_dp_10bpp) == IA_CSS_SUCCESS) { - /* set the return value as false if both DPC and - * BDS is enabled by the user. But we do not return - * the value immediately to enable internal firmware - * feature testing. */ - if (is_dp_10bpp) { - sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); + if (!atomisp_hw_is_isp2401) { + ia_css_set_param_exceptions(pipe_in, params); + } else { + for (i = 0; i < stream->num_pipes; i++) { + if (sh_css_select_dp_10bpp_config(stream->pipes[i], + &is_dp_10bpp) == IA_CSS_SUCCESS) { + /* set the return value as false if both DPC and + * BDS is enabled by the user. But we do not return + * the value immediately to enable internal firmware + * feature testing. */ + if (is_dp_10bpp) { + sh_css_set_dp_config(stream->pipes[i], params, &default_dp_10bpp_config); + } else { + sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); + } } else { - sh_css_set_dp_config(stream->pipes[i], params, &default_dp_config); + retval = false; + goto exit; } - } else { - retval = false; - goto exit; - } - ia_css_set_param_exceptions(stream->pipes[i], params); + ia_css_set_param_exceptions(stream->pipes[i], params); + } } -#endif ia_css_set_de_config(params, &default_de_config); ia_css_set_gc_config(params, &default_gc_config); ia_css_set_anr_config(params, &default_anr_config); @@ -3191,31 +3186,30 @@ sh_css_init_isp_params_from_global(struct ia_css_stream *stream, * BDS is enabled by the user. But we do not return * the value immediately to enable internal firmware * feature testing. */ -#ifndef ISP2401 - retval = !is_dp_10bpp; -#else + if (is_dp_10bpp) { retval = false; + /* FIXME: should it ignore this error? */ } } else { retval = false; goto exit; } - if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { - sh_css_set_dp_config(stream->pipes[i], params, - &stream_params->pipe_dp_config[stream->pipes[i]->mode]); - ia_css_set_param_exceptions(stream->pipes[i], params); -#endif - } else { - retval = false; - goto exit; + if (atomisp_hw_is_isp2401) { + if (stream->pipes[i]->mode < IA_CSS_PIPE_ID_NUM) { + sh_css_set_dp_config(stream->pipes[i], params, + &stream_params->pipe_dp_config[stream->pipes[i]->mode]); + ia_css_set_param_exceptions(stream->pipes[i], params); + } else { + retval = false; + goto exit; + } } } -#ifndef ISP2401 - ia_css_set_param_exceptions(pipe_in, params); + if (!atomisp_hw_is_isp2401) + ia_css_set_param_exceptions(pipe_in, params); -#endif params->fpn_config.data = stream_params->fpn_config.data; params->config_changed[IA_CSS_FPN_ID] = stream_params->config_changed[IA_CSS_FPN_ID]; @@ -3335,11 +3329,8 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, const void *lut) { enum ia_css_err err = IA_CSS_SUCCESS; -#ifndef ISP2401 - bool store = true; -#else bool stream_started = false; -#endif + IA_CSS_ENTER("pipe=%p lut=%p", pipe, lut); if (!lut || !pipe) { @@ -3355,11 +3346,7 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, if (pipe->stream && pipe->stream->started) { ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "unable to set scaler lut since stream has started\n"); -#ifndef ISP2401 - store = false; -#else stream_started = true; -#endif err = IA_CSS_ERR_NOT_SUPPORTED; } @@ -3367,18 +3354,13 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, sh_css_params_free_gdc_lut(pipe->scaler_pp_lut); pipe->scaler_pp_lut = mmgr_NULL; -#ifndef ISP2401 - if (store) { - pipe->scaler_pp_lut = mmgr_malloc(sizeof(zoom_table)); -#else if (!stream_started) { - pipe->scaler_pp_lut = sh_css_params_alloc_gdc_lut(); -#endif + if (!atomisp_hw_is_isp2401) + pipe->scaler_pp_lut = mmgr_malloc(sizeof(zoom_table)); + else + pipe->scaler_pp_lut = sh_css_params_alloc_gdc_lut(); + if (pipe->scaler_pp_lut == mmgr_NULL) { -#ifndef ISP2401 - IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err); - return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; -#else ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR, "unable to allocate scaler_pp_lut\n"); err = IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -3388,15 +3370,7 @@ enum ia_css_err ia_css_pipe_set_bci_scaler_lut(struct ia_css_pipe *pipe, mmgr_store(pipe->scaler_pp_lut, (int *)interleaved_lut_temp, sizeof(zoom_table)); -#endif } -#ifndef ISP2401 - - gdc_lut_convert_to_isp_format((const int(*)[HRT_GDC_N])lut, - interleaved_lut_temp); - mmgr_store(pipe->scaler_pp_lut, (int *)interleaved_lut_temp, - sizeof(zoom_table)); -#endif } IA_CSS_LEAVE("lut(%u) err=%d", pipe->scaler_pp_lut, err); @@ -3426,11 +3400,11 @@ enum ia_css_err sh_css_params_map_and_store_default_gdc_lut(void) host_lut_store((void *)zoom_table); -#ifndef ISP2401 - default_gdc_lut = mmgr_malloc(sizeof(zoom_table)); -#else - default_gdc_lut = sh_css_params_alloc_gdc_lut(); -#endif + if (!atomisp_hw_is_isp2401) + default_gdc_lut = mmgr_malloc(sizeof(zoom_table)); + else + default_gdc_lut = sh_css_params_alloc_gdc_lut(); + if (default_gdc_lut == mmgr_NULL) return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; @@ -4036,12 +4010,19 @@ sh_css_params_write_to_ddr_internal( if (binary->info->sp.enable.sc) { - u32 enable_conv = params-> - shading_settings.enable_shading_table_conversion; + u32 enable_conv; + size_t bytes; + + if (!atomisp_hw_is_isp2401) + bytes = ISP2400_SCTBL_BYTES(binary); + else + bytes = ISP2401_SCTBL_BYTES(binary); + + enable_conv = params->shading_settings.enable_shading_table_conversion; buff_realloced = reallocate_buffer(&ddr_map->sc_tbl, &ddr_map_size->sc_tbl, - (size_t)(SCTBL_BYTES(binary)), + bytes, params->sc_table_changed, &err); if (err != IA_CSS_SUCCESS) { @@ -4125,11 +4106,12 @@ sh_css_params_write_to_ddr_internal( } } } -#ifdef ISP2401 + /* DPC configuration is made pipe specific to allow flexibility in positioning of the * DPC kernel. The code below sets the pipe specific configuration to * individual binaries. */ - if (params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) + if (atomisp_hw_is_isp2401 && + params->pipe_dpc_config_changed[pipe_id] && binary->info->sp.enable.dpc) { unsigned int size = stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; @@ -4141,15 +4123,13 @@ sh_css_params_write_to_ddr_internal( ia_css_dp_encode((struct sh_css_isp_dp_params *) &binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], ¶ms->pipe_dp_config[pipe_id], size); -#endif -#ifdef ISP2401 params->isp_params_changed = true; params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = true; } } -#endif + if (params->config_changed[IA_CSS_MACC_ID] && binary->info->sp.enable.macc) { unsigned int i, j, idx; @@ -4231,172 +4211,162 @@ sh_css_params_write_to_ddr_internal( /* Generate default DVS unity table on start up*/ if (!params->pipe_dvs_6axis_config[pipe_id]) { -#ifndef ISP2401 - struct ia_css_resolution dvs_offset; + struct ia_css_resolution dvs_offset = {0}; - dvs_offset.width = -#else - struct ia_css_resolution dvs_offset = {0, 0}; + if (!atomisp_hw_is_isp2401) { + dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; + } else { + if (binary->dvs_envelope.width || binary->dvs_envelope.height) { + dvs_offset.width = (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; + } + } + dvs_offset.height = (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; - if (binary->dvs_envelope.width || binary->dvs_envelope.height) { - dvs_offset.width = -#endif - (PIX_SHIFT_FILTER_RUN_IN_X + binary->dvs_envelope.width) / 2; -#ifndef ISP2401 - dvs_offset.height = -#else - dvs_offset.height = -#endif - (PIX_SHIFT_FILTER_RUN_IN_Y + binary->dvs_envelope.height) / 2; -#ifdef ISP2401 - } -#endif + params->pipe_dvs_6axis_config[pipe_id] = + generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); + if (!params->pipe_dvs_6axis_config[pipe_id]) { + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); + return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + } + params->pipe_dvs_6axis_config_changed[pipe_id] = true; - params->pipe_dvs_6axis_config[pipe_id] = - generate_dvs_6axis_table(&binary->out_frame_info[0].res, &dvs_offset); - if (!params->pipe_dvs_6axis_config[pipe_id]) { - IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY); - return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY; + store_dvs_6axis_config(params->pipe_dvs_6axis_config[pipe_id], + binary, + dvs_in_frame_info, + ddr_map->dvs_6axis_params_y); + params->isp_params_changed = true; } - params->pipe_dvs_6axis_config_changed[pipe_id] = true; } - - store_dvs_6axis_config(params->pipe_dvs_6axis_config[pipe_id], - binary, - dvs_in_frame_info, - ddr_map->dvs_6axis_params_y); - params->isp_params_changed = true; } -} -if (binary->info->sp.enable.ca_gdc) -{ - unsigned int i; - hrt_vaddress *virt_addr_tetra_x[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - size_t *virt_size_tetra_x[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - hrt_vaddress *virt_addr_tetra_y[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - size_t *virt_size_tetra_y[ - IA_CSS_MORPH_TABLE_NUM_PLANES]; - - virt_addr_tetra_x[0] = &ddr_map->tetra_r_x; - virt_addr_tetra_x[1] = &ddr_map->tetra_gr_x; - virt_addr_tetra_x[2] = &ddr_map->tetra_gb_x; - virt_addr_tetra_x[3] = &ddr_map->tetra_b_x; - virt_addr_tetra_x[4] = &ddr_map->tetra_ratb_x; - virt_addr_tetra_x[5] = &ddr_map->tetra_batr_x; - - virt_size_tetra_x[0] = &ddr_map_size->tetra_r_x; - virt_size_tetra_x[1] = &ddr_map_size->tetra_gr_x; - virt_size_tetra_x[2] = &ddr_map_size->tetra_gb_x; - virt_size_tetra_x[3] = &ddr_map_size->tetra_b_x; - virt_size_tetra_x[4] = &ddr_map_size->tetra_ratb_x; - virt_size_tetra_x[5] = &ddr_map_size->tetra_batr_x; - - virt_addr_tetra_y[0] = &ddr_map->tetra_r_y; - virt_addr_tetra_y[1] = &ddr_map->tetra_gr_y; - virt_addr_tetra_y[2] = &ddr_map->tetra_gb_y; - virt_addr_tetra_y[3] = &ddr_map->tetra_b_y; - virt_addr_tetra_y[4] = &ddr_map->tetra_ratb_y; - virt_addr_tetra_y[5] = &ddr_map->tetra_batr_y; - - virt_size_tetra_y[0] = &ddr_map_size->tetra_r_y; - virt_size_tetra_y[1] = &ddr_map_size->tetra_gr_y; - virt_size_tetra_y[2] = &ddr_map_size->tetra_gb_y; - virt_size_tetra_y[3] = &ddr_map_size->tetra_b_y; - virt_size_tetra_y[4] = &ddr_map_size->tetra_ratb_y; - virt_size_tetra_y[5] = &ddr_map_size->tetra_batr_y; - - buff_realloced = false; - for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { - buff_realloced |= - reallocate_buffer(virt_addr_tetra_x[i], - virt_size_tetra_x[i], - (size_t) - (MORPH_PLANE_BYTES(binary)), - params->morph_table_changed, - &err); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - buff_realloced |= - reallocate_buffer(virt_addr_tetra_y[i], - virt_size_tetra_y[i], - (size_t) - (MORPH_PLANE_BYTES(binary)), - params->morph_table_changed, - &err); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - } - if (params->morph_table_changed || buff_realloced) { - const struct ia_css_morph_table *table = params->morph_table; - struct ia_css_morph_table *id_table = NULL; - - if ((table) && - (table->width < binary->morph_tbl_width || - table->height < binary->morph_tbl_height)) { - table = NULL; - } - if (!table) { - err = sh_css_params_default_morph_table(&id_table, - binary); + if (binary->info->sp.enable.ca_gdc) + { + unsigned int i; + hrt_vaddress *virt_addr_tetra_x[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + size_t *virt_size_tetra_x[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + hrt_vaddress *virt_addr_tetra_y[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + size_t *virt_size_tetra_y[ + IA_CSS_MORPH_TABLE_NUM_PLANES]; + + virt_addr_tetra_x[0] = &ddr_map->tetra_r_x; + virt_addr_tetra_x[1] = &ddr_map->tetra_gr_x; + virt_addr_tetra_x[2] = &ddr_map->tetra_gb_x; + virt_addr_tetra_x[3] = &ddr_map->tetra_b_x; + virt_addr_tetra_x[4] = &ddr_map->tetra_ratb_x; + virt_addr_tetra_x[5] = &ddr_map->tetra_batr_x; + + virt_size_tetra_x[0] = &ddr_map_size->tetra_r_x; + virt_size_tetra_x[1] = &ddr_map_size->tetra_gr_x; + virt_size_tetra_x[2] = &ddr_map_size->tetra_gb_x; + virt_size_tetra_x[3] = &ddr_map_size->tetra_b_x; + virt_size_tetra_x[4] = &ddr_map_size->tetra_ratb_x; + virt_size_tetra_x[5] = &ddr_map_size->tetra_batr_x; + + virt_addr_tetra_y[0] = &ddr_map->tetra_r_y; + virt_addr_tetra_y[1] = &ddr_map->tetra_gr_y; + virt_addr_tetra_y[2] = &ddr_map->tetra_gb_y; + virt_addr_tetra_y[3] = &ddr_map->tetra_b_y; + virt_addr_tetra_y[4] = &ddr_map->tetra_ratb_y; + virt_addr_tetra_y[5] = &ddr_map->tetra_batr_y; + + virt_size_tetra_y[0] = &ddr_map_size->tetra_r_y; + virt_size_tetra_y[1] = &ddr_map_size->tetra_gr_y; + virt_size_tetra_y[2] = &ddr_map_size->tetra_gb_y; + virt_size_tetra_y[3] = &ddr_map_size->tetra_b_y; + virt_size_tetra_y[4] = &ddr_map_size->tetra_ratb_y; + virt_size_tetra_y[5] = &ddr_map_size->tetra_batr_y; + + buff_realloced = false; + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + buff_realloced |= + reallocate_buffer(virt_addr_tetra_x[i], + virt_size_tetra_x[i], + (size_t) + (MORPH_PLANE_BYTES(binary)), + params->morph_table_changed, + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + buff_realloced |= + reallocate_buffer(virt_addr_tetra_y[i], + virt_size_tetra_y[i], + (size_t) + (MORPH_PLANE_BYTES(binary)), + params->morph_table_changed, + &err); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR_PRIVATE(err); return err; } - table = id_table; } + if (params->morph_table_changed || buff_realloced) { + const struct ia_css_morph_table *table = params->morph_table; + struct ia_css_morph_table *id_table = NULL; + + if ((table) && + (table->width < binary->morph_tbl_width || + table->height < binary->morph_tbl_height)) { + table = NULL; + } + if (!table) { + err = sh_css_params_default_morph_table(&id_table, + binary); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + table = id_table; + } - for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { - store_morph_plane(table->coordinates_x[i], - table->width, - table->height, - *virt_addr_tetra_x[i], - binary->morph_tbl_aligned_width); - store_morph_plane(table->coordinates_y[i], - table->width, - table->height, - *virt_addr_tetra_y[i], - binary->morph_tbl_aligned_width); + for (i = 0; i < IA_CSS_MORPH_TABLE_NUM_PLANES; i++) { + store_morph_plane(table->coordinates_x[i], + table->width, + table->height, + *virt_addr_tetra_x[i], + binary->morph_tbl_aligned_width); + store_morph_plane(table->coordinates_y[i], + table->width, + table->height, + *virt_addr_tetra_y[i], + binary->morph_tbl_aligned_width); + } + if (id_table) + ia_css_morph_table_free(id_table); } - if (id_table) - ia_css_morph_table_free(id_table); } -} -/* After special cases like SC, FPN since they may change parameters */ -for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) -{ - const struct ia_css_isp_data *isp_data = - ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, - IA_CSS_PARAM_CLASS_PARAM, mem); - size_t size = isp_data->size; - - if (!size) continue; - buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], - &ddr_map_size->isp_mem_param[stage_num][mem], - size, - params->isp_mem_params_changed[pipe_id][stage_num][mem], - &err); - if (err != IA_CSS_SUCCESS) { - IA_CSS_LEAVE_ERR_PRIVATE(err); - return err; - } - if (params->isp_mem_params_changed[pipe_id][stage_num][mem] || buff_realloced) { - sh_css_update_isp_mem_params_to_ddr(binary, - ddr_map->isp_mem_param[stage_num][mem], - ddr_map_size->isp_mem_param[stage_num][mem], mem); + /* After special cases like SC, FPN since they may change parameters */ + for (mem = 0; mem < N_IA_CSS_MEMORIES; mem++) + { + const struct ia_css_isp_data *isp_data = + ia_css_isp_param_get_isp_mem_init(&binary->info->sp.mem_initializers, + IA_CSS_PARAM_CLASS_PARAM, mem); + size_t size = isp_data->size; + + if (!size) continue; + buff_realloced = reallocate_buffer(&ddr_map->isp_mem_param[stage_num][mem], + &ddr_map_size->isp_mem_param[stage_num][mem], + size, + params->isp_mem_params_changed[pipe_id][stage_num][mem], + &err); + if (err != IA_CSS_SUCCESS) { + IA_CSS_LEAVE_ERR_PRIVATE(err); + return err; + } + if (params->isp_mem_params_changed[pipe_id][stage_num][mem] || buff_realloced) { + sh_css_update_isp_mem_params_to_ddr(binary, + ddr_map->isp_mem_param[stage_num][mem], + ddr_map_size->isp_mem_param[stage_num][mem], mem); + } } -} -IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); -return IA_CSS_SUCCESS; + IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_SUCCESS); + return IA_CSS_SUCCESS; } const struct ia_css_fpn_table *ia_css_get_fpn_table(struct ia_css_stream @@ -4612,22 +4582,14 @@ free_ia_css_isp_parameter_set_info( continue; /* sanity check - ptr must be valid */ -#ifndef ISP2401 if (!ia_css_refcount_is_valid(addrs[i])) { -#else - if (ia_css_refcount_is_valid(addrs[i])) { - ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); - } else { -#endif IA_CSS_ERROR("%s: IA_CSS_REFCOUNT_PARAM_BUFFER(0x%x) invalid arg", __func__, ptr); err = IA_CSS_ERR_INVALID_ARGUMENTS; continue; } -#ifndef ISP2401 ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_BUFFER, addrs[i]); -#endif } ia_css_refcount_decrement(IA_CSS_REFCOUNT_PARAM_SET_POOL, ptr); -- GitLab From bbf3f7827ef5ae262f6ef44d8dcc6e77fd1edac5 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 1 May 2020 11:17:06 +0200 Subject: [PATCH 447/503] media: atomisp: add firmware load code for ISP2401 rev B0 The Asus Transformer T101HA comes with a newer hardware version. Add support to load firmware for it. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_v4l2.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index d294e6ac8e3b4..297f55a01b1b8 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1448,6 +1448,11 @@ atomisp_load_firmware(struct atomisp_device *isp) if (skip_fwload) return NULL; + if (isp->media_dev.hw_revision == + ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) + | ATOMISP_HW_STEPPING_B0)) + fw_path = "shisp_2401b0_v21.bin"; + if (isp->media_dev.hw_revision == ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_A0)) -- GitLab From 0057131fea6ddf9583baf9b7defa0ce2e51e9b7e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 1 May 2020 14:17:21 +0200 Subject: [PATCH 448/503] media: atomisp: remove some file duplication and do more dir renames There are currently two identical copies of some files, one at css_2401_csi2p_system/ and another one at css_2401_system/. Get rid of one of them, moving the remaining files to the directory with the shortest name. While here, do more renames, in order to get smaller path names. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Makefile | 38 +- .../ia_css_isp_configs.c | 0 .../ia_css_isp_params.c | 0 .../ia_css_isp_states.c | 0 .../pci/css_2401_csi2p_system/spmem_dump.c | 1965 ---------- .../csi_rx_global.h | 0 .../hive}/ia_css_isp_configs.c | 0 .../hive}/ia_css_isp_params.c | 0 .../hive}/ia_css_isp_states.c | 0 .../ia_css_isp_configs.c | 413 -- .../ia_css_isp_params.c | 3366 ----------------- .../ia_css_isp_states.c | 223 -- .../host/csi_rx.c | 0 .../host/csi_rx_local.h | 0 .../host/csi_rx_private.h | 0 .../host/ibuf_ctrl.c | 0 .../host/ibuf_ctrl_local.h | 0 .../host/ibuf_ctrl_private.h | 0 .../host/isys_dma.c | 0 .../host/isys_dma_local.h | 0 .../host/isys_dma_private.h | 0 .../host/isys_irq.c | 0 .../host/isys_irq_local.h | 0 .../host/isys_irq_private.h | 0 .../host/isys_stream2mmio.c | 0 .../host/isys_stream2mmio_local.h | 0 .../host/isys_stream2mmio_private.h | 0 .../host/pixelgen_local.h | 0 .../host/pixelgen_private.h | 0 .../hrt/PixelGen_SysBlock_defs.h | 0 .../hrt/ibuf_cntrl_defs.h | 0 .../hrt/mipi_backend_common_defs.h | 0 .../hrt/mipi_backend_defs.h | 0 .../hrt/rx_csi_defs.h | 0 .../hrt/stream2mmio_defs.h | 0 .../ibuf_ctrl_global.h | 0 .../isys_dma_global.h | 0 .../isys_irq_global.h | 0 .../isys_stream2mmio_global.h | 0 .../pixelgen_global.h | 0 .../atomisp/pci/css_2401_system/spmem_dump.c | 1098 +++--- 41 files changed, 589 insertions(+), 6514 deletions(-) rename drivers/staging/media/atomisp/pci/css_2400_system/{hive_isp_css_2400_system_generated => hive}/ia_css_isp_configs.c (100%) rename drivers/staging/media/atomisp/pci/css_2400_system/{hive_isp_css_2400_system_generated => hive}/ia_css_isp_params.c (100%) rename drivers/staging/media/atomisp/pci/css_2400_system/{hive_isp_css_2400_system_generated => hive}/ia_css_isp_states.c (100%) delete mode 100644 drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/csi_rx_global.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated => css_2401_system/hive}/ia_css_isp_configs.c (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated => css_2401_system/hive}/ia_css_isp_params.c (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated => css_2401_system/hive}/ia_css_isp_states.c (100%) delete mode 100644 drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c delete mode 100644 drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c delete mode 100644 drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/csi_rx.c (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/csi_rx_local.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/csi_rx_private.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/ibuf_ctrl.c (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/ibuf_ctrl_local.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/ibuf_ctrl_private.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_dma.c (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_dma_local.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_dma_private.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_irq.c (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_irq_local.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_irq_private.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_stream2mmio.c (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_stream2mmio_local.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/isys_stream2mmio_private.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/pixelgen_local.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/host/pixelgen_private.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/hrt/PixelGen_SysBlock_defs.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/hrt/ibuf_cntrl_defs.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/hrt/mipi_backend_common_defs.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/hrt/mipi_backend_defs.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/hrt/rx_csi_defs.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/hrt/stream2mmio_defs.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/ibuf_ctrl_global.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/isys_dma_global.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/isys_irq_global.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/isys_stream2mmio_global.h (100%) rename drivers/staging/media/atomisp/pci/{css_2401_csi2p_system => css_2401_system}/pixelgen_global.h (100%) diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 3c1c9bc0eebc4..d166b5f614e80 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -159,9 +159,9 @@ atomisp-objs += \ pci/hive_isp_css_shared/host/tag.o \ obj-byt = \ - pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.o \ - pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.o \ - pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.o \ + pci/css_2400_system/hive/ia_css_isp_configs.o \ + pci/css_2400_system/hive/ia_css_isp_params.o \ + pci/css_2400_system/hive/ia_css_isp_states.o \ pci/css_2400_system/spmem_dump.o \ # These will be needed when clean merge CHT support nicely into the driver @@ -170,19 +170,15 @@ obj-byt = \ obj-cht = \ pci/css_2401_system/spmem_dump.o \ - pci/css_2401_csi2p_system/spmem_dump.o \ - pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.o \ - pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.o \ - pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.o \ - pci/css_2401_csi2p_system/host/csi_rx.o \ - pci/css_2401_csi2p_system/host/ibuf_ctrl.o \ - pci/css_2401_csi2p_system/host/isys_dma.o \ - pci/css_2401_csi2p_system/host/isys_irq.o \ - pci/css_2401_csi2p_system/host/isys_stream2mmio.o - -# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.o \ -# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.o \ -# pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.o \ + pci/css_2401_system/spmem_dump.o \ + pci/css_2401_system/hive/ia_css_isp_configs.o \ + pci/css_2401_system/hive/ia_css_isp_params.o \ + pci/css_2401_system/hive/ia_css_isp_states.o \ + pci/css_2401_system/host/csi_rx.o \ + pci/css_2401_system/host/ibuf_ctrl.o \ + pci/css_2401_system/host/isys_dma.o \ + pci/css_2401_system/host/isys_irq.o \ + pci/css_2401_system/host/isys_stream2mmio.o INCLUDES += \ -I$(atomisp)/ \ @@ -320,14 +316,14 @@ INCLUDES += \ INCLUDES_byt += \ -I$(atomisp)/pci/css_2400_system/ \ - -I$(atomisp)/pci/css_2400_system/hive_isp_css_2400_system_generated/ \ + -I$(atomisp)/pci/css_2400_system/hive/ \ -I$(atomisp)/pci/css_2400_system/hrt/ \ INCLUDES_cht += \ - -I$(atomisp)/pci/css_2401_csi2p_system/ \ - -I$(atomisp)/pci/css_2401_csi2p_system/host/ \ - -I$(atomisp)/pci/css_2401_csi2p_system/hive_isp_css_2400_system_generated/ \ - -I$(atomisp)/pci/css_2401_csi2p_system/hrt/ \ + -I$(atomisp)/pci/css_2401_system/ \ + -I$(atomisp)/pci/css_2401_system/host/ \ + -I$(atomisp)/pci/css_2401_system/hive/ \ + -I$(atomisp)/pci/css_2401_system/hrt/ \ # -I$(atomisp)/pci/css_2401_system/hrt/ \ # -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \ diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_configs.c diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_params.c diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c rename to drivers/staging/media/atomisp/pci/css_2400_system/hive/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c deleted file mode 100644 index 9d96d52e5eccd..0000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/spmem_dump.c +++ /dev/null @@ -1,1965 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _sp_map_h_ -#define _sp_map_h_ - -#ifndef _hrt_dummy_use_blob_sp -#define _hrt_dummy_use_blob_sp() -#endif - -#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) - -/* function longjmp: 6A0B */ - -/* function tmpmem_init_dmem: 671E */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ - -/* function ia_css_pipe_data_init_tagger_resources: AC7 */ - -/* function debug_buffer_set_ddr_addr: DD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_mipi -#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x7444 -#define HIVE_SIZE_vbuf_mipi 12 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x7444 -#define HIVE_SIZE_sp_vbuf_mipi 12 - -/* function ia_css_event_sp_decode: 3FB6 */ - -/* function ia_css_queue_get_size: 53C8 */ - -/* function ia_css_queue_load: 59DF */ - -/* function setjmp: 6A14 */ - -/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue -#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 - -/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ - -/* function ia_css_sp_rawcopy_func: 5B4A */ - -/* function ia_css_tagger_buf_sp_pop_marked: 345C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH -#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stage -#define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x6D48 -#define HIVE_SIZE_isp_stage 832 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x6D48 -#define HIVE_SIZE_sp_isp_stage 832 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_raw -#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x394 -#define HIVE_SIZE_vbuf_raw 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x394 -#define HIVE_SIZE_sp_vbuf_raw 4 - -/* function ia_css_sp_bin_copy_func: 5B2B */ - -/* function ia_css_queue_item_store: 572D */ - -/* function input_system_reset: 1201 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 - -/* function sp_start_isp: 39C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_binary_group -#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_binary_group 32 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_sp_binary_group 32 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sw_state -#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sw_state 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sp_sw_state 4 - -/* function ia_css_thread_sp_main: 136D */ - -/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_psys_event_queue_handle -#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 - -/* function pixelgen_unit_test: E62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue -#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 - -/* function ia_css_tagger_sp_propagate_frame: 2D23 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_handles -#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x7450 -#define HIVE_SIZE_vbuf_handles 960 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x7450 -#define HIVE_SIZE_sp_vbuf_handles 960 - -/* function ia_css_queue_store: 5893 */ - -/* function ia_css_sp_flash_register: 3691 */ - -/* function ia_css_pipeline_sp_init: 1FD7 */ - -/* function ia_css_tagger_sp_configure: 2C13 */ - -/* function ia_css_ispctrl_sp_end_binary: 3FFF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 - -/* function pixelgen_tpg_run: F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_is_pending_mask -#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_is_pending_mask 0x5C -#define HIVE_SIZE_event_is_pending_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_is_pending_mask 0x5C -#define HIVE_SIZE_sp_event_is_pending_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_frame -#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_all_cb_elems_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_isys_event_queue_handle -#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_com -#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x3E6C -#define HIVE_SIZE_host_sp_com 220 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x3E6C -#define HIVE_SIZE_sp_host_sp_com 220 - -/* function ia_css_queue_get_free_space: 54F2 */ - -/* function exec_image_pipe: 57A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_init_dmem_data -#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_init_dmem_data 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_sp_init_dmem_data 24 - -/* function ia_css_sp_metadata_start: 5EB3 */ - -/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ - -/* function ia_css_pipeline_sp_stop: 1FBA */ - -/* function ia_css_tagger_sp_connect_pipes: 30FD */ - -/* function sp_isys_copy_wait: 5D8 */ - -/* function is_isp_debug_buffer_full: 337 */ - -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ - -/* function encode_and_post_timer_event: A3C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_input_system_bz2788_active -#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_input_system_bz2788_active 4 -#else -#endif -#endif -#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_sp_input_system_bz2788_active 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS -#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_per_frame_data -#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_per_frame_data 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_sp_per_frame_data 4 - -/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_psys_event_queue_handle -#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_xmem_bin_addr -#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_xmem_bin_addr 4 -#else -#endif -#endif -#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_sp_xmem_bin_addr 4 - -/* function tmr_clock_init: 166F */ - -/* function ia_css_pipeline_sp_run: 1A61 */ - -/* function memcpy: 6AB4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS -#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4 -#else -#endif -#endif -#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GP_DEVICE_BASE -#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_GP_DEVICE_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue -#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 - -/* function stream2mmio_send_command: E04 */ - -/* function ia_css_uds_sp_scale_params: 67BD */ - -/* function ia_css_circbuf_increase_size: 1452 */ - -/* function __divu: 6A32 */ - -/* function ia_css_thread_sp_get_state: 1295 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_stop -#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sem_for_cont_capt_stop 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 - -/* function thread_fiber_sp_main: 144B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_pipe_thread -#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_isp_pipe_thread 360 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 - -/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ - -/* function ia_css_spctrl_sp_set_state: 5ECF */ - -/* function ia_css_thread_sem_sp_signal: 6D18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_IRQ_BASE -#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_IRQ_BASE 0x2C -#define HIVE_SIZE_IRQ_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_IRQ_BASE 0x2C -#define HIVE_SIZE_sp_IRQ_BASE 16 - -/* function ia_css_virtual_isys_sp_isr_init: 5F70 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_TIMED_CTRL_BASE -#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_TIMED_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 - -/* function ia_css_isys_sp_generate_exp_id: 6302 */ - -/* function ia_css_rmgr_sp_init: 636D */ - -/* function ia_css_thread_sem_sp_init: 6DE7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_frame -#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sem_for_reading_cb_frame 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x3A8 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x3A8 -#define HIVE_SIZE_sp_is_isp_requested 4 - -/* function ia_css_dmaproxy_sp_execute: 3C9B */ - -/* function csi_rx_backend_rst: CE0 */ - -/* function ia_css_queue_is_empty: 7144 */ - -/* function ia_css_pipeline_sp_has_stopped: 1FB0 */ - -/* function ia_css_circbuf_extract: 1556 */ - -/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_sp_thread -#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x274 -#define HIVE_SIZE_current_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x274 -#define HIVE_SIZE_sp_current_sp_thread 4 - -/* function ia_css_spctrl_sp_get_spid: 5ED6 */ - -/* function ia_css_bufq_sp_reset_buffers: 3769 */ - -/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ - -/* function ia_css_rmgr_sp_uninit: 6366 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack -#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS -#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 - -/* function ia_css_circbuf_peek: 1538 */ - -/* function ia_css_parambuf_sp_wait_for_in_param: 167E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_param -#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_all_cb_elems_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_pipeline_sp_curr_binary_id -#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 -#else -#endif -#endif -#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame_desc -#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_all_cbs_frame_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 - -/* function sp_isys_copy_func_v2: 5BD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_param -#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sem_for_reading_cb_param 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 - -/* function ia_css_queue_get_used_space: 54A6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_start -#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sem_for_cont_capt_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tmp_heap -#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x7158 -#define HIVE_SIZE_tmp_heap 640 -#else -#endif -#endif -#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x7158 -#define HIVE_SIZE_sp_tmp_heap 640 - -/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ - -/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ - -/* function ia_css_tagger_sp_lock_exp_id: 29E0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 - -/* function ia_css_queue_is_full: 553D */ - -/* function debug_buffer_init_isp: E4 */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem -#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 - -/* function ia_css_rmgr_sp_refcount_dump: 644D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_pipe_threads -#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_pipe_threads 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_sp_pipe_threads 20 - -/* function sp_event_proxy_func: 721 */ - -/* function ibuf_ctrl_run: D79 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_isys_event_queue_handle -#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 - -/* function ia_css_thread_sp_yield: 6C96 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param_desc -#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_all_cbs_param_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb -#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 - -/* function ia_css_thread_sp_fork: 1322 */ - -/* function ia_css_tagger_sp_destroy: 3107 */ - -/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 - -/* function initialize_sp_group: 58A */ - -/* function ia_css_tagger_buf_sp_peek: 337E */ - -/* function ia_css_thread_sp_init: 134E */ - -/* function qos_scheduler_update_fps: 67AD */ - -/* function ia_css_isys_sp_reset_exp_id: 62F9 */ - -/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_DMEM_BASE -#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_ISP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_DMEM_BASE -#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_SP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_sp_SP_DMEM_BASE 4 - -/* function ibuf_ctrl_transfer: D61 */ - -/* function __ia_css_queue_is_empty_text: 5403 */ - -/* function ia_css_dmaproxy_sp_read: 3CB1 */ - -/* function virtual_isys_stream_is_capture_done: 5F94 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_raw_copy_line_count -#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x378 -#define HIVE_SIZE_raw_copy_line_count 4 -#else -#endif -#endif -#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x378 -#define HIVE_SIZE_sp_raw_copy_line_count 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle -#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 - -/* function ia_css_queue_peek: 541C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt -#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_can_send_token_mask -#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_can_send_token_mask 0x88 -#define HIVE_SIZE_event_can_send_token_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 -#define HIVE_SIZE_sp_event_can_send_token_mask 44 - -/* function csi_rx_frontend_stop: C0B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_thread -#define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x7088 -#define HIVE_SIZE_isp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x7088 -#define HIVE_SIZE_sp_isp_thread 4 - -/* function encode_and_post_sp_event_non_blocking: A84 */ - -/* function is_ddr_debug_buffer_full: 2CC */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_fiber -#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_threads_fiber 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_sp_threads_fiber 24 - -/* function encode_and_post_sp_event: A0D */ - -/* function debug_enqueue_ddr: EE */ - -/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ - -/* function dmaproxy_sp_read_write: 70C3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer -#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_buffer_queue_handle -#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_host2sp_buffer_queue_handle 480 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_service -#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_ia_css_flash_sp_in_service 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 - -/* function ia_css_dmaproxy_sp_process: 6E0F */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ - -/* function ia_css_ispctrl_sp_init_cs: 40FA */ - -/* function ia_css_spctrl_sp_init: 5EE4 */ - -/* function sp_event_proxy_init: 736 */ - -/* function input_system_input_port_close: 1095 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_output -#define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x3F50 -#define HIVE_SIZE_sp_output 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x3F50 -#define HIVE_SIZE_sp_sp_output 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 - -/* function pixelgen_prbs_config: E8D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_CTRL_BASE -#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_ISP_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_INPUT_FORMATTER_BASE -#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 - -/* function sp_dma_proxy_reset_channels: 3F20 */ - -/* function ia_css_tagger_sp_update_size: 334D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue -#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 - -/* function thread_fiber_sp_create: 13BA */ - -/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_frame -#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sem_for_writing_cb_frame 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_param -#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sem_for_writing_cb_param 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 - -/* function pixelgen_tpg_is_done: F07 */ - -/* function ia_css_isys_stream_capture_indication: 60D7 */ - -/* function sp_start_isp_entry: 392 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifdef HIVE_ADDR_sp_start_isp_entry -#endif -#define HIVE_ADDR_sp_start_isp_entry 0x392 -#endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x392 - -/* function ia_css_tagger_buf_sp_unmark_all: 35DA */ - -/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ - -/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ - -/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ - -/* function ibuf_ctrl_config: D85 */ - -/* function ia_css_isys_stream_stop: 61F4 */ - -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ - -/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ - -/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_group -#define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x3F60 -#define HIVE_SIZE_sp_group 6296 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x3F60 -#define HIVE_SIZE_sp_sp_group 6296 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_event_proxy_thread -#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_event_proxy_thread 72 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_sp_event_proxy_thread 72 - -/* function ia_css_thread_sp_kill: 12E8 */ - -/* function ia_css_tagger_sp_create: 32FB */ - -/* function tmpmem_acquire_dmem: 66FF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_MMU_BASE -#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_MMU_BASE 0x24 -#define HIVE_SIZE_MMU_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_MMU_BASE 0x24 -#define HIVE_SIZE_sp_MMU_BASE 8 - -/* function ia_css_dmaproxy_sp_channel_release: 3F38 */ - -/* function pixelgen_prbs_run: E7B */ - -/* function ia_css_dmaproxy_sp_is_idle: 3F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_qos_start -#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sem_for_qos_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sp_sem_for_qos_start 20 - -/* function isp_hmem_load: B5D */ - -/* function ia_css_tagger_sp_release_buf_elem: 28CA */ - -/* function ia_css_eventq_sp_send: 3F8E */ - -/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_debug_buffer_ddr_address -#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_debug_buffer_ddr_address 4 -#else -#endif -#endif -#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 - -/* function sp_isys_copy_request: 681 */ - -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ - -/* function ia_css_thread_sp_set_priority: 12E0 */ - -/* function sizeof_hmem: C04 */ - -/* function input_system_channel_open: 11BC */ - -/* function pixelgen_tpg_stop: EF5 */ - -/* function tmpmem_release_dmem: 66EE */ - -/* function __ia_css_dmaproxy_sp_process_text: 3BAB */ - -/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ - -/* function sp_event_assert: 8BD */ - -/* function ia_css_flash_sp_init_internal_params: 36D7 */ - -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ - -/* function __modu: 6A78 */ - -/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ - -/* function input_system_channel_transfer: 11A5 */ - -/* function isp_vamem_store: 0 */ - -/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GDC_BASE -#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GDC_BASE 0x44 -#define HIVE_SIZE_GDC_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GDC_BASE 0x44 -#define HIVE_SIZE_sp_GDC_BASE 8 - -/* function ia_css_queue_local_init: 5707 */ - -/* function sp_event_proxy_callout_func: 6B45 */ - -/* function qos_scheduler_schedule_stage: 6759 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads -#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack_size -#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_threads_stack_size 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_sp_threads_stack_size 24 - -/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ - -/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ - -/* function ia_css_queue_dequeue: 5585 */ - -/* function is_qos_standalone_mode: 6734 */ - -/* function ia_css_dmaproxy_sp_configure_channel: 703C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_thread_fiber_sp -#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_current_thread_fiber_sp 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_sp_current_thread_fiber_sp 4 - -/* function ia_css_circbuf_pop: 15EA */ - -/* function memset: 6AF7 */ - -/* function irq_raise_set_token: B6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GPIO_BASE -#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GPIO_BASE 0x3C -#define HIVE_SIZE_GPIO_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GPIO_BASE 0x3C -#define HIVE_SIZE_sp_GPIO_BASE 4 - -/* function pixelgen_prbs_stop: E69 */ - -/* function ia_css_pipeline_acc_stage_enable: 1F69 */ - -/* function ia_css_tagger_sp_unlock_exp_id: 293B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_ph -#define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x740C -#define HIVE_SIZE_isp_ph 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x740C -#define HIVE_SIZE_sp_isp_ph 28 - -/* function ia_css_ispctrl_sp_init_ds: 4286 */ - -/* function get_xmem_base_addr_raw: 4635 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param -#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_all_cbs_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_sp_all_cbs_param 16 - -/* function pixelgen_tpg_config: F2A */ - -/* function ia_css_circbuf_create: 1638 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp_group -#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sem_for_sp_group 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sp_sem_for_sp_group 20 - -/* function csi_rx_frontend_run: C1C */ - -/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ - -/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ - -/* function ia_css_isys_stream_open: 62A9 */ - -/* function ia_css_sp_rawcopy_tag_frame: 5E35 */ - -/* function input_system_channel_configure: 11D8 */ - -/* function isp_hmem_clear: B2D */ - -/* function ia_css_framebuf_sp_release_in_frame: 66C0 */ - -/* function stream2mmio_config: E15 */ - -/* function ia_css_ispctrl_sp_start_binary: 40D8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 - -/* function ia_css_eventq_sp_recv: 3F60 */ - -/* function csi_rx_frontend_config: C74 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_pool -#define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x388 -#define HIVE_SIZE_isp_pool 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x388 -#define HIVE_SIZE_sp_isp_pool 4 - -/* function ia_css_rmgr_sp_rel_gen: 63AF */ - -/* function ia_css_tagger_sp_unblock_clients: 31C3 */ - -/* function css_get_frame_processing_time_end: 28BA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_any_pending_mask -#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_event_any_pending_mask 8 -#else -#endif -#endif -#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_sp_event_any_pending_mask 8 - -/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ - -/* function sh_css_decode_tag_descr: 352 */ - -/* function debug_enqueue_isp: 27B */ - -/* function qos_scheduler_update_stage_budget: 673C */ - -/* function ia_css_spctrl_sp_uninit: 5EDD */ - -/* function csi_rx_backend_run: C62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 - -/* function ia_css_tagger_buf_sp_lock_from_start: 353E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_isp_idle -#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sem_for_isp_idle 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sp_sem_for_isp_idle 20 - -/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ - -/* function ia_css_dmaproxy_sp_init: 3BE1 */ - -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_VAMEM_BASE -#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_ISP_VAMEM_BASE 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 - -/* function input_system_channel_sync: 6C10 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger -#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 - -/* function ia_css_queue_item_load: 57F9 */ - -/* function ia_css_spctrl_sp_get_state: 5EC8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_callout_sp_thread -#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x278 -#define HIVE_SIZE_callout_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x278 -#define HIVE_SIZE_sp_callout_sp_thread 4 - -/* function thread_fiber_sp_init: 1441 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_PMEM_BASE -#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_SP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_sp_SP_PMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_input_stream_format -#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_isp_input_stream_format 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 - -/* function __mod: 6A64 */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ - -/* function ia_css_thread_sp_join: 1311 */ - -/* function ia_css_dmaproxy_sp_add_command: 712E */ - -/* function ia_css_sp_metadata_thread_func: 5EC1 */ - -/* function __sp_event_proxy_func_critical: 6B32 */ - -/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ - -/* function ia_css_sp_metadata_wait: 5EBA */ - -/* function ia_css_circbuf_peek_from_start: 151A */ - -/* function ia_css_event_sp_encode: 3FEB */ - -/* function ia_css_thread_sp_run: 1384 */ - -/* function sp_isys_copy_func: 5AC */ - -/* function ia_css_sp_isp_param_init_isp_memories: 52AC */ - -/* function register_isr: 8B5 */ - -/* function irq_raise: C8 */ - -/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ - -/* function csi_rx_backend_disable: C2E */ - -/* function pipeline_sp_initialize_stage: 20BF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES -#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 - -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ - -/* function ia_css_ispctrl_sp_done_ds: 426D */ - -/* function csi_rx_backend_config: C85 */ - -/* function ia_css_sp_isp_param_get_mem_inits: 5287 */ - -/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_pfp_spref -#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_vbuf_pfp_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_sp_vbuf_pfp_spref 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_HMEM_BASE -#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_ISP_HMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 - -/* function qos_scheduler_init_stage_budget: 679A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_buffer_queue_handle -#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp2host_buffer_queue_handle 96 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 - -/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ - -/* function ia_css_isys_stream_start: 6187 */ - -/* function sp_warning: 8E8 */ - -/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ - -/* function ia_css_tagger_sp_tag_exp_id: 2A55 */ - -/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ - -/* function ia_css_dmaproxy_sp_write: 3C81 */ - -/* function ia_css_isys_stream_start_async: 6250 */ - -/* function ia_css_parambuf_sp_release_in_param: 187B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_irq_sw_interrupt_token -#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_irq_sw_interrupt_token 4 -#else -#endif -#endif -#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_addresses -#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_isp_addresses 172 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_sp_isp_addresses 172 - -/* function ia_css_rmgr_sp_acq_gen: 63C7 */ - -/* function input_system_input_port_open: 10E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isps -#define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x7428 -#define HIVE_SIZE_isps 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x7428 -#define HIVE_SIZE_sp_isps 28 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_queues_initialized -#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_host_sp_queues_initialized 4 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_sp_host_sp_queues_initialized 4 - -/* function ia_css_queue_uninit: 56C5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started -#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 - -/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ - -/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ - -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ - -/* function csi_rx_backend_stop: C51 */ - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_spref -#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x38C -#define HIVE_SIZE_vbuf_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x38C -#define HIVE_SIZE_sp_vbuf_spref 4 - -/* function ia_css_queue_enqueue: 560F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_request -#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_ia_css_flash_sp_request 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 - -/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tagger_frames -#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x5B30 -#define HIVE_SIZE_tagger_frames 168 -#else -#endif -#endif -#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x5B30 -#define HIVE_SIZE_sp_tagger_frames 168 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_if -#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sem_for_reading_if 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sp_sem_for_reading_if 20 - -/* function sp_generate_interrupts: 967 */ - -/* function ia_css_pipeline_sp_start: 1FC2 */ - -/* function ia_css_thread_default_callout: 6C8F */ - -/* function csi_rx_backend_enable: C3F */ - -/* function ia_css_sp_rawcopy_init: 5B32 */ - -/* function input_system_input_port_configure: 1139 */ - -/* function tmr_clock_read: 1665 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_BAMEM_BASE -#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_ISP_BAMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 - -/* function isys2401_dma_config_legacy: DDA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ibuf_ctrl_master_ports -#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_ibuf_ctrl_master_ports 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 - -/* function css_get_frame_processing_time_start: 28C2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame -#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_all_cbs_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_sp_all_cbs_frame 16 - -/* function ia_css_virtual_isys_sp_isr: 716E */ - -/* function thread_sp_queue_print: 13A1 */ - -/* function sp_notify_eof: 913 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_str2mem -#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sem_for_str2mem 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sp_sem_for_str2mem 20 - -/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ - -/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ - -/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ - -/* function ia_css_circbuf_destroy: 162F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_PMEM_BASE -#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_ISP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 - -/* function ia_css_sp_isp_param_mem_load: 521A */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ - -/* function __div: 6A1C */ - -/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_use -#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_ia_css_flash_sp_in_use 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 - -/* function ia_css_thread_sem_sp_wait: 6D63 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sleep_mode -#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sleep_mode 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sp_sleep_mode 4 - -/* function ia_css_tagger_buf_sp_push: 34A1 */ - -/* function mmu_invalidate_cache: D3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_max_cb_elems -#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_max_cb_elems 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_sp_max_cb_elems 8 - -/* function ia_css_queue_remote_init: 56E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stop_req -#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x57F8 -#define HIVE_SIZE_isp_stop_req 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x57F8 -#define HIVE_SIZE_sp_isp_stop_req 4 - -/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ - - -#endif /* _sp_map_h_ */ diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/csi_rx_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/csi_rx_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/csi_rx_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/csi_rx_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_params.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c rename to drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_states.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c deleted file mode 100644 index cd37e7e3d7796..0000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c +++ /dev/null @@ -1,413 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#define IA_CSS_INCLUDE_CONFIGURATIONS -#include "ia_css_pipeline.h" -#include "ia_css_isp_configs.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_iterator( - const struct ia_css_binary *binary, - const struct ia_css_iterator_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; - offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; - } - if (size) { - ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_iterator() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_copy_output( - const struct ia_css_binary *binary, - const struct ia_css_copy_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; - } - if (size) { - ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_copy_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_crop( - const struct ia_css_binary *binary, - const struct ia_css_crop_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.crop.size; - offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; - } - if (size) { - ia_css_crop_config((struct sh_css_isp_crop_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_crop() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_fpn( - const struct ia_css_binary *binary, - const struct ia_css_fpn_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.fpn.size; - offset = binary->info->mem_offsets.offsets.config->dmem.fpn.offset; - } - if (size) { - ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_fpn() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_dvs( - const struct ia_css_binary *binary, - const struct ia_css_dvs_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; - offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; - } - if (size) { - ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_dvs() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_qplane( - const struct ia_css_binary *binary, - const struct ia_css_qplane_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.qplane.size; - offset = binary->info->mem_offsets.offsets.config->dmem.qplane.offset; - } - if (size) { - ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_qplane() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output0( - const struct ia_css_binary *binary, - const struct ia_css_output0_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output0.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output0.offset; - } - if (size) { - ia_css_output0_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output0() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output1( - const struct ia_css_binary *binary, - const struct ia_css_output1_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output1.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output1.offset; - } - if (size) { - ia_css_output1_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output1() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_output( - const struct ia_css_binary *binary, - const struct ia_css_output_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.output.size; - offset = binary->info->mem_offsets.offsets.config->dmem.output.offset; - } - if (size) { - ia_css_output_config((struct sh_css_isp_output_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_output() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.sc.size; - offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; - } - if (size) { - ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_raw( - const struct ia_css_binary *binary, - const struct ia_css_raw_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.raw.size; - offset = binary->info->mem_offsets.offsets.config->dmem.raw.offset; - } - if (size) { - ia_css_raw_config((struct sh_css_isp_raw_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_raw() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_tnr( - const struct ia_css_binary *binary, - const struct ia_css_tnr_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.tnr.size; - offset = binary->info->mem_offsets.offsets.config->dmem.tnr.offset; - } - if (size) { - ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_tnr() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_ref( - const struct ia_css_binary *binary, - const struct ia_css_ref_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.ref.size; - offset = binary->info->mem_offsets.offsets.config->dmem.ref.offset; - } - if (size) { - ia_css_ref_config((struct sh_css_isp_ref_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_ref() leave:\n"); -} - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_vf( - const struct ia_css_binary *binary, - const struct ia_css_vf_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.vf.size; - offset = binary->info->mem_offsets.offsets.config->dmem.vf.offset; - } - if (size) { - ia_css_vf_config((struct sh_css_isp_vf_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_vf() leave:\n"); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c deleted file mode 100644 index 68297296885e8..0000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c +++ /dev/null @@ -1,3366 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#define IA_CSS_INCLUDE_PARAMETERS -#include "sh_css_params.h" -#include "isp/kernels/aa/aa_2/ia_css_aa2.host.h" -#include "isp/kernels/anr/anr_1.0/ia_css_anr.host.h" -#include "isp/kernels/anr/anr_2/ia_css_anr2.host.h" -#include "isp/kernels/bh/bh_2/ia_css_bh.host.h" -#include "isp/kernels/bnr/bnr_1.0/ia_css_bnr.host.h" -#include "isp/kernels/bnr/bnr2_2/ia_css_bnr2_2.host.h" -#include "isp/kernels/cnr/cnr_2/ia_css_cnr2.host.h" -#include "isp/kernels/crop/crop_1.0/ia_css_crop.host.h" -#include "isp/kernels/csc/csc_1.0/ia_css_csc.host.h" -#include "isp/kernels/ctc/ctc_1.0/ia_css_ctc.host.h" -#include "isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.h" -#include "isp/kernels/ctc/ctc2/ia_css_ctc2.host.h" -#include "isp/kernels/de/de_1.0/ia_css_de.host.h" -#include "isp/kernels/de/de_2/ia_css_de2.host.h" -#include "isp/kernels/dp/dp_1.0/ia_css_dp.host.h" -#include "isp/kernels/fixedbds/fixedbds_1.0/ia_css_fixedbds_param.h" -#include "isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.h" -#include "isp/kernels/gc/gc_1.0/ia_css_gc.host.h" -#include "isp/kernels/gc/gc_2/ia_css_gc2.host.h" -#include "isp/kernels/macc/macc_1.0/ia_css_macc.host.h" -#include "isp/kernels/macc/macc1_5/ia_css_macc1_5.host.h" -#include "isp/kernels/ob/ob_1.0/ia_css_ob.host.h" -#include "isp/kernels/ob/ob2/ia_css_ob2.host.h" -#include "isp/kernels/output/output_1.0/ia_css_output.host.h" -#include "isp/kernels/raw_aa_binning/raw_aa_binning_1.0/ia_css_raa.host.h" -#include "isp/kernels/s3a/s3a_1.0/ia_css_s3a.host.h" -#include "isp/kernels/sc/sc_1.0/ia_css_sc.host.h" -#include "isp/kernels/sdis/sdis_1.0/ia_css_sdis.host.h" -#include "isp/kernels/sdis/sdis_2/ia_css_sdis2.host.h" -#include "isp/kernels/tnr/tnr_1.0/ia_css_tnr.host.h" -#include "isp/kernels/uds/uds_1.0/ia_css_uds_param.h" -#include "isp/kernels/wb/wb_1.0/ia_css_wb.host.h" -#include "isp/kernels/xnr/xnr_1.0/ia_css_xnr.host.h" -#include "isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.h" -#include "isp/kernels/ynr/ynr_1.0/ia_css_ynr.host.h" -#include "isp/kernels/ynr/ynr_2/ia_css_ynr2.host.h" -#include "isp/kernels/fc/fc_1.0/ia_css_formats.host.h" -#include "isp/kernels/tdf/tdf_1.0/ia_css_tdf.host.h" -#include "isp/kernels/dpc2/ia_css_dpc2.host.h" -#include "isp/kernels/eed1_8/ia_css_eed1_8.host.h" -#include "isp/kernels/bnlm/ia_css_bnlm.host.h" -#include "isp/kernels/conversion/conversion_1.0/ia_css_conversion.host.h" -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_params.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_aa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; - - if (size) { - struct sh_css_isp_aa_params *t = (struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - t->strength = params->aa_config.strength; - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() enter:\n"); - - ia_css_anr_encode((struct sh_css_isp_anr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->anr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_anr2( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() enter:\n"); - - ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->anr_thres, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_anr2() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bh( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - ia_css_bh_encode((struct sh_css_isp_bh_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n"); - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_HMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_cnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.cnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() enter:\n"); - - ia_css_cnr_encode((struct sh_css_isp_cnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_cnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_crop( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.crop.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() enter:\n"); - - ia_css_crop_encode((struct sh_css_isp_crop_isp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->crop_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_crop() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_csc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() enter:\n"); - - ia_css_csc_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_csc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_dp( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.dp.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() enter:\n"); - - ia_css_dp_encode((struct sh_css_isp_dp_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dp_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_dp() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() enter:\n"); - - ia_css_bnr_encode((struct sh_css_isp_bnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_de( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.de.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.de.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() enter:\n"); - - ia_css_de_encode((struct sh_css_isp_de_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->de_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_de() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ecd( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ecd.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() enter:\n"); - - ia_css_ecd_encode((struct sh_css_isp_ecd_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ecd_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ecd() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_formats( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.formats.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() enter:\n"); - - ia_css_formats_encode((struct sh_css_isp_formats_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->formats_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_formats() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fpn( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fpn.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() enter:\n"); - - ia_css_fpn_encode((struct sh_css_isp_fpn_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fpn_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_fpn() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_gc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_encode((struct sh_css_isp_gc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->gc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.gc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() enter:\n"); - - ia_css_gc_vamem_encode((struct sh_css_isp_gc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->gc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_gc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ce( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ce.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() enter:\n"); - - ia_css_ce_encode((struct sh_css_isp_ce_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ce_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ce() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yuv2rgb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yuv2rgb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() enter:\n"); - - ia_css_yuv2rgb_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yuv2rgb_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yuv2rgb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_rgb2yuv( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.rgb2yuv.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() enter:\n"); - - ia_css_rgb2yuv_encode((struct sh_css_isp_csc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->rgb2yuv_cc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_rgb2yuv() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_r_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.r_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() enter:\n"); - - ia_css_r_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->r_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_r_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_g_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.g_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() enter:\n"); - - ia_css_g_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->g_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_g_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_b_gamma( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem2.b_gamma.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() enter:\n"); - - ia_css_b_gamma_vamem_encode((struct sh_css_isp_rgb_gamma_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM2].address[offset], - ¶ms->b_gamma_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM2] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_b_gamma() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_uds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.uds.offset; - - if (size) { - struct sh_css_sp_uds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() enter:\n"); - - p = (struct sh_css_sp_uds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->crop_pos = params->uds_config.crop_pos; - p->uds = params->uds_config.uds; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_uds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_raa( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.raa.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() enter:\n"); - - ia_css_raa_encode((struct sh_css_isp_aa_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->raa_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_raa() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_s3a( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.s3a.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() enter:\n"); - - ia_css_s3a_encode((struct sh_css_isp_s3a_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->s3a_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_s3a() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ob( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_encode((struct sh_css_isp_ob_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.ob.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() enter:\n"); - - ia_css_ob_vmem_encode((struct sh_css_isp_ob_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->ob_config, - ¶ms->stream_configs.ob, size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_ob() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_output( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.output.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.output.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() enter:\n"); - - ia_css_output_encode((struct sh_css_isp_output_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->output_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_output() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() enter:\n"); - - ia_css_sc_encode((struct sh_css_isp_sc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->sc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_sc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_bds( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.bds.offset; - - if (size) { - struct sh_css_isp_bds_params *p; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() enter:\n"); - - p = (struct sh_css_isp_bds_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; - p->baf_strength = params->bds_config.strength; - - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_bds() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_tnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.tnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() enter:\n"); - - ia_css_tnr_encode((struct sh_css_isp_tnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->tnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_tnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_macc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.macc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() enter:\n"); - - ia_css_macc_encode((struct sh_css_isp_macc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->macc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_macc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() enter:\n"); - - ia_css_sdis_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() enter:\n"); - - ia_css_sdis_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() enter:\n"); - - ia_css_sdis_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() enter:\n"); - - ia_css_sdis_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horicoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_horicoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() enter:\n"); - - ia_css_sdis2_horicoef_vmem_encode((struct sh_css_isp_sdis_hori_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horicoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertcoef( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.sdis2_vertcoef.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() enter:\n"); - - ia_css_sdis2_vertcoef_vmem_encode((struct sh_css_isp_sdis_vert_coef_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertcoef() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_horiproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_horiproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() enter:\n"); - - ia_css_sdis2_horiproj_encode((struct sh_css_isp_sdis_hori_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_horiproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_sdis2_vertproj( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.sdis2_vertproj.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() enter:\n"); - - ia_css_sdis2_vertproj_encode((struct sh_css_isp_sdis_vert_proj_tbl *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->dvs2_coefs, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_sdis2_vertproj() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_wb( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.wb.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() enter:\n"); - - ia_css_wb_encode((struct sh_css_isp_wb_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->wb_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_wb() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_nr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.nr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() enter:\n"); - - ia_css_nr_encode((struct sh_css_isp_ynr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->nr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_nr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_yee( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.yee.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() enter:\n"); - - ia_css_yee_encode((struct sh_css_isp_yee_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->yee_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_yee() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ynr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ynr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() enter:\n"); - - ia_css_ynr_encode((struct sh_css_isp_yee2_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ynr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ynr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_fc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.fc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() enter:\n"); - - ia_css_fc_encode((struct sh_css_isp_fc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->fc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_fc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_ctc( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_encode((struct sh_css_isp_ctc_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->ctc_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem0.ctc.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() enter:\n"); - - ia_css_ctc_vamem_encode((struct sh_css_isp_ctc_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM0].address[offset], - ¶ms->ctc_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM0] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_ctc() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr_table( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vamem1.xnr_table.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() enter:\n"); - - ia_css_xnr_table_vamem_encode((struct sh_css_isp_xnr_vamem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VAMEM1].address[offset], - ¶ms->xnr_table, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VAMEM1] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr_table() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() enter:\n"); - - ia_css_xnr_encode((struct sh_css_isp_xnr_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_process_function() */ - -static void -ia_css_process_xnr3( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) -{ - assert(params); - - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->dmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_encode((struct sh_css_isp_xnr3_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } - { - unsigned int size = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.size; - - unsigned int offset = - stage->binary->info->mem_offsets.offsets.param->vmem.xnr3.offset; - - if (size) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() enter:\n"); - - ia_css_xnr3_vmem_encode((struct sh_css_isp_xnr3_vmem_params *) - &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset], - ¶ms->xnr3_config, - size); - params->isp_params_changed = true; - params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] = - true; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_process_xnr3() leave:\n"); - } - } -} - -/* Code generated by genparam/gencode.c:gen_param_process_table() */ - -void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])( - unsigned int pipe_id, - const struct ia_css_pipeline_stage *stage, - struct ia_css_isp_parameters *params) = { - ia_css_process_aa, - ia_css_process_anr, - ia_css_process_anr2, - ia_css_process_bh, - ia_css_process_cnr, - ia_css_process_crop, - ia_css_process_csc, - ia_css_process_dp, - ia_css_process_bnr, - ia_css_process_de, - ia_css_process_ecd, - ia_css_process_formats, - ia_css_process_fpn, - ia_css_process_gc, - ia_css_process_ce, - ia_css_process_yuv2rgb, - ia_css_process_rgb2yuv, - ia_css_process_r_gamma, - ia_css_process_g_gamma, - ia_css_process_b_gamma, - ia_css_process_uds, - ia_css_process_raa, - ia_css_process_s3a, - ia_css_process_ob, - ia_css_process_output, - ia_css_process_sc, - ia_css_process_bds, - ia_css_process_tnr, - ia_css_process_macc, - ia_css_process_sdis_horicoef, - ia_css_process_sdis_vertcoef, - ia_css_process_sdis_horiproj, - ia_css_process_sdis_vertproj, - ia_css_process_sdis2_horicoef, - ia_css_process_sdis2_vertcoef, - ia_css_process_sdis2_horiproj, - ia_css_process_sdis2_vertproj, - ia_css_process_wb, - ia_css_process_nr, - ia_css_process_yee, - ia_css_process_ynr, - ia_css_process_fc, - ia_css_process_ctc, - ia_css_process_xnr_table, - ia_css_process_xnr, - ia_css_process_xnr3, -}; - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_dp_config(const struct ia_css_isp_parameters *params, - struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() enter: config=%p\n", - config); - - *config = params->dp_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_dp_config() leave\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_dp_config(struct ia_css_isp_parameters *params, - const struct ia_css_dp_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_dp_config() enter:\n"); - ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dp_config = *config; - params->config_changed[IA_CSS_DP_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_dp_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_wb_config(const struct ia_css_isp_parameters *params, - struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() enter: config=%p\n", - config); - - *config = params->wb_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_wb_config() leave\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_wb_config(struct ia_css_isp_parameters *params, - const struct ia_css_wb_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_wb_config() enter:\n"); - ia_css_wb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->wb_config = *config; - params->config_changed[IA_CSS_WB_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_wb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_tnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() enter: config=%p\n", - config); - - *config = params->tnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_tnr_config() leave\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_tnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_tnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_tnr_config() enter:\n"); - ia_css_tnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->tnr_config = *config; - params->config_changed[IA_CSS_TNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_tnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ob_config(const struct ia_css_isp_parameters *params, - struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() enter: config=%p\n", - config); - - *config = params->ob_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ob_config() leave\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ob_config(struct ia_css_isp_parameters *params, - const struct ia_css_ob_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ob_config() enter:\n"); - ia_css_ob_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ob_config = *config; - params->config_changed[IA_CSS_OB_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ob_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_de_config(const struct ia_css_isp_parameters *params, - struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() enter: config=%p\n", - config); - - *config = params->de_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_de_config() leave\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_de_config(struct ia_css_isp_parameters *params, - const struct ia_css_de_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_de_config() enter:\n"); - ia_css_de_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->de_config = *config; - params->config_changed[IA_CSS_DE_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_de_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() enter: config=%p\n", - config); - - *config = params->anr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr_config() leave\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr_config() enter:\n"); - ia_css_anr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_config = *config; - params->config_changed[IA_CSS_ANR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_anr2_config(const struct ia_css_isp_parameters *params, - struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() enter: config=%p\n", - config); - - *config = params->anr_thres; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_anr2_config() leave\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_anr2_config(struct ia_css_isp_parameters *params, - const struct ia_css_anr_thres *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_anr2_config() enter:\n"); - ia_css_anr2_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->anr_thres = *config; - params->config_changed[IA_CSS_ANR2_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_anr2_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ce_config(const struct ia_css_isp_parameters *params, - struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() enter: config=%p\n", - config); - - *config = params->ce_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ce_config() leave\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ce_config(struct ia_css_isp_parameters *params, - const struct ia_css_ce_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ce_config() enter:\n"); - ia_css_ce_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ce_config = *config; - params->config_changed[IA_CSS_CE_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ce_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ecd_config(const struct ia_css_isp_parameters *params, - struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() enter: config=%p\n", - config); - - *config = params->ecd_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ecd_config() leave\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ecd_config(struct ia_css_isp_parameters *params, - const struct ia_css_ecd_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ecd_config() enter:\n"); - ia_css_ecd_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ecd_config = *config; - params->config_changed[IA_CSS_ECD_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ecd_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ynr_config(const struct ia_css_isp_parameters *params, - struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() enter: config=%p\n", - config); - - *config = params->ynr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ynr_config() leave\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ynr_config(struct ia_css_isp_parameters *params, - const struct ia_css_ynr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ynr_config() enter:\n"); - ia_css_ynr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ynr_config = *config; - params->config_changed[IA_CSS_YNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ynr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_fc_config(const struct ia_css_isp_parameters *params, - struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() enter: config=%p\n", - config); - - *config = params->fc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_fc_config() leave\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_fc_config(struct ia_css_isp_parameters *params, - const struct ia_css_fc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_fc_config() enter:\n"); - ia_css_fc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->fc_config = *config; - params->config_changed[IA_CSS_FC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_fc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_cnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() enter: config=%p\n", - config); - - *config = params->cnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_cnr_config() leave\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_cnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_cnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_cnr_config() enter:\n"); - ia_css_cnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cnr_config = *config; - params->config_changed[IA_CSS_CNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_cnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_macc_config(const struct ia_css_isp_parameters *params, - struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() enter: config=%p\n", - config); - - *config = params->macc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_macc_config() leave\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_macc_config(struct ia_css_isp_parameters *params, - const struct ia_css_macc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_macc_config() enter:\n"); - ia_css_macc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->macc_config = *config; - params->config_changed[IA_CSS_MACC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_macc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_ctc_config(const struct ia_css_isp_parameters *params, - struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() enter: config=%p\n", - config); - - *config = params->ctc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_ctc_config() leave\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_ctc_config(struct ia_css_isp_parameters *params, - const struct ia_css_ctc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_ctc_config() enter:\n"); - ia_css_ctc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->ctc_config = *config; - params->config_changed[IA_CSS_CTC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_ctc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_aa_config(const struct ia_css_isp_parameters *params, - struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() enter: config=%p\n", - config); - - *config = params->aa_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_aa_config() leave\n"); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_aa_config(struct ia_css_isp_parameters *params, - const struct ia_css_aa_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_aa_config() enter:\n"); - params->aa_config = *config; - params->config_changed[IA_CSS_AA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_aa_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_yuv2rgb_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() enter: config=%p\n", - config); - - *config = params->yuv2rgb_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_yuv2rgb_config() leave\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_yuv2rgb_config() enter:\n"); - ia_css_yuv2rgb_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->yuv2rgb_cc_config = *config; - params->config_changed[IA_CSS_YUV2RGB_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_yuv2rgb_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_rgb2yuv_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() enter: config=%p\n", - config); - - *config = params->rgb2yuv_cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_rgb2yuv_config() leave\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_rgb2yuv_config() enter:\n"); - ia_css_rgb2yuv_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->rgb2yuv_cc_config = *config; - params->config_changed[IA_CSS_RGB2YUV_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_rgb2yuv_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_csc_config(const struct ia_css_isp_parameters *params, - struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() enter: config=%p\n", - config); - - *config = params->cc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_csc_config() leave\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_csc_config(struct ia_css_isp_parameters *params, - const struct ia_css_cc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_csc_config() enter:\n"); - ia_css_csc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->cc_config = *config; - params->config_changed[IA_CSS_CSC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_csc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_nr_config(const struct ia_css_isp_parameters *params, - struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() enter: config=%p\n", - config); - - *config = params->nr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_nr_config() leave\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_nr_config(struct ia_css_isp_parameters *params, - const struct ia_css_nr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_nr_config() enter:\n"); - ia_css_nr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->nr_config = *config; - params->config_changed[IA_CSS_BNR_ID] = true; - params->config_changed[IA_CSS_NR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_nr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_gc_config(const struct ia_css_isp_parameters *params, - struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() enter: config=%p\n", - config); - - *config = params->gc_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_gc_config() leave\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_gc_config(struct ia_css_isp_parameters *params, - const struct ia_css_gc_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_gc_config() enter:\n"); - ia_css_gc_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->gc_config = *config; - params->config_changed[IA_CSS_GC_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_gc_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horicoef_config() leave\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horicoef_config() enter:\n"); - ia_css_sdis_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertcoef_config() leave\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertcoef_config() enter:\n"); - ia_css_sdis_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_horiproj_config() leave\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_horiproj_config() enter:\n"); - ia_css_sdis_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis_vertproj_config() leave\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis_vertproj_config() enter:\n"); - ia_css_sdis_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs_coefs = *config; - params->config_changed[IA_CSS_SDIS_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horicoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horicoef_config() leave\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horicoef_config() enter:\n"); - ia_css_sdis2_horicoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horicoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertcoef_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertcoef_config() leave\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertcoef_config() enter:\n"); - ia_css_sdis2_vertcoef_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertcoef_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_horiproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_horiproj_config() leave\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_horiproj_config() enter:\n"); - ia_css_sdis2_horiproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_horiproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_sdis2_vertproj_config(const struct ia_css_isp_parameters *params, - struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() enter: config=%p\n", - config); - - *config = params->dvs2_coefs; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_sdis2_vertproj_config() leave\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params, - const struct ia_css_dvs2_coefficients *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_sdis2_vertproj_config() enter:\n"); - ia_css_sdis2_vertproj_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->dvs2_coefs = *config; - params->config_changed[IA_CSS_SDIS2_HORICOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTCOEF_ID] = true; - params->config_changed[IA_CSS_SDIS2_HORIPROJ_ID] = true; - params->config_changed[IA_CSS_SDIS2_VERTPROJ_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_sdis2_vertproj_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_r_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() enter: config=%p\n", - config); - - *config = params->r_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_r_gamma_config() leave\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_r_gamma_config() enter:\n"); - ia_css_r_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->r_gamma_table = *config; - params->config_changed[IA_CSS_R_GAMMA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_r_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_g_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() enter: config=%p\n", - config); - - *config = params->g_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_g_gamma_config() leave\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_g_gamma_config() enter:\n"); - ia_css_g_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->g_gamma_table = *config; - params->config_changed[IA_CSS_G_GAMMA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_g_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_b_gamma_config(const struct ia_css_isp_parameters *params, - struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() enter: config=%p\n", - config); - - *config = params->b_gamma_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_b_gamma_config() leave\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params, - const struct ia_css_rgb_gamma_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_b_gamma_config() enter:\n"); - ia_css_b_gamma_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->b_gamma_table = *config; - params->config_changed[IA_CSS_B_GAMMA_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_b_gamma_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_table_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() enter: config=%p\n", - config); - - *config = params->xnr_table; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_table_config() leave\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_table *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, - "ia_css_set_xnr_table_config() enter:\n"); - ia_css_xnr_table_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_table = *config; - params->config_changed[IA_CSS_XNR_TABLE_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_table_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_formats_config(const struct ia_css_isp_parameters *params, - struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() enter: config=%p\n", - config); - - *config = params->formats_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_formats_config() leave\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_formats_config(struct ia_css_isp_parameters *params, - const struct ia_css_formats_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_formats_config() enter:\n"); - ia_css_formats_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->formats_config = *config; - params->config_changed[IA_CSS_FORMATS_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_formats_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() enter: config=%p\n", - config); - - *config = params->xnr_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr_config() leave\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr_config() enter:\n"); - ia_css_xnr_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr_config = *config; - params->config_changed[IA_CSS_XNR_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_xnr3_config(const struct ia_css_isp_parameters *params, - struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() enter: config=%p\n", - config); - - *config = params->xnr3_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_xnr3_config() leave\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_xnr3_config(struct ia_css_isp_parameters *params, - const struct ia_css_xnr3_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_xnr3_config() enter:\n"); - ia_css_xnr3_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->xnr3_config = *config; - params->config_changed[IA_CSS_XNR3_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_xnr3_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_s3a_config(const struct ia_css_isp_parameters *params, - struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() enter: config=%p\n", - config); - - *config = params->s3a_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_s3a_config() leave\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_s3a_config(struct ia_css_isp_parameters *params, - const struct ia_css_3a_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_s3a_config() enter:\n"); - ia_css_s3a_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->s3a_config = *config; - params->config_changed[IA_CSS_BH_ID] = true; - params->config_changed[IA_CSS_S3A_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_s3a_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_get_function() */ - -static void -ia_css_get_output_config(const struct ia_css_isp_parameters *params, - struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() enter: config=%p\n", - config); - - *config = params->output_config; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_get_output_config() leave\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); -} - -/* Code generated by genparam/gencode.c:gen_set_function() */ - -void -ia_css_set_output_config(struct ia_css_isp_parameters *params, - const struct ia_css_output_config *config) -{ - if (!config) - return; - - assert(params); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_set_output_config() enter:\n"); - ia_css_output_debug_dtrace(config, IA_CSS_DEBUG_TRACE); - params->output_config = *config; - params->config_changed[IA_CSS_OUTPUT_ID] = true; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_set_output_config() leave: return_void\n"); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_get_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_get_dp_config(params, config->dp_config); - ia_css_get_wb_config(params, config->wb_config); - ia_css_get_tnr_config(params, config->tnr_config); - ia_css_get_ob_config(params, config->ob_config); - ia_css_get_de_config(params, config->de_config); - ia_css_get_anr_config(params, config->anr_config); - ia_css_get_anr2_config(params, config->anr_thres); - ia_css_get_ce_config(params, config->ce_config); - ia_css_get_ecd_config(params, config->ecd_config); - ia_css_get_ynr_config(params, config->ynr_config); - ia_css_get_fc_config(params, config->fc_config); - ia_css_get_cnr_config(params, config->cnr_config); - ia_css_get_macc_config(params, config->macc_config); - ia_css_get_ctc_config(params, config->ctc_config); - ia_css_get_aa_config(params, config->aa_config); - ia_css_get_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_get_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_get_csc_config(params, config->cc_config); - ia_css_get_nr_config(params, config->nr_config); - ia_css_get_gc_config(params, config->gc_config); - ia_css_get_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_get_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_get_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_get_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_get_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_get_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_get_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_get_r_gamma_config(params, config->r_gamma_table); - ia_css_get_g_gamma_config(params, config->g_gamma_table); - ia_css_get_b_gamma_config(params, config->b_gamma_table); - ia_css_get_xnr_table_config(params, config->xnr_table); - ia_css_get_formats_config(params, config->formats_config); - ia_css_get_xnr_config(params, config->xnr_config); - ia_css_get_xnr3_config(params, config->xnr3_config); - ia_css_get_s3a_config(params, config->s3a_config); - ia_css_get_output_config(params, config->output_config); -} - -/* Code generated by genparam/gencode.c:gen_global_access_function() */ - -void -ia_css_set_configs(struct ia_css_isp_parameters *params, - const struct ia_css_isp_config *config) -{ - ia_css_set_dp_config(params, config->dp_config); - ia_css_set_wb_config(params, config->wb_config); - ia_css_set_tnr_config(params, config->tnr_config); - ia_css_set_ob_config(params, config->ob_config); - ia_css_set_de_config(params, config->de_config); - ia_css_set_anr_config(params, config->anr_config); - ia_css_set_anr2_config(params, config->anr_thres); - ia_css_set_ce_config(params, config->ce_config); - ia_css_set_ecd_config(params, config->ecd_config); - ia_css_set_ynr_config(params, config->ynr_config); - ia_css_set_fc_config(params, config->fc_config); - ia_css_set_cnr_config(params, config->cnr_config); - ia_css_set_macc_config(params, config->macc_config); - ia_css_set_ctc_config(params, config->ctc_config); - ia_css_set_aa_config(params, config->aa_config); - ia_css_set_yuv2rgb_config(params, config->yuv2rgb_cc_config); - ia_css_set_rgb2yuv_config(params, config->rgb2yuv_cc_config); - ia_css_set_csc_config(params, config->cc_config); - ia_css_set_nr_config(params, config->nr_config); - ia_css_set_gc_config(params, config->gc_config); - ia_css_set_sdis_horicoef_config(params, config->dvs_coefs); - ia_css_set_sdis_vertcoef_config(params, config->dvs_coefs); - ia_css_set_sdis_horiproj_config(params, config->dvs_coefs); - ia_css_set_sdis_vertproj_config(params, config->dvs_coefs); - ia_css_set_sdis2_horicoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertcoef_config(params, config->dvs2_coefs); - ia_css_set_sdis2_horiproj_config(params, config->dvs2_coefs); - ia_css_set_sdis2_vertproj_config(params, config->dvs2_coefs); - ia_css_set_r_gamma_config(params, config->r_gamma_table); - ia_css_set_g_gamma_config(params, config->g_gamma_table); - ia_css_set_b_gamma_config(params, config->b_gamma_table); - ia_css_set_xnr_table_config(params, config->xnr_table); - ia_css_set_formats_config(params, config->formats_config); - ia_css_set_xnr_config(params, config->xnr_config); - ia_css_set_xnr3_config(params, config->xnr3_config); - ia_css_set_s3a_config(params, config->s3a_config); - ia_css_set_output_config(params, config->output_config); -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c deleted file mode 100644 index c54787f3fc244..0000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -/* Generated code: do not edit or commmit. */ - -#include "ia_css_pipeline.h" -#include "ia_css_isp_states.h" -#include "ia_css_debug.h" -#include "assert_support.h" - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_aa_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size; - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset; - - if (size) - memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - 0, size); - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_aa_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr.offset; - - if (size) { - ia_css_init_cnr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_cnr2_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.cnr2.offset; - - if (size) { - ia_css_init_cnr2_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_cnr2_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_dp_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.dp.offset; - - if (size) { - ia_css_init_dp_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_dp_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_de_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.de.offset; - - if (size) { - ia_css_init_de_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_de_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_tnr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.tnr.offset; - - if (size) { - ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_tnr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ref_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->dmem.ref.offset; - - if (size) { - ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ref_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_init_function() */ - -static void -ia_css_initialize_ynr_state( - const struct ia_css_binary *binary) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() enter:\n"); - - { - unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size; - - unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.ynr.offset; - - if (size) { - ia_css_init_ynr_state( - &binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], - size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_initialize_ynr_state() leave:\n"); -} - -/* Code generated by genparam/genstate.c:gen_state_init_table() */ - -void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])( - const struct ia_css_binary *binary) = { - ia_css_initialize_aa_state, - ia_css_initialize_cnr_state, - ia_css_initialize_cnr2_state, - ia_css_initialize_dp_state, - ia_css_initialize_de_state, - ia_css_initialize_tnr_state, - ia_css_initialize_ref_state, - ia_css_initialize_ynr_state, -}; diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/csi_rx_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/csi_rx_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/ibuf_ctrl_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/ibuf_ctrl_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_dma_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_dma_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_irq_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_irq_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio.c b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio.c similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio.c rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio.c diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/isys_stream2mmio_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_local.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_local.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_local.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_local.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_private.h b/drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_private.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/host/pixelgen_private.h rename to drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_private.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/PixelGen_SysBlock_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/PixelGen_SysBlock_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/PixelGen_SysBlock_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/ibuf_cntrl_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/ibuf_cntrl_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_common_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_common_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_common_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/mipi_backend_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/mipi_backend_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/rx_csi_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/rx_csi_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/rx_csi_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/rx_csi_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/stream2mmio_defs.h b/drivers/staging/media/atomisp/pci/css_2401_system/hrt/stream2mmio_defs.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/hrt/stream2mmio_defs.h rename to drivers/staging/media/atomisp/pci/css_2401_system/hrt/stream2mmio_defs.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/ibuf_ctrl_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/ibuf_ctrl_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/ibuf_ctrl_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/ibuf_ctrl_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_dma_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/isys_dma_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_dma_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/isys_dma_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_irq_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/isys_irq_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_irq_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/isys_irq_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_stream2mmio_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/isys_stream2mmio_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/isys_stream2mmio_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/isys_stream2mmio_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_csi2p_system/pixelgen_global.h b/drivers/staging/media/atomisp/pci/css_2401_system/pixelgen_global.h similarity index 100% rename from drivers/staging/media/atomisp/pci/css_2401_csi2p_system/pixelgen_global.h rename to drivers/staging/media/atomisp/pci/css_2401_system/pixelgen_global.h diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c index 9d049399d0a9f..9d96d52e5eccd 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c +++ b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c @@ -21,219 +21,215 @@ #define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) -/* function input_system_acquisition_stop: AD8 */ +/* function longjmp: 6A0B */ -/* function longjmp: 69C1 */ +/* function tmpmem_init_dmem: 671E */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_MASK -#define HIVE_MEM_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_HIVE_IF_SRST_MASK 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 +/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ -/* function tmpmem_init_dmem: 66D4 */ - -/* function ia_css_isys_sp_token_map_receive_ack: 6018 */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 3539 */ - -/* function ia_css_pipe_data_init_tagger_resources: A4F */ +/* function ia_css_pipe_data_init_tagger_resources: AC7 */ /* function debug_buffer_set_ddr_addr: DD */ -/* function receiver_port_reg_load: ABC */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_mipi #define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x6378 +#define HIVE_ADDR_vbuf_mipi 0x7444 #define HIVE_SIZE_vbuf_mipi 12 #else #endif #endif #define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x6378 +#define HIVE_ADDR_sp_vbuf_mipi 0x7444 #define HIVE_SIZE_sp_vbuf_mipi 12 -/* function ia_css_event_sp_decode: 372A */ +/* function ia_css_event_sp_decode: 3FB6 */ -/* function ia_css_queue_get_size: 4B46 */ +/* function ia_css_queue_get_size: 53C8 */ -/* function ia_css_queue_load: 515D */ +/* function ia_css_queue_load: 59DF */ -/* function setjmp: 69CA */ +/* function setjmp: 6A14 */ + +/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue #define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x46CC +#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC #define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x46CC +#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC #define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 -/* function ia_css_dmaproxy_sp_wait_for_ack: 6F4B */ +/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ -/* function ia_css_sp_rawcopy_func: 5382 */ +/* function ia_css_sp_rawcopy_func: 5B4A */ -/* function ia_css_tagger_buf_sp_pop_marked: 2BB2 */ +/* function ia_css_tagger_buf_sp_pop_marked: 345C */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH +#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem +#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0 +#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0 +#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stage #define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x5C60 +#define HIVE_ADDR_isp_stage 0x6D48 #define HIVE_SIZE_isp_stage 832 #else #endif #endif #define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x5C60 +#define HIVE_ADDR_sp_isp_stage 0x6D48 #define HIVE_SIZE_sp_isp_stage 832 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_raw #define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x30C +#define HIVE_ADDR_vbuf_raw 0x394 #define HIVE_SIZE_vbuf_raw 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x30C +#define HIVE_ADDR_sp_vbuf_raw 0x394 #define HIVE_SIZE_sp_vbuf_raw 4 -/* function ia_css_sp_bin_copy_func: 52A9 */ +/* function ia_css_sp_bin_copy_func: 5B2B */ + +/* function ia_css_queue_item_store: 572D */ -/* function ia_css_queue_item_store: 4EAB */ +/* function input_system_reset: 1201 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AFC +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4B10 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -/* function sp_start_isp: 45D */ +/* function sp_start_isp: 39C */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_binary_group #define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x6050 +#define HIVE_ADDR_sp_binary_group 0x7138 #define HIVE_SIZE_sp_binary_group 32 #else #endif #endif #define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x6050 +#define HIVE_ADDR_sp_sp_binary_group 0x7138 #define HIVE_SIZE_sp_sp_binary_group 32 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sw_state #define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x6308 +#define HIVE_ADDR_sp_sw_state 0x73F0 #define HIVE_SIZE_sp_sw_state 4 #else #endif #endif #define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x6308 +#define HIVE_ADDR_sp_sp_sw_state 0x73F0 #define HIVE_SIZE_sp_sp_sw_state 4 -/* function ia_css_thread_sp_main: D50 */ +/* function ia_css_thread_sp_main: 136D */ -/* function ia_css_ispctrl_sp_init_internal_buffers: 396B */ +/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_psys_event_queue_handle #define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4BB0 +#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 #define HIVE_SIZE_sp2host_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4BB0 +#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 #define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 +/* function pixelgen_unit_test: E62 */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue #define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x46E0 +#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 #define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x46E0 +#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 #define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 -/* function ia_css_tagger_sp_propagate_frame: 2479 */ - -/* function input_system_reg_load: B11 */ +/* function ia_css_tagger_sp_propagate_frame: 2D23 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_handles #define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x6384 +#define HIVE_ADDR_vbuf_handles 0x7450 #define HIVE_SIZE_vbuf_handles 960 #else #endif #endif #define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x6384 +#define HIVE_ADDR_sp_vbuf_handles 0x7450 #define HIVE_SIZE_sp_vbuf_handles 960 -/* function ia_css_queue_store: 5011 */ +/* function ia_css_queue_store: 5893 */ -/* function ia_css_sp_flash_register: 2DE7 */ +/* function ia_css_sp_flash_register: 3691 */ -/* function ia_css_isys_sp_backend_create: 5C8B */ +/* function ia_css_pipeline_sp_init: 1FD7 */ -/* function ia_css_pipeline_sp_init: 1886 */ +/* function ia_css_tagger_sp_configure: 2C13 */ -/* function ia_css_tagger_sp_configure: 2369 */ - -/* function ia_css_ispctrl_sp_end_binary: 3773 */ +/* function ia_css_ispctrl_sp_end_binary: 3FFF */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4BBC +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -/* function receiver_port_reg_store: AC3 */ +/* function pixelgen_tpg_run: F18 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_is_pending_mask @@ -250,182 +246,228 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_frame #define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x46F4 +#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 #define HIVE_SIZE_sp_all_cb_elems_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46F4 +#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 #define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_isys_event_queue_handle #define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4BD0 +#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 #define HIVE_SIZE_sp2host_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4BD0 +#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 #define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_com #define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x4134 +#define HIVE_ADDR_host_sp_com 0x3E6C #define HIVE_SIZE_host_sp_com 220 #else #endif #endif #define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x4134 +#define HIVE_ADDR_sp_host_sp_com 0x3E6C #define HIVE_SIZE_sp_host_sp_com 220 -/* function ia_css_queue_get_free_space: 4C70 */ +/* function ia_css_queue_get_free_space: 54F2 */ -/* function exec_image_pipe: 658 */ +/* function exec_image_pipe: 57A */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_init_dmem_data #define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x630C +#define HIVE_ADDR_sp_init_dmem_data 0x73F4 #define HIVE_SIZE_sp_init_dmem_data 24 #else #endif #endif #define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x630C +#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 #define HIVE_SIZE_sp_sp_init_dmem_data 24 -/* function ia_css_sp_metadata_start: 5A68 */ +/* function ia_css_sp_metadata_start: 5EB3 */ -/* function ia_css_bufq_sp_init_buffer_queues: 2E56 */ +/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ -/* function ia_css_pipeline_sp_stop: 1869 */ +/* function ia_css_pipeline_sp_stop: 1FBA */ -/* function ia_css_tagger_sp_connect_pipes: 2853 */ +/* function ia_css_tagger_sp_connect_pipes: 30FD */ -/* function sp_isys_copy_wait: 6A1 */ +/* function sp_isys_copy_wait: 5D8 */ /* function is_isp_debug_buffer_full: 337 */ -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 34A9 */ +/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ + +/* function encode_and_post_timer_event: A3C */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_input_system_bz2788_active +#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem +#define HIVE_ADDR_input_system_bz2788_active 0x2524 +#define HIVE_SIZE_input_system_bz2788_active 4 +#else +#endif +#endif +#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem +#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 +#define HIVE_SIZE_sp_input_system_bz2788_active 4 -/* function encode_and_post_timer_event: 9C4 */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS +#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC +#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC +#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_per_frame_data #define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x4210 +#define HIVE_ADDR_sp_per_frame_data 0x3F48 #define HIVE_SIZE_sp_per_frame_data 4 #else #endif #endif #define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x4210 +#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 #define HIVE_SIZE_sp_sp_per_frame_data 4 -/* function ia_css_rmgr_sp_vbuf_dequeue: 6428 */ +/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_psys_event_queue_handle #define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4BDC +#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 #define HIVE_SIZE_host2sp_psys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4BDC +#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 #define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_xmem_bin_addr #define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x4214 +#define HIVE_ADDR_xmem_bin_addr 0x3F4C #define HIVE_SIZE_xmem_bin_addr 4 #else #endif #endif #define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x4214 +#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C #define HIVE_SIZE_sp_xmem_bin_addr 4 -/* function tmr_clock_init: 141C */ +/* function tmr_clock_init: 166F */ -/* function ia_css_pipeline_sp_run: 143D */ +/* function ia_css_pipeline_sp_run: 1A61 */ -/* function memcpy: 6A6A */ +/* function memcpy: 6AB4 */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS +#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 +#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4 +#else +#endif +#endif +#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 +#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GP_DEVICE_BASE #define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x314 +#define HIVE_ADDR_GP_DEVICE_BASE 0x39C #define HIVE_SIZE_GP_DEVICE_BASE 4 #else #endif #endif #define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x314 +#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C #define HIVE_SIZE_sp_GP_DEVICE_BASE 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_ready_queue #define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E4 +#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C #define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E4 +#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C #define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 -/* function input_system_reg_store: B18 */ +/* function stream2mmio_send_command: E04 */ -/* function ia_css_isys_sp_frontend_start: 5EA1 */ +/* function ia_css_uds_sp_scale_params: 67BD */ -/* function ia_css_uds_sp_scale_params: 6773 */ +/* function ia_css_circbuf_increase_size: 1452 */ -/* function ia_css_circbuf_increase_size: E35 */ +/* function __divu: 6A32 */ -/* function __divu: 69E8 */ - -/* function ia_css_thread_sp_get_state: C78 */ +/* function ia_css_thread_sp_get_state: 1295 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_stop #define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x4704 +#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 #define HIVE_SIZE_sem_for_cont_capt_stop 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x4704 +#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 #define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 -/* function thread_fiber_sp_main: E2E */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES +#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC +#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC +#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 + +/* function thread_fiber_sp_main: 144B */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_pipe_thread #define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x4848 +#define HIVE_ADDR_sp_isp_pipe_thread 0x5978 #define HIVE_SIZE_sp_isp_pipe_thread 360 #else #endif #endif #define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4848 +#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 #define HIVE_SIZE_sp_sp_isp_pipe_thread 360 -/* function ia_css_parambuf_sp_handle_parameter_sets: 127F */ +/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ -/* function ia_css_spctrl_sp_set_state: 5A97 */ +/* function ia_css_spctrl_sp_set_state: 5ECF */ -/* function ia_css_thread_sem_sp_signal: 6C6C */ +/* function ia_css_thread_sem_sp_signal: 6D18 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_IRQ_BASE @@ -439,6 +481,8 @@ #define HIVE_ADDR_sp_IRQ_BASE 0x2C #define HIVE_SIZE_sp_IRQ_BASE 16 +/* function ia_css_virtual_isys_sp_isr_init: 5F70 */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_TIMED_CTRL_BASE #define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem @@ -451,212 +495,220 @@ #define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 #define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 -/* function ia_css_isys_sp_isr: 7139 */ +/* function ia_css_isys_sp_generate_exp_id: 6302 */ -/* function ia_css_isys_sp_generate_exp_id: 6239 */ +/* function ia_css_rmgr_sp_init: 636D */ -/* function ia_css_rmgr_sp_init: 6323 */ - -/* function ia_css_thread_sem_sp_init: 6D3B */ +/* function ia_css_thread_sem_sp_init: 6DE7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_frame #define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x4718 +#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 #define HIVE_SIZE_sem_for_reading_cb_frame 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x4718 +#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 #define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_is_isp_requested #define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x320 +#define HIVE_ADDR_is_isp_requested 0x3A8 #define HIVE_SIZE_is_isp_requested 4 #else #endif #endif #define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x320 +#define HIVE_ADDR_sp_is_isp_requested 0x3A8 #define HIVE_SIZE_sp_is_isp_requested 4 -/* function ia_css_dmaproxy_sp_execute: 340F */ +/* function ia_css_dmaproxy_sp_execute: 3C9B */ + +/* function csi_rx_backend_rst: CE0 */ -/* function ia_css_queue_is_empty: 7098 */ +/* function ia_css_queue_is_empty: 7144 */ -/* function ia_css_pipeline_sp_has_stopped: 185F */ +/* function ia_css_pipeline_sp_has_stopped: 1FB0 */ -/* function ia_css_circbuf_extract: F39 */ +/* function ia_css_circbuf_extract: 1556 */ -/* function ia_css_tagger_buf_sp_is_locked_from_start: 2CC8 */ +/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_sp_thread #define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x1DC +#define HIVE_ADDR_current_sp_thread 0x274 #define HIVE_SIZE_current_sp_thread 4 #else #endif #endif #define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x1DC +#define HIVE_ADDR_sp_current_sp_thread 0x274 #define HIVE_SIZE_sp_current_sp_thread 4 -/* function ia_css_spctrl_sp_get_spid: 5A9E */ +/* function ia_css_spctrl_sp_get_spid: 5ED6 */ -/* function ia_css_bufq_sp_reset_buffers: 2EDD */ +/* function ia_css_bufq_sp_reset_buffers: 3769 */ -/* function ia_css_dmaproxy_sp_read_byte_addr: 6F79 */ +/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ -/* function ia_css_rmgr_sp_uninit: 631C */ +/* function ia_css_rmgr_sp_uninit: 6366 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_stack #define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem #define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 28 +#define HIVE_SIZE_sp_threads_stack 24 #else #endif #endif #define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem #define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 28 +#define HIVE_SIZE_sp_sp_threads_stack 24 -/* function ia_css_circbuf_peek: F1B */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS +#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218 +#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 +#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 -/* function ia_css_parambuf_sp_wait_for_in_param: 1048 */ +/* function ia_css_circbuf_peek: 1538 */ -/* function ia_css_isys_sp_token_map_get_exp_id: 6101 */ +/* function ia_css_parambuf_sp_wait_for_in_param: 167E */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cb_elems_param #define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x4740 +#define HIVE_ADDR_sp_all_cb_elems_param 0x5870 #define HIVE_SIZE_sp_all_cb_elems_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x4740 +#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 #define HIVE_SIZE_sp_sp_all_cb_elems_param 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_pipeline_sp_curr_binary_id #define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1F0 +#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 #define HIVE_SIZE_pipeline_sp_curr_binary_id 4 #else #endif #endif #define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1F0 +#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 #define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame_desc #define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4750 +#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 #define HIVE_SIZE_sp_all_cbs_frame_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4750 +#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 #define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 -/* function sp_isys_copy_func_v2: 69A */ +/* function sp_isys_copy_func_v2: 5BD */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_cb_param #define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x4758 +#define HIVE_ADDR_sem_for_reading_cb_param 0x5888 #define HIVE_SIZE_sem_for_reading_cb_param 40 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4758 +#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 #define HIVE_SIZE_sp_sem_for_reading_cb_param 40 -/* function ia_css_queue_get_used_space: 4C24 */ +/* function ia_css_queue_get_used_space: 54A6 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_cont_capt_start #define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x4780 +#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 #define HIVE_SIZE_sem_for_cont_capt_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4780 +#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 #define HIVE_SIZE_sp_sem_for_cont_capt_start 20 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tmp_heap #define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x6070 +#define HIVE_ADDR_tmp_heap 0x7158 #define HIVE_SIZE_tmp_heap 640 #else #endif #endif #define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x6070 +#define HIVE_ADDR_sp_tmp_heap 0x7158 #define HIVE_SIZE_sp_tmp_heap 640 -/* function ia_css_rmgr_sp_get_num_vbuf: 662C */ +/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ -/* function ia_css_ispctrl_sp_output_compute_dma_info: 41A5 */ +/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ -/* function ia_css_tagger_sp_lock_exp_id: 2136 */ +/* function ia_css_tagger_sp_lock_exp_id: 29E0 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4BE8 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -/* function ia_css_queue_is_full: 4CBB */ +/* function ia_css_queue_is_full: 553D */ /* function debug_buffer_init_isp: E4 */ -/* function ia_css_isys_sp_frontend_uninit: 5E5B */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 206C */ +/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem #define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 #define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 #else #endif #endif #define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x6744 +#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 #define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 -/* function ia_css_rmgr_sp_refcount_dump: 6403 */ +/* function ia_css_rmgr_sp_refcount_dump: 644D */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id #define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4C24 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -671,65 +723,77 @@ #define HIVE_ADDR_sp_sp_pipe_threads 0x150 #define HIVE_SIZE_sp_sp_pipe_threads 20 -/* function sp_event_proxy_func: 6AF */ +/* function sp_event_proxy_func: 721 */ + +/* function ibuf_ctrl_run: D79 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_isys_event_queue_handle #define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4C38 +#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 #define HIVE_SIZE_host2sp_isys_event_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4C38 +#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 #define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 -/* function ia_css_thread_sp_yield: 6BEA */ +/* function ia_css_thread_sp_yield: 6C96 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param_desc #define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x4794 +#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 #define HIVE_SIZE_sp_all_cbs_param_desc 8 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x4794 +#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 #define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb #define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 #define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5C50 +#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 #define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 -/* function ia_css_thread_sp_fork: D05 */ +/* function ia_css_thread_sp_fork: 1322 */ -/* function ia_css_tagger_sp_destroy: 285D */ +/* function ia_css_tagger_sp_destroy: 3107 */ -/* function ia_css_dmaproxy_sp_vmem_read: 33AF */ +/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ -/* function ia_css_ifmtr_sp_init: 628A */ +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES +#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8 +#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12 +#else +#endif +#endif +#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 +#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 -/* function initialize_sp_group: 668 */ +/* function initialize_sp_group: 58A */ -/* function ia_css_tagger_buf_sp_peek: 2AD4 */ +/* function ia_css_tagger_buf_sp_peek: 337E */ -/* function ia_css_thread_sp_init: D31 */ +/* function ia_css_thread_sp_init: 134E */ -/* function ia_css_isys_sp_reset_exp_id: 6231 */ +/* function qos_scheduler_update_fps: 67AD */ -/* function qos_scheduler_update_fps: 6763 */ +/* function ia_css_isys_sp_reset_exp_id: 62F9 */ -/* function ia_css_ispctrl_sp_set_stream_base_addr: 4892 */ +/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_DMEM_BASE @@ -755,46 +819,50 @@ #define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 #define HIVE_SIZE_sp_SP_DMEM_BASE 4 -/* function __ia_css_queue_is_empty_text: 4B81 */ +/* function ibuf_ctrl_transfer: D61 */ + +/* function __ia_css_queue_is_empty_text: 5403 */ + +/* function ia_css_dmaproxy_sp_read: 3CB1 */ -/* function ia_css_dmaproxy_sp_read: 3425 */ +/* function virtual_isys_stream_is_capture_done: 5F94 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_raw_copy_line_count #define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x2E0 +#define HIVE_ADDR_raw_copy_line_count 0x378 #define HIVE_SIZE_raw_copy_line_count 4 #else #endif #endif #define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x2E0 +#define HIVE_ADDR_sp_raw_copy_line_count 0x378 #define HIVE_SIZE_sp_raw_copy_line_count 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle #define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4C44 +#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C #define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 #else #endif #endif #define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4C44 +#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C #define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 -/* function ia_css_queue_peek: 4B9A */ +/* function ia_css_queue_peek: 541C */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt #define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4AF0 +#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 #define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4AF0 +#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 #define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 #ifndef HIVE_MULTIPLE_PROGRAMS @@ -809,136 +877,132 @@ #define HIVE_ADDR_sp_event_can_send_token_mask 0x88 #define HIVE_SIZE_sp_event_can_send_token_mask 44 +/* function csi_rx_frontend_stop: C0B */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_thread #define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x5FA0 +#define HIVE_ADDR_isp_thread 0x7088 #define HIVE_SIZE_isp_thread 4 #else #endif #endif #define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x5FA0 +#define HIVE_ADDR_sp_isp_thread 0x7088 #define HIVE_SIZE_sp_isp_thread 4 -/* function encode_and_post_sp_event_non_blocking: A0C */ - -/* function ia_css_isys_sp_frontend_destroy: 5F33 */ +/* function encode_and_post_sp_event_non_blocking: A84 */ /* function is_ddr_debug_buffer_full: 2CC */ -/* function ia_css_isys_sp_frontend_stop: 5E73 */ - -/* function ia_css_isys_sp_token_map_init: 61CF */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2B24 */ +/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_fiber #define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_threads_fiber 28 +#define HIVE_ADDR_sp_threads_fiber 0x194 +#define HIVE_SIZE_sp_threads_fiber 24 #else #endif #endif #define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_sp_threads_fiber 28 +#define HIVE_ADDR_sp_sp_threads_fiber 0x194 +#define HIVE_SIZE_sp_sp_threads_fiber 24 -/* function encode_and_post_sp_event: 995 */ +/* function encode_and_post_sp_event: A0D */ /* function debug_enqueue_ddr: EE */ -/* function ia_css_rmgr_sp_refcount_init_vbuf: 63BE */ +/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ -/* function dmaproxy_sp_read_write: 7017 */ +/* function dmaproxy_sp_read_write: 70C3 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer #define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C #define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5C54 +#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C #define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host2sp_buffer_queue_handle #define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4C50 +#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 #define HIVE_SIZE_host2sp_buffer_queue_handle 480 #else #endif #endif #define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4C50 +#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 #define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_service #define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3198 +#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 #define HIVE_SIZE_ia_css_flash_sp_in_service 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3198 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 #define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 -/* function ia_css_dmaproxy_sp_process: 6D63 */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 2DAC */ +/* function ia_css_dmaproxy_sp_process: 6E0F */ -/* function ia_css_isys_sp_backend_rcv_acquire_ack: 5B40 */ +/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ -/* function ia_css_isys_sp_backend_pre_acquire_request: 5B56 */ +/* function ia_css_ispctrl_sp_init_cs: 40FA */ -/* function ia_css_ispctrl_sp_init_cs: 386E */ +/* function ia_css_spctrl_sp_init: 5EE4 */ -/* function ia_css_spctrl_sp_init: 5AAC */ +/* function sp_event_proxy_init: 736 */ -/* function sp_event_proxy_init: 6C4 */ +/* function input_system_input_port_close: 1095 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick #define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4E30 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_output #define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x4218 +#define HIVE_ADDR_sp_output 0x3F50 #define HIVE_SIZE_sp_output 16 #else #endif #endif #define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x4218 +#define HIVE_ADDR_sp_sp_output 0x3F50 #define HIVE_SIZE_sp_sp_output 16 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 #define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4E58 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 +/* function pixelgen_prbs_config: E8D */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_CTRL_BASE #define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem @@ -963,107 +1027,109 @@ #define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C #define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 -/* function sp_dma_proxy_reset_channels: 3694 */ - -/* function ia_css_isys_sp_backend_acquire: 5C61 */ +/* function sp_dma_proxy_reset_channels: 3F20 */ -/* function ia_css_tagger_sp_update_size: 2AA3 */ +/* function ia_css_tagger_sp_update_size: 334D */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_host_sp_queue #define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x5178 +#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 #define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x5178 +#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 #define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 -/* function thread_fiber_sp_create: D9D */ +/* function thread_fiber_sp_create: 13BA */ -/* function ia_css_dmaproxy_sp_set_increments: 3526 */ +/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_frame #define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x479C +#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC #define HIVE_SIZE_sem_for_writing_cb_frame 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x479C +#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC #define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 -/* function receiver_reg_store: AD1 */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_writing_cb_param #define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x47B0 +#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 #define HIVE_SIZE_sem_for_writing_cb_param 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x47B0 +#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 #define HIVE_SIZE_sp_sem_for_writing_cb_param 20 -/* function sp_start_isp_entry: 453 */ +/* function pixelgen_tpg_is_done: F07 */ + +/* function ia_css_isys_stream_capture_indication: 60D7 */ + +/* function sp_start_isp_entry: 392 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifdef HIVE_ADDR_sp_start_isp_entry #endif -#define HIVE_ADDR_sp_start_isp_entry 0x453 +#define HIVE_ADDR_sp_start_isp_entry 0x392 #endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x453 +#define HIVE_ADDR_sp_sp_start_isp_entry 0x392 + +/* function ia_css_tagger_buf_sp_unmark_all: 35DA */ -/* function ia_css_tagger_buf_sp_unmark_all: 2D30 */ +/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ -/* function ia_css_tagger_buf_sp_unmark_from_start: 2D71 */ +/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ -/* function ia_css_dmaproxy_sp_channel_acquire: 36C0 */ +/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ -/* function ia_css_rmgr_sp_add_num_vbuf: 6608 */ +/* function ibuf_ctrl_config: D85 */ -/* function ia_css_isys_sp_token_map_create: 6218 */ +/* function ia_css_isys_stream_stop: 61F4 */ -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 337B */ +/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ -/* function ia_css_tagger_sp_acquire_buf_elem: 2044 */ +/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ -/* function ia_css_bufq_sp_is_dynamic_buffer: 3227 */ +/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_group #define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x4228 -#define HIVE_SIZE_sp_group 1184 +#define HIVE_ADDR_sp_group 0x3F60 +#define HIVE_SIZE_sp_group 6296 #else #endif #endif #define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x4228 -#define HIVE_SIZE_sp_sp_group 1184 +#define HIVE_ADDR_sp_sp_group 0x3F60 +#define HIVE_SIZE_sp_sp_group 6296 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_event_proxy_thread #define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x49B0 +#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 #define HIVE_SIZE_sp_event_proxy_thread 72 #else #endif #endif #define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x49B0 +#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 #define HIVE_SIZE_sp_sp_event_proxy_thread 72 -/* function ia_css_thread_sp_kill: CCB */ +/* function ia_css_thread_sp_kill: 12E8 */ -/* function ia_css_tagger_sp_create: 2A51 */ +/* function ia_css_tagger_sp_create: 32FB */ -/* function tmpmem_acquire_dmem: 66B5 */ +/* function tmpmem_acquire_dmem: 66FF */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_MMU_BASE @@ -1077,41 +1143,31 @@ #define HIVE_ADDR_sp_MMU_BASE 0x24 #define HIVE_SIZE_sp_MMU_BASE 8 -/* function ia_css_dmaproxy_sp_channel_release: 36AC */ +/* function ia_css_dmaproxy_sp_channel_release: 3F38 */ -/* function ia_css_dmaproxy_sp_is_idle: 368C */ +/* function pixelgen_prbs_run: E7B */ + +/* function ia_css_dmaproxy_sp_is_idle: 3F18 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_qos_start #define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x47C4 +#define HIVE_ADDR_sem_for_qos_start 0x58F4 #define HIVE_SIZE_sem_for_qos_start 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x47C4 +#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 #define HIVE_SIZE_sp_sem_for_qos_start 20 -/* function isp_hmem_load: B4F */ +/* function isp_hmem_load: B5D */ -/* function ia_css_tagger_sp_release_buf_elem: 2020 */ +/* function ia_css_tagger_sp_release_buf_elem: 28CA */ -/* function ia_css_eventq_sp_send: 3702 */ +/* function ia_css_eventq_sp_send: 3F8E */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_error_cnt -#define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x6330 -#define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x6330 -#define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 - -/* function ia_css_tagger_buf_sp_unlock_from_start: 2C60 */ +/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_debug_buffer_ddr_address @@ -1125,37 +1181,39 @@ #define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC #define HIVE_SIZE_sp_debug_buffer_ddr_address 4 -/* function sp_isys_copy_request: 6A8 */ +/* function sp_isys_copy_request: 681 */ + +/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 6498 */ +/* function ia_css_thread_sp_set_priority: 12E0 */ -/* function ia_css_thread_sp_set_priority: CC3 */ +/* function sizeof_hmem: C04 */ -/* function sizeof_hmem: BF6 */ +/* function input_system_channel_open: 11BC */ -/* function tmpmem_release_dmem: 66A4 */ +/* function pixelgen_tpg_stop: EF5 */ -/* function cnd_input_system_cfg: 392 */ +/* function tmpmem_release_dmem: 66EE */ -/* function __ia_css_sp_rawcopy_func_critical: 70C2 */ +/* function __ia_css_dmaproxy_sp_process_text: 3BAB */ -/* function __ia_css_dmaproxy_sp_process_text: 331F */ +/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ -/* function ia_css_dmaproxy_sp_set_width_exception: 3511 */ +/* function sp_event_assert: 8BD */ -/* function sp_event_assert: 845 */ +/* function ia_css_flash_sp_init_internal_params: 36D7 */ -/* function ia_css_flash_sp_init_internal_params: 2E4B */ +/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 2B66 */ +/* function __modu: 6A78 */ -/* function __modu: 6A2E */ +/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ -/* function ia_css_dmaproxy_sp_init_isp_vector: 3381 */ +/* function input_system_channel_transfer: 11A5 */ /* function isp_vamem_store: 0 */ -/* function ia_css_tagger_sp_set_copy_pipe: 2A48 */ +/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_GDC_BASE @@ -1169,61 +1227,61 @@ #define HIVE_ADDR_sp_GDC_BASE 0x44 #define HIVE_SIZE_sp_GDC_BASE 8 -/* function ia_css_queue_local_init: 4E85 */ +/* function ia_css_queue_local_init: 5707 */ -/* function sp_event_proxy_callout_func: 6AFB */ +/* function sp_event_proxy_callout_func: 6B45 */ -/* function qos_scheduler_schedule_stage: 670F */ +/* function qos_scheduler_schedule_stage: 6759 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads #define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x4A40 +#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 #define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x4A40 +#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 #define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_threads_stack_size #define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_threads_stack_size 28 +#define HIVE_ADDR_sp_threads_stack_size 0x17C +#define HIVE_SIZE_sp_threads_stack_size 24 #else #endif #endif #define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_sp_threads_stack_size 28 +#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C +#define HIVE_SIZE_sp_sp_threads_stack_size 24 -/* function ia_css_ispctrl_sp_isp_done_row_striping: 418B */ +/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ -/* function __ia_css_isys_sp_isr_text: 5F5D */ +/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ -/* function ia_css_queue_dequeue: 4D03 */ +/* function ia_css_queue_dequeue: 5585 */ -/* function is_qos_standalone_mode: 66EA */ +/* function is_qos_standalone_mode: 6734 */ -/* function ia_css_dmaproxy_sp_configure_channel: 6F90 */ +/* function ia_css_dmaproxy_sp_configure_channel: 703C */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_current_thread_fiber_sp #define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x4A44 +#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C #define HIVE_SIZE_current_thread_fiber_sp 4 #else #endif #endif #define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x4A44 +#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C #define HIVE_SIZE_sp_current_thread_fiber_sp 4 -/* function ia_css_circbuf_pop: FCD */ +/* function ia_css_circbuf_pop: 15EA */ -/* function memset: 6AAD */ +/* function memset: 6AF7 */ /* function irq_raise_set_token: B6 */ @@ -1239,169 +1297,165 @@ #define HIVE_ADDR_sp_GPIO_BASE 0x3C #define HIVE_SIZE_sp_GPIO_BASE 4 -/* function ia_css_pipeline_acc_stage_enable: 1818 */ +/* function pixelgen_prbs_stop: E69 */ -/* function ia_css_tagger_sp_unlock_exp_id: 2091 */ +/* function ia_css_pipeline_acc_stage_enable: 1F69 */ + +/* function ia_css_tagger_sp_unlock_exp_id: 293B */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_ph #define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x6340 +#define HIVE_ADDR_isp_ph 0x740C #define HIVE_SIZE_isp_ph 28 #else #endif #endif #define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x6340 +#define HIVE_ADDR_sp_isp_ph 0x740C #define HIVE_SIZE_sp_isp_ph 28 -/* function ia_css_isys_sp_token_map_flush: 615D */ - -/* function ia_css_ispctrl_sp_init_ds: 39FA */ +/* function ia_css_ispctrl_sp_init_ds: 4286 */ -/* function get_xmem_base_addr_raw: 3DB3 */ +/* function get_xmem_base_addr_raw: 4635 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_param #define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x47D8 +#define HIVE_ADDR_sp_all_cbs_param 0x5908 #define HIVE_SIZE_sp_all_cbs_param 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x47D8 +#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 #define HIVE_SIZE_sp_sp_all_cbs_param 16 -/* function ia_css_circbuf_create: 101B */ +/* function pixelgen_tpg_config: F2A */ + +/* function ia_css_circbuf_create: 1638 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_sp_group #define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x47E8 +#define HIVE_ADDR_sem_for_sp_group 0x5918 #define HIVE_SIZE_sem_for_sp_group 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x47E8 +#define HIVE_ADDR_sp_sem_for_sp_group 0x5918 #define HIVE_SIZE_sp_sem_for_sp_group 20 -/* function __ia_css_dmaproxy_sp_configure_channel_text: 34F0 */ +/* function csi_rx_frontend_run: C1C */ + +/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ -/* function ia_css_framebuf_sp_wait_for_in_frame: 6633 */ +/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ -/* function ia_css_sp_rawcopy_tag_frame: 57C9 */ +/* function ia_css_isys_stream_open: 62A9 */ -/* function isp_hmem_clear: B1F */ +/* function ia_css_sp_rawcopy_tag_frame: 5E35 */ -/* function ia_css_framebuf_sp_release_in_frame: 6676 */ +/* function input_system_channel_configure: 11D8 */ -/* function ia_css_isys_sp_backend_snd_acquire_request: 5BB3 */ +/* function isp_hmem_clear: B2D */ -/* function ia_css_isys_sp_token_map_is_full: 5FE4 */ +/* function ia_css_framebuf_sp_release_in_frame: 66C0 */ -/* function input_system_acquisition_run: AF3 */ +/* function stream2mmio_config: E15 */ -/* function ia_css_ispctrl_sp_start_binary: 384C */ +/* function ia_css_ispctrl_sp_start_binary: 40D8 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs #define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 #define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x5950 +#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 #define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -/* function ia_css_eventq_sp_recv: 36D4 */ +/* function ia_css_eventq_sp_recv: 3F60 */ + +/* function csi_rx_frontend_config: C74 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_pool #define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x300 +#define HIVE_ADDR_isp_pool 0x388 #define HIVE_SIZE_isp_pool 4 #else #endif #endif #define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x300 +#define HIVE_ADDR_sp_isp_pool 0x388 #define HIVE_SIZE_sp_isp_pool 4 -/* function ia_css_rmgr_sp_rel_gen: 6365 */ +/* function ia_css_rmgr_sp_rel_gen: 63AF */ -/* function ia_css_tagger_sp_unblock_clients: 2919 */ +/* function ia_css_tagger_sp_unblock_clients: 31C3 */ -/* function css_get_frame_processing_time_end: 2010 */ +/* function css_get_frame_processing_time_end: 28BA */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_event_any_pending_mask #define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x318 +#define HIVE_ADDR_event_any_pending_mask 0x3A0 #define HIVE_SIZE_event_any_pending_mask 8 #else #endif #endif #define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x318 +#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 #define HIVE_SIZE_sp_event_any_pending_mask 8 -/* function ia_css_isys_sp_backend_push: 5B6A */ +/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ /* function sh_css_decode_tag_descr: 352 */ /* function debug_enqueue_isp: 27B */ -/* function qos_scheduler_update_stage_budget: 66F2 */ +/* function qos_scheduler_update_stage_budget: 673C */ -/* function ia_css_spctrl_sp_uninit: 5AA5 */ +/* function ia_css_spctrl_sp_uninit: 5EDD */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE -#define HIVE_MEM_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_HIVE_IF_SWITCH_CODE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_sp_HIVE_IF_SWITCH_CODE 4 +/* function csi_rx_backend_run: C62 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs #define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5964 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 -/* function ia_css_tagger_buf_sp_lock_from_start: 2C94 */ +/* function ia_css_tagger_buf_sp_lock_from_start: 353E */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_isp_idle #define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x47FC +#define HIVE_ADDR_sem_for_isp_idle 0x592C #define HIVE_SIZE_sem_for_isp_idle 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x47FC +#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C #define HIVE_SIZE_sp_sem_for_isp_idle 20 -/* function ia_css_dmaproxy_sp_write_byte_addr: 33DE */ +/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ -/* function ia_css_dmaproxy_sp_init: 3355 */ +/* function ia_css_dmaproxy_sp_init: 3BE1 */ -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2F1D */ +/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_VAMEM_BASE @@ -1415,49 +1469,49 @@ #define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 #define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 +/* function input_system_channel_sync: 6C10 */ + #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger #define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x62F0 +#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 #define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 #else #endif #endif #define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x62F0 +#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 #define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids #define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x59F0 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 -/* function ia_css_queue_item_load: 4F77 */ - -/* function ia_css_spctrl_sp_get_state: 5A90 */ +/* function ia_css_queue_item_load: 57F9 */ -/* function ia_css_isys_sp_token_map_uninit: 617A */ +/* function ia_css_spctrl_sp_get_state: 5EC8 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_callout_sp_thread #define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x1E0 +#define HIVE_ADDR_callout_sp_thread 0x278 #define HIVE_SIZE_callout_sp_thread 4 #else #endif #endif #define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x1E0 +#define HIVE_ADDR_sp_callout_sp_thread 0x278 #define HIVE_SIZE_sp_callout_sp_thread 4 -/* function thread_fiber_sp_init: E24 */ +/* function thread_fiber_sp_init: 1441 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_SP_PMEM_BASE @@ -1471,102 +1525,88 @@ #define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 #define HIVE_SIZE_sp_SP_PMEM_BASE 4 -/* function ia_css_isys_sp_token_map_snd_acquire_req: 60EA */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_input_stream_format #define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x4118 +#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 #define HIVE_SIZE_sp_isp_input_stream_format 20 #else #endif #endif #define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x4118 +#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 #define HIVE_SIZE_sp_sp_isp_input_stream_format 20 -/* function __mod: 6A1A */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 343F */ +/* function __mod: 6A64 */ -/* function ia_css_thread_sp_join: CF4 */ +/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ -/* function ia_css_dmaproxy_sp_add_command: 7082 */ +/* function ia_css_thread_sp_join: 1311 */ -/* function ia_css_sp_metadata_thread_func: 5968 */ +/* function ia_css_dmaproxy_sp_add_command: 712E */ -/* function __sp_event_proxy_func_critical: 6AE8 */ +/* function ia_css_sp_metadata_thread_func: 5EC1 */ -/* function ia_css_sp_metadata_wait: 5A57 */ +/* function __sp_event_proxy_func_critical: 6B32 */ -/* function ia_css_circbuf_peek_from_start: EFD */ +/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ -/* function ia_css_event_sp_encode: 375F */ +/* function ia_css_sp_metadata_wait: 5EBA */ -/* function ia_css_thread_sp_run: D67 */ +/* function ia_css_circbuf_peek_from_start: 151A */ -/* function sp_isys_copy_func: 68A */ +/* function ia_css_event_sp_encode: 3FEB */ -/* function ia_css_isys_sp_backend_flush: 5BD3 */ +/* function ia_css_thread_sp_run: 1384 */ -/* function ia_css_isys_sp_backend_frame_exists: 5AEF */ +/* function sp_isys_copy_func: 5AC */ -/* function ia_css_sp_isp_param_init_isp_memories: 4A2A */ +/* function ia_css_sp_isp_param_init_isp_memories: 52AC */ -/* function register_isr: 83D */ +/* function register_isr: 8B5 */ /* function irq_raise: C8 */ -/* function ia_css_dmaproxy_sp_mmu_invalidate: 32E5 */ +/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS -#define HIVE_MEM_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_HIVE_IF_SRST_ADDRESS 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 +/* function csi_rx_backend_disable: C2E */ -/* function pipeline_sp_initialize_stage: 195E */ +/* function pipeline_sp_initialize_stage: 20BF */ #ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_frontend_states -#define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x6324 -#define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 +#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES +#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem +#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4 +#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12 #else #endif #endif -#define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x6324 -#define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 +#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem +#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 +#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 + +/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6F62 */ +/* function ia_css_ispctrl_sp_done_ds: 426D */ -/* function ia_css_ispctrl_sp_done_ds: 39E1 */ +/* function csi_rx_backend_config: C85 */ -/* function ia_css_sp_isp_param_get_mem_inits: 4A05 */ +/* function ia_css_sp_isp_param_get_mem_inits: 5287 */ -/* function ia_css_parambuf_sp_init_buffer_queues: 13F1 */ +/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_pfp_spref #define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x308 +#define HIVE_ADDR_vbuf_pfp_spref 0x390 #define HIVE_SIZE_vbuf_pfp_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x308 +#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 #define HIVE_SIZE_sp_vbuf_pfp_spref 4 -/* function input_system_cfg: AB5 */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_HMEM_BASE #define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem @@ -1582,260 +1622,266 @@ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames #define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 #define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x5A38 +#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 #define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 -/* function qos_scheduler_init_stage_budget: 6750 */ - -/* function ia_css_isys_sp_backend_release: 5C48 */ - -/* function ia_css_isys_sp_backend_destroy: 5C72 */ +/* function qos_scheduler_init_stage_budget: 679A */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp2host_buffer_queue_handle #define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5B50 +#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 #define HIVE_SIZE_sp2host_buffer_queue_handle 96 #else #endif #endif #define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5B50 +#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 #define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 -/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 60AE */ +/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ -/* function ia_css_ispctrl_sp_init_isp_vars: 46F7 */ +/* function ia_css_isys_stream_start: 6187 */ -/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5CC4 */ +/* function sp_warning: 8E8 */ -/* function sp_warning: 870 */ +/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ -/* function ia_css_rmgr_sp_vbuf_enqueue: 6458 */ +/* function ia_css_tagger_sp_tag_exp_id: 2A55 */ -/* function ia_css_tagger_sp_tag_exp_id: 21AB */ +/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ -/* function ia_css_dmaproxy_sp_write: 33F5 */ +/* function ia_css_dmaproxy_sp_write: 3C81 */ -/* function ia_css_parambuf_sp_release_in_param: 1245 */ +/* function ia_css_isys_stream_start_async: 6250 */ + +/* function ia_css_parambuf_sp_release_in_param: 187B */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_irq_sw_interrupt_token #define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x4114 +#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C #define HIVE_SIZE_irq_sw_interrupt_token 4 #else #endif #endif #define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x4114 +#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C #define HIVE_SIZE_sp_irq_sw_interrupt_token 4 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_isp_addresses #define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x5FA4 +#define HIVE_ADDR_sp_isp_addresses 0x708C #define HIVE_SIZE_sp_isp_addresses 172 #else #endif #endif #define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x5FA4 +#define HIVE_ADDR_sp_sp_isp_addresses 0x708C #define HIVE_SIZE_sp_sp_isp_addresses 172 -/* function ia_css_rmgr_sp_acq_gen: 637D */ +/* function ia_css_rmgr_sp_acq_gen: 63C7 */ -/* function receiver_reg_load: ACA */ +/* function input_system_input_port_open: 10E7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isps #define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x635C +#define HIVE_ADDR_isps 0x7428 #define HIVE_SIZE_isps 28 #else #endif #endif #define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x635C +#define HIVE_ADDR_sp_isps 0x7428 #define HIVE_SIZE_sp_isps 28 #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_host_sp_queues_initialized #define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x412C +#define HIVE_ADDR_host_sp_queues_initialized 0x3E64 #define HIVE_SIZE_host_sp_queues_initialized 4 #else #endif #endif #define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x412C +#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 #define HIVE_SIZE_sp_host_sp_queues_initialized 4 -/* function ia_css_queue_uninit: 4E43 */ +/* function ia_css_queue_uninit: 56C5 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started #define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5C58 +#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 #define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5C58 +#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 #define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 -/* function ia_css_bufq_sp_release_dynamic_buf: 2F89 */ +/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ + +/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ -/* function ia_css_dmaproxy_sp_set_height_exception: 3502 */ +/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3473 */ +/* function csi_rx_backend_stop: C51 */ -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 33C7 */ +/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_vbuf_spref #define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x304 +#define HIVE_ADDR_vbuf_spref 0x38C #define HIVE_SIZE_vbuf_spref 4 #else #endif #endif #define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x304 +#define HIVE_ADDR_sp_vbuf_spref 0x38C #define HIVE_SIZE_sp_vbuf_spref 4 -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_metadata_thread -#define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_metadata_thread 0x49F8 -#define HIVE_SIZE_sp_metadata_thread 72 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_metadata_thread 0x49F8 -#define HIVE_SIZE_sp_sp_metadata_thread 72 - -/* function ia_css_queue_enqueue: 4D8D */ +/* function ia_css_queue_enqueue: 560F */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_request #define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x4AF4 +#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC #define HIVE_SIZE_ia_css_flash_sp_request 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4AF4 +#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC #define HIVE_SIZE_sp_ia_css_flash_sp_request 4 -/* function ia_css_dmaproxy_sp_vmem_write: 3398 */ +/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_tagger_frames #define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x4A48 +#define HIVE_ADDR_tagger_frames 0x5B30 #define HIVE_SIZE_tagger_frames 168 #else #endif #endif #define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x4A48 +#define HIVE_ADDR_sp_tagger_frames 0x5B30 #define HIVE_SIZE_sp_tagger_frames 168 -/* function ia_css_isys_sp_token_map_snd_capture_req: 610C */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_reading_if #define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x4810 +#define HIVE_ADDR_sem_for_reading_if 0x5940 #define HIVE_SIZE_sem_for_reading_if 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x4810 +#define HIVE_ADDR_sp_sem_for_reading_if 0x5940 #define HIVE_SIZE_sp_sem_for_reading_if 20 -/* function sp_generate_interrupts: 8EF */ +/* function sp_generate_interrupts: 967 */ + +/* function ia_css_pipeline_sp_start: 1FC2 */ -/* function ia_css_pipeline_sp_start: 1871 */ +/* function ia_css_thread_default_callout: 6C8F */ -/* function ia_css_thread_default_callout: 6BE3 */ +/* function csi_rx_backend_enable: C3F */ -/* function ia_css_sp_rawcopy_init: 536A */ +/* function ia_css_sp_rawcopy_init: 5B32 */ -/* function tmr_clock_read: 1412 */ +/* function input_system_input_port_configure: 1139 */ + +/* function tmr_clock_read: 1665 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_BAMEM_BASE #define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x310 +#define HIVE_ADDR_ISP_BAMEM_BASE 0x398 #define HIVE_SIZE_ISP_BAMEM_BASE 4 #else #endif #endif #define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x310 +#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 #define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 -/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5D73 */ - #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues #define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 #define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 #else #endif #endif #define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5BB0 +#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 #define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -/* function css_get_frame_processing_time_start: 2018 */ +/* function isys2401_dma_config_legacy: DDA */ + +#ifndef HIVE_MULTIPLE_PROGRAMS +#ifndef HIVE_MEM_ibuf_ctrl_master_ports +#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem +#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208 +#define HIVE_SIZE_ibuf_ctrl_master_ports 12 +#else +#endif +#endif +#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem +#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 +#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 + +/* function css_get_frame_processing_time_start: 28C2 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_all_cbs_frame #define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x4824 +#define HIVE_ADDR_sp_all_cbs_frame 0x5954 #define HIVE_SIZE_sp_all_cbs_frame 16 #else #endif #endif #define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x4824 +#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 #define HIVE_SIZE_sp_sp_all_cbs_frame 16 -/* function thread_sp_queue_print: D84 */ +/* function ia_css_virtual_isys_sp_isr: 716E */ + +/* function thread_sp_queue_print: 13A1 */ -/* function sp_notify_eof: 89B */ +/* function sp_notify_eof: 913 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sem_for_str2mem #define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x4834 +#define HIVE_ADDR_sem_for_str2mem 0x5964 #define HIVE_SIZE_sem_for_str2mem 20 #else #endif #endif #define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x4834 +#define HIVE_ADDR_sp_sem_for_str2mem 0x5964 #define HIVE_SIZE_sp_sem_for_str2mem 20 -/* function ia_css_tagger_buf_sp_is_marked_from_start: 2CFC */ +/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ -/* function ia_css_bufq_sp_acquire_dynamic_buf: 3141 */ +/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ -/* function ia_css_circbuf_destroy: 1012 */ +/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ + +/* function ia_css_circbuf_destroy: 162F */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ISP_PMEM_BASE @@ -1849,43 +1895,41 @@ #define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC #define HIVE_SIZE_sp_ISP_PMEM_BASE 4 -/* function ia_css_sp_isp_param_mem_load: 4998 */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 2AE8 */ +/* function ia_css_sp_isp_param_mem_load: 521A */ -/* function __div: 69D2 */ +/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ -/* function ia_css_isys_sp_frontend_create: 5F44 */ +/* function __div: 6A1C */ -/* function ia_css_rmgr_sp_refcount_release_vbuf: 6477 */ +/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_ia_css_flash_sp_in_use #define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4AF8 +#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 #define HIVE_SIZE_ia_css_flash_sp_in_use 4 #else #endif #endif #define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4AF8 +#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 #define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 -/* function ia_css_thread_sem_sp_wait: 6CB7 */ +/* function ia_css_thread_sem_sp_wait: 6D63 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_sp_sleep_mode #define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x4130 +#define HIVE_ADDR_sp_sleep_mode 0x3E68 #define HIVE_SIZE_sp_sleep_mode 4 #else #endif #endif #define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x4130 +#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 #define HIVE_SIZE_sp_sp_sleep_mode 4 -/* function ia_css_tagger_buf_sp_push: 2BF7 */ +/* function ia_css_tagger_buf_sp_push: 34A1 */ /* function mmu_invalidate_cache: D3 */ @@ -1901,19 +1945,21 @@ #define HIVE_ADDR_sp_sp_max_cb_elems 0x148 #define HIVE_SIZE_sp_sp_max_cb_elems 8 -/* function ia_css_queue_remote_init: 4E65 */ +/* function ia_css_queue_remote_init: 56E7 */ #ifndef HIVE_MULTIPLE_PROGRAMS #ifndef HIVE_MEM_isp_stop_req #define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x46C8 +#define HIVE_ADDR_isp_stop_req 0x57F8 #define HIVE_SIZE_isp_stop_req 4 #else #endif #endif #define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x46C8 +#define HIVE_ADDR_sp_isp_stop_req 0x57F8 #define HIVE_SIZE_sp_isp_stop_req 4 +/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ + #endif /* _sp_map_h_ */ -- GitLab From ac378c94c7c6b2af7ad4afdb4c97f37976cdcc5b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 1 May 2020 22:50:36 +0200 Subject: [PATCH 449/503] media: atomisp: use add_qos_request instead of update It doesn't make senst to update a request that was not created. So, instead of using cpu_latency_qos_update_request(), let's use, instead cpu_latency_qos_add_request() at device probing code. This should fix this issue: [ 9.691775] cpu_latency_qos_update_request called for unknown object [ 9.695279] WARNING: CPU: 3 PID: 523 at kernel/power/qos.c:296 cpu_latency_qos_update_request+0x3a/0xb0 [ 9.698826] Modules linked in: snd_soc_acpi_intel_match snd_rawmidi snd_soc_acpi snd_soc_rl6231 snd_soc_core ath mac80211 snd_compress snd_hdmi_lpe_audio ac97_bus hid_sensor_accel_3d snd_pcm_dmaengine hid_sensor_gyro_3d hid_sensor_trigger industrialio_triggered_buffer kfifo_buf hid_sensor_iio_common processor_thermal_device industrialio cfg80211 snd_pcm snd_seq intel_rapl_common atomisp(C+) libarc4 intel_soc_dts_iosf cros_ec_ishtp intel_xhci_usb_role_switch mei_txe cros_ec videobuf_vmalloc mei roles atomisp_ov2680(C) videobuf_core snd_seq_device snd_timer spi_pxa2xx_platform videodev snd mc dw_dmac intel_hid dw_dmac_core 8250_dw soundcore int3406_thermal int3400_thermal intel_int0002_vgpio acpi_pad acpi_thermal_rel soc_button_array int3403_thermal int340x_thermal_zone mac_hid sch_fq_codel parport_pc ppdev lp parport ip_tables x_tables autofs4 hid_sensor_custom hid_sensor_hub intel_ishtp_loader intel_ishtp_hid crct10dif_pclmul crc32_pclmul ghash_clmulni_intel i915 mmc_block i2c_algo_bit [ 9.698885] aesni_intel crypto_simd drm_kms_helper cryptd syscopyarea sysfillrect glue_helper sysimgblt fb_sys_fops cec intel_ish_ipc drm lpc_ich intel_ishtp hid_asus intel_soc_pmic_chtdc_ti asus_wmi i2c_hid sparse_keymap sdhci_acpi wmi video sdhci hid_generic usbhid hid [ 9.736699] CPU: 3 PID: 523 Comm: systemd-udevd Tainted: G C 5.7.0-rc1+ #2 [ 9.741309] Hardware name: ASUSTeK COMPUTER INC. T101HA/T101HA, BIOS T101HA.305 01/24/2018 [ 9.745962] RIP: 0010:cpu_latency_qos_update_request+0x3a/0xb0 [ 9.750615] Code: 89 e5 41 55 41 54 41 89 f4 53 48 89 fb 48 81 7f 28 e0 7f c6 9e 74 1c 48 c7 c6 60 f3 65 9e 48 c7 c7 e8 a9 99 9e e8 b2 a6 f9 ff <0f> 0b 5b 41 5c 41 5d 5d c3 0f 1f 44 00 00 44 3b 23 74 ef 44 89 e2 [ 9.760065] RSP: 0018:ffffa865404f39c0 EFLAGS: 00010282 [ 9.764734] RAX: 0000000000000000 RBX: ffff9d2aefc84350 RCX: 0000000000000000 [ 9.769435] RDX: ffff9d2afbfa97c0 RSI: ffff9d2afbf99808 RDI: ffff9d2afbf99808 [ 9.774125] RBP: ffffa865404f39d8 R08: 0000000000000304 R09: 0000000000aaaaaa [ 9.778804] R10: 0000000000000000 R11: 0000000000000001 R12: 00000000ffffffff [ 9.783491] R13: ffff9d2afb4640b0 R14: ffffffffc07ecf20 R15: 0000000091000000 [ 9.788187] FS: 00007efe67ff8880(0000) GS:ffff9d2afbf80000(0000) knlGS:0000000000000000 [ 9.792864] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 9.797482] CR2: 00007ffc6424bdc8 CR3: 0000000178998000 CR4: 00000000001006e0 [ 9.802126] Call Trace: [ 9.806775] atomisp_pci_probe.cold.19+0x15f/0x116f [atomisp] [ 9.811441] local_pci_probe+0x47/0x80 [ 9.816085] pci_device_probe+0xff/0x1b0 [ 9.820706] really_probe+0x1c8/0x3e0 [ 9.825247] driver_probe_device+0xd9/0x120 [ 9.829769] device_driver_attach+0x58/0x60 [ 9.834294] __driver_attach+0x8f/0x150 [ 9.838782] ? device_driver_attach+0x60/0x60 [ 9.843205] ? device_driver_attach+0x60/0x60 [ 9.847634] bus_for_each_dev+0x79/0xc0 [ 9.852033] ? kmem_cache_alloc_trace+0x167/0x230 [ 9.856462] driver_attach+0x1e/0x20 Reported-by: Patrik Gfeller Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_v4l2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 297f55a01b1b8..f1bae97127204 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1751,7 +1751,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, atomisp_msi_irq_init(isp, dev); - cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); + cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE); /* * for MRFLD, Software/firmware needs to write a 1 to bit 0 of -- GitLab From 8ac171401531a18016c3eb8258a6316aef65047b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 2 May 2020 18:15:48 +0200 Subject: [PATCH 450/503] media: atomisp: fix querycap initialization logic Some recent changes at V4L2 core changed the way querycap is handled. Due to that, this warning is generated: WARNING: CPU: 1 PID: 503 at drivers/media/v4l2-core/v4l2-dev.c:885 __video_register_device+0x93e/0x1120 [videodev] as introduced by this commit: commit 3c1350501c21db8e3b1a38d9e97db29694305c3b Author: Hans Verkuil Date: Tue Jul 23 04:21:25 2019 -0400 media: v4l2-dev/ioctl: require non-zero device_caps, verify sane querycap results Now that all V4L2 drivers set device_caps in struct video_device, we can add a check for this to ensure all future drivers fill this in. The fix is simple: we just need to initialize dev_caps before registering the V4L2 dev. While here, solve other problems at VIDIOC_QUERYCAP ioctl. Reported-by: Patrik Gfeller Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp_ioctl.c | 21 +++----- .../media/atomisp/pci/atomisp_subdev.c | 51 +++++++++++++++---- .../staging/media/atomisp/pci/atomisp_v4l2.c | 30 ----------- .../staging/media/atomisp/pci/atomisp_v4l2.h | 4 -- 4 files changed, 48 insertions(+), 58 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c index 3417cd547ae70..a5e71e5b714ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_ioctl.c +++ b/drivers/staging/media/atomisp/pci/atomisp_ioctl.c @@ -41,10 +41,8 @@ #include "hrt/hive_isp_css_mm_hrt.h" -/* for v4l2_capability */ static const char *DRIVER = "atomisp"; /* max size 15 */ static const char *CARD = "ATOM ISP"; /* max size 31 */ -static const char *BUS_INFO = "PCI-3"; /* max size 31 */ /* * FIXME: ISP should not know beforehand all CIDs supported by sensor. @@ -543,25 +541,18 @@ const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus( /* * v4l2 ioctls * return ISP capabilities - * - * FIXME: capabilities should be different for video0/video2/video3 */ static int atomisp_querycap(struct file *file, void *fh, struct v4l2_capability *cap) { - memset(cap, 0, sizeof(struct v4l2_capability)); - - WARN_ON(sizeof(DRIVER) > sizeof(cap->driver) || - sizeof(CARD) > sizeof(cap->card) || - sizeof(BUS_INFO) > sizeof(cap->bus_info)); + struct video_device *vdev = video_devdata(file); + struct atomisp_device *isp = video_get_drvdata(vdev); - strncpy(cap->driver, DRIVER, sizeof(cap->driver) - 1); - strncpy(cap->card, CARD, sizeof(cap->card) - 1); - strncpy(cap->bus_info, BUS_INFO, sizeof(cap->card) - 1); + strscpy(cap->driver, DRIVER, sizeof(cap->driver) - 1); + strscpy(cap->card, CARD, sizeof(cap->card) - 1); + snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s", + pci_name(isp->pdev)); - cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | - V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT; - cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; return 0; } diff --git a/drivers/staging/media/atomisp/pci/atomisp_subdev.c b/drivers/staging/media/atomisp/pci/atomisp_subdev.c index 8f95afccaefce..46590129cbe3d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_subdev.c +++ b/drivers/staging/media/atomisp/pci/atomisp_subdev.c @@ -1341,29 +1341,57 @@ int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, struct v4l2_device *vdev) { int ret; + u32 device_caps; + + /* + * FIXME: check if all device caps are properly initialized. + * Should any of those use V4L2_CAP_META_OUTPUT? Probably yes. + */ + + device_caps = V4L2_CAP_IO_MC | + V4L2_CAP_VIDEO_CAPTURE | + V4L2_CAP_STREAMING; /* Register the subdev and video node. */ + ret = v4l2_device_register_subdev(vdev, &asd->subdev); if (ret < 0) goto error; - ret = atomisp_video_register(&asd->video_out_capture, vdev); + asd->video_out_capture.vdev.v4l2_dev = vdev; + asd->video_out_capture.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_OUTPUT; + ret = video_register_device(&asd->video_out_capture.vdev, + VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; - ret = atomisp_video_register(&asd->video_out_vf, vdev); + asd->video_out_vf.vdev.v4l2_dev = vdev; + asd->video_out_vf.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_OUTPUT; + ret = video_register_device(&asd->video_out_vf.vdev, + VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; - - ret = atomisp_video_register(&asd->video_out_preview, vdev); + asd->video_out_preview.vdev.v4l2_dev = vdev; + asd->video_out_preview.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_OUTPUT; + ret = video_register_device(&asd->video_out_preview.vdev, + VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; - - ret = atomisp_video_register(&asd->video_out_video_capture, vdev); + asd->video_out_video_capture.vdev.v4l2_dev = vdev; + asd->video_out_video_capture.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_OUTPUT; + ret = video_register_device(&asd->video_out_video_capture.vdev, + VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; - - ret = atomisp_acc_register(&asd->video_acc, vdev); + asd->video_acc.vdev.v4l2_dev = vdev; + asd->video_acc.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_OUTPUT; + ret = video_register_device(&asd->video_acc.vdev, + VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; @@ -1373,7 +1401,12 @@ int atomisp_subdev_register_entities(struct atomisp_sub_device *asd, */ if (asd->index) return 0; - ret = atomisp_video_register(&asd->video_in, vdev); + + asd->video_in.vdev.v4l2_dev = vdev; + asd->video_in.vdev.device_caps = device_caps | + V4L2_CAP_VIDEO_CAPTURE; + ret = video_register_device(&asd->video_in.vdev, + VFL_TYPE_VIDEO, -1); if (ret < 0) goto error; diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index f1bae97127204..fa919ac57c787 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -541,36 +541,6 @@ void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name) video_set_drvdata(&video->vdev, video->isp); } -int atomisp_video_register(struct atomisp_video_pipe *video, - struct v4l2_device *vdev) -{ - int ret; - - video->vdev.v4l2_dev = vdev; - - ret = video_register_device(&video->vdev, VFL_TYPE_VIDEO, -1); - if (ret < 0) - dev_err(vdev->dev, "%s: could not register video device (%d)\n", - __func__, ret); - - return ret; -} - -int atomisp_acc_register(struct atomisp_acc_pipe *video, - struct v4l2_device *vdev) -{ - int ret; - - video->vdev.v4l2_dev = vdev; - - ret = video_register_device(&video->vdev, VFL_TYPE_VIDEO, -1); - if (ret < 0) - dev_err(vdev->dev, "%s: could not register video device (%d)\n", - __func__, ret); - - return ret; -} - void atomisp_video_unregister(struct atomisp_video_pipe *video) { if (video_is_registered(&video->vdev)) { diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.h b/drivers/staging/media/atomisp/pci/atomisp_v4l2.h index 37cdb98f8196a..87881fa6a6989 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.h +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.h @@ -29,11 +29,7 @@ struct firmware; int atomisp_video_init(struct atomisp_video_pipe *video, const char *name); void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name); void atomisp_video_unregister(struct atomisp_video_pipe *video); -int atomisp_video_register(struct atomisp_video_pipe *video, - struct v4l2_device *vdev); void atomisp_acc_unregister(struct atomisp_acc_pipe *video); -int atomisp_acc_register(struct atomisp_acc_pipe *video, - struct v4l2_device *vdev); const struct firmware *atomisp_load_firmware(struct atomisp_device *isp); int atomisp_csi_lane_config(struct atomisp_device *isp); -- GitLab From 32efca3d55799b3e644e1ceca10e2f3b6b6eb76a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 3 May 2020 17:02:51 +0200 Subject: [PATCH 451/503] media: atomisp: move ia_css_configure_sc() implementation With the changes, this function is now undefined if built for ISP2400. So, move its implementation to the file which calls it. Reported-by: Francescodario Cuzzocrea Signed-off-by: Mauro Carvalho Chehab --- .../css_2401_system/hive/ia_css_isp_configs.c | 27 ----------------- .../media/atomisp/pci/ia_css_isp_configs.h | 8 ----- .../isp/kernels/sc/sc_1.0/ia_css_sc.host.c | 29 +++++++++++++++++++ 3 files changed, 29 insertions(+), 35 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c index cd37e7e3d7796..29d85407cac47 100644 --- a/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c +++ b/drivers/staging/media/atomisp/pci/css_2401_system/hive/ia_css_isp_configs.c @@ -272,33 +272,6 @@ ia_css_configure_output( "ia_css_configure_output() leave:\n"); } -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - -void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem) -{ - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() enter:\n"); - - { - unsigned int offset = 0; - unsigned int size = 0; - - if (binary->info->mem_offsets.offsets.config) { - size = binary->info->mem_offsets.offsets.config->dmem.sc.size; - offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; - } - if (size) { - ia_css_sc_config((struct sh_css_isp_sc_isp_config *) - &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], - config_dmem, size); - } - } - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, - "ia_css_configure_sc() leave:\n"); -} /* Code generated by genparam/genconfig.c:gen_configure_function() */ diff --git a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h index 6dd0205fa59e7..6545efd24cbec 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h +++ b/drivers/staging/media/atomisp/pci/ia_css_isp_configs.h @@ -152,14 +152,6 @@ ia_css_configure_output( /* Code generated by genparam/genconfig.c:gen_configure_function() */ -/* ISP2401 */ -void -ia_css_configure_sc( - const struct ia_css_binary *binary, - const struct ia_css_sc_configuration *config_dmem); - -/* Code generated by genparam/genconfig.c:gen_configure_function() */ - void ia_css_configure_raw( const struct ia_css_binary *binary, diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c index 000cbe600f972..43954ed6d1063 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/sc/sc_1.0/ia_css_sc.host.c @@ -22,6 +22,35 @@ #include "ia_css_sc.host.h" +/* Code generated by genparam/genconfig.c:gen_configure_function() */ + +/* ISP2401 */ +static void +ia_css_configure_sc( + const struct ia_css_binary *binary, + const struct ia_css_sc_configuration *config_dmem) +{ + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() enter:\n"); + + { + unsigned int offset = 0; + unsigned int size = 0; + + if (binary->info->mem_offsets.offsets.config) { + size = binary->info->mem_offsets.offsets.config->dmem.sc.size; + offset = binary->info->mem_offsets.offsets.config->dmem.sc.offset; + } + if (size) { + ia_css_sc_config((struct sh_css_isp_sc_isp_config *) + &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], + config_dmem, size); + } + } + ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, + "ia_css_configure_sc() leave:\n"); +} + void ia_css_sc_encode( struct sh_css_isp_sc_params *to, -- GitLab From 1ab709827c08619c7b2401ea7e0769a9b70846fe Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 7 May 2020 10:19:59 -0400 Subject: [PATCH 452/503] media: atomisp: disable the dummy PM driver is atomisp driver is built As the atomisp driver should already be handling the ISP PCI ID, there's no sense on keeping the dummy driver enabled in tis case. Signed-off-by: Mauro Carvalho Chehab --- drivers/platform/x86/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 0ad7ad8cf8e17..c257072a7c35b 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -741,6 +741,7 @@ config THINKPAD_ACPI_HOTKEY_POLL config INTEL_ATOMISP2_PM tristate "Intel AtomISP2 dummy / power-management driver" depends on PCI && IOSF_MBI && PM + depends on !INTEL_ATOMISP help Power-management driver for Intel's Image Signal Processor found on Bay Trail and Cherry Trail devices. This dummy driver's sole purpose -- GitLab From 8568fe630066a733456fb1ffc8e1402191d7e27c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 7 May 2020 18:33:29 +0200 Subject: [PATCH 453/503] media: atomisp: print a better message when fw version is wrong The printed message when a firmware version is wrong says nothing usefull: atomisp-isp2 0000:00:03.0: Fw version check failed. atomisp-isp2: probe of 0000:00:03.0 failed with error -22 Print the expected and the received firmware version instead. In order to do that, the firmware functions will need at least a struct device pointer, so pass it. While writing this patch, it was noticed that some of the abstraction layers of this driver have functions that are never called, but use this interface. Get rid of them. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp_compat_css20.c | 9 +- .../media/atomisp/pci/ia_css_control.h | 35 ++------ .../media/atomisp/pci/ia_css_firmware.h | 12 +-- drivers/staging/media/atomisp/pci/sh_css.c | 87 +------------------ .../media/atomisp/pci/sh_css_firmware.c | 8 +- .../media/atomisp/pci/sh_css_firmware.h | 4 +- 6 files changed, 21 insertions(+), 134 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c index 6d63da0aaec0c..7afd12cba5760 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c @@ -875,7 +875,7 @@ int atomisp_css_init(struct atomisp_device *isp) return ret; /* Init ISP */ - err = ia_css_init(&isp->css_env.isp_css_env, NULL, + err = ia_css_init(isp->dev, &isp->css_env.isp_css_env, NULL, (uint32_t)mmu_base_addr, IA_CSS_IRQ_TYPE_PULSE); if (err != IA_CSS_SUCCESS) { dev_err(isp->dev, "css init failed --- bad firmware?\n"); @@ -909,8 +909,7 @@ static inline int __set_css_print_env(struct atomisp_device *isp, int opt) int atomisp_css_check_firmware_version(struct atomisp_device *isp) { - if (!sh_css_check_firmware_version((void *)isp->firmware->data)) { - dev_err(isp->dev, "Fw version check failed.\n"); + if (!sh_css_check_firmware_version(isp->dev, (void *)isp->firmware->data)) { return -EINVAL; } return 0; @@ -945,7 +944,7 @@ int atomisp_css_load_firmware(struct atomisp_device *isp) isp->css_env.isp_css_env.print_env.error_print = atomisp_css2_err_print; /* load isp fw into ISP memory */ - err = ia_css_load_firmware(&isp->css_env.isp_css_env, + err = ia_css_load_firmware(isp->dev, &isp->css_env.isp_css_env, &isp->css_env.isp_css_fw); if (err != IA_CSS_SUCCESS) { dev_err(isp->dev, "css load fw failed.\n"); @@ -992,7 +991,7 @@ int atomisp_css_resume(struct atomisp_device *isp) return -EINVAL; } - ret = ia_css_init(&isp->css_env.isp_css_env, NULL, + ret = ia_css_init(isp->dev, &isp->css_env.isp_css_env, NULL, mmu_base_addr, IA_CSS_IRQ_TYPE_PULSE); if (ret) { dev_err(isp->dev, "re-init css failed.\n"); diff --git a/drivers/staging/media/atomisp/pci/ia_css_control.h b/drivers/staging/media/atomisp/pci/ia_css_control.h index d9bd1861e50d4..248040b3ec077 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_control.h +++ b/drivers/staging/media/atomisp/pci/ia_css_control.h @@ -45,11 +45,11 @@ * contents of this firmware package are copied into local data structures, so * the fw pointer could be freed after this function completes. */ -enum ia_css_err ia_css_init( - const struct ia_css_env *env, - const struct ia_css_fw *fw, - u32 l1_base, - enum ia_css_irq_type irq_type); +enum ia_css_err ia_css_init(struct device *dev, + const struct ia_css_env *env, + const struct ia_css_fw *fw, + u32 l1_base, + enum ia_css_irq_type irq_type); /* @brief Un-initialize the CSS API. * @return None @@ -66,31 +66,6 @@ enum ia_css_err ia_css_init( void ia_css_uninit(void); -/* @brief Suspend CSS API for power down - * @return success or faulure code - * - * suspend shuts down the system by: - * unloading all the streams - * stopping SP - * performing uninit - * - * Currently stream memory is deallocated because of rmmgr issues. - * Need to come up with a bypass that will leave the streams intact. - */ -enum ia_css_err -ia_css_suspend(void); - -/* @brief Resume CSS API from power down - * @return success or failure code - * - * After a power cycle, this function will bring the CSS API back into - * a state where it can be started. - * This will re-initialize the hardware and all the streams. - * Call this function only after ia_css_suspend() has been called. - */ -enum ia_css_err -ia_css_resume(void); - /* @brief Enable use of a separate queue for ISYS events. * * @param[in] enable: enable or disable use of separate ISYS event queues. diff --git a/drivers/staging/media/atomisp/pci/ia_css_firmware.h b/drivers/staging/media/atomisp/pci/ia_css_firmware.h index 48059c026c8bb..50817162703b6 100644 --- a/drivers/staging/media/atomisp/pci/ia_css_firmware.h +++ b/drivers/staging/media/atomisp/pci/ia_css_firmware.h @@ -48,7 +48,7 @@ struct ia_css_fw { * firmware only needs to be loaded once). */ enum ia_css_err -ia_css_load_firmware(const struct ia_css_env *env, +ia_css_load_firmware(struct device *dev, const struct ia_css_env *env, const struct ia_css_fw *fw); /* @brief Unloads the firmware @@ -61,14 +61,4 @@ ia_css_load_firmware(const struct ia_css_env *env, void ia_css_unload_firmware(void); -/* @brief Checks firmware version - * @param[in] fw Firmware package containing the firmware for all - * predefined ISP binaries. - * @return Returns true when the firmware version matches with the CSS - * host code version and returns false otherwise. - * This function checks if the firmware package version matches with the CSS host code version. - */ -bool -ia_css_check_firmware_version(const struct ia_css_fw *fw); - #endif /* __IA_CSS_FIRMWARE_H */ diff --git a/drivers/staging/media/atomisp/pci/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c index 27cbc57846bbb..af77fb57282f3 100644 --- a/drivers/staging/media/atomisp/pci/sh_css.c +++ b/drivers/staging/media/atomisp/pci/sh_css.c @@ -1619,19 +1619,8 @@ ia_css_reset_defaults(struct sh_css *css) *css = default_css; } -bool -ia_css_check_firmware_version(const struct ia_css_fw *fw) -{ - bool retval = false; - - if (fw) { - retval = sh_css_check_firmware_version(fw->data); - } - return retval; -} - enum ia_css_err -ia_css_load_firmware(const struct ia_css_env *env, +ia_css_load_firmware(struct device *dev, const struct ia_css_env *env, const struct ia_css_fw *fw) { enum ia_css_err err; @@ -1650,7 +1639,7 @@ ia_css_load_firmware(const struct ia_css_env *env, } ia_css_unload_firmware(); /* in case we are called twice */ - err = sh_css_load_firmware(fw->data, fw->bytes); + err = sh_css_load_firmware(dev, fw->data, fw->bytes); if (err == IA_CSS_SUCCESS) { err = ia_css_binary_init_infos(); @@ -1663,7 +1652,7 @@ ia_css_load_firmware(const struct ia_css_env *env, } enum ia_css_err -ia_css_init(const struct ia_css_env *env, +ia_css_init(struct device *dev, const struct ia_css_env *env, const struct ia_css_fw *fw, u32 mmu_l1_base, enum ia_css_irq_type irq_type) { @@ -1791,7 +1780,7 @@ ia_css_init(const struct ia_css_env *env, if (fw) { ia_css_unload_firmware(); /* in case we already had firmware loaded */ - err = sh_css_load_firmware(fw->data, fw->bytes); + err = sh_css_load_firmware(dev, fw->data, fw->bytes); if (err != IA_CSS_SUCCESS) { IA_CSS_LEAVE_ERR(err); return err; @@ -1859,74 +1848,6 @@ ia_css_init(const struct ia_css_env *env, return err; } -enum ia_css_err ia_css_suspend(void) -{ - int i; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() enter\n"); - my_css_save.mode = sh_css_mode_suspend; - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - if (my_css_save.stream_seeds[i].stream) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> unloading seed %d (%p)\n", i, - my_css_save.stream_seeds[i].stream); - ia_css_stream_unload(my_css_save.stream_seeds[i].stream); - } - my_css_save.mode = sh_css_mode_working; - ia_css_stop_sp(); - ia_css_uninit(); - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> after 1: seed %d (%p)\n", i, - my_css_save.stream_seeds[i].stream); - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_suspend() leave\n"); - return IA_CSS_SUCCESS; -} - -enum ia_css_err -ia_css_resume(void) { - int i, j; - enum ia_css_err err; - - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_resume() enter: void\n"); - - err = ia_css_init(&my_css_save.driver_env, my_css_save.loaded_fw, my_css_save.mmu_base, my_css_save.irq_type); - if (err != IA_CSS_SUCCESS) - return err; - err = ia_css_start_sp(); - if (err != IA_CSS_SUCCESS) - return err; - my_css_save.mode = sh_css_mode_resume; - for (i = 0; i < MAX_ACTIVE_STREAMS; i++) - { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> seed stream %p\n", - my_css_save.stream_seeds[i].stream); - if (my_css_save.stream_seeds[i].stream) { - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "==*> loading seed %d\n", i); - err = ia_css_stream_load(my_css_save.stream_seeds[i].stream); - if (err != IA_CSS_SUCCESS) { - if (i) - for (j = 0; j < i; j++) - ia_css_stream_unload(my_css_save.stream_seeds[j].stream); - return err; - } - err = ia_css_stream_start(my_css_save.stream_seeds[i].stream); - if (err != IA_CSS_SUCCESS) { - for (j = 0; j <= i; j++) { - ia_css_stream_stop(my_css_save.stream_seeds[j].stream); - ia_css_stream_unload(my_css_save.stream_seeds[j].stream); - } - return err; - } - *my_css_save.stream_seeds[i].orig_stream = my_css_save.stream_seeds[i].stream; - for (j = 0; j < my_css_save.stream_seeds[i].num_pipes; j++) - *my_css_save.stream_seeds[i].orig_pipes[j] = - my_css_save.stream_seeds[i].pipes[j]; - } - } - my_css_save.mode = sh_css_mode_working; - ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_resume() leave: return_void\n"); - return IA_CSS_SUCCESS; -} - enum ia_css_err ia_css_enable_isys_event_queue(bool enable) { if (sh_css_sp_is_running()) diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/sh_css_firmware.c index fd2cefdec15d5..2b1f9845177eb 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.c @@ -181,7 +181,7 @@ sh_css_load_blob_info(const char *fw, const struct ia_css_fw_info *bi, } bool -sh_css_check_firmware_version(const char *fw_data) +sh_css_check_firmware_version(struct device *dev, const char *fw_data) { struct sh_css_fw_bi_file_h *file_header; @@ -196,6 +196,8 @@ sh_css_check_firmware_version(const char *fw_data) file_header = &firmware_header->file_header; if (strcmp(file_header->version, release_version) != 0) { + dev_err(dev, "Fw version check failed. Expecting '%s', firmware is '%s'.\n", + release_version, file_header->version); return false; } else { /* firmware version matches */ @@ -204,7 +206,7 @@ sh_css_check_firmware_version(const char *fw_data) } enum ia_css_err -sh_css_load_firmware(const char *fw_data, +sh_css_load_firmware(struct device *dev, const char *fw_data, unsigned int fw_size) { unsigned int i; struct ia_css_fw_info *binaries; @@ -221,7 +223,7 @@ sh_css_load_firmware(const char *fw_data, file_header = &firmware_header->file_header; binaries = &firmware_header->binary_header; strncpy(FW_rel_ver_name, file_header->version, min(sizeof(FW_rel_ver_name), sizeof(file_header->version)) - 1); - valid_firmware = sh_css_check_firmware_version(fw_data); + valid_firmware = sh_css_check_firmware_version(dev, fw_data); if (!valid_firmware) { IA_CSS_ERROR("CSS code version (%s) and firmware version (%s) mismatch!", file_header->version, release_version); diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.h b/drivers/staging/media/atomisp/pci/sh_css_firmware.h index 090758d6f00ad..f6253392a6c9b 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.h +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.h @@ -38,10 +38,10 @@ char *sh_css_get_fw_version(void); bool -sh_css_check_firmware_version(const char *fw_data); +sh_css_check_firmware_version(struct device *dev, const char *fw_data); enum ia_css_err -sh_css_load_firmware(const char *fw_data, +sh_css_load_firmware(struct device *dev, const char *fw_data, unsigned int fw_size); void sh_css_unload_firmware(void); -- GitLab From f770e91a7b64043dd730b59b5e62d82e71faec63 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 7 May 2020 20:05:38 +0200 Subject: [PATCH 454/503] media: atomisp: limit the name of the firmware file The firmware header has 64 bytes. Properly limit it to such size. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/sh_css_firmware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/sh_css_firmware.c index 2b1f9845177eb..3ba9a7d09c9af 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.c @@ -222,7 +222,7 @@ sh_css_load_firmware(struct device *dev, const char *fw_data, firmware_header = (struct firmware_header *)fw_data; file_header = &firmware_header->file_header; binaries = &firmware_header->binary_header; - strncpy(FW_rel_ver_name, file_header->version, min(sizeof(FW_rel_ver_name), sizeof(file_header->version)) - 1); + strscpy(FW_rel_ver_name, file_header->version, min(sizeof(FW_rel_ver_name), sizeof(file_header->version))); valid_firmware = sh_css_check_firmware_version(dev, fw_data); if (!valid_firmware) { IA_CSS_ERROR("CSS code version (%s) and firmware version (%s) mismatch!", -- GitLab From 9b7632e8fe7f7e0d75a61dccf2917e55022ecb66 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 8 May 2020 08:55:19 +0200 Subject: [PATCH 455/503] media: atomisp: fix clock rate frequency setting changeset d5426f4c2eba ("media: staging: atomisp: use clock framework for camera clocks") removed a platform-specific code to set the clock rate, in favor of using the Kernel clock framework. However, instead of passing the frequency for clk_set_rate(), it is passing either 0 or 1. Looking at the original patchset, it seems that there are two possible configurations for the ISP: 0 - it will use a 25 MHz XTAL to provide the clock; 1 - it will use a PLL with is set to 19.2 MHz (only for the CHT version?) Eventually, different XTALs and/or PLL frequencies might be possible some day, so, re-implent the logic for it to be more generic. Fixes: d5426f4c2eba ("media: staging: atomisp: use clock framework for camera clocks") Signed-off-by: Mauro Carvalho Chehab --- .../platform/intel-mid/atomisp_gmin_platform.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index 783ea48b26fb8..bdb4fdebacf55 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -17,7 +17,15 @@ #define MAX_SUBDEVS 8 -#define VLV2_CLK_PLL_19P2MHZ 1 /* XTAL on CHT */ + +enum clock_rate { + VLV2_CLK_XTAL_25_0MHz = 0, + VLV2_CLK_PLL_19P2MHZ = 1 +}; + +#define CLK_RATE_19_2MHZ 19200000 +#define CLK_RATE_25_0MHZ 25000000 + #define ELDO1_SEL_REG 0x19 #define ELDO1_1P8V 0x16 #define ELDO1_CTRL_SHIFT 0x00 @@ -28,7 +36,7 @@ struct gmin_subdev { struct v4l2_subdev *subdev; int clock_num; - int clock_src; + enum clock_rate clock_src; bool clock_on; struct clk *pmc_clk; struct gpio_desc *gpio0; @@ -570,7 +578,7 @@ static int gmin_flisclk_ctrl(struct v4l2_subdev *subdev, int on) return 0; if (on) { - ret = clk_set_rate(gs->pmc_clk, gs->clock_src); + ret = clk_set_rate(gs->pmc_clk, gs->clock_src ? CLK_RATE_19_2MHZ : CLK_RATE_25_0MHZ); if (ret) dev_err(&client->dev, "unable to set PMC rate %d\n", -- GitLab From ca133c395f2f6ccf7980677d6583224d23711897 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 8 May 2020 11:27:02 +0200 Subject: [PATCH 456/503] media: atomisp: improve device detection code - Remove useless check if !dev at the probe function: if such function is called, the device is defined. - Cleanup the PCI ID table using macros. - Use the same macros at the version-dependent part of the atomisp_v4l2.c file; - Add print messages to help understand what model the driver detect; - If device is not valid, better explain why. Signed-off-by: Mauro Carvalho Chehehab --- .../staging/media/atomisp/pci/atomisp_v4l2.c | 80 +++++++++++++------ 1 file changed, 54 insertions(+), 26 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index fa919ac57c787..2cdda7f01bc38 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1462,20 +1462,64 @@ atomisp_load_firmware(struct atomisp_device *isp) static bool is_valid_device(struct pci_dev *dev, const struct pci_device_id *id) { - unsigned int a0_max_id; + unsigned int a0_max_id = 0; + const char *name; switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) { case ATOMISP_PCI_DEVICE_SOC_MRFLD: a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX; + atomisp_hw_is_isp2401 = false; + name = "Merrifield"; break; case ATOMISP_PCI_DEVICE_SOC_BYT: a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX; + atomisp_hw_is_isp2401 = false; + name = "Baytrail"; + break; + case ATOMISP_PCI_DEVICE_SOC_ANN: + name = "Anniedale"; + atomisp_hw_is_isp2401 = true; + break; + case ATOMISP_PCI_DEVICE_SOC_CHT: + name = "Cherrytrail"; + atomisp_hw_is_isp2401 = true; break; default: - return true; + dev_err(&dev->dev, "Unknown device ID %x04:%x04\n", + id->vendor, id->device); + return false; } - return dev->revision > a0_max_id; + if (dev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) { + dev_err(&dev->dev, "%s revision %d is not unsupported\n", + name, dev->revision); + return false; + } + + /* + * FIXME: + * remove the if once the driver become generic + */ + +#if defined(ISP2400) + if (atomisp_hw_is_isp2401) { + dev_err(&dev->dev, "Support for %s (ISP2401) was disabled at compile time\n", + name); + return false; + } +#else + if (!atomisp_hw_is_isp2401) { + dev_err(&dev->dev, "Support for %s (ISP2400) was disabled at compile time\n", + name); + return false; + } +#endif + + dev_info(&dev->dev, "Detected %s version %d (ISP240%c)\n", + name, dev->revision, + atomisp_hw_is_isp2401 ? '1' : '0'); + + return true; } static int init_atomisp_wdts(struct atomisp_device *isp) @@ -1522,21 +1566,12 @@ static int atomisp_pci_probe(struct pci_dev *dev, int err, val; u32 irq; - if (!dev) { - dev_err(&dev->dev, "atomisp: error device ptr\n"); - return -EINVAL; - } - if (!is_valid_device(dev, id)) return -ENODEV; + /* Pointer to struct device. */ atomisp_dev = &dev->dev; - if (id->driver_data == HW_IS_ISP2401) - atomisp_hw_is_isp2401 = true; - else - atomisp_hw_is_isp2401 = false; - pdata = atomisp_get_platform_data(); if (!pdata) dev_warn(&dev->dev, "no platform data available\n"); @@ -1892,23 +1927,16 @@ static void atomisp_pci_remove(struct pci_dev *dev) } static const struct pci_device_id atomisp_pci_tbl[] = { -/* - * FIXME: - * remove the ifs once we get rid of the ifs on other parts of the driver - */ -#if defined(ISP2400) /* Merrifield */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178), .driver_data = HW_IS_ISP2400}, - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179), .driver_data = HW_IS_ISP2400}, - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x117a), .driver_data = HW_IS_ISP2400}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_1179)}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_117A)}, /* Baytrail */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0f38), .driver_data = HW_IS_ISP2400}, -#elif defined(ISP2401) + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_BYT)}, /* Anniedale (Merrifield+ / Moorefield) */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1478), .driver_data = HW_IS_ISP2401}, + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_ANN)}, /* Cherrytrail */ - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x22b8), .driver_data = HW_IS_ISP2401}, -#endif + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_CHT)}, {0,} }; -- GitLab From 33c24f8f5a2716824bb0af959d7eb87c94133cfc Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 8 May 2020 12:38:37 +0200 Subject: [PATCH 457/503] media: atomisp: relax firmware version detection criteria As getting the exact version used by the driver is not easy, let's relax the version detection and hope for the best, producing just a warning. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/sh_css_firmware.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/sh_css_firmware.c b/drivers/staging/media/atomisp/pci/sh_css_firmware.c index 3ba9a7d09c9af..eb3c015748538 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_firmware.c +++ b/drivers/staging/media/atomisp/pci/sh_css_firmware.c @@ -196,13 +196,13 @@ sh_css_check_firmware_version(struct device *dev, const char *fw_data) file_header = &firmware_header->file_header; if (strcmp(file_header->version, release_version) != 0) { - dev_err(dev, "Fw version check failed. Expecting '%s', firmware is '%s'.\n", + dev_err(dev, "Firmware version may not be compatible with this driver\n"); + dev_err(dev, "Expecting version '%s', but firmware is '%s'.\n", release_version, file_header->version); - return false; - } else { - /* firmware version matches */ - return true; } + + /* For now, let's just accept a wrong version, even if wrong */ + return true; } enum ia_css_err -- GitLab From 25bccb98ae05c06edc0c31cb82e6bf105124855c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 8 May 2020 11:27:39 +0200 Subject: [PATCH 458/503] media: atomisp: free PCI resources when probing fail The atomisp probe error logic is incomplete. Add the missing bits to return the PCI device to its original state. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp_v4l2.c | 25 +++++++++++++++---- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 2cdda7f01bc38..b5c3724047c51 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1576,7 +1576,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, if (!pdata) dev_warn(&dev->dev, "no platform data available\n"); - err = pcim_enable_device(dev); + err = pci_enable_device(dev); if (err) { dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n", err); @@ -1590,7 +1590,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, if (err) { dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n", err); - return err; + goto ioremap_fail; } base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR]; @@ -1602,8 +1602,8 @@ static int atomisp_pci_probe(struct pci_dev *dev, isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL); if (!isp) { - dev_err(&dev->dev, "Failed to alloc CI ISP structure\n"); - return -ENOMEM; + err = -ENOMEM; + goto atomisp_dev_alloc_fail; } isp->pdev = dev; isp->dev = &dev->dev; @@ -1722,7 +1722,8 @@ static int atomisp_pci_probe(struct pci_dev *dev, break; default: dev_err(&dev->dev, "un-supported IUNIT device\n"); - return -ENODEV; + err = -ENODEV; + goto atomisp_dev_alloc_fail; } dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n", @@ -1735,6 +1736,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, isp->firmware = atomisp_load_firmware(isp); if (!isp->firmware) { err = -ENOENT; + dev_dbg(&dev->dev, "Firmware load failed\n"); goto load_fw_fail; } @@ -1743,6 +1745,8 @@ static int atomisp_pci_probe(struct pci_dev *dev, dev_dbg(&dev->dev, "Firmware version check failed\n"); goto fw_validation_fail; } + } else { + dev_info(&dev->dev, "Firmware load will be deferred\n"); } pci_set_master(dev); @@ -1870,7 +1874,9 @@ static int atomisp_pci_probe(struct pci_dev *dev, initialize_modules_fail: cpu_latency_qos_remove_request(&isp->pm_qos); atomisp_msi_irq_uninit(isp, dev); + pci_disable_msi(dev); enable_msi_fail: + pci_disable_device(dev); fw_validation_fail: release_firmware(isp->firmware); load_fw_fail: @@ -1896,6 +1902,11 @@ static int atomisp_pci_probe(struct pci_dev *dev, /* Address later when we worry about the ...field chips */ if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp)) dev_err(&dev->dev, "Failed to switch off ISP\n"); + +atomisp_dev_alloc_fail: + pcim_iounmap_regions(dev, 1 << ATOM_ISP_PCI_BAR); + +ioremap_fail: return err; } @@ -1904,6 +1915,8 @@ static void atomisp_pci_remove(struct pci_dev *dev) struct atomisp_device *isp = (struct atomisp_device *) pci_get_drvdata(dev); + dev_info(&dev->dev, "Removing atomisp driver\n"); + atomisp_drvfs_exit(); atomisp_acc_cleanup(isp); @@ -1924,6 +1937,8 @@ static void atomisp_pci_remove(struct pci_dev *dev) release_firmware(isp->firmware); hmm_pool_unregister(HMM_POOL_TYPE_RESERVED); + + pci_disable_device(dev); } static const struct pci_device_id atomisp_pci_tbl[] = { -- GitLab From 9972311643ac9c8f550272410a0cd4d6a2671eee Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 9 May 2020 09:48:37 +0200 Subject: [PATCH 459/503] media: atomisp: make dfs_config_merr_117a struct const This setting is used only for one of te Merryfield PCI IDs. As this is an ISP2400, we can just get rid of a version test, writing the right value directly inside the struct. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp_v4l2.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index b5c3724047c51..9914e05d4fe45 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -217,7 +217,7 @@ static const struct atomisp_dfs_config dfs_config_merr_1179 = { .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179), }; -static struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { +static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { { .width = 1920, .height = 1080, @@ -229,11 +229,7 @@ static struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = { .width = 1080, .height = 1920, .fps = 30, - /* - * FIXME: this is weird, but .isp_freq depends on - * the chip being ISP2400 or ISP2401. So, this should be - * initialized on runtime. - */ + .isp_freq = ISP_FREQ_266MHZ, .run_mode = ATOMISP_RUN_MODE_VIDEO, }, { @@ -1629,15 +1625,6 @@ static int atomisp_pci_probe(struct pci_dev *dev, isp->dfs = &dfs_config_merr_1179; break; case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A: - /* - * FIXME: This should likely be uneeded. Either one - * value is likely the correct one for this resolution - */ - if (!atomisp_hw_is_isp2401) - dfs_rules_merr_117a[1].isp_freq = ISP_FREQ_266MHZ; - else - dfs_rules_merr_117a[1].isp_freq = ISP_FREQ_400MHZ; - isp->dfs = &dfs_config_merr_117a; break; -- GitLab From 88a4711e7973836e3802e75e954e3cd1b07b3fba Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 9 May 2020 09:59:54 +0200 Subject: [PATCH 460/503] media: atomisp: add -dDEBUG when building this driver This driver still has lots of issues. Let's enable debug there inconditionally, as we need more information in order to address the pending issues. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Makefile | 3 +++ drivers/staging/media/atomisp/pci/atomisp_fops.c | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index d166b5f614e80..c032444a4db65 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -5,6 +5,9 @@ obj-$(CONFIG_INTEL_ATOMISP) += i2c/ obj-$(CONFIG_INTEL_ATOMISP) += platform/ obj-$(CONFIG_VIDEO_ATOMISP) += atomisp.o +# While on staging, keep debug enabled +DEFINES += -DDEBUG + atomisp = $(srctree)/drivers/staging/media/atomisp/ # SPDX-License-Identifier: GPL-2.0 diff --git a/drivers/staging/media/atomisp/pci/atomisp_fops.c b/drivers/staging/media/atomisp/pci/atomisp_fops.c index 2b855e7b61c8c..667d6f7d1d5ef 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_fops.c +++ b/drivers/staging/media/atomisp/pci/atomisp_fops.c @@ -785,6 +785,7 @@ static int atomisp_open(struct file *file) asd->subdev.devnode = vdev; /* Deferred firmware loading case. */ if (isp->css_env.isp_css_fw.bytes == 0) { + dev_err(isp->dev, "Deferred firmware load.\n"); isp->firmware = atomisp_load_firmware(isp); if (!isp->firmware) { dev_err(isp->dev, "Failed to load ISP firmware.\n"); -- GitLab From 0d64e9420583cbc3c4a3f949ebe38fd8f7769281 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 10 May 2020 10:29:57 +0200 Subject: [PATCH 461/503] media: atomisp: Add some ACPI detection info When someone would report problems with a new device, we need to know the DMI product ID and the ACPI name for the detected sensor. So, print them at dmesg. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/i2c/atomisp-gc0310.c | 12 +++++++++++- drivers/staging/media/atomisp/i2c/atomisp-gc2235.c | 11 +++++++++++ drivers/staging/media/atomisp/i2c/atomisp-lm3554.c | 11 +++++++++++ drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c | 11 +++++++++++ drivers/staging/media/atomisp/i2c/atomisp-ov2680.c | 11 +++++++++++ drivers/staging/media/atomisp/i2c/atomisp-ov2722.c | 11 +++++++++++ .../media/atomisp/i2c/ov5693/atomisp-ov5693.c | 11 +++++++++++ drivers/staging/media/atomisp/pci/atomisp_v4l2.c | 13 +++++++++---- 8 files changed, 86 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c index 6ca708e8ff6ad..b69a5b50e3bce 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -1309,8 +1309,18 @@ static int gc0310_probe(struct i2c_client *client) int ret; void *pdata; unsigned int i; + acpi_handle handle; + struct acpi_device *adev; + + handle = ACPI_HANDLE(&client->dev); + if (!handle || acpi_bus_get_device(handle, &adev)) { + dev_err(&client->dev, "Error could not get ACPI device\n"); + return -ENODEV; + } + + pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + __func__, acpi_device_bid(adev), acpi_device_hid(adev)); - pr_info("%s S\n", __func__); dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) return -ENOMEM; diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c index b663b47449a74..e863e19f26695 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -1051,6 +1051,17 @@ static int gc2235_probe(struct i2c_client *client) void *gcpdev; int ret; unsigned int i; + acpi_handle handle; + struct acpi_device *adev; + + handle = ACPI_HANDLE(&client->dev); + if (!handle || acpi_bus_get_device(handle, &adev)) { + dev_err(&client->dev, "Error could not get ACPI device\n"); + return -ENODEV; + } + + pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + __func__, acpi_device_bid(adev), acpi_device_hid(adev)); dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c index 05f9b354a70e9..0e9f80239dcbc 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c @@ -850,6 +850,17 @@ static int lm3554_probe(struct i2c_client *client) struct lm3554 *flash; unsigned int i; int ret; + acpi_handle handle; + struct acpi_device *adev; + + handle = ACPI_HANDLE(&client->dev); + if (!handle || acpi_bus_get_device(handle, &adev)) { + dev_err(&client->dev, "Error could not get ACPI device\n"); + return -ENODEV; + } + + pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + __func__, acpi_device_bid(adev), acpi_device_hid(adev)); flash = kzalloc(sizeof(*flash), GFP_KERNEL); if (!flash) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c index 9c426c95dc3ff..e7af4bbd844b2 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -1816,6 +1816,17 @@ static int mt9m114_probe(struct i2c_client *client) int ret = 0; unsigned int i; void *pdata; + acpi_handle handle; + struct acpi_device *adev; + + handle = ACPI_HANDLE(&client->dev); + if (!handle || acpi_bus_get_device(handle, &adev)) { + dev_err(&client->dev, "Error could not get ACPI device\n"); + return -ENODEV; + } + + pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + __func__, acpi_device_bid(adev), acpi_device_hid(adev)); /* Setup sensor configuration structure */ dev = kzalloc(sizeof(*dev), GFP_KERNEL); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index cb8989e351672..4f1e0d8df8e10 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -1386,6 +1386,17 @@ static int ov2680_probe(struct i2c_client *client) int ret; void *pdata; unsigned int i; + acpi_handle handle; + struct acpi_device *adev; + + handle = ACPI_HANDLE(&client->dev); + if (!handle || acpi_bus_get_device(handle, &adev)) { + dev_err(&client->dev, "Error could not get ACPI device\n"); + return -ENODEV; + } + + pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + __func__, acpi_device_bid(adev), acpi_device_hid(adev)); dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c index 44edd182fbabe..08799054704a2 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -1214,6 +1214,17 @@ static int ov2722_probe(struct i2c_client *client) struct ov2722_device *dev; void *ovpdev; int ret; + acpi_handle handle; + struct acpi_device *adev; + + handle = ACPI_HANDLE(&client->dev); + if (!handle || acpi_bus_get_device(handle, &adev)) { + dev_err(&client->dev, "Error could not get ACPI device\n"); + return -ENODEV; + } + + pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + __func__, acpi_device_bid(adev), acpi_device_hid(adev)); dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) diff --git a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c index 9e92ee8626e5d..6572e927cf9b6 100644 --- a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c +++ b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c @@ -1901,6 +1901,17 @@ static int ov5693_probe(struct i2c_client *client) int ret = 0; void *pdata; unsigned int i; + acpi_handle handle; + struct acpi_device *adev; + + handle = ACPI_HANDLE(&client->dev); + if (!handle || acpi_bus_get_device(handle, &adev)) { + dev_err(&client->dev, "Error could not get ACPI device\n"); + return -ENODEV; + } + + pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + __func__, acpi_device_bid(adev), acpi_device_hid(adev)); /* * Firmware workaround: Some modules use a "secondary default" diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 9914e05d4fe45..d4e44a1a96014 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -1460,6 +1461,9 @@ static bool is_valid_device(struct pci_dev *dev, { unsigned int a0_max_id = 0; const char *name; + const char *product; + + product = dmi_get_system_info(DMI_PRODUCT_NAME); switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) { case ATOMISP_PCI_DEVICE_SOC_MRFLD: @@ -1481,8 +1485,8 @@ static bool is_valid_device(struct pci_dev *dev, atomisp_hw_is_isp2401 = true; break; default: - dev_err(&dev->dev, "Unknown device ID %x04:%x04\n", - id->vendor, id->device); + dev_err(&dev->dev, "%s: unknown device ID %x04:%x04\n", + product, id->vendor, id->device); return false; } @@ -1511,9 +1515,10 @@ static bool is_valid_device(struct pci_dev *dev, } #endif - dev_info(&dev->dev, "Detected %s version %d (ISP240%c)\n", + dev_info(&dev->dev, "Detected %s version %d (ISP240%c) on %s\n", name, dev->revision, - atomisp_hw_is_isp2401 ? '1' : '0'); + atomisp_hw_is_isp2401 ? '1' : '0', + product); return true; } -- GitLab From 85df8457b31c4c277f59b80c1e2a636d34f0c8ce Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 10 May 2020 13:39:18 +0200 Subject: [PATCH 462/503] media: atomisp: better display DMI and EFI found entries There are several device-specific data that are obtained either via DMI or EFI, with changes the driver's behavior. Display what has been detected, as such info may help identifying troubles at the driver. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-ov2680.c | 2 +- .../media/atomisp/i2c/ov5693/atomisp-ov5693.c | 2 +- .../include/linux/atomisp_gmin_platform.h | 6 ++- .../staging/media/atomisp/pci/atomisp_v4l2.c | 2 +- .../intel-mid/atomisp_gmin_platform.c | 46 +++++++++++++------ 5 files changed, 39 insertions(+), 19 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 4f1e0d8df8e10..4601cefde89bf 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -1395,7 +1395,7 @@ static int ov2680_probe(struct i2c_client *client) return -ENODEV; } - pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", + dev_info(&client->dev, "%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); dev = kzalloc(sizeof(*dev), GFP_KERNEL); diff --git a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c index 6572e927cf9b6..886f9fd0152f1 100644 --- a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c +++ b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c @@ -1919,7 +1919,7 @@ static int ov5693_probe(struct i2c_client *client) * some BIOS versions haven't gotten the memo. Work around * via config. */ - i2c = gmin_get_var_int(&client->dev, "I2CAddr", -1); + i2c = gmin_get_var_int(&client->dev, false, "I2CAddr", -1); if (i2c != -1) { dev_info(&client->dev, "Overriding firmware-provided I2C address (0x%x) with 0x%x\n", diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h index 09e260ea06cac..8700ffd32bdbe 100644 --- a/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h +++ b/drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h @@ -23,10 +23,12 @@ int atomisp_register_i2c_module(struct v4l2_subdev *subdev, struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter, struct i2c_board_info *board_info); int atomisp_gmin_remove_subdev(struct v4l2_subdev *sd); -int gmin_get_var_int(struct device *dev, const char *var, int def); +int gmin_get_var_int(struct device *dev, bool is_gmin, + const char *var, int def); int camera_sensor_csi(struct v4l2_subdev *sd, u32 port, u32 lanes, u32 format, u32 bayer_order, int flag); -struct camera_sensor_platform_data *gmin_camera_platform_data( +struct camera_sensor_platform_data * +gmin_camera_platform_data( struct v4l2_subdev *subdev, enum atomisp_input_format csi_format, enum atomisp_bayer_order csi_bayer); diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index d4e44a1a96014..ae1585d99e74e 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1658,7 +1658,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, /* HPLL frequency is known to be device-specific, but we don't * have specs yet for exactly how it varies. Default to * BYT-CR but let provisioning set it via EFI variable */ - isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq", + isp->hpll_freq = gmin_get_var_int(&dev->dev, false, "HpllFreq", HPLL_FREQ_2000MHZ); /* diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index bdb4fdebacf55..722681e1ac6e8 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -366,12 +366,12 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) pmic_id); gmin_subdevs[i].subdev = subdev; - gmin_subdevs[i].clock_num = gmin_get_var_int(dev, "CamClk", 0); + gmin_subdevs[i].clock_num = gmin_get_var_int(dev, false, "CamClk", 0); /*WA:CHT requires XTAL clock as PLL is not stable.*/ - gmin_subdevs[i].clock_src = gmin_get_var_int(dev, "ClkSrc", + gmin_subdevs[i].clock_src = gmin_get_var_int(dev, false, "ClkSrc", VLV2_CLK_PLL_19P2MHZ); - gmin_subdevs[i].csi_port = gmin_get_var_int(dev, "CsiPort", 0); - gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, "CsiLanes", 1); + gmin_subdevs[i].csi_port = gmin_get_var_int(dev, false, "CsiPort", 0); + gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1); /* get PMC clock with clock framework */ snprintf(gmin_pmc_clk_name, @@ -500,9 +500,14 @@ static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on) { struct gmin_subdev *gs = find_gmin_subdev(subdev); int ret; + struct device *dev; + struct i2c_client *client = v4l2_get_subdevdata(subdev); + + dev = &client->dev; if (v1p8_gpio == V1P8_GPIO_UNSET) { - v1p8_gpio = gmin_get_var_int(NULL, "V1P8GPIO", V1P8_GPIO_NONE); + v1p8_gpio = gmin_get_var_int(dev, true, + "V1P8GPIO", V1P8_GPIO_NONE); if (v1p8_gpio != V1P8_GPIO_NONE) { pr_info("atomisp_gmin_platform: 1.8v power on GPIO %d\n", v1p8_gpio); @@ -536,9 +541,14 @@ static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) { struct gmin_subdev *gs = find_gmin_subdev(subdev); int ret; + struct device *dev; + struct i2c_client *client = v4l2_get_subdevdata(subdev); + + dev = &client->dev; if (v2p8_gpio == V2P8_GPIO_UNSET) { - v2p8_gpio = gmin_get_var_int(NULL, "V2P8GPIO", V2P8_GPIO_NONE); + v2p8_gpio = gmin_get_var_int(dev, true, + "V2P8GPIO", V2P8_GPIO_NONE); if (v2p8_gpio != V2P8_GPIO_NONE) { pr_info("atomisp_gmin_platform: 2.8v power on GPIO %d\n", v2p8_gpio); @@ -697,7 +707,9 @@ static int gmin_get_hardcoded_var(struct gmin_cfg_var *varlist, * argument should be a device with an ACPI companion, as all * configuration is based on firmware ID. */ -static int gmin_get_config_var(struct device *dev, const char *var, +static int gmin_get_config_var(struct device *maindev, + bool is_gmin, + const char *var, char *out, size_t *out_len) { char var8[CFG_VAR_NAME_MAX]; @@ -705,11 +717,12 @@ static int gmin_get_config_var(struct device *dev, const char *var, struct efivar_entry *ev; const struct dmi_system_id *id; int i, ret; + struct device *dev = maindev; - if (dev && ACPI_COMPANION(dev)) + if (!is_gmin && ACPI_COMPANION(dev)) dev = &ACPI_COMPANION(dev)->dev; - if (dev) + if (!is_gmin) ret = snprintf(var8, sizeof(var8), "%s_%s", dev_name(dev), var); else ret = snprintf(var8, sizeof(var8), "gmin_%s", var); @@ -722,8 +735,10 @@ static int gmin_get_config_var(struct device *dev, const char *var, * runtime. */ id = dmi_first_match(gmin_vars); - if (id) + if (id) { + dev_info(maindev, "Found DMI entry for '%s'\n", var8); return gmin_get_hardcoded_var(id->driver_data, var8, out, out_len); + } /* Our variable names are ASCII by construction, but EFI names * are wide chars. Convert and zero-pad. @@ -750,8 +765,11 @@ static int gmin_get_config_var(struct device *dev, const char *var, if (ret == 0) { memcpy(out, ev->var.Data, ev->var.DataSize); *out_len = ev->var.DataSize; - } else if (dev) { - dev_warn(dev, "Failed to find gmin variable %s\n", var8); + dev_info(maindev, "found EFI entry for '%s'\n", var8); + } else if (is_gmin) { + dev_warn(maindev, "Failed to find gmin variable %s\n", var8); + } else { + dev_warn(maindev, "Failed to find variable %s\n", var8); } kfree(ev); @@ -759,14 +777,14 @@ static int gmin_get_config_var(struct device *dev, const char *var, return ret; } -int gmin_get_var_int(struct device *dev, const char *var, int def) +int gmin_get_var_int(struct device *dev, bool is_gmin, const char *var, int def) { char val[CFG_VAR_NAME_MAX]; size_t len = sizeof(val); long result; int ret; - ret = gmin_get_config_var(dev, var, val, &len); + ret = gmin_get_config_var(dev, is_gmin, var, val, &len); if (!ret) { val[len] = 0; ret = kstrtol(val, 0, &result); -- GitLab From d03f2e248c416cd07105ad25fe1809c14fbb47c1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 10 May 2020 15:49:41 +0200 Subject: [PATCH 463/503] media: atomisp: print the type of PMIC that will be used While the current code is hardcoded to just one specific type of PMIC, it can support several types. Those should be board-dependent. Instead of just printing a number, change the message to display what type of PMIC control is used at runtime. Signed-off-by: Mauro Carvalho Chehab --- .../intel-mid/atomisp_gmin_platform.c | 23 +++++++++++++++---- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index 722681e1ac6e8..8fd8bbaeeb5d6 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -57,9 +57,22 @@ struct gmin_subdev { static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS]; -static enum { PMIC_UNSET = 0, PMIC_REGULATOR, PMIC_AXP, PMIC_TI, - PMIC_CRYSTALCOVE - } pmic_id; +static enum { + PMIC_UNSET = 0, + PMIC_REGULATOR, + PMIC_AXP, + PMIC_TI, + PMIC_CRYSTALCOVE +} pmic_id; + +static const char *pmic_name[] = { + [PMIC_UNSET] = "unset", + [PMIC_REGULATOR] = "regulator", + [PMIC_AXP] = "AXP", + [PMIC_TI] = "TI", + [PMIC_CRYSTALCOVE] = "Crystal Cove", +}; + /* The atomisp uses type==0 for the end-of-list marker, so leave space. */ static struct intel_v4l2_subdev_table pdata_subdevs[MAX_SUBDEVS + 1]; @@ -362,8 +375,8 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) return NULL; dev_info(dev, - "gmin: initializing atomisp module subdev data.PMIC ID %d\n", - pmic_id); + "gmin: initializing atomisp module subdev data using PMIC %s\n", + pmic_name[pmic_id]); gmin_subdevs[i].subdev = subdev; gmin_subdevs[i].clock_num = gmin_get_var_int(dev, false, "CamClk", 0); -- GitLab From 09d87466655d00526cf818b3f3b267884c591702 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 10 May 2020 16:06:53 +0200 Subject: [PATCH 464/503] media: atomisp: reduce the risk of a race condition This driver is really on bad shape. One of the problems is that, as soon as the I2C transfers start to happen, it timeouts detecting a camera: ov2680 i2c-OVTI2680:00: ov2680_probe: ACPI detected it on bus ID=CAM1, HID=OVTI2680 atomisp-isp2 0000:00:03.0: no camera attached or fail to detect ov2680 i2c-OVTI2680:00: gmin: initializing atomisp module subdev data using PMIC regulator ... The right fix here would be to use defer probe, but driver is still on too bad shape. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp_v4l2.c | 25 +++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index ae1585d99e74e..c4bf2ac706d96 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -46,6 +46,10 @@ #include "device_access.h" +/* Timeouts to wait for all subdevs to be registered */ +#define SUBDEV_WAIT_TIMEOUT 50 /* ms */ +#define SUBDEV_WAIT_TIMEOUT_MAX_COUNT 40 /* up to 2 seconds */ + /* G-Min addition: pull this in from intel_mid_pm.h */ #define CSTATE_EXIT_LATENCY_C1 1 @@ -1082,7 +1086,7 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) { const struct atomisp_platform_data *pdata; struct intel_v4l2_subdev_table *subdevs; - int ret, raw_index = -1; + int ret, raw_index = -1, count; pdata = atomisp_get_platform_data(); if (!pdata) { @@ -1090,6 +1094,8 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) return 0; } + /* FIXME: should, instead, use I2C probe */ + for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) { struct v4l2_subdev *subdev; struct i2c_board_info *board_info = @@ -1098,6 +1104,8 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id); int sensor_num, i; + dev_info(isp->dev, "Probing Subdev %s\n", board_info->type); + if (!adapter) { dev_err(isp->dev, "Failed to find i2c adapter for subdev %s\n", @@ -1177,6 +1185,16 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) } } + /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */ + for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) { + if (isp->input_cnt) + break; + msleep(SUBDEV_WAIT_TIMEOUT); + count++; + } + /* Wait more time to give more time for subdev init code */ + msleep(5 * SUBDEV_WAIT_TIMEOUT); + /* * HACK: Currently VCM belongs to primary sensor only, but correct * approach must be to acquire from platform code which sensor @@ -1186,8 +1204,11 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) isp->inputs[raw_index].motor = isp->motor; /* Proceed even if no modules detected. For COS mode and no modules. */ - if (!isp->inputs[0].camera) + if (!isp->input_cnt) dev_warn(isp->dev, "no camera attached or fail to detect\n"); + else + dev_info(isp->dev, "detected %d camera sensors\n", + isp->input_cnt); return atomisp_csi_lane_config(isp); } -- GitLab From a79afb97e0227f7224bbf2e0ee12f2a4f719cc0a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 10 May 2020 17:23:03 +0200 Subject: [PATCH 465/503] media: atomisp: warn if unsupported subdevs are found Right now, the driver supports just one VCM and just one flash device. Warn if more than one such devices were probed. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp_v4l2.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index c4bf2ac706d96..e83aae1978bdb 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1117,6 +1117,11 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) * (via ACPI) and registered, do not create new * ones */ subdev = atomisp_gmin_find_subdev(adapter, board_info); + if (!subdev) { + dev_warn(isp->dev, "Subdev %s not found\n", + board_info->type); + continue; + } ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev); if (ret) { dev_warn(isp->dev, "Subdev %s detection fail\n", @@ -1137,6 +1142,7 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) case RAW_CAMERA: raw_index = isp->input_cnt; dev_dbg(isp->dev, "raw_index: %d\n", raw_index); + /* pass-though */ case SOC_CAMERA: dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt); if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) { @@ -1173,10 +1179,22 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) } break; case CAMERA_MOTOR: + if (isp->motor) { + dev_warn(isp->dev, + "too many atomisp motors, ignored %s\n", + board_info->type); + continue; + } isp->motor = subdev; break; case LED_FLASH: case XENON_FLASH: + if (isp->flash) { + dev_warn(isp->dev, + "too many atomisp flash devices, ignored %s\n", + board_info->type); + continue; + } isp->flash = subdev; break; default: -- GitLab From 93e24ec6bfe6eeb5e74915e2761136c25cf6cd8d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 10 May 2020 22:04:37 +0200 Subject: [PATCH 466/503] media: atomisp: detect the PMIC type Sub-device's power management can be provided via different ways. Instead of hardcoding it, add a code that would be detecting it. This uses a code similar to what's found at the atomisp driver inside the Intel Aero repository: https://github.com/intel-aero/meta-intel-aero.git (driver was removed on some commit, but it can be found on git history). Signed-off-by: Mauro Carvalho Chehab --- .../intel-mid/atomisp_gmin_platform.c | 74 ++++++++++++++++--- 1 file changed, 64 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c index 8fd8bbaeeb5d6..cbdb239d1b867 100644 --- a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c @@ -17,7 +17,6 @@ #define MAX_SUBDEVS 8 - enum clock_rate { VLV2_CLK_XTAL_25_0MHz = 0, VLV2_CLK_PLL_19P2MHZ = 1 @@ -57,6 +56,11 @@ struct gmin_subdev { static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS]; +/* ACPI HIDs for the PMICs that could be used by this driver */ +#define PMIC_ACPI_AXP "INT33F4:00" /* XPower AXP288 PMIC */ +#define PMIC_ACPI_TI "INT33F5:00" /* Dollar Cove TI PMIC */ +#define PMIC_ACPI_CRYSTALCOVE "INT33FD:00" /* Crystal Cove PMIC */ + static enum { PMIC_UNSET = 0, PMIC_REGULATOR, @@ -67,13 +71,12 @@ static enum { static const char *pmic_name[] = { [PMIC_UNSET] = "unset", - [PMIC_REGULATOR] = "regulator", - [PMIC_AXP] = "AXP", - [PMIC_TI] = "TI", - [PMIC_CRYSTALCOVE] = "Crystal Cove", + [PMIC_REGULATOR] = "regulator driver", + [PMIC_AXP] = "XPower AXP288 PMIC", + [PMIC_TI] = "Dollar Cove TI PMIC", + [PMIC_CRYSTALCOVE] = "Crystal Cove PMIC", }; - /* The atomisp uses type==0 for the end-of-list marker, so leave space. */ static struct intel_v4l2_subdev_table pdata_subdevs[MAX_SUBDEVS + 1]; @@ -355,27 +358,78 @@ static const struct dmi_system_id gmin_vars[] = { #define GMIN_PMC_CLK_NAME 14 /* "pmc_plt_clk_[0..5]" */ static char gmin_pmc_clk_name[GMIN_PMC_CLK_NAME]; +struct gmin_match_name { + const char *name; + struct device *dev; +}; + +static int gmin_match_one(struct device *dev, void *data) +{ + struct gmin_match_name *match = data; + const char *name = match->name; + struct i2c_client *client; + + if (dev->type != &i2c_client_type) + return 0; + + client = to_i2c_client(dev); + + dev_info(match->dev, "found '%s' at address 0x%02x, adapter %d\n", + client->name, client->addr, client->adapter->nr); + + return (!strcmp(name, client->name)); +} + +static bool gmin_i2c_dev_exists(struct device *dev, char *name) +{ + struct gmin_match_name match; + bool found; + int ret = 0; + + match.dev = dev; + match.name = name; + + ret = i2c_for_each_dev(&match, gmin_match_one); + + found = !!ret; + + if (found) + dev_info(dev, "%s found on I2C\n", name); + else + dev_info(dev, "%s not found on I2C\n", name); + + return found; +} + static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) { int i, ret; struct device *dev; struct i2c_client *client = v4l2_get_subdevdata(subdev); - if (!pmic_id) - pmic_id = PMIC_REGULATOR; - if (!client) return NULL; dev = &client->dev; + if (!pmic_id) { + if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI)) + pmic_id = PMIC_TI; + else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP)) + pmic_id = PMIC_AXP; + else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE)) + pmic_id = PMIC_CRYSTALCOVE; + else + pmic_id = PMIC_REGULATOR; + } + for (i = 0; i < MAX_SUBDEVS && gmin_subdevs[i].subdev; i++) ; if (i >= MAX_SUBDEVS) return NULL; dev_info(dev, - "gmin: initializing atomisp module subdev data using PMIC %s\n", + "gmin: power management provided via %s\n", pmic_name[pmic_id]); gmin_subdevs[i].subdev = subdev; -- GitLab From 0741bf667f3cf2e9cf6ec88985e14495a95f1540 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 11 May 2020 11:47:25 +0200 Subject: [PATCH 467/503] media: atomisp: move atomisp_gmin_platform.c to pci/ dir The atomisp_gmin_platform.c is not a platform driver anymore, but it is, instead, part of the atomisp driver. Move it to be together with the driver. As a bonus, as the atomisp i2c drivers depends on its contents, probing them should load automatically the atomisp core. This should likely avoid some possible race conditions. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Kconfig | 2 +- drivers/staging/media/atomisp/Makefile | 2 +- .../{platform/intel-mid => pci}/atomisp_gmin_platform.c | 0 drivers/staging/media/atomisp/platform/Makefile | 5 ----- drivers/staging/media/atomisp/platform/intel-mid/Makefile | 4 ---- 5 files changed, 2 insertions(+), 11 deletions(-) rename drivers/staging/media/atomisp/{platform/intel-mid => pci}/atomisp_gmin_platform.c (100%) delete mode 100644 drivers/staging/media/atomisp/platform/Makefile delete mode 100644 drivers/staging/media/atomisp/platform/intel-mid/Makefile diff --git a/drivers/staging/media/atomisp/Kconfig b/drivers/staging/media/atomisp/Kconfig index f9507b7b8906a..c4f3049b0706e 100644 --- a/drivers/staging/media/atomisp/Kconfig +++ b/drivers/staging/media/atomisp/Kconfig @@ -31,6 +31,6 @@ config VIDEO_ATOMISP_ISP2401 Disabling it enables support for Atom ISP2400-based boards (Merrifield and Baytrail SoCs). -if INTEL_ATOMISP +if VIDEO_ATOMISP source "drivers/staging/media/atomisp/i2c/Kconfig" endif diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index c032444a4db65..4f09d0c431dae 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -2,7 +2,6 @@ # Makefile for camera drivers. # obj-$(CONFIG_INTEL_ATOMISP) += i2c/ -obj-$(CONFIG_INTEL_ATOMISP) += platform/ obj-$(CONFIG_VIDEO_ATOMISP) += atomisp.o # While on staging, keep debug enabled @@ -24,6 +23,7 @@ atomisp-objs += \ pci/atomisp_subdev.o \ pci/atomisp_tpg.o \ pci/atomisp_v4l2.o \ + pci/atomisp_gmin_platform.o \ pci/sh_css_firmware.o \ pci/sh_css_host_data.o \ pci/sh_css_hrt.o \ diff --git a/drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c similarity index 100% rename from drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c rename to drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c diff --git a/drivers/staging/media/atomisp/platform/Makefile b/drivers/staging/media/atomisp/platform/Makefile deleted file mode 100644 index 0e3b7e1c81c68..0000000000000 --- a/drivers/staging/media/atomisp/platform/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for camera drivers. -# - -obj-$(CONFIG_INTEL_ATOMISP) += intel-mid/ diff --git a/drivers/staging/media/atomisp/platform/intel-mid/Makefile b/drivers/staging/media/atomisp/platform/intel-mid/Makefile deleted file mode 100644 index c53db1364e217..0000000000000 --- a/drivers/staging/media/atomisp/platform/intel-mid/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# -# Makefile for intel-mid devices. -# -obj-$(CONFIG_INTEL_ATOMISP) += atomisp_gmin_platform.o -- GitLab From b4dc4e139beb406784c4ef2f1bc359eac37de5be Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 11 May 2020 14:07:26 +0200 Subject: [PATCH 468/503] media: atomisp: add support for different PMIC configurations This patch required lots of research and work. The existing atomisp driver at staging assumed that all Intel PMIC would be using regulators, but upstream didn't follow it. Instead, the intel_pmic.c driver added a hack, instead of using i2c_transfer, it writes I2C values directly via regmapped registers. Oh, well... At least, it provided a common API for doing that. The PMIC settings used here came from the driver at the yocto Aero distribution: https://download.01.org/aero/deb/pool/main/l/linux-4.4.76-aero-1.3/ The logic itself was re-written, in order to use the I2C address detected by the probing part. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/atomisp_gmin_platform.c | 275 ++++++++++++++---- 1 file changed, 225 insertions(+), 50 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c index cbdb239d1b867..12c15e070b14c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c @@ -25,13 +25,39 @@ enum clock_rate { #define CLK_RATE_19_2MHZ 19200000 #define CLK_RATE_25_0MHZ 25000000 +/* X-Powers AXP288 register set */ +#define ALDO1_SEL_REG 0x28 +#define ALDO1_CTRL3_REG 0x13 +#define ALDO1_2P8V 0x16 +#define ALDO1_CTRL3_SHIFT 0x05 + +#define ELDO_CTRL_REG 0x12 + #define ELDO1_SEL_REG 0x19 #define ELDO1_1P8V 0x16 #define ELDO1_CTRL_SHIFT 0x00 + #define ELDO2_SEL_REG 0x1a #define ELDO2_1P8V 0x16 #define ELDO2_CTRL_SHIFT 0x01 +/* TI SND9039 PMIC register set */ +#define LDO9_REG 0x49 +#define LDO10_REG 0x4a +#define LDO11_REG 0x4b + +#define LDO_2P8V_ON 0x2f /* 0x2e selects 2.85V ... */ +#define LDO_2P8V_OFF 0x2e /* ... bottom bit is "enabled" */ + +#define LDO_1P8V_ON 0x59 /* 0x58 selects 1.80V ... */ +#define LDO_1P8V_OFF 0x58 /* ... bottom bit is "enabled" */ + +/* CRYSTAL COVE PMIC register set */ +#define CRYSTAL_1P8V_REG 0x57 +#define CRYSTAL_2P8V_REG 0x5d +#define CRYSTAL_ON 0x63 +#define CRYSTAL_OFF 0x62 + struct gmin_subdev { struct v4l2_subdev *subdev; int clock_num; @@ -52,6 +78,12 @@ struct gmin_subdev { bool v2p8_on; bool v1p2_on; bool v2p8_vcm_on; + + u8 pwm_i2c_addr; + + /* For PMIC AXP */ + int eldo1_sel_reg, eldo1_1p8v, eldo1_ctrl_shift; + int eldo2_sel_reg, eldo2_1p8v, eldo2_ctrl_shift; }; static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS]; @@ -61,6 +93,8 @@ static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS]; #define PMIC_ACPI_TI "INT33F5:00" /* Dollar Cove TI PMIC */ #define PMIC_ACPI_CRYSTALCOVE "INT33FD:00" /* Crystal Cove PMIC */ +#define PMIC_PLATFORM_TI "intel_soc_pmic_chtdc_ti" + static enum { PMIC_UNSET = 0, PMIC_REGULATOR, @@ -358,15 +392,9 @@ static const struct dmi_system_id gmin_vars[] = { #define GMIN_PMC_CLK_NAME 14 /* "pmc_plt_clk_[0..5]" */ static char gmin_pmc_clk_name[GMIN_PMC_CLK_NAME]; -struct gmin_match_name { - const char *name; - struct device *dev; -}; - -static int gmin_match_one(struct device *dev, void *data) +static int gmin_i2c_match_one(struct device *dev, const void *data) { - struct gmin_match_name *match = data; - const char *name = match->name; + const char *name = data; struct i2c_client *client; if (dev->type != &i2c_client_type) @@ -374,38 +402,61 @@ static int gmin_match_one(struct device *dev, void *data) client = to_i2c_client(dev); - dev_info(match->dev, "found '%s' at address 0x%02x, adapter %d\n", - client->name, client->addr, client->adapter->nr); - return (!strcmp(name, client->name)); } -static bool gmin_i2c_dev_exists(struct device *dev, char *name) +static struct i2c_client *gmin_i2c_dev_exists(struct device *dev, char *name, + struct i2c_client **client) { - struct gmin_match_name match; - bool found; - int ret = 0; + struct device *d; + + while ((d = bus_find_device(&i2c_bus_type, NULL, name, + gmin_i2c_match_one))) { + *client = to_i2c_client(d); + dev_dbg(dev, "found '%s' at address 0x%02x, adapter %d\n", + (*client)->name, (*client)->addr, + (*client)->adapter->nr); + return *client; + } - match.dev = dev; - match.name = name; + return NULL; +} - ret = i2c_for_each_dev(&match, gmin_match_one); +static int gmin_i2c_write(struct device *dev, u16 i2c_addr, u8 reg, + u32 value, u32 mask) +{ + int ret; - found = !!ret; + /* + * FIXME: Right now, the intel_pmic driver just write values + * directly at the regmap, instead of properly implementing + * i2c_transfer() mechanism. Let's use the same interface here, + * as otherwise we may face issues. + */ - if (found) - dev_info(dev, "%s found on I2C\n", name); - else - dev_info(dev, "%s not found on I2C\n", name); + dev_dbg(dev, + "I2C write, addr: 0x%02x, reg: 0x%02x, value: 0x%02x, mask: 0x%02x\n", + i2c_addr, reg, value, mask); + + ret = intel_soc_pmic_exec_mipi_pmic_seq_element(i2c_addr, reg, + value, mask); + + if (ret == -EOPNOTSUPP) { + dev_err(dev, + "ACPI didn't mapped the OpRegion needed to access I2C address 0x%02x.\n" + "Need to compile the Kernel using CONFIG_*_PMIC_OPREGION settings\n", + i2c_addr); + return ret; + } - return found; + return ret; } static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) { int i, ret; struct device *dev; - struct i2c_client *client = v4l2_get_subdevdata(subdev); + struct i2c_client *power = NULL, *client = v4l2_get_subdevdata(subdev); if (!client) return NULL; @@ -413,11 +464,11 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) dev = &client->dev; if (!pmic_id) { - if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI)) + if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI, &power)) pmic_id = PMIC_TI; - else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP)) + else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP, &power)) pmic_id = PMIC_AXP; - else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE)) + else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE, &power)) pmic_id = PMIC_CRYSTALCOVE; else pmic_id = PMIC_REGULATOR; @@ -428,9 +479,16 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) if (i >= MAX_SUBDEVS) return NULL; - dev_info(dev, - "gmin: power management provided via %s\n", - pmic_name[pmic_id]); + + if (power) { + gmin_subdevs[i].pwm_i2c_addr = power->addr; + dev_info(dev, + "gmin: power management provided via %s (i2c addr 0x%02x)\n", + pmic_name[pmic_id], power->addr); + } else { + dev_info(dev, "gmin: power management provided via %s\n", + pmic_name[pmic_id]); + } gmin_subdevs[i].subdev = subdev; gmin_subdevs[i].clock_num = gmin_get_var_int(dev, false, "CamClk", 0); @@ -479,26 +537,14 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) if (IS_ERR(gmin_subdevs[i].gpio1)) gmin_subdevs[i].gpio1 = NULL; - if (pmic_id == PMIC_REGULATOR) { - /* Those regulators may have different names depending on the BIOS */ - gmin_subdevs[i].v1p8_reg = regulator_get_optional(dev, "V1P8SX"); - gmin_subdevs[i].v2p8_reg = regulator_get_optional(dev, "V2P8SX"); - + switch (pmic_id) { + case PMIC_REGULATOR: + gmin_subdevs[i].v1p8_reg = regulator_get(dev, "V1P8SX"); + gmin_subdevs[i].v2p8_reg = regulator_get(dev, "V2P8SX"); gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A"); gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B"); - /* - * Based on DTST dumps on newer Atom E3800 devices, it seems that - * the regulators data now have new names. - */ - if (IS_ERR(gmin_subdevs[i].v1p8_reg)) - gmin_subdevs[i].v1p8_reg = regulator_get(dev, "Regulator1p8v"); - - if (IS_ERR(gmin_subdevs[i].v2p8_reg)) - gmin_subdevs[i].v2p8_reg = regulator_get(dev, "Regulator2p8v"); - - /* Note: ideally we would initialize v[12]p8_on to the * output of regulator_is_enabled(), but sadly that * API is broken with the current drivers, returning @@ -506,6 +552,32 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) * "unbalanced disable" WARNing if we try to disable * it. */ + break; + + case PMIC_AXP: + gmin_subdevs[i].eldo1_1p8v = gmin_get_var_int(dev, false, + "eldo1_1p8v", + ELDO1_1P8V); + gmin_subdevs[i].eldo1_sel_reg = gmin_get_var_int(dev, false, + "eldo1_sel_reg", + ELDO1_SEL_REG); + gmin_subdevs[i].eldo1_ctrl_shift = gmin_get_var_int(dev, false, + "eldo1_ctrl_shift", + ELDO1_CTRL_SHIFT); + gmin_subdevs[i].eldo2_1p8v = gmin_get_var_int(dev, false, + "eldo2_1p8v", + ELDO2_1P8V); + gmin_subdevs[i].eldo2_sel_reg = gmin_get_var_int(dev, false, + "eldo2_sel_reg", + ELDO2_SEL_REG); + gmin_subdevs[i].eldo2_ctrl_shift = gmin_get_var_int(dev, false, + "eldo2_ctrl_shift", + ELDO2_CTRL_SHIFT); + gmin_subdevs[i].pwm_i2c_addr = power->addr; + break; + + default: + break; } return &gmin_subdevs[i]; @@ -521,6 +593,64 @@ static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev) return gmin_subdev_add(subdev); } +static int axp_regulator_set(struct device *dev, struct gmin_subdev *gs, + int sel_reg, u8 setting, + int ctrl_reg, int shift, bool on) +{ + int ret; + int val; + + ret = gmin_i2c_write(dev, gs->pwm_i2c_addr, sel_reg, setting, 0xff); + if (ret) + return ret; + + val = on ? 1 << shift : 0; + + ret = gmin_i2c_write(dev, gs->pwm_i2c_addr, sel_reg, val, 1 << shift); + if (ret) + return ret; + + return 0; +} + +static int axp_v1p8_on(struct device *dev, struct gmin_subdev *gs) +{ + int ret; + ret = axp_regulator_set(dev, gs, gs->eldo2_sel_reg, gs->eldo2_1p8v, + ELDO_CTRL_REG, gs->eldo2_ctrl_shift, true); + if (ret) + return ret; + + /* + * This sleep comes out of the gc2235 driver, which is the + * only one I currently see that wants to set both 1.8v rails. + */ + usleep_range(110, 150); + + ret = axp_regulator_set(dev, gs, gs->eldo1_sel_reg, gs->eldo1_1p8v, + ELDO_CTRL_REG, gs->eldo1_ctrl_shift, true); + if (ret) + return ret; + + ret = axp_regulator_set(dev, gs, gs->eldo2_sel_reg, gs->eldo2_1p8v, + ELDO_CTRL_REG, gs->eldo2_ctrl_shift, false); + return ret; +} + +static int axp_v1p8_off(struct device *dev, struct gmin_subdev *gs) +{ + int ret; + ret = axp_regulator_set(dev, gs, gs->eldo1_sel_reg, gs->eldo1_1p8v, + ELDO_CTRL_REG, gs->eldo1_ctrl_shift, false); + if (ret) + return ret; + + ret = axp_regulator_set(dev, gs, gs->eldo2_sel_reg, gs->eldo2_1p8v, + ELDO_CTRL_REG, gs->eldo2_ctrl_shift, false); + return ret; +} + + static int gmin_gpio0_ctrl(struct v4l2_subdev *subdev, int on) { struct gmin_subdev *gs = find_gmin_subdev(subdev); @@ -551,6 +681,7 @@ static int gmin_v1p2_ctrl(struct v4l2_subdev *subdev, int on) return 0; gs->v1p2_on = on; + /* use regulator for PMIC */ if (gs->v1p2_reg) { if (on) return regulator_enable(gs->v1p2_reg); @@ -558,7 +689,7 @@ static int gmin_v1p2_ctrl(struct v4l2_subdev *subdev, int on) return regulator_disable(gs->v1p2_reg); } - /*TODO:v1p2 needs to extend to other PMICs*/ + /* TODO:v1p2 may need to extend to other PMICs */ return -EINVAL; } @@ -569,6 +700,7 @@ static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on) int ret; struct device *dev; struct i2c_client *client = v4l2_get_subdevdata(subdev); + int value; dev = &client->dev; @@ -601,6 +733,27 @@ static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on) return regulator_disable(gs->v1p8_reg); } + switch (pmic_id) { + case PMIC_AXP: + if (on) + return axp_v1p8_on(subdev->dev, gs); + else + return axp_v1p8_off(subdev->dev, gs); + case PMIC_TI: + value = on ? LDO_1P8V_ON : LDO_1P8V_OFF; + + return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, + LDO10_REG, value, 0xff); + case PMIC_CRYSTALCOVE: + value = on ? CRYSTAL_ON : CRYSTAL_OFF; + + return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, + CRYSTAL_1P8V_REG, value, 0xff); + default: + dev_err(subdev->dev, "Couldn't set power mode for v1p2\n"); + } + + return -EINVAL; } @@ -610,6 +763,7 @@ static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) int ret; struct device *dev; struct i2c_client *client = v4l2_get_subdevdata(subdev); + int value; dev = &client->dev; @@ -642,6 +796,25 @@ static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) return regulator_disable(gs->v2p8_reg); } + switch (pmic_id) { + case PMIC_AXP: + return axp_regulator_set(subdev->dev, gs, ALDO1_SEL_REG, + ALDO1_2P8V, ALDO1_CTRL3_REG, + ALDO1_CTRL3_SHIFT, on); + case PMIC_TI: + value = on ? LDO_2P8V_ON : LDO_2P8V_OFF; + + return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, + LDO9_REG, value, 0xff); + case PMIC_CRYSTALCOVE: + value = on ? CRYSTAL_ON : CRYSTAL_OFF; + + return gmin_i2c_write(subdev->dev, gs->pwm_i2c_addr, + CRYSTAL_2P8V_REG, value, 0xff); + default: + dev_err(subdev->dev, "Couldn't set power mode for v1p2\n"); + } + return -EINVAL; } @@ -655,7 +828,8 @@ static int gmin_flisclk_ctrl(struct v4l2_subdev *subdev, int on) return 0; if (on) { - ret = clk_set_rate(gs->pmc_clk, gs->clock_src ? CLK_RATE_19_2MHZ : CLK_RATE_25_0MHZ); + ret = clk_set_rate(gs->pmc_clk, + gs->clock_src ? CLK_RATE_19_2MHZ : CLK_RATE_25_0MHZ); if (ret) dev_err(&client->dev, "unable to set PMC rate %d\n", @@ -804,7 +978,8 @@ static int gmin_get_config_var(struct device *maindev, id = dmi_first_match(gmin_vars); if (id) { dev_info(maindev, "Found DMI entry for '%s'\n", var8); - return gmin_get_hardcoded_var(id->driver_data, var8, out, out_len); + return gmin_get_hardcoded_var(id->driver_data, var8, out, + out_len); } /* Our variable names are ASCII by construction, but EFI names -- GitLab From 4877b19e13a3a550819349ea0d46b5f0b775ed3f Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 12 May 2020 12:45:40 +0200 Subject: [PATCH 469/503] media: atomisp: spctrl: be sure to zero .code_addr after free We need that to avoid trying to double-free the driver. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c b/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c index ceaac8235b4bc..db39fa273251a 100644 --- a/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c +++ b/drivers/staging/media/atomisp/pci/runtime/spctrl/src/spctrl.c @@ -123,8 +123,10 @@ enum ia_css_err ia_css_spctrl_unload_fw(sp_ID_t sp_id) return IA_CSS_ERR_INVALID_ARGUMENTS; /* freeup the resource */ - if (spctrl_cofig_info[sp_id].code_addr) + if (spctrl_cofig_info[sp_id].code_addr) { hmm_free(spctrl_cofig_info[sp_id].code_addr); + spctrl_cofig_info[sp_id].code_addr = mmgr_NULL; + } spctrl_loaded[sp_id] = false; return IA_CSS_SUCCESS; } -- GitLab From a27b5811819705910220c70239dd5eec49fefa2d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 12 May 2020 14:07:19 +0200 Subject: [PATCH 470/503] media: atomisp: use pcim_enable_device() again Changing to pci_enable_device() didn't produce the expected result. It could also eventually led to problems when driver is removed, due to object lifetime issues. So, let's just return to the previous behavior. Suggested-by: Andy Shevchenko Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_v4l2.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index e83aae1978bdb..36f9b43d31ae0 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1616,7 +1616,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, if (!pdata) dev_warn(&dev->dev, "no platform data available\n"); - err = pci_enable_device(dev); + err = pcim_enable_device(dev); if (err) { dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n", err); @@ -1907,7 +1907,6 @@ static int atomisp_pci_probe(struct pci_dev *dev, atomisp_msi_irq_uninit(isp, dev); pci_disable_msi(dev); enable_msi_fail: - pci_disable_device(dev); fw_validation_fail: release_firmware(isp->firmware); load_fw_fail: @@ -1968,8 +1967,6 @@ static void atomisp_pci_remove(struct pci_dev *dev) release_firmware(isp->firmware); hmm_pool_unregister(HMM_POOL_TYPE_RESERVED); - - pci_disable_device(dev); } static const struct pci_device_id atomisp_pci_tbl[] = { -- GitLab From 0f441fd70b1e7d1a4e035410f9effbfdf5c273fa Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 12 May 2020 15:13:50 +0200 Subject: [PATCH 471/503] media: atomisp: simplify the power down/up code Use the version from intel_atomisp2_pm.c for power up/down, removing some code duplication and using just one kAPI call for modifying the ISPSSPM0 register. Signed-off-by: Mauro Carvalho Chehab --- .../staging/media/atomisp/pci/atomisp_v4l2.c | 113 ++++++++---------- 1 file changed, 49 insertions(+), 64 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 36f9b43d31ae0..8c7b42221659d 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -761,91 +761,76 @@ static void punit_ddr_dvfs_enable(bool enable) pr_info("DDR DVFS, door bell is not cleared within 3ms\n"); } -/* Workaround for pmu_nc_set_power_state not ready in MRFLD */ -int atomisp_mrfld_power_down(struct atomisp_device *isp) +static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) { unsigned long timeout; - u32 reg_value; + u32 val = enable ? MRFLD_ISPSSPM0_IUNIT_POWER_ON : + MRFLD_ISPSSPM0_IUNIT_POWER_OFF; - /* writing 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */ - iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); - reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK; - reg_value |= MRFLD_ISPSSPM0_IUNIT_POWER_OFF; - iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value); + dev_dbg(isp->dev, "IUNIT power-%s.\n", enable ? "on" : "off"); /*WA:Enable DVFS*/ - if (IS_CHT) + if (IS_CHT && enable) punit_ddr_dvfs_enable(true); - /* - * There should be no iunit access while power-down is - * in progress HW sighting: 4567865 - * FIXME: msecs_to_jiffies(50)- experienced value - */ - timeout = jiffies + msecs_to_jiffies(50); - while (1) { - iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); - dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n", - reg_value); - /* wait until ISPSSPM0 bit[25:24] shows 0x3 */ - if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) == - MRFLD_ISPSSPM0_IUNIT_POWER_OFF) { - trace_ipu_cstate(0); - return 0; - } - - if (time_after(jiffies, timeout)) { - dev_err(isp->dev, "power-off iunit timeout.\n"); - return -EBUSY; - } - /* FIXME: experienced value for delay */ - usleep_range(100, 150); - } -} - -/* Workaround for pmu_nc_set_power_state not ready in MRFLD */ -int atomisp_mrfld_power_up(struct atomisp_device *isp) -{ - unsigned long timeout; - u32 reg_value; - - /*WA for PUNIT, if DVFS enabled, ISP timeout observed*/ - if (IS_CHT) - punit_ddr_dvfs_enable(false); - /* * FIXME:WA for ECS28A, with this sleep, CTS * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort * PASS, no impact on other platforms */ - if (IS_BYT) + if (IS_BYT && enable) msleep(10); - /* writing 0x0 to ISPSSPM0 bit[1:0] to power off the IUNIT */ - iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); - reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK; - iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSPM0, reg_value); + /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */ + iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, + val, MRFLD_ISPSSPM0_ISPSSC_MASK); + + /*WA:Enable DVFS*/ + if (IS_CHT && !enable) + punit_ddr_dvfs_enable(true); - /* FIXME: experienced value for delay */ + /* + * There should be no IUNIT access while power-down is + * in progress. HW sighting: 4567865. + * Wait up to 50 ms for the IUNIT to shut down. + * And we do the same for power on. + */ timeout = jiffies + msecs_to_jiffies(50); - while (1) { - iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, ®_value); - dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n", - reg_value); - /* wait until ISPSSPM0 bit[25:24] shows 0x0 */ - if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) == - MRFLD_ISPSSPM0_IUNIT_POWER_ON) { - trace_ipu_cstate(1); + do { + u32 tmp; + + /* Wait until ISPSSPM0 bit[25:24] shows the right value */ + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp); + tmp = (tmp & MRFLD_ISPSSPM0_ISPSSC_MASK) >> MRFLD_ISPSSPM0_ISPSSS_OFFSET; + if (tmp == val) { + trace_ipu_cstate(enable); return 0; } - if (time_after(jiffies, timeout)) { - dev_err(isp->dev, "power-on iunit timeout.\n"); - return -EBUSY; - } + if (time_after(jiffies, timeout)) + break; + /* FIXME: experienced value for delay */ usleep_range(100, 150); - } + } while (1); + + if (enable) + msleep(10); + + dev_err(isp->dev, "IUNIT power-%s timeout.\n", enable ? "on" : "off"); + return -EBUSY; +} + +/* Workaround for pmu_nc_set_power_state not ready in MRFLD */ +int atomisp_mrfld_power_down(struct atomisp_device *isp) +{ + return atomisp_mrfld_power(isp, false); +} + +/* Workaround for pmu_nc_set_power_state not ready in MRFLD */ +int atomisp_mrfld_power_up(struct atomisp_device *isp) +{ + return atomisp_mrfld_power(isp, true); } int atomisp_runtime_suspend(struct device *dev) -- GitLab From 1351ea6b04c8488d0bfde4a2ee55ae111f4a0b0d Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 13 May 2020 08:04:18 +0200 Subject: [PATCH 472/503] media: atomisp: remove a misplaced #endif There is an endif in the middle of a comment at ia_css_xnr3.host.c. Remove it. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c index 4630cbd495f86..a9db6366d20bc 100644 --- a/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c +++ b/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c @@ -53,7 +53,6 @@ static const s16 c[XNR3_LOOK_UP_TABLE_POINTS] = { }; /* -#endif * Default kernel parameters. In general, default is bypass mode or as close * to the ineffective values as possible. Due to the chroma down+upsampling, * perfect bypass mode is not possible for xnr3 filter itself. Instead, the -- GitLab From 3117ddda1ecef96e646b120681a606b41247df52 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 12 May 2020 20:32:51 +0200 Subject: [PATCH 473/503] media: atomisp: fix an inverted logic When changing the IFs to select isp2401 at runtime, one of the conditions ended by being written wrong. Code double-checked on both Yocto Aero's driver version and against the previous code. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_compat_css20.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c index 7afd12cba5760..abc0fd91781a3 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c @@ -4585,10 +4585,10 @@ int atomisp_css_isr_thread(struct atomisp_device *isp, } } - if (!atomisp_hw_is_isp2401) + if (atomisp_hw_is_isp2401) return 0; - /* ISP2401: If there are no buffers queued then delete wdt timer. */ + /* ISP2400: If there are no buffers queued then delete wdt timer. */ for (i = 0; i < isp->num_of_streams; i++) { asd = &isp->asd[i]; if (!asd) -- GitLab From 983e5aca98bf569e45a98905e3f604f4c8fc58c8 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 12 May 2020 23:02:58 +0200 Subject: [PATCH 474/503] media: atomisp: get rid of spmem_dump.c Those files seem to be firmware-dependent, probably being used by some debug interface. Well, their contents are not really used by atomisp, so let's just send them to the trash can, as it shouldn't have any usage upstream. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Makefile | 3 - .../atomisp/pci/css_2400_system/spmem_dump.c | 1935 ---------------- .../atomisp/pci/css_2401_system/spmem_dump.c | 1965 ----------------- .../pci/runtime/debug/src/ia_css_debug.c | 4 - 4 files changed, 3907 deletions(-) delete mode 100644 drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c delete mode 100644 drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 4f09d0c431dae..30b3168c4358c 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -165,15 +165,12 @@ obj-byt = \ pci/css_2400_system/hive/ia_css_isp_configs.o \ pci/css_2400_system/hive/ia_css_isp_params.o \ pci/css_2400_system/hive/ia_css_isp_states.o \ - pci/css_2400_system/spmem_dump.o \ # These will be needed when clean merge CHT support nicely into the driver # Keep them here handy for when we get to that point # obj-cht = \ - pci/css_2401_system/spmem_dump.o \ - pci/css_2401_system/spmem_dump.o \ pci/css_2401_system/hive/ia_css_isp_configs.o \ pci/css_2401_system/hive/ia_css_isp_params.o \ pci/css_2401_system/hive/ia_css_isp_states.o \ diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c deleted file mode 100644 index 300347dbba2b8..0000000000000 --- a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c +++ /dev/null @@ -1,1935 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _sp_map_h_ -#define _sp_map_h_ - -#ifndef _hrt_dummy_use_blob_sp -#define _hrt_dummy_use_blob_sp() -#endif - -#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) - -/* function input_system_acquisition_stop: ADE */ - -/* function longjmp: 684E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_MASK -#define HIVE_MEM_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_HIVE_IF_SRST_MASK 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_MASK scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16 - -/* function tmpmem_init_dmem: 6580 */ - -/* function ia_css_isys_sp_token_map_receive_ack: 5EC4 */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 332C */ - -/* function debug_buffer_set_ddr_addr: DD */ - -/* function receiver_port_reg_load: AC2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_mipi -#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x631C -#define HIVE_SIZE_vbuf_mipi 12 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x631C -#define HIVE_SIZE_sp_vbuf_mipi 12 - -/* function ia_css_event_sp_decode: 351D */ - -/* function ia_css_queue_get_size: 48A5 */ - -/* function ia_css_queue_load: 4EE6 */ - -/* function setjmp: 6857 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue -#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x4684 -#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x4684 -#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 - -/* function ia_css_dmaproxy_sp_wait_for_ack: 6E07 */ - -/* function ia_css_sp_rawcopy_func: 510B */ - -/* function ia_css_tagger_buf_sp_pop_marked: 29F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stage -#define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x5C00 -#define HIVE_SIZE_isp_stage 832 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x5C00 -#define HIVE_SIZE_sp_isp_stage 832 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_raw -#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x2F4 -#define HIVE_SIZE_vbuf_raw 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x2F4 -#define HIVE_SIZE_sp_vbuf_raw 4 - -/* function ia_css_sp_bin_copy_func: 5032 */ - -/* function ia_css_queue_item_store: 4C34 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 - -/* function sp_start_isp: 45D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_binary_group -#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x5FF0 -#define HIVE_SIZE_sp_binary_group 32 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x5FF0 -#define HIVE_SIZE_sp_sp_binary_group 32 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sw_state -#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x62AC -#define HIVE_SIZE_sp_sw_state 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x62AC -#define HIVE_SIZE_sp_sp_sw_state 4 - -/* function ia_css_thread_sp_main: D5B */ - -/* function ia_css_ispctrl_sp_init_internal_buffers: 3723 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_psys_event_queue_handle -#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4B54 -#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4B54 -#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue -#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x4698 -#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x4698 -#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 - -/* function ia_css_tagger_sp_propagate_frame: 2410 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_stop_copy_preview -#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_stop_copy_preview 0x6290 -#define HIVE_SIZE_sp_stop_copy_preview 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_stop_copy_preview 0x6290 -#define HIVE_SIZE_sp_sp_stop_copy_preview 4 - -/* function input_system_reg_load: B17 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_handles -#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x6328 -#define HIVE_SIZE_vbuf_handles 960 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x6328 -#define HIVE_SIZE_sp_vbuf_handles 960 - -/* function ia_css_queue_store: 4D9A */ - -/* function ia_css_sp_flash_register: 2C2C */ - -/* function ia_css_sp_rawcopy_dummy_function: 5652 */ - -/* function ia_css_isys_sp_backend_create: 5B37 */ - -/* function ia_css_pipeline_sp_init: 1833 */ - -/* function ia_css_tagger_sp_configure: 2300 */ - -/* function ia_css_ispctrl_sp_end_binary: 3566 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 - -/* function receiver_port_reg_store: AC9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_is_pending_mask -#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_is_pending_mask 0x5C -#define HIVE_SIZE_event_is_pending_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_is_pending_mask 0x5C -#define HIVE_SIZE_sp_event_is_pending_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_frame -#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x46AC -#define HIVE_SIZE_sp_all_cb_elems_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46AC -#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_isys_event_queue_handle -#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4B74 -#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4B74 -#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_com -#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x4114 -#define HIVE_SIZE_host_sp_com 220 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x4114 -#define HIVE_SIZE_sp_host_sp_com 220 - -/* function ia_css_queue_get_free_space: 49F9 */ - -/* function exec_image_pipe: 6C4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_init_dmem_data -#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x62B0 -#define HIVE_SIZE_sp_init_dmem_data 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x62B0 -#define HIVE_SIZE_sp_sp_init_dmem_data 24 - -/* function ia_css_sp_metadata_start: 5914 */ - -/* function ia_css_bufq_sp_init_buffer_queues: 2C9B */ - -/* function ia_css_pipeline_sp_stop: 1816 */ - -/* function ia_css_tagger_sp_connect_pipes: 27EA */ - -/* function sp_isys_copy_wait: 70D */ - -/* function is_isp_debug_buffer_full: 337 */ - -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 32AF */ - -/* function encode_and_post_timer_event: A30 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_per_frame_data -#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x41F0 -#define HIVE_SIZE_sp_per_frame_data 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x41F0 -#define HIVE_SIZE_sp_sp_per_frame_data 4 - -/* function ia_css_rmgr_sp_vbuf_dequeue: 62D4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_psys_event_queue_handle -#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4B80 -#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4B80 -#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_xmem_bin_addr -#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x41F4 -#define HIVE_SIZE_xmem_bin_addr 4 -#else -#endif -#endif -#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x41F4 -#define HIVE_SIZE_sp_xmem_bin_addr 4 - -/* function tmr_clock_init: 65A0 */ - -/* function ia_css_pipeline_sp_run: 1403 */ - -/* function memcpy: 68F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GP_DEVICE_BASE -#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x2FC -#define HIVE_SIZE_GP_DEVICE_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x2FC -#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue -#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E0 -#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E0 -#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 - -/* function input_system_reg_store: B1E */ - -/* function ia_css_isys_sp_frontend_start: 5D4D */ - -/* function ia_css_uds_sp_scale_params: 6600 */ - -/* function ia_css_circbuf_increase_size: E40 */ - -/* function __divu: 6875 */ - -/* function ia_css_thread_sp_get_state: C83 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_stop -#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x46BC -#define HIVE_SIZE_sem_for_cont_capt_stop 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x46BC -#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 - -/* function thread_fiber_sp_main: E39 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_pipe_thread -#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x4800 -#define HIVE_SIZE_sp_isp_pipe_thread 340 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4800 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 340 - -/* function ia_css_parambuf_sp_handle_parameter_sets: 128A */ - -/* function ia_css_spctrl_sp_set_state: 5943 */ - -/* function ia_css_thread_sem_sp_signal: 6AF7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_IRQ_BASE -#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_IRQ_BASE 0x2C -#define HIVE_SIZE_IRQ_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_IRQ_BASE 0x2C -#define HIVE_SIZE_sp_IRQ_BASE 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_TIMED_CTRL_BASE -#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_TIMED_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 - -/* function ia_css_isys_sp_isr: 6FDC */ - -/* function ia_css_isys_sp_generate_exp_id: 60E5 */ - -/* function ia_css_rmgr_sp_init: 61CF */ - -/* function ia_css_thread_sem_sp_init: 6BC8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x308 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x308 -#define HIVE_SIZE_sp_is_isp_requested 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_frame -#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x46D0 -#define HIVE_SIZE_sem_for_reading_cb_frame 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x46D0 -#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 - -/* function ia_css_dmaproxy_sp_execute: 3217 */ - -/* function ia_css_queue_is_empty: 48E0 */ - -/* function ia_css_pipeline_sp_has_stopped: 180C */ - -/* function ia_css_circbuf_extract: F44 */ - -/* function ia_css_tagger_buf_sp_is_locked_from_start: 2B0D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_sp_thread -#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x1DC -#define HIVE_SIZE_current_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x1DC -#define HIVE_SIZE_sp_current_sp_thread 4 - -/* function ia_css_spctrl_sp_get_spid: 594A */ - -/* function ia_css_bufq_sp_reset_buffers: 2D22 */ - -/* function ia_css_dmaproxy_sp_read_byte_addr: 6E35 */ - -/* function ia_css_rmgr_sp_uninit: 61C8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack -#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 28 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 28 - -/* function ia_css_circbuf_peek: F26 */ - -/* function ia_css_parambuf_sp_wait_for_in_param: 1053 */ - -/* function ia_css_isys_sp_token_map_get_exp_id: 5FAD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_param -#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x46F8 -#define HIVE_SIZE_sp_all_cb_elems_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x46F8 -#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_pipeline_sp_curr_binary_id -#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1EC -#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 -#else -#endif -#endif -#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1EC -#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame_desc -#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4708 -#define HIVE_SIZE_sp_all_cbs_frame_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4708 -#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 - -/* function sp_isys_copy_func_v2: 706 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_param -#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x4710 -#define HIVE_SIZE_sem_for_reading_cb_param 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4710 -#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 - -/* function ia_css_queue_get_used_space: 49AD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_start -#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x4738 -#define HIVE_SIZE_sem_for_cont_capt_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4738 -#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tmp_heap -#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x6010 -#define HIVE_SIZE_tmp_heap 640 -#else -#endif -#endif -#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x6010 -#define HIVE_SIZE_sp_tmp_heap 640 - -/* function ia_css_rmgr_sp_get_num_vbuf: 64D8 */ - -/* function ia_css_ispctrl_sp_output_compute_dma_info: 3F49 */ - -/* function ia_css_tagger_sp_lock_exp_id: 20CD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 - -/* function ia_css_queue_is_full: 4A44 */ - -/* function debug_buffer_init_isp: E4 */ - -/* function ia_css_isys_sp_frontend_uninit: 5D07 */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 2003 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem -#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x66E8 -#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 - -/* function ia_css_rmgr_sp_refcount_dump: 62AF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_pipe_threads -#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_pipe_threads 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_sp_pipe_threads 20 - -/* function sp_event_proxy_func: 71B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_isys_event_queue_handle -#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4BDC -#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4BDC -#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 - -/* function ia_css_thread_sp_yield: 6A70 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param_desc -#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x474C -#define HIVE_SIZE_sp_all_cbs_param_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x474C -#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb -#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4 -#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 - -/* function ia_css_thread_sp_fork: D10 */ - -/* function ia_css_tagger_sp_destroy: 27F4 */ - -/* function ia_css_dmaproxy_sp_vmem_read: 31B7 */ - -/* function ia_css_ifmtr_sp_init: 6136 */ - -/* function initialize_sp_group: 6D4 */ - -/* function ia_css_tagger_buf_sp_peek: 2919 */ - -/* function ia_css_thread_sp_init: D3C */ - -/* function ia_css_isys_sp_reset_exp_id: 60DD */ - -/* function qos_scheduler_update_fps: 65F0 */ - -/* function ia_css_ispctrl_sp_set_stream_base_addr: 461E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_DMEM_BASE -#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_ISP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_DMEM_BASE -#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_SP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_sp_SP_DMEM_BASE 4 - -/* function ia_css_dmaproxy_sp_read: 322D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_raw_copy_line_count -#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x2C8 -#define HIVE_SIZE_raw_copy_line_count 4 -#else -#endif -#endif -#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x2C8 -#define HIVE_SIZE_sp_raw_copy_line_count 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle -#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4BE8 -#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4BE8 -#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 - -/* function ia_css_queue_peek: 4923 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt -#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4A94 -#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4A94 -#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_can_send_token_mask -#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_can_send_token_mask 0x88 -#define HIVE_SIZE_event_can_send_token_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 -#define HIVE_SIZE_sp_event_can_send_token_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_thread -#define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x5F40 -#define HIVE_SIZE_isp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x5F40 -#define HIVE_SIZE_sp_isp_thread 4 - -/* function encode_and_post_sp_event_non_blocking: A78 */ - -/* function ia_css_isys_sp_frontend_destroy: 5DDF */ - -/* function is_ddr_debug_buffer_full: 2CC */ - -/* function ia_css_isys_sp_frontend_stop: 5D1F */ - -/* function ia_css_isys_sp_token_map_init: 607B */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2969 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_fiber -#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_threads_fiber 28 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x19C -#define HIVE_SIZE_sp_sp_threads_fiber 28 - -/* function encode_and_post_sp_event: A01 */ - -/* function debug_enqueue_ddr: EE */ - -/* function ia_css_rmgr_sp_refcount_init_vbuf: 626A */ - -/* function dmaproxy_sp_read_write: 6EE4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer -#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8 -#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_buffer_queue_handle -#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4BF4 -#define HIVE_SIZE_host2sp_buffer_queue_handle 480 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4BF4 -#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_service -#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3178 -#define HIVE_SIZE_ia_css_flash_sp_in_service 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3178 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 - -/* function ia_css_dmaproxy_sp_process: 6BF0 */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 2BF1 */ - -/* function ia_css_isys_sp_backend_rcv_acquire_ack: 59EC */ - -/* function ia_css_isys_sp_backend_pre_acquire_request: 5A02 */ - -/* function ia_css_ispctrl_sp_init_cs: 3653 */ - -/* function ia_css_spctrl_sp_init: 5958 */ - -/* function sp_event_proxy_init: 730 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_output -#define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x41F8 -#define HIVE_SIZE_sp_output 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x41F8 -#define HIVE_SIZE_sp_sp_output 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_CTRL_BASE -#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_ISP_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_INPUT_FORMATTER_BASE -#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 - -/* function sp_dma_proxy_reset_channels: 3487 */ - -/* function ia_css_isys_sp_backend_acquire: 5B0D */ - -/* function ia_css_tagger_sp_update_size: 28E8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue -#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x511C -#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x511C -#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 - -/* function thread_fiber_sp_create: DA8 */ - -/* function ia_css_dmaproxy_sp_set_increments: 3319 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_frame -#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x4754 -#define HIVE_SIZE_sem_for_writing_cb_frame 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x4754 -#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 - -/* function receiver_reg_store: AD7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_param -#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x4768 -#define HIVE_SIZE_sem_for_writing_cb_param 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x4768 -#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 - -/* function sp_start_isp_entry: 453 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifdef HIVE_ADDR_sp_start_isp_entry -#endif -#define HIVE_ADDR_sp_start_isp_entry 0x453 -#endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x453 - -/* function ia_css_tagger_buf_sp_unmark_all: 2B75 */ - -/* function ia_css_tagger_buf_sp_unmark_from_start: 2BB6 */ - -/* function ia_css_dmaproxy_sp_channel_acquire: 34B3 */ - -/* function ia_css_rmgr_sp_add_num_vbuf: 64B4 */ - -/* function ia_css_isys_sp_token_map_create: 60C4 */ - -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3183 */ - -/* function ia_css_tagger_sp_acquire_buf_elem: 1FDB */ - -/* function ia_css_bufq_sp_is_dynamic_buffer: 306C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_group -#define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x4208 -#define HIVE_SIZE_sp_group 1144 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x4208 -#define HIVE_SIZE_sp_sp_group 1144 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_event_proxy_thread -#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x4954 -#define HIVE_SIZE_sp_event_proxy_thread 68 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x4954 -#define HIVE_SIZE_sp_sp_event_proxy_thread 68 - -/* function ia_css_thread_sp_kill: CD6 */ - -/* function ia_css_tagger_sp_create: 28A2 */ - -/* function tmpmem_acquire_dmem: 6561 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_MMU_BASE -#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_MMU_BASE 0x24 -#define HIVE_SIZE_MMU_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_MMU_BASE 0x24 -#define HIVE_SIZE_sp_MMU_BASE 8 - -/* function ia_css_dmaproxy_sp_channel_release: 349F */ - -/* function ia_css_dmaproxy_sp_is_idle: 347F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_qos_start -#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x477C -#define HIVE_SIZE_sem_for_qos_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x477C -#define HIVE_SIZE_sp_sem_for_qos_start 20 - -/* function isp_hmem_load: B55 */ - -/* function ia_css_tagger_sp_release_buf_elem: 1FB7 */ - -/* function ia_css_eventq_sp_send: 34F5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_error_cnt -#define HIVE_MEM_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_error_cnt 0x62D4 -#define HIVE_SIZE_ia_css_isys_sp_error_cnt 16 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_isys_sp_error_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_error_cnt 0x62D4 -#define HIVE_SIZE_sp_ia_css_isys_sp_error_cnt 16 - -/* function ia_css_tagger_buf_sp_unlock_from_start: 2AA5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_debug_buffer_ddr_address -#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_debug_buffer_ddr_address 4 -#else -#endif -#endif -#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 - -/* function sp_isys_copy_request: 714 */ - -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 6344 */ - -/* function ia_css_thread_sp_set_priority: CCE */ - -/* function sizeof_hmem: BFC */ - -/* function tmpmem_release_dmem: 6550 */ - -/* function cnd_input_system_cfg: 392 */ - -/* function __ia_css_sp_rawcopy_func_critical: 6F65 */ - -/* function ia_css_dmaproxy_sp_set_width_exception: 3304 */ - -/* function sp_event_assert: 8B1 */ - -/* function ia_css_flash_sp_init_internal_params: 2C90 */ - -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 29AB */ - -/* function __modu: 68BB */ - -/* function ia_css_dmaproxy_sp_init_isp_vector: 3189 */ - -/* function isp_vamem_store: 0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GDC_BASE -#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GDC_BASE 0x44 -#define HIVE_SIZE_GDC_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GDC_BASE 0x44 -#define HIVE_SIZE_sp_GDC_BASE 8 - -/* function ia_css_queue_local_init: 4C0E */ - -/* function sp_event_proxy_callout_func: 6988 */ - -/* function qos_scheduler_schedule_stage: 65C1 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads -#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x49E0 -#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x49E0 -#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack_size -#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_threads_stack_size 28 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x180 -#define HIVE_SIZE_sp_sp_threads_stack_size 28 - -/* function ia_css_ispctrl_sp_isp_done_row_striping: 3F2F */ - -/* function __ia_css_isys_sp_isr_text: 5E09 */ - -/* function ia_css_queue_dequeue: 4A8C */ - -/* function ia_css_dmaproxy_sp_configure_channel: 6E4C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_thread_fiber_sp -#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x49E8 -#define HIVE_SIZE_current_thread_fiber_sp 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x49E8 -#define HIVE_SIZE_sp_current_thread_fiber_sp 4 - -/* function ia_css_circbuf_pop: FD8 */ - -/* function memset: 693A */ - -/* function irq_raise_set_token: B6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GPIO_BASE -#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GPIO_BASE 0x3C -#define HIVE_SIZE_GPIO_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GPIO_BASE 0x3C -#define HIVE_SIZE_sp_GPIO_BASE 4 - -/* function ia_css_pipeline_acc_stage_enable: 17D7 */ - -/* function ia_css_tagger_sp_unlock_exp_id: 2028 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_ph -#define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x62E4 -#define HIVE_SIZE_isp_ph 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x62E4 -#define HIVE_SIZE_sp_isp_ph 28 - -/* function ia_css_isys_sp_token_map_flush: 6009 */ - -/* function ia_css_ispctrl_sp_init_ds: 37B2 */ - -/* function get_xmem_base_addr_raw: 3B5F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param -#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x4790 -#define HIVE_SIZE_sp_all_cbs_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x4790 -#define HIVE_SIZE_sp_sp_all_cbs_param 16 - -/* function ia_css_circbuf_create: 1026 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp_group -#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x47A0 -#define HIVE_SIZE_sem_for_sp_group 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x47A0 -#define HIVE_SIZE_sp_sem_for_sp_group 20 - -/* function ia_css_framebuf_sp_wait_for_in_frame: 64DF */ - -/* function ia_css_sp_rawcopy_tag_frame: 556F */ - -/* function isp_hmem_clear: B25 */ - -/* function ia_css_framebuf_sp_release_in_frame: 6522 */ - -/* function ia_css_isys_sp_backend_snd_acquire_request: 5A5F */ - -/* function ia_css_isys_sp_token_map_is_full: 5E90 */ - -/* function input_system_acquisition_run: AF9 */ - -/* function ia_css_ispctrl_sp_start_binary: 3631 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x58F4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 - -/* function ia_css_eventq_sp_recv: 34C7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_pool -#define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x2E8 -#define HIVE_SIZE_isp_pool 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x2E8 -#define HIVE_SIZE_sp_isp_pool 4 - -/* function ia_css_rmgr_sp_rel_gen: 6211 */ - -/* function css_get_frame_processing_time_end: 1FA7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_any_pending_mask -#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x300 -#define HIVE_SIZE_event_any_pending_mask 8 -#else -#endif -#endif -#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x300 -#define HIVE_SIZE_sp_event_any_pending_mask 8 - -/* function ia_css_isys_sp_backend_push: 5A16 */ - -/* function sh_css_decode_tag_descr: 352 */ - -/* function debug_enqueue_isp: 27B */ - -/* function qos_scheduler_update_stage_budget: 65AF */ - -/* function ia_css_spctrl_sp_uninit: 5951 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SWITCH_CODE -#define HIVE_MEM_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_HIVE_IF_SWITCH_CODE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SWITCH_CODE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SWITCH_CODE 0x1D8 -#define HIVE_SIZE_sp_HIVE_IF_SWITCH_CODE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x5908 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 - -/* function ia_css_tagger_buf_sp_lock_from_start: 2AD9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_isp_idle -#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x47B4 -#define HIVE_SIZE_sem_for_isp_idle 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x47B4 -#define HIVE_SIZE_sp_sem_for_isp_idle 20 - -/* function ia_css_dmaproxy_sp_write_byte_addr: 31E6 */ - -/* function ia_css_dmaproxy_sp_init: 315D */ - -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 2D62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_VAMEM_BASE -#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_ISP_VAMEM_BASE 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger -#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x6294 -#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x6294 -#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x5994 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 - -/* function ia_css_queue_item_load: 4D00 */ - -/* function ia_css_spctrl_sp_get_state: 593C */ - -/* function ia_css_isys_sp_token_map_uninit: 6026 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_callout_sp_thread -#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x49DC -#define HIVE_SIZE_callout_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x49DC -#define HIVE_SIZE_sp_callout_sp_thread 4 - -/* function thread_fiber_sp_init: E2F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_PMEM_BASE -#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_SP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_sp_SP_PMEM_BASE 4 - -/* function ia_css_isys_sp_token_map_snd_acquire_req: 5F96 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_input_stream_format -#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x40F8 -#define HIVE_SIZE_sp_isp_input_stream_format 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x40F8 -#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 - -/* function __mod: 68A7 */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3247 */ - -/* function ia_css_thread_sp_join: CFF */ - -/* function ia_css_dmaproxy_sp_add_command: 6F4F */ - -/* function ia_css_sp_metadata_thread_func: 57F0 */ - -/* function __sp_event_proxy_func_critical: 6975 */ - -/* function ia_css_sp_metadata_wait: 5903 */ - -/* function ia_css_circbuf_peek_from_start: F08 */ - -/* function ia_css_event_sp_encode: 3552 */ - -/* function ia_css_thread_sp_run: D72 */ - -/* function sp_isys_copy_func: 6F6 */ - -/* function ia_css_isys_sp_backend_flush: 5A7F */ - -/* function ia_css_isys_sp_backend_frame_exists: 599B */ - -/* function ia_css_sp_isp_param_init_isp_memories: 4789 */ - -/* function register_isr: 8A9 */ - -/* function irq_raise: C8 */ - -/* function ia_css_dmaproxy_sp_mmu_invalidate: 3124 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_HIVE_IF_SRST_ADDRESS -#define HIVE_MEM_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_HIVE_IF_SRST_ADDRESS 16 -#else -#endif -#endif -#define HIVE_MEM_sp_HIVE_IF_SRST_ADDRESS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_HIVE_IF_SRST_ADDRESS 0x1B8 -#define HIVE_SIZE_sp_HIVE_IF_SRST_ADDRESS 16 - -/* function pipeline_sp_initialize_stage: 190B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_isys_sp_frontend_states -#define HIVE_MEM_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_isys_sp_frontend_states 0x62C8 -#define HIVE_SIZE_ia_css_isys_sp_frontend_states 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_isys_sp_frontend_states scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_isys_sp_frontend_states 0x62C8 -#define HIVE_SIZE_sp_ia_css_isys_sp_frontend_states 12 - -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6E1E */ - -/* function ia_css_ispctrl_sp_done_ds: 3799 */ - -/* function ia_css_sp_isp_param_get_mem_inits: 4764 */ - -/* function ia_css_parambuf_sp_init_buffer_queues: 13D0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_pfp_spref -#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x2F0 -#define HIVE_SIZE_vbuf_pfp_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x2F0 -#define HIVE_SIZE_sp_vbuf_pfp_spref 4 - -/* function input_system_cfg: ABB */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_HMEM_BASE -#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_ISP_HMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x59DC -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x59DC -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 - -/* function qos_scheduler_init_stage_budget: 65E8 */ - -/* function ia_css_isys_sp_backend_release: 5AF4 */ - -/* function ia_css_isys_sp_backend_destroy: 5B1E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_buffer_queue_handle -#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x5AF4 -#define HIVE_SIZE_sp2host_buffer_queue_handle 96 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x5AF4 -#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 - -/* function ia_css_isys_sp_token_map_check_mipi_frame_size: 5F5A */ - -/* function ia_css_ispctrl_sp_init_isp_vars: 4483 */ - -/* function ia_css_isys_sp_frontend_has_empty_mipi_buffer_cb: 5B70 */ - -/* function sp_warning: 8DC */ - -/* function ia_css_rmgr_sp_vbuf_enqueue: 6304 */ - -/* function ia_css_tagger_sp_tag_exp_id: 2142 */ - -/* function ia_css_dmaproxy_sp_write: 31FD */ - -/* function ia_css_parambuf_sp_release_in_param: 1250 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_irq_sw_interrupt_token -#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x40F4 -#define HIVE_SIZE_irq_sw_interrupt_token 4 -#else -#endif -#endif -#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x40F4 -#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_addresses -#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x5F44 -#define HIVE_SIZE_sp_isp_addresses 172 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x5F44 -#define HIVE_SIZE_sp_sp_isp_addresses 172 - -/* function ia_css_rmgr_sp_acq_gen: 6229 */ - -/* function receiver_reg_load: AD0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isps -#define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x6300 -#define HIVE_SIZE_isps 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x6300 -#define HIVE_SIZE_sp_isps 28 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_queues_initialized -#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x410C -#define HIVE_SIZE_host_sp_queues_initialized 4 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x410C -#define HIVE_SIZE_sp_host_sp_queues_initialized 4 - -/* function ia_css_queue_uninit: 4BCC */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started -#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x5BFC -#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x5BFC -#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 - -/* function ia_css_bufq_sp_release_dynamic_buf: 2DCE */ - -/* function ia_css_dmaproxy_sp_set_height_exception: 32F5 */ - -/* function ia_css_dmaproxy_sp_init_vmem_channel: 327A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_num_ready_threads -#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_num_ready_threads 0x49E4 -#define HIVE_SIZE_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_num_ready_threads 0x49E4 -#define HIVE_SIZE_sp_num_ready_threads 4 - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 31CF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_spref -#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x2EC -#define HIVE_SIZE_vbuf_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x2EC -#define HIVE_SIZE_sp_vbuf_spref 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_metadata_thread -#define HIVE_MEM_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_metadata_thread 0x4998 -#define HIVE_SIZE_sp_metadata_thread 68 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_metadata_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_metadata_thread 0x4998 -#define HIVE_SIZE_sp_sp_metadata_thread 68 - -/* function ia_css_queue_enqueue: 4B16 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_request -#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x4A98 -#define HIVE_SIZE_ia_css_flash_sp_request 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x4A98 -#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 - -/* function ia_css_dmaproxy_sp_vmem_write: 31A0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tagger_frames -#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x49EC -#define HIVE_SIZE_tagger_frames 168 -#else -#endif -#endif -#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x49EC -#define HIVE_SIZE_sp_tagger_frames 168 - -/* function ia_css_isys_sp_token_map_snd_capture_req: 5FB8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_if -#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x47C8 -#define HIVE_SIZE_sem_for_reading_if 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x47C8 -#define HIVE_SIZE_sp_sem_for_reading_if 20 - -/* function sp_generate_interrupts: 95B */ - -/* function ia_css_pipeline_sp_start: 181E */ - -/* function ia_css_sp_rawcopy_init: 50F3 */ - -/* function tmr_clock_read: 6596 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_BAMEM_BASE -#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x2F8 -#define HIVE_SIZE_ISP_BAMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x2F8 -#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 - -/* function ia_css_isys_sp_frontend_rcv_capture_ack: 5C1F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x5B54 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 - -/* function css_get_frame_processing_time_start: 1FAF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame -#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x47DC -#define HIVE_SIZE_sp_all_cbs_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x47DC -#define HIVE_SIZE_sp_sp_all_cbs_frame 16 - -/* function thread_sp_queue_print: D8F */ - -/* function sp_notify_eof: 907 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_str2mem -#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x47EC -#define HIVE_SIZE_sem_for_str2mem 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x47EC -#define HIVE_SIZE_sp_sem_for_str2mem 20 - -/* function ia_css_tagger_buf_sp_is_marked_from_start: 2B41 */ - -/* function ia_css_bufq_sp_acquire_dynamic_buf: 2F86 */ - -/* function ia_css_circbuf_destroy: 101D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_PMEM_BASE -#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_ISP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 - -/* function ia_css_sp_isp_param_mem_load: 46F7 */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 292D */ - -/* function __div: 685F */ - -/* function ia_css_isys_sp_frontend_create: 5DF0 */ - -/* function ia_css_rmgr_sp_refcount_release_vbuf: 6323 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_use -#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x4A9C -#define HIVE_SIZE_ia_css_flash_sp_in_use 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x4A9C -#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 - -/* function ia_css_thread_sem_sp_wait: 6B42 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sleep_mode -#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x4110 -#define HIVE_SIZE_sp_sleep_mode 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x4110 -#define HIVE_SIZE_sp_sp_sleep_mode 4 - -/* function ia_css_tagger_buf_sp_push: 2A3C */ - -/* function mmu_invalidate_cache: D3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_max_cb_elems -#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_max_cb_elems 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_sp_max_cb_elems 8 - -/* function ia_css_queue_remote_init: 4BEE */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stop_req -#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x4680 -#define HIVE_SIZE_isp_stop_req 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x4680 -#define HIVE_SIZE_sp_isp_stop_req 4 - -#define HIVE_ICACHE_sp_critical_SEGMENT_START 0 -#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1 - -#endif /* _sp_map_h_ */ -extern void sh_css_dump_sp_dmem(void); -void sh_css_dump_sp_dmem(void) -{ -} diff --git a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c deleted file mode 100644 index 9d96d52e5eccd..0000000000000 --- a/drivers/staging/media/atomisp/pci/css_2401_system/spmem_dump.c +++ /dev/null @@ -1,1965 +0,0 @@ -/* - * Support for Intel Camera Imaging ISP subsystem. - * Copyright (c) 2015, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _sp_map_h_ -#define _sp_map_h_ - -#ifndef _hrt_dummy_use_blob_sp -#define _hrt_dummy_use_blob_sp() -#endif - -#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp) - -/* function longjmp: 6A0B */ - -/* function tmpmem_init_dmem: 671E */ - -/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */ - -/* function ia_css_pipe_data_init_tagger_resources: AC7 */ - -/* function debug_buffer_set_ddr_addr: DD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_mipi -#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_mipi 0x7444 -#define HIVE_SIZE_vbuf_mipi 12 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_mipi 0x7444 -#define HIVE_SIZE_sp_vbuf_mipi 12 - -/* function ia_css_event_sp_decode: 3FB6 */ - -/* function ia_css_queue_get_size: 53C8 */ - -/* function ia_css_queue_load: 59DF */ - -/* function setjmp: 6A14 */ - -/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue -#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC -#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20 - -/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */ - -/* function ia_css_sp_rawcopy_func: 5B4A */ - -/* function ia_css_tagger_buf_sp_pop_marked: 345C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH -#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0 -#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stage -#define HIVE_MEM_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stage 0x6D48 -#define HIVE_SIZE_isp_stage 832 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stage 0x6D48 -#define HIVE_SIZE_sp_isp_stage 832 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_raw -#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_raw 0x394 -#define HIVE_SIZE_vbuf_raw 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_raw 0x394 -#define HIVE_SIZE_sp_vbuf_raw 4 - -/* function ia_css_sp_bin_copy_func: 5B2B */ - -/* function ia_css_queue_item_store: 572D */ - -/* function input_system_reset: 1201 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160 - -/* function sp_start_isp: 39C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_binary_group -#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_binary_group 32 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_binary_group 0x7138 -#define HIVE_SIZE_sp_sp_binary_group 32 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sw_state -#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sw_state 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sw_state 0x73F0 -#define HIVE_SIZE_sp_sp_sw_state 4 - -/* function ia_css_thread_sp_main: 136D */ - -/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_psys_event_queue_handle -#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp2host_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98 -#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12 - -/* function pixelgen_unit_test: E62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue -#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810 -#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20 - -/* function ia_css_tagger_sp_propagate_frame: 2D23 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_handles -#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_handles 0x7450 -#define HIVE_SIZE_vbuf_handles 960 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_handles 0x7450 -#define HIVE_SIZE_sp_vbuf_handles 960 - -/* function ia_css_queue_store: 5893 */ - -/* function ia_css_sp_flash_register: 3691 */ - -/* function ia_css_pipeline_sp_init: 1FD7 */ - -/* function ia_css_tagger_sp_configure: 2C13 */ - -/* function ia_css_ispctrl_sp_end_binary: 3FFF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20 - -/* function pixelgen_tpg_run: F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_is_pending_mask -#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_is_pending_mask 0x5C -#define HIVE_SIZE_event_is_pending_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_is_pending_mask 0x5C -#define HIVE_SIZE_sp_event_is_pending_mask 44 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_frame -#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_all_cb_elems_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824 -#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_isys_event_queue_handle -#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp2host_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8 -#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_com -#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_com 0x3E6C -#define HIVE_SIZE_host_sp_com 220 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_com 0x3E6C -#define HIVE_SIZE_sp_host_sp_com 220 - -/* function ia_css_queue_get_free_space: 54F2 */ - -/* function exec_image_pipe: 57A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_init_dmem_data -#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_init_dmem_data 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4 -#define HIVE_SIZE_sp_sp_init_dmem_data 24 - -/* function ia_css_sp_metadata_start: 5EB3 */ - -/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */ - -/* function ia_css_pipeline_sp_stop: 1FBA */ - -/* function ia_css_tagger_sp_connect_pipes: 30FD */ - -/* function sp_isys_copy_wait: 5D8 */ - -/* function is_isp_debug_buffer_full: 337 */ - -/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */ - -/* function encode_and_post_timer_event: A3C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_input_system_bz2788_active -#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_input_system_bz2788_active 4 -#else -#endif -#endif -#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem -#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524 -#define HIVE_SIZE_sp_input_system_bz2788_active 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS -#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC -#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_per_frame_data -#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_per_frame_data 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48 -#define HIVE_SIZE_sp_sp_per_frame_data 4 - -/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_psys_event_queue_handle -#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_host2sp_psys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4 -#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_xmem_bin_addr -#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_xmem_bin_addr 4 -#else -#endif -#endif -#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem -#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C -#define HIVE_SIZE_sp_xmem_bin_addr 4 - -/* function tmr_clock_init: 166F */ - -/* function ia_css_pipeline_sp_run: 1A61 */ - -/* function memcpy: 6AB4 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS -#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4 -#else -#endif -#endif -#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214 -#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GP_DEVICE_BASE -#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_GP_DEVICE_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C -#define HIVE_SIZE_sp_GP_DEVICE_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue -#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C -#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12 - -/* function stream2mmio_send_command: E04 */ - -/* function ia_css_uds_sp_scale_params: 67BD */ - -/* function ia_css_circbuf_increase_size: 1452 */ - -/* function __divu: 6A32 */ - -/* function ia_css_thread_sp_get_state: 1295 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_stop -#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sem_for_cont_capt_stop 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834 -#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC -#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12 - -/* function thread_fiber_sp_main: 144B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_pipe_thread -#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_isp_pipe_thread 360 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978 -#define HIVE_SIZE_sp_sp_isp_pipe_thread 360 - -/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */ - -/* function ia_css_spctrl_sp_set_state: 5ECF */ - -/* function ia_css_thread_sem_sp_signal: 6D18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_IRQ_BASE -#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_IRQ_BASE 0x2C -#define HIVE_SIZE_IRQ_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_IRQ_BASE 0x2C -#define HIVE_SIZE_sp_IRQ_BASE 16 - -/* function ia_css_virtual_isys_sp_isr_init: 5F70 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_TIMED_CTRL_BASE -#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_TIMED_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40 -#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4 - -/* function ia_css_isys_sp_generate_exp_id: 6302 */ - -/* function ia_css_rmgr_sp_init: 636D */ - -/* function ia_css_thread_sem_sp_init: 6DE7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_frame -#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sem_for_reading_cb_frame 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848 -#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_is_isp_requested -#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_is_isp_requested 0x3A8 -#define HIVE_SIZE_is_isp_requested 4 -#else -#endif -#endif -#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem -#define HIVE_ADDR_sp_is_isp_requested 0x3A8 -#define HIVE_SIZE_sp_is_isp_requested 4 - -/* function ia_css_dmaproxy_sp_execute: 3C9B */ - -/* function csi_rx_backend_rst: CE0 */ - -/* function ia_css_queue_is_empty: 7144 */ - -/* function ia_css_pipeline_sp_has_stopped: 1FB0 */ - -/* function ia_css_circbuf_extract: 1556 */ - -/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_sp_thread -#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_current_sp_thread 0x274 -#define HIVE_SIZE_current_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_sp_thread 0x274 -#define HIVE_SIZE_sp_current_sp_thread 4 - -/* function ia_css_spctrl_sp_get_spid: 5ED6 */ - -/* function ia_css_bufq_sp_reset_buffers: 3769 */ - -/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */ - -/* function ia_css_rmgr_sp_uninit: 6366 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack -#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_threads_stack 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack 0x164 -#define HIVE_SIZE_sp_sp_threads_stack 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS -#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218 -#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12 - -/* function ia_css_circbuf_peek: 1538 */ - -/* function ia_css_parambuf_sp_wait_for_in_param: 167E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cb_elems_param -#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_all_cb_elems_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870 -#define HIVE_SIZE_sp_sp_all_cb_elems_param 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_pipeline_sp_curr_binary_id -#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_pipeline_sp_curr_binary_id 4 -#else -#endif -#endif -#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288 -#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame_desc -#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_all_cbs_frame_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880 -#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8 - -/* function sp_isys_copy_func_v2: 5BD */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_cb_param -#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sem_for_reading_cb_param 40 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888 -#define HIVE_SIZE_sp_sem_for_reading_cb_param 40 - -/* function ia_css_queue_get_used_space: 54A6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_cont_capt_start -#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sem_for_cont_capt_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0 -#define HIVE_SIZE_sp_sem_for_cont_capt_start 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tmp_heap -#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_tmp_heap 0x7158 -#define HIVE_SIZE_tmp_heap 640 -#else -#endif -#endif -#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tmp_heap 0x7158 -#define HIVE_SIZE_sp_tmp_heap 640 - -/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */ - -/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */ - -/* function ia_css_tagger_sp_lock_exp_id: 29E0 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60 - -/* function ia_css_queue_is_full: 553D */ - -/* function debug_buffer_init_isp: E4 */ - -/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem -#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810 -#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60 - -/* function ia_css_rmgr_sp_refcount_dump: 644D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_pipe_threads -#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_pipe_threads 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_pipe_threads 0x150 -#define HIVE_SIZE_sp_sp_pipe_threads 20 - -/* function sp_event_proxy_func: 721 */ - -/* function ibuf_ctrl_run: D79 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_isys_event_queue_handle -#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_host2sp_isys_event_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20 -#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12 - -/* function ia_css_thread_sp_yield: 6C96 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param_desc -#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_all_cbs_param_desc 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4 -#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb -#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38 -#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4 - -/* function ia_css_thread_sp_fork: 1322 */ - -/* function ia_css_tagger_sp_destroy: 3107 */ - -/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES -#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8 -#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12 - -/* function initialize_sp_group: 58A */ - -/* function ia_css_tagger_buf_sp_peek: 337E */ - -/* function ia_css_thread_sp_init: 134E */ - -/* function qos_scheduler_update_fps: 67AD */ - -/* function ia_css_isys_sp_reset_exp_id: 62F9 */ - -/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_DMEM_BASE -#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_ISP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10 -#define HIVE_SIZE_sp_ISP_DMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_DMEM_BASE -#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_SP_DMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4 -#define HIVE_SIZE_sp_SP_DMEM_BASE 4 - -/* function ibuf_ctrl_transfer: D61 */ - -/* function __ia_css_queue_is_empty_text: 5403 */ - -/* function ia_css_dmaproxy_sp_read: 3CB1 */ - -/* function virtual_isys_stream_is_capture_done: 5F94 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_raw_copy_line_count -#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_raw_copy_line_count 0x378 -#define HIVE_SIZE_raw_copy_line_count 4 -#else -#endif -#endif -#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem -#define HIVE_ADDR_sp_raw_copy_line_count 0x378 -#define HIVE_SIZE_sp_raw_copy_line_count 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle -#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C -#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12 - -/* function ia_css_queue_peek: 541C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt -#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8 -#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_can_send_token_mask -#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_can_send_token_mask 0x88 -#define HIVE_SIZE_event_can_send_token_mask 44 -#else -#endif -#endif -#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_can_send_token_mask 0x88 -#define HIVE_SIZE_sp_event_can_send_token_mask 44 - -/* function csi_rx_frontend_stop: C0B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_thread -#define HIVE_MEM_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_isp_thread 0x7088 -#define HIVE_SIZE_isp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_thread 0x7088 -#define HIVE_SIZE_sp_isp_thread 4 - -/* function encode_and_post_sp_event_non_blocking: A84 */ - -/* function is_ddr_debug_buffer_full: 2CC */ - -/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_fiber -#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_threads_fiber 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_fiber 0x194 -#define HIVE_SIZE_sp_sp_threads_fiber 24 - -/* function encode_and_post_sp_event: A0D */ - -/* function debug_enqueue_ddr: EE */ - -/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */ - -/* function dmaproxy_sp_read_write: 70C3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer -#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C -#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host2sp_buffer_queue_handle -#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_host2sp_buffer_queue_handle 480 -#else -#endif -#endif -#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38 -#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_service -#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_ia_css_flash_sp_in_service 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4 - -/* function ia_css_dmaproxy_sp_process: 6E0F */ - -/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */ - -/* function ia_css_ispctrl_sp_init_cs: 40FA */ - -/* function ia_css_spctrl_sp_init: 5EE4 */ - -/* function sp_event_proxy_init: 736 */ - -/* function input_system_input_port_close: 1095 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_output -#define HIVE_MEM_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_output 0x3F50 -#define HIVE_SIZE_sp_output 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_output 0x3F50 -#define HIVE_SIZE_sp_sp_output 16 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800 - -/* function pixelgen_prbs_config: E8D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_CTRL_BASE -#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_ISP_CTRL_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8 -#define HIVE_SIZE_sp_ISP_CTRL_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_INPUT_FORMATTER_BASE -#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_INPUT_FORMATTER_BASE 16 -#else -#endif -#endif -#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C -#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16 - -/* function sp_dma_proxy_reset_channels: 3F20 */ - -/* function ia_css_tagger_sp_update_size: 334D */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue -#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260 -#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008 - -/* function thread_fiber_sp_create: 13BA */ - -/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_frame -#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sem_for_writing_cb_frame 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC -#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_writing_cb_param -#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sem_for_writing_cb_param 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0 -#define HIVE_SIZE_sp_sem_for_writing_cb_param 20 - -/* function pixelgen_tpg_is_done: F07 */ - -/* function ia_css_isys_stream_capture_indication: 60D7 */ - -/* function sp_start_isp_entry: 392 */ -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifdef HIVE_ADDR_sp_start_isp_entry -#endif -#define HIVE_ADDR_sp_start_isp_entry 0x392 -#endif -#define HIVE_ADDR_sp_sp_start_isp_entry 0x392 - -/* function ia_css_tagger_buf_sp_unmark_all: 35DA */ - -/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */ - -/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */ - -/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */ - -/* function ibuf_ctrl_config: D85 */ - -/* function ia_css_isys_stream_stop: 61F4 */ - -/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */ - -/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */ - -/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_group -#define HIVE_MEM_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_group 0x3F60 -#define HIVE_SIZE_sp_group 6296 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_group 0x3F60 -#define HIVE_SIZE_sp_sp_group 6296 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_event_proxy_thread -#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_event_proxy_thread 72 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0 -#define HIVE_SIZE_sp_sp_event_proxy_thread 72 - -/* function ia_css_thread_sp_kill: 12E8 */ - -/* function ia_css_tagger_sp_create: 32FB */ - -/* function tmpmem_acquire_dmem: 66FF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_MMU_BASE -#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_MMU_BASE 0x24 -#define HIVE_SIZE_MMU_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_MMU_BASE 0x24 -#define HIVE_SIZE_sp_MMU_BASE 8 - -/* function ia_css_dmaproxy_sp_channel_release: 3F38 */ - -/* function pixelgen_prbs_run: E7B */ - -/* function ia_css_dmaproxy_sp_is_idle: 3F18 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_qos_start -#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sem_for_qos_start 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4 -#define HIVE_SIZE_sp_sem_for_qos_start 20 - -/* function isp_hmem_load: B5D */ - -/* function ia_css_tagger_sp_release_buf_elem: 28CA */ - -/* function ia_css_eventq_sp_send: 3F8E */ - -/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_debug_buffer_ddr_address -#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_debug_buffer_ddr_address 4 -#else -#endif -#endif -#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem -#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC -#define HIVE_SIZE_sp_debug_buffer_ddr_address 4 - -/* function sp_isys_copy_request: 681 */ - -/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */ - -/* function ia_css_thread_sp_set_priority: 12E0 */ - -/* function sizeof_hmem: C04 */ - -/* function input_system_channel_open: 11BC */ - -/* function pixelgen_tpg_stop: EF5 */ - -/* function tmpmem_release_dmem: 66EE */ - -/* function __ia_css_dmaproxy_sp_process_text: 3BAB */ - -/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */ - -/* function sp_event_assert: 8BD */ - -/* function ia_css_flash_sp_init_internal_params: 36D7 */ - -/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */ - -/* function __modu: 6A78 */ - -/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */ - -/* function input_system_channel_transfer: 11A5 */ - -/* function isp_vamem_store: 0 */ - -/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GDC_BASE -#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GDC_BASE 0x44 -#define HIVE_SIZE_GDC_BASE 8 -#else -#endif -#endif -#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GDC_BASE 0x44 -#define HIVE_SIZE_sp_GDC_BASE 8 - -/* function ia_css_queue_local_init: 5707 */ - -/* function sp_event_proxy_callout_func: 6B45 */ - -/* function qos_scheduler_schedule_stage: 6759 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads -#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28 -#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_threads_stack_size -#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_threads_stack_size 24 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C -#define HIVE_SIZE_sp_sp_threads_stack_size 24 - -/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */ - -/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */ - -/* function ia_css_queue_dequeue: 5585 */ - -/* function is_qos_standalone_mode: 6734 */ - -/* function ia_css_dmaproxy_sp_configure_channel: 703C */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_current_thread_fiber_sp -#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_current_thread_fiber_sp 4 -#else -#endif -#endif -#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem -#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C -#define HIVE_SIZE_sp_current_thread_fiber_sp 4 - -/* function ia_css_circbuf_pop: 15EA */ - -/* function memset: 6AF7 */ - -/* function irq_raise_set_token: B6 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_GPIO_BASE -#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_GPIO_BASE 0x3C -#define HIVE_SIZE_GPIO_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_GPIO_BASE 0x3C -#define HIVE_SIZE_sp_GPIO_BASE 4 - -/* function pixelgen_prbs_stop: E69 */ - -/* function ia_css_pipeline_acc_stage_enable: 1F69 */ - -/* function ia_css_tagger_sp_unlock_exp_id: 293B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_ph -#define HIVE_MEM_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_isp_ph 0x740C -#define HIVE_SIZE_isp_ph 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_ph 0x740C -#define HIVE_SIZE_sp_isp_ph 28 - -/* function ia_css_ispctrl_sp_init_ds: 4286 */ - -/* function get_xmem_base_addr_raw: 4635 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_param -#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_all_cbs_param 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908 -#define HIVE_SIZE_sp_sp_all_cbs_param 16 - -/* function pixelgen_tpg_config: F2A */ - -/* function ia_css_circbuf_create: 1638 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_sp_group -#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sem_for_sp_group 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_sp_group 0x5918 -#define HIVE_SIZE_sp_sem_for_sp_group 20 - -/* function csi_rx_frontend_run: C1C */ - -/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */ - -/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */ - -/* function ia_css_isys_stream_open: 62A9 */ - -/* function ia_css_sp_rawcopy_tag_frame: 5E35 */ - -/* function input_system_channel_configure: 11D8 */ - -/* function isp_hmem_clear: B2D */ - -/* function ia_css_framebuf_sp_release_in_frame: 66C0 */ - -/* function stream2mmio_config: E15 */ - -/* function ia_css_ispctrl_sp_start_binary: 40D8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs -#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38 -#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20 - -/* function ia_css_eventq_sp_recv: 3F60 */ - -/* function csi_rx_frontend_config: C74 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_pool -#define HIVE_MEM_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_isp_pool 0x388 -#define HIVE_SIZE_isp_pool 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_pool 0x388 -#define HIVE_SIZE_sp_isp_pool 4 - -/* function ia_css_rmgr_sp_rel_gen: 63AF */ - -/* function ia_css_tagger_sp_unblock_clients: 31C3 */ - -/* function css_get_frame_processing_time_end: 28BA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_event_any_pending_mask -#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_event_any_pending_mask 8 -#else -#endif -#endif -#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem -#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0 -#define HIVE_SIZE_sp_event_any_pending_mask 8 - -/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */ - -/* function sh_css_decode_tag_descr: 352 */ - -/* function debug_enqueue_isp: 27B */ - -/* function qos_scheduler_update_stage_budget: 673C */ - -/* function ia_css_spctrl_sp_uninit: 5EDD */ - -/* function csi_rx_backend_run: C62 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140 - -/* function ia_css_tagger_buf_sp_lock_from_start: 353E */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_isp_idle -#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sem_for_isp_idle 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C -#define HIVE_SIZE_sp_sem_for_isp_idle 20 - -/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */ - -/* function ia_css_dmaproxy_sp_init: 3BE1 */ - -/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_VAMEM_BASE -#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_ISP_VAMEM_BASE 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14 -#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12 - -/* function input_system_channel_sync: 6C10 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger -#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8 -#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70 - -/* function ia_css_queue_item_load: 57F9 */ - -/* function ia_css_spctrl_sp_get_state: 5EC8 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_callout_sp_thread -#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_callout_sp_thread 0x278 -#define HIVE_SIZE_callout_sp_thread 4 -#else -#endif -#endif -#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem -#define HIVE_ADDR_sp_callout_sp_thread 0x278 -#define HIVE_SIZE_sp_callout_sp_thread 4 - -/* function thread_fiber_sp_init: 1441 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_SP_PMEM_BASE -#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_SP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0 -#define HIVE_SIZE_sp_SP_PMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_input_stream_format -#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_isp_input_stream_format 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50 -#define HIVE_SIZE_sp_sp_isp_input_stream_format 20 - -/* function __mod: 6A64 */ - -/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */ - -/* function ia_css_thread_sp_join: 1311 */ - -/* function ia_css_dmaproxy_sp_add_command: 712E */ - -/* function ia_css_sp_metadata_thread_func: 5EC1 */ - -/* function __sp_event_proxy_func_critical: 6B32 */ - -/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */ - -/* function ia_css_sp_metadata_wait: 5EBA */ - -/* function ia_css_circbuf_peek_from_start: 151A */ - -/* function ia_css_event_sp_encode: 3FEB */ - -/* function ia_css_thread_sp_run: 1384 */ - -/* function sp_isys_copy_func: 5AC */ - -/* function ia_css_sp_isp_param_init_isp_memories: 52AC */ - -/* function register_isr: 8B5 */ - -/* function irq_raise: C8 */ - -/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */ - -/* function csi_rx_backend_disable: C2E */ - -/* function pipeline_sp_initialize_stage: 20BF */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES -#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12 -#else -#endif -#endif -#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem -#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4 -#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12 - -/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */ - -/* function ia_css_ispctrl_sp_done_ds: 426D */ - -/* function csi_rx_backend_config: C85 */ - -/* function ia_css_sp_isp_param_get_mem_inits: 5287 */ - -/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_pfp_spref -#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_vbuf_pfp_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390 -#define HIVE_SIZE_sp_vbuf_pfp_spref 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_HMEM_BASE -#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_ISP_HMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20 -#define HIVE_SIZE_sp_ISP_HMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames -#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20 -#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280 - -/* function qos_scheduler_init_stage_budget: 679A */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp2host_buffer_queue_handle -#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp2host_buffer_queue_handle 96 -#else -#endif -#endif -#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38 -#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96 - -/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */ - -/* function ia_css_isys_stream_start: 6187 */ - -/* function sp_warning: 8E8 */ - -/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */ - -/* function ia_css_tagger_sp_tag_exp_id: 2A55 */ - -/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */ - -/* function ia_css_dmaproxy_sp_write: 3C81 */ - -/* function ia_css_isys_stream_start_async: 6250 */ - -/* function ia_css_parambuf_sp_release_in_param: 187B */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_irq_sw_interrupt_token -#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_irq_sw_interrupt_token 4 -#else -#endif -#endif -#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem -#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C -#define HIVE_SIZE_sp_irq_sw_interrupt_token 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_isp_addresses -#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_isp_addresses 172 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_isp_addresses 0x708C -#define HIVE_SIZE_sp_sp_isp_addresses 172 - -/* function ia_css_rmgr_sp_acq_gen: 63C7 */ - -/* function input_system_input_port_open: 10E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isps -#define HIVE_MEM_isps scalar_processor_2400_dmem -#define HIVE_ADDR_isps 0x7428 -#define HIVE_SIZE_isps 28 -#else -#endif -#endif -#define HIVE_MEM_sp_isps scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isps 0x7428 -#define HIVE_SIZE_sp_isps 28 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_host_sp_queues_initialized -#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_host_sp_queues_initialized 4 -#else -#endif -#endif -#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem -#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64 -#define HIVE_SIZE_sp_host_sp_queues_initialized 4 - -/* function ia_css_queue_uninit: 56C5 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started -#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40 -#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4 - -/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */ - -/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */ - -/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */ - -/* function csi_rx_backend_stop: C51 */ - -/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_vbuf_spref -#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_vbuf_spref 0x38C -#define HIVE_SIZE_vbuf_spref 4 -#else -#endif -#endif -#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem -#define HIVE_ADDR_sp_vbuf_spref 0x38C -#define HIVE_SIZE_sp_vbuf_spref 4 - -/* function ia_css_queue_enqueue: 560F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_request -#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_ia_css_flash_sp_request 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC -#define HIVE_SIZE_sp_ia_css_flash_sp_request 4 - -/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_tagger_frames -#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_tagger_frames 0x5B30 -#define HIVE_SIZE_tagger_frames 168 -#else -#endif -#endif -#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem -#define HIVE_ADDR_sp_tagger_frames 0x5B30 -#define HIVE_SIZE_sp_tagger_frames 168 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_reading_if -#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sem_for_reading_if 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_reading_if 0x5940 -#define HIVE_SIZE_sp_sem_for_reading_if 20 - -/* function sp_generate_interrupts: 967 */ - -/* function ia_css_pipeline_sp_start: 1FC2 */ - -/* function ia_css_thread_default_callout: 6C8F */ - -/* function csi_rx_backend_enable: C3F */ - -/* function ia_css_sp_rawcopy_init: 5B32 */ - -/* function input_system_input_port_configure: 1139 */ - -/* function tmr_clock_read: 1665 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_BAMEM_BASE -#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_ISP_BAMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398 -#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4 - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues -#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98 -#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160 - -/* function isys2401_dma_config_legacy: DDA */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ibuf_ctrl_master_ports -#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_ibuf_ctrl_master_ports 12 -#else -#endif -#endif -#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208 -#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12 - -/* function css_get_frame_processing_time_start: 28C2 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_all_cbs_frame -#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_all_cbs_frame 16 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954 -#define HIVE_SIZE_sp_sp_all_cbs_frame 16 - -/* function ia_css_virtual_isys_sp_isr: 716E */ - -/* function thread_sp_queue_print: 13A1 */ - -/* function sp_notify_eof: 913 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sem_for_str2mem -#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sem_for_str2mem 20 -#else -#endif -#endif -#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sem_for_str2mem 0x5964 -#define HIVE_SIZE_sp_sem_for_str2mem 20 - -/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */ - -/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */ - -/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */ - -/* function ia_css_circbuf_destroy: 162F */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ISP_PMEM_BASE -#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_ISP_PMEM_BASE 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC -#define HIVE_SIZE_sp_ISP_PMEM_BASE 4 - -/* function ia_css_sp_isp_param_mem_load: 521A */ - -/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */ - -/* function __div: 6A1C */ - -/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_ia_css_flash_sp_in_use -#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_ia_css_flash_sp_in_use 4 -#else -#endif -#endif -#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem -#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0 -#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4 - -/* function ia_css_thread_sem_sp_wait: 6D63 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_sleep_mode -#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sleep_mode 4 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68 -#define HIVE_SIZE_sp_sp_sleep_mode 4 - -/* function ia_css_tagger_buf_sp_push: 34A1 */ - -/* function mmu_invalidate_cache: D3 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_sp_max_cb_elems -#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_max_cb_elems 8 -#else -#endif -#endif -#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem -#define HIVE_ADDR_sp_sp_max_cb_elems 0x148 -#define HIVE_SIZE_sp_sp_max_cb_elems 8 - -/* function ia_css_queue_remote_init: 56E7 */ - -#ifndef HIVE_MULTIPLE_PROGRAMS -#ifndef HIVE_MEM_isp_stop_req -#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_isp_stop_req 0x57F8 -#define HIVE_SIZE_isp_stop_req 4 -#else -#endif -#endif -#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem -#define HIVE_ADDR_sp_isp_stop_req 0x57F8 -#define HIVE_SIZE_sp_isp_stop_req 4 - -/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */ - - -#endif /* _sp_map_h_ */ diff --git a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c index 3d7b0242cf534..6fadc20104bfb 100644 --- a/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c +++ b/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c @@ -3538,7 +3538,3 @@ void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps) ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d PC: 0x%X\n", id, pc); } } - -#if defined(HRT_SCHED) || defined(SH_CSS_DEBUG_SPMEM_DUMP_SUPPORT) -#include "spmem_dump.c" -#endif -- GitLab From 5f1e9dd555ee733a6ecb613f914840fb93dc25d6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 13 May 2020 11:29:21 +0200 Subject: [PATCH 475/503] media: atomisp: get rid of __bo_alloc() macro Simplify the hmm_bo a little bit by removing this macro. This will avoid printing twice errors when allocations happen. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/hmm/hmm_bo.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c b/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c index 986396904fe03..492b76c29490b 100644 --- a/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c +++ b/drivers/staging/media/atomisp/pci/hmm/hmm_bo.c @@ -54,17 +54,6 @@ static unsigned int nr_to_order_bottom(unsigned int nr) return fls(nr) - 1; } -static struct hmm_buffer_object *__bo_alloc(struct kmem_cache *bo_cache) -{ - struct hmm_buffer_object *bo; - - bo = kmem_cache_alloc(bo_cache, GFP_KERNEL); - if (!bo) - dev_err(atomisp_dev, "%s: failed!\n", __func__); - - return bo; -} - static int __bo_init(struct hmm_bo_device *bdev, struct hmm_buffer_object *bo, unsigned int pgnr) { @@ -262,7 +251,7 @@ static struct hmm_buffer_object *__bo_break_up(struct hmm_bo_device *bdev, unsigned long flags; int ret; - new_bo = __bo_alloc(bdev->bo_cache); + new_bo = kmem_cache_alloc(bdev->bo_cache, GFP_KERNEL); if (!new_bo) { dev_err(atomisp_dev, "%s: __bo_alloc failed!\n", __func__); return NULL; @@ -387,7 +376,7 @@ int hmm_bo_device_init(struct hmm_bo_device *bdev, return -ENOMEM; } - bo = __bo_alloc(bdev->bo_cache); + bo = kmem_cache_alloc(bdev->bo_cache, GFP_KERNEL); if (!bo) { dev_err(atomisp_dev, "%s: __bo_alloc failed!\n", __func__); isp_mmu_exit(&bdev->mmu); -- GitLab From 7f98b894595eeeaba41e28c0b0ee235ce1ecfdf9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 13 May 2020 11:31:20 +0200 Subject: [PATCH 476/503] media: atomisp: fix a slab error due to a wrong free The mmu mapping logic uses a different logic depending on the RAM size: if it is lower than 2GB, it uses kmem_cache_zalloc(), but if memory is bigger than that, it uses its own way to allocate memory. Yet, when freeing, it uses kmem_cache_free() for any cases. On recent Kernels, slab tracks the memory allocated on it, with causes those warnings: virt_to_cache: Object is not a Slab page! WARNING: CPU: 0 PID: 758 at mm/slab.h:475 cache_from_obj+0xab/0xf0 Modules linked in: snd_soc_sst_cht_bsw_rt5645(E) mei_hdcp(E) gpio_keys(E) intel_rapl_msr(E) intel_powerclamp(E) coretemp(E) kvm_intel(E) kvm(E) irqbypass(E) crct10dif_pclmul(E) crc32_pclmul(E) ghash_clmulni_intel(E) atomisp_ov2680(CE) intel_cstate(E) asus_nb_wmi(E) wdat_wdt(E) pcspkr(E) ath10k_pci(E) ath10k_core(E) intel_chtdc_ti_pwrbtn(E) ath(E) mac80211(E) btusb(E) joydev(E) btrtl(E) btbcm(E) btintel(E) bluetooth(E) libarc4(E) ecdh_generic(E) cfg80211(E) ecc(E) hid_sensor_gyro_3d(E) hid_sensor_accel_3d(E) hid_sensor_trigger(E) hid_sensor_iio_common(E) industrialio_triggered_buffer(E) kfifo_buf(E) industrialio(E) atomisp(CE) videobuf_vmalloc(E) videobuf_core(E) videodev(E) mc(E) snd_soc_rt5645(E) snd_soc_rl6231(E) snd_intel_sst_acpi(E) snd_intel_sst_core(E) snd_soc_sst_atom_hifi2_platform(E) snd_soc_acpi_intel_match(E) intel_hid(E) spi_pxa2xx_platform(E) snd_soc_acpi(E) snd_soc_core(E) snd_compress(E) dw_dmac(E) intel_xhci_usb_role_switch(E) int3406_thermal(E) snd_hdmi_lpe_audio(E) int3403_thermal(E) int3400_thermal(E) acpi_thermal_rel(E) snd_seq(E) intel_int0002_vgpio(E) soc_button_array(E) snd_seq_device(E) acpi_pad(E) snd_pcm(E) snd_timer(E) snd(E) soundcore(E) lpc_ich(E) mei_txe(E) mei(E) processor_thermal_device(E) intel_soc_dts_iosf(E) intel_rapl_common(E) int340x_thermal_zone(E) ip_tables(E) hid_sensor_hub(E) intel_ishtp_loader(E) intel_ishtp_hid(E) mmc_block(E) hid_multitouch(E) crc32c_intel(E) i915(E) i2c_algo_bit(E) drm_kms_helper(E) hid_asus(E) asus_wmi(E) sparse_keymap(E) rfkill(E) drm(E) intel_ish_ipc(E) intel_ishtp(E) wmi(E) video(E) i2c_hid(E) sdhci_acpi(E) sdhci(E) mmc_core(E) pwm_lpss_platform(E) pwm_lpss(E) fuse(E) CPU: 0 PID: 758 Comm: v4l_id Tainted: G C E 5.7.0-rc2+ #40 Hardware name: ASUSTeK COMPUTER INC. T101HA/T101HA, BIOS T101HA.306 04/23/2019 RIP: 0010:cache_from_obj+0xab/0xf0 Code: c3 31 c0 80 3d 1c 38 72 01 00 75 f0 48 c7 c6 20 12 06 b5 48 c7 c7 10 f3 37 b5 48 89 04 24 c6 05 01 38 72 01 01 e8 2c 99 e0 ff <0f> 0b 48 8b 04 24 eb ca 48 8b 57 58 48 8b 48 58 48 c7 c6 30 12 06 RSP: 0018:ffffb0a4c07cfb10 EFLAGS: 00010282 RAX: 0000000000000029 RBX: 0000000000000048 RCX: 0000000000000000 RDX: ffffa004fbca5b80 RSI: ffffa004fbc19cc8 RDI: ffffa004fbc19cc8 RBP: 0000000000c49000 R08: 00000000000004f7 R09: 0000000000000001 R10: 0000000000aaaaaa R11: ffffffffb50e0600 R12: ffffffffc0be0a00 R13: ffffa003f2448000 R14: 0000000000c49000 R15: ffffa003f2448000 FS: 00007f9060c9cb80(0000) GS:ffffa004fbc00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000559fc55b8000 CR3: 0000000165b02000 CR4: 00000000001006f0 Call Trace: kmem_cache_free+0x19/0x180 mmu_l2_unmap+0xd1/0x100 [atomisp] mmu_unmap+0xd0/0xf0 [atomisp] hmm_bo_unbind+0x62/0xb0 [atomisp] hmm_free+0x44/0x60 [atomisp] ia_css_spctrl_unload_fw+0x30/0x50 [atomisp] ia_css_uninit+0x3a/0x90 [atomisp] atomisp_open+0x50b/0x5c0 [atomisp] v4l2_open+0x85/0xf0 [videodev] chrdev_open+0xdd/0x210 ? cdev_device_add+0xc0/0xc0 do_dentry_open+0x13a/0x380 path_openat+0xa9a/0xfe0 do_filp_open+0x75/0x100 ? __check_object_size+0x12e/0x13c ? __alloc_fd+0x44/0x150 do_sys_openat2+0x8a/0x130 __x64_sys_openat+0x46/0x70 do_syscall_64+0x5b/0xf0 entry_SYSCALL_64_after_hwframe+0x44/0xa9 Solve it by calling free_page() directly Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/mmu/isp_mmu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c index 90365375534d1..06d907f6d143a 100644 --- a/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c +++ b/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c @@ -142,7 +142,10 @@ static void free_page_table(struct isp_mmu *mmu, phys_addr_t page) set_memory_wb((unsigned long)virt, 1); #endif - kmem_cache_free(mmu->tbl_cache, virt); + if (totalram_pages() > (unsigned long)NR_PAGES_2GB) + free_page((unsigned long)virt); + else + kmem_cache_free(mmu->tbl_cache, virt); } static void mmu_remap_error(struct isp_mmu *mmu, -- GitLab From 39c91e18c1408e3a0ccb43d17dc983b8f2932f4c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 18 May 2020 18:09:53 +0200 Subject: [PATCH 477/503] media: atomisp: fix the value for CamClk on Asus T101HA The value returned by BIOS is 1. Fix it at the driver, as it won't read this from EFI. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c index 12c15e070b14c..9e9dc9a564c5c 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c @@ -332,7 +332,7 @@ static struct gmin_cfg_var asus_vars[] = { {"OVTI2680:00_CsiLanes", "1"}, {"OVTI2680:00_CsiFmt", "15"}, {"OVTI2680:00_CsiBayer", "0"}, - {"OVTI2680:00_CamClk", "0"}, + {"OVTI2680:00_CamClk", "1"}, {}, }; -- GitLab From 95d1f398c4dc3f55e9007c89452ccc16301205fc Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 19 May 2020 09:15:41 +0200 Subject: [PATCH 478/503] media: atomisp: keep the ISP powered on when setting it The current code causes ISP2401 to power down and never return back to live, causing the driver to crash. Fix it by commenting out the bad code. It should be noticed that the Yocto Aero code has something similar to it. Maybe the issue is related to an ISP bug (or maybe PM is controlled on a different way for this hardware). Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_v4l2.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 8c7b42221659d..4395ca0e3e11a 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -824,13 +824,17 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) /* Workaround for pmu_nc_set_power_state not ready in MRFLD */ int atomisp_mrfld_power_down(struct atomisp_device *isp) { - return atomisp_mrfld_power(isp, false); + return 0; +// FIXME: at least with ISP2401, the code below causes the driver to break +// return atomisp_mrfld_power(isp, false); } /* Workaround for pmu_nc_set_power_state not ready in MRFLD */ int atomisp_mrfld_power_up(struct atomisp_device *isp) { - return atomisp_mrfld_power(isp, true); + return 0; +// FIXME: at least with ISP2401, the code below causes the driver to break +// return atomisp_mrfld_power(isp, true); } int atomisp_runtime_suspend(struct device *dev) -- GitLab From 1d6e5c3040c1a2b561dddc235233ef6b176a97b8 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 19 May 2020 10:35:38 +0200 Subject: [PATCH 479/503] media: atomisp: change the code to properly wait for sensor The sensor should finish its init before atomisp driver, as otherwise the atomisp driver won't be able to talk with it. So, we need to turn atomisp_gmin_platform into a module again, for it to not depend on atomisp driver to finish probing, and add some delay at atomisp to let the sensor driver to finish probing. Yeah, this is hacky. The real solution here would be to use the async framework, but for now, our goal is to make the driver to work. So, let's postpone such change to be done later. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/Makefile | 2 +- .../media/atomisp/pci/atomisp_gmin_platform.c | 3 +++ .../staging/media/atomisp/pci/atomisp_v4l2.c | 26 ++++++++++++------- 3 files changed, 20 insertions(+), 11 deletions(-) diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile index 30b3168c4358c..eedecd49bbf45 100644 --- a/drivers/staging/media/atomisp/Makefile +++ b/drivers/staging/media/atomisp/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_INTEL_ATOMISP) += i2c/ obj-$(CONFIG_VIDEO_ATOMISP) += atomisp.o +obj-$(CONFIG_VIDEO_ATOMISP) += pci/atomisp_gmin_platform.o # While on staging, keep debug enabled DEFINES += -DDEBUG @@ -23,7 +24,6 @@ atomisp-objs += \ pci/atomisp_subdev.o \ pci/atomisp_tpg.o \ pci/atomisp_v4l2.o \ - pci/atomisp_gmin_platform.o \ pci/sh_css_firmware.o \ pci/sh_css_host_data.o \ pci/sh_css_hrt.o \ diff --git a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c index 9e9dc9a564c5c..b096b7d304634 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c +++ b/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c @@ -1076,3 +1076,6 @@ static void isp_pm_cap_fixup(struct pci_dev *dev) dev->pm_cap = 0; } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0f38, isp_pm_cap_fixup); + +MODULE_DESCRIPTION("Ancillary routines for binding ACPI devices"); +MODULE_LICENSE("GPL"); diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 4395ca0e3e11a..592c41bb51660 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1083,6 +1083,22 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) return 0; } + /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */ + for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) { + int camera_count = 0; + for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) { + if (subdevs->type == RAW_CAMERA || + subdevs->type == SOC_CAMERA) + camera_count ++; + } + if (camera_count) + break; + msleep(SUBDEV_WAIT_TIMEOUT); + count++; + } + /* Wait more time to give more time for subdev init code to finish */ + msleep(5 * SUBDEV_WAIT_TIMEOUT); + /* FIXME: should, instead, use I2C probe */ for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) { @@ -1192,16 +1208,6 @@ static int atomisp_subdev_probe(struct atomisp_device *isp) } } - /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */ - for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) { - if (isp->input_cnt) - break; - msleep(SUBDEV_WAIT_TIMEOUT); - count++; - } - /* Wait more time to give more time for subdev init code */ - msleep(5 * SUBDEV_WAIT_TIMEOUT); - /* * HACK: Currently VCM belongs to primary sensor only, but correct * approach must be to acquire from platform code which sensor -- GitLab From 5589ea0745ef4fd00c2df83bad82b2aa75f50535 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 19 May 2020 11:13:05 +0200 Subject: [PATCH 480/503] media: atomisp: ov2680: improve debug messages Change some code at ov2680 for it to better report what's happening there at sensor's level. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-ov2680.c | 68 +++++++++++-------- 1 file changed, 41 insertions(+), 27 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 4601cefde89bf..6cf507ee8c1b0 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -112,8 +112,12 @@ static int ov2680_i2c_write(struct i2c_client *client, u16 len, u8 *data) msg.len = len; msg.buf = data; ret = i2c_transfer(client->adapter, &msg, 1); - //dev_dbg(&client->dev, "+++i2c write reg=%x->%x\n", data[0]*256 +data[1],data[2]); - return ret == num_msg ? 0 : -EIO; + + if (ret < 0) + dev_dbg(&client->dev, + "%s: i2c write reg=0x%02x, value 0x%02x, error %d\n", + __func__, data[0]*256 +data[1], data[2], ret); + return ret == num_msg ? 0 : ret; } static int ov2680_write_reg(struct i2c_client *client, u16 data_length, @@ -145,7 +149,7 @@ static int ov2680_write_reg(struct i2c_client *client, u16 data_length, ret = ov2680_i2c_write(client, len, data); if (ret) dev_err(&client->dev, - "write error: wrote 0x%x to offset 0x%x error %d", + "write error: wrote 0x%x to offset 0x%02x error %d", val, reg, ret); return ret; @@ -172,8 +176,13 @@ static int __ov2680_flush_reg_array(struct i2c_client *client, u16 size; __be16 *data16 = (void *)&ctrl->buffer.addr; - if (ctrl->index == 0) + if (ctrl->index == 0) { + dev_dbg(&client->dev, "%s: *not* flushing reg_array\n", + __func__); return 0; + } + + dev_dbg(&client->dev, "%s: flushing reg_array\n", __func__); size = sizeof(u16) + ctrl->index; /* 16-bit address + data */ *data16 = cpu_to_be16(ctrl->buffer.addr); @@ -236,7 +245,6 @@ static int ov2680_write_reg_array(struct i2c_client *client, struct ov2680_write_ctrl ctrl; int err; - dev_dbg(&client->dev, "++++write reg array\n"); ctrl.index = 0; for (; next->type != OV2680_TOK_TERM; next++) { switch (next->type & OV2680_TOK_MASK) { @@ -251,8 +259,8 @@ static int ov2680_write_reg_array(struct i2c_client *client, * If next address is not consecutive, data needs to be * flushed before proceed. */ - dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg, - next->val); + dev_dbg(&client->dev, "%s: reg=0x%02x set to 0x%02x\n", + __func__, next->reg, next->val); if (!__ov2680_write_reg_is_consecutive(client, &ctrl, next)) { err = __ov2680_flush_reg_array(client, &ctrl); @@ -261,8 +269,8 @@ static int ov2680_write_reg_array(struct i2c_client *client, } err = __ov2680_buf_reg_array(client, &ctrl, next); if (err) { - dev_err(&client->dev, "%s: write error, aborted\n", - __func__); + dev_err(&client->dev, + "%s: write error, aborted\n", __func__); return err; } break; @@ -413,7 +421,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_GROUP_ACCESS, 0x00); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_GROUP_ACCESS); return ret; } @@ -424,7 +432,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_TIMING_VTS_H, vts); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_TIMING_VTS_H); return ret; } @@ -436,7 +444,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_EXPOSURE_L, exp_val & 0xFF); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_EXPOSURE_L); return ret; } @@ -444,7 +452,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_EXPOSURE_M, (exp_val >> 8) & 0xFF); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_EXPOSURE_M); return ret; } @@ -452,7 +460,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_EXPOSURE_H, (exp_val >> 16) & 0x0F); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_EXPOSURE_H); return ret; } @@ -460,7 +468,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* Analog gain */ ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_AGC_H, gain); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_AGC_H); return ret; } @@ -469,7 +477,8 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_MWB_RED_GAIN_H, digitgain); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, + "%s: write 0x%02x: error, aborted\n", __func__, OV2680_MWB_RED_GAIN_H); return ret; } @@ -477,7 +486,8 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_MWB_GREEN_GAIN_H, digitgain); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, + "%s: write 0x%02x: error, aborted\n", __func__, OV2680_MWB_RED_GAIN_H); return ret; } @@ -485,7 +495,8 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_MWB_BLUE_GAIN_H, digitgain); if (ret) { - dev_err(&client->dev, "%s: write %x error, aborted\n", + dev_err(&client->dev, + "%s: write 0x%02x: error, aborted\n", __func__, OV2680_MWB_RED_GAIN_H); return ret; } @@ -1068,7 +1079,11 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, int ret = 0; int idx = 0; - dev_dbg(&client->dev, "+++++ov2680_s_mbus_fmt+++++l\n"); + dev_dbg(&client->dev, "%s: %s: pad: %d, fmt: %p\n", + __func__, + (format->which == V4L2_SUBDEV_FORMAT_TRY) ? "try" : "set", + format->pad, fmt); + if (format->pad) return -EINVAL; @@ -1096,26 +1111,25 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, return 0; } dev->fmt_idx = get_resolution_index(fmt->width, fmt->height); - dev_dbg(&client->dev, "+++++get_resolution_index=%d+++++l\n", - dev->fmt_idx); + dev_dbg(&client->dev, "%s: Resolution index: %d\n", + __func__, dev->fmt_idx); if (dev->fmt_idx == -1) { dev_err(&client->dev, "get resolution fail\n"); mutex_unlock(&dev->input_lock); return -EINVAL; } - v4l2_info(client, "__s_mbus_fmt i=%d, w=%d, h=%d\n", dev->fmt_idx, - fmt->width, fmt->height); - dev_dbg(&client->dev, "__s_mbus_fmt i=%d, w=%d, h=%d\n", - dev->fmt_idx, fmt->width, fmt->height); + dev_dbg(&client->dev, "%s: i=%d, w=%d, h=%d\n", + __func__, dev->fmt_idx, fmt->width, fmt->height); ret = ov2680_write_reg_array(client, ov2680_res[dev->fmt_idx].regs); if (ret) - dev_err(&client->dev, "ov2680 write resolution register err\n"); + dev_err(&client->dev, + "ov2680 write resolution register err: %d\n", ret); ret = ov2680_get_intg_factor(client, ov2680_info, &ov2680_res[dev->fmt_idx]); if (ret) { - dev_err(&client->dev, "failed to get integration_factor\n"); + dev_err(&client->dev, "failed to get integration factor\n"); goto err; } -- GitLab From 4f78f0840ffe4cfb03ea7bc5152b86a1efbdcfb0 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 19 May 2020 12:30:27 +0200 Subject: [PATCH 481/503] media: atomisp: use read/write routines from mainstream There is an ov2680 driver mainstream. Use the read/write routines from it, as the ones inside this driver are generating some errors: ov2680 i2c-OVTI2680:00: ov2680_i2c_write: i2c write reg=0x3086, value 0x00, error -121 Maybe the code that changes from/to BE are not right. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-ov2680.c | 160 +++++++----------- 1 file changed, 61 insertions(+), 99 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 6cf507ee8c1b0..b63574bf37951 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -14,6 +14,8 @@ * */ +#include + #include #include #include @@ -45,59 +47,34 @@ static enum atomisp_bayer_order ov2680_bayer_order_mapping[] = { /* i2c read/write stuff */ static int ov2680_read_reg(struct i2c_client *client, - u16 data_length, u16 reg, u16 *val) + int len, u16 reg, u16 *val) { - int err; - struct i2c_msg msg[2]; - unsigned char data[6]; - - if (!client->adapter) { - dev_err(&client->dev, "%s error, no client->adapter\n", - __func__); - return -ENODEV; - } + struct i2c_msg msgs[2]; + u8 addr_buf[2] = { reg >> 8, reg & 0xff }; + u8 data_buf[4] = { 0, }; + int ret; - if (data_length != OV2680_8BIT && data_length != OV2680_16BIT - && data_length != OV2680_32BIT) { - dev_err(&client->dev, "%s error, invalid data length\n", - __func__); + if (len > 4) return -EINVAL; - } - - memset(msg, 0, sizeof(msg)); - - msg[0].addr = client->addr; - msg[0].flags = 0; - msg[0].len = I2C_MSG_LENGTH; - msg[0].buf = data; - /* high byte goes out first */ - data[0] = (u8)(reg >> 8); - data[1] = (u8)(reg & 0xff); + msgs[0].addr = client->addr; + msgs[0].flags = 0; + msgs[0].len = ARRAY_SIZE(addr_buf); + msgs[0].buf = addr_buf; - msg[1].addr = client->addr; - msg[1].len = data_length; - msg[1].flags = I2C_M_RD; - msg[1].buf = data; + msgs[1].addr = client->addr; + msgs[1].flags = I2C_M_RD; + msgs[1].len = len; + msgs[1].buf = &data_buf[4 - len]; - err = i2c_transfer(client->adapter, msg, 2); - if (err != 2) { - if (err >= 0) - err = -EIO; - dev_err(&client->dev, - "read from offset 0x%x error %d", reg, err); - return err; + ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) { + dev_err(&client->dev, "read error: reg=0x%4x: %d\n", reg, ret); + return -EIO; } - *val = 0; - /* high byte comes first */ - if (data_length == OV2680_8BIT) - *val = (u8)data[0]; - else if (data_length == OV2680_16BIT) - *val = be16_to_cpu(*(__be16 *)&data[0]); - else - *val = be32_to_cpu(*(__be32 *)&data[0]); - //dev_dbg(&client->dev, "++++i2c read adr%x = %x\n", reg,*val); + *val = get_unaligned_be32(data_buf); + return 0; } @@ -120,39 +97,24 @@ static int ov2680_i2c_write(struct i2c_client *client, u16 len, u8 *data) return ret == num_msg ? 0 : ret; } -static int ov2680_write_reg(struct i2c_client *client, u16 data_length, +static int ov2680_write_reg(struct i2c_client *client, unsigned int len, u16 reg, u16 val) { + u8 buf[6]; int ret; - unsigned char data[4] = {0}; - __be16 *wreg = (void *)data; - const u16 len = data_length + sizeof(u16); /* 16-bit address + data */ - if (data_length != OV2680_8BIT && data_length != OV2680_16BIT) { - dev_err(&client->dev, - "%s error, invalid data_length\n", __func__); + if (len > 4) return -EINVAL; - } - - /* high byte goes out first */ - *wreg = cpu_to_be16(reg); - - if (data_length == OV2680_8BIT) { - data[2] = (u8)(val); - } else { - /* OV2680_16BIT */ - __be16 *wdata = (void *)&data[2]; - *wdata = cpu_to_be16(val); + put_unaligned_be16(reg, buf); + put_unaligned_be32(val << (8 * (4 - len)), buf + 2); + ret = i2c_master_send(client, buf, len + 2); + if (ret != len + 2) { + dev_err(&client->dev, "write error: reg=0x%4x: %d\n", reg, ret); + return -EIO; } - ret = ov2680_i2c_write(client, len, data); - if (ret) - dev_err(&client->dev, - "write error: wrote 0x%x to offset 0x%02x error %d", - val, reg, ret); - - return ret; + return 0; } /* @@ -359,37 +321,37 @@ static int ov2680_get_intg_factor(struct i2c_client *client, buf->read_mode = res->bin_mode; /* get the cropping and output resolution to ISP for this mode. */ - ret = ov2680_read_reg(client, OV2680_16BIT, + ret = ov2680_read_reg(client, 2, OV2680_HORIZONTAL_START_H, ®_val); if (ret) return ret; buf->crop_horizontal_start = reg_val; - ret = ov2680_read_reg(client, OV2680_16BIT, + ret = ov2680_read_reg(client, 2, OV2680_VERTICAL_START_H, ®_val); if (ret) return ret; buf->crop_vertical_start = reg_val; - ret = ov2680_read_reg(client, OV2680_16BIT, + ret = ov2680_read_reg(client, 2, OV2680_HORIZONTAL_END_H, ®_val); if (ret) return ret; buf->crop_horizontal_end = reg_val; - ret = ov2680_read_reg(client, OV2680_16BIT, + ret = ov2680_read_reg(client, 2, OV2680_VERTICAL_END_H, ®_val); if (ret) return ret; buf->crop_vertical_end = reg_val; - ret = ov2680_read_reg(client, OV2680_16BIT, + ret = ov2680_read_reg(client, 2, OV2680_HORIZONTAL_OUTPUT_SIZE_H, ®_val); if (ret) return ret; buf->output_width = reg_val; - ret = ov2680_read_reg(client, OV2680_16BIT, + ret = ov2680_read_reg(client, 2, OV2680_VERTICAL_OUTPUT_SIZE_H, ®_val); if (ret) return ret; @@ -418,7 +380,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, vts = ov2680_res[dev->fmt_idx].lines_per_frame; /* group hold */ - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_GROUP_ACCESS, 0x00); if (ret) { dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", @@ -430,7 +392,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, if (coarse_itg > vts - OV2680_INTEGRATION_TIME_MARGIN) vts = (u16)coarse_itg + OV2680_INTEGRATION_TIME_MARGIN; - ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_TIMING_VTS_H, vts); + ret = ov2680_write_reg(client, 2, OV2680_TIMING_VTS_H, vts); if (ret) { dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_TIMING_VTS_H); @@ -441,7 +403,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, /* Lower four bit should be 0*/ exp_val = coarse_itg << 4; - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_EXPOSURE_L, exp_val & 0xFF); if (ret) { dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", @@ -449,7 +411,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, return ret; } - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_EXPOSURE_M, (exp_val >> 8) & 0xFF); if (ret) { dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", @@ -457,7 +419,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, return ret; } - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_EXPOSURE_H, (exp_val >> 16) & 0x0F); if (ret) { dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", @@ -466,7 +428,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } /* Analog gain */ - ret = ov2680_write_reg(client, OV2680_16BIT, OV2680_AGC_H, gain); + ret = ov2680_write_reg(client, 2, OV2680_AGC_H, gain); if (ret) { dev_err(&client->dev, "%s: write 0x%02x: error, aborted\n", __func__, OV2680_AGC_H); @@ -474,7 +436,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } /* Digital gain */ if (digitgain) { - ret = ov2680_write_reg(client, OV2680_16BIT, + ret = ov2680_write_reg(client, 2, OV2680_MWB_RED_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, @@ -483,7 +445,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, return ret; } - ret = ov2680_write_reg(client, OV2680_16BIT, + ret = ov2680_write_reg(client, 2, OV2680_MWB_GREEN_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, @@ -492,7 +454,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, return ret; } - ret = ov2680_write_reg(client, OV2680_16BIT, + ret = ov2680_write_reg(client, 2, OV2680_MWB_BLUE_GAIN_H, digitgain); if (ret) { dev_err(&client->dev, @@ -503,13 +465,13 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg, } /* End group */ - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_GROUP_ACCESS, 0x10); if (ret) return ret; /* Delay launch group */ - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_GROUP_ACCESS, 0xa0); if (ret) return ret; @@ -570,20 +532,20 @@ static int ov2680_q_exposure(struct v4l2_subdev *sd, s32 *value) int ret; /* get exposure */ - ret = ov2680_read_reg(client, OV2680_8BIT, + ret = ov2680_read_reg(client, 1, OV2680_EXPOSURE_L, ®_v); if (ret) goto err; - ret = ov2680_read_reg(client, OV2680_8BIT, + ret = ov2680_read_reg(client, 1, OV2680_EXPOSURE_M, ®_v2); if (ret) goto err; reg_v += reg_v2 << 8; - ret = ov2680_read_reg(client, OV2680_8BIT, + ret = ov2680_read_reg(client, 1, OV2680_EXPOSURE_H, ®_v2); if (ret) @@ -619,7 +581,7 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) u8 index; dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); - ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_FLIP_REG, &val); + ret = ov2680_read_reg(client, 1, OV2680_FLIP_REG, &val); if (ret) return ret; if (value) { @@ -627,7 +589,7 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value) } else { val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; } - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_FLIP_REG, val); if (ret) return ret; @@ -653,7 +615,7 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) dev_dbg(&client->dev, "@%s: value:%d\n", __func__, value); - ret = ov2680_read_reg(client, OV2680_8BIT, OV2680_MIRROR_REG, &val); + ret = ov2680_read_reg(client, 1, OV2680_MIRROR_REG, &val); if (ret) return ret; if (value) { @@ -661,7 +623,7 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) } else { val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE; } - ret = ov2680_write_reg(client, OV2680_8BIT, + ret = ov2680_write_reg(client, 1, OV2680_MIRROR_REG, val); if (ret) return ret; @@ -831,7 +793,7 @@ static int ov2680_init_registers(struct v4l2_subdev *sd) struct i2c_client *client = v4l2_get_subdevdata(sd); int ret; - ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_SW_RESET, 0x01); + ret = ov2680_write_reg(client, 1, OV2680_SW_RESET, 0x01); ret |= ov2680_write_reg_array(client, ov2680_global_setting); return ret; @@ -1183,13 +1145,13 @@ static int ov2680_detect(struct i2c_client *client) if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) return -ENODEV; - ret = ov2680_read_reg(client, OV2680_8BIT, + ret = ov2680_read_reg(client, 1, OV2680_SC_CMMN_CHIP_ID_H, &high); if (ret) { dev_err(&client->dev, "sensor_id_high = 0x%x\n", high); return -ENODEV; } - ret = ov2680_read_reg(client, OV2680_8BIT, + ret = ov2680_read_reg(client, 1, OV2680_SC_CMMN_CHIP_ID_L, &low); id = ((((u16)high) << 8) | (u16)low); @@ -1198,7 +1160,7 @@ static int ov2680_detect(struct i2c_client *client) return -ENODEV; } - ret = ov2680_read_reg(client, OV2680_8BIT, + ret = ov2680_read_reg(client, 1, OV2680_SC_CMMN_SUB_ID, &high); revision = (u8)high & 0x0f; @@ -1220,7 +1182,7 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) else dev_dbg(&client->dev, "ov2680_s_stream off\n"); - ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_SW_STREAM, + ret = ov2680_write_reg(client, 1, OV2680_SW_STREAM, enable ? OV2680_START_STREAMING : OV2680_STOP_STREAMING); #if 0 -- GitLab From b0ac238396c41e78025d05d9167027940fbef2b4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 19 May 2020 17:31:50 +0200 Subject: [PATCH 482/503] media: atomisp-ov2680: get rid of the type field This isn't really used, so get rid, in order to make the code simpler. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-ov2680.c | 56 +- drivers/staging/media/atomisp/i2c/ov2680.h | 1048 ++++++++--------- 2 files changed, 536 insertions(+), 568 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index b63574bf37951..6be359a4dc133 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -158,21 +158,9 @@ static int __ov2680_buf_reg_array(struct i2c_client *client, const struct ov2680_reg *next) { int size; - __be16 *data16; - switch (next->type) { - case OV2680_8BIT: - size = 1; - ctrl->buffer.data[ctrl->index] = (u8)next->val; - break; - case OV2680_16BIT: - size = 2; - data16 = (void *)&ctrl->buffer.data[ctrl->index]; - *data16 = cpu_to_be16((u16)next->val); - break; - default: - return -EINVAL; - } + size = 1; + ctrl->buffer.data[ctrl->index] = (u8)next->val; /* When first item is added, we need to store its starting address */ if (ctrl->index == 0) @@ -208,34 +196,24 @@ static int ov2680_write_reg_array(struct i2c_client *client, int err; ctrl.index = 0; - for (; next->type != OV2680_TOK_TERM; next++) { - switch (next->type & OV2680_TOK_MASK) { - case OV2680_TOK_DELAY: + for (; next->reg != 0; next++) { + /* + * If next address is not consecutive, data needs to be + * flushed before proceed. + */ + dev_dbg(&client->dev, "%s: reg=0x%02x set to 0x%02x\n", + __func__, next->reg, next->val); + if (!__ov2680_write_reg_is_consecutive(client, &ctrl, + next)) { err = __ov2680_flush_reg_array(client, &ctrl); if (err) return err; - msleep(next->val); - break; - default: - /* - * If next address is not consecutive, data needs to be - * flushed before proceed. - */ - dev_dbg(&client->dev, "%s: reg=0x%02x set to 0x%02x\n", - __func__, next->reg, next->val); - if (!__ov2680_write_reg_is_consecutive(client, &ctrl, - next)) { - err = __ov2680_flush_reg_array(client, &ctrl); - if (err) - return err; - } - err = __ov2680_buf_reg_array(client, &ctrl, next); - if (err) { - dev_err(&client->dev, - "%s: write error, aborted\n", __func__); - return err; - } - break; + } + err = __ov2680_buf_reg_array(client, &ctrl, next); + if (err) { + dev_err(&client->dev, + "%s: write error, aborted\n", __func__); + return err; } } diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h index 741d0e2e03987..034e1032f6c06 100644 --- a/drivers/staging/media/atomisp/i2c/ov2680.h +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -179,15 +179,6 @@ struct ov2680_device { u8 type; }; -enum ov2680_tok_type { - OV2680_8BIT = 0x0001, - OV2680_16BIT = 0x0002, - OV2680_32BIT = 0x0004, - OV2680_TOK_TERM = 0xf000, /* terminating token for reg list */ - OV2680_TOK_DELAY = 0xfe00, /* delay token for reg list */ - OV2680_TOK_MASK = 0xfff0 -}; - /** * struct ov2680_reg - MI sensor register format * @type: type of the register @@ -197,7 +188,6 @@ enum ov2680_tok_type { * Define a structure for sensor register initialization values */ struct ov2680_reg { - enum ov2680_tok_type type; u16 reg; u32 val; /* @set value for read/mod/write, @mask */ }; @@ -217,79 +207,79 @@ struct ov2680_write_ctrl { }; static struct ov2680_reg const ov2680_global_setting[] = { - {OV2680_8BIT, 0x0103, 0x01}, - {OV2680_8BIT, 0x3002, 0x00}, - {OV2680_8BIT, 0x3016, 0x1c}, - {OV2680_8BIT, 0x3018, 0x44}, - {OV2680_8BIT, 0x3020, 0x00}, - {OV2680_8BIT, 0x3080, 0x02}, - {OV2680_8BIT, 0x3082, 0x45}, - {OV2680_8BIT, 0x3084, 0x09}, - {OV2680_8BIT, 0x3085, 0x04}, - {OV2680_8BIT, 0x3503, 0x03}, - {OV2680_8BIT, 0x350b, 0x36}, - {OV2680_8BIT, 0x3600, 0xb4}, - {OV2680_8BIT, 0x3603, 0x39}, - {OV2680_8BIT, 0x3604, 0x24}, - {OV2680_8BIT, 0x3605, 0x00}, - {OV2680_8BIT, 0x3620, 0x26}, - {OV2680_8BIT, 0x3621, 0x37}, - {OV2680_8BIT, 0x3622, 0x04}, - {OV2680_8BIT, 0x3628, 0x00}, - {OV2680_8BIT, 0x3705, 0x3c}, - {OV2680_8BIT, 0x370c, 0x50}, - {OV2680_8BIT, 0x370d, 0xc0}, - {OV2680_8BIT, 0x3718, 0x88}, - {OV2680_8BIT, 0x3720, 0x00}, - {OV2680_8BIT, 0x3721, 0x00}, - {OV2680_8BIT, 0x3722, 0x00}, - {OV2680_8BIT, 0x3723, 0x00}, - {OV2680_8BIT, 0x3738, 0x00}, - {OV2680_8BIT, 0x3717, 0x58}, - {OV2680_8BIT, 0x3781, 0x80}, - {OV2680_8BIT, 0x3789, 0x60}, - {OV2680_8BIT, 0x3800, 0x00}, - {OV2680_8BIT, 0x3819, 0x04}, - {OV2680_8BIT, 0x4000, 0x81}, - {OV2680_8BIT, 0x4001, 0x40}, - {OV2680_8BIT, 0x4602, 0x02}, - {OV2680_8BIT, 0x481f, 0x36}, - {OV2680_8BIT, 0x4825, 0x36}, - {OV2680_8BIT, 0x4837, 0x18}, - {OV2680_8BIT, 0x5002, 0x30}, - {OV2680_8BIT, 0x5004, 0x04},//manual awb 1x - {OV2680_8BIT, 0x5005, 0x00}, - {OV2680_8BIT, 0x5006, 0x04}, - {OV2680_8BIT, 0x5007, 0x00}, - {OV2680_8BIT, 0x5008, 0x04}, - {OV2680_8BIT, 0x5009, 0x00}, - {OV2680_8BIT, 0x5080, 0x00}, - {OV2680_8BIT, 0x3701, 0x64}, //add on 14/05/13 - {OV2680_8BIT, 0x3784, 0x0c}, //based OV2680_R1A_AM10.ovt add on 14/06/13 - {OV2680_8BIT, 0x5780, 0x3e}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 - {OV2680_8BIT, 0x5781, 0x0f}, - {OV2680_8BIT, 0x5782, 0x04}, - {OV2680_8BIT, 0x5783, 0x02}, - {OV2680_8BIT, 0x5784, 0x01}, - {OV2680_8BIT, 0x5785, 0x01}, - {OV2680_8BIT, 0x5786, 0x00}, - {OV2680_8BIT, 0x5787, 0x04}, - {OV2680_8BIT, 0x5788, 0x02}, - {OV2680_8BIT, 0x5789, 0x00}, - {OV2680_8BIT, 0x578a, 0x01}, - {OV2680_8BIT, 0x578b, 0x02}, - {OV2680_8BIT, 0x578c, 0x03}, - {OV2680_8BIT, 0x578d, 0x03}, - {OV2680_8BIT, 0x578e, 0x08}, - {OV2680_8BIT, 0x578f, 0x0c}, - {OV2680_8BIT, 0x5790, 0x08}, - {OV2680_8BIT, 0x5791, 0x04}, - {OV2680_8BIT, 0x5792, 0x00}, - {OV2680_8BIT, 0x5793, 0x00}, - {OV2680_8BIT, 0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 - {OV2680_8BIT, 0x0100, 0x00}, //stream off - - {OV2680_TOK_TERM, 0, 0} + {0x0103, 0x01}, + {0x3002, 0x00}, + {0x3016, 0x1c}, + {0x3018, 0x44}, + {0x3020, 0x00}, + {0x3080, 0x02}, + {0x3082, 0x45}, + {0x3084, 0x09}, + {0x3085, 0x04}, + {0x3503, 0x03}, + {0x350b, 0x36}, + {0x3600, 0xb4}, + {0x3603, 0x39}, + {0x3604, 0x24}, + {0x3605, 0x00}, + {0x3620, 0x26}, + {0x3621, 0x37}, + {0x3622, 0x04}, + {0x3628, 0x00}, + {0x3705, 0x3c}, + {0x370c, 0x50}, + {0x370d, 0xc0}, + {0x3718, 0x88}, + {0x3720, 0x00}, + {0x3721, 0x00}, + {0x3722, 0x00}, + {0x3723, 0x00}, + {0x3738, 0x00}, + {0x3717, 0x58}, + {0x3781, 0x80}, + {0x3789, 0x60}, + {0x3800, 0x00}, + {0x3819, 0x04}, + {0x4000, 0x81}, + {0x4001, 0x40}, + {0x4602, 0x02}, + {0x481f, 0x36}, + {0x4825, 0x36}, + {0x4837, 0x18}, + {0x5002, 0x30}, + {0x5004, 0x04},//manual awb 1x + {0x5005, 0x00}, + {0x5006, 0x04}, + {0x5007, 0x00}, + {0x5008, 0x04}, + {0x5009, 0x00}, + {0x5080, 0x00}, + {0x3701, 0x64}, //add on 14/05/13 + {0x3784, 0x0c}, //based OV2680_R1A_AM10.ovt add on 14/06/13 + {0x5780, 0x3e}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {0x5781, 0x0f}, + {0x5782, 0x04}, + {0x5783, 0x02}, + {0x5784, 0x01}, + {0x5785, 0x01}, + {0x5786, 0x00}, + {0x5787, 0x04}, + {0x5788, 0x02}, + {0x5789, 0x00}, + {0x578a, 0x01}, + {0x578b, 0x02}, + {0x578c, 0x03}, + {0x578d, 0x03}, + {0x578e, 0x08}, + {0x578f, 0x0c}, + {0x5790, 0x08}, + {0x5791, 0x04}, + {0x5792, 0x00}, + {0x5793, 0x00}, + {0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13 + {0x0100, 0x00}, //stream off + + {} }; #if 0 /* None of the definitions below are used currently */ @@ -297,389 +287,389 @@ static struct ov2680_reg const ov2680_global_setting[] = { * 176x144 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_QCIF_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xaf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x47}, - {OV2680_8BIT, 0x3808, 0x00}, - {OV2680_8BIT, 0x3809, 0xC0}, - {OV2680_8BIT, 0x380a, 0x00}, - {OV2680_8BIT, 0x380b, 0xa0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4000, 0x81}, - {OV2680_8BIT, 0x4001, 0x40}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x01}, + {0x3501, 0x24}, + {0x3502, 0x40}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x05}, + {0x3805, 0xaf}, + {0x3806, 0x04}, + {0x3807, 0x47}, + {0x3808, 0x00}, + {0x3809, 0xC0}, + {0x380a, 0x00}, + {0x380b, 0xa0}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x380e, 0x02}, + {0x380f, 0x84}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4000, 0x81}, + {0x4001, 0x40}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} }; /* * 352x288 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_CIF_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x03}, - {OV2680_8BIT, 0x3805, 0x8f}, - {OV2680_8BIT, 0x3806, 0x02}, - {OV2680_8BIT, 0x3807, 0xe7}, - {OV2680_8BIT, 0x3808, 0x01}, - {OV2680_8BIT, 0x3809, 0x70}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0x30}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x01}, + {0x3501, 0x24}, + {0x3502, 0x40}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x03}, + {0x3805, 0x8f}, + {0x3806, 0x02}, + {0x3807, 0xe7}, + {0x3808, 0x01}, + {0x3809, 0x70}, + {0x380a, 0x01}, + {0x380b, 0x30}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x380e, 0x02}, + {0x380f, 0x84}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} }; /* * 336x256 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_QVGA_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x03}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x02}, - {OV2680_8BIT, 0x3807, 0x87}, - {OV2680_8BIT, 0x3808, 0x01}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0x00}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x01}, + {0x3501, 0x24}, + {0x3502, 0x40}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x03}, + {0x3805, 0x4f}, + {0x3806, 0x02}, + {0x3807, 0x87}, + {0x3808, 0x01}, + {0x3809, 0x50}, + {0x380a, 0x01}, + {0x380b, 0x00}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x380e, 0x02}, + {0x380f, 0x84}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} }; /* * 656x496 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_656x496_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xcf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x67}, - {OV2680_8BIT, 0x3808, 0x02}, - {OV2680_8BIT, 0x3809, 0x90}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0xf0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x01}, + {0x3501, 0x24}, + {0x3502, 0x40}, + {0x370a, 0x23}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x05}, + {0x3805, 0xcf}, + {0x3806, 0x04}, + {0x3807, 0x67}, + {0x3808, 0x02}, + {0x3809, 0x90}, + {0x380a, 0x01}, + {0x380b, 0xf0}, + {0x380c, 0x06}, + {0x380d, 0xb0}, + {0x380e, 0x02}, + {0x380f, 0x84}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + // {0x5090, 0x0c}, + {} }; /* * 800x600 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_720x592_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x26}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0x00}, // X_ADDR_START; - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, // Y_ADDR_START; - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xaf}, // X_ADDR_END; - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xaf}, // Y_ADDR_END; - {OV2680_8BIT, 0x3808, 0x02}, - {OV2680_8BIT, 0x3809, 0xd0}, // X_OUTPUT_SIZE; - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0x50}, // Y_OUTPUT_SIZE; - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xac}, // HTS; - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, // VTS; - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5708, 0x00}, - {OV2680_8BIT, 0x5704, 0x02}, - {OV2680_8BIT, 0x5705, 0xd0}, // X_WIN; - {OV2680_8BIT, 0x5706, 0x02}, - {OV2680_8BIT, 0x5707, 0x50}, // Y_WIN; - {OV2680_8BIT, 0x3820, 0xc2}, // FLIP_FORMAT; - {OV2680_8BIT, 0x3821, 0x01}, // MIRROR_FORMAT; - {OV2680_8BIT, 0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; + {0x3086, 0x01}, + {0x3501, 0x26}, + {0x3502, 0x40}, + {0x370a, 0x23}, + {0x3801, 0x00}, // X_ADDR_START; + {0x3802, 0x00}, + {0x3803, 0x00}, // Y_ADDR_START; + {0x3804, 0x05}, + {0x3805, 0xaf}, // X_ADDR_END; + {0x3806, 0x04}, + {0x3807, 0xaf}, // Y_ADDR_END; + {0x3808, 0x02}, + {0x3809, 0xd0}, // X_OUTPUT_SIZE; + {0x380a, 0x02}, + {0x380b, 0x50}, // Y_OUTPUT_SIZE; + {0x380c, 0x06}, + {0x380d, 0xac}, // HTS; + {0x380e, 0x02}, + {0x380f, 0x84}, // VTS; + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5708, 0x00}, + {0x5704, 0x02}, + {0x5705, 0xd0}, // X_WIN; + {0x5706, 0x02}, + {0x5707, 0x50}, // Y_WIN; + {0x3820, 0xc2}, // FLIP_FORMAT; + {0x3821, 0x01}, // MIRROR_FORMAT; + {0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; // BIT[3]: Mirror order, BG or GB; // BIT[2]: Flip order, BR or RB; - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} + {0x5081, 0x41}, + {} }; /* * 800x600 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_800x600_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x26}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x03}, - {OV2680_8BIT, 0x3809, 0x20}, - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0x58}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xac}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x5708, 0x00}, - {OV2680_8BIT, 0x5704, 0x03}, - {OV2680_8BIT, 0x5705, 0x20}, - {OV2680_8BIT, 0x5706, 0x02}, - {OV2680_8BIT, 0x5707, 0x58}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - {OV2680_8BIT, 0x5090, 0x00}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x01}, + {0x3501, 0x26}, + {0x3502, 0x40}, + {0x370a, 0x23}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x00}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xbf}, + {0x3808, 0x03}, + {0x3809, 0x20}, + {0x380a, 0x02}, + {0x380b, 0x58}, + {0x380c, 0x06}, + {0x380d, 0xac}, + {0x380e, 0x02}, + {0x380f, 0x84}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x31}, + {0x3815, 0x31}, + {0x5708, 0x00}, + {0x5704, 0x03}, + {0x5705, 0x20}, + {0x5706, 0x02}, + {0x5707, 0x58}, + {0x3820, 0xc2}, + {0x3821, 0x01}, + {0x5090, 0x00}, + {0x4008, 0x00}, + {0x4009, 0x03}, + {0x5081, 0x41}, + {} }; /* * 720p=1280*720 30fps VBlanking 1lane 10Bit (no-Scaling) */ static struct ov2680_reg const ov2680_720p_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0xf2}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xbf}, - {OV2680_8BIT, 0x3806, 0x03}, - {OV2680_8BIT, 0x3807, 0xdd}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0x10}, - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0xe0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x06}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x00}, + {0x3501, 0x48}, + {0x3502, 0xe0}, + {0x370a, 0x21}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0xf2}, + {0x3804, 0x05}, + {0x3805, 0xbf}, + {0x3806, 0x03}, + {0x3807, 0xdd}, + {0x3808, 0x05}, + {0x3809, 0x10}, + {0x380a, 0x02}, + {0x380b, 0xe0}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x380e, 0x05}, + {0x380f, 0x0e}, + {0x3810, 0x00}, + {0x3811, 0x08}, + {0x3812, 0x00}, + {0x3813, 0x06}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0c}, + {} }; /* * 1296x976 30fps VBlanking 1lane 10Bit(no-scaling) */ static struct ov2680_reg const ov2680_1296x976_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xbf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x57}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0x10}, - {OV2680_8BIT, 0x380a, 0x03}, - {OV2680_8BIT, 0x380b, 0xd0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x08}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, //miror/flip - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x00}, + {0x3501, 0x48}, + {0x3502, 0xe0}, + {0x370a, 0x21}, + {0x3801, 0xa0}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x05}, + {0x3805, 0xbf}, + {0x3806, 0x04}, + {0x3807, 0x57}, + {0x3808, 0x05}, + {0x3809, 0x10}, + {0x380a, 0x03}, + {0x380b, 0xd0}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x380e, 0x05}, + {0x380f, 0x0e}, + {0x3810, 0x00}, + {0x3811, 0x08}, + {0x3812, 0x00}, + {0x3813, 0x08}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc0}, + {0x3821, 0x00}, //miror/flip + // {0x5090, 0x0c}, + {} }; /* * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling) */ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x90}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xC0}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0xb0}, - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0x48}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x00}, + {0x3501, 0x48}, + {0x3502, 0xe0}, + {0x370a, 0x21}, + {0x3801, 0x90}, + {0x3802, 0x00}, + {0x3803, 0x78}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xC0}, + {0x3808, 0x05}, + {0x3809, 0xb0}, + {0x380a, 0x04}, + {0x380b, 0x48}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x380e, 0x05}, + {0x380f, 0x0e}, + {0x3810, 0x00}, + {0x3811, 0x08}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x10}, + {0x5705, 0xa0}, + {0x5706, 0x0c}, + {0x5707, 0x78}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0c}, + {} }; #endif @@ -688,43 +678,43 @@ static struct ov2680_reg const ov2680_1456x1096_30fps[] = { */ static struct ov2680_reg const ov2680_1616x916_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x96}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x39}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x03}, - {OV2680_8BIT, 0x380b, 0x94}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x08}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x03}, - {OV2680_8BIT, 0x5707, 0x94}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x00}, + {0x3501, 0x48}, + {0x3502, 0xe0}, + {0x370a, 0x21}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x96}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0x39}, + {0x3808, 0x06}, + {0x3809, 0x50}, + {0x380a, 0x03}, + {0x380b, 0x94}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x380e, 0x05}, + {0x380f, 0x0e}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x08}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x06}, + {0x5705, 0x50}, + {0x5706, 0x03}, + {0x5707, 0x94}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0C}, + {} }; /* @@ -732,86 +722,86 @@ static struct ov2680_reg const ov2680_1616x916_30fps[] = { */ #if 0 static struct ov2680_reg const ov2680_1616x1082_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x86}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0x3a}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x04}, - {OV2680_8BIT, 0x5707, 0x3a}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x00}, + {0x3501, 0x48}, + {0x3502, 0xe0}, + {0x370a, 0x21}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x86}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xbf}, + {0x3808, 0x06}, + {0x3809, 0x50}, + {0x380a, 0x04}, + {0x380b, 0x3a}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x380e, 0x05}, + {0x380f, 0x0e}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x06}, + {0x5705, 0x50}, + {0x5706, 0x04}, + {0x5707, 0x3a}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0C}, + {0x4008, 0x02}, + {0x4009, 0x09}, + {0x5081, 0x41}, + {} }; #endif /* * 1616x1216 30fps VBlanking 1lane 10Bit */ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50},//50},//4line for mirror and flip - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0xc0},//c0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x0b}, - {OV2680_8BIT, 0x5081, 0x01}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x04}, - {OV2680_8BIT, 0x5707, 0xcc}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_TOK_TERM, 0, 0} + {0x3086, 0x00}, + {0x3501, 0x48}, + {0x3502, 0xe0}, + {0x370a, 0x21}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x00}, + {0x3804, 0x06}, + {0x3805, 0x4f}, + {0x3806, 0x04}, + {0x3807, 0xbf}, + {0x3808, 0x06}, + {0x3809, 0x50},//50},//4line for mirror and flip + {0x380a, 0x04}, + {0x380b, 0xc0},//c0}, + {0x380c, 0x06}, + {0x380d, 0xa8}, + {0x380e, 0x05}, + {0x380f, 0x0e}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x00}, + {0x3814, 0x11}, + {0x3815, 0x11}, + {0x4008, 0x00}, + {0x4009, 0x0b}, + {0x5081, 0x01}, + {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {0x5704, 0x06}, + {0x5705, 0x50}, + {0x5706, 0x04}, + {0x5707, 0xcc}, + {0x3820, 0xc0}, + {0x3821, 0x00}, + // {0x5090, 0x0C}, + {} }; static struct ov2680_resolution ov2680_res_preview[] = { -- GitLab From 1bc075cbaf642e3ed74540aa54e7ef6c5274e2b1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 19 May 2020 17:43:57 +0200 Subject: [PATCH 483/503] media: atomisp: simplify ov2680 array write logic Instead of trying to send multiple bytes at the same time, just go one by one, like the upstream driver does. Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/i2c/atomisp-ov2680.c | 128 ++---------------- 1 file changed, 13 insertions(+), 115 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 6be359a4dc133..1cb55acf19e13 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -78,146 +78,44 @@ static int ov2680_read_reg(struct i2c_client *client, return 0; } -static int ov2680_i2c_write(struct i2c_client *client, u16 len, u8 *data) -{ - struct i2c_msg msg; - const int num_msg = 1; - int ret; - - msg.addr = client->addr; - msg.flags = 0; - msg.len = len; - msg.buf = data; - ret = i2c_transfer(client->adapter, &msg, 1); - - if (ret < 0) - dev_dbg(&client->dev, - "%s: i2c write reg=0x%02x, value 0x%02x, error %d\n", - __func__, data[0]*256 +data[1], data[2], ret); - return ret == num_msg ? 0 : ret; -} - static int ov2680_write_reg(struct i2c_client *client, unsigned int len, u16 reg, u16 val) { u8 buf[6]; int ret; - if (len > 4) + if (len == 2) + put_unaligned_be16(val << (8 * (4 - len)), buf + 2); + else if (len == 1) + buf[2] = val; + else return -EINVAL; put_unaligned_be16(reg, buf); - put_unaligned_be32(val << (8 * (4 - len)), buf + 2); + ret = i2c_master_send(client, buf, len + 2); if (ret != len + 2) { - dev_err(&client->dev, "write error: reg=0x%4x: %d\n", reg, ret); + dev_err(&client->dev, "write error %d reg 0x%04x, val 0x%02x: buf sent: %*ph\n", + ret, reg, val, len + 2, &buf); return -EIO; } return 0; } -/* - * ov2680_write_reg_array - Initializes a list of OV2680 registers - * @client: i2c driver client structure - * @reglist: list of registers to be written - * - * This function initializes a list of registers. When consecutive addresses - * are found in a row on the list, this function creates a buffer and sends - * consecutive data in a single i2c_transfer(). - * - * __ov2680_flush_reg_array, __ov2680_buf_reg_array() and - * __ov2680_write_reg_is_consecutive() are internal functions to - * ov2680_write_reg_array_fast() and should be not used anywhere else. - * - */ - -static int __ov2680_flush_reg_array(struct i2c_client *client, - struct ov2680_write_ctrl *ctrl) -{ - u16 size; - __be16 *data16 = (void *)&ctrl->buffer.addr; - - if (ctrl->index == 0) { - dev_dbg(&client->dev, "%s: *not* flushing reg_array\n", - __func__); - return 0; - } - - dev_dbg(&client->dev, "%s: flushing reg_array\n", __func__); - - size = sizeof(u16) + ctrl->index; /* 16-bit address + data */ - *data16 = cpu_to_be16(ctrl->buffer.addr); - ctrl->index = 0; - - return ov2680_i2c_write(client, size, (u8 *)&ctrl->buffer); -} - -static int __ov2680_buf_reg_array(struct i2c_client *client, - struct ov2680_write_ctrl *ctrl, - const struct ov2680_reg *next) -{ - int size; - - size = 1; - ctrl->buffer.data[ctrl->index] = (u8)next->val; - - /* When first item is added, we need to store its starting address */ - if (ctrl->index == 0) - ctrl->buffer.addr = next->reg; - - ctrl->index += size; - - /* - * Buffer cannot guarantee free space for u32? Better flush it to avoid - * possible lack of memory for next item. - */ - if (ctrl->index + sizeof(u16) >= OV2680_MAX_WRITE_BUF_SIZE) - return __ov2680_flush_reg_array(client, ctrl); - - return 0; -} - -static int __ov2680_write_reg_is_consecutive(struct i2c_client *client, - struct ov2680_write_ctrl *ctrl, - const struct ov2680_reg *next) -{ - if (ctrl->index == 0) - return 1; - - return ctrl->buffer.addr + ctrl->index == next->reg; -} - static int ov2680_write_reg_array(struct i2c_client *client, const struct ov2680_reg *reglist) { const struct ov2680_reg *next = reglist; - struct ov2680_write_ctrl ctrl; - int err; + int ret; - ctrl.index = 0; for (; next->reg != 0; next++) { - /* - * If next address is not consecutive, data needs to be - * flushed before proceed. - */ - dev_dbg(&client->dev, "%s: reg=0x%02x set to 0x%02x\n", - __func__, next->reg, next->val); - if (!__ov2680_write_reg_is_consecutive(client, &ctrl, - next)) { - err = __ov2680_flush_reg_array(client, &ctrl); - if (err) - return err; - } - err = __ov2680_buf_reg_array(client, &ctrl, next); - if (err) { - dev_err(&client->dev, - "%s: write error, aborted\n", __func__); - return err; - } + ret = ov2680_write_reg(client, 1, next->reg, next->val); + if (ret) + return ret; } - return __ov2680_flush_reg_array(client, &ctrl); + return 0; } static int ov2680_g_focal(struct v4l2_subdev *sd, s32 *val) -- GitLab From eda1310b4087d6793c3e02c425e2292941f24631 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 19 May 2020 18:21:49 +0200 Subject: [PATCH 484/503] media: atomisp: turn on camera before setting it Camera cannot be set on power off mode. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/i2c/atomisp-ov2680.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 1cb55acf19e13..334f23f35d4a8 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -698,10 +698,13 @@ static int power_ctrl(struct v4l2_subdev *sd, bool flag) { int ret = 0; struct ov2680_device *dev = to_ov2680_sensor(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); if (!dev || !dev->platform_data) return -ENODEV; + dev_dbg(&client->dev, "%s: %s", __func__, flag? "on" : "off"); + if (flag) { ret |= dev->platform_data->v1p8_ctrl(sd, 1); ret |= dev->platform_data->v2p8_ctrl(sd, 1); @@ -959,6 +962,8 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, dev_dbg(&client->dev, "%s: i=%d, w=%d, h=%d\n", __func__, dev->fmt_idx, fmt->width, fmt->height); + // IS IT NEEDED? + power_up(sd); ret = ov2680_write_reg_array(client, ov2680_res[dev->fmt_idx].regs); if (ret) dev_err(&client->dev, -- GitLab From 814634b8e81ff54bfed69bba14656fc703221bd0 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 06:53:08 +0200 Subject: [PATCH 485/503] media: atomisp: disable the dynamic and reserved pools The memory management code for atomisp is complex: it has 2 extra pools (plus some ION-specific code). The code for those extra pools are complex, and there are even some parts of code over there that were forked from some mm/ code, probably from Kernel 3.10. Let's just use a single one, in order to make the driver simpler. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/hmm/hmm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/staging/media/atomisp/pci/hmm/hmm.c b/drivers/staging/media/atomisp/pci/hmm/hmm.c index 0ff81ea06241f..cd70307ffd57c 100644 --- a/drivers/staging/media/atomisp/pci/hmm/hmm.c +++ b/drivers/staging/media/atomisp/pci/hmm/hmm.c @@ -641,6 +641,7 @@ void hmm_vunmap(ia_css_ptr virt) int hmm_pool_register(unsigned int pool_size, enum hmm_pool_type pool_type) { +#if 0 // Just use the "normal" pool switch (pool_type) { case HMM_POOL_TYPE_RESERVED: reserved_pool.pops = &reserved_pops; @@ -654,10 +655,14 @@ int hmm_pool_register(unsigned int pool_size, enum hmm_pool_type pool_type) dev_err(atomisp_dev, "invalid pool type.\n"); return -EINVAL; } +#else + return 0; +#endif } void hmm_pool_unregister(enum hmm_pool_type pool_type) { +#if 0 // Just use the "normal" pool switch (pool_type) { case HMM_POOL_TYPE_RESERVED: if (reserved_pool.pops && reserved_pool.pops->pool_exit) @@ -671,6 +676,7 @@ void hmm_pool_unregister(enum hmm_pool_type pool_type) dev_err(atomisp_dev, "invalid pool type.\n"); break; } +#endif return; } -- GitLab From c03496b3bd9281524d11462dc24a7b660ec176c6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Tue, 12 May 2020 14:23:28 +0200 Subject: [PATCH 486/503] media: atomisp: add a notice about possible leak resources Calling acpi_bus_get_device() may end allocating resources that aren't freed. So, add a notice about that, as, if those drivers get out of staging, we may need some changes. Fixes: 0d64e9420583 ("media: atomisp: Add some ACPI detection info") Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/i2c/atomisp-gc0310.c | 3 ++- drivers/staging/media/atomisp/i2c/atomisp-gc2235.c | 2 +- drivers/staging/media/atomisp/i2c/atomisp-lm3554.c | 2 +- drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c | 2 +- drivers/staging/media/atomisp/i2c/atomisp-ov2680.c | 2 +- drivers/staging/media/atomisp/i2c/atomisp-ov2722.c | 2 +- drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c | 2 +- 7 files changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c index b69a5b50e3bce..ad1bd7d6a02b0 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc0310.c @@ -1317,9 +1317,10 @@ static int gc0310_probe(struct i2c_client *client) dev_err(&client->dev, "Error could not get ACPI device\n"); return -ENODEV; } - pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); + // FIXME: may need to release resources allocated by acpi_bus_get_device() + dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c index e863e19f26695..a12dd0e858bc1 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-gc2235.c @@ -1059,9 +1059,9 @@ static int gc2235_probe(struct i2c_client *client) dev_err(&client->dev, "Error could not get ACPI device\n"); return -ENODEV; } - pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); + // FIXME: may need to release resources allocated by acpi_bus_get_device() dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c index 0e9f80239dcbc..a899145265ffe 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-lm3554.c @@ -858,9 +858,9 @@ static int lm3554_probe(struct i2c_client *client) dev_err(&client->dev, "Error could not get ACPI device\n"); return -ENODEV; } - pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); + // FIXME: may need to release resources allocated by acpi_bus_get_device() flash = kzalloc(sizeof(*flash), GFP_KERNEL); if (!flash) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c index e7af4bbd844b2..ac61b391e3f91 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c @@ -1824,9 +1824,9 @@ static int mt9m114_probe(struct i2c_client *client) dev_err(&client->dev, "Error could not get ACPI device\n"); return -ENODEV; } - pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); + // FIXME: may need to release resources allocated by acpi_bus_get_device() /* Setup sensor configuration structure */ dev = kzalloc(sizeof(*dev), GFP_KERNEL); diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c index 334f23f35d4a8..1b60f6a9c0e0e 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2680.c @@ -1251,9 +1251,9 @@ static int ov2680_probe(struct i2c_client *client) dev_err(&client->dev, "Error could not get ACPI device\n"); return -ENODEV; } - dev_info(&client->dev, "%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); + // FIXME: may need to release resources allocated by acpi_bus_get_device() dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c index 08799054704a2..718d10f89d5a1 100644 --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c @@ -1222,9 +1222,9 @@ static int ov2722_probe(struct i2c_client *client) dev_err(&client->dev, "Error could not get ACPI device\n"); return -ENODEV; } - pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); + // FIXME: may need to release resources allocated by acpi_bus_get_device() dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) diff --git a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c index 886f9fd0152f1..2be0ef14d53e1 100644 --- a/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c +++ b/drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c @@ -1909,9 +1909,9 @@ static int ov5693_probe(struct i2c_client *client) dev_err(&client->dev, "Error could not get ACPI device\n"); return -ENODEV; } - pr_info("%s: ACPI detected it on bus ID=%s, HID=%s\n", __func__, acpi_device_bid(adev), acpi_device_hid(adev)); + // FIXME: may need to release resources allocated by acpi_bus_get_device() /* * Firmware workaround: Some modules use a "secondary default" -- GitLab From 1985e93802d271bd658833585fffb896c4976910 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 07:55:45 +0200 Subject: [PATCH 487/503] media: atomisp: isp_mmu: don't use kmem_cache Instead of using it only if system memory is below 2GB, don't use it at all. The problem is that the code there is not compatible anymore with modern Kernels: [ 179.552797] virt_to_cache: Object is not a Slab page! [ 179.552821] WARNING: CPU: 0 PID: 1414 at mm/slab.h:475 cache_from_obj+0xab/0xf0 [ 179.552824] Modules linked in: ccm(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) nft_chain_nat(E) ip6table_nat(E) ip6table_mangle(E) ip6table_raw(E) ip6table_security(E) iptable_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) libcrc32c(E) nf_defrag_ipv4(E) iptable_mangle(E) iptable_raw(E) iptable_security(E) ip_set(E) nf_tables(E) nfnetlink(E) ip6table_filter(E) ip6_tables(E) iptable_filter(E) cmac(E) bnep(E) sunrpc(E) vfat(E) fat(E) mei_hdcp(E) snd_soc_sst_cht_bsw_rt5645(E) gpio_keys(E) intel_rapl_msr(E) intel_powerclamp(E) coretemp(E) kvm_intel(E) kvm(E) irqbypass(E) crct10dif_pclmul(E) crc32_pclmul(E) asus_nb_wmi(E) ath10k_pci(E) ghash_clmulni_intel(E) ath10k_core(E) intel_cstate(E) wdat_wdt(E) pcspkr(E) ath(E) mac80211(E) intel_chtdc_ti_pwrbtn(E) joydev(E) btusb(E) btrtl(E) btbcm(E) btintel(E) libarc4(E) bluetooth(E) cfg80211(E) ecdh_generic(E) ecc(E) mei_txe(E) mei(E) lpc_ich(E) [ 179.552887] hid_sensor_accel_3d(E) hid_sensor_gyro_3d(E) hid_sensor_trigger(E) hid_sensor_iio_common(E) industrialio_triggered_buffer(E) kfifo_buf(E) industrialio(E) atomisp_ov2680(CE) snd_soc_rt5645(E) snd_intel_sst_acpi(E) snd_soc_rl6231(E) snd_intel_sst_core(E) snd_soc_sst_atom_hifi2_platform(E) intel_hid(E) snd_soc_acpi_intel_match(E) spi_pxa2xx_platform(E) snd_soc_acpi(E) snd_soc_core(E) snd_compress(E) dw_dmac(E) snd_hdmi_lpe_audio(E) int3400_thermal(E) int3406_thermal(E) snd_seq(E) acpi_thermal_rel(E) int3403_thermal(E) atomisp(CE) snd_seq_device(E) snd_pcm(E) intel_int0002_vgpio(E) soc_button_array(E) acpi_pad(E) intel_xhci_usb_role_switch(E) snd_timer(E) videobuf_vmalloc(E) videobuf_core(E) snd(E) atomisp_gmin_platform(CE) soundcore(E) videodev(E) processor_thermal_device(E) intel_soc_dts_iosf(E) mc(E) intel_rapl_common(E) int340x_thermal_zone(E) ip_tables(E) hid_sensor_hub(E) intel_ishtp_loader(E) intel_ishtp_hid(E) mmc_block(E) hid_multitouch(E) crc32c_intel(E) i915(E) [ 179.552936] hid_asus(E) i2c_algo_bit(E) asus_wmi(E) sparse_keymap(E) rfkill(E) drm_kms_helper(E) intel_ish_ipc(E) intel_ishtp(E) drm(E) wmi(E) video(E) i2c_hid(E) pwm_lpss_platform(E) pwm_lpss(E) sdhci_acpi(E) sdhci(E) mmc_core(E) fuse(E) [ 179.552961] CPU: 0 PID: 1414 Comm: v4l2grab Tainted: G C EL 5.7.0-rc2+ #42 [ 179.552963] Hardware name: ASUSTeK COMPUTER INC. T101HA/T101HA, BIOS T101HA.306 04/23/2019 [ 179.552968] RIP: 0010:cache_from_obj+0xab/0xf0 [ 179.552973] Code: c3 31 c0 80 3d 1c 38 72 01 00 75 f0 48 c7 c6 20 12 06 9f 48 c7 c7 10 f3 37 9f 48 89 04 24 c6 05 01 38 72 01 01 e8 2c 99 e0 ff <0f> 0b 48 8b 04 24 eb ca 48 8b 57 58 48 8b 48 58 48 c7 c6 30 12 06 [ 179.552976] RSP: 0018:ffffaf1f00c3fae0 EFLAGS: 00010282 [ 179.552980] RAX: 0000000000000029 RBX: 00000000000003ff RCX: 0000000000000007 [ 179.552983] RDX: 00000000fffffff8 RSI: 0000000000000082 RDI: ffff9cb6bbc19cc0 [ 179.552985] RBP: 0000000001000000 R08: 00000000000005a4 R09: ffffaf1f00c3f970 [ 179.552988] R10: 0000000000000005 R11: 0000000000000000 R12: ffffffffc0713da0 [ 179.552991] R13: ffff9cb5a7bb1000 R14: 0000000001000000 R15: ffff9cb5a7bb1000 [ 179.552995] FS: 0000000000000000(0000) GS:ffff9cb6bbc00000(0000) knlGS:0000000000000000 [ 179.552998] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 179.553000] CR2: 00007fe780544400 CR3: 000000002480a000 CR4: 00000000001006f0 [ 179.553003] Call Trace: [ 179.553015] kmem_cache_free+0x19/0x180 [ 179.553070] mmu_l2_unmap+0xd1/0x100 [atomisp] [ 179.553113] ? __bo_merge+0x8f/0xa0 [atomisp] [ 179.553155] mmu_unmap+0xd0/0xf0 [atomisp] [ 179.553198] hmm_bo_unbind+0x62/0xb0 [atomisp] [ 179.553240] hmm_free+0x44/0x60 [atomisp] Signed-off-by: Mauro Carvalho Chehab --- .../media/atomisp/include/mmu/isp_mmu.h | 1 - .../staging/media/atomisp/pci/mmu/isp_mmu.c | 24 +++---------------- 2 files changed, 3 insertions(+), 22 deletions(-) diff --git a/drivers/staging/media/atomisp/include/mmu/isp_mmu.h b/drivers/staging/media/atomisp/include/mmu/isp_mmu.h index c94df9012ac73..d9662c5152367 100644 --- a/drivers/staging/media/atomisp/include/mmu/isp_mmu.h +++ b/drivers/staging/media/atomisp/include/mmu/isp_mmu.h @@ -113,7 +113,6 @@ struct isp_mmu { phys_addr_t base_address; struct mutex pt_mutex; - struct kmem_cache *tbl_cache; }; /* flags for PDE and PTE */ diff --git a/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c b/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c index 06d907f6d143a..8930fd629dc39 100644 --- a/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c +++ b/drivers/staging/media/atomisp/pci/mmu/isp_mmu.c @@ -99,15 +99,8 @@ static phys_addr_t alloc_page_table(struct isp_mmu *mmu) phys_addr_t page; void *virt; - /*page table lock may needed here*/ - /* - * The slab allocator(kmem_cache and kmalloc family) doesn't handle - * GFP_DMA32 flag, so we have to use buddy allocator. - */ - if (totalram_pages() > (unsigned long)NR_PAGES_2GB) - virt = (void *)__get_free_page(GFP_KERNEL | GFP_DMA32); - else - virt = kmem_cache_zalloc(mmu->tbl_cache, GFP_KERNEL); + virt = (void *)__get_free_page(GFP_KERNEL | GFP_DMA32); + if (!virt) return (phys_addr_t)NULL_PAGE; @@ -142,10 +135,7 @@ static void free_page_table(struct isp_mmu *mmu, phys_addr_t page) set_memory_wb((unsigned long)virt, 1); #endif - if (totalram_pages() > (unsigned long)NR_PAGES_2GB) - free_page((unsigned long)virt); - else - kmem_cache_free(mmu->tbl_cache, virt); + free_page((unsigned long)virt); } static void mmu_remap_error(struct isp_mmu *mmu, @@ -541,12 +531,6 @@ int isp_mmu_init(struct isp_mmu *mmu, struct isp_mmu_client *driver) mutex_init(&mmu->pt_mutex); - mmu->tbl_cache = kmem_cache_create("iopte_cache", ISP_PAGE_SIZE, - ISP_PAGE_SIZE, SLAB_HWCACHE_ALIGN, - NULL); - if (!mmu->tbl_cache) - return -ENOMEM; - return 0; } @@ -579,6 +563,4 @@ void isp_mmu_exit(struct isp_mmu *mmu) } free_page_table(mmu, l1_pt); - - kmem_cache_destroy(mmu->tbl_cache); } -- GitLab From cf3cd3b05ea9ea09d96cbb7d1cd914e7d7db4b77 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 08:37:08 +0200 Subject: [PATCH 488/503] media: atomisp: print IRQ when debugging Add a debug printk to show what IRQ is popping up. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_compat_css20.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c index abc0fd91781a3..209bc9954a538 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c +++ b/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c @@ -1040,6 +1040,9 @@ void atomisp_css_rx_clear_irq_info(enum mipi_port_id port, int atomisp_css_irq_enable(struct atomisp_device *isp, enum atomisp_css_irq_info info, bool enable) { + dev_dbg(isp->dev, "%s: css irq info 0x%08x: %s.\n", + __func__, info, + enable ? "enable" : "disable"); if (ia_css_irq_enable(info, enable) != IA_CSS_SUCCESS) { dev_warn(isp->dev, "%s:Invalid irq info.\n", __func__); return -EINVAL; -- GitLab From 58d6ccc264ed527377434e53ffadfdebed6cf915 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 08:46:17 +0200 Subject: [PATCH 489/503] media: atomisp: don't produce errs for ignored IRQs Depending on the ISP-specific HAS_NO_INPUT_FORMATTER macro, some IRQs will be ignored by the driver. Yet, those keep happening, as reported by this debug print: [ 61.620746] atomisp-isp2 0000:00:03.0: atomisp_css_irq_enable: css irq info 0x00000004: disable. Causing this warning: [ 61.620749] atomisp-isp2 0000:00:03.0: atomisp_css_irq_enable:Invalid irq info. Well, if this is a normal situation, just ignore it without warnings. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/sh_css.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c index af77fb57282f3..05b3565ed5a38 100644 --- a/drivers/staging/media/atomisp/pci/sh_css.c +++ b/drivers/staging/media/atomisp/pci/sh_css.c @@ -2660,11 +2660,16 @@ enum ia_css_err ia_css_irq_enable( case IA_CSS_IRQ_INFO_INPUT_SYSTEM_ERROR: irq = virq_isys_csi; break; -#endif -#if !defined(HAS_NO_INPUT_FORMATTER) case IA_CSS_IRQ_INFO_IF_ERROR: irq = virq_ifmt0_id; break; +#else + case IA_CSS_IRQ_INFO_CSS_RECEIVER_SOF: + case IA_CSS_IRQ_INFO_CSS_RECEIVER_EOF: + case IA_CSS_IRQ_INFO_INPUT_SYSTEM_ERROR: + case IA_CSS_IRQ_INFO_IF_ERROR: + /* Just ignore those unused IRQs without printing errors */ + return IA_CSS_SUCCESS; #endif case IA_CSS_IRQ_INFO_DMA_ERROR: irq = virq_dma; -- GitLab From 27333dadef57ad36199945fa47f4206d60a4866c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 07:28:50 +0200 Subject: [PATCH 490/503] media: atomisp: adjust some code at sh_css that could be broken When checking sh_css.c against the Yocto Aero's version, it can be noticed that some isp2401 dependencies may have been taken wrongly. Change the code to work like the Yocto Aero, as this driver was tested in the past with an ISP2401 device. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/sh_css.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/sh_css.c b/drivers/staging/media/atomisp/pci/sh_css.c index 05b3565ed5a38..d77432254a2c0 100644 --- a/drivers/staging/media/atomisp/pci/sh_css.c +++ b/drivers/staging/media/atomisp/pci/sh_css.c @@ -530,6 +530,8 @@ ia_css_stream_input_format_bits_per_pixel(struct ia_css_stream *stream) return bpp; } +#define GP_ISEL_TPG_MODE 0x90058 + #if !defined(HAS_NO_INPUT_SYSTEM) && defined(USE_INPUT_SYSTEM_VERSION_2) static enum ia_css_err sh_css_config_input_network(struct ia_css_stream *stream) { @@ -580,10 +582,11 @@ sh_css_config_input_network(struct ia_css_stream *stream) { vblank_cycles = vblank_lines * (width + hblank_cycles); sh_css_sp_configure_sync_gen(width, height, hblank_cycles, vblank_cycles); - if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) { - /* TODO: move define to proper file in tools */ -#define GP_ISEL_TPG_MODE 0x90058 - ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); + if (!atomisp_hw_is_isp2401) { + if (pipe->stream->config.mode == IA_CSS_INPUT_MODE_TPG) { + /* TODO: move define to proper file in tools */ + ia_css_device_store_uint32(GP_ISEL_TPG_MODE, 0); + } } } ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, @@ -1022,11 +1025,13 @@ static bool sh_css_translate_stream_cfg_to_isys_stream_descr( * * Only 2401 relevant ?? */ +#if 0 // FIXME: NOT USED on Yocto Aero isys_stream_descr->polling_mode = early_polling ? INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST : INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME; ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "sh_css_translate_stream_cfg_to_isys_stream_descr() leave:\n"); +#endif return rc; } @@ -1464,7 +1469,7 @@ static void start_pipe( assert(me); /* all callers are in this file and call with non null argument */ - if (atomisp_hw_is_isp2401) { + if (!atomisp_hw_is_isp2401) { coord = &me->config.internal_frame_origin_bqs_on_sctbl; params = me->stream->isp_params_configs; } -- GitLab From 645626791e7eb91d961ff77dfc73f38319222365 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 12:00:22 +0200 Subject: [PATCH 491/503] media: atomisp: update TODO with the current data The TODO list doesn't reflect the current status of the driver. Update it. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/TODO | 53 +++++++++++++++++++----------- 1 file changed, 34 insertions(+), 19 deletions(-) diff --git a/drivers/staging/media/atomisp/TODO b/drivers/staging/media/atomisp/TODO index e2fba1ca0a120..52683a7042232 100644 --- a/drivers/staging/media/atomisp/TODO +++ b/drivers/staging/media/atomisp/TODO @@ -1,9 +1,9 @@ -1. A single AtomISP driver needs to be implemented to support both BYT and - CHT platforms. The current driver is a mechanical and hand combined merge - of the two using an ifdef ISP2401 to select the CHT version, which at the - moment is not enabled. Eventually this should become a runtime if check, - but there are some quite tricky things that need sorting out before that - will be possible. +1. A single AtomISP driver needs to be implemented to support both + Baytrail (BYT and Cherrytail (CHT) platforms at the same time. + The current driver is a mechanical and hand combined merge of the + two using several runtime macros, plus some ifdef ISP2401 to select the + CHT version. Yet, there are some ISP-specific headers that change the + driver's behavior during compile time. 2. The file structure needs to get tidied up to resemble a normal Linux driver. @@ -12,25 +12,29 @@ 3. The sensor drivers read MIPI settings from EFI variables or default to the settings hard-coded in the platform data file for different platforms. - This isn't ideal but may be hard to improve as this is how existing - platforms work. + It should be possible to improve it, by adding support for _DSM tables. -4. The sensor drivers use the regulator framework API. In the ideal world it - would be using ACPI but that's not how the existing devices work. +4. The sensor drivers use PMIC and the regulator framework API. In the ideal + world it would be using ACPI but that's not how the existing devices work. 5. The AtomISP driver includes some special IOCTLS (ATOMISP_IOC_XXXX_XXXX) - that may need some cleaning up. + and controls that require some cleanup. 6. Correct Coding Style. Please don't send coding style patches for this driver until the other work is done. -7. The ISP code depends on the exact FW version. The version defined in - BYT: - drivers/staging/media/atomisp/pci/atomisp2/pci/sh_css_firmware.c - static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458); +7. The ISP code has some dependencies of the exact FW version. + The version defined in pci/sh_css_firmware.c: + BYT: + static const char *isp2400_release_version = STR(irci_stable_candrpv_0415_20150521_0458); + CHT: - drivers/staging/media/atomisp/pci/atomisp2/css/sh_css_firmware.c - static const char *release_version = STR(irci_ecr-master_20150911_0724); + static const char *isp2401_release_version = STR(irci_ecr - master_20150911_0724); + + Those versions don't seem to be available anymore. On the tests we've + done so far, this version also seems to work for isp2401: + + irci_stable_candrpv_0415_20150521_0458 At some point we may need to round up a few driver versions and see if there are any specific things that can be done to fold in support for @@ -50,12 +54,23 @@ 11. Switch from videobuf1 to videobuf2. Videobuf1 is being removed! +12. There are some memory management code that seems to be + forked from Kernel 3.10 inside hmm/ directory. Get rid of it, + making the driver to use a more standard memory management module. + +13. While the driver probes the hardware and reports itself as a + V4L2 driver, there are still some issues preventing it to + stream (at least it doesn't with the standard V4L2 applications. + Didn't test yet with some custom-made app for this driver). + Solving the related bugs and issues preventing it to work is + needed. + Limitations: 1. To test the patches, you also need the ISP firmware - for BYT:/lib/firmware/shisp_2400b0_v21.bin - for CHT:/lib/firmware/shisp_2401a0_v21.bin + for BYT: /lib/firmware/shisp_2400b0_v21.bin + for CHT: /lib/firmware/shisp_2401a0_v21.bin The firmware files will usually be found in /etc/firmware on an Android device but can also be extracted from the upgrade kit if you've managed -- GitLab From 8c8664264b97cade6f9ab332450ccbeb1a450d34 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 20 May 2020 12:01:52 +0200 Subject: [PATCH 492/503] media: atomisp: unify the version for isp2401 a0 and b0 versions Based on Yocto Aero's repository, the file name for the isp2401 is the same for the B0 release. So, unify it at the driver. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/pci/atomisp_v4l2.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c index 592c41bb51660..694268d133c0f 100644 --- a/drivers/staging/media/atomisp/pci/atomisp_v4l2.c +++ b/drivers/staging/media/atomisp/pci/atomisp_v4l2.c @@ -1449,14 +1449,8 @@ atomisp_load_firmware(struct atomisp_device *isp) if (skip_fwload) return NULL; - if (isp->media_dev.hw_revision == - ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) - | ATOMISP_HW_STEPPING_B0)) - fw_path = "shisp_2401b0_v21.bin"; - - if (isp->media_dev.hw_revision == - ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT) - | ATOMISP_HW_STEPPING_A0)) + if ((isp->media_dev.hw_revision >> ATOMISP_HW_REVISION_SHIFT) + == ATOMISP_HW_REVISION_ISP2401) fw_path = "shisp_2401a0_v21.bin"; if (isp->media_dev.hw_revision == -- GitLab From 00994f0ceca30be576393ebfb84454d067577652 Mon Sep 17 00:00:00 2001 From: Helen Koike Date: Fri, 3 Apr 2020 18:15:33 +0200 Subject: [PATCH 493/503] media: staging: dt-bindings: phy-rockchip-dphy-rx0: remove non-used reg property reg property is not used in Rockchip MIPI DPHY RX0 bindings, thus remove it. Suggested-by: Johan Jonker Signed-off-by: Helen Koike Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/staging/media/phy-rockchip-dphy-rx0/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/drivers/staging/media/phy-rockchip-dphy-rx0/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml index 5dacece35702b..7d888d3588239 100644 --- a/drivers/staging/media/phy-rockchip-dphy-rx0/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml +++ b/drivers/staging/media/phy-rockchip-dphy-rx0/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml @@ -18,9 +18,6 @@ properties: compatible: const: rockchip,rk3399-mipi-dphy-rx0 - reg: - maxItems: 1 - clocks: items: - description: MIPI D-PHY ref clock -- GitLab From 960b2dee908b0fc51cf670841de13b40b44aaaae Mon Sep 17 00:00:00 2001 From: Helen Koike Date: Fri, 3 Apr 2020 18:15:34 +0200 Subject: [PATCH 494/503] media: dt-bindings: phy: phy-rockchip-dphy-rx0: move rockchip dphy rx0 bindings out of staging Move phy-rockchip-dphy-rx0 bindings to Documentation/devicetree/bindings/phy Verified with: make ARCH=arm64 dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml Signed-off-by: Helen Koike Acked-by: Rob Herring Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename {drivers/staging/media/phy-rockchip-dphy-rx0/Documentation => Documentation}/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml (100%) diff --git a/drivers/staging/media/phy-rockchip-dphy-rx0/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml similarity index 100% rename from drivers/staging/media/phy-rockchip-dphy-rx0/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml rename to Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml -- GitLab From 9f984cacf4f4d53fd8a3f44d7f13528b81c1f6a8 Mon Sep 17 00:00:00 2001 From: Brad Love Date: Thu, 14 May 2020 18:40:43 +0200 Subject: [PATCH 495/503] media: dvbdev: Fix tuner->demod media controller link Fixes bug exposed by: [a3fbc2e6bb0: media: mc-entity.c: use WARN_ON, validate link pads] The dvbdev incorrectly requests a tuner sink pad to connect to a demux sink pad. The media controller failure percolates back and the dvb device creation fails. Fix this by requesting a tuner source pad. Instead of forcing that pad to be index zero, check if a negative integer error is returned. A note is added that first source pad found is chosen. Affected bridges cx231xx and em28xx printed the below warning[s] when a variety of media controller dvb enabled devices were connected. The warning returns an error causing all affected devices to fail DVB device creation. [ 253.138332] ------------[ cut here ]------------ [ 253.138339] WARNING: CPU: 0 PID: 1550 at drivers/media/mc/mc-entity.c:669 media_create_pad_link+0x1e0/0x200 [mc] [ 253.138339] Modules linked in: si2168 em28xx_dvb(+) em28xx si2157 lgdt3306a cx231xx_dvb dvb_core cx231xx_alsa cx25840 cx231xx tveeprom cx2341x i2c_mux videobuf2_vmalloc videobuf2_memops videobuf2_v4l2 videobuf2_common videodev mc ir_rc5_decoder rc_hauppauge mceusb rc_core eda c_mce_amd kvm nls_iso8859_1 crct10dif_pclmul crc32_pclmul ghash_clmulni_intel aesni_intel crypto_simd cryptd glue_helper efi_pstore wmi_bmof k10temp asix usbnet mii nouveau snd_hda_codec_realtek snd_hda_codec_generic input_leds ledtrig_audio snd_hda_codec_hdmi mxm_wmi snd_hda_in tel video snd_intel_dspcfg ttm snd_hda_codec drm_kms_helper snd_hda_core drm snd_hwdep snd_seq_midi snd_seq_midi_event i2c_algo_bit snd_pcm snd_rawmidi fb_sys_fops snd_seq syscopyarea sysfillrect snd_seq_device sysimgblt snd_timer snd soundcore ccp mac_hid sch_fq_codel parport_p c ppdev lp parport ip_tables x_tables autofs4 vfio_pci irqbypass vfio_virqfd vfio_iommu_type1 vfio hid_generic usbhid hid i2c_piix4 ahci libahci wmi gpio_amdpt [ 253.138370] gpio_generic [ 253.138372] CPU: 0 PID: 1550 Comm: modprobe Tainted: G W 5.7.0-rc2+ #181 [ 253.138373] Hardware name: MSI MS-7A39/B350M GAMING PRO (MS-7A39), BIOS 2.G0 04/27/2018 [ 253.138376] RIP: 0010:media_create_pad_link+0x1e0/0x200 [mc] [ 253.138378] Code: 26 fd ff ff 44 8b 4d d0 eb d9 0f 0b 41 b9 ea ff ff ff 44 89 c8 c3 0f 0b 41 b9 ea ff ff ff eb f2 0f 0b 41 b9 ea ff ff ff eb e8 <0f> 0b 41 b9 ea ff ff ff eb af 0f 0b 41 b9 ea ff ff ff eb a5 66 90 [ 253.138379] RSP: 0018:ffffb9ecc0ee7a78 EFLAGS: 00010246 [ 253.138380] RAX: ffff943f706c99d8 RBX: 0000000000000000 RCX: 0000000000000000 [ 253.138381] RDX: ffff943f613e0180 RSI: 0000000000000000 RDI: ffff943f706c9958 [ 253.138381] RBP: ffffb9ecc0ee7ab0 R08: 0000000000000001 R09: ffff943f613e0180 [ 253.138382] R10: ffff943f613e0180 R11: ffff943f706c9400 R12: 0000000000000000 [ 253.138383] R13: 0000000000000001 R14: ffff943f706c9958 R15: 0000000000000001 [ 253.138384] FS: 00007f3cd29ba540(0000) GS:ffff943f8ec00000(0000) knlGS:0000000000000000 [ 253.138385] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 253.138385] CR2: 000055f7de0ca830 CR3: 00000003dd208000 CR4: 00000000003406f0 [ 253.138386] Call Trace: [ 253.138392] media_create_pad_links+0x104/0x1b0 [mc] [ 253.138397] dvb_create_media_graph+0x350/0x5f0 [dvb_core] [ 253.138402] em28xx_dvb_init+0x5ea/0x2600 [em28xx_dvb] [ 253.138408] em28xx_register_extension+0x63/0xc0 [em28xx] [ 253.138410] ? 0xffffffffc039c000 [ 253.138412] em28xx_dvb_register+0x15/0x1000 [em28xx_dvb] [ 253.138416] do_one_initcall+0x71/0x250 [ 253.138418] ? do_init_module+0x27/0x22e [ 253.138421] ? _cond_resched+0x1a/0x50 [ 253.138423] ? kmem_cache_alloc_trace+0x1ec/0x270 [ 253.138425] ? __vunmap+0x1e3/0x240 [ 253.138427] do_init_module+0x5f/0x22e [ 253.138430] load_module+0x2525/0x2d40 [ 253.138436] __do_sys_finit_module+0xe5/0x120 [ 253.138438] ? __do_sys_finit_module+0xe5/0x120 [ 253.138442] __x64_sys_finit_module+0x1a/0x20 [ 253.138443] do_syscall_64+0x57/0x1b0 [ 253.138445] entry_SYSCALL_64_after_hwframe+0x44/0xa9 [ 253.138446] RIP: 0033:0x7f3cd24dc839 [ 253.138448] Code: 00 f3 c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 40 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 1f f6 2c 00 f7 d8 64 89 01 48 [ 253.138449] RSP: 002b:00007ffe4fc514d8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 [ 253.138450] RAX: ffffffffffffffda RBX: 000055a9237f63f0 RCX: 00007f3cd24dc839 [ 253.138451] RDX: 0000000000000000 RSI: 000055a922c3ad2e RDI: 0000000000000000 [ 253.138451] RBP: 000055a922c3ad2e R08: 0000000000000000 R09: 0000000000000000 [ 253.138452] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000 [ 253.138453] R13: 000055a9237f5550 R14: 0000000000040000 R15: 000055a9237f63f0 [ 253.138456] ---[ end trace a60f19c54aa96ec4 ]--- [ 234.915628] ------------[ cut here ]------------ [ 234.915640] WARNING: CPU: 0 PID: 1502 at drivers/media/mc/mc-entity.c:669 media_create_pad_link+0x1e0/0x200 [mc] [ 234.915641] Modules linked in: si2157 lgdt3306a cx231xx_dvb(+) dvb_core cx231xx_alsa cx25840 cx231xx tveeprom cx2341x i2c_mux videobuf2_vmalloc videobuf2_memops videobuf2_v4l2 videobuf2_common videodev mc ir_rc5_decoder rc_hauppauge mceusb rc_core edac_mce_amd kvm nls_iso8859 _1 crct10dif_pclmul crc32_pclmul ghash_clmulni_intel aesni_intel crypto_simd cryptd glue_helper efi_pstore wmi_bmof k10temp asix usbnet mii nouveau snd_hda_codec_realtek snd_hda_codec_generic input_leds ledtrig_audio snd_hda_codec_hdmi mxm_wmi snd_hda_intel video snd_intel_dspcf g ttm snd_hda_codec drm_kms_helper snd_hda_core drm snd_hwdep snd_seq_midi snd_seq_midi_event i2c_algo_bit snd_pcm snd_rawmidi fb_sys_fops snd_seq syscopyarea sysfillrect snd_seq_device sysimgblt snd_timer snd soundcore ccp mac_hid sch_fq_codel parport_pc ppdev lp parport ip_tab les x_tables autofs4 vfio_pci irqbypass vfio_virqfd vfio_iommu_type1 vfio hid_generic usbhid hid i2c_piix4 ahci libahci wmi gpio_amdpt gpio_generic [ 234.915700] CPU: 0 PID: 1502 Comm: modprobe Not tainted 5.7.0-rc2+ #181 [ 234.915702] Hardware name: MSI MS-7A39/B350M GAMING PRO (MS-7A39), BIOS 2.G0 04/27/2018 [ 234.915709] RIP: 0010:media_create_pad_link+0x1e0/0x200 [mc] [ 234.915712] Code: 26 fd ff ff 44 8b 4d d0 eb d9 0f 0b 41 b9 ea ff ff ff 44 89 c8 c3 0f 0b 41 b9 ea ff ff ff eb f2 0f 0b 41 b9 ea ff ff ff eb e8 <0f> 0b 41 b9 ea ff ff ff eb af 0f 0b 41 b9 ea ff ff ff eb a5 66 90 [ 234.915714] RSP: 0018:ffffb9ecc1b6fa50 EFLAGS: 00010246 [ 234.915717] RAX: ffff943f8c94a9d8 RBX: 0000000000000000 RCX: 0000000000000000 [ 234.915719] RDX: ffff943f613e0900 RSI: 0000000000000000 RDI: ffff943f8c94a958 [ 234.915721] RBP: ffffb9ecc1b6fa88 R08: 0000000000000001 R09: ffff943f613e0900 [ 234.915723] R10: ffff943f613e0900 R11: ffff943f6b590c00 R12: 0000000000000000 [ 234.915724] R13: 0000000000000001 R14: ffff943f8c94a958 R15: 0000000000000001 [ 234.915727] FS: 00007f4ca3646540(0000) GS:ffff943f8ec00000(0000) knlGS:0000000000000000 [ 234.915729] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 234.915731] CR2: 00007fff7a53ba18 CR3: 00000003da614000 CR4: 00000000003406f0 [ 234.915733] Call Trace: [ 234.915745] media_create_pad_links+0x104/0x1b0 [mc] [ 234.915756] dvb_create_media_graph+0x350/0x5f0 [dvb_core] [ 234.915766] dvb_init.part.4+0x691/0x1360 [cx231xx_dvb] [ 234.915780] dvb_init+0x1a/0x20 [cx231xx_dvb] [ 234.915787] cx231xx_register_extension+0x71/0xa0 [cx231xx] [ 234.915791] ? 0xffffffffc042f000 [ 234.915796] cx231xx_dvb_register+0x15/0x1000 [cx231xx_dvb] [ 234.915802] do_one_initcall+0x71/0x250 [ 234.915807] ? do_init_module+0x27/0x22e [ 234.915811] ? _cond_resched+0x1a/0x50 [ 234.915816] ? kmem_cache_alloc_trace+0x1ec/0x270 [ 234.915820] ? __vunmap+0x1e3/0x240 [ 234.915826] do_init_module+0x5f/0x22e [ 234.915831] load_module+0x2525/0x2d40 [ 234.915848] __do_sys_finit_module+0xe5/0x120 [ 234.915850] ? __do_sys_finit_module+0xe5/0x120 [ 234.915862] __x64_sys_finit_module+0x1a/0x20 [ 234.915865] do_syscall_64+0x57/0x1b0 [ 234.915870] entry_SYSCALL_64_after_hwframe+0x44/0xa9 [ 234.915872] RIP: 0033:0x7f4ca3168839 [ 234.915876] Code: 00 f3 c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 40 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 1f f6 2c 00 f7 d8 64 89 01 48 [ 234.915878] RSP: 002b:00007ffcea3db3b8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 [ 234.915881] RAX: ffffffffffffffda RBX: 000055af22c29340 RCX: 00007f4ca3168839 [ 234.915882] RDX: 0000000000000000 RSI: 000055af22c38390 RDI: 0000000000000001 [ 234.915884] RBP: 000055af22c38390 R08: 0000000000000000 R09: 0000000000000000 [ 234.915885] R10: 0000000000000001 R11: 0000000000000246 R12: 0000000000000000 [ 234.915887] R13: 000055af22c29060 R14: 0000000000040000 R15: 0000000000000000 [ 234.915896] ---[ end trace a60f19c54aa96ec3 ]--- Signed-off-by: Brad Love Reviewed-by: Laurent Pinchart Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb-core/dvbdev.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/dvb-core/dvbdev.c b/drivers/media/dvb-core/dvbdev.c index 80b6a71aa33e4..959fa28202597 100644 --- a/drivers/media/dvb-core/dvbdev.c +++ b/drivers/media/dvb-core/dvbdev.c @@ -707,9 +707,10 @@ int dvb_create_media_graph(struct dvb_adapter *adap, } if (ntuner && ndemod) { - pad_source = media_get_pad_index(tuner, true, + /* NOTE: first found tuner source pad presumed correct */ + pad_source = media_get_pad_index(tuner, false, PAD_SIGNAL_ANALOG); - if (pad_source) + if (pad_source < 0) return -EINVAL; ret = media_create_pad_links(mdev, MEDIA_ENT_F_TUNER, -- GitLab From 528b1a1ab244d9fc130f8f3899b79cea8bd760dc Mon Sep 17 00:00:00 2001 From: Dirk Nehring Date: Mon, 11 May 2020 10:29:53 +0200 Subject: [PATCH 496/503] media: dvb-usb: Add Cinergy S2 PCIe Dual Port support Terratec Cinergy S2 PCIe Dual is a PCIe device with two tuners that actually contains two USB devices. The devices are visible in the lsusb printout. Bus 004 Device 002: ID 153b:1182 TerraTec Electronic GmbH Cinergy S2 PCIe Dual Port 2 Bus 003 Device 002: ID 153b:1181 TerraTec Electronic GmbH Cinergy S2 PCIe Dual Port 1 The devices use the Montage M88DS3000/M88TS2022 demod/tuner. Signed-off-by: Dirk Nehring Signed-off-by: Sean Young Signed-off-by: Mauro Carvalho Chehab --- drivers/media/usb/dvb-usb/dw2102.c | 25 +++++++++++++++++++++---- include/media/dvb-usb-ids.h | 3 +++ 2 files changed, 24 insertions(+), 4 deletions(-) diff --git a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c index f6d2d2398db6e..f96626fe2c0b7 100644 --- a/drivers/media/usb/dvb-usb/dw2102.c +++ b/drivers/media/usb/dvb-usb/dw2102.c @@ -1779,6 +1779,8 @@ enum dw2102_table_entry { TERRATEC_CINERGY_S2_R2, TERRATEC_CINERGY_S2_R3, TERRATEC_CINERGY_S2_R4, + TERRATEC_CINERGY_S2_1, + TERRATEC_CINERGY_S2_2, GOTVIEW_SAT_HD, GENIATECH_T220, TECHNOTREND_S2_4600, @@ -1806,9 +1808,16 @@ static struct usb_device_id dw2102_table[] = { [X3M_SPC1400HD] = {USB_DEVICE(0x1f4d, 0x3100)}, [TEVII_S421] = {USB_DEVICE(0x9022, USB_PID_TEVII_S421)}, [TEVII_S632] = {USB_DEVICE(0x9022, USB_PID_TEVII_S632)}, - [TERRATEC_CINERGY_S2_R2] = {USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_S2_R2)}, - [TERRATEC_CINERGY_S2_R3] = {USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_S2_R3)}, - [TERRATEC_CINERGY_S2_R4] = {USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_S2_R4)}, + [TERRATEC_CINERGY_S2_R2] = {USB_DEVICE(USB_VID_TERRATEC, + USB_PID_TERRATEC_CINERGY_S2_R2)}, + [TERRATEC_CINERGY_S2_R3] = {USB_DEVICE(USB_VID_TERRATEC, + USB_PID_TERRATEC_CINERGY_S2_R3)}, + [TERRATEC_CINERGY_S2_R4] = {USB_DEVICE(USB_VID_TERRATEC, + USB_PID_TERRATEC_CINERGY_S2_R4)}, + [TERRATEC_CINERGY_S2_1] = {USB_DEVICE(USB_VID_TERRATEC_2, + USB_PID_TERRATEC_CINERGY_S2_1)}, + [TERRATEC_CINERGY_S2_2] = {USB_DEVICE(USB_VID_TERRATEC_2, + USB_PID_TERRATEC_CINERGY_S2_2)}, [GOTVIEW_SAT_HD] = {USB_DEVICE(0x1FE1, USB_PID_GOTVIEW_SAT_HD)}, [GENIATECH_T220] = {USB_DEVICE(0x1f4d, 0xD220)}, [TECHNOTREND_S2_4600] = {USB_DEVICE(USB_VID_TECHNOTREND, @@ -2221,7 +2230,7 @@ static struct dvb_usb_device_properties su3000_properties = { }}, } }, - .num_device_descs = 6, + .num_device_descs = 8, .devices = { { "SU3000HD DVB-S USB2.0", { &dw2102_table[GENIATECH_SU3000], NULL }, @@ -2243,6 +2252,14 @@ static struct dvb_usb_device_properties su3000_properties = { { &dw2102_table[TERRATEC_CINERGY_S2_R3], NULL }, { NULL }, }, + { "Terratec Cinergy S2 PCIe Dual Port 1", + { &dw2102_table[TERRATEC_CINERGY_S2_1], NULL }, + { NULL }, + }, + { "Terratec Cinergy S2 PCIe Dual Port 2", + { &dw2102_table[TERRATEC_CINERGY_S2_2], NULL }, + { NULL }, + }, { "GOTVIEW Satellite HD", { &dw2102_table[GOTVIEW_SAT_HD], NULL }, { NULL }, diff --git a/include/media/dvb-usb-ids.h b/include/media/dvb-usb-ids.h index 41f0bf122f536..d37cb74b769c3 100644 --- a/include/media/dvb-usb-ids.h +++ b/include/media/dvb-usb-ids.h @@ -56,6 +56,7 @@ #define USB_VID_REALTEK 0x0bda #define USB_VID_TECHNOTREND 0x0b48 #define USB_VID_TERRATEC 0x0ccd +#define USB_VID_TERRATEC_2 0x153b #define USB_VID_TELESTAR 0x10b9 #define USB_VID_VISIONPLUS 0x13d3 #define USB_VID_SONY 0x1415 @@ -280,6 +281,8 @@ #define USB_PID_TERRATEC_CINERGY_S2_R2 0x00b0 #define USB_PID_TERRATEC_CINERGY_S2_R3 0x0102 #define USB_PID_TERRATEC_CINERGY_S2_R4 0x0105 +#define USB_PID_TERRATEC_CINERGY_S2_1 0x1181 +#define USB_PID_TERRATEC_CINERGY_S2_2 0x1182 #define USB_PID_TERRATEC_H7 0x10b4 #define USB_PID_TERRATEC_H7_2 0x10a3 #define USB_PID_TERRATEC_H7_3 0x10a5 -- GitLab From 932300e6c3e0ce80d7fb275ce32a93db41e90546 Mon Sep 17 00:00:00 2001 From: Dongchun Zhu Date: Mon, 11 May 2020 13:03:48 +0200 Subject: [PATCH 497/503] media: dt-bindings: ov8856: Document YAML bindings This patch adds documentation of device tree in YAML schema for the OV8856 CMOS image sensor. Signed-off-by: Dongchun Zhu Signed-off-by: Robert Foss Reviewed-by: Maxime Ripard Reviewed-by: Rob Herring Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- .../devicetree/bindings/media/i2c/ov8856.yaml | 142 ++++++++++++++++++ MAINTAINERS | 3 +- 2 files changed, 144 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/media/i2c/ov8856.yaml diff --git a/Documentation/devicetree/bindings/media/i2c/ov8856.yaml b/Documentation/devicetree/bindings/media/i2c/ov8856.yaml new file mode 100644 index 0000000000000..d6af685ad3cad --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ov8856.yaml @@ -0,0 +1,142 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2019 MediaTek Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ov8856.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Omnivision OV8856 CMOS Sensor Device Tree Bindings + +maintainers: + - Dongchun Zhu + +description: |- + The Omnivision OV8856 is a high performance, 1/4-inch, 8 megapixel, CMOS + image sensor that delivers 3264x2448 at 30fps. It provides full-frame, + sub-sampled, and windowed 10-bit MIPI images in various formats via the + Serial Camera Control Bus (SCCB) interface. This chip is programmable + through I2C and two-wire SCCB. The sensor output is available via CSI-2 + serial data output (up to 4-lane). + +properties: + compatible: + const: ovti,ov8856 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + description: + Input clock for the sensor. + items: + - const: xvclk + + clock-frequency: + description: + Frequency of the xvclk clock in Hertz. + + dovdd-supply: + description: + Definition of the regulator used as interface power supply. + + avdd-supply: + description: + Definition of the regulator used as analog power supply. + + dvdd-supply: + description: + Definition of the regulator used as digital power supply. + + reset-gpios: + description: + The phandle and specifier for the GPIO that controls sensor reset. + This corresponds to the hardware pin XSHUTDOWN which is physically + active low. + + port: + type: object + additionalProperties: false + description: + A node containing an output port node with an endpoint definition + as documented in + Documentation/devicetree/bindings/media/video-interfaces.txt + + properties: + endpoint: + type: object + + properties: + data-lanes: + description: |- + The driver only supports four-lane operation. + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + link-frequencies: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint64-array + description: + Allowed data bus frequencies. 360000000, 180000000 Hz or both + are supported by the driver. + + + required: + - link-frequencies + + required: + - endpoint + +required: + - compatible + - reg + - clocks + - clock-names + - clock-frequency + - dovdd-supply + - avdd-supply + - dvdd-supply + - reset-gpios + - port + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ov8856: camera@10 { + compatible = "ovti,ov8856"; + reg = <0x10>; + + reset-gpios = <&pio 111 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&clk_24m_cam>; + + clocks = <&cam_osc>; + clock-names = "xvclk"; + clock-frequency = <19200000>; + + avdd-supply = <&mt6358_vcama2_reg>; + dvdd-supply = <&mt6358_vcamd_reg>; + dovdd-supply = <&mt6358_vcamio_reg>; + + port { + wcam_out: endpoint { + remote-endpoint = <&mipi_in_wcam>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <360000000>; + }; + }; + }; + }; +... \ No newline at end of file diff --git a/MAINTAINERS b/MAINTAINERS index 552e82f9adc0c..f692a5841448d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12485,10 +12485,11 @@ F: Documentation/devicetree/bindings/media/i2c/ov7740.txt F: drivers/media/i2c/ov7740.c OMNIVISION OV8856 SENSOR DRIVER -M: Ben Kao +M: Dongchun Zhu L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media_tree.git +F: Documentation/devicetree/bindings/media/i2c/ov8856.yaml F: drivers/media/i2c/ov8856.c OMNIVISION OV9640 SENSOR DRIVER -- GitLab From 0c2c7a1e0d69221b9d489bfd8cf53262d6f82446 Mon Sep 17 00:00:00 2001 From: Robert Foss Date: Mon, 11 May 2020 13:03:49 +0200 Subject: [PATCH 498/503] media: ov8856: Add devicetree support Add match table, enable ov8856_probe() to support both ACPI and DT modes. ACPI and DT modes are primarily distinguished from by checking for ACPI mode and by having resource like be NULL. Signed-off-by: Robert Foss Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/ov8856.c | 138 +++++++++++++++++++++++++++++++++---- 1 file changed, 124 insertions(+), 14 deletions(-) diff --git a/drivers/media/i2c/ov8856.c b/drivers/media/i2c/ov8856.c index 8655842af2755..efc3e231c9b76 100644 --- a/drivers/media/i2c/ov8856.c +++ b/drivers/media/i2c/ov8856.c @@ -3,10 +3,13 @@ #include #include +#include #include +#include #include #include #include +#include #include #include #include @@ -18,7 +21,7 @@ #define OV8856_LINK_FREQ_360MHZ 360000000ULL #define OV8856_LINK_FREQ_180MHZ 180000000ULL #define OV8856_SCLK 144000000ULL -#define OV8856_MCLK 19200000 +#define OV8856_XVCLK_19_2 19200000 #define OV8856_DATA_LANES 4 #define OV8856_RGB_DEPTH 10 @@ -64,6 +67,12 @@ #define to_ov8856(_sd) container_of(_sd, struct ov8856, sd) +static const char * const ov8856_supply_names[] = { + "dovdd", /* Digital I/O power */ + "avdd", /* Analog power */ + "dvdd", /* Digital core power */ +}; + enum { OV8856_LINK_FREQ_720MBPS, OV8856_LINK_FREQ_360MBPS, @@ -566,6 +575,10 @@ struct ov8856 { struct media_pad pad; struct v4l2_ctrl_handler ctrl_handler; + struct clk *xvclk; + struct gpio_desc *reset_gpio; + struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)]; + /* V4L2 Controls */ struct v4l2_ctrl *link_freq; struct v4l2_ctrl *pixel_rate; @@ -908,6 +921,57 @@ static int ov8856_set_stream(struct v4l2_subdev *sd, int enable) return ret; } +static int __ov8856_power_on(struct ov8856 *ov8856) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); + int ret; + + if (is_acpi_node(dev_fwnode(&client->dev))) + return 0; + + ret = clk_prepare_enable(ov8856->xvclk); + if (ret < 0) { + dev_err(&client->dev, "failed to enable xvclk\n"); + return ret; + } + + if (ov8856->reset_gpio) { + gpiod_set_value_cansleep(ov8856->reset_gpio, 1); + usleep_range(1000, 2000); + } + + ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names), + ov8856->supplies); + if (ret < 0) { + dev_err(&client->dev, "failed to enable regulators\n"); + goto disable_clk; + } + + gpiod_set_value_cansleep(ov8856->reset_gpio, 0); + usleep_range(1500, 1800); + + return 0; + +disable_clk: + gpiod_set_value_cansleep(ov8856->reset_gpio, 1); + clk_disable_unprepare(ov8856->xvclk); + + return ret; +} + +static void __ov8856_power_off(struct ov8856 *ov8856) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); + + if (is_acpi_node(dev_fwnode(&client->dev))) + return; + + gpiod_set_value_cansleep(ov8856->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names), + ov8856->supplies); + clk_disable_unprepare(ov8856->xvclk); +} + static int __maybe_unused ov8856_suspend(struct device *dev) { struct i2c_client *client = to_i2c_client(dev); @@ -918,6 +982,7 @@ static int __maybe_unused ov8856_suspend(struct device *dev) if (ov8856->streaming) ov8856_stop_streaming(ov8856); + __ov8856_power_off(ov8856); mutex_unlock(&ov8856->mutex); return 0; @@ -931,6 +996,8 @@ static int __maybe_unused ov8856_resume(struct device *dev) int ret; mutex_lock(&ov8856->mutex); + + __ov8856_power_on(ov8856); if (ov8856->streaming) { ret = ov8856_start_streaming(ov8856); if (ret) { @@ -1092,29 +1159,53 @@ static int ov8856_identify_module(struct ov8856 *ov8856) return 0; } -static int ov8856_check_hwcfg(struct device *dev) +static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev) { struct fwnode_handle *ep; struct fwnode_handle *fwnode = dev_fwnode(dev); struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = V4L2_MBUS_CSI2_DPHY }; - u32 mclk; + u32 xvclk_rate; int ret; unsigned int i, j; if (!fwnode) return -ENXIO; - ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); + ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate); if (ret) return ret; - if (mclk != OV8856_MCLK) { - dev_err(dev, "external clock %d is not supported", mclk); - return -EINVAL; + if (!is_acpi_node(fwnode)) { + ov8856->xvclk = devm_clk_get(dev, "xvclk"); + if (IS_ERR(ov8856->xvclk)) { + dev_err(dev, "could not get xvclk clock (%pe)\n", + ov8856->xvclk); + return PTR_ERR(ov8856->xvclk); + } + + clk_set_rate(ov8856->xvclk, xvclk_rate); + xvclk_rate = clk_get_rate(ov8856->xvclk); } + if (xvclk_rate != OV8856_XVCLK_19_2) + dev_warn(dev, "external clock rate %u is unsupported", + xvclk_rate); + + ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_LOW); + if (IS_ERR(ov8856->reset_gpio)) + return PTR_ERR(ov8856->reset_gpio); + + for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++) + ov8856->supplies[i].supply = ov8856_supply_names[i]; + + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ov8856_supply_names), + ov8856->supplies); + if (ret) + return ret; + ep = fwnode_graph_get_next_endpoint(fwnode, NULL); if (!ep) return -ENXIO; @@ -1169,6 +1260,8 @@ static int ov8856_remove(struct i2c_client *client) pm_runtime_disable(&client->dev); mutex_destroy(&ov8856->mutex); + __ov8856_power_off(ov8856); + return 0; } @@ -1177,22 +1270,29 @@ static int ov8856_probe(struct i2c_client *client) struct ov8856 *ov8856; int ret; - ret = ov8856_check_hwcfg(&client->dev); + ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL); + if (!ov8856) + return -ENOMEM; + + ret = ov8856_get_hwcfg(ov8856, &client->dev); if (ret) { - dev_err(&client->dev, "failed to check HW configuration: %d", + dev_err(&client->dev, "failed to get HW configuration: %d", ret); return ret; } - ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL); - if (!ov8856) - return -ENOMEM; - v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops); + + ret = __ov8856_power_on(ov8856); + if (ret) { + dev_err(&client->dev, "failed to power on\n"); + return ret; + } + ret = ov8856_identify_module(ov8856); if (ret) { dev_err(&client->dev, "failed to find sensor: %d", ret); - return ret; + goto probe_power_off; } mutex_init(&ov8856->mutex); @@ -1238,6 +1338,9 @@ static int ov8856_probe(struct i2c_client *client) v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler); mutex_destroy(&ov8856->mutex); +probe_power_off: + __ov8856_power_off(ov8856); + return ret; } @@ -1254,11 +1357,18 @@ static const struct acpi_device_id ov8856_acpi_ids[] = { MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids); #endif +static const struct of_device_id ov8856_of_match[] = { + { .compatible = "ovti,ov8856" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ov8856_of_match); + static struct i2c_driver ov8856_i2c_driver = { .driver = { .name = "ov8856", .pm = &ov8856_pm_ops, .acpi_match_table = ACPI_PTR(ov8856_acpi_ids), + .of_match_table = ov8856_of_match, }, .probe_new = ov8856_probe, .remove = ov8856_remove, -- GitLab From 96b5b11aeb6ac859d4a8603a82a35d9250ea460d Mon Sep 17 00:00:00 2001 From: Robert Foss Date: Mon, 11 May 2020 13:03:50 +0200 Subject: [PATCH 499/503] media: ov8856: Implement sensor module revision identification Query the sensor for its module revision, and compare it to known revisions. Currently 2A and 1B revision indentification is supported. [Sakari Ailus: Wrap a line over 80, alignment, use %u for printing u32] Signed-off-by: Robert Foss Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/ov8856.c | 53 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/media/i2c/ov8856.c b/drivers/media/i2c/ov8856.c index efc3e231c9b76..4ca27675cc5a6 100644 --- a/drivers/media/i2c/ov8856.c +++ b/drivers/media/i2c/ov8856.c @@ -32,6 +32,19 @@ #define OV8856_MODE_STANDBY 0x00 #define OV8856_MODE_STREAMING 0x01 +/* module revisions */ +#define OV8856_2A_MODULE 0x01 +#define OV8856_1B_MODULE 0x02 + +/* the OTP read-out buffer is at 0x7000 and 0xf is the offset + * of the byte in the OTP that means the module revision + */ +#define OV8856_MODULE_REVISION 0x700f +#define OV8856_OTP_MODE_CTRL 0x3d84 +#define OV8856_OTP_LOAD_CTRL 0x3d81 +#define OV8856_OTP_MODE_AUTO 0x00 +#define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0) + /* vertical-timings from sensor */ #define OV8856_REG_VTS 0x380e #define OV8856_VTS_MAX 0x7fff @@ -1156,6 +1169,46 @@ static int ov8856_identify_module(struct ov8856 *ov8856) return -ENXIO; } + ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, + OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); + if (ret) + return ret; + + ret = ov8856_write_reg(ov8856, OV8856_OTP_MODE_CTRL, + OV8856_REG_VALUE_08BIT, OV8856_OTP_MODE_AUTO); + if (ret) { + dev_err(&client->dev, "failed to set otp mode"); + return ret; + } + + ret = ov8856_write_reg(ov8856, OV8856_OTP_LOAD_CTRL, + OV8856_REG_VALUE_08BIT, + OV8856_OTP_LOAD_CTRL_ENABLE); + if (ret) { + dev_err(&client->dev, "failed to enable load control"); + return ret; + } + + ret = ov8856_read_reg(ov8856, OV8856_MODULE_REVISION, + OV8856_REG_VALUE_08BIT, &val); + if (ret) { + dev_err(&client->dev, "failed to read module revision"); + return ret; + } + + dev_info(&client->dev, "OV8856 revision %x (%s) at address 0x%02x\n", + val, + val == OV8856_2A_MODULE ? "2A" : + val == OV8856_1B_MODULE ? "1B" : "unknown revision", + client->addr); + + ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, + OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY); + if (ret) { + dev_err(&client->dev, "failed to exit streaming mode"); + return ret; + } + return 0; } -- GitLab From 866edc895171f1256aad3e81dce193447955c202 Mon Sep 17 00:00:00 2001 From: Bingbu Cao Date: Mon, 11 May 2020 15:41:14 +0200 Subject: [PATCH 500/503] media: i2c: Add ov2740 image sensor driver OminiVision ov2740 is a 2 megapixels RAW RGB image sensor which can deliver 1920x1080@60fps frames. This driver add the support of vertical blanking, exposure, test pattern, digital and analog gain control for sensor. Signed-off-by: Bingbu Cao Signed-off-by: Shawn Tu Signed-off-by: Qiu, Tianshu Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 9 + drivers/media/i2c/Kconfig | 13 + drivers/media/i2c/Makefile | 1 + drivers/media/i2c/ov2740.c | 1016 ++++++++++++++++++++++++++++++++++++ 4 files changed, 1039 insertions(+) create mode 100644 drivers/media/i2c/ov2740.c diff --git a/MAINTAINERS b/MAINTAINERS index f692a5841448d..791d2a862e41e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12423,6 +12423,15 @@ S: Maintained T: git git://linuxtv.org/media_tree.git F: drivers/media/i2c/ov2685.c +OMNIVISION OV2740 SENSOR DRIVER +M: Tianshu Qiu +R: Shawn Tu +R: Bingbu Cao +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: drivers/media/i2c/ov2740.c + OMNIVISION OV5640 SENSOR DRIVER M: Steve Longerbeam L: linux-media@vger.kernel.org diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 3abc80373ec05..da11036ad804d 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -857,6 +857,19 @@ config VIDEO_OV2685 To compile this driver as a module, choose M here: the module will be called ov2685. +config VIDEO_OV2740 + tristate "OmniVision OV2740 sensor support" + depends on VIDEO_V4L2 && I2C + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API + select V4L2_FWNODE + help + This is a Video4Linux2 sensor driver for the OmniVision + OV2740 camera. + + To compile this driver as a module, choose M here: the + module will be called ov2740. + config VIDEO_OV5640 tristate "OmniVision OV5640 sensor support" depends on OF diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 77bf7d0b691f4..993acab81b2c3 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile @@ -66,6 +66,7 @@ obj-$(CONFIG_VIDEO_UPD64083) += upd64083.o obj-$(CONFIG_VIDEO_OV2640) += ov2640.o obj-$(CONFIG_VIDEO_OV2680) += ov2680.o obj-$(CONFIG_VIDEO_OV2685) += ov2685.o +obj-$(CONFIG_VIDEO_OV2740) += ov2740.o obj-$(CONFIG_VIDEO_OV5640) += ov5640.o obj-$(CONFIG_VIDEO_OV5645) += ov5645.o obj-$(CONFIG_VIDEO_OV5647) += ov5647.o diff --git a/drivers/media/i2c/ov2740.c b/drivers/media/i2c/ov2740.c new file mode 100644 index 0000000000000..2dd2609db873a --- /dev/null +++ b/drivers/media/i2c/ov2740.c @@ -0,0 +1,1016 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2020 Intel Corporation. + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define OV2740_LINK_FREQ_360MHZ 360000000ULL +#define OV2740_SCLK 72000000LL +#define OV2740_MCLK 19200000 +#define OV2740_DATA_LANES 2 +#define OV2740_RGB_DEPTH 10 + +#define OV2740_REG_CHIP_ID 0x300a +#define OV2740_CHIP_ID 0x2740 + +#define OV2740_REG_MODE_SELECT 0x0100 +#define OV2740_MODE_STANDBY 0x00 +#define OV2740_MODE_STREAMING 0x01 + +/* vertical-timings from sensor */ +#define OV2740_REG_VTS 0x380e +#define OV2740_VTS_DEF 0x088a +#define OV2740_VTS_MIN 0x0460 +#define OV2740_VTS_MAX 0x7fff + +/* horizontal-timings from sensor */ +#define OV2740_REG_HTS 0x380c + +/* Exposure controls from sensor */ +#define OV2740_REG_EXPOSURE 0x3500 +#define OV2740_EXPOSURE_MIN 8 +#define OV2740_EXPOSURE_MAX_MARGIN 8 +#define OV2740_EXPOSURE_STEP 1 + +/* Analog gain controls from sensor */ +#define OV2740_REG_ANALOG_GAIN 0x3508 +#define OV2740_ANAL_GAIN_MIN 128 +#define OV2740_ANAL_GAIN_MAX 1983 +#define OV2740_ANAL_GAIN_STEP 1 + +/* Digital gain controls from sensor */ +#define OV2740_REG_MWB_R_GAIN 0x500a +#define OV2740_REG_MWB_G_GAIN 0x500c +#define OV2740_REG_MWB_B_GAIN 0x500e +#define OV2740_DGTL_GAIN_MIN 0 +#define OV2740_DGTL_GAIN_MAX 4095 +#define OV2740_DGTL_GAIN_STEP 1 +#define OV2740_DGTL_GAIN_DEFAULT 1024 + +/* Test Pattern Control */ +#define OV2740_REG_TEST_PATTERN 0x5040 +#define OV2740_TEST_PATTERN_ENABLE BIT(7) +#define OV2740_TEST_PATTERN_BAR_SHIFT 2 + +enum { + OV2740_LINK_FREQ_360MHZ_INDEX, +}; + +struct ov2740_reg { + u16 address; + u8 val; +}; + +struct ov2740_reg_list { + u32 num_of_regs; + const struct ov2740_reg *regs; +}; + +struct ov2740_link_freq_config { + const struct ov2740_reg_list reg_list; +}; + +struct ov2740_mode { + /* Frame width in pixels */ + u32 width; + + /* Frame height in pixels */ + u32 height; + + /* Horizontal timining size */ + u32 hts; + + /* Default vertical timining size */ + u32 vts_def; + + /* Min vertical timining size */ + u32 vts_min; + + /* Link frequency needed for this resolution */ + u32 link_freq_index; + + /* Sensor register settings for this resolution */ + const struct ov2740_reg_list reg_list; +}; + +static const struct ov2740_reg mipi_data_rate_720mbps[] = { + {0x0103, 0x01}, + {0x0302, 0x4b}, + {0x030d, 0x4b}, + {0x030e, 0x02}, + {0x030a, 0x01}, + {0x0312, 0x11}, +}; + +static const struct ov2740_reg mode_1932x1092_regs[] = { + {0x3000, 0x00}, + {0x3018, 0x32}, + {0x3031, 0x0a}, + {0x3080, 0x08}, + {0x3083, 0xB4}, + {0x3103, 0x00}, + {0x3104, 0x01}, + {0x3106, 0x01}, + {0x3500, 0x00}, + {0x3501, 0x44}, + {0x3502, 0x40}, + {0x3503, 0x88}, + {0x3507, 0x00}, + {0x3508, 0x00}, + {0x3509, 0x80}, + {0x350c, 0x00}, + {0x350d, 0x80}, + {0x3510, 0x00}, + {0x3511, 0x00}, + {0x3512, 0x20}, + {0x3632, 0x00}, + {0x3633, 0x10}, + {0x3634, 0x10}, + {0x3635, 0x10}, + {0x3645, 0x13}, + {0x3646, 0x81}, + {0x3636, 0x10}, + {0x3651, 0x0a}, + {0x3656, 0x02}, + {0x3659, 0x04}, + {0x365a, 0xda}, + {0x365b, 0xa2}, + {0x365c, 0x04}, + {0x365d, 0x1d}, + {0x365e, 0x1a}, + {0x3662, 0xd7}, + {0x3667, 0x78}, + {0x3669, 0x0a}, + {0x366a, 0x92}, + {0x3700, 0x54}, + {0x3702, 0x10}, + {0x3706, 0x42}, + {0x3709, 0x30}, + {0x370b, 0xc2}, + {0x3714, 0x63}, + {0x3715, 0x01}, + {0x3716, 0x00}, + {0x371a, 0x3e}, + {0x3732, 0x0e}, + {0x3733, 0x10}, + {0x375f, 0x0e}, + {0x3768, 0x30}, + {0x3769, 0x44}, + {0x376a, 0x22}, + {0x377b, 0x20}, + {0x377c, 0x00}, + {0x377d, 0x0c}, + {0x3798, 0x00}, + {0x37a1, 0x55}, + {0x37a8, 0x6d}, + {0x37c2, 0x04}, + {0x37c5, 0x00}, + {0x37c8, 0x00}, + {0x3800, 0x00}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x00}, + {0x3804, 0x07}, + {0x3805, 0x8f}, + {0x3806, 0x04}, + {0x3807, 0x47}, + {0x3808, 0x07}, + {0x3809, 0x88}, + {0x380a, 0x04}, + {0x380b, 0x40}, + {0x380c, 0x04}, + {0x380d, 0x38}, + {0x380e, 0x04}, + {0x380f, 0x60}, + {0x3810, 0x00}, + {0x3811, 0x04}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3814, 0x01}, + {0x3815, 0x01}, + {0x3820, 0x80}, + {0x3821, 0x46}, + {0x3822, 0x84}, + {0x3829, 0x00}, + {0x382a, 0x01}, + {0x382b, 0x01}, + {0x3830, 0x04}, + {0x3836, 0x01}, + {0x3837, 0x08}, + {0x3839, 0x01}, + {0x383a, 0x00}, + {0x383b, 0x08}, + {0x383c, 0x00}, + {0x3f0b, 0x00}, + {0x4001, 0x20}, + {0x4009, 0x07}, + {0x4003, 0x10}, + {0x4010, 0xe0}, + {0x4016, 0x00}, + {0x4017, 0x10}, + {0x4044, 0x02}, + {0x4304, 0x08}, + {0x4307, 0x30}, + {0x4320, 0x80}, + {0x4322, 0x00}, + {0x4323, 0x00}, + {0x4324, 0x00}, + {0x4325, 0x00}, + {0x4326, 0x00}, + {0x4327, 0x00}, + {0x4328, 0x00}, + {0x4329, 0x00}, + {0x432c, 0x03}, + {0x432d, 0x81}, + {0x4501, 0x84}, + {0x4502, 0x40}, + {0x4503, 0x18}, + {0x4504, 0x04}, + {0x4508, 0x02}, + {0x4601, 0x10}, + {0x4800, 0x00}, + {0x4816, 0x52}, + {0x4837, 0x16}, + {0x5000, 0x7f}, + {0x5001, 0x00}, + {0x5005, 0x38}, + {0x501e, 0x0d}, + {0x5040, 0x00}, + {0x5901, 0x00}, + {0x3800, 0x00}, + {0x3801, 0x00}, + {0x3802, 0x00}, + {0x3803, 0x00}, + {0x3804, 0x07}, + {0x3805, 0x8f}, + {0x3806, 0x04}, + {0x3807, 0x47}, + {0x3808, 0x07}, + {0x3809, 0x8c}, + {0x380a, 0x04}, + {0x380b, 0x44}, + {0x3810, 0x00}, + {0x3811, 0x00}, + {0x3812, 0x00}, + {0x3813, 0x01}, +}; + +static const char * const ov2740_test_pattern_menu[] = { + "Disabled", + "Color Bar", + "Top-Bottom Darker Color Bar", + "Right-Left Darker Color Bar", + "Bottom-Top Darker Color Bar", +}; + +static const s64 link_freq_menu_items[] = { + OV2740_LINK_FREQ_360MHZ, +}; + +static const struct ov2740_link_freq_config link_freq_configs[] = { + [OV2740_LINK_FREQ_360MHZ_INDEX] = { + .reg_list = { + .num_of_regs = ARRAY_SIZE(mipi_data_rate_720mbps), + .regs = mipi_data_rate_720mbps, + } + }, +}; + +static const struct ov2740_mode supported_modes[] = { + { + .width = 1932, + .height = 1092, + .hts = 1080, + .vts_def = OV2740_VTS_DEF, + .vts_min = OV2740_VTS_MIN, + .reg_list = { + .num_of_regs = ARRAY_SIZE(mode_1932x1092_regs), + .regs = mode_1932x1092_regs, + }, + .link_freq_index = OV2740_LINK_FREQ_360MHZ_INDEX, + }, +}; + +struct ov2740 { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_ctrl_handler ctrl_handler; + + /* V4L2 Controls */ + struct v4l2_ctrl *link_freq; + struct v4l2_ctrl *pixel_rate; + struct v4l2_ctrl *vblank; + struct v4l2_ctrl *hblank; + struct v4l2_ctrl *exposure; + + /* Current mode */ + const struct ov2740_mode *cur_mode; + + /* To serialize asynchronus callbacks */ + struct mutex mutex; + + /* Streaming on/off */ + bool streaming; +}; + +static inline struct ov2740 *to_ov2740(struct v4l2_subdev *subdev) +{ + return container_of(subdev, struct ov2740, sd); +} + +static u64 to_pixel_rate(u32 f_index) +{ + u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV2740_DATA_LANES; + + do_div(pixel_rate, OV2740_RGB_DEPTH); + + return pixel_rate; +} + +static u64 to_pixels_per_line(u32 hts, u32 f_index) +{ + u64 ppl = hts * to_pixel_rate(f_index); + + do_div(ppl, OV2740_SCLK); + + return ppl; +} + +static int ov2740_read_reg(struct ov2740 *ov2740, u16 reg, u16 len, u32 *val) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov2740->sd); + struct i2c_msg msgs[2]; + u8 addr_buf[2]; + u8 data_buf[4] = {0}; + int ret = 0; + + if (len > sizeof(data_buf)) + return -EINVAL; + + put_unaligned_be16(reg, addr_buf); + msgs[0].addr = client->addr; + msgs[0].flags = 0; + msgs[0].len = sizeof(addr_buf); + msgs[0].buf = addr_buf; + msgs[1].addr = client->addr; + msgs[1].flags = I2C_M_RD; + msgs[1].len = len; + msgs[1].buf = &data_buf[sizeof(data_buf) - len]; + + ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) + return ret < 0 ? ret : -EIO; + + *val = get_unaligned_be32(data_buf); + + return 0; +} + +static int ov2740_write_reg(struct ov2740 *ov2740, u16 reg, u16 len, u32 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov2740->sd); + u8 buf[6]; + int ret = 0; + + if (len > 4) + return -EINVAL; + + put_unaligned_be16(reg, buf); + put_unaligned_be32(val << 8 * (4 - len), buf + 2); + + ret = i2c_master_send(client, buf, len + 2); + if (ret != len + 2) + return ret < 0 ? ret : -EIO; + + return 0; +} + +static int ov2740_write_reg_list(struct ov2740 *ov2740, + const struct ov2740_reg_list *r_list) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov2740->sd); + unsigned int i; + int ret = 0; + + for (i = 0; i < r_list->num_of_regs; i++) { + ret = ov2740_write_reg(ov2740, r_list->regs[i].address, 1, + r_list->regs[i].val); + if (ret) { + dev_err_ratelimited(&client->dev, + "write reg 0x%4.4x return err = %d", + r_list->regs[i].address, ret); + return ret; + } + } + + return 0; +} + +static int ov2740_update_digital_gain(struct ov2740 *ov2740, u32 d_gain) +{ + int ret = 0; + + ret = ov2740_write_reg(ov2740, OV2740_REG_MWB_R_GAIN, 2, d_gain); + if (ret) + return ret; + + ret = ov2740_write_reg(ov2740, OV2740_REG_MWB_G_GAIN, 2, d_gain); + if (ret) + return ret; + + return ov2740_write_reg(ov2740, OV2740_REG_MWB_B_GAIN, 2, d_gain); +} + +static int ov2740_test_pattern(struct ov2740 *ov2740, u32 pattern) +{ + if (pattern) + pattern = (pattern - 1) << OV2740_TEST_PATTERN_BAR_SHIFT | + OV2740_TEST_PATTERN_ENABLE; + + return ov2740_write_reg(ov2740, OV2740_REG_TEST_PATTERN, 1, pattern); +} + +static int ov2740_set_ctrl(struct v4l2_ctrl *ctrl) +{ + struct ov2740 *ov2740 = container_of(ctrl->handler, + struct ov2740, ctrl_handler); + struct i2c_client *client = v4l2_get_subdevdata(&ov2740->sd); + s64 exposure_max; + int ret = 0; + + /* Propagate change of current control to all related controls */ + if (ctrl->id == V4L2_CID_VBLANK) { + /* Update max exposure while meeting expected vblanking */ + exposure_max = ov2740->cur_mode->height + ctrl->val - + OV2740_EXPOSURE_MAX_MARGIN; + __v4l2_ctrl_modify_range(ov2740->exposure, + ov2740->exposure->minimum, + exposure_max, ov2740->exposure->step, + exposure_max); + } + + /* V4L2 controls values will be applied only when power is already up */ + if (!pm_runtime_get_if_in_use(&client->dev)) + return 0; + + switch (ctrl->id) { + case V4L2_CID_ANALOGUE_GAIN: + ret = ov2740_write_reg(ov2740, OV2740_REG_ANALOG_GAIN, 2, + ctrl->val); + break; + + case V4L2_CID_DIGITAL_GAIN: + ret = ov2740_update_digital_gain(ov2740, ctrl->val); + break; + + case V4L2_CID_EXPOSURE: + /* 4 least significant bits of expsoure are fractional part */ + ret = ov2740_write_reg(ov2740, OV2740_REG_EXPOSURE, 3, + ctrl->val << 4); + break; + + case V4L2_CID_VBLANK: + ret = ov2740_write_reg(ov2740, OV2740_REG_VTS, 2, + ov2740->cur_mode->height + ctrl->val); + break; + + case V4L2_CID_TEST_PATTERN: + ret = ov2740_test_pattern(ov2740, ctrl->val); + break; + + default: + ret = -EINVAL; + break; + } + + pm_runtime_put(&client->dev); + + return ret; +} + +static const struct v4l2_ctrl_ops ov2740_ctrl_ops = { + .s_ctrl = ov2740_set_ctrl, +}; + +static int ov2740_init_controls(struct ov2740 *ov2740) +{ + struct v4l2_ctrl_handler *ctrl_hdlr; + const struct ov2740_mode *cur_mode; + s64 exposure_max, h_blank, pixel_rate; + u32 vblank_min, vblank_max, vblank_default; + int size; + int ret = 0; + + ctrl_hdlr = &ov2740->ctrl_handler; + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); + if (ret) + return ret; + + ctrl_hdlr->lock = &ov2740->mutex; + cur_mode = ov2740->cur_mode; + size = ARRAY_SIZE(link_freq_menu_items); + + ov2740->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov2740_ctrl_ops, + V4L2_CID_LINK_FREQ, + size - 1, 0, + link_freq_menu_items); + if (ov2740->link_freq) + ov2740->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + pixel_rate = to_pixel_rate(OV2740_LINK_FREQ_360MHZ_INDEX); + ov2740->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, + V4L2_CID_PIXEL_RATE, 0, + pixel_rate, 1, pixel_rate); + + vblank_min = cur_mode->vts_min - cur_mode->height; + vblank_max = OV2740_VTS_MAX - cur_mode->height; + vblank_default = cur_mode->vts_def - cur_mode->height; + ov2740->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, + V4L2_CID_VBLANK, vblank_min, + vblank_max, 1, vblank_default); + + h_blank = to_pixels_per_line(cur_mode->hts, cur_mode->link_freq_index); + h_blank -= cur_mode->width; + ov2740->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, + V4L2_CID_HBLANK, h_blank, h_blank, 1, + h_blank); + if (ov2740->hblank) + ov2740->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, + OV2740_ANAL_GAIN_MIN, OV2740_ANAL_GAIN_MAX, + OV2740_ANAL_GAIN_STEP, OV2740_ANAL_GAIN_MIN); + v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, V4L2_CID_DIGITAL_GAIN, + OV2740_DGTL_GAIN_MIN, OV2740_DGTL_GAIN_MAX, + OV2740_DGTL_GAIN_STEP, OV2740_DGTL_GAIN_DEFAULT); + exposure_max = cur_mode->vts_def - OV2740_EXPOSURE_MAX_MARGIN; + ov2740->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, + V4L2_CID_EXPOSURE, + OV2740_EXPOSURE_MIN, exposure_max, + OV2740_EXPOSURE_STEP, + exposure_max); + v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov2740_ctrl_ops, + V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(ov2740_test_pattern_menu) - 1, + 0, 0, ov2740_test_pattern_menu); + if (ctrl_hdlr->error) + return ctrl_hdlr->error; + + ov2740->sd.ctrl_handler = ctrl_hdlr; + + return 0; +} + +static void ov2740_update_pad_format(const struct ov2740_mode *mode, + struct v4l2_mbus_framefmt *fmt) +{ + fmt->width = mode->width; + fmt->height = mode->height; + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; + fmt->field = V4L2_FIELD_NONE; +} + +static int ov2740_start_streaming(struct ov2740 *ov2740) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov2740->sd); + const struct ov2740_reg_list *reg_list; + int link_freq_index; + int ret = 0; + + link_freq_index = ov2740->cur_mode->link_freq_index; + reg_list = &link_freq_configs[link_freq_index].reg_list; + ret = ov2740_write_reg_list(ov2740, reg_list); + if (ret) { + dev_err(&client->dev, "failed to set plls"); + return ret; + } + + reg_list = &ov2740->cur_mode->reg_list; + ret = ov2740_write_reg_list(ov2740, reg_list); + if (ret) { + dev_err(&client->dev, "failed to set mode"); + return ret; + } + + ret = __v4l2_ctrl_handler_setup(ov2740->sd.ctrl_handler); + if (ret) + return ret; + + ret = ov2740_write_reg(ov2740, OV2740_REG_MODE_SELECT, 1, + OV2740_MODE_STREAMING); + if (ret) + dev_err(&client->dev, "failed to start streaming"); + + return ret; +} + +static void ov2740_stop_streaming(struct ov2740 *ov2740) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov2740->sd); + + if (ov2740_write_reg(ov2740, OV2740_REG_MODE_SELECT, 1, + OV2740_MODE_STANDBY)) + dev_err(&client->dev, "failed to stop streaming"); +} + +static int ov2740_set_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov2740 *ov2740 = to_ov2740(sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + int ret = 0; + + if (ov2740->streaming == enable) + return 0; + + mutex_lock(&ov2740->mutex); + if (enable) { + ret = pm_runtime_get_sync(&client->dev); + if (ret < 0) { + pm_runtime_put_noidle(&client->dev); + mutex_unlock(&ov2740->mutex); + return ret; + } + + ret = ov2740_start_streaming(ov2740); + if (ret) { + enable = 0; + ov2740_stop_streaming(ov2740); + pm_runtime_put(&client->dev); + } + } else { + ov2740_stop_streaming(ov2740); + pm_runtime_put(&client->dev); + } + + ov2740->streaming = enable; + mutex_unlock(&ov2740->mutex); + + return ret; +} + +static int __maybe_unused ov2740_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2740 *ov2740 = to_ov2740(sd); + + mutex_lock(&ov2740->mutex); + if (ov2740->streaming) + ov2740_stop_streaming(ov2740); + + mutex_unlock(&ov2740->mutex); + + return 0; +} + +static int __maybe_unused ov2740_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2740 *ov2740 = to_ov2740(sd); + int ret = 0; + + mutex_lock(&ov2740->mutex); + if (!ov2740->streaming) + goto exit; + + ret = ov2740_start_streaming(ov2740); + if (ret) { + ov2740->streaming = false; + ov2740_stop_streaming(ov2740); + } + +exit: + mutex_unlock(&ov2740->mutex); + return ret; +} + +static int ov2740_set_format(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct ov2740 *ov2740 = to_ov2740(sd); + const struct ov2740_mode *mode; + s32 vblank_def, h_blank; + + mode = v4l2_find_nearest_size(supported_modes, + ARRAY_SIZE(supported_modes), width, + height, fmt->format.width, + fmt->format.height); + + mutex_lock(&ov2740->mutex); + ov2740_update_pad_format(mode, &fmt->format); + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { + *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format; + } else { + ov2740->cur_mode = mode; + __v4l2_ctrl_s_ctrl(ov2740->link_freq, mode->link_freq_index); + __v4l2_ctrl_s_ctrl_int64(ov2740->pixel_rate, + to_pixel_rate(mode->link_freq_index)); + + /* Update limits and set FPS to default */ + vblank_def = mode->vts_def - mode->height; + __v4l2_ctrl_modify_range(ov2740->vblank, + mode->vts_min - mode->height, + OV2740_VTS_MAX - mode->height, 1, + vblank_def); + __v4l2_ctrl_s_ctrl(ov2740->vblank, vblank_def); + h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) - + mode->width; + __v4l2_ctrl_modify_range(ov2740->hblank, h_blank, h_blank, 1, + h_blank); + } + mutex_unlock(&ov2740->mutex); + + return 0; +} + +static int ov2740_get_format(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *fmt) +{ + struct ov2740 *ov2740 = to_ov2740(sd); + + mutex_lock(&ov2740->mutex); + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) + fmt->format = *v4l2_subdev_get_try_format(&ov2740->sd, cfg, + fmt->pad); + else + ov2740_update_pad_format(ov2740->cur_mode, &fmt->format); + + mutex_unlock(&ov2740->mutex); + + return 0; +} + +static int ov2740_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index > 0) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SGRBG10_1X10; + + return 0; +} + +static int ov2740_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + if (fse->index >= ARRAY_SIZE(supported_modes)) + return -EINVAL; + + if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10) + return -EINVAL; + + fse->min_width = supported_modes[fse->index].width; + fse->max_width = fse->min_width; + fse->min_height = supported_modes[fse->index].height; + fse->max_height = fse->min_height; + + return 0; +} + +static int ov2740_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + struct ov2740 *ov2740 = to_ov2740(sd); + + mutex_lock(&ov2740->mutex); + ov2740_update_pad_format(&supported_modes[0], + v4l2_subdev_get_try_format(sd, fh->pad, 0)); + mutex_unlock(&ov2740->mutex); + + return 0; +} + +static const struct v4l2_subdev_video_ops ov2740_video_ops = { + .s_stream = ov2740_set_stream, +}; + +static const struct v4l2_subdev_pad_ops ov2740_pad_ops = { + .set_fmt = ov2740_set_format, + .get_fmt = ov2740_get_format, + .enum_mbus_code = ov2740_enum_mbus_code, + .enum_frame_size = ov2740_enum_frame_size, +}; + +static const struct v4l2_subdev_ops ov2740_subdev_ops = { + .video = &ov2740_video_ops, + .pad = &ov2740_pad_ops, +}; + +static const struct media_entity_operations ov2740_subdev_entity_ops = { + .link_validate = v4l2_subdev_link_validate, +}; + +static const struct v4l2_subdev_internal_ops ov2740_internal_ops = { + .open = ov2740_open, +}; + +static int ov2740_identify_module(struct ov2740 *ov2740) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov2740->sd); + int ret; + u32 val; + + ret = ov2740_read_reg(ov2740, OV2740_REG_CHIP_ID, 3, &val); + if (ret) + return ret; + + if (val != OV2740_CHIP_ID) { + dev_err(&client->dev, "chip id mismatch: %x!=%x", + OV2740_CHIP_ID, val); + return -ENXIO; + } + + return 0; +} + +static int ov2740_check_hwcfg(struct device *dev) +{ + struct fwnode_handle *ep; + struct fwnode_handle *fwnode = dev_fwnode(dev); + struct v4l2_fwnode_endpoint bus_cfg = { + .bus_type = V4L2_MBUS_CSI2_DPHY + }; + u32 mclk; + int ret; + unsigned int i, j; + + if (!fwnode) + return -ENXIO; + + ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); + if (ret) + return ret; + + if (mclk != OV2740_MCLK) { + dev_err(dev, "external clock %d is not supported", mclk); + return -EINVAL; + } + + ep = fwnode_graph_get_next_endpoint(fwnode, NULL); + if (!ep) + return -ENXIO; + + ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); + fwnode_handle_put(ep); + if (ret) + return ret; + + if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV2740_DATA_LANES) { + dev_err(dev, "number of CSI2 data lanes %d is not supported", + bus_cfg.bus.mipi_csi2.num_data_lanes); + ret = -EINVAL; + goto check_hwcfg_error; + } + + if (!bus_cfg.nr_of_link_frequencies) { + dev_err(dev, "no link frequencies defined"); + ret = -EINVAL; + goto check_hwcfg_error; + } + + for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) { + for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) { + if (link_freq_menu_items[i] == + bus_cfg.link_frequencies[j]) + break; + } + + if (j == bus_cfg.nr_of_link_frequencies) { + dev_err(dev, "no link frequency %lld supported", + link_freq_menu_items[i]); + ret = -EINVAL; + goto check_hwcfg_error; + } + } + +check_hwcfg_error: + v4l2_fwnode_endpoint_free(&bus_cfg); + + return ret; +} + +static int ov2740_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov2740 *ov2740 = to_ov2740(sd); + + v4l2_async_unregister_subdev(sd); + media_entity_cleanup(&sd->entity); + v4l2_ctrl_handler_free(sd->ctrl_handler); + pm_runtime_disable(&client->dev); + mutex_destroy(&ov2740->mutex); + + return 0; +} + +static int ov2740_probe(struct i2c_client *client) +{ + struct ov2740 *ov2740; + int ret = 0; + + ret = ov2740_check_hwcfg(&client->dev); + if (ret) { + dev_err(&client->dev, "failed to check HW configuration: %d", + ret); + return ret; + } + + ov2740 = devm_kzalloc(&client->dev, sizeof(*ov2740), GFP_KERNEL); + if (!ov2740) + return -ENOMEM; + + v4l2_i2c_subdev_init(&ov2740->sd, client, &ov2740_subdev_ops); + ret = ov2740_identify_module(ov2740); + if (ret) { + dev_err(&client->dev, "failed to find sensor: %d", ret); + return ret; + } + + mutex_init(&ov2740->mutex); + ov2740->cur_mode = &supported_modes[0]; + ret = ov2740_init_controls(ov2740); + if (ret) { + dev_err(&client->dev, "failed to init controls: %d", ret); + goto probe_error_v4l2_ctrl_handler_free; + } + + ov2740->sd.internal_ops = &ov2740_internal_ops; + ov2740->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + ov2740->sd.entity.ops = &ov2740_subdev_entity_ops; + ov2740->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ov2740->pad.flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&ov2740->sd.entity, 1, &ov2740->pad); + if (ret) { + dev_err(&client->dev, "failed to init entity pads: %d", ret); + goto probe_error_v4l2_ctrl_handler_free; + } + + ret = v4l2_async_register_subdev_sensor_common(&ov2740->sd); + if (ret < 0) { + dev_err(&client->dev, "failed to register V4L2 subdev: %d", + ret); + goto probe_error_media_entity_cleanup; + } + + /* + * Device is already turned on by i2c-core with ACPI domain PM. + * Enable runtime PM and turn off the device. + */ + pm_runtime_set_active(&client->dev); + pm_runtime_enable(&client->dev); + pm_runtime_idle(&client->dev); + + return 0; + +probe_error_media_entity_cleanup: + media_entity_cleanup(&ov2740->sd.entity); + +probe_error_v4l2_ctrl_handler_free: + v4l2_ctrl_handler_free(ov2740->sd.ctrl_handler); + mutex_destroy(&ov2740->mutex); + + return ret; +} + +static const struct dev_pm_ops ov2740_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(ov2740_suspend, ov2740_resume) +}; + +#ifdef CONFIG_ACPI +static const struct acpi_device_id ov2740_acpi_ids[] = { + {"INT3474"}, + {} +}; + +MODULE_DEVICE_TABLE(acpi, ov2740_acpi_ids); +#endif + +static struct i2c_driver ov2740_i2c_driver = { + .driver = { + .name = "ov2740", + .pm = &ov2740_pm_ops, + .acpi_match_table = ACPI_PTR(ov2740_acpi_ids), + }, + .probe_new = ov2740_probe, + .remove = ov2740_remove, +}; + +module_i2c_driver(ov2740_i2c_driver); + +MODULE_AUTHOR("Qiu, Tianshu "); +MODULE_AUTHOR("Shawn Tu "); +MODULE_AUTHOR("Bingbu Cao "); +MODULE_DESCRIPTION("OmniVision OV2740 sensor driver"); +MODULE_LICENSE("GPL v2"); -- GitLab From cd25993988491f97a42b3db490fdb2599c67edc8 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 6 May 2020 14:03:04 +0200 Subject: [PATCH 501/503] media: i2c: imx219: Drop and The IMX219 camera driver is not a clock provider, but merely a clock consumer, and thus does not need to include and . Signed-off-by: Geert Uytterhoeven Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/imx219.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index adf35f9ff6a13..f64c0ef7a897f 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -15,8 +15,6 @@ */ #include -#include -#include #include #include #include -- GitLab From 142d06489fc7952976841ec888a655c3735e66fd Mon Sep 17 00:00:00 2001 From: "Gustavo A. R. Silva" Date: Thu, 7 May 2020 21:20:00 +0200 Subject: [PATCH 502/503] media: s5k5baf: Replace zero-length array with flexible-array The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva Signed-off-by: Sakari Ailus Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/s5k5baf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/s5k5baf.c b/drivers/media/i2c/s5k5baf.c index cdfe008ba39f8..42584a0882738 100644 --- a/drivers/media/i2c/s5k5baf.c +++ b/drivers/media/i2c/s5k5baf.c @@ -281,7 +281,7 @@ struct s5k5baf_fw { u16 id; u16 offset; } seq[0]; - u16 data[0]; + u16 data[]; }; struct s5k5baf { -- GitLab From 938b29db3aa9c293c7c1366b16e55e308f1a1ddd Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Sun, 17 May 2020 00:39:36 +0200 Subject: [PATCH 503/503] media: Documentation: media: Refer to mbus format documentation from CSI-2 docs The media bus formats to be used on serial busses are documented but there was no reference from CSI-2 documentation. Add that now. Signed-off-by: Sakari Ailus Acked-by: Hans Verkuil Reviewed-by: Laurent Pinchart Signed-off-by: Mauro Carvalho Chehab --- Documentation/driver-api/media/csi2.rst | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/driver-api/media/csi2.rst b/Documentation/driver-api/media/csi2.rst index e111ff7bfd3db..17cad435f1a0b 100644 --- a/Documentation/driver-api/media/csi2.rst +++ b/Documentation/driver-api/media/csi2.rst @@ -8,6 +8,12 @@ the host SoC. It is defined by the `MIPI alliance`_. .. _`MIPI alliance`: http://www.mipi.org/ +Media bus formats +----------------- + +See :ref:`v4l2-mbus-pixelcode` for details on which media bus formats should +be used for CSI-2 interfaces. + Transmitter drivers ------------------- -- GitLab